Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 ARM Ltd. |
| 3 | * Author: Marc Zyngier <marc.zyngier@arm.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 17 | */ |
| 18 | |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 19 | #include <linux/cpu.h> |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 20 | #include <linux/kvm.h> |
| 21 | #include <linux/kvm_host.h> |
| 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/io.h> |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 24 | #include <linux/of.h> |
| 25 | #include <linux/of_address.h> |
| 26 | #include <linux/of_irq.h> |
Marc Zyngier | 6c3d63c | 2014-06-23 17:37:18 +0100 | [diff] [blame] | 27 | #include <linux/rculist.h> |
Christoffer Dall | 2a2f3e26 | 2014-02-02 13:41:02 -0800 | [diff] [blame] | 28 | #include <linux/uaccess.h> |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 29 | |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 30 | #include <asm/kvm_emulate.h> |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 31 | #include <asm/kvm_arm.h> |
| 32 | #include <asm/kvm_mmu.h> |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 33 | #include <trace/events/kvm.h> |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 34 | #include <asm/kvm.h> |
| 35 | #include <kvm/iodev.h> |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 36 | |
Christoffer Dall | e21f091 | 2015-08-30 13:57:20 +0200 | [diff] [blame] | 37 | #define CREATE_TRACE_POINTS |
| 38 | #include "trace.h" |
| 39 | |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 40 | /* |
| 41 | * How the whole thing works (courtesy of Christoffer Dall): |
| 42 | * |
| 43 | * - At any time, the dist->irq_pending_on_cpu is the oracle that knows if |
Christoffer Dall | 7e36291 | 2014-06-14 22:34:04 +0200 | [diff] [blame] | 44 | * something is pending on the CPU interface. |
| 45 | * - Interrupts that are pending on the distributor are stored on the |
| 46 | * vgic.irq_pending vgic bitmap (this bitmap is updated by both user land |
| 47 | * ioctls and guest mmio ops, and other in-kernel peripherals such as the |
| 48 | * arch. timers). |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 49 | * - Every time the bitmap changes, the irq_pending_on_cpu oracle is |
| 50 | * recalculated |
| 51 | * - To calculate the oracle, we need info for each cpu from |
| 52 | * compute_pending_for_cpu, which considers: |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 53 | * - PPI: dist->irq_pending & dist->irq_enable |
| 54 | * - SPI: dist->irq_pending & dist->irq_enable & dist->irq_spi_target |
Christoffer Dall | 7e36291 | 2014-06-14 22:34:04 +0200 | [diff] [blame] | 55 | * - irq_spi_target is a 'formatted' version of the GICD_ITARGETSRn |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 56 | * registers, stored on each vcpu. We only keep one bit of |
| 57 | * information per interrupt, making sure that only one vcpu can |
| 58 | * accept the interrupt. |
Christoffer Dall | 7e36291 | 2014-06-14 22:34:04 +0200 | [diff] [blame] | 59 | * - If any of the above state changes, we must recalculate the oracle. |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 60 | * - The same is true when injecting an interrupt, except that we only |
| 61 | * consider a single interrupt at a time. The irq_spi_cpu array |
| 62 | * contains the target CPU for each SPI. |
| 63 | * |
| 64 | * The handling of level interrupts adds some extra complexity. We |
| 65 | * need to track when the interrupt has been EOIed, so we can sample |
| 66 | * the 'line' again. This is achieved as such: |
| 67 | * |
| 68 | * - When a level interrupt is moved onto a vcpu, the corresponding |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 69 | * bit in irq_queued is set. As long as this bit is set, the line |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 70 | * will be ignored for further interrupts. The interrupt is injected |
| 71 | * into the vcpu with the GICH_LR_EOI bit set (generate a |
| 72 | * maintenance interrupt on EOI). |
| 73 | * - When the interrupt is EOIed, the maintenance interrupt fires, |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 74 | * and clears the corresponding bit in irq_queued. This allows the |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 75 | * interrupt line to be sampled again. |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 76 | * - Note that level-triggered interrupts can also be set to pending from |
| 77 | * writes to GICD_ISPENDRn and lowering the external input line does not |
| 78 | * cause the interrupt to become inactive in such a situation. |
| 79 | * Conversely, writes to GICD_ICPENDRn do not cause the interrupt to become |
| 80 | * inactive as long as the external input line is held high. |
Marc Zyngier | 6c3d63c | 2014-06-23 17:37:18 +0100 | [diff] [blame] | 81 | * |
| 82 | * |
| 83 | * Initialization rules: there are multiple stages to the vgic |
| 84 | * initialization, both for the distributor and the CPU interfaces. |
| 85 | * |
| 86 | * Distributor: |
| 87 | * |
| 88 | * - kvm_vgic_early_init(): initialization of static data that doesn't |
| 89 | * depend on any sizing information or emulation type. No allocation |
| 90 | * is allowed there. |
| 91 | * |
| 92 | * - vgic_init(): allocation and initialization of the generic data |
| 93 | * structures that depend on sizing information (number of CPUs, |
| 94 | * number of interrupts). Also initializes the vcpu specific data |
| 95 | * structures. Can be executed lazily for GICv2. |
| 96 | * [to be renamed to kvm_vgic_init??] |
| 97 | * |
| 98 | * CPU Interface: |
| 99 | * |
| 100 | * - kvm_vgic_cpu_early_init(): initialization of static data that |
| 101 | * doesn't depend on any sizing information or emulation type. No |
| 102 | * allocation is allowed there. |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 103 | */ |
| 104 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 105 | #include "vgic.h" |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 106 | |
Marc Zyngier | a1fcb44 | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 107 | static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 108 | static void vgic_retire_lr(int lr_nr, int irq, struct kvm_vcpu *vcpu); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 109 | static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr); |
| 110 | static void vgic_set_lr(struct kvm_vcpu *vcpu, int lr, struct vgic_lr lr_desc); |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 111 | static u64 vgic_get_elrsr(struct kvm_vcpu *vcpu); |
Marc Zyngier | 6c3d63c | 2014-06-23 17:37:18 +0100 | [diff] [blame] | 112 | static struct irq_phys_map *vgic_irq_map_search(struct kvm_vcpu *vcpu, |
| 113 | int virt_irq); |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 114 | static int compute_pending_for_cpu(struct kvm_vcpu *vcpu); |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 115 | |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 116 | static const struct vgic_ops *vgic_ops; |
| 117 | static const struct vgic_params *vgic; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 118 | |
Andre Przywara | b26e5fd | 2014-06-02 16:19:12 +0200 | [diff] [blame] | 119 | static void add_sgi_source(struct kvm_vcpu *vcpu, int irq, int source) |
| 120 | { |
| 121 | vcpu->kvm->arch.vgic.vm_ops.add_sgi_source(vcpu, irq, source); |
| 122 | } |
| 123 | |
| 124 | static bool queue_sgi(struct kvm_vcpu *vcpu, int irq) |
| 125 | { |
| 126 | return vcpu->kvm->arch.vgic.vm_ops.queue_sgi(vcpu, irq); |
| 127 | } |
| 128 | |
| 129 | int kvm_vgic_map_resources(struct kvm *kvm) |
| 130 | { |
| 131 | return kvm->arch.vgic.vm_ops.map_resources(kvm, vgic); |
| 132 | } |
| 133 | |
Victor Kamensky | 9662fb4 | 2014-06-12 09:30:10 -0700 | [diff] [blame] | 134 | /* |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 135 | * struct vgic_bitmap contains a bitmap made of unsigned longs, but |
| 136 | * extracts u32s out of them. |
Victor Kamensky | 9662fb4 | 2014-06-12 09:30:10 -0700 | [diff] [blame] | 137 | * |
| 138 | * This does not work on 64-bit BE systems, because the bitmap access |
| 139 | * will store two consecutive 32-bit words with the higher-addressed |
| 140 | * register's bits at the lower index and the lower-addressed register's |
| 141 | * bits at the higher index. |
| 142 | * |
| 143 | * Therefore, swizzle the register index when accessing the 32-bit word |
| 144 | * registers to access the right register's value. |
| 145 | */ |
| 146 | #if defined(CONFIG_CPU_BIG_ENDIAN) && BITS_PER_LONG == 64 |
| 147 | #define REG_OFFSET_SWIZZLE 1 |
| 148 | #else |
| 149 | #define REG_OFFSET_SWIZZLE 0 |
| 150 | #endif |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 151 | |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 152 | static int vgic_init_bitmap(struct vgic_bitmap *b, int nr_cpus, int nr_irqs) |
| 153 | { |
| 154 | int nr_longs; |
| 155 | |
| 156 | nr_longs = nr_cpus + BITS_TO_LONGS(nr_irqs - VGIC_NR_PRIVATE_IRQS); |
| 157 | |
| 158 | b->private = kzalloc(sizeof(unsigned long) * nr_longs, GFP_KERNEL); |
| 159 | if (!b->private) |
| 160 | return -ENOMEM; |
| 161 | |
| 162 | b->shared = b->private + nr_cpus; |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
| 167 | static void vgic_free_bitmap(struct vgic_bitmap *b) |
| 168 | { |
| 169 | kfree(b->private); |
| 170 | b->private = NULL; |
| 171 | b->shared = NULL; |
| 172 | } |
| 173 | |
Christoffer Dall | 2df36a5 | 2014-09-28 16:04:26 +0200 | [diff] [blame] | 174 | /* |
| 175 | * Call this function to convert a u64 value to an unsigned long * bitmask |
| 176 | * in a way that works on both 32-bit and 64-bit LE and BE platforms. |
| 177 | * |
| 178 | * Warning: Calling this function may modify *val. |
| 179 | */ |
| 180 | static unsigned long *u64_to_bitmask(u64 *val) |
| 181 | { |
| 182 | #if defined(CONFIG_CPU_BIG_ENDIAN) && BITS_PER_LONG == 32 |
| 183 | *val = (*val >> 32) | (*val << 32); |
| 184 | #endif |
| 185 | return (unsigned long *)val; |
| 186 | } |
| 187 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 188 | u32 *vgic_bitmap_get_reg(struct vgic_bitmap *x, int cpuid, u32 offset) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 189 | { |
| 190 | offset >>= 2; |
| 191 | if (!offset) |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 192 | return (u32 *)(x->private + cpuid) + REG_OFFSET_SWIZZLE; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 193 | else |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 194 | return (u32 *)(x->shared) + ((offset - 1) ^ REG_OFFSET_SWIZZLE); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 195 | } |
| 196 | |
| 197 | static int vgic_bitmap_get_irq_val(struct vgic_bitmap *x, |
| 198 | int cpuid, int irq) |
| 199 | { |
| 200 | if (irq < VGIC_NR_PRIVATE_IRQS) |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 201 | return test_bit(irq, x->private + cpuid); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 202 | |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 203 | return test_bit(irq - VGIC_NR_PRIVATE_IRQS, x->shared); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 204 | } |
| 205 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 206 | void vgic_bitmap_set_irq_val(struct vgic_bitmap *x, int cpuid, |
| 207 | int irq, int val) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 208 | { |
| 209 | unsigned long *reg; |
| 210 | |
| 211 | if (irq < VGIC_NR_PRIVATE_IRQS) { |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 212 | reg = x->private + cpuid; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 213 | } else { |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 214 | reg = x->shared; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 215 | irq -= VGIC_NR_PRIVATE_IRQS; |
| 216 | } |
| 217 | |
| 218 | if (val) |
| 219 | set_bit(irq, reg); |
| 220 | else |
| 221 | clear_bit(irq, reg); |
| 222 | } |
| 223 | |
| 224 | static unsigned long *vgic_bitmap_get_cpu_map(struct vgic_bitmap *x, int cpuid) |
| 225 | { |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 226 | return x->private + cpuid; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 227 | } |
| 228 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 229 | unsigned long *vgic_bitmap_get_shared_map(struct vgic_bitmap *x) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 230 | { |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 231 | return x->shared; |
| 232 | } |
| 233 | |
| 234 | static int vgic_init_bytemap(struct vgic_bytemap *x, int nr_cpus, int nr_irqs) |
| 235 | { |
| 236 | int size; |
| 237 | |
| 238 | size = nr_cpus * VGIC_NR_PRIVATE_IRQS; |
| 239 | size += nr_irqs - VGIC_NR_PRIVATE_IRQS; |
| 240 | |
| 241 | x->private = kzalloc(size, GFP_KERNEL); |
| 242 | if (!x->private) |
| 243 | return -ENOMEM; |
| 244 | |
| 245 | x->shared = x->private + nr_cpus * VGIC_NR_PRIVATE_IRQS / sizeof(u32); |
| 246 | return 0; |
| 247 | } |
| 248 | |
| 249 | static void vgic_free_bytemap(struct vgic_bytemap *b) |
| 250 | { |
| 251 | kfree(b->private); |
| 252 | b->private = NULL; |
| 253 | b->shared = NULL; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 254 | } |
| 255 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 256 | u32 *vgic_bytemap_get_reg(struct vgic_bytemap *x, int cpuid, u32 offset) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 257 | { |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 258 | u32 *reg; |
| 259 | |
| 260 | if (offset < VGIC_NR_PRIVATE_IRQS) { |
| 261 | reg = x->private; |
| 262 | offset += cpuid * VGIC_NR_PRIVATE_IRQS; |
| 263 | } else { |
| 264 | reg = x->shared; |
| 265 | offset -= VGIC_NR_PRIVATE_IRQS; |
| 266 | } |
| 267 | |
| 268 | return reg + (offset / sizeof(u32)); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 269 | } |
| 270 | |
| 271 | #define VGIC_CFG_LEVEL 0 |
| 272 | #define VGIC_CFG_EDGE 1 |
| 273 | |
| 274 | static bool vgic_irq_is_edge(struct kvm_vcpu *vcpu, int irq) |
| 275 | { |
| 276 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 277 | int irq_val; |
| 278 | |
| 279 | irq_val = vgic_bitmap_get_irq_val(&dist->irq_cfg, vcpu->vcpu_id, irq); |
| 280 | return irq_val == VGIC_CFG_EDGE; |
| 281 | } |
| 282 | |
| 283 | static int vgic_irq_is_enabled(struct kvm_vcpu *vcpu, int irq) |
| 284 | { |
| 285 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 286 | |
| 287 | return vgic_bitmap_get_irq_val(&dist->irq_enabled, vcpu->vcpu_id, irq); |
| 288 | } |
| 289 | |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 290 | static int vgic_irq_is_queued(struct kvm_vcpu *vcpu, int irq) |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 291 | { |
| 292 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 293 | |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 294 | return vgic_bitmap_get_irq_val(&dist->irq_queued, vcpu->vcpu_id, irq); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 295 | } |
| 296 | |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 297 | static int vgic_irq_is_active(struct kvm_vcpu *vcpu, int irq) |
| 298 | { |
| 299 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 300 | |
| 301 | return vgic_bitmap_get_irq_val(&dist->irq_active, vcpu->vcpu_id, irq); |
| 302 | } |
| 303 | |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 304 | static void vgic_irq_set_queued(struct kvm_vcpu *vcpu, int irq) |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 305 | { |
| 306 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 307 | |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 308 | vgic_bitmap_set_irq_val(&dist->irq_queued, vcpu->vcpu_id, irq, 1); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 309 | } |
| 310 | |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 311 | static void vgic_irq_clear_queued(struct kvm_vcpu *vcpu, int irq) |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 312 | { |
| 313 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 314 | |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 315 | vgic_bitmap_set_irq_val(&dist->irq_queued, vcpu->vcpu_id, irq, 0); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 316 | } |
| 317 | |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 318 | static void vgic_irq_set_active(struct kvm_vcpu *vcpu, int irq) |
| 319 | { |
| 320 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 321 | |
| 322 | vgic_bitmap_set_irq_val(&dist->irq_active, vcpu->vcpu_id, irq, 1); |
| 323 | } |
| 324 | |
| 325 | static void vgic_irq_clear_active(struct kvm_vcpu *vcpu, int irq) |
| 326 | { |
| 327 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 328 | |
| 329 | vgic_bitmap_set_irq_val(&dist->irq_active, vcpu->vcpu_id, irq, 0); |
| 330 | } |
| 331 | |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 332 | static int vgic_dist_irq_get_level(struct kvm_vcpu *vcpu, int irq) |
| 333 | { |
| 334 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 335 | |
| 336 | return vgic_bitmap_get_irq_val(&dist->irq_level, vcpu->vcpu_id, irq); |
| 337 | } |
| 338 | |
| 339 | static void vgic_dist_irq_set_level(struct kvm_vcpu *vcpu, int irq) |
| 340 | { |
| 341 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 342 | |
| 343 | vgic_bitmap_set_irq_val(&dist->irq_level, vcpu->vcpu_id, irq, 1); |
| 344 | } |
| 345 | |
| 346 | static void vgic_dist_irq_clear_level(struct kvm_vcpu *vcpu, int irq) |
| 347 | { |
| 348 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 349 | |
| 350 | vgic_bitmap_set_irq_val(&dist->irq_level, vcpu->vcpu_id, irq, 0); |
| 351 | } |
| 352 | |
| 353 | static int vgic_dist_irq_soft_pend(struct kvm_vcpu *vcpu, int irq) |
| 354 | { |
| 355 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 356 | |
| 357 | return vgic_bitmap_get_irq_val(&dist->irq_soft_pend, vcpu->vcpu_id, irq); |
| 358 | } |
| 359 | |
| 360 | static void vgic_dist_irq_clear_soft_pend(struct kvm_vcpu *vcpu, int irq) |
| 361 | { |
| 362 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 363 | |
| 364 | vgic_bitmap_set_irq_val(&dist->irq_soft_pend, vcpu->vcpu_id, irq, 0); |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 365 | if (!vgic_dist_irq_get_level(vcpu, irq)) { |
| 366 | vgic_dist_irq_clear_pending(vcpu, irq); |
| 367 | if (!compute_pending_for_cpu(vcpu)) |
| 368 | clear_bit(vcpu->vcpu_id, dist->irq_pending_on_cpu); |
| 369 | } |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 370 | } |
| 371 | |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 372 | static int vgic_dist_irq_is_pending(struct kvm_vcpu *vcpu, int irq) |
| 373 | { |
| 374 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 375 | |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 376 | return vgic_bitmap_get_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 377 | } |
| 378 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 379 | void vgic_dist_irq_set_pending(struct kvm_vcpu *vcpu, int irq) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 380 | { |
| 381 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 382 | |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 383 | vgic_bitmap_set_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq, 1); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 384 | } |
| 385 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 386 | void vgic_dist_irq_clear_pending(struct kvm_vcpu *vcpu, int irq) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 387 | { |
| 388 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 389 | |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 390 | vgic_bitmap_set_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq, 0); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 391 | } |
| 392 | |
| 393 | static void vgic_cpu_irq_set(struct kvm_vcpu *vcpu, int irq) |
| 394 | { |
| 395 | if (irq < VGIC_NR_PRIVATE_IRQS) |
| 396 | set_bit(irq, vcpu->arch.vgic_cpu.pending_percpu); |
| 397 | else |
| 398 | set_bit(irq - VGIC_NR_PRIVATE_IRQS, |
| 399 | vcpu->arch.vgic_cpu.pending_shared); |
| 400 | } |
| 401 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 402 | void vgic_cpu_irq_clear(struct kvm_vcpu *vcpu, int irq) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 403 | { |
| 404 | if (irq < VGIC_NR_PRIVATE_IRQS) |
| 405 | clear_bit(irq, vcpu->arch.vgic_cpu.pending_percpu); |
| 406 | else |
| 407 | clear_bit(irq - VGIC_NR_PRIVATE_IRQS, |
| 408 | vcpu->arch.vgic_cpu.pending_shared); |
| 409 | } |
| 410 | |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 411 | static bool vgic_can_sample_irq(struct kvm_vcpu *vcpu, int irq) |
| 412 | { |
Marc Zyngier | 7a67b4b | 2015-06-05 16:45:29 +0100 | [diff] [blame] | 413 | return !vgic_irq_is_queued(vcpu, irq); |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 414 | } |
| 415 | |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 416 | /** |
| 417 | * vgic_reg_access - access vgic register |
| 418 | * @mmio: pointer to the data describing the mmio access |
| 419 | * @reg: pointer to the virtual backing of vgic distributor data |
| 420 | * @offset: least significant 2 bits used for word offset |
| 421 | * @mode: ACCESS_ mode (see defines above) |
| 422 | * |
| 423 | * Helper to make vgic register access easier using one of the access |
| 424 | * modes defined for vgic register access |
| 425 | * (read,raz,write-ignored,setbit,clearbit,write) |
| 426 | */ |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 427 | void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg, |
| 428 | phys_addr_t offset, int mode) |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 429 | { |
| 430 | int word_offset = (offset & 3) * 8; |
| 431 | u32 mask = (1UL << (mmio->len * 8)) - 1; |
| 432 | u32 regval; |
| 433 | |
| 434 | /* |
| 435 | * Any alignment fault should have been delivered to the guest |
| 436 | * directly (ARM ARM B3.12.7 "Prioritization of aborts"). |
| 437 | */ |
| 438 | |
| 439 | if (reg) { |
| 440 | regval = *reg; |
| 441 | } else { |
| 442 | BUG_ON(mode != (ACCESS_READ_RAZ | ACCESS_WRITE_IGNORED)); |
| 443 | regval = 0; |
| 444 | } |
| 445 | |
| 446 | if (mmio->is_write) { |
| 447 | u32 data = mmio_data_read(mmio, mask) << word_offset; |
| 448 | switch (ACCESS_WRITE_MASK(mode)) { |
| 449 | case ACCESS_WRITE_IGNORED: |
| 450 | return; |
| 451 | |
| 452 | case ACCESS_WRITE_SETBIT: |
| 453 | regval |= data; |
| 454 | break; |
| 455 | |
| 456 | case ACCESS_WRITE_CLEARBIT: |
| 457 | regval &= ~data; |
| 458 | break; |
| 459 | |
| 460 | case ACCESS_WRITE_VALUE: |
| 461 | regval = (regval & ~(mask << word_offset)) | data; |
| 462 | break; |
| 463 | } |
| 464 | *reg = regval; |
| 465 | } else { |
| 466 | switch (ACCESS_READ_MASK(mode)) { |
| 467 | case ACCESS_READ_RAZ: |
| 468 | regval = 0; |
| 469 | /* fall through */ |
| 470 | |
| 471 | case ACCESS_READ_VALUE: |
| 472 | mmio_data_write(mmio, mask, regval >> word_offset); |
| 473 | } |
| 474 | } |
| 475 | } |
| 476 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 477 | bool handle_mmio_raz_wi(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio, |
| 478 | phys_addr_t offset) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 479 | { |
| 480 | vgic_reg_access(mmio, NULL, offset, |
| 481 | ACCESS_READ_RAZ | ACCESS_WRITE_IGNORED); |
| 482 | return false; |
| 483 | } |
| 484 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 485 | bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio, |
| 486 | phys_addr_t offset, int vcpu_id, int access) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 487 | { |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 488 | u32 *reg; |
| 489 | int mode = ACCESS_READ_VALUE | access; |
| 490 | struct kvm_vcpu *target_vcpu = kvm_get_vcpu(kvm, vcpu_id); |
| 491 | |
| 492 | reg = vgic_bitmap_get_reg(&kvm->arch.vgic.irq_enabled, vcpu_id, offset); |
| 493 | vgic_reg_access(mmio, reg, offset, mode); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 494 | if (mmio->is_write) { |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 495 | if (access & ACCESS_WRITE_CLEARBIT) { |
| 496 | if (offset < 4) /* Force SGI enabled */ |
| 497 | *reg |= 0xffff; |
| 498 | vgic_retire_disabled_irqs(target_vcpu); |
| 499 | } |
| 500 | vgic_update_state(kvm); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 501 | return true; |
| 502 | } |
| 503 | |
| 504 | return false; |
| 505 | } |
| 506 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 507 | bool vgic_handle_set_pending_reg(struct kvm *kvm, |
| 508 | struct kvm_exit_mmio *mmio, |
| 509 | phys_addr_t offset, int vcpu_id) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 510 | { |
Christoffer Dall | 9da48b5 | 2014-06-14 22:30:45 +0200 | [diff] [blame] | 511 | u32 *reg, orig; |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 512 | u32 level_mask; |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 513 | int mode = ACCESS_READ_VALUE | ACCESS_WRITE_SETBIT; |
| 514 | struct vgic_dist *dist = &kvm->arch.vgic; |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 515 | |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 516 | reg = vgic_bitmap_get_reg(&dist->irq_cfg, vcpu_id, offset); |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 517 | level_mask = (~(*reg)); |
| 518 | |
| 519 | /* Mark both level and edge triggered irqs as pending */ |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 520 | reg = vgic_bitmap_get_reg(&dist->irq_pending, vcpu_id, offset); |
Christoffer Dall | 9da48b5 | 2014-06-14 22:30:45 +0200 | [diff] [blame] | 521 | orig = *reg; |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 522 | vgic_reg_access(mmio, reg, offset, mode); |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 523 | |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 524 | if (mmio->is_write) { |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 525 | /* Set the soft-pending flag only for level-triggered irqs */ |
| 526 | reg = vgic_bitmap_get_reg(&dist->irq_soft_pend, |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 527 | vcpu_id, offset); |
| 528 | vgic_reg_access(mmio, reg, offset, mode); |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 529 | *reg &= level_mask; |
| 530 | |
Christoffer Dall | 9da48b5 | 2014-06-14 22:30:45 +0200 | [diff] [blame] | 531 | /* Ignore writes to SGIs */ |
| 532 | if (offset < 2) { |
| 533 | *reg &= ~0xffff; |
| 534 | *reg |= orig & 0xffff; |
| 535 | } |
| 536 | |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 537 | vgic_update_state(kvm); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 538 | return true; |
| 539 | } |
| 540 | |
| 541 | return false; |
| 542 | } |
| 543 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 544 | bool vgic_handle_clear_pending_reg(struct kvm *kvm, |
| 545 | struct kvm_exit_mmio *mmio, |
| 546 | phys_addr_t offset, int vcpu_id) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 547 | { |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 548 | u32 *level_active; |
Christoffer Dall | 9da48b5 | 2014-06-14 22:30:45 +0200 | [diff] [blame] | 549 | u32 *reg, orig; |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 550 | int mode = ACCESS_READ_VALUE | ACCESS_WRITE_CLEARBIT; |
| 551 | struct vgic_dist *dist = &kvm->arch.vgic; |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 552 | |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 553 | reg = vgic_bitmap_get_reg(&dist->irq_pending, vcpu_id, offset); |
Christoffer Dall | 9da48b5 | 2014-06-14 22:30:45 +0200 | [diff] [blame] | 554 | orig = *reg; |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 555 | vgic_reg_access(mmio, reg, offset, mode); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 556 | if (mmio->is_write) { |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 557 | /* Re-set level triggered level-active interrupts */ |
| 558 | level_active = vgic_bitmap_get_reg(&dist->irq_level, |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 559 | vcpu_id, offset); |
| 560 | reg = vgic_bitmap_get_reg(&dist->irq_pending, vcpu_id, offset); |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 561 | *reg |= *level_active; |
| 562 | |
Christoffer Dall | 9da48b5 | 2014-06-14 22:30:45 +0200 | [diff] [blame] | 563 | /* Ignore writes to SGIs */ |
| 564 | if (offset < 2) { |
| 565 | *reg &= ~0xffff; |
| 566 | *reg |= orig & 0xffff; |
| 567 | } |
| 568 | |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 569 | /* Clear soft-pending flags */ |
| 570 | reg = vgic_bitmap_get_reg(&dist->irq_soft_pend, |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 571 | vcpu_id, offset); |
| 572 | vgic_reg_access(mmio, reg, offset, mode); |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 573 | |
Andre Przywara | d97f683 | 2014-06-11 14:11:49 +0200 | [diff] [blame] | 574 | vgic_update_state(kvm); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 575 | return true; |
| 576 | } |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 577 | return false; |
| 578 | } |
| 579 | |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 580 | bool vgic_handle_set_active_reg(struct kvm *kvm, |
| 581 | struct kvm_exit_mmio *mmio, |
| 582 | phys_addr_t offset, int vcpu_id) |
| 583 | { |
| 584 | u32 *reg; |
| 585 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 586 | |
| 587 | reg = vgic_bitmap_get_reg(&dist->irq_active, vcpu_id, offset); |
| 588 | vgic_reg_access(mmio, reg, offset, |
| 589 | ACCESS_READ_VALUE | ACCESS_WRITE_SETBIT); |
| 590 | |
| 591 | if (mmio->is_write) { |
| 592 | vgic_update_state(kvm); |
| 593 | return true; |
| 594 | } |
| 595 | |
| 596 | return false; |
| 597 | } |
| 598 | |
| 599 | bool vgic_handle_clear_active_reg(struct kvm *kvm, |
| 600 | struct kvm_exit_mmio *mmio, |
| 601 | phys_addr_t offset, int vcpu_id) |
| 602 | { |
| 603 | u32 *reg; |
| 604 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 605 | |
| 606 | reg = vgic_bitmap_get_reg(&dist->irq_active, vcpu_id, offset); |
| 607 | vgic_reg_access(mmio, reg, offset, |
| 608 | ACCESS_READ_VALUE | ACCESS_WRITE_CLEARBIT); |
| 609 | |
| 610 | if (mmio->is_write) { |
| 611 | vgic_update_state(kvm); |
| 612 | return true; |
| 613 | } |
| 614 | |
| 615 | return false; |
| 616 | } |
| 617 | |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 618 | static u32 vgic_cfg_expand(u16 val) |
| 619 | { |
| 620 | u32 res = 0; |
| 621 | int i; |
| 622 | |
| 623 | /* |
| 624 | * Turn a 16bit value like abcd...mnop into a 32bit word |
| 625 | * a0b0c0d0...m0n0o0p0, which is what the HW cfg register is. |
| 626 | */ |
| 627 | for (i = 0; i < 16; i++) |
| 628 | res |= ((val >> i) & VGIC_CFG_EDGE) << (2 * i + 1); |
| 629 | |
| 630 | return res; |
| 631 | } |
| 632 | |
| 633 | static u16 vgic_cfg_compress(u32 val) |
| 634 | { |
| 635 | u16 res = 0; |
| 636 | int i; |
| 637 | |
| 638 | /* |
| 639 | * Turn a 32bit word a0b0c0d0...m0n0o0p0 into 16bit value like |
| 640 | * abcd...mnop which is what we really care about. |
| 641 | */ |
| 642 | for (i = 0; i < 16; i++) |
| 643 | res |= ((val >> (i * 2 + 1)) & VGIC_CFG_EDGE) << i; |
| 644 | |
| 645 | return res; |
| 646 | } |
| 647 | |
| 648 | /* |
| 649 | * The distributor uses 2 bits per IRQ for the CFG register, but the |
| 650 | * LSB is always 0. As such, we only keep the upper bit, and use the |
| 651 | * two above functions to compress/expand the bits |
| 652 | */ |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 653 | bool vgic_handle_cfg_reg(u32 *reg, struct kvm_exit_mmio *mmio, |
| 654 | phys_addr_t offset) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 655 | { |
| 656 | u32 val; |
Marc Zyngier | 6545eae | 2013-08-29 11:08:23 +0100 | [diff] [blame] | 657 | |
Andre Przywara | f2ae85b | 2014-04-11 00:07:18 +0200 | [diff] [blame] | 658 | if (offset & 4) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 659 | val = *reg >> 16; |
| 660 | else |
| 661 | val = *reg & 0xffff; |
| 662 | |
| 663 | val = vgic_cfg_expand(val); |
| 664 | vgic_reg_access(mmio, &val, offset, |
| 665 | ACCESS_READ_VALUE | ACCESS_WRITE_VALUE); |
| 666 | if (mmio->is_write) { |
Christoffer Dall | 8bf9a70 | 2015-08-30 14:42:16 +0200 | [diff] [blame] | 667 | /* Ignore writes to read-only SGI and PPI bits */ |
| 668 | if (offset < 8) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 669 | return false; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 670 | |
| 671 | val = vgic_cfg_compress(val); |
Andre Przywara | f2ae85b | 2014-04-11 00:07:18 +0200 | [diff] [blame] | 672 | if (offset & 4) { |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 673 | *reg &= 0xffff; |
| 674 | *reg |= val << 16; |
| 675 | } else { |
| 676 | *reg &= 0xffff << 16; |
| 677 | *reg |= val; |
| 678 | } |
| 679 | } |
| 680 | |
| 681 | return false; |
| 682 | } |
| 683 | |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 684 | /** |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 685 | * vgic_unqueue_irqs - move pending/active IRQs from LRs to the distributor |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 686 | * @vgic_cpu: Pointer to the vgic_cpu struct holding the LRs |
| 687 | * |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 688 | * Move any IRQs that have already been assigned to LRs back to the |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 689 | * emulated distributor state so that the complete emulated state can be read |
| 690 | * from the main emulation structures without investigating the LRs. |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 691 | */ |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 692 | void vgic_unqueue_irqs(struct kvm_vcpu *vcpu) |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 693 | { |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 694 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 695 | u64 elrsr = vgic_get_elrsr(vcpu); |
| 696 | unsigned long *elrsr_ptr = u64_to_bitmask(&elrsr); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 697 | int i; |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 698 | |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 699 | for_each_clear_bit(i, elrsr_ptr, vgic_cpu->nr_lr) { |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 700 | struct vgic_lr lr = vgic_get_lr(vcpu, i); |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 701 | |
| 702 | /* |
| 703 | * There are three options for the state bits: |
| 704 | * |
| 705 | * 01: pending |
| 706 | * 10: active |
| 707 | * 11: pending and active |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 708 | */ |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 709 | BUG_ON(!(lr.state & LR_STATE_MASK)); |
| 710 | |
| 711 | /* Reestablish SGI source for pending and active IRQs */ |
| 712 | if (lr.irq < VGIC_NR_SGIS) |
| 713 | add_sgi_source(vcpu, lr.irq, lr.source); |
| 714 | |
| 715 | /* |
| 716 | * If the LR holds an active (10) or a pending and active (11) |
| 717 | * interrupt then move the active state to the |
| 718 | * distributor tracking bit. |
| 719 | */ |
| 720 | if (lr.state & LR_STATE_ACTIVE) { |
| 721 | vgic_irq_set_active(vcpu, lr.irq); |
| 722 | lr.state &= ~LR_STATE_ACTIVE; |
| 723 | } |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 724 | |
| 725 | /* |
| 726 | * Reestablish the pending state on the distributor and the |
| 727 | * CPU interface. It may have already been pending, but that |
| 728 | * is fine, then we are only setting a few bits that were |
| 729 | * already set. |
| 730 | */ |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 731 | if (lr.state & LR_STATE_PENDING) { |
| 732 | vgic_dist_irq_set_pending(vcpu, lr.irq); |
| 733 | lr.state &= ~LR_STATE_PENDING; |
| 734 | } |
| 735 | |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 736 | vgic_set_lr(vcpu, i, lr); |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 737 | |
| 738 | /* |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 739 | * Mark the LR as free for other use. |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 740 | */ |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 741 | BUG_ON(lr.state & LR_STATE_MASK); |
| 742 | vgic_retire_lr(i, lr.irq, vcpu); |
| 743 | vgic_irq_clear_queued(vcpu, lr.irq); |
Christoffer Dall | cbd333a | 2013-11-15 20:51:31 -0800 | [diff] [blame] | 744 | |
| 745 | /* Finally update the VGIC state. */ |
| 746 | vgic_update_state(vcpu->kvm); |
| 747 | } |
| 748 | } |
| 749 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 750 | const |
Andre Przywara | cf50a1e | 2015-03-26 14:39:32 +0000 | [diff] [blame] | 751 | struct vgic_io_range *vgic_find_range(const struct vgic_io_range *ranges, |
Andre Przywara | 9f199d0 | 2015-03-26 14:39:33 +0000 | [diff] [blame] | 752 | int len, gpa_t offset) |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 753 | { |
Andre Przywara | 9f199d0 | 2015-03-26 14:39:33 +0000 | [diff] [blame] | 754 | while (ranges->len) { |
| 755 | if (offset >= ranges->base && |
| 756 | (offset + len) <= (ranges->base + ranges->len)) |
| 757 | return ranges; |
| 758 | ranges++; |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 759 | } |
| 760 | |
| 761 | return NULL; |
| 762 | } |
| 763 | |
Marc Zyngier | c3c9183 | 2014-07-08 12:09:04 +0100 | [diff] [blame] | 764 | static bool vgic_validate_access(const struct vgic_dist *dist, |
Andre Przywara | cf50a1e | 2015-03-26 14:39:32 +0000 | [diff] [blame] | 765 | const struct vgic_io_range *range, |
Marc Zyngier | c3c9183 | 2014-07-08 12:09:04 +0100 | [diff] [blame] | 766 | unsigned long offset) |
| 767 | { |
| 768 | int irq; |
| 769 | |
| 770 | if (!range->bits_per_irq) |
| 771 | return true; /* Not an irq-based access */ |
| 772 | |
| 773 | irq = offset * 8 / range->bits_per_irq; |
| 774 | if (irq >= dist->nr_irqs) |
| 775 | return false; |
| 776 | |
| 777 | return true; |
| 778 | } |
| 779 | |
Andre Przywara | 05bc8aa | 2014-06-05 16:07:50 +0200 | [diff] [blame] | 780 | /* |
| 781 | * Call the respective handler function for the given range. |
| 782 | * We split up any 64 bit accesses into two consecutive 32 bit |
| 783 | * handler calls and merge the result afterwards. |
| 784 | * We do this in a little endian fashion regardless of the host's |
| 785 | * or guest's endianness, because the GIC is always LE and the rest of |
| 786 | * the code (vgic_reg_access) also puts it in a LE fashion already. |
| 787 | * At this point we have already identified the handle function, so |
| 788 | * range points to that one entry and offset is relative to this. |
| 789 | */ |
| 790 | static bool call_range_handler(struct kvm_vcpu *vcpu, |
| 791 | struct kvm_exit_mmio *mmio, |
| 792 | unsigned long offset, |
Andre Przywara | cf50a1e | 2015-03-26 14:39:32 +0000 | [diff] [blame] | 793 | const struct vgic_io_range *range) |
Andre Przywara | 05bc8aa | 2014-06-05 16:07:50 +0200 | [diff] [blame] | 794 | { |
Andre Przywara | 05bc8aa | 2014-06-05 16:07:50 +0200 | [diff] [blame] | 795 | struct kvm_exit_mmio mmio32; |
| 796 | bool ret; |
| 797 | |
| 798 | if (likely(mmio->len <= 4)) |
| 799 | return range->handle_mmio(vcpu, mmio, offset); |
| 800 | |
| 801 | /* |
| 802 | * Any access bigger than 4 bytes (that we currently handle in KVM) |
| 803 | * is actually 8 bytes long, caused by a 64-bit access |
| 804 | */ |
| 805 | |
| 806 | mmio32.len = 4; |
| 807 | mmio32.is_write = mmio->is_write; |
Andre Przywara | 9fedf14 | 2014-11-13 16:21:35 +0000 | [diff] [blame] | 808 | mmio32.private = mmio->private; |
Andre Przywara | 05bc8aa | 2014-06-05 16:07:50 +0200 | [diff] [blame] | 809 | |
| 810 | mmio32.phys_addr = mmio->phys_addr + 4; |
Andre Przywara | 950324a | 2015-03-28 01:13:13 +0000 | [diff] [blame] | 811 | mmio32.data = &((u32 *)mmio->data)[1]; |
Andre Przywara | 05bc8aa | 2014-06-05 16:07:50 +0200 | [diff] [blame] | 812 | ret = range->handle_mmio(vcpu, &mmio32, offset + 4); |
Andre Przywara | 05bc8aa | 2014-06-05 16:07:50 +0200 | [diff] [blame] | 813 | |
| 814 | mmio32.phys_addr = mmio->phys_addr; |
Andre Przywara | 950324a | 2015-03-28 01:13:13 +0000 | [diff] [blame] | 815 | mmio32.data = &((u32 *)mmio->data)[0]; |
Andre Przywara | 05bc8aa | 2014-06-05 16:07:50 +0200 | [diff] [blame] | 816 | ret |= range->handle_mmio(vcpu, &mmio32, offset); |
Andre Przywara | 05bc8aa | 2014-06-05 16:07:50 +0200 | [diff] [blame] | 817 | |
| 818 | return ret; |
| 819 | } |
| 820 | |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 821 | /** |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 822 | * vgic_handle_mmio_access - handle an in-kernel MMIO access |
| 823 | * This is called by the read/write KVM IO device wrappers below. |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 824 | * @vcpu: pointer to the vcpu performing the access |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 825 | * @this: pointer to the KVM IO device in charge |
| 826 | * @addr: guest physical address of the access |
| 827 | * @len: size of the access |
| 828 | * @val: pointer to the data region |
| 829 | * @is_write: read or write access |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 830 | * |
Andre Przywara | 9641525 | 2014-06-02 22:44:37 +0200 | [diff] [blame] | 831 | * returns true if the MMIO access could be performed |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 832 | */ |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 833 | static int vgic_handle_mmio_access(struct kvm_vcpu *vcpu, |
| 834 | struct kvm_io_device *this, gpa_t addr, |
| 835 | int len, void *val, bool is_write) |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 836 | { |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 837 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 838 | struct vgic_io_device *iodev = container_of(this, |
| 839 | struct vgic_io_device, dev); |
| 840 | struct kvm_run *run = vcpu->run; |
| 841 | const struct vgic_io_range *range; |
| 842 | struct kvm_exit_mmio mmio; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 843 | bool updated_state; |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 844 | gpa_t offset; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 845 | |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 846 | offset = addr - iodev->addr; |
| 847 | range = vgic_find_range(iodev->reg_ranges, len, offset); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 848 | if (unlikely(!range || !range->handle_mmio)) { |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 849 | pr_warn("Unhandled access %d %08llx %d\n", is_write, addr, len); |
| 850 | return -ENXIO; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 851 | } |
| 852 | |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 853 | mmio.phys_addr = addr; |
| 854 | mmio.len = len; |
| 855 | mmio.is_write = is_write; |
Andre Przywara | 950324a | 2015-03-28 01:13:13 +0000 | [diff] [blame] | 856 | mmio.data = val; |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 857 | mmio.private = iodev->redist_vcpu; |
| 858 | |
| 859 | spin_lock(&dist->lock); |
Andre Przywara | 9641525 | 2014-06-02 22:44:37 +0200 | [diff] [blame] | 860 | offset -= range->base; |
Marc Zyngier | c3c9183 | 2014-07-08 12:09:04 +0100 | [diff] [blame] | 861 | if (vgic_validate_access(dist, range, offset)) { |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 862 | updated_state = call_range_handler(vcpu, &mmio, offset, range); |
Marc Zyngier | c3c9183 | 2014-07-08 12:09:04 +0100 | [diff] [blame] | 863 | } else { |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 864 | if (!is_write) |
| 865 | memset(val, 0, len); |
Marc Zyngier | c3c9183 | 2014-07-08 12:09:04 +0100 | [diff] [blame] | 866 | updated_state = false; |
| 867 | } |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 868 | spin_unlock(&dist->lock); |
Andre Przywara | 950324a | 2015-03-28 01:13:13 +0000 | [diff] [blame] | 869 | run->mmio.is_write = is_write; |
| 870 | run->mmio.len = len; |
| 871 | run->mmio.phys_addr = addr; |
| 872 | memcpy(run->mmio.data, val, len); |
| 873 | |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 874 | kvm_handle_mmio_return(vcpu, run); |
| 875 | |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 876 | if (updated_state) |
| 877 | vgic_kick_vcpus(vcpu->kvm); |
| 878 | |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 879 | return 0; |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 880 | } |
| 881 | |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 882 | static int vgic_handle_mmio_read(struct kvm_vcpu *vcpu, |
| 883 | struct kvm_io_device *this, |
| 884 | gpa_t addr, int len, void *val) |
Andre Przywara | 9641525 | 2014-06-02 22:44:37 +0200 | [diff] [blame] | 885 | { |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 886 | return vgic_handle_mmio_access(vcpu, this, addr, len, val, false); |
| 887 | } |
Andre Przywara | 9641525 | 2014-06-02 22:44:37 +0200 | [diff] [blame] | 888 | |
Andre Przywara | 6777f77 | 2015-03-26 14:39:34 +0000 | [diff] [blame] | 889 | static int vgic_handle_mmio_write(struct kvm_vcpu *vcpu, |
| 890 | struct kvm_io_device *this, |
| 891 | gpa_t addr, int len, const void *val) |
| 892 | { |
| 893 | return vgic_handle_mmio_access(vcpu, this, addr, len, (void *)val, |
| 894 | true); |
| 895 | } |
| 896 | |
| 897 | struct kvm_io_device_ops vgic_io_ops = { |
| 898 | .read = vgic_handle_mmio_read, |
| 899 | .write = vgic_handle_mmio_write, |
| 900 | }; |
| 901 | |
| 902 | /** |
| 903 | * vgic_register_kvm_io_dev - register VGIC register frame on the KVM I/O bus |
| 904 | * @kvm: The VM structure pointer |
| 905 | * @base: The (guest) base address for the register frame |
| 906 | * @len: Length of the register frame window |
| 907 | * @ranges: Describing the handler functions for each register |
| 908 | * @redist_vcpu_id: The VCPU ID to pass on to the handlers on call |
| 909 | * @iodev: Points to memory to be passed on to the handler |
| 910 | * |
| 911 | * @iodev stores the parameters of this function to be usable by the handler |
| 912 | * respectively the dispatcher function (since the KVM I/O bus framework lacks |
| 913 | * an opaque parameter). Initialization is done in this function, but the |
| 914 | * reference should be valid and unique for the whole VGIC lifetime. |
| 915 | * If the register frame is not mapped for a specific VCPU, pass -1 to |
| 916 | * @redist_vcpu_id. |
| 917 | */ |
| 918 | int vgic_register_kvm_io_dev(struct kvm *kvm, gpa_t base, int len, |
| 919 | const struct vgic_io_range *ranges, |
| 920 | int redist_vcpu_id, |
| 921 | struct vgic_io_device *iodev) |
| 922 | { |
| 923 | struct kvm_vcpu *vcpu = NULL; |
| 924 | int ret; |
| 925 | |
| 926 | if (redist_vcpu_id >= 0) |
| 927 | vcpu = kvm_get_vcpu(kvm, redist_vcpu_id); |
| 928 | |
| 929 | iodev->addr = base; |
| 930 | iodev->len = len; |
| 931 | iodev->reg_ranges = ranges; |
| 932 | iodev->redist_vcpu = vcpu; |
| 933 | |
| 934 | kvm_iodevice_init(&iodev->dev, &vgic_io_ops); |
| 935 | |
| 936 | mutex_lock(&kvm->slots_lock); |
| 937 | |
| 938 | ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, base, len, |
| 939 | &iodev->dev); |
| 940 | mutex_unlock(&kvm->slots_lock); |
| 941 | |
| 942 | /* Mark the iodev as invalid if registration fails. */ |
| 943 | if (ret) |
| 944 | iodev->dev.ops = NULL; |
| 945 | |
| 946 | return ret; |
Andre Przywara | 9641525 | 2014-06-02 22:44:37 +0200 | [diff] [blame] | 947 | } |
| 948 | |
Marc Zyngier | fb65ab6 | 2014-07-08 12:09:02 +0100 | [diff] [blame] | 949 | static int vgic_nr_shared_irqs(struct vgic_dist *dist) |
| 950 | { |
| 951 | return dist->nr_irqs - VGIC_NR_PRIVATE_IRQS; |
| 952 | } |
| 953 | |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 954 | static int compute_active_for_cpu(struct kvm_vcpu *vcpu) |
| 955 | { |
| 956 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 957 | unsigned long *active, *enabled, *act_percpu, *act_shared; |
| 958 | unsigned long active_private, active_shared; |
| 959 | int nr_shared = vgic_nr_shared_irqs(dist); |
| 960 | int vcpu_id; |
| 961 | |
| 962 | vcpu_id = vcpu->vcpu_id; |
| 963 | act_percpu = vcpu->arch.vgic_cpu.active_percpu; |
| 964 | act_shared = vcpu->arch.vgic_cpu.active_shared; |
| 965 | |
| 966 | active = vgic_bitmap_get_cpu_map(&dist->irq_active, vcpu_id); |
| 967 | enabled = vgic_bitmap_get_cpu_map(&dist->irq_enabled, vcpu_id); |
| 968 | bitmap_and(act_percpu, active, enabled, VGIC_NR_PRIVATE_IRQS); |
| 969 | |
| 970 | active = vgic_bitmap_get_shared_map(&dist->irq_active); |
| 971 | enabled = vgic_bitmap_get_shared_map(&dist->irq_enabled); |
| 972 | bitmap_and(act_shared, active, enabled, nr_shared); |
| 973 | bitmap_and(act_shared, act_shared, |
| 974 | vgic_bitmap_get_shared_map(&dist->irq_spi_target[vcpu_id]), |
| 975 | nr_shared); |
| 976 | |
| 977 | active_private = find_first_bit(act_percpu, VGIC_NR_PRIVATE_IRQS); |
| 978 | active_shared = find_first_bit(act_shared, nr_shared); |
| 979 | |
| 980 | return (active_private < VGIC_NR_PRIVATE_IRQS || |
| 981 | active_shared < nr_shared); |
| 982 | } |
| 983 | |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 984 | static int compute_pending_for_cpu(struct kvm_vcpu *vcpu) |
| 985 | { |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 986 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 987 | unsigned long *pending, *enabled, *pend_percpu, *pend_shared; |
| 988 | unsigned long pending_private, pending_shared; |
Marc Zyngier | fb65ab6 | 2014-07-08 12:09:02 +0100 | [diff] [blame] | 989 | int nr_shared = vgic_nr_shared_irqs(dist); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 990 | int vcpu_id; |
| 991 | |
| 992 | vcpu_id = vcpu->vcpu_id; |
| 993 | pend_percpu = vcpu->arch.vgic_cpu.pending_percpu; |
| 994 | pend_shared = vcpu->arch.vgic_cpu.pending_shared; |
| 995 | |
Christoffer Dall | 0d99749 | 2015-10-17 19:05:27 +0200 | [diff] [blame] | 996 | if (!dist->enabled) { |
| 997 | bitmap_zero(pend_percpu, VGIC_NR_PRIVATE_IRQS); |
| 998 | bitmap_zero(pend_shared, nr_shared); |
| 999 | return 0; |
| 1000 | } |
| 1001 | |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 1002 | pending = vgic_bitmap_get_cpu_map(&dist->irq_pending, vcpu_id); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1003 | enabled = vgic_bitmap_get_cpu_map(&dist->irq_enabled, vcpu_id); |
| 1004 | bitmap_and(pend_percpu, pending, enabled, VGIC_NR_PRIVATE_IRQS); |
| 1005 | |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 1006 | pending = vgic_bitmap_get_shared_map(&dist->irq_pending); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1007 | enabled = vgic_bitmap_get_shared_map(&dist->irq_enabled); |
Marc Zyngier | fb65ab6 | 2014-07-08 12:09:02 +0100 | [diff] [blame] | 1008 | bitmap_and(pend_shared, pending, enabled, nr_shared); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1009 | bitmap_and(pend_shared, pend_shared, |
| 1010 | vgic_bitmap_get_shared_map(&dist->irq_spi_target[vcpu_id]), |
Marc Zyngier | fb65ab6 | 2014-07-08 12:09:02 +0100 | [diff] [blame] | 1011 | nr_shared); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1012 | |
| 1013 | pending_private = find_first_bit(pend_percpu, VGIC_NR_PRIVATE_IRQS); |
Marc Zyngier | fb65ab6 | 2014-07-08 12:09:02 +0100 | [diff] [blame] | 1014 | pending_shared = find_first_bit(pend_shared, nr_shared); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1015 | return (pending_private < VGIC_NR_PRIVATE_IRQS || |
Marc Zyngier | fb65ab6 | 2014-07-08 12:09:02 +0100 | [diff] [blame] | 1016 | pending_shared < vgic_nr_shared_irqs(dist)); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1017 | } |
| 1018 | |
| 1019 | /* |
| 1020 | * Update the interrupt state and determine which CPUs have pending |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1021 | * or active interrupts. Must be called with distributor lock held. |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1022 | */ |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 1023 | void vgic_update_state(struct kvm *kvm) |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1024 | { |
| 1025 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 1026 | struct kvm_vcpu *vcpu; |
| 1027 | int c; |
| 1028 | |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1029 | kvm_for_each_vcpu(c, vcpu, kvm) { |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1030 | if (compute_pending_for_cpu(vcpu)) |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1031 | set_bit(c, dist->irq_pending_on_cpu); |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1032 | |
| 1033 | if (compute_active_for_cpu(vcpu)) |
| 1034 | set_bit(c, dist->irq_active_on_cpu); |
| 1035 | else |
| 1036 | clear_bit(c, dist->irq_active_on_cpu); |
Marc Zyngier | b47ef92 | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1037 | } |
Marc Zyngier | 1a89dd9 | 2013-01-21 19:36:12 -0500 | [diff] [blame] | 1038 | } |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 1039 | |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1040 | static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr) |
| 1041 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1042 | return vgic_ops->get_lr(vcpu, lr); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1043 | } |
| 1044 | |
| 1045 | static void vgic_set_lr(struct kvm_vcpu *vcpu, int lr, |
| 1046 | struct vgic_lr vlr) |
| 1047 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1048 | vgic_ops->set_lr(vcpu, lr, vlr); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1049 | } |
| 1050 | |
Marc Zyngier | 69bb2c9 | 2013-06-04 10:29:39 +0100 | [diff] [blame] | 1051 | static void vgic_sync_lr_elrsr(struct kvm_vcpu *vcpu, int lr, |
| 1052 | struct vgic_lr vlr) |
| 1053 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1054 | vgic_ops->sync_lr_elrsr(vcpu, lr, vlr); |
Marc Zyngier | 69bb2c9 | 2013-06-04 10:29:39 +0100 | [diff] [blame] | 1055 | } |
| 1056 | |
| 1057 | static inline u64 vgic_get_elrsr(struct kvm_vcpu *vcpu) |
| 1058 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1059 | return vgic_ops->get_elrsr(vcpu); |
Marc Zyngier | 69bb2c9 | 2013-06-04 10:29:39 +0100 | [diff] [blame] | 1060 | } |
| 1061 | |
Marc Zyngier | 8d6a031 | 2013-06-04 10:33:43 +0100 | [diff] [blame] | 1062 | static inline u64 vgic_get_eisr(struct kvm_vcpu *vcpu) |
| 1063 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1064 | return vgic_ops->get_eisr(vcpu); |
Marc Zyngier | 8d6a031 | 2013-06-04 10:33:43 +0100 | [diff] [blame] | 1065 | } |
| 1066 | |
Christoffer Dall | ae70593 | 2015-03-13 17:02:56 +0000 | [diff] [blame] | 1067 | static inline void vgic_clear_eisr(struct kvm_vcpu *vcpu) |
| 1068 | { |
| 1069 | vgic_ops->clear_eisr(vcpu); |
| 1070 | } |
| 1071 | |
Marc Zyngier | 495dd85 | 2013-06-04 11:02:10 +0100 | [diff] [blame] | 1072 | static inline u32 vgic_get_interrupt_status(struct kvm_vcpu *vcpu) |
| 1073 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1074 | return vgic_ops->get_interrupt_status(vcpu); |
Marc Zyngier | 495dd85 | 2013-06-04 11:02:10 +0100 | [diff] [blame] | 1075 | } |
| 1076 | |
Marc Zyngier | 909d9b5 | 2013-06-04 11:24:17 +0100 | [diff] [blame] | 1077 | static inline void vgic_enable_underflow(struct kvm_vcpu *vcpu) |
| 1078 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1079 | vgic_ops->enable_underflow(vcpu); |
Marc Zyngier | 909d9b5 | 2013-06-04 11:24:17 +0100 | [diff] [blame] | 1080 | } |
| 1081 | |
| 1082 | static inline void vgic_disable_underflow(struct kvm_vcpu *vcpu) |
| 1083 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1084 | vgic_ops->disable_underflow(vcpu); |
Marc Zyngier | 909d9b5 | 2013-06-04 11:24:17 +0100 | [diff] [blame] | 1085 | } |
| 1086 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 1087 | void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr) |
Marc Zyngier | beee38b | 2014-02-04 17:48:10 +0000 | [diff] [blame] | 1088 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1089 | vgic_ops->get_vmcr(vcpu, vmcr); |
Marc Zyngier | beee38b | 2014-02-04 17:48:10 +0000 | [diff] [blame] | 1090 | } |
| 1091 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 1092 | void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr) |
Marc Zyngier | beee38b | 2014-02-04 17:48:10 +0000 | [diff] [blame] | 1093 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1094 | vgic_ops->set_vmcr(vcpu, vmcr); |
Marc Zyngier | beee38b | 2014-02-04 17:48:10 +0000 | [diff] [blame] | 1095 | } |
| 1096 | |
Marc Zyngier | da8dafd1 | 2013-06-04 11:36:38 +0100 | [diff] [blame] | 1097 | static inline void vgic_enable(struct kvm_vcpu *vcpu) |
| 1098 | { |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1099 | vgic_ops->enable(vcpu); |
Marc Zyngier | da8dafd1 | 2013-06-04 11:36:38 +0100 | [diff] [blame] | 1100 | } |
| 1101 | |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1102 | static void vgic_retire_lr(int lr_nr, int irq, struct kvm_vcpu *vcpu) |
| 1103 | { |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1104 | struct vgic_lr vlr = vgic_get_lr(vcpu, lr_nr); |
| 1105 | |
Christoffer Dall | cff9211 | 2015-10-16 12:41:21 +0200 | [diff] [blame] | 1106 | /* |
| 1107 | * We must transfer the pending state back to the distributor before |
| 1108 | * retiring the LR, otherwise we may loose edge-triggered interrupts. |
| 1109 | */ |
| 1110 | if (vlr.state & LR_STATE_PENDING) { |
| 1111 | vgic_dist_irq_set_pending(vcpu, irq); |
| 1112 | vlr.hwirq = 0; |
| 1113 | } |
| 1114 | |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1115 | vlr.state = 0; |
| 1116 | vgic_set_lr(vcpu, lr_nr, vlr); |
Christoffer Dall | ae70593 | 2015-03-13 17:02:56 +0000 | [diff] [blame] | 1117 | vgic_sync_lr_elrsr(vcpu, lr_nr, vlr); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1118 | } |
Marc Zyngier | a1fcb44 | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1119 | |
| 1120 | /* |
| 1121 | * An interrupt may have been disabled after being made pending on the |
| 1122 | * CPU interface (the classic case is a timer running while we're |
| 1123 | * rebooting the guest - the interrupt would kick as soon as the CPU |
| 1124 | * interface gets enabled, with deadly consequences). |
| 1125 | * |
| 1126 | * The solution is to examine already active LRs, and check the |
| 1127 | * interrupt is still enabled. If not, just retire it. |
| 1128 | */ |
| 1129 | static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu) |
| 1130 | { |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1131 | u64 elrsr = vgic_get_elrsr(vcpu); |
| 1132 | unsigned long *elrsr_ptr = u64_to_bitmask(&elrsr); |
Marc Zyngier | a1fcb44 | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1133 | int lr; |
| 1134 | |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1135 | for_each_clear_bit(lr, elrsr_ptr, vgic->nr_lr) { |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1136 | struct vgic_lr vlr = vgic_get_lr(vcpu, lr); |
Marc Zyngier | a1fcb44 | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1137 | |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1138 | if (!vgic_irq_is_enabled(vcpu, vlr.irq)) { |
| 1139 | vgic_retire_lr(lr, vlr.irq, vcpu); |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 1140 | if (vgic_irq_is_queued(vcpu, vlr.irq)) |
| 1141 | vgic_irq_clear_queued(vcpu, vlr.irq); |
Marc Zyngier | a1fcb44 | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1142 | } |
| 1143 | } |
| 1144 | } |
| 1145 | |
Alex Bennée | 7176095 | 2015-03-13 17:02:53 +0000 | [diff] [blame] | 1146 | static void vgic_queue_irq_to_lr(struct kvm_vcpu *vcpu, int irq, |
| 1147 | int lr_nr, struct vgic_lr vlr) |
| 1148 | { |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1149 | if (vgic_irq_is_active(vcpu, irq)) { |
| 1150 | vlr.state |= LR_STATE_ACTIVE; |
| 1151 | kvm_debug("Set active, clear distributor: 0x%x\n", vlr.state); |
| 1152 | vgic_irq_clear_active(vcpu, irq); |
| 1153 | vgic_update_state(vcpu->kvm); |
Pavel Fedin | 437f996 | 2015-09-25 17:00:29 +0300 | [diff] [blame] | 1154 | } else { |
| 1155 | WARN_ON(!vgic_dist_irq_is_pending(vcpu, irq)); |
Alex Bennée | 7176095 | 2015-03-13 17:02:53 +0000 | [diff] [blame] | 1156 | vlr.state |= LR_STATE_PENDING; |
| 1157 | kvm_debug("Set pending: 0x%x\n", vlr.state); |
| 1158 | } |
| 1159 | |
| 1160 | if (!vgic_irq_is_edge(vcpu, irq)) |
| 1161 | vlr.state |= LR_EOI_INT; |
| 1162 | |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1163 | if (vlr.irq >= VGIC_NR_SGIS) { |
| 1164 | struct irq_phys_map *map; |
| 1165 | map = vgic_irq_map_search(vcpu, irq); |
| 1166 | |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1167 | if (map) { |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1168 | vlr.hwirq = map->phys_irq; |
| 1169 | vlr.state |= LR_HW; |
| 1170 | vlr.state &= ~LR_EOI_INT; |
| 1171 | |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1172 | /* |
| 1173 | * Make sure we're not going to sample this |
| 1174 | * again, as a HW-backed interrupt cannot be |
| 1175 | * in the PENDING_ACTIVE stage. |
| 1176 | */ |
| 1177 | vgic_irq_set_queued(vcpu, irq); |
| 1178 | } |
| 1179 | } |
| 1180 | |
Alex Bennée | 7176095 | 2015-03-13 17:02:53 +0000 | [diff] [blame] | 1181 | vgic_set_lr(vcpu, lr_nr, vlr); |
Paolo Bonzini | bf0fb67 | 2015-04-07 18:09:20 +0200 | [diff] [blame] | 1182 | vgic_sync_lr_elrsr(vcpu, lr_nr, vlr); |
Alex Bennée | 7176095 | 2015-03-13 17:02:53 +0000 | [diff] [blame] | 1183 | } |
| 1184 | |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1185 | /* |
| 1186 | * Queue an interrupt to a CPU virtual interface. Return true on success, |
| 1187 | * or false if it wasn't possible to queue it. |
Andre Przywara | 1d91622 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 1188 | * sgi_source must be zero for any non-SGI interrupts. |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1189 | */ |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 1190 | bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq) |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1191 | { |
Marc Zyngier | 5fb66da | 2014-07-08 12:09:05 +0100 | [diff] [blame] | 1192 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1193 | u64 elrsr = vgic_get_elrsr(vcpu); |
| 1194 | unsigned long *elrsr_ptr = u64_to_bitmask(&elrsr); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1195 | struct vgic_lr vlr; |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1196 | int lr; |
| 1197 | |
| 1198 | /* Sanitize the input... */ |
| 1199 | BUG_ON(sgi_source_id & ~7); |
| 1200 | BUG_ON(sgi_source_id && irq >= VGIC_NR_SGIS); |
Marc Zyngier | 5fb66da | 2014-07-08 12:09:05 +0100 | [diff] [blame] | 1201 | BUG_ON(irq >= dist->nr_irqs); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1202 | |
| 1203 | kvm_debug("Queue IRQ%d\n", irq); |
| 1204 | |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1205 | /* Do we have an active interrupt for the same CPUID? */ |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1206 | for_each_clear_bit(lr, elrsr_ptr, vgic->nr_lr) { |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1207 | vlr = vgic_get_lr(vcpu, lr); |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1208 | if (vlr.irq == irq && vlr.source == sgi_source_id) { |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1209 | kvm_debug("LR%d piggyback for IRQ%d\n", lr, vlr.irq); |
Alex Bennée | 7176095 | 2015-03-13 17:02:53 +0000 | [diff] [blame] | 1210 | vgic_queue_irq_to_lr(vcpu, irq, lr, vlr); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1211 | return true; |
| 1212 | } |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1213 | } |
| 1214 | |
| 1215 | /* Try to use another LR for this interrupt */ |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1216 | lr = find_first_bit(elrsr_ptr, vgic->nr_lr); |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1217 | if (lr >= vgic->nr_lr) |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1218 | return false; |
| 1219 | |
| 1220 | kvm_debug("LR%d allocated for IRQ%d %x\n", lr, irq, sgi_source_id); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1221 | |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1222 | vlr.irq = irq; |
| 1223 | vlr.source = sgi_source_id; |
Alex Bennée | 7176095 | 2015-03-13 17:02:53 +0000 | [diff] [blame] | 1224 | vlr.state = 0; |
| 1225 | vgic_queue_irq_to_lr(vcpu, irq, lr, vlr); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1226 | |
| 1227 | return true; |
| 1228 | } |
| 1229 | |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1230 | static bool vgic_queue_hwirq(struct kvm_vcpu *vcpu, int irq) |
| 1231 | { |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 1232 | if (!vgic_can_sample_irq(vcpu, irq)) |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1233 | return true; /* level interrupt, already queued */ |
| 1234 | |
| 1235 | if (vgic_queue_irq(vcpu, 0, irq)) { |
| 1236 | if (vgic_irq_is_edge(vcpu, irq)) { |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 1237 | vgic_dist_irq_clear_pending(vcpu, irq); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1238 | vgic_cpu_irq_clear(vcpu, irq); |
| 1239 | } else { |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 1240 | vgic_irq_set_queued(vcpu, irq); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1241 | } |
| 1242 | |
| 1243 | return true; |
| 1244 | } |
| 1245 | |
| 1246 | return false; |
| 1247 | } |
| 1248 | |
| 1249 | /* |
| 1250 | * Fill the list registers with pending interrupts before running the |
| 1251 | * guest. |
| 1252 | */ |
| 1253 | static void __kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) |
| 1254 | { |
| 1255 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
| 1256 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1257 | unsigned long *pa_percpu, *pa_shared; |
Christoffer Dall | cff9211 | 2015-10-16 12:41:21 +0200 | [diff] [blame] | 1258 | int i, vcpu_id; |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1259 | int overflow = 0; |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1260 | int nr_shared = vgic_nr_shared_irqs(dist); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1261 | |
| 1262 | vcpu_id = vcpu->vcpu_id; |
| 1263 | |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1264 | pa_percpu = vcpu->arch.vgic_cpu.pend_act_percpu; |
| 1265 | pa_shared = vcpu->arch.vgic_cpu.pend_act_shared; |
| 1266 | |
| 1267 | bitmap_or(pa_percpu, vgic_cpu->pending_percpu, vgic_cpu->active_percpu, |
| 1268 | VGIC_NR_PRIVATE_IRQS); |
| 1269 | bitmap_or(pa_shared, vgic_cpu->pending_shared, vgic_cpu->active_shared, |
| 1270 | nr_shared); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1271 | /* |
| 1272 | * We may not have any pending interrupt, or the interrupts |
| 1273 | * may have been serviced from another vcpu. In all cases, |
| 1274 | * move along. |
| 1275 | */ |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1276 | if (!kvm_vgic_vcpu_pending_irq(vcpu) && !kvm_vgic_vcpu_active_irq(vcpu)) |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1277 | goto epilog; |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1278 | |
| 1279 | /* SGIs */ |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1280 | for_each_set_bit(i, pa_percpu, VGIC_NR_SGIS) { |
Andre Przywara | b26e5fd | 2014-06-02 16:19:12 +0200 | [diff] [blame] | 1281 | if (!queue_sgi(vcpu, i)) |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1282 | overflow = 1; |
| 1283 | } |
| 1284 | |
| 1285 | /* PPIs */ |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1286 | for_each_set_bit_from(i, pa_percpu, VGIC_NR_PRIVATE_IRQS) { |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1287 | if (!vgic_queue_hwirq(vcpu, i)) |
| 1288 | overflow = 1; |
| 1289 | } |
| 1290 | |
| 1291 | /* SPIs */ |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1292 | for_each_set_bit(i, pa_shared, nr_shared) { |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1293 | if (!vgic_queue_hwirq(vcpu, i + VGIC_NR_PRIVATE_IRQS)) |
| 1294 | overflow = 1; |
| 1295 | } |
| 1296 | |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1297 | |
| 1298 | |
| 1299 | |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1300 | epilog: |
| 1301 | if (overflow) { |
Marc Zyngier | 909d9b5 | 2013-06-04 11:24:17 +0100 | [diff] [blame] | 1302 | vgic_enable_underflow(vcpu); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1303 | } else { |
Marc Zyngier | 909d9b5 | 2013-06-04 11:24:17 +0100 | [diff] [blame] | 1304 | vgic_disable_underflow(vcpu); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1305 | /* |
| 1306 | * We're about to run this VCPU, and we've consumed |
| 1307 | * everything the distributor had in store for |
| 1308 | * us. Claim we don't have anything pending. We'll |
| 1309 | * adjust that if needed while exiting. |
| 1310 | */ |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1311 | clear_bit(vcpu_id, dist->irq_pending_on_cpu); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1312 | } |
| 1313 | } |
| 1314 | |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1315 | static int process_queued_irq(struct kvm_vcpu *vcpu, |
| 1316 | int lr, struct vgic_lr vlr) |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1317 | { |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1318 | int pending = 0; |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1319 | |
| 1320 | /* |
| 1321 | * If the IRQ was EOIed (called from vgic_process_maintenance) or it |
| 1322 | * went from active to non-active (called from vgic_sync_hwirq) it was |
| 1323 | * also ACKed and we we therefore assume we can clear the soft pending |
| 1324 | * state (should it had been set) for this interrupt. |
| 1325 | * |
| 1326 | * Note: if the IRQ soft pending state was set after the IRQ was |
| 1327 | * acked, it actually shouldn't be cleared, but we have no way of |
| 1328 | * knowing that unless we start trapping ACKs when the soft-pending |
| 1329 | * state is set. |
| 1330 | */ |
| 1331 | vgic_dist_irq_clear_soft_pend(vcpu, vlr.irq); |
| 1332 | |
| 1333 | /* |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1334 | * Tell the gic to start sampling this interrupt again. |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1335 | */ |
| 1336 | vgic_irq_clear_queued(vcpu, vlr.irq); |
| 1337 | |
| 1338 | /* Any additional pending interrupt? */ |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1339 | if (vgic_irq_is_edge(vcpu, vlr.irq)) { |
| 1340 | BUG_ON(!(vlr.state & LR_HW)); |
| 1341 | pending = vgic_dist_irq_is_pending(vcpu, vlr.irq); |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1342 | } else { |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1343 | if (vgic_dist_irq_get_level(vcpu, vlr.irq)) { |
| 1344 | vgic_cpu_irq_set(vcpu, vlr.irq); |
| 1345 | pending = 1; |
| 1346 | } else { |
| 1347 | vgic_dist_irq_clear_pending(vcpu, vlr.irq); |
| 1348 | vgic_cpu_irq_clear(vcpu, vlr.irq); |
| 1349 | } |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1350 | } |
| 1351 | |
| 1352 | /* |
| 1353 | * Despite being EOIed, the LR may not have |
| 1354 | * been marked as empty. |
| 1355 | */ |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1356 | vlr.state = 0; |
| 1357 | vlr.hwirq = 0; |
| 1358 | vgic_set_lr(vcpu, lr, vlr); |
| 1359 | |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1360 | vgic_sync_lr_elrsr(vcpu, lr, vlr); |
| 1361 | |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1362 | return pending; |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1363 | } |
| 1364 | |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1365 | static bool vgic_process_maintenance(struct kvm_vcpu *vcpu) |
| 1366 | { |
Marc Zyngier | 495dd85 | 2013-06-04 11:02:10 +0100 | [diff] [blame] | 1367 | u32 status = vgic_get_interrupt_status(vcpu); |
Eric Auger | 649cf73 | 2015-03-04 11:14:35 +0100 | [diff] [blame] | 1368 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 1369 | struct kvm *kvm = vcpu->kvm; |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1370 | int level_pending = 0; |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1371 | |
Marc Zyngier | 495dd85 | 2013-06-04 11:02:10 +0100 | [diff] [blame] | 1372 | kvm_debug("STATUS = %08x\n", status); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1373 | |
Marc Zyngier | 495dd85 | 2013-06-04 11:02:10 +0100 | [diff] [blame] | 1374 | if (status & INT_STATUS_EOI) { |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1375 | /* |
| 1376 | * Some level interrupts have been EOIed. Clear their |
| 1377 | * active bit. |
| 1378 | */ |
Marc Zyngier | 8d6a031 | 2013-06-04 10:33:43 +0100 | [diff] [blame] | 1379 | u64 eisr = vgic_get_eisr(vcpu); |
Christoffer Dall | 2df36a5 | 2014-09-28 16:04:26 +0200 | [diff] [blame] | 1380 | unsigned long *eisr_ptr = u64_to_bitmask(&eisr); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1381 | int lr; |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1382 | |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1383 | for_each_set_bit(lr, eisr_ptr, vgic->nr_lr) { |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1384 | struct vgic_lr vlr = vgic_get_lr(vcpu, lr); |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1385 | |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1386 | WARN_ON(vgic_irq_is_edge(vcpu, vlr.irq)); |
Marc Zyngier | 8d5c6b0 | 2013-06-03 15:55:02 +0100 | [diff] [blame] | 1387 | WARN_ON(vlr.state & LR_STATE_MASK); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1388 | |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1389 | |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 1390 | /* |
| 1391 | * kvm_notify_acked_irq calls kvm_set_irq() |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1392 | * to reset the IRQ level, which grabs the dist->lock |
| 1393 | * so we call this before taking the dist->lock. |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 1394 | */ |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 1395 | kvm_notify_acked_irq(kvm, 0, |
| 1396 | vlr.irq - VGIC_NR_PRIVATE_IRQS); |
Christoffer Dall | 9103617 | 2015-08-25 22:50:57 +0200 | [diff] [blame] | 1397 | |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 1398 | spin_lock(&dist->lock); |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1399 | level_pending |= process_queued_irq(vcpu, lr, vlr); |
Eric Auger | 649cf73 | 2015-03-04 11:14:35 +0100 | [diff] [blame] | 1400 | spin_unlock(&dist->lock); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1401 | } |
| 1402 | } |
| 1403 | |
Marc Zyngier | 495dd85 | 2013-06-04 11:02:10 +0100 | [diff] [blame] | 1404 | if (status & INT_STATUS_UNDERFLOW) |
Marc Zyngier | 909d9b5 | 2013-06-04 11:24:17 +0100 | [diff] [blame] | 1405 | vgic_disable_underflow(vcpu); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1406 | |
Christoffer Dall | ae70593 | 2015-03-13 17:02:56 +0000 | [diff] [blame] | 1407 | /* |
| 1408 | * In the next iterations of the vcpu loop, if we sync the vgic state |
| 1409 | * after flushing it, but before entering the guest (this happens for |
| 1410 | * pending signals and vmid rollovers), then make sure we don't pick |
| 1411 | * up any old maintenance interrupts here. |
| 1412 | */ |
| 1413 | vgic_clear_eisr(vcpu); |
| 1414 | |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1415 | return level_pending; |
| 1416 | } |
| 1417 | |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1418 | /* |
| 1419 | * Save the physical active state, and reset it to inactive. |
| 1420 | * |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1421 | * Return true if there's a pending forwarded interrupt to queue. |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1422 | */ |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 1423 | static bool vgic_sync_hwirq(struct kvm_vcpu *vcpu, int lr, struct vgic_lr vlr) |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1424 | { |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 1425 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1426 | struct irq_phys_map *map; |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 1427 | bool phys_active; |
| 1428 | bool level_pending; |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1429 | int ret; |
| 1430 | |
| 1431 | if (!(vlr.state & LR_HW)) |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 1432 | return false; |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1433 | |
| 1434 | map = vgic_irq_map_search(vcpu, vlr.irq); |
Christoffer Dall | 544c572 | 2015-10-17 17:55:12 +0200 | [diff] [blame] | 1435 | BUG_ON(!map); |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1436 | |
| 1437 | ret = irq_get_irqchip_state(map->irq, |
| 1438 | IRQCHIP_STATE_ACTIVE, |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 1439 | &phys_active); |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1440 | |
| 1441 | WARN_ON(ret); |
| 1442 | |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 1443 | if (phys_active) |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1444 | return 0; |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1445 | |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 1446 | spin_lock(&dist->lock); |
Christoffer Dall | 8fe2f19 | 2015-09-04 21:25:12 +0200 | [diff] [blame] | 1447 | level_pending = process_queued_irq(vcpu, lr, vlr); |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 1448 | spin_unlock(&dist->lock); |
| 1449 | return level_pending; |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1450 | } |
| 1451 | |
Eric Auger | 649cf73 | 2015-03-04 11:14:35 +0100 | [diff] [blame] | 1452 | /* Sync back the VGIC state after a guest run */ |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1453 | static void __kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) |
| 1454 | { |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1455 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
Marc Zyngier | 69bb2c9 | 2013-06-04 10:29:39 +0100 | [diff] [blame] | 1456 | u64 elrsr; |
| 1457 | unsigned long *elrsr_ptr; |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1458 | int lr, pending; |
| 1459 | bool level_pending; |
| 1460 | |
| 1461 | level_pending = vgic_process_maintenance(vcpu); |
Marc Zyngier | 69bb2c9 | 2013-06-04 10:29:39 +0100 | [diff] [blame] | 1462 | elrsr = vgic_get_elrsr(vcpu); |
Christoffer Dall | 2df36a5 | 2014-09-28 16:04:26 +0200 | [diff] [blame] | 1463 | elrsr_ptr = u64_to_bitmask(&elrsr); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1464 | |
Marc Zyngier | 08fd646 | 2015-06-08 16:06:13 +0100 | [diff] [blame] | 1465 | /* Deal with HW interrupts, and clear mappings for empty LRs */ |
| 1466 | for (lr = 0; lr < vgic->nr_lr; lr++) { |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1467 | struct vgic_lr vlr = vgic_get_lr(vcpu, lr); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1468 | |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1469 | level_pending |= vgic_sync_hwirq(vcpu, lr, vlr); |
Marc Zyngier | 5fb66da | 2014-07-08 12:09:05 +0100 | [diff] [blame] | 1470 | BUG_ON(vlr.irq >= dist->nr_irqs); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1471 | } |
| 1472 | |
| 1473 | /* Check if we still have something up our sleeve... */ |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1474 | pending = find_first_zero_bit(elrsr_ptr, vgic->nr_lr); |
| 1475 | if (level_pending || pending < vgic->nr_lr) |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1476 | set_bit(vcpu->vcpu_id, dist->irq_pending_on_cpu); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1477 | } |
| 1478 | |
| 1479 | void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) |
| 1480 | { |
| 1481 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 1482 | |
| 1483 | if (!irqchip_in_kernel(vcpu->kvm)) |
| 1484 | return; |
| 1485 | |
| 1486 | spin_lock(&dist->lock); |
| 1487 | __kvm_vgic_flush_hwstate(vcpu); |
| 1488 | spin_unlock(&dist->lock); |
| 1489 | } |
| 1490 | |
| 1491 | void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) |
| 1492 | { |
| 1493 | if (!irqchip_in_kernel(vcpu->kvm)) |
| 1494 | return; |
| 1495 | |
| 1496 | __kvm_vgic_sync_hwstate(vcpu); |
| 1497 | } |
| 1498 | |
| 1499 | int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu) |
| 1500 | { |
| 1501 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 1502 | |
| 1503 | if (!irqchip_in_kernel(vcpu->kvm)) |
| 1504 | return 0; |
| 1505 | |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1506 | return test_bit(vcpu->vcpu_id, dist->irq_pending_on_cpu); |
Marc Zyngier | 9d949dc | 2013-01-21 19:36:14 -0500 | [diff] [blame] | 1507 | } |
| 1508 | |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1509 | int kvm_vgic_vcpu_active_irq(struct kvm_vcpu *vcpu) |
| 1510 | { |
| 1511 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 1512 | |
| 1513 | if (!irqchip_in_kernel(vcpu->kvm)) |
| 1514 | return 0; |
| 1515 | |
| 1516 | return test_bit(vcpu->vcpu_id, dist->irq_active_on_cpu); |
| 1517 | } |
| 1518 | |
| 1519 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 1520 | void vgic_kick_vcpus(struct kvm *kvm) |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1521 | { |
| 1522 | struct kvm_vcpu *vcpu; |
| 1523 | int c; |
| 1524 | |
| 1525 | /* |
| 1526 | * We've injected an interrupt, time to find out who deserves |
| 1527 | * a good kick... |
| 1528 | */ |
| 1529 | kvm_for_each_vcpu(c, vcpu, kvm) { |
| 1530 | if (kvm_vgic_vcpu_pending_irq(vcpu)) |
| 1531 | kvm_vcpu_kick(vcpu); |
| 1532 | } |
| 1533 | } |
| 1534 | |
| 1535 | static int vgic_validate_injection(struct kvm_vcpu *vcpu, int irq, int level) |
| 1536 | { |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 1537 | int edge_triggered = vgic_irq_is_edge(vcpu, irq); |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1538 | |
| 1539 | /* |
| 1540 | * Only inject an interrupt if: |
| 1541 | * - edge triggered and we have a rising edge |
| 1542 | * - level triggered and we change level |
| 1543 | */ |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1544 | if (edge_triggered) { |
| 1545 | int state = vgic_dist_irq_is_pending(vcpu, irq); |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1546 | return level > state; |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1547 | } else { |
| 1548 | int state = vgic_dist_irq_get_level(vcpu, irq); |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1549 | return level != state; |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1550 | } |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1551 | } |
| 1552 | |
Shannon Zhao | 016ed39 | 2014-11-19 10:11:25 +0000 | [diff] [blame] | 1553 | static int vgic_update_irq_pending(struct kvm *kvm, int cpuid, |
Marc Zyngier | 773299a | 2015-07-24 11:30:43 +0100 | [diff] [blame] | 1554 | struct irq_phys_map *map, |
| 1555 | unsigned int irq_num, bool level) |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1556 | { |
| 1557 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 1558 | struct kvm_vcpu *vcpu; |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 1559 | int edge_triggered, level_triggered; |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1560 | int enabled; |
Andre Przywara | a0675c2 | 2014-06-07 00:54:51 +0200 | [diff] [blame] | 1561 | bool ret = true, can_inject = true; |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1562 | |
Christoffer Dall | e21f091 | 2015-08-30 13:57:20 +0200 | [diff] [blame] | 1563 | trace_vgic_update_irq_pending(cpuid, irq_num, level); |
| 1564 | |
Marc Zyngier | 773299a | 2015-07-24 11:30:43 +0100 | [diff] [blame] | 1565 | if (irq_num >= min(kvm->arch.vgic.nr_irqs, 1020)) |
| 1566 | return -EINVAL; |
| 1567 | |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1568 | spin_lock(&dist->lock); |
| 1569 | |
| 1570 | vcpu = kvm_get_vcpu(kvm, cpuid); |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 1571 | edge_triggered = vgic_irq_is_edge(vcpu, irq_num); |
| 1572 | level_triggered = !edge_triggered; |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1573 | |
| 1574 | if (!vgic_validate_injection(vcpu, irq_num, level)) { |
| 1575 | ret = false; |
| 1576 | goto out; |
| 1577 | } |
| 1578 | |
| 1579 | if (irq_num >= VGIC_NR_PRIVATE_IRQS) { |
| 1580 | cpuid = dist->irq_spi_cpu[irq_num - VGIC_NR_PRIVATE_IRQS]; |
Andre Przywara | a0675c2 | 2014-06-07 00:54:51 +0200 | [diff] [blame] | 1581 | if (cpuid == VCPU_NOT_ALLOCATED) { |
| 1582 | /* Pretend we use CPU0, and prevent injection */ |
| 1583 | cpuid = 0; |
| 1584 | can_inject = false; |
| 1585 | } |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1586 | vcpu = kvm_get_vcpu(kvm, cpuid); |
| 1587 | } |
| 1588 | |
| 1589 | kvm_debug("Inject IRQ%d level %d CPU%d\n", irq_num, level, cpuid); |
| 1590 | |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1591 | if (level) { |
| 1592 | if (level_triggered) |
| 1593 | vgic_dist_irq_set_level(vcpu, irq_num); |
Christoffer Dall | 227844f | 2014-06-09 12:27:18 +0200 | [diff] [blame] | 1594 | vgic_dist_irq_set_pending(vcpu, irq_num); |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1595 | } else { |
| 1596 | if (level_triggered) { |
| 1597 | vgic_dist_irq_clear_level(vcpu, irq_num); |
Pavel Fedin | 437f996 | 2015-09-25 17:00:29 +0300 | [diff] [blame] | 1598 | if (!vgic_dist_irq_soft_pend(vcpu, irq_num)) { |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1599 | vgic_dist_irq_clear_pending(vcpu, irq_num); |
Pavel Fedin | 437f996 | 2015-09-25 17:00:29 +0300 | [diff] [blame] | 1600 | vgic_cpu_irq_clear(vcpu, irq_num); |
| 1601 | if (!compute_pending_for_cpu(vcpu)) |
| 1602 | clear_bit(cpuid, dist->irq_pending_on_cpu); |
| 1603 | } |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1604 | } |
wanghaibin | 7d39f9e3 | 2014-11-17 09:27:37 +0000 | [diff] [blame] | 1605 | |
| 1606 | ret = false; |
| 1607 | goto out; |
Christoffer Dall | faa1b46 | 2014-06-14 21:54:51 +0200 | [diff] [blame] | 1608 | } |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1609 | |
| 1610 | enabled = vgic_irq_is_enabled(vcpu, irq_num); |
| 1611 | |
Andre Przywara | a0675c2 | 2014-06-07 00:54:51 +0200 | [diff] [blame] | 1612 | if (!enabled || !can_inject) { |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1613 | ret = false; |
| 1614 | goto out; |
| 1615 | } |
| 1616 | |
Christoffer Dall | dbf20f9 | 2014-06-09 12:55:13 +0200 | [diff] [blame] | 1617 | if (!vgic_can_sample_irq(vcpu, irq_num)) { |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1618 | /* |
| 1619 | * Level interrupt in progress, will be picked up |
| 1620 | * when EOId. |
| 1621 | */ |
| 1622 | ret = false; |
| 1623 | goto out; |
| 1624 | } |
| 1625 | |
| 1626 | if (level) { |
| 1627 | vgic_cpu_irq_set(vcpu, irq_num); |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1628 | set_bit(cpuid, dist->irq_pending_on_cpu); |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1629 | } |
| 1630 | |
| 1631 | out: |
| 1632 | spin_unlock(&dist->lock); |
| 1633 | |
Marc Zyngier | 773299a | 2015-07-24 11:30:43 +0100 | [diff] [blame] | 1634 | if (ret) { |
| 1635 | /* kick the specified vcpu */ |
| 1636 | kvm_vcpu_kick(kvm_get_vcpu(kvm, cpuid)); |
| 1637 | } |
| 1638 | |
| 1639 | return 0; |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1640 | } |
| 1641 | |
Marc Zyngier | 773299a | 2015-07-24 11:30:43 +0100 | [diff] [blame] | 1642 | static int vgic_lazy_init(struct kvm *kvm) |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1643 | { |
Christoffer Dall | ca7d9c8 | 2014-12-09 14:35:33 +0100 | [diff] [blame] | 1644 | int ret = 0; |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1645 | |
Christoffer Dall | ca7d9c8 | 2014-12-09 14:35:33 +0100 | [diff] [blame] | 1646 | if (unlikely(!vgic_initialized(kvm))) { |
Andre Przywara | 59892136 | 2014-06-03 09:33:10 +0200 | [diff] [blame] | 1647 | /* |
| 1648 | * We only provide the automatic initialization of the VGIC |
| 1649 | * for the legacy case of a GICv2. Any other type must |
| 1650 | * be explicitly initialized once setup with the respective |
| 1651 | * KVM device call. |
| 1652 | */ |
Marc Zyngier | 773299a | 2015-07-24 11:30:43 +0100 | [diff] [blame] | 1653 | if (kvm->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V2) |
| 1654 | return -EBUSY; |
| 1655 | |
Christoffer Dall | ca7d9c8 | 2014-12-09 14:35:33 +0100 | [diff] [blame] | 1656 | mutex_lock(&kvm->lock); |
| 1657 | ret = vgic_init(kvm); |
| 1658 | mutex_unlock(&kvm->lock); |
Shannon Zhao | 016ed39 | 2014-11-19 10:11:25 +0000 | [diff] [blame] | 1659 | } |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1660 | |
Marc Zyngier | 773299a | 2015-07-24 11:30:43 +0100 | [diff] [blame] | 1661 | return ret; |
| 1662 | } |
| 1663 | |
| 1664 | /** |
| 1665 | * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic |
| 1666 | * @kvm: The VM structure pointer |
| 1667 | * @cpuid: The CPU for PPIs |
| 1668 | * @irq_num: The IRQ number that is assigned to the device. This IRQ |
| 1669 | * must not be mapped to a HW interrupt. |
| 1670 | * @level: Edge-triggered: true: to trigger the interrupt |
| 1671 | * false: to ignore the call |
| 1672 | * Level-sensitive true: raise the input signal |
| 1673 | * false: lower the input signal |
| 1674 | * |
| 1675 | * The GIC is not concerned with devices being active-LOW or active-HIGH for |
| 1676 | * level-sensitive interrupts. You can think of the level parameter as 1 |
| 1677 | * being HIGH and 0 being LOW and all devices being active-HIGH. |
| 1678 | */ |
| 1679 | int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int irq_num, |
| 1680 | bool level) |
| 1681 | { |
| 1682 | struct irq_phys_map *map; |
| 1683 | int ret; |
| 1684 | |
| 1685 | ret = vgic_lazy_init(kvm); |
| 1686 | if (ret) |
| 1687 | return ret; |
| 1688 | |
| 1689 | map = vgic_irq_map_search(kvm_get_vcpu(kvm, cpuid), irq_num); |
| 1690 | if (map) |
Andre Przywara | fd1d0dd | 2015-04-10 16:17:59 +0100 | [diff] [blame] | 1691 | return -EINVAL; |
| 1692 | |
Marc Zyngier | 773299a | 2015-07-24 11:30:43 +0100 | [diff] [blame] | 1693 | return vgic_update_irq_pending(kvm, cpuid, NULL, irq_num, level); |
| 1694 | } |
Christoffer Dall | ca7d9c8 | 2014-12-09 14:35:33 +0100 | [diff] [blame] | 1695 | |
Marc Zyngier | 773299a | 2015-07-24 11:30:43 +0100 | [diff] [blame] | 1696 | /** |
| 1697 | * kvm_vgic_inject_mapped_irq - Inject a physically mapped IRQ to the vgic |
| 1698 | * @kvm: The VM structure pointer |
| 1699 | * @cpuid: The CPU for PPIs |
| 1700 | * @map: Pointer to a irq_phys_map structure describing the mapping |
| 1701 | * @level: Edge-triggered: true: to trigger the interrupt |
| 1702 | * false: to ignore the call |
| 1703 | * Level-sensitive true: raise the input signal |
| 1704 | * false: lower the input signal |
| 1705 | * |
| 1706 | * The GIC is not concerned with devices being active-LOW or active-HIGH for |
| 1707 | * level-sensitive interrupts. You can think of the level parameter as 1 |
| 1708 | * being HIGH and 0 being LOW and all devices being active-HIGH. |
| 1709 | */ |
| 1710 | int kvm_vgic_inject_mapped_irq(struct kvm *kvm, int cpuid, |
| 1711 | struct irq_phys_map *map, bool level) |
| 1712 | { |
| 1713 | int ret; |
| 1714 | |
| 1715 | ret = vgic_lazy_init(kvm); |
| 1716 | if (ret) |
| 1717 | return ret; |
| 1718 | |
| 1719 | return vgic_update_irq_pending(kvm, cpuid, map, map->virt_irq, level); |
Marc Zyngier | 5863c2c | 2013-01-21 19:36:15 -0500 | [diff] [blame] | 1720 | } |
| 1721 | |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 1722 | static irqreturn_t vgic_maintenance_handler(int irq, void *data) |
| 1723 | { |
| 1724 | /* |
| 1725 | * We cannot rely on the vgic maintenance interrupt to be |
| 1726 | * delivered synchronously. This means we can only use it to |
| 1727 | * exit the VM, and we perform the handling of EOIed |
| 1728 | * interrupts on the exit path (see vgic_process_maintenance). |
| 1729 | */ |
| 1730 | return IRQ_HANDLED; |
| 1731 | } |
| 1732 | |
Marc Zyngier | 6c3d63c | 2014-06-23 17:37:18 +0100 | [diff] [blame] | 1733 | static struct list_head *vgic_get_irq_phys_map_list(struct kvm_vcpu *vcpu, |
| 1734 | int virt_irq) |
| 1735 | { |
| 1736 | if (virt_irq < VGIC_NR_PRIVATE_IRQS) |
| 1737 | return &vcpu->arch.vgic_cpu.irq_phys_map_list; |
| 1738 | else |
| 1739 | return &vcpu->kvm->arch.vgic.irq_phys_map_list; |
| 1740 | } |
| 1741 | |
| 1742 | /** |
| 1743 | * kvm_vgic_map_phys_irq - map a virtual IRQ to a physical IRQ |
| 1744 | * @vcpu: The VCPU pointer |
| 1745 | * @virt_irq: The virtual irq number |
| 1746 | * @irq: The Linux IRQ number |
| 1747 | * |
| 1748 | * Establish a mapping between a guest visible irq (@virt_irq) and a |
| 1749 | * Linux irq (@irq). On injection, @virt_irq will be associated with |
| 1750 | * the physical interrupt represented by @irq. This mapping can be |
| 1751 | * established multiple times as long as the parameters are the same. |
| 1752 | * |
| 1753 | * Returns a valid pointer on success, and an error pointer otherwise |
| 1754 | */ |
| 1755 | struct irq_phys_map *kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, |
| 1756 | int virt_irq, int irq) |
| 1757 | { |
| 1758 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 1759 | struct list_head *root = vgic_get_irq_phys_map_list(vcpu, virt_irq); |
| 1760 | struct irq_phys_map *map; |
| 1761 | struct irq_phys_map_entry *entry; |
| 1762 | struct irq_desc *desc; |
| 1763 | struct irq_data *data; |
| 1764 | int phys_irq; |
| 1765 | |
| 1766 | desc = irq_to_desc(irq); |
| 1767 | if (!desc) { |
| 1768 | kvm_err("%s: no interrupt descriptor\n", __func__); |
| 1769 | return ERR_PTR(-EINVAL); |
| 1770 | } |
| 1771 | |
| 1772 | data = irq_desc_get_irq_data(desc); |
| 1773 | while (data->parent_data) |
| 1774 | data = data->parent_data; |
| 1775 | |
| 1776 | phys_irq = data->hwirq; |
| 1777 | |
| 1778 | /* Create a new mapping */ |
| 1779 | entry = kzalloc(sizeof(*entry), GFP_KERNEL); |
| 1780 | if (!entry) |
| 1781 | return ERR_PTR(-ENOMEM); |
| 1782 | |
| 1783 | spin_lock(&dist->irq_phys_map_lock); |
| 1784 | |
| 1785 | /* Try to match an existing mapping */ |
| 1786 | map = vgic_irq_map_search(vcpu, virt_irq); |
| 1787 | if (map) { |
| 1788 | /* Make sure this mapping matches */ |
| 1789 | if (map->phys_irq != phys_irq || |
| 1790 | map->irq != irq) |
| 1791 | map = ERR_PTR(-EINVAL); |
| 1792 | |
| 1793 | /* Found an existing, valid mapping */ |
| 1794 | goto out; |
| 1795 | } |
| 1796 | |
| 1797 | map = &entry->map; |
| 1798 | map->virt_irq = virt_irq; |
| 1799 | map->phys_irq = phys_irq; |
| 1800 | map->irq = irq; |
| 1801 | |
| 1802 | list_add_tail_rcu(&entry->entry, root); |
| 1803 | |
| 1804 | out: |
| 1805 | spin_unlock(&dist->irq_phys_map_lock); |
| 1806 | /* If we've found a hit in the existing list, free the useless |
| 1807 | * entry */ |
| 1808 | if (IS_ERR(map) || map != &entry->map) |
| 1809 | kfree(entry); |
| 1810 | return map; |
| 1811 | } |
| 1812 | |
| 1813 | static struct irq_phys_map *vgic_irq_map_search(struct kvm_vcpu *vcpu, |
| 1814 | int virt_irq) |
| 1815 | { |
| 1816 | struct list_head *root = vgic_get_irq_phys_map_list(vcpu, virt_irq); |
| 1817 | struct irq_phys_map_entry *entry; |
| 1818 | struct irq_phys_map *map; |
| 1819 | |
| 1820 | rcu_read_lock(); |
| 1821 | |
| 1822 | list_for_each_entry_rcu(entry, root, entry) { |
| 1823 | map = &entry->map; |
| 1824 | if (map->virt_irq == virt_irq) { |
| 1825 | rcu_read_unlock(); |
| 1826 | return map; |
| 1827 | } |
| 1828 | } |
| 1829 | |
| 1830 | rcu_read_unlock(); |
| 1831 | |
| 1832 | return NULL; |
| 1833 | } |
| 1834 | |
| 1835 | static void vgic_free_phys_irq_map_rcu(struct rcu_head *rcu) |
| 1836 | { |
| 1837 | struct irq_phys_map_entry *entry; |
| 1838 | |
| 1839 | entry = container_of(rcu, struct irq_phys_map_entry, rcu); |
| 1840 | kfree(entry); |
| 1841 | } |
| 1842 | |
| 1843 | /** |
| 1844 | * kvm_vgic_unmap_phys_irq - Remove a virtual to physical IRQ mapping |
| 1845 | * @vcpu: The VCPU pointer |
| 1846 | * @map: The pointer to a mapping obtained through kvm_vgic_map_phys_irq |
| 1847 | * |
| 1848 | * Remove an existing mapping between virtual and physical interrupts. |
| 1849 | */ |
| 1850 | int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, struct irq_phys_map *map) |
| 1851 | { |
| 1852 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
| 1853 | struct irq_phys_map_entry *entry; |
| 1854 | struct list_head *root; |
| 1855 | |
| 1856 | if (!map) |
| 1857 | return -EINVAL; |
| 1858 | |
| 1859 | root = vgic_get_irq_phys_map_list(vcpu, map->virt_irq); |
| 1860 | |
| 1861 | spin_lock(&dist->irq_phys_map_lock); |
| 1862 | |
| 1863 | list_for_each_entry(entry, root, entry) { |
| 1864 | if (&entry->map == map) { |
| 1865 | list_del_rcu(&entry->entry); |
| 1866 | call_rcu(&entry->rcu, vgic_free_phys_irq_map_rcu); |
| 1867 | break; |
| 1868 | } |
| 1869 | } |
| 1870 | |
| 1871 | spin_unlock(&dist->irq_phys_map_lock); |
| 1872 | |
| 1873 | return 0; |
| 1874 | } |
| 1875 | |
| 1876 | static void vgic_destroy_irq_phys_map(struct kvm *kvm, struct list_head *root) |
| 1877 | { |
| 1878 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 1879 | struct irq_phys_map_entry *entry; |
| 1880 | |
| 1881 | spin_lock(&dist->irq_phys_map_lock); |
| 1882 | |
| 1883 | list_for_each_entry(entry, root, entry) { |
| 1884 | list_del_rcu(&entry->entry); |
| 1885 | call_rcu(&entry->rcu, vgic_free_phys_irq_map_rcu); |
| 1886 | } |
| 1887 | |
| 1888 | spin_unlock(&dist->irq_phys_map_lock); |
| 1889 | } |
| 1890 | |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1891 | void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu) |
| 1892 | { |
| 1893 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
| 1894 | |
| 1895 | kfree(vgic_cpu->pending_shared); |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1896 | kfree(vgic_cpu->active_shared); |
| 1897 | kfree(vgic_cpu->pend_act_shared); |
Marc Zyngier | 6c3d63c | 2014-06-23 17:37:18 +0100 | [diff] [blame] | 1898 | vgic_destroy_irq_phys_map(vcpu->kvm, &vgic_cpu->irq_phys_map_list); |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1899 | vgic_cpu->pending_shared = NULL; |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1900 | vgic_cpu->active_shared = NULL; |
| 1901 | vgic_cpu->pend_act_shared = NULL; |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1902 | } |
| 1903 | |
| 1904 | static int vgic_vcpu_init_maps(struct kvm_vcpu *vcpu, int nr_irqs) |
| 1905 | { |
| 1906 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
| 1907 | |
| 1908 | int sz = (nr_irqs - VGIC_NR_PRIVATE_IRQS) / 8; |
| 1909 | vgic_cpu->pending_shared = kzalloc(sz, GFP_KERNEL); |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1910 | vgic_cpu->active_shared = kzalloc(sz, GFP_KERNEL); |
| 1911 | vgic_cpu->pend_act_shared = kzalloc(sz, GFP_KERNEL); |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1912 | |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1913 | if (!vgic_cpu->pending_shared |
| 1914 | || !vgic_cpu->active_shared |
Pavel Fedin | c4cd4c1 | 2015-10-27 11:37:29 +0300 | [diff] [blame^] | 1915 | || !vgic_cpu->pend_act_shared) { |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1916 | kvm_vgic_vcpu_destroy(vcpu); |
| 1917 | return -ENOMEM; |
| 1918 | } |
| 1919 | |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 1920 | /* |
Marc Zyngier | ca85f62 | 2013-06-18 19:17:28 +0100 | [diff] [blame] | 1921 | * Store the number of LRs per vcpu, so we don't have to go |
| 1922 | * all the way to the distributor structure to find out. Only |
| 1923 | * assembly code should use this one. |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 1924 | */ |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 1925 | vgic_cpu->nr_lr = vgic->nr_lr; |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 1926 | |
Peter Maydell | 6d3cfbe | 2014-12-04 15:02:24 +0000 | [diff] [blame] | 1927 | return 0; |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 1928 | } |
| 1929 | |
Andre Przywara | 3caa2d8 | 2014-06-02 16:26:01 +0200 | [diff] [blame] | 1930 | /** |
Marc Zyngier | 6c3d63c | 2014-06-23 17:37:18 +0100 | [diff] [blame] | 1931 | * kvm_vgic_vcpu_early_init - Earliest possible per-vcpu vgic init stage |
| 1932 | * |
| 1933 | * No memory allocation should be performed here, only static init. |
| 1934 | */ |
| 1935 | void kvm_vgic_vcpu_early_init(struct kvm_vcpu *vcpu) |
| 1936 | { |
| 1937 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
| 1938 | INIT_LIST_HEAD(&vgic_cpu->irq_phys_map_list); |
| 1939 | } |
| 1940 | |
| 1941 | /** |
Andre Przywara | 3caa2d8 | 2014-06-02 16:26:01 +0200 | [diff] [blame] | 1942 | * kvm_vgic_get_max_vcpus - Get the maximum number of VCPUs allowed by HW |
| 1943 | * |
| 1944 | * The host's GIC naturally limits the maximum amount of VCPUs a guest |
| 1945 | * can use. |
| 1946 | */ |
| 1947 | int kvm_vgic_get_max_vcpus(void) |
| 1948 | { |
| 1949 | return vgic->max_gic_vcpus; |
| 1950 | } |
| 1951 | |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1952 | void kvm_vgic_destroy(struct kvm *kvm) |
| 1953 | { |
| 1954 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 1955 | struct kvm_vcpu *vcpu; |
| 1956 | int i; |
| 1957 | |
| 1958 | kvm_for_each_vcpu(i, vcpu, kvm) |
| 1959 | kvm_vgic_vcpu_destroy(vcpu); |
| 1960 | |
| 1961 | vgic_free_bitmap(&dist->irq_enabled); |
| 1962 | vgic_free_bitmap(&dist->irq_level); |
| 1963 | vgic_free_bitmap(&dist->irq_pending); |
| 1964 | vgic_free_bitmap(&dist->irq_soft_pend); |
| 1965 | vgic_free_bitmap(&dist->irq_queued); |
| 1966 | vgic_free_bitmap(&dist->irq_cfg); |
| 1967 | vgic_free_bytemap(&dist->irq_priority); |
| 1968 | if (dist->irq_spi_target) { |
| 1969 | for (i = 0; i < dist->nr_cpus; i++) |
| 1970 | vgic_free_bitmap(&dist->irq_spi_target[i]); |
| 1971 | } |
| 1972 | kfree(dist->irq_sgi_sources); |
| 1973 | kfree(dist->irq_spi_cpu); |
Andre Przywara | a0675c2 | 2014-06-07 00:54:51 +0200 | [diff] [blame] | 1974 | kfree(dist->irq_spi_mpidr); |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1975 | kfree(dist->irq_spi_target); |
| 1976 | kfree(dist->irq_pending_on_cpu); |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1977 | kfree(dist->irq_active_on_cpu); |
Marc Zyngier | 6c3d63c | 2014-06-23 17:37:18 +0100 | [diff] [blame] | 1978 | vgic_destroy_irq_phys_map(kvm, &dist->irq_phys_map_list); |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1979 | dist->irq_sgi_sources = NULL; |
| 1980 | dist->irq_spi_cpu = NULL; |
| 1981 | dist->irq_spi_target = NULL; |
| 1982 | dist->irq_pending_on_cpu = NULL; |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 1983 | dist->irq_active_on_cpu = NULL; |
Christoffer Dall | 1f57be2 | 2014-12-09 14:30:36 +0100 | [diff] [blame] | 1984 | dist->nr_cpus = 0; |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1985 | } |
| 1986 | |
| 1987 | /* |
| 1988 | * Allocate and initialize the various data structures. Must be called |
| 1989 | * with kvm->lock held! |
| 1990 | */ |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 1991 | int vgic_init(struct kvm *kvm) |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1992 | { |
| 1993 | struct vgic_dist *dist = &kvm->arch.vgic; |
| 1994 | struct kvm_vcpu *vcpu; |
| 1995 | int nr_cpus, nr_irqs; |
Peter Maydell | 6d3cfbe | 2014-12-04 15:02:24 +0000 | [diff] [blame] | 1996 | int ret, i, vcpu_id; |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 1997 | |
Christoffer Dall | 1f57be2 | 2014-12-09 14:30:36 +0100 | [diff] [blame] | 1998 | if (vgic_initialized(kvm)) |
Marc Zyngier | 4956f2b | 2014-07-08 12:09:06 +0100 | [diff] [blame] | 1999 | return 0; |
Marc Zyngier | 5fb66da | 2014-07-08 12:09:05 +0100 | [diff] [blame] | 2000 | |
Marc Zyngier | 4956f2b | 2014-07-08 12:09:06 +0100 | [diff] [blame] | 2001 | nr_cpus = dist->nr_cpus = atomic_read(&kvm->online_vcpus); |
| 2002 | if (!nr_cpus) /* No vcpus? Can't be good... */ |
Eric Auger | 66b030e | 2014-12-15 18:43:32 +0100 | [diff] [blame] | 2003 | return -ENODEV; |
Marc Zyngier | 4956f2b | 2014-07-08 12:09:06 +0100 | [diff] [blame] | 2004 | |
| 2005 | /* |
| 2006 | * If nobody configured the number of interrupts, use the |
| 2007 | * legacy one. |
| 2008 | */ |
Marc Zyngier | 5fb66da | 2014-07-08 12:09:05 +0100 | [diff] [blame] | 2009 | if (!dist->nr_irqs) |
| 2010 | dist->nr_irqs = VGIC_NR_IRQS_LEGACY; |
| 2011 | |
| 2012 | nr_irqs = dist->nr_irqs; |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 2013 | |
| 2014 | ret = vgic_init_bitmap(&dist->irq_enabled, nr_cpus, nr_irqs); |
| 2015 | ret |= vgic_init_bitmap(&dist->irq_level, nr_cpus, nr_irqs); |
| 2016 | ret |= vgic_init_bitmap(&dist->irq_pending, nr_cpus, nr_irqs); |
| 2017 | ret |= vgic_init_bitmap(&dist->irq_soft_pend, nr_cpus, nr_irqs); |
| 2018 | ret |= vgic_init_bitmap(&dist->irq_queued, nr_cpus, nr_irqs); |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 2019 | ret |= vgic_init_bitmap(&dist->irq_active, nr_cpus, nr_irqs); |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 2020 | ret |= vgic_init_bitmap(&dist->irq_cfg, nr_cpus, nr_irqs); |
| 2021 | ret |= vgic_init_bytemap(&dist->irq_priority, nr_cpus, nr_irqs); |
| 2022 | |
| 2023 | if (ret) |
| 2024 | goto out; |
| 2025 | |
| 2026 | dist->irq_sgi_sources = kzalloc(nr_cpus * VGIC_NR_SGIS, GFP_KERNEL); |
| 2027 | dist->irq_spi_cpu = kzalloc(nr_irqs - VGIC_NR_PRIVATE_IRQS, GFP_KERNEL); |
| 2028 | dist->irq_spi_target = kzalloc(sizeof(*dist->irq_spi_target) * nr_cpus, |
| 2029 | GFP_KERNEL); |
| 2030 | dist->irq_pending_on_cpu = kzalloc(BITS_TO_LONGS(nr_cpus) * sizeof(long), |
| 2031 | GFP_KERNEL); |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 2032 | dist->irq_active_on_cpu = kzalloc(BITS_TO_LONGS(nr_cpus) * sizeof(long), |
| 2033 | GFP_KERNEL); |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 2034 | if (!dist->irq_sgi_sources || |
| 2035 | !dist->irq_spi_cpu || |
| 2036 | !dist->irq_spi_target || |
Christoffer Dall | 47a98b1 | 2015-03-13 17:02:54 +0000 | [diff] [blame] | 2037 | !dist->irq_pending_on_cpu || |
| 2038 | !dist->irq_active_on_cpu) { |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 2039 | ret = -ENOMEM; |
| 2040 | goto out; |
| 2041 | } |
| 2042 | |
| 2043 | for (i = 0; i < nr_cpus; i++) |
| 2044 | ret |= vgic_init_bitmap(&dist->irq_spi_target[i], |
| 2045 | nr_cpus, nr_irqs); |
| 2046 | |
| 2047 | if (ret) |
| 2048 | goto out; |
| 2049 | |
Andre Przywara | b26e5fd | 2014-06-02 16:19:12 +0200 | [diff] [blame] | 2050 | ret = kvm->arch.vgic.vm_ops.init_model(kvm); |
| 2051 | if (ret) |
| 2052 | goto out; |
Peter Maydell | 6d3cfbe | 2014-12-04 15:02:24 +0000 | [diff] [blame] | 2053 | |
| 2054 | kvm_for_each_vcpu(vcpu_id, vcpu, kvm) { |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 2055 | ret = vgic_vcpu_init_maps(vcpu, nr_irqs); |
| 2056 | if (ret) { |
| 2057 | kvm_err("VGIC: Failed to allocate vcpu memory\n"); |
| 2058 | break; |
| 2059 | } |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 2060 | |
Christoffer Dall | 54723bb | 2015-08-30 14:45:20 +0200 | [diff] [blame] | 2061 | /* |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 2062 | * Enable and configure all SGIs to be edge-triggere and |
| 2063 | * configure all PPIs as level-triggered. |
Christoffer Dall | 54723bb | 2015-08-30 14:45:20 +0200 | [diff] [blame] | 2064 | */ |
| 2065 | for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) { |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 2066 | if (i < VGIC_NR_SGIS) { |
| 2067 | /* SGIs */ |
Peter Maydell | 6d3cfbe | 2014-12-04 15:02:24 +0000 | [diff] [blame] | 2068 | vgic_bitmap_set_irq_val(&dist->irq_enabled, |
| 2069 | vcpu->vcpu_id, i, 1); |
Peter Maydell | 6d3cfbe | 2014-12-04 15:02:24 +0000 | [diff] [blame] | 2070 | vgic_bitmap_set_irq_val(&dist->irq_cfg, |
| 2071 | vcpu->vcpu_id, i, |
| 2072 | VGIC_CFG_EDGE); |
Christoffer Dall | 4b4b451 | 2015-08-30 15:01:27 +0200 | [diff] [blame] | 2073 | } else if (i < VGIC_NR_PRIVATE_IRQS) { |
| 2074 | /* PPIs */ |
| 2075 | vgic_bitmap_set_irq_val(&dist->irq_cfg, |
| 2076 | vcpu->vcpu_id, i, |
| 2077 | VGIC_CFG_LEVEL); |
| 2078 | } |
Peter Maydell | 6d3cfbe | 2014-12-04 15:02:24 +0000 | [diff] [blame] | 2079 | } |
| 2080 | |
| 2081 | vgic_enable(vcpu); |
| 2082 | } |
Marc Zyngier | 4956f2b | 2014-07-08 12:09:06 +0100 | [diff] [blame] | 2083 | |
Marc Zyngier | c1bfb57 | 2014-07-08 12:09:01 +0100 | [diff] [blame] | 2084 | out: |
| 2085 | if (ret) |
| 2086 | kvm_vgic_destroy(kvm); |
| 2087 | |
| 2088 | return ret; |
| 2089 | } |
| 2090 | |
Andre Przywara | b26e5fd | 2014-06-02 16:19:12 +0200 | [diff] [blame] | 2091 | static int init_vgic_model(struct kvm *kvm, int type) |
| 2092 | { |
| 2093 | switch (type) { |
| 2094 | case KVM_DEV_TYPE_ARM_VGIC_V2: |
| 2095 | vgic_v2_init_emulation(kvm); |
| 2096 | break; |
Andre Przywara | b5d84ff | 2014-06-03 10:26:03 +0200 | [diff] [blame] | 2097 | #ifdef CONFIG_ARM_GIC_V3 |
| 2098 | case KVM_DEV_TYPE_ARM_VGIC_V3: |
| 2099 | vgic_v3_init_emulation(kvm); |
| 2100 | break; |
| 2101 | #endif |
Andre Przywara | b26e5fd | 2014-06-02 16:19:12 +0200 | [diff] [blame] | 2102 | default: |
| 2103 | return -ENODEV; |
| 2104 | } |
| 2105 | |
Andre Przywara | 3caa2d8 | 2014-06-02 16:26:01 +0200 | [diff] [blame] | 2106 | if (atomic_read(&kvm->online_vcpus) > kvm->arch.max_vcpus) |
| 2107 | return -E2BIG; |
| 2108 | |
Andre Przywara | b26e5fd | 2014-06-02 16:19:12 +0200 | [diff] [blame] | 2109 | return 0; |
| 2110 | } |
| 2111 | |
Marc Zyngier | 6c3d63c | 2014-06-23 17:37:18 +0100 | [diff] [blame] | 2112 | /** |
| 2113 | * kvm_vgic_early_init - Earliest possible vgic initialization stage |
| 2114 | * |
| 2115 | * No memory allocation should be performed here, only static init. |
| 2116 | */ |
| 2117 | void kvm_vgic_early_init(struct kvm *kvm) |
| 2118 | { |
| 2119 | spin_lock_init(&kvm->arch.vgic.lock); |
| 2120 | spin_lock_init(&kvm->arch.vgic.irq_phys_map_lock); |
| 2121 | INIT_LIST_HEAD(&kvm->arch.vgic.irq_phys_map_list); |
| 2122 | } |
| 2123 | |
Andre Przywara | 59892136 | 2014-06-03 09:33:10 +0200 | [diff] [blame] | 2124 | int kvm_vgic_create(struct kvm *kvm, u32 type) |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 2125 | { |
Christoffer Dall | 6b50f54 | 2014-11-06 11:47:39 +0000 | [diff] [blame] | 2126 | int i, vcpu_lock_idx = -1, ret; |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2127 | struct kvm_vcpu *vcpu; |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 2128 | |
| 2129 | mutex_lock(&kvm->lock); |
| 2130 | |
Andre Przywara | 4ce7ebd | 2014-10-26 23:18:14 +0000 | [diff] [blame] | 2131 | if (irqchip_in_kernel(kvm)) { |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 2132 | ret = -EEXIST; |
| 2133 | goto out; |
| 2134 | } |
| 2135 | |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2136 | /* |
Andre Przywara | b5d84ff | 2014-06-03 10:26:03 +0200 | [diff] [blame] | 2137 | * This function is also called by the KVM_CREATE_IRQCHIP handler, |
| 2138 | * which had no chance yet to check the availability of the GICv2 |
| 2139 | * emulation. So check this here again. KVM_CREATE_DEVICE does |
| 2140 | * the proper checks already. |
| 2141 | */ |
Wei Yongjun | b52104e | 2015-02-27 19:41:45 +0800 | [diff] [blame] | 2142 | if (type == KVM_DEV_TYPE_ARM_VGIC_V2 && !vgic->can_emulate_gicv2) { |
| 2143 | ret = -ENODEV; |
| 2144 | goto out; |
| 2145 | } |
Andre Przywara | b5d84ff | 2014-06-03 10:26:03 +0200 | [diff] [blame] | 2146 | |
| 2147 | /* |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2148 | * Any time a vcpu is run, vcpu_load is called which tries to grab the |
| 2149 | * vcpu->mutex. By grabbing the vcpu->mutex of all VCPUs we ensure |
| 2150 | * that no other VCPUs are run while we create the vgic. |
| 2151 | */ |
Christoffer Dall | 6b50f54 | 2014-11-06 11:47:39 +0000 | [diff] [blame] | 2152 | ret = -EBUSY; |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2153 | kvm_for_each_vcpu(i, vcpu, kvm) { |
| 2154 | if (!mutex_trylock(&vcpu->mutex)) |
| 2155 | goto out_unlock; |
| 2156 | vcpu_lock_idx = i; |
| 2157 | } |
| 2158 | |
| 2159 | kvm_for_each_vcpu(i, vcpu, kvm) { |
Christoffer Dall | 6b50f54 | 2014-11-06 11:47:39 +0000 | [diff] [blame] | 2160 | if (vcpu->arch.has_run_once) |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2161 | goto out_unlock; |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2162 | } |
Christoffer Dall | 6b50f54 | 2014-11-06 11:47:39 +0000 | [diff] [blame] | 2163 | ret = 0; |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2164 | |
Andre Przywara | b26e5fd | 2014-06-02 16:19:12 +0200 | [diff] [blame] | 2165 | ret = init_vgic_model(kvm, type); |
| 2166 | if (ret) |
| 2167 | goto out_unlock; |
| 2168 | |
Marc Zyngier | f982cf4 | 2014-05-15 10:03:25 +0100 | [diff] [blame] | 2169 | kvm->arch.vgic.in_kernel = true; |
Andre Przywara | 59892136 | 2014-06-03 09:33:10 +0200 | [diff] [blame] | 2170 | kvm->arch.vgic.vgic_model = type; |
Marc Zyngier | 8f186d5 | 2014-02-04 18:13:03 +0000 | [diff] [blame] | 2171 | kvm->arch.vgic.vctrl_base = vgic->vctrl_base; |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 2172 | kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF; |
| 2173 | kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF; |
Andre Przywara | a0675c2 | 2014-06-07 00:54:51 +0200 | [diff] [blame] | 2174 | kvm->arch.vgic.vgic_redist_base = VGIC_ADDR_UNDEF; |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 2175 | |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2176 | out_unlock: |
| 2177 | for (; vcpu_lock_idx >= 0; vcpu_lock_idx--) { |
| 2178 | vcpu = kvm_get_vcpu(kvm, vcpu_lock_idx); |
| 2179 | mutex_unlock(&vcpu->mutex); |
| 2180 | } |
| 2181 | |
Marc Zyngier | 01ac5e3 | 2013-01-21 19:36:16 -0500 | [diff] [blame] | 2182 | out: |
| 2183 | mutex_unlock(&kvm->lock); |
| 2184 | return ret; |
| 2185 | } |
| 2186 | |
Will Deacon | 1fa451b | 2014-08-26 15:13:24 +0100 | [diff] [blame] | 2187 | static int vgic_ioaddr_overlap(struct kvm *kvm) |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2188 | { |
| 2189 | phys_addr_t dist = kvm->arch.vgic.vgic_dist_base; |
| 2190 | phys_addr_t cpu = kvm->arch.vgic.vgic_cpu_base; |
| 2191 | |
| 2192 | if (IS_VGIC_ADDR_UNDEF(dist) || IS_VGIC_ADDR_UNDEF(cpu)) |
| 2193 | return 0; |
| 2194 | if ((dist <= cpu && dist + KVM_VGIC_V2_DIST_SIZE > cpu) || |
| 2195 | (cpu <= dist && cpu + KVM_VGIC_V2_CPU_SIZE > dist)) |
| 2196 | return -EBUSY; |
| 2197 | return 0; |
| 2198 | } |
| 2199 | |
| 2200 | static int vgic_ioaddr_assign(struct kvm *kvm, phys_addr_t *ioaddr, |
| 2201 | phys_addr_t addr, phys_addr_t size) |
| 2202 | { |
| 2203 | int ret; |
| 2204 | |
Christoffer Dall | ce01e4e | 2013-09-23 14:55:56 -0700 | [diff] [blame] | 2205 | if (addr & ~KVM_PHYS_MASK) |
| 2206 | return -E2BIG; |
| 2207 | |
| 2208 | if (addr & (SZ_4K - 1)) |
| 2209 | return -EINVAL; |
| 2210 | |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2211 | if (!IS_VGIC_ADDR_UNDEF(*ioaddr)) |
| 2212 | return -EEXIST; |
| 2213 | if (addr + size < addr) |
| 2214 | return -EINVAL; |
| 2215 | |
Haibin Wang | 30c2117 | 2014-04-29 14:49:17 +0800 | [diff] [blame] | 2216 | *ioaddr = addr; |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2217 | ret = vgic_ioaddr_overlap(kvm); |
| 2218 | if (ret) |
Haibin Wang | 30c2117 | 2014-04-29 14:49:17 +0800 | [diff] [blame] | 2219 | *ioaddr = VGIC_ADDR_UNDEF; |
| 2220 | |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2221 | return ret; |
| 2222 | } |
| 2223 | |
Christoffer Dall | ce01e4e | 2013-09-23 14:55:56 -0700 | [diff] [blame] | 2224 | /** |
| 2225 | * kvm_vgic_addr - set or get vgic VM base addresses |
| 2226 | * @kvm: pointer to the vm struct |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2227 | * @type: the VGIC addr type, one of KVM_VGIC_V[23]_ADDR_TYPE_XXX |
Christoffer Dall | ce01e4e | 2013-09-23 14:55:56 -0700 | [diff] [blame] | 2228 | * @addr: pointer to address value |
| 2229 | * @write: if true set the address in the VM address space, if false read the |
| 2230 | * address |
| 2231 | * |
| 2232 | * Set or get the vgic base addresses for the distributor and the virtual CPU |
| 2233 | * interface in the VM physical address space. These addresses are properties |
| 2234 | * of the emulated core/SoC and therefore user space initially knows this |
| 2235 | * information. |
| 2236 | */ |
| 2237 | int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write) |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2238 | { |
| 2239 | int r = 0; |
| 2240 | struct vgic_dist *vgic = &kvm->arch.vgic; |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2241 | int type_needed; |
| 2242 | phys_addr_t *addr_ptr, block_size; |
Andre Przywara | 4fa96afd | 2015-01-13 12:02:13 +0000 | [diff] [blame] | 2243 | phys_addr_t alignment; |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2244 | |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2245 | mutex_lock(&kvm->lock); |
| 2246 | switch (type) { |
| 2247 | case KVM_VGIC_V2_ADDR_TYPE_DIST: |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2248 | type_needed = KVM_DEV_TYPE_ARM_VGIC_V2; |
| 2249 | addr_ptr = &vgic->vgic_dist_base; |
| 2250 | block_size = KVM_VGIC_V2_DIST_SIZE; |
Andre Przywara | 4fa96afd | 2015-01-13 12:02:13 +0000 | [diff] [blame] | 2251 | alignment = SZ_4K; |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2252 | break; |
| 2253 | case KVM_VGIC_V2_ADDR_TYPE_CPU: |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2254 | type_needed = KVM_DEV_TYPE_ARM_VGIC_V2; |
| 2255 | addr_ptr = &vgic->vgic_cpu_base; |
| 2256 | block_size = KVM_VGIC_V2_CPU_SIZE; |
Andre Przywara | 4fa96afd | 2015-01-13 12:02:13 +0000 | [diff] [blame] | 2257 | alignment = SZ_4K; |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2258 | break; |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2259 | #ifdef CONFIG_ARM_GIC_V3 |
| 2260 | case KVM_VGIC_V3_ADDR_TYPE_DIST: |
| 2261 | type_needed = KVM_DEV_TYPE_ARM_VGIC_V3; |
| 2262 | addr_ptr = &vgic->vgic_dist_base; |
| 2263 | block_size = KVM_VGIC_V3_DIST_SIZE; |
Andre Przywara | 4fa96afd | 2015-01-13 12:02:13 +0000 | [diff] [blame] | 2264 | alignment = SZ_64K; |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2265 | break; |
| 2266 | case KVM_VGIC_V3_ADDR_TYPE_REDIST: |
| 2267 | type_needed = KVM_DEV_TYPE_ARM_VGIC_V3; |
| 2268 | addr_ptr = &vgic->vgic_redist_base; |
| 2269 | block_size = KVM_VGIC_V3_REDIST_SIZE; |
Andre Przywara | 4fa96afd | 2015-01-13 12:02:13 +0000 | [diff] [blame] | 2270 | alignment = SZ_64K; |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2271 | break; |
| 2272 | #endif |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2273 | default: |
| 2274 | r = -ENODEV; |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2275 | goto out; |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2276 | } |
| 2277 | |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2278 | if (vgic->vgic_model != type_needed) { |
| 2279 | r = -ENODEV; |
| 2280 | goto out; |
| 2281 | } |
| 2282 | |
Andre Przywara | 4fa96afd | 2015-01-13 12:02:13 +0000 | [diff] [blame] | 2283 | if (write) { |
| 2284 | if (!IS_ALIGNED(*addr, alignment)) |
| 2285 | r = -EINVAL; |
| 2286 | else |
| 2287 | r = vgic_ioaddr_assign(kvm, addr_ptr, *addr, |
| 2288 | block_size); |
| 2289 | } else { |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2290 | *addr = *addr_ptr; |
Andre Przywara | 4fa96afd | 2015-01-13 12:02:13 +0000 | [diff] [blame] | 2291 | } |
Andre Przywara | ac3d373 | 2014-06-03 10:26:30 +0200 | [diff] [blame] | 2292 | |
| 2293 | out: |
Christoffer Dall | 330690c | 2013-01-21 19:36:13 -0500 | [diff] [blame] | 2294 | mutex_unlock(&kvm->lock); |
| 2295 | return r; |
| 2296 | } |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2297 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 2298 | int vgic_set_common_attr(struct kvm_device *dev, struct kvm_device_attr *attr) |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2299 | { |
Christoffer Dall | ce01e4e | 2013-09-23 14:55:56 -0700 | [diff] [blame] | 2300 | int r; |
| 2301 | |
| 2302 | switch (attr->group) { |
| 2303 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { |
| 2304 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; |
| 2305 | u64 addr; |
| 2306 | unsigned long type = (unsigned long)attr->attr; |
| 2307 | |
| 2308 | if (copy_from_user(&addr, uaddr, sizeof(addr))) |
| 2309 | return -EFAULT; |
| 2310 | |
| 2311 | r = kvm_vgic_addr(dev->kvm, type, &addr, true); |
| 2312 | return (r == -ENODEV) ? -ENXIO : r; |
| 2313 | } |
Marc Zyngier | a98f26f | 2014-07-08 12:09:07 +0100 | [diff] [blame] | 2314 | case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: { |
| 2315 | u32 __user *uaddr = (u32 __user *)(long)attr->addr; |
| 2316 | u32 val; |
| 2317 | int ret = 0; |
| 2318 | |
| 2319 | if (get_user(val, uaddr)) |
| 2320 | return -EFAULT; |
| 2321 | |
| 2322 | /* |
| 2323 | * We require: |
| 2324 | * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs |
| 2325 | * - at most 1024 interrupts |
| 2326 | * - a multiple of 32 interrupts |
| 2327 | */ |
| 2328 | if (val < (VGIC_NR_PRIVATE_IRQS + 32) || |
| 2329 | val > VGIC_MAX_IRQS || |
| 2330 | (val & 31)) |
| 2331 | return -EINVAL; |
| 2332 | |
| 2333 | mutex_lock(&dev->kvm->lock); |
| 2334 | |
Christoffer Dall | c52edf5 | 2014-12-09 14:28:09 +0100 | [diff] [blame] | 2335 | if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_irqs) |
Marc Zyngier | a98f26f | 2014-07-08 12:09:07 +0100 | [diff] [blame] | 2336 | ret = -EBUSY; |
| 2337 | else |
| 2338 | dev->kvm->arch.vgic.nr_irqs = val; |
| 2339 | |
| 2340 | mutex_unlock(&dev->kvm->lock); |
| 2341 | |
| 2342 | return ret; |
| 2343 | } |
Eric Auger | 065c003 | 2014-12-15 18:43:33 +0100 | [diff] [blame] | 2344 | case KVM_DEV_ARM_VGIC_GRP_CTRL: { |
| 2345 | switch (attr->attr) { |
| 2346 | case KVM_DEV_ARM_VGIC_CTRL_INIT: |
| 2347 | r = vgic_init(dev->kvm); |
| 2348 | return r; |
| 2349 | } |
| 2350 | break; |
| 2351 | } |
Christoffer Dall | ce01e4e | 2013-09-23 14:55:56 -0700 | [diff] [blame] | 2352 | } |
| 2353 | |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2354 | return -ENXIO; |
| 2355 | } |
| 2356 | |
Andre Przywara | 8321581 | 2014-06-07 00:53:08 +0200 | [diff] [blame] | 2357 | int vgic_get_common_attr(struct kvm_device *dev, struct kvm_device_attr *attr) |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2358 | { |
Christoffer Dall | ce01e4e | 2013-09-23 14:55:56 -0700 | [diff] [blame] | 2359 | int r = -ENXIO; |
| 2360 | |
| 2361 | switch (attr->group) { |
| 2362 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { |
| 2363 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; |
| 2364 | u64 addr; |
| 2365 | unsigned long type = (unsigned long)attr->attr; |
| 2366 | |
| 2367 | r = kvm_vgic_addr(dev->kvm, type, &addr, false); |
| 2368 | if (r) |
| 2369 | return (r == -ENODEV) ? -ENXIO : r; |
| 2370 | |
| 2371 | if (copy_to_user(uaddr, &addr, sizeof(addr))) |
| 2372 | return -EFAULT; |
Christoffer Dall | c07a019 | 2013-10-25 21:17:31 +0100 | [diff] [blame] | 2373 | break; |
Christoffer Dall | ce01e4e | 2013-09-23 14:55:56 -0700 | [diff] [blame] | 2374 | } |
Marc Zyngier | a98f26f | 2014-07-08 12:09:07 +0100 | [diff] [blame] | 2375 | case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: { |
| 2376 | u32 __user *uaddr = (u32 __user *)(long)attr->addr; |
Andre Przywara | b60da14 | 2014-08-21 11:08:27 +0100 | [diff] [blame] | 2377 | |
Marc Zyngier | a98f26f | 2014-07-08 12:09:07 +0100 | [diff] [blame] | 2378 | r = put_user(dev->kvm->arch.vgic.nr_irqs, uaddr); |
| 2379 | break; |
| 2380 | } |
Christoffer Dall | c07a019 | 2013-10-25 21:17:31 +0100 | [diff] [blame] | 2381 | |
Christoffer Dall | ce01e4e | 2013-09-23 14:55:56 -0700 | [diff] [blame] | 2382 | } |
| 2383 | |
| 2384 | return r; |
Christoffer Dall | 7330672 | 2013-10-25 17:29:18 +0100 | [diff] [blame] | 2385 | } |
| 2386 | |
Andre Przywara | cf50a1e | 2015-03-26 14:39:32 +0000 | [diff] [blame] | 2387 | int vgic_has_attr_regs(const struct vgic_io_range *ranges, phys_addr_t offset) |
Christoffer Dall | c07a019 | 2013-10-25 21:17:31 +0100 | [diff] [blame] | 2388 | { |
Andre Przywara | 9f199d0 | 2015-03-26 14:39:33 +0000 | [diff] [blame] | 2389 | if (vgic_find_range(ranges, 4, offset)) |
Christoffer Dall | c07a019 | 2013-10-25 21:17:31 +0100 | [diff] [blame] | 2390 | return 0; |
| 2391 | else |
| 2392 | return -ENXIO; |
| 2393 | } |
| 2394 | |
Will Deacon | c06a841 | 2014-09-02 10:27:34 +0100 | [diff] [blame] | 2395 | static void vgic_init_maintenance_interrupt(void *info) |
| 2396 | { |
| 2397 | enable_percpu_irq(vgic->maint_irq, 0); |
| 2398 | } |
| 2399 | |
| 2400 | static int vgic_cpu_notify(struct notifier_block *self, |
| 2401 | unsigned long action, void *cpu) |
| 2402 | { |
| 2403 | switch (action) { |
| 2404 | case CPU_STARTING: |
| 2405 | case CPU_STARTING_FROZEN: |
| 2406 | vgic_init_maintenance_interrupt(NULL); |
| 2407 | break; |
| 2408 | case CPU_DYING: |
| 2409 | case CPU_DYING_FROZEN: |
| 2410 | disable_percpu_irq(vgic->maint_irq); |
| 2411 | break; |
| 2412 | } |
| 2413 | |
| 2414 | return NOTIFY_OK; |
| 2415 | } |
| 2416 | |
| 2417 | static struct notifier_block vgic_cpu_nb = { |
| 2418 | .notifier_call = vgic_cpu_notify, |
| 2419 | }; |
| 2420 | |
| 2421 | static const struct of_device_id vgic_ids[] = { |
Mark Rutland | 0f372475 | 2015-03-05 14:47:44 +0000 | [diff] [blame] | 2422 | { .compatible = "arm,cortex-a15-gic", .data = vgic_v2_probe, }, |
| 2423 | { .compatible = "arm,cortex-a7-gic", .data = vgic_v2_probe, }, |
| 2424 | { .compatible = "arm,gic-400", .data = vgic_v2_probe, }, |
| 2425 | { .compatible = "arm,gic-v3", .data = vgic_v3_probe, }, |
Will Deacon | c06a841 | 2014-09-02 10:27:34 +0100 | [diff] [blame] | 2426 | {}, |
| 2427 | }; |
| 2428 | |
| 2429 | int kvm_vgic_hyp_init(void) |
| 2430 | { |
| 2431 | const struct of_device_id *matched_id; |
Christoffer Dall | a875daf | 2014-09-18 18:15:32 -0700 | [diff] [blame] | 2432 | const int (*vgic_probe)(struct device_node *,const struct vgic_ops **, |
| 2433 | const struct vgic_params **); |
Will Deacon | c06a841 | 2014-09-02 10:27:34 +0100 | [diff] [blame] | 2434 | struct device_node *vgic_node; |
| 2435 | int ret; |
| 2436 | |
| 2437 | vgic_node = of_find_matching_node_and_match(NULL, |
| 2438 | vgic_ids, &matched_id); |
| 2439 | if (!vgic_node) { |
| 2440 | kvm_err("error: no compatible GIC node found\n"); |
| 2441 | return -ENODEV; |
| 2442 | } |
| 2443 | |
| 2444 | vgic_probe = matched_id->data; |
| 2445 | ret = vgic_probe(vgic_node, &vgic_ops, &vgic); |
| 2446 | if (ret) |
| 2447 | return ret; |
| 2448 | |
| 2449 | ret = request_percpu_irq(vgic->maint_irq, vgic_maintenance_handler, |
| 2450 | "vgic", kvm_get_running_vcpus()); |
| 2451 | if (ret) { |
| 2452 | kvm_err("Cannot register interrupt %d\n", vgic->maint_irq); |
| 2453 | return ret; |
| 2454 | } |
| 2455 | |
| 2456 | ret = __register_cpu_notifier(&vgic_cpu_nb); |
| 2457 | if (ret) { |
| 2458 | kvm_err("Cannot register vgic CPU notifier\n"); |
| 2459 | goto out_free_irq; |
| 2460 | } |
| 2461 | |
Will Deacon | c06a841 | 2014-09-02 10:27:34 +0100 | [diff] [blame] | 2462 | on_each_cpu(vgic_init_maintenance_interrupt, NULL, 1); |
| 2463 | |
Andre Przywara | ea2f83a | 2014-10-26 23:17:00 +0000 | [diff] [blame] | 2464 | return 0; |
Will Deacon | c06a841 | 2014-09-02 10:27:34 +0100 | [diff] [blame] | 2465 | |
| 2466 | out_free_irq: |
| 2467 | free_percpu_irq(vgic->maint_irq, kvm_get_running_vcpus()); |
| 2468 | return ret; |
| 2469 | } |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 2470 | |
| 2471 | int kvm_irq_map_gsi(struct kvm *kvm, |
| 2472 | struct kvm_kernel_irq_routing_entry *entries, |
| 2473 | int gsi) |
| 2474 | { |
Eric Auger | 0b3289e | 2015-04-13 15:01:59 +0200 | [diff] [blame] | 2475 | return 0; |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 2476 | } |
| 2477 | |
| 2478 | int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) |
| 2479 | { |
| 2480 | return pin; |
| 2481 | } |
| 2482 | |
| 2483 | int kvm_set_irq(struct kvm *kvm, int irq_source_id, |
| 2484 | u32 irq, int level, bool line_status) |
| 2485 | { |
| 2486 | unsigned int spi = irq + VGIC_NR_PRIVATE_IRQS; |
| 2487 | |
| 2488 | trace_kvm_set_irq(irq, level, irq_source_id); |
| 2489 | |
| 2490 | BUG_ON(!vgic_initialized(kvm)); |
| 2491 | |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 2492 | return kvm_vgic_inject_irq(kvm, 0, spi, level); |
Eric Auger | 174178f | 2015-03-04 11:14:36 +0100 | [diff] [blame] | 2493 | } |
| 2494 | |
| 2495 | /* MSI not implemented yet */ |
| 2496 | int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, |
| 2497 | struct kvm *kvm, int irq_source_id, |
| 2498 | int level, bool line_status) |
| 2499 | { |
| 2500 | return 0; |
| 2501 | } |