blob: e3bc1b436284bfa42ac977fe372c98340df24b2d [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata-legacy.c - Legacy port PATA/SATA controller driver.
Alan Coxab771632008-10-27 15:09:10 +00003 * Copyright 2005/2006 Red Hat, all rights reserved.
Jeff Garzik669a5db2006-08-29 18:12:40 -04004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * An ATA driver for the legacy ATA ports.
20 *
21 * Data Sources:
22 * Opti 82C465/82C611 support: Data sheets at opti-inc.com
23 * HT6560 series:
24 * Promise 20230/20620:
25 * http://www.ryston.cz/petr/vlb/pdc20230b.html
26 * http://www.ryston.cz/petr/vlb/pdc20230c.html
27 * http://www.ryston.cz/petr/vlb/pdc20630.html
28 *
29 * Unsupported but docs exist:
30 * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220
Jeff Garzik669a5db2006-08-29 18:12:40 -040031 *
32 * This driver handles legacy (that is "ISA/VLB side") IDE ports found
33 * on PC class systems. There are three hybrid devices that are exceptions
34 * The Cyrix 5510/5520 where a pre SFF ATA device is on the bridge and
35 * the MPIIX where the tuning is PCI side but the IDE is "ISA side".
36 *
37 * Specific support is included for the ht6560a/ht6560b/opti82c611a/
Alan Coxb8325482008-01-19 15:47:23 +000038 * opti82c465mv/promise 20230c/20630/winbond83759A
Jeff Garzik669a5db2006-08-29 18:12:40 -040039 *
40 * Use the autospeed and pio_mask options with:
41 * Appian ADI/2 aka CLPD7220 or AIC25VL01.
42 * Use the jumpers, autospeed and set pio_mask to the mode on the jumpers with
43 * Goldstar GM82C711, PIC-1288A-125, UMC 82C871F, Winbond W83759,
44 * Winbond W83759A, Promise PDC20230-B
45 *
46 * For now use autospeed and pio_mask as above with the W83759A. This may
47 * change.
48 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040049 */
50
51#include <linux/kernel.h>
52#include <linux/module.h>
53#include <linux/pci.h>
54#include <linux/init.h>
55#include <linux/blkdev.h>
56#include <linux/delay.h>
57#include <scsi/scsi_host.h>
58#include <linux/ata.h>
59#include <linux/libata.h>
60#include <linux/platform_device.h>
61
62#define DRV_NAME "pata_legacy"
Alan Coxb8325482008-01-19 15:47:23 +000063#define DRV_VERSION "0.6.5"
Jeff Garzik669a5db2006-08-29 18:12:40 -040064
65#define NR_HOST 6
66
Alan Coxdefc9cd2008-01-10 14:33:10 -080067static int all;
68module_param(all, int, 0444);
69MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)");
Jeff Garzik669a5db2006-08-29 18:12:40 -040070
71struct legacy_data {
72 unsigned long timing;
73 u8 clock[2];
74 u8 last;
75 int fast;
76 struct platform_device *platform_dev;
77
78};
79
Alan Coxdefc9cd2008-01-10 14:33:10 -080080enum controller {
81 BIOS = 0,
82 SNOOP = 1,
83 PDC20230 = 2,
84 HT6560A = 3,
85 HT6560B = 4,
86 OPTI611A = 5,
87 OPTI46X = 6,
88 QDI6500 = 7,
89 QDI6580 = 8,
90 QDI6580DP = 9, /* Dual channel mode is different */
Alan Coxb8325482008-01-19 15:47:23 +000091 W83759A = 10,
Alan Coxdefc9cd2008-01-10 14:33:10 -080092
93 UNKNOWN = -1
94};
95
96
97struct legacy_probe {
98 unsigned char *name;
99 unsigned long port;
100 unsigned int irq;
101 unsigned int slot;
102 enum controller type;
103 unsigned long private;
104};
105
106struct legacy_controller {
107 const char *name;
108 struct ata_port_operations *ops;
109 unsigned int pio_mask;
110 unsigned int flags;
Alan Coxb8325482008-01-19 15:47:23 +0000111 int (*setup)(struct platform_device *, struct legacy_probe *probe,
112 struct legacy_data *data);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800113};
114
115static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
116
117static struct legacy_probe probe_list[NR_HOST];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400118static struct legacy_data legacy_data[NR_HOST];
119static struct ata_host *legacy_host[NR_HOST];
120static int nr_legacy_host;
121
122
Alan Coxdefc9cd2008-01-10 14:33:10 -0800123static int probe_all; /* Set to check all ISA port ranges */
124static int ht6560a; /* HT 6560A on primary 1, second 2, both 3 */
125static int ht6560b; /* HT 6560A on primary 1, second 2, both 3 */
126static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */
127static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */
128static int qdi; /* Set to probe QDI controllers */
Alan Coxb8325482008-01-19 15:47:23 +0000129static int winbond; /* Set to probe Winbond controllers,
Alan Cox83972482008-02-08 15:23:38 +0000130 give I/O port if non standard */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800131static int autospeed; /* Chip present which snoops speed changes */
132static int pio_mask = 0x1F; /* PIO range for autospeed devices */
Alan Coxf834e492007-02-07 13:46:00 -0800133static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400134
135/**
Alan Coxdefc9cd2008-01-10 14:33:10 -0800136 * legacy_probe_add - Add interface to probe list
137 * @port: Controller port
138 * @irq: IRQ number
139 * @type: Controller type
140 * @private: Controller specific info
141 *
142 * Add an entry into the probe list for ATA controllers. This is used
143 * to add the default ISA slots and then to build up the table
144 * further according to other ISA/VLB/Weird device scans
145 *
146 * An I/O port list is used to keep ordering stable and sane, as we
147 * don't have any good way to talk about ordering otherwise
148 */
149
150static int legacy_probe_add(unsigned long port, unsigned int irq,
151 enum controller type, unsigned long private)
152{
153 struct legacy_probe *lp = &probe_list[0];
154 int i;
155 struct legacy_probe *free = NULL;
156
157 for (i = 0; i < NR_HOST; i++) {
158 if (lp->port == 0 && free == NULL)
159 free = lp;
160 /* Matching port, or the correct slot for ordering */
161 if (lp->port == port || legacy_port[i] == port) {
162 free = lp;
163 break;
164 }
165 lp++;
166 }
167 if (free == NULL) {
168 printk(KERN_ERR "pata_legacy: Too many interfaces.\n");
169 return -1;
170 }
171 /* Fill in the entry for later probing */
172 free->port = port;
173 free->irq = irq;
174 free->type = type;
175 free->private = private;
176 return 0;
177}
178
179
180/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400181 * legacy_set_mode - mode setting
Tejun Heo02607312007-08-06 18:36:23 +0900182 * @link: IDE link
Alanb229a7b2007-01-24 11:47:07 +0000183 * @unused: Device that failed when error is returned
Jeff Garzik669a5db2006-08-29 18:12:40 -0400184 *
185 * Use a non standard set_mode function. We don't want to be tuned.
186 *
187 * The BIOS configured everything. Our job is not to fiddle. Just use
188 * whatever PIO the hardware is using and leave it at that. When we
189 * get some kind of nice user driven API for control then we can
190 * expand on this as per hdparm in the base kernel.
191 */
192
Tejun Heo02607312007-08-06 18:36:23 +0900193static int legacy_set_mode(struct ata_link *link, struct ata_device **unused)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400194{
Tejun Heof58229f2007-08-06 18:36:23 +0900195 struct ata_device *dev;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400196
Tejun Heo1eca4362008-11-03 20:03:17 +0900197 ata_for_each_dev(dev, link, ENABLED) {
198 ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
199 dev->pio_mode = XFER_PIO_0;
200 dev->xfer_mode = XFER_PIO_0;
201 dev->xfer_shift = ATA_SHIFT_PIO;
202 dev->flags |= ATA_DFLAG_PIO;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400203 }
Alanb229a7b2007-01-24 11:47:07 +0000204 return 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400205}
206
207static struct scsi_host_template legacy_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900208 ATA_PIO_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400209};
210
Tejun Heo029cfd62008-03-25 12:22:49 +0900211static const struct ata_port_operations legacy_base_port_ops = {
212 .inherits = &ata_sff_port_ops,
213 .cable_detect = ata_cable_40wire,
214};
215
Jeff Garzik669a5db2006-08-29 18:12:40 -0400216/*
217 * These ops are used if the user indicates the hardware
218 * snoops the commands to decide on the mode and handles the
219 * mode selection "magically" itself. Several legacy controllers
220 * do this. The mode range can be set if it is not 0x1F by setting
221 * pio_mask as well.
222 */
223
224static struct ata_port_operations simple_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900225 .inherits = &legacy_base_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900226 .sff_data_xfer = ata_sff_data_xfer_noirq,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400227};
228
229static struct ata_port_operations legacy_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900230 .inherits = &legacy_base_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900231 .sff_data_xfer = ata_sff_data_xfer_noirq,
Tejun Heo029cfd62008-03-25 12:22:49 +0900232 .set_mode = legacy_set_mode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400233};
234
235/*
236 * Promise 20230C and 20620 support
237 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800238 * This controller supports PIO0 to PIO2. We set PIO timings
239 * conservatively to allow for 50MHz Vesa Local Bus. The 20620 DMA
240 * support is weird being DMA to controller and PIO'd to the host
241 * and not supported.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400242 */
243
244static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev)
245{
246 int tries = 5;
247 int pio = adev->pio_mode - XFER_PIO_0;
248 u8 rt;
249 unsigned long flags;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400250
Jeff Garzik669a5db2006-08-29 18:12:40 -0400251 /* Safe as UP only. Force I/Os to occur together */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400252
Jeff Garzik669a5db2006-08-29 18:12:40 -0400253 local_irq_save(flags);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400254
Jeff Garzik669a5db2006-08-29 18:12:40 -0400255 /* Unlock the control interface */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800256 do {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400257 inb(0x1F5);
258 outb(inb(0x1F2) | 0x80, 0x1F2);
259 inb(0x1F2);
260 inb(0x3F6);
261 inb(0x3F6);
262 inb(0x1F2);
263 inb(0x1F2);
264 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800265 while ((inb(0x1F2) & 0x80) && --tries);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400266
267 local_irq_restore(flags);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400268
Jeff Garzik669a5db2006-08-29 18:12:40 -0400269 outb(inb(0x1F4) & 0x07, 0x1F4);
270
271 rt = inb(0x1F3);
272 rt &= 0x07 << (3 * adev->devno);
273 if (pio)
274 rt |= (1 + 3 * pio) << (3 * adev->devno);
275
276 udelay(100);
277 outb(inb(0x1F2) | 0x01, 0x1F2);
278 udelay(100);
279 inb(0x1F5);
280
281}
282
Tejun Heo55dba312007-12-05 16:43:07 +0900283static unsigned int pdc_data_xfer_vlb(struct ata_device *dev,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800284 unsigned char *buf, unsigned int buflen, int rw)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400285{
Alan Coxc55af1f2009-02-11 13:08:42 -0800286 int slop = buflen & 3;
287 /* 32bit I/O capable *and* we need to write a whole number of dwords */
288 if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)) {
Tejun Heo55dba312007-12-05 16:43:07 +0900289 struct ata_port *ap = dev->link->ap;
Tejun Heo55dba312007-12-05 16:43:07 +0900290 unsigned long flags;
291
Jeff Garzik669a5db2006-08-29 18:12:40 -0400292 local_irq_save(flags);
293
294 /* Perform the 32bit I/O synchronization sequence */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900295 ioread8(ap->ioaddr.nsect_addr);
296 ioread8(ap->ioaddr.nsect_addr);
297 ioread8(ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400298
299 /* Now the data */
Tejun Heo55dba312007-12-05 16:43:07 +0900300 if (rw == READ)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900301 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
Tejun Heo55dba312007-12-05 16:43:07 +0900302 else
303 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400304
305 if (unlikely(slop)) {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700306 __le32 pad;
Tejun Heo55dba312007-12-05 16:43:07 +0900307 if (rw == READ) {
Al Virob50e56d2008-01-12 14:16:14 +0000308 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
Jeff Garzik669a5db2006-08-29 18:12:40 -0400309 memcpy(buf + buflen - slop, &pad, slop);
Tejun Heo55dba312007-12-05 16:43:07 +0900310 } else {
311 memcpy(&pad, buf + buflen - slop, slop);
312 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400313 }
Tejun Heo55dba312007-12-05 16:43:07 +0900314 buflen += 4 - slop;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400315 }
316 local_irq_restore(flags);
Tejun Heo55dba312007-12-05 16:43:07 +0900317 } else
Tejun Heo9363c382008-04-07 22:47:16 +0900318 buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw);
Tejun Heo55dba312007-12-05 16:43:07 +0900319
320 return buflen;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400321}
322
323static struct ata_port_operations pdc20230_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900324 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400325 .set_piomode = pdc20230_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900326 .sff_data_xfer = pdc_data_xfer_vlb,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400327};
328
329/*
330 * Holtek 6560A support
331 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800332 * This controller supports PIO0 to PIO2 (no IORDY even though higher
333 * timings can be loaded).
Jeff Garzik669a5db2006-08-29 18:12:40 -0400334 */
335
336static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev)
337{
338 u8 active, recover;
339 struct ata_timing t;
340
341 /* Get the timing data in cycles. For now play safe at 50Mhz */
342 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
343
Harvey Harrison07633b52008-05-14 16:17:00 -0700344 active = clamp_val(t.active, 2, 15);
345 recover = clamp_val(t.recover, 4, 15);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400346
347 inb(0x3E6);
348 inb(0x3E6);
349 inb(0x3E6);
350 inb(0x3E6);
351
Tejun Heo0d5ff562007-02-01 15:06:36 +0900352 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
353 ioread8(ap->ioaddr.status_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400354}
355
356static struct ata_port_operations ht6560a_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900357 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400358 .set_piomode = ht6560a_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400359};
360
361/*
362 * Holtek 6560B support
363 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800364 * This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO
365 * setting unless we see an ATAPI device in which case we force it off.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400366 *
367 * FIXME: need to implement 2nd channel support.
368 */
369
370static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev)
371{
372 u8 active, recover;
373 struct ata_timing t;
374
375 /* Get the timing data in cycles. For now play safe at 50Mhz */
376 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
377
Harvey Harrison07633b52008-05-14 16:17:00 -0700378 active = clamp_val(t.active, 2, 15);
379 recover = clamp_val(t.recover, 2, 16);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400380 recover &= 0x15;
381
382 inb(0x3E6);
383 inb(0x3E6);
384 inb(0x3E6);
385 inb(0x3E6);
386
Tejun Heo0d5ff562007-02-01 15:06:36 +0900387 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400388
389 if (adev->class != ATA_DEV_ATA) {
390 u8 rconf = inb(0x3E6);
391 if (rconf & 0x24) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800392 rconf &= ~0x24;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400393 outb(rconf, 0x3E6);
394 }
395 }
Tejun Heo0d5ff562007-02-01 15:06:36 +0900396 ioread8(ap->ioaddr.status_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400397}
398
399static struct ata_port_operations ht6560b_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900400 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400401 .set_piomode = ht6560b_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400402};
403
404/*
405 * Opti core chipset helpers
406 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400407
Jeff Garzik669a5db2006-08-29 18:12:40 -0400408/**
409 * opti_syscfg - read OPTI chipset configuration
410 * @reg: Configuration register to read
411 *
412 * Returns the value of an OPTI system board configuration register.
413 */
414
415static u8 opti_syscfg(u8 reg)
416{
417 unsigned long flags;
418 u8 r;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400419
Jeff Garzik669a5db2006-08-29 18:12:40 -0400420 /* Uniprocessor chipset and must force cycles adjancent */
421 local_irq_save(flags);
422 outb(reg, 0x22);
423 r = inb(0x24);
424 local_irq_restore(flags);
425 return r;
426}
427
428/*
429 * Opti 82C611A
430 *
431 * This controller supports PIO0 to PIO3.
432 */
433
Alan Coxdefc9cd2008-01-10 14:33:10 -0800434static void opti82c611a_set_piomode(struct ata_port *ap,
435 struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400436{
437 u8 active, recover, setup;
438 struct ata_timing t;
439 struct ata_device *pair = ata_dev_pair(adev);
440 int clock;
441 int khz[4] = { 50000, 40000, 33000, 25000 };
442 u8 rc;
443
444 /* Enter configuration mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900445 ioread16(ap->ioaddr.error_addr);
446 ioread16(ap->ioaddr.error_addr);
447 iowrite8(3, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400448
449 /* Read VLB clock strapping */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900450 clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400451
452 /* Get the timing data in cycles */
453 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
454
455 /* Setup timing is shared */
456 if (pair) {
457 struct ata_timing tp;
458 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
459
460 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
461 }
462
Harvey Harrison07633b52008-05-14 16:17:00 -0700463 active = clamp_val(t.active, 2, 17) - 2;
464 recover = clamp_val(t.recover, 1, 16) - 1;
465 setup = clamp_val(t.setup, 1, 4) - 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400466
467 /* Select the right timing bank for write timing */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900468 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400469 rc &= 0x7F;
470 rc |= (adev->devno << 7);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900471 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400472
473 /* Write the timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900474 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400475
476 /* Select the right bank for read timings, also
477 load the shared timings for address */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900478 rc = ioread8(ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400479 rc &= 0xC0;
480 rc |= adev->devno; /* Index select */
481 rc |= (setup << 4) | 0x04;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900482 iowrite8(rc, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400483
484 /* Load the read timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900485 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400486
487 /* Ensure the timing register mode is right */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900488 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400489 rc &= 0x73;
490 rc |= 0x84;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900491 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400492
493 /* Exit command mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900494 iowrite8(0x83, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400495}
496
497
498static struct ata_port_operations opti82c611a_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900499 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400500 .set_piomode = opti82c611a_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400501};
502
503/*
504 * Opti 82C465MV
505 *
506 * This controller supports PIO0 to PIO3. Unlike the 611A the MVB
507 * version is dual channel but doesn't have a lot of unique registers.
508 */
509
510static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev)
511{
512 u8 active, recover, setup;
513 struct ata_timing t;
514 struct ata_device *pair = ata_dev_pair(adev);
515 int clock;
516 int khz[4] = { 50000, 40000, 33000, 25000 };
517 u8 rc;
518 u8 sysclk;
519
520 /* Get the clock */
521 sysclk = opti_syscfg(0xAC) & 0xC0; /* BIOS set */
522
523 /* Enter configuration mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900524 ioread16(ap->ioaddr.error_addr);
525 ioread16(ap->ioaddr.error_addr);
526 iowrite8(3, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400527
528 /* Read VLB clock strapping */
529 clock = 1000000000 / khz[sysclk];
530
531 /* Get the timing data in cycles */
532 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
533
534 /* Setup timing is shared */
535 if (pair) {
536 struct ata_timing tp;
537 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
538
539 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
540 }
541
Harvey Harrison07633b52008-05-14 16:17:00 -0700542 active = clamp_val(t.active, 2, 17) - 2;
543 recover = clamp_val(t.recover, 1, 16) - 1;
544 setup = clamp_val(t.setup, 1, 4) - 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400545
546 /* Select the right timing bank for write timing */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900547 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400548 rc &= 0x7F;
549 rc |= (adev->devno << 7);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900550 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400551
552 /* Write the timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900553 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400554
555 /* Select the right bank for read timings, also
556 load the shared timings for address */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900557 rc = ioread8(ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400558 rc &= 0xC0;
559 rc |= adev->devno; /* Index select */
560 rc |= (setup << 4) | 0x04;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900561 iowrite8(rc, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400562
563 /* Load the read timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900564 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400565
566 /* Ensure the timing register mode is right */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900567 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400568 rc &= 0x73;
569 rc |= 0x84;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900570 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400571
572 /* Exit command mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900573 iowrite8(0x83, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400574
575 /* We need to know this for quad device on the MVB */
576 ap->host->private_data = ap;
577}
578
579/**
Tejun Heo9363c382008-04-07 22:47:16 +0900580 * opt82c465mv_qc_issue - command issue
Jeff Garzik669a5db2006-08-29 18:12:40 -0400581 * @qc: command pending
582 *
583 * Called when the libata layer is about to issue a command. We wrap
584 * this interface so that we can load the correct ATA timings. The
585 * MVB has a single set of timing registers and these are shared
586 * across channels. As there are two registers we really ought to
587 * track the last two used values as a sort of register window. For
588 * now we just reload on a channel switch. On the single channel
589 * setup this condition never fires so we do nothing extra.
590 *
591 * FIXME: dual channel needs ->serialize support
592 */
593
Tejun Heo9363c382008-04-07 22:47:16 +0900594static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400595{
596 struct ata_port *ap = qc->ap;
597 struct ata_device *adev = qc->dev;
598
599 /* If timings are set and for the wrong channel (2nd test is
600 due to a libata shortcoming and will eventually go I hope) */
601 if (ap->host->private_data != ap->host
602 && ap->host->private_data != NULL)
603 opti82c46x_set_piomode(ap, adev);
604
Tejun Heo9363c382008-04-07 22:47:16 +0900605 return ata_sff_qc_issue(qc);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400606}
607
608static struct ata_port_operations opti82c46x_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900609 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400610 .set_piomode = opti82c46x_set_piomode,
Tejun Heo9363c382008-04-07 22:47:16 +0900611 .qc_issue = opti82c46x_qc_issue,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400612};
613
Alan Coxdefc9cd2008-01-10 14:33:10 -0800614static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
615{
616 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800617 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800618 int active, recovery;
619 u8 timing;
620
621 /* Get the timing data in cycles */
622 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
623
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800624 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700625 active = 8 - clamp_val(t.active, 1, 8);
626 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800627 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700628 active = 9 - clamp_val(t.active, 2, 9);
629 recovery = 15 - clamp_val(t.recover, 0, 15);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800630 }
631 timing = (recovery << 4) | active | 0x08;
632
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800633 ld_qdi->clock[adev->devno] = timing;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800634
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800635 outb(timing, ld_qdi->timing);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800636}
Jeff Garzik669a5db2006-08-29 18:12:40 -0400637
638/**
Alan Coxdefc9cd2008-01-10 14:33:10 -0800639 * qdi6580dp_set_piomode - PIO setup for dual channel
640 * @ap: Port
641 * @adev: Device
Jeff Garzik669a5db2006-08-29 18:12:40 -0400642 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800643 * In dual channel mode the 6580 has one clock per channel and we have
Tejun Heo9363c382008-04-07 22:47:16 +0900644 * to software clockswitch in qc_issue.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400645 */
646
Alan Coxdefc9cd2008-01-10 14:33:10 -0800647static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400648{
Alan Coxdefc9cd2008-01-10 14:33:10 -0800649 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800650 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800651 int active, recovery;
652 u8 timing;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400653
Alan Coxdefc9cd2008-01-10 14:33:10 -0800654 /* Get the timing data in cycles */
655 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
Tejun Heo24dc5f32007-01-20 16:00:28 +0900656
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800657 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700658 active = 8 - clamp_val(t.active, 1, 8);
659 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800660 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700661 active = 9 - clamp_val(t.active, 2, 9);
662 recovery = 15 - clamp_val(t.recover, 0, 15);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400663 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800664 timing = (recovery << 4) | active | 0x08;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400665
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800666 ld_qdi->clock[adev->devno] = timing;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400667
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800668 outb(timing, ld_qdi->timing + 2 * ap->port_no);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800669 /* Clear the FIFO */
670 if (adev->class != ATA_DEV_ATA)
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800671 outb(0x5F, ld_qdi->timing + 3);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800672}
673
674/**
675 * qdi6580_set_piomode - PIO setup for single channel
676 * @ap: Port
677 * @adev: Device
678 *
679 * In single channel mode the 6580 has one clock per device and we can
680 * avoid the requirement to clock switch. We also have to load the timing
681 * into the right clock according to whether we are master or slave.
682 */
683
684static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
685{
686 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800687 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800688 int active, recovery;
689 u8 timing;
690
691 /* Get the timing data in cycles */
692 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
693
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800694 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700695 active = 8 - clamp_val(t.active, 1, 8);
696 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800697 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700698 active = 9 - clamp_val(t.active, 2, 9);
699 recovery = 15 - clamp_val(t.recover, 0, 15);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800700 }
701 timing = (recovery << 4) | active | 0x08;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800702 ld_qdi->clock[adev->devno] = timing;
703 outb(timing, ld_qdi->timing + 2 * adev->devno);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800704 /* Clear the FIFO */
705 if (adev->class != ATA_DEV_ATA)
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800706 outb(0x5F, ld_qdi->timing + 3);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800707}
708
709/**
Tejun Heo9363c382008-04-07 22:47:16 +0900710 * qdi_qc_issue - command issue
Alan Coxdefc9cd2008-01-10 14:33:10 -0800711 * @qc: command pending
712 *
713 * Called when the libata layer is about to issue a command. We wrap
714 * this interface so that we can load the correct ATA timings.
715 */
716
Tejun Heo9363c382008-04-07 22:47:16 +0900717static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800718{
719 struct ata_port *ap = qc->ap;
720 struct ata_device *adev = qc->dev;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800721 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800722
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800723 if (ld_qdi->clock[adev->devno] != ld_qdi->last) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800724 if (adev->pio_mode) {
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800725 ld_qdi->last = ld_qdi->clock[adev->devno];
726 outb(ld_qdi->clock[adev->devno], ld_qdi->timing +
Alan Coxdefc9cd2008-01-10 14:33:10 -0800727 2 * ap->port_no);
728 }
729 }
Tejun Heo9363c382008-04-07 22:47:16 +0900730 return ata_sff_qc_issue(qc);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800731}
732
Alan Coxb8325482008-01-19 15:47:23 +0000733static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800734 unsigned int buflen, int rw)
735{
736 struct ata_port *ap = adev->link->ap;
737 int slop = buflen & 3;
738
Alan Coxc55af1f2009-02-11 13:08:42 -0800739 if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3)) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800740 if (rw == WRITE)
741 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
742 else
743 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
744
745 if (unlikely(slop)) {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700746 __le32 pad;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800747 if (rw == WRITE) {
748 memcpy(&pad, buf + buflen - slop, slop);
Harvey Harrison6ad67402008-06-18 17:16:43 -0700749 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800750 } else {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700751 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
Alan Coxdefc9cd2008-01-10 14:33:10 -0800752 memcpy(buf + buflen - slop, &pad, slop);
753 }
754 }
755 return (buflen + 3) & ~3;
756 } else
Tejun Heo9363c382008-04-07 22:47:16 +0900757 return ata_sff_data_xfer(adev, buf, buflen, rw);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800758}
759
Alan Coxb8325482008-01-19 15:47:23 +0000760static int qdi_port(struct platform_device *dev,
761 struct legacy_probe *lp, struct legacy_data *ld)
762{
763 if (devm_request_region(&dev->dev, lp->private, 4, "qdi") == NULL)
764 return -EBUSY;
765 ld->timing = lp->private;
766 return 0;
767}
768
Alan Coxdefc9cd2008-01-10 14:33:10 -0800769static struct ata_port_operations qdi6500_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900770 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800771 .set_piomode = qdi6500_set_piomode,
Tejun Heo9363c382008-04-07 22:47:16 +0900772 .qc_issue = qdi_qc_issue,
Tejun Heo5682ed32008-04-07 22:47:16 +0900773 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800774};
775
776static struct ata_port_operations qdi6580_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900777 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800778 .set_piomode = qdi6580_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900779 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800780};
781
782static struct ata_port_operations qdi6580dp_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900783 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800784 .set_piomode = qdi6580dp_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900785 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800786};
787
Alan Coxb8325482008-01-19 15:47:23 +0000788static DEFINE_SPINLOCK(winbond_lock);
789
790static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
791{
792 unsigned long flags;
793 spin_lock_irqsave(&winbond_lock, flags);
794 outb(reg, port + 0x01);
795 outb(val, port + 0x02);
796 spin_unlock_irqrestore(&winbond_lock, flags);
797}
798
799static u8 winbond_readcfg(unsigned long port, u8 reg)
800{
801 u8 val;
802
803 unsigned long flags;
804 spin_lock_irqsave(&winbond_lock, flags);
805 outb(reg, port + 0x01);
806 val = inb(port + 0x02);
807 spin_unlock_irqrestore(&winbond_lock, flags);
808
809 return val;
810}
811
812static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
813{
814 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800815 struct legacy_data *ld_winbond = ap->host->private_data;
Alan Coxb8325482008-01-19 15:47:23 +0000816 int active, recovery;
817 u8 reg;
818 int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
819
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800820 reg = winbond_readcfg(ld_winbond->timing, 0x81);
Alan Coxb8325482008-01-19 15:47:23 +0000821
822 /* Get the timing data in cycles */
823 if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
824 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
825 else
826 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
827
Harvey Harrison07633b52008-05-14 16:17:00 -0700828 active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;
829 recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;
Alan Coxb8325482008-01-19 15:47:23 +0000830 timing = (active << 4) | recovery;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800831 winbond_writecfg(ld_winbond->timing, timing, reg);
Alan Coxb8325482008-01-19 15:47:23 +0000832
833 /* Load the setup timing */
834
835 reg = 0x35;
836 if (adev->class != ATA_DEV_ATA)
837 reg |= 0x08; /* FIFO off */
838 if (!ata_pio_need_iordy(adev))
839 reg |= 0x02; /* IORDY off */
Harvey Harrison07633b52008-05-14 16:17:00 -0700840 reg |= (clamp_val(t.setup, 0, 3) << 6);
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800841 winbond_writecfg(ld_winbond->timing, timing + 1, reg);
Alan Coxb8325482008-01-19 15:47:23 +0000842}
843
844static int winbond_port(struct platform_device *dev,
845 struct legacy_probe *lp, struct legacy_data *ld)
846{
847 if (devm_request_region(&dev->dev, lp->private, 4, "winbond") == NULL)
848 return -EBUSY;
849 ld->timing = lp->private;
850 return 0;
851}
852
853static struct ata_port_operations winbond_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900854 .inherits = &legacy_base_port_ops,
Alan Coxb8325482008-01-19 15:47:23 +0000855 .set_piomode = winbond_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900856 .sff_data_xfer = vlb32_data_xfer,
Alan Coxb8325482008-01-19 15:47:23 +0000857};
858
Alan Coxdefc9cd2008-01-10 14:33:10 -0800859static struct legacy_controller controllers[] = {
860 {"BIOS", &legacy_port_ops, 0x1F,
861 ATA_FLAG_NO_IORDY, NULL },
862 {"Snooping", &simple_port_ops, 0x1F,
863 0 , NULL },
864 {"PDC20230", &pdc20230_port_ops, 0x7,
865 ATA_FLAG_NO_IORDY, NULL },
866 {"HT6560A", &ht6560a_port_ops, 0x07,
867 ATA_FLAG_NO_IORDY, NULL },
868 {"HT6560B", &ht6560b_port_ops, 0x1F,
869 ATA_FLAG_NO_IORDY, NULL },
870 {"OPTI82C611A", &opti82c611a_port_ops, 0x0F,
871 0 , NULL },
872 {"OPTI82C46X", &opti82c46x_port_ops, 0x0F,
873 0 , NULL },
874 {"QDI6500", &qdi6500_port_ops, 0x07,
Alan Coxb8325482008-01-19 15:47:23 +0000875 ATA_FLAG_NO_IORDY, qdi_port },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800876 {"QDI6580", &qdi6580_port_ops, 0x1F,
Alan Coxb8325482008-01-19 15:47:23 +0000877 0 , qdi_port },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800878 {"QDI6580DP", &qdi6580dp_port_ops, 0x1F,
Alan Coxb8325482008-01-19 15:47:23 +0000879 0 , qdi_port },
880 {"W83759A", &winbond_port_ops, 0x1F,
881 0 , winbond_port }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800882};
883
884/**
885 * probe_chip_type - Discover controller
886 * @probe: Probe entry to check
887 *
888 * Probe an ATA port and identify the type of controller. We don't
889 * check if the controller appears to be driveless at this point.
890 */
891
Alan Coxb8325482008-01-19 15:47:23 +0000892static __init int probe_chip_type(struct legacy_probe *probe)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800893{
894 int mask = 1 << probe->slot;
895
Alan Coxb8325482008-01-19 15:47:23 +0000896 if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {
897 u8 reg = winbond_readcfg(winbond, 0x81);
898 reg |= 0x80; /* jumpered mode off */
899 winbond_writecfg(winbond, 0x81, reg);
900 reg = winbond_readcfg(winbond, 0x83);
901 reg |= 0xF0; /* local control */
902 winbond_writecfg(winbond, 0x83, reg);
903 reg = winbond_readcfg(winbond, 0x85);
904 reg |= 0xF0; /* programmable timing */
905 winbond_writecfg(winbond, 0x85, reg);
906
907 reg = winbond_readcfg(winbond, 0x81);
908
909 if (reg & mask)
910 return W83759A;
911 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800912 if (probe->port == 0x1F0) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400913 unsigned long flags;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400914 local_irq_save(flags);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400915 /* Probes */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400916 outb(inb(0x1F2) | 0x80, 0x1F2);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800917 inb(0x1F5);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400918 inb(0x1F2);
919 inb(0x3F6);
920 inb(0x3F6);
921 inb(0x1F2);
922 inb(0x1F2);
923
924 if ((inb(0x1F2) & 0x80) == 0) {
925 /* PDC20230c or 20630 ? */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800926 printk(KERN_INFO "PDC20230-C/20630 VLB ATA controller"
927 " detected.\n");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400928 udelay(100);
929 inb(0x1F5);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800930 local_irq_restore(flags);
931 return PDC20230;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400932 } else {
933 outb(0x55, 0x1F2);
934 inb(0x1F2);
935 inb(0x1F2);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800936 if (inb(0x1F2) == 0x00)
937 printk(KERN_INFO "PDC20230-B VLB ATA "
938 "controller detected.\n");
939 local_irq_restore(flags);
940 return BIOS;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400941 }
942 local_irq_restore(flags);
943 }
944
Alan Coxdefc9cd2008-01-10 14:33:10 -0800945 if (ht6560a & mask)
946 return HT6560A;
947 if (ht6560b & mask)
948 return HT6560B;
949 if (opti82c611a & mask)
950 return OPTI611A;
951 if (opti82c46x & mask)
952 return OPTI46X;
953 if (autospeed & mask)
954 return SNOOP;
955 return BIOS;
956}
Jeff Garzik669a5db2006-08-29 18:12:40 -0400957
Alan Coxdefc9cd2008-01-10 14:33:10 -0800958
959/**
960 * legacy_init_one - attach a legacy interface
961 * @pl: probe record
962 *
963 * Register an ISA bus IDE interface. Such interfaces are PIO and we
964 * assume do not support IRQ sharing.
965 */
966
967static __init int legacy_init_one(struct legacy_probe *probe)
968{
969 struct legacy_controller *controller = &controllers[probe->type];
970 int pio_modes = controller->pio_mask;
971 unsigned long io = probe->port;
972 u32 mask = (1 << probe->slot);
973 struct ata_port_operations *ops = controller->ops;
974 struct legacy_data *ld = &legacy_data[probe->slot];
975 struct ata_host *host = NULL;
976 struct ata_port *ap;
977 struct platform_device *pdev;
978 struct ata_device *dev;
979 void __iomem *io_addr, *ctrl_addr;
980 u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY;
981 int ret;
982
983 iordy |= controller->flags;
984
985 pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0);
986 if (IS_ERR(pdev))
987 return PTR_ERR(pdev);
988
989 ret = -EBUSY;
990 if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL ||
991 devm_request_region(&pdev->dev, io + 0x0206, 1,
992 "pata_legacy") == NULL)
993 goto fail;
Alan Coxf834e492007-02-07 13:46:00 -0800994
Tejun Heo5d728822007-04-17 23:44:08 +0900995 ret = -ENOMEM;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800996 io_addr = devm_ioport_map(&pdev->dev, io, 8);
997 ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1);
998 if (!io_addr || !ctrl_addr)
999 goto fail;
1000 if (controller->setup)
Alan Coxb8325482008-01-19 15:47:23 +00001001 if (controller->setup(pdev, probe, ld) < 0)
Alan Coxdefc9cd2008-01-10 14:33:10 -08001002 goto fail;
Tejun Heo5d728822007-04-17 23:44:08 +09001003 host = ata_host_alloc(&pdev->dev, 1);
1004 if (!host)
1005 goto fail;
1006 ap = host->ports[0];
Jeff Garzik669a5db2006-08-29 18:12:40 -04001007
Tejun Heo5d728822007-04-17 23:44:08 +09001008 ap->ops = ops;
1009 ap->pio_mask = pio_modes;
1010 ap->flags |= ATA_FLAG_SLAVE_POSS | iordy;
1011 ap->ioaddr.cmd_addr = io_addr;
1012 ap->ioaddr.altstatus_addr = ctrl_addr;
1013 ap->ioaddr.ctl_addr = ctrl_addr;
Tejun Heo9363c382008-04-07 22:47:16 +09001014 ata_sff_std_ports(&ap->ioaddr);
Alan Coxb8325482008-01-19 15:47:23 +00001015 ap->host->private_data = ld;
Tejun Heo5d728822007-04-17 23:44:08 +09001016
Alan Coxdefc9cd2008-01-10 14:33:10 -08001017 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);
Tejun Heocbcdd872007-08-18 13:14:55 +09001018
Tejun Heo9363c382008-04-07 22:47:16 +09001019 ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,
1020 &legacy_sht);
Tejun Heo5d728822007-04-17 23:44:08 +09001021 if (ret)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001022 goto fail;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001023 ld->platform_dev = pdev;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001024
Alan Coxdefc9cd2008-01-10 14:33:10 -08001025 /* Nothing found means we drop the port as its probably not there */
1026
1027 ret = -ENODEV;
Tejun Heo1eca4362008-11-03 20:03:17 +09001028 ata_for_each_dev(dev, &ap->link, ALL) {
Alan Coxdefc9cd2008-01-10 14:33:10 -08001029 if (!ata_dev_absent(dev)) {
1030 legacy_host[probe->slot] = host;
1031 ld->platform_dev = pdev;
1032 return 0;
1033 }
1034 }
Jeff Garzik669a5db2006-08-29 18:12:40 -04001035fail:
1036 platform_device_unregister(pdev);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001037 return ret;
1038}
1039
1040/**
1041 * legacy_check_special_cases - ATA special cases
1042 * @p: PCI device to check
1043 * @master: set this if we find an ATA master
1044 * @master: set this if we find an ATA secondary
1045 *
Alan Coxdefc9cd2008-01-10 14:33:10 -08001046 * A small number of vendors implemented early PCI ATA interfaces
1047 * on bridge logic without the ATA interface being PCI visible.
1048 * Where we have a matching PCI driver we must skip the relevant
1049 * device here. If we don't know about it then the legacy driver
1050 * is the right driver anyway.
Jeff Garzik669a5db2006-08-29 18:12:40 -04001051 */
1052
Alan Coxb8325482008-01-19 15:47:23 +00001053static void __init legacy_check_special_cases(struct pci_dev *p, int *primary,
Alan Coxdefc9cd2008-01-10 14:33:10 -08001054 int *secondary)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001055{
1056 /* Cyrix CS5510 pre SFF MWDMA ATA on the bridge */
1057 if (p->vendor == 0x1078 && p->device == 0x0000) {
1058 *primary = *secondary = 1;
1059 return;
1060 }
1061 /* Cyrix CS5520 pre SFF MWDMA ATA on the bridge */
1062 if (p->vendor == 0x1078 && p->device == 0x0002) {
1063 *primary = *secondary = 1;
1064 return;
1065 }
1066 /* Intel MPIIX - PIO ATA on non PCI side of bridge */
1067 if (p->vendor == 0x8086 && p->device == 0x1234) {
1068 u16 r;
1069 pci_read_config_word(p, 0x6C, &r);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001070 if (r & 0x8000) {
1071 /* ATA port enabled */
Jeff Garzik669a5db2006-08-29 18:12:40 -04001072 if (r & 0x4000)
1073 *secondary = 1;
1074 else
1075 *primary = 1;
1076 }
1077 return;
1078 }
1079}
1080
Alan Coxdefc9cd2008-01-10 14:33:10 -08001081static __init void probe_opti_vlb(void)
1082{
1083 /* If an OPTI 82C46X is present find out where the channels are */
1084 static const char *optis[4] = {
1085 "3/463MV", "5MV",
1086 "5MVA", "5MVB"
1087 };
1088 u8 chans = 1;
1089 u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6;
1090
1091 opti82c46x = 3; /* Assume master and slave first */
1092 printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n",
1093 optis[ctrl]);
1094 if (ctrl == 3)
1095 chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1;
1096 ctrl = opti_syscfg(0xAC);
1097 /* Check enabled and this port is the 465MV port. On the
1098 MVB we may have two channels */
1099 if (ctrl & 8) {
1100 if (chans == 2) {
1101 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1102 legacy_probe_add(0x170, 15, OPTI46X, 0);
1103 }
1104 if (ctrl & 4)
1105 legacy_probe_add(0x170, 15, OPTI46X, 0);
1106 else
1107 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1108 } else
1109 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1110}
1111
1112static __init void qdi65_identify_port(u8 r, u8 res, unsigned long port)
1113{
1114 static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
1115 /* Check card type */
1116 if ((r & 0xF0) == 0xC0) {
1117 /* QD6500: single channel */
Alan Coxb8325482008-01-19 15:47:23 +00001118 if (r & 8)
Alan Coxdefc9cd2008-01-10 14:33:10 -08001119 /* Disabled ? */
Alan Coxdefc9cd2008-01-10 14:33:10 -08001120 return;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001121 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1122 QDI6500, port);
1123 }
1124 if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
1125 /* QD6580: dual channel */
1126 if (!request_region(port + 2 , 2, "pata_qdi")) {
1127 release_region(port, 2);
1128 return;
1129 }
1130 res = inb(port + 3);
1131 /* Single channel mode ? */
1132 if (res & 1)
1133 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1134 QDI6580, port);
1135 else { /* Dual channel mode */
1136 legacy_probe_add(0x1F0, 14, QDI6580DP, port);
1137 /* port + 0x02, r & 0x04 */
1138 legacy_probe_add(0x170, 15, QDI6580DP, port + 2);
1139 }
Alan Coxb8325482008-01-19 15:47:23 +00001140 release_region(port + 2, 2);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001141 }
1142}
1143
1144static __init void probe_qdi_vlb(void)
1145{
1146 unsigned long flags;
1147 static const unsigned long qd_port[2] = { 0x30, 0xB0 };
1148 int i;
1149
1150 /*
1151 * Check each possible QD65xx base address
1152 */
1153
1154 for (i = 0; i < 2; i++) {
1155 unsigned long port = qd_port[i];
1156 u8 r, res;
1157
1158
1159 if (request_region(port, 2, "pata_qdi")) {
1160 /* Check for a card */
1161 local_irq_save(flags);
1162 /* I have no h/w that needs this delay but it
1163 is present in the historic code */
1164 r = inb(port);
1165 udelay(1);
1166 outb(0x19, port);
1167 udelay(1);
1168 res = inb(port);
1169 udelay(1);
1170 outb(r, port);
1171 udelay(1);
1172 local_irq_restore(flags);
1173
1174 /* Fail */
1175 if (res == 0x19) {
1176 release_region(port, 2);
1177 continue;
1178 }
1179 /* Passes the presence test */
1180 r = inb(port + 1);
1181 udelay(1);
1182 /* Check port agrees with port set */
Alan Coxb8325482008-01-19 15:47:23 +00001183 if ((r & 2) >> 1 == i)
1184 qdi65_identify_port(r, res, port);
1185 release_region(port, 2);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001186 }
1187 }
1188}
Jeff Garzik669a5db2006-08-29 18:12:40 -04001189
1190/**
1191 * legacy_init - attach legacy interfaces
1192 *
1193 * Attach legacy IDE interfaces by scanning the usual IRQ/port suspects.
1194 * Right now we do not scan the ide0 and ide1 address but should do so
1195 * for non PCI systems or systems with no PCI IDE legacy mode devices.
1196 * If you fix that note there are special cases to consider like VLB
1197 * drivers and CS5510/20.
1198 */
1199
1200static __init int legacy_init(void)
1201{
1202 int i;
1203 int ct = 0;
1204 int primary = 0;
1205 int secondary = 0;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001206 int pci_present = 0;
1207 struct legacy_probe *pl = &probe_list[0];
1208 int slot = 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001209
1210 struct pci_dev *p = NULL;
1211
1212 for_each_pci_dev(p) {
1213 int r;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001214 /* Check for any overlap of the system ATA mappings. Native
1215 mode controllers stuck on these addresses or some devices
1216 in 'raid' mode won't be found by the storage class test */
Jeff Garzik669a5db2006-08-29 18:12:40 -04001217 for (r = 0; r < 6; r++) {
1218 if (pci_resource_start(p, r) == 0x1f0)
1219 primary = 1;
1220 if (pci_resource_start(p, r) == 0x170)
1221 secondary = 1;
1222 }
1223 /* Check for special cases */
1224 legacy_check_special_cases(p, &primary, &secondary);
1225
Alan Coxdefc9cd2008-01-10 14:33:10 -08001226 /* If PCI bus is present then don't probe for tertiary
1227 legacy ports */
1228 pci_present = 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001229 }
1230
Alan Coxb8325482008-01-19 15:47:23 +00001231 if (winbond == 1)
1232 winbond = 0x130; /* Default port, alt is 1B0 */
1233
Alan Coxdefc9cd2008-01-10 14:33:10 -08001234 if (primary == 0 || all)
1235 legacy_probe_add(0x1F0, 14, UNKNOWN, 0);
1236 if (secondary == 0 || all)
1237 legacy_probe_add(0x170, 15, UNKNOWN, 0);
Jeff Garzik85cd7252006-08-31 00:03:49 -04001238
Alan Coxdefc9cd2008-01-10 14:33:10 -08001239 if (probe_all || !pci_present) {
1240 /* ISA/VLB extra ports */
1241 legacy_probe_add(0x1E8, 11, UNKNOWN, 0);
1242 legacy_probe_add(0x168, 10, UNKNOWN, 0);
1243 legacy_probe_add(0x1E0, 8, UNKNOWN, 0);
1244 legacy_probe_add(0x160, 12, UNKNOWN, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001245 }
1246
Alan Coxdefc9cd2008-01-10 14:33:10 -08001247 if (opti82c46x)
1248 probe_opti_vlb();
1249 if (qdi)
1250 probe_qdi_vlb();
1251
Alan Coxdefc9cd2008-01-10 14:33:10 -08001252 for (i = 0; i < NR_HOST; i++, pl++) {
1253 if (pl->port == 0)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001254 continue;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001255 if (pl->type == UNKNOWN)
1256 pl->type = probe_chip_type(pl);
1257 pl->slot = slot++;
1258 if (legacy_init_one(pl) == 0)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001259 ct++;
1260 }
1261 if (ct != 0)
1262 return 0;
1263 return -ENODEV;
1264}
1265
1266static __exit void legacy_exit(void)
1267{
1268 int i;
1269
1270 for (i = 0; i < nr_legacy_host; i++) {
1271 struct legacy_data *ld = &legacy_data[i];
Tejun Heo24dc5f32007-01-20 16:00:28 +09001272 ata_host_detach(legacy_host[i]);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001273 platform_device_unregister(ld->platform_dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001274 }
1275}
1276
1277MODULE_AUTHOR("Alan Cox");
1278MODULE_DESCRIPTION("low-level driver for legacy ATA");
1279MODULE_LICENSE("GPL");
1280MODULE_VERSION(DRV_VERSION);
1281
1282module_param(probe_all, int, 0);
1283module_param(autospeed, int, 0);
1284module_param(ht6560a, int, 0);
1285module_param(ht6560b, int, 0);
1286module_param(opti82c611a, int, 0);
1287module_param(opti82c46x, int, 0);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001288module_param(qdi, int, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001289module_param(pio_mask, int, 0);
Alan Coxf834e492007-02-07 13:46:00 -08001290module_param(iordy_mask, int, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001291
1292module_init(legacy_init);
1293module_exit(legacy_exit);