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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Terje Bergstrom4231c6b2013-03-22 16:34:05 +020010#ifndef HOST1X_DRM_H
11#define HOST1X_DRM_H 1
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000012
Thierry Redinge1e90642013-09-24 13:59:01 +020013#include <uapi/drm/tegra_drm.h>
14#include <linux/host1x.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include <drm/drmP.h>
17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_fb_helper.h>
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000020#include <drm/drm_fixed.h>
21
Thierry Redingc134f012014-06-03 14:48:12 +020022#include "gem.h"
23
Stephen Warrenca480802013-11-06 16:20:54 -070024struct reset_control;
25
Arto Merilainende2ba662013-03-22 16:34:08 +020026struct tegra_fb {
27 struct drm_framebuffer base;
28 struct tegra_bo **planes;
29 unsigned int num_planes;
30};
31
Thierry Reding60c2f702013-10-31 13:28:50 +010032#ifdef CONFIG_DRM_TEGRA_FBDEV
Arto Merilainende2ba662013-03-22 16:34:08 +020033struct tegra_fbdev {
34 struct drm_fb_helper base;
35 struct tegra_fb *fb;
36};
Thierry Reding60c2f702013-10-31 13:28:50 +010037#endif
Arto Merilainende2ba662013-03-22 16:34:08 +020038
Thierry Reding386a2a72013-09-24 13:22:17 +020039struct tegra_drm {
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000040 struct drm_device *drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000041
Thierry Redingdf06b752014-06-26 21:41:53 +020042 struct iommu_domain *domain;
43 struct drm_mm mm;
44
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000045 struct mutex clients_lock;
46 struct list_head clients;
47
Thierry Reding60c2f702013-10-31 13:28:50 +010048#ifdef CONFIG_DRM_TEGRA_FBDEV
Arto Merilainende2ba662013-03-22 16:34:08 +020049 struct tegra_fbdev *fbdev;
Thierry Reding60c2f702013-10-31 13:28:50 +010050#endif
Thierry Redingd1f3e1e2014-07-11 08:29:14 +020051
52 unsigned int pitch_align;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000053};
54
Thierry Reding53fa7f72013-09-24 15:35:40 +020055struct tegra_drm_client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000056
Thierry Redingc88c3632013-09-26 16:08:22 +020057struct tegra_drm_context {
Thierry Reding53fa7f72013-09-24 15:35:40 +020058 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +020059 struct host1x_channel *channel;
60 struct list_head list;
61};
62
Thierry Reding53fa7f72013-09-24 15:35:40 +020063struct tegra_drm_client_ops {
64 int (*open_channel)(struct tegra_drm_client *client,
Thierry Redingc88c3632013-09-26 16:08:22 +020065 struct tegra_drm_context *context);
66 void (*close_channel)(struct tegra_drm_context *context);
Thierry Redingc40f0f12013-10-10 11:00:33 +020067 int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
Thierry Redingc88c3632013-09-26 16:08:22 +020068 int (*submit)(struct tegra_drm_context *context,
Terje Bergstromd43f81c2013-03-22 16:34:09 +020069 struct drm_tegra_submit *args, struct drm_device *drm,
70 struct drm_file *file);
71};
72
Thierry Redingc40f0f12013-10-10 11:00:33 +020073int tegra_drm_submit(struct tegra_drm_context *context,
74 struct drm_tegra_submit *args, struct drm_device *drm,
75 struct drm_file *file);
76
Thierry Reding53fa7f72013-09-24 15:35:40 +020077struct tegra_drm_client {
78 struct host1x_client base;
Thierry Reding776dc382013-10-14 14:43:22 +020079 struct list_head list;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000080
Thierry Reding53fa7f72013-09-24 15:35:40 +020081 const struct tegra_drm_client_ops *ops;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000082};
83
Thierry Reding53fa7f72013-09-24 15:35:40 +020084static inline struct tegra_drm_client *
Thierry Reding776dc382013-10-14 14:43:22 +020085host1x_to_drm_client(struct host1x_client *client)
Thierry Reding53fa7f72013-09-24 15:35:40 +020086{
87 return container_of(client, struct tegra_drm_client, base);
88}
89
Thierry Reding688c59a2014-04-16 09:54:21 +020090int tegra_drm_register_client(struct tegra_drm *tegra,
91 struct tegra_drm_client *client);
92int tegra_drm_unregister_client(struct tegra_drm *tegra,
93 struct tegra_drm_client *client);
Thierry Reding776dc382013-10-14 14:43:22 +020094
Thierry Reding688c59a2014-04-16 09:54:21 +020095int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
96int tegra_drm_exit(struct tegra_drm *tegra);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000097
Thierry Reding8620fc62013-12-12 11:03:59 +010098struct tegra_dc_soc_info;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000099struct tegra_output;
100
101struct tegra_dc {
Thierry Reding776dc382013-10-14 14:43:22 +0200102 struct host1x_client client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000103 struct device *dev;
Thierry Redingd18d3032013-09-26 16:09:19 +0200104 spinlock_t lock;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000105
106 struct drm_crtc base;
Thierry Reding9c012702014-07-07 15:32:53 +0200107 int powergate;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000108 int pipe;
109
110 struct clk *clk;
Stephen Warrenca480802013-11-06 16:20:54 -0700111 struct reset_control *rst;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000112 void __iomem *regs;
113 int irq;
114
115 struct tegra_output *rgb;
116
117 struct list_head list;
118
119 struct drm_info_list *debugfs_files;
120 struct drm_minor *minor;
121 struct dentry *debugfs;
Thierry Reding3c03c462012-11-28 12:00:18 +0100122
123 /* page-flip handling */
124 struct drm_pending_vblank_event *event;
Thierry Reding8620fc62013-12-12 11:03:59 +0100125
126 const struct tegra_dc_soc_info *soc;
Thierry Redingdf06b752014-06-26 21:41:53 +0200127
128 struct iommu_domain *domain;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000129};
130
Thierry Reding53fa7f72013-09-24 15:35:40 +0200131static inline struct tegra_dc *
Thierry Reding776dc382013-10-14 14:43:22 +0200132host1x_client_to_dc(struct host1x_client *client)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000133{
134 return container_of(client, struct tegra_dc, client);
135}
136
137static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
138{
Thierry Reding37826512013-11-08 12:30:37 +0100139 return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000140}
141
Thierry Reding03a60562014-10-21 13:48:48 +0200142static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value,
143 unsigned long offset)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000144{
Thierry Reding03a60562014-10-21 13:48:48 +0200145 writel(value, dc->regs + (offset << 2));
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000146}
147
Thierry Reding03a60562014-10-21 13:48:48 +0200148static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned long offset)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000149{
Thierry Reding03a60562014-10-21 13:48:48 +0200150 return readl(dc->regs + (offset << 2));
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000151}
152
Thierry Redingf34bc782012-11-04 21:47:13 +0100153struct tegra_dc_window {
154 struct {
155 unsigned int x;
156 unsigned int y;
157 unsigned int w;
158 unsigned int h;
159 } src;
160 struct {
161 unsigned int x;
162 unsigned int y;
163 unsigned int w;
164 unsigned int h;
165 } dst;
166 unsigned int bits_per_pixel;
167 unsigned int format;
Thierry Redingf9253902014-01-29 20:31:17 +0100168 unsigned int swap;
Thierry Redingf34bc782012-11-04 21:47:13 +0100169 unsigned int stride[2];
170 unsigned long base[3];
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200171 bool bottom_up;
Thierry Redingc134f012014-06-03 14:48:12 +0200172
173 struct tegra_bo_tiling tiling;
Thierry Redingf34bc782012-11-04 21:47:13 +0100174};
175
176/* from dc.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200177void tegra_dc_enable_vblank(struct tegra_dc *dc);
178void tegra_dc_disable_vblank(struct tegra_dc *dc);
179void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
Thierry Reding62b9e062014-11-21 17:33:33 +0100180void tegra_dc_commit(struct tegra_dc *dc);
Thierry Redingc5a107d2014-12-02 15:15:06 +0100181int tegra_dc_setup_clock(struct tegra_dc *dc, struct clk *parent,
182 unsigned long pclk, unsigned int div);
Thierry Redingca915b12014-12-08 16:14:45 +0100183int tegra_dc_state_setup_clock(struct tegra_dc *dc,
184 struct drm_crtc_state *crtc_state,
185 struct clk *clk, unsigned long pclk,
186 unsigned int div);
Thierry Redingf34bc782012-11-04 21:47:13 +0100187
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000188struct tegra_output {
189 struct device_node *of_node;
190 struct device *dev;
191
Thierry Reding9be7d862013-08-30 15:22:36 +0200192 struct drm_panel *panel;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000193 struct i2c_adapter *ddc;
194 const struct edid *edid;
195 unsigned int hpd_irq;
196 int hpd_gpio;
197
198 struct drm_encoder encoder;
199 struct drm_connector connector;
200};
201
202static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
203{
204 return container_of(e, struct tegra_output, encoder);
205}
206
207static inline struct tegra_output *connector_to_output(struct drm_connector *c)
208{
209 return container_of(c, struct tegra_output, connector);
210}
211
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000212/* from rgb.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200213int tegra_dc_rgb_probe(struct tegra_dc *dc);
214int tegra_dc_rgb_remove(struct tegra_dc *dc);
215int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
216int tegra_dc_rgb_exit(struct tegra_dc *dc);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000217
218/* from output.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200219int tegra_output_probe(struct tegra_output *output);
Thierry Reding328ec692014-12-19 15:55:08 +0100220void tegra_output_remove(struct tegra_output *output);
Thierry Reding688c59a2014-04-16 09:54:21 +0200221int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
Thierry Reding328ec692014-12-19 15:55:08 +0100222void tegra_output_exit(struct tegra_output *output);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000223
Thierry Reding132085d2014-11-28 15:38:40 +0100224int tegra_output_connector_get_modes(struct drm_connector *connector);
225struct drm_encoder *
226tegra_output_connector_best_encoder(struct drm_connector *connector);
227enum drm_connector_status
228tegra_output_connector_detect(struct drm_connector *connector, bool force);
229void tegra_output_connector_destroy(struct drm_connector *connector);
230
231void tegra_output_encoder_destroy(struct drm_encoder *encoder);
232
Thierry Reding6b6b6042013-11-15 16:06:05 +0100233/* from dpaux.c */
Thierry Reding6b6b6042013-11-15 16:06:05 +0100234struct tegra_dpaux;
235struct drm_dp_link;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100236
237struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np);
238enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux);
239int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output);
240int tegra_dpaux_detach(struct tegra_dpaux *dpaux);
241int tegra_dpaux_enable(struct tegra_dpaux *dpaux);
242int tegra_dpaux_disable(struct tegra_dpaux *dpaux);
243int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding);
244int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,
245 u8 pattern);
246
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000247/* from fb.c */
Arto Merilainende2ba662013-03-22 16:34:08 +0200248struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
249 unsigned int index);
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200250bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
Thierry Redingc134f012014-06-03 14:48:12 +0200251int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
252 struct tegra_bo_tiling *tiling);
Thierry Redingf9914212014-11-26 13:03:57 +0100253struct drm_framebuffer *tegra_fb_create(struct drm_device *drm,
254 struct drm_file *file,
255 struct drm_mode_fb_cmd2 *cmd);
Thierry Redinge2215322014-06-27 17:19:25 +0200256int tegra_drm_fb_prepare(struct drm_device *drm);
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100257void tegra_drm_fb_free(struct drm_device *drm);
Thierry Reding688c59a2014-04-16 09:54:21 +0200258int tegra_drm_fb_init(struct drm_device *drm);
259void tegra_drm_fb_exit(struct drm_device *drm);
Thierry Reding60c2f702013-10-31 13:28:50 +0100260#ifdef CONFIG_DRM_TEGRA_FBDEV
Thierry Reding688c59a2014-04-16 09:54:21 +0200261void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
Thierry Redingf9914212014-11-26 13:03:57 +0100262void tegra_fb_output_poll_changed(struct drm_device *drm);
Thierry Reding60c2f702013-10-31 13:28:50 +0100263#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000264
Thierry Reding776dc382013-10-14 14:43:22 +0200265extern struct platform_driver tegra_dc_driver;
Thierry Redingdec72732013-09-03 08:45:46 +0200266extern struct platform_driver tegra_dsi_driver;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100267extern struct platform_driver tegra_sor_driver;
Thierry Reding776dc382013-10-14 14:43:22 +0200268extern struct platform_driver tegra_hdmi_driver;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100269extern struct platform_driver tegra_dpaux_driver;
Thierry Reding776dc382013-10-14 14:43:22 +0200270extern struct platform_driver tegra_gr2d_driver;
Thierry Reding5f60ed02013-02-28 08:08:01 +0100271extern struct platform_driver tegra_gr3d_driver;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000272
Terje Bergstrom4231c6b2013-03-22 16:34:05 +0200273#endif /* HOST1X_DRM_H */