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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>,
3 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
4 <mdsxyz123@yahoo.com>
Jean Delvareb3b8df92014-11-12 10:20:40 +01005 Copyright (C) 2007 - 2014 Jean Delvare <jdelvare@suse.de>
David Woodhouse0cd96eb2010-10-31 21:06:59 +01006 Copyright (C) 2010 Intel Corporation,
7 David Woodhouse <dwmw2@infradead.org>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
Linus Torvalds1da177e2005-04-16 15:20:36 -070018*/
19
20/*
Jean Delvarece316112014-07-17 15:03:24 +020021 * Supports the following Intel I/O Controller Hubs (ICH):
22 *
23 * I/O Block I2C
24 * region SMBus Block proc. block
25 * Chip name PCI ID size PEC buffer call read
26 * ---------------------------------------------------------------------------
27 * 82801AA (ICH) 0x2413 16 no no no no
28 * 82801AB (ICH0) 0x2423 16 no no no no
29 * 82801BA (ICH2) 0x2443 16 no no no no
30 * 82801CA (ICH3) 0x2483 32 soft no no no
31 * 82801DB (ICH4) 0x24c3 32 hard yes no no
32 * 82801E (ICH5) 0x24d3 32 hard yes yes yes
33 * 6300ESB 0x25a4 32 hard yes yes yes
34 * 82801F (ICH6) 0x266a 32 hard yes yes yes
35 * 6310ESB/6320ESB 0x269b 32 hard yes yes yes
36 * 82801G (ICH7) 0x27da 32 hard yes yes yes
37 * 82801H (ICH8) 0x283e 32 hard yes yes yes
38 * 82801I (ICH9) 0x2930 32 hard yes yes yes
39 * EP80579 (Tolapai) 0x5032 32 hard yes yes yes
40 * ICH10 0x3a30 32 hard yes yes yes
41 * ICH10 0x3a60 32 hard yes yes yes
42 * 5/3400 Series (PCH) 0x3b30 32 hard yes yes yes
43 * 6 Series (PCH) 0x1c22 32 hard yes yes yes
44 * Patsburg (PCH) 0x1d22 32 hard yes yes yes
45 * Patsburg (PCH) IDF 0x1d70 32 hard yes yes yes
46 * Patsburg (PCH) IDF 0x1d71 32 hard yes yes yes
47 * Patsburg (PCH) IDF 0x1d72 32 hard yes yes yes
48 * DH89xxCC (PCH) 0x2330 32 hard yes yes yes
49 * Panther Point (PCH) 0x1e22 32 hard yes yes yes
50 * Lynx Point (PCH) 0x8c22 32 hard yes yes yes
51 * Lynx Point-LP (PCH) 0x9c22 32 hard yes yes yes
52 * Avoton (SOC) 0x1f3c 32 hard yes yes yes
53 * Wellsburg (PCH) 0x8d22 32 hard yes yes yes
54 * Wellsburg (PCH) MS 0x8d7d 32 hard yes yes yes
55 * Wellsburg (PCH) MS 0x8d7e 32 hard yes yes yes
56 * Wellsburg (PCH) MS 0x8d7f 32 hard yes yes yes
57 * Coleto Creek (PCH) 0x23b0 32 hard yes yes yes
Jean Delvareb299de82014-07-17 15:04:41 +020058 * Wildcat Point (PCH) 0x8ca2 32 hard yes yes yes
Jean Delvarece316112014-07-17 15:03:24 +020059 * Wildcat Point-LP (PCH) 0x9ca2 32 hard yes yes yes
60 * BayTrail (SOC) 0x0f12 32 hard yes yes yes
james.d.ralston@intel.com3e27a842014-10-13 15:20:24 -070061 * Sunrise Point-H (PCH) 0xa123 32 hard yes yes yes
Devin Ryles3eee17992014-11-05 16:30:03 -050062 * Sunrise Point-LP (PCH) 0x9d23 32 hard yes yes yes
Mika Westerberg84d7f2e2015-10-13 15:41:39 +030063 * DNV (SOC) 0x19df 32 hard yes yes yes
Jarkko Nikuladd77f422015-10-22 17:16:58 +030064 * Broxton (SOC) 0x5ad4 32 hard yes yes yes
Alexandra Yatescdc5a312015-11-05 11:40:25 -080065 * Lewisburg (PCH) 0xa1a3 32 hard yes yes yes
66 * Lewisburg Supersku (PCH) 0xa223 32 hard yes yes yes
Jean Delvarece316112014-07-17 15:03:24 +020067 *
68 * Features supported by this driver:
69 * Software PEC no
70 * Hardware PEC yes
71 * Block buffer yes
72 * Block process call transaction no
73 * I2C block read transaction yes (doesn't use the block buffer)
74 * Slave mode no
75 * Interrupt processing yes
76 *
77 * See the file Documentation/i2c/busses/i2c-i801 for details.
78 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
Daniel Kurtz636752b2012-07-24 14:13:58 +020080#include <linux/interrupt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070081#include <linux/module.h>
82#include <linux/pci.h>
83#include <linux/kernel.h>
84#include <linux/stddef.h>
85#include <linux/delay.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070086#include <linux/ioport.h>
87#include <linux/init.h>
88#include <linux/i2c.h>
Jean Delvare54fb4a052008-07-14 22:38:33 +020089#include <linux/acpi.h>
Jean Delvare1561bfe2009-01-07 14:29:17 +010090#include <linux/io.h>
Hans de Goedefa5bfab2009-03-30 21:46:44 +020091#include <linux/dmi.h>
Ben Hutchings665a96b2011-01-10 22:11:22 +010092#include <linux/slab.h>
Daniel Kurtz636752b2012-07-24 14:13:58 +020093#include <linux/wait.h>
Jean Delvare3ad7ea12012-10-05 22:23:53 +020094#include <linux/err.h>
Mika Westerberg94246932015-08-06 13:46:25 +010095#include <linux/platform_device.h>
96#include <linux/platform_data/itco_wdt.h>
Jean Delvare3ad7ea12012-10-05 22:23:53 +020097
Jean Delvare79e3e5b2012-10-28 21:37:01 +010098#if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
99 defined CONFIG_DMI
Jean Delvare3ad7ea12012-10-05 22:23:53 +0200100#include <linux/gpio.h>
101#include <linux/i2c-mux-gpio.h>
Jean Delvare3ad7ea12012-10-05 22:23:53 +0200102#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104/* I801 SMBus address offsets */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100105#define SMBHSTSTS(p) (0 + (p)->smba)
106#define SMBHSTCNT(p) (2 + (p)->smba)
107#define SMBHSTCMD(p) (3 + (p)->smba)
108#define SMBHSTADD(p) (4 + (p)->smba)
109#define SMBHSTDAT0(p) (5 + (p)->smba)
110#define SMBHSTDAT1(p) (6 + (p)->smba)
111#define SMBBLKDAT(p) (7 + (p)->smba)
112#define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */
113#define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */
114#define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115
116/* PCI Address Constants */
Jean Delvare6dcc19d2006-06-12 21:53:02 +0200117#define SMBBAR 4
Jean Delvareaeb8a3d2014-11-12 10:25:37 +0100118#define SMBPCICTL 0x004
Daniel Kurtz636752b2012-07-24 14:13:58 +0200119#define SMBPCISTS 0x006
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120#define SMBHSTCFG 0x040
Mika Westerberg94246932015-08-06 13:46:25 +0100121#define TCOBASE 0x050
122#define TCOCTL 0x054
123
124#define ACPIBASE 0x040
125#define ACPIBASE_SMI_OFF 0x030
126#define ACPICTRL 0x044
127#define ACPICTRL_EN 0x080
128
129#define SBREG_BAR 0x10
130#define SBREG_SMBCTRL 0xc6000c
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131
Daniel Kurtz636752b2012-07-24 14:13:58 +0200132/* Host status bits for SMBPCISTS */
133#define SMBPCISTS_INTS 0x08
134
Jean Delvareaeb8a3d2014-11-12 10:25:37 +0100135/* Control bits for SMBPCICTL */
136#define SMBPCICTL_INTDIS 0x0400
137
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138/* Host configuration bits for SMBHSTCFG */
139#define SMBHSTCFG_HST_EN 1
140#define SMBHSTCFG_SMB_SMI_EN 2
141#define SMBHSTCFG_I2C_EN 4
142
Mika Westerberg94246932015-08-06 13:46:25 +0100143/* TCO configuration bits for TCOCTL */
144#define TCOCTL_EN 0x0100
145
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300146/* Auxiliary control register bits, ICH4+ only */
Oleg Ryjkovca8b9e32007-07-12 14:12:31 +0200147#define SMBAUXCTL_CRC 1
148#define SMBAUXCTL_E32B 2
149
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150/* Other settings */
Jean Delvare84c1af42012-03-26 21:47:19 +0200151#define MAX_RETRIES 400
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152
153/* I801 command constants */
154#define I801_QUICK 0x00
155#define I801_BYTE 0x04
156#define I801_BYTE_DATA 0x08
157#define I801_WORD_DATA 0x0C
Jean Delvareae7b0492008-01-27 18:14:49 +0100158#define I801_PROC_CALL 0x10 /* unimplemented */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159#define I801_BLOCK_DATA 0x14
Jean Delvare63420642008-01-27 18:14:50 +0100160#define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */
Daniel Kurtzedbeea62012-07-24 14:13:58 +0200161
162/* I801 Host Control register bits */
163#define SMBHSTCNT_INTREN 0x01
164#define SMBHSTCNT_KILL 0x02
165#define SMBHSTCNT_LAST_BYTE 0x20
166#define SMBHSTCNT_START 0x40
167#define SMBHSTCNT_PEC_EN 0x80 /* ICH3 and later */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168
Oleg Ryjkovca8b9e32007-07-12 14:12:31 +0200169/* I801 Hosts Status register bits */
170#define SMBHSTSTS_BYTE_DONE 0x80
171#define SMBHSTSTS_INUSE_STS 0x40
172#define SMBHSTSTS_SMBALERT_STS 0x20
173#define SMBHSTSTS_FAILED 0x10
174#define SMBHSTSTS_BUS_ERR 0x08
175#define SMBHSTSTS_DEV_ERR 0x04
176#define SMBHSTSTS_INTR 0x02
177#define SMBHSTSTS_HOST_BUSY 0x01
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178
Daniel Kurtz70a1cc12012-07-24 14:13:58 +0200179#define STATUS_ERROR_FLAGS (SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
180 SMBHSTSTS_DEV_ERR)
181
182#define STATUS_FLAGS (SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \
183 STATUS_ERROR_FLAGS)
Jean Delvarecf898dc2008-07-14 22:38:33 +0200184
Jean Delvarea6e5e2b2011-05-01 18:18:49 +0200185/* Older devices have their ID defined in <linux/pci_ids.h> */
Jean Delvarece316112014-07-17 15:03:24 +0200186#define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS 0x0f12
Alan Cox39e8e302014-08-19 17:37:28 +0300187#define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS 0x2292
Jean Delvarece316112014-07-17 15:03:24 +0200188#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22
189#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
David Woodhouse55fee8d2010-10-31 21:07:00 +0100190/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
Jean Delvarece316112014-07-17 15:03:24 +0200191#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0 0x1d70
192#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1 0x1d71
193#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2 0x1d72
194#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS 0x1e22
195#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS 0x1f3c
196#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
197#define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS 0x23b0
198#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS 0x3b30
199#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS 0x8c22
Jean Delvareb299de82014-07-17 15:04:41 +0200200#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS 0x8ca2
Jean Delvarece316112014-07-17 15:03:24 +0200201#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS 0x8d22
202#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0 0x8d7d
203#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1 0x8d7e
204#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2 0x8d7f
205#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS 0x9c22
James Ralstonafc65922013-11-04 09:29:48 -0800206#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS 0x9ca2
james.d.ralston@intel.com3e27a842014-10-13 15:20:24 -0700207#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS 0xa123
Devin Ryles3eee17992014-11-05 16:30:03 -0500208#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS 0x9d23
Mika Westerberg84d7f2e2015-10-13 15:41:39 +0300209#define PCI_DEVICE_ID_INTEL_DNV_SMBUS 0x19df
Jarkko Nikuladd77f422015-10-22 17:16:58 +0300210#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS 0x5ad4
Alexandra Yatescdc5a312015-11-05 11:40:25 -0800211#define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS 0xa1a3
212#define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS 0xa223
David Woodhouse55fee8d2010-10-31 21:07:00 +0100213
Jean Delvare3ad7ea12012-10-05 22:23:53 +0200214struct i801_mux_config {
215 char *gpio_chip;
216 unsigned values[3];
217 int n_values;
218 unsigned classes[3];
219 unsigned gpios[2]; /* Relative to gpio_chip->base */
220 int n_gpios;
221};
222
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100223struct i801_priv {
224 struct i2c_adapter adapter;
225 unsigned long smba;
226 unsigned char original_hstcfg;
227 struct pci_dev *pci_dev;
228 unsigned int features;
Daniel Kurtz636752b2012-07-24 14:13:58 +0200229
230 /* isr processing */
231 wait_queue_head_t waitq;
232 u8 status;
Daniel Kurtzd3ff6ce2012-07-24 14:13:59 +0200233
234 /* Command state used by isr for byte-by-byte block transactions */
235 u8 cmd;
236 bool is_read;
237 int count;
238 int len;
239 u8 *data;
Jean Delvare3ad7ea12012-10-05 22:23:53 +0200240
Jean Delvare79e3e5b2012-10-28 21:37:01 +0100241#if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
242 defined CONFIG_DMI
Jean Delvare3ad7ea12012-10-05 22:23:53 +0200243 const struct i801_mux_config *mux_drvdata;
Jean Delvare3ad7ea12012-10-05 22:23:53 +0200244 struct platform_device *mux_pdev;
245#endif
Mika Westerberg94246932015-08-06 13:46:25 +0100246 struct platform_device *tco_pdev;
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100247};
248
Jean Delvare369f6f42008-01-27 18:14:50 +0100249#define FEATURE_SMBUS_PEC (1 << 0)
250#define FEATURE_BLOCK_BUFFER (1 << 1)
251#define FEATURE_BLOCK_PROC (1 << 2)
252#define FEATURE_I2C_BLOCK_READ (1 << 3)
Daniel Kurtz636752b2012-07-24 14:13:58 +0200253#define FEATURE_IRQ (1 << 4)
Jean Delvaree7198fb2011-05-24 20:58:49 +0200254/* Not really a feature, but it's convenient to handle it as such */
255#define FEATURE_IDF (1 << 15)
Mika Westerberg94246932015-08-06 13:46:25 +0100256#define FEATURE_TCO (1 << 16)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257
Jean Delvareadff6872010-05-21 18:40:54 +0200258static const char *i801_feature_names[] = {
259 "SMBus PEC",
260 "Block buffer",
261 "Block process call",
262 "I2C block read",
Daniel Kurtz636752b2012-07-24 14:13:58 +0200263 "Interrupt",
Jean Delvareadff6872010-05-21 18:40:54 +0200264};
265
266static unsigned int disable_features;
267module_param(disable_features, uint, S_IRUGO | S_IWUSR);
Jean Delvare53229342013-05-15 02:44:10 +0000268MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n"
269 "\t\t 0x01 disable SMBus PEC\n"
270 "\t\t 0x02 disable the block buffer\n"
271 "\t\t 0x08 disable the I2C block read functionality\n"
272 "\t\t 0x10 don't use interrupts ");
Jean Delvareadff6872010-05-21 18:40:54 +0200273
Jean Delvarecf898dc2008-07-14 22:38:33 +0200274/* Make sure the SMBus host is ready to start transmitting.
275 Return 0 if it is, -EBUSY if it is not. */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100276static int i801_check_pre(struct i801_priv *priv)
Jean Delvarecf898dc2008-07-14 22:38:33 +0200277{
278 int status;
279
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100280 status = inb_p(SMBHSTSTS(priv));
Jean Delvarecf898dc2008-07-14 22:38:33 +0200281 if (status & SMBHSTSTS_HOST_BUSY) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100282 dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
Jean Delvarecf898dc2008-07-14 22:38:33 +0200283 return -EBUSY;
284 }
285
286 status &= STATUS_FLAGS;
287 if (status) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100288 dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
Jean Delvarecf898dc2008-07-14 22:38:33 +0200289 status);
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100290 outb_p(status, SMBHSTSTS(priv));
291 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
Jean Delvarecf898dc2008-07-14 22:38:33 +0200292 if (status) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100293 dev_err(&priv->pci_dev->dev,
Jean Delvarecf898dc2008-07-14 22:38:33 +0200294 "Failed clearing status flags (%02x)\n",
295 status);
296 return -EBUSY;
297 }
298 }
299
300 return 0;
301}
302
Jean Delvare6cad93c2012-07-24 14:13:58 +0200303/*
304 * Convert the status register to an error code, and clear it.
305 * Note that status only contains the bits we want to clear, not the
306 * actual register value.
307 */
308static int i801_check_post(struct i801_priv *priv, int status)
Jean Delvarecf898dc2008-07-14 22:38:33 +0200309{
310 int result = 0;
311
Daniel Kurtz636752b2012-07-24 14:13:58 +0200312 /*
313 * If the SMBus is still busy, we give up
314 * Note: This timeout condition only happens when using polling
315 * transactions. For interrupt operation, NAK/timeout is indicated by
316 * DEV_ERR.
317 */
Jean Delvare6cad93c2012-07-24 14:13:58 +0200318 if (unlikely(status < 0)) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100319 dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
Jean Delvarecf898dc2008-07-14 22:38:33 +0200320 /* try to stop the current command */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100321 dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
322 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
323 SMBHSTCNT(priv));
Jean Delvare84c1af42012-03-26 21:47:19 +0200324 usleep_range(1000, 2000);
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100325 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
326 SMBHSTCNT(priv));
Jean Delvarecf898dc2008-07-14 22:38:33 +0200327
328 /* Check if it worked */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100329 status = inb_p(SMBHSTSTS(priv));
Jean Delvarecf898dc2008-07-14 22:38:33 +0200330 if ((status & SMBHSTSTS_HOST_BUSY) ||
331 !(status & SMBHSTSTS_FAILED))
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100332 dev_err(&priv->pci_dev->dev,
Jean Delvarecf898dc2008-07-14 22:38:33 +0200333 "Failed terminating the transaction\n");
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100334 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
Jean Delvarecf898dc2008-07-14 22:38:33 +0200335 return -ETIMEDOUT;
336 }
337
338 if (status & SMBHSTSTS_FAILED) {
339 result = -EIO;
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100340 dev_err(&priv->pci_dev->dev, "Transaction failed\n");
Jean Delvarecf898dc2008-07-14 22:38:33 +0200341 }
342 if (status & SMBHSTSTS_DEV_ERR) {
343 result = -ENXIO;
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100344 dev_dbg(&priv->pci_dev->dev, "No response\n");
Jean Delvarecf898dc2008-07-14 22:38:33 +0200345 }
346 if (status & SMBHSTSTS_BUS_ERR) {
347 result = -EAGAIN;
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100348 dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
Jean Delvarecf898dc2008-07-14 22:38:33 +0200349 }
350
Jean Delvare6cad93c2012-07-24 14:13:58 +0200351 /* Clear status flags except BYTE_DONE, to be cleared by caller */
352 outb_p(status, SMBHSTSTS(priv));
Jean Delvarecf898dc2008-07-14 22:38:33 +0200353
354 return result;
355}
356
Jean Delvare6cad93c2012-07-24 14:13:58 +0200357/* Wait for BUSY being cleared and either INTR or an error flag being set */
358static int i801_wait_intr(struct i801_priv *priv)
359{
360 int timeout = 0;
361 int status;
362
363 /* We will always wait for a fraction of a second! */
364 do {
365 usleep_range(250, 500);
366 status = inb_p(SMBHSTSTS(priv));
367 } while (((status & SMBHSTSTS_HOST_BUSY) ||
368 !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) &&
369 (timeout++ < MAX_RETRIES));
370
371 if (timeout > MAX_RETRIES) {
372 dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
373 return -ETIMEDOUT;
374 }
375 return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR);
376}
377
378/* Wait for either BYTE_DONE or an error flag being set */
379static int i801_wait_byte_done(struct i801_priv *priv)
380{
381 int timeout = 0;
382 int status;
383
384 /* We will always wait for a fraction of a second! */
385 do {
386 usleep_range(250, 500);
387 status = inb_p(SMBHSTSTS(priv));
388 } while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) &&
389 (timeout++ < MAX_RETRIES));
390
391 if (timeout > MAX_RETRIES) {
392 dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n");
393 return -ETIMEDOUT;
394 }
395 return status & STATUS_ERROR_FLAGS;
396}
397
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100398static int i801_transaction(struct i801_priv *priv, int xact)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399{
Jean Delvare2b738092008-07-14 22:38:32 +0200400 int status;
Jean Delvarecf898dc2008-07-14 22:38:33 +0200401 int result;
Jean Delvareb3b8df92014-11-12 10:20:40 +0100402 const struct i2c_adapter *adap = &priv->adapter;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100404 result = i801_check_pre(priv);
Jean Delvarecf898dc2008-07-14 22:38:33 +0200405 if (result < 0)
406 return result;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407
Daniel Kurtz636752b2012-07-24 14:13:58 +0200408 if (priv->features & FEATURE_IRQ) {
409 outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
410 SMBHSTCNT(priv));
Jean Delvareb3b8df92014-11-12 10:20:40 +0100411 result = wait_event_timeout(priv->waitq,
412 (status = priv->status),
413 adap->timeout);
414 if (!result) {
415 status = -ETIMEDOUT;
416 dev_warn(&priv->pci_dev->dev,
417 "Timeout waiting for interrupt!\n");
418 }
Daniel Kurtz636752b2012-07-24 14:13:58 +0200419 priv->status = 0;
420 return i801_check_post(priv, status);
421 }
422
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200423 /* the current contents of SMBHSTCNT can be overwritten, since PEC,
Daniel Kurtz37af8712012-07-24 14:13:58 +0200424 * SMBSCMD are passed in xact */
Daniel Kurtzedbeea62012-07-24 14:13:58 +0200425 outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426
Jean Delvare6cad93c2012-07-24 14:13:58 +0200427 status = i801_wait_intr(priv);
428 return i801_check_post(priv, status);
Oleg Ryjkovca8b9e32007-07-12 14:12:31 +0200429}
430
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100431static int i801_block_transaction_by_block(struct i801_priv *priv,
432 union i2c_smbus_data *data,
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200433 char read_write, int hwpec)
434{
435 int i, len;
David Brownell97140342008-07-14 22:38:25 +0200436 int status;
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200437
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100438 inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200439
440 /* Use 32-byte buffer to process this transaction */
441 if (read_write == I2C_SMBUS_WRITE) {
442 len = data->block[0];
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100443 outb_p(len, SMBHSTDAT0(priv));
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200444 for (i = 0; i < len; i++)
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100445 outb_p(data->block[i+1], SMBBLKDAT(priv));
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200446 }
447
Daniel Kurtz37af8712012-07-24 14:13:58 +0200448 status = i801_transaction(priv, I801_BLOCK_DATA |
Daniel Kurtzedbeea62012-07-24 14:13:58 +0200449 (hwpec ? SMBHSTCNT_PEC_EN : 0));
David Brownell97140342008-07-14 22:38:25 +0200450 if (status)
451 return status;
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200452
453 if (read_write == I2C_SMBUS_READ) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100454 len = inb_p(SMBHSTDAT0(priv));
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200455 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
David Brownell97140342008-07-14 22:38:25 +0200456 return -EPROTO;
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200457
458 data->block[0] = len;
459 for (i = 0; i < len; i++)
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100460 data->block[i + 1] = inb_p(SMBBLKDAT(priv));
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200461 }
462 return 0;
463}
464
Daniel Kurtzd3ff6ce2012-07-24 14:13:59 +0200465static void i801_isr_byte_done(struct i801_priv *priv)
466{
467 if (priv->is_read) {
468 /* For SMBus block reads, length is received with first byte */
469 if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) &&
470 (priv->count == 0)) {
471 priv->len = inb_p(SMBHSTDAT0(priv));
472 if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) {
473 dev_err(&priv->pci_dev->dev,
474 "Illegal SMBus block read size %d\n",
475 priv->len);
476 /* FIXME: Recover */
477 priv->len = I2C_SMBUS_BLOCK_MAX;
478 } else {
479 dev_dbg(&priv->pci_dev->dev,
480 "SMBus block read size is %d\n",
481 priv->len);
482 }
483 priv->data[-1] = priv->len;
484 }
485
486 /* Read next byte */
487 if (priv->count < priv->len)
488 priv->data[priv->count++] = inb(SMBBLKDAT(priv));
489 else
490 dev_dbg(&priv->pci_dev->dev,
491 "Discarding extra byte on block read\n");
492
493 /* Set LAST_BYTE for last byte of read transaction */
494 if (priv->count == priv->len - 1)
495 outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE,
496 SMBHSTCNT(priv));
497 } else if (priv->count < priv->len - 1) {
498 /* Write next byte, except for IRQ after last byte */
499 outb_p(priv->data[++priv->count], SMBBLKDAT(priv));
500 }
501
502 /* Clear BYTE_DONE to continue with next byte */
503 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
504}
505
Daniel Kurtzefa3cb12012-07-24 14:13:57 +0200506/*
Daniel Kurtzd3ff6ce2012-07-24 14:13:59 +0200507 * There are two kinds of interrupts:
508 *
509 * 1) i801 signals transaction completion with one of these interrupts:
510 * INTR - Success
511 * DEV_ERR - Invalid command, NAK or communication timeout
512 * BUS_ERR - SMI# transaction collision
513 * FAILED - transaction was canceled due to a KILL request
514 * When any of these occur, update ->status and wake up the waitq.
515 * ->status must be cleared before kicking off the next transaction.
516 *
517 * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt
518 * occurs for each byte of a byte-by-byte to prepare the next byte.
Daniel Kurtz636752b2012-07-24 14:13:58 +0200519 */
520static irqreturn_t i801_isr(int irq, void *dev_id)
521{
522 struct i801_priv *priv = dev_id;
523 u16 pcists;
524 u8 status;
525
526 /* Confirm this is our interrupt */
527 pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
528 if (!(pcists & SMBPCISTS_INTS))
529 return IRQ_NONE;
530
531 status = inb_p(SMBHSTSTS(priv));
Daniel Kurtzd3ff6ce2012-07-24 14:13:59 +0200532 if (status & SMBHSTSTS_BYTE_DONE)
533 i801_isr_byte_done(priv);
534
Daniel Kurtz636752b2012-07-24 14:13:58 +0200535 /*
536 * Clear irq sources and report transaction result.
537 * ->status must be cleared before the next transaction is started.
538 */
539 status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
540 if (status) {
541 outb_p(status, SMBHSTSTS(priv));
542 priv->status |= status;
543 wake_up(&priv->waitq);
544 }
545
546 return IRQ_HANDLED;
547}
548
549/*
Daniel Kurtzefa3cb12012-07-24 14:13:57 +0200550 * For "byte-by-byte" block transactions:
551 * I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1
552 * I2C read uses cmd=I801_I2C_BLOCK_DATA
553 */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100554static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
555 union i2c_smbus_data *data,
Jean Delvare63420642008-01-27 18:14:50 +0100556 char read_write, int command,
557 int hwpec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558{
559 int i, len;
560 int smbcmd;
Jean Delvare2b738092008-07-14 22:38:32 +0200561 int status;
Jean Delvarecf898dc2008-07-14 22:38:33 +0200562 int result;
Jean Delvareb3b8df92014-11-12 10:20:40 +0100563 const struct i2c_adapter *adap = &priv->adapter;
Jean Delvarecf898dc2008-07-14 22:38:33 +0200564
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100565 result = i801_check_pre(priv);
Jean Delvarecf898dc2008-07-14 22:38:33 +0200566 if (result < 0)
567 return result;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700568
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200569 len = data->block[0];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570
571 if (read_write == I2C_SMBUS_WRITE) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100572 outb_p(len, SMBHSTDAT0(priv));
573 outb_p(data->block[1], SMBBLKDAT(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574 }
575
Daniel Kurtzefa3cb12012-07-24 14:13:57 +0200576 if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
577 read_write == I2C_SMBUS_READ)
578 smbcmd = I801_I2C_BLOCK_DATA;
579 else
580 smbcmd = I801_BLOCK_DATA;
581
Daniel Kurtzd3ff6ce2012-07-24 14:13:59 +0200582 if (priv->features & FEATURE_IRQ) {
583 priv->is_read = (read_write == I2C_SMBUS_READ);
584 if (len == 1 && priv->is_read)
585 smbcmd |= SMBHSTCNT_LAST_BYTE;
586 priv->cmd = smbcmd | SMBHSTCNT_INTREN;
587 priv->len = len;
588 priv->count = 0;
589 priv->data = &data->block[1];
590
591 outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv));
Jean Delvareb3b8df92014-11-12 10:20:40 +0100592 result = wait_event_timeout(priv->waitq,
593 (status = priv->status),
594 adap->timeout);
595 if (!result) {
596 status = -ETIMEDOUT;
597 dev_warn(&priv->pci_dev->dev,
598 "Timeout waiting for interrupt!\n");
599 }
Daniel Kurtzd3ff6ce2012-07-24 14:13:59 +0200600 priv->status = 0;
601 return i801_check_post(priv, status);
602 }
603
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 for (i = 1; i <= len; i++) {
Daniel Kurtzefa3cb12012-07-24 14:13:57 +0200605 if (i == len && read_write == I2C_SMBUS_READ)
Daniel Kurtzedbeea62012-07-24 14:13:58 +0200606 smbcmd |= SMBHSTCNT_LAST_BYTE;
Daniel Kurtz37af8712012-07-24 14:13:58 +0200607 outb_p(smbcmd, SMBHSTCNT(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700608
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609 if (i == 1)
Daniel Kurtzedbeea62012-07-24 14:13:58 +0200610 outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100611 SMBHSTCNT(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700612
Jean Delvare6cad93c2012-07-24 14:13:58 +0200613 status = i801_wait_byte_done(priv);
614 if (status)
615 goto exit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616
Jean Delvare63420642008-01-27 18:14:50 +0100617 if (i == 1 && read_write == I2C_SMBUS_READ
618 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100619 len = inb_p(SMBHSTDAT0(priv));
Jean Delvarecf898dc2008-07-14 22:38:33 +0200620 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100621 dev_err(&priv->pci_dev->dev,
Jean Delvarecf898dc2008-07-14 22:38:33 +0200622 "Illegal SMBus block read size %d\n",
623 len);
624 /* Recover */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100625 while (inb_p(SMBHSTSTS(priv)) &
626 SMBHSTSTS_HOST_BUSY)
627 outb_p(SMBHSTSTS_BYTE_DONE,
628 SMBHSTSTS(priv));
629 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
David Brownell97140342008-07-14 22:38:25 +0200630 return -EPROTO;
Jean Delvarecf898dc2008-07-14 22:38:33 +0200631 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700632 data->block[0] = len;
633 }
634
635 /* Retrieve/store value in SMBBLKDAT */
636 if (read_write == I2C_SMBUS_READ)
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100637 data->block[i] = inb_p(SMBBLKDAT(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100639 outb_p(data->block[i+1], SMBBLKDAT(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640
Jean Delvarecf898dc2008-07-14 22:38:33 +0200641 /* signals SMBBLKDAT ready */
Jean Delvare6cad93c2012-07-24 14:13:58 +0200642 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200643 }
Jean Delvarecf898dc2008-07-14 22:38:33 +0200644
Jean Delvare6cad93c2012-07-24 14:13:58 +0200645 status = i801_wait_intr(priv);
646exit:
647 return i801_check_post(priv, status);
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200648}
649
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100650static int i801_set_block_buffer_mode(struct i801_priv *priv)
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200651{
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100652 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
653 if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
David Brownell97140342008-07-14 22:38:25 +0200654 return -EIO;
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200655 return 0;
656}
657
658/* Block transaction function */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100659static int i801_block_transaction(struct i801_priv *priv,
660 union i2c_smbus_data *data, char read_write,
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200661 int command, int hwpec)
662{
663 int result = 0;
664 unsigned char hostc;
665
666 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
667 if (read_write == I2C_SMBUS_WRITE) {
668 /* set I2C_EN bit in configuration register */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100669 pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
670 pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200671 hostc | SMBHSTCFG_I2C_EN);
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100672 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
673 dev_err(&priv->pci_dev->dev,
Jean Delvare63420642008-01-27 18:14:50 +0100674 "I2C block read is unsupported!\n");
David Brownell97140342008-07-14 22:38:25 +0200675 return -EOPNOTSUPP;
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200676 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677 }
678
Jean Delvare63420642008-01-27 18:14:50 +0100679 if (read_write == I2C_SMBUS_WRITE
680 || command == I2C_SMBUS_I2C_BLOCK_DATA) {
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200681 if (data->block[0] < 1)
682 data->block[0] = 1;
683 if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
684 data->block[0] = I2C_SMBUS_BLOCK_MAX;
685 } else {
Jean Delvare63420642008-01-27 18:14:50 +0100686 data->block[0] = 32; /* max for SMBus block reads */
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200687 }
688
Jean Delvarec074c392010-03-13 20:56:53 +0100689 /* Experience has shown that the block buffer can only be used for
690 SMBus (not I2C) block transactions, even though the datasheet
691 doesn't mention this limitation. */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100692 if ((priv->features & FEATURE_BLOCK_BUFFER)
Jean Delvarec074c392010-03-13 20:56:53 +0100693 && command != I2C_SMBUS_I2C_BLOCK_DATA
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100694 && i801_set_block_buffer_mode(priv) == 0)
695 result = i801_block_transaction_by_block(priv, data,
696 read_write, hwpec);
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200697 else
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100698 result = i801_block_transaction_byte_by_byte(priv, data,
699 read_write,
Jean Delvare63420642008-01-27 18:14:50 +0100700 command, hwpec);
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200701
Jean Delvare63420642008-01-27 18:14:50 +0100702 if (command == I2C_SMBUS_I2C_BLOCK_DATA
703 && read_write == I2C_SMBUS_WRITE) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704 /* restore saved configuration register value */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100705 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 }
707 return result;
708}
709
David Brownell97140342008-07-14 22:38:25 +0200710/* Return negative errno on error. */
Ivo Manca3fb21c62010-05-21 18:40:55 +0200711static s32 i801_access(struct i2c_adapter *adap, u16 addr,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700712 unsigned short flags, char read_write, u8 command,
Ivo Manca3fb21c62010-05-21 18:40:55 +0200713 int size, union i2c_smbus_data *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700714{
Jean Delvaree8aac4a2005-10-26 21:34:42 +0200715 int hwpec;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700716 int block = 0;
717 int ret, xact = 0;
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100718 struct i801_priv *priv = i2c_get_adapdata(adap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100720 hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
Jean Delvaree8aac4a2005-10-26 21:34:42 +0200721 && size != I2C_SMBUS_QUICK
722 && size != I2C_SMBUS_I2C_BLOCK_DATA;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723
724 switch (size) {
725 case I2C_SMBUS_QUICK:
726 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100727 SMBHSTADD(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728 xact = I801_QUICK;
729 break;
730 case I2C_SMBUS_BYTE:
731 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100732 SMBHSTADD(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733 if (read_write == I2C_SMBUS_WRITE)
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100734 outb_p(command, SMBHSTCMD(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735 xact = I801_BYTE;
736 break;
737 case I2C_SMBUS_BYTE_DATA:
738 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100739 SMBHSTADD(priv));
740 outb_p(command, SMBHSTCMD(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741 if (read_write == I2C_SMBUS_WRITE)
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100742 outb_p(data->byte, SMBHSTDAT0(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700743 xact = I801_BYTE_DATA;
744 break;
745 case I2C_SMBUS_WORD_DATA:
746 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100747 SMBHSTADD(priv));
748 outb_p(command, SMBHSTCMD(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749 if (read_write == I2C_SMBUS_WRITE) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100750 outb_p(data->word & 0xff, SMBHSTDAT0(priv));
751 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752 }
753 xact = I801_WORD_DATA;
754 break;
755 case I2C_SMBUS_BLOCK_DATA:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700756 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100757 SMBHSTADD(priv));
758 outb_p(command, SMBHSTCMD(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700759 block = 1;
760 break;
Jean Delvare63420642008-01-27 18:14:50 +0100761 case I2C_SMBUS_I2C_BLOCK_DATA:
762 /* NB: page 240 of ICH5 datasheet shows that the R/#W
763 * bit should be cleared here, even when reading */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100764 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
Jean Delvare63420642008-01-27 18:14:50 +0100765 if (read_write == I2C_SMBUS_READ) {
766 /* NB: page 240 of ICH5 datasheet also shows
767 * that DATA1 is the cmd field when reading */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100768 outb_p(command, SMBHSTDAT1(priv));
Jean Delvare63420642008-01-27 18:14:50 +0100769 } else
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100770 outb_p(command, SMBHSTCMD(priv));
Jean Delvare63420642008-01-27 18:14:50 +0100771 block = 1;
772 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700773 default:
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100774 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
775 size);
David Brownell97140342008-07-14 22:38:25 +0200776 return -EOPNOTSUPP;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777 }
778
Oleg Ryjkovca8b9e32007-07-12 14:12:31 +0200779 if (hwpec) /* enable/disable hardware PEC */
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100780 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
Oleg Ryjkovca8b9e32007-07-12 14:12:31 +0200781 else
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100782 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
783 SMBAUXCTL(priv));
Jean Delvaree8aac4a2005-10-26 21:34:42 +0200784
Ivo Manca3fb21c62010-05-21 18:40:55 +0200785 if (block)
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100786 ret = i801_block_transaction(priv, data, read_write, size,
787 hwpec);
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200788 else
Daniel Kurtz37af8712012-07-24 14:13:58 +0200789 ret = i801_transaction(priv, xact);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700790
Jean Delvarec79cfba2006-04-20 02:43:18 -0700791 /* Some BIOSes don't like it when PEC is enabled at reboot or resume
Oleg Ryjkov7edcb9a2007-07-12 14:12:31 +0200792 time, so we forcibly disable it after every transaction. Turn off
793 E32B for the same reason. */
Jean Delvarea0921b62008-01-27 18:14:50 +0100794 if (hwpec || block)
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100795 outb_p(inb_p(SMBAUXCTL(priv)) &
796 ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
Jean Delvarec79cfba2006-04-20 02:43:18 -0700797
Ivo Manca3fb21c62010-05-21 18:40:55 +0200798 if (block)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700799 return ret;
Ivo Manca3fb21c62010-05-21 18:40:55 +0200800 if (ret)
David Brownell97140342008-07-14 22:38:25 +0200801 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700802 if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
803 return 0;
804
805 switch (xact & 0x7f) {
806 case I801_BYTE: /* Result put in SMBHSTDAT0 */
807 case I801_BYTE_DATA:
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100808 data->byte = inb_p(SMBHSTDAT0(priv));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809 break;
810 case I801_WORD_DATA:
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100811 data->word = inb_p(SMBHSTDAT0(priv)) +
812 (inb_p(SMBHSTDAT1(priv)) << 8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700813 break;
814 }
815 return 0;
816}
817
818
819static u32 i801_func(struct i2c_adapter *adapter)
820{
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100821 struct i801_priv *priv = i2c_get_adapdata(adapter);
822
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
Jean Delvare369f6f42008-01-27 18:14:50 +0100824 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
825 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
David Woodhouse0cd96eb2010-10-31 21:06:59 +0100826 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
827 ((priv->features & FEATURE_I2C_BLOCK_READ) ?
Jean Delvare63420642008-01-27 18:14:50 +0100828 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700829}
830
Jean Delvare8f9082c2006-09-03 22:39:46 +0200831static const struct i2c_algorithm smbus_algorithm = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832 .smbus_xfer = i801_access,
833 .functionality = i801_func,
834};
835
Jingoo Han392debf2013-12-03 08:11:20 +0900836static const struct pci_device_id i801_ids[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
838 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
839 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
840 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
841 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
842 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
843 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
844 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
845 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
Jason Gastonb0a70b52005-04-16 15:24:45 -0700846 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
Jason Gaston8254fc42006-01-09 10:58:08 -0800847 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
Jason Gastonadbc2a12006-11-22 15:19:12 -0800848 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
Seth Heasleycb04e952010-10-04 13:27:14 -0700849 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
Gaston, Jason Dd28dc712008-02-24 20:03:42 +0100850 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
851 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
Seth Heasleycb04e952010-10-04 13:27:14 -0700852 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
853 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
Seth Heasleye30d9852010-10-31 21:06:59 +0100854 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
David Woodhouse55fee8d2010-10-31 21:07:00 +0100855 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
856 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
857 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
Seth Heasley662cda82011-03-20 14:50:53 +0100858 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
Seth Heasley6e2a8512011-05-24 20:58:49 +0200859 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
Seth Heasley062737f2012-03-26 21:47:19 +0200860 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
James Ralston4a8f1dd2012-09-10 10:14:02 +0200861 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },
Seth Heasleyc2db409c2013-01-30 15:25:32 +0000862 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) },
James Ralstona3fc0ff2013-02-14 09:15:33 +0000863 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) },
864 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) },
865 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
866 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
Seth Heasleyf39901c2013-06-19 16:59:57 -0700867 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
Jean Delvareb299de82014-07-17 15:04:41 +0200868 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
James Ralstonafc65922013-11-04 09:29:48 -0800869 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
Chew, Kean ho1b31e9b2014-03-01 00:03:56 +0800870 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },
Alan Cox39e8e302014-08-19 17:37:28 +0300871 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) },
james.d.ralston@intel.com3e27a842014-10-13 15:20:24 -0700872 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) },
Devin Ryles3eee17992014-11-05 16:30:03 -0500873 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) },
Mika Westerberg84d7f2e2015-10-13 15:41:39 +0300874 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) },
Jarkko Nikuladd77f422015-10-22 17:16:58 +0300875 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) },
Alexandra Yatescdc5a312015-11-05 11:40:25 -0800876 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) },
877 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878 { 0, }
879};
880
Ivo Manca3fb21c62010-05-21 18:40:55 +0200881MODULE_DEVICE_TABLE(pci, i801_ids);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700882
Jean Delvare8eacfce2011-05-24 20:58:49 +0200883#if defined CONFIG_X86 && defined CONFIG_DMI
Jean Delvare1561bfe2009-01-07 14:29:17 +0100884static unsigned char apanel_addr;
885
886/* Scan the system ROM for the signature "FJKEYINF" */
887static __init const void __iomem *bios_signature(const void __iomem *bios)
888{
889 ssize_t offset;
890 const unsigned char signature[] = "FJKEYINF";
891
892 for (offset = 0; offset < 0x10000; offset += 0x10) {
893 if (check_signature(bios + offset, signature,
894 sizeof(signature)-1))
895 return bios + offset;
896 }
897 return NULL;
898}
899
900static void __init input_apanel_init(void)
901{
902 void __iomem *bios;
903 const void __iomem *p;
904
905 bios = ioremap(0xF0000, 0x10000); /* Can't fail */
906 p = bios_signature(bios);
907 if (p) {
908 /* just use the first address */
909 apanel_addr = readb(p + 8 + 3) >> 1;
910 }
911 iounmap(bios);
912}
Jean Delvare1561bfe2009-01-07 14:29:17 +0100913
Hans de Goedefa5bfab2009-03-30 21:46:44 +0200914struct dmi_onboard_device_info {
915 const char *name;
916 u8 type;
917 unsigned short i2c_addr;
918 const char *i2c_type;
919};
920
Bill Pemberton0b255e92012-11-27 15:59:38 -0500921static const struct dmi_onboard_device_info dmi_devices[] = {
Hans de Goedefa5bfab2009-03-30 21:46:44 +0200922 { "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
923 { "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
924 { "Hades", DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
925};
926
Bill Pemberton0b255e92012-11-27 15:59:38 -0500927static void dmi_check_onboard_device(u8 type, const char *name,
928 struct i2c_adapter *adap)
Hans de Goedefa5bfab2009-03-30 21:46:44 +0200929{
930 int i;
931 struct i2c_board_info info;
932
933 for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
934 /* & ~0x80, ignore enabled/disabled bit */
935 if ((type & ~0x80) != dmi_devices[i].type)
936 continue;
Jean Delvarefaabd472010-07-09 16:22:51 +0200937 if (strcasecmp(name, dmi_devices[i].name))
Hans de Goedefa5bfab2009-03-30 21:46:44 +0200938 continue;
939
940 memset(&info, 0, sizeof(struct i2c_board_info));
941 info.addr = dmi_devices[i].i2c_addr;
942 strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
943 i2c_new_device(adap, &info);
944 break;
945 }
946}
947
948/* We use our own function to check for onboard devices instead of
949 dmi_find_device() as some buggy BIOS's have the devices we are interested
950 in marked as disabled */
Bill Pemberton0b255e92012-11-27 15:59:38 -0500951static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap)
Hans de Goedefa5bfab2009-03-30 21:46:44 +0200952{
953 int i, count;
954
955 if (dm->type != 10)
956 return;
957
958 count = (dm->length - sizeof(struct dmi_header)) / 2;
959 for (i = 0; i < count; i++) {
960 const u8 *d = (char *)(dm + 1) + (i * 2);
961 const char *name = ((char *) dm) + dm->length;
962 u8 type = d[0];
963 u8 s = d[1];
964
965 if (!s)
966 continue;
967 s--;
968 while (s > 0 && name[0]) {
969 name += strlen(name) + 1;
970 s--;
971 }
972 if (name[0] == 0) /* Bogus string reference */
973 continue;
974
975 dmi_check_onboard_device(type, name, adap);
976 }
977}
Hans de Goedefa5bfab2009-03-30 21:46:44 +0200978
Jean Delvaree7198fb2011-05-24 20:58:49 +0200979/* Register optional slaves */
Bill Pemberton0b255e92012-11-27 15:59:38 -0500980static void i801_probe_optional_slaves(struct i801_priv *priv)
Jean Delvaree7198fb2011-05-24 20:58:49 +0200981{
982 /* Only register slaves on main SMBus channel */
983 if (priv->features & FEATURE_IDF)
984 return;
985
Jean Delvaree7198fb2011-05-24 20:58:49 +0200986 if (apanel_addr) {
987 struct i2c_board_info info;
988
989 memset(&info, 0, sizeof(struct i2c_board_info));
990 info.addr = apanel_addr;
991 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
992 i2c_new_device(&priv->adapter, &info);
993 }
Jean Delvare8eacfce2011-05-24 20:58:49 +0200994
Jean Delvaree7198fb2011-05-24 20:58:49 +0200995 if (dmi_name_in_vendors("FUJITSU"))
996 dmi_walk(dmi_check_onboard_devices, &priv->adapter);
Jean Delvaree7198fb2011-05-24 20:58:49 +0200997}
Jean Delvare8eacfce2011-05-24 20:58:49 +0200998#else
999static void __init input_apanel_init(void) {}
Bill Pemberton0b255e92012-11-27 15:59:38 -05001000static void i801_probe_optional_slaves(struct i801_priv *priv) {}
Jean Delvare8eacfce2011-05-24 20:58:49 +02001001#endif /* CONFIG_X86 && CONFIG_DMI */
Jean Delvaree7198fb2011-05-24 20:58:49 +02001002
Jean Delvare79e3e5b2012-10-28 21:37:01 +01001003#if (defined CONFIG_I2C_MUX_GPIO || defined CONFIG_I2C_MUX_GPIO_MODULE) && \
1004 defined CONFIG_DMI
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001005static struct i801_mux_config i801_mux_config_asus_z8_d12 = {
1006 .gpio_chip = "gpio_ich",
1007 .values = { 0x02, 0x03 },
1008 .n_values = 2,
1009 .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD },
1010 .gpios = { 52, 53 },
1011 .n_gpios = 2,
1012};
1013
1014static struct i801_mux_config i801_mux_config_asus_z8_d18 = {
1015 .gpio_chip = "gpio_ich",
1016 .values = { 0x02, 0x03, 0x01 },
1017 .n_values = 3,
1018 .classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD },
1019 .gpios = { 52, 53 },
1020 .n_gpios = 2,
1021};
1022
Bill Pemberton0b255e92012-11-27 15:59:38 -05001023static const struct dmi_system_id mux_dmi_table[] = {
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001024 {
1025 .matches = {
1026 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1027 DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"),
1028 },
1029 .driver_data = &i801_mux_config_asus_z8_d12,
1030 },
1031 {
1032 .matches = {
1033 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1034 DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"),
1035 },
1036 .driver_data = &i801_mux_config_asus_z8_d12,
1037 },
1038 {
1039 .matches = {
1040 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1041 DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"),
1042 },
1043 .driver_data = &i801_mux_config_asus_z8_d12,
1044 },
1045 {
1046 .matches = {
1047 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1048 DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"),
1049 },
1050 .driver_data = &i801_mux_config_asus_z8_d12,
1051 },
1052 {
1053 .matches = {
1054 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1055 DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"),
1056 },
1057 .driver_data = &i801_mux_config_asus_z8_d12,
1058 },
1059 {
1060 .matches = {
1061 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1062 DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"),
1063 },
1064 .driver_data = &i801_mux_config_asus_z8_d12,
1065 },
1066 {
1067 .matches = {
1068 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1069 DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"),
1070 },
1071 .driver_data = &i801_mux_config_asus_z8_d18,
1072 },
1073 {
1074 .matches = {
1075 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1076 DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"),
1077 },
1078 .driver_data = &i801_mux_config_asus_z8_d18,
1079 },
1080 {
1081 .matches = {
1082 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
1083 DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"),
1084 },
1085 .driver_data = &i801_mux_config_asus_z8_d12,
1086 },
1087 { }
1088};
1089
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001090/* Setup multiplexing if needed */
Bill Pemberton0b255e92012-11-27 15:59:38 -05001091static int i801_add_mux(struct i801_priv *priv)
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001092{
1093 struct device *dev = &priv->adapter.dev;
1094 const struct i801_mux_config *mux_config;
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001095 struct i2c_mux_gpio_platform_data gpio_data;
Jean Delvaref82b8622012-10-05 22:23:54 +02001096 int err;
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001097
1098 if (!priv->mux_drvdata)
1099 return 0;
1100 mux_config = priv->mux_drvdata;
1101
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001102 /* Prepare the platform data */
1103 memset(&gpio_data, 0, sizeof(struct i2c_mux_gpio_platform_data));
1104 gpio_data.parent = priv->adapter.nr;
1105 gpio_data.values = mux_config->values;
1106 gpio_data.n_values = mux_config->n_values;
1107 gpio_data.classes = mux_config->classes;
Jean Delvaref82b8622012-10-05 22:23:54 +02001108 gpio_data.gpio_chip = mux_config->gpio_chip;
1109 gpio_data.gpios = mux_config->gpios;
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001110 gpio_data.n_gpios = mux_config->n_gpios;
1111 gpio_data.idle = I2C_MUX_GPIO_NO_IDLE;
1112
1113 /* Register the mux device */
1114 priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio",
Jean Delvaref82b8622012-10-05 22:23:54 +02001115 PLATFORM_DEVID_AUTO, &gpio_data,
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001116 sizeof(struct i2c_mux_gpio_platform_data));
1117 if (IS_ERR(priv->mux_pdev)) {
1118 err = PTR_ERR(priv->mux_pdev);
1119 priv->mux_pdev = NULL;
1120 dev_err(dev, "Failed to register i2c-mux-gpio device\n");
1121 return err;
1122 }
1123
1124 return 0;
1125}
1126
Bill Pemberton0b255e92012-11-27 15:59:38 -05001127static void i801_del_mux(struct i801_priv *priv)
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001128{
1129 if (priv->mux_pdev)
1130 platform_device_unregister(priv->mux_pdev);
1131}
1132
Bill Pemberton0b255e92012-11-27 15:59:38 -05001133static unsigned int i801_get_adapter_class(struct i801_priv *priv)
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001134{
1135 const struct dmi_system_id *id;
1136 const struct i801_mux_config *mux_config;
1137 unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
1138 int i;
1139
1140 id = dmi_first_match(mux_dmi_table);
1141 if (id) {
Jean Delvare28901f52012-10-28 21:37:01 +01001142 /* Remove branch classes from trunk */
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001143 mux_config = id->driver_data;
1144 for (i = 0; i < mux_config->n_values; i++)
1145 class &= ~mux_config->classes[i];
1146
1147 /* Remember for later */
1148 priv->mux_drvdata = mux_config;
1149 }
1150
1151 return class;
1152}
1153#else
1154static inline int i801_add_mux(struct i801_priv *priv) { return 0; }
1155static inline void i801_del_mux(struct i801_priv *priv) { }
1156
1157static inline unsigned int i801_get_adapter_class(struct i801_priv *priv)
1158{
1159 return I2C_CLASS_HWMON | I2C_CLASS_SPD;
1160}
1161#endif
1162
Mika Westerberg94246932015-08-06 13:46:25 +01001163static const struct itco_wdt_platform_data tco_platform_data = {
1164 .name = "Intel PCH",
1165 .version = 4,
1166};
1167
1168static DEFINE_SPINLOCK(p2sb_spinlock);
1169
1170static void i801_add_tco(struct i801_priv *priv)
1171{
1172 struct pci_dev *pci_dev = priv->pci_dev;
1173 struct resource tco_res[3], *res;
1174 struct platform_device *pdev;
1175 unsigned int devfn;
1176 u32 tco_base, tco_ctl;
1177 u32 base_addr, ctrl_val;
1178 u64 base64_addr;
1179
1180 if (!(priv->features & FEATURE_TCO))
1181 return;
1182
1183 pci_read_config_dword(pci_dev, TCOBASE, &tco_base);
1184 pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl);
1185 if (!(tco_ctl & TCOCTL_EN))
1186 return;
1187
1188 memset(tco_res, 0, sizeof(tco_res));
1189
1190 res = &tco_res[ICH_RES_IO_TCO];
1191 res->start = tco_base & ~1;
1192 res->end = res->start + 32 - 1;
1193 res->flags = IORESOURCE_IO;
1194
1195 /*
1196 * Power Management registers.
1197 */
1198 devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 2);
1199 pci_bus_read_config_dword(pci_dev->bus, devfn, ACPIBASE, &base_addr);
1200
1201 res = &tco_res[ICH_RES_IO_SMI];
1202 res->start = (base_addr & ~1) + ACPIBASE_SMI_OFF;
1203 res->end = res->start + 3;
1204 res->flags = IORESOURCE_IO;
1205
1206 /*
1207 * Enable the ACPI I/O space.
1208 */
1209 pci_bus_read_config_dword(pci_dev->bus, devfn, ACPICTRL, &ctrl_val);
1210 ctrl_val |= ACPICTRL_EN;
1211 pci_bus_write_config_dword(pci_dev->bus, devfn, ACPICTRL, ctrl_val);
1212
1213 /*
1214 * We must access the NO_REBOOT bit over the Primary to Sideband
1215 * bridge (P2SB). The BIOS prevents the P2SB device from being
1216 * enumerated by the PCI subsystem, so we need to unhide/hide it
1217 * to lookup the P2SB BAR.
1218 */
1219 spin_lock(&p2sb_spinlock);
1220
1221 devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1);
1222
1223 /* Unhide the P2SB device */
1224 pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0);
1225
1226 pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr);
1227 base64_addr = base_addr & 0xfffffff0;
1228
1229 pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr);
1230 base64_addr |= (u64)base_addr << 32;
1231
1232 /* Hide the P2SB device */
1233 pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x1);
1234 spin_unlock(&p2sb_spinlock);
1235
1236 res = &tco_res[ICH_RES_MEM_OFF];
1237 res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
1238 res->end = res->start + 3;
1239 res->flags = IORESOURCE_MEM;
1240
1241 pdev = platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
1242 tco_res, 3, &tco_platform_data,
1243 sizeof(tco_platform_data));
1244 if (IS_ERR(pdev)) {
1245 dev_warn(&pci_dev->dev, "failed to create iTCO device\n");
1246 return;
1247 }
1248
1249 priv->tco_pdev = pdev;
1250}
1251
Bill Pemberton0b255e92012-11-27 15:59:38 -05001252static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253{
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001254 unsigned char temp;
Jean Delvareadff6872010-05-21 18:40:54 +02001255 int err, i;
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001256 struct i801_priv *priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257
Jarkko Nikula1621c592015-02-13 15:52:23 +02001258 priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001259 if (!priv)
1260 return -ENOMEM;
1261
1262 i2c_set_adapdata(&priv->adapter, priv);
1263 priv->adapter.owner = THIS_MODULE;
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001264 priv->adapter.class = i801_get_adapter_class(priv);
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001265 priv->adapter.algo = &smbus_algorithm;
Dustin Byford8eb5c872015-10-23 12:27:07 -07001266 priv->adapter.dev.parent = &dev->dev;
1267 ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev));
1268 priv->adapter.retries = 3;
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001269
1270 priv->pci_dev = dev;
Jean Delvare250d1bd2006-12-10 21:21:33 +01001271 switch (dev->device) {
Mika Westerberg94246932015-08-06 13:46:25 +01001272 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS:
1273 case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS:
Mika Westerberg84d7f2e2015-10-13 15:41:39 +03001274 case PCI_DEVICE_ID_INTEL_DNV_SMBUS:
Mika Westerberg94246932015-08-06 13:46:25 +01001275 priv->features |= FEATURE_I2C_BLOCK_READ;
1276 priv->features |= FEATURE_IRQ;
1277 priv->features |= FEATURE_SMBUS_PEC;
1278 priv->features |= FEATURE_BLOCK_BUFFER;
1279 priv->features |= FEATURE_TCO;
1280 break;
1281
Jean Delvaree7198fb2011-05-24 20:58:49 +02001282 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
1283 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
1284 case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
James Ralstona3fc0ff2013-02-14 09:15:33 +00001285 case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0:
1286 case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1:
1287 case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2:
Jean Delvaree7198fb2011-05-24 20:58:49 +02001288 priv->features |= FEATURE_IDF;
1289 /* fall through */
Jean Delvaree0e8398c2010-05-21 18:40:55 +02001290 default:
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001291 priv->features |= FEATURE_I2C_BLOCK_READ;
Jean Delvare6676a842012-12-16 21:11:55 +01001292 priv->features |= FEATURE_IRQ;
Jean Delvare63420642008-01-27 18:14:50 +01001293 /* fall through */
1294 case PCI_DEVICE_ID_INTEL_82801DB_3:
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001295 priv->features |= FEATURE_SMBUS_PEC;
1296 priv->features |= FEATURE_BLOCK_BUFFER;
Jean Delvaree0e8398c2010-05-21 18:40:55 +02001297 /* fall through */
1298 case PCI_DEVICE_ID_INTEL_82801CA_3:
1299 case PCI_DEVICE_ID_INTEL_82801BA_2:
1300 case PCI_DEVICE_ID_INTEL_82801AB_3:
1301 case PCI_DEVICE_ID_INTEL_82801AA_3:
Jean Delvare250d1bd2006-12-10 21:21:33 +01001302 break;
Jean Delvare250d1bd2006-12-10 21:21:33 +01001303 }
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001304
Jean Delvareadff6872010-05-21 18:40:54 +02001305 /* Disable features on user request */
1306 for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001307 if (priv->features & disable_features & (1 << i))
Jean Delvareadff6872010-05-21 18:40:54 +02001308 dev_notice(&dev->dev, "%s disabled by user\n",
1309 i801_feature_names[i]);
1310 }
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001311 priv->features &= ~disable_features;
Jean Delvareadff6872010-05-21 18:40:54 +02001312
Jarkko Nikulafef220d2015-02-13 15:52:25 +02001313 err = pcim_enable_device(dev);
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001314 if (err) {
1315 dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
1316 err);
Jarkko Nikulafef220d2015-02-13 15:52:25 +02001317 return err;
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001318 }
Jarkko Nikulafef220d2015-02-13 15:52:25 +02001319 pcim_pin_device(dev);
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001320
1321 /* Determine the address of the SMBus area */
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001322 priv->smba = pci_resource_start(dev, SMBBAR);
1323 if (!priv->smba) {
Jarkko Nikula9cbbf3d2015-02-13 15:52:21 +02001324 dev_err(&dev->dev,
1325 "SMBus base address uninitialized, upgrade BIOS\n");
Jarkko Nikulafef220d2015-02-13 15:52:25 +02001326 return -ENODEV;
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001327 }
1328
Jean Delvare54fb4a052008-07-14 22:38:33 +02001329 err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);
Jean Delvare18669ea2009-10-04 22:53:45 +02001330 if (err) {
Jarkko Nikulafef220d2015-02-13 15:52:25 +02001331 return -ENODEV;
Jean Delvare18669ea2009-10-04 22:53:45 +02001332 }
Jean Delvare54fb4a052008-07-14 22:38:33 +02001333
Jarkko Nikulafef220d2015-02-13 15:52:25 +02001334 err = pcim_iomap_regions(dev, 1 << SMBBAR,
1335 dev_driver_string(&dev->dev));
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001336 if (err) {
Jarkko Nikula9cbbf3d2015-02-13 15:52:21 +02001337 dev_err(&dev->dev,
1338 "Failed to request SMBus region 0x%lx-0x%Lx\n",
1339 priv->smba,
Andrew Morton598736c2006-06-30 01:56:20 -07001340 (unsigned long long)pci_resource_end(dev, SMBBAR));
Jarkko Nikulafef220d2015-02-13 15:52:25 +02001341 return err;
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001342 }
1343
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001344 pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
1345 priv->original_hstcfg = temp;
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001346 temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */
1347 if (!(temp & SMBHSTCFG_HST_EN)) {
1348 dev_info(&dev->dev, "Enabling SMBus device\n");
1349 temp |= SMBHSTCFG_HST_EN;
1350 }
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001351 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp);
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001352
Daniel Kurtz636752b2012-07-24 14:13:58 +02001353 if (temp & SMBHSTCFG_SMB_SMI_EN) {
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001354 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
Daniel Kurtz636752b2012-07-24 14:13:58 +02001355 /* Disable SMBus interrupt feature if SMBus using SMI# */
1356 priv->features &= ~FEATURE_IRQ;
Daniel Kurtz636752b2012-07-24 14:13:58 +02001357 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001358
Jean Delvarea0921b62008-01-27 18:14:50 +01001359 /* Clear special mode bits */
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001360 if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
1361 outb_p(inb_p(SMBAUXCTL(priv)) &
1362 ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
Jean Delvarea0921b62008-01-27 18:14:50 +01001363
Jean Delvareb3b8df92014-11-12 10:20:40 +01001364 /* Default timeout in interrupt mode: 200 ms */
1365 priv->adapter.timeout = HZ / 5;
1366
Daniel Kurtz636752b2012-07-24 14:13:58 +02001367 if (priv->features & FEATURE_IRQ) {
Jean Delvareaeb8a3d2014-11-12 10:25:37 +01001368 u16 pcictl, pcists;
1369
1370 /* Complain if an interrupt is already pending */
1371 pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
1372 if (pcists & SMBPCISTS_INTS)
1373 dev_warn(&dev->dev, "An interrupt is pending!\n");
1374
1375 /* Check if interrupts have been disabled */
1376 pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl);
1377 if (pcictl & SMBPCICTL_INTDIS) {
1378 dev_info(&dev->dev, "Interrupts are disabled\n");
1379 priv->features &= ~FEATURE_IRQ;
1380 }
1381 }
1382
1383 if (priv->features & FEATURE_IRQ) {
Daniel Kurtz636752b2012-07-24 14:13:58 +02001384 init_waitqueue_head(&priv->waitq);
1385
Jarkko Nikula1621c592015-02-13 15:52:23 +02001386 err = devm_request_irq(&dev->dev, dev->irq, i801_isr,
1387 IRQF_SHARED,
1388 dev_driver_string(&dev->dev), priv);
Daniel Kurtz636752b2012-07-24 14:13:58 +02001389 if (err) {
1390 dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
1391 dev->irq, err);
Jean Delvareae944712014-11-12 10:24:07 +01001392 priv->features &= ~FEATURE_IRQ;
Daniel Kurtz636752b2012-07-24 14:13:58 +02001393 }
1394 }
Jean Delvareae944712014-11-12 10:24:07 +01001395 dev_info(&dev->dev, "SMBus using %s\n",
1396 priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling");
Daniel Kurtz636752b2012-07-24 14:13:58 +02001397
Mika Westerberg94246932015-08-06 13:46:25 +01001398 i801_add_tco(priv);
1399
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001400 snprintf(priv->adapter.name, sizeof(priv->adapter.name),
1401 "SMBus I801 adapter at %04lx", priv->smba);
1402 err = i2c_add_adapter(&priv->adapter);
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001403 if (err) {
1404 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
Jarkko Nikulafef220d2015-02-13 15:52:25 +02001405 return err;
Jean Delvare02dd7ae2006-06-12 21:53:41 +02001406 }
Jean Delvare1561bfe2009-01-07 14:29:17 +01001407
Jean Delvaree7198fb2011-05-24 20:58:49 +02001408 i801_probe_optional_slaves(priv);
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001409 /* We ignore errors - multiplexing is optional */
1410 i801_add_mux(priv);
Jean Delvare1561bfe2009-01-07 14:29:17 +01001411
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001412 pci_set_drvdata(dev, priv);
Daniel Kurtz636752b2012-07-24 14:13:58 +02001413
Daniel Ritzd6fcb3b2006-06-27 18:40:54 +02001414 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001415}
1416
Bill Pemberton0b255e92012-11-27 15:59:38 -05001417static void i801_remove(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001418{
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001419 struct i801_priv *priv = pci_get_drvdata(dev);
1420
Jean Delvare3ad7ea12012-10-05 22:23:53 +02001421 i801_del_mux(priv);
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001422 i2c_del_adapter(&priv->adapter);
1423 pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
Daniel Kurtz636752b2012-07-24 14:13:58 +02001424
Mika Westerberg94246932015-08-06 13:46:25 +01001425 platform_device_unregister(priv->tco_pdev);
1426
Daniel Ritzd6fcb3b2006-06-27 18:40:54 +02001427 /*
1428 * do not call pci_disable_device(dev) since it can cause hard hangs on
1429 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
1430 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001431}
1432
Jean Delvarea5aaea32007-03-22 19:49:01 +01001433#ifdef CONFIG_PM
1434static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
1435{
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001436 struct i801_priv *priv = pci_get_drvdata(dev);
1437
Jean Delvarea5aaea32007-03-22 19:49:01 +01001438 pci_save_state(dev);
David Woodhouse0cd96eb2010-10-31 21:06:59 +01001439 pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
Jean Delvarea5aaea32007-03-22 19:49:01 +01001440 pci_set_power_state(dev, pci_choose_state(dev, mesg));
1441 return 0;
1442}
1443
1444static int i801_resume(struct pci_dev *dev)
1445{
1446 pci_set_power_state(dev, PCI_D0);
1447 pci_restore_state(dev);
Jarkko Nikulaf85da3f2015-02-13 15:52:24 +02001448 return 0;
Jean Delvarea5aaea32007-03-22 19:49:01 +01001449}
1450#else
1451#define i801_suspend NULL
1452#define i801_resume NULL
1453#endif
1454
Linus Torvalds1da177e2005-04-16 15:20:36 -07001455static struct pci_driver i801_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001456 .name = "i801_smbus",
1457 .id_table = i801_ids,
1458 .probe = i801_probe,
Bill Pemberton0b255e92012-11-27 15:59:38 -05001459 .remove = i801_remove,
Jean Delvarea5aaea32007-03-22 19:49:01 +01001460 .suspend = i801_suspend,
1461 .resume = i801_resume,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001462};
1463
1464static int __init i2c_i801_init(void)
1465{
Jean Delvare6aa14642011-05-24 20:58:49 +02001466 if (dmi_name_in_vendors("FUJITSU"))
1467 input_apanel_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001468 return pci_register_driver(&i801_driver);
1469}
1470
1471static void __exit i2c_i801_exit(void)
1472{
1473 pci_unregister_driver(&i801_driver);
1474}
1475
Jean Delvare7c81c602014-01-29 20:40:08 +01001476MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, Jean Delvare <jdelvare@suse.de>");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001477MODULE_DESCRIPTION("I801 SMBus driver");
1478MODULE_LICENSE("GPL");
1479
1480module_init(i2c_i801_init);
1481module_exit(i2c_i801_exit);