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Tomasz Figa15dfdfa2013-07-24 13:41:45 +09001/*
2 * Samsung's Exynos4412 based Trats 2 board device tree source
3 *
4 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Device tree source file for Samsung's Trats 2 board which is based on
8 * Samsung's Exynos4412 SoC.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15/dts-v1/;
16#include "exynos4412.dtsi"
Krzysztof Kozlowski7eec1262014-09-24 01:22:49 +090017#include <dt-bindings/gpio/gpio.h>
Krzysztof Kozlowskie8614292015-02-04 07:43:44 +090018#include <dt-bindings/interrupt-controller/irq.h>
Krzysztof Kozlowskice9940a2015-05-02 14:40:08 +090019#include <dt-bindings/clock/maxim,max77686.h>
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090020
21/ {
22 model = "Samsung Trats 2 based on Exynos4412";
Sachin Kamat8bdb31b2014-03-21 02:17:22 +090023 compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4";
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090024
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +090025 aliases {
Tomasz Stanislawski6af2ba92014-05-09 05:58:59 +090026 i2c9 = &i2c_ak8975;
Beomho Seo85cb4e02014-05-22 07:56:53 +090027 i2c10 = &i2c_cm36651;
Krzysztof Kozlowski7eec1262014-09-24 01:22:49 +090028 i2c11 = &i2c_max77693;
Krzysztof Kozlowskie8614292015-02-04 07:43:44 +090029 i2c12 = &i2c_max77693_fuel;
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +090030 };
31
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090032 memory {
33 reg = <0x40000000 0x40000000>;
34 };
35
36 chosen {
37 bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rootwait earlyprintk panic=5";
Tomasz Figa62d38092015-01-23 14:47:42 +010038 stdout-path = &serial_2;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090039 };
40
41 firmware@0204F000 {
42 compatible = "samsung,secure-firmware";
43 reg = <0x0204F000 0x1000>;
44 };
45
46 fixed-rate-clocks {
47 xxti {
48 compatible = "samsung,clock-xxti", "fixed-clock";
49 clock-frequency = <0>;
50 };
51
52 xusbxti {
53 compatible = "samsung,clock-xusbxti", "fixed-clock";
54 clock-frequency = <24000000>;
55 };
56 };
57
58 regulators {
59 compatible = "simple-bus";
60 #address-cells = <1>;
61 #size-cells = <0>;
62
Sylwester Nawrockib4fec642013-08-06 02:49:44 +090063 cam_io_reg: voltage-regulator-1 {
64 compatible = "regulator-fixed";
65 regulator-name = "CAM_SENSOR_A";
66 regulator-min-microvolt = <2800000>;
67 regulator-max-microvolt = <2800000>;
68 gpio = <&gpm0 2 0>;
69 enable-active-high;
70 };
71
Andrzej Hajda420ae842014-03-28 12:52:45 +010072 lcd_vdd3_reg: voltage-regulator-2 {
73 compatible = "regulator-fixed";
74 regulator-name = "LCD_VDD_2.2V";
75 regulator-min-microvolt = <2200000>;
76 regulator-max-microvolt = <2200000>;
77 gpio = <&gpc0 1 0>;
78 enable-active-high;
79 };
80
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +090081 cam_af_reg: voltage-regulator-3 {
82 compatible = "regulator-fixed";
83 regulator-name = "CAM_AF";
84 regulator-min-microvolt = <2800000>;
85 regulator-max-microvolt = <2800000>;
86 gpio = <&gpm0 4 0>;
87 enable-active-high;
88 };
89
Beomho Seo85cb4e02014-05-22 07:56:53 +090090 ps_als_reg: voltage-regulator-5 {
91 compatible = "regulator-fixed";
92 regulator-name = "LED_A_3.0V";
93 regulator-min-microvolt = <3000000>;
94 regulator-max-microvolt = <3000000>;
95 gpio = <&gpj0 5 0>;
96 enable-active-high;
97 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +090098 };
99
100 gpio-keys {
101 compatible = "gpio-keys";
102
103 key-down {
Beomho Seo172ff6c2014-05-22 07:57:39 +0900104 gpios = <&gpx3 3 1>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900105 linux,code = <114>;
106 label = "volume down";
107 debounce-interval = <10>;
108 };
109
110 key-up {
Beomho Seo172ff6c2014-05-22 07:57:39 +0900111 gpios = <&gpx2 2 1>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900112 linux,code = <115>;
113 label = "volume up";
114 debounce-interval = <10>;
115 };
116
117 key-power {
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900118 gpios = <&gpx2 7 1>;
119 linux,code = <116>;
120 label = "power";
121 debounce-interval = <10>;
122 gpio-key,wakeup;
123 };
Beomho Seo172ff6c2014-05-22 07:57:39 +0900124
125 key-ok {
126 gpios = <&gpx0 1 1>;
127 linux,code = <139>;
128 label = "ok";
129 debounce-inteval = <10>;
130 gpio-key,wakeup;
131 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900132 };
133
Chanwoo Choi4f423782014-03-18 06:25:59 +0900134 adc: adc@126C0000 {
135 vdd-supply = <&ldo3_reg>;
136 status = "okay";
137 };
138
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900139 i2c@13890000 {
140 samsung,i2c-sda-delay = <100>;
141 samsung,i2c-slave-addr = <0x10>;
142 samsung,i2c-max-bus-freq = <400000>;
143 pinctrl-0 = <&i2c3_bus>;
144 pinctrl-names = "default";
145 status = "okay";
146
147 mms114-touchscreen@48 {
148 compatible = "melfas,mms114";
149 reg = <0x48>;
150 interrupt-parent = <&gpm2>;
151 interrupts = <3 2>;
152 x-size = <720>;
153 y-size = <1280>;
154 avdd-supply = <&ldo23_reg>;
155 vdd-supply = <&ldo24_reg>;
156 };
157 };
158
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +0900159 i2c_0: i2c@13860000 {
160 samsung,i2c-sda-delay = <100>;
161 samsung,i2c-slave-addr = <0x10>;
162 samsung,i2c-max-bus-freq = <400000>;
163 pinctrl-0 = <&i2c0_bus>;
164 pinctrl-names = "default";
165 status = "okay";
166
167 s5c73m3@3c {
168 compatible = "samsung,s5c73m3";
169 reg = <0x3c>;
170 standby-gpios = <&gpm0 1 1>; /* ISP_STANDBY */
171 xshutdown-gpios = <&gpf1 3 1>; /* ISP_RESET */
172 vdd-int-supply = <&buck9_reg>;
173 vddio-cis-supply = <&ldo9_reg>;
174 vdda-supply = <&ldo17_reg>;
175 vddio-host-supply = <&ldo18_reg>;
176 vdd-af-supply = <&cam_af_reg>;
177 vdd-reg-supply = <&cam_io_reg>;
178 clock-frequency = <24000000>;
179 /* CAM_A_CLKOUT */
180 clocks = <&camera 0>;
181 clock-names = "cis_extclk";
182 port {
183 s5c73m3_ep: endpoint {
184 remote-endpoint = <&csis0_ep>;
185 data-lanes = <1 2 3 4>;
186 };
187 };
188 };
189 };
190
Inha Song440e5ae2015-02-04 07:51:38 +0900191 i2c@138A0000 {
192 samsung,i2c-sda-delay = <100>;
193 samsung,i2c-slave-addr = <0x10>;
194 samsung,i2c-max-bus-freq = <100000>;
195 pinctrl-0 = <&i2c4_bus>;
196 pinctrl-names = "default";
197 status = "okay";
198
199 wm1811: wm1811@1a {
200 compatible = "wlf,wm1811";
201 reg = <0x1a>;
202 clocks = <&pmu_system_controller 0>;
203 clock-names = "MCLK1";
204 DCVDD-supply = <&ldo3_reg>;
205 DBVDD1-supply = <&ldo3_reg>;
206 wlf,ldo1ena = <&gpj0 4 0>;
207 };
208 };
209
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900210 i2c@138D0000 {
211 samsung,i2c-sda-delay = <100>;
212 samsung,i2c-slave-addr = <0x10>;
213 samsung,i2c-max-bus-freq = <100000>;
214 pinctrl-0 = <&i2c7_bus>;
215 pinctrl-names = "default";
216 status = "okay";
217
Krzysztof Kozlowskice9940a2015-05-02 14:40:08 +0900218 max77686: max77686_pmic@09 {
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900219 compatible = "maxim,max77686";
220 interrupt-parent = <&gpx0>;
221 interrupts = <7 0>;
222 reg = <0x09>;
Tomasz Figaada12c42013-12-12 17:07:21 +0100223 #clock-cells = <1>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900224
225 voltage-regulators {
226 ldo1_reg: ldo1 {
227 regulator-compatible = "LDO1";
228 regulator-name = "VALIVE_1.0V_AP";
229 regulator-min-microvolt = <1000000>;
230 regulator-max-microvolt = <1000000>;
231 regulator-always-on;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900232 };
233
234 ldo2_reg: ldo2 {
235 regulator-compatible = "LDO2";
236 regulator-name = "VM1M2_1.2V_AP";
237 regulator-min-microvolt = <1200000>;
238 regulator-max-microvolt = <1200000>;
239 regulator-always-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900240 regulator-state-mem {
241 regulator-on-in-suspend;
242 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900243 };
244
245 ldo3_reg: ldo3 {
246 regulator-compatible = "LDO3";
247 regulator-name = "VCC_1.8V_AP";
248 regulator-min-microvolt = <1800000>;
249 regulator-max-microvolt = <1800000>;
250 regulator-always-on;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900251 };
252
253 ldo4_reg: ldo4 {
254 regulator-compatible = "LDO4";
255 regulator-name = "VCC_2.8V_AP";
256 regulator-min-microvolt = <2800000>;
257 regulator-max-microvolt = <2800000>;
258 regulator-always-on;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900259 };
260
261 ldo5_reg: ldo5 {
262 regulator-compatible = "LDO5";
263 regulator-name = "VCC_1.8V_IO";
264 regulator-min-microvolt = <1800000>;
265 regulator-max-microvolt = <1800000>;
266 regulator-always-on;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900267 };
268
269 ldo6_reg: ldo6 {
270 regulator-compatible = "LDO6";
271 regulator-name = "VMPLL_1.0V_AP";
272 regulator-min-microvolt = <1000000>;
273 regulator-max-microvolt = <1000000>;
274 regulator-always-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900275 regulator-state-mem {
276 regulator-on-in-suspend;
277 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900278 };
279
280 ldo7_reg: ldo7 {
281 regulator-compatible = "LDO7";
282 regulator-name = "VPLL_1.0V_AP";
283 regulator-min-microvolt = <1000000>;
284 regulator-max-microvolt = <1000000>;
285 regulator-always-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900286 regulator-state-mem {
287 regulator-on-in-suspend;
288 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900289 };
290
291 ldo8_reg: ldo8 {
292 regulator-compatible = "LDO8";
293 regulator-name = "VMIPI_1.0V";
294 regulator-min-microvolt = <1000000>;
295 regulator-max-microvolt = <1000000>;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900296 regulator-state-mem {
297 regulator-off-in-suspend;
298 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900299 };
300
301 ldo9_reg: ldo9 {
302 regulator-compatible = "LDO9";
303 regulator-name = "CAM_ISP_MIPI_1.2V";
304 regulator-min-microvolt = <1200000>;
305 regulator-max-microvolt = <1200000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900306 };
307
308 ldo10_reg: ldo10 {
309 regulator-compatible = "LDO10";
310 regulator-name = "VMIPI_1.8V";
311 regulator-min-microvolt = <1800000>;
312 regulator-max-microvolt = <1800000>;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900313 regulator-state-mem {
314 regulator-off-in-suspend;
315 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900316 };
317
318 ldo11_reg: ldo11 {
319 regulator-compatible = "LDO11";
320 regulator-name = "VABB1_1.95V";
321 regulator-min-microvolt = <1950000>;
322 regulator-max-microvolt = <1950000>;
323 regulator-always-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900324 regulator-state-mem {
325 regulator-off-in-suspend;
326 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900327 };
328
329 ldo12_reg: ldo12 {
330 regulator-compatible = "LDO12";
331 regulator-name = "VUOTG_3.0V";
332 regulator-min-microvolt = <3000000>;
333 regulator-max-microvolt = <3000000>;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900334 regulator-state-mem {
335 regulator-off-in-suspend;
336 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900337 };
338
339 ldo13_reg: ldo13 {
340 regulator-compatible = "LDO13";
341 regulator-name = "NFC_AVDD_1.8V";
342 regulator-min-microvolt = <1800000>;
343 regulator-max-microvolt = <1800000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900344 };
345
346 ldo14_reg: ldo14 {
347 regulator-compatible = "LDO14";
348 regulator-name = "VABB2_1.95V";
349 regulator-min-microvolt = <1950000>;
350 regulator-max-microvolt = <1950000>;
351 regulator-always-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900352 regulator-state-mem {
353 regulator-off-in-suspend;
354 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900355 };
356
357 ldo15_reg: ldo15 {
358 regulator-compatible = "LDO15";
359 regulator-name = "VHSIC_1.0V";
360 regulator-min-microvolt = <1000000>;
361 regulator-max-microvolt = <1000000>;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900362 regulator-state-mem {
363 regulator-on-in-suspend;
364 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900365 };
366
367 ldo16_reg: ldo16 {
368 regulator-compatible = "LDO16";
369 regulator-name = "VHSIC_1.8V";
370 regulator-min-microvolt = <1800000>;
371 regulator-max-microvolt = <1800000>;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900372 regulator-state-mem {
373 regulator-on-in-suspend;
374 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900375 };
376
377 ldo17_reg: ldo17 {
378 regulator-compatible = "LDO17";
379 regulator-name = "CAM_SENSOR_CORE_1.2V";
380 regulator-min-microvolt = <1200000>;
381 regulator-max-microvolt = <1200000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900382 };
383
384 ldo18_reg: ldo18 {
385 regulator-compatible = "LDO18";
386 regulator-name = "CAM_ISP_SEN_IO_1.8V";
387 regulator-min-microvolt = <1800000>;
388 regulator-max-microvolt = <1800000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900389 };
390
391 ldo19_reg: ldo19 {
392 regulator-compatible = "LDO19";
393 regulator-name = "VT_CAM_1.8V";
394 regulator-min-microvolt = <1800000>;
395 regulator-max-microvolt = <1800000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900396 };
397
398 ldo20_reg: ldo20 {
399 regulator-compatible = "LDO20";
400 regulator-name = "VDDQ_PRE_1.8V";
401 regulator-min-microvolt = <1800000>;
402 regulator-max-microvolt = <1800000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900403 };
404
405 ldo21_reg: ldo21 {
406 regulator-compatible = "LDO21";
407 regulator-name = "VTF_2.8V";
408 regulator-min-microvolt = <2800000>;
409 regulator-max-microvolt = <2800000>;
Krzysztof Kozlowskifaf9a3e2015-02-04 07:43:54 +0900410 maxim,ena-gpios = <&gpy2 0 GPIO_ACTIVE_HIGH>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900411 };
412
413 ldo22_reg: ldo22 {
414 regulator-compatible = "LDO22";
415 regulator-name = "VMEM_VDD_2.8V";
416 regulator-min-microvolt = <2800000>;
417 regulator-max-microvolt = <2800000>;
Krzysztof Kozlowskifaf9a3e2015-02-04 07:43:54 +0900418 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900419 };
420
421 ldo23_reg: ldo23 {
422 regulator-compatible = "LDO23";
423 regulator-name = "TSP_AVDD_3.3V";
424 regulator-min-microvolt = <3300000>;
425 regulator-max-microvolt = <3300000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900426 };
427
428 ldo24_reg: ldo24 {
429 regulator-compatible = "LDO24";
430 regulator-name = "TSP_VDD_1.8V";
431 regulator-min-microvolt = <1800000>;
432 regulator-max-microvolt = <1800000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900433 };
434
435 ldo25_reg: ldo25 {
436 regulator-compatible = "LDO25";
437 regulator-name = "LCD_VCC_3.3V";
438 regulator-min-microvolt = <2800000>;
439 regulator-max-microvolt = <2800000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900440 };
441
442 ldo26_reg: ldo26 {
443 regulator-compatible = "LDO26";
444 regulator-name = "MOTOR_VCC_3.0V";
445 regulator-min-microvolt = <3000000>;
446 regulator-max-microvolt = <3000000>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900447 };
448
449 buck1_reg: buck1 {
450 regulator-compatible = "BUCK1";
451 regulator-name = "vdd_mif";
452 regulator-min-microvolt = <850000>;
453 regulator-max-microvolt = <1100000>;
454 regulator-always-on;
455 regulator-boot-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900456 regulator-state-mem {
457 regulator-off-in-suspend;
458 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900459 };
460
461 buck2_reg: buck2 {
462 regulator-compatible = "BUCK2";
463 regulator-name = "vdd_arm";
464 regulator-min-microvolt = <850000>;
465 regulator-max-microvolt = <1500000>;
466 regulator-always-on;
467 regulator-boot-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900468 regulator-state-mem {
469 regulator-on-in-suspend;
470 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900471 };
472
473 buck3_reg: buck3 {
474 regulator-compatible = "BUCK3";
475 regulator-name = "vdd_int";
476 regulator-min-microvolt = <850000>;
477 regulator-max-microvolt = <1150000>;
478 regulator-always-on;
479 regulator-boot-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900480 regulator-state-mem {
481 regulator-off-in-suspend;
482 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900483 };
484
485 buck4_reg: buck4 {
486 regulator-compatible = "BUCK4";
487 regulator-name = "vdd_g3d";
488 regulator-min-microvolt = <850000>;
489 regulator-max-microvolt = <1150000>;
490 regulator-boot-on;
Krzysztof Kozlowski4a235f62015-02-04 07:43:49 +0900491 regulator-state-mem {
492 regulator-off-in-suspend;
493 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900494 };
495
496 buck5_reg: buck5 {
497 regulator-compatible = "BUCK5";
498 regulator-name = "VMEM_1.2V_AP";
499 regulator-min-microvolt = <1200000>;
500 regulator-max-microvolt = <1200000>;
501 regulator-always-on;
502 };
503
504 buck6_reg: buck6 {
505 regulator-compatible = "BUCK6";
506 regulator-name = "VCC_SUB_1.35V";
507 regulator-min-microvolt = <1350000>;
508 regulator-max-microvolt = <1350000>;
509 regulator-always-on;
510 };
511
512 buck7_reg: buck7 {
513 regulator-compatible = "BUCK7";
514 regulator-name = "VCC_SUB_2.0V";
515 regulator-min-microvolt = <2000000>;
516 regulator-max-microvolt = <2000000>;
517 regulator-always-on;
518 };
519
520 buck8_reg: buck8 {
521 regulator-compatible = "BUCK8";
522 regulator-name = "VMEM_VDDF_3.0V";
523 regulator-min-microvolt = <2850000>;
524 regulator-max-microvolt = <2850000>;
Krzysztof Kozlowskifaf9a3e2015-02-04 07:43:54 +0900525 maxim,ena-gpios = <&gpk0 2 GPIO_ACTIVE_HIGH>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900526 };
527
528 buck9_reg: buck9 {
529 regulator-compatible = "BUCK9";
530 regulator-name = "CAM_ISP_CORE_1.2V";
531 regulator-min-microvolt = <1000000>;
532 regulator-max-microvolt = <1200000>;
Krzysztof Kozlowskifaf9a3e2015-02-04 07:43:54 +0900533 maxim,ena-gpios = <&gpm0 3 GPIO_ACTIVE_HIGH>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900534 };
535 };
536 };
537 };
538
Krzysztof Kozlowski7eec1262014-09-24 01:22:49 +0900539 i2c_max77693: i2c-gpio-1 {
540 compatible = "i2c-gpio";
541 gpios = <&gpm2 0 GPIO_ACTIVE_HIGH>, <&gpm2 1 GPIO_ACTIVE_HIGH>;
542 i2c-gpio,delay-us = <2>;
543 #address-cells = <1>;
544 #size-cells = <0>;
545 status = "okay";
546
547 max77693@66 {
548 compatible = "maxim,max77693";
549 interrupt-parent = <&gpx1>;
550 interrupts = <5 2>;
551 reg = <0x66>;
552
553 regulators {
554 esafeout1_reg: ESAFEOUT1@1 {
555 regulator-name = "ESAFEOUT1";
556 };
557 esafeout2_reg: ESAFEOUT2@2 {
558 regulator-name = "ESAFEOUT2";
559 };
560 charger_reg: CHARGER@0 {
561 regulator-name = "CHARGER";
562 regulator-min-microamp = <60000>;
563 regulator-max-microamp = <2580000>;
564 };
565 };
Jaewon Kimd9c68082014-11-22 23:19:22 +0900566
567 max77693_haptic {
568 compatible = "maxim,max77693-haptic";
569 haptic-supply = <&ldo26_reg>;
570 pwms = <&pwm 0 38022 0>;
571 };
Krzysztof Kozlowski043ef142015-02-04 07:47:39 +0900572
573 charger {
574 compatible = "maxim,max77693-charger";
575
576 maxim,constant-microvolt = <4350000>;
577 maxim,min-system-microvolt = <3600000>;
578 maxim,thermal-regulation-celsius = <100>;
579 maxim,battery-overcurrent-microamp = <3500000>;
580 maxim,charge-input-threshold-microvolt = <4300000>;
581 };
Krzysztof Kozlowski7eec1262014-09-24 01:22:49 +0900582 };
583 };
584
Krzysztof Kozlowskie8614292015-02-04 07:43:44 +0900585 i2c_max77693_fuel: i2c-gpio-3 {
586 compatible = "i2c-gpio";
587 gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>, <&gpf1 4 GPIO_ACTIVE_HIGH>;
588 i2c-gpio,delay-us = <2>;
589 #address-cells = <1>;
590 #size-cells = <0>;
591 status = "okay";
592
593 max77693-fuel-gauge@36 {
594 compatible = "maxim,max17047";
595 interrupt-parent = <&gpx2>;
596 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
597 reg = <0x36>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900598 };
599 };
600
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +0900601 mmc@12550000 {
602 num-slots = <1>;
603 broken-cd;
604 non-removable;
605 card-detect-delay = <200>;
Krzysztof Kozlowskifaf9a3e2015-02-04 07:43:54 +0900606 vmmc-supply = <&ldo22_reg>;
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900607 clock-frequency = <400000000>;
608 samsung,dw-mshc-ciu-div = <0>;
609 samsung,dw-mshc-sdr-timing = <2 3>;
610 samsung,dw-mshc-ddr-timing = <1 2>;
611 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
612 pinctrl-names = "default";
613 status = "okay";
614 bus-width = <8>;
615 cap-mmc-highspeed;
616 };
617
Krzysztof Kozlowskia427d152014-11-07 08:22:49 +0900618 sdhci@12530000 {
619 bus-width = <4>;
620 cd-gpios = <&gpx3 4 0>;
621 cd-inverted;
622 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4>;
623 pinctrl-names = "default";
624 vmmc-supply = <&ldo21_reg>;
625 status = "okay";
626 };
627
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900628 serial@13800000 {
629 status = "okay";
630 };
631
632 serial@13810000 {
633 status = "okay";
634 };
635
636 serial@13820000 {
637 status = "okay";
638 };
639
640 serial@13830000 {
641 status = "okay";
642 };
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +0900643
Lukasz Majewski432047f2014-11-22 22:58:09 +0900644 tmu@100C0000 {
645 vtmu-supply = <&ldo10_reg>;
646 status = "okay";
647 };
648
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +0900649 i2c_ak8975: i2c-gpio-0 {
650 compatible = "i2c-gpio";
651 gpios = <&gpy2 4 0>, <&gpy2 5 0>;
652 i2c-gpio,delay-us = <2>;
653 #address-cells = <1>;
654 #size-cells = <0>;
655 status = "okay";
656
657 ak8975@0c {
Beomho Seo30cc7982014-05-20 01:12:50 +0900658 compatible = "asahi-kasei,ak8975";
Jacek Anaszewski9f1eaef2013-08-06 02:49:44 +0900659 reg = <0x0c>;
660 gpios = <&gpj0 7 0>;
661 };
662 };
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900663
Beomho Seo85cb4e02014-05-22 07:56:53 +0900664 i2c_cm36651: i2c-gpio-2 {
665 compatible = "i2c-gpio";
666 gpios = <&gpf0 0 1>, <&gpf0 1 1>;
667 i2c-gpio,delay-us = <2>;
668 #address-cells = <1>;
669 #size-cells = <0>;
670
671 cm36651@18 {
672 compatible = "capella,cm36651";
673 reg = <0x18>;
674 interrupt-parent = <&gpx0>;
675 interrupts = <2 2>;
676 vled-supply = <&ps_als_reg>;
677 };
678 };
679
Andrzej Hajda201f1262013-08-06 02:49:45 +0900680 spi_1: spi@13930000 {
681 pinctrl-names = "default";
682 pinctrl-0 = <&spi1_bus>;
Naveen Krishna Chatradhie138d432014-07-16 17:19:10 +0200683 cs-gpios = <&gpb 5 0>;
Andrzej Hajda201f1262013-08-06 02:49:45 +0900684 status = "okay";
685
686 s5c73m3_spi: s5c73m3 {
687 compatible = "samsung,s5c73m3";
688 spi-max-frequency = <50000000>;
689 reg = <0>;
690 controller-data {
Andrzej Hajda201f1262013-08-06 02:49:45 +0900691 samsung,spi-feedback-delay = <2>;
692 };
693 };
694 };
695
Jaewon Kim249358c2014-11-22 23:19:18 +0900696 pwm: pwm@139D0000 {
697 pinctrl-0 = <&pwm0_out>;
698 pinctrl-names = "default";
699 samsung,pwm-outputs = <0>;
700 status = "okay";
701 };
702
Andrzej Hajda420ae842014-03-28 12:52:45 +0100703 dsi_0: dsi@11C80000 {
704 vddcore-supply = <&ldo8_reg>;
705 vddio-supply = <&ldo10_reg>;
706 samsung,pll-clock-frequency = <24000000>;
707 status = "okay";
708
709 ports {
710 #address-cells = <1>;
711 #size-cells = <0>;
712
713 port@1 {
714 reg = <1>;
715
716 dsi_out: endpoint {
717 remote-endpoint = <&dsi_in>;
718 samsung,burst-clock-frequency = <500000000>;
719 samsung,esc-clock-frequency = <20000000>;
720 };
721 };
722 };
723
724 panel@0 {
725 compatible = "samsung,s6e8aa0";
726 reg = <0>;
727 vdd3-supply = <&lcd_vdd3_reg>;
728 vci-supply = <&ldo25_reg>;
729 reset-gpios = <&gpy4 5 0>;
730 power-on-delay= <50>;
731 reset-delay = <100>;
732 init-delay = <100>;
733 flip-horizontal;
734 flip-vertical;
735 panel-width-mm = <58>;
736 panel-height-mm = <103>;
737
738 display-timings {
739 timing-0 {
740 clock-frequency = <0>;
741 hactive = <720>;
742 vactive = <1280>;
743 hfront-porch = <5>;
744 hback-porch = <5>;
745 hsync-len = <5>;
746 vfront-porch = <13>;
747 vback-porch = <1>;
748 vsync-len = <2>;
749 };
750 };
751
752 port {
753 dsi_in: endpoint {
754 remote-endpoint = <&dsi_out>;
755 };
756 };
757 };
758 };
759
Andrzej Hajdabbab1e3f2014-03-28 12:52:47 +0100760 fimd@11c00000 {
761 status = "okay";
762 };
763
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +0900764 camera: camera {
765 pinctrl-0 = <&cam_port_a_clk_active &cam_port_b_clk_active>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900766 pinctrl-names = "default";
767 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900768 assigned-clocks = <&clock CLK_MOUT_CAM0>,
769 <&clock CLK_MOUT_CAM1>;
Sylwester Nawrockicfe3b892015-02-04 07:49:49 +0900770 assigned-clock-parents = <&clock CLK_XUSBXTI>,
771 <&clock CLK_XUSBXTI>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900772
773 fimc_0: fimc@11800000 {
774 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900775 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
776 <&clock CLK_SCLK_FIMC0>;
777 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
778 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900779 };
780
781 fimc_1: fimc@11810000 {
782 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900783 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
784 <&clock CLK_SCLK_FIMC1>;
785 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
786 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900787 };
788
789 fimc_2: fimc@11820000 {
790 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900791 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
792 <&clock CLK_SCLK_FIMC2>;
793 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
794 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900795 };
796
797 fimc_3: fimc@11830000 {
798 status = "okay";
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900799 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
800 <&clock CLK_SCLK_FIMC3>;
801 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
802 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900803 };
804
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +0900805 csis_0: csis@11880000 {
806 status = "okay";
807 vddcore-supply = <&ldo8_reg>;
808 vddio-supply = <&ldo10_reg>;
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900809 assigned-clocks = <&clock CLK_MOUT_CSIS0>,
810 <&clock CLK_SCLK_CSIS0>;
811 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
812 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrocki4cb37862014-05-09 06:01:40 +0900813
814 /* Camera C (3) MIPI CSI-2 (CSIS0) */
815 port@3 {
816 reg = <3>;
817 csis0_ep: endpoint {
818 remote-endpoint = <&s5c73m3_ep>;
819 data-lanes = <1 2 3 4>;
820 samsung,csis-hs-settle = <12>;
821 };
822 };
823 };
824
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900825 csis_1: csis@11890000 {
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900826 status = "okay";
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900827 vddcore-supply = <&ldo8_reg>;
828 vddio-supply = <&ldo10_reg>;
Sylwester Nawrocki0357a442014-11-22 23:13:03 +0900829 assigned-clocks = <&clock CLK_MOUT_CSIS1>,
830 <&clock CLK_SCLK_CSIS1>;
831 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
832 assigned-clock-rates = <0>, <176000000>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900833
834 /* Camera D (4) MIPI CSI-2 (CSIS1) */
835 port@4 {
836 reg = <4>;
837 csis1_ep: endpoint {
838 remote-endpoint = <&is_s5k6a3_ep>;
839 data-lanes = <1>;
840 samsung,csis-hs-settle = <18>;
841 samsung,csis-wclk;
842 };
843 };
844 };
845
846 fimc_lite_0: fimc-lite@12390000 {
847 status = "okay";
848 };
849
850 fimc_lite_1: fimc-lite@123A0000 {
851 status = "okay";
852 };
853
854 fimc-is@12000000 {
855 pinctrl-0 = <&fimc_is_uart>;
856 pinctrl-names = "default";
857 status = "okay";
858
859 i2c1_isp: i2c-isp@12140000 {
860 pinctrl-0 = <&fimc_is_i2c1>;
861 pinctrl-names = "default";
862
863 s5k6a3@10 {
864 compatible = "samsung,s5k6a3";
865 reg = <0x10>;
866 svdda-supply = <&cam_io_reg>;
867 svddio-supply = <&ldo19_reg>;
Sylwester Nawrockiee5eda62014-05-09 06:00:35 +0900868 afvdd-supply = <&ldo19_reg>;
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900869 clock-frequency = <24000000>;
870 /* CAM_B_CLKOUT */
Sylwester Nawrockiee5eda62014-05-09 06:00:35 +0900871 clocks = <&camera 1>;
872 clock-names = "extclk";
Sylwester Nawrockib4fec642013-08-06 02:49:44 +0900873 samsung,camclk-out = <1>;
874 gpios = <&gpm1 6 0>;
875
876 port {
877 is_s5k6a3_ep: endpoint {
878 remote-endpoint = <&csis1_ep>;
879 data-lanes = <1>;
880 };
881 };
882 };
883 };
884 };
885 };
Chanwoo Choi4f423782014-03-18 06:25:59 +0900886
Inha Song440e5ae2015-02-04 07:51:38 +0900887 i2s0: i2s@03830000 {
888 pinctrl-0 = <&i2s0_bus>;
889 pinctrl-names = "default";
890 status = "okay";
891 };
892
893 sound {
894 compatible = "samsung,trats2-audio";
895 samsung,i2s-controller = <&i2s0>;
896 samsung,model = "Trats2";
897 samsung,audio-codec = <&wm1811>;
898 samsung,audio-routing =
899 "SPK", "SPKOUTLN",
900 "SPK", "SPKOUTLP",
901 "SPK", "SPKOUTRN",
902 "SPK", "SPKOUTRP";
903 };
904
Chanho Park3c8977f2014-05-23 03:30:21 +0900905 exynos-usbphy@125B0000 {
906 status = "okay";
907 };
908
909 hsotg@12480000 {
910 vusb_d-supply = <&ldo15_reg>;
911 vusb_a-supply = <&ldo12_reg>;
Marek Szyprowski32f144f2015-01-24 13:12:03 +0900912 dr_mode = "peripheral";
Chanho Park3c8977f2014-05-23 03:30:21 +0900913 status = "okay";
914 };
915
Chanwoo Choi4f423782014-03-18 06:25:59 +0900916 thermistor-ap@0 {
917 compatible = "ntc,ncp15wb473";
918 pullup-uv = <1800000>; /* VCC_1.8V_AP */
919 pullup-ohm = <100000>; /* 100K */
920 pulldown-ohm = <100000>; /* 100K */
921 io-channels = <&adc 1>; /* AP temperature */
922 };
923
924 thermistor-battery@1 {
925 compatible = "ntc,ncp15wb473";
926 pullup-uv = <1800000>; /* VCC_1.8V_AP */
927 pullup-ohm = <100000>; /* 100K */
928 pulldown-ohm = <100000>; /* 100K */
929 io-channels = <&adc 2>; /* Battery temperature */
930 };
Lukasz Majewskibf4a0be2015-01-30 08:26:02 +0900931
932 thermal-zones {
933 cpu_thermal: cpu-thermal {
934 cooling-maps {
935 map0 {
936 /* Corresponds to 800MHz at freq_table */
937 cooling-device = <&cpu0 7 7>;
938 };
939 map1 {
940 /* Corresponds to 200MHz at freq_table */
941 cooling-device = <&cpu0 13 13>;
942 };
943 };
944 };
945 };
Tomasz Figa15dfdfa2013-07-24 13:41:45 +0900946};
Tomasz Figa09918a92014-09-24 01:20:03 +0900947
Inha Song440e5ae2015-02-04 07:51:38 +0900948&pmu_system_controller {
949 assigned-clocks = <&pmu_system_controller 0>;
950 assigned-clock-parents = <&clock CLK_XUSBXTI>;
951};
952
Chanwoo Choi7808cae2015-02-04 08:11:52 +0900953&ppmu_dmc0 {
954 status = "okay";
955
956 events {
957 ppmu_dmc0_3: ppmu-event3-dmc0 {
958 event-name = "ppmu-event3-dmc0";
959 };
960 };
961};
962
963&ppmu_dmc1 {
964 status = "okay";
965
966 events {
967 ppmu_dmc1_3: ppmu-event3-dmc1 {
968 event-name = "ppmu-event3-dmc1";
969 };
970 };
971};
972
973&ppmu_leftbus {
974 status = "okay";
975
976 events {
977 ppmu_leftbus_3: ppmu-event3-leftbus {
978 event-name = "ppmu-event3-leftbus";
979 };
980 };
981};
982
983&ppmu_rightbus {
984 status = "okay";
985
986 events {
987 ppmu_rightbus_3: ppmu-event3-rightbus {
988 event-name = "ppmu-event3-rightbus";
989 };
990 };
991};
992
Tomasz Figa09918a92014-09-24 01:20:03 +0900993&pinctrl_0 {
994 pinctrl-names = "default";
995 pinctrl-0 = <&sleep0>;
996
997 sleep0: sleep-states {
998 PIN_SLP(gpa0-0, INPUT, NONE);
999 PIN_SLP(gpa0-1, OUT0, NONE);
1000 PIN_SLP(gpa0-2, INPUT, NONE);
1001 PIN_SLP(gpa0-3, INPUT, UP);
1002 PIN_SLP(gpa0-4, INPUT, NONE);
1003 PIN_SLP(gpa0-5, INPUT, DOWN);
1004 PIN_SLP(gpa0-6, INPUT, DOWN);
1005 PIN_SLP(gpa0-7, INPUT, UP);
1006
1007 PIN_SLP(gpa1-0, INPUT, DOWN);
1008 PIN_SLP(gpa1-1, INPUT, DOWN);
1009 PIN_SLP(gpa1-2, INPUT, DOWN);
1010 PIN_SLP(gpa1-3, INPUT, DOWN);
1011 PIN_SLP(gpa1-4, INPUT, DOWN);
1012 PIN_SLP(gpa1-5, INPUT, DOWN);
1013
1014 PIN_SLP(gpb-0, INPUT, NONE);
1015 PIN_SLP(gpb-1, INPUT, NONE);
1016 PIN_SLP(gpb-2, INPUT, NONE);
1017 PIN_SLP(gpb-3, INPUT, NONE);
1018 PIN_SLP(gpb-4, INPUT, DOWN);
1019 PIN_SLP(gpb-5, INPUT, UP);
1020 PIN_SLP(gpb-6, INPUT, DOWN);
1021 PIN_SLP(gpb-7, INPUT, DOWN);
1022
1023 PIN_SLP(gpc0-0, INPUT, DOWN);
1024 PIN_SLP(gpc0-1, INPUT, DOWN);
1025 PIN_SLP(gpc0-2, INPUT, DOWN);
1026 PIN_SLP(gpc0-3, INPUT, DOWN);
1027 PIN_SLP(gpc0-4, INPUT, DOWN);
1028
1029 PIN_SLP(gpc1-0, INPUT, NONE);
1030 PIN_SLP(gpc1-1, PREV, NONE);
1031 PIN_SLP(gpc1-2, INPUT, NONE);
1032 PIN_SLP(gpc1-3, INPUT, NONE);
1033 PIN_SLP(gpc1-4, INPUT, NONE);
1034
1035 PIN_SLP(gpd0-0, INPUT, DOWN);
1036 PIN_SLP(gpd0-1, INPUT, DOWN);
1037 PIN_SLP(gpd0-2, INPUT, NONE);
1038 PIN_SLP(gpd0-3, INPUT, NONE);
1039
1040 PIN_SLP(gpd1-0, INPUT, DOWN);
1041 PIN_SLP(gpd1-1, INPUT, DOWN);
1042 PIN_SLP(gpd1-2, INPUT, NONE);
1043 PIN_SLP(gpd1-3, INPUT, NONE);
1044
1045 PIN_SLP(gpf0-0, INPUT, NONE);
1046 PIN_SLP(gpf0-1, INPUT, NONE);
1047 PIN_SLP(gpf0-2, INPUT, DOWN);
1048 PIN_SLP(gpf0-3, INPUT, DOWN);
1049 PIN_SLP(gpf0-4, INPUT, NONE);
1050 PIN_SLP(gpf0-5, INPUT, DOWN);
1051 PIN_SLP(gpf0-6, INPUT, NONE);
1052 PIN_SLP(gpf0-7, INPUT, DOWN);
1053
1054 PIN_SLP(gpf1-0, INPUT, DOWN);
1055 PIN_SLP(gpf1-1, INPUT, DOWN);
1056 PIN_SLP(gpf1-2, INPUT, DOWN);
1057 PIN_SLP(gpf1-3, INPUT, DOWN);
1058 PIN_SLP(gpf1-4, INPUT, NONE);
1059 PIN_SLP(gpf1-5, INPUT, NONE);
1060 PIN_SLP(gpf1-6, INPUT, DOWN);
1061 PIN_SLP(gpf1-7, PREV, NONE);
1062
1063 PIN_SLP(gpf2-0, PREV, NONE);
1064 PIN_SLP(gpf2-1, INPUT, DOWN);
1065 PIN_SLP(gpf2-2, INPUT, DOWN);
1066 PIN_SLP(gpf2-3, INPUT, DOWN);
1067 PIN_SLP(gpf2-4, INPUT, DOWN);
1068 PIN_SLP(gpf2-5, INPUT, DOWN);
1069 PIN_SLP(gpf2-6, INPUT, NONE);
1070 PIN_SLP(gpf2-7, INPUT, NONE);
1071
1072 PIN_SLP(gpf3-0, INPUT, NONE);
1073 PIN_SLP(gpf3-1, PREV, NONE);
1074 PIN_SLP(gpf3-2, PREV, NONE);
1075 PIN_SLP(gpf3-3, PREV, NONE);
1076 PIN_SLP(gpf3-4, OUT1, NONE);
1077 PIN_SLP(gpf3-5, INPUT, DOWN);
1078
1079 PIN_SLP(gpj0-0, PREV, NONE);
1080 PIN_SLP(gpj0-1, PREV, NONE);
1081 PIN_SLP(gpj0-2, PREV, NONE);
1082 PIN_SLP(gpj0-3, INPUT, DOWN);
1083 PIN_SLP(gpj0-4, PREV, NONE);
1084 PIN_SLP(gpj0-5, PREV, NONE);
1085 PIN_SLP(gpj0-6, INPUT, DOWN);
1086 PIN_SLP(gpj0-7, INPUT, DOWN);
1087
1088 PIN_SLP(gpj1-0, INPUT, DOWN);
1089 PIN_SLP(gpj1-1, PREV, NONE);
1090 PIN_SLP(gpj1-2, PREV, NONE);
1091 PIN_SLP(gpj1-3, INPUT, DOWN);
1092 PIN_SLP(gpj1-4, INPUT, DOWN);
1093 };
1094};
1095
1096&pinctrl_1 {
1097 pinctrl-names = "default";
1098 pinctrl-0 = <&sleep1>;
1099
1100 sleep1: sleep-states {
1101 PIN_SLP(gpk0-0, PREV, NONE);
1102 PIN_SLP(gpk0-1, PREV, NONE);
1103 PIN_SLP(gpk0-2, OUT0, NONE);
1104 PIN_SLP(gpk0-3, PREV, NONE);
1105 PIN_SLP(gpk0-4, PREV, NONE);
1106 PIN_SLP(gpk0-5, PREV, NONE);
1107 PIN_SLP(gpk0-6, PREV, NONE);
1108
1109 PIN_SLP(gpk1-0, INPUT, DOWN);
1110 PIN_SLP(gpk1-1, INPUT, DOWN);
1111 PIN_SLP(gpk1-2, INPUT, DOWN);
1112 PIN_SLP(gpk1-3, PREV, NONE);
1113 PIN_SLP(gpk1-4, PREV, NONE);
1114 PIN_SLP(gpk1-5, PREV, NONE);
1115 PIN_SLP(gpk1-6, PREV, NONE);
1116
1117 PIN_SLP(gpk2-0, INPUT, DOWN);
1118 PIN_SLP(gpk2-1, INPUT, DOWN);
1119 PIN_SLP(gpk2-2, INPUT, DOWN);
1120 PIN_SLP(gpk2-3, INPUT, DOWN);
1121 PIN_SLP(gpk2-4, INPUT, DOWN);
1122 PIN_SLP(gpk2-5, INPUT, DOWN);
1123 PIN_SLP(gpk2-6, INPUT, DOWN);
1124
1125 PIN_SLP(gpk3-0, OUT0, NONE);
1126 PIN_SLP(gpk3-1, INPUT, NONE);
1127 PIN_SLP(gpk3-2, INPUT, DOWN);
1128 PIN_SLP(gpk3-3, INPUT, NONE);
1129 PIN_SLP(gpk3-4, INPUT, NONE);
1130 PIN_SLP(gpk3-5, INPUT, NONE);
1131 PIN_SLP(gpk3-6, INPUT, NONE);
1132
1133 PIN_SLP(gpl0-0, INPUT, DOWN);
1134 PIN_SLP(gpl0-1, INPUT, DOWN);
1135 PIN_SLP(gpl0-2, INPUT, DOWN);
1136 PIN_SLP(gpl0-3, INPUT, DOWN);
1137 PIN_SLP(gpl0-4, PREV, NONE);
1138 PIN_SLP(gpl0-6, PREV, NONE);
1139
1140 PIN_SLP(gpl1-0, INPUT, DOWN);
1141 PIN_SLP(gpl1-1, INPUT, DOWN);
1142 PIN_SLP(gpl2-0, INPUT, DOWN);
1143 PIN_SLP(gpl2-1, INPUT, DOWN);
1144 PIN_SLP(gpl2-2, INPUT, DOWN);
1145 PIN_SLP(gpl2-3, INPUT, DOWN);
1146 PIN_SLP(gpl2-4, INPUT, DOWN);
1147 PIN_SLP(gpl2-5, INPUT, DOWN);
1148 PIN_SLP(gpl2-6, PREV, NONE);
1149 PIN_SLP(gpl2-7, INPUT, DOWN);
1150
1151 PIN_SLP(gpm0-0, INPUT, DOWN);
1152 PIN_SLP(gpm0-1, INPUT, DOWN);
1153 PIN_SLP(gpm0-2, INPUT, DOWN);
1154 PIN_SLP(gpm0-3, INPUT, DOWN);
1155 PIN_SLP(gpm0-4, INPUT, DOWN);
1156 PIN_SLP(gpm0-5, INPUT, DOWN);
1157 PIN_SLP(gpm0-6, INPUT, DOWN);
1158 PIN_SLP(gpm0-7, INPUT, DOWN);
1159
1160 PIN_SLP(gpm1-0, INPUT, DOWN);
1161 PIN_SLP(gpm1-1, INPUT, DOWN);
1162 PIN_SLP(gpm1-2, INPUT, NONE);
1163 PIN_SLP(gpm1-3, INPUT, NONE);
1164 PIN_SLP(gpm1-4, INPUT, NONE);
1165 PIN_SLP(gpm1-5, INPUT, NONE);
1166 PIN_SLP(gpm1-6, INPUT, DOWN);
1167
1168 PIN_SLP(gpm2-0, INPUT, NONE);
1169 PIN_SLP(gpm2-1, INPUT, NONE);
1170 PIN_SLP(gpm2-2, INPUT, DOWN);
1171 PIN_SLP(gpm2-3, INPUT, DOWN);
1172 PIN_SLP(gpm2-4, INPUT, DOWN);
1173
1174 PIN_SLP(gpm3-0, PREV, NONE);
1175 PIN_SLP(gpm3-1, PREV, NONE);
1176 PIN_SLP(gpm3-2, PREV, NONE);
1177 PIN_SLP(gpm3-3, OUT1, NONE);
1178 PIN_SLP(gpm3-4, INPUT, DOWN);
1179 PIN_SLP(gpm3-5, INPUT, DOWN);
1180 PIN_SLP(gpm3-6, INPUT, DOWN);
1181 PIN_SLP(gpm3-7, INPUT, DOWN);
1182
1183 PIN_SLP(gpm4-0, INPUT, DOWN);
1184 PIN_SLP(gpm4-1, INPUT, DOWN);
1185 PIN_SLP(gpm4-2, INPUT, DOWN);
1186 PIN_SLP(gpm4-3, INPUT, DOWN);
1187 PIN_SLP(gpm4-4, INPUT, DOWN);
1188 PIN_SLP(gpm4-5, INPUT, DOWN);
1189 PIN_SLP(gpm4-6, INPUT, DOWN);
1190 PIN_SLP(gpm4-7, INPUT, DOWN);
1191
1192 PIN_SLP(gpy0-0, INPUT, DOWN);
1193 PIN_SLP(gpy0-1, INPUT, DOWN);
1194 PIN_SLP(gpy0-2, INPUT, DOWN);
1195 PIN_SLP(gpy0-3, INPUT, DOWN);
1196 PIN_SLP(gpy0-4, INPUT, DOWN);
1197 PIN_SLP(gpy0-5, INPUT, DOWN);
1198
1199 PIN_SLP(gpy1-0, INPUT, DOWN);
1200 PIN_SLP(gpy1-1, INPUT, DOWN);
1201 PIN_SLP(gpy1-2, INPUT, DOWN);
1202 PIN_SLP(gpy1-3, INPUT, DOWN);
1203
1204 PIN_SLP(gpy2-0, PREV, NONE);
1205 PIN_SLP(gpy2-1, INPUT, DOWN);
1206 PIN_SLP(gpy2-2, INPUT, NONE);
1207 PIN_SLP(gpy2-3, INPUT, NONE);
1208 PIN_SLP(gpy2-4, INPUT, NONE);
1209 PIN_SLP(gpy2-5, INPUT, NONE);
1210
1211 PIN_SLP(gpy3-0, INPUT, DOWN);
1212 PIN_SLP(gpy3-1, INPUT, DOWN);
1213 PIN_SLP(gpy3-2, INPUT, DOWN);
1214 PIN_SLP(gpy3-3, INPUT, DOWN);
1215 PIN_SLP(gpy3-4, INPUT, DOWN);
1216 PIN_SLP(gpy3-5, INPUT, DOWN);
1217 PIN_SLP(gpy3-6, INPUT, DOWN);
1218 PIN_SLP(gpy3-7, INPUT, DOWN);
1219
1220 PIN_SLP(gpy4-0, INPUT, DOWN);
1221 PIN_SLP(gpy4-1, INPUT, DOWN);
1222 PIN_SLP(gpy4-2, INPUT, DOWN);
1223 PIN_SLP(gpy4-3, INPUT, DOWN);
1224 PIN_SLP(gpy4-4, INPUT, DOWN);
1225 PIN_SLP(gpy4-5, INPUT, DOWN);
1226 PIN_SLP(gpy4-6, INPUT, DOWN);
1227 PIN_SLP(gpy4-7, INPUT, DOWN);
1228
1229 PIN_SLP(gpy5-0, INPUT, DOWN);
1230 PIN_SLP(gpy5-1, INPUT, DOWN);
1231 PIN_SLP(gpy5-2, INPUT, DOWN);
1232 PIN_SLP(gpy5-3, INPUT, DOWN);
1233 PIN_SLP(gpy5-4, INPUT, DOWN);
1234 PIN_SLP(gpy5-5, INPUT, DOWN);
1235 PIN_SLP(gpy5-6, INPUT, DOWN);
1236 PIN_SLP(gpy5-7, INPUT, DOWN);
1237
1238 PIN_SLP(gpy6-0, INPUT, DOWN);
1239 PIN_SLP(gpy6-1, INPUT, DOWN);
1240 PIN_SLP(gpy6-2, INPUT, DOWN);
1241 PIN_SLP(gpy6-3, INPUT, DOWN);
1242 PIN_SLP(gpy6-4, INPUT, DOWN);
1243 PIN_SLP(gpy6-5, INPUT, DOWN);
1244 PIN_SLP(gpy6-6, INPUT, DOWN);
1245 PIN_SLP(gpy6-7, INPUT, DOWN);
1246 };
1247};
1248
1249&pinctrl_2 {
1250 pinctrl-names = "default";
1251 pinctrl-0 = <&sleep2>;
1252
1253 sleep2: sleep-states {
1254 PIN_SLP(gpz-0, INPUT, DOWN);
1255 PIN_SLP(gpz-1, INPUT, DOWN);
1256 PIN_SLP(gpz-2, INPUT, DOWN);
1257 PIN_SLP(gpz-3, INPUT, DOWN);
1258 PIN_SLP(gpz-4, INPUT, DOWN);
1259 PIN_SLP(gpz-5, INPUT, DOWN);
1260 PIN_SLP(gpz-6, INPUT, DOWN);
1261 };
1262};
1263
1264&pinctrl_3 {
1265 pinctrl-names = "default";
1266 pinctrl-0 = <&sleep3>;
1267
1268 sleep3: sleep-states {
1269 PIN_SLP(gpv0-0, INPUT, DOWN);
1270 PIN_SLP(gpv0-1, INPUT, DOWN);
1271 PIN_SLP(gpv0-2, INPUT, DOWN);
1272 PIN_SLP(gpv0-3, INPUT, DOWN);
1273 PIN_SLP(gpv0-4, INPUT, DOWN);
1274 PIN_SLP(gpv0-5, INPUT, DOWN);
1275 PIN_SLP(gpv0-6, INPUT, DOWN);
1276 PIN_SLP(gpv0-7, INPUT, DOWN);
1277
1278 PIN_SLP(gpv1-0, INPUT, DOWN);
1279 PIN_SLP(gpv1-1, INPUT, DOWN);
1280 PIN_SLP(gpv1-2, INPUT, DOWN);
1281 PIN_SLP(gpv1-3, INPUT, DOWN);
1282 PIN_SLP(gpv1-4, INPUT, DOWN);
1283 PIN_SLP(gpv1-5, INPUT, DOWN);
1284 PIN_SLP(gpv1-6, INPUT, DOWN);
1285 PIN_SLP(gpv1-7, INPUT, DOWN);
1286
1287 PIN_SLP(gpv2-0, INPUT, DOWN);
1288 PIN_SLP(gpv2-1, INPUT, DOWN);
1289 PIN_SLP(gpv2-2, INPUT, DOWN);
1290 PIN_SLP(gpv2-3, INPUT, DOWN);
1291 PIN_SLP(gpv2-4, INPUT, DOWN);
1292 PIN_SLP(gpv2-5, INPUT, DOWN);
1293 PIN_SLP(gpv2-6, INPUT, DOWN);
1294 PIN_SLP(gpv2-7, INPUT, DOWN);
1295
1296 PIN_SLP(gpv3-0, INPUT, DOWN);
1297 PIN_SLP(gpv3-1, INPUT, DOWN);
1298 PIN_SLP(gpv3-2, INPUT, DOWN);
1299 PIN_SLP(gpv3-3, INPUT, DOWN);
1300 PIN_SLP(gpv3-4, INPUT, DOWN);
1301 PIN_SLP(gpv3-5, INPUT, DOWN);
1302 PIN_SLP(gpv3-6, INPUT, DOWN);
1303 PIN_SLP(gpv3-7, INPUT, DOWN);
1304
1305 PIN_SLP(gpv4-0, INPUT, DOWN);
1306 };
1307};
Krzysztof Kozlowskice9940a2015-05-02 14:40:08 +09001308
1309&rtc {
1310 status = "okay";
1311 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
1312 clock-names = "rtc", "rtc_src";
1313};