Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
| 24 | |
| 25 | #include <core/object.h> |
| 26 | #include <core/device.h> |
| 27 | #include <core/client.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 28 | #include <core/option.h> |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame^] | 29 | #include <nvif/unpack.h> |
| 30 | #include <nvif/class.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 31 | #include <core/class.h> |
| 32 | |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame^] | 33 | #include <subdev/fb.h> |
| 34 | #include <subdev/instmem.h> |
| 35 | |
Ben Skeggs | 9838366 | 2013-10-17 09:56:02 +1000 | [diff] [blame] | 36 | #include "priv.h" |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 37 | #include "acpi.h" |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 38 | |
| 39 | static DEFINE_MUTEX(nv_devices_mutex); |
| 40 | static LIST_HEAD(nv_devices); |
| 41 | |
| 42 | struct nouveau_device * |
| 43 | nouveau_device_find(u64 name) |
| 44 | { |
| 45 | struct nouveau_device *device, *match = NULL; |
| 46 | mutex_lock(&nv_devices_mutex); |
| 47 | list_for_each_entry(device, &nv_devices, head) { |
| 48 | if (device->handle == name) { |
| 49 | match = device; |
| 50 | break; |
| 51 | } |
| 52 | } |
| 53 | mutex_unlock(&nv_devices_mutex); |
| 54 | return match; |
| 55 | } |
| 56 | |
| 57 | /****************************************************************************** |
| 58 | * nouveau_devobj (0x0080): class implementation |
| 59 | *****************************************************************************/ |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame^] | 60 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 61 | struct nouveau_devobj { |
| 62 | struct nouveau_parent base; |
| 63 | struct nouveau_object *subdev[NVDEV_SUBDEV_NR]; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 64 | }; |
| 65 | |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame^] | 66 | static int |
| 67 | nouveau_devobj_info(struct nouveau_object *object, void *data, u32 size) |
| 68 | { |
| 69 | struct nouveau_device *device = nv_device(object); |
| 70 | struct nouveau_fb *pfb = nouveau_fb(device); |
| 71 | struct nouveau_instmem *imem = nouveau_instmem(device); |
| 72 | union { |
| 73 | struct nv_device_info_v0 v0; |
| 74 | } *args = data; |
| 75 | int ret; |
| 76 | |
| 77 | nv_ioctl(object, "device info size %d\n", size); |
| 78 | if (nvif_unpack(args->v0, 0, 0, false)) { |
| 79 | nv_ioctl(object, "device info vers %d\n", args->v0.version); |
| 80 | } else |
| 81 | return ret; |
| 82 | |
| 83 | switch (device->chipset) { |
| 84 | case 0x01a: |
| 85 | case 0x01f: |
| 86 | case 0x04c: |
| 87 | case 0x04e: |
| 88 | case 0x063: |
| 89 | case 0x067: |
| 90 | case 0x068: |
| 91 | case 0x0aa: |
| 92 | case 0x0ac: |
| 93 | case 0x0af: |
| 94 | args->v0.platform = NV_DEVICE_INFO_V0_IGP; |
| 95 | break; |
| 96 | default: |
| 97 | if (device->pdev) { |
| 98 | if (pci_find_capability(device->pdev, PCI_CAP_ID_AGP)) |
| 99 | args->v0.platform = NV_DEVICE_INFO_V0_AGP; |
| 100 | else |
| 101 | if (pci_is_pcie(device->pdev)) |
| 102 | args->v0.platform = NV_DEVICE_INFO_V0_PCIE; |
| 103 | else |
| 104 | args->v0.platform = NV_DEVICE_INFO_V0_PCI; |
| 105 | } else { |
| 106 | args->v0.platform = NV_DEVICE_INFO_V0_SOC; |
| 107 | } |
| 108 | break; |
| 109 | } |
| 110 | |
| 111 | switch (device->card_type) { |
| 112 | case NV_04: args->v0.family = NV_DEVICE_INFO_V0_TNT; break; |
| 113 | case NV_10: |
| 114 | case NV_11: args->v0.family = NV_DEVICE_INFO_V0_CELSIUS; break; |
| 115 | case NV_20: args->v0.family = NV_DEVICE_INFO_V0_KELVIN; break; |
| 116 | case NV_30: args->v0.family = NV_DEVICE_INFO_V0_RANKINE; break; |
| 117 | case NV_40: args->v0.family = NV_DEVICE_INFO_V0_CURIE; break; |
| 118 | case NV_50: args->v0.family = NV_DEVICE_INFO_V0_TESLA; break; |
| 119 | case NV_C0: |
| 120 | case NV_D0: args->v0.family = NV_DEVICE_INFO_V0_FERMI; break; |
| 121 | case NV_E0: args->v0.family = NV_DEVICE_INFO_V0_KEPLER; break; |
| 122 | case GM100: args->v0.family = NV_DEVICE_INFO_V0_MAXWELL; break; |
| 123 | default: |
| 124 | args->v0.family = 0; |
| 125 | break; |
| 126 | } |
| 127 | |
| 128 | args->v0.chipset = device->chipset; |
| 129 | args->v0.revision = device->chipset >= 0x10 ? nv_rd32(device, 0) : 0x00; |
| 130 | if (pfb) args->v0.ram_size = args->v0.ram_user = pfb->ram->size; |
| 131 | else args->v0.ram_size = args->v0.ram_user = 0; |
| 132 | if (imem) args->v0.ram_user = args->v0.ram_user - imem->reserved; |
| 133 | return 0; |
| 134 | } |
| 135 | |
| 136 | static int |
| 137 | nouveau_devobj_mthd(struct nouveau_object *object, u32 mthd, |
| 138 | void *data, u32 size) |
| 139 | { |
| 140 | switch (mthd) { |
| 141 | case NV_DEVICE_V0_INFO: |
| 142 | return nouveau_devobj_info(object, data, size); |
| 143 | default: |
| 144 | break; |
| 145 | } |
| 146 | return -EINVAL; |
| 147 | } |
| 148 | |
| 149 | static u8 |
| 150 | nouveau_devobj_rd08(struct nouveau_object *object, u64 addr) |
| 151 | { |
| 152 | return nv_rd08(object->engine, addr); |
| 153 | } |
| 154 | |
| 155 | static u16 |
| 156 | nouveau_devobj_rd16(struct nouveau_object *object, u64 addr) |
| 157 | { |
| 158 | return nv_rd16(object->engine, addr); |
| 159 | } |
| 160 | |
| 161 | static u32 |
| 162 | nouveau_devobj_rd32(struct nouveau_object *object, u64 addr) |
| 163 | { |
| 164 | return nv_rd32(object->engine, addr); |
| 165 | } |
| 166 | |
| 167 | static void |
| 168 | nouveau_devobj_wr08(struct nouveau_object *object, u64 addr, u8 data) |
| 169 | { |
| 170 | nv_wr08(object->engine, addr, data); |
| 171 | } |
| 172 | |
| 173 | static void |
| 174 | nouveau_devobj_wr16(struct nouveau_object *object, u64 addr, u16 data) |
| 175 | { |
| 176 | nv_wr16(object->engine, addr, data); |
| 177 | } |
| 178 | |
| 179 | static void |
| 180 | nouveau_devobj_wr32(struct nouveau_object *object, u64 addr, u32 data) |
| 181 | { |
| 182 | nv_wr32(object->engine, addr, data); |
| 183 | } |
| 184 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 185 | static const u64 disable_map[] = { |
| 186 | [NVDEV_SUBDEV_VBIOS] = NV_DEVICE_DISABLE_VBIOS, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 187 | [NVDEV_SUBDEV_DEVINIT] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 188 | [NVDEV_SUBDEV_GPIO] = NV_DEVICE_DISABLE_CORE, |
| 189 | [NVDEV_SUBDEV_I2C] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 190 | [NVDEV_SUBDEV_CLOCK] = NV_DEVICE_DISABLE_CORE, |
| 191 | [NVDEV_SUBDEV_MXM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 192 | [NVDEV_SUBDEV_MC] = NV_DEVICE_DISABLE_CORE, |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 193 | [NVDEV_SUBDEV_BUS] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 194 | [NVDEV_SUBDEV_TIMER] = NV_DEVICE_DISABLE_CORE, |
| 195 | [NVDEV_SUBDEV_FB] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 196 | [NVDEV_SUBDEV_LTCG] = NV_DEVICE_DISABLE_CORE, |
| 197 | [NVDEV_SUBDEV_IBUS] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 198 | [NVDEV_SUBDEV_INSTMEM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 199 | [NVDEV_SUBDEV_VM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 200 | [NVDEV_SUBDEV_BAR] = NV_DEVICE_DISABLE_CORE, |
| 201 | [NVDEV_SUBDEV_VOLT] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 202 | [NVDEV_SUBDEV_THERM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | ff4b42c | 2013-10-15 09:38:12 +1000 | [diff] [blame] | 203 | [NVDEV_SUBDEV_PWR] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 204 | [NVDEV_ENGINE_DMAOBJ] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | aa4d7a4 | 2013-02-13 15:29:11 +1000 | [diff] [blame] | 205 | [NVDEV_ENGINE_PERFMON] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 206 | [NVDEV_ENGINE_FIFO] = NV_DEVICE_DISABLE_FIFO, |
| 207 | [NVDEV_ENGINE_SW] = NV_DEVICE_DISABLE_FIFO, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 208 | [NVDEV_ENGINE_GR] = NV_DEVICE_DISABLE_GRAPH, |
| 209 | [NVDEV_ENGINE_MPEG] = NV_DEVICE_DISABLE_MPEG, |
| 210 | [NVDEV_ENGINE_ME] = NV_DEVICE_DISABLE_ME, |
| 211 | [NVDEV_ENGINE_VP] = NV_DEVICE_DISABLE_VP, |
| 212 | [NVDEV_ENGINE_CRYPT] = NV_DEVICE_DISABLE_CRYPT, |
| 213 | [NVDEV_ENGINE_BSP] = NV_DEVICE_DISABLE_BSP, |
| 214 | [NVDEV_ENGINE_PPP] = NV_DEVICE_DISABLE_PPP, |
| 215 | [NVDEV_ENGINE_COPY0] = NV_DEVICE_DISABLE_COPY0, |
| 216 | [NVDEV_ENGINE_COPY1] = NV_DEVICE_DISABLE_COPY1, |
Ben Skeggs | c42a7ae | 2013-08-21 13:26:42 +1000 | [diff] [blame] | 217 | [NVDEV_ENGINE_VIC] = NV_DEVICE_DISABLE_VIC, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 218 | [NVDEV_ENGINE_VENC] = NV_DEVICE_DISABLE_VENC, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 219 | [NVDEV_ENGINE_DISP] = NV_DEVICE_DISABLE_DISP, |
| 220 | [NVDEV_SUBDEV_NR] = 0, |
| 221 | }; |
| 222 | |
| 223 | static int |
| 224 | nouveau_devobj_ctor(struct nouveau_object *parent, |
| 225 | struct nouveau_object *engine, |
| 226 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 227 | struct nouveau_object **pobject) |
| 228 | { |
| 229 | struct nouveau_client *client = nv_client(parent); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 230 | struct nouveau_device *device; |
| 231 | struct nouveau_devobj *devobj; |
| 232 | struct nv_device_class *args = data; |
Marcin Slusarz | 950fbfa | 2012-12-29 16:24:37 +0100 | [diff] [blame] | 233 | u32 boot0, strap; |
| 234 | u64 disable, mmio_base, mmio_size; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 235 | void __iomem *map; |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 236 | int ret, i, c; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 237 | |
| 238 | if (size < sizeof(struct nv_device_class)) |
| 239 | return -EINVAL; |
| 240 | |
| 241 | /* find the device subdev that matches what the client requested */ |
| 242 | device = nv_device(client->device); |
| 243 | if (args->device != ~0) { |
| 244 | device = nouveau_device_find(args->device); |
| 245 | if (!device) |
| 246 | return -ENODEV; |
| 247 | } |
| 248 | |
Ben Skeggs | 9838366 | 2013-10-17 09:56:02 +1000 | [diff] [blame] | 249 | ret = nouveau_parent_create(parent, nv_object(device), oclass, 0, |
| 250 | nouveau_control_oclass, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 251 | (1ULL << NVDEV_ENGINE_DMAOBJ) | |
| 252 | (1ULL << NVDEV_ENGINE_FIFO) | |
Ben Skeggs | aa4d7a4 | 2013-02-13 15:29:11 +1000 | [diff] [blame] | 253 | (1ULL << NVDEV_ENGINE_DISP) | |
| 254 | (1ULL << NVDEV_ENGINE_PERFMON), &devobj); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 255 | *pobject = nv_object(devobj); |
| 256 | if (ret) |
| 257 | return ret; |
| 258 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 259 | mmio_base = nv_device_resource_start(device, 0); |
| 260 | mmio_size = nv_device_resource_len(device, 0); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 261 | |
| 262 | /* translate api disable mask into internal mapping */ |
| 263 | disable = args->debug0; |
| 264 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
| 265 | if (args->disable & disable_map[i]) |
| 266 | disable |= (1ULL << i); |
| 267 | } |
| 268 | |
| 269 | /* identify the chipset, and determine classes of subdev/engines */ |
| 270 | if (!(args->disable & NV_DEVICE_DISABLE_IDENTIFY) && |
| 271 | !device->card_type) { |
| 272 | map = ioremap(mmio_base, 0x102000); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 273 | if (map == NULL) |
| 274 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 275 | |
| 276 | /* switch mmio to cpu's native endianness */ |
| 277 | #ifndef __BIG_ENDIAN |
| 278 | if (ioread32_native(map + 0x000004) != 0x00000000) |
| 279 | #else |
| 280 | if (ioread32_native(map + 0x000004) == 0x00000000) |
| 281 | #endif |
| 282 | iowrite32_native(0x01000001, map + 0x000004); |
| 283 | |
| 284 | /* read boot0 and strapping information */ |
| 285 | boot0 = ioread32_native(map + 0x000000); |
| 286 | strap = ioread32_native(map + 0x101000); |
| 287 | iounmap(map); |
| 288 | |
| 289 | /* determine chipset and derive architecture from it */ |
Ben Skeggs | dd5b84a | 2013-09-28 07:31:07 +1000 | [diff] [blame] | 290 | if ((boot0 & 0x1f000000) > 0) { |
| 291 | device->chipset = (boot0 & 0x1ff00000) >> 20; |
| 292 | switch (device->chipset & 0x1f0) { |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 293 | case 0x010: { |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 294 | if (0x461 & (1 << (device->chipset & 0xf))) |
| 295 | device->card_type = NV_10; |
| 296 | else |
| 297 | device->card_type = NV_11; |
| 298 | break; |
| 299 | } |
Ben Skeggs | aabf19c | 2013-11-05 13:14:25 +1000 | [diff] [blame] | 300 | case 0x020: device->card_type = NV_20; break; |
| 301 | case 0x030: device->card_type = NV_30; break; |
| 302 | case 0x040: |
| 303 | case 0x060: device->card_type = NV_40; break; |
| 304 | case 0x050: |
| 305 | case 0x080: |
| 306 | case 0x090: |
| 307 | case 0x0a0: device->card_type = NV_50; break; |
| 308 | case 0x0c0: device->card_type = NV_C0; break; |
| 309 | case 0x0d0: device->card_type = NV_D0; break; |
| 310 | case 0x0e0: |
| 311 | case 0x0f0: |
| 312 | case 0x100: device->card_type = NV_E0; break; |
Ben Skeggs | 3f20464 | 2014-02-24 11:28:37 +1000 | [diff] [blame] | 313 | case 0x110: device->card_type = GM100; break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 314 | default: |
| 315 | break; |
| 316 | } |
| 317 | } else |
| 318 | if ((boot0 & 0xff00fff0) == 0x20004000) { |
| 319 | if (boot0 & 0x00f00000) |
| 320 | device->chipset = 0x05; |
| 321 | else |
| 322 | device->chipset = 0x04; |
| 323 | device->card_type = NV_04; |
| 324 | } |
| 325 | |
| 326 | switch (device->card_type) { |
| 327 | case NV_04: ret = nv04_identify(device); break; |
Ilia Mirkin | 4a0ff75 | 2013-09-05 04:45:02 -0400 | [diff] [blame] | 328 | case NV_10: |
| 329 | case NV_11: ret = nv10_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 330 | case NV_20: ret = nv20_identify(device); break; |
| 331 | case NV_30: ret = nv30_identify(device); break; |
| 332 | case NV_40: ret = nv40_identify(device); break; |
| 333 | case NV_50: ret = nv50_identify(device); break; |
| 334 | case NV_C0: |
| 335 | case NV_D0: ret = nvc0_identify(device); break; |
| 336 | case NV_E0: ret = nve0_identify(device); break; |
Ben Skeggs | 3f20464 | 2014-02-24 11:28:37 +1000 | [diff] [blame] | 337 | case GM100: ret = gm100_identify(device); break; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 338 | default: |
| 339 | ret = -EINVAL; |
| 340 | break; |
| 341 | } |
| 342 | |
| 343 | if (ret) { |
| 344 | nv_error(device, "unknown chipset, 0x%08x\n", boot0); |
| 345 | return ret; |
| 346 | } |
| 347 | |
| 348 | nv_info(device, "BOOT0 : 0x%08x\n", boot0); |
Ben Skeggs | 2094dd8 | 2012-07-27 08:28:20 +1000 | [diff] [blame] | 349 | nv_info(device, "Chipset: %s (NV%02X)\n", |
| 350 | device->cname, device->chipset); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 351 | nv_info(device, "Family : NV%02X\n", device->card_type); |
| 352 | |
| 353 | /* determine frequency of timing crystal */ |
Ilia Mirkin | 8aa816b | 2013-09-05 04:45:03 -0400 | [diff] [blame] | 354 | if ( device->card_type <= NV_10 || device->chipset < 0x17 || |
Viktor Novotný | 1f2285d4 | 2012-11-10 19:24:06 +0100 | [diff] [blame] | 355 | (device->chipset >= 0x20 && device->chipset < 0x25)) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 356 | strap &= 0x00000040; |
| 357 | else |
| 358 | strap &= 0x00400040; |
| 359 | |
| 360 | switch (strap) { |
| 361 | case 0x00000000: device->crystal = 13500; break; |
| 362 | case 0x00000040: device->crystal = 14318; break; |
| 363 | case 0x00400000: device->crystal = 27000; break; |
| 364 | case 0x00400040: device->crystal = 25000; break; |
| 365 | } |
| 366 | |
| 367 | nv_debug(device, "crystal freq: %dKHz\n", device->crystal); |
| 368 | } |
| 369 | |
| 370 | if (!(args->disable & NV_DEVICE_DISABLE_MMIO) && |
| 371 | !nv_subdev(device)->mmio) { |
| 372 | nv_subdev(device)->mmio = ioremap(mmio_base, mmio_size); |
| 373 | if (!nv_subdev(device)->mmio) { |
| 374 | nv_error(device, "unable to map device registers\n"); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 375 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 376 | } |
| 377 | } |
| 378 | |
| 379 | /* ensure requested subsystems are available for use */ |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 380 | for (i = 1, c = 1; i < NVDEV_SUBDEV_NR; i++) { |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 381 | if (!(oclass = device->oclass[i]) || (disable & (1ULL << i))) |
| 382 | continue; |
| 383 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 384 | if (device->subdev[i]) { |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 385 | nouveau_object_ref(device->subdev[i], |
| 386 | &devobj->subdev[i]); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 387 | continue; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 388 | } |
| 389 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 390 | ret = nouveau_object_ctor(nv_object(device), NULL, |
| 391 | oclass, NULL, i, |
| 392 | &devobj->subdev[i]); |
| 393 | if (ret == -ENODEV) |
| 394 | continue; |
| 395 | if (ret) |
| 396 | return ret; |
| 397 | |
Ben Skeggs | 61b365a | 2013-11-27 09:46:56 +1000 | [diff] [blame] | 398 | device->subdev[i] = devobj->subdev[i]; |
| 399 | |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 400 | /* note: can't init *any* subdevs until devinit has been run |
| 401 | * due to not knowing exactly what the vbios init tables will |
| 402 | * mess with. devinit also can't be run until all of its |
| 403 | * dependencies have been created. |
| 404 | * |
| 405 | * this code delays init of any subdev until all of devinit's |
| 406 | * dependencies have been created, and then initialises each |
| 407 | * subdev in turn as they're created. |
| 408 | */ |
| 409 | while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) { |
| 410 | struct nouveau_object *subdev = devobj->subdev[c++]; |
| 411 | if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 412 | ret = nouveau_object_inc(subdev); |
| 413 | if (ret) |
| 414 | return ret; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 415 | atomic_dec(&nv_object(device)->usecount); |
| 416 | } else |
| 417 | if (subdev) { |
| 418 | nouveau_subdev_reset(subdev); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 419 | } |
| 420 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 421 | } |
| 422 | |
| 423 | return 0; |
| 424 | } |
| 425 | |
| 426 | static void |
| 427 | nouveau_devobj_dtor(struct nouveau_object *object) |
| 428 | { |
| 429 | struct nouveau_devobj *devobj = (void *)object; |
| 430 | int i; |
| 431 | |
| 432 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) |
| 433 | nouveau_object_ref(NULL, &devobj->subdev[i]); |
| 434 | |
| 435 | nouveau_parent_destroy(&devobj->base); |
| 436 | } |
| 437 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 438 | static struct nouveau_ofuncs |
| 439 | nouveau_devobj_ofuncs = { |
| 440 | .ctor = nouveau_devobj_ctor, |
| 441 | .dtor = nouveau_devobj_dtor, |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 442 | .init = _nouveau_parent_init, |
| 443 | .fini = _nouveau_parent_fini, |
Ben Skeggs | d01c309 | 2014-08-10 04:10:21 +1000 | [diff] [blame^] | 444 | .mthd = nouveau_devobj_mthd, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 445 | .rd08 = nouveau_devobj_rd08, |
| 446 | .rd16 = nouveau_devobj_rd16, |
| 447 | .rd32 = nouveau_devobj_rd32, |
| 448 | .wr08 = nouveau_devobj_wr08, |
| 449 | .wr16 = nouveau_devobj_wr16, |
| 450 | .wr32 = nouveau_devobj_wr32, |
| 451 | }; |
| 452 | |
| 453 | /****************************************************************************** |
| 454 | * nouveau_device: engine functions |
| 455 | *****************************************************************************/ |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 456 | |
Ben Skeggs | 9aecbad | 2013-04-25 17:56:03 +1000 | [diff] [blame] | 457 | static struct nouveau_oclass |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 458 | nouveau_device_sclass[] = { |
| 459 | { 0x0080, &nouveau_devobj_ofuncs }, |
| 460 | {} |
| 461 | }; |
| 462 | |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 463 | static int |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 464 | nouveau_device_event_ctor(void *data, u32 size, struct nvkm_notify *notify) |
| 465 | { |
| 466 | if (!WARN_ON(size != 0)) { |
| 467 | notify->size = 0; |
| 468 | notify->types = 1; |
| 469 | notify->index = 0; |
| 470 | return 0; |
| 471 | } |
| 472 | return -EINVAL; |
| 473 | } |
| 474 | |
| 475 | static const struct nvkm_event_func |
| 476 | nouveau_device_event_func = { |
| 477 | .ctor = nouveau_device_event_ctor, |
| 478 | }; |
| 479 | |
| 480 | static int |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 481 | nouveau_device_fini(struct nouveau_object *object, bool suspend) |
| 482 | { |
| 483 | struct nouveau_device *device = (void *)object; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 484 | struct nouveau_object *subdev; |
| 485 | int ret, i; |
| 486 | |
| 487 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) { |
| 488 | if ((subdev = device->subdev[i])) { |
| 489 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 490 | ret = nouveau_object_dec(subdev, suspend); |
| 491 | if (ret && suspend) |
| 492 | goto fail; |
| 493 | } |
| 494 | } |
| 495 | } |
| 496 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 497 | ret = nvkm_acpi_fini(device, suspend); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 498 | fail: |
| 499 | for (; ret && i < NVDEV_SUBDEV_NR; i++) { |
| 500 | if ((subdev = device->subdev[i])) { |
| 501 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 502 | ret = nouveau_object_inc(subdev); |
| 503 | if (ret) { |
| 504 | /* XXX */ |
| 505 | } |
| 506 | } |
| 507 | } |
| 508 | } |
| 509 | |
| 510 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 511 | } |
| 512 | |
| 513 | static int |
| 514 | nouveau_device_init(struct nouveau_object *object) |
| 515 | { |
| 516 | struct nouveau_device *device = (void *)object; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 517 | struct nouveau_object *subdev; |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 518 | int ret, i = 0; |
| 519 | |
| 520 | ret = nvkm_acpi_init(device); |
| 521 | if (ret) |
| 522 | goto fail; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 523 | |
| 524 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
| 525 | if ((subdev = device->subdev[i])) { |
| 526 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 527 | ret = nouveau_object_inc(subdev); |
| 528 | if (ret) |
| 529 | goto fail; |
| 530 | } else { |
| 531 | nouveau_subdev_reset(subdev); |
| 532 | } |
| 533 | } |
| 534 | } |
| 535 | |
| 536 | ret = 0; |
| 537 | fail: |
| 538 | for (--i; ret && i >= 0; i--) { |
| 539 | if ((subdev = device->subdev[i])) { |
| 540 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) |
| 541 | nouveau_object_dec(subdev, false); |
| 542 | } |
| 543 | } |
| 544 | |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 545 | if (ret) |
| 546 | nvkm_acpi_fini(device, false); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame] | 547 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 548 | } |
| 549 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 550 | static void |
| 551 | nouveau_device_dtor(struct nouveau_object *object) |
| 552 | { |
| 553 | struct nouveau_device *device = (void *)object; |
| 554 | |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 555 | nvkm_event_fini(&device->event); |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 556 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 557 | mutex_lock(&nv_devices_mutex); |
| 558 | list_del(&device->head); |
| 559 | mutex_unlock(&nv_devices_mutex); |
| 560 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 561 | if (nv_subdev(device)->mmio) |
| 562 | iounmap(nv_subdev(device)->mmio); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 563 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 564 | nouveau_engine_destroy(&device->base); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 565 | } |
| 566 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 567 | resource_size_t |
| 568 | nv_device_resource_start(struct nouveau_device *device, unsigned int bar) |
| 569 | { |
| 570 | if (nv_device_is_pci(device)) { |
| 571 | return pci_resource_start(device->pdev, bar); |
| 572 | } else { |
| 573 | struct resource *res; |
| 574 | res = platform_get_resource(device->platformdev, |
| 575 | IORESOURCE_MEM, bar); |
| 576 | if (!res) |
| 577 | return 0; |
| 578 | return res->start; |
| 579 | } |
| 580 | } |
| 581 | |
| 582 | resource_size_t |
| 583 | nv_device_resource_len(struct nouveau_device *device, unsigned int bar) |
| 584 | { |
| 585 | if (nv_device_is_pci(device)) { |
| 586 | return pci_resource_len(device->pdev, bar); |
| 587 | } else { |
| 588 | struct resource *res; |
| 589 | res = platform_get_resource(device->platformdev, |
| 590 | IORESOURCE_MEM, bar); |
| 591 | if (!res) |
| 592 | return 0; |
| 593 | return resource_size(res); |
| 594 | } |
| 595 | } |
| 596 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 597 | int |
| 598 | nv_device_get_irq(struct nouveau_device *device, bool stall) |
| 599 | { |
| 600 | if (nv_device_is_pci(device)) { |
| 601 | return device->pdev->irq; |
| 602 | } else { |
| 603 | return platform_get_irq_byname(device->platformdev, |
| 604 | stall ? "stall" : "nonstall"); |
| 605 | } |
| 606 | } |
| 607 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 608 | static struct nouveau_oclass |
| 609 | nouveau_device_oclass = { |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 610 | .handle = NV_ENGINE(DEVICE, 0x00), |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 611 | .ofuncs = &(struct nouveau_ofuncs) { |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 612 | .dtor = nouveau_device_dtor, |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 613 | .init = nouveau_device_init, |
| 614 | .fini = nouveau_device_fini, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 615 | }, |
| 616 | }; |
| 617 | |
| 618 | int |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 619 | nouveau_device_create_(void *dev, enum nv_bus_type type, u64 name, |
| 620 | const char *sname, const char *cfg, const char *dbg, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 621 | int length, void **pobject) |
| 622 | { |
| 623 | struct nouveau_device *device; |
| 624 | int ret = -EEXIST; |
| 625 | |
| 626 | mutex_lock(&nv_devices_mutex); |
| 627 | list_for_each_entry(device, &nv_devices, head) { |
| 628 | if (device->handle == name) |
| 629 | goto done; |
| 630 | } |
| 631 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 632 | ret = nouveau_engine_create_(NULL, NULL, &nouveau_device_oclass, true, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 633 | "DEVICE", "device", length, pobject); |
| 634 | device = *pobject; |
| 635 | if (ret) |
| 636 | goto done; |
| 637 | |
Alexandre Courbot | 420b946 | 2014-02-17 15:17:26 +0900 | [diff] [blame] | 638 | switch (type) { |
| 639 | case NOUVEAU_BUS_PCI: |
| 640 | device->pdev = dev; |
| 641 | break; |
| 642 | case NOUVEAU_BUS_PLATFORM: |
| 643 | device->platformdev = dev; |
| 644 | break; |
| 645 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 646 | device->handle = name; |
| 647 | device->cfgopt = cfg; |
| 648 | device->dbgopt = dbg; |
| 649 | device->name = sname; |
| 650 | |
| 651 | nv_subdev(device)->debug = nouveau_dbgopt(device->dbgopt, "DEVICE"); |
Ben Skeggs | 9aecbad | 2013-04-25 17:56:03 +1000 | [diff] [blame] | 652 | nv_engine(device)->sclass = nouveau_device_sclass; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 653 | list_add(&device->head, &nv_devices); |
Ben Skeggs | ed76a87 | 2014-06-13 12:42:21 +1000 | [diff] [blame] | 654 | |
Ben Skeggs | 79ca277 | 2014-08-10 04:10:20 +1000 | [diff] [blame] | 655 | ret = nvkm_event_init(&nouveau_device_event_func, 1, 1, |
| 656 | &device->event); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 657 | done: |
| 658 | mutex_unlock(&nv_devices_mutex); |
| 659 | return ret; |
| 660 | } |