Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2007 Dave Airlied |
| 3 | * All Rights Reserved. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 22 | * OTHER DEALINGS IN THE SOFTWARE. |
| 23 | */ |
| 24 | /* |
| 25 | * Authors: Dave Airlied <airlied@linux.ie> |
| 26 | * Ben Skeggs <darktama@iinet.net.au> |
| 27 | * Jeremy Kolb <jkolb@brandeis.edu> |
| 28 | */ |
| 29 | |
| 30 | #include "drmP.h" |
Jerome Glisse | b1e5f17 | 2011-11-02 23:59:28 -0400 | [diff] [blame] | 31 | #include "ttm/ttm_page_alloc.h" |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 32 | |
| 33 | #include "nouveau_drm.h" |
| 34 | #include "nouveau_drv.h" |
| 35 | #include "nouveau_dma.h" |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 36 | #include "nouveau_mm.h" |
| 37 | #include "nouveau_vm.h" |
Ben Skeggs | d375e7d5 | 2012-04-30 13:30:00 +1000 | [diff] [blame] | 38 | #include "nouveau_fence.h" |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 39 | #include "nouveau_ramht.h" |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 40 | |
Maarten Maathuis | a510604 | 2009-12-26 21:46:36 +0100 | [diff] [blame] | 41 | #include <linux/log2.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 42 | #include <linux/slab.h> |
Maarten Maathuis | a510604 | 2009-12-26 21:46:36 +0100 | [diff] [blame] | 43 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 44 | static void |
| 45 | nouveau_bo_del_ttm(struct ttm_buffer_object *bo) |
| 46 | { |
| 47 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 48 | struct drm_device *dev = dev_priv->dev; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 49 | struct nouveau_bo *nvbo = nouveau_bo(bo); |
| 50 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 51 | if (unlikely(nvbo->gem)) |
| 52 | DRM_ERROR("bo %p still attached to GEM object\n", bo); |
| 53 | |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 54 | nv10_mem_put_tile_region(dev, nvbo->tile, NULL); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 55 | kfree(nvbo); |
| 56 | } |
| 57 | |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 58 | static void |
Ben Skeggs | db5c8e2 | 2011-02-10 13:41:01 +1000 | [diff] [blame] | 59 | nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags, |
Ben Skeggs | f91bac5 | 2011-06-06 14:15:46 +1000 | [diff] [blame] | 60 | int *align, int *size) |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 61 | { |
Ben Skeggs | bfd83ac | 2010-11-12 15:12:51 +1000 | [diff] [blame] | 62 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 63 | |
Ben Skeggs | 573a2a3 | 2010-08-25 15:26:04 +1000 | [diff] [blame] | 64 | if (dev_priv->card_type < NV_50) { |
Ben Skeggs | bfd83ac | 2010-11-12 15:12:51 +1000 | [diff] [blame] | 65 | if (nvbo->tile_mode) { |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 66 | if (dev_priv->chipset >= 0x40) { |
| 67 | *align = 65536; |
Ben Skeggs | bfd83ac | 2010-11-12 15:12:51 +1000 | [diff] [blame] | 68 | *size = roundup(*size, 64 * nvbo->tile_mode); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 69 | |
| 70 | } else if (dev_priv->chipset >= 0x30) { |
| 71 | *align = 32768; |
Ben Skeggs | bfd83ac | 2010-11-12 15:12:51 +1000 | [diff] [blame] | 72 | *size = roundup(*size, 64 * nvbo->tile_mode); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 73 | |
| 74 | } else if (dev_priv->chipset >= 0x20) { |
| 75 | *align = 16384; |
Ben Skeggs | bfd83ac | 2010-11-12 15:12:51 +1000 | [diff] [blame] | 76 | *size = roundup(*size, 64 * nvbo->tile_mode); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 77 | |
| 78 | } else if (dev_priv->chipset >= 0x10) { |
| 79 | *align = 16384; |
Ben Skeggs | bfd83ac | 2010-11-12 15:12:51 +1000 | [diff] [blame] | 80 | *size = roundup(*size, 32 * nvbo->tile_mode); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 81 | } |
| 82 | } |
Ben Skeggs | bfd83ac | 2010-11-12 15:12:51 +1000 | [diff] [blame] | 83 | } else { |
Ben Skeggs | f91bac5 | 2011-06-06 14:15:46 +1000 | [diff] [blame] | 84 | *size = roundup(*size, (1 << nvbo->page_shift)); |
| 85 | *align = max((1 << nvbo->page_shift), *align); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 86 | } |
| 87 | |
Maarten Maathuis | 1c7059e | 2009-12-25 18:51:17 +0100 | [diff] [blame] | 88 | *size = roundup(*size, PAGE_SIZE); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 89 | } |
| 90 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 91 | int |
Ben Skeggs | 7375c95 | 2011-06-07 14:21:29 +1000 | [diff] [blame] | 92 | nouveau_bo_new(struct drm_device *dev, int size, int align, |
| 93 | uint32_t flags, uint32_t tile_mode, uint32_t tile_flags, |
Dave Airlie | 22b33e8 | 2012-04-02 11:53:06 +0100 | [diff] [blame] | 94 | struct sg_table *sg, |
Ben Skeggs | 7375c95 | 2011-06-07 14:21:29 +1000 | [diff] [blame] | 95 | struct nouveau_bo **pnvbo) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 96 | { |
| 97 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 98 | struct nouveau_bo *nvbo; |
Jerome Glisse | 57de4ba | 2011-11-11 15:42:57 -0500 | [diff] [blame] | 99 | size_t acc_size; |
Ben Skeggs | f91bac5 | 2011-06-06 14:15:46 +1000 | [diff] [blame] | 100 | int ret; |
Dave Airlie | 22b33e8 | 2012-04-02 11:53:06 +0100 | [diff] [blame] | 101 | int type = ttm_bo_type_device; |
| 102 | |
| 103 | if (sg) |
| 104 | type = ttm_bo_type_sg; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 105 | |
| 106 | nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL); |
| 107 | if (!nvbo) |
| 108 | return -ENOMEM; |
| 109 | INIT_LIST_HEAD(&nvbo->head); |
| 110 | INIT_LIST_HEAD(&nvbo->entry); |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 111 | INIT_LIST_HEAD(&nvbo->vma_list); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 112 | nvbo->tile_mode = tile_mode; |
| 113 | nvbo->tile_flags = tile_flags; |
Francisco Jerez | 699ddfd | 2010-10-10 06:07:32 +0200 | [diff] [blame] | 114 | nvbo->bo.bdev = &dev_priv->ttm.bdev; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 115 | |
Ben Skeggs | f91bac5 | 2011-06-06 14:15:46 +1000 | [diff] [blame] | 116 | nvbo->page_shift = 12; |
| 117 | if (dev_priv->bar1_vm) { |
| 118 | if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024) |
| 119 | nvbo->page_shift = dev_priv->bar1_vm->lpg_shift; |
| 120 | } |
| 121 | |
| 122 | nouveau_bo_fixup_align(nvbo, flags, &align, &size); |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 123 | nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; |
| 124 | nouveau_bo_placement_set(nvbo, flags, 0); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 125 | |
Jerome Glisse | 57de4ba | 2011-11-11 15:42:57 -0500 | [diff] [blame] | 126 | acc_size = ttm_bo_dma_acc_size(&dev_priv->ttm.bdev, size, |
| 127 | sizeof(struct nouveau_bo)); |
| 128 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 129 | ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size, |
Dave Airlie | 22b33e8 | 2012-04-02 11:53:06 +0100 | [diff] [blame] | 130 | type, &nvbo->placement, |
| 131 | align >> PAGE_SHIFT, 0, false, NULL, acc_size, sg, |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 132 | nouveau_bo_del_ttm); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 133 | if (ret) { |
| 134 | /* ttm will call nouveau_bo_del_ttm if it fails.. */ |
| 135 | return ret; |
| 136 | } |
| 137 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 138 | *pnvbo = nvbo; |
| 139 | return 0; |
| 140 | } |
| 141 | |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 142 | static void |
| 143 | set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 144 | { |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 145 | *n = 0; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 146 | |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 147 | if (type & TTM_PL_FLAG_VRAM) |
| 148 | pl[(*n)++] = TTM_PL_FLAG_VRAM | flags; |
| 149 | if (type & TTM_PL_FLAG_TT) |
| 150 | pl[(*n)++] = TTM_PL_FLAG_TT | flags; |
| 151 | if (type & TTM_PL_FLAG_SYSTEM) |
| 152 | pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags; |
| 153 | } |
Ben Skeggs | 37cb3e08 | 2009-12-16 16:22:42 +1000 | [diff] [blame] | 154 | |
Francisco Jerez | 699ddfd | 2010-10-10 06:07:32 +0200 | [diff] [blame] | 155 | static void |
| 156 | set_placement_range(struct nouveau_bo *nvbo, uint32_t type) |
| 157 | { |
| 158 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); |
Francisco Jerez | 812f219 | 2011-02-03 01:49:33 +0100 | [diff] [blame] | 159 | int vram_pages = dev_priv->vram_size >> PAGE_SHIFT; |
Francisco Jerez | 699ddfd | 2010-10-10 06:07:32 +0200 | [diff] [blame] | 160 | |
| 161 | if (dev_priv->card_type == NV_10 && |
Francisco Jerez | 812f219 | 2011-02-03 01:49:33 +0100 | [diff] [blame] | 162 | nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) && |
Francisco Jerez | 4beb116 | 2011-11-06 21:21:28 +0100 | [diff] [blame] | 163 | nvbo->bo.mem.num_pages < vram_pages / 4) { |
Francisco Jerez | 699ddfd | 2010-10-10 06:07:32 +0200 | [diff] [blame] | 164 | /* |
| 165 | * Make sure that the color and depth buffers are handled |
| 166 | * by independent memory controller units. Up to a 9x |
| 167 | * speed up when alpha-blending and depth-test are enabled |
| 168 | * at the same time. |
| 169 | */ |
Francisco Jerez | 699ddfd | 2010-10-10 06:07:32 +0200 | [diff] [blame] | 170 | if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) { |
| 171 | nvbo->placement.fpfn = vram_pages / 2; |
| 172 | nvbo->placement.lpfn = ~0; |
| 173 | } else { |
| 174 | nvbo->placement.fpfn = 0; |
| 175 | nvbo->placement.lpfn = vram_pages / 2; |
| 176 | } |
| 177 | } |
| 178 | } |
| 179 | |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 180 | void |
| 181 | nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy) |
| 182 | { |
| 183 | struct ttm_placement *pl = &nvbo->placement; |
| 184 | uint32_t flags = TTM_PL_MASK_CACHING | |
| 185 | (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0); |
| 186 | |
| 187 | pl->placement = nvbo->placements; |
| 188 | set_placement_list(nvbo->placements, &pl->num_placement, |
| 189 | type, flags); |
| 190 | |
| 191 | pl->busy_placement = nvbo->busy_placements; |
| 192 | set_placement_list(nvbo->busy_placements, &pl->num_busy_placement, |
| 193 | type | busy, flags); |
Francisco Jerez | 699ddfd | 2010-10-10 06:07:32 +0200 | [diff] [blame] | 194 | |
| 195 | set_placement_range(nvbo, type); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 196 | } |
| 197 | |
| 198 | int |
| 199 | nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype) |
| 200 | { |
| 201 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); |
| 202 | struct ttm_buffer_object *bo = &nvbo->bo; |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 203 | int ret; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 204 | |
| 205 | if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) { |
| 206 | NV_ERROR(nouveau_bdev(bo->bdev)->dev, |
| 207 | "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo, |
| 208 | 1 << bo->mem.mem_type, memtype); |
| 209 | return -EINVAL; |
| 210 | } |
| 211 | |
| 212 | if (nvbo->pin_refcnt++) |
| 213 | return 0; |
| 214 | |
| 215 | ret = ttm_bo_reserve(bo, false, false, false, 0); |
| 216 | if (ret) |
| 217 | goto out; |
| 218 | |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 219 | nouveau_bo_placement_set(nvbo, memtype, 0); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 220 | |
Ben Skeggs | 7a45d76 | 2010-11-22 08:50:27 +1000 | [diff] [blame] | 221 | ret = nouveau_bo_validate(nvbo, false, false, false); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 222 | if (ret == 0) { |
| 223 | switch (bo->mem.mem_type) { |
| 224 | case TTM_PL_VRAM: |
| 225 | dev_priv->fb_aper_free -= bo->mem.size; |
| 226 | break; |
| 227 | case TTM_PL_TT: |
| 228 | dev_priv->gart_info.aper_free -= bo->mem.size; |
| 229 | break; |
| 230 | default: |
| 231 | break; |
| 232 | } |
| 233 | } |
| 234 | ttm_bo_unreserve(bo); |
| 235 | out: |
| 236 | if (unlikely(ret)) |
| 237 | nvbo->pin_refcnt--; |
| 238 | return ret; |
| 239 | } |
| 240 | |
| 241 | int |
| 242 | nouveau_bo_unpin(struct nouveau_bo *nvbo) |
| 243 | { |
| 244 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); |
| 245 | struct ttm_buffer_object *bo = &nvbo->bo; |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 246 | int ret; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 247 | |
| 248 | if (--nvbo->pin_refcnt) |
| 249 | return 0; |
| 250 | |
| 251 | ret = ttm_bo_reserve(bo, false, false, false, 0); |
| 252 | if (ret) |
| 253 | return ret; |
| 254 | |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 255 | nouveau_bo_placement_set(nvbo, bo->mem.placement, 0); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 256 | |
Ben Skeggs | 7a45d76 | 2010-11-22 08:50:27 +1000 | [diff] [blame] | 257 | ret = nouveau_bo_validate(nvbo, false, false, false); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 258 | if (ret == 0) { |
| 259 | switch (bo->mem.mem_type) { |
| 260 | case TTM_PL_VRAM: |
| 261 | dev_priv->fb_aper_free += bo->mem.size; |
| 262 | break; |
| 263 | case TTM_PL_TT: |
| 264 | dev_priv->gart_info.aper_free += bo->mem.size; |
| 265 | break; |
| 266 | default: |
| 267 | break; |
| 268 | } |
| 269 | } |
| 270 | |
| 271 | ttm_bo_unreserve(bo); |
| 272 | return ret; |
| 273 | } |
| 274 | |
| 275 | int |
| 276 | nouveau_bo_map(struct nouveau_bo *nvbo) |
| 277 | { |
| 278 | int ret; |
| 279 | |
| 280 | ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0); |
| 281 | if (ret) |
| 282 | return ret; |
| 283 | |
| 284 | ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap); |
| 285 | ttm_bo_unreserve(&nvbo->bo); |
| 286 | return ret; |
| 287 | } |
| 288 | |
| 289 | void |
| 290 | nouveau_bo_unmap(struct nouveau_bo *nvbo) |
| 291 | { |
Ben Skeggs | 9d59e8a | 2010-08-27 13:04:41 +1000 | [diff] [blame] | 292 | if (nvbo) |
| 293 | ttm_bo_kunmap(&nvbo->kmap); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 294 | } |
| 295 | |
Ben Skeggs | 7a45d76 | 2010-11-22 08:50:27 +1000 | [diff] [blame] | 296 | int |
| 297 | nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible, |
| 298 | bool no_wait_reserve, bool no_wait_gpu) |
| 299 | { |
| 300 | int ret; |
| 301 | |
| 302 | ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, interruptible, |
| 303 | no_wait_reserve, no_wait_gpu); |
| 304 | if (ret) |
| 305 | return ret; |
| 306 | |
| 307 | return 0; |
| 308 | } |
| 309 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 310 | u16 |
| 311 | nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index) |
| 312 | { |
| 313 | bool is_iomem; |
| 314 | u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem); |
| 315 | mem = &mem[index]; |
| 316 | if (is_iomem) |
| 317 | return ioread16_native((void __force __iomem *)mem); |
| 318 | else |
| 319 | return *mem; |
| 320 | } |
| 321 | |
| 322 | void |
| 323 | nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val) |
| 324 | { |
| 325 | bool is_iomem; |
| 326 | u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem); |
| 327 | mem = &mem[index]; |
| 328 | if (is_iomem) |
| 329 | iowrite16_native(val, (void __force __iomem *)mem); |
| 330 | else |
| 331 | *mem = val; |
| 332 | } |
| 333 | |
| 334 | u32 |
| 335 | nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index) |
| 336 | { |
| 337 | bool is_iomem; |
| 338 | u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem); |
| 339 | mem = &mem[index]; |
| 340 | if (is_iomem) |
| 341 | return ioread32_native((void __force __iomem *)mem); |
| 342 | else |
| 343 | return *mem; |
| 344 | } |
| 345 | |
| 346 | void |
| 347 | nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val) |
| 348 | { |
| 349 | bool is_iomem; |
| 350 | u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem); |
| 351 | mem = &mem[index]; |
| 352 | if (is_iomem) |
| 353 | iowrite32_native(val, (void __force __iomem *)mem); |
| 354 | else |
| 355 | *mem = val; |
| 356 | } |
| 357 | |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 358 | static struct ttm_tt * |
| 359 | nouveau_ttm_tt_create(struct ttm_bo_device *bdev, |
| 360 | unsigned long size, uint32_t page_flags, |
| 361 | struct page *dummy_read_page) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 362 | { |
| 363 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev); |
| 364 | struct drm_device *dev = dev_priv->dev; |
| 365 | |
| 366 | switch (dev_priv->gart_info.type) { |
Ben Skeggs | b694dfb | 2009-12-15 10:38:32 +1000 | [diff] [blame] | 367 | #if __OS_HAS_AGP |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 368 | case NOUVEAU_GART_AGP: |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 369 | return ttm_agp_tt_create(bdev, dev->agp->bridge, |
| 370 | size, page_flags, dummy_read_page); |
Ben Skeggs | b694dfb | 2009-12-15 10:38:32 +1000 | [diff] [blame] | 371 | #endif |
Ben Skeggs | 58e6c7a | 2011-01-11 14:10:09 +1000 | [diff] [blame] | 372 | case NOUVEAU_GART_PDMA: |
| 373 | case NOUVEAU_GART_HW: |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 374 | return nouveau_sgdma_create_ttm(bdev, size, page_flags, |
| 375 | dummy_read_page); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 376 | default: |
| 377 | NV_ERROR(dev, "Unknown GART type %d\n", |
| 378 | dev_priv->gart_info.type); |
| 379 | break; |
| 380 | } |
| 381 | |
| 382 | return NULL; |
| 383 | } |
| 384 | |
| 385 | static int |
| 386 | nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags) |
| 387 | { |
| 388 | /* We'll do this from user space. */ |
| 389 | return 0; |
| 390 | } |
| 391 | |
| 392 | static int |
| 393 | nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, |
| 394 | struct ttm_mem_type_manager *man) |
| 395 | { |
| 396 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev); |
| 397 | struct drm_device *dev = dev_priv->dev; |
| 398 | |
| 399 | switch (type) { |
| 400 | case TTM_PL_SYSTEM: |
| 401 | man->flags = TTM_MEMTYPE_FLAG_MAPPABLE; |
| 402 | man->available_caching = TTM_PL_MASK_CACHING; |
| 403 | man->default_caching = TTM_PL_FLAG_CACHED; |
| 404 | break; |
| 405 | case TTM_PL_VRAM: |
Ben Skeggs | 8984e04 | 2010-11-15 11:48:33 +1000 | [diff] [blame] | 406 | if (dev_priv->card_type >= NV_50) { |
Ben Skeggs | 573a2a3 | 2010-08-25 15:26:04 +1000 | [diff] [blame] | 407 | man->func = &nouveau_vram_manager; |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 408 | man->io_reserve_fastpath = false; |
| 409 | man->use_io_reserve_lru = true; |
| 410 | } else { |
Ben Skeggs | 573a2a3 | 2010-08-25 15:26:04 +1000 | [diff] [blame] | 411 | man->func = &ttm_bo_manager_func; |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 412 | } |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 413 | man->flags = TTM_MEMTYPE_FLAG_FIXED | |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 414 | TTM_MEMTYPE_FLAG_MAPPABLE; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 415 | man->available_caching = TTM_PL_FLAG_UNCACHED | |
| 416 | TTM_PL_FLAG_WC; |
| 417 | man->default_caching = TTM_PL_FLAG_WC; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 418 | break; |
| 419 | case TTM_PL_TT: |
Ben Skeggs | 26c0c9e | 2011-02-10 12:59:51 +1000 | [diff] [blame] | 420 | if (dev_priv->card_type >= NV_50) |
| 421 | man->func = &nouveau_gart_manager; |
| 422 | else |
| 423 | man->func = &ttm_bo_manager_func; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 424 | switch (dev_priv->gart_info.type) { |
| 425 | case NOUVEAU_GART_AGP: |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 426 | man->flags = TTM_MEMTYPE_FLAG_MAPPABLE; |
Francisco Jerez | a3d487e | 2010-11-20 22:11:22 +0100 | [diff] [blame] | 427 | man->available_caching = TTM_PL_FLAG_UNCACHED | |
| 428 | TTM_PL_FLAG_WC; |
| 429 | man->default_caching = TTM_PL_FLAG_WC; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 430 | break; |
Ben Skeggs | 58e6c7a | 2011-01-11 14:10:09 +1000 | [diff] [blame] | 431 | case NOUVEAU_GART_PDMA: |
| 432 | case NOUVEAU_GART_HW: |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 433 | man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | |
| 434 | TTM_MEMTYPE_FLAG_CMA; |
| 435 | man->available_caching = TTM_PL_MASK_CACHING; |
| 436 | man->default_caching = TTM_PL_FLAG_CACHED; |
| 437 | break; |
| 438 | default: |
| 439 | NV_ERROR(dev, "Unknown GART type: %d\n", |
| 440 | dev_priv->gart_info.type); |
| 441 | return -EINVAL; |
| 442 | } |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 443 | break; |
| 444 | default: |
| 445 | NV_ERROR(dev, "Unsupported memory type %u\n", (unsigned)type); |
| 446 | return -EINVAL; |
| 447 | } |
| 448 | return 0; |
| 449 | } |
| 450 | |
| 451 | static void |
| 452 | nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl) |
| 453 | { |
| 454 | struct nouveau_bo *nvbo = nouveau_bo(bo); |
| 455 | |
| 456 | switch (bo->mem.mem_type) { |
Francisco Jerez | 22fbd53 | 2009-12-11 18:40:17 +0100 | [diff] [blame] | 457 | case TTM_PL_VRAM: |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 458 | nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT, |
| 459 | TTM_PL_FLAG_SYSTEM); |
Francisco Jerez | 22fbd53 | 2009-12-11 18:40:17 +0100 | [diff] [blame] | 460 | break; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 461 | default: |
Francisco Jerez | 78ad0f7 | 2010-03-18 13:07:47 +0100 | [diff] [blame] | 462 | nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 463 | break; |
| 464 | } |
Francisco Jerez | 22fbd53 | 2009-12-11 18:40:17 +0100 | [diff] [blame] | 465 | |
| 466 | *pl = nvbo->placement; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 467 | } |
| 468 | |
| 469 | |
| 470 | /* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access |
| 471 | * TTM_PL_{VRAM,TT} directly. |
| 472 | */ |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 473 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 474 | static int |
| 475 | nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan, |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 476 | struct nouveau_bo *nvbo, bool evict, |
| 477 | bool no_wait_reserve, bool no_wait_gpu, |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 478 | struct ttm_mem_reg *new_mem) |
| 479 | { |
| 480 | struct nouveau_fence *fence = NULL; |
| 481 | int ret; |
| 482 | |
Ben Skeggs | d375e7d5 | 2012-04-30 13:30:00 +1000 | [diff] [blame] | 483 | ret = nouveau_fence_new(chan, &fence); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 484 | if (ret) |
| 485 | return ret; |
| 486 | |
Francisco Jerez | 6479881 | 2010-09-21 19:02:01 +0200 | [diff] [blame] | 487 | ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL, evict, |
Francisco Jerez | 311ab69 | 2010-07-04 12:54:23 +0200 | [diff] [blame] | 488 | no_wait_reserve, no_wait_gpu, new_mem); |
Marcin Slusarz | 382d62e | 2010-10-20 21:50:24 +0200 | [diff] [blame] | 489 | nouveau_fence_unref(&fence); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 490 | return ret; |
| 491 | } |
| 492 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 493 | static int |
Ben Skeggs | c6b7e89 | 2012-03-20 14:36:04 +1000 | [diff] [blame] | 494 | nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo, |
| 495 | struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem) |
| 496 | { |
| 497 | struct nouveau_mem *node = old_mem->mm_node; |
| 498 | int ret = RING_SPACE(chan, 10); |
| 499 | if (ret == 0) { |
Ben Skeggs | 6d59702 | 2012-04-01 21:09:13 +1000 | [diff] [blame] | 500 | BEGIN_NVC0(chan, NvSubCopy, 0x0400, 8); |
Ben Skeggs | c6b7e89 | 2012-03-20 14:36:04 +1000 | [diff] [blame] | 501 | OUT_RING (chan, upper_32_bits(node->vma[0].offset)); |
| 502 | OUT_RING (chan, lower_32_bits(node->vma[0].offset)); |
| 503 | OUT_RING (chan, upper_32_bits(node->vma[1].offset)); |
| 504 | OUT_RING (chan, lower_32_bits(node->vma[1].offset)); |
| 505 | OUT_RING (chan, PAGE_SIZE); |
| 506 | OUT_RING (chan, PAGE_SIZE); |
| 507 | OUT_RING (chan, PAGE_SIZE); |
| 508 | OUT_RING (chan, new_mem->num_pages); |
Ben Skeggs | 6d59702 | 2012-04-01 21:09:13 +1000 | [diff] [blame] | 509 | BEGIN_IMC0(chan, NvSubCopy, 0x0300, 0x0386); |
Ben Skeggs | c6b7e89 | 2012-03-20 14:36:04 +1000 | [diff] [blame] | 510 | } |
| 511 | return ret; |
| 512 | } |
| 513 | |
| 514 | static int |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 515 | nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle) |
| 516 | { |
| 517 | int ret = RING_SPACE(chan, 2); |
| 518 | if (ret == 0) { |
| 519 | BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1); |
| 520 | OUT_RING (chan, handle); |
| 521 | } |
| 522 | return ret; |
| 523 | } |
| 524 | |
| 525 | static int |
Ben Skeggs | 183720b | 2010-12-09 15:17:10 +1000 | [diff] [blame] | 526 | nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, |
| 527 | struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem) |
| 528 | { |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 529 | struct nouveau_mem *node = old_mem->mm_node; |
| 530 | u64 src_offset = node->vma[0].offset; |
| 531 | u64 dst_offset = node->vma[1].offset; |
Ben Skeggs | 183720b | 2010-12-09 15:17:10 +1000 | [diff] [blame] | 532 | u32 page_count = new_mem->num_pages; |
| 533 | int ret; |
| 534 | |
Ben Skeggs | 183720b | 2010-12-09 15:17:10 +1000 | [diff] [blame] | 535 | page_count = new_mem->num_pages; |
| 536 | while (page_count) { |
| 537 | int line_count = (page_count > 2047) ? 2047 : page_count; |
| 538 | |
| 539 | ret = RING_SPACE(chan, 12); |
| 540 | if (ret) |
| 541 | return ret; |
| 542 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 543 | BEGIN_NVC0(chan, NvSubCopy, 0x0238, 2); |
Ben Skeggs | 183720b | 2010-12-09 15:17:10 +1000 | [diff] [blame] | 544 | OUT_RING (chan, upper_32_bits(dst_offset)); |
| 545 | OUT_RING (chan, lower_32_bits(dst_offset)); |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 546 | BEGIN_NVC0(chan, NvSubCopy, 0x030c, 6); |
Ben Skeggs | 183720b | 2010-12-09 15:17:10 +1000 | [diff] [blame] | 547 | OUT_RING (chan, upper_32_bits(src_offset)); |
| 548 | OUT_RING (chan, lower_32_bits(src_offset)); |
| 549 | OUT_RING (chan, PAGE_SIZE); /* src_pitch */ |
| 550 | OUT_RING (chan, PAGE_SIZE); /* dst_pitch */ |
| 551 | OUT_RING (chan, PAGE_SIZE); /* line_length */ |
| 552 | OUT_RING (chan, line_count); |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 553 | BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1); |
Ben Skeggs | 183720b | 2010-12-09 15:17:10 +1000 | [diff] [blame] | 554 | OUT_RING (chan, 0x00100110); |
| 555 | |
| 556 | page_count -= line_count; |
| 557 | src_offset += (PAGE_SIZE * line_count); |
| 558 | dst_offset += (PAGE_SIZE * line_count); |
| 559 | } |
| 560 | |
| 561 | return 0; |
| 562 | } |
| 563 | |
| 564 | static int |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 565 | nv50_bo_move_init(struct nouveau_channel *chan, u32 handle) |
| 566 | { |
| 567 | int ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfe0, 0x1000, |
| 568 | &chan->m2mf_ntfy); |
| 569 | if (ret == 0) { |
| 570 | ret = RING_SPACE(chan, 6); |
| 571 | if (ret == 0) { |
| 572 | BEGIN_NV04(chan, NvSubCopy, 0x0000, 1); |
| 573 | OUT_RING (chan, handle); |
| 574 | BEGIN_NV04(chan, NvSubCopy, 0x0180, 3); |
| 575 | OUT_RING (chan, NvNotify0); |
| 576 | OUT_RING (chan, NvDmaFB); |
| 577 | OUT_RING (chan, NvDmaFB); |
| 578 | } else { |
| 579 | nouveau_ramht_remove(chan, NvNotify0); |
| 580 | } |
| 581 | } |
| 582 | |
| 583 | return ret; |
| 584 | } |
| 585 | |
| 586 | static int |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 587 | nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, |
| 588 | struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 589 | { |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 590 | struct nouveau_mem *node = old_mem->mm_node; |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 591 | struct nouveau_bo *nvbo = nouveau_bo(bo); |
| 592 | u64 length = (new_mem->num_pages << PAGE_SHIFT); |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 593 | u64 src_offset = node->vma[0].offset; |
| 594 | u64 dst_offset = node->vma[1].offset; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 595 | int ret; |
| 596 | |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 597 | while (length) { |
| 598 | u32 amount, stride, height; |
| 599 | |
Ben Skeggs | 5220b3c | 2010-09-23 15:21:17 +1000 | [diff] [blame] | 600 | amount = min(length, (u64)(4 * 1024 * 1024)); |
| 601 | stride = 16 * 4; |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 602 | height = amount / stride; |
| 603 | |
Francisco Jerez | f13b326 | 2010-10-10 06:01:08 +0200 | [diff] [blame] | 604 | if (new_mem->mem_type == TTM_PL_VRAM && |
| 605 | nouveau_bo_tile_layout(nvbo)) { |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 606 | ret = RING_SPACE(chan, 8); |
| 607 | if (ret) |
| 608 | return ret; |
| 609 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 610 | BEGIN_NV04(chan, NvSubCopy, 0x0200, 7); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 611 | OUT_RING (chan, 0); |
Ben Skeggs | 5220b3c | 2010-09-23 15:21:17 +1000 | [diff] [blame] | 612 | OUT_RING (chan, 0); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 613 | OUT_RING (chan, stride); |
| 614 | OUT_RING (chan, height); |
| 615 | OUT_RING (chan, 1); |
| 616 | OUT_RING (chan, 0); |
| 617 | OUT_RING (chan, 0); |
| 618 | } else { |
| 619 | ret = RING_SPACE(chan, 2); |
| 620 | if (ret) |
| 621 | return ret; |
| 622 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 623 | BEGIN_NV04(chan, NvSubCopy, 0x0200, 1); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 624 | OUT_RING (chan, 1); |
| 625 | } |
Francisco Jerez | f13b326 | 2010-10-10 06:01:08 +0200 | [diff] [blame] | 626 | if (old_mem->mem_type == TTM_PL_VRAM && |
| 627 | nouveau_bo_tile_layout(nvbo)) { |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 628 | ret = RING_SPACE(chan, 8); |
| 629 | if (ret) |
| 630 | return ret; |
| 631 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 632 | BEGIN_NV04(chan, NvSubCopy, 0x021c, 7); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 633 | OUT_RING (chan, 0); |
Ben Skeggs | 5220b3c | 2010-09-23 15:21:17 +1000 | [diff] [blame] | 634 | OUT_RING (chan, 0); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 635 | OUT_RING (chan, stride); |
| 636 | OUT_RING (chan, height); |
| 637 | OUT_RING (chan, 1); |
| 638 | OUT_RING (chan, 0); |
| 639 | OUT_RING (chan, 0); |
| 640 | } else { |
| 641 | ret = RING_SPACE(chan, 2); |
| 642 | if (ret) |
| 643 | return ret; |
| 644 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 645 | BEGIN_NV04(chan, NvSubCopy, 0x021c, 1); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 646 | OUT_RING (chan, 1); |
| 647 | } |
| 648 | |
| 649 | ret = RING_SPACE(chan, 14); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 650 | if (ret) |
| 651 | return ret; |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 652 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 653 | BEGIN_NV04(chan, NvSubCopy, 0x0238, 2); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 654 | OUT_RING (chan, upper_32_bits(src_offset)); |
| 655 | OUT_RING (chan, upper_32_bits(dst_offset)); |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 656 | BEGIN_NV04(chan, NvSubCopy, 0x030c, 8); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 657 | OUT_RING (chan, lower_32_bits(src_offset)); |
| 658 | OUT_RING (chan, lower_32_bits(dst_offset)); |
| 659 | OUT_RING (chan, stride); |
| 660 | OUT_RING (chan, stride); |
| 661 | OUT_RING (chan, stride); |
| 662 | OUT_RING (chan, height); |
| 663 | OUT_RING (chan, 0x00000101); |
| 664 | OUT_RING (chan, 0x00000000); |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 665 | BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 666 | OUT_RING (chan, 0); |
| 667 | |
| 668 | length -= amount; |
| 669 | src_offset += amount; |
| 670 | dst_offset += amount; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 671 | } |
| 672 | |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 673 | return 0; |
| 674 | } |
| 675 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 676 | static int |
| 677 | nv04_bo_move_init(struct nouveau_channel *chan, u32 handle) |
| 678 | { |
| 679 | int ret = nouveau_notifier_alloc(chan, NvNotify0, 32, 0xfe0, 0x1000, |
| 680 | &chan->m2mf_ntfy); |
| 681 | if (ret == 0) { |
| 682 | ret = RING_SPACE(chan, 4); |
| 683 | if (ret == 0) { |
| 684 | BEGIN_NV04(chan, NvSubCopy, 0x0000, 1); |
| 685 | OUT_RING (chan, handle); |
| 686 | BEGIN_NV04(chan, NvSubCopy, 0x0180, 1); |
| 687 | OUT_RING (chan, NvNotify0); |
| 688 | } |
| 689 | } |
| 690 | |
| 691 | return ret; |
| 692 | } |
| 693 | |
Ben Skeggs | a670478 | 2011-02-16 09:10:20 +1000 | [diff] [blame] | 694 | static inline uint32_t |
| 695 | nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo, |
| 696 | struct nouveau_channel *chan, struct ttm_mem_reg *mem) |
| 697 | { |
| 698 | if (mem->mem_type == TTM_PL_TT) |
| 699 | return chan->gart_handle; |
| 700 | return chan->vram_handle; |
| 701 | } |
| 702 | |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 703 | static int |
| 704 | nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo, |
| 705 | struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem) |
| 706 | { |
Ben Skeggs | d961db7 | 2010-08-05 10:48:18 +1000 | [diff] [blame] | 707 | u32 src_offset = old_mem->start << PAGE_SHIFT; |
| 708 | u32 dst_offset = new_mem->start << PAGE_SHIFT; |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 709 | u32 page_count = new_mem->num_pages; |
| 710 | int ret; |
| 711 | |
| 712 | ret = RING_SPACE(chan, 3); |
| 713 | if (ret) |
| 714 | return ret; |
| 715 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 716 | BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 717 | OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem)); |
| 718 | OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem)); |
| 719 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 720 | page_count = new_mem->num_pages; |
| 721 | while (page_count) { |
| 722 | int line_count = (page_count > 2047) ? 2047 : page_count; |
| 723 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 724 | ret = RING_SPACE(chan, 11); |
| 725 | if (ret) |
| 726 | return ret; |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 727 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 728 | BEGIN_NV04(chan, NvSubCopy, |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 729 | NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 730 | OUT_RING (chan, src_offset); |
| 731 | OUT_RING (chan, dst_offset); |
| 732 | OUT_RING (chan, PAGE_SIZE); /* src_pitch */ |
| 733 | OUT_RING (chan, PAGE_SIZE); /* dst_pitch */ |
| 734 | OUT_RING (chan, PAGE_SIZE); /* line_length */ |
| 735 | OUT_RING (chan, line_count); |
| 736 | OUT_RING (chan, 0x00000101); |
| 737 | OUT_RING (chan, 0x00000000); |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 738 | BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 739 | OUT_RING (chan, 0); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 740 | |
| 741 | page_count -= line_count; |
| 742 | src_offset += (PAGE_SIZE * line_count); |
| 743 | dst_offset += (PAGE_SIZE * line_count); |
| 744 | } |
| 745 | |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 746 | return 0; |
| 747 | } |
| 748 | |
| 749 | static int |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 750 | nouveau_vma_getmap(struct nouveau_channel *chan, struct nouveau_bo *nvbo, |
| 751 | struct ttm_mem_reg *mem, struct nouveau_vma *vma) |
| 752 | { |
| 753 | struct nouveau_mem *node = mem->mm_node; |
| 754 | int ret; |
| 755 | |
| 756 | ret = nouveau_vm_get(chan->vm, mem->num_pages << PAGE_SHIFT, |
| 757 | node->page_shift, NV_MEM_ACCESS_RO, vma); |
| 758 | if (ret) |
| 759 | return ret; |
| 760 | |
| 761 | if (mem->mem_type == TTM_PL_VRAM) |
| 762 | nouveau_vm_map(vma, node); |
| 763 | else |
Ben Skeggs | f7b24c4 | 2011-12-22 15:20:21 +1000 | [diff] [blame] | 764 | nouveau_vm_map_sg(vma, 0, mem->num_pages << PAGE_SHIFT, node); |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 765 | |
| 766 | return 0; |
| 767 | } |
| 768 | |
| 769 | static int |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 770 | nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr, |
| 771 | bool no_wait_reserve, bool no_wait_gpu, |
| 772 | struct ttm_mem_reg *new_mem) |
| 773 | { |
| 774 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); |
Ben Skeggs | accf949 | 2012-03-16 12:40:17 +1000 | [diff] [blame] | 775 | struct nouveau_channel *chan = chan = dev_priv->channel; |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 776 | struct nouveau_bo *nvbo = nouveau_bo(bo); |
Ben Skeggs | 3425df4 | 2011-02-10 11:22:12 +1000 | [diff] [blame] | 777 | struct ttm_mem_reg *old_mem = &bo->mem; |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 778 | int ret; |
| 779 | |
Ben Skeggs | accf949 | 2012-03-16 12:40:17 +1000 | [diff] [blame] | 780 | mutex_lock_nested(&chan->mutex, NOUVEAU_KCHANNEL_MUTEX); |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 781 | |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 782 | /* create temporary vmas for the transfer and attach them to the |
| 783 | * old nouveau_mem node, these will get cleaned up after ttm has |
| 784 | * destroyed the ttm_mem_reg |
Ben Skeggs | 3425df4 | 2011-02-10 11:22:12 +1000 | [diff] [blame] | 785 | */ |
Ben Skeggs | 26c0c9e | 2011-02-10 12:59:51 +1000 | [diff] [blame] | 786 | if (dev_priv->card_type >= NV_50) { |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 787 | struct nouveau_mem *node = old_mem->mm_node; |
Ben Skeggs | 3425df4 | 2011-02-10 11:22:12 +1000 | [diff] [blame] | 788 | |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 789 | ret = nouveau_vma_getmap(chan, nvbo, old_mem, &node->vma[0]); |
| 790 | if (ret) |
| 791 | goto out; |
Ben Skeggs | 3425df4 | 2011-02-10 11:22:12 +1000 | [diff] [blame] | 792 | |
Ben Skeggs | d2f96666 | 2011-06-06 20:54:42 +1000 | [diff] [blame] | 793 | ret = nouveau_vma_getmap(chan, nvbo, new_mem, &node->vma[1]); |
| 794 | if (ret) |
| 795 | goto out; |
Ben Skeggs | 3425df4 | 2011-02-10 11:22:12 +1000 | [diff] [blame] | 796 | } |
| 797 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 798 | ret = dev_priv->ttm.move(chan, bo, &bo->mem, new_mem); |
Ben Skeggs | 6a6b73f | 2010-10-05 16:53:48 +1000 | [diff] [blame] | 799 | if (ret == 0) { |
| 800 | ret = nouveau_bo_move_accel_cleanup(chan, nvbo, evict, |
| 801 | no_wait_reserve, |
| 802 | no_wait_gpu, new_mem); |
| 803 | } |
Ben Skeggs | f1ab0cc | 2010-08-26 11:32:01 +1000 | [diff] [blame] | 804 | |
Ben Skeggs | 3425df4 | 2011-02-10 11:22:12 +1000 | [diff] [blame] | 805 | out: |
Ben Skeggs | accf949 | 2012-03-16 12:40:17 +1000 | [diff] [blame] | 806 | mutex_unlock(&chan->mutex); |
Ben Skeggs | 6a6b73f | 2010-10-05 16:53:48 +1000 | [diff] [blame] | 807 | return ret; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 808 | } |
| 809 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 810 | void |
| 811 | nouveau_bo_move_init(struct nouveau_channel *chan) |
| 812 | { |
| 813 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
| 814 | static const struct { |
| 815 | const char *name; |
| 816 | u32 oclass; |
| 817 | int (*exec)(struct nouveau_channel *, |
| 818 | struct ttm_buffer_object *, |
| 819 | struct ttm_mem_reg *, struct ttm_mem_reg *); |
| 820 | int (*init)(struct nouveau_channel *, u32 handle); |
| 821 | } _methods[] = { |
| 822 | { "COPY", 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init }, |
| 823 | { "M2MF", 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init }, |
| 824 | { "M2MF", 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init }, |
| 825 | { "M2MF", 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init }, |
| 826 | {} |
| 827 | }, *mthd = _methods; |
| 828 | const char *name = "CPU"; |
| 829 | int ret; |
| 830 | |
| 831 | do { |
| 832 | ret = nouveau_gpuobj_gr_new(chan, mthd->oclass, mthd->oclass); |
| 833 | if (ret == 0) { |
| 834 | ret = mthd->init(chan, mthd->oclass); |
| 835 | if (ret == 0) { |
| 836 | dev_priv->ttm.move = mthd->exec; |
| 837 | name = mthd->name; |
| 838 | break; |
| 839 | } |
| 840 | } |
| 841 | } while ((++mthd)->exec); |
| 842 | |
| 843 | NV_INFO(chan->dev, "MM: using %s for buffer copies\n", name); |
| 844 | } |
| 845 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 846 | static int |
| 847 | nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr, |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 848 | bool no_wait_reserve, bool no_wait_gpu, |
| 849 | struct ttm_mem_reg *new_mem) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 850 | { |
| 851 | u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; |
| 852 | struct ttm_placement placement; |
| 853 | struct ttm_mem_reg tmp_mem; |
| 854 | int ret; |
| 855 | |
| 856 | placement.fpfn = placement.lpfn = 0; |
| 857 | placement.num_placement = placement.num_busy_placement = 1; |
Francisco Jerez | 77e2b5e | 2009-12-16 19:05:00 +0100 | [diff] [blame] | 858 | placement.placement = placement.busy_placement = &placement_memtype; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 859 | |
| 860 | tmp_mem = *new_mem; |
| 861 | tmp_mem.mm_node = NULL; |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 862 | ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_reserve, no_wait_gpu); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 863 | if (ret) |
| 864 | return ret; |
| 865 | |
| 866 | ret = ttm_tt_bind(bo->ttm, &tmp_mem); |
| 867 | if (ret) |
| 868 | goto out; |
| 869 | |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 870 | ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, &tmp_mem); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 871 | if (ret) |
| 872 | goto out; |
| 873 | |
Ben Skeggs | b8884da | 2011-02-14 13:51:28 +1000 | [diff] [blame] | 874 | ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, new_mem); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 875 | out: |
Ben Skeggs | 42311ff | 2010-08-04 12:07:08 +1000 | [diff] [blame] | 876 | ttm_bo_mem_put(bo, &tmp_mem); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 877 | return ret; |
| 878 | } |
| 879 | |
| 880 | static int |
| 881 | nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr, |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 882 | bool no_wait_reserve, bool no_wait_gpu, |
| 883 | struct ttm_mem_reg *new_mem) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 884 | { |
| 885 | u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; |
| 886 | struct ttm_placement placement; |
| 887 | struct ttm_mem_reg tmp_mem; |
| 888 | int ret; |
| 889 | |
| 890 | placement.fpfn = placement.lpfn = 0; |
| 891 | placement.num_placement = placement.num_busy_placement = 1; |
Francisco Jerez | 77e2b5e | 2009-12-16 19:05:00 +0100 | [diff] [blame] | 892 | placement.placement = placement.busy_placement = &placement_memtype; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 893 | |
| 894 | tmp_mem = *new_mem; |
| 895 | tmp_mem.mm_node = NULL; |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 896 | ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_reserve, no_wait_gpu); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 897 | if (ret) |
| 898 | return ret; |
| 899 | |
Ben Skeggs | b8884da | 2011-02-14 13:51:28 +1000 | [diff] [blame] | 900 | ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 901 | if (ret) |
| 902 | goto out; |
| 903 | |
Ben Skeggs | b8884da | 2011-02-14 13:51:28 +1000 | [diff] [blame] | 904 | ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, new_mem); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 905 | if (ret) |
| 906 | goto out; |
| 907 | |
| 908 | out: |
Ben Skeggs | 42311ff | 2010-08-04 12:07:08 +1000 | [diff] [blame] | 909 | ttm_bo_mem_put(bo, &tmp_mem); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 910 | return ret; |
| 911 | } |
| 912 | |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 913 | static void |
| 914 | nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem) |
| 915 | { |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 916 | struct nouveau_bo *nvbo = nouveau_bo(bo); |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 917 | struct nouveau_vma *vma; |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 918 | |
Ben Skeggs | 9f1feed | 2012-01-25 15:34:22 +1000 | [diff] [blame] | 919 | /* ttm can now (stupidly) pass the driver bos it didn't create... */ |
| 920 | if (bo->destroy != nouveau_bo_del_ttm) |
| 921 | return; |
| 922 | |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 923 | list_for_each_entry(vma, &nvbo->vma_list, head) { |
Jerome Glisse | dc97b34 | 2011-11-18 11:47:03 -0500 | [diff] [blame] | 924 | if (new_mem && new_mem->mem_type == TTM_PL_VRAM) { |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 925 | nouveau_vm_map(vma, new_mem->mm_node); |
| 926 | } else |
Jerome Glisse | dc97b34 | 2011-11-18 11:47:03 -0500 | [diff] [blame] | 927 | if (new_mem && new_mem->mem_type == TTM_PL_TT && |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 928 | nvbo->page_shift == vma->vm->spg_shift) { |
Dave Airlie | 22b33e8 | 2012-04-02 11:53:06 +0100 | [diff] [blame] | 929 | if (((struct nouveau_mem *)new_mem->mm_node)->sg) |
| 930 | nouveau_vm_map_sg_table(vma, 0, new_mem-> |
| 931 | num_pages << PAGE_SHIFT, |
| 932 | new_mem->mm_node); |
| 933 | else |
| 934 | nouveau_vm_map_sg(vma, 0, new_mem-> |
| 935 | num_pages << PAGE_SHIFT, |
| 936 | new_mem->mm_node); |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 937 | } else { |
| 938 | nouveau_vm_unmap(vma); |
| 939 | } |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 940 | } |
| 941 | } |
| 942 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 943 | static int |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 944 | nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem, |
| 945 | struct nouveau_tile_reg **new_tile) |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 946 | { |
| 947 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 948 | struct drm_device *dev = dev_priv->dev; |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 949 | struct nouveau_bo *nvbo = nouveau_bo(bo); |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 950 | u64 offset = new_mem->start << PAGE_SHIFT; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 951 | |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 952 | *new_tile = NULL; |
| 953 | if (new_mem->mem_type != TTM_PL_VRAM) |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 954 | return 0; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 955 | |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 956 | if (dev_priv->card_type >= NV_10) { |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 957 | *new_tile = nv10_mem_set_tiling(dev, offset, new_mem->size, |
Francisco Jerez | a5cf68b | 2010-10-24 16:14:41 +0200 | [diff] [blame] | 958 | nvbo->tile_mode, |
| 959 | nvbo->tile_flags); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 960 | } |
| 961 | |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 962 | return 0; |
| 963 | } |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 964 | |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 965 | static void |
| 966 | nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo, |
| 967 | struct nouveau_tile_reg *new_tile, |
| 968 | struct nouveau_tile_reg **old_tile) |
| 969 | { |
| 970 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); |
| 971 | struct drm_device *dev = dev_priv->dev; |
| 972 | |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 973 | nv10_mem_put_tile_region(dev, *old_tile, bo->sync_obj); |
| 974 | *old_tile = new_tile; |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 975 | } |
| 976 | |
| 977 | static int |
| 978 | nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr, |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 979 | bool no_wait_reserve, bool no_wait_gpu, |
| 980 | struct ttm_mem_reg *new_mem) |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 981 | { |
| 982 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); |
| 983 | struct nouveau_bo *nvbo = nouveau_bo(bo); |
| 984 | struct ttm_mem_reg *old_mem = &bo->mem; |
| 985 | struct nouveau_tile_reg *new_tile = NULL; |
| 986 | int ret = 0; |
| 987 | |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 988 | if (dev_priv->card_type < NV_50) { |
| 989 | ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile); |
| 990 | if (ret) |
| 991 | return ret; |
| 992 | } |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 993 | |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 994 | /* Fake bo copy. */ |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 995 | if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) { |
| 996 | BUG_ON(bo->mem.mm_node != NULL); |
| 997 | bo->mem = *new_mem; |
| 998 | new_mem->mm_node = NULL; |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 999 | goto out; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1000 | } |
| 1001 | |
Ben Skeggs | d1b167e | 2012-05-04 14:01:52 +1000 | [diff] [blame^] | 1002 | /* CPU copy if we have no accelerated method available */ |
| 1003 | if (!dev_priv->ttm.move) { |
Ben Skeggs | b8a6a80 | 2010-08-27 11:55:43 +1000 | [diff] [blame] | 1004 | ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem); |
| 1005 | goto out; |
| 1006 | } |
| 1007 | |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 1008 | /* Hardware assisted copy. */ |
| 1009 | if (new_mem->mem_type == TTM_PL_SYSTEM) |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 1010 | ret = nouveau_bo_move_flipd(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 1011 | else if (old_mem->mem_type == TTM_PL_SYSTEM) |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 1012 | ret = nouveau_bo_move_flips(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 1013 | else |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 1014 | ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem); |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1015 | |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 1016 | if (!ret) |
| 1017 | goto out; |
| 1018 | |
| 1019 | /* Fallback to software copy. */ |
Jerome Glisse | 9d87fa2 | 2010-04-07 10:21:19 +0000 | [diff] [blame] | 1020 | ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem); |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 1021 | |
| 1022 | out: |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 1023 | if (dev_priv->card_type < NV_50) { |
| 1024 | if (ret) |
| 1025 | nouveau_bo_vm_cleanup(bo, NULL, &new_tile); |
| 1026 | else |
| 1027 | nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile); |
| 1028 | } |
Francisco Jerez | a0af9ad | 2009-12-11 16:51:09 +0100 | [diff] [blame] | 1029 | |
| 1030 | return ret; |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1031 | } |
| 1032 | |
| 1033 | static int |
| 1034 | nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp) |
| 1035 | { |
| 1036 | return 0; |
| 1037 | } |
| 1038 | |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 1039 | static int |
| 1040 | nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) |
| 1041 | { |
| 1042 | struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type]; |
| 1043 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev); |
| 1044 | struct drm_device *dev = dev_priv->dev; |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1045 | int ret; |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 1046 | |
| 1047 | mem->bus.addr = NULL; |
| 1048 | mem->bus.offset = 0; |
| 1049 | mem->bus.size = mem->num_pages << PAGE_SHIFT; |
| 1050 | mem->bus.base = 0; |
| 1051 | mem->bus.is_iomem = false; |
| 1052 | if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE)) |
| 1053 | return -EINVAL; |
| 1054 | switch (mem->mem_type) { |
| 1055 | case TTM_PL_SYSTEM: |
| 1056 | /* System memory */ |
| 1057 | return 0; |
| 1058 | case TTM_PL_TT: |
| 1059 | #if __OS_HAS_AGP |
| 1060 | if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) { |
Ben Skeggs | d961db7 | 2010-08-05 10:48:18 +1000 | [diff] [blame] | 1061 | mem->bus.offset = mem->start << PAGE_SHIFT; |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 1062 | mem->bus.base = dev_priv->gart_info.aper_base; |
| 1063 | mem->bus.is_iomem = true; |
| 1064 | } |
| 1065 | #endif |
| 1066 | break; |
| 1067 | case TTM_PL_VRAM: |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1068 | { |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1069 | struct nouveau_mem *node = mem->mm_node; |
Ben Skeggs | 8984e04 | 2010-11-15 11:48:33 +1000 | [diff] [blame] | 1070 | u8 page_shift; |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1071 | |
| 1072 | if (!dev_priv->bar1_vm) { |
| 1073 | mem->bus.offset = mem->start << PAGE_SHIFT; |
| 1074 | mem->bus.base = pci_resource_start(dev->pdev, 1); |
| 1075 | mem->bus.is_iomem = true; |
| 1076 | break; |
| 1077 | } |
| 1078 | |
Ben Skeggs | 2e9733f | 2011-07-02 20:28:49 +1000 | [diff] [blame] | 1079 | if (dev_priv->card_type >= NV_C0) |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1080 | page_shift = node->page_shift; |
Ben Skeggs | 8984e04 | 2010-11-15 11:48:33 +1000 | [diff] [blame] | 1081 | else |
| 1082 | page_shift = 12; |
| 1083 | |
Ben Skeggs | 4c74eb7 | 2010-11-10 14:10:04 +1000 | [diff] [blame] | 1084 | ret = nouveau_vm_get(dev_priv->bar1_vm, mem->bus.size, |
Ben Skeggs | 8984e04 | 2010-11-15 11:48:33 +1000 | [diff] [blame] | 1085 | page_shift, NV_MEM_ACCESS_RW, |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1086 | &node->bar_vma); |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1087 | if (ret) |
| 1088 | return ret; |
| 1089 | |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1090 | nouveau_vm_map(&node->bar_vma, node); |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1091 | if (ret) { |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1092 | nouveau_vm_put(&node->bar_vma); |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1093 | return ret; |
| 1094 | } |
| 1095 | |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1096 | mem->bus.offset = node->bar_vma.offset; |
Ben Skeggs | 8984e04 | 2010-11-15 11:48:33 +1000 | [diff] [blame] | 1097 | if (dev_priv->card_type == NV_50) /*XXX*/ |
| 1098 | mem->bus.offset -= 0x0020000000ULL; |
Jordan Crouse | 01d73a6 | 2010-05-27 13:40:24 -0600 | [diff] [blame] | 1099 | mem->bus.base = pci_resource_start(dev->pdev, 1); |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 1100 | mem->bus.is_iomem = true; |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1101 | } |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 1102 | break; |
| 1103 | default: |
| 1104 | return -EINVAL; |
| 1105 | } |
| 1106 | return 0; |
| 1107 | } |
| 1108 | |
| 1109 | static void |
| 1110 | nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) |
| 1111 | { |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1112 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev); |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1113 | struct nouveau_mem *node = mem->mm_node; |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1114 | |
| 1115 | if (!dev_priv->bar1_vm || mem->mem_type != TTM_PL_VRAM) |
| 1116 | return; |
| 1117 | |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1118 | if (!node->bar_vma.node) |
Ben Skeggs | f869ef8 | 2010-11-15 11:53:16 +1000 | [diff] [blame] | 1119 | return; |
| 1120 | |
Ben Skeggs | d5f4239 | 2011-02-10 12:22:52 +1000 | [diff] [blame] | 1121 | nouveau_vm_unmap(&node->bar_vma); |
| 1122 | nouveau_vm_put(&node->bar_vma); |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 1123 | } |
| 1124 | |
| 1125 | static int |
| 1126 | nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo) |
| 1127 | { |
Ben Skeggs | e1429b4 | 2010-09-10 11:12:25 +1000 | [diff] [blame] | 1128 | struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev); |
| 1129 | struct nouveau_bo *nvbo = nouveau_bo(bo); |
| 1130 | |
| 1131 | /* as long as the bo isn't in vram, and isn't tiled, we've got |
| 1132 | * nothing to do here. |
| 1133 | */ |
| 1134 | if (bo->mem.mem_type != TTM_PL_VRAM) { |
Francisco Jerez | f13b326 | 2010-10-10 06:01:08 +0200 | [diff] [blame] | 1135 | if (dev_priv->card_type < NV_50 || |
| 1136 | !nouveau_bo_tile_layout(nvbo)) |
Ben Skeggs | e1429b4 | 2010-09-10 11:12:25 +1000 | [diff] [blame] | 1137 | return 0; |
| 1138 | } |
| 1139 | |
| 1140 | /* make sure bo is in mappable vram */ |
Ben Skeggs | d961db7 | 2010-08-05 10:48:18 +1000 | [diff] [blame] | 1141 | if (bo->mem.start + bo->mem.num_pages < dev_priv->fb_mappable_pages) |
Ben Skeggs | e1429b4 | 2010-09-10 11:12:25 +1000 | [diff] [blame] | 1142 | return 0; |
| 1143 | |
| 1144 | |
| 1145 | nvbo->placement.fpfn = 0; |
| 1146 | nvbo->placement.lpfn = dev_priv->fb_mappable_pages; |
Dave Airlie | c284815 | 2012-05-18 15:31:12 +0100 | [diff] [blame] | 1147 | nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0); |
Ben Skeggs | 7a45d76 | 2010-11-22 08:50:27 +1000 | [diff] [blame] | 1148 | return nouveau_bo_validate(nvbo, false, true, false); |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 1149 | } |
| 1150 | |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1151 | static int |
| 1152 | nouveau_ttm_tt_populate(struct ttm_tt *ttm) |
| 1153 | { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1154 | struct ttm_dma_tt *ttm_dma = (void *)ttm; |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1155 | struct drm_nouveau_private *dev_priv; |
| 1156 | struct drm_device *dev; |
| 1157 | unsigned i; |
| 1158 | int r; |
Dave Airlie | 22b33e8 | 2012-04-02 11:53:06 +0100 | [diff] [blame] | 1159 | bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1160 | |
| 1161 | if (ttm->state != tt_unpopulated) |
| 1162 | return 0; |
| 1163 | |
Dave Airlie | 22b33e8 | 2012-04-02 11:53:06 +0100 | [diff] [blame] | 1164 | if (slave && ttm->sg) { |
| 1165 | /* make userspace faulting work */ |
| 1166 | drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages, |
| 1167 | ttm_dma->dma_address, ttm->num_pages); |
| 1168 | ttm->state = tt_unbound; |
| 1169 | return 0; |
| 1170 | } |
| 1171 | |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1172 | dev_priv = nouveau_bdev(ttm->bdev); |
| 1173 | dev = dev_priv->dev; |
| 1174 | |
Jerome Glisse | dea7e0a | 2012-01-03 17:37:37 -0500 | [diff] [blame] | 1175 | #if __OS_HAS_AGP |
| 1176 | if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) { |
| 1177 | return ttm_agp_tt_populate(ttm); |
| 1178 | } |
| 1179 | #endif |
| 1180 | |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1181 | #ifdef CONFIG_SWIOTLB |
| 1182 | if (swiotlb_nr_tbl()) { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1183 | return ttm_dma_populate((void *)ttm, dev->dev); |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1184 | } |
| 1185 | #endif |
| 1186 | |
| 1187 | r = ttm_pool_populate(ttm); |
| 1188 | if (r) { |
| 1189 | return r; |
| 1190 | } |
| 1191 | |
| 1192 | for (i = 0; i < ttm->num_pages; i++) { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1193 | ttm_dma->dma_address[i] = pci_map_page(dev->pdev, ttm->pages[i], |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1194 | 0, PAGE_SIZE, |
| 1195 | PCI_DMA_BIDIRECTIONAL); |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1196 | if (pci_dma_mapping_error(dev->pdev, ttm_dma->dma_address[i])) { |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1197 | while (--i) { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1198 | pci_unmap_page(dev->pdev, ttm_dma->dma_address[i], |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1199 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1200 | ttm_dma->dma_address[i] = 0; |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1201 | } |
| 1202 | ttm_pool_unpopulate(ttm); |
| 1203 | return -EFAULT; |
| 1204 | } |
| 1205 | } |
| 1206 | return 0; |
| 1207 | } |
| 1208 | |
| 1209 | static void |
| 1210 | nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm) |
| 1211 | { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1212 | struct ttm_dma_tt *ttm_dma = (void *)ttm; |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1213 | struct drm_nouveau_private *dev_priv; |
| 1214 | struct drm_device *dev; |
| 1215 | unsigned i; |
Dave Airlie | 22b33e8 | 2012-04-02 11:53:06 +0100 | [diff] [blame] | 1216 | bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG); |
| 1217 | |
| 1218 | if (slave) |
| 1219 | return; |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1220 | |
| 1221 | dev_priv = nouveau_bdev(ttm->bdev); |
| 1222 | dev = dev_priv->dev; |
| 1223 | |
Jerome Glisse | dea7e0a | 2012-01-03 17:37:37 -0500 | [diff] [blame] | 1224 | #if __OS_HAS_AGP |
| 1225 | if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) { |
| 1226 | ttm_agp_tt_unpopulate(ttm); |
| 1227 | return; |
| 1228 | } |
| 1229 | #endif |
| 1230 | |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1231 | #ifdef CONFIG_SWIOTLB |
| 1232 | if (swiotlb_nr_tbl()) { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1233 | ttm_dma_unpopulate((void *)ttm, dev->dev); |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1234 | return; |
| 1235 | } |
| 1236 | #endif |
| 1237 | |
| 1238 | for (i = 0; i < ttm->num_pages; i++) { |
Jerome Glisse | 8e7e705 | 2011-11-09 17:15:26 -0500 | [diff] [blame] | 1239 | if (ttm_dma->dma_address[i]) { |
| 1240 | pci_unmap_page(dev->pdev, ttm_dma->dma_address[i], |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1241 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
| 1242 | } |
| 1243 | } |
| 1244 | |
| 1245 | ttm_pool_unpopulate(ttm); |
| 1246 | } |
| 1247 | |
Ben Skeggs | 875ac34 | 2012-04-30 12:51:48 +1000 | [diff] [blame] | 1248 | void |
| 1249 | nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence) |
| 1250 | { |
| 1251 | struct nouveau_fence *old_fence = NULL; |
| 1252 | |
| 1253 | if (likely(fence)) |
| 1254 | nouveau_fence_ref(fence); |
| 1255 | |
| 1256 | spin_lock(&nvbo->bo.bdev->fence_lock); |
| 1257 | old_fence = nvbo->bo.sync_obj; |
| 1258 | nvbo->bo.sync_obj = fence; |
| 1259 | spin_unlock(&nvbo->bo.bdev->fence_lock); |
| 1260 | |
| 1261 | nouveau_fence_unref(&old_fence); |
| 1262 | } |
| 1263 | |
| 1264 | static void |
| 1265 | nouveau_bo_fence_unref(void **sync_obj) |
| 1266 | { |
| 1267 | nouveau_fence_unref((struct nouveau_fence **)sync_obj); |
| 1268 | } |
| 1269 | |
| 1270 | static void * |
| 1271 | nouveau_bo_fence_ref(void *sync_obj) |
| 1272 | { |
| 1273 | return nouveau_fence_ref(sync_obj); |
| 1274 | } |
| 1275 | |
| 1276 | static bool |
| 1277 | nouveau_bo_fence_signalled(void *sync_obj, void *sync_arg) |
| 1278 | { |
Ben Skeggs | d375e7d5 | 2012-04-30 13:30:00 +1000 | [diff] [blame] | 1279 | return nouveau_fence_done(sync_obj); |
Ben Skeggs | 875ac34 | 2012-04-30 12:51:48 +1000 | [diff] [blame] | 1280 | } |
| 1281 | |
| 1282 | static int |
| 1283 | nouveau_bo_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr) |
| 1284 | { |
| 1285 | return nouveau_fence_wait(sync_obj, lazy, intr); |
| 1286 | } |
| 1287 | |
| 1288 | static int |
| 1289 | nouveau_bo_fence_flush(void *sync_obj, void *sync_arg) |
| 1290 | { |
| 1291 | return 0; |
| 1292 | } |
| 1293 | |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1294 | struct ttm_bo_driver nouveau_bo_driver = { |
Jerome Glisse | 649bf3c | 2011-11-01 20:46:13 -0400 | [diff] [blame] | 1295 | .ttm_tt_create = &nouveau_ttm_tt_create, |
Konrad Rzeszutek Wilk | 3230cfc | 2011-10-17 17:14:26 -0400 | [diff] [blame] | 1296 | .ttm_tt_populate = &nouveau_ttm_tt_populate, |
| 1297 | .ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate, |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1298 | .invalidate_caches = nouveau_bo_invalidate_caches, |
| 1299 | .init_mem_type = nouveau_bo_init_mem_type, |
| 1300 | .evict_flags = nouveau_bo_evict_flags, |
Ben Skeggs | a4154bb | 2011-02-10 10:35:16 +1000 | [diff] [blame] | 1301 | .move_notify = nouveau_bo_move_ntfy, |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1302 | .move = nouveau_bo_move, |
| 1303 | .verify_access = nouveau_bo_verify_access, |
Ben Skeggs | 875ac34 | 2012-04-30 12:51:48 +1000 | [diff] [blame] | 1304 | .sync_obj_signaled = nouveau_bo_fence_signalled, |
| 1305 | .sync_obj_wait = nouveau_bo_fence_wait, |
| 1306 | .sync_obj_flush = nouveau_bo_fence_flush, |
| 1307 | .sync_obj_unref = nouveau_bo_fence_unref, |
| 1308 | .sync_obj_ref = nouveau_bo_fence_ref, |
Jerome Glisse | f32f02f | 2010-04-09 14:39:25 +0200 | [diff] [blame] | 1309 | .fault_reserve_notify = &nouveau_ttm_fault_reserve_notify, |
| 1310 | .io_mem_reserve = &nouveau_ttm_io_mem_reserve, |
| 1311 | .io_mem_free = &nouveau_ttm_io_mem_free, |
Ben Skeggs | 6ee7386 | 2009-12-11 19:24:15 +1000 | [diff] [blame] | 1312 | }; |
| 1313 | |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 1314 | struct nouveau_vma * |
| 1315 | nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nouveau_vm *vm) |
| 1316 | { |
| 1317 | struct nouveau_vma *vma; |
| 1318 | list_for_each_entry(vma, &nvbo->vma_list, head) { |
| 1319 | if (vma->vm == vm) |
| 1320 | return vma; |
| 1321 | } |
| 1322 | |
| 1323 | return NULL; |
| 1324 | } |
| 1325 | |
| 1326 | int |
| 1327 | nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm, |
| 1328 | struct nouveau_vma *vma) |
| 1329 | { |
| 1330 | const u32 size = nvbo->bo.mem.num_pages << PAGE_SHIFT; |
| 1331 | struct nouveau_mem *node = nvbo->bo.mem.mm_node; |
| 1332 | int ret; |
| 1333 | |
| 1334 | ret = nouveau_vm_get(vm, size, nvbo->page_shift, |
| 1335 | NV_MEM_ACCESS_RW, vma); |
| 1336 | if (ret) |
| 1337 | return ret; |
| 1338 | |
| 1339 | if (nvbo->bo.mem.mem_type == TTM_PL_VRAM) |
| 1340 | nouveau_vm_map(vma, nvbo->bo.mem.mm_node); |
Dave Airlie | 22b33e8 | 2012-04-02 11:53:06 +0100 | [diff] [blame] | 1341 | else if (nvbo->bo.mem.mem_type == TTM_PL_TT) { |
| 1342 | if (node->sg) |
| 1343 | nouveau_vm_map_sg_table(vma, 0, size, node); |
| 1344 | else |
| 1345 | nouveau_vm_map_sg(vma, 0, size, node); |
| 1346 | } |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 1347 | |
| 1348 | list_add_tail(&vma->head, &nvbo->vma_list); |
Ben Skeggs | 2fd3db6 | 2011-06-07 15:25:12 +1000 | [diff] [blame] | 1349 | vma->refcount = 1; |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 1350 | return 0; |
| 1351 | } |
| 1352 | |
| 1353 | void |
| 1354 | nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nouveau_vma *vma) |
| 1355 | { |
| 1356 | if (vma->node) { |
| 1357 | if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM) { |
| 1358 | spin_lock(&nvbo->bo.bdev->fence_lock); |
Dave Airlie | 1717c0e | 2011-10-27 18:28:37 +0200 | [diff] [blame] | 1359 | ttm_bo_wait(&nvbo->bo, false, false, false); |
Ben Skeggs | fd2871a | 2011-06-06 14:07:04 +1000 | [diff] [blame] | 1360 | spin_unlock(&nvbo->bo.bdev->fence_lock); |
| 1361 | nouveau_vm_unmap(vma); |
| 1362 | } |
| 1363 | |
| 1364 | nouveau_vm_put(vma); |
| 1365 | list_del(&vma->head); |
| 1366 | } |
| 1367 | } |