Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: msi.c |
| 3 | * Purpose: PCI Message Signaled Interrupt (MSI) |
| 4 | * |
| 5 | * Copyright (C) 2003-2004 Intel |
| 6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) |
| 7 | */ |
| 8 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 9 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | #include <linux/mm.h> |
| 11 | #include <linux/irq.h> |
| 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/init.h> |
Paul Gortmaker | 363c75d | 2011-05-27 09:37:25 -0400 | [diff] [blame] | 14 | #include <linux/export.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | #include <linux/ioport.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/pci.h> |
| 17 | #include <linux/proc_fs.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 18 | #include <linux/msi.h> |
Dan Williams | 4fdadeb | 2007-04-26 18:21:38 -0700 | [diff] [blame] | 19 | #include <linux/smp.h> |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 20 | #include <linux/errno.h> |
| 21 | #include <linux/io.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 22 | #include <linux/slab.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
| 24 | #include "pci.h" |
| 25 | #include "msi.h" |
| 26 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | static int pci_msi_enable = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 29 | /* Arch hooks */ |
| 30 | |
Michael Ellerman | 11df1f0 | 2009-01-19 11:31:00 +1100 | [diff] [blame] | 31 | #ifndef arch_msi_check_device |
| 32 | int arch_msi_check_device(struct pci_dev *dev, int nvec, int type) |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 33 | { |
| 34 | return 0; |
| 35 | } |
Michael Ellerman | 11df1f0 | 2009-01-19 11:31:00 +1100 | [diff] [blame] | 36 | #endif |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 37 | |
Michael Ellerman | 11df1f0 | 2009-01-19 11:31:00 +1100 | [diff] [blame] | 38 | #ifndef arch_setup_msi_irqs |
Thomas Gleixner | 1525bf0 | 2010-10-06 16:05:35 -0400 | [diff] [blame] | 39 | # define arch_setup_msi_irqs default_setup_msi_irqs |
| 40 | # define HAVE_DEFAULT_MSI_SETUP_IRQS |
| 41 | #endif |
| 42 | |
| 43 | #ifdef HAVE_DEFAULT_MSI_SETUP_IRQS |
| 44 | int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 45 | { |
| 46 | struct msi_desc *entry; |
| 47 | int ret; |
| 48 | |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 49 | /* |
| 50 | * If an architecture wants to support multiple MSI, it needs to |
| 51 | * override arch_setup_msi_irqs() |
| 52 | */ |
| 53 | if (type == PCI_CAP_ID_MSI && nvec > 1) |
| 54 | return 1; |
| 55 | |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 56 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 57 | ret = arch_setup_msi_irq(dev, entry); |
Michael Ellerman | b5fbf53 | 2009-02-11 22:27:02 +1100 | [diff] [blame] | 58 | if (ret < 0) |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 59 | return ret; |
Michael Ellerman | b5fbf53 | 2009-02-11 22:27:02 +1100 | [diff] [blame] | 60 | if (ret > 0) |
| 61 | return -ENOSPC; |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | return 0; |
| 65 | } |
Michael Ellerman | 11df1f0 | 2009-01-19 11:31:00 +1100 | [diff] [blame] | 66 | #endif |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 67 | |
Michael Ellerman | 11df1f0 | 2009-01-19 11:31:00 +1100 | [diff] [blame] | 68 | #ifndef arch_teardown_msi_irqs |
Thomas Gleixner | 1525bf0 | 2010-10-06 16:05:35 -0400 | [diff] [blame] | 69 | # define arch_teardown_msi_irqs default_teardown_msi_irqs |
| 70 | # define HAVE_DEFAULT_MSI_TEARDOWN_IRQS |
| 71 | #endif |
| 72 | |
| 73 | #ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS |
| 74 | void default_teardown_msi_irqs(struct pci_dev *dev) |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 75 | { |
| 76 | struct msi_desc *entry; |
| 77 | |
| 78 | list_for_each_entry(entry, &dev->msi_list, list) { |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 79 | int i, nvec; |
| 80 | if (entry->irq == 0) |
| 81 | continue; |
| 82 | nvec = 1 << entry->msi_attrib.multiple; |
| 83 | for (i = 0; i < nvec; i++) |
| 84 | arch_teardown_msi_irq(entry->irq + i); |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 85 | } |
| 86 | } |
Michael Ellerman | 11df1f0 | 2009-01-19 11:31:00 +1100 | [diff] [blame] | 87 | #endif |
Adrian Bunk | 6a9e7f2 | 2007-12-11 23:19:41 +0100 | [diff] [blame] | 88 | |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 89 | static void msi_set_enable(struct pci_dev *dev, int pos, int enable) |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 90 | { |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 91 | u16 control; |
| 92 | |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 93 | BUG_ON(!pos); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 94 | |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 95 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); |
| 96 | control &= ~PCI_MSI_FLAGS_ENABLE; |
| 97 | if (enable) |
| 98 | control |= PCI_MSI_FLAGS_ENABLE; |
| 99 | pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); |
Hidetoshi Seto | 5ca5c02 | 2008-05-19 13:48:17 +0900 | [diff] [blame] | 100 | } |
| 101 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 102 | static void msix_set_enable(struct pci_dev *dev, int enable) |
| 103 | { |
| 104 | int pos; |
| 105 | u16 control; |
| 106 | |
| 107 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 108 | if (pos) { |
| 109 | pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); |
| 110 | control &= ~PCI_MSIX_FLAGS_ENABLE; |
| 111 | if (enable) |
| 112 | control |= PCI_MSIX_FLAGS_ENABLE; |
| 113 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
| 114 | } |
| 115 | } |
| 116 | |
Matthew Wilcox | bffac3c | 2009-01-21 19:19:19 -0500 | [diff] [blame] | 117 | static inline __attribute_const__ u32 msi_mask(unsigned x) |
| 118 | { |
Matthew Wilcox | 0b49ec3 | 2009-02-08 20:27:47 -0700 | [diff] [blame] | 119 | /* Don't shift by >= width of type */ |
| 120 | if (x >= 5) |
| 121 | return 0xffffffff; |
| 122 | return (1 << (1 << x)) - 1; |
Matthew Wilcox | bffac3c | 2009-01-21 19:19:19 -0500 | [diff] [blame] | 123 | } |
| 124 | |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 125 | static inline __attribute_const__ u32 msi_capable_mask(u16 control) |
Mitch Williams | 988cbb1 | 2007-03-30 11:54:08 -0700 | [diff] [blame] | 126 | { |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 127 | return msi_mask((control >> 1) & 7); |
| 128 | } |
Mitch Williams | 988cbb1 | 2007-03-30 11:54:08 -0700 | [diff] [blame] | 129 | |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 130 | static inline __attribute_const__ u32 msi_enabled_mask(u16 control) |
| 131 | { |
| 132 | return msi_mask((control >> 4) & 7); |
Mitch Williams | 988cbb1 | 2007-03-30 11:54:08 -0700 | [diff] [blame] | 133 | } |
| 134 | |
Matthew Wilcox | ce6fce4 | 2008-07-25 15:42:58 -0600 | [diff] [blame] | 135 | /* |
| 136 | * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to |
| 137 | * mask all MSI interrupts by clearing the MSI enable bit does not work |
| 138 | * reliably as devices without an INTx disable bit will then generate a |
| 139 | * level IRQ which will never be cleared. |
Matthew Wilcox | ce6fce4 | 2008-07-25 15:42:58 -0600 | [diff] [blame] | 140 | */ |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 141 | static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | { |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 143 | u32 mask_bits = desc->masked; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 145 | if (!desc->msi_attrib.maskbit) |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 146 | return 0; |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 147 | |
| 148 | mask_bits &= ~mask; |
| 149 | mask_bits |= flag; |
| 150 | pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits); |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 151 | |
| 152 | return mask_bits; |
| 153 | } |
| 154 | |
| 155 | static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) |
| 156 | { |
| 157 | desc->masked = __msi_mask_irq(desc, mask, flag); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 158 | } |
| 159 | |
| 160 | /* |
| 161 | * This internal function does not flush PCI writes to the device. |
| 162 | * All users must ensure that they read from the device before either |
| 163 | * assuming that the device state is up to date, or returning out of this |
| 164 | * file. This saves a few milliseconds when initialising devices with lots |
| 165 | * of MSI-X interrupts. |
| 166 | */ |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 167 | static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 168 | { |
| 169 | u32 mask_bits = desc->masked; |
| 170 | unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
Hidetoshi Seto | 2c21fd4 | 2009-06-23 17:40:04 +0900 | [diff] [blame] | 171 | PCI_MSIX_ENTRY_VECTOR_CTRL; |
Sheng Yang | 8d80528 | 2010-11-11 15:46:55 +0800 | [diff] [blame] | 172 | mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; |
| 173 | if (flag) |
| 174 | mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 175 | writel(mask_bits, desc->mask_base + offset); |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 176 | |
| 177 | return mask_bits; |
| 178 | } |
| 179 | |
| 180 | static void msix_mask_irq(struct msi_desc *desc, u32 flag) |
| 181 | { |
| 182 | desc->masked = __msix_mask_irq(desc, flag); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 183 | } |
| 184 | |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 185 | static void msi_set_mask_bit(struct irq_data *data, u32 flag) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 186 | { |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 187 | struct msi_desc *desc = irq_data_get_msi(data); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 188 | |
| 189 | if (desc->msi_attrib.is_msix) { |
| 190 | msix_mask_irq(desc, flag); |
| 191 | readl(desc->mask_base); /* Flush write to device */ |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 192 | } else { |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 193 | unsigned offset = data->irq - desc->dev->irq; |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 194 | msi_mask_irq(desc, 1 << offset, flag << offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | } |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 196 | } |
| 197 | |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 198 | void mask_msi_irq(struct irq_data *data) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 199 | { |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 200 | msi_set_mask_bit(data, 1); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 201 | } |
| 202 | |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 203 | void unmask_msi_irq(struct irq_data *data) |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 204 | { |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 205 | msi_set_mask_bit(data, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | } |
| 207 | |
Thomas Gleixner | 39431ac | 2010-09-28 19:09:51 +0200 | [diff] [blame] | 208 | void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 209 | { |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 210 | BUG_ON(entry->dev->current_state != PCI_D0); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 211 | |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 212 | if (entry->msi_attrib.is_msix) { |
| 213 | void __iomem *base = entry->mask_base + |
| 214 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
| 215 | |
| 216 | msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR); |
| 217 | msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR); |
| 218 | msg->data = readl(base + PCI_MSIX_ENTRY_DATA); |
| 219 | } else { |
| 220 | struct pci_dev *dev = entry->dev; |
| 221 | int pos = entry->msi_attrib.pos; |
| 222 | u16 data; |
| 223 | |
| 224 | pci_read_config_dword(dev, msi_lower_address_reg(pos), |
| 225 | &msg->address_lo); |
| 226 | if (entry->msi_attrib.is_64) { |
| 227 | pci_read_config_dword(dev, msi_upper_address_reg(pos), |
| 228 | &msg->address_hi); |
| 229 | pci_read_config_word(dev, msi_data_reg(pos, 1), &data); |
| 230 | } else { |
| 231 | msg->address_hi = 0; |
| 232 | pci_read_config_word(dev, msi_data_reg(pos, 0), &data); |
| 233 | } |
| 234 | msg->data = data; |
| 235 | } |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 236 | } |
| 237 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 238 | void read_msi_msg(unsigned int irq, struct msi_msg *msg) |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 239 | { |
Thomas Gleixner | dced35a | 2011-03-28 17:49:12 +0200 | [diff] [blame] | 240 | struct msi_desc *entry = irq_get_msi_desc(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 241 | |
Thomas Gleixner | 39431ac | 2010-09-28 19:09:51 +0200 | [diff] [blame] | 242 | __read_msi_msg(entry, msg); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 243 | } |
| 244 | |
Thomas Gleixner | 39431ac | 2010-09-28 19:09:51 +0200 | [diff] [blame] | 245 | void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 246 | { |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 247 | /* Assert that the cache is valid, assuming that |
| 248 | * valid messages are not all-zeroes. */ |
| 249 | BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo | |
| 250 | entry->msg.data)); |
| 251 | |
| 252 | *msg = entry->msg; |
| 253 | } |
| 254 | |
| 255 | void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) |
| 256 | { |
Thomas Gleixner | dced35a | 2011-03-28 17:49:12 +0200 | [diff] [blame] | 257 | struct msi_desc *entry = irq_get_msi_desc(irq); |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 258 | |
Thomas Gleixner | 39431ac | 2010-09-28 19:09:51 +0200 | [diff] [blame] | 259 | __get_cached_msi_msg(entry, msg); |
Ben Hutchings | 30da552 | 2010-07-23 14:56:28 +0100 | [diff] [blame] | 260 | } |
| 261 | |
Thomas Gleixner | 39431ac | 2010-09-28 19:09:51 +0200 | [diff] [blame] | 262 | void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 263 | { |
Ben Hutchings | fcd097f | 2010-06-17 20:16:36 +0100 | [diff] [blame] | 264 | if (entry->dev->current_state != PCI_D0) { |
| 265 | /* Don't touch the hardware now */ |
| 266 | } else if (entry->msi_attrib.is_msix) { |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 267 | void __iomem *base; |
| 268 | base = entry->mask_base + |
| 269 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
| 270 | |
Hidetoshi Seto | 2c21fd4 | 2009-06-23 17:40:04 +0900 | [diff] [blame] | 271 | writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR); |
| 272 | writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR); |
| 273 | writel(msg->data, base + PCI_MSIX_ENTRY_DATA); |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 274 | } else { |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 275 | struct pci_dev *dev = entry->dev; |
| 276 | int pos = entry->msi_attrib.pos; |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 277 | u16 msgctl; |
| 278 | |
| 279 | pci_read_config_word(dev, msi_control_reg(pos), &msgctl); |
| 280 | msgctl &= ~PCI_MSI_FLAGS_QSIZE; |
| 281 | msgctl |= entry->msi_attrib.multiple << 4; |
| 282 | pci_write_config_word(dev, msi_control_reg(pos), msgctl); |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 283 | |
| 284 | pci_write_config_dword(dev, msi_lower_address_reg(pos), |
| 285 | msg->address_lo); |
| 286 | if (entry->msi_attrib.is_64) { |
| 287 | pci_write_config_dword(dev, msi_upper_address_reg(pos), |
| 288 | msg->address_hi); |
| 289 | pci_write_config_word(dev, msi_data_reg(pos, 1), |
| 290 | msg->data); |
| 291 | } else { |
| 292 | pci_write_config_word(dev, msi_data_reg(pos, 0), |
| 293 | msg->data); |
| 294 | } |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 295 | } |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 296 | entry->msg = *msg; |
Eric W. Biederman | 0366f8f | 2006-10-04 02:16:33 -0700 | [diff] [blame] | 297 | } |
| 298 | |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 299 | void write_msi_msg(unsigned int irq, struct msi_msg *msg) |
| 300 | { |
Thomas Gleixner | dced35a | 2011-03-28 17:49:12 +0200 | [diff] [blame] | 301 | struct msi_desc *entry = irq_get_msi_desc(irq); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 302 | |
Thomas Gleixner | 39431ac | 2010-09-28 19:09:51 +0200 | [diff] [blame] | 303 | __write_msi_msg(entry, msg); |
Yinghai Lu | 3145e94 | 2008-12-05 18:58:34 -0800 | [diff] [blame] | 304 | } |
| 305 | |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 306 | static void free_msi_irqs(struct pci_dev *dev) |
| 307 | { |
| 308 | struct msi_desc *entry, *tmp; |
| 309 | |
| 310 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 311 | int i, nvec; |
| 312 | if (!entry->irq) |
| 313 | continue; |
| 314 | nvec = 1 << entry->msi_attrib.multiple; |
| 315 | for (i = 0; i < nvec; i++) |
| 316 | BUG_ON(irq_has_action(entry->irq + i)); |
| 317 | } |
| 318 | |
| 319 | arch_teardown_msi_irqs(dev); |
| 320 | |
| 321 | list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { |
| 322 | if (entry->msi_attrib.is_msix) { |
| 323 | if (list_is_last(&entry->list, &dev->msi_list)) |
| 324 | iounmap(entry->mask_base); |
| 325 | } |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 326 | kobject_del(&entry->kobj); |
| 327 | kobject_put(&entry->kobj); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 328 | list_del(&entry->list); |
| 329 | kfree(entry); |
| 330 | } |
| 331 | } |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 332 | |
Matthew Wilcox | 379f532 | 2009-03-17 08:54:07 -0400 | [diff] [blame] | 333 | static struct msi_desc *alloc_msi_entry(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 334 | { |
Matthew Wilcox | 379f532 | 2009-03-17 08:54:07 -0400 | [diff] [blame] | 335 | struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL); |
| 336 | if (!desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 337 | return NULL; |
| 338 | |
Matthew Wilcox | 379f532 | 2009-03-17 08:54:07 -0400 | [diff] [blame] | 339 | INIT_LIST_HEAD(&desc->list); |
| 340 | desc->dev = dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | |
Matthew Wilcox | 379f532 | 2009-03-17 08:54:07 -0400 | [diff] [blame] | 342 | return desc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | } |
| 344 | |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 345 | static void pci_intx_for_msi(struct pci_dev *dev, int enable) |
| 346 | { |
| 347 | if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG)) |
| 348 | pci_intx(dev, enable); |
| 349 | } |
| 350 | |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 351 | static void __pci_restore_msi_state(struct pci_dev *dev) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 352 | { |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 353 | int pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 354 | u16 control; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 355 | struct msi_desc *entry; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 356 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 357 | if (!dev->msi_enabled) |
| 358 | return; |
| 359 | |
Thomas Gleixner | dced35a | 2011-03-28 17:49:12 +0200 | [diff] [blame] | 360 | entry = irq_get_msi_desc(dev->irq); |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 361 | pos = entry->msi_attrib.pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 362 | |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 363 | pci_intx_for_msi(dev, 0); |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 364 | msi_set_enable(dev, pos, 0); |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 365 | write_msi_msg(dev->irq, &entry->msg); |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 366 | |
| 367 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 368 | msi_mask_irq(entry, msi_capable_mask(control), entry->masked); |
Jesse Barnes | abad2ec | 2008-08-07 08:52:37 -0700 | [diff] [blame] | 369 | control &= ~PCI_MSI_FLAGS_QSIZE; |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 370 | control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 371 | pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 372 | } |
| 373 | |
| 374 | static void __pci_restore_msix_state(struct pci_dev *dev) |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 375 | { |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 376 | int pos; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 377 | struct msi_desc *entry; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 378 | u16 control; |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 379 | |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 380 | if (!dev->msix_enabled) |
| 381 | return; |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 382 | BUG_ON(list_empty(&dev->msi_list)); |
Hidetoshi Seto | 9cc8d54 | 2009-08-06 11:32:04 +0900 | [diff] [blame] | 383 | entry = list_first_entry(&dev->msi_list, struct msi_desc, list); |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 384 | pos = entry->msi_attrib.pos; |
| 385 | pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 386 | |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 387 | /* route the table */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 388 | pci_intx_for_msi(dev, 0); |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 389 | control |= PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL; |
| 390 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 391 | |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 392 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 393 | write_msi_msg(entry->irq, &entry->msg); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 394 | msix_mask_irq(entry, entry->masked); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 395 | } |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 396 | |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 397 | control &= ~PCI_MSIX_FLAGS_MASKALL; |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 398 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 399 | } |
Michael Ellerman | 8fed4b6 | 2007-01-25 19:34:08 +1100 | [diff] [blame] | 400 | |
| 401 | void pci_restore_msi_state(struct pci_dev *dev) |
| 402 | { |
| 403 | __pci_restore_msi_state(dev); |
| 404 | __pci_restore_msix_state(dev); |
| 405 | } |
Linas Vepstas | 94688cf | 2007-11-07 15:43:59 -0600 | [diff] [blame] | 406 | EXPORT_SYMBOL_GPL(pci_restore_msi_state); |
Shaohua Li | 41017f0 | 2006-02-08 17:11:38 +0800 | [diff] [blame] | 407 | |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 408 | |
| 409 | #define to_msi_attr(obj) container_of(obj, struct msi_attribute, attr) |
| 410 | #define to_msi_desc(obj) container_of(obj, struct msi_desc, kobj) |
| 411 | |
| 412 | struct msi_attribute { |
| 413 | struct attribute attr; |
| 414 | ssize_t (*show)(struct msi_desc *entry, struct msi_attribute *attr, |
| 415 | char *buf); |
| 416 | ssize_t (*store)(struct msi_desc *entry, struct msi_attribute *attr, |
| 417 | const char *buf, size_t count); |
| 418 | }; |
| 419 | |
| 420 | static ssize_t show_msi_mode(struct msi_desc *entry, struct msi_attribute *atr, |
| 421 | char *buf) |
| 422 | { |
| 423 | return sprintf(buf, "%s\n", entry->msi_attrib.is_msix ? "msix" : "msi"); |
| 424 | } |
| 425 | |
| 426 | static ssize_t msi_irq_attr_show(struct kobject *kobj, |
| 427 | struct attribute *attr, char *buf) |
| 428 | { |
| 429 | struct msi_attribute *attribute = to_msi_attr(attr); |
| 430 | struct msi_desc *entry = to_msi_desc(kobj); |
| 431 | |
| 432 | if (!attribute->show) |
| 433 | return -EIO; |
| 434 | |
| 435 | return attribute->show(entry, attribute, buf); |
| 436 | } |
| 437 | |
| 438 | static const struct sysfs_ops msi_irq_sysfs_ops = { |
| 439 | .show = msi_irq_attr_show, |
| 440 | }; |
| 441 | |
| 442 | static struct msi_attribute mode_attribute = |
| 443 | __ATTR(mode, S_IRUGO, show_msi_mode, NULL); |
| 444 | |
| 445 | |
| 446 | struct attribute *msi_irq_default_attrs[] = { |
| 447 | &mode_attribute.attr, |
| 448 | NULL |
| 449 | }; |
| 450 | |
| 451 | void msi_kobj_release(struct kobject *kobj) |
| 452 | { |
| 453 | struct msi_desc *entry = to_msi_desc(kobj); |
| 454 | |
| 455 | pci_dev_put(entry->dev); |
| 456 | } |
| 457 | |
| 458 | static struct kobj_type msi_irq_ktype = { |
| 459 | .release = msi_kobj_release, |
| 460 | .sysfs_ops = &msi_irq_sysfs_ops, |
| 461 | .default_attrs = msi_irq_default_attrs, |
| 462 | }; |
| 463 | |
| 464 | static int populate_msi_sysfs(struct pci_dev *pdev) |
| 465 | { |
| 466 | struct msi_desc *entry; |
| 467 | struct kobject *kobj; |
| 468 | int ret; |
| 469 | int count = 0; |
| 470 | |
| 471 | pdev->msi_kset = kset_create_and_add("msi_irqs", NULL, &pdev->dev.kobj); |
| 472 | if (!pdev->msi_kset) |
| 473 | return -ENOMEM; |
| 474 | |
| 475 | list_for_each_entry(entry, &pdev->msi_list, list) { |
| 476 | kobj = &entry->kobj; |
| 477 | kobj->kset = pdev->msi_kset; |
| 478 | pci_dev_get(pdev); |
| 479 | ret = kobject_init_and_add(kobj, &msi_irq_ktype, NULL, |
| 480 | "%u", entry->irq); |
| 481 | if (ret) |
| 482 | goto out_unroll; |
| 483 | |
| 484 | count++; |
| 485 | } |
| 486 | |
| 487 | return 0; |
| 488 | |
| 489 | out_unroll: |
| 490 | list_for_each_entry(entry, &pdev->msi_list, list) { |
| 491 | if (!count) |
| 492 | break; |
| 493 | kobject_del(&entry->kobj); |
| 494 | kobject_put(&entry->kobj); |
| 495 | count--; |
| 496 | } |
| 497 | return ret; |
| 498 | } |
| 499 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | /** |
| 501 | * msi_capability_init - configure device's MSI capability structure |
| 502 | * @dev: pointer to the pci_dev data structure of MSI device function |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 503 | * @nvec: number of interrupts to allocate |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | * |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 505 | * Setup the MSI capability structure of the device with the requested |
| 506 | * number of interrupts. A return value of zero indicates the successful |
| 507 | * setup of an entry with the new MSI irq. A negative return value indicates |
| 508 | * an error, and a positive return value indicates the number of interrupts |
| 509 | * which could have been allocated. |
| 510 | */ |
| 511 | static int msi_capability_init(struct pci_dev *dev, int nvec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | { |
| 513 | struct msi_desc *entry; |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 514 | int pos, ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | u16 control; |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 516 | unsigned mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 518 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 519 | msi_set_enable(dev, pos, 0); /* Disable MSI during set up */ |
| 520 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 521 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 522 | /* MSI Entry Initialization */ |
Matthew Wilcox | 379f532 | 2009-03-17 08:54:07 -0400 | [diff] [blame] | 523 | entry = alloc_msi_entry(dev); |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 524 | if (!entry) |
| 525 | return -ENOMEM; |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 526 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 527 | entry->msi_attrib.is_msix = 0; |
| 528 | entry->msi_attrib.is_64 = is_64bit_address(control); |
| 529 | entry->msi_attrib.entry_nr = 0; |
| 530 | entry->msi_attrib.maskbit = is_mask_bit_support(control); |
| 531 | entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ |
| 532 | entry->msi_attrib.pos = pos; |
Hidetoshi Seto | 0db29af | 2008-12-24 17:27:04 +0900 | [diff] [blame] | 533 | |
Hidetoshi Seto | 67b5db6 | 2009-04-20 10:54:59 +0900 | [diff] [blame] | 534 | entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 535 | /* All MSIs are unmasked by default, Mask them all */ |
| 536 | if (entry->msi_attrib.maskbit) |
| 537 | pci_read_config_dword(dev, entry->mask_pos, &entry->masked); |
| 538 | mask = msi_capable_mask(control); |
| 539 | msi_mask_irq(entry, mask, mask); |
| 540 | |
Eric W. Biederman | 0dd11f9 | 2007-06-01 00:46:32 -0700 | [diff] [blame] | 541 | list_add_tail(&entry->list, &dev->msi_list); |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 542 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | /* Configure MSI capability structure */ |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 544 | ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 545 | if (ret) { |
Hidetoshi Seto | 7ba1930 | 2009-06-23 17:39:27 +0900 | [diff] [blame] | 546 | msi_mask_irq(entry, mask, ~mask); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 547 | free_msi_irqs(dev); |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 548 | return ret; |
Mark Maule | fd58e55 | 2006-04-10 21:17:48 -0500 | [diff] [blame] | 549 | } |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 550 | |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 551 | ret = populate_msi_sysfs(dev); |
| 552 | if (ret) { |
| 553 | msi_mask_irq(entry, mask, ~mask); |
| 554 | free_msi_irqs(dev); |
| 555 | return ret; |
| 556 | } |
| 557 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | /* Set MSI enabled bits */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 559 | pci_intx_for_msi(dev, 0); |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 560 | msi_set_enable(dev, pos, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 561 | dev->msi_enabled = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 562 | |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 563 | dev->irq = entry->irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 564 | return 0; |
| 565 | } |
| 566 | |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 567 | static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos, |
| 568 | unsigned nr_entries) |
| 569 | { |
Kenji Kaneshige | 4302e0f | 2010-06-17 10:42:44 +0900 | [diff] [blame] | 570 | resource_size_t phys_addr; |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 571 | u32 table_offset; |
| 572 | u8 bir; |
| 573 | |
| 574 | pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset); |
| 575 | bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); |
| 576 | table_offset &= ~PCI_MSIX_FLAGS_BIRMASK; |
| 577 | phys_addr = pci_resource_start(dev, bir) + table_offset; |
| 578 | |
| 579 | return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); |
| 580 | } |
| 581 | |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 582 | static int msix_setup_entries(struct pci_dev *dev, unsigned pos, |
| 583 | void __iomem *base, struct msix_entry *entries, |
| 584 | int nvec) |
| 585 | { |
| 586 | struct msi_desc *entry; |
| 587 | int i; |
| 588 | |
| 589 | for (i = 0; i < nvec; i++) { |
| 590 | entry = alloc_msi_entry(dev); |
| 591 | if (!entry) { |
| 592 | if (!i) |
| 593 | iounmap(base); |
| 594 | else |
| 595 | free_msi_irqs(dev); |
| 596 | /* No enough memory. Don't try again */ |
| 597 | return -ENOMEM; |
| 598 | } |
| 599 | |
| 600 | entry->msi_attrib.is_msix = 1; |
| 601 | entry->msi_attrib.is_64 = 1; |
| 602 | entry->msi_attrib.entry_nr = entries[i].entry; |
| 603 | entry->msi_attrib.default_irq = dev->irq; |
| 604 | entry->msi_attrib.pos = pos; |
| 605 | entry->mask_base = base; |
| 606 | |
| 607 | list_add_tail(&entry->list, &dev->msi_list); |
| 608 | } |
| 609 | |
| 610 | return 0; |
| 611 | } |
| 612 | |
Hidetoshi Seto | 75cb342 | 2009-08-06 11:35:10 +0900 | [diff] [blame] | 613 | static void msix_program_entries(struct pci_dev *dev, |
| 614 | struct msix_entry *entries) |
| 615 | { |
| 616 | struct msi_desc *entry; |
| 617 | int i = 0; |
| 618 | |
| 619 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 620 | int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE + |
| 621 | PCI_MSIX_ENTRY_VECTOR_CTRL; |
| 622 | |
| 623 | entries[i].vector = entry->irq; |
Thomas Gleixner | dced35a | 2011-03-28 17:49:12 +0200 | [diff] [blame] | 624 | irq_set_msi_desc(entry->irq, entry); |
Hidetoshi Seto | 75cb342 | 2009-08-06 11:35:10 +0900 | [diff] [blame] | 625 | entry->masked = readl(entry->mask_base + offset); |
| 626 | msix_mask_irq(entry, 1); |
| 627 | i++; |
| 628 | } |
| 629 | } |
| 630 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | /** |
| 632 | * msix_capability_init - configure device's MSI-X capability |
| 633 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Randy Dunlap | 8f7020d | 2005-10-23 11:57:38 -0700 | [diff] [blame] | 634 | * @entries: pointer to an array of struct msix_entry entries |
| 635 | * @nvec: number of @entries |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 636 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 637 | * Setup the MSI-X capability structure of device function with a |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 638 | * single MSI-X irq. A return of zero indicates the successful setup of |
| 639 | * requested MSI-X entries with allocated irqs or non-zero for otherwise. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | **/ |
| 641 | static int msix_capability_init(struct pci_dev *dev, |
| 642 | struct msix_entry *entries, int nvec) |
| 643 | { |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 644 | int pos, ret; |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 645 | u16 control; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | void __iomem *base; |
| 647 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 648 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 649 | pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); |
| 650 | |
| 651 | /* Ensure MSI-X is disabled while it is set up */ |
| 652 | control &= ~PCI_MSIX_FLAGS_ENABLE; |
| 653 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
| 654 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | /* Request & Map MSI-X table region */ |
Hidetoshi Seto | 5a05a9d | 2009-08-06 11:34:34 +0900 | [diff] [blame] | 656 | base = msix_map_region(dev, pos, multi_msix_capable(control)); |
| 657 | if (!base) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | return -ENOMEM; |
| 659 | |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 660 | ret = msix_setup_entries(dev, pos, base, entries, nvec); |
| 661 | if (ret) |
| 662 | return ret; |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 663 | |
| 664 | ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 665 | if (ret) |
| 666 | goto error; |
Michael Ellerman | 9c83133 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 667 | |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 668 | /* |
| 669 | * Some devices require MSI-X to be enabled before we can touch the |
| 670 | * MSI-X registers. We need to mask all the vectors to prevent |
| 671 | * interrupts coming in before they're fully set up. |
| 672 | */ |
| 673 | control |= PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE; |
| 674 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
| 675 | |
Hidetoshi Seto | 75cb342 | 2009-08-06 11:35:10 +0900 | [diff] [blame] | 676 | msix_program_entries(dev, entries); |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 677 | |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 678 | ret = populate_msi_sysfs(dev); |
| 679 | if (ret) { |
| 680 | ret = 0; |
| 681 | goto error; |
| 682 | } |
| 683 | |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 684 | /* Set MSI-X enabled bits and unmask the function */ |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 685 | pci_intx_for_msi(dev, 0); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 686 | dev->msix_enabled = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 687 | |
Matthew Wilcox | f598282 | 2009-06-18 19:15:59 -0700 | [diff] [blame] | 688 | control &= ~PCI_MSIX_FLAGS_MASKALL; |
| 689 | pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); |
Matthew Wilcox | 8d18101 | 2009-05-08 07:13:33 -0600 | [diff] [blame] | 690 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | return 0; |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 692 | |
| 693 | error: |
| 694 | if (ret < 0) { |
| 695 | /* |
| 696 | * If we had some success, report the number of irqs |
| 697 | * we succeeded in setting up. |
| 698 | */ |
Hidetoshi Seto | d9d7070 | 2009-08-06 11:35:48 +0900 | [diff] [blame] | 699 | struct msi_desc *entry; |
Hidetoshi Seto | 583871d | 2009-08-06 11:33:39 +0900 | [diff] [blame] | 700 | int avail = 0; |
| 701 | |
| 702 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 703 | if (entry->irq != 0) |
| 704 | avail++; |
| 705 | } |
| 706 | if (avail != 0) |
| 707 | ret = avail; |
| 708 | } |
| 709 | |
| 710 | free_msi_irqs(dev); |
| 711 | |
| 712 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 713 | } |
| 714 | |
| 715 | /** |
Michael Ellerman | 17bbc12 | 2007-04-05 17:19:07 +1000 | [diff] [blame] | 716 | * pci_msi_check_device - check whether MSI may be enabled on a device |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 717 | * @dev: pointer to the pci_dev data structure of MSI device function |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 718 | * @nvec: how many MSIs have been requested ? |
Michael Ellerman | b1e2303 | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 719 | * @type: are we checking for MSI or MSI-X ? |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 720 | * |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 721 | * Look at global flags, the device itself, and its parent busses |
Michael Ellerman | 17bbc12 | 2007-04-05 17:19:07 +1000 | [diff] [blame] | 722 | * to determine if MSI/-X are supported for the device. If MSI/-X is |
| 723 | * supported return 0, else return an error code. |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 724 | **/ |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 725 | static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type) |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 726 | { |
| 727 | struct pci_bus *bus; |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 728 | int ret; |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 729 | |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 730 | /* MSI must be globally enabled and supported by the device */ |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 731 | if (!pci_msi_enable || !dev || dev->no_msi) |
| 732 | return -EINVAL; |
| 733 | |
Michael Ellerman | 314e77b | 2007-04-05 17:19:12 +1000 | [diff] [blame] | 734 | /* |
| 735 | * You can't ask to have 0 or less MSIs configured. |
| 736 | * a) it's stupid .. |
| 737 | * b) the list manipulation code assumes nvec >= 1. |
| 738 | */ |
| 739 | if (nvec < 1) |
| 740 | return -ERANGE; |
| 741 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 742 | /* |
| 743 | * Any bridge which does NOT route MSI transactions from its |
| 744 | * secondary bus to its primary bus must set NO_MSI flag on |
Brice Goglin | 0306ebf | 2006-10-05 10:24:31 +0200 | [diff] [blame] | 745 | * the secondary pci_bus. |
| 746 | * We expect only arch-specific PCI host bus controller driver |
| 747 | * or quirks for specific PCI bridges to be setting NO_MSI. |
| 748 | */ |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 749 | for (bus = dev->bus; bus; bus = bus->parent) |
| 750 | if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) |
| 751 | return -EINVAL; |
| 752 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 753 | ret = arch_msi_check_device(dev, nvec, type); |
| 754 | if (ret) |
| 755 | return ret; |
| 756 | |
Michael Ellerman | b1e2303 | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 757 | if (!pci_find_capability(dev, type)) |
| 758 | return -EINVAL; |
| 759 | |
Brice Goglin | 24334a1 | 2006-08-31 01:55:07 -0400 | [diff] [blame] | 760 | return 0; |
| 761 | } |
| 762 | |
| 763 | /** |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 764 | * pci_enable_msi_block - configure device's MSI capability structure |
| 765 | * @dev: device to configure |
| 766 | * @nvec: number of interrupts to configure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 767 | * |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 768 | * Allocate IRQs for a device with the MSI capability. |
| 769 | * This function returns a negative errno if an error occurs. If it |
| 770 | * is unable to allocate the number of interrupts requested, it returns |
| 771 | * the number of interrupts it might be able to allocate. If it successfully |
| 772 | * allocates at least the number of interrupts requested, it returns 0 and |
| 773 | * updates the @dev's irq member to the lowest new interrupt number; the |
| 774 | * other interrupt numbers allocated to this device are consecutive. |
| 775 | */ |
| 776 | int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | { |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 778 | int status, pos, maxvec; |
| 779 | u16 msgctl; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 780 | |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 781 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 782 | if (!pos) |
| 783 | return -EINVAL; |
| 784 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl); |
| 785 | maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); |
| 786 | if (nvec > maxvec) |
| 787 | return maxvec; |
| 788 | |
| 789 | status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI); |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 790 | if (status) |
| 791 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 792 | |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 793 | WARN_ON(!!dev->msi_enabled); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 795 | /* Check whether driver already requested MSI-X irqs */ |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 796 | if (dev->msix_enabled) { |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 797 | dev_info(&dev->dev, "can't enable MSI " |
| 798 | "(MSI-X already enabled)\n"); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 799 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | } |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 801 | |
| 802 | status = msi_capability_init(dev, nvec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 803 | return status; |
| 804 | } |
Matthew Wilcox | 1c8d7b0 | 2009-03-17 08:54:10 -0400 | [diff] [blame] | 805 | EXPORT_SYMBOL(pci_enable_msi_block); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 806 | |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 807 | void pci_msi_shutdown(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 808 | { |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 809 | struct msi_desc *desc; |
| 810 | u32 mask; |
| 811 | u16 ctrl; |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 812 | unsigned pos; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | |
Michael Ellerman | 128bc5f | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 814 | if (!pci_msi_enable || !dev || !dev->msi_enabled) |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 815 | return; |
| 816 | |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 817 | BUG_ON(list_empty(&dev->msi_list)); |
| 818 | desc = list_first_entry(&dev->msi_list, struct msi_desc, list); |
| 819 | pos = desc->msi_attrib.pos; |
| 820 | |
| 821 | msi_set_enable(dev, pos, 0); |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 822 | pci_intx_for_msi(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 823 | dev->msi_enabled = 0; |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 824 | |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 825 | /* Return the device with MSI unmasked as initial states */ |
Matthew Wilcox | 110828c | 2009-06-16 06:31:45 -0600 | [diff] [blame] | 826 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &ctrl); |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 827 | mask = msi_capable_mask(ctrl); |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 828 | /* Keep cached state to be restored */ |
| 829 | __msi_mask_irq(desc, mask, ~mask); |
Michael Ellerman | e387b9e | 2007-03-22 21:51:27 +1100 | [diff] [blame] | 830 | |
| 831 | /* Restore dev->irq to its default pin-assertion irq */ |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 832 | dev->irq = desc->msi_attrib.default_irq; |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 833 | } |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 834 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 835 | void pci_disable_msi(struct pci_dev *dev) |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 836 | { |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 837 | if (!pci_msi_enable || !dev || !dev->msi_enabled) |
| 838 | return; |
| 839 | |
| 840 | pci_msi_shutdown(dev); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 841 | free_msi_irqs(dev); |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 842 | kset_unregister(dev->msi_kset); |
| 843 | dev->msi_kset = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 844 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 845 | EXPORT_SYMBOL(pci_disable_msi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 847 | /** |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 848 | * pci_msix_table_size - return the number of device's MSI-X table entries |
| 849 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
| 850 | */ |
| 851 | int pci_msix_table_size(struct pci_dev *dev) |
| 852 | { |
| 853 | int pos; |
| 854 | u16 control; |
| 855 | |
| 856 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); |
| 857 | if (!pos) |
| 858 | return 0; |
| 859 | |
| 860 | pci_read_config_word(dev, msi_control_reg(pos), &control); |
| 861 | return multi_msix_capable(control); |
| 862 | } |
| 863 | |
| 864 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | * pci_enable_msix - configure device's MSI-X capability structure |
| 866 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
Greg Kroah-Hartman | 70549ad | 2005-06-06 23:07:46 -0700 | [diff] [blame] | 867 | * @entries: pointer to an array of MSI-X entries |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 868 | * @nvec: number of MSI-X irqs requested for allocation by device driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 869 | * |
| 870 | * Setup the MSI-X capability structure of device function with the number |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 871 | * of requested irqs upon its software driver call to request for |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | * MSI-X mode enabled on its hardware device function. A return of zero |
| 873 | * indicates the successful configuration of MSI-X capability structure |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 874 | * with new allocated MSI-X irqs. A return of < 0 indicates a failure. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 875 | * Or a return of > 0 indicates that driver request is exceeding the number |
Michael S. Tsirkin | 57fbf52 | 2009-05-07 11:28:41 +0300 | [diff] [blame] | 876 | * of irqs or MSI-X vectors available. Driver should use the returned value to |
| 877 | * re-send its request. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 878 | **/ |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 879 | int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | { |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 881 | int status, nr_entries; |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 882 | int i, j; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 884 | if (!entries) |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 885 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 886 | |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 887 | status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX); |
| 888 | if (status) |
| 889 | return status; |
| 890 | |
Rafael J. Wysocki | a52e2e3 | 2009-01-24 00:21:14 +0100 | [diff] [blame] | 891 | nr_entries = pci_msix_table_size(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 892 | if (nvec > nr_entries) |
Michael S. Tsirkin | 57fbf52 | 2009-05-07 11:28:41 +0300 | [diff] [blame] | 893 | return nr_entries; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | |
| 895 | /* Check for any invalid entries */ |
| 896 | for (i = 0; i < nvec; i++) { |
| 897 | if (entries[i].entry >= nr_entries) |
| 898 | return -EINVAL; /* invalid entry */ |
| 899 | for (j = i + 1; j < nvec; j++) { |
| 900 | if (entries[i].entry == entries[j].entry) |
| 901 | return -EINVAL; /* duplicate entry */ |
| 902 | } |
| 903 | } |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 904 | WARN_ON(!!dev->msix_enabled); |
Eric W. Biederman | 7bd007e | 2006-10-04 02:16:31 -0700 | [diff] [blame] | 905 | |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 906 | /* Check whether driver already requested for MSI irq */ |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 907 | if (dev->msi_enabled) { |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 908 | dev_info(&dev->dev, "can't enable MSI-X " |
| 909 | "(MSI IRQ already assigned)\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 910 | return -EINVAL; |
| 911 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 912 | status = msix_capability_init(dev, entries, nvec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 913 | return status; |
| 914 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 915 | EXPORT_SYMBOL(pci_enable_msix); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 916 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 917 | void pci_msix_shutdown(struct pci_dev *dev) |
Michael Ellerman | fc4afc7 | 2007-03-22 21:51:33 +1100 | [diff] [blame] | 918 | { |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 919 | struct msi_desc *entry; |
| 920 | |
Michael Ellerman | 128bc5f | 2007-03-22 21:51:39 +1100 | [diff] [blame] | 921 | if (!pci_msi_enable || !dev || !dev->msix_enabled) |
Eric W. Biederman | ded86d8 | 2007-01-28 12:42:52 -0700 | [diff] [blame] | 922 | return; |
| 923 | |
Hidetoshi Seto | 12abb8b | 2009-06-24 12:08:09 +0900 | [diff] [blame] | 924 | /* Return the device with MSI-X masked as initial states */ |
| 925 | list_for_each_entry(entry, &dev->msi_list, list) { |
| 926 | /* Keep cached states to be restored */ |
| 927 | __msix_mask_irq(entry, 1); |
| 928 | } |
| 929 | |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 930 | msix_set_enable(dev, 0); |
David Miller | ba698ad | 2007-10-25 01:16:30 -0700 | [diff] [blame] | 931 | pci_intx_for_msi(dev, 1); |
Eric W. Biederman | b1cbf4e | 2007-03-05 00:30:10 -0800 | [diff] [blame] | 932 | dev->msix_enabled = 0; |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 933 | } |
Hidetoshi Seto | c901851 | 2009-08-06 11:31:27 +0900 | [diff] [blame] | 934 | |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 935 | void pci_disable_msix(struct pci_dev *dev) |
Yinghai Lu | d52877c | 2008-04-23 14:58:09 -0700 | [diff] [blame] | 936 | { |
| 937 | if (!pci_msi_enable || !dev || !dev->msix_enabled) |
| 938 | return; |
| 939 | |
| 940 | pci_msix_shutdown(dev); |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 941 | free_msi_irqs(dev); |
Neil Horman | da8d1c8 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 942 | kset_unregister(dev->msi_kset); |
| 943 | dev->msi_kset = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 944 | } |
Michael Ellerman | 4cc086f | 2007-03-22 21:51:34 +1100 | [diff] [blame] | 945 | EXPORT_SYMBOL(pci_disable_msix); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 946 | |
| 947 | /** |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 948 | * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | * @dev: pointer to the pci_dev data structure of MSI(X) device function |
| 950 | * |
Steven Cole | eaae4b3 | 2005-05-03 18:38:30 -0600 | [diff] [blame] | 951 | * Being called during hotplug remove, from which the device function |
Eric W. Biederman | 1ce0337 | 2006-10-04 02:16:41 -0700 | [diff] [blame] | 952 | * is hot-removed. All previous assigned MSI/MSI-X irqs, if |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 953 | * allocated for this device function, are reclaimed to unused state, |
| 954 | * which may be used later on. |
| 955 | **/ |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 956 | void msi_remove_pci_irq_vectors(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 957 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 958 | if (!pci_msi_enable || !dev) |
Hidetoshi Seto | 500559a | 2009-08-10 10:14:15 +0900 | [diff] [blame] | 959 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 960 | |
Hidetoshi Seto | f56e448 | 2009-08-06 11:32:51 +0900 | [diff] [blame] | 961 | if (dev->msi_enabled || dev->msix_enabled) |
| 962 | free_msi_irqs(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 963 | } |
| 964 | |
Matthew Wilcox | 309e57d | 2006-03-05 22:33:34 -0700 | [diff] [blame] | 965 | void pci_no_msi(void) |
| 966 | { |
| 967 | pci_msi_enable = 0; |
| 968 | } |
Michael Ellerman | c9953a7 | 2007-04-05 17:19:08 +1000 | [diff] [blame] | 969 | |
Andrew Patterson | 07ae95f | 2008-11-10 15:31:05 -0700 | [diff] [blame] | 970 | /** |
| 971 | * pci_msi_enabled - is MSI enabled? |
| 972 | * |
| 973 | * Returns true if MSI has not been disabled by the command-line option |
| 974 | * pci=nomsi. |
| 975 | **/ |
| 976 | int pci_msi_enabled(void) |
| 977 | { |
| 978 | return pci_msi_enable; |
| 979 | } |
| 980 | EXPORT_SYMBOL(pci_msi_enabled); |
| 981 | |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 982 | void pci_msi_init_pci_dev(struct pci_dev *dev) |
| 983 | { |
Eric W. Biederman | d5dea7d | 2011-10-17 11:46:06 -0700 | [diff] [blame^] | 984 | int pos; |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 985 | INIT_LIST_HEAD(&dev->msi_list); |
Eric W. Biederman | d5dea7d | 2011-10-17 11:46:06 -0700 | [diff] [blame^] | 986 | |
| 987 | /* Disable the msi hardware to avoid screaming interrupts |
| 988 | * during boot. This is the power on reset default so |
| 989 | * usually this should be a noop. |
| 990 | */ |
| 991 | pos = pci_find_capability(dev, PCI_CAP_ID_MSI); |
| 992 | if (pos) |
| 993 | msi_set_enable(dev, pos, 0); |
| 994 | msix_set_enable(dev, 0); |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 995 | } |