Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Intel IO-APIC support for multi-Pentium hosts. |
| 3 | * |
| 4 | * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar, Hajnalka Szabo |
| 5 | * |
| 6 | * Many thanks to Stig Venaas for trying out countless experimental |
| 7 | * patches and reporting/debugging problems patiently! |
| 8 | * |
| 9 | * (c) 1999, Multiple IO-APIC support, developed by |
| 10 | * Ken-ichi Yaku <yaku@css1.kbnes.nec.co.jp> and |
| 11 | * Hidemi Kishimoto <kisimoto@css1.kbnes.nec.co.jp>, |
| 12 | * further tested and cleaned up by Zach Brown <zab@redhat.com> |
| 13 | * and Ingo Molnar <mingo@redhat.com> |
| 14 | * |
| 15 | * Fixes |
| 16 | * Maciej W. Rozycki : Bits for genuine 82489DX APICs; |
| 17 | * thanks to Eric Gilmore |
| 18 | * and Rolf G. Tews |
| 19 | * for testing these extensively |
| 20 | * Paul Diefenbaugh : Added full ACPI support |
| 21 | */ |
| 22 | |
| 23 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/delay.h> |
| 27 | #include <linux/sched.h> |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 28 | #include <linux/bootmem.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | #include <linux/mc146818rtc.h> |
| 30 | #include <linux/compiler.h> |
| 31 | #include <linux/acpi.h> |
Alexey Dobriyan | 129f694 | 2005-06-23 00:08:33 -0700 | [diff] [blame] | 32 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/sysdev.h> |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 34 | #include <linux/pci.h> |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 35 | #include <linux/msi.h> |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 36 | #include <linux/htirq.h> |
Nigel Cunningham | 7dfb710 | 2006-12-06 20:34:23 -0800 | [diff] [blame] | 37 | #include <linux/freezer.h> |
Eric W. Biederman | f26d6a2 | 2007-05-02 19:27:19 +0200 | [diff] [blame] | 38 | #include <linux/kthread.h> |
Julia Lawall | 1d16b53 | 2008-01-30 13:32:19 +0100 | [diff] [blame] | 39 | #include <linux/jiffies.h> /* time_after() */ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 40 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include <asm/io.h> |
| 42 | #include <asm/smp.h> |
| 43 | #include <asm/desc.h> |
| 44 | #include <asm/timer.h> |
Ingo Molnar | 306e440 | 2005-06-30 02:58:55 -0700 | [diff] [blame] | 45 | #include <asm/i8259.h> |
Don Zickus | 3e4ff11 | 2006-06-26 13:57:01 +0200 | [diff] [blame] | 46 | #include <asm/nmi.h> |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 47 | #include <asm/msidef.h> |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 48 | #include <asm/hypertransport.h> |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 49 | #include <asm/setup.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 50 | |
| 51 | #include <mach_apic.h> |
Andi Kleen | 874c4fe | 2006-09-26 10:52:26 +0200 | [diff] [blame] | 52 | #include <mach_apicdef.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 54 | #define __apicdebuginit(type) static type __init |
| 55 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | int (*ioapic_renumber_irq)(int ioapic, int irq); |
| 57 | atomic_t irq_mis_count; |
| 58 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 59 | /* Where if anywhere is the i8259 connect in external int mode */ |
| 60 | static struct { int pin, apic; } ioapic_i8259 = { -1, -1 }; |
| 61 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | static DEFINE_SPINLOCK(ioapic_lock); |
Eric W. Biederman | d388e5f | 2008-08-09 15:09:02 -0700 | [diff] [blame] | 63 | DEFINE_SPINLOCK(vector_lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | |
Maciej W. Rozycki | 35542c5 | 2008-05-21 22:10:22 +0100 | [diff] [blame] | 65 | int timer_through_8259 __initdata; |
Andi Kleen | f9262c1 | 2006-03-08 17:57:25 -0800 | [diff] [blame] | 66 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | /* |
| 68 | * Is the SiS APIC rmw bug present ? |
| 69 | * -1 = don't know, 0 = no, 1 = yes |
| 70 | */ |
| 71 | int sis_apic_bug = -1; |
| 72 | |
Yinghai Lu | 301e619 | 2008-08-19 20:50:02 -0700 | [diff] [blame] | 73 | int first_free_entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | /* |
| 75 | * # of IRQ routing registers |
| 76 | */ |
| 77 | int nr_ioapic_registers[MAX_IO_APICS]; |
| 78 | |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 79 | /* I/O APIC entries */ |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 80 | struct mp_config_ioapic mp_ioapics[MAX_IO_APICS]; |
Alexey Starikovskiy | 9f640cc | 2008-04-04 23:41:13 +0400 | [diff] [blame] | 81 | int nr_ioapics; |
| 82 | |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 83 | /* MP IRQ source entries */ |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 84 | struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES]; |
Alexey Starikovskiy | 584f734 | 2008-04-04 23:41:32 +0400 | [diff] [blame] | 85 | |
| 86 | /* # of MP IRQ source entries */ |
| 87 | int mp_irq_entries; |
| 88 | |
Alexey Starikovskiy | 8732fc4 | 2008-05-19 19:47:16 +0400 | [diff] [blame] | 89 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) |
| 90 | int mp_bus_id_to_type[MAX_MP_BUSSES]; |
| 91 | #endif |
| 92 | |
| 93 | DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); |
| 94 | |
Rusty Russell | 1a3f239 | 2006-09-26 10:52:32 +0200 | [diff] [blame] | 95 | static int disable_timer_pin_1 __initdata; |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 96 | |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 97 | struct irq_cfg; |
| 98 | |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 99 | struct irq_cfg { |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 100 | unsigned int irq; |
| 101 | struct irq_cfg *next; |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 102 | u8 vector; |
| 103 | }; |
| 104 | |
| 105 | |
| 106 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ |
| 107 | static struct irq_cfg irq_cfg_legacy[] __initdata = { |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 108 | [0] = { .irq = 0, .vector = IRQ0_VECTOR, }, |
| 109 | [1] = { .irq = 1, .vector = IRQ1_VECTOR, }, |
| 110 | [2] = { .irq = 2, .vector = IRQ2_VECTOR, }, |
| 111 | [3] = { .irq = 3, .vector = IRQ3_VECTOR, }, |
| 112 | [4] = { .irq = 4, .vector = IRQ4_VECTOR, }, |
| 113 | [5] = { .irq = 5, .vector = IRQ5_VECTOR, }, |
| 114 | [6] = { .irq = 6, .vector = IRQ6_VECTOR, }, |
| 115 | [7] = { .irq = 7, .vector = IRQ7_VECTOR, }, |
| 116 | [8] = { .irq = 8, .vector = IRQ8_VECTOR, }, |
| 117 | [9] = { .irq = 9, .vector = IRQ9_VECTOR, }, |
| 118 | [10] = { .irq = 10, .vector = IRQ10_VECTOR, }, |
| 119 | [11] = { .irq = 11, .vector = IRQ11_VECTOR, }, |
| 120 | [12] = { .irq = 12, .vector = IRQ12_VECTOR, }, |
| 121 | [13] = { .irq = 13, .vector = IRQ13_VECTOR, }, |
| 122 | [14] = { .irq = 14, .vector = IRQ14_VECTOR, }, |
| 123 | [15] = { .irq = 15, .vector = IRQ15_VECTOR, }, |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 124 | }; |
| 125 | |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 126 | static struct irq_cfg irq_cfg_init = { .irq = -1U, }; |
| 127 | /* need to be biger than size of irq_cfg_legacy */ |
| 128 | static int nr_irq_cfg = 32; |
| 129 | |
| 130 | static int __init parse_nr_irq_cfg(char *arg) |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 131 | { |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 132 | if (arg) { |
| 133 | nr_irq_cfg = simple_strtoul(arg, NULL, 0); |
| 134 | if (nr_irq_cfg < 32) |
| 135 | nr_irq_cfg = 32; |
| 136 | } |
| 137 | return 0; |
| 138 | } |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 139 | |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 140 | early_param("nr_irq_cfg", parse_nr_irq_cfg); |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 141 | |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 142 | static void init_one_irq_cfg(struct irq_cfg *cfg) |
| 143 | { |
| 144 | memcpy(cfg, &irq_cfg_init, sizeof(struct irq_cfg)); |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 145 | } |
| 146 | |
| 147 | static struct irq_cfg *irq_cfgx; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 148 | static struct irq_cfg *irq_cfgx_free; |
| 149 | static void __init init_work(void *data) |
| 150 | { |
| 151 | struct dyn_array *da = data; |
| 152 | struct irq_cfg *cfg; |
| 153 | int legacy_count; |
| 154 | int i; |
| 155 | |
| 156 | cfg = *da->name; |
| 157 | |
| 158 | memcpy(cfg, irq_cfg_legacy, sizeof(irq_cfg_legacy)); |
| 159 | |
| 160 | legacy_count = sizeof(irq_cfg_legacy)/sizeof(irq_cfg_legacy[0]); |
| 161 | for (i = legacy_count; i < *da->nr; i++) |
| 162 | init_one_irq_cfg(&cfg[i]); |
| 163 | |
| 164 | for (i = 1; i < *da->nr; i++) |
| 165 | cfg[i-1].next = &cfg[i]; |
| 166 | |
| 167 | irq_cfgx_free = &irq_cfgx[legacy_count]; |
| 168 | irq_cfgx[legacy_count - 1].next = NULL; |
| 169 | } |
| 170 | |
| 171 | #define for_each_irq_cfg(cfg) \ |
| 172 | for (cfg = irq_cfgx; cfg; cfg = cfg->next) |
| 173 | |
| 174 | DEFINE_DYN_ARRAY(irq_cfgx, sizeof(struct irq_cfg), nr_irq_cfg, PAGE_SIZE, init_work); |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 175 | |
| 176 | static struct irq_cfg *irq_cfg(unsigned int irq) |
| 177 | { |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 178 | struct irq_cfg *cfg; |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 179 | |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 180 | cfg = irq_cfgx; |
| 181 | while (cfg) { |
| 182 | if (cfg->irq == irq) |
| 183 | return cfg; |
| 184 | |
| 185 | cfg = cfg->next; |
| 186 | } |
| 187 | |
| 188 | return NULL; |
| 189 | } |
| 190 | |
| 191 | static struct irq_cfg *irq_cfg_alloc(unsigned int irq) |
| 192 | { |
| 193 | struct irq_cfg *cfg, *cfg_pri; |
| 194 | int i; |
| 195 | int count = 0; |
| 196 | |
| 197 | cfg_pri = cfg = irq_cfgx; |
| 198 | while (cfg) { |
| 199 | if (cfg->irq == irq) |
| 200 | return cfg; |
| 201 | |
| 202 | cfg_pri = cfg; |
| 203 | cfg = cfg->next; |
| 204 | count++; |
| 205 | } |
| 206 | |
| 207 | if (!irq_cfgx_free) { |
| 208 | unsigned long phys; |
| 209 | unsigned long total_bytes; |
| 210 | /* |
| 211 | * we run out of pre-allocate ones, allocate more |
| 212 | */ |
| 213 | printk(KERN_DEBUG "try to get more irq_cfg %d\n", nr_irq_cfg); |
| 214 | |
| 215 | total_bytes = sizeof(struct irq_cfg) * nr_irq_cfg; |
| 216 | if (after_bootmem) |
| 217 | cfg = kzalloc(total_bytes, GFP_ATOMIC); |
| 218 | else |
| 219 | cfg = __alloc_bootmem_nopanic(total_bytes, PAGE_SIZE, 0); |
| 220 | |
| 221 | if (!cfg) |
| 222 | panic("please boot with nr_irq_cfg= %d\n", count * 2); |
| 223 | |
| 224 | phys = __pa(cfg); |
| 225 | printk(KERN_DEBUG "irq_irq ==> [%#lx - %#lx]\n", phys, phys + total_bytes); |
| 226 | |
| 227 | for (i = 0; i < nr_irq_cfg; i++) |
| 228 | init_one_irq_cfg(&cfg[i]); |
| 229 | |
| 230 | for (i = 1; i < nr_irq_cfg; i++) |
| 231 | cfg[i-1].next = &cfg[i]; |
| 232 | |
| 233 | irq_cfgx_free = cfg; |
| 234 | } |
| 235 | |
| 236 | cfg = irq_cfgx_free; |
| 237 | irq_cfgx_free = irq_cfgx_free->next; |
| 238 | cfg->next = NULL; |
| 239 | if (cfg_pri) |
| 240 | cfg_pri->next = cfg; |
| 241 | else |
| 242 | irq_cfgx = cfg; |
| 243 | cfg->irq = irq; |
| 244 | printk(KERN_DEBUG "found new irq_cfg for irq %d\n", cfg->irq); |
| 245 | |
| 246 | #ifdef CONFIG_HAVE_SPARSE_IRQ_DEBUG |
| 247 | { |
| 248 | /* dump the results */ |
| 249 | struct irq_cfg *cfg; |
| 250 | unsigned long phys; |
| 251 | unsigned long bytes = sizeof(struct irq_cfg); |
| 252 | |
| 253 | printk(KERN_DEBUG "=========================== %d\n", irq); |
| 254 | printk(KERN_DEBUG "irq_cfg dump after get that for %d\n", irq); |
| 255 | for_each_irq_cfg(cfg) { |
| 256 | phys = __pa(cfg); |
| 257 | printk(KERN_DEBUG "irq_cfg %d ==> [%#lx - %#lx]\n", cfg->irq, phys, phys + bytes); |
| 258 | } |
| 259 | printk(KERN_DEBUG "===========================\n"); |
| 260 | } |
| 261 | #endif |
| 262 | return cfg; |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 263 | } |
| 264 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | /* |
| 266 | * Rough estimation of how many shared IRQs there are, can |
| 267 | * be changed anytime. |
| 268 | */ |
Yinghai Lu | 301e619 | 2008-08-19 20:50:02 -0700 | [diff] [blame] | 269 | int pin_map_size; |
Yinghai Lu | 0799e43 | 2008-08-19 20:49:48 -0700 | [diff] [blame] | 270 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 271 | /* |
| 272 | * This is performance-critical, we want to do it O(1) |
| 273 | * |
| 274 | * the indexing order of this array favors 1:1 mappings |
| 275 | * between pins and IRQs. |
| 276 | */ |
| 277 | |
| 278 | static struct irq_pin_list { |
| 279 | int apic, pin, next; |
Yinghai Lu | 301e619 | 2008-08-19 20:50:02 -0700 | [diff] [blame] | 280 | } *irq_2_pin; |
| 281 | |
| 282 | DEFINE_DYN_ARRAY(irq_2_pin, sizeof(struct irq_pin_list), pin_map_size, 16, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 284 | struct io_apic { |
| 285 | unsigned int index; |
| 286 | unsigned int unused[3]; |
| 287 | unsigned int data; |
| 288 | }; |
| 289 | |
| 290 | static __attribute_const__ struct io_apic __iomem *io_apic_base(int idx) |
| 291 | { |
| 292 | return (void __iomem *) __fix_to_virt(FIX_IO_APIC_BASE_0 + idx) |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 293 | + (mp_ioapics[idx].mp_apicaddr & ~PAGE_MASK); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 294 | } |
| 295 | |
| 296 | static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) |
| 297 | { |
| 298 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 299 | writel(reg, &io_apic->index); |
| 300 | return readl(&io_apic->data); |
| 301 | } |
| 302 | |
| 303 | static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) |
| 304 | { |
| 305 | struct io_apic __iomem *io_apic = io_apic_base(apic); |
| 306 | writel(reg, &io_apic->index); |
| 307 | writel(value, &io_apic->data); |
| 308 | } |
| 309 | |
| 310 | /* |
| 311 | * Re-write a value: to be used for read-modify-write |
| 312 | * cycles where the read already set up the index register. |
| 313 | * |
| 314 | * Older SiS APIC requires we rewrite the index register |
| 315 | */ |
| 316 | static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value) |
| 317 | { |
Al Viro | cb46898 | 2007-02-09 16:39:25 +0000 | [diff] [blame] | 318 | volatile struct io_apic __iomem *io_apic = io_apic_base(apic); |
Linus Torvalds | 130fe05 | 2006-11-01 09:11:00 -0800 | [diff] [blame] | 319 | if (sis_apic_bug) |
| 320 | writel(reg, &io_apic->index); |
| 321 | writel(value, &io_apic->data); |
| 322 | } |
| 323 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 324 | union entry_union { |
| 325 | struct { u32 w1, w2; }; |
| 326 | struct IO_APIC_route_entry entry; |
| 327 | }; |
| 328 | |
| 329 | static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin) |
| 330 | { |
| 331 | union entry_union eu; |
| 332 | unsigned long flags; |
| 333 | spin_lock_irqsave(&ioapic_lock, flags); |
| 334 | eu.w1 = io_apic_read(apic, 0x10 + 2 * pin); |
| 335 | eu.w2 = io_apic_read(apic, 0x11 + 2 * pin); |
| 336 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 337 | return eu.entry; |
| 338 | } |
| 339 | |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 340 | /* |
| 341 | * When we write a new IO APIC routing entry, we need to write the high |
| 342 | * word first! If the mask bit in the low word is clear, we will enable |
| 343 | * the interrupt, and we need to make sure the entry is fully populated |
| 344 | * before that happens. |
| 345 | */ |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 346 | static void |
| 347 | __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
| 348 | { |
| 349 | union entry_union eu; |
| 350 | eu.entry = e; |
| 351 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 352 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 353 | } |
| 354 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 355 | static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e) |
| 356 | { |
| 357 | unsigned long flags; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 358 | spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | d15512f | 2006-12-07 02:14:07 +0100 | [diff] [blame] | 359 | __ioapic_write_entry(apic, pin, e); |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 360 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 361 | } |
| 362 | |
| 363 | /* |
| 364 | * When we mask an IO APIC routing entry, we need to write the low |
| 365 | * word first, in order to set the mask bit before we change the |
| 366 | * high bits! |
| 367 | */ |
| 368 | static void ioapic_mask_entry(int apic, int pin) |
| 369 | { |
| 370 | unsigned long flags; |
| 371 | union entry_union eu = { .entry.mask = 1 }; |
| 372 | |
| 373 | spin_lock_irqsave(&ioapic_lock, flags); |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 374 | io_apic_write(apic, 0x10 + 2*pin, eu.w1); |
| 375 | io_apic_write(apic, 0x11 + 2*pin, eu.w2); |
| 376 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 377 | } |
| 378 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | /* |
| 380 | * The common case is 1:1 IRQ<->pin mappings. Sometimes there are |
| 381 | * shared ISA-space IRQs, so we have to support them. We are super |
| 382 | * fast in the common case, and fast for shared ISA-space IRQs. |
| 383 | */ |
| 384 | static void add_pin_to_irq(unsigned int irq, int apic, int pin) |
| 385 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | struct irq_pin_list *entry = irq_2_pin + irq; |
| 387 | |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 388 | irq_cfg_alloc(irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 389 | while (entry->next) |
| 390 | entry = irq_2_pin + entry->next; |
| 391 | |
| 392 | if (entry->pin != -1) { |
| 393 | entry->next = first_free_entry; |
| 394 | entry = irq_2_pin + entry->next; |
Yinghai Lu | 0799e43 | 2008-08-19 20:49:48 -0700 | [diff] [blame] | 395 | if (++first_free_entry >= pin_map_size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 396 | panic("io_apic.c: whoops"); |
| 397 | } |
| 398 | entry->apic = apic; |
| 399 | entry->pin = pin; |
| 400 | } |
| 401 | |
| 402 | /* |
| 403 | * Reroute an IRQ to a different pin. |
| 404 | */ |
| 405 | static void __init replace_pin_at_irq(unsigned int irq, |
| 406 | int oldapic, int oldpin, |
| 407 | int newapic, int newpin) |
| 408 | { |
| 409 | struct irq_pin_list *entry = irq_2_pin + irq; |
| 410 | |
| 411 | while (1) { |
| 412 | if (entry->apic == oldapic && entry->pin == oldpin) { |
| 413 | entry->apic = newapic; |
| 414 | entry->pin = newpin; |
| 415 | } |
| 416 | if (!entry->next) |
| 417 | break; |
| 418 | entry = irq_2_pin + entry->next; |
| 419 | } |
| 420 | } |
| 421 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 422 | static void __modify_IO_APIC_irq(unsigned int irq, unsigned long enable, unsigned long disable) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 423 | { |
| 424 | struct irq_pin_list *entry = irq_2_pin + irq; |
| 425 | unsigned int pin, reg; |
| 426 | |
| 427 | for (;;) { |
| 428 | pin = entry->pin; |
| 429 | if (pin == -1) |
| 430 | break; |
| 431 | reg = io_apic_read(entry->apic, 0x10 + pin*2); |
| 432 | reg &= ~disable; |
| 433 | reg |= enable; |
| 434 | io_apic_modify(entry->apic, 0x10 + pin*2, reg); |
| 435 | if (!entry->next) |
| 436 | break; |
| 437 | entry = irq_2_pin + entry->next; |
| 438 | } |
| 439 | } |
| 440 | |
| 441 | /* mask = 1 */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 442 | static void __mask_IO_APIC_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | { |
Cyrill Gorcunov | 46b3b4e | 2008-06-07 19:53:57 +0400 | [diff] [blame] | 444 | __modify_IO_APIC_irq(irq, IO_APIC_REDIR_MASKED, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | /* mask = 0 */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 448 | static void __unmask_IO_APIC_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | { |
Cyrill Gorcunov | 46b3b4e | 2008-06-07 19:53:57 +0400 | [diff] [blame] | 450 | __modify_IO_APIC_irq(irq, 0, IO_APIC_REDIR_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | } |
| 452 | |
| 453 | /* mask = 1, trigger = 0 */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 454 | static void __mask_and_edge_IO_APIC_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | { |
Cyrill Gorcunov | 46b3b4e | 2008-06-07 19:53:57 +0400 | [diff] [blame] | 456 | __modify_IO_APIC_irq(irq, IO_APIC_REDIR_MASKED, |
| 457 | IO_APIC_REDIR_LEVEL_TRIGGER); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | } |
| 459 | |
| 460 | /* mask = 0, trigger = 1 */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 461 | static void __unmask_and_level_IO_APIC_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | { |
Cyrill Gorcunov | 46b3b4e | 2008-06-07 19:53:57 +0400 | [diff] [blame] | 463 | __modify_IO_APIC_irq(irq, IO_APIC_REDIR_LEVEL_TRIGGER, |
| 464 | IO_APIC_REDIR_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | } |
| 466 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 467 | static void mask_IO_APIC_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | { |
| 469 | unsigned long flags; |
| 470 | |
| 471 | spin_lock_irqsave(&ioapic_lock, flags); |
| 472 | __mask_IO_APIC_irq(irq); |
| 473 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 474 | } |
| 475 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 476 | static void unmask_IO_APIC_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 477 | { |
| 478 | unsigned long flags; |
| 479 | |
| 480 | spin_lock_irqsave(&ioapic_lock, flags); |
| 481 | __unmask_IO_APIC_irq(irq); |
| 482 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 483 | } |
| 484 | |
| 485 | static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) |
| 486 | { |
| 487 | struct IO_APIC_route_entry entry; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 488 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | /* Check delivery_mode to be sure we're not clearing an SMI pin */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 490 | entry = ioapic_read_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 491 | if (entry.delivery_mode == dest_SMI) |
| 492 | return; |
| 493 | |
| 494 | /* |
| 495 | * Disable it in the IO-APIC irq-routing table: |
| 496 | */ |
Linus Torvalds | f9dadfa | 2006-11-01 10:05:35 -0800 | [diff] [blame] | 497 | ioapic_mask_entry(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 498 | } |
| 499 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 500 | static void clear_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | { |
| 502 | int apic, pin; |
| 503 | |
| 504 | for (apic = 0; apic < nr_ioapics; apic++) |
| 505 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) |
| 506 | clear_IO_APIC_pin(apic, pin); |
| 507 | } |
| 508 | |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 509 | #ifdef CONFIG_SMP |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 510 | static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask) |
| 511 | { |
| 512 | unsigned long flags; |
| 513 | int pin; |
| 514 | struct irq_pin_list *entry = irq_2_pin + irq; |
| 515 | unsigned int apicid_value; |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 516 | cpumask_t tmp; |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 517 | struct irq_desc *desc; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 518 | |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 519 | cpus_and(tmp, cpumask, cpu_online_map); |
| 520 | if (cpus_empty(tmp)) |
| 521 | tmp = TARGET_CPUS; |
| 522 | |
| 523 | cpus_and(cpumask, tmp, CPU_MASK_ALL); |
| 524 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | apicid_value = cpu_mask_to_apicid(cpumask); |
| 526 | /* Prepare to do the io_apic_write */ |
| 527 | apicid_value = apicid_value << 24; |
| 528 | spin_lock_irqsave(&ioapic_lock, flags); |
| 529 | for (;;) { |
| 530 | pin = entry->pin; |
| 531 | if (pin == -1) |
| 532 | break; |
| 533 | io_apic_write(entry->apic, 0x10 + 1 + pin*2, apicid_value); |
| 534 | if (!entry->next) |
| 535 | break; |
| 536 | entry = irq_2_pin + entry->next; |
| 537 | } |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 538 | desc = irq_to_desc(irq); |
| 539 | desc->affinity = cpumask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 541 | } |
| 542 | |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 543 | #endif /* CONFIG_SMP */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | |
| 545 | #ifndef CONFIG_SMP |
Harvey Harrison | 75604d7 | 2008-01-30 13:31:17 +0100 | [diff] [blame] | 546 | void send_IPI_self(int vector) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 547 | { |
| 548 | unsigned int cfg; |
| 549 | |
| 550 | /* |
| 551 | * Wait for idle. |
| 552 | */ |
| 553 | apic_wait_icr_idle(); |
| 554 | cfg = APIC_DM_FIXED | APIC_DEST_SELF | vector | APIC_DEST_LOGICAL; |
| 555 | /* |
| 556 | * Send the IPI. The write to APIC_ICR fires this off. |
| 557 | */ |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 558 | apic_write(APIC_ICR, cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | } |
| 560 | #endif /* !CONFIG_SMP */ |
| 561 | |
| 562 | |
| 563 | /* |
| 564 | * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to |
| 565 | * specific CPU-side IRQs. |
| 566 | */ |
| 567 | |
| 568 | #define MAX_PIRQS 8 |
| 569 | static int pirq_entries [MAX_PIRQS]; |
| 570 | static int pirqs_enabled; |
| 571 | int skip_ioapic_setup; |
| 572 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | static int __init ioapic_pirq_setup(char *str) |
| 574 | { |
| 575 | int i, max; |
| 576 | int ints[MAX_PIRQS+1]; |
| 577 | |
| 578 | get_options(str, ARRAY_SIZE(ints), ints); |
| 579 | |
| 580 | for (i = 0; i < MAX_PIRQS; i++) |
| 581 | pirq_entries[i] = -1; |
| 582 | |
| 583 | pirqs_enabled = 1; |
| 584 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 585 | "PIRQ redirection, working around broken MP-BIOS.\n"); |
| 586 | max = MAX_PIRQS; |
| 587 | if (ints[0] < MAX_PIRQS) |
| 588 | max = ints[0]; |
| 589 | |
| 590 | for (i = 0; i < max; i++) { |
| 591 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 592 | "... PIRQ%d -> IRQ %d\n", i, ints[i+1]); |
| 593 | /* |
| 594 | * PIRQs are mapped upside down, usually. |
| 595 | */ |
| 596 | pirq_entries[MAX_PIRQS-i-1] = ints[i+1]; |
| 597 | } |
| 598 | return 1; |
| 599 | } |
| 600 | |
| 601 | __setup("pirq=", ioapic_pirq_setup); |
| 602 | |
| 603 | /* |
| 604 | * Find the IRQ entry number of a certain pin. |
| 605 | */ |
| 606 | static int find_irq_entry(int apic, int pin, int type) |
| 607 | { |
| 608 | int i; |
| 609 | |
| 610 | for (i = 0; i < mp_irq_entries; i++) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 611 | if (mp_irqs[i].mp_irqtype == type && |
| 612 | (mp_irqs[i].mp_dstapic == mp_ioapics[apic].mp_apicid || |
| 613 | mp_irqs[i].mp_dstapic == MP_APIC_ALL) && |
| 614 | mp_irqs[i].mp_dstirq == pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | return i; |
| 616 | |
| 617 | return -1; |
| 618 | } |
| 619 | |
| 620 | /* |
| 621 | * Find the pin to which IRQ[irq] (ISA) is connected |
| 622 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 623 | static int __init find_isa_irq_pin(int irq, int type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 624 | { |
| 625 | int i; |
| 626 | |
| 627 | for (i = 0; i < mp_irq_entries; i++) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 628 | int lbus = mp_irqs[i].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | |
Alexey Starikovskiy | d27e2b8 | 2008-03-20 14:54:18 +0300 | [diff] [blame] | 630 | if (test_bit(lbus, mp_bus_not_pci) && |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 631 | (mp_irqs[i].mp_irqtype == type) && |
| 632 | (mp_irqs[i].mp_srcbusirq == irq)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 633 | |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 634 | return mp_irqs[i].mp_dstirq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | } |
| 636 | return -1; |
| 637 | } |
| 638 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 639 | static int __init find_isa_irq_apic(int irq, int type) |
| 640 | { |
| 641 | int i; |
| 642 | |
| 643 | for (i = 0; i < mp_irq_entries; i++) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 644 | int lbus = mp_irqs[i].mp_srcbus; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 645 | |
Alexey Starikovskiy | 73b2961 | 2008-03-20 14:54:24 +0300 | [diff] [blame] | 646 | if (test_bit(lbus, mp_bus_not_pci) && |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 647 | (mp_irqs[i].mp_irqtype == type) && |
| 648 | (mp_irqs[i].mp_srcbusirq == irq)) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 649 | break; |
| 650 | } |
| 651 | if (i < mp_irq_entries) { |
| 652 | int apic; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 653 | for (apic = 0; apic < nr_ioapics; apic++) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 654 | if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic) |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 655 | return apic; |
| 656 | } |
| 657 | } |
| 658 | |
| 659 | return -1; |
| 660 | } |
| 661 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | /* |
| 663 | * Find a specific PCI IRQ entry. |
| 664 | * Not an __init, possibly needed by modules |
| 665 | */ |
| 666 | static int pin_2_irq(int idx, int apic, int pin); |
| 667 | |
| 668 | int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin) |
| 669 | { |
| 670 | int apic, i, best_guess = -1; |
| 671 | |
| 672 | apic_printk(APIC_DEBUG, "querying PCI -> IRQ mapping bus:%d, " |
| 673 | "slot:%d, pin:%d.\n", bus, slot, pin); |
Alexey Starikovskiy | ce6444d | 2008-05-19 19:47:09 +0400 | [diff] [blame] | 674 | if (test_bit(bus, mp_bus_not_pci)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 675 | printk(KERN_WARNING "PCI BIOS passed nonexistent PCI bus %d!\n", bus); |
| 676 | return -1; |
| 677 | } |
| 678 | for (i = 0; i < mp_irq_entries; i++) { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 679 | int lbus = mp_irqs[i].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | |
| 681 | for (apic = 0; apic < nr_ioapics; apic++) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 682 | if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic || |
| 683 | mp_irqs[i].mp_dstapic == MP_APIC_ALL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 684 | break; |
| 685 | |
Alexey Starikovskiy | 47cab82 | 2008-03-20 14:54:30 +0300 | [diff] [blame] | 686 | if (!test_bit(lbus, mp_bus_not_pci) && |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 687 | !mp_irqs[i].mp_irqtype && |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 688 | (bus == lbus) && |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 689 | (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) { |
Ingo Molnar | 3de352b | 2008-07-08 11:14:58 +0200 | [diff] [blame] | 690 | int irq = pin_2_irq(i, apic, mp_irqs[i].mp_dstirq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | |
| 692 | if (!(apic || IO_APIC_IRQ(irq))) |
| 693 | continue; |
| 694 | |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 695 | if (pin == (mp_irqs[i].mp_srcbusirq & 3)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | return irq; |
| 697 | /* |
| 698 | * Use the first all-but-pin matching entry as a |
| 699 | * best-guess fuzzy result for broken mptables. |
| 700 | */ |
| 701 | if (best_guess < 0) |
| 702 | best_guess = irq; |
| 703 | } |
| 704 | } |
| 705 | return best_guess; |
| 706 | } |
Alexey Dobriyan | 129f694 | 2005-06-23 00:08:33 -0700 | [diff] [blame] | 707 | EXPORT_SYMBOL(IO_APIC_get_PCI_irq_vector); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | |
| 709 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 710 | * This function currently is only a helper for the i386 smp boot process where |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 711 | * we need to reprogram the ioredtbls to cater for the cpus which have come online |
| 712 | * so mask in all cases should simply be TARGET_CPUS |
| 713 | */ |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 714 | #ifdef CONFIG_SMP |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | void __init setup_ioapic_dest(void) |
| 716 | { |
| 717 | int pin, ioapic, irq, irq_entry; |
| 718 | |
| 719 | if (skip_ioapic_setup == 1) |
| 720 | return; |
| 721 | |
| 722 | for (ioapic = 0; ioapic < nr_ioapics; ioapic++) { |
| 723 | for (pin = 0; pin < nr_ioapic_registers[ioapic]; pin++) { |
| 724 | irq_entry = find_irq_entry(ioapic, pin, mp_INT); |
| 725 | if (irq_entry == -1) |
| 726 | continue; |
| 727 | irq = pin_2_irq(irq_entry, ioapic, pin); |
| 728 | set_ioapic_affinity_irq(irq, TARGET_CPUS); |
| 729 | } |
| 730 | |
| 731 | } |
| 732 | } |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 733 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 735 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | /* |
| 737 | * EISA Edge/Level control register, ELCR |
| 738 | */ |
| 739 | static int EISA_ELCR(unsigned int irq) |
| 740 | { |
| 741 | if (irq < 16) { |
| 742 | unsigned int port = 0x4d0 + (irq >> 3); |
| 743 | return (inb(port) >> (irq & 7)) & 1; |
| 744 | } |
| 745 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 746 | "Broken MPtable reports ISA irq %d\n", irq); |
| 747 | return 0; |
| 748 | } |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 749 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 751 | /* ISA interrupts are always polarity zero edge triggered, |
| 752 | * when listed as conforming in the MP table. */ |
| 753 | |
| 754 | #define default_ISA_trigger(idx) (0) |
| 755 | #define default_ISA_polarity(idx) (0) |
| 756 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | /* EISA interrupts are always polarity zero and can be edge or level |
| 758 | * trigger depending on the ELCR value. If an interrupt is listed as |
| 759 | * EISA conforming in the MP table, that means its trigger type must |
| 760 | * be read in from the ELCR */ |
| 761 | |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 762 | #define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].mp_srcbusirq)) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 763 | #define default_EISA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | |
| 765 | /* PCI interrupts are always polarity one level triggered, |
| 766 | * when listed as conforming in the MP table. */ |
| 767 | |
| 768 | #define default_PCI_trigger(idx) (1) |
| 769 | #define default_PCI_polarity(idx) (1) |
| 770 | |
| 771 | /* MCA interrupts are always polarity zero level triggered, |
| 772 | * when listed as conforming in the MP table. */ |
| 773 | |
| 774 | #define default_MCA_trigger(idx) (1) |
Alexey Starikovskiy | 6728801 | 2008-03-20 14:54:36 +0300 | [diff] [blame] | 775 | #define default_MCA_polarity(idx) default_ISA_polarity(idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 776 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 777 | static int MPBIOS_polarity(int idx) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 778 | { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 779 | int bus = mp_irqs[idx].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 780 | int polarity; |
| 781 | |
| 782 | /* |
| 783 | * Determine IRQ line polarity (high active or low active): |
| 784 | */ |
Ingo Molnar | 3de352b | 2008-07-08 11:14:58 +0200 | [diff] [blame] | 785 | switch (mp_irqs[idx].mp_irqflag & 3) { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 786 | case 0: /* conforms, ie. bus-type dependent polarity */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 787 | { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 788 | polarity = test_bit(bus, mp_bus_not_pci)? |
| 789 | default_ISA_polarity(idx): |
| 790 | default_PCI_polarity(idx); |
| 791 | break; |
| 792 | } |
| 793 | case 1: /* high active */ |
| 794 | { |
| 795 | polarity = 0; |
| 796 | break; |
| 797 | } |
| 798 | case 2: /* reserved */ |
| 799 | { |
| 800 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 801 | polarity = 1; |
| 802 | break; |
| 803 | } |
| 804 | case 3: /* low active */ |
| 805 | { |
| 806 | polarity = 1; |
| 807 | break; |
| 808 | } |
| 809 | default: /* invalid */ |
| 810 | { |
| 811 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 812 | polarity = 1; |
| 813 | break; |
| 814 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 815 | } |
| 816 | return polarity; |
| 817 | } |
| 818 | |
| 819 | static int MPBIOS_trigger(int idx) |
| 820 | { |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 821 | int bus = mp_irqs[idx].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | int trigger; |
| 823 | |
| 824 | /* |
| 825 | * Determine IRQ trigger mode (edge or level sensitive): |
| 826 | */ |
Ingo Molnar | 3de352b | 2008-07-08 11:14:58 +0200 | [diff] [blame] | 827 | switch ((mp_irqs[idx].mp_irqflag>>2) & 3) { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 828 | case 0: /* conforms, ie. bus-type dependent */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 829 | { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 830 | trigger = test_bit(bus, mp_bus_not_pci)? |
| 831 | default_ISA_trigger(idx): |
| 832 | default_PCI_trigger(idx); |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 833 | #if defined(CONFIG_EISA) || defined(CONFIG_MCA) |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 834 | switch (mp_bus_id_to_type[bus]) { |
| 835 | case MP_BUS_ISA: /* ISA pin */ |
| 836 | { |
| 837 | /* set before the switch */ |
| 838 | break; |
| 839 | } |
| 840 | case MP_BUS_EISA: /* EISA pin */ |
| 841 | { |
| 842 | trigger = default_EISA_trigger(idx); |
| 843 | break; |
| 844 | } |
| 845 | case MP_BUS_PCI: /* PCI pin */ |
| 846 | { |
| 847 | /* set before the switch */ |
| 848 | break; |
| 849 | } |
| 850 | case MP_BUS_MCA: /* MCA pin */ |
| 851 | { |
| 852 | trigger = default_MCA_trigger(idx); |
| 853 | break; |
| 854 | } |
| 855 | default: |
| 856 | { |
| 857 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 858 | trigger = 1; |
| 859 | break; |
| 860 | } |
| 861 | } |
Alexey Starikovskiy | c0a282c | 2008-03-20 14:55:02 +0300 | [diff] [blame] | 862 | #endif |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 863 | break; |
| 864 | } |
| 865 | case 1: /* edge */ |
| 866 | { |
| 867 | trigger = 0; |
| 868 | break; |
| 869 | } |
| 870 | case 2: /* reserved */ |
| 871 | { |
| 872 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 873 | trigger = 1; |
| 874 | break; |
| 875 | } |
| 876 | case 3: /* level */ |
| 877 | { |
| 878 | trigger = 1; |
| 879 | break; |
| 880 | } |
| 881 | default: /* invalid */ |
| 882 | { |
| 883 | printk(KERN_WARNING "broken BIOS!!\n"); |
| 884 | trigger = 0; |
| 885 | break; |
| 886 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | } |
| 888 | return trigger; |
| 889 | } |
| 890 | |
| 891 | static inline int irq_polarity(int idx) |
| 892 | { |
| 893 | return MPBIOS_polarity(idx); |
| 894 | } |
| 895 | |
| 896 | static inline int irq_trigger(int idx) |
| 897 | { |
| 898 | return MPBIOS_trigger(idx); |
| 899 | } |
| 900 | |
| 901 | static int pin_2_irq(int idx, int apic, int pin) |
| 902 | { |
| 903 | int irq, i; |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 904 | int bus = mp_irqs[idx].mp_srcbus; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 905 | |
| 906 | /* |
| 907 | * Debugging check, we are in big trouble if this message pops up! |
| 908 | */ |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 909 | if (mp_irqs[idx].mp_dstirq != pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 910 | printk(KERN_ERR "broken BIOS or MPTABLE parser, ayiee!!\n"); |
| 911 | |
Alexey Starikovskiy | 643befe | 2008-03-20 14:54:49 +0300 | [diff] [blame] | 912 | if (test_bit(bus, mp_bus_not_pci)) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 913 | irq = mp_irqs[idx].mp_srcbusirq; |
Alexey Starikovskiy | 643befe | 2008-03-20 14:54:49 +0300 | [diff] [blame] | 914 | else { |
| 915 | /* |
| 916 | * PCI IRQs are mapped in order |
| 917 | */ |
| 918 | i = irq = 0; |
| 919 | while (i < apic) |
| 920 | irq += nr_ioapic_registers[i++]; |
| 921 | irq += pin; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 922 | |
Alexey Starikovskiy | 643befe | 2008-03-20 14:54:49 +0300 | [diff] [blame] | 923 | /* |
| 924 | * For MPS mode, so far only needed by ES7000 platform |
| 925 | */ |
| 926 | if (ioapic_renumber_irq) |
| 927 | irq = ioapic_renumber_irq(apic, irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 928 | } |
| 929 | |
| 930 | /* |
| 931 | * PCI IRQ command line redirection. Yes, limits are hardcoded. |
| 932 | */ |
| 933 | if ((pin >= 16) && (pin <= 23)) { |
| 934 | if (pirq_entries[pin-16] != -1) { |
| 935 | if (!pirq_entries[pin-16]) { |
| 936 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 937 | "disabling PIRQ%d\n", pin-16); |
| 938 | } else { |
| 939 | irq = pirq_entries[pin-16]; |
| 940 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 941 | "using PIRQ%d -> IRQ %d\n", |
| 942 | pin-16, irq); |
| 943 | } |
| 944 | } |
| 945 | } |
| 946 | return irq; |
| 947 | } |
| 948 | |
| 949 | static inline int IO_APIC_irq_trigger(int irq) |
| 950 | { |
| 951 | int apic, idx, pin; |
| 952 | |
| 953 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 954 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 955 | idx = find_irq_entry(apic, pin, mp_INT); |
| 956 | if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 957 | return irq_trigger(idx); |
| 958 | } |
| 959 | } |
| 960 | /* |
| 961 | * nonexistent IRQs are edge default |
| 962 | */ |
| 963 | return 0; |
| 964 | } |
| 965 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 967 | static int __assign_irq_vector(int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 968 | { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 969 | static int current_vector = FIRST_DEVICE_VECTOR, current_offset; |
Rusty Russell | dbeb2be | 2007-10-19 20:35:03 +0200 | [diff] [blame] | 970 | int vector, offset; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 971 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 972 | |
Yinghai Lu | 301e619 | 2008-08-19 20:50:02 -0700 | [diff] [blame] | 973 | BUG_ON((unsigned)irq >= nr_irqs); |
Jan Beulich | 0a1ad60 | 2006-06-26 13:56:43 +0200 | [diff] [blame] | 974 | |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 975 | cfg = irq_cfg(irq); |
| 976 | if (cfg->vector > 0) |
| 977 | return cfg->vector; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 978 | |
Jan Beulich | 0a1ad60 | 2006-06-26 13:56:43 +0200 | [diff] [blame] | 979 | vector = current_vector; |
Eric W. Biederman | 8339f00 | 2007-01-29 13:19:05 -0700 | [diff] [blame] | 980 | offset = current_offset; |
| 981 | next: |
| 982 | vector += 8; |
Alan Mayer | 305b92a | 2008-04-15 15:36:56 -0500 | [diff] [blame] | 983 | if (vector >= first_system_vector) { |
Eric W. Biederman | 8339f00 | 2007-01-29 13:19:05 -0700 | [diff] [blame] | 984 | offset = (offset + 1) % 8; |
| 985 | vector = FIRST_DEVICE_VECTOR + offset; |
| 986 | } |
| 987 | if (vector == current_vector) |
| 988 | return -ENOSPC; |
Rusty Russell | dbeb2be | 2007-10-19 20:35:03 +0200 | [diff] [blame] | 989 | if (test_and_set_bit(vector, used_vectors)) |
Eric W. Biederman | 8339f00 | 2007-01-29 13:19:05 -0700 | [diff] [blame] | 990 | goto next; |
Eric W. Biederman | 8339f00 | 2007-01-29 13:19:05 -0700 | [diff] [blame] | 991 | |
| 992 | current_vector = vector; |
| 993 | current_offset = offset; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 994 | cfg->vector = vector; |
Jan Beulich | 0a1ad60 | 2006-06-26 13:56:43 +0200 | [diff] [blame] | 995 | |
| 996 | return vector; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 997 | } |
| 998 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 999 | static int assign_irq_vector(int irq) |
| 1000 | { |
| 1001 | unsigned long flags; |
| 1002 | int vector; |
| 1003 | |
| 1004 | spin_lock_irqsave(&vector_lock, flags); |
| 1005 | vector = __assign_irq_vector(irq); |
| 1006 | spin_unlock_irqrestore(&vector_lock, flags); |
| 1007 | |
| 1008 | return vector; |
| 1009 | } |
Glauber Costa | 3fde690 | 2008-05-28 20:34:19 -0700 | [diff] [blame] | 1010 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1011 | static struct irq_chip ioapic_chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1012 | |
| 1013 | #define IOAPIC_AUTO -1 |
| 1014 | #define IOAPIC_EDGE 0 |
| 1015 | #define IOAPIC_LEVEL 1 |
| 1016 | |
Ingo Molnar | d1bef4e | 2006-06-29 02:24:36 -0700 | [diff] [blame] | 1017 | static void ioapic_register_intr(int irq, int vector, unsigned long trigger) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1018 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1019 | struct irq_desc *desc; |
| 1020 | |
| 1021 | desc = irq_to_desc(irq); |
Jan Beulich | 6ebcc00 | 2006-06-26 13:56:46 +0200 | [diff] [blame] | 1022 | if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || |
Thomas Gleixner | cc75b92 | 2007-08-12 15:46:36 +0000 | [diff] [blame] | 1023 | trigger == IOAPIC_LEVEL) { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1024 | desc->status |= IRQ_LEVEL; |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1025 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
| 1026 | handle_fasteoi_irq, "fasteoi"); |
Thomas Gleixner | cc75b92 | 2007-08-12 15:46:36 +0000 | [diff] [blame] | 1027 | } else { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1028 | desc->status &= ~IRQ_LEVEL; |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 1029 | set_irq_chip_and_handler_name(irq, &ioapic_chip, |
| 1030 | handle_edge_irq, "edge"); |
Thomas Gleixner | cc75b92 | 2007-08-12 15:46:36 +0000 | [diff] [blame] | 1031 | } |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1032 | set_intr_gate(vector, interrupt[irq]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1033 | } |
| 1034 | |
| 1035 | static void __init setup_IO_APIC_irqs(void) |
| 1036 | { |
| 1037 | struct IO_APIC_route_entry entry; |
| 1038 | int apic, pin, idx, irq, first_notcon = 1, vector; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1039 | |
| 1040 | apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n"); |
| 1041 | |
| 1042 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1043 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
| 1044 | |
| 1045 | /* |
| 1046 | * add it to the IO-APIC irq-routing table: |
| 1047 | */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1048 | memset(&entry, 0, sizeof(entry)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1049 | |
| 1050 | entry.delivery_mode = INT_DELIVERY_MODE; |
| 1051 | entry.dest_mode = INT_DEST_MODE; |
| 1052 | entry.mask = 0; /* enable IRQ */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1053 | entry.dest.logical.logical_dest = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1054 | cpu_mask_to_apicid(TARGET_CPUS); |
| 1055 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1056 | idx = find_irq_entry(apic, pin, mp_INT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1057 | if (idx == -1) { |
| 1058 | if (first_notcon) { |
| 1059 | apic_printk(APIC_VERBOSE, KERN_DEBUG |
| 1060 | " IO-APIC (apicid-pin) %d-%d", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1061 | mp_ioapics[apic].mp_apicid, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1062 | pin); |
| 1063 | first_notcon = 0; |
| 1064 | } else |
| 1065 | apic_printk(APIC_VERBOSE, ", %d-%d", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1066 | mp_ioapics[apic].mp_apicid, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1067 | continue; |
| 1068 | } |
| 1069 | |
Yinghai Lu | 20d225b | 2007-10-17 18:04:41 +0200 | [diff] [blame] | 1070 | if (!first_notcon) { |
| 1071 | apic_printk(APIC_VERBOSE, " not connected.\n"); |
| 1072 | first_notcon = 1; |
| 1073 | } |
| 1074 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1075 | entry.trigger = irq_trigger(idx); |
| 1076 | entry.polarity = irq_polarity(idx); |
| 1077 | |
| 1078 | if (irq_trigger(idx)) { |
| 1079 | entry.trigger = 1; |
| 1080 | entry.mask = 1; |
| 1081 | } |
| 1082 | |
| 1083 | irq = pin_2_irq(idx, apic, pin); |
| 1084 | /* |
| 1085 | * skip adding the timer int on secondary nodes, which causes |
| 1086 | * a small but painful rift in the time-space continuum |
| 1087 | */ |
| 1088 | if (multi_timer_check(apic, irq)) |
| 1089 | continue; |
| 1090 | else |
| 1091 | add_pin_to_irq(irq, apic, pin); |
| 1092 | |
| 1093 | if (!apic && !IO_APIC_IRQ(irq)) |
| 1094 | continue; |
| 1095 | |
| 1096 | if (IO_APIC_IRQ(irq)) { |
| 1097 | vector = assign_irq_vector(irq); |
| 1098 | entry.vector = vector; |
| 1099 | ioapic_register_intr(irq, vector, IOAPIC_AUTO); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1100 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1101 | if (!apic && (irq < 16)) |
| 1102 | disable_8259A_irq(irq); |
| 1103 | } |
Akinobu Mita | a2249cb | 2008-04-05 22:39:05 +0900 | [diff] [blame] | 1104 | ioapic_write_entry(apic, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1105 | } |
| 1106 | } |
| 1107 | |
| 1108 | if (!first_notcon) |
| 1109 | apic_printk(APIC_VERBOSE, " not connected.\n"); |
| 1110 | } |
| 1111 | |
| 1112 | /* |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1113 | * Set up the timer pin, possibly with the 8259A-master behind. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1114 | */ |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1115 | static void __init setup_timer_IRQ0_pin(unsigned int apic, unsigned int pin, |
| 1116 | int vector) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1117 | { |
| 1118 | struct IO_APIC_route_entry entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1119 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1120 | memset(&entry, 0, sizeof(entry)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1121 | |
| 1122 | /* |
| 1123 | * We use logical delivery to get the timer IRQ |
| 1124 | * to the first CPU. |
| 1125 | */ |
| 1126 | entry.dest_mode = INT_DEST_MODE; |
Maciej W. Rozycki | 03be750 | 2008-05-27 21:19:45 +0100 | [diff] [blame] | 1127 | entry.mask = 1; /* mask IRQ now */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1128 | entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS); |
| 1129 | entry.delivery_mode = INT_DELIVERY_MODE; |
| 1130 | entry.polarity = 0; |
| 1131 | entry.trigger = 0; |
| 1132 | entry.vector = vector; |
| 1133 | |
| 1134 | /* |
| 1135 | * The timer IRQ doesn't have to know that behind the |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 1136 | * scene we may have a 8259A-master in AEOI mode ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1137 | */ |
Maciej W. Rozycki | f082526 | 2008-05-27 21:19:16 +0100 | [diff] [blame] | 1138 | ioapic_register_intr(0, vector, IOAPIC_EDGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1139 | |
| 1140 | /* |
| 1141 | * Add it to the IO-APIC irq-routing table: |
| 1142 | */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1143 | ioapic_write_entry(apic, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1144 | } |
| 1145 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1146 | |
| 1147 | __apicdebuginit(void) print_IO_APIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1148 | { |
| 1149 | int apic, i; |
| 1150 | union IO_APIC_reg_00 reg_00; |
| 1151 | union IO_APIC_reg_01 reg_01; |
| 1152 | union IO_APIC_reg_02 reg_02; |
| 1153 | union IO_APIC_reg_03 reg_03; |
| 1154 | unsigned long flags; |
| 1155 | |
| 1156 | if (apic_verbosity == APIC_QUIET) |
| 1157 | return; |
| 1158 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1159 | printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1160 | for (i = 0; i < nr_ioapics; i++) |
| 1161 | printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1162 | mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1163 | |
| 1164 | /* |
| 1165 | * We are a bit conservative about what we expect. We have to |
| 1166 | * know about every hardware change ASAP. |
| 1167 | */ |
| 1168 | printk(KERN_INFO "testing the IO APIC.......................\n"); |
| 1169 | |
| 1170 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1171 | |
| 1172 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1173 | reg_00.raw = io_apic_read(apic, 0); |
| 1174 | reg_01.raw = io_apic_read(apic, 1); |
| 1175 | if (reg_01.bits.version >= 0x10) |
| 1176 | reg_02.raw = io_apic_read(apic, 2); |
| 1177 | if (reg_01.bits.version >= 0x20) |
| 1178 | reg_03.raw = io_apic_read(apic, 3); |
| 1179 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 1180 | |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1181 | printk(KERN_DEBUG "IO APIC #%d......\n", mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1182 | printk(KERN_DEBUG ".... register #00: %08X\n", reg_00.raw); |
| 1183 | printk(KERN_DEBUG "....... : physical APIC id: %02X\n", reg_00.bits.ID); |
| 1184 | printk(KERN_DEBUG "....... : Delivery Type: %X\n", reg_00.bits.delivery_type); |
| 1185 | printk(KERN_DEBUG "....... : LTS : %X\n", reg_00.bits.LTS); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1186 | |
| 1187 | printk(KERN_DEBUG ".... register #01: %08X\n", reg_01.raw); |
| 1188 | printk(KERN_DEBUG "....... : max redirection entries: %04X\n", reg_01.bits.entries); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1189 | |
| 1190 | printk(KERN_DEBUG "....... : PRQ implemented: %X\n", reg_01.bits.PRQ); |
| 1191 | printk(KERN_DEBUG "....... : IO APIC version: %04X\n", reg_01.bits.version); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1192 | |
| 1193 | /* |
| 1194 | * Some Intel chipsets with IO APIC VERSION of 0x1? don't have reg_02, |
| 1195 | * but the value of reg_02 is read as the previous read register |
| 1196 | * value, so ignore it if reg_02 == reg_01. |
| 1197 | */ |
| 1198 | if (reg_01.bits.version >= 0x10 && reg_02.raw != reg_01.raw) { |
| 1199 | printk(KERN_DEBUG ".... register #02: %08X\n", reg_02.raw); |
| 1200 | printk(KERN_DEBUG "....... : arbitration: %02X\n", reg_02.bits.arbitration); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1201 | } |
| 1202 | |
| 1203 | /* |
| 1204 | * Some Intel chipsets with IO APIC VERSION of 0x2? don't have reg_02 |
| 1205 | * or reg_03, but the value of reg_0[23] is read as the previous read |
| 1206 | * register value, so ignore it if reg_03 == reg_0[12]. |
| 1207 | */ |
| 1208 | if (reg_01.bits.version >= 0x20 && reg_03.raw != reg_02.raw && |
| 1209 | reg_03.raw != reg_01.raw) { |
| 1210 | printk(KERN_DEBUG ".... register #03: %08X\n", reg_03.raw); |
| 1211 | printk(KERN_DEBUG "....... : Boot DT : %X\n", reg_03.bits.boot_DT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1212 | } |
| 1213 | |
| 1214 | printk(KERN_DEBUG ".... IRQ redirection table:\n"); |
| 1215 | |
| 1216 | printk(KERN_DEBUG " NR Log Phy Mask Trig IRR Pol" |
| 1217 | " Stat Dest Deli Vect: \n"); |
| 1218 | |
| 1219 | for (i = 0; i <= reg_01.bits.entries; i++) { |
| 1220 | struct IO_APIC_route_entry entry; |
| 1221 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1222 | entry = ioapic_read_entry(apic, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1223 | |
| 1224 | printk(KERN_DEBUG " %02x %03X %02X ", |
| 1225 | i, |
| 1226 | entry.dest.logical.logical_dest, |
| 1227 | entry.dest.physical.physical_dest |
| 1228 | ); |
| 1229 | |
| 1230 | printk("%1d %1d %1d %1d %1d %1d %1d %02X\n", |
| 1231 | entry.mask, |
| 1232 | entry.trigger, |
| 1233 | entry.irr, |
| 1234 | entry.polarity, |
| 1235 | entry.delivery_status, |
| 1236 | entry.dest_mode, |
| 1237 | entry.delivery_mode, |
| 1238 | entry.vector |
| 1239 | ); |
| 1240 | } |
| 1241 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1242 | printk(KERN_DEBUG "IRQ to pin mappings:\n"); |
Yinghai Lu | 0799e43 | 2008-08-19 20:49:48 -0700 | [diff] [blame] | 1243 | for (i = 0; i < nr_irqs; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1244 | struct irq_pin_list *entry = irq_2_pin + i; |
| 1245 | if (entry->pin < 0) |
| 1246 | continue; |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1247 | printk(KERN_DEBUG "IRQ%d ", i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1248 | for (;;) { |
| 1249 | printk("-> %d:%d", entry->apic, entry->pin); |
| 1250 | if (!entry->next) |
| 1251 | break; |
| 1252 | entry = irq_2_pin + entry->next; |
| 1253 | } |
| 1254 | printk("\n"); |
| 1255 | } |
| 1256 | |
| 1257 | printk(KERN_INFO ".................................... done.\n"); |
| 1258 | |
| 1259 | return; |
| 1260 | } |
| 1261 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1262 | __apicdebuginit(void) print_APIC_bitfield(int base) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1263 | { |
| 1264 | unsigned int v; |
| 1265 | int i, j; |
| 1266 | |
| 1267 | if (apic_verbosity == APIC_QUIET) |
| 1268 | return; |
| 1269 | |
| 1270 | printk(KERN_DEBUG "0123456789abcdef0123456789abcdef\n" KERN_DEBUG); |
| 1271 | for (i = 0; i < 8; i++) { |
| 1272 | v = apic_read(base + i*0x10); |
| 1273 | for (j = 0; j < 32; j++) { |
| 1274 | if (v & (1<<j)) |
| 1275 | printk("1"); |
| 1276 | else |
| 1277 | printk("0"); |
| 1278 | } |
| 1279 | printk("\n"); |
| 1280 | } |
| 1281 | } |
| 1282 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1283 | __apicdebuginit(void) print_local_APIC(void *dummy) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1284 | { |
| 1285 | unsigned int v, ver, maxlvt; |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1286 | u64 icr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1287 | |
| 1288 | if (apic_verbosity == APIC_QUIET) |
| 1289 | return; |
| 1290 | |
| 1291 | printk("\n" KERN_DEBUG "printing local APIC contents on CPU#%d/%d:\n", |
| 1292 | smp_processor_id(), hard_smp_processor_id()); |
Andreas Herrmann | 6682311 | 2008-06-05 16:35:10 +0200 | [diff] [blame] | 1293 | v = apic_read(APIC_ID); |
Jack Steiner | 05f2d12 | 2008-03-28 14:12:02 -0500 | [diff] [blame] | 1294 | printk(KERN_INFO "... APIC ID: %08x (%01x)\n", v, |
Yinghai Lu | 4c9961d | 2008-07-11 18:44:16 -0700 | [diff] [blame] | 1295 | GET_APIC_ID(v)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1296 | v = apic_read(APIC_LVR); |
| 1297 | printk(KERN_INFO "... APIC VERSION: %08x\n", v); |
| 1298 | ver = GET_APIC_VERSION(v); |
Thomas Gleixner | e05d723 | 2007-02-16 01:27:58 -0800 | [diff] [blame] | 1299 | maxlvt = lapic_get_maxlvt(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1300 | |
| 1301 | v = apic_read(APIC_TASKPRI); |
| 1302 | printk(KERN_DEBUG "... APIC TASKPRI: %08x (%02x)\n", v, v & APIC_TPRI_MASK); |
| 1303 | |
| 1304 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
| 1305 | v = apic_read(APIC_ARBPRI); |
| 1306 | printk(KERN_DEBUG "... APIC ARBPRI: %08x (%02x)\n", v, |
| 1307 | v & APIC_ARBPRI_MASK); |
| 1308 | v = apic_read(APIC_PROCPRI); |
| 1309 | printk(KERN_DEBUG "... APIC PROCPRI: %08x\n", v); |
| 1310 | } |
| 1311 | |
| 1312 | v = apic_read(APIC_EOI); |
| 1313 | printk(KERN_DEBUG "... APIC EOI: %08x\n", v); |
| 1314 | v = apic_read(APIC_RRR); |
| 1315 | printk(KERN_DEBUG "... APIC RRR: %08x\n", v); |
| 1316 | v = apic_read(APIC_LDR); |
| 1317 | printk(KERN_DEBUG "... APIC LDR: %08x\n", v); |
| 1318 | v = apic_read(APIC_DFR); |
| 1319 | printk(KERN_DEBUG "... APIC DFR: %08x\n", v); |
| 1320 | v = apic_read(APIC_SPIV); |
| 1321 | printk(KERN_DEBUG "... APIC SPIV: %08x\n", v); |
| 1322 | |
| 1323 | printk(KERN_DEBUG "... APIC ISR field:\n"); |
| 1324 | print_APIC_bitfield(APIC_ISR); |
| 1325 | printk(KERN_DEBUG "... APIC TMR field:\n"); |
| 1326 | print_APIC_bitfield(APIC_TMR); |
| 1327 | printk(KERN_DEBUG "... APIC IRR field:\n"); |
| 1328 | print_APIC_bitfield(APIC_IRR); |
| 1329 | |
| 1330 | if (APIC_INTEGRATED(ver)) { /* !82489DX */ |
| 1331 | if (maxlvt > 3) /* Due to the Pentium erratum 3AP. */ |
| 1332 | apic_write(APIC_ESR, 0); |
| 1333 | v = apic_read(APIC_ESR); |
| 1334 | printk(KERN_DEBUG "... APIC ESR: %08x\n", v); |
| 1335 | } |
| 1336 | |
Hiroshi Shimamoto | 7ab6af7 | 2008-07-30 17:36:48 -0700 | [diff] [blame] | 1337 | icr = apic_icr_read(); |
| 1338 | printk(KERN_DEBUG "... APIC ICR: %08x\n", icr); |
| 1339 | printk(KERN_DEBUG "... APIC ICR2: %08x\n", icr >> 32); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1340 | |
| 1341 | v = apic_read(APIC_LVTT); |
| 1342 | printk(KERN_DEBUG "... APIC LVTT: %08x\n", v); |
| 1343 | |
| 1344 | if (maxlvt > 3) { /* PC is LVT#4. */ |
| 1345 | v = apic_read(APIC_LVTPC); |
| 1346 | printk(KERN_DEBUG "... APIC LVTPC: %08x\n", v); |
| 1347 | } |
| 1348 | v = apic_read(APIC_LVT0); |
| 1349 | printk(KERN_DEBUG "... APIC LVT0: %08x\n", v); |
| 1350 | v = apic_read(APIC_LVT1); |
| 1351 | printk(KERN_DEBUG "... APIC LVT1: %08x\n", v); |
| 1352 | |
| 1353 | if (maxlvt > 2) { /* ERR is LVT#3. */ |
| 1354 | v = apic_read(APIC_LVTERR); |
| 1355 | printk(KERN_DEBUG "... APIC LVTERR: %08x\n", v); |
| 1356 | } |
| 1357 | |
| 1358 | v = apic_read(APIC_TMICT); |
| 1359 | printk(KERN_DEBUG "... APIC TMICT: %08x\n", v); |
| 1360 | v = apic_read(APIC_TMCCT); |
| 1361 | printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v); |
| 1362 | v = apic_read(APIC_TDCR); |
| 1363 | printk(KERN_DEBUG "... APIC TDCR: %08x\n", v); |
| 1364 | printk("\n"); |
| 1365 | } |
| 1366 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1367 | __apicdebuginit(void) print_all_local_APICs(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1368 | { |
Jens Axboe | 15c8b6c | 2008-05-09 09:39:44 +0200 | [diff] [blame] | 1369 | on_each_cpu(print_local_APIC, NULL, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1370 | } |
| 1371 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1372 | __apicdebuginit(void) print_PIC(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1373 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1374 | unsigned int v; |
| 1375 | unsigned long flags; |
| 1376 | |
| 1377 | if (apic_verbosity == APIC_QUIET) |
| 1378 | return; |
| 1379 | |
| 1380 | printk(KERN_DEBUG "\nprinting PIC contents\n"); |
| 1381 | |
| 1382 | spin_lock_irqsave(&i8259A_lock, flags); |
| 1383 | |
| 1384 | v = inb(0xa1) << 8 | inb(0x21); |
| 1385 | printk(KERN_DEBUG "... PIC IMR: %04x\n", v); |
| 1386 | |
| 1387 | v = inb(0xa0) << 8 | inb(0x20); |
| 1388 | printk(KERN_DEBUG "... PIC IRR: %04x\n", v); |
| 1389 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1390 | outb(0x0b, 0xa0); |
| 1391 | outb(0x0b, 0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1392 | v = inb(0xa0) << 8 | inb(0x20); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1393 | outb(0x0a, 0xa0); |
| 1394 | outb(0x0a, 0x20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1395 | |
| 1396 | spin_unlock_irqrestore(&i8259A_lock, flags); |
| 1397 | |
| 1398 | printk(KERN_DEBUG "... PIC ISR: %04x\n", v); |
| 1399 | |
| 1400 | v = inb(0x4d1) << 8 | inb(0x4d0); |
| 1401 | printk(KERN_DEBUG "... PIC ELCR: %04x\n", v); |
| 1402 | } |
| 1403 | |
Maciej W. Rozycki | 32f71af | 2008-07-21 00:52:49 +0100 | [diff] [blame] | 1404 | __apicdebuginit(int) print_all_ICs(void) |
| 1405 | { |
| 1406 | print_PIC(); |
| 1407 | print_all_local_APICs(); |
| 1408 | print_IO_APIC(); |
| 1409 | |
| 1410 | return 0; |
| 1411 | } |
| 1412 | |
| 1413 | fs_initcall(print_all_ICs); |
| 1414 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1415 | |
| 1416 | static void __init enable_IO_APIC(void) |
| 1417 | { |
| 1418 | union IO_APIC_reg_01 reg_01; |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1419 | int i8259_apic, i8259_pin; |
| 1420 | int i, apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1421 | unsigned long flags; |
| 1422 | |
Yinghai Lu | 0799e43 | 2008-08-19 20:49:48 -0700 | [diff] [blame] | 1423 | for (i = 0; i < pin_map_size; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1424 | irq_2_pin[i].pin = -1; |
| 1425 | irq_2_pin[i].next = 0; |
| 1426 | } |
| 1427 | if (!pirqs_enabled) |
| 1428 | for (i = 0; i < MAX_PIRQS; i++) |
| 1429 | pirq_entries[i] = -1; |
| 1430 | |
| 1431 | /* |
| 1432 | * The number of IO-APIC IRQ registers (== #pins): |
| 1433 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1434 | for (apic = 0; apic < nr_ioapics; apic++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1435 | spin_lock_irqsave(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1436 | reg_01.raw = io_apic_read(apic, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1437 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1438 | nr_ioapic_registers[apic] = reg_01.bits.entries+1; |
| 1439 | } |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1440 | for (apic = 0; apic < nr_ioapics; apic++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1441 | int pin; |
| 1442 | /* See if any of the pins is in ExtINT mode */ |
Eric W. Biederman | 1008fdd | 2006-01-11 22:46:06 +0100 | [diff] [blame] | 1443 | for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1444 | struct IO_APIC_route_entry entry; |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1445 | entry = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1446 | |
| 1447 | |
| 1448 | /* If the interrupt line is enabled and in ExtInt mode |
| 1449 | * I have found the pin where the i8259 is connected. |
| 1450 | */ |
| 1451 | if ((entry.mask == 0) && (entry.delivery_mode == dest_ExtINT)) { |
| 1452 | ioapic_i8259.apic = apic; |
| 1453 | ioapic_i8259.pin = pin; |
| 1454 | goto found_i8259; |
| 1455 | } |
| 1456 | } |
| 1457 | } |
| 1458 | found_i8259: |
| 1459 | /* Look to see what if the MP table has reported the ExtINT */ |
| 1460 | /* If we could not find the appropriate pin by looking at the ioapic |
| 1461 | * the i8259 probably is not connected the ioapic but give the |
| 1462 | * mptable a chance anyway. |
| 1463 | */ |
| 1464 | i8259_pin = find_isa_irq_pin(0, mp_ExtINT); |
| 1465 | i8259_apic = find_isa_irq_apic(0, mp_ExtINT); |
| 1466 | /* Trust the MP table if nothing is setup in the hardware */ |
| 1467 | if ((ioapic_i8259.pin == -1) && (i8259_pin >= 0)) { |
| 1468 | printk(KERN_WARNING "ExtINT not setup in hardware but reported by MP table\n"); |
| 1469 | ioapic_i8259.pin = i8259_pin; |
| 1470 | ioapic_i8259.apic = i8259_apic; |
| 1471 | } |
| 1472 | /* Complain if the MP table and the hardware disagree */ |
| 1473 | if (((ioapic_i8259.apic != i8259_apic) || (ioapic_i8259.pin != i8259_pin)) && |
| 1474 | (i8259_pin >= 0) && (ioapic_i8259.pin >= 0)) |
| 1475 | { |
| 1476 | printk(KERN_WARNING "ExtINT in hardware and MP table differ\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1477 | } |
| 1478 | |
| 1479 | /* |
| 1480 | * Do not trust the IO-APIC being empty at bootup |
| 1481 | */ |
| 1482 | clear_IO_APIC(); |
| 1483 | } |
| 1484 | |
| 1485 | /* |
| 1486 | * Not an __init, needed by the reboot code |
| 1487 | */ |
| 1488 | void disable_IO_APIC(void) |
| 1489 | { |
| 1490 | /* |
| 1491 | * Clear the IO-APIC before rebooting: |
| 1492 | */ |
| 1493 | clear_IO_APIC(); |
| 1494 | |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1495 | /* |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 1496 | * If the i8259 is routed through an IOAPIC |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1497 | * Put that IOAPIC in virtual wire mode |
Karsten Wiese | 0b968d2 | 2005-09-09 12:59:04 +0200 | [diff] [blame] | 1498 | * so legacy interrupts can be delivered. |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1499 | */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1500 | if (ioapic_i8259.pin != -1) { |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1501 | struct IO_APIC_route_entry entry; |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1502 | |
| 1503 | memset(&entry, 0, sizeof(entry)); |
| 1504 | entry.mask = 0; /* Enabled */ |
| 1505 | entry.trigger = 0; /* Edge */ |
| 1506 | entry.irr = 0; |
| 1507 | entry.polarity = 0; /* High */ |
| 1508 | entry.delivery_status = 0; |
| 1509 | entry.dest_mode = 0; /* Physical */ |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1510 | entry.delivery_mode = dest_ExtINT; /* ExtInt */ |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1511 | entry.vector = 0; |
Yinghai Lu | 4c9961d | 2008-07-11 18:44:16 -0700 | [diff] [blame] | 1512 | entry.dest.physical.physical_dest = read_apic_id(); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1513 | |
| 1514 | /* |
| 1515 | * Add it to the IO-APIC irq-routing table: |
| 1516 | */ |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1517 | ioapic_write_entry(ioapic_i8259.apic, ioapic_i8259.pin, entry); |
Eric W. Biederman | 650927e | 2005-06-25 14:57:44 -0700 | [diff] [blame] | 1518 | } |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1519 | disconnect_bsp_APIC(ioapic_i8259.pin != -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1520 | } |
| 1521 | |
| 1522 | /* |
| 1523 | * function to set the IO-APIC physical IDs based on the |
| 1524 | * values stored in the MPC table. |
| 1525 | * |
| 1526 | * by Matt Domsch <Matt_Domsch@dell.com> Tue Dec 21 12:25:05 CST 1999 |
| 1527 | */ |
| 1528 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1529 | static void __init setup_ioapic_ids_from_mpc(void) |
| 1530 | { |
| 1531 | union IO_APIC_reg_00 reg_00; |
| 1532 | physid_mask_t phys_id_present_map; |
| 1533 | int apic; |
| 1534 | int i; |
| 1535 | unsigned char old_id; |
| 1536 | unsigned long flags; |
| 1537 | |
Yinghai Lu | a4dbc34 | 2008-07-25 02:14:28 -0700 | [diff] [blame] | 1538 | if (x86_quirks->setup_ioapic_ids && x86_quirks->setup_ioapic_ids()) |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 1539 | return; |
Yinghai Lu | d49c428 | 2008-06-08 18:31:54 -0700 | [diff] [blame] | 1540 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1541 | /* |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 1542 | * Don't check I/O APIC IDs for xAPIC systems. They have |
| 1543 | * no meaning without the serial APIC bus. |
| 1544 | */ |
Shaohua Li | 7c5c1e4 | 2006-03-23 02:59:53 -0800 | [diff] [blame] | 1545 | if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) |
| 1546 | || APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) |
Natalie Protasevich | ca05fea | 2005-06-23 00:08:22 -0700 | [diff] [blame] | 1547 | return; |
| 1548 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1549 | * This is broken; anything with a real cpu count has to |
| 1550 | * circumvent this idiocy regardless. |
| 1551 | */ |
| 1552 | phys_id_present_map = ioapic_phys_id_map(phys_cpu_present_map); |
| 1553 | |
| 1554 | /* |
| 1555 | * Set the IOAPIC ID to the value stored in the MPC table. |
| 1556 | */ |
| 1557 | for (apic = 0; apic < nr_ioapics; apic++) { |
| 1558 | |
| 1559 | /* Read the register 0 value */ |
| 1560 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1561 | reg_00.raw = io_apic_read(apic, 0); |
| 1562 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1563 | |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1564 | old_id = mp_ioapics[apic].mp_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1565 | |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1566 | if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1567 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1568 | apic, mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1569 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 1570 | reg_00.bits.ID); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1571 | mp_ioapics[apic].mp_apicid = reg_00.bits.ID; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1572 | } |
| 1573 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1574 | /* |
| 1575 | * Sanity check, is the ID really free? Every APIC in a |
| 1576 | * system must have a unique ID or we get lots of nice |
| 1577 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 1578 | */ |
| 1579 | if (check_apicid_used(phys_id_present_map, |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1580 | mp_ioapics[apic].mp_apicid)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1581 | printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1582 | apic, mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1583 | for (i = 0; i < get_physical_broadcast(); i++) |
| 1584 | if (!physid_isset(i, phys_id_present_map)) |
| 1585 | break; |
| 1586 | if (i >= get_physical_broadcast()) |
| 1587 | panic("Max APIC ID exceeded!\n"); |
| 1588 | printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n", |
| 1589 | i); |
| 1590 | physid_set(i, phys_id_present_map); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1591 | mp_ioapics[apic].mp_apicid = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1592 | } else { |
| 1593 | physid_mask_t tmp; |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1594 | tmp = apicid_to_cpu_present(mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1595 | apic_printk(APIC_VERBOSE, "Setting %d in the " |
| 1596 | "phys_id_present_map\n", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1597 | mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1598 | physids_or(phys_id_present_map, phys_id_present_map, tmp); |
| 1599 | } |
| 1600 | |
| 1601 | |
| 1602 | /* |
| 1603 | * We need to adjust the IRQ routing table |
| 1604 | * if the ID changed. |
| 1605 | */ |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1606 | if (old_id != mp_ioapics[apic].mp_apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1607 | for (i = 0; i < mp_irq_entries; i++) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 1608 | if (mp_irqs[i].mp_dstapic == old_id) |
| 1609 | mp_irqs[i].mp_dstapic |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1610 | = mp_ioapics[apic].mp_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1611 | |
| 1612 | /* |
| 1613 | * Read the right value from the MPC table and |
| 1614 | * write it into the ID register. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1615 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 1617 | "...changing IO-APIC physical APIC ID to %d ...", |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1618 | mp_ioapics[apic].mp_apicid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1619 | |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1620 | reg_00.bits.ID = mp_ioapics[apic].mp_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1621 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1622 | io_apic_write(apic, 0, reg_00.raw); |
| 1623 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 1624 | |
| 1625 | /* |
| 1626 | * Sanity check |
| 1627 | */ |
| 1628 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1629 | reg_00.raw = io_apic_read(apic, 0); |
| 1630 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 1631 | if (reg_00.bits.ID != mp_ioapics[apic].mp_apicid) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1632 | printk("could not set ID!\n"); |
| 1633 | else |
| 1634 | apic_printk(APIC_VERBOSE, " ok.\n"); |
| 1635 | } |
| 1636 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1637 | |
Zachary Amsden | 7ce0bcf | 2007-02-13 13:26:21 +0100 | [diff] [blame] | 1638 | int no_timer_check __initdata; |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 1639 | |
| 1640 | static int __init notimercheck(char *s) |
| 1641 | { |
| 1642 | no_timer_check = 1; |
| 1643 | return 1; |
| 1644 | } |
| 1645 | __setup("no_timer_check", notimercheck); |
| 1646 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1647 | /* |
| 1648 | * There is a nasty bug in some older SMP boards, their mptable lies |
| 1649 | * about the timer IRQ. We do the following to work around the situation: |
| 1650 | * |
| 1651 | * - timer IRQ defaults to IO-APIC IRQ |
| 1652 | * - if this function detects that timer IRQs are defunct, then we fall |
| 1653 | * back to ISA timer IRQs |
| 1654 | */ |
Adrian Bunk | f0a7a5c | 2007-07-21 17:10:29 +0200 | [diff] [blame] | 1655 | static int __init timer_irq_works(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1656 | { |
| 1657 | unsigned long t1 = jiffies; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 1658 | unsigned long flags; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1659 | |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 1660 | if (no_timer_check) |
| 1661 | return 1; |
| 1662 | |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 1663 | local_save_flags(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1664 | local_irq_enable(); |
| 1665 | /* Let ten ticks pass... */ |
| 1666 | mdelay((10 * 1000) / HZ); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 1667 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1668 | |
| 1669 | /* |
| 1670 | * Expect a few ticks at least, to be sure some possible |
| 1671 | * glue logic does not lock up after one or two first |
| 1672 | * ticks in a non-ExtINT mode. Also the local APIC |
| 1673 | * might have cached one ExtINT interrupt. Finally, at |
| 1674 | * least one tick may be lost due to delays. |
| 1675 | */ |
Julia Lawall | 1d16b53 | 2008-01-30 13:32:19 +0100 | [diff] [blame] | 1676 | if (time_after(jiffies, t1 + 4)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1677 | return 1; |
| 1678 | |
| 1679 | return 0; |
| 1680 | } |
| 1681 | |
| 1682 | /* |
| 1683 | * In the SMP+IOAPIC case it might happen that there are an unspecified |
| 1684 | * number of pending IRQ events unhandled. These cases are very rare, |
| 1685 | * so we 'resend' these IRQs via IPIs, to the same CPU. It's much |
| 1686 | * better to do it this way as thus we do not have to be aware of |
| 1687 | * 'pending' interrupts in the IRQ path, except at this point. |
| 1688 | */ |
| 1689 | /* |
| 1690 | * Edge triggered needs to resend any interrupt |
| 1691 | * that was delayed but this is now handled in the device |
| 1692 | * independent code. |
| 1693 | */ |
| 1694 | |
| 1695 | /* |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1696 | * Startup quirk: |
| 1697 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1698 | * Starting up a edge-triggered IO-APIC interrupt is |
| 1699 | * nasty - we need to make sure that we get the edge. |
| 1700 | * If it is already asserted for some reason, we need |
| 1701 | * return 1 to indicate that is was pending. |
| 1702 | * |
| 1703 | * This is not complete - we should be able to fake |
| 1704 | * an edge even if it isn't on the 8259A... |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1705 | * |
| 1706 | * (We do this for level-triggered IRQs too - it cannot hurt.) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1707 | */ |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1708 | static unsigned int startup_ioapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1709 | { |
| 1710 | int was_pending = 0; |
| 1711 | unsigned long flags; |
| 1712 | |
| 1713 | spin_lock_irqsave(&ioapic_lock, flags); |
| 1714 | if (irq < 16) { |
| 1715 | disable_8259A_irq(irq); |
| 1716 | if (i8259A_irq_pending(irq)) |
| 1717 | was_pending = 1; |
| 1718 | } |
| 1719 | __unmask_IO_APIC_irq(irq); |
| 1720 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 1721 | |
| 1722 | return was_pending; |
| 1723 | } |
| 1724 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1725 | static void ack_ioapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1726 | { |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1727 | move_native_irq(irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1728 | ack_APIC_irq(); |
| 1729 | } |
| 1730 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1731 | static void ack_ioapic_quirk_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1732 | { |
| 1733 | unsigned long v; |
| 1734 | int i; |
| 1735 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1736 | move_native_irq(irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1737 | /* |
| 1738 | * It appears there is an erratum which affects at least version 0x11 |
| 1739 | * of I/O APIC (that's the 82093AA and cores integrated into various |
| 1740 | * chipsets). Under certain conditions a level-triggered interrupt is |
| 1741 | * erroneously delivered as edge-triggered one but the respective IRR |
| 1742 | * bit gets set nevertheless. As a result the I/O unit expects an EOI |
| 1743 | * message but it will never arrive and further interrupts are blocked |
| 1744 | * from the source. The exact reason is so far unknown, but the |
| 1745 | * phenomenon was observed when two consecutive interrupt requests |
| 1746 | * from a given source get delivered to the same CPU and the source is |
| 1747 | * temporarily disabled in between. |
| 1748 | * |
| 1749 | * A workaround is to simulate an EOI message manually. We achieve it |
| 1750 | * by setting the trigger mode to edge and then to level when the edge |
| 1751 | * trigger mode gets detected in the TMR of a local APIC for a |
| 1752 | * level-triggered interrupt. We mask the source for the time of the |
| 1753 | * operation to prevent an edge-triggered interrupt escaping meanwhile. |
| 1754 | * The idea is from Manfred Spraul. --macro |
| 1755 | */ |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 1756 | i = irq_cfg(irq)->vector; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1757 | |
| 1758 | v = apic_read(APIC_TMR + ((i & ~0x1f) >> 1)); |
| 1759 | |
| 1760 | ack_APIC_irq(); |
| 1761 | |
| 1762 | if (!(v & (1 << (i & 0x1f)))) { |
| 1763 | atomic_inc(&irq_mis_count); |
| 1764 | spin_lock(&ioapic_lock); |
| 1765 | __mask_and_edge_IO_APIC_irq(irq); |
| 1766 | __unmask_and_level_IO_APIC_irq(irq); |
| 1767 | spin_unlock(&ioapic_lock); |
| 1768 | } |
| 1769 | } |
| 1770 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1771 | static int ioapic_retrigger_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1772 | { |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 1773 | send_IPI_self(irq_cfg(irq)->vector); |
Ingo Molnar | c0ad90a | 2006-06-29 02:24:44 -0700 | [diff] [blame] | 1774 | |
| 1775 | return 1; |
| 1776 | } |
| 1777 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1778 | static struct irq_chip ioapic_chip __read_mostly = { |
| 1779 | .name = "IO-APIC", |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1780 | .startup = startup_ioapic_irq, |
| 1781 | .mask = mask_IO_APIC_irq, |
| 1782 | .unmask = unmask_IO_APIC_irq, |
| 1783 | .ack = ack_ioapic_irq, |
| 1784 | .eoi = ack_ioapic_quirk_irq, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 1785 | #ifdef CONFIG_SMP |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1786 | .set_affinity = set_ioapic_affinity_irq, |
Ashok Raj | 54d5d42 | 2005-09-06 15:16:15 -0700 | [diff] [blame] | 1787 | #endif |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 1788 | .retrigger = ioapic_retrigger_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1789 | }; |
| 1790 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1791 | |
| 1792 | static inline void init_IO_APIC_traps(void) |
| 1793 | { |
| 1794 | int irq; |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1795 | struct irq_desc *desc; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 1796 | struct irq_cfg *cfg; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1797 | |
| 1798 | /* |
| 1799 | * NOTE! The local APIC isn't very good at handling |
| 1800 | * multiple interrupts at the same interrupt level. |
| 1801 | * As the interrupt level is determined by taking the |
| 1802 | * vector number and shifting that right by 4, we |
| 1803 | * want to spread these out a bit so that they don't |
| 1804 | * all fall in the same interrupt level. |
| 1805 | * |
| 1806 | * Also, we've got to be careful not to trash gate |
| 1807 | * 0x80, because int 0x80 is hm, kind of importantish. ;) |
| 1808 | */ |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 1809 | for_each_irq_cfg(cfg) { |
| 1810 | irq = cfg->irq; |
| 1811 | if (IO_APIC_IRQ(irq) && !cfg->vector) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1812 | /* |
| 1813 | * Hmm.. We don't have an entry for this, |
| 1814 | * so default to an old-fashioned 8259 |
| 1815 | * interrupt if we can.. |
| 1816 | */ |
| 1817 | if (irq < 16) |
| 1818 | make_8259A_irq(irq); |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1819 | else { |
| 1820 | desc = irq_to_desc(irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1821 | /* Strange. Oh, well.. */ |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1822 | desc->chip = &no_irq_chip; |
| 1823 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1824 | } |
| 1825 | } |
| 1826 | } |
| 1827 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1828 | /* |
| 1829 | * The local APIC irq-chip implementation: |
| 1830 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1831 | |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 1832 | static void ack_lapic_irq(unsigned int irq) |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1833 | { |
| 1834 | ack_APIC_irq(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1835 | } |
| 1836 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1837 | static void mask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1838 | { |
| 1839 | unsigned long v; |
| 1840 | |
| 1841 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 1842 | apic_write(APIC_LVT0, v | APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1843 | } |
| 1844 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1845 | static void unmask_lapic_irq(unsigned int irq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1846 | { |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1847 | unsigned long v; |
| 1848 | |
| 1849 | v = apic_read(APIC_LVT0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 1850 | apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1851 | } |
| 1852 | |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1853 | static struct irq_chip lapic_chip __read_mostly = { |
Maciej W. Rozycki | 9a1c619 | 2008-05-27 21:19:09 +0100 | [diff] [blame] | 1854 | .name = "local-APIC", |
Ingo Molnar | f5b9ed7 | 2006-10-04 02:16:26 -0700 | [diff] [blame] | 1855 | .mask = mask_lapic_irq, |
| 1856 | .unmask = unmask_lapic_irq, |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 1857 | .ack = ack_lapic_irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1858 | }; |
| 1859 | |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 1860 | static void lapic_register_intr(int irq, int vector) |
| 1861 | { |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 1862 | struct irq_desc *desc; |
| 1863 | |
| 1864 | desc = irq_to_desc(irq); |
| 1865 | desc->status &= ~IRQ_LEVEL; |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 1866 | set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq, |
| 1867 | "edge"); |
| 1868 | set_intr_gate(vector, interrupt[irq]); |
| 1869 | } |
| 1870 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 1871 | static void __init setup_nmi(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1872 | { |
| 1873 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1874 | * Dirty trick to enable the NMI watchdog ... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1875 | * We put the 8259A master into AEOI mode and |
| 1876 | * unmask on all local APICs LVT0 as NMI. |
| 1877 | * |
| 1878 | * The idea to use the 8259A in AEOI mode ('8259A Virtual Wire') |
| 1879 | * is from Maciej W. Rozycki - so we do not have to EOI from |
| 1880 | * the NMI handler or the timer interrupt. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 1881 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1882 | apic_printk(APIC_VERBOSE, KERN_INFO "activating NMI Watchdog ..."); |
| 1883 | |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 1884 | enable_NMI_through_LVT0(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1885 | |
| 1886 | apic_printk(APIC_VERBOSE, " done.\n"); |
| 1887 | } |
| 1888 | |
| 1889 | /* |
| 1890 | * This looks a bit hackish but it's about the only one way of sending |
| 1891 | * a few INTA cycles to 8259As and any associated glue logic. ICR does |
| 1892 | * not support the ExtINT mode, unfortunately. We need to send these |
| 1893 | * cycles as some i82489DX-based boards have glue logic that keeps the |
| 1894 | * 8259A interrupt line asserted until INTA. --macro |
| 1895 | */ |
Jacek Luczak | 28acf28 | 2008-04-12 17:41:12 +0200 | [diff] [blame] | 1896 | static inline void __init unlock_ExtINT_logic(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1897 | { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1898 | int apic, pin, i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1899 | struct IO_APIC_route_entry entry0, entry1; |
| 1900 | unsigned char save_control, save_freq_select; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1901 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1902 | pin = find_isa_irq_pin(8, mp_INT); |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 1903 | if (pin == -1) { |
| 1904 | WARN_ON_ONCE(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1905 | return; |
Adrian Bunk | 956fb53 | 2006-12-07 02:14:11 +0100 | [diff] [blame] | 1906 | } |
| 1907 | apic = find_isa_irq_apic(8, mp_INT); |
| 1908 | if (apic == -1) { |
| 1909 | WARN_ON_ONCE(1); |
| 1910 | return; |
| 1911 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1912 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1913 | entry0 = ioapic_read_entry(apic, pin); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1914 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1915 | |
| 1916 | memset(&entry1, 0, sizeof(entry1)); |
| 1917 | |
| 1918 | entry1.dest_mode = 0; /* physical delivery */ |
| 1919 | entry1.mask = 0; /* unmask IRQ now */ |
| 1920 | entry1.dest.physical.physical_dest = hard_smp_processor_id(); |
| 1921 | entry1.delivery_mode = dest_ExtINT; |
| 1922 | entry1.polarity = entry0.polarity; |
| 1923 | entry1.trigger = 0; |
| 1924 | entry1.vector = 0; |
| 1925 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1926 | ioapic_write_entry(apic, pin, entry1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1927 | |
| 1928 | save_control = CMOS_READ(RTC_CONTROL); |
| 1929 | save_freq_select = CMOS_READ(RTC_FREQ_SELECT); |
| 1930 | CMOS_WRITE((save_freq_select & ~RTC_RATE_SELECT) | 0x6, |
| 1931 | RTC_FREQ_SELECT); |
| 1932 | CMOS_WRITE(save_control | RTC_PIE, RTC_CONTROL); |
| 1933 | |
| 1934 | i = 100; |
| 1935 | while (i-- > 0) { |
| 1936 | mdelay(10); |
| 1937 | if ((CMOS_READ(RTC_INTR_FLAGS) & RTC_PF) == RTC_PF) |
| 1938 | i -= 10; |
| 1939 | } |
| 1940 | |
| 1941 | CMOS_WRITE(save_control, RTC_CONTROL); |
| 1942 | CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1943 | clear_IO_APIC_pin(apic, pin); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1944 | |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 1945 | ioapic_write_entry(apic, pin, entry0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1946 | } |
| 1947 | |
| 1948 | /* |
| 1949 | * This code may look a bit paranoid, but it's supposed to cooperate with |
| 1950 | * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ |
| 1951 | * is so screwy. Thanks to Brian Perkins for testing/hacking this beast |
| 1952 | * fanatically on his truly buggy board. |
| 1953 | */ |
Zachary Amsden | 8542b20 | 2006-12-07 02:14:09 +0100 | [diff] [blame] | 1954 | static inline void __init check_timer(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1955 | { |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1956 | int apic1, pin1, apic2, pin2; |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 1957 | int no_pin1 = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1958 | int vector; |
Ingo Molnar | 6e90894 | 2008-03-21 14:32:36 +0100 | [diff] [blame] | 1959 | unsigned int ver; |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 1960 | unsigned long flags; |
| 1961 | |
| 1962 | local_irq_save(flags); |
Maciej W. Rozycki | d4d25de | 2007-11-26 20:42:19 +0100 | [diff] [blame] | 1963 | |
Ingo Molnar | 6e90894 | 2008-03-21 14:32:36 +0100 | [diff] [blame] | 1964 | ver = apic_read(APIC_LVR); |
| 1965 | ver = GET_APIC_VERSION(ver); |
| 1966 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1967 | /* |
| 1968 | * get/set the timer IRQ vector: |
| 1969 | */ |
| 1970 | disable_8259A_irq(0); |
| 1971 | vector = assign_irq_vector(0); |
| 1972 | set_intr_gate(vector, interrupt[0]); |
| 1973 | |
| 1974 | /* |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 1975 | * As IRQ0 is to be enabled in the 8259A, the virtual |
| 1976 | * wire has to be disabled in the local APIC. Also |
| 1977 | * timer interrupts need to be acknowledged manually in |
| 1978 | * the 8259A for the i82489DX when using the NMI |
| 1979 | * watchdog as that APIC treats NMIs as level-triggered. |
| 1980 | * The AEOI mode will finish them in the 8259A |
| 1981 | * automatically. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1982 | */ |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 1983 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1984 | init_8259A(1); |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 1985 | timer_ack = (nmi_watchdog == NMI_IO_APIC && !APIC_INTEGRATED(ver)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1986 | |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 1987 | pin1 = find_isa_irq_pin(0, mp_INT); |
| 1988 | apic1 = find_isa_irq_apic(0, mp_INT); |
| 1989 | pin2 = ioapic_i8259.pin; |
| 1990 | apic2 = ioapic_i8259.apic; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1991 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 1992 | apic_printk(APIC_QUIET, KERN_INFO "..TIMER: vector=0x%02X " |
| 1993 | "apic1=%d pin1=%d apic2=%d pin2=%d\n", |
| 1994 | vector, apic1, pin1, apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1995 | |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 1996 | /* |
| 1997 | * Some BIOS writers are clueless and report the ExtINTA |
| 1998 | * I/O APIC input from the cascaded 8259A as the timer |
| 1999 | * interrupt input. So just in case, if only one pin |
| 2000 | * was found above, try it both directly and through the |
| 2001 | * 8259A. |
| 2002 | */ |
| 2003 | if (pin1 == -1) { |
| 2004 | pin1 = pin2; |
| 2005 | apic1 = apic2; |
| 2006 | no_pin1 = 1; |
| 2007 | } else if (pin2 == -1) { |
| 2008 | pin2 = pin1; |
| 2009 | apic2 = apic1; |
| 2010 | } |
| 2011 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2012 | if (pin1 != -1) { |
| 2013 | /* |
| 2014 | * Ok, does IRQ0 through the IOAPIC work? |
| 2015 | */ |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2016 | if (no_pin1) { |
| 2017 | add_pin_to_irq(0, apic1, pin1); |
| 2018 | setup_timer_IRQ0_pin(apic1, pin1, vector); |
| 2019 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2020 | unmask_IO_APIC_irq(0); |
| 2021 | if (timer_irq_works()) { |
| 2022 | if (nmi_watchdog == NMI_IO_APIC) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2023 | setup_nmi(); |
| 2024 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2025 | } |
Chuck Ebbert | 66759a0 | 2005-09-12 18:49:25 +0200 | [diff] [blame] | 2026 | if (disable_timer_pin_1 > 0) |
| 2027 | clear_IO_APIC_pin(0, pin1); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2028 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2029 | } |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2030 | clear_IO_APIC_pin(apic1, pin1); |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2031 | if (!no_pin1) |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2032 | apic_printk(APIC_QUIET, KERN_ERR "..MP-BIOS bug: " |
| 2033 | "8254 timer not connected to IO-APIC\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2034 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2035 | apic_printk(APIC_QUIET, KERN_INFO "...trying to set up timer " |
| 2036 | "(IRQ0) through the 8259A ...\n"); |
| 2037 | apic_printk(APIC_QUIET, KERN_INFO |
| 2038 | "..... (found apic %d pin %d) ...\n", apic2, pin2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2039 | /* |
| 2040 | * legacy devices should be connected to IO APIC #0 |
| 2041 | */ |
Maciej W. Rozycki | 691874f | 2008-05-27 21:19:51 +0100 | [diff] [blame] | 2042 | replace_pin_at_irq(0, apic1, pin1, apic2, pin2); |
Maciej W. Rozycki | f7633ce | 2008-05-27 21:19:34 +0100 | [diff] [blame] | 2043 | setup_timer_IRQ0_pin(apic2, pin2, vector); |
Maciej W. Rozycki | 24742ec | 2008-05-27 21:19:40 +0100 | [diff] [blame] | 2044 | unmask_IO_APIC_irq(0); |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 2045 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2046 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2047 | apic_printk(APIC_QUIET, KERN_INFO "....... works.\n"); |
Maciej W. Rozycki | 35542c5 | 2008-05-21 22:10:22 +0100 | [diff] [blame] | 2048 | timer_through_8259 = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2049 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 2050 | disable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2051 | setup_nmi(); |
Maciej W. Rozycki | 60134eb | 2008-05-21 22:09:34 +0100 | [diff] [blame] | 2052 | enable_8259A_irq(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2053 | } |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2054 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2055 | } |
| 2056 | /* |
| 2057 | * Cleanup, just in case ... |
| 2058 | */ |
Maciej W. Rozycki | ecd2947 | 2008-05-21 22:09:19 +0100 | [diff] [blame] | 2059 | disable_8259A_irq(0); |
Eric W. Biederman | fcfd636 | 2005-10-30 14:59:39 -0800 | [diff] [blame] | 2060 | clear_IO_APIC_pin(apic2, pin2); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2061 | apic_printk(APIC_QUIET, KERN_INFO "....... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2062 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2063 | |
| 2064 | if (nmi_watchdog == NMI_IO_APIC) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2065 | apic_printk(APIC_QUIET, KERN_WARNING "timer doesn't work " |
| 2066 | "through the IO-APIC - disabling NMI Watchdog!\n"); |
Cyrill Gorcunov | 067fa0f | 2008-05-29 22:32:30 +0400 | [diff] [blame] | 2067 | nmi_watchdog = NMI_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2068 | } |
Maciej W. Rozycki | d11d579 | 2008-05-21 22:09:11 +0100 | [diff] [blame] | 2069 | timer_ack = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2070 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2071 | apic_printk(APIC_QUIET, KERN_INFO |
| 2072 | "...trying to set up timer as Virtual Wire IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2073 | |
Maciej W. Rozycki | c88ac1d | 2008-07-11 19:35:17 +0100 | [diff] [blame] | 2074 | lapic_register_intr(0, vector); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2075 | apic_write(APIC_LVT0, APIC_DM_FIXED | vector); /* Fixed mode */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2076 | enable_8259A_irq(0); |
| 2077 | |
| 2078 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2079 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2080 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2081 | } |
Maciej W. Rozycki | e67465f | 2008-05-21 22:09:26 +0100 | [diff] [blame] | 2082 | disable_8259A_irq(0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2083 | apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | vector); |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2084 | apic_printk(APIC_QUIET, KERN_INFO "..... failed.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2085 | |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2086 | apic_printk(APIC_QUIET, KERN_INFO |
| 2087 | "...trying to set up timer as ExtINT IRQ...\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2088 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2089 | init_8259A(0); |
| 2090 | make_8259A_irq(0); |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 2091 | apic_write(APIC_LVT0, APIC_DM_EXTINT); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2092 | |
| 2093 | unlock_ExtINT_logic(); |
| 2094 | |
| 2095 | if (timer_irq_works()) { |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2096 | apic_printk(APIC_QUIET, KERN_INFO "..... works.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2097 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2098 | } |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2099 | apic_printk(APIC_QUIET, KERN_INFO "..... failed :(.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2100 | panic("IO-APIC + timer doesn't work! Boot with apic=debug and send a " |
Maciej W. Rozycki | 49a66a0b | 2008-07-14 19:08:13 +0100 | [diff] [blame] | 2101 | "report. Then try booting with the 'noapic' option.\n"); |
Ingo Molnar | 4aae070 | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 2102 | out: |
| 2103 | local_irq_restore(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2104 | } |
| 2105 | |
| 2106 | /* |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 2107 | * Traditionally ISA IRQ2 is the cascade IRQ, and is not available |
| 2108 | * to devices. However there may be an I/O APIC pin available for |
| 2109 | * this interrupt regardless. The pin may be left unconnected, but |
| 2110 | * typically it will be reused as an ExtINT cascade interrupt for |
| 2111 | * the master 8259A. In the MPS case such a pin will normally be |
| 2112 | * reported as an ExtINT interrupt in the MP table. With ACPI |
| 2113 | * there is no provision for ExtINT interrupts, and in the absence |
| 2114 | * of an override it would be treated as an ordinary ISA I/O APIC |
| 2115 | * interrupt, that is edge-triggered and unmasked by default. We |
| 2116 | * used to do this, but it caused problems on some systems because |
| 2117 | * of the NMI watchdog and sometimes IRQ0 of the 8254 timer using |
| 2118 | * the same ExtINT cascade interrupt to drive the local APIC of the |
| 2119 | * bootstrap processor. Therefore we refrain from routing IRQ2 to |
| 2120 | * the I/O APIC in all cases now. No actual device should request |
| 2121 | * it anyway. --macro |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2122 | */ |
| 2123 | #define PIC_IRQS (1 << PIC_CASCADE_IR) |
| 2124 | |
| 2125 | void __init setup_IO_APIC(void) |
| 2126 | { |
Rusty Russell | dbeb2be | 2007-10-19 20:35:03 +0200 | [diff] [blame] | 2127 | int i; |
| 2128 | |
| 2129 | /* Reserve all the system vectors. */ |
Alan Mayer | 305b92a | 2008-04-15 15:36:56 -0500 | [diff] [blame] | 2130 | for (i = first_system_vector; i < NR_VECTORS; i++) |
Rusty Russell | dbeb2be | 2007-10-19 20:35:03 +0200 | [diff] [blame] | 2131 | set_bit(i, used_vectors); |
| 2132 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2133 | enable_IO_APIC(); |
| 2134 | |
Maciej W. Rozycki | af17478 | 2008-07-11 19:35:23 +0100 | [diff] [blame] | 2135 | io_apic_irqs = ~PIC_IRQS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2136 | |
| 2137 | printk("ENABLING IO-APIC IRQs\n"); |
| 2138 | |
| 2139 | /* |
| 2140 | * Set up IO-APIC IRQ routing. |
| 2141 | */ |
| 2142 | if (!acpi_ioapic) |
| 2143 | setup_ioapic_ids_from_mpc(); |
| 2144 | sync_Arb_IDs(); |
| 2145 | setup_IO_APIC_irqs(); |
| 2146 | init_IO_APIC_traps(); |
Linus Torvalds | 1e4c85f | 2005-10-31 19:16:17 -0800 | [diff] [blame] | 2147 | check_timer(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2148 | } |
| 2149 | |
| 2150 | /* |
| 2151 | * Called after all the initialization is done. If we didnt find any |
| 2152 | * APIC bugs then we can allow the modify fast path |
| 2153 | */ |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2154 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2155 | static int __init io_apic_bug_finalize(void) |
| 2156 | { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2157 | if (sis_apic_bug == -1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2158 | sis_apic_bug = 0; |
| 2159 | return 0; |
| 2160 | } |
| 2161 | |
| 2162 | late_initcall(io_apic_bug_finalize); |
| 2163 | |
| 2164 | struct sysfs_ioapic_data { |
| 2165 | struct sys_device dev; |
| 2166 | struct IO_APIC_route_entry entry[0]; |
| 2167 | }; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2168 | static struct sysfs_ioapic_data *mp_ioapic_data[MAX_IO_APICS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2169 | |
Pavel Machek | 438510f | 2005-04-16 15:25:24 -0700 | [diff] [blame] | 2170 | static int ioapic_suspend(struct sys_device *dev, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2171 | { |
| 2172 | struct IO_APIC_route_entry *entry; |
| 2173 | struct sysfs_ioapic_data *data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2174 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2175 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2176 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 2177 | entry = data->entry; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2178 | for (i = 0; i < nr_ioapic_registers[dev->id]; i++) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2179 | entry[i] = ioapic_read_entry(dev->id, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2180 | |
| 2181 | return 0; |
| 2182 | } |
| 2183 | |
| 2184 | static int ioapic_resume(struct sys_device *dev) |
| 2185 | { |
| 2186 | struct IO_APIC_route_entry *entry; |
| 2187 | struct sysfs_ioapic_data *data; |
| 2188 | unsigned long flags; |
| 2189 | union IO_APIC_reg_00 reg_00; |
| 2190 | int i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2191 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2192 | data = container_of(dev, struct sysfs_ioapic_data, dev); |
| 2193 | entry = data->entry; |
| 2194 | |
| 2195 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2196 | reg_00.raw = io_apic_read(dev->id, 0); |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 2197 | if (reg_00.bits.ID != mp_ioapics[dev->id].mp_apicid) { |
| 2198 | reg_00.bits.ID = mp_ioapics[dev->id].mp_apicid; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2199 | io_apic_write(dev->id, 0, reg_00.raw); |
| 2200 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2201 | spin_unlock_irqrestore(&ioapic_lock, flags); |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2202 | for (i = 0; i < nr_ioapic_registers[dev->id]; i++) |
Andi Kleen | cf4c6a2 | 2006-09-26 10:52:30 +0200 | [diff] [blame] | 2203 | ioapic_write_entry(dev->id, i, entry[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2204 | |
| 2205 | return 0; |
| 2206 | } |
| 2207 | |
| 2208 | static struct sysdev_class ioapic_sysdev_class = { |
Kay Sievers | af5ca3f | 2007-12-20 02:09:39 +0100 | [diff] [blame] | 2209 | .name = "ioapic", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2210 | .suspend = ioapic_suspend, |
| 2211 | .resume = ioapic_resume, |
| 2212 | }; |
| 2213 | |
| 2214 | static int __init ioapic_init_sysfs(void) |
| 2215 | { |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2216 | struct sys_device *dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2217 | int i, size, error = 0; |
| 2218 | |
| 2219 | error = sysdev_class_register(&ioapic_sysdev_class); |
| 2220 | if (error) |
| 2221 | return error; |
| 2222 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2223 | for (i = 0; i < nr_ioapics; i++) { |
| 2224 | size = sizeof(struct sys_device) + nr_ioapic_registers[i] |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2225 | * sizeof(struct IO_APIC_route_entry); |
Christophe Jaillet | 25556c1 | 2008-06-22 22:13:48 +0200 | [diff] [blame] | 2226 | mp_ioapic_data[i] = kzalloc(size, GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2227 | if (!mp_ioapic_data[i]) { |
| 2228 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 2229 | continue; |
| 2230 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2231 | dev = &mp_ioapic_data[i]->dev; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2232 | dev->id = i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2233 | dev->cls = &ioapic_sysdev_class; |
| 2234 | error = sysdev_register(dev); |
| 2235 | if (error) { |
| 2236 | kfree(mp_ioapic_data[i]); |
| 2237 | mp_ioapic_data[i] = NULL; |
| 2238 | printk(KERN_ERR "Can't suspend/resume IOAPIC %d\n", i); |
| 2239 | continue; |
| 2240 | } |
| 2241 | } |
| 2242 | |
| 2243 | return 0; |
| 2244 | } |
| 2245 | |
| 2246 | device_initcall(ioapic_init_sysfs); |
| 2247 | |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2248 | /* |
Eric W. Biederman | 95d7788 | 2006-10-04 02:17:01 -0700 | [diff] [blame] | 2249 | * Dynamic irq allocate and deallocation |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2250 | */ |
| 2251 | int create_irq(void) |
| 2252 | { |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2253 | /* Allocate an unused irq */ |
Andi Kleen | 306a22c | 2006-12-09 21:33:36 +0100 | [diff] [blame] | 2254 | int irq, new, vector = 0; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2255 | unsigned long flags; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 2256 | struct irq_cfg *cfg_new; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2257 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2258 | irq = -ENOSPC; |
| 2259 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | 0799e43 | 2008-08-19 20:49:48 -0700 | [diff] [blame] | 2260 | for (new = (nr_irqs - 1); new >= 0; new--) { |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2261 | if (platform_legacy_irq(new)) |
| 2262 | continue; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 2263 | cfg_new = irq_cfg(new); |
| 2264 | if (cfg_new && cfg_new->vector != 0) |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2265 | continue; |
Yinghai Lu | da51a82 | 2008-08-19 20:50:25 -0700 | [diff] [blame^] | 2266 | if (!cfg_new) |
| 2267 | cfg_new = irq_cfg_alloc(new); |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2268 | vector = __assign_irq_vector(new); |
| 2269 | if (likely(vector > 0)) |
| 2270 | irq = new; |
| 2271 | break; |
| 2272 | } |
| 2273 | spin_unlock_irqrestore(&vector_lock, flags); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2274 | |
Eric W. Biederman | ace80ab | 2006-10-04 02:16:47 -0700 | [diff] [blame] | 2275 | if (irq >= 0) { |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2276 | set_intr_gate(vector, interrupt[irq]); |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2277 | dynamic_irq_init(irq); |
| 2278 | } |
| 2279 | return irq; |
| 2280 | } |
| 2281 | |
| 2282 | void destroy_irq(unsigned int irq) |
| 2283 | { |
| 2284 | unsigned long flags; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2285 | |
| 2286 | dynamic_irq_cleanup(irq); |
| 2287 | |
| 2288 | spin_lock_irqsave(&vector_lock, flags); |
Yinghai Lu | a1420f3 | 2008-08-19 20:50:24 -0700 | [diff] [blame] | 2289 | clear_bit(irq_cfg(irq)->vector, used_vectors); |
| 2290 | irq_cfg(irq)->vector = 0; |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2291 | spin_unlock_irqrestore(&vector_lock, flags); |
| 2292 | } |
Eric W. Biederman | 3fc471e | 2006-10-04 02:16:39 -0700 | [diff] [blame] | 2293 | |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2294 | /* |
Simon Arlott | 27b46d7 | 2007-10-20 01:13:56 +0200 | [diff] [blame] | 2295 | * MSI message composition |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2296 | */ |
| 2297 | #ifdef CONFIG_PCI_MSI |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2298 | static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2299 | { |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2300 | int vector; |
| 2301 | unsigned dest; |
| 2302 | |
| 2303 | vector = assign_irq_vector(irq); |
| 2304 | if (vector >= 0) { |
| 2305 | dest = cpu_mask_to_apicid(TARGET_CPUS); |
| 2306 | |
| 2307 | msg->address_hi = MSI_ADDR_BASE_HI; |
| 2308 | msg->address_lo = |
| 2309 | MSI_ADDR_BASE_LO | |
| 2310 | ((INT_DEST_MODE == 0) ? |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2311 | MSI_ADDR_DEST_MODE_PHYSICAL: |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2312 | MSI_ADDR_DEST_MODE_LOGICAL) | |
| 2313 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? |
| 2314 | MSI_ADDR_REDIRECTION_CPU: |
| 2315 | MSI_ADDR_REDIRECTION_LOWPRI) | |
| 2316 | MSI_ADDR_DEST_ID(dest); |
| 2317 | |
| 2318 | msg->data = |
| 2319 | MSI_DATA_TRIGGER_EDGE | |
| 2320 | MSI_DATA_LEVEL_ASSERT | |
| 2321 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2322 | MSI_DATA_DELIVERY_FIXED: |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2323 | MSI_DATA_DELIVERY_LOWPRI) | |
| 2324 | MSI_DATA_VECTOR(vector); |
| 2325 | } |
| 2326 | return vector; |
| 2327 | } |
| 2328 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2329 | #ifdef CONFIG_SMP |
| 2330 | static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask) |
| 2331 | { |
| 2332 | struct msi_msg msg; |
| 2333 | unsigned int dest; |
| 2334 | cpumask_t tmp; |
| 2335 | int vector; |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2336 | struct irq_desc *desc; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2337 | |
| 2338 | cpus_and(tmp, mask, cpu_online_map); |
| 2339 | if (cpus_empty(tmp)) |
| 2340 | tmp = TARGET_CPUS; |
| 2341 | |
| 2342 | vector = assign_irq_vector(irq); |
| 2343 | if (vector < 0) |
| 2344 | return; |
| 2345 | |
| 2346 | dest = cpu_mask_to_apicid(mask); |
| 2347 | |
| 2348 | read_msi_msg(irq, &msg); |
| 2349 | |
| 2350 | msg.data &= ~MSI_DATA_VECTOR_MASK; |
| 2351 | msg.data |= MSI_DATA_VECTOR(vector); |
| 2352 | msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK; |
| 2353 | msg.address_lo |= MSI_ADDR_DEST_ID(dest); |
| 2354 | |
| 2355 | write_msi_msg(irq, &msg); |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2356 | desc = irq_to_desc(irq); |
| 2357 | desc->affinity = mask; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2358 | } |
| 2359 | #endif /* CONFIG_SMP */ |
| 2360 | |
| 2361 | /* |
| 2362 | * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices, |
| 2363 | * which implement the MSI or MSI-X Capability Structure. |
| 2364 | */ |
| 2365 | static struct irq_chip msi_chip = { |
| 2366 | .name = "PCI-MSI", |
| 2367 | .unmask = unmask_msi_irq, |
| 2368 | .mask = mask_msi_irq, |
| 2369 | .ack = ack_ioapic_irq, |
| 2370 | #ifdef CONFIG_SMP |
| 2371 | .set_affinity = set_msi_irq_affinity, |
| 2372 | #endif |
| 2373 | .retrigger = ioapic_retrigger_irq, |
| 2374 | }; |
| 2375 | |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 2376 | int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2377 | { |
| 2378 | struct msi_msg msg; |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 2379 | int irq, ret; |
| 2380 | irq = create_irq(); |
| 2381 | if (irq < 0) |
| 2382 | return irq; |
| 2383 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2384 | ret = msi_compose_msg(dev, irq, &msg); |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 2385 | if (ret < 0) { |
| 2386 | destroy_irq(irq); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2387 | return ret; |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 2388 | } |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2389 | |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 2390 | set_irq_msi(irq, desc); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2391 | write_msi_msg(irq, &msg); |
| 2392 | |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 2393 | set_irq_chip_and_handler_name(irq, &msi_chip, handle_edge_irq, |
| 2394 | "edge"); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2395 | |
Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 2396 | return 0; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 2397 | } |
| 2398 | |
| 2399 | void arch_teardown_msi_irq(unsigned int irq) |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2400 | { |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 2401 | destroy_irq(irq); |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2402 | } |
| 2403 | |
Eric W. Biederman | 2d3fcc1 | 2006-10-04 02:16:43 -0700 | [diff] [blame] | 2404 | #endif /* CONFIG_PCI_MSI */ |
| 2405 | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2406 | /* |
| 2407 | * Hypertransport interrupt support |
| 2408 | */ |
| 2409 | #ifdef CONFIG_HT_IRQ |
| 2410 | |
| 2411 | #ifdef CONFIG_SMP |
| 2412 | |
| 2413 | static void target_ht_irq(unsigned int irq, unsigned int dest) |
| 2414 | { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 2415 | struct ht_irq_msg msg; |
| 2416 | fetch_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2417 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 2418 | msg.address_lo &= ~(HT_IRQ_LOW_DEST_ID_MASK); |
| 2419 | msg.address_hi &= ~(HT_IRQ_HIGH_DEST_ID_MASK); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2420 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 2421 | msg.address_lo |= HT_IRQ_LOW_DEST_ID(dest); |
| 2422 | msg.address_hi |= HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2423 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 2424 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2425 | } |
| 2426 | |
| 2427 | static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask) |
| 2428 | { |
| 2429 | unsigned int dest; |
| 2430 | cpumask_t tmp; |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2431 | struct irq_desc *desc; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2432 | |
| 2433 | cpus_and(tmp, mask, cpu_online_map); |
| 2434 | if (cpus_empty(tmp)) |
| 2435 | tmp = TARGET_CPUS; |
| 2436 | |
| 2437 | cpus_and(mask, tmp, CPU_MASK_ALL); |
| 2438 | |
| 2439 | dest = cpu_mask_to_apicid(mask); |
| 2440 | |
| 2441 | target_ht_irq(irq, dest); |
Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 2442 | desc = irq_to_desc(irq); |
| 2443 | desc->affinity = mask; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2444 | } |
| 2445 | #endif |
| 2446 | |
Aneesh Kumar K.V | c37e108 | 2006-10-11 01:20:43 -0700 | [diff] [blame] | 2447 | static struct irq_chip ht_irq_chip = { |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2448 | .name = "PCI-HT", |
| 2449 | .mask = mask_ht_irq, |
| 2450 | .unmask = unmask_ht_irq, |
| 2451 | .ack = ack_ioapic_irq, |
| 2452 | #ifdef CONFIG_SMP |
| 2453 | .set_affinity = set_ht_irq_affinity, |
| 2454 | #endif |
| 2455 | .retrigger = ioapic_retrigger_irq, |
| 2456 | }; |
| 2457 | |
| 2458 | int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) |
| 2459 | { |
| 2460 | int vector; |
| 2461 | |
| 2462 | vector = assign_irq_vector(irq); |
| 2463 | if (vector >= 0) { |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 2464 | struct ht_irq_msg msg; |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2465 | unsigned dest; |
| 2466 | cpumask_t tmp; |
| 2467 | |
| 2468 | cpus_clear(tmp); |
| 2469 | cpu_set(vector >> 8, tmp); |
| 2470 | dest = cpu_mask_to_apicid(tmp); |
| 2471 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 2472 | msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2473 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 2474 | msg.address_lo = |
| 2475 | HT_IRQ_LOW_BASE | |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2476 | HT_IRQ_LOW_DEST_ID(dest) | |
| 2477 | HT_IRQ_LOW_VECTOR(vector) | |
| 2478 | ((INT_DEST_MODE == 0) ? |
| 2479 | HT_IRQ_LOW_DM_PHYSICAL : |
| 2480 | HT_IRQ_LOW_DM_LOGICAL) | |
| 2481 | HT_IRQ_LOW_RQEOI_EDGE | |
| 2482 | ((INT_DELIVERY_MODE != dest_LowestPrio) ? |
| 2483 | HT_IRQ_LOW_MT_FIXED : |
| 2484 | HT_IRQ_LOW_MT_ARBITRATED) | |
| 2485 | HT_IRQ_LOW_IRQ_MASKED; |
| 2486 | |
Eric W. Biederman | ec68307 | 2006-11-08 17:44:57 -0800 | [diff] [blame] | 2487 | write_ht_irq_msg(irq, &msg); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2488 | |
Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 2489 | set_irq_chip_and_handler_name(irq, &ht_irq_chip, |
| 2490 | handle_edge_irq, "edge"); |
Eric W. Biederman | 8b955b0 | 2006-10-04 02:16:55 -0700 | [diff] [blame] | 2491 | } |
| 2492 | return vector; |
| 2493 | } |
| 2494 | #endif /* CONFIG_HT_IRQ */ |
| 2495 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2496 | /* -------------------------------------------------------------------------- |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2497 | ACPI-based IOAPIC Configuration |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2498 | -------------------------------------------------------------------------- */ |
| 2499 | |
Len Brown | 888ba6c | 2005-08-24 12:07:20 -0400 | [diff] [blame] | 2500 | #ifdef CONFIG_ACPI |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2501 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2502 | int __init io_apic_get_unique_id(int ioapic, int apic_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2503 | { |
| 2504 | union IO_APIC_reg_00 reg_00; |
| 2505 | static physid_mask_t apic_id_map = PHYSID_MASK_NONE; |
| 2506 | physid_mask_t tmp; |
| 2507 | unsigned long flags; |
| 2508 | int i = 0; |
| 2509 | |
| 2510 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2511 | * The P4 platform supports up to 256 APIC IDs on two separate APIC |
| 2512 | * buses (one for LAPICs, one for IOAPICs), where predecessors only |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2513 | * supports up to 16 on one shared APIC bus. |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2514 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2515 | * TBD: Expand LAPIC/IOAPIC support on P4-class systems to take full |
| 2516 | * advantage of new APIC bus architecture. |
| 2517 | */ |
| 2518 | |
| 2519 | if (physids_empty(apic_id_map)) |
| 2520 | apic_id_map = ioapic_phys_id_map(phys_cpu_present_map); |
| 2521 | |
| 2522 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2523 | reg_00.raw = io_apic_read(ioapic, 0); |
| 2524 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2525 | |
| 2526 | if (apic_id >= get_physical_broadcast()) { |
| 2527 | printk(KERN_WARNING "IOAPIC[%d]: Invalid apic_id %d, trying " |
| 2528 | "%d\n", ioapic, apic_id, reg_00.bits.ID); |
| 2529 | apic_id = reg_00.bits.ID; |
| 2530 | } |
| 2531 | |
| 2532 | /* |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2533 | * Every APIC in a system must have a unique ID or we get lots of nice |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2534 | * 'stuck on smp_invalidate_needed IPI wait' messages. |
| 2535 | */ |
| 2536 | if (check_apicid_used(apic_id_map, apic_id)) { |
| 2537 | |
| 2538 | for (i = 0; i < get_physical_broadcast(); i++) { |
| 2539 | if (!check_apicid_used(apic_id_map, i)) |
| 2540 | break; |
| 2541 | } |
| 2542 | |
| 2543 | if (i == get_physical_broadcast()) |
| 2544 | panic("Max apic_id exceeded!\n"); |
| 2545 | |
| 2546 | printk(KERN_WARNING "IOAPIC[%d]: apic_id %d already used, " |
| 2547 | "trying %d\n", ioapic, apic_id, i); |
| 2548 | |
| 2549 | apic_id = i; |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2550 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2551 | |
| 2552 | tmp = apicid_to_cpu_present(apic_id); |
| 2553 | physids_or(apic_id_map, apic_id_map, tmp); |
| 2554 | |
| 2555 | if (reg_00.bits.ID != apic_id) { |
| 2556 | reg_00.bits.ID = apic_id; |
| 2557 | |
| 2558 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2559 | io_apic_write(ioapic, 0, reg_00.raw); |
| 2560 | reg_00.raw = io_apic_read(ioapic, 0); |
| 2561 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2562 | |
| 2563 | /* Sanity check */ |
Andreas Deresch | 6070f9e | 2006-02-26 04:18:34 +0100 | [diff] [blame] | 2564 | if (reg_00.bits.ID != apic_id) { |
| 2565 | printk("IOAPIC[%d]: Unable to change apic_id!\n", ioapic); |
| 2566 | return -1; |
| 2567 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2568 | } |
| 2569 | |
| 2570 | apic_printk(APIC_VERBOSE, KERN_INFO |
| 2571 | "IOAPIC[%d]: Assigned apic_id %d\n", ioapic, apic_id); |
| 2572 | |
| 2573 | return apic_id; |
| 2574 | } |
| 2575 | |
| 2576 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2577 | int __init io_apic_get_version(int ioapic) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2578 | { |
| 2579 | union IO_APIC_reg_01 reg_01; |
| 2580 | unsigned long flags; |
| 2581 | |
| 2582 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2583 | reg_01.raw = io_apic_read(ioapic, 1); |
| 2584 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2585 | |
| 2586 | return reg_01.bits.version; |
| 2587 | } |
| 2588 | |
| 2589 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2590 | int __init io_apic_get_redir_entries(int ioapic) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2591 | { |
| 2592 | union IO_APIC_reg_01 reg_01; |
| 2593 | unsigned long flags; |
| 2594 | |
| 2595 | spin_lock_irqsave(&ioapic_lock, flags); |
| 2596 | reg_01.raw = io_apic_read(ioapic, 1); |
| 2597 | spin_unlock_irqrestore(&ioapic_lock, flags); |
| 2598 | |
| 2599 | return reg_01.bits.entries; |
| 2600 | } |
| 2601 | |
| 2602 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2603 | int io_apic_set_pci_routing(int ioapic, int pin, int irq, int edge_level, int active_high_low) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2604 | { |
| 2605 | struct IO_APIC_route_entry entry; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2606 | |
| 2607 | if (!IO_APIC_IRQ(irq)) { |
| 2608 | printk(KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n", |
| 2609 | ioapic); |
| 2610 | return -EINVAL; |
| 2611 | } |
| 2612 | |
| 2613 | /* |
| 2614 | * Generate a PCI IRQ routing entry and program the IOAPIC accordingly. |
| 2615 | * Note that we mask (disable) IRQs now -- these get enabled when the |
| 2616 | * corresponding device driver registers for this IRQ. |
| 2617 | */ |
| 2618 | |
Paolo Ciarrocchi | 3606244 | 2008-06-08 13:07:18 +0200 | [diff] [blame] | 2619 | memset(&entry, 0, sizeof(entry)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2620 | |
| 2621 | entry.delivery_mode = INT_DELIVERY_MODE; |
| 2622 | entry.dest_mode = INT_DEST_MODE; |
| 2623 | entry.dest.logical.logical_dest = cpu_mask_to_apicid(TARGET_CPUS); |
| 2624 | entry.trigger = edge_level; |
| 2625 | entry.polarity = active_high_low; |
| 2626 | entry.mask = 1; |
| 2627 | |
| 2628 | /* |
| 2629 | * IRQs < 16 are already in the irq_2_pin[] map |
| 2630 | */ |
| 2631 | if (irq >= 16) |
| 2632 | add_pin_to_irq(irq, ioapic, pin); |
| 2633 | |
| 2634 | entry.vector = assign_irq_vector(irq); |
| 2635 | |
| 2636 | apic_printk(APIC_DEBUG, KERN_DEBUG "IOAPIC[%d]: Set PCI routing entry " |
| 2637 | "(%d-%d -> 0x%x -> IRQ %d Mode:%i Active:%i)\n", ioapic, |
Alexey Starikovskiy | ec2cd0a | 2008-05-14 19:03:10 +0400 | [diff] [blame] | 2638 | mp_ioapics[ioapic].mp_apicid, pin, entry.vector, irq, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2639 | edge_level, active_high_low); |
| 2640 | |
| 2641 | ioapic_register_intr(irq, entry.vector, edge_level); |
| 2642 | |
| 2643 | if (!ioapic && (irq < 16)) |
| 2644 | disable_8259A_irq(irq); |
| 2645 | |
Akinobu Mita | a2249cb | 2008-04-05 22:39:05 +0900 | [diff] [blame] | 2646 | ioapic_write_entry(ioapic, pin, entry); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2647 | |
| 2648 | return 0; |
| 2649 | } |
| 2650 | |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 2651 | int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity) |
| 2652 | { |
| 2653 | int i; |
| 2654 | |
| 2655 | if (skip_ioapic_setup) |
| 2656 | return -1; |
| 2657 | |
| 2658 | for (i = 0; i < mp_irq_entries; i++) |
Alexey Starikovskiy | 2fddb6e28 | 2008-05-14 19:03:17 +0400 | [diff] [blame] | 2659 | if (mp_irqs[i].mp_irqtype == mp_INT && |
| 2660 | mp_irqs[i].mp_srcbusirq == bus_irq) |
Shaohua Li | 61fd47e | 2007-11-17 01:05:28 -0500 | [diff] [blame] | 2661 | break; |
| 2662 | if (i >= mp_irq_entries) |
| 2663 | return -1; |
| 2664 | |
| 2665 | *trigger = irq_trigger(i); |
| 2666 | *polarity = irq_polarity(i); |
| 2667 | return 0; |
| 2668 | } |
| 2669 | |
Len Brown | 888ba6c | 2005-08-24 12:07:20 -0400 | [diff] [blame] | 2670 | #endif /* CONFIG_ACPI */ |
Rusty Russell | 1a3f239 | 2006-09-26 10:52:32 +0200 | [diff] [blame] | 2671 | |
| 2672 | static int __init parse_disable_timer_pin_1(char *arg) |
| 2673 | { |
| 2674 | disable_timer_pin_1 = 1; |
| 2675 | return 0; |
| 2676 | } |
| 2677 | early_param("disable_timer_pin_1", parse_disable_timer_pin_1); |
| 2678 | |
| 2679 | static int __init parse_enable_timer_pin_1(char *arg) |
| 2680 | { |
| 2681 | disable_timer_pin_1 = -1; |
| 2682 | return 0; |
| 2683 | } |
| 2684 | early_param("enable_timer_pin_1", parse_enable_timer_pin_1); |
| 2685 | |
| 2686 | static int __init parse_noapic(char *arg) |
| 2687 | { |
| 2688 | /* disable IO-APIC */ |
| 2689 | disable_ioapic_setup(); |
| 2690 | return 0; |
| 2691 | } |
| 2692 | early_param("noapic", parse_noapic); |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 2693 | |
| 2694 | void __init ioapic_init_mappings(void) |
| 2695 | { |
| 2696 | unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; |
| 2697 | int i; |
| 2698 | |
| 2699 | for (i = 0; i < nr_ioapics; i++) { |
| 2700 | if (smp_found_config) { |
| 2701 | ioapic_phys = mp_ioapics[i].mp_apicaddr; |
| 2702 | if (!ioapic_phys) { |
| 2703 | printk(KERN_ERR |
| 2704 | "WARNING: bogus zero IO-APIC " |
| 2705 | "address found in MPTABLE, " |
| 2706 | "disabling IO/APIC support!\n"); |
| 2707 | smp_found_config = 0; |
| 2708 | skip_ioapic_setup = 1; |
| 2709 | goto fake_ioapic_page; |
| 2710 | } |
| 2711 | } else { |
| 2712 | fake_ioapic_page: |
| 2713 | ioapic_phys = (unsigned long) |
| 2714 | alloc_bootmem_pages(PAGE_SIZE); |
| 2715 | ioapic_phys = __pa(ioapic_phys); |
| 2716 | } |
| 2717 | set_fixmap_nocache(idx, ioapic_phys); |
| 2718 | printk(KERN_DEBUG "mapped IOAPIC to %08lx (%08lx)\n", |
| 2719 | __fix_to_virt(idx), ioapic_phys); |
| 2720 | idx++; |
| 2721 | } |
| 2722 | } |
| 2723 | |