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Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -05001/*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#ifndef _CXLFLASH_COMMON_H
16#define _CXLFLASH_COMMON_H
17
18#include <linux/list.h>
Matthew R. Ochs0a27ae52015-10-21 15:11:52 -050019#include <linux/rwsem.h>
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050020#include <linux/types.h>
21#include <scsi/scsi.h>
22#include <scsi/scsi_device.h>
23
Matthew R. Ochs17ead262015-10-21 15:15:37 -050024extern const struct file_operations cxlflash_cxl_fops;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050025
26#define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */
27
28#define CXLFLASH_BLOCK_SIZE 4096 /* 4K blocks */
29#define CXLFLASH_MAX_XFER_SIZE 16777216 /* 16MB transfer */
30#define CXLFLASH_MAX_SECTORS (CXLFLASH_MAX_XFER_SIZE/512) /* SCSI wants
31 max_sectors
32 in units of
33 512 byte
34 sectors
35 */
36
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050037#define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))
38
39/* AFU command retry limit */
40#define MC_RETRY_CNT 5 /* sufficient for SCSI check and
41 certain AFU errors */
42
43/* Command management definitions */
44#define CXLFLASH_NUM_CMDS (2 * CXLFLASH_MAX_CMDS) /* Must be a pow2 for
45 alignment and more
46 efficient array
47 index derivation
48 */
49
Manoj N. Kumar83430832016-03-04 15:55:20 -060050#define CXLFLASH_MAX_CMDS 256
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050051#define CXLFLASH_MAX_CMDS_PER_LUN CXLFLASH_MAX_CMDS
52
Manoj N. Kumar83430832016-03-04 15:55:20 -060053/* RRQ for master issued cmds */
54#define NUM_RRQ_ENTRY CXLFLASH_MAX_CMDS
55
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050056
57static inline void check_sizes(void)
58{
59 BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_CMDS);
60}
61
62/* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
63#define CMD_BUFSIZE SIZE_4K
64
65/* flags in IOA status area for host use */
66#define B_DONE 0x01
67#define B_ERROR 0x02 /* set with B_DONE */
68#define B_TIMEOUT 0x04 /* set with B_DONE & B_ERROR */
69
70enum cxlflash_lr_state {
71 LINK_RESET_INVALID,
72 LINK_RESET_REQUIRED,
73 LINK_RESET_COMPLETE
74};
75
76enum cxlflash_init_state {
77 INIT_STATE_NONE,
78 INIT_STATE_PCI,
79 INIT_STATE_AFU,
80 INIT_STATE_SCSI
81};
82
Matthew R. Ochs5cdac812015-08-13 21:47:34 -050083enum cxlflash_state {
84 STATE_NORMAL, /* Normal running state, everything good */
Matthew R. Ochs439e85c2015-10-21 15:12:00 -050085 STATE_RESET, /* Reset state, trying to reset/recover */
Matthew R. Ochs5cdac812015-08-13 21:47:34 -050086 STATE_FAILTERM /* Failed/terminating state, error out users/threads */
87};
88
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050089/*
90 * Each context has its own set of resource handles that is visible
91 * only from that context.
92 */
93
94struct cxlflash_cfg {
95 struct afu *afu;
96 struct cxl_context *mcctx;
97
98 struct pci_dev *dev;
99 struct pci_device_id *dev_id;
100 struct Scsi_Host *host;
101
102 ulong cxlflash_regs_pci;
103
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500104 struct work_struct work_q;
105 enum cxlflash_init_state init_state;
106 enum cxlflash_lr_state lr_state;
107 int lr_port;
Matthew R. Ochsef510742015-10-21 15:13:37 -0500108 atomic_t scan_host_needed;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500109
110 struct cxl_afu *cxl_afu;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500111
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500112 atomic_t recovery_threads;
113 struct mutex ctx_recovery_mutex;
114 struct mutex ctx_tbl_list_mutex;
Matthew R. Ochs0a27ae52015-10-21 15:11:52 -0500115 struct rw_semaphore ioctl_rwsem;
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500116 struct ctx_info *ctx_tbl[MAX_CONTEXT];
117 struct list_head ctx_err_recovery; /* contexts w/ recovery pending */
118 struct file_operations cxl_fops;
119
Matthew R. Ochs2cb79262015-08-13 21:47:53 -0500120 /* Parameters that are LUN table related */
121 int last_lun_index[CXLFLASH_NUM_FC_PORTS];
122 int promote_lun_index;
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500123 struct list_head lluns; /* list of llun_info structs */
124
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500125 wait_queue_head_t tmf_waitq;
Matthew R. Ochs018d1dc952015-10-21 15:13:21 -0500126 spinlock_t tmf_slock;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500127 bool tmf_active;
Matthew R. Ochs439e85c2015-10-21 15:12:00 -0500128 wait_queue_head_t reset_waitq;
Matthew R. Ochs5cdac812015-08-13 21:47:34 -0500129 enum cxlflash_state state;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500130};
131
132struct afu_cmd {
133 struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */
134 struct sisl_ioasa sa; /* IOASA must follow IOARCB */
135 spinlock_t slock;
136 struct completion cevent;
137 char *buf; /* per command buffer */
138 struct afu *parent;
139 int slot;
140 atomic_t free;
141
142 u8 cmd_tmf:1;
143
144 /* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
145 * However for performance reasons the IOARCB/IOASA should be
146 * cache line aligned.
147 */
148} __aligned(cache_line_size());
149
150struct afu {
151 /* Stuff requiring alignment go first. */
152
Manoj N. Kumar83430832016-03-04 15:55:20 -0600153 u64 rrq_entry[NUM_RRQ_ENTRY]; /* 2K RRQ */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500154 /*
155 * Command & data for AFU commands.
156 */
157 struct afu_cmd cmd[CXLFLASH_NUM_CMDS];
158
159 /* Beware of alignment till here. Preferably introduce new
160 * fields after this point
161 */
162
163 /* AFU HW */
164 struct cxl_ioctl_start_work work;
Matthew R. Ochs1786f4a2015-10-21 15:14:48 -0500165 struct cxlflash_afu_map __iomem *afu_map; /* entire MMIO map */
166 struct sisl_host_map __iomem *host_map; /* MC host map */
167 struct sisl_ctrl_map __iomem *ctrl_map; /* MC control map */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500168
Manoj Kumarb45cdbaf2015-12-14 15:07:23 -0600169 struct kref mapcount;
170
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500171 ctx_hndl_t ctx_hndl; /* master's context handle */
172 u64 *hrrq_start;
173 u64 *hrrq_end;
174 u64 *hrrq_curr;
175 bool toggle;
176 bool read_room;
177 atomic64_t room;
178 u64 hb;
179 u32 cmd_couts; /* Number of command checkouts */
180 u32 internal_lun; /* User-desired LUN mode for this AFU */
181
Matthew R. Ochse5ce0672015-10-21 15:14:01 -0500182 char version[16];
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500183 u64 interface_version;
184
185 struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */
186
187};
188
189static inline u64 lun_to_lunid(u64 lun)
190{
Matthew R. Ochs1786f4a2015-10-21 15:14:48 -0500191 __be64 lun_id;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500192
193 int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
Matthew R. Ochs1786f4a2015-10-21 15:14:48 -0500194 return be64_to_cpu(lun_id);
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500195}
196
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500197int cxlflash_afu_sync(struct afu *, ctx_hndl_t, res_hndl_t, u8);
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500198void cxlflash_list_init(void);
199void cxlflash_term_global_luns(void);
200void cxlflash_free_errpage(void);
201int cxlflash_ioctl(struct scsi_device *, int, void __user *);
202void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *);
203int cxlflash_mark_contexts_error(struct cxlflash_cfg *);
204void cxlflash_term_local_luns(struct cxlflash_cfg *);
Matthew R. Ochs2cb79262015-08-13 21:47:53 -0500205void cxlflash_restore_luntable(struct cxlflash_cfg *);
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500206
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500207#endif /* ifndef _CXLFLASH_COMMON_H */