blob: 362773247fbfc3586e0025d84e006165c14613e0 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
Eric W. Biederman1ce03372006-10-04 02:16:41 -07009#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/mm.h>
11#include <linux/irq.h>
12#include <linux/interrupt.h>
13#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/pci.h>
16#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070017#include <linux/msi.h>
Dan Williams4fdadeb2007-04-26 18:21:38 -070018#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
20#include <asm/errno.h>
21#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23#include "pci.h"
24#include "msi.h"
25
Linus Torvalds1da177e2005-04-16 15:20:36 -070026static int pci_msi_enable = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010028/* Arch hooks */
29
Michael Ellerman11df1f02009-01-19 11:31:00 +110030#ifndef arch_msi_check_device
31int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010032{
33 return 0;
34}
Michael Ellerman11df1f02009-01-19 11:31:00 +110035#endif
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010036
Michael Ellerman11df1f02009-01-19 11:31:00 +110037#ifndef arch_setup_msi_irqs
38int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010039{
40 struct msi_desc *entry;
41 int ret;
42
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -040043 /*
44 * If an architecture wants to support multiple MSI, it needs to
45 * override arch_setup_msi_irqs()
46 */
47 if (type == PCI_CAP_ID_MSI && nvec > 1)
48 return 1;
49
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010050 list_for_each_entry(entry, &dev->msi_list, list) {
51 ret = arch_setup_msi_irq(dev, entry);
Michael Ellermanb5fbf532009-02-11 22:27:02 +110052 if (ret < 0)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010053 return ret;
Michael Ellermanb5fbf532009-02-11 22:27:02 +110054 if (ret > 0)
55 return -ENOSPC;
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010056 }
57
58 return 0;
59}
Michael Ellerman11df1f02009-01-19 11:31:00 +110060#endif
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010061
Michael Ellerman11df1f02009-01-19 11:31:00 +110062#ifndef arch_teardown_msi_irqs
63void arch_teardown_msi_irqs(struct pci_dev *dev)
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010064{
65 struct msi_desc *entry;
66
67 list_for_each_entry(entry, &dev->msi_list, list) {
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -040068 int i, nvec;
69 if (entry->irq == 0)
70 continue;
71 nvec = 1 << entry->msi_attrib.multiple;
72 for (i = 0; i < nvec; i++)
73 arch_teardown_msi_irq(entry->irq + i);
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010074 }
75}
Michael Ellerman11df1f02009-01-19 11:31:00 +110076#endif
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010077
Hidetoshi Seto5ca5c022008-05-19 13:48:17 +090078static void __msi_set_enable(struct pci_dev *dev, int pos, int enable)
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -080079{
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -080080 u16 control;
81
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -080082 if (pos) {
83 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
84 control &= ~PCI_MSI_FLAGS_ENABLE;
85 if (enable)
86 control |= PCI_MSI_FLAGS_ENABLE;
87 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
88 }
89}
90
Hidetoshi Seto5ca5c022008-05-19 13:48:17 +090091static void msi_set_enable(struct pci_dev *dev, int enable)
92{
93 __msi_set_enable(dev, pci_find_capability(dev, PCI_CAP_ID_MSI), enable);
94}
95
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -080096static void msix_set_enable(struct pci_dev *dev, int enable)
97{
98 int pos;
99 u16 control;
100
101 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
102 if (pos) {
103 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
104 control &= ~PCI_MSIX_FLAGS_ENABLE;
105 if (enable)
106 control |= PCI_MSIX_FLAGS_ENABLE;
107 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
108 }
109}
110
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500111static inline __attribute_const__ u32 msi_mask(unsigned x)
112{
Matthew Wilcox0b49ec32009-02-08 20:27:47 -0700113 /* Don't shift by >= width of type */
114 if (x >= 5)
115 return 0xffffffff;
116 return (1 << (1 << x)) - 1;
Matthew Wilcoxbffac3c2009-01-21 19:19:19 -0500117}
118
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400119static inline __attribute_const__ u32 msi_capable_mask(u16 control)
Mitch Williams988cbb12007-03-30 11:54:08 -0700120{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400121 return msi_mask((control >> 1) & 7);
122}
Mitch Williams988cbb12007-03-30 11:54:08 -0700123
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400124static inline __attribute_const__ u32 msi_enabled_mask(u16 control)
125{
126 return msi_mask((control >> 4) & 7);
Mitch Williams988cbb12007-03-30 11:54:08 -0700127}
128
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600129/*
130 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
131 * mask all MSI interrupts by clearing the MSI enable bit does not work
132 * reliably as devices without an INTx disable bit will then generate a
133 * level IRQ which will never be cleared.
134 *
135 * Returns 1 if it succeeded in masking the interrupt and 0 if the device
136 * doesn't support MSI masking.
137 */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400138static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400140 u32 mask_bits = desc->masked;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400142 if (!desc->msi_attrib.maskbit)
143 return;
144
145 mask_bits &= ~mask;
146 mask_bits |= flag;
147 pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits);
148 desc->masked = mask_bits;
149}
150
151/*
152 * This internal function does not flush PCI writes to the device.
153 * All users must ensure that they read from the device before either
154 * assuming that the device state is up to date, or returning out of this
155 * file. This saves a few milliseconds when initialising devices with lots
156 * of MSI-X interrupts.
157 */
158static void msix_mask_irq(struct msi_desc *desc, u32 flag)
159{
160 u32 mask_bits = desc->masked;
161 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
162 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
163 mask_bits &= ~1;
164 mask_bits |= flag;
165 writel(mask_bits, desc->mask_base + offset);
166 desc->masked = mask_bits;
167}
168
169static void msi_set_mask_bit(unsigned irq, u32 flag)
170{
171 struct msi_desc *desc = get_irq_msi(irq);
172
173 if (desc->msi_attrib.is_msix) {
174 msix_mask_irq(desc, flag);
175 readl(desc->mask_base); /* Flush write to device */
Matthew Wilcox24d27552009-03-17 08:54:06 -0400176 } else {
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400177 unsigned offset = irq - desc->dev->irq;
178 msi_mask_irq(desc, 1 << offset, flag << offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 }
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400180}
181
182void mask_msi_irq(unsigned int irq)
183{
184 msi_set_mask_bit(irq, 1);
185}
186
187void unmask_msi_irq(unsigned int irq)
188{
189 msi_set_mask_bit(irq, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190}
191
Yinghai Lu3145e942008-12-05 18:58:34 -0800192void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700193{
Yinghai Lu3145e942008-12-05 18:58:34 -0800194 struct msi_desc *entry = get_irq_desc_msi(desc);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400195 if (entry->msi_attrib.is_msix) {
196 void __iomem *base = entry->mask_base +
197 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
198
199 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
200 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
201 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
202 } else {
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700203 struct pci_dev *dev = entry->dev;
204 int pos = entry->msi_attrib.pos;
205 u16 data;
206
207 pci_read_config_dword(dev, msi_lower_address_reg(pos),
208 &msg->address_lo);
209 if (entry->msi_attrib.is_64) {
210 pci_read_config_dword(dev, msi_upper_address_reg(pos),
211 &msg->address_hi);
212 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
213 } else {
214 msg->address_hi = 0;
Roland Dreiercbf5d9e2007-10-03 11:15:11 -0700215 pci_read_config_word(dev, msi_data_reg(pos, 0), &data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700216 }
217 msg->data = data;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700218 }
219}
220
Yinghai Lu3145e942008-12-05 18:58:34 -0800221void read_msi_msg(unsigned int irq, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700222{
Yinghai Lu3145e942008-12-05 18:58:34 -0800223 struct irq_desc *desc = irq_to_desc(irq);
224
225 read_msi_msg_desc(desc, msg);
226}
227
228void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg)
229{
230 struct msi_desc *entry = get_irq_desc_msi(desc);
Matthew Wilcox24d27552009-03-17 08:54:06 -0400231 if (entry->msi_attrib.is_msix) {
232 void __iomem *base;
233 base = entry->mask_base +
234 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
235
236 writel(msg->address_lo,
237 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
238 writel(msg->address_hi,
239 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
240 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
241 } else {
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700242 struct pci_dev *dev = entry->dev;
243 int pos = entry->msi_attrib.pos;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400244 u16 msgctl;
245
246 pci_read_config_word(dev, msi_control_reg(pos), &msgctl);
247 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
248 msgctl |= entry->msi_attrib.multiple << 4;
249 pci_write_config_word(dev, msi_control_reg(pos), msgctl);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700250
251 pci_write_config_dword(dev, msi_lower_address_reg(pos),
252 msg->address_lo);
253 if (entry->msi_attrib.is_64) {
254 pci_write_config_dword(dev, msi_upper_address_reg(pos),
255 msg->address_hi);
256 pci_write_config_word(dev, msi_data_reg(pos, 1),
257 msg->data);
258 } else {
259 pci_write_config_word(dev, msi_data_reg(pos, 0),
260 msg->data);
261 }
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700262 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700263 entry->msg = *msg;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700264}
265
Yinghai Lu3145e942008-12-05 18:58:34 -0800266void write_msi_msg(unsigned int irq, struct msi_msg *msg)
267{
268 struct irq_desc *desc = irq_to_desc(irq);
269
270 write_msi_msg_desc(desc, msg);
271}
272
Michael Ellerman032de8e2007-04-18 19:39:22 +1000273static int msi_free_irqs(struct pci_dev* dev);
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900274
Matthew Wilcox379f5322009-03-17 08:54:07 -0400275static struct msi_desc *alloc_msi_entry(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276{
Matthew Wilcox379f5322009-03-17 08:54:07 -0400277 struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL);
278 if (!desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279 return NULL;
280
Matthew Wilcox379f5322009-03-17 08:54:07 -0400281 INIT_LIST_HEAD(&desc->list);
282 desc->dev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283
Matthew Wilcox379f5322009-03-17 08:54:07 -0400284 return desc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285}
286
David Millerba698ad2007-10-25 01:16:30 -0700287static void pci_intx_for_msi(struct pci_dev *dev, int enable)
288{
289 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
290 pci_intx(dev, enable);
291}
292
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100293static void __pci_restore_msi_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800294{
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700295 int pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800296 u16 control;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700297 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800298
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800299 if (!dev->msi_enabled)
300 return;
301
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700302 entry = get_irq_msi(dev->irq);
303 pos = entry->msi_attrib.pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800304
David Millerba698ad2007-10-25 01:16:30 -0700305 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800306 msi_set_enable(dev, 0);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700307 write_msi_msg(dev->irq, &entry->msg);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700308
309 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400310 msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
Jesse Barnesabad2ec2008-08-07 08:52:37 -0700311 control &= ~PCI_MSI_FLAGS_QSIZE;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400312 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
Shaohua Li41017f02006-02-08 17:11:38 +0800313 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100314}
315
316static void __pci_restore_msix_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800317{
Shaohua Li41017f02006-02-08 17:11:38 +0800318 int pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800319 struct msi_desc *entry;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700320 u16 control;
Shaohua Li41017f02006-02-08 17:11:38 +0800321
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700322 if (!dev->msix_enabled)
323 return;
324
Shaohua Li41017f02006-02-08 17:11:38 +0800325 /* route the table */
David Millerba698ad2007-10-25 01:16:30 -0700326 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800327 msix_set_enable(dev, 0);
Shaohua Li41017f02006-02-08 17:11:38 +0800328
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000329 list_for_each_entry(entry, &dev->msi_list, list) {
330 write_msi_msg(entry->irq, &entry->msg);
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400331 msix_mask_irq(entry, entry->masked);
Shaohua Li41017f02006-02-08 17:11:38 +0800332 }
Shaohua Li41017f02006-02-08 17:11:38 +0800333
Michael Ellerman314e77b2007-04-05 17:19:12 +1000334 BUG_ON(list_empty(&dev->msi_list));
335 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000336 pos = entry->msi_attrib.pos;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700337 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
338 control &= ~PCI_MSIX_FLAGS_MASKALL;
339 control |= PCI_MSIX_FLAGS_ENABLE;
340 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
Shaohua Li41017f02006-02-08 17:11:38 +0800341}
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100342
343void pci_restore_msi_state(struct pci_dev *dev)
344{
345 __pci_restore_msi_state(dev);
346 __pci_restore_msix_state(dev);
347}
Linas Vepstas94688cf2007-11-07 15:43:59 -0600348EXPORT_SYMBOL_GPL(pci_restore_msi_state);
Shaohua Li41017f02006-02-08 17:11:38 +0800349
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350/**
351 * msi_capability_init - configure device's MSI capability structure
352 * @dev: pointer to the pci_dev data structure of MSI device function
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400353 * @nvec: number of interrupts to allocate
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400355 * Setup the MSI capability structure of the device with the requested
356 * number of interrupts. A return value of zero indicates the successful
357 * setup of an entry with the new MSI irq. A negative return value indicates
358 * an error, and a positive return value indicates the number of interrupts
359 * which could have been allocated.
360 */
361static int msi_capability_init(struct pci_dev *dev, int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362{
363 struct msi_desc *entry;
Michael Ellerman7fe37302007-04-18 19:39:21 +1000364 int pos, ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365 u16 control;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400366 unsigned mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800368 msi_set_enable(dev, 0); /* Ensure msi is disabled as I set it up */
369
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
371 pci_read_config_word(dev, msi_control_reg(pos), &control);
372 /* MSI Entry Initialization */
Matthew Wilcox379f5322009-03-17 08:54:07 -0400373 entry = alloc_msi_entry(dev);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700374 if (!entry)
375 return -ENOMEM;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700376
Matthew Wilcox24d27552009-03-17 08:54:06 -0400377 entry->msi_attrib.is_msix = 0;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700378 entry->msi_attrib.is_64 = is_64bit_address(control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700379 entry->msi_attrib.entry_nr = 0;
380 entry->msi_attrib.maskbit = is_mask_bit_support(control);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700381 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700382 entry->msi_attrib.pos = pos;
Hidetoshi Seto0db29af2008-12-24 17:27:04 +0900383
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400384 entry->mask_pos = msi_mask_bits_reg(pos, entry->msi_attrib.is_64);
385 /* All MSIs are unmasked by default, Mask them all */
386 if (entry->msi_attrib.maskbit)
387 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
388 mask = msi_capable_mask(control);
389 msi_mask_irq(entry, mask, mask);
390
Eric W. Biederman0dd11f92007-06-01 00:46:32 -0700391 list_add_tail(&entry->list, &dev->msi_list);
Michael Ellerman9c831332007-04-18 19:39:21 +1000392
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393 /* Configure MSI capability structure */
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400394 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000395 if (ret) {
Michael Ellerman032de8e2007-04-18 19:39:22 +1000396 msi_free_irqs(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000397 return ret;
Mark Maulefd58e552006-04-10 21:17:48 -0500398 }
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700399
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 /* Set MSI enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700401 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800402 msi_set_enable(dev, 1);
403 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404
Michael Ellerman7fe37302007-04-18 19:39:21 +1000405 dev->irq = entry->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406 return 0;
407}
408
409/**
410 * msix_capability_init - configure device's MSI-X capability
411 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700412 * @entries: pointer to an array of struct msix_entry entries
413 * @nvec: number of @entries
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600415 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700416 * single MSI-X irq. A return of zero indicates the successful setup of
417 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 **/
419static int msix_capability_init(struct pci_dev *dev,
420 struct msix_entry *entries, int nvec)
421{
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000422 struct msi_desc *entry;
Michael Ellerman9c831332007-04-18 19:39:21 +1000423 int pos, i, j, nr_entries, ret;
Grant Grundlera0454b42006-02-16 23:58:29 -0800424 unsigned long phys_addr;
425 u32 table_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426 u16 control;
427 u8 bir;
428 void __iomem *base;
429
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800430 msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */
431
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
433 /* Request & Map MSI-X table region */
434 pci_read_config_word(dev, msi_control_reg(pos), &control);
435 nr_entries = multi_msix_capable(control);
Grant Grundlera0454b42006-02-16 23:58:29 -0800436
437 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
Grant Grundlera0454b42006-02-16 23:58:29 -0800439 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
440 phys_addr = pci_resource_start (dev, bir) + table_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
442 if (base == NULL)
443 return -ENOMEM;
444
445 /* MSI-X Table Initialization */
446 for (i = 0; i < nvec; i++) {
Matthew Wilcox379f5322009-03-17 08:54:07 -0400447 entry = alloc_msi_entry(dev);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700448 if (!entry)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450
451 j = entries[i].entry;
Matthew Wilcox24d27552009-03-17 08:54:06 -0400452 entry->msi_attrib.is_msix = 1;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700453 entry->msi_attrib.is_64 = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454 entry->msi_attrib.entry_nr = j;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700455 entry->msi_attrib.default_irq = dev->irq;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700456 entry->msi_attrib.pos = pos;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 entry->mask_base = base;
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400458 msix_mask_irq(entry, 1);
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700459
Eric W. Biederman0dd11f92007-06-01 00:46:32 -0700460 list_add_tail(&entry->list, &dev->msi_list);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461 }
Michael Ellerman9c831332007-04-18 19:39:21 +1000462
463 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100464 if (ret < 0) {
465 /* If we had some success report the number of irqs
466 * we succeeded in setting up. */
Michael Ellerman9c831332007-04-18 19:39:21 +1000467 int avail = 0;
468 list_for_each_entry(entry, &dev->msi_list, list) {
469 if (entry->irq != 0) {
470 avail++;
Michael Ellerman9c831332007-04-18 19:39:21 +1000471 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472 }
Michael Ellerman9c831332007-04-18 19:39:21 +1000473
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100474 if (avail != 0)
475 ret = avail;
476 }
Michael Ellerman032de8e2007-04-18 19:39:22 +1000477
Michael Ellermanb5fbf532009-02-11 22:27:02 +1100478 if (ret) {
479 msi_free_irqs(dev);
480 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481 }
Michael Ellerman9c831332007-04-18 19:39:21 +1000482
483 i = 0;
484 list_for_each_entry(entry, &dev->msi_list, list) {
485 entries[i].vector = entry->irq;
486 set_irq_msi(entry->irq, entry);
487 i++;
488 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 /* Set MSI-X enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700490 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800491 msix_set_enable(dev, 1);
492 dev->msix_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493
Matthew Wilcox8d181012009-05-08 07:13:33 -0600494 list_for_each_entry(entry, &dev->msi_list, list) {
495 int vector = entry->msi_attrib.entry_nr;
496 entry->masked = readl(base + vector * PCI_MSIX_ENTRY_SIZE +
497 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
498 }
499
Linus Torvalds1da177e2005-04-16 15:20:36 -0700500 return 0;
501}
502
503/**
Michael Ellerman17bbc122007-04-05 17:19:07 +1000504 * pci_msi_check_device - check whether MSI may be enabled on a device
Brice Goglin24334a12006-08-31 01:55:07 -0400505 * @dev: pointer to the pci_dev data structure of MSI device function
Michael Ellermanc9953a72007-04-05 17:19:08 +1000506 * @nvec: how many MSIs have been requested ?
Michael Ellermanb1e23032007-03-22 21:51:39 +1100507 * @type: are we checking for MSI or MSI-X ?
Brice Goglin24334a12006-08-31 01:55:07 -0400508 *
Brice Goglin0306ebf2006-10-05 10:24:31 +0200509 * Look at global flags, the device itself, and its parent busses
Michael Ellerman17bbc122007-04-05 17:19:07 +1000510 * to determine if MSI/-X are supported for the device. If MSI/-X is
511 * supported return 0, else return an error code.
Brice Goglin24334a12006-08-31 01:55:07 -0400512 **/
Michael Ellermanc9953a72007-04-05 17:19:08 +1000513static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type)
Brice Goglin24334a12006-08-31 01:55:07 -0400514{
515 struct pci_bus *bus;
Michael Ellermanc9953a72007-04-05 17:19:08 +1000516 int ret;
Brice Goglin24334a12006-08-31 01:55:07 -0400517
Brice Goglin0306ebf2006-10-05 10:24:31 +0200518 /* MSI must be globally enabled and supported by the device */
Brice Goglin24334a12006-08-31 01:55:07 -0400519 if (!pci_msi_enable || !dev || dev->no_msi)
520 return -EINVAL;
521
Michael Ellerman314e77b2007-04-05 17:19:12 +1000522 /*
523 * You can't ask to have 0 or less MSIs configured.
524 * a) it's stupid ..
525 * b) the list manipulation code assumes nvec >= 1.
526 */
527 if (nvec < 1)
528 return -ERANGE;
529
Brice Goglin0306ebf2006-10-05 10:24:31 +0200530 /* Any bridge which does NOT route MSI transactions from it's
531 * secondary bus to it's primary bus must set NO_MSI flag on
532 * the secondary pci_bus.
533 * We expect only arch-specific PCI host bus controller driver
534 * or quirks for specific PCI bridges to be setting NO_MSI.
535 */
Brice Goglin24334a12006-08-31 01:55:07 -0400536 for (bus = dev->bus; bus; bus = bus->parent)
537 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
538 return -EINVAL;
539
Michael Ellermanc9953a72007-04-05 17:19:08 +1000540 ret = arch_msi_check_device(dev, nvec, type);
541 if (ret)
542 return ret;
543
Michael Ellermanb1e23032007-03-22 21:51:39 +1100544 if (!pci_find_capability(dev, type))
545 return -EINVAL;
546
Brice Goglin24334a12006-08-31 01:55:07 -0400547 return 0;
548}
549
550/**
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400551 * pci_enable_msi_block - configure device's MSI capability structure
552 * @dev: device to configure
553 * @nvec: number of interrupts to configure
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554 *
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400555 * Allocate IRQs for a device with the MSI capability.
556 * This function returns a negative errno if an error occurs. If it
557 * is unable to allocate the number of interrupts requested, it returns
558 * the number of interrupts it might be able to allocate. If it successfully
559 * allocates at least the number of interrupts requested, it returns 0 and
560 * updates the @dev's irq member to the lowest new interrupt number; the
561 * other interrupt numbers allocated to this device are consecutive.
562 */
563int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700564{
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400565 int status, pos, maxvec;
566 u16 msgctl;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700567
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400568 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
569 if (!pos)
570 return -EINVAL;
571 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
572 maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
573 if (nvec > maxvec)
574 return maxvec;
575
576 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI);
Michael Ellermanc9953a72007-04-05 17:19:08 +1000577 if (status)
578 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700580 WARN_ON(!!dev->msi_enabled);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400582 /* Check whether driver already requested MSI-X irqs */
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800583 if (dev->msix_enabled) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600584 dev_info(&dev->dev, "can't enable MSI "
585 "(MSI-X already enabled)\n");
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800586 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 }
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400588
589 status = msi_capability_init(dev, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590 return status;
591}
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400592EXPORT_SYMBOL(pci_enable_msi_block);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400594void pci_msi_shutdown(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595{
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400596 struct msi_desc *desc;
597 u32 mask;
598 u16 ctrl;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100600 if (!pci_msi_enable || !dev || !dev->msi_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700601 return;
602
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800603 msi_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700604 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800605 dev->msi_enabled = 0;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700606
Michael Ellerman314e77b2007-04-05 17:19:12 +1000607 BUG_ON(list_empty(&dev->msi_list));
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400608 desc = list_first_entry(&dev->msi_list, struct msi_desc, list);
609 pci_read_config_word(dev, desc->msi_attrib.pos + PCI_MSI_FLAGS, &ctrl);
610 mask = msi_capable_mask(ctrl);
611 msi_mask_irq(desc, mask, ~mask);
Michael Ellermane387b9e2007-03-22 21:51:27 +1100612
613 /* Restore dev->irq to its default pin-assertion irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400614 dev->irq = desc->msi_attrib.default_irq;
Yinghai Lud52877c2008-04-23 14:58:09 -0700615}
Matthew Wilcox24d27552009-03-17 08:54:06 -0400616
Yinghai Lud52877c2008-04-23 14:58:09 -0700617void pci_disable_msi(struct pci_dev* dev)
618{
619 struct msi_desc *entry;
620
621 if (!pci_msi_enable || !dev || !dev->msi_enabled)
622 return;
623
624 pci_msi_shutdown(dev);
625
626 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
Matthew Wilcox379f5322009-03-17 08:54:07 -0400627 if (entry->msi_attrib.is_msix)
Yinghai Lud52877c2008-04-23 14:58:09 -0700628 return;
629
630 msi_free_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100632EXPORT_SYMBOL(pci_disable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633
Michael Ellerman032de8e2007-04-18 19:39:22 +1000634static int msi_free_irqs(struct pci_dev* dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635{
Michael Ellerman032de8e2007-04-18 19:39:22 +1000636 struct msi_desc *entry, *tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637
David Millerb3b7cc72007-05-11 13:26:44 -0700638 list_for_each_entry(entry, &dev->msi_list, list) {
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400639 int i, nvec;
640 if (!entry->irq)
641 continue;
642 nvec = 1 << entry->msi_attrib.multiple;
643 for (i = 0; i < nvec; i++)
644 BUG_ON(irq_has_action(entry->irq + i));
David Millerb3b7cc72007-05-11 13:26:44 -0700645 }
Michael Ellerman7ede9c12007-03-22 21:51:34 +1100646
Michael Ellerman032de8e2007-04-18 19:39:22 +1000647 arch_teardown_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648
Michael Ellerman032de8e2007-04-18 19:39:22 +1000649 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
Matthew Wilcox24d27552009-03-17 08:54:06 -0400650 if (entry->msi_attrib.is_msix) {
Michael Ellerman032de8e2007-04-18 19:39:22 +1000651 writel(1, entry->mask_base + entry->msi_attrib.entry_nr
652 * PCI_MSIX_ENTRY_SIZE
653 + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
Eric W. Biederman78b76112007-06-01 00:46:33 -0700654
655 if (list_is_last(&entry->list, &dev->msi_list))
656 iounmap(entry->mask_base);
Michael Ellerman032de8e2007-04-18 19:39:22 +1000657 }
658 list_del(&entry->list);
659 kfree(entry);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660 }
661
662 return 0;
663}
664
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665/**
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100666 * pci_msix_table_size - return the number of device's MSI-X table entries
667 * @dev: pointer to the pci_dev data structure of MSI-X device function
668 */
669int pci_msix_table_size(struct pci_dev *dev)
670{
671 int pos;
672 u16 control;
673
674 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
675 if (!pos)
676 return 0;
677
678 pci_read_config_word(dev, msi_control_reg(pos), &control);
679 return multi_msix_capable(control);
680}
681
682/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683 * pci_enable_msix - configure device's MSI-X capability structure
684 * @dev: pointer to the pci_dev data structure of MSI-X device function
Greg Kroah-Hartman70549ad2005-06-06 23:07:46 -0700685 * @entries: pointer to an array of MSI-X entries
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700686 * @nvec: number of MSI-X irqs requested for allocation by device driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 *
688 * Setup the MSI-X capability structure of device function with the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700689 * of requested irqs upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700690 * MSI-X mode enabled on its hardware device function. A return of zero
691 * indicates the successful configuration of MSI-X capability structure
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700692 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693 * Or a return of > 0 indicates that driver request is exceeding the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700694 * of irqs available. Driver should use the returned value to re-send
Linus Torvalds1da177e2005-04-16 15:20:36 -0700695 * its request.
696 **/
697int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
698{
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100699 int status, nr_entries;
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700700 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701
Michael Ellermanc9953a72007-04-05 17:19:08 +1000702 if (!entries)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 return -EINVAL;
704
Michael Ellermanc9953a72007-04-05 17:19:08 +1000705 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);
706 if (status)
707 return status;
708
Rafael J. Wysockia52e2e32009-01-24 00:21:14 +0100709 nr_entries = pci_msix_table_size(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700710 if (nvec > nr_entries)
711 return -EINVAL;
712
713 /* Check for any invalid entries */
714 for (i = 0; i < nvec; i++) {
715 if (entries[i].entry >= nr_entries)
716 return -EINVAL; /* invalid entry */
717 for (j = i + 1; j < nvec; j++) {
718 if (entries[i].entry == entries[j].entry)
719 return -EINVAL; /* duplicate entry */
720 }
721 }
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700722 WARN_ON(!!dev->msix_enabled);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700723
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700724 /* Check whether driver already requested for MSI irq */
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800725 if (dev->msi_enabled) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600726 dev_info(&dev->dev, "can't enable MSI-X "
727 "(MSI IRQ already assigned)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728 return -EINVAL;
729 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700730 status = msix_capability_init(dev, entries, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731 return status;
732}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100733EXPORT_SYMBOL(pci_enable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100735static void msix_free_all_irqs(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736{
Michael Ellerman032de8e2007-04-18 19:39:22 +1000737 msi_free_irqs(dev);
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100738}
739
Yinghai Lud52877c2008-04-23 14:58:09 -0700740void pci_msix_shutdown(struct pci_dev* dev)
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100741{
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100742 if (!pci_msi_enable || !dev || !dev->msix_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700743 return;
744
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800745 msix_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700746 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800747 dev->msix_enabled = 0;
Yinghai Lud52877c2008-04-23 14:58:09 -0700748}
749void pci_disable_msix(struct pci_dev* dev)
750{
751 if (!pci_msi_enable || !dev || !dev->msix_enabled)
752 return;
753
754 pci_msix_shutdown(dev);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700755
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100756 msix_free_all_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700757}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100758EXPORT_SYMBOL(pci_disable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700759
760/**
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700761 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
Linus Torvalds1da177e2005-04-16 15:20:36 -0700762 * @dev: pointer to the pci_dev data structure of MSI(X) device function
763 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600764 * Being called during hotplug remove, from which the device function
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700765 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
Linus Torvalds1da177e2005-04-16 15:20:36 -0700766 * allocated for this device function, are reclaimed to unused state,
767 * which may be used later on.
768 **/
769void msi_remove_pci_irq_vectors(struct pci_dev* dev)
770{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771 if (!pci_msi_enable || !dev)
772 return;
773
Michael Ellerman032de8e2007-04-18 19:39:22 +1000774 if (dev->msi_enabled)
775 msi_free_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700776
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100777 if (dev->msix_enabled)
778 msix_free_all_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779}
780
Matthew Wilcox309e57d2006-03-05 22:33:34 -0700781void pci_no_msi(void)
782{
783 pci_msi_enable = 0;
784}
Michael Ellermanc9953a72007-04-05 17:19:08 +1000785
Andrew Patterson07ae95f2008-11-10 15:31:05 -0700786/**
787 * pci_msi_enabled - is MSI enabled?
788 *
789 * Returns true if MSI has not been disabled by the command-line option
790 * pci=nomsi.
791 **/
792int pci_msi_enabled(void)
793{
794 return pci_msi_enable;
795}
796EXPORT_SYMBOL(pci_msi_enabled);
797
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000798void pci_msi_init_pci_dev(struct pci_dev *dev)
799{
800 INIT_LIST_HEAD(&dev->msi_list);
801}