blob: 10f912df2dad3d306eb65f97cd101760f3a82f76 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/drivers/video/pxafb.c
3 *
4 * Copyright (C) 1999 Eric A. Thomas.
5 * Copyright (C) 2004 Jean-Frederic Clere.
6 * Copyright (C) 2004 Ian Campbell.
7 * Copyright (C) 2004 Jeff Lackey.
8 * Based on sa1100fb.c Copyright (C) 1999 Eric A. Thomas
9 * which in turn is
10 * Based on acornfb.c Copyright (C) Russell King.
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file COPYING in the main directory of this archive for
14 * more details.
15 *
16 * Intel PXA250/210 LCD Controller Frame Buffer Driver
17 *
18 * Please direct your questions and comments on this driver to the following
19 * email address:
20 *
21 * linux-arm-kernel@lists.arm.linux.org.uk
22 *
23 */
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/kernel.h>
28#include <linux/sched.h>
29#include <linux/errno.h>
30#include <linux/string.h>
31#include <linux/interrupt.h>
32#include <linux/slab.h>
33#include <linux/fb.h>
34#include <linux/delay.h>
35#include <linux/init.h>
36#include <linux/ioport.h>
37#include <linux/cpufreq.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010038#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#include <linux/dma-mapping.h>
Russell King72e35242007-08-20 10:18:42 +010040#include <linux/clk.h>
41#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
43#include <asm/hardware.h>
44#include <asm/io.h>
45#include <asm/irq.h>
Nicolas Pitrebf1b8ab2005-06-23 21:56:45 +010046#include <asm/div64.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <asm/arch/pxa-regs.h>
48#include <asm/arch/bitfield.h>
49#include <asm/arch/pxafb.h>
50
51/*
52 * Complain if VAR is out of range.
53 */
54#define DEBUG_VAR 1
55
56#include "pxafb.h"
57
58/* Bits which should not be set in machine configuration structures */
59#define LCCR0_INVALID_CONFIG_MASK (LCCR0_OUM|LCCR0_BM|LCCR0_QDM|LCCR0_DIS|LCCR0_EFM|LCCR0_IUM|LCCR0_SFM|LCCR0_LDM|LCCR0_ENB)
60#define LCCR3_INVALID_CONFIG_MASK (LCCR3_HSP|LCCR3_VSP|LCCR3_PCD|LCCR3_BPP)
61
62static void (*pxafb_backlight_power)(int);
Richard Purdied14b2722006-09-20 22:54:21 +010063static void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *);
Linus Torvalds1da177e2005-04-16 15:20:36 -070064
65static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *);
66static void set_ctrlr_state(struct pxafb_info *fbi, u_int state);
67
68#ifdef CONFIG_FB_PXA_PARAMETERS
69#define PXAFB_OPTIONS_SIZE 256
Sam Ravnborg1e6a20c2007-08-07 19:03:27 +010070static char g_options[PXAFB_OPTIONS_SIZE] __devinitdata = "";
Linus Torvalds1da177e2005-04-16 15:20:36 -070071#endif
72
73static inline void pxafb_schedule_work(struct pxafb_info *fbi, u_int state)
74{
75 unsigned long flags;
76
77 local_irq_save(flags);
78 /*
79 * We need to handle two requests being made at the same time.
80 * There are two important cases:
81 * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE)
82 * We must perform the unblanking, which will do our REENABLE for us.
83 * 2. When we are blanking, but immediately unblank before we have
84 * blanked. We do the "REENABLE" thing here as well, just to be sure.
85 */
86 if (fbi->task_state == C_ENABLE && state == C_REENABLE)
87 state = (u_int) -1;
88 if (fbi->task_state == C_DISABLE && state == C_ENABLE)
89 state = C_REENABLE;
90
91 if (state != (u_int)-1) {
92 fbi->task_state = state;
93 schedule_work(&fbi->task);
94 }
95 local_irq_restore(flags);
96}
97
98static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
99{
100 chan &= 0xffff;
101 chan >>= 16 - bf->length;
102 return chan << bf->offset;
103}
104
105static int
106pxafb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
107 u_int trans, struct fb_info *info)
108{
109 struct pxafb_info *fbi = (struct pxafb_info *)info;
Hans J. Koch9ffa7392007-10-16 01:28:41 -0700110 u_int val;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
Hans J. Koch9ffa7392007-10-16 01:28:41 -0700112 if (regno >= fbi->palette_size)
113 return 1;
114
115 if (fbi->fb.var.grayscale) {
116 fbi->palette_cpu[regno] = ((blue >> 8) & 0x00ff);
117 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 }
Hans J. Koch9ffa7392007-10-16 01:28:41 -0700119
120 switch (fbi->lccr4 & LCCR4_PAL_FOR_MASK) {
121 case LCCR4_PAL_FOR_0:
122 val = ((red >> 0) & 0xf800);
123 val |= ((green >> 5) & 0x07e0);
124 val |= ((blue >> 11) & 0x001f);
125 fbi->palette_cpu[regno] = val;
126 break;
127 case LCCR4_PAL_FOR_1:
128 val = ((red << 8) & 0x00f80000);
129 val |= ((green >> 0) & 0x0000fc00);
130 val |= ((blue >> 8) & 0x000000f8);
131 ((u32*)(fbi->palette_cpu))[regno] = val;
132 break;
133 case LCCR4_PAL_FOR_2:
134 val = ((red << 8) & 0x00fc0000);
135 val |= ((green >> 0) & 0x0000fc00);
136 val |= ((blue >> 8) & 0x000000fc);
137 ((u32*)(fbi->palette_cpu))[regno] = val;
138 break;
139 }
140
141 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142}
143
144static int
145pxafb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
146 u_int trans, struct fb_info *info)
147{
148 struct pxafb_info *fbi = (struct pxafb_info *)info;
149 unsigned int val;
150 int ret = 1;
151
152 /*
153 * If inverse mode was selected, invert all the colours
154 * rather than the register number. The register number
155 * is what you poke into the framebuffer to produce the
156 * colour you requested.
157 */
158 if (fbi->cmap_inverse) {
159 red = 0xffff - red;
160 green = 0xffff - green;
161 blue = 0xffff - blue;
162 }
163
164 /*
165 * If greyscale is true, then we convert the RGB value
166 * to greyscale no matter what visual we are using.
167 */
168 if (fbi->fb.var.grayscale)
169 red = green = blue = (19595 * red + 38470 * green +
170 7471 * blue) >> 16;
171
172 switch (fbi->fb.fix.visual) {
173 case FB_VISUAL_TRUECOLOR:
174 /*
175 * 16-bit True Colour. We encode the RGB value
176 * according to the RGB bitfield information.
177 */
178 if (regno < 16) {
179 u32 *pal = fbi->fb.pseudo_palette;
180
181 val = chan_to_field(red, &fbi->fb.var.red);
182 val |= chan_to_field(green, &fbi->fb.var.green);
183 val |= chan_to_field(blue, &fbi->fb.var.blue);
184
185 pal[regno] = val;
186 ret = 0;
187 }
188 break;
189
190 case FB_VISUAL_STATIC_PSEUDOCOLOR:
191 case FB_VISUAL_PSEUDOCOLOR:
192 ret = pxafb_setpalettereg(regno, red, green, blue, trans, info);
193 break;
194 }
195
196 return ret;
197}
198
199/*
200 * pxafb_bpp_to_lccr3():
201 * Convert a bits per pixel value to the correct bit pattern for LCCR3
202 */
203static int pxafb_bpp_to_lccr3(struct fb_var_screeninfo *var)
204{
205 int ret = 0;
206 switch (var->bits_per_pixel) {
207 case 1: ret = LCCR3_1BPP; break;
208 case 2: ret = LCCR3_2BPP; break;
209 case 4: ret = LCCR3_4BPP; break;
210 case 8: ret = LCCR3_8BPP; break;
211 case 16: ret = LCCR3_16BPP; break;
212 }
213 return ret;
214}
215
216#ifdef CONFIG_CPU_FREQ
217/*
218 * pxafb_display_dma_period()
219 * Calculate the minimum period (in picoseconds) between two DMA
220 * requests for the LCD controller. If we hit this, it means we're
221 * doing nothing but LCD DMA.
222 */
223static unsigned int pxafb_display_dma_period(struct fb_var_screeninfo *var)
224{
225 /*
226 * Period = pixclock * bits_per_byte * bytes_per_transfer
227 * / memory_bits_per_pixel;
228 */
229 return var->pixclock * 8 * 16 / var->bits_per_pixel;
230}
231
232extern unsigned int get_clk_frequency_khz(int info);
233#endif
234
235/*
Richard Purdied14b2722006-09-20 22:54:21 +0100236 * Select the smallest mode that allows the desired resolution to be
237 * displayed. If desired parameters can be rounded up.
238 */
239static struct pxafb_mode_info *pxafb_getmode(struct pxafb_mach_info *mach, struct fb_var_screeninfo *var)
240{
241 struct pxafb_mode_info *mode = NULL;
242 struct pxafb_mode_info *modelist = mach->modes;
243 unsigned int best_x = 0xffffffff, best_y = 0xffffffff;
244 unsigned int i;
245
246 for (i = 0 ; i < mach->num_modes ; i++) {
247 if (modelist[i].xres >= var->xres && modelist[i].yres >= var->yres &&
248 modelist[i].xres < best_x && modelist[i].yres < best_y &&
249 modelist[i].bpp >= var->bits_per_pixel ) {
250 best_x = modelist[i].xres;
251 best_y = modelist[i].yres;
252 mode = &modelist[i];
253 }
254 }
255
256 return mode;
257}
258
259static void pxafb_setmode(struct fb_var_screeninfo *var, struct pxafb_mode_info *mode)
260{
261 var->xres = mode->xres;
262 var->yres = mode->yres;
263 var->bits_per_pixel = mode->bpp;
264 var->pixclock = mode->pixclock;
265 var->hsync_len = mode->hsync_len;
266 var->left_margin = mode->left_margin;
267 var->right_margin = mode->right_margin;
268 var->vsync_len = mode->vsync_len;
269 var->upper_margin = mode->upper_margin;
270 var->lower_margin = mode->lower_margin;
271 var->sync = mode->sync;
272 var->grayscale = mode->cmap_greyscale;
273 var->xres_virtual = var->xres;
274 var->yres_virtual = var->yres;
275}
276
277/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 * pxafb_check_var():
279 * Get the video params out of 'var'. If a value doesn't fit, round it up,
280 * if it's too big, return -EINVAL.
281 *
282 * Round up in the following order: bits_per_pixel, xres,
283 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
284 * bitfields, horizontal timing, vertical timing.
285 */
286static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
287{
288 struct pxafb_info *fbi = (struct pxafb_info *)info;
Richard Purdied14b2722006-09-20 22:54:21 +0100289 struct pxafb_mach_info *inf = fbi->dev->platform_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290
291 if (var->xres < MIN_XRES)
292 var->xres = MIN_XRES;
293 if (var->yres < MIN_YRES)
294 var->yres = MIN_YRES;
Richard Purdied14b2722006-09-20 22:54:21 +0100295
296 if (inf->fixed_modes) {
297 struct pxafb_mode_info *mode;
298
299 mode = pxafb_getmode(inf, var);
300 if (!mode)
301 return -EINVAL;
302 pxafb_setmode(var, mode);
303 } else {
304 if (var->xres > inf->modes->xres)
305 return -EINVAL;
306 if (var->yres > inf->modes->yres)
307 return -EINVAL;
308 if (var->bits_per_pixel > inf->modes->bpp)
309 return -EINVAL;
310 }
311
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 var->xres_virtual =
313 max(var->xres_virtual, var->xres);
314 var->yres_virtual =
315 max(var->yres_virtual, var->yres);
316
317 /*
318 * Setup the RGB parameters for this display.
319 *
320 * The pixel packing format is described on page 7-11 of the
321 * PXA2XX Developer's Manual.
322 */
323 if (var->bits_per_pixel == 16) {
324 var->red.offset = 11; var->red.length = 5;
325 var->green.offset = 5; var->green.length = 6;
326 var->blue.offset = 0; var->blue.length = 5;
327 var->transp.offset = var->transp.length = 0;
328 } else {
329 var->red.offset = var->green.offset = var->blue.offset = var->transp.offset = 0;
330 var->red.length = 8;
331 var->green.length = 8;
332 var->blue.length = 8;
333 var->transp.length = 0;
334 }
335
336#ifdef CONFIG_CPU_FREQ
Russell Kingca5da712005-09-29 09:44:54 +0100337 pr_debug("pxafb: dma period = %d ps, clock = %d kHz\n",
338 pxafb_display_dma_period(var),
339 get_clk_frequency_khz(0));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340#endif
341
342 return 0;
343}
344
345static inline void pxafb_set_truecolor(u_int is_true_color)
346{
Russell Kingca5da712005-09-29 09:44:54 +0100347 pr_debug("pxafb: true_color = %d\n", is_true_color);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348 // do your machine-specific setup if needed
349}
350
351/*
352 * pxafb_set_par():
353 * Set the user defined part of the display for the specified console
354 */
355static int pxafb_set_par(struct fb_info *info)
356{
357 struct pxafb_info *fbi = (struct pxafb_info *)info;
358 struct fb_var_screeninfo *var = &info->var;
359 unsigned long palette_mem_size;
360
Russell Kingca5da712005-09-29 09:44:54 +0100361 pr_debug("pxafb: set_par\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362
363 if (var->bits_per_pixel == 16)
364 fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR;
365 else if (!fbi->cmap_static)
366 fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR;
367 else {
368 /*
369 * Some people have weird ideas about wanting static
370 * pseudocolor maps. I suspect their user space
371 * applications are broken.
372 */
373 fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
374 }
375
376 fbi->fb.fix.line_length = var->xres_virtual *
377 var->bits_per_pixel / 8;
378 if (var->bits_per_pixel == 16)
379 fbi->palette_size = 0;
380 else
381 fbi->palette_size = var->bits_per_pixel == 1 ? 4 : 1 << var->bits_per_pixel;
382
Hans J. Koch9ffa7392007-10-16 01:28:41 -0700383 if ((fbi->lccr4 & LCCR4_PAL_FOR_MASK) == LCCR4_PAL_FOR_0)
384 palette_mem_size = fbi->palette_size * sizeof(u16);
385 else
386 palette_mem_size = fbi->palette_size * sizeof(u32);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387
Russell Kingca5da712005-09-29 09:44:54 +0100388 pr_debug("pxafb: palette_mem_size = 0x%08lx\n", palette_mem_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389
390 fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
391 fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
392
393 /*
394 * Set (any) board control register to handle new color depth
395 */
396 pxafb_set_truecolor(fbi->fb.fix.visual == FB_VISUAL_TRUECOLOR);
397
398 if (fbi->fb.var.bits_per_pixel == 16)
399 fb_dealloc_cmap(&fbi->fb.cmap);
400 else
401 fb_alloc_cmap(&fbi->fb.cmap, 1<<fbi->fb.var.bits_per_pixel, 0);
402
403 pxafb_activate_var(var, fbi);
404
405 return 0;
406}
407
408/*
409 * Formal definition of the VESA spec:
410 * On
411 * This refers to the state of the display when it is in full operation
412 * Stand-By
413 * This defines an optional operating state of minimal power reduction with
414 * the shortest recovery time
415 * Suspend
416 * This refers to a level of power management in which substantial power
417 * reduction is achieved by the display. The display can have a longer
418 * recovery time from this state than from the Stand-by state
419 * Off
420 * This indicates that the display is consuming the lowest level of power
421 * and is non-operational. Recovery from this state may optionally require
422 * the user to manually power on the monitor
423 *
424 * Now, the fbdev driver adds an additional state, (blank), where they
425 * turn off the video (maybe by colormap tricks), but don't mess with the
426 * video itself: think of it semantically between on and Stand-By.
427 *
428 * So here's what we should do in our fbdev blank routine:
429 *
430 * VESA_NO_BLANKING (mode 0) Video on, front/back light on
431 * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off
432 * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off
433 * VESA_POWERDOWN (mode 3) Video off, front/back light off
434 *
435 * This will match the matrox implementation.
436 */
437
438/*
439 * pxafb_blank():
440 * Blank the display by setting all palette values to zero. Note, the
441 * 16 bpp mode does not really use the palette, so this will not
442 * blank the display in all modes.
443 */
444static int pxafb_blank(int blank, struct fb_info *info)
445{
446 struct pxafb_info *fbi = (struct pxafb_info *)info;
447 int i;
448
Russell Kingca5da712005-09-29 09:44:54 +0100449 pr_debug("pxafb: blank=%d\n", blank);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450
451 switch (blank) {
452 case FB_BLANK_POWERDOWN:
453 case FB_BLANK_VSYNC_SUSPEND:
454 case FB_BLANK_HSYNC_SUSPEND:
455 case FB_BLANK_NORMAL:
456 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
457 fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
458 for (i = 0; i < fbi->palette_size; i++)
459 pxafb_setpalettereg(i, 0, 0, 0, 0, info);
460
461 pxafb_schedule_work(fbi, C_DISABLE);
462 //TODO if (pxafb_blank_helper) pxafb_blank_helper(blank);
463 break;
464
465 case FB_BLANK_UNBLANK:
466 //TODO if (pxafb_blank_helper) pxafb_blank_helper(blank);
467 if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR ||
468 fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR)
469 fb_set_cmap(&fbi->fb.cmap, info);
470 pxafb_schedule_work(fbi, C_ENABLE);
471 }
472 return 0;
473}
474
Christoph Hellwig216d5262006-01-14 13:21:25 -0800475static int pxafb_mmap(struct fb_info *info,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476 struct vm_area_struct *vma)
477{
478 struct pxafb_info *fbi = (struct pxafb_info *)info;
479 unsigned long off = vma->vm_pgoff << PAGE_SHIFT;
480
481 if (off < info->fix.smem_len) {
482 vma->vm_pgoff += 1;
483 return dma_mmap_writecombine(fbi->dev, vma, fbi->map_cpu,
484 fbi->map_dma, fbi->map_size);
485 }
486 return -EINVAL;
487}
488
489static struct fb_ops pxafb_ops = {
490 .owner = THIS_MODULE,
491 .fb_check_var = pxafb_check_var,
492 .fb_set_par = pxafb_set_par,
493 .fb_setcolreg = pxafb_setcolreg,
494 .fb_fillrect = cfb_fillrect,
495 .fb_copyarea = cfb_copyarea,
496 .fb_imageblit = cfb_imageblit,
497 .fb_blank = pxafb_blank,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700498 .fb_mmap = pxafb_mmap,
499};
500
501/*
502 * Calculate the PCD value from the clock rate (in picoseconds).
503 * We take account of the PPCR clock setting.
504 * From PXA Developer's Manual:
505 *
506 * PixelClock = LCLK
507 * -------------
508 * 2 ( PCD + 1 )
509 *
510 * PCD = LCLK
511 * ------------- - 1
512 * 2(PixelClock)
513 *
514 * Where:
515 * LCLK = LCD/Memory Clock
516 * PCD = LCCR3[7:0]
517 *
518 * PixelClock here is in Hz while the pixclock argument given is the
519 * period in picoseconds. Hence PixelClock = 1 / ( pixclock * 10^-12 )
520 *
521 * The function get_lclk_frequency_10khz returns LCLK in units of
522 * 10khz. Calling the result of this function lclk gives us the
523 * following
524 *
525 * PCD = (lclk * 10^4 ) * ( pixclock * 10^-12 )
526 * -------------------------------------- - 1
527 * 2
528 *
529 * Factoring the 10^4 and 10^-12 out gives 10^-8 == 1 / 100000000 as used below.
530 */
Russell King72e35242007-08-20 10:18:42 +0100531static inline unsigned int get_pcd(struct pxafb_info *fbi, unsigned int pixclock)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532{
533 unsigned long long pcd;
534
535 /* FIXME: Need to take into account Double Pixel Clock mode
Russell King72e35242007-08-20 10:18:42 +0100536 * (DPC) bit? or perhaps set it based on the various clock
537 * speeds */
538 pcd = (unsigned long long)(clk_get_rate(fbi->clk) / 10000);
539 pcd *= pixclock;
Nicolas Pitrebf1b8ab2005-06-23 21:56:45 +0100540 do_div(pcd, 100000000 * 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541 /* no need for this, since we should subtract 1 anyway. they cancel */
542 /* pcd += 1; */ /* make up for integer math truncations */
543 return (unsigned int)pcd;
544}
545
546/*
Richard Purdieba44cd22005-09-09 13:10:03 -0700547 * Some touchscreens need hsync information from the video driver to
Russell King72e35242007-08-20 10:18:42 +0100548 * function correctly. We export it here. Note that 'hsync_time' and
549 * the value returned from pxafb_get_hsync_time() is the *reciprocal*
550 * of the hsync period in seconds.
Richard Purdieba44cd22005-09-09 13:10:03 -0700551 */
552static inline void set_hsync_time(struct pxafb_info *fbi, unsigned int pcd)
553{
Russell King72e35242007-08-20 10:18:42 +0100554 unsigned long htime;
Richard Purdieba44cd22005-09-09 13:10:03 -0700555
556 if ((pcd == 0) || (fbi->fb.var.hsync_len == 0)) {
557 fbi->hsync_time=0;
558 return;
559 }
560
Russell King72e35242007-08-20 10:18:42 +0100561 htime = clk_get_rate(fbi->clk) / (pcd * fbi->fb.var.hsync_len);
562
Richard Purdieba44cd22005-09-09 13:10:03 -0700563 fbi->hsync_time = htime;
564}
565
566unsigned long pxafb_get_hsync_time(struct device *dev)
567{
568 struct pxafb_info *fbi = dev_get_drvdata(dev);
569
570 /* If display is blanked/suspended, hsync isn't active */
571 if (!fbi || (fbi->state != C_ENABLE))
572 return 0;
573
574 return fbi->hsync_time;
575}
576EXPORT_SYMBOL(pxafb_get_hsync_time);
577
578/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579 * pxafb_activate_var():
580 * Configures LCD Controller based on entries in var parameter. Settings are
581 * only written to the controller if changes were made.
582 */
583static int pxafb_activate_var(struct fb_var_screeninfo *var, struct pxafb_info *fbi)
584{
585 struct pxafb_lcd_reg new_regs;
586 u_long flags;
Russell King72e35242007-08-20 10:18:42 +0100587 u_int lines_per_panel, pcd = get_pcd(fbi, var->pixclock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588
Russell Kingca5da712005-09-29 09:44:54 +0100589 pr_debug("pxafb: Configuring PXA LCD\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590
Russell Kingca5da712005-09-29 09:44:54 +0100591 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
592 var->xres, var->hsync_len,
593 var->left_margin, var->right_margin);
594 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
595 var->yres, var->vsync_len,
596 var->upper_margin, var->lower_margin);
597 pr_debug("var: pixclock=%d pcd=%d\n", var->pixclock, pcd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598
599#if DEBUG_VAR
600 if (var->xres < 16 || var->xres > 1024)
601 printk(KERN_ERR "%s: invalid xres %d\n",
602 fbi->fb.fix.id, var->xres);
603 switch(var->bits_per_pixel) {
604 case 1:
605 case 2:
606 case 4:
607 case 8:
608 case 16:
609 break;
610 default:
611 printk(KERN_ERR "%s: invalid bit depth %d\n",
612 fbi->fb.fix.id, var->bits_per_pixel);
613 break;
614 }
615 if (var->hsync_len < 1 || var->hsync_len > 64)
616 printk(KERN_ERR "%s: invalid hsync_len %d\n",
617 fbi->fb.fix.id, var->hsync_len);
618 if (var->left_margin < 1 || var->left_margin > 255)
619 printk(KERN_ERR "%s: invalid left_margin %d\n",
620 fbi->fb.fix.id, var->left_margin);
621 if (var->right_margin < 1 || var->right_margin > 255)
622 printk(KERN_ERR "%s: invalid right_margin %d\n",
623 fbi->fb.fix.id, var->right_margin);
624 if (var->yres < 1 || var->yres > 1024)
625 printk(KERN_ERR "%s: invalid yres %d\n",
626 fbi->fb.fix.id, var->yres);
627 if (var->vsync_len < 1 || var->vsync_len > 64)
628 printk(KERN_ERR "%s: invalid vsync_len %d\n",
629 fbi->fb.fix.id, var->vsync_len);
630 if (var->upper_margin < 0 || var->upper_margin > 255)
631 printk(KERN_ERR "%s: invalid upper_margin %d\n",
632 fbi->fb.fix.id, var->upper_margin);
633 if (var->lower_margin < 0 || var->lower_margin > 255)
634 printk(KERN_ERR "%s: invalid lower_margin %d\n",
635 fbi->fb.fix.id, var->lower_margin);
636#endif
637
638 new_regs.lccr0 = fbi->lccr0 |
639 (LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM |
640 LCCR0_QDM | LCCR0_BM | LCCR0_OUM);
641
642 new_regs.lccr1 =
643 LCCR1_DisWdth(var->xres) +
644 LCCR1_HorSnchWdth(var->hsync_len) +
645 LCCR1_BegLnDel(var->left_margin) +
646 LCCR1_EndLnDel(var->right_margin);
647
648 /*
649 * If we have a dual scan LCD, we need to halve
650 * the YRES parameter.
651 */
652 lines_per_panel = var->yres;
653 if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual)
654 lines_per_panel /= 2;
655
656 new_regs.lccr2 =
657 LCCR2_DisHght(lines_per_panel) +
658 LCCR2_VrtSnchWdth(var->vsync_len) +
659 LCCR2_BegFrmDel(var->upper_margin) +
660 LCCR2_EndFrmDel(var->lower_margin);
661
662 new_regs.lccr3 = fbi->lccr3 |
663 pxafb_bpp_to_lccr3(var) |
664 (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) |
665 (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL);
666
667 if (pcd)
668 new_regs.lccr3 |= LCCR3_PixClkDiv(pcd);
669
Russell Kingca5da712005-09-29 09:44:54 +0100670 pr_debug("nlccr0 = 0x%08x\n", new_regs.lccr0);
671 pr_debug("nlccr1 = 0x%08x\n", new_regs.lccr1);
672 pr_debug("nlccr2 = 0x%08x\n", new_regs.lccr2);
673 pr_debug("nlccr3 = 0x%08x\n", new_regs.lccr3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700674
675 /* Update shadow copy atomically */
676 local_irq_save(flags);
677
678 /* setup dma descriptors */
679 fbi->dmadesc_fblow_cpu = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette_cpu - 3*16);
680 fbi->dmadesc_fbhigh_cpu = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette_cpu - 2*16);
681 fbi->dmadesc_palette_cpu = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette_cpu - 1*16);
682
683 fbi->dmadesc_fblow_dma = fbi->palette_dma - 3*16;
684 fbi->dmadesc_fbhigh_dma = fbi->palette_dma - 2*16;
685 fbi->dmadesc_palette_dma = fbi->palette_dma - 1*16;
686
687#define BYTES_PER_PANEL (lines_per_panel * fbi->fb.fix.line_length)
688
689 /* populate descriptors */
690 fbi->dmadesc_fblow_cpu->fdadr = fbi->dmadesc_fblow_dma;
691 fbi->dmadesc_fblow_cpu->fsadr = fbi->screen_dma + BYTES_PER_PANEL;
692 fbi->dmadesc_fblow_cpu->fidr = 0;
693 fbi->dmadesc_fblow_cpu->ldcmd = BYTES_PER_PANEL;
694
695 fbi->fdadr1 = fbi->dmadesc_fblow_dma; /* only used in dual-panel mode */
696
697 fbi->dmadesc_fbhigh_cpu->fsadr = fbi->screen_dma;
698 fbi->dmadesc_fbhigh_cpu->fidr = 0;
699 fbi->dmadesc_fbhigh_cpu->ldcmd = BYTES_PER_PANEL;
700
701 fbi->dmadesc_palette_cpu->fsadr = fbi->palette_dma;
702 fbi->dmadesc_palette_cpu->fidr = 0;
Hans J. Koch9ffa7392007-10-16 01:28:41 -0700703 if ((fbi->lccr4 & LCCR4_PAL_FOR_MASK) == LCCR4_PAL_FOR_0)
704 fbi->dmadesc_palette_cpu->ldcmd = fbi->palette_size *
705 sizeof(u16);
706 else
707 fbi->dmadesc_palette_cpu->ldcmd = fbi->palette_size *
708 sizeof(u32);
709 fbi->dmadesc_palette_cpu->ldcmd |= LDCMD_PAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700710
711 if (var->bits_per_pixel == 16) {
712 /* palette shouldn't be loaded in true-color mode */
713 fbi->dmadesc_fbhigh_cpu->fdadr = fbi->dmadesc_fbhigh_dma;
714 fbi->fdadr0 = fbi->dmadesc_fbhigh_dma; /* no pal just fbhigh */
715 /* init it to something, even though we won't be using it */
716 fbi->dmadesc_palette_cpu->fdadr = fbi->dmadesc_palette_dma;
717 } else {
718 fbi->dmadesc_palette_cpu->fdadr = fbi->dmadesc_fbhigh_dma;
719 fbi->dmadesc_fbhigh_cpu->fdadr = fbi->dmadesc_palette_dma;
720 fbi->fdadr0 = fbi->dmadesc_palette_dma; /* flips back and forth between pal and fbhigh */
721 }
722
723#if 0
Russell Kingca5da712005-09-29 09:44:54 +0100724 pr_debug("fbi->dmadesc_fblow_cpu = 0x%p\n", fbi->dmadesc_fblow_cpu);
725 pr_debug("fbi->dmadesc_fbhigh_cpu = 0x%p\n", fbi->dmadesc_fbhigh_cpu);
726 pr_debug("fbi->dmadesc_palette_cpu = 0x%p\n", fbi->dmadesc_palette_cpu);
727 pr_debug("fbi->dmadesc_fblow_dma = 0x%x\n", fbi->dmadesc_fblow_dma);
728 pr_debug("fbi->dmadesc_fbhigh_dma = 0x%x\n", fbi->dmadesc_fbhigh_dma);
729 pr_debug("fbi->dmadesc_palette_dma = 0x%x\n", fbi->dmadesc_palette_dma);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700730
Russell Kingca5da712005-09-29 09:44:54 +0100731 pr_debug("fbi->dmadesc_fblow_cpu->fdadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fdadr);
732 pr_debug("fbi->dmadesc_fbhigh_cpu->fdadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fdadr);
733 pr_debug("fbi->dmadesc_palette_cpu->fdadr = 0x%x\n", fbi->dmadesc_palette_cpu->fdadr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734
Russell Kingca5da712005-09-29 09:44:54 +0100735 pr_debug("fbi->dmadesc_fblow_cpu->fsadr = 0x%x\n", fbi->dmadesc_fblow_cpu->fsadr);
736 pr_debug("fbi->dmadesc_fbhigh_cpu->fsadr = 0x%x\n", fbi->dmadesc_fbhigh_cpu->fsadr);
737 pr_debug("fbi->dmadesc_palette_cpu->fsadr = 0x%x\n", fbi->dmadesc_palette_cpu->fsadr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700738
Russell Kingca5da712005-09-29 09:44:54 +0100739 pr_debug("fbi->dmadesc_fblow_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fblow_cpu->ldcmd);
740 pr_debug("fbi->dmadesc_fbhigh_cpu->ldcmd = 0x%x\n", fbi->dmadesc_fbhigh_cpu->ldcmd);
741 pr_debug("fbi->dmadesc_palette_cpu->ldcmd = 0x%x\n", fbi->dmadesc_palette_cpu->ldcmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700742#endif
743
744 fbi->reg_lccr0 = new_regs.lccr0;
745 fbi->reg_lccr1 = new_regs.lccr1;
746 fbi->reg_lccr2 = new_regs.lccr2;
747 fbi->reg_lccr3 = new_regs.lccr3;
Hans J. Koch9ffa7392007-10-16 01:28:41 -0700748 fbi->reg_lccr4 = LCCR4 & (~LCCR4_PAL_FOR_MASK);
749 fbi->reg_lccr4 |= (fbi->lccr4 & LCCR4_PAL_FOR_MASK);
Richard Purdieba44cd22005-09-09 13:10:03 -0700750 set_hsync_time(fbi, pcd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751 local_irq_restore(flags);
752
753 /*
754 * Only update the registers if the controller is enabled
755 * and something has changed.
756 */
757 if ((LCCR0 != fbi->reg_lccr0) || (LCCR1 != fbi->reg_lccr1) ||
758 (LCCR2 != fbi->reg_lccr2) || (LCCR3 != fbi->reg_lccr3) ||
759 (FDADR0 != fbi->fdadr0) || (FDADR1 != fbi->fdadr1))
760 pxafb_schedule_work(fbi, C_REENABLE);
761
762 return 0;
763}
764
765/*
766 * NOTE! The following functions are purely helpers for set_ctrlr_state.
767 * Do not call them directly; set_ctrlr_state does the correct serialisation
768 * to ensure that things happen in the right way 100% of time time.
769 * -- rmk
770 */
771static inline void __pxafb_backlight_power(struct pxafb_info *fbi, int on)
772{
Russell Kingca5da712005-09-29 09:44:54 +0100773 pr_debug("pxafb: backlight o%s\n", on ? "n" : "ff");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774
775 if (pxafb_backlight_power)
776 pxafb_backlight_power(on);
777}
778
779static inline void __pxafb_lcd_power(struct pxafb_info *fbi, int on)
780{
Russell Kingca5da712005-09-29 09:44:54 +0100781 pr_debug("pxafb: LCD power o%s\n", on ? "n" : "ff");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700782
783 if (pxafb_lcd_power)
Richard Purdied14b2722006-09-20 22:54:21 +0100784 pxafb_lcd_power(on, &fbi->fb.var);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700785}
786
787static void pxafb_setup_gpio(struct pxafb_info *fbi)
788{
789 int gpio, ldd_bits;
790 unsigned int lccr0 = fbi->lccr0;
791
792 /*
793 * setup is based on type of panel supported
794 */
795
796 /* 4 bit interface */
797 if ((lccr0 & LCCR0_CMS) == LCCR0_Mono &&
798 (lccr0 & LCCR0_SDS) == LCCR0_Sngl &&
799 (lccr0 & LCCR0_DPD) == LCCR0_4PixMono)
800 ldd_bits = 4;
801
802 /* 8 bit interface */
803 else if (((lccr0 & LCCR0_CMS) == LCCR0_Mono &&
804 ((lccr0 & LCCR0_SDS) == LCCR0_Dual || (lccr0 & LCCR0_DPD) == LCCR0_8PixMono)) ||
805 ((lccr0 & LCCR0_CMS) == LCCR0_Color &&
806 (lccr0 & LCCR0_PAS) == LCCR0_Pas && (lccr0 & LCCR0_SDS) == LCCR0_Sngl))
807 ldd_bits = 8;
808
809 /* 16 bit interface */
810 else if ((lccr0 & LCCR0_CMS) == LCCR0_Color &&
811 ((lccr0 & LCCR0_SDS) == LCCR0_Dual || (lccr0 & LCCR0_PAS) == LCCR0_Act))
812 ldd_bits = 16;
813
814 else {
815 printk(KERN_ERR "pxafb_setup_gpio: unable to determine bits per pixel\n");
816 return;
817 }
818
819 for (gpio = 58; ldd_bits; gpio++, ldd_bits--)
820 pxa_gpio_mode(gpio | GPIO_ALT_FN_2_OUT);
821 pxa_gpio_mode(GPIO74_LCD_FCLK_MD);
822 pxa_gpio_mode(GPIO75_LCD_LCLK_MD);
823 pxa_gpio_mode(GPIO76_LCD_PCLK_MD);
824 pxa_gpio_mode(GPIO77_LCD_ACBIAS_MD);
825}
826
827static void pxafb_enable_controller(struct pxafb_info *fbi)
828{
Russell Kingca5da712005-09-29 09:44:54 +0100829 pr_debug("pxafb: Enabling LCD controller\n");
830 pr_debug("fdadr0 0x%08x\n", (unsigned int) fbi->fdadr0);
831 pr_debug("fdadr1 0x%08x\n", (unsigned int) fbi->fdadr1);
832 pr_debug("reg_lccr0 0x%08x\n", (unsigned int) fbi->reg_lccr0);
833 pr_debug("reg_lccr1 0x%08x\n", (unsigned int) fbi->reg_lccr1);
834 pr_debug("reg_lccr2 0x%08x\n", (unsigned int) fbi->reg_lccr2);
835 pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836
Nicolas Pitre8d372262005-08-10 16:45:13 +0100837 /* enable LCD controller clock */
Russell King72e35242007-08-20 10:18:42 +0100838 clk_enable(fbi->clk);
Nicolas Pitre8d372262005-08-10 16:45:13 +0100839
Linus Torvalds1da177e2005-04-16 15:20:36 -0700840 /* Sequence from 11.7.10 */
841 LCCR3 = fbi->reg_lccr3;
842 LCCR2 = fbi->reg_lccr2;
843 LCCR1 = fbi->reg_lccr1;
844 LCCR0 = fbi->reg_lccr0 & ~LCCR0_ENB;
845
846 FDADR0 = fbi->fdadr0;
847 FDADR1 = fbi->fdadr1;
848 LCCR0 |= LCCR0_ENB;
849
Russell Kingca5da712005-09-29 09:44:54 +0100850 pr_debug("FDADR0 0x%08x\n", (unsigned int) FDADR0);
851 pr_debug("FDADR1 0x%08x\n", (unsigned int) FDADR1);
852 pr_debug("LCCR0 0x%08x\n", (unsigned int) LCCR0);
853 pr_debug("LCCR1 0x%08x\n", (unsigned int) LCCR1);
854 pr_debug("LCCR2 0x%08x\n", (unsigned int) LCCR2);
855 pr_debug("LCCR3 0x%08x\n", (unsigned int) LCCR3);
Hans J. Koch9ffa7392007-10-16 01:28:41 -0700856 pr_debug("LCCR4 0x%08x\n", (unsigned int) LCCR4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700857}
858
859static void pxafb_disable_controller(struct pxafb_info *fbi)
860{
861 DECLARE_WAITQUEUE(wait, current);
862
Russell Kingca5da712005-09-29 09:44:54 +0100863 pr_debug("pxafb: disabling LCD controller\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700864
865 set_current_state(TASK_UNINTERRUPTIBLE);
866 add_wait_queue(&fbi->ctrlr_wait, &wait);
867
868 LCSR = 0xffffffff; /* Clear LCD Status Register */
869 LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */
870 LCCR0 |= LCCR0_DIS; /* Disable LCD Controller */
871
Richard Purdie2cbbb3b2006-03-31 02:31:53 -0800872 schedule_timeout(200 * HZ / 1000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873 remove_wait_queue(&fbi->ctrlr_wait, &wait);
Nicolas Pitre8d372262005-08-10 16:45:13 +0100874
875 /* disable LCD controller clock */
Russell King72e35242007-08-20 10:18:42 +0100876 clk_disable(fbi->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700877}
878
879/*
880 * pxafb_handle_irq: Handle 'LCD DONE' interrupts.
881 */
David Howells7d12e782006-10-05 14:55:46 +0100882static irqreturn_t pxafb_handle_irq(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700883{
884 struct pxafb_info *fbi = dev_id;
885 unsigned int lcsr = LCSR;
886
887 if (lcsr & LCSR_LDD) {
888 LCCR0 |= LCCR0_LDM;
889 wake_up(&fbi->ctrlr_wait);
890 }
891
892 LCSR = lcsr;
893 return IRQ_HANDLED;
894}
895
896/*
897 * This function must be called from task context only, since it will
898 * sleep when disabling the LCD controller, or if we get two contending
899 * processes trying to alter state.
900 */
901static void set_ctrlr_state(struct pxafb_info *fbi, u_int state)
902{
903 u_int old_state;
904
905 down(&fbi->ctrlr_sem);
906
907 old_state = fbi->state;
908
909 /*
910 * Hack around fbcon initialisation.
911 */
912 if (old_state == C_STARTUP && state == C_REENABLE)
913 state = C_ENABLE;
914
915 switch (state) {
916 case C_DISABLE_CLKCHANGE:
917 /*
918 * Disable controller for clock change. If the
919 * controller is already disabled, then do nothing.
920 */
921 if (old_state != C_DISABLE && old_state != C_DISABLE_PM) {
922 fbi->state = state;
923 //TODO __pxafb_lcd_power(fbi, 0);
924 pxafb_disable_controller(fbi);
925 }
926 break;
927
928 case C_DISABLE_PM:
929 case C_DISABLE:
930 /*
931 * Disable controller
932 */
933 if (old_state != C_DISABLE) {
934 fbi->state = state;
935 __pxafb_backlight_power(fbi, 0);
936 __pxafb_lcd_power(fbi, 0);
937 if (old_state != C_DISABLE_CLKCHANGE)
938 pxafb_disable_controller(fbi);
939 }
940 break;
941
942 case C_ENABLE_CLKCHANGE:
943 /*
944 * Enable the controller after clock change. Only
945 * do this if we were disabled for the clock change.
946 */
947 if (old_state == C_DISABLE_CLKCHANGE) {
948 fbi->state = C_ENABLE;
949 pxafb_enable_controller(fbi);
950 //TODO __pxafb_lcd_power(fbi, 1);
951 }
952 break;
953
954 case C_REENABLE:
955 /*
956 * Re-enable the controller only if it was already
957 * enabled. This is so we reprogram the control
958 * registers.
959 */
960 if (old_state == C_ENABLE) {
Richard Purdied14b2722006-09-20 22:54:21 +0100961 __pxafb_lcd_power(fbi, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700962 pxafb_disable_controller(fbi);
963 pxafb_setup_gpio(fbi);
964 pxafb_enable_controller(fbi);
Richard Purdied14b2722006-09-20 22:54:21 +0100965 __pxafb_lcd_power(fbi, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 }
967 break;
968
969 case C_ENABLE_PM:
970 /*
971 * Re-enable the controller after PM. This is not
972 * perfect - think about the case where we were doing
973 * a clock change, and we suspended half-way through.
974 */
975 if (old_state != C_DISABLE_PM)
976 break;
977 /* fall through */
978
979 case C_ENABLE:
980 /*
981 * Power up the LCD screen, enable controller, and
982 * turn on the backlight.
983 */
984 if (old_state != C_ENABLE) {
985 fbi->state = C_ENABLE;
986 pxafb_setup_gpio(fbi);
987 pxafb_enable_controller(fbi);
988 __pxafb_lcd_power(fbi, 1);
989 __pxafb_backlight_power(fbi, 1);
990 }
991 break;
992 }
993 up(&fbi->ctrlr_sem);
994}
995
996/*
997 * Our LCD controller task (which is called when we blank or unblank)
998 * via keventd.
999 */
David Howells6d5aefb2006-12-05 19:36:26 +00001000static void pxafb_task(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001001{
David Howells6d5aefb2006-12-05 19:36:26 +00001002 struct pxafb_info *fbi =
1003 container_of(work, struct pxafb_info, task);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004 u_int state = xchg(&fbi->task_state, -1);
1005
1006 set_ctrlr_state(fbi, state);
1007}
1008
1009#ifdef CONFIG_CPU_FREQ
1010/*
1011 * CPU clock speed change handler. We need to adjust the LCD timing
1012 * parameters when the CPU clock is adjusted by the power management
1013 * subsystem.
1014 *
1015 * TODO: Determine why f->new != 10*get_lclk_frequency_10khz()
1016 */
1017static int
1018pxafb_freq_transition(struct notifier_block *nb, unsigned long val, void *data)
1019{
1020 struct pxafb_info *fbi = TO_INF(nb, freq_transition);
1021 //TODO struct cpufreq_freqs *f = data;
1022 u_int pcd;
1023
1024 switch (val) {
1025 case CPUFREQ_PRECHANGE:
1026 set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE);
1027 break;
1028
1029 case CPUFREQ_POSTCHANGE:
Russell King72e35242007-08-20 10:18:42 +01001030 pcd = get_pcd(fbi, fbi->fb.var.pixclock);
Richard Purdieba44cd22005-09-09 13:10:03 -07001031 set_hsync_time(fbi, pcd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001032 fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd);
1033 set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
1034 break;
1035 }
1036 return 0;
1037}
1038
1039static int
1040pxafb_freq_policy(struct notifier_block *nb, unsigned long val, void *data)
1041{
1042 struct pxafb_info *fbi = TO_INF(nb, freq_policy);
1043 struct fb_var_screeninfo *var = &fbi->fb.var;
1044 struct cpufreq_policy *policy = data;
1045
1046 switch (val) {
1047 case CPUFREQ_ADJUST:
1048 case CPUFREQ_INCOMPATIBLE:
1049 printk(KERN_DEBUG "min dma period: %d ps, "
1050 "new clock %d kHz\n", pxafb_display_dma_period(var),
1051 policy->max);
1052 // TODO: fill in min/max values
1053 break;
1054#if 0
1055 case CPUFREQ_NOTIFY:
1056 printk(KERN_ERR "%s: got CPUFREQ_NOTIFY\n", __FUNCTION__);
1057 do {} while(0);
1058 /* todo: panic if min/max values aren't fulfilled
1059 * [can't really happen unless there's a bug in the
1060 * CPU policy verification process *
1061 */
1062 break;
1063#endif
1064 }
1065 return 0;
1066}
1067#endif
1068
1069#ifdef CONFIG_PM
1070/*
1071 * Power management hooks. Note that we won't be called from IRQ context,
1072 * unlike the blank functions above, so we may sleep.
1073 */
Russell King3ae5eae2005-11-09 22:32:44 +00001074static int pxafb_suspend(struct platform_device *dev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001075{
Russell King3ae5eae2005-11-09 22:32:44 +00001076 struct pxafb_info *fbi = platform_get_drvdata(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001077
Russell King9480e302005-10-28 09:52:56 -07001078 set_ctrlr_state(fbi, C_DISABLE_PM);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001079 return 0;
1080}
1081
Russell King3ae5eae2005-11-09 22:32:44 +00001082static int pxafb_resume(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001083{
Russell King3ae5eae2005-11-09 22:32:44 +00001084 struct pxafb_info *fbi = platform_get_drvdata(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001085
Russell King9480e302005-10-28 09:52:56 -07001086 set_ctrlr_state(fbi, C_ENABLE_PM);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001087 return 0;
1088}
1089#else
1090#define pxafb_suspend NULL
1091#define pxafb_resume NULL
1092#endif
1093
1094/*
1095 * pxafb_map_video_memory():
1096 * Allocates the DRAM memory for the frame buffer. This buffer is
1097 * remapped into a non-cached, non-buffered, memory region to
1098 * allow palette and pixel writes to occur without flushing the
1099 * cache. Once this area is remapped, all virtual memory
1100 * access to the video memory should occur at the new region.
1101 */
1102static int __init pxafb_map_video_memory(struct pxafb_info *fbi)
1103{
1104 u_long palette_mem_size;
1105
1106 /*
1107 * We reserve one page for the palette, plus the size
1108 * of the framebuffer.
1109 */
1110 fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE);
1111 fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size,
1112 &fbi->map_dma, GFP_KERNEL);
1113
1114 if (fbi->map_cpu) {
1115 /* prevent initial garbage on screen */
1116 memset(fbi->map_cpu, 0, fbi->map_size);
1117 fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE;
1118 fbi->screen_dma = fbi->map_dma + PAGE_SIZE;
1119 /*
1120 * FIXME: this is actually the wrong thing to place in
1121 * smem_start. But fbdev suffers from the problem that
1122 * it needs an API which doesn't exist (in this case,
1123 * dma_writecombine_mmap)
1124 */
1125 fbi->fb.fix.smem_start = fbi->screen_dma;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001126 fbi->palette_size = fbi->fb.var.bits_per_pixel == 8 ? 256 : 16;
1127
Hans J. Koch9ffa7392007-10-16 01:28:41 -07001128 if ((fbi->lccr4 & LCCR4_PAL_FOR_MASK) == LCCR4_PAL_FOR_0)
1129 palette_mem_size = fbi->palette_size * sizeof(u16);
1130 else
1131 palette_mem_size = fbi->palette_size * sizeof(u32);
1132
Russell Kingca5da712005-09-29 09:44:54 +01001133 pr_debug("pxafb: palette_mem_size = 0x%08lx\n", palette_mem_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001134
1135 fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size);
1136 fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size;
1137 }
1138
1139 return fbi->map_cpu ? 0 : -ENOMEM;
1140}
1141
1142static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev)
1143{
1144 struct pxafb_info *fbi;
1145 void *addr;
1146 struct pxafb_mach_info *inf = dev->platform_data;
Richard Purdied14b2722006-09-20 22:54:21 +01001147 struct pxafb_mode_info *mode = inf->modes;
1148 int i, smemlen;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001149
1150 /* Alloc the pxafb_info and pseudo_palette in one step */
1151 fbi = kmalloc(sizeof(struct pxafb_info) + sizeof(u32) * 16, GFP_KERNEL);
1152 if (!fbi)
1153 return NULL;
1154
1155 memset(fbi, 0, sizeof(struct pxafb_info));
1156 fbi->dev = dev;
1157
Russell King72e35242007-08-20 10:18:42 +01001158 fbi->clk = clk_get(dev, "LCDCLK");
1159 if (IS_ERR(fbi->clk)) {
1160 kfree(fbi);
1161 return NULL;
1162 }
1163
Linus Torvalds1da177e2005-04-16 15:20:36 -07001164 strcpy(fbi->fb.fix.id, PXA_NAME);
1165
1166 fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS;
1167 fbi->fb.fix.type_aux = 0;
1168 fbi->fb.fix.xpanstep = 0;
1169 fbi->fb.fix.ypanstep = 0;
1170 fbi->fb.fix.ywrapstep = 0;
1171 fbi->fb.fix.accel = FB_ACCEL_NONE;
1172
1173 fbi->fb.var.nonstd = 0;
1174 fbi->fb.var.activate = FB_ACTIVATE_NOW;
1175 fbi->fb.var.height = -1;
1176 fbi->fb.var.width = -1;
1177 fbi->fb.var.accel_flags = 0;
1178 fbi->fb.var.vmode = FB_VMODE_NONINTERLACED;
1179
1180 fbi->fb.fbops = &pxafb_ops;
1181 fbi->fb.flags = FBINFO_DEFAULT;
1182 fbi->fb.node = -1;
1183
1184 addr = fbi;
1185 addr = addr + sizeof(struct pxafb_info);
1186 fbi->fb.pseudo_palette = addr;
1187
Richard Purdied14b2722006-09-20 22:54:21 +01001188 pxafb_setmode(&fbi->fb.var, mode);
1189
Linus Torvalds1da177e2005-04-16 15:20:36 -07001190 fbi->cmap_inverse = inf->cmap_inverse;
1191 fbi->cmap_static = inf->cmap_static;
Richard Purdied14b2722006-09-20 22:54:21 +01001192
Linus Torvalds1da177e2005-04-16 15:20:36 -07001193 fbi->lccr0 = inf->lccr0;
1194 fbi->lccr3 = inf->lccr3;
Hans J. Koch9ffa7392007-10-16 01:28:41 -07001195 fbi->lccr4 = inf->lccr4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001196 fbi->state = C_STARTUP;
1197 fbi->task_state = (u_char)-1;
Richard Purdied14b2722006-09-20 22:54:21 +01001198
1199 for (i = 0; i < inf->num_modes; i++) {
1200 smemlen = mode[i].xres * mode[i].yres * mode[i].bpp / 8;
1201 if (smemlen > fbi->fb.fix.smem_len)
1202 fbi->fb.fix.smem_len = smemlen;
1203 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001204
1205 init_waitqueue_head(&fbi->ctrlr_wait);
David Howells6d5aefb2006-12-05 19:36:26 +00001206 INIT_WORK(&fbi->task, pxafb_task);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001207 init_MUTEX(&fbi->ctrlr_sem);
1208
1209 return fbi;
1210}
1211
1212#ifdef CONFIG_FB_PXA_PARAMETERS
1213static int __init pxafb_parse_options(struct device *dev, char *options)
1214{
1215 struct pxafb_mach_info *inf = dev->platform_data;
1216 char *this_opt;
1217
1218 if (!options || !*options)
1219 return 0;
1220
1221 dev_dbg(dev, "options are \"%s\"\n", options ? options : "null");
1222
1223 /* could be made table driven or similar?... */
1224 while ((this_opt = strsep(&options, ",")) != NULL) {
1225 if (!strncmp(this_opt, "mode:", 5)) {
1226 const char *name = this_opt+5;
1227 unsigned int namelen = strlen(name);
1228 int res_specified = 0, bpp_specified = 0;
1229 unsigned int xres = 0, yres = 0, bpp = 0;
1230 int yres_specified = 0;
1231 int i;
1232 for (i = namelen-1; i >= 0; i--) {
1233 switch (name[i]) {
1234 case '-':
1235 namelen = i;
1236 if (!bpp_specified && !yres_specified) {
1237 bpp = simple_strtoul(&name[i+1], NULL, 0);
1238 bpp_specified = 1;
1239 } else
1240 goto done;
1241 break;
1242 case 'x':
1243 if (!yres_specified) {
1244 yres = simple_strtoul(&name[i+1], NULL, 0);
1245 yres_specified = 1;
1246 } else
1247 goto done;
1248 break;
Robert P. J. Day88b229c2007-05-08 00:38:27 -07001249 case '0' ... '9':
Linus Torvalds1da177e2005-04-16 15:20:36 -07001250 break;
1251 default:
1252 goto done;
1253 }
1254 }
1255 if (i < 0 && yres_specified) {
1256 xres = simple_strtoul(name, NULL, 0);
1257 res_specified = 1;
1258 }
1259 done:
1260 if (res_specified) {
1261 dev_info(dev, "overriding resolution: %dx%d\n", xres, yres);
Richard Purdie46a34d62006-12-17 01:01:11 +01001262 inf->modes[0].xres = xres; inf->modes[0].yres = yres;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001263 }
1264 if (bpp_specified)
1265 switch (bpp) {
1266 case 1:
1267 case 2:
1268 case 4:
1269 case 8:
1270 case 16:
Richard Purdie46a34d62006-12-17 01:01:11 +01001271 inf->modes[0].bpp = bpp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001272 dev_info(dev, "overriding bit depth: %d\n", bpp);
1273 break;
1274 default:
1275 dev_err(dev, "Depth %d is not valid\n", bpp);
1276 }
1277 } else if (!strncmp(this_opt, "pixclock:", 9)) {
Richard Purdie46a34d62006-12-17 01:01:11 +01001278 inf->modes[0].pixclock = simple_strtoul(this_opt+9, NULL, 0);
1279 dev_info(dev, "override pixclock: %ld\n", inf->modes[0].pixclock);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001280 } else if (!strncmp(this_opt, "left:", 5)) {
Richard Purdie46a34d62006-12-17 01:01:11 +01001281 inf->modes[0].left_margin = simple_strtoul(this_opt+5, NULL, 0);
1282 dev_info(dev, "override left: %u\n", inf->modes[0].left_margin);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001283 } else if (!strncmp(this_opt, "right:", 6)) {
Richard Purdie46a34d62006-12-17 01:01:11 +01001284 inf->modes[0].right_margin = simple_strtoul(this_opt+6, NULL, 0);
1285 dev_info(dev, "override right: %u\n", inf->modes[0].right_margin);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001286 } else if (!strncmp(this_opt, "upper:", 6)) {
Richard Purdie46a34d62006-12-17 01:01:11 +01001287 inf->modes[0].upper_margin = simple_strtoul(this_opt+6, NULL, 0);
1288 dev_info(dev, "override upper: %u\n", inf->modes[0].upper_margin);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001289 } else if (!strncmp(this_opt, "lower:", 6)) {
Richard Purdie46a34d62006-12-17 01:01:11 +01001290 inf->modes[0].lower_margin = simple_strtoul(this_opt+6, NULL, 0);
1291 dev_info(dev, "override lower: %u\n", inf->modes[0].lower_margin);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001292 } else if (!strncmp(this_opt, "hsynclen:", 9)) {
Richard Purdie46a34d62006-12-17 01:01:11 +01001293 inf->modes[0].hsync_len = simple_strtoul(this_opt+9, NULL, 0);
1294 dev_info(dev, "override hsynclen: %u\n", inf->modes[0].hsync_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001295 } else if (!strncmp(this_opt, "vsynclen:", 9)) {
Richard Purdie46a34d62006-12-17 01:01:11 +01001296 inf->modes[0].vsync_len = simple_strtoul(this_opt+9, NULL, 0);
1297 dev_info(dev, "override vsynclen: %u\n", inf->modes[0].vsync_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001298 } else if (!strncmp(this_opt, "hsync:", 6)) {
1299 if (simple_strtoul(this_opt+6, NULL, 0) == 0) {
1300 dev_info(dev, "override hsync: Active Low\n");
Richard Purdie46a34d62006-12-17 01:01:11 +01001301 inf->modes[0].sync &= ~FB_SYNC_HOR_HIGH_ACT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001302 } else {
1303 dev_info(dev, "override hsync: Active High\n");
Richard Purdie46a34d62006-12-17 01:01:11 +01001304 inf->modes[0].sync |= FB_SYNC_HOR_HIGH_ACT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001305 }
1306 } else if (!strncmp(this_opt, "vsync:", 6)) {
1307 if (simple_strtoul(this_opt+6, NULL, 0) == 0) {
1308 dev_info(dev, "override vsync: Active Low\n");
Richard Purdie46a34d62006-12-17 01:01:11 +01001309 inf->modes[0].sync &= ~FB_SYNC_VERT_HIGH_ACT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001310 } else {
1311 dev_info(dev, "override vsync: Active High\n");
Richard Purdie46a34d62006-12-17 01:01:11 +01001312 inf->modes[0].sync |= FB_SYNC_VERT_HIGH_ACT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001313 }
1314 } else if (!strncmp(this_opt, "dpc:", 4)) {
1315 if (simple_strtoul(this_opt+4, NULL, 0) == 0) {
1316 dev_info(dev, "override double pixel clock: false\n");
1317 inf->lccr3 &= ~LCCR3_DPC;
1318 } else {
1319 dev_info(dev, "override double pixel clock: true\n");
1320 inf->lccr3 |= LCCR3_DPC;
1321 }
1322 } else if (!strncmp(this_opt, "outputen:", 9)) {
1323 if (simple_strtoul(this_opt+9, NULL, 0) == 0) {
1324 dev_info(dev, "override output enable: active low\n");
1325 inf->lccr3 = (inf->lccr3 & ~LCCR3_OEP) | LCCR3_OutEnL;
1326 } else {
1327 dev_info(dev, "override output enable: active high\n");
1328 inf->lccr3 = (inf->lccr3 & ~LCCR3_OEP) | LCCR3_OutEnH;
1329 }
1330 } else if (!strncmp(this_opt, "pixclockpol:", 12)) {
1331 if (simple_strtoul(this_opt+12, NULL, 0) == 0) {
1332 dev_info(dev, "override pixel clock polarity: falling edge\n");
1333 inf->lccr3 = (inf->lccr3 & ~LCCR3_PCP) | LCCR3_PixFlEdg;
1334 } else {
1335 dev_info(dev, "override pixel clock polarity: rising edge\n");
1336 inf->lccr3 = (inf->lccr3 & ~LCCR3_PCP) | LCCR3_PixRsEdg;
1337 }
1338 } else if (!strncmp(this_opt, "color", 5)) {
1339 inf->lccr0 = (inf->lccr0 & ~LCCR0_CMS) | LCCR0_Color;
1340 } else if (!strncmp(this_opt, "mono", 4)) {
1341 inf->lccr0 = (inf->lccr0 & ~LCCR0_CMS) | LCCR0_Mono;
1342 } else if (!strncmp(this_opt, "active", 6)) {
1343 inf->lccr0 = (inf->lccr0 & ~LCCR0_PAS) | LCCR0_Act;
1344 } else if (!strncmp(this_opt, "passive", 7)) {
1345 inf->lccr0 = (inf->lccr0 & ~LCCR0_PAS) | LCCR0_Pas;
1346 } else if (!strncmp(this_opt, "single", 6)) {
1347 inf->lccr0 = (inf->lccr0 & ~LCCR0_SDS) | LCCR0_Sngl;
1348 } else if (!strncmp(this_opt, "dual", 4)) {
1349 inf->lccr0 = (inf->lccr0 & ~LCCR0_SDS) | LCCR0_Dual;
1350 } else if (!strncmp(this_opt, "4pix", 4)) {
1351 inf->lccr0 = (inf->lccr0 & ~LCCR0_DPD) | LCCR0_4PixMono;
1352 } else if (!strncmp(this_opt, "8pix", 4)) {
1353 inf->lccr0 = (inf->lccr0 & ~LCCR0_DPD) | LCCR0_8PixMono;
1354 } else {
1355 dev_err(dev, "unknown option: %s\n", this_opt);
1356 return -EINVAL;
1357 }
1358 }
1359 return 0;
1360
1361}
1362#endif
1363
Russell King3ae5eae2005-11-09 22:32:44 +00001364int __init pxafb_probe(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001365{
1366 struct pxafb_info *fbi;
1367 struct pxafb_mach_info *inf;
1368 int ret;
1369
Richard Purdie2cbbb3b2006-03-31 02:31:53 -08001370 dev_dbg(&dev->dev, "pxafb_probe\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001371
Russell King3ae5eae2005-11-09 22:32:44 +00001372 inf = dev->dev.platform_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001373 ret = -ENOMEM;
1374 fbi = NULL;
1375 if (!inf)
1376 goto failed;
1377
1378#ifdef CONFIG_FB_PXA_PARAMETERS
Russell King3ae5eae2005-11-09 22:32:44 +00001379 ret = pxafb_parse_options(&dev->dev, g_options);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001380 if (ret < 0)
1381 goto failed;
1382#endif
1383
1384#ifdef DEBUG_VAR
1385 /* Check for various illegal bit-combinations. Currently only
1386 * a warning is given. */
1387
1388 if (inf->lccr0 & LCCR0_INVALID_CONFIG_MASK)
Russell King3ae5eae2005-11-09 22:32:44 +00001389 dev_warn(&dev->dev, "machine LCCR0 setting contains illegal bits: %08x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001390 inf->lccr0 & LCCR0_INVALID_CONFIG_MASK);
1391 if (inf->lccr3 & LCCR3_INVALID_CONFIG_MASK)
Russell King3ae5eae2005-11-09 22:32:44 +00001392 dev_warn(&dev->dev, "machine LCCR3 setting contains illegal bits: %08x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001393 inf->lccr3 & LCCR3_INVALID_CONFIG_MASK);
1394 if (inf->lccr0 & LCCR0_DPD &&
1395 ((inf->lccr0 & LCCR0_PAS) != LCCR0_Pas ||
1396 (inf->lccr0 & LCCR0_SDS) != LCCR0_Sngl ||
1397 (inf->lccr0 & LCCR0_CMS) != LCCR0_Mono))
Russell King3ae5eae2005-11-09 22:32:44 +00001398 dev_warn(&dev->dev, "Double Pixel Data (DPD) mode is only valid in passive mono"
Linus Torvalds1da177e2005-04-16 15:20:36 -07001399 " single panel mode\n");
1400 if ((inf->lccr0 & LCCR0_PAS) == LCCR0_Act &&
1401 (inf->lccr0 & LCCR0_SDS) == LCCR0_Dual)
Russell King3ae5eae2005-11-09 22:32:44 +00001402 dev_warn(&dev->dev, "Dual panel only valid in passive mode\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001403 if ((inf->lccr0 & LCCR0_PAS) == LCCR0_Pas &&
Richard Purdied14b2722006-09-20 22:54:21 +01001404 (inf->modes->upper_margin || inf->modes->lower_margin))
Russell King3ae5eae2005-11-09 22:32:44 +00001405 dev_warn(&dev->dev, "Upper and lower margins must be 0 in passive mode\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001406#endif
1407
Richard Purdied14b2722006-09-20 22:54:21 +01001408 dev_dbg(&dev->dev, "got a %dx%dx%d LCD\n",inf->modes->xres, inf->modes->yres, inf->modes->bpp);
1409 if (inf->modes->xres == 0 || inf->modes->yres == 0 || inf->modes->bpp == 0) {
Russell King3ae5eae2005-11-09 22:32:44 +00001410 dev_err(&dev->dev, "Invalid resolution or bit depth\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001411 ret = -EINVAL;
1412 goto failed;
1413 }
1414 pxafb_backlight_power = inf->pxafb_backlight_power;
1415 pxafb_lcd_power = inf->pxafb_lcd_power;
Russell King3ae5eae2005-11-09 22:32:44 +00001416 fbi = pxafb_init_fbinfo(&dev->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001417 if (!fbi) {
Russell King3ae5eae2005-11-09 22:32:44 +00001418 dev_err(&dev->dev, "Failed to initialize framebuffer device\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001419 ret = -ENOMEM; // only reason for pxafb_init_fbinfo to fail is kmalloc
1420 goto failed;
1421 }
1422
1423 /* Initialize video memory */
1424 ret = pxafb_map_video_memory(fbi);
1425 if (ret) {
Russell King3ae5eae2005-11-09 22:32:44 +00001426 dev_err(&dev->dev, "Failed to allocate video RAM: %d\n", ret);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001427 ret = -ENOMEM;
1428 goto failed;
1429 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001430
Thomas Gleixner63a43392006-07-01 19:29:45 -07001431 ret = request_irq(IRQ_LCD, pxafb_handle_irq, IRQF_DISABLED, "LCD", fbi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001432 if (ret) {
Russell King3ae5eae2005-11-09 22:32:44 +00001433 dev_err(&dev->dev, "request_irq failed: %d\n", ret);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001434 ret = -EBUSY;
1435 goto failed;
1436 }
1437
1438 /*
1439 * This makes sure that our colour bitfield
1440 * descriptors are correctly initialised.
1441 */
1442 pxafb_check_var(&fbi->fb.var, &fbi->fb);
1443 pxafb_set_par(&fbi->fb);
1444
Russell King3ae5eae2005-11-09 22:32:44 +00001445 platform_set_drvdata(dev, fbi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001446
1447 ret = register_framebuffer(&fbi->fb);
1448 if (ret < 0) {
Russell King3ae5eae2005-11-09 22:32:44 +00001449 dev_err(&dev->dev, "Failed to register framebuffer device: %d\n", ret);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001450 goto failed;
1451 }
1452
1453#ifdef CONFIG_PM
1454 // TODO
1455#endif
1456
1457#ifdef CONFIG_CPU_FREQ
1458 fbi->freq_transition.notifier_call = pxafb_freq_transition;
1459 fbi->freq_policy.notifier_call = pxafb_freq_policy;
1460 cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
1461 cpufreq_register_notifier(&fbi->freq_policy, CPUFREQ_POLICY_NOTIFIER);
1462#endif
1463
1464 /*
1465 * Ok, now enable the LCD controller
1466 */
1467 set_ctrlr_state(fbi, C_ENABLE);
1468
1469 return 0;
1470
1471failed:
Russell King3ae5eae2005-11-09 22:32:44 +00001472 platform_set_drvdata(dev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001473 kfree(fbi);
1474 return ret;
1475}
1476
Russell King3ae5eae2005-11-09 22:32:44 +00001477static struct platform_driver pxafb_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001478 .probe = pxafb_probe,
1479#ifdef CONFIG_PM
1480 .suspend = pxafb_suspend,
1481 .resume = pxafb_resume,
1482#endif
Russell King3ae5eae2005-11-09 22:32:44 +00001483 .driver = {
1484 .name = "pxa2xx-fb",
1485 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001486};
1487
1488#ifndef MODULE
1489int __devinit pxafb_setup(char *options)
1490{
1491# ifdef CONFIG_FB_PXA_PARAMETERS
Ole Reinhardtfb79ffa2005-12-13 17:03:38 -08001492 if (options)
1493 strlcpy(g_options, options, sizeof(g_options));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001494# endif
1495 return 0;
1496}
1497#else
1498# ifdef CONFIG_FB_PXA_PARAMETERS
1499module_param_string(options, g_options, sizeof(g_options), 0);
1500MODULE_PARM_DESC(options, "LCD parameters (see Documentation/fb/pxafb.txt)");
1501# endif
1502#endif
1503
1504int __devinit pxafb_init(void)
1505{
1506#ifndef MODULE
1507 char *option = NULL;
1508
1509 if (fb_get_options("pxafb", &option))
1510 return -ENODEV;
1511 pxafb_setup(option);
1512#endif
Russell King3ae5eae2005-11-09 22:32:44 +00001513 return platform_driver_register(&pxafb_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001514}
1515
1516module_init(pxafb_init);
1517
1518MODULE_DESCRIPTION("loadable framebuffer driver for PXA");
1519MODULE_LICENSE("GPL");