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Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +08001/*
2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 *
8 * Licensed under GPLv2 or later.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 model = "Atmel AT91SAM9260 family SoC";
15 compatible = "atmel,at91sam9260";
16 interrupt-parent = <&aic>;
17
18 aliases {
19 serial0 = &dbgu;
20 serial1 = &usart0;
21 serial2 = &usart1;
22 serial3 = &usart2;
23 serial4 = &usart3;
24 serial5 = &usart4;
25 serial6 = &usart5;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 tcb0 = &tcb0;
30 tcb1 = &tcb1;
Ludovic Desroches05dcd362012-09-12 08:42:16 +020031 i2c0 = &i2c0;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +080032 };
33 cpus {
34 cpu@0 {
35 compatible = "arm,arm926ejs";
36 };
37 };
38
39 memory {
40 reg = <0x20000000 0x04000000>;
41 };
42
43 ahb {
44 compatible = "simple-bus";
45 #address-cells = <1>;
46 #size-cells = <1>;
47 ranges;
48
49 apb {
50 compatible = "simple-bus";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 ranges;
54
55 aic: interrupt-controller@fffff000 {
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020056 #interrupt-cells = <3>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +080057 compatible = "atmel,at91rm9200-aic";
58 interrupt-controller;
59 reg = <0xfffff000 0x200>;
Jean-Christophe PLAGNIOL-VILLARDc6573942012-04-09 19:36:36 +080060 atmel,external-irqs = <29 30 31>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +080061 };
62
63 ramc0: ramc@ffffea00 {
64 compatible = "atmel,at91sam9260-sdramc";
65 reg = <0xffffea00 0x200>;
66 };
67
68 pmc: pmc@fffffc00 {
69 compatible = "atmel,at91rm9200-pmc";
70 reg = <0xfffffc00 0x100>;
71 };
72
73 rstc@fffffd00 {
74 compatible = "atmel,at91sam9260-rstc";
75 reg = <0xfffffd00 0x10>;
76 };
77
78 shdwc@fffffd10 {
79 compatible = "atmel,at91sam9260-shdwc";
80 reg = <0xfffffd10 0x10>;
81 };
82
83 pit: timer@fffffd30 {
84 compatible = "atmel,at91sam9260-pit";
85 reg = <0xfffffd30 0xf>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020086 interrupts = <1 4 7>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +080087 };
88
89 tcb0: timer@fffa0000 {
90 compatible = "atmel,at91rm9200-tcb";
91 reg = <0xfffa0000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020092 interrupts = <17 4 0 18 4 0 19 4 0>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +080093 };
94
95 tcb1: timer@fffdc000 {
96 compatible = "atmel,at91rm9200-tcb";
97 reg = <0xfffdc000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020098 interrupts = <26 4 0 27 4 0 28 4 0>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +080099 };
100
Jean-Christophe PLAGNIOL-VILLARDe4541ff2012-07-04 17:20:46 +0800101 pinctrl@fffff400 {
102 #address-cells = <1>;
103 #size-cells = <1>;
104 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
105 ranges = <0xfffff400 0xfffff400 0x600>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800106
Jean-Christophe PLAGNIOL-VILLARD5314ec82012-07-05 16:56:09 +0800107 atmel,mux-mask = <
108 /* A B */
109 0xffffffff 0xffc00c3b /* pioA */
110 0xffffffff 0x7fff3ccf /* pioB */
111 0xffffffff 0x007fffff /* pioC */
112 >;
113
114 /* shared pinctrl settings */
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800115 dbgu {
116 pinctrl_dbgu: dbgu-0 {
117 atmel,pins =
118 <1 14 0x1 0x0 /* PB14 periph A */
119 1 15 0x1 0x1>; /* PB15 periph with pullup */
120 };
121 };
122
123 uart0 {
124 pinctrl_uart0: uart0-0 {
125 atmel,pins =
126 <1 4 0x1 0x0 /* PB4 periph A */
127 1 5 0x1 0x0>; /* PB5 periph A */
128 };
129
130 pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
131 atmel,pins =
132 <1 26 0x1 0x0 /* PB26 periph A */
133 1 27 0x1 0x0>; /* PB27 periph A */
134 };
135
136 pinctrl_uart0_dtr_dsr: uart0_dtr_dsr-0 {
137 atmel,pins =
138 <1 24 0x1 0x0 /* PB24 periph A */
139 1 22 0x1 0x0>; /* PB22 periph A */
140 };
141
142 pinctrl_uart0_dcd: uart0_dcd-0 {
143 atmel,pins =
144 <1 23 0x1 0x0>; /* PB23 periph A */
145 };
146
147 pinctrl_uart0_ri: uart0_ri-0 {
148 atmel,pins =
149 <1 25 0x1 0x0>; /* PB25 periph A */
150 };
151 };
152
153 uart1 {
154 pinctrl_uart1: uart1-0 {
155 atmel,pins =
156 <2 6 0x1 0x1 /* PB6 periph A with pullup */
157 2 7 0x1 0x0>; /* PB7 periph A */
158 };
159
160 pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
161 atmel,pins =
162 <1 28 0x1 0x0 /* PB28 periph A */
163 1 29 0x1 0x0>; /* PB29 periph A */
164 };
165 };
166
167 uart2 {
168 pinctrl_uart2: uart2-0 {
169 atmel,pins =
170 <1 8 0x1 0x1 /* PB8 periph A with pullup */
171 1 9 0x1 0x0>; /* PB9 periph A */
172 };
173
174 pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
175 atmel,pins =
176 <0 4 0x1 0x0 /* PA4 periph A */
177 0 5 0x1 0x0>; /* PA5 periph A */
178 };
179 };
180
181 uart3 {
182 pinctrl_uart3: uart3-0 {
183 atmel,pins =
184 <2 10 0x1 0x1 /* PB10 periph A with pullup */
185 2 11 0x1 0x0>; /* PB11 periph A */
186 };
187
188 pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
189 atmel,pins =
190 <3 8 0x2 0x0 /* PB8 periph B */
191 3 10 0x2 0x0>; /* PB10 periph B */
192 };
193 };
194
195 uart4 {
196 pinctrl_uart4: uart4-0 {
197 atmel,pins =
198 <0 31 0x2 0x1 /* PA31 periph B with pullup */
199 0 30 0x2 0x0>; /* PA30 periph B */
200 };
201 };
202
203 uart5 {
204 pinctrl_uart5: uart5-0 {
205 atmel,pins =
206 <2 12 0x1 0x1 /* PB12 periph A with pullup */
207 2 13 0x1 0x0>; /* PB13 periph A */
208 };
209 };
Jean-Christophe PLAGNIOL-VILLARD5314ec82012-07-05 16:56:09 +0800210
Jean-Christophe PLAGNIOL-VILLARDe4541ff2012-07-04 17:20:46 +0800211 pioA: gpio@fffff400 {
212 compatible = "atmel,at91rm9200-gpio";
213 reg = <0xfffff400 0x200>;
214 interrupts = <2 4 1>;
215 #gpio-cells = <2>;
216 gpio-controller;
217 interrupt-controller;
218 #interrupt-cells = <2>;
219 };
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800220
Jean-Christophe PLAGNIOL-VILLARDe4541ff2012-07-04 17:20:46 +0800221 pioB: gpio@fffff600 {
222 compatible = "atmel,at91rm9200-gpio";
223 reg = <0xfffff600 0x200>;
224 interrupts = <3 4 1>;
225 #gpio-cells = <2>;
226 gpio-controller;
227 interrupt-controller;
228 #interrupt-cells = <2>;
229 };
230
231 pioC: gpio@fffff800 {
232 compatible = "atmel,at91rm9200-gpio";
233 reg = <0xfffff800 0x200>;
234 interrupts = <4 4 1>;
235 #gpio-cells = <2>;
236 gpio-controller;
237 interrupt-controller;
238 #interrupt-cells = <2>;
239 };
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800240 };
241
242 dbgu: serial@fffff200 {
243 compatible = "atmel,at91sam9260-usart";
244 reg = <0xfffff200 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200245 interrupts = <1 4 7>;
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_dbgu>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800248 status = "disabled";
249 };
250
251 usart0: serial@fffb0000 {
252 compatible = "atmel,at91sam9260-usart";
253 reg = <0xfffb0000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200254 interrupts = <6 4 5>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800255 atmel,use-dma-rx;
256 atmel,use-dma-tx;
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_uart0>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800259 status = "disabled";
260 };
261
262 usart1: serial@fffb4000 {
263 compatible = "atmel,at91sam9260-usart";
264 reg = <0xfffb4000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200265 interrupts = <7 4 5>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800266 atmel,use-dma-rx;
267 atmel,use-dma-tx;
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800268 pinctrl-names = "default";
269 pinctrl-0 = <&pinctrl_uart1>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800270 status = "disabled";
271 };
272
273 usart2: serial@fffb8000 {
274 compatible = "atmel,at91sam9260-usart";
275 reg = <0xfffb8000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200276 interrupts = <8 4 5>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800277 atmel,use-dma-rx;
278 atmel,use-dma-tx;
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800279 pinctrl-names = "default";
280 pinctrl-0 = <&pinctrl_uart2>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800281 status = "disabled";
282 };
283
284 usart3: serial@fffd0000 {
285 compatible = "atmel,at91sam9260-usart";
286 reg = <0xfffd0000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200287 interrupts = <23 4 5>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800288 atmel,use-dma-rx;
289 atmel,use-dma-tx;
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_uart3>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800292 status = "disabled";
293 };
294
295 usart4: serial@fffd4000 {
296 compatible = "atmel,at91sam9260-usart";
297 reg = <0xfffd4000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200298 interrupts = <24 4 5>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800299 atmel,use-dma-rx;
300 atmel,use-dma-tx;
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800301 pinctrl-names = "default";
302 pinctrl-0 = <&pinctrl_uart4>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800303 status = "disabled";
304 };
305
306 usart5: serial@fffd8000 {
307 compatible = "atmel,at91sam9260-usart";
308 reg = <0xfffd8000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200309 interrupts = <25 4 5>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800310 atmel,use-dma-rx;
311 atmel,use-dma-tx;
Jean-Christophe PLAGNIOL-VILLARDec6754a2012-07-05 16:56:09 +0800312 pinctrl-names = "default";
313 pinctrl-0 = <&pinctrl_uart5>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800314 status = "disabled";
315 };
316
317 macb0: ethernet@fffc4000 {
318 compatible = "cdns,at32ap7000-macb", "cdns,macb";
319 reg = <0xfffc4000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200320 interrupts = <21 4 3>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800321 status = "disabled";
322 };
323
324 usb1: gadget@fffa4000 {
325 compatible = "atmel,at91rm9200-udc";
326 reg = <0xfffa4000 0x4000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200327 interrupts = <10 4 2>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800328 status = "disabled";
329 };
Nicolas Ferre73d68d92012-05-16 17:37:06 +0200330
Ludovic Desroches05dcd362012-09-12 08:42:16 +0200331 i2c0: i2c@fffac000 {
332 compatible = "atmel,at91sam9260-i2c";
333 reg = <0xfffac000 0x100>;
334 interrupts = <11 4 6>;
335 #address-cells = <1>;
336 #size-cells = <0>;
337 status = "disabled";
338 };
339
Nicolas Ferre73d68d92012-05-16 17:37:06 +0200340 adc0: adc@fffe0000 {
341 compatible = "atmel,at91sam9260-adc";
342 reg = <0xfffe0000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200343 interrupts = <5 4 0>;
Nicolas Ferre73d68d92012-05-16 17:37:06 +0200344 atmel,adc-use-external-triggers;
345 atmel,adc-channels-used = <0xf>;
346 atmel,adc-vref = <3300>;
347 atmel,adc-num-channels = <4>;
348 atmel,adc-startup-time = <15>;
349 atmel,adc-channel-base = <0x30>;
350 atmel,adc-drdy-mask = <0x10000>;
351 atmel,adc-status-register = <0x1c>;
352 atmel,adc-trigger-register = <0x04>;
353
354 trigger@0 {
355 trigger-name = "timer-counter-0";
356 trigger-value = <0x1>;
357 };
358 trigger@1 {
359 trigger-name = "timer-counter-1";
360 trigger-value = <0x3>;
361 };
362
363 trigger@2 {
364 trigger-name = "timer-counter-2";
365 trigger-value = <0x5>;
366 };
367
368 trigger@3 {
369 trigger-name = "external";
370 trigger-value = <0x13>;
371 trigger-external;
372 };
373 };
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800374 };
375
376 nand0: nand@40000000 {
377 compatible = "atmel,at91rm9200-nand";
378 #address-cells = <1>;
379 #size-cells = <1>;
380 reg = <0x40000000 0x10000000
381 0xffffe800 0x200
382 >;
383 atmel,nand-addr-offset = <21>;
384 atmel,nand-cmd-offset = <22>;
385 gpios = <&pioC 13 0
386 &pioC 14 0
387 0
388 >;
389 status = "disabled";
390 };
391
392 usb0: ohci@00500000 {
393 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
394 reg = <0x00500000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200395 interrupts = <20 4 2>;
Jean-Christophe PLAGNIOL-VILLARD5b6089c2012-04-09 19:26:33 +0800396 status = "disabled";
397 };
398 };
399
400 i2c@0 {
401 compatible = "i2c-gpio";
402 gpios = <&pioA 23 0 /* sda */
403 &pioA 24 0 /* scl */
404 >;
405 i2c-gpio,sda-open-drain;
406 i2c-gpio,scl-open-drain;
407 i2c-gpio,delay-us = <2>; /* ~100 kHz */
408 #address-cells = <1>;
409 #size-cells = <0>;
410 status = "disabled";
411 };
412};