Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/pci/setup-bus.c |
| 3 | * |
| 4 | * Extruded from code written by |
| 5 | * Dave Rusling (david.rusling@reo.mts.dec.com) |
| 6 | * David Mosberger (davidm@cs.arizona.edu) |
| 7 | * David Miller (davem@redhat.com) |
| 8 | * |
| 9 | * Support routines for initializing a PCI subsystem. |
| 10 | */ |
| 11 | |
| 12 | /* |
| 13 | * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru> |
| 14 | * PCI-PCI bridges cleanup, sorted resource allocation. |
| 15 | * Feb 2002, Ivan Kokshaysky <ink@jurassic.park.msu.ru> |
| 16 | * Converted to allocation in 3 passes, which gives |
| 17 | * tighter packing. Prefetchable range support. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/pci.h> |
| 24 | #include <linux/errno.h> |
| 25 | #include <linux/ioport.h> |
| 26 | #include <linux/cache.h> |
| 27 | #include <linux/slab.h> |
Chris Wright | 6faf17f | 2009-08-28 13:00:06 -0700 | [diff] [blame] | 28 | #include "pci.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 30 | struct resource_list_x { |
| 31 | struct resource_list_x *next; |
| 32 | struct resource *res; |
| 33 | struct pci_dev *dev; |
| 34 | resource_size_t start; |
| 35 | resource_size_t end; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 36 | resource_size_t add_size; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 37 | resource_size_t min_align; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 38 | unsigned long flags; |
| 39 | }; |
| 40 | |
Ram Pai | 094732a | 2011-02-14 17:43:18 -0800 | [diff] [blame] | 41 | #define free_list(type, head) do { \ |
| 42 | struct type *list, *tmp; \ |
| 43 | for (list = (head)->next; list;) { \ |
| 44 | tmp = list; \ |
| 45 | list = list->next; \ |
| 46 | kfree(tmp); \ |
| 47 | } \ |
| 48 | (head)->next = NULL; \ |
| 49 | } while (0) |
| 50 | |
Ram Pai | f483d39 | 2011-07-07 11:19:10 -0700 | [diff] [blame] | 51 | int pci_realloc_enable = 0; |
| 52 | #define pci_realloc_enabled() pci_realloc_enable |
| 53 | void pci_realloc(void) |
| 54 | { |
| 55 | pci_realloc_enable = 1; |
| 56 | } |
| 57 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 58 | /** |
| 59 | * add_to_list() - add a new resource tracker to the list |
| 60 | * @head: Head of the list |
| 61 | * @dev: device corresponding to which the resource |
| 62 | * belongs |
| 63 | * @res: The resource to be tracked |
| 64 | * @add_size: additional size to be optionally added |
| 65 | * to the resource |
| 66 | */ |
Yinghai Lu | ef62dfe | 2012-01-21 02:08:18 -0800 | [diff] [blame^] | 67 | static int add_to_list(struct resource_list_x *head, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 68 | struct pci_dev *dev, struct resource *res, |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 69 | resource_size_t add_size, resource_size_t min_align) |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 70 | { |
| 71 | struct resource_list_x *list = head; |
| 72 | struct resource_list_x *ln = list->next; |
| 73 | struct resource_list_x *tmp; |
| 74 | |
| 75 | tmp = kmalloc(sizeof(*tmp), GFP_KERNEL); |
| 76 | if (!tmp) { |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 77 | pr_warning("add_to_list: kmalloc() failed!\n"); |
Yinghai Lu | ef62dfe | 2012-01-21 02:08:18 -0800 | [diff] [blame^] | 78 | return -ENOMEM; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 79 | } |
| 80 | |
| 81 | tmp->next = ln; |
| 82 | tmp->res = res; |
| 83 | tmp->dev = dev; |
| 84 | tmp->start = res->start; |
| 85 | tmp->end = res->end; |
| 86 | tmp->flags = res->flags; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 87 | tmp->add_size = add_size; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 88 | tmp->min_align = min_align; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 89 | list->next = tmp; |
Yinghai Lu | ef62dfe | 2012-01-21 02:08:18 -0800 | [diff] [blame^] | 90 | |
| 91 | return 0; |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 92 | } |
| 93 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 94 | static void add_to_failed_list(struct resource_list_x *head, |
| 95 | struct pci_dev *dev, struct resource *res) |
| 96 | { |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 97 | add_to_list(head, dev, res, |
| 98 | 0 /* dont care */, |
| 99 | 0 /* dont care */); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 100 | } |
| 101 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 102 | static void __dev_sort_resources(struct pci_dev *dev, |
| 103 | struct resource_list *head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | { |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 105 | u16 class = dev->class >> 8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 107 | /* Don't touch classless devices or host bridges or ioapics. */ |
| 108 | if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST) |
| 109 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 111 | /* Don't touch ioapic devices already enabled by firmware */ |
| 112 | if (class == PCI_CLASS_SYSTEM_PIC) { |
| 113 | u16 command; |
| 114 | pci_read_config_word(dev, PCI_COMMAND, &command); |
| 115 | if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) |
| 116 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | } |
| 118 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 119 | pdev_sort_resources(dev, head); |
| 120 | } |
| 121 | |
Ram Pai | fc075e1 | 2011-02-14 17:43:19 -0800 | [diff] [blame] | 122 | static inline void reset_resource(struct resource *res) |
| 123 | { |
| 124 | res->start = 0; |
| 125 | res->end = 0; |
| 126 | res->flags = 0; |
| 127 | } |
| 128 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 129 | /** |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 130 | * reassign_resources_sorted() - satisfy any additional resource requests |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 131 | * |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 132 | * @realloc_head : head of the list tracking requests requiring additional |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 133 | * resources |
| 134 | * @head : head of the list tracking requests with allocated |
| 135 | * resources |
| 136 | * |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 137 | * Walk through each element of the realloc_head and try to procure |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 138 | * additional resources for the element, provided the element |
| 139 | * is in the head list. |
| 140 | */ |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 141 | static void reassign_resources_sorted(struct resource_list_x *realloc_head, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 142 | struct resource_list *head) |
| 143 | { |
| 144 | struct resource *res; |
| 145 | struct resource_list_x *list, *tmp, *prev; |
| 146 | struct resource_list *hlist; |
| 147 | resource_size_t add_size; |
| 148 | int idx; |
| 149 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 150 | prev = realloc_head; |
| 151 | for (list = realloc_head->next; list;) { |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 152 | res = list->res; |
| 153 | /* skip resource that has been reset */ |
| 154 | if (!res->flags) |
| 155 | goto out; |
| 156 | |
| 157 | /* skip this resource if not found in head list */ |
| 158 | for (hlist = head->next; hlist && hlist->res != res; |
| 159 | hlist = hlist->next); |
| 160 | if (!hlist) { /* just skip */ |
| 161 | prev = list; |
| 162 | list = list->next; |
| 163 | continue; |
| 164 | } |
| 165 | |
| 166 | idx = res - &list->dev->resource[0]; |
| 167 | add_size=list->add_size; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 168 | if (!resource_size(res)) { |
Ram Pai | 0a2daa1 | 2011-07-25 13:08:41 -0700 | [diff] [blame] | 169 | res->start = list->start; |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 170 | res->end = res->start + add_size - 1; |
| 171 | if(pci_assign_resource(list->dev, idx)) |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 172 | reset_resource(res); |
Ram Pai | 2bbc694 | 2011-07-25 13:08:39 -0700 | [diff] [blame] | 173 | } else { |
| 174 | resource_size_t align = list->min_align; |
| 175 | res->flags |= list->flags & (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN); |
| 176 | if (pci_reassign_resource(list->dev, idx, add_size, align)) |
| 177 | dev_printk(KERN_DEBUG, &list->dev->dev, "failed to add optional resources res=%pR\n", |
| 178 | res); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 179 | } |
| 180 | out: |
| 181 | tmp = list; |
| 182 | prev->next = list = list->next; |
| 183 | kfree(tmp); |
| 184 | } |
| 185 | } |
| 186 | |
| 187 | /** |
| 188 | * assign_requested_resources_sorted() - satisfy resource requests |
| 189 | * |
| 190 | * @head : head of the list tracking requests for resources |
| 191 | * @failed_list : head of the list tracking requests that could |
| 192 | * not be allocated |
| 193 | * |
| 194 | * Satisfy resource requests of each element in the list. Add |
| 195 | * requests that could not satisfied to the failed_list. |
| 196 | */ |
| 197 | static void assign_requested_resources_sorted(struct resource_list *head, |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 198 | struct resource_list_x *fail_head) |
| 199 | { |
| 200 | struct resource *res; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 201 | struct resource_list *list; |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 202 | int idx; |
| 203 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 204 | for (list = head->next; list; list = list->next) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | res = list->res; |
| 206 | idx = res - &list->dev->resource[0]; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 207 | if (resource_size(res) && pci_assign_resource(list->dev, idx)) { |
Yinghai Lu | 9a92866 | 2010-02-28 15:49:39 -0800 | [diff] [blame] | 208 | if (fail_head && !pci_is_root_bus(list->dev->bus)) { |
| 209 | /* |
| 210 | * if the failed res is for ROM BAR, and it will |
| 211 | * be enabled later, don't add it to the list |
| 212 | */ |
| 213 | if (!((idx == PCI_ROM_RESOURCE) && |
| 214 | (!(res->flags & IORESOURCE_ROM_ENABLE)))) |
| 215 | add_to_failed_list(fail_head, list->dev, res); |
| 216 | } |
Ram Pai | fc075e1 | 2011-02-14 17:43:19 -0800 | [diff] [blame] | 217 | reset_resource(res); |
Rajesh Shah | 542df5d | 2005-04-28 00:25:50 -0700 | [diff] [blame] | 218 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | } |
| 220 | } |
| 221 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 222 | static void __assign_resources_sorted(struct resource_list *head, |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 223 | struct resource_list_x *realloc_head, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 224 | struct resource_list_x *fail_head) |
| 225 | { |
| 226 | /* Satisfy the must-have resource requests */ |
| 227 | assign_requested_resources_sorted(head, fail_head); |
| 228 | |
Ram Pai | 0a2daa1 | 2011-07-25 13:08:41 -0700 | [diff] [blame] | 229 | /* Try to satisfy any additional optional resource |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 230 | requests */ |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 231 | if (realloc_head) |
| 232 | reassign_resources_sorted(realloc_head, head); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 233 | free_list(resource_list, head); |
| 234 | } |
| 235 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 236 | static void pdev_assign_resources_sorted(struct pci_dev *dev, |
| 237 | struct resource_list_x *fail_head) |
| 238 | { |
| 239 | struct resource_list head; |
| 240 | |
| 241 | head.next = NULL; |
| 242 | __dev_sort_resources(dev, &head); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 243 | __assign_resources_sorted(&head, NULL, fail_head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 244 | |
| 245 | } |
| 246 | |
| 247 | static void pbus_assign_resources_sorted(const struct pci_bus *bus, |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 248 | struct resource_list_x *realloc_head, |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 249 | struct resource_list_x *fail_head) |
| 250 | { |
| 251 | struct pci_dev *dev; |
| 252 | struct resource_list head; |
| 253 | |
| 254 | head.next = NULL; |
| 255 | list_for_each_entry(dev, &bus->devices, bus_list) |
| 256 | __dev_sort_resources(dev, &head); |
| 257 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 258 | __assign_resources_sorted(&head, realloc_head, fail_head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 259 | } |
| 260 | |
Dominik Brodowski | b3743fa | 2005-09-09 13:03:23 -0700 | [diff] [blame] | 261 | void pci_setup_cardbus(struct pci_bus *bus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 262 | { |
| 263 | struct pci_dev *bridge = bus->self; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 264 | struct resource *res; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | struct pci_bus_region region; |
| 266 | |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 267 | dev_info(&bridge->dev, "CardBus bridge to [bus %02x-%02x]\n", |
| 268 | bus->secondary, bus->subordinate); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 269 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 270 | res = bus->resource[0]; |
| 271 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 272 | if (res->flags & IORESOURCE_IO) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | /* |
| 274 | * The IO resource is allocated a range twice as large as it |
| 275 | * would normally need. This allows us to set both IO regs. |
| 276 | */ |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 277 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | pci_write_config_dword(bridge, PCI_CB_IO_BASE_0, |
| 279 | region.start); |
| 280 | pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0, |
| 281 | region.end); |
| 282 | } |
| 283 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 284 | res = bus->resource[1]; |
| 285 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 286 | if (res->flags & IORESOURCE_IO) { |
| 287 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | pci_write_config_dword(bridge, PCI_CB_IO_BASE_1, |
| 289 | region.start); |
| 290 | pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1, |
| 291 | region.end); |
| 292 | } |
| 293 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 294 | res = bus->resource[2]; |
| 295 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 296 | if (res->flags & IORESOURCE_MEM) { |
| 297 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 298 | pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0, |
| 299 | region.start); |
| 300 | pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0, |
| 301 | region.end); |
| 302 | } |
| 303 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 304 | res = bus->resource[3]; |
| 305 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 306 | if (res->flags & IORESOURCE_MEM) { |
| 307 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 308 | pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1, |
| 309 | region.start); |
| 310 | pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1, |
| 311 | region.end); |
| 312 | } |
| 313 | } |
Dominik Brodowski | b3743fa | 2005-09-09 13:03:23 -0700 | [diff] [blame] | 314 | EXPORT_SYMBOL(pci_setup_cardbus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 315 | |
| 316 | /* Initialize bridges with base/limit values we have collected. |
| 317 | PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998) |
| 318 | requires that if there is no I/O ports or memory behind the |
| 319 | bridge, corresponding range must be turned off by writing base |
| 320 | value greater than limit to the bridge's base/limit registers. |
| 321 | |
| 322 | Note: care must be taken when updating I/O base/limit registers |
| 323 | of bridges which support 32-bit I/O. This update requires two |
| 324 | config space writes, so it's quite possible that an I/O window of |
| 325 | the bridge will have some undesirable address (e.g. 0) after the |
| 326 | first write. Ditto 64-bit prefetchable MMIO. */ |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 327 | static void pci_setup_bridge_io(struct pci_bus *bus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | { |
| 329 | struct pci_dev *bridge = bus->self; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 330 | struct resource *res; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 331 | struct pci_bus_region region; |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 332 | u32 l, io_upper16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | |
| 334 | /* Set up the top and bottom of the PCI I/O segment for this bus. */ |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 335 | res = bus->resource[0]; |
| 336 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 337 | if (res->flags & IORESOURCE_IO) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | pci_read_config_dword(bridge, PCI_IO_BASE, &l); |
| 339 | l &= 0xffff0000; |
| 340 | l |= (region.start >> 8) & 0x00f0; |
| 341 | l |= region.end & 0xf000; |
| 342 | /* Set up upper 16 bits of I/O base/limit. */ |
| 343 | io_upper16 = (region.end & 0xffff0000) | (region.start >> 16); |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 344 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 345 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 346 | /* Clear upper 16 bits of I/O base/limit. */ |
| 347 | io_upper16 = 0; |
| 348 | l = 0x00f0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | } |
| 350 | /* Temporarily disable the I/O range before updating PCI_IO_BASE. */ |
| 351 | pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff); |
| 352 | /* Update lower 16 bits of I/O base/limit. */ |
| 353 | pci_write_config_dword(bridge, PCI_IO_BASE, l); |
| 354 | /* Update upper 16 bits of I/O base/limit. */ |
| 355 | pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 356 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 358 | static void pci_setup_bridge_mmio(struct pci_bus *bus) |
| 359 | { |
| 360 | struct pci_dev *bridge = bus->self; |
| 361 | struct resource *res; |
| 362 | struct pci_bus_region region; |
| 363 | u32 l; |
| 364 | |
| 365 | /* Set up the top and bottom of the PCI Memory segment for this bus. */ |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 366 | res = bus->resource[1]; |
| 367 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 368 | if (res->flags & IORESOURCE_MEM) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 369 | l = (region.start >> 16) & 0xfff0; |
| 370 | l |= region.end & 0xfff00000; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 371 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 372 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 373 | l = 0x0000fff0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 374 | } |
| 375 | pci_write_config_dword(bridge, PCI_MEMORY_BASE, l); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 376 | } |
| 377 | |
| 378 | static void pci_setup_bridge_mmio_pref(struct pci_bus *bus) |
| 379 | { |
| 380 | struct pci_dev *bridge = bus->self; |
| 381 | struct resource *res; |
| 382 | struct pci_bus_region region; |
| 383 | u32 l, bu, lu; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | |
| 385 | /* Clear out the upper 32 bits of PREF limit. |
| 386 | If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily |
| 387 | disables PREF range, which is ok. */ |
| 388 | pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0); |
| 389 | |
| 390 | /* Set up PREF base/limit. */ |
Benjamin Herrenschmidt | c40a22e | 2007-12-10 17:32:15 +1100 | [diff] [blame] | 391 | bu = lu = 0; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 392 | res = bus->resource[2]; |
| 393 | pcibios_resource_to_bus(bridge, ®ion, res); |
| 394 | if (res->flags & IORESOURCE_PREFETCH) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 395 | l = (region.start >> 16) & 0xfff0; |
| 396 | l |= region.end & 0xfff00000; |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 397 | if (res->flags & IORESOURCE_MEM_64) { |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 398 | bu = upper_32_bits(region.start); |
| 399 | lu = upper_32_bits(region.end); |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 400 | } |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 401 | dev_info(&bridge->dev, " bridge window %pR\n", res); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 402 | } else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | l = 0x0000fff0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | } |
| 405 | pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l); |
| 406 | |
Alex Williamson | 59353ea | 2009-11-30 14:51:44 -0700 | [diff] [blame] | 407 | /* Set the upper 32 bits of PREF base & limit. */ |
| 408 | pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu); |
| 409 | pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu); |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 410 | } |
| 411 | |
| 412 | static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type) |
| 413 | { |
| 414 | struct pci_dev *bridge = bus->self; |
| 415 | |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 416 | dev_info(&bridge->dev, "PCI bridge to [bus %02x-%02x]\n", |
| 417 | bus->secondary, bus->subordinate); |
| 418 | |
| 419 | if (type & IORESOURCE_IO) |
| 420 | pci_setup_bridge_io(bus); |
| 421 | |
| 422 | if (type & IORESOURCE_MEM) |
| 423 | pci_setup_bridge_mmio(bus); |
| 424 | |
| 425 | if (type & IORESOURCE_PREFETCH) |
| 426 | pci_setup_bridge_mmio_pref(bus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 427 | |
| 428 | pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl); |
| 429 | } |
| 430 | |
Benjamin Herrenschmidt | e244427 | 2011-09-11 14:08:38 -0300 | [diff] [blame] | 431 | void pci_setup_bridge(struct pci_bus *bus) |
Yinghai Lu | 7cc5997 | 2009-12-22 15:02:21 -0800 | [diff] [blame] | 432 | { |
| 433 | unsigned long type = IORESOURCE_IO | IORESOURCE_MEM | |
| 434 | IORESOURCE_PREFETCH; |
| 435 | |
| 436 | __pci_setup_bridge(bus, type); |
| 437 | } |
| 438 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | /* Check whether the bridge supports optional I/O and |
| 440 | prefetchable memory ranges. If not, the respective |
| 441 | base/limit registers must be read-only and read as 0. */ |
Sam Ravnborg | 96bde06 | 2007-03-26 21:53:30 -0800 | [diff] [blame] | 442 | static void pci_bridge_check_ranges(struct pci_bus *bus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | { |
| 444 | u16 io; |
| 445 | u32 pmem; |
| 446 | struct pci_dev *bridge = bus->self; |
| 447 | struct resource *b_res; |
| 448 | |
| 449 | b_res = &bridge->resource[PCI_BRIDGE_RESOURCES]; |
| 450 | b_res[1].flags |= IORESOURCE_MEM; |
| 451 | |
| 452 | pci_read_config_word(bridge, PCI_IO_BASE, &io); |
| 453 | if (!io) { |
| 454 | pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0); |
| 455 | pci_read_config_word(bridge, PCI_IO_BASE, &io); |
| 456 | pci_write_config_word(bridge, PCI_IO_BASE, 0x0); |
| 457 | } |
| 458 | if (io) |
| 459 | b_res[0].flags |= IORESOURCE_IO; |
| 460 | /* DECchip 21050 pass 2 errata: the bridge may miss an address |
| 461 | disconnect boundary by one PCI data phase. |
| 462 | Workaround: do not use prefetching on this device. */ |
| 463 | if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001) |
| 464 | return; |
| 465 | pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem); |
| 466 | if (!pmem) { |
| 467 | pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, |
| 468 | 0xfff0fff0); |
| 469 | pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem); |
| 470 | pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0); |
| 471 | } |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 472 | if (pmem) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; |
Yinghai Lu | 9958610 | 2010-01-22 01:02:28 -0800 | [diff] [blame] | 474 | if ((pmem & PCI_PREF_RANGE_TYPE_MASK) == |
| 475 | PCI_PREF_RANGE_TYPE_64) { |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 476 | b_res[2].flags |= IORESOURCE_MEM_64; |
Yinghai Lu | 9958610 | 2010-01-22 01:02:28 -0800 | [diff] [blame] | 477 | b_res[2].flags |= PCI_PREF_RANGE_TYPE_64; |
| 478 | } |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 479 | } |
| 480 | |
| 481 | /* double check if bridge does support 64 bit pref */ |
| 482 | if (b_res[2].flags & IORESOURCE_MEM_64) { |
| 483 | u32 mem_base_hi, tmp; |
| 484 | pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, |
| 485 | &mem_base_hi); |
| 486 | pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, |
| 487 | 0xffffffff); |
| 488 | pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp); |
| 489 | if (!tmp) |
| 490 | b_res[2].flags &= ~IORESOURCE_MEM_64; |
| 491 | pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, |
| 492 | mem_base_hi); |
| 493 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 494 | } |
| 495 | |
| 496 | /* Helper function for sizing routines: find first available |
| 497 | bus resource of a given type. Note: we intentionally skip |
| 498 | the bus resources which have already been assigned (that is, |
| 499 | have non-NULL parent resource). */ |
Sam Ravnborg | 96bde06 | 2007-03-26 21:53:30 -0800 | [diff] [blame] | 500 | static struct resource *find_free_bus_resource(struct pci_bus *bus, unsigned long type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | { |
| 502 | int i; |
| 503 | struct resource *r; |
| 504 | unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | |
| 505 | IORESOURCE_PREFETCH; |
| 506 | |
Bjorn Helgaas | 89a74ec | 2010-02-23 10:24:31 -0700 | [diff] [blame] | 507 | pci_bus_for_each_resource(bus, r, i) { |
Ivan Kokshaysky | 299de03 | 2005-06-15 18:59:27 +0400 | [diff] [blame] | 508 | if (r == &ioport_resource || r == &iomem_resource) |
| 509 | continue; |
Jesse Barnes | 55a1098 | 2009-10-27 09:39:18 -0700 | [diff] [blame] | 510 | if (r && (r->flags & type_mask) == type && !r->parent) |
| 511 | return r; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | } |
| 513 | return NULL; |
| 514 | } |
| 515 | |
Ram Pai | 13583b1 | 2011-02-14 17:43:17 -0800 | [diff] [blame] | 516 | static resource_size_t calculate_iosize(resource_size_t size, |
| 517 | resource_size_t min_size, |
| 518 | resource_size_t size1, |
| 519 | resource_size_t old_size, |
| 520 | resource_size_t align) |
| 521 | { |
| 522 | if (size < min_size) |
| 523 | size = min_size; |
| 524 | if (old_size == 1 ) |
| 525 | old_size = 0; |
| 526 | /* To be fixed in 2.5: we should have sort of HAVE_ISA |
| 527 | flag in the struct pci_bus. */ |
| 528 | #if defined(CONFIG_ISA) || defined(CONFIG_EISA) |
| 529 | size = (size & 0xff) + ((size & ~0xffUL) << 2); |
| 530 | #endif |
| 531 | size = ALIGN(size + size1, align); |
| 532 | if (size < old_size) |
| 533 | size = old_size; |
| 534 | return size; |
| 535 | } |
| 536 | |
| 537 | static resource_size_t calculate_memsize(resource_size_t size, |
| 538 | resource_size_t min_size, |
| 539 | resource_size_t size1, |
| 540 | resource_size_t old_size, |
| 541 | resource_size_t align) |
| 542 | { |
| 543 | if (size < min_size) |
| 544 | size = min_size; |
| 545 | if (old_size == 1 ) |
| 546 | old_size = 0; |
| 547 | if (size < old_size) |
| 548 | size = old_size; |
| 549 | size = ALIGN(size + size1, align); |
| 550 | return size; |
| 551 | } |
| 552 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 553 | static resource_size_t get_res_add_size(struct resource_list_x *realloc_head, |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 554 | struct resource *res) |
| 555 | { |
| 556 | struct resource_list_x *list; |
| 557 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 558 | /* check if it is in realloc_head list */ |
| 559 | for (list = realloc_head->next; list && list->res != res; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 560 | list = list->next); |
| 561 | if (list) |
| 562 | return list->add_size; |
| 563 | |
| 564 | return 0; |
| 565 | } |
| 566 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 567 | /** |
| 568 | * pbus_size_io() - size the io window of a given bus |
| 569 | * |
| 570 | * @bus : the bus |
| 571 | * @min_size : the minimum io window that must to be allocated |
| 572 | * @add_size : additional optional io window |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 573 | * @realloc_head : track the additional io window on this list |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 574 | * |
| 575 | * Sizing the IO windows of the PCI-PCI bridge is trivial, |
| 576 | * since these windows have 4K granularity and the IO ranges |
| 577 | * of non-bridge PCI devices are limited to 256 bytes. |
| 578 | * We must be careful with the ISA aliasing though. |
| 579 | */ |
| 580 | static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size, |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 581 | resource_size_t add_size, struct resource_list_x *realloc_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | { |
| 583 | struct pci_dev *dev; |
| 584 | struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 585 | unsigned long size = 0, size0 = 0, size1 = 0; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 586 | resource_size_t children_add_size = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | |
| 588 | if (!b_res) |
| 589 | return; |
| 590 | |
| 591 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 592 | int i; |
| 593 | |
| 594 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 595 | struct resource *r = &dev->resource[i]; |
| 596 | unsigned long r_size; |
| 597 | |
| 598 | if (r->parent || !(r->flags & IORESOURCE_IO)) |
| 599 | continue; |
Zhao, Yu | 022edd8 | 2008-10-13 19:24:28 +0800 | [diff] [blame] | 600 | r_size = resource_size(r); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | |
| 602 | if (r_size < 0x400) |
| 603 | /* Might be re-aligned for ISA */ |
| 604 | size += r_size; |
| 605 | else |
| 606 | size1 += r_size; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 607 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 608 | if (realloc_head) |
| 609 | children_add_size += get_res_add_size(realloc_head, r); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 610 | } |
| 611 | } |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 612 | size0 = calculate_iosize(size, min_size, size1, |
Ram Pai | 13583b1 | 2011-02-14 17:43:17 -0800 | [diff] [blame] | 613 | resource_size(b_res), 4096); |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 614 | if (children_add_size > add_size) |
| 615 | add_size = children_add_size; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 616 | size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 : |
Yinghai Lu | a4ac9fe | 2012-01-21 02:08:17 -0800 | [diff] [blame] | 617 | calculate_iosize(size, min_size, add_size + size1, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 618 | resource_size(b_res), 4096); |
| 619 | if (!size0 && !size1) { |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 620 | if (b_res->start || b_res->end) |
| 621 | dev_info(&bus->self->dev, "disabling bridge window " |
| 622 | "%pR to [bus %02x-%02x] (unused)\n", b_res, |
| 623 | bus->secondary, bus->subordinate); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 624 | b_res->flags = 0; |
| 625 | return; |
| 626 | } |
| 627 | /* Alignment of the IO window is always 4K */ |
| 628 | b_res->start = 4096; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 629 | b_res->end = b_res->start + size0 - 1; |
Ivan Kokshaysky | 8845256 | 2008-03-30 19:50:14 +0400 | [diff] [blame] | 630 | b_res->flags |= IORESOURCE_STARTALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 631 | if (size1 > size0 && realloc_head) |
| 632 | add_to_list(realloc_head, bus->self, b_res, size1-size0, 4096); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 633 | } |
| 634 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 635 | /** |
| 636 | * pbus_size_mem() - size the memory window of a given bus |
| 637 | * |
| 638 | * @bus : the bus |
| 639 | * @min_size : the minimum memory window that must to be allocated |
| 640 | * @add_size : additional optional memory window |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 641 | * @realloc_head : track the additional memory window on this list |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 642 | * |
| 643 | * Calculate the size of the bus and minimal alignment which |
| 644 | * guarantees that all child resources fit in this size. |
| 645 | */ |
Eric W. Biederman | 2876048 | 2009-09-09 14:09:24 -0700 | [diff] [blame] | 646 | static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 647 | unsigned long type, resource_size_t min_size, |
| 648 | resource_size_t add_size, |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 649 | struct resource_list_x *realloc_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | { |
| 651 | struct pci_dev *dev; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 652 | resource_size_t min_align, align, size, size0, size1; |
Benjamin Herrenschmidt | c40a22e | 2007-12-10 17:32:15 +1100 | [diff] [blame] | 653 | resource_size_t aligns[12]; /* Alignments from 1Mb to 2Gb */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | int order, max_order; |
| 655 | struct resource *b_res = find_free_bus_resource(bus, type); |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 656 | unsigned int mem64_mask = 0; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 657 | resource_size_t children_add_size = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | |
| 659 | if (!b_res) |
| 660 | return 0; |
| 661 | |
| 662 | memset(aligns, 0, sizeof(aligns)); |
| 663 | max_order = 0; |
| 664 | size = 0; |
| 665 | |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 666 | mem64_mask = b_res->flags & IORESOURCE_MEM_64; |
| 667 | b_res->flags &= ~IORESOURCE_MEM_64; |
| 668 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 669 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 670 | int i; |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 671 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { |
| 673 | struct resource *r = &dev->resource[i]; |
Benjamin Herrenschmidt | c40a22e | 2007-12-10 17:32:15 +1100 | [diff] [blame] | 674 | resource_size_t r_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 675 | |
| 676 | if (r->parent || (r->flags & mask) != type) |
| 677 | continue; |
Zhao, Yu | 022edd8 | 2008-10-13 19:24:28 +0800 | [diff] [blame] | 678 | r_size = resource_size(r); |
Yinghai Lu | 2aceefc | 2011-07-25 13:08:40 -0700 | [diff] [blame] | 679 | #ifdef CONFIG_PCI_IOV |
| 680 | /* put SRIOV requested res to the optional list */ |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 681 | if (realloc_head && i >= PCI_IOV_RESOURCES && |
Yinghai Lu | 2aceefc | 2011-07-25 13:08:40 -0700 | [diff] [blame] | 682 | i <= PCI_IOV_RESOURCE_END) { |
| 683 | r->end = r->start - 1; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 684 | add_to_list(realloc_head, dev, r, r_size, 0/* dont' care */); |
Yinghai Lu | 2aceefc | 2011-07-25 13:08:40 -0700 | [diff] [blame] | 685 | children_add_size += r_size; |
| 686 | continue; |
| 687 | } |
| 688 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | /* For bridges size != alignment */ |
Chris Wright | 6faf17f | 2009-08-28 13:00:06 -0700 | [diff] [blame] | 690 | align = pci_resource_alignment(dev, r); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | order = __ffs(align) - 20; |
| 692 | if (order > 11) { |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 693 | dev_warn(&dev->dev, "disabling BAR %d: %pR " |
| 694 | "(bad alignment %#llx)\n", i, r, |
| 695 | (unsigned long long) align); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | r->flags = 0; |
| 697 | continue; |
| 698 | } |
| 699 | size += r_size; |
| 700 | if (order < 0) |
| 701 | order = 0; |
| 702 | /* Exclude ranges with size > align from |
| 703 | calculation of the alignment. */ |
| 704 | if (r_size == align) |
| 705 | aligns[order] += align; |
| 706 | if (order > max_order) |
| 707 | max_order = order; |
Yinghai Lu | 1f82de1 | 2009-04-23 20:48:32 -0700 | [diff] [blame] | 708 | mem64_mask &= r->flags & IORESOURCE_MEM_64; |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 709 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 710 | if (realloc_head) |
| 711 | children_add_size += get_res_add_size(realloc_head, r); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 712 | } |
| 713 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | align = 0; |
| 715 | min_align = 0; |
| 716 | for (order = 0; order <= max_order; order++) { |
Jeremy Fitzhardinge | 8308c54 | 2008-09-11 01:31:50 -0700 | [diff] [blame] | 717 | resource_size_t align1 = 1; |
| 718 | |
| 719 | align1 <<= (order + 20); |
| 720 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | if (!align) |
| 722 | min_align = align1; |
Milind Arun Choudhary | 6f6f8c2 | 2007-07-09 11:55:51 -0700 | [diff] [blame] | 723 | else if (ALIGN(align + min_align, min_align) < align1) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 724 | min_align = align1 >> 1; |
| 725 | align += aligns[order]; |
| 726 | } |
Linus Torvalds | b42282e | 2011-04-11 10:53:11 -0700 | [diff] [blame] | 727 | size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align); |
Yinghai Lu | be76891 | 2011-07-25 13:08:38 -0700 | [diff] [blame] | 728 | if (children_add_size > add_size) |
| 729 | add_size = children_add_size; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 730 | size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 : |
Yinghai Lu | a4ac9fe | 2012-01-21 02:08:17 -0800 | [diff] [blame] | 731 | calculate_memsize(size, min_size, add_size, |
Linus Torvalds | b42282e | 2011-04-11 10:53:11 -0700 | [diff] [blame] | 732 | resource_size(b_res), min_align); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 733 | if (!size0 && !size1) { |
Bjorn Helgaas | 865df57 | 2009-11-04 10:32:57 -0700 | [diff] [blame] | 734 | if (b_res->start || b_res->end) |
| 735 | dev_info(&bus->self->dev, "disabling bridge window " |
| 736 | "%pR to [bus %02x-%02x] (unused)\n", b_res, |
| 737 | bus->secondary, bus->subordinate); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 738 | b_res->flags = 0; |
| 739 | return 1; |
| 740 | } |
| 741 | b_res->start = min_align; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 742 | b_res->end = size0 + min_align - 1; |
| 743 | b_res->flags |= IORESOURCE_STARTALIGN | mem64_mask; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 744 | if (size1 > size0 && realloc_head) |
| 745 | add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 746 | return 1; |
| 747 | } |
| 748 | |
Ram Pai | 0a2daa1 | 2011-07-25 13:08:41 -0700 | [diff] [blame] | 749 | unsigned long pci_cardbus_resource_alignment(struct resource *res) |
| 750 | { |
| 751 | if (res->flags & IORESOURCE_IO) |
| 752 | return pci_cardbus_io_size; |
| 753 | if (res->flags & IORESOURCE_MEM) |
| 754 | return pci_cardbus_mem_size; |
| 755 | return 0; |
| 756 | } |
| 757 | |
| 758 | static void pci_bus_size_cardbus(struct pci_bus *bus, |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 759 | struct resource_list_x *realloc_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | { |
| 761 | struct pci_dev *bridge = bus->self; |
| 762 | struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES]; |
| 763 | u16 ctrl; |
| 764 | |
| 765 | /* |
| 766 | * Reserve some resources for CardBus. We reserve |
| 767 | * a fixed amount of bus space for CardBus bridges. |
| 768 | */ |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 769 | b_res[0].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 770 | b_res[0].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 771 | if (realloc_head) |
| 772 | add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 774 | b_res[1].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 775 | b_res[1].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 776 | if (realloc_head) |
| 777 | add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 778 | |
| 779 | /* |
| 780 | * Check whether prefetchable memory is supported |
| 781 | * by this bridge. |
| 782 | */ |
| 783 | pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); |
| 784 | if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) { |
| 785 | ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; |
| 786 | pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl); |
| 787 | pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); |
| 788 | } |
| 789 | |
| 790 | /* |
| 791 | * If we have prefetchable memory support, allocate |
| 792 | * two regions. Otherwise, allocate one region of |
| 793 | * twice the size. |
| 794 | */ |
| 795 | if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) { |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 796 | b_res[2].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 797 | b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 798 | if (realloc_head) |
| 799 | add_to_list(realloc_head, bridge, b_res+2, pci_cardbus_mem_size, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 800 | |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 801 | b_res[3].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 802 | b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 803 | if (realloc_head) |
| 804 | add_to_list(realloc_head, bridge, b_res+3, pci_cardbus_mem_size, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | } else { |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 806 | b_res[3].start = 0; |
Linus Torvalds | 934b702 | 2008-04-22 18:16:30 -0700 | [diff] [blame] | 807 | b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 808 | if (realloc_head) |
| 809 | add_to_list(realloc_head, bridge, b_res+3, pci_cardbus_mem_size * 2, 0 /* dont care */); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 810 | } |
Ram Pai | 0a2daa1 | 2011-07-25 13:08:41 -0700 | [diff] [blame] | 811 | |
| 812 | /* set the size of the resource to zero, so that the resource does not |
| 813 | * get assigned during required-resource allocation cycle but gets assigned |
| 814 | * during the optional-resource allocation cycle. |
| 815 | */ |
| 816 | b_res[0].start = b_res[1].start = b_res[2].start = b_res[3].start = 1; |
| 817 | b_res[0].end = b_res[1].end = b_res[2].end = b_res[3].end = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 818 | } |
| 819 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 820 | void __ref __pci_bus_size_bridges(struct pci_bus *bus, |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 821 | struct resource_list_x *realloc_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | { |
| 823 | struct pci_dev *dev; |
| 824 | unsigned long mask, prefmask; |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 825 | resource_size_t additional_mem_size = 0, additional_io_size = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 826 | |
| 827 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 828 | struct pci_bus *b = dev->subordinate; |
| 829 | if (!b) |
| 830 | continue; |
| 831 | |
| 832 | switch (dev->class >> 8) { |
| 833 | case PCI_CLASS_BRIDGE_CARDBUS: |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 834 | pci_bus_size_cardbus(b, realloc_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | break; |
| 836 | |
| 837 | case PCI_CLASS_BRIDGE_PCI: |
| 838 | default: |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 839 | __pci_bus_size_bridges(b, realloc_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | break; |
| 841 | } |
| 842 | } |
| 843 | |
| 844 | /* The root bus? */ |
| 845 | if (!bus->self) |
| 846 | return; |
| 847 | |
| 848 | switch (bus->self->class >> 8) { |
| 849 | case PCI_CLASS_BRIDGE_CARDBUS: |
| 850 | /* don't size cardbuses yet. */ |
| 851 | break; |
| 852 | |
| 853 | case PCI_CLASS_BRIDGE_PCI: |
| 854 | pci_bridge_check_ranges(bus); |
Eric W. Biederman | 2876048 | 2009-09-09 14:09:24 -0700 | [diff] [blame] | 855 | if (bus->self->is_hotplug_bridge) { |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 856 | additional_io_size = pci_hotplug_io_size; |
| 857 | additional_mem_size = pci_hotplug_mem_size; |
Eric W. Biederman | 2876048 | 2009-09-09 14:09:24 -0700 | [diff] [blame] | 858 | } |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 859 | /* |
| 860 | * Follow thru |
| 861 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 862 | default: |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 863 | pbus_size_io(bus, 0, additional_io_size, realloc_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 864 | /* If the bridge supports prefetchable range, size it |
| 865 | separately. If it doesn't, or its prefetchable window |
| 866 | has already been allocated by arch code, try |
| 867 | non-prefetchable range for both types of PCI memory |
| 868 | resources. */ |
| 869 | mask = IORESOURCE_MEM; |
| 870 | prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 871 | if (pbus_size_mem(bus, prefmask, prefmask, 0, additional_mem_size, realloc_head)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 872 | mask = prefmask; /* Success, size non-prefetch only. */ |
Eric W. Biederman | 2876048 | 2009-09-09 14:09:24 -0700 | [diff] [blame] | 873 | else |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 874 | additional_mem_size += additional_mem_size; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 875 | pbus_size_mem(bus, mask, IORESOURCE_MEM, 0, additional_mem_size, realloc_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 876 | break; |
| 877 | } |
| 878 | } |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 879 | |
| 880 | void __ref pci_bus_size_bridges(struct pci_bus *bus) |
| 881 | { |
| 882 | __pci_bus_size_bridges(bus, NULL); |
| 883 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 884 | EXPORT_SYMBOL(pci_bus_size_bridges); |
| 885 | |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 886 | static void __ref __pci_bus_assign_resources(const struct pci_bus *bus, |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 887 | struct resource_list_x *realloc_head, |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 888 | struct resource_list_x *fail_head) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | { |
| 890 | struct pci_bus *b; |
| 891 | struct pci_dev *dev; |
| 892 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 893 | pbus_assign_resources_sorted(bus, realloc_head, fail_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 894 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 896 | b = dev->subordinate; |
| 897 | if (!b) |
| 898 | continue; |
| 899 | |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 900 | __pci_bus_assign_resources(b, realloc_head, fail_head); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 901 | |
| 902 | switch (dev->class >> 8) { |
| 903 | case PCI_CLASS_BRIDGE_PCI: |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 904 | if (!pci_is_enabled(dev)) |
| 905 | pci_setup_bridge(b); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 906 | break; |
| 907 | |
| 908 | case PCI_CLASS_BRIDGE_CARDBUS: |
| 909 | pci_setup_cardbus(b); |
| 910 | break; |
| 911 | |
| 912 | default: |
Bjorn Helgaas | 80ccba1 | 2008-06-13 10:52:11 -0600 | [diff] [blame] | 913 | dev_info(&dev->dev, "not setting up bridge for bus " |
| 914 | "%04x:%02x\n", pci_domain_nr(b), b->number); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 915 | break; |
| 916 | } |
| 917 | } |
| 918 | } |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 919 | |
| 920 | void __ref pci_bus_assign_resources(const struct pci_bus *bus) |
| 921 | { |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 922 | __pci_bus_assign_resources(bus, NULL, NULL); |
Yinghai Lu | 568ddef | 2010-01-22 01:02:21 -0800 | [diff] [blame] | 923 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 924 | EXPORT_SYMBOL(pci_bus_assign_resources); |
| 925 | |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 926 | static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge, |
| 927 | struct resource_list_x *fail_head) |
| 928 | { |
| 929 | struct pci_bus *b; |
| 930 | |
| 931 | pdev_assign_resources_sorted((struct pci_dev *)bridge, fail_head); |
| 932 | |
| 933 | b = bridge->subordinate; |
| 934 | if (!b) |
| 935 | return; |
| 936 | |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 937 | __pci_bus_assign_resources(b, NULL, fail_head); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 938 | |
| 939 | switch (bridge->class >> 8) { |
| 940 | case PCI_CLASS_BRIDGE_PCI: |
| 941 | pci_setup_bridge(b); |
| 942 | break; |
| 943 | |
| 944 | case PCI_CLASS_BRIDGE_CARDBUS: |
| 945 | pci_setup_cardbus(b); |
| 946 | break; |
| 947 | |
| 948 | default: |
| 949 | dev_info(&bridge->dev, "not setting up bridge for bus " |
| 950 | "%04x:%02x\n", pci_domain_nr(b), b->number); |
| 951 | break; |
| 952 | } |
| 953 | } |
Yinghai Lu | 5009b46 | 2010-01-22 01:02:20 -0800 | [diff] [blame] | 954 | static void pci_bridge_release_resources(struct pci_bus *bus, |
| 955 | unsigned long type) |
| 956 | { |
| 957 | int idx; |
| 958 | bool changed = false; |
| 959 | struct pci_dev *dev; |
| 960 | struct resource *r; |
| 961 | unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | |
| 962 | IORESOURCE_PREFETCH; |
| 963 | |
| 964 | dev = bus->self; |
| 965 | for (idx = PCI_BRIDGE_RESOURCES; idx <= PCI_BRIDGE_RESOURCE_END; |
| 966 | idx++) { |
| 967 | r = &dev->resource[idx]; |
| 968 | if ((r->flags & type_mask) != type) |
| 969 | continue; |
| 970 | if (!r->parent) |
| 971 | continue; |
| 972 | /* |
| 973 | * if there are children under that, we should release them |
| 974 | * all |
| 975 | */ |
| 976 | release_child_resources(r); |
| 977 | if (!release_resource(r)) { |
| 978 | dev_printk(KERN_DEBUG, &dev->dev, |
| 979 | "resource %d %pR released\n", idx, r); |
| 980 | /* keep the old size */ |
| 981 | r->end = resource_size(r) - 1; |
| 982 | r->start = 0; |
| 983 | r->flags = 0; |
| 984 | changed = true; |
| 985 | } |
| 986 | } |
| 987 | |
| 988 | if (changed) { |
| 989 | /* avoiding touch the one without PREF */ |
| 990 | if (type & IORESOURCE_PREFETCH) |
| 991 | type = IORESOURCE_PREFETCH; |
| 992 | __pci_setup_bridge(bus, type); |
| 993 | } |
| 994 | } |
| 995 | |
| 996 | enum release_type { |
| 997 | leaf_only, |
| 998 | whole_subtree, |
| 999 | }; |
| 1000 | /* |
| 1001 | * try to release pci bridge resources that is from leaf bridge, |
| 1002 | * so we can allocate big new one later |
| 1003 | */ |
| 1004 | static void __ref pci_bus_release_bridge_resources(struct pci_bus *bus, |
| 1005 | unsigned long type, |
| 1006 | enum release_type rel_type) |
| 1007 | { |
| 1008 | struct pci_dev *dev; |
| 1009 | bool is_leaf_bridge = true; |
| 1010 | |
| 1011 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1012 | struct pci_bus *b = dev->subordinate; |
| 1013 | if (!b) |
| 1014 | continue; |
| 1015 | |
| 1016 | is_leaf_bridge = false; |
| 1017 | |
| 1018 | if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 1019 | continue; |
| 1020 | |
| 1021 | if (rel_type == whole_subtree) |
| 1022 | pci_bus_release_bridge_resources(b, type, |
| 1023 | whole_subtree); |
| 1024 | } |
| 1025 | |
| 1026 | if (pci_is_root_bus(bus)) |
| 1027 | return; |
| 1028 | |
| 1029 | if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI) |
| 1030 | return; |
| 1031 | |
| 1032 | if ((rel_type == whole_subtree) || is_leaf_bridge) |
| 1033 | pci_bridge_release_resources(bus, type); |
| 1034 | } |
| 1035 | |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1036 | static void pci_bus_dump_res(struct pci_bus *bus) |
| 1037 | { |
Bjorn Helgaas | 89a74ec | 2010-02-23 10:24:31 -0700 | [diff] [blame] | 1038 | struct resource *res; |
| 1039 | int i; |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1040 | |
Bjorn Helgaas | 89a74ec | 2010-02-23 10:24:31 -0700 | [diff] [blame] | 1041 | pci_bus_for_each_resource(bus, res, i) { |
Yinghai Lu | 7c9342b | 2009-12-22 15:02:24 -0800 | [diff] [blame] | 1042 | if (!res || !res->end || !res->flags) |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1043 | continue; |
| 1044 | |
Bjorn Helgaas | c7dabef | 2009-10-27 13:26:47 -0600 | [diff] [blame] | 1045 | dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res); |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1046 | } |
| 1047 | } |
| 1048 | |
| 1049 | static void pci_bus_dump_resources(struct pci_bus *bus) |
| 1050 | { |
| 1051 | struct pci_bus *b; |
| 1052 | struct pci_dev *dev; |
| 1053 | |
| 1054 | |
| 1055 | pci_bus_dump_res(bus); |
| 1056 | |
| 1057 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1058 | b = dev->subordinate; |
| 1059 | if (!b) |
| 1060 | continue; |
| 1061 | |
| 1062 | pci_bus_dump_resources(b); |
| 1063 | } |
| 1064 | } |
| 1065 | |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1066 | static int __init pci_bus_get_depth(struct pci_bus *bus) |
| 1067 | { |
| 1068 | int depth = 0; |
| 1069 | struct pci_dev *dev; |
| 1070 | |
| 1071 | list_for_each_entry(dev, &bus->devices, bus_list) { |
| 1072 | int ret; |
| 1073 | struct pci_bus *b = dev->subordinate; |
| 1074 | if (!b) |
| 1075 | continue; |
| 1076 | |
| 1077 | ret = pci_bus_get_depth(b); |
| 1078 | if (ret + 1 > depth) |
| 1079 | depth = ret + 1; |
| 1080 | } |
| 1081 | |
| 1082 | return depth; |
| 1083 | } |
| 1084 | static int __init pci_get_max_depth(void) |
| 1085 | { |
| 1086 | int depth = 0; |
| 1087 | struct pci_bus *bus; |
| 1088 | |
| 1089 | list_for_each_entry(bus, &pci_root_buses, node) { |
| 1090 | int ret; |
| 1091 | |
| 1092 | ret = pci_bus_get_depth(bus); |
| 1093 | if (ret > depth) |
| 1094 | depth = ret; |
| 1095 | } |
| 1096 | |
| 1097 | return depth; |
| 1098 | } |
| 1099 | |
Ram Pai | f483d39 | 2011-07-07 11:19:10 -0700 | [diff] [blame] | 1100 | |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1101 | /* |
| 1102 | * first try will not touch pci bridge res |
| 1103 | * second and later try will clear small leaf bridge res |
| 1104 | * will stop till to the max deepth if can not find good one |
| 1105 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1106 | void __init |
| 1107 | pci_assign_unassigned_resources(void) |
| 1108 | { |
| 1109 | struct pci_bus *bus; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 1110 | struct resource_list_x realloc_list; /* list of resources that |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 1111 | want additional resources */ |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1112 | int tried_times = 0; |
| 1113 | enum release_type rel_type = leaf_only; |
| 1114 | struct resource_list_x head, *list; |
| 1115 | unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | |
| 1116 | IORESOURCE_PREFETCH; |
| 1117 | unsigned long failed_type; |
| 1118 | int max_depth = pci_get_max_depth(); |
| 1119 | int pci_try_num; |
| 1120 | |
| 1121 | |
| 1122 | head.next = NULL; |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 1123 | realloc_list.next = NULL; |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1124 | |
| 1125 | pci_try_num = max_depth + 1; |
| 1126 | printk(KERN_DEBUG "PCI: max bus depth: %d pci_try_num: %d\n", |
| 1127 | max_depth, pci_try_num); |
| 1128 | |
| 1129 | again: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1130 | /* Depth first, calculate sizes and alignments of all |
| 1131 | subordinate buses. */ |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1132 | list_for_each_entry(bus, &pci_root_buses, node) |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 1133 | __pci_bus_size_bridges(bus, &realloc_list); |
Ram Pai | c8adf9a | 2011-02-14 17:43:20 -0800 | [diff] [blame] | 1134 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1135 | /* Depth last, allocate resources and update the hardware. */ |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1136 | list_for_each_entry(bus, &pci_root_buses, node) |
Ram Pai | 9e8bf93 | 2011-07-25 13:08:42 -0700 | [diff] [blame] | 1137 | __pci_bus_assign_resources(bus, &realloc_list, &head); |
| 1138 | BUG_ON(realloc_list.next); |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1139 | tried_times++; |
| 1140 | |
| 1141 | /* any device complain? */ |
| 1142 | if (!head.next) |
| 1143 | goto enable_and_dump; |
Ram Pai | f483d39 | 2011-07-07 11:19:10 -0700 | [diff] [blame] | 1144 | |
| 1145 | /* don't realloc if asked to do so */ |
| 1146 | if (!pci_realloc_enabled()) { |
| 1147 | free_list(resource_list_x, &head); |
| 1148 | goto enable_and_dump; |
| 1149 | } |
| 1150 | |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1151 | failed_type = 0; |
| 1152 | for (list = head.next; list;) { |
| 1153 | failed_type |= list->flags; |
| 1154 | list = list->next; |
| 1155 | } |
| 1156 | /* |
| 1157 | * io port are tight, don't try extra |
| 1158 | * or if reach the limit, don't want to try more |
| 1159 | */ |
| 1160 | failed_type &= type_mask; |
| 1161 | if ((failed_type == IORESOURCE_IO) || (tried_times >= pci_try_num)) { |
| 1162 | free_list(resource_list_x, &head); |
| 1163 | goto enable_and_dump; |
| 1164 | } |
| 1165 | |
| 1166 | printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n", |
| 1167 | tried_times + 1); |
| 1168 | |
| 1169 | /* third times and later will not check if it is leaf */ |
| 1170 | if ((tried_times + 1) > 2) |
| 1171 | rel_type = whole_subtree; |
| 1172 | |
| 1173 | /* |
| 1174 | * Try to release leaf bridge's resources that doesn't fit resource of |
| 1175 | * child device under that bridge |
| 1176 | */ |
| 1177 | for (list = head.next; list;) { |
| 1178 | bus = list->dev->bus; |
| 1179 | pci_bus_release_bridge_resources(bus, list->flags & type_mask, |
| 1180 | rel_type); |
| 1181 | list = list->next; |
| 1182 | } |
| 1183 | /* restore size and flags */ |
| 1184 | for (list = head.next; list;) { |
| 1185 | struct resource *res = list->res; |
| 1186 | |
| 1187 | res->start = list->start; |
| 1188 | res->end = list->end; |
| 1189 | res->flags = list->flags; |
| 1190 | if (list->dev->subordinate) |
| 1191 | res->flags = 0; |
| 1192 | |
| 1193 | list = list->next; |
| 1194 | } |
| 1195 | free_list(resource_list_x, &head); |
| 1196 | |
| 1197 | goto again; |
| 1198 | |
| 1199 | enable_and_dump: |
| 1200 | /* Depth last, update the hardware. */ |
| 1201 | list_for_each_entry(bus, &pci_root_buses, node) |
| 1202 | pci_enable_bridges(bus); |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1203 | |
| 1204 | /* dump the resource on buses */ |
Yinghai Lu | da7822e | 2011-05-12 17:11:37 -0700 | [diff] [blame] | 1205 | list_for_each_entry(bus, &pci_root_buses, node) |
Yinghai Lu | 76fbc26 | 2008-06-23 20:33:06 +0200 | [diff] [blame] | 1206 | pci_bus_dump_resources(bus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | } |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1208 | |
| 1209 | void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge) |
| 1210 | { |
| 1211 | struct pci_bus *parent = bridge->subordinate; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1212 | int tried_times = 0; |
| 1213 | struct resource_list_x head, *list; |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1214 | int retval; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1215 | unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM | |
| 1216 | IORESOURCE_PREFETCH; |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1217 | |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1218 | head.next = NULL; |
| 1219 | |
| 1220 | again: |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1221 | pci_bus_size_bridges(parent); |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1222 | __pci_bridge_assign_resources(bridge, &head); |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1223 | |
| 1224 | tried_times++; |
| 1225 | |
| 1226 | if (!head.next) |
Yinghai Lu | 3f579c3 | 2010-05-21 14:35:06 -0700 | [diff] [blame] | 1227 | goto enable_all; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1228 | |
| 1229 | if (tried_times >= 2) { |
| 1230 | /* still fail, don't need to try more */ |
Ram Pai | 094732a | 2011-02-14 17:43:18 -0800 | [diff] [blame] | 1231 | free_list(resource_list_x, &head); |
Yinghai Lu | 3f579c3 | 2010-05-21 14:35:06 -0700 | [diff] [blame] | 1232 | goto enable_all; |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1233 | } |
| 1234 | |
| 1235 | printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n", |
| 1236 | tried_times + 1); |
| 1237 | |
| 1238 | /* |
| 1239 | * Try to release leaf bridge's resources that doesn't fit resource of |
| 1240 | * child device under that bridge |
| 1241 | */ |
| 1242 | for (list = head.next; list;) { |
| 1243 | struct pci_bus *bus = list->dev->bus; |
| 1244 | unsigned long flags = list->flags; |
| 1245 | |
| 1246 | pci_bus_release_bridge_resources(bus, flags & type_mask, |
| 1247 | whole_subtree); |
| 1248 | list = list->next; |
| 1249 | } |
| 1250 | /* restore size and flags */ |
| 1251 | for (list = head.next; list;) { |
| 1252 | struct resource *res = list->res; |
| 1253 | |
| 1254 | res->start = list->start; |
| 1255 | res->end = list->end; |
| 1256 | res->flags = list->flags; |
| 1257 | if (list->dev->subordinate) |
| 1258 | res->flags = 0; |
| 1259 | |
| 1260 | list = list->next; |
| 1261 | } |
Ram Pai | 094732a | 2011-02-14 17:43:18 -0800 | [diff] [blame] | 1262 | free_list(resource_list_x, &head); |
Yinghai Lu | 32180e4 | 2010-01-22 01:02:27 -0800 | [diff] [blame] | 1263 | |
| 1264 | goto again; |
Yinghai Lu | 3f579c3 | 2010-05-21 14:35:06 -0700 | [diff] [blame] | 1265 | |
| 1266 | enable_all: |
| 1267 | retval = pci_reenable_device(bridge); |
| 1268 | pci_set_master(bridge); |
| 1269 | pci_enable_bridges(parent); |
Yinghai Lu | 6841ec6 | 2010-01-22 01:02:25 -0800 | [diff] [blame] | 1270 | } |
| 1271 | EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources); |