blob: 74801f7df9c901ad21017ce2a831e0cd61c8af1c [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
Eric W. Biederman1ce03372006-10-04 02:16:41 -07009#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/mm.h>
11#include <linux/irq.h>
12#include <linux/interrupt.h>
13#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/pci.h>
16#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070017#include <linux/msi.h>
Dan Williams4fdadeb2007-04-26 18:21:38 -070018#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
20#include <asm/errno.h>
21#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23#include "pci.h"
24#include "msi.h"
25
Linus Torvalds1da177e2005-04-16 15:20:36 -070026static int pci_msi_enable = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Adrian Bunk6a9e7f22007-12-11 23:19:41 +010028/* Arch hooks */
29
30int __attribute__ ((weak))
31arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
32{
33 return 0;
34}
35
36int __attribute__ ((weak))
37arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *entry)
38{
39 return 0;
40}
41
42int __attribute__ ((weak))
43arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
44{
45 struct msi_desc *entry;
46 int ret;
47
48 list_for_each_entry(entry, &dev->msi_list, list) {
49 ret = arch_setup_msi_irq(dev, entry);
50 if (ret)
51 return ret;
52 }
53
54 return 0;
55}
56
57void __attribute__ ((weak)) arch_teardown_msi_irq(unsigned int irq)
58{
59 return;
60}
61
62void __attribute__ ((weak))
63arch_teardown_msi_irqs(struct pci_dev *dev)
64{
65 struct msi_desc *entry;
66
67 list_for_each_entry(entry, &dev->msi_list, list) {
68 if (entry->irq != 0)
69 arch_teardown_msi_irq(entry->irq);
70 }
71}
72
Hidetoshi Seto5ca5c022008-05-19 13:48:17 +090073static void __msi_set_enable(struct pci_dev *dev, int pos, int enable)
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -080074{
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -080075 u16 control;
76
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -080077 if (pos) {
78 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
79 control &= ~PCI_MSI_FLAGS_ENABLE;
80 if (enable)
81 control |= PCI_MSI_FLAGS_ENABLE;
82 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
83 }
84}
85
Hidetoshi Seto5ca5c022008-05-19 13:48:17 +090086static void msi_set_enable(struct pci_dev *dev, int enable)
87{
88 __msi_set_enable(dev, pci_find_capability(dev, PCI_CAP_ID_MSI), enable);
89}
90
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -080091static void msix_set_enable(struct pci_dev *dev, int enable)
92{
93 int pos;
94 u16 control;
95
96 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
97 if (pos) {
98 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
99 control &= ~PCI_MSIX_FLAGS_ENABLE;
100 if (enable)
101 control |= PCI_MSIX_FLAGS_ENABLE;
102 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
103 }
104}
105
Mitch Williams988cbb12007-03-30 11:54:08 -0700106static void msix_flush_writes(unsigned int irq)
107{
108 struct msi_desc *entry;
109
110 entry = get_irq_msi(irq);
111 BUG_ON(!entry || !entry->dev);
112 switch (entry->msi_attrib.type) {
113 case PCI_CAP_ID_MSI:
114 /* nothing to do */
115 break;
116 case PCI_CAP_ID_MSIX:
117 {
118 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
119 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
120 readl(entry->mask_base + offset);
121 break;
122 }
123 default:
124 BUG();
125 break;
126 }
127}
128
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600129/*
130 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
131 * mask all MSI interrupts by clearing the MSI enable bit does not work
132 * reliably as devices without an INTx disable bit will then generate a
133 * level IRQ which will never be cleared.
134 *
135 * Returns 1 if it succeeded in masking the interrupt and 0 if the device
136 * doesn't support MSI masking.
137 */
138static int msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139{
140 struct msi_desc *entry;
141
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700142 entry = get_irq_msi(irq);
Eric W. Biederman277bc332006-10-04 02:16:57 -0700143 BUG_ON(!entry || !entry->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144 switch (entry->msi_attrib.type) {
145 case PCI_CAP_ID_MSI:
Eric W. Biederman277bc332006-10-04 02:16:57 -0700146 if (entry->msi_attrib.maskbit) {
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900147 int pos;
148 u32 mask_bits;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149
Eric W. Biederman277bc332006-10-04 02:16:57 -0700150 pos = (long)entry->mask_base;
151 pci_read_config_dword(entry->dev, pos, &mask_bits);
Yinghai Lu8e149e02008-04-23 14:56:30 -0700152 mask_bits &= ~(mask);
153 mask_bits |= flag & mask;
Eric W. Biederman277bc332006-10-04 02:16:57 -0700154 pci_write_config_dword(entry->dev, pos, mask_bits);
Eric W. Biederman58e05432007-03-05 00:30:11 -0800155 } else {
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600156 return 0;
Eric W. Biederman277bc332006-10-04 02:16:57 -0700157 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 case PCI_CAP_ID_MSIX:
160 {
161 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
162 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
163 writel(flag, entry->mask_base + offset);
Eric W. Biederman348e3fd2007-04-03 01:41:49 -0600164 readl(entry->mask_base + offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 break;
166 }
167 default:
Eric W. Biederman277bc332006-10-04 02:16:57 -0700168 BUG();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 break;
170 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700171 entry->msi_attrib.masked = !!flag;
Matthew Wilcoxce6fce42008-07-25 15:42:58 -0600172 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173}
174
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700175void read_msi_msg(unsigned int irq, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700176{
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700177 struct msi_desc *entry = get_irq_msi(irq);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700178 switch(entry->msi_attrib.type) {
179 case PCI_CAP_ID_MSI:
180 {
181 struct pci_dev *dev = entry->dev;
182 int pos = entry->msi_attrib.pos;
183 u16 data;
184
185 pci_read_config_dword(dev, msi_lower_address_reg(pos),
186 &msg->address_lo);
187 if (entry->msi_attrib.is_64) {
188 pci_read_config_dword(dev, msi_upper_address_reg(pos),
189 &msg->address_hi);
190 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
191 } else {
192 msg->address_hi = 0;
Roland Dreiercbf5d9e2007-10-03 11:15:11 -0700193 pci_read_config_word(dev, msi_data_reg(pos, 0), &data);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700194 }
195 msg->data = data;
196 break;
197 }
198 case PCI_CAP_ID_MSIX:
199 {
200 void __iomem *base;
201 base = entry->mask_base +
202 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
203
204 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
205 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
206 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
207 break;
208 }
209 default:
210 BUG();
211 }
212}
213
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700214void write_msi_msg(unsigned int irq, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700215{
Eric W. Biederman5b912c12007-01-28 12:52:03 -0700216 struct msi_desc *entry = get_irq_msi(irq);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700217 switch (entry->msi_attrib.type) {
218 case PCI_CAP_ID_MSI:
219 {
220 struct pci_dev *dev = entry->dev;
221 int pos = entry->msi_attrib.pos;
222
223 pci_write_config_dword(dev, msi_lower_address_reg(pos),
224 msg->address_lo);
225 if (entry->msi_attrib.is_64) {
226 pci_write_config_dword(dev, msi_upper_address_reg(pos),
227 msg->address_hi);
228 pci_write_config_word(dev, msi_data_reg(pos, 1),
229 msg->data);
230 } else {
231 pci_write_config_word(dev, msi_data_reg(pos, 0),
232 msg->data);
233 }
234 break;
235 }
236 case PCI_CAP_ID_MSIX:
237 {
238 void __iomem *base;
239 base = entry->mask_base +
240 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
241
242 writel(msg->address_lo,
243 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
244 writel(msg->address_hi,
245 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
246 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
247 break;
248 }
249 default:
250 BUG();
251 }
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700252 entry->msg = *msg;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700253}
254
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700255void mask_msi_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256{
Yinghai Lu8e149e02008-04-23 14:56:30 -0700257 msi_set_mask_bits(irq, 1, 1);
Mitch Williams988cbb12007-03-30 11:54:08 -0700258 msix_flush_writes(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700259}
260
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700261void unmask_msi_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262{
Yinghai Lu8e149e02008-04-23 14:56:30 -0700263 msi_set_mask_bits(irq, 1, 0);
Mitch Williams988cbb12007-03-30 11:54:08 -0700264 msix_flush_writes(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265}
266
Michael Ellerman032de8e2007-04-18 19:39:22 +1000267static int msi_free_irqs(struct pci_dev* dev);
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900268
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270static struct msi_desc* alloc_msi_entry(void)
271{
272 struct msi_desc *entry;
273
Michael Ellerman3e916c02007-03-22 21:51:36 +1100274 entry = kzalloc(sizeof(struct msi_desc), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275 if (!entry)
276 return NULL;
277
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000278 INIT_LIST_HEAD(&entry->list);
279 entry->irq = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280 entry->dev = NULL;
281
282 return entry;
283}
284
David Millerba698ad2007-10-25 01:16:30 -0700285static void pci_intx_for_msi(struct pci_dev *dev, int enable)
286{
287 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
288 pci_intx(dev, enable);
289}
290
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100291static void __pci_restore_msi_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800292{
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700293 int pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800294 u16 control;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700295 struct msi_desc *entry;
Shaohua Li41017f02006-02-08 17:11:38 +0800296
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800297 if (!dev->msi_enabled)
298 return;
299
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700300 entry = get_irq_msi(dev->irq);
301 pos = entry->msi_attrib.pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800302
David Millerba698ad2007-10-25 01:16:30 -0700303 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800304 msi_set_enable(dev, 0);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700305 write_msi_msg(dev->irq, &entry->msg);
306 if (entry->msi_attrib.maskbit)
Yinghai Lu8e149e02008-04-23 14:56:30 -0700307 msi_set_mask_bits(dev->irq, entry->msi_attrib.maskbits_mask,
308 entry->msi_attrib.masked);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700309
310 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
Jesse Barnesabad2ec2008-08-07 08:52:37 -0700311 control &= ~PCI_MSI_FLAGS_QSIZE;
312 control |= PCI_MSI_FLAGS_ENABLE;
Shaohua Li41017f02006-02-08 17:11:38 +0800313 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100314}
315
316static void __pci_restore_msix_state(struct pci_dev *dev)
Shaohua Li41017f02006-02-08 17:11:38 +0800317{
Shaohua Li41017f02006-02-08 17:11:38 +0800318 int pos;
Shaohua Li41017f02006-02-08 17:11:38 +0800319 struct msi_desc *entry;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700320 u16 control;
Shaohua Li41017f02006-02-08 17:11:38 +0800321
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700322 if (!dev->msix_enabled)
323 return;
324
Shaohua Li41017f02006-02-08 17:11:38 +0800325 /* route the table */
David Millerba698ad2007-10-25 01:16:30 -0700326 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800327 msix_set_enable(dev, 0);
Shaohua Li41017f02006-02-08 17:11:38 +0800328
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000329 list_for_each_entry(entry, &dev->msi_list, list) {
330 write_msi_msg(entry->irq, &entry->msg);
Yinghai Lu8e149e02008-04-23 14:56:30 -0700331 msi_set_mask_bits(entry->irq, 1, entry->msi_attrib.masked);
Shaohua Li41017f02006-02-08 17:11:38 +0800332 }
Shaohua Li41017f02006-02-08 17:11:38 +0800333
Michael Ellerman314e77b2007-04-05 17:19:12 +1000334 BUG_ON(list_empty(&dev->msi_list));
335 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000336 pos = entry->msi_attrib.pos;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700337 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
338 control &= ~PCI_MSIX_FLAGS_MASKALL;
339 control |= PCI_MSIX_FLAGS_ENABLE;
340 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
Shaohua Li41017f02006-02-08 17:11:38 +0800341}
Michael Ellerman8fed4b62007-01-25 19:34:08 +1100342
343void pci_restore_msi_state(struct pci_dev *dev)
344{
345 __pci_restore_msi_state(dev);
346 __pci_restore_msix_state(dev);
347}
Linas Vepstas94688cf2007-11-07 15:43:59 -0600348EXPORT_SYMBOL_GPL(pci_restore_msi_state);
Shaohua Li41017f02006-02-08 17:11:38 +0800349
Linus Torvalds1da177e2005-04-16 15:20:36 -0700350/**
351 * msi_capability_init - configure device's MSI capability structure
352 * @dev: pointer to the pci_dev data structure of MSI device function
353 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600354 * Setup the MSI capability structure of device function with a single
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700355 * MSI irq, regardless of device function is capable of handling
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356 * multiple messages. A return of zero indicates the successful setup
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700357 * of an entry zero with the new MSI irq or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 **/
359static int msi_capability_init(struct pci_dev *dev)
360{
361 struct msi_desc *entry;
Michael Ellerman7fe37302007-04-18 19:39:21 +1000362 int pos, ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363 u16 control;
364
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800365 msi_set_enable(dev, 0); /* Ensure msi is disabled as I set it up */
366
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
368 pci_read_config_word(dev, msi_control_reg(pos), &control);
369 /* MSI Entry Initialization */
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700370 entry = alloc_msi_entry();
371 if (!entry)
372 return -ENOMEM;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700373
Linus Torvalds1da177e2005-04-16 15:20:36 -0700374 entry->msi_attrib.type = PCI_CAP_ID_MSI;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700375 entry->msi_attrib.is_64 = is_64bit_address(control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376 entry->msi_attrib.entry_nr = 0;
377 entry->msi_attrib.maskbit = is_mask_bit_support(control);
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700378 entry->msi_attrib.masked = 1;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700379 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700380 entry->msi_attrib.pos = pos;
Jike Song59937602008-09-09 23:42:03 +0800381 if (entry->msi_attrib.maskbit) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
Jike Song59937602008-09-09 23:42:03 +0800383 entry->msi_attrib.is_64);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384 }
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700385 entry->dev = dev;
386 if (entry->msi_attrib.maskbit) {
387 unsigned int maskbits, temp;
388 /* All MSIs are unmasked by default, Mask them all */
389 pci_read_config_dword(dev,
Jike Song59937602008-09-09 23:42:03 +0800390 msi_mask_bits_reg(pos, entry->msi_attrib.is_64),
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700391 &maskbits);
392 temp = (1 << multi_msi_capable(control));
393 temp = ((temp - 1) & ~temp);
394 maskbits |= temp;
Jike Song59937602008-09-09 23:42:03 +0800395 pci_write_config_dword(dev, entry->msi_attrib.is_64, maskbits);
Yinghai Lu8e149e02008-04-23 14:56:30 -0700396 entry->msi_attrib.maskbits_mask = temp;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700397 }
Eric W. Biederman0dd11f92007-06-01 00:46:32 -0700398 list_add_tail(&entry->list, &dev->msi_list);
Michael Ellerman9c831332007-04-18 19:39:21 +1000399
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 /* Configure MSI capability structure */
Michael Ellerman9c831332007-04-18 19:39:21 +1000401 ret = arch_setup_msi_irqs(dev, 1, PCI_CAP_ID_MSI);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000402 if (ret) {
Michael Ellerman032de8e2007-04-18 19:39:22 +1000403 msi_free_irqs(dev);
Michael Ellerman7fe37302007-04-18 19:39:21 +1000404 return ret;
Mark Maulefd58e552006-04-10 21:17:48 -0500405 }
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700406
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407 /* Set MSI enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700408 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800409 msi_set_enable(dev, 1);
410 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
Michael Ellerman7fe37302007-04-18 19:39:21 +1000412 dev->irq = entry->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413 return 0;
414}
415
416/**
417 * msix_capability_init - configure device's MSI-X capability
418 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700419 * @entries: pointer to an array of struct msix_entry entries
420 * @nvec: number of @entries
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600422 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700423 * single MSI-X irq. A return of zero indicates the successful setup of
424 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 **/
426static int msix_capability_init(struct pci_dev *dev,
427 struct msix_entry *entries, int nvec)
428{
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000429 struct msi_desc *entry;
Michael Ellerman9c831332007-04-18 19:39:21 +1000430 int pos, i, j, nr_entries, ret;
Grant Grundlera0454b42006-02-16 23:58:29 -0800431 unsigned long phys_addr;
432 u32 table_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433 u16 control;
434 u8 bir;
435 void __iomem *base;
436
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800437 msix_set_enable(dev, 0);/* Ensure msix is disabled as I set it up */
438
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
440 /* Request & Map MSI-X table region */
441 pci_read_config_word(dev, msi_control_reg(pos), &control);
442 nr_entries = multi_msix_capable(control);
Grant Grundlera0454b42006-02-16 23:58:29 -0800443
444 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
Grant Grundlera0454b42006-02-16 23:58:29 -0800446 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
447 phys_addr = pci_resource_start (dev, bir) + table_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
449 if (base == NULL)
450 return -ENOMEM;
451
452 /* MSI-X Table Initialization */
453 for (i = 0; i < nvec; i++) {
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700454 entry = alloc_msi_entry();
455 if (!entry)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457
458 j = entries[i].entry;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700460 entry->msi_attrib.is_64 = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461 entry->msi_attrib.entry_nr = j;
462 entry->msi_attrib.maskbit = 1;
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700463 entry->msi_attrib.masked = 1;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700464 entry->msi_attrib.default_irq = dev->irq;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700465 entry->msi_attrib.pos = pos;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466 entry->dev = dev;
467 entry->mask_base = base;
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700468
Eric W. Biederman0dd11f92007-06-01 00:46:32 -0700469 list_add_tail(&entry->list, &dev->msi_list);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470 }
Michael Ellerman9c831332007-04-18 19:39:21 +1000471
472 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
473 if (ret) {
474 int avail = 0;
475 list_for_each_entry(entry, &dev->msi_list, list) {
476 if (entry->irq != 0) {
477 avail++;
Michael Ellerman9c831332007-04-18 19:39:21 +1000478 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 }
Michael Ellerman9c831332007-04-18 19:39:21 +1000480
Michael Ellerman032de8e2007-04-18 19:39:22 +1000481 msi_free_irqs(dev);
482
Eric W. Biederman92db6d12006-10-04 02:16:35 -0700483 /* If we had some success report the number of irqs
484 * we succeeded in setting up.
485 */
Michael Ellerman9c831332007-04-18 19:39:21 +1000486 if (avail == 0)
487 avail = ret;
Eric W. Biederman92db6d12006-10-04 02:16:35 -0700488 return avail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 }
Michael Ellerman9c831332007-04-18 19:39:21 +1000490
491 i = 0;
492 list_for_each_entry(entry, &dev->msi_list, list) {
493 entries[i].vector = entry->irq;
494 set_irq_msi(entry->irq, entry);
495 i++;
496 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700497 /* Set MSI-X enabled bits */
David Millerba698ad2007-10-25 01:16:30 -0700498 pci_intx_for_msi(dev, 0);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800499 msix_set_enable(dev, 1);
500 dev->msix_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501
502 return 0;
503}
504
505/**
Michael Ellerman17bbc122007-04-05 17:19:07 +1000506 * pci_msi_check_device - check whether MSI may be enabled on a device
Brice Goglin24334a12006-08-31 01:55:07 -0400507 * @dev: pointer to the pci_dev data structure of MSI device function
Michael Ellermanc9953a72007-04-05 17:19:08 +1000508 * @nvec: how many MSIs have been requested ?
Michael Ellermanb1e23032007-03-22 21:51:39 +1100509 * @type: are we checking for MSI or MSI-X ?
Brice Goglin24334a12006-08-31 01:55:07 -0400510 *
Brice Goglin0306ebf2006-10-05 10:24:31 +0200511 * Look at global flags, the device itself, and its parent busses
Michael Ellerman17bbc122007-04-05 17:19:07 +1000512 * to determine if MSI/-X are supported for the device. If MSI/-X is
513 * supported return 0, else return an error code.
Brice Goglin24334a12006-08-31 01:55:07 -0400514 **/
Michael Ellermanc9953a72007-04-05 17:19:08 +1000515static int pci_msi_check_device(struct pci_dev* dev, int nvec, int type)
Brice Goglin24334a12006-08-31 01:55:07 -0400516{
517 struct pci_bus *bus;
Michael Ellermanc9953a72007-04-05 17:19:08 +1000518 int ret;
Brice Goglin24334a12006-08-31 01:55:07 -0400519
Brice Goglin0306ebf2006-10-05 10:24:31 +0200520 /* MSI must be globally enabled and supported by the device */
Brice Goglin24334a12006-08-31 01:55:07 -0400521 if (!pci_msi_enable || !dev || dev->no_msi)
522 return -EINVAL;
523
Michael Ellerman314e77b2007-04-05 17:19:12 +1000524 /*
525 * You can't ask to have 0 or less MSIs configured.
526 * a) it's stupid ..
527 * b) the list manipulation code assumes nvec >= 1.
528 */
529 if (nvec < 1)
530 return -ERANGE;
531
Brice Goglin0306ebf2006-10-05 10:24:31 +0200532 /* Any bridge which does NOT route MSI transactions from it's
533 * secondary bus to it's primary bus must set NO_MSI flag on
534 * the secondary pci_bus.
535 * We expect only arch-specific PCI host bus controller driver
536 * or quirks for specific PCI bridges to be setting NO_MSI.
537 */
Brice Goglin24334a12006-08-31 01:55:07 -0400538 for (bus = dev->bus; bus; bus = bus->parent)
539 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
540 return -EINVAL;
541
Michael Ellermanc9953a72007-04-05 17:19:08 +1000542 ret = arch_msi_check_device(dev, nvec, type);
543 if (ret)
544 return ret;
545
Michael Ellermanb1e23032007-03-22 21:51:39 +1100546 if (!pci_find_capability(dev, type))
547 return -EINVAL;
548
Brice Goglin24334a12006-08-31 01:55:07 -0400549 return 0;
550}
551
552/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553 * pci_enable_msi - configure device's MSI capability structure
554 * @dev: pointer to the pci_dev data structure of MSI device function
555 *
556 * Setup the MSI capability structure of device function with
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700557 * a single MSI irq upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558 * MSI mode enabled on its hardware device function. A return of zero
559 * indicates the successful setup of an entry zero with the new MSI
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700560 * irq or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561 **/
562int pci_enable_msi(struct pci_dev* dev)
563{
Michael Ellermanb1e23032007-03-22 21:51:39 +1100564 int status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565
Michael Ellermanc9953a72007-04-05 17:19:08 +1000566 status = pci_msi_check_device(dev, 1, PCI_CAP_ID_MSI);
567 if (status)
568 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700570 WARN_ON(!!dev->msi_enabled);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700572 /* Check whether driver already requested for MSI-X irqs */
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800573 if (dev->msix_enabled) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600574 dev_info(&dev->dev, "can't enable MSI "
575 "(MSI-X already enabled)\n");
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800576 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577 }
578 status = msi_capability_init(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579 return status;
580}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100581EXPORT_SYMBOL(pci_enable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582
Yinghai Lud52877c2008-04-23 14:58:09 -0700583void pci_msi_shutdown(struct pci_dev* dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584{
585 struct msi_desc *entry;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100587 if (!pci_msi_enable || !dev || !dev->msi_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700588 return;
589
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800590 msi_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700591 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800592 dev->msi_enabled = 0;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700593
Michael Ellerman314e77b2007-04-05 17:19:12 +1000594 BUG_ON(list_empty(&dev->msi_list));
595 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
Yinghai Lu8e149e02008-04-23 14:56:30 -0700596 /* Return the the pci reset with msi irqs unmasked */
597 if (entry->msi_attrib.maskbit) {
598 u32 mask = entry->msi_attrib.maskbits_mask;
599 msi_set_mask_bits(dev->irq, mask, ~mask);
600 }
Yinghai Lud52877c2008-04-23 14:58:09 -0700601 if (!entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 return;
Michael Ellermane387b9e2007-03-22 21:51:27 +1100603
604 /* Restore dev->irq to its default pin-assertion irq */
Yinghai Lud52877c2008-04-23 14:58:09 -0700605 dev->irq = entry->msi_attrib.default_irq;
606}
607void pci_disable_msi(struct pci_dev* dev)
608{
609 struct msi_desc *entry;
610
611 if (!pci_msi_enable || !dev || !dev->msi_enabled)
612 return;
613
614 pci_msi_shutdown(dev);
615
616 entry = list_entry(dev->msi_list.next, struct msi_desc, list);
617 if (!entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI)
618 return;
619
620 msi_free_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100622EXPORT_SYMBOL(pci_disable_msi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623
Michael Ellerman032de8e2007-04-18 19:39:22 +1000624static int msi_free_irqs(struct pci_dev* dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625{
Michael Ellerman032de8e2007-04-18 19:39:22 +1000626 struct msi_desc *entry, *tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627
David Millerb3b7cc72007-05-11 13:26:44 -0700628 list_for_each_entry(entry, &dev->msi_list, list) {
629 if (entry->irq)
630 BUG_ON(irq_has_action(entry->irq));
631 }
Michael Ellerman7ede9c12007-03-22 21:51:34 +1100632
Michael Ellerman032de8e2007-04-18 19:39:22 +1000633 arch_teardown_msi_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700634
Michael Ellerman032de8e2007-04-18 19:39:22 +1000635 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
636 if (entry->msi_attrib.type == PCI_CAP_ID_MSIX) {
Michael Ellerman032de8e2007-04-18 19:39:22 +1000637 writel(1, entry->mask_base + entry->msi_attrib.entry_nr
638 * PCI_MSIX_ENTRY_SIZE
639 + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
Eric W. Biederman78b76112007-06-01 00:46:33 -0700640
641 if (list_is_last(&entry->list, &dev->msi_list))
642 iounmap(entry->mask_base);
Michael Ellerman032de8e2007-04-18 19:39:22 +1000643 }
644 list_del(&entry->list);
645 kfree(entry);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646 }
647
648 return 0;
649}
650
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651/**
652 * pci_enable_msix - configure device's MSI-X capability structure
653 * @dev: pointer to the pci_dev data structure of MSI-X device function
Greg Kroah-Hartman70549ad2005-06-06 23:07:46 -0700654 * @entries: pointer to an array of MSI-X entries
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700655 * @nvec: number of MSI-X irqs requested for allocation by device driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656 *
657 * Setup the MSI-X capability structure of device function with the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700658 * of requested irqs upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659 * MSI-X mode enabled on its hardware device function. A return of zero
660 * indicates the successful configuration of MSI-X capability structure
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700661 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 * Or a return of > 0 indicates that driver request is exceeding the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700663 * of irqs available. Driver should use the returned value to re-send
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 * its request.
665 **/
666int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
667{
Eric W. Biederman92db6d12006-10-04 02:16:35 -0700668 int status, pos, nr_entries;
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700669 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670 u16 control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671
Michael Ellermanc9953a72007-04-05 17:19:08 +1000672 if (!entries)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700673 return -EINVAL;
674
Michael Ellermanc9953a72007-04-05 17:19:08 +1000675 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);
676 if (status)
677 return status;
678
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700679 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700680 pci_read_config_word(dev, msi_control_reg(pos), &control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681 nr_entries = multi_msix_capable(control);
682 if (nvec > nr_entries)
683 return -EINVAL;
684
685 /* Check for any invalid entries */
686 for (i = 0; i < nvec; i++) {
687 if (entries[i].entry >= nr_entries)
688 return -EINVAL; /* invalid entry */
689 for (j = i + 1; j < nvec; j++) {
690 if (entries[i].entry == entries[j].entry)
691 return -EINVAL; /* duplicate entry */
692 }
693 }
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700694 WARN_ON(!!dev->msix_enabled);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700695
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700696 /* Check whether driver already requested for MSI irq */
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800697 if (dev->msi_enabled) {
Bjorn Helgaas80ccba12008-06-13 10:52:11 -0600698 dev_info(&dev->dev, "can't enable MSI-X "
699 "(MSI IRQ already assigned)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 return -EINVAL;
701 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702 status = msix_capability_init(dev, entries, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 return status;
704}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100705EXPORT_SYMBOL(pci_enable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100707static void msix_free_all_irqs(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708{
Michael Ellerman032de8e2007-04-18 19:39:22 +1000709 msi_free_irqs(dev);
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100710}
711
Yinghai Lud52877c2008-04-23 14:58:09 -0700712void pci_msix_shutdown(struct pci_dev* dev)
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100713{
Michael Ellerman128bc5f2007-03-22 21:51:39 +1100714 if (!pci_msi_enable || !dev || !dev->msix_enabled)
Eric W. Biedermanded86d82007-01-28 12:42:52 -0700715 return;
716
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800717 msix_set_enable(dev, 0);
David Millerba698ad2007-10-25 01:16:30 -0700718 pci_intx_for_msi(dev, 1);
Eric W. Biedermanb1cbf4e2007-03-05 00:30:10 -0800719 dev->msix_enabled = 0;
Yinghai Lud52877c2008-04-23 14:58:09 -0700720}
721void pci_disable_msix(struct pci_dev* dev)
722{
723 if (!pci_msi_enable || !dev || !dev->msix_enabled)
724 return;
725
726 pci_msix_shutdown(dev);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700727
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100728 msix_free_all_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700729}
Michael Ellerman4cc086f2007-03-22 21:51:34 +1100730EXPORT_SYMBOL(pci_disable_msix);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731
732/**
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700733 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
Linus Torvalds1da177e2005-04-16 15:20:36 -0700734 * @dev: pointer to the pci_dev data structure of MSI(X) device function
735 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600736 * Being called during hotplug remove, from which the device function
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700737 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
Linus Torvalds1da177e2005-04-16 15:20:36 -0700738 * allocated for this device function, are reclaimed to unused state,
739 * which may be used later on.
740 **/
741void msi_remove_pci_irq_vectors(struct pci_dev* dev)
742{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700743 if (!pci_msi_enable || !dev)
744 return;
745
Michael Ellerman032de8e2007-04-18 19:39:22 +1000746 if (dev->msi_enabled)
747 msi_free_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700748
Michael Ellermanfc4afc72007-03-22 21:51:33 +1100749 if (dev->msix_enabled)
750 msix_free_all_irqs(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751}
752
Matthew Wilcox309e57d2006-03-05 22:33:34 -0700753void pci_no_msi(void)
754{
755 pci_msi_enable = 0;
756}
Michael Ellermanc9953a72007-04-05 17:19:08 +1000757
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000758void pci_msi_init_pci_dev(struct pci_dev *dev)
759{
760 INIT_LIST_HEAD(&dev->msi_list);
761}
Taku Izumid389fec2008-10-17 13:52:51 +0900762
763#ifdef CONFIG_ACPI
764#include <linux/acpi.h>
765#include <linux/pci-acpi.h>
766static void __devinit msi_acpi_init(void)
767{
768 if (acpi_pci_disabled)
769 return;
770 pci_osc_support_set(OSC_MSI_SUPPORT);
771 pcie_osc_support_set(OSC_MSI_SUPPORT);
772}
773#else
774static inline void msi_acpi_init(void) { }
775#endif /* CONFIG_ACPI */
776
777void __devinit msi_init(void)
778{
779 if (!pci_msi_enable)
780 return;
781 msi_acpi_init();
782}