Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1 | /* |
Joerg Roedel | 5d0d715 | 2010-10-13 11:13:21 +0200 | [diff] [blame] | 2 | * Copyright (C) 2007-2010 Advanced Micro Devices, Inc. |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 20 | #include <linux/ratelimit.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 21 | #include <linux/pci.h> |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 22 | #include <linux/pci-ats.h> |
Akinobu Mita | a66022c | 2009-12-15 16:48:28 -0800 | [diff] [blame] | 23 | #include <linux/bitmap.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 24 | #include <linux/slab.h> |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 25 | #include <linux/debugfs.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 26 | #include <linux/scatterlist.h> |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 27 | #include <linux/dma-mapping.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 28 | #include <linux/iommu-helper.h> |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 29 | #include <linux/iommu.h> |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 30 | #include <linux/delay.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 31 | #include <linux/amd-iommu.h> |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 32 | #include <linux/notifier.h> |
| 33 | #include <linux/export.h> |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 34 | #include <asm/msidef.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 35 | #include <asm/proto.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 36 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 37 | #include <asm/gart.h> |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 38 | #include <asm/dma.h> |
Joerg Roedel | 403f81d | 2011-06-14 16:44:25 +0200 | [diff] [blame] | 39 | |
| 40 | #include "amd_iommu_proto.h" |
| 41 | #include "amd_iommu_types.h" |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 42 | |
| 43 | #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) |
| 44 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 45 | #define LOOP_TIMEOUT 100000 |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 46 | |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 47 | /* |
| 48 | * This bitmap is used to advertise the page sizes our hardware support |
| 49 | * to the IOMMU core, which will then use this information to split |
| 50 | * physically contiguous memory regions it is mapping into page sizes |
| 51 | * that we support. |
| 52 | * |
| 53 | * Traditionally the IOMMU core just handed us the mappings directly, |
| 54 | * after making sure the size is an order of a 4KiB page and that the |
| 55 | * mapping has natural alignment. |
| 56 | * |
| 57 | * To retain this behavior, we currently advertise that we support |
| 58 | * all page sizes that are an order of 4KiB. |
| 59 | * |
| 60 | * If at some point we'd like to utilize the IOMMU core's new behavior, |
| 61 | * we could change this to advertise the real page sizes we support. |
| 62 | */ |
| 63 | #define AMD_IOMMU_PGSIZES (~0xFFFUL) |
| 64 | |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 65 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); |
| 66 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 67 | /* A list of preallocated protection domains */ |
| 68 | static LIST_HEAD(iommu_pd_list); |
| 69 | static DEFINE_SPINLOCK(iommu_pd_list_lock); |
| 70 | |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 71 | /* List of all available dev_data structures */ |
| 72 | static LIST_HEAD(dev_data_list); |
| 73 | static DEFINE_SPINLOCK(dev_data_list_lock); |
| 74 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 75 | /* |
| 76 | * Domain for untranslated devices - only allocated |
| 77 | * if iommu=pt passed on kernel cmd line. |
| 78 | */ |
| 79 | static struct protection_domain *pt_domain; |
| 80 | |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 81 | static struct iommu_ops amd_iommu_ops; |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 82 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 83 | static ATOMIC_NOTIFIER_HEAD(ppr_notifier); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 84 | int amd_iommu_max_glx_val = -1; |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 85 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 86 | /* |
| 87 | * general struct to manage commands send to an IOMMU |
| 88 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 89 | struct iommu_cmd { |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 90 | u32 data[4]; |
| 91 | }; |
| 92 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 93 | static void update_domain(struct protection_domain *domain); |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 94 | static int __init alloc_passthrough_domain(void); |
Chris Wright | c1eee67 | 2009-05-21 00:56:58 -0700 | [diff] [blame] | 95 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 96 | /**************************************************************************** |
| 97 | * |
| 98 | * Helper functions |
| 99 | * |
| 100 | ****************************************************************************/ |
| 101 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 102 | static struct iommu_dev_data *alloc_dev_data(u16 devid) |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 103 | { |
| 104 | struct iommu_dev_data *dev_data; |
| 105 | unsigned long flags; |
| 106 | |
| 107 | dev_data = kzalloc(sizeof(*dev_data), GFP_KERNEL); |
| 108 | if (!dev_data) |
| 109 | return NULL; |
| 110 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 111 | dev_data->devid = devid; |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 112 | atomic_set(&dev_data->bind, 0); |
| 113 | |
| 114 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 115 | list_add_tail(&dev_data->dev_data_list, &dev_data_list); |
| 116 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 117 | |
| 118 | return dev_data; |
| 119 | } |
| 120 | |
| 121 | static void free_dev_data(struct iommu_dev_data *dev_data) |
| 122 | { |
| 123 | unsigned long flags; |
| 124 | |
| 125 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 126 | list_del(&dev_data->dev_data_list); |
| 127 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 128 | |
| 129 | kfree(dev_data); |
| 130 | } |
| 131 | |
Joerg Roedel | 3b03bb7 | 2011-06-09 18:53:25 +0200 | [diff] [blame] | 132 | static struct iommu_dev_data *search_dev_data(u16 devid) |
| 133 | { |
| 134 | struct iommu_dev_data *dev_data; |
| 135 | unsigned long flags; |
| 136 | |
| 137 | spin_lock_irqsave(&dev_data_list_lock, flags); |
| 138 | list_for_each_entry(dev_data, &dev_data_list, dev_data_list) { |
| 139 | if (dev_data->devid == devid) |
| 140 | goto out_unlock; |
| 141 | } |
| 142 | |
| 143 | dev_data = NULL; |
| 144 | |
| 145 | out_unlock: |
| 146 | spin_unlock_irqrestore(&dev_data_list_lock, flags); |
| 147 | |
| 148 | return dev_data; |
| 149 | } |
| 150 | |
| 151 | static struct iommu_dev_data *find_dev_data(u16 devid) |
| 152 | { |
| 153 | struct iommu_dev_data *dev_data; |
| 154 | |
| 155 | dev_data = search_dev_data(devid); |
| 156 | |
| 157 | if (dev_data == NULL) |
| 158 | dev_data = alloc_dev_data(devid); |
| 159 | |
| 160 | return dev_data; |
| 161 | } |
| 162 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 163 | static inline u16 get_device_id(struct device *dev) |
| 164 | { |
| 165 | struct pci_dev *pdev = to_pci_dev(dev); |
| 166 | |
| 167 | return calc_devid(pdev->bus->number, pdev->devfn); |
| 168 | } |
| 169 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 170 | static struct iommu_dev_data *get_dev_data(struct device *dev) |
| 171 | { |
| 172 | return dev->archdata.iommu; |
| 173 | } |
| 174 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 175 | static bool pci_iommuv2_capable(struct pci_dev *pdev) |
| 176 | { |
| 177 | static const int caps[] = { |
| 178 | PCI_EXT_CAP_ID_ATS, |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 179 | PCI_EXT_CAP_ID_PRI, |
| 180 | PCI_EXT_CAP_ID_PASID, |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 181 | }; |
| 182 | int i, pos; |
| 183 | |
| 184 | for (i = 0; i < 3; ++i) { |
| 185 | pos = pci_find_ext_capability(pdev, caps[i]); |
| 186 | if (pos == 0) |
| 187 | return false; |
| 188 | } |
| 189 | |
| 190 | return true; |
| 191 | } |
| 192 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 193 | static bool pdev_pri_erratum(struct pci_dev *pdev, u32 erratum) |
| 194 | { |
| 195 | struct iommu_dev_data *dev_data; |
| 196 | |
| 197 | dev_data = get_dev_data(&pdev->dev); |
| 198 | |
| 199 | return dev_data->errata & (1 << erratum) ? true : false; |
| 200 | } |
| 201 | |
Joerg Roedel | 71c7098 | 2009-11-24 16:43:06 +0100 | [diff] [blame] | 202 | /* |
| 203 | * In this function the list of preallocated protection domains is traversed to |
| 204 | * find the domain for a specific device |
| 205 | */ |
| 206 | static struct dma_ops_domain *find_protection_domain(u16 devid) |
| 207 | { |
| 208 | struct dma_ops_domain *entry, *ret = NULL; |
| 209 | unsigned long flags; |
| 210 | u16 alias = amd_iommu_alias_table[devid]; |
| 211 | |
| 212 | if (list_empty(&iommu_pd_list)) |
| 213 | return NULL; |
| 214 | |
| 215 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 216 | |
| 217 | list_for_each_entry(entry, &iommu_pd_list, list) { |
| 218 | if (entry->target_dev == devid || |
| 219 | entry->target_dev == alias) { |
| 220 | ret = entry; |
| 221 | break; |
| 222 | } |
| 223 | } |
| 224 | |
| 225 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 226 | |
| 227 | return ret; |
| 228 | } |
| 229 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 230 | /* |
| 231 | * This function checks if the driver got a valid device from the caller to |
| 232 | * avoid dereferencing invalid pointers. |
| 233 | */ |
| 234 | static bool check_device(struct device *dev) |
| 235 | { |
| 236 | u16 devid; |
| 237 | |
| 238 | if (!dev || !dev->dma_mask) |
| 239 | return false; |
| 240 | |
| 241 | /* No device or no PCI device */ |
Julia Lawall | 339d326 | 2010-02-06 09:42:39 +0100 | [diff] [blame] | 242 | if (dev->bus != &pci_bus_type) |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 243 | return false; |
| 244 | |
| 245 | devid = get_device_id(dev); |
| 246 | |
| 247 | /* Out of our scope? */ |
| 248 | if (devid > amd_iommu_last_bdf) |
| 249 | return false; |
| 250 | |
| 251 | if (amd_iommu_rlookup_table[devid] == NULL) |
| 252 | return false; |
| 253 | |
| 254 | return true; |
| 255 | } |
| 256 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 257 | static int iommu_init_device(struct device *dev) |
| 258 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 259 | struct pci_dev *pdev = to_pci_dev(dev); |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 260 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 261 | u16 alias; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 262 | |
| 263 | if (dev->archdata.iommu) |
| 264 | return 0; |
| 265 | |
Joerg Roedel | 3b03bb7 | 2011-06-09 18:53:25 +0200 | [diff] [blame] | 266 | dev_data = find_dev_data(get_device_id(dev)); |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 267 | if (!dev_data) |
| 268 | return -ENOMEM; |
| 269 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 270 | alias = amd_iommu_alias_table[dev_data->devid]; |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 271 | if (alias != dev_data->devid) { |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 272 | struct iommu_dev_data *alias_data; |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 273 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 274 | alias_data = find_dev_data(alias); |
| 275 | if (alias_data == NULL) { |
| 276 | pr_err("AMD-Vi: Warning: Unhandled device %s\n", |
| 277 | dev_name(dev)); |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 278 | free_dev_data(dev_data); |
| 279 | return -ENOTSUPP; |
| 280 | } |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 281 | dev_data->alias_data = alias_data; |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 282 | } |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 283 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 284 | if (pci_iommuv2_capable(pdev)) { |
| 285 | struct amd_iommu *iommu; |
| 286 | |
| 287 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 288 | dev_data->iommu_v2 = iommu->is_iommu_v2; |
| 289 | } |
| 290 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 291 | dev->archdata.iommu = dev_data; |
| 292 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 293 | return 0; |
| 294 | } |
| 295 | |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 296 | static void iommu_ignore_device(struct device *dev) |
| 297 | { |
| 298 | u16 devid, alias; |
| 299 | |
| 300 | devid = get_device_id(dev); |
| 301 | alias = amd_iommu_alias_table[devid]; |
| 302 | |
| 303 | memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry)); |
| 304 | memset(&amd_iommu_dev_table[alias], 0, sizeof(struct dev_table_entry)); |
| 305 | |
| 306 | amd_iommu_rlookup_table[devid] = NULL; |
| 307 | amd_iommu_rlookup_table[alias] = NULL; |
| 308 | } |
| 309 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 310 | static void iommu_uninit_device(struct device *dev) |
| 311 | { |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 312 | /* |
| 313 | * Nothing to do here - we keep dev_data around for unplugged devices |
| 314 | * and reuse it when the device is re-plugged - not doing so would |
| 315 | * introduce a ton of races. |
| 316 | */ |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 317 | } |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 318 | |
| 319 | void __init amd_iommu_uninit_devices(void) |
| 320 | { |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 321 | struct iommu_dev_data *dev_data, *n; |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 322 | struct pci_dev *pdev = NULL; |
| 323 | |
| 324 | for_each_pci_dev(pdev) { |
| 325 | |
| 326 | if (!check_device(&pdev->dev)) |
| 327 | continue; |
| 328 | |
| 329 | iommu_uninit_device(&pdev->dev); |
| 330 | } |
Joerg Roedel | 8fa5f80 | 2011-06-09 12:24:45 +0200 | [diff] [blame] | 331 | |
| 332 | /* Free all of our dev_data structures */ |
| 333 | list_for_each_entry_safe(dev_data, n, &dev_data_list, dev_data_list) |
| 334 | free_dev_data(dev_data); |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 335 | } |
| 336 | |
| 337 | int __init amd_iommu_init_devices(void) |
| 338 | { |
| 339 | struct pci_dev *pdev = NULL; |
| 340 | int ret = 0; |
| 341 | |
| 342 | for_each_pci_dev(pdev) { |
| 343 | |
| 344 | if (!check_device(&pdev->dev)) |
| 345 | continue; |
| 346 | |
| 347 | ret = iommu_init_device(&pdev->dev); |
Joerg Roedel | 2601887 | 2011-06-06 16:50:14 +0200 | [diff] [blame] | 348 | if (ret == -ENOTSUPP) |
| 349 | iommu_ignore_device(&pdev->dev); |
| 350 | else if (ret) |
Joerg Roedel | b7cc955 | 2009-12-10 11:03:39 +0100 | [diff] [blame] | 351 | goto out_free; |
| 352 | } |
| 353 | |
| 354 | return 0; |
| 355 | |
| 356 | out_free: |
| 357 | |
| 358 | amd_iommu_uninit_devices(); |
| 359 | |
| 360 | return ret; |
| 361 | } |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 362 | #ifdef CONFIG_AMD_IOMMU_STATS |
| 363 | |
| 364 | /* |
| 365 | * Initialization code for statistics collection |
| 366 | */ |
| 367 | |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 368 | DECLARE_STATS_COUNTER(compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 369 | DECLARE_STATS_COUNTER(cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 370 | DECLARE_STATS_COUNTER(cnt_unmap_single); |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 371 | DECLARE_STATS_COUNTER(cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 372 | DECLARE_STATS_COUNTER(cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 373 | DECLARE_STATS_COUNTER(cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 374 | DECLARE_STATS_COUNTER(cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 375 | DECLARE_STATS_COUNTER(cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 376 | DECLARE_STATS_COUNTER(domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame] | 377 | DECLARE_STATS_COUNTER(domain_flush_all); |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 378 | DECLARE_STATS_COUNTER(alloced_io_mem); |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 379 | DECLARE_STATS_COUNTER(total_map_requests); |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 380 | DECLARE_STATS_COUNTER(complete_ppr); |
| 381 | DECLARE_STATS_COUNTER(invalidate_iotlb); |
| 382 | DECLARE_STATS_COUNTER(invalidate_iotlb_all); |
| 383 | DECLARE_STATS_COUNTER(pri_requests); |
| 384 | |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 385 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 386 | static struct dentry *stats_dir; |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 387 | static struct dentry *de_fflush; |
| 388 | |
| 389 | static void amd_iommu_stats_add(struct __iommu_counter *cnt) |
| 390 | { |
| 391 | if (stats_dir == NULL) |
| 392 | return; |
| 393 | |
| 394 | cnt->dent = debugfs_create_u64(cnt->name, 0444, stats_dir, |
| 395 | &cnt->value); |
| 396 | } |
| 397 | |
| 398 | static void amd_iommu_stats_init(void) |
| 399 | { |
| 400 | stats_dir = debugfs_create_dir("amd-iommu", NULL); |
| 401 | if (stats_dir == NULL) |
| 402 | return; |
| 403 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 404 | de_fflush = debugfs_create_bool("fullflush", 0444, stats_dir, |
| 405 | (u32 *)&amd_iommu_unmap_flush); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 406 | |
| 407 | amd_iommu_stats_add(&compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 408 | amd_iommu_stats_add(&cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 409 | amd_iommu_stats_add(&cnt_unmap_single); |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 410 | amd_iommu_stats_add(&cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 411 | amd_iommu_stats_add(&cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 412 | amd_iommu_stats_add(&cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 413 | amd_iommu_stats_add(&cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 414 | amd_iommu_stats_add(&cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 415 | amd_iommu_stats_add(&domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame] | 416 | amd_iommu_stats_add(&domain_flush_all); |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 417 | amd_iommu_stats_add(&alloced_io_mem); |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 418 | amd_iommu_stats_add(&total_map_requests); |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 419 | amd_iommu_stats_add(&complete_ppr); |
| 420 | amd_iommu_stats_add(&invalidate_iotlb); |
| 421 | amd_iommu_stats_add(&invalidate_iotlb_all); |
| 422 | amd_iommu_stats_add(&pri_requests); |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 423 | } |
| 424 | |
| 425 | #endif |
| 426 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 427 | /**************************************************************************** |
| 428 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 429 | * Interrupt handling functions |
| 430 | * |
| 431 | ****************************************************************************/ |
| 432 | |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 433 | static void dump_dte_entry(u16 devid) |
| 434 | { |
| 435 | int i; |
| 436 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 437 | for (i = 0; i < 4; ++i) |
| 438 | pr_err("AMD-Vi: DTE[%d]: %016llx\n", i, |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 439 | amd_iommu_dev_table[devid].data[i]); |
| 440 | } |
| 441 | |
Joerg Roedel | 945b4ac | 2009-09-03 14:25:02 +0200 | [diff] [blame] | 442 | static void dump_command(unsigned long phys_addr) |
| 443 | { |
| 444 | struct iommu_cmd *cmd = phys_to_virt(phys_addr); |
| 445 | int i; |
| 446 | |
| 447 | for (i = 0; i < 4; ++i) |
| 448 | pr_err("AMD-Vi: CMD[%d]: %08x\n", i, cmd->data[i]); |
| 449 | } |
| 450 | |
Joerg Roedel | a345b23 | 2009-09-03 15:01:43 +0200 | [diff] [blame] | 451 | static void iommu_print_event(struct amd_iommu *iommu, void *__evt) |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 452 | { |
| 453 | u32 *event = __evt; |
| 454 | int type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; |
| 455 | int devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; |
| 456 | int domid = (event[1] >> EVENT_DOMID_SHIFT) & EVENT_DOMID_MASK; |
| 457 | int flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; |
| 458 | u64 address = (u64)(((u64)event[3]) << 32) | event[2]; |
| 459 | |
Joerg Roedel | 4c6f40d | 2009-09-01 16:43:58 +0200 | [diff] [blame] | 460 | printk(KERN_ERR "AMD-Vi: Event logged ["); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 461 | |
| 462 | switch (type) { |
| 463 | case EVENT_TYPE_ILL_DEV: |
| 464 | printk("ILLEGAL_DEV_TABLE_ENTRY device=%02x:%02x.%x " |
| 465 | "address=0x%016llx flags=0x%04x]\n", |
| 466 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 467 | address, flags); |
Joerg Roedel | e3e5987 | 2009-09-03 14:02:10 +0200 | [diff] [blame] | 468 | dump_dte_entry(devid); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 469 | break; |
| 470 | case EVENT_TYPE_IO_FAULT: |
| 471 | printk("IO_PAGE_FAULT device=%02x:%02x.%x " |
| 472 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 473 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 474 | domid, address, flags); |
| 475 | break; |
| 476 | case EVENT_TYPE_DEV_TAB_ERR: |
| 477 | printk("DEV_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 478 | "address=0x%016llx flags=0x%04x]\n", |
| 479 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 480 | address, flags); |
| 481 | break; |
| 482 | case EVENT_TYPE_PAGE_TAB_ERR: |
| 483 | printk("PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 484 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 485 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 486 | domid, address, flags); |
| 487 | break; |
| 488 | case EVENT_TYPE_ILL_CMD: |
| 489 | printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address); |
Joerg Roedel | 945b4ac | 2009-09-03 14:25:02 +0200 | [diff] [blame] | 490 | dump_command(address); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 491 | break; |
| 492 | case EVENT_TYPE_CMD_HARD_ERR: |
| 493 | printk("COMMAND_HARDWARE_ERROR address=0x%016llx " |
| 494 | "flags=0x%04x]\n", address, flags); |
| 495 | break; |
| 496 | case EVENT_TYPE_IOTLB_INV_TO: |
| 497 | printk("IOTLB_INV_TIMEOUT device=%02x:%02x.%x " |
| 498 | "address=0x%016llx]\n", |
| 499 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 500 | address); |
| 501 | break; |
| 502 | case EVENT_TYPE_INV_DEV_REQ: |
| 503 | printk("INVALID_DEVICE_REQUEST device=%02x:%02x.%x " |
| 504 | "address=0x%016llx flags=0x%04x]\n", |
| 505 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 506 | address, flags); |
| 507 | break; |
| 508 | default: |
| 509 | printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type); |
| 510 | } |
| 511 | } |
| 512 | |
| 513 | static void iommu_poll_events(struct amd_iommu *iommu) |
| 514 | { |
| 515 | u32 head, tail; |
| 516 | unsigned long flags; |
| 517 | |
| 518 | spin_lock_irqsave(&iommu->lock, flags); |
| 519 | |
| 520 | head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 521 | tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 522 | |
| 523 | while (head != tail) { |
Joerg Roedel | a345b23 | 2009-09-03 15:01:43 +0200 | [diff] [blame] | 524 | iommu_print_event(iommu, iommu->evt_buf + head); |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 525 | head = (head + EVENT_ENTRY_SIZE) % iommu->evt_buf_size; |
| 526 | } |
| 527 | |
| 528 | writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 529 | |
| 530 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 531 | } |
| 532 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 533 | static void iommu_handle_ppr_entry(struct amd_iommu *iommu, u32 head) |
| 534 | { |
| 535 | struct amd_iommu_fault fault; |
| 536 | volatile u64 *raw; |
| 537 | int i; |
| 538 | |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 539 | INC_STATS_COUNTER(pri_requests); |
| 540 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 541 | raw = (u64 *)(iommu->ppr_log + head); |
| 542 | |
| 543 | /* |
| 544 | * Hardware bug: Interrupt may arrive before the entry is written to |
| 545 | * memory. If this happens we need to wait for the entry to arrive. |
| 546 | */ |
| 547 | for (i = 0; i < LOOP_TIMEOUT; ++i) { |
| 548 | if (PPR_REQ_TYPE(raw[0]) != 0) |
| 549 | break; |
| 550 | udelay(1); |
| 551 | } |
| 552 | |
| 553 | if (PPR_REQ_TYPE(raw[0]) != PPR_REQ_FAULT) { |
| 554 | pr_err_ratelimited("AMD-Vi: Unknown PPR request received\n"); |
| 555 | return; |
| 556 | } |
| 557 | |
| 558 | fault.address = raw[1]; |
| 559 | fault.pasid = PPR_PASID(raw[0]); |
| 560 | fault.device_id = PPR_DEVID(raw[0]); |
| 561 | fault.tag = PPR_TAG(raw[0]); |
| 562 | fault.flags = PPR_FLAGS(raw[0]); |
| 563 | |
| 564 | /* |
| 565 | * To detect the hardware bug we need to clear the entry |
| 566 | * to back to zero. |
| 567 | */ |
| 568 | raw[0] = raw[1] = 0; |
| 569 | |
| 570 | atomic_notifier_call_chain(&ppr_notifier, 0, &fault); |
| 571 | } |
| 572 | |
| 573 | static void iommu_poll_ppr_log(struct amd_iommu *iommu) |
| 574 | { |
| 575 | unsigned long flags; |
| 576 | u32 head, tail; |
| 577 | |
| 578 | if (iommu->ppr_log == NULL) |
| 579 | return; |
| 580 | |
| 581 | spin_lock_irqsave(&iommu->lock, flags); |
| 582 | |
| 583 | head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
| 584 | tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 585 | |
| 586 | while (head != tail) { |
| 587 | |
| 588 | /* Handle PPR entry */ |
| 589 | iommu_handle_ppr_entry(iommu, head); |
| 590 | |
| 591 | /* Update and refresh ring-buffer state*/ |
| 592 | head = (head + PPR_ENTRY_SIZE) % PPR_LOG_SIZE; |
| 593 | writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); |
| 594 | tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); |
| 595 | } |
| 596 | |
| 597 | /* enable ppr interrupts again */ |
| 598 | writel(MMIO_STATUS_PPR_INT_MASK, iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 599 | |
| 600 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 601 | } |
| 602 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 603 | irqreturn_t amd_iommu_int_thread(int irq, void *data) |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 604 | { |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 605 | struct amd_iommu *iommu; |
| 606 | |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 607 | for_each_iommu(iommu) { |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 608 | iommu_poll_events(iommu); |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 609 | iommu_poll_ppr_log(iommu); |
| 610 | } |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 611 | |
| 612 | return IRQ_HANDLED; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 613 | } |
| 614 | |
Joerg Roedel | 72fe00f | 2011-05-10 10:50:42 +0200 | [diff] [blame] | 615 | irqreturn_t amd_iommu_int_handler(int irq, void *data) |
| 616 | { |
| 617 | return IRQ_WAKE_THREAD; |
| 618 | } |
| 619 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 620 | /**************************************************************************** |
| 621 | * |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 622 | * IOMMU command queuing functions |
| 623 | * |
| 624 | ****************************************************************************/ |
| 625 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 626 | static int wait_on_sem(volatile u64 *sem) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 627 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 628 | int i = 0; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 629 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 630 | while (*sem == 0 && i < LOOP_TIMEOUT) { |
| 631 | udelay(1); |
| 632 | i += 1; |
| 633 | } |
| 634 | |
| 635 | if (i == LOOP_TIMEOUT) { |
| 636 | pr_alert("AMD-Vi: Completion-Wait loop timed out\n"); |
| 637 | return -EIO; |
| 638 | } |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 639 | |
| 640 | return 0; |
| 641 | } |
| 642 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 643 | static void copy_cmd_to_buffer(struct amd_iommu *iommu, |
| 644 | struct iommu_cmd *cmd, |
| 645 | u32 tail) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 646 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 647 | u8 *target; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 648 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 649 | target = iommu->cmd_buf + tail; |
| 650 | tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 651 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 652 | /* Copy command to buffer */ |
| 653 | memcpy(target, cmd, sizeof(*cmd)); |
| 654 | |
| 655 | /* Tell the IOMMU about it */ |
| 656 | writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 657 | } |
| 658 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 659 | static void build_completion_wait(struct iommu_cmd *cmd, u64 address) |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 660 | { |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 661 | WARN_ON(address & 0x7ULL); |
| 662 | |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 663 | memset(cmd, 0, sizeof(*cmd)); |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 664 | cmd->data[0] = lower_32_bits(__pa(address)) | CMD_COMPL_WAIT_STORE_MASK; |
| 665 | cmd->data[1] = upper_32_bits(__pa(address)); |
| 666 | cmd->data[2] = 1; |
Joerg Roedel | ded4673 | 2011-04-06 10:53:48 +0200 | [diff] [blame] | 667 | CMD_SET_TYPE(cmd, CMD_COMPL_WAIT); |
| 668 | } |
| 669 | |
Joerg Roedel | 94fe79e | 2011-04-06 11:07:21 +0200 | [diff] [blame] | 670 | static void build_inv_dte(struct iommu_cmd *cmd, u16 devid) |
| 671 | { |
| 672 | memset(cmd, 0, sizeof(*cmd)); |
| 673 | cmd->data[0] = devid; |
| 674 | CMD_SET_TYPE(cmd, CMD_INV_DEV_ENTRY); |
| 675 | } |
| 676 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 677 | static void build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address, |
| 678 | size_t size, u16 domid, int pde) |
| 679 | { |
| 680 | u64 pages; |
| 681 | int s; |
| 682 | |
| 683 | pages = iommu_num_pages(address, size, PAGE_SIZE); |
| 684 | s = 0; |
| 685 | |
| 686 | if (pages > 1) { |
| 687 | /* |
| 688 | * If we have to flush more than one page, flush all |
| 689 | * TLB entries for this domain |
| 690 | */ |
| 691 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 692 | s = 1; |
| 693 | } |
| 694 | |
| 695 | address &= PAGE_MASK; |
| 696 | |
| 697 | memset(cmd, 0, sizeof(*cmd)); |
| 698 | cmd->data[1] |= domid; |
| 699 | cmd->data[2] = lower_32_bits(address); |
| 700 | cmd->data[3] = upper_32_bits(address); |
| 701 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 702 | if (s) /* size bit - we flush more than one 4kb page */ |
| 703 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 704 | if (pde) /* PDE bit - we wan't flush everything not only the PTEs */ |
| 705 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 706 | } |
| 707 | |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 708 | static void build_inv_iotlb_pages(struct iommu_cmd *cmd, u16 devid, int qdep, |
| 709 | u64 address, size_t size) |
| 710 | { |
| 711 | u64 pages; |
| 712 | int s; |
| 713 | |
| 714 | pages = iommu_num_pages(address, size, PAGE_SIZE); |
| 715 | s = 0; |
| 716 | |
| 717 | if (pages > 1) { |
| 718 | /* |
| 719 | * If we have to flush more than one page, flush all |
| 720 | * TLB entries for this domain |
| 721 | */ |
| 722 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 723 | s = 1; |
| 724 | } |
| 725 | |
| 726 | address &= PAGE_MASK; |
| 727 | |
| 728 | memset(cmd, 0, sizeof(*cmd)); |
| 729 | cmd->data[0] = devid; |
| 730 | cmd->data[0] |= (qdep & 0xff) << 24; |
| 731 | cmd->data[1] = devid; |
| 732 | cmd->data[2] = lower_32_bits(address); |
| 733 | cmd->data[3] = upper_32_bits(address); |
| 734 | CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES); |
| 735 | if (s) |
| 736 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 737 | } |
| 738 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 739 | static void build_inv_iommu_pasid(struct iommu_cmd *cmd, u16 domid, int pasid, |
| 740 | u64 address, bool size) |
| 741 | { |
| 742 | memset(cmd, 0, sizeof(*cmd)); |
| 743 | |
| 744 | address &= ~(0xfffULL); |
| 745 | |
| 746 | cmd->data[0] = pasid & PASID_MASK; |
| 747 | cmd->data[1] = domid; |
| 748 | cmd->data[2] = lower_32_bits(address); |
| 749 | cmd->data[3] = upper_32_bits(address); |
| 750 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 751 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK; |
| 752 | if (size) |
| 753 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 754 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 755 | } |
| 756 | |
| 757 | static void build_inv_iotlb_pasid(struct iommu_cmd *cmd, u16 devid, int pasid, |
| 758 | int qdep, u64 address, bool size) |
| 759 | { |
| 760 | memset(cmd, 0, sizeof(*cmd)); |
| 761 | |
| 762 | address &= ~(0xfffULL); |
| 763 | |
| 764 | cmd->data[0] = devid; |
| 765 | cmd->data[0] |= (pasid & 0xff) << 16; |
| 766 | cmd->data[0] |= (qdep & 0xff) << 24; |
| 767 | cmd->data[1] = devid; |
| 768 | cmd->data[1] |= ((pasid >> 8) & 0xfff) << 16; |
| 769 | cmd->data[2] = lower_32_bits(address); |
| 770 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_GN_MASK; |
| 771 | cmd->data[3] = upper_32_bits(address); |
| 772 | if (size) |
| 773 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 774 | CMD_SET_TYPE(cmd, CMD_INV_IOTLB_PAGES); |
| 775 | } |
| 776 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 777 | static void build_complete_ppr(struct iommu_cmd *cmd, u16 devid, int pasid, |
| 778 | int status, int tag, bool gn) |
| 779 | { |
| 780 | memset(cmd, 0, sizeof(*cmd)); |
| 781 | |
| 782 | cmd->data[0] = devid; |
| 783 | if (gn) { |
| 784 | cmd->data[1] = pasid & PASID_MASK; |
| 785 | cmd->data[2] = CMD_INV_IOMMU_PAGES_GN_MASK; |
| 786 | } |
| 787 | cmd->data[3] = tag & 0x1ff; |
| 788 | cmd->data[3] |= (status & PPR_STATUS_MASK) << PPR_STATUS_SHIFT; |
| 789 | |
| 790 | CMD_SET_TYPE(cmd, CMD_COMPLETE_PPR); |
| 791 | } |
| 792 | |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 793 | static void build_inv_all(struct iommu_cmd *cmd) |
| 794 | { |
| 795 | memset(cmd, 0, sizeof(*cmd)); |
| 796 | CMD_SET_TYPE(cmd, CMD_INV_ALL); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 797 | } |
| 798 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 799 | /* |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 800 | * Writes the command to the IOMMUs command buffer and informs the |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 801 | * hardware about the new command. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 802 | */ |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 803 | static int iommu_queue_command_sync(struct amd_iommu *iommu, |
| 804 | struct iommu_cmd *cmd, |
| 805 | bool sync) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 806 | { |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 807 | u32 left, tail, head, next_tail; |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 808 | unsigned long flags; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 809 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 810 | WARN_ON(iommu->cmd_buf_size & CMD_BUFFER_UNINITIALIZED); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 811 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 812 | again: |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 813 | spin_lock_irqsave(&iommu->lock, flags); |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 814 | |
| 815 | head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 816 | tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 817 | next_tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
| 818 | left = (head - next_tail) % iommu->cmd_buf_size; |
| 819 | |
| 820 | if (left <= 2) { |
| 821 | struct iommu_cmd sync_cmd; |
| 822 | volatile u64 sem = 0; |
| 823 | int ret; |
| 824 | |
| 825 | build_completion_wait(&sync_cmd, (u64)&sem); |
| 826 | copy_cmd_to_buffer(iommu, &sync_cmd, tail); |
| 827 | |
| 828 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 829 | |
| 830 | if ((ret = wait_on_sem(&sem)) != 0) |
| 831 | return ret; |
| 832 | |
| 833 | goto again; |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 834 | } |
| 835 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 836 | copy_cmd_to_buffer(iommu, cmd, tail); |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 837 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 838 | /* We need to sync now to make sure all commands are processed */ |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 839 | iommu->need_sync = sync; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 840 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 841 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 842 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 843 | return 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 844 | } |
| 845 | |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 846 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
| 847 | { |
| 848 | return iommu_queue_command_sync(iommu, cmd, true); |
| 849 | } |
| 850 | |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 851 | /* |
| 852 | * This function queues a completion wait command into the command |
| 853 | * buffer of an IOMMU |
| 854 | */ |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 855 | static int iommu_completion_wait(struct amd_iommu *iommu) |
| 856 | { |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 857 | struct iommu_cmd cmd; |
| 858 | volatile u64 sem = 0; |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 859 | int ret; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 860 | |
| 861 | if (!iommu->need_sync) |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 862 | return 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 863 | |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 864 | build_completion_wait(&cmd, (u64)&sem); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 865 | |
Joerg Roedel | f1ca151 | 2011-09-02 14:10:32 +0200 | [diff] [blame] | 866 | ret = iommu_queue_command_sync(iommu, &cmd, false); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 867 | if (ret) |
Joerg Roedel | 815b33f | 2011-04-06 17:26:49 +0200 | [diff] [blame] | 868 | return ret; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 869 | |
Joerg Roedel | ac0ea6e | 2011-04-06 18:38:20 +0200 | [diff] [blame] | 870 | return wait_on_sem(&sem); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 871 | } |
| 872 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 873 | static int iommu_flush_dte(struct amd_iommu *iommu, u16 devid) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 874 | { |
| 875 | struct iommu_cmd cmd; |
| 876 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 877 | build_inv_dte(&cmd, devid); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 878 | |
Joerg Roedel | d8c1308 | 2011-04-06 18:51:26 +0200 | [diff] [blame] | 879 | return iommu_queue_command(iommu, &cmd); |
| 880 | } |
| 881 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 882 | static void iommu_flush_dte_all(struct amd_iommu *iommu) |
| 883 | { |
| 884 | u32 devid; |
| 885 | |
| 886 | for (devid = 0; devid <= 0xffff; ++devid) |
| 887 | iommu_flush_dte(iommu, devid); |
| 888 | |
| 889 | iommu_completion_wait(iommu); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 890 | } |
| 891 | |
| 892 | /* |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 893 | * This function uses heavy locking and may disable irqs for some time. But |
| 894 | * this is no issue because it is only called during resume. |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 895 | */ |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 896 | static void iommu_flush_tlb_all(struct amd_iommu *iommu) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 897 | { |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 898 | u32 dom_id; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 899 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 900 | for (dom_id = 0; dom_id <= 0xffff; ++dom_id) { |
| 901 | struct iommu_cmd cmd; |
| 902 | build_inv_iommu_pages(&cmd, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 903 | dom_id, 1); |
| 904 | iommu_queue_command(iommu, &cmd); |
| 905 | } |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 906 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 907 | iommu_completion_wait(iommu); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 908 | } |
| 909 | |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 910 | static void iommu_flush_all(struct amd_iommu *iommu) |
| 911 | { |
| 912 | struct iommu_cmd cmd; |
| 913 | |
| 914 | build_inv_all(&cmd); |
| 915 | |
| 916 | iommu_queue_command(iommu, &cmd); |
| 917 | iommu_completion_wait(iommu); |
| 918 | } |
| 919 | |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 920 | void iommu_flush_all_caches(struct amd_iommu *iommu) |
| 921 | { |
Joerg Roedel | 58fc7f1 | 2011-04-11 11:13:24 +0200 | [diff] [blame] | 922 | if (iommu_feature(iommu, FEATURE_IA)) { |
| 923 | iommu_flush_all(iommu); |
| 924 | } else { |
| 925 | iommu_flush_dte_all(iommu); |
| 926 | iommu_flush_tlb_all(iommu); |
| 927 | } |
Joerg Roedel | 7d0c5cc | 2011-04-07 08:16:10 +0200 | [diff] [blame] | 928 | } |
| 929 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 930 | /* |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 931 | * Command send function for flushing on-device TLB |
| 932 | */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 933 | static int device_flush_iotlb(struct iommu_dev_data *dev_data, |
| 934 | u64 address, size_t size) |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 935 | { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 936 | struct amd_iommu *iommu; |
| 937 | struct iommu_cmd cmd; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 938 | int qdep; |
| 939 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 940 | qdep = dev_data->ats.qdep; |
| 941 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 942 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 943 | build_inv_iotlb_pages(&cmd, dev_data->devid, qdep, address, size); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 944 | |
| 945 | return iommu_queue_command(iommu, &cmd); |
| 946 | } |
| 947 | |
| 948 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 949 | * Command send function for invalidating a device table entry |
| 950 | */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 951 | static int device_flush_dte(struct iommu_dev_data *dev_data) |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 952 | { |
| 953 | struct amd_iommu *iommu; |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 954 | int ret; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 955 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 956 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 957 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 958 | ret = iommu_flush_dte(iommu, dev_data->devid); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 959 | if (ret) |
| 960 | return ret; |
| 961 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 962 | if (dev_data->ats.enabled) |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 963 | ret = device_flush_iotlb(dev_data, 0, ~0UL); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 964 | |
| 965 | return ret; |
Joerg Roedel | 3fa4365 | 2009-11-26 15:04:38 +0100 | [diff] [blame] | 966 | } |
| 967 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 968 | /* |
| 969 | * TLB invalidation function which is called from the mapping functions. |
| 970 | * It invalidates a single PTE if the range to flush is within a single |
| 971 | * page. Otherwise it flushes the whole TLB of the IOMMU. |
| 972 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 973 | static void __domain_flush_pages(struct protection_domain *domain, |
| 974 | u64 address, size_t size, int pde) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 975 | { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 976 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 977 | struct iommu_cmd cmd; |
| 978 | int ret = 0, i; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 979 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 980 | build_inv_iommu_pages(&cmd, address, size, domain->id, pde); |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 981 | |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 982 | for (i = 0; i < amd_iommus_present; ++i) { |
| 983 | if (!domain->dev_iommu[i]) |
| 984 | continue; |
| 985 | |
| 986 | /* |
| 987 | * Devices of this domain are behind this IOMMU |
| 988 | * We need a TLB flush |
| 989 | */ |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 990 | ret |= iommu_queue_command(amd_iommus[i], &cmd); |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 991 | } |
| 992 | |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 993 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 994 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 995 | if (!dev_data->ats.enabled) |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 996 | continue; |
| 997 | |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 998 | ret |= device_flush_iotlb(dev_data, address, size); |
Joerg Roedel | cb41ed8 | 2011-04-05 11:00:53 +0200 | [diff] [blame] | 999 | } |
| 1000 | |
Joerg Roedel | 11b6402 | 2011-04-06 11:49:28 +0200 | [diff] [blame] | 1001 | WARN_ON(ret); |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1002 | } |
| 1003 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1004 | static void domain_flush_pages(struct protection_domain *domain, |
| 1005 | u64 address, size_t size) |
Joerg Roedel | 6de8ad9 | 2009-11-23 18:30:32 +0100 | [diff] [blame] | 1006 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1007 | __domain_flush_pages(domain, address, size, 0); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 1008 | } |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1009 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1010 | /* Flush the whole IO/TLB for a given protection domain */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1011 | static void domain_flush_tlb(struct protection_domain *domain) |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1012 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1013 | __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 0); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1014 | } |
| 1015 | |
Chris Wright | 42a49f9 | 2009-06-15 15:42:00 +0200 | [diff] [blame] | 1016 | /* Flush the whole IO/TLB for a given protection domain - including PDE */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1017 | static void domain_flush_tlb_pde(struct protection_domain *domain) |
Chris Wright | 42a49f9 | 2009-06-15 15:42:00 +0200 | [diff] [blame] | 1018 | { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1019 | __domain_flush_pages(domain, 0, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, 1); |
| 1020 | } |
| 1021 | |
| 1022 | static void domain_flush_complete(struct protection_domain *domain) |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1023 | { |
| 1024 | int i; |
| 1025 | |
| 1026 | for (i = 0; i < amd_iommus_present; ++i) { |
| 1027 | if (!domain->dev_iommu[i]) |
| 1028 | continue; |
| 1029 | |
| 1030 | /* |
| 1031 | * Devices of this domain are behind this IOMMU |
| 1032 | * We need to wait for completion of all commands. |
| 1033 | */ |
| 1034 | iommu_completion_wait(amd_iommus[i]); |
| 1035 | } |
| 1036 | } |
| 1037 | |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1038 | |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 1039 | /* |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1040 | * This function flushes the DTEs for all devices in domain |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 1041 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 1042 | static void domain_flush_devices(struct protection_domain *domain) |
Joerg Roedel | bfd1be1 | 2009-05-05 15:33:57 +0200 | [diff] [blame] | 1043 | { |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1044 | struct iommu_dev_data *dev_data; |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1045 | |
| 1046 | list_for_each_entry(dev_data, &domain->dev_list, list) |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1047 | device_flush_dte(dev_data); |
Joerg Roedel | b00d3bc | 2009-11-26 15:35:33 +0100 | [diff] [blame] | 1048 | } |
| 1049 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1050 | /**************************************************************************** |
| 1051 | * |
| 1052 | * The functions below are used the create the page table mappings for |
| 1053 | * unity mapped regions. |
| 1054 | * |
| 1055 | ****************************************************************************/ |
| 1056 | |
| 1057 | /* |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1058 | * This function is used to add another level to an IO page table. Adding |
| 1059 | * another level increases the size of the address space by 9 bits to a size up |
| 1060 | * to 64 bits. |
| 1061 | */ |
| 1062 | static bool increase_address_space(struct protection_domain *domain, |
| 1063 | gfp_t gfp) |
| 1064 | { |
| 1065 | u64 *pte; |
| 1066 | |
| 1067 | if (domain->mode == PAGE_MODE_6_LEVEL) |
| 1068 | /* address space already 64 bit large */ |
| 1069 | return false; |
| 1070 | |
| 1071 | pte = (void *)get_zeroed_page(gfp); |
| 1072 | if (!pte) |
| 1073 | return false; |
| 1074 | |
| 1075 | *pte = PM_LEVEL_PDE(domain->mode, |
| 1076 | virt_to_phys(domain->pt_root)); |
| 1077 | domain->pt_root = pte; |
| 1078 | domain->mode += 1; |
| 1079 | domain->updated = true; |
| 1080 | |
| 1081 | return true; |
| 1082 | } |
| 1083 | |
| 1084 | static u64 *alloc_pte(struct protection_domain *domain, |
| 1085 | unsigned long address, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1086 | unsigned long page_size, |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1087 | u64 **pte_page, |
| 1088 | gfp_t gfp) |
| 1089 | { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1090 | int level, end_lvl; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1091 | u64 *pte, *page; |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1092 | |
| 1093 | BUG_ON(!is_power_of_2(page_size)); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1094 | |
| 1095 | while (address > PM_LEVEL_SIZE(domain->mode)) |
| 1096 | increase_address_space(domain, gfp); |
| 1097 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1098 | level = domain->mode - 1; |
| 1099 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| 1100 | address = PAGE_SIZE_ALIGN(address, page_size); |
| 1101 | end_lvl = PAGE_SIZE_LEVEL(page_size); |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1102 | |
| 1103 | while (level > end_lvl) { |
| 1104 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 1105 | page = (u64 *)get_zeroed_page(gfp); |
| 1106 | if (!page) |
| 1107 | return NULL; |
| 1108 | *pte = PM_LEVEL_PDE(level, virt_to_phys(page)); |
| 1109 | } |
| 1110 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1111 | /* No level skipping support yet */ |
| 1112 | if (PM_PTE_LEVEL(*pte) != level) |
| 1113 | return NULL; |
| 1114 | |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1115 | level -= 1; |
| 1116 | |
| 1117 | pte = IOMMU_PTE_PAGE(*pte); |
| 1118 | |
| 1119 | if (pte_page && level == end_lvl) |
| 1120 | *pte_page = pte; |
| 1121 | |
| 1122 | pte = &pte[PM_LEVEL_INDEX(level, address)]; |
| 1123 | } |
| 1124 | |
| 1125 | return pte; |
| 1126 | } |
| 1127 | |
| 1128 | /* |
| 1129 | * This function checks if there is a PTE for a given dma address. If |
| 1130 | * there is one, it returns the pointer to it. |
| 1131 | */ |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1132 | static u64 *fetch_pte(struct protection_domain *domain, unsigned long address) |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1133 | { |
| 1134 | int level; |
| 1135 | u64 *pte; |
| 1136 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1137 | if (address > PM_LEVEL_SIZE(domain->mode)) |
| 1138 | return NULL; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1139 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1140 | level = domain->mode - 1; |
| 1141 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| 1142 | |
| 1143 | while (level > 0) { |
| 1144 | |
| 1145 | /* Not Present */ |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1146 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1147 | return NULL; |
| 1148 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1149 | /* Large PTE */ |
| 1150 | if (PM_PTE_LEVEL(*pte) == 0x07) { |
| 1151 | unsigned long pte_mask, __pte; |
| 1152 | |
| 1153 | /* |
| 1154 | * If we have a series of large PTEs, make |
| 1155 | * sure to return a pointer to the first one. |
| 1156 | */ |
| 1157 | pte_mask = PTE_PAGE_SIZE(*pte); |
| 1158 | pte_mask = ~((PAGE_SIZE_PTE_COUNT(pte_mask) << 3) - 1); |
| 1159 | __pte = ((unsigned long)pte) & pte_mask; |
| 1160 | |
| 1161 | return (u64 *)__pte; |
| 1162 | } |
| 1163 | |
| 1164 | /* No level skipping support yet */ |
| 1165 | if (PM_PTE_LEVEL(*pte) != level) |
| 1166 | return NULL; |
| 1167 | |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1168 | level -= 1; |
| 1169 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1170 | /* Walk to the next level */ |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1171 | pte = IOMMU_PTE_PAGE(*pte); |
| 1172 | pte = &pte[PM_LEVEL_INDEX(level, address)]; |
Joerg Roedel | 308973d | 2009-11-24 17:43:32 +0100 | [diff] [blame] | 1173 | } |
| 1174 | |
| 1175 | return pte; |
| 1176 | } |
| 1177 | |
| 1178 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1179 | * Generic mapping functions. It maps a physical address into a DMA |
| 1180 | * address space. It allocates the page table pages if necessary. |
| 1181 | * In the future it can be extended to a generic mapping function |
| 1182 | * supporting all features of AMD IOMMU page tables like level skipping |
| 1183 | * and full 64 bit address spaces. |
| 1184 | */ |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 1185 | static int iommu_map_page(struct protection_domain *dom, |
| 1186 | unsigned long bus_addr, |
| 1187 | unsigned long phys_addr, |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1188 | int prot, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1189 | unsigned long page_size) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1190 | { |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 1191 | u64 __pte, *pte; |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1192 | int i, count; |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1193 | |
Joerg Roedel | bad1cac | 2009-09-02 16:52:23 +0200 | [diff] [blame] | 1194 | if (!(prot & IOMMU_PROT_MASK)) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1195 | return -EINVAL; |
| 1196 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1197 | bus_addr = PAGE_ALIGN(bus_addr); |
| 1198 | phys_addr = PAGE_ALIGN(phys_addr); |
| 1199 | count = PAGE_SIZE_PTE_COUNT(page_size); |
| 1200 | pte = alloc_pte(dom, bus_addr, page_size, NULL, GFP_KERNEL); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1201 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1202 | for (i = 0; i < count; ++i) |
| 1203 | if (IOMMU_PTE_PRESENT(pte[i])) |
| 1204 | return -EBUSY; |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1205 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1206 | if (page_size > PAGE_SIZE) { |
| 1207 | __pte = PAGE_SIZE_PTE(phys_addr, page_size); |
| 1208 | __pte |= PM_LEVEL_ENC(7) | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1209 | } else |
| 1210 | __pte = phys_addr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1211 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1212 | if (prot & IOMMU_PROT_IR) |
| 1213 | __pte |= IOMMU_PTE_IR; |
| 1214 | if (prot & IOMMU_PROT_IW) |
| 1215 | __pte |= IOMMU_PTE_IW; |
| 1216 | |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1217 | for (i = 0; i < count; ++i) |
| 1218 | pte[i] = __pte; |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1219 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1220 | update_domain(dom); |
| 1221 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1222 | return 0; |
| 1223 | } |
| 1224 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1225 | static unsigned long iommu_unmap_page(struct protection_domain *dom, |
| 1226 | unsigned long bus_addr, |
| 1227 | unsigned long page_size) |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1228 | { |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1229 | unsigned long long unmap_size, unmapped; |
| 1230 | u64 *pte; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1231 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1232 | BUG_ON(!is_power_of_2(page_size)); |
| 1233 | |
| 1234 | unmapped = 0; |
| 1235 | |
| 1236 | while (unmapped < page_size) { |
| 1237 | |
| 1238 | pte = fetch_pte(dom, bus_addr); |
| 1239 | |
| 1240 | if (!pte) { |
| 1241 | /* |
| 1242 | * No PTE for this address |
| 1243 | * move forward in 4kb steps |
| 1244 | */ |
| 1245 | unmap_size = PAGE_SIZE; |
| 1246 | } else if (PM_PTE_LEVEL(*pte) == 0) { |
| 1247 | /* 4kb PTE found for this address */ |
| 1248 | unmap_size = PAGE_SIZE; |
| 1249 | *pte = 0ULL; |
| 1250 | } else { |
| 1251 | int count, i; |
| 1252 | |
| 1253 | /* Large PTE found which maps this address */ |
| 1254 | unmap_size = PTE_PAGE_SIZE(*pte); |
| 1255 | count = PAGE_SIZE_PTE_COUNT(unmap_size); |
| 1256 | for (i = 0; i < count; i++) |
| 1257 | pte[i] = 0ULL; |
| 1258 | } |
| 1259 | |
| 1260 | bus_addr = (bus_addr & ~(unmap_size - 1)) + unmap_size; |
| 1261 | unmapped += unmap_size; |
| 1262 | } |
| 1263 | |
| 1264 | BUG_ON(!is_power_of_2(unmapped)); |
| 1265 | |
| 1266 | return unmapped; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1267 | } |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1268 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1269 | /* |
| 1270 | * This function checks if a specific unity mapping entry is needed for |
| 1271 | * this specific IOMMU. |
| 1272 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1273 | static int iommu_for_unity_map(struct amd_iommu *iommu, |
| 1274 | struct unity_map_entry *entry) |
| 1275 | { |
| 1276 | u16 bdf, i; |
| 1277 | |
| 1278 | for (i = entry->devid_start; i <= entry->devid_end; ++i) { |
| 1279 | bdf = amd_iommu_alias_table[i]; |
| 1280 | if (amd_iommu_rlookup_table[bdf] == iommu) |
| 1281 | return 1; |
| 1282 | } |
| 1283 | |
| 1284 | return 0; |
| 1285 | } |
| 1286 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1287 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1288 | * This function actually applies the mapping to the page table of the |
| 1289 | * dma_ops domain. |
| 1290 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1291 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 1292 | struct unity_map_entry *e) |
| 1293 | { |
| 1294 | u64 addr; |
| 1295 | int ret; |
| 1296 | |
| 1297 | for (addr = e->address_start; addr < e->address_end; |
| 1298 | addr += PAGE_SIZE) { |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 1299 | ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot, |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1300 | PAGE_SIZE); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1301 | if (ret) |
| 1302 | return ret; |
| 1303 | /* |
| 1304 | * if unity mapping is in aperture range mark the page |
| 1305 | * as allocated in the aperture |
| 1306 | */ |
| 1307 | if (addr < dma_dom->aperture_size) |
Joerg Roedel | c323956 | 2009-05-12 10:56:44 +0200 | [diff] [blame] | 1308 | __set_bit(addr >> PAGE_SHIFT, |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1309 | dma_dom->aperture[0]->bitmap); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1310 | } |
| 1311 | |
| 1312 | return 0; |
| 1313 | } |
| 1314 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1315 | /* |
Joerg Roedel | 171e7b3 | 2009-11-24 17:47:56 +0100 | [diff] [blame] | 1316 | * Init the unity mappings for a specific IOMMU in the system |
| 1317 | * |
| 1318 | * Basically iterates over all unity mapping entries and applies them to |
| 1319 | * the default domain DMA of that IOMMU if necessary. |
| 1320 | */ |
| 1321 | static int iommu_init_unity_mappings(struct amd_iommu *iommu) |
| 1322 | { |
| 1323 | struct unity_map_entry *entry; |
| 1324 | int ret; |
| 1325 | |
| 1326 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { |
| 1327 | if (!iommu_for_unity_map(iommu, entry)) |
| 1328 | continue; |
| 1329 | ret = dma_ops_unity_map(iommu->default_dom, entry); |
| 1330 | if (ret) |
| 1331 | return ret; |
| 1332 | } |
| 1333 | |
| 1334 | return 0; |
| 1335 | } |
| 1336 | |
| 1337 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1338 | * Inits the unity mappings required for a specific device |
| 1339 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 1340 | static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, |
| 1341 | u16 devid) |
| 1342 | { |
| 1343 | struct unity_map_entry *e; |
| 1344 | int ret; |
| 1345 | |
| 1346 | list_for_each_entry(e, &amd_iommu_unity_map, list) { |
| 1347 | if (!(devid >= e->devid_start && devid <= e->devid_end)) |
| 1348 | continue; |
| 1349 | ret = dma_ops_unity_map(dma_dom, e); |
| 1350 | if (ret) |
| 1351 | return ret; |
| 1352 | } |
| 1353 | |
| 1354 | return 0; |
| 1355 | } |
| 1356 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1357 | /**************************************************************************** |
| 1358 | * |
| 1359 | * The next functions belong to the address allocator for the dma_ops |
| 1360 | * interface functions. They work like the allocators in the other IOMMU |
| 1361 | * drivers. Its basically a bitmap which marks the allocated pages in |
| 1362 | * the aperture. Maybe it could be enhanced in the future to a more |
| 1363 | * efficient allocator. |
| 1364 | * |
| 1365 | ****************************************************************************/ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1366 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1367 | /* |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1368 | * The address allocator core functions. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1369 | * |
| 1370 | * called with domain->lock held |
| 1371 | */ |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1372 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1373 | /* |
Joerg Roedel | 171e7b3 | 2009-11-24 17:47:56 +0100 | [diff] [blame] | 1374 | * Used to reserve address ranges in the aperture (e.g. for exclusion |
| 1375 | * ranges. |
| 1376 | */ |
| 1377 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, |
| 1378 | unsigned long start_page, |
| 1379 | unsigned int pages) |
| 1380 | { |
| 1381 | unsigned int i, last_page = dom->aperture_size >> PAGE_SHIFT; |
| 1382 | |
| 1383 | if (start_page + pages > last_page) |
| 1384 | pages = last_page - start_page; |
| 1385 | |
| 1386 | for (i = start_page; i < start_page + pages; ++i) { |
| 1387 | int index = i / APERTURE_RANGE_PAGES; |
| 1388 | int page = i % APERTURE_RANGE_PAGES; |
| 1389 | __set_bit(page, dom->aperture[index]->bitmap); |
| 1390 | } |
| 1391 | } |
| 1392 | |
| 1393 | /* |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1394 | * This function is used to add a new aperture range to an existing |
| 1395 | * aperture in case of dma_ops domain allocation or address allocation |
| 1396 | * failure. |
| 1397 | */ |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1398 | static int alloc_new_range(struct dma_ops_domain *dma_dom, |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1399 | bool populate, gfp_t gfp) |
| 1400 | { |
| 1401 | int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT; |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1402 | struct amd_iommu *iommu; |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1403 | unsigned long i, old_size; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1404 | |
Joerg Roedel | f5e9705 | 2009-05-22 12:31:53 +0200 | [diff] [blame] | 1405 | #ifdef CONFIG_IOMMU_STRESS |
| 1406 | populate = false; |
| 1407 | #endif |
| 1408 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1409 | if (index >= APERTURE_MAX_RANGES) |
| 1410 | return -ENOMEM; |
| 1411 | |
| 1412 | dma_dom->aperture[index] = kzalloc(sizeof(struct aperture_range), gfp); |
| 1413 | if (!dma_dom->aperture[index]) |
| 1414 | return -ENOMEM; |
| 1415 | |
| 1416 | dma_dom->aperture[index]->bitmap = (void *)get_zeroed_page(gfp); |
| 1417 | if (!dma_dom->aperture[index]->bitmap) |
| 1418 | goto out_free; |
| 1419 | |
| 1420 | dma_dom->aperture[index]->offset = dma_dom->aperture_size; |
| 1421 | |
| 1422 | if (populate) { |
| 1423 | unsigned long address = dma_dom->aperture_size; |
| 1424 | int i, num_ptes = APERTURE_RANGE_PAGES / 512; |
| 1425 | u64 *pte, *pte_page; |
| 1426 | |
| 1427 | for (i = 0; i < num_ptes; ++i) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 1428 | pte = alloc_pte(&dma_dom->domain, address, PAGE_SIZE, |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1429 | &pte_page, gfp); |
| 1430 | if (!pte) |
| 1431 | goto out_free; |
| 1432 | |
| 1433 | dma_dom->aperture[index]->pte_pages[i] = pte_page; |
| 1434 | |
| 1435 | address += APERTURE_RANGE_SIZE / 64; |
| 1436 | } |
| 1437 | } |
| 1438 | |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1439 | old_size = dma_dom->aperture_size; |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1440 | dma_dom->aperture_size += APERTURE_RANGE_SIZE; |
| 1441 | |
Joerg Roedel | 17f5b56 | 2011-07-06 17:14:44 +0200 | [diff] [blame] | 1442 | /* Reserve address range used for MSI messages */ |
| 1443 | if (old_size < MSI_ADDR_BASE_LO && |
| 1444 | dma_dom->aperture_size > MSI_ADDR_BASE_LO) { |
| 1445 | unsigned long spage; |
| 1446 | int pages; |
| 1447 | |
| 1448 | pages = iommu_num_pages(MSI_ADDR_BASE_LO, 0x10000, PAGE_SIZE); |
| 1449 | spage = MSI_ADDR_BASE_LO >> PAGE_SHIFT; |
| 1450 | |
| 1451 | dma_ops_reserve_addresses(dma_dom, spage, pages); |
| 1452 | } |
| 1453 | |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 1454 | /* Initialize the exclusion range if necessary */ |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1455 | for_each_iommu(iommu) { |
| 1456 | if (iommu->exclusion_start && |
| 1457 | iommu->exclusion_start >= dma_dom->aperture[index]->offset |
| 1458 | && iommu->exclusion_start < dma_dom->aperture_size) { |
| 1459 | unsigned long startpage; |
| 1460 | int pages = iommu_num_pages(iommu->exclusion_start, |
| 1461 | iommu->exclusion_length, |
| 1462 | PAGE_SIZE); |
| 1463 | startpage = iommu->exclusion_start >> PAGE_SHIFT; |
| 1464 | dma_ops_reserve_addresses(dma_dom, startpage, pages); |
| 1465 | } |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1466 | } |
| 1467 | |
| 1468 | /* |
| 1469 | * Check for areas already mapped as present in the new aperture |
| 1470 | * range and mark those pages as reserved in the allocator. Such |
| 1471 | * mappings may already exist as a result of requested unity |
| 1472 | * mappings for devices. |
| 1473 | */ |
| 1474 | for (i = dma_dom->aperture[index]->offset; |
| 1475 | i < dma_dom->aperture_size; |
| 1476 | i += PAGE_SIZE) { |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 1477 | u64 *pte = fetch_pte(&dma_dom->domain, i); |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1478 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) |
| 1479 | continue; |
| 1480 | |
Joerg Roedel | fcd0861 | 2011-10-11 17:41:32 +0200 | [diff] [blame] | 1481 | dma_ops_reserve_addresses(dma_dom, i >> PAGE_SHIFT, 1); |
Joerg Roedel | 00cd122 | 2009-05-19 09:52:40 +0200 | [diff] [blame] | 1482 | } |
| 1483 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1484 | update_domain(&dma_dom->domain); |
| 1485 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1486 | return 0; |
| 1487 | |
| 1488 | out_free: |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 1489 | update_domain(&dma_dom->domain); |
| 1490 | |
Joerg Roedel | 9cabe89 | 2009-05-18 16:38:55 +0200 | [diff] [blame] | 1491 | free_page((unsigned long)dma_dom->aperture[index]->bitmap); |
| 1492 | |
| 1493 | kfree(dma_dom->aperture[index]); |
| 1494 | dma_dom->aperture[index] = NULL; |
| 1495 | |
| 1496 | return -ENOMEM; |
| 1497 | } |
| 1498 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1499 | static unsigned long dma_ops_area_alloc(struct device *dev, |
| 1500 | struct dma_ops_domain *dom, |
| 1501 | unsigned int pages, |
| 1502 | unsigned long align_mask, |
| 1503 | u64 dma_mask, |
| 1504 | unsigned long start) |
| 1505 | { |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1506 | unsigned long next_bit = dom->next_address % APERTURE_RANGE_SIZE; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1507 | int max_index = dom->aperture_size >> APERTURE_RANGE_SHIFT; |
| 1508 | int i = start >> APERTURE_RANGE_SHIFT; |
| 1509 | unsigned long boundary_size; |
| 1510 | unsigned long address = -1; |
| 1511 | unsigned long limit; |
| 1512 | |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1513 | next_bit >>= PAGE_SHIFT; |
| 1514 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1515 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, |
| 1516 | PAGE_SIZE) >> PAGE_SHIFT; |
| 1517 | |
| 1518 | for (;i < max_index; ++i) { |
| 1519 | unsigned long offset = dom->aperture[i]->offset >> PAGE_SHIFT; |
| 1520 | |
| 1521 | if (dom->aperture[i]->offset >= dma_mask) |
| 1522 | break; |
| 1523 | |
| 1524 | limit = iommu_device_max_index(APERTURE_RANGE_PAGES, offset, |
| 1525 | dma_mask >> PAGE_SHIFT); |
| 1526 | |
| 1527 | address = iommu_area_alloc(dom->aperture[i]->bitmap, |
| 1528 | limit, next_bit, pages, 0, |
| 1529 | boundary_size, align_mask); |
| 1530 | if (address != -1) { |
| 1531 | address = dom->aperture[i]->offset + |
| 1532 | (address << PAGE_SHIFT); |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1533 | dom->next_address = address + (pages << PAGE_SHIFT); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1534 | break; |
| 1535 | } |
| 1536 | |
| 1537 | next_bit = 0; |
| 1538 | } |
| 1539 | |
| 1540 | return address; |
| 1541 | } |
| 1542 | |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1543 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
| 1544 | struct dma_ops_domain *dom, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1545 | unsigned int pages, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1546 | unsigned long align_mask, |
| 1547 | u64 dma_mask) |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1548 | { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1549 | unsigned long address; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1550 | |
Joerg Roedel | fe16f08 | 2009-05-22 12:27:53 +0200 | [diff] [blame] | 1551 | #ifdef CONFIG_IOMMU_STRESS |
| 1552 | dom->next_address = 0; |
| 1553 | dom->need_flush = true; |
| 1554 | #endif |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1555 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1556 | address = dma_ops_area_alloc(dev, dom, pages, align_mask, |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1557 | dma_mask, dom->next_address); |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1558 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1559 | if (address == -1) { |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1560 | dom->next_address = 0; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1561 | address = dma_ops_area_alloc(dev, dom, pages, align_mask, |
| 1562 | dma_mask, 0); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1563 | dom->need_flush = true; |
| 1564 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1565 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1566 | if (unlikely(address == -1)) |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 1567 | address = DMA_ERROR_CODE; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1568 | |
| 1569 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); |
| 1570 | |
| 1571 | return address; |
| 1572 | } |
| 1573 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1574 | /* |
| 1575 | * The address free function. |
| 1576 | * |
| 1577 | * called with domain->lock held |
| 1578 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1579 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, |
| 1580 | unsigned long address, |
| 1581 | unsigned int pages) |
| 1582 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1583 | unsigned i = address >> APERTURE_RANGE_SHIFT; |
| 1584 | struct aperture_range *range = dom->aperture[i]; |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1585 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1586 | BUG_ON(i >= APERTURE_MAX_RANGES || range == NULL); |
| 1587 | |
Joerg Roedel | 47bccd6 | 2009-05-22 12:40:54 +0200 | [diff] [blame] | 1588 | #ifdef CONFIG_IOMMU_STRESS |
| 1589 | if (i < 4) |
| 1590 | return; |
| 1591 | #endif |
| 1592 | |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1593 | if (address >= dom->next_address) |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1594 | dom->need_flush = true; |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1595 | |
| 1596 | address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT; |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1597 | |
Akinobu Mita | a66022c | 2009-12-15 16:48:28 -0800 | [diff] [blame] | 1598 | bitmap_clear(range->bitmap, address, pages); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1599 | |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 1600 | } |
| 1601 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1602 | /**************************************************************************** |
| 1603 | * |
| 1604 | * The next functions belong to the domain allocation. A domain is |
| 1605 | * allocated for every IOMMU as the default domain. If device isolation |
| 1606 | * is enabled, every device get its own domain. The most important thing |
| 1607 | * about domains is the page table mapping the DMA address space they |
| 1608 | * contain. |
| 1609 | * |
| 1610 | ****************************************************************************/ |
| 1611 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1612 | /* |
| 1613 | * This function adds a protection domain to the global protection domain list |
| 1614 | */ |
| 1615 | static void add_domain_to_list(struct protection_domain *domain) |
| 1616 | { |
| 1617 | unsigned long flags; |
| 1618 | |
| 1619 | spin_lock_irqsave(&amd_iommu_pd_lock, flags); |
| 1620 | list_add(&domain->list, &amd_iommu_pd_list); |
| 1621 | spin_unlock_irqrestore(&amd_iommu_pd_lock, flags); |
| 1622 | } |
| 1623 | |
| 1624 | /* |
| 1625 | * This function removes a protection domain to the global |
| 1626 | * protection domain list |
| 1627 | */ |
| 1628 | static void del_domain_from_list(struct protection_domain *domain) |
| 1629 | { |
| 1630 | unsigned long flags; |
| 1631 | |
| 1632 | spin_lock_irqsave(&amd_iommu_pd_lock, flags); |
| 1633 | list_del(&domain->list); |
| 1634 | spin_unlock_irqrestore(&amd_iommu_pd_lock, flags); |
| 1635 | } |
| 1636 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1637 | static u16 domain_id_alloc(void) |
| 1638 | { |
| 1639 | unsigned long flags; |
| 1640 | int id; |
| 1641 | |
| 1642 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1643 | id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID); |
| 1644 | BUG_ON(id == 0); |
| 1645 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 1646 | __set_bit(id, amd_iommu_pd_alloc_bitmap); |
| 1647 | else |
| 1648 | id = 0; |
| 1649 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1650 | |
| 1651 | return id; |
| 1652 | } |
| 1653 | |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 1654 | static void domain_id_free(int id) |
| 1655 | { |
| 1656 | unsigned long flags; |
| 1657 | |
| 1658 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1659 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 1660 | __clear_bit(id, amd_iommu_pd_alloc_bitmap); |
| 1661 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1662 | } |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 1663 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1664 | static void free_pagetable(struct protection_domain *domain) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1665 | { |
| 1666 | int i, j; |
| 1667 | u64 *p1, *p2, *p3; |
| 1668 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1669 | p1 = domain->pt_root; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1670 | |
| 1671 | if (!p1) |
| 1672 | return; |
| 1673 | |
| 1674 | for (i = 0; i < 512; ++i) { |
| 1675 | if (!IOMMU_PTE_PRESENT(p1[i])) |
| 1676 | continue; |
| 1677 | |
| 1678 | p2 = IOMMU_PTE_PAGE(p1[i]); |
Joerg Roedel | 3cc3d84 | 2008-12-04 16:44:31 +0100 | [diff] [blame] | 1679 | for (j = 0; j < 512; ++j) { |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1680 | if (!IOMMU_PTE_PRESENT(p2[j])) |
| 1681 | continue; |
| 1682 | p3 = IOMMU_PTE_PAGE(p2[j]); |
| 1683 | free_page((unsigned long)p3); |
| 1684 | } |
| 1685 | |
| 1686 | free_page((unsigned long)p2); |
| 1687 | } |
| 1688 | |
| 1689 | free_page((unsigned long)p1); |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1690 | |
| 1691 | domain->pt_root = NULL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1692 | } |
| 1693 | |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1694 | static void free_gcr3_tbl_level1(u64 *tbl) |
| 1695 | { |
| 1696 | u64 *ptr; |
| 1697 | int i; |
| 1698 | |
| 1699 | for (i = 0; i < 512; ++i) { |
| 1700 | if (!(tbl[i] & GCR3_VALID)) |
| 1701 | continue; |
| 1702 | |
| 1703 | ptr = __va(tbl[i] & PAGE_MASK); |
| 1704 | |
| 1705 | free_page((unsigned long)ptr); |
| 1706 | } |
| 1707 | } |
| 1708 | |
| 1709 | static void free_gcr3_tbl_level2(u64 *tbl) |
| 1710 | { |
| 1711 | u64 *ptr; |
| 1712 | int i; |
| 1713 | |
| 1714 | for (i = 0; i < 512; ++i) { |
| 1715 | if (!(tbl[i] & GCR3_VALID)) |
| 1716 | continue; |
| 1717 | |
| 1718 | ptr = __va(tbl[i] & PAGE_MASK); |
| 1719 | |
| 1720 | free_gcr3_tbl_level1(ptr); |
| 1721 | } |
| 1722 | } |
| 1723 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1724 | static void free_gcr3_table(struct protection_domain *domain) |
| 1725 | { |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 1726 | if (domain->glx == 2) |
| 1727 | free_gcr3_tbl_level2(domain->gcr3_tbl); |
| 1728 | else if (domain->glx == 1) |
| 1729 | free_gcr3_tbl_level1(domain->gcr3_tbl); |
| 1730 | else if (domain->glx != 0) |
| 1731 | BUG(); |
| 1732 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1733 | free_page((unsigned long)domain->gcr3_tbl); |
| 1734 | } |
| 1735 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1736 | /* |
| 1737 | * Free a domain, only used if something went wrong in the |
| 1738 | * allocation path and we need to free an already allocated page table |
| 1739 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1740 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
| 1741 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1742 | int i; |
| 1743 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1744 | if (!dom) |
| 1745 | return; |
| 1746 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1747 | del_domain_from_list(&dom->domain); |
| 1748 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 1749 | free_pagetable(&dom->domain); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1750 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1751 | for (i = 0; i < APERTURE_MAX_RANGES; ++i) { |
| 1752 | if (!dom->aperture[i]) |
| 1753 | continue; |
| 1754 | free_page((unsigned long)dom->aperture[i]->bitmap); |
| 1755 | kfree(dom->aperture[i]); |
| 1756 | } |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1757 | |
| 1758 | kfree(dom); |
| 1759 | } |
| 1760 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1761 | /* |
| 1762 | * Allocates a new protection domain usable for the dma_ops functions. |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 1763 | * It also initializes the page table and the address allocator data |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1764 | * structures required for the dma_ops interface |
| 1765 | */ |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 1766 | static struct dma_ops_domain *dma_ops_domain_alloc(void) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1767 | { |
| 1768 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1769 | |
| 1770 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); |
| 1771 | if (!dma_dom) |
| 1772 | return NULL; |
| 1773 | |
| 1774 | spin_lock_init(&dma_dom->domain.lock); |
| 1775 | |
| 1776 | dma_dom->domain.id = domain_id_alloc(); |
| 1777 | if (dma_dom->domain.id == 0) |
| 1778 | goto free_dma_dom; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 1779 | INIT_LIST_HEAD(&dma_dom->domain.dev_list); |
Joerg Roedel | 8f7a017 | 2009-09-02 16:55:24 +0200 | [diff] [blame] | 1780 | dma_dom->domain.mode = PAGE_MODE_2_LEVEL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1781 | dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
Joerg Roedel | 9fdb19d | 2008-12-02 17:46:25 +0100 | [diff] [blame] | 1782 | dma_dom->domain.flags = PD_DMA_OPS_MASK; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1783 | dma_dom->domain.priv = dma_dom; |
| 1784 | if (!dma_dom->domain.pt_root) |
| 1785 | goto free_dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1786 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1787 | dma_dom->need_flush = false; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1788 | dma_dom->target_dev = 0xffff; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1789 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 1790 | add_domain_to_list(&dma_dom->domain); |
| 1791 | |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 1792 | if (alloc_new_range(dma_dom, true, GFP_KERNEL)) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1793 | goto free_dma_dom; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1794 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1795 | /* |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1796 | * mark the first page as allocated so we never return 0 as |
| 1797 | * a valid dma-address. So we can use 0 as error value |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1798 | */ |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 1799 | dma_dom->aperture[0]->bitmap[0] = 1; |
Joerg Roedel | 803b8cb | 2009-05-18 15:32:48 +0200 | [diff] [blame] | 1800 | dma_dom->next_address = 0; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1801 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 1802 | |
| 1803 | return dma_dom; |
| 1804 | |
| 1805 | free_dma_dom: |
| 1806 | dma_ops_domain_free(dma_dom); |
| 1807 | |
| 1808 | return NULL; |
| 1809 | } |
| 1810 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1811 | /* |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1812 | * little helper function to check whether a given protection domain is a |
| 1813 | * dma_ops domain |
| 1814 | */ |
| 1815 | static bool dma_ops_domain(struct protection_domain *domain) |
| 1816 | { |
| 1817 | return domain->flags & PD_DMA_OPS_MASK; |
| 1818 | } |
| 1819 | |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 1820 | static void set_dte_entry(u16 devid, struct protection_domain *domain, bool ats) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1821 | { |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 1822 | u64 pte_root = 0; |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 1823 | u64 flags = 0; |
Joerg Roedel | 863c74e | 2008-12-02 17:56:36 +0100 | [diff] [blame] | 1824 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 1825 | if (domain->mode != PAGE_MODE_NONE) |
| 1826 | pte_root = virt_to_phys(domain->pt_root); |
| 1827 | |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 1828 | pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK) |
| 1829 | << DEV_ENTRY_MODE_SHIFT; |
| 1830 | pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1831 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 1832 | flags = amd_iommu_dev_table[devid].data[1]; |
| 1833 | |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 1834 | if (ats) |
| 1835 | flags |= DTE_FLAG_IOTLB; |
| 1836 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1837 | if (domain->flags & PD_IOMMUV2_MASK) { |
| 1838 | u64 gcr3 = __pa(domain->gcr3_tbl); |
| 1839 | u64 glx = domain->glx; |
| 1840 | u64 tmp; |
| 1841 | |
| 1842 | pte_root |= DTE_FLAG_GV; |
| 1843 | pte_root |= (glx & DTE_GLX_MASK) << DTE_GLX_SHIFT; |
| 1844 | |
| 1845 | /* First mask out possible old values for GCR3 table */ |
| 1846 | tmp = DTE_GCR3_VAL_B(~0ULL) << DTE_GCR3_SHIFT_B; |
| 1847 | flags &= ~tmp; |
| 1848 | |
| 1849 | tmp = DTE_GCR3_VAL_C(~0ULL) << DTE_GCR3_SHIFT_C; |
| 1850 | flags &= ~tmp; |
| 1851 | |
| 1852 | /* Encode GCR3 table into DTE */ |
| 1853 | tmp = DTE_GCR3_VAL_A(gcr3) << DTE_GCR3_SHIFT_A; |
| 1854 | pte_root |= tmp; |
| 1855 | |
| 1856 | tmp = DTE_GCR3_VAL_B(gcr3) << DTE_GCR3_SHIFT_B; |
| 1857 | flags |= tmp; |
| 1858 | |
| 1859 | tmp = DTE_GCR3_VAL_C(gcr3) << DTE_GCR3_SHIFT_C; |
| 1860 | flags |= tmp; |
| 1861 | } |
| 1862 | |
Joerg Roedel | ee6c286 | 2011-11-09 12:06:03 +0100 | [diff] [blame] | 1863 | flags &= ~(0xffffUL); |
| 1864 | flags |= domain->id; |
| 1865 | |
| 1866 | amd_iommu_dev_table[devid].data[1] = flags; |
| 1867 | amd_iommu_dev_table[devid].data[0] = pte_root; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1868 | } |
| 1869 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1870 | static void clear_dte_entry(u16 devid) |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 1871 | { |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 1872 | /* remove entry from the device table seen by the hardware */ |
| 1873 | amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV; |
| 1874 | amd_iommu_dev_table[devid].data[1] = 0; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 1875 | |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 1876 | amd_iommu_apply_erratum_63(devid); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1877 | } |
| 1878 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 1879 | static void do_attach(struct iommu_dev_data *dev_data, |
| 1880 | struct protection_domain *domain) |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1881 | { |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1882 | struct amd_iommu *iommu; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 1883 | bool ats; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1884 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 1885 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 1886 | ats = dev_data->ats.enabled; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1887 | |
| 1888 | /* Update data structures */ |
| 1889 | dev_data->domain = domain; |
| 1890 | list_add(&dev_data->list, &domain->dev_list); |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 1891 | set_dte_entry(dev_data->devid, domain, ats); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1892 | |
| 1893 | /* Do reference counting */ |
| 1894 | domain->dev_iommu[iommu->index] += 1; |
| 1895 | domain->dev_cnt += 1; |
| 1896 | |
| 1897 | /* Flush the DTE entry */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1898 | device_flush_dte(dev_data); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1899 | } |
| 1900 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 1901 | static void do_detach(struct iommu_dev_data *dev_data) |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1902 | { |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1903 | struct amd_iommu *iommu; |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1904 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 1905 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | c5cca14 | 2009-10-09 18:31:20 +0200 | [diff] [blame] | 1906 | |
Joerg Roedel | c459611 | 2009-11-20 14:57:32 +0100 | [diff] [blame] | 1907 | /* decrease reference counters */ |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1908 | dev_data->domain->dev_iommu[iommu->index] -= 1; |
| 1909 | dev_data->domain->dev_cnt -= 1; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 1910 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1911 | /* Update data structures */ |
| 1912 | dev_data->domain = NULL; |
| 1913 | list_del(&dev_data->list); |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 1914 | clear_dte_entry(dev_data->devid); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1915 | |
| 1916 | /* Flush the DTE entry */ |
Joerg Roedel | 6c54204 | 2011-06-09 17:07:31 +0200 | [diff] [blame] | 1917 | device_flush_dte(dev_data); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1918 | } |
| 1919 | |
| 1920 | /* |
| 1921 | * If a device is not yet associated with a domain, this function does |
| 1922 | * assigns it visible for the hardware |
| 1923 | */ |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 1924 | static int __attach_device(struct iommu_dev_data *dev_data, |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1925 | struct protection_domain *domain) |
| 1926 | { |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 1927 | int ret; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 1928 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1929 | /* lock domain */ |
| 1930 | spin_lock(&domain->lock); |
| 1931 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 1932 | if (dev_data->alias_data != NULL) { |
| 1933 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1934 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 1935 | /* Some sanity checks */ |
| 1936 | ret = -EBUSY; |
| 1937 | if (alias_data->domain != NULL && |
| 1938 | alias_data->domain != domain) |
| 1939 | goto out_unlock; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1940 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 1941 | if (dev_data->domain != NULL && |
| 1942 | dev_data->domain != domain) |
| 1943 | goto out_unlock; |
| 1944 | |
| 1945 | /* Do real assignment */ |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1946 | if (alias_data->domain == NULL) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 1947 | do_attach(alias_data, domain); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 1948 | |
| 1949 | atomic_inc(&alias_data->bind); |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 1950 | } |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1951 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 1952 | if (dev_data->domain == NULL) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 1953 | do_attach(dev_data, domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1954 | |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 1955 | atomic_inc(&dev_data->bind); |
| 1956 | |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 1957 | ret = 0; |
| 1958 | |
| 1959 | out_unlock: |
| 1960 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 1961 | /* ready */ |
| 1962 | spin_unlock(&domain->lock); |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 1963 | |
Julia Lawall | 84fe6c1 | 2010-05-27 12:31:51 +0200 | [diff] [blame] | 1964 | return ret; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 1965 | } |
| 1966 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1967 | |
| 1968 | static void pdev_iommuv2_disable(struct pci_dev *pdev) |
| 1969 | { |
| 1970 | pci_disable_ats(pdev); |
| 1971 | pci_disable_pri(pdev); |
| 1972 | pci_disable_pasid(pdev); |
| 1973 | } |
| 1974 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 1975 | /* FIXME: Change generic reset-function to do the same */ |
| 1976 | static int pri_reset_while_enabled(struct pci_dev *pdev) |
| 1977 | { |
| 1978 | u16 control; |
| 1979 | int pos; |
| 1980 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 1981 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 1982 | if (!pos) |
| 1983 | return -EINVAL; |
| 1984 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 1985 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
| 1986 | control |= PCI_PRI_CTRL_RESET; |
| 1987 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 1988 | |
| 1989 | return 0; |
| 1990 | } |
| 1991 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 1992 | static int pdev_iommuv2_enable(struct pci_dev *pdev) |
| 1993 | { |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 1994 | bool reset_enable; |
| 1995 | int reqs, ret; |
| 1996 | |
| 1997 | /* FIXME: Hardcode number of outstanding requests for now */ |
| 1998 | reqs = 32; |
| 1999 | if (pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE)) |
| 2000 | reqs = 1; |
| 2001 | reset_enable = pdev_pri_erratum(pdev, AMD_PRI_DEV_ERRATUM_ENABLE_RESET); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2002 | |
| 2003 | /* Only allow access to user-accessible pages */ |
| 2004 | ret = pci_enable_pasid(pdev, 0); |
| 2005 | if (ret) |
| 2006 | goto out_err; |
| 2007 | |
| 2008 | /* First reset the PRI state of the device */ |
| 2009 | ret = pci_reset_pri(pdev); |
| 2010 | if (ret) |
| 2011 | goto out_err; |
| 2012 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2013 | /* Enable PRI */ |
| 2014 | ret = pci_enable_pri(pdev, reqs); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2015 | if (ret) |
| 2016 | goto out_err; |
| 2017 | |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 2018 | if (reset_enable) { |
| 2019 | ret = pri_reset_while_enabled(pdev); |
| 2020 | if (ret) |
| 2021 | goto out_err; |
| 2022 | } |
| 2023 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2024 | ret = pci_enable_ats(pdev, PAGE_SHIFT); |
| 2025 | if (ret) |
| 2026 | goto out_err; |
| 2027 | |
| 2028 | return 0; |
| 2029 | |
| 2030 | out_err: |
| 2031 | pci_disable_pri(pdev); |
| 2032 | pci_disable_pasid(pdev); |
| 2033 | |
| 2034 | return ret; |
| 2035 | } |
| 2036 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2037 | /* FIXME: Move this to PCI code */ |
| 2038 | #define PCI_PRI_TLP_OFF (1 << 2) |
| 2039 | |
| 2040 | bool pci_pri_tlp_required(struct pci_dev *pdev) |
| 2041 | { |
| 2042 | u16 control; |
| 2043 | int pos; |
| 2044 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2045 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2046 | if (!pos) |
| 2047 | return false; |
| 2048 | |
Joerg Roedel | 46277b7 | 2011-12-07 14:34:02 +0100 | [diff] [blame] | 2049 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2050 | |
| 2051 | return (control & PCI_PRI_TLP_OFF) ? true : false; |
| 2052 | } |
| 2053 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2054 | /* |
| 2055 | * If a device is not yet associated with a domain, this function does |
| 2056 | * assigns it visible for the hardware |
| 2057 | */ |
| 2058 | static int attach_device(struct device *dev, |
| 2059 | struct protection_domain *domain) |
| 2060 | { |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2061 | struct pci_dev *pdev = to_pci_dev(dev); |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2062 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2063 | unsigned long flags; |
| 2064 | int ret; |
| 2065 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2066 | dev_data = get_dev_data(dev); |
| 2067 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2068 | if (domain->flags & PD_IOMMUV2_MASK) { |
| 2069 | if (!dev_data->iommu_v2 || !dev_data->passthrough) |
| 2070 | return -EINVAL; |
| 2071 | |
| 2072 | if (pdev_iommuv2_enable(pdev) != 0) |
| 2073 | return -EINVAL; |
| 2074 | |
| 2075 | dev_data->ats.enabled = true; |
| 2076 | dev_data->ats.qdep = pci_ats_queue_depth(pdev); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 2077 | dev_data->pri_tlp = pci_pri_tlp_required(pdev); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2078 | } else if (amd_iommu_iotlb_sup && |
| 2079 | pci_enable_ats(pdev, PAGE_SHIFT) == 0) { |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2080 | dev_data->ats.enabled = true; |
| 2081 | dev_data->ats.qdep = pci_ats_queue_depth(pdev); |
| 2082 | } |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2083 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2084 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2085 | ret = __attach_device(dev_data, domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2086 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 2087 | |
| 2088 | /* |
| 2089 | * We might boot into a crash-kernel here. The crashed kernel |
| 2090 | * left the caches in the IOMMU dirty. So we have to flush |
| 2091 | * here to evict all dirty stuff. |
| 2092 | */ |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2093 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2094 | |
| 2095 | return ret; |
| 2096 | } |
| 2097 | |
| 2098 | /* |
| 2099 | * Removes a device from a protection domain (unlocked) |
| 2100 | */ |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2101 | static void __detach_device(struct iommu_dev_data *dev_data) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2102 | { |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2103 | struct protection_domain *domain; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 2104 | unsigned long flags; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2105 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2106 | BUG_ON(!dev_data->domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2107 | |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2108 | domain = dev_data->domain; |
| 2109 | |
| 2110 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2111 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2112 | if (dev_data->alias_data != NULL) { |
| 2113 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
| 2114 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2115 | if (atomic_dec_and_test(&alias_data->bind)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2116 | do_detach(alias_data); |
Joerg Roedel | 2410005 | 2009-11-25 15:59:57 +0100 | [diff] [blame] | 2117 | } |
| 2118 | |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2119 | if (atomic_dec_and_test(&dev_data->bind)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2120 | do_detach(dev_data); |
Joerg Roedel | 7f760dd | 2009-11-26 14:49:59 +0100 | [diff] [blame] | 2121 | |
Joerg Roedel | 2ca7627 | 2010-01-22 16:45:31 +0100 | [diff] [blame] | 2122 | spin_unlock_irqrestore(&domain->lock, flags); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2123 | |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2124 | /* |
| 2125 | * If we run in passthrough mode the device must be assigned to the |
Joerg Roedel | d3ad937 | 2010-01-22 17:55:27 +0100 | [diff] [blame] | 2126 | * passthrough domain if it is detached from any other domain. |
| 2127 | * Make sure we can deassign from the pt_domain itself. |
Joerg Roedel | 21129f7 | 2009-09-01 11:59:42 +0200 | [diff] [blame] | 2128 | */ |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2129 | if (dev_data->passthrough && |
Joerg Roedel | d3ad937 | 2010-01-22 17:55:27 +0100 | [diff] [blame] | 2130 | (dev_data->domain == NULL && domain != pt_domain)) |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2131 | __attach_device(dev_data, pt_domain); |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2132 | } |
| 2133 | |
| 2134 | /* |
| 2135 | * Removes a device from a protection domain (with devtable_lock held) |
| 2136 | */ |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2137 | static void detach_device(struct device *dev) |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2138 | { |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2139 | struct protection_domain *domain; |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2140 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2141 | unsigned long flags; |
| 2142 | |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2143 | dev_data = get_dev_data(dev); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2144 | domain = dev_data->domain; |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2145 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2146 | /* lock device table */ |
| 2147 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2148 | __detach_device(dev_data); |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2149 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | fd7b553 | 2011-04-05 15:31:08 +0200 | [diff] [blame] | 2150 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2151 | if (domain->flags & PD_IOMMUV2_MASK) |
| 2152 | pdev_iommuv2_disable(to_pci_dev(dev)); |
| 2153 | else if (dev_data->ats.enabled) |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2154 | pci_disable_ats(to_pci_dev(dev)); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 2155 | |
| 2156 | dev_data->ats.enabled = false; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2157 | } |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2158 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2159 | /* |
| 2160 | * Find out the protection domain structure for a given PCI device. This |
| 2161 | * will give us the pointer to the page table root for example. |
| 2162 | */ |
| 2163 | static struct protection_domain *domain_for_device(struct device *dev) |
| 2164 | { |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2165 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2166 | struct protection_domain *dom = NULL; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2167 | unsigned long flags; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2168 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2169 | dev_data = get_dev_data(dev); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2170 | |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2171 | if (dev_data->domain) |
| 2172 | return dev_data->domain; |
| 2173 | |
Joerg Roedel | 71f7758 | 2011-06-09 19:03:15 +0200 | [diff] [blame] | 2174 | if (dev_data->alias_data != NULL) { |
| 2175 | struct iommu_dev_data *alias_data = dev_data->alias_data; |
Joerg Roedel | 2b02b09 | 2011-06-09 17:48:39 +0200 | [diff] [blame] | 2176 | |
| 2177 | read_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 2178 | if (alias_data->domain != NULL) { |
| 2179 | __attach_device(dev_data, alias_data->domain); |
| 2180 | dom = alias_data->domain; |
| 2181 | } |
| 2182 | read_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2183 | } |
| 2184 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2185 | return dom; |
| 2186 | } |
| 2187 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2188 | static int device_change_notifier(struct notifier_block *nb, |
| 2189 | unsigned long action, void *data) |
| 2190 | { |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2191 | struct dma_ops_domain *dma_domain; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2192 | struct protection_domain *domain; |
| 2193 | struct iommu_dev_data *dev_data; |
| 2194 | struct device *dev = data; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2195 | struct amd_iommu *iommu; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2196 | unsigned long flags; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2197 | u16 devid; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2198 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2199 | if (!check_device(dev)) |
| 2200 | return 0; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2201 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2202 | devid = get_device_id(dev); |
| 2203 | iommu = amd_iommu_rlookup_table[devid]; |
| 2204 | dev_data = get_dev_data(dev); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2205 | |
| 2206 | switch (action) { |
Chris Wright | c1eee67 | 2009-05-21 00:56:58 -0700 | [diff] [blame] | 2207 | case BUS_NOTIFY_UNBOUND_DRIVER: |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2208 | |
| 2209 | domain = domain_for_device(dev); |
| 2210 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2211 | if (!domain) |
| 2212 | goto out; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2213 | if (dev_data->passthrough) |
Joerg Roedel | a1ca331 | 2009-09-01 12:22:22 +0200 | [diff] [blame] | 2214 | break; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2215 | detach_device(dev); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2216 | break; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2217 | case BUS_NOTIFY_ADD_DEVICE: |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2218 | |
| 2219 | iommu_init_device(dev); |
| 2220 | |
| 2221 | domain = domain_for_device(dev); |
| 2222 | |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2223 | /* allocate a protection domain if a device is added */ |
| 2224 | dma_domain = find_protection_domain(devid); |
| 2225 | if (dma_domain) |
| 2226 | goto out; |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 2227 | dma_domain = dma_ops_domain_alloc(); |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 2228 | if (!dma_domain) |
| 2229 | goto out; |
| 2230 | dma_domain->target_dev = devid; |
| 2231 | |
| 2232 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 2233 | list_add_tail(&dma_domain->list, &iommu_pd_list); |
| 2234 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 2235 | |
| 2236 | break; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 2237 | case BUS_NOTIFY_DEL_DEVICE: |
| 2238 | |
| 2239 | iommu_uninit_device(dev); |
| 2240 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2241 | default: |
| 2242 | goto out; |
| 2243 | } |
| 2244 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2245 | iommu_completion_wait(iommu); |
| 2246 | |
| 2247 | out: |
| 2248 | return 0; |
| 2249 | } |
| 2250 | |
Jaswinder Singh Rajput | b25ae67 | 2009-07-01 19:53:14 +0530 | [diff] [blame] | 2251 | static struct notifier_block device_nb = { |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 2252 | .notifier_call = device_change_notifier, |
| 2253 | }; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 2254 | |
Joerg Roedel | 8638c49 | 2009-12-10 11:12:25 +0100 | [diff] [blame] | 2255 | void amd_iommu_init_notifier(void) |
| 2256 | { |
| 2257 | bus_register_notifier(&pci_bus_type, &device_nb); |
| 2258 | } |
| 2259 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2260 | /***************************************************************************** |
| 2261 | * |
| 2262 | * The next functions belong to the dma_ops mapping/unmapping code. |
| 2263 | * |
| 2264 | *****************************************************************************/ |
| 2265 | |
| 2266 | /* |
| 2267 | * In the dma_ops path we only have the struct device. This function |
| 2268 | * finds the corresponding IOMMU, the protection domain and the |
| 2269 | * requestor id for a given device. |
| 2270 | * If the device is not yet associated with a domain this is also done |
| 2271 | * in this function. |
| 2272 | */ |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2273 | static struct protection_domain *get_domain(struct device *dev) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2274 | { |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2275 | struct protection_domain *domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2276 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2277 | u16 devid = get_device_id(dev); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2278 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2279 | if (!check_device(dev)) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2280 | return ERR_PTR(-EINVAL); |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2281 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2282 | domain = domain_for_device(dev); |
| 2283 | if (domain != NULL && !dma_ops_domain(domain)) |
| 2284 | return ERR_PTR(-EBUSY); |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2285 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2286 | if (domain != NULL) |
| 2287 | return domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2288 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2289 | /* Device not bount yet - bind it */ |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2290 | dma_dom = find_protection_domain(devid); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2291 | if (!dma_dom) |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2292 | dma_dom = amd_iommu_rlookup_table[devid]->default_dom; |
| 2293 | attach_device(dev, &dma_dom->domain); |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2294 | DUMP_printk("Using protection domain %d for device %s\n", |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2295 | dma_dom->domain.id, dev_name(dev)); |
Joerg Roedel | f91ba19 | 2008-11-25 12:56:12 +0100 | [diff] [blame] | 2296 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2297 | return &dma_dom->domain; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 2298 | } |
| 2299 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2300 | static void update_device_table(struct protection_domain *domain) |
| 2301 | { |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 2302 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2303 | |
Joerg Roedel | ea61cdd | 2011-06-09 12:56:30 +0200 | [diff] [blame] | 2304 | list_for_each_entry(dev_data, &domain->dev_list, list) |
| 2305 | set_dte_entry(dev_data->devid, domain, dev_data->ats.enabled); |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2306 | } |
| 2307 | |
| 2308 | static void update_domain(struct protection_domain *domain) |
| 2309 | { |
| 2310 | if (!domain->updated) |
| 2311 | return; |
| 2312 | |
| 2313 | update_device_table(domain); |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2314 | |
| 2315 | domain_flush_devices(domain); |
| 2316 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2317 | |
| 2318 | domain->updated = false; |
| 2319 | } |
| 2320 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2321 | /* |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2322 | * This function fetches the PTE for a given address in the aperture |
| 2323 | */ |
| 2324 | static u64* dma_ops_get_pte(struct dma_ops_domain *dom, |
| 2325 | unsigned long address) |
| 2326 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2327 | struct aperture_range *aperture; |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2328 | u64 *pte, *pte_page; |
| 2329 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2330 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
| 2331 | if (!aperture) |
| 2332 | return NULL; |
| 2333 | |
| 2334 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2335 | if (!pte) { |
Joerg Roedel | cbb9d72 | 2010-01-15 14:41:15 +0100 | [diff] [blame] | 2336 | pte = alloc_pte(&dom->domain, address, PAGE_SIZE, &pte_page, |
Joerg Roedel | abdc5eb | 2009-09-03 11:33:51 +0200 | [diff] [blame] | 2337 | GFP_ATOMIC); |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2338 | aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page; |
| 2339 | } else |
Joerg Roedel | 8c8c143 | 2009-09-02 17:30:00 +0200 | [diff] [blame] | 2340 | pte += PM_LEVEL_INDEX(0, address); |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2341 | |
Joerg Roedel | 04bfdd8 | 2009-09-02 16:00:23 +0200 | [diff] [blame] | 2342 | update_domain(&dom->domain); |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2343 | |
| 2344 | return pte; |
| 2345 | } |
| 2346 | |
| 2347 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2348 | * This is the generic map function. It maps one 4kb page at paddr to |
| 2349 | * the given address in the DMA address space for the domain. |
| 2350 | */ |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2351 | static dma_addr_t dma_ops_domain_map(struct dma_ops_domain *dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2352 | unsigned long address, |
| 2353 | phys_addr_t paddr, |
| 2354 | int direction) |
| 2355 | { |
| 2356 | u64 *pte, __pte; |
| 2357 | |
| 2358 | WARN_ON(address > dom->aperture_size); |
| 2359 | |
| 2360 | paddr &= PAGE_MASK; |
| 2361 | |
Joerg Roedel | 8bda309 | 2009-05-12 12:02:46 +0200 | [diff] [blame] | 2362 | pte = dma_ops_get_pte(dom, address); |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2363 | if (!pte) |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2364 | return DMA_ERROR_CODE; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2365 | |
| 2366 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 2367 | |
| 2368 | if (direction == DMA_TO_DEVICE) |
| 2369 | __pte |= IOMMU_PTE_IR; |
| 2370 | else if (direction == DMA_FROM_DEVICE) |
| 2371 | __pte |= IOMMU_PTE_IW; |
| 2372 | else if (direction == DMA_BIDIRECTIONAL) |
| 2373 | __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW; |
| 2374 | |
| 2375 | WARN_ON(*pte); |
| 2376 | |
| 2377 | *pte = __pte; |
| 2378 | |
| 2379 | return (dma_addr_t)address; |
| 2380 | } |
| 2381 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2382 | /* |
| 2383 | * The generic unmapping function for on page in the DMA address space. |
| 2384 | */ |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2385 | static void dma_ops_domain_unmap(struct dma_ops_domain *dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2386 | unsigned long address) |
| 2387 | { |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2388 | struct aperture_range *aperture; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2389 | u64 *pte; |
| 2390 | |
| 2391 | if (address >= dom->aperture_size) |
| 2392 | return; |
| 2393 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2394 | aperture = dom->aperture[APERTURE_RANGE_INDEX(address)]; |
| 2395 | if (!aperture) |
| 2396 | return; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2397 | |
Joerg Roedel | 384de72 | 2009-05-15 12:30:05 +0200 | [diff] [blame] | 2398 | pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)]; |
| 2399 | if (!pte) |
| 2400 | return; |
| 2401 | |
Joerg Roedel | 8c8c143 | 2009-09-02 17:30:00 +0200 | [diff] [blame] | 2402 | pte += PM_LEVEL_INDEX(0, address); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2403 | |
| 2404 | WARN_ON(!*pte); |
| 2405 | |
| 2406 | *pte = 0ULL; |
| 2407 | } |
| 2408 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2409 | /* |
| 2410 | * This function contains common code for mapping of a physically |
Joerg Roedel | 24f8116 | 2008-12-08 14:25:39 +0100 | [diff] [blame] | 2411 | * contiguous memory region into DMA address space. It is used by all |
| 2412 | * mapping functions provided with this IOMMU driver. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2413 | * Must be called with the domain lock held. |
| 2414 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2415 | static dma_addr_t __map_single(struct device *dev, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2416 | struct dma_ops_domain *dma_dom, |
| 2417 | phys_addr_t paddr, |
| 2418 | size_t size, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2419 | int dir, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2420 | bool align, |
| 2421 | u64 dma_mask) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2422 | { |
| 2423 | dma_addr_t offset = paddr & ~PAGE_MASK; |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2424 | dma_addr_t address, start, ret; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2425 | unsigned int pages; |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2426 | unsigned long align_mask = 0; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2427 | int i; |
| 2428 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 2429 | pages = iommu_num_pages(paddr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2430 | paddr &= PAGE_MASK; |
| 2431 | |
Joerg Roedel | 8ecaf8f | 2008-12-12 16:13:04 +0100 | [diff] [blame] | 2432 | INC_STATS_COUNTER(total_map_requests); |
| 2433 | |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 2434 | if (pages > 1) |
| 2435 | INC_STATS_COUNTER(cross_page); |
| 2436 | |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 2437 | if (align) |
| 2438 | align_mask = (1UL << get_order(size)) - 1; |
| 2439 | |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2440 | retry: |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2441 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, |
| 2442 | dma_mask); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2443 | if (unlikely(address == DMA_ERROR_CODE)) { |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2444 | /* |
| 2445 | * setting next_address here will let the address |
| 2446 | * allocator only scan the new allocated range in the |
| 2447 | * first run. This is a small optimization. |
| 2448 | */ |
| 2449 | dma_dom->next_address = dma_dom->aperture_size; |
| 2450 | |
Joerg Roedel | 576175c | 2009-11-23 19:08:46 +0100 | [diff] [blame] | 2451 | if (alloc_new_range(dma_dom, false, GFP_ATOMIC)) |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2452 | goto out; |
| 2453 | |
| 2454 | /* |
André Goddard Rosa | af901ca | 2009-11-14 13:09:05 -0200 | [diff] [blame] | 2455 | * aperture was successfully enlarged by 128 MB, try |
Joerg Roedel | 11b8388 | 2009-05-19 10:23:15 +0200 | [diff] [blame] | 2456 | * allocation again |
| 2457 | */ |
| 2458 | goto retry; |
| 2459 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2460 | |
| 2461 | start = address; |
| 2462 | for (i = 0; i < pages; ++i) { |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2463 | ret = dma_ops_domain_map(dma_dom, start, paddr, dir); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2464 | if (ret == DMA_ERROR_CODE) |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2465 | goto out_unmap; |
| 2466 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2467 | paddr += PAGE_SIZE; |
| 2468 | start += PAGE_SIZE; |
| 2469 | } |
| 2470 | address += offset; |
| 2471 | |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 2472 | ADD_STATS_COUNTER(alloced_io_mem, size); |
| 2473 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 2474 | if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2475 | domain_flush_tlb(&dma_dom->domain); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 2476 | dma_dom->need_flush = false; |
Joerg Roedel | 318afd4 | 2009-11-23 18:32:38 +0100 | [diff] [blame] | 2477 | } else if (unlikely(amd_iommu_np_cache)) |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2478 | domain_flush_pages(&dma_dom->domain, address, size); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 2479 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2480 | out: |
| 2481 | return address; |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2482 | |
| 2483 | out_unmap: |
| 2484 | |
| 2485 | for (--i; i >= 0; --i) { |
| 2486 | start -= PAGE_SIZE; |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2487 | dma_ops_domain_unmap(dma_dom, start); |
Joerg Roedel | 53812c1 | 2009-05-12 12:17:38 +0200 | [diff] [blame] | 2488 | } |
| 2489 | |
| 2490 | dma_ops_free_addresses(dma_dom, address, pages); |
| 2491 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2492 | return DMA_ERROR_CODE; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2493 | } |
| 2494 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2495 | /* |
| 2496 | * Does the reverse of the __map_single function. Must be called with |
| 2497 | * the domain lock held too |
| 2498 | */ |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2499 | static void __unmap_single(struct dma_ops_domain *dma_dom, |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2500 | dma_addr_t dma_addr, |
| 2501 | size_t size, |
| 2502 | int dir) |
| 2503 | { |
Joerg Roedel | 04e0463 | 2010-09-23 16:12:48 +0200 | [diff] [blame] | 2504 | dma_addr_t flush_addr; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2505 | dma_addr_t i, start; |
| 2506 | unsigned int pages; |
| 2507 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2508 | if ((dma_addr == DMA_ERROR_CODE) || |
Joerg Roedel | b8d9905 | 2008-12-08 14:40:26 +0100 | [diff] [blame] | 2509 | (dma_addr + size > dma_dom->aperture_size)) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2510 | return; |
| 2511 | |
Joerg Roedel | 04e0463 | 2010-09-23 16:12:48 +0200 | [diff] [blame] | 2512 | flush_addr = dma_addr; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 2513 | pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2514 | dma_addr &= PAGE_MASK; |
| 2515 | start = dma_addr; |
| 2516 | |
| 2517 | for (i = 0; i < pages; ++i) { |
Joerg Roedel | 680525e | 2009-11-23 18:44:42 +0100 | [diff] [blame] | 2518 | dma_ops_domain_unmap(dma_dom, start); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2519 | start += PAGE_SIZE; |
| 2520 | } |
| 2521 | |
Joerg Roedel | 5774f7c | 2008-12-12 15:57:30 +0100 | [diff] [blame] | 2522 | SUB_STATS_COUNTER(alloced_io_mem, size); |
| 2523 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2524 | dma_ops_free_addresses(dma_dom, dma_addr, pages); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 2525 | |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 2526 | if (amd_iommu_unmap_flush || dma_dom->need_flush) { |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2527 | domain_flush_pages(&dma_dom->domain, flush_addr, size); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 2528 | dma_dom->need_flush = false; |
| 2529 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 2530 | } |
| 2531 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2532 | /* |
| 2533 | * The exported map_single function for dma_ops. |
| 2534 | */ |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2535 | static dma_addr_t map_page(struct device *dev, struct page *page, |
| 2536 | unsigned long offset, size_t size, |
| 2537 | enum dma_data_direction dir, |
| 2538 | struct dma_attrs *attrs) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2539 | { |
| 2540 | unsigned long flags; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2541 | struct protection_domain *domain; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2542 | dma_addr_t addr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2543 | u64 dma_mask; |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2544 | phys_addr_t paddr = page_to_phys(page) + offset; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2545 | |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 2546 | INC_STATS_COUNTER(cnt_map_single); |
| 2547 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2548 | domain = get_domain(dev); |
| 2549 | if (PTR_ERR(domain) == -EINVAL) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2550 | return (dma_addr_t)paddr; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2551 | else if (IS_ERR(domain)) |
| 2552 | return DMA_ERROR_CODE; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2553 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2554 | dma_mask = *dev->dma_mask; |
| 2555 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2556 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2557 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2558 | addr = __map_single(dev, domain->priv, paddr, size, dir, false, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2559 | dma_mask); |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2560 | if (addr == DMA_ERROR_CODE) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2561 | goto out; |
| 2562 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2563 | domain_flush_complete(domain); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2564 | |
| 2565 | out: |
| 2566 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2567 | |
| 2568 | return addr; |
| 2569 | } |
| 2570 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2571 | /* |
| 2572 | * The exported unmap_single function for dma_ops. |
| 2573 | */ |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2574 | static void unmap_page(struct device *dev, dma_addr_t dma_addr, size_t size, |
| 2575 | enum dma_data_direction dir, struct dma_attrs *attrs) |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2576 | { |
| 2577 | unsigned long flags; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2578 | struct protection_domain *domain; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2579 | |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 2580 | INC_STATS_COUNTER(cnt_unmap_single); |
| 2581 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2582 | domain = get_domain(dev); |
| 2583 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2584 | return; |
| 2585 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2586 | spin_lock_irqsave(&domain->lock, flags); |
| 2587 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2588 | __unmap_single(domain->priv, dma_addr, size, dir); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2589 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2590 | domain_flush_complete(domain); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 2591 | |
| 2592 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2593 | } |
| 2594 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2595 | /* |
| 2596 | * This is a special map_sg function which is used if we should map a |
| 2597 | * device which is not handled by an AMD IOMMU in the system. |
| 2598 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2599 | static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist, |
| 2600 | int nelems, int dir) |
| 2601 | { |
| 2602 | struct scatterlist *s; |
| 2603 | int i; |
| 2604 | |
| 2605 | for_each_sg(sglist, s, nelems, i) { |
| 2606 | s->dma_address = (dma_addr_t)sg_phys(s); |
| 2607 | s->dma_length = s->length; |
| 2608 | } |
| 2609 | |
| 2610 | return nelems; |
| 2611 | } |
| 2612 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2613 | /* |
| 2614 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 2615 | * lists). |
| 2616 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2617 | static int map_sg(struct device *dev, struct scatterlist *sglist, |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2618 | int nelems, enum dma_data_direction dir, |
| 2619 | struct dma_attrs *attrs) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2620 | { |
| 2621 | unsigned long flags; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2622 | struct protection_domain *domain; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2623 | int i; |
| 2624 | struct scatterlist *s; |
| 2625 | phys_addr_t paddr; |
| 2626 | int mapped_elems = 0; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2627 | u64 dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2628 | |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 2629 | INC_STATS_COUNTER(cnt_map_sg); |
| 2630 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2631 | domain = get_domain(dev); |
| 2632 | if (PTR_ERR(domain) == -EINVAL) |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2633 | return map_sg_no_iommu(dev, sglist, nelems, dir); |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2634 | else if (IS_ERR(domain)) |
| 2635 | return 0; |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2636 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2637 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2638 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2639 | spin_lock_irqsave(&domain->lock, flags); |
| 2640 | |
| 2641 | for_each_sg(sglist, s, nelems, i) { |
| 2642 | paddr = sg_phys(s); |
| 2643 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2644 | s->dma_address = __map_single(dev, domain->priv, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2645 | paddr, s->length, dir, false, |
| 2646 | dma_mask); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2647 | |
| 2648 | if (s->dma_address) { |
| 2649 | s->dma_length = s->length; |
| 2650 | mapped_elems++; |
| 2651 | } else |
| 2652 | goto unmap; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2653 | } |
| 2654 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2655 | domain_flush_complete(domain); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2656 | |
| 2657 | out: |
| 2658 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2659 | |
| 2660 | return mapped_elems; |
| 2661 | unmap: |
| 2662 | for_each_sg(sglist, s, mapped_elems, i) { |
| 2663 | if (s->dma_address) |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2664 | __unmap_single(domain->priv, s->dma_address, |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2665 | s->dma_length, dir); |
| 2666 | s->dma_address = s->dma_length = 0; |
| 2667 | } |
| 2668 | |
| 2669 | mapped_elems = 0; |
| 2670 | |
| 2671 | goto out; |
| 2672 | } |
| 2673 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2674 | /* |
| 2675 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 2676 | * lists). |
| 2677 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2678 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2679 | int nelems, enum dma_data_direction dir, |
| 2680 | struct dma_attrs *attrs) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2681 | { |
| 2682 | unsigned long flags; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2683 | struct protection_domain *domain; |
| 2684 | struct scatterlist *s; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2685 | int i; |
| 2686 | |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 2687 | INC_STATS_COUNTER(cnt_unmap_sg); |
| 2688 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2689 | domain = get_domain(dev); |
| 2690 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2691 | return; |
| 2692 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2693 | spin_lock_irqsave(&domain->lock, flags); |
| 2694 | |
| 2695 | for_each_sg(sglist, s, nelems, i) { |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2696 | __unmap_single(domain->priv, s->dma_address, |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2697 | s->dma_length, dir); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2698 | s->dma_address = s->dma_length = 0; |
| 2699 | } |
| 2700 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2701 | domain_flush_complete(domain); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 2702 | |
| 2703 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2704 | } |
| 2705 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2706 | /* |
| 2707 | * The exported alloc_coherent function for dma_ops. |
| 2708 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2709 | static void *alloc_coherent(struct device *dev, size_t size, |
| 2710 | dma_addr_t *dma_addr, gfp_t flag) |
| 2711 | { |
| 2712 | unsigned long flags; |
| 2713 | void *virt_addr; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2714 | struct protection_domain *domain; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2715 | phys_addr_t paddr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2716 | u64 dma_mask = dev->coherent_dma_mask; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2717 | |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 2718 | INC_STATS_COUNTER(cnt_alloc_coherent); |
| 2719 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2720 | domain = get_domain(dev); |
| 2721 | if (PTR_ERR(domain) == -EINVAL) { |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2722 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 2723 | *dma_addr = __pa(virt_addr); |
| 2724 | return virt_addr; |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2725 | } else if (IS_ERR(domain)) |
| 2726 | return NULL; |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 2727 | |
Joerg Roedel | f99c0f1 | 2009-11-23 16:52:56 +0100 | [diff] [blame] | 2728 | dma_mask = dev->coherent_dma_mask; |
| 2729 | flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); |
| 2730 | flag |= __GFP_ZERO; |
FUJITA Tomonori | 13d9fea | 2008-09-10 20:19:40 +0900 | [diff] [blame] | 2731 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2732 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 2733 | if (!virt_addr) |
Jaswinder Singh Rajput | b25ae67 | 2009-07-01 19:53:14 +0530 | [diff] [blame] | 2734 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2735 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2736 | paddr = virt_to_phys(virt_addr); |
| 2737 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2738 | if (!dma_mask) |
| 2739 | dma_mask = *dev->dma_mask; |
| 2740 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2741 | spin_lock_irqsave(&domain->lock, flags); |
| 2742 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2743 | *dma_addr = __map_single(dev, domain->priv, paddr, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 2744 | size, DMA_BIDIRECTIONAL, true, dma_mask); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2745 | |
FUJITA Tomonori | 8fd524b | 2009-11-15 21:19:53 +0900 | [diff] [blame] | 2746 | if (*dma_addr == DMA_ERROR_CODE) { |
Jiri Slaby | 367d04c | 2009-05-28 09:54:48 +0200 | [diff] [blame] | 2747 | spin_unlock_irqrestore(&domain->lock, flags); |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2748 | goto out_free; |
Jiri Slaby | 367d04c | 2009-05-28 09:54:48 +0200 | [diff] [blame] | 2749 | } |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2750 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2751 | domain_flush_complete(domain); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2752 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2753 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2754 | |
| 2755 | return virt_addr; |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2756 | |
| 2757 | out_free: |
| 2758 | |
| 2759 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 2760 | |
| 2761 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2762 | } |
| 2763 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2764 | /* |
| 2765 | * The exported free_coherent function for dma_ops. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2766 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2767 | static void free_coherent(struct device *dev, size_t size, |
| 2768 | void *virt_addr, dma_addr_t dma_addr) |
| 2769 | { |
| 2770 | unsigned long flags; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2771 | struct protection_domain *domain; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2772 | |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 2773 | INC_STATS_COUNTER(cnt_free_coherent); |
| 2774 | |
Joerg Roedel | 94f6d19 | 2009-11-24 16:40:02 +0100 | [diff] [blame] | 2775 | domain = get_domain(dev); |
| 2776 | if (IS_ERR(domain)) |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 2777 | goto free_mem; |
| 2778 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2779 | spin_lock_irqsave(&domain->lock, flags); |
| 2780 | |
Joerg Roedel | cd8c82e | 2009-11-23 19:33:56 +0100 | [diff] [blame] | 2781 | __unmap_single(domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2782 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 2783 | domain_flush_complete(domain); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 2784 | |
| 2785 | spin_unlock_irqrestore(&domain->lock, flags); |
| 2786 | |
| 2787 | free_mem: |
| 2788 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 2789 | } |
| 2790 | |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2791 | /* |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 2792 | * This function is called by the DMA layer to find out if we can handle a |
| 2793 | * particular device. It is part of the dma_ops. |
| 2794 | */ |
| 2795 | static int amd_iommu_dma_supported(struct device *dev, u64 mask) |
| 2796 | { |
Joerg Roedel | 420aef8 | 2009-11-23 16:14:57 +0100 | [diff] [blame] | 2797 | return check_device(dev); |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 2798 | } |
| 2799 | |
| 2800 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2801 | * The function for pre-allocating protection domains. |
| 2802 | * |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2803 | * If the driver core informs the DMA layer if a driver grabs a device |
| 2804 | * we don't need to preallocate the protection domains anymore. |
| 2805 | * For now we have to. |
| 2806 | */ |
Jaswinder Singh Rajput | 0e93dd8 | 2008-12-29 21:45:22 +0530 | [diff] [blame] | 2807 | static void prealloc_protection_domains(void) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2808 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2809 | struct iommu_dev_data *dev_data; |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2810 | struct dma_ops_domain *dma_dom; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2811 | struct pci_dev *dev = NULL; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2812 | u16 devid; |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2813 | |
Chris Wright | d18c69d | 2010-04-02 18:27:55 -0700 | [diff] [blame] | 2814 | for_each_pci_dev(dev) { |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2815 | |
| 2816 | /* Do we handle this device? */ |
| 2817 | if (!check_device(&dev->dev)) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2818 | continue; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2819 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2820 | dev_data = get_dev_data(&dev->dev); |
| 2821 | if (!amd_iommu_force_isolation && dev_data->iommu_v2) { |
| 2822 | /* Make sure passthrough domain is allocated */ |
| 2823 | alloc_passthrough_domain(); |
| 2824 | dev_data->passthrough = true; |
| 2825 | attach_device(&dev->dev, pt_domain); |
| 2826 | pr_info("AMD-Vi: Using passthough domain for device %s\n", |
| 2827 | dev_name(&dev->dev)); |
| 2828 | } |
| 2829 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2830 | /* Is there already any domain for it? */ |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2831 | if (domain_for_device(&dev->dev)) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2832 | continue; |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 2833 | |
| 2834 | devid = get_device_id(&dev->dev); |
| 2835 | |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 2836 | dma_dom = dma_ops_domain_alloc(); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2837 | if (!dma_dom) |
| 2838 | continue; |
| 2839 | init_unity_mappings_for_device(dma_dom, devid); |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 2840 | dma_dom->target_dev = devid; |
| 2841 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 2842 | attach_device(&dev->dev, &dma_dom->domain); |
Joerg Roedel | be83129 | 2009-11-23 12:50:00 +0100 | [diff] [blame] | 2843 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 2844 | list_add_tail(&dma_dom->list, &iommu_pd_list); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 2845 | } |
| 2846 | } |
| 2847 | |
FUJITA Tomonori | 160c1d8 | 2009-01-05 23:59:02 +0900 | [diff] [blame] | 2848 | static struct dma_map_ops amd_iommu_dma_ops = { |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2849 | .alloc_coherent = alloc_coherent, |
| 2850 | .free_coherent = free_coherent, |
FUJITA Tomonori | 5149136 | 2009-01-05 23:47:25 +0900 | [diff] [blame] | 2851 | .map_page = map_page, |
| 2852 | .unmap_page = unmap_page, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2853 | .map_sg = map_sg, |
| 2854 | .unmap_sg = unmap_sg, |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 2855 | .dma_supported = amd_iommu_dma_supported, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2856 | }; |
| 2857 | |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 2858 | static unsigned device_dma_ops_init(void) |
| 2859 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2860 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 2861 | struct pci_dev *pdev = NULL; |
| 2862 | unsigned unhandled = 0; |
| 2863 | |
| 2864 | for_each_pci_dev(pdev) { |
| 2865 | if (!check_device(&pdev->dev)) { |
| 2866 | unhandled += 1; |
| 2867 | continue; |
| 2868 | } |
| 2869 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 2870 | dev_data = get_dev_data(&pdev->dev); |
| 2871 | |
| 2872 | if (!dev_data->passthrough) |
| 2873 | pdev->dev.archdata.dma_ops = &amd_iommu_dma_ops; |
| 2874 | else |
| 2875 | pdev->dev.archdata.dma_ops = &nommu_dma_ops; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 2876 | } |
| 2877 | |
| 2878 | return unhandled; |
| 2879 | } |
| 2880 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2881 | /* |
| 2882 | * The function which clues the AMD IOMMU driver into dma_ops. |
| 2883 | */ |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 2884 | |
| 2885 | void __init amd_iommu_init_api(void) |
| 2886 | { |
Joerg Roedel | 2cc21c4 | 2011-09-06 17:56:07 +0200 | [diff] [blame] | 2887 | bus_set_iommu(&pci_bus_type, &amd_iommu_ops); |
Joerg Roedel | f532509 | 2010-01-22 17:44:35 +0100 | [diff] [blame] | 2888 | } |
| 2889 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2890 | int __init amd_iommu_init_dma_ops(void) |
| 2891 | { |
| 2892 | struct amd_iommu *iommu; |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 2893 | int ret, unhandled; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2894 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2895 | /* |
| 2896 | * first allocate a default protection domain for every IOMMU we |
| 2897 | * found in the system. Devices not assigned to any other |
| 2898 | * protection domain will be assigned to the default one. |
| 2899 | */ |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 2900 | for_each_iommu(iommu) { |
Joerg Roedel | 87a64d5 | 2009-11-24 17:26:43 +0100 | [diff] [blame] | 2901 | iommu->default_dom = dma_ops_domain_alloc(); |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2902 | if (iommu->default_dom == NULL) |
| 2903 | return -ENOMEM; |
Joerg Roedel | e2dc14a | 2008-12-10 18:48:59 +0100 | [diff] [blame] | 2904 | iommu->default_dom->domain.flags |= PD_DEFAULT_MASK; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2905 | ret = iommu_init_unity_mappings(iommu); |
| 2906 | if (ret) |
| 2907 | goto free_domains; |
| 2908 | } |
| 2909 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2910 | /* |
Joerg Roedel | 8793abe | 2009-11-27 11:40:33 +0100 | [diff] [blame] | 2911 | * Pre-allocate the protection domains for each device. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2912 | */ |
Joerg Roedel | 8793abe | 2009-11-27 11:40:33 +0100 | [diff] [blame] | 2913 | prealloc_protection_domains(); |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2914 | |
| 2915 | iommu_detected = 1; |
FUJITA Tomonori | 75f1cdf | 2009-11-10 19:46:20 +0900 | [diff] [blame] | 2916 | swiotlb = 0; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2917 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 2918 | /* Make the driver finally visible to the drivers */ |
Joerg Roedel | 27c2127 | 2011-05-30 15:56:24 +0200 | [diff] [blame] | 2919 | unhandled = device_dma_ops_init(); |
| 2920 | if (unhandled && max_pfn > MAX_DMA32_PFN) { |
| 2921 | /* There are unhandled devices - initialize swiotlb for them */ |
| 2922 | swiotlb = 1; |
| 2923 | } |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2924 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 2925 | amd_iommu_stats_init(); |
| 2926 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2927 | return 0; |
| 2928 | |
| 2929 | free_domains: |
| 2930 | |
Joerg Roedel | 3bd2217 | 2009-05-04 15:06:20 +0200 | [diff] [blame] | 2931 | for_each_iommu(iommu) { |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 2932 | if (iommu->default_dom) |
| 2933 | dma_ops_domain_free(iommu->default_dom); |
| 2934 | } |
| 2935 | |
| 2936 | return ret; |
| 2937 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2938 | |
| 2939 | /***************************************************************************** |
| 2940 | * |
| 2941 | * The following functions belong to the exported interface of AMD IOMMU |
| 2942 | * |
| 2943 | * This interface allows access to lower level functions of the IOMMU |
| 2944 | * like protection domain handling and assignement of devices to domains |
| 2945 | * which is not possible with the dma_ops interface. |
| 2946 | * |
| 2947 | *****************************************************************************/ |
| 2948 | |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2949 | static void cleanup_domain(struct protection_domain *domain) |
| 2950 | { |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 2951 | struct iommu_dev_data *dev_data, *next; |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2952 | unsigned long flags; |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2953 | |
| 2954 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 2955 | |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 2956 | list_for_each_entry_safe(dev_data, next, &domain->dev_list, list) { |
Joerg Roedel | ec9e79e | 2011-06-09 17:25:50 +0200 | [diff] [blame] | 2957 | __detach_device(dev_data); |
Joerg Roedel | 492667d | 2009-11-27 13:25:47 +0100 | [diff] [blame] | 2958 | atomic_set(&dev_data->bind, 0); |
| 2959 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 2960 | |
| 2961 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 2962 | } |
| 2963 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2964 | static void protection_domain_free(struct protection_domain *domain) |
| 2965 | { |
| 2966 | if (!domain) |
| 2967 | return; |
| 2968 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 2969 | del_domain_from_list(domain); |
| 2970 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2971 | if (domain->id) |
| 2972 | domain_id_free(domain->id); |
| 2973 | |
| 2974 | kfree(domain); |
| 2975 | } |
| 2976 | |
| 2977 | static struct protection_domain *protection_domain_alloc(void) |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 2978 | { |
| 2979 | struct protection_domain *domain; |
| 2980 | |
| 2981 | domain = kzalloc(sizeof(*domain), GFP_KERNEL); |
| 2982 | if (!domain) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2983 | return NULL; |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 2984 | |
| 2985 | spin_lock_init(&domain->lock); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 2986 | mutex_init(&domain->api_lock); |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 2987 | domain->id = domain_id_alloc(); |
| 2988 | if (!domain->id) |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2989 | goto out_err; |
Joerg Roedel | 7c392cb | 2009-11-26 11:13:32 +0100 | [diff] [blame] | 2990 | INIT_LIST_HEAD(&domain->dev_list); |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2991 | |
Joerg Roedel | aeb26f5 | 2009-11-20 16:44:01 +0100 | [diff] [blame] | 2992 | add_domain_to_list(domain); |
| 2993 | |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 2994 | return domain; |
| 2995 | |
| 2996 | out_err: |
| 2997 | kfree(domain); |
| 2998 | |
| 2999 | return NULL; |
| 3000 | } |
| 3001 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3002 | static int __init alloc_passthrough_domain(void) |
| 3003 | { |
| 3004 | if (pt_domain != NULL) |
| 3005 | return 0; |
| 3006 | |
| 3007 | /* allocate passthrough domain */ |
| 3008 | pt_domain = protection_domain_alloc(); |
| 3009 | if (!pt_domain) |
| 3010 | return -ENOMEM; |
| 3011 | |
| 3012 | pt_domain->mode = PAGE_MODE_NONE; |
| 3013 | |
| 3014 | return 0; |
| 3015 | } |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3016 | static int amd_iommu_domain_init(struct iommu_domain *dom) |
| 3017 | { |
| 3018 | struct protection_domain *domain; |
| 3019 | |
| 3020 | domain = protection_domain_alloc(); |
| 3021 | if (!domain) |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3022 | goto out_free; |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3023 | |
| 3024 | domain->mode = PAGE_MODE_3_LEVEL; |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3025 | domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
| 3026 | if (!domain->pt_root) |
| 3027 | goto out_free; |
| 3028 | |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3029 | domain->iommu_domain = dom; |
| 3030 | |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3031 | dom->priv = domain; |
| 3032 | |
| 3033 | return 0; |
| 3034 | |
| 3035 | out_free: |
Joerg Roedel | 2650815 | 2009-08-26 16:52:40 +0200 | [diff] [blame] | 3036 | protection_domain_free(domain); |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 3037 | |
| 3038 | return -ENOMEM; |
| 3039 | } |
| 3040 | |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3041 | static void amd_iommu_domain_destroy(struct iommu_domain *dom) |
| 3042 | { |
| 3043 | struct protection_domain *domain = dom->priv; |
| 3044 | |
| 3045 | if (!domain) |
| 3046 | return; |
| 3047 | |
| 3048 | if (domain->dev_cnt > 0) |
| 3049 | cleanup_domain(domain); |
| 3050 | |
| 3051 | BUG_ON(domain->dev_cnt != 0); |
| 3052 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3053 | if (domain->mode != PAGE_MODE_NONE) |
| 3054 | free_pagetable(domain); |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3055 | |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3056 | if (domain->flags & PD_IOMMUV2_MASK) |
| 3057 | free_gcr3_table(domain); |
| 3058 | |
Joerg Roedel | 8b408fe | 2010-03-08 14:20:07 +0100 | [diff] [blame] | 3059 | protection_domain_free(domain); |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 3060 | |
| 3061 | dom->priv = NULL; |
| 3062 | } |
| 3063 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3064 | static void amd_iommu_detach_device(struct iommu_domain *dom, |
| 3065 | struct device *dev) |
| 3066 | { |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3067 | struct iommu_dev_data *dev_data = dev->archdata.iommu; |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3068 | struct amd_iommu *iommu; |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3069 | u16 devid; |
| 3070 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3071 | if (!check_device(dev)) |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3072 | return; |
| 3073 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3074 | devid = get_device_id(dev); |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3075 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3076 | if (dev_data->domain != NULL) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3077 | detach_device(dev); |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3078 | |
| 3079 | iommu = amd_iommu_rlookup_table[devid]; |
| 3080 | if (!iommu) |
| 3081 | return; |
| 3082 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 3083 | iommu_completion_wait(iommu); |
| 3084 | } |
| 3085 | |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3086 | static int amd_iommu_attach_device(struct iommu_domain *dom, |
| 3087 | struct device *dev) |
| 3088 | { |
| 3089 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3090 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3091 | struct amd_iommu *iommu; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3092 | int ret; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3093 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3094 | if (!check_device(dev)) |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3095 | return -EINVAL; |
| 3096 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3097 | dev_data = dev->archdata.iommu; |
| 3098 | |
Joerg Roedel | f62dda6 | 2011-06-09 12:55:35 +0200 | [diff] [blame] | 3099 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3100 | if (!iommu) |
| 3101 | return -EINVAL; |
| 3102 | |
Joerg Roedel | 657cbb6 | 2009-11-23 15:26:46 +0100 | [diff] [blame] | 3103 | if (dev_data->domain) |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3104 | detach_device(dev); |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3105 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3106 | ret = attach_device(dev, domain); |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3107 | |
| 3108 | iommu_completion_wait(iommu); |
| 3109 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3110 | return ret; |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 3111 | } |
| 3112 | |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3113 | static int amd_iommu_map(struct iommu_domain *dom, unsigned long iova, |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3114 | phys_addr_t paddr, size_t page_size, int iommu_prot) |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3115 | { |
| 3116 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3117 | int prot = 0; |
| 3118 | int ret; |
| 3119 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3120 | if (domain->mode == PAGE_MODE_NONE) |
| 3121 | return -EINVAL; |
| 3122 | |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3123 | if (iommu_prot & IOMMU_READ) |
| 3124 | prot |= IOMMU_PROT_IR; |
| 3125 | if (iommu_prot & IOMMU_WRITE) |
| 3126 | prot |= IOMMU_PROT_IW; |
| 3127 | |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3128 | mutex_lock(&domain->api_lock); |
Joerg Roedel | 795e74f | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3129 | ret = iommu_map_page(domain, iova, paddr, prot, page_size); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3130 | mutex_unlock(&domain->api_lock); |
| 3131 | |
Joerg Roedel | 795e74f | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3132 | return ret; |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 3133 | } |
| 3134 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3135 | static size_t amd_iommu_unmap(struct iommu_domain *dom, unsigned long iova, |
| 3136 | size_t page_size) |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3137 | { |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3138 | struct protection_domain *domain = dom->priv; |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3139 | size_t unmap_size; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3140 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3141 | if (domain->mode == PAGE_MODE_NONE) |
| 3142 | return -EINVAL; |
| 3143 | |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3144 | mutex_lock(&domain->api_lock); |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3145 | unmap_size = iommu_unmap_page(domain, iova, page_size); |
Joerg Roedel | 795e74f | 2010-05-11 17:40:57 +0200 | [diff] [blame] | 3146 | mutex_unlock(&domain->api_lock); |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3147 | |
Joerg Roedel | 17b124b | 2011-04-06 18:01:35 +0200 | [diff] [blame] | 3148 | domain_flush_tlb_pde(domain); |
Joerg Roedel | 5d214fe | 2010-02-08 14:44:49 +0100 | [diff] [blame] | 3149 | |
Ohad Ben-Cohen | 5009065 | 2011-11-10 11:32:25 +0200 | [diff] [blame] | 3150 | return unmap_size; |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 3151 | } |
| 3152 | |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3153 | static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, |
| 3154 | unsigned long iova) |
| 3155 | { |
| 3156 | struct protection_domain *domain = dom->priv; |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3157 | unsigned long offset_mask; |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3158 | phys_addr_t paddr; |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3159 | u64 *pte, __pte; |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3160 | |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3161 | if (domain->mode == PAGE_MODE_NONE) |
| 3162 | return iova; |
| 3163 | |
Joerg Roedel | 24cd772 | 2010-01-19 17:27:39 +0100 | [diff] [blame] | 3164 | pte = fetch_pte(domain, iova); |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3165 | |
Joerg Roedel | a6d41a4 | 2009-09-02 17:08:55 +0200 | [diff] [blame] | 3166 | if (!pte || !IOMMU_PTE_PRESENT(*pte)) |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3167 | return 0; |
| 3168 | |
Joerg Roedel | f03152b | 2010-01-21 16:15:24 +0100 | [diff] [blame] | 3169 | if (PM_PTE_LEVEL(*pte) == 0) |
| 3170 | offset_mask = PAGE_SIZE - 1; |
| 3171 | else |
| 3172 | offset_mask = PTE_PAGE_SIZE(*pte) - 1; |
| 3173 | |
| 3174 | __pte = *pte & PM_ADDR_MASK; |
| 3175 | paddr = (__pte & ~offset_mask) | (iova & offset_mask); |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 3176 | |
| 3177 | return paddr; |
| 3178 | } |
| 3179 | |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3180 | static int amd_iommu_domain_has_cap(struct iommu_domain *domain, |
| 3181 | unsigned long cap) |
| 3182 | { |
Joerg Roedel | 80a506b | 2010-07-27 17:14:24 +0200 | [diff] [blame] | 3183 | switch (cap) { |
| 3184 | case IOMMU_CAP_CACHE_COHERENCY: |
| 3185 | return 1; |
| 3186 | } |
| 3187 | |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3188 | return 0; |
| 3189 | } |
| 3190 | |
Alex Williamson | 8fbdce6 | 2011-10-21 15:56:18 -0400 | [diff] [blame] | 3191 | static int amd_iommu_device_group(struct device *dev, unsigned int *groupid) |
| 3192 | { |
| 3193 | struct iommu_dev_data *dev_data = dev->archdata.iommu; |
Alex Williamson | bcb71ab | 2011-10-21 15:56:24 -0400 | [diff] [blame] | 3194 | struct pci_dev *pdev = to_pci_dev(dev); |
| 3195 | u16 devid; |
Alex Williamson | 8fbdce6 | 2011-10-21 15:56:18 -0400 | [diff] [blame] | 3196 | |
| 3197 | if (!dev_data) |
| 3198 | return -ENODEV; |
| 3199 | |
Alex Williamson | bcb71ab | 2011-10-21 15:56:24 -0400 | [diff] [blame] | 3200 | if (pdev->is_virtfn || !iommu_group_mf) |
| 3201 | devid = dev_data->devid; |
| 3202 | else |
| 3203 | devid = calc_devid(pdev->bus->number, |
| 3204 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 0)); |
| 3205 | |
| 3206 | *groupid = amd_iommu_alias_table[devid]; |
Alex Williamson | 8fbdce6 | 2011-10-21 15:56:18 -0400 | [diff] [blame] | 3207 | |
| 3208 | return 0; |
| 3209 | } |
| 3210 | |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3211 | static struct iommu_ops amd_iommu_ops = { |
| 3212 | .domain_init = amd_iommu_domain_init, |
| 3213 | .domain_destroy = amd_iommu_domain_destroy, |
| 3214 | .attach_dev = amd_iommu_attach_device, |
| 3215 | .detach_dev = amd_iommu_detach_device, |
Joerg Roedel | 468e236 | 2010-01-21 16:37:36 +0100 | [diff] [blame] | 3216 | .map = amd_iommu_map, |
| 3217 | .unmap = amd_iommu_unmap, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3218 | .iova_to_phys = amd_iommu_iova_to_phys, |
Sheng Yang | dbb9fd8 | 2009-03-18 15:33:06 +0800 | [diff] [blame] | 3219 | .domain_has_cap = amd_iommu_domain_has_cap, |
Alex Williamson | 8fbdce6 | 2011-10-21 15:56:18 -0400 | [diff] [blame] | 3220 | .device_group = amd_iommu_device_group, |
Ohad Ben-Cohen | aa3de9c | 2011-11-10 11:32:29 +0200 | [diff] [blame] | 3221 | .pgsize_bitmap = AMD_IOMMU_PGSIZES, |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 3222 | }; |
| 3223 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3224 | /***************************************************************************** |
| 3225 | * |
| 3226 | * The next functions do a basic initialization of IOMMU for pass through |
| 3227 | * mode |
| 3228 | * |
| 3229 | * In passthrough mode the IOMMU is initialized and enabled but not used for |
| 3230 | * DMA-API translation. |
| 3231 | * |
| 3232 | *****************************************************************************/ |
| 3233 | |
| 3234 | int __init amd_iommu_init_passthrough(void) |
| 3235 | { |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3236 | struct iommu_dev_data *dev_data; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3237 | struct pci_dev *dev = NULL; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3238 | struct amd_iommu *iommu; |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3239 | u16 devid; |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3240 | int ret; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3241 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3242 | ret = alloc_passthrough_domain(); |
| 3243 | if (ret) |
| 3244 | return ret; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3245 | |
Kulikov Vasiliy | 6c54aab | 2010-07-03 12:03:51 -0400 | [diff] [blame] | 3246 | for_each_pci_dev(dev) { |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3247 | if (!check_device(&dev->dev)) |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3248 | continue; |
| 3249 | |
Joerg Roedel | 5abcdba | 2011-12-01 15:49:45 +0100 | [diff] [blame] | 3250 | dev_data = get_dev_data(&dev->dev); |
| 3251 | dev_data->passthrough = true; |
| 3252 | |
Joerg Roedel | 98fc5a6 | 2009-11-24 17:19:23 +0100 | [diff] [blame] | 3253 | devid = get_device_id(&dev->dev); |
| 3254 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3255 | iommu = amd_iommu_rlookup_table[devid]; |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3256 | if (!iommu) |
| 3257 | continue; |
| 3258 | |
Joerg Roedel | 15898bb | 2009-11-24 15:39:42 +0100 | [diff] [blame] | 3259 | attach_device(&dev->dev, pt_domain); |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3260 | } |
| 3261 | |
Joerg Roedel | 2655d7a | 2011-12-22 12:35:38 +0100 | [diff] [blame] | 3262 | amd_iommu_stats_init(); |
| 3263 | |
Joerg Roedel | 0feae53 | 2009-08-26 15:26:30 +0200 | [diff] [blame] | 3264 | pr_info("AMD-Vi: Initialized for Passthrough Mode\n"); |
| 3265 | |
| 3266 | return 0; |
| 3267 | } |
Joerg Roedel | 72e1dcc | 2011-11-10 19:13:51 +0100 | [diff] [blame] | 3268 | |
| 3269 | /* IOMMUv2 specific functions */ |
| 3270 | int amd_iommu_register_ppr_notifier(struct notifier_block *nb) |
| 3271 | { |
| 3272 | return atomic_notifier_chain_register(&ppr_notifier, nb); |
| 3273 | } |
| 3274 | EXPORT_SYMBOL(amd_iommu_register_ppr_notifier); |
| 3275 | |
| 3276 | int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb) |
| 3277 | { |
| 3278 | return atomic_notifier_chain_unregister(&ppr_notifier, nb); |
| 3279 | } |
| 3280 | EXPORT_SYMBOL(amd_iommu_unregister_ppr_notifier); |
Joerg Roedel | 132bd68 | 2011-11-17 14:18:46 +0100 | [diff] [blame] | 3281 | |
| 3282 | void amd_iommu_domain_direct_map(struct iommu_domain *dom) |
| 3283 | { |
| 3284 | struct protection_domain *domain = dom->priv; |
| 3285 | unsigned long flags; |
| 3286 | |
| 3287 | spin_lock_irqsave(&domain->lock, flags); |
| 3288 | |
| 3289 | /* Update data structure */ |
| 3290 | domain->mode = PAGE_MODE_NONE; |
| 3291 | domain->updated = true; |
| 3292 | |
| 3293 | /* Make changes visible to IOMMUs */ |
| 3294 | update_domain(domain); |
| 3295 | |
| 3296 | /* Page-table is not visible to IOMMU anymore, so free it */ |
| 3297 | free_pagetable(domain); |
| 3298 | |
| 3299 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3300 | } |
| 3301 | EXPORT_SYMBOL(amd_iommu_domain_direct_map); |
Joerg Roedel | 52815b7 | 2011-11-17 17:24:28 +0100 | [diff] [blame] | 3302 | |
| 3303 | int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids) |
| 3304 | { |
| 3305 | struct protection_domain *domain = dom->priv; |
| 3306 | unsigned long flags; |
| 3307 | int levels, ret; |
| 3308 | |
| 3309 | if (pasids <= 0 || pasids > (PASID_MASK + 1)) |
| 3310 | return -EINVAL; |
| 3311 | |
| 3312 | /* Number of GCR3 table levels required */ |
| 3313 | for (levels = 0; (pasids - 1) & ~0x1ff; pasids >>= 9) |
| 3314 | levels += 1; |
| 3315 | |
| 3316 | if (levels > amd_iommu_max_glx_val) |
| 3317 | return -EINVAL; |
| 3318 | |
| 3319 | spin_lock_irqsave(&domain->lock, flags); |
| 3320 | |
| 3321 | /* |
| 3322 | * Save us all sanity checks whether devices already in the |
| 3323 | * domain support IOMMUv2. Just force that the domain has no |
| 3324 | * devices attached when it is switched into IOMMUv2 mode. |
| 3325 | */ |
| 3326 | ret = -EBUSY; |
| 3327 | if (domain->dev_cnt > 0 || domain->flags & PD_IOMMUV2_MASK) |
| 3328 | goto out; |
| 3329 | |
| 3330 | ret = -ENOMEM; |
| 3331 | domain->gcr3_tbl = (void *)get_zeroed_page(GFP_ATOMIC); |
| 3332 | if (domain->gcr3_tbl == NULL) |
| 3333 | goto out; |
| 3334 | |
| 3335 | domain->glx = levels; |
| 3336 | domain->flags |= PD_IOMMUV2_MASK; |
| 3337 | domain->updated = true; |
| 3338 | |
| 3339 | update_domain(domain); |
| 3340 | |
| 3341 | ret = 0; |
| 3342 | |
| 3343 | out: |
| 3344 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3345 | |
| 3346 | return ret; |
| 3347 | } |
| 3348 | EXPORT_SYMBOL(amd_iommu_domain_enable_v2); |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3349 | |
| 3350 | static int __flush_pasid(struct protection_domain *domain, int pasid, |
| 3351 | u64 address, bool size) |
| 3352 | { |
| 3353 | struct iommu_dev_data *dev_data; |
| 3354 | struct iommu_cmd cmd; |
| 3355 | int i, ret; |
| 3356 | |
| 3357 | if (!(domain->flags & PD_IOMMUV2_MASK)) |
| 3358 | return -EINVAL; |
| 3359 | |
| 3360 | build_inv_iommu_pasid(&cmd, domain->id, pasid, address, size); |
| 3361 | |
| 3362 | /* |
| 3363 | * IOMMU TLB needs to be flushed before Device TLB to |
| 3364 | * prevent device TLB refill from IOMMU TLB |
| 3365 | */ |
| 3366 | for (i = 0; i < amd_iommus_present; ++i) { |
| 3367 | if (domain->dev_iommu[i] == 0) |
| 3368 | continue; |
| 3369 | |
| 3370 | ret = iommu_queue_command(amd_iommus[i], &cmd); |
| 3371 | if (ret != 0) |
| 3372 | goto out; |
| 3373 | } |
| 3374 | |
| 3375 | /* Wait until IOMMU TLB flushes are complete */ |
| 3376 | domain_flush_complete(domain); |
| 3377 | |
| 3378 | /* Now flush device TLBs */ |
| 3379 | list_for_each_entry(dev_data, &domain->dev_list, list) { |
| 3380 | struct amd_iommu *iommu; |
| 3381 | int qdep; |
| 3382 | |
| 3383 | BUG_ON(!dev_data->ats.enabled); |
| 3384 | |
| 3385 | qdep = dev_data->ats.qdep; |
| 3386 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 3387 | |
| 3388 | build_inv_iotlb_pasid(&cmd, dev_data->devid, pasid, |
| 3389 | qdep, address, size); |
| 3390 | |
| 3391 | ret = iommu_queue_command(iommu, &cmd); |
| 3392 | if (ret != 0) |
| 3393 | goto out; |
| 3394 | } |
| 3395 | |
| 3396 | /* Wait until all device TLBs are flushed */ |
| 3397 | domain_flush_complete(domain); |
| 3398 | |
| 3399 | ret = 0; |
| 3400 | |
| 3401 | out: |
| 3402 | |
| 3403 | return ret; |
| 3404 | } |
| 3405 | |
| 3406 | static int __amd_iommu_flush_page(struct protection_domain *domain, int pasid, |
| 3407 | u64 address) |
| 3408 | { |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3409 | INC_STATS_COUNTER(invalidate_iotlb); |
| 3410 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3411 | return __flush_pasid(domain, pasid, address, false); |
| 3412 | } |
| 3413 | |
| 3414 | int amd_iommu_flush_page(struct iommu_domain *dom, int pasid, |
| 3415 | u64 address) |
| 3416 | { |
| 3417 | struct protection_domain *domain = dom->priv; |
| 3418 | unsigned long flags; |
| 3419 | int ret; |
| 3420 | |
| 3421 | spin_lock_irqsave(&domain->lock, flags); |
| 3422 | ret = __amd_iommu_flush_page(domain, pasid, address); |
| 3423 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3424 | |
| 3425 | return ret; |
| 3426 | } |
| 3427 | EXPORT_SYMBOL(amd_iommu_flush_page); |
| 3428 | |
| 3429 | static int __amd_iommu_flush_tlb(struct protection_domain *domain, int pasid) |
| 3430 | { |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3431 | INC_STATS_COUNTER(invalidate_iotlb_all); |
| 3432 | |
Joerg Roedel | 22e266c | 2011-11-21 15:59:08 +0100 | [diff] [blame] | 3433 | return __flush_pasid(domain, pasid, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 3434 | true); |
| 3435 | } |
| 3436 | |
| 3437 | int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid) |
| 3438 | { |
| 3439 | struct protection_domain *domain = dom->priv; |
| 3440 | unsigned long flags; |
| 3441 | int ret; |
| 3442 | |
| 3443 | spin_lock_irqsave(&domain->lock, flags); |
| 3444 | ret = __amd_iommu_flush_tlb(domain, pasid); |
| 3445 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3446 | |
| 3447 | return ret; |
| 3448 | } |
| 3449 | EXPORT_SYMBOL(amd_iommu_flush_tlb); |
| 3450 | |
Joerg Roedel | b16137b | 2011-11-21 16:50:23 +0100 | [diff] [blame] | 3451 | static u64 *__get_gcr3_pte(u64 *root, int level, int pasid, bool alloc) |
| 3452 | { |
| 3453 | int index; |
| 3454 | u64 *pte; |
| 3455 | |
| 3456 | while (true) { |
| 3457 | |
| 3458 | index = (pasid >> (9 * level)) & 0x1ff; |
| 3459 | pte = &root[index]; |
| 3460 | |
| 3461 | if (level == 0) |
| 3462 | break; |
| 3463 | |
| 3464 | if (!(*pte & GCR3_VALID)) { |
| 3465 | if (!alloc) |
| 3466 | return NULL; |
| 3467 | |
| 3468 | root = (void *)get_zeroed_page(GFP_ATOMIC); |
| 3469 | if (root == NULL) |
| 3470 | return NULL; |
| 3471 | |
| 3472 | *pte = __pa(root) | GCR3_VALID; |
| 3473 | } |
| 3474 | |
| 3475 | root = __va(*pte & PAGE_MASK); |
| 3476 | |
| 3477 | level -= 1; |
| 3478 | } |
| 3479 | |
| 3480 | return pte; |
| 3481 | } |
| 3482 | |
| 3483 | static int __set_gcr3(struct protection_domain *domain, int pasid, |
| 3484 | unsigned long cr3) |
| 3485 | { |
| 3486 | u64 *pte; |
| 3487 | |
| 3488 | if (domain->mode != PAGE_MODE_NONE) |
| 3489 | return -EINVAL; |
| 3490 | |
| 3491 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, true); |
| 3492 | if (pte == NULL) |
| 3493 | return -ENOMEM; |
| 3494 | |
| 3495 | *pte = (cr3 & PAGE_MASK) | GCR3_VALID; |
| 3496 | |
| 3497 | return __amd_iommu_flush_tlb(domain, pasid); |
| 3498 | } |
| 3499 | |
| 3500 | static int __clear_gcr3(struct protection_domain *domain, int pasid) |
| 3501 | { |
| 3502 | u64 *pte; |
| 3503 | |
| 3504 | if (domain->mode != PAGE_MODE_NONE) |
| 3505 | return -EINVAL; |
| 3506 | |
| 3507 | pte = __get_gcr3_pte(domain->gcr3_tbl, domain->glx, pasid, false); |
| 3508 | if (pte == NULL) |
| 3509 | return 0; |
| 3510 | |
| 3511 | *pte = 0; |
| 3512 | |
| 3513 | return __amd_iommu_flush_tlb(domain, pasid); |
| 3514 | } |
| 3515 | |
| 3516 | int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, |
| 3517 | unsigned long cr3) |
| 3518 | { |
| 3519 | struct protection_domain *domain = dom->priv; |
| 3520 | unsigned long flags; |
| 3521 | int ret; |
| 3522 | |
| 3523 | spin_lock_irqsave(&domain->lock, flags); |
| 3524 | ret = __set_gcr3(domain, pasid, cr3); |
| 3525 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3526 | |
| 3527 | return ret; |
| 3528 | } |
| 3529 | EXPORT_SYMBOL(amd_iommu_domain_set_gcr3); |
| 3530 | |
| 3531 | int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid) |
| 3532 | { |
| 3533 | struct protection_domain *domain = dom->priv; |
| 3534 | unsigned long flags; |
| 3535 | int ret; |
| 3536 | |
| 3537 | spin_lock_irqsave(&domain->lock, flags); |
| 3538 | ret = __clear_gcr3(domain, pasid); |
| 3539 | spin_unlock_irqrestore(&domain->lock, flags); |
| 3540 | |
| 3541 | return ret; |
| 3542 | } |
| 3543 | EXPORT_SYMBOL(amd_iommu_domain_clear_gcr3); |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 3544 | |
| 3545 | int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid, |
| 3546 | int status, int tag) |
| 3547 | { |
| 3548 | struct iommu_dev_data *dev_data; |
| 3549 | struct amd_iommu *iommu; |
| 3550 | struct iommu_cmd cmd; |
| 3551 | |
Joerg Roedel | 399be2f | 2011-12-01 16:53:47 +0100 | [diff] [blame] | 3552 | INC_STATS_COUNTER(complete_ppr); |
| 3553 | |
Joerg Roedel | c99afa2 | 2011-11-21 18:19:25 +0100 | [diff] [blame] | 3554 | dev_data = get_dev_data(&pdev->dev); |
| 3555 | iommu = amd_iommu_rlookup_table[dev_data->devid]; |
| 3556 | |
| 3557 | build_complete_ppr(&cmd, dev_data->devid, pasid, status, |
| 3558 | tag, dev_data->pri_tlp); |
| 3559 | |
| 3560 | return iommu_queue_command(iommu, &cmd); |
| 3561 | } |
| 3562 | EXPORT_SYMBOL(amd_iommu_complete_ppr); |
Joerg Roedel | f3572db | 2011-11-23 12:36:25 +0100 | [diff] [blame] | 3563 | |
| 3564 | struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev) |
| 3565 | { |
| 3566 | struct protection_domain *domain; |
| 3567 | |
| 3568 | domain = get_domain(&pdev->dev); |
| 3569 | if (IS_ERR(domain)) |
| 3570 | return NULL; |
| 3571 | |
| 3572 | /* Only return IOMMUv2 domains */ |
| 3573 | if (!(domain->flags & PD_IOMMUV2_MASK)) |
| 3574 | return NULL; |
| 3575 | |
| 3576 | return domain->iommu_domain; |
| 3577 | } |
| 3578 | EXPORT_SYMBOL(amd_iommu_get_v2_domain); |
Joerg Roedel | 6a113dd | 2011-12-01 12:04:58 +0100 | [diff] [blame] | 3579 | |
| 3580 | void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum) |
| 3581 | { |
| 3582 | struct iommu_dev_data *dev_data; |
| 3583 | |
| 3584 | if (!amd_iommu_v2_supported()) |
| 3585 | return; |
| 3586 | |
| 3587 | dev_data = get_dev_data(&pdev->dev); |
| 3588 | dev_data->errata |= (1 << erratum); |
| 3589 | } |
| 3590 | EXPORT_SYMBOL(amd_iommu_enable_device_erratum); |
Joerg Roedel | 52efdb8 | 2011-12-07 12:01:36 +0100 | [diff] [blame] | 3591 | |
| 3592 | int amd_iommu_device_info(struct pci_dev *pdev, |
| 3593 | struct amd_iommu_device_info *info) |
| 3594 | { |
| 3595 | int max_pasids; |
| 3596 | int pos; |
| 3597 | |
| 3598 | if (pdev == NULL || info == NULL) |
| 3599 | return -EINVAL; |
| 3600 | |
| 3601 | if (!amd_iommu_v2_supported()) |
| 3602 | return -EINVAL; |
| 3603 | |
| 3604 | memset(info, 0, sizeof(*info)); |
| 3605 | |
| 3606 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ATS); |
| 3607 | if (pos) |
| 3608 | info->flags |= AMD_IOMMU_DEVICE_FLAG_ATS_SUP; |
| 3609 | |
| 3610 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
| 3611 | if (pos) |
| 3612 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PRI_SUP; |
| 3613 | |
| 3614 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
| 3615 | if (pos) { |
| 3616 | int features; |
| 3617 | |
| 3618 | max_pasids = 1 << (9 * (amd_iommu_max_glx_val + 1)); |
| 3619 | max_pasids = min(max_pasids, (1 << 20)); |
| 3620 | |
| 3621 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PASID_SUP; |
| 3622 | info->max_pasids = min(pci_max_pasids(pdev), max_pasids); |
| 3623 | |
| 3624 | features = pci_pasid_features(pdev); |
| 3625 | if (features & PCI_PASID_CAP_EXEC) |
| 3626 | info->flags |= AMD_IOMMU_DEVICE_FLAG_EXEC_SUP; |
| 3627 | if (features & PCI_PASID_CAP_PRIV) |
| 3628 | info->flags |= AMD_IOMMU_DEVICE_FLAG_PRIV_SUP; |
| 3629 | } |
| 3630 | |
| 3631 | return 0; |
| 3632 | } |
| 3633 | EXPORT_SYMBOL(amd_iommu_device_info); |