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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_MPSPEC_H
2#define _ASM_X86_MPSPEC_H
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +01003
Ingo Molnar86c98352008-03-28 11:59:57 +01004#include <linux/init.h>
5
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +01006#include <asm/mpspec_def.h>
7
Yinghai Lu114945472008-08-21 01:01:19 -07008extern int apic_version[MAX_APICS];
Jaswinder Singh Rajputa1ae2992008-12-29 20:32:52 +05309extern int pic_mode;
Yinghai Lu114945472008-08-21 01:01:19 -070010
Thomas Gleixner96a388d2007-10-11 11:20:03 +020011#ifdef CONFIG_X86_32
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010012#include <mach_mpspec.h>
13
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010014extern unsigned int def_to_bigsmp;
Thomas Gleixnerae9d9832008-01-30 13:30:36 +010015extern u8 apicid_2_node[];
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010016
Yinghai Lud49c4282008-06-08 18:31:54 -070017#ifdef CONFIG_X86_NUMAQ
18extern int mp_bus_id_to_node[MAX_MP_BUSSES];
19extern int mp_bus_id_to_local[MAX_MP_BUSSES];
20extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
21#endif
22
Thomas Gleixnerae9d9832008-01-30 13:30:36 +010023#define MAX_APICID 256
24
Thomas Gleixner96a388d2007-10-11 11:20:03 +020025#else
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010026
27#define MAX_MP_BUSSES 256
28/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
29#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
30
Yinghai Luab530e12008-06-03 10:25:54 -070031#endif
32
Yinghai Lu8643f9d2008-02-19 03:21:06 -080033extern void early_find_smp_config(void);
34extern void early_get_smp_config(void);
35
Alexey Starikovskiyc0a282c2008-03-20 14:55:02 +030036#if defined(CONFIG_MCA) || defined(CONFIG_EISA)
37extern int mp_bus_id_to_type[MAX_MP_BUSSES];
38#endif
39
Alexey Starikovskiya6333c32008-03-20 14:54:09 +030040extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
Alexey Starikovskiyc0a282c2008-03-20 14:55:02 +030041
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010042extern unsigned int boot_cpu_physical_apicid;
Yinghai Lue0da3362008-06-08 18:29:22 -070043extern unsigned int max_physical_apicid;
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010044extern int smp_found_config;
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010045extern int mpc_default_type;
46extern unsigned long mp_lapic_addr;
47
48extern void find_smp_config(void);
49extern void get_smp_config(void);
Ingo Molnaraf1cf202008-05-25 21:16:06 +020050#ifdef CONFIG_X86_MPPARSE
Yinghai Lu2944e162008-06-01 13:17:38 -070051extern void early_reserve_e820_mpc_new(void);
Ingo Molnaraf1cf202008-05-25 21:16:06 +020052#else
53static inline void early_reserve_e820_mpc_new(void) { }
54#endif
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010055
Alexey Starikovskiy903dcb52008-03-27 23:55:22 +030056void __cpuinit generic_processor_info(int apicid, int version);
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010057#ifdef CONFIG_ACPI
Jack Steinera65d1d62008-03-28 14:12:08 -050058extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010059extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
60 u32 gsi);
61extern void mp_config_acpi_legacy_irqs(void);
62extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
Ingo Molnar835fc942008-06-03 14:42:06 +020063#ifdef CONFIG_X86_IO_APIC
Yinghai Lu2944e162008-06-01 13:17:38 -070064extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
65 u32 gsi, int triggering, int polarity);
Ingo Molnar835fc942008-06-03 14:42:06 +020066#else
67static inline int
68mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
69 u32 gsi, int triggering, int polarity)
70{
71 return 0;
72}
73#endif
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010074#endif /* CONFIG_ACPI */
75
76#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
77
Joe Perches30971e12008-03-23 01:02:49 -070078struct physid_mask {
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010079 unsigned long mask[PHYSID_ARRAY_SIZE];
80};
81
82typedef struct physid_mask physid_mask_t;
83
84#define physid_set(physid, map) set_bit(physid, (map).mask)
85#define physid_clear(physid, map) clear_bit(physid, (map).mask)
86#define physid_isset(physid, map) test_bit(physid, (map).mask)
Joe Perches30971e12008-03-23 01:02:49 -070087#define physid_test_and_set(physid, map) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010088 test_and_set_bit(physid, (map).mask)
89
Joe Perches30971e12008-03-23 01:02:49 -070090#define physids_and(dst, src1, src2) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010091 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
92
Joe Perches30971e12008-03-23 01:02:49 -070093#define physids_or(dst, src1, src2) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010094 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
95
Joe Perches30971e12008-03-23 01:02:49 -070096#define physids_clear(map) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +010097 bitmap_zero((map).mask, MAX_APICS)
98
Joe Perches30971e12008-03-23 01:02:49 -070099#define physids_complement(dst, src) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +0100100 bitmap_complement((dst).mask, (src).mask, MAX_APICS)
101
Joe Perches30971e12008-03-23 01:02:49 -0700102#define physids_empty(map) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +0100103 bitmap_empty((map).mask, MAX_APICS)
104
Joe Perches30971e12008-03-23 01:02:49 -0700105#define physids_equal(map1, map2) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +0100106 bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
107
Joe Perches30971e12008-03-23 01:02:49 -0700108#define physids_weight(map) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +0100109 bitmap_weight((map).mask, MAX_APICS)
110
Joe Perches30971e12008-03-23 01:02:49 -0700111#define physids_shift_right(d, s, n) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +0100112 bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
113
Joe Perches30971e12008-03-23 01:02:49 -0700114#define physids_shift_left(d, s, n) \
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +0100115 bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
116
117#define physids_coerce(map) ((map).mask[0])
118
119#define physids_promote(physids) \
120 ({ \
121 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
122 __physid_mask.mask[0] = physids; \
123 __physid_mask; \
124 })
125
Jack Steinerb6df1b82008-06-19 21:51:05 -0500126/* Note: will create very large stack frames if physid_mask_t is big */
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +0100127#define physid_mask_of_physid(physid) \
128 ({ \
129 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
130 physid_set(physid, __physid_mask); \
131 __physid_mask; \
132 })
133
Jack Steinerb6df1b82008-06-19 21:51:05 -0500134static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
135{
136 physids_clear(*map);
137 physid_set(physid, *map);
138}
139
Thomas Gleixnerc2805aa2008-01-30 13:30:35 +0100140#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
141#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
142
143extern physid_mask_t phys_cpu_present_map;
144
Ingo Molnarfb5b33c2009-01-28 17:29:27 +0100145extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
146
147extern int default_acpi_madt_oem_check(char *, char *);
148
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700149#endif /* _ASM_X86_MPSPEC_H */