blob: 72fec054c264023f8282df2f1163c8544d6eb331 [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090029#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080030#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +080034#include "drm_edid.h"
Chris Wilsonea5b2132010-08-04 13:50:23 +010035#include "intel_drv.h"
Jesse Barnes79e53942008-11-07 14:24:08 -080036#include "i915_drm.h"
37#include "i915_drv.h"
38#include "intel_sdvo_regs.h"
39
Zhenyu Wang14571b42010-03-30 14:06:33 +080040#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
Chris Wilson32aad862010-08-04 13:50:25 +010050#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
Zhenyu Wang14571b42010-03-30 14:06:33 +080051
Jesse Barnes79e53942008-11-07 14:24:08 -080052
Zhao Yakuice6feab2009-08-24 13:50:26 +080053static char *tv_format_names[] = {
54 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
60 "SECAM_60"
61};
62
63#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
64
Chris Wilsonea5b2132010-08-04 13:50:23 +010065struct intel_sdvo {
66 struct intel_encoder base;
67
Keith Packardf9c10a92009-05-30 12:16:25 -070068 u8 slave_addr;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080069
70 /* Register for the SDVO device: SDVOB or SDVOC */
Eric Anholtc751ce42010-03-25 11:48:48 -070071 int sdvo_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080072
Jesse Barnese2f0ba92009-02-02 15:11:52 -080073 /* Active outputs controlled by this SDVO output */
74 uint16_t controlled_output;
Jesse Barnes79e53942008-11-07 14:24:08 -080075
Jesse Barnese2f0ba92009-02-02 15:11:52 -080076 /*
77 * Capabilities of the SDVO device returned by
78 * i830_sdvo_get_capabilities()
79 */
Jesse Barnes79e53942008-11-07 14:24:08 -080080 struct intel_sdvo_caps caps;
Jesse Barnese2f0ba92009-02-02 15:11:52 -080081
82 /* Pixel clock limitations reported by the SDVO device, in kHz */
Jesse Barnes79e53942008-11-07 14:24:08 -080083 int pixel_clock_min, pixel_clock_max;
84
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +080085 /*
86 * For multiple function SDVO device,
87 * this is for current attached outputs.
88 */
89 uint16_t attached_output;
90
Jesse Barnese2f0ba92009-02-02 15:11:52 -080091 /**
92 * This is set if we're going to treat the device as TV-out.
93 *
94 * While we have these nice friendly flags for output types that ought
95 * to decide this for us, the S-Video output on our HDMI+S-Video card
96 * shows up as RGB1 (VGA).
97 */
98 bool is_tv;
99
Zhao Yakuice6feab2009-08-24 13:50:26 +0800100 /* This is for current tv format name */
Chris Wilson40039752010-08-04 13:50:26 +0100101 int tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800102
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800103 /**
104 * This is set if we treat the device as HDMI, instead of DVI.
105 */
106 bool is_hdmi;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800107
Ma Ling7086c872009-05-13 11:20:06 +0800108 /**
109 * This is set if we detect output of sdvo device as LVDS.
110 */
111 bool is_lvds;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800112
113 /**
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800114 * This is sdvo flags for input timing.
115 */
116 uint8_t sdvo_flags;
117
118 /**
119 * This is sdvo fixed pannel mode pointer
120 */
121 struct drm_display_mode *sdvo_lvds_fixed_mode;
122
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800123 /*
124 * supported encoding mode, used to determine whether HDMI is
125 * supported
126 */
127 struct intel_sdvo_encode encode;
128
Eric Anholtc751ce42010-03-25 11:48:48 -0700129 /* DDC bus used by this SDVO encoder */
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800130 uint8_t ddc_bus;
131
Keith Packard57cdaf92009-09-04 13:07:54 +0800132 /* Mac mini hack -- use the same DDC as the analog connector */
133 struct i2c_adapter *analog_ddc_bus;
134
Zhenyu Wang14571b42010-03-30 14:06:33 +0800135};
136
137struct intel_sdvo_connector {
Chris Wilson615fb932010-08-04 13:50:24 +0100138 struct intel_connector base;
139
Zhenyu Wang14571b42010-03-30 14:06:33 +0800140 /* Mark the type of connector */
141 uint16_t output_flag;
142
143 /* This contains all current supported TV format */
Chris Wilson40039752010-08-04 13:50:26 +0100144 u8 tv_format_supported[TV_FORMAT_NUM];
Zhenyu Wang14571b42010-03-30 14:06:33 +0800145 int format_supported_num;
146 struct drm_property *tv_format_property;
147 struct drm_property *tv_format_name_property[TV_FORMAT_NUM];
148
149 /**
150 * Returned SDTV resolutions allowed for the current format, if the
151 * device reported it.
152 */
153 struct intel_sdvo_sdtv_resolution_reply sdtv_resolutions;
154
Zhao Yakuib9219c52009-09-10 15:45:46 +0800155 /* add the property for the SDVO-TV */
156 struct drm_property *left_property;
157 struct drm_property *right_property;
158 struct drm_property *top_property;
159 struct drm_property *bottom_property;
160 struct drm_property *hpos_property;
161 struct drm_property *vpos_property;
162
163 /* add the property for the SDVO-TV/LVDS */
164 struct drm_property *brightness_property;
165 struct drm_property *contrast_property;
166 struct drm_property *saturation_property;
167 struct drm_property *hue_property;
168
169 /* Add variable to record current setting for the above property */
170 u32 left_margin, right_margin, top_margin, bottom_margin;
171 /* this is to get the range of margin.*/
172 u32 max_hscan, max_vscan;
173 u32 max_hpos, cur_hpos;
174 u32 max_vpos, cur_vpos;
175 u32 cur_brightness, max_brightness;
176 u32 cur_contrast, max_contrast;
177 u32 cur_saturation, max_saturation;
178 u32 cur_hue, max_hue;
Jesse Barnes79e53942008-11-07 14:24:08 -0800179};
180
Chris Wilsonea5b2132010-08-04 13:50:23 +0100181static struct intel_sdvo *enc_to_intel_sdvo(struct drm_encoder *encoder)
182{
183 return container_of(enc_to_intel_encoder(encoder), struct intel_sdvo, base);
184}
185
Chris Wilson615fb932010-08-04 13:50:24 +0100186static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
187{
188 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
189}
190
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800191static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100192intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
Chris Wilson32aad862010-08-04 13:50:25 +0100193static bool
194intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
195 struct intel_sdvo_connector *intel_sdvo_connector,
196 int type);
197static bool
198intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
199 struct intel_sdvo_connector *intel_sdvo_connector);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +0800200
Jesse Barnes79e53942008-11-07 14:24:08 -0800201/**
202 * Writes the SDVOB or SDVOC with the given value, but always writes both
203 * SDVOB and SDVOC to work around apparent hardware issues (according to
204 * comments in the BIOS).
205 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100206static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800207{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100208 struct drm_device *dev = intel_sdvo->base.enc.dev;
Jesse Barnes79e53942008-11-07 14:24:08 -0800209 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes79e53942008-11-07 14:24:08 -0800210 u32 bval = val, cval = val;
211 int i;
212
Chris Wilsonea5b2132010-08-04 13:50:23 +0100213 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
214 I915_WRITE(intel_sdvo->sdvo_reg, val);
215 I915_READ(intel_sdvo->sdvo_reg);
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800216 return;
217 }
218
Chris Wilsonea5b2132010-08-04 13:50:23 +0100219 if (intel_sdvo->sdvo_reg == SDVOB) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800220 cval = I915_READ(SDVOC);
221 } else {
222 bval = I915_READ(SDVOB);
223 }
224 /*
225 * Write the registers twice for luck. Sometimes,
226 * writing them only once doesn't appear to 'stick'.
227 * The BIOS does this too. Yay, magic
228 */
229 for (i = 0; i < 2; i++)
230 {
231 I915_WRITE(SDVOB, bval);
232 I915_READ(SDVOB);
233 I915_WRITE(SDVOC, cval);
234 I915_READ(SDVOC);
235 }
236}
237
Chris Wilson32aad862010-08-04 13:50:25 +0100238static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800239{
Chris Wilson32aad862010-08-04 13:50:25 +0100240 u8 out_buf[2] = { addr, 0 };
Jesse Barnes79e53942008-11-07 14:24:08 -0800241 u8 buf[2];
Jesse Barnes79e53942008-11-07 14:24:08 -0800242 struct i2c_msg msgs[] = {
243 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100244 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800245 .flags = 0,
246 .len = 1,
247 .buf = out_buf,
248 },
249 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100250 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800251 .flags = I2C_M_RD,
252 .len = 1,
253 .buf = buf,
254 }
255 };
Chris Wilson32aad862010-08-04 13:50:25 +0100256 int ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800257
Chris Wilsonea5b2132010-08-04 13:50:23 +0100258 if ((ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 2)) == 2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800259 {
260 *ch = buf[0];
261 return true;
262 }
263
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800264 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
Jesse Barnes79e53942008-11-07 14:24:08 -0800265 return false;
266}
267
Chris Wilson32aad862010-08-04 13:50:25 +0100268static bool intel_sdvo_write_byte(struct intel_sdvo *intel_sdvo, int addr, u8 ch)
Jesse Barnes79e53942008-11-07 14:24:08 -0800269{
Chris Wilson32aad862010-08-04 13:50:25 +0100270 u8 out_buf[2] = { addr, ch };
Jesse Barnes79e53942008-11-07 14:24:08 -0800271 struct i2c_msg msgs[] = {
272 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100273 .addr = intel_sdvo->slave_addr >> 1,
Jesse Barnes79e53942008-11-07 14:24:08 -0800274 .flags = 0,
275 .len = 2,
276 .buf = out_buf,
277 }
278 };
279
Chris Wilson32aad862010-08-04 13:50:25 +0100280 return i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 1) == 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800281}
282
283#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
284/** Mapping of command numbers to names, for debug output */
Tobias Klauser005568b2009-02-09 22:02:42 +0100285static const struct _sdvo_cmd_name {
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800286 u8 cmd;
287 char *name;
Jesse Barnes79e53942008-11-07 14:24:08 -0800288} sdvo_cmd_names[] = {
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
Jesse Barnes79e53942008-11-07 14:24:08 -0800328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
Zhao Yakuib9219c52009-09-10 15:45:46 +0800332 /* Add the op code for SDVO enhancements */
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_POSITION_H),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POSITION_H),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_POSITION_H),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_POSITION_V),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POSITION_V),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_POSITION_V),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800357 /* HDMI op code */
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
Jesse Barnes79e53942008-11-07 14:24:08 -0800378};
379
Zhao Yakui461ed3c2010-03-30 15:11:33 +0800380#define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
Chris Wilsonea5b2132010-08-04 13:50:23 +0100381#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
Jesse Barnes79e53942008-11-07 14:24:08 -0800382
Chris Wilsonea5b2132010-08-04 13:50:23 +0100383static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
Chris Wilson32aad862010-08-04 13:50:25 +0100384 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800385{
Jesse Barnes79e53942008-11-07 14:24:08 -0800386 int i;
387
Zhao Yakui8a4c47f2009-07-20 13:48:04 +0800388 DRM_DEBUG_KMS("%s: W: %02X ",
Chris Wilsonea5b2132010-08-04 13:50:23 +0100389 SDVO_NAME(intel_sdvo), cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800390 for (i = 0; i < args_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800391 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800392 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800393 DRM_LOG_KMS(" ");
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400394 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800395 if (cmd == sdvo_cmd_names[i].cmd) {
yakui_zhao342dc382009-06-02 14:12:00 +0800396 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
Jesse Barnes79e53942008-11-07 14:24:08 -0800397 break;
398 }
399 }
Kulikov Vasiliy04ad3272010-06-28 15:54:56 +0400400 if (i == ARRAY_SIZE(sdvo_cmd_names))
yakui_zhao342dc382009-06-02 14:12:00 +0800401 DRM_LOG_KMS("(%02X)", cmd);
402 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800403}
Jesse Barnes79e53942008-11-07 14:24:08 -0800404
Chris Wilson32aad862010-08-04 13:50:25 +0100405static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
406 const void *args, int args_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800407{
408 int i;
409
Chris Wilsonea5b2132010-08-04 13:50:23 +0100410 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
Jesse Barnes79e53942008-11-07 14:24:08 -0800411
412 for (i = 0; i < args_len; i++) {
Chris Wilson32aad862010-08-04 13:50:25 +0100413 if (!intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0 - i,
414 ((u8*)args)[i]))
415 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800416 }
417
Chris Wilson32aad862010-08-04 13:50:25 +0100418 return intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_OPCODE, cmd);
Jesse Barnes79e53942008-11-07 14:24:08 -0800419}
420
Jesse Barnes79e53942008-11-07 14:24:08 -0800421static const char *cmd_status_names[] = {
422 "Power on",
423 "Success",
424 "Not supported",
425 "Invalid arg",
426 "Pending",
427 "Target not specified",
428 "Scaling not supported"
429};
430
Chris Wilsonea5b2132010-08-04 13:50:23 +0100431static void intel_sdvo_debug_response(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800432 void *response, int response_len,
433 u8 status)
434{
Zhenyu Wang33b52962009-03-24 14:02:40 +0800435 int i;
Jesse Barnes79e53942008-11-07 14:24:08 -0800436
Chris Wilsonea5b2132010-08-04 13:50:23 +0100437 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -0800438 for (i = 0; i < response_len; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800439 DRM_LOG_KMS("%02X ", ((u8 *)response)[i]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800440 for (; i < 8; i++)
yakui_zhao342dc382009-06-02 14:12:00 +0800441 DRM_LOG_KMS(" ");
Jesse Barnes79e53942008-11-07 14:24:08 -0800442 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
yakui_zhao342dc382009-06-02 14:12:00 +0800443 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
Jesse Barnes79e53942008-11-07 14:24:08 -0800444 else
yakui_zhao342dc382009-06-02 14:12:00 +0800445 DRM_LOG_KMS("(??? %d)", status);
446 DRM_LOG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -0800447}
Jesse Barnes79e53942008-11-07 14:24:08 -0800448
Chris Wilson32aad862010-08-04 13:50:25 +0100449static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
450 void *response, int response_len)
Jesse Barnes79e53942008-11-07 14:24:08 -0800451{
452 int i;
453 u8 status;
454 u8 retry = 50;
455
456 while (retry--) {
457 /* Read the command response */
458 for (i = 0; i < response_len; i++) {
Chris Wilson32aad862010-08-04 13:50:25 +0100459 if (!intel_sdvo_read_byte(intel_sdvo,
460 SDVO_I2C_RETURN_0 + i,
461 &((u8 *)response)[i]))
462 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800463 }
464
465 /* read the return status */
Chris Wilson32aad862010-08-04 13:50:25 +0100466 if (!intel_sdvo_read_byte(intel_sdvo, SDVO_I2C_CMD_STATUS,
467 &status))
468 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -0800469
Chris Wilsonea5b2132010-08-04 13:50:23 +0100470 intel_sdvo_debug_response(intel_sdvo, response, response_len,
Jesse Barnes79e53942008-11-07 14:24:08 -0800471 status);
472 if (status != SDVO_CMD_STATUS_PENDING)
Chris Wilson32aad862010-08-04 13:50:25 +0100473 break;
Jesse Barnes79e53942008-11-07 14:24:08 -0800474
475 mdelay(50);
476 }
477
Chris Wilson32aad862010-08-04 13:50:25 +0100478 return status == SDVO_CMD_STATUS_SUCCESS;
Jesse Barnes79e53942008-11-07 14:24:08 -0800479}
480
Hannes Ederb358d0a2008-12-18 21:18:47 +0100481static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800482{
483 if (mode->clock >= 100000)
484 return 1;
485 else if (mode->clock >= 50000)
486 return 2;
487 else
488 return 4;
489}
490
491/**
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800492 * Try to read the response after issuie the DDC switch command. But it
493 * is noted that we must do the action of reading response and issuing DDC
494 * switch command in one I2C transaction. Otherwise when we try to start
495 * another I2C transaction after issuing the DDC bus switch, it will be
496 * switched to the internal SDVO register.
Jesse Barnes79e53942008-11-07 14:24:08 -0800497 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100498static void intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
Hannes Ederb358d0a2008-12-18 21:18:47 +0100499 u8 target)
Jesse Barnes79e53942008-11-07 14:24:08 -0800500{
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800501 u8 out_buf[2], cmd_buf[2], ret_value[2], ret;
502 struct i2c_msg msgs[] = {
503 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100504 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800505 .flags = 0,
506 .len = 2,
507 .buf = out_buf,
508 },
509 /* the following two are to read the response */
510 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100511 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800512 .flags = 0,
513 .len = 1,
514 .buf = cmd_buf,
515 },
516 {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100517 .addr = intel_sdvo->slave_addr >> 1,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800518 .flags = I2C_M_RD,
519 .len = 1,
520 .buf = ret_value,
521 },
522 };
523
Chris Wilsonea5b2132010-08-04 13:50:23 +0100524 intel_sdvo_debug_write(intel_sdvo, SDVO_CMD_SET_CONTROL_BUS_SWITCH,
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800525 &target, 1);
526 /* write the DDC switch command argument */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100527 intel_sdvo_write_byte(intel_sdvo, SDVO_I2C_ARG_0, target);
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800528
529 out_buf[0] = SDVO_I2C_OPCODE;
530 out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
531 cmd_buf[0] = SDVO_I2C_CMD_STATUS;
532 cmd_buf[1] = 0;
533 ret_value[0] = 0;
534 ret_value[1] = 0;
535
Chris Wilsonea5b2132010-08-04 13:50:23 +0100536 ret = i2c_transfer(intel_sdvo->base.i2c_bus, msgs, 3);
Zhao Yakui6a304ca2010-01-08 10:58:19 +0800537 if (ret != 3) {
538 /* failure in I2C transfer */
539 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
540 return;
541 }
542 if (ret_value[0] != SDVO_CMD_STATUS_SUCCESS) {
543 DRM_DEBUG_KMS("DDC switch command returns response %d\n",
544 ret_value[0]);
545 return;
546 }
547 return;
Jesse Barnes79e53942008-11-07 14:24:08 -0800548}
549
Chris Wilson32aad862010-08-04 13:50:25 +0100550static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
551{
552 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
553 return false;
554
555 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
556}
557
558static bool
559intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
560{
561 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
562 return false;
563
564 return intel_sdvo_read_response(intel_sdvo, value, len);
565}
566
567static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
Jesse Barnes79e53942008-11-07 14:24:08 -0800568{
569 struct intel_sdvo_set_target_input_args targets = {0};
Chris Wilson32aad862010-08-04 13:50:25 +0100570 return intel_sdvo_set_value(intel_sdvo,
571 SDVO_CMD_SET_TARGET_INPUT,
572 &targets, sizeof(targets));
Jesse Barnes79e53942008-11-07 14:24:08 -0800573}
574
575/**
576 * Return whether each input is trained.
577 *
578 * This function is making an assumption about the layout of the response,
579 * which should be checked against the docs.
580 */
Chris Wilsonea5b2132010-08-04 13:50:23 +0100581static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
Jesse Barnes79e53942008-11-07 14:24:08 -0800582{
583 struct intel_sdvo_get_trained_inputs_response response;
Jesse Barnes79e53942008-11-07 14:24:08 -0800584
Chris Wilson32aad862010-08-04 13:50:25 +0100585 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
586 &response, sizeof(response)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800587 return false;
588
589 *input_1 = response.input0_trained;
590 *input_2 = response.input1_trained;
591 return true;
592}
593
Chris Wilsonea5b2132010-08-04 13:50:23 +0100594static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800595 u16 outputs)
596{
Chris Wilson32aad862010-08-04 13:50:25 +0100597 return intel_sdvo_set_value(intel_sdvo,
598 SDVO_CMD_SET_ACTIVE_OUTPUTS,
599 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800600}
601
Chris Wilsonea5b2132010-08-04 13:50:23 +0100602static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800603 int mode)
604{
Chris Wilson32aad862010-08-04 13:50:25 +0100605 u8 state = SDVO_ENCODER_STATE_ON;
Jesse Barnes79e53942008-11-07 14:24:08 -0800606
607 switch (mode) {
608 case DRM_MODE_DPMS_ON:
609 state = SDVO_ENCODER_STATE_ON;
610 break;
611 case DRM_MODE_DPMS_STANDBY:
612 state = SDVO_ENCODER_STATE_STANDBY;
613 break;
614 case DRM_MODE_DPMS_SUSPEND:
615 state = SDVO_ENCODER_STATE_SUSPEND;
616 break;
617 case DRM_MODE_DPMS_OFF:
618 state = SDVO_ENCODER_STATE_OFF;
619 break;
620 }
621
Chris Wilson32aad862010-08-04 13:50:25 +0100622 return intel_sdvo_set_value(intel_sdvo,
623 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
Jesse Barnes79e53942008-11-07 14:24:08 -0800624}
625
Chris Wilsonea5b2132010-08-04 13:50:23 +0100626static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800627 int *clock_min,
628 int *clock_max)
629{
630 struct intel_sdvo_pixel_clock_range clocks;
Jesse Barnes79e53942008-11-07 14:24:08 -0800631
Chris Wilson32aad862010-08-04 13:50:25 +0100632 if (!intel_sdvo_get_value(intel_sdvo,
633 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
634 &clocks, sizeof(clocks)))
Jesse Barnes79e53942008-11-07 14:24:08 -0800635 return false;
636
637 /* Convert the values from units of 10 kHz to kHz. */
638 *clock_min = clocks.min * 10;
639 *clock_max = clocks.max * 10;
Jesse Barnes79e53942008-11-07 14:24:08 -0800640 return true;
641}
642
Chris Wilsonea5b2132010-08-04 13:50:23 +0100643static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800644 u16 outputs)
645{
Chris Wilson32aad862010-08-04 13:50:25 +0100646 return intel_sdvo_set_value(intel_sdvo,
647 SDVO_CMD_SET_TARGET_OUTPUT,
648 &outputs, sizeof(outputs));
Jesse Barnes79e53942008-11-07 14:24:08 -0800649}
650
Chris Wilsonea5b2132010-08-04 13:50:23 +0100651static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
Jesse Barnes79e53942008-11-07 14:24:08 -0800652 struct intel_sdvo_dtd *dtd)
653{
Chris Wilson32aad862010-08-04 13:50:25 +0100654 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
655 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
Jesse Barnes79e53942008-11-07 14:24:08 -0800656}
657
Chris Wilsonea5b2132010-08-04 13:50:23 +0100658static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800659 struct intel_sdvo_dtd *dtd)
660{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100661 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800662 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
663}
664
Chris Wilsonea5b2132010-08-04 13:50:23 +0100665static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800666 struct intel_sdvo_dtd *dtd)
667{
Chris Wilsonea5b2132010-08-04 13:50:23 +0100668 return intel_sdvo_set_timing(intel_sdvo,
Jesse Barnes79e53942008-11-07 14:24:08 -0800669 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
670}
671
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800672static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +0100673intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800674 uint16_t clock,
675 uint16_t width,
676 uint16_t height)
677{
678 struct intel_sdvo_preferred_input_timing_args args;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800679
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800680 memset(&args, 0, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800681 args.clock = clock;
682 args.width = width;
683 args.height = height;
Zhenyu Wange642c6f2009-03-24 14:02:42 +0800684 args.interlace = 0;
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800685
Chris Wilsonea5b2132010-08-04 13:50:23 +0100686 if (intel_sdvo->is_lvds &&
687 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
688 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
ling.ma@intel.com12682a92009-06-30 11:35:35 +0800689 args.scaled = 1;
690
Chris Wilson32aad862010-08-04 13:50:25 +0100691 return intel_sdvo_set_value(intel_sdvo,
692 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
693 &args, sizeof(args));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800694}
695
Chris Wilsonea5b2132010-08-04 13:50:23 +0100696static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800697 struct intel_sdvo_dtd *dtd)
698{
Chris Wilson32aad862010-08-04 13:50:25 +0100699 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
700 &dtd->part1, sizeof(dtd->part1)) &&
701 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
702 &dtd->part2, sizeof(dtd->part2));
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800703}
Jesse Barnes79e53942008-11-07 14:24:08 -0800704
Chris Wilsonea5b2132010-08-04 13:50:23 +0100705static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
Jesse Barnes79e53942008-11-07 14:24:08 -0800706{
Chris Wilson32aad862010-08-04 13:50:25 +0100707 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
Jesse Barnes79e53942008-11-07 14:24:08 -0800708}
709
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800710static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
Chris Wilson32aad862010-08-04 13:50:25 +0100711 const struct drm_display_mode *mode)
Jesse Barnes79e53942008-11-07 14:24:08 -0800712{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800713 uint16_t width, height;
714 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
715 uint16_t h_sync_offset, v_sync_offset;
Jesse Barnes79e53942008-11-07 14:24:08 -0800716
717 width = mode->crtc_hdisplay;
718 height = mode->crtc_vdisplay;
719
720 /* do some mode translations */
721 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
722 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
723
724 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
725 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
726
727 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
728 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
729
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800730 dtd->part1.clock = mode->clock / 10;
731 dtd->part1.h_active = width & 0xff;
732 dtd->part1.h_blank = h_blank_len & 0xff;
733 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800734 ((h_blank_len >> 8) & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800735 dtd->part1.v_active = height & 0xff;
736 dtd->part1.v_blank = v_blank_len & 0xff;
737 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800738 ((v_blank_len >> 8) & 0xf);
739
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800740 dtd->part2.h_sync_off = h_sync_offset & 0xff;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800741 dtd->part2.h_sync_width = h_sync_len & 0xff;
742 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
Jesse Barnes79e53942008-11-07 14:24:08 -0800743 (v_sync_len & 0xf);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800744 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
Jesse Barnes79e53942008-11-07 14:24:08 -0800745 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
746 ((v_sync_len & 0x30) >> 4);
747
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800748 dtd->part2.dtd_flags = 0x18;
Jesse Barnes79e53942008-11-07 14:24:08 -0800749 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800750 dtd->part2.dtd_flags |= 0x2;
Jesse Barnes79e53942008-11-07 14:24:08 -0800751 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800752 dtd->part2.dtd_flags |= 0x4;
Jesse Barnes79e53942008-11-07 14:24:08 -0800753
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800754 dtd->part2.sdvo_flags = 0;
755 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
756 dtd->part2.reserved = 0;
757}
Jesse Barnes79e53942008-11-07 14:24:08 -0800758
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800759static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
Chris Wilson32aad862010-08-04 13:50:25 +0100760 const struct intel_sdvo_dtd *dtd)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800761{
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800762 mode->hdisplay = dtd->part1.h_active;
763 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
764 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800765 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800766 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
767 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
768 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
769 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
770
771 mode->vdisplay = dtd->part1.v_active;
772 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
773 mode->vsync_start = mode->vdisplay;
774 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800775 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800776 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
777 mode->vsync_end = mode->vsync_start +
778 (dtd->part2.v_sync_off_width & 0xf);
779 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
780 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
781 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
782
783 mode->clock = dtd->part1.clock * 10;
784
Zhenyu Wang171a9e92009-03-24 14:02:41 +0800785 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800786 if (dtd->part2.dtd_flags & 0x2)
787 mode->flags |= DRM_MODE_FLAG_PHSYNC;
788 if (dtd->part2.dtd_flags & 0x4)
789 mode->flags |= DRM_MODE_FLAG_PVSYNC;
790}
791
Chris Wilsonea5b2132010-08-04 13:50:23 +0100792static bool intel_sdvo_get_supp_encode(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800793 struct intel_sdvo_encode *encode)
794{
Chris Wilson32aad862010-08-04 13:50:25 +0100795 if (intel_sdvo_get_value(intel_sdvo,
796 SDVO_CMD_GET_SUPP_ENCODE,
797 encode, sizeof(*encode)))
798 return true;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800799
Chris Wilson32aad862010-08-04 13:50:25 +0100800 /* non-support means DVI */
801 memset(encode, 0, sizeof(*encode));
802 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800803}
804
Chris Wilsonea5b2132010-08-04 13:50:23 +0100805static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700806 uint8_t mode)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800807{
Chris Wilson32aad862010-08-04 13:50:25 +0100808 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800809}
810
Chris Wilsonea5b2132010-08-04 13:50:23 +0100811static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800812 uint8_t mode)
813{
Chris Wilson32aad862010-08-04 13:50:25 +0100814 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800815}
816
817#if 0
Chris Wilsonea5b2132010-08-04 13:50:23 +0100818static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800819{
820 int i, j;
821 uint8_t set_buf_index[2];
822 uint8_t av_split;
823 uint8_t buf_size;
824 uint8_t buf[48];
825 uint8_t *pos;
826
Chris Wilson32aad862010-08-04 13:50:25 +0100827 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800828
829 for (i = 0; i <= av_split; i++) {
830 set_buf_index[0] = i; set_buf_index[1] = 0;
Eric Anholtc751ce42010-03-25 11:48:48 -0700831 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800832 set_buf_index, 2);
Eric Anholtc751ce42010-03-25 11:48:48 -0700833 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
834 intel_sdvo_read_response(encoder, &buf_size, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800835
836 pos = buf;
837 for (j = 0; j <= buf_size; j += 8) {
Eric Anholtc751ce42010-03-25 11:48:48 -0700838 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800839 NULL, 0);
Eric Anholtc751ce42010-03-25 11:48:48 -0700840 intel_sdvo_read_response(encoder, pos, 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800841 pos += 8;
842 }
843 }
844}
845#endif
846
Chris Wilson32aad862010-08-04 13:50:25 +0100847static bool intel_sdvo_set_hdmi_buf(struct intel_sdvo *intel_sdvo,
Eric Anholtc751ce42010-03-25 11:48:48 -0700848 int index,
849 uint8_t *data, int8_t size, uint8_t tx_rate)
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800850{
851 uint8_t set_buf_index[2];
852
853 set_buf_index[0] = index;
854 set_buf_index[1] = 0;
855
Chris Wilson32aad862010-08-04 13:50:25 +0100856 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
857 set_buf_index, 2))
858 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800859
860 for (; size > 0; size -= 8) {
Chris Wilson32aad862010-08-04 13:50:25 +0100861 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA, data, 8))
862 return false;
863
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800864 data += 8;
865 }
866
Chris Wilson32aad862010-08-04 13:50:25 +0100867 return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800868}
869
870static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size)
871{
872 uint8_t csum = 0;
873 int i;
874
875 for (i = 0; i < size; i++)
876 csum += data[i];
877
878 return 0x100 - csum;
879}
880
881#define DIP_TYPE_AVI 0x82
882#define DIP_VERSION_AVI 0x2
883#define DIP_LEN_AVI 13
884
885struct dip_infoframe {
886 uint8_t type;
887 uint8_t version;
888 uint8_t len;
889 uint8_t checksum;
890 union {
891 struct {
892 /* Packet Byte #1 */
893 uint8_t S:2;
894 uint8_t B:2;
895 uint8_t A:1;
896 uint8_t Y:2;
897 uint8_t rsvd1:1;
898 /* Packet Byte #2 */
899 uint8_t R:4;
900 uint8_t M:2;
901 uint8_t C:2;
902 /* Packet Byte #3 */
903 uint8_t SC:2;
904 uint8_t Q:2;
905 uint8_t EC:3;
906 uint8_t ITC:1;
907 /* Packet Byte #4 */
908 uint8_t VIC:7;
909 uint8_t rsvd2:1;
910 /* Packet Byte #5 */
911 uint8_t PR:4;
912 uint8_t rsvd3:4;
913 /* Packet Byte #6~13 */
914 uint16_t top_bar_end;
915 uint16_t bottom_bar_start;
916 uint16_t left_bar_end;
917 uint16_t right_bar_start;
918 } avi;
919 struct {
920 /* Packet Byte #1 */
921 uint8_t channel_count:3;
922 uint8_t rsvd1:1;
923 uint8_t coding_type:4;
924 /* Packet Byte #2 */
925 uint8_t sample_size:2; /* SS0, SS1 */
926 uint8_t sample_frequency:3;
927 uint8_t rsvd2:3;
928 /* Packet Byte #3 */
929 uint8_t coding_type_private:5;
930 uint8_t rsvd3:3;
931 /* Packet Byte #4 */
932 uint8_t channel_allocation;
933 /* Packet Byte #5 */
934 uint8_t rsvd4:3;
935 uint8_t level_shift:4;
936 uint8_t downmix_inhibit:1;
937 } audio;
938 uint8_t payload[28];
939 } __attribute__ ((packed)) u;
940} __attribute__((packed));
941
Chris Wilson32aad862010-08-04 13:50:25 +0100942static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800943 struct drm_display_mode * mode)
944{
945 struct dip_infoframe avi_if = {
946 .type = DIP_TYPE_AVI,
947 .version = DIP_VERSION_AVI,
948 .len = DIP_LEN_AVI,
949 };
950
951 avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if,
952 4 + avi_if.len);
Chris Wilson32aad862010-08-04 13:50:25 +0100953 return intel_sdvo_set_hdmi_buf(intel_sdvo, 1, (uint8_t *)&avi_if,
954 4 + avi_if.len,
955 SDVO_HBUF_TX_VSYNC);
Jesse Barnese2f0ba92009-02-02 15:11:52 -0800956}
957
Chris Wilson32aad862010-08-04 13:50:25 +0100958static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +0800959{
Zhao Yakuice6feab2009-08-24 13:50:26 +0800960 struct intel_sdvo_tv_format format;
Chris Wilson40039752010-08-04 13:50:26 +0100961 uint32_t format_map;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800962
Chris Wilson40039752010-08-04 13:50:26 +0100963 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +0800964 memset(&format, 0, sizeof(format));
Chris Wilson32aad862010-08-04 13:50:25 +0100965 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
Zhao Yakuice6feab2009-08-24 13:50:26 +0800966
Chris Wilson32aad862010-08-04 13:50:25 +0100967 BUILD_BUG_ON(sizeof(format) != 6);
968 return intel_sdvo_set_value(intel_sdvo,
969 SDVO_CMD_SET_TV_FORMAT,
970 &format, sizeof(format));
971}
Zhao Yakuice6feab2009-08-24 13:50:26 +0800972
Chris Wilson32aad862010-08-04 13:50:25 +0100973static bool
974intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
975 struct drm_display_mode *mode)
976{
977 struct intel_sdvo_dtd output_dtd;
978
979 if (!intel_sdvo_set_target_output(intel_sdvo,
980 intel_sdvo->attached_output))
981 return false;
982
983 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
984 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
985 return false;
986
987 return true;
988}
989
990static bool
991intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
992 struct drm_display_mode *mode,
993 struct drm_display_mode *adjusted_mode)
994{
995 struct intel_sdvo_dtd input_dtd;
996
997 /* Reset the input timing to the screen. Assume always input 0. */
998 if (!intel_sdvo_set_target_input(intel_sdvo))
999 return false;
1000
1001 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1002 mode->clock / 10,
1003 mode->hdisplay,
1004 mode->vdisplay))
1005 return false;
1006
1007 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1008 &input_dtd))
1009 return false;
1010
1011 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1012 intel_sdvo->sdvo_flags = input_dtd.part2.sdvo_flags;
1013
1014 drm_mode_set_crtcinfo(adjusted_mode, 0);
1015 mode->clock = adjusted_mode->clock;
1016 return true;
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001017}
1018
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001019static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1020 struct drm_display_mode *mode,
1021 struct drm_display_mode *adjusted_mode)
1022{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001023 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001024
Chris Wilson32aad862010-08-04 13:50:25 +01001025 /* We need to construct preferred input timings based on our
1026 * output timings. To do that, we have to set the output
1027 * timings, even though this isn't really the right place in
1028 * the sequence to do it. Oh well.
1029 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001030 if (intel_sdvo->is_tv) {
Chris Wilson32aad862010-08-04 13:50:25 +01001031 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001032 return false;
Chris Wilson32aad862010-08-04 13:50:25 +01001033
1034 if (!intel_sdvo_set_input_timings_for_mode(intel_sdvo, mode, adjusted_mode))
1035 return false;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001036 } else if (intel_sdvo->is_lvds) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001037 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode, 0);
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001038
Chris Wilson32aad862010-08-04 13:50:25 +01001039 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1040 intel_sdvo->sdvo_lvds_fixed_mode))
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001041 return false;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001042
Chris Wilson32aad862010-08-04 13:50:25 +01001043 if (!intel_sdvo_set_input_timings_for_mode(intel_sdvo, mode, adjusted_mode))
1044 return false;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001045 }
Chris Wilson32aad862010-08-04 13:50:25 +01001046
1047 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1048 * SDVO device will be told of the multiplier during mode_set.
1049 */
1050 adjusted_mode->clock *= intel_sdvo_get_pixel_multiplier(mode);
1051
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001052 return true;
1053}
1054
1055static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1056 struct drm_display_mode *mode,
1057 struct drm_display_mode *adjusted_mode)
1058{
1059 struct drm_device *dev = encoder->dev;
1060 struct drm_i915_private *dev_priv = dev->dev_private;
1061 struct drm_crtc *crtc = encoder->crtc;
1062 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001063 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001064 u32 sdvox = 0;
Chris Wilson32aad862010-08-04 13:50:25 +01001065 int sdvo_pixel_multiply, rate;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001066 struct intel_sdvo_in_out_map in_out;
1067 struct intel_sdvo_dtd input_dtd;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001068
1069 if (!mode)
1070 return;
1071
1072 /* First, set the input mapping for the first input to our controlled
1073 * output. This is only correct if we're a single-input device, in
1074 * which case the first input is the output from the appropriate SDVO
1075 * channel on the motherboard. In a two-input device, the first input
1076 * will be SDVOB and the second SDVOC.
1077 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001078 in_out.in0 = intel_sdvo->attached_output;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001079 in_out.in1 = 0;
1080
Chris Wilson32aad862010-08-04 13:50:25 +01001081 if (!intel_sdvo_set_value(intel_sdvo,
1082 SDVO_CMD_SET_IN_OUT_MAP,
1083 &in_out, sizeof(in_out)))
1084 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001085
Chris Wilsonea5b2132010-08-04 13:50:23 +01001086 if (intel_sdvo->is_hdmi) {
Chris Wilson32aad862010-08-04 13:50:25 +01001087 if (!intel_sdvo_set_avi_infoframe(intel_sdvo, mode))
1088 return;
1089
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001090 sdvox |= SDVO_AUDIO_ENABLE;
1091 }
1092
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001093 /* We have tried to get input timing in mode_fixup, and filled into
1094 adjusted_mode */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001095 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001096 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001097 input_dtd.part2.sdvo_flags = intel_sdvo->sdvo_flags;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001098 } else
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001099 intel_sdvo_get_dtd_from_mode(&input_dtd, mode);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001100
1101 /* If it's a TV, we already set the output timing in mode_fixup.
1102 * Otherwise, the output timing is equal to the input timing.
1103 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001104 if (!intel_sdvo->is_tv && !intel_sdvo->is_lvds) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001105 /* Set the output timing to the screen */
Chris Wilson32aad862010-08-04 13:50:25 +01001106 if (!intel_sdvo_set_target_output(intel_sdvo,
1107 intel_sdvo->attached_output))
1108 return;
1109
1110 if (!intel_sdvo_set_output_timing(intel_sdvo, &input_dtd))
1111 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001112 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001113
1114 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01001115 if (!intel_sdvo_set_target_input(intel_sdvo))
1116 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001117
Chris Wilson32aad862010-08-04 13:50:25 +01001118 if (intel_sdvo->is_tv) {
1119 if (!intel_sdvo_set_tv_format(intel_sdvo))
1120 return;
1121 }
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001122
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001123 /* We would like to use intel_sdvo_create_preferred_input_timing() to
Jesse Barnes79e53942008-11-07 14:24:08 -08001124 * provide the device with a timing it can support, if it supports that
1125 * feature. However, presumably we would need to adjust the CRTC to
1126 * output the preferred timing, and we don't support that currently.
1127 */
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001128#if 0
Eric Anholtc751ce42010-03-25 11:48:48 -07001129 success = intel_sdvo_create_preferred_input_timing(encoder, clock,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001130 width, height);
1131 if (success) {
1132 struct intel_sdvo_dtd *input_dtd;
1133
Eric Anholtc751ce42010-03-25 11:48:48 -07001134 intel_sdvo_get_preferred_input_timing(encoder, &input_dtd);
1135 intel_sdvo_set_input_timing(encoder, &input_dtd);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001136 }
1137#else
Chris Wilson32aad862010-08-04 13:50:25 +01001138 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1139 return;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001140#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001141
Chris Wilson32aad862010-08-04 13:50:25 +01001142 sdvo_pixel_multiply = intel_sdvo_get_pixel_multiplier(mode);
1143 switch (sdvo_pixel_multiply) {
1144 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1145 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1146 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
Jesse Barnes79e53942008-11-07 14:24:08 -08001147 }
Chris Wilson32aad862010-08-04 13:50:25 +01001148 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1149 return;
Jesse Barnes79e53942008-11-07 14:24:08 -08001150
1151 /* Set the SDVO control regs. */
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001152 if (IS_I965G(dev)) {
Adam Jackson81a14b42010-07-16 14:46:32 -04001153 sdvox |= SDVO_BORDER_ENABLE;
1154 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1155 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1156 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1157 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001158 } else {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001159 sdvox |= I915_READ(intel_sdvo->sdvo_reg);
1160 switch (intel_sdvo->sdvo_reg) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001161 case SDVOB:
1162 sdvox &= SDVOB_PRESERVE_MASK;
1163 break;
1164 case SDVOC:
1165 sdvox &= SDVOC_PRESERVE_MASK;
1166 break;
1167 }
1168 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1169 }
Jesse Barnes79e53942008-11-07 14:24:08 -08001170 if (intel_crtc->pipe == 1)
1171 sdvox |= SDVO_PIPE_B_SELECT;
1172
Jesse Barnes79e53942008-11-07 14:24:08 -08001173 if (IS_I965G(dev)) {
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001174 /* done in crtc_mode_set as the dpll_md reg must be written early */
1175 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1176 /* done in crtc_mode_set as it lives inside the dpll register */
Jesse Barnes79e53942008-11-07 14:24:08 -08001177 } else {
1178 sdvox |= (sdvo_pixel_multiply - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1179 }
1180
Chris Wilsonea5b2132010-08-04 13:50:23 +01001181 if (intel_sdvo->sdvo_flags & SDVO_NEED_TO_STALL)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001182 sdvox |= SDVO_STALL_SELECT;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001183 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
Jesse Barnes79e53942008-11-07 14:24:08 -08001184}
1185
1186static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1187{
1188 struct drm_device *dev = encoder->dev;
1189 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001190 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001191 u32 temp;
1192
1193 if (mode != DRM_MODE_DPMS_ON) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001194 intel_sdvo_set_active_outputs(intel_sdvo, 0);
Jesse Barnes79e53942008-11-07 14:24:08 -08001195 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001196 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
Jesse Barnes79e53942008-11-07 14:24:08 -08001197
1198 if (mode == DRM_MODE_DPMS_OFF) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001199 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001200 if ((temp & SDVO_ENABLE) != 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001201 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001202 }
1203 }
1204 } else {
1205 bool input1, input2;
1206 int i;
1207 u8 status;
1208
Chris Wilsonea5b2132010-08-04 13:50:23 +01001209 temp = I915_READ(intel_sdvo->sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08001210 if ((temp & SDVO_ENABLE) == 0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001211 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
Jesse Barnes79e53942008-11-07 14:24:08 -08001212 for (i = 0; i < 2; i++)
1213 intel_wait_for_vblank(dev);
1214
Chris Wilson32aad862010-08-04 13:50:25 +01001215 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001216 /* Warn if the device reported failure to sync.
1217 * A lot of SDVO devices fail to notify of sync, but it's
1218 * a given it the status is a success, we succeeded.
1219 */
1220 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001221 DRM_DEBUG_KMS("First %s output reported failure to "
Chris Wilsonea5b2132010-08-04 13:50:23 +01001222 "sync\n", SDVO_NAME(intel_sdvo));
Jesse Barnes79e53942008-11-07 14:24:08 -08001223 }
1224
1225 if (0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001226 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1227 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
Jesse Barnes79e53942008-11-07 14:24:08 -08001228 }
1229 return;
1230}
1231
Jesse Barnes79e53942008-11-07 14:24:08 -08001232static int intel_sdvo_mode_valid(struct drm_connector *connector,
1233 struct drm_display_mode *mode)
1234{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001235 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001236 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001237
1238 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1239 return MODE_NO_DBLESCAN;
1240
Chris Wilsonea5b2132010-08-04 13:50:23 +01001241 if (intel_sdvo->pixel_clock_min > mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001242 return MODE_CLOCK_LOW;
1243
Chris Wilsonea5b2132010-08-04 13:50:23 +01001244 if (intel_sdvo->pixel_clock_max < mode->clock)
Jesse Barnes79e53942008-11-07 14:24:08 -08001245 return MODE_CLOCK_HIGH;
1246
Chris Wilsonea5b2132010-08-04 13:50:23 +01001247 if (intel_sdvo->is_lvds == true) {
1248 if (intel_sdvo->sdvo_lvds_fixed_mode == NULL)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001249 return MODE_PANEL;
1250
Chris Wilsonea5b2132010-08-04 13:50:23 +01001251 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001252 return MODE_PANEL;
1253
Chris Wilsonea5b2132010-08-04 13:50:23 +01001254 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001255 return MODE_PANEL;
1256 }
1257
Jesse Barnes79e53942008-11-07 14:24:08 -08001258 return MODE_OK;
1259}
1260
Chris Wilsonea5b2132010-08-04 13:50:23 +01001261static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
Jesse Barnes79e53942008-11-07 14:24:08 -08001262{
Chris Wilson32aad862010-08-04 13:50:25 +01001263 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DEVICE_CAPS, caps, sizeof(*caps));
Jesse Barnes79e53942008-11-07 14:24:08 -08001264}
1265
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001266/* No use! */
1267#if 0
Jesse Barnes79e53942008-11-07 14:24:08 -08001268struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1269{
1270 struct drm_connector *connector = NULL;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001271 struct intel_sdvo *iout = NULL;
1272 struct intel_sdvo *sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08001273
1274 /* find the sdvo connector */
1275 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001276 iout = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001277
1278 if (iout->type != INTEL_OUTPUT_SDVO)
1279 continue;
1280
1281 sdvo = iout->dev_priv;
1282
Eric Anholtc751ce42010-03-25 11:48:48 -07001283 if (sdvo->sdvo_reg == SDVOB && sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001284 return connector;
1285
Eric Anholtc751ce42010-03-25 11:48:48 -07001286 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
Jesse Barnes79e53942008-11-07 14:24:08 -08001287 return connector;
1288
1289 }
1290
1291 return NULL;
1292}
1293
1294int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1295{
1296 u8 response[2];
1297 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001298 struct intel_sdvo *intel_sdvo;
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08001299 DRM_DEBUG_KMS("\n");
Jesse Barnes79e53942008-11-07 14:24:08 -08001300
1301 if (!connector)
1302 return 0;
1303
Chris Wilsonea5b2132010-08-04 13:50:23 +01001304 intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001305
Chris Wilson32aad862010-08-04 13:50:25 +01001306 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1307 &response, 2) && response[0];
Jesse Barnes79e53942008-11-07 14:24:08 -08001308}
1309
1310void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1311{
1312 u8 response[2];
1313 u8 status;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001314 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001315
Chris Wilsonea5b2132010-08-04 13:50:23 +01001316 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1317 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001318
1319 if (on) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001320 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1321 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001322
Chris Wilsonea5b2132010-08-04 13:50:23 +01001323 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001324 } else {
1325 response[0] = 0;
1326 response[1] = 0;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001327 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001328 }
1329
Chris Wilsonea5b2132010-08-04 13:50:23 +01001330 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1331 intel_sdvo_read_response(intel_sdvo, &response, 2);
Jesse Barnes79e53942008-11-07 14:24:08 -08001332}
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001333#endif
Jesse Barnes79e53942008-11-07 14:24:08 -08001334
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001335static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001336intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001337{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001338 int caps = 0;
1339
Chris Wilsonea5b2132010-08-04 13:50:23 +01001340 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001341 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1342 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001343 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001344 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1345 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001346 if (intel_sdvo->caps.output_flags &
Roel Kluin19e1f882009-08-09 13:50:53 +02001347 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001348 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001349 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001350 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1351 caps++;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001352 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001353 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1354 caps++;
1355
Chris Wilsonea5b2132010-08-04 13:50:23 +01001356 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001357 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1358 caps++;
1359
Chris Wilsonea5b2132010-08-04 13:50:23 +01001360 if (intel_sdvo->caps.output_flags &
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001361 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1362 caps++;
1363
1364 return (caps > 1);
1365}
1366
Keith Packard57cdaf92009-09-04 13:07:54 +08001367static struct drm_connector *
1368intel_find_analog_connector(struct drm_device *dev)
1369{
1370 struct drm_connector *connector;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001371 struct drm_encoder *encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001372 struct intel_sdvo *intel_sdvo;
Keith Packard57cdaf92009-09-04 13:07:54 +08001373
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001374 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001375 intel_sdvo = enc_to_intel_sdvo(encoder);
1376 if (intel_sdvo->base.type == INTEL_OUTPUT_ANALOG) {
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001377 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
Dan Carpenter90a78e82010-05-07 10:40:09 +02001378 if (encoder == intel_attached_encoder(connector))
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001379 return connector;
1380 }
1381 }
Keith Packard57cdaf92009-09-04 13:07:54 +08001382 }
1383 return NULL;
1384}
1385
1386static int
1387intel_analog_is_connected(struct drm_device *dev)
1388{
1389 struct drm_connector *analog_connector;
Keith Packard57cdaf92009-09-04 13:07:54 +08001390
Chris Wilson32aad862010-08-04 13:50:25 +01001391 analog_connector = intel_find_analog_connector(dev);
Keith Packard57cdaf92009-09-04 13:07:54 +08001392 if (!analog_connector)
1393 return false;
1394
1395 if (analog_connector->funcs->detect(analog_connector) ==
1396 connector_status_disconnected)
1397 return false;
1398
1399 return true;
1400}
1401
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001402enum drm_connector_status
Adam Jackson149c36a2010-04-29 14:05:18 -04001403intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
Ma Ling9dff6af2009-04-02 13:13:26 +08001404{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001405 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001406 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001407 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001408 enum drm_connector_status status = connector_status_connected;
Ma Ling9dff6af2009-04-02 13:13:26 +08001409 struct edid *edid = NULL;
1410
Chris Wilsonea5b2132010-08-04 13:50:23 +01001411 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
Keith Packard57cdaf92009-09-04 13:07:54 +08001412
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001413 /* This is only applied to SDVO cards with multiple outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001414 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001415 uint8_t saved_ddc, temp_ddc;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001416 saved_ddc = intel_sdvo->ddc_bus;
1417 temp_ddc = intel_sdvo->ddc_bus >> 1;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001418 /*
1419 * Don't use the 1 as the argument of DDC bus switch to get
1420 * the EDID. It is used for SDVO SPD ROM.
1421 */
1422 while(temp_ddc > 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001423 intel_sdvo->ddc_bus = temp_ddc;
1424 edid = drm_get_edid(connector, intel_sdvo->base.ddc_bus);
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001425 if (edid) {
1426 /*
1427 * When we can get the EDID, maybe it is the
1428 * correct DDC bus. Update it.
1429 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001430 intel_sdvo->ddc_bus = temp_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001431 break;
1432 }
1433 temp_ddc >>= 1;
1434 }
1435 if (edid == NULL)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001436 intel_sdvo->ddc_bus = saved_ddc;
Zhao Yakui7c3f0a22010-01-08 10:58:20 +08001437 }
Keith Packard57cdaf92009-09-04 13:07:54 +08001438 /* when there is no edid and no monitor is connected with VGA
1439 * port, try to use the CRT ddc to read the EDID for DVI-connector
1440 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001441 if (edid == NULL && intel_sdvo->analog_ddc_bus &&
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001442 !intel_analog_is_connected(connector->dev))
Chris Wilsonea5b2132010-08-04 13:50:23 +01001443 edid = drm_get_edid(connector, intel_sdvo->analog_ddc_bus);
Adam Jackson149c36a2010-04-29 14:05:18 -04001444
Ma Ling9dff6af2009-04-02 13:13:26 +08001445 if (edid != NULL) {
Adam Jackson149c36a2010-04-29 14:05:18 -04001446 bool is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
Chris Wilson615fb932010-08-04 13:50:24 +01001447 bool need_digital = !!(intel_sdvo_connector->output_flag & SDVO_TMDS_MASK);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001448
Adam Jackson149c36a2010-04-29 14:05:18 -04001449 /* DDC bus is shared, match EDID to connector type */
1450 if (is_digital && need_digital)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001451 intel_sdvo->is_hdmi = drm_detect_hdmi_monitor(edid);
Adam Jackson149c36a2010-04-29 14:05:18 -04001452 else if (is_digital != need_digital)
1453 status = connector_status_disconnected;
1454
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001455 connector->display_info.raw_edid = NULL;
Adam Jackson149c36a2010-04-29 14:05:18 -04001456 } else
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001457 status = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001458
1459 kfree(edid);
ling.ma@intel.com2b8d33f72009-07-29 11:31:18 +08001460
1461 return status;
Ma Ling9dff6af2009-04-02 13:13:26 +08001462}
1463
Jesse Barnes79e53942008-11-07 14:24:08 -08001464static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector)
1465{
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001466 uint16_t response;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001467 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001468 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001469 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001470 enum drm_connector_status ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001471
Chris Wilson32aad862010-08-04 13:50:25 +01001472 if (!intel_sdvo_write_cmd(intel_sdvo,
1473 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1474 return connector_status_unknown;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001475 if (intel_sdvo->is_tv) {
Zhao Yakuid09c23d2009-11-06 15:39:56 +08001476 /* add 30ms delay when the output type is SDVO-TV */
1477 mdelay(30);
1478 }
Chris Wilson32aad862010-08-04 13:50:25 +01001479 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1480 return connector_status_unknown;
Jesse Barnes79e53942008-11-07 14:24:08 -08001481
Dave Airlie51c8b402009-08-20 13:38:04 +10001482 DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001483
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001484 if (response == 0)
Jesse Barnes79e53942008-11-07 14:24:08 -08001485 return connector_status_disconnected;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001486
Chris Wilsonea5b2132010-08-04 13:50:23 +01001487 intel_sdvo->attached_output = response;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001488
Chris Wilson615fb932010-08-04 13:50:24 +01001489 if ((intel_sdvo_connector->output_flag & response) == 0)
Zhenyu Wang14571b42010-03-30 14:06:33 +08001490 ret = connector_status_disconnected;
Adam Jackson149c36a2010-04-29 14:05:18 -04001491 else if (response & SDVO_TMDS_MASK)
1492 ret = intel_sdvo_hdmi_sink_detect(connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08001493 else
1494 ret = connector_status_connected;
1495
1496 /* May update encoder flag for like clock for SDVO TV, etc.*/
1497 if (ret == connector_status_connected) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001498 intel_sdvo->is_tv = false;
1499 intel_sdvo->is_lvds = false;
1500 intel_sdvo->base.needs_tv_clock = false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001501
1502 if (response & SDVO_TV_MASK) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001503 intel_sdvo->is_tv = true;
1504 intel_sdvo->base.needs_tv_clock = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08001505 }
1506 if (response & SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01001507 intel_sdvo->is_lvds = true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08001508 }
Zhenyu Wang14571b42010-03-30 14:06:33 +08001509
1510 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -08001511}
1512
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001513static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
Jesse Barnes79e53942008-11-07 14:24:08 -08001514{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001515 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001516 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Keith Packard57cdaf92009-09-04 13:07:54 +08001517 int num_modes;
Jesse Barnes79e53942008-11-07 14:24:08 -08001518
1519 /* set the bus switch and get the modes */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001520 num_modes = intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
Jesse Barnes79e53942008-11-07 14:24:08 -08001521
Keith Packard57cdaf92009-09-04 13:07:54 +08001522 /*
1523 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1524 * link between analog and digital outputs. So, if the regular SDVO
1525 * DDC fails, check to see if the analog output is disconnected, in
1526 * which case we'll look there for the digital DDC data.
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001527 */
Keith Packard57cdaf92009-09-04 13:07:54 +08001528 if (num_modes == 0 &&
Chris Wilsonea5b2132010-08-04 13:50:23 +01001529 intel_sdvo->analog_ddc_bus &&
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001530 !intel_analog_is_connected(connector->dev)) {
Keith Packard57cdaf92009-09-04 13:07:54 +08001531 /* Switch to the analog ddc bus and try that
1532 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001533 (void) intel_ddc_get_modes(connector, intel_sdvo->analog_ddc_bus);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001534 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001535}
1536
1537/*
1538 * Set of SDVO TV modes.
1539 * Note! This is in reply order (see loop in get_tv_modes).
1540 * XXX: all 60Hz refresh?
1541 */
1542struct drm_display_mode sdvo_tv_modes[] = {
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001543 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1544 416, 0, 200, 201, 232, 233, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001545 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001546 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1547 416, 0, 240, 241, 272, 273, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001549 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1550 496, 0, 300, 301, 332, 333, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001551 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001552 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1553 736, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001554 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001555 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1556 736, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001557 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001558 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1559 736, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001560 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001561 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1562 800, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001563 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001564 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1565 800, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001566 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001567 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1568 816, 0, 350, 351, 382, 383, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001569 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001570 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1571 816, 0, 400, 401, 432, 433, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001572 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001573 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1574 816, 0, 480, 481, 512, 513, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001575 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001576 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1577 816, 0, 540, 541, 572, 573, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001578 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001579 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1580 816, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001581 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001582 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1583 864, 0, 576, 577, 608, 609, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001584 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001585 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1586 896, 0, 600, 601, 632, 633, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001587 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001588 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1589 928, 0, 624, 625, 656, 657, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001590 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001591 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1592 1016, 0, 766, 767, 798, 799, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001593 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001594 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1595 1120, 0, 768, 769, 800, 801, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001596 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001597 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1598 1376, 0, 1024, 1025, 1056, 1057, 0,
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001599 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1600};
1601
1602static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1603{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001604 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001605 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001606 struct intel_sdvo_sdtv_resolution_request tv_res;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001607 uint32_t reply = 0, format_map = 0;
1608 int i;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001609
1610 /* Read the list of supported input resolutions for the selected TV
1611 * format.
1612 */
Chris Wilson40039752010-08-04 13:50:26 +01001613 format_map = 1 << intel_sdvo->tv_format_index;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001614 memcpy(&tv_res, &format_map,
Chris Wilson32aad862010-08-04 13:50:25 +01001615 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08001616
Chris Wilson32aad862010-08-04 13:50:25 +01001617 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1618 return;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001619
Chris Wilson32aad862010-08-04 13:50:25 +01001620 BUILD_BUG_ON(sizeof(tv_res) != 3);
1621 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1622 &tv_res, sizeof(tv_res)))
1623 return;
1624 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001625 return;
1626
1627 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001628 if (reply & (1 << i)) {
1629 struct drm_display_mode *nmode;
1630 nmode = drm_mode_duplicate(connector->dev,
Chris Wilson32aad862010-08-04 13:50:25 +01001631 &sdvo_tv_modes[i]);
Zhenyu Wang7026d4a2009-03-24 14:02:43 +08001632 if (nmode)
1633 drm_mode_probed_add(connector, nmode);
1634 }
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001635}
1636
Ma Ling7086c872009-05-13 11:20:06 +08001637static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1638{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001639 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001640 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Ma Ling7086c872009-05-13 11:20:06 +08001641 struct drm_i915_private *dev_priv = connector->dev->dev_private;
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001642 struct drm_display_mode *newmode;
Ma Ling7086c872009-05-13 11:20:06 +08001643
1644 /*
1645 * Attempt to get the mode list from DDC.
1646 * Assume that the preferred modes are
1647 * arranged in priority order.
1648 */
Chris Wilsonea5b2132010-08-04 13:50:23 +01001649 intel_ddc_get_modes(connector, intel_sdvo->base.ddc_bus);
Ma Ling7086c872009-05-13 11:20:06 +08001650 if (list_empty(&connector->probed_modes) == false)
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001651 goto end;
Ma Ling7086c872009-05-13 11:20:06 +08001652
1653 /* Fetch modes from VBT */
1654 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
Ma Ling7086c872009-05-13 11:20:06 +08001655 newmode = drm_mode_duplicate(connector->dev,
1656 dev_priv->sdvo_lvds_vbt_mode);
1657 if (newmode != NULL) {
1658 /* Guarantee the mode is preferred */
1659 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1660 DRM_MODE_TYPE_DRIVER);
1661 drm_mode_probed_add(connector, newmode);
1662 }
1663 }
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001664
1665end:
1666 list_for_each_entry(newmode, &connector->probed_modes, head) {
1667 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001668 intel_sdvo->sdvo_lvds_fixed_mode =
ling.ma@intel.com12682a92009-06-30 11:35:35 +08001669 drm_mode_duplicate(connector->dev, newmode);
1670 break;
1671 }
1672 }
1673
Ma Ling7086c872009-05-13 11:20:06 +08001674}
1675
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001676static int intel_sdvo_get_modes(struct drm_connector *connector)
1677{
Chris Wilson615fb932010-08-04 13:50:24 +01001678 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001679
Chris Wilson615fb932010-08-04 13:50:24 +01001680 if (IS_TV(intel_sdvo_connector))
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001681 intel_sdvo_get_tv_modes(connector);
Chris Wilson615fb932010-08-04 13:50:24 +01001682 else if (IS_LVDS(intel_sdvo_connector))
Ma Ling7086c872009-05-13 11:20:06 +08001683 intel_sdvo_get_lvds_modes(connector);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001684 else
1685 intel_sdvo_get_ddc_modes(connector);
1686
Chris Wilson32aad862010-08-04 13:50:25 +01001687 return !list_empty(&connector->probed_modes);
Jesse Barnes79e53942008-11-07 14:24:08 -08001688}
1689
Chris Wilsonfcc8d672010-08-04 13:50:27 +01001690static void
1691intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001692{
Chris Wilson615fb932010-08-04 13:50:24 +01001693 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001694 struct drm_device *dev = connector->dev;
1695
Chris Wilson615fb932010-08-04 13:50:24 +01001696 if (IS_TV(intel_sdvo_connector)) {
1697 if (intel_sdvo_connector->left_property)
1698 drm_property_destroy(dev, intel_sdvo_connector->left_property);
1699 if (intel_sdvo_connector->right_property)
1700 drm_property_destroy(dev, intel_sdvo_connector->right_property);
1701 if (intel_sdvo_connector->top_property)
1702 drm_property_destroy(dev, intel_sdvo_connector->top_property);
1703 if (intel_sdvo_connector->bottom_property)
1704 drm_property_destroy(dev, intel_sdvo_connector->bottom_property);
1705 if (intel_sdvo_connector->hpos_property)
1706 drm_property_destroy(dev, intel_sdvo_connector->hpos_property);
1707 if (intel_sdvo_connector->vpos_property)
1708 drm_property_destroy(dev, intel_sdvo_connector->vpos_property);
1709 if (intel_sdvo_connector->saturation_property)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001710 drm_property_destroy(dev,
Chris Wilson615fb932010-08-04 13:50:24 +01001711 intel_sdvo_connector->saturation_property);
1712 if (intel_sdvo_connector->contrast_property)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001713 drm_property_destroy(dev,
Chris Wilson615fb932010-08-04 13:50:24 +01001714 intel_sdvo_connector->contrast_property);
1715 if (intel_sdvo_connector->hue_property)
1716 drm_property_destroy(dev, intel_sdvo_connector->hue_property);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001717 }
Chris Wilson32aad862010-08-04 13:50:25 +01001718 if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Chris Wilson615fb932010-08-04 13:50:24 +01001719 if (intel_sdvo_connector->brightness_property)
Zhao Yakuib9219c52009-09-10 15:45:46 +08001720 drm_property_destroy(dev,
Chris Wilson615fb932010-08-04 13:50:24 +01001721 intel_sdvo_connector->brightness_property);
Zhao Yakuib9219c52009-09-10 15:45:46 +08001722 }
1723 return;
1724}
1725
Jesse Barnes79e53942008-11-07 14:24:08 -08001726static void intel_sdvo_destroy(struct drm_connector *connector)
1727{
Chris Wilson615fb932010-08-04 13:50:24 +01001728 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001729
Chris Wilson615fb932010-08-04 13:50:24 +01001730 if (intel_sdvo_connector->tv_format_property)
Zhao Yakuice6feab2009-08-24 13:50:26 +08001731 drm_property_destroy(connector->dev,
Chris Wilson615fb932010-08-04 13:50:24 +01001732 intel_sdvo_connector->tv_format_property);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001733
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001734 intel_sdvo_destroy_enhance_property(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001735 drm_sysfs_connector_remove(connector);
1736 drm_connector_cleanup(connector);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001737 kfree(connector);
Jesse Barnes79e53942008-11-07 14:24:08 -08001738}
1739
Zhao Yakuice6feab2009-08-24 13:50:26 +08001740static int
1741intel_sdvo_set_property(struct drm_connector *connector,
1742 struct drm_property *property,
1743 uint64_t val)
1744{
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001745 struct drm_encoder *encoder = intel_attached_encoder(connector);
Chris Wilsonea5b2132010-08-04 13:50:23 +01001746 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Chris Wilson615fb932010-08-04 13:50:24 +01001747 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
Zhao Yakuice6feab2009-08-24 13:50:26 +08001748 struct drm_crtc *crtc = encoder->crtc;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001749 bool changed = false;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001750 uint16_t temp_value;
Chris Wilson32aad862010-08-04 13:50:25 +01001751 uint8_t cmd;
1752 int ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001753
1754 ret = drm_connector_property_set_value(connector, property, val);
Chris Wilson32aad862010-08-04 13:50:25 +01001755 if (ret)
1756 return ret;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001757
Chris Wilson615fb932010-08-04 13:50:24 +01001758 if (property == intel_sdvo_connector->tv_format_property) {
Chris Wilson32aad862010-08-04 13:50:25 +01001759 if (val >= TV_FORMAT_NUM)
1760 return -EINVAL;
1761
Chris Wilson40039752010-08-04 13:50:26 +01001762 if (intel_sdvo->tv_format_index ==
Chris Wilson615fb932010-08-04 13:50:24 +01001763 intel_sdvo_connector->tv_format_supported[val])
Chris Wilson32aad862010-08-04 13:50:25 +01001764 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001765
Chris Wilson40039752010-08-04 13:50:26 +01001766 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
Zhao Yakuice6feab2009-08-24 13:50:26 +08001767 changed = true;
Chris Wilson32aad862010-08-04 13:50:25 +01001768 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001769 cmd = 0;
1770 temp_value = val;
Chris Wilson615fb932010-08-04 13:50:24 +01001771 if (intel_sdvo_connector->left_property == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001772 drm_connector_property_set_value(connector,
Chris Wilson615fb932010-08-04 13:50:24 +01001773 intel_sdvo_connector->right_property, val);
1774 if (intel_sdvo_connector->left_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001775 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001776
Chris Wilson615fb932010-08-04 13:50:24 +01001777 intel_sdvo_connector->left_margin = temp_value;
1778 intel_sdvo_connector->right_margin = temp_value;
1779 temp_value = intel_sdvo_connector->max_hscan -
1780 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001781 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilson615fb932010-08-04 13:50:24 +01001782 } else if (intel_sdvo_connector->right_property == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001783 drm_connector_property_set_value(connector,
Chris Wilson615fb932010-08-04 13:50:24 +01001784 intel_sdvo_connector->left_property, val);
1785 if (intel_sdvo_connector->right_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001786 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001787
Chris Wilson615fb932010-08-04 13:50:24 +01001788 intel_sdvo_connector->left_margin = temp_value;
1789 intel_sdvo_connector->right_margin = temp_value;
1790 temp_value = intel_sdvo_connector->max_hscan -
1791 intel_sdvo_connector->left_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001792 cmd = SDVO_CMD_SET_OVERSCAN_H;
Chris Wilson615fb932010-08-04 13:50:24 +01001793 } else if (intel_sdvo_connector->top_property == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001794 drm_connector_property_set_value(connector,
Chris Wilson615fb932010-08-04 13:50:24 +01001795 intel_sdvo_connector->bottom_property, val);
1796 if (intel_sdvo_connector->top_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001797 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001798
Chris Wilson615fb932010-08-04 13:50:24 +01001799 intel_sdvo_connector->top_margin = temp_value;
1800 intel_sdvo_connector->bottom_margin = temp_value;
1801 temp_value = intel_sdvo_connector->max_vscan -
1802 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001803 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilson615fb932010-08-04 13:50:24 +01001804 } else if (intel_sdvo_connector->bottom_property == property) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08001805 drm_connector_property_set_value(connector,
Chris Wilson615fb932010-08-04 13:50:24 +01001806 intel_sdvo_connector->top_property, val);
1807 if (intel_sdvo_connector->bottom_margin == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001808 return 0;
1809
Chris Wilson615fb932010-08-04 13:50:24 +01001810 intel_sdvo_connector->top_margin = temp_value;
1811 intel_sdvo_connector->bottom_margin = temp_value;
1812 temp_value = intel_sdvo_connector->max_vscan -
1813 intel_sdvo_connector->top_margin;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001814 cmd = SDVO_CMD_SET_OVERSCAN_V;
Chris Wilson615fb932010-08-04 13:50:24 +01001815 } else if (intel_sdvo_connector->hpos_property == property) {
1816 if (intel_sdvo_connector->cur_hpos == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001817 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001818
1819 cmd = SDVO_CMD_SET_POSITION_H;
Chris Wilson615fb932010-08-04 13:50:24 +01001820 intel_sdvo_connector->cur_hpos = temp_value;
1821 } else if (intel_sdvo_connector->vpos_property == property) {
1822 if (intel_sdvo_connector->cur_vpos == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001823 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001824
1825 cmd = SDVO_CMD_SET_POSITION_V;
Chris Wilson615fb932010-08-04 13:50:24 +01001826 intel_sdvo_connector->cur_vpos = temp_value;
1827 } else if (intel_sdvo_connector->saturation_property == property) {
1828 if (intel_sdvo_connector->cur_saturation == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001829 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001830
1831 cmd = SDVO_CMD_SET_SATURATION;
Chris Wilson615fb932010-08-04 13:50:24 +01001832 intel_sdvo_connector->cur_saturation = temp_value;
1833 } else if (intel_sdvo_connector->contrast_property == property) {
1834 if (intel_sdvo_connector->cur_contrast == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001835 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001836
1837 cmd = SDVO_CMD_SET_CONTRAST;
Chris Wilson615fb932010-08-04 13:50:24 +01001838 intel_sdvo_connector->cur_contrast = temp_value;
1839 } else if (intel_sdvo_connector->hue_property == property) {
1840 if (intel_sdvo_connector->cur_hue == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001841 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001842
1843 cmd = SDVO_CMD_SET_HUE;
Chris Wilson615fb932010-08-04 13:50:24 +01001844 intel_sdvo_connector->cur_hue = temp_value;
1845 } else if (intel_sdvo_connector->brightness_property == property) {
1846 if (intel_sdvo_connector->cur_brightness == temp_value)
Chris Wilson32aad862010-08-04 13:50:25 +01001847 return 0;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001848
1849 cmd = SDVO_CMD_SET_BRIGHTNESS;
Chris Wilson615fb932010-08-04 13:50:24 +01001850 intel_sdvo_connector->cur_brightness = temp_value;
Zhao Yakuib9219c52009-09-10 15:45:46 +08001851 }
1852 if (cmd) {
Chris Wilson32aad862010-08-04 13:50:25 +01001853 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
Zhao Yakuib9219c52009-09-10 15:45:46 +08001854 return -EINVAL;
Chris Wilson32aad862010-08-04 13:50:25 +01001855
Zhao Yakuib9219c52009-09-10 15:45:46 +08001856 changed = true;
1857 }
1858 }
Zhao Yakuice6feab2009-08-24 13:50:26 +08001859 if (changed && crtc)
1860 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1861 crtc->y, crtc->fb);
Chris Wilson32aad862010-08-04 13:50:25 +01001862 return 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08001863}
1864
Jesse Barnes79e53942008-11-07 14:24:08 -08001865static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1866 .dpms = intel_sdvo_dpms,
1867 .mode_fixup = intel_sdvo_mode_fixup,
1868 .prepare = intel_encoder_prepare,
1869 .mode_set = intel_sdvo_mode_set,
1870 .commit = intel_encoder_commit,
1871};
1872
1873static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -07001874 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -08001875 .detect = intel_sdvo_detect,
1876 .fill_modes = drm_helper_probe_single_connector_modes,
Zhao Yakuice6feab2009-08-24 13:50:26 +08001877 .set_property = intel_sdvo_set_property,
Jesse Barnes79e53942008-11-07 14:24:08 -08001878 .destroy = intel_sdvo_destroy,
1879};
1880
1881static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1882 .get_modes = intel_sdvo_get_modes,
1883 .mode_valid = intel_sdvo_mode_valid,
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001884 .best_encoder = intel_attached_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -08001885};
1886
Hannes Ederb358d0a2008-12-18 21:18:47 +01001887static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -08001888{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001889 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001890
Chris Wilsonea5b2132010-08-04 13:50:23 +01001891 if (intel_sdvo->analog_ddc_bus)
1892 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001893
Chris Wilsonea5b2132010-08-04 13:50:23 +01001894 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001895 drm_mode_destroy(encoder->dev,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001896 intel_sdvo->sdvo_lvds_fixed_mode);
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001897
Chris Wilsonea5b2132010-08-04 13:50:23 +01001898 intel_encoder_destroy(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -08001899}
1900
1901static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1902 .destroy = intel_sdvo_enc_destroy,
1903};
1904
1905
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001906/**
1907 * Choose the appropriate DDC bus for control bus switch command for this
1908 * SDVO output based on the controlled output.
1909 *
1910 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1911 * outputs, then LVDS outputs.
1912 */
1913static void
Adam Jacksonb1083332010-04-23 16:07:40 -04001914intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
Chris Wilsonea5b2132010-08-04 13:50:23 +01001915 struct intel_sdvo *sdvo, u32 reg)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001916{
Adam Jacksonb1083332010-04-23 16:07:40 -04001917 struct sdvo_device_mapping *mapping;
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001918
Adam Jacksonb1083332010-04-23 16:07:40 -04001919 if (IS_SDVOB(reg))
1920 mapping = &(dev_priv->sdvo_mappings[0]);
1921 else
1922 mapping = &(dev_priv->sdvo_mappings[1]);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001923
Adam Jacksonb1083332010-04-23 16:07:40 -04001924 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001925}
1926
1927static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01001928intel_sdvo_get_digital_encoding_mode(struct intel_sdvo *intel_sdvo, int device)
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001929{
Chris Wilson32aad862010-08-04 13:50:25 +01001930 return intel_sdvo_set_target_output(intel_sdvo,
1931 device == 0 ? SDVO_OUTPUT_TMDS0 : SDVO_OUTPUT_TMDS1) &&
1932 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1933 &intel_sdvo->is_hdmi, 1);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08001934}
1935
Chris Wilsonea5b2132010-08-04 13:50:23 +01001936static struct intel_sdvo *
1937intel_sdvo_chan_to_intel_sdvo(struct intel_i2c_chan *chan)
Ma Ling619ac3b2009-05-18 16:12:46 +08001938{
1939 struct drm_device *dev = chan->drm_dev;
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001940 struct drm_encoder *encoder;
Ma Ling619ac3b2009-05-18 16:12:46 +08001941
Zhenyu Wangd2a82a62010-03-29 21:22:55 +08001942 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01001943 struct intel_sdvo *intel_sdvo = enc_to_intel_sdvo(encoder);
1944 if (intel_sdvo->base.ddc_bus == &chan->adapter)
1945 return intel_sdvo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001946 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01001947
Chris Wilson32aad862010-08-04 13:50:25 +01001948 return NULL;
Ma Ling619ac3b2009-05-18 16:12:46 +08001949}
1950
1951static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap,
1952 struct i2c_msg msgs[], int num)
1953{
Chris Wilsonea5b2132010-08-04 13:50:23 +01001954 struct intel_sdvo *intel_sdvo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001955 struct i2c_algo_bit_data *algo_data;
Keith Packardf9c10a92009-05-30 12:16:25 -07001956 const struct i2c_algorithm *algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001957
1958 algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data;
Chris Wilsonea5b2132010-08-04 13:50:23 +01001959 intel_sdvo =
1960 intel_sdvo_chan_to_intel_sdvo((struct intel_i2c_chan *)
1961 (algo_data->data));
1962 if (intel_sdvo == NULL)
Ma Ling619ac3b2009-05-18 16:12:46 +08001963 return -EINVAL;
1964
Chris Wilsonea5b2132010-08-04 13:50:23 +01001965 algo = intel_sdvo->base.i2c_bus->algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08001966
Chris Wilsonea5b2132010-08-04 13:50:23 +01001967 intel_sdvo_set_control_bus_switch(intel_sdvo, intel_sdvo->ddc_bus);
Ma Ling619ac3b2009-05-18 16:12:46 +08001968 return algo->master_xfer(i2c_adap, msgs, num);
1969}
1970
1971static struct i2c_algorithm intel_sdvo_i2c_bit_algo = {
1972 .master_xfer = intel_sdvo_master_xfer,
1973};
1974
yakui_zhao714605e2009-05-31 17:18:07 +08001975static u8
Eric Anholtc751ce42010-03-25 11:48:48 -07001976intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
yakui_zhao714605e2009-05-31 17:18:07 +08001977{
1978 struct drm_i915_private *dev_priv = dev->dev_private;
1979 struct sdvo_device_mapping *my_mapping, *other_mapping;
1980
Zhao Yakui461ed3c2010-03-30 15:11:33 +08001981 if (IS_SDVOB(sdvo_reg)) {
yakui_zhao714605e2009-05-31 17:18:07 +08001982 my_mapping = &dev_priv->sdvo_mappings[0];
1983 other_mapping = &dev_priv->sdvo_mappings[1];
1984 } else {
1985 my_mapping = &dev_priv->sdvo_mappings[1];
1986 other_mapping = &dev_priv->sdvo_mappings[0];
1987 }
1988
1989 /* If the BIOS described our SDVO device, take advantage of it. */
1990 if (my_mapping->slave_addr)
1991 return my_mapping->slave_addr;
1992
1993 /* If the BIOS only described a different SDVO device, use the
1994 * address that it isn't using.
1995 */
1996 if (other_mapping->slave_addr) {
1997 if (other_mapping->slave_addr == 0x70)
1998 return 0x72;
1999 else
2000 return 0x70;
2001 }
2002
2003 /* No SDVO device info is found for another DVO port,
2004 * so use mapping assumption we had before BIOS parsing.
2005 */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002006 if (IS_SDVOB(sdvo_reg))
yakui_zhao714605e2009-05-31 17:18:07 +08002007 return 0x70;
2008 else
2009 return 0x72;
2010}
2011
Zhenyu Wang14571b42010-03-30 14:06:33 +08002012static void
Chris Wilson32aad862010-08-04 13:50:25 +01002013intel_sdvo_connector_init(struct drm_encoder *encoder,
2014 struct drm_connector *connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002015{
2016 drm_connector_init(encoder->dev, connector, &intel_sdvo_connector_funcs,
2017 connector->connector_type);
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002018
Zhenyu Wang14571b42010-03-30 14:06:33 +08002019 drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs);
2020
2021 connector->interlace_allowed = 0;
2022 connector->doublescan_allowed = 0;
2023 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
2024
2025 drm_mode_connector_attach_encoder(connector, encoder);
2026 drm_sysfs_connector_add(connector);
2027}
2028
2029static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002030intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002031{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002032 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002033 struct drm_connector *connector;
2034 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002035 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002036
Chris Wilson615fb932010-08-04 13:50:24 +01002037 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2038 if (!intel_sdvo_connector)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002039 return false;
2040
Zhenyu Wang14571b42010-03-30 14:06:33 +08002041 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002042 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002043 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002044 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002045 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002046 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002047 }
2048
Chris Wilson615fb932010-08-04 13:50:24 +01002049 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002050 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002051 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002052 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2053 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2054
Chris Wilsonea5b2132010-08-04 13:50:23 +01002055 if (intel_sdvo_get_supp_encode(intel_sdvo, &intel_sdvo->encode)
2056 && intel_sdvo_get_digital_encoding_mode(intel_sdvo, device)
2057 && intel_sdvo->is_hdmi) {
Zhenyu Wang14571b42010-03-30 14:06:33 +08002058 /* enable hdmi encoding mode if supported */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002059 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
2060 intel_sdvo_set_colorimetry(intel_sdvo,
Zhenyu Wang14571b42010-03-30 14:06:33 +08002061 SDVO_COLORIMETRY_RGB256);
2062 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2063 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002064 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2065 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002066
Chris Wilson32aad862010-08-04 13:50:25 +01002067 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002068
2069 return true;
2070}
2071
2072static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002073intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002074{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002075 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002076 struct drm_connector *connector;
2077 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002078 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002079
Chris Wilson615fb932010-08-04 13:50:24 +01002080 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2081 if (!intel_sdvo_connector)
2082 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002083
Chris Wilson615fb932010-08-04 13:50:24 +01002084 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002085 connector = &intel_connector->base;
2086 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2087 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002088
Chris Wilsonea5b2132010-08-04 13:50:23 +01002089 intel_sdvo->controlled_output |= type;
Chris Wilson615fb932010-08-04 13:50:24 +01002090 intel_sdvo_connector->output_flag = type;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002091
Chris Wilsonea5b2132010-08-04 13:50:23 +01002092 intel_sdvo->is_tv = true;
2093 intel_sdvo->base.needs_tv_clock = true;
2094 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002095
Chris Wilson32aad862010-08-04 13:50:25 +01002096 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002097
Chris Wilson32aad862010-08-04 13:50:25 +01002098 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2099 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002100
Chris Wilson32aad862010-08-04 13:50:25 +01002101 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2102 goto err;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002103
2104 return true;
Chris Wilson32aad862010-08-04 13:50:25 +01002105
2106err:
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002107 intel_sdvo_destroy_enhance_property(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002108 kfree(intel_sdvo_connector);
2109 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002110}
2111
2112static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002113intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002114{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002115 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002116 struct drm_connector *connector;
2117 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002118 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002119
Chris Wilson615fb932010-08-04 13:50:24 +01002120 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2121 if (!intel_sdvo_connector)
2122 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002123
Chris Wilson615fb932010-08-04 13:50:24 +01002124 intel_connector = &intel_sdvo_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002125 connector = &intel_connector->base;
Dave Airlieeb1f8e42010-05-07 06:42:51 +00002126 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002127 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2128 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002129
2130 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002131 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
Chris Wilson615fb932010-08-04 13:50:24 +01002132 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002133 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002134 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
Chris Wilson615fb932010-08-04 13:50:24 +01002135 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002136 }
2137
Chris Wilsonea5b2132010-08-04 13:50:23 +01002138 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2139 (1 << INTEL_ANALOG_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002140
Chris Wilson32aad862010-08-04 13:50:25 +01002141 intel_sdvo_connector_init(encoder, connector);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002142 return true;
2143}
2144
2145static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002146intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
Zhenyu Wang14571b42010-03-30 14:06:33 +08002147{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002148 struct drm_encoder *encoder = &intel_sdvo->base.enc;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002149 struct drm_connector *connector;
2150 struct intel_connector *intel_connector;
Chris Wilson615fb932010-08-04 13:50:24 +01002151 struct intel_sdvo_connector *intel_sdvo_connector;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002152
Chris Wilson615fb932010-08-04 13:50:24 +01002153 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2154 if (!intel_sdvo_connector)
2155 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002156
Chris Wilson615fb932010-08-04 13:50:24 +01002157 intel_connector = &intel_sdvo_connector->base;
2158 connector = &intel_connector->base;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002159 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2160 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002161
Chris Wilsonea5b2132010-08-04 13:50:23 +01002162 intel_sdvo->is_lvds = true;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002163
2164 if (device == 0) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002165 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
Chris Wilson615fb932010-08-04 13:50:24 +01002166 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002167 } else if (device == 1) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002168 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
Chris Wilson615fb932010-08-04 13:50:24 +01002169 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002170 }
2171
Chris Wilsonea5b2132010-08-04 13:50:23 +01002172 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2173 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
Zhenyu Wang14571b42010-03-30 14:06:33 +08002174
Chris Wilson32aad862010-08-04 13:50:25 +01002175 intel_sdvo_connector_init(encoder, connector);
2176 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2177 goto err;
2178
2179 return true;
2180
2181err:
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002182 intel_sdvo_destroy_enhance_property(connector);
Chris Wilson32aad862010-08-04 13:50:25 +01002183 kfree(intel_sdvo_connector);
2184 return false;
Zhenyu Wang14571b42010-03-30 14:06:33 +08002185}
Zhao Yakui6070a4a2010-02-08 21:35:12 +08002186
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002187static bool
Chris Wilsonea5b2132010-08-04 13:50:23 +01002188intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002189{
Chris Wilsonea5b2132010-08-04 13:50:23 +01002190 intel_sdvo->is_tv = false;
2191 intel_sdvo->base.needs_tv_clock = false;
2192 intel_sdvo->is_lvds = false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002193
Zhenyu Wang14571b42010-03-30 14:06:33 +08002194 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002195
Zhenyu Wang14571b42010-03-30 14:06:33 +08002196 if (flags & SDVO_OUTPUT_TMDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002197 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002198 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002199
Zhenyu Wang14571b42010-03-30 14:06:33 +08002200 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002201 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002202 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002203
Zhenyu Wang14571b42010-03-30 14:06:33 +08002204 /* TV has no XXX1 function block */
Zhenyu Wanga1f4b7ff2010-03-29 23:16:13 +08002205 if (flags & SDVO_OUTPUT_SVID0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002206 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002207 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002208
Zhenyu Wang14571b42010-03-30 14:06:33 +08002209 if (flags & SDVO_OUTPUT_CVBS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002210 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002211 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002212
Zhenyu Wang14571b42010-03-30 14:06:33 +08002213 if (flags & SDVO_OUTPUT_RGB0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002214 if (!intel_sdvo_analog_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002215 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002216
Zhenyu Wang14571b42010-03-30 14:06:33 +08002217 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002218 if (!intel_sdvo_analog_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002219 return false;
Zhao Yakui2dd87382010-01-27 16:32:46 +08002220
Zhenyu Wang14571b42010-03-30 14:06:33 +08002221 if (flags & SDVO_OUTPUT_LVDS0)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002222 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002223 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002224
Zhenyu Wang14571b42010-03-30 14:06:33 +08002225 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
Chris Wilsonea5b2132010-08-04 13:50:23 +01002226 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
Zhenyu Wang14571b42010-03-30 14:06:33 +08002227 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002228
Zhenyu Wang14571b42010-03-30 14:06:33 +08002229 if ((flags & SDVO_OUTPUT_MASK) == 0) {
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002230 unsigned char bytes[2];
2231
Chris Wilsonea5b2132010-08-04 13:50:23 +01002232 intel_sdvo->controlled_output = 0;
2233 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
Dave Airlie51c8b402009-08-20 13:38:04 +10002234 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002235 SDVO_NAME(intel_sdvo),
Dave Airlie51c8b402009-08-20 13:38:04 +10002236 bytes[0], bytes[1]);
Zhenyu Wang14571b42010-03-30 14:06:33 +08002237 return false;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002238 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002239 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002240
Zhenyu Wang14571b42010-03-30 14:06:33 +08002241 return true;
ling.ma@intel.comfb7a46f2009-07-23 17:11:34 +08002242}
2243
Chris Wilson32aad862010-08-04 13:50:25 +01002244static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2245 struct intel_sdvo_connector *intel_sdvo_connector,
2246 int type)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002247{
Chris Wilson32aad862010-08-04 13:50:25 +01002248 struct drm_device *dev = intel_sdvo->base.enc.dev;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002249 struct intel_sdvo_tv_format format;
2250 uint32_t format_map, i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002251
Chris Wilson32aad862010-08-04 13:50:25 +01002252 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2253 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002254
Chris Wilson32aad862010-08-04 13:50:25 +01002255 if (!intel_sdvo_get_value(intel_sdvo,
2256 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2257 &format, sizeof(format)))
2258 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002259
Chris Wilson32aad862010-08-04 13:50:25 +01002260 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
Zhao Yakuice6feab2009-08-24 13:50:26 +08002261
2262 if (format_map == 0)
Chris Wilson32aad862010-08-04 13:50:25 +01002263 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002264
Chris Wilson615fb932010-08-04 13:50:24 +01002265 intel_sdvo_connector->format_supported_num = 0;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002266 for (i = 0 ; i < TV_FORMAT_NUM; i++)
Chris Wilson40039752010-08-04 13:50:26 +01002267 if (format_map & (1 << i))
2268 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002269
2270
Chris Wilson615fb932010-08-04 13:50:24 +01002271 intel_sdvo_connector->tv_format_property =
Chris Wilson32aad862010-08-04 13:50:25 +01002272 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2273 "mode", intel_sdvo_connector->format_supported_num);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002274 if (!intel_sdvo_connector->tv_format_property)
2275 return false;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002276
Chris Wilson615fb932010-08-04 13:50:24 +01002277 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
Zhao Yakuice6feab2009-08-24 13:50:26 +08002278 drm_property_add_enum(
Chris Wilson615fb932010-08-04 13:50:24 +01002279 intel_sdvo_connector->tv_format_property, i,
Chris Wilson40039752010-08-04 13:50:26 +01002280 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
Zhao Yakuice6feab2009-08-24 13:50:26 +08002281
Chris Wilson40039752010-08-04 13:50:26 +01002282 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
Chris Wilson32aad862010-08-04 13:50:25 +01002283 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2284 intel_sdvo_connector->tv_format_property, 0);
2285 return true;
Zhao Yakuice6feab2009-08-24 13:50:26 +08002286
2287}
2288
Chris Wilson32aad862010-08-04 13:50:25 +01002289static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2290 struct intel_sdvo_connector *intel_sdvo_connector)
Zhao Yakuib9219c52009-09-10 15:45:46 +08002291{
Chris Wilson32aad862010-08-04 13:50:25 +01002292 struct drm_device *dev = intel_sdvo->base.enc.dev;
2293 struct drm_connector *connector = &intel_sdvo_connector->base.base;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002294 struct intel_sdvo_enhancements_reply sdvo_data;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002295 uint16_t response, data_value[2];
2296
Chris Wilson32aad862010-08-04 13:50:25 +01002297 if (!intel_sdvo_get_value(intel_sdvo,
2298 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2299 &sdvo_data, sizeof(sdvo_data)))
2300 return false;
2301
Zhao Yakuib9219c52009-09-10 15:45:46 +08002302 response = *((uint16_t *)&sdvo_data);
2303 if (!response) {
2304 DRM_DEBUG_KMS("No enhancement is supported\n");
Chris Wilson32aad862010-08-04 13:50:25 +01002305 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002306 }
Chris Wilsonea5b2132010-08-04 13:50:23 +01002307 if (IS_TV(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002308 /* when horizontal overscan is supported, Add the left/right
2309 * property
2310 */
2311 if (sdvo_data.overscan_h) {
Chris Wilson32aad862010-08-04 13:50:25 +01002312 if (!intel_sdvo_get_value(intel_sdvo,
2313 SDVO_CMD_GET_MAX_OVERSCAN_H,
2314 &data_value, 4))
2315 return false;
2316
2317 if (!intel_sdvo_get_value(intel_sdvo,
2318 SDVO_CMD_GET_OVERSCAN_H,
2319 &response, 2))
2320 return false;
2321
Chris Wilsonea5b2132010-08-04 13:50:23 +01002322 intel_sdvo_connector->max_hscan = data_value[0];
2323 intel_sdvo_connector->left_margin = data_value[0] - response;
2324 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2325 intel_sdvo_connector->left_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002326 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2327 "left_margin", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002328 if (!intel_sdvo_connector->left_property)
2329 return false;
2330
Chris Wilsonea5b2132010-08-04 13:50:23 +01002331 intel_sdvo_connector->left_property->values[0] = 0;
2332 intel_sdvo_connector->left_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002333 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002334 intel_sdvo_connector->left_property,
2335 intel_sdvo_connector->left_margin);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002336
Chris Wilsonea5b2132010-08-04 13:50:23 +01002337 intel_sdvo_connector->right_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002338 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2339 "right_margin", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002340 if (!intel_sdvo_connector->right_property)
2341 return false;
2342
Chris Wilsonea5b2132010-08-04 13:50:23 +01002343 intel_sdvo_connector->right_property->values[0] = 0;
2344 intel_sdvo_connector->right_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002345 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002346 intel_sdvo_connector->right_property,
2347 intel_sdvo_connector->right_margin);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002348 DRM_DEBUG_KMS("h_overscan: max %d, "
2349 "default %d, current %d\n",
2350 data_value[0], data_value[1], response);
2351 }
2352 if (sdvo_data.overscan_v) {
Chris Wilson32aad862010-08-04 13:50:25 +01002353 if (!intel_sdvo_get_value(intel_sdvo,
2354 SDVO_CMD_GET_MAX_OVERSCAN_V,
2355 &data_value, 4))
2356 return false;
2357
2358 if (!intel_sdvo_get_value(intel_sdvo,
2359 SDVO_CMD_GET_OVERSCAN_V,
2360 &response, 2))
2361 return false;
2362
Chris Wilsonea5b2132010-08-04 13:50:23 +01002363 intel_sdvo_connector->max_vscan = data_value[0];
2364 intel_sdvo_connector->top_margin = data_value[0] - response;
2365 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2366 intel_sdvo_connector->top_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002367 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2368 "top_margin", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002369 if (!intel_sdvo_connector->top_property)
2370 return false;
2371
Chris Wilsonea5b2132010-08-04 13:50:23 +01002372 intel_sdvo_connector->top_property->values[0] = 0;
2373 intel_sdvo_connector->top_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002374 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002375 intel_sdvo_connector->top_property,
2376 intel_sdvo_connector->top_margin);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002377
Chris Wilsonea5b2132010-08-04 13:50:23 +01002378 intel_sdvo_connector->bottom_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002379 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2380 "bottom_margin", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002381 if (!intel_sdvo_connector->bottom_property)
2382 return false;
2383
Chris Wilsonea5b2132010-08-04 13:50:23 +01002384 intel_sdvo_connector->bottom_property->values[0] = 0;
2385 intel_sdvo_connector->bottom_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002386 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002387 intel_sdvo_connector->bottom_property,
2388 intel_sdvo_connector->bottom_margin);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002389 DRM_DEBUG_KMS("v_overscan: max %d, "
2390 "default %d, current %d\n",
2391 data_value[0], data_value[1], response);
2392 }
2393 if (sdvo_data.position_h) {
Chris Wilson32aad862010-08-04 13:50:25 +01002394 if (!intel_sdvo_get_value(intel_sdvo,
2395 SDVO_CMD_GET_MAX_POSITION_H,
2396 &data_value, 4))
2397 return false;
2398
2399 if (!intel_sdvo_get_value(intel_sdvo,
2400 SDVO_CMD_GET_POSITION_H,
2401 &response, 2))
2402 return false;
2403
Chris Wilsonea5b2132010-08-04 13:50:23 +01002404 intel_sdvo_connector->max_hpos = data_value[0];
2405 intel_sdvo_connector->cur_hpos = response;
2406 intel_sdvo_connector->hpos_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002407 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2408 "hpos", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002409 if (!intel_sdvo_connector->hpos_property)
2410 return false;
2411
Chris Wilsonea5b2132010-08-04 13:50:23 +01002412 intel_sdvo_connector->hpos_property->values[0] = 0;
2413 intel_sdvo_connector->hpos_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002414 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002415 intel_sdvo_connector->hpos_property,
2416 intel_sdvo_connector->cur_hpos);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002417 DRM_DEBUG_KMS("h_position: max %d, "
2418 "default %d, current %d\n",
2419 data_value[0], data_value[1], response);
2420 }
2421 if (sdvo_data.position_v) {
Chris Wilson32aad862010-08-04 13:50:25 +01002422 if (!intel_sdvo_get_value(intel_sdvo,
2423 SDVO_CMD_GET_MAX_POSITION_V,
2424 &data_value, 4))
2425 return false;
2426
2427 if (!intel_sdvo_get_value(intel_sdvo,
2428 SDVO_CMD_GET_POSITION_V,
2429 &response, 2))
2430 return false;
2431
Chris Wilsonea5b2132010-08-04 13:50:23 +01002432 intel_sdvo_connector->max_vpos = data_value[0];
2433 intel_sdvo_connector->cur_vpos = response;
2434 intel_sdvo_connector->vpos_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002435 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2436 "vpos", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002437 if (!intel_sdvo_connector->vpos_property)
2438 return false;
2439
Chris Wilsonea5b2132010-08-04 13:50:23 +01002440 intel_sdvo_connector->vpos_property->values[0] = 0;
2441 intel_sdvo_connector->vpos_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002442 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002443 intel_sdvo_connector->vpos_property,
2444 intel_sdvo_connector->cur_vpos);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002445 DRM_DEBUG_KMS("v_position: max %d, "
2446 "default %d, current %d\n",
2447 data_value[0], data_value[1], response);
2448 }
Zhao Yakuib9219c52009-09-10 15:45:46 +08002449 if (sdvo_data.saturation) {
Chris Wilson32aad862010-08-04 13:50:25 +01002450 if (!intel_sdvo_get_value(intel_sdvo,
2451 SDVO_CMD_GET_MAX_SATURATION,
2452 &data_value, 4))
2453 return false;
2454
2455 if (!intel_sdvo_get_value(intel_sdvo,
2456 SDVO_CMD_GET_SATURATION,
2457 &response, 2))
2458 return false;
2459
Chris Wilsonea5b2132010-08-04 13:50:23 +01002460 intel_sdvo_connector->max_saturation = data_value[0];
2461 intel_sdvo_connector->cur_saturation = response;
2462 intel_sdvo_connector->saturation_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002463 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2464 "saturation", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002465 if (!intel_sdvo_connector->saturation_property)
2466 return false;
2467
Chris Wilsonea5b2132010-08-04 13:50:23 +01002468 intel_sdvo_connector->saturation_property->values[0] = 0;
2469 intel_sdvo_connector->saturation_property->values[1] =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002470 data_value[0];
2471 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002472 intel_sdvo_connector->saturation_property,
2473 intel_sdvo_connector->cur_saturation);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002474 DRM_DEBUG_KMS("saturation: max %d, "
2475 "default %d, current %d\n",
2476 data_value[0], data_value[1], response);
2477 }
2478 if (sdvo_data.contrast) {
Chris Wilson32aad862010-08-04 13:50:25 +01002479 if (!intel_sdvo_get_value(intel_sdvo,
2480 SDVO_CMD_GET_MAX_CONTRAST, &data_value, 4))
2481 return false;
2482
2483 if (!intel_sdvo_get_value(intel_sdvo,
2484 SDVO_CMD_GET_CONTRAST, &response, 2))
2485 return false;
2486
Chris Wilsonea5b2132010-08-04 13:50:23 +01002487 intel_sdvo_connector->max_contrast = data_value[0];
2488 intel_sdvo_connector->cur_contrast = response;
2489 intel_sdvo_connector->contrast_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002490 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2491 "contrast", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002492 if (!intel_sdvo_connector->contrast_property)
2493 return false;
2494
Chris Wilsonea5b2132010-08-04 13:50:23 +01002495 intel_sdvo_connector->contrast_property->values[0] = 0;
2496 intel_sdvo_connector->contrast_property->values[1] = data_value[0];
Zhao Yakuib9219c52009-09-10 15:45:46 +08002497 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002498 intel_sdvo_connector->contrast_property,
2499 intel_sdvo_connector->cur_contrast);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002500 DRM_DEBUG_KMS("contrast: max %d, "
2501 "default %d, current %d\n",
2502 data_value[0], data_value[1], response);
2503 }
2504 if (sdvo_data.hue) {
Chris Wilson32aad862010-08-04 13:50:25 +01002505 if (!intel_sdvo_get_value(intel_sdvo,
2506 SDVO_CMD_GET_MAX_HUE, &data_value, 4))
2507 return false;
2508
2509 if (!intel_sdvo_get_value(intel_sdvo,
2510 SDVO_CMD_GET_HUE, &response, 2))
2511 return false;
2512
Chris Wilsonea5b2132010-08-04 13:50:23 +01002513 intel_sdvo_connector->max_hue = data_value[0];
2514 intel_sdvo_connector->cur_hue = response;
2515 intel_sdvo_connector->hue_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002516 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2517 "hue", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002518 if (!intel_sdvo_connector->hue_property)
2519 return false;
2520
Chris Wilsonea5b2132010-08-04 13:50:23 +01002521 intel_sdvo_connector->hue_property->values[0] = 0;
2522 intel_sdvo_connector->hue_property->values[1] =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002523 data_value[0];
2524 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002525 intel_sdvo_connector->hue_property,
2526 intel_sdvo_connector->cur_hue);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002527 DRM_DEBUG_KMS("hue: max %d, default %d, current %d\n",
2528 data_value[0], data_value[1], response);
2529 }
2530 }
Chris Wilson32aad862010-08-04 13:50:25 +01002531 if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
Zhao Yakuib9219c52009-09-10 15:45:46 +08002532 if (sdvo_data.brightness) {
Chris Wilson32aad862010-08-04 13:50:25 +01002533 if (!intel_sdvo_get_value(intel_sdvo,
2534 SDVO_CMD_GET_MAX_BRIGHTNESS, &data_value, 4))
2535 return false;
2536
2537 if (!intel_sdvo_get_value(intel_sdvo,
2538 SDVO_CMD_GET_BRIGHTNESS, &response, 2))
2539 return false;
2540
Chris Wilsonea5b2132010-08-04 13:50:23 +01002541 intel_sdvo_connector->max_brightness = data_value[0];
2542 intel_sdvo_connector->cur_brightness = response;
2543 intel_sdvo_connector->brightness_property =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002544 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2545 "brightness", 2);
Chris Wilsonfcc8d672010-08-04 13:50:27 +01002546 if (!intel_sdvo_connector->brightness_property)
2547 return false;
2548
Chris Wilsonea5b2132010-08-04 13:50:23 +01002549 intel_sdvo_connector->brightness_property->values[0] = 0;
2550 intel_sdvo_connector->brightness_property->values[1] =
Zhao Yakuib9219c52009-09-10 15:45:46 +08002551 data_value[0];
2552 drm_connector_attach_property(connector,
Chris Wilsonea5b2132010-08-04 13:50:23 +01002553 intel_sdvo_connector->brightness_property,
2554 intel_sdvo_connector->cur_brightness);
Zhao Yakuib9219c52009-09-10 15:45:46 +08002555 DRM_DEBUG_KMS("brightness: max %d, "
2556 "default %d, current %d\n",
2557 data_value[0], data_value[1], response);
2558 }
2559 }
Chris Wilson32aad862010-08-04 13:50:25 +01002560 return true;
Zhao Yakuib9219c52009-09-10 15:45:46 +08002561}
2562
Eric Anholtc751ce42010-03-25 11:48:48 -07002563bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
Jesse Barnes79e53942008-11-07 14:24:08 -08002564{
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002565 struct drm_i915_private *dev_priv = dev->dev_private;
Eric Anholt21d40d32010-03-25 11:11:14 -07002566 struct intel_encoder *intel_encoder;
Chris Wilsonea5b2132010-08-04 13:50:23 +01002567 struct intel_sdvo *intel_sdvo;
Jesse Barnes79e53942008-11-07 14:24:08 -08002568 u8 ch[0x40];
2569 int i;
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002570 u32 i2c_reg, ddc_reg, analog_ddc_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -08002571
Chris Wilsonea5b2132010-08-04 13:50:23 +01002572 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2573 if (!intel_sdvo)
Eric Anholt7d573822009-01-02 13:33:00 -08002574 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002575
Chris Wilsonea5b2132010-08-04 13:50:23 +01002576 intel_sdvo->sdvo_reg = sdvo_reg;
Keith Packard308cd3a2009-06-14 11:56:18 -07002577
Chris Wilsonea5b2132010-08-04 13:50:23 +01002578 intel_encoder = &intel_sdvo->base;
Eric Anholt21d40d32010-03-25 11:11:14 -07002579 intel_encoder->type = INTEL_OUTPUT_SDVO;
Jesse Barnes79e53942008-11-07 14:24:08 -08002580
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002581 if (HAS_PCH_SPLIT(dev)) {
2582 i2c_reg = PCH_GPIOE;
2583 ddc_reg = PCH_GPIOE;
2584 analog_ddc_reg = PCH_GPIOA;
2585 } else {
2586 i2c_reg = GPIOE;
2587 ddc_reg = GPIOE;
2588 analog_ddc_reg = GPIOA;
2589 }
2590
Jesse Barnes79e53942008-11-07 14:24:08 -08002591 /* setup the DDC bus. */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002592 if (IS_SDVOB(sdvo_reg))
2593 intel_encoder->i2c_bus = intel_i2c_create(dev, i2c_reg, "SDVOCTRL_E for SDVOB");
Keith Packard308cd3a2009-06-14 11:56:18 -07002594 else
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002595 intel_encoder->i2c_bus = intel_i2c_create(dev, i2c_reg, "SDVOCTRL_E for SDVOC");
Keith Packard308cd3a2009-06-14 11:56:18 -07002596
Eric Anholt21d40d32010-03-25 11:11:14 -07002597 if (!intel_encoder->i2c_bus)
Jonas Bonnad5b2a62009-05-15 09:10:41 +02002598 goto err_inteloutput;
Jesse Barnes79e53942008-11-07 14:24:08 -08002599
Chris Wilsonea5b2132010-08-04 13:50:23 +01002600 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg);
Jesse Barnes79e53942008-11-07 14:24:08 -08002601
Keith Packard308cd3a2009-06-14 11:56:18 -07002602 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
Eric Anholt21d40d32010-03-25 11:11:14 -07002603 intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality;
Jesse Barnes79e53942008-11-07 14:24:08 -08002604
Jesse Barnes79e53942008-11-07 14:24:08 -08002605 /* Read the regs to test if we can talk to the device */
2606 for (i = 0; i < 0x40; i++) {
Chris Wilsonea5b2132010-08-04 13:50:23 +01002607 if (!intel_sdvo_read_byte(intel_sdvo, i, &ch[i])) {
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002608 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002609 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Jesse Barnes79e53942008-11-07 14:24:08 -08002610 goto err_i2c;
2611 }
2612 }
2613
Ma Ling619ac3b2009-05-18 16:12:46 +08002614 /* setup the DDC bus. */
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002615 if (IS_SDVOB(sdvo_reg)) {
2616 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOB DDC BUS");
Chris Wilsonea5b2132010-08-04 13:50:23 +01002617 intel_sdvo->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg,
Keith Packard57cdaf92009-09-04 13:07:54 +08002618 "SDVOB/VGA DDC BUS");
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002619 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
Keith Packard57cdaf92009-09-04 13:07:54 +08002620 } else {
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002621 intel_encoder->ddc_bus = intel_i2c_create(dev, ddc_reg, "SDVOC DDC BUS");
Chris Wilsonea5b2132010-08-04 13:50:23 +01002622 intel_sdvo->analog_ddc_bus = intel_i2c_create(dev, analog_ddc_reg,
Keith Packard57cdaf92009-09-04 13:07:54 +08002623 "SDVOC/VGA DDC BUS");
Jesse Barnesb01f2c32009-12-11 11:07:17 -08002624 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
Keith Packard57cdaf92009-09-04 13:07:54 +08002625 }
Chris Wilson32aad862010-08-04 13:50:25 +01002626 if (intel_encoder->ddc_bus == NULL || intel_sdvo->analog_ddc_bus == NULL)
Ma Ling619ac3b2009-05-18 16:12:46 +08002627 goto err_i2c;
2628
Keith Packard308cd3a2009-06-14 11:56:18 -07002629 /* Wrap with our custom algo which switches to DDC mode */
Eric Anholt21d40d32010-03-25 11:11:14 -07002630 intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
Ma Ling619ac3b2009-05-18 16:12:46 +08002631
Zhenyu Wang14571b42010-03-30 14:06:33 +08002632 /* encoder type will be decided later */
2633 drm_encoder_init(dev, &intel_encoder->enc, &intel_sdvo_enc_funcs, 0);
2634 drm_encoder_helper_add(&intel_encoder->enc, &intel_sdvo_helper_funcs);
2635
André Goddard Rosaaf901ca2009-11-14 13:09:05 -02002636 /* In default case sdvo lvds is false */
Chris Wilson32aad862010-08-04 13:50:25 +01002637 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2638 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002639
Chris Wilsonea5b2132010-08-04 13:50:23 +01002640 if (intel_sdvo_output_setup(intel_sdvo,
2641 intel_sdvo->caps.output_flags) != true) {
Dave Airlie51c8b402009-08-20 13:38:04 +10002642 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
Zhao Yakui461ed3c2010-03-30 15:11:33 +08002643 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
Chris Wilson32aad862010-08-04 13:50:25 +01002644 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002645 }
2646
Chris Wilsonea5b2132010-08-04 13:50:23 +01002647 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
Jesse Barnese2f0ba92009-02-02 15:11:52 -08002648
Jesse Barnes79e53942008-11-07 14:24:08 -08002649 /* Set the input timing to the screen. Assume always input 0. */
Chris Wilson32aad862010-08-04 13:50:25 +01002650 if (!intel_sdvo_set_target_input(intel_sdvo))
2651 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002652
Chris Wilson32aad862010-08-04 13:50:25 +01002653 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2654 &intel_sdvo->pixel_clock_min,
2655 &intel_sdvo->pixel_clock_max))
2656 goto err_enc;
Jesse Barnes79e53942008-11-07 14:24:08 -08002657
Zhao Yakui8a4c47f2009-07-20 13:48:04 +08002658 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
yakui_zhao342dc382009-06-02 14:12:00 +08002659 "clock range %dMHz - %dMHz, "
2660 "input 1: %c, input 2: %c, "
2661 "output 1: %c, output 2: %c\n",
Chris Wilsonea5b2132010-08-04 13:50:23 +01002662 SDVO_NAME(intel_sdvo),
2663 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2664 intel_sdvo->caps.device_rev_id,
2665 intel_sdvo->pixel_clock_min / 1000,
2666 intel_sdvo->pixel_clock_max / 1000,
2667 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2668 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
yakui_zhao342dc382009-06-02 14:12:00 +08002669 /* check currently supported outputs */
Chris Wilsonea5b2132010-08-04 13:50:23 +01002670 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002671 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
Chris Wilsonea5b2132010-08-04 13:50:23 +01002672 intel_sdvo->caps.output_flags &
Jesse Barnes79e53942008-11-07 14:24:08 -08002673 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
Eric Anholt7d573822009-01-02 13:33:00 -08002674 return true;
Jesse Barnes79e53942008-11-07 14:24:08 -08002675
Chris Wilson32aad862010-08-04 13:50:25 +01002676err_enc:
2677 drm_encoder_cleanup(&intel_encoder->enc);
Jesse Barnes79e53942008-11-07 14:24:08 -08002678err_i2c:
Chris Wilsonea5b2132010-08-04 13:50:23 +01002679 if (intel_sdvo->analog_ddc_bus != NULL)
2680 intel_i2c_destroy(intel_sdvo->analog_ddc_bus);
Eric Anholt21d40d32010-03-25 11:11:14 -07002681 if (intel_encoder->ddc_bus != NULL)
2682 intel_i2c_destroy(intel_encoder->ddc_bus);
2683 if (intel_encoder->i2c_bus != NULL)
2684 intel_i2c_destroy(intel_encoder->i2c_bus);
Jonas Bonnad5b2a62009-05-15 09:10:41 +02002685err_inteloutput:
Chris Wilsonea5b2132010-08-04 13:50:23 +01002686 kfree(intel_sdvo);
Jesse Barnes79e53942008-11-07 14:24:08 -08002687
Eric Anholt7d573822009-01-02 13:33:00 -08002688 return false;
Jesse Barnes79e53942008-11-07 14:24:08 -08002689}