Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
Reinette Chatre | eb7ae89 | 2008-03-11 16:17:17 -0700 | [diff] [blame] | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of version 2 of the GNU General Public License as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., |
| 16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 17 | * |
| 18 | * The full GNU General Public License is included in this distribution in the |
| 19 | * file called LICENSE. |
| 20 | * |
| 21 | * Contact Information: |
| 22 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> |
| 23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 24 | * |
| 25 | *****************************************************************************/ |
| 26 | |
| 27 | #include <linux/kernel.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/version.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/pci.h> |
| 32 | #include <linux/dma-mapping.h> |
| 33 | #include <linux/delay.h> |
| 34 | #include <linux/skbuff.h> |
| 35 | #include <linux/netdevice.h> |
| 36 | #include <linux/wireless.h> |
| 37 | #include <net/mac80211.h> |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 38 | #include <linux/etherdevice.h> |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 39 | #include <asm/unaligned.h> |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 40 | |
Assaf Krauss | 6bc913b | 2008-03-11 16:17:18 -0700 | [diff] [blame] | 41 | #include "iwl-eeprom.h" |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 42 | #include "iwl-4965.h" |
Tomas Winkler | fee1247 | 2008-04-03 16:05:21 -0700 | [diff] [blame] | 43 | #include "iwl-core.h" |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 44 | #include "iwl-io.h" |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 45 | #include "iwl-helpers.h" |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 46 | #include "iwl-calib.h" |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 47 | |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 48 | /* module parameters */ |
| 49 | static struct iwl_mod_params iwl4965_mod_params = { |
Ron Rindjunsky | dfe7d45 | 2008-04-15 16:01:45 -0700 | [diff] [blame] | 50 | .num_of_queues = IWL4965_MAX_NUM_QUEUES, |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 51 | .enable_qos = 1, |
| 52 | .amsdu_size_8K = 1, |
| 53 | /* the rest are 0 by default */ |
| 54 | }; |
| 55 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 56 | static void iwl4965_hw_card_show_info(struct iwl_priv *priv); |
Christoph Hellwig | 416e143 | 2007-10-25 17:15:49 +0800 | [diff] [blame] | 57 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 58 | #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \ |
| 59 | [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \ |
| 60 | IWL_RATE_SISO_##s##M_PLCP, \ |
| 61 | IWL_RATE_MIMO_##s##M_PLCP, \ |
| 62 | IWL_RATE_##r##M_IEEE, \ |
| 63 | IWL_RATE_##ip##M_INDEX, \ |
| 64 | IWL_RATE_##in##M_INDEX, \ |
| 65 | IWL_RATE_##rp##M_INDEX, \ |
| 66 | IWL_RATE_##rn##M_INDEX, \ |
| 67 | IWL_RATE_##pp##M_INDEX, \ |
| 68 | IWL_RATE_##np##M_INDEX } |
| 69 | |
| 70 | /* |
| 71 | * Parameter order: |
| 72 | * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate |
| 73 | * |
| 74 | * If there isn't a valid next or previous rate then INV is used which |
| 75 | * maps to IWL_RATE_INVALID |
| 76 | * |
| 77 | */ |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 78 | const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 79 | IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */ |
| 80 | IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */ |
| 81 | IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */ |
| 82 | IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */ |
| 83 | IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */ |
| 84 | IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */ |
| 85 | IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */ |
| 86 | IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */ |
| 87 | IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */ |
| 88 | IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */ |
| 89 | IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */ |
| 90 | IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */ |
| 91 | IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */ |
| 92 | }; |
| 93 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 94 | #ifdef CONFIG_IWL4965_HT |
| 95 | |
| 96 | static const u16 default_tid_to_tx_fifo[] = { |
| 97 | IWL_TX_FIFO_AC1, |
| 98 | IWL_TX_FIFO_AC0, |
| 99 | IWL_TX_FIFO_AC0, |
| 100 | IWL_TX_FIFO_AC1, |
| 101 | IWL_TX_FIFO_AC2, |
| 102 | IWL_TX_FIFO_AC2, |
| 103 | IWL_TX_FIFO_AC3, |
| 104 | IWL_TX_FIFO_AC3, |
| 105 | IWL_TX_FIFO_NONE, |
| 106 | IWL_TX_FIFO_NONE, |
| 107 | IWL_TX_FIFO_NONE, |
| 108 | IWL_TX_FIFO_NONE, |
| 109 | IWL_TX_FIFO_NONE, |
| 110 | IWL_TX_FIFO_NONE, |
| 111 | IWL_TX_FIFO_NONE, |
| 112 | IWL_TX_FIFO_NONE, |
| 113 | IWL_TX_FIFO_AC3 |
| 114 | }; |
| 115 | |
| 116 | #endif /*CONFIG_IWL4965_HT */ |
| 117 | |
Tomas Winkler | 57aab75 | 2008-04-14 21:16:03 -0700 | [diff] [blame] | 118 | /* check contents of special bootstrap uCode SRAM */ |
| 119 | static int iwl4965_verify_bsm(struct iwl_priv *priv) |
| 120 | { |
| 121 | __le32 *image = priv->ucode_boot.v_addr; |
| 122 | u32 len = priv->ucode_boot.len; |
| 123 | u32 reg; |
| 124 | u32 val; |
| 125 | |
| 126 | IWL_DEBUG_INFO("Begin verify bsm\n"); |
| 127 | |
| 128 | /* verify BSM SRAM contents */ |
| 129 | val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG); |
| 130 | for (reg = BSM_SRAM_LOWER_BOUND; |
| 131 | reg < BSM_SRAM_LOWER_BOUND + len; |
| 132 | reg += sizeof(u32), image++) { |
| 133 | val = iwl_read_prph(priv, reg); |
| 134 | if (val != le32_to_cpu(*image)) { |
| 135 | IWL_ERROR("BSM uCode verification failed at " |
| 136 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", |
| 137 | BSM_SRAM_LOWER_BOUND, |
| 138 | reg - BSM_SRAM_LOWER_BOUND, len, |
| 139 | val, le32_to_cpu(*image)); |
| 140 | return -EIO; |
| 141 | } |
| 142 | } |
| 143 | |
| 144 | IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n"); |
| 145 | |
| 146 | return 0; |
| 147 | } |
| 148 | |
| 149 | /** |
| 150 | * iwl4965_load_bsm - Load bootstrap instructions |
| 151 | * |
| 152 | * BSM operation: |
| 153 | * |
| 154 | * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program |
| 155 | * in special SRAM that does not power down during RFKILL. When powering back |
| 156 | * up after power-saving sleeps (or during initial uCode load), the BSM loads |
| 157 | * the bootstrap program into the on-board processor, and starts it. |
| 158 | * |
| 159 | * The bootstrap program loads (via DMA) instructions and data for a new |
| 160 | * program from host DRAM locations indicated by the host driver in the |
| 161 | * BSM_DRAM_* registers. Once the new program is loaded, it starts |
| 162 | * automatically. |
| 163 | * |
| 164 | * When initializing the NIC, the host driver points the BSM to the |
| 165 | * "initialize" uCode image. This uCode sets up some internal data, then |
| 166 | * notifies host via "initialize alive" that it is complete. |
| 167 | * |
| 168 | * The host then replaces the BSM_DRAM_* pointer values to point to the |
| 169 | * normal runtime uCode instructions and a backup uCode data cache buffer |
| 170 | * (filled initially with starting data values for the on-board processor), |
| 171 | * then triggers the "initialize" uCode to load and launch the runtime uCode, |
| 172 | * which begins normal operation. |
| 173 | * |
| 174 | * When doing a power-save shutdown, runtime uCode saves data SRAM into |
| 175 | * the backup data cache in DRAM before SRAM is powered down. |
| 176 | * |
| 177 | * When powering back up, the BSM loads the bootstrap program. This reloads |
| 178 | * the runtime uCode instructions and the backup data cache into SRAM, |
| 179 | * and re-launches the runtime uCode from where it left off. |
| 180 | */ |
| 181 | static int iwl4965_load_bsm(struct iwl_priv *priv) |
| 182 | { |
| 183 | __le32 *image = priv->ucode_boot.v_addr; |
| 184 | u32 len = priv->ucode_boot.len; |
| 185 | dma_addr_t pinst; |
| 186 | dma_addr_t pdata; |
| 187 | u32 inst_len; |
| 188 | u32 data_len; |
| 189 | int i; |
| 190 | u32 done; |
| 191 | u32 reg_offset; |
| 192 | int ret; |
| 193 | |
| 194 | IWL_DEBUG_INFO("Begin load bsm\n"); |
| 195 | |
| 196 | /* make sure bootstrap program is no larger than BSM's SRAM size */ |
| 197 | if (len > IWL_MAX_BSM_SIZE) |
| 198 | return -EINVAL; |
| 199 | |
| 200 | /* Tell bootstrap uCode where to find the "Initialize" uCode |
| 201 | * in host DRAM ... host DRAM physical address bits 35:4 for 4965. |
| 202 | * NOTE: iwl4965_initialize_alive_start() will replace these values, |
| 203 | * after the "initialize" uCode has run, to point to |
| 204 | * runtime/protocol instructions and backup data cache. */ |
| 205 | pinst = priv->ucode_init.p_addr >> 4; |
| 206 | pdata = priv->ucode_init_data.p_addr >> 4; |
| 207 | inst_len = priv->ucode_init.len; |
| 208 | data_len = priv->ucode_init_data.len; |
| 209 | |
| 210 | ret = iwl_grab_nic_access(priv); |
| 211 | if (ret) |
| 212 | return ret; |
| 213 | |
| 214 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
| 215 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); |
| 216 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); |
| 217 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); |
| 218 | |
| 219 | /* Fill BSM memory with bootstrap instructions */ |
| 220 | for (reg_offset = BSM_SRAM_LOWER_BOUND; |
| 221 | reg_offset < BSM_SRAM_LOWER_BOUND + len; |
| 222 | reg_offset += sizeof(u32), image++) |
| 223 | _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image)); |
| 224 | |
| 225 | ret = iwl4965_verify_bsm(priv); |
| 226 | if (ret) { |
| 227 | iwl_release_nic_access(priv); |
| 228 | return ret; |
| 229 | } |
| 230 | |
| 231 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ |
| 232 | iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); |
| 233 | iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND); |
| 234 | iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); |
| 235 | |
| 236 | /* Load bootstrap code into instruction SRAM now, |
| 237 | * to prepare to load "initialize" uCode */ |
| 238 | iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START); |
| 239 | |
| 240 | /* Wait for load of bootstrap uCode to finish */ |
| 241 | for (i = 0; i < 100; i++) { |
| 242 | done = iwl_read_prph(priv, BSM_WR_CTRL_REG); |
| 243 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) |
| 244 | break; |
| 245 | udelay(10); |
| 246 | } |
| 247 | if (i < 100) |
| 248 | IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i); |
| 249 | else { |
| 250 | IWL_ERROR("BSM write did not complete!\n"); |
| 251 | return -EIO; |
| 252 | } |
| 253 | |
| 254 | /* Enable future boot loads whenever power management unit triggers it |
| 255 | * (e.g. when powering back up after power-save shutdown) */ |
| 256 | iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN); |
| 257 | |
| 258 | iwl_release_nic_access(priv); |
| 259 | |
| 260 | return 0; |
| 261 | } |
| 262 | |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 263 | static int iwl4965_init_drv(struct iwl_priv *priv) |
| 264 | { |
| 265 | int ret; |
| 266 | int i; |
| 267 | |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 268 | priv->antenna = (enum iwl4965_antenna)priv->cfg->mod_params->antenna; |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 269 | priv->retry_rate = 1; |
| 270 | priv->ibss_beacon = NULL; |
| 271 | |
| 272 | spin_lock_init(&priv->lock); |
| 273 | spin_lock_init(&priv->power_data.lock); |
| 274 | spin_lock_init(&priv->sta_lock); |
| 275 | spin_lock_init(&priv->hcmd_lock); |
| 276 | spin_lock_init(&priv->lq_mngr.lock); |
| 277 | |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 278 | priv->shared_virt = pci_alloc_consistent(priv->pci_dev, |
| 279 | sizeof(struct iwl4965_shared), |
| 280 | &priv->shared_phys); |
| 281 | |
| 282 | if (!priv->shared_virt) { |
| 283 | ret = -ENOMEM; |
| 284 | goto err; |
| 285 | } |
| 286 | |
| 287 | memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared)); |
| 288 | |
| 289 | |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 290 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) |
| 291 | INIT_LIST_HEAD(&priv->ibss_mac_hash[i]); |
| 292 | |
| 293 | INIT_LIST_HEAD(&priv->free_frames); |
| 294 | |
| 295 | mutex_init(&priv->mutex); |
| 296 | |
| 297 | /* Clear the driver's (not device's) station table */ |
| 298 | iwlcore_clear_stations_table(priv); |
| 299 | |
| 300 | priv->data_retry_limit = -1; |
| 301 | priv->ieee_channels = NULL; |
| 302 | priv->ieee_rates = NULL; |
| 303 | priv->band = IEEE80211_BAND_2GHZ; |
| 304 | |
| 305 | priv->iw_mode = IEEE80211_IF_TYPE_STA; |
| 306 | |
| 307 | priv->use_ant_b_for_management_frame = 1; /* start with ant B */ |
| 308 | priv->valid_antenna = 0x7; /* assume all 3 connected */ |
| 309 | priv->ps_mode = IWL_MIMO_PS_NONE; |
| 310 | |
| 311 | /* Choose which receivers/antennas to use */ |
| 312 | iwl4965_set_rxon_chain(priv); |
| 313 | |
| 314 | iwlcore_reset_qos(priv); |
| 315 | |
| 316 | priv->qos_data.qos_active = 0; |
| 317 | priv->qos_data.qos_cap.val = 0; |
| 318 | |
| 319 | iwlcore_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6); |
| 320 | |
| 321 | priv->rates_mask = IWL_RATES_MASK; |
| 322 | /* If power management is turned on, default to AC mode */ |
| 323 | priv->power_mode = IWL_POWER_AC; |
| 324 | priv->user_txpower_limit = IWL_DEFAULT_TX_POWER; |
| 325 | |
| 326 | ret = iwl_init_channel_map(priv); |
| 327 | if (ret) { |
| 328 | IWL_ERROR("initializing regulatory failed: %d\n", ret); |
| 329 | goto err; |
| 330 | } |
| 331 | |
| 332 | ret = iwl4965_init_geos(priv); |
| 333 | if (ret) { |
| 334 | IWL_ERROR("initializing geos failed: %d\n", ret); |
| 335 | goto err_free_channel_map; |
| 336 | } |
| 337 | |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 338 | ret = ieee80211_register_hw(priv->hw); |
| 339 | if (ret) { |
| 340 | IWL_ERROR("Failed to register network device (error %d)\n", |
| 341 | ret); |
| 342 | goto err_free_geos; |
| 343 | } |
| 344 | |
| 345 | priv->hw->conf.beacon_int = 100; |
| 346 | priv->mac80211_registered = 1; |
| 347 | |
| 348 | return 0; |
| 349 | |
| 350 | err_free_geos: |
| 351 | iwl4965_free_geos(priv); |
| 352 | err_free_channel_map: |
| 353 | iwl_free_channel_map(priv); |
| 354 | err: |
| 355 | return ret; |
| 356 | } |
| 357 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 358 | static int is_fat_channel(__le32 rxon_flags) |
| 359 | { |
| 360 | return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) || |
| 361 | (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK); |
| 362 | } |
| 363 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 364 | static u8 is_single_stream(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 365 | { |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 366 | #ifdef CONFIG_IWL4965_HT |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 367 | if (!priv->current_ht_config.is_ht || |
| 368 | (priv->current_ht_config.supp_mcs_set[1] == 0) || |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 369 | (priv->ps_mode == IWL_MIMO_PS_STATIC)) |
| 370 | return 1; |
| 371 | #else |
| 372 | return 1; |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 373 | #endif /*CONFIG_IWL4965_HT */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 374 | return 0; |
| 375 | } |
| 376 | |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 377 | int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags) |
| 378 | { |
| 379 | int idx = 0; |
| 380 | |
| 381 | /* 4965 HT rate format */ |
| 382 | if (rate_n_flags & RATE_MCS_HT_MSK) { |
| 383 | idx = (rate_n_flags & 0xff); |
| 384 | |
| 385 | if (idx >= IWL_RATE_MIMO_6M_PLCP) |
| 386 | idx = idx - IWL_RATE_MIMO_6M_PLCP; |
| 387 | |
| 388 | idx += IWL_FIRST_OFDM_RATE; |
| 389 | /* skip 9M not supported in ht*/ |
| 390 | if (idx >= IWL_RATE_9M_INDEX) |
| 391 | idx += 1; |
| 392 | if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE)) |
| 393 | return idx; |
| 394 | |
| 395 | /* 4965 legacy rate format, search for match in table */ |
| 396 | } else { |
| 397 | for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++) |
| 398 | if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF)) |
| 399 | return idx; |
| 400 | } |
| 401 | |
| 402 | return -1; |
| 403 | } |
| 404 | |
Ron Rindjunsky | 4c424e4 | 2008-03-04 18:09:27 -0800 | [diff] [blame] | 405 | /** |
| 406 | * translate ucode response to mac80211 tx status control values |
| 407 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 408 | void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags, |
Ron Rindjunsky | 4c424e4 | 2008-03-04 18:09:27 -0800 | [diff] [blame] | 409 | struct ieee80211_tx_control *control) |
| 410 | { |
| 411 | int rate_index; |
| 412 | |
| 413 | control->antenna_sel_tx = |
Tomas Winkler | ec35cf2 | 2008-04-15 16:01:39 -0700 | [diff] [blame] | 414 | ((rate_n_flags & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_POS); |
Ron Rindjunsky | 4c424e4 | 2008-03-04 18:09:27 -0800 | [diff] [blame] | 415 | if (rate_n_flags & RATE_MCS_HT_MSK) |
| 416 | control->flags |= IEEE80211_TXCTL_OFDM_HT; |
| 417 | if (rate_n_flags & RATE_MCS_GF_MSK) |
| 418 | control->flags |= IEEE80211_TXCTL_GREEN_FIELD; |
| 419 | if (rate_n_flags & RATE_MCS_FAT_MSK) |
| 420 | control->flags |= IEEE80211_TXCTL_40_MHZ_WIDTH; |
| 421 | if (rate_n_flags & RATE_MCS_DUP_MSK) |
| 422 | control->flags |= IEEE80211_TXCTL_DUP_DATA; |
| 423 | if (rate_n_flags & RATE_MCS_SGI_MSK) |
| 424 | control->flags |= IEEE80211_TXCTL_SHORT_GI; |
| 425 | /* since iwl4965_hwrate_to_plcp_idx is band indifferent, we always use |
| 426 | * IEEE80211_BAND_2GHZ band as it contains all the rates */ |
| 427 | rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags); |
| 428 | if (rate_index == -1) |
| 429 | control->tx_rate = NULL; |
| 430 | else |
| 431 | control->tx_rate = |
| 432 | &priv->bands[IEEE80211_BAND_2GHZ].bitrates[rate_index]; |
| 433 | } |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 434 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 435 | /* |
| 436 | * Determine how many receiver/antenna chains to use. |
| 437 | * More provides better reception via diversity. Fewer saves power. |
| 438 | * MIMO (dual stream) requires at least 2, but works better with 3. |
| 439 | * This does not determine *which* chains to use, just how many. |
| 440 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 441 | static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 442 | u8 *idle_state, u8 *rx_state) |
| 443 | { |
| 444 | u8 is_single = is_single_stream(priv); |
| 445 | u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1; |
| 446 | |
| 447 | /* # of Rx chains to use when expecting MIMO. */ |
| 448 | if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC))) |
| 449 | *rx_state = 2; |
| 450 | else |
| 451 | *rx_state = 3; |
| 452 | |
| 453 | /* # Rx chains when idling and maybe trying to save power */ |
| 454 | switch (priv->ps_mode) { |
| 455 | case IWL_MIMO_PS_STATIC: |
| 456 | case IWL_MIMO_PS_DYNAMIC: |
| 457 | *idle_state = (is_cam) ? 2 : 1; |
| 458 | break; |
| 459 | case IWL_MIMO_PS_NONE: |
| 460 | *idle_state = (is_cam) ? *rx_state : 1; |
| 461 | break; |
| 462 | default: |
| 463 | *idle_state = 1; |
| 464 | break; |
| 465 | } |
| 466 | |
| 467 | return 0; |
| 468 | } |
| 469 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 470 | int iwl4965_hw_rxq_stop(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 471 | { |
| 472 | int rc; |
| 473 | unsigned long flags; |
| 474 | |
| 475 | spin_lock_irqsave(&priv->lock, flags); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 476 | rc = iwl_grab_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 477 | if (rc) { |
| 478 | spin_unlock_irqrestore(&priv->lock, flags); |
| 479 | return rc; |
| 480 | } |
| 481 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 482 | /* stop Rx DMA */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 483 | iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); |
| 484 | rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 485 | (1 << 24), 1000); |
| 486 | if (rc < 0) |
| 487 | IWL_ERROR("Can't stop Rx DMA.\n"); |
| 488 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 489 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 490 | spin_unlock_irqrestore(&priv->lock, flags); |
| 491 | |
| 492 | return 0; |
| 493 | } |
| 494 | |
Tomas Winkler | 6f4083a | 2008-04-16 16:34:49 -0700 | [diff] [blame] | 495 | static int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 496 | { |
Tomas Winkler | d860965 | 2007-10-25 17:15:35 +0800 | [diff] [blame] | 497 | int ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 498 | unsigned long flags; |
| 499 | |
| 500 | spin_lock_irqsave(&priv->lock, flags); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 501 | ret = iwl_grab_nic_access(priv); |
Tomas Winkler | d860965 | 2007-10-25 17:15:35 +0800 | [diff] [blame] | 502 | if (ret) { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 503 | spin_unlock_irqrestore(&priv->lock, flags); |
Tomas Winkler | d860965 | 2007-10-25 17:15:35 +0800 | [diff] [blame] | 504 | return ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 505 | } |
| 506 | |
Tomas Winkler | 6f4083a | 2008-04-16 16:34:49 -0700 | [diff] [blame] | 507 | if (src == IWL_PWR_SRC_VAUX) { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 508 | u32 val; |
Tomas Winkler | d860965 | 2007-10-25 17:15:35 +0800 | [diff] [blame] | 509 | ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE, |
Tomas Winkler | 6f4083a | 2008-04-16 16:34:49 -0700 | [diff] [blame] | 510 | &val); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 511 | |
Tomas Winkler | 6f4083a | 2008-04-16 16:34:49 -0700 | [diff] [blame] | 512 | if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) { |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 513 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, |
Tomas Winkler | 6f4083a | 2008-04-16 16:34:49 -0700 | [diff] [blame] | 514 | APMG_PS_CTRL_VAL_PWR_SRC_VAUX, |
| 515 | ~APMG_PS_CTRL_MSK_PWR_SRC); |
| 516 | } |
| 517 | } else { |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 518 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, |
Tomas Winkler | 6f4083a | 2008-04-16 16:34:49 -0700 | [diff] [blame] | 519 | APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, |
| 520 | ~APMG_PS_CTRL_MSK_PWR_SRC); |
| 521 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 522 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 523 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 524 | spin_unlock_irqrestore(&priv->lock, flags); |
| 525 | |
Tomas Winkler | d860965 | 2007-10-25 17:15:35 +0800 | [diff] [blame] | 526 | return ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 527 | } |
| 528 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 529 | static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 530 | { |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 531 | int ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 532 | unsigned long flags; |
Ron Rindjunsky | 9ee1ba4 | 2007-11-26 16:14:42 +0200 | [diff] [blame] | 533 | unsigned int rb_size; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 534 | |
| 535 | spin_lock_irqsave(&priv->lock, flags); |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 536 | ret = iwl_grab_nic_access(priv); |
| 537 | if (ret) { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 538 | spin_unlock_irqrestore(&priv->lock, flags); |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 539 | return ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 540 | } |
| 541 | |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 542 | if (priv->cfg->mod_params->amsdu_size_8K) |
Ron Rindjunsky | 9ee1ba4 | 2007-11-26 16:14:42 +0200 | [diff] [blame] | 543 | rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K; |
| 544 | else |
| 545 | rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K; |
| 546 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 547 | /* Stop Rx DMA */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 548 | iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 549 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 550 | /* Reset driver's Rx queue write index */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 551 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 552 | |
| 553 | /* Tell device where to find RBD circular buffer in DRAM */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 554 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG, |
| 555 | rxq->dma_addr >> 8); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 556 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 557 | /* Tell device where in DRAM to update its Rx status */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 558 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG, |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 559 | (priv->shared_phys + |
| 560 | offsetof(struct iwl4965_shared, rb_closed)) >> 4); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 561 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 562 | /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 563 | iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, |
| 564 | FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | |
| 565 | FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | |
| 566 | rb_size | |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 567 | /* 0x10 << 4 | */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 568 | (RX_QUEUE_SIZE_LOG << |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 569 | FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT)); |
| 570 | |
| 571 | /* |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 572 | * iwl_write32(priv,CSR_INT_COAL_REG,0); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 573 | */ |
| 574 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 575 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 576 | spin_unlock_irqrestore(&priv->lock, flags); |
| 577 | |
| 578 | return 0; |
| 579 | } |
| 580 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 581 | /* Tell 4965 where to find the "keep warm" buffer */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 582 | static int iwl4965_kw_init(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 583 | { |
| 584 | unsigned long flags; |
| 585 | int rc; |
| 586 | |
| 587 | spin_lock_irqsave(&priv->lock, flags); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 588 | rc = iwl_grab_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 589 | if (rc) |
| 590 | goto out; |
| 591 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 592 | iwl_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 593 | priv->kw.dma_addr >> 4); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 594 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 595 | out: |
| 596 | spin_unlock_irqrestore(&priv->lock, flags); |
| 597 | return rc; |
| 598 | } |
| 599 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 600 | static int iwl4965_kw_alloc(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 601 | { |
| 602 | struct pci_dev *dev = priv->pci_dev; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 603 | struct iwl4965_kw *kw = &priv->kw; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 604 | |
| 605 | kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */ |
| 606 | kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr); |
| 607 | if (!kw->v_addr) |
| 608 | return -ENOMEM; |
| 609 | |
| 610 | return 0; |
| 611 | } |
| 612 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 613 | /** |
| 614 | * iwl4965_kw_free - Free the "keep warm" buffer |
| 615 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 616 | static void iwl4965_kw_free(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 617 | { |
| 618 | struct pci_dev *dev = priv->pci_dev; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 619 | struct iwl4965_kw *kw = &priv->kw; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 620 | |
| 621 | if (kw->v_addr) { |
| 622 | pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr); |
| 623 | memset(kw, 0, sizeof(*kw)); |
| 624 | } |
| 625 | } |
| 626 | |
| 627 | /** |
| 628 | * iwl4965_txq_ctx_reset - Reset TX queue context |
| 629 | * Destroys all DMA structures and initialise them again |
| 630 | * |
| 631 | * @param priv |
| 632 | * @return error code |
| 633 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 634 | static int iwl4965_txq_ctx_reset(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 635 | { |
| 636 | int rc = 0; |
| 637 | int txq_id, slots_num; |
| 638 | unsigned long flags; |
| 639 | |
| 640 | iwl4965_kw_free(priv); |
| 641 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 642 | /* Free all tx/cmd queues and keep-warm buffer */ |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 643 | iwl4965_hw_txq_ctx_free(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 644 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 645 | /* Alloc keep-warm buffer */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 646 | rc = iwl4965_kw_alloc(priv); |
| 647 | if (rc) { |
| 648 | IWL_ERROR("Keep Warm allocation failed"); |
| 649 | goto error_kw; |
| 650 | } |
| 651 | |
| 652 | spin_lock_irqsave(&priv->lock, flags); |
| 653 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 654 | rc = iwl_grab_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 655 | if (unlikely(rc)) { |
| 656 | IWL_ERROR("TX reset failed"); |
| 657 | spin_unlock_irqrestore(&priv->lock, flags); |
| 658 | goto error_reset; |
| 659 | } |
| 660 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 661 | /* Turn off all Tx DMA channels */ |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 662 | iwl_write_prph(priv, IWL49_SCD_TXFACT, 0); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 663 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 664 | spin_unlock_irqrestore(&priv->lock, flags); |
| 665 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 666 | /* Tell 4965 where to find the keep-warm buffer */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 667 | rc = iwl4965_kw_init(priv); |
| 668 | if (rc) { |
| 669 | IWL_ERROR("kw_init failed\n"); |
| 670 | goto error_reset; |
| 671 | } |
| 672 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 673 | /* Alloc and init all (default 16) Tx queues, |
| 674 | * including the command queue (#4) */ |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 675 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 676 | slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ? |
| 677 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 678 | rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 679 | txq_id); |
| 680 | if (rc) { |
| 681 | IWL_ERROR("Tx %d queue init failed\n", txq_id); |
| 682 | goto error; |
| 683 | } |
| 684 | } |
| 685 | |
| 686 | return rc; |
| 687 | |
| 688 | error: |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 689 | iwl4965_hw_txq_ctx_free(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 690 | error_reset: |
| 691 | iwl4965_kw_free(priv); |
| 692 | error_kw: |
| 693 | return rc; |
| 694 | } |
| 695 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 696 | int iwl4965_hw_nic_init(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 697 | { |
| 698 | int rc; |
| 699 | unsigned long flags; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 700 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 701 | u8 rev_id; |
| 702 | u32 val; |
| 703 | u8 val_link; |
| 704 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 705 | iwl4965_power_init_handle(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 706 | |
| 707 | /* nic_init */ |
| 708 | spin_lock_irqsave(&priv->lock, flags); |
| 709 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 710 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 711 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); |
| 712 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 713 | iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
| 714 | rc = iwl_poll_bit(priv, CSR_GP_CNTRL, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 715 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, |
| 716 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); |
| 717 | if (rc < 0) { |
| 718 | spin_unlock_irqrestore(&priv->lock, flags); |
| 719 | IWL_DEBUG_INFO("Failed to init the card\n"); |
| 720 | return rc; |
| 721 | } |
| 722 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 723 | rc = iwl_grab_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 724 | if (rc) { |
| 725 | spin_unlock_irqrestore(&priv->lock, flags); |
| 726 | return rc; |
| 727 | } |
| 728 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 729 | iwl_read_prph(priv, APMG_CLK_CTRL_REG); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 730 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 731 | iwl_write_prph(priv, APMG_CLK_CTRL_REG, |
| 732 | APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT); |
| 733 | iwl_read_prph(priv, APMG_CLK_CTRL_REG); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 734 | |
| 735 | udelay(20); |
| 736 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 737 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, |
| 738 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 739 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 740 | iwl_release_nic_access(priv); |
| 741 | iwl_write32(priv, CSR_INT_COALESCING, 512 / 32); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 742 | spin_unlock_irqrestore(&priv->lock, flags); |
| 743 | |
| 744 | /* Determine HW type */ |
| 745 | rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id); |
| 746 | if (rc) |
| 747 | return rc; |
| 748 | |
| 749 | IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id); |
| 750 | |
Tomas Winkler | 6f4083a | 2008-04-16 16:34:49 -0700 | [diff] [blame] | 751 | rc = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN); |
| 752 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 753 | spin_lock_irqsave(&priv->lock, flags); |
| 754 | |
| 755 | if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) { |
| 756 | pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val); |
| 757 | /* Enable No Snoop field */ |
| 758 | pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8, |
| 759 | val & ~(1 << 11)); |
| 760 | } |
| 761 | |
| 762 | spin_unlock_irqrestore(&priv->lock, flags); |
| 763 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 764 | if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) { |
| 765 | IWL_ERROR("Older EEPROM detected! Aborting.\n"); |
| 766 | return -EINVAL; |
| 767 | } |
| 768 | |
| 769 | pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link); |
| 770 | |
| 771 | /* disable L1 entry -- workaround for pre-B1 */ |
| 772 | pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02); |
| 773 | |
| 774 | spin_lock_irqsave(&priv->lock, flags); |
| 775 | |
| 776 | /* set CSR_HW_CONFIG_REG for uCode use */ |
| 777 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 778 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, |
| 779 | CSR49_HW_IF_CONFIG_REG_BIT_4965_R | |
| 780 | CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI | |
| 781 | CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 782 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 783 | rc = iwl_grab_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 784 | if (rc < 0) { |
| 785 | spin_unlock_irqrestore(&priv->lock, flags); |
| 786 | IWL_DEBUG_INFO("Failed to init the card\n"); |
| 787 | return rc; |
| 788 | } |
| 789 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 790 | iwl_read_prph(priv, APMG_PS_CTRL_REG); |
| 791 | iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 792 | udelay(5); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 793 | iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 794 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 795 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 796 | spin_unlock_irqrestore(&priv->lock, flags); |
| 797 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 798 | iwl4965_hw_card_show_info(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 799 | |
| 800 | /* end nic_init */ |
| 801 | |
| 802 | /* Allocate the RX queue, or reset if it is already allocated */ |
| 803 | if (!rxq->bd) { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 804 | rc = iwl4965_rx_queue_alloc(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 805 | if (rc) { |
| 806 | IWL_ERROR("Unable to initialize Rx queue\n"); |
| 807 | return -ENOMEM; |
| 808 | } |
| 809 | } else |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 810 | iwl4965_rx_queue_reset(priv, rxq); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 811 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 812 | iwl4965_rx_replenish(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 813 | |
| 814 | iwl4965_rx_init(priv, rxq); |
| 815 | |
| 816 | spin_lock_irqsave(&priv->lock, flags); |
| 817 | |
| 818 | rxq->need_update = 1; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 819 | iwl4965_rx_queue_update_write_ptr(priv, rxq); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 820 | |
| 821 | spin_unlock_irqrestore(&priv->lock, flags); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 822 | |
| 823 | /* Allocate and init all Tx and Command queues */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 824 | rc = iwl4965_txq_ctx_reset(priv); |
| 825 | if (rc) |
| 826 | return rc; |
| 827 | |
| 828 | if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE) |
| 829 | IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n"); |
| 830 | |
| 831 | if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE) |
| 832 | IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n"); |
| 833 | |
| 834 | set_bit(STATUS_INIT, &priv->status); |
| 835 | |
| 836 | return 0; |
| 837 | } |
| 838 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 839 | int iwl4965_hw_nic_stop_master(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 840 | { |
| 841 | int rc = 0; |
| 842 | u32 reg_val; |
| 843 | unsigned long flags; |
| 844 | |
| 845 | spin_lock_irqsave(&priv->lock, flags); |
| 846 | |
| 847 | /* set stop master bit */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 848 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 849 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 850 | reg_val = iwl_read32(priv, CSR_GP_CNTRL); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 851 | |
| 852 | if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE == |
| 853 | (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE)) |
| 854 | IWL_DEBUG_INFO("Card in power save, master is already " |
| 855 | "stopped\n"); |
| 856 | else { |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 857 | rc = iwl_poll_bit(priv, CSR_RESET, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 858 | CSR_RESET_REG_FLAG_MASTER_DISABLED, |
| 859 | CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); |
| 860 | if (rc < 0) { |
| 861 | spin_unlock_irqrestore(&priv->lock, flags); |
| 862 | return rc; |
| 863 | } |
| 864 | } |
| 865 | |
| 866 | spin_unlock_irqrestore(&priv->lock, flags); |
| 867 | IWL_DEBUG_INFO("stop master\n"); |
| 868 | |
| 869 | return rc; |
| 870 | } |
| 871 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 872 | /** |
| 873 | * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory |
| 874 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 875 | void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 876 | { |
| 877 | |
| 878 | int txq_id; |
| 879 | unsigned long flags; |
| 880 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 881 | /* Stop each Tx DMA channel, and wait for it to be idle */ |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 882 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 883 | spin_lock_irqsave(&priv->lock, flags); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 884 | if (iwl_grab_nic_access(priv)) { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 885 | spin_unlock_irqrestore(&priv->lock, flags); |
| 886 | continue; |
| 887 | } |
| 888 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 889 | iwl_write_direct32(priv, |
| 890 | IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0); |
| 891 | iwl_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG, |
| 892 | IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE |
| 893 | (txq_id), 200); |
| 894 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 895 | spin_unlock_irqrestore(&priv->lock, flags); |
| 896 | } |
| 897 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 898 | /* Deallocate memory for all Tx queues */ |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 899 | iwl4965_hw_txq_ctx_free(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 900 | } |
| 901 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 902 | int iwl4965_hw_nic_reset(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 903 | { |
| 904 | int rc = 0; |
| 905 | unsigned long flags; |
| 906 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 907 | iwl4965_hw_nic_stop_master(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 908 | |
| 909 | spin_lock_irqsave(&priv->lock, flags); |
| 910 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 911 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 912 | |
| 913 | udelay(10); |
| 914 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 915 | iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
| 916 | rc = iwl_poll_bit(priv, CSR_RESET, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 917 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, |
| 918 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25); |
| 919 | |
| 920 | udelay(10); |
| 921 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 922 | rc = iwl_grab_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 923 | if (!rc) { |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 924 | iwl_write_prph(priv, APMG_CLK_EN_REG, |
| 925 | APMG_CLK_VAL_DMA_CLK_RQT | |
| 926 | APMG_CLK_VAL_BSM_CLK_RQT); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 927 | |
| 928 | udelay(10); |
| 929 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 930 | iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, |
| 931 | APMG_PCIDEV_STT_VAL_L1_ACT_DIS); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 932 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 933 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 934 | } |
| 935 | |
| 936 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); |
| 937 | wake_up_interruptible(&priv->wait_command_queue); |
| 938 | |
| 939 | spin_unlock_irqrestore(&priv->lock, flags); |
| 940 | |
| 941 | return rc; |
| 942 | |
| 943 | } |
| 944 | |
| 945 | #define REG_RECALIB_PERIOD (60) |
| 946 | |
| 947 | /** |
| 948 | * iwl4965_bg_statistics_periodic - Timer callback to queue statistics |
| 949 | * |
Emmanuel Grumbach | 49ea859 | 2008-04-15 16:01:37 -0700 | [diff] [blame] | 950 | * This callback is provided in order to send a statistics request. |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 951 | * |
| 952 | * This timer function is continually reset to execute within |
| 953 | * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION |
| 954 | * was received. We need to ensure we receive the statistics in order |
Emmanuel Grumbach | 49ea859 | 2008-04-15 16:01:37 -0700 | [diff] [blame] | 955 | * to update the temperature used for calibrating the TXPOWER. |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 956 | */ |
| 957 | static void iwl4965_bg_statistics_periodic(unsigned long data) |
| 958 | { |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 959 | struct iwl_priv *priv = (struct iwl_priv *)data; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 960 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 961 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
| 962 | return; |
| 963 | |
Emmanuel Grumbach | 49ea859 | 2008-04-15 16:01:37 -0700 | [diff] [blame] | 964 | iwl_send_statistics_request(priv, CMD_ASYNC); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 965 | } |
| 966 | |
| 967 | #define CT_LIMIT_CONST 259 |
| 968 | #define TM_CT_KILL_THRESHOLD 110 |
| 969 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 970 | void iwl4965_rf_kill_ct_config(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 971 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 972 | struct iwl4965_ct_kill_config cmd; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 973 | u32 R1, R2, R3; |
| 974 | u32 temp_th; |
| 975 | u32 crit_temperature; |
| 976 | unsigned long flags; |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 977 | int ret = 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 978 | |
| 979 | spin_lock_irqsave(&priv->lock, flags); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 980 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 981 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
| 982 | spin_unlock_irqrestore(&priv->lock, flags); |
| 983 | |
| 984 | if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) { |
| 985 | R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]); |
| 986 | R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]); |
| 987 | R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]); |
| 988 | } else { |
| 989 | R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]); |
| 990 | R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]); |
| 991 | R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]); |
| 992 | } |
| 993 | |
| 994 | temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD); |
| 995 | |
| 996 | crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2; |
| 997 | cmd.critical_temperature_R = cpu_to_le32(crit_temperature); |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 998 | ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD, |
| 999 | sizeof(cmd), &cmd); |
| 1000 | if (ret) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1001 | IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n"); |
| 1002 | else |
| 1003 | IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n"); |
| 1004 | } |
| 1005 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1006 | #ifdef CONFIG_IWL4965_RUN_TIME_CALIB |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1007 | |
| 1008 | /* Reset differential Rx gains in NIC to prepare for chain noise calibration. |
| 1009 | * Called after every association, but this runs only once! |
| 1010 | * ... once chain noise is calibrated the first time, it's good forever. */ |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1011 | static void iwl4965_chain_noise_reset(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1012 | { |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1013 | struct iwl_chain_noise_data *data = &(priv->chain_noise_data); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1014 | |
Tomas Winkler | 3109ece | 2008-03-28 16:33:35 -0700 | [diff] [blame] | 1015 | if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1016 | struct iwl4965_calibration_cmd cmd; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1017 | |
| 1018 | memset(&cmd, 0, sizeof(cmd)); |
| 1019 | cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD; |
| 1020 | cmd.diff_gain_a = 0; |
| 1021 | cmd.diff_gain_b = 0; |
| 1022 | cmd.diff_gain_c = 0; |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1023 | if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, |
| 1024 | sizeof(cmd), &cmd)) |
| 1025 | IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n"); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1026 | data->state = IWL_CHAIN_NOISE_ACCUMULATE; |
| 1027 | IWL_DEBUG_CALIB("Run chain_noise_calibrate\n"); |
| 1028 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1029 | } |
| 1030 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1031 | static void iwl4965_gain_computation(struct iwl_priv *priv, |
| 1032 | u32 *average_noise, |
| 1033 | u16 min_average_noise_antenna_i, |
| 1034 | u32 min_average_noise) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1035 | { |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1036 | int i, ret; |
| 1037 | struct iwl_chain_noise_data *data = &priv->chain_noise_data; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1038 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1039 | data->delta_gain_code[min_average_noise_antenna_i] = 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1040 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1041 | for (i = 0; i < NUM_RX_CHAINS; i++) { |
| 1042 | s32 delta_g = 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1043 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1044 | if (!(data->disconn_array[i]) && |
| 1045 | (data->delta_gain_code[i] == |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1046 | CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) { |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1047 | delta_g = average_noise[i] - min_average_noise; |
| 1048 | data->delta_gain_code[i] = (u8)((delta_g * 10) / 15); |
| 1049 | data->delta_gain_code[i] = |
| 1050 | min(data->delta_gain_code[i], |
| 1051 | (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1052 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1053 | data->delta_gain_code[i] = |
| 1054 | (data->delta_gain_code[i] | (1 << 2)); |
| 1055 | } else { |
| 1056 | data->delta_gain_code[i] = 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1057 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1058 | } |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1059 | IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n", |
| 1060 | data->delta_gain_code[0], |
| 1061 | data->delta_gain_code[1], |
| 1062 | data->delta_gain_code[2]); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1063 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1064 | /* Differential gain gets sent to uCode only once */ |
| 1065 | if (!data->radio_write) { |
| 1066 | struct iwl4965_calibration_cmd cmd; |
| 1067 | data->radio_write = 1; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1068 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1069 | memset(&cmd, 0, sizeof(cmd)); |
| 1070 | cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD; |
| 1071 | cmd.diff_gain_a = data->delta_gain_code[0]; |
| 1072 | cmd.diff_gain_b = data->delta_gain_code[1]; |
| 1073 | cmd.diff_gain_c = data->delta_gain_code[2]; |
| 1074 | ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD, |
| 1075 | sizeof(cmd), &cmd); |
| 1076 | if (ret) |
| 1077 | IWL_DEBUG_CALIB("fail sending cmd " |
| 1078 | "REPLY_PHY_CALIBRATION_CMD \n"); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1079 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1080 | /* TODO we might want recalculate |
| 1081 | * rx_chain in rxon cmd */ |
| 1082 | |
| 1083 | /* Mark so we run this algo only once! */ |
| 1084 | data->state = IWL_CHAIN_NOISE_CALIBRATED; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1085 | } |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1086 | data->chain_noise_a = 0; |
| 1087 | data->chain_noise_b = 0; |
| 1088 | data->chain_noise_c = 0; |
| 1089 | data->chain_signal_a = 0; |
| 1090 | data->chain_signal_b = 0; |
| 1091 | data->chain_signal_c = 0; |
| 1092 | data->beacon_count = 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1093 | } |
| 1094 | |
| 1095 | static void iwl4965_bg_sensitivity_work(struct work_struct *work) |
| 1096 | { |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1097 | struct iwl_priv *priv = container_of(work, struct iwl_priv, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1098 | sensitivity_work); |
| 1099 | |
| 1100 | mutex_lock(&priv->mutex); |
| 1101 | |
| 1102 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || |
| 1103 | test_bit(STATUS_SCANNING, &priv->status)) { |
| 1104 | mutex_unlock(&priv->mutex); |
| 1105 | return; |
| 1106 | } |
| 1107 | |
| 1108 | if (priv->start_calib) { |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1109 | iwl_chain_noise_calibration(priv, &priv->statistics); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1110 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1111 | iwl_sensitivity_calibration(priv, &priv->statistics); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1112 | } |
| 1113 | |
| 1114 | mutex_unlock(&priv->mutex); |
| 1115 | return; |
| 1116 | } |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1117 | #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1118 | |
| 1119 | static void iwl4965_bg_txpower_work(struct work_struct *work) |
| 1120 | { |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1121 | struct iwl_priv *priv = container_of(work, struct iwl_priv, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1122 | txpower_work); |
| 1123 | |
| 1124 | /* If a scan happened to start before we got here |
| 1125 | * then just return; the statistics notification will |
| 1126 | * kick off another scheduled work to compensate for |
| 1127 | * any temperature delta we missed here. */ |
| 1128 | if (test_bit(STATUS_EXIT_PENDING, &priv->status) || |
| 1129 | test_bit(STATUS_SCANNING, &priv->status)) |
| 1130 | return; |
| 1131 | |
| 1132 | mutex_lock(&priv->mutex); |
| 1133 | |
| 1134 | /* Regardless of if we are assocaited, we must reconfigure the |
| 1135 | * TX power since frames can be sent on non-radar channels while |
| 1136 | * not associated */ |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1137 | iwl4965_hw_reg_send_txpower(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1138 | |
| 1139 | /* Update last_temperature to keep is_calib_needed from running |
| 1140 | * when it isn't needed... */ |
| 1141 | priv->last_temperature = priv->temperature; |
| 1142 | |
| 1143 | mutex_unlock(&priv->mutex); |
| 1144 | } |
| 1145 | |
| 1146 | /* |
| 1147 | * Acquire priv->lock before calling this function ! |
| 1148 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1149 | static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1150 | { |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1151 | iwl_write_direct32(priv, HBUS_TARG_WRPTR, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1152 | (index & 0xff) | (txq_id << 8)); |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 1153 | iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1154 | } |
| 1155 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1156 | /** |
| 1157 | * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue |
| 1158 | * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed |
| 1159 | * @scd_retry: (1) Indicates queue will be used in aggregation mode |
| 1160 | * |
| 1161 | * NOTE: Acquire priv->lock before calling this function ! |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1162 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1163 | static void iwl4965_tx_queue_set_status(struct iwl_priv *priv, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1164 | struct iwl4965_tx_queue *txq, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1165 | int tx_fifo_id, int scd_retry) |
| 1166 | { |
| 1167 | int txq_id = txq->q.id; |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1168 | |
| 1169 | /* Find out whether to activate Tx queue */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1170 | int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0; |
| 1171 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1172 | /* Set up and activate */ |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 1173 | iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id), |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1174 | (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) | |
| 1175 | (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) | |
| 1176 | (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) | |
| 1177 | (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) | |
| 1178 | SCD_QUEUE_STTS_REG_MSK); |
| 1179 | |
| 1180 | txq->sched_retry = scd_retry; |
| 1181 | |
| 1182 | IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n", |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1183 | active ? "Activate" : "Deactivate", |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1184 | scd_retry ? "BA" : "AC", txq_id, tx_fifo_id); |
| 1185 | } |
| 1186 | |
| 1187 | static const u16 default_queue_to_tx_fifo[] = { |
| 1188 | IWL_TX_FIFO_AC3, |
| 1189 | IWL_TX_FIFO_AC2, |
| 1190 | IWL_TX_FIFO_AC1, |
| 1191 | IWL_TX_FIFO_AC0, |
| 1192 | IWL_CMD_FIFO_NUM, |
| 1193 | IWL_TX_FIFO_HCCA_1, |
| 1194 | IWL_TX_FIFO_HCCA_2 |
| 1195 | }; |
| 1196 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1197 | static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1198 | { |
| 1199 | set_bit(txq_id, &priv->txq_ctx_active_msk); |
| 1200 | } |
| 1201 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1202 | static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1203 | { |
| 1204 | clear_bit(txq_id, &priv->txq_ctx_active_msk); |
| 1205 | } |
| 1206 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1207 | int iwl4965_alive_notify(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1208 | { |
| 1209 | u32 a; |
| 1210 | int i = 0; |
| 1211 | unsigned long flags; |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 1212 | int ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1213 | |
| 1214 | spin_lock_irqsave(&priv->lock, flags); |
| 1215 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1216 | #ifdef CONFIG_IWL4965_RUN_TIME_CALIB |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1217 | memset(&(priv->sensitivity_data), 0, |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1218 | sizeof(struct iwl_sensitivity_data)); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1219 | memset(&(priv->chain_noise_data), 0, |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1220 | sizeof(struct iwl_chain_noise_data)); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1221 | for (i = 0; i < NUM_RX_CHAINS; i++) |
| 1222 | priv->chain_noise_data.delta_gain_code[i] = |
| 1223 | CHAIN_NOISE_DELTA_GAIN_INIT_VAL; |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1224 | #endif /* CONFIG_IWL4965_RUN_TIME_CALIB*/ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1225 | ret = iwl_grab_nic_access(priv); |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 1226 | if (ret) { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1227 | spin_unlock_irqrestore(&priv->lock, flags); |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 1228 | return ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1229 | } |
| 1230 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1231 | /* Clear 4965's internal Tx Scheduler data base */ |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 1232 | priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1233 | a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET; |
| 1234 | for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4) |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1235 | iwl_write_targ_mem(priv, a, 0); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1236 | for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4) |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1237 | iwl_write_targ_mem(priv, a, 0); |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1238 | for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4) |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1239 | iwl_write_targ_mem(priv, a, 0); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1240 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1241 | /* Tel 4965 where to find Tx byte count tables */ |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 1242 | iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR, |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 1243 | (priv->shared_phys + |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1244 | offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1245 | |
| 1246 | /* Disable chain mode for all queues */ |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 1247 | iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1248 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1249 | /* Initialize each Tx queue (including the command queue) */ |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1250 | for (i = 0; i < priv->hw_params.max_txq_num; i++) { |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1251 | |
| 1252 | /* TFD circular buffer read/write indexes */ |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 1253 | iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1254 | iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8)); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1255 | |
| 1256 | /* Max Tx Window size for Scheduler-ACK mode */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1257 | iwl_write_targ_mem(priv, priv->scd_base_addr + |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1258 | SCD_CONTEXT_QUEUE_OFFSET(i), |
| 1259 | (SCD_WIN_SIZE << |
| 1260 | SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & |
| 1261 | SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1262 | |
| 1263 | /* Frame limit */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1264 | iwl_write_targ_mem(priv, priv->scd_base_addr + |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1265 | SCD_CONTEXT_QUEUE_OFFSET(i) + |
| 1266 | sizeof(u32), |
| 1267 | (SCD_FRAME_LIMIT << |
| 1268 | SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) & |
| 1269 | SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); |
| 1270 | |
| 1271 | } |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 1272 | iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK, |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1273 | (1 << priv->hw_params.max_txq_num) - 1); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1274 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1275 | /* Activate all Tx DMA/FIFO channels */ |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 1276 | iwl_write_prph(priv, IWL49_SCD_TXFACT, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1277 | SCD_TXFACT_REG_TXFIFO_MASK(0, 7)); |
| 1278 | |
| 1279 | iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1280 | |
| 1281 | /* Map each Tx/cmd queue to its corresponding fifo */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1282 | for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) { |
| 1283 | int ac = default_queue_to_tx_fifo[i]; |
| 1284 | iwl4965_txq_ctx_activate(priv, i); |
| 1285 | iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0); |
| 1286 | } |
| 1287 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 1288 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1289 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1290 | |
Emmanuel Grumbach | 49ea859 | 2008-04-15 16:01:37 -0700 | [diff] [blame] | 1291 | /* Ask for statistics now, the uCode will send statistics notification |
| 1292 | * periodically after association */ |
| 1293 | iwl_send_statistics_request(priv, CMD_ASYNC); |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 1294 | return ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1295 | } |
| 1296 | |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1297 | #ifdef CONFIG_IWL4965_RUN_TIME_CALIB |
| 1298 | static struct iwl_sensitivity_ranges iwl4965_sensitivity = { |
| 1299 | .min_nrg_cck = 97, |
| 1300 | .max_nrg_cck = 0, |
| 1301 | |
| 1302 | .auto_corr_min_ofdm = 85, |
| 1303 | .auto_corr_min_ofdm_mrc = 170, |
| 1304 | .auto_corr_min_ofdm_x1 = 105, |
| 1305 | .auto_corr_min_ofdm_mrc_x1 = 220, |
| 1306 | |
| 1307 | .auto_corr_max_ofdm = 120, |
| 1308 | .auto_corr_max_ofdm_mrc = 210, |
| 1309 | .auto_corr_max_ofdm_x1 = 140, |
| 1310 | .auto_corr_max_ofdm_mrc_x1 = 270, |
| 1311 | |
| 1312 | .auto_corr_min_cck = 125, |
| 1313 | .auto_corr_max_cck = 200, |
| 1314 | .auto_corr_min_cck_mrc = 200, |
| 1315 | .auto_corr_max_cck_mrc = 400, |
| 1316 | |
| 1317 | .nrg_th_cck = 100, |
| 1318 | .nrg_th_ofdm = 100, |
| 1319 | }; |
| 1320 | #endif |
| 1321 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1322 | /** |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1323 | * iwl4965_hw_set_hw_params |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1324 | * |
| 1325 | * Called when initializing driver |
| 1326 | */ |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1327 | int iwl4965_hw_set_hw_params(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1328 | { |
Assaf Krauss | 316c30d | 2008-03-14 10:38:46 -0700 | [diff] [blame] | 1329 | |
Ron Rindjunsky | dfe7d45 | 2008-04-15 16:01:45 -0700 | [diff] [blame] | 1330 | if ((priv->cfg->mod_params->num_of_queues > IWL4965_MAX_NUM_QUEUES) || |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 1331 | (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) { |
Assaf Krauss | 316c30d | 2008-03-14 10:38:46 -0700 | [diff] [blame] | 1332 | IWL_ERROR("invalid queues_num, should be between %d and %d\n", |
Ron Rindjunsky | dfe7d45 | 2008-04-15 16:01:45 -0700 | [diff] [blame] | 1333 | IWL_MIN_NUM_QUEUES, IWL4965_MAX_NUM_QUEUES); |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 1334 | return -EINVAL; |
Assaf Krauss | 316c30d | 2008-03-14 10:38:46 -0700 | [diff] [blame] | 1335 | } |
| 1336 | |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1337 | priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues; |
| 1338 | priv->hw_params.tx_cmd_len = sizeof(struct iwl4965_tx_cmd); |
| 1339 | priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; |
| 1340 | priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 1341 | if (priv->cfg->mod_params->amsdu_size_8K) |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1342 | priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K; |
Ron Rindjunsky | 9ee1ba4 | 2007-11-26 16:14:42 +0200 | [diff] [blame] | 1343 | else |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1344 | priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K; |
| 1345 | priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256; |
| 1346 | priv->hw_params.max_stations = IWL4965_STATION_COUNT; |
| 1347 | priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID; |
Tomas Winkler | 3e82a82 | 2008-02-13 11:32:31 -0800 | [diff] [blame] | 1348 | |
Tomas Winkler | ec35cf2 | 2008-04-15 16:01:39 -0700 | [diff] [blame] | 1349 | priv->hw_params.tx_chains_num = 2; |
| 1350 | priv->hw_params.rx_chains_num = 2; |
| 1351 | priv->hw_params.valid_tx_ant = (IWL_ANTENNA_MAIN | IWL_ANTENNA_AUX); |
| 1352 | priv->hw_params.valid_rx_ant = (IWL_ANTENNA_MAIN | IWL_ANTENNA_AUX); |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 1353 | #ifdef CONFIG_IWL4965_RUN_TIME_CALIB |
| 1354 | priv->hw_params.sens = &iwl4965_sensitivity; |
| 1355 | #endif |
Tomas Winkler | 3e82a82 | 2008-02-13 11:32:31 -0800 | [diff] [blame] | 1356 | |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 1357 | return 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1358 | } |
| 1359 | |
| 1360 | /** |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1361 | * iwl4965_hw_txq_ctx_free - Free TXQ Context |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1362 | * |
| 1363 | * Destroy all TX DMA queues and structures |
| 1364 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1365 | void iwl4965_hw_txq_ctx_free(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1366 | { |
| 1367 | int txq_id; |
| 1368 | |
| 1369 | /* Tx queues */ |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 1370 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1371 | iwl4965_tx_queue_free(priv, &priv->txq[txq_id]); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1372 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1373 | /* Keep-warm buffer */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1374 | iwl4965_kw_free(priv); |
| 1375 | } |
| 1376 | |
| 1377 | /** |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1378 | * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr] |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1379 | * |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1380 | * Does NOT advance any TFD circular buffer read/write indexes |
| 1381 | * Does NOT free the TFD itself (which is within circular buffer) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1382 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1383 | int iwl4965_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl4965_tx_queue *txq) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1384 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1385 | struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0]; |
| 1386 | struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr]; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1387 | struct pci_dev *dev = priv->pci_dev; |
| 1388 | int i; |
| 1389 | int counter = 0; |
| 1390 | int index, is_odd; |
| 1391 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1392 | /* Host command buffers stay mapped in memory, nothing to clean */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1393 | if (txq->q.id == IWL_CMD_QUEUE_NUM) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1394 | return 0; |
| 1395 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1396 | /* Sanity check on number of chunks */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1397 | counter = IWL_GET_BITS(*bd, num_tbs); |
| 1398 | if (counter > MAX_NUM_OF_TBS) { |
| 1399 | IWL_ERROR("Too many chunks: %i\n", counter); |
| 1400 | /* @todo issue fatal error, it is quite serious situation */ |
| 1401 | return 0; |
| 1402 | } |
| 1403 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1404 | /* Unmap chunks, if any. |
| 1405 | * TFD info for odd chunks is different format than for even chunks. */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1406 | for (i = 0; i < counter; i++) { |
| 1407 | index = i / 2; |
| 1408 | is_odd = i & 0x1; |
| 1409 | |
| 1410 | if (is_odd) |
| 1411 | pci_unmap_single( |
| 1412 | dev, |
| 1413 | IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) | |
| 1414 | (IWL_GET_BITS(bd->pa[index], |
| 1415 | tb2_addr_hi20) << 16), |
| 1416 | IWL_GET_BITS(bd->pa[index], tb2_len), |
| 1417 | PCI_DMA_TODEVICE); |
| 1418 | |
| 1419 | else if (i > 0) |
| 1420 | pci_unmap_single(dev, |
| 1421 | le32_to_cpu(bd->pa[index].tb1_addr), |
| 1422 | IWL_GET_BITS(bd->pa[index], tb1_len), |
| 1423 | PCI_DMA_TODEVICE); |
| 1424 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1425 | /* Free SKB, if any, for this chunk */ |
Tomas Winkler | fc4b685 | 2007-10-25 17:15:24 +0800 | [diff] [blame] | 1426 | if (txq->txb[txq->q.read_ptr].skb[i]) { |
| 1427 | struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i]; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1428 | |
| 1429 | dev_kfree_skb(skb); |
Tomas Winkler | fc4b685 | 2007-10-25 17:15:24 +0800 | [diff] [blame] | 1430 | txq->txb[txq->q.read_ptr].skb[i] = NULL; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1431 | } |
| 1432 | } |
| 1433 | return 0; |
| 1434 | } |
| 1435 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1436 | int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1437 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1438 | IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n"); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1439 | return -EINVAL; |
| 1440 | } |
| 1441 | |
| 1442 | static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res) |
| 1443 | { |
| 1444 | s32 sign = 1; |
| 1445 | |
| 1446 | if (num < 0) { |
| 1447 | sign = -sign; |
| 1448 | num = -num; |
| 1449 | } |
| 1450 | if (denom < 0) { |
| 1451 | sign = -sign; |
| 1452 | denom = -denom; |
| 1453 | } |
| 1454 | *res = 1; |
| 1455 | *res = ((num * 2 + denom) / (denom * 2)) * sign; |
| 1456 | |
| 1457 | return 1; |
| 1458 | } |
| 1459 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1460 | /** |
| 1461 | * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower |
| 1462 | * |
| 1463 | * Determines power supply voltage compensation for txpower calculations. |
| 1464 | * Returns number of 1/2-dB steps to subtract from gain table index, |
| 1465 | * to compensate for difference between power supply voltage during |
| 1466 | * factory measurements, vs. current power supply voltage. |
| 1467 | * |
| 1468 | * Voltage indication is higher for lower voltage. |
| 1469 | * Lower voltage requires more gain (lower gain table index). |
| 1470 | */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1471 | static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage, |
| 1472 | s32 current_voltage) |
| 1473 | { |
| 1474 | s32 comp = 0; |
| 1475 | |
| 1476 | if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) || |
| 1477 | (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage)) |
| 1478 | return 0; |
| 1479 | |
| 1480 | iwl4965_math_div_round(current_voltage - eeprom_voltage, |
| 1481 | TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp); |
| 1482 | |
| 1483 | if (current_voltage > eeprom_voltage) |
| 1484 | comp *= 2; |
| 1485 | if ((comp < -2) || (comp > 2)) |
| 1486 | comp = 0; |
| 1487 | |
| 1488 | return comp; |
| 1489 | } |
| 1490 | |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 1491 | static const struct iwl_channel_info * |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1492 | iwl4965_get_channel_txpower_info(struct iwl_priv *priv, |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 1493 | enum ieee80211_band band, u16 channel) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1494 | { |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 1495 | const struct iwl_channel_info *ch_info; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1496 | |
Assaf Krauss | 8622e70 | 2008-03-21 13:53:43 -0700 | [diff] [blame] | 1497 | ch_info = iwl_get_channel_info(priv, band, channel); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1498 | |
| 1499 | if (!is_channel_valid(ch_info)) |
| 1500 | return NULL; |
| 1501 | |
| 1502 | return ch_info; |
| 1503 | } |
| 1504 | |
| 1505 | static s32 iwl4965_get_tx_atten_grp(u16 channel) |
| 1506 | { |
| 1507 | if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH && |
| 1508 | channel <= CALIB_IWL_TX_ATTEN_GR5_LCH) |
| 1509 | return CALIB_CH_GROUP_5; |
| 1510 | |
| 1511 | if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH && |
| 1512 | channel <= CALIB_IWL_TX_ATTEN_GR1_LCH) |
| 1513 | return CALIB_CH_GROUP_1; |
| 1514 | |
| 1515 | if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH && |
| 1516 | channel <= CALIB_IWL_TX_ATTEN_GR2_LCH) |
| 1517 | return CALIB_CH_GROUP_2; |
| 1518 | |
| 1519 | if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH && |
| 1520 | channel <= CALIB_IWL_TX_ATTEN_GR3_LCH) |
| 1521 | return CALIB_CH_GROUP_3; |
| 1522 | |
| 1523 | if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH && |
| 1524 | channel <= CALIB_IWL_TX_ATTEN_GR4_LCH) |
| 1525 | return CALIB_CH_GROUP_4; |
| 1526 | |
| 1527 | IWL_ERROR("Can't find txatten group for channel %d.\n", channel); |
| 1528 | return -1; |
| 1529 | } |
| 1530 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1531 | static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1532 | { |
| 1533 | s32 b = -1; |
| 1534 | |
| 1535 | for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) { |
| 1536 | if (priv->eeprom.calib_info.band_info[b].ch_from == 0) |
| 1537 | continue; |
| 1538 | |
| 1539 | if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from) |
| 1540 | && (channel <= priv->eeprom.calib_info.band_info[b].ch_to)) |
| 1541 | break; |
| 1542 | } |
| 1543 | |
| 1544 | return b; |
| 1545 | } |
| 1546 | |
| 1547 | static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2) |
| 1548 | { |
| 1549 | s32 val; |
| 1550 | |
| 1551 | if (x2 == x1) |
| 1552 | return y1; |
| 1553 | else { |
| 1554 | iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val); |
| 1555 | return val + y2; |
| 1556 | } |
| 1557 | } |
| 1558 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 1559 | /** |
| 1560 | * iwl4965_interpolate_chan - Interpolate factory measurements for one channel |
| 1561 | * |
| 1562 | * Interpolates factory measurements from the two sample channels within a |
| 1563 | * sub-band, to apply to channel of interest. Interpolation is proportional to |
| 1564 | * differences in channel frequencies, which is proportional to differences |
| 1565 | * in channel number. |
| 1566 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1567 | static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1568 | struct iwl4965_eeprom_calib_ch_info *chan_info) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1569 | { |
| 1570 | s32 s = -1; |
| 1571 | u32 c; |
| 1572 | u32 m; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1573 | const struct iwl4965_eeprom_calib_measure *m1; |
| 1574 | const struct iwl4965_eeprom_calib_measure *m2; |
| 1575 | struct iwl4965_eeprom_calib_measure *omeas; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1576 | u32 ch_i1; |
| 1577 | u32 ch_i2; |
| 1578 | |
| 1579 | s = iwl4965_get_sub_band(priv, channel); |
| 1580 | if (s >= EEPROM_TX_POWER_BANDS) { |
| 1581 | IWL_ERROR("Tx Power can not find channel %d ", channel); |
| 1582 | return -1; |
| 1583 | } |
| 1584 | |
| 1585 | ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num; |
| 1586 | ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num; |
| 1587 | chan_info->ch_num = (u8) channel; |
| 1588 | |
| 1589 | IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n", |
| 1590 | channel, s, ch_i1, ch_i2); |
| 1591 | |
| 1592 | for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) { |
| 1593 | for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) { |
| 1594 | m1 = &(priv->eeprom.calib_info.band_info[s].ch1. |
| 1595 | measurements[c][m]); |
| 1596 | m2 = &(priv->eeprom.calib_info.band_info[s].ch2. |
| 1597 | measurements[c][m]); |
| 1598 | omeas = &(chan_info->measurements[c][m]); |
| 1599 | |
| 1600 | omeas->actual_pow = |
| 1601 | (u8) iwl4965_interpolate_value(channel, ch_i1, |
| 1602 | m1->actual_pow, |
| 1603 | ch_i2, |
| 1604 | m2->actual_pow); |
| 1605 | omeas->gain_idx = |
| 1606 | (u8) iwl4965_interpolate_value(channel, ch_i1, |
| 1607 | m1->gain_idx, ch_i2, |
| 1608 | m2->gain_idx); |
| 1609 | omeas->temperature = |
| 1610 | (u8) iwl4965_interpolate_value(channel, ch_i1, |
| 1611 | m1->temperature, |
| 1612 | ch_i2, |
| 1613 | m2->temperature); |
| 1614 | omeas->pa_det = |
| 1615 | (s8) iwl4965_interpolate_value(channel, ch_i1, |
| 1616 | m1->pa_det, ch_i2, |
| 1617 | m2->pa_det); |
| 1618 | |
| 1619 | IWL_DEBUG_TXPOWER |
| 1620 | ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m, |
| 1621 | m1->actual_pow, m2->actual_pow, omeas->actual_pow); |
| 1622 | IWL_DEBUG_TXPOWER |
| 1623 | ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m, |
| 1624 | m1->gain_idx, m2->gain_idx, omeas->gain_idx); |
| 1625 | IWL_DEBUG_TXPOWER |
| 1626 | ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m, |
| 1627 | m1->pa_det, m2->pa_det, omeas->pa_det); |
| 1628 | IWL_DEBUG_TXPOWER |
| 1629 | ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m, |
| 1630 | m1->temperature, m2->temperature, |
| 1631 | omeas->temperature); |
| 1632 | } |
| 1633 | } |
| 1634 | |
| 1635 | return 0; |
| 1636 | } |
| 1637 | |
| 1638 | /* bit-rate-dependent table to prevent Tx distortion, in half-dB units, |
| 1639 | * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */ |
| 1640 | static s32 back_off_table[] = { |
| 1641 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */ |
| 1642 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */ |
| 1643 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */ |
| 1644 | 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */ |
| 1645 | 10 /* CCK */ |
| 1646 | }; |
| 1647 | |
| 1648 | /* Thermal compensation values for txpower for various frequency ranges ... |
| 1649 | * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */ |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1650 | static struct iwl4965_txpower_comp_entry { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1651 | s32 degrees_per_05db_a; |
| 1652 | s32 degrees_per_05db_a_denom; |
| 1653 | } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = { |
| 1654 | {9, 2}, /* group 0 5.2, ch 34-43 */ |
| 1655 | {4, 1}, /* group 1 5.2, ch 44-70 */ |
| 1656 | {4, 1}, /* group 2 5.2, ch 71-124 */ |
| 1657 | {4, 1}, /* group 3 5.2, ch 125-200 */ |
| 1658 | {3, 1} /* group 4 2.4, ch all */ |
| 1659 | }; |
| 1660 | |
| 1661 | static s32 get_min_power_index(s32 rate_power_index, u32 band) |
| 1662 | { |
| 1663 | if (!band) { |
| 1664 | if ((rate_power_index & 7) <= 4) |
| 1665 | return MIN_TX_GAIN_INDEX_52GHZ_EXT; |
| 1666 | } |
| 1667 | return MIN_TX_GAIN_INDEX; |
| 1668 | } |
| 1669 | |
| 1670 | struct gain_entry { |
| 1671 | u8 dsp; |
| 1672 | u8 radio; |
| 1673 | }; |
| 1674 | |
| 1675 | static const struct gain_entry gain_table[2][108] = { |
| 1676 | /* 5.2GHz power gain index table */ |
| 1677 | { |
| 1678 | {123, 0x3F}, /* highest txpower */ |
| 1679 | {117, 0x3F}, |
| 1680 | {110, 0x3F}, |
| 1681 | {104, 0x3F}, |
| 1682 | {98, 0x3F}, |
| 1683 | {110, 0x3E}, |
| 1684 | {104, 0x3E}, |
| 1685 | {98, 0x3E}, |
| 1686 | {110, 0x3D}, |
| 1687 | {104, 0x3D}, |
| 1688 | {98, 0x3D}, |
| 1689 | {110, 0x3C}, |
| 1690 | {104, 0x3C}, |
| 1691 | {98, 0x3C}, |
| 1692 | {110, 0x3B}, |
| 1693 | {104, 0x3B}, |
| 1694 | {98, 0x3B}, |
| 1695 | {110, 0x3A}, |
| 1696 | {104, 0x3A}, |
| 1697 | {98, 0x3A}, |
| 1698 | {110, 0x39}, |
| 1699 | {104, 0x39}, |
| 1700 | {98, 0x39}, |
| 1701 | {110, 0x38}, |
| 1702 | {104, 0x38}, |
| 1703 | {98, 0x38}, |
| 1704 | {110, 0x37}, |
| 1705 | {104, 0x37}, |
| 1706 | {98, 0x37}, |
| 1707 | {110, 0x36}, |
| 1708 | {104, 0x36}, |
| 1709 | {98, 0x36}, |
| 1710 | {110, 0x35}, |
| 1711 | {104, 0x35}, |
| 1712 | {98, 0x35}, |
| 1713 | {110, 0x34}, |
| 1714 | {104, 0x34}, |
| 1715 | {98, 0x34}, |
| 1716 | {110, 0x33}, |
| 1717 | {104, 0x33}, |
| 1718 | {98, 0x33}, |
| 1719 | {110, 0x32}, |
| 1720 | {104, 0x32}, |
| 1721 | {98, 0x32}, |
| 1722 | {110, 0x31}, |
| 1723 | {104, 0x31}, |
| 1724 | {98, 0x31}, |
| 1725 | {110, 0x30}, |
| 1726 | {104, 0x30}, |
| 1727 | {98, 0x30}, |
| 1728 | {110, 0x25}, |
| 1729 | {104, 0x25}, |
| 1730 | {98, 0x25}, |
| 1731 | {110, 0x24}, |
| 1732 | {104, 0x24}, |
| 1733 | {98, 0x24}, |
| 1734 | {110, 0x23}, |
| 1735 | {104, 0x23}, |
| 1736 | {98, 0x23}, |
| 1737 | {110, 0x22}, |
| 1738 | {104, 0x18}, |
| 1739 | {98, 0x18}, |
| 1740 | {110, 0x17}, |
| 1741 | {104, 0x17}, |
| 1742 | {98, 0x17}, |
| 1743 | {110, 0x16}, |
| 1744 | {104, 0x16}, |
| 1745 | {98, 0x16}, |
| 1746 | {110, 0x15}, |
| 1747 | {104, 0x15}, |
| 1748 | {98, 0x15}, |
| 1749 | {110, 0x14}, |
| 1750 | {104, 0x14}, |
| 1751 | {98, 0x14}, |
| 1752 | {110, 0x13}, |
| 1753 | {104, 0x13}, |
| 1754 | {98, 0x13}, |
| 1755 | {110, 0x12}, |
| 1756 | {104, 0x08}, |
| 1757 | {98, 0x08}, |
| 1758 | {110, 0x07}, |
| 1759 | {104, 0x07}, |
| 1760 | {98, 0x07}, |
| 1761 | {110, 0x06}, |
| 1762 | {104, 0x06}, |
| 1763 | {98, 0x06}, |
| 1764 | {110, 0x05}, |
| 1765 | {104, 0x05}, |
| 1766 | {98, 0x05}, |
| 1767 | {110, 0x04}, |
| 1768 | {104, 0x04}, |
| 1769 | {98, 0x04}, |
| 1770 | {110, 0x03}, |
| 1771 | {104, 0x03}, |
| 1772 | {98, 0x03}, |
| 1773 | {110, 0x02}, |
| 1774 | {104, 0x02}, |
| 1775 | {98, 0x02}, |
| 1776 | {110, 0x01}, |
| 1777 | {104, 0x01}, |
| 1778 | {98, 0x01}, |
| 1779 | {110, 0x00}, |
| 1780 | {104, 0x00}, |
| 1781 | {98, 0x00}, |
| 1782 | {93, 0x00}, |
| 1783 | {88, 0x00}, |
| 1784 | {83, 0x00}, |
| 1785 | {78, 0x00}, |
| 1786 | }, |
| 1787 | /* 2.4GHz power gain index table */ |
| 1788 | { |
| 1789 | {110, 0x3f}, /* highest txpower */ |
| 1790 | {104, 0x3f}, |
| 1791 | {98, 0x3f}, |
| 1792 | {110, 0x3e}, |
| 1793 | {104, 0x3e}, |
| 1794 | {98, 0x3e}, |
| 1795 | {110, 0x3d}, |
| 1796 | {104, 0x3d}, |
| 1797 | {98, 0x3d}, |
| 1798 | {110, 0x3c}, |
| 1799 | {104, 0x3c}, |
| 1800 | {98, 0x3c}, |
| 1801 | {110, 0x3b}, |
| 1802 | {104, 0x3b}, |
| 1803 | {98, 0x3b}, |
| 1804 | {110, 0x3a}, |
| 1805 | {104, 0x3a}, |
| 1806 | {98, 0x3a}, |
| 1807 | {110, 0x39}, |
| 1808 | {104, 0x39}, |
| 1809 | {98, 0x39}, |
| 1810 | {110, 0x38}, |
| 1811 | {104, 0x38}, |
| 1812 | {98, 0x38}, |
| 1813 | {110, 0x37}, |
| 1814 | {104, 0x37}, |
| 1815 | {98, 0x37}, |
| 1816 | {110, 0x36}, |
| 1817 | {104, 0x36}, |
| 1818 | {98, 0x36}, |
| 1819 | {110, 0x35}, |
| 1820 | {104, 0x35}, |
| 1821 | {98, 0x35}, |
| 1822 | {110, 0x34}, |
| 1823 | {104, 0x34}, |
| 1824 | {98, 0x34}, |
| 1825 | {110, 0x33}, |
| 1826 | {104, 0x33}, |
| 1827 | {98, 0x33}, |
| 1828 | {110, 0x32}, |
| 1829 | {104, 0x32}, |
| 1830 | {98, 0x32}, |
| 1831 | {110, 0x31}, |
| 1832 | {104, 0x31}, |
| 1833 | {98, 0x31}, |
| 1834 | {110, 0x30}, |
| 1835 | {104, 0x30}, |
| 1836 | {98, 0x30}, |
| 1837 | {110, 0x6}, |
| 1838 | {104, 0x6}, |
| 1839 | {98, 0x6}, |
| 1840 | {110, 0x5}, |
| 1841 | {104, 0x5}, |
| 1842 | {98, 0x5}, |
| 1843 | {110, 0x4}, |
| 1844 | {104, 0x4}, |
| 1845 | {98, 0x4}, |
| 1846 | {110, 0x3}, |
| 1847 | {104, 0x3}, |
| 1848 | {98, 0x3}, |
| 1849 | {110, 0x2}, |
| 1850 | {104, 0x2}, |
| 1851 | {98, 0x2}, |
| 1852 | {110, 0x1}, |
| 1853 | {104, 0x1}, |
| 1854 | {98, 0x1}, |
| 1855 | {110, 0x0}, |
| 1856 | {104, 0x0}, |
| 1857 | {98, 0x0}, |
| 1858 | {97, 0}, |
| 1859 | {96, 0}, |
| 1860 | {95, 0}, |
| 1861 | {94, 0}, |
| 1862 | {93, 0}, |
| 1863 | {92, 0}, |
| 1864 | {91, 0}, |
| 1865 | {90, 0}, |
| 1866 | {89, 0}, |
| 1867 | {88, 0}, |
| 1868 | {87, 0}, |
| 1869 | {86, 0}, |
| 1870 | {85, 0}, |
| 1871 | {84, 0}, |
| 1872 | {83, 0}, |
| 1873 | {82, 0}, |
| 1874 | {81, 0}, |
| 1875 | {80, 0}, |
| 1876 | {79, 0}, |
| 1877 | {78, 0}, |
| 1878 | {77, 0}, |
| 1879 | {76, 0}, |
| 1880 | {75, 0}, |
| 1881 | {74, 0}, |
| 1882 | {73, 0}, |
| 1883 | {72, 0}, |
| 1884 | {71, 0}, |
| 1885 | {70, 0}, |
| 1886 | {69, 0}, |
| 1887 | {68, 0}, |
| 1888 | {67, 0}, |
| 1889 | {66, 0}, |
| 1890 | {65, 0}, |
| 1891 | {64, 0}, |
| 1892 | {63, 0}, |
| 1893 | {62, 0}, |
| 1894 | {61, 0}, |
| 1895 | {60, 0}, |
| 1896 | {59, 0}, |
| 1897 | } |
| 1898 | }; |
| 1899 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 1900 | static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1901 | u8 is_fat, u8 ctrl_chan_high, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1902 | struct iwl4965_tx_power_db *tx_power_tbl) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1903 | { |
| 1904 | u8 saturation_power; |
| 1905 | s32 target_power; |
| 1906 | s32 user_target_power; |
| 1907 | s32 power_limit; |
| 1908 | s32 current_temp; |
| 1909 | s32 reg_limit; |
| 1910 | s32 current_regulatory; |
| 1911 | s32 txatten_grp = CALIB_CH_GROUP_MAX; |
| 1912 | int i; |
| 1913 | int c; |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 1914 | const struct iwl_channel_info *ch_info = NULL; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 1915 | struct iwl4965_eeprom_calib_ch_info ch_eeprom_info; |
| 1916 | const struct iwl4965_eeprom_calib_measure *measurement; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1917 | s16 voltage; |
| 1918 | s32 init_voltage; |
| 1919 | s32 voltage_compensation; |
| 1920 | s32 degrees_per_05db_num; |
| 1921 | s32 degrees_per_05db_denom; |
| 1922 | s32 factory_temp; |
| 1923 | s32 temperature_comp[2]; |
| 1924 | s32 factory_gain_index[2]; |
| 1925 | s32 factory_actual_pwr[2]; |
| 1926 | s32 power_index; |
| 1927 | |
| 1928 | /* Sanity check requested level (dBm) */ |
| 1929 | if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) { |
| 1930 | IWL_WARNING("Requested user TXPOWER %d below limit.\n", |
| 1931 | priv->user_txpower_limit); |
| 1932 | return -EINVAL; |
| 1933 | } |
| 1934 | if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) { |
| 1935 | IWL_WARNING("Requested user TXPOWER %d above limit.\n", |
| 1936 | priv->user_txpower_limit); |
| 1937 | return -EINVAL; |
| 1938 | } |
| 1939 | |
| 1940 | /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units |
| 1941 | * are used for indexing into txpower table) */ |
| 1942 | user_target_power = 2 * priv->user_txpower_limit; |
| 1943 | |
| 1944 | /* Get current (RXON) channel, band, width */ |
| 1945 | ch_info = |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 1946 | iwl4965_get_channel_txpower_info(priv, priv->band, channel); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 1947 | |
| 1948 | IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band, |
| 1949 | is_fat); |
| 1950 | |
| 1951 | if (!ch_info) |
| 1952 | return -EINVAL; |
| 1953 | |
| 1954 | /* get txatten group, used to select 1) thermal txpower adjustment |
| 1955 | * and 2) mimo txpower balance between Tx chains. */ |
| 1956 | txatten_grp = iwl4965_get_tx_atten_grp(channel); |
| 1957 | if (txatten_grp < 0) |
| 1958 | return -EINVAL; |
| 1959 | |
| 1960 | IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n", |
| 1961 | channel, txatten_grp); |
| 1962 | |
| 1963 | if (is_fat) { |
| 1964 | if (ctrl_chan_high) |
| 1965 | channel -= 2; |
| 1966 | else |
| 1967 | channel += 2; |
| 1968 | } |
| 1969 | |
| 1970 | /* hardware txpower limits ... |
| 1971 | * saturation (clipping distortion) txpowers are in half-dBm */ |
| 1972 | if (band) |
| 1973 | saturation_power = priv->eeprom.calib_info.saturation_power24; |
| 1974 | else |
| 1975 | saturation_power = priv->eeprom.calib_info.saturation_power52; |
| 1976 | |
| 1977 | if (saturation_power < IWL_TX_POWER_SATURATION_MIN || |
| 1978 | saturation_power > IWL_TX_POWER_SATURATION_MAX) { |
| 1979 | if (band) |
| 1980 | saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24; |
| 1981 | else |
| 1982 | saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52; |
| 1983 | } |
| 1984 | |
| 1985 | /* regulatory txpower limits ... reg_limit values are in half-dBm, |
| 1986 | * max_power_avg values are in dBm, convert * 2 */ |
| 1987 | if (is_fat) |
| 1988 | reg_limit = ch_info->fat_max_power_avg * 2; |
| 1989 | else |
| 1990 | reg_limit = ch_info->max_power_avg * 2; |
| 1991 | |
| 1992 | if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) || |
| 1993 | (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) { |
| 1994 | if (band) |
| 1995 | reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24; |
| 1996 | else |
| 1997 | reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52; |
| 1998 | } |
| 1999 | |
| 2000 | /* Interpolate txpower calibration values for this channel, |
| 2001 | * based on factory calibration tests on spaced channels. */ |
| 2002 | iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info); |
| 2003 | |
| 2004 | /* calculate tx gain adjustment based on power supply voltage */ |
| 2005 | voltage = priv->eeprom.calib_info.voltage; |
| 2006 | init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage); |
| 2007 | voltage_compensation = |
| 2008 | iwl4965_get_voltage_compensation(voltage, init_voltage); |
| 2009 | |
| 2010 | IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n", |
| 2011 | init_voltage, |
| 2012 | voltage, voltage_compensation); |
| 2013 | |
| 2014 | /* get current temperature (Celsius) */ |
| 2015 | current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN); |
| 2016 | current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX); |
| 2017 | current_temp = KELVIN_TO_CELSIUS(current_temp); |
| 2018 | |
| 2019 | /* select thermal txpower adjustment params, based on channel group |
| 2020 | * (same frequency group used for mimo txatten adjustment) */ |
| 2021 | degrees_per_05db_num = |
| 2022 | tx_power_cmp_tble[txatten_grp].degrees_per_05db_a; |
| 2023 | degrees_per_05db_denom = |
| 2024 | tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom; |
| 2025 | |
| 2026 | /* get per-chain txpower values from factory measurements */ |
| 2027 | for (c = 0; c < 2; c++) { |
| 2028 | measurement = &ch_eeprom_info.measurements[c][1]; |
| 2029 | |
| 2030 | /* txgain adjustment (in half-dB steps) based on difference |
| 2031 | * between factory and current temperature */ |
| 2032 | factory_temp = measurement->temperature; |
| 2033 | iwl4965_math_div_round((current_temp - factory_temp) * |
| 2034 | degrees_per_05db_denom, |
| 2035 | degrees_per_05db_num, |
| 2036 | &temperature_comp[c]); |
| 2037 | |
| 2038 | factory_gain_index[c] = measurement->gain_idx; |
| 2039 | factory_actual_pwr[c] = measurement->actual_pow; |
| 2040 | |
| 2041 | IWL_DEBUG_TXPOWER("chain = %d\n", c); |
| 2042 | IWL_DEBUG_TXPOWER("fctry tmp %d, " |
| 2043 | "curr tmp %d, comp %d steps\n", |
| 2044 | factory_temp, current_temp, |
| 2045 | temperature_comp[c]); |
| 2046 | |
| 2047 | IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n", |
| 2048 | factory_gain_index[c], |
| 2049 | factory_actual_pwr[c]); |
| 2050 | } |
| 2051 | |
| 2052 | /* for each of 33 bit-rates (including 1 for CCK) */ |
| 2053 | for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) { |
| 2054 | u8 is_mimo_rate; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2055 | union iwl4965_tx_power_dual_stream tx_power; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2056 | |
| 2057 | /* for mimo, reduce each chain's txpower by half |
| 2058 | * (3dB, 6 steps), so total output power is regulatory |
| 2059 | * compliant. */ |
| 2060 | if (i & 0x8) { |
| 2061 | current_regulatory = reg_limit - |
| 2062 | IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION; |
| 2063 | is_mimo_rate = 1; |
| 2064 | } else { |
| 2065 | current_regulatory = reg_limit; |
| 2066 | is_mimo_rate = 0; |
| 2067 | } |
| 2068 | |
| 2069 | /* find txpower limit, either hardware or regulatory */ |
| 2070 | power_limit = saturation_power - back_off_table[i]; |
| 2071 | if (power_limit > current_regulatory) |
| 2072 | power_limit = current_regulatory; |
| 2073 | |
| 2074 | /* reduce user's txpower request if necessary |
| 2075 | * for this rate on this channel */ |
| 2076 | target_power = user_target_power; |
| 2077 | if (target_power > power_limit) |
| 2078 | target_power = power_limit; |
| 2079 | |
| 2080 | IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n", |
| 2081 | i, saturation_power - back_off_table[i], |
| 2082 | current_regulatory, user_target_power, |
| 2083 | target_power); |
| 2084 | |
| 2085 | /* for each of 2 Tx chains (radio transmitters) */ |
| 2086 | for (c = 0; c < 2; c++) { |
| 2087 | s32 atten_value; |
| 2088 | |
| 2089 | if (is_mimo_rate) |
| 2090 | atten_value = |
| 2091 | (s32)le32_to_cpu(priv->card_alive_init. |
| 2092 | tx_atten[txatten_grp][c]); |
| 2093 | else |
| 2094 | atten_value = 0; |
| 2095 | |
| 2096 | /* calculate index; higher index means lower txpower */ |
| 2097 | power_index = (u8) (factory_gain_index[c] - |
| 2098 | (target_power - |
| 2099 | factory_actual_pwr[c]) - |
| 2100 | temperature_comp[c] - |
| 2101 | voltage_compensation + |
| 2102 | atten_value); |
| 2103 | |
| 2104 | /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n", |
| 2105 | power_index); */ |
| 2106 | |
| 2107 | if (power_index < get_min_power_index(i, band)) |
| 2108 | power_index = get_min_power_index(i, band); |
| 2109 | |
| 2110 | /* adjust 5 GHz index to support negative indexes */ |
| 2111 | if (!band) |
| 2112 | power_index += 9; |
| 2113 | |
| 2114 | /* CCK, rate 32, reduce txpower for CCK */ |
| 2115 | if (i == POWER_TABLE_CCK_ENTRY) |
| 2116 | power_index += |
| 2117 | IWL_TX_POWER_CCK_COMPENSATION_C_STEP; |
| 2118 | |
| 2119 | /* stay within the table! */ |
| 2120 | if (power_index > 107) { |
| 2121 | IWL_WARNING("txpower index %d > 107\n", |
| 2122 | power_index); |
| 2123 | power_index = 107; |
| 2124 | } |
| 2125 | if (power_index < 0) { |
| 2126 | IWL_WARNING("txpower index %d < 0\n", |
| 2127 | power_index); |
| 2128 | power_index = 0; |
| 2129 | } |
| 2130 | |
| 2131 | /* fill txpower command for this rate/chain */ |
| 2132 | tx_power.s.radio_tx_gain[c] = |
| 2133 | gain_table[band][power_index].radio; |
| 2134 | tx_power.s.dsp_predis_atten[c] = |
| 2135 | gain_table[band][power_index].dsp; |
| 2136 | |
| 2137 | IWL_DEBUG_TXPOWER("chain %d mimo %d index %d " |
| 2138 | "gain 0x%02x dsp %d\n", |
| 2139 | c, atten_value, power_index, |
| 2140 | tx_power.s.radio_tx_gain[c], |
| 2141 | tx_power.s.dsp_predis_atten[c]); |
| 2142 | }/* for each chain */ |
| 2143 | |
| 2144 | tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw); |
| 2145 | |
| 2146 | }/* for each rate */ |
| 2147 | |
| 2148 | return 0; |
| 2149 | } |
| 2150 | |
| 2151 | /** |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2152 | * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2153 | * |
| 2154 | * Uses the active RXON for channel, band, and characteristics (fat, high) |
| 2155 | * The power limit is taken from priv->user_txpower_limit. |
| 2156 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2157 | int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2158 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2159 | struct iwl4965_txpowertable_cmd cmd = { 0 }; |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 2160 | int ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2161 | u8 band = 0; |
| 2162 | u8 is_fat = 0; |
| 2163 | u8 ctrl_chan_high = 0; |
| 2164 | |
| 2165 | if (test_bit(STATUS_SCANNING, &priv->status)) { |
| 2166 | /* If this gets hit a lot, switch it to a BUG() and catch |
| 2167 | * the stack trace to find out who is calling this during |
| 2168 | * a scan. */ |
| 2169 | IWL_WARNING("TX Power requested while scanning!\n"); |
| 2170 | return -EAGAIN; |
| 2171 | } |
| 2172 | |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 2173 | band = priv->band == IEEE80211_BAND_2GHZ; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2174 | |
| 2175 | is_fat = is_fat_channel(priv->active_rxon.flags); |
| 2176 | |
| 2177 | if (is_fat && |
| 2178 | (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) |
| 2179 | ctrl_chan_high = 1; |
| 2180 | |
| 2181 | cmd.band = band; |
| 2182 | cmd.channel = priv->active_rxon.channel; |
| 2183 | |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 2184 | ret = iwl4965_fill_txpower_tbl(priv, band, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2185 | le16_to_cpu(priv->active_rxon.channel), |
| 2186 | is_fat, ctrl_chan_high, &cmd.tx_power); |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 2187 | if (ret) |
| 2188 | goto out; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2189 | |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 2190 | ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd); |
| 2191 | |
| 2192 | out: |
| 2193 | return ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2194 | } |
| 2195 | |
Tomas Winkler | 7e8c519 | 2008-04-15 16:01:43 -0700 | [diff] [blame] | 2196 | static int iwl4965_send_rxon_assoc(struct iwl_priv *priv) |
| 2197 | { |
| 2198 | int ret = 0; |
| 2199 | struct iwl4965_rxon_assoc_cmd rxon_assoc; |
| 2200 | const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon; |
| 2201 | const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon; |
| 2202 | |
| 2203 | if ((rxon1->flags == rxon2->flags) && |
| 2204 | (rxon1->filter_flags == rxon2->filter_flags) && |
| 2205 | (rxon1->cck_basic_rates == rxon2->cck_basic_rates) && |
| 2206 | (rxon1->ofdm_ht_single_stream_basic_rates == |
| 2207 | rxon2->ofdm_ht_single_stream_basic_rates) && |
| 2208 | (rxon1->ofdm_ht_dual_stream_basic_rates == |
| 2209 | rxon2->ofdm_ht_dual_stream_basic_rates) && |
| 2210 | (rxon1->rx_chain == rxon2->rx_chain) && |
| 2211 | (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) { |
| 2212 | IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n"); |
| 2213 | return 0; |
| 2214 | } |
| 2215 | |
| 2216 | rxon_assoc.flags = priv->staging_rxon.flags; |
| 2217 | rxon_assoc.filter_flags = priv->staging_rxon.filter_flags; |
| 2218 | rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates; |
| 2219 | rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates; |
| 2220 | rxon_assoc.reserved = 0; |
| 2221 | rxon_assoc.ofdm_ht_single_stream_basic_rates = |
| 2222 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates; |
| 2223 | rxon_assoc.ofdm_ht_dual_stream_basic_rates = |
| 2224 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates; |
| 2225 | rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain; |
| 2226 | |
| 2227 | ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC, |
| 2228 | sizeof(rxon_assoc), &rxon_assoc, NULL); |
| 2229 | if (ret) |
| 2230 | return ret; |
| 2231 | |
| 2232 | return ret; |
| 2233 | } |
| 2234 | |
| 2235 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2236 | int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2237 | { |
| 2238 | int rc; |
| 2239 | u8 band = 0; |
| 2240 | u8 is_fat = 0; |
| 2241 | u8 ctrl_chan_high = 0; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2242 | struct iwl4965_channel_switch_cmd cmd = { 0 }; |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 2243 | const struct iwl_channel_info *ch_info; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2244 | |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 2245 | band = priv->band == IEEE80211_BAND_2GHZ; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2246 | |
Assaf Krauss | 8622e70 | 2008-03-21 13:53:43 -0700 | [diff] [blame] | 2247 | ch_info = iwl_get_channel_info(priv, priv->band, channel); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2248 | |
| 2249 | is_fat = is_fat_channel(priv->staging_rxon.flags); |
| 2250 | |
| 2251 | if (is_fat && |
| 2252 | (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) |
| 2253 | ctrl_chan_high = 1; |
| 2254 | |
| 2255 | cmd.band = band; |
| 2256 | cmd.expect_beacon = 0; |
| 2257 | cmd.channel = cpu_to_le16(channel); |
| 2258 | cmd.rxon_flags = priv->active_rxon.flags; |
| 2259 | cmd.rxon_filter_flags = priv->active_rxon.filter_flags; |
| 2260 | cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); |
| 2261 | if (ch_info) |
| 2262 | cmd.expect_beacon = is_channel_radar(ch_info); |
| 2263 | else |
| 2264 | cmd.expect_beacon = 1; |
| 2265 | |
| 2266 | rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat, |
| 2267 | ctrl_chan_high, &cmd.tx_power); |
| 2268 | if (rc) { |
| 2269 | IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc); |
| 2270 | return rc; |
| 2271 | } |
| 2272 | |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 2273 | rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2274 | return rc; |
| 2275 | } |
| 2276 | |
| 2277 | #define RTS_HCCA_RETRY_LIMIT 3 |
| 2278 | #define RTS_DFAULT_RETRY_LIMIT 60 |
| 2279 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2280 | void iwl4965_hw_build_tx_cmd_rate(struct iwl_priv *priv, |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 2281 | struct iwl_cmd *cmd, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2282 | struct ieee80211_tx_control *ctrl, |
| 2283 | struct ieee80211_hdr *hdr, int sta_id, |
| 2284 | int is_hcca) |
| 2285 | { |
Tomas Winkler | 87e4f7d | 2008-01-14 17:46:16 -0800 | [diff] [blame] | 2286 | struct iwl4965_tx_cmd *tx = &cmd->cmd.tx; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2287 | u8 rts_retry_limit = 0; |
| 2288 | u8 data_retry_limit = 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2289 | u16 fc = le16_to_cpu(hdr->frame_control); |
Tomas Winkler | 87e4f7d | 2008-01-14 17:46:16 -0800 | [diff] [blame] | 2290 | u8 rate_plcp; |
| 2291 | u16 rate_flags = 0; |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 2292 | int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2293 | |
Tomas Winkler | 87e4f7d | 2008-01-14 17:46:16 -0800 | [diff] [blame] | 2294 | rate_plcp = iwl4965_rates[rate_idx].plcp; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2295 | |
| 2296 | rts_retry_limit = (is_hcca) ? |
| 2297 | RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT; |
| 2298 | |
Tomas Winkler | 87e4f7d | 2008-01-14 17:46:16 -0800 | [diff] [blame] | 2299 | if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE)) |
| 2300 | rate_flags |= RATE_MCS_CCK_MSK; |
| 2301 | |
| 2302 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2303 | if (ieee80211_is_probe_response(fc)) { |
| 2304 | data_retry_limit = 3; |
| 2305 | if (data_retry_limit < rts_retry_limit) |
| 2306 | rts_retry_limit = data_retry_limit; |
| 2307 | } else |
| 2308 | data_retry_limit = IWL_DEFAULT_TX_RETRY; |
| 2309 | |
| 2310 | if (priv->data_retry_limit != -1) |
| 2311 | data_retry_limit = priv->data_retry_limit; |
| 2312 | |
Tomas Winkler | 87e4f7d | 2008-01-14 17:46:16 -0800 | [diff] [blame] | 2313 | |
| 2314 | if (ieee80211_is_data(fc)) { |
| 2315 | tx->initial_rate_index = 0; |
| 2316 | tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK; |
| 2317 | } else { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2318 | switch (fc & IEEE80211_FCTL_STYPE) { |
| 2319 | case IEEE80211_STYPE_AUTH: |
| 2320 | case IEEE80211_STYPE_DEAUTH: |
| 2321 | case IEEE80211_STYPE_ASSOC_REQ: |
| 2322 | case IEEE80211_STYPE_REASSOC_REQ: |
Tomas Winkler | 87e4f7d | 2008-01-14 17:46:16 -0800 | [diff] [blame] | 2323 | if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) { |
| 2324 | tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK; |
| 2325 | tx->tx_flags |= TX_CMD_FLG_CTS_MSK; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2326 | } |
| 2327 | break; |
| 2328 | default: |
| 2329 | break; |
| 2330 | } |
Tomas Winkler | 87e4f7d | 2008-01-14 17:46:16 -0800 | [diff] [blame] | 2331 | |
| 2332 | /* Alternate between antenna A and B for successive frames */ |
| 2333 | if (priv->use_ant_b_for_management_frame) { |
| 2334 | priv->use_ant_b_for_management_frame = 0; |
| 2335 | rate_flags |= RATE_MCS_ANT_B_MSK; |
| 2336 | } else { |
| 2337 | priv->use_ant_b_for_management_frame = 1; |
| 2338 | rate_flags |= RATE_MCS_ANT_A_MSK; |
| 2339 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2340 | } |
| 2341 | |
Tomas Winkler | 87e4f7d | 2008-01-14 17:46:16 -0800 | [diff] [blame] | 2342 | tx->rts_retry_limit = rts_retry_limit; |
| 2343 | tx->data_retry_limit = data_retry_limit; |
| 2344 | tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2345 | } |
| 2346 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2347 | int iwl4965_hw_get_rx_read(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2348 | { |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 2349 | struct iwl4965_shared *s = priv->shared_virt; |
| 2350 | return le32_to_cpu(s->rb_closed) & 0xFFF; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2351 | } |
| 2352 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2353 | int iwl4965_hw_get_temperature(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2354 | { |
| 2355 | return priv->temperature; |
| 2356 | } |
| 2357 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2358 | unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2359 | struct iwl4965_frame *frame, u8 rate) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2360 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2361 | struct iwl4965_tx_beacon_cmd *tx_beacon_cmd; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2362 | unsigned int frame_size; |
| 2363 | |
| 2364 | tx_beacon_cmd = &frame->u.beacon; |
| 2365 | memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); |
| 2366 | |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 2367 | tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2368 | tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
| 2369 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2370 | frame_size = iwl4965_fill_beacon_frame(priv, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2371 | tx_beacon_cmd->frame, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2372 | iwl4965_broadcast_addr, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2373 | sizeof(frame->u) - sizeof(*tx_beacon_cmd)); |
| 2374 | |
| 2375 | BUG_ON(frame_size > MAX_MPDU_SIZE); |
| 2376 | tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); |
| 2377 | |
| 2378 | if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) |
| 2379 | tx_beacon_cmd->tx.rate_n_flags = |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2380 | iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2381 | else |
| 2382 | tx_beacon_cmd->tx.rate_n_flags = |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2383 | iwl4965_hw_set_rate_n_flags(rate, 0); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2384 | |
| 2385 | tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK | |
| 2386 | TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK); |
| 2387 | return (sizeof(*tx_beacon_cmd) + frame_size); |
| 2388 | } |
| 2389 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2390 | /* |
| 2391 | * Tell 4965 where to find circular buffer of Tx Frame Descriptors for |
| 2392 | * given Tx queue, and enable the DMA channel used for that queue. |
| 2393 | * |
| 2394 | * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA |
| 2395 | * channels supported in hardware. |
| 2396 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2397 | int iwl4965_hw_tx_queue_init(struct iwl_priv *priv, struct iwl4965_tx_queue *txq) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2398 | { |
| 2399 | int rc; |
| 2400 | unsigned long flags; |
| 2401 | int txq_id = txq->q.id; |
| 2402 | |
| 2403 | spin_lock_irqsave(&priv->lock, flags); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 2404 | rc = iwl_grab_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2405 | if (rc) { |
| 2406 | spin_unlock_irqrestore(&priv->lock, flags); |
| 2407 | return rc; |
| 2408 | } |
| 2409 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2410 | /* Circular buffer (TFD queue in DRAM) physical base address */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 2411 | iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id), |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2412 | txq->q.dma_addr >> 8); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2413 | |
| 2414 | /* Enable DMA channel, using same id as for TFD queue */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 2415 | iwl_write_direct32( |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2416 | priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), |
| 2417 | IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | |
| 2418 | IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 2419 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2420 | spin_unlock_irqrestore(&priv->lock, flags); |
| 2421 | |
| 2422 | return 0; |
| 2423 | } |
| 2424 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2425 | int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2426 | dma_addr_t addr, u16 len) |
| 2427 | { |
| 2428 | int index, is_odd; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2429 | struct iwl4965_tfd_frame *tfd = ptr; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2430 | u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs); |
| 2431 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2432 | /* Each TFD can point to a maximum 20 Tx buffers */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2433 | if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) { |
| 2434 | IWL_ERROR("Error can not send more than %d chunks\n", |
| 2435 | MAX_NUM_OF_TBS); |
| 2436 | return -EINVAL; |
| 2437 | } |
| 2438 | |
| 2439 | index = num_tbs / 2; |
| 2440 | is_odd = num_tbs & 0x1; |
| 2441 | |
| 2442 | if (!is_odd) { |
| 2443 | tfd->pa[index].tb1_addr = cpu_to_le32(addr); |
| 2444 | IWL_SET_BITS(tfd->pa[index], tb1_addr_hi, |
Tomas Winkler | 6a218f6 | 2008-01-14 17:46:15 -0800 | [diff] [blame] | 2445 | iwl_get_dma_hi_address(addr)); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2446 | IWL_SET_BITS(tfd->pa[index], tb1_len, len); |
| 2447 | } else { |
| 2448 | IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16, |
| 2449 | (u32) (addr & 0xffff)); |
| 2450 | IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16); |
| 2451 | IWL_SET_BITS(tfd->pa[index], tb2_len, len); |
| 2452 | } |
| 2453 | |
| 2454 | IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1); |
| 2455 | |
| 2456 | return 0; |
| 2457 | } |
| 2458 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2459 | static void iwl4965_hw_card_show_info(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2460 | { |
| 2461 | u16 hw_version = priv->eeprom.board_revision_4965; |
| 2462 | |
| 2463 | IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n", |
| 2464 | ((hw_version >> 8) & 0x0F), |
| 2465 | ((hw_version >> 8) >> 4), (hw_version & 0x00FF)); |
| 2466 | |
| 2467 | IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n", |
| 2468 | priv->eeprom.board_pba_number_4965); |
| 2469 | } |
| 2470 | |
| 2471 | #define IWL_TX_CRC_SIZE 4 |
| 2472 | #define IWL_TX_DELIMITER_SIZE 4 |
| 2473 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2474 | /** |
Tomas Winkler | e2a722e | 2008-04-14 21:16:10 -0700 | [diff] [blame] | 2475 | * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2476 | */ |
Tomas Winkler | e2a722e | 2008-04-14 21:16:10 -0700 | [diff] [blame] | 2477 | static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv, |
| 2478 | struct iwl4965_tx_queue *txq, |
| 2479 | u16 byte_cnt) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2480 | { |
| 2481 | int len; |
| 2482 | int txq_id = txq->q.id; |
Tomas Winkler | 059ff82 | 2008-04-14 21:16:14 -0700 | [diff] [blame] | 2483 | struct iwl4965_shared *shared_data = priv->shared_virt; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2484 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2485 | len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE; |
| 2486 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2487 | /* Set up byte count within first 256 entries */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2488 | IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id]. |
Tomas Winkler | fc4b685 | 2007-10-25 17:15:24 +0800 | [diff] [blame] | 2489 | tfd_offset[txq->q.write_ptr], byte_cnt, len); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2490 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2491 | /* If within first 64 entries, duplicate at end */ |
Tomas Winkler | fc4b685 | 2007-10-25 17:15:24 +0800 | [diff] [blame] | 2492 | if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2493 | IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id]. |
Tomas Winkler | fc4b685 | 2007-10-25 17:15:24 +0800 | [diff] [blame] | 2494 | tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr], |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2495 | byte_cnt, len); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2496 | } |
| 2497 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2498 | /** |
| 2499 | * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image |
| 2500 | * |
| 2501 | * Selects how many and which Rx receivers/antennas/chains to use. |
| 2502 | * This should not be used for scan command ... it puts data in wrong place. |
| 2503 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2504 | void iwl4965_set_rxon_chain(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2505 | { |
| 2506 | u8 is_single = is_single_stream(priv); |
| 2507 | u8 idle_state, rx_state; |
| 2508 | |
| 2509 | priv->staging_rxon.rx_chain = 0; |
| 2510 | rx_state = idle_state = 3; |
| 2511 | |
| 2512 | /* Tell uCode which antennas are actually connected. |
| 2513 | * Before first association, we assume all antennas are connected. |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 2514 | * Just after first association, iwl_chain_noise_calibration() |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2515 | * checks which antennas actually *are* connected. */ |
| 2516 | priv->staging_rxon.rx_chain |= |
| 2517 | cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS); |
| 2518 | |
| 2519 | /* How many receivers should we use? */ |
| 2520 | iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state); |
| 2521 | priv->staging_rxon.rx_chain |= |
| 2522 | cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS); |
| 2523 | priv->staging_rxon.rx_chain |= |
| 2524 | cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS); |
| 2525 | |
| 2526 | if (!is_single && (rx_state >= 2) && |
| 2527 | !test_bit(STATUS_POWER_PMI, &priv->status)) |
| 2528 | priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK; |
| 2529 | else |
| 2530 | priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK; |
| 2531 | |
| 2532 | IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain); |
| 2533 | } |
| 2534 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2535 | /** |
| 2536 | * sign_extend - Sign extend a value using specified bit as sign-bit |
| 2537 | * |
| 2538 | * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1 |
| 2539 | * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7. |
| 2540 | * |
| 2541 | * @param oper value to sign extend |
| 2542 | * @param index 0 based bit index (0<=index<32) to sign bit |
| 2543 | */ |
| 2544 | static s32 sign_extend(u32 oper, int index) |
| 2545 | { |
| 2546 | u8 shift = 31 - index; |
| 2547 | |
| 2548 | return (s32)(oper << shift) >> shift; |
| 2549 | } |
| 2550 | |
| 2551 | /** |
| 2552 | * iwl4965_get_temperature - return the calibrated temperature (in Kelvin) |
| 2553 | * @statistics: Provides the temperature reading from the uCode |
| 2554 | * |
| 2555 | * A return of <0 indicates bogus data in the statistics |
| 2556 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2557 | int iwl4965_get_temperature(const struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2558 | { |
| 2559 | s32 temperature; |
| 2560 | s32 vt; |
| 2561 | s32 R1, R2, R3; |
| 2562 | u32 R4; |
| 2563 | |
| 2564 | if (test_bit(STATUS_TEMPERATURE, &priv->status) && |
| 2565 | (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) { |
| 2566 | IWL_DEBUG_TEMP("Running FAT temperature calibration\n"); |
| 2567 | R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]); |
| 2568 | R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]); |
| 2569 | R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]); |
| 2570 | R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]); |
| 2571 | } else { |
| 2572 | IWL_DEBUG_TEMP("Running temperature calibration\n"); |
| 2573 | R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]); |
| 2574 | R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]); |
| 2575 | R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]); |
| 2576 | R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]); |
| 2577 | } |
| 2578 | |
| 2579 | /* |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2580 | * Temperature is only 23 bits, so sign extend out to 32. |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2581 | * |
| 2582 | * NOTE If we haven't received a statistics notification yet |
| 2583 | * with an updated temperature, use R4 provided to us in the |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 2584 | * "initialize" ALIVE response. |
| 2585 | */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2586 | if (!test_bit(STATUS_TEMPERATURE, &priv->status)) |
| 2587 | vt = sign_extend(R4, 23); |
| 2588 | else |
| 2589 | vt = sign_extend( |
| 2590 | le32_to_cpu(priv->statistics.general.temperature), 23); |
| 2591 | |
| 2592 | IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", |
| 2593 | R1, R2, R3, vt); |
| 2594 | |
| 2595 | if (R3 == R1) { |
| 2596 | IWL_ERROR("Calibration conflict R1 == R3\n"); |
| 2597 | return -1; |
| 2598 | } |
| 2599 | |
| 2600 | /* Calculate temperature in degrees Kelvin, adjust by 97%. |
| 2601 | * Add offset to center the adjustment around 0 degrees Centigrade. */ |
| 2602 | temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2); |
| 2603 | temperature /= (R3 - R1); |
| 2604 | temperature = (temperature * 97) / 100 + |
| 2605 | TEMPERATURE_CALIB_KELVIN_OFFSET; |
| 2606 | |
| 2607 | IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature, |
| 2608 | KELVIN_TO_CELSIUS(temperature)); |
| 2609 | |
| 2610 | return temperature; |
| 2611 | } |
| 2612 | |
| 2613 | /* Adjust Txpower only if temperature variance is greater than threshold. */ |
| 2614 | #define IWL_TEMPERATURE_THRESHOLD 3 |
| 2615 | |
| 2616 | /** |
| 2617 | * iwl4965_is_temp_calib_needed - determines if new calibration is needed |
| 2618 | * |
| 2619 | * If the temperature changed has changed sufficiently, then a recalibration |
| 2620 | * is needed. |
| 2621 | * |
| 2622 | * Assumes caller will replace priv->last_temperature once calibration |
| 2623 | * executed. |
| 2624 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2625 | static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2626 | { |
| 2627 | int temp_diff; |
| 2628 | |
| 2629 | if (!test_bit(STATUS_STATISTICS, &priv->status)) { |
| 2630 | IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n"); |
| 2631 | return 0; |
| 2632 | } |
| 2633 | |
| 2634 | temp_diff = priv->temperature - priv->last_temperature; |
| 2635 | |
| 2636 | /* get absolute value */ |
| 2637 | if (temp_diff < 0) { |
| 2638 | IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff); |
| 2639 | temp_diff = -temp_diff; |
| 2640 | } else if (temp_diff == 0) |
| 2641 | IWL_DEBUG_POWER("Same temp, \n"); |
| 2642 | else |
| 2643 | IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff); |
| 2644 | |
| 2645 | if (temp_diff < IWL_TEMPERATURE_THRESHOLD) { |
| 2646 | IWL_DEBUG_POWER("Thermal txpower calib not needed\n"); |
| 2647 | return 0; |
| 2648 | } |
| 2649 | |
| 2650 | IWL_DEBUG_POWER("Thermal txpower calib needed\n"); |
| 2651 | |
| 2652 | return 1; |
| 2653 | } |
| 2654 | |
| 2655 | /* Calculate noise level, based on measurements during network silence just |
| 2656 | * before arriving beacon. This measurement can be done only if we know |
| 2657 | * exactly when to expect beacons, therefore only when we're associated. */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2658 | static void iwl4965_rx_calc_noise(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2659 | { |
| 2660 | struct statistics_rx_non_phy *rx_info |
| 2661 | = &(priv->statistics.rx.general); |
| 2662 | int num_active_rx = 0; |
| 2663 | int total_silence = 0; |
| 2664 | int bcn_silence_a = |
| 2665 | le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER; |
| 2666 | int bcn_silence_b = |
| 2667 | le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER; |
| 2668 | int bcn_silence_c = |
| 2669 | le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER; |
| 2670 | |
| 2671 | if (bcn_silence_a) { |
| 2672 | total_silence += bcn_silence_a; |
| 2673 | num_active_rx++; |
| 2674 | } |
| 2675 | if (bcn_silence_b) { |
| 2676 | total_silence += bcn_silence_b; |
| 2677 | num_active_rx++; |
| 2678 | } |
| 2679 | if (bcn_silence_c) { |
| 2680 | total_silence += bcn_silence_c; |
| 2681 | num_active_rx++; |
| 2682 | } |
| 2683 | |
| 2684 | /* Average among active antennas */ |
| 2685 | if (num_active_rx) |
| 2686 | priv->last_rx_noise = (total_silence / num_active_rx) - 107; |
| 2687 | else |
| 2688 | priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE; |
| 2689 | |
| 2690 | IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", |
| 2691 | bcn_silence_a, bcn_silence_b, bcn_silence_c, |
| 2692 | priv->last_rx_noise); |
| 2693 | } |
| 2694 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2695 | void iwl4965_hw_rx_statistics(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2696 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2697 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2698 | int change; |
| 2699 | s32 temp; |
| 2700 | |
| 2701 | IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n", |
| 2702 | (int)sizeof(priv->statistics), pkt->len); |
| 2703 | |
| 2704 | change = ((priv->statistics.general.temperature != |
| 2705 | pkt->u.stats.general.temperature) || |
| 2706 | ((priv->statistics.flag & |
| 2707 | STATISTICS_REPLY_FLG_FAT_MODE_MSK) != |
| 2708 | (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK))); |
| 2709 | |
| 2710 | memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics)); |
| 2711 | |
| 2712 | set_bit(STATUS_STATISTICS, &priv->status); |
| 2713 | |
| 2714 | /* Reschedule the statistics timer to occur in |
| 2715 | * REG_RECALIB_PERIOD seconds to ensure we get a |
| 2716 | * thermal update even if the uCode doesn't give |
| 2717 | * us one */ |
| 2718 | mod_timer(&priv->statistics_periodic, jiffies + |
| 2719 | msecs_to_jiffies(REG_RECALIB_PERIOD * 1000)); |
| 2720 | |
| 2721 | if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) && |
| 2722 | (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) { |
| 2723 | iwl4965_rx_calc_noise(priv); |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 2724 | #ifdef CONFIG_IWL4965_RUN_TIME_CALIB |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2725 | queue_work(priv->workqueue, &priv->sensitivity_work); |
| 2726 | #endif |
| 2727 | } |
| 2728 | |
Mohamed Abbas | ab53d8a | 2008-03-25 16:33:36 -0700 | [diff] [blame] | 2729 | iwl_leds_background(priv); |
| 2730 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2731 | /* If the hardware hasn't reported a change in |
| 2732 | * temperature then don't bother computing a |
| 2733 | * calibrated temperature value */ |
| 2734 | if (!change) |
| 2735 | return; |
| 2736 | |
| 2737 | temp = iwl4965_get_temperature(priv); |
| 2738 | if (temp < 0) |
| 2739 | return; |
| 2740 | |
| 2741 | if (priv->temperature != temp) { |
| 2742 | if (priv->temperature) |
| 2743 | IWL_DEBUG_TEMP("Temperature changed " |
| 2744 | "from %dC to %dC\n", |
| 2745 | KELVIN_TO_CELSIUS(priv->temperature), |
| 2746 | KELVIN_TO_CELSIUS(temp)); |
| 2747 | else |
| 2748 | IWL_DEBUG_TEMP("Temperature " |
| 2749 | "initialized to %dC\n", |
| 2750 | KELVIN_TO_CELSIUS(temp)); |
| 2751 | } |
| 2752 | |
| 2753 | priv->temperature = temp; |
| 2754 | set_bit(STATUS_TEMPERATURE, &priv->status); |
| 2755 | |
| 2756 | if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) && |
| 2757 | iwl4965_is_temp_calib_needed(priv)) |
| 2758 | queue_work(priv->workqueue, &priv->txpower_work); |
| 2759 | } |
| 2760 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2761 | static void iwl4965_add_radiotap(struct iwl_priv *priv, |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 2762 | struct sk_buff *skb, |
| 2763 | struct iwl4965_rx_phy_res *rx_start, |
| 2764 | struct ieee80211_rx_status *stats, |
| 2765 | u32 ampdu_status) |
| 2766 | { |
| 2767 | s8 signal = stats->ssi; |
| 2768 | s8 noise = 0; |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 2769 | int rate = stats->rate_idx; |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 2770 | u64 tsf = stats->mactime; |
Johannes Berg | a0b484f | 2008-04-01 17:51:47 +0200 | [diff] [blame] | 2771 | __le16 antenna; |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 2772 | __le16 phy_flags_hw = rx_start->phy_flags; |
| 2773 | struct iwl4965_rt_rx_hdr { |
| 2774 | struct ieee80211_radiotap_header rt_hdr; |
| 2775 | __le64 rt_tsf; /* TSF */ |
| 2776 | u8 rt_flags; /* radiotap packet flags */ |
| 2777 | u8 rt_rate; /* rate in 500kb/s */ |
| 2778 | __le16 rt_channelMHz; /* channel in MHz */ |
| 2779 | __le16 rt_chbitmask; /* channel bitfield */ |
| 2780 | s8 rt_dbmsignal; /* signal in dBm, kluged to signed */ |
| 2781 | s8 rt_dbmnoise; |
| 2782 | u8 rt_antenna; /* antenna number */ |
| 2783 | } __attribute__ ((packed)) *iwl4965_rt; |
| 2784 | |
| 2785 | /* TODO: We won't have enough headroom for HT frames. Fix it later. */ |
| 2786 | if (skb_headroom(skb) < sizeof(*iwl4965_rt)) { |
| 2787 | if (net_ratelimit()) |
| 2788 | printk(KERN_ERR "not enough headroom [%d] for " |
Miguel Botón | 01c2098 | 2008-01-04 23:34:35 +0100 | [diff] [blame] | 2789 | "radiotap head [%zd]\n", |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 2790 | skb_headroom(skb), sizeof(*iwl4965_rt)); |
| 2791 | return; |
| 2792 | } |
| 2793 | |
| 2794 | /* put radiotap header in front of 802.11 header and data */ |
| 2795 | iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt)); |
| 2796 | |
| 2797 | /* initialise radiotap header */ |
| 2798 | iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION; |
| 2799 | iwl4965_rt->rt_hdr.it_pad = 0; |
| 2800 | |
| 2801 | /* total header + data */ |
| 2802 | put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)), |
| 2803 | &iwl4965_rt->rt_hdr.it_len); |
| 2804 | |
| 2805 | /* Indicate all the fields we add to the radiotap header */ |
| 2806 | put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) | |
| 2807 | (1 << IEEE80211_RADIOTAP_FLAGS) | |
| 2808 | (1 << IEEE80211_RADIOTAP_RATE) | |
| 2809 | (1 << IEEE80211_RADIOTAP_CHANNEL) | |
| 2810 | (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | |
| 2811 | (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | |
| 2812 | (1 << IEEE80211_RADIOTAP_ANTENNA)), |
| 2813 | &iwl4965_rt->rt_hdr.it_present); |
| 2814 | |
| 2815 | /* Zero the flags, we'll add to them as we go */ |
| 2816 | iwl4965_rt->rt_flags = 0; |
| 2817 | |
| 2818 | put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf); |
| 2819 | |
| 2820 | iwl4965_rt->rt_dbmsignal = signal; |
| 2821 | iwl4965_rt->rt_dbmnoise = noise; |
| 2822 | |
| 2823 | /* Convert the channel frequency and set the flags */ |
| 2824 | put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz); |
| 2825 | if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK)) |
| 2826 | put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM | |
| 2827 | IEEE80211_CHAN_5GHZ), |
| 2828 | &iwl4965_rt->rt_chbitmask); |
| 2829 | else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK) |
| 2830 | put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK | |
| 2831 | IEEE80211_CHAN_2GHZ), |
| 2832 | &iwl4965_rt->rt_chbitmask); |
| 2833 | else /* 802.11g */ |
| 2834 | put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM | |
| 2835 | IEEE80211_CHAN_2GHZ), |
| 2836 | &iwl4965_rt->rt_chbitmask); |
| 2837 | |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 2838 | if (rate == -1) |
| 2839 | iwl4965_rt->rt_rate = 0; |
| 2840 | else |
| 2841 | iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee; |
| 2842 | |
| 2843 | /* |
| 2844 | * "antenna number" |
| 2845 | * |
| 2846 | * It seems that the antenna field in the phy flags value |
| 2847 | * is actually a bitfield. This is undefined by radiotap, |
| 2848 | * it wants an actual antenna number but I always get "7" |
| 2849 | * for most legacy frames I receive indicating that the |
| 2850 | * same frame was received on all three RX chains. |
| 2851 | * |
| 2852 | * I think this field should be removed in favour of a |
| 2853 | * new 802.11n radiotap field "RX chains" that is defined |
| 2854 | * as a bitmask. |
| 2855 | */ |
Johannes Berg | a0b484f | 2008-04-01 17:51:47 +0200 | [diff] [blame] | 2856 | antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK; |
| 2857 | iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4; |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 2858 | |
| 2859 | /* set the preamble flag if appropriate */ |
| 2860 | if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK) |
| 2861 | iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE; |
| 2862 | |
| 2863 | stats->flag |= RX_FLAG_RADIOTAP; |
| 2864 | } |
| 2865 | |
Tomas Winkler | 19758be | 2008-03-12 16:58:51 -0700 | [diff] [blame] | 2866 | static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len) |
| 2867 | { |
| 2868 | /* 0 - mgmt, 1 - cnt, 2 - data */ |
| 2869 | int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2; |
| 2870 | priv->rx_stats[idx].cnt++; |
| 2871 | priv->rx_stats[idx].bytes += len; |
| 2872 | } |
| 2873 | |
Emmanuel Grumbach | 3ec4773 | 2008-04-17 16:03:36 -0700 | [diff] [blame] | 2874 | /* |
| 2875 | * returns non-zero if packet should be dropped |
| 2876 | */ |
| 2877 | static int iwl4965_set_decrypted_flag(struct iwl_priv *priv, |
| 2878 | struct ieee80211_hdr *hdr, |
| 2879 | u32 decrypt_res, |
| 2880 | struct ieee80211_rx_status *stats) |
| 2881 | { |
| 2882 | u16 fc = le16_to_cpu(hdr->frame_control); |
| 2883 | |
| 2884 | if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK) |
| 2885 | return 0; |
| 2886 | |
| 2887 | if (!(fc & IEEE80211_FCTL_PROTECTED)) |
| 2888 | return 0; |
| 2889 | |
| 2890 | IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res); |
| 2891 | switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) { |
| 2892 | case RX_RES_STATUS_SEC_TYPE_TKIP: |
| 2893 | /* The uCode has got a bad phase 1 Key, pushes the packet. |
| 2894 | * Decryption will be done in SW. */ |
| 2895 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == |
| 2896 | RX_RES_STATUS_BAD_KEY_TTAK) |
| 2897 | break; |
| 2898 | |
| 2899 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == |
| 2900 | RX_RES_STATUS_BAD_ICV_MIC) { |
| 2901 | /* bad ICV, the packet is destroyed since the |
| 2902 | * decryption is inplace, drop it */ |
| 2903 | IWL_DEBUG_RX("Packet destroyed\n"); |
| 2904 | return -1; |
| 2905 | } |
| 2906 | case RX_RES_STATUS_SEC_TYPE_WEP: |
| 2907 | case RX_RES_STATUS_SEC_TYPE_CCMP: |
| 2908 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == |
| 2909 | RX_RES_STATUS_DECRYPT_OK) { |
| 2910 | IWL_DEBUG_RX("hw decrypt successfully!!!\n"); |
| 2911 | stats->flag |= RX_FLAG_DECRYPTED; |
| 2912 | } |
| 2913 | break; |
| 2914 | |
| 2915 | default: |
| 2916 | break; |
| 2917 | } |
| 2918 | return 0; |
| 2919 | } |
| 2920 | |
Emmanuel Grumbach | 17e476b | 2008-03-19 16:41:42 -0700 | [diff] [blame] | 2921 | static u32 iwl4965_translate_rx_status(u32 decrypt_in) |
| 2922 | { |
| 2923 | u32 decrypt_out = 0; |
| 2924 | |
| 2925 | if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) == |
| 2926 | RX_RES_STATUS_STATION_FOUND) |
| 2927 | decrypt_out |= (RX_RES_STATUS_STATION_FOUND | |
| 2928 | RX_RES_STATUS_NO_STATION_INFO_MISMATCH); |
| 2929 | |
| 2930 | decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK); |
| 2931 | |
| 2932 | /* packet was not encrypted */ |
| 2933 | if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) == |
| 2934 | RX_RES_STATUS_SEC_TYPE_NONE) |
| 2935 | return decrypt_out; |
| 2936 | |
| 2937 | /* packet was encrypted with unknown alg */ |
| 2938 | if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) == |
| 2939 | RX_RES_STATUS_SEC_TYPE_ERR) |
| 2940 | return decrypt_out; |
| 2941 | |
| 2942 | /* decryption was not done in HW */ |
| 2943 | if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) != |
| 2944 | RX_MPDU_RES_STATUS_DEC_DONE_MSK) |
| 2945 | return decrypt_out; |
| 2946 | |
| 2947 | switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) { |
| 2948 | |
| 2949 | case RX_RES_STATUS_SEC_TYPE_CCMP: |
| 2950 | /* alg is CCM: check MIC only */ |
| 2951 | if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK)) |
| 2952 | /* Bad MIC */ |
| 2953 | decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC; |
| 2954 | else |
| 2955 | decrypt_out |= RX_RES_STATUS_DECRYPT_OK; |
| 2956 | |
| 2957 | break; |
| 2958 | |
| 2959 | case RX_RES_STATUS_SEC_TYPE_TKIP: |
| 2960 | if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) { |
| 2961 | /* Bad TTAK */ |
| 2962 | decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK; |
| 2963 | break; |
| 2964 | } |
| 2965 | /* fall through if TTAK OK */ |
| 2966 | default: |
| 2967 | if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK)) |
| 2968 | decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC; |
| 2969 | else |
| 2970 | decrypt_out |= RX_RES_STATUS_DECRYPT_OK; |
| 2971 | break; |
| 2972 | }; |
| 2973 | |
| 2974 | IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", |
| 2975 | decrypt_in, decrypt_out); |
| 2976 | |
| 2977 | return decrypt_out; |
| 2978 | } |
| 2979 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 2980 | static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2981 | int include_phy, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2982 | struct iwl4965_rx_mem_buffer *rxb, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2983 | struct ieee80211_rx_status *stats) |
| 2984 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 2985 | struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2986 | struct iwl4965_rx_phy_res *rx_start = (include_phy) ? |
| 2987 | (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL; |
| 2988 | struct ieee80211_hdr *hdr; |
| 2989 | u16 len; |
| 2990 | __le32 *rx_end; |
| 2991 | unsigned int skblen; |
| 2992 | u32 ampdu_status; |
Emmanuel Grumbach | 17e476b | 2008-03-19 16:41:42 -0700 | [diff] [blame] | 2993 | u32 ampdu_status_legacy; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 2994 | |
| 2995 | if (!include_phy && priv->last_phy_res[0]) |
| 2996 | rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1]; |
| 2997 | |
| 2998 | if (!rx_start) { |
| 2999 | IWL_ERROR("MPDU frame without a PHY data\n"); |
| 3000 | return; |
| 3001 | } |
| 3002 | if (include_phy) { |
| 3003 | hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] + |
| 3004 | rx_start->cfg_phy_cnt); |
| 3005 | |
| 3006 | len = le16_to_cpu(rx_start->byte_count); |
| 3007 | |
| 3008 | rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] + |
| 3009 | sizeof(struct iwl4965_rx_phy_res) + |
| 3010 | rx_start->cfg_phy_cnt + len); |
| 3011 | |
| 3012 | } else { |
| 3013 | struct iwl4965_rx_mpdu_res_start *amsdu = |
| 3014 | (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw; |
| 3015 | |
| 3016 | hdr = (struct ieee80211_hdr *)(pkt->u.raw + |
| 3017 | sizeof(struct iwl4965_rx_mpdu_res_start)); |
| 3018 | len = le16_to_cpu(amsdu->byte_count); |
| 3019 | rx_start->byte_count = amsdu->byte_count; |
| 3020 | rx_end = (__le32 *) (((u8 *) hdr) + len); |
| 3021 | } |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 3022 | if (len > priv->hw_params.max_pkt_size || len < 16) { |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 3023 | IWL_WARNING("byte count out of range [16,4K] : %d\n", len); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3024 | return; |
| 3025 | } |
| 3026 | |
| 3027 | ampdu_status = le32_to_cpu(*rx_end); |
| 3028 | skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32); |
| 3029 | |
Emmanuel Grumbach | 17e476b | 2008-03-19 16:41:42 -0700 | [diff] [blame] | 3030 | if (!include_phy) { |
| 3031 | /* New status scheme, need to translate */ |
| 3032 | ampdu_status_legacy = ampdu_status; |
| 3033 | ampdu_status = iwl4965_translate_rx_status(ampdu_status); |
| 3034 | } |
| 3035 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3036 | /* start from MAC */ |
| 3037 | skb_reserve(rxb->skb, (void *)hdr - (void *)pkt); |
| 3038 | skb_put(rxb->skb, len); /* end where data ends */ |
| 3039 | |
| 3040 | /* We only process data packets if the interface is open */ |
| 3041 | if (unlikely(!priv->is_open)) { |
| 3042 | IWL_DEBUG_DROP_LIMIT |
| 3043 | ("Dropping packet while interface is not open.\n"); |
| 3044 | return; |
| 3045 | } |
| 3046 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3047 | stats->flag = 0; |
| 3048 | hdr = (struct ieee80211_hdr *)rxb->skb->data; |
| 3049 | |
Emmanuel Grumbach | 3ec4773 | 2008-04-17 16:03:36 -0700 | [diff] [blame] | 3050 | /* in case of HW accelerated crypto and bad decryption, drop */ |
| 3051 | if (!priv->cfg->mod_params->sw_crypto && |
| 3052 | iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats)) |
| 3053 | return; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3054 | |
Zhu Yi | 12342c4 | 2007-12-20 11:27:32 +0800 | [diff] [blame] | 3055 | if (priv->add_radiotap) |
| 3056 | iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status); |
| 3057 | |
Tomas Winkler | 19758be | 2008-03-12 16:58:51 -0700 | [diff] [blame] | 3058 | iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3059 | ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats); |
| 3060 | priv->alloc_rxb_skb--; |
| 3061 | rxb->skb = NULL; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3062 | } |
| 3063 | |
| 3064 | /* Calc max signal level (dBm) among 3 possible receivers */ |
| 3065 | static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp) |
| 3066 | { |
| 3067 | /* data from PHY/DSP regarding signal strength, etc., |
| 3068 | * contents are always there, not configurable by host. */ |
| 3069 | struct iwl4965_rx_non_cfg_phy *ncphy = |
| 3070 | (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy; |
| 3071 | u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK) |
| 3072 | >> IWL_AGC_DB_POS; |
| 3073 | |
| 3074 | u32 valid_antennae = |
| 3075 | (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK) |
| 3076 | >> RX_PHY_FLAGS_ANTENNAE_OFFSET; |
| 3077 | u8 max_rssi = 0; |
| 3078 | u32 i; |
| 3079 | |
| 3080 | /* Find max rssi among 3 possible receivers. |
| 3081 | * These values are measured by the digital signal processor (DSP). |
| 3082 | * They should stay fairly constant even as the signal strength varies, |
| 3083 | * if the radio's automatic gain control (AGC) is working right. |
| 3084 | * AGC value (see below) will provide the "interesting" info. */ |
| 3085 | for (i = 0; i < 3; i++) |
| 3086 | if (valid_antennae & (1 << i)) |
| 3087 | max_rssi = max(ncphy->rssi_info[i << 1], max_rssi); |
| 3088 | |
| 3089 | IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n", |
| 3090 | ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4], |
| 3091 | max_rssi, agc); |
| 3092 | |
| 3093 | /* dBm = max_rssi dB - agc dB - constant. |
| 3094 | * Higher AGC (higher radio gain) means lower signal. */ |
| 3095 | return (max_rssi - agc - IWL_RSSI_OFFSET); |
| 3096 | } |
| 3097 | |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 3098 | #ifdef CONFIG_IWL4965_HT |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3099 | |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 3100 | void iwl4965_init_ht_hw_capab(struct iwl_priv *priv, |
| 3101 | struct ieee80211_ht_info *ht_info, |
Tomas Winkler | 78330fd | 2008-02-06 02:37:18 +0200 | [diff] [blame] | 3102 | enum ieee80211_band band) |
Ron Rindjunsky | 326eeee | 2007-11-26 16:14:37 +0200 | [diff] [blame] | 3103 | { |
| 3104 | ht_info->cap = 0; |
| 3105 | memset(ht_info->supp_mcs_set, 0, 16); |
| 3106 | |
| 3107 | ht_info->ht_supported = 1; |
| 3108 | |
Tomas Winkler | 78330fd | 2008-02-06 02:37:18 +0200 | [diff] [blame] | 3109 | if (band == IEEE80211_BAND_5GHZ) { |
Ron Rindjunsky | 326eeee | 2007-11-26 16:14:37 +0200 | [diff] [blame] | 3110 | ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH; |
| 3111 | ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40; |
| 3112 | ht_info->supp_mcs_set[4] = 0x01; |
| 3113 | } |
| 3114 | ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD; |
| 3115 | ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20; |
| 3116 | ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS & |
| 3117 | (IWL_MIMO_PS_NONE << 2)); |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 3118 | |
| 3119 | if (priv->cfg->mod_params->amsdu_size_8K) |
Ron Rindjunsky | 9ee1ba4 | 2007-11-26 16:14:42 +0200 | [diff] [blame] | 3120 | ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU; |
Ron Rindjunsky | 326eeee | 2007-11-26 16:14:37 +0200 | [diff] [blame] | 3121 | |
| 3122 | ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF; |
| 3123 | ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF; |
| 3124 | |
| 3125 | ht_info->supp_mcs_set[0] = 0xFF; |
| 3126 | ht_info->supp_mcs_set[1] = 0xFF; |
| 3127 | } |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 3128 | #endif /* CONFIG_IWL4965_HT */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3129 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3130 | static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3131 | { |
| 3132 | unsigned long flags; |
| 3133 | |
| 3134 | spin_lock_irqsave(&priv->sta_lock, flags); |
| 3135 | priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK; |
| 3136 | priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK; |
| 3137 | priv->stations[sta_id].sta.sta.modify_mask = 0; |
| 3138 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
| 3139 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
| 3140 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3141 | iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3142 | } |
| 3143 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3144 | static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3145 | { |
| 3146 | /* FIXME: need locking over ps_status ??? */ |
Tomas Winkler | 947b13a | 2008-04-16 16:34:48 -0700 | [diff] [blame] | 3147 | u8 sta_id = iwl_find_station(priv, addr); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3148 | |
| 3149 | if (sta_id != IWL_INVALID_STATION) { |
| 3150 | u8 sta_awake = priv->stations[sta_id]. |
| 3151 | ps_status == STA_PS_STATUS_WAKE; |
| 3152 | |
| 3153 | if (sta_awake && ps_bit) |
| 3154 | priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP; |
| 3155 | else if (!sta_awake && !ps_bit) { |
| 3156 | iwl4965_sta_modify_ps_wake(priv, sta_id); |
| 3157 | priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE; |
| 3158 | } |
| 3159 | } |
| 3160 | } |
Tomas Winkler | 0a6857e | 2008-03-12 16:58:49 -0700 | [diff] [blame] | 3161 | #ifdef CONFIG_IWLWIFI_DEBUG |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3162 | |
| 3163 | /** |
| 3164 | * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions |
| 3165 | * |
| 3166 | * You may hack this function to show different aspects of received frames, |
| 3167 | * including selective frame dumps. |
| 3168 | * group100 parameter selects whether to show 1 out of 100 good frames. |
| 3169 | * |
| 3170 | * TODO: This was originally written for 3945, need to audit for |
| 3171 | * proper operation with 4965. |
| 3172 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3173 | static void iwl4965_dbg_report_frame(struct iwl_priv *priv, |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3174 | struct iwl4965_rx_packet *pkt, |
| 3175 | struct ieee80211_hdr *header, int group100) |
| 3176 | { |
| 3177 | u32 to_us; |
| 3178 | u32 print_summary = 0; |
| 3179 | u32 print_dump = 0; /* set to 1 to dump all frames' contents */ |
| 3180 | u32 hundred = 0; |
| 3181 | u32 dataframe = 0; |
| 3182 | u16 fc; |
| 3183 | u16 seq_ctl; |
| 3184 | u16 channel; |
| 3185 | u16 phy_flags; |
| 3186 | int rate_sym; |
| 3187 | u16 length; |
| 3188 | u16 status; |
| 3189 | u16 bcn_tmr; |
| 3190 | u32 tsf_low; |
| 3191 | u64 tsf; |
| 3192 | u8 rssi; |
| 3193 | u8 agc; |
| 3194 | u16 sig_avg; |
| 3195 | u16 noise_diff; |
| 3196 | struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt); |
| 3197 | struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); |
| 3198 | struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt); |
| 3199 | u8 *data = IWL_RX_DATA(pkt); |
| 3200 | |
Tomas Winkler | 0a6857e | 2008-03-12 16:58:49 -0700 | [diff] [blame] | 3201 | if (likely(!(iwl_debug_level & IWL_DL_RX))) |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3202 | return; |
| 3203 | |
| 3204 | /* MAC header */ |
| 3205 | fc = le16_to_cpu(header->frame_control); |
| 3206 | seq_ctl = le16_to_cpu(header->seq_ctrl); |
| 3207 | |
| 3208 | /* metadata */ |
| 3209 | channel = le16_to_cpu(rx_hdr->channel); |
| 3210 | phy_flags = le16_to_cpu(rx_hdr->phy_flags); |
| 3211 | rate_sym = rx_hdr->rate; |
| 3212 | length = le16_to_cpu(rx_hdr->len); |
| 3213 | |
| 3214 | /* end-of-frame status and timestamp */ |
| 3215 | status = le32_to_cpu(rx_end->status); |
| 3216 | bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp); |
| 3217 | tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff; |
| 3218 | tsf = le64_to_cpu(rx_end->timestamp); |
| 3219 | |
| 3220 | /* signal statistics */ |
| 3221 | rssi = rx_stats->rssi; |
| 3222 | agc = rx_stats->agc; |
| 3223 | sig_avg = le16_to_cpu(rx_stats->sig_avg); |
| 3224 | noise_diff = le16_to_cpu(rx_stats->noise_diff); |
| 3225 | |
| 3226 | to_us = !compare_ether_addr(header->addr1, priv->mac_addr); |
| 3227 | |
| 3228 | /* if data frame is to us and all is good, |
| 3229 | * (optionally) print summary for only 1 out of every 100 */ |
| 3230 | if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) == |
| 3231 | (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) { |
| 3232 | dataframe = 1; |
| 3233 | if (!group100) |
| 3234 | print_summary = 1; /* print each frame */ |
| 3235 | else if (priv->framecnt_to_us < 100) { |
| 3236 | priv->framecnt_to_us++; |
| 3237 | print_summary = 0; |
| 3238 | } else { |
| 3239 | priv->framecnt_to_us = 0; |
| 3240 | print_summary = 1; |
| 3241 | hundred = 1; |
| 3242 | } |
| 3243 | } else { |
| 3244 | /* print summary for all other frames */ |
| 3245 | print_summary = 1; |
| 3246 | } |
| 3247 | |
| 3248 | if (print_summary) { |
| 3249 | char *title; |
| 3250 | int rate_idx; |
| 3251 | u32 bitrate; |
| 3252 | |
| 3253 | if (hundred) |
| 3254 | title = "100Frames"; |
| 3255 | else if (fc & IEEE80211_FCTL_RETRY) |
| 3256 | title = "Retry"; |
| 3257 | else if (ieee80211_is_assoc_response(fc)) |
| 3258 | title = "AscRsp"; |
| 3259 | else if (ieee80211_is_reassoc_response(fc)) |
| 3260 | title = "RasRsp"; |
| 3261 | else if (ieee80211_is_probe_response(fc)) { |
| 3262 | title = "PrbRsp"; |
| 3263 | print_dump = 1; /* dump frame contents */ |
| 3264 | } else if (ieee80211_is_beacon(fc)) { |
| 3265 | title = "Beacon"; |
| 3266 | print_dump = 1; /* dump frame contents */ |
| 3267 | } else if (ieee80211_is_atim(fc)) |
| 3268 | title = "ATIM"; |
| 3269 | else if (ieee80211_is_auth(fc)) |
| 3270 | title = "Auth"; |
| 3271 | else if (ieee80211_is_deauth(fc)) |
| 3272 | title = "DeAuth"; |
| 3273 | else if (ieee80211_is_disassoc(fc)) |
| 3274 | title = "DisAssoc"; |
| 3275 | else |
| 3276 | title = "Frame"; |
| 3277 | |
| 3278 | rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym); |
| 3279 | if (unlikely(rate_idx == -1)) |
| 3280 | bitrate = 0; |
| 3281 | else |
| 3282 | bitrate = iwl4965_rates[rate_idx].ieee / 2; |
| 3283 | |
| 3284 | /* print frame summary. |
| 3285 | * MAC addresses show just the last byte (for brevity), |
| 3286 | * but you can hack it to show more, if you'd like to. */ |
| 3287 | if (dataframe) |
| 3288 | IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, " |
| 3289 | "len=%u, rssi=%d, chnl=%d, rate=%u, \n", |
| 3290 | title, fc, header->addr1[5], |
| 3291 | length, rssi, channel, bitrate); |
| 3292 | else { |
| 3293 | /* src/dst addresses assume managed mode */ |
| 3294 | IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, " |
| 3295 | "src=0x%02x, rssi=%u, tim=%lu usec, " |
| 3296 | "phy=0x%02x, chnl=%d\n", |
| 3297 | title, fc, header->addr1[5], |
| 3298 | header->addr3[5], rssi, |
| 3299 | tsf_low - priv->scan_start_tsf, |
| 3300 | phy_flags, channel); |
| 3301 | } |
| 3302 | } |
| 3303 | if (print_dump) |
Tomas Winkler | 0a6857e | 2008-03-12 16:58:49 -0700 | [diff] [blame] | 3304 | iwl_print_hex_dump(IWL_DL_RX, data, length); |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3305 | } |
| 3306 | #else |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3307 | static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv, |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3308 | struct iwl4965_rx_packet *pkt, |
| 3309 | struct ieee80211_hdr *header, |
| 3310 | int group100) |
| 3311 | { |
| 3312 | } |
| 3313 | #endif |
| 3314 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3315 | |
Mohamed Abbas | 7878a5a | 2007-11-29 11:10:13 +0800 | [diff] [blame] | 3316 | |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 3317 | /* Called for REPLY_RX (legacy ABG frames), or |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3318 | * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3319 | static void iwl4965_rx_reply_rx(struct iwl_priv *priv, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3320 | struct iwl4965_rx_mem_buffer *rxb) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3321 | { |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3322 | struct ieee80211_hdr *header; |
| 3323 | struct ieee80211_rx_status rx_status; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3324 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3325 | /* Use phy data (Rx signal strength, etc.) contained within |
| 3326 | * this rx packet for legacy frames, |
| 3327 | * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */ |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 3328 | int include_phy = (pkt->hdr.cmd == REPLY_RX); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3329 | struct iwl4965_rx_phy_res *rx_start = (include_phy) ? |
| 3330 | (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : |
| 3331 | (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1]; |
| 3332 | __le32 *rx_end; |
| 3333 | unsigned int len = 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3334 | u16 fc; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3335 | u8 network_packet; |
| 3336 | |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3337 | rx_status.mactime = le64_to_cpu(rx_start->timestamp); |
Tomas Winkler | dc92e49 | 2008-04-03 16:05:22 -0700 | [diff] [blame] | 3338 | rx_status.freq = |
| 3339 | ieee80211_frequency_to_channel(le16_to_cpu(rx_start->channel)); |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3340 | rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? |
| 3341 | IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ; |
Tomas Winkler | dc92e49 | 2008-04-03 16:05:22 -0700 | [diff] [blame] | 3342 | rx_status.rate_idx = |
| 3343 | iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags)); |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3344 | if (rx_status.band == IEEE80211_BAND_5GHZ) |
| 3345 | rx_status.rate_idx -= IWL_FIRST_OFDM_RATE; |
| 3346 | |
| 3347 | rx_status.antenna = 0; |
| 3348 | rx_status.flag = 0; |
| 3349 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3350 | if ((unlikely(rx_start->cfg_phy_cnt > 20))) { |
Tomas Winkler | dc92e49 | 2008-04-03 16:05:22 -0700 | [diff] [blame] | 3351 | IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n", |
| 3352 | rx_start->cfg_phy_cnt); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3353 | return; |
| 3354 | } |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3355 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3356 | if (!include_phy) { |
| 3357 | if (priv->last_phy_res[0]) |
| 3358 | rx_start = (struct iwl4965_rx_phy_res *) |
| 3359 | &priv->last_phy_res[1]; |
| 3360 | else |
| 3361 | rx_start = NULL; |
| 3362 | } |
| 3363 | |
| 3364 | if (!rx_start) { |
| 3365 | IWL_ERROR("MPDU frame without a PHY data\n"); |
| 3366 | return; |
| 3367 | } |
| 3368 | |
| 3369 | if (include_phy) { |
| 3370 | header = (struct ieee80211_hdr *)((u8 *) & rx_start[1] |
| 3371 | + rx_start->cfg_phy_cnt); |
| 3372 | |
| 3373 | len = le16_to_cpu(rx_start->byte_count); |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3374 | rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt + |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3375 | sizeof(struct iwl4965_rx_phy_res) + len); |
| 3376 | } else { |
| 3377 | struct iwl4965_rx_mpdu_res_start *amsdu = |
| 3378 | (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw; |
| 3379 | |
| 3380 | header = (void *)(pkt->u.raw + |
| 3381 | sizeof(struct iwl4965_rx_mpdu_res_start)); |
| 3382 | len = le16_to_cpu(amsdu->byte_count); |
| 3383 | rx_end = (__le32 *) (pkt->u.raw + |
| 3384 | sizeof(struct iwl4965_rx_mpdu_res_start) + len); |
| 3385 | } |
| 3386 | |
| 3387 | if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) || |
| 3388 | !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) { |
| 3389 | IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", |
| 3390 | le32_to_cpu(*rx_end)); |
| 3391 | return; |
| 3392 | } |
| 3393 | |
| 3394 | priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp); |
| 3395 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3396 | /* Find max signal strength (dBm) among 3 antenna/receiver chains */ |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3397 | rx_status.ssi = iwl4965_calc_rssi(rx_start); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3398 | |
| 3399 | /* Meaningful noise values are available only from beacon statistics, |
| 3400 | * which are gathered only when associated, and indicate noise |
| 3401 | * only for the associated network channel ... |
| 3402 | * Ignore these noise values while scanning (other channels) */ |
Tomas Winkler | 3109ece | 2008-03-28 16:33:35 -0700 | [diff] [blame] | 3403 | if (iwl_is_associated(priv) && |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3404 | !test_bit(STATUS_SCANNING, &priv->status)) { |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3405 | rx_status.noise = priv->last_rx_noise; |
| 3406 | rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, |
| 3407 | rx_status.noise); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3408 | } else { |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3409 | rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE; |
| 3410 | rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3411 | } |
| 3412 | |
| 3413 | /* Reset beacon noise level if not associated. */ |
Tomas Winkler | 3109ece | 2008-03-28 16:33:35 -0700 | [diff] [blame] | 3414 | if (!iwl_is_associated(priv)) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3415 | priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE; |
| 3416 | |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3417 | /* Set "1" to report good data frames in groups of 100 */ |
| 3418 | /* FIXME: need to optimze the call: */ |
| 3419 | iwl4965_dbg_report_frame(priv, pkt, header, 1); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3420 | |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3421 | IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n", |
| 3422 | rx_status.ssi, rx_status.noise, rx_status.signal, |
John W. Linville | 06501d2 | 2008-04-01 17:38:47 -0400 | [diff] [blame] | 3423 | (unsigned long long)rx_status.mactime); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3424 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3425 | network_packet = iwl4965_is_network_packet(priv, header); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3426 | if (network_packet) { |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3427 | priv->last_rx_rssi = rx_status.ssi; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3428 | priv->last_beacon_time = priv->ucode_beacon_time; |
| 3429 | priv->last_tsf = le64_to_cpu(rx_start->timestamp); |
| 3430 | } |
| 3431 | |
| 3432 | fc = le16_to_cpu(header->frame_control); |
| 3433 | switch (fc & IEEE80211_FCTL_FTYPE) { |
| 3434 | case IEEE80211_FTYPE_MGMT: |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3435 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) |
| 3436 | iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM, |
| 3437 | header->addr2); |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3438 | iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3439 | break; |
| 3440 | |
| 3441 | case IEEE80211_FTYPE_CTL: |
Ron Rindjunsky | 9ab4617 | 2007-12-25 17:00:38 +0200 | [diff] [blame] | 3442 | #ifdef CONFIG_IWL4965_HT |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3443 | switch (fc & IEEE80211_FCTL_STYPE) { |
| 3444 | case IEEE80211_STYPE_BACK_REQ: |
| 3445 | IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n"); |
| 3446 | iwl4965_handle_data_packet(priv, 0, include_phy, |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3447 | rxb, &rx_status); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3448 | break; |
| 3449 | default: |
| 3450 | break; |
| 3451 | } |
| 3452 | #endif |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3453 | break; |
| 3454 | |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 3455 | case IEEE80211_FTYPE_DATA: { |
| 3456 | DECLARE_MAC_BUF(mac1); |
| 3457 | DECLARE_MAC_BUF(mac2); |
| 3458 | DECLARE_MAC_BUF(mac3); |
| 3459 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3460 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) |
| 3461 | iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM, |
| 3462 | header->addr2); |
| 3463 | |
| 3464 | if (unlikely(!network_packet)) |
| 3465 | IWL_DEBUG_DROP("Dropping (non network): " |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 3466 | "%s, %s, %s\n", |
| 3467 | print_mac(mac1, header->addr1), |
| 3468 | print_mac(mac2, header->addr2), |
| 3469 | print_mac(mac3, header->addr3)); |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3470 | else if (unlikely(iwl4965_is_duplicate_packet(priv, header))) |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 3471 | IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n", |
| 3472 | print_mac(mac1, header->addr1), |
| 3473 | print_mac(mac2, header->addr2), |
| 3474 | print_mac(mac3, header->addr3)); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3475 | else |
| 3476 | iwl4965_handle_data_packet(priv, 1, include_phy, rxb, |
Tomas Winkler | 17744ff | 2008-03-02 01:52:00 +0200 | [diff] [blame] | 3477 | &rx_status); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3478 | break; |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 3479 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3480 | default: |
| 3481 | break; |
| 3482 | |
| 3483 | } |
| 3484 | } |
| 3485 | |
| 3486 | /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD). |
| 3487 | * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3488 | static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3489 | struct iwl4965_rx_mem_buffer *rxb) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3490 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3491 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3492 | priv->last_phy_res[0] = 1; |
| 3493 | memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]), |
| 3494 | sizeof(struct iwl4965_rx_phy_res)); |
| 3495 | } |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3496 | static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3497 | struct iwl4965_rx_mem_buffer *rxb) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3498 | |
| 3499 | { |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 3500 | #ifdef CONFIG_IWL4965_RUN_TIME_CALIB |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3501 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
| 3502 | struct iwl4965_missed_beacon_notif *missed_beacon; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3503 | |
| 3504 | missed_beacon = &pkt->u.missed_beacon; |
| 3505 | if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) { |
| 3506 | IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n", |
| 3507 | le32_to_cpu(missed_beacon->consequtive_missed_beacons), |
| 3508 | le32_to_cpu(missed_beacon->total_missed_becons), |
| 3509 | le32_to_cpu(missed_beacon->num_recvd_beacons), |
| 3510 | le32_to_cpu(missed_beacon->num_expected_beacons)); |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 3511 | if (!test_bit(STATUS_SCANNING, &priv->status)) |
| 3512 | iwl_init_sensitivity(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3513 | } |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 3514 | #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3515 | } |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 3516 | #ifdef CONFIG_IWL4965_HT |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3517 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3518 | /** |
| 3519 | * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table |
| 3520 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3521 | static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3522 | int sta_id, int tid) |
| 3523 | { |
| 3524 | unsigned long flags; |
| 3525 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3526 | /* Remove "disable" flag, to enable Tx for this TID */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3527 | spin_lock_irqsave(&priv->sta_lock, flags); |
| 3528 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX; |
| 3529 | priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid)); |
| 3530 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
| 3531 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
| 3532 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3533 | iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3534 | } |
| 3535 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3536 | /** |
| 3537 | * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack |
| 3538 | * |
| 3539 | * Go through block-ack's bitmap of ACK'd frames, update driver's record of |
| 3540 | * ACK vs. not. This gets sent to mac80211, then to rate scaling algo. |
| 3541 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3542 | static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3543 | struct iwl4965_ht_agg *agg, |
| 3544 | struct iwl4965_compressed_ba_resp* |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3545 | ba_resp) |
| 3546 | |
| 3547 | { |
| 3548 | int i, sh, ack; |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3549 | u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl); |
| 3550 | u16 scd_flow = le16_to_cpu(ba_resp->scd_flow); |
| 3551 | u64 bitmap; |
| 3552 | int successes = 0; |
| 3553 | struct ieee80211_tx_status *tx_status; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3554 | |
| 3555 | if (unlikely(!agg->wait_for_ba)) { |
| 3556 | IWL_ERROR("Received BA when not expected\n"); |
| 3557 | return -EINVAL; |
| 3558 | } |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3559 | |
| 3560 | /* Mark that the expected block-ack response arrived */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3561 | agg->wait_for_ba = 0; |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3562 | IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3563 | |
| 3564 | /* Calculate shift to align block-ack bits with our Tx window bits */ |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3565 | sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4); |
Ian Schram | 01ebd06 | 2007-10-25 17:15:22 +0800 | [diff] [blame] | 3566 | if (sh < 0) /* tbw something is wrong with indices */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3567 | sh += 0x100; |
| 3568 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3569 | /* don't use 64-bit values for now */ |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3570 | bitmap = le64_to_cpu(ba_resp->bitmap) >> sh; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3571 | |
| 3572 | if (agg->frame_count > (64 - sh)) { |
| 3573 | IWL_DEBUG_TX_REPLY("more frames than bitmap size"); |
| 3574 | return -1; |
| 3575 | } |
| 3576 | |
| 3577 | /* check for success or failure according to the |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3578 | * transmitted bitmap and block-ack bitmap */ |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3579 | bitmap &= agg->bitmap; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3580 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3581 | /* For each frame attempted in aggregation, |
| 3582 | * update driver's record of tx frame's status. */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3583 | for (i = 0; i < agg->frame_count ; i++) { |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3584 | ack = bitmap & (1 << i); |
| 3585 | successes += !!ack; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3586 | IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3587 | ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff, |
| 3588 | agg->start_idx + i); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3589 | } |
| 3590 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3591 | tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status; |
| 3592 | tx_status->flags = IEEE80211_TX_STATUS_ACK; |
Ron Rindjunsky | 9955643 | 2008-01-28 14:07:25 +0200 | [diff] [blame] | 3593 | tx_status->flags |= IEEE80211_TX_STATUS_AMPDU; |
| 3594 | tx_status->ampdu_ack_map = successes; |
| 3595 | tx_status->ampdu_ack_len = agg->frame_count; |
Ron Rindjunsky | 4c424e4 | 2008-03-04 18:09:27 -0800 | [diff] [blame] | 3596 | iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags, |
| 3597 | &tx_status->control); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3598 | |
John W. Linville | f868f4e | 2008-03-07 16:38:43 -0500 | [diff] [blame] | 3599 | IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap); |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3600 | |
| 3601 | return 0; |
| 3602 | } |
| 3603 | |
| 3604 | /** |
| 3605 | * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration |
| 3606 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3607 | static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv, |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3608 | u16 txq_id) |
| 3609 | { |
| 3610 | /* Simply stop the queue, but don't change any configuration; |
| 3611 | * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3612 | iwl_write_prph(priv, |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 3613 | IWL49_SCD_QUEUE_STATUS_BITS(txq_id), |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3614 | (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)| |
| 3615 | (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); |
| 3616 | } |
| 3617 | |
| 3618 | /** |
| 3619 | * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 3620 | * priv->lock must be held by the caller |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3621 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3622 | static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id, |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3623 | u16 ssn_idx, u8 tx_fifo) |
| 3624 | { |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 3625 | int ret = 0; |
| 3626 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3627 | if (IWL_BACK_QUEUE_FIRST_ID > txq_id) { |
| 3628 | IWL_WARNING("queue number too small: %d, must be > %d\n", |
| 3629 | txq_id, IWL_BACK_QUEUE_FIRST_ID); |
| 3630 | return -EINVAL; |
| 3631 | } |
| 3632 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3633 | ret = iwl_grab_nic_access(priv); |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 3634 | if (ret) |
| 3635 | return ret; |
| 3636 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3637 | iwl4965_tx_queue_stop_scheduler(priv, txq_id); |
| 3638 | |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 3639 | iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3640 | |
| 3641 | priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); |
| 3642 | priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); |
| 3643 | /* supposes that ssn_idx is valid (!= 0xFFF) */ |
| 3644 | iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx); |
| 3645 | |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 3646 | iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id)); |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3647 | iwl4965_txq_ctx_deactivate(priv, txq_id); |
| 3648 | iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0); |
| 3649 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3650 | iwl_release_nic_access(priv); |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 3651 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3652 | return 0; |
| 3653 | } |
| 3654 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3655 | int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id, |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3656 | u8 tid, int txq_id) |
| 3657 | { |
| 3658 | struct iwl4965_queue *q = &priv->txq[txq_id].q; |
| 3659 | u8 *addr = priv->stations[sta_id].sta.sta.addr; |
| 3660 | struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid]; |
| 3661 | |
| 3662 | switch (priv->stations[sta_id].tid[tid].agg.state) { |
| 3663 | case IWL_EMPTYING_HW_QUEUE_DELBA: |
| 3664 | /* We are reclaiming the last packet of the */ |
| 3665 | /* aggregated HW queue */ |
| 3666 | if (txq_id == tid_data->agg.txq_id && |
| 3667 | q->read_ptr == q->write_ptr) { |
| 3668 | u16 ssn = SEQ_TO_SN(tid_data->seq_number); |
| 3669 | int tx_fifo = default_tid_to_tx_fifo[tid]; |
| 3670 | IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n"); |
| 3671 | iwl4965_tx_queue_agg_disable(priv, txq_id, |
| 3672 | ssn, tx_fifo); |
| 3673 | tid_data->agg.state = IWL_AGG_OFF; |
| 3674 | ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid); |
| 3675 | } |
| 3676 | break; |
| 3677 | case IWL_EMPTYING_HW_QUEUE_ADDBA: |
| 3678 | /* We are reclaiming the last packet of the queue */ |
| 3679 | if (tid_data->tfds_in_queue == 0) { |
| 3680 | IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n"); |
| 3681 | tid_data->agg.state = IWL_AGG_ON; |
| 3682 | ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid); |
| 3683 | } |
| 3684 | break; |
| 3685 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3686 | return 0; |
| 3687 | } |
| 3688 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3689 | /** |
| 3690 | * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed |
| 3691 | * @index -- current index |
| 3692 | * @n_bd -- total number of entries in queue (s/b power of 2) |
| 3693 | */ |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3694 | static inline int iwl4965_queue_dec_wrap(int index, int n_bd) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3695 | { |
| 3696 | return (index == 0) ? n_bd - 1 : index - 1; |
| 3697 | } |
| 3698 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3699 | /** |
| 3700 | * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA |
| 3701 | * |
| 3702 | * Handles block-acknowledge notification from device, which reports success |
| 3703 | * of frames sent via aggregation. |
| 3704 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3705 | static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv, |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3706 | struct iwl4965_rx_mem_buffer *rxb) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3707 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3708 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
| 3709 | struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3710 | int index; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3711 | struct iwl4965_tx_queue *txq = NULL; |
| 3712 | struct iwl4965_ht_agg *agg; |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3713 | DECLARE_MAC_BUF(mac); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3714 | |
| 3715 | /* "flow" corresponds to Tx queue */ |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3716 | u16 scd_flow = le16_to_cpu(ba_resp->scd_flow); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3717 | |
| 3718 | /* "ssn" is start of block-ack Tx window, corresponds to index |
| 3719 | * (in Tx queue's circular buffer) of first TFD/frame in window */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3720 | u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn); |
| 3721 | |
Ron Rindjunsky | dfe7d45 | 2008-04-15 16:01:45 -0700 | [diff] [blame] | 3722 | if (scd_flow >= priv->hw_params.max_txq_num) { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3723 | IWL_ERROR("BUG_ON scd_flow is bigger than number of queues"); |
| 3724 | return; |
| 3725 | } |
| 3726 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3727 | txq = &priv->txq[scd_flow]; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3728 | agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg; |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3729 | |
| 3730 | /* Find index just before block-ack window */ |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3731 | index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3732 | |
Ian Schram | 01ebd06 | 2007-10-25 17:15:22 +0800 | [diff] [blame] | 3733 | /* TODO: Need to get this copy more safely - now good for debug */ |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3734 | |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 3735 | IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, " |
| 3736 | "sta_id = %d\n", |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3737 | agg->wait_for_ba, |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 3738 | print_mac(mac, (u8*) &ba_resp->sta_addr_lo32), |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3739 | ba_resp->sta_id); |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3740 | IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = " |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3741 | "%d, scd_ssn = %d\n", |
| 3742 | ba_resp->tid, |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3743 | ba_resp->seq_ctl, |
Tomas Winkler | 0310ae7 | 2008-03-11 16:17:19 -0700 | [diff] [blame] | 3744 | (unsigned long long)le64_to_cpu(ba_resp->bitmap), |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3745 | ba_resp->scd_flow, |
| 3746 | ba_resp->scd_ssn); |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3747 | IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n", |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3748 | agg->start_idx, |
John W. Linville | f868f4e | 2008-03-07 16:38:43 -0500 | [diff] [blame] | 3749 | (unsigned long long)agg->bitmap); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3750 | |
| 3751 | /* Update driver's record of ACK vs. not for each frame in window */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3752 | iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp); |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3753 | |
| 3754 | /* Release all TFDs before the SSN, i.e. all TFDs in front of |
| 3755 | * block-ack window (we assume that they've been successfully |
| 3756 | * transmitted ... if not, it's too late anyway). */ |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3757 | if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) { |
| 3758 | int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index); |
| 3759 | priv->stations[ba_resp->sta_id]. |
| 3760 | tid[ba_resp->tid].tfds_in_queue -= freed; |
| 3761 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && |
| 3762 | priv->mac80211_registered && |
| 3763 | agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) |
| 3764 | ieee80211_wake_queue(priv->hw, scd_flow); |
| 3765 | iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id, |
| 3766 | ba_resp->tid, scd_flow); |
| 3767 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3768 | } |
| 3769 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3770 | /** |
| 3771 | * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue |
| 3772 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3773 | static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3774 | u16 txq_id) |
| 3775 | { |
| 3776 | u32 tbl_dw_addr; |
| 3777 | u32 tbl_dw; |
| 3778 | u16 scd_q2ratid; |
| 3779 | |
| 3780 | scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK; |
| 3781 | |
| 3782 | tbl_dw_addr = priv->scd_base_addr + |
| 3783 | SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); |
| 3784 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3785 | tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3786 | |
| 3787 | if (txq_id & 0x1) |
| 3788 | tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF); |
| 3789 | else |
| 3790 | tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000); |
| 3791 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3792 | iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3793 | |
| 3794 | return 0; |
| 3795 | } |
| 3796 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 3797 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3798 | /** |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3799 | * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue |
| 3800 | * |
| 3801 | * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID, |
| 3802 | * i.e. it must be one of the higher queues used for aggregation |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3803 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3804 | static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3805 | int tx_fifo, int sta_id, int tid, |
| 3806 | u16 ssn_idx) |
| 3807 | { |
| 3808 | unsigned long flags; |
| 3809 | int rc; |
| 3810 | u16 ra_tid; |
| 3811 | |
| 3812 | if (IWL_BACK_QUEUE_FIRST_ID > txq_id) |
| 3813 | IWL_WARNING("queue number too small: %d, must be > %d\n", |
| 3814 | txq_id, IWL_BACK_QUEUE_FIRST_ID); |
| 3815 | |
| 3816 | ra_tid = BUILD_RAxTID(sta_id, tid); |
| 3817 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3818 | /* Modify device's station table to Tx this TID */ |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3819 | iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3820 | |
| 3821 | spin_lock_irqsave(&priv->lock, flags); |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3822 | rc = iwl_grab_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3823 | if (rc) { |
| 3824 | spin_unlock_irqrestore(&priv->lock, flags); |
| 3825 | return rc; |
| 3826 | } |
| 3827 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3828 | /* Stop this Tx queue before configuring it */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3829 | iwl4965_tx_queue_stop_scheduler(priv, txq_id); |
| 3830 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3831 | /* Map receiver-address / traffic-ID to this queue */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3832 | iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id); |
| 3833 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3834 | /* Set this queue as a chain-building queue */ |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 3835 | iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id)); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3836 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3837 | /* Place first TFD at index corresponding to start sequence number. |
| 3838 | * Assumes that ssn_idx is valid (!= 0xFFF) */ |
Tomas Winkler | fc4b685 | 2007-10-25 17:15:24 +0800 | [diff] [blame] | 3839 | priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); |
| 3840 | priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3841 | iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx); |
| 3842 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3843 | /* Set up Tx window size and frame limit for this queue */ |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3844 | iwl_write_targ_mem(priv, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3845 | priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id), |
| 3846 | (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & |
| 3847 | SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); |
| 3848 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3849 | iwl_write_targ_mem(priv, priv->scd_base_addr + |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3850 | SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32), |
| 3851 | (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) |
| 3852 | & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); |
| 3853 | |
Tomas Winkler | 12a81f6 | 2008-04-03 16:05:20 -0700 | [diff] [blame] | 3854 | iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id)); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3855 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3856 | /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3857 | iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); |
| 3858 | |
Tomas Winkler | 3395f6e | 2008-03-25 16:33:37 -0700 | [diff] [blame] | 3859 | iwl_release_nic_access(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3860 | spin_unlock_irqrestore(&priv->lock, flags); |
| 3861 | |
| 3862 | return 0; |
| 3863 | } |
| 3864 | |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 3865 | #endif /* CONFIG_IWL4965_HT */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3866 | |
| 3867 | /** |
| 3868 | * iwl4965_add_station - Initialize a station's hardware rate table |
| 3869 | * |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3870 | * The uCode's station table contains a table of fallback rates |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3871 | * for automatic fallback during transmission. |
| 3872 | * |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3873 | * NOTE: This sets up a default set of values. These will be replaced later |
| 3874 | * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of |
| 3875 | * rc80211_simple. |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3876 | * |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3877 | * NOTE: Run REPLY_ADD_STA command to set up station table entry, before |
| 3878 | * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD, |
| 3879 | * which requires station table entry to exist). |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3880 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3881 | void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3882 | { |
| 3883 | int i, r; |
Tomas Winkler | 66c73db | 2008-04-15 16:01:40 -0700 | [diff] [blame] | 3884 | struct iwl_link_quality_cmd link_cmd = { |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3885 | .reserved1 = 0, |
| 3886 | }; |
| 3887 | u16 rate_flags; |
| 3888 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3889 | /* Set up the rate scaling to start at selected rate, fall back |
| 3890 | * all the way down to 1M in IEEE order, and then spin on 1M */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3891 | if (is_ap) |
| 3892 | r = IWL_RATE_54M_INDEX; |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 3893 | else if (priv->band == IEEE80211_BAND_5GHZ) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3894 | r = IWL_RATE_6M_INDEX; |
| 3895 | else |
| 3896 | r = IWL_RATE_1M_INDEX; |
| 3897 | |
| 3898 | for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) { |
| 3899 | rate_flags = 0; |
| 3900 | if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE) |
| 3901 | rate_flags |= RATE_MCS_CCK_MSK; |
| 3902 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3903 | /* Use Tx antenna B only */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3904 | rate_flags |= RATE_MCS_ANT_B_MSK; |
| 3905 | rate_flags &= ~RATE_MCS_ANT_A_MSK; |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3906 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3907 | link_cmd.rs_table[i].rate_n_flags = |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3908 | iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags); |
| 3909 | r = iwl4965_get_prev_ieee_rate(r); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3910 | } |
| 3911 | |
| 3912 | link_cmd.general_params.single_stream_ant_msk = 2; |
| 3913 | link_cmd.general_params.dual_stream_ant_msk = 3; |
| 3914 | link_cmd.agg_params.agg_dis_start_th = 3; |
| 3915 | link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000); |
| 3916 | |
| 3917 | /* Update the rate scaling for control frame Tx to AP */ |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 3918 | link_cmd.sta_id = is_ap ? IWL_AP_ID : priv->hw_params.bcast_sta_id; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3919 | |
Tomas Winkler | e547297 | 2008-03-28 16:21:12 -0700 | [diff] [blame] | 3920 | iwl_send_cmd_pdu_async(priv, REPLY_TX_LINK_QUALITY_CMD, |
| 3921 | sizeof(link_cmd), &link_cmd, NULL); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3922 | } |
| 3923 | |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 3924 | #ifdef CONFIG_IWL4965_HT |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3925 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3926 | static u8 iwl4965_is_channel_extension(struct iwl_priv *priv, |
Johannes Berg | 8318d78 | 2008-01-24 19:38:38 +0100 | [diff] [blame] | 3927 | enum ieee80211_band band, |
Tomas Winkler | 78330fd | 2008-02-06 02:37:18 +0200 | [diff] [blame] | 3928 | u16 channel, u8 extension_chan_offset) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3929 | { |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 3930 | const struct iwl_channel_info *ch_info; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3931 | |
Assaf Krauss | 8622e70 | 2008-03-21 13:53:43 -0700 | [diff] [blame] | 3932 | ch_info = iwl_get_channel_info(priv, band, channel); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3933 | if (!is_channel_valid(ch_info)) |
| 3934 | return 0; |
| 3935 | |
Guy Cohen | 134eb5d | 2008-03-04 18:09:25 -0800 | [diff] [blame] | 3936 | if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3937 | return 0; |
| 3938 | |
| 3939 | if ((ch_info->fat_extension_channel == extension_chan_offset) || |
| 3940 | (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX)) |
| 3941 | return 1; |
| 3942 | |
| 3943 | return 0; |
| 3944 | } |
| 3945 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3946 | static u8 iwl4965_is_fat_tx_allowed(struct iwl_priv *priv, |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 3947 | struct ieee80211_ht_info *sta_ht_inf) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3948 | { |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 3949 | struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3950 | |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 3951 | if ((!iwl_ht_conf->is_ht) || |
| 3952 | (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) || |
Guy Cohen | 134eb5d | 2008-03-04 18:09:25 -0800 | [diff] [blame] | 3953 | (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE)) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3954 | return 0; |
| 3955 | |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 3956 | if (sta_ht_inf) { |
| 3957 | if ((!sta_ht_inf->ht_supported) || |
Roel Kluin | 194c7ca | 2008-02-02 20:48:48 +0100 | [diff] [blame] | 3958 | (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH))) |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 3959 | return 0; |
| 3960 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3961 | |
Tomas Winkler | 78330fd | 2008-02-06 02:37:18 +0200 | [diff] [blame] | 3962 | return (iwl4965_is_channel_extension(priv, priv->band, |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 3963 | iwl_ht_conf->control_channel, |
| 3964 | iwl_ht_conf->extension_chan_offset)); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3965 | } |
| 3966 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 3967 | void iwl4965_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3968 | { |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 3969 | struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3970 | u32 val; |
| 3971 | |
| 3972 | if (!ht_info->is_ht) |
| 3973 | return; |
| 3974 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3975 | /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */ |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 3976 | if (iwl4965_is_fat_tx_allowed(priv, NULL)) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3977 | rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK; |
| 3978 | else |
| 3979 | rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | |
| 3980 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); |
| 3981 | |
| 3982 | if (le16_to_cpu(rxon->channel) != ht_info->control_channel) { |
| 3983 | IWL_DEBUG_ASSOC("control diff than current %d %d\n", |
| 3984 | le16_to_cpu(rxon->channel), |
| 3985 | ht_info->control_channel); |
| 3986 | rxon->channel = cpu_to_le16(ht_info->control_channel); |
| 3987 | return; |
| 3988 | } |
| 3989 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 3990 | /* Note: control channel is opposite of extension channel */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3991 | switch (ht_info->extension_chan_offset) { |
| 3992 | case IWL_EXT_CHANNEL_OFFSET_ABOVE: |
| 3993 | rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); |
| 3994 | break; |
| 3995 | case IWL_EXT_CHANNEL_OFFSET_BELOW: |
| 3996 | rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; |
| 3997 | break; |
Guy Cohen | 134eb5d | 2008-03-04 18:09:25 -0800 | [diff] [blame] | 3998 | case IWL_EXT_CHANNEL_OFFSET_NONE: |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 3999 | default: |
| 4000 | rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK; |
| 4001 | break; |
| 4002 | } |
| 4003 | |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 4004 | val = ht_info->ht_protection; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4005 | |
| 4006 | rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS); |
| 4007 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4008 | iwl4965_set_rxon_chain(priv); |
| 4009 | |
| 4010 | IWL_DEBUG_ASSOC("supported HT rate 0x%X %X " |
| 4011 | "rxon flags 0x%X operation mode :0x%X " |
| 4012 | "extension channel offset 0x%x " |
| 4013 | "control chan %d\n", |
Ron Rindjunsky | fd105e7 | 2007-11-26 16:14:39 +0200 | [diff] [blame] | 4014 | ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1], |
| 4015 | le32_to_cpu(rxon->flags), ht_info->ht_protection, |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4016 | ht_info->extension_chan_offset, |
| 4017 | ht_info->control_channel); |
| 4018 | return; |
| 4019 | } |
| 4020 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 4021 | void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index, |
Ron Rindjunsky | 67d6203 | 2007-11-26 16:14:40 +0200 | [diff] [blame] | 4022 | struct ieee80211_ht_info *sta_ht_inf) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4023 | { |
| 4024 | __le32 sta_flags; |
Tomas Winkler | e53cfe0 | 2008-01-30 22:05:13 -0800 | [diff] [blame] | 4025 | u8 mimo_ps_mode; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4026 | |
Ron Rindjunsky | 67d6203 | 2007-11-26 16:14:40 +0200 | [diff] [blame] | 4027 | if (!sta_ht_inf || !sta_ht_inf->ht_supported) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4028 | goto done; |
| 4029 | |
Tomas Winkler | e53cfe0 | 2008-01-30 22:05:13 -0800 | [diff] [blame] | 4030 | mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2; |
| 4031 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4032 | sta_flags = priv->stations[index].sta.station_flags; |
| 4033 | |
Tomas Winkler | e53cfe0 | 2008-01-30 22:05:13 -0800 | [diff] [blame] | 4034 | sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK); |
| 4035 | |
| 4036 | switch (mimo_ps_mode) { |
| 4037 | case WLAN_HT_CAP_MIMO_PS_STATIC: |
| 4038 | sta_flags |= STA_FLG_MIMO_DIS_MSK; |
| 4039 | break; |
| 4040 | case WLAN_HT_CAP_MIMO_PS_DYNAMIC: |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4041 | sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK; |
Tomas Winkler | e53cfe0 | 2008-01-30 22:05:13 -0800 | [diff] [blame] | 4042 | break; |
| 4043 | case WLAN_HT_CAP_MIMO_PS_DISABLED: |
| 4044 | break; |
| 4045 | default: |
| 4046 | IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode); |
| 4047 | break; |
| 4048 | } |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4049 | |
| 4050 | sta_flags |= cpu_to_le32( |
Ron Rindjunsky | 67d6203 | 2007-11-26 16:14:40 +0200 | [diff] [blame] | 4051 | (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4052 | |
| 4053 | sta_flags |= cpu_to_le32( |
Ron Rindjunsky | 67d6203 | 2007-11-26 16:14:40 +0200 | [diff] [blame] | 4054 | (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4055 | |
Ron Rindjunsky | 67d6203 | 2007-11-26 16:14:40 +0200 | [diff] [blame] | 4056 | if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf)) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4057 | sta_flags |= STA_FLG_FAT_EN_MSK; |
Ron Rindjunsky | 67d6203 | 2007-11-26 16:14:40 +0200 | [diff] [blame] | 4058 | else |
Tomas Winkler | e53cfe0 | 2008-01-30 22:05:13 -0800 | [diff] [blame] | 4059 | sta_flags &= ~STA_FLG_FAT_EN_MSK; |
Ron Rindjunsky | 67d6203 | 2007-11-26 16:14:40 +0200 | [diff] [blame] | 4060 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4061 | priv->stations[index].sta.station_flags = sta_flags; |
| 4062 | done: |
| 4063 | return; |
| 4064 | } |
| 4065 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4066 | static int iwl4965_rx_agg_start(struct iwl_priv *priv, |
| 4067 | const u8 *addr, int tid, u16 ssn) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4068 | { |
| 4069 | unsigned long flags; |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4070 | int sta_id; |
| 4071 | |
| 4072 | sta_id = iwl_find_station(priv, addr); |
| 4073 | if (sta_id == IWL_INVALID_STATION) |
| 4074 | return -ENXIO; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4075 | |
| 4076 | spin_lock_irqsave(&priv->sta_lock, flags); |
| 4077 | priv->stations[sta_id].sta.station_flags_msk = 0; |
| 4078 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK; |
| 4079 | priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid; |
| 4080 | priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn); |
| 4081 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
| 4082 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
| 4083 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4084 | return iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, |
| 4085 | CMD_ASYNC); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4086 | } |
| 4087 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4088 | static int iwl4965_rx_agg_stop(struct iwl_priv *priv, |
| 4089 | const u8 *addr, int tid) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4090 | { |
| 4091 | unsigned long flags; |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4092 | int sta_id; |
| 4093 | |
| 4094 | sta_id = iwl_find_station(priv, addr); |
| 4095 | if (sta_id == IWL_INVALID_STATION) |
| 4096 | return -ENXIO; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4097 | |
| 4098 | spin_lock_irqsave(&priv->sta_lock, flags); |
| 4099 | priv->stations[sta_id].sta.station_flags_msk = 0; |
| 4100 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK; |
| 4101 | priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid; |
| 4102 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; |
| 4103 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
| 4104 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4105 | return iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, |
| 4106 | CMD_ASYNC); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4107 | } |
| 4108 | |
Cahill, Ben M | 8b6eaea | 2007-11-29 11:09:54 +0800 | [diff] [blame] | 4109 | /* |
| 4110 | * Find first available (lowest unused) Tx Queue, mark it "active". |
| 4111 | * Called only when finding queue for aggregation. |
| 4112 | * Should never return anything < 7, because they should already |
| 4113 | * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6). |
| 4114 | */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 4115 | static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4116 | { |
| 4117 | int txq_id; |
| 4118 | |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 4119 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4120 | if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk)) |
| 4121 | return txq_id; |
| 4122 | return -1; |
| 4123 | } |
| 4124 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4125 | static int iwl4965_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra, |
| 4126 | u16 tid, u16 *start_seq_num) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4127 | { |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 4128 | struct iwl_priv *priv = hw->priv; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4129 | int sta_id; |
| 4130 | int tx_fifo; |
| 4131 | int txq_id; |
| 4132 | int ssn = -1; |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 4133 | int ret = 0; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4134 | unsigned long flags; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 4135 | struct iwl4965_tid_data *tid_data; |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 4136 | DECLARE_MAC_BUF(mac); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4137 | |
| 4138 | if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo))) |
| 4139 | tx_fifo = default_tid_to_tx_fifo[tid]; |
| 4140 | else |
| 4141 | return -EINVAL; |
| 4142 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4143 | IWL_WARNING("%s on ra = %s tid = %d\n", |
| 4144 | __func__, print_mac(mac, ra), tid); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4145 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4146 | sta_id = iwl_find_station(priv, ra); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4147 | if (sta_id == IWL_INVALID_STATION) |
| 4148 | return -ENXIO; |
| 4149 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4150 | if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) { |
| 4151 | IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n"); |
| 4152 | return -ENXIO; |
| 4153 | } |
| 4154 | |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 4155 | txq_id = iwl4965_txq_ctx_activate_free(priv); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4156 | if (txq_id == -1) |
| 4157 | return -ENXIO; |
| 4158 | |
| 4159 | spin_lock_irqsave(&priv->sta_lock, flags); |
| 4160 | tid_data = &priv->stations[sta_id].tid[tid]; |
| 4161 | ssn = SEQ_TO_SN(tid_data->seq_number); |
| 4162 | tid_data->agg.txq_id = txq_id; |
| 4163 | spin_unlock_irqrestore(&priv->sta_lock, flags); |
| 4164 | |
| 4165 | *start_seq_num = ssn; |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 4166 | ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo, |
| 4167 | sta_id, tid, ssn); |
| 4168 | if (ret) |
| 4169 | return ret; |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4170 | |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 4171 | ret = 0; |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4172 | if (tid_data->tfds_in_queue == 0) { |
| 4173 | printk(KERN_ERR "HW queue is empty\n"); |
| 4174 | tid_data->agg.state = IWL_AGG_ON; |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4175 | ieee80211_start_tx_ba_cb_irqsafe(hw, ra, tid); |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4176 | } else { |
| 4177 | IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n", |
| 4178 | tid_data->tfds_in_queue); |
| 4179 | tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA; |
| 4180 | } |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 4181 | return ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4182 | } |
| 4183 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4184 | static int iwl4965_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4185 | { |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 4186 | struct iwl_priv *priv = hw->priv; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4187 | int tx_fifo_id, txq_id, sta_id, ssn = -1; |
Christoph Hellwig | bb8c093 | 2008-01-27 16:41:47 -0800 | [diff] [blame] | 4188 | struct iwl4965_tid_data *tid_data; |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 4189 | int ret, write_ptr, read_ptr; |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4190 | unsigned long flags; |
Joe Perches | 0795af5 | 2007-10-03 17:59:30 -0700 | [diff] [blame] | 4191 | DECLARE_MAC_BUF(mac); |
| 4192 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4193 | if (!ra) { |
| 4194 | IWL_ERROR("ra = NULL\n"); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4195 | return -EINVAL; |
| 4196 | } |
| 4197 | |
| 4198 | if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo))) |
| 4199 | tx_fifo_id = default_tid_to_tx_fifo[tid]; |
| 4200 | else |
| 4201 | return -EINVAL; |
| 4202 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4203 | sta_id = iwl_find_station(priv, ra); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4204 | |
| 4205 | if (sta_id == IWL_INVALID_STATION) |
| 4206 | return -ENXIO; |
| 4207 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4208 | if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON) |
| 4209 | IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n"); |
| 4210 | |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4211 | tid_data = &priv->stations[sta_id].tid[tid]; |
| 4212 | ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4; |
| 4213 | txq_id = tid_data->agg.txq_id; |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4214 | write_ptr = priv->txq[txq_id].q.write_ptr; |
| 4215 | read_ptr = priv->txq[txq_id].q.read_ptr; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4216 | |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4217 | /* The queue is not empty */ |
| 4218 | if (write_ptr != read_ptr) { |
| 4219 | IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n"); |
| 4220 | priv->stations[sta_id].tid[tid].agg.state = |
| 4221 | IWL_EMPTYING_HW_QUEUE_DELBA; |
| 4222 | return 0; |
| 4223 | } |
| 4224 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4225 | IWL_DEBUG_HT("HW queue is empty\n"); |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4226 | priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; |
| 4227 | |
| 4228 | spin_lock_irqsave(&priv->lock, flags); |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 4229 | ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id); |
Ron Rindjunsky | fe01b47 | 2008-01-28 14:07:24 +0200 | [diff] [blame] | 4230 | spin_unlock_irqrestore(&priv->lock, flags); |
| 4231 | |
Ron Rindjunsky | b095d03a7 | 2008-03-06 17:36:56 -0800 | [diff] [blame] | 4232 | if (ret) |
| 4233 | return ret; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4234 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4235 | ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid); |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4236 | |
| 4237 | return 0; |
| 4238 | } |
| 4239 | |
Ron Rindjunsky | 8114fcf | 2008-01-28 14:07:23 +0200 | [diff] [blame] | 4240 | int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw, |
| 4241 | enum ieee80211_ampdu_mlme_action action, |
| 4242 | const u8 *addr, u16 tid, u16 *ssn) |
| 4243 | { |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 4244 | struct iwl_priv *priv = hw->priv; |
Ron Rindjunsky | 8114fcf | 2008-01-28 14:07:23 +0200 | [diff] [blame] | 4245 | DECLARE_MAC_BUF(mac); |
| 4246 | |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4247 | IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n", |
| 4248 | print_mac(mac, addr), tid); |
| 4249 | |
Ron Rindjunsky | 8114fcf | 2008-01-28 14:07:23 +0200 | [diff] [blame] | 4250 | switch (action) { |
| 4251 | case IEEE80211_AMPDU_RX_START: |
| 4252 | IWL_DEBUG_HT("start Rx\n"); |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4253 | return iwl4965_rx_agg_start(priv, addr, tid, *ssn); |
Ron Rindjunsky | 8114fcf | 2008-01-28 14:07:23 +0200 | [diff] [blame] | 4254 | case IEEE80211_AMPDU_RX_STOP: |
| 4255 | IWL_DEBUG_HT("stop Rx\n"); |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4256 | return iwl4965_rx_agg_stop(priv, addr, tid); |
Ron Rindjunsky | 8114fcf | 2008-01-28 14:07:23 +0200 | [diff] [blame] | 4257 | case IEEE80211_AMPDU_TX_START: |
| 4258 | IWL_DEBUG_HT("start Tx\n"); |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4259 | return iwl4965_tx_agg_start(hw, addr, tid, ssn); |
Ron Rindjunsky | 8114fcf | 2008-01-28 14:07:23 +0200 | [diff] [blame] | 4260 | case IEEE80211_AMPDU_TX_STOP: |
| 4261 | IWL_DEBUG_HT("stop Tx\n"); |
Ron Rindjunsky | fe07aa7 | 2008-04-17 16:03:37 -0700 | [diff] [blame^] | 4262 | return iwl4965_tx_agg_stop(hw, addr, tid); |
Ron Rindjunsky | 8114fcf | 2008-01-28 14:07:23 +0200 | [diff] [blame] | 4263 | default: |
| 4264 | IWL_DEBUG_HT("unknown\n"); |
| 4265 | return -EINVAL; |
| 4266 | break; |
| 4267 | } |
| 4268 | return 0; |
| 4269 | } |
| 4270 | |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 4271 | #endif /* CONFIG_IWL4965_HT */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4272 | |
| 4273 | /* Set up 4965-specific Rx frame reply handlers */ |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 4274 | void iwl4965_hw_rx_handler_setup(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4275 | { |
| 4276 | /* Legacy Rx frames */ |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 4277 | priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx; |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4278 | |
| 4279 | /* High-throughput (HT) Rx frames */ |
| 4280 | priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy; |
| 4281 | priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx; |
| 4282 | |
| 4283 | priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] = |
| 4284 | iwl4965_rx_missed_beacon_notif; |
| 4285 | |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 4286 | #ifdef CONFIG_IWL4965_HT |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4287 | priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba; |
Christoph Hellwig | c8b0e6e | 2007-10-25 17:15:51 +0800 | [diff] [blame] | 4288 | #endif /* CONFIG_IWL4965_HT */ |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4289 | } |
| 4290 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 4291 | void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4292 | { |
| 4293 | INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work); |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 4294 | #ifdef CONFIG_IWL4965_RUN_TIME_CALIB |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4295 | INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work); |
| 4296 | #endif |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4297 | init_timer(&priv->statistics_periodic); |
| 4298 | priv->statistics_periodic.data = (unsigned long)priv; |
| 4299 | priv->statistics_periodic.function = iwl4965_bg_statistics_periodic; |
| 4300 | } |
| 4301 | |
Tomas Winkler | c79dd5b | 2008-03-12 16:58:50 -0700 | [diff] [blame] | 4302 | void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv) |
Zhu Yi | b481de9 | 2007-09-25 17:54:57 -0700 | [diff] [blame] | 4303 | { |
| 4304 | del_timer_sync(&priv->statistics_periodic); |
| 4305 | |
| 4306 | cancel_delayed_work(&priv->init_alive_start); |
| 4307 | } |
| 4308 | |
Tomas Winkler | 3c424c2 | 2008-04-15 16:01:42 -0700 | [diff] [blame] | 4309 | |
| 4310 | static struct iwl_hcmd_ops iwl4965_hcmd = { |
Tomas Winkler | 7e8c519 | 2008-04-15 16:01:43 -0700 | [diff] [blame] | 4311 | .rxon_assoc = iwl4965_send_rxon_assoc, |
Tomas Winkler | 3c424c2 | 2008-04-15 16:01:42 -0700 | [diff] [blame] | 4312 | }; |
| 4313 | |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 4314 | static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = { |
| 4315 | .enqueue_hcmd = iwl4965_enqueue_hcmd, |
Emmanuel Grumbach | f0832f1 | 2008-04-16 16:34:47 -0700 | [diff] [blame] | 4316 | #ifdef CONFIG_IWL4965_RUN_TIME_CALIB |
| 4317 | .chain_noise_reset = iwl4965_chain_noise_reset, |
| 4318 | .gain_computation = iwl4965_gain_computation, |
| 4319 | #endif |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 4320 | }; |
| 4321 | |
Assaf Krauss | 6bc913b | 2008-03-11 16:17:18 -0700 | [diff] [blame] | 4322 | static struct iwl_lib_ops iwl4965_lib = { |
Assaf Krauss | bf85ea4 | 2008-03-14 10:38:49 -0700 | [diff] [blame] | 4323 | .init_drv = iwl4965_init_drv, |
Tomas Winkler | 5425e49 | 2008-04-15 16:01:38 -0700 | [diff] [blame] | 4324 | .set_hw_params = iwl4965_hw_set_hw_params, |
Tomas Winkler | e2a722e | 2008-04-14 21:16:10 -0700 | [diff] [blame] | 4325 | .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl, |
Tomas Winkler | 57aab75 | 2008-04-14 21:16:03 -0700 | [diff] [blame] | 4326 | .hw_nic_init = iwl4965_hw_nic_init, |
| 4327 | .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr, |
| 4328 | .alive_notify = iwl4965_alive_notify, |
| 4329 | .load_ucode = iwl4965_load_bsm, |
Tomas Winkler | 6f4083a | 2008-04-16 16:34:49 -0700 | [diff] [blame] | 4330 | .apm_ops = { |
| 4331 | .set_pwr_src = iwl4965_set_pwr_src, |
| 4332 | }, |
Assaf Krauss | 6bc913b | 2008-03-11 16:17:18 -0700 | [diff] [blame] | 4333 | .eeprom_ops = { |
| 4334 | .verify_signature = iwlcore_eeprom_verify_signature, |
| 4335 | .acquire_semaphore = iwlcore_eeprom_acquire_semaphore, |
| 4336 | .release_semaphore = iwlcore_eeprom_release_semaphore, |
| 4337 | }, |
Mohamed Abbas | ad97edd | 2008-03-28 16:21:06 -0700 | [diff] [blame] | 4338 | .radio_kill_sw = iwl4965_radio_kill_sw, |
Assaf Krauss | 6bc913b | 2008-03-11 16:17:18 -0700 | [diff] [blame] | 4339 | }; |
| 4340 | |
| 4341 | static struct iwl_ops iwl4965_ops = { |
| 4342 | .lib = &iwl4965_lib, |
Tomas Winkler | 3c424c2 | 2008-04-15 16:01:42 -0700 | [diff] [blame] | 4343 | .hcmd = &iwl4965_hcmd, |
Tomas Winkler | 857485c | 2008-03-21 13:53:44 -0700 | [diff] [blame] | 4344 | .utils = &iwl4965_hcmd_utils, |
Assaf Krauss | 6bc913b | 2008-03-11 16:17:18 -0700 | [diff] [blame] | 4345 | }; |
| 4346 | |
Ron Rindjunsky | fed9017 | 2008-04-15 16:01:41 -0700 | [diff] [blame] | 4347 | struct iwl_cfg iwl4965_agn_cfg = { |
Tomas Winkler | 82b9a12 | 2008-03-04 18:09:30 -0800 | [diff] [blame] | 4348 | .name = "4965AGN", |
Tomas Winkler | 4bf775c | 2008-03-04 18:09:31 -0800 | [diff] [blame] | 4349 | .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode", |
Tomas Winkler | 82b9a12 | 2008-03-04 18:09:30 -0800 | [diff] [blame] | 4350 | .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, |
Assaf Krauss | 6bc913b | 2008-03-11 16:17:18 -0700 | [diff] [blame] | 4351 | .ops = &iwl4965_ops, |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 4352 | .mod_params = &iwl4965_mod_params, |
Tomas Winkler | 82b9a12 | 2008-03-04 18:09:30 -0800 | [diff] [blame] | 4353 | }; |
| 4354 | |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 4355 | module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444); |
| 4356 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); |
| 4357 | module_param_named(disable, iwl4965_mod_params.disable, int, 0444); |
| 4358 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); |
Emmanuel Grumbach | fcc76c6 | 2008-04-15 16:01:47 -0700 | [diff] [blame] | 4359 | module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444); |
| 4360 | MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n"); |
Assaf Krauss | 1ea8739 | 2008-03-18 14:57:50 -0700 | [diff] [blame] | 4361 | module_param_named(debug, iwl4965_mod_params.debug, int, 0444); |
| 4362 | MODULE_PARM_DESC(debug, "debug output mask"); |
| 4363 | module_param_named( |
| 4364 | disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444); |
| 4365 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); |
| 4366 | |
| 4367 | module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444); |
| 4368 | MODULE_PARM_DESC(queues_num, "number of hw queues."); |
| 4369 | |
| 4370 | /* QoS */ |
| 4371 | module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444); |
| 4372 | MODULE_PARM_DESC(qos_enable, "enable all QoS functionality"); |
| 4373 | module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444); |
| 4374 | MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); |
| 4375 | |