blob: 2d576b7ff2999ae65ab5008ed624bd2b70dd18b6 [file] [log] [blame]
Ben Widawsky0136db582012-04-10 21:17:01 -07001/*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28#include <linux/device.h>
29#include <linux/module.h>
30#include <linux/stat.h>
31#include <linux/sysfs.h>
Ben Widawsky84bc7582012-05-25 16:56:25 -070032#include "intel_drv.h"
Ben Widawsky0136db582012-04-10 21:17:01 -070033#include "i915_drv.h"
34
Dave Airlie5bdebb12013-10-11 14:07:25 +100035#define dev_to_drm_minor(d) dev_get_drvdata((d))
Dave Airlie14c8d112013-10-11 14:45:30 +100036
Hunt Xu5ab36332012-07-01 03:45:07 +000037#ifdef CONFIG_PM
Ville Syrjäläf0f59a02015-11-18 15:33:26 +020038static u32 calc_residency(struct drm_device *dev,
39 i915_reg_t reg)
Ben Widawsky0136db582012-04-10 21:17:01 -070040{
41 struct drm_i915_private *dev_priv = dev->dev_private;
42 u64 raw_time; /* 32b value may overflow during fixed point math */
Ville Syrjälä2cc9fab2015-09-28 23:43:43 +030043 u64 units = 128ULL, div = 100000ULL;
Paulo Zanonic8c8fb32013-11-27 18:21:54 -020044 u32 ret;
Ben Widawsky0136db582012-04-10 21:17:01 -070045
46 if (!intel_enable_rc6(dev))
47 return 0;
48
Paulo Zanonic8c8fb32013-11-27 18:21:54 -020049 intel_runtime_pm_get(dev_priv);
50
Mika Kuoppala542a6b22014-07-09 14:55:56 +030051 /* On VLV and CHV, residency time is in CZ units rather than 1.28us */
Wayne Boyer666a4532015-12-09 12:29:35 -080052 if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
Ville Syrjälä2cc9fab2015-09-28 23:43:43 +030053 units = 1;
54 div = dev_priv->czclk_freq;
Mika Kuoppala542a6b22014-07-09 14:55:56 +030055
Jesse Barnese454a052013-09-26 17:55:58 -070056 if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
57 units <<= 8;
Imre Deakd8135102015-09-29 16:28:46 +030058 } else if (IS_BROXTON(dev)) {
59 units = 1;
60 div = 1200; /* 833.33ns */
Jesse Barnese454a052013-09-26 17:55:58 -070061 }
62
63 raw_time = I915_READ(reg) * units;
Paulo Zanonic8c8fb32013-11-27 18:21:54 -020064 ret = DIV_ROUND_UP_ULL(raw_time, div);
65
Paulo Zanonic8c8fb32013-11-27 18:21:54 -020066 intel_runtime_pm_put(dev_priv);
67 return ret;
Ben Widawsky0136db582012-04-10 21:17:01 -070068}
69
70static ssize_t
Ben Widawskydbdfd8e2012-09-07 19:43:38 -070071show_rc6_mask(struct device *kdev, struct device_attribute *attr, char *buf)
Ben Widawsky0136db582012-04-10 21:17:01 -070072{
Dave Airlie14c8d112013-10-11 14:45:30 +100073 struct drm_minor *dminor = dev_to_drm_minor(kdev);
Jani Nikula3e2a1552013-02-14 10:42:11 +020074 return snprintf(buf, PAGE_SIZE, "%x\n", intel_enable_rc6(dminor->dev));
Ben Widawsky0136db582012-04-10 21:17:01 -070075}
76
77static ssize_t
Ben Widawskydbdfd8e2012-09-07 19:43:38 -070078show_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
Ben Widawsky0136db582012-04-10 21:17:01 -070079{
Dave Airlie5bdebb12013-10-11 14:07:25 +100080 struct drm_minor *dminor = dev_get_drvdata(kdev);
Ben Widawsky0136db582012-04-10 21:17:01 -070081 u32 rc6_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6);
Jani Nikula3e2a1552013-02-14 10:42:11 +020082 return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
Ben Widawsky0136db582012-04-10 21:17:01 -070083}
84
85static ssize_t
Ben Widawskydbdfd8e2012-09-07 19:43:38 -070086show_rc6p_ms(struct device *kdev, struct device_attribute *attr, char *buf)
Ben Widawsky0136db582012-04-10 21:17:01 -070087{
Dave Airlie14c8d112013-10-11 14:45:30 +100088 struct drm_minor *dminor = dev_to_drm_minor(kdev);
Ben Widawsky0136db582012-04-10 21:17:01 -070089 u32 rc6p_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6p);
Jani Nikula3e2a1552013-02-14 10:42:11 +020090 return snprintf(buf, PAGE_SIZE, "%u\n", rc6p_residency);
Ben Widawsky0136db582012-04-10 21:17:01 -070091}
92
93static ssize_t
Ben Widawskydbdfd8e2012-09-07 19:43:38 -070094show_rc6pp_ms(struct device *kdev, struct device_attribute *attr, char *buf)
Ben Widawsky0136db582012-04-10 21:17:01 -070095{
Dave Airlie14c8d112013-10-11 14:45:30 +100096 struct drm_minor *dminor = dev_to_drm_minor(kdev);
Ben Widawsky0136db582012-04-10 21:17:01 -070097 u32 rc6pp_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6pp);
Jani Nikula3e2a1552013-02-14 10:42:11 +020098 return snprintf(buf, PAGE_SIZE, "%u\n", rc6pp_residency);
Ben Widawsky0136db582012-04-10 21:17:01 -070099}
100
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530101static ssize_t
102show_media_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
103{
104 struct drm_minor *dminor = dev_get_drvdata(kdev);
105 u32 rc6_residency = calc_residency(dminor->dev, VLV_GT_MEDIA_RC6);
106 return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
107}
108
Ben Widawsky0136db582012-04-10 21:17:01 -0700109static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL);
110static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL);
111static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL);
112static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL);
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530113static DEVICE_ATTR(media_rc6_residency_ms, S_IRUGO, show_media_rc6_ms, NULL);
Ben Widawsky0136db582012-04-10 21:17:01 -0700114
115static struct attribute *rc6_attrs[] = {
116 &dev_attr_rc6_enable.attr,
117 &dev_attr_rc6_residency_ms.attr,
Ben Widawsky0136db582012-04-10 21:17:01 -0700118 NULL
119};
120
121static struct attribute_group rc6_attr_group = {
122 .name = power_group_name,
123 .attrs = rc6_attrs
124};
Rodrigo Vivi58abf1d2014-10-07 07:06:50 -0700125
126static struct attribute *rc6p_attrs[] = {
127 &dev_attr_rc6p_residency_ms.attr,
128 &dev_attr_rc6pp_residency_ms.attr,
129 NULL
130};
131
132static struct attribute_group rc6p_attr_group = {
133 .name = power_group_name,
134 .attrs = rc6p_attrs
135};
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530136
137static struct attribute *media_rc6_attrs[] = {
138 &dev_attr_media_rc6_residency_ms.attr,
139 NULL
140};
141
142static struct attribute_group media_rc6_attr_group = {
143 .name = power_group_name,
144 .attrs = media_rc6_attrs
145};
Ben Widawsky8c3f9292012-09-02 00:24:40 -0700146#endif
Ben Widawsky0136db582012-04-10 21:17:01 -0700147
Ben Widawsky84bc7582012-05-25 16:56:25 -0700148static int l3_access_valid(struct drm_device *dev, loff_t offset)
149{
Ben Widawsky040d2ba2013-09-19 11:01:40 -0700150 if (!HAS_L3_DPF(dev))
Ben Widawsky84bc7582012-05-25 16:56:25 -0700151 return -EPERM;
152
153 if (offset % 4 != 0)
154 return -EINVAL;
155
156 if (offset >= GEN7_L3LOG_SIZE)
157 return -ENXIO;
158
159 return 0;
160}
161
162static ssize_t
163i915_l3_read(struct file *filp, struct kobject *kobj,
164 struct bin_attribute *attr, char *buf,
165 loff_t offset, size_t count)
166{
Geliang Tang657fb5f2016-01-13 22:48:40 +0800167 struct device *dev = kobj_to_dev(kobj);
Dave Airlie14c8d112013-10-11 14:45:30 +1000168 struct drm_minor *dminor = dev_to_drm_minor(dev);
Ben Widawsky84bc7582012-05-25 16:56:25 -0700169 struct drm_device *drm_dev = dminor->dev;
170 struct drm_i915_private *dev_priv = drm_dev->dev_private;
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700171 int slice = (int)(uintptr_t)attr->private;
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700172 int ret;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700173
Ben Widawsky1c3dcd12013-09-12 22:28:28 -0700174 count = round_down(count, 4);
175
Ben Widawsky84bc7582012-05-25 16:56:25 -0700176 ret = l3_access_valid(drm_dev, offset);
177 if (ret)
178 return ret;
179
Dan Carpentere5ad4022013-09-20 14:20:18 +0300180 count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
Ben Widawsky33618ea2013-09-12 22:28:29 -0700181
Ben Widawsky84bc7582012-05-25 16:56:25 -0700182 ret = i915_mutex_lock_interruptible(drm_dev);
183 if (ret)
184 return ret;
185
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700186 if (dev_priv->l3_parity.remap_info[slice])
187 memcpy(buf,
188 dev_priv->l3_parity.remap_info[slice] + (offset/4),
189 count);
190 else
191 memset(buf, 0, count);
Ben Widawsky1c966dd2013-09-17 21:12:42 -0700192
Ben Widawsky84bc7582012-05-25 16:56:25 -0700193 mutex_unlock(&drm_dev->struct_mutex);
194
Ben Widawsky1c966dd2013-09-17 21:12:42 -0700195 return count;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700196}
197
198static ssize_t
199i915_l3_write(struct file *filp, struct kobject *kobj,
200 struct bin_attribute *attr, char *buf,
201 loff_t offset, size_t count)
202{
Geliang Tang657fb5f2016-01-13 22:48:40 +0800203 struct device *dev = kobj_to_dev(kobj);
Dave Airlie14c8d112013-10-11 14:45:30 +1000204 struct drm_minor *dminor = dev_to_drm_minor(dev);
Ben Widawsky84bc7582012-05-25 16:56:25 -0700205 struct drm_device *drm_dev = dminor->dev;
206 struct drm_i915_private *dev_priv = drm_dev->dev_private;
Oscar Mateo273497e2014-05-22 14:13:37 +0100207 struct intel_context *ctx;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700208 u32 *temp = NULL; /* Just here to make handling failures easy */
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700209 int slice = (int)(uintptr_t)attr->private;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700210 int ret;
211
Ben Widawsky8245be32013-11-06 13:56:29 -0200212 if (!HAS_HW_CONTEXTS(drm_dev))
213 return -ENXIO;
214
Ben Widawsky84bc7582012-05-25 16:56:25 -0700215 ret = l3_access_valid(drm_dev, offset);
216 if (ret)
217 return ret;
218
219 ret = i915_mutex_lock_interruptible(drm_dev);
220 if (ret)
221 return ret;
222
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700223 if (!dev_priv->l3_parity.remap_info[slice]) {
Ben Widawsky84bc7582012-05-25 16:56:25 -0700224 temp = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
225 if (!temp) {
226 mutex_unlock(&drm_dev->struct_mutex);
227 return -ENOMEM;
228 }
229 }
230
231 ret = i915_gpu_idle(drm_dev);
232 if (ret) {
233 kfree(temp);
234 mutex_unlock(&drm_dev->struct_mutex);
235 return ret;
236 }
237
238 /* TODO: Ideally we really want a GPU reset here to make sure errors
239 * aren't propagated. Since I cannot find a stable way to reset the GPU
240 * at this point it is left as a TODO.
241 */
242 if (temp)
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700243 dev_priv->l3_parity.remap_info[slice] = temp;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700244
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700245 memcpy(dev_priv->l3_parity.remap_info[slice] + (offset/4), buf, count);
Ben Widawsky84bc7582012-05-25 16:56:25 -0700246
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700247 /* NB: We defer the remapping until we switch to the context */
248 list_for_each_entry(ctx, &dev_priv->context_list, link)
249 ctx->remap_slice |= (1<<slice);
Ben Widawsky84bc7582012-05-25 16:56:25 -0700250
251 mutex_unlock(&drm_dev->struct_mutex);
252
253 return count;
254}
255
256static struct bin_attribute dpf_attrs = {
257 .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)},
258 .size = GEN7_L3LOG_SIZE,
259 .read = i915_l3_read,
260 .write = i915_l3_write,
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700261 .mmap = NULL,
262 .private = (void *)0
263};
264
265static struct bin_attribute dpf_attrs_1 = {
266 .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)},
267 .size = GEN7_L3LOG_SIZE,
268 .read = i915_l3_read,
269 .write = i915_l3_write,
270 .mmap = NULL,
271 .private = (void *)1
Ben Widawsky84bc7582012-05-25 16:56:25 -0700272};
273
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200274static ssize_t gt_act_freq_mhz_show(struct device *kdev,
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700275 struct device_attribute *attr, char *buf)
276{
Dave Airlie14c8d112013-10-11 14:45:30 +1000277 struct drm_minor *minor = dev_to_drm_minor(kdev);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700278 struct drm_device *dev = minor->dev;
279 struct drm_i915_private *dev_priv = dev->dev_private;
280 int ret;
281
Tom O'Rourke5c9669c2013-09-16 14:56:43 -0700282 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
283
Imre Deakd46c0512014-04-14 20:24:27 +0300284 intel_runtime_pm_get(dev_priv);
285
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700286 mutex_lock(&dev_priv->rps.hw_lock);
Wayne Boyer666a4532015-12-09 12:29:35 -0800287 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
Jesse Barnes177006a2013-05-02 10:48:07 -0700288 u32 freq;
Jani Nikula64936252013-05-22 15:36:20 +0300289 freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200290 ret = intel_gpu_freq(dev_priv, (freq >> 8) & 0xff);
Jesse Barnes177006a2013-05-02 10:48:07 -0700291 } else {
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200292 u32 rpstat = I915_READ(GEN6_RPSTAT1);
Akash Goeled64d662015-03-06 11:07:22 +0530293 if (IS_GEN9(dev_priv))
294 ret = (rpstat & GEN9_CAGF_MASK) >> GEN9_CAGF_SHIFT;
295 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200296 ret = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
297 else
298 ret = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200299 ret = intel_gpu_freq(dev_priv, ret);
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200300 }
301 mutex_unlock(&dev_priv->rps.hw_lock);
302
303 intel_runtime_pm_put(dev_priv);
304
305 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
306}
307
308static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
309 struct device_attribute *attr, char *buf)
310{
311 struct drm_minor *minor = dev_to_drm_minor(kdev);
312 struct drm_device *dev = minor->dev;
313 struct drm_i915_private *dev_priv = dev->dev_private;
314 int ret;
315
316 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
317
318 intel_runtime_pm_get(dev_priv);
319
320 mutex_lock(&dev_priv->rps.hw_lock);
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200321 ret = intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq);
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700322 mutex_unlock(&dev_priv->rps.hw_lock);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700323
Imre Deakd46c0512014-04-14 20:24:27 +0300324 intel_runtime_pm_put(dev_priv);
325
Jani Nikula3e2a1552013-02-14 10:42:11 +0200326 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700327}
328
Chris Wilson97e4eed2013-08-26 16:18:54 +0100329static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
330 struct device_attribute *attr, char *buf)
331{
Dave Airlie14c8d112013-10-11 14:45:30 +1000332 struct drm_minor *minor = dev_to_drm_minor(kdev);
Chris Wilson97e4eed2013-08-26 16:18:54 +0100333 struct drm_device *dev = minor->dev;
334 struct drm_i915_private *dev_priv = dev->dev_private;
335
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200336 return snprintf(buf, PAGE_SIZE,
337 "%d\n",
338 intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq));
Chris Wilson97e4eed2013-08-26 16:18:54 +0100339}
340
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700341static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
342{
Dave Airlie14c8d112013-10-11 14:45:30 +1000343 struct drm_minor *minor = dev_to_drm_minor(kdev);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700344 struct drm_device *dev = minor->dev;
345 struct drm_i915_private *dev_priv = dev->dev_private;
346 int ret;
347
Tom O'Rourke5c9669c2013-09-16 14:56:43 -0700348 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
349
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700350 mutex_lock(&dev_priv->rps.hw_lock);
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200351 ret = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700352 mutex_unlock(&dev_priv->rps.hw_lock);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700353
Jani Nikula3e2a1552013-02-14 10:42:11 +0200354 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700355}
356
Ben Widawsky46ddf192012-09-12 18:12:07 -0700357static ssize_t gt_max_freq_mhz_store(struct device *kdev,
358 struct device_attribute *attr,
359 const char *buf, size_t count)
360{
Dave Airlie14c8d112013-10-11 14:45:30 +1000361 struct drm_minor *minor = dev_to_drm_minor(kdev);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700362 struct drm_device *dev = minor->dev;
363 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky2a5913a2014-03-19 18:31:13 -0700364 u32 val;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700365 ssize_t ret;
366
367 ret = kstrtou32(buf, 0, &val);
368 if (ret)
369 return ret;
370
Tom O'Rourke5c9669c2013-09-16 14:56:43 -0700371 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
372
Sagar Arun Kamble933bfb42016-02-08 22:47:11 +0530373 intel_runtime_pm_get(dev_priv);
374
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700375 mutex_lock(&dev_priv->rps.hw_lock);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700376
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200377 val = intel_freq_opcode(dev_priv, val);
Jesse Barnes0a073b82013-04-17 15:54:58 -0700378
Ben Widawsky2a5913a2014-03-19 18:31:13 -0700379 if (val < dev_priv->rps.min_freq ||
380 val > dev_priv->rps.max_freq ||
Ben Widawskyb39fb292014-03-19 18:31:11 -0700381 val < dev_priv->rps.min_freq_softlimit) {
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700382 mutex_unlock(&dev_priv->rps.hw_lock);
Sagar Arun Kamble933bfb42016-02-08 22:47:11 +0530383 intel_runtime_pm_put(dev_priv);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700384 return -EINVAL;
385 }
386
Ben Widawsky2a5913a2014-03-19 18:31:13 -0700387 if (val > dev_priv->rps.rp0_freq)
Ben Widawsky31c77382013-04-05 14:29:22 -0700388 DRM_DEBUG("User requested overclocking to %d\n",
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200389 intel_gpu_freq(dev_priv, val));
Ben Widawsky31c77382013-04-05 14:29:22 -0700390
Ben Widawskyb39fb292014-03-19 18:31:11 -0700391 dev_priv->rps.max_freq_softlimit = val;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700392
Ville Syrjäläf745a802015-01-23 21:04:23 +0200393 val = clamp_t(int, dev_priv->rps.cur_freq,
394 dev_priv->rps.min_freq_softlimit,
395 dev_priv->rps.max_freq_softlimit);
396
397 /* We still need *_set_rps to process the new max_delay and
398 * update the interrupt limits and PMINTRMSK even though
399 * frequency request may be unchanged. */
Ville Syrjäläffe02b42015-02-02 19:09:50 +0200400 intel_set_rps(dev, val);
Chris Wilson6917c7b2013-11-06 13:56:26 -0200401
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700402 mutex_unlock(&dev_priv->rps.hw_lock);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700403
Sagar Arun Kamble933bfb42016-02-08 22:47:11 +0530404 intel_runtime_pm_put(dev_priv);
405
Ben Widawsky46ddf192012-09-12 18:12:07 -0700406 return count;
407}
408
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700409static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
410{
Dave Airlie14c8d112013-10-11 14:45:30 +1000411 struct drm_minor *minor = dev_to_drm_minor(kdev);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700412 struct drm_device *dev = minor->dev;
413 struct drm_i915_private *dev_priv = dev->dev_private;
414 int ret;
415
Tom O'Rourke5c9669c2013-09-16 14:56:43 -0700416 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
417
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700418 mutex_lock(&dev_priv->rps.hw_lock);
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200419 ret = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700420 mutex_unlock(&dev_priv->rps.hw_lock);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700421
Jani Nikula3e2a1552013-02-14 10:42:11 +0200422 return snprintf(buf, PAGE_SIZE, "%d\n", ret);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700423}
424
Ben Widawsky46ddf192012-09-12 18:12:07 -0700425static ssize_t gt_min_freq_mhz_store(struct device *kdev,
426 struct device_attribute *attr,
427 const char *buf, size_t count)
428{
Dave Airlie14c8d112013-10-11 14:45:30 +1000429 struct drm_minor *minor = dev_to_drm_minor(kdev);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700430 struct drm_device *dev = minor->dev;
431 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky2a5913a2014-03-19 18:31:13 -0700432 u32 val;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700433 ssize_t ret;
434
435 ret = kstrtou32(buf, 0, &val);
436 if (ret)
437 return ret;
438
Tom O'Rourke5c9669c2013-09-16 14:56:43 -0700439 flush_delayed_work(&dev_priv->rps.delayed_resume_work);
440
Sagar Arun Kamble933bfb42016-02-08 22:47:11 +0530441 intel_runtime_pm_get(dev_priv);
442
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700443 mutex_lock(&dev_priv->rps.hw_lock);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700444
Ville Syrjälä7c59a9c12015-01-23 21:04:26 +0200445 val = intel_freq_opcode(dev_priv, val);
Jesse Barnes0a073b82013-04-17 15:54:58 -0700446
Ben Widawsky2a5913a2014-03-19 18:31:13 -0700447 if (val < dev_priv->rps.min_freq ||
448 val > dev_priv->rps.max_freq ||
449 val > dev_priv->rps.max_freq_softlimit) {
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700450 mutex_unlock(&dev_priv->rps.hw_lock);
Sagar Arun Kamble933bfb42016-02-08 22:47:11 +0530451 intel_runtime_pm_put(dev_priv);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700452 return -EINVAL;
453 }
454
Ben Widawskyb39fb292014-03-19 18:31:11 -0700455 dev_priv->rps.min_freq_softlimit = val;
Chris Wilson6917c7b2013-11-06 13:56:26 -0200456
Ville Syrjäläf745a802015-01-23 21:04:23 +0200457 val = clamp_t(int, dev_priv->rps.cur_freq,
458 dev_priv->rps.min_freq_softlimit,
459 dev_priv->rps.max_freq_softlimit);
460
461 /* We still need *_set_rps to process the new min_delay and
462 * update the interrupt limits and PMINTRMSK even though
463 * frequency request may be unchanged. */
Ville Syrjäläffe02b42015-02-02 19:09:50 +0200464 intel_set_rps(dev, val);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700465
Jesse Barnes4fc688c2012-11-02 11:14:01 -0700466 mutex_unlock(&dev_priv->rps.hw_lock);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700467
Sagar Arun Kamble933bfb42016-02-08 22:47:11 +0530468 intel_runtime_pm_put(dev_priv);
469
Ben Widawsky46ddf192012-09-12 18:12:07 -0700470 return count;
471
472}
473
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200474static DEVICE_ATTR(gt_act_freq_mhz, S_IRUGO, gt_act_freq_mhz_show, NULL);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700475static DEVICE_ATTR(gt_cur_freq_mhz, S_IRUGO, gt_cur_freq_mhz_show, NULL);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700476static DEVICE_ATTR(gt_max_freq_mhz, S_IRUGO | S_IWUSR, gt_max_freq_mhz_show, gt_max_freq_mhz_store);
477static DEVICE_ATTR(gt_min_freq_mhz, S_IRUGO | S_IWUSR, gt_min_freq_mhz_show, gt_min_freq_mhz_store);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700478
Chris Wilson97e4eed2013-08-26 16:18:54 +0100479static DEVICE_ATTR(vlv_rpe_freq_mhz, S_IRUGO, vlv_rpe_freq_mhz_show, NULL);
Ben Widawskyac6ae342012-09-07 19:43:44 -0700480
481static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf);
482static DEVICE_ATTR(gt_RP0_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
483static DEVICE_ATTR(gt_RP1_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
484static DEVICE_ATTR(gt_RPn_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
485
486/* For now we have a static number of RP states */
487static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
488{
Dave Airlie14c8d112013-10-11 14:45:30 +1000489 struct drm_minor *minor = dev_to_drm_minor(kdev);
Ben Widawskyac6ae342012-09-07 19:43:44 -0700490 struct drm_device *dev = minor->dev;
491 struct drm_i915_private *dev_priv = dev->dev_private;
Akash Goelbc4d91f2015-02-26 16:09:47 +0530492 u32 val;
Ben Widawskyac6ae342012-09-07 19:43:44 -0700493
Akash Goelbc4d91f2015-02-26 16:09:47 +0530494 if (attr == &dev_attr_gt_RP0_freq_mhz)
495 val = intel_gpu_freq(dev_priv, dev_priv->rps.rp0_freq);
496 else if (attr == &dev_attr_gt_RP1_freq_mhz)
497 val = intel_gpu_freq(dev_priv, dev_priv->rps.rp1_freq);
498 else if (attr == &dev_attr_gt_RPn_freq_mhz)
499 val = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq);
500 else
Ben Widawskyac6ae342012-09-07 19:43:44 -0700501 BUG();
Akash Goelbc4d91f2015-02-26 16:09:47 +0530502
Jani Nikula3e2a1552013-02-14 10:42:11 +0200503 return snprintf(buf, PAGE_SIZE, "%d\n", val);
Ben Widawskyac6ae342012-09-07 19:43:44 -0700504}
505
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700506static const struct attribute *gen6_attrs[] = {
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200507 &dev_attr_gt_act_freq_mhz.attr,
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700508 &dev_attr_gt_cur_freq_mhz.attr,
509 &dev_attr_gt_max_freq_mhz.attr,
510 &dev_attr_gt_min_freq_mhz.attr,
Ben Widawskyac6ae342012-09-07 19:43:44 -0700511 &dev_attr_gt_RP0_freq_mhz.attr,
512 &dev_attr_gt_RP1_freq_mhz.attr,
513 &dev_attr_gt_RPn_freq_mhz.attr,
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700514 NULL,
515};
516
Chris Wilson97e4eed2013-08-26 16:18:54 +0100517static const struct attribute *vlv_attrs[] = {
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200518 &dev_attr_gt_act_freq_mhz.attr,
Chris Wilson97e4eed2013-08-26 16:18:54 +0100519 &dev_attr_gt_cur_freq_mhz.attr,
520 &dev_attr_gt_max_freq_mhz.attr,
521 &dev_attr_gt_min_freq_mhz.attr,
Deepak S74c4f622014-07-10 13:16:22 +0530522 &dev_attr_gt_RP0_freq_mhz.attr,
523 &dev_attr_gt_RP1_freq_mhz.attr,
524 &dev_attr_gt_RPn_freq_mhz.attr,
Chris Wilson97e4eed2013-08-26 16:18:54 +0100525 &dev_attr_vlv_rpe_freq_mhz.attr,
526 NULL,
527};
528
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300529static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
530 struct bin_attribute *attr, char *buf,
531 loff_t off, size_t count)
532{
533
Geliang Tang657fb5f2016-01-13 22:48:40 +0800534 struct device *kdev = kobj_to_dev(kobj);
Dave Airlie14c8d112013-10-11 14:45:30 +1000535 struct drm_minor *minor = dev_to_drm_minor(kdev);
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300536 struct drm_device *dev = minor->dev;
537 struct i915_error_state_file_priv error_priv;
538 struct drm_i915_error_state_buf error_str;
539 ssize_t ret_count = 0;
540 int ret;
541
542 memset(&error_priv, 0, sizeof(error_priv));
543
Chris Wilson0a4cd7c2014-08-22 14:41:39 +0100544 ret = i915_error_state_buf_init(&error_str, to_i915(dev), count, off);
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300545 if (ret)
546 return ret;
547
548 error_priv.dev = dev;
549 i915_error_state_get(dev, &error_priv);
550
551 ret = i915_error_state_to_str(&error_str, &error_priv);
552 if (ret)
553 goto out;
554
555 ret_count = count < error_str.bytes ? count : error_str.bytes;
556
557 memcpy(buf, error_str.buf, ret_count);
558out:
559 i915_error_state_put(&error_priv);
560 i915_error_state_buf_release(&error_str);
561
562 return ret ?: ret_count;
563}
564
565static ssize_t error_state_write(struct file *file, struct kobject *kobj,
566 struct bin_attribute *attr, char *buf,
567 loff_t off, size_t count)
568{
Geliang Tang657fb5f2016-01-13 22:48:40 +0800569 struct device *kdev = kobj_to_dev(kobj);
Dave Airlie14c8d112013-10-11 14:45:30 +1000570 struct drm_minor *minor = dev_to_drm_minor(kdev);
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300571 struct drm_device *dev = minor->dev;
572 int ret;
573
574 DRM_DEBUG_DRIVER("Resetting error state\n");
575
576 ret = mutex_lock_interruptible(&dev->struct_mutex);
577 if (ret)
578 return ret;
579
580 i915_destroy_error_state(dev);
581 mutex_unlock(&dev->struct_mutex);
582
583 return count;
584}
585
586static struct bin_attribute error_state_attr = {
587 .attr.name = "error",
588 .attr.mode = S_IRUSR | S_IWUSR,
589 .size = 0,
590 .read = error_state_read,
591 .write = error_state_write,
592};
593
Ben Widawsky0136db582012-04-10 21:17:01 -0700594void i915_setup_sysfs(struct drm_device *dev)
595{
596 int ret;
597
Ben Widawsky8c3f9292012-09-02 00:24:40 -0700598#ifdef CONFIG_PM
Rodrigo Vivi58abf1d2014-10-07 07:06:50 -0700599 if (HAS_RC6(dev)) {
Dave Airlie5bdebb12013-10-11 14:07:25 +1000600 ret = sysfs_merge_group(&dev->primary->kdev->kobj,
Daniel Vetter112abd22012-05-31 14:57:43 +0200601 &rc6_attr_group);
602 if (ret)
603 DRM_ERROR("RC6 residency sysfs setup failed\n");
604 }
Rodrigo Vivi58abf1d2014-10-07 07:06:50 -0700605 if (HAS_RC6p(dev)) {
606 ret = sysfs_merge_group(&dev->primary->kdev->kobj,
607 &rc6p_attr_group);
608 if (ret)
609 DRM_ERROR("RC6p residency sysfs setup failed\n");
610 }
Wayne Boyer666a4532015-12-09 12:29:35 -0800611 if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530612 ret = sysfs_merge_group(&dev->primary->kdev->kobj,
613 &media_rc6_attr_group);
614 if (ret)
615 DRM_ERROR("Media RC6 residency sysfs setup failed\n");
616 }
Ben Widawsky8c3f9292012-09-02 00:24:40 -0700617#endif
Ben Widawsky040d2ba2013-09-19 11:01:40 -0700618 if (HAS_L3_DPF(dev)) {
Dave Airlie5bdebb12013-10-11 14:07:25 +1000619 ret = device_create_bin_file(dev->primary->kdev, &dpf_attrs);
Daniel Vetter112abd22012-05-31 14:57:43 +0200620 if (ret)
621 DRM_ERROR("l3 parity sysfs setup failed\n");
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700622
623 if (NUM_L3_SLICES(dev) > 1) {
Dave Airlie5bdebb12013-10-11 14:07:25 +1000624 ret = device_create_bin_file(dev->primary->kdev,
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700625 &dpf_attrs_1);
626 if (ret)
627 DRM_ERROR("l3 parity slice 1 setup failed\n");
628 }
Daniel Vetter112abd22012-05-31 14:57:43 +0200629 }
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700630
Chris Wilson97e4eed2013-08-26 16:18:54 +0100631 ret = 0;
Wayne Boyer666a4532015-12-09 12:29:35 -0800632 if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
Dave Airlie5bdebb12013-10-11 14:07:25 +1000633 ret = sysfs_create_files(&dev->primary->kdev->kobj, vlv_attrs);
Chris Wilson97e4eed2013-08-26 16:18:54 +0100634 else if (INTEL_INFO(dev)->gen >= 6)
Dave Airlie5bdebb12013-10-11 14:07:25 +1000635 ret = sysfs_create_files(&dev->primary->kdev->kobj, gen6_attrs);
Chris Wilson97e4eed2013-08-26 16:18:54 +0100636 if (ret)
637 DRM_ERROR("RPS sysfs setup failed\n");
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300638
Dave Airlie5bdebb12013-10-11 14:07:25 +1000639 ret = sysfs_create_bin_file(&dev->primary->kdev->kobj,
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300640 &error_state_attr);
641 if (ret)
642 DRM_ERROR("error_state sysfs setup failed\n");
Ben Widawsky0136db582012-04-10 21:17:01 -0700643}
644
645void i915_teardown_sysfs(struct drm_device *dev)
646{
Dave Airlie5bdebb12013-10-11 14:07:25 +1000647 sysfs_remove_bin_file(&dev->primary->kdev->kobj, &error_state_attr);
Wayne Boyer666a4532015-12-09 12:29:35 -0800648 if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
Dave Airlie5bdebb12013-10-11 14:07:25 +1000649 sysfs_remove_files(&dev->primary->kdev->kobj, vlv_attrs);
Chris Wilson97e4eed2013-08-26 16:18:54 +0100650 else
Dave Airlie5bdebb12013-10-11 14:07:25 +1000651 sysfs_remove_files(&dev->primary->kdev->kobj, gen6_attrs);
652 device_remove_bin_file(dev->primary->kdev, &dpf_attrs_1);
653 device_remove_bin_file(dev->primary->kdev, &dpf_attrs);
Ben Widawsky853c70e2012-09-19 10:50:19 -0700654#ifdef CONFIG_PM
Dave Airlie5bdebb12013-10-11 14:07:25 +1000655 sysfs_unmerge_group(&dev->primary->kdev->kobj, &rc6_attr_group);
Rodrigo Vivi58abf1d2014-10-07 07:06:50 -0700656 sysfs_unmerge_group(&dev->primary->kdev->kobj, &rc6p_attr_group);
Ben Widawsky853c70e2012-09-19 10:50:19 -0700657#endif
Ben Widawsky0136db582012-04-10 21:17:01 -0700658}