Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 1 | config PPC64 |
| 2 | bool "64-bit kernel" |
| 3 | default n |
Frederic Weisbecker | b952741 | 2012-06-16 15:39:34 +0200 | [diff] [blame] | 4 | select HAVE_VIRT_CPU_ACCOUNTING |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 5 | help |
| 6 | This option selects whether a 32-bit or a 64-bit kernel |
| 7 | will be built. |
| 8 | |
| 9 | menu "Processor support" |
| 10 | choice |
| 11 | prompt "Processor Type" |
| 12 | depends on PPC32 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 13 | help |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 14 | There are five families of 32 bit PowerPC chips supported. |
| 15 | The most common ones are the desktop and server CPUs (601, 603, |
| 16 | 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their |
John Rigby | e177edc | 2008-01-29 04:28:53 +1100 | [diff] [blame] | 17 | embedded 512x/52xx/82xx/83xx/86xx counterparts. |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 18 | The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500 |
| 19 | (85xx) each form a family of their own that is not compatible |
| 20 | with the others. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 21 | |
Arnd Bergmann | b9fd305 | 2007-06-18 01:06:52 +0200 | [diff] [blame] | 22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 23 | |
Benjamin Herrenschmidt | 48c9311 | 2009-06-14 14:45:50 +0000 | [diff] [blame] | 24 | config PPC_BOOK3S_32 |
John Rigby | e177edc | 2008-01-29 04:28:53 +1100 | [diff] [blame] | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 26 | select PPC_FPU |
| 27 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 28 | config PPC_85xx |
| 29 | bool "Freescale 85xx" |
| 30 | select E500 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 31 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 32 | config PPC_8xx |
| 33 | bool "Freescale 8xx" |
| 34 | select FSL_SOC |
| 35 | select 8xx |
Sylvain Munaut | 1088a20 | 2007-09-16 20:53:25 +1000 | [diff] [blame] | 36 | select PPC_LIB_RHEAP |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 37 | |
| 38 | config 40x |
| 39 | bool "AMCC 40x" |
| 40 | select PPC_DCR_NATIVE |
Benjamin Herrenschmidt | 9dae8af | 2007-12-21 15:39:26 +1100 | [diff] [blame] | 41 | select PPC_UDBG_16550 |
Stefan Roese | 93173ce | 2008-03-28 01:43:31 +1100 | [diff] [blame] | 42 | select 4xx_SOC |
John Rigby | b500563 | 2008-06-26 11:07:56 -0600 | [diff] [blame] | 43 | select PPC_PCI_CHOICE |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 44 | |
| 45 | config 44x |
Dave Kleikamp | e7f75ad | 2010-03-05 10:43:12 +0000 | [diff] [blame] | 46 | bool "AMCC 44x, 46x or 47x" |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 47 | select PPC_DCR_NATIVE |
Valentine Barshak | 1d5499b | 2007-10-18 22:55:13 +1000 | [diff] [blame] | 48 | select PPC_UDBG_16550 |
Stefan Roese | 93173ce | 2008-03-28 01:43:31 +1100 | [diff] [blame] | 49 | select 4xx_SOC |
John Rigby | b500563 | 2008-06-26 11:07:56 -0600 | [diff] [blame] | 50 | select PPC_PCI_CHOICE |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 51 | select PHYS_64BIT |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 52 | |
| 53 | config E200 |
| 54 | bool "Freescale e200" |
| 55 | |
| 56 | endchoice |
| 57 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 58 | choice |
| 59 | prompt "Processor Type" |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 60 | depends on PPC64 |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 61 | help |
| 62 | There are two families of 64 bit PowerPC chips supported. |
| 63 | The most common ones are the desktop and server CPUs |
| 64 | (POWER3, RS64, POWER4, POWER5, POWER5+, POWER6, ...) |
| 65 | |
| 66 | The other are the "embedded" processors compliant with the |
| 67 | "Book 3E" variant of the architecture |
| 68 | |
| 69 | config PPC_BOOK3S_64 |
| 70 | bool "Server processors" |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 71 | select PPC_FPU |
Kumar Gala | 5adfd34 | 2011-07-13 05:00:41 +0000 | [diff] [blame] | 72 | select PPC_HAVE_PMU_SUPPORT |
Becky Bruce | 41151e7 | 2011-06-28 09:54:48 +0000 | [diff] [blame] | 73 | select SYS_SUPPORTS_HUGETLBFS |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 74 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 75 | config PPC_BOOK3E_64 |
| 76 | bool "Embedded processors" |
| 77 | select PPC_FPU # Make it a choice ? |
Milton Miller | 1ece355 | 2011-05-10 19:29:42 +0000 | [diff] [blame] | 78 | select PPC_SMP_MUXED_IPI |
Ian Munsie | 440bc68 | 2012-11-14 18:49:49 +0000 | [diff] [blame] | 79 | select PPC_DOORBELL |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 80 | |
| 81 | endchoice |
| 82 | |
Anton Blanchard | d23c6fb | 2012-04-17 18:45:28 +0000 | [diff] [blame] | 83 | choice |
| 84 | prompt "CPU selection" |
| 85 | depends on PPC64 |
| 86 | default GENERIC_CPU |
| 87 | help |
| 88 | This will create a kernel which is optimised for a particular CPU. |
| 89 | The resulting kernel may not run on other CPUs, so use this with care. |
| 90 | |
| 91 | If unsure, select Generic. |
| 92 | |
| 93 | config GENERIC_CPU |
| 94 | bool "Generic" |
| 95 | |
| 96 | config CELL_CPU |
| 97 | bool "Cell Broadband Engine" |
| 98 | |
| 99 | config POWER4_CPU |
| 100 | bool "POWER4" |
| 101 | |
| 102 | config POWER5_CPU |
| 103 | bool "POWER5" |
| 104 | |
| 105 | config POWER6_CPU |
| 106 | bool "POWER6" |
| 107 | |
| 108 | config POWER7_CPU |
| 109 | bool "POWER7" |
| 110 | |
| 111 | endchoice |
| 112 | |
Benjamin Herrenschmidt | 48c9311 | 2009-06-14 14:45:50 +0000 | [diff] [blame] | 113 | config PPC_BOOK3S |
| 114 | def_bool y |
| 115 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 116 | |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 117 | config PPC_BOOK3E |
| 118 | def_bool y |
| 119 | depends on PPC_BOOK3E_64 |
| 120 | |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 121 | config 6xx |
| 122 | def_bool y |
| 123 | depends on PPC32 && PPC_BOOK3S |
Paul Mackerras | 7325927 | 2009-06-17 21:53:51 +1000 | [diff] [blame] | 124 | select PPC_HAVE_PMU_SUPPORT |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 125 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 126 | config POWER3 |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 127 | depends on PPC64 && PPC_BOOK3S |
Paul Bolle | ff2d758 | 2013-03-11 13:44:55 +0000 | [diff] [blame^] | 128 | def_bool y |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 129 | |
| 130 | config POWER4 |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 131 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 132 | def_bool y |
| 133 | |
Benjamin Herrenschmidt | 76b4eda | 2011-04-14 22:32:01 +0000 | [diff] [blame] | 134 | config PPC_A2 |
| 135 | bool |
| 136 | depends on PPC_BOOK3E_64 |
| 137 | |
Arnd Bergmann | 3164ccc | 2007-09-15 10:21:57 +1000 | [diff] [blame] | 138 | config TUNE_CELL |
| 139 | bool "Optimize for Cell Broadband Engine" |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 140 | depends on PPC64 && PPC_BOOK3S |
Arnd Bergmann | 3164ccc | 2007-09-15 10:21:57 +1000 | [diff] [blame] | 141 | help |
| 142 | Cause the compiler to optimize for the PPE of the Cell Broadband |
| 143 | Engine. This will make the code run considerably faster on Cell |
| 144 | but somewhat slower on other machines. This option only changes |
| 145 | the scheduling of instructions, not the selection of instructions |
| 146 | itself, so the resulting kernel will keep running on all other |
Paul Bolle | ff2d758 | 2013-03-11 13:44:55 +0000 | [diff] [blame^] | 147 | machines. |
Arnd Bergmann | 3164ccc | 2007-09-15 10:21:57 +1000 | [diff] [blame] | 148 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 149 | # this is temp to handle compat with arch=ppc |
| 150 | config 8xx |
| 151 | bool |
| 152 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 153 | config E500 |
Andy Fleming | 39aef68 | 2008-02-04 18:27:55 -0600 | [diff] [blame] | 154 | select FSL_EMB_PERFMON |
Kumar Gala | 4490c06 | 2010-10-08 08:32:11 -0500 | [diff] [blame] | 155 | select PPC_FSL_BOOK3E |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 156 | bool |
| 157 | |
Kumar Gala | 3dfa877 | 2008-06-16 09:41:32 -0500 | [diff] [blame] | 158 | config PPC_E500MC |
| 159 | bool "e500mc Support" |
| 160 | select PPC_FPU |
| 161 | depends on E500 |
Scott Wood | 9653018 | 2012-07-10 19:26:48 -0500 | [diff] [blame] | 162 | help |
| 163 | This must be enabled for running on e500mc (and derivatives |
| 164 | such as e5500/e6500), and must be disabled for running on |
| 165 | e500v1 or e500v2. |
Kumar Gala | 3dfa877 | 2008-06-16 09:41:32 -0500 | [diff] [blame] | 166 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 167 | config PPC_FPU |
| 168 | bool |
| 169 | default y if PPC64 |
| 170 | |
Kumar Gala | 5753c08 | 2009-10-16 18:31:48 -0500 | [diff] [blame] | 171 | config FSL_EMB_PERFMON |
| 172 | bool "Freescale Embedded Perfmon" |
| 173 | depends on E500 || PPC_83xx |
| 174 | help |
| 175 | This is the Performance Monitor support found on the e500 core |
| 176 | and some e300 cores (c3 and c4). Select this only if your |
| 177 | core supports the Embedded Performance Monitor APU |
| 178 | |
Scott Wood | a111065 | 2010-02-25 18:09:45 -0600 | [diff] [blame] | 179 | config FSL_EMB_PERF_EVENT |
| 180 | bool |
| 181 | depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS |
| 182 | default y |
| 183 | |
| 184 | config FSL_EMB_PERF_EVENT_E500 |
| 185 | bool |
| 186 | depends on FSL_EMB_PERF_EVENT && E500 |
| 187 | default y |
| 188 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 189 | config 4xx |
| 190 | bool |
| 191 | depends on 40x || 44x |
| 192 | default y |
| 193 | |
| 194 | config BOOKE |
| 195 | bool |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 196 | depends on E200 || E500 || 44x || PPC_BOOK3E |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 197 | default y |
| 198 | |
| 199 | config FSL_BOOKE |
| 200 | bool |
Kumar Gala | 4490c06 | 2010-10-08 08:32:11 -0500 | [diff] [blame] | 201 | depends on (E200 || E500) && PPC32 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 202 | default y |
| 203 | |
Kumar Gala | 4490c06 | 2010-10-08 08:32:11 -0500 | [diff] [blame] | 204 | # this is for common code between PPC32 & PPC64 FSL BOOKE |
| 205 | config PPC_FSL_BOOK3E |
| 206 | bool |
| 207 | select FSL_EMB_PERFMON |
Milton Miller | 1ece355 | 2011-05-10 19:29:42 +0000 | [diff] [blame] | 208 | select PPC_SMP_MUXED_IPI |
Becky Bruce | a475c8e | 2011-10-10 10:50:44 +0000 | [diff] [blame] | 209 | select SYS_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64 |
Ian Munsie | 440bc68 | 2012-11-14 18:49:49 +0000 | [diff] [blame] | 210 | select PPC_DOORBELL |
Kumar Gala | 4490c06 | 2010-10-08 08:32:11 -0500 | [diff] [blame] | 211 | default y if FSL_BOOKE |
Andy Fleming | 39aef68 | 2008-02-04 18:27:55 -0600 | [diff] [blame] | 212 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 213 | config PTE_64BIT |
| 214 | bool |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 215 | depends on 44x || E500 || PPC_86xx |
| 216 | default y if PHYS_64BIT |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 217 | |
| 218 | config PHYS_64BIT |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 219 | bool 'Large physical address support' if E500 || PPC_86xx |
| 220 | depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 221 | ---help--- |
| 222 | This option enables kernel support for larger than 32-bit physical |
Becky Bruce | 4ee7084 | 2008-09-24 11:01:24 -0500 | [diff] [blame] | 223 | addresses. This feature may not be available on all cores. |
| 224 | |
| 225 | If you have more than 3.5GB of RAM or so, you also need to enable |
| 226 | SWIOTLB under Kernel Options for this to work. The actual number |
| 227 | is platform-dependent. |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 228 | |
| 229 | If in doubt, say N here. |
| 230 | |
| 231 | config ALTIVEC |
| 232 | bool "AltiVec Support" |
Benjamin Herrenschmidt | 28794d3 | 2009-03-10 17:53:27 +0000 | [diff] [blame] | 233 | depends on 6xx || POWER4 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 234 | ---help--- |
| 235 | This option enables kernel support for the Altivec extensions to the |
| 236 | PowerPC processor. The kernel currently supports saving and restoring |
| 237 | altivec registers, and turning on the 'altivec enable' bit so user |
| 238 | processes can execute altivec instructions. |
| 239 | |
| 240 | This option is only usefully if you have a processor that supports |
| 241 | altivec (G4, otherwise known as 74xx series), but does not have |
| 242 | any affect on a non-altivec cpu (it does, however add code to the |
| 243 | kernel). |
| 244 | |
| 245 | If in doubt, say Y here. |
| 246 | |
Michael Neuling | 96d5b52 | 2008-06-25 14:07:18 +1000 | [diff] [blame] | 247 | config VSX |
| 248 | bool "VSX Support" |
| 249 | depends on POWER4 && ALTIVEC && PPC_FPU |
| 250 | ---help--- |
| 251 | |
| 252 | This option enables kernel support for the Vector Scaler extensions |
| 253 | to the PowerPC processor. The kernel currently supports saving and |
| 254 | restoring VSX registers, and turning on the 'VSX enable' bit so user |
| 255 | processes can execute VSX instructions. |
| 256 | |
| 257 | This option is only useful if you have a processor that supports |
| 258 | VSX (P7 and above), but does not have any affect on a non-VSX |
| 259 | CPUs (it does, however add code to the kernel). |
| 260 | |
| 261 | If in doubt, say Y here. |
| 262 | |
Tseng-Hui (Frank) Lin | 851d2e2 | 2011-05-02 20:43:04 +0000 | [diff] [blame] | 263 | config PPC_ICSWX |
| 264 | bool "Support for PowerPC icswx coprocessor instruction" |
Jimi Xenidis | fac26ad | 2011-09-29 10:55:13 +0000 | [diff] [blame] | 265 | depends on POWER4 || PPC_A2 |
Tseng-Hui (Frank) Lin | 851d2e2 | 2011-05-02 20:43:04 +0000 | [diff] [blame] | 266 | default n |
| 267 | ---help--- |
| 268 | |
| 269 | This option enables kernel support for the PowerPC Initiate |
| 270 | Coprocessor Store Word (icswx) coprocessor instruction on POWER7 |
| 271 | or newer processors. |
| 272 | |
| 273 | This option is only useful if you have a processor that supports |
| 274 | the icswx coprocessor instruction. It does not have any effect |
| 275 | on processors without the icswx coprocessor instruction. |
| 276 | |
| 277 | This option slightly increases kernel memory usage. |
| 278 | |
| 279 | If in doubt, say N here. |
| 280 | |
Jimi Xenidis | 9d67028 | 2011-09-29 10:55:12 +0000 | [diff] [blame] | 281 | config PPC_ICSWX_PID |
| 282 | bool "icswx requires direct PID management" |
| 283 | depends on PPC_ICSWX && POWER4 |
| 284 | default y |
| 285 | ---help--- |
Jimi Xenidis | c3dcf53 | 2011-09-29 10:55:14 +0000 | [diff] [blame] | 286 | The PID register in server is used explicitly for ICSWX. In |
Masanari Iida | 6b2aac4 | 2012-04-14 00:14:11 +0900 | [diff] [blame] | 287 | embedded systems PID management is done by the system. |
Jimi Xenidis | 9d67028 | 2011-09-29 10:55:12 +0000 | [diff] [blame] | 288 | |
Jimi Xenidis | c3dcf53 | 2011-09-29 10:55:14 +0000 | [diff] [blame] | 289 | config PPC_ICSWX_USE_SIGILL |
| 290 | bool "Should a bad CT cause a SIGILL?" |
| 291 | depends on PPC_ICSWX |
| 292 | default n |
| 293 | ---help--- |
| 294 | Should a bad CT used for "non-record form ICSWX" cause an |
Masanari Iida | 6b2aac4 | 2012-04-14 00:14:11 +0900 | [diff] [blame] | 295 | illegal instruction signal or should it be silent as |
Jimi Xenidis | c3dcf53 | 2011-09-29 10:55:14 +0000 | [diff] [blame] | 296 | architected. |
| 297 | |
| 298 | If in doubt, say N here. |
| 299 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 300 | config SPE |
| 301 | bool "SPE Support" |
Kumar Gala | 3dfa877 | 2008-06-16 09:41:32 -0500 | [diff] [blame] | 302 | depends on E200 || (E500 && !PPC_E500MC) |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 303 | default y |
| 304 | ---help--- |
| 305 | This option enables kernel support for the Signal Processing |
| 306 | Extensions (SPE) to the PowerPC processor. The kernel currently |
| 307 | supports saving and restoring SPE registers, and turning on the |
| 308 | 'spe enable' bit so user processes can execute SPE instructions. |
| 309 | |
| 310 | This option is only useful if you have a processor that supports |
| 311 | SPE (e500, otherwise known as 85xx series), but does not have any |
| 312 | effect on a non-spe cpu (it does, however add code to the kernel). |
| 313 | |
| 314 | If in doubt, say Y here. |
| 315 | |
| 316 | config PPC_STD_MMU |
Benjamin Herrenschmidt | 5b7c3c9 | 2009-06-02 21:17:37 +0000 | [diff] [blame] | 317 | def_bool y |
| 318 | depends on PPC_BOOK3S |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 319 | |
| 320 | config PPC_STD_MMU_32 |
| 321 | def_bool y |
| 322 | depends on PPC_STD_MMU && PPC32 |
| 323 | |
Benjamin Herrenschmidt | 5e69661 | 2008-12-18 19:13:24 +0000 | [diff] [blame] | 324 | config PPC_STD_MMU_64 |
| 325 | def_bool y |
| 326 | depends on PPC_STD_MMU && PPC64 |
| 327 | |
| 328 | config PPC_MMU_NOHASH |
| 329 | def_bool y |
| 330 | depends on !PPC_STD_MMU |
| 331 | |
Kumar Gala | 70fe3af | 2009-02-12 16:12:40 -0600 | [diff] [blame] | 332 | config PPC_BOOK3E_MMU |
| 333 | def_bool y |
Benjamin Herrenschmidt | 2d27cfd | 2009-07-23 23:15:59 +0000 | [diff] [blame] | 334 | depends on FSL_BOOKE || PPC_BOOK3E |
Kumar Gala | 70fe3af | 2009-02-12 16:12:40 -0600 | [diff] [blame] | 335 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 336 | config PPC_MM_SLICES |
| 337 | bool |
Becky Bruce | a475c8e | 2011-10-10 10:50:44 +0000 | [diff] [blame] | 338 | default y if (!PPC_FSL_BOOK3E && PPC64 && HUGETLB_PAGE) || (PPC_STD_MMU_64 && PPC_64K_PAGES) |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 339 | default n |
| 340 | |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 341 | config PPC_HAVE_PMU_SUPPORT |
| 342 | bool |
| 343 | |
| 344 | config PPC_PERF_CTRS |
| 345 | def_bool y |
Ingo Molnar | cdd6c48 | 2009-09-21 12:02:48 +0200 | [diff] [blame] | 346 | depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 347 | help |
Ingo Molnar | cdd6c48 | 2009-09-21 12:02:48 +0200 | [diff] [blame] | 348 | This enables the powerpc-specific perf_event back-end. |
Paul Mackerras | 105988c | 2009-06-17 21:50:04 +1000 | [diff] [blame] | 349 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 350 | config SMP |
Dave Kleikamp | e7f75ad | 2010-03-05 10:43:12 +0000 | [diff] [blame] | 351 | depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 352 | bool "Symmetric multi-processing support" |
| 353 | ---help--- |
| 354 | This enables support for systems with more than one CPU. If you have |
| 355 | a system with only one CPU, say N. If you have a system with more |
| 356 | than one CPU, say Y. Note that the kernel does not currently |
| 357 | support SMP machines with 603/603e/603ev or PPC750 ("G3") processors |
| 358 | since they have inadequate hardware support for multiprocessor |
| 359 | operation. |
| 360 | |
| 361 | If you say N here, the kernel will run on single and multiprocessor |
| 362 | machines, but will use only one CPU of a multiprocessor machine. If |
| 363 | you say Y here, the kernel will run on single-processor machines. |
| 364 | On a single-processor machine, the kernel will run faster if you say |
| 365 | N here. |
| 366 | |
| 367 | If you don't know what to do here, say N. |
| 368 | |
| 369 | config NR_CPUS |
Michael Neuling | 2d8ae63 | 2009-05-17 15:13:16 +0000 | [diff] [blame] | 370 | int "Maximum number of CPUs (2-8192)" |
| 371 | range 2 8192 |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 372 | depends on SMP |
| 373 | default "32" if PPC64 |
| 374 | default "4" |
| 375 | |
| 376 | config NOT_COHERENT_CACHE |
| 377 | bool |
Albert Herranz | b91a143 | 2009-12-12 06:31:38 +0000 | [diff] [blame] | 378 | depends on 4xx || 8xx || E200 || PPC_MPC512x || GAMECUBE_COMMON |
Dave Kleikamp | e7f75ad | 2010-03-05 10:43:12 +0000 | [diff] [blame] | 379 | default n if PPC_47x |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 380 | default y |
| 381 | |
Robert P. J. Day | f8eb77d | 2007-07-18 08:21:29 +1000 | [diff] [blame] | 382 | config CHECK_CACHE_COHERENCY |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 383 | bool |
| 384 | |
Ian Munsie | 440bc68 | 2012-11-14 18:49:49 +0000 | [diff] [blame] | 385 | config PPC_DOORBELL |
| 386 | bool |
| 387 | default n |
| 388 | |
Arnd Bergmann | a0ae9c7 | 2007-06-13 02:30:17 +1000 | [diff] [blame] | 389 | endmenu |