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Catalin Marinas4f04d8f2012-03-05 11:49:27 +00001 Memory Layout on AArch64 Linux
2 ==============================
3
4Author: Catalin Marinas <catalin.marinas@arm.com>
Catalin Marinas4f04d8f2012-03-05 11:49:27 +00005
6This document describes the virtual memory layout used by the AArch64
7Linux kernel. The architecture allows up to 4 levels of translation
8tables with a 4KB page size and up to 3 levels with a 64KB page size.
9
Catalin Marinas08375192014-07-16 17:42:43 +010010AArch64 Linux uses either 3 levels or 4 levels of translation tables
11with the 4KB page configuration, allowing 39-bit (512GB) or 48-bit
12(256TB) virtual addresses, respectively, for both user and kernel. With
1364KB pages, only 2 levels of translation tables, allowing 42-bit (4TB)
Jungseok Lee4edae012014-05-12 10:40:44 +010014virtual address, are used but the memory layout is the same.
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000015
Catalin Marinas08375192014-07-16 17:42:43 +010016User addresses have bits 63:48 set to 0 while the kernel addresses have
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000017the same bits set to 1. TTBRx selection is given by bit 63 of the
18virtual address. The swapper_pg_dir contains only kernel (global)
19mappings while the user pgd contains only user (non-global) mappings.
Alex Bennéea24637d2014-07-22 16:14:42 +010020The swapper_pg_dir address is written to TTBR1 and never written to
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000021TTBR0.
22
23
Jungseok Lee4edae012014-05-12 10:40:44 +010024AArch64 Linux memory layout with 4KB pages + 3 levels:
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000025
26Start End Size Use
27-----------------------------------------------------------------------
280000000000000000 0000007fffffffff 512GB user
Catalin Marinas08375192014-07-16 17:42:43 +010029ffffff8000000000 ffffffffffffffff 512GB kernel
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000030
31
Jungseok Lee4edae012014-05-12 10:40:44 +010032AArch64 Linux memory layout with 4KB pages + 4 levels:
33
34Start End Size Use
35-----------------------------------------------------------------------
360000000000000000 0000ffffffffffff 256TB user
Catalin Marinas08375192014-07-16 17:42:43 +010037ffff000000000000 ffffffffffffffff 256TB kernel
Jungseok Lee4edae012014-05-12 10:40:44 +010038
39
40AArch64 Linux memory layout with 64KB pages + 2 levels:
Catalin Marinas847264fb2013-10-23 16:50:07 +010041
42Start End Size Use
43-----------------------------------------------------------------------
440000000000000000 000003ffffffffff 4TB user
Catalin Marinas08375192014-07-16 17:42:43 +010045fffffc0000000000 ffffffffffffffff 4TB kernel
Catalin Marinas847264fb2013-10-23 16:50:07 +010046
47
Catalin Marinas383c2792014-07-21 15:54:50 +010048AArch64 Linux memory layout with 64KB pages + 3 levels:
49
50Start End Size Use
51-----------------------------------------------------------------------
520000000000000000 0000ffffffffffff 256TB user
53ffff000000000000 ffffffffffffffff 256TB kernel
54
55
Catalin Marinas08375192014-07-16 17:42:43 +010056For details of the virtual kernel memory layout please see the kernel
57booting log.
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000058
59
Catalin Marinas08375192014-07-16 17:42:43 +010060Translation table lookup with 4KB pages:
Jungseok Lee4edae012014-05-12 10:40:44 +010061
62+--------+--------+--------+--------+--------+--------+--------+--------+
63|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
64+--------+--------+--------+--------+--------+--------+--------+--------+
65 | | | | | |
66 | | | | | v
67 | | | | | [11:0] in-page offset
68 | | | | +-> [20:12] L3 index
69 | | | +-----------> [29:21] L2 index
70 | | +---------------------> [38:30] L1 index
71 | +-------------------------------> [47:39] L0 index
72 +-------------------------------------------------> [63] TTBR0/1
73
74
Catalin Marinas08375192014-07-16 17:42:43 +010075Translation table lookup with 64KB pages:
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000076
77+--------+--------+--------+--------+--------+--------+--------+--------+
78|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
79+--------+--------+--------+--------+--------+--------+--------+--------+
80 | | | | |
81 | | | | v
82 | | | | [15:0] in-page offset
83 | | | +----------> [28:16] L3 index
Catalin Marinas08375192014-07-16 17:42:43 +010084 | | +--------------------------> [41:29] L2 index
85 | +-------------------------------> [47:42] L1 index
Catalin Marinas4f04d8f2012-03-05 11:49:27 +000086 +-------------------------------------------------> [63] TTBR0/1
Marc Zyngieraa4a73a2013-05-02 14:31:03 +010087
Catalin Marinas08375192014-07-16 17:42:43 +010088
Marc Zyngieraa4a73a2013-05-02 14:31:03 +010089When using KVM, the hypervisor maps kernel pages in EL2, at a fixed
90offset from the kernel VA (top 24bits of the kernel VA set to zero):
91
92Start End Size Use
93-----------------------------------------------------------------------
940000004000000000 0000007fffffffff 256GB kernel objects mapped in HYP