Merge git://git.linux-nfs.org/projects/trondmy/nfs-2.6
* git://git.linux-nfs.org/projects/trondmy/nfs-2.6: (82 commits)
NFSv4: Remove BKL from the nfsv4 state recovery
SUNRPC: Remove the BKL from the callback functions
NFS: Remove BKL from the readdir code
NFS: Remove BKL from the symlink code
NFS: Remove BKL from the sillydelete operations
NFS: Remove the BKL from the rename, rmdir and unlink operations
NFS: Remove BKL from NFS lookup code
NFS: Remove the BKL from nfs_link()
NFS: Remove the BKL from the inode creation operations
NFS: Remove BKL usage from open()
NFS: Remove BKL usage from the write path
NFS: Remove the BKL from the permission checking code
NFS: Remove attribute update related BKL references
NFS: Remove BKL requirement from attribute updates
NFS: Protect inode->i_nlink updates using inode->i_lock
nfs: set correct fl_len in nlmclnt_test()
SUNRPC: Support registering IPv6 interfaces with local rpcbind daemon
SUNRPC: Refactor rpcb_register to make rpcbindv4 support easier
SUNRPC: None of rpcb_create's callers wants a privileged source port
SUNRPC: Introduce a specific rpcb_create for contacting localhost
...
diff --git a/Documentation/ftrace.txt b/Documentation/ftrace.txt
index 77d3faa..f218f61 100644
--- a/Documentation/ftrace.txt
+++ b/Documentation/ftrace.txt
@@ -4,9 +4,10 @@
Copyright 2008 Red Hat Inc.
Author: Steven Rostedt <srostedt@redhat.com>
License: The GNU Free Documentation License, Version 1.2
-Reviewers: Elias Oltmanns and Randy Dunlap
+Reviewers: Elias Oltmanns, Randy Dunlap, Andrew Morton,
+ John Kacur, and David Teigland.
-Writen for: 2.6.26-rc8 linux-2.6-tip.git tip/tracing/ftrace branch
+Written for: 2.6.27-rc1
Introduction
------------
@@ -18,10 +19,11 @@
Although ftrace is the function tracer, it also includes an
infrastructure that allows for other types of tracing. Some of the
-tracers that are currently in ftrace is a tracer to trace
+tracers that are currently in ftrace include a tracer to trace
context switches, the time it takes for a high priority task to
run after it was woken up, the time interrupts are disabled, and
-more.
+more (ftrace allows for tracer plugins, which means that the list of
+tracers can always grow).
The File System
@@ -35,6 +37,8 @@
# mkdir /debug
# mount -t debugfs nodev /debug
+(Note: it is more common to mount at /sys/kernel/debug, but for simplicity
+ this document will use /debug)
That's it! (assuming that you have ftrace configured into your kernel)
@@ -50,20 +54,19 @@
available_tracers : This holds the different types of tracers that
have been compiled into the kernel. The tracers
- listed here can be configured by echoing in their
- name into current_tracer.
+ listed here can be configured by echoing their name
+ into current_tracer.
tracing_enabled : This sets or displays whether the current_tracer
is activated and tracing or not. Echo 0 into this
- file to disable the tracer or 1 (or non-zero) to
- enable it.
+ file to disable the tracer or 1 to enable it.
trace : This file holds the output of the trace in a human readable
- format.
+ format (described below).
latency_trace : This file shows the same trace but the information
is organized more to display possible latencies
- in the system.
+ in the system (described below).
trace_pipe : The output is the same as the "trace" file but this
file is meant to be streamed with live tracing.
@@ -75,7 +78,7 @@
file, it is consumed, and will not be read
again with a sequential read. The "trace" and
"latency_trace" files are static, and if the
- tracer isn't adding more data, they will display
+ tracer is not adding more data, they will display
the same information every time they are read.
iter_ctrl : This file lets the user control the amount of data
@@ -92,10 +95,10 @@
trace_entries : This sets or displays the number of trace
entries each CPU buffer can hold. The tracer buffers
- are the same size for each CPU, so care must be
- taken when modifying the trace_entries. The trace
- buffers are allocated in pages (blocks of memory that
- the kernel uses for allocation, usually 4 KB in size).
+ are the same size for each CPU. The displayed number
+ is the size of the CPU buffer and not total size. The
+ trace buffers are allocated in pages (blocks of memory
+ that the kernel uses for allocation, usually 4 KB in size).
Since each entry is smaller than a page, if the last
allocated page has room for more entries than were
requested, the rest of the page is used to allocate
@@ -112,20 +115,19 @@
on specified CPUS. The format is a hex string
representing the CPUS.
- set_ftrace_filter : When dynamic ftrace is configured in, the
- code is dynamically modified to disable calling
- of the function profiler (mcount). This lets
- tracing be configured in with practically no overhead
- in performance. This also has a side effect of
- enabling or disabling specific functions to be
- traced. Echoing in names of functions into this
- file will limit the trace to only these functions.
+ set_ftrace_filter : When dynamic ftrace is configured in (see the
+ section below "dynamic ftrace"), the code is dynamically
+ modified (code text rewrite) to disable calling of the
+ function profiler (mcount). This lets tracing be configured
+ in with practically no overhead in performance. This also
+ has a side effect of enabling or disabling specific functions
+ to be traced. Echoing names of functions into this file
+ will limit the trace to only those functions.
- set_ftrace_notrace: This has the opposite effect that
- set_ftrace_filter has. Any function that is added
- here will not be traced. If a function exists
- in both set_ftrace_filter and set_ftrace_notrace,
- the function will _not_ be traced.
+ set_ftrace_notrace: This has an effect opposite to that of
+ set_ftrace_filter. Any function that is added here will not
+ be traced. If a function exists in both set_ftrace_filter
+ and set_ftrace_notrace, the function will _not_ be traced.
available_filter_functions : When a function is encountered the first
time by the dynamic tracer, it is recorded and
@@ -133,32 +135,31 @@
lists the functions that have been recorded
by the dynamic tracer and these functions can
be used to set the ftrace filter by the above
- "set_ftrace_filter" file.
+ "set_ftrace_filter" file. (See the section "dynamic ftrace"
+ below for more details).
The Tracers
-----------
-Here are the list of current tracers that can be configured.
+Here is the list of current tracers that may be configured.
ftrace - function tracer that uses mcount to trace all functions.
- It is possible to filter out which functions that are
- to be traced when dynamic ftrace is configured in.
sched_switch - traces the context switches between tasks.
- irqsoff - traces the areas that disable interrupts and saves off
+ irqsoff - traces the areas that disable interrupts and saves
the trace with the longest max latency.
See tracing_max_latency. When a new max is recorded,
it replaces the old trace. It is best to view this
- trace with the latency_trace file.
+ trace via the latency_trace file.
- preemptoff - Similar to irqsoff but traces and records the time
- preemption is disabled.
+ preemptoff - Similar to irqsoff but traces and records the amount of
+ time for which preemption is disabled.
preemptirqsoff - Similar to irqsoff and preemptoff, but traces and
- records the largest time irqs and/or preemption is
- disabled.
+ records the largest time for which irqs and/or preemption
+ is disabled.
wakeup - Traces and records the max latency that it takes for
the highest priority task to get scheduled after
@@ -171,13 +172,13 @@
Examples of using the tracer
----------------------------
-Here are typical examples of using the tracers with only controlling
-them with the debugfs interface (without using any user-land utilities).
+Here are typical examples of using the tracers when controlling them only
+with the debugfs interface (without using any user-land utilities).
Output format:
--------------
-Here's an example of the output format of the file "trace"
+Here is an example of the output format of the file "trace"
--------
# tracer: ftrace
@@ -189,14 +190,15 @@
bash-4251 [01] 10152.583855: _atomic_dec_and_lock <-dput
--------
-A header is printed with the trace that is represented. In this case
-the tracer is "ftrace". Then a header showing the format. Task name
-"bash", the task PID "4251", the CPU that it was running on
+A header is printed with the tracer name that is represented by the trace.
+In this case the tracer is "ftrace". Then a header showing the format. Task
+name "bash", the task PID "4251", the CPU that it was running on
"01", the timestamp in <secs>.<usecs> format, the function name that was
traced "path_put" and the parent function that called this function
-"path_walk".
+"path_walk". The timestamp is the time at which the function was
+entered.
-The sched_switch tracer also includes tracing of task wake ups and
+The sched_switch tracer also includes tracing of task wakeups and
context switches.
ksoftirqd/1-7 [01] 1453.070013: 7:115:R + 2916:115:S
@@ -206,7 +208,7 @@
kondemand/1-2916 [01] 1453.070013: 2916:115:S ==> 7:115:R
ksoftirqd/1-7 [01] 1453.070013: 7:115:S ==> 0:140:R
-Wake ups are represented by a "+" and the context switches show
+Wake ups are represented by a "+" and the context switches are shown as
"==>". The format is:
Context switches:
@@ -221,7 +223,7 @@
<pid>:<prio>:<state> + <pid>:<prio>:<state>
-The prio is the internal kernel priority, which is inverse to the
+The prio is the internal kernel priority, which is the inverse of the
priority that is usually displayed by user-space tools. Zero represents
the highest priority (99). Prio 100 starts the "nice" priorities with
100 being equal to nice -20 and 139 being nice 19. The prio "140" is
@@ -232,7 +234,7 @@
--------------------
For traces that display latency times, the latency_trace file gives
-a bit more information to see why a latency happened. Here's a typical
+somewhat more information to see why a latency happened. Here is a typical
trace.
# tracer: irqsoff
@@ -260,21 +262,20 @@
<idle>-0 0d.s1 98us : trace_hardirqs_on (do_softirq)
-vim:ft=help
-
-This shows that the current tracer is "irqsoff" tracing the time
-interrupts are disabled. It gives the trace version and the kernel
-this was executed on (2.6.26-rc8). Then it displays the max latency
-in microsecs (97 us). The number of trace entries displayed
-by the total number recorded (both are three: #3/3). The type of
+This shows that the current tracer is "irqsoff" tracing the time for which
+interrupts were disabled. It gives the trace version and the version
+of the kernel upon which this was executed on (2.6.26-rc8). Then it displays
+the max latency in microsecs (97 us). The number of trace entries displayed
+and the total number recorded (both are three: #3/3). The type of
preemption that was used (PREEMPT). VP, KP, SP, and HP are always zero
-and reserved for later use. #P is the number of online CPUS (#P:2).
+and are reserved for later use. #P is the number of online CPUS (#P:2).
-The task is the process that was running when the latency happened.
+The task is the process that was running when the latency occurred.
(swapper pid: 0).
-The start and stop that caused the latencies:
+The start and stop (the functions in which the interrupts were disabled and
+enabled respectively) that caused the latencies:
apic_timer_interrupt is where the interrupts were disabled.
do_softirq is where they were enabled again.
@@ -286,14 +287,14 @@
pid: The PID of that process.
- CPU#: The CPU that the process was running on.
+ CPU#: The CPU which the process was running on.
irqs-off: 'd' interrupts are disabled. '.' otherwise.
need-resched: 'N' task need_resched is set, '.' otherwise.
hardirq/softirq:
- 'H' - hard irq happened inside a softirq.
+ 'H' - hard irq occurred inside a softirq.
'h' - hard irq is running
's' - soft irq is running
'.' - normal context.
@@ -303,7 +304,7 @@
The above is mostly meaningful for kernel developers.
time: This differs from the trace file output. The trace file output
- included an absolute timestamp. The timestamp used by the
+ includes an absolute timestamp. The timestamp used by the
latency_trace file is relative to the start of the trace.
delay: This is just to help catch your eye a bit better. And
@@ -385,7 +386,7 @@
sched_switch
------------
-This tracer simply records schedule switches. Here's an example
+This tracer simply records schedule switches. Here is an example
of how to use it.
# echo sched_switch > /debug/tracing/current_tracer
@@ -421,8 +422,8 @@
is a misnomer since here it represents the wake ups and context
switches.
-The sched_switch only lists the wake ups (represented with '+')
-and context switches ('==>') with the previous task or current
+The sched_switch file only lists the wake ups (represented with '+')
+and context switches ('==>') with the previous task or current task
first followed by the next task or task waking up. The format for both
of these is PID:KERNEL-PRIO:TASK-STATE. Remember that the KERNEL-PRIO
is the inverse of the actual priority with zero (0) being the highest
@@ -437,7 +438,8 @@
R - running : wants to run, may not actually be running
S - sleep : process is waiting to be woken up (handles signals)
- D - deep sleep : process must be woken up (ignores signals)
+ D - disk sleep (uninterruptible sleep) : process must be woken up
+ (ignores signals)
T - stopped : process suspended
t - traced : process is being traced (with something like gdb)
Z - zombie : process waiting to be cleaned up
@@ -447,8 +449,8 @@
ftrace_enabled
--------------
-The following tracers give different output depending on whether
-or not the sysctl ftrace_enabled is set. To set ftrace_enabled,
+The following tracers (listed below) give different output depending
+on whether or not the sysctl ftrace_enabled is set. To set ftrace_enabled,
one can either use the sysctl function or set it via the proc
file system interface.
@@ -475,13 +477,12 @@
kernel know of a new mouse event. The result is a latency with the
reaction time.
-The irqsoff tracer tracks the time interrupts are disabled to the time
-they are re-enabled. When a new maximum latency is hit, it saves off
-the trace so that it may be retrieved at a later time. Every time a
-new maximum in reached, the old saved trace is discarded and the new
-trace is saved.
+The irqsoff tracer tracks the time for which interrupts are disabled.
+When a new maximum latency is hit, the tracer saves the trace leading up
+to that latency point so that every time a new maximum is reached, the old
+saved trace is discarded and the new trace is saved.
-To reset the maximum, echo 0 into tracing_max_latency. Here's an
+To reset the maximum, echo 0 into tracing_max_latency. Here is an
example:
# echo irqsoff > /debug/tracing/current_tracer
@@ -493,14 +494,14 @@
# cat /debug/tracing/latency_trace
# tracer: irqsoff
#
-irqsoff latency trace v1.1.5 on 2.6.26-rc8
+irqsoff latency trace v1.1.5 on 2.6.26
--------------------------------------------------------------------
- latency: 6 us, #3/3, CPU#1 | (M:preempt VP:0, KP:0, SP:0 HP:0 #P:2)
+ latency: 12 us, #3/3, CPU#1 | (M:preempt VP:0, KP:0, SP:0 HP:0 #P:2)
-----------------
- | task: bash-4269 (uid:0 nice:0 policy:0 rt_prio:0)
+ | task: bash-3730 (uid:0 nice:0 policy:0 rt_prio:0)
-----------------
- => started at: copy_page_range
- => ended at: copy_page_range
+ => started at: sys_setpgid
+ => ended at: sys_setpgid
# _------=> CPU#
# / _-----=> irqs-off
@@ -511,21 +512,19 @@
# ||||| delay
# cmd pid ||||| time | caller
# \ / ||||| \ | /
- bash-4269 1...1 0us+: _spin_lock (copy_page_range)
- bash-4269 1...1 7us : _spin_unlock (copy_page_range)
- bash-4269 1...2 7us : trace_preempt_on (copy_page_range)
+ bash-3730 1d... 0us : _write_lock_irq (sys_setpgid)
+ bash-3730 1d..1 1us+: _write_unlock_irq (sys_setpgid)
+ bash-3730 1d..2 14us : trace_hardirqs_on (sys_setpgid)
-vim:ft=help
+Here we see that that we had a latency of 12 microsecs (which is
+very good). The _write_lock_irq in sys_setpgid disabled interrupts.
+The difference between the 12 and the displayed timestamp 14us occurred
+because the clock was incremented between the time of recording the max
+latency and the time of recording the function that had that latency.
-Here we see that that we had a latency of 6 microsecs (which is
-very good). The spin_lock in copy_page_range disabled interrupts.
-The difference between the 6 and the displayed timestamp 7us is
-because the clock must have incremented between the time of recording
-the max latency and recording the function that had that latency.
-
-Note the above had ftrace_enabled not set. If we set the ftrace_enabled,
-we get a much larger output:
+Note the above example had ftrace_enabled not set. If we set the
+ftrace_enabled, we get a much larger output:
# tracer: irqsoff
#
@@ -571,12 +570,10 @@
ls-4339 0d..2 51us : trace_hardirqs_on (__alloc_pages_internal)
-vim:ft=help
-
Here we traced a 50 microsecond latency. But we also see all the
functions that were called during that time. Note that by enabling
-function tracing, we endure an added overhead. This overhead may
+function tracing, we incur an added overhead. This overhead may
extend the latency times. But nevertheless, this trace has provided
some very helpful debugging information.
@@ -590,8 +587,9 @@
priority task.
The preemptoff tracer traces the places that disable preemption.
-Like the irqsoff, it records the maximum latency that preemption
-was disabled. The control of preemptoff is much like the irqsoff.
+Like the irqsoff tracer, it records the maximum latency for which preemption
+was disabled. The control of preemptoff tracer is much like the irqsoff
+tracer.
# echo preemptoff > /debug/tracing/current_tracer
# echo 0 > /debug/tracing/tracing_max_latency
@@ -625,8 +623,6 @@
sshd-4261 0d.s1 30us : trace_preempt_on (__do_softirq)
-vim:ft=help
-
This has some more changes. Preemption was disabled when an interrupt
came in (notice the 'h'), and was enabled while doing a softirq.
(notice the 's'). But we also see that interrupts have been disabled
@@ -694,16 +690,16 @@
set. Here we see that interrupts were disabled the entire time.
The irq_enter code lets us know that we entered an interrupt 'h'.
Before that, the functions being traced still show that it is not
-in an interrupt, but we can see by the functions themselves that
+in an interrupt, but we can see from the functions themselves that
this is not the case.
-Notice that the __do_softirq when called doesn't have a preempt_count.
-It may seem that we missed a preempt enabled. What really happened
-is that the preempt count is held on the threads stack and we
+Notice that __do_softirq when called does not have a preempt_count.
+It may seem that we missed a preempt enabling. What really happened
+is that the preempt count is held on the thread's stack and we
switched to the softirq stack (4K stacks in effect). The code
does not copy the preempt count, but because interrupts are disabled,
-we don't need to worry about it. Having a tracer like this is good
-to let people know what really happens inside the kernel.
+we do not need to worry about it. Having a tracer like this is good
+for letting people know what really happens inside the kernel.
preemptirqsoff
@@ -713,7 +709,7 @@
disabled for the longest times is helpful. But sometimes we would
like to know when either preemption and/or interrupts are disabled.
-The following code:
+Consider the following code:
local_irq_disable();
call_function_with_irqs_off();
@@ -769,12 +765,10 @@
ls-4860 0d.s1 294us : trace_preempt_on (__do_softirq)
-vim:ft=help
-
The trace_hardirqs_off_thunk is called from assembly on x86 when
interrupts are disabled in the assembly code. Without the function
-tracing, we don't know if interrupts were enabled within the preemption
+tracing, we do not know if interrupts were enabled within the preemption
points. We do see that it started with preemption enabled.
Here is a trace with ftrace_enabled set:
@@ -865,19 +859,19 @@
This is a very interesting trace. It started with the preemption of
the ls task. We see that the task had the "need_resched" bit set
-with the 'N' in the trace. Interrupts are disabled in the spin_lock
-and the trace started. We see that a schedule took place to run
+via the 'N' in the trace. Interrupts were disabled before the spin_lock
+at the beginning of the trace. We see that a schedule took place to run
sshd. When the interrupts were enabled, we took an interrupt.
On return from the interrupt handler, the softirq ran. We took another
-interrupt while running the softirq as we see with the capital 'H'.
+interrupt while running the softirq as we see from the capital 'H'.
wakeup
------
-In Real-Time environment it is very important to know the wakeup
-time it takes for the highest priority task that wakes up to the
-time it executes. This is also known as "schedule latency".
+In a Real-Time environment it is very important to know the wakeup
+time it takes for the highest priority task that is woken up to the
+time that it executes. This is also known as "schedule latency".
I stress the point that this is about RT tasks. It is also important
to know the scheduling latency of non-RT tasks, but the average
schedule latency is better for non-RT tasks. Tools like
@@ -926,8 +920,6 @@
<idle>-0 1d..4 4us : schedule (cpu_idle)
-vim:ft=help
-
Running this on an idle system, we see that it only took 4 microseconds
to perform the task switch. Note, since the trace marker in the
@@ -996,15 +988,15 @@
ksoftirq-7 1d..4 50us : schedule (__cond_resched)
The interrupt went off while running ksoftirqd. This task runs at
-SCHED_OTHER. Why didn't we see the 'N' set early? This may be
+SCHED_OTHER. Why did not we see the 'N' set early? This may be
a harmless bug with x86_32 and 4K stacks. On x86_32 with 4K stacks
-configured, the interrupt and softirq runs with their own stack.
+configured, the interrupt and softirq run with their own stack.
Some information is held on the top of the task's stack (need_resched
and preempt_count are both stored there). The setting of the NEED_RESCHED
bit is done directly to the task's stack, but the reading of the
NEED_RESCHED is done by looking at the current stack, which in this case
is the stack for the hard interrupt. This hides the fact that NEED_RESCHED
-has been set. We don't see the 'N' until we switch back to the task's
+has been set. We do not see the 'N' until we switch back to the task's
assigned stack.
ftrace
@@ -1044,14 +1036,14 @@
[...]
-Note: It is sometimes better to enable or disable tracing directly from
-a program, because the buffer may be overflowed by the echo commands
-before you get to the point you want to trace. It is also easier to
-stop the tracing at the point that you hit the part that you are
-interested in. Since the ftrace buffer is a ring buffer with the
-oldest data being overwritten, usually it is sufficient to start the
-tracer with an echo command but have you code stop it. Something
-like the following is usually appropriate for this.
+Note: ftrace uses ring buffers to store the above entries. The newest data
+may overwrite the oldest data. Sometimes using echo to stop the trace
+is not sufficient because the tracing could have overwritten the data
+that you wanted to record. For this reason, it is sometimes better to
+disable tracing directly from a program. This allows you to stop the
+tracing at the point that you hit the part that you are interested in.
+To disable the tracing directly from a C program, something like following
+code snippet can be used:
int trace_fd;
[...]
@@ -1060,20 +1052,26 @@
trace_fd = open("/debug/tracing/tracing_enabled", O_WRONLY);
[...]
if (condition_hit()) {
- write(trace_fd, "0", 1);
+ write(trace_fd, "0", 1);
}
[...]
}
+Note: Here we hard coded the path name. The debugfs mount is not
+guaranteed to be at /debug (and is more commonly at /sys/kernel/debug).
+For simple one time traces, the above is sufficent. For anything else,
+a search through /proc/mounts may be needed to find where the debugfs
+file-system is mounted.
dynamic ftrace
--------------
-If CONFIG_DYNAMIC_FTRACE is set, then the system will run with
+If CONFIG_DYNAMIC_FTRACE is set, the system will run with
virtually no overhead when function tracing is disabled. The way
this works is the mcount function call (placed at the start of
every kernel function, produced by the -pg switch in gcc), starts
-of pointing to a simple return.
+of pointing to a simple return. (Enabling FTRACE will include the
+-pg switch in the compiling of the kernel.)
When dynamic ftrace is initialized, it calls kstop_machine to make
the machine act like a uniprocessor so that it can freely modify code
@@ -1086,15 +1084,15 @@
kstop_machine if new functions have been recorded. The ftraced thread
will change all calls to mcount to "nop". Just calling mcount
and having mcount return has shown a 10% overhead. By converting
-it to a nop, there is no recordable overhead to the system.
+it to a nop, there is no measurable overhead to the system.
One special side-effect to the recording of the functions being
-traced, is that we can now selectively choose which functions we
-want to trace and which ones we want the mcount calls to remain as
+traced is that we can now selectively choose which functions we
+wish to trace and which ones we want the mcount calls to remain as
nops.
Two files are used, one for enabling and one for disabling the tracing
-of recorded functions. They are:
+of specified functions. They are:
set_ftrace_filter
@@ -1116,7 +1114,7 @@
mutex_lock
[...]
-If I'm only interested in sys_nanosleep and hrtimer_interrupt:
+If I am only interested in sys_nanosleep and hrtimer_interrupt:
# echo sys_nanosleep hrtimer_interrupt \
> /debug/tracing/set_ftrace_filter
@@ -1133,21 +1131,21 @@
usleep-4134 [00] 1317.070111: sys_nanosleep <-syscall_call
<idle>-0 [00] 1317.070115: hrtimer_interrupt <-smp_apic_timer_interrupt
-To see what functions are being traced, you can cat the file:
+To see which functions are being traced, you can cat the file:
# cat /debug/tracing/set_ftrace_filter
hrtimer_interrupt
sys_nanosleep
-Perhaps this isn't enough. The filters also allow simple wild cards.
+Perhaps this is not enough. The filters also allow simple wild cards.
Only the following are currently available
<match>* - will match functions that begin with <match>
*<match> - will match functions that end with <match>
*<match>* - will match functions that have <match> in it
-Thats all the wild cards that are allowed.
+These are the only wild cards which are supported.
<match>*<match> will not work.
@@ -1258,15 +1256,15 @@
it simply goes back to sleep. But if there are some, it will call
kstop_machine to convert the calls to nops.
-There may be a case that you do not want this added latency.
+There may be a case in which you do not want this added latency.
Perhaps you are doing some audio recording and this activity might
cause skips in the playback. There is an interface to disable
-and enable the ftraced kernel thread.
+and enable the "ftraced" kernel thread.
# echo 0 > /debug/tracing/ftraced_enabled
-This will disable the calling of the kstop_machine to update the
-mcount calls to nops. Remember that there's a large overhead
+This will disable the calling of kstop_machine to update the
+mcount calls to nops. Remember that there is a large overhead
to calling mcount. Without this kernel thread, that overhead will
exist.
@@ -1282,8 +1280,8 @@
trace_pipe
----------
-The trace_pipe outputs the same as trace, but the effect on the
-tracing is different. Every read from trace_pipe is consumed.
+The trace_pipe outputs the same content as the trace file, but the effect
+on the tracing is different. Every read from trace_pipe is consumed.
This means that subsequent reads will be different. The trace
is live.
@@ -1313,7 +1311,7 @@
bash-4043 [00] 41.267111: select_task_rq_rt <-try_to_wake_up
-Note, reading the trace_pipe will block until more input is added.
+Note, reading the trace_pipe file will block until more input is added.
By changing the tracer, trace_pipe will issue an EOF. We needed
to set the ftrace tracer _before_ cating the trace_pipe file.
@@ -1322,7 +1320,7 @@
-------------
Having too much or not enough data can be troublesome in diagnosing
-some issue in the kernel. The file trace_entries is used to modify
+an issue in the kernel. The file trace_entries is used to modify
the size of the internal trace buffers. The number listed
is the number of entries that can be recorded per CPU. To know
the full size, multiply the number of possible CPUS with the
@@ -1332,7 +1330,8 @@
65620
Note, to modify this, you must have tracing completely disabled. To do that,
-echo "none" into the current_tracer.
+echo "none" into the current_tracer. If the current_tracer is not set
+to "none", an EINVAL error will be returned.
# echo none > /debug/tracing/current_tracer
# echo 100000 > /debug/tracing/trace_entries
@@ -1341,18 +1340,18 @@
Notice that we echoed in 100,000 but the size is 100,045. The entries
-are held by individual pages. It allocates the number of pages it takes
+are held in individual pages. It allocates the number of pages it takes
to fulfill the request. If more entries may fit on the last page
-it will add them.
+then they will be added.
# echo 1 > /debug/tracing/trace_entries
# cat /debug/tracing/trace_entries
85
-This shows us that 85 entries can fit on a single page.
+This shows us that 85 entries can fit in a single page.
-The number of pages that will be allocated is a percentage of available
-memory. Allocating too much will produce an error.
+The number of pages which will be allocated is limited to a percentage
+of available memory. Allocating too much will produce an error.
# echo 1000000000000 > /debug/tracing/trace_entries
-bash: echo: write error: Cannot allocate memory
diff --git a/Documentation/i2c/chips/max6875 b/Documentation/i2c/chips/max6875
index a0cd8af..10ca43c 100644
--- a/Documentation/i2c/chips/max6875
+++ b/Documentation/i2c/chips/max6875
@@ -49,7 +49,7 @@
The MAX6874/MAX6875 ignores address bit 0, so this driver attaches to multiple
addresses. For example, for address 0x50, it also reserves 0x51.
-The even-address instance is called 'max6875', the odd one is 'max6875 subclient'.
+The even-address instance is called 'max6875', the odd one is 'dummy'.
Programming the chip using i2c-dev
diff --git a/Documentation/i2c/chips/pca9539 b/Documentation/i2c/chips/pca9539
index 1d81c53..6aff890 100644
--- a/Documentation/i2c/chips/pca9539
+++ b/Documentation/i2c/chips/pca9539
@@ -7,7 +7,7 @@
Supported chips:
* Philips PCA9539
Prefix: 'pca9539'
- Addresses scanned: 0x74 - 0x77
+ Addresses scanned: none
Datasheet:
http://www.semiconductors.philips.com/acrobat/datasheets/PCA9539_2.pdf
@@ -23,6 +23,14 @@
The 16 lines are split between two bytes.
+Detection
+---------
+
+The PCA9539 is difficult to detect and not commonly found in PC machines,
+so you have to pass the I2C bus and address of the installed PCA9539
+devices explicitly to the driver at load time via the force=... parameter.
+
+
Sysfs entries
-------------
diff --git a/Documentation/i2c/chips/pcf8574 b/Documentation/i2c/chips/pcf8574
index 5c1ad13..235815c 100644
--- a/Documentation/i2c/chips/pcf8574
+++ b/Documentation/i2c/chips/pcf8574
@@ -4,13 +4,13 @@
Supported chips:
* Philips PCF8574
Prefix: 'pcf8574'
- Addresses scanned: I2C 0x20 - 0x27
+ Addresses scanned: none
Datasheet: Publicly available at the Philips Semiconductors website
http://www.semiconductors.philips.com/pip/PCF8574P.html
* Philips PCF8574A
Prefix: 'pcf8574a'
- Addresses scanned: I2C 0x38 - 0x3f
+ Addresses scanned: none
Datasheet: Publicly available at the Philips Semiconductors website
http://www.semiconductors.philips.com/pip/PCF8574P.html
@@ -38,12 +38,10 @@
Accessing PCF8574(A) via /sys interface
-------------------------------------
-! Be careful !
The PCF8574(A) is plainly impossible to detect ! Stupid chip.
-So every chip with address in the interval [20..27] and [38..3f] are
-detected as PCF8574(A). If you have other chips in this address
-range, the workaround is to load this module after the one
-for your others chips.
+So, you have to pass the I2C bus and address of the installed PCF857A
+and PCF8574A devices explicitly to the driver at load time via the
+force=... parameter.
On detection (i.e. insmod, modprobe et al.), directories are being
created for each detected PCF8574(A):
diff --git a/Documentation/i2c/chips/pcf8575 b/Documentation/i2c/chips/pcf8575
index 25f5698..40b268e 100644
--- a/Documentation/i2c/chips/pcf8575
+++ b/Documentation/i2c/chips/pcf8575
@@ -40,12 +40,9 @@
---------
There is no method known to detect whether a chip on a given I2C address is
-a PCF8575 or whether it is any other I2C device. So there are two alternatives
-to let the driver find the installed PCF8575 devices:
-- Load this driver after any other I2C driver for I2C devices with addresses
- in the range 0x20 .. 0x27.
-- Pass the I2C bus and address of the installed PCF8575 devices explicitly to
- the driver at load time via the probe=... or force=... parameters.
+a PCF8575 or whether it is any other I2C device, so you have to pass the I2C
+bus and address of the installed PCF8575 devices explicitly to the driver at
+load time via the force=... parameter.
/sys interface
--------------
diff --git a/Documentation/kprobes.txt b/Documentation/kprobes.txt
index 6877e71..a79633d 100644
--- a/Documentation/kprobes.txt
+++ b/Documentation/kprobes.txt
@@ -172,6 +172,7 @@
- ia64 (Does not support probes on instruction slot1.)
- sparc64 (Return probes not yet implemented.)
- arm
+- ppc
3. Configuring Kprobes
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 1d2a7725..de2e5c0 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -41,23 +41,12 @@
VI - System-on-a-chip devices and nodes
1) Defining child nodes of an SOC
2) Representing devices without a current OF specification
- a) MDIO IO device
- b) Gianfar-compatible ethernet nodes
- c) PHY nodes
- d) Interrupt controllers
- e) I2C
- f) Freescale SOC USB controllers
- g) Freescale SOC SEC Security Engines
- h) Board Control and Status (BCSR)
- i) Freescale QUICC Engine module (QE)
- j) CFI or JEDEC memory-mapped NOR flash
- k) Global Utilities Block
- l) Freescale Communications Processor Module
- m) Chipselect/Local Bus
- n) 4xx/Axon EMAC ethernet nodes
- o) Xilinx IP cores
- p) Freescale Synchronous Serial Interface
- q) USB EHCI controllers
+ a) PHY nodes
+ b) Interrupt controllers
+ c) CFI or JEDEC memory-mapped NOR flash
+ d) 4xx/Axon EMAC ethernet nodes
+ e) Xilinx IP cores
+ f) USB EHCI controllers
VII - Marvell Discovery mv64[345]6x System Controller chips
1) The /system-controller node
@@ -1246,80 +1235,7 @@
defined; this list will expand as more and more SOC-containing
platforms are moved over to use the flattened-device-tree model.
- a) MDIO IO device
-
- The MDIO is a bus to which the PHY devices are connected. For each
- device that exists on this bus, a child node should be created. See
- the definition of the PHY node below for an example of how to define
- a PHY.
-
- Required properties:
- - reg : Offset and length of the register set for the device
- - compatible : Should define the compatible device type for the
- mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
-
- Example:
-
- mdio@24520 {
- reg = <24520 20>;
- compatible = "fsl,gianfar-mdio";
-
- ethernet-phy@0 {
- ......
- };
- };
-
-
- b) Gianfar-compatible ethernet nodes
-
- Required properties:
-
- - device_type : Should be "network"
- - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
- - compatible : Should be "gianfar"
- - reg : Offset and length of the register set for the device
- - mac-address : List of bytes representing the ethernet address of
- this controller
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
- - phy-handle : The phandle for the PHY connected to this ethernet
- controller.
- - fixed-link : <a b c d e> where a is emulated phy id - choose any,
- but unique to the all specified fixed-links, b is duplex - 0 half,
- 1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
- pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
-
- Recommended properties:
-
- - phy-connection-type : a string naming the controller/PHY interface type,
- i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",
- "tbi", or "rtbi". This property is only really needed if the connection
- is of type "rgmii-id", as all other connection types are detected by
- hardware.
-
-
- Example:
-
- ethernet@24000 {
- #size-cells = <0>;
- device_type = "network";
- model = "TSEC";
- compatible = "gianfar";
- reg = <24000 1000>;
- mac-address = [ 00 E0 0C 00 73 00 ];
- interrupts = <d 3 e 3 12 3>;
- interrupt-parent = <40000>;
- phy-handle = <2452000>
- };
-
-
-
- c) PHY nodes
+ a) PHY nodes
Required properties:
@@ -1347,7 +1263,7 @@
};
- d) Interrupt controllers
+ b) Interrupt controllers
Some SOC devices contain interrupt controllers that are different
from the standard Open PIC specification. The SOC device nodes for
@@ -1360,491 +1276,14 @@
pic@40000 {
linux,phandle = <40000>;
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
reg = <40000 40000>;
- built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
-
- e) I2C
-
- Required properties :
-
- - device_type : Should be "i2c"
- - reg : Offset and length of the register set for the device
-
- Recommended properties :
-
- - compatible : Should be "fsl-i2c" for parts compatible with
- Freescale I2C specifications.
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
- - dfsrr : boolean; if defined, indicates that this I2C device has
- a digital filter sampling rate register
- - fsl5200-clocking : boolean; if defined, indicated that this device
- uses the FSL 5200 clocking mechanism.
-
- Example :
-
- i2c@3000 {
- interrupt-parent = <40000>;
- interrupts = <1b 3>;
- reg = <3000 18>;
- device_type = "i2c";
- compatible = "fsl-i2c";
- dfsrr;
- };
-
-
- f) Freescale SOC USB controllers
-
- The device node for a USB controller that is part of a Freescale
- SOC is as described in the document "Open Firmware Recommended
- Practice : Universal Serial Bus" with the following modifications
- and additions :
-
- Required properties :
- - compatible : Should be "fsl-usb2-mph" for multi port host USB
- controllers, or "fsl-usb2-dr" for dual role USB controllers
- - phy_type : For multi port host USB controllers, should be one of
- "ulpi", or "serial". For dual role USB controllers, should be
- one of "ulpi", "utmi", "utmi_wide", or "serial".
- - reg : Offset and length of the register set for the device
- - port0 : boolean; if defined, indicates port0 is connected for
- fsl-usb2-mph compatible controllers. Either this property or
- "port1" (or both) must be defined for "fsl-usb2-mph" compatible
- controllers.
- - port1 : boolean; if defined, indicates port1 is connected for
- fsl-usb2-mph compatible controllers. Either this property or
- "port0" (or both) must be defined for "fsl-usb2-mph" compatible
- controllers.
- - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
- controllers. Can be "host", "peripheral", or "otg". Default to
- "host" if not defined for backward compatibility.
-
- Recommended properties :
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
-
- Example multi port host USB controller device node :
- usb@22000 {
- compatible = "fsl-usb2-mph";
- reg = <22000 1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupt-parent = <700>;
- interrupts = <27 1>;
- phy_type = "ulpi";
- port0;
- port1;
- };
-
- Example dual role USB controller device node :
- usb@23000 {
- compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupt-parent = <700>;
- interrupts = <26 1>;
- dr_mode = "otg";
- phy = "ulpi";
- };
-
-
- g) Freescale SOC SEC Security Engines
-
- Required properties:
-
- - device_type : Should be "crypto"
- - model : Model of the device. Should be "SEC1" or "SEC2"
- - compatible : Should be "talitos"
- - reg : Offset and length of the register set for the device
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
- - num-channels : An integer representing the number of channels
- available.
- - channel-fifo-len : An integer representing the number of
- descriptor pointers each channel fetch fifo can hold.
- - exec-units-mask : The bitmask representing what execution units
- (EUs) are available. It's a single 32-bit cell. EU information
- should be encoded following the SEC's Descriptor Header Dword
- EU_SEL0 field documentation, i.e. as follows:
-
- bit 0 = reserved - should be 0
- bit 1 = set if SEC has the ARC4 EU (AFEU)
- bit 2 = set if SEC has the DES/3DES EU (DEU)
- bit 3 = set if SEC has the message digest EU (MDEU)
- bit 4 = set if SEC has the random number generator EU (RNG)
- bit 5 = set if SEC has the public key EU (PKEU)
- bit 6 = set if SEC has the AES EU (AESU)
- bit 7 = set if SEC has the Kasumi EU (KEU)
-
- bits 8 through 31 are reserved for future SEC EUs.
-
- - descriptor-types-mask : The bitmask representing what descriptors
- are available. It's a single 32-bit cell. Descriptor type
- information should be encoded following the SEC's Descriptor
- Header Dword DESC_TYPE field documentation, i.e. as follows:
-
- bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
- bit 1 = set if SEC supports the ipsec_esp descriptor type
- bit 2 = set if SEC supports the common_nonsnoop desc. type
- bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
- bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
- bit 5 = set if SEC supports the srtp descriptor type
- bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
- bit 7 = set if SEC supports the pkeu_assemble descriptor type
- bit 8 = set if SEC supports the aesu_key_expand_output desc.type
- bit 9 = set if SEC supports the pkeu_ptmul descriptor type
- bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
- bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
-
- ..and so on and so forth.
-
- Example:
-
- /* MPC8548E */
- crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <1d 3>;
- interrupt-parent = <40000>;
- num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <000000fe>;
- descriptor-types-mask = <012b0ebf>;
- };
-
- h) Board Control and Status (BCSR)
-
- Required properties:
-
- - device_type : Should be "board-control"
- - reg : Offset and length of the register set for the device
-
- Example:
-
- bcsr@f8000000 {
- device_type = "board-control";
- reg = <f8000000 8000>;
- };
-
- i) Freescale QUICC Engine module (QE)
- This represents qe module that is installed on PowerQUICC II Pro.
-
- NOTE: This is an interim binding; it should be updated to fit
- in with the CPM binding later in this document.
-
- Basically, it is a bus of devices, that could act more or less
- as a complete entity (UCC, USB etc ). All of them should be siblings on
- the "root" qe node, using the common properties from there.
- The description below applies to the qe of MPC8360 and
- more nodes and properties would be extended in the future.
-
- i) Root QE device
-
- Required properties:
- - compatible : should be "fsl,qe";
- - model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
- - reg : offset and length of the device registers.
- - bus-frequency : the clock frequency for QUICC Engine.
-
- Recommended properties
- - brg-frequency : the internal clock source frequency for baud-rate
- generators in Hz.
-
- Example:
- qe@e0100000 {
- #address-cells = <1>;
- #size-cells = <1>;
- #interrupt-cells = <2>;
- compatible = "fsl,qe";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
- brg-frequency = <0>;
- bus-frequency = <179A7B00>;
- }
-
-
- ii) SPI (Serial Peripheral Interface)
-
- Required properties:
- - cell-index : SPI controller index.
- - compatible : should be "fsl,spi".
- - mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
- - reg : Offset and length of the register set for the device
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
-
- Example:
- spi@4c0 {
- cell-index = <0>;
- compatible = "fsl,spi";
- reg = <4c0 40>;
- interrupts = <82 0>;
- interrupt-parent = <700>;
- mode = "cpu";
- };
-
-
- iii) USB (Universal Serial Bus Controller)
-
- Required properties:
- - compatible : could be "qe_udc" or "fhci-hcd".
- - mode : the could be "host" or "slave".
- - reg : Offset and length of the register set for the device
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
-
- Example(slave):
- usb@6c0 {
- compatible = "qe_udc";
- reg = <6c0 40>;
- interrupts = <8b 0>;
- interrupt-parent = <700>;
- mode = "slave";
- };
-
-
- iv) UCC (Unified Communications Controllers)
-
- Required properties:
- - device_type : should be "network", "hldc", "uart", "transparent"
- "bisync", "atm", or "serial".
- - compatible : could be "ucc_geth" or "fsl_atm" and so on.
- - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
- - reg : Offset and length of the register set for the device
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and level
- information for the interrupt. This should be encoded based on
- the information in section 2) depending on the type of interrupt
- controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
- - pio-handle : The phandle for the Parallel I/O port configuration.
- - port-number : for UART drivers, the port number to use, between 0 and 3.
- This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
- The port number is added to the minor number of the device. Unlike the
- CPM UART driver, the port-number is required for the QE UART driver.
- - soft-uart : for UART drivers, if specified this means the QE UART device
- driver should use "Soft-UART" mode, which is needed on some SOCs that have
- broken UART hardware. Soft-UART is provided via a microcode upload.
- - rx-clock-name: the UCC receive clock source
- "none": clock source is disabled
- "brg1" through "brg16": clock source is BRG1-BRG16, respectively
- "clk1" through "clk24": clock source is CLK1-CLK24, respectively
- - tx-clock-name: the UCC transmit clock source
- "none": clock source is disabled
- "brg1" through "brg16": clock source is BRG1-BRG16, respectively
- "clk1" through "clk24": clock source is CLK1-CLK24, respectively
- The following two properties are deprecated. rx-clock has been replaced
- with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
- Drivers that currently use the deprecated properties should continue to
- do so, in order to support older device trees, but they should be updated
- to check for the new properties first.
- - rx-clock : represents the UCC receive clock source.
- 0x00 : clock source is disabled;
- 0x1~0x10 : clock source is BRG1~BRG16 respectively;
- 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
- - tx-clock: represents the UCC transmit clock source;
- 0x00 : clock source is disabled;
- 0x1~0x10 : clock source is BRG1~BRG16 respectively;
- 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
-
- Required properties for network device_type:
- - mac-address : list of bytes representing the ethernet address.
- - phy-handle : The phandle for the PHY connected to this controller.
-
- Recommended properties:
- - phy-connection-type : a string naming the controller/PHY interface type,
- i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
- Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
- "tbi", or "rtbi".
-
- Example:
- ucc@2000 {
- device_type = "network";
- compatible = "ucc_geth";
- cell-index = <1>;
- reg = <2000 200>;
- interrupts = <a0 0>;
- interrupt-parent = <700>;
- mac-address = [ 00 04 9f 00 23 23 ];
- rx-clock = "none";
- tx-clock = "clk9";
- phy-handle = <212000>;
- phy-connection-type = "gmii";
- pio-handle = <140001>;
- };
-
-
- v) Parallel I/O Ports
-
- This node configures Parallel I/O ports for CPUs with QE support.
- The node should reside in the "soc" node of the tree. For each
- device that using parallel I/O ports, a child node should be created.
- See the definition of the Pin configuration nodes below for more
- information.
-
- Required properties:
- - device_type : should be "par_io".
- - reg : offset to the register set and its length.
- - num-ports : number of Parallel I/O ports
-
- Example:
- par_io@1400 {
- reg = <1400 100>;
- #address-cells = <1>;
- #size-cells = <0>;
- device_type = "par_io";
- num-ports = <7>;
- ucc_pin@01 {
- ......
- };
-
-
- vi) Pin configuration nodes
-
- Required properties:
- - linux,phandle : phandle of this node; likely referenced by a QE
- device.
- - pio-map : array of pin configurations. Each pin is defined by 6
- integers. The six numbers are respectively: port, pin, dir,
- open_drain, assignment, has_irq.
- - port : port number of the pin; 0-6 represent port A-G in UM.
- - pin : pin number in the port.
- - dir : direction of the pin, should encode as follows:
-
- 0 = The pin is disabled
- 1 = The pin is an output
- 2 = The pin is an input
- 3 = The pin is I/O
-
- - open_drain : indicates the pin is normal or wired-OR:
-
- 0 = The pin is actively driven as an output
- 1 = The pin is an open-drain driver. As an output, the pin is
- driven active-low, otherwise it is three-stated.
-
- - assignment : function number of the pin according to the Pin Assignment
- tables in User Manual. Each pin can have up to 4 possible functions in
- QE and two options for CPM.
- - has_irq : indicates if the pin is used as source of external
- interrupts.
-
- Example:
- ucc_pin@01 {
- linux,phandle = <140001>;
- pio-map = <
- /* port pin dir open_drain assignment has_irq */
- 0 3 1 0 1 0 /* TxD0 */
- 0 4 1 0 1 0 /* TxD1 */
- 0 5 1 0 1 0 /* TxD2 */
- 0 6 1 0 1 0 /* TxD3 */
- 1 6 1 0 3 0 /* TxD4 */
- 1 7 1 0 1 0 /* TxD5 */
- 1 9 1 0 2 0 /* TxD6 */
- 1 a 1 0 2 0 /* TxD7 */
- 0 9 2 0 1 0 /* RxD0 */
- 0 a 2 0 1 0 /* RxD1 */
- 0 b 2 0 1 0 /* RxD2 */
- 0 c 2 0 1 0 /* RxD3 */
- 0 d 2 0 1 0 /* RxD4 */
- 1 1 2 0 2 0 /* RxD5 */
- 1 0 2 0 2 0 /* RxD6 */
- 1 4 2 0 2 0 /* RxD7 */
- 0 7 1 0 1 0 /* TX_EN */
- 0 8 1 0 1 0 /* TX_ER */
- 0 f 2 0 1 0 /* RX_DV */
- 0 10 2 0 1 0 /* RX_ER */
- 0 0 2 0 1 0 /* RX_CLK */
- 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
- 2 8 2 0 1 0>; /* GTX125 - CLK9 */
- };
-
- vii) Multi-User RAM (MURAM)
-
- Required properties:
- - compatible : should be "fsl,qe-muram", "fsl,cpm-muram".
- - mode : the could be "host" or "slave".
- - ranges : Should be defined as specified in 1) to describe the
- translation of MURAM addresses.
- - data-only : sub-node which defines the address area under MURAM
- bus that can be allocated as data/parameter
-
- Example:
-
- muram@10000 {
- compatible = "fsl,qe-muram", "fsl,cpm-muram";
- ranges = <0 00010000 0000c000>;
-
- data-only@0{
- compatible = "fsl,qe-muram-data",
- "fsl,cpm-muram-data";
- reg = <0 c000>;
- };
- };
-
- viii) Uploaded QE firmware
-
- If a new firwmare has been uploaded to the QE (usually by the
- boot loader), then a 'firmware' child node should be added to the QE
- node. This node provides information on the uploaded firmware that
- device drivers may need.
-
- Required properties:
- - id: The string name of the firmware. This is taken from the 'id'
- member of the qe_firmware structure of the uploaded firmware.
- Device drivers can search this string to determine if the
- firmware they want is already present.
- - extended-modes: The Extended Modes bitfield, taken from the
- firmware binary. It is a 64-bit number represented
- as an array of two 32-bit numbers.
- - virtual-traps: The virtual traps, taken from the firmware binary.
- It is an array of 8 32-bit numbers.
-
- Example:
-
- firmware {
- id = "Soft-UART";
- extended-modes = <0 0>;
- virtual-traps = <0 0 0 0 0 0 0 0>;
- }
-
- j) CFI or JEDEC memory-mapped NOR flash
+ c) CFI or JEDEC memory-mapped NOR flash
Flash chips (Memory Technology Devices) are often used for solid state
file systems on embedded devices.
@@ -1908,268 +1347,7 @@
};
};
- k) Global Utilities Block
-
- The global utilities block controls power management, I/O device
- enabling, power-on-reset configuration monitoring, general-purpose
- I/O signal configuration, alternate function selection for multiplexed
- signals, and clock control.
-
- Required properties:
-
- - compatible : Should define the compatible device type for
- global-utilities.
- - reg : Offset and length of the register set for the device.
-
- Recommended properties:
-
- - fsl,has-rstcr : Indicates that the global utilities register set
- contains a functioning "reset control register" (i.e. the board
- is wired to reset upon setting the HRESET_REQ bit in this register).
-
- Example:
-
- global-utilities@e0000 { /* global utilities block */
- compatible = "fsl,mpc8548-guts";
- reg = <e0000 1000>;
- fsl,has-rstcr;
- };
-
- l) Freescale Communications Processor Module
-
- NOTE: This is an interim binding, and will likely change slightly,
- as more devices are supported. The QE bindings especially are
- incomplete.
-
- i) Root CPM node
-
- Properties:
- - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
- - reg : A 48-byte region beginning with CPCR.
-
- Example:
- cpm@119c0 {
- #address-cells = <1>;
- #size-cells = <1>;
- #interrupt-cells = <2>;
- compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
- reg = <119c0 30>;
- }
-
- ii) Properties common to mulitple CPM/QE devices
-
- - fsl,cpm-command : This value is ORed with the opcode and command flag
- to specify the device on which a CPM command operates.
-
- - fsl,cpm-brg : Indicates which baud rate generator the device
- is associated with. If absent, an unused BRG
- should be dynamically allocated. If zero, the
- device uses an external clock rather than a BRG.
-
- - reg : Unless otherwise specified, the first resource represents the
- scc/fcc/ucc registers, and the second represents the device's
- parameter RAM region (if it has one).
-
- iii) Serial
-
- Currently defined compatibles:
- - fsl,cpm1-smc-uart
- - fsl,cpm2-smc-uart
- - fsl,cpm1-scc-uart
- - fsl,cpm2-scc-uart
- - fsl,qe-uart
-
- Example:
-
- serial@11a00 {
- device_type = "serial";
- compatible = "fsl,mpc8272-scc-uart",
- "fsl,cpm2-scc-uart";
- reg = <11a00 20 8000 100>;
- interrupts = <28 8>;
- interrupt-parent = <&PIC>;
- fsl,cpm-brg = <1>;
- fsl,cpm-command = <00800000>;
- };
-
- iii) Network
-
- Currently defined compatibles:
- - fsl,cpm1-scc-enet
- - fsl,cpm2-scc-enet
- - fsl,cpm1-fec-enet
- - fsl,cpm2-fcc-enet (third resource is GFEMR)
- - fsl,qe-enet
-
- Example:
-
- ethernet@11300 {
- device_type = "network";
- compatible = "fsl,mpc8272-fcc-enet",
- "fsl,cpm2-fcc-enet";
- reg = <11300 20 8400 100 11390 1>;
- local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8>;
- interrupt-parent = <&PIC>;
- phy-handle = <&PHY0>;
- fsl,cpm-command = <12000300>;
- };
-
- iv) MDIO
-
- Currently defined compatibles:
- fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
- fsl,cpm2-mdio-bitbang (reg is port C registers)
-
- Properties for fsl,cpm2-mdio-bitbang:
- fsl,mdio-pin : pin of port C controlling mdio data
- fsl,mdc-pin : pin of port C controlling mdio clock
-
- Example:
-
- mdio@10d40 {
- device_type = "mdio";
- compatible = "fsl,mpc8272ads-mdio-bitbang",
- "fsl,mpc8272-mdio-bitbang",
- "fsl,cpm2-mdio-bitbang";
- reg = <10d40 14>;
- #address-cells = <1>;
- #size-cells = <0>;
- fsl,mdio-pin = <12>;
- fsl,mdc-pin = <13>;
- };
-
- v) Baud Rate Generators
-
- Currently defined compatibles:
- fsl,cpm-brg
- fsl,cpm1-brg
- fsl,cpm2-brg
-
- Properties:
- - reg : There may be an arbitrary number of reg resources; BRG
- numbers are assigned to these in order.
- - clock-frequency : Specifies the base frequency driving
- the BRG.
-
- Example:
-
- brg@119f0 {
- compatible = "fsl,mpc8272-brg",
- "fsl,cpm2-brg",
- "fsl,cpm-brg";
- reg = <119f0 10 115f0 10>;
- clock-frequency = <d#25000000>;
- };
-
- vi) Interrupt Controllers
-
- Currently defined compatibles:
- - fsl,cpm1-pic
- - only one interrupt cell
- - fsl,pq1-pic
- - fsl,cpm2-pic
- - second interrupt cell is level/sense:
- - 2 is falling edge
- - 8 is active low
-
- Example:
-
- interrupt-controller@10c00 {
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <10c00 80>;
- compatible = "mpc8272-pic", "fsl,cpm2-pic";
- };
-
- vii) USB (Universal Serial Bus Controller)
-
- Properties:
- - compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb"
-
- Example:
- usb@11bc0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,cpm2-usb";
- reg = <11b60 18 8b00 100>;
- interrupts = <b 8>;
- interrupt-parent = <&PIC>;
- fsl,cpm-command = <2e600000>;
- };
-
- viii) Multi-User RAM (MURAM)
-
- The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
-
- Ranges must be set up subject to the following restrictions:
-
- - Children's reg nodes must be offsets from the start of all muram, even
- if the user-data area does not begin at zero.
- - If multiple range entries are used, the difference between the parent
- address and the child address must be the same in all, so that a single
- mapping can cover them all while maintaining the ability to determine
- CPM-side offsets with pointer subtraction. It is recommended that
- multiple range entries not be used.
- - A child address of zero must be translatable, even if no reg resources
- contain it.
-
- A child "data" node must exist, compatible with "fsl,cpm-muram-data", to
- indicate the portion of muram that is usable by the OS for arbitrary
- purposes. The data node may have an arbitrary number of reg resources,
- all of which contribute to the allocatable muram pool.
-
- Example, based on mpc8272:
-
- muram@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0 10000>;
-
- data@0 {
- compatible = "fsl,cpm-muram-data";
- reg = <0 2000 9800 800>;
- };
- };
-
- m) Chipselect/Local Bus
-
- Properties:
- - name : Should be localbus
- - #address-cells : Should be either two or three. The first cell is the
- chipselect number, and the remaining cells are the
- offset into the chipselect.
- - #size-cells : Either one or two, depending on how large each chipselect
- can be.
- - ranges : Each range corresponds to a single chipselect, and cover
- the entire access window as configured.
-
- Example:
- localbus@f0010100 {
- compatible = "fsl,mpc8272-localbus",
- "fsl,pq2-localbus";
- #address-cells = <2>;
- #size-cells = <1>;
- reg = <f0010100 40>;
-
- ranges = <0 0 fe000000 02000000
- 1 0 f4500000 00008000>;
-
- flash@0,0 {
- compatible = "jedec-flash";
- reg = <0 0 2000000>;
- bank-width = <4>;
- device-width = <1>;
- };
-
- board-control@1,0 {
- reg = <1 0 20>;
- compatible = "fsl,mpc8272ads-bcsr";
- };
- };
-
-
- n) 4xx/Axon EMAC ethernet nodes
+ d) 4xx/Axon EMAC ethernet nodes
The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
the Axon bridge. To operate this needs to interact with a ths
@@ -2317,7 +1495,7 @@
available.
For Axon: 0x0000012a
- o) Xilinx IP cores
+ e) Xilinx IP cores
The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
in Xilinx Spartan and Virtex FPGAs. The devices cover the whole range
@@ -2611,206 +1789,7 @@
- reg-offset : A value of 3 is required
- reg-shift : A value of 2 is required
-
- p) Freescale Synchronous Serial Interface
-
- The SSI is a serial device that communicates with audio codecs. It can
- be programmed in AC97, I2S, left-justified, or right-justified modes.
-
- Required properties:
- - compatible : compatible list, containing "fsl,ssi"
- - cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on
- - reg : offset and length of the register set for the device
- - interrupts : <a b> where a is the interrupt number and b is a
- field that represents an encoding of the sense and
- level information for the interrupt. This should be
- encoded based on the information in section 2)
- depending on the type of interrupt controller you
- have.
- - interrupt-parent : the phandle for the interrupt controller that
- services interrupts for this device.
- - fsl,mode : the operating mode for the SSI interface
- "i2s-slave" - I2S mode, SSI is clock slave
- "i2s-master" - I2S mode, SSI is clock master
- "lj-slave" - left-justified mode, SSI is clock slave
- "lj-master" - l.j. mode, SSI is clock master
- "rj-slave" - right-justified mode, SSI is clock slave
- "rj-master" - r.j., SSI is clock master
- "ac97-slave" - AC97 mode, SSI is clock slave
- "ac97-master" - AC97 mode, SSI is clock master
-
- Optional properties:
- - codec-handle : phandle to a 'codec' node that defines an audio
- codec connected to this SSI. This node is typically
- a child of an I2C or other control node.
-
- Child 'codec' node required properties:
- - compatible : compatible list, contains the name of the codec
-
- Child 'codec' node optional properties:
- - clock-frequency : The frequency of the input clock, which typically
- comes from an on-board dedicated oscillator.
-
- * Freescale 83xx DMA Controller
-
- Freescale PowerPC 83xx have on chip general purpose DMA controllers.
-
- Required properties:
-
- - compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-dma", where CHIP is the processor
- (mpc8349, mpc8360, etc.) and the second is
- "fsl,elo-dma"
- - reg : <registers mapping for DMA general status reg>
- - ranges : Should be defined as specified in 1) to describe the
- DMA controller channels.
- - cell-index : controller index. 0 for controller @ 0x8100
- - interrupts : <interrupt mapping for DMA IRQ>
- - interrupt-parent : optional, if needed for interrupt mapping
-
-
- - DMA channel nodes:
- - compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-dma-channel", where CHIP is the processor
- (mpc8349, mpc8350, etc.) and the second is
- "fsl,elo-dma-channel"
- - reg : <registers mapping for channel>
- - cell-index : dma channel index starts at 0.
-
- Optional properties:
- - interrupts : <interrupt mapping for DMA channel IRQ>
- (on 83xx this is expected to be identical to
- the interrupts property of the parent node)
- - interrupt-parent : optional, if needed for interrupt mapping
-
- Example:
- dma@82a8 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
- reg = <82a8 4>;
- ranges = <0 8100 1a4>;
- interrupt-parent = <&ipic>;
- interrupts = <47 8>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <0>;
- reg = <0 80>;
- };
- dma-channel@80 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <1>;
- reg = <80 80>;
- };
- dma-channel@100 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <2>;
- reg = <100 80>;
- };
- dma-channel@180 {
- compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
- cell-index = <3>;
- reg = <180 80>;
- };
- };
-
- * Freescale 85xx/86xx DMA Controller
-
- Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
-
- Required properties:
-
- - compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-dma", where CHIP is the processor
- (mpc8540, mpc8540, etc.) and the second is
- "fsl,eloplus-dma"
- - reg : <registers mapping for DMA general status reg>
- - cell-index : controller index. 0 for controller @ 0x21000,
- 1 for controller @ 0xc000
- - ranges : Should be defined as specified in 1) to describe the
- DMA controller channels.
-
- - DMA channel nodes:
- - compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-dma-channel", where CHIP is the processor
- (mpc8540, mpc8560, etc.) and the second is
- "fsl,eloplus-dma-channel"
- - cell-index : dma channel index starts at 0.
- - reg : <registers mapping for channel>
- - interrupts : <interrupt mapping for DMA channel IRQ>
- - interrupt-parent : optional, if needed for interrupt mapping
-
- Example:
- dma@21300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
- reg = <21300 4>;
- ranges = <0 21100 200>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <0 80>;
- cell-index = <0>;
- interrupt-parent = <&mpic>;
- interrupts = <14 2>;
- };
- dma-channel@80 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <80 80>;
- cell-index = <1>;
- interrupt-parent = <&mpic>;
- interrupts = <15 2>;
- };
- dma-channel@100 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <100 80>;
- cell-index = <2>;
- interrupt-parent = <&mpic>;
- interrupts = <16 2>;
- };
- dma-channel@180 {
- compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
- reg = <180 80>;
- cell-index = <3>;
- interrupt-parent = <&mpic>;
- interrupts = <17 2>;
- };
- };
-
- * Freescale 8xxx/3.0 Gb/s SATA nodes
-
- SATA nodes are defined to describe on-chip Serial ATA controllers.
- Each SATA port should have its own node.
-
- Required properties:
- - compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-sata", where CHIP is the processor
- (mpc8315, mpc8379, etc.) and the second is
- "fsl,pq-sata"
- - interrupts : <interrupt mapping for SATA IRQ>
- - cell-index : controller index.
- 1 for controller @ 0x18000
- 2 for controller @ 0x19000
- 3 for controller @ 0x1a000
- 4 for controller @ 0x1b000
-
- Optional properties:
- - interrupt-parent : optional, if needed for interrupt mapping
- - reg : <registers mapping>
-
- Example:
-
- sata@18000 {
- compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
- reg = <0x18000 0x1000>;
- cell-index = <1>;
- interrupts = <2c 8>;
- interrupt-parent = < &ipic >;
- };
-
- q) USB EHCI controllers
+ f) USB EHCI controllers
Required properties:
- compatible : should be "usb-ehci".
@@ -2836,40 +1815,6 @@
big-endian;
};
- r) Freescale Display Interface Unit
-
- The Freescale DIU is a LCD controller, with proper hardware, it can also
- drive DVI monitors.
-
- Required properties:
- - compatible : should be "fsl-diu".
- - reg : should contain at least address and length of the DIU register
- set.
- - Interrupts : one DIU interrupt should be describe here.
-
- Example (MPC8610HPCD)
- display@2c000 {
- compatible = "fsl,diu";
- reg = <0x2c000 100>;
- interrupts = <72 2>;
- interrupt-parent = <&mpic>;
- };
-
- s) Freescale on board FPGA
-
- This is the memory-mapped registers for on board FPGA.
-
- Required properities:
- - compatible : should be "fsl,fpga-pixis".
- - reg : should contain the address and the lenght of the FPPGA register
- set.
-
- Example (MPC8610HPCD)
- board-control@e8000000 {
- compatible = "fsl,fpga-pixis";
- reg = <0xe8000000 32>;
- };
-
VII - Marvell Discovery mv64[345]6x System Controller chips
===========================================================
@@ -3622,14 +2567,11 @@
pic@40000 {
linux,phandle = <40000>;
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
reg = <40000 40000>;
- built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
i2c@3000 {
diff --git a/Documentation/powerpc/bootwrapper.txt b/Documentation/powerpc/bootwrapper.txt
new file mode 100644
index 0000000..d60fced
--- /dev/null
+++ b/Documentation/powerpc/bootwrapper.txt
@@ -0,0 +1,141 @@
+The PowerPC boot wrapper
+------------------------
+Copyright (C) Secret Lab Technologies Ltd.
+
+PowerPC image targets compresses and wraps the kernel image (vmlinux) with
+a boot wrapper to make it usable by the system firmware. There is no
+standard PowerPC firmware interface, so the boot wrapper is designed to
+be adaptable for each kind of image that needs to be built.
+
+The boot wrapper can be found in the arch/powerpc/boot/ directory. The
+Makefile in that directory has targets for all the available image types.
+The different image types are used to support all of the various firmware
+interfaces found on PowerPC platforms. OpenFirmware is the most commonly
+used firmware type on general purpose PowerPC systems from Apple, IBM and
+others. U-Boot is typically found on embedded PowerPC hardware, but there
+are a handful of other firmware implementations which are also popular. Each
+firmware interface requires a different image format.
+
+The boot wrapper is built from the makefile in arch/powerpc/boot/Makefile and
+it uses the wrapper script (arch/powerpc/boot/wrapper) to generate target
+image. The details of the build system is discussed in the next section.
+Currently, the following image format targets exist:
+
+ cuImage.%: Backwards compatible uImage for older version of
+ U-Boot (for versions that don't understand the device
+ tree). This image embeds a device tree blob inside
+ the image. The boot wrapper, kernel and device tree
+ are all embedded inside the U-Boot uImage file format
+ with boot wrapper code that extracts data from the old
+ bd_info structure and loads the data into the device
+ tree before jumping into the kernel.
+ Because of the series of #ifdefs found in the
+ bd_info structure used in the old U-Boot interfaces,
+ cuImages are platform specific. Each specific
+ U-Boot platform has a different platform init file
+ which populates the embedded device tree with data
+ from the platform specific bd_info file. The platform
+ specific cuImage platform init code can be found in
+ arch/powerpc/boot/cuboot.*.c. Selection of the correct
+ cuImage init code for a specific board can be found in
+ the wrapper structure.
+ dtbImage.%: Similar to zImage, except device tree blob is embedded
+ inside the image instead of provided by firmware. The
+ output image file can be either an elf file or a flat
+ binary depending on the platform.
+ dtbImages are used on systems which do not have an
+ interface for passing a device tree directly.
+ dtbImages are similar to simpleImages except that
+ dtbImages have platform specific code for extracting
+ data from the board firmware, but simpleImages do not
+ talk to the firmware at all.
+ PlayStation 3 support uses dtbImage. So do Embedded
+ Planet boards using the PlanetCore firmware. Board
+ specific initialization code is typically found in a
+ file named arch/powerpc/boot/<platform>.c; but this
+ can be overridden by the wrapper script.
+ simpleImage.%: Firmware independent compressed image that does not
+ depend on any particular firmware interface and embeds
+ a device tree blob. This image is a flat binary that
+ can be loaded to any location in RAM and jumped to.
+ Firmware cannot pass any configuration data to the
+ kernel with this image type and it depends entirely on
+ the embedded device tree for all information.
+ The simpleImage is useful for booting systems with
+ an unknown firmware interface or for booting from
+ a debugger when no firmware is present (such as on
+ the Xilinx Virtex platform). The only assumption that
+ simpleImage makes is that RAM is correctly initialized
+ and that the MMU is either off or has RAM mapped to
+ base address 0.
+ simpleImage also supports inserting special platform
+ specific initialization code to the start of the bootup
+ sequence. The virtex405 platform uses this feature to
+ ensure that the cache is invalidated before caching
+ is enabled. Platform specific initialization code is
+ added as part of the wrapper script and is keyed on
+ the image target name. For example, all
+ simpleImage.virtex405-* targets will add the
+ virtex405-head.S initialization code (This also means
+ that the dts file for virtex405 targets should be
+ named (virtex405-<board>.dts). Search the wrapper
+ script for 'virtex405' and see the file
+ arch/powerpc/boot/virtex405-head.S for details.
+ treeImage.%; Image format for used with OpenBIOS firmware found
+ on some ppc4xx hardware. This image embeds a device
+ tree blob inside the image.
+ uImage: Native image format used by U-Boot. The uImage target
+ does not add any boot code. It just wraps a compressed
+ vmlinux in the uImage data structure. This image
+ requires a version of U-Boot that is able to pass
+ a device tree to the kernel at boot. If using an older
+ version of U-Boot, then you need to use a cuImage
+ instead.
+ zImage.%: Image format which does not embed a device tree.
+ Used by OpenFirmware and other firmware interfaces
+ which are able to supply a device tree. This image
+ expects firmware to provide the device tree at boot.
+ Typically, if you have general purpose PowerPC
+ hardware then you want this image format.
+
+Image types which embed a device tree blob (simpleImage, dtbImage, treeImage,
+and cuImage) all generate the device tree blob from a file in the
+arch/powerpc/boot/dts/ directory. The Makefile selects the correct device
+tree source based on the name of the target. Therefore, if the kernel is
+built with 'make treeImage.walnut simpleImage.virtex405-ml403', then the
+build system will use arch/powerpc/boot/dts/walnut.dts to build
+treeImage.walnut and arch/powerpc/boot/dts/virtex405-ml403.dts to build
+the simpleImage.virtex405-ml403.
+
+Two special targets called 'zImage' and 'zImage.initrd' also exist. These
+targets build all the default images as selected by the kernel configuration.
+Default images are selected by the boot wrapper Makefile
+(arch/powerpc/boot/Makefile) by adding targets to the $image-y variable. Look
+at the Makefile to see which default image targets are available.
+
+How it is built
+---------------
+arch/powerpc is designed to support multiplatform kernels, which means
+that a single vmlinux image can be booted on many different target boards.
+It also means that the boot wrapper must be able to wrap for many kinds of
+images on a single build. The design decision was made to not use any
+conditional compilation code (#ifdef, etc) in the boot wrapper source code.
+All of the boot wrapper pieces are buildable at any time regardless of the
+kernel configuration. Building all the wrapper bits on every kernel build
+also ensures that obscure parts of the wrapper are at the very least compile
+tested in a large variety of environments.
+
+The wrapper is adapted for different image types at link time by linking in
+just the wrapper bits that are appropriate for the image type. The 'wrapper
+script' (found in arch/powerpc/boot/wrapper) is called by the Makefile and
+is responsible for selecting the correct wrapper bits for the image type.
+The arguments are well documented in the script's comment block, so they
+are not repeated here. However, it is worth mentioning that the script
+uses the -p (platform) argument as the main method of deciding which wrapper
+bits to compile in. Look for the large 'case "$platform" in' block in the
+middle of the script. This is also the place where platform specific fixups
+can be selected by changing the link order.
+
+In particular, care should be taken when working with cuImages. cuImage
+wrapper bits are very board specific and care should be taken to make sure
+the target you are trying to build is supported by the wrapper bits.
diff --git a/Documentation/powerpc/dts-bindings/fsl/board.txt b/Documentation/powerpc/dts-bindings/fsl/board.txt
new file mode 100644
index 0000000..74ae6f1
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/board.txt
@@ -0,0 +1,29 @@
+* Board Control and Status (BCSR)
+
+Required properties:
+
+ - device_type : Should be "board-control"
+ - reg : Offset and length of the register set for the device
+
+Example:
+
+ bcsr@f8000000 {
+ device_type = "board-control";
+ reg = <f8000000 8000>;
+ };
+
+* Freescale on board FPGA
+
+This is the memory-mapped registers for on board FPGA.
+
+Required properities:
+- compatible : should be "fsl,fpga-pixis".
+- reg : should contain the address and the lenght of the FPPGA register
+ set.
+
+Example (MPC8610HPCD):
+
+ board-control@e8000000 {
+ compatible = "fsl,fpga-pixis";
+ reg = <0xe8000000 32>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt
new file mode 100644
index 0000000..088fc47
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm.txt
@@ -0,0 +1,67 @@
+* Freescale Communications Processor Module
+
+NOTE: This is an interim binding, and will likely change slightly,
+as more devices are supported. The QE bindings especially are
+incomplete.
+
+* Root CPM node
+
+Properties:
+- compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
+- reg : A 48-byte region beginning with CPCR.
+
+Example:
+ cpm@119c0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
+ reg = <119c0 30>;
+ }
+
+* Properties common to mulitple CPM/QE devices
+
+- fsl,cpm-command : This value is ORed with the opcode and command flag
+ to specify the device on which a CPM command operates.
+
+- fsl,cpm-brg : Indicates which baud rate generator the device
+ is associated with. If absent, an unused BRG
+ should be dynamically allocated. If zero, the
+ device uses an external clock rather than a BRG.
+
+- reg : Unless otherwise specified, the first resource represents the
+ scc/fcc/ucc registers, and the second represents the device's
+ parameter RAM region (if it has one).
+
+* Multi-User RAM (MURAM)
+
+The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
+
+Ranges must be set up subject to the following restrictions:
+
+- Children's reg nodes must be offsets from the start of all muram, even
+ if the user-data area does not begin at zero.
+- If multiple range entries are used, the difference between the parent
+ address and the child address must be the same in all, so that a single
+ mapping can cover them all while maintaining the ability to determine
+ CPM-side offsets with pointer subtraction. It is recommended that
+ multiple range entries not be used.
+- A child address of zero must be translatable, even if no reg resources
+ contain it.
+
+A child "data" node must exist, compatible with "fsl,cpm-muram-data", to
+indicate the portion of muram that is usable by the OS for arbitrary
+purposes. The data node may have an arbitrary number of reg resources,
+all of which contribute to the allocatable muram pool.
+
+Example, based on mpc8272:
+ muram@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 2000 9800 800>;
+ };
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt
new file mode 100644
index 0000000..4c7d45e
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/brg.txt
@@ -0,0 +1,21 @@
+* Baud Rate Generators
+
+Currently defined compatibles:
+fsl,cpm-brg
+fsl,cpm1-brg
+fsl,cpm2-brg
+
+Properties:
+- reg : There may be an arbitrary number of reg resources; BRG
+ numbers are assigned to these in order.
+- clock-frequency : Specifies the base frequency driving
+ the BRG.
+
+Example:
+ brg@119f0 {
+ compatible = "fsl,mpc8272-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <119f0 10 115f0 10>;
+ clock-frequency = <d#25000000>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt
new file mode 100644
index 0000000..87bc604
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/i2c.txt
@@ -0,0 +1,41 @@
+* I2C
+
+The I2C controller is expressed as a bus under the CPM node.
+
+Properties:
+- compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
+- reg : On CPM2 devices, the second resource doesn't specify the I2C
+ Parameter RAM itself, but the I2C_BASE field of the CPM2 Parameter RAM
+ (typically 0x8afc 0x2).
+- #address-cells : Should be one. The cell is the i2c device address with
+ the r/w bit set to zero.
+- #size-cells : Should be zero.
+- clock-frequency : Can be used to set the i2c clock frequency. If
+ unspecified, a default frequency of 60kHz is being used.
+The following two properties are deprecated. They are only used by legacy
+i2c drivers to find the bus to probe:
+- linux,i2c-index : Can be used to hard code an i2c bus number. By default,
+ the bus number is dynamically assigned by the i2c core.
+- linux,i2c-class : Can be used to override the i2c class. The class is used
+ by legacy i2c device drivers to find a bus in a specific context like
+ system management, video or sound. By default, I2C_CLASS_HWMON (1) is
+ being used. The definition of the classes can be found in
+ include/i2c/i2c.h
+
+Example, based on mpc823:
+
+ i2c@860 {
+ compatible = "fsl,mpc823-i2c",
+ "fsl,cpm1-i2c";
+ reg = <0x860 0x20 0x3c80 0x30>;
+ interrupts = <16>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-command = <0x10>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@68 {
+ compatible = "dallas,ds1307";
+ reg = <0x68>;
+ };
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt
new file mode 100644
index 0000000..8e3ee16
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/pic.txt
@@ -0,0 +1,18 @@
+* Interrupt Controllers
+
+Currently defined compatibles:
+- fsl,cpm1-pic
+ - only one interrupt cell
+- fsl,pq1-pic
+- fsl,cpm2-pic
+ - second interrupt cell is level/sense:
+ - 2 is falling edge
+ - 8 is active low
+
+Example:
+ interrupt-controller@10c00 {
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <10c00 80>;
+ compatible = "mpc8272-pic", "fsl,cpm2-pic";
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt
new file mode 100644
index 0000000..74bfda4
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/cpm/usb.txt
@@ -0,0 +1,15 @@
+* USB (Universal Serial Bus Controller)
+
+Properties:
+- compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb"
+
+Example:
+ usb@11bc0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,cpm2-usb";
+ reg = <11b60 18 8b00 100>;
+ interrupts = <b 8>;
+ interrupt-parent = <&PIC>;
+ fsl,cpm-command = <2e600000>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt
new file mode 100644
index 0000000..0e42694
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/network.txt
@@ -0,0 +1,45 @@
+* Network
+
+Currently defined compatibles:
+- fsl,cpm1-scc-enet
+- fsl,cpm2-scc-enet
+- fsl,cpm1-fec-enet
+- fsl,cpm2-fcc-enet (third resource is GFEMR)
+- fsl,qe-enet
+
+Example:
+
+ ethernet@11300 {
+ device_type = "network";
+ compatible = "fsl,mpc8272-fcc-enet",
+ "fsl,cpm2-fcc-enet";
+ reg = <11300 20 8400 100 11390 1>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <20 8>;
+ interrupt-parent = <&PIC>;
+ phy-handle = <&PHY0>;
+ fsl,cpm-command = <12000300>;
+ };
+
+* MDIO
+
+Currently defined compatibles:
+fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
+fsl,cpm2-mdio-bitbang (reg is port C registers)
+
+Properties for fsl,cpm2-mdio-bitbang:
+fsl,mdio-pin : pin of port C controlling mdio data
+fsl,mdc-pin : pin of port C controlling mdio clock
+
+Example:
+ mdio@10d40 {
+ device_type = "mdio";
+ compatible = "fsl,mpc8272ads-mdio-bitbang",
+ "fsl,mpc8272-mdio-bitbang",
+ "fsl,cpm2-mdio-bitbang";
+ reg = <10d40 14>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ fsl,mdio-pin = <12>;
+ fsl,mdc-pin = <13>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
new file mode 100644
index 0000000..78790d5
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
@@ -0,0 +1,58 @@
+* Freescale QUICC Engine module (QE)
+This represents qe module that is installed on PowerQUICC II Pro.
+
+NOTE: This is an interim binding; it should be updated to fit
+in with the CPM binding later in this document.
+
+Basically, it is a bus of devices, that could act more or less
+as a complete entity (UCC, USB etc ). All of them should be siblings on
+the "root" qe node, using the common properties from there.
+The description below applies to the qe of MPC8360 and
+more nodes and properties would be extended in the future.
+
+i) Root QE device
+
+Required properties:
+- compatible : should be "fsl,qe";
+- model : precise model of the QE, Can be "QE", "CPM", or "CPM2"
+- reg : offset and length of the device registers.
+- bus-frequency : the clock frequency for QUICC Engine.
+
+Recommended properties
+- brg-frequency : the internal clock source frequency for baud-rate
+ generators in Hz.
+
+Example:
+ qe@e0100000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ compatible = "fsl,qe";
+ ranges = <0 e0100000 00100000>;
+ reg = <e0100000 480>;
+ brg-frequency = <0>;
+ bus-frequency = <179A7B00>;
+ }
+
+* Multi-User RAM (MURAM)
+
+Required properties:
+- compatible : should be "fsl,qe-muram", "fsl,cpm-muram".
+- mode : the could be "host" or "slave".
+- ranges : Should be defined as specified in 1) to describe the
+ translation of MURAM addresses.
+- data-only : sub-node which defines the address area under MURAM
+ bus that can be allocated as data/parameter
+
+Example:
+
+ muram@10000 {
+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
+ ranges = <0 00010000 0000c000>;
+
+ data-only@0{
+ compatible = "fsl,qe-muram-data",
+ "fsl,cpm-muram-data";
+ reg = <0 c000>;
+ };
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt
new file mode 100644
index 0000000..6c238f5
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/firmware.txt
@@ -0,0 +1,24 @@
+* Uploaded QE firmware
+
+ If a new firwmare has been uploaded to the QE (usually by the
+ boot loader), then a 'firmware' child node should be added to the QE
+ node. This node provides information on the uploaded firmware that
+ device drivers may need.
+
+ Required properties:
+ - id: The string name of the firmware. This is taken from the 'id'
+ member of the qe_firmware structure of the uploaded firmware.
+ Device drivers can search this string to determine if the
+ firmware they want is already present.
+ - extended-modes: The Extended Modes bitfield, taken from the
+ firmware binary. It is a 64-bit number represented
+ as an array of two 32-bit numbers.
+ - virtual-traps: The virtual traps, taken from the firmware binary.
+ It is an array of 8 32-bit numbers.
+
+Example:
+ firmware {
+ id = "Soft-UART";
+ extended-modes = <0 0>;
+ virtual-traps = <0 0 0 0 0 0 0 0>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt
new file mode 100644
index 0000000..6098426
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/par_io.txt
@@ -0,0 +1,51 @@
+* Parallel I/O Ports
+
+This node configures Parallel I/O ports for CPUs with QE support.
+The node should reside in the "soc" node of the tree. For each
+device that using parallel I/O ports, a child node should be created.
+See the definition of the Pin configuration nodes below for more
+information.
+
+Required properties:
+- device_type : should be "par_io".
+- reg : offset to the register set and its length.
+- num-ports : number of Parallel I/O ports
+
+Example:
+par_io@1400 {
+ reg = <1400 100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "par_io";
+ num-ports = <7>;
+ ucc_pin@01 {
+ ......
+ };
+
+Note that "par_io" nodes are obsolete, and should not be used for
+the new device trees. Instead, each Par I/O bank should be represented
+via its own gpio-controller node:
+
+Required properties:
+- #gpio-cells : should be "2".
+- compatible : should be "fsl,<chip>-qe-pario-bank",
+ "fsl,mpc8323-qe-pario-bank".
+- reg : offset to the register set and its length.
+- gpio-controller : node to identify gpio controllers.
+
+Example:
+ qe_pio_a: gpio-controller@1400 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8360-qe-pario-bank",
+ "fsl,mpc8323-qe-pario-bank";
+ reg = <0x1400 0x18>;
+ gpio-controller;
+ };
+
+ qe_pio_e: gpio-controller@1460 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8360-qe-pario-bank",
+ "fsl,mpc8323-qe-pario-bank";
+ reg = <0x1460 0x18>;
+ gpio-controller;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt
new file mode 100644
index 0000000..c5b4306
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/pincfg.txt
@@ -0,0 +1,60 @@
+* Pin configuration nodes
+
+Required properties:
+- linux,phandle : phandle of this node; likely referenced by a QE
+ device.
+- pio-map : array of pin configurations. Each pin is defined by 6
+ integers. The six numbers are respectively: port, pin, dir,
+ open_drain, assignment, has_irq.
+ - port : port number of the pin; 0-6 represent port A-G in UM.
+ - pin : pin number in the port.
+ - dir : direction of the pin, should encode as follows:
+
+ 0 = The pin is disabled
+ 1 = The pin is an output
+ 2 = The pin is an input
+ 3 = The pin is I/O
+
+ - open_drain : indicates the pin is normal or wired-OR:
+
+ 0 = The pin is actively driven as an output
+ 1 = The pin is an open-drain driver. As an output, the pin is
+ driven active-low, otherwise it is three-stated.
+
+ - assignment : function number of the pin according to the Pin Assignment
+ tables in User Manual. Each pin can have up to 4 possible functions in
+ QE and two options for CPM.
+ - has_irq : indicates if the pin is used as source of external
+ interrupts.
+
+Example:
+ ucc_pin@01 {
+ linux,phandle = <140001>;
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 0 3 1 0 1 0 /* TxD0 */
+ 0 4 1 0 1 0 /* TxD1 */
+ 0 5 1 0 1 0 /* TxD2 */
+ 0 6 1 0 1 0 /* TxD3 */
+ 1 6 1 0 3 0 /* TxD4 */
+ 1 7 1 0 1 0 /* TxD5 */
+ 1 9 1 0 2 0 /* TxD6 */
+ 1 a 1 0 2 0 /* TxD7 */
+ 0 9 2 0 1 0 /* RxD0 */
+ 0 a 2 0 1 0 /* RxD1 */
+ 0 b 2 0 1 0 /* RxD2 */
+ 0 c 2 0 1 0 /* RxD3 */
+ 0 d 2 0 1 0 /* RxD4 */
+ 1 1 2 0 2 0 /* RxD5 */
+ 1 0 2 0 2 0 /* RxD6 */
+ 1 4 2 0 2 0 /* RxD7 */
+ 0 7 1 0 1 0 /* TX_EN */
+ 0 8 1 0 1 0 /* TX_ER */
+ 0 f 2 0 1 0 /* RX_DV */
+ 0 10 2 0 1 0 /* RX_ER */
+ 0 0 2 0 1 0 /* RX_CLK */
+ 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
+ 2 8 2 0 1 0>; /* GTX125 - CLK9 */
+ };
+
+
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt
new file mode 100644
index 0000000..e47734b
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/ucc.txt
@@ -0,0 +1,70 @@
+* UCC (Unified Communications Controllers)
+
+Required properties:
+- device_type : should be "network", "hldc", "uart", "transparent"
+ "bisync", "atm", or "serial".
+- compatible : could be "ucc_geth" or "fsl_atm" and so on.
+- cell-index : the ucc number(1-8), corresponding to UCCx in UM.
+- reg : Offset and length of the register set for the device
+- interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt. This should be encoded based on
+ the information in section 2) depending on the type of interrupt
+ controller you have.
+- interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+- pio-handle : The phandle for the Parallel I/O port configuration.
+- port-number : for UART drivers, the port number to use, between 0 and 3.
+ This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0.
+ The port number is added to the minor number of the device. Unlike the
+ CPM UART driver, the port-number is required for the QE UART driver.
+- soft-uart : for UART drivers, if specified this means the QE UART device
+ driver should use "Soft-UART" mode, which is needed on some SOCs that have
+ broken UART hardware. Soft-UART is provided via a microcode upload.
+- rx-clock-name: the UCC receive clock source
+ "none": clock source is disabled
+ "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+ "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+- tx-clock-name: the UCC transmit clock source
+ "none": clock source is disabled
+ "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+ "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+The following two properties are deprecated. rx-clock has been replaced
+with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
+Drivers that currently use the deprecated properties should continue to
+do so, in order to support older device trees, but they should be updated
+to check for the new properties first.
+- rx-clock : represents the UCC receive clock source.
+ 0x00 : clock source is disabled;
+ 0x1~0x10 : clock source is BRG1~BRG16 respectively;
+ 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
+- tx-clock: represents the UCC transmit clock source;
+ 0x00 : clock source is disabled;
+ 0x1~0x10 : clock source is BRG1~BRG16 respectively;
+ 0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
+
+Required properties for network device_type:
+- mac-address : list of bytes representing the ethernet address.
+- phy-handle : The phandle for the PHY connected to this controller.
+
+Recommended properties:
+- phy-connection-type : a string naming the controller/PHY interface type,
+ i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
+ Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
+ "tbi", or "rtbi".
+
+Example:
+ ucc@2000 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ cell-index = <1>;
+ reg = <2000 200>;
+ interrupts = <a0 0>;
+ interrupt-parent = <700>;
+ mac-address = [ 00 04 9f 00 23 23 ];
+ rx-clock = "none";
+ tx-clock = "clk9";
+ phy-handle = <212000>;
+ phy-connection-type = "gmii";
+ pio-handle = <140001>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt
new file mode 100644
index 0000000..c8f44d6
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe/usb.txt
@@ -0,0 +1,22 @@
+* USB (Universal Serial Bus Controller)
+
+Required properties:
+- compatible : could be "qe_udc" or "fhci-hcd".
+- mode : the could be "host" or "slave".
+- reg : Offset and length of the register set for the device
+- interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt. This should be encoded based on
+ the information in section 2) depending on the type of interrupt
+ controller you have.
+- interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Example(slave):
+ usb@6c0 {
+ compatible = "qe_udc";
+ reg = <6c0 40>;
+ interrupts = <8b 0>;
+ interrupt-parent = <700>;
+ mode = "slave";
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt
new file mode 100644
index 0000000..b35f348
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/serial.txt
@@ -0,0 +1,21 @@
+* Serial
+
+Currently defined compatibles:
+- fsl,cpm1-smc-uart
+- fsl,cpm2-smc-uart
+- fsl,cpm1-scc-uart
+- fsl,cpm2-scc-uart
+- fsl,qe-uart
+
+Example:
+
+ serial@11a00 {
+ device_type = "serial";
+ compatible = "fsl,mpc8272-scc-uart",
+ "fsl,cpm2-scc-uart";
+ reg = <11a00 20 8000 100>;
+ interrupts = <28 8>;
+ interrupt-parent = <&PIC>;
+ fsl,cpm-brg = <1>;
+ fsl,cpm-command = <00800000>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/diu.txt b/Documentation/powerpc/dts-bindings/fsl/diu.txt
new file mode 100644
index 0000000..deb35de
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/diu.txt
@@ -0,0 +1,18 @@
+* Freescale Display Interface Unit
+
+The Freescale DIU is a LCD controller, with proper hardware, it can also
+drive DVI monitors.
+
+Required properties:
+- compatible : should be "fsl-diu".
+- reg : should contain at least address and length of the DIU register
+ set.
+- Interrupts : one DIU interrupt should be describe here.
+
+Example (MPC8610HPCD):
+ display@2c000 {
+ compatible = "fsl,diu";
+ reg = <0x2c000 100>;
+ interrupts = <72 2>;
+ interrupt-parent = <&mpic>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/dma.txt b/Documentation/powerpc/dts-bindings/fsl/dma.txt
new file mode 100644
index 0000000..86826df
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/dma.txt
@@ -0,0 +1,127 @@
+* Freescale 83xx DMA Controller
+
+Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+
+Required properties:
+
+- compatible : compatible list, contains 2 entries, first is
+ "fsl,CHIP-dma", where CHIP is the processor
+ (mpc8349, mpc8360, etc.) and the second is
+ "fsl,elo-dma"
+- reg : <registers mapping for DMA general status reg>
+- ranges : Should be defined as specified in 1) to describe the
+ DMA controller channels.
+- cell-index : controller index. 0 for controller @ 0x8100
+- interrupts : <interrupt mapping for DMA IRQ>
+- interrupt-parent : optional, if needed for interrupt mapping
+
+
+- DMA channel nodes:
+ - compatible : compatible list, contains 2 entries, first is
+ "fsl,CHIP-dma-channel", where CHIP is the processor
+ (mpc8349, mpc8350, etc.) and the second is
+ "fsl,elo-dma-channel"
+ - reg : <registers mapping for channel>
+ - cell-index : dma channel index starts at 0.
+
+Optional properties:
+ - interrupts : <interrupt mapping for DMA channel IRQ>
+ (on 83xx this is expected to be identical to
+ the interrupts property of the parent node)
+ - interrupt-parent : optional, if needed for interrupt mapping
+
+Example:
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+ reg = <82a8 4>;
+ ranges = <0 8100 1a4>;
+ interrupt-parent = <&ipic>;
+ interrupts = <47 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ cell-index = <0>;
+ reg = <0 80>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ cell-index = <1>;
+ reg = <80 80>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ cell-index = <2>;
+ reg = <100 80>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ cell-index = <3>;
+ reg = <180 80>;
+ };
+ };
+
+* Freescale 85xx/86xx DMA Controller
+
+Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
+
+Required properties:
+
+- compatible : compatible list, contains 2 entries, first is
+ "fsl,CHIP-dma", where CHIP is the processor
+ (mpc8540, mpc8540, etc.) and the second is
+ "fsl,eloplus-dma"
+- reg : <registers mapping for DMA general status reg>
+- cell-index : controller index. 0 for controller @ 0x21000,
+ 1 for controller @ 0xc000
+- ranges : Should be defined as specified in 1) to describe the
+ DMA controller channels.
+
+- DMA channel nodes:
+ - compatible : compatible list, contains 2 entries, first is
+ "fsl,CHIP-dma-channel", where CHIP is the processor
+ (mpc8540, mpc8560, etc.) and the second is
+ "fsl,eloplus-dma-channel"
+ - cell-index : dma channel index starts at 0.
+ - reg : <registers mapping for channel>
+ - interrupts : <interrupt mapping for DMA channel IRQ>
+ - interrupt-parent : optional, if needed for interrupt mapping
+
+Example:
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+ reg = <21300 4>;
+ ranges = <0 21100 200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <0 80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <14 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <80 80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <15 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <100 80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
+ reg = <180 80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <17 2>;
+ };
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/gtm.txt b/Documentation/powerpc/dts-bindings/fsl/gtm.txt
new file mode 100644
index 0000000..9a33efd
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/gtm.txt
@@ -0,0 +1,31 @@
+* Freescale General-purpose Timers Module
+
+Required properties:
+ - compatible : should be
+ "fsl,<chip>-gtm", "fsl,gtm" for SOC GTMs
+ "fsl,<chip>-qe-gtm", "fsl,qe-gtm", "fsl,gtm" for QE GTMs
+ "fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs
+ - reg : should contain gtm registers location and length (0x40).
+ - interrupts : should contain four interrupts.
+ - interrupt-parent : interrupt source phandle.
+ - clock-frequency : specifies the frequency driving the timer.
+
+Example:
+
+timer@500 {
+ compatible = "fsl,mpc8360-gtm", "fsl,gtm";
+ reg = <0x500 0x40>;
+ interrupts = <90 8 78 8 84 8 72 8>;
+ interrupt-parent = <&ipic>;
+ /* filled by u-boot */
+ clock-frequency = <0>;
+};
+
+timer@440 {
+ compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm";
+ reg = <0x440 0x40>;
+ interrupts = <12 13 14 15>;
+ interrupt-parent = <&qeic>;
+ /* filled by u-boot */
+ clock-frequency = <0>;
+};
diff --git a/Documentation/powerpc/dts-bindings/fsl/guts.txt b/Documentation/powerpc/dts-bindings/fsl/guts.txt
new file mode 100644
index 0000000..9e7a241
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/guts.txt
@@ -0,0 +1,25 @@
+* Global Utilities Block
+
+The global utilities block controls power management, I/O device
+enabling, power-on-reset configuration monitoring, general-purpose
+I/O signal configuration, alternate function selection for multiplexed
+signals, and clock control.
+
+Required properties:
+
+ - compatible : Should define the compatible device type for
+ global-utilities.
+ - reg : Offset and length of the register set for the device.
+
+Recommended properties:
+
+ - fsl,has-rstcr : Indicates that the global utilities register set
+ contains a functioning "reset control register" (i.e. the board
+ is wired to reset upon setting the HRESET_REQ bit in this register).
+
+Example:
+ global-utilities@e0000 { /* global utilities block */
+ compatible = "fsl,mpc8548-guts";
+ reg = <e0000 1000>;
+ fsl,has-rstcr;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/i2c.txt b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
new file mode 100644
index 0000000..d0ab33e
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/i2c.txt
@@ -0,0 +1,32 @@
+* I2C
+
+Required properties :
+
+ - device_type : Should be "i2c"
+ - reg : Offset and length of the register set for the device
+
+Recommended properties :
+
+ - compatible : Should be "fsl-i2c" for parts compatible with
+ Freescale I2C specifications.
+ - interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt. This should be encoded based on
+ the information in section 2) depending on the type of interrupt
+ controller you have.
+ - interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+ - dfsrr : boolean; if defined, indicates that this I2C device has
+ a digital filter sampling rate register
+ - fsl5200-clocking : boolean; if defined, indicated that this device
+ uses the FSL 5200 clocking mechanism.
+
+Example :
+ i2c@3000 {
+ interrupt-parent = <40000>;
+ interrupts = <1b 3>;
+ reg = <3000 18>;
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ dfsrr;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/lbc.txt b/Documentation/powerpc/dts-bindings/fsl/lbc.txt
new file mode 100644
index 0000000..3300fec
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/lbc.txt
@@ -0,0 +1,35 @@
+* Chipselect/Local Bus
+
+Properties:
+- name : Should be localbus
+- #address-cells : Should be either two or three. The first cell is the
+ chipselect number, and the remaining cells are the
+ offset into the chipselect.
+- #size-cells : Either one or two, depending on how large each chipselect
+ can be.
+- ranges : Each range corresponds to a single chipselect, and cover
+ the entire access window as configured.
+
+Example:
+ localbus@f0010100 {
+ compatible = "fsl,mpc8272-localbus",
+ "fsl,pq2-localbus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <f0010100 40>;
+
+ ranges = <0 0 fe000000 02000000
+ 1 0 f4500000 00008000>;
+
+ flash@0,0 {
+ compatible = "jedec-flash";
+ reg = <0 0 2000000>;
+ bank-width = <4>;
+ device-width = <1>;
+ };
+
+ board-control@1,0 {
+ reg = <1 0 20>;
+ compatible = "fsl,mpc8272ads-bcsr";
+ };
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/msi-pic.txt b/Documentation/powerpc/dts-bindings/fsl/msi-pic.txt
new file mode 100644
index 0000000..b26b919
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/msi-pic.txt
@@ -0,0 +1,36 @@
+* Freescale MSI interrupt controller
+
+Reguired properities:
+- compatible : compatible list, contains 2 entries,
+ first is "fsl,CHIP-msi", where CHIP is the processor(mpc8610, mpc8572,
+ etc.) and the second is "fsl,mpic-msi" or "fsl,ipic-msi" depending on
+ the parent type.
+- reg : should contain the address and the length of the shared message
+ interrupt register set.
+- msi-available-ranges: use <start count> style section to define which
+ msi interrupt can be used in the 256 msi interrupts. This property is
+ optional, without this, all the 256 MSI interrupts can be used.
+- interrupts : each one of the interrupts here is one entry per 32 MSIs,
+ and routed to the host interrupt controller. the interrupts should
+ be set as edge sensitive.
+- interrupt-parent: the phandle for the interrupt controller
+ that services interrupts for this device. for 83xx cpu, the interrupts
+ are routed to IPIC, and for 85xx/86xx cpu the interrupts are routed
+ to MPIC.
+
+Example:
+ msi@41600 {
+ compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
+ reg = <0x41600 0x80>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe0 0
+ 0xe1 0
+ 0xe2 0
+ 0xe3 0
+ 0xe4 0
+ 0xe5 0
+ 0xe6 0
+ 0xe7 0>;
+ interrupt-parent = <&mpic>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/sata.txt b/Documentation/powerpc/dts-bindings/fsl/sata.txt
new file mode 100644
index 0000000..b46bcf4
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/sata.txt
@@ -0,0 +1,29 @@
+* Freescale 8xxx/3.0 Gb/s SATA nodes
+
+SATA nodes are defined to describe on-chip Serial ATA controllers.
+Each SATA port should have its own node.
+
+Required properties:
+- compatible : compatible list, contains 2 entries, first is
+ "fsl,CHIP-sata", where CHIP is the processor
+ (mpc8315, mpc8379, etc.) and the second is
+ "fsl,pq-sata"
+- interrupts : <interrupt mapping for SATA IRQ>
+- cell-index : controller index.
+ 1 for controller @ 0x18000
+ 2 for controller @ 0x19000
+ 3 for controller @ 0x1a000
+ 4 for controller @ 0x1b000
+
+Optional properties:
+- interrupt-parent : optional, if needed for interrupt mapping
+- reg : <registers mapping>
+
+Example:
+ sata@18000 {
+ compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ cell-index = <1>;
+ interrupts = <2c 8>;
+ interrupt-parent = < &ipic >;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/sec.txt b/Documentation/powerpc/dts-bindings/fsl/sec.txt
new file mode 100644
index 0000000..2b6f2d4
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/sec.txt
@@ -0,0 +1,68 @@
+Freescale SoC SEC Security Engines
+
+Required properties:
+
+- compatible : Should contain entries for this and backward compatible
+ SEC versions, high to low, e.g., "fsl,sec2.1", "fsl,sec2.0"
+- reg : Offset and length of the register set for the device
+- interrupts : the SEC's interrupt number
+- fsl,num-channels : An integer representing the number of channels
+ available.
+- fsl,channel-fifo-len : An integer representing the number of
+ descriptor pointers each channel fetch fifo can hold.
+- fsl,exec-units-mask : The bitmask representing what execution units
+ (EUs) are available. It's a single 32-bit cell. EU information
+ should be encoded following the SEC's Descriptor Header Dword
+ EU_SEL0 field documentation, i.e. as follows:
+
+ bit 0 = reserved - should be 0
+ bit 1 = set if SEC has the ARC4 EU (AFEU)
+ bit 2 = set if SEC has the DES/3DES EU (DEU)
+ bit 3 = set if SEC has the message digest EU (MDEU/MDEU-A)
+ bit 4 = set if SEC has the random number generator EU (RNG)
+ bit 5 = set if SEC has the public key EU (PKEU)
+ bit 6 = set if SEC has the AES EU (AESU)
+ bit 7 = set if SEC has the Kasumi EU (KEU)
+ bit 8 = set if SEC has the CRC EU (CRCU)
+ bit 11 = set if SEC has the message digest EU extended alg set (MDEU-B)
+
+remaining bits are reserved for future SEC EUs.
+
+- fsl,descriptor-types-mask : The bitmask representing what descriptors
+ are available. It's a single 32-bit cell. Descriptor type information
+ should be encoded following the SEC's Descriptor Header Dword DESC_TYPE
+ field documentation, i.e. as follows:
+
+ bit 0 = set if SEC supports the aesu_ctr_nonsnoop desc. type
+ bit 1 = set if SEC supports the ipsec_esp descriptor type
+ bit 2 = set if SEC supports the common_nonsnoop desc. type
+ bit 3 = set if SEC supports the 802.11i AES ccmp desc. type
+ bit 4 = set if SEC supports the hmac_snoop_no_afeu desc. type
+ bit 5 = set if SEC supports the srtp descriptor type
+ bit 6 = set if SEC supports the non_hmac_snoop_no_afeu desc.type
+ bit 7 = set if SEC supports the pkeu_assemble descriptor type
+ bit 8 = set if SEC supports the aesu_key_expand_output desc.type
+ bit 9 = set if SEC supports the pkeu_ptmul descriptor type
+ bit 10 = set if SEC supports the common_nonsnoop_afeu desc. type
+ bit 11 = set if SEC supports the pkeu_ptadd_dbl descriptor type
+
+ ..and so on and so forth.
+
+Optional properties:
+
+- interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Example:
+
+ /* MPC8548E */
+ crypto@30000 {
+ compatible = "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <29 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0xfe>;
+ fsl,descriptor-types-mask = <0x12b0ebf>;
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/spi.txt b/Documentation/powerpc/dts-bindings/fsl/spi.txt
new file mode 100644
index 0000000..e7d9a34
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/spi.txt
@@ -0,0 +1,24 @@
+* SPI (Serial Peripheral Interface)
+
+Required properties:
+- cell-index : SPI controller index.
+- compatible : should be "fsl,spi".
+- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
+- reg : Offset and length of the register set for the device
+- interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt. This should be encoded based on
+ the information in section 2) depending on the type of interrupt
+ controller you have.
+- interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Example:
+ spi@4c0 {
+ cell-index = <0>;
+ compatible = "fsl,spi";
+ reg = <4c0 40>;
+ interrupts = <82 0>;
+ interrupt-parent = <700>;
+ mode = "cpu";
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/ssi.txt b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
new file mode 100644
index 0000000..d100555
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/ssi.txt
@@ -0,0 +1,38 @@
+Freescale Synchronous Serial Interface
+
+The SSI is a serial device that communicates with audio codecs. It can
+be programmed in AC97, I2S, left-justified, or right-justified modes.
+
+Required properties:
+- compatible : compatible list, containing "fsl,ssi"
+- cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on
+- reg : offset and length of the register set for the device
+- interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and
+ level information for the interrupt. This should be
+ encoded based on the information in section 2)
+ depending on the type of interrupt controller you
+ have.
+- interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+- fsl,mode : the operating mode for the SSI interface
+ "i2s-slave" - I2S mode, SSI is clock slave
+ "i2s-master" - I2S mode, SSI is clock master
+ "lj-slave" - left-justified mode, SSI is clock slave
+ "lj-master" - l.j. mode, SSI is clock master
+ "rj-slave" - right-justified mode, SSI is clock slave
+ "rj-master" - r.j., SSI is clock master
+ "ac97-slave" - AC97 mode, SSI is clock slave
+ "ac97-master" - AC97 mode, SSI is clock master
+
+Optional properties:
+- codec-handle : phandle to a 'codec' node that defines an audio
+ codec connected to this SSI. This node is typically
+ a child of an I2C or other control node.
+
+Child 'codec' node required properties:
+- compatible : compatible list, contains the name of the codec
+
+Child 'codec' node optional properties:
+- clock-frequency : The frequency of the input clock, which typically
+ comes from an on-board dedicated oscillator.
diff --git a/Documentation/powerpc/dts-bindings/fsl/tsec.txt b/Documentation/powerpc/dts-bindings/fsl/tsec.txt
new file mode 100644
index 0000000..583ef6b
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/tsec.txt
@@ -0,0 +1,69 @@
+* MDIO IO device
+
+The MDIO is a bus to which the PHY devices are connected. For each
+device that exists on this bus, a child node should be created. See
+the definition of the PHY node below for an example of how to define
+a PHY.
+
+Required properties:
+ - reg : Offset and length of the register set for the device
+ - compatible : Should define the compatible device type for the
+ mdio. Currently, this is most likely to be "fsl,gianfar-mdio"
+
+Example:
+
+ mdio@24520 {
+ reg = <24520 20>;
+ compatible = "fsl,gianfar-mdio";
+
+ ethernet-phy@0 {
+ ......
+ };
+ };
+
+
+* Gianfar-compatible ethernet nodes
+
+Required properties:
+
+ - device_type : Should be "network"
+ - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
+ - compatible : Should be "gianfar"
+ - reg : Offset and length of the register set for the device
+ - mac-address : List of bytes representing the ethernet address of
+ this controller
+ - interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt. This should be encoded based on
+ the information in section 2) depending on the type of interrupt
+ controller you have.
+ - interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+ - phy-handle : The phandle for the PHY connected to this ethernet
+ controller.
+ - fixed-link : <a b c d e> where a is emulated phy id - choose any,
+ but unique to the all specified fixed-links, b is duplex - 0 half,
+ 1 full, c is link speed - d#10/d#100/d#1000, d is pause - 0 no
+ pause, 1 pause, e is asym_pause - 0 no asym_pause, 1 asym_pause.
+
+Recommended properties:
+
+ - phy-connection-type : a string naming the controller/PHY interface type,
+ i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id", "sgmii",
+ "tbi", or "rtbi". This property is only really needed if the connection
+ is of type "rgmii-id", as all other connection types are detected by
+ hardware.
+
+
+Example:
+ ethernet@24000 {
+ #size-cells = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ mac-address = [ 00 E0 0C 00 73 00 ];
+ interrupts = <d 3 e 3 12 3>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452000>
+ };
diff --git a/Documentation/powerpc/dts-bindings/fsl/usb.txt b/Documentation/powerpc/dts-bindings/fsl/usb.txt
new file mode 100644
index 0000000..b001524
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/usb.txt
@@ -0,0 +1,59 @@
+Freescale SOC USB controllers
+
+The device node for a USB controller that is part of a Freescale
+SOC is as described in the document "Open Firmware Recommended
+Practice : Universal Serial Bus" with the following modifications
+and additions :
+
+Required properties :
+ - compatible : Should be "fsl-usb2-mph" for multi port host USB
+ controllers, or "fsl-usb2-dr" for dual role USB controllers
+ - phy_type : For multi port host USB controllers, should be one of
+ "ulpi", or "serial". For dual role USB controllers, should be
+ one of "ulpi", "utmi", "utmi_wide", or "serial".
+ - reg : Offset and length of the register set for the device
+ - port0 : boolean; if defined, indicates port0 is connected for
+ fsl-usb2-mph compatible controllers. Either this property or
+ "port1" (or both) must be defined for "fsl-usb2-mph" compatible
+ controllers.
+ - port1 : boolean; if defined, indicates port1 is connected for
+ fsl-usb2-mph compatible controllers. Either this property or
+ "port0" (or both) must be defined for "fsl-usb2-mph" compatible
+ controllers.
+ - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
+ controllers. Can be "host", "peripheral", or "otg". Default to
+ "host" if not defined for backward compatibility.
+
+Recommended properties :
+ - interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt. This should be encoded based on
+ the information in section 2) depending on the type of interrupt
+ controller you have.
+ - interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Example multi port host USB controller device node :
+ usb@22000 {
+ compatible = "fsl-usb2-mph";
+ reg = <22000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <700>;
+ interrupts = <27 1>;
+ phy_type = "ulpi";
+ port0;
+ port1;
+ };
+
+Example dual role USB controller device node :
+ usb@23000 {
+ compatible = "fsl-usb2-dr";
+ reg = <23000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <700>;
+ interrupts = <26 1>;
+ dr_mode = "otg";
+ phy = "ulpi";
+ };
diff --git a/Documentation/scsi/aacraid.txt b/Documentation/scsi/aacraid.txt
index d16011a..709ca99 100644
--- a/Documentation/scsi/aacraid.txt
+++ b/Documentation/scsi/aacraid.txt
@@ -56,19 +56,33 @@
9005:0285:9005:02d1 Adaptec 5405 (Voodoo40)
9005:0285:15d9:02d2 SMC AOC-USAS-S8i-LP
9005:0285:15d9:02d3 SMC AOC-USAS-S8iR-LP
- 9005:0285:9005:02d4 Adaptec 2045 (Voodoo04 Lite)
- 9005:0285:9005:02d5 Adaptec 2405 (Voodoo40 Lite)
- 9005:0285:9005:02d6 Adaptec 2445 (Voodoo44 Lite)
- 9005:0285:9005:02d7 Adaptec 2805 (Voodoo80 Lite)
+ 9005:0285:9005:02d4 Adaptec ASR-2045 (Voodoo04 Lite)
+ 9005:0285:9005:02d5 Adaptec ASR-2405 (Voodoo40 Lite)
+ 9005:0285:9005:02d6 Adaptec ASR-2445 (Voodoo44 Lite)
+ 9005:0285:9005:02d7 Adaptec ASR-2805 (Voodoo80 Lite)
+ 9005:0285:9005:02d8 Adaptec 5405G (Voodoo40 PM)
+ 9005:0285:9005:02d9 Adaptec 5445G (Voodoo44 PM)
+ 9005:0285:9005:02da Adaptec 5805G (Voodoo80 PM)
+ 9005:0285:9005:02db Adaptec 5085G (Voodoo08 PM)
+ 9005:0285:9005:02dc Adaptec 51245G (Voodoo124 PM)
+ 9005:0285:9005:02dd Adaptec 51645G (Voodoo164 PM)
+ 9005:0285:9005:02de Adaptec 52445G (Voodoo244 PM)
+ 9005:0285:9005:02df Adaptec ASR-2045G (Voodoo04 Lite PM)
+ 9005:0285:9005:02e0 Adaptec ASR-2405G (Voodoo40 Lite PM)
+ 9005:0285:9005:02e1 Adaptec ASR-2445G (Voodoo44 Lite PM)
+ 9005:0285:9005:02e2 Adaptec ASR-2805G (Voodoo80 Lite PM)
1011:0046:9005:0364 Adaptec 5400S (Mustang)
+ 1011:0046:9005:0365 Adaptec 5400S (Mustang)
9005:0287:9005:0800 Adaptec Themisto (Jupiter)
9005:0200:9005:0200 Adaptec Themisto (Jupiter)
9005:0286:9005:0800 Adaptec Callisto (Jupiter)
1011:0046:9005:1364 Dell PERC 2/QC (Quad Channel, Mustang)
+ 1011:0046:9005:1365 Dell PERC 2/QC (Quad Channel, Mustang)
1028:0001:1028:0001 Dell PERC 2/Si (Iguana)
1028:0003:1028:0003 Dell PERC 3/Si (SlimFast)
1028:0002:1028:0002 Dell PERC 3/Di (Opal)
- 1028:0004:1028:0004 Dell PERC 3/DiF (Iguana)
+ 1028:0004:1028:0004 Dell PERC 3/SiF (Iguana)
+ 1028:0004:1028:00d0 Dell PERC 3/DiF (Iguana)
1028:0002:1028:00d1 Dell PERC 3/DiV (Viper)
1028:0002:1028:00d9 Dell PERC 3/DiL (Lexus)
1028:000a:1028:0106 Dell PERC 3/DiJ (Jaguar)
diff --git a/MAINTAINERS b/MAINTAINERS
index fc6c005..ee1c56a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2521,13 +2521,11 @@
L: linuxppc-dev@ozlabs.org
S: Maintained
-LINUX FOR POWERPC EMBEDDED MPC52XX
+LINUX FOR POWERPC EMBEDDED MPC5XXX
P: Sylvain Munaut
M: tnt@246tNt.com
P: Grant Likely
M: grant.likely@secretlab.ca
-W: http://www.246tNt.com/mpc52xx/
-W: http://www.penguinppc.org/
L: linuxppc-dev@ozlabs.org
S: Maintained
diff --git a/Makefile b/Makefile
index 5efdd88..1564577 100644
--- a/Makefile
+++ b/Makefile
@@ -1,3 +1,4 @@
+FRED=42
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 26
@@ -507,6 +508,8 @@
KBUILD_CFLAGS += -O2
endif
+include $(srctree)/arch/$(SRCARCH)/Makefile
+
ifneq (CONFIG_FRAME_WARN,0)
KBUILD_CFLAGS += $(call cc-option,-Wframe-larger-than=${CONFIG_FRAME_WARN})
endif
@@ -515,8 +518,6 @@
# Arch Makefiles may override this setting
KBUILD_CFLAGS += $(call cc-option, -fno-stack-protector)
-include $(srctree)/arch/$(SRCARCH)/Makefile
-
ifdef CONFIG_FRAME_POINTER
KBUILD_CFLAGS += -fno-omit-frame-pointer -fno-optimize-sibling-calls
else
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index d2be3ff..d21df5f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -181,38 +181,6 @@
Lemote Fulong mini-PC board based on the Chinese Loongson-2E CPU and
an FPGA northbridge
-config MIPS_ATLAS
- bool "MIPS Atlas board"
- select BOOT_ELF32
- select BOOT_RAW
- select CEVT_R4K
- select CSRC_R4K
- select DMA_NONCOHERENT
- select SYS_HAS_EARLY_PRINTK
- select IRQ_CPU
- select HW_HAS_PCI
- select MIPS_BOARDS_GEN
- select MIPS_BONITO64
- select PCI_GT64XXX_PCI0
- select MIPS_MSC
- select RM7000_CPU_SCACHE
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_MIPS32_R1
- select SYS_HAS_CPU_MIPS32_R2
- select SYS_HAS_CPU_MIPS64_R1
- select SYS_HAS_CPU_NEVADA
- select SYS_HAS_CPU_RM7000
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
- select SYS_SUPPORTS_SMARTMIPS
- select GENERIC_HARDIRQS_NO__DO_IRQ
- help
- This enables support for the MIPS Technologies Atlas evaluation
- board.
-
config MIPS_MALTA
bool "MIPS Malta board"
select ARCH_MAY_HAVE_PC_FDC
@@ -249,26 +217,6 @@
This enables support for the MIPS Technologies Malta evaluation
board.
-config MIPS_SEAD
- bool "MIPS SEAD board"
- select CEVT_R4K
- select CSRC_R4K
- select IRQ_CPU
- select DMA_NONCOHERENT
- select SYS_HAS_EARLY_PRINTK
- select MIPS_BOARDS_GEN
- select SYS_HAS_CPU_MIPS32_R1
- select SYS_HAS_CPU_MIPS32_R2
- select SYS_HAS_CPU_MIPS64_R1
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_SMARTMIPS
- help
- This enables support for the MIPS Technologies SEAD evaluation
- board.
-
config MIPS_SIM
bool 'MIPS simulator (MIPSsim)'
select CEVT_R4K
@@ -437,6 +385,8 @@
select SGI_HAS_DS1286
select SGI_HAS_I8042
select SGI_HAS_INDYDOG
+ select SGI_HAS_HAL2
+ select SGI_HAS_HAL2
select SGI_HAS_SEEQ
select SGI_HAS_WD93
select SGI_HAS_ZILOG
@@ -602,65 +552,11 @@
Technology and now in turn merged with Fujitsu. Say Y here to
support this machine type.
-config TOSHIBA_JMR3927
- bool "Toshiba JMR-TX3927 board"
- select CEVT_TXX9
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select MIPS_TX3927
- select IRQ_TXX9
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_TX39XX
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_BIG_ENDIAN
- select GENERIC_HARDIRQS_NO__DO_IRQ
- select GPIO_TXX9
+config MACH_TX39XX
+ bool "Toshiba TX39 series based machines"
-config TOSHIBA_RBTX4927
- bool "Toshiba RBTX49[23]7 board"
- select CEVT_R4K
- select CSRC_R4K
- select CEVT_TXX9
- select DMA_NONCOHERENT
- select HAS_TXX9_SERIAL
- select HW_HAS_PCI
- select IRQ_CPU
- select IRQ_TXX9
- select I8259 if TOSHIBA_FPCIB0
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_TX49XX
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_64BIT_KERNEL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_KGDB
- select GENERIC_HARDIRQS_NO__DO_IRQ
- help
- This Toshiba board is based on the TX4927 processor. Say Y here to
- support this machine type
-
-config TOSHIBA_RBTX4938
- bool "Toshiba RBTX4938 board"
- select CEVT_R4K
- select CSRC_R4K
- select CEVT_TXX9
- select DMA_NONCOHERENT
- select HAS_TXX9_SERIAL
- select HW_HAS_PCI
- select IRQ_CPU
- select IRQ_TXX9
- select SWAP_IO_SPACE
- select SYS_HAS_CPU_TX49XX
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_KGDB
- select GENERIC_HARDIRQS_NO__DO_IRQ
- select GPIO_TXX9
- help
- This Toshiba board is based on the TX4938 processor. Say Y here to
- support this machine type
+config MACH_TX49XX
+ bool "Toshiba TX49 series based machines"
config WR_PPMC
bool "Wind River PPMC board"
@@ -694,8 +590,7 @@
source "arch/mips/pmc-sierra/Kconfig"
source "arch/mips/sgi-ip27/Kconfig"
source "arch/mips/sibyte/Kconfig"
-source "arch/mips/tx4927/Kconfig"
-source "arch/mips/tx4938/Kconfig"
+source "arch/mips/txx9/Kconfig"
source "arch/mips/vr41xx/Kconfig"
endmenu
@@ -939,10 +834,6 @@
config NO_EXCEPT_FILL
bool
-config MIPS_TX3927
- bool
- select HAS_TXX9_SERIAL
-
config MIPS_RM9122
bool
select SERIAL_RM9000
@@ -979,6 +870,9 @@
config SGI_HAS_INDYDOG
bool
+config SGI_HAS_HAL2
+ bool
+
config SGI_HAS_SEEQ
bool
@@ -2065,10 +1959,6 @@
config TRAD_SIGNALS
bool
-config BINFMT_IRIX
- bool "Include IRIX binary compatibility"
- depends on CPU_BIG_ENDIAN && 32BIT && BROKEN
-
config MIPS32_COMPAT
bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
depends on 64BIT
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index ad36c94..3564533 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -14,7 +14,7 @@
KBUILD_DEFCONFIG := ip22_defconfig
-cflags-y :=
+cflags-y := -ffunction-sections
#
# Select the object file format to substitute into the linker script.
@@ -305,36 +305,14 @@
cflags-$(CONFIG_LEMOTE_FULONG) += -Iinclude/asm-mips/mach-lemote
#
-# For all MIPS, Inc. eval boards
-#
-core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
-
-#
-# MIPS Atlas board
-#
-core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/
-cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas
-cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips
-load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000
-all-$(CONFIG_MIPS_ATLAS) := vmlinux.bin
-
-#
# MIPS Malta board
#
-core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/
-cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips
+core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/
+cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-malta
load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000
all-$(CONFIG_MIPS_MALTA) := vmlinux.bin
#
-# MIPS SEAD board
-#
-core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/
-cflags-$(CONFIG_MIPS_SEAD) += -Iinclude/asm-mips/mach-mips
-load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000
-all-$(CONFIG_MIPS_SEAD) := vmlinux.srec
-
-#
# MIPS SIM
#
core-$(CONFIG_MIPS_SIM) += arch/mips/mipssim/
@@ -377,12 +355,6 @@
cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx
#
-# NEC VR4133
-#
-core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/
-load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000
-
-#
# ZAO Networks Capcella (VR4131)
#
load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000
@@ -573,29 +545,30 @@
all-$(CONFIG_SNI_RM) := vmlinux.ecoff
#
+# Common TXx9
+#
+core-$(CONFIG_MACH_TX39XX) += arch/mips/txx9/generic/
+cflags-$(CONFIG_MACH_TX39XX) += -Iinclude/asm-mips/mach-tx39xx
+load-$(CONFIG_MACH_TX39XX) += 0xffffffff80050000
+core-$(CONFIG_MACH_TX49XX) += arch/mips/txx9/generic/
+cflags-$(CONFIG_MACH_TX49XX) += -Iinclude/asm-mips/mach-tx49xx
+load-$(CONFIG_MACH_TX49XX) += 0xffffffff80100000
+
+#
# Toshiba JMR-TX3927 board
#
-core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \
- arch/mips/jmr3927/common/
-cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927
-load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000
+core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/txx9/jmr3927/
#
# Toshiba RBTX4927 board or
# Toshiba RBTX4937 board
#
-core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/
-core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/
-cflags-$(CONFIG_TOSHIBA_RBTX4927) += -Iinclude/asm-mips/mach-tx49xx
-load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000
+core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/txx9/rbtx4927/
#
# Toshiba RBTX4938 board
#
-core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/
-core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/
-cflags-$(CONFIG_TOSHIBA_RBTX4938) += -Iinclude/asm-mips/mach-tx49xx
-load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000
+core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/txx9/rbtx4938/
cflags-y += -Iinclude/asm-mips/mach-generic
drivers-$(CONFIG_PCI) += arch/mips/pci/
diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c
index 74d6d4a..dc8a67e 100644
--- a/arch/mips/au1000/common/platform.c
+++ b/arch/mips/au1000/common/platform.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/init.h>
@@ -77,14 +78,14 @@
};
/* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = ~(u32)0;
+static u64 ohci_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_ohci_device = {
.name = "au1xxx-ohci",
.id = 0,
.dev = {
.dma_mask = &ohci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ohci_resources),
.resource = au1xxx_usb_ohci_resources,
@@ -106,14 +107,14 @@
}
};
-static u64 au1100_lcd_dmamask = ~(u32)0;
+static u64 au1100_lcd_dmamask = DMA_32BIT_MASK;
static struct platform_device au1100_lcd_device = {
.name = "au1100-lcd",
.id = 0,
.dev = {
.dma_mask = &au1100_lcd_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1100_lcd_resources),
.resource = au1100_lcd_resources,
@@ -135,14 +136,14 @@
},
};
-static u64 ehci_dmamask = ~(u32)0;
+static u64 ehci_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_ehci_device = {
.name = "au1xxx-ehci",
.id = 0,
.dev = {
.dma_mask = &ehci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_ehci_resources),
.resource = au1xxx_usb_ehci_resources,
@@ -180,14 +181,14 @@
}
};
-static u64 udc_dmamask = ~(u32)0;
+static u64 udc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_gdt_device = {
.name = "au1xxx-udc",
.id = 0,
.dev = {
.dma_mask = &udc_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_gdt_resources),
.resource = au1xxx_usb_gdt_resources,
@@ -207,14 +208,14 @@
},
};
-static u64 uoc_dmamask = ~(u32)0;
+static u64 uoc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_usb_otg_device = {
.name = "au1xxx-uoc",
.id = 0,
.dev = {
.dma_mask = &uoc_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_usb_otg_resources),
.resource = au1xxx_usb_otg_resources,
@@ -233,27 +234,27 @@
}
};
-static u64 au1200_lcd_dmamask = ~(u32)0;
+static u64 au1200_lcd_dmamask = DMA_32BIT_MASK;
static struct platform_device au1200_lcd_device = {
.name = "au1200-lcd",
.id = 0,
.dev = {
.dma_mask = &au1200_lcd_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1200_lcd_resources),
.resource = au1200_lcd_resources,
};
-static u64 au1xxx_mmc_dmamask = ~(u32)0;
+static u64 au1xxx_mmc_dmamask = DMA_32BIT_MASK;
static struct platform_device au1xxx_mmc_device = {
.name = "au1xxx-mmc",
.id = 0,
.dev = {
.dma_mask = &au1xxx_mmc_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(au1xxx_mmc_resources),
.resource = au1xxx_mmc_resources,
diff --git a/arch/mips/au1000/mtx-1/platform.c b/arch/mips/au1000/mtx-1/platform.c
index 9807be3..8b5914d 100644
--- a/arch/mips/au1000/mtx-1/platform.c
+++ b/arch/mips/au1000/mtx-1/platform.c
@@ -24,6 +24,9 @@
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
+#include <mtd/mtd-abi.h>
static struct gpio_keys_button mtx1_gpio_button[] = {
{
@@ -85,10 +88,56 @@
}
};
+static struct mtd_partition mtx1_mtd_partitions[] = {
+ {
+ .name = "filesystem",
+ .size = 0x01C00000,
+ .offset = 0,
+ },
+ {
+ .name = "yamon",
+ .size = 0x00100000,
+ .offset = MTDPART_OFS_APPEND,
+ .mask_flags = MTD_WRITEABLE,
+ },
+ {
+ .name = "kernel",
+ .size = 0x002c0000,
+ .offset = MTDPART_OFS_APPEND,
+ },
+ {
+ .name = "yamon env",
+ .size = 0x00040000,
+ .offset = MTDPART_OFS_APPEND,
+ },
+};
+
+static struct physmap_flash_data mtx1_flash_data = {
+ .width = 4,
+ .nr_parts = 4,
+ .parts = mtx1_mtd_partitions,
+};
+
+static struct resource mtx1_mtd_resource = {
+ .start = 0x1e000000,
+ .end = 0x1fffffff,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device mtx1_mtd = {
+ .name = "physmap-flash",
+ .dev = {
+ .platform_data = &mtx1_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &mtx1_mtd_resource,
+};
+
static struct __initdata platform_device * mtx1_devs[] = {
&mtx1_gpio_leds,
&mtx1_wdt,
- &mtx1_button
+ &mtx1_button,
+ &mtx1_mtd,
};
static int __init mtx1_register_devices(void)
diff --git a/arch/mips/au1000/pb1200/platform.c b/arch/mips/au1000/pb1200/platform.c
index 5930110..f8fb0ae 100644
--- a/arch/mips/au1000/pb1200/platform.c
+++ b/arch/mips/au1000/pb1200/platform.c
@@ -18,6 +18,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/platform_device.h>
@@ -36,14 +37,14 @@
}
};
-static u64 ide_dmamask = ~(u32)0;
+static u64 ide_dmamask = DMA_32BIT_MASK;
static struct platform_device ide_device = {
.name = "au1200-ide",
.id = 0,
.dev = {
.dma_mask = &ide_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(ide_resources),
.resource = ide_resources
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
index d73833b..2379262 100644
--- a/arch/mips/cobalt/Makefile
+++ b/arch/mips/cobalt/Makefile
@@ -2,7 +2,7 @@
# Makefile for the Cobalt micro systems family specific parts of the kernel
#
-obj-y := buttons.o irq.o led.o reset.o rtc.o serial.o setup.o time.o
+obj-y := buttons.o irq.o lcd.o led.o reset.o rtc.o serial.o setup.o time.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_EARLY_PRINTK) += console.o
diff --git a/arch/mips/cobalt/lcd.c b/arch/mips/cobalt/lcd.c
new file mode 100644
index 0000000..0720e4f
--- /dev/null
+++ b/arch/mips/cobalt/lcd.c
@@ -0,0 +1,55 @@
+/*
+ * Registration of Cobalt LCD platform device.
+ *
+ * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+
+static struct resource cobalt_lcd_resource __initdata = {
+ .start = 0x1f000000,
+ .end = 0x1f00001f,
+ .flags = IORESOURCE_MEM,
+};
+
+static __init int cobalt_lcd_add(void)
+{
+ struct platform_device *pdev;
+ int retval;
+
+ pdev = platform_device_alloc("cobalt-lcd", -1);
+ if (!pdev)
+ return -ENOMEM;
+
+ retval = platform_device_add_resources(pdev, &cobalt_lcd_resource, 1);
+ if (retval)
+ goto err_free_device;
+
+ retval = platform_device_add(pdev);
+ if (retval)
+ goto err_free_device;
+
+ return 0;
+
+err_free_device:
+ platform_device_put(pdev);
+
+ return retval;
+}
+device_initcall(cobalt_lcd_add);
diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig
deleted file mode 100644
index 3443f6c..0000000
--- a/arch/mips/configs/atlas_defconfig
+++ /dev/null
@@ -1,1472 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.20
-# Sun Feb 18 21:27:35 2007
-#
-CONFIG_MIPS=y
-
-#
-# Machine selection
-#
-CONFIG_ZONE_DMA=y
-# CONFIG_MIPS_MTX1 is not set
-# CONFIG_MIPS_BOSPORUS is not set
-# CONFIG_MIPS_PB1000 is not set
-# CONFIG_MIPS_PB1100 is not set
-# CONFIG_MIPS_PB1500 is not set
-# CONFIG_MIPS_PB1550 is not set
-# CONFIG_MIPS_PB1200 is not set
-# CONFIG_MIPS_DB1000 is not set
-# CONFIG_MIPS_DB1100 is not set
-# CONFIG_MIPS_DB1500 is not set
-# CONFIG_MIPS_DB1550 is not set
-# CONFIG_MIPS_DB1200 is not set
-# CONFIG_MIPS_MIRAGE is not set
-# CONFIG_BASLER_EXCITE is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-CONFIG_MIPS_ATLAS=y
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_WR_PPMC is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_MIPS_XXS1500 is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_MARKEINS is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_TIME=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-CONFIG_MIPS_BONITO64=y
-CONFIG_MIPS_MSC=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_MIPS_GT64120=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_BOOT_ELF32=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_SYS_HAS_CPU_MIPS32_R2=y
-CONFIG_SYS_HAS_CPU_MIPS64_R1=y
-CONFIG_SYS_HAS_CPU_NEVADA=y
-CONFIG_SYS_HAS_CPU_RM7000=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPSR1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-
-#
-# Kernel type
-#
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_BOARD_SCACHE=y
-CONFIG_RM7000_CPU_SCACHE=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_VPE_LOADER is not set
-CONFIG_SYS_SUPPORTS_MULTITHREADING=y
-# CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_SMARTMIPS is not set
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_SYS_SUPPORTS_SMARTMIPS=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-# CONFIG_HZ_48 is not set
-CONFIG_HZ_100=y
-# CONFIG_HZ_128 is not set
-# CONFIG_HZ_250 is not set
-# CONFIG_HZ_256 is not set
-# CONFIG_HZ_1000 is not set
-# CONFIG_HZ_1024 is not set
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_HZ=100
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_KEXEC is not set
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
-# CONFIG_AUDIT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_RELAY=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_SLAB=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_KMOD=y
-
-#
-# Block layer
-#
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_HW_HAS_PCI=y
-CONFIG_PCI=y
-CONFIG_MMU=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# PCI Hotplug Support
-#
-# CONFIG_HOTPLUG_PCI is not set
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Power management options
-#
-CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
-# CONFIG_PM_DEBUG is not set
-# CONFIG_PM_SYSFS_DEPRECATED is not set
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_NETDEBUG is not set
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-CONFIG_XFRM_USER=m
-# CONFIG_XFRM_SUB_POLICY is not set
-CONFIG_XFRM_MIGRATE=y
-CONFIG_NET_KEY=y
-CONFIG_NET_KEY_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_ASK_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-# CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-CONFIG_NET_IPIP=m
-CONFIG_NET_IPGRE=m
-CONFIG_NET_IPGRE_BROADCAST=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-CONFIG_INET_AH=m
-CONFIG_INET_ESP=m
-CONFIG_INET_IPCOMP=m
-CONFIG_INET_XFRM_TUNNEL=m
-CONFIG_INET_TUNNEL=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INET_XFRM_MODE_BEET=m
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-CONFIG_TCP_MD5SIG=y
-
-#
-# IP: Virtual Server Configuration
-#
-CONFIG_IP_VS=m
-# CONFIG_IP_VS_DEBUG is not set
-CONFIG_IP_VS_TAB_BITS=12
-
-#
-# IPVS transport protocol load balancing support
-#
-CONFIG_IP_VS_PROTO_TCP=y
-CONFIG_IP_VS_PROTO_UDP=y
-CONFIG_IP_VS_PROTO_ESP=y
-CONFIG_IP_VS_PROTO_AH=y
-
-#
-# IPVS scheduler
-#
-CONFIG_IP_VS_RR=m
-CONFIG_IP_VS_WRR=m
-CONFIG_IP_VS_LC=m
-CONFIG_IP_VS_WLC=m
-CONFIG_IP_VS_LBLC=m
-CONFIG_IP_VS_LBLCR=m
-CONFIG_IP_VS_DH=m
-CONFIG_IP_VS_SH=m
-CONFIG_IP_VS_SED=m
-CONFIG_IP_VS_NQ=m
-
-#
-# IPVS application helper
-#
-CONFIG_IP_VS_FTP=m
-CONFIG_IPV6=m
-CONFIG_IPV6_PRIVACY=y
-CONFIG_IPV6_ROUTER_PREF=y
-CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=y
-CONFIG_INET6_XFRM_TUNNEL=m
-CONFIG_INET6_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_TRANSPORT=m
-CONFIG_INET6_XFRM_MODE_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_BEET=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_IPV6_SIT=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_IPV6_MULTIPLE_TABLES=y
-CONFIG_IPV6_SUBTREES=y
-CONFIG_NETWORK_SECMARK=y
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-CONFIG_BRIDGE_NETFILTER=y
-
-#
-# Core Netfilter Configuration
-#
-CONFIG_NETFILTER_NETLINK=m
-CONFIG_NETFILTER_NETLINK_QUEUE=m
-CONFIG_NETFILTER_NETLINK_LOG=m
-CONFIG_NF_CONNTRACK_ENABLED=m
-CONFIG_NF_CONNTRACK_SUPPORT=y
-# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CT_ACCT=y
-CONFIG_NF_CONNTRACK_MARK=y
-CONFIG_NF_CONNTRACK_SECMARK=y
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_GRE=m
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SANE=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NETFILTER_XTABLES=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NOTRACK=m
-CONFIG_NETFILTER_XT_TARGET_SECMARK=m
-CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-
-#
-# IP: Netfilter Configuration
-#
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_NF_CONNTRACK_PROC_COMPAT=y
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_IPRANGE=m
-CONFIG_IP_NF_MATCH_TOS=m
-CONFIG_IP_NF_MATCH_RECENT=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_MATCH_OWNER=m
-CONFIG_IP_NF_MATCH_ADDRTYPE=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_LOG=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT=m
-CONFIG_NF_NAT_NEEDED=y
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_SAME=m
-CONFIG_NF_NAT_SNMP_BASIC=m
-CONFIG_NF_NAT_PROTO_GRE=m
-CONFIG_NF_NAT_FTP=m
-CONFIG_NF_NAT_IRC=m
-CONFIG_NF_NAT_TFTP=m
-CONFIG_NF_NAT_AMANDA=m
-CONFIG_NF_NAT_PPTP=m
-CONFIG_NF_NAT_H323=m
-CONFIG_NF_NAT_SIP=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_TOS=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
-
-#
-# IPv6: Netfilter Configuration (EXPERIMENTAL)
-#
-CONFIG_NF_CONNTRACK_IPV6=m
-CONFIG_IP6_NF_QUEUE=m
-CONFIG_IP6_NF_IPTABLES=m
-CONFIG_IP6_NF_MATCH_RT=m
-CONFIG_IP6_NF_MATCH_OPTS=m
-CONFIG_IP6_NF_MATCH_FRAG=m
-CONFIG_IP6_NF_MATCH_HL=m
-CONFIG_IP6_NF_MATCH_OWNER=m
-CONFIG_IP6_NF_MATCH_IPV6HEADER=m
-CONFIG_IP6_NF_MATCH_AH=m
-CONFIG_IP6_NF_MATCH_MH=m
-CONFIG_IP6_NF_MATCH_EUI64=m
-CONFIG_IP6_NF_FILTER=m
-CONFIG_IP6_NF_TARGET_LOG=m
-CONFIG_IP6_NF_TARGET_REJECT=m
-CONFIG_IP6_NF_MANGLE=m
-CONFIG_IP6_NF_TARGET_HL=m
-CONFIG_IP6_NF_RAW=m
-
-#
-# Bridge: Netfilter Configuration
-#
-CONFIG_BRIDGE_NF_EBTABLES=m
-CONFIG_BRIDGE_EBT_BROUTE=m
-CONFIG_BRIDGE_EBT_T_FILTER=m
-CONFIG_BRIDGE_EBT_T_NAT=m
-CONFIG_BRIDGE_EBT_802_3=m
-CONFIG_BRIDGE_EBT_AMONG=m
-CONFIG_BRIDGE_EBT_ARP=m
-CONFIG_BRIDGE_EBT_IP=m
-CONFIG_BRIDGE_EBT_LIMIT=m
-CONFIG_BRIDGE_EBT_MARK=m
-CONFIG_BRIDGE_EBT_PKTTYPE=m
-CONFIG_BRIDGE_EBT_STP=m
-CONFIG_BRIDGE_EBT_VLAN=m
-CONFIG_BRIDGE_EBT_ARPREPLY=m
-CONFIG_BRIDGE_EBT_DNAT=m
-CONFIG_BRIDGE_EBT_MARK_T=m
-CONFIG_BRIDGE_EBT_REDIRECT=m
-CONFIG_BRIDGE_EBT_SNAT=m
-CONFIG_BRIDGE_EBT_LOG=m
-CONFIG_BRIDGE_EBT_ULOG=m
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IP_SCTP=m
-# CONFIG_SCTP_DBG_MSG is not set
-# CONFIG_SCTP_DBG_OBJCNT is not set
-# CONFIG_SCTP_HMAC_NONE is not set
-# CONFIG_SCTP_HMAC_SHA1 is not set
-CONFIG_SCTP_HMAC_MD5=y
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
-# CONFIG_TIPC is not set
-# CONFIG_ATM is not set
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-# CONFIG_DECNET is not set
-CONFIG_LLC=m
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-CONFIG_ATALK=m
-CONFIG_DEV_APPLETALK=m
-CONFIG_IPDDP=m
-CONFIG_IPDDP_ENCAP=y
-CONFIG_IPDDP_DECAP=y
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_FIFO=y
-CONFIG_NET_SCH_CLK_JIFFIES=y
-# CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set
-# CONFIG_NET_SCH_CLK_CPU is not set
-
-#
-# Queueing/Scheduling
-#
-CONFIG_NET_SCH_CBQ=m
-CONFIG_NET_SCH_HTB=m
-CONFIG_NET_SCH_HFSC=m
-CONFIG_NET_SCH_PRIO=m
-CONFIG_NET_SCH_RED=m
-CONFIG_NET_SCH_SFQ=m
-CONFIG_NET_SCH_TEQL=m
-CONFIG_NET_SCH_TBF=m
-CONFIG_NET_SCH_GRED=m
-CONFIG_NET_SCH_DSMARK=m
-CONFIG_NET_SCH_NETEM=m
-CONFIG_NET_SCH_INGRESS=m
-
-#
-# Classification
-#
-CONFIG_NET_CLS=y
-CONFIG_NET_CLS_BASIC=m
-CONFIG_NET_CLS_TCINDEX=m
-CONFIG_NET_CLS_ROUTE4=m
-CONFIG_NET_CLS_ROUTE=y
-CONFIG_NET_CLS_FW=m
-CONFIG_NET_CLS_U32=m
-# CONFIG_CLS_U32_PERF is not set
-# CONFIG_CLS_U32_MARK is not set
-CONFIG_NET_CLS_RSVP=m
-CONFIG_NET_CLS_RSVP6=m
-# CONFIG_NET_EMATCH is not set
-# CONFIG_NET_CLS_ACT is not set
-CONFIG_NET_CLS_POLICE=y
-CONFIG_NET_CLS_IND=y
-CONFIG_NET_ESTIMATOR=y
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-CONFIG_IEEE80211_CRYPT_CCMP=m
-CONFIG_IEEE80211_SOFTMAC=m
-# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
-CONFIG_WIRELESS_EXT=y
-CONFIG_FIB_RULES=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
-# CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-CONFIG_CONNECTOR=m
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-CONFIG_BLK_DEV_UMEM=m
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=m
-CONFIG_BLK_DEV_CRYPTOLOOP=m
-CONFIG_BLK_DEV_NBD=m
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_BLK_DEV_INITRD is not set
-CONFIG_CDROM_PKTCDVD=m
-CONFIG_CDROM_PKTCDVD_BUFFERS=8
-# CONFIG_CDROM_PKTCDVD_WCACHE is not set
-CONFIG_ATA_OVER_ETH=m
-
-#
-# Misc devices
-#
-CONFIG_SGI_IOC4=m
-# CONFIG_TIFM_CORE is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_IDE_MAX_HWIFS=4
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_IDE_ARM is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-CONFIG_RAID_ATTRS=m
-CONFIG_SCSI=y
-CONFIG_SCSI_TGT=m
-CONFIG_SCSI_NETLINK=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=m
-CONFIG_CHR_DEV_OSST=m
-CONFIG_BLK_DEV_SR=m
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=m
-CONFIG_CHR_DEV_SCH=m
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SCAN_ASYNC=y
-
-#
-# SCSI Transports
-#
-CONFIG_SCSI_SPI_ATTRS=y
-CONFIG_SCSI_FC_ATTRS=y
-CONFIG_SCSI_ISCSI_ATTRS=m
-CONFIG_SCSI_SAS_ATTRS=m
-CONFIG_SCSI_SAS_LIBSAS=m
-CONFIG_SCSI_SAS_LIBSAS_DEBUG=y
-
-#
-# SCSI low-level drivers
-#
-CONFIG_ISCSI_TCP=m
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-CONFIG_SCSI_AIC94XX=m
-# CONFIG_AIC94XX_DEBUG is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_ARCMSR is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_MEGARAID_SAS is not set
-# CONFIG_SCSI_HPTIOP is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_STEX is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-CONFIG_SCSI_SYM53C8XX_MMIO=y
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_QLA_FC is not set
-# CONFIG_SCSI_QLA_ISCSI is not set
-# CONFIG_SCSI_LPFC is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-# CONFIG_SCSI_SRP is not set
-
-#
-# Serial ATA (prod) and Parallel ATA (experimental) drivers
-#
-# CONFIG_ATA is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=m
-CONFIG_MD_LINEAR=m
-CONFIG_MD_RAID0=m
-CONFIG_MD_RAID1=m
-CONFIG_MD_RAID10=m
-CONFIG_MD_RAID456=m
-CONFIG_MD_RAID5_RESHAPE=y
-CONFIG_MD_MULTIPATH=m
-CONFIG_MD_FAULTY=m
-CONFIG_BLK_DEV_DM=m
-# CONFIG_DM_DEBUG is not set
-CONFIG_DM_CRYPT=m
-CONFIG_DM_SNAPSHOT=m
-CONFIG_DM_MIRROR=m
-CONFIG_DM_ZERO=m
-CONFIG_DM_MULTIPATH=m
-CONFIG_DM_MULTIPATH_EMC=m
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-# CONFIG_FUSION_SPI is not set
-# CONFIG_FUSION_FC is not set
-# CONFIG_FUSION_SAS is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-CONFIG_BONDING=m
-CONFIG_EQUALIZER=m
-CONFIG_TUN=m
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# PHY device support
-#
-CONFIG_PHYLIB=m
-
-#
-# MII PHY device drivers
-#
-CONFIG_MARVELL_PHY=m
-CONFIG_DAVICOM_PHY=m
-CONFIG_QSEMI_PHY=m
-CONFIG_LXT_PHY=m
-CONFIG_CICADA_PHY=m
-CONFIG_VITESSE_PHY=m
-CONFIG_SMSC_PHY=m
-# CONFIG_BROADCOM_PHY is not set
-# CONFIG_FIXED_PHY is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_DM9000 is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-CONFIG_PCNET32=y
-# CONFIG_PCNET32_NAPI is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-CONFIG_LAN_SAA9730=y
-# CONFIG_SC92031 is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-CONFIG_QLA3XXX=m
-# CONFIG_ATL1 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_CHELSIO_T1 is not set
-CONFIG_CHELSIO_T3=m
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-# CONFIG_MYRI10GE is not set
-CONFIG_NETXEN_NIC=m
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-# CONFIG_INPUT_FF_MEMLESS is not set
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=m
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-CONFIG_INPUT_MOUSE=y
-# CONFIG_MOUSE_PS2 is not set
-CONFIG_MOUSE_SERIAL=m
-# CONFIG_MOUSE_VSXXXAA is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_LIBPS2=y
-CONFIG_SERIO_RAW=y
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-CONFIG_VT_HW_CONSOLE_BINDING=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_PCI=m
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# HID Devices
-#
-CONFIG_HID=y
-# CONFIG_HID_DEBUG is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-CONFIG_USB_ARCH_HAS_EHCI=y
-# CONFIG_USB is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-
-#
-# Real Time Clock
-#
-# CONFIG_RTC_CLASS is not set
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Auxiliary Display support
-#
-
-#
-# Virtualization
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=m
-# CONFIG_REISERFS_CHECK is not set
-CONFIG_REISERFS_PROC_INFO=y
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-CONFIG_JFS_FS=m
-CONFIG_JFS_POSIX_ACL=y
-CONFIG_JFS_SECURITY=y
-# CONFIG_JFS_DEBUG is not set
-# CONFIG_JFS_STATISTICS is not set
-CONFIG_FS_POSIX_ACL=y
-CONFIG_XFS_FS=m
-CONFIG_XFS_QUOTA=y
-CONFIG_XFS_SECURITY=y
-CONFIG_XFS_POSIX_ACL=y
-# CONFIG_XFS_RT is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_OCFS2_FS is not set
-CONFIG_MINIX_FS=m
-CONFIG_ROMFS_FS=m
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-CONFIG_QUOTA=y
-# CONFIG_QFMT_V1 is not set
-CONFIG_QFMT_V2=y
-CONFIG_QUOTACTL=y
-CONFIG_DNOTIFY=y
-CONFIG_AUTOFS_FS=y
-# CONFIG_AUTOFS4_FS is not set
-CONFIG_FUSE_FS=m
-CONFIG_GENERIC_ACL=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=m
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=m
-CONFIG_UDF_NLS=y
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-CONFIG_CONFIGFS_FS=m
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-CONFIG_AFFS_FS=m
-CONFIG_HFS_FS=m
-CONFIG_HFSPLUS_FS=m
-CONFIG_BEFS_FS=m
-# CONFIG_BEFS_DEBUG is not set
-CONFIG_BFS_FS=m
-CONFIG_EFS_FS=m
-CONFIG_CRAMFS=m
-CONFIG_VXFS_FS=m
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-CONFIG_SYSV_FS=m
-CONFIG_UFS_FS=m
-# CONFIG_UFS_FS_WRITE is not set
-# CONFIG_UFS_DEBUG is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-# CONFIG_NFSD_V3_ACL is not set
-# CONFIG_NFSD_V4 is not set
-# CONFIG_NFSD_TCP is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-
-#
-# Distributed Lock Manager
-#
-CONFIG_DLM=m
-CONFIG_DLM_TCP=y
-# CONFIG_DLM_SCTP is not set
-# CONFIG_DLM_DEBUG is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-CONFIG_CRYPTO_ALGAPI=y
-CONFIG_CRYPTO_BLKCIPHER=m
-CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_MD4=m
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_SHA1=m
-CONFIG_CRYPTO_SHA256=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_GF128MUL=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_TWOFISH_COMMON=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_AES=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_ARC4=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_CRC32C=m
-CONFIG_CRYPTO_CAMELLIA=m
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Hardware crypto devices
-#
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC16=m
-CONFIG_CRC32=y
-CONFIG_LIBCRC32C=m
-CONFIG_ZLIB_INFLATE=m
-CONFIG_ZLIB_DEFLATE=m
-CONFIG_TEXTSEARCH=y
-CONFIG_TEXTSEARCH_KMP=m
-CONFIG_TEXTSEARCH_BM=m
-CONFIG_TEXTSEARCH_FSM=m
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig
index c0e42e7..d869433 100644
--- a/arch/mips/configs/bcm47xx_defconfig
+++ b/arch/mips/configs/bcm47xx_defconfig
@@ -16,9 +16,7 @@
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig
index 3b42cea..a3bbbf0 100644
--- a/arch/mips/configs/bigsur_defconfig
+++ b/arch/mips/configs/bigsur_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.25-rc7
-# Mon Mar 31 08:11:19 2008
+# Linux kernel version: 2.6.26-rc8
+# Wed Jul 2 17:02:55 2008
#
CONFIG_MIPS=y
@@ -16,9 +16,7 @@
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
@@ -148,6 +146,7 @@
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=0
@@ -156,6 +155,7 @@
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_NR_CPUS_DEFAULT_4=y
CONFIG_NR_CPUS=4
+# CONFIG_MIPS_CMP is not set
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
@@ -223,6 +223,7 @@
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
@@ -241,12 +242,14 @@
CONFIG_HAVE_OPROFILE=y
# CONFIG_HAVE_KPROBES is not set
# CONFIG_HAVE_KRETPROBES is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
CONFIG_MODVERSIONS=y
@@ -302,7 +305,6 @@
# Power management options
#
CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
# CONFIG_PM_DEBUG is not set
#
@@ -399,9 +401,11 @@
CONFIG_INET6_XFRM_MODE_BEET=m
CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
CONFIG_IPV6_TUNNEL=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_IPV6_SUBTREES=y
+# CONFIG_IPV6_MROUTE is not set
CONFIG_NETWORK_SECMARK=y
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_DEBUG is not set
@@ -600,7 +604,7 @@
CONFIG_BLK_DEV_TC86C001=m
# CONFIG_BLK_DEV_IDE_SWARM is not set
CONFIG_BLK_DEV_IDEDMA=y
-CONFIG_IDE_ARCH_OBSOLETE_INIT=y
+# CONFIG_BLK_DEV_HD_ONLY is not set
# CONFIG_BLK_DEV_HD is not set
#
@@ -617,11 +621,12 @@
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
+CONFIG_CHR_DEV_ST=m
# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-# CONFIG_CHR_DEV_SCH is not set
+CONFIG_BLK_DEV_SR=m
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=m
+CONFIG_CHR_DEV_SCH=m
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -650,6 +655,7 @@
# CONFIG_SCSI_AIC7XXX_OLD is not set
# CONFIG_SCSI_AIC79XX is not set
# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
# CONFIG_SCSI_ADVANSYS is not set
# CONFIG_SCSI_ARCMSR is not set
# CONFIG_MEGARAID_NEWGEN is not set
@@ -675,7 +681,10 @@
# CONFIG_SCSI_SRP is not set
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
# CONFIG_SATA_AHCI is not set
+CONFIG_SATA_SIL24=y
+CONFIG_ATA_SFF=y
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
# CONFIG_SATA_MV is not set
@@ -685,7 +694,6 @@
# CONFIG_SATA_PROMISE is not set
# CONFIG_SATA_SX4 is not set
# CONFIG_SATA_SIL is not set
-CONFIG_SATA_SIL24=y
# CONFIG_SATA_SIS is not set
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
@@ -730,12 +738,17 @@
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
# CONFIG_MD is not set
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
@@ -797,7 +810,6 @@
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
@@ -815,6 +827,7 @@
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
@@ -822,6 +835,7 @@
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
@@ -867,6 +881,7 @@
# Character devices
#
# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_COMPUTONE is not set
# CONFIG_ROCKETPORT is not set
@@ -903,7 +918,6 @@
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
@@ -914,13 +928,6 @@
CONFIG_I2C_CHARDEV=y
#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
# I2C Hardware Bus support
#
# CONFIG_I2C_ALI1535 is not set
@@ -946,6 +953,7 @@
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
#
# Miscellaneous I2C Chip support
@@ -955,23 +963,18 @@
CONFIG_SENSORS_PCF8574=y
# CONFIG_PCF8575 is not set
CONFIG_SENSORS_PCF8591=y
-# CONFIG_TPS65010 is not set
CONFIG_SENSORS_MAX6875=y
# CONFIG_SENSORS_TSL2550 is not set
CONFIG_I2C_DEBUG_CORE=y
CONFIG_I2C_DEBUG_ALGO=y
CONFIG_I2C_DEBUG_BUS=y
CONFIG_I2C_DEBUG_CHIP=y
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
#
@@ -984,12 +987,22 @@
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
# CONFIG_DAB is not set
#
@@ -1015,6 +1028,8 @@
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -1023,13 +1038,10 @@
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
-
-#
-# Userspace I/O
-#
# CONFIG_UIO is not set
#
@@ -1123,7 +1135,6 @@
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -1194,6 +1205,7 @@
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=2048
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
@@ -1204,6 +1216,7 @@
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
@@ -1217,6 +1230,7 @@
# CONFIG_DEBUG_KOBJECT is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
@@ -1237,53 +1251,82 @@
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_AEAD=m
CONFIG_CRYPTO_BLKCIPHER=y
-CONFIG_CRYPTO_SEQIV=m
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_GF128MUL=m
+CONFIG_CRYPTO_NULL=y
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=m
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+CONFIG_CRYPTO_CCM=m
+CONFIG_CRYPTO_GCM=m
+CONFIG_CRYPTO_SEQIV=m
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+CONFIG_CRYPTO_CTR=m
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_XTS=m
+
+#
+# Hash modes
+#
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_NULL=y
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
CONFIG_CRYPTO_MD4=m
CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_SHA1=m
CONFIG_CRYPTO_SHA256=m
CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_WP512=m
CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_GF128MUL=m
-CONFIG_CRYPTO_ECB=m
-CONFIG_CRYPTO_CBC=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_XTS=m
-CONFIG_CRYPTO_CTR=m
-CONFIG_CRYPTO_GCM=m
-CONFIG_CRYPTO_CCM=m
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_TWOFISH_COMMON=m
-CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_WP512=m
+
+#
+# Ciphers
+#
CONFIG_CRYPTO_AES=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAMELLIA=m
CONFIG_CRYPTO_CAST5=m
CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_DES=m
+CONFIG_CRYPTO_FCRYPT=m
CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_SEED=m
CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
CONFIG_CRYPTO_DEFLATE=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-# CONFIG_CRYPTO_CRC32C is not set
-CONFIG_CRYPTO_CAMELLIA=m
-# CONFIG_CRYPTO_TEST is not set
-CONFIG_CRYPTO_AUTHENC=m
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
@@ -1292,9 +1335,10 @@
# Library routines
#
CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=m
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index a94f14b..185df23 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -14,9 +14,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig
index b7295e9..2678b7e 100644
--- a/arch/mips/configs/cobalt_defconfig
+++ b/arch/mips/configs/cobalt_defconfig
@@ -14,9 +14,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig
index 3657896..ebb8ad6 100644
--- a/arch/mips/configs/db1000_defconfig
+++ b/arch/mips/configs/db1000_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig
index 5a90740..ad4e5ef 100644
--- a/arch/mips/configs/db1100_defconfig
+++ b/arch/mips/configs/db1100_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig
index 76f37a1..d0dc2e8 100644
--- a/arch/mips/configs/db1200_defconfig
+++ b/arch/mips/configs/db1200_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig
index 508c919..9155082 100644
--- a/arch/mips/configs/db1500_defconfig
+++ b/arch/mips/configs/db1500_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig
index 0c2c70d..e4e3244 100644
--- a/arch/mips/configs/db1550_defconfig
+++ b/arch/mips/configs/db1550_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig
index 58c2cd6..9e65e6a 100644
--- a/arch/mips/configs/decstation_defconfig
+++ b/arch/mips/configs/decstation_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
CONFIG_MACH_DECSTATION=y
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig
index 90d81f5..1bd84d4 100644
--- a/arch/mips/configs/e55_defconfig
+++ b/arch/mips/configs/e55_defconfig
@@ -14,9 +14,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/emma2rh_defconfig b/arch/mips/configs/emma2rh_defconfig
index f9a003c..634bb4e 100644
--- a/arch/mips/configs/emma2rh_defconfig
+++ b/arch/mips/configs/emma2rh_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig
index 15efacc..3572e80 100644
--- a/arch/mips/configs/excite_defconfig
+++ b/arch/mips/configs/excite_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/fulong_defconfig b/arch/mips/configs/fulong_defconfig
index 5887a17..6209800 100644
--- a/arch/mips/configs/fulong_defconfig
+++ b/arch/mips/configs/fulong_defconfig
@@ -14,9 +14,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_PNX8550_JBS is not set
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig
index 4f5e56c..cc8e6bf 100644
--- a/arch/mips/configs/ip22_defconfig
+++ b/arch/mips/configs/ip22_defconfig
@@ -15,9 +15,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig
index f40e437..138c575 100644
--- a/arch/mips/configs/ip27_defconfig
+++ b/arch/mips/configs/ip27_defconfig
@@ -14,9 +14,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig
index ec188be..822b01f 100644
--- a/arch/mips/configs/ip28_defconfig
+++ b/arch/mips/configs/ip28_defconfig
@@ -16,9 +16,7 @@
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig
index 2c5c624..fe4699d 100644
--- a/arch/mips/configs/ip32_defconfig
+++ b/arch/mips/configs/ip32_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig
index 5614874..bbacc35 100644
--- a/arch/mips/configs/jazz_defconfig
+++ b/arch/mips/configs/jazz_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
CONFIG_MACH_JAZZ=y
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index a7cd677..9d5bd2a 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23-rc1
-# Thu Aug 2 23:07:36 2007
+# Linux kernel version: 2.6.26-rc9
+# Fri Jul 11 23:01:36 2008
#
CONFIG_MIPS=y
@@ -10,13 +10,13 @@
#
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_BASLER_EXCITE is not set
+# CONFIG_BCM47XX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
@@ -26,6 +26,7 @@
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CARMEL is not set
@@ -36,28 +37,37 @@
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SNI_RM is not set
-CONFIG_TOSHIBA_JMR3927=y
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
+CONFIG_MACH_TX39XX=y
+# CONFIG_MACH_TX49XX is not set
# CONFIG_WR_PPMC is not set
+CONFIG_TOSHIBA_JMR3927=y
+CONFIG_SOC_TX3927=y
+# CONFIG_TOSHIBA_FPCIB0 is not set
+CONFIG_PICMG_PCI_BACKPLANE_DEFAULT=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_CEVT_TXX9=y
+CONFIG_GPIO_TXX9=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
+# CONFIG_HOTPLUG_CPU is not set
# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_IRQ_TXX9=y
-CONFIG_MIPS_TX3927=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
@@ -104,13 +114,20 @@
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
# CONFIG_HZ_48 is not set
# CONFIG_HZ_100 is not set
# CONFIG_HZ_128 is not set
@@ -144,18 +161,25 @@
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
# CONFIG_HOTPLUG is not set
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_COMPAT_BRK=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
@@ -168,6 +192,14 @@
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_KPROBES is not set
+# CONFIG_HAVE_KRETPROBES is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
@@ -189,20 +221,19 @@
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
#
# Bus options (PCI, PCMCIA, EISA, ISA, TC)
#
CONFIG_HW_HAS_PCI=y
CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
CONFIG_MMU=y
#
-# PCCARD (PCMCIA/CardBus) support
-#
-
-#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
@@ -212,6 +243,7 @@
#
# Power management options
#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
# CONFIG_PM is not set
#
@@ -245,25 +277,21 @@
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
+# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
-
-#
-# QoS and/or fair queueing
-#
# CONFIG_NET_SCHED is not set
#
@@ -271,6 +299,7 @@
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
@@ -279,6 +308,7 @@
#
# CONFIG_CFG80211 is not set
# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
@@ -307,6 +337,7 @@
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set
#
@@ -318,10 +349,6 @@
# CONFIG_SCSI_NETLINK is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
# CONFIG_FUSION is not set
#
@@ -329,7 +356,7 @@
#
#
-# An alternative FireWire stack is available with EXPERIMENTAL=y
+# A new alternative FireWire stack is available with EXPERIMENTAL=y
#
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
@@ -339,10 +366,27 @@
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
+# CONFIG_VETH is not set
# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
+# CONFIG_MII is not set
# CONFIG_AX88796 is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
@@ -351,6 +395,10 @@
# CONFIG_DM9000 is not set
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
CONFIG_NET_PCI=y
# CONFIG_PCNET32 is not set
# CONFIG_AMD8111_ETH is not set
@@ -358,13 +406,13 @@
# CONFIG_B44 is not set
# CONFIG_FORCEDETH is not set
CONFIG_TC35815=y
-# CONFIG_DGRS is not set
# CONFIG_EEPRO100 is not set
# CONFIG_E100 is not set
# CONFIG_FEALNX is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
# CONFIG_SIS900 is not set
# CONFIG_EPIC100 is not set
# CONFIG_SUNDANCE is not set
@@ -379,6 +427,7 @@
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_PPP is not set
@@ -400,7 +449,6 @@
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
@@ -424,6 +472,7 @@
# Character devices
#
# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
CONFIG_SERIAL_NONSTANDARD=y
# CONFIG_COMPUTONE is not set
# CONFIG_ROCKETPORT is not set
@@ -431,7 +480,6 @@
# CONFIG_DIGIEPCA is not set
# CONFIG_MOXA_INTELLIO is not set
# CONFIG_MOXA_SMARTIO is not set
-# CONFIG_MOXA_SMARTIO_NEW is not set
# CONFIG_ISI is not set
# CONFIG_SYNCLINKMP is not set
# CONFIG_SYNCLINK_GT is not set
@@ -463,22 +511,30 @@
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+CONFIG_HAVE_GPIO_LIB=y
#
-# SPI support
+# GPIO Support
#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
@@ -495,29 +551,46 @@
# CONFIG_WDTPCI is not set
#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
# CONFIG_DAB is not set
#
# Graphics support
#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set
-# CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
#
# Sound
@@ -526,7 +599,9 @@
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
@@ -551,9 +626,10 @@
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
CONFIG_RTC_DRV_DS1742=y
+# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_V3020 is not set
@@ -561,23 +637,6 @@
#
# on-CPU RTC drivers
#
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Userspace I/O
-#
# CONFIG_UIO is not set
#
@@ -590,12 +649,10 @@
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
+CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
@@ -622,7 +679,7 @@
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
@@ -630,17 +687,15 @@
# CONFIG_HFSPLUS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
+CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -656,10 +711,6 @@
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
# CONFIG_NLS is not set
#
@@ -667,13 +718,15 @@
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
-CONFIG_CROSSCOMPILE=y
+# CONFIG_SAMPLES is not set
CONFIG_CMDLINE=""
#
@@ -687,6 +740,7 @@
# Library routines
#
CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
diff --git a/arch/mips/configs/lasat_defconfig b/arch/mips/configs/lasat_defconfig
index e6aef99..bc9159f 100644
--- a/arch/mips/configs/lasat_defconfig
+++ b/arch/mips/configs/lasat_defconfig
@@ -15,9 +15,7 @@
# CONFIG_MACH_JAZZ is not set
CONFIG_LASAT=y
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig
index 3d0da95..74daa0c 100644
--- a/arch/mips/configs/malta_defconfig
+++ b/arch/mips/configs/malta_defconfig
@@ -15,9 +15,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
CONFIG_MIPS_MALTA=y
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
@@ -68,7 +66,6 @@
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
-CONFIG_MIPS_BOARDS_GEN=y
CONFIG_PCI_GT64XXX_PCI0=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_BOOT_ELF32=y
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig
index 4f6bce9..2c0a631 100644
--- a/arch/mips/configs/mipssim_defconfig
+++ b/arch/mips/configs/mipssim_defconfig
@@ -16,9 +16,7 @@
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
CONFIG_MIPS_SIM=y
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig
index 27e23fc..8c720e5 100644
--- a/arch/mips/configs/mpc30x_defconfig
+++ b/arch/mips/configs/mpc30x_defconfig
@@ -14,9 +14,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/msp71xx_defconfig b/arch/mips/configs/msp71xx_defconfig
index b12b73f6..59d1947 100644
--- a/arch/mips/configs/msp71xx_defconfig
+++ b/arch/mips/configs/msp71xx_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig
index fa3aa39..bacf0dd 100644
--- a/arch/mips/configs/mtx1_defconfig
+++ b/arch/mips/configs/mtx1_defconfig
@@ -14,9 +14,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig
index 1d0157d..6dfe6f7 100644
--- a/arch/mips/configs/pb1100_defconfig
+++ b/arch/mips/configs/pb1100_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig
index d0491a0..c965a87 100644
--- a/arch/mips/configs/pb1500_defconfig
+++ b/arch/mips/configs/pb1500_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig
index 16d78d3..0778996 100644
--- a/arch/mips/configs/pb1550_defconfig
+++ b/arch/mips/configs/pb1550_defconfig
@@ -27,9 +27,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig
index 780c7fc..37c7b5f 100644
--- a/arch/mips/configs/pnx8550-jbs_defconfig
+++ b/arch/mips/configs/pnx8550-jbs_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig
index 267f21e..893e5c4 100644
--- a/arch/mips/configs/pnx8550-stb810_defconfig
+++ b/arch/mips/configs/pnx8550-stb810_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/rbhma4200_defconfig b/arch/mips/configs/rbhma4200_defconfig
deleted file mode 100644
index 470f6f4..0000000
--- a/arch/mips/configs/rbhma4200_defconfig
+++ /dev/null
@@ -1,669 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23-rc1
-# Thu Aug 2 22:55:57 2007
-#
-CONFIG_MIPS=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_ALCHEMY is not set
-# CONFIG_BASLER_EXCITE is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MARKEINS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_PMC_MSP is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-CONFIG_TOSHIBA_RBTX4927=y
-# CONFIG_TOSHIBA_RBTX4938 is not set
-# CONFIG_WR_PPMC is not set
-# CONFIG_TOSHIBA_FPCIB0 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_TIME=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-# CONFIG_NO_IOPORT is not set
-CONFIG_CPU_BIG_ENDIAN=y
-# CONFIG_CPU_LITTLE_ENDIAN is not set
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_IRQ_TXX9=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-
-#
-# CPU selection
-#
-# CONFIG_CPU_LOONGSON2 is not set
-# CONFIG_CPU_MIPS32_R1 is not set
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-CONFIG_CPU_TX49XX=y
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_TX49XX=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
-
-#
-# Kernel type
-#
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=0
-CONFIG_VIRT_TO_BUS=y
-# CONFIG_HZ_48 is not set
-# CONFIG_HZ_100 is not set
-# CONFIG_HZ_128 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_256 is not set
-# CONFIG_HZ_1000 is not set
-# CONFIG_HZ_1024 is not set
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_HZ=250
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_SECCOMP is not set
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# General setup
-#
-# CONFIG_EXPERIMENTAL is not set
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_AUDIT is not set
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED=y
-# CONFIG_RELAY is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-# CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
-# CONFIG_EPOLL is not set
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
-# CONFIG_SLOB is not set
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-CONFIG_MODULES=y
-# CONFIG_MODULE_UNLOAD is not set
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_HW_HAS_PCI=y
-CONFIG_PCI=y
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-CONFIG_MMU=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Power management options
-#
-# CONFIG_PM is not set
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETWORK_SECMARK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-
-#
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_IEEE80211 is not set
-# CONFIG_RFKILL is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_SYS_HYPERVISOR is not set
-# CONFIG_CONNECTOR is not set
-# CONFIG_MTD is not set
-# CONFIG_PARPORT is not set
-CONFIG_BLK_DEV=y
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-# CONFIG_MISC_DEVICES is not set
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SCSI_NETLINK is not set
-# CONFIG_ATA is not set
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# An alternative FireWire stack is available with EXPERIMENTAL=y
-#
-# CONFIG_IEEE1394 is not set
-# CONFIG_I2O is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_AX88796 is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_DM9000 is not set
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NE2000=y
-# CONFIG_NET_PCI is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_ISDN is not set
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_TXX9=y
-CONFIG_HAS_TXX9_SERIAL=y
-CONFIG_SERIAL_TXX9_NR_UARTS=6
-CONFIG_SERIAL_TXX9_CONSOLE=y
-CONFIG_SERIAL_TXX9_STDSERIAL=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_IPMI_HANDLER is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-CONFIG_DEVPORT=y
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-# CONFIG_W1 is not set
-# CONFIG_POWER_SUPPLY is not set
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-
-#
-# Watchdog Device Drivers
-#
-# CONFIG_SOFT_WATCHDOG is not set
-CONFIG_TXX9_WDT=m
-
-#
-# PCI-based Watchdog Cards
-#
-# CONFIG_PCIPCWATCHDOG is not set
-# CONFIG_WDTPCI is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MFD_SM501 is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
-
-#
-# Graphics support
-#
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Display device support
-#
-# CONFIG_DISPLAY_SUPPORT is not set
-# CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_MMC is not set
-# CONFIG_NEW_LEDS is not set
-# CONFIG_INFINIBAND is not set
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-# CONFIG_RTC_DEBUG is not set
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
-# CONFIG_RTC_DRV_TEST is not set
-
-#
-# SPI RTC drivers
-#
-
-#
-# Platform RTC drivers
-#
-# CONFIG_RTC_DRV_CMOS is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
-CONFIG_RTC_DRV_DS1742=y
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_M48T59 is not set
-# CONFIG_RTC_DRV_V3020 is not set
-
-#
-# on-CPU RTC drivers
-#
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Userspace I/O
-#
-# CONFIG_UIO is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-CONFIG_GENERIC_ACL=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_PROC_KCORE is not set
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-CONFIG_SYS_SUPPORTS_KGDB=y
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
-CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig
deleted file mode 100644
index 5a39f56..0000000
--- a/arch/mips/configs/rbhma4500_defconfig
+++ /dev/null
@@ -1,701 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.23-rc1
-# Thu Aug 2 22:59:53 2007
-#
-CONFIG_MIPS=y
-
-#
-# Machine selection
-#
-# CONFIG_MACH_ALCHEMY is not set
-# CONFIG_BASLER_EXCITE is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MARKEINS is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_PMC_MSP is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-CONFIG_TOSHIBA_RBTX4938=y
-# CONFIG_WR_PPMC is not set
-
-#
-# Multiplex Pin Select
-#
-CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61=y
-# CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND is not set
-# CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_TIME=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-# CONFIG_NO_IOPORT is not set
-CONFIG_GENERIC_GPIO=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_IRQ_TXX9=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-
-#
-# CPU selection
-#
-# CONFIG_CPU_LOONGSON2 is not set
-# CONFIG_CPU_MIPS32_R1 is not set
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-CONFIG_CPU_TX49XX=y
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_TX49XX=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
-
-#
-# Kernel type
-#
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-CONFIG_CPU_HAS_LLSC=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=0
-CONFIG_VIRT_TO_BUS=y
-# CONFIG_HZ_48 is not set
-# CONFIG_HZ_100 is not set
-# CONFIG_HZ_128 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_256 is not set
-# CONFIG_HZ_1000 is not set
-# CONFIG_HZ_1024 is not set
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_HZ=250
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_SECCOMP is not set
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# General setup
-#
-# CONFIG_EXPERIMENTAL is not set
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_AUDIT is not set
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_SYSFS_DEPRECATED=y
-# CONFIG_RELAY is not set
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-# CONFIG_FUTEX is not set
-CONFIG_ANON_INODES=y
-# CONFIG_EPOLL is not set
-CONFIG_SIGNALFD=y
-CONFIG_TIMERFD=y
-CONFIG_EVENTFD=y
-CONFIG_SHMEM=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_SLAB=y
-# CONFIG_SLUB is not set
-# CONFIG_SLOB is not set
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-CONFIG_MODULES=y
-# CONFIG_MODULE_UNLOAD is not set
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_HW_HAS_PCI=y
-CONFIG_PCI=y
-# CONFIG_ARCH_SUPPORTS_MSI is not set
-CONFIG_MMU=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Power management options
-#
-# CONFIG_PM is not set
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETWORK_SECMARK is not set
-# CONFIG_NETFILTER is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-
-#
-# Wireless
-#
-# CONFIG_CFG80211 is not set
-# CONFIG_WIRELESS_EXT is not set
-# CONFIG_IEEE80211 is not set
-# CONFIG_RFKILL is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_SYS_HYPERVISOR is not set
-# CONFIG_CONNECTOR is not set
-# CONFIG_MTD is not set
-# CONFIG_PARPORT is not set
-CONFIG_BLK_DEV=y
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-# CONFIG_MISC_DEVICES is not set
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SCSI_NETLINK is not set
-# CONFIG_ATA is not set
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# An alternative FireWire stack is available with EXPERIMENTAL=y
-#
-# CONFIG_IEEE1394 is not set
-# CONFIG_I2O is not set
-CONFIG_NETDEVICES=y
-# CONFIG_NETDEVICES_MULTIQUEUE is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ARCNET is not set
-# CONFIG_PHYLIB is not set
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_AX88796 is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_DM9000 is not set
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NE2000=y
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-CONFIG_TC35815=y
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_TR is not set
-
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_ISDN is not set
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_TXX9=y
-CONFIG_HAS_TXX9_SERIAL=y
-CONFIG_SERIAL_TXX9_NR_UARTS=6
-CONFIG_SERIAL_TXX9_CONSOLE=y
-CONFIG_SERIAL_TXX9_STDSERIAL=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_IPMI_HANDLER is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-CONFIG_DEVPORT=y
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-CONFIG_SPI=y
-CONFIG_SPI_MASTER=y
-
-#
-# SPI Master Controller Drivers
-#
-CONFIG_SPI_TXX9=y
-
-#
-# SPI Protocol Masters
-#
-CONFIG_SPI_AT25=y
-# CONFIG_SPI_TLE62X0 is not set
-# CONFIG_W1 is not set
-# CONFIG_POWER_SUPPLY is not set
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-
-#
-# Watchdog Device Drivers
-#
-# CONFIG_SOFT_WATCHDOG is not set
-CONFIG_TXX9_WDT=m
-
-#
-# PCI-based Watchdog Cards
-#
-# CONFIG_PCIPCWATCHDOG is not set
-# CONFIG_WDTPCI is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MFD_SM501 is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_DAB is not set
-
-#
-# Graphics support
-#
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Display device support
-#
-# CONFIG_DISPLAY_SUPPORT is not set
-# CONFIG_VGASTATE is not set
-# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-# CONFIG_USB_SUPPORT is not set
-# CONFIG_MMC is not set
-# CONFIG_NEW_LEDS is not set
-# CONFIG_INFINIBAND is not set
-CONFIG_RTC_LIB=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_HCTOSYS=y
-CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
-# CONFIG_RTC_DEBUG is not set
-
-#
-# RTC interfaces
-#
-CONFIG_RTC_INTF_SYSFS=y
-CONFIG_RTC_INTF_PROC=y
-CONFIG_RTC_INTF_DEV=y
-CONFIG_RTC_INTF_DEV_UIE_EMUL=y
-# CONFIG_RTC_DRV_TEST is not set
-
-#
-# SPI RTC drivers
-#
-CONFIG_RTC_DRV_RS5C348=y
-# CONFIG_RTC_DRV_MAX6902 is not set
-
-#
-# Platform RTC drivers
-#
-# CONFIG_RTC_DRV_CMOS is not set
-# CONFIG_RTC_DRV_DS1553 is not set
-# CONFIG_RTC_DRV_STK17TA8 is not set
-# CONFIG_RTC_DRV_DS1742 is not set
-# CONFIG_RTC_DRV_M48T86 is not set
-# CONFIG_RTC_DRV_M48T59 is not set
-# CONFIG_RTC_DRV_V3020 is not set
-
-#
-# on-CPU RTC drivers
-#
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Userspace I/O
-#
-# CONFIG_UIO is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-# CONFIG_DNOTIFY is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-CONFIG_GENERIC_ACL=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_PROC_KCORE is not set
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-CONFIG_SYS_SUPPORTS_KGDB=y
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
-CONFIG_CRC32=y
-# CONFIG_CRC7 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-CONFIG_HAS_DMA=y
diff --git a/arch/mips/configs/rbtx49xx_defconfig b/arch/mips/configs/rbtx49xx_defconfig
new file mode 100644
index 0000000..e42aed5
--- /dev/null
+++ b/arch/mips/configs/rbtx49xx_defconfig
@@ -0,0 +1,767 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc9
+# Fri Jul 11 23:03:21 2008
+#
+CONFIG_MIPS=y
+
+#
+# Machine selection
+#
+# CONFIG_MACH_ALCHEMY is not set
+# CONFIG_BASLER_EXCITE is not set
+# CONFIG_BCM47XX is not set
+# CONFIG_MIPS_COBALT is not set
+# CONFIG_MACH_DECSTATION is not set
+# CONFIG_MACH_JAZZ is not set
+# CONFIG_LASAT is not set
+# CONFIG_LEMOTE_FULONG is not set
+# CONFIG_MIPS_MALTA is not set
+# CONFIG_MIPS_SIM is not set
+# CONFIG_MARKEINS is not set
+# CONFIG_MACH_VR41XX is not set
+# CONFIG_PNX8550_JBS is not set
+# CONFIG_PNX8550_STB810 is not set
+# CONFIG_PMC_MSP is not set
+# CONFIG_PMC_YOSEMITE is not set
+# CONFIG_SGI_IP22 is not set
+# CONFIG_SGI_IP27 is not set
+# CONFIG_SGI_IP28 is not set
+# CONFIG_SGI_IP32 is not set
+# CONFIG_SIBYTE_CRHINE is not set
+# CONFIG_SIBYTE_CARMEL is not set
+# CONFIG_SIBYTE_CRHONE is not set
+# CONFIG_SIBYTE_RHONE is not set
+# CONFIG_SIBYTE_SWARM is not set
+# CONFIG_SIBYTE_LITTLESUR is not set
+# CONFIG_SIBYTE_SENTOSA is not set
+# CONFIG_SIBYTE_BIGSUR is not set
+# CONFIG_SNI_RM is not set
+# CONFIG_MACH_TX39XX is not set
+CONFIG_MACH_TX49XX=y
+# CONFIG_WR_PPMC is not set
+CONFIG_TOSHIBA_RBTX4927=y
+CONFIG_TOSHIBA_RBTX4938=y
+CONFIG_SOC_TX4927=y
+CONFIG_SOC_TX4938=y
+# CONFIG_TOSHIBA_FPCIB0 is not set
+CONFIG_PICMG_PCI_BACKPLANE_DEFAULT=y
+
+#
+# Multiplex Pin Select
+#
+CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61=y
+# CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND is not set
+# CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA is not set
+CONFIG_PCI_TX4927=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_SUPPORTS_OPROFILE=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_CEVT_R4K=y
+CONFIG_CEVT_TXX9=y
+CONFIG_CSRC_R4K=y
+CONFIG_GPIO_TXX9=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
+# CONFIG_HOTPLUG_CPU is not set
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_GPIO=y
+CONFIG_CPU_BIG_ENDIAN=y
+# CONFIG_CPU_LITTLE_ENDIAN is not set
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
+CONFIG_IRQ_CPU=y
+CONFIG_IRQ_TXX9=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_MIPS_L1_CACHE_SHIFT=5
+
+#
+# CPU selection
+#
+# CONFIG_CPU_LOONGSON2 is not set
+# CONFIG_CPU_MIPS32_R1 is not set
+# CONFIG_CPU_MIPS32_R2 is not set
+# CONFIG_CPU_MIPS64_R1 is not set
+# CONFIG_CPU_MIPS64_R2 is not set
+# CONFIG_CPU_R3000 is not set
+# CONFIG_CPU_TX39XX is not set
+# CONFIG_CPU_VR41XX is not set
+# CONFIG_CPU_R4300 is not set
+# CONFIG_CPU_R4X00 is not set
+CONFIG_CPU_TX49XX=y
+# CONFIG_CPU_R5000 is not set
+# CONFIG_CPU_R5432 is not set
+# CONFIG_CPU_R6000 is not set
+# CONFIG_CPU_NEVADA is not set
+# CONFIG_CPU_R8000 is not set
+# CONFIG_CPU_R10000 is not set
+# CONFIG_CPU_RM7000 is not set
+# CONFIG_CPU_RM9000 is not set
+# CONFIG_CPU_SB1 is not set
+CONFIG_SYS_HAS_CPU_TX49XX=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
+
+#
+# Kernel type
+#
+CONFIG_32BIT=y
+# CONFIG_64BIT is not set
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_MIPS_MT_DISABLED=y
+# CONFIG_MIPS_MT_SMP is not set
+# CONFIG_MIPS_MT_SMTC is not set
+CONFIG_CPU_HAS_LLSC=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_48 is not set
+# CONFIG_HZ_100 is not set
+# CONFIG_HZ_128 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_256 is not set
+# CONFIG_HZ_1000 is not set
+# CONFIG_HZ_1024 is not set
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_SECCOMP is not set
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_HOTPLUG is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+# CONFIG_PCSPKR_PLATFORM is not set
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+# CONFIG_FUTEX is not set
+CONFIG_ANON_INODES=y
+# CONFIG_EPOLL is not set
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_HAVE_KPROBES is not set
+# CONFIG_HAVE_KRETPROBES is not set
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Bus options (PCI, PCMCIA, EISA, ISA, TC)
+#
+CONFIG_HW_HAS_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCI_LEGACY is not set
+CONFIG_MMU=y
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_TRAD_SIGNALS=y
+
+#
+# Power management options
+#
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# CONFIG_PM is not set
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# A new alternative FireWire stack is available with EXPERIMENTAL=y
+#
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_AX88796 is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_DM9000 is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NE2000=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+CONFIG_TC35815=y
+# CONFIG_EEPRO100 is not set
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139TOO is not set
+# CONFIG_R6040 is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_TXX9=y
+CONFIG_HAS_TXX9_SERIAL=y
+CONFIG_SERIAL_TXX9_NR_UARTS=6
+CONFIG_SERIAL_TXX9_CONSOLE=y
+CONFIG_SERIAL_TXX9_STDSERIAL=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+CONFIG_DEVPORT=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_TXX9=y
+
+#
+# SPI Protocol Masters
+#
+CONFIG_SPI_AT25=y
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_HAVE_GPIO_LIB=y
+
+#
+# GPIO Support
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_TXX9_WDT=m
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+CONFIG_RTC_DRV_RS5C348=y
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+CONFIG_RTC_DRV_DS1742=y
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SAMPLES is not set
+CONFIG_CMDLINE=""
+CONFIG_SYS_SUPPORTS_KGDB=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig
index 56371b8..0f4da03 100644
--- a/arch/mips/configs/rm200_defconfig
+++ b/arch/mips/configs/rm200_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig
index 4b87998..1ea9786 100644
--- a/arch/mips/configs/sb1250-swarm_defconfig
+++ b/arch/mips/configs/sb1250-swarm_defconfig
@@ -16,9 +16,7 @@
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
# CONFIG_MACH_VR41XX is not set
diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig
deleted file mode 100644
index 3ee75b1..0000000
--- a/arch/mips/configs/sead_defconfig
+++ /dev/null
@@ -1,642 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.20
-# Sun Feb 18 21:28:10 2007
-#
-CONFIG_MIPS=y
-
-#
-# Machine selection
-#
-CONFIG_ZONE_DMA=y
-# CONFIG_MIPS_MTX1 is not set
-# CONFIG_MIPS_BOSPORUS is not set
-# CONFIG_MIPS_PB1000 is not set
-# CONFIG_MIPS_PB1100 is not set
-# CONFIG_MIPS_PB1500 is not set
-# CONFIG_MIPS_PB1550 is not set
-# CONFIG_MIPS_PB1200 is not set
-# CONFIG_MIPS_DB1000 is not set
-# CONFIG_MIPS_DB1100 is not set
-# CONFIG_MIPS_DB1500 is not set
-# CONFIG_MIPS_DB1550 is not set
-# CONFIG_MIPS_DB1200 is not set
-# CONFIG_MIPS_MIRAGE is not set
-# CONFIG_BASLER_EXCITE is not set
-# CONFIG_MIPS_COBALT is not set
-# CONFIG_MACH_DECSTATION is not set
-# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
-# CONFIG_MIPS_MALTA is not set
-CONFIG_MIPS_SEAD=y
-# CONFIG_WR_PPMC is not set
-# CONFIG_MIPS_SIM is not set
-# CONFIG_MOMENCO_JAGUAR_ATX is not set
-# CONFIG_MIPS_XXS1500 is not set
-# CONFIG_PNX8550_JBS is not set
-# CONFIG_PNX8550_STB810 is not set
-# CONFIG_MACH_VR41XX is not set
-# CONFIG_PMC_YOSEMITE is not set
-# CONFIG_MARKEINS is not set
-# CONFIG_SGI_IP22 is not set
-# CONFIG_SGI_IP27 is not set
-# CONFIG_SGI_IP32 is not set
-# CONFIG_SIBYTE_BIGSUR is not set
-# CONFIG_SIBYTE_SWARM is not set
-# CONFIG_SIBYTE_SENTOSA is not set
-# CONFIG_SIBYTE_RHONE is not set
-# CONFIG_SIBYTE_CARMEL is not set
-# CONFIG_SIBYTE_LITTLESUR is not set
-# CONFIG_SIBYTE_CRHINE is not set
-# CONFIG_SIBYTE_CRHONE is not set
-# CONFIG_SNI_RM is not set
-# CONFIG_TOSHIBA_JMR3927 is not set
-# CONFIG_TOSHIBA_RBTX4927 is not set
-# CONFIG_TOSHIBA_RBTX4938 is not set
-CONFIG_RWSEM_GENERIC_SPINLOCK=y
-# CONFIG_ARCH_HAS_ILOG2_U32 is not set
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_GENERIC_TIME=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DMA_NEED_PCI_MAP_STATE=y
-# CONFIG_CPU_BIG_ENDIAN is not set
-CONFIG_CPU_LITTLE_ENDIAN=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
-CONFIG_IRQ_CPU=y
-CONFIG_MIPS_BOARDS_GEN=y
-CONFIG_MIPS_L1_CACHE_SHIFT=5
-
-#
-# CPU selection
-#
-CONFIG_CPU_MIPS32_R1=y
-# CONFIG_CPU_MIPS32_R2 is not set
-# CONFIG_CPU_MIPS64_R1 is not set
-# CONFIG_CPU_MIPS64_R2 is not set
-# CONFIG_CPU_R3000 is not set
-# CONFIG_CPU_TX39XX is not set
-# CONFIG_CPU_VR41XX is not set
-# CONFIG_CPU_R4300 is not set
-# CONFIG_CPU_R4X00 is not set
-# CONFIG_CPU_TX49XX is not set
-# CONFIG_CPU_R5000 is not set
-# CONFIG_CPU_R5432 is not set
-# CONFIG_CPU_R6000 is not set
-# CONFIG_CPU_NEVADA is not set
-# CONFIG_CPU_R8000 is not set
-# CONFIG_CPU_R10000 is not set
-# CONFIG_CPU_RM7000 is not set
-# CONFIG_CPU_RM9000 is not set
-# CONFIG_CPU_SB1 is not set
-CONFIG_SYS_HAS_CPU_MIPS32_R1=y
-CONFIG_SYS_HAS_CPU_MIPS32_R2=y
-CONFIG_SYS_HAS_CPU_MIPS64_R1=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_MIPSR1=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-
-#
-# Kernel type
-#
-CONFIG_32BIT=y
-# CONFIG_64BIT is not set
-CONFIG_PAGE_SIZE_4KB=y
-# CONFIG_PAGE_SIZE_8KB is not set
-# CONFIG_PAGE_SIZE_16KB is not set
-# CONFIG_PAGE_SIZE_64KB is not set
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_MIPS_MT_DISABLED=y
-# CONFIG_MIPS_MT_SMP is not set
-# CONFIG_MIPS_MT_SMTC is not set
-# CONFIG_MIPS_VPE_LOADER is not set
-# CONFIG_64BIT_PHYS_ADDR is not set
-CONFIG_CPU_HAS_LLSC=y
-# CONFIG_CPU_HAS_SMARTMIPS is not set
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_GENERIC_IRQ_PROBE=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_SYS_SUPPORTS_SMARTMIPS=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-# CONFIG_HZ_48 is not set
-# CONFIG_HZ_100 is not set
-# CONFIG_HZ_128 is not set
-# CONFIG_HZ_250 is not set
-# CONFIG_HZ_256 is not set
-CONFIG_HZ_1000=y
-# CONFIG_HZ_1024 is not set
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_HZ=1000
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_KEXEC is not set
-CONFIG_LOCKDEP_SUPPORT=y
-CONFIG_STACKTRACE_SUPPORT=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
-CONFIG_SYSVIPC_SYSCTL=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_UTS_NS is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_SYSFS_DEPRECATED=y
-CONFIG_RELAY=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_SLAB=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Block layer
-#
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Bus options (PCI, PCMCIA, EISA, ISA, TC)
-#
-CONFIG_MMU=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-
-#
-# PCI Hotplug Support
-#
-
-#
-# Executable file formats
-#
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_TRAD_SIGNALS=y
-
-#
-# Power management options
-#
-CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
-# CONFIG_PM_DEBUG is not set
-# CONFIG_PM_SYSFS_DEPRECATED is not set
-
-#
-# Networking
-#
-# CONFIG_NET is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=18432
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# Misc devices
-#
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_RAID_ATTRS=y
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_NETLINK is not set
-
-#
-# Serial ATA (prod) and Parallel ATA (experimental) drivers
-#
-# CONFIG_ATA is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# ISDN subsystem
-#
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_HW_RANDOM is not set
-# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-
-#
-# Graphics support
-#
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-# CONFIG_USB_ARCH_HAS_EHCI is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# InfiniBand support
-#
-
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-
-#
-# Real Time Clock
-#
-# CONFIG_RTC_CLASS is not set
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Auxiliary Display support
-#
-
-#
-# Virtualization
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_EXT4DEV_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-CONFIG_FUSE_FS=y
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_KARMA_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_TRACE_IRQFLAGS_SUPPORT=y
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_HEADERS_CHECK is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CROSSCOMPILE=y
-CONFIG_CMDLINE=""
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC16=y
-# CONFIG_CRC32 is not set
-# CONFIG_LIBCRC32C is not set
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/configs/tb0219_defconfig b/arch/mips/configs/tb0219_defconfig
index 8dd3ae3..b505988 100644
--- a/arch/mips/configs/tb0219_defconfig
+++ b/arch/mips/configs/tb0219_defconfig
@@ -16,9 +16,7 @@
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig
index 2ba240e..b06a716 100644
--- a/arch/mips/configs/tb0226_defconfig
+++ b/arch/mips/configs/tb0226_defconfig
@@ -16,9 +16,7 @@
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig
index a5d0f3c..46512cf 100644
--- a/arch/mips/configs/tb0287_defconfig
+++ b/arch/mips/configs/tb0287_defconfig
@@ -16,9 +16,7 @@
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig
index edf90b3..b437eb7 100644
--- a/arch/mips/configs/workpad_defconfig
+++ b/arch/mips/configs/workpad_defconfig
@@ -14,9 +14,7 @@
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LEMOTE_FULONG is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MARKEINS is not set
CONFIG_MACH_VR41XX=y
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig
index 2e3c683..fc2c567 100644
--- a/arch/mips/configs/wrppmc_defconfig
+++ b/arch/mips/configs/wrppmc_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
CONFIG_WR_PPMC=y
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig
index b6178ff..7f86c43 100644
--- a/arch/mips/configs/yosemite_defconfig
+++ b/arch/mips/configs/yosemite_defconfig
@@ -26,9 +26,7 @@
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
-# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_MALTA is not set
-# CONFIG_MIPS_SEAD is not set
# CONFIG_WR_PPMC is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MOMENCO_JAGUAR_ATX is not set
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
index 0f791eb6..5e92b3a 100644
--- a/arch/mips/emma2rh/common/prom.c
+++ b/arch/mips/emma2rh/common/prom.c
@@ -34,12 +34,11 @@
const char *get_system_type(void)
{
- switch (mips_machtype) {
- case MACH_NEC_MARKEINS:
- return "NEC EMMA2RH Mark-eins";
- default:
- return "Unknown NEC board";
- }
+#if defined(CONFIG_MARKEINS)
+ return "NEC EMMA2RH Mark-eins";
+#else
+#error Unknown NEC board
+#endif
}
/* [jsun@junsun.net] PMON passes arguments in C main() style */
@@ -63,10 +62,10 @@
}
#if defined(CONFIG_MARKEINS)
- mips_machtype = MACH_NEC_MARKEINS;
add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
+#else
+#error Unknown NEC board
#endif
-
}
void __init prom_free_prom_memory(void)
diff --git a/arch/mips/fw/arc/identify.c b/arch/mips/fw/arc/identify.c
index 2306698..0ce9acf 100644
--- a/arch/mips/fw/arc/identify.c
+++ b/arch/mips/fw/arc/identify.c
@@ -22,7 +22,6 @@
struct smatch {
char *arcname;
char *liname;
- int type;
int flags;
};
@@ -30,47 +29,38 @@
{
.arcname = "SGI-IP22",
.liname = "SGI Indy",
- .type = MACH_SGI_IP22,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "SGI-IP27",
.liname = "SGI Origin",
- .type = MACH_SGI_IP27,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "SGI-IP28",
.liname = "SGI IP28",
- .type = MACH_SGI_IP28,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "SGI-IP30",
.liname = "SGI Octane",
- .type = MACH_SGI_IP30,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "SGI-IP32",
.liname = "SGI O2",
- .type = MACH_SGI_IP32,
.flags = PROM_FLAG_ARCS,
}, {
.arcname = "Microsoft-Jazz",
.liname = "Jazz MIPS_Magnum_4000",
- .type = MACH_MIPS_MAGNUM_4000,
.flags = 0,
}, {
.arcname = "PICA-61",
.liname = "Jazz Acer_PICA_61",
- .type = MACH_ACER_PICA_61,
.flags = 0,
}, {
.arcname = "RM200PCI",
.liname = "SNI RM200_PCI",
- .type = MACH_SNI_RM200_PCI,
.flags = PROM_FLAG_DONT_FREE_TEMP,
}, {
.arcname = "RM200PCI-R5K",
.liname = "SNI RM200_PCI-R5K",
- .type = MACH_SNI_RM200_PCI,
.flags = PROM_FLAG_DONT_FREE_TEMP,
}
};
@@ -121,6 +111,5 @@
mach = string_to_mach(iname);
system_type = mach->liname;
- mips_machtype = mach->type;
prom_flags = mach->flags;
}
diff --git a/arch/mips/gt64120/wrppmc/reset.c b/arch/mips/gt64120/wrppmc/reset.c
index c355cff..cc5474b 100644
--- a/arch/mips/gt64120/wrppmc/reset.c
+++ b/arch/mips/gt64120/wrppmc/reset.c
@@ -5,10 +5,12 @@
*
* Copyright (C) 1997 Ralf Baechle
*/
+#include <linux/irqflags.h>
#include <linux/kernel.h>
#include <asm/cacheflush.h>
#include <asm/mipsregs.h>
+#include <asm/processor.h>
void wrppmc_machine_restart(char *command)
{
@@ -32,15 +34,7 @@
printk(KERN_NOTICE "You can safely turn off the power\n");
while (1) {
- __asm__(
- ".set\tmips3\n\t"
- "wait\n\t"
- ".set\tmips0"
- );
+ if (cpu_wait)
+ cpu_wait();
}
}
-
-void wrppmc_machine_power_off(void)
-{
- wrppmc_machine_halt();
-}
diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c
index 728ef6a..ca65c84 100644
--- a/arch/mips/gt64120/wrppmc/setup.c
+++ b/arch/mips/gt64120/wrppmc/setup.c
@@ -98,11 +98,10 @@
{
extern void wrppmc_machine_restart(char *command);
extern void wrppmc_machine_halt(void);
- extern void wrppmc_machine_power_off(void);
_machine_restart = wrppmc_machine_restart;
_machine_halt = wrppmc_machine_halt;
- pm_power_off = wrppmc_machine_power_off;
+ pm_power_off = wrppmc_machine_halt;
/* This makes the operations of 'in/out[bwl]' to the
* physical address ( < KSEG0) can work via KSEG1
diff --git a/arch/mips/jazz/setup.c b/arch/mips/jazz/setup.c
index a794719..f60524e 100644
--- a/arch/mips/jazz/setup.c
+++ b/arch/mips/jazz/setup.c
@@ -76,10 +76,8 @@
set_io_port_base(JAZZ_PORT_BASE);
#ifdef CONFIG_EISA
- if (mips_machtype == MACH_MIPS_MAGNUM_4000)
- EISA_bus = 1;
+ EISA_bus = 1;
#endif
- isa_slot_offset = 0xe3000000;
/* request I/O space for devices used on all i[345]86 PCs */
for (i = 0; i < ARRAY_SIZE(jazz_io_resources); i++)
diff --git a/arch/mips/jmr3927/common/Makefile b/arch/mips/jmr3927/common/Makefile
deleted file mode 100644
index 8fd4fcc..0000000
--- a/arch/mips/jmr3927/common/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Makefile for the common code of TOSHIBA JMR-TX3927 board
-#
-
-obj-y += prom.o puts.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/jmr3927/common/prom.c b/arch/mips/jmr3927/common/prom.c
deleted file mode 100644
index 5398813..0000000
--- a/arch/mips/jmr3927/common/prom.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * PROM library initialisation code, assuming a version of
- * pmon is the boot code.
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * Based on arch/mips/au1000/common/prom.c
- *
- * This file was derived from Carsten Langgaard's
- * arch/mips/mips-boards/xx files.
- *
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-
-char * __init prom_getcmdline(void)
-{
- return &(arcs_cmdline[0]);
-}
-
-void __init prom_init_cmdline(void)
-{
- char *cp;
- int actr;
- int prom_argc = fw_arg0;
- char **prom_argv = (char **) fw_arg1;
-
- actr = 1; /* Always ignore argv[0] */
-
- cp = &(arcs_cmdline[0]);
- while(actr < prom_argc) {
- strcpy(cp, prom_argv[actr]);
- cp += strlen(prom_argv[actr]);
- *cp++ = ' ';
- actr++;
- }
- if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
- --cp;
- *cp = '\0';
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
diff --git a/arch/mips/jmr3927/common/puts.c b/arch/mips/jmr3927/common/puts.c
deleted file mode 100644
index c611ab4..0000000
--- a/arch/mips/jmr3927/common/puts.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- *
- * BRIEF MODULE DESCRIPTION
- * Low level uart routines to directly access a TX[34]927 SIO.
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com or source@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * Based on arch/mips/au1000/common/puts.c
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <asm/jmr3927/tx3927.h>
-
-#define TIMEOUT 0xffffff
-
-void
-prom_putchar(char c)
-{
- int i = 0;
-
- do {
- i++;
- if (i>TIMEOUT)
- break;
- } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
- tx3927_sioptr(1)->tfifo = c;
- return;
-}
-
-void
-puts(const char *cp)
-{
- while (*cp)
- prom_putchar(*cp++);
- prom_putchar('\r');
- prom_putchar('\n');
-}
diff --git a/arch/mips/jmr3927/rbhma3100/Makefile b/arch/mips/jmr3927/rbhma3100/Makefile
deleted file mode 100644
index d86e30d..0000000
--- a/arch/mips/jmr3927/rbhma3100/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for TOSHIBA JMR-TX3927 board
-#
-
-obj-y += init.o irq.o setup.o
-obj-$(CONFIG_KGDB) += kgdb_io.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c
deleted file mode 100644
index 700b9cf..0000000
--- a/arch/mips/jmr3927/rbhma3100/init.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * arch/mips/jmr3927/common/init.c
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <asm/bootinfo.h>
-#include <asm/jmr3927/jmr3927.h>
-
-extern void __init prom_init_cmdline(void);
-
-const char *get_system_type(void)
-{
- return "Toshiba"
-#ifdef CONFIG_TOSHIBA_JMR3927
- " JMR_TX3927"
-#endif
- ;
-}
-
-extern void puts(const char *cp);
-
-void __init prom_init(void)
-{
-#ifdef CONFIG_TOSHIBA_JMR3927
- /* CCFG */
- if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
- puts("Warning: TX3927 TLB off\n");
-#endif
-
- prom_init_cmdline();
- add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
-}
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
deleted file mode 100644
index 3a47e8c..0000000
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-
-#include <asm/io.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-#include <asm/processor.h>
-#include <asm/jmr3927/jmr3927.h>
-
-#if JMR3927_IRQ_END > NR_IRQS
-#error JMR3927_IRQ_END > NR_IRQS
-#endif
-
-static unsigned char irc_level[TX3927_NUM_IR] = {
- 5, 5, 5, 5, 5, 5, /* INT[5:0] */
- 7, 7, /* SIO */
- 5, 5, 5, 0, 0, /* DMA, PIO, PCI */
- 6, 6, 6 /* TMR */
-};
-
-/*
- * CP0_STATUS is a thread's resource (saved/restored on context switch).
- * So disable_irq/enable_irq MUST handle IOC/IRC registers.
- */
-static void mask_irq_ioc(unsigned int irq)
-{
- /* 0: mask */
- unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
- unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
- unsigned int bit = 1 << irq_nr;
- jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
- /* flush write buffer */
- (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
-}
-static void unmask_irq_ioc(unsigned int irq)
-{
- /* 0: mask */
- unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
- unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
- unsigned int bit = 1 << irq_nr;
- jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
- /* flush write buffer */
- (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned long cp0_cause = read_c0_cause();
- int irq;
-
- if ((cp0_cause & CAUSEF_IP7) == 0)
- return;
- irq = (cp0_cause >> CAUSEB_IP2) & 0x0f;
-
- do_IRQ(irq + JMR3927_IRQ_IRC);
-}
-
-static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id)
-{
- unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR);
- int i;
-
- for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) {
- if (istat & (1 << i)) {
- irq = JMR3927_IRQ_IOC + i;
- do_IRQ(irq);
- }
- }
- return IRQ_HANDLED;
-}
-
-static struct irqaction ioc_action = {
- .handler = jmr3927_ioc_interrupt,
- .mask = CPU_MASK_NONE,
- .name = "IOC",
-};
-
-static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
-{
- printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
- printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n",
- tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat);
-
- return IRQ_HANDLED;
-}
-static struct irqaction pcierr_action = {
- .handler = jmr3927_pcierr_interrupt,
- .mask = CPU_MASK_NONE,
- .name = "PCI error",
-};
-
-static void __init jmr3927_irq_init(void);
-
-void __init arch_init_irq(void)
-{
- /* Now, interrupt control disabled, */
- /* all IRC interrupts are masked, */
- /* all IRC interrupt mode are Low Active. */
-
- /* mask all IOC interrupts */
- jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR);
- /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */
- jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR);
-
- /* clear PCI Soft interrupts */
- jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR);
- /* clear PCI Reset interrupts */
- jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
-
- jmr3927_irq_init();
-
- /* setup IOC interrupt 1 (PCI, MODEM) */
- setup_irq(JMR3927_IRQ_IOCINT, &ioc_action);
-
-#ifdef CONFIG_PCI
- setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action);
-#endif
-
- /* enable all CPU interrupt bits. */
- set_c0_status(ST0_IM); /* IE bit is still 0. */
-}
-
-static struct irq_chip jmr3927_irq_ioc = {
- .name = "jmr3927_ioc",
- .ack = mask_irq_ioc,
- .mask = mask_irq_ioc,
- .mask_ack = mask_irq_ioc,
- .unmask = unmask_irq_ioc,
-};
-
-static void __init jmr3927_irq_init(void)
-{
- u32 i;
-
- txx9_irq_init(TX3927_IRC_REG);
- for (i = 0; i < TXx9_MAX_IR; i++)
- txx9_irq_set_pri(i, irc_level[i]);
- for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
- set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq);
-}
diff --git a/arch/mips/jmr3927/rbhma3100/kgdb_io.c b/arch/mips/jmr3927/rbhma3100/kgdb_io.c
deleted file mode 100644
index 342579c..0000000
--- a/arch/mips/jmr3927/rbhma3100/kgdb_io.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * BRIEF MODULE DESCRIPTION
- * Low level uart routines to directly access a TX[34]927 SIO.
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com or source@mvista.com
- *
- * Based on arch/mips/ddb5xxx/ddb5477/kgdb_io.c
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <asm/jmr3927/jmr3927.h>
-
-#define TIMEOUT 0xffffff
-
-static int remoteDebugInitialized = 0;
-static void debugInit(int baud);
-
-int putDebugChar(unsigned char c)
-{
- int i = 0;
-
- if (!remoteDebugInitialized) {
- remoteDebugInitialized = 1;
- debugInit(38400);
- }
-
- do {
- slow_down();
- i++;
- if (i>TIMEOUT) {
- break;
- }
- } while (!(tx3927_sioptr(0)->cisr & TXx927_SICISR_TXALS));
- tx3927_sioptr(0)->tfifo = c;
-
- return 1;
-}
-
-unsigned char getDebugChar(void)
-{
- int i = 0;
- int dicr;
- char c;
-
- if (!remoteDebugInitialized) {
- remoteDebugInitialized = 1;
- debugInit(38400);
- }
-
- /* diable RX int. */
- dicr = tx3927_sioptr(0)->dicr;
- tx3927_sioptr(0)->dicr = 0;
-
- do {
- slow_down();
- i++;
- if (i>TIMEOUT) {
- break;
- }
- } while (tx3927_sioptr(0)->disr & TXx927_SIDISR_UVALID)
- ;
- c = tx3927_sioptr(0)->rfifo;
-
- /* clear RX int. status */
- tx3927_sioptr(0)->disr &= ~TXx927_SIDISR_RDIS;
- /* enable RX int. */
- tx3927_sioptr(0)->dicr = dicr;
-
- return c;
-}
-
-static void debugInit(int baud)
-{
- tx3927_sioptr(0)->lcr = 0x020;
- tx3927_sioptr(0)->dicr = 0;
- tx3927_sioptr(0)->disr = 0x4100;
- tx3927_sioptr(0)->cisr = 0x014;
- tx3927_sioptr(0)->fcr = 0;
- tx3927_sioptr(0)->flcr = 0x02;
- tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) |
- TXx927_SIBGR_BCLK_T0;
-}
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
deleted file mode 100644
index f39c444..0000000
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ /dev/null
@@ -1,445 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-#include <linux/gpio.h>
-#ifdef CONFIG_SERIAL_TXX9
-#include <linux/serial_core.h>
-#endif
-
-#include <asm/txx9tmr.h>
-#include <asm/txx9pio.h>
-#include <asm/reboot.h>
-#include <asm/jmr3927/jmr3927.h>
-#include <asm/mipsregs.h>
-
-extern void puts(const char *cp);
-
-/* don't enable - see errata */
-static int jmr3927_ccfg_toeon;
-
-static inline void do_reset(void)
-{
-#if 1 /* Resetting PCI bus */
- jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
- jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
- (void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR); /* flush WB */
- mdelay(1);
- jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
-#endif
- jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
-}
-
-static void jmr3927_machine_restart(char *command)
-{
- local_irq_disable();
- puts("Rebooting...");
- do_reset();
-}
-
-static void jmr3927_machine_halt(void)
-{
- puts("JMR-TX3927 halted.\n");
- while (1);
-}
-
-static void jmr3927_machine_power_off(void)
-{
- puts("JMR-TX3927 halted. Please turn off the power.\n");
- while (1);
-}
-
-void __init plat_time_init(void)
-{
- txx9_clockevent_init(TX3927_TMR_REG(0),
- TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0),
- JMR3927_IMCLK);
- txx9_clocksource_init(TX3927_TMR_REG(1), JMR3927_IMCLK);
-}
-
-#define DO_WRITE_THROUGH
-#define DO_ENABLE_CACHE
-
-extern char * __init prom_getcmdline(void);
-static void jmr3927_board_init(void);
-extern struct resource pci_io_resource;
-extern struct resource pci_mem_resource;
-
-void __init plat_mem_setup(void)
-{
- char *argptr;
-
- set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
-
- _machine_restart = jmr3927_machine_restart;
- _machine_halt = jmr3927_machine_halt;
- pm_power_off = jmr3927_machine_power_off;
-
- /*
- * IO/MEM resources.
- */
- ioport_resource.start = pci_io_resource.start;
- ioport_resource.end = pci_io_resource.end;
- iomem_resource.start = 0;
- iomem_resource.end = 0xffffffff;
-
- /* Reboot on panic */
- panic_timeout = 180;
-
- /* cache setup */
- {
- unsigned int conf;
-#ifdef DO_ENABLE_CACHE
- int mips_ic_disable = 0, mips_dc_disable = 0;
-#else
- int mips_ic_disable = 1, mips_dc_disable = 1;
-#endif
-#ifdef DO_WRITE_THROUGH
- int mips_config_cwfon = 0;
- int mips_config_wbon = 0;
-#else
- int mips_config_cwfon = 1;
- int mips_config_wbon = 1;
-#endif
-
- conf = read_c0_conf();
- conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON);
- conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
- conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
- conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
- conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
-
- write_c0_conf(conf);
- write_c0_cache(0);
- }
-
- /* initialize board */
- jmr3927_board_init();
-
- argptr = prom_getcmdline();
-
- if ((argptr = strstr(argptr, "toeon")) != NULL)
- jmr3927_ccfg_toeon = 1;
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "ip=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " ip=bootp");
- }
-
-#ifdef CONFIG_SERIAL_TXX9
- {
- extern int early_serial_txx9_setup(struct uart_port *port);
- int i;
- struct uart_port req;
- for(i = 0; i < 2; i++) {
- memset(&req, 0, sizeof(req));
- req.line = i;
- req.iotype = UPIO_MEM;
- req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i);
- req.mapbase = TX3927_SIO_REG(i);
- req.irq = i == 0 ?
- JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
- if (i == 0)
- req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
- req.uartclk = JMR3927_IMCLK;
- early_serial_txx9_setup(&req);
- }
- }
-#ifdef CONFIG_SERIAL_TXX9_CONSOLE
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "console=")) == NULL) {
- argptr = prom_getcmdline();
- strcat(argptr, " console=ttyS1,115200");
- }
-#endif
-#endif
-}
-
-static void tx3927_setup(void);
-
-static void __init jmr3927_board_init(void)
-{
- tx3927_setup();
-
- /* SIO0 DTR on */
- jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
-
- jmr3927_led_set(0);
-
- printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
- jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
- jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
- jmr3927_dipsw1(), jmr3927_dipsw2(),
- jmr3927_dipsw3(), jmr3927_dipsw4());
-}
-
-static void __init tx3927_setup(void)
-{
- int i;
-#ifdef CONFIG_PCI
- unsigned long mips_pci_io_base = JMR3927_PCIIO;
- unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE;
- unsigned long mips_pci_mem_base = JMR3927_PCIMEM;
- unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
- /* for legacy I/O, PCI I/O PCI Bus address must be 0 */
- unsigned long mips_pci_io_pciaddr = 0;
-#endif
-
- /* SDRAMC are configured by PROM */
-
- /* ROMC */
- tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
- tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
- tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
- tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
-
- /* CCFG */
- /* enable Timeout BusError */
- if (jmr3927_ccfg_toeon)
- tx3927_ccfgptr->ccfg |= TX3927_CCFG_TOE;
-
- /* clear BusErrorOnWrite flag */
- tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW;
- /* Disable PCI snoop */
- tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP;
- /* do reset on watchdog */
- tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR;
-
-#ifdef DO_WRITE_THROUGH
- /* Enable PCI SNOOP - with write through only */
- tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP;
-#endif
-
- /* Pin selection */
- tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
- tx3927_ccfgptr->pcfg |=
- TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
- (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
-
- printk("TX3927 -- CRIR:%08lx CCFG:%08lx PCFG:%08lx\n",
- tx3927_ccfgptr->crir,
- tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg);
-
- /* TMR */
- for (i = 0; i < TX3927_NR_TMR; i++)
- txx9_tmr_init(TX3927_TMR_REG(i));
-
- /* DMA */
- tx3927_dmaptr->mcr = 0;
- for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) {
- /* reset channel */
- tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST;
- tx3927_dmaptr->ch[i].ccr = 0;
- }
- /* enable DMA */
-#ifdef __BIG_ENDIAN
- tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN;
-#else
- tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE;
-#endif
-
-#ifdef CONFIG_PCI
- /* PCIC */
- printk("TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:",
- tx3927_pcicptr->did, tx3927_pcicptr->vid,
- tx3927_pcicptr->rid);
- if (!(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB)) {
- printk("External\n");
- /* XXX */
- } else {
- printk("Internal\n");
-
- /* Reset PCI Bus */
- jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
- udelay(100);
- jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
- JMR3927_IOC_RESET_ADDR);
- udelay(100);
- jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
-
-
- /* Disable External PCI Config. Access */
- tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD;
-#ifdef __BIG_ENDIAN
- tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE |
- TX3927_PCIC_LBC_TIBSE |
- TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE;
-#endif
- /* LB->PCI mappings */
- tx3927_pcicptr->iomas = ~(mips_pci_io_size - 1);
- tx3927_pcicptr->ilbioma = mips_pci_io_base;
- tx3927_pcicptr->ipbioma = mips_pci_io_pciaddr;
- tx3927_pcicptr->mmas = ~(mips_pci_mem_size - 1);
- tx3927_pcicptr->ilbmma = mips_pci_mem_base;
- tx3927_pcicptr->ipbmma = mips_pci_mem_base;
- /* PCI->LB mappings */
- tx3927_pcicptr->iobas = 0xffffffff;
- tx3927_pcicptr->ioba = 0;
- tx3927_pcicptr->tlbioma = 0;
- tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1);
- tx3927_pcicptr->mba = 0;
- tx3927_pcicptr->tlbmma = 0;
- /* Enable Direct mapping Address Space Decoder */
- tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
-
- /* Clear All Local Bus Status */
- tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
- /* Enable All Local Bus Interrupts */
- tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL;
- /* Clear All PCI Status Error */
- tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL;
- /* Enable All PCI Status Error Interrupts */
- tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL;
-
- /* PCIC Int => IRC IRQ10 */
- tx3927_pcicptr->il = TX3927_IR_PCI;
- /* Target Control (per errata) */
- tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
-
- /* Enable Bus Arbiter */
- tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
-
- tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_IO |
- PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
- }
-#endif /* CONFIG_PCI */
-
- /* PIO */
- /* PIO[15:12] connected to LEDs */
- __raw_writel(0x0000f000, &tx3927_pioptr->dir);
- __raw_writel(0, &tx3927_pioptr->maskcpu);
- __raw_writel(0, &tx3927_pioptr->maskext);
- txx9_gpio_init(TX3927_PIO_REG, 0, 16);
- gpio_request(11, "dipsw1");
- gpio_request(10, "dipsw2");
- {
- unsigned int conf;
-
- conf = read_c0_conf();
- if (!(conf & TX39_CONF_ICE))
- printk("TX3927 I-Cache disabled.\n");
- if (!(conf & TX39_CONF_DCE))
- printk("TX3927 D-Cache disabled.\n");
- else if (!(conf & TX39_CONF_WBON))
- printk("TX3927 D-Cache WriteThrough.\n");
- else if (!(conf & TX39_CONF_CWFON))
- printk("TX3927 D-Cache WriteBack.\n");
- else
- printk("TX3927 D-Cache WriteBack (CWF) .\n");
- }
-}
-
-/* This trick makes rtc-ds1742 driver usable as is. */
-unsigned long __swizzle_addr_b(unsigned long port)
-{
- if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
- return port;
- port = (port & 0xffff0000) | (port & 0x7fff << 1);
-#ifdef __BIG_ENDIAN
- return port;
-#else
- return port | 1;
-#endif
-}
-EXPORT_SYMBOL(__swizzle_addr_b);
-
-static int __init jmr3927_rtc_init(void)
-{
- static struct resource __initdata res = {
- .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
- .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *dev;
- dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1);
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-device_initcall(jmr3927_rtc_init);
-
-/* Watchdog support */
-
-static int __init txx9_wdt_init(unsigned long base)
-{
- struct resource res = {
- .start = base,
- .end = base + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *dev =
- platform_device_register_simple("txx9wdt", -1, &res, 1);
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-
-static int __init jmr3927_wdt_init(void)
-{
- return txx9_wdt_init(TX3927_TMR_REG(2));
-}
-device_initcall(jmr3927_wdt_init);
-
-/* Minimum CLK support */
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (!strcmp(id, "imbus_clk"))
- return (struct clk *)JMR3927_IMCLK;
- return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-int clk_enable(struct clk *clk)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return (unsigned long)clk;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 65e46a6..0fd3197 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -20,9 +20,6 @@
obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o
obj-$(CONFIG_SYNC_R4K) += sync-r4k.o
-binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \
- irix5sys.o sysirix.o
-
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_MODULES) += mips_ksyms.o module.o
@@ -63,14 +60,13 @@
obj-$(CONFIG_IRQ_CPU) += irq_cpu.o
obj-$(CONFIG_IRQ_CPU_RM7K) += irq-rm7000.o
obj-$(CONFIG_IRQ_CPU_RM9K) += irq-rm9000.o
-obj-$(CONFIG_MIPS_BOARDS_GEN) += irq-msc01.o
+obj-$(CONFIG_MIPS_MSC) += irq-msc01.o
obj-$(CONFIG_IRQ_TXX9) += irq_txx9.o
obj-$(CONFIG_IRQ_GT641XX) += irq-gt641xx.o
obj-$(CONFIG_IRQ_GIC) += irq-gic.o
obj-$(CONFIG_32BIT) += scall32-o32.o
obj-$(CONFIG_64BIT) += scall64-64.o
-obj-$(CONFIG_BINFMT_IRIX) += binfmt_irix.o
obj-$(CONFIG_MIPS32_COMPAT) += linux32.o ptrace32.o signal32.o
obj-$(CONFIG_MIPS32_N32) += binfmt_elfn32.o scall64-n32.o signal_n32.o
obj-$(CONFIG_MIPS32_O32) += binfmt_elfo32.o scall64-o32.o
diff --git a/arch/mips/kernel/early_printk.c b/arch/mips/kernel/early_printk.c
index 9dccfa4..9ae813e 100644
--- a/arch/mips/kernel/early_printk.c
+++ b/arch/mips/kernel/early_printk.c
@@ -10,6 +10,8 @@
#include <linux/console.h>
#include <linux/init.h>
+#include <asm/setup.h>
+
extern void prom_putchar(char);
static void __init
diff --git a/arch/mips/kernel/gpio_txx9.c b/arch/mips/kernel/gpio_txx9.c
index b1436a8..c6854d9 100644
--- a/arch/mips/kernel/gpio_txx9.c
+++ b/arch/mips/kernel/gpio_txx9.c
@@ -47,23 +47,25 @@
static int txx9_gpio_dir_in(struct gpio_chip *chip, unsigned int offset)
{
- spin_lock_irq(&txx9_gpio_lock);
+ unsigned long flags;
+ spin_lock_irqsave(&txx9_gpio_lock, flags);
__raw_writel(__raw_readl(&txx9_pioptr->dir) & ~(1 << offset),
&txx9_pioptr->dir);
mmiowb();
- spin_unlock_irq(&txx9_gpio_lock);
+ spin_unlock_irqrestore(&txx9_gpio_lock, flags);
return 0;
}
static int txx9_gpio_dir_out(struct gpio_chip *chip, unsigned int offset,
int value)
{
- spin_lock_irq(&txx9_gpio_lock);
+ unsigned long flags;
+ spin_lock_irqsave(&txx9_gpio_lock, flags);
txx9_gpio_set_raw(offset, value);
__raw_writel(__raw_readl(&txx9_pioptr->dir) | (1 << offset),
&txx9_pioptr->dir);
mmiowb();
- spin_unlock_irq(&txx9_gpio_lock);
+ spin_unlock_irqrestore(&txx9_gpio_lock, flags);
return 0;
}
diff --git a/arch/mips/kernel/i8253.c b/arch/mips/kernel/i8253.c
index 38fa1a1..b6ac551 100644
--- a/arch/mips/kernel/i8253.c
+++ b/arch/mips/kernel/i8253.c
@@ -80,7 +80,7 @@
* registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
* !using_apic_timer decisions in do_timer_interrupt_hook()
*/
-struct clock_event_device pit_clockevent = {
+static struct clock_event_device pit_clockevent = {
.name = "pit",
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
.set_mode = init_pit_timer,
diff --git a/arch/mips/kernel/irix5sys.S b/arch/mips/kernel/irix5sys.S
deleted file mode 100644
index eeef891..0000000
--- a/arch/mips/kernel/irix5sys.S
+++ /dev/null
@@ -1,1041 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * 32-bit IRIX5 ABI system call table derived from original file 'irix5sys.h'
- * created by David S. Miller.
- *
- * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com>
- * Copyright (C) 2004 Steven J. Hill <sjhill@realitydiluted.com>
- */
-#include <asm/asm.h>
-
- /*
- * Key:
- * V == Valid and should work as expected for most cases.
- * HV == Half Valid, some things will work, some likely will not
- * IV == InValid, certainly will not work at all yet
- * ?V == ?'ably Valid, I have not done enough looking into it
- * DC == Don't Care, a rats ass we couldn't give
- */
-
- .macro irix5syscalltable
-
- sys sys_syscall 0 /* 1000 sysindir() V*/
- sys sys_exit 1 /* 1001 exit() V*/
- sys sys_fork 0 /* 1002 fork() V*/
- sys sys_read 3 /* 1003 read() V*/
- sys sys_write 3 /* 1004 write() V*/
- sys sys_open 3 /* 1005 open() V*/
- sys sys_close 1 /* 1006 close() V*/
- sys irix_unimp 0 /* 1007 (XXX IRIX 4 wait) V*/
- sys sys_creat 2 /* 1008 creat() V*/
- sys sys_link 2 /* 1009 link() V*/
- sys sys_unlink 1 /* 1010 unlink() V*/
- sys irix_exec 0 /* 1011 exec() V*/
- sys sys_chdir 1 /* 1012 chdir() V*/
- sys irix_gtime 0 /* 1013 time() V*/
- sys irix_unimp 0 /* 1014 (XXX IRIX 4 mknod) V*/
- sys sys_chmod 2 /* 1015 chmod() V*/
- sys sys_chown 3 /* 1016 chown() V*/
- sys irix_brk 1 /* 1017 break() V*/
- sys irix_unimp 0 /* 1018 (XXX IRIX 4 stat) V*/
- sys sys_lseek 3 /* 1019 lseek() XXX64bit HV*/
- sys irix_getpid 0 /* 1020 getpid() V*/
- sys irix_mount 6 /* 1021 mount() IV*/
- sys sys_umount 1 /* 1022 umount() V*/
- sys sys_setuid 1 /* 1023 setuid() V*/
- sys irix_getuid 0 /* 1024 getuid() V*/
- sys irix_stime 1 /* 1025 stime() V*/
- sys irix_unimp 4 /* 1026 XXX ptrace() IV*/
- sys irix_alarm 1 /* 1027 alarm() V*/
- sys irix_unimp 0 /* 1028 (XXX IRIX 4 fstat) V*/
- sys irix_pause 0 /* 1029 pause() V*/
- sys sys_utime 2 /* 1030 utime() V*/
- sys irix_unimp 0 /* 1031 nuthin' V*/
- sys irix_unimp 0 /* 1032 nobody home man... V*/
- sys sys_access 2 /* 1033 access() V*/
- sys sys_nice 1 /* 1034 nice() V*/
- sys irix_statfs 2 /* 1035 statfs() V*/
- sys sys_sync 0 /* 1036 sync() V*/
- sys sys_kill 2 /* 1037 kill() V*/
- sys irix_fstatfs 2 /* 1038 fstatfs() V*/
- sys irix_setpgrp 1 /* 1039 setpgrp() V*/
- sys irix_syssgi 0 /* 1040 syssgi() HV*/
- sys sys_dup 1 /* 1041 dup() V*/
- sys sys_pipe 0 /* 1042 pipe() V*/
- sys irix_times 1 /* 1043 times() V*/
- sys irix_unimp 0 /* 1044 XXX profil() IV*/
- sys irix_unimp 0 /* 1045 XXX lock() IV*/
- sys sys_setgid 1 /* 1046 setgid() V*/
- sys irix_getgid 0 /* 1047 getgid() V*/
- sys irix_unimp 0 /* 1048 (XXX IRIX 4 ssig) V*/
- sys irix_msgsys 6 /* 1049 sys_msgsys V*/
- sys sys_sysmips 4 /* 1050 sysmips() HV*/
- sys irix_unimp 0 /* 1051 XXX sysacct() IV*/
- sys irix_shmsys 5 /* 1052 sys_shmsys V*/
- sys irix_semsys 0 /* 1053 sys_semsys V*/
- sys irix_ioctl 3 /* 1054 ioctl() HV*/
- sys irix_uadmin 0 /* 1055 XXX sys_uadmin() HC*/
- sys irix_sysmp 0 /* 1056 sysmp() HV*/
- sys irix_utssys 4 /* 1057 sys_utssys() HV*/
- sys irix_unimp 0 /* 1058 nada enchilada V*/
- sys irix_exece 0 /* 1059 exece() V*/
- sys sys_umask 1 /* 1060 umask() V*/
- sys sys_chroot 1 /* 1061 chroot() V*/
- sys irix_fcntl 3 /* 1062 fcntl() ?V*/
- sys irix_ulimit 2 /* 1063 ulimit() HV*/
- sys irix_unimp 0 /* 1064 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1065 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1066 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1067 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1068 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1069 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1070 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1071 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1072 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1073 XXX AFS shit DC*/
- sys irix_unimp 0 /* 1074 nuttin' V*/
- sys irix_unimp 0 /* 1075 XXX sys_getrlimit64()IV*/
- sys irix_unimp 0 /* 1076 XXX sys_setrlimit64()IV*/
- sys sys_nanosleep 2 /* 1077 nanosleep() V*/
- sys irix_lseek64 5 /* 1078 lseek64() ?V*/
- sys sys_rmdir 1 /* 1079 rmdir() V*/
- sys sys_mkdir 2 /* 1080 mkdir() V*/
- sys sys_getdents 3 /* 1081 getdents() V*/
- sys irix_sginap 1 /* 1082 sys_sginap() V*/
- sys irix_sgikopt 3 /* 1083 sys_sgikopt() DC*/
- sys sys_sysfs 3 /* 1084 sysfs() ?V*/
- sys irix_unimp 0 /* 1085 XXX sys_getmsg() DC*/
- sys irix_unimp 0 /* 1086 XXX sys_putmsg() DC*/
- sys sys_poll 3 /* 1087 poll() V*/
- sys irix_sigreturn 0 /* 1088 sigreturn() ?V*/
- sys sys_accept 3 /* 1089 accept() V*/
- sys sys_bind 3 /* 1090 bind() V*/
- sys sys_connect 3 /* 1091 connect() V*/
- sys irix_gethostid 0 /* 1092 sys_gethostid() ?V*/
- sys sys_getpeername 3 /* 1093 getpeername() V*/
- sys sys_getsockname 3 /* 1094 getsockname() V*/
- sys sys_getsockopt 5 /* 1095 getsockopt() V*/
- sys sys_listen 2 /* 1096 listen() V*/
- sys sys_recv 4 /* 1097 recv() V*/
- sys sys_recvfrom 6 /* 1098 recvfrom() V*/
- sys sys_recvmsg 3 /* 1099 recvmsg() V*/
- sys sys_select 5 /* 1100 select() V*/
- sys sys_send 4 /* 1101 send() V*/
- sys sys_sendmsg 3 /* 1102 sendmsg() V*/
- sys sys_sendto 6 /* 1103 sendto() V*/
- sys irix_sethostid 1 /* 1104 sys_sethostid() ?V*/
- sys sys_setsockopt 5 /* 1105 setsockopt() V*/
- sys sys_shutdown 2 /* 1106 shutdown() ?V*/
- sys irix_socket 3 /* 1107 socket() V*/
- sys sys_gethostname 2 /* 1108 sys_gethostname() ?V*/
- sys sys_sethostname 2 /* 1109 sethostname() ?V*/
- sys irix_getdomainname 2 /* 1110 sys_getdomainname() ?V*/
- sys sys_setdomainname 2 /* 1111 setdomainname() ?V*/
- sys sys_truncate 2 /* 1112 truncate() V*/
- sys sys_ftruncate 2 /* 1113 ftruncate() V*/
- sys sys_rename 2 /* 1114 rename() V*/
- sys sys_symlink 2 /* 1115 symlink() V*/
- sys sys_readlink 3 /* 1116 readlink() V*/
- sys irix_unimp 0 /* 1117 XXX IRIX 4 lstat() DC*/
- sys irix_unimp 0 /* 1118 nothin' V*/
- sys irix_unimp 0 /* 1119 XXX nfs_svc() DC*/
- sys irix_unimp 0 /* 1120 XXX nfs_getfh() DC*/
- sys irix_unimp 0 /* 1121 XXX async_daemon() DC*/
- sys irix_unimp 0 /* 1122 XXX exportfs() DC*/
- sys sys_setregid 2 /* 1123 setregid() V*/
- sys sys_setreuid 2 /* 1124 setreuid() V*/
- sys sys_getitimer 2 /* 1125 getitimer() V*/
- sys sys_setitimer 3 /* 1126 setitimer() V*/
- sys irix_unimp 1 /* 1127 XXX adjtime() IV*/
- sys irix_gettimeofday 1 /* 1128 gettimeofday() V*/
- sys irix_unimp 0 /* 1129 XXX sproc() IV*/
- sys irix_prctl 0 /* 1130 prctl() HV*/
- sys irix_unimp 0 /* 1131 XXX procblk() IV*/
- sys irix_unimp 0 /* 1132 XXX sprocsp() IV*/
- sys irix_unimp 0 /* 1133 XXX sgigsc() IV*/
- sys irix_mmap32 6 /* 1134 mmap() XXXflags? ?V*/
- sys sys_munmap 2 /* 1135 munmap() V*/
- sys sys_mprotect 3 /* 1136 mprotect() V*/
- sys sys_msync 4 /* 1137 msync() V*/
- sys irix_madvise 3 /* 1138 madvise() DC*/
- sys irix_pagelock 3 /* 1139 pagelock() IV*/
- sys irix_getpagesize 0 /* 1140 getpagesize() V*/
- sys irix_quotactl 0 /* 1141 quotactl() V*/
- sys irix_unimp 0 /* 1142 nobody home man V*/
- sys sys_getpgid 1 /* 1143 BSD getpgrp() V*/
- sys irix_BSDsetpgrp 2 /* 1143 BSD setpgrp() V*/
- sys sys_vhangup 0 /* 1144 vhangup() V*/
- sys sys_fsync 1 /* 1145 fsync() V*/
- sys sys_fchdir 1 /* 1146 fchdir() V*/
- sys sys_getrlimit 2 /* 1147 getrlimit() ?V*/
- sys sys_setrlimit 2 /* 1148 setrlimit() ?V*/
- sys sys_cacheflush 3 /* 1150 cacheflush() HV*/
- sys sys_cachectl 3 /* 1151 cachectl() HV*/
- sys sys_fchown 3 /* 1152 fchown() ?V*/
- sys sys_fchmod 2 /* 1153 fchmod() ?V*/
- sys irix_unimp 0 /* 1154 XXX IRIX 4 wait3() V*/
- sys sys_socketpair 4 /* 1155 socketpair() V*/
- sys irix_systeminfo 3 /* 1156 systeminfo() IV*/
- sys irix_uname 1 /* 1157 uname() IV*/
- sys irix_xstat 3 /* 1158 xstat() V*/
- sys irix_lxstat 3 /* 1159 lxstat() V*/
- sys irix_fxstat 3 /* 1160 fxstat() V*/
- sys irix_xmknod 0 /* 1161 xmknod() ?V*/
- sys irix_sigaction 4 /* 1162 sigaction() ?V*/
- sys irix_sigpending 1 /* 1163 sigpending() ?V*/
- sys irix_sigprocmask 3 /* 1164 sigprocmask() ?V*/
- sys irix_sigsuspend 0 /* 1165 sigsuspend() ?V*/
- sys irix_sigpoll_sys 3 /* 1166 sigpoll_sys() IV*/
- sys irix_swapctl 2 /* 1167 swapctl() IV*/
- sys irix_getcontext 0 /* 1168 getcontext() HV*/
- sys irix_setcontext 0 /* 1169 setcontext() HV*/
- sys irix_waitsys 5 /* 1170 waitsys() IV*/
- sys irix_sigstack 2 /* 1171 sigstack() HV*/
- sys irix_sigaltstack 2 /* 1172 sigaltstack() HV*/
- sys irix_sigsendset 2 /* 1173 sigsendset() IV*/
- sys irix_statvfs 2 /* 1174 statvfs() V*/
- sys irix_fstatvfs 2 /* 1175 fstatvfs() V*/
- sys irix_unimp 0 /* 1176 XXX getpmsg() DC*/
- sys irix_unimp 0 /* 1177 XXX putpmsg() DC*/
- sys sys_lchown 3 /* 1178 lchown() V*/
- sys irix_priocntl 0 /* 1179 priocntl() DC*/
- sys irix_sigqueue 4 /* 1180 sigqueue() IV*/
- sys sys_readv 3 /* 1181 readv() V*/
- sys sys_writev 3 /* 1182 writev() V*/
- sys irix_truncate64 4 /* 1183 truncate64() XX32bit HV*/
- sys irix_ftruncate64 4 /* 1184 ftruncate64()XX32bit HV*/
- sys irix_mmap64 0 /* 1185 mmap64() XX32bit HV*/
- sys irix_dmi 0 /* 1186 dmi() DC*/
- sys irix_pread 6 /* 1187 pread() IV*/
- sys irix_pwrite 6 /* 1188 pwrite() IV*/
- sys sys_fsync 1 /* 1189 fdatasync() XXPOSIX HV*/
- sys irix_sgifastpath 7 /* 1190 sgifastpath() WHEEE IV*/
- sys irix_unimp 0 /* 1191 XXX attr_get() DC*/
- sys irix_unimp 0 /* 1192 XXX attr_getf() DC*/
- sys irix_unimp 0 /* 1193 XXX attr_set() DC*/
- sys irix_unimp 0 /* 1194 XXX attr_setf() DC*/
- sys irix_unimp 0 /* 1195 XXX attr_remove() DC*/
- sys irix_unimp 0 /* 1196 XXX attr_removef() DC*/
- sys irix_unimp 0 /* 1197 XXX attr_list() DC*/
- sys irix_unimp 0 /* 1198 XXX attr_listf() DC*/
- sys irix_unimp 0 /* 1199 XXX attr_multi() DC*/
- sys irix_unimp 0 /* 1200 XXX attr_multif() DC*/
- sys irix_statvfs64 2 /* 1201 statvfs64() V*/
- sys irix_fstatvfs64 2 /* 1202 fstatvfs64() V*/
- sys irix_getmountid 2 /* 1203 getmountid()XXXfsids HV*/
- sys irix_nsproc 5 /* 1204 nsproc() IV*/
- sys irix_getdents64 3 /* 1205 getdents64() HV*/
- sys irix_unimp 0 /* 1206 XXX DFS garbage DC*/
- sys irix_ngetdents 4 /* 1207 ngetdents() XXXeop HV*/
- sys irix_ngetdents64 4 /* 1208 ngetdents64() XXXeop HV*/
- sys irix_unimp 0 /* 1209 nothin' V*/
- sys irix_unimp 0 /* 1210 XXX pidsprocsp() */
- sys irix_unimp 0 /* 1211 XXX rexec() */
- sys irix_unimp 0 /* 1212 XXX timer_create() */
- sys irix_unimp 0 /* 1213 XXX timer_delete() */
- sys irix_unimp 0 /* 1214 XXX timer_settime() */
- sys irix_unimp 0 /* 1215 XXX timer_gettime() */
- sys irix_unimp 0 /* 1216 XXX timer_setoverrun() */
- sys sys_sched_rr_get_interval 2 /* 1217 sched_rr_get_interval()V*/
- sys sys_sched_yield 0 /* 1218 sched_yield() V*/
- sys sys_sched_getscheduler 1 /* 1219 sched_getscheduler() V*/
- sys sys_sched_setscheduler 3 /* 1220 sched_setscheduler() V*/
- sys sys_sched_getparam 2 /* 1221 sched_getparam() V*/
- sys sys_sched_setparam 2 /* 1222 sched_setparam() V*/
- sys irix_unimp 0 /* 1223 XXX usync_cntl() */
- sys irix_unimp 0 /* 1224 XXX psema_cntl() */
- sys irix_unimp 0 /* 1225 XXX restartreturn() */
-
- /* Just to pad things out nicely. */
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
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- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
- sys irix_unimp 0
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- sys irix_unimp 0
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- sys irix_unimp 0
- sys irix_unimp 0
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-
- .endm
-
- /*
- * Pre-compute the number of _instruction_ bytes needed to load
- * or store the arguments 6-8. Negative values are ignored.
- */
- .macro sys function, nargs
- PTR \function
- LONG (\nargs << 2) - (5 << 2)
- .endm
-
- .align 4
-EXPORT(sys_call_table_irix5)
- irix5syscalltable
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
deleted file mode 100644
index 469c723..0000000
--- a/arch/mips/kernel/irixelf.c
+++ /dev/null
@@ -1,1361 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * irixelf.c: Code to load IRIX ELF executables conforming to the MIPS ABI.
- * Based off of work by Eric Youngdale.
- *
- * Copyright (C) 1993 - 1994 Eric Youngdale <ericy@cais.com>
- * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com>
- * Copyright (C) 2004 - 2005 Steven J. Hill <sjhill@realitydiluted.com>
- */
-#undef DEBUG
-
-#include <linux/module.h>
-#include <linux/fs.h>
-#include <linux/stat.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/mman.h>
-#include <linux/a.out.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/signal.h>
-#include <linux/binfmts.h>
-#include <linux/string.h>
-#include <linux/file.h>
-#include <linux/fcntl.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/shm.h>
-#include <linux/personality.h>
-#include <linux/elfcore.h>
-
-#include <asm/mipsregs.h>
-#include <asm/namei.h>
-#include <asm/prctl.h>
-#include <asm/uaccess.h>
-
-#define DLINFO_ITEMS 12
-
-#include <linux/elf.h>
-
-static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs);
-static int load_irix_library(struct file *);
-static int irix_core_dump(long signr, struct pt_regs * regs,
- struct file *file, unsigned long limit);
-
-static struct linux_binfmt irix_format = {
- .module = THIS_MODULE,
- .load_binary = load_irix_binary,
- .load_shlib = load_irix_library,
- .core_dump = irix_core_dump,
- .min_coredump = PAGE_SIZE,
-};
-
-/* Debugging routines. */
-static char *get_elf_p_type(Elf32_Word p_type)
-{
-#ifdef DEBUG
- switch (p_type) {
- case PT_NULL:
- return "PT_NULL";
- break;
-
- case PT_LOAD:
- return "PT_LOAD";
- break;
-
- case PT_DYNAMIC:
- return "PT_DYNAMIC";
- break;
-
- case PT_INTERP:
- return "PT_INTERP";
- break;
-
- case PT_NOTE:
- return "PT_NOTE";
- break;
-
- case PT_SHLIB:
- return "PT_SHLIB";
- break;
-
- case PT_PHDR:
- return "PT_PHDR";
- break;
-
- case PT_LOPROC:
- return "PT_LOPROC/REGINFO";
- break;
-
- case PT_HIPROC:
- return "PT_HIPROC";
- break;
-
- default:
- return "PT_BOGUS";
- break;
- }
-#endif
-}
-
-static void print_elfhdr(struct elfhdr *ehp)
-{
- int i;
-
- pr_debug("ELFHDR: e_ident<");
- for (i = 0; i < (EI_NIDENT - 1); i++)
- pr_debug("%x ", ehp->e_ident[i]);
- pr_debug("%x>\n", ehp->e_ident[i]);
- pr_debug(" e_type[%04x] e_machine[%04x] e_version[%08lx]\n",
- (unsigned short) ehp->e_type, (unsigned short) ehp->e_machine,
- (unsigned long) ehp->e_version);
- pr_debug(" e_entry[%08lx] e_phoff[%08lx] e_shoff[%08lx] "
- "e_flags[%08lx]\n",
- (unsigned long) ehp->e_entry, (unsigned long) ehp->e_phoff,
- (unsigned long) ehp->e_shoff, (unsigned long) ehp->e_flags);
- pr_debug(" e_ehsize[%04x] e_phentsize[%04x] e_phnum[%04x]\n",
- (unsigned short) ehp->e_ehsize,
- (unsigned short) ehp->e_phentsize,
- (unsigned short) ehp->e_phnum);
- pr_debug(" e_shentsize[%04x] e_shnum[%04x] e_shstrndx[%04x]\n",
- (unsigned short) ehp->e_shentsize,
- (unsigned short) ehp->e_shnum,
- (unsigned short) ehp->e_shstrndx);
-}
-
-static void print_phdr(int i, struct elf_phdr *ep)
-{
- pr_debug("PHDR[%d]: p_type[%s] p_offset[%08lx] p_vaddr[%08lx] "
- "p_paddr[%08lx]\n", i, get_elf_p_type(ep->p_type),
- (unsigned long) ep->p_offset, (unsigned long) ep->p_vaddr,
- (unsigned long) ep->p_paddr);
- pr_debug(" p_filesz[%08lx] p_memsz[%08lx] p_flags[%08lx] "
- "p_align[%08lx]\n", (unsigned long) ep->p_filesz,
- (unsigned long) ep->p_memsz, (unsigned long) ep->p_flags,
- (unsigned long) ep->p_align);
-}
-
-static void dump_phdrs(struct elf_phdr *ep, int pnum)
-{
- int i;
-
- for (i = 0; i < pnum; i++, ep++) {
- if ((ep->p_type == PT_LOAD) ||
- (ep->p_type == PT_INTERP) ||
- (ep->p_type == PT_PHDR))
- print_phdr(i, ep);
- }
-}
-
-static void set_brk(unsigned long start, unsigned long end)
-{
- start = PAGE_ALIGN(start);
- end = PAGE_ALIGN(end);
- if (end <= start)
- return;
- down_write(¤t->mm->mmap_sem);
- do_brk(start, end - start);
- up_write(¤t->mm->mmap_sem);
-}
-
-
-/* We need to explicitly zero any fractional pages
- * after the data section (i.e. bss). This would
- * contain the junk from the file that should not
- * be in memory.
- */
-static void padzero(unsigned long elf_bss)
-{
- unsigned long nbyte;
-
- nbyte = elf_bss & (PAGE_SIZE-1);
- if (nbyte) {
- nbyte = PAGE_SIZE - nbyte;
- clear_user((void __user *) elf_bss, nbyte);
- }
-}
-
-static unsigned long * create_irix_tables(char * p, int argc, int envc,
- struct elfhdr * exec, unsigned int load_addr,
- unsigned int interp_load_addr, struct pt_regs *regs,
- struct elf_phdr *ephdr)
-{
- elf_addr_t *argv;
- elf_addr_t *envp;
- elf_addr_t *sp, *csp;
-
- pr_debug("create_irix_tables: p[%p] argc[%d] envc[%d] "
- "load_addr[%08x] interp_load_addr[%08x]\n",
- p, argc, envc, load_addr, interp_load_addr);
-
- sp = (elf_addr_t *) (~15UL & (unsigned long) p);
- csp = sp;
- csp -= exec ? DLINFO_ITEMS*2 : 2;
- csp -= envc+1;
- csp -= argc+1;
- csp -= 1; /* argc itself */
- if ((unsigned long)csp & 15UL) {
- sp -= (16UL - ((unsigned long)csp & 15UL)) / sizeof(*sp);
- }
-
- /*
- * Put the ELF interpreter info on the stack
- */
-#define NEW_AUX_ENT(nr, id, val) \
- __put_user((id), sp+(nr*2)); \
- __put_user((val), sp+(nr*2+1)); \
-
- sp -= 2;
- NEW_AUX_ENT(0, AT_NULL, 0);
-
- if (exec) {
- sp -= 11*2;
-
- NEW_AUX_ENT(0, AT_PHDR, load_addr + exec->e_phoff);
- NEW_AUX_ENT(1, AT_PHENT, sizeof(struct elf_phdr));
- NEW_AUX_ENT(2, AT_PHNUM, exec->e_phnum);
- NEW_AUX_ENT(3, AT_PAGESZ, ELF_EXEC_PAGESIZE);
- NEW_AUX_ENT(4, AT_BASE, interp_load_addr);
- NEW_AUX_ENT(5, AT_FLAGS, 0);
- NEW_AUX_ENT(6, AT_ENTRY, (elf_addr_t) exec->e_entry);
- NEW_AUX_ENT(7, AT_UID, (elf_addr_t) current->uid);
- NEW_AUX_ENT(8, AT_EUID, (elf_addr_t) current->euid);
- NEW_AUX_ENT(9, AT_GID, (elf_addr_t) current->gid);
- NEW_AUX_ENT(10, AT_EGID, (elf_addr_t) current->egid);
- }
-#undef NEW_AUX_ENT
-
- sp -= envc+1;
- envp = sp;
- sp -= argc+1;
- argv = sp;
-
- __put_user((elf_addr_t)argc, --sp);
- current->mm->arg_start = (unsigned long) p;
- while (argc-->0) {
- __put_user((unsigned long)p, argv++);
- p += strlen_user(p);
- }
- __put_user((unsigned long) NULL, argv);
- current->mm->arg_end = current->mm->env_start = (unsigned long) p;
- while (envc-->0) {
- __put_user((unsigned long)p, envp++);
- p += strlen_user(p);
- }
- __put_user((unsigned long) NULL, envp);
- current->mm->env_end = (unsigned long) p;
- return sp;
-}
-
-
-/* This is much more generalized than the library routine read function,
- * so we keep this separate. Technically the library read function
- * is only provided so that we can read a.out libraries that have
- * an ELF header.
- */
-static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex,
- struct file * interpreter,
- unsigned int *interp_load_addr)
-{
- struct elf_phdr *elf_phdata = NULL;
- struct elf_phdr *eppnt;
- unsigned int len;
- unsigned int load_addr;
- int elf_bss;
- int retval;
- unsigned int last_bss;
- int error;
- int i;
- unsigned int k;
-
- elf_bss = 0;
- last_bss = 0;
- error = load_addr = 0;
-
- print_elfhdr(interp_elf_ex);
-
- /* First of all, some simple consistency checks */
- if ((interp_elf_ex->e_type != ET_EXEC &&
- interp_elf_ex->e_type != ET_DYN) ||
- !interpreter->f_op->mmap) {
- printk("IRIX interp has bad e_type %d\n", interp_elf_ex->e_type);
- return 0xffffffff;
- }
-
- /* Now read in all of the header information */
- if (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum > PAGE_SIZE) {
- printk("IRIX interp header bigger than a page (%d)\n",
- (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum));
- return 0xffffffff;
- }
-
- elf_phdata = kmalloc(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum,
- GFP_KERNEL);
-
- if (!elf_phdata) {
- printk("Cannot kmalloc phdata for IRIX interp.\n");
- return 0xffffffff;
- }
-
- /* If the size of this structure has changed, then punt, since
- * we will be doing the wrong thing.
- */
- if (interp_elf_ex->e_phentsize != 32) {
- printk("IRIX interp e_phentsize == %d != 32 ",
- interp_elf_ex->e_phentsize);
- kfree(elf_phdata);
- return 0xffffffff;
- }
-
- retval = kernel_read(interpreter, interp_elf_ex->e_phoff,
- (char *) elf_phdata,
- sizeof(struct elf_phdr) * interp_elf_ex->e_phnum);
-
- dump_phdrs(elf_phdata, interp_elf_ex->e_phnum);
-
- eppnt = elf_phdata;
- for (i = 0; i < interp_elf_ex->e_phnum; i++, eppnt++) {
- if (eppnt->p_type == PT_LOAD) {
- int elf_type = MAP_PRIVATE | MAP_DENYWRITE;
- int elf_prot = 0;
- unsigned long vaddr = 0;
- if (eppnt->p_flags & PF_R)
- elf_prot = PROT_READ;
- if (eppnt->p_flags & PF_W)
- elf_prot |= PROT_WRITE;
- if (eppnt->p_flags & PF_X)
- elf_prot |= PROT_EXEC;
- elf_type |= MAP_FIXED;
- vaddr = eppnt->p_vaddr;
-
- pr_debug("INTERP do_mmap"
- "(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ",
- interpreter, vaddr,
- (unsigned long)
- (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)),
- (unsigned long)
- elf_prot, (unsigned long) elf_type,
- (unsigned long)
- (eppnt->p_offset & 0xfffff000));
-
- down_write(¤t->mm->mmap_sem);
- error = do_mmap(interpreter, vaddr,
- eppnt->p_filesz + (eppnt->p_vaddr & 0xfff),
- elf_prot, elf_type,
- eppnt->p_offset & 0xfffff000);
- up_write(¤t->mm->mmap_sem);
-
- if (error < 0 && error > -1024) {
- printk("Aieee IRIX interp mmap error=%d\n",
- error);
- break; /* Real error */
- }
- pr_debug("error=%08lx ", (unsigned long) error);
- if (!load_addr && interp_elf_ex->e_type == ET_DYN) {
- load_addr = error;
- pr_debug("load_addr = error ");
- }
-
- /*
- * Find the end of the file mapping for this phdr, and
- * keep track of the largest address we see for this.
- */
- k = eppnt->p_vaddr + eppnt->p_filesz;
- if (k > elf_bss)
- elf_bss = k;
-
- /* Do the same thing for the memory mapping - between
- * elf_bss and last_bss is the bss section.
- */
- k = eppnt->p_memsz + eppnt->p_vaddr;
- if (k > last_bss)
- last_bss = k;
- pr_debug("\n");
- }
- }
-
- /* Now use mmap to map the library into memory. */
- if (error < 0 && error > -1024) {
- pr_debug("got error %d\n", error);
- kfree(elf_phdata);
- return 0xffffffff;
- }
-
- /* Now fill out the bss section. First pad the last page up
- * to the page boundary, and then perform a mmap to make sure
- * that there are zero-mapped pages up to and including the
- * last bss page.
- */
- pr_debug("padzero(%08lx) ", (unsigned long) (elf_bss));
- padzero(elf_bss);
- len = (elf_bss + 0xfff) & 0xfffff000; /* What we have mapped so far */
-
- pr_debug("last_bss[%08lx] len[%08lx]\n", (unsigned long) last_bss,
- (unsigned long) len);
-
- /* Map the last of the bss segment */
- if (last_bss > len) {
- down_write(¤t->mm->mmap_sem);
- do_brk(len, (last_bss - len));
- up_write(¤t->mm->mmap_sem);
- }
- kfree(elf_phdata);
-
- *interp_load_addr = load_addr;
- return ((unsigned int) interp_elf_ex->e_entry);
-}
-
-/* Check sanity of IRIX elf executable header. */
-static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm)
-{
- if (memcmp(ehp->e_ident, ELFMAG, SELFMAG) != 0)
- return -ENOEXEC;
-
- /* First of all, some simple consistency checks */
- if ((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) ||
- !bprm->file->f_op->mmap) {
- return -ENOEXEC;
- }
-
- /* XXX Don't support N32 or 64bit binaries yet because they can
- * XXX and do execute 64 bit instructions and expect all registers
- * XXX to be 64 bit as well. We need to make the kernel save
- * XXX all registers as 64bits on cpu's capable of this at
- * XXX exception time plus frob the XTLB exception vector.
- */
- if ((ehp->e_flags & EF_MIPS_ABI2))
- return -ENOEXEC;
-
- return 0;
-}
-
-/*
- * This is where the detailed check is performed. Irix binaries
- * use interpreters with 'libc.so' in the name, so this function
- * can differentiate between Linux and Irix binaries.
- */
-static inline int look_for_irix_interpreter(char **name,
- struct file **interpreter,
- struct elfhdr *interp_elf_ex,
- struct elf_phdr *epp,
- struct linux_binprm *bprm, int pnum)
-{
- int i;
- int retval = -EINVAL;
- struct file *file = NULL;
-
- *name = NULL;
- for (i = 0; i < pnum; i++, epp++) {
- if (epp->p_type != PT_INTERP)
- continue;
-
- /* It is illegal to have two interpreters for one executable. */
- if (*name != NULL)
- goto out;
-
- *name = kmalloc(epp->p_filesz + strlen(IRIX_EMUL), GFP_KERNEL);
- if (!*name)
- return -ENOMEM;
-
- strcpy(*name, IRIX_EMUL);
- retval = kernel_read(bprm->file, epp->p_offset, (*name + 16),
- epp->p_filesz);
- if (retval < 0)
- goto out;
-
- file = open_exec(*name);
- if (IS_ERR(file)) {
- retval = PTR_ERR(file);
- goto out;
- }
- retval = kernel_read(file, 0, bprm->buf, 128);
- if (retval < 0)
- goto dput_and_out;
-
- *interp_elf_ex = *(struct elfhdr *) bprm->buf;
- }
- *interpreter = file;
- return 0;
-
-dput_and_out:
- fput(file);
-out:
- kfree(*name);
- return retval;
-}
-
-static inline int verify_irix_interpreter(struct elfhdr *ihp)
-{
- if (memcmp(ihp->e_ident, ELFMAG, SELFMAG) != 0)
- return -ELIBBAD;
- return 0;
-}
-
-#define EXEC_MAP_FLAGS (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE | MAP_EXECUTABLE)
-
-static inline void map_executable(struct file *fp, struct elf_phdr *epp, int pnum,
- unsigned int *estack, unsigned int *laddr,
- unsigned int *scode, unsigned int *ebss,
- unsigned int *ecode, unsigned int *edata,
- unsigned int *ebrk)
-{
- unsigned int tmp;
- int i, prot;
-
- for (i = 0; i < pnum; i++, epp++) {
- if (epp->p_type != PT_LOAD)
- continue;
-
- /* Map it. */
- prot = (epp->p_flags & PF_R) ? PROT_READ : 0;
- prot |= (epp->p_flags & PF_W) ? PROT_WRITE : 0;
- prot |= (epp->p_flags & PF_X) ? PROT_EXEC : 0;
- down_write(¤t->mm->mmap_sem);
- (void) do_mmap(fp, (epp->p_vaddr & 0xfffff000),
- (epp->p_filesz + (epp->p_vaddr & 0xfff)),
- prot, EXEC_MAP_FLAGS,
- (epp->p_offset & 0xfffff000));
- up_write(¤t->mm->mmap_sem);
-
- /* Fixup location tracking vars. */
- if ((epp->p_vaddr & 0xfffff000) < *estack)
- *estack = (epp->p_vaddr & 0xfffff000);
- if (!*laddr)
- *laddr = epp->p_vaddr - epp->p_offset;
- if (epp->p_vaddr < *scode)
- *scode = epp->p_vaddr;
-
- tmp = epp->p_vaddr + epp->p_filesz;
- if (tmp > *ebss)
- *ebss = tmp;
- if ((epp->p_flags & PF_X) && *ecode < tmp)
- *ecode = tmp;
- if (*edata < tmp)
- *edata = tmp;
-
- tmp = epp->p_vaddr + epp->p_memsz;
- if (tmp > *ebrk)
- *ebrk = tmp;
- }
-
-}
-
-static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp,
- struct file *interp, unsigned int *iladdr,
- int pnum, mm_segment_t old_fs,
- unsigned int *eentry)
-{
- int i;
-
- *eentry = 0xffffffff;
- for (i = 0; i < pnum; i++, epp++) {
- if (epp->p_type != PT_INTERP)
- continue;
-
- /* We should have fielded this error elsewhere... */
- if (*eentry != 0xffffffff)
- return -1;
-
- set_fs(old_fs);
- *eentry = load_irix_interp(ihp, interp, iladdr);
- old_fs = get_fs();
- set_fs(get_ds());
-
- fput(interp);
-
- if (*eentry == 0xffffffff)
- return -1;
- }
- return 0;
-}
-
-/*
- * IRIX maps a page at 0x200000 that holds information about the
- * process and the system, here we map the page and fill the
- * structure
- */
-static int irix_map_prda_page(void)
-{
- unsigned long v;
- struct prda *pp;
-
- down_write(¤t->mm->mmap_sem);
- v = do_brk(PRDA_ADDRESS, PAGE_SIZE);
- up_write(¤t->mm->mmap_sem);
-
- if (v != PRDA_ADDRESS)
- return v; /* v must be an error code */
-
- pp = (struct prda *) v;
- pp->prda_sys.t_pid = task_pid_vnr(current);
- pp->prda_sys.t_prid = read_c0_prid();
- pp->prda_sys.t_rpid = task_pid_vnr(current);
-
- /* We leave the rest set to zero */
-
- return 0;
-}
-
-
-
-/* These are the functions used to load ELF style executables and shared
- * libraries. There is no binary dependent code anywhere else.
- */
-static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs)
-{
- struct elfhdr elf_ex, interp_elf_ex;
- struct file *interpreter;
- struct elf_phdr *elf_phdata, *elf_ihdr, *elf_ephdr;
- unsigned int load_addr, elf_bss, elf_brk;
- unsigned int elf_entry, interp_load_addr = 0;
- unsigned int start_code, end_code, end_data, elf_stack;
- int retval, has_interp, has_ephdr, size, i;
- char *elf_interpreter;
- mm_segment_t old_fs;
-
- load_addr = 0;
- has_interp = has_ephdr = 0;
- elf_ihdr = elf_ephdr = NULL;
- elf_ex = *((struct elfhdr *) bprm->buf);
- retval = -ENOEXEC;
-
- if (verify_binary(&elf_ex, bprm))
- goto out;
-
- /*
- * Telling -o32 static binaries from Linux and Irix apart from each
- * other is difficult. There are 2 differences to be noted for static
- * binaries from the 2 operating systems:
- *
- * 1) Irix binaries have their .text section before their .init
- * section. Linux binaries are just the opposite.
- *
- * 2) Irix binaries usually have <= 12 sections and Linux
- * binaries have > 20.
- *
- * We will use Method #2 since Method #1 would require us to read in
- * the section headers which is way too much overhead. This appears
- * to work for everything we have ran into so far. If anyone has a
- * better method to tell the binaries apart, I'm listening.
- */
- if (elf_ex.e_shnum > 20)
- goto out;
-
- print_elfhdr(&elf_ex);
-
- /* Now read in all of the header information */
- size = elf_ex.e_phentsize * elf_ex.e_phnum;
- if (size > 65536)
- goto out;
- elf_phdata = kmalloc(size, GFP_KERNEL);
- if (elf_phdata == NULL) {
- retval = -ENOMEM;
- goto out;
- }
-
- retval = kernel_read(bprm->file, elf_ex.e_phoff, (char *)elf_phdata, size);
- if (retval < 0)
- goto out_free_ph;
-
- dump_phdrs(elf_phdata, elf_ex.e_phnum);
-
- /* Set some things for later. */
- for (i = 0; i < elf_ex.e_phnum; i++) {
- switch (elf_phdata[i].p_type) {
- case PT_INTERP:
- has_interp = 1;
- elf_ihdr = &elf_phdata[i];
- break;
- case PT_PHDR:
- has_ephdr = 1;
- elf_ephdr = &elf_phdata[i];
- break;
- };
- }
-
- pr_debug("\n");
-
- elf_bss = 0;
- elf_brk = 0;
-
- elf_stack = 0xffffffff;
- elf_interpreter = NULL;
- start_code = 0xffffffff;
- end_code = 0;
- end_data = 0;
-
- /*
- * If we get a return value, we change the value to be ENOEXEC
- * so that we can exit gracefully and the main binary format
- * search loop in 'fs/exec.c' will move onto the next handler
- * which should be the normal ELF binary handler.
- */
- retval = look_for_irix_interpreter(&elf_interpreter, &interpreter,
- &interp_elf_ex, elf_phdata, bprm,
- elf_ex.e_phnum);
- if (retval) {
- retval = -ENOEXEC;
- goto out_free_file;
- }
-
- if (elf_interpreter) {
- retval = verify_irix_interpreter(&interp_elf_ex);
- if (retval)
- goto out_free_interp;
- }
-
- /* OK, we are done with that, now set up the arg stuff,
- * and then start this sucker up.
- */
- retval = -E2BIG;
- if (!bprm->sh_bang && !bprm->p)
- goto out_free_interp;
-
- /* Flush all traces of the currently running executable */
- retval = flush_old_exec(bprm);
- if (retval)
- goto out_free_dentry;
-
- /* OK, This is the point of no return */
- current->mm->end_data = 0;
- current->mm->end_code = 0;
- current->mm->mmap = NULL;
- current->flags &= ~PF_FORKNOEXEC;
- elf_entry = (unsigned int) elf_ex.e_entry;
-
- /* Do this so that we can load the interpreter, if need be. We will
- * change some of these later.
- */
- setup_arg_pages(bprm, STACK_TOP, EXSTACK_DEFAULT);
- current->mm->start_stack = bprm->p;
-
- /* At this point, we assume that the image should be loaded at
- * fixed address, not at a variable address.
- */
- old_fs = get_fs();
- set_fs(get_ds());
-
- map_executable(bprm->file, elf_phdata, elf_ex.e_phnum, &elf_stack,
- &load_addr, &start_code, &elf_bss, &end_code,
- &end_data, &elf_brk);
-
- if (elf_interpreter) {
- retval = map_interpreter(elf_phdata, &interp_elf_ex,
- interpreter, &interp_load_addr,
- elf_ex.e_phnum, old_fs, &elf_entry);
- kfree(elf_interpreter);
- if (retval) {
- set_fs(old_fs);
- printk("Unable to load IRIX ELF interpreter\n");
- send_sig(SIGSEGV, current, 0);
- retval = 0;
- goto out_free_file;
- }
- }
-
- set_fs(old_fs);
-
- kfree(elf_phdata);
- set_personality(PER_IRIX32);
- set_binfmt(&irix_format);
- compute_creds(bprm);
- current->flags &= ~PF_FORKNOEXEC;
- bprm->p = (unsigned long)
- create_irix_tables((char *)bprm->p, bprm->argc, bprm->envc,
- (elf_interpreter ? &elf_ex : NULL),
- load_addr, interp_load_addr, regs, elf_ephdr);
- current->mm->start_brk = current->mm->brk = elf_brk;
- current->mm->end_code = end_code;
- current->mm->start_code = start_code;
- current->mm->end_data = end_data;
- current->mm->start_stack = bprm->p;
-
- /* Calling set_brk effectively mmaps the pages that we need for the
- * bss and break sections.
- */
- set_brk(elf_bss, elf_brk);
-
- /*
- * IRIX maps a page at 0x200000 which holds some system
- * information. Programs depend on this.
- */
- if (irix_map_prda_page())
- goto out_free_dentry;
-
- padzero(elf_bss);
-
- pr_debug("(start_brk) %lx\n" , (long) current->mm->start_brk);
- pr_debug("(end_code) %lx\n" , (long) current->mm->end_code);
- pr_debug("(start_code) %lx\n" , (long) current->mm->start_code);
- pr_debug("(end_data) %lx\n" , (long) current->mm->end_data);
- pr_debug("(start_stack) %lx\n" , (long) current->mm->start_stack);
- pr_debug("(brk) %lx\n" , (long) current->mm->brk);
-
-#if 0 /* XXX No fucking way dude... */
- /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
- * and some applications "depend" upon this behavior.
- * Since we do not have the power to recompile these, we
- * emulate the SVr4 behavior. Sigh.
- */
- down_write(¤t->mm->mmap_sem);
- (void) do_mmap(NULL, 0, 4096, PROT_READ | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE, 0);
- up_write(¤t->mm->mmap_sem);
-#endif
-
- start_thread(regs, elf_entry, bprm->p);
- if (current->ptrace & PT_PTRACED)
- send_sig(SIGTRAP, current, 0);
- return 0;
-out:
- return retval;
-
-out_free_dentry:
- allow_write_access(interpreter);
- fput(interpreter);
-out_free_interp:
- kfree(elf_interpreter);
-out_free_file:
-out_free_ph:
- kfree(elf_phdata);
- goto out;
-}
-
-/* This is really simpleminded and specialized - we are loading an
- * a.out library that is given an ELF header.
- */
-static int load_irix_library(struct file *file)
-{
- struct elfhdr elf_ex;
- struct elf_phdr *elf_phdata = NULL;
- unsigned int len = 0;
- int elf_bss = 0;
- int retval;
- unsigned int bss;
- int error;
- int i, j, k;
-
- error = kernel_read(file, 0, (char *) &elf_ex, sizeof(elf_ex));
- if (error != sizeof(elf_ex))
- return -ENOEXEC;
-
- if (memcmp(elf_ex.e_ident, ELFMAG, SELFMAG) != 0)
- return -ENOEXEC;
-
- /* First of all, some simple consistency checks. */
- if (elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 ||
- !file->f_op->mmap)
- return -ENOEXEC;
-
- /* Now read in all of the header information. */
- if (sizeof(struct elf_phdr) * elf_ex.e_phnum > PAGE_SIZE)
- return -ENOEXEC;
-
- elf_phdata = kmalloc(sizeof(struct elf_phdr) * elf_ex.e_phnum, GFP_KERNEL);
- if (elf_phdata == NULL)
- return -ENOMEM;
-
- retval = kernel_read(file, elf_ex.e_phoff, (char *) elf_phdata,
- sizeof(struct elf_phdr) * elf_ex.e_phnum);
-
- j = 0;
- for (i=0; i<elf_ex.e_phnum; i++)
- if ((elf_phdata + i)->p_type == PT_LOAD) j++;
-
- if (j != 1) {
- kfree(elf_phdata);
- return -ENOEXEC;
- }
-
- while (elf_phdata->p_type != PT_LOAD) elf_phdata++;
-
- /* Now use mmap to map the library into memory. */
- down_write(¤t->mm->mmap_sem);
- error = do_mmap(file,
- elf_phdata->p_vaddr & 0xfffff000,
- elf_phdata->p_filesz + (elf_phdata->p_vaddr & 0xfff),
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE,
- elf_phdata->p_offset & 0xfffff000);
- up_write(¤t->mm->mmap_sem);
-
- k = elf_phdata->p_vaddr + elf_phdata->p_filesz;
- if (k > elf_bss) elf_bss = k;
-
- if (error != (elf_phdata->p_vaddr & 0xfffff000)) {
- kfree(elf_phdata);
- return error;
- }
-
- padzero(elf_bss);
-
- len = (elf_phdata->p_filesz + elf_phdata->p_vaddr+ 0xfff) & 0xfffff000;
- bss = elf_phdata->p_memsz + elf_phdata->p_vaddr;
- if (bss > len) {
- down_write(¤t->mm->mmap_sem);
- do_brk(len, bss-len);
- up_write(¤t->mm->mmap_sem);
- }
- kfree(elf_phdata);
- return 0;
-}
-
-/* Called through irix_syssgi() to map an elf image given an FD,
- * a phdr ptr USER_PHDRP in userspace, and a count CNT telling how many
- * phdrs there are in the USER_PHDRP array. We return the vaddr the
- * first phdr was successfully mapped to.
- */
-unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt)
-{
- unsigned long type, vaddr, filesz, offset, flags;
- struct elf_phdr __user *hp;
- struct file *filp;
- int i, retval;
-
- pr_debug("irix_mapelf: fd[%d] user_phdrp[%p] cnt[%d]\n",
- fd, user_phdrp, cnt);
-
- /* First get the verification out of the way. */
- hp = user_phdrp;
- if (!access_ok(VERIFY_READ, hp, (sizeof(struct elf_phdr) * cnt))) {
- pr_debug("irix_mapelf: bad pointer to ELF PHDR!\n");
-
- return -EFAULT;
- }
-
- dump_phdrs(user_phdrp, cnt);
-
- for (i = 0; i < cnt; i++, hp++) {
- if (__get_user(type, &hp->p_type))
- return -EFAULT;
- if (type != PT_LOAD) {
- printk("irix_mapelf: One section is not PT_LOAD!\n");
- return -ENOEXEC;
- }
- }
-
- filp = fget(fd);
- if (!filp)
- return -EACCES;
- if (!filp->f_op) {
- printk("irix_mapelf: Bogon filp!\n");
- fput(filp);
- return -EACCES;
- }
-
- hp = user_phdrp;
- for (i = 0; i < cnt; i++, hp++) {
- int prot;
-
- retval = __get_user(vaddr, &hp->p_vaddr);
- retval |= __get_user(filesz, &hp->p_filesz);
- retval |= __get_user(offset, &hp->p_offset);
- retval |= __get_user(flags, &hp->p_flags);
- if (retval)
- return retval;
-
- prot = (flags & PF_R) ? PROT_READ : 0;
- prot |= (flags & PF_W) ? PROT_WRITE : 0;
- prot |= (flags & PF_X) ? PROT_EXEC : 0;
-
- down_write(¤t->mm->mmap_sem);
- retval = do_mmap(filp, (vaddr & 0xfffff000),
- (filesz + (vaddr & 0xfff)),
- prot, (MAP_FIXED | MAP_PRIVATE | MAP_DENYWRITE),
- (offset & 0xfffff000));
- up_write(¤t->mm->mmap_sem);
-
- if (retval != (vaddr & 0xfffff000)) {
- printk("irix_mapelf: do_mmap fails with %d!\n", retval);
- fput(filp);
- return retval;
- }
- }
-
- pr_debug("irix_mapelf: Success, returning %08lx\n",
- (unsigned long) user_phdrp->p_vaddr);
-
- fput(filp);
-
- if (__get_user(vaddr, &user_phdrp->p_vaddr))
- return -EFAULT;
-
- return vaddr;
-}
-
-/*
- * ELF core dumper
- *
- * Modelled on fs/exec.c:aout_core_dump()
- * Jeremy Fitzhardinge <jeremy@sw.oz.au>
- */
-
-/* These are the only things you should do on a core-file: use only these
- * functions to write out all the necessary info.
- */
-static int dump_write(struct file *file, const void __user *addr, int nr)
-{
- return file->f_op->write(file, (const char __user *) addr, nr, &file->f_pos) == nr;
-}
-
-static int dump_seek(struct file *file, off_t off)
-{
- if (file->f_op->llseek) {
- if (file->f_op->llseek(file, off, 0) != off)
- return 0;
- } else
- file->f_pos = off;
- return 1;
-}
-
-/* Decide whether a segment is worth dumping; default is yes to be
- * sure (missing info is worse than too much; etc).
- * Personally I'd include everything, and use the coredump limit...
- *
- * I think we should skip something. But I am not sure how. H.J.
- */
-static inline int maydump(struct vm_area_struct *vma)
-{
- if (!(vma->vm_flags & (VM_READ|VM_WRITE|VM_EXEC)))
- return 0;
-#if 1
- if (vma->vm_flags & (VM_WRITE|VM_GROWSUP|VM_GROWSDOWN))
- return 1;
- if (vma->vm_flags & (VM_READ|VM_EXEC|VM_EXECUTABLE|VM_SHARED))
- return 0;
-#endif
- return 1;
-}
-
-/* An ELF note in memory. */
-struct memelfnote
-{
- const char *name;
- int type;
- unsigned int datasz;
- void *data;
-};
-
-static int notesize(struct memelfnote *en)
-{
- int sz;
-
- sz = sizeof(struct elf_note);
- sz += roundup(strlen(en->name) + 1, 4);
- sz += roundup(en->datasz, 4);
-
- return sz;
-}
-
-#define DUMP_WRITE(addr, nr) \
- if (!dump_write(file, (addr), (nr))) \
- goto end_coredump;
-#define DUMP_SEEK(off) \
- if (!dump_seek(file, (off))) \
- goto end_coredump;
-
-static int writenote(struct memelfnote *men, struct file *file)
-{
- struct elf_note en;
-
- en.n_namesz = strlen(men->name) + 1;
- en.n_descsz = men->datasz;
- en.n_type = men->type;
-
- DUMP_WRITE(&en, sizeof(en));
- DUMP_WRITE(men->name, en.n_namesz);
- /* XXX - cast from long long to long to avoid need for libgcc.a */
- DUMP_SEEK(roundup((unsigned long)file->f_pos, 4)); /* XXX */
- DUMP_WRITE(men->data, men->datasz);
- DUMP_SEEK(roundup((unsigned long)file->f_pos, 4)); /* XXX */
-
- return 1;
-
-end_coredump:
- return 0;
-}
-#undef DUMP_WRITE
-#undef DUMP_SEEK
-
-#define DUMP_WRITE(addr, nr) \
- if (!dump_write(file, (addr), (nr))) \
- goto end_coredump;
-#define DUMP_SEEK(off) \
- if (!dump_seek(file, (off))) \
- goto end_coredump;
-
-/* Actual dumper.
- *
- * This is a two-pass process; first we find the offsets of the bits,
- * and then they are actually written out. If we run out of core limit
- * we just truncate.
- */
-static int irix_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit)
-{
- int has_dumped = 0;
- mm_segment_t fs;
- int segs;
- int i;
- size_t size;
- struct vm_area_struct *vma;
- struct elfhdr elf;
- off_t offset = 0, dataoff;
- int numnote = 3;
- struct memelfnote notes[3];
- struct elf_prstatus prstatus; /* NT_PRSTATUS */
- elf_fpregset_t fpu; /* NT_PRFPREG */
- struct elf_prpsinfo psinfo; /* NT_PRPSINFO */
-
- /* Count what's needed to dump, up to the limit of coredump size. */
- segs = 0;
- size = 0;
- for (vma = current->mm->mmap; vma != NULL; vma = vma->vm_next) {
- if (maydump(vma))
- {
- int sz = vma->vm_end-vma->vm_start;
-
- if (size+sz >= limit)
- break;
- else
- size += sz;
- }
-
- segs++;
- }
- pr_debug("irix_core_dump: %d segs taking %d bytes\n", segs, size);
-
- /* Set up header. */
- memcpy(elf.e_ident, ELFMAG, SELFMAG);
- elf.e_ident[EI_CLASS] = ELFCLASS32;
- elf.e_ident[EI_DATA] = ELFDATA2LSB;
- elf.e_ident[EI_VERSION] = EV_CURRENT;
- elf.e_ident[EI_OSABI] = ELF_OSABI;
- memset(elf.e_ident+EI_PAD, 0, EI_NIDENT-EI_PAD);
-
- elf.e_type = ET_CORE;
- elf.e_machine = ELF_ARCH;
- elf.e_version = EV_CURRENT;
- elf.e_entry = 0;
- elf.e_phoff = sizeof(elf);
- elf.e_shoff = 0;
- elf.e_flags = 0;
- elf.e_ehsize = sizeof(elf);
- elf.e_phentsize = sizeof(struct elf_phdr);
- elf.e_phnum = segs+1; /* Include notes. */
- elf.e_shentsize = 0;
- elf.e_shnum = 0;
- elf.e_shstrndx = 0;
-
- fs = get_fs();
- set_fs(KERNEL_DS);
-
- has_dumped = 1;
- current->flags |= PF_DUMPCORE;
-
- DUMP_WRITE(&elf, sizeof(elf));
- offset += sizeof(elf); /* Elf header. */
- offset += (segs+1) * sizeof(struct elf_phdr); /* Program headers. */
-
- /* Set up the notes in similar form to SVR4 core dumps made
- * with info from their /proc.
- */
- memset(&psinfo, 0, sizeof(psinfo));
- memset(&prstatus, 0, sizeof(prstatus));
-
- notes[0].name = "CORE";
- notes[0].type = NT_PRSTATUS;
- notes[0].datasz = sizeof(prstatus);
- notes[0].data = &prstatus;
- prstatus.pr_info.si_signo = prstatus.pr_cursig = signr;
- prstatus.pr_sigpend = current->pending.signal.sig[0];
- prstatus.pr_sighold = current->blocked.sig[0];
- psinfo.pr_pid = prstatus.pr_pid = task_pid_vnr(current);
- psinfo.pr_ppid = prstatus.pr_ppid = task_pid_vnr(current->parent);
- psinfo.pr_pgrp = prstatus.pr_pgrp = task_pgrp_vnr(current);
- psinfo.pr_sid = prstatus.pr_sid = task_session_vnr(current);
- if (thread_group_leader(current)) {
- /*
- * This is the record for the group leader. Add in the
- * cumulative times of previous dead threads. This total
- * won't include the time of each live thread whose state
- * is included in the core dump. The final total reported
- * to our parent process when it calls wait4 will include
- * those sums as well as the little bit more time it takes
- * this and each other thread to finish dying after the
- * core dump synchronization phase.
- */
- jiffies_to_timeval(current->utime + current->signal->utime,
- &prstatus.pr_utime);
- jiffies_to_timeval(current->stime + current->signal->stime,
- &prstatus.pr_stime);
- } else {
- jiffies_to_timeval(current->utime, &prstatus.pr_utime);
- jiffies_to_timeval(current->stime, &prstatus.pr_stime);
- }
- jiffies_to_timeval(current->signal->cutime, &prstatus.pr_cutime);
- jiffies_to_timeval(current->signal->cstime, &prstatus.pr_cstime);
-
- if (sizeof(elf_gregset_t) != sizeof(struct pt_regs)) {
- printk("sizeof(elf_gregset_t) (%d) != sizeof(struct pt_regs) "
- "(%d)\n", sizeof(elf_gregset_t), sizeof(struct pt_regs));
- } else {
- *(struct pt_regs *)&prstatus.pr_reg = *regs;
- }
-
- notes[1].name = "CORE";
- notes[1].type = NT_PRPSINFO;
- notes[1].datasz = sizeof(psinfo);
- notes[1].data = &psinfo;
- i = current->state ? ffz(~current->state) + 1 : 0;
- psinfo.pr_state = i;
- psinfo.pr_sname = (i < 0 || i > 5) ? '.' : "RSDZTD"[i];
- psinfo.pr_zomb = psinfo.pr_sname == 'Z';
- psinfo.pr_nice = task_nice(current);
- psinfo.pr_flag = current->flags;
- psinfo.pr_uid = current->uid;
- psinfo.pr_gid = current->gid;
- {
- int i, len;
-
- set_fs(fs);
-
- len = current->mm->arg_end - current->mm->arg_start;
- len = len >= ELF_PRARGSZ ? ELF_PRARGSZ : len;
- (void *) copy_from_user(&psinfo.pr_psargs,
- (const char __user *)current->mm->arg_start, len);
- for (i = 0; i < len; i++)
- if (psinfo.pr_psargs[i] == 0)
- psinfo.pr_psargs[i] = ' ';
- psinfo.pr_psargs[len] = 0;
-
- set_fs(KERNEL_DS);
- }
- strlcpy(psinfo.pr_fname, current->comm, sizeof(psinfo.pr_fname));
-
- /* Try to dump the FPU. */
- prstatus.pr_fpvalid = dump_fpu(regs, &fpu);
- if (!prstatus.pr_fpvalid) {
- numnote--;
- } else {
- notes[2].name = "CORE";
- notes[2].type = NT_PRFPREG;
- notes[2].datasz = sizeof(fpu);
- notes[2].data = &fpu;
- }
-
- /* Write notes phdr entry. */
- {
- struct elf_phdr phdr;
- int sz = 0;
-
- for (i = 0; i < numnote; i++)
- sz += notesize(¬es[i]);
-
- phdr.p_type = PT_NOTE;
- phdr.p_offset = offset;
- phdr.p_vaddr = 0;
- phdr.p_paddr = 0;
- phdr.p_filesz = sz;
- phdr.p_memsz = 0;
- phdr.p_flags = 0;
- phdr.p_align = 0;
-
- offset += phdr.p_filesz;
- DUMP_WRITE(&phdr, sizeof(phdr));
- }
-
- /* Page-align dumped data. */
- dataoff = offset = roundup(offset, PAGE_SIZE);
-
- /* Write program headers for segments dump. */
- for (vma = current->mm->mmap, i = 0;
- i < segs && vma != NULL; vma = vma->vm_next) {
- struct elf_phdr phdr;
- size_t sz;
-
- i++;
-
- sz = vma->vm_end - vma->vm_start;
-
- phdr.p_type = PT_LOAD;
- phdr.p_offset = offset;
- phdr.p_vaddr = vma->vm_start;
- phdr.p_paddr = 0;
- phdr.p_filesz = maydump(vma) ? sz : 0;
- phdr.p_memsz = sz;
- offset += phdr.p_filesz;
- phdr.p_flags = vma->vm_flags & VM_READ ? PF_R : 0;
- if (vma->vm_flags & VM_WRITE)
- phdr.p_flags |= PF_W;
- if (vma->vm_flags & VM_EXEC)
- phdr.p_flags |= PF_X;
- phdr.p_align = PAGE_SIZE;
-
- DUMP_WRITE(&phdr, sizeof(phdr));
- }
-
- for (i = 0; i < numnote; i++)
- if (!writenote(¬es[i], file))
- goto end_coredump;
-
- set_fs(fs);
-
- DUMP_SEEK(dataoff);
-
- for (i = 0, vma = current->mm->mmap;
- i < segs && vma != NULL;
- vma = vma->vm_next) {
- unsigned long addr = vma->vm_start;
- unsigned long len = vma->vm_end - vma->vm_start;
-
- if (!maydump(vma))
- continue;
- i++;
- pr_debug("elf_core_dump: writing %08lx %lx\n", addr, len);
- DUMP_WRITE((void __user *)addr, len);
- }
-
- if ((off_t) file->f_pos != offset) {
- /* Sanity check. */
- printk("elf_core_dump: file->f_pos (%ld) != offset (%ld)\n",
- (off_t) file->f_pos, offset);
- }
-
-end_coredump:
- set_fs(fs);
- return has_dumped;
-}
-
-static int __init init_irix_binfmt(void)
-{
- extern int init_inventory(void);
- extern asmlinkage unsigned long sys_call_table;
- extern asmlinkage unsigned long sys_call_table_irix5;
-
- init_inventory();
-
- /*
- * Copy the IRIX5 syscall table (8000 bytes) into the main syscall
- * table. The IRIX5 calls are located by an offset of 8000 bytes
- * from the beginning of the main table.
- */
- memcpy((void *) ((unsigned long) &sys_call_table + 8000),
- &sys_call_table_irix5, 8000);
-
- return register_binfmt(&irix_format);
-}
-
-static void __exit exit_irix_binfmt(void)
-{
- /*
- * Remove the Irix ELF loader.
- */
- unregister_binfmt(&irix_format);
-}
-
-module_init(init_irix_binfmt)
-module_exit(exit_irix_binfmt)
diff --git a/arch/mips/kernel/irixinv.c b/arch/mips/kernel/irixinv.c
deleted file mode 100644
index cf2dcd3..0000000
--- a/arch/mips/kernel/irixinv.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Support the inventory interface for IRIX binaries
- * This is invoked before the mm layer is working, so we do not
- * use the linked lists for the inventory yet.
- *
- * Miguel de Icaza, 1997.
- */
-#include <linux/mm.h>
-#include <asm/inventory.h>
-#include <asm/uaccess.h>
-
-#define MAX_INVENTORY 50
-int inventory_items = 0;
-
-static inventory_t inventory [MAX_INVENTORY];
-
-void add_to_inventory(int class, int type, int controller, int unit, int state)
-{
- inventory_t *ni = &inventory [inventory_items];
-
- if (inventory_items == MAX_INVENTORY)
- return;
-
- ni->inv_class = class;
- ni->inv_type = type;
- ni->inv_controller = controller;
- ni->inv_unit = unit;
- ni->inv_state = state;
- ni->inv_next = ni;
- inventory_items++;
-}
-
-int dump_inventory_to_user(void __user *userbuf, int size)
-{
- inventory_t *inv = &inventory [0];
- inventory_t __user *user = userbuf;
- int v;
-
- if (!access_ok(VERIFY_WRITE, userbuf, size))
- return -EFAULT;
-
- for (v = 0; v < inventory_items; v++){
- inv = &inventory [v];
- if (copy_to_user (user, inv, sizeof (inventory_t)))
- return -EFAULT;
- user++;
- }
- return inventory_items * sizeof(inventory_t);
-}
-
-int __init init_inventory(void)
-{
- /*
- * gross hack while we put the right bits all over the kernel
- * most likely this will not let just anyone run the X server
- * until we put the right values all over the place
- */
- add_to_inventory(10, 3, 0, 0, 16400);
- add_to_inventory(1, 1, 150, -1, 12);
- add_to_inventory(1, 3, 0, 0, 8976);
- add_to_inventory(1, 2, 0, 0, 8976);
- add_to_inventory(4, 8, 0, 0, 2);
- add_to_inventory(5, 5, 0, 0, 1);
- add_to_inventory(3, 3, 0, 0, 32768);
- add_to_inventory(3, 4, 0, 0, 32768);
- add_to_inventory(3, 8, 0, 0, 524288);
- add_to_inventory(3, 9, 0, 0, 64);
- add_to_inventory(3, 1, 0, 0, 67108864);
- add_to_inventory(12, 3, 0, 0, 16);
- add_to_inventory(8, 7, 17, 0, 16777472);
- add_to_inventory(8, 0, 0, 0, 1);
- add_to_inventory(2, 1, 0, 13, 2);
- add_to_inventory(2, 2, 0, 2, 0);
- add_to_inventory(2, 2, 0, 1, 0);
- add_to_inventory(7, 14, 0, 0, 6);
-
- return 0;
-}
diff --git a/arch/mips/kernel/irixioctl.c b/arch/mips/kernel/irixioctl.c
deleted file mode 100644
index b39bdba..0000000
--- a/arch/mips/kernel/irixioctl.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * irixioctl.c: A fucking mess...
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/fs.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/sockios.h>
-#include <linux/syscalls.h>
-#include <linux/tty.h>
-#include <linux/file.h>
-#include <linux/rcupdate.h>
-
-#include <asm/uaccess.h>
-#include <asm/ioctl.h>
-#include <asm/ioctls.h>
-
-#undef DEBUG_IOCTLS
-#undef DEBUG_MISSING_IOCTL
-
-struct irix_termios {
- tcflag_t c_iflag, c_oflag, c_cflag, c_lflag;
- cc_t c_cc[NCCS];
-};
-
-asmlinkage int irix_ioctl(int fd, unsigned long cmd, unsigned long arg)
-{
- struct tty_struct *tp, *rtp;
- mm_segment_t old_fs;
- int i, error = 0;
-
-#ifdef DEBUG_IOCTLS
- printk("[%s:%d] irix_ioctl(%d, ", current->comm, current->pid, fd);
-#endif
- switch(cmd) {
- case 0x00005401:
-#ifdef DEBUG_IOCTLS
- printk("TCGETA, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TCGETA, arg);
- break;
-
- case 0x0000540d: {
- struct termios kt;
- struct irix_termios __user *it =
- (struct irix_termios __user *) arg;
-
-#ifdef DEBUG_IOCTLS
- printk("TCGETS, %08lx) ", arg);
-#endif
- if (!access_ok(VERIFY_WRITE, it, sizeof(*it))) {
- error = -EFAULT;
- break;
- }
- old_fs = get_fs(); set_fs(get_ds());
- error = sys_ioctl(fd, TCGETS, (unsigned long) &kt);
- set_fs(old_fs);
- if (error)
- break;
-
- error = __put_user(kt.c_iflag, &it->c_iflag);
- error |= __put_user(kt.c_oflag, &it->c_oflag);
- error |= __put_user(kt.c_cflag, &it->c_cflag);
- error |= __put_user(kt.c_lflag, &it->c_lflag);
-
- for (i = 0; i < NCCS; i++)
- error |= __put_user(kt.c_cc[i], &it->c_cc[i]);
- break;
- }
-
- case 0x0000540e: {
- struct termios kt;
- struct irix_termios *it = (struct irix_termios *) arg;
-
-#ifdef DEBUG_IOCTLS
- printk("TCSETS, %08lx) ", arg);
-#endif
- if (!access_ok(VERIFY_READ, it, sizeof(*it))) {
- error = -EFAULT;
- break;
- }
- old_fs = get_fs(); set_fs(get_ds());
- error = sys_ioctl(fd, TCGETS, (unsigned long) &kt);
- set_fs(old_fs);
- if (error)
- break;
-
- error = __get_user(kt.c_iflag, &it->c_iflag);
- error |= __get_user(kt.c_oflag, &it->c_oflag);
- error |= __get_user(kt.c_cflag, &it->c_cflag);
- error |= __get_user(kt.c_lflag, &it->c_lflag);
-
- for (i = 0; i < NCCS; i++)
- error |= __get_user(kt.c_cc[i], &it->c_cc[i]);
-
- if (error)
- break;
- old_fs = get_fs(); set_fs(get_ds());
- error = sys_ioctl(fd, TCSETS, (unsigned long) &kt);
- set_fs(old_fs);
- break;
- }
-
- case 0x0000540f:
-#ifdef DEBUG_IOCTLS
- printk("TCSETSW, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TCSETSW, arg);
- break;
-
- case 0x00005471:
-#ifdef DEBUG_IOCTLS
- printk("TIOCNOTTY, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TIOCNOTTY, arg);
- break;
-
- case 0x00007416: {
- pid_t pid;
-#ifdef DEBUG_IOCTLS
- printk("TIOCGSID, %08lx) ", arg);
-#endif
- old_fs = get_fs(); set_fs(get_ds());
- error = sys_ioctl(fd, TIOCGSID, (unsigned long)&pid);
- set_fs(old_fs);
- if (!error)
- error = put_user(pid, (unsigned long __user *) arg);
- break;
- }
- case 0x746e:
- /* TIOCSTART, same effect as hitting ^Q */
-#ifdef DEBUG_IOCTLS
- printk("TIOCSTART, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TCXONC, TCOON);
- break;
-
- case 0x20006968:
-#ifdef DEBUG_IOCTLS
- printk("SIOCGETLABEL, %08lx) ", arg);
-#endif
- error = -ENOPKG;
- break;
-
- case 0x40047477:
-#ifdef DEBUG_IOCTLS
- printk("TIOCGPGRP, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TIOCGPGRP, arg);
-#ifdef DEBUG_IOCTLS
- printk("arg=%d ", *(int *)arg);
-#endif
- break;
-
- case 0x40087468:
-#ifdef DEBUG_IOCTLS
- printk("TIOCGWINSZ, %08lx) ", arg);
-#endif
- error = sys_ioctl(fd, TIOCGWINSZ, arg);
- break;
-
- case 0x8004667e:
- error = sys_ioctl(fd, FIONBIO, arg);
- break;
-
- case 0x80047476:
- error = sys_ioctl(fd, TIOCSPGRP, arg);
- break;
-
- case 0x8020690c:
- error = sys_ioctl(fd, SIOCSIFADDR, arg);
- break;
-
- case 0x80206910:
- error = sys_ioctl(fd, SIOCSIFFLAGS, arg);
- break;
-
- case 0xc0206911:
- error = sys_ioctl(fd, SIOCGIFFLAGS, arg);
- break;
-
- case 0xc020691b:
- error = sys_ioctl(fd, SIOCGIFMETRIC, arg);
- break;
-
- default: {
-#ifdef DEBUG_MISSING_IOCTL
- char *msg = "Unimplemented IOCTL cmd tell linux-mips@linux-mips.org\n";
-
-#ifdef DEBUG_IOCTLS
- printk("UNIMP_IOCTL, %08lx)\n", arg);
-#endif
- old_fs = get_fs(); set_fs(get_ds());
- sys_write(2, msg, strlen(msg));
- set_fs(old_fs);
- printk("[%s:%d] Does unimplemented IRIX ioctl cmd %08lx\n",
- current->comm, current->pid, cmd);
- do_exit(255);
-#else
- error = sys_ioctl(fd, cmd, arg);
-#endif
- }
-
- };
-#ifdef DEBUG_IOCTLS
- printk("error=%d\n", error);
-#endif
- return error;
-}
diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c
deleted file mode 100644
index 0215c80..0000000
--- a/arch/mips/kernel/irixsig.c
+++ /dev/null
@@ -1,888 +0,0 @@
-/*
- * irixsig.c: WHEEE, IRIX signals! YOW, am I compatible or what?!?!
- *
- * Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
- * Copyright (C) 1997 - 2000 Ralf Baechle (ralf@gnu.org)
- * Copyright (C) 2000 Silicon Graphics, Inc.
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/mm.h>
-#include <linux/errno.h>
-#include <linux/smp.h>
-#include <linux/time.h>
-#include <linux/ptrace.h>
-#include <linux/resource.h>
-
-#include <asm/ptrace.h>
-#include <asm/uaccess.h>
-#include <asm/unistd.h>
-
-#undef DEBUG_SIG
-
-#define _S(nr) (1<<((nr)-1))
-
-#define _BLOCKABLE (~(_S(SIGKILL) | _S(SIGSTOP)))
-
-#define _IRIX_NSIG 128
-#define _IRIX_NSIG_BPW BITS_PER_LONG
-#define _IRIX_NSIG_WORDS (_IRIX_NSIG / _IRIX_NSIG_BPW)
-
-typedef struct {
- unsigned long sig[_IRIX_NSIG_WORDS];
-} irix_sigset_t;
-
-struct sigctx_irix5 {
- u32 rmask, cp0_status;
- u64 pc;
- u64 regs[32];
- u64 fpregs[32];
- u32 usedfp, fpcsr, fpeir, sstk_flags;
- u64 hi, lo;
- u64 cp0_cause, cp0_badvaddr, _unused0;
- irix_sigset_t sigset;
- u64 weird_fpu_thing;
- u64 _unused1[31];
-};
-
-#ifdef DEBUG_SIG
-/* Debugging */
-static inline void dump_irix5_sigctx(struct sigctx_irix5 *c)
-{
- int i;
-
- printk("misc: rmask[%08lx] status[%08lx] pc[%08lx]\n",
- (unsigned long) c->rmask,
- (unsigned long) c->cp0_status,
- (unsigned long) c->pc);
- printk("regs: ");
- for(i = 0; i < 16; i++)
- printk("[%d]<%08lx> ", i, (unsigned long) c->regs[i]);
- printk("\nregs: ");
- for(i = 16; i < 32; i++)
- printk("[%d]<%08lx> ", i, (unsigned long) c->regs[i]);
- printk("\nfpregs: ");
- for(i = 0; i < 16; i++)
- printk("[%d]<%08lx> ", i, (unsigned long) c->fpregs[i]);
- printk("\nfpregs: ");
- for(i = 16; i < 32; i++)
- printk("[%d]<%08lx> ", i, (unsigned long) c->fpregs[i]);
- printk("misc: usedfp[%d] fpcsr[%08lx] fpeir[%08lx] stk_flgs[%08lx]\n",
- (int) c->usedfp, (unsigned long) c->fpcsr,
- (unsigned long) c->fpeir, (unsigned long) c->sstk_flags);
- printk("misc: hi[%08lx] lo[%08lx] cause[%08lx] badvaddr[%08lx]\n",
- (unsigned long) c->hi, (unsigned long) c->lo,
- (unsigned long) c->cp0_cause, (unsigned long) c->cp0_badvaddr);
- printk("misc: sigset<0>[%08lx] sigset<1>[%08lx] sigset<2>[%08lx] "
- "sigset<3>[%08lx]\n", (unsigned long) c->sigset.sig[0],
- (unsigned long) c->sigset.sig[1],
- (unsigned long) c->sigset.sig[2],
- (unsigned long) c->sigset.sig[3]);
-}
-#endif
-
-static int setup_irix_frame(struct k_sigaction *ka, struct pt_regs *regs,
- int signr, sigset_t *oldmask)
-{
- struct sigctx_irix5 __user *ctx;
- unsigned long sp;
- int error, i;
-
- sp = regs->regs[29];
- sp -= sizeof(struct sigctx_irix5);
- sp &= ~(0xf);
- ctx = (struct sigctx_irix5 __user *) sp;
- if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
- goto segv_and_exit;
-
- error = __put_user(0, &ctx->weird_fpu_thing);
- error |= __put_user(~(0x00000001), &ctx->rmask);
- error |= __put_user(0, &ctx->regs[0]);
- for(i = 1; i < 32; i++)
- error |= __put_user((u64) regs->regs[i], &ctx->regs[i]);
-
- error |= __put_user((u64) regs->hi, &ctx->hi);
- error |= __put_user((u64) regs->lo, &ctx->lo);
- error |= __put_user((u64) regs->cp0_epc, &ctx->pc);
- error |= __put_user(!!used_math(), &ctx->usedfp);
- error |= __put_user((u64) regs->cp0_cause, &ctx->cp0_cause);
- error |= __put_user((u64) regs->cp0_badvaddr, &ctx->cp0_badvaddr);
-
- error |= __put_user(0, &ctx->sstk_flags); /* XXX sigstack unimp... todo... */
-
- error |= __copy_to_user(&ctx->sigset, oldmask, sizeof(irix_sigset_t)) ? -EFAULT : 0;
-
- if (error)
- goto segv_and_exit;
-
-#ifdef DEBUG_SIG
- dump_irix5_sigctx(ctx);
-#endif
-
- regs->regs[4] = (unsigned long) signr;
- regs->regs[5] = 0; /* XXX sigcode XXX */
- regs->regs[6] = regs->regs[29] = sp;
- regs->regs[7] = (unsigned long) ka->sa.sa_handler;
- regs->regs[25] = regs->cp0_epc = (unsigned long) ka->sa_restorer;
-
- return 1;
-
-segv_and_exit:
- force_sigsegv(signr, current);
- return 0;
-}
-
-static int inline
-setup_irix_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
- int signr, sigset_t *oldmask, siginfo_t *info)
-{
- printk("Aiee: setup_tr_frame wants to be written");
- do_exit(SIGSEGV);
-}
-
-static inline int handle_signal(unsigned long sig, siginfo_t *info,
- struct k_sigaction *ka, sigset_t *oldset, struct pt_regs * regs)
-{
- int ret;
-
- switch(regs->regs[0]) {
- case ERESTARTNOHAND:
- regs->regs[2] = EINTR;
- break;
- case ERESTARTSYS:
- if(!(ka->sa.sa_flags & SA_RESTART)) {
- regs->regs[2] = EINTR;
- break;
- }
- /* fallthrough */
- case ERESTARTNOINTR: /* Userland will reload $v0. */
- regs->cp0_epc -= 8;
- }
-
- regs->regs[0] = 0; /* Don't deal with this again. */
-
- if (ka->sa.sa_flags & SA_SIGINFO)
- ret = setup_irix_rt_frame(ka, regs, sig, oldset, info);
- else
- ret = setup_irix_frame(ka, regs, sig, oldset);
-
- spin_lock_irq(¤t->sighand->siglock);
- sigorsets(¤t->blocked, ¤t->blocked, &ka->sa.sa_mask);
- if (!(ka->sa.sa_flags & SA_NODEFER))
- sigaddset(¤t->blocked, sig);
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- return ret;
-}
-
-void do_irix_signal(struct pt_regs *regs)
-{
- struct k_sigaction ka;
- siginfo_t info;
- int signr;
- sigset_t *oldset;
-
- /*
- * We want the common case to go fast, which is why we may in certain
- * cases get here from kernel mode. Just return without doing anything
- * if so.
- */
- if (!user_mode(regs))
- return;
-
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- oldset = ¤t->saved_sigmask;
- else
- oldset = ¤t->blocked;
-
- signr = get_signal_to_deliver(&info, &ka, regs, NULL);
- if (signr > 0) {
- /* Whee! Actually deliver the signal. */
- if (handle_signal(signr, &info, &ka, oldset, regs) == 0) {
- /* a signal was successfully delivered; the saved
- * sigmask will have been stored in the signal frame,
- * and will be restored by sigreturn, so we can simply
- * clear the TIF_RESTORE_SIGMASK flag */
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- clear_thread_flag(TIF_RESTORE_SIGMASK);
- }
-
- return;
- }
-
- /*
- * Who's code doesn't conform to the restartable syscall convention
- * dies here!!! The li instruction, a single machine instruction,
- * must directly be followed by the syscall instruction.
- */
- if (regs->regs[0]) {
- if (regs->regs[2] == ERESTARTNOHAND ||
- regs->regs[2] == ERESTARTSYS ||
- regs->regs[2] == ERESTARTNOINTR) {
- regs->cp0_epc -= 8;
- }
- if (regs->regs[2] == ERESTART_RESTARTBLOCK) {
- regs->regs[2] = __NR_restart_syscall;
- regs->regs[7] = regs->regs[26];
- regs->cp0_epc -= 4;
- }
- regs->regs[0] = 0; /* Don't deal with this again. */
- }
-
- /*
- * If there's no signal to deliver, we just put the saved sigmask
- * back
- */
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
- sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
- }
-}
-
-asmlinkage void
-irix_sigreturn(struct pt_regs *regs)
-{
- struct sigctx_irix5 __user *context, *magic;
- unsigned long umask, mask;
- u64 *fregs;
- u32 usedfp;
- int error, sig, i, base = 0;
- sigset_t blocked;
-
- /* Always make any pending restarted system calls return -EINTR */
- current_thread_info()->restart_block.fn = do_no_restart_syscall;
-
- if (regs->regs[2] == 1000)
- base = 1;
-
- context = (struct sigctx_irix5 __user *) regs->regs[base + 4];
- magic = (struct sigctx_irix5 __user *) regs->regs[base + 5];
- sig = (int) regs->regs[base + 6];
-#ifdef DEBUG_SIG
- printk("[%s:%d] IRIX sigreturn(scp[%p],ucp[%p],sig[%d])\n",
- current->comm, current->pid, context, magic, sig);
-#endif
- if (!context)
- context = magic;
- if (!access_ok(VERIFY_READ, context, sizeof(struct sigctx_irix5)))
- goto badframe;
-
-#ifdef DEBUG_SIG
- dump_irix5_sigctx(context);
-#endif
-
- error = __get_user(regs->cp0_epc, &context->pc);
- error |= __get_user(umask, &context->rmask);
-
- mask = 2;
- for (i = 1; i < 32; i++, mask <<= 1) {
- if (umask & mask)
- error |= __get_user(regs->regs[i], &context->regs[i]);
- }
- error |= __get_user(regs->hi, &context->hi);
- error |= __get_user(regs->lo, &context->lo);
-
- error |= __get_user(usedfp, &context->usedfp);
- if ((umask & 1) && usedfp) {
- fregs = (u64 *) ¤t->thread.fpu;
-
- for(i = 0; i < 32; i++)
- error |= __get_user(fregs[i], &context->fpregs[i]);
- error |= __get_user(current->thread.fpu.fcr31, &context->fpcsr);
- }
-
- /* XXX do sigstack crapola here... XXX */
-
- error |= __copy_from_user(&blocked, &context->sigset, sizeof(blocked)) ? -EFAULT : 0;
-
- if (error)
- goto badframe;
-
- sigdelsetmask(&blocked, ~_BLOCKABLE);
- spin_lock_irq(¤t->sighand->siglock);
- current->blocked = blocked;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- /*
- * Don't let your children do this ...
- */
- __asm__ __volatile__(
- "move\t$29,%0\n\t"
- "j\tsyscall_exit"
- :/* no outputs */
- :"r" (®s));
- /* Unreached */
-
-badframe:
- force_sig(SIGSEGV, current);
-}
-
-struct sigact_irix5 {
- int flags;
- void (*handler)(int);
- u32 sigset[4];
- int _unused0[2];
-};
-
-#define SIG_SETMASK32 256 /* Goodie from SGI for BSD compatibility:
- set only the low 32 bit of the sigset. */
-
-#ifdef DEBUG_SIG
-static inline void dump_sigact_irix5(struct sigact_irix5 *p)
-{
- printk("<f[%d] hndlr[%08lx] msk[%08lx]>", p->flags,
- (unsigned long) p->handler,
- (unsigned long) p->sigset[0]);
-}
-#endif
-
-asmlinkage int
-irix_sigaction(int sig, const struct sigaction __user *act,
- struct sigaction __user *oact, void __user *trampoline)
-{
- struct k_sigaction new_ka, old_ka;
- int ret;
-
-#ifdef DEBUG_SIG
- printk(" (%d,%s,%s,%08lx) ", sig, (!new ? "0" : "NEW"),
- (!old ? "0" : "OLD"), trampoline);
- if(new) {
- dump_sigact_irix5(new); printk(" ");
- }
-#endif
- if (act) {
- sigset_t mask;
- int err;
-
- if (!access_ok(VERIFY_READ, act, sizeof(*act)))
- return -EFAULT;
- err = __get_user(new_ka.sa.sa_handler, &act->sa_handler);
- err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags);
-
- err |= __copy_from_user(&mask, &act->sa_mask, sizeof(sigset_t)) ? -EFAULT : 0;
- if (err)
- return err;
-
- /*
- * Hmmm... methinks IRIX libc always passes a valid trampoline
- * value for all invocations of sigaction. Will have to
- * investigate. POSIX POSIX, die die die...
- */
- new_ka.sa_restorer = trampoline;
- }
-
-/* XXX Implement SIG_SETMASK32 for IRIX compatibility */
- ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL);
-
- if (!ret && oact) {
- int err;
-
- if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)))
- return -EFAULT;
-
- err = __put_user(old_ka.sa.sa_handler, &oact->sa_handler);
- err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
- err |= __copy_to_user(&oact->sa_mask, &old_ka.sa.sa_mask,
- sizeof(sigset_t)) ? -EFAULT : 0;
- if (err)
- return -EFAULT;
- }
-
- return ret;
-}
-
-asmlinkage int irix_sigpending(irix_sigset_t __user *set)
-{
- return do_sigpending(set, sizeof(*set));
-}
-
-asmlinkage int irix_sigprocmask(int how, irix_sigset_t __user *new,
- irix_sigset_t __user *old)
-{
- sigset_t oldbits, newbits;
-
- if (new) {
- if (!access_ok(VERIFY_READ, new, sizeof(*new)))
- return -EFAULT;
- if (__copy_from_user(&newbits, new, sizeof(unsigned long)*4))
- return -EFAULT;
- sigdelsetmask(&newbits, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- oldbits = current->blocked;
-
- switch(how) {
- case 1:
- sigorsets(&newbits, &oldbits, &newbits);
- break;
-
- case 2:
- sigandsets(&newbits, &oldbits, &newbits);
- break;
-
- case 3:
- break;
-
- case 256:
- siginitset(&newbits, newbits.sig[0]);
- break;
-
- default:
- spin_unlock_irq(¤t->sighand->siglock);
- return -EINVAL;
- }
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
- }
- if (old)
- return copy_to_user(old, ¤t->blocked,
- sizeof(unsigned long)*4) ? -EFAULT : 0;
-
- return 0;
-}
-
-asmlinkage int irix_sigsuspend(struct pt_regs *regs)
-{
- sigset_t newset;
- sigset_t __user *uset;
-
- uset = (sigset_t __user *) regs->regs[4];
- if (copy_from_user(&newset, uset, sizeof(sigset_t)))
- return -EFAULT;
- sigdelsetmask(&newset, ~_BLOCKABLE);
-
- spin_lock_irq(¤t->sighand->siglock);
- current->saved_sigmask = current->blocked;
- current->blocked = newset;
- recalc_sigpending();
- spin_unlock_irq(¤t->sighand->siglock);
-
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- set_thread_flag(TIF_RESTORE_SIGMASK);
- return -ERESTARTNOHAND;
-}
-
-/* hate hate hate... */
-struct irix5_siginfo {
- int sig, code, error;
- union {
- char unused[128 - (3 * 4)]; /* Safety net. */
- struct {
- int pid;
- union {
- int uid;
- struct {
- int utime, status, stime;
- } child;
- } procdata;
- } procinfo;
-
- unsigned long fault_addr;
-
- struct {
- int fd;
- long band;
- } fileinfo;
-
- unsigned long sigval;
- } stuff;
-};
-
-asmlinkage int irix_sigpoll_sys(unsigned long __user *set,
- struct irix5_siginfo __user *info, struct timespec __user *tp)
-{
- long expire = MAX_SCHEDULE_TIMEOUT;
- sigset_t kset;
- int i, sig, error, timeo = 0;
- struct timespec ktp;
-
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_sigpoll_sys(%p,%p,%p)\n",
- current->comm, current->pid, set, info, tp);
-#endif
-
- /* Must always specify the signal set. */
- if (!set)
- return -EINVAL;
-
- if (copy_from_user(&kset, set, sizeof(set)))
- return -EFAULT;
-
- if (info && clear_user(info, sizeof(*info))) {
- error = -EFAULT;
- goto out;
- }
-
- if (tp) {
- if (copy_from_user(&ktp, tp, sizeof(*tp)))
- return -EFAULT;
-
- if (!ktp.tv_sec && !ktp.tv_nsec)
- return -EINVAL;
-
- expire = timespec_to_jiffies(&ktp) +
- (ktp.tv_sec || ktp.tv_nsec);
- }
-
- while(1) {
- long tmp = 0;
-
- expire = schedule_timeout_interruptible(expire);
-
- for (i=0; i < _IRIX_NSIG_WORDS; i++)
- tmp |= (current->pending.signal.sig[i] & kset.sig[i]);
-
- if (tmp)
- break;
- if (!expire) {
- timeo = 1;
- break;
- }
- if (signal_pending(current))
- return -EINTR;
- }
- if (timeo)
- return -EAGAIN;
-
- for (sig = 1; i <= 65 /* IRIX_NSIG */; sig++) {
- if (sigismember (&kset, sig))
- continue;
- if (sigismember (¤t->pending.signal, sig)) {
- /* XXX need more than this... */
- if (info)
- return copy_to_user(&info->sig, &sig, sizeof(sig));
- return 0;
- }
- }
-
- /* Should not get here, but do something sane if we do. */
- error = -EINTR;
-
-out:
- return error;
-}
-
-/* This is here because of irix5_siginfo definition. */
-#define IRIX_P_PID 0
-#define IRIX_P_PGID 2
-#define IRIX_P_ALL 7
-
-#define W_EXITED 1
-#define W_TRAPPED 2
-#define W_STOPPED 4
-#define W_CONT 8
-#define W_NOHANG 64
-
-#define W_MASK (W_EXITED | W_TRAPPED | W_STOPPED | W_CONT | W_NOHANG)
-
-asmlinkage int irix_waitsys(int type, int upid,
- struct irix5_siginfo __user *info, int options,
- struct rusage __user *ru)
-{
- struct pid *pid = NULL;
- int flag, retval;
- DECLARE_WAITQUEUE(wait, current);
- struct task_struct *tsk;
- struct task_struct *p;
- struct list_head *_p;
-
- if (!info)
- return -EINVAL;
-
- if (!access_ok(VERIFY_WRITE, info, sizeof(*info)))
- return -EFAULT;
-
- if (ru)
- if (!access_ok(VERIFY_WRITE, ru, sizeof(*ru)))
- return -EFAULT;
-
- if (options & ~W_MASK)
- return -EINVAL;
-
- if (type != IRIX_P_PID && type != IRIX_P_PGID && type != IRIX_P_ALL)
- return -EINVAL;
-
- if (type != IRIX_P_ALL)
- pid = find_get_pid(upid);
- add_wait_queue(¤t->signal->wait_chldexit, &wait);
-repeat:
- flag = 0;
- current->state = TASK_INTERRUPTIBLE;
- read_lock(&tasklist_lock);
- tsk = current;
- list_for_each(_p, &tsk->children) {
- p = list_entry(_p, struct task_struct, sibling);
- if ((type == IRIX_P_PID) && task_pid(p) != pid)
- continue;
- if ((type == IRIX_P_PGID) && task_pgrp(p) != pid)
- continue;
- if ((p->exit_signal != SIGCHLD))
- continue;
- flag = 1;
- switch (p->state) {
- case TASK_STOPPED:
- if (!p->exit_code)
- continue;
- if (!(options & (W_TRAPPED|W_STOPPED)) &&
- !(p->ptrace & PT_PTRACED))
- continue;
- read_unlock(&tasklist_lock);
-
- /* move to end of parent's list to avoid starvation */
- write_lock_irq(&tasklist_lock);
- remove_parent(p);
- add_parent(p);
- write_unlock_irq(&tasklist_lock);
- retval = ru ? getrusage(p, RUSAGE_BOTH, ru) : 0;
- if (retval)
- goto end_waitsys;
-
- retval = __put_user(SIGCHLD, &info->sig);
- retval |= __put_user(0, &info->code);
- retval |= __put_user(task_pid_vnr(p), &info->stuff.procinfo.pid);
- retval |= __put_user((p->exit_code >> 8) & 0xff,
- &info->stuff.procinfo.procdata.child.status);
- retval |= __put_user(p->utime, &info->stuff.procinfo.procdata.child.utime);
- retval |= __put_user(p->stime, &info->stuff.procinfo.procdata.child.stime);
- if (retval)
- goto end_waitsys;
-
- p->exit_code = 0;
- goto end_waitsys;
-
- case EXIT_ZOMBIE:
- current->signal->cutime += p->utime + p->signal->cutime;
- current->signal->cstime += p->stime + p->signal->cstime;
- if (ru != NULL)
- getrusage(p, RUSAGE_BOTH, ru);
- retval = __put_user(SIGCHLD, &info->sig);
- retval |= __put_user(1, &info->code); /* CLD_EXITED */
- retval |= __put_user(task_pid_vnr(p), &info->stuff.procinfo.pid);
- retval |= __put_user((p->exit_code >> 8) & 0xff,
- &info->stuff.procinfo.procdata.child.status);
- retval |= __put_user(p->utime,
- &info->stuff.procinfo.procdata.child.utime);
- retval |= __put_user(p->stime,
- &info->stuff.procinfo.procdata.child.stime);
- if (retval)
- goto end_waitsys;
-
- if (p->real_parent != p->parent) {
- write_lock_irq(&tasklist_lock);
- remove_parent(p);
- p->parent = p->real_parent;
- add_parent(p);
- do_notify_parent(p, SIGCHLD);
- write_unlock_irq(&tasklist_lock);
- } else
- release_task(p);
- goto end_waitsys;
- default:
- continue;
- }
- tsk = next_thread(tsk);
- }
- read_unlock(&tasklist_lock);
- if (flag) {
- retval = 0;
- if (options & W_NOHANG)
- goto end_waitsys;
- retval = -ERESTARTSYS;
- if (signal_pending(current))
- goto end_waitsys;
- current->state = TASK_INTERRUPTIBLE;
- schedule();
- goto repeat;
- }
- retval = -ECHILD;
-end_waitsys:
- current->state = TASK_RUNNING;
- remove_wait_queue(¤t->signal->wait_chldexit, &wait);
- put_pid(pid);
-
- return retval;
-}
-
-struct irix5_context {
- u32 flags;
- u32 link;
- u32 sigmask[4];
- struct { u32 sp, size, flags; } stack;
- int regs[36];
- u32 fpregs[32];
- u32 fpcsr;
- u32 _unused0;
- u32 _unused1[47];
- u32 weird_graphics_thing;
-};
-
-asmlinkage int irix_getcontext(struct pt_regs *regs)
-{
- int error, i, base = 0;
- struct irix5_context __user *ctx;
- unsigned long flags;
-
- if (regs->regs[2] == 1000)
- base = 1;
- ctx = (struct irix5_context __user *) regs->regs[base + 4];
-
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_getcontext(%p)\n",
- current->comm, current->pid, ctx);
-#endif
-
- if (!access_ok(VERIFY_WRITE, ctx, sizeof(*ctx)))
- return -EFAULT;
-
- error = __put_user(current->thread.irix_oldctx, &ctx->link);
-
- error |= __copy_to_user(&ctx->sigmask, ¤t->blocked, sizeof(irix_sigset_t)) ? -EFAULT : 0;
-
- /* XXX Do sigstack stuff someday... */
- error |= __put_user(0, &ctx->stack.sp);
- error |= __put_user(0, &ctx->stack.size);
- error |= __put_user(0, &ctx->stack.flags);
-
- error |= __put_user(0, &ctx->weird_graphics_thing);
- error |= __put_user(0, &ctx->regs[0]);
- for (i = 1; i < 32; i++)
- error |= __put_user(regs->regs[i], &ctx->regs[i]);
- error |= __put_user(regs->lo, &ctx->regs[32]);
- error |= __put_user(regs->hi, &ctx->regs[33]);
- error |= __put_user(regs->cp0_cause, &ctx->regs[34]);
- error |= __put_user(regs->cp0_epc, &ctx->regs[35]);
-
- flags = 0x0f;
- if (!used_math()) {
- flags &= ~(0x08);
- } else {
- /* XXX wheee... */
- printk("Wheee, no code for saving IRIX FPU context yet.\n");
- }
- error |= __put_user(flags, &ctx->flags);
-
- return error;
-}
-
-asmlinkage void irix_setcontext(struct pt_regs *regs)
-{
- struct irix5_context __user *ctx;
- int err, base = 0;
- u32 flags;
-
- if (regs->regs[2] == 1000)
- base = 1;
- ctx = (struct irix5_context __user *) regs->regs[base + 4];
-
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_setcontext(%p)\n",
- current->comm, current->pid, ctx);
-#endif
-
- if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx)))
- goto segv_and_exit;
-
- err = __get_user(flags, &ctx->flags);
- if (flags & 0x02) {
- /* XXX sigstack garbage, todo... */
- printk("Wheee, cannot do sigstack stuff in setcontext\n");
- }
-
- if (flags & 0x04) {
- int i;
-
- /* XXX extra control block stuff... todo... */
- for (i = 1; i < 32; i++)
- err |= __get_user(regs->regs[i], &ctx->regs[i]);
- err |= __get_user(regs->lo, &ctx->regs[32]);
- err |= __get_user(regs->hi, &ctx->regs[33]);
- err |= __get_user(regs->cp0_epc, &ctx->regs[35]);
- }
-
- if (flags & 0x08)
- /* XXX fpu context, blah... */
- printk(KERN_ERR "Wheee, cannot restore FPU context yet...\n");
-
- err |= __get_user(current->thread.irix_oldctx, &ctx->link);
- if (err)
- goto segv_and_exit;
-
- /*
- * Don't let your children do this ...
- */
- __asm__ __volatile__(
- "move\t$29,%0\n\t"
- "j\tsyscall_exit"
- :/* no outputs */
- :"r" (®s));
- /* Unreached */
-
-segv_and_exit:
- force_sigsegv(SIGSEGV, current);
-}
-
-struct irix_sigstack {
- unsigned long sp;
- int status;
-};
-
-asmlinkage int irix_sigstack(struct irix_sigstack __user *new,
- struct irix_sigstack __user *old)
-{
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_sigstack(%p,%p)\n",
- current->comm, current->pid, new, old);
-#endif
- if (new) {
- if (!access_ok(VERIFY_READ, new, sizeof(*new)))
- return -EFAULT;
- }
-
- if (old) {
- if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
- return -EFAULT;
- }
-
- return 0;
-}
-
-struct irix_sigaltstack { unsigned long sp; int size; int status; };
-
-asmlinkage int irix_sigaltstack(struct irix_sigaltstack __user *new,
- struct irix_sigaltstack __user *old)
-{
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_sigaltstack(%p,%p)\n",
- current->comm, current->pid, new, old);
-#endif
- if (new)
- if (!access_ok(VERIFY_READ, new, sizeof(*new)))
- return -EFAULT;
-
- if (old) {
- if (!access_ok(VERIFY_WRITE, old, sizeof(*old)))
- return -EFAULT;
- }
-
- return 0;
-}
-
-struct irix_procset {
- int cmd, ltype, lid, rtype, rid;
-};
-
-asmlinkage int irix_sigsendset(struct irix_procset __user *pset, int sig)
-{
- if (!access_ok(VERIFY_READ, pset, sizeof(*pset)))
- return -EFAULT;
-#ifdef DEBUG_SIG
- printk("[%s:%d] irix_sigsendset([%d,%d,%d,%d,%d],%d)\n",
- current->comm, current->pid,
- pset->cmd, pset->ltype, pset->lid, pset->rtype, pset->rid,
- sig);
-#endif
- return -EINVAL;
-}
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index e3309ff..6045b9a 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -44,8 +44,6 @@
return irq;
}
-EXPORT_SYMBOL_GPL(allocate_irqno);
-
/*
* Allocate the 16 legacy interrupts for i8259 devices. This happens early
* in the kernel initialization so treating allocation failure as BUG() is
@@ -66,8 +64,6 @@
smp_mb__after_clear_bit();
}
-EXPORT_SYMBOL_GPL(free_irqno);
-
/*
* 'what should we do if we get a hw irq event on an illegal vector'.
* each architecture has to answer this themselves.
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index 640fb0c..d01665a 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -4,7 +4,6 @@
*/
#include <linux/device.h>
-#include <linux/kallsyms.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/module.h>
@@ -84,9 +83,9 @@
read_vpe_c0_vpeconf0());
printk(" VPE%d.Status : %08lx\n",
i, read_vpe_c0_status());
- printk(" VPE%d.EPC : %08lx ",
- i, read_vpe_c0_epc());
- print_symbol("%s\n", read_vpe_c0_epc());
+ printk(" VPE%d.EPC : %08lx %pS\n",
+ i, read_vpe_c0_epc(),
+ (void *) read_vpe_c0_epc());
printk(" VPE%d.Cause : %08lx\n",
i, read_vpe_c0_cause());
printk(" VPE%d.Config7 : %08lx\n",
@@ -111,8 +110,8 @@
}
printk(" TCStatus : %08lx\n", tcstatval);
printk(" TCBind : %08lx\n", read_tc_c0_tcbind());
- printk(" TCRestart : %08lx ", read_tc_c0_tcrestart());
- print_symbol("%s\n", read_tc_c0_tcrestart());
+ printk(" TCRestart : %08lx %pS\n",
+ read_tc_c0_tcrestart(), (void *) read_tc_c0_tcrestart());
printk(" TCHalt : %08lx\n", haltval);
printk(" TCContext : %08lx\n", read_tc_c0_tccontext());
if (!haltval)
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 2c09a44..c06f5b5 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -125,13 +125,6 @@
*childregs = *regs;
childregs->regs[7] = 0; /* Clear error flag */
-#if defined(CONFIG_BINFMT_IRIX)
- if (current->personality != PER_LINUX) {
- /* Under IRIX things are a little different. */
- childregs->regs[3] = 1;
- regs->regs[3] = 0;
- }
-#endif
childregs->regs[2] = 0; /* Child gets zero as return value */
regs->regs[2] = p->pid;
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 08a9c50..c058c0b 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -34,12 +34,8 @@
lw t1, PT_EPC(sp) # skip syscall on return
-#if defined(CONFIG_BINFMT_IRIX)
- sltiu t0, v0, MAX_SYSCALL_NO + 1 # check syscall number
-#else
subu v0, v0, __NR_O32_Linux # check syscall number
sltiu t0, v0, __NR_O32_Linux_syscalls + 1
-#endif
addiu t1, 4 # skip to next instruction
sw t1, PT_EPC(sp)
beqz t0, illegal_syscall
@@ -264,22 +260,14 @@
END(sys_sysmips)
LEAF(sys_syscall)
-#if defined(CONFIG_BINFMT_IRIX)
- sltiu v0, a0, MAX_SYSCALL_NO + 1 # check syscall number
-#else
subu t0, a0, __NR_O32_Linux # check syscall number
sltiu v0, t0, __NR_O32_Linux_syscalls + 1
-#endif
sll t1, t0, 3
beqz v0, einval
lw t2, sys_call_table(t1) # syscall routine
-#if defined(CONFIG_BINFMT_IRIX)
- li v1, 4000 # nr of sys_syscall
-#else
li v1, 4000 - __NR_O32_Linux # index of sys_syscall
-#endif
beq t0, v1, einval # do not recurse
/* Some syscalls like execve get their arguments from struct pt_regs
@@ -324,13 +312,6 @@
.endm
.macro syscalltable
-#if defined(CONFIG_BINFMT_IRIX)
- mille sys_ni_syscall 0 /* 0 - 999 SVR4 flavour */
- mille sys_ni_syscall 0 /* 1000 - 1999 32-bit IRIX */
- mille sys_ni_syscall 0 /* 2000 - 2999 BSD43 flavour */
- mille sys_ni_syscall 0 /* 3000 - 3999 POSIX flavour */
-#endif
-
sys sys_syscall 8 /* 4000 */
sys sys_exit 1
sys sys_fork 0
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index c6a063b..8af8486 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -68,13 +68,6 @@
const unsigned long mips_io_port_base __read_mostly = -1;
EXPORT_SYMBOL(mips_io_port_base);
-/*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor.
- */
-unsigned long isa_slot_offset;
-EXPORT_SYMBOL(isa_slot_offset);
-
static struct resource code_resource = { .name = "Kernel code", };
static struct resource data_resource = { .name = "Kernel data", };
@@ -557,11 +550,7 @@
prom_init();
#ifdef CONFIG_EARLY_PRINTK
- {
- extern void setup_early_printk(void);
-
- setup_early_printk();
- }
+ setup_early_printk();
#endif
cpu_report();
check_bugs_early();
diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c
deleted file mode 100644
index c357762..0000000
--- a/arch/mips/kernel/sysirix.c
+++ /dev/null
@@ -1,2140 +0,0 @@
-/*
- * sysirix.c: IRIX system call emulation.
- *
- * Copyright (C) 1996 David S. Miller
- * Copyright (C) 1997 Miguel de Icaza
- * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/binfmts.h>
-#include <linux/capability.h>
-#include <linux/highuid.h>
-#include <linux/pagemap.h>
-#include <linux/mm.h>
-#include <linux/mman.h>
-#include <linux/slab.h>
-#include <linux/swap.h>
-#include <linux/errno.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/times.h>
-#include <linux/elf.h>
-#include <linux/msg.h>
-#include <linux/shm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/utsname.h>
-#include <linux/file.h>
-#include <linux/vfs.h>
-#include <linux/namei.h>
-#include <linux/socket.h>
-#include <linux/security.h>
-#include <linux/syscalls.h>
-#include <linux/resource.h>
-
-#include <asm/ptrace.h>
-#include <asm/page.h>
-#include <asm/uaccess.h>
-#include <asm/inventory.h>
-
-/* 2,191 lines of complete and utter shit coming up... */
-
-extern int max_threads;
-
-/* The sysmp commands supported thus far. */
-#define MP_NPROCS 1 /* # processor in complex */
-#define MP_NAPROCS 2 /* # active processors in complex */
-#define MP_PGSIZE 14 /* Return system page size in v1. */
-
-asmlinkage int irix_sysmp(struct pt_regs *regs)
-{
- unsigned long cmd;
- int base = 0;
- int error = 0;
-
- if(regs->regs[2] == 1000)
- base = 1;
- cmd = regs->regs[base + 4];
- switch(cmd) {
- case MP_PGSIZE:
- error = PAGE_SIZE;
- break;
- case MP_NPROCS:
- case MP_NAPROCS:
- error = num_online_cpus();
- break;
- default:
- printk("SYSMP[%s:%d]: Unsupported opcode %d\n",
- current->comm, current->pid, (int)cmd);
- error = -EINVAL;
- break;
- }
-
- return error;
-}
-
-/* The prctl commands. */
-#define PR_MAXPROCS 1 /* Tasks/user. */
-#define PR_ISBLOCKED 2 /* If blocked, return 1. */
-#define PR_SETSTACKSIZE 3 /* Set largest task stack size. */
-#define PR_GETSTACKSIZE 4 /* Get largest task stack size. */
-#define PR_MAXPPROCS 5 /* Num parallel tasks. */
-#define PR_UNBLKONEXEC 6 /* When task exec/exit's, unblock. */
-#define PR_SETEXITSIG 8 /* When task exit's, set signal. */
-#define PR_RESIDENT 9 /* Make task unswappable. */
-#define PR_ATTACHADDR 10 /* (Re-)Connect a vma to a task. */
-#define PR_DETACHADDR 11 /* Disconnect a vma from a task. */
-#define PR_TERMCHILD 12 /* Kill child if the parent dies. */
-#define PR_GETSHMASK 13 /* Get the sproc() share mask. */
-#define PR_GETNSHARE 14 /* Number of share group members. */
-#define PR_COREPID 15 /* Add task pid to name when it core. */
-#define PR_ATTACHADDRPERM 16 /* (Re-)Connect vma, with specified prot. */
-#define PR_PTHREADEXIT 17 /* Kill a pthread, only for IRIX 6.[234] */
-
-asmlinkage int irix_prctl(unsigned option, ...)
-{
- va_list args;
- int error = 0;
-
- va_start(args, option);
- switch (option) {
- case PR_MAXPROCS:
- printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n",
- current->comm, current->pid);
- error = max_threads;
- break;
-
- case PR_ISBLOCKED: {
- struct task_struct *task;
-
- printk("irix_prctl[%s:%d]: Wants PR_ISBLOCKED\n",
- current->comm, current->pid);
- read_lock(&tasklist_lock);
- task = find_task_by_vpid(va_arg(args, pid_t));
- error = -ESRCH;
- if (error)
- error = (task->run_list.next != NULL);
- read_unlock(&tasklist_lock);
- /* Can _your_ OS find this out that fast? */
- break;
- }
-
- case PR_SETSTACKSIZE: {
- long value = va_arg(args, long);
-
- printk("irix_prctl[%s:%d]: Wants PR_SETSTACKSIZE<%08lx>\n",
- current->comm, current->pid, (unsigned long) value);
- if (value > RLIM_INFINITY)
- value = RLIM_INFINITY;
- if (capable(CAP_SYS_ADMIN)) {
- task_lock(current->group_leader);
- current->signal->rlim[RLIMIT_STACK].rlim_max =
- current->signal->rlim[RLIMIT_STACK].rlim_cur = value;
- task_unlock(current->group_leader);
- error = value;
- break;
- }
- task_lock(current->group_leader);
- if (value > current->signal->rlim[RLIMIT_STACK].rlim_max) {
- error = -EINVAL;
- task_unlock(current->group_leader);
- break;
- }
- current->signal->rlim[RLIMIT_STACK].rlim_cur = value;
- task_unlock(current->group_leader);
- error = value;
- break;
- }
-
- case PR_GETSTACKSIZE:
- printk("irix_prctl[%s:%d]: Wants PR_GETSTACKSIZE\n",
- current->comm, current->pid);
- error = current->signal->rlim[RLIMIT_STACK].rlim_cur;
- break;
-
- case PR_MAXPPROCS:
- printk("irix_prctl[%s:%d]: Wants PR_MAXPROCS\n",
- current->comm, current->pid);
- error = 1;
- break;
-
- case PR_UNBLKONEXEC:
- printk("irix_prctl[%s:%d]: Wants PR_UNBLKONEXEC\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_SETEXITSIG:
- printk("irix_prctl[%s:%d]: Wants PR_SETEXITSIG\n",
- current->comm, current->pid);
-
- /* We can probably play some game where we set the task
- * exit_code to some non-zero value when this is requested,
- * and check whether exit_code is already set in do_exit().
- */
- error = -EINVAL;
- break;
-
- case PR_RESIDENT:
- printk("irix_prctl[%s:%d]: Wants PR_RESIDENT\n",
- current->comm, current->pid);
- error = 0; /* Compatibility indeed. */
- break;
-
- case PR_ATTACHADDR:
- printk("irix_prctl[%s:%d]: Wants PR_ATTACHADDR\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_DETACHADDR:
- printk("irix_prctl[%s:%d]: Wants PR_DETACHADDR\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_TERMCHILD:
- printk("irix_prctl[%s:%d]: Wants PR_TERMCHILD\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_GETSHMASK:
- printk("irix_prctl[%s:%d]: Wants PR_GETSHMASK\n",
- current->comm, current->pid);
- error = -EINVAL; /* Until I have the sproc() stuff in. */
- break;
-
- case PR_GETNSHARE:
- error = 0; /* Until I have the sproc() stuff in. */
- break;
-
- case PR_COREPID:
- printk("irix_prctl[%s:%d]: Wants PR_COREPID\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- case PR_ATTACHADDRPERM:
- printk("irix_prctl[%s:%d]: Wants PR_ATTACHADDRPERM\n",
- current->comm, current->pid);
- error = -EINVAL;
- break;
-
- default:
- printk("irix_prctl[%s:%d]: Non-existant opcode %d\n",
- current->comm, current->pid, option);
- error = -EINVAL;
- break;
- }
- va_end(args);
-
- return error;
-}
-
-#undef DEBUG_PROCGRPS
-
-extern unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt);
-extern char *prom_getenv(char *name);
-extern long prom_setenv(char *name, char *value);
-
-/* The syssgi commands supported thus far. */
-#define SGI_SYSID 1 /* Return unique per-machine identifier. */
-#define SGI_INVENT 5 /* Fetch inventory */
-# define SGI_INV_SIZEOF 1
-# define SGI_INV_READ 2
-#define SGI_RDNAME 6 /* Return string name of a process. */
-#define SGI_SETNVRAM 8 /* Set PROM variable. */
-#define SGI_GETNVRAM 9 /* Get PROM variable. */
-#define SGI_SETPGID 21 /* Set process group id. */
-#define SGI_SYSCONF 22 /* POSIX sysconf garbage. */
-#define SGI_PATHCONF 24 /* POSIX sysconf garbage. */
-#define SGI_SETGROUPS 40 /* POSIX sysconf garbage. */
-#define SGI_GETGROUPS 41 /* POSIX sysconf garbage. */
-#define SGI_RUSAGE 56 /* BSD style rusage(). */
-#define SGI_SSYNC 62 /* Synchronous fs sync. */
-#define SGI_GETSID 65 /* SysVr4 get session id. */
-#define SGI_ELFMAP 68 /* Map an elf image. */
-#define SGI_TOSSTSAVE 108 /* Toss saved vma's. */
-#define SGI_FP_BCOPY 129 /* Should FPU bcopy be used on this machine? */
-#define SGI_PHYSP 1011 /* Translate virtual into physical page. */
-
-asmlinkage int irix_syssgi(struct pt_regs *regs)
-{
- unsigned long cmd;
- int retval, base = 0;
-
- if (regs->regs[2] == 1000)
- base = 1;
-
- cmd = regs->regs[base + 4];
- switch(cmd) {
- case SGI_SYSID: {
- char __user *buf = (char __user *) regs->regs[base + 5];
-
- /* XXX Use ethernet addr.... */
- retval = clear_user(buf, 64) ? -EFAULT : 0;
- break;
- }
-#if 0
- case SGI_RDNAME: {
- int pid = (int) regs->regs[base + 5];
- char __user *buf = (char __user *) regs->regs[base + 6];
- struct task_struct *p;
- char tcomm[sizeof(current->comm)];
-
- read_lock(&tasklist_lock);
- p = find_task_by_pid(pid);
- if (!p) {
- read_unlock(&tasklist_lock);
- retval = -ESRCH;
- break;
- }
- get_task_comm(tcomm, p);
- read_unlock(&tasklist_lock);
-
- /* XXX Need to check sizes. */
- retval = copy_to_user(buf, tcomm, sizeof(tcomm)) ? -EFAULT : 0;
- break;
- }
-
- case SGI_GETNVRAM: {
- char __user *name = (char __user *) regs->regs[base+5];
- char __user *buf = (char __user *) regs->regs[base+6];
- char *value;
- return -EINVAL; /* til I fix it */
- value = prom_getenv(name); /* PROM lock? */
- if (!value) {
- retval = -EINVAL;
- break;
- }
- /* Do I strlen() for the length? */
- retval = copy_to_user(buf, value, 128) ? -EFAULT : 0;
- break;
- }
-
- case SGI_SETNVRAM: {
- char __user *name = (char __user *) regs->regs[base+5];
- char __user *value = (char __user *) regs->regs[base+6];
- return -EINVAL; /* til I fix it */
- retval = prom_setenv(name, value);
- /* XXX make sure retval conforms to syssgi(2) */
- printk("[%s:%d] setnvram(\"%s\", \"%s\"): retval %d",
- current->comm, current->pid, name, value, retval);
-/* if (retval == PROM_ENOENT)
- retval = -ENOENT; */
- break;
- }
-#endif
-
- case SGI_SETPGID: {
-#ifdef DEBUG_PROCGRPS
- printk("[%s:%d] setpgid(%d, %d) ",
- current->comm, current->pid,
- (int) regs->regs[base + 5], (int)regs->regs[base + 6]);
-#endif
- retval = sys_setpgid(regs->regs[base + 5], regs->regs[base + 6]);
-
-#ifdef DEBUG_PROCGRPS
- printk("retval=%d\n", retval);
-#endif
- }
-
- case SGI_SYSCONF: {
- switch(regs->regs[base + 5]) {
- case 1:
- retval = (MAX_ARG_PAGES >> 4); /* XXX estimate... */
- goto out;
- case 2:
- retval = max_threads;
- goto out;
- case 3:
- retval = HZ;
- goto out;
- case 4:
- retval = NGROUPS_MAX;
- goto out;
- case 5:
- retval = sysctl_nr_open;
- goto out;
- case 6:
- retval = 1;
- goto out;
- case 7:
- retval = 1;
- goto out;
- case 8:
- retval = 199009;
- goto out;
- case 11:
- retval = PAGE_SIZE;
- goto out;
- case 12:
- retval = 4;
- goto out;
- case 25:
- case 26:
- case 27:
- case 28:
- case 29:
- case 30:
- retval = 0;
- goto out;
- case 31:
- retval = 32;
- goto out;
- default:
- retval = -EINVAL;
- goto out;
- };
- }
-
- case SGI_SETGROUPS:
- retval = sys_setgroups((int) regs->regs[base + 5],
- (gid_t __user *) regs->regs[base + 6]);
- break;
-
- case SGI_GETGROUPS:
- retval = sys_getgroups((int) regs->regs[base + 5],
- (gid_t __user *) regs->regs[base + 6]);
- break;
-
- case SGI_RUSAGE: {
- struct rusage __user *ru = (struct rusage __user *) regs->regs[base + 6];
-
- switch((int) regs->regs[base + 5]) {
- case 0:
- /* rusage self */
- retval = getrusage(current, RUSAGE_SELF, ru);
- goto out;
-
- case -1:
- /* rusage children */
- retval = getrusage(current, RUSAGE_CHILDREN, ru);
- goto out;
-
- default:
- retval = -EINVAL;
- goto out;
- };
- }
-
- case SGI_SSYNC:
- sys_sync();
- retval = 0;
- break;
-
- case SGI_GETSID:
-#ifdef DEBUG_PROCGRPS
- printk("[%s:%d] getsid(%d) ", current->comm, current->pid,
- (int) regs->regs[base + 5]);
-#endif
- retval = sys_getsid(regs->regs[base + 5]);
-#ifdef DEBUG_PROCGRPS
- printk("retval=%d\n", retval);
-#endif
- break;
-
- case SGI_ELFMAP:
- retval = irix_mapelf((int) regs->regs[base + 5],
- (struct elf_phdr __user *) regs->regs[base + 6],
- (int) regs->regs[base + 7]);
- break;
-
- case SGI_TOSSTSAVE:
- /* XXX We don't need to do anything? */
- retval = 0;
- break;
-
- case SGI_FP_BCOPY:
- retval = 0;
- break;
-
- case SGI_PHYSP: {
- unsigned long addr = regs->regs[base + 5];
- int __user *pageno = (int __user *) (regs->regs[base + 6]);
- struct mm_struct *mm = current->mm;
- pgd_t *pgdp;
- pud_t *pudp;
- pmd_t *pmdp;
- pte_t *ptep;
-
- down_read(&mm->mmap_sem);
- pgdp = pgd_offset(mm, addr);
- pudp = pud_offset(pgdp, addr);
- pmdp = pmd_offset(pudp, addr);
- ptep = pte_offset(pmdp, addr);
- retval = -EINVAL;
- if (ptep) {
- pte_t pte = *ptep;
-
- if (pte_val(pte) & (_PAGE_VALID | _PAGE_PRESENT)) {
- /* b0rked on 64-bit */
- retval = put_user((pte_val(pte) & PAGE_MASK) >>
- PAGE_SHIFT, pageno);
- }
- }
- up_read(&mm->mmap_sem);
- break;
- }
-
- case SGI_INVENT: {
- int arg1 = (int) regs->regs [base + 5];
- void __user *buffer = (void __user *) regs->regs [base + 6];
- int count = (int) regs->regs [base + 7];
-
- switch (arg1) {
- case SGI_INV_SIZEOF:
- retval = sizeof(inventory_t);
- break;
- case SGI_INV_READ:
- retval = dump_inventory_to_user(buffer, count);
- break;
- default:
- retval = -EINVAL;
- }
- break;
- }
-
- default:
- printk("irix_syssgi: Unsupported command %d\n", (int)cmd);
- retval = -EINVAL;
- break;
- };
-
-out:
- return retval;
-}
-
-asmlinkage int irix_gtime(struct pt_regs *regs)
-{
- return get_seconds();
-}
-
-/*
- * IRIX is completely broken... it returns 0 on success, otherwise
- * ENOMEM.
- */
-asmlinkage int irix_brk(unsigned long brk)
-{
- unsigned long rlim;
- unsigned long newbrk, oldbrk;
- struct mm_struct *mm = current->mm;
- int ret;
-
- down_write(&mm->mmap_sem);
- if (brk < mm->end_code) {
- ret = -ENOMEM;
- goto out;
- }
-
- newbrk = PAGE_ALIGN(brk);
- oldbrk = PAGE_ALIGN(mm->brk);
- if (oldbrk == newbrk) {
- mm->brk = brk;
- ret = 0;
- goto out;
- }
-
- /*
- * Always allow shrinking brk
- */
- if (brk <= mm->brk) {
- mm->brk = brk;
- do_munmap(mm, newbrk, oldbrk-newbrk);
- ret = 0;
- goto out;
- }
- /*
- * Check against rlimit and stack..
- */
- rlim = current->signal->rlim[RLIMIT_DATA].rlim_cur;
- if (rlim >= RLIM_INFINITY)
- rlim = ~0;
- if (brk - mm->end_code > rlim) {
- ret = -ENOMEM;
- goto out;
- }
-
- /*
- * Check against existing mmap mappings.
- */
- if (find_vma_intersection(mm, oldbrk, newbrk+PAGE_SIZE)) {
- ret = -ENOMEM;
- goto out;
- }
-
- /*
- * Ok, looks good - let it rip.
- */
- if (do_brk(oldbrk, newbrk-oldbrk) != oldbrk) {
- ret = -ENOMEM;
- goto out;
- }
- mm->brk = brk;
- ret = 0;
-
-out:
- up_write(&mm->mmap_sem);
- return ret;
-}
-
-asmlinkage int irix_getpid(struct pt_regs *regs)
-{
- regs->regs[3] = task_pid_vnr(current->real_parent);
- return task_pid_vnr(current);
-}
-
-asmlinkage int irix_getuid(struct pt_regs *regs)
-{
- regs->regs[3] = current->euid;
- return current->uid;
-}
-
-asmlinkage int irix_getgid(struct pt_regs *regs)
-{
- regs->regs[3] = current->egid;
- return current->gid;
-}
-
-asmlinkage int irix_stime(int value)
-{
- int err;
- struct timespec tv;
-
- tv.tv_sec = value;
- tv.tv_nsec = 0;
- err = security_settime(&tv, NULL);
- if (err)
- return err;
-
- write_seqlock_irq(&xtime_lock);
- xtime.tv_sec = value;
- xtime.tv_nsec = 0;
- ntp_clear();
- write_sequnlock_irq(&xtime_lock);
-
- return 0;
-}
-
-static inline void jiffiestotv(unsigned long jiffies, struct timeval *value)
-{
- value->tv_usec = (jiffies % HZ) * (1000000 / HZ);
- value->tv_sec = jiffies / HZ;
-}
-
-static inline void getitimer_real(struct itimerval *value)
-{
- register unsigned long val, interval;
-
- interval = current->it_real_incr;
- val = 0;
- if (del_timer(¤t->real_timer)) {
- unsigned long now = jiffies;
- val = current->real_timer.expires;
- add_timer(¤t->real_timer);
- /* look out for negative/zero itimer.. */
- if (val <= now)
- val = now+1;
- val -= now;
- }
- jiffiestotv(val, &value->it_value);
- jiffiestotv(interval, &value->it_interval);
-}
-
-asmlinkage unsigned int irix_alarm(unsigned int seconds)
-{
- return alarm_setitimer(seconds);
-}
-
-asmlinkage int irix_pause(void)
-{
- current->state = TASK_INTERRUPTIBLE;
- schedule();
-
- return -EINTR;
-}
-
-/* XXX need more than this... */
-asmlinkage int irix_mount(char __user *dev_name, char __user *dir_name,
- unsigned long flags, char __user *type, void __user *data, int datalen)
-{
- printk("[%s:%d] irix_mount(%p,%p,%08lx,%p,%p,%d)\n",
- current->comm, current->pid,
- dev_name, dir_name, flags, type, data, datalen);
-
- return sys_mount(dev_name, dir_name, type, flags, data);
-}
-
-struct irix_statfs {
- short f_type;
- long f_bsize, f_frsize, f_blocks, f_bfree, f_files, f_ffree;
- char f_fname[6], f_fpack[6];
-};
-
-asmlinkage int irix_statfs(const char __user *path,
- struct irix_statfs __user *buf, int len, int fs_type)
-{
- struct nameidata nd;
- struct kstatfs kbuf;
- int error, i;
-
- /* We don't support this feature yet. */
- if (fs_type) {
- error = -EINVAL;
- goto out;
- }
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statfs))) {
- error = -EFAULT;
- goto out;
- }
-
- error = user_path_walk(path, &nd);
- if (error)
- goto out;
-
- error = vfs_statfs(nd.path.dentry, &kbuf);
- if (error)
- goto dput_and_out;
-
- error = __put_user(kbuf.f_type, &buf->f_type);
- error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- for (i = 0; i < 6; i++) {
- error |= __put_user(0, &buf->f_fname[i]);
- error |= __put_user(0, &buf->f_fpack[i]);
- }
-
-dput_and_out:
- path_put(&nd.path);
-out:
- return error;
-}
-
-asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs __user *buf)
-{
- struct kstatfs kbuf;
- struct file *file;
- int error, i;
-
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statfs))) {
- error = -EFAULT;
- goto out;
- }
-
- if (!(file = fget(fd))) {
- error = -EBADF;
- goto out;
- }
-
- error = vfs_statfs(file->f_path.dentry, &kbuf);
- if (error)
- goto out_f;
-
- error = __put_user(kbuf.f_type, &buf->f_type);
- error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
-
- for (i = 0; i < 6; i++) {
- error |= __put_user(0, &buf->f_fname[i]);
- error |= __put_user(0, &buf->f_fpack[i]);
- }
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_setpgrp(int flags)
-{
- int error;
-
-#ifdef DEBUG_PROCGRPS
- printk("[%s:%d] setpgrp(%d) ", current->comm, current->pid, flags);
-#endif
- if(!flags)
- error = task_pgrp_vnr(current);
- else
- error = sys_setsid();
-#ifdef DEBUG_PROCGRPS
- printk("returning %d\n", error);
-#endif
-
- return error;
-}
-
-asmlinkage int irix_times(struct tms __user *tbuf)
-{
- int err = 0;
-
- if (tbuf) {
- if (!access_ok(VERIFY_WRITE, tbuf, sizeof *tbuf))
- return -EFAULT;
-
- err = __put_user(current->utime, &tbuf->tms_utime);
- err |= __put_user(current->stime, &tbuf->tms_stime);
- err |= __put_user(current->signal->cutime, &tbuf->tms_cutime);
- err |= __put_user(current->signal->cstime, &tbuf->tms_cstime);
- }
-
- return err;
-}
-
-asmlinkage int irix_exec(struct pt_regs *regs)
-{
- int error, base = 0;
- char *filename;
-
- if(regs->regs[2] == 1000)
- base = 1;
- filename = getname((char __user *) (long)regs->regs[base + 4]);
- error = PTR_ERR(filename);
- if (IS_ERR(filename))
- return error;
-
- error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
- NULL, regs);
- putname(filename);
-
- return error;
-}
-
-asmlinkage int irix_exece(struct pt_regs *regs)
-{
- int error, base = 0;
- char *filename;
-
- if (regs->regs[2] == 1000)
- base = 1;
- filename = getname((char __user *) (long)regs->regs[base + 4]);
- error = PTR_ERR(filename);
- if (IS_ERR(filename))
- return error;
- error = do_execve(filename, (char __user * __user *) (long)regs->regs[base + 5],
- (char __user * __user *) (long)regs->regs[base + 6], regs);
- putname(filename);
-
- return error;
-}
-
-asmlinkage unsigned long irix_gethostid(void)
-{
- printk("[%s:%d]: irix_gethostid() called...\n",
- current->comm, current->pid);
-
- return -EINVAL;
-}
-
-asmlinkage unsigned long irix_sethostid(unsigned long val)
-{
- printk("[%s:%d]: irix_sethostid(%08lx) called...\n",
- current->comm, current->pid, val);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_socket(int family, int type, int protocol)
-{
- switch(type) {
- case 1:
- type = SOCK_DGRAM;
- break;
-
- case 2:
- type = SOCK_STREAM;
- break;
-
- case 3:
- type = 9; /* Invalid... */
- break;
-
- case 4:
- type = SOCK_RAW;
- break;
-
- case 5:
- type = SOCK_RDM;
- break;
-
- case 6:
- type = SOCK_SEQPACKET;
- break;
-
- default:
- break;
- }
-
- return sys_socket(family, type, protocol);
-}
-
-asmlinkage int irix_getdomainname(char __user *name, int len)
-{
- int err;
-
- down_read(&uts_sem);
- if (len > __NEW_UTS_LEN)
- len = __NEW_UTS_LEN;
- err = copy_to_user(name, utsname()->domainname, len) ? -EFAULT : 0;
- up_read(&uts_sem);
-
- return err;
-}
-
-asmlinkage unsigned long irix_getpagesize(void)
-{
- return PAGE_SIZE;
-}
-
-asmlinkage int irix_msgsys(int opcode, unsigned long arg0, unsigned long arg1,
- unsigned long arg2, unsigned long arg3,
- unsigned long arg4)
-{
- switch (opcode) {
- case 0:
- return sys_msgget((key_t) arg0, (int) arg1);
- case 1:
- return sys_msgctl((int) arg0, (int) arg1,
- (struct msqid_ds __user *)arg2);
- case 2:
- return sys_msgrcv((int) arg0, (struct msgbuf __user *) arg1,
- (size_t) arg2, (long) arg3, (int) arg4);
- case 3:
- return sys_msgsnd((int) arg0, (struct msgbuf __user *) arg1,
- (size_t) arg2, (int) arg3);
- default:
- return -EINVAL;
- }
-}
-
-asmlinkage int irix_shmsys(int opcode, unsigned long arg0, unsigned long arg1,
- unsigned long arg2, unsigned long arg3)
-{
- switch (opcode) {
- case 0:
- return do_shmat((int) arg0, (char __user *) arg1, (int) arg2,
- (unsigned long *) arg3);
- case 1:
- return sys_shmctl((int)arg0, (int)arg1,
- (struct shmid_ds __user *)arg2);
- case 2:
- return sys_shmdt((char __user *)arg0);
- case 3:
- return sys_shmget((key_t) arg0, (int) arg1, (int) arg2);
- default:
- return -EINVAL;
- }
-}
-
-asmlinkage int irix_semsys(int opcode, unsigned long arg0, unsigned long arg1,
- unsigned long arg2, int arg3)
-{
- switch (opcode) {
- case 0:
- return sys_semctl((int) arg0, (int) arg1, (int) arg2,
- (union semun) arg3);
- case 1:
- return sys_semget((key_t) arg0, (int) arg1, (int) arg2);
- case 2:
- return sys_semop((int) arg0, (struct sembuf __user *)arg1,
- (unsigned int) arg2);
- default:
- return -EINVAL;
- }
-}
-
-static inline loff_t llseek(struct file *file, loff_t offset, int origin)
-{
- loff_t (*fn)(struct file *, loff_t, int);
- loff_t retval;
-
- fn = default_llseek;
- if (file->f_op && file->f_op->llseek)
- fn = file->f_op->llseek;
- lock_kernel();
- retval = fn(file, offset, origin);
- unlock_kernel();
-
- return retval;
-}
-
-asmlinkage int irix_lseek64(int fd, int _unused, int offhi, int offlow,
- int origin)
-{
- struct file * file;
- loff_t offset;
- int retval;
-
- retval = -EBADF;
- file = fget(fd);
- if (!file)
- goto bad;
- retval = -EINVAL;
- if (origin > 2)
- goto out_putf;
-
- offset = llseek(file, ((loff_t) offhi << 32) | offlow, origin);
- retval = (int) offset;
-
-out_putf:
- fput(file);
-bad:
- return retval;
-}
-
-asmlinkage int irix_sginap(int ticks)
-{
- schedule_timeout_interruptible(ticks);
- return 0;
-}
-
-asmlinkage int irix_sgikopt(char __user *istring, char __user *ostring, int len)
-{
- return -EINVAL;
-}
-
-asmlinkage int irix_gettimeofday(struct timeval __user *tv)
-{
- time_t sec;
- long nsec, seq;
- int err;
-
- if (!access_ok(VERIFY_WRITE, tv, sizeof(struct timeval)))
- return -EFAULT;
-
- do {
- seq = read_seqbegin(&xtime_lock);
- sec = xtime.tv_sec;
- nsec = xtime.tv_nsec;
- } while (read_seqretry(&xtime_lock, seq));
-
- err = __put_user(sec, &tv->tv_sec);
- err |= __put_user((nsec / 1000), &tv->tv_usec);
-
- return err;
-}
-
-#define IRIX_MAP_AUTOGROW 0x40
-
-asmlinkage unsigned long irix_mmap32(unsigned long addr, size_t len, int prot,
- int flags, int fd, off_t offset)
-{
- struct file *file = NULL;
- unsigned long retval;
-
- if (!(flags & MAP_ANONYMOUS)) {
- if (!(file = fget(fd)))
- return -EBADF;
-
- /* Ok, bad taste hack follows, try to think in something else
- * when reading this. */
- if (flags & IRIX_MAP_AUTOGROW) {
- unsigned long old_pos;
- long max_size = offset + len;
-
- if (max_size > file->f_path.dentry->d_inode->i_size) {
- old_pos = sys_lseek(fd, max_size - 1, 0);
- sys_write(fd, (void __user *) "", 1);
- sys_lseek(fd, old_pos, 0);
- }
- }
- }
-
- flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
- down_write(¤t->mm->mmap_sem);
- retval = do_mmap(file, addr, len, prot, flags, offset);
- up_write(¤t->mm->mmap_sem);
- if (file)
- fput(file);
-
- return retval;
-}
-
-asmlinkage int irix_madvise(unsigned long addr, int len, int behavior)
-{
- printk("[%s:%d] Wheee.. irix_madvise(%08lx,%d,%d)\n",
- current->comm, current->pid, addr, len, behavior);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_pagelock(char __user *addr, int len, int op)
-{
- printk("[%s:%d] Wheee.. irix_pagelock(%p,%d,%d)\n",
- current->comm, current->pid, addr, len, op);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_quotactl(struct pt_regs *regs)
-{
- printk("[%s:%d] Wheee.. irix_quotactl()\n",
- current->comm, current->pid);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_BSDsetpgrp(int pid, int pgrp)
-{
- int error;
-
-#ifdef DEBUG_PROCGRPS
- printk("[%s:%d] BSDsetpgrp(%d, %d) ", current->comm, current->pid,
- pid, pgrp);
-#endif
- if(!pid)
- pid = task_pid_vnr(current);
-
- /* Wheee, weird sysv thing... */
- if ((pgrp == 0) && (pid == task_pid_vnr(current)))
- error = sys_setsid();
- else
- error = sys_setpgid(pid, pgrp);
-
-#ifdef DEBUG_PROCGRPS
- printk("error = %d\n", error);
-#endif
-
- return error;
-}
-
-asmlinkage int irix_systeminfo(int cmd, char __user *buf, int cnt)
-{
- printk("[%s:%d] Wheee.. irix_systeminfo(%d,%p,%d)\n",
- current->comm, current->pid, cmd, buf, cnt);
-
- return -EINVAL;
-}
-
-struct iuname {
- char sysname[257], nodename[257], release[257];
- char version[257], machine[257];
- char m_type[257], base_rel[257];
- char _unused0[257], _unused1[257], _unused2[257];
- char _unused3[257], _unused4[257], _unused5[257];
-};
-
-asmlinkage int irix_uname(struct iuname __user *buf)
-{
- down_read(&uts_sem);
- if (copy_from_user(utsname()->sysname, buf->sysname, 65)
- || copy_from_user(utsname()->nodename, buf->nodename, 65)
- || copy_from_user(utsname()->release, buf->release, 65)
- || copy_from_user(utsname()->version, buf->version, 65)
- || copy_from_user(utsname()->machine, buf->machine, 65)) {
- return -EFAULT;
- }
- up_read(&uts_sem);
-
- return 1;
-}
-
-#undef DEBUG_XSTAT
-
-static int irix_xstat32_xlate(struct kstat *stat, void __user *ubuf)
-{
- struct xstat32 {
- u32 st_dev, st_pad1[3], st_ino, st_mode, st_nlink, st_uid, st_gid;
- u32 st_rdev, st_pad2[2], st_size, st_pad3;
- u32 st_atime0, st_atime1;
- u32 st_mtime0, st_mtime1;
- u32 st_ctime0, st_ctime1;
- u32 st_blksize, st_blocks;
- char st_fstype[16];
- u32 st_pad4[8];
- } ub;
-
- if (!sysv_valid_dev(stat->dev) || !sysv_valid_dev(stat->rdev))
- return -EOVERFLOW;
- ub.st_dev = sysv_encode_dev(stat->dev);
- ub.st_ino = stat->ino;
- ub.st_mode = stat->mode;
- ub.st_nlink = stat->nlink;
- SET_UID(ub.st_uid, stat->uid);
- SET_GID(ub.st_gid, stat->gid);
- ub.st_rdev = sysv_encode_dev(stat->rdev);
-#if BITS_PER_LONG == 32
- if (stat->size > MAX_NON_LFS)
- return -EOVERFLOW;
-#endif
- ub.st_size = stat->size;
- ub.st_atime0 = stat->atime.tv_sec;
- ub.st_atime1 = stat->atime.tv_nsec;
- ub.st_mtime0 = stat->mtime.tv_sec;
- ub.st_mtime1 = stat->atime.tv_nsec;
- ub.st_ctime0 = stat->ctime.tv_sec;
- ub.st_ctime1 = stat->atime.tv_nsec;
- ub.st_blksize = stat->blksize;
- ub.st_blocks = stat->blocks;
- strcpy(ub.st_fstype, "efs");
-
- return copy_to_user(ubuf, &ub, sizeof(ub)) ? -EFAULT : 0;
-}
-
-static int irix_xstat64_xlate(struct kstat *stat, void __user *ubuf)
-{
- struct xstat64 {
- u32 st_dev; s32 st_pad1[3];
- unsigned long long st_ino;
- u32 st_mode;
- u32 st_nlink; s32 st_uid; s32 st_gid; u32 st_rdev;
- s32 st_pad2[2];
- long long st_size;
- s32 st_pad3;
- struct { s32 tv_sec, tv_nsec; } st_atime, st_mtime, st_ctime;
- s32 st_blksize;
- long long st_blocks;
- char st_fstype[16];
- s32 st_pad4[8];
- } ks;
-
- if (!sysv_valid_dev(stat->dev) || !sysv_valid_dev(stat->rdev))
- return -EOVERFLOW;
-
- ks.st_dev = sysv_encode_dev(stat->dev);
- ks.st_pad1[0] = ks.st_pad1[1] = ks.st_pad1[2] = 0;
- ks.st_ino = (unsigned long long) stat->ino;
- ks.st_mode = (u32) stat->mode;
- ks.st_nlink = (u32) stat->nlink;
- ks.st_uid = (s32) stat->uid;
- ks.st_gid = (s32) stat->gid;
- ks.st_rdev = sysv_encode_dev(stat->rdev);
- ks.st_pad2[0] = ks.st_pad2[1] = 0;
- ks.st_size = (long long) stat->size;
- ks.st_pad3 = 0;
-
- /* XXX hackety hack... */
- ks.st_atime.tv_sec = (s32) stat->atime.tv_sec;
- ks.st_atime.tv_nsec = stat->atime.tv_nsec;
- ks.st_mtime.tv_sec = (s32) stat->mtime.tv_sec;
- ks.st_mtime.tv_nsec = stat->mtime.tv_nsec;
- ks.st_ctime.tv_sec = (s32) stat->ctime.tv_sec;
- ks.st_ctime.tv_nsec = stat->ctime.tv_nsec;
-
- ks.st_blksize = (s32) stat->blksize;
- ks.st_blocks = (long long) stat->blocks;
- memset(ks.st_fstype, 0, 16);
- ks.st_pad4[0] = ks.st_pad4[1] = ks.st_pad4[2] = ks.st_pad4[3] = 0;
- ks.st_pad4[4] = ks.st_pad4[5] = ks.st_pad4[6] = ks.st_pad4[7] = 0;
-
- /* Now write it all back. */
- return copy_to_user(ubuf, &ks, sizeof(ks)) ? -EFAULT : 0;
-}
-
-asmlinkage int irix_xstat(int version, char __user *filename, struct stat __user *statbuf)
-{
- int retval;
- struct kstat stat;
-
-#ifdef DEBUG_XSTAT
- printk("[%s:%d] Wheee.. irix_xstat(%d,%s,%p) ",
- current->comm, current->pid, version, filename, statbuf);
-#endif
-
- retval = vfs_stat(filename, &stat);
- if (!retval) {
- switch(version) {
- case 2:
- retval = irix_xstat32_xlate(&stat, statbuf);
- break;
- case 3:
- retval = irix_xstat64_xlate(&stat, statbuf);
- break;
- default:
- retval = -EINVAL;
- }
- }
- return retval;
-}
-
-asmlinkage int irix_lxstat(int version, char __user *filename, struct stat __user *statbuf)
-{
- int error;
- struct kstat stat;
-
-#ifdef DEBUG_XSTAT
- printk("[%s:%d] Wheee.. irix_lxstat(%d,%s,%p) ",
- current->comm, current->pid, version, filename, statbuf);
-#endif
-
- error = vfs_lstat(filename, &stat);
-
- if (!error) {
- switch (version) {
- case 2:
- error = irix_xstat32_xlate(&stat, statbuf);
- break;
- case 3:
- error = irix_xstat64_xlate(&stat, statbuf);
- break;
- default:
- error = -EINVAL;
- }
- }
- return error;
-}
-
-asmlinkage int irix_fxstat(int version, int fd, struct stat __user *statbuf)
-{
- int error;
- struct kstat stat;
-
-#ifdef DEBUG_XSTAT
- printk("[%s:%d] Wheee.. irix_fxstat(%d,%d,%p) ",
- current->comm, current->pid, version, fd, statbuf);
-#endif
-
- error = vfs_fstat(fd, &stat);
- if (!error) {
- switch (version) {
- case 2:
- error = irix_xstat32_xlate(&stat, statbuf);
- break;
- case 3:
- error = irix_xstat64_xlate(&stat, statbuf);
- break;
- default:
- error = -EINVAL;
- }
- }
- return error;
-}
-
-asmlinkage int irix_xmknod(int ver, char __user *filename, int mode, unsigned dev)
-{
- int retval;
- printk("[%s:%d] Wheee.. irix_xmknod(%d,%s,%x,%x)\n",
- current->comm, current->pid, ver, filename, mode, dev);
-
- switch(ver) {
- case 2:
- /* shouldn't we convert here as well as on stat()? */
- retval = sys_mknod(filename, mode, dev);
- break;
-
- default:
- retval = -EINVAL;
- break;
- };
-
- return retval;
-}
-
-asmlinkage int irix_swapctl(int cmd, char __user *arg)
-{
- printk("[%s:%d] Wheee.. irix_swapctl(%d,%p)\n",
- current->comm, current->pid, cmd, arg);
-
- return -EINVAL;
-}
-
-struct irix_statvfs {
- u32 f_bsize; u32 f_frsize; u32 f_blocks;
- u32 f_bfree; u32 f_bavail; u32 f_files; u32 f_ffree; u32 f_favail;
- u32 f_fsid; char f_basetype[16];
- u32 f_flag; u32 f_namemax;
- char f_fstr[32]; u32 f_filler[16];
-};
-
-asmlinkage int irix_statvfs(char __user *fname, struct irix_statvfs __user *buf)
-{
- struct nameidata nd;
- struct kstatfs kbuf;
- int error, i;
-
- printk("[%s:%d] Wheee.. irix_statvfs(%s,%p)\n",
- current->comm, current->pid, fname, buf);
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
- return -EFAULT;
-
- error = user_path_walk(fname, &nd);
- if (error)
- goto out;
- error = vfs_statfs(nd.path.dentry, &kbuf);
- if (error)
- goto dput_and_out;
-
- error |= __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
-#ifdef __MIPSEB__
- error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
-#else
- error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
-#endif
- for (i = 0; i < 16; i++)
- error |= __put_user(0, &buf->f_basetype[i]);
- error |= __put_user(0, &buf->f_flag);
- error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
- for (i = 0; i < 32; i++)
- error |= __put_user(0, &buf->f_fstr[i]);
-
-dput_and_out:
- path_put(&nd.path);
-out:
- return error;
-}
-
-asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs __user *buf)
-{
- struct kstatfs kbuf;
- struct file *file;
- int error, i;
-
- printk("[%s:%d] Wheee.. irix_fstatvfs(%d,%p)\n",
- current->comm, current->pid, fd, buf);
-
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs)))
- return -EFAULT;
-
- if (!(file = fget(fd))) {
- error = -EBADF;
- goto out;
- }
- error = vfs_statfs(file->f_path.dentry, &kbuf);
- if (error)
- goto out_f;
-
- error = __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
-#ifdef __MIPSEB__
- error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
-#else
- error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
-#endif
- for(i = 0; i < 16; i++)
- error |= __put_user(0, &buf->f_basetype[i]);
- error |= __put_user(0, &buf->f_flag);
- error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
- error |= __clear_user(&buf->f_fstr, sizeof(buf->f_fstr)) ? -EFAULT : 0;
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_priocntl(struct pt_regs *regs)
-{
- printk("[%s:%d] Wheee.. irix_priocntl()\n",
- current->comm, current->pid);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_sigqueue(int pid, int sig, int code, int val)
-{
- printk("[%s:%d] Wheee.. irix_sigqueue(%d,%d,%d,%d)\n",
- current->comm, current->pid, pid, sig, code, val);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_truncate64(char __user *name, int pad, int size1, int size2)
-{
- int retval;
-
- if (size1) {
- retval = -EINVAL;
- goto out;
- }
- retval = sys_truncate(name, size2);
-
-out:
- return retval;
-}
-
-asmlinkage int irix_ftruncate64(int fd, int pad, int size1, int size2)
-{
- int retval;
-
- if (size1) {
- retval = -EINVAL;
- goto out;
- }
- retval = sys_ftruncate(fd, size2);
-
-out:
- return retval;
-}
-
-asmlinkage int irix_mmap64(struct pt_regs *regs)
-{
- int len, prot, flags, fd, off1, off2, error, base = 0;
- unsigned long addr, pgoff, *sp;
- struct file *file = NULL;
- int err;
-
- if (regs->regs[2] == 1000)
- base = 1;
- sp = (unsigned long *) (regs->regs[29] + 16);
- addr = regs->regs[base + 4];
- len = regs->regs[base + 5];
- prot = regs->regs[base + 6];
- if (!base) {
- flags = regs->regs[base + 7];
- if (!access_ok(VERIFY_READ, sp, (4 * sizeof(unsigned long))))
- return -EFAULT;
- fd = sp[0];
- err = __get_user(off1, &sp[1]);
- err |= __get_user(off2, &sp[2]);
- } else {
- if (!access_ok(VERIFY_READ, sp, (5 * sizeof(unsigned long))))
- return -EFAULT;
- err = __get_user(flags, &sp[0]);
- err |= __get_user(fd, &sp[1]);
- err |= __get_user(off1, &sp[2]);
- err |= __get_user(off2, &sp[3]);
- }
-
- if (err)
- return err;
-
- if (off1 & PAGE_MASK)
- return -EOVERFLOW;
-
- pgoff = (off1 << (32 - PAGE_SHIFT)) | (off2 >> PAGE_SHIFT);
-
- if (!(flags & MAP_ANONYMOUS)) {
- if (!(file = fget(fd)))
- return -EBADF;
-
- /* Ok, bad taste hack follows, try to think in something else
- when reading this */
- if (flags & IRIX_MAP_AUTOGROW) {
- unsigned long old_pos;
- long max_size = off2 + len;
-
- if (max_size > file->f_path.dentry->d_inode->i_size) {
- old_pos = sys_lseek(fd, max_size - 1, 0);
- sys_write(fd, (void __user *) "", 1);
- sys_lseek(fd, old_pos, 0);
- }
- }
- }
-
- flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
-
- down_write(¤t->mm->mmap_sem);
- error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
- up_write(¤t->mm->mmap_sem);
-
- if (file)
- fput(file);
-
- return error;
-}
-
-asmlinkage int irix_dmi(struct pt_regs *regs)
-{
- printk("[%s:%d] Wheee.. irix_dmi()\n",
- current->comm, current->pid);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_pread(int fd, char __user *buf, int cnt, int off64,
- int off1, int off2)
-{
- printk("[%s:%d] Wheee.. irix_pread(%d,%p,%d,%d,%d,%d)\n",
- current->comm, current->pid, fd, buf, cnt, off64, off1, off2);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_pwrite(int fd, char __user *buf, int cnt, int off64,
- int off1, int off2)
-{
- printk("[%s:%d] Wheee.. irix_pwrite(%d,%p,%d,%d,%d,%d)\n",
- current->comm, current->pid, fd, buf, cnt, off64, off1, off2);
-
- return -EINVAL;
-}
-
-asmlinkage int irix_sgifastpath(int cmd, unsigned long arg0, unsigned long arg1,
- unsigned long arg2, unsigned long arg3,
- unsigned long arg4, unsigned long arg5)
-{
- printk("[%s:%d] Wheee.. irix_fastpath(%d,%08lx,%08lx,%08lx,%08lx,"
- "%08lx,%08lx)\n",
- current->comm, current->pid, cmd, arg0, arg1, arg2,
- arg3, arg4, arg5);
-
- return -EINVAL;
-}
-
-struct irix_statvfs64 {
- u32 f_bsize; u32 f_frsize;
- u64 f_blocks; u64 f_bfree; u64 f_bavail;
- u64 f_files; u64 f_ffree; u64 f_favail;
- u32 f_fsid;
- char f_basetype[16];
- u32 f_flag; u32 f_namemax;
- char f_fstr[32];
- u32 f_filler[16];
-};
-
-asmlinkage int irix_statvfs64(char __user *fname, struct irix_statvfs64 __user *buf)
-{
- struct nameidata nd;
- struct kstatfs kbuf;
- int error, i;
-
- printk("[%s:%d] Wheee.. irix_statvfs64(%s,%p)\n",
- current->comm, current->pid, fname, buf);
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs64))) {
- error = -EFAULT;
- goto out;
- }
-
- error = user_path_walk(fname, &nd);
- if (error)
- goto out;
- error = vfs_statfs(nd.path.dentry, &kbuf);
- if (error)
- goto dput_and_out;
-
- error = __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
-#ifdef __MIPSEB__
- error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
-#else
- error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
-#endif
- for(i = 0; i < 16; i++)
- error |= __put_user(0, &buf->f_basetype[i]);
- error |= __put_user(0, &buf->f_flag);
- error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
- for(i = 0; i < 32; i++)
- error |= __put_user(0, &buf->f_fstr[i]);
-
-dput_and_out:
- path_put(&nd.path);
-out:
- return error;
-}
-
-asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs __user *buf)
-{
- struct kstatfs kbuf;
- struct file *file;
- int error, i;
-
- printk("[%s:%d] Wheee.. irix_fstatvfs64(%d,%p)\n",
- current->comm, current->pid, fd, buf);
-
- if (!access_ok(VERIFY_WRITE, buf, sizeof(struct irix_statvfs))) {
- error = -EFAULT;
- goto out;
- }
- if (!(file = fget(fd))) {
- error = -EBADF;
- goto out;
- }
- error = vfs_statfs(file->f_path.dentry, &kbuf);
- if (error)
- goto out_f;
-
- error = __put_user(kbuf.f_bsize, &buf->f_bsize);
- error |= __put_user(kbuf.f_frsize, &buf->f_frsize);
- error |= __put_user(kbuf.f_blocks, &buf->f_blocks);
- error |= __put_user(kbuf.f_bfree, &buf->f_bfree);
- error |= __put_user(kbuf.f_bfree, &buf->f_bavail); /* XXX hackety hack... */
- error |= __put_user(kbuf.f_files, &buf->f_files);
- error |= __put_user(kbuf.f_ffree, &buf->f_ffree);
- error |= __put_user(kbuf.f_ffree, &buf->f_favail); /* XXX hackety hack... */
-#ifdef __MIPSEB__
- error |= __put_user(kbuf.f_fsid.val[1], &buf->f_fsid);
-#else
- error |= __put_user(kbuf.f_fsid.val[0], &buf->f_fsid);
-#endif
- for(i = 0; i < 16; i++)
- error |= __put_user(0, &buf->f_basetype[i]);
- error |= __put_user(0, &buf->f_flag);
- error |= __put_user(kbuf.f_namelen, &buf->f_namemax);
- error |= __clear_user(buf->f_fstr, sizeof(buf->f_fstr[i])) ? -EFAULT : 0;
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_getmountid(char __user *fname, unsigned long __user *midbuf)
-{
- int err;
-
- printk("[%s:%d] irix_getmountid(%s, %p)\n",
- current->comm, current->pid, fname, midbuf);
- if (!access_ok(VERIFY_WRITE, midbuf, (sizeof(unsigned long) * 4)))
- return -EFAULT;
-
- /*
- * The idea with this system call is that when trying to determine
- * 'pwd' and it's a toss-up for some reason, userland can use the
- * fsid of the filesystem to try and make the right decision, but
- * we don't have this so for now. XXX
- */
- err = __put_user(0, &midbuf[0]);
- err |= __put_user(0, &midbuf[1]);
- err |= __put_user(0, &midbuf[2]);
- err |= __put_user(0, &midbuf[3]);
-
- return err;
-}
-
-asmlinkage int irix_nsproc(unsigned long entry, unsigned long mask,
- unsigned long arg, unsigned long sp, int slen)
-{
- printk("[%s:%d] Wheee.. irix_nsproc(%08lx,%08lx,%08lx,%08lx,%d)\n",
- current->comm, current->pid, entry, mask, arg, sp, slen);
-
- return -EINVAL;
-}
-
-#undef DEBUG_GETDENTS
-
-struct irix_dirent32 {
- u32 d_ino;
- u32 d_off;
- unsigned short d_reclen;
- char d_name[1];
-};
-
-struct irix_dirent32_callback {
- struct irix_dirent32 __user *current_dir;
- struct irix_dirent32 __user *previous;
- int count;
- int error;
-};
-
-#define NAME_OFFSET32(de) ((int) ((de)->d_name - (char *) (de)))
-#define ROUND_UP32(x) (((x)+sizeof(u32)-1) & ~(sizeof(u32)-1))
-
-static int irix_filldir32(void *__buf, const char *name,
- int namlen, loff_t offset, u64 ino, unsigned int d_type)
-{
- struct irix_dirent32 __user *dirent;
- struct irix_dirent32_callback *buf = __buf;
- unsigned short reclen = ROUND_UP32(NAME_OFFSET32(dirent) + namlen + 1);
- int err = 0;
- u32 d_ino;
-
-#ifdef DEBUG_GETDENTS
- printk("\nirix_filldir32[reclen<%d>namlen<%d>count<%d>]",
- reclen, namlen, buf->count);
-#endif
- buf->error = -EINVAL; /* only used if we fail.. */
- if (reclen > buf->count)
- return -EINVAL;
- d_ino = ino;
- if (sizeof(d_ino) < sizeof(ino) && d_ino != ino)
- return -EOVERFLOW;
- dirent = buf->previous;
- if (dirent)
- err = __put_user(offset, &dirent->d_off);
- dirent = buf->current_dir;
- err |= __put_user(dirent, &buf->previous);
- err |= __put_user(d_ino, &dirent->d_ino);
- err |= __put_user(reclen, &dirent->d_reclen);
- err |= copy_to_user((char __user *)dirent->d_name, name, namlen) ? -EFAULT : 0;
- err |= __put_user(0, &dirent->d_name[namlen]);
- dirent = (struct irix_dirent32 __user *) ((char __user *) dirent + reclen);
-
- buf->current_dir = dirent;
- buf->count -= reclen;
-
- return err;
-}
-
-asmlinkage int irix_ngetdents(unsigned int fd, void __user * dirent,
- unsigned int count, int __user *eob)
-{
- struct file *file;
- struct irix_dirent32 __user *lastdirent;
- struct irix_dirent32_callback buf;
- int error;
-
-#ifdef DEBUG_GETDENTS
- printk("[%s:%d] ngetdents(%d, %p, %d, %p) ", current->comm,
- current->pid, fd, dirent, count, eob);
-#endif
- error = -EBADF;
- file = fget(fd);
- if (!file)
- goto out;
-
- buf.current_dir = (struct irix_dirent32 __user *) dirent;
- buf.previous = NULL;
- buf.count = count;
- buf.error = 0;
-
- error = vfs_readdir(file, irix_filldir32, &buf);
- if (error < 0)
- goto out_putf;
-
- error = buf.error;
- lastdirent = buf.previous;
- if (lastdirent) {
- put_user(file->f_pos, &lastdirent->d_off);
- error = count - buf.count;
- }
-
- if (put_user(0, eob) < 0) {
- error = -EFAULT;
- goto out_putf;
- }
-
-#ifdef DEBUG_GETDENTS
- printk("eob=%d returning %d\n", *eob, count - buf.count);
-#endif
- error = count - buf.count;
-
-out_putf:
- fput(file);
-out:
- return error;
-}
-
-struct irix_dirent64 {
- u64 d_ino;
- u64 d_off;
- unsigned short d_reclen;
- char d_name[1];
-};
-
-struct irix_dirent64_callback {
- struct irix_dirent64 __user *curr;
- struct irix_dirent64 __user *previous;
- int count;
- int error;
-};
-
-#define NAME_OFFSET64(de) ((int) ((de)->d_name - (char *) (de)))
-#define ROUND_UP64(x) (((x)+sizeof(u64)-1) & ~(sizeof(u64)-1))
-
-static int irix_filldir64(void *__buf, const char *name,
- int namlen, loff_t offset, u64 ino, unsigned int d_type)
-{
- struct irix_dirent64 __user *dirent;
- struct irix_dirent64_callback * buf = __buf;
- unsigned short reclen = ROUND_UP64(NAME_OFFSET64(dirent) + namlen + 1);
- int err = 0;
-
- if (!access_ok(VERIFY_WRITE, buf, sizeof(*buf)))
- return -EFAULT;
-
- if (__put_user(-EINVAL, &buf->error)) /* only used if we fail.. */
- return -EFAULT;
- if (reclen > buf->count)
- return -EINVAL;
- dirent = buf->previous;
- if (dirent)
- err = __put_user(offset, &dirent->d_off);
- dirent = buf->curr;
- buf->previous = dirent;
- err |= __put_user(ino, &dirent->d_ino);
- err |= __put_user(reclen, &dirent->d_reclen);
- err |= __copy_to_user((char __user *)dirent->d_name, name, namlen)
- ? -EFAULT : 0;
- err |= __put_user(0, &dirent->d_name[namlen]);
-
- dirent = (struct irix_dirent64 __user *) ((char __user *) dirent + reclen);
-
- buf->curr = dirent;
- buf->count -= reclen;
-
- return err;
-}
-
-asmlinkage int irix_getdents64(int fd, void __user *dirent, int cnt)
-{
- struct file *file;
- struct irix_dirent64 __user *lastdirent;
- struct irix_dirent64_callback buf;
- int error;
-
-#ifdef DEBUG_GETDENTS
- printk("[%s:%d] getdents64(%d, %p, %d) ", current->comm,
- current->pid, fd, dirent, cnt);
-#endif
- error = -EBADF;
- if (!(file = fget(fd)))
- goto out;
-
- error = -EFAULT;
- if (!access_ok(VERIFY_WRITE, dirent, cnt))
- goto out_f;
-
- error = -EINVAL;
- if (cnt < (sizeof(struct irix_dirent64) + 255))
- goto out_f;
-
- buf.curr = (struct irix_dirent64 __user *) dirent;
- buf.previous = NULL;
- buf.count = cnt;
- buf.error = 0;
- error = vfs_readdir(file, irix_filldir64, &buf);
- if (error < 0)
- goto out_f;
- lastdirent = buf.previous;
- if (!lastdirent) {
- error = buf.error;
- goto out_f;
- }
- if (put_user(file->f_pos, &lastdirent->d_off))
- return -EFAULT;
-#ifdef DEBUG_GETDENTS
- printk("returning %d\n", cnt - buf.count);
-#endif
- error = cnt - buf.count;
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_ngetdents64(int fd, void __user *dirent, int cnt, int *eob)
-{
- struct file *file;
- struct irix_dirent64 __user *lastdirent;
- struct irix_dirent64_callback buf;
- int error;
-
-#ifdef DEBUG_GETDENTS
- printk("[%s:%d] ngetdents64(%d, %p, %d) ", current->comm,
- current->pid, fd, dirent, cnt);
-#endif
- error = -EBADF;
- if (!(file = fget(fd)))
- goto out;
-
- error = -EFAULT;
- if (!access_ok(VERIFY_WRITE, dirent, cnt) ||
- !access_ok(VERIFY_WRITE, eob, sizeof(*eob)))
- goto out_f;
-
- error = -EINVAL;
- if (cnt < (sizeof(struct irix_dirent64) + 255))
- goto out_f;
-
- *eob = 0;
- buf.curr = (struct irix_dirent64 __user *) dirent;
- buf.previous = NULL;
- buf.count = cnt;
- buf.error = 0;
- error = vfs_readdir(file, irix_filldir64, &buf);
- if (error < 0)
- goto out_f;
- lastdirent = buf.previous;
- if (!lastdirent) {
- error = buf.error;
- goto out_f;
- }
- if (put_user(file->f_pos, &lastdirent->d_off))
- return -EFAULT;
-#ifdef DEBUG_GETDENTS
- printk("eob=%d returning %d\n", *eob, cnt - buf.count);
-#endif
- error = cnt - buf.count;
-
-out_f:
- fput(file);
-out:
- return error;
-}
-
-asmlinkage int irix_uadmin(unsigned long op, unsigned long func, unsigned long arg)
-{
- int retval;
-
- switch (op) {
- case 1:
- /* Reboot */
- printk("[%s:%d] irix_uadmin: Wants to reboot...\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 2:
- /* Shutdown */
- printk("[%s:%d] irix_uadmin: Wants to shutdown...\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 4:
- /* Remount-root */
- printk("[%s:%d] irix_uadmin: Wants to remount root...\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 8:
- /* Kill all tasks. */
- printk("[%s:%d] irix_uadmin: Wants to kill all tasks...\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 256:
- /* Set magic mushrooms... */
- printk("[%s:%d] irix_uadmin: Wants to set magic mushroom[%d]...\n",
- current->comm, current->pid, (int) func);
- retval = -EINVAL;
- goto out;
-
- default:
- printk("[%s:%d] irix_uadmin: Unknown operation [%d]...\n",
- current->comm, current->pid, (int) op);
- retval = -EINVAL;
- goto out;
- };
-
-out:
- return retval;
-}
-
-asmlinkage int irix_utssys(char __user *inbuf, int arg, int type, char __user *outbuf)
-{
- int retval;
-
- switch(type) {
- case 0:
- /* uname() */
- retval = irix_uname((struct iuname __user *)inbuf);
- goto out;
-
- case 2:
- /* ustat() */
- printk("[%s:%d] irix_utssys: Wants to do ustat()\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 3:
- /* fusers() */
- printk("[%s:%d] irix_utssys: Wants to do fusers()\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- default:
- printk("[%s:%d] irix_utssys: Wants to do unknown type[%d]\n",
- current->comm, current->pid, (int) type);
- retval = -EINVAL;
- goto out;
- }
-
-out:
- return retval;
-}
-
-#undef DEBUG_FCNTL
-
-#define IRIX_F_ALLOCSP 10
-
-asmlinkage int irix_fcntl(int fd, int cmd, int arg)
-{
- int retval;
-
-#ifdef DEBUG_FCNTL
- printk("[%s:%d] irix_fcntl(%d, %d, %d) ", current->comm,
- current->pid, fd, cmd, arg);
-#endif
- if (cmd == IRIX_F_ALLOCSP){
- return 0;
- }
- retval = sys_fcntl(fd, cmd, arg);
-#ifdef DEBUG_FCNTL
- printk("%d\n", retval);
-#endif
- return retval;
-}
-
-asmlinkage int irix_ulimit(int cmd, int arg)
-{
- int retval;
-
- switch(cmd) {
- case 1:
- printk("[%s:%d] irix_ulimit: Wants to get file size limit.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 2:
- printk("[%s:%d] irix_ulimit: Wants to set file size limit.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 3:
- printk("[%s:%d] irix_ulimit: Wants to get brk limit.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- case 4:
-#if 0
- printk("[%s:%d] irix_ulimit: Wants to get fd limit.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-#endif
- retval = current->signal->rlim[RLIMIT_NOFILE].rlim_cur;
- goto out;
-
- case 5:
- printk("[%s:%d] irix_ulimit: Wants to get txt offset.\n",
- current->comm, current->pid);
- retval = -EINVAL;
- goto out;
-
- default:
- printk("[%s:%d] irix_ulimit: Unknown command [%d].\n",
- current->comm, current->pid, cmd);
- retval = -EINVAL;
- goto out;
- }
-out:
- return retval;
-}
-
-asmlinkage int irix_unimp(struct pt_regs *regs)
-{
- printk("irix_unimp [%s:%d] v0=%d v1=%d a0=%08lx a1=%08lx a2=%08lx "
- "a3=%08lx\n", current->comm, current->pid,
- (int) regs->regs[2], (int) regs->regs[3],
- regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]);
-
- return -ENOSYS;
-}
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index f9165d1..b8ea4e9 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -71,7 +71,6 @@
extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
struct mips_fpu_struct *ctx, int has_fpu);
-void (*board_watchpoint_handler)(struct pt_regs *regs);
void (*board_be_init)(void);
int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
void (*board_nmi_handler_setup)(void);
@@ -249,11 +248,11 @@
/*
* Saved cp0 registers
*/
- printk("epc : %0*lx ", field, regs->cp0_epc);
- print_symbol("%s ", regs->cp0_epc);
+ printk("epc : %0*lx %pS\n", field, regs->cp0_epc,
+ (void *) regs->cp0_epc);
printk(" %s\n", print_tainted());
- printk("ra : %0*lx ", field, regs->regs[31]);
- print_symbol("%s\n", regs->regs[31]);
+ printk("ra : %0*lx %pS\n", field, regs->regs[31],
+ (void *) regs->regs[31]);
printk("Status: %08x ", (uint32_t) regs->cp0_status);
@@ -892,11 +891,6 @@
asmlinkage void do_watch(struct pt_regs *regs)
{
- if (board_watchpoint_handler) {
- (*board_watchpoint_handler)(regs);
- return;
- }
-
/*
* We use the watch exception where available to detect stack
* overflows.
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index a56c150..d1ac7a2 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -22,8 +22,8 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
-#include <asm/bootinfo.h>
#include <asm/irq_cpu.h>
+#include <asm/lasat/lasat.h>
#include <asm/lasat/lasatint.h>
#include <irq.h>
@@ -112,23 +112,18 @@
{
int i;
- switch (mips_machtype) {
- case MACH_LASAT_100:
- lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
- lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
- lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
- get_int_status = get_int_status_100;
- *lasat_int_mask = 0;
- break;
- case MACH_LASAT_200:
+ if (IS_LASAT_200()) {
lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
get_int_status = get_int_status_200;
*lasat_int_mask &= 0xffff;
- break;
- default:
- panic("arch_init_irq: mips_machtype incorrect");
+ } else {
+ lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
+ lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
+ lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
+ get_int_status = get_int_status_100;
+ *lasat_int_mask = 0;
}
mips_cpu_irq_init();
diff --git a/arch/mips/lasat/lasat_board.c b/arch/mips/lasat/lasat_board.c
index 31e328b..577bb46 100644
--- a/arch/mips/lasat/lasat_board.c
+++ b/arch/mips/lasat/lasat_board.c
@@ -24,7 +24,6 @@
#include <linux/string.h>
#include <linux/ctype.h>
#include <linux/mutex.h>
-#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include "at93c.h"
/* New model description table */
@@ -66,7 +65,7 @@
ls[LASAT_MTD_SERVICE] = 0xC0000;
ls[LASAT_MTD_NORMAL] = 0x100000;
- if (mips_machtype == MACH_LASAT_100) {
+ if (!IS_LASAT_200()) {
lasat_board_info.li_flash_base = 0x1e000000;
lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
diff --git a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c
index 209edcc..6acc6cb 100644
--- a/arch/mips/lasat/prom.c
+++ b/arch/mips/lasat/prom.c
@@ -86,18 +86,16 @@
setup_prom_vectors();
- if (current_cpu_data.cputype == CPU_R5000) {
+ if (IS_LASAT_200()) {
printk(KERN_INFO "LASAT 200 board\n");
- mips_machtype = MACH_LASAT_200;
lasat_ndelay_divider = LASAT_200_DIVIDER;
+ at93c = &at93c_defs[1];
} else {
printk(KERN_INFO "LASAT 100 board\n");
- mips_machtype = MACH_LASAT_100;
lasat_ndelay_divider = LASAT_100_DIVIDER;
+ at93c = &at93c_defs[0];
}
- at93c = &at93c_defs[mips_machtype];
-
lasat_init_board_info(); /* Read info from EEPROM */
/* Get the command line */
diff --git a/arch/mips/lasat/serial.c b/arch/mips/lasat/serial.c
index 205bd39..5bcb6e8 100644
--- a/arch/mips/lasat/serial.c
+++ b/arch/mips/lasat/serial.c
@@ -23,7 +23,6 @@
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
-#include <asm/bootinfo.h>
#include <asm/lasat/lasat.h>
#include <asm/lasat/serial.h>
@@ -47,7 +46,7 @@
if (!pdev)
return -ENOMEM;
- if (mips_machtype == MACH_LASAT_100) {
+ if (!IS_LASAT_200()) {
lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_100);
lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_100 * 8 - 1;
lasat_serial_res[0].flags = IORESOURCE_MEM;
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index e072da4..dbd3163 100644
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -127,9 +127,11 @@
void __init plat_mem_setup(void)
{
int i;
- lasat_misc = &lasat_misc_info[mips_machtype];
+ int lasat_type = IS_LASAT_200() ? 1 : 0;
+
+ lasat_misc = &lasat_misc_info[lasat_type];
#ifdef CONFIG_PICVUE
- picvue = &pvc_defs[mips_machtype];
+ picvue = &pvc_defs[lasat_type];
#endif
/* Set up panic notifier */
@@ -140,7 +142,7 @@
lasat_reboot_setup();
#ifdef CONFIG_DS1603
- ds1603 = &ds_defs[mips_machtype];
+ ds1603 = &ds_defs[lasat_type];
#endif
#ifdef DYNAMIC_SERIAL_INIT
diff --git a/arch/mips/mips-boards/atlas/Makefile b/arch/mips/mips-boards/atlas/Makefile
deleted file mode 100644
index f71c2dd..0000000
--- a/arch/mips/mips-boards/atlas/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-
-obj-y := atlas_int.o atlas_setup.o
-obj-$(CONFIG_KGDB) += atlas_gdb.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/atlas/atlas_gdb.c b/arch/mips/mips-boards/atlas/atlas_gdb.c
deleted file mode 100644
index 00c98cf..0000000
--- a/arch/mips/mips-boards/atlas/atlas_gdb.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * This is the interface to the remote debugger stub.
- */
-#include <asm/io.h>
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/saa9730_uart.h>
-
-#define INB(a) inb((unsigned long)a)
-#define OUTB(x, a) outb(x, (unsigned long)a)
-
-/*
- * This is the interface to the remote debugger stub
- * if the Philips part is used for the debug port,
- * called from the platform setup code.
- */
-void *saa9730_base = (void *)ATLAS_SAA9730_REG;
-
-static int saa9730_kgdb_active = 0;
-
-#define SAA9730_BAUDCLOCK(baud) (((ATLAS_SAA9730_BAUDCLOCK/(baud))/16)-1)
-
-int saa9730_kgdb_hook(int speed)
-{
- int baudclock;
- t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
-
- /*
- * Clear all interrupts
- */
- (void) INB(&kgdb_uart->Lsr);
- (void) INB(&kgdb_uart->Msr);
- (void) INB(&kgdb_uart->Thr_Rbr);
- (void) INB(&kgdb_uart->Iir_Fcr);
-
- /*
- * Now, initialize the UART
- */
- /* 8 data bits, one stop bit, no parity */
- OUTB(SAA9730_LCR_DATA8, &kgdb_uart->Lcr);
-
- baudclock = SAA9730_BAUDCLOCK(speed);
-
- OUTB((baudclock >> 16) & 0xff, &kgdb_uart->BaudDivMsb);
- OUTB( baudclock & 0xff, &kgdb_uart->BaudDivLsb);
-
- /* Set RTS/DTR active */
- OUTB(SAA9730_MCR_DTR | SAA9730_MCR_RTS, &kgdb_uart->Mcr);
- saa9730_kgdb_active = 1;
-
- return speed;
-}
-
-int saa9730_putDebugChar(char c)
-{
- t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
-
- if (!saa9730_kgdb_active) { /* need to init device first */
- return 0;
- }
-
- while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_THRE))
- ;
- OUTB(c, &kgdb_uart->Thr_Rbr);
-
- return 1;
-}
-
-char saa9730_getDebugChar(void)
-{
- t_uart_saa9730_regmap *kgdb_uart = (t_uart_saa9730_regmap *)(saa9730_base + SAA9730_UART_REGS_ADDR);
- char c;
-
- if (!saa9730_kgdb_active) { /* need to init device first */
- return 0;
- }
- while (!(INB(&kgdb_uart->Lsr) & SAA9730_LSR_DR))
- ;
-
- c = INB(&kgdb_uart->Thr_Rbr);
- return(c);
-}
diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c
deleted file mode 100644
index 6fb29c3..0000000
--- a/arch/mips/mips-boards/atlas/atlas_int.c
+++ /dev/null
@@ -1,272 +0,0 @@
-/*
- * Copyright (C) 1999, 2000, 2006 MIPS Technologies, Inc.
- * All rights reserved.
- * Authors: Carsten Langgaard <carstenl@mips.com>
- * Maciej W. Rozycki <macro@mips.com>
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Routines for generic manipulation of the interrupts found on the MIPS
- * Atlas board.
- *
- */
-#include <linux/compiler.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <linux/kernel.h>
-
-#include <asm/gdb-stub.h>
-#include <asm/io.h>
-#include <asm/irq_cpu.h>
-#include <asm/msc01_ic.h>
-
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/atlasint.h>
-#include <asm/mips-boards/generic.h>
-
-static struct atlas_ictrl_regs *atlas_hw0_icregs;
-
-#if 0
-#define DEBUG_INT(x...) printk(x)
-#else
-#define DEBUG_INT(x...)
-#endif
-
-void disable_atlas_irq(unsigned int irq_nr)
-{
- atlas_hw0_icregs->intrsten = 1 << (irq_nr - ATLAS_INT_BASE);
- iob();
-}
-
-void enable_atlas_irq(unsigned int irq_nr)
-{
- atlas_hw0_icregs->intseten = 1 << (irq_nr - ATLAS_INT_BASE);
- iob();
-}
-
-static void end_atlas_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- enable_atlas_irq(irq);
-}
-
-static struct irq_chip atlas_irq_type = {
- .name = "Atlas",
- .ack = disable_atlas_irq,
- .mask = disable_atlas_irq,
- .mask_ack = disable_atlas_irq,
- .unmask = enable_atlas_irq,
- .eoi = enable_atlas_irq,
- .end = end_atlas_irq,
-};
-
-static inline int ls1bit32(unsigned int x)
-{
- int b = 31, s;
-
- s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
- s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
- s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
- s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
- s = 1; if (x << 1 == 0) s = 0; b -= s;
-
- return b;
-}
-
-static inline void atlas_hw0_irqdispatch(void)
-{
- unsigned long int_status;
- int irq;
-
- int_status = atlas_hw0_icregs->intstatus;
-
- /* if int_status == 0, then the interrupt has already been cleared */
- if (unlikely(int_status == 0))
- return;
-
- irq = ATLAS_INT_BASE + ls1bit32(int_status);
-
- DEBUG_INT("atlas_hw0_irqdispatch: irq=%d\n", irq);
-
- do_IRQ(irq);
-}
-
-static inline int clz(unsigned long x)
-{
- __asm__(
- " .set push \n"
- " .set mips32 \n"
- " clz %0, %1 \n"
- " .set pop \n"
- : "=r" (x)
- : "r" (x));
-
- return x;
-}
-
-/*
- * Version of ffs that only looks at bits 12..15.
- */
-static inline unsigned int irq_ffs(unsigned int pending)
-{
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
- return -clz(pending) + 31 - CAUSEB_IP;
-#else
- unsigned int a0 = 7;
- unsigned int t0;
-
- t0 = s0 & 0xf000;
- t0 = t0 < 1;
- t0 = t0 << 2;
- a0 = a0 - t0;
- s0 = s0 << t0;
-
- t0 = s0 & 0xc000;
- t0 = t0 < 1;
- t0 = t0 << 1;
- a0 = a0 - t0;
- s0 = s0 << t0;
-
- t0 = s0 & 0x8000;
- t0 = t0 < 1;
- //t0 = t0 << 2;
- a0 = a0 - t0;
- //s0 = s0 << t0;
-
- return a0;
-#endif
-}
-
-/*
- * IRQs on the Atlas board look basically like (all external interrupt
- * sources are combined together on hardware interrupt 0 (MIPS IRQ 2)):
- *
- * MIPS IRQ Source
- * -------- ------
- * 0 Software 0 (reschedule IPI on MT)
- * 1 Software 1 (remote call IPI on MT)
- * 2 Combined Atlas hardware interrupt (hw0)
- * 3 Hardware (ignored)
- * 4 Hardware (ignored)
- * 5 Hardware (ignored)
- * 6 Hardware (ignored)
- * 7 R4k timer (what we use)
- *
- * We handle the IRQ according to _our_ priority which is:
- *
- * Highest ---- R4k Timer
- * Lowest ---- Software 0
- *
- * then we just return, if multiple IRQs are pending then we will just take
- * another exception, big deal.
- */
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
- int irq;
-
- irq = irq_ffs(pending);
-
- if (irq == MIPSCPU_INT_ATLAS)
- atlas_hw0_irqdispatch();
- else if (irq >= 0)
- do_IRQ(MIPS_CPU_IRQ_BASE + irq);
- else
- spurious_interrupt();
-}
-
-static inline void init_atlas_irqs(int base)
-{
- int i;
-
- atlas_hw0_icregs = (struct atlas_ictrl_regs *)
- ioremap(ATLAS_ICTRL_REGS_BASE,
- sizeof(struct atlas_ictrl_regs *));
-
- /*
- * Mask out all interrupt by writing "1" to all bit position in
- * the interrupt reset reg.
- */
- atlas_hw0_icregs->intrsten = 0xffffffff;
-
- for (i = ATLAS_INT_BASE; i <= ATLAS_INT_END; i++)
- set_irq_chip_and_handler(i, &atlas_irq_type, handle_level_irq);
-}
-
-static struct irqaction atlasirq = {
- .handler = no_action,
- .name = "Atlas cascade"
-};
-
-msc_irqmap_t __initdata msc_irqmap[] = {
- {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0},
- {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0},
-};
-int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap);
-
-msc_irqmap_t __initdata msc_eicirqmap[] = {
- {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_ATLAS, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0},
- {MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0}
-};
-int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
-
-void __init arch_init_irq(void)
-{
- init_atlas_irqs(ATLAS_INT_BASE);
-
- if (!cpu_has_veic)
- mips_cpu_irq_init();
-
- switch(mips_revision_corid) {
- case MIPS_REVISION_CORID_CORE_MSC:
- case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_FPGA4:
- case MIPS_REVISION_CORID_CORE_24K:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
- if (cpu_has_veic)
- init_msc_irqs(MSC01E_INT_BASE, MSC01E_INT_BASE,
- msc_eicirqmap, msc_nr_eicirqs);
- else
- init_msc_irqs(MSC01E_INT_BASE, MSC01C_INT_BASE,
- msc_irqmap, msc_nr_irqs);
- }
-
- if (cpu_has_veic) {
- set_vi_handler(MSC01E_INT_ATLAS, atlas_hw0_irqdispatch);
- setup_irq(MSC01E_INT_BASE + MSC01E_INT_ATLAS, &atlasirq);
- } else if (cpu_has_vint) {
- set_vi_handler(MIPSCPU_INT_ATLAS, atlas_hw0_irqdispatch);
-#ifdef CONFIG_MIPS_MT_SMTC
- setup_irq_smtc(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS,
- &atlasirq, (0x100 << MIPSCPU_INT_ATLAS));
-#else /* Not SMTC */
- setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
-#endif /* CONFIG_MIPS_MT_SMTC */
- } else
- setup_irq(MIPS_CPU_IRQ_BASE + MIPSCPU_INT_ATLAS, &atlasirq);
-}
diff --git a/arch/mips/mips-boards/atlas/atlas_setup.c b/arch/mips/mips-boards/atlas/atlas_setup.c
deleted file mode 100644
index 5c50080..0000000
--- a/arch/mips/mips-boards/atlas/atlas_setup.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/atlasint.h>
-#include <asm/time.h>
-#include <asm/traps.h>
-
-static void __init serial_init(void);
-
-const char *get_system_type(void)
-{
- return "MIPS Atlas";
-}
-
-const char display_string[] = " LINUX ON ATLAS ";
-
-void __init plat_mem_setup(void)
-{
- mips_pcibios_init();
-
- ioport_resource.end = 0x7fffffff;
-
- serial_init();
-
-#ifdef CONFIG_KGDB
- kgdb_config();
-#endif
- mips_reboot_setup();
-}
-
-static void __init serial_init(void)
-{
-#ifdef CONFIG_SERIAL_8250
- struct uart_port s;
-
- memset(&s, 0, sizeof(s));
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- s.iobase = ATLAS_UART_REGS_BASE;
-#else
- s.iobase = ATLAS_UART_REGS_BASE+3;
-#endif
- s.irq = ATLAS_INT_UART;
- s.uartclk = ATLAS_BASE_BAUD * 16;
- s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
- s.iotype = UPIO_PORT;
- s.regshift = 3;
-
- if (early_serial_setup(&s) != 0) {
- printk(KERN_ERR "Serial setup failed!\n");
- }
-#endif
-}
diff --git a/arch/mips/mips-boards/generic/Makefile b/arch/mips/mips-boards/generic/Makefile
deleted file mode 100644
index f7f87fc..0000000
--- a/arch/mips/mips-boards/generic/Makefile
+++ /dev/null
@@ -1,29 +0,0 @@
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-# Makefile for the MIPS boards generic routines under Linux.
-#
-
-obj-y := reset.o display.o init.o memory.o \
- cmdline.o time.o
-obj-y += amon.o
-
-obj-$(CONFIG_EARLY_PRINTK) += console.o
-obj-$(CONFIG_PCI) += pci.o
-obj-$(CONFIG_KGDB) += gdb_hook.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/generic/console.c b/arch/mips/mips-boards/generic/console.c
deleted file mode 100644
index 4d8ab99..0000000
--- a/arch/mips/mips-boards/generic/console.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Putting things on the screen/serial line using YAMONs facilities.
- */
-#include <linux/console.h>
-#include <linux/init.h>
-#include <linux/serial_reg.h>
-#include <asm/io.h>
-
-#ifdef CONFIG_MIPS_ATLAS
-#include <asm/mips-boards/atlas.h>
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
-#define PORT(offset) (ATLAS_UART_REGS_BASE + ((offset)<<3))
-#else
-#define PORT(offset) (ATLAS_UART_REGS_BASE + 3 + ((offset)<<3))
-#endif
-
-#elif defined(CONFIG_MIPS_SEAD)
-
-#include <asm/mips-boards/sead.h>
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
-#define PORT(offset) (SEAD_UART0_REGS_BASE + ((offset)<<3))
-#else
-#define PORT(offset) (SEAD_UART0_REGS_BASE + 3 + ((offset)<<3))
-#endif
-
-#else
-
-#define PORT(offset) (0x3f8 + (offset))
-
-#endif
-
-static inline unsigned int serial_in(int offset)
-{
- return inb(PORT(offset));
-}
-
-static inline void serial_out(int offset, int value)
-{
- outb(value, PORT(offset));
-}
-
-int prom_putchar(char c)
-{
- while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
- ;
-
- serial_out(UART_TX, c);
-
- return 1;
-}
diff --git a/arch/mips/mips-boards/generic/display.c b/arch/mips/mips-boards/generic/display.c
deleted file mode 100644
index 2a0057c..0000000
--- a/arch/mips/mips-boards/generic/display.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Display routines for display messages in MIPS boards ascii display.
- */
-
-#include <linux/compiler.h>
-#include <linux/timer.h>
-#include <asm/io.h>
-#include <asm/mips-boards/generic.h>
-
-extern const char display_string[];
-static unsigned int display_count;
-static unsigned int max_display_count;
-
-void mips_display_message(const char *str)
-{
- static unsigned int __iomem *display = NULL;
- int i;
-
- if (unlikely(display == NULL))
- display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int));
-
- for (i = 0; i <= 14; i=i+2) {
- if (*str)
- __raw_writel(*str++, display + i);
- else
- __raw_writel(' ', display + i);
- }
-}
-
-static void scroll_display_message(unsigned long data);
-static DEFINE_TIMER(mips_scroll_timer, scroll_display_message, HZ, 0);
-
-static void scroll_display_message(unsigned long data)
-{
- mips_display_message(&display_string[display_count++]);
- if (display_count == max_display_count)
- display_count = 0;
-
- mod_timer(&mips_scroll_timer, jiffies + HZ);
-}
-
-void mips_scroll_message(void)
-{
- del_timer_sync(&mips_scroll_timer);
- max_display_count = strlen(display_string) + 1 - 8;
- mod_timer(&mips_scroll_timer, jiffies + 1);
-}
diff --git a/arch/mips/mips-boards/generic/init.c b/arch/mips/mips-boards/generic/init.c
deleted file mode 100644
index 83b9dc7..0000000
--- a/arch/mips/mips-boards/generic/init.c
+++ /dev/null
@@ -1,436 +0,0 @@
-/*
- * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
- * All rights reserved.
- * Authors: Carsten Langgaard <carstenl@mips.com>
- * Maciej W. Rozycki <macro@mips.com>
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * PROM library initialisation code.
- */
-#include <linux/init.h>
-#include <linux/string.h>
-#include <linux/kernel.h>
-
-#include <asm/bootinfo.h>
-#include <asm/gt64120.h>
-#include <asm/io.h>
-#include <asm/system.h>
-#include <asm/cacheflush.h>
-#include <asm/traps.h>
-
-#include <asm/mips-boards/prom.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/bonito64.h>
-#include <asm/mips-boards/msc01_pci.h>
-
-#include <asm/mips-boards/malta.h>
-
-#ifdef CONFIG_KGDB
-extern int rs_kgdb_hook(int, int);
-extern int rs_putDebugChar(char);
-extern char rs_getDebugChar(void);
-extern int saa9730_kgdb_hook(int);
-extern int saa9730_putDebugChar(char);
-extern char saa9730_getDebugChar(void);
-#endif
-
-int prom_argc;
-int *_prom_argv, *_prom_envp;
-
-/*
- * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
- * This macro take care of sign extension, if running in 64-bit mode.
- */
-#define prom_envp(index) ((char *)(long)_prom_envp[(index)])
-
-int init_debug = 0;
-
-int mips_revision_corid;
-int mips_revision_sconid;
-
-/* Bonito64 system controller register base. */
-unsigned long _pcictrl_bonito;
-unsigned long _pcictrl_bonito_pcicfg;
-
-/* GT64120 system controller register base */
-unsigned long _pcictrl_gt64120;
-
-/* MIPS System controller register base */
-unsigned long _pcictrl_msc;
-
-char *prom_getenv(char *envname)
-{
- /*
- * Return a pointer to the given environment variable.
- * In 64-bit mode: we're using 64-bit pointers, but all pointers
- * in the PROM structures are only 32-bit, so we need some
- * workarounds, if we are running in 64-bit mode.
- */
- int i, index=0;
-
- i = strlen(envname);
-
- while (prom_envp(index)) {
- if(strncmp(envname, prom_envp(index), i) == 0) {
- return(prom_envp(index+1));
- }
- index += 2;
- }
-
- return NULL;
-}
-
-static inline unsigned char str2hexnum(unsigned char c)
-{
- if (c >= '0' && c <= '9')
- return c - '0';
- if (c >= 'a' && c <= 'f')
- return c - 'a' + 10;
- return 0; /* foo */
-}
-
-static inline void str2eaddr(unsigned char *ea, unsigned char *str)
-{
- int i;
-
- for (i = 0; i < 6; i++) {
- unsigned char num;
-
- if((*str == '.') || (*str == ':'))
- str++;
- num = str2hexnum(*str++) << 4;
- num |= (str2hexnum(*str++));
- ea[i] = num;
- }
-}
-
-int get_ethernet_addr(char *ethernet_addr)
-{
- char *ethaddr_str;
-
- ethaddr_str = prom_getenv("ethaddr");
- if (!ethaddr_str) {
- printk("ethaddr not set in boot prom\n");
- return -1;
- }
- str2eaddr(ethernet_addr, ethaddr_str);
-
- if (init_debug > 1) {
- int i;
- printk("get_ethernet_addr: ");
- for (i=0; i<5; i++)
- printk("%02x:", (unsigned char)*(ethernet_addr+i));
- printk("%02x\n", *(ethernet_addr+i));
- }
-
- return 0;
-}
-
-#ifdef CONFIG_SERIAL_8250_CONSOLE
-static void __init console_config(void)
-{
- char console_string[40];
- int baud = 0;
- char parity = '\0', bits = '\0', flow = '\0';
- char *s;
-
- if ((strstr(prom_getcmdline(), "console=")) == NULL) {
- s = prom_getenv("modetty0");
- if (s) {
- while (*s >= '0' && *s <= '9')
- baud = baud*10 + *s++ - '0';
- if (*s == ',') s++;
- if (*s) parity = *s++;
- if (*s == ',') s++;
- if (*s) bits = *s++;
- if (*s == ',') s++;
- if (*s == 'h') flow = 'r';
- }
- if (baud == 0)
- baud = 38400;
- if (parity != 'n' && parity != 'o' && parity != 'e')
- parity = 'n';
- if (bits != '7' && bits != '8')
- bits = '8';
- if (flow == '\0')
- flow = 'r';
- sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
- strcat(prom_getcmdline(), console_string);
- pr_info("Config serial console:%s\n", console_string);
- }
-}
-#endif
-
-#ifdef CONFIG_KGDB
-void __init kgdb_config(void)
-{
- extern int (*generic_putDebugChar)(char);
- extern char (*generic_getDebugChar)(void);
- char *argptr;
- int line, speed;
-
- argptr = prom_getcmdline();
- if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
- argptr += strlen("kgdb=ttyS");
- if (*argptr != '0' && *argptr != '1')
- printk("KGDB: Unknown serial line /dev/ttyS%c, "
- "falling back to /dev/ttyS1\n", *argptr);
- line = *argptr == '0' ? 0 : 1;
- printk("KGDB: Using serial line /dev/ttyS%d for session\n", line);
-
- speed = 0;
- if (*++argptr == ',')
- {
- int c;
- while ((c = *++argptr) && ('0' <= c && c <= '9'))
- speed = speed * 10 + c - '0';
- }
-#ifdef CONFIG_MIPS_ATLAS
- if (line == 1) {
- speed = saa9730_kgdb_hook(speed);
- generic_putDebugChar = saa9730_putDebugChar;
- generic_getDebugChar = saa9730_getDebugChar;
- }
- else
-#endif
- {
- speed = rs_kgdb_hook(line, speed);
- generic_putDebugChar = rs_putDebugChar;
- generic_getDebugChar = rs_getDebugChar;
- }
-
- pr_info("KGDB: Using serial line /dev/ttyS%d at %d for "
- "session, please connect your debugger\n",
- line ? 1 : 0, speed);
-
- {
- char *s;
- for (s = "Please connect GDB to this port\r\n"; *s; )
- generic_putDebugChar(*s++);
- }
-
- /* Breakpoint is invoked after interrupts are initialised */
- }
-}
-#endif
-
-static void __init mips_nmi_setup(void)
-{
- void *base;
- extern char except_vec_nmi;
-
- base = cpu_has_veic ?
- (void *)(CAC_BASE + 0xa80) :
- (void *)(CAC_BASE + 0x380);
- memcpy(base, &except_vec_nmi, 0x80);
- flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
-}
-
-static void __init mips_ejtag_setup(void)
-{
- void *base;
- extern char except_vec_ejtag_debug;
-
- base = cpu_has_veic ?
- (void *)(CAC_BASE + 0xa00) :
- (void *)(CAC_BASE + 0x300);
- memcpy(base, &except_vec_ejtag_debug, 0x80);
- flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
-}
-
-extern struct plat_smp_ops msmtc_smp_ops;
-
-void __init prom_init(void)
-{
- prom_argc = fw_arg0;
- _prom_argv = (int *) fw_arg1;
- _prom_envp = (int *) fw_arg2;
-
- mips_display_message("LINUX");
-
-#ifdef CONFIG_MIPS_SEAD
- set_io_port_base(KSEG1);
-#else
- /*
- * early setup of _pcictrl_bonito so that we can determine
- * the system controller on a CORE_EMUL board
- */
- _pcictrl_bonito = (unsigned long)ioremap(BONITO_REG_BASE, BONITO_REG_SIZE);
-
- mips_revision_corid = MIPS_REVISION_CORID;
-
- if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) {
- if (BONITO_PCIDID == 0x0001df53 ||
- BONITO_PCIDID == 0x0003df53)
- mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON;
- else
- mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_MSC;
- }
-
- mips_revision_sconid = MIPS_REVISION_SCONID;
- if (mips_revision_sconid == MIPS_REVISION_SCON_OTHER) {
- switch (mips_revision_corid) {
- case MIPS_REVISION_CORID_QED_RM5261:
- case MIPS_REVISION_CORID_CORE_LV:
- case MIPS_REVISION_CORID_CORE_FPGA:
- case MIPS_REVISION_CORID_CORE_FPGAR2:
- mips_revision_sconid = MIPS_REVISION_SCON_GT64120;
- break;
- case MIPS_REVISION_CORID_CORE_EMUL_BON:
- case MIPS_REVISION_CORID_BONITO64:
- case MIPS_REVISION_CORID_CORE_20K:
- mips_revision_sconid = MIPS_REVISION_SCON_BONITO;
- break;
- case MIPS_REVISION_CORID_CORE_MSC:
- case MIPS_REVISION_CORID_CORE_FPGA2:
- case MIPS_REVISION_CORID_CORE_24K:
- /*
- * SOCit/ROCit support is essentially identical
- * but make an attempt to distinguish them
- */
- mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
- break;
- case MIPS_REVISION_CORID_CORE_FPGA3:
- case MIPS_REVISION_CORID_CORE_FPGA4:
- case MIPS_REVISION_CORID_CORE_FPGA5:
- case MIPS_REVISION_CORID_CORE_EMUL_MSC:
- default:
- /* See above */
- mips_revision_sconid = MIPS_REVISION_SCON_ROCIT;
- break;
- }
- }
-
- switch (mips_revision_sconid) {
- u32 start, map, mask, data;
-
- case MIPS_REVISION_SCON_GT64120:
- /*
- * Setup the North bridge to do Master byte-lane swapping
- * when running in bigendian.
- */
- _pcictrl_gt64120 = (unsigned long)ioremap(MIPS_GT_BASE, 0x2000);
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
- GT_PCI0_CMD_SBYTESWAP_BIT);
-#else
- GT_WRITE(GT_PCI0_CMD_OFS, 0);
-#endif
- /* Fix up PCI I/O mapping if necessary (for Atlas). */
- start = GT_READ(GT_PCI0IOLD_OFS);
- map = GT_READ(GT_PCI0IOREMAP_OFS);
- if ((start & map) != 0) {
- map &= ~start;
- GT_WRITE(GT_PCI0IOREMAP_OFS, map);
- }
-
- set_io_port_base(MALTA_GT_PORT_BASE);
- break;
-
- case MIPS_REVISION_SCON_BONITO:
- _pcictrl_bonito_pcicfg = (unsigned long)ioremap(BONITO_PCICFG_BASE, BONITO_PCICFG_SIZE);
-
- /*
- * Disable Bonito IOBC.
- */
- BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
- ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
- BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
-
- /*
- * Setup the North bridge to do Master byte-lane swapping
- * when running in bigendian.
- */
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- BONITO_BONGENCFG = BONITO_BONGENCFG &
- ~(BONITO_BONGENCFG_MSTRBYTESWAP |
- BONITO_BONGENCFG_BYTESWAP);
-#else
- BONITO_BONGENCFG = BONITO_BONGENCFG |
- BONITO_BONGENCFG_MSTRBYTESWAP |
- BONITO_BONGENCFG_BYTESWAP;
-#endif
-
- set_io_port_base(MALTA_BONITO_PORT_BASE);
- break;
-
- case MIPS_REVISION_SCON_SOCIT:
- case MIPS_REVISION_SCON_ROCIT:
- _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
- mips_pci_controller:
- mb();
- MSC_READ(MSC01_PCI_CFG, data);
- MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT);
- wmb();
-
- /* Fix up lane swapping. */
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
-#else
- MSC_WRITE(MSC01_PCI_SWAP,
- MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF |
- MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
- MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
-#endif
- /* Fix up target memory mapping. */
- MSC_READ(MSC01_PCI_BAR0, mask);
- MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
-
- /* Don't handle target retries indefinitely. */
- if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
- MSC01_PCI_CFG_MAXRTRY_MSK)
- data = (data & ~(MSC01_PCI_CFG_MAXRTRY_MSK <<
- MSC01_PCI_CFG_MAXRTRY_SHF)) |
- ((MSC01_PCI_CFG_MAXRTRY_MSK - 1) <<
- MSC01_PCI_CFG_MAXRTRY_SHF);
-
- wmb();
- MSC_WRITE(MSC01_PCI_CFG, data);
- mb();
-
- set_io_port_base(MALTA_MSC_PORT_BASE);
- break;
-
- case MIPS_REVISION_SCON_SOCITSC:
- case MIPS_REVISION_SCON_SOCITSCP:
- _pcictrl_msc = (unsigned long)ioremap(MIPS_SOCITSC_PCI_REG_BASE, 0x2000);
- goto mips_pci_controller;
-
- default:
- /* Unknown system controller */
- mips_display_message("SC Error");
- while (1); /* We die here... */
- }
-#endif
- board_nmi_handler_setup = mips_nmi_setup;
- board_ejtag_handler_setup = mips_ejtag_setup;
-
- pr_info("\nLINUX started...\n");
- prom_init_cmdline();
- prom_meminit();
-#ifdef CONFIG_SERIAL_8250_CONSOLE
- console_config();
-#endif
-#ifdef CONFIG_MIPS_CMP
- register_smp_ops(&cmp_smp_ops);
-#endif
-#ifdef CONFIG_MIPS_MT_SMP
- register_smp_ops(&vsmp_smp_ops);
-#endif
-#ifdef CONFIG_MIPS_MT_SMTC
- register_smp_ops(&msmtc_smp_ops);
-#endif
-}
diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c
deleted file mode 100644
index 5e443bb..0000000
--- a/arch/mips/mips-boards/generic/memory.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * PROM library functions for acquiring/using memory descriptors given to
- * us from the YAMON.
- */
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/bootmem.h>
-#include <linux/pfn.h>
-#include <linux/string.h>
-
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/sections.h>
-
-#include <asm/mips-boards/prom.h>
-
-/*#define DEBUG*/
-
-enum yamon_memtypes {
- yamon_dontuse,
- yamon_prom,
- yamon_free,
-};
-static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
-
-#ifdef DEBUG
-static char *mtypes[3] = {
- "Dont use memory",
- "YAMON PROM memory",
- "Free memmory",
-};
-#endif
-
-/* determined physical memory size, not overridden by command line args */
-unsigned long physical_memsize = 0L;
-
-static struct prom_pmemblock * __init prom_getmdesc(void)
-{
- char *memsize_str;
- unsigned int memsize;
- char cmdline[CL_SIZE], *ptr;
-
- /* otherwise look in the environment */
- memsize_str = prom_getenv("memsize");
- if (!memsize_str) {
- printk(KERN_WARNING
- "memsize not set in boot prom, set to default (32Mb)\n");
- physical_memsize = 0x02000000;
- } else {
-#ifdef DEBUG
- pr_debug("prom_memsize = %s\n", memsize_str);
-#endif
- physical_memsize = simple_strtol(memsize_str, NULL, 0);
- }
-
-#ifdef CONFIG_CPU_BIG_ENDIAN
- /* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last
- word of physical memory */
- physical_memsize -= PAGE_SIZE;
-#endif
-
- /* Check the command line for a memsize directive that overrides
- the physical/default amount */
- strcpy(cmdline, arcs_cmdline);
- ptr = strstr(cmdline, "memsize=");
- if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
- ptr = strstr(ptr, " memsize=");
-
- if (ptr)
- memsize = memparse(ptr + 8, &ptr);
- else
- memsize = physical_memsize;
-
- memset(mdesc, 0, sizeof(mdesc));
-
- mdesc[0].type = yamon_dontuse;
- mdesc[0].base = 0x00000000;
- mdesc[0].size = 0x00001000;
-
- mdesc[1].type = yamon_prom;
- mdesc[1].base = 0x00001000;
- mdesc[1].size = 0x000ef000;
-
-#ifdef CONFIG_MIPS_MALTA
- /*
- * The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
- * south bridge and PCI access always forwarded to the ISA Bus and
- * BIOSCS# is always generated.
- * This mean that this area can't be used as DMA memory for PCI
- * devices.
- */
- mdesc[2].type = yamon_dontuse;
- mdesc[2].base = 0x000f0000;
- mdesc[2].size = 0x00010000;
-#else
- mdesc[2].type = yamon_prom;
- mdesc[2].base = 0x000f0000;
- mdesc[2].size = 0x00010000;
-#endif
-
- mdesc[3].type = yamon_dontuse;
- mdesc[3].base = 0x00100000;
- mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) - mdesc[3].base;
-
- mdesc[4].type = yamon_free;
- mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end));
- mdesc[4].size = memsize - mdesc[4].base;
-
- return &mdesc[0];
-}
-
-static int __init prom_memtype_classify(unsigned int type)
-{
- switch (type) {
- case yamon_free:
- return BOOT_MEM_RAM;
- case yamon_prom:
- return BOOT_MEM_ROM_DATA;
- default:
- return BOOT_MEM_RESERVED;
- }
-}
-
-void __init prom_meminit(void)
-{
- struct prom_pmemblock *p;
-
-#ifdef DEBUG
- pr_debug("YAMON MEMORY DESCRIPTOR dump:\n");
- p = prom_getmdesc();
- while (p->size) {
- int i = 0;
- pr_debug("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n",
- i, p, p->base, p->size, mtypes[p->type]);
- p++;
- i++;
- }
-#endif
- p = prom_getmdesc();
-
- while (p->size) {
- long type;
- unsigned long base, size;
-
- type = prom_memtype_classify(p->type);
- base = p->base;
- size = p->size;
-
- add_memory_region(base, size, type);
- p++;
- }
-}
-
-void __init prom_free_prom_memory(void)
-{
- unsigned long addr;
- int i;
-
- for (i = 0; i < boot_mem_map.nr_map; i++) {
- if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
- continue;
-
- addr = boot_mem_map.map[i].addr;
- free_init_pages("prom memory",
- addr, addr + boot_mem_map.map[i].size);
- }
-}
diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c
deleted file mode 100644
index 583d468..0000000
--- a/arch/mips/mips-boards/generic/reset.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * ########################################################################
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * ########################################################################
- *
- * Reset the MIPS boards.
- *
- */
-#include <linux/pm.h>
-
-#include <asm/io.h>
-#include <asm/reboot.h>
-#include <asm/mips-boards/generic.h>
-#if defined(CONFIG_MIPS_ATLAS)
-#include <asm/mips-boards/atlas.h>
-#endif
-
-static void mips_machine_restart(char *command);
-static void mips_machine_halt(void);
-#if defined(CONFIG_MIPS_ATLAS)
-static void atlas_machine_power_off(void);
-#endif
-
-static void mips_machine_restart(char *command)
-{
- unsigned int __iomem *softres_reg =
- ioremap(SOFTRES_REG, sizeof(unsigned int));
-
- __raw_writel(GORESET, softres_reg);
-}
-
-static void mips_machine_halt(void)
-{
- unsigned int __iomem *softres_reg =
- ioremap(SOFTRES_REG, sizeof(unsigned int));
-
- __raw_writel(GORESET, softres_reg);
-}
-
-#if defined(CONFIG_MIPS_ATLAS)
-static void atlas_machine_power_off(void)
-{
- unsigned int __iomem *psustby_reg = ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
-
- writew(ATLAS_GOSTBY, psustby_reg);
-}
-#endif
-
-void mips_reboot_setup(void)
-{
- _machine_restart = mips_machine_restart;
- _machine_halt = mips_machine_halt;
-#if defined(CONFIG_MIPS_ATLAS)
- pm_power_off = atlas_machine_power_off;
-#endif
-#if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_SEAD)
- pm_power_off = mips_machine_halt;
-#endif
-}
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
deleted file mode 100644
index fe2cac1..0000000
--- a/arch/mips/mips-boards/generic/time.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Setting up the clock on the MIPS boards.
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/kernel_stat.h>
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/mc146818rtc.h>
-
-#include <asm/mipsregs.h>
-#include <asm/mipsmtregs.h>
-#include <asm/hardirq.h>
-#include <asm/i8253.h>
-#include <asm/irq.h>
-#include <asm/div64.h>
-#include <asm/cpu.h>
-#include <asm/time.h>
-#include <asm/mc146818-time.h>
-#include <asm/msc01_ic.h>
-
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-
-#ifdef CONFIG_MIPS_ATLAS
-#include <asm/mips-boards/atlasint.h>
-#endif
-#ifdef CONFIG_MIPS_MALTA
-#include <asm/mips-boards/maltaint.h>
-#endif
-#ifdef CONFIG_MIPS_SEAD
-#include <asm/mips-boards/seadint.h>
-#endif
-
-unsigned long cpu_khz;
-
-static int mips_cpu_timer_irq;
-static int mips_cpu_perf_irq;
-extern int cp0_perfcount_irq;
-
-static void mips_timer_dispatch(void)
-{
- do_IRQ(mips_cpu_timer_irq);
-}
-
-static void mips_perf_dispatch(void)
-{
- do_IRQ(mips_cpu_perf_irq);
-}
-
-/*
- * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
- */
-static unsigned int __init estimate_cpu_frequency(void)
-{
- unsigned int prid = read_c0_prid() & 0xffff00;
- unsigned int count;
-
-#if defined(CONFIG_MIPS_SEAD) || defined(CONFIG_MIPS_SIM)
- /*
- * The SEAD board doesn't have a real time clock, so we can't
- * really calculate the timer frequency
- * For now we hardwire the SEAD board frequency to 12MHz.
- */
-
- if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) ||
- (prid == (PRID_COMP_MIPS | PRID_IMP_25KF)))
- count = 12000000;
- else
- count = 6000000;
-#endif
-#if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
- unsigned long flags;
- unsigned int start;
-
- local_irq_save(flags);
-
- /* Start counter exactly on falling edge of update flag */
- while (CMOS_READ(RTC_REG_A) & RTC_UIP);
- while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
-
- /* Start r4k counter. */
- start = read_c0_count();
-
- /* Read counter exactly on falling edge of update flag */
- while (CMOS_READ(RTC_REG_A) & RTC_UIP);
- while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
-
- count = read_c0_count() - start;
-
- /* restore interrupts */
- local_irq_restore(flags);
-#endif
-
- mips_hpt_frequency = count;
- if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
- (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
- count *= 2;
-
- count += 5000; /* round */
- count -= count%10000;
-
- return count;
-}
-
-unsigned long read_persistent_clock(void)
-{
- return mc146818_get_cmos_time();
-}
-
-static void __init plat_perf_setup(void)
-{
-#ifdef MSC01E_INT_BASE
- if (cpu_has_veic) {
- set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
- mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
- } else
-#endif
- if (cp0_perfcount_irq >= 0) {
- if (cpu_has_vint)
- set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
- mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
-#ifdef CONFIG_SMP
- set_irq_handler(mips_cpu_perf_irq, handle_percpu_irq);
-#endif
- }
-}
-
-unsigned int __cpuinit get_c0_compare_int(void)
-{
-#ifdef MSC01E_INT_BASE
- if (cpu_has_veic) {
- set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
- mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
- } else
-#endif
- {
- if (cpu_has_vint)
- set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
- mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
- }
-
- return mips_cpu_timer_irq;
-}
-
-void __init plat_time_init(void)
-{
- unsigned int est_freq;
-
- /* Set Data mode - binary. */
- CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
-
- est_freq = estimate_cpu_frequency();
-
- printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
- (est_freq%1000000)*100/1000000);
-
- cpu_khz = est_freq / 1000;
-
- mips_scroll_message();
-#ifdef CONFIG_I8253 /* Only Malta has a PIT */
- setup_pit_timer();
-#endif
-
- plat_perf_setup();
-}
diff --git a/arch/mips/mips-boards/malta/Makefile b/arch/mips/mips-boards/malta/Makefile
deleted file mode 100644
index db4ad65..0000000
--- a/arch/mips/mips-boards/malta/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-# Makefile for the MIPS Malta specific kernel interface routines
-# under Linux.
-#
-
-obj-y := malta_int.o malta_mtd.o malta_platform.o malta_setup.o
-
-# FIXME FIXME FIXME
-obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
deleted file mode 100644
index 8c49510..0000000
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ /dev/null
@@ -1,709 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
- * Copyright (C) 2001 Ralf Baechle
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Routines for generic manipulation of the interrupts found on the MIPS
- * Malta board.
- * The interrupt controller is located in the South Bridge a PIIX4 device
- * with two internal 82C95 interrupt controllers.
- */
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/sched.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/kernel_stat.h>
-#include <linux/kernel.h>
-#include <linux/random.h>
-
-#include <asm/traps.h>
-#include <asm/i8259.h>
-#include <asm/irq_cpu.h>
-#include <asm/irq_regs.h>
-#include <asm/mips-boards/malta.h>
-#include <asm/mips-boards/maltaint.h>
-#include <asm/mips-boards/piix4.h>
-#include <asm/gt64120.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/msc01_pci.h>
-#include <asm/msc01_ic.h>
-#include <asm/gic.h>
-#include <asm/gcmpregs.h>
-
-int gcmp_present = -1;
-int gic_present;
-static unsigned long _msc01_biu_base;
-static unsigned long _gcmp_base;
-static unsigned int ipi_map[NR_CPUS];
-
-static DEFINE_SPINLOCK(mips_irq_lock);
-
-static inline int mips_pcibios_iack(void)
-{
- int irq;
- u32 dummy;
-
- /*
- * Determine highest priority pending interrupt by performing
- * a PCI Interrupt Acknowledge cycle.
- */
- switch (mips_revision_sconid) {
- case MIPS_REVISION_SCON_SOCIT:
- case MIPS_REVISION_SCON_ROCIT:
- case MIPS_REVISION_SCON_SOCITSC:
- case MIPS_REVISION_SCON_SOCITSCP:
- MSC_READ(MSC01_PCI_IACK, irq);
- irq &= 0xff;
- break;
- case MIPS_REVISION_SCON_GT64120:
- irq = GT_READ(GT_PCI0_IACK_OFS);
- irq &= 0xff;
- break;
- case MIPS_REVISION_SCON_BONITO:
- /* The following will generate a PCI IACK cycle on the
- * Bonito controller. It's a little bit kludgy, but it
- * was the easiest way to implement it in hardware at
- * the given time.
- */
- BONITO_PCIMAP_CFG = 0x20000;
-
- /* Flush Bonito register block */
- dummy = BONITO_PCIMAP_CFG;
- iob(); /* sync */
-
- irq = readl((u32 *)_pcictrl_bonito_pcicfg);
- iob(); /* sync */
- irq &= 0xff;
- BONITO_PCIMAP_CFG = 0;
- break;
- default:
- printk(KERN_WARNING "Unknown system controller.\n");
- return -1;
- }
- return irq;
-}
-
-static inline int get_int(void)
-{
- unsigned long flags;
- int irq;
- spin_lock_irqsave(&mips_irq_lock, flags);
-
- irq = mips_pcibios_iack();
-
- /*
- * The only way we can decide if an interrupt is spurious
- * is by checking the 8259 registers. This needs a spinlock
- * on an SMP system, so leave it up to the generic code...
- */
-
- spin_unlock_irqrestore(&mips_irq_lock, flags);
-
- return irq;
-}
-
-static void malta_hw0_irqdispatch(void)
-{
- int irq;
-
- irq = get_int();
- if (irq < 0) {
- /* interrupt has already been cleared */
- return;
- }
-
- do_IRQ(MALTA_INT_BASE + irq);
-}
-
-static void malta_ipi_irqdispatch(void)
-{
- int irq;
-
- irq = gic_get_int();
- if (irq < 0)
- return; /* interrupt has already been cleared */
-
- do_IRQ(MIPS_GIC_IRQ_BASE + irq);
-}
-
-static void corehi_irqdispatch(void)
-{
- unsigned int intedge, intsteer, pcicmd, pcibadaddr;
- unsigned int pcimstat, intisr, inten, intpol;
- unsigned int intrcause, datalo, datahi;
- struct pt_regs *regs = get_irq_regs();
-
- printk(KERN_EMERG "CoreHI interrupt, shouldn't happen, we die here!\n");
- printk(KERN_EMERG "epc : %08lx\nStatus: %08lx\n"
- "Cause : %08lx\nbadVaddr : %08lx\n",
- regs->cp0_epc, regs->cp0_status,
- regs->cp0_cause, regs->cp0_badvaddr);
-
- /* Read all the registers and then print them as there is a
- problem with interspersed printk's upsetting the Bonito controller.
- Do it for the others too.
- */
-
- switch (mips_revision_sconid) {
- case MIPS_REVISION_SCON_SOCIT:
- case MIPS_REVISION_SCON_ROCIT:
- case MIPS_REVISION_SCON_SOCITSC:
- case MIPS_REVISION_SCON_SOCITSCP:
- ll_msc_irq();
- break;
- case MIPS_REVISION_SCON_GT64120:
- intrcause = GT_READ(GT_INTRCAUSE_OFS);
- datalo = GT_READ(GT_CPUERR_ADDRLO_OFS);
- datahi = GT_READ(GT_CPUERR_ADDRHI_OFS);
- printk(KERN_EMERG "GT_INTRCAUSE = %08x\n", intrcause);
- printk(KERN_EMERG "GT_CPUERR_ADDR = %02x%08x\n",
- datahi, datalo);
- break;
- case MIPS_REVISION_SCON_BONITO:
- pcibadaddr = BONITO_PCIBADADDR;
- pcimstat = BONITO_PCIMSTAT;
- intisr = BONITO_INTISR;
- inten = BONITO_INTEN;
- intpol = BONITO_INTPOL;
- intedge = BONITO_INTEDGE;
- intsteer = BONITO_INTSTEER;
- pcicmd = BONITO_PCICMD;
- printk(KERN_EMERG "BONITO_INTISR = %08x\n", intisr);
- printk(KERN_EMERG "BONITO_INTEN = %08x\n", inten);
- printk(KERN_EMERG "BONITO_INTPOL = %08x\n", intpol);
- printk(KERN_EMERG "BONITO_INTEDGE = %08x\n", intedge);
- printk(KERN_EMERG "BONITO_INTSTEER = %08x\n", intsteer);
- printk(KERN_EMERG "BONITO_PCICMD = %08x\n", pcicmd);
- printk(KERN_EMERG "BONITO_PCIBADADDR = %08x\n", pcibadaddr);
- printk(KERN_EMERG "BONITO_PCIMSTAT = %08x\n", pcimstat);
- break;
- }
-
- die("CoreHi interrupt", regs);
-}
-
-static inline int clz(unsigned long x)
-{
- __asm__(
- " .set push \n"
- " .set mips32 \n"
- " clz %0, %1 \n"
- " .set pop \n"
- : "=r" (x)
- : "r" (x));
-
- return x;
-}
-
-/*
- * Version of ffs that only looks at bits 12..15.
- */
-static inline unsigned int irq_ffs(unsigned int pending)
-{
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
- return -clz(pending) + 31 - CAUSEB_IP;
-#else
- unsigned int a0 = 7;
- unsigned int t0;
-
- t0 = pending & 0xf000;
- t0 = t0 < 1;
- t0 = t0 << 2;
- a0 = a0 - t0;
- pending = pending << t0;
-
- t0 = pending & 0xc000;
- t0 = t0 < 1;
- t0 = t0 << 1;
- a0 = a0 - t0;
- pending = pending << t0;
-
- t0 = pending & 0x8000;
- t0 = t0 < 1;
- /* t0 = t0 << 2; */
- a0 = a0 - t0;
- /* pending = pending << t0; */
-
- return a0;
-#endif
-}
-
-/*
- * IRQs on the Malta board look basically (barring software IRQs which we
- * don't use at all and all external interrupt sources are combined together
- * on hardware interrupt 0 (MIPS IRQ 2)) like:
- *
- * MIPS IRQ Source
- * -------- ------
- * 0 Software (ignored)
- * 1 Software (ignored)
- * 2 Combined hardware interrupt (hw0)
- * 3 Hardware (ignored)
- * 4 Hardware (ignored)
- * 5 Hardware (ignored)
- * 6 Hardware (ignored)
- * 7 R4k timer (what we use)
- *
- * We handle the IRQ according to _our_ priority which is:
- *
- * Highest ---- R4k Timer
- * Lowest ---- Combined hardware interrupt
- *
- * then we just return, if multiple IRQs are pending then we will just take
- * another exception, big deal.
- */
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
- int irq;
-
- irq = irq_ffs(pending);
-
- if (irq == MIPSCPU_INT_I8259A)
- malta_hw0_irqdispatch();
- else if (gic_present && ((1 << irq) & ipi_map[smp_processor_id()]))
- malta_ipi_irqdispatch();
- else if (irq >= 0)
- do_IRQ(MIPS_CPU_IRQ_BASE + irq);
- else
- spurious_interrupt();
-}
-
-#ifdef CONFIG_MIPS_MT_SMP
-
-
-#define GIC_MIPS_CPU_IPI_RESCHED_IRQ 3
-#define GIC_MIPS_CPU_IPI_CALL_IRQ 4
-
-#define MIPS_CPU_IPI_RESCHED_IRQ 0 /* SW int 0 for resched */
-#define C_RESCHED C_SW0
-#define MIPS_CPU_IPI_CALL_IRQ 1 /* SW int 1 for resched */
-#define C_CALL C_SW1
-static int cpu_ipi_resched_irq, cpu_ipi_call_irq;
-
-static void ipi_resched_dispatch(void)
-{
- do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
-}
-
-static void ipi_call_dispatch(void)
-{
- do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ);
-}
-
-static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
-{
- return IRQ_HANDLED;
-}
-
-static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
-{
- smp_call_function_interrupt();
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction irq_resched = {
- .handler = ipi_resched_interrupt,
- .flags = IRQF_DISABLED|IRQF_PERCPU,
- .name = "IPI_resched"
-};
-
-static struct irqaction irq_call = {
- .handler = ipi_call_interrupt,
- .flags = IRQF_DISABLED|IRQF_PERCPU,
- .name = "IPI_call"
-};
-#endif /* CONFIG_MIPS_MT_SMP */
-
-static struct irqaction i8259irq = {
- .handler = no_action,
- .name = "XT-PIC cascade"
-};
-
-static struct irqaction corehi_irqaction = {
- .handler = no_action,
- .name = "CoreHi"
-};
-
-static msc_irqmap_t __initdata msc_irqmap[] = {
- {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0},
- {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0},
-};
-static int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap);
-
-static msc_irqmap_t __initdata msc_eicirqmap[] = {
- {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_I8259A, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_SMI, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_COREHI, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_CORELO, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0},
- {MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0},
- {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0}
-};
-
-static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
-
-/*
- * This GIC specific tabular array defines the association between External
- * Interrupts and CPUs/Core Interrupts. The nature of the External
- * Interrupts is also defined here - polarity/trigger.
- */
-static struct gic_intr_map gic_intr_map[] = {
- { GIC_EXT_INTR(0), X, X, X, X, 0 },
- { GIC_EXT_INTR(1), X, X, X, X, 0 },
- { GIC_EXT_INTR(2), X, X, X, X, 0 },
- { GIC_EXT_INTR(3), 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(4), 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(5), 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(6), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(7), 0, GIC_CPU_INT4, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(8), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(9), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(10), X, X, X, X, 0 },
- { GIC_EXT_INTR(11), X, X, X, X, 0 },
- { GIC_EXT_INTR(12), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(13), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(14), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
- { GIC_EXT_INTR(15), X, X, X, X, 0 },
- { GIC_EXT_INTR(16), 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
- { GIC_EXT_INTR(17), 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
- { GIC_EXT_INTR(18), 1, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
- { GIC_EXT_INTR(19), 1, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
- { GIC_EXT_INTR(20), 2, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
- { GIC_EXT_INTR(21), 2, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
- { GIC_EXT_INTR(22), 3, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
- { GIC_EXT_INTR(23), 3, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
-};
-
-/*
- * GCMP needs to be detected before any SMP initialisation
- */
-int __init gcmp_probe(unsigned long addr, unsigned long size)
-{
- if (gcmp_present >= 0)
- return gcmp_present;
-
- _gcmp_base = (unsigned long) ioremap_nocache(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ);
- _msc01_biu_base = (unsigned long) ioremap_nocache(MSC01_BIU_REG_BASE, MSC01_BIU_ADDRSPACE_SZ);
- gcmp_present = (GCMPGCB(GCMPB) & GCMP_GCB_GCMPB_GCMPBASE_MSK) == GCMP_BASE_ADDR;
-
- if (gcmp_present)
- printk(KERN_DEBUG "GCMP present\n");
- return gcmp_present;
-}
-
-void __init fill_ipi_map(void)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(gic_intr_map); i++) {
- if (gic_intr_map[i].ipiflag && (gic_intr_map[i].cpunum != X))
- ipi_map[gic_intr_map[i].cpunum] |=
- (1 << (gic_intr_map[i].pin + 2));
- }
-}
-
-void __init arch_init_irq(void)
-{
- int gic_present, gcmp_present;
-
- init_i8259_irqs();
-
- if (!cpu_has_veic)
- mips_cpu_irq_init();
-
- gcmp_present = gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ);
- if (gcmp_present) {
- GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK;
- gic_present = 1;
- } else {
- _msc01_biu_base = (unsigned long) ioremap_nocache(MSC01_BIU_REG_BASE, MSC01_BIU_ADDRSPACE_SZ);
- gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) &
- MSC01_SC_CFG_GICPRES_MSK) >> MSC01_SC_CFG_GICPRES_SHF;
- }
- if (gic_present)
- printk(KERN_DEBUG "GIC present\n");
-
- switch (mips_revision_sconid) {
- case MIPS_REVISION_SCON_SOCIT:
- case MIPS_REVISION_SCON_ROCIT:
- if (cpu_has_veic)
- init_msc_irqs(MIPS_MSC01_IC_REG_BASE,
- MSC01E_INT_BASE, msc_eicirqmap,
- msc_nr_eicirqs);
- else
- init_msc_irqs(MIPS_MSC01_IC_REG_BASE,
- MSC01C_INT_BASE, msc_irqmap,
- msc_nr_irqs);
- break;
-
- case MIPS_REVISION_SCON_SOCITSC:
- case MIPS_REVISION_SCON_SOCITSCP:
- if (cpu_has_veic)
- init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE,
- MSC01E_INT_BASE, msc_eicirqmap,
- msc_nr_eicirqs);
- else
- init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE,
- MSC01C_INT_BASE, msc_irqmap,
- msc_nr_irqs);
- }
-
- if (cpu_has_veic) {
- set_vi_handler(MSC01E_INT_I8259A, malta_hw0_irqdispatch);
- set_vi_handler(MSC01E_INT_COREHI, corehi_irqdispatch);
- setup_irq(MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
- setup_irq(MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction);
- } else if (cpu_has_vint) {
- set_vi_handler(MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
- set_vi_handler(MIPSCPU_INT_COREHI, corehi_irqdispatch);
-#ifdef CONFIG_MIPS_MT_SMTC
- setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq,
- (0x100 << MIPSCPU_INT_I8259A));
- setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
- &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI));
- /*
- * Temporary hack to ensure that the subsidiary device
- * interrupts coing in via the i8259A, but associated
- * with low IRQ numbers, will restore the Status.IM
- * value associated with the i8259A.
- */
- {
- int i;
-
- for (i = 0; i < 16; i++)
- irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
- }
-#else /* Not SMTC */
- setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
- setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
- &corehi_irqaction);
-#endif /* CONFIG_MIPS_MT_SMTC */
- } else {
- setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
- setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
- &corehi_irqaction);
- }
-
-#if defined(CONFIG_MIPS_MT_SMP)
- if (gic_present) {
- /* FIXME */
- int i;
- struct {
- unsigned int resched;
- unsigned int call;
- } ipiirq[] = {
- {
- .resched = GIC_IPI_EXT_INTR_RESCHED_VPE0,
- .call = GIC_IPI_EXT_INTR_CALLFNC_VPE0},
- {
- .resched = GIC_IPI_EXT_INTR_RESCHED_VPE1,
- .call = GIC_IPI_EXT_INTR_CALLFNC_VPE1
- }, {
- .resched = GIC_IPI_EXT_INTR_RESCHED_VPE2,
- .call = GIC_IPI_EXT_INTR_CALLFNC_VPE2
- }, {
- .resched = GIC_IPI_EXT_INTR_RESCHED_VPE3,
- .call = GIC_IPI_EXT_INTR_CALLFNC_VPE3
- }
- };
-#define NIPI (sizeof(ipiirq)/sizeof(ipiirq[0]))
- fill_ipi_map();
- gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
- if (!gcmp_present) {
- /* Enable the GIC */
- i = REG(_msc01_biu_base, MSC01_SC_CFG);
- REG(_msc01_biu_base, MSC01_SC_CFG) =
- (i | (0x1 << MSC01_SC_CFG_GICENA_SHF));
- pr_debug("GIC Enabled\n");
- }
-
- /* set up ipi interrupts */
- if (cpu_has_vint) {
- set_vi_handler(MIPSCPU_INT_IPI0, malta_ipi_irqdispatch);
- set_vi_handler(MIPSCPU_INT_IPI1, malta_ipi_irqdispatch);
- }
- /* Argh.. this really needs sorting out.. */
- printk("CPU%d: status register was %08x\n", smp_processor_id(), read_c0_status());
- write_c0_status(read_c0_status() | STATUSF_IP3 | STATUSF_IP4);
- printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status());
- write_c0_status(0x1100dc00);
- printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status());
- for (i = 0; i < NIPI; i++) {
- setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, &irq_resched);
- setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].call, &irq_call);
-
- set_irq_handler(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, handle_percpu_irq);
- set_irq_handler(MIPS_GIC_IRQ_BASE + ipiirq[i].call, handle_percpu_irq);
- }
- } else {
- /* set up ipi interrupts */
- if (cpu_has_veic) {
- set_vi_handler (MSC01E_INT_SW0, ipi_resched_dispatch);
- set_vi_handler (MSC01E_INT_SW1, ipi_call_dispatch);
- cpu_ipi_resched_irq = MSC01E_INT_SW0;
- cpu_ipi_call_irq = MSC01E_INT_SW1;
- } else {
- if (cpu_has_vint) {
- set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
- set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
- }
- cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
- cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ;
- }
-
- setup_irq(cpu_ipi_resched_irq, &irq_resched);
- setup_irq(cpu_ipi_call_irq, &irq_call);
-
- set_irq_handler(cpu_ipi_resched_irq, handle_percpu_irq);
- set_irq_handler(cpu_ipi_call_irq, handle_percpu_irq);
- }
-#endif
-}
-
-void malta_be_init(void)
-{
- if (gcmp_present) {
- /* Could change CM error mask register */
- }
-}
-
-
-static char *tr[8] = {
- "mem", "gcr", "gic", "mmio",
- "0x04", "0x05", "0x06", "0x07"
-};
-
-static char *mcmd[32] = {
- [0x00] = "0x00",
- [0x01] = "Legacy Write",
- [0x02] = "Legacy Read",
- [0x03] = "0x03",
- [0x04] = "0x04",
- [0x05] = "0x05",
- [0x06] = "0x06",
- [0x07] = "0x07",
- [0x08] = "Coherent Read Own",
- [0x09] = "Coherent Read Share",
- [0x0a] = "Coherent Read Discard",
- [0x0b] = "Coherent Ready Share Always",
- [0x0c] = "Coherent Upgrade",
- [0x0d] = "Coherent Writeback",
- [0x0e] = "0x0e",
- [0x0f] = "0x0f",
- [0x10] = "Coherent Copyback",
- [0x11] = "Coherent Copyback Invalidate",
- [0x12] = "Coherent Invalidate",
- [0x13] = "Coherent Write Invalidate",
- [0x14] = "Coherent Completion Sync",
- [0x15] = "0x15",
- [0x16] = "0x16",
- [0x17] = "0x17",
- [0x18] = "0x18",
- [0x19] = "0x19",
- [0x1a] = "0x1a",
- [0x1b] = "0x1b",
- [0x1c] = "0x1c",
- [0x1d] = "0x1d",
- [0x1e] = "0x1e",
- [0x1f] = "0x1f"
-};
-
-static char *core[8] = {
- "Invalid/OK", "Invalid/Data",
- "Shared/OK", "Shared/Data",
- "Modified/OK", "Modified/Data",
- "Exclusive/OK", "Exclusive/Data"
-};
-
-static char *causes[32] = {
- "None", "GC_WR_ERR", "GC_RD_ERR", "COH_WR_ERR",
- "COH_RD_ERR", "MMIO_WR_ERR", "MMIO_RD_ERR", "0x07",
- "0x08", "0x09", "0x0a", "0x0b",
- "0x0c", "0x0d", "0x0e", "0x0f",
- "0x10", "0x11", "0x12", "0x13",
- "0x14", "0x15", "0x16", "INTVN_WR_ERR",
- "INTVN_RD_ERR", "0x19", "0x1a", "0x1b",
- "0x1c", "0x1d", "0x1e", "0x1f"
-};
-
-int malta_be_handler(struct pt_regs *regs, int is_fixup)
-{
- /* This duplicates the handling in do_be which seems wrong */
- int retval = is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
-
- if (gcmp_present) {
- unsigned long cm_error = GCMPGCB(GCMEC);
- unsigned long cm_addr = GCMPGCB(GCMEA);
- unsigned long cm_other = GCMPGCB(GCMEO);
- unsigned long cause, ocause;
- char buf[256];
-
- cause = (cm_error & GCMP_GCB_GMEC_ERROR_TYPE_MSK);
- if (cause != 0) {
- cause >>= GCMP_GCB_GMEC_ERROR_TYPE_SHF;
- if (cause < 16) {
- unsigned long cca_bits = (cm_error >> 15) & 7;
- unsigned long tr_bits = (cm_error >> 12) & 7;
- unsigned long mcmd_bits = (cm_error >> 7) & 0x1f;
- unsigned long stag_bits = (cm_error >> 3) & 15;
- unsigned long sport_bits = (cm_error >> 0) & 7;
-
- snprintf(buf, sizeof(buf),
- "CCA=%lu TR=%s MCmd=%s STag=%lu "
- "SPort=%lu\n",
- cca_bits, tr[tr_bits], mcmd[mcmd_bits],
- stag_bits, sport_bits);
- } else {
- /* glob state & sresp together */
- unsigned long c3_bits = (cm_error >> 18) & 7;
- unsigned long c2_bits = (cm_error >> 15) & 7;
- unsigned long c1_bits = (cm_error >> 12) & 7;
- unsigned long c0_bits = (cm_error >> 9) & 7;
- unsigned long sc_bit = (cm_error >> 8) & 1;
- unsigned long mcmd_bits = (cm_error >> 3) & 0x1f;
- unsigned long sport_bits = (cm_error >> 0) & 7;
- snprintf(buf, sizeof(buf),
- "C3=%s C2=%s C1=%s C0=%s SC=%s "
- "MCmd=%s SPort=%lu\n",
- core[c3_bits], core[c2_bits],
- core[c1_bits], core[c0_bits],
- sc_bit ? "True" : "False",
- mcmd[mcmd_bits], sport_bits);
- }
-
- ocause = (cm_other & GCMP_GCB_GMEO_ERROR_2ND_MSK) >>
- GCMP_GCB_GMEO_ERROR_2ND_SHF;
-
- printk("CM_ERROR=%08lx %s <%s>\n", cm_error,
- causes[cause], buf);
- printk("CM_ADDR =%08lx\n", cm_addr);
- printk("CM_OTHER=%08lx %s\n", cm_other, causes[ocause]);
-
- /* reprime cause register */
- GCMPGCB(GCMEC) = 0;
- }
- }
-
- return retval;
-}
diff --git a/arch/mips/mips-boards/sead/Makefile b/arch/mips/mips-boards/sead/Makefile
deleted file mode 100644
index 3682fe2..0000000
--- a/arch/mips/mips-boards/sead/Makefile
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# Carsten Langgaard, carstenl@mips.com
-# Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
-#
-# ########################################################################
-#
-# This program is free software; you can distribute it and/or modify it
-# under the terms of the GNU General Public License (Version 2) as
-# published by the Free Software Foundation.
-#
-# This program is distributed in the hope it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-# for more details.
-#
-# You should have received a copy of the GNU General Public License along
-# with this program; if not, write to the Free Software Foundation, Inc.,
-# 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
-#
-# #######################################################################
-#
-# Makefile for the MIPS SEAD specific kernel interface routines
-# under Linux.
-#
-
-obj-y := sead_int.o sead_setup.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c
deleted file mode 100644
index ec6dd194..0000000
--- a/arch/mips/mips-boards/sead/sead_int.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- * Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2004 Maciej W. Rozycki
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * Routines for generic manipulation of the interrupts found on the MIPS
- * Sead board.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-
-#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-#include <asm/mips-boards/seadint.h>
-
-static inline int clz(unsigned long x)
-{
- __asm__(
- " .set push \n"
- " .set mips32 \n"
- " clz %0, %1 \n"
- " .set pop \n"
- : "=r" (x)
- : "r" (x));
-
- return x;
-}
-
-/*
- * Version of ffs that only looks at bits 12..15.
- */
-static inline unsigned int irq_ffs(unsigned int pending)
-{
-#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
- return -clz(pending) + 31 - CAUSEB_IP;
-#else
- unsigned int a0 = 7;
- unsigned int t0;
-
- t0 = s0 & 0xf000;
- t0 = t0 < 1;
- t0 = t0 << 2;
- a0 = a0 - t0;
- s0 = s0 << t0;
-
- t0 = s0 & 0xc000;
- t0 = t0 < 1;
- t0 = t0 << 1;
- a0 = a0 - t0;
- s0 = s0 << t0;
-
- t0 = s0 & 0x8000;
- t0 = t0 < 1;
- //t0 = t0 << 2;
- a0 = a0 - t0;
- //s0 = s0 << t0;
-
- return a0;
-#endif
-}
-
-/*
- * IRQs on the SEAD board look basically are combined together on hardware
- * interrupt 0 (MIPS IRQ 2)) like:
- *
- * MIPS IRQ Source
- * -------- ------
- * 0 Software (ignored)
- * 1 Software (ignored)
- * 2 UART0 (hw0)
- * 3 UART1 (hw1)
- * 4 Hardware (ignored)
- * 5 Hardware (ignored)
- * 6 Hardware (ignored)
- * 7 R4k timer (what we use)
- *
- * We handle the IRQ according to _our_ priority which is:
- *
- * Highest ---- R4k Timer
- * Lowest ---- Combined hardware interrupt
- *
- * then we just return, if multiple IRQs are pending then we will just take
- * another exception, big deal.
- */
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
- int irq;
-
- irq = irq_ffs(pending);
-
- if (irq >= 0)
- do_IRQ(MIPS_CPU_IRQ_BASE + irq);
- else
- spurious_interrupt();
-}
-
-void __init arch_init_irq(void)
-{
- mips_cpu_irq_init();
-}
diff --git a/arch/mips/mips-boards/sead/sead_setup.c b/arch/mips/mips-boards/sead/sead_setup.c
deleted file mode 100644
index 8aa8e5b..0000000
--- a/arch/mips/mips-boards/sead/sead_setup.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Carsten Langgaard, carstenl@mips.com
- * Copyright (C) 2002 MIPS Technologies, Inc. All rights reserved.
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- *
- * SEAD specific setup.
- */
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/ioport.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/irq.h>
-#include <asm/mips-boards/generic.h>
-#include <asm/mips-boards/prom.h>
-#include <asm/mips-boards/sead.h>
-#include <asm/mips-boards/seadint.h>
-#include <asm/time.h>
-
-static void __init serial_init(void);
-
-const char *get_system_type(void)
-{
- return "MIPS SEAD";
-}
-
-const char display_string[] = " LINUX ON SEAD ";
-
-void __init plat_mem_setup(void)
-{
- ioport_resource.end = 0x7fffffff;
-
- serial_init();
-
- mips_reboot_setup();
-}
-
-static void __init serial_init(void)
-{
-#ifdef CONFIG_SERIAL_8250
- struct uart_port s;
-
- memset(&s, 0, sizeof(s));
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
- s.iobase = SEAD_UART0_REGS_BASE;
-#else
- s.iobase = SEAD_UART0_REGS_BASE+3;
-#endif
- s.irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_UART0;
- s.uartclk = SEAD_BASE_BAUD * 16;
- s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ;
- s.iotype = UPIO_PORT;
- s.regshift = 3;
-
- if (early_serial_setup(&s) != 0) {
- printk(KERN_ERR "Serial setup failed!\n");
- }
-#endif
-}
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 1655aa6..f467199 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -396,7 +396,7 @@
#endif
}
-int __cpuinit uasm_rel_highest(long val)
+static int __cpuinit uasm_rel_highest(long val)
{
#ifdef CONFIG_64BIT
return ((((val + 0x800080008000L) >> 48) & 0xffff) ^ 0x8000) - 0x8000;
@@ -405,7 +405,7 @@
#endif
}
-int __cpuinit uasm_rel_higher(long val)
+static int __cpuinit uasm_rel_higher(long val)
{
#ifdef CONFIG_64BIT
return ((((val + 0x80008000L) >> 32) & 0xffff) ^ 0x8000) - 0x8000;
diff --git a/arch/mips/mm/uasm.h b/arch/mips/mm/uasm.h
index 0d6a66f..c6d1e3d 100644
--- a/arch/mips/mm/uasm.h
+++ b/arch/mips/mm/uasm.h
@@ -103,8 +103,6 @@
void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid);
#ifdef CONFIG_64BIT
int uasm_in_compat_space_p(long addr);
-int uasm_rel_highest(long val);
-int uasm_rel_higher(long val);
#endif
int uasm_rel_hi(long val);
int uasm_rel_lo(long val);
diff --git a/arch/mips/mti-malta/Makefile b/arch/mips/mti-malta/Makefile
new file mode 100644
index 0000000..f806444
--- /dev/null
+++ b/arch/mips/mti-malta/Makefile
@@ -0,0 +1,21 @@
+#
+# Carsten Langgaard, carstenl@mips.com
+# Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+#
+# Copyright (C) 2008 Wind River Systems, Inc.
+# written by Ralf Baechle <ralf@linux-mips.org>
+#
+obj-y := malta-amon.o malta-cmdline.o \
+ malta-display.o malta-init.o malta-int.o \
+ malta-memory.o malta-mtd.o \
+ malta-platform.o malta-reset.o \
+ malta-setup.o malta-time.o
+
+obj-$(CONFIG_EARLY_PRINTK) += malta-console.o
+obj-$(CONFIG_PCI) += malta-pci.o
+obj-$(CONFIG_KGDB) += malta-kgdb.o
+
+# FIXME FIXME FIXME
+obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/mips-boards/generic/amon.c b/arch/mips/mti-malta/malta-amon.c
similarity index 100%
rename from arch/mips/mips-boards/generic/amon.c
rename to arch/mips/mti-malta/malta-amon.c
diff --git a/arch/mips/mips-boards/generic/cmdline.c b/arch/mips/mti-malta/malta-cmdline.c
similarity index 100%
rename from arch/mips/mips-boards/generic/cmdline.c
rename to arch/mips/mti-malta/malta-cmdline.c
diff --git a/arch/mips/mti-malta/malta-console.c b/arch/mips/mti-malta/malta-console.c
new file mode 100644
index 0000000..43bcfb4
--- /dev/null
+++ b/arch/mips/mti-malta/malta-console.c
@@ -0,0 +1,47 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Putting things on the screen/serial line using YAMONs facilities.
+ */
+#include <linux/console.h>
+#include <linux/init.h>
+#include <linux/serial_reg.h>
+#include <asm/io.h>
+
+
+#define PORT(offset) (0x3f8 + (offset))
+
+
+static inline unsigned int serial_in(int offset)
+{
+ return inb(PORT(offset));
+}
+
+static inline void serial_out(int offset, int value)
+{
+ outb(value, PORT(offset));
+}
+
+int prom_putchar(char c)
+{
+ while ((serial_in(UART_LSR) & UART_LSR_THRE) == 0)
+ ;
+
+ serial_out(UART_TX, c);
+
+ return 1;
+}
diff --git a/arch/mips/mti-malta/malta-display.c b/arch/mips/mti-malta/malta-display.c
new file mode 100644
index 0000000..7c8828f
--- /dev/null
+++ b/arch/mips/mti-malta/malta-display.c
@@ -0,0 +1,64 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Display routines for display messages in MIPS boards ascii display.
+ */
+
+#include <linux/compiler.h>
+#include <linux/timer.h>
+#include <asm/io.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+
+extern const char display_string[];
+static unsigned int display_count;
+static unsigned int max_display_count;
+
+void mips_display_message(const char *str)
+{
+ static unsigned int __iomem *display = NULL;
+ int i;
+
+ if (unlikely(display == NULL))
+ display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int));
+
+ for (i = 0; i <= 14; i=i+2) {
+ if (*str)
+ __raw_writel(*str++, display + i);
+ else
+ __raw_writel(' ', display + i);
+ }
+}
+
+static void scroll_display_message(unsigned long data);
+static DEFINE_TIMER(mips_scroll_timer, scroll_display_message, HZ, 0);
+
+static void scroll_display_message(unsigned long data)
+{
+ mips_display_message(&display_string[display_count++]);
+ if (display_count == max_display_count)
+ display_count = 0;
+
+ mod_timer(&mips_scroll_timer, jiffies + HZ);
+}
+
+void mips_scroll_message(void)
+{
+ del_timer_sync(&mips_scroll_timer);
+ max_display_count = strlen(display_string) + 1 - 8;
+ mod_timer(&mips_scroll_timer, jiffies + 1);
+}
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c
new file mode 100644
index 0000000..c065302
--- /dev/null
+++ b/arch/mips/mti-malta/malta-init.c
@@ -0,0 +1,424 @@
+/*
+ * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc.
+ * All rights reserved.
+ * Authors: Carsten Langgaard <carstenl@mips.com>
+ * Maciej W. Rozycki <macro@mips.com>
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * PROM library initialisation code.
+ */
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+
+#include <asm/bootinfo.h>
+#include <asm/gt64120.h>
+#include <asm/io.h>
+#include <asm/system.h>
+#include <asm/cacheflush.h>
+#include <asm/traps.h>
+
+#include <asm/mips-boards/prom.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/bonito64.h>
+#include <asm/mips-boards/msc01_pci.h>
+
+#include <asm/mips-boards/malta.h>
+
+#ifdef CONFIG_KGDB
+extern int rs_kgdb_hook(int, int);
+extern int rs_putDebugChar(char);
+extern char rs_getDebugChar(void);
+extern int saa9730_kgdb_hook(int);
+extern int saa9730_putDebugChar(char);
+extern char saa9730_getDebugChar(void);
+#endif
+
+int prom_argc;
+int *_prom_argv, *_prom_envp;
+
+/*
+ * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
+ * This macro take care of sign extension, if running in 64-bit mode.
+ */
+#define prom_envp(index) ((char *)(long)_prom_envp[(index)])
+
+int init_debug = 0;
+
+int mips_revision_corid;
+int mips_revision_sconid;
+
+/* Bonito64 system controller register base. */
+unsigned long _pcictrl_bonito;
+unsigned long _pcictrl_bonito_pcicfg;
+
+/* GT64120 system controller register base */
+unsigned long _pcictrl_gt64120;
+
+/* MIPS System controller register base */
+unsigned long _pcictrl_msc;
+
+char *prom_getenv(char *envname)
+{
+ /*
+ * Return a pointer to the given environment variable.
+ * In 64-bit mode: we're using 64-bit pointers, but all pointers
+ * in the PROM structures are only 32-bit, so we need some
+ * workarounds, if we are running in 64-bit mode.
+ */
+ int i, index=0;
+
+ i = strlen(envname);
+
+ while (prom_envp(index)) {
+ if(strncmp(envname, prom_envp(index), i) == 0) {
+ return(prom_envp(index+1));
+ }
+ index += 2;
+ }
+
+ return NULL;
+}
+
+static inline unsigned char str2hexnum(unsigned char c)
+{
+ if (c >= '0' && c <= '9')
+ return c - '0';
+ if (c >= 'a' && c <= 'f')
+ return c - 'a' + 10;
+ return 0; /* foo */
+}
+
+static inline void str2eaddr(unsigned char *ea, unsigned char *str)
+{
+ int i;
+
+ for (i = 0; i < 6; i++) {
+ unsigned char num;
+
+ if((*str == '.') || (*str == ':'))
+ str++;
+ num = str2hexnum(*str++) << 4;
+ num |= (str2hexnum(*str++));
+ ea[i] = num;
+ }
+}
+
+int get_ethernet_addr(char *ethernet_addr)
+{
+ char *ethaddr_str;
+
+ ethaddr_str = prom_getenv("ethaddr");
+ if (!ethaddr_str) {
+ printk("ethaddr not set in boot prom\n");
+ return -1;
+ }
+ str2eaddr(ethernet_addr, ethaddr_str);
+
+ if (init_debug > 1) {
+ int i;
+ printk("get_ethernet_addr: ");
+ for (i=0; i<5; i++)
+ printk("%02x:", (unsigned char)*(ethernet_addr+i));
+ printk("%02x\n", *(ethernet_addr+i));
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+static void __init console_config(void)
+{
+ char console_string[40];
+ int baud = 0;
+ char parity = '\0', bits = '\0', flow = '\0';
+ char *s;
+
+ if ((strstr(prom_getcmdline(), "console=")) == NULL) {
+ s = prom_getenv("modetty0");
+ if (s) {
+ while (*s >= '0' && *s <= '9')
+ baud = baud*10 + *s++ - '0';
+ if (*s == ',') s++;
+ if (*s) parity = *s++;
+ if (*s == ',') s++;
+ if (*s) bits = *s++;
+ if (*s == ',') s++;
+ if (*s == 'h') flow = 'r';
+ }
+ if (baud == 0)
+ baud = 38400;
+ if (parity != 'n' && parity != 'o' && parity != 'e')
+ parity = 'n';
+ if (bits != '7' && bits != '8')
+ bits = '8';
+ if (flow == '\0')
+ flow = 'r';
+ sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
+ strcat(prom_getcmdline(), console_string);
+ pr_info("Config serial console:%s\n", console_string);
+ }
+}
+#endif
+
+#ifdef CONFIG_KGDB
+void __init kgdb_config(void)
+{
+ extern int (*generic_putDebugChar)(char);
+ extern char (*generic_getDebugChar)(void);
+ char *argptr;
+ int line, speed;
+
+ argptr = prom_getcmdline();
+ if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
+ argptr += strlen("kgdb=ttyS");
+ if (*argptr != '0' && *argptr != '1')
+ printk("KGDB: Unknown serial line /dev/ttyS%c, "
+ "falling back to /dev/ttyS1\n", *argptr);
+ line = *argptr == '0' ? 0 : 1;
+ printk("KGDB: Using serial line /dev/ttyS%d for session\n", line);
+
+ speed = 0;
+ if (*++argptr == ',')
+ {
+ int c;
+ while ((c = *++argptr) && ('0' <= c && c <= '9'))
+ speed = speed * 10 + c - '0';
+ }
+ {
+ speed = rs_kgdb_hook(line, speed);
+ generic_putDebugChar = rs_putDebugChar;
+ generic_getDebugChar = rs_getDebugChar;
+ }
+
+ pr_info("KGDB: Using serial line /dev/ttyS%d at %d for "
+ "session, please connect your debugger\n",
+ line ? 1 : 0, speed);
+
+ {
+ char *s;
+ for (s = "Please connect GDB to this port\r\n"; *s; )
+ generic_putDebugChar(*s++);
+ }
+
+ /* Breakpoint is invoked after interrupts are initialised */
+ }
+}
+#endif
+
+static void __init mips_nmi_setup(void)
+{
+ void *base;
+ extern char except_vec_nmi;
+
+ base = cpu_has_veic ?
+ (void *)(CAC_BASE + 0xa80) :
+ (void *)(CAC_BASE + 0x380);
+ memcpy(base, &except_vec_nmi, 0x80);
+ flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
+}
+
+static void __init mips_ejtag_setup(void)
+{
+ void *base;
+ extern char except_vec_ejtag_debug;
+
+ base = cpu_has_veic ?
+ (void *)(CAC_BASE + 0xa00) :
+ (void *)(CAC_BASE + 0x300);
+ memcpy(base, &except_vec_ejtag_debug, 0x80);
+ flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
+}
+
+extern struct plat_smp_ops msmtc_smp_ops;
+
+void __init prom_init(void)
+{
+ prom_argc = fw_arg0;
+ _prom_argv = (int *) fw_arg1;
+ _prom_envp = (int *) fw_arg2;
+
+ mips_display_message("LINUX");
+
+ /*
+ * early setup of _pcictrl_bonito so that we can determine
+ * the system controller on a CORE_EMUL board
+ */
+ _pcictrl_bonito = (unsigned long)ioremap(BONITO_REG_BASE, BONITO_REG_SIZE);
+
+ mips_revision_corid = MIPS_REVISION_CORID;
+
+ if (mips_revision_corid == MIPS_REVISION_CORID_CORE_EMUL) {
+ if (BONITO_PCIDID == 0x0001df53 ||
+ BONITO_PCIDID == 0x0003df53)
+ mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_BON;
+ else
+ mips_revision_corid = MIPS_REVISION_CORID_CORE_EMUL_MSC;
+ }
+
+ mips_revision_sconid = MIPS_REVISION_SCONID;
+ if (mips_revision_sconid == MIPS_REVISION_SCON_OTHER) {
+ switch (mips_revision_corid) {
+ case MIPS_REVISION_CORID_QED_RM5261:
+ case MIPS_REVISION_CORID_CORE_LV:
+ case MIPS_REVISION_CORID_CORE_FPGA:
+ case MIPS_REVISION_CORID_CORE_FPGAR2:
+ mips_revision_sconid = MIPS_REVISION_SCON_GT64120;
+ break;
+ case MIPS_REVISION_CORID_CORE_EMUL_BON:
+ case MIPS_REVISION_CORID_BONITO64:
+ case MIPS_REVISION_CORID_CORE_20K:
+ mips_revision_sconid = MIPS_REVISION_SCON_BONITO;
+ break;
+ case MIPS_REVISION_CORID_CORE_MSC:
+ case MIPS_REVISION_CORID_CORE_FPGA2:
+ case MIPS_REVISION_CORID_CORE_24K:
+ /*
+ * SOCit/ROCit support is essentially identical
+ * but make an attempt to distinguish them
+ */
+ mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
+ break;
+ case MIPS_REVISION_CORID_CORE_FPGA3:
+ case MIPS_REVISION_CORID_CORE_FPGA4:
+ case MIPS_REVISION_CORID_CORE_FPGA5:
+ case MIPS_REVISION_CORID_CORE_EMUL_MSC:
+ default:
+ /* See above */
+ mips_revision_sconid = MIPS_REVISION_SCON_ROCIT;
+ break;
+ }
+ }
+
+ switch (mips_revision_sconid) {
+ u32 start, map, mask, data;
+
+ case MIPS_REVISION_SCON_GT64120:
+ /*
+ * Setup the North bridge to do Master byte-lane swapping
+ * when running in bigendian.
+ */
+ _pcictrl_gt64120 = (unsigned long)ioremap(MIPS_GT_BASE, 0x2000);
+
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
+ GT_PCI0_CMD_SBYTESWAP_BIT);
+#else
+ GT_WRITE(GT_PCI0_CMD_OFS, 0);
+#endif
+ /* Fix up PCI I/O mapping if necessary (for Atlas). */
+ start = GT_READ(GT_PCI0IOLD_OFS);
+ map = GT_READ(GT_PCI0IOREMAP_OFS);
+ if ((start & map) != 0) {
+ map &= ~start;
+ GT_WRITE(GT_PCI0IOREMAP_OFS, map);
+ }
+
+ set_io_port_base(MALTA_GT_PORT_BASE);
+ break;
+
+ case MIPS_REVISION_SCON_BONITO:
+ _pcictrl_bonito_pcicfg = (unsigned long)ioremap(BONITO_PCICFG_BASE, BONITO_PCICFG_SIZE);
+
+ /*
+ * Disable Bonito IOBC.
+ */
+ BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
+ ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
+ BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
+
+ /*
+ * Setup the North bridge to do Master byte-lane swapping
+ * when running in bigendian.
+ */
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ BONITO_BONGENCFG = BONITO_BONGENCFG &
+ ~(BONITO_BONGENCFG_MSTRBYTESWAP |
+ BONITO_BONGENCFG_BYTESWAP);
+#else
+ BONITO_BONGENCFG = BONITO_BONGENCFG |
+ BONITO_BONGENCFG_MSTRBYTESWAP |
+ BONITO_BONGENCFG_BYTESWAP;
+#endif
+
+ set_io_port_base(MALTA_BONITO_PORT_BASE);
+ break;
+
+ case MIPS_REVISION_SCON_SOCIT:
+ case MIPS_REVISION_SCON_ROCIT:
+ _pcictrl_msc = (unsigned long)ioremap(MIPS_MSC01_PCI_REG_BASE, 0x2000);
+ mips_pci_controller:
+ mb();
+ MSC_READ(MSC01_PCI_CFG, data);
+ MSC_WRITE(MSC01_PCI_CFG, data & ~MSC01_PCI_CFG_EN_BIT);
+ wmb();
+
+ /* Fix up lane swapping. */
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+ MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
+#else
+ MSC_WRITE(MSC01_PCI_SWAP,
+ MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF |
+ MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
+ MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
+#endif
+ /* Fix up target memory mapping. */
+ MSC_READ(MSC01_PCI_BAR0, mask);
+ MSC_WRITE(MSC01_PCI_P2SCMSKL, mask & MSC01_PCI_BAR0_SIZE_MSK);
+
+ /* Don't handle target retries indefinitely. */
+ if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==
+ MSC01_PCI_CFG_MAXRTRY_MSK)
+ data = (data & ~(MSC01_PCI_CFG_MAXRTRY_MSK <<
+ MSC01_PCI_CFG_MAXRTRY_SHF)) |
+ ((MSC01_PCI_CFG_MAXRTRY_MSK - 1) <<
+ MSC01_PCI_CFG_MAXRTRY_SHF);
+
+ wmb();
+ MSC_WRITE(MSC01_PCI_CFG, data);
+ mb();
+
+ set_io_port_base(MALTA_MSC_PORT_BASE);
+ break;
+
+ case MIPS_REVISION_SCON_SOCITSC:
+ case MIPS_REVISION_SCON_SOCITSCP:
+ _pcictrl_msc = (unsigned long)ioremap(MIPS_SOCITSC_PCI_REG_BASE, 0x2000);
+ goto mips_pci_controller;
+
+ default:
+ /* Unknown system controller */
+ mips_display_message("SC Error");
+ while (1); /* We die here... */
+ }
+ board_nmi_handler_setup = mips_nmi_setup;
+ board_ejtag_handler_setup = mips_ejtag_setup;
+
+ pr_info("\nLINUX started...\n");
+ prom_init_cmdline();
+ prom_meminit();
+#ifdef CONFIG_SERIAL_8250_CONSOLE
+ console_config();
+#endif
+#ifdef CONFIG_MIPS_CMP
+ register_smp_ops(&cmp_smp_ops);
+#endif
+#ifdef CONFIG_MIPS_MT_SMP
+ register_smp_ops(&vsmp_smp_ops);
+#endif
+#ifdef CONFIG_MIPS_MT_SMTC
+ register_smp_ops(&msmtc_smp_ops);
+#endif
+}
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c
new file mode 100644
index 0000000..ea17611
--- /dev/null
+++ b/arch/mips/mti-malta/malta-int.c
@@ -0,0 +1,712 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc.
+ * Copyright (C) 2001 Ralf Baechle
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Routines for generic manipulation of the interrupts found on the MIPS
+ * Malta board.
+ * The interrupt controller is located in the South Bridge a PIIX4 device
+ * with two internal 82C95 interrupt controllers.
+ */
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel_stat.h>
+#include <linux/kernel.h>
+#include <linux/random.h>
+
+#include <asm/traps.h>
+#include <asm/i8259.h>
+#include <asm/irq_cpu.h>
+#include <asm/irq_regs.h>
+#include <asm/mips-boards/malta.h>
+#include <asm/mips-boards/maltaint.h>
+#include <asm/mips-boards/piix4.h>
+#include <asm/gt64120.h>
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/msc01_pci.h>
+#include <asm/msc01_ic.h>
+#include <asm/gic.h>
+#include <asm/gcmpregs.h>
+
+int gcmp_present = -1;
+int gic_present;
+static unsigned long _msc01_biu_base;
+static unsigned long _gcmp_base;
+static unsigned int ipi_map[NR_CPUS];
+
+static DEFINE_SPINLOCK(mips_irq_lock);
+
+static inline int mips_pcibios_iack(void)
+{
+ int irq;
+ u32 dummy;
+
+ /*
+ * Determine highest priority pending interrupt by performing
+ * a PCI Interrupt Acknowledge cycle.
+ */
+ switch (mips_revision_sconid) {
+ case MIPS_REVISION_SCON_SOCIT:
+ case MIPS_REVISION_SCON_ROCIT:
+ case MIPS_REVISION_SCON_SOCITSC:
+ case MIPS_REVISION_SCON_SOCITSCP:
+ MSC_READ(MSC01_PCI_IACK, irq);
+ irq &= 0xff;
+ break;
+ case MIPS_REVISION_SCON_GT64120:
+ irq = GT_READ(GT_PCI0_IACK_OFS);
+ irq &= 0xff;
+ break;
+ case MIPS_REVISION_SCON_BONITO:
+ /* The following will generate a PCI IACK cycle on the
+ * Bonito controller. It's a little bit kludgy, but it
+ * was the easiest way to implement it in hardware at
+ * the given time.
+ */
+ BONITO_PCIMAP_CFG = 0x20000;
+
+ /* Flush Bonito register block */
+ dummy = BONITO_PCIMAP_CFG;
+ iob(); /* sync */
+
+ irq = readl((u32 *)_pcictrl_bonito_pcicfg);
+ iob(); /* sync */
+ irq &= 0xff;
+ BONITO_PCIMAP_CFG = 0;
+ break;
+ default:
+ printk(KERN_WARNING "Unknown system controller.\n");
+ return -1;
+ }
+ return irq;
+}
+
+static inline int get_int(void)
+{
+ unsigned long flags;
+ int irq;
+ spin_lock_irqsave(&mips_irq_lock, flags);
+
+ irq = mips_pcibios_iack();
+
+ /*
+ * The only way we can decide if an interrupt is spurious
+ * is by checking the 8259 registers. This needs a spinlock
+ * on an SMP system, so leave it up to the generic code...
+ */
+
+ spin_unlock_irqrestore(&mips_irq_lock, flags);
+
+ return irq;
+}
+
+static void malta_hw0_irqdispatch(void)
+{
+ int irq;
+
+ irq = get_int();
+ if (irq < 0) {
+ /* interrupt has already been cleared */
+ return;
+ }
+
+ do_IRQ(MALTA_INT_BASE + irq);
+}
+
+static void malta_ipi_irqdispatch(void)
+{
+ int irq;
+
+ irq = gic_get_int();
+ if (irq < 0)
+ return; /* interrupt has already been cleared */
+
+ do_IRQ(MIPS_GIC_IRQ_BASE + irq);
+}
+
+static void corehi_irqdispatch(void)
+{
+ unsigned int intedge, intsteer, pcicmd, pcibadaddr;
+ unsigned int pcimstat, intisr, inten, intpol;
+ unsigned int intrcause, datalo, datahi;
+ struct pt_regs *regs = get_irq_regs();
+
+ printk(KERN_EMERG "CoreHI interrupt, shouldn't happen, we die here!\n");
+ printk(KERN_EMERG "epc : %08lx\nStatus: %08lx\n"
+ "Cause : %08lx\nbadVaddr : %08lx\n",
+ regs->cp0_epc, regs->cp0_status,
+ regs->cp0_cause, regs->cp0_badvaddr);
+
+ /* Read all the registers and then print them as there is a
+ problem with interspersed printk's upsetting the Bonito controller.
+ Do it for the others too.
+ */
+
+ switch (mips_revision_sconid) {
+ case MIPS_REVISION_SCON_SOCIT:
+ case MIPS_REVISION_SCON_ROCIT:
+ case MIPS_REVISION_SCON_SOCITSC:
+ case MIPS_REVISION_SCON_SOCITSCP:
+ ll_msc_irq();
+ break;
+ case MIPS_REVISION_SCON_GT64120:
+ intrcause = GT_READ(GT_INTRCAUSE_OFS);
+ datalo = GT_READ(GT_CPUERR_ADDRLO_OFS);
+ datahi = GT_READ(GT_CPUERR_ADDRHI_OFS);
+ printk(KERN_EMERG "GT_INTRCAUSE = %08x\n", intrcause);
+ printk(KERN_EMERG "GT_CPUERR_ADDR = %02x%08x\n",
+ datahi, datalo);
+ break;
+ case MIPS_REVISION_SCON_BONITO:
+ pcibadaddr = BONITO_PCIBADADDR;
+ pcimstat = BONITO_PCIMSTAT;
+ intisr = BONITO_INTISR;
+ inten = BONITO_INTEN;
+ intpol = BONITO_INTPOL;
+ intedge = BONITO_INTEDGE;
+ intsteer = BONITO_INTSTEER;
+ pcicmd = BONITO_PCICMD;
+ printk(KERN_EMERG "BONITO_INTISR = %08x\n", intisr);
+ printk(KERN_EMERG "BONITO_INTEN = %08x\n", inten);
+ printk(KERN_EMERG "BONITO_INTPOL = %08x\n", intpol);
+ printk(KERN_EMERG "BONITO_INTEDGE = %08x\n", intedge);
+ printk(KERN_EMERG "BONITO_INTSTEER = %08x\n", intsteer);
+ printk(KERN_EMERG "BONITO_PCICMD = %08x\n", pcicmd);
+ printk(KERN_EMERG "BONITO_PCIBADADDR = %08x\n", pcibadaddr);
+ printk(KERN_EMERG "BONITO_PCIMSTAT = %08x\n", pcimstat);
+ break;
+ }
+
+ die("CoreHi interrupt", regs);
+}
+
+static inline int clz(unsigned long x)
+{
+ __asm__(
+ " .set push \n"
+ " .set mips32 \n"
+ " clz %0, %1 \n"
+ " .set pop \n"
+ : "=r" (x)
+ : "r" (x));
+
+ return x;
+}
+
+/*
+ * Version of ffs that only looks at bits 12..15.
+ */
+static inline unsigned int irq_ffs(unsigned int pending)
+{
+#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
+ return -clz(pending) + 31 - CAUSEB_IP;
+#else
+ unsigned int a0 = 7;
+ unsigned int t0;
+
+ t0 = pending & 0xf000;
+ t0 = t0 < 1;
+ t0 = t0 << 2;
+ a0 = a0 - t0;
+ pending = pending << t0;
+
+ t0 = pending & 0xc000;
+ t0 = t0 < 1;
+ t0 = t0 << 1;
+ a0 = a0 - t0;
+ pending = pending << t0;
+
+ t0 = pending & 0x8000;
+ t0 = t0 < 1;
+ /* t0 = t0 << 2; */
+ a0 = a0 - t0;
+ /* pending = pending << t0; */
+
+ return a0;
+#endif
+}
+
+/*
+ * IRQs on the Malta board look basically (barring software IRQs which we
+ * don't use at all and all external interrupt sources are combined together
+ * on hardware interrupt 0 (MIPS IRQ 2)) like:
+ *
+ * MIPS IRQ Source
+ * -------- ------
+ * 0 Software (ignored)
+ * 1 Software (ignored)
+ * 2 Combined hardware interrupt (hw0)
+ * 3 Hardware (ignored)
+ * 4 Hardware (ignored)
+ * 5 Hardware (ignored)
+ * 6 Hardware (ignored)
+ * 7 R4k timer (what we use)
+ *
+ * We handle the IRQ according to _our_ priority which is:
+ *
+ * Highest ---- R4k Timer
+ * Lowest ---- Combined hardware interrupt
+ *
+ * then we just return, if multiple IRQs are pending then we will just take
+ * another exception, big deal.
+ */
+
+asmlinkage void plat_irq_dispatch(void)
+{
+ unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
+ int irq;
+
+ irq = irq_ffs(pending);
+
+ if (irq == MIPSCPU_INT_I8259A)
+ malta_hw0_irqdispatch();
+ else if (gic_present && ((1 << irq) & ipi_map[smp_processor_id()]))
+ malta_ipi_irqdispatch();
+ else if (irq >= 0)
+ do_IRQ(MIPS_CPU_IRQ_BASE + irq);
+ else
+ spurious_interrupt();
+}
+
+#ifdef CONFIG_MIPS_MT_SMP
+
+
+#define GIC_MIPS_CPU_IPI_RESCHED_IRQ 3
+#define GIC_MIPS_CPU_IPI_CALL_IRQ 4
+
+#define MIPS_CPU_IPI_RESCHED_IRQ 0 /* SW int 0 for resched */
+#define C_RESCHED C_SW0
+#define MIPS_CPU_IPI_CALL_IRQ 1 /* SW int 1 for resched */
+#define C_CALL C_SW1
+static int cpu_ipi_resched_irq, cpu_ipi_call_irq;
+
+static void ipi_resched_dispatch(void)
+{
+ do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ);
+}
+
+static void ipi_call_dispatch(void)
+{
+ do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ);
+}
+
+static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
+{
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
+{
+ smp_call_function_interrupt();
+
+ return IRQ_HANDLED;
+}
+
+static struct irqaction irq_resched = {
+ .handler = ipi_resched_interrupt,
+ .flags = IRQF_DISABLED|IRQF_PERCPU,
+ .name = "IPI_resched"
+};
+
+static struct irqaction irq_call = {
+ .handler = ipi_call_interrupt,
+ .flags = IRQF_DISABLED|IRQF_PERCPU,
+ .name = "IPI_call"
+};
+#endif /* CONFIG_MIPS_MT_SMP */
+
+static struct irqaction i8259irq = {
+ .handler = no_action,
+ .name = "XT-PIC cascade"
+};
+
+static struct irqaction corehi_irqaction = {
+ .handler = no_action,
+ .name = "CoreHi"
+};
+
+static msc_irqmap_t __initdata msc_irqmap[] = {
+ {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0},
+ {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0},
+};
+static int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap);
+
+static msc_irqmap_t __initdata msc_eicirqmap[] = {
+ {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0},
+ {MSC01E_INT_SW1, MSC01_IRQ_LEVEL, 0},
+ {MSC01E_INT_I8259A, MSC01_IRQ_LEVEL, 0},
+ {MSC01E_INT_SMI, MSC01_IRQ_LEVEL, 0},
+ {MSC01E_INT_COREHI, MSC01_IRQ_LEVEL, 0},
+ {MSC01E_INT_CORELO, MSC01_IRQ_LEVEL, 0},
+ {MSC01E_INT_TMR, MSC01_IRQ_EDGE, 0},
+ {MSC01E_INT_PCI, MSC01_IRQ_LEVEL, 0},
+ {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0},
+ {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0}
+};
+
+static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
+
+#if defined(CONFIG_MIPS_MT_SMP)
+/*
+ * This GIC specific tabular array defines the association between External
+ * Interrupts and CPUs/Core Interrupts. The nature of the External
+ * Interrupts is also defined here - polarity/trigger.
+ */
+static struct gic_intr_map gic_intr_map[] = {
+ { GIC_EXT_INTR(0), X, X, X, X, 0 },
+ { GIC_EXT_INTR(1), X, X, X, X, 0 },
+ { GIC_EXT_INTR(2), X, X, X, X, 0 },
+ { GIC_EXT_INTR(3), 0, GIC_CPU_INT0, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(4), 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(5), 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(6), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(7), 0, GIC_CPU_INT4, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(8), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(9), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(10), X, X, X, X, 0 },
+ { GIC_EXT_INTR(11), X, X, X, X, 0 },
+ { GIC_EXT_INTR(12), 0, GIC_CPU_INT3, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(13), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(14), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 },
+ { GIC_EXT_INTR(15), X, X, X, X, 0 },
+ { GIC_EXT_INTR(16), 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
+ { GIC_EXT_INTR(17), 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
+ { GIC_EXT_INTR(18), 1, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
+ { GIC_EXT_INTR(19), 1, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
+ { GIC_EXT_INTR(20), 2, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
+ { GIC_EXT_INTR(21), 2, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
+ { GIC_EXT_INTR(22), 3, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
+ { GIC_EXT_INTR(23), 3, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 },
+};
+#endif
+
+/*
+ * GCMP needs to be detected before any SMP initialisation
+ */
+static int __init gcmp_probe(unsigned long addr, unsigned long size)
+{
+ if (gcmp_present >= 0)
+ return gcmp_present;
+
+ _gcmp_base = (unsigned long) ioremap_nocache(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ);
+ _msc01_biu_base = (unsigned long) ioremap_nocache(MSC01_BIU_REG_BASE, MSC01_BIU_ADDRSPACE_SZ);
+ gcmp_present = (GCMPGCB(GCMPB) & GCMP_GCB_GCMPB_GCMPBASE_MSK) == GCMP_BASE_ADDR;
+
+ if (gcmp_present)
+ printk(KERN_DEBUG "GCMP present\n");
+ return gcmp_present;
+}
+
+#if defined(CONFIG_MIPS_MT_SMP)
+static void __init fill_ipi_map(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(gic_intr_map); i++) {
+ if (gic_intr_map[i].ipiflag && (gic_intr_map[i].cpunum != X))
+ ipi_map[gic_intr_map[i].cpunum] |=
+ (1 << (gic_intr_map[i].pin + 2));
+ }
+}
+#endif
+
+void __init arch_init_irq(void)
+{
+ int gic_present, gcmp_present;
+
+ init_i8259_irqs();
+
+ if (!cpu_has_veic)
+ mips_cpu_irq_init();
+
+ gcmp_present = gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ);
+ if (gcmp_present) {
+ GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK;
+ gic_present = 1;
+ } else {
+ _msc01_biu_base = (unsigned long) ioremap_nocache(MSC01_BIU_REG_BASE, MSC01_BIU_ADDRSPACE_SZ);
+ gic_present = (REG(_msc01_biu_base, MSC01_SC_CFG) &
+ MSC01_SC_CFG_GICPRES_MSK) >> MSC01_SC_CFG_GICPRES_SHF;
+ }
+ if (gic_present)
+ printk(KERN_DEBUG "GIC present\n");
+
+ switch (mips_revision_sconid) {
+ case MIPS_REVISION_SCON_SOCIT:
+ case MIPS_REVISION_SCON_ROCIT:
+ if (cpu_has_veic)
+ init_msc_irqs(MIPS_MSC01_IC_REG_BASE,
+ MSC01E_INT_BASE, msc_eicirqmap,
+ msc_nr_eicirqs);
+ else
+ init_msc_irqs(MIPS_MSC01_IC_REG_BASE,
+ MSC01C_INT_BASE, msc_irqmap,
+ msc_nr_irqs);
+ break;
+
+ case MIPS_REVISION_SCON_SOCITSC:
+ case MIPS_REVISION_SCON_SOCITSCP:
+ if (cpu_has_veic)
+ init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE,
+ MSC01E_INT_BASE, msc_eicirqmap,
+ msc_nr_eicirqs);
+ else
+ init_msc_irqs(MIPS_SOCITSC_IC_REG_BASE,
+ MSC01C_INT_BASE, msc_irqmap,
+ msc_nr_irqs);
+ }
+
+ if (cpu_has_veic) {
+ set_vi_handler(MSC01E_INT_I8259A, malta_hw0_irqdispatch);
+ set_vi_handler(MSC01E_INT_COREHI, corehi_irqdispatch);
+ setup_irq(MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
+ setup_irq(MSC01E_INT_BASE+MSC01E_INT_COREHI, &corehi_irqaction);
+ } else if (cpu_has_vint) {
+ set_vi_handler(MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
+ set_vi_handler(MIPSCPU_INT_COREHI, corehi_irqdispatch);
+#ifdef CONFIG_MIPS_MT_SMTC
+ setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq,
+ (0x100 << MIPSCPU_INT_I8259A));
+ setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
+ &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI));
+ /*
+ * Temporary hack to ensure that the subsidiary device
+ * interrupts coing in via the i8259A, but associated
+ * with low IRQ numbers, will restore the Status.IM
+ * value associated with the i8259A.
+ */
+ {
+ int i;
+
+ for (i = 0; i < 16; i++)
+ irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
+ }
+#else /* Not SMTC */
+ setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
+ setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
+ &corehi_irqaction);
+#endif /* CONFIG_MIPS_MT_SMTC */
+ } else {
+ setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
+ setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI,
+ &corehi_irqaction);
+ }
+
+#if defined(CONFIG_MIPS_MT_SMP)
+ if (gic_present) {
+ /* FIXME */
+ int i;
+ struct {
+ unsigned int resched;
+ unsigned int call;
+ } ipiirq[] = {
+ {
+ .resched = GIC_IPI_EXT_INTR_RESCHED_VPE0,
+ .call = GIC_IPI_EXT_INTR_CALLFNC_VPE0},
+ {
+ .resched = GIC_IPI_EXT_INTR_RESCHED_VPE1,
+ .call = GIC_IPI_EXT_INTR_CALLFNC_VPE1
+ }, {
+ .resched = GIC_IPI_EXT_INTR_RESCHED_VPE2,
+ .call = GIC_IPI_EXT_INTR_CALLFNC_VPE2
+ }, {
+ .resched = GIC_IPI_EXT_INTR_RESCHED_VPE3,
+ .call = GIC_IPI_EXT_INTR_CALLFNC_VPE3
+ }
+ };
+ fill_ipi_map();
+ gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
+ if (!gcmp_present) {
+ /* Enable the GIC */
+ i = REG(_msc01_biu_base, MSC01_SC_CFG);
+ REG(_msc01_biu_base, MSC01_SC_CFG) =
+ (i | (0x1 << MSC01_SC_CFG_GICENA_SHF));
+ pr_debug("GIC Enabled\n");
+ }
+
+ /* set up ipi interrupts */
+ if (cpu_has_vint) {
+ set_vi_handler(MIPSCPU_INT_IPI0, malta_ipi_irqdispatch);
+ set_vi_handler(MIPSCPU_INT_IPI1, malta_ipi_irqdispatch);
+ }
+ /* Argh.. this really needs sorting out.. */
+ printk("CPU%d: status register was %08x\n", smp_processor_id(), read_c0_status());
+ write_c0_status(read_c0_status() | STATUSF_IP3 | STATUSF_IP4);
+ printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status());
+ write_c0_status(0x1100dc00);
+ printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status());
+ for (i = 0; i < ARRAY_SIZE(ipiirq); i++) {
+ setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, &irq_resched);
+ setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].call, &irq_call);
+
+ set_irq_handler(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, handle_percpu_irq);
+ set_irq_handler(MIPS_GIC_IRQ_BASE + ipiirq[i].call, handle_percpu_irq);
+ }
+ } else {
+ /* set up ipi interrupts */
+ if (cpu_has_veic) {
+ set_vi_handler (MSC01E_INT_SW0, ipi_resched_dispatch);
+ set_vi_handler (MSC01E_INT_SW1, ipi_call_dispatch);
+ cpu_ipi_resched_irq = MSC01E_INT_SW0;
+ cpu_ipi_call_irq = MSC01E_INT_SW1;
+ } else {
+ if (cpu_has_vint) {
+ set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch);
+ set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch);
+ }
+ cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ;
+ cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ;
+ }
+
+ setup_irq(cpu_ipi_resched_irq, &irq_resched);
+ setup_irq(cpu_ipi_call_irq, &irq_call);
+
+ set_irq_handler(cpu_ipi_resched_irq, handle_percpu_irq);
+ set_irq_handler(cpu_ipi_call_irq, handle_percpu_irq);
+ }
+#endif
+}
+
+void malta_be_init(void)
+{
+ if (gcmp_present) {
+ /* Could change CM error mask register */
+ }
+}
+
+
+static char *tr[8] = {
+ "mem", "gcr", "gic", "mmio",
+ "0x04", "0x05", "0x06", "0x07"
+};
+
+static char *mcmd[32] = {
+ [0x00] = "0x00",
+ [0x01] = "Legacy Write",
+ [0x02] = "Legacy Read",
+ [0x03] = "0x03",
+ [0x04] = "0x04",
+ [0x05] = "0x05",
+ [0x06] = "0x06",
+ [0x07] = "0x07",
+ [0x08] = "Coherent Read Own",
+ [0x09] = "Coherent Read Share",
+ [0x0a] = "Coherent Read Discard",
+ [0x0b] = "Coherent Ready Share Always",
+ [0x0c] = "Coherent Upgrade",
+ [0x0d] = "Coherent Writeback",
+ [0x0e] = "0x0e",
+ [0x0f] = "0x0f",
+ [0x10] = "Coherent Copyback",
+ [0x11] = "Coherent Copyback Invalidate",
+ [0x12] = "Coherent Invalidate",
+ [0x13] = "Coherent Write Invalidate",
+ [0x14] = "Coherent Completion Sync",
+ [0x15] = "0x15",
+ [0x16] = "0x16",
+ [0x17] = "0x17",
+ [0x18] = "0x18",
+ [0x19] = "0x19",
+ [0x1a] = "0x1a",
+ [0x1b] = "0x1b",
+ [0x1c] = "0x1c",
+ [0x1d] = "0x1d",
+ [0x1e] = "0x1e",
+ [0x1f] = "0x1f"
+};
+
+static char *core[8] = {
+ "Invalid/OK", "Invalid/Data",
+ "Shared/OK", "Shared/Data",
+ "Modified/OK", "Modified/Data",
+ "Exclusive/OK", "Exclusive/Data"
+};
+
+static char *causes[32] = {
+ "None", "GC_WR_ERR", "GC_RD_ERR", "COH_WR_ERR",
+ "COH_RD_ERR", "MMIO_WR_ERR", "MMIO_RD_ERR", "0x07",
+ "0x08", "0x09", "0x0a", "0x0b",
+ "0x0c", "0x0d", "0x0e", "0x0f",
+ "0x10", "0x11", "0x12", "0x13",
+ "0x14", "0x15", "0x16", "INTVN_WR_ERR",
+ "INTVN_RD_ERR", "0x19", "0x1a", "0x1b",
+ "0x1c", "0x1d", "0x1e", "0x1f"
+};
+
+int malta_be_handler(struct pt_regs *regs, int is_fixup)
+{
+ /* This duplicates the handling in do_be which seems wrong */
+ int retval = is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
+
+ if (gcmp_present) {
+ unsigned long cm_error = GCMPGCB(GCMEC);
+ unsigned long cm_addr = GCMPGCB(GCMEA);
+ unsigned long cm_other = GCMPGCB(GCMEO);
+ unsigned long cause, ocause;
+ char buf[256];
+
+ cause = (cm_error & GCMP_GCB_GMEC_ERROR_TYPE_MSK);
+ if (cause != 0) {
+ cause >>= GCMP_GCB_GMEC_ERROR_TYPE_SHF;
+ if (cause < 16) {
+ unsigned long cca_bits = (cm_error >> 15) & 7;
+ unsigned long tr_bits = (cm_error >> 12) & 7;
+ unsigned long mcmd_bits = (cm_error >> 7) & 0x1f;
+ unsigned long stag_bits = (cm_error >> 3) & 15;
+ unsigned long sport_bits = (cm_error >> 0) & 7;
+
+ snprintf(buf, sizeof(buf),
+ "CCA=%lu TR=%s MCmd=%s STag=%lu "
+ "SPort=%lu\n",
+ cca_bits, tr[tr_bits], mcmd[mcmd_bits],
+ stag_bits, sport_bits);
+ } else {
+ /* glob state & sresp together */
+ unsigned long c3_bits = (cm_error >> 18) & 7;
+ unsigned long c2_bits = (cm_error >> 15) & 7;
+ unsigned long c1_bits = (cm_error >> 12) & 7;
+ unsigned long c0_bits = (cm_error >> 9) & 7;
+ unsigned long sc_bit = (cm_error >> 8) & 1;
+ unsigned long mcmd_bits = (cm_error >> 3) & 0x1f;
+ unsigned long sport_bits = (cm_error >> 0) & 7;
+ snprintf(buf, sizeof(buf),
+ "C3=%s C2=%s C1=%s C0=%s SC=%s "
+ "MCmd=%s SPort=%lu\n",
+ core[c3_bits], core[c2_bits],
+ core[c1_bits], core[c0_bits],
+ sc_bit ? "True" : "False",
+ mcmd[mcmd_bits], sport_bits);
+ }
+
+ ocause = (cm_other & GCMP_GCB_GMEO_ERROR_2ND_MSK) >>
+ GCMP_GCB_GMEO_ERROR_2ND_SHF;
+
+ printk("CM_ERROR=%08lx %s <%s>\n", cm_error,
+ causes[cause], buf);
+ printk("CM_ADDR =%08lx\n", cm_addr);
+ printk("CM_OTHER=%08lx %s\n", cm_other, causes[ocause]);
+
+ /* reprime cause register */
+ GCMPGCB(GCMEC) = 0;
+ }
+ }
+
+ return retval;
+}
diff --git a/arch/mips/mips-boards/generic/gdb_hook.c b/arch/mips/mti-malta/malta-kgdb.c
similarity index 100%
rename from arch/mips/mips-boards/generic/gdb_hook.c
rename to arch/mips/mti-malta/malta-kgdb.c
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c
new file mode 100644
index 0000000..61888ff
--- /dev/null
+++ b/arch/mips/mti-malta/malta-memory.c
@@ -0,0 +1,177 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * PROM library functions for acquiring/using memory descriptors given to
+ * us from the YAMON.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <linux/pfn.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/page.h>
+#include <asm/sections.h>
+
+#include <asm/mips-boards/prom.h>
+
+/*#define DEBUG*/
+
+enum yamon_memtypes {
+ yamon_dontuse,
+ yamon_prom,
+ yamon_free,
+};
+static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
+
+#ifdef DEBUG
+static char *mtypes[3] = {
+ "Dont use memory",
+ "YAMON PROM memory",
+ "Free memmory",
+};
+#endif
+
+/* determined physical memory size, not overridden by command line args */
+unsigned long physical_memsize = 0L;
+
+static struct prom_pmemblock * __init prom_getmdesc(void)
+{
+ char *memsize_str;
+ unsigned int memsize;
+ char cmdline[CL_SIZE], *ptr;
+
+ /* otherwise look in the environment */
+ memsize_str = prom_getenv("memsize");
+ if (!memsize_str) {
+ printk(KERN_WARNING
+ "memsize not set in boot prom, set to default (32Mb)\n");
+ physical_memsize = 0x02000000;
+ } else {
+#ifdef DEBUG
+ pr_debug("prom_memsize = %s\n", memsize_str);
+#endif
+ physical_memsize = simple_strtol(memsize_str, NULL, 0);
+ }
+
+#ifdef CONFIG_CPU_BIG_ENDIAN
+ /* SOC-it swaps, or perhaps doesn't swap, when DMA'ing the last
+ word of physical memory */
+ physical_memsize -= PAGE_SIZE;
+#endif
+
+ /* Check the command line for a memsize directive that overrides
+ the physical/default amount */
+ strcpy(cmdline, arcs_cmdline);
+ ptr = strstr(cmdline, "memsize=");
+ if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
+ ptr = strstr(ptr, " memsize=");
+
+ if (ptr)
+ memsize = memparse(ptr + 8, &ptr);
+ else
+ memsize = physical_memsize;
+
+ memset(mdesc, 0, sizeof(mdesc));
+
+ mdesc[0].type = yamon_dontuse;
+ mdesc[0].base = 0x00000000;
+ mdesc[0].size = 0x00001000;
+
+ mdesc[1].type = yamon_prom;
+ mdesc[1].base = 0x00001000;
+ mdesc[1].size = 0x000ef000;
+
+ /*
+ * The area 0x000f0000-0x000fffff is allocated for BIOS memory by the
+ * south bridge and PCI access always forwarded to the ISA Bus and
+ * BIOSCS# is always generated.
+ * This mean that this area can't be used as DMA memory for PCI
+ * devices.
+ */
+ mdesc[2].type = yamon_dontuse;
+ mdesc[2].base = 0x000f0000;
+ mdesc[2].size = 0x00010000;
+
+ mdesc[3].type = yamon_dontuse;
+ mdesc[3].base = 0x00100000;
+ mdesc[3].size = CPHYSADDR(PFN_ALIGN((unsigned long)&_end)) - mdesc[3].base;
+
+ mdesc[4].type = yamon_free;
+ mdesc[4].base = CPHYSADDR(PFN_ALIGN(&_end));
+ mdesc[4].size = memsize - mdesc[4].base;
+
+ return &mdesc[0];
+}
+
+static int __init prom_memtype_classify(unsigned int type)
+{
+ switch (type) {
+ case yamon_free:
+ return BOOT_MEM_RAM;
+ case yamon_prom:
+ return BOOT_MEM_ROM_DATA;
+ default:
+ return BOOT_MEM_RESERVED;
+ }
+}
+
+void __init prom_meminit(void)
+{
+ struct prom_pmemblock *p;
+
+#ifdef DEBUG
+ pr_debug("YAMON MEMORY DESCRIPTOR dump:\n");
+ p = prom_getmdesc();
+ while (p->size) {
+ int i = 0;
+ pr_debug("[%d,%p]: base<%08lx> size<%08lx> type<%s>\n",
+ i, p, p->base, p->size, mtypes[p->type]);
+ p++;
+ i++;
+ }
+#endif
+ p = prom_getmdesc();
+
+ while (p->size) {
+ long type;
+ unsigned long base, size;
+
+ type = prom_memtype_classify(p->type);
+ base = p->base;
+ size = p->size;
+
+ add_memory_region(base, size, type);
+ p++;
+ }
+}
+
+void __init prom_free_prom_memory(void)
+{
+ unsigned long addr;
+ int i;
+
+ for (i = 0; i < boot_mem_map.nr_map; i++) {
+ if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA)
+ continue;
+
+ addr = boot_mem_map.map[i].addr;
+ free_init_pages("prom memory",
+ addr, addr + boot_mem_map.map[i].size);
+ }
+}
diff --git a/arch/mips/mips-boards/malta/malta_mtd.c b/arch/mips/mti-malta/malta-mtd.c
similarity index 100%
rename from arch/mips/mips-boards/malta/malta_mtd.c
rename to arch/mips/mti-malta/malta-mtd.c
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mti-malta/malta-pci.c
similarity index 100%
rename from arch/mips/mips-boards/generic/pci.c
rename to arch/mips/mti-malta/malta-pci.c
diff --git a/arch/mips/mips-boards/malta/malta_platform.c b/arch/mips/mti-malta/malta-platform.c
similarity index 100%
rename from arch/mips/mips-boards/malta/malta_platform.c
rename to arch/mips/mti-malta/malta-platform.c
diff --git a/arch/mips/mti-malta/malta-reset.c b/arch/mips/mti-malta/malta-reset.c
new file mode 100644
index 0000000..42dee4d
--- /dev/null
+++ b/arch/mips/mti-malta/malta-reset.c
@@ -0,0 +1,56 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * ########################################################################
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * ########################################################################
+ *
+ * Reset the MIPS boards.
+ *
+ */
+#include <linux/pm.h>
+
+#include <asm/io.h>
+#include <asm/reboot.h>
+#include <asm/mips-boards/generic.h>
+
+static void mips_machine_restart(char *command);
+static void mips_machine_halt(void);
+
+static void mips_machine_restart(char *command)
+{
+ unsigned int __iomem *softres_reg =
+ ioremap(SOFTRES_REG, sizeof(unsigned int));
+
+ __raw_writel(GORESET, softres_reg);
+}
+
+static void mips_machine_halt(void)
+{
+ unsigned int __iomem *softres_reg =
+ ioremap(SOFTRES_REG, sizeof(unsigned int));
+
+ __raw_writel(GORESET, softres_reg);
+}
+
+
+void mips_reboot_setup(void)
+{
+ _machine_restart = mips_machine_restart;
+ _machine_halt = mips_machine_halt;
+ pm_power_off = mips_machine_halt;
+}
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mti-malta/malta-setup.c
similarity index 100%
rename from arch/mips/mips-boards/malta/malta_setup.c
rename to arch/mips/mti-malta/malta-setup.c
diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mti-malta/malta-smtc.c
similarity index 100%
rename from arch/mips/mips-boards/malta/malta_smtc.c
rename to arch/mips/mti-malta/malta-smtc.c
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
new file mode 100644
index 0000000..0b97d47
--- /dev/null
+++ b/arch/mips/mti-malta/malta-time.c
@@ -0,0 +1,163 @@
+/*
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can distribute it and/or modify it
+ * under the terms of the GNU General Public License (Version 2) as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Setting up the clock on the MIPS boards.
+ */
+
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/sched.h>
+#include <linux/spinlock.h>
+#include <linux/interrupt.h>
+#include <linux/time.h>
+#include <linux/timex.h>
+#include <linux/mc146818rtc.h>
+
+#include <asm/mipsregs.h>
+#include <asm/mipsmtregs.h>
+#include <asm/hardirq.h>
+#include <asm/i8253.h>
+#include <asm/irq.h>
+#include <asm/div64.h>
+#include <asm/cpu.h>
+#include <asm/time.h>
+#include <asm/mc146818-time.h>
+#include <asm/msc01_ic.h>
+
+#include <asm/mips-boards/generic.h>
+#include <asm/mips-boards/prom.h>
+
+#include <asm/mips-boards/maltaint.h>
+
+unsigned long cpu_khz;
+
+static int mips_cpu_timer_irq;
+static int mips_cpu_perf_irq;
+extern int cp0_perfcount_irq;
+
+static void mips_timer_dispatch(void)
+{
+ do_IRQ(mips_cpu_timer_irq);
+}
+
+static void mips_perf_dispatch(void)
+{
+ do_IRQ(mips_cpu_perf_irq);
+}
+
+/*
+ * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
+ */
+static unsigned int __init estimate_cpu_frequency(void)
+{
+ unsigned int prid = read_c0_prid() & 0xffff00;
+ unsigned int count;
+
+ unsigned long flags;
+ unsigned int start;
+
+ local_irq_save(flags);
+
+ /* Start counter exactly on falling edge of update flag */
+ while (CMOS_READ(RTC_REG_A) & RTC_UIP);
+ while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
+
+ /* Start r4k counter. */
+ start = read_c0_count();
+
+ /* Read counter exactly on falling edge of update flag */
+ while (CMOS_READ(RTC_REG_A) & RTC_UIP);
+ while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
+
+ count = read_c0_count() - start;
+
+ /* restore interrupts */
+ local_irq_restore(flags);
+
+ mips_hpt_frequency = count;
+ if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) &&
+ (prid != (PRID_COMP_MIPS | PRID_IMP_25KF)))
+ count *= 2;
+
+ count += 5000; /* round */
+ count -= count%10000;
+
+ return count;
+}
+
+unsigned long read_persistent_clock(void)
+{
+ return mc146818_get_cmos_time();
+}
+
+static void __init plat_perf_setup(void)
+{
+#ifdef MSC01E_INT_BASE
+ if (cpu_has_veic) {
+ set_vi_handler(MSC01E_INT_PERFCTR, mips_perf_dispatch);
+ mips_cpu_perf_irq = MSC01E_INT_BASE + MSC01E_INT_PERFCTR;
+ } else
+#endif
+ if (cp0_perfcount_irq >= 0) {
+ if (cpu_has_vint)
+ set_vi_handler(cp0_perfcount_irq, mips_perf_dispatch);
+ mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
+#ifdef CONFIG_SMP
+ set_irq_handler(mips_cpu_perf_irq, handle_percpu_irq);
+#endif
+ }
+}
+
+unsigned int __cpuinit get_c0_compare_int(void)
+{
+#ifdef MSC01E_INT_BASE
+ if (cpu_has_veic) {
+ set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
+ mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
+ } else
+#endif
+ {
+ if (cpu_has_vint)
+ set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
+ mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
+ }
+
+ return mips_cpu_timer_irq;
+}
+
+void __init plat_time_init(void)
+{
+ unsigned int est_freq;
+
+ /* Set Data mode - binary. */
+ CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL);
+
+ est_freq = estimate_cpu_frequency();
+
+ printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
+ (est_freq%1000000)*100/1000000);
+
+ cpu_khz = est_freq / 1000;
+
+ mips_scroll_message();
+#ifdef CONFIG_I8253 /* Only Malta has a PIT */
+ setup_pit_timer();
+#endif
+
+ plat_perf_setup();
+}
diff --git a/arch/mips/nxp/pnx8550/common/platform.c b/arch/mips/nxp/pnx8550/common/platform.c
index c7c763d..21d2955 100644
--- a/arch/mips/nxp/pnx8550/common/platform.c
+++ b/arch/mips/nxp/pnx8550/common/platform.c
@@ -13,6 +13,7 @@
* warranty of any kind, whether express or implied.
*/
#include <linux/device.h>
+#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/resource.h>
@@ -91,16 +92,16 @@
};
/* The dmamask must be set for OHCI to work */
-static u64 ohci_dmamask = ~(u32)0;
+static u64 ohci_dmamask = DMA_32BIT_MASK;
-static u64 uart_dmamask = ~(u32)0;
+static u64 uart_dmamask = DMA_32BIT_MASK;
static struct platform_device pnx8550_usb_ohci_device = {
.name = "pnx8550-ohci",
.id = -1,
.dev = {
.dma_mask = &ohci_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
},
.num_resources = ARRAY_SIZE(pnx8550_usb_ohci_resources),
.resource = pnx8550_usb_ohci_resources,
@@ -111,7 +112,7 @@
.id = -1,
.dev = {
.dma_mask = &uart_dmamask,
- .coherent_dma_mask = 0xffffffff,
+ .coherent_dma_mask = DMA_32BIT_MASK,
.platform_data = pnx8xxx_ports,
},
.num_resources = ARRAY_SIZE(pnx8550_uart_resources),
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index ed0c076..57e34ca 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -11,17 +11,16 @@
obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
-obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
+obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o
obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
-obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
+obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
#
# These are still pretty much in the old state, watch, go blind.
#
obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
obj-$(CONFIG_LASAT) += pci-lasat.o
-obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
@@ -42,9 +41,11 @@
obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o
obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o
-obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o pci-jmr3927.o
-obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o ops-tx4927.o
-obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-tx4938.o ops-tx4938.o
+obj-$(CONFIG_TOSHIBA_JMR3927) += fixup-jmr3927.o
+obj-$(CONFIG_SOC_TX4927) += pci-tx4927.o
+obj-$(CONFIG_SOC_TX4938) += pci-tx4938.o
+obj-$(CONFIG_TOSHIBA_RBTX4927) += fixup-rbtx4927.o
+obj-$(CONFIG_TOSHIBA_RBTX4938) += fixup-rbtx4938.o
obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o
obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o
obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
diff --git a/arch/mips/pci/fixup-atlas.c b/arch/mips/pci/fixup-atlas.c
deleted file mode 100644
index 506e883..0000000
--- a/arch/mips/pci/fixup-atlas.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved.
- * Author: Maciej W. Rozycki <macro@mips.com>
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/mips-boards/atlasint.h>
-
-#define PCIA ATLAS_INT_PCIA
-#define PCIB ATLAS_INT_PCIB
-#define PCIC ATLAS_INT_PCIC
-#define PCID ATLAS_INT_PCID
-#define INTA ATLAS_INT_INTA
-#define INTB ATLAS_INT_INTB
-#define ETH ATLAS_INT_ETH
-#define INTC ATLAS_INT_INTC
-#define SCSI ATLAS_INT_SCSI
-#define INTD ATLAS_INT_INTD
-
-static char irq_tab[][5] __initdata = {
- /* INTA INTB INTC INTD */
- {0, 0, 0, 0, 0 }, /* 0: Unused */
- {0, 0, 0, 0, 0 }, /* 1: Unused */
- {0, 0, 0, 0, 0 }, /* 2: Unused */
- {0, 0, 0, 0, 0 }, /* 3: Unused */
- {0, 0, 0, 0, 0 }, /* 4: Unused */
- {0, 0, 0, 0, 0 }, /* 5: Unused */
- {0, 0, 0, 0, 0 }, /* 6: Unused */
- {0, 0, 0, 0, 0 }, /* 7: Unused */
- {0, 0, 0, 0, 0 }, /* 8: Unused */
- {0, 0, 0, 0, 0 }, /* 9: Unused */
- {0, 0, 0, 0, 0 }, /* 10: Unused */
- {0, 0, 0, 0, 0 }, /* 11: Unused */
- {0, 0, 0, 0, 0 }, /* 12: Unused */
- {0, 0, 0, 0, 0 }, /* 13: Unused */
- {0, 0, 0, 0, 0 }, /* 14: Unused */
- {0, PCIA, PCIB, PCIC, PCID }, /* 15: cPCI (behind 21150) */
- {0, SCSI, 0, 0, 0 }, /* 16: SYM53C810A SCSI */
- {0, 0, 0, 0, 0 }, /* 17: Core */
- {0, INTA, INTB, INTC, INTD }, /* 18: PCI Slot */
- {0, ETH, 0, 0, 0 }, /* 19: SAA9730 Eth. et al. */
- {0, 0, 0, 0, 0 }, /* 20: Unused */
- {0, 0, 0, 0, 0 } /* 21: Unused */
-};
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- return irq_tab[slot][pin];
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
-
-#ifdef CONFIG_KGDB
-/*
- * The PCI scan may have moved the saa9730 I/O address, so reread
- * the address here.
- * This does mean that it's not possible to debug the PCI bus configuration
- * code, but it is better than nothing...
- */
-
-static void atlas_saa9730_base_fixup(struct pci_dev *pdev)
-{
- extern void *saa9730_base;
- if (pdev->bus == 0 && PCI_SLOT(pdev->devfn) == 19)
- (void) pci_read_config_dword(pdev, 0x14, (u32 *)&saa9730_base);
- printk("saa9730_base = %x\n", saa9730_base);
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
- atlas_saa9730_base_fixup);
-
-#endif
diff --git a/arch/mips/pci/fixup-jmr3927.c b/arch/mips/pci/fixup-jmr3927.c
index e974394..0f10695 100644
--- a/arch/mips/pci/fixup-jmr3927.c
+++ b/arch/mips/pci/fixup-jmr3927.c
@@ -28,36 +28,31 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/init.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/jmr3927.h>
-#include <asm/jmr3927/jmr3927.h>
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+int __init jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
unsigned char irq = pin;
- /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
- if (dev->vendor == PCI_VENDOR_ID_EFAR &&
- dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)
- return irq;
/* IRQ rotation (PICMG) */
irq--; /* 0-3 */
- if (dev->bus->parent == NULL &&
- slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
+ if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
/* PCI CardSlot (IDSEL=A23, DevNu=12) */
/* PCIA => PCIC (IDSEL=A23) */
/* NOTE: JMR3927 JP1 must be set to OPEN */
irq = (irq + 2) % 4;
- } else if (dev->bus->parent == NULL &&
- slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
+ } else if (slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
/* PCI CardSlot (IDSEL=A22, DevNu=11) */
/* PCIA => PCIA (IDSEL=A22) */
/* NOTE: JMR3927 JP1 must be set to OPEN */
irq = (irq + 0) % 4;
} else {
/* PCI Backplane */
- irq = (irq + 3 + slot) % 4;
+ if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
+ irq = (irq + 33 - slot) % 4;
+ else
+ irq = (irq + 3 + slot) % 4;
}
irq++; /* 1-4 */
@@ -66,15 +61,13 @@
irq = JMR3927_IRQ_IOC_PCIA;
break;
case 2:
- // wrong for backplane irq = JMR3927_IRQ_IOC_PCIB;
- irq = JMR3927_IRQ_IOC_PCID;
+ irq = JMR3927_IRQ_IOC_PCIB;
break;
case 3:
irq = JMR3927_IRQ_IOC_PCIC;
break;
case 4:
- // wrong for backplane irq = JMR3927_IRQ_IOC_PCID;
- irq = JMR3927_IRQ_IOC_PCIB;
+ irq = JMR3927_IRQ_IOC_PCID;
break;
}
@@ -84,9 +77,3 @@
irq = JMR3927_IRQ_ETHER0;
return irq;
}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
diff --git a/arch/mips/pci/fixup-rbtx4927.c b/arch/mips/pci/fixup-rbtx4927.c
index 7450c33..321db265 100644
--- a/arch/mips/pci/fixup-rbtx4927.c
+++ b/arch/mips/pci/fixup-rbtx4927.c
@@ -33,108 +33,41 @@
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/rbtx4927.h>
-#include <asm/tx4927/tx4927.h>
-#include <asm/tx4927/tx4927_pci.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-/* look up table for backplane pci irq for slots 17-20 by pin # */
-static unsigned char backplane_pci_irq[4][4] = {
- /* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
- /* PJ6 SLOT: 17, PIN: 2 */
- TX4927_IRQ_IOC_PCIB,
- /* PJ6 SLOT: 17, PIN: 3 */
- TX4927_IRQ_IOC_PCIC,
- /* PJ6 SLOT: 17, PIN: 4 */
- TX4927_IRQ_IOC_PCID},
- /* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
- /* SB SLOT: 18, PIN: 2 */
- TX4927_IRQ_IOC_PCIC,
- /* SB SLOT: 18, PIN: 3 */
- TX4927_IRQ_IOC_PCID,
- /* SB SLOT: 18, PIN: 4 */
- TX4927_IRQ_IOC_PCIA},
- /* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
- /* PJ5 SLOT: 19, PIN: 2 */
- TX4927_IRQ_IOC_PCID,
- /* PJ5 SLOT: 19, PIN: 3 */
- TX4927_IRQ_IOC_PCIA,
- /* PJ5 SLOT: 19, PIN: 4 */
- TX4927_IRQ_IOC_PCIB},
- /* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
- /* PJ4 SLOT: 20, PIN: 2 */
- TX4927_IRQ_IOC_PCIA,
- /* PJ4 SLOT: 20, PIN: 3 */
- TX4927_IRQ_IOC_PCIB,
- /* PJ4 SLOT: 20, PIN: 4 */
- TX4927_IRQ_IOC_PCIC}
-};
-
-static int pci_get_irq(const struct pci_dev *dev, int pin)
+int __init rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
unsigned char irq = pin;
- DBG("pci_get_irq: pin is %d\n", pin);
/* IRQ rotation */
irq--; /* 0-3 */
- if (dev->bus->parent == NULL &&
- PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
- printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
- PCI_SLOT(dev->devfn));
- /* IDSEL=A23 is tx4927 onboard pci slot */
- irq = (irq + PCI_SLOT(dev->devfn)) % 4;
- irq++; /* 1-4 */
- DBG("irq is now %d\n", irq);
-
- switch (irq) {
- case 1:
- irq = TX4927_IRQ_IOC_PCIA;
- break;
- case 2:
- irq = TX4927_IRQ_IOC_PCIB;
- break;
- case 3:
- irq = TX4927_IRQ_IOC_PCIC;
- break;
- case 4:
- irq = TX4927_IRQ_IOC_PCID;
- break;
- }
+ if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
+ /* PCI CardSlot (IDSEL=A23) */
+ /* PCIA => PCIA */
+ irq = (irq + 0 + slot) % 4;
} else {
/* PCI Backplane */
- DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
- PCI_SLOT(dev->devfn));
- irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
+ if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
+ irq = (irq + 33 - slot) % 4;
+ else
+ irq = (irq + 3 + slot) % 4;
}
- DBG("assigned irq %d\n", irq);
+ irq++; /* 1-4 */
+
+ switch (irq) {
+ case 1:
+ irq = RBTX4927_IRQ_IOC_PCIA;
+ break;
+ case 2:
+ irq = RBTX4927_IRQ_IOC_PCIB;
+ break;
+ case 3:
+ irq = RBTX4927_IRQ_IOC_PCIC;
+ break;
+ case 4:
+ irq = RBTX4927_IRQ_IOC_PCID;
+ break;
+ }
return irq;
}
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- unsigned char irq;
-
- printk("PCI Setup for pin %d \n", pin);
-
- if (dev->device == 0x9130) /* IDE */
- irq = 14;
- else
- irq = pci_get_irq(dev, pin);
-
- return irq;
-}
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
diff --git a/arch/mips/pci/fixup-rbtx4938.c b/arch/mips/pci/fixup-rbtx4938.c
new file mode 100644
index 0000000..a80579a
--- /dev/null
+++ b/arch/mips/pci/fixup-rbtx4938.c
@@ -0,0 +1,53 @@
+/*
+ * Toshiba rbtx4938 pci routines
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#include <linux/types.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/rbtx4938.h>
+
+int __init rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int irq = tx4938_pcic1_map_irq(dev, slot);
+
+ if (irq >= 0)
+ return irq;
+ irq = pin;
+ /* IRQ rotation */
+ irq--; /* 0-3 */
+ if (slot == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
+ /* PCI CardSlot (IDSEL=A23) */
+ /* PCIA => PCIA (IDSEL=A23) */
+ irq = (irq + 0 + slot) % 4;
+ } else {
+ /* PCI Backplane */
+ if (txx9_pci_option & TXX9_PCI_OPT_PICMG)
+ irq = (irq + 33 - slot) % 4;
+ else
+ irq = (irq + 3 + slot) % 4;
+ }
+ irq++; /* 1-4 */
+
+ switch (irq) {
+ case 1:
+ irq = RBTX4938_IRQ_IOC_PCIA;
+ break;
+ case 2:
+ irq = RBTX4938_IRQ_IOC_PCIB;
+ break;
+ case 3:
+ irq = RBTX4938_IRQ_IOC_PCIC;
+ break;
+ case 4:
+ irq = RBTX4938_IRQ_IOC_PCID;
+ break;
+ }
+ return irq;
+}
diff --git a/arch/mips/pci/fixup-tx4938.c b/arch/mips/pci/fixup-tx4938.c
deleted file mode 100644
index f2ba06e..0000000
--- a/arch/mips/pci/fixup-tx4938.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * Toshiba rbtx4938 pci routines
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/tx4938/rbtx4938.h>
-
-extern struct pci_controller tx4938_pci_controller[];
-
-static int pci_get_irq(const struct pci_dev *dev, int pin)
-{
- int irq = pin;
- u8 slot = PCI_SLOT(dev->devfn);
- struct pci_controller *controller = (struct pci_controller *)dev->sysdata;
-
- if (controller == &tx4938_pci_controller[1]) {
- /* TX4938 PCIC1 */
- switch (slot) {
- case TX4938_PCIC_IDSEL_AD_TO_SLOT(31):
- if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH0_SEL)
- return RBTX4938_IRQ_IRC + TX4938_IR_ETH0;
- break;
- case TX4938_PCIC_IDSEL_AD_TO_SLOT(30):
- if (tx4938_ccfgptr->pcfg & TX4938_PCFG_ETH1_SEL)
- return RBTX4938_IRQ_IRC + TX4938_IR_ETH1;
- break;
- }
- return 0;
- }
-
- /* IRQ rotation */
- irq--; /* 0-3 */
- if (dev->bus->parent == NULL &&
- (slot == TX4938_PCIC_IDSEL_AD_TO_SLOT(23))) {
- /* PCI CardSlot (IDSEL=A23) */
- /* PCIA => PCIA (IDSEL=A23) */
- irq = (irq + 0 + slot) % 4;
- } else {
- /* PCI Backplane */
- irq = (irq + 33 - slot) % 4;
- }
- irq++; /* 1-4 */
-
- switch (irq) {
- case 1:
- irq = RBTX4938_IRQ_IOC_PCIA;
- break;
- case 2:
- irq = RBTX4938_IRQ_IOC_PCIB;
- break;
- case 3:
- irq = RBTX4938_IRQ_IOC_PCIC;
- break;
- case 4:
- irq = RBTX4938_IRQ_IOC_PCID;
- break;
- }
- return irq;
-}
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- unsigned char irq = 0;
-
- irq = pci_get_irq(dev, pin);
-
- printk(KERN_INFO "PCI: 0x%02x:0x%02x(0x%02x,0x%02x) IRQ=%d\n",
- dev->bus->number, dev->devfn, PCI_SLOT(dev->devfn),
- PCI_FUNC(dev->devfn), irq);
-
- return irq;
-}
-
-/*
- * Do platform specific device initialization at pci_enable_device() time
- */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- return 0;
-}
-
diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c
deleted file mode 100644
index de5e5f6..0000000
--- a/arch/mips/pci/fixup-vr4133.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/*
- * arch/mips/pci/fixup-vr4133.c
- *
- * The NEC CMB-VR4133 Board specific PCI fixups.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Modified for support in 2.6
- * Author: Manish Lachwani (mlachwani@mvista.com)
- *
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-
-#include <asm/io.h>
-#include <asm/i8259.h>
-#include <asm/vr41xx/cmbvr4133.h>
-
-extern int vr4133_rockhopper;
-extern void ali_m1535plus_init(struct pci_dev *dev);
-extern void ali_m5229_init(struct pci_dev *dev);
-
-/* Do platform specific device initialization at pci_enable_device() time */
-int pcibios_plat_dev_init(struct pci_dev *dev)
-{
- /*
- * We have to reset AMD PCnet adapter on Rockhopper since
- * PMON leaves it enabled and generating interrupts. This leads
- * to a lock if some PCI device driver later enables the IRQ line
- * shared with PCnet and there is no AMD PCnet driver to catch its
- * interrupts.
- */
-#ifdef CONFIG_ROCKHOPPER
- if (dev->vendor == PCI_VENDOR_ID_AMD &&
- dev->device == PCI_DEVICE_ID_AMD_LANCE) {
- inl(pci_resource_start(dev, 0) + 0x18);
- }
-#endif
-
- /*
- * we have to open the bridges' windows down to 0 because otherwise
- * we cannot access ISA south bridge I/O registers that get mapped from
- * 0. for example, 8259 PIC would be unaccessible without that
- */
- if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) {
- pci_write_config_byte(dev, PCI_IO_BASE, 0);
- if(dev->bus->number == 0) {
- pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 0);
- } else {
- pci_write_config_word(dev, PCI_IO_BASE_UPPER16, 1);
- }
- }
-
- return 0;
-}
-
-/*
- * M1535 IRQ mapping
- * Feel free to change this, although it shouldn't be needed
- */
-#define M1535_IRQ_INTA 7
-#define M1535_IRQ_INTB 9
-#define M1535_IRQ_INTC 10
-#define M1535_IRQ_INTD 11
-
-#define M1535_IRQ_USB 9
-#define M1535_IRQ_IDE 14
-#define M1535_IRQ_IDE2 15
-#define M1535_IRQ_PS2 12
-#define M1535_IRQ_RTC 8
-#define M1535_IRQ_FDC 6
-#define M1535_IRQ_AUDIO 5
-#define M1535_IRQ_COM1 4
-#define M1535_IRQ_COM2 4
-#define M1535_IRQ_IRDA 3
-#define M1535_IRQ_KBD 1
-#define M1535_IRQ_TMR 0
-
-/* Rockhopper "slots" assignment; this is hard-coded ... */
-#define ROCKHOPPER_M5451_SLOT 1
-#define ROCKHOPPER_M1535_SLOT 2
-#define ROCKHOPPER_M5229_SLOT 11
-#define ROCKHOPPER_M5237_SLOT 15
-#define ROCKHOPPER_PMU_SLOT 12
-/* ... and hard-wired. */
-#define ROCKHOPPER_PCI1_SLOT 3
-#define ROCKHOPPER_PCI2_SLOT 4
-#define ROCKHOPPER_PCI3_SLOT 5
-#define ROCKHOPPER_PCI4_SLOT 6
-#define ROCKHOPPER_PCNET_SLOT 1
-
-#define M1535_IRQ_MASK(n) (1 << (n))
-
-#define M1535_IRQ_EDGE (M1535_IRQ_MASK(M1535_IRQ_TMR) | \
- M1535_IRQ_MASK(M1535_IRQ_KBD) | \
- M1535_IRQ_MASK(M1535_IRQ_COM1) | \
- M1535_IRQ_MASK(M1535_IRQ_COM2) | \
- M1535_IRQ_MASK(M1535_IRQ_IRDA) | \
- M1535_IRQ_MASK(M1535_IRQ_RTC) | \
- M1535_IRQ_MASK(M1535_IRQ_FDC) | \
- M1535_IRQ_MASK(M1535_IRQ_PS2))
-
-#define M1535_IRQ_LEVEL (M1535_IRQ_MASK(M1535_IRQ_IDE) | \
- M1535_IRQ_MASK(M1535_IRQ_USB) | \
- M1535_IRQ_MASK(M1535_IRQ_INTA) | \
- M1535_IRQ_MASK(M1535_IRQ_INTB) | \
- M1535_IRQ_MASK(M1535_IRQ_INTC) | \
- M1535_IRQ_MASK(M1535_IRQ_INTD))
-
-struct irq_map_entry {
- u16 bus;
- u8 slot;
- u8 irq;
-};
-static struct irq_map_entry int_map[] = {
- {1, ROCKHOPPER_M5451_SLOT, M1535_IRQ_AUDIO}, /* Audio controller */
- {1, ROCKHOPPER_PCI1_SLOT, M1535_IRQ_INTD}, /* PCI slot #1 */
- {1, ROCKHOPPER_PCI2_SLOT, M1535_IRQ_INTC}, /* PCI slot #2 */
- {1, ROCKHOPPER_M5237_SLOT, M1535_IRQ_USB}, /* USB host controller */
- {1, ROCKHOPPER_M5229_SLOT, IDE_PRIMARY_IRQ}, /* IDE controller */
- {2, ROCKHOPPER_PCNET_SLOT, M1535_IRQ_INTD}, /* AMD Am79c973 on-board
- ethernet */
- {2, ROCKHOPPER_PCI3_SLOT, M1535_IRQ_INTB}, /* PCI slot #3 */
- {2, ROCKHOPPER_PCI4_SLOT, M1535_IRQ_INTC} /* PCI slot #4 */
-};
-
-static int pci_intlines[] =
- { M1535_IRQ_INTA, M1535_IRQ_INTB, M1535_IRQ_INTC, M1535_IRQ_INTD };
-
-/* Determine the Rockhopper IRQ line number for the PCI device */
-int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot)
-{
- struct pci_bus *bus;
- int i;
-
- bus = dev->bus;
- if (bus == NULL)
- return -1;
-
- for (i = 0; i < ARRAY_SIZE(int_map); i++) {
- if (int_map[i].bus == bus->number && int_map[i].slot == slot) {
- int line;
- for (line = 0; line < 4; line++)
- if (pci_intlines[line] == int_map[i].irq)
- break;
- if (line < 4)
- return pci_intlines[(line + (pin - 1)) % 4];
- else
- return int_map[i].irq;
- }
- }
- return -1;
-}
-
-#ifdef CONFIG_ROCKHOPPER
-void i8259_init(void)
-{
- init_i8259_irqs();
-
- outb(0x00, 0x4d0);
- outb(0x02, 0x4d1); /* USB IRQ9 is level */
-}
-#endif
-
-int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- extern int pci_probe_only;
- pci_probe_only = 1;
-
-#ifdef CONFIG_ROCKHOPPER
- if( dev->bus->number == 1 && vr4133_rockhopper ) {
- if(slot == ROCKHOPPER_PCI1_SLOT || slot == ROCKHOPPER_PCI2_SLOT)
- dev->irq = CMBVR41XX_INTA_IRQ;
- else
- dev->irq = rockhopper_get_irq(dev, pin, slot);
- } else
- dev->irq = CMBVR41XX_INTA_IRQ;
-#else
- dev->irq = CMBVR41XX_INTA_IRQ;
-#endif
-
- return dev->irq;
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, ali_m1535plus_init);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M5229, ali_m5229_init);
-
-
diff --git a/arch/mips/pci/ops-mace.c b/arch/mips/pci/ops-mace.c
index e958818..1cfb558 100644
--- a/arch/mips/pci/ops-mace.c
+++ b/arch/mips/pci/ops-mace.c
@@ -61,6 +61,13 @@
/* ack possible master abort */
mace->pci.error &= ~MACEPCI_ERROR_MASTER_ABORT;
mace->pci.control = control;
+ /*
+ * someone forgot to set the ultra bit for the onboard
+ * scsi chips; we fake it here
+ */
+ if (bus->number == 0 && reg == 0x40 && size == 4 &&
+ (devfn == (1 << 3) || devfn == (2 << 3)))
+ *val |= 0x1000;
DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);
diff --git a/arch/mips/pci/ops-tx3927.c b/arch/mips/pci/ops-tx3927.c
index aa698bd..8a17a39 100644
--- a/arch/mips/pci/ops-tx3927.c
+++ b/arch/mips/pci/ops-tx3927.c
@@ -8,7 +8,7 @@
*
* Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
*
- * Define the pci_ops for JMR3927.
+ * Define the pci_ops for TX3927.
*
* Much of the code is derived from the original DDB5074 port by
* Geert Uytterhoeven <geert@sonycom.com>
@@ -39,7 +39,7 @@
#include <linux/init.h>
#include <asm/addrspace.h>
-#include <asm/jmr3927/jmr3927.h>
+#include <asm/txx9/tx3927.h>
static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
unsigned char where)
@@ -68,7 +68,7 @@
return PCIBIOS_SUCCESSFUL;
}
-static int jmr3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
+static int tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 * val)
{
int ret;
@@ -94,7 +94,7 @@
return check_abort();
}
-static int jmr3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
+static int tx3927_pci_write_config(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val)
{
int ret;
@@ -125,7 +125,80 @@
return check_abort();
}
-struct pci_ops jmr3927_pci_ops = {
- jmr3927_pci_read_config,
- jmr3927_pci_write_config,
+static struct pci_ops tx3927_pci_ops = {
+ .read = tx3927_pci_read_config,
+ .write = tx3927_pci_write_config,
};
+
+void __init tx3927_pcic_setup(struct pci_controller *channel,
+ unsigned long sdram_size, int extarb)
+{
+ unsigned long flags;
+ unsigned long io_base =
+ channel->io_resource->start + mips_io_port_base - IO_BASE;
+ unsigned long io_size =
+ channel->io_resource->end - channel->io_resource->start;
+ unsigned long io_pciaddr =
+ channel->io_resource->start - channel->io_offset;
+ unsigned long mem_base =
+ channel->mem_resource->start;
+ unsigned long mem_size =
+ channel->mem_resource->end - channel->mem_resource->start;
+ unsigned long mem_pciaddr =
+ channel->mem_resource->start - channel->mem_offset;
+
+ printk(KERN_INFO "TX3927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s",
+ tx3927_pcicptr->did, tx3927_pcicptr->vid,
+ tx3927_pcicptr->rid,
+ extarb ? "External" : "Internal");
+ channel->pci_ops = &tx3927_pci_ops;
+
+ local_irq_save(flags);
+ /* Disable External PCI Config. Access */
+ tx3927_pcicptr->lbc = TX3927_PCIC_LBC_EPCAD;
+#ifdef __BIG_ENDIAN
+ tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_IBSE |
+ TX3927_PCIC_LBC_TIBSE |
+ TX3927_PCIC_LBC_TMFBSE | TX3927_PCIC_LBC_MSDSE;
+#endif
+ /* LB->PCI mappings */
+ tx3927_pcicptr->iomas = ~(io_size - 1);
+ tx3927_pcicptr->ilbioma = io_base;
+ tx3927_pcicptr->ipbioma = io_pciaddr;
+ tx3927_pcicptr->mmas = ~(mem_size - 1);
+ tx3927_pcicptr->ilbmma = mem_base;
+ tx3927_pcicptr->ipbmma = mem_pciaddr;
+ /* PCI->LB mappings */
+ tx3927_pcicptr->iobas = 0xffffffff;
+ tx3927_pcicptr->ioba = 0;
+ tx3927_pcicptr->tlbioma = 0;
+ tx3927_pcicptr->mbas = ~(sdram_size - 1);
+ tx3927_pcicptr->mba = 0;
+ tx3927_pcicptr->tlbmma = 0;
+ /* Enable Direct mapping Address Space Decoder */
+ tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
+
+ /* Clear All Local Bus Status */
+ tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
+ /* Enable All Local Bus Interrupts */
+ tx3927_pcicptr->lbim = TX3927_PCIC_LBIM_ALL;
+ /* Clear All PCI Status Error */
+ tx3927_pcicptr->pcistat = TX3927_PCIC_PCISTATIM_ALL;
+ /* Enable All PCI Status Error Interrupts */
+ tx3927_pcicptr->pcistatim = TX3927_PCIC_PCISTATIM_ALL;
+
+ /* PCIC Int => IRC IRQ10 */
+ tx3927_pcicptr->il = TX3927_IR_PCI;
+ /* Target Control (per errata) */
+ tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
+
+ /* Enable Bus Arbiter */
+ if (!extarb)
+ tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
+
+ tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
+ PCI_COMMAND_MEMORY |
+ PCI_COMMAND_IO |
+ PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
+ local_irq_restore(flags);
+}
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index 150419c..c6b49bc 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -1,209 +1,408 @@
/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
+ * Define the pci_ops for the PCIC on Toshiba TX4927, TX4938, etc.
*
- * Copyright (C) 2000-2001 Toshiba Corporation
+ * Based on linux/arch/mips/pci/ops-tx4938.c,
+ * linux/arch/mips/pci/fixup-rbtx4938.c,
+ * linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * 2003-2005 (c) MontaVista Software, Inc.
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
*
- * Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
- *
- * Define the pci_ops for the Toshiba rbtx4927
- *
- * Much of the code is derived from the original DDB5074 port by
- * Geert Uytterhoeven <geert@sonycom.com>
- *
- * Copyright 2004 MontaVista Software Inc.
- * Author: Manish Lachwani (mlachwani@mvista.com)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
*/
-#include <linux/types.h>
-#include <linux/pci.h>
#include <linux/kernel.h>
-#include <linux/init.h>
+#include <asm/txx9/tx4927pcic.h>
-#include <asm/addrspace.h>
-#include <asm/byteorder.h>
-#include <asm/tx4927/tx4927_pci.h>
+static struct {
+ struct pci_controller *channel;
+ struct tx4927_pcic_reg __iomem *pcicptr;
+} pcicptrs[2]; /* TX4938 has 2 pcic */
-/* initialize in setup */
-struct resource pci_io_resource = {
- .name = "TX4927 PCI IO SPACE",
- .start = 0x1000,
- .end = (0x1000 + (TX4927_PCIIO_SIZE)) - 1,
- .flags = IORESOURCE_IO
-};
-
-/* initialize in setup */
-struct resource pci_mem_resource = {
- .name = "TX4927 PCI MEM SPACE",
- .start = TX4927_PCIMEM,
- .end = TX4927_PCIMEM + TX4927_PCIMEM_SIZE - 1,
- .flags = IORESOURCE_MEM
-};
-
-static int mkaddr(int bus, int dev_fn, int where, int *flagsp)
+static void __init set_tx4927_pcicptr(struct pci_controller *channel,
+ struct tx4927_pcic_reg __iomem *pcicptr)
{
- if (bus > 0) {
- /* Type 1 configuration */
- tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
- } else {
- if (dev_fn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
- return -1;
+ int i;
- /* Type 0 configuration */
- tx4927_pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
+ for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
+ if (pcicptrs[i].channel == channel) {
+ pcicptrs[i].pcicptr = pcicptr;
+ return;
+ }
}
+ for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
+ if (!pcicptrs[i].channel) {
+ pcicptrs[i].channel = channel;
+ pcicptrs[i].pcicptr = pcicptr;
+ return;
+ }
+ }
+ BUG();
+}
+
+struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
+ struct pci_controller *channel)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
+ if (pcicptrs[i].channel == channel)
+ return pcicptrs[i].pcicptr;
+ }
+ return NULL;
+}
+
+static int mkaddr(struct pci_bus *bus, unsigned int devfn, int where,
+ struct tx4927_pcic_reg __iomem *pcicptr)
+{
+ if (bus->parent == NULL &&
+ devfn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0))
+ return -1;
+ __raw_writel(((bus->number & 0xff) << 0x10)
+ | ((devfn & 0xff) << 0x08) | (where & 0xfc)
+ | (bus->parent ? 1 : 0),
+ &pcicptr->g2pcfgadrs);
/* clear M_ABORT and Disable M_ABORT Int. */
- tx4927_pcicptr->pcistatus =
- (tx4927_pcicptr->pcistatus & 0x0000ffff) |
- (PCI_STATUS_REC_MASTER_ABORT << 16);
- tx4927_pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
+ __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
+ | (PCI_STATUS_REC_MASTER_ABORT << 16),
+ &pcicptr->pcistatus);
return 0;
}
-static int check_abort(int flags)
+static int check_abort(struct tx4927_pcic_reg __iomem *pcicptr)
{
int code = PCIBIOS_SUCCESSFUL;
- if (tx4927_pcicptr->
- pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
- tx4927_pcicptr->pcistatus =
- (tx4927_pcicptr->
- pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
- << 16);
- tx4927_pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
+
+ /* wait write cycle completion before checking error status */
+ while (__raw_readl(&pcicptr->pcicstatus) & TX4927_PCIC_PCICSTATUS_IWB)
+ ;
+ if (__raw_readl(&pcicptr->pcistatus)
+ & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
+ __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
+ | (PCI_STATUS_REC_MASTER_ABORT << 16),
+ &pcicptr->pcistatus);
code = PCIBIOS_DEVICE_NOT_FOUND;
}
return code;
}
-static int tx4927_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 * val)
+static u8 icd_readb(int offset, struct tx4927_pcic_reg __iomem *pcicptr)
{
- int flags, retval, dev, busno, func;
-
- busno = bus->number;
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- /* check if the bus is top-level */
- if (bus->parent != NULL) {
- busno = bus->number;
- } else {
- busno = 0;
- }
-
- if (mkaddr(busno, devfn, where, &flags))
- return -1;
-
- switch (size) {
- case 1:
- *val = *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
- g2pcfgdata |
-#ifdef __LITTLE_ENDIAN
- (where & 3));
-#else
- ((where & 0x3) ^ 0x3));
+#ifdef __BIG_ENDIAN
+ offset ^= 3;
#endif
- break;
- case 2:
- *val = *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
- g2pcfgdata |
-#ifdef __LITTLE_ENDIAN
- (where & 3));
-#else
- ((where & 0x3) ^ 0x2));
+ return __raw_readb((void __iomem *)&pcicptr->g2pcfgdata + offset);
+}
+static u16 icd_readw(int offset, struct tx4927_pcic_reg __iomem *pcicptr)
+{
+#ifdef __BIG_ENDIAN
+ offset ^= 2;
#endif
- break;
- case 4:
- *val = tx4927_pcicptr->g2pcfgdata;
- break;
- }
+ return __raw_readw((void __iomem *)&pcicptr->g2pcfgdata + offset);
+}
+static u32 icd_readl(struct tx4927_pcic_reg __iomem *pcicptr)
+{
+ return __raw_readl(&pcicptr->g2pcfgdata);
+}
+static void icd_writeb(u8 val, int offset,
+ struct tx4927_pcic_reg __iomem *pcicptr)
+{
+#ifdef __BIG_ENDIAN
+ offset ^= 3;
+#endif
+ __raw_writeb(val, (void __iomem *)&pcicptr->g2pcfgdata + offset);
+}
+static void icd_writew(u16 val, int offset,
+ struct tx4927_pcic_reg __iomem *pcicptr)
+{
+#ifdef __BIG_ENDIAN
+ offset ^= 2;
+#endif
+ __raw_writew(val, (void __iomem *)&pcicptr->g2pcfgdata + offset);
+}
+static void icd_writel(u32 val, struct tx4927_pcic_reg __iomem *pcicptr)
+{
+ __raw_writel(val, &pcicptr->g2pcfgdata);
+}
- retval = check_abort(flags);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
+static struct tx4927_pcic_reg __iomem *pci_bus_to_pcicptr(struct pci_bus *bus)
+{
+ struct pci_controller *channel = bus->sysdata;
+ return get_tx4927_pcicptr(channel);
+}
+
+static int tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 *val)
+{
+ struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus);
+
+ if (mkaddr(bus, devfn, where, pcicptr)) {
*val = 0xffffffff;
-
- return retval;
-}
-
-static int tx4927_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 val)
-{
- int flags, dev, busno, func;
- busno = bus->number;
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- /* check if the bus is top-level */
- if (bus->parent != NULL) {
- busno = bus->number;
- } else {
- busno = 0;
- }
-
- if (mkaddr(busno, devfn, where, &flags))
return -1;
-
+ }
switch (size) {
case 1:
- *(volatile u8 *) ((unsigned long) & tx4927_pcicptr->
- g2pcfgdata |
-#ifdef __LITTLE_ENDIAN
- (where & 3)) = val;
-#else
- ((where & 0x3) ^ 0x3)) = val;
-#endif
+ *val = icd_readb(where & 3, pcicptr);
break;
-
case 2:
- *(volatile u16 *) ((unsigned long) & tx4927_pcicptr->
- g2pcfgdata |
-#ifdef __LITTLE_ENDIAN
- (where & 3)) = val;
-#else
- ((where & 0x3) ^ 0x2)) = val;
-#endif
+ *val = icd_readw(where & 3, pcicptr);
break;
- case 4:
- tx4927_pcicptr->g2pcfgdata = val;
- break;
+ default:
+ *val = icd_readl(pcicptr);
}
-
- return check_abort(flags);
+ return check_abort(pcicptr);
}
-struct pci_ops tx4927_pci_ops = {
- tx4927_pcibios_read_config,
- tx4927_pcibios_write_config
+static int tx4927_pci_config_write(struct pci_bus *bus, unsigned int devfn,
+ int where, int size, u32 val)
+{
+ struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(bus);
+
+ if (mkaddr(bus, devfn, where, pcicptr))
+ return -1;
+ switch (size) {
+ case 1:
+ icd_writeb(val, where & 3, pcicptr);
+ break;
+ case 2:
+ icd_writew(val, where & 3, pcicptr);
+ break;
+ default:
+ icd_writel(val, pcicptr);
+ }
+ return check_abort(pcicptr);
+}
+
+static struct pci_ops tx4927_pci_ops = {
+ .read = tx4927_pci_config_read,
+ .write = tx4927_pci_config_write,
};
-/*
- * h/w only supports devices 0x00 to 0x14
- */
-struct pci_controller tx4927_controller = {
- .pci_ops = &tx4927_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
+static struct {
+ u8 trdyto;
+ u8 retryto;
+ u16 gbwc;
+} tx4927_pci_opts __devinitdata = {
+ .trdyto = 0,
+ .retryto = 0,
+ .gbwc = 0xfe0, /* 4064 GBUSCLK for CCFG.GTOT=0b11 */
};
+
+void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
+ struct pci_controller *channel, int extarb)
+{
+ int i;
+ unsigned long flags;
+
+ set_tx4927_pcicptr(channel, pcicptr);
+
+ if (!channel->pci_ops)
+ printk(KERN_INFO
+ "PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
+ __raw_readl(&pcicptr->pciid) >> 16,
+ __raw_readl(&pcicptr->pciid) & 0xffff,
+ __raw_readl(&pcicptr->pciccrev) & 0xff,
+ extarb ? "External" : "Internal");
+ channel->pci_ops = &tx4927_pci_ops;
+
+ local_irq_save(flags);
+
+ /* Disable All Initiator Space */
+ __raw_writel(__raw_readl(&pcicptr->pciccfg)
+ & ~(TX4927_PCIC_PCICCFG_G2PMEN(0)
+ | TX4927_PCIC_PCICCFG_G2PMEN(1)
+ | TX4927_PCIC_PCICCFG_G2PMEN(2)
+ | TX4927_PCIC_PCICCFG_G2PIOEN),
+ &pcicptr->pciccfg);
+
+ /* GB->PCI mappings */
+ __raw_writel((channel->io_resource->end - channel->io_resource->start)
+ >> 4,
+ &pcicptr->g2piomask);
+ ____raw_writeq((channel->io_resource->start +
+ channel->io_map_base - IO_BASE) |
+#ifdef __BIG_ENDIAN
+ TX4927_PCIC_G2PIOGBASE_ECHG
+#else
+ TX4927_PCIC_G2PIOGBASE_BSDIS
+#endif
+ , &pcicptr->g2piogbase);
+ ____raw_writeq(channel->io_resource->start - channel->io_offset,
+ &pcicptr->g2piopbase);
+ for (i = 0; i < 3; i++) {
+ __raw_writel(0, &pcicptr->g2pmmask[i]);
+ ____raw_writeq(0, &pcicptr->g2pmgbase[i]);
+ ____raw_writeq(0, &pcicptr->g2pmpbase[i]);
+ }
+ if (channel->mem_resource->end) {
+ __raw_writel((channel->mem_resource->end
+ - channel->mem_resource->start) >> 4,
+ &pcicptr->g2pmmask[0]);
+ ____raw_writeq(channel->mem_resource->start |
+#ifdef __BIG_ENDIAN
+ TX4927_PCIC_G2PMnGBASE_ECHG
+#else
+ TX4927_PCIC_G2PMnGBASE_BSDIS
+#endif
+ , &pcicptr->g2pmgbase[0]);
+ ____raw_writeq(channel->mem_resource->start -
+ channel->mem_offset,
+ &pcicptr->g2pmpbase[0]);
+ }
+ /* PCI->GB mappings (I/O 256B) */
+ __raw_writel(0, &pcicptr->p2giopbase); /* 256B */
+ ____raw_writeq(0, &pcicptr->p2giogbase);
+ /* PCI->GB mappings (MEM 512MB (64MB on R1.x)) */
+ __raw_writel(0, &pcicptr->p2gm0plbase);
+ __raw_writel(0, &pcicptr->p2gm0pubase);
+ ____raw_writeq(TX4927_PCIC_P2GMnGBASE_TMEMEN |
+#ifdef __BIG_ENDIAN
+ TX4927_PCIC_P2GMnGBASE_TECHG
+#else
+ TX4927_PCIC_P2GMnGBASE_TBSDIS
+#endif
+ , &pcicptr->p2gmgbase[0]);
+ /* PCI->GB mappings (MEM 16MB) */
+ __raw_writel(0xffffffff, &pcicptr->p2gm1plbase);
+ __raw_writel(0xffffffff, &pcicptr->p2gm1pubase);
+ ____raw_writeq(0, &pcicptr->p2gmgbase[1]);
+ /* PCI->GB mappings (MEM 1MB) */
+ __raw_writel(0xffffffff, &pcicptr->p2gm2pbase); /* 1MB */
+ ____raw_writeq(0, &pcicptr->p2gmgbase[2]);
+
+ /* Clear all (including IRBER) except for GBWC */
+ __raw_writel((tx4927_pci_opts.gbwc << 16)
+ & TX4927_PCIC_PCICCFG_GBWC_MASK,
+ &pcicptr->pciccfg);
+ /* Enable Initiator Memory Space */
+ if (channel->mem_resource->end)
+ __raw_writel(__raw_readl(&pcicptr->pciccfg)
+ | TX4927_PCIC_PCICCFG_G2PMEN(0),
+ &pcicptr->pciccfg);
+ /* Enable Initiator I/O Space */
+ if (channel->io_resource->end)
+ __raw_writel(__raw_readl(&pcicptr->pciccfg)
+ | TX4927_PCIC_PCICCFG_G2PIOEN,
+ &pcicptr->pciccfg);
+ /* Enable Initiator Config */
+ __raw_writel(__raw_readl(&pcicptr->pciccfg)
+ | TX4927_PCIC_PCICCFG_ICAEN | TX4927_PCIC_PCICCFG_TCAR,
+ &pcicptr->pciccfg);
+
+ /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
+ __raw_writel(0, &pcicptr->pcicfg1);
+
+ __raw_writel((__raw_readl(&pcicptr->g2ptocnt) & ~0xffff)
+ | (tx4927_pci_opts.trdyto & 0xff)
+ | ((tx4927_pci_opts.retryto & 0xff) << 8),
+ &pcicptr->g2ptocnt);
+
+ /* Clear All Local Bus Status */
+ __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicstatus);
+ /* Enable All Local Bus Interrupts */
+ __raw_writel(TX4927_PCIC_PCICSTATUS_ALL, &pcicptr->pcicmask);
+ /* Clear All Initiator Status */
+ __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pstatus);
+ /* Enable All Initiator Interrupts */
+ __raw_writel(TX4927_PCIC_G2PSTATUS_ALL, &pcicptr->g2pmask);
+ /* Clear All PCI Status Error */
+ __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
+ | (TX4927_PCIC_PCISTATUS_ALL << 16),
+ &pcicptr->pcistatus);
+ /* Enable All PCI Status Error Interrupts */
+ __raw_writel(TX4927_PCIC_PCISTATUS_ALL, &pcicptr->pcimask);
+
+ if (!extarb) {
+ /* Reset Bus Arbiter */
+ __raw_writel(TX4927_PCIC_PBACFG_RPBA, &pcicptr->pbacfg);
+ __raw_writel(0, &pcicptr->pbabm);
+ /* Enable Bus Arbiter */
+ __raw_writel(TX4927_PCIC_PBACFG_PBAEN, &pcicptr->pbacfg);
+ }
+
+ __raw_writel(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY
+ | PCI_COMMAND_PARITY | PCI_COMMAND_SERR,
+ &pcicptr->pcistatus);
+ local_irq_restore(flags);
+
+ printk(KERN_DEBUG
+ "PCI: COMMAND=%04x,PCIMASK=%04x,"
+ "TRDYTO=%02x,RETRYTO=%02x,GBWC=%03x\n",
+ __raw_readl(&pcicptr->pcistatus) & 0xffff,
+ __raw_readl(&pcicptr->pcimask) & 0xffff,
+ __raw_readl(&pcicptr->g2ptocnt) & 0xff,
+ (__raw_readl(&pcicptr->g2ptocnt) & 0xff00) >> 8,
+ (__raw_readl(&pcicptr->pciccfg) >> 16) & 0xfff);
+}
+
+static void tx4927_report_pcic_status1(struct tx4927_pcic_reg __iomem *pcicptr)
+{
+ __u16 pcistatus = (__u16)(__raw_readl(&pcicptr->pcistatus) >> 16);
+ __u32 g2pstatus = __raw_readl(&pcicptr->g2pstatus);
+ __u32 pcicstatus = __raw_readl(&pcicptr->pcicstatus);
+ static struct {
+ __u32 flag;
+ const char *str;
+ } pcistat_tbl[] = {
+ { PCI_STATUS_DETECTED_PARITY, "DetectedParityError" },
+ { PCI_STATUS_SIG_SYSTEM_ERROR, "SignaledSystemError" },
+ { PCI_STATUS_REC_MASTER_ABORT, "ReceivedMasterAbort" },
+ { PCI_STATUS_REC_TARGET_ABORT, "ReceivedTargetAbort" },
+ { PCI_STATUS_SIG_TARGET_ABORT, "SignaledTargetAbort" },
+ { PCI_STATUS_PARITY, "MasterParityError" },
+ }, g2pstat_tbl[] = {
+ { TX4927_PCIC_G2PSTATUS_TTOE, "TIOE" },
+ { TX4927_PCIC_G2PSTATUS_RTOE, "RTOE" },
+ }, pcicstat_tbl[] = {
+ { TX4927_PCIC_PCICSTATUS_PME, "PME" },
+ { TX4927_PCIC_PCICSTATUS_TLB, "TLB" },
+ { TX4927_PCIC_PCICSTATUS_NIB, "NIB" },
+ { TX4927_PCIC_PCICSTATUS_ZIB, "ZIB" },
+ { TX4927_PCIC_PCICSTATUS_PERR, "PERR" },
+ { TX4927_PCIC_PCICSTATUS_SERR, "SERR" },
+ { TX4927_PCIC_PCICSTATUS_GBE, "GBE" },
+ { TX4927_PCIC_PCICSTATUS_IWB, "IWB" },
+ };
+ int i, cont;
+
+ printk(KERN_ERR "");
+ if (pcistatus & TX4927_PCIC_PCISTATUS_ALL) {
+ printk(KERN_CONT "pcistat:%04x(", pcistatus);
+ for (i = 0, cont = 0; i < ARRAY_SIZE(pcistat_tbl); i++)
+ if (pcistatus & pcistat_tbl[i].flag)
+ printk(KERN_CONT "%s%s",
+ cont++ ? " " : "", pcistat_tbl[i].str);
+ printk(KERN_CONT ") ");
+ }
+ if (g2pstatus & TX4927_PCIC_G2PSTATUS_ALL) {
+ printk(KERN_CONT "g2pstatus:%08x(", g2pstatus);
+ for (i = 0, cont = 0; i < ARRAY_SIZE(g2pstat_tbl); i++)
+ if (g2pstatus & g2pstat_tbl[i].flag)
+ printk(KERN_CONT "%s%s",
+ cont++ ? " " : "", g2pstat_tbl[i].str);
+ printk(KERN_CONT ") ");
+ }
+ if (pcicstatus & TX4927_PCIC_PCICSTATUS_ALL) {
+ printk(KERN_CONT "pcicstatus:%08x(", pcicstatus);
+ for (i = 0, cont = 0; i < ARRAY_SIZE(pcicstat_tbl); i++)
+ if (pcicstatus & pcicstat_tbl[i].flag)
+ printk(KERN_CONT "%s%s",
+ cont++ ? " " : "", pcicstat_tbl[i].str);
+ printk(KERN_CONT ")");
+ }
+ printk(KERN_CONT "\n");
+}
+
+void tx4927_report_pcic_status(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(pcicptrs); i++) {
+ if (pcicptrs[i].pcicptr)
+ tx4927_report_pcic_status1(pcicptrs[i].pcicptr);
+ }
+}
diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c
deleted file mode 100644
index a450c40..0000000
--- a/arch/mips/pci/ops-tx4938.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/*
- * Define the pci_ops for the Toshiba rbtx4938
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/addrspace.h>
-#include <asm/tx4938/rbtx4938.h>
-
-/* initialize in setup */
-struct resource pci_io_resource = {
- .name = "pci IO space",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_IO
-};
-
-/* initialize in setup */
-struct resource pci_mem_resource = {
- .name = "pci memory space",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_MEM
-};
-
-struct resource tx4938_pcic1_pci_io_resource = {
- .name = "PCI1 IO",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_IO
-};
-struct resource tx4938_pcic1_pci_mem_resource = {
- .name = "PCI1 mem",
- .start = 0,
- .end = 0,
- .flags = IORESOURCE_MEM
-};
-
-static int mkaddr(int bus, int dev_fn, int where,
- struct tx4938_pcic_reg *pcicptr)
-{
- if (bus > 0) {
- /* Type 1 configuration */
- pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc) | 1;
- } else {
- if (dev_fn >= PCI_DEVFN(TX4938_PCIC_MAX_DEVNU, 0))
- return -1;
-
- /* Type 0 configuration */
- pcicptr->g2pcfgadrs = ((bus & 0xff) << 0x10) |
- ((dev_fn & 0xff) << 0x08) | (where & 0xfc);
- }
- /* clear M_ABORT and Disable M_ABORT Int. */
- pcicptr->pcistatus =
- (pcicptr->pcistatus & 0x0000ffff) |
- (PCI_STATUS_REC_MASTER_ABORT << 16);
- pcicptr->pcimask &= ~PCI_STATUS_REC_MASTER_ABORT;
-
- return 0;
-}
-
-static int check_abort(struct tx4938_pcic_reg *pcicptr)
-{
- int code = PCIBIOS_SUCCESSFUL;
- /* wait write cycle completion before checking error status */
- while (pcicptr->pcicstatus & TX4938_PCIC_PCICSTATUS_IWB)
- ;
- if (pcicptr->pcistatus & (PCI_STATUS_REC_MASTER_ABORT << 16)) {
- pcicptr->pcistatus =
- (pcicptr->
- pcistatus & 0x0000ffff) | (PCI_STATUS_REC_MASTER_ABORT
- << 16);
- pcicptr->pcimask |= PCI_STATUS_REC_MASTER_ABORT;
- code = PCIBIOS_DEVICE_NOT_FOUND;
- }
- return code;
-}
-
-extern struct pci_controller tx4938_pci_controller[];
-extern struct tx4938_pcic_reg *get_tx4938_pcicptr(int ch);
-
-static struct tx4938_pcic_reg *pci_bus_to_pcicptr(struct pci_bus *bus)
-{
- struct pci_controller *channel = bus->sysdata;
- return get_tx4938_pcicptr(channel - &tx4938_pci_controller[0]);
-}
-
-static int tx4938_pcibios_read_config(struct pci_bus *bus, unsigned int devfn,
- int where, int size, u32 * val)
-{
- int retval, dev, busno, func;
- struct tx4938_pcic_reg *pcicptr = pci_bus_to_pcicptr(bus);
- void __iomem *cfgdata =
- (void __iomem *)(unsigned long)&pcicptr->g2pcfgdata;
-
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- /* check if the bus is top-level */
- if (bus->parent != NULL)
- busno = bus->number;
- else {
- busno = 0;
- }
-
- if (mkaddr(busno, devfn, where, pcicptr))
- return -1;
-
- switch (size) {
- case 1:
-#ifdef __BIG_ENDIAN
- cfgdata += (where & 3) ^ 3;
-#else
- cfgdata += where & 3;
-#endif
- *val = __raw_readb(cfgdata);
- break;
- case 2:
-#ifdef __BIG_ENDIAN
- cfgdata += (where & 2) ^ 2;
-#else
- cfgdata += where & 2;
-#endif
- *val = __raw_readw(cfgdata);
- break;
- case 4:
- *val = __raw_readl(cfgdata);
- break;
- }
-
- retval = check_abort(pcicptr);
- if (retval == PCIBIOS_DEVICE_NOT_FOUND)
- *val = 0xffffffff;
-
- return retval;
-}
-
-static int tx4938_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where,
- int size, u32 val)
-{
- int dev, busno, func;
- struct tx4938_pcic_reg *pcicptr = pci_bus_to_pcicptr(bus);
- void __iomem *cfgdata =
- (void __iomem *)(unsigned long)&pcicptr->g2pcfgdata;
-
- busno = bus->number;
- dev = PCI_SLOT(devfn);
- func = PCI_FUNC(devfn);
-
- /* check if the bus is top-level */
- if (bus->parent != NULL) {
- busno = bus->number;
- } else {
- busno = 0;
- }
-
- if (mkaddr(busno, devfn, where, pcicptr))
- return -1;
-
- switch (size) {
- case 1:
-#ifdef __BIG_ENDIAN
- cfgdata += (where & 3) ^ 3;
-#else
- cfgdata += where & 3;
-#endif
- __raw_writeb(val, cfgdata);
- break;
- case 2:
-#ifdef __BIG_ENDIAN
- cfgdata += (where & 2) ^ 2;
-#else
- cfgdata += where & 2;
-#endif
- __raw_writew(val, cfgdata);
- break;
- case 4:
- __raw_writel(val, cfgdata);
- break;
- }
-
- return check_abort(pcicptr);
-}
-
-struct pci_ops tx4938_pci_ops = {
- tx4938_pcibios_read_config,
- tx4938_pcibios_write_config
-};
-
-struct pci_controller tx4938_pci_controller[] = {
- /* h/w only supports devices 0x00 to 0x14 */
- {
- .pci_ops = &tx4938_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
- },
- /* h/w only supports devices 0x00 to 0x14 */
- {
- .pci_ops = &tx4938_pci_ops,
- .io_resource = &tx4938_pcic1_pci_io_resource,
- .mem_resource = &tx4938_pcic1_pci_mem_resource,
- }
-};
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index 87e2c8f..a9060c7 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -202,7 +202,6 @@
{
uint32_t cmdreg;
uint64_t reg;
- extern int pci_probe_only;
/* CFE will assign PCI resources */
pci_probe_only = 1;
@@ -254,8 +253,6 @@
ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536);
bcm1480_controller.io_map_base -= bcm1480_controller.io_offset;
set_io_port_base(bcm1480_controller.io_map_base);
- isa_slot_offset = (unsigned long)
- ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024);
register_pci_controller(&bcm1480_controller);
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index a185169..ce92f82 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -47,7 +47,6 @@
static int num_bridges = 0;
bridge_t *bridge;
int slot;
- extern int pci_probe_only;
pci_probe_only = 1;
diff --git a/arch/mips/pci/pci-jmr3927.c b/arch/mips/pci/pci-jmr3927.c
deleted file mode 100644
index cb84f4e..0000000
--- a/arch/mips/pci/pci-jmr3927.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/jmr3927/jmr3927.h>
-#include <asm/debug.h>
-
-struct resource pci_io_resource = {
- .name = "IO MEM",
- .start = 0x1000, /* reserve regacy I/O space */
- .end = 0x1000 + JMR3927_PCIIO_SIZE - 1,
- .flags = IORESOURCE_IO
-};
-
-struct resource pci_mem_resource = {
- .name = "PCI MEM",
- .start = JMR3927_PCIMEM,
- .end = JMR3927_PCIMEM + JMR3927_PCIMEM_SIZE - 1,
- .flags = IORESOURCE_MEM
-};
-
-extern struct pci_ops jmr3927_pci_ops;
-
-struct pci_controller jmr3927_controller = {
- .pci_ops = &jmr3927_pci_ops,
- .io_resource = &pci_io_resource,
- .mem_resource = &pci_mem_resource,
- .mem_offset = JMR3927_PCIMEM
-};
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
index e70ae32..a98e543 100644
--- a/arch/mips/pci/pci-lasat.c
+++ b/arch/mips/pci/pci-lasat.c
@@ -10,7 +10,7 @@
#include <linux/pci.h>
#include <linux/types.h>
-#include <asm/bootinfo.h>
+#include <asm/lasat/lasat.h>
#include <irq.h>
@@ -39,16 +39,10 @@
{
printk(KERN_DEBUG "PCI: starting\n");
- switch (mips_machtype) {
- case MACH_LASAT_100:
- lasat_pci_controller.pci_ops = >64xxx_pci0_ops;
- break;
- case MACH_LASAT_200:
+ if (IS_LASAT_200())
lasat_pci_controller.pci_ops = &nile4_pci_ops;
- break;
- default:
- panic("pcibios_init: mips_machtype incorrect");
- }
+ else
+ lasat_pci_controller.pci_ops = >64xxx_pci0_ops;
register_pci_controller(&lasat_pci_controller);
diff --git a/arch/mips/pci/pci-sb1250.c b/arch/mips/pci/pci-sb1250.c
index 2a09ad9..bf63959 100644
--- a/arch/mips/pci/pci-sb1250.c
+++ b/arch/mips/pci/pci-sb1250.c
@@ -210,7 +210,6 @@
void __iomem *io_map_base;
uint32_t cmdreg;
uint64_t reg;
- extern int pci_probe_only;
/* CFE will assign PCI resources */
pci_probe_only = 1;
@@ -254,9 +253,6 @@
* works correctly with most of Linux's drivers.
* XXX ehs: Should this happen in PCI Device mode?
*/
- isa_slot_offset = (unsigned long)
- ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES_32, 1024 * 1024);
-
io_map_base = ioremap(A_PHYS_LDTPCI_IO_MATCH_BYTES, 1024 * 1024);
sb1250_controller.io_map_base = io_map_base;
set_io_port_base((unsigned long)io_map_base);
diff --git a/arch/mips/pci/pci-tx4927.c b/arch/mips/pci/pci-tx4927.c
new file mode 100644
index 0000000..27e86a0
--- /dev/null
+++ b/arch/mips/pci/pci-tx4927.c
@@ -0,0 +1,83 @@
+/*
+ * linux/arch/mips/pci/pci-tx4927.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001, 2003-2005 MontaVista Software Inc.
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/tx4927.h>
+
+int __init tx4927_report_pciclk(void)
+{
+ int pciclk = 0;
+
+ printk(KERN_INFO "PCIC --%s PCICLK:",
+ (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) ?
+ " PCI66" : "");
+ if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
+ u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
+ switch ((unsigned long)ccfg &
+ TX4927_CCFG_PCIDIVMODE_MASK) {
+ case TX4927_CCFG_PCIDIVMODE_2_5:
+ pciclk = txx9_cpu_clock * 2 / 5; break;
+ case TX4927_CCFG_PCIDIVMODE_3:
+ pciclk = txx9_cpu_clock / 3; break;
+ case TX4927_CCFG_PCIDIVMODE_5:
+ pciclk = txx9_cpu_clock / 5; break;
+ case TX4927_CCFG_PCIDIVMODE_6:
+ pciclk = txx9_cpu_clock / 6; break;
+ }
+ printk("Internal(%u.%uMHz)",
+ (pciclk + 50000) / 1000000,
+ ((pciclk + 50000) / 100000) % 10);
+ } else {
+ printk("External");
+ pciclk = -1;
+ }
+ printk("\n");
+ return pciclk;
+}
+
+int __init tx4927_pciclk66_setup(void)
+{
+ int pciclk;
+
+ /* Assert M66EN */
+ tx4927_ccfg_set(TX4927_CCFG_PCI66);
+ /* Double PCICLK (if possible) */
+ if (__raw_readq(&tx4927_ccfgptr->pcfg) & TX4927_PCFG_PCICLKEN_ALL) {
+ unsigned int pcidivmode = 0;
+ u64 ccfg = __raw_readq(&tx4927_ccfgptr->ccfg);
+ pcidivmode = (unsigned long)ccfg &
+ TX4927_CCFG_PCIDIVMODE_MASK;
+ switch (pcidivmode) {
+ case TX4927_CCFG_PCIDIVMODE_5:
+ case TX4927_CCFG_PCIDIVMODE_2_5:
+ pcidivmode = TX4927_CCFG_PCIDIVMODE_2_5;
+ pciclk = txx9_cpu_clock * 2 / 5;
+ break;
+ case TX4927_CCFG_PCIDIVMODE_6:
+ case TX4927_CCFG_PCIDIVMODE_3:
+ default:
+ pcidivmode = TX4927_CCFG_PCIDIVMODE_3;
+ pciclk = txx9_cpu_clock / 3;
+ }
+ tx4927_ccfg_change(TX4927_CCFG_PCIDIVMODE_MASK,
+ pcidivmode);
+ printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
+ (unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg));
+ } else
+ pciclk = -1;
+ return pciclk;
+}
diff --git a/arch/mips/pci/pci-tx4938.c b/arch/mips/pci/pci-tx4938.c
new file mode 100644
index 0000000..e537551
--- /dev/null
+++ b/arch/mips/pci/pci-tx4938.c
@@ -0,0 +1,134 @@
+/*
+ * linux/arch/mips/pci/pci-tx4938.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001, 2003-2005 MontaVista Software Inc.
+ * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/tx4938.h>
+
+int __init tx4938_report_pciclk(void)
+{
+ int pciclk = 0;
+
+ printk(KERN_INFO "PCIC --%s PCICLK:",
+ (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ?
+ " PCI66" : "");
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
+ u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
+ switch ((unsigned long)ccfg &
+ TX4938_CCFG_PCIDIVMODE_MASK) {
+ case TX4938_CCFG_PCIDIVMODE_4:
+ pciclk = txx9_cpu_clock / 4; break;
+ case TX4938_CCFG_PCIDIVMODE_4_5:
+ pciclk = txx9_cpu_clock * 2 / 9; break;
+ case TX4938_CCFG_PCIDIVMODE_5:
+ pciclk = txx9_cpu_clock / 5; break;
+ case TX4938_CCFG_PCIDIVMODE_5_5:
+ pciclk = txx9_cpu_clock * 2 / 11; break;
+ case TX4938_CCFG_PCIDIVMODE_8:
+ pciclk = txx9_cpu_clock / 8; break;
+ case TX4938_CCFG_PCIDIVMODE_9:
+ pciclk = txx9_cpu_clock / 9; break;
+ case TX4938_CCFG_PCIDIVMODE_10:
+ pciclk = txx9_cpu_clock / 10; break;
+ case TX4938_CCFG_PCIDIVMODE_11:
+ pciclk = txx9_cpu_clock / 11; break;
+ }
+ printk("Internal(%u.%uMHz)",
+ (pciclk + 50000) / 1000000,
+ ((pciclk + 50000) / 100000) % 10);
+ } else {
+ printk("External");
+ pciclk = -1;
+ }
+ printk("\n");
+ return pciclk;
+}
+
+void __init tx4938_report_pci1clk(void)
+{
+ __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
+ unsigned int pciclk =
+ txx9_gbus_clock / ((ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2);
+
+ printk(KERN_INFO "PCIC1 -- %sPCICLK:%u.%uMHz\n",
+ (ccfg & TX4938_CCFG_PCI1_66) ? "PCI66 " : "",
+ (pciclk + 50000) / 1000000,
+ ((pciclk + 50000) / 100000) % 10);
+}
+
+int __init tx4938_pciclk66_setup(void)
+{
+ int pciclk;
+
+ /* Assert M66EN */
+ tx4938_ccfg_set(TX4938_CCFG_PCI66);
+ /* Double PCICLK (if possible) */
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
+ unsigned int pcidivmode = 0;
+ u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
+ pcidivmode = (unsigned long)ccfg &
+ TX4938_CCFG_PCIDIVMODE_MASK;
+ switch (pcidivmode) {
+ case TX4938_CCFG_PCIDIVMODE_8:
+ case TX4938_CCFG_PCIDIVMODE_4:
+ pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
+ pciclk = txx9_cpu_clock / 4;
+ break;
+ case TX4938_CCFG_PCIDIVMODE_9:
+ case TX4938_CCFG_PCIDIVMODE_4_5:
+ pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
+ pciclk = txx9_cpu_clock * 2 / 9;
+ break;
+ case TX4938_CCFG_PCIDIVMODE_10:
+ case TX4938_CCFG_PCIDIVMODE_5:
+ pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
+ pciclk = txx9_cpu_clock / 5;
+ break;
+ case TX4938_CCFG_PCIDIVMODE_11:
+ case TX4938_CCFG_PCIDIVMODE_5_5:
+ default:
+ pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
+ pciclk = txx9_cpu_clock * 2 / 11;
+ break;
+ }
+ tx4938_ccfg_change(TX4938_CCFG_PCIDIVMODE_MASK,
+ pcidivmode);
+ printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
+ (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg));
+ } else
+ pciclk = -1;
+ return pciclk;
+}
+
+int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
+{
+ if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) {
+ switch (slot) {
+ case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) &
+ TX4938_PCFG_ETH0_SEL)
+ return TXX9_IRQ_BASE + TX4938_IR_ETH0;
+ break;
+ case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) &
+ TX4938_PCFG_ETH1_SEL)
+ return TXX9_IRQ_BASE + TX4938_IR_ETH1;
+ break;
+ }
+ return 0;
+ }
+ return -1;
+}
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 358ad62..d7d6cb06 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -29,8 +29,7 @@
* The PCI controller list.
*/
-struct pci_controller *hose_head, **hose_tail = &hose_head;
-struct pci_controller *pci_isa_hose;
+static struct pci_controller *hose_head, **hose_tail = &hose_head;
unsigned long PCIBIOS_MIN_IO = 0x0000;
unsigned long PCIBIOS_MIN_MEM = 0;
diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c
index 3f35d63..5268ac1 100644
--- a/arch/mips/sgi-ip22/ip22-mc.c
+++ b/arch/mips/sgi-ip22/ip22-mc.c
@@ -208,4 +208,30 @@
void __init prom_meminit(void) {}
void __init prom_free_prom_memory(void)
{
+#ifdef CONFIG_SGI_IP28
+ u32 mconfig1;
+ unsigned long flags;
+ spinlock_t lock;
+
+ /*
+ * because ARCS accesses memory uncached we wait until ARCS
+ * isn't needed any longer, before we switch from slow to
+ * normal mode
+ */
+ spin_lock_irqsave(&lock, flags);
+ mconfig1 = sgimc->mconfig1;
+ /* map ECC register */
+ sgimc->mconfig1 = (mconfig1 & 0xffff0000) | 0x2060;
+ iob();
+ /* switch to normal mode */
+ *(unsigned long *)PHYS_TO_XKSEG_UNCACHED(0x60000000) = 0;
+ iob();
+ /* reduce WR_COL */
+ sgimc->cmacc = (sgimc->cmacc & ~0xf) | 4;
+ iob();
+ /* restore old config */
+ sgimc->mconfig1 = mconfig1;
+ iob();
+ spin_unlock_irqrestore(&lock, flags);
+#endif
}
diff --git a/arch/mips/sgi-ip22/ip22-platform.c b/arch/mips/sgi-ip22/ip22-platform.c
index 28ffec8..fc6df96 100644
--- a/arch/mips/sgi-ip22/ip22-platform.c
+++ b/arch/mips/sgi-ip22/ip22-platform.c
@@ -175,3 +175,21 @@
}
device_initcall(sgiseeq_devinit);
+
+static int __init sgi_hal2_devinit(void)
+{
+ return IS_ERR(platform_device_register_simple("sgihal2", 0, NULL, 0));
+}
+
+device_initcall(sgi_hal2_devinit);
+
+static int __init sgi_button_devinit(void)
+{
+ if (ip22_is_fullhouse())
+ return 0; /* full house has no volume buttons */
+
+ return IS_ERR(platform_device_register_simple("sgiindybtns",
+ -1, NULL, 0));
+}
+
+device_initcall(sgi_button_devinit);
diff --git a/arch/mips/sgi-ip22/ip22-reset.c b/arch/mips/sgi-ip22/ip22-reset.c
index a435b31..4ad5c33 100644
--- a/arch/mips/sgi-ip22/ip22-reset.c
+++ b/arch/mips/sgi-ip22/ip22-reset.c
@@ -39,7 +39,7 @@
#define POWERDOWN_FREQ (HZ / 4)
#define PANIC_FREQ (HZ / 8)
-static struct timer_list power_timer, blink_timer, debounce_timer, volume_timer;
+static struct timer_list power_timer, blink_timer, debounce_timer;
#define MACHINE_PANICED 1
#define MACHINE_SHUTTING_DOWN 2
@@ -139,36 +139,6 @@
add_timer(&power_timer);
}
-void (*indy_volume_button)(int) = NULL;
-
-EXPORT_SYMBOL(indy_volume_button);
-
-static inline void volume_up_button(unsigned long data)
-{
- del_timer(&volume_timer);
-
- if (indy_volume_button)
- indy_volume_button(1);
-
- if (sgint->istat1 & SGINT_ISTAT1_PWR) {
- volume_timer.expires = jiffies + (HZ / 100);
- add_timer(&volume_timer);
- }
-}
-
-static inline void volume_down_button(unsigned long data)
-{
- del_timer(&volume_timer);
-
- if (indy_volume_button)
- indy_volume_button(-1);
-
- if (sgint->istat1 & SGINT_ISTAT1_PWR) {
- volume_timer.expires = jiffies + (HZ / 100);
- add_timer(&volume_timer);
- }
-}
-
static irqreturn_t panel_int(int irq, void *dev_id)
{
unsigned int buttons;
@@ -190,25 +160,8 @@
* House. Only lowest 2 bits are used. Guiness uses upper four bits
* for volume control". This is not true, all bits are pulled high
* on fullhouse */
- if (ip22_is_fullhouse() || !(buttons & SGIOC_PANEL_POWERINTR)) {
+ if (!(buttons & SGIOC_PANEL_POWERINTR))
power_button();
- return IRQ_HANDLED;
- }
- /* TODO: mute/unmute */
- /* Volume up button was pressed */
- if (!(buttons & SGIOC_PANEL_VOLUPINTR)) {
- init_timer(&volume_timer);
- volume_timer.function = volume_up_button;
- volume_timer.expires = jiffies + (HZ / 100);
- add_timer(&volume_timer);
- }
- /* Volume down button was pressed */
- if (!(buttons & SGIOC_PANEL_VOLDNINTR)) {
- init_timer(&volume_timer);
- volume_timer.function = volume_down_button;
- volume_timer.expires = jiffies + (HZ / 100);
- add_timer(&volume_timer);
- }
return IRQ_HANDLED;
}
diff --git a/arch/mips/sgi-ip22/ip28-berr.c b/arch/mips/sgi-ip22/ip28-berr.c
index 30e12e2..fee7a2e 100644
--- a/arch/mips/sgi-ip22/ip28-berr.c
+++ b/arch/mips/sgi-ip22/ip28-berr.c
@@ -412,7 +412,7 @@
* Now we have an asynchronous bus error, speculatively or DMA caused.
* Need to search all DMA descriptors for the error address.
*/
- for (i = 0; i < sizeof(hpc3)/sizeof(struct hpc3_stat); ++i) {
+ for (i = 0; i < ARRAY_SIZE(hpc3); ++i) {
struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i;
if ((cpu_err_stat & CPU_ERRMASK) &&
(cpu_err_addr == hp->ndptr || cpu_err_addr == hp->cbp))
@@ -421,7 +421,7 @@
(gio_err_addr == hp->ndptr || gio_err_addr == hp->cbp))
break;
}
- if (i < sizeof(hpc3)/sizeof(struct hpc3_stat)) {
+ if (i < ARRAY_SIZE(hpc3)) {
struct hpc3_stat *hp = (struct hpc3_stat *)&hpc3 + i;
printk(KERN_ERR "at DMA addresses: HPC3 @ %08lx:"
" ctl %08x, ndp %08x, cbp %08x\n",
diff --git a/arch/mips/sgi-ip27/ip27-nmi.c b/arch/mips/sgi-ip27/ip27-nmi.c
index b0a25e1..64459e7 100644
--- a/arch/mips/sgi-ip27/ip27-nmi.c
+++ b/arch/mips/sgi-ip27/ip27-nmi.c
@@ -1,4 +1,3 @@
-#include <linux/kallsyms.h>
#include <linux/kernel.h>
#include <linux/mmzone.h>
#include <linux/nodemask.h>
@@ -84,13 +83,10 @@
/*
* Saved cp0 registers
*/
- printk("epc : %016lx ", nr->epc);
- print_symbol("%s ", nr->epc);
+ printk("epc : %016lx %pS\n", nr->epc, (void *) nr->epc);
printk("%s\n", print_tainted());
- printk("ErrEPC: %016lx ", nr->error_epc);
- print_symbol("%s\n", nr->error_epc);
- printk("ra : %016lx ", nr->gpr[31]);
- print_symbol("%s\n", nr->gpr[31]);
+ printk("ErrEPC: %016lx %pS\n", nr->error_epc, (void *) nr->error_epc);
+ printk("ra : %016lx %pS\n", nr->gpr[31], (void *) nr->gpr[31]);
printk("Status: %08lx ", nr->sr);
if (nr->sr & ST0_KX)
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index 89a71f4..2ee401b 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -65,6 +65,42 @@
device_initcall(meth_devinit);
+static __init int sgio2audio_devinit(void)
+{
+ struct platform_device *pd;
+ int ret;
+
+ pd = platform_device_alloc("sgio2audio", -1);
+ if (!pd)
+ return -ENOMEM;
+
+ ret = platform_device_add(pd);
+ if (ret)
+ platform_device_put(pd);
+
+ return ret;
+}
+
+device_initcall(sgio2audio_devinit);
+
+static __init int sgio2btns_devinit(void)
+{
+ struct platform_device *pd;
+ int ret;
+
+ pd = platform_device_alloc("sgio2btns", -1);
+ if (!pd)
+ return -ENOMEM;
+
+ ret = platform_device_add(pd);
+ if (ret)
+ platform_device_put(pd);
+
+ return ret;
+}
+
+device_initcall(sgio2btns_devinit);
+
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c
index 5484e1c..a49272c 100644
--- a/arch/mips/sni/setup.c
+++ b/arch/mips/sni/setup.c
@@ -116,7 +116,6 @@
/*
* Setup (E)ISA I/O memory access stuff
*/
- isa_slot_offset = CKSEG1ADDR(0xb0000000);
#ifdef CONFIG_EISA
EISA_bus = 1;
#endif
diff --git a/arch/mips/tx4927/Kconfig b/arch/mips/tx4927/Kconfig
deleted file mode 100644
index 5fbbe12..0000000
--- a/arch/mips/tx4927/Kconfig
+++ /dev/null
@@ -1,3 +0,0 @@
-config TOSHIBA_FPCIB0
- bool "FPCIB0 Backplane Support"
- depends on TOSHIBA_RBTX4927
diff --git a/arch/mips/tx4927/common/Makefile b/arch/mips/tx4927/common/Makefile
deleted file mode 100644
index a7fe76a..0000000
--- a/arch/mips/tx4927/common/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# Makefile for common code for Toshiba TX4927 based systems
-#
-
-obj-y += tx4927_prom.o tx4927_irq.o
-
-obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
-obj-$(CONFIG_KGDB) += tx4927_dbgio.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4927/common/smsc_fdc37m81x.c b/arch/mips/tx4927/common/smsc_fdc37m81x.c
deleted file mode 100644
index 33f517b..0000000
--- a/arch/mips/tx4927/common/smsc_fdc37m81x.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * Interface for smsc fdc48m81x Super IO chip
- *
- * Author: MontaVista Software, Inc. source@mvista.com
- *
- * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Copyright 2004 (c) MontaVista Software, Inc.
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <asm/io.h>
-#include <asm/tx4927/smsc_fdc37m81x.h>
-
-#define DEBUG
-
-/* Common Registers */
-#define SMSC_FDC37M81X_CONFIG_INDEX 0x00
-#define SMSC_FDC37M81X_CONFIG_DATA 0x01
-#define SMSC_FDC37M81X_CONF 0x02
-#define SMSC_FDC37M81X_INDEX 0x03
-#define SMSC_FDC37M81X_DNUM 0x07
-#define SMSC_FDC37M81X_DID 0x20
-#define SMSC_FDC37M81X_DREV 0x21
-#define SMSC_FDC37M81X_PCNT 0x22
-#define SMSC_FDC37M81X_PMGT 0x23
-#define SMSC_FDC37M81X_OSC 0x24
-#define SMSC_FDC37M81X_CONFPA0 0x26
-#define SMSC_FDC37M81X_CONFPA1 0x27
-#define SMSC_FDC37M81X_TEST4 0x2B
-#define SMSC_FDC37M81X_TEST5 0x2C
-#define SMSC_FDC37M81X_TEST1 0x2D
-#define SMSC_FDC37M81X_TEST2 0x2E
-#define SMSC_FDC37M81X_TEST3 0x2F
-
-/* Logical device numbers */
-#define SMSC_FDC37M81X_FDD 0x00
-#define SMSC_FDC37M81X_SERIAL1 0x04
-#define SMSC_FDC37M81X_SERIAL2 0x05
-#define SMSC_FDC37M81X_KBD 0x07
-
-/* Logical device Config Registers */
-#define SMSC_FDC37M81X_ACTIVE 0x30
-#define SMSC_FDC37M81X_BASEADDR0 0x60
-#define SMSC_FDC37M81X_BASEADDR1 0x61
-#define SMSC_FDC37M81X_INT 0x70
-#define SMSC_FDC37M81X_INT2 0x72
-#define SMSC_FDC37M81X_MODE 0xF0
-
-/* Chip Config Values */
-#define SMSC_FDC37M81X_CONFIG_ENTER 0x55
-#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
-#define SMSC_FDC37M81X_CHIP_ID 0x4d
-
-static unsigned long g_smsc_fdc37m81x_base = 0;
-
-static inline unsigned char smsc_fdc37m81x_rd(unsigned char index)
-{
- outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
-
- return inb(g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);
-}
-
-static inline void smsc_dc37m81x_wr(unsigned char index, unsigned char data)
-{
- outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
- outb(data, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);
-}
-
-void smsc_fdc37m81x_config_beg(void)
-{
- if (g_smsc_fdc37m81x_base) {
- outb(SMSC_FDC37M81X_CONFIG_ENTER,
- g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
- }
-}
-
-void smsc_fdc37m81x_config_end(void)
-{
- if (g_smsc_fdc37m81x_base)
- outb(SMSC_FDC37M81X_CONFIG_EXIT,
- g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
-}
-
-u8 smsc_fdc37m81x_config_get(u8 reg)
-{
- u8 val = 0;
-
- if (g_smsc_fdc37m81x_base)
- val = smsc_fdc37m81x_rd(reg);
-
- return val;
-}
-
-void smsc_fdc37m81x_config_set(u8 reg, u8 val)
-{
- if (g_smsc_fdc37m81x_base)
- smsc_dc37m81x_wr(reg, val);
-}
-
-unsigned long __init smsc_fdc37m81x_init(unsigned long port)
-{
- const int field = sizeof(unsigned long) * 2;
- u8 chip_id;
-
- if (g_smsc_fdc37m81x_base)
- printk("smsc_fdc37m81x_init() stepping on old base=0x%0*lx\n",
- field, g_smsc_fdc37m81x_base);
-
- g_smsc_fdc37m81x_base = port;
-
- smsc_fdc37m81x_config_beg();
-
- chip_id = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DID);
- if (chip_id == SMSC_FDC37M81X_CHIP_ID)
- smsc_fdc37m81x_config_end();
- else {
- printk("smsc_fdc37m81x_init() unknow chip id 0x%02x\n",
- chip_id);
- g_smsc_fdc37m81x_base = 0;
- }
-
- return g_smsc_fdc37m81x_base;
-}
-
-#ifdef DEBUG
-void smsc_fdc37m81x_config_dump_one(char *key, u8 dev, u8 reg)
-{
- printk("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg,
- smsc_fdc37m81x_rd(reg));
-}
-
-void smsc_fdc37m81x_config_dump(void)
-{
- u8 orig;
- char *fname = "smsc_fdc37m81x_config_dump()";
-
- smsc_fdc37m81x_config_beg();
-
- orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM);
-
- printk("%s: common\n", fname);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
- SMSC_FDC37M81X_DNUM);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
- SMSC_FDC37M81X_DID);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
- SMSC_FDC37M81X_DREV);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
- SMSC_FDC37M81X_PCNT);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
- SMSC_FDC37M81X_PMGT);
-
- printk("%s: keyboard\n", fname);
- smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
- SMSC_FDC37M81X_ACTIVE);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
- SMSC_FDC37M81X_INT);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
- SMSC_FDC37M81X_INT2);
- smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
- SMSC_FDC37M81X_LDCR_F0);
-
- smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, orig);
-
- smsc_fdc37m81x_config_end();
-}
-#endif
diff --git a/arch/mips/tx4927/common/tx4927_dbgio.c b/arch/mips/tx4927/common/tx4927_dbgio.c
deleted file mode 100644
index d8423e0..0000000
--- a/arch/mips/tx4927/common/tx4927_dbgio.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * linux/arch/mips/tx4927/common/tx4927_dbgio.c
- *
- * kgdb interface for gdb
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <asm/mipsregs.h>
-#include <asm/system.h>
-
-u8 getDebugChar(void)
-{
- extern u8 txx9_sio_kdbg_rd(void);
- return (txx9_sio_kdbg_rd());
-}
-
-
-int putDebugChar(u8 byte)
-{
- extern int txx9_sio_kdbg_wr( u8 ch );
- return (txx9_sio_kdbg_wr(byte));
-}
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
deleted file mode 100644
index 0aabd57..0000000
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Common tx4927 irq handler
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/tx4927/tx4927.h>
-#ifdef CONFIG_TOSHIBA_RBTX4927
-#include <asm/tx4927/toshiba_rbtx4927.h>
-#endif
-
-void __init tx4927_irq_init(void)
-{
- mips_cpu_irq_init();
- txx9_irq_init(TX4927_IRC_REG);
- set_irq_chained_handler(TX4927_IRQ_NEST_PIC_ON_CP0, handle_simple_irq);
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
-
- if (pending & STATUSF_IP7) /* cpu timer */
- do_IRQ(TX4927_IRQ_CPU_TIMER);
- else if (pending & STATUSF_IP2) { /* tx4927 pic */
- int irq = txx9_irq();
-#ifdef CONFIG_TOSHIBA_RBTX4927
- if (irq == TX4927_IRQ_NEST_EXT_ON_PIC)
- irq = toshiba_rbtx4927_irq_nested(irq);
-#endif
- if (unlikely(irq < 0)) {
- spurious_interrupt();
- return;
- }
- do_IRQ(irq);
- } else if (pending & STATUSF_IP0) /* user line 0 */
- do_IRQ(TX4927_IRQ_USER0);
- else if (pending & STATUSF_IP1) /* user line 1 */
- do_IRQ(TX4927_IRQ_USER1);
- else
- spurious_interrupt();
-}
diff --git a/arch/mips/tx4927/common/tx4927_prom.c b/arch/mips/tx4927/common/tx4927_prom.c
deleted file mode 100644
index 6eed53d..0000000
--- a/arch/mips/tx4927/common/tx4927_prom.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * linux/arch/mips/tx4927/common/tx4927_prom.c
- *
- * common tx4927 memory interface
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/tx4927/tx4927.h>
-
-static unsigned int __init tx4927_process_sdccr(unsigned long addr)
-{
- u64 val;
- unsigned int sdccr_ce;
- unsigned int sdccr_bs;
- unsigned int sdccr_rs;
- unsigned int sdccr_cs;
- unsigned int sdccr_mw;
- unsigned int bs = 0;
- unsigned int rs = 0;
- unsigned int cs = 0;
- unsigned int mw = 0;
- unsigned int msize = 0;
-
- val = __raw_readq((void __iomem *)addr);
-
- /* MVMCP -- need #defs for these bits masks */
- sdccr_ce = ((val & (1 << 10)) >> 10);
- sdccr_bs = ((val & (1 << 8)) >> 8);
- sdccr_rs = ((val & (3 << 5)) >> 5);
- sdccr_cs = ((val & (3 << 2)) >> 2);
- sdccr_mw = ((val & (1 << 0)) >> 0);
-
- if (sdccr_ce) {
- switch (sdccr_bs) {
- case 0:{
- bs = 2;
- break;
- }
- case 1:{
- bs = 4;
- break;
- }
- }
- switch (sdccr_rs) {
- case 0:{
- rs = 2048;
- break;
- }
- case 1:{
- rs = 4096;
- break;
- }
- case 2:{
- rs = 8192;
- break;
- }
- case 3:{
- rs = 0;
- break;
- }
- }
- switch (sdccr_cs) {
- case 0:{
- cs = 256;
- break;
- }
- case 1:{
- cs = 512;
- break;
- }
- case 2:{
- cs = 1024;
- break;
- }
- case 3:{
- cs = 2048;
- break;
- }
- }
- switch (sdccr_mw) {
- case 0:{
- mw = 8;
- break;
- } /* 8 bytes = 64 bits */
- case 1:{
- mw = 4;
- break;
- } /* 4 bytes = 32 bits */
- }
- }
-
- /* bytes per chip MB per chip num chips */
- msize = (((rs * cs * mw) / (1024 * 1024)) * bs);
-
- return (msize);
-}
-
-
-unsigned int __init tx4927_get_mem_size(void)
-{
- unsigned int c0;
- unsigned int c1;
- unsigned int c2;
- unsigned int c3;
- unsigned int total;
-
- /* MVMCP -- need #defs for these registers */
- c0 = tx4927_process_sdccr(0xff1f8000);
- c1 = tx4927_process_sdccr(0xff1f8008);
- c2 = tx4927_process_sdccr(0xff1f8010);
- c3 = tx4927_process_sdccr(0xff1f8018);
- total = c0 + c1 + c2 + c3;
-
- return (total);
-}
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/Makefile b/arch/mips/tx4927/toshiba_rbtx4927/Makefile
deleted file mode 100644
index 13f9672..0000000
--- a/arch/mips/tx4927/toshiba_rbtx4927/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-obj-y += toshiba_rbtx4927_prom.o
-obj-y += toshiba_rbtx4927_setup.o
-obj-y += toshiba_rbtx4927_irq.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
deleted file mode 100644
index 6d31f2a..0000000
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ /dev/null
@@ -1,428 +0,0 @@
-/*
- * linux/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
- *
- * Toshiba RBTX4927 specific interrupt handlers
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-
-/*
-IRQ Device
-00 RBTX4927-ISA/00
-01 RBTX4927-ISA/01 PS2/Keyboard
-02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
-03 RBTX4927-ISA/03
-04 RBTX4927-ISA/04
-05 RBTX4927-ISA/05
-06 RBTX4927-ISA/06
-07 RBTX4927-ISA/07
-08 RBTX4927-ISA/08
-09 RBTX4927-ISA/09
-10 RBTX4927-ISA/10
-11 RBTX4927-ISA/11
-12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
-13 RBTX4927-ISA/13
-14 RBTX4927-ISA/14 IDE
-15 RBTX4927-ISA/15
-
-16 TX4927-CP0/00 Software 0
-17 TX4927-CP0/01 Software 1
-18 TX4927-CP0/02 Cascade TX4927-CP0
-19 TX4927-CP0/03 Multiplexed -- do not use
-20 TX4927-CP0/04 Multiplexed -- do not use
-21 TX4927-CP0/05 Multiplexed -- do not use
-22 TX4927-CP0/06 Multiplexed -- do not use
-23 TX4927-CP0/07 CPU TIMER
-
-24 TX4927-PIC/00
-25 TX4927-PIC/01
-26 TX4927-PIC/02
-27 TX4927-PIC/03 Cascade RBTX4927-IOC
-28 TX4927-PIC/04
-29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
-30 TX4927-PIC/06
-31 TX4927-PIC/07
-32 TX4927-PIC/08 TX4927 SerialIO Channel 0
-33 TX4927-PIC/09 TX4927 SerialIO Channel 1
-34 TX4927-PIC/10
-35 TX4927-PIC/11
-36 TX4927-PIC/12
-37 TX4927-PIC/13
-38 TX4927-PIC/14
-39 TX4927-PIC/15
-40 TX4927-PIC/16 TX4927 PCI PCI-C
-41 TX4927-PIC/17
-42 TX4927-PIC/18
-43 TX4927-PIC/19
-44 TX4927-PIC/20
-45 TX4927-PIC/21
-46 TX4927-PIC/22 TX4927 PCI PCI-ERR
-47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
-48 TX4927-PIC/24
-49 TX4927-PIC/25
-50 TX4927-PIC/26
-51 TX4927-PIC/27
-52 TX4927-PIC/28
-53 TX4927-PIC/29
-54 TX4927-PIC/30
-55 TX4927-PIC/31
-
-56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4]
-57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5]
-58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
-59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6]
-60 RBTX4927-IOC/04
-61 RBTX4927-IOC/05
-62 RBTX4927-IOC/06
-63 RBTX4927-IOC/07
-
-NOTES:
-SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
-SouthBridge/ISA/pin=0 no pci irq used by this device
-SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
-SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
-SouthBridge/PMC/pin=0 no pci irq used by this device
-SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
-SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
-JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
-*/
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/ioport.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/timex.h>
-#include <asm/bootinfo.h>
-#include <asm/page.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/pci.h>
-#include <asm/processor.h>
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/wbflush.h>
-#include <linux/bootmem.h>
-#include <linux/blkdev.h>
-#ifdef CONFIG_TOSHIBA_FPCIB0
-#include <asm/i8259.h>
-#include <asm/tx4927/smsc_fdc37m81x.h>
-#endif
-#include <asm/tx4927/toshiba_rbtx4927.h>
-
-
-#undef TOSHIBA_RBTX4927_IRQ_DEBUG
-
-#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
-#define TOSHIBA_RBTX4927_IRQ_NONE 0x00000000
-
-#define TOSHIBA_RBTX4927_IRQ_INFO ( 1 << 0 )
-#define TOSHIBA_RBTX4927_IRQ_WARN ( 1 << 1 )
-#define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 )
-
-#define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 )
-#define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 )
-#define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 )
-
-#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff
-#endif
-
-
-#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
-static const u32 toshiba_rbtx4927_irq_debug_flag =
- (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
- TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
-// | TOSHIBA_RBTX4927_IRQ_IOC_INIT
-// | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
-// | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
- );
-#endif
-
-
-#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
-#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) \
- if ( (toshiba_rbtx4927_irq_debug_flag) & (flag) ) \
- { \
- char tmp[100]; \
- sprintf( tmp, str ); \
- printk( "%s(%s:%u)::%s", __func__, __FILE__, __LINE__, tmp ); \
- }
-#else
-#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag, str...)
-#endif
-
-
-
-
-#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0
-#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7
-
-#define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG) /* 56 */
-#define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END) /* 63 */
-
-#define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC
-#define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2)
-
-extern int tx4927_using_backplane;
-
-static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
-static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
-
-#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
-static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
- .name = TOSHIBA_RBTX4927_IOC_NAME,
- .ack = toshiba_rbtx4927_irq_ioc_disable,
- .mask = toshiba_rbtx4927_irq_ioc_disable,
- .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
- .unmask = toshiba_rbtx4927_irq_ioc_enable,
-};
-#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
-#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
-
-
-u32 bit2num(u32 num)
-{
- u32 i;
-
- for (i = 0; i < (sizeof(num) * 8); i++) {
- if (num & (1 << i)) {
- return (i);
- }
- }
- return (0);
-}
-
-int toshiba_rbtx4927_irq_nested(int sw_irq)
-{
- u32 level3;
-
- level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
- if (level3) {
- sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3);
- if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) {
- goto RETURN;
- }
- }
-#ifdef CONFIG_TOSHIBA_FPCIB0
- if (tx4927_using_backplane) {
- int irq = i8259_irq();
- if (irq >= 0)
- sw_irq = irq;
- }
-#endif
-
- RETURN:
- return (sw_irq);
-}
-
-static struct irqaction toshiba_rbtx4927_irq_ioc_action = {
- .handler = no_action,
- .flags = IRQF_SHARED,
- .mask = CPU_MASK_NONE,
- .name = TOSHIBA_RBTX4927_IOC_NAME
-};
-
-
-/**********************************************************************************/
-/* Functions for ioc */
-/**********************************************************************************/
-
-
-static void __init toshiba_rbtx4927_irq_ioc_init(void)
-{
- int i;
-
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_INIT,
- "beg=%d end=%d\n",
- TOSHIBA_RBTX4927_IRQ_IOC_BEG,
- TOSHIBA_RBTX4927_IRQ_IOC_END);
-
- for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
- i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++)
- set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
- handle_level_irq);
-
- setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
- &toshiba_rbtx4927_irq_ioc_action);
-}
-
-static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
-{
- volatile unsigned char v;
-
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE,
- "irq=%d\n", irq);
-
- if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
- || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
- "bad irq=%d\n", irq);
- panic("\n");
- }
-
- v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
- v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
- writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
-}
-
-
-static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
-{
- volatile unsigned char v;
-
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE,
- "irq=%d\n", irq);
-
- if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
- || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
- "bad irq=%d\n", irq);
- panic("\n");
- }
-
- v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
- v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
- writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
- mmiowb();
-}
-
-
-void __init arch_init_irq(void)
-{
- extern void tx4927_irq_init(void);
-
- tx4927_irq_init();
- toshiba_rbtx4927_irq_ioc_init();
-#ifdef CONFIG_TOSHIBA_FPCIB0
- if (tx4927_using_backplane)
- init_i8259_irqs();
-#endif
- /* Onboard 10M Ether: High Active */
- set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
-
- wbflush();
-}
-
-void toshiba_rbtx4927_irq_dump(char *key)
-{
-#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
- {
- u32 i, j = 0;
- for (i = 0; i < NR_IRQS; i++) {
- if (strcmp(irq_desc[i].chip->name, "none")
- == 0)
- continue;
-
- if ((i >= 1)
- && (irq_desc[i - 1].chip->name ==
- irq_desc[i].chip->name)) {
- j++;
- } else {
- j = 0;
- }
- TOSHIBA_RBTX4927_IRQ_DPRINTK
- (TOSHIBA_RBTX4927_IRQ_INFO,
- "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
- key, i, i, irq_desc[i].status,
- (u32) irq_desc[i].chip,
- (u32) irq_desc[i].action,
- (u32) (irq_desc[i].action ? irq_desc[i].
- action->handler : 0),
- irq_desc[i].depth,
- irq_desc[i].chip->name, j);
- }
- }
-#endif
-}
-
-void toshiba_rbtx4927_irq_dump_pics(char *s)
-{
- u32 level0_m;
- u32 level0_s;
- u32 level1_m;
- u32 level1_s;
- u32 level2;
- u32 level2_p;
- u32 level2_s;
- u32 level3_m;
- u32 level3_s;
- u32 level4_m;
- u32 level4_s;
- u32 level5_m;
- u32 level5_s;
-
- if (s == NULL)
- s = "null";
-
- level0_m = (read_c0_status() & 0x0000ff00) >> 8;
- level0_s = (read_c0_cause() & 0x0000ff00) >> 8;
-
- level1_m = level0_m;
- level1_s = level0_s & 0x87;
-
- level2 = __raw_readl((void __iomem *)0xff1ff6a0UL);
- level2_p = (((level2 & 0x10000)) ? 0 : 1);
- level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f));
-
- level3_m = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f;
- level3_s = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
-
- level4_m = inb(0x21);
- outb(0x0A, 0x20);
- level4_s = inb(0x20);
-
- level5_m = inb(0xa1);
- outb(0x0A, 0xa0);
- level5_s = inb(0xa0);
-
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "dump_raw_pic() ");
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "cp0:m=0x%02x/s=0x%02x ", level0_m,
- level0_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "cp0:m=0x%02x/s=0x%02x ", level1_m,
- level1_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "pic:e=0x%02x/s=0x%02x ", level2_p,
- level2_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "ioc:m=0x%02x/s=0x%02x ", level3_m,
- level3_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "sbm:m=0x%02x/s=0x%02x ", level4_m,
- level4_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
- "sbs:m=0x%02x/s=0x%02x ", level5_m,
- level5_s);
- TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n",
- s);
-}
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
deleted file mode 100644
index f3f8685..0000000
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * rbtx4927 specific prom routines
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * Copyright (C) 2004 MontaVista Software Inc.
- * Author: Manish Lachwani, mlachwani@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/cpu.h>
-#include <asm/tx4927/tx4927.h>
-
-void __init prom_init_cmdline(void)
-{
- int argc = (int) fw_arg0;
- char **argv = (char **) fw_arg1;
- int i; /* Always ignore the "-c" at argv[0] */
-
- /* ignore all built-in args if any f/w args given */
- if (argc > 1) {
- *arcs_cmdline = '\0';
- }
-
- for (i = 1; i < argc; i++) {
- if (i != 1) {
- strcat(arcs_cmdline, " ");
- }
- strcat(arcs_cmdline, argv[i]);
- }
-}
-
-void __init prom_init(void)
-{
- extern int tx4927_get_mem_size(void);
- extern char* toshiba_name;
- int msize;
-
- prom_init_cmdline();
-
- if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) {
- mips_machtype = MACH_TOSHIBA_RBTX4927;
- toshiba_name = "TX4927";
- } else {
- mips_machtype = MACH_TOSHIBA_RBTX4937;
- toshiba_name = "TX4937";
- }
-
- msize = tx4927_get_mem_size();
- add_memory_region(0, msize << 20, BOOT_MEM_RAM);
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
-
-const char *get_system_type(void)
-{
- return "Toshiba RBTX4927/RBTX4937";
-}
-
-char * __init prom_getcmdline(void)
-{
- return &(arcs_cmdline[0]);
-}
-
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
deleted file mode 100644
index 2203c77..0000000
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
+++ /dev/null
@@ -1,1001 +0,0 @@
-/*
- * Toshiba rbtx4927 specific setup
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
- * Copyright (C) 2000 RidgeRun, Inc.
- * Author: RidgeRun, Inc.
- * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
- *
- * Copyright 2001 MontaVista Software Inc.
- * Author: jsun@mvista.com or jsun@junsun.net
- *
- * Copyright 2002 MontaVista Software Inc.
- * Author: Michael Pruznick, michael_pruznick@mvista.com
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * Copyright (C) 2004 MontaVista Software Inc.
- * Author: Manish Lachwani, mlachwani@mvista.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/pm.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/txx9tmr.h>
-#ifdef CONFIG_TOSHIBA_FPCIB0
-#include <asm/tx4927/smsc_fdc37m81x.h>
-#endif
-#include <asm/tx4927/toshiba_rbtx4927.h>
-#ifdef CONFIG_PCI
-#include <asm/tx4927/tx4927_pci.h>
-#endif
-#ifdef CONFIG_SERIAL_TXX9
-#include <linux/serial_core.h>
-#endif
-
-#undef TOSHIBA_RBTX4927_SETUP_DEBUG
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
-#define TOSHIBA_RBTX4927_SETUP_SETUP ( 1 << 4 )
-#define TOSHIBA_RBTX4927_SETUP_PCIBIOS ( 1 << 7 )
-#define TOSHIBA_RBTX4927_SETUP_PCI1 ( 1 << 8 )
-#define TOSHIBA_RBTX4927_SETUP_PCI2 ( 1 << 9 )
-
-#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff
-#endif
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
-static const u32 toshiba_rbtx4927_setup_debug_flag =
- (TOSHIBA_RBTX4927_SETUP_SETUP |
- | TOSHIBA_RBTX4927_SETUP_PCIBIOS | TOSHIBA_RBTX4927_SETUP_PCI1 |
- TOSHIBA_RBTX4927_SETUP_PCI2);
-#endif
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
-#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag,str...) \
- if ( (toshiba_rbtx4927_setup_debug_flag) & (flag) ) \
- { \
- char tmp[100]; \
- sprintf( tmp, str ); \
- printk( "%s(%s:%u)::%s", __func__, __FILE__, __LINE__, tmp ); \
- }
-#else
-#define TOSHIBA_RBTX4927_SETUP_DPRINTK(flag, str...)
-#endif
-
-/* These functions are used for rebooting or halting the machine*/
-extern void toshiba_rbtx4927_restart(char *command);
-extern void toshiba_rbtx4927_halt(void);
-extern void toshiba_rbtx4927_power_off(void);
-
-int tx4927_using_backplane = 0;
-
-extern void toshiba_rbtx4927_irq_setup(void);
-
-char *prom_getcmdline(void);
-
-#ifdef CONFIG_PCI
-#undef TX4927_SUPPORT_COMMAND_IO
-#undef TX4927_SUPPORT_PCI_66
-int tx4927_cpu_clock = 100000000; /* 100MHz */
-unsigned long mips_pci_io_base;
-unsigned long mips_pci_io_size;
-unsigned long mips_pci_mem_base;
-unsigned long mips_pci_mem_size;
-/* for legacy I/O, PCI I/O PCI Bus address must be 0 */
-unsigned long mips_pci_io_pciaddr = 0;
-unsigned long mips_memory_upper;
-static int tx4927_ccfg_toeon = 1;
-static int tx4927_pcic_trdyto = 0; /* default: disabled */
-unsigned long tx4927_ce_base[8];
-void tx4927_reset_pci_pcic(void);
-int tx4927_pci66 = 0; /* 0:auto */
-#endif
-
-char *toshiba_name = "";
-
-#ifdef CONFIG_PCI
-extern struct pci_controller tx4927_controller;
-
-static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
- int top_bus, int busnr, int devfn)
-{
- static struct pci_dev dev;
- static struct pci_bus bus;
-
- dev.sysdata = (void *)hose;
- dev.devfn = devfn;
- bus.number = busnr;
- bus.ops = hose->pci_ops;
- bus.parent = NULL;
- dev.bus = &bus;
-
- return &dev;
-}
-
-#define EARLY_PCI_OP(rw, size, type) \
-static int early_##rw##_config_##size(struct pci_controller *hose, \
- int top_bus, int bus, int devfn, int offset, type value) \
-{ \
- return pci_##rw##_config_##size( \
- fake_pci_dev(hose, top_bus, bus, devfn), \
- offset, value); \
-}
-
-EARLY_PCI_OP(read, byte, u8 *)
-EARLY_PCI_OP(read, dword, u32 *)
-EARLY_PCI_OP(write, byte, u8)
-EARLY_PCI_OP(write, dword, u32)
-
-static int __init tx4927_pcibios_init(void)
-{
- unsigned int id;
- u32 pci_devfn;
- int devfn_start = 0;
- int devfn_stop = 0xff;
- int busno = 0; /* One bus on the Toshiba */
- struct pci_controller *hose = &tx4927_controller;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- "-\n");
-
- for (pci_devfn = devfn_start; pci_devfn < devfn_stop; pci_devfn++) {
- early_read_config_dword(hose, busno, busno, pci_devfn,
- PCI_VENDOR_ID, &id);
-
- if (id == 0xffffffff) {
- continue;
- }
-
- if (id == 0x94601055) {
- u8 v08_64;
- u32 v32_b0;
- u8 v08_e1;
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
- char *s = " sb/isa --";
-#endif
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
- s);
-
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x64, &v08_64);
- early_read_config_dword(hose, busno, busno,
- pci_devfn, 0xb0, &v32_b0);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0xe1, &v08_e1);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x64 = 0x%02x\n", s, v08_64);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0xb0 = 0x%02x\n", s, v32_b0);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0xe1 = 0x%02x\n", s, v08_e1);
-
- /* serial irq control */
- v08_64 = 0xd0;
-
- /* serial irq pin */
- v32_b0 |= 0x00010000;
-
- /* ide irq on isa14 */
- v08_e1 &= 0xf0;
- v08_e1 |= 0x0d;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x64 = 0x%02x\n", s, v08_64);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0xb0 = 0x%02x\n", s, v32_b0);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0xe1 = 0x%02x\n", s, v08_e1);
-
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x64, v08_64);
- early_write_config_dword(hose, busno, busno,
- pci_devfn, 0xb0, v32_b0);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0xe1, v08_e1);
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
- {
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x64,
- &v08_64);
- early_read_config_dword(hose, busno, busno,
- pci_devfn, 0xb0,
- &v32_b0);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0xe1,
- &v08_e1);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x64 = 0x%02x\n", s, v08_64);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0xb0 = 0x%02x\n", s, v32_b0);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0xe1 = 0x%02x\n", s, v08_e1);
- }
-#endif
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s end\n",
- s);
- }
-
- if (id == 0x91301055) {
- u8 v08_04;
- u8 v08_09;
- u8 v08_41;
- u8 v08_43;
- u8 v08_5c;
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
- char *s = " sb/ide --";
-#endif
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s beg\n",
- s);
-
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x04, &v08_04);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x09, &v08_09);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x41, &v08_41);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x43, &v08_43);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x5c, &v08_5c);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x04 = 0x%02x\n", s, v08_04);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x09 = 0x%02x\n", s, v08_09);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x41 = 0x%02x\n", s, v08_41);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x43 = 0x%02x\n", s, v08_43);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s beg 0x5c = 0x%02x\n", s, v08_5c);
-
- /* enable ide master/io */
- v08_04 |= (PCI_COMMAND_MASTER | PCI_COMMAND_IO);
-
- /* enable ide native mode */
- v08_09 |= 0x05;
-
- /* enable primary ide */
- v08_41 |= 0x80;
-
- /* enable secondary ide */
- v08_43 |= 0x80;
-
- /*
- * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
- *
- * This line of code is intended to provide the user with a work
- * around solution to the anomalies cited in SMSC's anomaly sheet
- * entitled, "SLC90E66 Functional Rev.J_0.1 Anomalies"".
- *
- * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
- */
- v08_5c |= 0x01;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x04 = 0x%02x\n", s, v08_04);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x09 = 0x%02x\n", s, v08_09);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x41 = 0x%02x\n", s, v08_41);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x43 = 0x%02x\n", s, v08_43);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s mid 0x5c = 0x%02x\n", s, v08_5c);
-
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x5c, v08_5c);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x04, v08_04);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x09, v08_09);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x41, v08_41);
- early_write_config_byte(hose, busno, busno,
- pci_devfn, 0x43, v08_43);
-
-#ifdef TOSHIBA_RBTX4927_SETUP_DEBUG
- {
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x04,
- &v08_04);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x09,
- &v08_09);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x41,
- &v08_41);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x43,
- &v08_43);
- early_read_config_byte(hose, busno, busno,
- pci_devfn, 0x5c,
- &v08_5c);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x04 = 0x%02x\n", s, v08_04);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x09 = 0x%02x\n", s, v08_09);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x41 = 0x%02x\n", s, v08_41);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x43 = 0x%02x\n", s, v08_43);
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- ":%s end 0x5c = 0x%02x\n", s, v08_5c);
- }
-#endif
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_PCIBIOS, ":%s end\n",
- s);
- }
-
- }
-
- register_pci_controller(&tx4927_controller);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCIBIOS,
- "+\n");
-
- return 0;
-}
-
-arch_initcall(tx4927_pcibios_init);
-
-extern struct resource pci_io_resource;
-extern struct resource pci_mem_resource;
-
-void __init tx4927_pci_setup(void)
-{
- static int called = 0;
- extern unsigned int tx4927_get_mem_size(void);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "-\n");
-
- mips_memory_upper = tx4927_get_mem_size() << 20;
- mips_memory_upper += KSEG0;
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_memory_upper\n",
- mips_memory_upper);
- mips_pci_io_base = TX4927_PCIIO;
- mips_pci_io_size = TX4927_PCIIO_SIZE;
- mips_pci_mem_base = TX4927_PCIMEM;
- mips_pci_mem_size = TX4927_PCIMEM_SIZE;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_pci_io_base\n",
- mips_pci_io_base);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_pci_io_size\n",
- mips_pci_io_size);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_pci_mem_base\n",
- mips_pci_mem_base);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_pci_mem_size\n",
- mips_pci_mem_size);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=pci_io_resource.start\n",
- pci_io_resource.start);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=pci_io_resource.end\n",
- pci_io_resource.end);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=pci_mem_resource.start\n",
- pci_mem_resource.start);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=pci_mem_resource.end\n",
- pci_mem_resource.end);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- "0x%08lx=mips_io_port_base",
- mips_io_port_base);
- if (!called) {
- printk
- ("%s PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
- toshiba_name,
- (unsigned short) (tx4927_pcicptr->pciid >> 16),
- (unsigned short) (tx4927_pcicptr->pciid & 0xffff),
- (unsigned short) (tx4927_pcicptr->pciccrev & 0xff),
- (!(tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIXARB)) ? "External" :
- "Internal");
- called = 1;
- }
- printk("%s PCIC --%s PCICLK:", toshiba_name,
- (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
- if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
- int pciclk = 0;
- if (mips_machtype == MACH_TOSHIBA_RBTX4937)
- switch ((unsigned long) tx4927_ccfgptr->
- ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
- case TX4937_CCFG_PCIDIVMODE_4:
- pciclk = tx4927_cpu_clock / 4;
- break;
- case TX4937_CCFG_PCIDIVMODE_4_5:
- pciclk = tx4927_cpu_clock * 2 / 9;
- break;
- case TX4937_CCFG_PCIDIVMODE_5:
- pciclk = tx4927_cpu_clock / 5;
- break;
- case TX4937_CCFG_PCIDIVMODE_5_5:
- pciclk = tx4927_cpu_clock * 2 / 11;
- break;
- case TX4937_CCFG_PCIDIVMODE_8:
- pciclk = tx4927_cpu_clock / 8;
- break;
- case TX4937_CCFG_PCIDIVMODE_9:
- pciclk = tx4927_cpu_clock / 9;
- break;
- case TX4937_CCFG_PCIDIVMODE_10:
- pciclk = tx4927_cpu_clock / 10;
- break;
- case TX4937_CCFG_PCIDIVMODE_11:
- pciclk = tx4927_cpu_clock / 11;
- break;
- }
-
- else
- switch ((unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
- case TX4927_CCFG_PCIDIVMODE_2_5:
- pciclk = tx4927_cpu_clock * 2 / 5;
- break;
- case TX4927_CCFG_PCIDIVMODE_3:
- pciclk = tx4927_cpu_clock / 3;
- break;
- case TX4927_CCFG_PCIDIVMODE_5:
- pciclk = tx4927_cpu_clock / 5;
- break;
- case TX4927_CCFG_PCIDIVMODE_6:
- pciclk = tx4927_cpu_clock / 6;
- break;
- }
-
- printk("Internal(%dMHz)", pciclk / 1000000);
- } else {
- int pciclk = 0;
- int pciclk_setting = *tx4927_pci_clk_ptr;
- switch (pciclk_setting & TX4927_PCI_CLK_MASK) {
- case TX4927_PCI_CLK_33:
- pciclk = 33333333;
- break;
- case TX4927_PCI_CLK_25:
- pciclk = 25000000;
- break;
- case TX4927_PCI_CLK_66:
- pciclk = 66666666;
- break;
- case TX4927_PCI_CLK_50:
- pciclk = 50000000;
- break;
- }
- printk("External(%dMHz)", pciclk / 1000000);
- }
- printk("\n");
-
-
-
- /* GB->PCI mappings */
- tx4927_pcicptr->g2piomask = (mips_pci_io_size - 1) >> 4;
- tx4927_pcicptr->g2piogbase = mips_pci_io_base |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_G2PIOGBASE_ECHG
-#else
- TX4927_PCIC_G2PIOGBASE_BSDIS
-#endif
- ;
-
- tx4927_pcicptr->g2piopbase = 0;
-
- tx4927_pcicptr->g2pmmask[0] = (mips_pci_mem_size - 1) >> 4;
- tx4927_pcicptr->g2pmgbase[0] = mips_pci_mem_base |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_G2PMnGBASE_ECHG
-#else
- TX4927_PCIC_G2PMnGBASE_BSDIS
-#endif
- ;
- tx4927_pcicptr->g2pmpbase[0] = mips_pci_mem_base;
-
- tx4927_pcicptr->g2pmmask[1] = 0;
- tx4927_pcicptr->g2pmgbase[1] = 0;
- tx4927_pcicptr->g2pmpbase[1] = 0;
- tx4927_pcicptr->g2pmmask[2] = 0;
- tx4927_pcicptr->g2pmgbase[2] = 0;
- tx4927_pcicptr->g2pmpbase[2] = 0;
-
-
- /* PCI->GB mappings (I/O 256B) */
- tx4927_pcicptr->p2giopbase = 0; /* 256B */
-
- /* PCI->GB mappings (MEM 512MB) M0 gets all of memory */
- tx4927_pcicptr->p2gm0plbase = 0;
- tx4927_pcicptr->p2gm0pubase = 0;
- tx4927_pcicptr->p2gmgbase[0] = 0 | TX4927_PCIC_P2GMnGBASE_TMEMEN |
-#ifdef __BIG_ENDIAN
- TX4927_PCIC_P2GMnGBASE_TECHG
-#else
- TX4927_PCIC_P2GMnGBASE_TBSDIS
-#endif
- ;
-
- /* PCI->GB mappings (MEM 16MB) -not used */
- tx4927_pcicptr->p2gm1plbase = 0xffffffff;
- tx4927_pcicptr->p2gm1pubase = 0xffffffff;
- tx4927_pcicptr->p2gmgbase[1] = 0;
-
- /* PCI->GB mappings (MEM 1MB) -not used */
- tx4927_pcicptr->p2gm2pbase = 0xffffffff;
- tx4927_pcicptr->p2gmgbase[2] = 0;
-
-
- /* Enable Initiator Memory 0 Space, I/O Space, Config */
- tx4927_pcicptr->pciccfg &= TX4927_PCIC_PCICCFG_LBWC_MASK;
- tx4927_pcicptr->pciccfg |=
- TX4927_PCIC_PCICCFG_IMSE0 | TX4927_PCIC_PCICCFG_IISE |
- TX4927_PCIC_PCICCFG_ICAE | TX4927_PCIC_PCICCFG_ATR;
-
-
- /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
- tx4927_pcicptr->pcicfg1 = 0;
-
- if (tx4927_pcic_trdyto >= 0) {
- tx4927_pcicptr->g2ptocnt &= ~0xff;
- tx4927_pcicptr->g2ptocnt |= (tx4927_pcic_trdyto & 0xff);
- }
-
- /* Clear All Local Bus Status */
- tx4927_pcicptr->pcicstatus = TX4927_PCIC_PCICSTATUS_ALL;
- /* Enable All Local Bus Interrupts */
- tx4927_pcicptr->pcicmask = TX4927_PCIC_PCICSTATUS_ALL;
- /* Clear All Initiator Status */
- tx4927_pcicptr->g2pstatus = TX4927_PCIC_G2PSTATUS_ALL;
- /* Enable All Initiator Interrupts */
- tx4927_pcicptr->g2pmask = TX4927_PCIC_G2PSTATUS_ALL;
- /* Clear All PCI Status Error */
- tx4927_pcicptr->pcistatus =
- (tx4927_pcicptr->pcistatus & 0x0000ffff) |
- (TX4927_PCIC_PCISTATUS_ALL << 16);
- /* Enable All PCI Status Error Interrupts */
- tx4927_pcicptr->pcimask = TX4927_PCIC_PCISTATUS_ALL;
-
- /* PCIC Int => IRC IRQ16 */
- tx4927_pcicptr->pcicfg2 =
- (tx4927_pcicptr->pcicfg2 & 0xffffff00) | TX4927_IR_PCIC;
-
- if (!(tx4927_ccfgptr->ccfg & TX4927_CCFG_PCIXARB)) {
- /* XXX */
- } else {
- /* Reset Bus Arbiter */
- tx4927_pcicptr->pbacfg = TX4927_PCIC_PBACFG_RPBA;
- /* Enable Bus Arbiter */
- tx4927_pcicptr->pbacfg = TX4927_PCIC_PBACFG_PBAEN;
- }
-
- tx4927_pcicptr->pcistatus = PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
- ":pci setup complete:\n");
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, "+\n");
-}
-
-#endif /* CONFIG_PCI */
-
-static void __noreturn wait_forever(void)
-{
- while (1)
- if (cpu_wait)
- (*cpu_wait)();
-}
-
-void toshiba_rbtx4927_restart(char *command)
-{
- printk(KERN_NOTICE "System Rebooting...\n");
-
- /* enable the s/w reset register */
- writeb(RBTX4927_SW_RESET_ENABLE_SET, RBTX4927_SW_RESET_ENABLE);
-
- /* wait for enable to be seen */
- while ((readb(RBTX4927_SW_RESET_ENABLE) &
- RBTX4927_SW_RESET_ENABLE_SET) == 0x00);
-
- /* do a s/w reset */
- writeb(RBTX4927_SW_RESET_DO_SET, RBTX4927_SW_RESET_DO);
-
- /* do something passive while waiting for reset */
- local_irq_disable();
- wait_forever();
- /* no return */
-}
-
-
-void toshiba_rbtx4927_halt(void)
-{
- printk(KERN_NOTICE "System Halted\n");
- local_irq_disable();
- wait_forever();
- /* no return */
-}
-
-void toshiba_rbtx4927_power_off(void)
-{
- toshiba_rbtx4927_halt();
- /* no return */
-}
-
-void __init plat_mem_setup(void)
-{
- int i;
- u32 cp0_config;
- char *argptr;
-
- printk("CPU is %s\n", toshiba_name);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- "-\n");
-
- /* f/w leaves this on at startup */
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":Clearing STO_ERL.\n");
- clear_c0_status(ST0_ERL);
-
- /* enable caches -- HCP5 does this, pmon does not */
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":Enabling TX49_CONF_IC,TX49_CONF_DC.\n");
- cp0_config = read_c0_config();
- cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
- write_c0_config(cp0_config);
-
- set_io_port_base(KSEG1 + TBTX4927_ISA_IO_OFFSET);
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":mips_io_port_base=0x%08lx\n",
- mips_io_port_base);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":Resource\n");
- ioport_resource.end = 0xffffffff;
- iomem_resource.end = 0xffffffff;
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- ":ResetRoutines\n");
- _machine_restart = toshiba_rbtx4927_restart;
- _machine_halt = toshiba_rbtx4927_halt;
- pm_power_off = toshiba_rbtx4927_power_off;
-
- for (i = 0; i < TX4927_NR_TMR; i++)
- txx9_tmr_init(TX4927_TMR_REG(0) & 0xfffffffffULL);
-
-#ifdef CONFIG_PCI
-
- /* PCIC */
- /*
- * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
- *
- * For TX4927:
- * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
- * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
- * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
- * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
- * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
- * i.e. S9[3]: ON (83MHz), OFF (100MHz)
- *
- * For TX4937:
- * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
- * PCIDIVMODE[10] is 0.
- * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
- * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
- * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
- * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
- * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
- * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
- *
- */
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
- "ccfg is %lx, PCIDIVMODE is %x\n",
- (unsigned long) tx4927_ccfgptr->ccfg,
- (unsigned long) tx4927_ccfgptr->ccfg &
- (mips_machtype == MACH_TOSHIBA_RBTX4937 ?
- TX4937_CCFG_PCIDIVMODE_MASK :
- TX4927_CCFG_PCIDIVMODE_MASK));
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
- "PCI66 mode is %lx, PCI mode is %lx, pci arb is %lx\n",
- (unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCI66,
- (unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIMIDE,
- (unsigned long) tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIXARB);
-
- if (mips_machtype == MACH_TOSHIBA_RBTX4937)
- switch ((unsigned long)tx4927_ccfgptr->
- ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
- case TX4937_CCFG_PCIDIVMODE_8:
- case TX4937_CCFG_PCIDIVMODE_4:
- tx4927_cpu_clock = 266666666; /* 266MHz */
- break;
- case TX4937_CCFG_PCIDIVMODE_9:
- case TX4937_CCFG_PCIDIVMODE_4_5:
- tx4927_cpu_clock = 300000000; /* 300MHz */
- break;
- default:
- tx4927_cpu_clock = 333333333; /* 333MHz */
- }
- else
- switch ((unsigned long)tx4927_ccfgptr->
- ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
- case TX4927_CCFG_PCIDIVMODE_2_5:
- case TX4927_CCFG_PCIDIVMODE_5:
- tx4927_cpu_clock = 166666666; /* 166MHz */
- break;
- default:
- tx4927_cpu_clock = 200000000; /* 200MHz */
- }
-
- /* CCFG */
- /* do reset on watchdog */
- tx4927_ccfgptr->ccfg |= TX4927_CCFG_WR;
- /* enable Timeout BusError */
- if (tx4927_ccfg_toeon)
- tx4927_ccfgptr->ccfg |= TX4927_CCFG_TOE;
-
- tx4927_pci_setup();
- if (tx4927_using_backplane == 1)
- printk("backplane board IS installed\n");
- else
- printk("No Backplane \n");
-
- /* this is on ISA bus behind PCI bus, so need PCI up first */
-#ifdef CONFIG_TOSHIBA_FPCIB0
- {
- if (tx4927_using_backplane) {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":fpcibo=yes\n");
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":smsc_fdc37m81x_init()\n");
- smsc_fdc37m81x_init(0x3f0);
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":smsc_fdc37m81x_config_beg()\n");
- smsc_fdc37m81x_config_beg();
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":smsc_fdc37m81x_config_set(KBD)\n");
- smsc_fdc37m81x_config_set(SMSC_FDC37M81X_DNUM,
- SMSC_FDC37M81X_KBD);
- smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT, 1);
- smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT2, 12);
- smsc_fdc37m81x_config_set(SMSC_FDC37M81X_ACTIVE,
- 1);
-
- smsc_fdc37m81x_config_end();
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":smsc_fdc37m81x_config_end()\n");
- } else {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP,
- ":fpcibo=not_found\n");
- }
- }
-#else
- {
- TOSHIBA_RBTX4927_SETUP_DPRINTK
- (TOSHIBA_RBTX4927_SETUP_SETUP, ":fpcibo=no\n");
- }
-#endif
-
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_SERIAL_TXX9
- {
- extern int early_serial_txx9_setup(struct uart_port *port);
- struct uart_port req;
- for(i = 0; i < 2; i++) {
- memset(&req, 0, sizeof(req));
- req.line = i;
- req.iotype = UPIO_MEM;
- req.membase = (char *)(0xff1ff300 + i * 0x100);
- req.mapbase = 0xff1ff300 + i * 0x100;
- req.irq = TX4927_IRQ_PIC_BEG + 8 + i;
- req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
- req.uartclk = 50000000;
- early_serial_txx9_setup(&req);
- }
- }
-#ifdef CONFIG_SERIAL_TXX9_CONSOLE
- argptr = prom_getcmdline();
- if (strstr(argptr, "console=") == NULL) {
- strcat(argptr, " console=ttyS0,38400");
- }
-#endif
-#endif
-
-#ifdef CONFIG_ROOT_NFS
- argptr = prom_getcmdline();
- if (strstr(argptr, "root=") == NULL) {
- strcat(argptr, " root=/dev/nfs rw");
- }
-#endif
-
-
-#ifdef CONFIG_IP_PNP
- argptr = prom_getcmdline();
- if (strstr(argptr, "ip=") == NULL) {
- strcat(argptr, " ip=any");
- }
-#endif
-
-
- TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_SETUP,
- "+\n");
-}
-
-void __init plat_time_init(void)
-{
- mips_hpt_frequency = tx4927_cpu_clock / 2;
- if (tx4927_ccfgptr->ccfg & TX4927_CCFG_TINTDIS)
- txx9_clockevent_init(TX4927_TMR_REG(0) & 0xfffffffffULL,
- TXX9_IRQ_BASE + 17,
- 50000000);
-}
-
-static int __init toshiba_rbtx4927_rtc_init(void)
-{
- static struct resource __initdata res = {
- .start = 0x1c010000,
- .end = 0x1c010000 + 0x800 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *dev =
- platform_device_register_simple("rtc-ds1742", -1, &res, 1);
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-device_initcall(toshiba_rbtx4927_rtc_init);
-
-static int __init rbtx4927_ne_init(void)
-{
- static struct resource __initdata res[] = {
- {
- .start = RBTX4927_RTL_8019_BASE,
- .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
- .flags = IORESOURCE_IO,
- }, {
- .start = RBTX4927_RTL_8019_IRQ,
- .flags = IORESOURCE_IRQ,
- }
- };
- struct platform_device *dev =
- platform_device_register_simple("ne", -1,
- res, ARRAY_SIZE(res));
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-device_initcall(rbtx4927_ne_init);
-
-/* Watchdog support */
-
-static int __init txx9_wdt_init(unsigned long base)
-{
- struct resource res = {
- .start = base,
- .end = base + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *dev =
- platform_device_register_simple("txx9wdt", -1, &res, 1);
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-
-static int __init rbtx4927_wdt_init(void)
-{
- return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
-}
-device_initcall(rbtx4927_wdt_init);
-
-/* Minimum CLK support */
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (!strcmp(id, "imbus_clk"))
- return (struct clk *)50000000;
- return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-int clk_enable(struct clk *clk)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return (unsigned long)clk;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/tx4938/Kconfig b/arch/mips/tx4938/Kconfig
deleted file mode 100644
index d90e9cd..0000000
--- a/arch/mips/tx4938/Kconfig
+++ /dev/null
@@ -1,24 +0,0 @@
-if TOSHIBA_RBTX4938
-
-comment "Multiplex Pin Select"
-choice
- prompt "PIO[58:61]"
- default TOSHIBA_RBTX4938_MPLEX_PIO58_61
-
-config TOSHIBA_RBTX4938_MPLEX_PIO58_61
- bool "PIO"
-config TOSHIBA_RBTX4938_MPLEX_NAND
- bool "NAND"
-config TOSHIBA_RBTX4938_MPLEX_ATA
- bool "ATA"
-
-endchoice
-
-config TX4938_NAND_BOOT
- depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND
- bool "NAND Boot Support (EXPERIMENTAL)"
- help
- This is only for Toshiba RBTX4938 reference board, which has NAND IPL.
- Select this option if you need to use NAND boot.
-
-endif
diff --git a/arch/mips/tx4938/common/Makefile b/arch/mips/tx4938/common/Makefile
deleted file mode 100644
index 56aa1ed..0000000
--- a/arch/mips/tx4938/common/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for common code for Toshiba TX4927 based systems
-#
-
-obj-y += prom.o irq.o
-obj-$(CONFIG_KGDB) += dbgio.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
deleted file mode 100644
index c059b89..0000000
--- a/arch/mips/tx4938/common/irq.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * linux/arch/mips/tx4938/common/irq.c
- *
- * Common tx4938 irq handler
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/irq_cpu.h>
-#include <asm/mipsregs.h>
-#include <asm/tx4938/rbtx4938.h>
-
-void __init
-tx4938_irq_init(void)
-{
- mips_cpu_irq_init();
- txx9_irq_init(TX4938_IRC_REG);
- set_irq_chained_handler(TX4938_IRQ_NEST_PIC_ON_CP0, handle_simple_irq);
-}
-
-int toshiba_rbtx4938_irq_nested(int irq);
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_cause() & read_c0_status();
-
- if (pending & STATUSF_IP7)
- do_IRQ(TX4938_IRQ_CPU_TIMER);
- else if (pending & STATUSF_IP2) {
- int irq = txx9_irq();
- if (irq == TX4938_IRQ_PIC_BEG + TX4938_IR_INT(0))
- irq = toshiba_rbtx4938_irq_nested(irq);
- if (irq >= 0)
- do_IRQ(irq);
- else
- spurious_interrupt();
- } else if (pending & STATUSF_IP1)
- do_IRQ(TX4938_IRQ_USER1);
- else if (pending & STATUSF_IP0)
- do_IRQ(TX4938_IRQ_USER0);
-}
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/Makefile b/arch/mips/tx4938/toshiba_rbtx4938/Makefile
deleted file mode 100644
index 2316dd7..0000000
--- a/arch/mips/tx4938/toshiba_rbtx4938/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Makefile for common code for Toshiba TX4927 based systems
-#
-
-obj-y += prom.o setup.o irq.o spi_eeprom.o
-
-EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
deleted file mode 100644
index 4d6a8dc..0000000
--- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * linux/arch/mips/tx4938/toshiba_rbtx4938/irq.c
- *
- * Toshiba RBTX4938 specific interrupt handlers
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-
-/*
-IRQ Device
-
-16 TX4938-CP0/00 Software 0
-17 TX4938-CP0/01 Software 1
-18 TX4938-CP0/02 Cascade TX4938-CP0
-19 TX4938-CP0/03 Multiplexed -- do not use
-20 TX4938-CP0/04 Multiplexed -- do not use
-21 TX4938-CP0/05 Multiplexed -- do not use
-22 TX4938-CP0/06 Multiplexed -- do not use
-23 TX4938-CP0/07 CPU TIMER
-
-24 TX4938-PIC/00
-25 TX4938-PIC/01
-26 TX4938-PIC/02 Cascade RBTX4938-IOC
-27 TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet
-28 TX4938-PIC/04
-29 TX4938-PIC/05 TX4938 ETH1
-30 TX4938-PIC/06 TX4938 ETH0
-31 TX4938-PIC/07
-32 TX4938-PIC/08 TX4938 SIO 0
-33 TX4938-PIC/09 TX4938 SIO 1
-34 TX4938-PIC/10 TX4938 DMA0
-35 TX4938-PIC/11 TX4938 DMA1
-36 TX4938-PIC/12 TX4938 DMA2
-37 TX4938-PIC/13 TX4938 DMA3
-38 TX4938-PIC/14
-39 TX4938-PIC/15
-40 TX4938-PIC/16 TX4938 PCIC
-41 TX4938-PIC/17 TX4938 TMR0
-42 TX4938-PIC/18 TX4938 TMR1
-43 TX4938-PIC/19 TX4938 TMR2
-44 TX4938-PIC/20
-45 TX4938-PIC/21
-46 TX4938-PIC/22 TX4938 PCIERR
-47 TX4938-PIC/23
-48 TX4938-PIC/24
-49 TX4938-PIC/25
-50 TX4938-PIC/26
-51 TX4938-PIC/27
-52 TX4938-PIC/28
-53 TX4938-PIC/29
-54 TX4938-PIC/30
-55 TX4938-PIC/31 TX4938 SPI
-
-56 RBTX4938-IOC/00 PCI-D
-57 RBTX4938-IOC/01 PCI-C
-58 RBTX4938-IOC/02 PCI-B
-59 RBTX4938-IOC/03 PCI-A
-60 RBTX4938-IOC/04 RTC
-61 RBTX4938-IOC/05 ATA
-62 RBTX4938-IOC/06 MODEM
-63 RBTX4938-IOC/07 SWINT
-*/
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/tx4938/rbtx4938.h>
-
-static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
-static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
-
-#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
-static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
- .name = TOSHIBA_RBTX4938_IOC_NAME,
- .ack = toshiba_rbtx4938_irq_ioc_disable,
- .mask = toshiba_rbtx4938_irq_ioc_disable,
- .mask_ack = toshiba_rbtx4938_irq_ioc_disable,
- .unmask = toshiba_rbtx4938_irq_ioc_enable,
-};
-
-int
-toshiba_rbtx4938_irq_nested(int sw_irq)
-{
- u8 level3;
-
- level3 = readb(rbtx4938_imstat_addr);
- if (level3)
- /* must use fls so onboard ATA has priority */
- sw_irq = TOSHIBA_RBTX4938_IRQ_IOC_BEG + fls(level3) - 1;
-
- return sw_irq;
-}
-
-static struct irqaction toshiba_rbtx4938_irq_ioc_action = {
- .handler = no_action,
- .flags = 0,
- .mask = CPU_MASK_NONE,
- .name = TOSHIBA_RBTX4938_IOC_NAME,
-};
-
-/**********************************************************************************/
-/* Functions for ioc */
-/**********************************************************************************/
-static void __init
-toshiba_rbtx4938_irq_ioc_init(void)
-{
- int i;
-
- for (i = TOSHIBA_RBTX4938_IRQ_IOC_BEG;
- i <= TOSHIBA_RBTX4938_IRQ_IOC_END; i++)
- set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
- handle_level_irq);
-
- setup_irq(RBTX4938_IRQ_IOCINT,
- &toshiba_rbtx4938_irq_ioc_action);
-}
-
-static void
-toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
-{
- unsigned char v;
-
- v = readb(rbtx4938_imask_addr);
- v |= (1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
- writeb(v, rbtx4938_imask_addr);
- mmiowb();
-}
-
-static void
-toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
-{
- unsigned char v;
-
- v = readb(rbtx4938_imask_addr);
- v &= ~(1 << (irq - TOSHIBA_RBTX4938_IRQ_IOC_BEG));
- writeb(v, rbtx4938_imask_addr);
- mmiowb();
-}
-
-void __init arch_init_irq(void)
-{
- extern void tx4938_irq_init(void);
-
- /* Now, interrupt control disabled, */
- /* all IRC interrupts are masked, */
- /* all IRC interrupt mode are Low Active. */
-
- /* mask all IOC interrupts */
- writeb(0, rbtx4938_imask_addr);
-
- /* clear SoftInt interrupts */
- writeb(0, rbtx4938_softint_addr);
- tx4938_irq_init();
- toshiba_rbtx4938_irq_ioc_init();
- /* Onboard 10M Ether: High Active */
- set_irq_type(RBTX4938_IRQ_ETHER, IRQF_TRIGGER_HIGH);
-}
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c
deleted file mode 100644
index 1644bff..0000000
--- a/arch/mips/tx4938/toshiba_rbtx4938/prom.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * linux/arch/mips/tx4938/toshiba_rbtx4938/prom.c
- *
- * rbtx4938 specific prom routines
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/tx4938/tx4938.h>
-
-void __init prom_init_cmdline(void)
-{
- int argc = (int) fw_arg0;
- char **argv = (char **) fw_arg1;
- int i;
-
- /* ignore all built-in args if any f/w args given */
- if (argc > 1) {
- *arcs_cmdline = '\0';
- }
-
- for (i = 1; i < argc; i++) {
- if (i != 1) {
- strcat(arcs_cmdline, " ");
- }
- strcat(arcs_cmdline, argv[i]);
- }
-}
-
-void __init prom_init(void)
-{
- extern int tx4938_get_mem_size(void);
- int msize;
-#ifndef CONFIG_TX4938_NAND_BOOT
- prom_init_cmdline();
-#endif
-
- msize = tx4938_get_mem_size();
- add_memory_region(0, msize << 20, BOOT_MEM_RAM);
-
- return;
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
-
-void __init prom_fixup_mem_map(unsigned long start, unsigned long end)
-{
- return;
-}
-
-const char *get_system_type(void)
-{
- return "Toshiba RBTX4938";
-}
-
-char * __init prom_getcmdline(void)
-{
- return &(arcs_cmdline[0]);
-}
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c
deleted file mode 100644
index 3a3659e..0000000
--- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c
+++ /dev/null
@@ -1,1124 +0,0 @@
-/*
- * linux/arch/mips/tx4938/toshiba_rbtx4938/setup.c
- *
- * Setup pointers to hardware-dependent routines.
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/console.h>
-#include <linux/pci.h>
-#include <linux/pm.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-#include <linux/gpio.h>
-
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/txx9tmr.h>
-#include <asm/io.h>
-#include <asm/bootinfo.h>
-#include <asm/tx4938/rbtx4938.h>
-#ifdef CONFIG_SERIAL_TXX9
-#include <linux/serial_core.h>
-#endif
-#include <linux/spi/spi.h>
-#include <asm/tx4938/spi.h>
-#include <asm/txx9pio.h>
-
-extern char * __init prom_getcmdline(void);
-static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr);
-
-/* These functions are used for rebooting or halting the machine*/
-extern void rbtx4938_machine_restart(char *command);
-extern void rbtx4938_machine_halt(void);
-extern void rbtx4938_machine_power_off(void);
-
-/* clocks */
-unsigned int txx9_master_clock;
-unsigned int txx9_cpu_clock;
-unsigned int txx9_gbus_clock;
-
-unsigned long rbtx4938_ce_base[8];
-unsigned long rbtx4938_ce_size[8];
-int txboard_pci66_mode;
-static int tx4938_pcic_trdyto; /* default: disabled */
-static int tx4938_pcic_retryto; /* default: disabled */
-static int tx4938_ccfg_toeon = 1;
-
-struct tx4938_pcic_reg *pcicptrs[4] = {
- tx4938_pcicptr /* default setting for TX4938 */
-};
-
-static struct {
- unsigned long base;
- unsigned long size;
-} phys_regions[16] __initdata;
-static int num_phys_regions __initdata;
-
-#define PHYS_REGION_MINSIZE 0x10000
-
-void rbtx4938_machine_halt(void)
-{
- printk(KERN_NOTICE "System Halted\n");
- local_irq_disable();
-
- while (1)
- __asm__(".set\tmips3\n\t"
- "wait\n\t"
- ".set\tmips0");
-}
-
-void rbtx4938_machine_power_off(void)
-{
- rbtx4938_machine_halt();
- /* no return */
-}
-
-void rbtx4938_machine_restart(char *command)
-{
- local_irq_disable();
-
- printk("Rebooting...");
- writeb(1, rbtx4938_softresetlock_addr);
- writeb(1, rbtx4938_sfvol_addr);
- writeb(1, rbtx4938_softreset_addr);
- while(1)
- ;
-}
-
-void __init
-txboard_add_phys_region(unsigned long base, unsigned long size)
-{
- if (num_phys_regions >= ARRAY_SIZE(phys_regions)) {
- printk("phys_region overflow\n");
- return;
- }
- phys_regions[num_phys_regions].base = base;
- phys_regions[num_phys_regions].size = size;
- num_phys_regions++;
-}
-unsigned long __init
-txboard_find_free_phys_region(unsigned long begin, unsigned long end,
- unsigned long size)
-{
- unsigned long base;
- int i;
-
- for (base = begin / size * size; base < end; base += size) {
- for (i = 0; i < num_phys_regions; i++) {
- if (phys_regions[i].size &&
- base <= phys_regions[i].base + (phys_regions[i].size - 1) &&
- base + (size - 1) >= phys_regions[i].base)
- break;
- }
- if (i == num_phys_regions)
- return base;
- }
- return 0;
-}
-unsigned long __init
-txboard_find_free_phys_region_shrink(unsigned long begin, unsigned long end,
- unsigned long *size)
-{
- unsigned long sz, base;
- for (sz = *size; sz >= PHYS_REGION_MINSIZE; sz /= 2) {
- base = txboard_find_free_phys_region(begin, end, sz);
- if (base) {
- *size = sz;
- return base;
- }
- }
- return 0;
-}
-unsigned long __init
-txboard_request_phys_region_range(unsigned long begin, unsigned long end,
- unsigned long size)
-{
- unsigned long base;
- base = txboard_find_free_phys_region(begin, end, size);
- if (base)
- txboard_add_phys_region(base, size);
- return base;
-}
-unsigned long __init
-txboard_request_phys_region(unsigned long size)
-{
- unsigned long base;
- unsigned long begin = 0, end = 0x20000000; /* search low 512MB */
- base = txboard_find_free_phys_region(begin, end, size);
- if (base)
- txboard_add_phys_region(base, size);
- return base;
-}
-unsigned long __init
-txboard_request_phys_region_shrink(unsigned long *size)
-{
- unsigned long base;
- unsigned long begin = 0, end = 0x20000000; /* search low 512MB */
- base = txboard_find_free_phys_region_shrink(begin, end, size);
- if (base)
- txboard_add_phys_region(base, *size);
- return base;
-}
-
-#ifdef CONFIG_PCI
-void __init
-tx4938_pcic_setup(struct tx4938_pcic_reg *pcicptr,
- struct pci_controller *channel,
- unsigned long pci_io_base,
- int extarb)
-{
- int i;
-
- /* Disable All Initiator Space */
- pcicptr->pciccfg &= ~(TX4938_PCIC_PCICCFG_G2PMEN(0)|
- TX4938_PCIC_PCICCFG_G2PMEN(1)|
- TX4938_PCIC_PCICCFG_G2PMEN(2)|
- TX4938_PCIC_PCICCFG_G2PIOEN);
-
- /* GB->PCI mappings */
- pcicptr->g2piomask = (channel->io_resource->end - channel->io_resource->start) >> 4;
- pcicptr->g2piogbase = pci_io_base |
-#ifdef __BIG_ENDIAN
- TX4938_PCIC_G2PIOGBASE_ECHG
-#else
- TX4938_PCIC_G2PIOGBASE_BSDIS
-#endif
- ;
- pcicptr->g2piopbase = 0;
- for (i = 0; i < 3; i++) {
- pcicptr->g2pmmask[i] = 0;
- pcicptr->g2pmgbase[i] = 0;
- pcicptr->g2pmpbase[i] = 0;
- }
- if (channel->mem_resource->end) {
- pcicptr->g2pmmask[0] = (channel->mem_resource->end - channel->mem_resource->start) >> 4;
- pcicptr->g2pmgbase[0] = channel->mem_resource->start |
-#ifdef __BIG_ENDIAN
- TX4938_PCIC_G2PMnGBASE_ECHG
-#else
- TX4938_PCIC_G2PMnGBASE_BSDIS
-#endif
- ;
- pcicptr->g2pmpbase[0] = channel->mem_resource->start;
- }
- /* PCI->GB mappings (I/O 256B) */
- pcicptr->p2giopbase = 0; /* 256B */
- pcicptr->p2giogbase = 0;
- /* PCI->GB mappings (MEM 512MB (64MB on R1.x)) */
- pcicptr->p2gm0plbase = 0;
- pcicptr->p2gm0pubase = 0;
- pcicptr->p2gmgbase[0] = 0 |
- TX4938_PCIC_P2GMnGBASE_TMEMEN |
-#ifdef __BIG_ENDIAN
- TX4938_PCIC_P2GMnGBASE_TECHG
-#else
- TX4938_PCIC_P2GMnGBASE_TBSDIS
-#endif
- ;
- /* PCI->GB mappings (MEM 16MB) */
- pcicptr->p2gm1plbase = 0xffffffff;
- pcicptr->p2gm1pubase = 0xffffffff;
- pcicptr->p2gmgbase[1] = 0;
- /* PCI->GB mappings (MEM 1MB) */
- pcicptr->p2gm2pbase = 0xffffffff; /* 1MB */
- pcicptr->p2gmgbase[2] = 0;
-
- pcicptr->pciccfg &= TX4938_PCIC_PCICCFG_GBWC_MASK;
- /* Enable Initiator Memory Space */
- if (channel->mem_resource->end)
- pcicptr->pciccfg |= TX4938_PCIC_PCICCFG_G2PMEN(0);
- /* Enable Initiator I/O Space */
- if (channel->io_resource->end)
- pcicptr->pciccfg |= TX4938_PCIC_PCICCFG_G2PIOEN;
- /* Enable Initiator Config */
- pcicptr->pciccfg |=
- TX4938_PCIC_PCICCFG_ICAEN |
- TX4938_PCIC_PCICCFG_TCAR;
-
- /* Do not use MEMMUL, MEMINF: YMFPCI card causes M_ABORT. */
- pcicptr->pcicfg1 = 0;
-
- pcicptr->g2ptocnt &= ~0xffff;
-
- if (tx4938_pcic_trdyto >= 0) {
- pcicptr->g2ptocnt &= ~0xff;
- pcicptr->g2ptocnt |= (tx4938_pcic_trdyto & 0xff);
- }
-
- if (tx4938_pcic_retryto >= 0) {
- pcicptr->g2ptocnt &= ~0xff00;
- pcicptr->g2ptocnt |= ((tx4938_pcic_retryto<<8) & 0xff00);
- }
-
- /* Clear All Local Bus Status */
- pcicptr->pcicstatus = TX4938_PCIC_PCICSTATUS_ALL;
- /* Enable All Local Bus Interrupts */
- pcicptr->pcicmask = TX4938_PCIC_PCICSTATUS_ALL;
- /* Clear All Initiator Status */
- pcicptr->g2pstatus = TX4938_PCIC_G2PSTATUS_ALL;
- /* Enable All Initiator Interrupts */
- pcicptr->g2pmask = TX4938_PCIC_G2PSTATUS_ALL;
- /* Clear All PCI Status Error */
- pcicptr->pcistatus =
- (pcicptr->pcistatus & 0x0000ffff) |
- (TX4938_PCIC_PCISTATUS_ALL << 16);
- /* Enable All PCI Status Error Interrupts */
- pcicptr->pcimask = TX4938_PCIC_PCISTATUS_ALL;
-
- if (!extarb) {
- /* Reset Bus Arbiter */
- pcicptr->pbacfg = TX4938_PCIC_PBACFG_RPBA;
- pcicptr->pbabm = 0;
- /* Enable Bus Arbiter */
- pcicptr->pbacfg = TX4938_PCIC_PBACFG_PBAEN;
- }
-
- /* PCIC Int => IRC IRQ16 */
- pcicptr->pcicfg2 =
- (pcicptr->pcicfg2 & 0xffffff00) | TX4938_IR_PCIC;
-
- pcicptr->pcistatus = PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
-}
-
-int __init
-tx4938_report_pciclk(void)
-{
- unsigned long pcode = TX4938_REV_PCODE();
- int pciclk = 0;
- printk("TX%lx PCIC --%s PCICLK:",
- pcode,
- (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI66) ? " PCI66" : "");
- if (tx4938_ccfgptr->pcfg & TX4938_PCFG_PCICLKEN_ALL) {
-
- switch ((unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIDIVMODE_MASK) {
- case TX4938_CCFG_PCIDIVMODE_4:
- pciclk = txx9_cpu_clock / 4; break;
- case TX4938_CCFG_PCIDIVMODE_4_5:
- pciclk = txx9_cpu_clock * 2 / 9; break;
- case TX4938_CCFG_PCIDIVMODE_5:
- pciclk = txx9_cpu_clock / 5; break;
- case TX4938_CCFG_PCIDIVMODE_5_5:
- pciclk = txx9_cpu_clock * 2 / 11; break;
- case TX4938_CCFG_PCIDIVMODE_8:
- pciclk = txx9_cpu_clock / 8; break;
- case TX4938_CCFG_PCIDIVMODE_9:
- pciclk = txx9_cpu_clock / 9; break;
- case TX4938_CCFG_PCIDIVMODE_10:
- pciclk = txx9_cpu_clock / 10; break;
- case TX4938_CCFG_PCIDIVMODE_11:
- pciclk = txx9_cpu_clock / 11; break;
- }
- printk("Internal(%dMHz)", pciclk / 1000000);
- } else {
- printk("External");
- pciclk = -1;
- }
- printk("\n");
- return pciclk;
-}
-
-void __init set_tx4938_pcicptr(int ch, struct tx4938_pcic_reg *pcicptr)
-{
- pcicptrs[ch] = pcicptr;
-}
-
-struct tx4938_pcic_reg *get_tx4938_pcicptr(int ch)
-{
- return pcicptrs[ch];
-}
-
-static struct pci_dev *fake_pci_dev(struct pci_controller *hose,
- int top_bus, int busnr, int devfn)
-{
- static struct pci_dev dev;
- static struct pci_bus bus;
-
- dev.sysdata = bus.sysdata = hose;
- dev.devfn = devfn;
- bus.number = busnr;
- bus.ops = hose->pci_ops;
- bus.parent = NULL;
- dev.bus = &bus;
-
- return &dev;
-}
-
-#define EARLY_PCI_OP(rw, size, type) \
-static int early_##rw##_config_##size(struct pci_controller *hose, \
- int top_bus, int bus, int devfn, int offset, type value) \
-{ \
- return pci_##rw##_config_##size( \
- fake_pci_dev(hose, top_bus, bus, devfn), \
- offset, value); \
-}
-
-EARLY_PCI_OP(read, word, u16 *)
-
-int txboard_pci66_check(struct pci_controller *hose, int top_bus, int current_bus)
-{
- u32 pci_devfn;
- unsigned short vid;
- int devfn_start = 0;
- int devfn_stop = 0xff;
- int cap66 = -1;
- u16 stat;
-
- printk("PCI: Checking 66MHz capabilities...\n");
-
- for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) {
- if (early_read_config_word(hose, top_bus, current_bus,
- pci_devfn, PCI_VENDOR_ID,
- &vid) != PCIBIOS_SUCCESSFUL)
- continue;
-
- if (vid == 0xffff) continue;
-
- /* check 66MHz capability */
- if (cap66 < 0)
- cap66 = 1;
- if (cap66) {
- early_read_config_word(hose, top_bus, current_bus, pci_devfn,
- PCI_STATUS, &stat);
- if (!(stat & PCI_STATUS_66MHZ)) {
- printk(KERN_DEBUG "PCI: %02x:%02x not 66MHz capable.\n",
- current_bus, pci_devfn);
- cap66 = 0;
- break;
- }
- }
- }
- return cap66 > 0;
-}
-
-int __init
-tx4938_pciclk66_setup(void)
-{
- int pciclk;
-
- /* Assert M66EN */
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_PCI66;
- /* Double PCICLK (if possible) */
- if (tx4938_ccfgptr->pcfg & TX4938_PCFG_PCICLKEN_ALL) {
- unsigned int pcidivmode =
- tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIDIVMODE_MASK;
- switch (pcidivmode) {
- case TX4938_CCFG_PCIDIVMODE_8:
- case TX4938_CCFG_PCIDIVMODE_4:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
- pciclk = txx9_cpu_clock / 4;
- break;
- case TX4938_CCFG_PCIDIVMODE_9:
- case TX4938_CCFG_PCIDIVMODE_4_5:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
- pciclk = txx9_cpu_clock * 2 / 9;
- break;
- case TX4938_CCFG_PCIDIVMODE_10:
- case TX4938_CCFG_PCIDIVMODE_5:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
- pciclk = txx9_cpu_clock / 5;
- break;
- case TX4938_CCFG_PCIDIVMODE_11:
- case TX4938_CCFG_PCIDIVMODE_5_5:
- default:
- pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
- pciclk = txx9_cpu_clock * 2 / 11;
- break;
- }
- tx4938_ccfgptr->ccfg =
- (tx4938_ccfgptr->ccfg & ~TX4938_CCFG_PCIDIVMODE_MASK)
- | pcidivmode;
- printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
- (unsigned long)tx4938_ccfgptr->ccfg);
- } else {
- pciclk = -1;
- }
- return pciclk;
-}
-
-extern struct pci_controller tx4938_pci_controller[];
-static int __init tx4938_pcibios_init(void)
-{
- unsigned long mem_base[2];
- unsigned long mem_size[2] = {TX4938_PCIMEM_SIZE_0, TX4938_PCIMEM_SIZE_1}; /* MAX 128M,64K */
- unsigned long io_base[2];
- unsigned long io_size[2] = {TX4938_PCIIO_SIZE_0, TX4938_PCIIO_SIZE_1}; /* MAX 16M,64K */
- /* TX4938 PCIC1: 64K MEM/IO is enough for ETH0,ETH1 */
- int extarb = !(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB);
-
- PCIBIOS_MIN_IO = 0x00001000UL;
-
- mem_base[0] = txboard_request_phys_region_shrink(&mem_size[0]);
- io_base[0] = txboard_request_phys_region_shrink(&io_size[0]);
-
- printk("TX4938 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
- (unsigned short)(tx4938_pcicptr->pciid >> 16),
- (unsigned short)(tx4938_pcicptr->pciid & 0xffff),
- (unsigned short)(tx4938_pcicptr->pciccrev & 0xff),
- extarb ? "External" : "Internal");
-
- /* setup PCI area */
- tx4938_pci_controller[0].io_resource->start = io_base[0];
- tx4938_pci_controller[0].io_resource->end = (io_base[0] + io_size[0]) - 1;
- tx4938_pci_controller[0].mem_resource->start = mem_base[0];
- tx4938_pci_controller[0].mem_resource->end = mem_base[0] + mem_size[0] - 1;
-
- set_tx4938_pcicptr(0, tx4938_pcicptr);
-
- register_pci_controller(&tx4938_pci_controller[0]);
-
- if (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI66) {
- printk("TX4938_CCFG_PCI66 already configured\n");
- txboard_pci66_mode = -1; /* already configured */
- }
-
- /* Reset PCI Bus */
- writeb(0, rbtx4938_pcireset_addr);
- /* Reset PCIC */
- tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIRST;
- if (txboard_pci66_mode > 0)
- tx4938_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIRST;
- writeb(1, rbtx4938_pcireset_addr);
- mmiowb();
- tx4938_report_pcic_status1(tx4938_pcicptr);
-
- tx4938_report_pciclk();
- tx4938_pcic_setup(tx4938_pcicptr, &tx4938_pci_controller[0], io_base[0], extarb);
- if (txboard_pci66_mode == 0 &&
- txboard_pci66_check(&tx4938_pci_controller[0], 0, 0)) {
- /* Reset PCI Bus */
- writeb(0, rbtx4938_pcireset_addr);
- /* Reset PCIC */
- tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIRST;
- tx4938_pciclk66_setup();
- mdelay(10);
- /* clear PCIC reset */
- tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIRST;
- writeb(1, rbtx4938_pcireset_addr);
- mmiowb();
- /* Reinitialize PCIC */
- tx4938_report_pciclk();
- tx4938_pcic_setup(tx4938_pcicptr, &tx4938_pci_controller[0], io_base[0], extarb);
- }
-
- mem_base[1] = txboard_request_phys_region_shrink(&mem_size[1]);
- io_base[1] = txboard_request_phys_region_shrink(&io_size[1]);
- /* Reset PCIC1 */
- tx4938_ccfgptr->clkctr |= TX4938_CLKCTR_PCIC1RST;
- /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */
- if (!(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1DMD))
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_PCI1_66;
- else
- tx4938_ccfgptr->ccfg &= ~TX4938_CCFG_PCI1_66;
- mdelay(10);
- /* clear PCIC1 reset */
- tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
- tx4938_report_pcic_status1(tx4938_pcic1ptr);
-
- printk("TX4938 PCIC1 -- DID:%04x VID:%04x RID:%02x",
- (unsigned short)(tx4938_pcic1ptr->pciid >> 16),
- (unsigned short)(tx4938_pcic1ptr->pciid & 0xffff),
- (unsigned short)(tx4938_pcic1ptr->pciccrev & 0xff));
- printk("%s PCICLK:%dMHz\n",
- (tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1_66) ? " PCI66" : "",
- txx9_gbus_clock /
- ((tx4938_ccfgptr->ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2) /
- 1000000);
-
- /* assumption: CPHYSADDR(mips_io_port_base) == io_base[0] */
- tx4938_pci_controller[1].io_resource->start =
- io_base[1] - io_base[0];
- tx4938_pci_controller[1].io_resource->end =
- io_base[1] - io_base[0] + io_size[1] - 1;
- tx4938_pci_controller[1].mem_resource->start = mem_base[1];
- tx4938_pci_controller[1].mem_resource->end =
- mem_base[1] + mem_size[1] - 1;
- set_tx4938_pcicptr(1, tx4938_pcic1ptr);
-
- register_pci_controller(&tx4938_pci_controller[1]);
-
- tx4938_pcic_setup(tx4938_pcic1ptr, &tx4938_pci_controller[1], io_base[1], extarb);
-
- /* map ioport 0 to PCI I/O space address 0 */
- set_io_port_base(KSEG1 + io_base[0]);
-
- return 0;
-}
-
-arch_initcall(tx4938_pcibios_init);
-
-#endif /* CONFIG_PCI */
-
-/* SPI support */
-
-/* chip select for SPI devices */
-#define SEEPROM1_CS 7 /* PIO7 */
-#define SEEPROM2_CS 0 /* IOC */
-#define SEEPROM3_CS 1 /* IOC */
-#define SRTC_CS 2 /* IOC */
-
-#ifdef CONFIG_PCI
-static int __init rbtx4938_ethaddr_init(void)
-{
- unsigned char dat[17];
- unsigned char sum;
- int i;
-
- /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
- if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) {
- printk(KERN_ERR "seeprom: read error.\n");
- return -ENODEV;
- } else {
- if (strcmp(dat, "MAC") != 0)
- printk(KERN_WARNING "seeprom: bad signature.\n");
- for (i = 0, sum = 0; i < sizeof(dat); i++)
- sum += dat[i];
- if (sum)
- printk(KERN_WARNING "seeprom: bad checksum.\n");
- }
- for (i = 0; i < 2; i++) {
- unsigned int id =
- TXX9_IRQ_BASE + (i ? TX4938_IR_ETH1 : TX4938_IR_ETH0);
- struct platform_device *pdev;
- if (!(tx4938_ccfgptr->pcfg &
- (i ? TX4938_PCFG_ETH1_SEL : TX4938_PCFG_ETH0_SEL)))
- continue;
- pdev = platform_device_alloc("tc35815-mac", id);
- if (!pdev ||
- platform_device_add_data(pdev, &dat[4 + 6 * i], 6) ||
- platform_device_add(pdev))
- platform_device_put(pdev);
- }
- return 0;
-}
-device_initcall(rbtx4938_ethaddr_init);
-#endif /* CONFIG_PCI */
-
-static void __init rbtx4938_spi_setup(void)
-{
- /* set SPI_SEL */
- tx4938_ccfgptr->pcfg |= TX4938_PCFG_SPI_SEL;
-}
-
-static struct resource rbtx4938_fpga_resource;
-
-static char pcode_str[8];
-static struct resource tx4938_reg_resource = {
- .start = TX4938_REG_BASE,
- .end = TX4938_REG_BASE + TX4938_REG_SIZE,
- .name = pcode_str,
- .flags = IORESOURCE_MEM
-};
-
-void __init tx4938_board_setup(void)
-{
- int i;
- unsigned long divmode;
- int cpuclk = 0;
- unsigned long pcode = TX4938_REV_PCODE();
-
- ioport_resource.start = 0x1000;
- ioport_resource.end = 0xffffffff;
- iomem_resource.start = 0x1000;
- iomem_resource.end = 0xffffffff; /* expand to 4GB */
-
- sprintf(pcode_str, "TX%lx", pcode);
- /* SDRAMC,EBUSC are configured by PROM */
- for (i = 0; i < 8; i++) {
- if (!(tx4938_ebuscptr->cr[i] & 0x8))
- continue; /* disabled */
- rbtx4938_ce_base[i] = (unsigned long)TX4938_EBUSC_BA(i);
- txboard_add_phys_region(rbtx4938_ce_base[i], TX4938_EBUSC_SIZE(i));
- }
-
- /* clocks */
- if (txx9_master_clock) {
- /* calculate gbus_clock and cpu_clock_freq from master_clock */
- divmode = (unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_DIVMODE_MASK;
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_8:
- case TX4938_CCFG_DIVMODE_10:
- case TX4938_CCFG_DIVMODE_12:
- case TX4938_CCFG_DIVMODE_16:
- case TX4938_CCFG_DIVMODE_18:
- txx9_gbus_clock = txx9_master_clock * 4; break;
- default:
- txx9_gbus_clock = txx9_master_clock;
- }
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_2:
- case TX4938_CCFG_DIVMODE_8:
- cpuclk = txx9_gbus_clock * 2; break;
- case TX4938_CCFG_DIVMODE_2_5:
- case TX4938_CCFG_DIVMODE_10:
- cpuclk = txx9_gbus_clock * 5 / 2; break;
- case TX4938_CCFG_DIVMODE_3:
- case TX4938_CCFG_DIVMODE_12:
- cpuclk = txx9_gbus_clock * 3; break;
- case TX4938_CCFG_DIVMODE_4:
- case TX4938_CCFG_DIVMODE_16:
- cpuclk = txx9_gbus_clock * 4; break;
- case TX4938_CCFG_DIVMODE_4_5:
- case TX4938_CCFG_DIVMODE_18:
- cpuclk = txx9_gbus_clock * 9 / 2; break;
- }
- txx9_cpu_clock = cpuclk;
- } else {
- if (txx9_cpu_clock == 0) {
- txx9_cpu_clock = 300000000; /* 300MHz */
- }
- /* calculate gbus_clock and master_clock from cpu_clock_freq */
- cpuclk = txx9_cpu_clock;
- divmode = (unsigned long)tx4938_ccfgptr->ccfg & TX4938_CCFG_DIVMODE_MASK;
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_2:
- case TX4938_CCFG_DIVMODE_8:
- txx9_gbus_clock = cpuclk / 2; break;
- case TX4938_CCFG_DIVMODE_2_5:
- case TX4938_CCFG_DIVMODE_10:
- txx9_gbus_clock = cpuclk * 2 / 5; break;
- case TX4938_CCFG_DIVMODE_3:
- case TX4938_CCFG_DIVMODE_12:
- txx9_gbus_clock = cpuclk / 3; break;
- case TX4938_CCFG_DIVMODE_4:
- case TX4938_CCFG_DIVMODE_16:
- txx9_gbus_clock = cpuclk / 4; break;
- case TX4938_CCFG_DIVMODE_4_5:
- case TX4938_CCFG_DIVMODE_18:
- txx9_gbus_clock = cpuclk * 2 / 9; break;
- }
- switch (divmode) {
- case TX4938_CCFG_DIVMODE_8:
- case TX4938_CCFG_DIVMODE_10:
- case TX4938_CCFG_DIVMODE_12:
- case TX4938_CCFG_DIVMODE_16:
- case TX4938_CCFG_DIVMODE_18:
- txx9_master_clock = txx9_gbus_clock / 4; break;
- default:
- txx9_master_clock = txx9_gbus_clock;
- }
- }
- /* change default value to udelay/mdelay take reasonable time */
- loops_per_jiffy = txx9_cpu_clock / HZ / 2;
-
- /* CCFG */
- /* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_WDRST | TX4938_CCFG_BEOW;
- /* do reset on watchdog */
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_WR;
- /* clear PCIC1 reset */
- if (tx4938_ccfgptr->clkctr & TX4938_CLKCTR_PCIC1RST)
- tx4938_ccfgptr->clkctr &= ~TX4938_CLKCTR_PCIC1RST;
-
- /* enable Timeout BusError */
- if (tx4938_ccfg_toeon)
- tx4938_ccfgptr->ccfg |= TX4938_CCFG_TOE;
-
- /* DMA selection */
- tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_DMASEL_ALL;
-
- /* Use external clock for external arbiter */
- if (!(tx4938_ccfgptr->ccfg & TX4938_CCFG_PCIXARB))
- tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_PCICLKEN_ALL;
-
- printk("%s -- %dMHz(M%dMHz) CRIR:%08lx CCFG:%Lx PCFG:%Lx\n",
- pcode_str,
- cpuclk / 1000000, txx9_master_clock / 1000000,
- (unsigned long)tx4938_ccfgptr->crir,
- tx4938_ccfgptr->ccfg,
- tx4938_ccfgptr->pcfg);
-
- printk("%s SDRAMC --", pcode_str);
- for (i = 0; i < 4; i++) {
- unsigned long long cr = tx4938_sdramcptr->cr[i];
- unsigned long ram_base, ram_size;
- if (!((unsigned long)cr & 0x00000400))
- continue; /* disabled */
- ram_base = (unsigned long)(cr >> 49) << 21;
- ram_size = ((unsigned long)(cr >> 33) + 1) << 21;
- if (ram_base >= 0x20000000)
- continue; /* high memory (ignore) */
- printk(" CR%d:%016Lx", i, cr);
- txboard_add_phys_region(ram_base, ram_size);
- }
- printk(" TR:%09Lx\n", tx4938_sdramcptr->tr);
-
- /* SRAM */
- if (pcode == 0x4938 && tx4938_sramcptr->cr & 1) {
- unsigned int size = 0x800;
- unsigned long base =
- (tx4938_sramcptr->cr >> (39-11)) & ~(size - 1);
- txboard_add_phys_region(base, size);
- }
-
- /* TMR */
- for (i = 0; i < TX4938_NR_TMR; i++)
- txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL);
-
- /* enable DMA */
- for (i = 0; i < 2; i++)
- ____raw_writeq(TX4938_DMA_MCR_MSTEN,
- (void __iomem *)(TX4938_DMA_REG(i) + 0x50));
-
- /* PIO */
- __raw_writel(0, &tx4938_pioptr->maskcpu);
- __raw_writel(0, &tx4938_pioptr->maskext);
-
- /* TX4938 internal registers */
- if (request_resource(&iomem_resource, &tx4938_reg_resource))
- printk("request resource for internal registers failed\n");
-}
-
-#ifdef CONFIG_PCI
-static inline void tx4938_report_pcic_status1(struct tx4938_pcic_reg *pcicptr)
-{
- unsigned short pcistatus = (unsigned short)(pcicptr->pcistatus >> 16);
- unsigned long g2pstatus = pcicptr->g2pstatus;
- unsigned long pcicstatus = pcicptr->pcicstatus;
- static struct {
- unsigned long flag;
- const char *str;
- } pcistat_tbl[] = {
- { PCI_STATUS_DETECTED_PARITY, "DetectedParityError" },
- { PCI_STATUS_SIG_SYSTEM_ERROR, "SignaledSystemError" },
- { PCI_STATUS_REC_MASTER_ABORT, "ReceivedMasterAbort" },
- { PCI_STATUS_REC_TARGET_ABORT, "ReceivedTargetAbort" },
- { PCI_STATUS_SIG_TARGET_ABORT, "SignaledTargetAbort" },
- { PCI_STATUS_PARITY, "MasterParityError" },
- }, g2pstat_tbl[] = {
- { TX4938_PCIC_G2PSTATUS_TTOE, "TIOE" },
- { TX4938_PCIC_G2PSTATUS_RTOE, "RTOE" },
- }, pcicstat_tbl[] = {
- { TX4938_PCIC_PCICSTATUS_PME, "PME" },
- { TX4938_PCIC_PCICSTATUS_TLB, "TLB" },
- { TX4938_PCIC_PCICSTATUS_NIB, "NIB" },
- { TX4938_PCIC_PCICSTATUS_ZIB, "ZIB" },
- { TX4938_PCIC_PCICSTATUS_PERR, "PERR" },
- { TX4938_PCIC_PCICSTATUS_SERR, "SERR" },
- { TX4938_PCIC_PCICSTATUS_GBE, "GBE" },
- { TX4938_PCIC_PCICSTATUS_IWB, "IWB" },
- };
- int i;
-
- printk("pcistat:%04x(", pcistatus);
- for (i = 0; i < ARRAY_SIZE(pcistat_tbl); i++)
- if (pcistatus & pcistat_tbl[i].flag)
- printk("%s ", pcistat_tbl[i].str);
- printk("), g2pstatus:%08lx(", g2pstatus);
- for (i = 0; i < ARRAY_SIZE(g2pstat_tbl); i++)
- if (g2pstatus & g2pstat_tbl[i].flag)
- printk("%s ", g2pstat_tbl[i].str);
- printk("), pcicstatus:%08lx(", pcicstatus);
- for (i = 0; i < ARRAY_SIZE(pcicstat_tbl); i++)
- if (pcicstatus & pcicstat_tbl[i].flag)
- printk("%s ", pcicstat_tbl[i].str);
- printk(")\n");
-}
-
-void tx4938_report_pcic_status(void)
-{
- int i;
- struct tx4938_pcic_reg *pcicptr;
- for (i = 0; (pcicptr = get_tx4938_pcicptr(i)) != NULL; i++)
- tx4938_report_pcic_status1(pcicptr);
-}
-
-#endif /* CONFIG_PCI */
-
-void __init plat_time_init(void)
-{
- mips_hpt_frequency = txx9_cpu_clock / 2;
- if (tx4938_ccfgptr->ccfg & TX4938_CCFG_TINTDIS)
- txx9_clockevent_init(TX4938_TMR_REG(0) & 0xfffffffffULL,
- TXX9_IRQ_BASE + TX4938_IR_TMR(0),
- txx9_gbus_clock / 2);
-}
-
-void __init plat_mem_setup(void)
-{
- unsigned long long pcfg;
- char *argptr;
-
- iomem_resource.end = 0xffffffff; /* 4GB */
-
- if (txx9_master_clock == 0)
- txx9_master_clock = 25000000; /* 25MHz */
- tx4938_board_setup();
-#ifndef CONFIG_PCI
- set_io_port_base(RBTX4938_ETHER_BASE);
-#endif
-
-#ifdef CONFIG_SERIAL_TXX9
- {
- extern int early_serial_txx9_setup(struct uart_port *port);
- int i;
- struct uart_port req;
- for(i = 0; i < 2; i++) {
- memset(&req, 0, sizeof(req));
- req.line = i;
- req.iotype = UPIO_MEM;
- req.membase = (char *)(0xff1ff300 + i * 0x100);
- req.mapbase = 0xff1ff300 + i * 0x100;
- req.irq = RBTX4938_IRQ_IRC_SIO(i);
- req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
- req.uartclk = 50000000;
- early_serial_txx9_setup(&req);
- }
- }
-#ifdef CONFIG_SERIAL_TXX9_CONSOLE
- argptr = prom_getcmdline();
- if (strstr(argptr, "console=") == NULL) {
- strcat(argptr, " console=ttyS0,38400");
- }
-#endif
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
- printk("PIOSEL: disabling both ata and nand selection\n");
- local_irq_disable();
- tx4938_ccfgptr->pcfg &= ~(TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
- printk("PIOSEL: enabling nand selection\n");
- tx4938_ccfgptr->pcfg |= TX4938_PCFG_NDF_SEL;
- tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_ATA_SEL;
-#endif
-
-#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
- printk("PIOSEL: enabling ata selection\n");
- tx4938_ccfgptr->pcfg |= TX4938_PCFG_ATA_SEL;
- tx4938_ccfgptr->pcfg &= ~TX4938_PCFG_NDF_SEL;
-#endif
-
-#ifdef CONFIG_IP_PNP
- argptr = prom_getcmdline();
- if (strstr(argptr, "ip=") == NULL) {
- strcat(argptr, " ip=any");
- }
-#endif
-
-
-#ifdef CONFIG_FB
- {
- conswitchp = &dummy_con;
- }
-#endif
-
- rbtx4938_spi_setup();
- pcfg = tx4938_ccfgptr->pcfg; /* updated */
- /* fixup piosel */
- if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
- TX4938_PCFG_ATA_SEL)
- writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x04,
- rbtx4938_piosel_addr);
- else if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
- TX4938_PCFG_NDF_SEL)
- writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x08,
- rbtx4938_piosel_addr);
- else
- writeb(readb(rbtx4938_piosel_addr) & ~(0x08 | 0x04),
- rbtx4938_piosel_addr);
-
- rbtx4938_fpga_resource.name = "FPGA Registers";
- rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR);
- rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
- rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
- if (request_resource(&iomem_resource, &rbtx4938_fpga_resource))
- printk("request resource for fpga failed\n");
-
- _machine_restart = rbtx4938_machine_restart;
- _machine_halt = rbtx4938_machine_halt;
- pm_power_off = rbtx4938_machine_power_off;
-
- writeb(0xff, rbtx4938_led_addr);
- printk(KERN_INFO "RBTX4938 --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
- readb(rbtx4938_fpga_rev_addr),
- readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
-}
-
-static int __init rbtx4938_ne_init(void)
-{
- struct resource res[] = {
- {
- .start = RBTX4938_RTL_8019_BASE,
- .end = RBTX4938_RTL_8019_BASE + 0x20 - 1,
- .flags = IORESOURCE_IO,
- }, {
- .start = RBTX4938_RTL_8019_IRQ,
- .flags = IORESOURCE_IRQ,
- }
- };
- struct platform_device *dev =
- platform_device_register_simple("ne", -1,
- res, ARRAY_SIZE(res));
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-device_initcall(rbtx4938_ne_init);
-
-/* GPIO support */
-
-int gpio_to_irq(unsigned gpio)
-{
- return -EINVAL;
-}
-
-int irq_to_gpio(unsigned irq)
-{
- return -EINVAL;
-}
-
-static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
-
-static void rbtx4938_spi_gpio_set(struct gpio_chip *chip, unsigned int offset,
- int value)
-{
- u8 val;
- unsigned long flags;
- spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags);
- val = readb(rbtx4938_spics_addr);
- if (value)
- val |= 1 << offset;
- else
- val &= ~(1 << offset);
- writeb(val, rbtx4938_spics_addr);
- mmiowb();
- spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags);
-}
-
-static int rbtx4938_spi_gpio_dir_out(struct gpio_chip *chip,
- unsigned int offset, int value)
-{
- rbtx4938_spi_gpio_set(chip, offset, value);
- return 0;
-}
-
-static struct gpio_chip rbtx4938_spi_gpio_chip = {
- .set = rbtx4938_spi_gpio_set,
- .direction_output = rbtx4938_spi_gpio_dir_out,
- .label = "RBTX4938-SPICS",
- .base = 16,
- .ngpio = 3,
-};
-
-/* SPI support */
-
-static void __init txx9_spi_init(unsigned long base, int irq)
-{
- struct resource res[] = {
- {
- .start = base,
- .end = base + 0x20 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = irq,
- .flags = IORESOURCE_IRQ,
- },
- };
- platform_device_register_simple("spi_txx9", 0,
- res, ARRAY_SIZE(res));
-}
-
-static int __init rbtx4938_spi_init(void)
-{
- struct spi_board_info srtc_info = {
- .modalias = "rtc-rs5c348",
- .max_speed_hz = 1000000, /* 1.0Mbps @ Vdd 2.0V */
- .bus_num = 0,
- .chip_select = 16 + SRTC_CS,
- /* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS */
- .mode = SPI_MODE_1 | SPI_CS_HIGH,
- };
- spi_register_board_info(&srtc_info, 1);
- spi_eeprom_register(SEEPROM1_CS);
- spi_eeprom_register(16 + SEEPROM2_CS);
- spi_eeprom_register(16 + SEEPROM3_CS);
- gpio_request(16 + SRTC_CS, "rtc-rs5c348");
- gpio_direction_output(16 + SRTC_CS, 0);
- gpio_request(SEEPROM1_CS, "seeprom1");
- gpio_direction_output(SEEPROM1_CS, 1);
- gpio_request(16 + SEEPROM2_CS, "seeprom2");
- gpio_direction_output(16 + SEEPROM2_CS, 1);
- gpio_request(16 + SEEPROM3_CS, "seeprom3");
- gpio_direction_output(16 + SEEPROM3_CS, 1);
- txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI);
- return 0;
-}
-
-static int __init rbtx4938_arch_init(void)
-{
- txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16);
- gpiochip_add(&rbtx4938_spi_gpio_chip);
- return rbtx4938_spi_init();
-}
-arch_initcall(rbtx4938_arch_init);
-
-/* Watchdog support */
-
-static int __init txx9_wdt_init(unsigned long base)
-{
- struct resource res = {
- .start = base,
- .end = base + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- };
- struct platform_device *dev =
- platform_device_register_simple("txx9wdt", -1, &res, 1);
- return IS_ERR(dev) ? PTR_ERR(dev) : 0;
-}
-
-static int __init rbtx4938_wdt_init(void)
-{
- return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
-}
-device_initcall(rbtx4938_wdt_init);
-
-/* Minimum CLK support */
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (!strcmp(id, "spi-baseclk"))
- return (struct clk *)(txx9_gbus_clock / 2 / 4);
- if (!strcmp(id, "imbus_clk"))
- return (struct clk *)(txx9_gbus_clock / 2);
- return ERR_PTR(-ENOENT);
-}
-EXPORT_SYMBOL(clk_get);
-
-int clk_enable(struct clk *clk)
-{
- return 0;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- return (unsigned long)clk;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-void clk_put(struct clk *clk)
-{
-}
-EXPORT_SYMBOL(clk_put);
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c b/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
deleted file mode 100644
index 4d6b4ad..0000000
--- a/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * linux/arch/mips/tx4938/toshiba_rbtx4938/spi_eeprom.c
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/eeprom.h>
-#include <asm/tx4938/spi.h>
-
-#define AT250X0_PAGE_SIZE 8
-
-/* register board information for at25 driver */
-int __init spi_eeprom_register(int chipid)
-{
- static struct spi_eeprom eeprom = {
- .name = "at250x0",
- .byte_len = 128,
- .page_size = AT250X0_PAGE_SIZE,
- .flags = EE_ADDR1,
- };
- struct spi_board_info info = {
- .modalias = "at25",
- .max_speed_hz = 1500000, /* 1.5Mbps */
- .bus_num = 0,
- .chip_select = chipid,
- .platform_data = &eeprom,
- /* Mode 0: High-Active, Sample-Then-Shift */
- };
-
- return spi_register_board_info(&info, 1);
-}
-
-/* simple temporary spi driver to provide early access to seeprom. */
-
-static struct read_param {
- int chipid;
- int address;
- unsigned char *buf;
- int len;
-} *read_param;
-
-static int __init early_seeprom_probe(struct spi_device *spi)
-{
- int stat = 0;
- u8 cmd[2];
- int len = read_param->len;
- char *buf = read_param->buf;
- int address = read_param->address;
-
- dev_info(&spi->dev, "spiclk %u KHz.\n",
- (spi->max_speed_hz + 500) / 1000);
- if (read_param->chipid != spi->chip_select)
- return -ENODEV;
- while (len > 0) {
- /* spi_write_then_read can only work with small chunk */
- int c = len < AT250X0_PAGE_SIZE ? len : AT250X0_PAGE_SIZE;
- cmd[0] = 0x03; /* AT25_READ */
- cmd[1] = address;
- stat = spi_write_then_read(spi, cmd, sizeof(cmd), buf, c);
- buf += c;
- len -= c;
- address += c;
- }
- return stat;
-}
-
-static struct spi_driver early_seeprom_driver __initdata = {
- .driver = {
- .name = "at25",
- .owner = THIS_MODULE,
- },
- .probe = early_seeprom_probe,
-};
-
-int __init spi_eeprom_read(int chipid, int address,
- unsigned char *buf, int len)
-{
- int ret;
- struct read_param param = {
- .chipid = chipid,
- .address = address,
- .buf = buf,
- .len = len
- };
-
- read_param = ¶m;
- ret = spi_register_driver(&early_seeprom_driver);
- if (!ret)
- spi_unregister_driver(&early_seeprom_driver);
- return ret;
-}
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig
new file mode 100644
index 0000000..b92a134
--- /dev/null
+++ b/arch/mips/txx9/Kconfig
@@ -0,0 +1,115 @@
+config TOSHIBA_JMR3927
+ bool "Toshiba JMR-TX3927 board"
+ depends on MACH_TX39XX
+ select SOC_TX3927
+
+config TOSHIBA_RBTX4927
+ bool "Toshiba RBTX49[23]7 board"
+ depends on MACH_TX49XX
+ select SOC_TX4927
+ help
+ This Toshiba board is based on the TX4927 processor. Say Y here to
+ support this machine type
+
+config TOSHIBA_RBTX4938
+ bool "Toshiba RBTX4938 board"
+ depends on MACH_TX49XX
+ select SOC_TX4938
+ help
+ This Toshiba board is based on the TX4938 processor. Say Y here to
+ support this machine type
+
+config SOC_TX3927
+ bool
+ select CEVT_TXX9
+ select DMA_NONCOHERENT
+ select HAS_TXX9_SERIAL
+ select HW_HAS_PCI
+ select IRQ_TXX9
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_TX39XX
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+ select GPIO_TXX9
+
+config SOC_TX4927
+ bool
+ select CEVT_R4K
+ select CSRC_R4K
+ select CEVT_TXX9
+ select DMA_NONCOHERENT
+ select HAS_TXX9_SERIAL
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select IRQ_TXX9
+ select PCI_TX4927
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_TX49XX
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_KGDB
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+ select GPIO_TXX9
+
+config SOC_TX4938
+ bool
+ select CEVT_R4K
+ select CSRC_R4K
+ select CEVT_TXX9
+ select DMA_NONCOHERENT
+ select HAS_TXX9_SERIAL
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select IRQ_TXX9
+ select PCI_TX4927
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_TX49XX
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_KGDB
+ select GENERIC_HARDIRQS_NO__DO_IRQ
+ select GPIO_TXX9
+
+config TOSHIBA_FPCIB0
+ bool "FPCIB0 Backplane Support"
+ depends on PCI && (MACH_TX39XX || MACH_TX49XX)
+ select I8259
+
+config PICMG_PCI_BACKPLANE_DEFAULT
+ bool "Support for PICMG PCI Backplane"
+ depends on PCI && (MACH_TX39XX || MACH_TX49XX)
+ default y if !TOSHIBA_FPCIB0
+
+if TOSHIBA_RBTX4938
+
+comment "Multiplex Pin Select"
+choice
+ prompt "PIO[58:61]"
+ default TOSHIBA_RBTX4938_MPLEX_PIO58_61
+
+config TOSHIBA_RBTX4938_MPLEX_PIO58_61
+ bool "PIO"
+config TOSHIBA_RBTX4938_MPLEX_NAND
+ bool "NAND"
+config TOSHIBA_RBTX4938_MPLEX_ATA
+ bool "ATA"
+
+endchoice
+
+config TX4938_NAND_BOOT
+ depends on EXPERIMENTAL && TOSHIBA_RBTX4938_MPLEX_NAND
+ bool "NAND Boot Support (EXPERIMENTAL)"
+ help
+ This is only for Toshiba RBTX4938 reference board, which has NAND IPL.
+ Select this option if you need to use NAND boot.
+
+endif
+
+config PCI_TX4927
+ bool
diff --git a/arch/mips/txx9/generic/Makefile b/arch/mips/txx9/generic/Makefile
new file mode 100644
index 0000000..668fdaa
--- /dev/null
+++ b/arch/mips/txx9/generic/Makefile
@@ -0,0 +1,12 @@
+#
+# Makefile for common code for TXx9 based systems
+#
+
+obj-y += setup.o
+obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_SOC_TX4927) += mem_tx4927.o irq_tx4927.o
+obj-$(CONFIG_SOC_TX4938) += mem_tx4938.o irq_tx4938.o
+obj-$(CONFIG_TOSHIBA_FPCIB0) += smsc_fdc37m81x.o
+obj-$(CONFIG_KGDB) += dbgio.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/tx4938/common/dbgio.c b/arch/mips/txx9/generic/dbgio.c
similarity index 100%
rename from arch/mips/tx4938/common/dbgio.c
rename to arch/mips/txx9/generic/dbgio.c
diff --git a/arch/mips/txx9/generic/irq_tx4927.c b/arch/mips/txx9/generic/irq_tx4927.c
new file mode 100644
index 0000000..6377bd8
--- /dev/null
+++ b/arch/mips/txx9/generic/irq_tx4927.c
@@ -0,0 +1,37 @@
+/*
+ * Common tx4927 irq handler
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/irq_cpu.h>
+#include <asm/txx9/tx4927.h>
+
+void __init tx4927_irq_init(void)
+{
+ mips_cpu_irq_init();
+ txx9_irq_init(TX4927_IRC_REG);
+ set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4927_IRC_INT,
+ handle_simple_irq);
+}
diff --git a/arch/mips/txx9/generic/irq_tx4938.c b/arch/mips/txx9/generic/irq_tx4938.c
new file mode 100644
index 0000000..5fc86c9
--- /dev/null
+++ b/arch/mips/txx9/generic/irq_tx4938.c
@@ -0,0 +1,25 @@
+/*
+ * linux/arch/mips/tx4938/common/irq.c
+ *
+ * Common tx4938 irq handler
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/irq_cpu.h>
+#include <asm/txx9/tx4938.h>
+
+void __init tx4938_irq_init(void)
+{
+ mips_cpu_irq_init();
+ txx9_irq_init(TX4938_IRC_REG);
+ set_irq_chained_handler(MIPS_CPU_IRQ_BASE + TX4938_IRC_INT,
+ handle_simple_irq);
+}
diff --git a/arch/mips/txx9/generic/mem_tx4927.c b/arch/mips/txx9/generic/mem_tx4927.c
new file mode 100644
index 0000000..12dfc37
--- /dev/null
+++ b/arch/mips/txx9/generic/mem_tx4927.c
@@ -0,0 +1,141 @@
+/*
+ * linux/arch/mips/tx4927/common/tx4927_prom.c
+ *
+ * common tx4927 memory interface
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/io.h>
+
+static unsigned int __init tx4927_process_sdccr(unsigned long addr)
+{
+ u64 val;
+ unsigned int sdccr_ce;
+ unsigned int sdccr_bs;
+ unsigned int sdccr_rs;
+ unsigned int sdccr_cs;
+ unsigned int sdccr_mw;
+ unsigned int bs = 0;
+ unsigned int rs = 0;
+ unsigned int cs = 0;
+ unsigned int mw = 0;
+ unsigned int msize = 0;
+
+ val = __raw_readq((void __iomem *)addr);
+
+ /* MVMCP -- need #defs for these bits masks */
+ sdccr_ce = ((val & (1 << 10)) >> 10);
+ sdccr_bs = ((val & (1 << 8)) >> 8);
+ sdccr_rs = ((val & (3 << 5)) >> 5);
+ sdccr_cs = ((val & (3 << 2)) >> 2);
+ sdccr_mw = ((val & (1 << 0)) >> 0);
+
+ if (sdccr_ce) {
+ switch (sdccr_bs) {
+ case 0:{
+ bs = 2;
+ break;
+ }
+ case 1:{
+ bs = 4;
+ break;
+ }
+ }
+ switch (sdccr_rs) {
+ case 0:{
+ rs = 2048;
+ break;
+ }
+ case 1:{
+ rs = 4096;
+ break;
+ }
+ case 2:{
+ rs = 8192;
+ break;
+ }
+ case 3:{
+ rs = 0;
+ break;
+ }
+ }
+ switch (sdccr_cs) {
+ case 0:{
+ cs = 256;
+ break;
+ }
+ case 1:{
+ cs = 512;
+ break;
+ }
+ case 2:{
+ cs = 1024;
+ break;
+ }
+ case 3:{
+ cs = 2048;
+ break;
+ }
+ }
+ switch (sdccr_mw) {
+ case 0:{
+ mw = 8;
+ break;
+ } /* 8 bytes = 64 bits */
+ case 1:{
+ mw = 4;
+ break;
+ } /* 4 bytes = 32 bits */
+ }
+ }
+
+ /* bytes per chip MB per chip num chips */
+ msize = (((rs * cs * mw) / (1024 * 1024)) * bs);
+
+ return (msize);
+}
+
+
+unsigned int __init tx4927_get_mem_size(void)
+{
+ unsigned int c0;
+ unsigned int c1;
+ unsigned int c2;
+ unsigned int c3;
+ unsigned int total;
+
+ /* MVMCP -- need #defs for these registers */
+ c0 = tx4927_process_sdccr(0xff1f8000);
+ c1 = tx4927_process_sdccr(0xff1f8008);
+ c2 = tx4927_process_sdccr(0xff1f8010);
+ c3 = tx4927_process_sdccr(0xff1f8018);
+ total = c0 + c1 + c2 + c3;
+
+ return (total);
+}
diff --git a/arch/mips/tx4938/common/prom.c b/arch/mips/txx9/generic/mem_tx4938.c
similarity index 100%
rename from arch/mips/tx4938/common/prom.c
rename to arch/mips/txx9/generic/mem_tx4938.c
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
new file mode 100644
index 0000000..0b92d8c
--- /dev/null
+++ b/arch/mips/txx9/generic/pci.c
@@ -0,0 +1,388 @@
+/*
+ * linux/arch/mips/txx9/pci.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4927/setup.c,
+ * linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * Copyright 2001-2005 MontaVista Software Inc.
+ * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/delay.h>
+#include <linux/jiffies.h>
+#include <linux/io.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/pci.h>
+#ifdef CONFIG_TOSHIBA_FPCIB0
+#include <linux/interrupt.h>
+#include <asm/i8259.h>
+#include <asm/txx9/smsc_fdc37m81x.h>
+#endif
+
+static int __init
+early_read_config_word(struct pci_controller *hose,
+ int top_bus, int bus, int devfn, int offset, u16 *value)
+{
+ struct pci_dev fake_dev;
+ struct pci_bus fake_bus;
+
+ fake_dev.bus = &fake_bus;
+ fake_dev.sysdata = hose;
+ fake_dev.devfn = devfn;
+ fake_bus.number = bus;
+ fake_bus.sysdata = hose;
+ fake_bus.ops = hose->pci_ops;
+
+ if (bus != top_bus)
+ /* Fake a parent bus structure. */
+ fake_bus.parent = &fake_bus;
+ else
+ fake_bus.parent = NULL;
+
+ return pci_read_config_word(&fake_dev, offset, value);
+}
+
+int __init txx9_pci66_check(struct pci_controller *hose, int top_bus,
+ int current_bus)
+{
+ u32 pci_devfn;
+ unsigned short vid;
+ int cap66 = -1;
+ u16 stat;
+
+ /* It seems SLC90E66 needs some time after PCI reset... */
+ mdelay(80);
+
+ printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n");
+
+ for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
+ if (PCI_FUNC(pci_devfn))
+ continue;
+ if (early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_VENDOR_ID, &vid) !=
+ PCIBIOS_SUCCESSFUL)
+ continue;
+ if (vid == 0xffff)
+ continue;
+
+ /* check 66MHz capability */
+ if (cap66 < 0)
+ cap66 = 1;
+ if (cap66) {
+ early_read_config_word(hose, top_bus, current_bus,
+ pci_devfn, PCI_STATUS, &stat);
+ if (!(stat & PCI_STATUS_66MHZ)) {
+ printk(KERN_DEBUG
+ "PCI: %02x:%02x not 66MHz capable.\n",
+ current_bus, pci_devfn);
+ cap66 = 0;
+ break;
+ }
+ }
+ }
+ return cap66 > 0;
+}
+
+static struct resource primary_pci_mem_res[2] = {
+ { .name = "PCI MEM" },
+ { .name = "PCI MMIO" },
+};
+static struct resource primary_pci_io_res = { .name = "PCI IO" };
+struct pci_controller txx9_primary_pcic = {
+ .mem_resource = &primary_pci_mem_res[0],
+ .io_resource = &primary_pci_io_res,
+};
+
+#ifdef CONFIG_64BIT
+int txx9_pci_mem_high __initdata = 1;
+#else
+int txx9_pci_mem_high __initdata;
+#endif
+
+/*
+ * allocate pci_controller and resources.
+ * mem_base, io_base: physical addresss. 0 for auto assignment.
+ * mem_size and io_size means max size on auto assignment.
+ * pcic must be &txx9_primary_pcic or NULL.
+ */
+struct pci_controller *__init
+txx9_alloc_pci_controller(struct pci_controller *pcic,
+ unsigned long mem_base, unsigned long mem_size,
+ unsigned long io_base, unsigned long io_size)
+{
+ struct pcic {
+ struct pci_controller c;
+ struct resource r_mem[2];
+ struct resource r_io;
+ } *new = NULL;
+ int min_size = 0x10000;
+
+ if (!pcic) {
+ new = kzalloc(sizeof(*new), GFP_KERNEL);
+ if (!new)
+ return NULL;
+ new->r_mem[0].name = "PCI mem";
+ new->r_mem[1].name = "PCI mmio";
+ new->r_io.name = "PCI io";
+ new->c.mem_resource = new->r_mem;
+ new->c.io_resource = &new->r_io;
+ pcic = &new->c;
+ } else
+ BUG_ON(pcic != &txx9_primary_pcic);
+ pcic->io_resource->flags = IORESOURCE_IO;
+
+ /*
+ * for auto assignment, first search a (big) region for PCI
+ * MEM, then search a region for PCI IO.
+ */
+ if (mem_base) {
+ pcic->mem_resource[0].start = mem_base;
+ pcic->mem_resource[0].end = mem_base + mem_size - 1;
+ if (request_resource(&iomem_resource, &pcic->mem_resource[0]))
+ goto free_and_exit;
+ } else {
+ unsigned long min = 0, max = 0x20000000; /* low 512MB */
+ if (!mem_size) {
+ /* default size for auto assignment */
+ if (txx9_pci_mem_high)
+ mem_size = 0x20000000; /* mem:512M(max) */
+ else
+ mem_size = 0x08000000; /* mem:128M(max) */
+ }
+ if (txx9_pci_mem_high) {
+ min = 0x20000000;
+ max = 0xe0000000;
+ }
+ /* search free region for PCI MEM */
+ for (; mem_size >= min_size; mem_size /= 2) {
+ if (allocate_resource(&iomem_resource,
+ &pcic->mem_resource[0],
+ mem_size, min, max,
+ mem_size, NULL, NULL) == 0)
+ break;
+ }
+ if (mem_size < min_size)
+ goto free_and_exit;
+ }
+
+ pcic->mem_resource[1].flags = IORESOURCE_MEM | IORESOURCE_BUSY;
+ if (io_base) {
+ pcic->mem_resource[1].start = io_base;
+ pcic->mem_resource[1].end = io_base + io_size - 1;
+ if (request_resource(&iomem_resource, &pcic->mem_resource[1]))
+ goto release_and_exit;
+ } else {
+ if (!io_size)
+ /* default size for auto assignment */
+ io_size = 0x01000000; /* io:16M(max) */
+ /* search free region for PCI IO in low 512MB */
+ for (; io_size >= min_size; io_size /= 2) {
+ if (allocate_resource(&iomem_resource,
+ &pcic->mem_resource[1],
+ io_size, 0, 0x20000000,
+ io_size, NULL, NULL) == 0)
+ break;
+ }
+ if (io_size < min_size)
+ goto release_and_exit;
+ io_base = pcic->mem_resource[1].start;
+ }
+
+ pcic->mem_resource[0].flags = IORESOURCE_MEM;
+ if (pcic == &txx9_primary_pcic &&
+ mips_io_port_base == (unsigned long)-1) {
+ /* map ioport 0 to PCI I/O space address 0 */
+ set_io_port_base(IO_BASE + pcic->mem_resource[1].start);
+ pcic->io_resource->start = 0;
+ pcic->io_offset = 0; /* busaddr == ioaddr */
+ pcic->io_map_base = IO_BASE + pcic->mem_resource[1].start;
+ } else {
+ /* physaddr to ioaddr */
+ pcic->io_resource->start =
+ io_base - (mips_io_port_base - IO_BASE);
+ pcic->io_offset = io_base - (mips_io_port_base - IO_BASE);
+ pcic->io_map_base = mips_io_port_base;
+ }
+ pcic->io_resource->end = pcic->io_resource->start + io_size - 1;
+
+ pcic->mem_offset = 0; /* busaddr == physaddr */
+
+ printk(KERN_INFO "PCI: IO 0x%08llx-0x%08llx MEM 0x%08llx-0x%08llx\n",
+ (unsigned long long)pcic->mem_resource[1].start,
+ (unsigned long long)pcic->mem_resource[1].end,
+ (unsigned long long)pcic->mem_resource[0].start,
+ (unsigned long long)pcic->mem_resource[0].end);
+
+ /* register_pci_controller() will request MEM resource */
+ release_resource(&pcic->mem_resource[0]);
+ return pcic;
+ release_and_exit:
+ release_resource(&pcic->mem_resource[0]);
+ free_and_exit:
+ kfree(new);
+ printk(KERN_ERR "PCI: Failed to allocate resources.\n");
+ return NULL;
+}
+
+static int __init
+txx9_arch_pci_init(void)
+{
+ PCIBIOS_MIN_IO = 0x8000; /* reseve legacy I/O space */
+ return 0;
+}
+arch_initcall(txx9_arch_pci_init);
+
+/* IRQ/IDSEL mapping */
+int txx9_pci_option =
+#ifdef CONFIG_PICMG_PCI_BACKPLANE_DEFAULT
+ TXX9_PCI_OPT_PICMG |
+#endif
+ TXX9_PCI_OPT_CLK_AUTO;
+
+enum txx9_pci_err_action txx9_pci_err_action = TXX9_PCI_ERR_REPORT;
+
+#ifdef CONFIG_TOSHIBA_FPCIB0
+static irqreturn_t i8259_interrupt(int irq, void *dev_id)
+{
+ int isairq;
+
+ isairq = i8259_irq();
+ if (unlikely(isairq <= I8259A_IRQ_BASE))
+ return IRQ_NONE;
+ generic_handle_irq(isairq);
+ return IRQ_HANDLED;
+}
+
+static int __init
+txx9_i8259_irq_setup(int irq)
+{
+ int err;
+
+ init_i8259_irqs();
+ err = request_irq(irq, &i8259_interrupt, IRQF_DISABLED|IRQF_SHARED,
+ "cascade(i8259)", (void *)(long)irq);
+ if (!err)
+ printk(KERN_INFO "PCI-ISA bridge PIC (irq %d)\n", irq);
+ return err;
+}
+
+static void __init quirk_slc90e66_bridge(struct pci_dev *dev)
+{
+ int irq; /* PCI/ISA Bridge interrupt */
+ u8 reg_64;
+ u32 reg_b0;
+ u8 reg_e1;
+ irq = pcibios_map_irq(dev, PCI_SLOT(dev->devfn), 1); /* INTA */
+ if (!irq)
+ return;
+ txx9_i8259_irq_setup(irq);
+ pci_read_config_byte(dev, 0x64, ®_64);
+ pci_read_config_dword(dev, 0xb0, ®_b0);
+ pci_read_config_byte(dev, 0xe1, ®_e1);
+ /* serial irq control */
+ reg_64 = 0xd0;
+ /* serial irq pin */
+ reg_b0 |= 0x00010000;
+ /* ide irq on isa14 */
+ reg_e1 &= 0xf0;
+ reg_e1 |= 0x0d;
+ pci_write_config_byte(dev, 0x64, reg_64);
+ pci_write_config_dword(dev, 0xb0, reg_b0);
+ pci_write_config_byte(dev, 0xe1, reg_e1);
+
+ smsc_fdc37m81x_init(0x3f0);
+ smsc_fdc37m81x_config_beg();
+ smsc_fdc37m81x_config_set(SMSC_FDC37M81X_DNUM,
+ SMSC_FDC37M81X_KBD);
+ smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT, 1);
+ smsc_fdc37m81x_config_set(SMSC_FDC37M81X_INT2, 12);
+ smsc_fdc37m81x_config_set(SMSC_FDC37M81X_ACTIVE,
+ 1);
+ smsc_fdc37m81x_config_end();
+}
+
+static void quirk_slc90e66_ide(struct pci_dev *dev)
+{
+ unsigned char dat;
+ int regs[2] = {0x41, 0x43};
+ int i;
+
+ /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 14);
+ pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &dat);
+ printk(KERN_INFO "PCI: %s: IRQ %02x", pci_name(dev), dat);
+ /* enable SMSC SLC90E66 IDE */
+ for (i = 0; i < ARRAY_SIZE(regs); i++) {
+ pci_read_config_byte(dev, regs[i], &dat);
+ pci_write_config_byte(dev, regs[i], dat | 0x80);
+ pci_read_config_byte(dev, regs[i], &dat);
+ printk(KERN_CONT " IDETIM%d %02x", i, dat);
+ }
+ pci_read_config_byte(dev, 0x5c, &dat);
+ /*
+ * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
+ *
+ * This line of code is intended to provide the user with a work
+ * around solution to the anomalies cited in SMSC's anomaly sheet
+ * entitled, "SLC90E66 Functional Rev.J_0.1 Anomalies"".
+ *
+ * !!! DO NOT REMOVE THIS COMMENT IT IS REQUIRED BY SMSC !!!
+ */
+ dat |= 0x01;
+ pci_write_config_byte(dev, regs[i], dat);
+ pci_read_config_byte(dev, 0x5c, &dat);
+ printk(KERN_CONT " REG5C %02x", dat);
+ printk(KERN_CONT "\n");
+}
+#endif /* CONFIG_TOSHIBA_FPCIB0 */
+
+static void final_fixup(struct pci_dev *dev)
+{
+ unsigned char bist;
+
+ /* Do build-in self test */
+ if (pci_read_config_byte(dev, PCI_BIST, &bist) == PCIBIOS_SUCCESSFUL &&
+ (bist & PCI_BIST_CAPABLE)) {
+ unsigned long timeout;
+ pci_set_power_state(dev, PCI_D0);
+ printk(KERN_INFO "PCI: %s BIST...", pci_name(dev));
+ pci_write_config_byte(dev, PCI_BIST, PCI_BIST_START);
+ timeout = jiffies + HZ * 2; /* timeout after 2 sec */
+ do {
+ pci_read_config_byte(dev, PCI_BIST, &bist);
+ if (time_after(jiffies, timeout))
+ break;
+ } while (bist & PCI_BIST_START);
+ if (bist & (PCI_BIST_CODE_MASK | PCI_BIST_START))
+ printk(KERN_CONT "failed. (0x%x)\n", bist);
+ else
+ printk(KERN_CONT "OK.\n");
+ }
+}
+
+#ifdef CONFIG_TOSHIBA_FPCIB0
+#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_0,
+ quirk_slc90e66_bridge);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1,
+ quirk_slc90e66_ide);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_1,
+ quirk_slc90e66_ide);
+#endif
+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, final_fixup);
+DECLARE_PCI_FIXUP_RESUME(PCI_ANY_ID, PCI_ANY_ID, final_fixup);
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+ return 0;
+}
+
+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ return txx9_board_vec->pci_map_irq(dev, slot, pin);
+}
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c
new file mode 100644
index 0000000..5afc5d5
--- /dev/null
+++ b/arch/mips/txx9/generic/setup.c
@@ -0,0 +1,212 @@
+/*
+ * linux/arch/mips/txx9/generic/setup.c
+ *
+ * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
+ * and RBTX49xx patch from CELF patch archive.
+ *
+ * 2003-2005 (c) MontaVista Software, Inc.
+ * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/string.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <asm/bootinfo.h>
+#include <asm/txx9/generic.h>
+#ifdef CONFIG_CPU_TX49XX
+#include <asm/txx9/tx4938.h>
+#endif
+
+/* EBUSC settings of TX4927, etc. */
+struct resource txx9_ce_res[8];
+static char txx9_ce_res_name[8][4]; /* "CEn" */
+
+/* pcode, internal register */
+char txx9_pcode_str[8];
+static struct resource txx9_reg_res = {
+ .name = txx9_pcode_str,
+ .flags = IORESOURCE_MEM,
+};
+void __init
+txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
+ sprintf(txx9_ce_res_name[i], "CE%d", i);
+ txx9_ce_res[i].flags = IORESOURCE_MEM;
+ txx9_ce_res[i].name = txx9_ce_res_name[i];
+ }
+
+ sprintf(txx9_pcode_str, "TX%x", pcode);
+ if (base) {
+ txx9_reg_res.start = base & 0xfffffffffULL;
+ txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
+ request_resource(&iomem_resource, &txx9_reg_res);
+ }
+}
+
+/* clocks */
+unsigned int txx9_master_clock;
+unsigned int txx9_cpu_clock;
+unsigned int txx9_gbus_clock;
+
+
+/* Minimum CLK support */
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+ if (!strcmp(id, "spi-baseclk"))
+ return (struct clk *)(txx9_gbus_clock / 2 / 4);
+ if (!strcmp(id, "imbus_clk"))
+ return (struct clk *)(txx9_gbus_clock / 2);
+ return ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+int clk_enable(struct clk *clk)
+{
+ return 0;
+}
+EXPORT_SYMBOL(clk_enable);
+
+void clk_disable(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_disable);
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+ return (unsigned long)clk;
+}
+EXPORT_SYMBOL(clk_get_rate);
+
+void clk_put(struct clk *clk)
+{
+}
+EXPORT_SYMBOL(clk_put);
+
+extern struct txx9_board_vec jmr3927_vec;
+extern struct txx9_board_vec rbtx4927_vec;
+extern struct txx9_board_vec rbtx4937_vec;
+extern struct txx9_board_vec rbtx4938_vec;
+
+struct txx9_board_vec *txx9_board_vec __initdata;
+static char txx9_system_type[32];
+
+void __init prom_init_cmdline(void)
+{
+ int argc = (int)fw_arg0;
+ char **argv = (char **)fw_arg1;
+ int i; /* Always ignore the "-c" at argv[0] */
+
+ /* ignore all built-in args if any f/w args given */
+ if (argc > 1)
+ *arcs_cmdline = '\0';
+
+ for (i = 1; i < argc; i++) {
+ if (i != 1)
+ strcat(arcs_cmdline, " ");
+ strcat(arcs_cmdline, argv[i]);
+ }
+}
+
+void __init prom_init(void)
+{
+#ifdef CONFIG_CPU_TX39XX
+ txx9_board_vec = &jmr3927_vec;
+#endif
+#ifdef CONFIG_CPU_TX49XX
+ switch (TX4938_REV_PCODE()) {
+ case 0x4927:
+ txx9_board_vec = &rbtx4927_vec;
+ break;
+ case 0x4937:
+ txx9_board_vec = &rbtx4937_vec;
+ break;
+ case 0x4938:
+ txx9_board_vec = &rbtx4938_vec;
+ break;
+ }
+#endif
+
+ strcpy(txx9_system_type, txx9_board_vec->system);
+
+ txx9_board_vec->prom_init();
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+
+const char *get_system_type(void)
+{
+ return txx9_system_type;
+}
+
+char * __init prom_getcmdline(void)
+{
+ return &(arcs_cmdline[0]);
+}
+
+/* wrappers */
+void __init plat_mem_setup(void)
+{
+ txx9_board_vec->mem_setup();
+}
+
+void __init arch_init_irq(void)
+{
+ txx9_board_vec->irq_setup();
+}
+
+void __init plat_time_init(void)
+{
+ txx9_board_vec->time_init();
+}
+
+static int __init _txx9_arch_init(void)
+{
+ if (txx9_board_vec->arch_init)
+ txx9_board_vec->arch_init();
+ return 0;
+}
+arch_initcall(_txx9_arch_init);
+
+static int __init _txx9_device_init(void)
+{
+ if (txx9_board_vec->device_init)
+ txx9_board_vec->device_init();
+ return 0;
+}
+device_initcall(_txx9_device_init);
+
+int (*txx9_irq_dispatch)(int pending);
+asmlinkage void plat_irq_dispatch(void)
+{
+ int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+ int irq = txx9_irq_dispatch(pending);
+
+ if (likely(irq >= 0))
+ do_IRQ(irq);
+ else
+ spurious_interrupt();
+}
+
+/* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
+#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
+static unsigned long __swizzle_addr_none(unsigned long port)
+{
+ return port;
+}
+unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
+EXPORT_SYMBOL(__swizzle_addr_b);
+#endif
diff --git a/arch/mips/txx9/generic/smsc_fdc37m81x.c b/arch/mips/txx9/generic/smsc_fdc37m81x.c
new file mode 100644
index 0000000..69e4874
--- /dev/null
+++ b/arch/mips/txx9/generic/smsc_fdc37m81x.c
@@ -0,0 +1,172 @@
+/*
+ * Interface for smsc fdc48m81x Super IO chip
+ *
+ * Author: MontaVista Software, Inc. source@mvista.com
+ *
+ * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Copyright 2004 (c) MontaVista Software, Inc.
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/txx9/smsc_fdc37m81x.h>
+
+#define DEBUG
+
+/* Common Registers */
+#define SMSC_FDC37M81X_CONFIG_INDEX 0x00
+#define SMSC_FDC37M81X_CONFIG_DATA 0x01
+#define SMSC_FDC37M81X_CONF 0x02
+#define SMSC_FDC37M81X_INDEX 0x03
+#define SMSC_FDC37M81X_DNUM 0x07
+#define SMSC_FDC37M81X_DID 0x20
+#define SMSC_FDC37M81X_DREV 0x21
+#define SMSC_FDC37M81X_PCNT 0x22
+#define SMSC_FDC37M81X_PMGT 0x23
+#define SMSC_FDC37M81X_OSC 0x24
+#define SMSC_FDC37M81X_CONFPA0 0x26
+#define SMSC_FDC37M81X_CONFPA1 0x27
+#define SMSC_FDC37M81X_TEST4 0x2B
+#define SMSC_FDC37M81X_TEST5 0x2C
+#define SMSC_FDC37M81X_TEST1 0x2D
+#define SMSC_FDC37M81X_TEST2 0x2E
+#define SMSC_FDC37M81X_TEST3 0x2F
+
+/* Logical device numbers */
+#define SMSC_FDC37M81X_FDD 0x00
+#define SMSC_FDC37M81X_SERIAL1 0x04
+#define SMSC_FDC37M81X_SERIAL2 0x05
+#define SMSC_FDC37M81X_KBD 0x07
+
+/* Logical device Config Registers */
+#define SMSC_FDC37M81X_ACTIVE 0x30
+#define SMSC_FDC37M81X_BASEADDR0 0x60
+#define SMSC_FDC37M81X_BASEADDR1 0x61
+#define SMSC_FDC37M81X_INT 0x70
+#define SMSC_FDC37M81X_INT2 0x72
+#define SMSC_FDC37M81X_MODE 0xF0
+
+/* Chip Config Values */
+#define SMSC_FDC37M81X_CONFIG_ENTER 0x55
+#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
+#define SMSC_FDC37M81X_CHIP_ID 0x4d
+
+static unsigned long g_smsc_fdc37m81x_base = 0;
+
+static inline unsigned char smsc_fdc37m81x_rd(unsigned char index)
+{
+ outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
+
+ return inb(g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);
+}
+
+static inline void smsc_dc37m81x_wr(unsigned char index, unsigned char data)
+{
+ outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
+ outb(data, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);
+}
+
+void smsc_fdc37m81x_config_beg(void)
+{
+ if (g_smsc_fdc37m81x_base) {
+ outb(SMSC_FDC37M81X_CONFIG_ENTER,
+ g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
+ }
+}
+
+void smsc_fdc37m81x_config_end(void)
+{
+ if (g_smsc_fdc37m81x_base)
+ outb(SMSC_FDC37M81X_CONFIG_EXIT,
+ g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);
+}
+
+u8 smsc_fdc37m81x_config_get(u8 reg)
+{
+ u8 val = 0;
+
+ if (g_smsc_fdc37m81x_base)
+ val = smsc_fdc37m81x_rd(reg);
+
+ return val;
+}
+
+void smsc_fdc37m81x_config_set(u8 reg, u8 val)
+{
+ if (g_smsc_fdc37m81x_base)
+ smsc_dc37m81x_wr(reg, val);
+}
+
+unsigned long __init smsc_fdc37m81x_init(unsigned long port)
+{
+ const int field = sizeof(unsigned long) * 2;
+ u8 chip_id;
+
+ if (g_smsc_fdc37m81x_base)
+ printk("smsc_fdc37m81x_init() stepping on old base=0x%0*lx\n",
+ field, g_smsc_fdc37m81x_base);
+
+ g_smsc_fdc37m81x_base = port;
+
+ smsc_fdc37m81x_config_beg();
+
+ chip_id = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DID);
+ if (chip_id == SMSC_FDC37M81X_CHIP_ID)
+ smsc_fdc37m81x_config_end();
+ else {
+ printk("smsc_fdc37m81x_init() unknow chip id 0x%02x\n",
+ chip_id);
+ g_smsc_fdc37m81x_base = 0;
+ }
+
+ return g_smsc_fdc37m81x_base;
+}
+
+#ifdef DEBUG
+void smsc_fdc37m81x_config_dump_one(char *key, u8 dev, u8 reg)
+{
+ printk("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg,
+ smsc_fdc37m81x_rd(reg));
+}
+
+void smsc_fdc37m81x_config_dump(void)
+{
+ u8 orig;
+ char *fname = "smsc_fdc37m81x_config_dump()";
+
+ smsc_fdc37m81x_config_beg();
+
+ orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM);
+
+ printk("%s: common\n", fname);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
+ SMSC_FDC37M81X_DNUM);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
+ SMSC_FDC37M81X_DID);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
+ SMSC_FDC37M81X_DREV);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
+ SMSC_FDC37M81X_PCNT);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,
+ SMSC_FDC37M81X_PMGT);
+
+ printk("%s: keyboard\n", fname);
+ smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
+ SMSC_FDC37M81X_ACTIVE);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
+ SMSC_FDC37M81X_INT);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
+ SMSC_FDC37M81X_INT2);
+ smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,
+ SMSC_FDC37M81X_LDCR_F0);
+
+ smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, orig);
+
+ smsc_fdc37m81x_config_end();
+}
+#endif
diff --git a/arch/mips/txx9/jmr3927/Makefile b/arch/mips/txx9/jmr3927/Makefile
new file mode 100644
index 0000000..ba292c9
--- /dev/null
+++ b/arch/mips/txx9/jmr3927/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for TOSHIBA JMR-TX3927 board
+#
+
+obj-y += prom.o irq.o setup.o
+obj-$(CONFIG_KGDB) += kgdb_io.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/txx9/jmr3927/irq.c b/arch/mips/txx9/jmr3927/irq.c
new file mode 100644
index 0000000..070c9a1
--- /dev/null
+++ b/arch/mips/txx9/jmr3927/irq.c
@@ -0,0 +1,171 @@
+/*
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ahennessy@mvista.com
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/system.h>
+
+#include <asm/processor.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/jmr3927.h>
+
+#if JMR3927_IRQ_END > NR_IRQS
+#error JMR3927_IRQ_END > NR_IRQS
+#endif
+
+static unsigned char irc_level[TX3927_NUM_IR] = {
+ 5, 5, 5, 5, 5, 5, /* INT[5:0] */
+ 7, 7, /* SIO */
+ 5, 5, 5, 0, 0, /* DMA, PIO, PCI */
+ 6, 6, 6 /* TMR */
+};
+
+/*
+ * CP0_STATUS is a thread's resource (saved/restored on context switch).
+ * So disable_irq/enable_irq MUST handle IOC/IRC registers.
+ */
+static void mask_irq_ioc(unsigned int irq)
+{
+ /* 0: mask */
+ unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
+ unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
+ unsigned int bit = 1 << irq_nr;
+ jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
+ /* flush write buffer */
+ (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
+}
+static void unmask_irq_ioc(unsigned int irq)
+{
+ /* 0: mask */
+ unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
+ unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
+ unsigned int bit = 1 << irq_nr;
+ jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
+ /* flush write buffer */
+ (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
+}
+
+static int jmr3927_ioc_irqroute(void)
+{
+ unsigned char istat = jmr3927_ioc_reg_in(JMR3927_IOC_INTS2_ADDR);
+ int i;
+
+ for (i = 0; i < JMR3927_NR_IRQ_IOC; i++) {
+ if (istat & (1 << i))
+ return JMR3927_IRQ_IOC + i;
+ }
+ return -1;
+}
+
+static int jmr3927_irq_dispatch(int pending)
+{
+ int irq;
+
+ if ((pending & CAUSEF_IP7) == 0)
+ return -1;
+ irq = (pending >> CAUSEB_IP2) & 0x0f;
+ irq += JMR3927_IRQ_IRC;
+ if (irq == JMR3927_IRQ_IOCINT)
+ irq = jmr3927_ioc_irqroute();
+ return irq;
+}
+
+#ifdef CONFIG_PCI
+static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
+{
+ printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
+ printk(KERN_WARNING "pcistat:%02x, lbstat:%04lx\n",
+ tx3927_pcicptr->pcistat, tx3927_pcicptr->lbstat);
+
+ return IRQ_HANDLED;
+}
+static struct irqaction pcierr_action = {
+ .handler = jmr3927_pcierr_interrupt,
+ .mask = CPU_MASK_NONE,
+ .name = "PCI error",
+};
+#endif
+
+static void __init jmr3927_irq_init(void);
+
+void __init jmr3927_irq_setup(void)
+{
+ txx9_irq_dispatch = jmr3927_irq_dispatch;
+ /* Now, interrupt control disabled, */
+ /* all IRC interrupts are masked, */
+ /* all IRC interrupt mode are Low Active. */
+
+ /* mask all IOC interrupts */
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR);
+ /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */
+ jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR);
+
+ /* clear PCI Soft interrupts */
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR);
+ /* clear PCI Reset interrupts */
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
+
+ jmr3927_irq_init();
+
+ /* setup IOC interrupt 1 (PCI, MODEM) */
+ set_irq_chained_handler(JMR3927_IRQ_IOCINT, handle_simple_irq);
+
+#ifdef CONFIG_PCI
+ setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action);
+#endif
+
+ /* enable all CPU interrupt bits. */
+ set_c0_status(ST0_IM); /* IE bit is still 0. */
+}
+
+static struct irq_chip jmr3927_irq_ioc = {
+ .name = "jmr3927_ioc",
+ .ack = mask_irq_ioc,
+ .mask = mask_irq_ioc,
+ .mask_ack = mask_irq_ioc,
+ .unmask = unmask_irq_ioc,
+};
+
+static void __init jmr3927_irq_init(void)
+{
+ u32 i;
+
+ txx9_irq_init(TX3927_IRC_REG);
+ for (i = 0; i < TXx9_MAX_IR; i++)
+ txx9_irq_set_pri(i, irc_level[i]);
+ for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
+ set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq);
+}
diff --git a/arch/mips/txx9/jmr3927/kgdb_io.c b/arch/mips/txx9/jmr3927/kgdb_io.c
new file mode 100644
index 0000000..5bd757e
--- /dev/null
+++ b/arch/mips/txx9/jmr3927/kgdb_io.c
@@ -0,0 +1,105 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * Low level uart routines to directly access a TX[34]927 SIO.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ahennessy@mvista.com or source@mvista.com
+ *
+ * Based on arch/mips/ddb5xxx/ddb5477/kgdb_io.c
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <asm/txx9/jmr3927.h>
+
+#define TIMEOUT 0xffffff
+
+static int remoteDebugInitialized = 0;
+static void debugInit(int baud);
+
+int putDebugChar(unsigned char c)
+{
+ int i = 0;
+
+ if (!remoteDebugInitialized) {
+ remoteDebugInitialized = 1;
+ debugInit(38400);
+ }
+
+ do {
+ slow_down();
+ i++;
+ if (i>TIMEOUT) {
+ break;
+ }
+ } while (!(tx3927_sioptr(0)->cisr & TXx927_SICISR_TXALS));
+ tx3927_sioptr(0)->tfifo = c;
+
+ return 1;
+}
+
+unsigned char getDebugChar(void)
+{
+ int i = 0;
+ int dicr;
+ char c;
+
+ if (!remoteDebugInitialized) {
+ remoteDebugInitialized = 1;
+ debugInit(38400);
+ }
+
+ /* diable RX int. */
+ dicr = tx3927_sioptr(0)->dicr;
+ tx3927_sioptr(0)->dicr = 0;
+
+ do {
+ slow_down();
+ i++;
+ if (i>TIMEOUT) {
+ break;
+ }
+ } while (tx3927_sioptr(0)->disr & TXx927_SIDISR_UVALID)
+ ;
+ c = tx3927_sioptr(0)->rfifo;
+
+ /* clear RX int. status */
+ tx3927_sioptr(0)->disr &= ~TXx927_SIDISR_RDIS;
+ /* enable RX int. */
+ tx3927_sioptr(0)->dicr = dicr;
+
+ return c;
+}
+
+static void debugInit(int baud)
+{
+ tx3927_sioptr(0)->lcr = 0x020;
+ tx3927_sioptr(0)->dicr = 0;
+ tx3927_sioptr(0)->disr = 0x4100;
+ tx3927_sioptr(0)->cisr = 0x014;
+ tx3927_sioptr(0)->fcr = 0;
+ tx3927_sioptr(0)->flcr = 0x02;
+ tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) |
+ TXx927_SIBGR_BCLK_T0;
+}
diff --git a/arch/mips/txx9/jmr3927/prom.c b/arch/mips/txx9/jmr3927/prom.c
new file mode 100644
index 0000000..2cadb42
--- /dev/null
+++ b/arch/mips/txx9/jmr3927/prom.c
@@ -0,0 +1,76 @@
+/*
+ * BRIEF MODULE DESCRIPTION
+ * PROM library initialisation code, assuming a version of
+ * pmon is the boot code.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ahennessy@mvista.com
+ *
+ * Based on arch/mips/au1000/common/prom.c
+ *
+ * This file was derived from Carsten Langgaard's
+ * arch/mips/mips-boards/xx files.
+ *
+ * Carsten Langgaard, carstenl@mips.com
+ * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <asm/bootinfo.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/jmr3927.h>
+
+#define TIMEOUT 0xffffff
+
+void
+prom_putchar(char c)
+{
+ int i = 0;
+
+ do {
+ i++;
+ if (i>TIMEOUT)
+ break;
+ } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
+ tx3927_sioptr(1)->tfifo = c;
+ return;
+}
+
+void
+puts(const char *cp)
+{
+ while (*cp)
+ prom_putchar(*cp++);
+ prom_putchar('\r');
+ prom_putchar('\n');
+}
+
+void __init jmr3927_prom_init(void)
+{
+ /* CCFG */
+ if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
+ puts("Warning: TX3927 TLB off\n");
+
+ prom_init_cmdline();
+ add_memory_region(0, JMR3927_SDRAM_SIZE, BOOT_MEM_RAM);
+}
diff --git a/arch/mips/txx9/jmr3927/setup.c b/arch/mips/txx9/jmr3927/setup.c
new file mode 100644
index 0000000..5e35ef7
--- /dev/null
+++ b/arch/mips/txx9/jmr3927/setup.c
@@ -0,0 +1,375 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: MontaVista Software, Inc.
+ * ahennessy@mvista.com
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#ifdef CONFIG_SERIAL_TXX9
+#include <linux/serial_core.h>
+#endif
+#include <asm/txx9tmr.h>
+#include <asm/txx9pio.h>
+#include <asm/reboot.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/jmr3927.h>
+#include <asm/mipsregs.h>
+
+extern void puts(const char *cp);
+
+/* don't enable - see errata */
+static int jmr3927_ccfg_toeon;
+
+static inline void do_reset(void)
+{
+#if 1 /* Resetting PCI bus */
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
+ jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
+ (void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR); /* flush WB */
+ mdelay(1);
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
+#endif
+ jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
+}
+
+static void jmr3927_machine_restart(char *command)
+{
+ local_irq_disable();
+ puts("Rebooting...");
+ do_reset();
+}
+
+static void jmr3927_machine_halt(void)
+{
+ puts("JMR-TX3927 halted.\n");
+ while (1);
+}
+
+static void jmr3927_machine_power_off(void)
+{
+ puts("JMR-TX3927 halted. Please turn off the power.\n");
+ while (1);
+}
+
+static void __init jmr3927_time_init(void)
+{
+ txx9_clockevent_init(TX3927_TMR_REG(0),
+ TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0),
+ JMR3927_IMCLK);
+ txx9_clocksource_init(TX3927_TMR_REG(1), JMR3927_IMCLK);
+}
+
+#define DO_WRITE_THROUGH
+#define DO_ENABLE_CACHE
+
+static void jmr3927_board_init(void);
+
+static void __init jmr3927_mem_setup(void)
+{
+ char *argptr;
+
+ set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
+
+ _machine_restart = jmr3927_machine_restart;
+ _machine_halt = jmr3927_machine_halt;
+ pm_power_off = jmr3927_machine_power_off;
+
+ /*
+ * IO/MEM resources.
+ */
+ ioport_resource.start = 0;
+ ioport_resource.end = 0xffffffff;
+ iomem_resource.start = 0;
+ iomem_resource.end = 0xffffffff;
+
+ /* Reboot on panic */
+ panic_timeout = 180;
+
+ /* cache setup */
+ {
+ unsigned int conf;
+#ifdef DO_ENABLE_CACHE
+ int mips_ic_disable = 0, mips_dc_disable = 0;
+#else
+ int mips_ic_disable = 1, mips_dc_disable = 1;
+#endif
+#ifdef DO_WRITE_THROUGH
+ int mips_config_cwfon = 0;
+ int mips_config_wbon = 0;
+#else
+ int mips_config_cwfon = 1;
+ int mips_config_wbon = 1;
+#endif
+
+ conf = read_c0_conf();
+ conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON);
+ conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
+ conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
+ conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
+ conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
+
+ write_c0_conf(conf);
+ write_c0_cache(0);
+ }
+
+ /* initialize board */
+ jmr3927_board_init();
+
+ argptr = prom_getcmdline();
+
+ if ((argptr = strstr(argptr, "toeon")) != NULL)
+ jmr3927_ccfg_toeon = 1;
+ argptr = prom_getcmdline();
+ if ((argptr = strstr(argptr, "ip=")) == NULL) {
+ argptr = prom_getcmdline();
+ strcat(argptr, " ip=bootp");
+ }
+
+#ifdef CONFIG_SERIAL_TXX9
+ {
+ extern int early_serial_txx9_setup(struct uart_port *port);
+ int i;
+ struct uart_port req;
+ for(i = 0; i < 2; i++) {
+ memset(&req, 0, sizeof(req));
+ req.line = i;
+ req.iotype = UPIO_MEM;
+ req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i);
+ req.mapbase = TX3927_SIO_REG(i);
+ req.irq = i == 0 ?
+ JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
+ if (i == 0)
+ req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
+ req.uartclk = JMR3927_IMCLK;
+ early_serial_txx9_setup(&req);
+ }
+ }
+#ifdef CONFIG_SERIAL_TXX9_CONSOLE
+ argptr = prom_getcmdline();
+ if ((argptr = strstr(argptr, "console=")) == NULL) {
+ argptr = prom_getcmdline();
+ strcat(argptr, " console=ttyS1,115200");
+ }
+#endif
+#endif
+}
+
+static void tx3927_setup(void);
+
+static void __init jmr3927_pci_setup(void)
+{
+#ifdef CONFIG_PCI
+ int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
+ struct pci_controller *c;
+
+ c = txx9_alloc_pci_controller(&txx9_primary_pcic,
+ JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
+ JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
+ register_pci_controller(c);
+ if (!extarb) {
+ /* Reset PCI Bus */
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
+ udelay(100);
+ jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
+ JMR3927_IOC_RESET_ADDR);
+ udelay(100);
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
+ }
+ tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
+#endif /* CONFIG_PCI */
+}
+
+static void __init jmr3927_board_init(void)
+{
+ tx3927_setup();
+ jmr3927_pci_setup();
+
+ /* SIO0 DTR on */
+ jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
+
+ jmr3927_led_set(0);
+
+ printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
+ jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
+ jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
+ jmr3927_dipsw1(), jmr3927_dipsw2(),
+ jmr3927_dipsw3(), jmr3927_dipsw4());
+}
+
+static void __init tx3927_setup(void)
+{
+ int i;
+
+ txx9_cpu_clock = JMR3927_CORECLK;
+ txx9_gbus_clock = JMR3927_GBUSCLK;
+ /* SDRAMC are configured by PROM */
+
+ /* ROMC */
+ tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
+ tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
+ tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
+ tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
+
+ /* CCFG */
+ /* enable Timeout BusError */
+ if (jmr3927_ccfg_toeon)
+ tx3927_ccfgptr->ccfg |= TX3927_CCFG_TOE;
+
+ /* clear BusErrorOnWrite flag */
+ tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_BEOW;
+ /* Disable PCI snoop */
+ tx3927_ccfgptr->ccfg &= ~TX3927_CCFG_PSNP;
+ /* do reset on watchdog */
+ tx3927_ccfgptr->ccfg |= TX3927_CCFG_WR;
+
+#ifdef DO_WRITE_THROUGH
+ /* Enable PCI SNOOP - with write through only */
+ tx3927_ccfgptr->ccfg |= TX3927_CCFG_PSNP;
+#endif
+
+ /* Pin selection */
+ tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
+ tx3927_ccfgptr->pcfg |=
+ TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
+ (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
+
+ printk("TX3927 -- CRIR:%08lx CCFG:%08lx PCFG:%08lx\n",
+ tx3927_ccfgptr->crir,
+ tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg);
+
+ /* TMR */
+ for (i = 0; i < TX3927_NR_TMR; i++)
+ txx9_tmr_init(TX3927_TMR_REG(i));
+
+ /* DMA */
+ tx3927_dmaptr->mcr = 0;
+ for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) {
+ /* reset channel */
+ tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST;
+ tx3927_dmaptr->ch[i].ccr = 0;
+ }
+ /* enable DMA */
+#ifdef __BIG_ENDIAN
+ tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN;
+#else
+ tx3927_dmaptr->mcr = TX3927_DMA_MCR_MSTEN | TX3927_DMA_MCR_LE;
+#endif
+
+ /* PIO */
+ /* PIO[15:12] connected to LEDs */
+ __raw_writel(0x0000f000, &tx3927_pioptr->dir);
+ __raw_writel(0, &tx3927_pioptr->maskcpu);
+ __raw_writel(0, &tx3927_pioptr->maskext);
+ txx9_gpio_init(TX3927_PIO_REG, 0, 16);
+ gpio_request(11, "dipsw1");
+ gpio_request(10, "dipsw2");
+ {
+ unsigned int conf;
+
+ conf = read_c0_conf();
+ if (!(conf & TX39_CONF_ICE))
+ printk("TX3927 I-Cache disabled.\n");
+ if (!(conf & TX39_CONF_DCE))
+ printk("TX3927 D-Cache disabled.\n");
+ else if (!(conf & TX39_CONF_WBON))
+ printk("TX3927 D-Cache WriteThrough.\n");
+ else if (!(conf & TX39_CONF_CWFON))
+ printk("TX3927 D-Cache WriteBack.\n");
+ else
+ printk("TX3927 D-Cache WriteBack (CWF) .\n");
+ }
+}
+
+/* This trick makes rtc-ds1742 driver usable as is. */
+static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
+{
+ if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
+ return port;
+ port = (port & 0xffff0000) | (port & 0x7fff << 1);
+#ifdef __BIG_ENDIAN
+ return port;
+#else
+ return port | 1;
+#endif
+}
+
+static int __init jmr3927_rtc_init(void)
+{
+ static struct resource __initdata res = {
+ .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
+ .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *dev;
+ dev = platform_device_register_simple("rtc-ds1742", -1, &res, 1);
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+ struct resource res = {
+ .start = base,
+ .end = base + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("txx9wdt", -1, &res, 1);
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init jmr3927_wdt_init(void)
+{
+ return txx9_wdt_init(TX3927_TMR_REG(2));
+}
+
+static void __init jmr3927_device_init(void)
+{
+ __swizzle_addr_b = jmr3927_swizzle_addr_b;
+ jmr3927_rtc_init();
+ jmr3927_wdt_init();
+}
+
+struct txx9_board_vec jmr3927_vec __initdata = {
+ .system = "Toshiba JMR_TX3927",
+ .prom_init = jmr3927_prom_init,
+ .mem_setup = jmr3927_mem_setup,
+ .irq_setup = jmr3927_irq_setup,
+ .time_init = jmr3927_time_init,
+ .device_init = jmr3927_device_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = jmr3927_pci_map_irq,
+#endif
+};
diff --git a/arch/mips/txx9/rbtx4927/Makefile b/arch/mips/txx9/rbtx4927/Makefile
new file mode 100644
index 0000000..f3e1f59
--- /dev/null
+++ b/arch/mips/txx9/rbtx4927/Makefile
@@ -0,0 +1,3 @@
+obj-y += prom.o setup.o irq.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/txx9/rbtx4927/irq.c b/arch/mips/txx9/rbtx4927/irq.c
new file mode 100644
index 0000000..70f1321
--- /dev/null
+++ b/arch/mips/txx9/rbtx4927/irq.c
@@ -0,0 +1,199 @@
+/*
+ * Toshiba RBTX4927 specific interrupt handlers
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+/*
+IRQ Device
+00 RBTX4927-ISA/00
+01 RBTX4927-ISA/01 PS2/Keyboard
+02 RBTX4927-ISA/02 Cascade RBTX4927-ISA (irqs 8-15)
+03 RBTX4927-ISA/03
+04 RBTX4927-ISA/04
+05 RBTX4927-ISA/05
+06 RBTX4927-ISA/06
+07 RBTX4927-ISA/07
+08 RBTX4927-ISA/08
+09 RBTX4927-ISA/09
+10 RBTX4927-ISA/10
+11 RBTX4927-ISA/11
+12 RBTX4927-ISA/12 PS2/Mouse (not supported at this time)
+13 RBTX4927-ISA/13
+14 RBTX4927-ISA/14 IDE
+15 RBTX4927-ISA/15
+
+16 TX4927-CP0/00 Software 0
+17 TX4927-CP0/01 Software 1
+18 TX4927-CP0/02 Cascade TX4927-CP0
+19 TX4927-CP0/03 Multiplexed -- do not use
+20 TX4927-CP0/04 Multiplexed -- do not use
+21 TX4927-CP0/05 Multiplexed -- do not use
+22 TX4927-CP0/06 Multiplexed -- do not use
+23 TX4927-CP0/07 CPU TIMER
+
+24 TX4927-PIC/00
+25 TX4927-PIC/01
+26 TX4927-PIC/02
+27 TX4927-PIC/03 Cascade RBTX4927-IOC
+28 TX4927-PIC/04
+29 TX4927-PIC/05 RBTX4927 RTL-8019AS ethernet
+30 TX4927-PIC/06
+31 TX4927-PIC/07
+32 TX4927-PIC/08 TX4927 SerialIO Channel 0
+33 TX4927-PIC/09 TX4927 SerialIO Channel 1
+34 TX4927-PIC/10
+35 TX4927-PIC/11
+36 TX4927-PIC/12
+37 TX4927-PIC/13
+38 TX4927-PIC/14
+39 TX4927-PIC/15
+40 TX4927-PIC/16 TX4927 PCI PCI-C
+41 TX4927-PIC/17
+42 TX4927-PIC/18
+43 TX4927-PIC/19
+44 TX4927-PIC/20
+45 TX4927-PIC/21
+46 TX4927-PIC/22 TX4927 PCI PCI-ERR
+47 TX4927-PIC/23 TX4927 PCI PCI-PMA (not used)
+48 TX4927-PIC/24
+49 TX4927-PIC/25
+50 TX4927-PIC/26
+51 TX4927-PIC/27
+52 TX4927-PIC/28
+53 TX4927-PIC/29
+54 TX4927-PIC/30
+55 TX4927-PIC/31
+
+56 RBTX4927-IOC/00 FPCIB0 PCI-D PJ4/A PJ5/B SB/C PJ6/D PJ7/A (SouthBridge/NotUsed) [RTL-8139=PJ4]
+57 RBTX4927-IOC/01 FPCIB0 PCI-C PJ4/D PJ5/A SB/B PJ6/C PJ7/D (SouthBridge/NotUsed) [RTL-8139=PJ5]
+58 RBTX4927-IOC/02 FPCIB0 PCI-B PJ4/C PJ5/D SB/A PJ6/B PJ7/C (SouthBridge/IDE/pin=1,INTR) [RTL-8139=NotSupported]
+59 RBTX4927-IOC/03 FPCIB0 PCI-A PJ4/B PJ5/C SB/D PJ6/A PJ7/B (SouthBridge/USB/pin=4) [RTL-8139=PJ6]
+60 RBTX4927-IOC/04
+61 RBTX4927-IOC/05
+62 RBTX4927-IOC/06
+63 RBTX4927-IOC/07
+
+NOTES:
+SouthBridge/INTR is mapped to SouthBridge/A=PCI-B/#58
+SouthBridge/ISA/pin=0 no pci irq used by this device
+SouthBridge/IDE/pin=1 no pci irq used by this device, using INTR via ISA IRQ14
+SouthBridge/USB/pin=4 using pci irq SouthBridge/D=PCI-A=#59
+SouthBridge/PMC/pin=0 no pci irq used by this device
+SuperIO/PS2/Keyboard, using INTR via ISA IRQ1
+SuperIO/PS2/Mouse, using INTR via ISA IRQ12 (mouse not currently supported)
+JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthBridge, JP4, JP5, JP6
+*/
+
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <asm/io.h>
+#include <asm/mipsregs.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4927.h>
+
+static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
+static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
+
+#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
+static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
+ .name = TOSHIBA_RBTX4927_IOC_NAME,
+ .ack = toshiba_rbtx4927_irq_ioc_disable,
+ .mask = toshiba_rbtx4927_irq_ioc_disable,
+ .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
+ .unmask = toshiba_rbtx4927_irq_ioc_enable,
+};
+#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
+#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
+
+static int toshiba_rbtx4927_irq_nested(int sw_irq)
+{
+ u8 level3;
+
+ level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
+ if (level3)
+ sw_irq = RBTX4927_IRQ_IOC + fls(level3) - 1;
+ return (sw_irq);
+}
+
+static void __init toshiba_rbtx4927_irq_ioc_init(void)
+{
+ int i;
+
+ for (i = RBTX4927_IRQ_IOC;
+ i < RBTX4927_IRQ_IOC + RBTX4927_NR_IRQ_IOC; i++)
+ set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
+ handle_level_irq);
+ set_irq_chained_handler(RBTX4927_IRQ_IOCINT, handle_simple_irq);
+}
+
+static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
+{
+ unsigned char v;
+
+ v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
+ v |= (1 << (irq - RBTX4927_IRQ_IOC));
+ writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
+}
+
+static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
+{
+ unsigned char v;
+
+ v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
+ v &= ~(1 << (irq - RBTX4927_IRQ_IOC));
+ writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
+ mmiowb();
+}
+
+
+static int rbtx4927_irq_dispatch(int pending)
+{
+ int irq;
+
+ if (pending & STATUSF_IP7) /* cpu timer */
+ irq = MIPS_CPU_IRQ_BASE + 7;
+ else if (pending & STATUSF_IP2) { /* tx4927 pic */
+ irq = txx9_irq();
+ if (irq == RBTX4927_IRQ_IOCINT)
+ irq = toshiba_rbtx4927_irq_nested(irq);
+ } else if (pending & STATUSF_IP0) /* user line 0 */
+ irq = MIPS_CPU_IRQ_BASE + 0;
+ else if (pending & STATUSF_IP1) /* user line 1 */
+ irq = MIPS_CPU_IRQ_BASE + 1;
+ else
+ irq = -1;
+ return irq;
+}
+
+void __init rbtx4927_irq_setup(void)
+{
+ txx9_irq_dispatch = rbtx4927_irq_dispatch;
+ tx4927_irq_init();
+ toshiba_rbtx4927_irq_ioc_init();
+ /* Onboard 10M Ether: High Active */
+ set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
+}
diff --git a/arch/mips/txx9/rbtx4927/prom.c b/arch/mips/txx9/rbtx4927/prom.c
new file mode 100644
index 0000000..942e627
--- /dev/null
+++ b/arch/mips/txx9/rbtx4927/prom.c
@@ -0,0 +1,45 @@
+/*
+ * rbtx4927 specific prom routines
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <asm/bootinfo.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4927.h>
+
+void __init rbtx4927_prom_init(void)
+{
+ extern int tx4927_get_mem_size(void);
+ int msize;
+
+ prom_init_cmdline();
+ msize = tx4927_get_mem_size();
+ add_memory_region(0, msize << 20, BOOT_MEM_RAM);
+}
diff --git a/arch/mips/txx9/rbtx4927/setup.c b/arch/mips/txx9/rbtx4927/setup.c
new file mode 100644
index 0000000..1657fd9
--- /dev/null
+++ b/arch/mips/txx9/rbtx4927/setup.c
@@ -0,0 +1,443 @@
+/*
+ * Toshiba rbtx4927 specific setup
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
+ * Copyright (C) 2000 RidgeRun, Inc.
+ * Author: RidgeRun, Inc.
+ * glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ * Author: jsun@mvista.com or jsun@junsun.net
+ *
+ * Copyright 2002 MontaVista Software Inc.
+ * Author: Michael Pruznick, michael_pruznick@mvista.com
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Author: Manish Lachwani, mlachwani@mvista.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/txx9tmr.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/rbtx4927.h>
+#include <asm/txx9/tx4938.h> /* for TX4937 */
+#ifdef CONFIG_SERIAL_TXX9
+#include <linux/serial_core.h>
+#endif
+
+static int tx4927_ccfg_toeon = 1;
+
+#ifdef CONFIG_PCI
+static void __init tx4927_pci_setup(void)
+{
+ int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB);
+ struct pci_controller *c = &txx9_primary_pcic;
+
+ register_pci_controller(c);
+
+ if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66)
+ txx9_pci_option =
+ (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
+ TXX9_PCI_OPT_CLK_66; /* already configured */
+
+ /* Reset PCI Bus */
+ writeb(1, rbtx4927_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_66)
+ tx4927_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
+ writeb(0, rbtx4927_pcireset_addr);
+ iob();
+
+ tx4927_report_pciclk();
+ tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_AUTO &&
+ txx9_pci66_check(c, 0, 0)) {
+ /* Reset PCI Bus */
+ writeb(1, rbtx4927_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
+ tx4927_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4927_ccfgptr->clkctr, TX4927_CLKCTR_PCIRST);
+ writeb(0, rbtx4927_pcireset_addr);
+ iob();
+ /* Reinitialize PCIC */
+ tx4927_report_pciclk();
+ tx4927_pcic_setup(tx4927_pcicptr, c, extarb);
+ }
+}
+
+static void __init tx4937_pci_setup(void)
+{
+ int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
+ struct pci_controller *c = &txx9_primary_pcic;
+
+ register_pci_controller(c);
+
+ if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
+ txx9_pci_option =
+ (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
+ TXX9_PCI_OPT_CLK_66; /* already configured */
+
+ /* Reset PCI Bus */
+ writeb(1, rbtx4927_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_66)
+ tx4938_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ writeb(0, rbtx4927_pcireset_addr);
+ iob();
+
+ tx4938_report_pciclk();
+ tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_AUTO &&
+ txx9_pci66_check(c, 0, 0)) {
+ /* Reset PCI Bus */
+ writeb(1, rbtx4927_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ tx4938_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ writeb(0, rbtx4927_pcireset_addr);
+ iob();
+ /* Reinitialize PCIC */
+ tx4938_report_pciclk();
+ tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
+ }
+}
+
+static void __init rbtx4927_arch_init(void)
+{
+ tx4927_pci_setup();
+}
+
+static void __init rbtx4937_arch_init(void)
+{
+ tx4937_pci_setup();
+}
+#else
+#define rbtx4927_arch_init NULL
+#define rbtx4937_arch_init NULL
+#endif /* CONFIG_PCI */
+
+static void __noreturn wait_forever(void)
+{
+ while (1)
+ if (cpu_wait)
+ (*cpu_wait)();
+}
+
+static void toshiba_rbtx4927_restart(char *command)
+{
+ printk(KERN_NOTICE "System Rebooting...\n");
+
+ /* enable the s/w reset register */
+ writeb(RBTX4927_SW_RESET_ENABLE_SET, RBTX4927_SW_RESET_ENABLE);
+
+ /* wait for enable to be seen */
+ while ((readb(RBTX4927_SW_RESET_ENABLE) &
+ RBTX4927_SW_RESET_ENABLE_SET) == 0x00);
+
+ /* do a s/w reset */
+ writeb(RBTX4927_SW_RESET_DO_SET, RBTX4927_SW_RESET_DO);
+
+ /* do something passive while waiting for reset */
+ local_irq_disable();
+ wait_forever();
+ /* no return */
+}
+
+static void toshiba_rbtx4927_halt(void)
+{
+ printk(KERN_NOTICE "System Halted\n");
+ local_irq_disable();
+ wait_forever();
+ /* no return */
+}
+
+static void toshiba_rbtx4927_power_off(void)
+{
+ toshiba_rbtx4927_halt();
+ /* no return */
+}
+
+static void __init rbtx4927_mem_setup(void)
+{
+ int i;
+ u32 cp0_config;
+ char *argptr;
+
+ /* f/w leaves this on at startup */
+ clear_c0_status(ST0_ERL);
+
+ /* enable caches -- HCP5 does this, pmon does not */
+ cp0_config = read_c0_config();
+ cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
+ write_c0_config(cp0_config);
+
+ ioport_resource.end = 0xffffffff;
+ iomem_resource.end = 0xffffffff;
+
+ _machine_restart = toshiba_rbtx4927_restart;
+ _machine_halt = toshiba_rbtx4927_halt;
+ pm_power_off = toshiba_rbtx4927_power_off;
+
+ for (i = 0; i < TX4927_NR_TMR; i++)
+ txx9_tmr_init(TX4927_TMR_REG(0) & 0xfffffffffULL);
+
+#ifdef CONFIG_PCI
+ txx9_alloc_pci_controller(&txx9_primary_pcic,
+ RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
+ RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE);
+#else
+ set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
+#endif
+
+ /* CCFG */
+ /* do reset on watchdog */
+ tx4927_ccfg_set(TX4927_CCFG_WR);
+ /* enable Timeout BusError */
+ if (tx4927_ccfg_toeon)
+ tx4927_ccfg_set(TX4927_CCFG_TOE);
+
+#ifdef CONFIG_SERIAL_TXX9
+ {
+ extern int early_serial_txx9_setup(struct uart_port *port);
+ struct uart_port req;
+ for(i = 0; i < 2; i++) {
+ memset(&req, 0, sizeof(req));
+ req.line = i;
+ req.iotype = UPIO_MEM;
+ req.membase = (char *)(0xff1ff300 + i * 0x100);
+ req.mapbase = 0xff1ff300 + i * 0x100;
+ req.irq = TXX9_IRQ_BASE + TX4927_IR_SIO(i);
+ req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
+ req.uartclk = 50000000;
+ early_serial_txx9_setup(&req);
+ }
+ }
+#ifdef CONFIG_SERIAL_TXX9_CONSOLE
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "console=") == NULL) {
+ strcat(argptr, " console=ttyS0,38400");
+ }
+#endif
+#endif
+
+#ifdef CONFIG_ROOT_NFS
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "root=") == NULL) {
+ strcat(argptr, " root=/dev/nfs rw");
+ }
+#endif
+
+#ifdef CONFIG_IP_PNP
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "ip=") == NULL) {
+ strcat(argptr, " ip=any");
+ }
+#endif
+}
+
+static void __init rbtx49x7_common_time_init(void)
+{
+ /* change default value to udelay/mdelay take reasonable time */
+ loops_per_jiffy = txx9_cpu_clock / HZ / 2;
+
+ mips_hpt_frequency = txx9_cpu_clock / 2;
+ if (____raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_TINTDIS)
+ txx9_clockevent_init(TX4927_TMR_REG(0) & 0xfffffffffULL,
+ TXX9_IRQ_BASE + 17,
+ 50000000);
+}
+
+static void __init rbtx4927_time_init(void)
+{
+ /*
+ * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
+ *
+ * For TX4927:
+ * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
+ * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
+ * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
+ * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
+ * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
+ * i.e. S9[3]: ON (83MHz), OFF (100MHz)
+ */
+ switch ((unsigned long)__raw_readq(&tx4927_ccfgptr->ccfg) &
+ TX4927_CCFG_PCIDIVMODE_MASK) {
+ case TX4927_CCFG_PCIDIVMODE_2_5:
+ case TX4927_CCFG_PCIDIVMODE_5:
+ txx9_cpu_clock = 166666666; /* 166MHz */
+ break;
+ default:
+ txx9_cpu_clock = 200000000; /* 200MHz */
+ }
+
+ rbtx49x7_common_time_init();
+}
+
+static void __init rbtx4937_time_init(void)
+{
+ /*
+ * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
+ *
+ * For TX4937:
+ * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
+ * PCIDIVMODE[10] is 0.
+ * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
+ * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
+ * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
+ * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
+ * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
+ * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
+ */
+ switch ((unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg) &
+ TX4938_CCFG_PCIDIVMODE_MASK) {
+ case TX4938_CCFG_PCIDIVMODE_8:
+ case TX4938_CCFG_PCIDIVMODE_4:
+ txx9_cpu_clock = 266666666; /* 266MHz */
+ break;
+ case TX4938_CCFG_PCIDIVMODE_9:
+ case TX4938_CCFG_PCIDIVMODE_4_5:
+ txx9_cpu_clock = 300000000; /* 300MHz */
+ break;
+ default:
+ txx9_cpu_clock = 333333333; /* 333MHz */
+ }
+
+ rbtx49x7_common_time_init();
+}
+
+static int __init toshiba_rbtx4927_rtc_init(void)
+{
+ static struct resource __initdata res = {
+ .start = 0x1c010000,
+ .end = 0x1c010000 + 0x800 - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("rtc-ds1742", -1, &res, 1);
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4927_ne_init(void)
+{
+ static struct resource __initdata res[] = {
+ {
+ .start = RBTX4927_RTL_8019_BASE,
+ .end = RBTX4927_RTL_8019_BASE + 0x20 - 1,
+ .flags = IORESOURCE_IO,
+ }, {
+ .start = RBTX4927_RTL_8019_IRQ,
+ .flags = IORESOURCE_IRQ,
+ }
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("ne", -1,
+ res, ARRAY_SIZE(res));
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+ struct resource res = {
+ .start = base,
+ .end = base + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("txx9wdt", -1, &res, 1);
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4927_wdt_init(void)
+{
+ return txx9_wdt_init(TX4927_TMR_REG(2) & 0xfffffffffULL);
+}
+
+static void __init rbtx4927_device_init(void)
+{
+ toshiba_rbtx4927_rtc_init();
+ rbtx4927_ne_init();
+ rbtx4927_wdt_init();
+}
+
+struct txx9_board_vec rbtx4927_vec __initdata = {
+ .system = "Toshiba RBTX4927",
+ .prom_init = rbtx4927_prom_init,
+ .mem_setup = rbtx4927_mem_setup,
+ .irq_setup = rbtx4927_irq_setup,
+ .time_init = rbtx4927_time_init,
+ .device_init = rbtx4927_device_init,
+ .arch_init = rbtx4927_arch_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = rbtx4927_pci_map_irq,
+#endif
+};
+struct txx9_board_vec rbtx4937_vec __initdata = {
+ .system = "Toshiba RBTX4937",
+ .prom_init = rbtx4927_prom_init,
+ .mem_setup = rbtx4927_mem_setup,
+ .irq_setup = rbtx4927_irq_setup,
+ .time_init = rbtx4937_time_init,
+ .device_init = rbtx4927_device_init,
+ .arch_init = rbtx4937_arch_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = rbtx4927_pci_map_irq,
+#endif
+};
diff --git a/arch/mips/txx9/rbtx4938/Makefile b/arch/mips/txx9/rbtx4938/Makefile
new file mode 100644
index 0000000..9dcc52a
--- /dev/null
+++ b/arch/mips/txx9/rbtx4938/Makefile
@@ -0,0 +1,3 @@
+obj-y += prom.o setup.o irq.o spi_eeprom.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/txx9/rbtx4938/irq.c b/arch/mips/txx9/rbtx4938/irq.c
new file mode 100644
index 0000000..3971a06
--- /dev/null
+++ b/arch/mips/txx9/rbtx4938/irq.c
@@ -0,0 +1,169 @@
+/*
+ * Toshiba RBTX4938 specific interrupt handlers
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+
+/*
+IRQ Device
+
+16 TX4938-CP0/00 Software 0
+17 TX4938-CP0/01 Software 1
+18 TX4938-CP0/02 Cascade TX4938-CP0
+19 TX4938-CP0/03 Multiplexed -- do not use
+20 TX4938-CP0/04 Multiplexed -- do not use
+21 TX4938-CP0/05 Multiplexed -- do not use
+22 TX4938-CP0/06 Multiplexed -- do not use
+23 TX4938-CP0/07 CPU TIMER
+
+24 TX4938-PIC/00
+25 TX4938-PIC/01
+26 TX4938-PIC/02 Cascade RBTX4938-IOC
+27 TX4938-PIC/03 RBTX4938 RTL-8019AS Ethernet
+28 TX4938-PIC/04
+29 TX4938-PIC/05 TX4938 ETH1
+30 TX4938-PIC/06 TX4938 ETH0
+31 TX4938-PIC/07
+32 TX4938-PIC/08 TX4938 SIO 0
+33 TX4938-PIC/09 TX4938 SIO 1
+34 TX4938-PIC/10 TX4938 DMA0
+35 TX4938-PIC/11 TX4938 DMA1
+36 TX4938-PIC/12 TX4938 DMA2
+37 TX4938-PIC/13 TX4938 DMA3
+38 TX4938-PIC/14
+39 TX4938-PIC/15
+40 TX4938-PIC/16 TX4938 PCIC
+41 TX4938-PIC/17 TX4938 TMR0
+42 TX4938-PIC/18 TX4938 TMR1
+43 TX4938-PIC/19 TX4938 TMR2
+44 TX4938-PIC/20
+45 TX4938-PIC/21
+46 TX4938-PIC/22 TX4938 PCIERR
+47 TX4938-PIC/23
+48 TX4938-PIC/24
+49 TX4938-PIC/25
+50 TX4938-PIC/26
+51 TX4938-PIC/27
+52 TX4938-PIC/28
+53 TX4938-PIC/29
+54 TX4938-PIC/30
+55 TX4938-PIC/31 TX4938 SPI
+
+56 RBTX4938-IOC/00 PCI-D
+57 RBTX4938-IOC/01 PCI-C
+58 RBTX4938-IOC/02 PCI-B
+59 RBTX4938-IOC/03 PCI-A
+60 RBTX4938-IOC/04 RTC
+61 RBTX4938-IOC/05 ATA
+62 RBTX4938-IOC/06 MODEM
+63 RBTX4938-IOC/07 SWINT
+*/
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <asm/mipsregs.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4938.h>
+
+static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
+static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
+
+#define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
+static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
+ .name = TOSHIBA_RBTX4938_IOC_NAME,
+ .ack = toshiba_rbtx4938_irq_ioc_disable,
+ .mask = toshiba_rbtx4938_irq_ioc_disable,
+ .mask_ack = toshiba_rbtx4938_irq_ioc_disable,
+ .unmask = toshiba_rbtx4938_irq_ioc_enable,
+};
+
+static int toshiba_rbtx4938_irq_nested(int sw_irq)
+{
+ u8 level3;
+
+ level3 = readb(rbtx4938_imstat_addr);
+ if (level3)
+ /* must use fls so onboard ATA has priority */
+ sw_irq = RBTX4938_IRQ_IOC + fls(level3) - 1;
+ return sw_irq;
+}
+
+/**********************************************************************************/
+/* Functions for ioc */
+/**********************************************************************************/
+static void __init
+toshiba_rbtx4938_irq_ioc_init(void)
+{
+ int i;
+
+ for (i = RBTX4938_IRQ_IOC;
+ i < RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC; i++)
+ set_irq_chip_and_handler(i, &toshiba_rbtx4938_irq_ioc_type,
+ handle_level_irq);
+
+ set_irq_chained_handler(RBTX4938_IRQ_IOCINT, handle_simple_irq);
+}
+
+static void
+toshiba_rbtx4938_irq_ioc_enable(unsigned int irq)
+{
+ unsigned char v;
+
+ v = readb(rbtx4938_imask_addr);
+ v |= (1 << (irq - RBTX4938_IRQ_IOC));
+ writeb(v, rbtx4938_imask_addr);
+ mmiowb();
+}
+
+static void
+toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
+{
+ unsigned char v;
+
+ v = readb(rbtx4938_imask_addr);
+ v &= ~(1 << (irq - RBTX4938_IRQ_IOC));
+ writeb(v, rbtx4938_imask_addr);
+ mmiowb();
+}
+
+static int rbtx4938_irq_dispatch(int pending)
+{
+ int irq;
+
+ if (pending & STATUSF_IP7)
+ irq = MIPS_CPU_IRQ_BASE + 7;
+ else if (pending & STATUSF_IP2) {
+ irq = txx9_irq();
+ if (irq == RBTX4938_IRQ_IOCINT)
+ irq = toshiba_rbtx4938_irq_nested(irq);
+ } else if (pending & STATUSF_IP1)
+ irq = MIPS_CPU_IRQ_BASE + 0;
+ else if (pending & STATUSF_IP0)
+ irq = MIPS_CPU_IRQ_BASE + 1;
+ else
+ irq = -1;
+ return irq;
+}
+
+void __init rbtx4938_irq_setup(void)
+{
+ txx9_irq_dispatch = rbtx4938_irq_dispatch;
+ /* Now, interrupt control disabled, */
+ /* all IRC interrupts are masked, */
+ /* all IRC interrupt mode are Low Active. */
+
+ /* mask all IOC interrupts */
+ writeb(0, rbtx4938_imask_addr);
+
+ /* clear SoftInt interrupts */
+ writeb(0, rbtx4938_softint_addr);
+ tx4938_irq_init();
+ toshiba_rbtx4938_irq_ioc_init();
+ /* Onboard 10M Ether: High Active */
+ set_irq_type(RBTX4938_IRQ_ETHER, IRQF_TRIGGER_HIGH);
+}
diff --git a/arch/mips/txx9/rbtx4938/prom.c b/arch/mips/txx9/rbtx4938/prom.c
new file mode 100644
index 0000000..fbb3745
--- /dev/null
+++ b/arch/mips/txx9/rbtx4938/prom.c
@@ -0,0 +1,29 @@
+/*
+ * rbtx4938 specific prom routines
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <asm/bootinfo.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/rbtx4938.h>
+
+void __init rbtx4938_prom_init(void)
+{
+ extern int tx4938_get_mem_size(void);
+ int msize;
+#ifndef CONFIG_TX4938_NAND_BOOT
+ prom_init_cmdline();
+#endif
+
+ msize = tx4938_get_mem_size();
+ add_memory_region(0, msize << 20, BOOT_MEM_RAM);
+}
diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c
new file mode 100644
index 0000000..aaa987a
--- /dev/null
+++ b/arch/mips/txx9/rbtx4938/setup.c
@@ -0,0 +1,625 @@
+/*
+ * Setup pointers to hardware-dependent routines.
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/console.h>
+#include <linux/pm.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <asm/txx9tmr.h>
+#include <asm/io.h>
+#include <asm/txx9/generic.h>
+#include <asm/txx9/pci.h>
+#include <asm/txx9/rbtx4938.h>
+#ifdef CONFIG_SERIAL_TXX9
+#include <linux/serial_core.h>
+#endif
+#include <linux/spi/spi.h>
+#include <asm/txx9/spi.h>
+#include <asm/txx9pio.h>
+
+static int tx4938_ccfg_toeon = 1;
+
+static void rbtx4938_machine_halt(void)
+{
+ printk(KERN_NOTICE "System Halted\n");
+ local_irq_disable();
+
+ while (1)
+ __asm__(".set\tmips3\n\t"
+ "wait\n\t"
+ ".set\tmips0");
+}
+
+static void rbtx4938_machine_power_off(void)
+{
+ rbtx4938_machine_halt();
+ /* no return */
+}
+
+static void rbtx4938_machine_restart(char *command)
+{
+ local_irq_disable();
+
+ printk("Rebooting...");
+ writeb(1, rbtx4938_softresetlock_addr);
+ writeb(1, rbtx4938_sfvol_addr);
+ writeb(1, rbtx4938_softreset_addr);
+ while(1)
+ ;
+}
+
+static void __init rbtx4938_pci_setup(void)
+{
+#ifdef CONFIG_PCI
+ int extarb = !(__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB);
+ struct pci_controller *c = &txx9_primary_pcic;
+
+ register_pci_controller(c);
+
+ if (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66)
+ txx9_pci_option =
+ (txx9_pci_option & ~TXX9_PCI_OPT_CLK_MASK) |
+ TXX9_PCI_OPT_CLK_66; /* already configured */
+
+ /* Reset PCI Bus */
+ writeb(0, rbtx4938_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_66)
+ tx4938_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ writeb(1, rbtx4938_pcireset_addr);
+ iob();
+
+ tx4938_report_pciclk();
+ tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
+ if ((txx9_pci_option & TXX9_PCI_OPT_CLK_MASK) ==
+ TXX9_PCI_OPT_CLK_AUTO &&
+ txx9_pci66_check(c, 0, 0)) {
+ /* Reset PCI Bus */
+ writeb(0, rbtx4938_pcireset_addr);
+ /* Reset PCIC */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ tx4938_pciclk66_setup();
+ mdelay(10);
+ /* clear PCIC reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIRST);
+ writeb(1, rbtx4938_pcireset_addr);
+ iob();
+ /* Reinitialize PCIC */
+ tx4938_report_pciclk();
+ tx4927_pcic_setup(tx4938_pcicptr, c, extarb);
+ }
+
+ if (__raw_readq(&tx4938_ccfgptr->pcfg) &
+ (TX4938_PCFG_ETH0_SEL|TX4938_PCFG_ETH1_SEL)) {
+ /* Reset PCIC1 */
+ txx9_set64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
+ /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */
+ if (!(__raw_readq(&tx4938_ccfgptr->ccfg)
+ & TX4938_CCFG_PCI1DMD))
+ tx4938_ccfg_set(TX4938_CCFG_PCI1_66);
+ mdelay(10);
+ /* clear PCIC1 reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
+ tx4938_report_pci1clk();
+
+ /* mem:64K(max), io:64K(max) (enough for ETH0,ETH1) */
+ c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000);
+ register_pci_controller(c);
+ tx4927_pcic_setup(tx4938_pcic1ptr, c, 0);
+ }
+#endif /* CONFIG_PCI */
+}
+
+/* SPI support */
+
+/* chip select for SPI devices */
+#define SEEPROM1_CS 7 /* PIO7 */
+#define SEEPROM2_CS 0 /* IOC */
+#define SEEPROM3_CS 1 /* IOC */
+#define SRTC_CS 2 /* IOC */
+
+static int __init rbtx4938_ethaddr_init(void)
+{
+#ifdef CONFIG_PCI
+ unsigned char dat[17];
+ unsigned char sum;
+ int i;
+
+ /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */
+ if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) {
+ printk(KERN_ERR "seeprom: read error.\n");
+ return -ENODEV;
+ } else {
+ if (strcmp(dat, "MAC") != 0)
+ printk(KERN_WARNING "seeprom: bad signature.\n");
+ for (i = 0, sum = 0; i < sizeof(dat); i++)
+ sum += dat[i];
+ if (sum)
+ printk(KERN_WARNING "seeprom: bad checksum.\n");
+ }
+ for (i = 0; i < 2; i++) {
+ unsigned int id =
+ TXX9_IRQ_BASE + (i ? TX4938_IR_ETH1 : TX4938_IR_ETH0);
+ struct platform_device *pdev;
+ if (!(__raw_readq(&tx4938_ccfgptr->pcfg) &
+ (i ? TX4938_PCFG_ETH1_SEL : TX4938_PCFG_ETH0_SEL)))
+ continue;
+ pdev = platform_device_alloc("tc35815-mac", id);
+ if (!pdev ||
+ platform_device_add_data(pdev, &dat[4 + 6 * i], 6) ||
+ platform_device_add(pdev))
+ platform_device_put(pdev);
+ }
+#endif /* CONFIG_PCI */
+ return 0;
+}
+
+static void __init rbtx4938_spi_setup(void)
+{
+ /* set SPI_SEL */
+ txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_SPI_SEL);
+}
+
+static struct resource rbtx4938_fpga_resource;
+static struct resource tx4938_sdram_resource[4];
+static struct resource tx4938_sram_resource;
+
+void __init tx4938_board_setup(void)
+{
+ int i;
+ unsigned long divmode;
+ int cpuclk = 0;
+ unsigned long pcode = TX4938_REV_PCODE();
+
+ ioport_resource.start = 0;
+ ioport_resource.end = 0xffffffff;
+ iomem_resource.start = 0;
+ iomem_resource.end = 0xffffffff; /* expand to 4GB */
+
+ txx9_reg_res_init(pcode, TX4938_REG_BASE,
+ TX4938_REG_SIZE);
+ /* SDRAMC,EBUSC are configured by PROM */
+ for (i = 0; i < 8; i++) {
+ if (!(TX4938_EBUSC_CR(i) & 0x8))
+ continue; /* disabled */
+ txx9_ce_res[i].start = (unsigned long)TX4938_EBUSC_BA(i);
+ txx9_ce_res[i].end =
+ txx9_ce_res[i].start + TX4938_EBUSC_SIZE(i) - 1;
+ request_resource(&iomem_resource, &txx9_ce_res[i]);
+ }
+
+ /* clocks */
+ if (txx9_master_clock) {
+ u64 ccfg = ____raw_readq(&tx4938_ccfgptr->ccfg);
+ /* calculate gbus_clock and cpu_clock_freq from master_clock */
+ divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK;
+ switch (divmode) {
+ case TX4938_CCFG_DIVMODE_8:
+ case TX4938_CCFG_DIVMODE_10:
+ case TX4938_CCFG_DIVMODE_12:
+ case TX4938_CCFG_DIVMODE_16:
+ case TX4938_CCFG_DIVMODE_18:
+ txx9_gbus_clock = txx9_master_clock * 4; break;
+ default:
+ txx9_gbus_clock = txx9_master_clock;
+ }
+ switch (divmode) {
+ case TX4938_CCFG_DIVMODE_2:
+ case TX4938_CCFG_DIVMODE_8:
+ cpuclk = txx9_gbus_clock * 2; break;
+ case TX4938_CCFG_DIVMODE_2_5:
+ case TX4938_CCFG_DIVMODE_10:
+ cpuclk = txx9_gbus_clock * 5 / 2; break;
+ case TX4938_CCFG_DIVMODE_3:
+ case TX4938_CCFG_DIVMODE_12:
+ cpuclk = txx9_gbus_clock * 3; break;
+ case TX4938_CCFG_DIVMODE_4:
+ case TX4938_CCFG_DIVMODE_16:
+ cpuclk = txx9_gbus_clock * 4; break;
+ case TX4938_CCFG_DIVMODE_4_5:
+ case TX4938_CCFG_DIVMODE_18:
+ cpuclk = txx9_gbus_clock * 9 / 2; break;
+ }
+ txx9_cpu_clock = cpuclk;
+ } else {
+ u64 ccfg = ____raw_readq(&tx4938_ccfgptr->ccfg);
+ if (txx9_cpu_clock == 0) {
+ txx9_cpu_clock = 300000000; /* 300MHz */
+ }
+ /* calculate gbus_clock and master_clock from cpu_clock_freq */
+ cpuclk = txx9_cpu_clock;
+ divmode = (__u32)ccfg & TX4938_CCFG_DIVMODE_MASK;
+ switch (divmode) {
+ case TX4938_CCFG_DIVMODE_2:
+ case TX4938_CCFG_DIVMODE_8:
+ txx9_gbus_clock = cpuclk / 2; break;
+ case TX4938_CCFG_DIVMODE_2_5:
+ case TX4938_CCFG_DIVMODE_10:
+ txx9_gbus_clock = cpuclk * 2 / 5; break;
+ case TX4938_CCFG_DIVMODE_3:
+ case TX4938_CCFG_DIVMODE_12:
+ txx9_gbus_clock = cpuclk / 3; break;
+ case TX4938_CCFG_DIVMODE_4:
+ case TX4938_CCFG_DIVMODE_16:
+ txx9_gbus_clock = cpuclk / 4; break;
+ case TX4938_CCFG_DIVMODE_4_5:
+ case TX4938_CCFG_DIVMODE_18:
+ txx9_gbus_clock = cpuclk * 2 / 9; break;
+ }
+ switch (divmode) {
+ case TX4938_CCFG_DIVMODE_8:
+ case TX4938_CCFG_DIVMODE_10:
+ case TX4938_CCFG_DIVMODE_12:
+ case TX4938_CCFG_DIVMODE_16:
+ case TX4938_CCFG_DIVMODE_18:
+ txx9_master_clock = txx9_gbus_clock / 4; break;
+ default:
+ txx9_master_clock = txx9_gbus_clock;
+ }
+ }
+ /* change default value to udelay/mdelay take reasonable time */
+ loops_per_jiffy = txx9_cpu_clock / HZ / 2;
+
+ /* CCFG */
+ /* clear WatchDogReset,BusErrorOnWrite flag (W1C) */
+ tx4938_ccfg_set(TX4938_CCFG_WDRST | TX4938_CCFG_BEOW);
+ /* do reset on watchdog */
+ tx4938_ccfg_set(TX4938_CCFG_WR);
+ /* clear PCIC1 reset */
+ txx9_clear64(&tx4938_ccfgptr->clkctr, TX4938_CLKCTR_PCIC1RST);
+
+ /* enable Timeout BusError */
+ if (tx4938_ccfg_toeon)
+ tx4938_ccfg_set(TX4938_CCFG_TOE);
+
+ /* DMA selection */
+ txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_DMASEL_ALL);
+
+ /* Use external clock for external arbiter */
+ if (!(____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCIARB))
+ txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_PCICLKEN_ALL);
+
+ printk(KERN_INFO "%s -- %dMHz(M%dMHz) CRIR:%08x CCFG:%llx PCFG:%llx\n",
+ txx9_pcode_str,
+ (cpuclk + 500000) / 1000000,
+ (txx9_master_clock + 500000) / 1000000,
+ (__u32)____raw_readq(&tx4938_ccfgptr->crir),
+ (unsigned long long)____raw_readq(&tx4938_ccfgptr->ccfg),
+ (unsigned long long)____raw_readq(&tx4938_ccfgptr->pcfg));
+
+ printk(KERN_INFO "%s SDRAMC --", txx9_pcode_str);
+ for (i = 0; i < 4; i++) {
+ unsigned long long cr = tx4938_sdramcptr->cr[i];
+ unsigned long ram_base, ram_size;
+ if (!((unsigned long)cr & 0x00000400))
+ continue; /* disabled */
+ ram_base = (unsigned long)(cr >> 49) << 21;
+ ram_size = ((unsigned long)(cr >> 33) + 1) << 21;
+ if (ram_base >= 0x20000000)
+ continue; /* high memory (ignore) */
+ printk(" CR%d:%016Lx", i, cr);
+ tx4938_sdram_resource[i].name = "SDRAM";
+ tx4938_sdram_resource[i].start = ram_base;
+ tx4938_sdram_resource[i].end = ram_base + ram_size - 1;
+ tx4938_sdram_resource[i].flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, &tx4938_sdram_resource[i]);
+ }
+ printk(" TR:%09Lx\n", tx4938_sdramcptr->tr);
+
+ /* SRAM */
+ if (tx4938_sramcptr->cr & 1) {
+ unsigned int size = 0x800;
+ unsigned long base =
+ (tx4938_sramcptr->cr >> (39-11)) & ~(size - 1);
+ tx4938_sram_resource.name = "SRAM";
+ tx4938_sram_resource.start = base;
+ tx4938_sram_resource.end = base + size - 1;
+ tx4938_sram_resource.flags = IORESOURCE_MEM;
+ request_resource(&iomem_resource, &tx4938_sram_resource);
+ }
+
+ /* TMR */
+ for (i = 0; i < TX4938_NR_TMR; i++)
+ txx9_tmr_init(TX4938_TMR_REG(i) & 0xfffffffffULL);
+
+ /* enable DMA */
+ for (i = 0; i < 2; i++)
+ ____raw_writeq(TX4938_DMA_MCR_MSTEN,
+ (void __iomem *)(TX4938_DMA_REG(i) + 0x50));
+
+ /* PIO */
+ __raw_writel(0, &tx4938_pioptr->maskcpu);
+ __raw_writel(0, &tx4938_pioptr->maskext);
+
+#ifdef CONFIG_PCI
+ txx9_alloc_pci_controller(&txx9_primary_pcic, 0, 0, 0, 0);
+#endif
+}
+
+static void __init rbtx4938_time_init(void)
+{
+ mips_hpt_frequency = txx9_cpu_clock / 2;
+ if (____raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_TINTDIS)
+ txx9_clockevent_init(TX4938_TMR_REG(0) & 0xfffffffffULL,
+ TXX9_IRQ_BASE + TX4938_IR_TMR(0),
+ txx9_gbus_clock / 2);
+}
+
+static void __init rbtx4938_mem_setup(void)
+{
+ unsigned long long pcfg;
+ char *argptr;
+
+ iomem_resource.end = 0xffffffff; /* 4GB */
+
+ if (txx9_master_clock == 0)
+ txx9_master_clock = 25000000; /* 25MHz */
+ tx4938_board_setup();
+#ifndef CONFIG_PCI
+ set_io_port_base(RBTX4938_ETHER_BASE);
+#endif
+
+#ifdef CONFIG_SERIAL_TXX9
+ {
+ extern int early_serial_txx9_setup(struct uart_port *port);
+ int i;
+ struct uart_port req;
+ for(i = 0; i < 2; i++) {
+ memset(&req, 0, sizeof(req));
+ req.line = i;
+ req.iotype = UPIO_MEM;
+ req.membase = (char *)(0xff1ff300 + i * 0x100);
+ req.mapbase = 0xff1ff300 + i * 0x100;
+ req.irq = RBTX4938_IRQ_IRC_SIO(i);
+ req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
+ req.uartclk = 50000000;
+ early_serial_txx9_setup(&req);
+ }
+ }
+#ifdef CONFIG_SERIAL_TXX9_CONSOLE
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "console=") == NULL) {
+ strcat(argptr, " console=ttyS0,38400");
+ }
+#endif
+#endif
+
+#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61
+ printk("PIOSEL: disabling both ata and nand selection\n");
+ local_irq_disable();
+ txx9_clear64(&tx4938_ccfgptr->pcfg,
+ TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL);
+#endif
+
+#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND
+ printk("PIOSEL: enabling nand selection\n");
+ txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
+ txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
+#endif
+
+#ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA
+ printk("PIOSEL: enabling ata selection\n");
+ txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL);
+ txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL);
+#endif
+
+#ifdef CONFIG_IP_PNP
+ argptr = prom_getcmdline();
+ if (strstr(argptr, "ip=") == NULL) {
+ strcat(argptr, " ip=any");
+ }
+#endif
+
+
+#ifdef CONFIG_FB
+ {
+ conswitchp = &dummy_con;
+ }
+#endif
+
+ rbtx4938_spi_setup();
+ pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */
+ /* fixup piosel */
+ if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
+ TX4938_PCFG_ATA_SEL)
+ writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x04,
+ rbtx4938_piosel_addr);
+ else if ((pcfg & (TX4938_PCFG_ATA_SEL | TX4938_PCFG_NDF_SEL)) ==
+ TX4938_PCFG_NDF_SEL)
+ writeb((readb(rbtx4938_piosel_addr) & 0x03) | 0x08,
+ rbtx4938_piosel_addr);
+ else
+ writeb(readb(rbtx4938_piosel_addr) & ~(0x08 | 0x04),
+ rbtx4938_piosel_addr);
+
+ rbtx4938_fpga_resource.name = "FPGA Registers";
+ rbtx4938_fpga_resource.start = CPHYSADDR(RBTX4938_FPGA_REG_ADDR);
+ rbtx4938_fpga_resource.end = CPHYSADDR(RBTX4938_FPGA_REG_ADDR) + 0xffff;
+ rbtx4938_fpga_resource.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
+ if (request_resource(&iomem_resource, &rbtx4938_fpga_resource))
+ printk("request resource for fpga failed\n");
+
+ _machine_restart = rbtx4938_machine_restart;
+ _machine_halt = rbtx4938_machine_halt;
+ pm_power_off = rbtx4938_machine_power_off;
+
+ writeb(0xff, rbtx4938_led_addr);
+ printk(KERN_INFO "RBTX4938 --- FPGA(Rev %02x) DIPSW:%02x,%02x\n",
+ readb(rbtx4938_fpga_rev_addr),
+ readb(rbtx4938_dipsw_addr), readb(rbtx4938_bdipsw_addr));
+}
+
+static int __init rbtx4938_ne_init(void)
+{
+ struct resource res[] = {
+ {
+ .start = RBTX4938_RTL_8019_BASE,
+ .end = RBTX4938_RTL_8019_BASE + 0x20 - 1,
+ .flags = IORESOURCE_IO,
+ }, {
+ .start = RBTX4938_RTL_8019_IRQ,
+ .flags = IORESOURCE_IRQ,
+ }
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("ne", -1,
+ res, ARRAY_SIZE(res));
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+/* GPIO support */
+
+int gpio_to_irq(unsigned gpio)
+{
+ return -EINVAL;
+}
+
+int irq_to_gpio(unsigned irq)
+{
+ return -EINVAL;
+}
+
+static DEFINE_SPINLOCK(rbtx4938_spi_gpio_lock);
+
+static void rbtx4938_spi_gpio_set(struct gpio_chip *chip, unsigned int offset,
+ int value)
+{
+ u8 val;
+ unsigned long flags;
+ spin_lock_irqsave(&rbtx4938_spi_gpio_lock, flags);
+ val = readb(rbtx4938_spics_addr);
+ if (value)
+ val |= 1 << offset;
+ else
+ val &= ~(1 << offset);
+ writeb(val, rbtx4938_spics_addr);
+ mmiowb();
+ spin_unlock_irqrestore(&rbtx4938_spi_gpio_lock, flags);
+}
+
+static int rbtx4938_spi_gpio_dir_out(struct gpio_chip *chip,
+ unsigned int offset, int value)
+{
+ rbtx4938_spi_gpio_set(chip, offset, value);
+ return 0;
+}
+
+static struct gpio_chip rbtx4938_spi_gpio_chip = {
+ .set = rbtx4938_spi_gpio_set,
+ .direction_output = rbtx4938_spi_gpio_dir_out,
+ .label = "RBTX4938-SPICS",
+ .base = 16,
+ .ngpio = 3,
+};
+
+/* SPI support */
+
+static void __init txx9_spi_init(unsigned long base, int irq)
+{
+ struct resource res[] = {
+ {
+ .start = base,
+ .end = base + 0x20 - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = irq,
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+ platform_device_register_simple("spi_txx9", 0,
+ res, ARRAY_SIZE(res));
+}
+
+static int __init rbtx4938_spi_init(void)
+{
+ struct spi_board_info srtc_info = {
+ .modalias = "rtc-rs5c348",
+ .max_speed_hz = 1000000, /* 1.0Mbps @ Vdd 2.0V */
+ .bus_num = 0,
+ .chip_select = 16 + SRTC_CS,
+ /* Mode 1 (High-Active, Shift-Then-Sample), High Avtive CS */
+ .mode = SPI_MODE_1 | SPI_CS_HIGH,
+ };
+ spi_register_board_info(&srtc_info, 1);
+ spi_eeprom_register(SEEPROM1_CS);
+ spi_eeprom_register(16 + SEEPROM2_CS);
+ spi_eeprom_register(16 + SEEPROM3_CS);
+ gpio_request(16 + SRTC_CS, "rtc-rs5c348");
+ gpio_direction_output(16 + SRTC_CS, 0);
+ gpio_request(SEEPROM1_CS, "seeprom1");
+ gpio_direction_output(SEEPROM1_CS, 1);
+ gpio_request(16 + SEEPROM2_CS, "seeprom2");
+ gpio_direction_output(16 + SEEPROM2_CS, 1);
+ gpio_request(16 + SEEPROM3_CS, "seeprom3");
+ gpio_direction_output(16 + SEEPROM3_CS, 1);
+ txx9_spi_init(TX4938_SPI_REG & 0xfffffffffULL, RBTX4938_IRQ_IRC_SPI);
+ return 0;
+}
+
+static void __init rbtx4938_arch_init(void)
+{
+ txx9_gpio_init(TX4938_PIO_REG & 0xfffffffffULL, 0, 16);
+ gpiochip_add(&rbtx4938_spi_gpio_chip);
+ rbtx4938_pci_setup();
+ rbtx4938_spi_init();
+}
+
+/* Watchdog support */
+
+static int __init txx9_wdt_init(unsigned long base)
+{
+ struct resource res = {
+ .start = base,
+ .end = base + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ };
+ struct platform_device *dev =
+ platform_device_register_simple("txx9wdt", -1, &res, 1);
+ return IS_ERR(dev) ? PTR_ERR(dev) : 0;
+}
+
+static int __init rbtx4938_wdt_init(void)
+{
+ return txx9_wdt_init(TX4938_TMR_REG(2) & 0xfffffffffULL);
+}
+
+static void __init rbtx4938_device_init(void)
+{
+ rbtx4938_ethaddr_init();
+ rbtx4938_ne_init();
+ rbtx4938_wdt_init();
+}
+
+struct txx9_board_vec rbtx4938_vec __initdata = {
+ .system = "Toshiba RBTX4938",
+ .prom_init = rbtx4938_prom_init,
+ .mem_setup = rbtx4938_mem_setup,
+ .irq_setup = rbtx4938_irq_setup,
+ .time_init = rbtx4938_time_init,
+ .device_init = rbtx4938_device_init,
+ .arch_init = rbtx4938_arch_init,
+#ifdef CONFIG_PCI
+ .pci_map_irq = rbtx4938_pci_map_irq,
+#endif
+};
diff --git a/arch/mips/txx9/rbtx4938/spi_eeprom.c b/arch/mips/txx9/rbtx4938/spi_eeprom.c
new file mode 100644
index 0000000..a7ea8b0
--- /dev/null
+++ b/arch/mips/txx9/rbtx4938/spi_eeprom.c
@@ -0,0 +1,99 @@
+/*
+ * spi_eeprom.c
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/eeprom.h>
+#include <asm/txx9/spi.h>
+
+#define AT250X0_PAGE_SIZE 8
+
+/* register board information for at25 driver */
+int __init spi_eeprom_register(int chipid)
+{
+ static struct spi_eeprom eeprom = {
+ .name = "at250x0",
+ .byte_len = 128,
+ .page_size = AT250X0_PAGE_SIZE,
+ .flags = EE_ADDR1,
+ };
+ struct spi_board_info info = {
+ .modalias = "at25",
+ .max_speed_hz = 1500000, /* 1.5Mbps */
+ .bus_num = 0,
+ .chip_select = chipid,
+ .platform_data = &eeprom,
+ /* Mode 0: High-Active, Sample-Then-Shift */
+ };
+
+ return spi_register_board_info(&info, 1);
+}
+
+/* simple temporary spi driver to provide early access to seeprom. */
+
+static struct read_param {
+ int chipid;
+ int address;
+ unsigned char *buf;
+ int len;
+} *read_param;
+
+static int __init early_seeprom_probe(struct spi_device *spi)
+{
+ int stat = 0;
+ u8 cmd[2];
+ int len = read_param->len;
+ char *buf = read_param->buf;
+ int address = read_param->address;
+
+ dev_info(&spi->dev, "spiclk %u KHz.\n",
+ (spi->max_speed_hz + 500) / 1000);
+ if (read_param->chipid != spi->chip_select)
+ return -ENODEV;
+ while (len > 0) {
+ /* spi_write_then_read can only work with small chunk */
+ int c = len < AT250X0_PAGE_SIZE ? len : AT250X0_PAGE_SIZE;
+ cmd[0] = 0x03; /* AT25_READ */
+ cmd[1] = address;
+ stat = spi_write_then_read(spi, cmd, sizeof(cmd), buf, c);
+ buf += c;
+ len -= c;
+ address += c;
+ }
+ return stat;
+}
+
+static struct spi_driver early_seeprom_driver __initdata = {
+ .driver = {
+ .name = "at25",
+ .owner = THIS_MODULE,
+ },
+ .probe = early_seeprom_probe,
+};
+
+int __init spi_eeprom_read(int chipid, int address,
+ unsigned char *buf, int len)
+{
+ int ret;
+ struct read_param param = {
+ .chipid = chipid,
+ .address = address,
+ .buf = buf,
+ .len = len
+ };
+
+ read_param = ¶m;
+ ret = spi_register_driver(&early_seeprom_driver);
+ if (!ret)
+ spi_unregister_driver(&early_seeprom_driver);
+ return ret;
+}
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index 559acc0..c1be6b3 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -23,16 +23,6 @@
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_LITTLE_ENDIAN
-config NEC_CMBVR4133
- bool "NEC CMB-VR4133"
- select CEVT_R4K
- select CSRC_R4K
- select DMA_NONCOHERENT
- select IRQ_CPU
- select HW_HAS_PCI
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_LITTLE_ENDIAN
-
config TANBAC_TB022X
bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
select CEVT_R4K
@@ -73,13 +63,6 @@
endchoice
-config ROCKHOPPER
- bool "Support for Rockhopper base board"
- depends on NEC_CMBVR4133
- select PCI_VR41XX
- select I8259
- select HAVE_STD_PC_SERIAL_PORT
-
choice
prompt "Base board type"
depends on TANBAC_TB022X
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/Makefile b/arch/mips/vr41xx/nec-cmbvr4133/Makefile
deleted file mode 100644
index 5835cae..0000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# Makefile for the NEC-CMBVR4133
-#
-
-obj-y := init.o setup.o
-
-obj-$(CONFIG_PCI) += m1535plus.o
-obj-$(CONFIG_ROCKHOPPER) += irq.o
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/init.c b/arch/mips/vr41xx/nec-cmbvr4133/init.c
deleted file mode 100644
index 7c5e18e..0000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/init.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * arch/mips/vr41xx/nec-cmbvr4133/init.c
- *
- * PROM library initialisation code for NEC CMB-VR4133 board.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Jun Sun <jsun@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for NEC-CMBVR4133 in 2.6
- * Manish Lachwani (mlachwani@mvista.com)
- */
-
-#ifdef CONFIG_ROCKHOPPER
-#include <asm/io.h>
-#include <linux/pci.h>
-
-#define PCICONFDREG 0xaf000c14
-#define PCICONFAREG 0xaf000c18
-
-void disable_pcnet(void)
-{
- u32 data;
-
- /*
- * Workaround for the bug in PMON on VR4133. PMON leaves
- * AMD PCNet controller (on Rockhopper) initialized and running in
- * bus master mode. We have do disable it before doing any
- * further initialization. Or we get problems with PCI bus 2
- * and random lockups and crashes.
- */
-
- writel((2 << 16) |
- (PCI_DEVFN(1, 0) << 8) |
- (0 & 0xfc) |
- 1UL,
- PCICONFAREG);
-
- data = readl(PCICONFDREG);
-
- writel((2 << 16) |
- (PCI_DEVFN(1, 0) << 8) |
- (4 & 0xfc) |
- 1UL,
- PCICONFAREG);
-
- data = readl(PCICONFDREG);
-
- writel((2 << 16) |
- (PCI_DEVFN(1, 0) << 8) |
- (4 & 0xfc) |
- 1UL,
- PCICONFAREG);
-
- data &= ~4;
-
- writel(data, PCICONFDREG);
-}
-#endif
-
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c
deleted file mode 100644
index 7d2d076..0000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * arch/mips/vr41xx/nec-cmbvr4133/irq.c
- *
- * Interrupt routines for the NEC CMB-VR4133 board.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for NEC-CMBVR4133 in 2.6
- * Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/bitops.h>
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-
-#include <asm/io.h>
-#include <asm/i8259.h>
-#include <asm/vr41xx/cmbvr4133.h>
-
-extern int vr4133_rockhopper;
-
-static int i8259_get_irq_number(int irq)
-{
- return i8259_irq();
-}
-
-void __init rockhopper_init_irq(void)
-{
- int i;
-
- if(!vr4133_rockhopper) {
- printk(KERN_ERR "Not a Rockhopper Board \n");
- return;
- }
-
- vr41xx_set_irq_trigger(CMBVR41XX_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH);
- vr41xx_set_irq_level(CMBVR41XX_INTC_PIN, LEVEL_HIGH);
- vr41xx_cascade_irq(CMBVR41XX_INTC_IRQ, i8259_get_irq_number);
-}
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c b/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
deleted file mode 100644
index 1341f328..0000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
+++ /dev/null
@@ -1,249 +0,0 @@
-/*
- * arch/mips/vr41xx/nec-cmbvr4133/m1535plus.c
- *
- * Initialize for ALi M1535+(included M5229 and M5237).
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for NEC-CMBVR4133 in 2.6
- * Author: Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/serial.h>
-
-#include <asm/vr41xx/cmbvr4133.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-
-#define CONFIG_PORT(port) ((port) ? 0x3f0 : 0x370)
-#define DATA_PORT(port) ((port) ? 0x3f1 : 0x371)
-#define INDEX_PORT(port) CONFIG_PORT(port)
-
-#define ENTER_CONFIG_MODE(port) \
- do { \
- outb_p(0x51, CONFIG_PORT(port)); \
- outb_p(0x23, CONFIG_PORT(port)); \
- } while(0)
-
-#define SELECT_LOGICAL_DEVICE(port, dev_no) \
- do { \
- outb_p(0x07, INDEX_PORT(port)); \
- outb_p((dev_no), DATA_PORT(port)); \
- } while(0)
-
-#define WRITE_CONFIG_DATA(port, index, data) \
- do { \
- outb_p((index), INDEX_PORT(port)); \
- outb_p((data), DATA_PORT(port)); \
- } while(0)
-
-#define EXIT_CONFIG_MODE(port) outb(0xbb, CONFIG_PORT(port))
-
-#define PCI_CONFIG_ADDR KSEG1ADDR(0x0f000c18)
-#define PCI_CONFIG_DATA KSEG1ADDR(0x0f000c14)
-
-#ifdef CONFIG_BLK_DEV_FD
-
-void __devinit ali_m1535plus_fdc_init(int port)
-{
- ENTER_CONFIG_MODE(port);
- SELECT_LOGICAL_DEVICE(port, 0); /* FDC */
- WRITE_CONFIG_DATA(port, 0x30, 0x01); /* FDC: enable */
- WRITE_CONFIG_DATA(port, 0x60, 0x03); /* I/O port base: 0x3f0 */
- WRITE_CONFIG_DATA(port, 0x61, 0xf0);
- WRITE_CONFIG_DATA(port, 0x70, 0x06); /* IRQ: 6 */
- WRITE_CONFIG_DATA(port, 0x74, 0x02); /* DMA: channel 2 */
- WRITE_CONFIG_DATA(port, 0xf0, 0x08);
- WRITE_CONFIG_DATA(port, 0xf1, 0x00);
- WRITE_CONFIG_DATA(port, 0xf2, 0xff);
- WRITE_CONFIG_DATA(port, 0xf4, 0x00);
- EXIT_CONFIG_MODE(port);
-}
-
-#endif
-
-void __devinit ali_m1535plus_parport_init(int port)
-{
- ENTER_CONFIG_MODE(port);
- SELECT_LOGICAL_DEVICE(port, 3); /* Parallel Port */
- WRITE_CONFIG_DATA(port, 0x30, 0x01);
- WRITE_CONFIG_DATA(port, 0x60, 0x03); /* I/O port base: 0x378 */
- WRITE_CONFIG_DATA(port, 0x61, 0x78);
- WRITE_CONFIG_DATA(port, 0x70, 0x07); /* IRQ: 7 */
- WRITE_CONFIG_DATA(port, 0x74, 0x04); /* DMA: None */
- WRITE_CONFIG_DATA(port, 0xf0, 0x8c); /* IRQ polarity: Active Low */
- WRITE_CONFIG_DATA(port, 0xf1, 0xc5);
- EXIT_CONFIG_MODE(port);
-}
-
-void __devinit ali_m1535plus_keyboard_init(int port)
-{
- ENTER_CONFIG_MODE(port);
- SELECT_LOGICAL_DEVICE(port, 7); /* KEYBOARD */
- WRITE_CONFIG_DATA(port, 0x30, 0x01); /* KEYBOARD: eable */
- WRITE_CONFIG_DATA(port, 0x70, 0x01); /* IRQ: 1 */
- WRITE_CONFIG_DATA(port, 0x72, 0x0c); /* PS/2 Mouse IRQ: 12 */
- WRITE_CONFIG_DATA(port, 0xf0, 0x00);
- EXIT_CONFIG_MODE(port);
-}
-
-void __devinit ali_m1535plus_hotkey_init(int port)
-{
- ENTER_CONFIG_MODE(port);
- SELECT_LOGICAL_DEVICE(port, 0xc); /* HOTKEY */
- WRITE_CONFIG_DATA(port, 0x30, 0x00);
- WRITE_CONFIG_DATA(port, 0xf0, 0x35);
- WRITE_CONFIG_DATA(port, 0xf1, 0x14);
- WRITE_CONFIG_DATA(port, 0xf2, 0x11);
- WRITE_CONFIG_DATA(port, 0xf3, 0x71);
- WRITE_CONFIG_DATA(port, 0xf5, 0x05);
- EXIT_CONFIG_MODE(port);
-}
-
-void ali_m1535plus_init(struct pci_dev *dev)
-{
- pci_write_config_byte(dev, 0x40, 0x18); /* PCI Interface Control */
- pci_write_config_byte(dev, 0x41, 0xc0); /* PS2 keyb & mouse enable */
- pci_write_config_byte(dev, 0x42, 0x41); /* ISA bus cycle control */
- pci_write_config_byte(dev, 0x43, 0x00); /* ISA bus cycle control 2 */
- pci_write_config_byte(dev, 0x44, 0x5d); /* IDE enable & IRQ 14 */
- pci_write_config_byte(dev, 0x45, 0x0b); /* PCI int polling mode */
- pci_write_config_byte(dev, 0x47, 0x00); /* BIOS chip select control */
-
- /* IRQ routing */
- pci_write_config_byte(dev, 0x48, 0x03); /* INTA IRQ10, INTB disable */
- pci_write_config_byte(dev, 0x49, 0x00); /* INTC and INTD disable */
- pci_write_config_byte(dev, 0x4a, 0x00); /* INTE and INTF disable */
- pci_write_config_byte(dev, 0x4b, 0x90); /* Audio IRQ11, Modem disable */
-
- pci_write_config_word(dev, 0x50, 0x4000); /* Parity check IDE enable */
- pci_write_config_word(dev, 0x52, 0x0000); /* USB & RTC disable */
- pci_write_config_word(dev, 0x54, 0x0002); /* ??? no info */
- pci_write_config_word(dev, 0x56, 0x0002); /* PCS1J signal disable */
-
- pci_write_config_byte(dev, 0x59, 0x00); /* PCSDS */
- pci_write_config_byte(dev, 0x5a, 0x00);
- pci_write_config_byte(dev, 0x5b, 0x00);
- pci_write_config_word(dev, 0x5c, 0x0000);
- pci_write_config_byte(dev, 0x5e, 0x00);
- pci_write_config_byte(dev, 0x5f, 0x00);
- pci_write_config_word(dev, 0x60, 0x0000);
-
- pci_write_config_byte(dev, 0x6c, 0x00);
- pci_write_config_byte(dev, 0x6d, 0x48); /* ROM address mapping */
- pci_write_config_byte(dev, 0x6e, 0x00); /* ??? what for? */
-
- pci_write_config_byte(dev, 0x70, 0x12); /* Serial IRQ control */
- pci_write_config_byte(dev, 0x71, 0xEF); /* DMA channel select */
- pci_write_config_byte(dev, 0x72, 0x03); /* USB IDSEL */
- pci_write_config_byte(dev, 0x73, 0x00); /* ??? no info */
-
- /*
- * IRQ setup ALi M5237 USB Host Controller
- * IRQ: 9
- */
- pci_write_config_byte(dev, 0x74, 0x01); /* USB IRQ9 */
-
- pci_write_config_byte(dev, 0x75, 0x1f); /* IDE2 IRQ 15 */
- pci_write_config_byte(dev, 0x76, 0x80); /* ACPI disable */
- pci_write_config_byte(dev, 0x77, 0x40); /* Modem disable */
- pci_write_config_dword(dev, 0x78, 0x20000000); /* Pin select 2 */
- pci_write_config_byte(dev, 0x7c, 0x00); /* Pin select 3 */
- pci_write_config_byte(dev, 0x81, 0x00); /* ID read/write control */
- pci_write_config_byte(dev, 0x90, 0x00); /* PCI PM block control */
- pci_write_config_word(dev, 0xa4, 0x0000); /* PMSCR */
-
-#ifdef CONFIG_BLK_DEV_FD
- ali_m1535plus_fdc_init(1);
-#endif
-
- ali_m1535plus_keyboard_init(1);
- ali_m1535plus_hotkey_init(1);
-}
-
-static inline void ali_config_writeb(u8 reg, u8 val, int devfn)
-{
- u32 data;
- int shift;
-
- writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
- data = readl(PCI_CONFIG_DATA);
-
- shift = (reg & 3) << 3;
- data &= ~(0xff << shift);
- data |= (((u32)val) << shift);
-
- writel(data, PCI_CONFIG_DATA);
-}
-
-static inline u8 ali_config_readb(u8 reg, int devfn)
-{
- u32 data;
-
- writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
- data = readl(PCI_CONFIG_DATA);
-
- return (u8)(data >> ((reg & 3) << 3));
-}
-
-static inline u16 ali_config_readw(u8 reg, int devfn)
-{
- u32 data;
-
- writel((1 << 16) | (devfn << 8) | (reg & 0xfc) | 1UL, PCI_CONFIG_ADDR);
- data = readl(PCI_CONFIG_DATA);
-
- return (u16)(data >> ((reg & 2) << 3));
-}
-
-int vr4133_rockhopper = 0;
-void __init ali_m5229_preinit(void)
-{
- if (ali_config_readw(PCI_VENDOR_ID, 16) == PCI_VENDOR_ID_AL &&
- ali_config_readw(PCI_DEVICE_ID, 16) == PCI_DEVICE_ID_AL_M1533) {
- printk(KERN_INFO "Found an NEC Rockhopper \n");
- vr4133_rockhopper = 1;
- /*
- * Enable ALi M5229 IDE Controller (both channels)
- * IDSEL: A27
- */
- ali_config_writeb(0x58, 0x4c, 16);
- }
-}
-
-void __init ali_m5229_init(struct pci_dev *dev)
-{
- /*
- * Enable Primary/Secondary Channel Cable Detect 40-Pin
- */
- pci_write_config_word(dev, 0x4a, 0xc023);
-
- /*
- * Set only the 3rd byteis for the master IDE's cycle and
- * enable Internal IDE Function
- */
- pci_write_config_byte(dev, 0x50, 0x23); /* Class code attr register */
-
- pci_write_config_byte(dev, 0x09, 0xff); /* Set native mode & stuff */
- pci_write_config_byte(dev, 0x52, 0x00); /* use timing registers */
- pci_write_config_byte(dev, 0x58, 0x02); /* Primary addr setup timing */
- pci_write_config_byte(dev, 0x59, 0x22); /* Primary cmd block timing */
- pci_write_config_byte(dev, 0x5a, 0x22); /* Pr drv 0 R/W timing */
- pci_write_config_byte(dev, 0x5b, 0x22); /* Pr drv 1 R/W timing */
- pci_write_config_byte(dev, 0x5c, 0x02); /* Sec addr setup timing */
- pci_write_config_byte(dev, 0x5d, 0x22); /* Sec cmd block timing */
- pci_write_config_byte(dev, 0x5e, 0x22); /* Sec drv 0 R/W timing */
- pci_write_config_byte(dev, 0x5f, 0x22); /* Sec drv 1 R/W timing */
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
- pci_write_config_word(dev, PCI_COMMAND,
- PCI_COMMAND_PARITY | PCI_COMMAND_MASTER |
- PCI_COMMAND_IO);
-}
-
diff --git a/arch/mips/vr41xx/nec-cmbvr4133/setup.c b/arch/mips/vr41xx/nec-cmbvr4133/setup.c
deleted file mode 100644
index 7723d20..0000000
--- a/arch/mips/vr41xx/nec-cmbvr4133/setup.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * arch/mips/vr41xx/nec-cmbvr4133/setup.c
- *
- * Setup for the NEC CMB-VR4133.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for CMBVR4133 board in 2.6
- * Author: Manish Lachwani (mlachwani@mvista.com)
- */
-#include <linux/init.h>
-#include <linux/ide.h>
-#include <linux/ioport.h>
-
-#include <asm/reboot.h>
-#include <asm/time.h>
-#include <asm/vr41xx/cmbvr4133.h>
-#include <asm/bootinfo.h>
-
-#ifdef CONFIG_MTD
-#include <linux/mtd/physmap.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-
-static struct mtd_partition cmbvr4133_mtd_parts[] = {
- {
- .name = "User FS",
- .size = 0x1be0000,
- .offset = 0,
- .mask_flags = 0,
- },
- {
- .name = "PMON",
- .size = 0x140000,
- .offset = MTDPART_OFS_APPEND,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- },
- {
- .name = "User FS2",
- .size = MTDPART_SIZ_FULL,
- .offset = MTDPART_OFS_APPEND,
- .mask_flags = 0,
- }
-};
-
-#define number_partitions ARRAY_SIZE(cmbvr4133_mtd_parts)
-#endif
-
-extern void i8259_init(void);
-
-static void __init nec_cmbvr4133_setup(void)
-{
-#ifdef CONFIG_ROCKHOPPER
- extern void disable_pcnet(void);
-
- disable_pcnet();
-#endif
- set_io_port_base(KSEG1ADDR(0x16000000));
-
-#ifdef CONFIG_PCI
-#ifdef CONFIG_ROCKHOPPER
- ali_m5229_preinit();
-#endif
-#endif
-
-#ifdef CONFIG_ROCKHOPPER
- rockhopper_init_irq();
-#endif
-
-#ifdef CONFIG_MTD
- /* we use generic physmap mapping driver and we use partitions */
- physmap_configure(0x1C000000, 0x02000000, 4, NULL);
- physmap_set_partitions(cmbvr4133_mtd_parts, number_partitions);
-#endif
-
- /* 128 MB memory support */
- add_memory_region(0, 0x08000000, BOOT_MEM_RAM);
-
-#ifdef CONFIG_ROCKHOPPER
- i8259_init();
-#endif
-}
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 20eacf2..de88972 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -53,6 +53,9 @@
bool
default y
+config HAVE_LATENCYTOP_SUPPORT
+ def_bool y
+
config TRACE_IRQFLAGS_SUPPORT
bool
depends on PPC64
@@ -111,6 +114,7 @@
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_LMB
+ select HAVE_DMA_ATTRS if PPC64
select USE_GENERIC_SMP_HELPERS if SMP
select HAVE_OPROFILE
@@ -311,8 +315,8 @@
strongly in flux, so no good recommendation can be made.
config CRASH_DUMP
- bool "Build a kdump crash kernel (EXPERIMENTAL)"
- depends on PPC_MULTIPLATFORM && PPC64 && EXPERIMENTAL
+ bool "Build a kdump crash kernel"
+ depends on PPC_MULTIPLATFORM && PPC64
help
Build a kernel suitable for use as a kdump capture kernel.
The kernel will be linked at a different address than normal, and
@@ -461,6 +465,19 @@
some command-line options at build time by entering them here. In
most cases you will need to specify the root device here.
+config EXTRA_TARGETS
+ string "Additional default image types"
+ help
+ List additional targets to be built by the bootwrapper here (separated
+ by spaces). This is useful for targets that depend of device tree
+ files in the .dts directory.
+
+ Targets in this list will be build as part of the default build
+ target, or when the user does a 'make zImage' or a
+ 'make zImage.initrd'.
+
+ If unsure, leave blank
+
if !44x || BROKEN
config ARCH_WANTS_FREEZER_CONTROL
def_bool y
@@ -541,6 +558,12 @@
help
Freescale Localbus support
+config FSL_GTM
+ bool
+ depends on PPC_83xx || QUICC_ENGINE || CPM2
+ help
+ Freescale General-purpose Timers support
+
# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
config MCA
bool
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index a7d24e6..2840ab6 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -57,6 +57,16 @@
debugger. See <http://kgdb.sourceforge.net/> for more information.
Unless you are intending to debug the kernel, say N here.
+config CODE_PATCHING_SELFTEST
+ bool "Run self-tests of the code-patching code."
+ depends on DEBUG_KERNEL
+ default n
+
+config FTR_FIXUP_SELFTEST
+ bool "Run self-tests of the feature-fixup code."
+ depends on DEBUG_KERNEL
+ default n
+
choice
prompt "Serial Port"
depends on KGDB
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index b7d4c4c..9155c93 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -18,22 +18,16 @@
CROSS32_COMPILE ?=
CROSS32CC := $(CROSS32_COMPILE)gcc
-CROSS32AS := $(CROSS32_COMPILE)as
-CROSS32LD := $(CROSS32_COMPILE)ld
CROSS32AR := $(CROSS32_COMPILE)ar
-CROSS32OBJCOPY := $(CROSS32_COMPILE)objcopy
ifeq ($(HAS_BIARCH),y)
ifeq ($(CROSS32_COMPILE),)
CROSS32CC := $(CC) -m32
-CROSS32AS := $(AS) -a32
-CROSS32LD := $(LD) -m elf32ppc
-CROSS32OBJCOPY := $(OBJCOPY)
CROSS32AR := GNUTARGET=elf32-powerpc $(AR)
endif
endif
-export CROSS32CC CROSS32AS CROSS32LD CROSS32AR CROSS32OBJCOPY
+export CROSS32CC CROSS32AR
ifeq ($(CROSS_COMPILE),)
KBUILD_DEFCONFIG := $(shell uname -m)_defconfig
@@ -169,12 +163,25 @@
$(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
define archhelp
- @echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
+ @echo '* zImage - Build default images selected by kernel config'
+ @echo ' zImage.* - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
+ @echo ' uImage - U-Boot native image format'
+ @echo ' cuImage.<dt> - Backwards compatible U-Boot image for older'
+ @echo ' versions which do not support device trees'
+ @echo ' dtbImage.<dt> - zImage with an embedded device tree blob'
+ @echo ' simpleImage.<dt> - Firmware independent image.'
+ @echo ' treeImage.<dt> - Support for older IBM 4xx firmware (not U-Boot)'
@echo ' install - Install kernel using'
@echo ' (your) ~/bin/installkernel or'
@echo ' (distribution) /sbin/installkernel or'
@echo ' install to $$(INSTALL_PATH) and run lilo'
@echo ' *_defconfig - Select default config from arch/$(ARCH)/configs'
+ @echo ''
+ @echo ' Targets with <dt> embed a device tree blob inside the image'
+ @echo ' These targets support board with firmware that does not'
+ @echo ' support passing a device tree directly. Replace <dt> with the'
+ @echo ' name of a dts file from the arch/$(ARCH)/boot/dts/ directory'
+ @echo ' (minus the .dts extension).'
endef
install:
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 095e04d..19f83c8 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -35,6 +35,8 @@
BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt
+DTS_FLAGS ?= -p 1024
+
$(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
@@ -63,10 +65,10 @@
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
- fixed-head.S ep88xc.c ep405.c \
+ fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
- virtex405-head.S
+ virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -213,6 +215,7 @@
# Board ports in arch/powerpc/platform/44x/Kconfig
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
+image-$(CONFIG_SAM440EP) += cuImage.sam440ep
image-$(CONFIG_SEQUOIA) += cuImage.sequoia
image-$(CONFIG_RAINIER) += cuImage.rainier
image-$(CONFIG_TAISHAN) += cuImage.taishan
@@ -242,6 +245,7 @@
cuImage.mpc8349emitxgp
image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds
image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds
+image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
# Board ports in arch/powerpc/platform/85xx/Kconfig
image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads
@@ -254,6 +258,7 @@
cuImage.mpc8572ds
image-$(CONFIG_TQM8540) += cuImage.tqm8540
image-$(CONFIG_TQM8541) += cuImage.tqm8541
+image-$(CONFIG_TQM8548) += cuImage.tqm8548
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_SBC8548) += cuImage.sbc8548
@@ -263,6 +268,7 @@
# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
image-$(CONFIG_STORCENTER) += cuImage.storcenter
image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2
+image-$(CONFIG_PPC_C2K) += cuImage.c2k
# For 32-bit powermacs, build the COFF and miboot images
# as well as the ELF images.
@@ -270,6 +276,9 @@
image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot
endif
+# Allow extra targets to be added to the defconfig
+image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS))
+
initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-))
initrd-y := $(patsubst zImage%, zImage.initrd%, \
$(patsubst dtbImage%, dtbImage.initrd%, \
diff --git a/arch/powerpc/boot/addnote.c b/arch/powerpc/boot/addnote.c
index 8041a98..b1e5611 100644
--- a/arch/powerpc/boot/addnote.c
+++ b/arch/powerpc/boot/addnote.c
@@ -25,7 +25,7 @@
#define N_DESCR 6
unsigned int descr[N_DESCR] = {
0xffffffff, /* real-mode = true */
- 0x00c00000, /* real-base, i.e. where we expect OF to be */
+ 0x02000000, /* real-base, i.e. where we expect OF to be */
0xffffffff, /* real-size */
0xffffffff, /* virt-base */
0xffffffff, /* virt-size */
diff --git a/arch/powerpc/boot/cuboot-c2k.c b/arch/powerpc/boot/cuboot-c2k.c
new file mode 100644
index 0000000..e435949
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-c2k.c
@@ -0,0 +1,190 @@
+/*
+ * GEFanuc C2K platform code.
+ *
+ * Author: Remi Machet <rmachet@slac.stanford.edu>
+ *
+ * Originated from prpmc2800.c
+ *
+ * 2008 (c) Stanford University
+ * 2007 (c) MontaVista, Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "types.h"
+#include "stdio.h"
+#include "io.h"
+#include "ops.h"
+#include "elf.h"
+#include "gunzip_util.h"
+#include "mv64x60.h"
+#include "cuboot.h"
+#include "ppcboot.h"
+
+static u8 *bridge_base;
+
+static void c2k_bridge_setup(u32 mem_size)
+{
+ u32 i, v[30], enables, acc_bits;
+ u32 pci_base_hi, pci_base_lo, size, buf[2];
+ unsigned long cpu_base;
+ int rc;
+ void *devp, *mv64x60_devp;
+ u8 *bridge_pbase, is_coherent;
+ struct mv64x60_cpu2pci_win *tbl;
+ int bus;
+
+ bridge_pbase = mv64x60_get_bridge_pbase();
+ is_coherent = mv64x60_is_coherent();
+
+ if (is_coherent)
+ acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB
+ | MV64x60_PCI_ACC_CNTL_SWAP_NONE
+ | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES
+ | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES;
+ else
+ acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE
+ | MV64x60_PCI_ACC_CNTL_SWAP_NONE
+ | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES
+ | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES;
+
+ mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent);
+ mv64x60_devp = find_node_by_compatible(NULL, "marvell,mv64360");
+ if (mv64x60_devp == NULL)
+ fatal("Error: Missing marvell,mv64360 device tree node\n\r");
+
+ enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE));
+ enables |= 0x007ffe00; /* Disable all cpu->pci windows */
+ out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
+
+ /* Get the cpu -> pci i/o & mem mappings from the device tree */
+ devp = NULL;
+ for (bus = 0; ; bus++) {
+ char name[] = "pci ";
+
+ name[strlen(name)-1] = bus+'0';
+
+ devp = find_node_by_alias(name);
+ if (devp == NULL)
+ break;
+
+ if (bus >= 2)
+ fatal("Error: Only 2 PCI controllers are supported at" \
+ " this time.\n");
+
+ mv64x60_config_pci_windows(bridge_base, bridge_pbase, bus, 0,
+ mem_size, acc_bits);
+
+ rc = getprop(devp, "ranges", v, sizeof(v));
+ if (rc == 0)
+ fatal("Error: Can't find marvell,mv64360-pci ranges"
+ " property\n\r");
+
+ /* Get the cpu -> pci i/o & mem mappings from the device tree */
+
+ for (i = 0; i < rc; i += 6) {
+ switch (v[i] & 0xff000000) {
+ case 0x01000000: /* PCI I/O Space */
+ tbl = mv64x60_cpu2pci_io;
+ break;
+ case 0x02000000: /* PCI MEM Space */
+ tbl = mv64x60_cpu2pci_mem;
+ break;
+ default:
+ continue;
+ }
+
+ pci_base_hi = v[i+1];
+ pci_base_lo = v[i+2];
+ cpu_base = v[i+3];
+ size = v[i+5];
+
+ buf[0] = cpu_base;
+ buf[1] = size;
+
+ if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base))
+ fatal("Error: Can't translate PCI address " \
+ "0x%x\n\r", (u32)cpu_base);
+
+ mv64x60_config_cpu2pci_window(bridge_base, bus,
+ pci_base_hi, pci_base_lo, cpu_base, size, tbl);
+ }
+
+ enables &= ~(3<<(9+bus*5)); /* Enable cpu->pci<bus> i/o,
+ cpu->pci<bus> mem0 */
+ out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE),
+ enables);
+ };
+}
+
+static void c2k_fixups(void)
+{
+ u32 mem_size;
+
+ mem_size = mv64x60_get_mem_size(bridge_base);
+ c2k_bridge_setup(mem_size); /* Do necessary bridge setup */
+}
+
+#define MV64x60_MPP_CNTL_0 0xf000
+#define MV64x60_MPP_CNTL_2 0xf008
+#define MV64x60_GPP_IO_CNTL 0xf100
+#define MV64x60_GPP_LEVEL_CNTL 0xf110
+#define MV64x60_GPP_VALUE_SET 0xf118
+
+static void c2k_reset(void)
+{
+ u32 temp;
+
+ udelay(5000000);
+
+ if (bridge_base != 0) {
+ temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0));
+ temp &= 0xFFFF0FFF;
+ out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp);
+
+ temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
+ temp |= 0x00000004;
+ out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
+
+ temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
+ temp |= 0x00000004;
+ out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
+
+ temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2));
+ temp &= 0xFFFF0FFF;
+ out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp);
+
+ temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
+ temp |= 0x00080000;
+ out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
+
+ temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
+ temp |= 0x00080000;
+ out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
+
+ out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET),
+ 0x00080004);
+ }
+
+ for (;;);
+}
+
+static bd_t bd;
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ CUBOOT_INIT();
+
+ fdt_init(_dtb_start);
+
+ bridge_base = mv64x60_get_bridge_base();
+
+ platform_ops.fixups = c2k_fixups;
+ platform_ops.exit = c2k_reset;
+
+ if (serial_console_init() < 0)
+ exit();
+}
diff --git a/arch/powerpc/boot/cuboot-sam440ep.c b/arch/powerpc/boot/cuboot-sam440ep.c
new file mode 100644
index 0000000..ec10a47
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-sam440ep.c
@@ -0,0 +1,49 @@
+/*
+ * Old U-boot compatibility for Sam440ep based off bamboo.c code
+ * original copyrights below
+ *
+ * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * Copyright 2007 IBM Corporation
+ *
+ * Based on cuboot-ebony.c
+ *
+ * Modified from cuboot-bamboo.c for sam440ep:
+ * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "44x.h"
+#include "4xx.h"
+#include "cuboot.h"
+
+#define TARGET_4xx
+#define TARGET_44x
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void sam440ep_fixups(void)
+{
+ unsigned long sysclk = 66666666;
+
+ ibm440ep_fixup_clocks(sysclk, 11059200, 25000000);
+ ibm4xx_sdram_fixup_memsize();
+ ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
+ dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ CUBOOT_INIT();
+ platform_ops.fixups = sam440ep_fixups;
+ platform_ops.exit = ibm44x_dbcr_reset;
+ fdt_init(_dtb_start);
+ serial_console_init();
+}
diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c
index eb108a8..2178021 100644
--- a/arch/powerpc/boot/cuboot-warp.c
+++ b/arch/powerpc/boot/cuboot-warp.c
@@ -10,6 +10,7 @@
#include "ops.h"
#include "4xx.h"
#include "cuboot.h"
+#include "stdio.h"
#define TARGET_4xx
#define TARGET_44x
@@ -17,14 +18,54 @@
static bd_t bd;
+static void warp_fixup_one_nor(u32 from, u32 to)
+{
+ void *devp;
+ char name[50];
+ u32 v[2];
+
+ sprintf(name, "/plb/opb/ebc/nor_flash@0,0/partition@%x", from);
+
+ devp = finddevice(name);
+ if (!devp)
+ return;
+
+ if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
+ v[0] = to;
+ setprop(devp, "reg", v, sizeof(v));
+
+ printf("NOR 64M fixup %x -> %x\r\n", from, to);
+ }
+}
+
+
static void warp_fixups(void)
{
- unsigned long sysclk = 66000000;
-
- ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
+ ibm440ep_fixup_clocks(66000000, 11059200, 50000000);
ibm4xx_sdram_fixup_memsize();
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+
+ /* Fixup for 64M flash on Rev A boards. */
+ if (bd.bi_flashsize == 0x4000000) {
+ void *devp;
+ u32 v[3];
+
+ devp = finddevice("/plb/opb/ebc/nor_flash@0,0");
+ if (!devp)
+ return;
+
+ /* Fixup the size */
+ if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
+ v[2] = bd.bi_flashsize;
+ setprop(devp, "reg", v, sizeof(v));
+ }
+
+ /* Fixup parition offsets */
+ warp_fixup_one_nor(0x300000, 0x3f00000);
+ warp_fixup_one_nor(0x340000, 0x3f40000);
+ warp_fixup_one_nor(0x380000, 0x3f80000);
+ }
}
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
new file mode 100644
index 0000000..8b1bb0e
--- /dev/null
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -0,0 +1,282 @@
+/*
+ * Analogue & Micro ASP8347 Device Tree Source
+ *
+ * Copyright 2008 Codehermit
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "Analogue & Micro ASP8347E";
+ compatible = "analogue-and-micro,asp8347e";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8347@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>; // from bootloader
+ bus-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x8000000>; // 128MB at 0
+ };
+
+ localbus@ff005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8347e-localbus",
+ "fsl,pq2pro-localbus",
+ "simple-bus";
+ reg = <0xff005000 0x1000>;
+ interrupts = <77 0x8>;
+ interrupt-parent = <&ipic>;
+
+ ranges = <
+ 0 0 0xf0000000 0x02000000
+ >;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 0x02000000>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+ };
+
+ soc8349@ff000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xff000000 0x00100000>;
+ reg = <0xff000000 0x00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ device_type = "watchdog";
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1374";
+ reg = <0x68>;
+ };
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+ };
+
+ spi@7000 {
+ cell-index = <0>;
+ compatible = "fsl,spi";
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
+ mode = "cpu";
+ };
+
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8347-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
+ /* phy type (ULPI or SERIAL) are only types supported for MPH */
+ /* port = 0 or 1 */
+ usb@22000 {
+ compatible = "fsl-usb2-mph";
+ reg = <0x22000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <39 0x8>;
+ phy_type = "ulpi";
+ port1;
+ };
+ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+ usb@23000 {
+ compatible = "fsl-usb2-dr";
+ reg = <0x23000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
+ dr_mode = "otg";
+ phy_type = "ulpi";
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x1>;
+ device_type = "ethernet-phy";
+ };
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 08 e5 11 32 33 ];
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy0>;
+ linux,network-index = <0>;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 08 e5 11 32 34 ];
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1>;
+ linux,network-index = <1>;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <400000000>;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <400000000>;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ /* May need to remove if on a part without crypto engine */
+ crypto@30000 {
+ device_type = "crypto";
+ model = "SEC2";
+ compatible = "talitos";
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
+ num-channels = <4>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x0000007e>;
+ /* desc mask is for rev2.0,
+ * we need runtime fixup for >2.0 */
+ descriptor-types-mask = <0x01010ebf>;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: pic@700 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x700 0x100>;
+ device_type = "ipic";
+ };
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2";
+ linux,stdout-path = &serial0;
+ };
+
+};
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index ba2521b..6ce0cc2 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -11,12 +11,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,bamboo";
compatible = "amcc,bamboo";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -34,13 +36,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440EP";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
@@ -48,14 +50,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; /* Filled in by zImage */
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -65,22 +67,22 @@
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-440ep";
- dcr-reg = <00e 002>;
+ dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-440ep";
- dcr-reg = <00c 002>;
+ dcr-reg = <0x00c 0x002>;
};
plb {
@@ -92,29 +94,29 @@
SDRAM0: sdram {
compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
DMA0: dma {
compatible = "ibm,dma-440ep", "ibm,dma-440gp";
- dcr-reg = <100 027>;
+ dcr-reg = <0x100 0x027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
};
POB0: opb {
@@ -124,101 +126,101 @@
/* Bamboo is oddball in the 44x world and doesn't use the ERPN
* bits.
*/
- ranges = <00000000 0 00000000 80000000
- 80000000 0 80000000 80000000>;
+ ranges = <0x00000000 0x00000000 0x00000000 0x80000000
+ 0x80000000 0x00000000 0x80000000 0x80000000>;
interrupt-parent = <&UIC1>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc {
compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
};
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <1c200>;
+ current-speed = <115200>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600400 8>;
- virtual-reg = <ef600400>;
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600500 8>;
- virtual-reg = <ef600500>;
+ reg = <0xef600500 0x00000008>;
+ virtual-reg = <0xef600500>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
};
UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600600 8>;
- virtual-reg = <ef600600>;
+ reg = <0xef600600 0x00000008>;
+ virtual-reg = <0xef600600>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <4 4>;
+ interrupts = <0x4 0x4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
- reg = <ef600700 14>;
+ reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600800 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
- reg = <ef600800 14>;
+ reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
- reg = <ef600d00 c>;
+ reg = <0xef600d00 0x0000000c>;
};
EMAC0: ethernet@ef600e00 {
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
- interrupts = <1c 4 1d 4>;
- reg = <ef600e00 70>;
+ interrupts = <0x1c 0x4 0x1d 0x4>;
+ reg = <0xef600e00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0 1>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
@@ -227,26 +229,26 @@
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
- interrupts = <1e 4 1f 4>;
- reg = <ef600f00 70>;
+ interrupts = <0x1e 0x4 0x1f 0x4>;
+ reg = <0xef600f00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <2 3>;
mal-rx-channel = <1>;
cell-index = <1>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
};
usb@ef601000 {
compatible = "ohci-be";
- reg = <ef601000 80>;
- interrupts = <8 1 9 1>;
+ reg = <0xef601000 0x00000080>;
+ interrupts = <0x8 0x1 0x9 0x1>;
interrupt-parent = < &UIC1 >;
};
};
@@ -258,35 +260,35 @@
#address-cells = <3>;
compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
primary;
- reg = <0 eec00000 8 /* Config space access */
- 0 eed00000 4 /* IACK */
- 0 eed00000 4 /* Special cycle */
- 0 ef400000 40>; /* Internal registers */
+ reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
+ 0x00000000 0xeed00000 0x00000004 /* IACK */
+ 0x00000000 0xeed00000 0x00000004 /* Special cycle */
+ 0x00000000 0xef400000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
- ranges = <02000000 0 a0000000 0 a0000000 0 20000000
- 01000000 0 00000000 0 e8000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
+ 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* Bamboo has all 4 IRQ pins tied together per slot */
- interrupt-map-mask = <f800 0 0 0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* IDSEL 1 */
- 0800 0 0 0 &UIC0 1c 8
+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
/* IDSEL 2 */
- 1000 0 0 0 &UIC0 1b 8
+ 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8
/* IDSEL 3 */
- 1800 0 0 0 &UIC0 1a 8
+ 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8
/* IDSEL 4 */
- 2000 0 0 0 &UIC0 19 8
+ 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8
>;
};
};
diff --git a/arch/powerpc/boot/dts/c2k.dts b/arch/powerpc/boot/dts/c2k.dts
new file mode 100644
index 0000000..f5d625f
--- /dev/null
+++ b/arch/powerpc/boot/dts/c2k.dts
@@ -0,0 +1,371 @@
+/* Device Tree Source for GEFanuc C2K
+ *
+ * Author: Remi Machet <rmachet@slac.stanford.edu>
+ *
+ * Originated from prpmc2800.dts
+ *
+ * 2008 (c) Stanford University
+ * 2007 (c) MontaVista, Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "C2K";
+ compatible = "GEFanuc,C2K";
+ coherency-off;
+
+ aliases {
+ pci0 = &PCI0;
+ pci1 = &PCI1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "PowerPC,7447";
+ reg = <0>;
+ clock-frequency = <996000000>; /* 996 MHz */
+ bus-frequency = <166666667>; /* 166.6666 MHz */
+ timebase-frequency = <41666667>; /* 166.6666/4 MHz */
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x40000000>; /* 1GB */
+ };
+
+ system-controller@d8000000 { /* Marvell Discovery */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "mv64460";
+ compatible = "marvell,mv64360";
+ clock-frequency = <166666667>; /* 166.66... MHz */
+ reg = <0xd8000000 0x00010000>;
+ virtual-reg = <0xd8000000>;
+ ranges = <0xd4000000 0xd4000000 0x01000000 /* PCI 0 I/O Space */
+ 0x80000000 0x80000000 0x08000000 /* PCI 0 MEM Space */
+ 0xd0000000 0xd0000000 0x01000000 /* PCI 1 I/O Space */
+ 0xa0000000 0xa0000000 0x08000000 /* PCI 1 MEM Space */
+ 0xd8100000 0xd8100000 0x00010000 /* FPGA */
+ 0xd8110000 0xd8110000 0x00010000 /* FPGA USARTs */
+ 0xf8000000 0xf8000000 0x08000000 /* User FLASH */
+ 0x00000000 0xd8000000 0x00010000 /* Bridge's regs */
+ 0xd8140000 0xd8140000 0x00040000>; /* Integrated SRAM */
+
+ mdio@2000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,mv64360-mdio";
+ reg = <0x2000 4>;
+ PHY0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ interrupts = <76>; /* GPP 12 */
+ interrupt-parent = <&PIC>;
+ reg = <0>;
+ };
+ PHY1: ethernet-phy@1 {
+ device_type = "ethernet-phy";
+ interrupts = <76>; /* GPP 12 */
+ interrupt-parent = <&PIC>;
+ reg = <1>;
+ };
+ PHY2: ethernet-phy@2 {
+ device_type = "ethernet-phy";
+ interrupts = <76>; /* GPP 12 */
+ interrupt-parent = <&PIC>;
+ reg = <2>;
+ };
+ };
+
+ ethernet-group@2000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,mv64360-eth-group";
+ reg = <0x2000 0x2000>;
+ ethernet@0 {
+ device_type = "network";
+ compatible = "marvell,mv64360-eth";
+ reg = <0>;
+ interrupts = <32>;
+ interrupt-parent = <&PIC>;
+ phy = <&PHY0>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ ethernet@1 {
+ device_type = "network";
+ compatible = "marvell,mv64360-eth";
+ reg = <1>;
+ interrupts = <33>;
+ interrupt-parent = <&PIC>;
+ phy = <&PHY1>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ ethernet@2 {
+ device_type = "network";
+ compatible = "marvell,mv64360-eth";
+ reg = <2>;
+ interrupts = <34>;
+ interrupt-parent = <&PIC>;
+ phy = <&PHY2>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ };
+
+ SDMA0: sdma@4000 {
+ compatible = "marvell,mv64360-sdma";
+ reg = <0x4000 0xc18>;
+ virtual-reg = <0xd8004000>;
+ interrupt-base = <0>;
+ interrupts = <36>;
+ interrupt-parent = <&PIC>;
+ };
+
+ SDMA1: sdma@6000 {
+ compatible = "marvell,mv64360-sdma";
+ reg = <0x6000 0xc18>;
+ virtual-reg = <0xd8006000>;
+ interrupt-base = <0>;
+ interrupts = <38>;
+ interrupt-parent = <&PIC>;
+ };
+
+ BRG0: brg@b200 {
+ compatible = "marvell,mv64360-brg";
+ reg = <0xb200 0x8>;
+ clock-src = <8>;
+ clock-frequency = <133333333>;
+ current-speed = <115200>;
+ };
+
+ BRG1: brg@b208 {
+ compatible = "marvell,mv64360-brg";
+ reg = <0xb208 0x8>;
+ clock-src = <8>;
+ clock-frequency = <133333333>;
+ current-speed = <115200>;
+ };
+
+ CUNIT: cunit@f200 {
+ reg = <0xf200 0x200>;
+ };
+
+ MPSCROUTING: mpscrouting@b400 {
+ reg = <0xb400 0xc>;
+ };
+
+ MPSCINTR: mpscintr@b800 {
+ reg = <0xb800 0x100>;
+ virtual-reg = <0xd800b800>;
+ };
+
+ MPSC0: mpsc@8000 {
+ device_type = "serial";
+ compatible = "marvell,mv64360-mpsc";
+ reg = <0x8000 0x38>;
+ virtual-reg = <0xd8008000>;
+ sdma = <&SDMA0>;
+ brg = <&BRG0>;
+ cunit = <&CUNIT>;
+ mpscrouting = <&MPSCROUTING>;
+ mpscintr = <&MPSCINTR>;
+ cell-index = <0>;
+ interrupts = <40>;
+ interrupt-parent = <&PIC>;
+ };
+
+ MPSC1: mpsc@9000 {
+ device_type = "serial";
+ compatible = "marvell,mv64360-mpsc";
+ reg = <0x9000 0x38>;
+ virtual-reg = <0xd8009000>;
+ sdma = <&SDMA1>;
+ brg = <&BRG1>;
+ cunit = <&CUNIT>;
+ mpscrouting = <&MPSCROUTING>;
+ mpscintr = <&MPSCINTR>;
+ cell-index = <1>;
+ interrupts = <42>;
+ interrupt-parent = <&PIC>;
+ };
+
+ wdt@b410 { /* watchdog timer */
+ compatible = "marvell,mv64360-wdt";
+ reg = <0xb410 0x8>;
+ };
+
+ i2c@c000 {
+ compatible = "marvell,mv64360-i2c";
+ reg = <0xc000 0x20>;
+ virtual-reg = <0xd800c000>;
+ interrupts = <37>;
+ interrupt-parent = <&PIC>;
+ };
+
+ PIC: pic {
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ compatible = "marvell,mv64360-pic";
+ reg = <0x0000 0x88>;
+ interrupt-controller;
+ };
+
+ mpp@f000 {
+ compatible = "marvell,mv64360-mpp";
+ reg = <0xf000 0x10>;
+ };
+
+ gpp@f100 {
+ compatible = "marvell,mv64360-gpp";
+ reg = <0xf100 0x20>;
+ };
+
+ PCI0: pci@80000000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "marvell,mv64360-pci";
+ reg = <0x0cf8 0x8>;
+ ranges = <0x01000000 0x0 0x00000000 0xd4000000 0x0 0x01000000
+ 0x02000000 0x0 0x80000000 0x80000000 0x0 0x08000000>;
+ bus-range = <0 255>;
+ clock-frequency = <66000000>;
+ interrupt-pci-iack = <0x0c34>;
+ interrupt-parent = <&PIC>;
+ interrupt-map-mask = <0x0000 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* Only one interrupt line for PMC0 slot (INTA) */
+ 0x0000 0 0 1 &PIC 88
+ >;
+ };
+
+
+ PCI1: pci@a0000000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "marvell,mv64360-pci";
+ reg = <0x0c78 0x8>;
+ ranges = <0x01000000 0x0 0x00000000 0xd0000000 0x0 0x01000000
+ 0x02000000 0x0 0x80000000 0xa0000000 0x0 0x08000000>;
+ bus-range = <0 255>;
+ clock-frequency = <66000000>;
+ interrupt-pci-iack = <0x0cb4>;
+ interrupt-parent = <&PIC>;
+ interrupt-map-mask = <0xf800 0x00 0x00 0x7>;
+ interrupt-map = <
+ /* IDSEL 0x01: PMC1 ? */
+ 0x0800 0 0 1 &PIC 88
+ /* IDSEL 0x02: cPCI bridge */
+ 0x1000 0 0 1 &PIC 88
+ /* IDSEL 0x03: USB controller */
+ 0x1800 0 0 1 &PIC 91
+ /* IDSEL 0x04: SATA controller */
+ 0x2000 0 0 1 &PIC 95
+ >;
+ };
+
+ cpu-error@0070 {
+ compatible = "marvell,mv64360-cpu-error";
+ reg = <0x0070 0x10 0x0128 0x28>;
+ interrupts = <3>;
+ interrupt-parent = <&PIC>;
+ };
+
+ sram-ctrl@0380 {
+ compatible = "marvell,mv64360-sram-ctrl";
+ reg = <0x0380 0x80>;
+ interrupts = <13>;
+ interrupt-parent = <&PIC>;
+ };
+
+ pci-error@1d40 {
+ compatible = "marvell,mv64360-pci-error";
+ reg = <0x1d40 0x40 0x0c28 0x4>;
+ interrupts = <12>;
+ interrupt-parent = <&PIC>;
+ };
+
+ pci-error@1dc0 {
+ compatible = "marvell,mv64360-pci-error";
+ reg = <0x1dc0 0x40 0x0ca8 0x4>;
+ interrupts = <16>;
+ interrupt-parent = <&PIC>;
+ };
+
+ mem-ctrl@1400 {
+ compatible = "marvell,mv64360-mem-ctrl";
+ reg = <0x1400 0x60>;
+ interrupts = <17>;
+ interrupt-parent = <&PIC>;
+ };
+ /* Devices attached to the device controller */
+ devicebus@045c {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "marvell,mv64306-devctrl";
+ reg = <0x45C 0x88>;
+ interrupts = <1>;
+ interrupt-parent = <&PIC>;
+ ranges = <0 0 0xd8100000 0x10000
+ 2 0 0xd8110000 0x10000
+ 4 0 0xf8000000 0x8000000>;
+ fpga@0,0 {
+ compatible = "sbs,fpga-c2k";
+ reg = <0 0 0x10000>;
+ };
+ fpga_usart@2,0 {
+ compatible = "sbs,fpga_usart-c2k";
+ reg = <2 0 0x10000>;
+ };
+ nor_flash@4,0 {
+ compatible = "cfi-flash";
+ reg = <4 0 0x8000000>; /* 128MB */
+ bank-width = <4>;
+ device-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "boot";
+ reg = <0x00000000 0x00080000>;
+ };
+ partition@40000 {
+ label = "kernel";
+ reg = <0x00080000 0x00400000>;
+ };
+ partition@440000 {
+ label = "initrd";
+ reg = <0x00480000 0x00B80000>;
+ };
+ partition@1000000 {
+ label = "rootfs";
+ reg = <0x01000000 0x06800000>;
+ };
+ partition@7800000 {
+ label = "recovery";
+ reg = <0x07800000 0x00800000>;
+ read-only;
+ };
+ };
+ };
+ };
+ chosen {
+ linux,stdout-path = &MPSC0;
+ };
+};
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 3963412..79fe412 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -8,12 +8,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,canyonlands";
compatible = "amcc,canyonlands";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -29,13 +31,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,460EX";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
@@ -43,14 +45,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; /* Filled in by U-Boot */
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-460ex","ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -60,11 +62,11 @@
compatible = "ibm,uic-460ex","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -72,11 +74,11 @@
compatible = "ibm,uic-460ex","ibm,uic";
interrupt-controller;
cell-index = <2>;
- dcr-reg = <0e0 009>;
+ dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <a 4 b 4>; /* cascade */
+ interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -84,22 +86,22 @@
compatible = "ibm,uic-460ex","ibm,uic";
interrupt-controller;
cell-index = <3>;
- dcr-reg = <0f0 009>;
+ dcr-reg = <0x0f0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <10 4 11 4>; /* cascade */
+ interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-460ex";
- dcr-reg = <00e 002>;
+ dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-460ex";
- dcr-reg = <00c 002>;
+ dcr-reg = <0x00c 0x002>;
};
plb {
@@ -111,74 +113,74 @@
SDRAM0: sdram {
compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
- num-rx-chans = <10>;
+ num-rx-chans = <16>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-parent = <&UIC2>;
- interrupts = < /*TXEOB*/ 6 4
- /*RXEOB*/ 7 4
- /*SERR*/ 3 4
- /*TXDE*/ 4 4
- /*RXDE*/ 5 4>;
+ interrupts = < /*TXEOB*/ 0x6 0x4
+ /*RXEOB*/ 0x7 0x4
+ /*SERR*/ 0x3 0x4
+ /*TXDE*/ 0x4 0x4
+ /*RXDE*/ 0x5 0x4>;
};
POB0: opb {
compatible = "ibm,opb-460ex", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <b0000000 4 b0000000 50000000>;
+ ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-460ex", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
- interrupts = <6 4>;
+ interrupts = <0x6 0x4>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
- reg = <0 000000 4000000>;
+ reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
- reg = <0 1e0000>;
+ reg = <0x00000000 0x001e0000>;
};
partition@1e0000 {
label = "dtb";
- reg = <1e0000 20000>;
+ reg = <0x001e0000 0x00020000>;
};
partition@200000 {
label = "ramdisk";
- reg = <200000 1400000>;
+ reg = <0x00200000 0x01400000>;
};
partition@1600000 {
label = "jffs2";
- reg = <1600000 400000>;
+ reg = <0x01600000 0x00400000>;
};
partition@1a00000 {
label = "user";
- reg = <1a00000 2560000>;
+ reg = <0x01a00000 0x02560000>;
};
partition@3f60000 {
label = "env";
- reg = <3f60000 40000>;
+ reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
- reg = <3fa0000 60000>;
+ reg = <0x03fa0000 0x00060000>;
};
};
};
@@ -186,103 +188,103 @@
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600400 8>;
- virtual-reg = <ef600400>;
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600500 8>;
- virtual-reg = <ef600500>;
+ reg = <0xef600500 0x00000008>;
+ virtual-reg = <0xef600500>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
- interrupts = <1d 4>;
+ interrupts = <0x1d 0x4>;
};
UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600600 8>;
- virtual-reg = <ef600600>;
+ reg = <0xef600600 0x00000008>;
+ virtual-reg = <0xef600600>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
- interrupts = <1e 4>;
+ interrupts = <0x1e 0x4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-460ex", "ibm,iic";
- reg = <ef600700 14>;
+ reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600800 {
compatible = "ibm,iic-460ex", "ibm,iic";
- reg = <ef600800 14>;
+ reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-460ex", "ibm,zmii";
- reg = <ef600d00 c>;
+ reg = <0xef600d00 0x0000000c>;
};
RGMII0: emac-rgmii@ef601500 {
compatible = "ibm,rgmii-460ex", "ibm,rgmii";
- reg = <ef601500 8>;
+ reg = <0xef601500 0x00000008>;
has-mdio;
};
TAH0: emac-tah@ef601350 {
compatible = "ibm,tah-460ex", "ibm,tah";
- reg = <ef601350 30>;
+ reg = <0xef601350 0x00000030>;
};
TAH1: emac-tah@ef601450 {
compatible = "ibm,tah-460ex", "ibm,tah";
- reg = <ef601450 30>;
+ reg = <0xef601450 0x00000030>;
};
EMAC0: ethernet@ef600e00 {
device_type = "network";
- compatible = "ibm,emac-460ex", "ibm,emac4";
+ compatible = "ibm,emac-460ex", "ibm,emac4sync";
interrupt-parent = <&EMAC0>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC2 10 4
- /*Wake*/ 1 &UIC2 14 4>;
- reg = <ef600e00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
+ /*Wake*/ 0x1 &UIC2 0x14 0x4>;
+ reg = <0xef600e00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
tah-device = <&TAH0>;
@@ -293,25 +295,25 @@
EMAC1: ethernet@ef600f00 {
device_type = "network";
- compatible = "ibm,emac-460ex", "ibm,emac4";
+ compatible = "ibm,emac-460ex", "ibm,emac4sync";
interrupt-parent = <&EMAC1>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC2 11 4
- /*Wake*/ 1 &UIC2 15 4>;
- reg = <ef600f00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
+ /*Wake*/ 0x1 &UIC2 0x15 0x4>;
+ reg = <0xef600f00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <8>;
cell-index = <1>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
tah-device = <&TAH1>;
@@ -331,27 +333,27 @@
primary;
large-inbound-windows;
enable-msi-hole;
- reg = <c 0ec00000 8 /* Config space access */
- 0 0 0 /* no IACK cycles */
- c 0ed00000 4 /* Special cycles */
- c 0ec80000 100 /* Internal registers */
- c 0ec80100 fc>; /* Internal messaging registers */
+ reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
+ 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
+ 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
+ 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
+ 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
- 01000000 0 00000000 0000000c 08000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0 to 0x3f */
- bus-range = <0 3f>;
+ bus-range = <0x0 0x3f>;
/* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
- interrupt-map-mask = <0000 0 0 0>;
- interrupt-map = < 0000 0 0 0 &UIC1 0 8 >;
+ interrupt-map-mask = <0x0 0x0 0x0 0x0>;
+ interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
};
PCIE0: pciex@d00000000 {
@@ -361,23 +363,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
primary;
- port = <0>; /* port number */
- reg = <d 00000000 20000000 /* Config space access */
- c 08010000 00001000>; /* Registers */
- dcr-reg = <100 020>;
- sdr-base = <300>;
+ port = <0x0>; /* port number */
+ reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
+ 0x0000000c 0x08010000 0x00001000>; /* Registers */
+ dcr-reg = <0x100 0x020>;
+ sdr-base = <0x300>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
- 01000000 0 00000000 0000000f 80000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 40 to 0x7f */
- bus-range = <40 7f>;
+ bus-range = <0x40 0x7f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -387,12 +389,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC3 c 4 /* swizzled int A */
- 0000 0 0 2 &UIC3 d 4 /* swizzled int B */
- 0000 0 0 3 &UIC3 e 4 /* swizzled int C */
- 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
};
PCIE1: pciex@d20000000 {
@@ -402,23 +404,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
primary;
- port = <1>; /* port number */
- reg = <d 20000000 20000000 /* Config space access */
- c 08011000 00001000>; /* Registers */
- dcr-reg = <120 020>;
- sdr-base = <340>;
+ port = <0x1>; /* port number */
+ reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
+ 0x0000000c 0x08011000 0x00001000>; /* Registers */
+ dcr-reg = <0x120 0x020>;
+ sdr-base = <0x340>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
- 01000000 0 00000000 0000000f 80010000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 80 to 0xbf */
- bus-range = <80 bf>;
+ bus-range = <0x80 0xbf>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -428,12 +430,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC3 10 4 /* swizzled int A */
- 0000 0 0 2 &UIC3 11 4 /* swizzled int B */
- 0000 0 0 3 &UIC3 12 4 /* swizzled int C */
- 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
};
};
};
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts
index 5079dc8..ec2d142 100644
--- a/arch/powerpc/boot/dts/ebony.dts
+++ b/arch/powerpc/boot/dts/ebony.dts
@@ -11,12 +11,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "ibm,ebony";
compatible = "ibm,ebony";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -32,13 +34,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440GP";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; // Filled in by zImage
timebase-frequency = <0>; // Filled in by zImage
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>; /* 32 kB */
- d-cache-size = <8000>; /* 32 kB */
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>; /* 32 kB */
+ d-cache-size = <32768>; /* 32 kB */
dcr-controller;
dcr-access-method = "native";
};
@@ -46,14 +48,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; // Filled in by zImage
+ reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440gp", "ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -64,17 +66,17 @@
compatible = "ibm,uic-440gp", "ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
CPC0: cpc {
compatible = "ibm,cpc-440gp";
- dcr-reg = <0b0 003 0e0 010>;
+ dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
// FIXME: anything else?
};
@@ -87,37 +89,37 @@
SDRAM0: memory-controller {
compatible = "ibm,sdram-440gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
// FIXME: anything else?
};
SRAM0: sram {
compatible = "ibm,sram-440gp";
- dcr-reg = <020 8 00a 1>;
+ dcr-reg = <0x020 0x008 0x00a 0x001>;
};
DMA0: dma {
// FIXME: ???
compatible = "ibm,dma-440gp";
- dcr-reg = <100 027>;
+ dcr-reg = <0x100 0x027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440gp", "ibm,mcmal";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
num-rx-chans = <4>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
- interrupt-map-mask = <ffffffff>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
+ interrupt-map-mask = <0xffffffff>;
};
POB0: opb {
@@ -126,34 +128,34 @@
#size-cells = <1>;
/* Wish there was a nicer way of specifying a full 32-bit
range */
- ranges = <00000000 1 00000000 80000000
- 80000000 1 80000000 80000000>;
- dcr-reg = <090 00b>;
+ ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+ 0x80000000 0x00000001 0x80000000 0x80000000>;
+ dcr-reg = <0x090 0x00b>;
interrupt-parent = <&UIC1>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
clock-frequency = <0>; // Filled in by zImage
EBC0: ebc {
compatible = "ibm,ebc-440gp", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; // Filled in by zImage
// ranges property is supplied by zImage
// based on firmware's configuration of the
// EBC bridge
- interrupts = <5 4>;
+ interrupts = <0x5 0x4>;
interrupt-parent = <&UIC1>;
small-flash@0,80000 {
compatible = "jedec-flash";
bank-width = <1>;
- reg = <0 80000 80000>;
+ reg = <0x00000000 0x00080000 0x00080000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "OpenBIOS";
- reg = <0 80000>;
+ reg = <0x00000000 0x00080000>;
read-only;
};
};
@@ -161,101 +163,101 @@
nvram@1,0 {
/* NVRAM & RTC */
compatible = "ds1743-nvram";
- #bytes = <2000>;
- reg = <1 0 2000>;
+ #bytes = <0x2000>;
+ reg = <0x00000001 0x00000000 0x00002000>;
};
large-flash@2,0 {
compatible = "jedec-flash";
bank-width = <1>;
- reg = <2 0 400000>;
+ reg = <0x00000002 0x00000000 0x00400000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "fs";
- reg = <0 380000>;
+ reg = <0x00000000 0x00380000>;
};
partition@380000 {
label = "firmware";
- reg = <380000 80000>;
+ reg = <0x00380000 0x00080000>;
};
};
ir@3,0 {
- reg = <3 0 10>;
+ reg = <0x00000003 0x00000000 0x00000010>;
};
fpga@7,0 {
compatible = "Ebony-FPGA";
- reg = <7 0 10>;
- virtual-reg = <e8300000>;
+ reg = <0x00000007 0x00000000 0x00000010>;
+ virtual-reg = <0xe8300000>;
};
};
UART0: serial@40000200 {
device_type = "serial";
compatible = "ns16550";
- reg = <40000200 8>;
- virtual-reg = <e0000200>;
- clock-frequency = <A8C000>;
- current-speed = <2580>;
+ reg = <0x40000200 0x00000008>;
+ virtual-reg = <0xe0000200>;
+ clock-frequency = <11059200>;
+ current-speed = <9600>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@40000300 {
device_type = "serial";
compatible = "ns16550";
- reg = <40000300 8>;
- virtual-reg = <e0000300>;
- clock-frequency = <A8C000>;
- current-speed = <2580>;
+ reg = <0x40000300 0x00000008>;
+ virtual-reg = <0xe0000300>;
+ clock-frequency = <11059200>;
+ current-speed = <9600>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
IIC0: i2c@40000400 {
/* FIXME */
compatible = "ibm,iic-440gp", "ibm,iic";
- reg = <40000400 14>;
+ reg = <0x40000400 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@40000500 {
/* FIXME */
compatible = "ibm,iic-440gp", "ibm,iic";
- reg = <40000500 14>;
+ reg = <0x40000500 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
};
GPIO0: gpio@40000700 {
/* FIXME */
compatible = "ibm,gpio-440gp";
- reg = <40000700 20>;
+ reg = <0x40000700 0x00000020>;
};
ZMII0: emac-zmii@40000780 {
compatible = "ibm,zmii-440gp", "ibm,zmii";
- reg = <40000780 c>;
+ reg = <0x40000780 0x0000000c>;
};
EMAC0: ethernet@40000800 {
device_type = "network";
compatible = "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
- interrupts = <1c 4 1d 4>;
- reg = <40000800 70>;
+ interrupts = <0x1c 0x4 0x1d 0x4>;
+ reg = <0x40000800 0x00000070>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <0 1>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000001>;
+ phy-map = <0x00000001>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
@@ -263,18 +265,18 @@
device_type = "network";
compatible = "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
- interrupts = <1e 4 1f 4>;
- reg = <40000900 70>;
+ interrupts = <0x1e 0x4 0x1f 0x4>;
+ reg = <0x40000900 0x00000070>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <2 3>;
mal-rx-channel = <1>;
cell-index = <1>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000001>;
+ phy-map = <0x00000001>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
};
@@ -282,9 +284,9 @@
GPT0: gpt@40000a00 {
/* FIXME */
- reg = <40000a00 d4>;
+ reg = <0x40000a00 0x000000d4>;
interrupt-parent = <&UIC0>;
- interrupts = <12 4 13 4 14 4 15 4 16 4>;
+ interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
};
};
@@ -296,35 +298,35 @@
#address-cells = <3>;
compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
primary;
- reg = <2 0ec00000 8 /* Config space access */
- 0 0 0 /* no IACK cycles */
- 2 0ed00000 4 /* Special cycles */
- 2 0ec80000 f0 /* Internal registers */
- 2 0ec80100 fc>; /* Internal messaging registers */
+ reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */
+ 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
+ 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
+ 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */
+ 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 00000003 80000000 0 80000000
- 01000000 0 00000000 00000002 08000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* Ebony has all 4 IRQ pins tied together per slot */
- interrupt-map-mask = <f800 0 0 0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* IDSEL 1 */
- 0800 0 0 0 &UIC0 17 8
+ 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8
/* IDSEL 2 */
- 1000 0 0 0 &UIC0 18 8
+ 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8
/* IDSEL 3 */
- 1800 0 0 0 &UIC0 19 8
+ 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8
/* IDSEL 4 */
- 2000 0 0 0 &UIC0 1a 8
+ 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8
>;
};
};
diff --git a/arch/powerpc/boot/dts/ep405.dts b/arch/powerpc/boot/dts/ep405.dts
index 9293855..53ef06c 100644
--- a/arch/powerpc/boot/dts/ep405.dts
+++ b/arch/powerpc/boot/dts/ep405.dts
@@ -9,12 +9,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "ep405";
compatible = "ep405";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC;
@@ -29,13 +31,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,405GP";
- reg = <0>;
- clock-frequency = <bebc200>; /* Filled in by zImage */
+ reg = <0x00000000>;
+ clock-frequency = <200000000>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <4000>;
- d-cache-size = <4000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <16384>;
+ d-cache-size = <16384>;
dcr-controller;
dcr-access-method = "native";
};
@@ -43,14 +45,14 @@
memory {
device_type = "memory";
- reg = <0 0>; /* Filled in by zImage */
+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 9>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -65,91 +67,91 @@
SDRAM0: memory-controller {
compatible = "ibm,sdram-405gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
MAL: mcmal {
compatible = "ibm,mcmal-405gp", "ibm,mcmal";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <1>;
num-rx-chans = <1>;
interrupt-parent = <&UIC0>;
interrupts = <
- b 4 /* TXEOB */
- c 4 /* RXEOB */
- a 4 /* SERR */
- d 4 /* TXDE */
- e 4 /* RXDE */>;
+ 0xb 0x4 /* TXEOB */
+ 0xc 0x4 /* RXEOB */
+ 0xa 0x4 /* SERR */
+ 0xd 0x4 /* TXDE */
+ 0xe 0x4 /* RXDE */>;
};
POB0: opb {
compatible = "ibm,opb-405gp", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <ef600000 ef600000 a00000>;
- dcr-reg = <0a0 5>;
+ ranges = <0xef600000 0xef600000 0x00a00000>;
+ dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by zImage */
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <2580>;
+ current-speed = <9600>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600400 8>;
- virtual-reg = <ef600400>;
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <2580>;
+ current-speed = <9600>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
IIC: i2c@ef600500 {
compatible = "ibm,iic-405gp", "ibm,iic";
- reg = <ef600500 11>;
+ reg = <0xef600500 0x00000011>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
GPIO: gpio@ef600700 {
compatible = "ibm,gpio-405gp";
- reg = <ef600700 20>;
+ reg = <0xef600700 0x00000020>;
};
EMAC: ethernet@ef600800 {
- linux,network-index = <0>;
+ linux,network-index = <0x0>;
device_type = "network";
compatible = "ibm,emac-405gp", "ibm,emac";
interrupt-parent = <&UIC0>;
interrupts = <
- f 4 /* Ethernet */
- 9 4 /* Ethernet Wake Up */>;
+ 0xf 0x4 /* Ethernet */
+ 0x9 0x4 /* Ethernet Wake Up */>;
local-mac-address = [000000000000]; /* Filled in by zImage */
- reg = <ef600800 70>;
+ reg = <0xef600800 0x00000070>;
mal-device = <&MAL>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
};
};
EBC0: ebc {
compatible = "ibm,ebc-405gp", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
@@ -163,13 +165,13 @@
/* NVRAM and RTC */
nvrtc@4,200000 {
compatible = "ds1742";
- reg = <4 200000 0>; /* size fixed up by zImage */
+ reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */
};
/* "BCSR" CPLD contains a PCI irq controller */
bcsr@4,0 {
compatible = "ep405-bcsr";
- reg = <4 0 10>;
+ reg = <0x00000004 0x00000000 0x00000010>;
interrupt-controller;
/* Routing table */
irq-routing = [ 00 /* SYSERR */
@@ -198,26 +200,26 @@
#address-cells = <3>;
compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
primary;
- reg = <eec00000 8 /* Config space access */
- eed80000 4 /* IACK */
- eed80000 4 /* Special cycle */
- ef480000 40>; /* Internal registers */
+ reg = <0xeec00000 0x00000008 /* Config space access */
+ 0xeed80000 0x00000004 /* IACK */
+ 0xeed80000 0x00000004 /* Special cycle */
+ 0xef480000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
- ranges = <02000000 0 80000000 80000000 0 20000000
- 01000000 0 00000000 e8000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* That's all I know about IRQs on that thing ... */
- interrupt-map-mask = <f800 0 0 0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* USB */
- 7000 0 0 0 &UIC0 1e 8 /* IRQ5 */
+ 0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */
>;
};
};
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts
index 0f2fc07..24cf0db 100644
--- a/arch/powerpc/boot/dts/glacier.dts
+++ b/arch/powerpc/boot/dts/glacier.dts
@@ -8,12 +8,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,glacier";
compatible = "amcc,glacier", "amcc,canyonlands";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -31,13 +33,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,460GT";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
@@ -45,14 +47,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; /* Filled in by U-Boot */
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-460gt","ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -62,11 +64,11 @@
compatible = "ibm,uic-460gt","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -74,11 +76,11 @@
compatible = "ibm,uic-460gt","ibm,uic";
interrupt-controller;
cell-index = <2>;
- dcr-reg = <0e0 009>;
+ dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <a 4 b 4>; /* cascade */
+ interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -86,22 +88,22 @@
compatible = "ibm,uic-460gt","ibm,uic";
interrupt-controller;
cell-index = <3>;
- dcr-reg = <0f0 009>;
+ dcr-reg = <0x0f0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <10 4 11 4>; /* cascade */
+ interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-460gt";
- dcr-reg = <00e 002>;
+ dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-460gt";
- dcr-reg = <00c 002>;
+ dcr-reg = <0x00c 0x002>;
};
plb {
@@ -113,75 +115,75 @@
SDRAM0: sdram {
compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
- num-rx-chans = <20>;
+ num-rx-chans = <32>;
#address-cells = <0>;
#size-cells = <0>;
interrupt-parent = <&UIC2>;
- interrupts = < /*TXEOB*/ 6 4
- /*RXEOB*/ 7 4
- /*SERR*/ 3 4
- /*TXDE*/ 4 4
- /*RXDE*/ 5 4>;
- desc-base-addr-high = <8>;
+ interrupts = < /*TXEOB*/ 0x6 0x4
+ /*RXEOB*/ 0x7 0x4
+ /*SERR*/ 0x3 0x4
+ /*TXDE*/ 0x4 0x4
+ /*RXDE*/ 0x5 0x4>;
+ desc-base-addr-high = <0x8>;
};
POB0: opb {
compatible = "ibm,opb-460gt", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <b0000000 4 b0000000 50000000>;
+ ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-460gt", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
- interrupts = <6 4>;
+ interrupts = <0x6 0x4>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
- reg = <0 000000 4000000>;
+ reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
- reg = <0 1e0000>;
+ reg = <0x00000000 0x001e0000>;
};
partition@1e0000 {
label = "dtb";
- reg = <1e0000 20000>;
+ reg = <0x001e0000 0x00020000>;
};
partition@200000 {
label = "ramdisk";
- reg = <200000 1400000>;
+ reg = <0x00200000 0x01400000>;
};
partition@1600000 {
label = "jffs2";
- reg = <1600000 400000>;
+ reg = <0x01600000 0x00400000>;
};
partition@1a00000 {
label = "user";
- reg = <1a00000 2560000>;
+ reg = <0x01a00000 0x02560000>;
};
partition@3f60000 {
label = "env";
- reg = <3f60000 40000>;
+ reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
- reg = <3fa0000 60000>;
+ reg = <0x03fa0000 0x00060000>;
};
};
};
@@ -189,109 +191,109 @@
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600400 8>;
- virtual-reg = <ef600400>;
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600500 8>;
- virtual-reg = <ef600500>;
+ reg = <0xef600500 0x00000008>;
+ virtual-reg = <0xef600500>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
- interrupts = <1d 4>;
+ interrupts = <0x1d 0x4>;
};
UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600600 8>;
- virtual-reg = <ef600600>;
+ reg = <0xef600600 0x00000008>;
+ virtual-reg = <0xef600600>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>; /* Filled in by U-Boot */
interrupt-parent = <&UIC1>;
- interrupts = <1e 4>;
+ interrupts = <0x1e 0x4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-460gt", "ibm,iic";
- reg = <ef600700 14>;
+ reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600800 {
compatible = "ibm,iic-460gt", "ibm,iic";
- reg = <ef600800 14>;
+ reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-460gt", "ibm,zmii";
- reg = <ef600d00 c>;
+ reg = <0xef600d00 0x0000000c>;
};
RGMII0: emac-rgmii@ef601500 {
compatible = "ibm,rgmii-460gt", "ibm,rgmii";
- reg = <ef601500 8>;
+ reg = <0xef601500 0x00000008>;
has-mdio;
};
RGMII1: emac-rgmii@ef601600 {
compatible = "ibm,rgmii-460gt", "ibm,rgmii";
- reg = <ef601600 8>;
+ reg = <0xef601600 0x00000008>;
has-mdio;
};
TAH0: emac-tah@ef601350 {
compatible = "ibm,tah-460gt", "ibm,tah";
- reg = <ef601350 30>;
+ reg = <0xef601350 0x00000030>;
};
TAH1: emac-tah@ef601450 {
compatible = "ibm,tah-460gt", "ibm,tah";
- reg = <ef601450 30>;
+ reg = <0xef601450 0x00000030>;
};
EMAC0: ethernet@ef600e00 {
device_type = "network";
compatible = "ibm,emac-460gt", "ibm,emac4";
interrupt-parent = <&EMAC0>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC2 10 4
- /*Wake*/ 1 &UIC2 14 4>;
- reg = <ef600e00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
+ /*Wake*/ 0x1 &UIC2 0x14 0x4>;
+ reg = <0xef600e00 0x00000074>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
tah-device = <&TAH0>;
@@ -304,23 +306,23 @@
device_type = "network";
compatible = "ibm,emac-460gt", "ibm,emac4";
interrupt-parent = <&EMAC1>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC2 11 4
- /*Wake*/ 1 &UIC2 15 4>;
- reg = <ef600f00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
+ /*Wake*/ 0x1 &UIC2 0x15 0x4>;
+ reg = <0xef600f00 0x00000074>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <8>;
cell-index = <1>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
tah-device = <&TAH1>;
@@ -334,23 +336,23 @@
device_type = "network";
compatible = "ibm,emac-460gt", "ibm,emac4";
interrupt-parent = <&EMAC2>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC2 12 4
- /*Wake*/ 1 &UIC2 16 4>;
- reg = <ef601100 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
+ /*Wake*/ 0x1 &UIC2 0x16 0x4>;
+ reg = <0xef601100 0x00000074>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <2>;
- mal-rx-channel = <10>;
+ mal-rx-channel = <16>;
cell-index = <2>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII1>;
rgmii-channel = <0>;
has-inverted-stacr-oc;
@@ -362,23 +364,23 @@
device_type = "network";
compatible = "ibm,emac-460gt", "ibm,emac4";
interrupt-parent = <&EMAC3>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC2 13 4
- /*Wake*/ 1 &UIC2 17 4>;
- reg = <ef601200 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4
+ /*Wake*/ 0x1 &UIC2 0x17 0x4>;
+ reg = <0xef601200 0x00000074>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <3>;
- mal-rx-channel = <18>;
+ mal-rx-channel = <24>;
cell-index = <3>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII1>;
rgmii-channel = <1>;
has-inverted-stacr-oc;
@@ -396,27 +398,27 @@
primary;
large-inbound-windows;
enable-msi-hole;
- reg = <c 0ec00000 8 /* Config space access */
- 0 0 0 /* no IACK cycles */
- c 0ed00000 4 /* Special cycles */
- c 0ec80000 100 /* Internal registers */
- c 0ec80100 fc>; /* Internal messaging registers */
+ reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
+ 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
+ 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
+ 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
+ 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
- 01000000 0 00000000 0000000c 08000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0 to 0x3f */
- bus-range = <0 3f>;
+ bus-range = <0x0 0x3f>;
/* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
- interrupt-map-mask = <0000 0 0 0>;
- interrupt-map = < 0000 0 0 0 &UIC1 0 8 >;
+ interrupt-map-mask = <0x0 0x0 0x0 0x0>;
+ interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
};
PCIE0: pciex@d00000000 {
@@ -426,23 +428,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
primary;
- port = <0>; /* port number */
- reg = <d 00000000 20000000 /* Config space access */
- c 08010000 00001000>; /* Registers */
- dcr-reg = <100 020>;
- sdr-base = <300>;
+ port = <0x0>; /* port number */
+ reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
+ 0x0000000c 0x08010000 0x00001000>; /* Registers */
+ dcr-reg = <0x100 0x020>;
+ sdr-base = <0x300>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
- 01000000 0 00000000 0000000f 80000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 40 to 0x7f */
- bus-range = <40 7f>;
+ bus-range = <0x40 0x7f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -452,12 +454,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC3 c 4 /* swizzled int A */
- 0000 0 0 2 &UIC3 d 4 /* swizzled int B */
- 0000 0 0 3 &UIC3 e 4 /* swizzled int C */
- 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
};
PCIE1: pciex@d20000000 {
@@ -467,23 +469,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
primary;
- port = <1>; /* port number */
- reg = <d 20000000 20000000 /* Config space access */
- c 08011000 00001000>; /* Registers */
- dcr-reg = <120 020>;
- sdr-base = <340>;
+ port = <0x1>; /* port number */
+ reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
+ 0x0000000c 0x08011000 0x00001000>; /* Registers */
+ dcr-reg = <0x120 0x020>;
+ sdr-base = <0x340>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
- 01000000 0 00000000 0000000f 80010000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 80 to 0xbf */
- bus-range = <80 bf>;
+ bus-range = <0x80 0xbf>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -493,12 +495,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC3 10 4 /* swizzled int A */
- 0000 0 0 2 &UIC3 11 4 /* swizzled int B */
- 0000 0 0 3 &UIC3 12 4 /* swizzled int C */
- 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
};
};
};
diff --git a/arch/powerpc/boot/dts/haleakala.dts b/arch/powerpc/boot/dts/haleakala.dts
index b5d95ac..513bc43 100644
--- a/arch/powerpc/boot/dts/haleakala.dts
+++ b/arch/powerpc/boot/dts/haleakala.dts
@@ -8,12 +8,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "amcc,haleakala";
compatible = "amcc,haleakala", "amcc,kilauea";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -28,13 +30,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,405EXr";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <4000>; /* 16 kB */
- d-cache-size = <4000>; /* 16 kB */
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <16384>; /* 16 kB */
+ d-cache-size = <16384>; /* 16 kB */
dcr-controller;
dcr-access-method = "native";
};
@@ -42,14 +44,14 @@
memory {
device_type = "memory";
- reg = <0 0>; /* Filled in by U-Boot */
+ reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller {
compatible = "ibm,uic-405exr", "ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -59,11 +61,11 @@
compatible = "ibm,uic-405exr","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -71,11 +73,11 @@
compatible = "ibm,uic-405exr","ibm,uic";
interrupt-controller;
cell-index = <2>;
- dcr-reg = <0e0 009>;
+ dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1c 4 1d 4>; /* cascade */
+ interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -88,72 +90,72 @@
SDRAM0: memory-controller {
compatible = "ibm,sdram-405exr";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
- interrupt-map-mask = <ffffffff>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
+ interrupt-map-mask = <0xffffffff>;
};
POB0: opb {
compatible = "ibm,opb-405exr", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <80000000 80000000 10000000
- ef600000 ef600000 a00000
- f0000000 f0000000 10000000>;
- dcr-reg = <0a0 5>;
+ ranges = <0x80000000 0x80000000 0x10000000
+ 0xef600000 0xef600000 0x00a00000
+ 0xf0000000 0xf0000000 0x10000000>;
+ dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-405exr", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
- reg = <0 000000 4000000>;
+ reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
- reg = <0 200000>;
+ reg = <0x00000000 0x00200000>;
};
partition@200000 {
label = "root";
- reg = <200000 200000>;
+ reg = <0x00200000 0x00200000>;
};
partition@400000 {
label = "user";
- reg = <400000 3b60000>;
+ reg = <0x00400000 0x03b60000>;
};
partition@3f60000 {
label = "env";
- reg = <3f60000 40000>;
+ reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
- reg = <3fa0000 60000>;
+ reg = <0x03fa0000 0x00060000>;
};
};
};
@@ -161,68 +163,68 @@
UART0: serial@ef600200 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600200 8>;
- virtual-reg = <ef600200>;
+ reg = <0xef600200 0x00000008>;
+ virtual-reg = <0xef600200>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1a 4>;
+ interrupts = <0x1a 0x4>;
};
UART1: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
IIC0: i2c@ef600400 {
compatible = "ibm,iic-405exr", "ibm,iic";
- reg = <ef600400 14>;
+ reg = <0xef600400 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600500 {
compatible = "ibm,iic-405exr", "ibm,iic";
- reg = <ef600500 14>;
+ reg = <0xef600500 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
};
RGMII0: emac-rgmii@ef600b00 {
compatible = "ibm,rgmii-405exr", "ibm,rgmii";
- reg = <ef600b00 104>;
+ reg = <0xef600b00 0x00000104>;
has-mdio;
};
EMAC0: ethernet@ef600900 {
- linux,network-index = <0>;
+ linux,network-index = <0x0>;
device_type = "network";
- compatible = "ibm,emac-405exr", "ibm,emac4";
+ compatible = "ibm,emac-405exr", "ibm,emac4sync";
interrupt-parent = <&EMAC0>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 18 4
- /*Wake*/ 1 &UIC1 1d 4>;
- reg = <ef600900 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
+ /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
+ reg = <0xef600900 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
has-inverted-stacr-oc;
@@ -237,23 +239,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
primary;
- port = <0>; /* port number */
- reg = <a0000000 20000000 /* Config space access */
- ef000000 00001000>; /* Registers */
- dcr-reg = <040 020>;
- sdr-base = <400>;
+ port = <0x0>; /* port number */
+ reg = <0xa0000000 0x20000000 /* Config space access */
+ 0xef000000 0x00001000>; /* Registers */
+ dcr-reg = <0x040 0x020>;
+ sdr-base = <0x400>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 90000000 0 08000000
- 01000000 0 00000000 e0000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
+ 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0x00 to 0x3f */
- bus-range = <00 3f>;
+ bus-range = <0x0 0x3f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -263,12 +265,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC2 0 4 /* swizzled int A */
- 0000 0 0 2 &UIC2 1 4 /* swizzled int B */
- 0000 0 0 3 &UIC2 2 4 /* swizzled int C */
- 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
};
};
};
diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts
index b5d8789..f87fe7b 100644
--- a/arch/powerpc/boot/dts/holly.dts
+++ b/arch/powerpc/boot/dts/holly.dts
@@ -10,6 +10,8 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
model = "41K7339";
compatible = "ibm,holly";
@@ -21,22 +23,22 @@
#size-cells =<0>;
PowerPC,750CL@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>;
- i-cache-line-size = <20>;
- d-cache-size = <8000>;
- i-cache-size = <8000>;
- d-cache-sets = <80>;
- i-cache-sets = <80>;
- timebase-frequency = <2faf080>;
- clock-frequency = <23c34600>;
- bus-frequency = <bebc200>;
+ reg = <0x00000000>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ d-cache-sets = <128>;
+ i-cache-sets = <128>;
+ timebase-frequency = <50000000>;
+ clock-frequency = <600000000>;
+ bus-frequency = <200000000>;
};
};
memory@0 {
device_type = "memory";
- reg = <00000000 20000000>;
+ reg = <0x00000000 0x20000000>;
};
tsi109@c0000000 {
@@ -44,33 +46,33 @@
compatible = "tsi109-bridge", "tsi108-bridge";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <00000000 c0000000 00010000>;
- reg = <c0000000 00010000>;
+ ranges = <0x00000000 0xc0000000 0x00010000>;
+ reg = <0xc0000000 0x00010000>;
i2c@7000 {
device_type = "i2c";
compatible = "tsi109-i2c", "tsi108-i2c";
interrupt-parent = <&MPIC>;
- interrupts = <e 2>;
- reg = <7000 400>;
+ interrupts = <0xe 0x2>;
+ reg = <0x00007000 0x00000400>;
};
MDIO: mdio@6000 {
device_type = "mdio";
compatible = "tsi109-mdio", "tsi108-mdio";
- reg = <6000 50>;
+ reg = <0x00006000 0x00000050>;
#address-cells = <1>;
#size-cells = <0>;
PHY1: ethernet-phy@1 {
compatible = "bcm5461a";
- reg = <1>;
+ reg = <0x00000001>;
txc-rxc-delay-disable;
};
PHY2: ethernet-phy@2 {
compatible = "bcm5461a";
- reg = <2>;
+ reg = <0x00000002>;
txc-rxc-delay-disable;
};
};
@@ -80,10 +82,10 @@
compatible = "tsi109-ethernet", "tsi108-ethernet";
#address-cells = <1>;
#size-cells = <0>;
- reg = <6000 200>;
+ reg = <0x00006000 0x00000200>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = <&MPIC>;
- interrupts = <10 2>;
+ interrupts = <0x10 0x2>;
mdio-handle = <&MDIO>;
phy-handle = <&PHY1>;
};
@@ -93,10 +95,10 @@
compatible = "tsi109-ethernet", "tsi108-ethernet";
#address-cells = <1>;
#size-cells = <0>;
- reg = <6400 200>;
+ reg = <0x00006400 0x00000200>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = <&MPIC>;
- interrupts = <11 2>;
+ interrupts = <0x11 0x2>;
mdio-handle = <&MDIO>;
phy-handle = <&PHY2>;
};
@@ -104,23 +106,23 @@
serial@7808 {
device_type = "serial";
compatible = "ns16550";
- reg = <7808 200>;
- virtual-reg = <c0007808>;
- clock-frequency = <3F9C6000>;
- current-speed = <1c200>;
+ reg = <0x00007808 0x00000200>;
+ virtual-reg = <0xc0007808>;
+ clock-frequency = <1067212800>;
+ current-speed = <115200>;
interrupt-parent = <&MPIC>;
- interrupts = <c 2>;
+ interrupts = <0xc 0x2>;
};
serial@7c08 {
device_type = "serial";
compatible = "ns16550";
- reg = <7c08 200>;
- virtual-reg = <c0007c08>;
- clock-frequency = <3F9C6000>;
- current-speed = <1c200>;
+ reg = <0x00007c08 0x00000200>;
+ virtual-reg = <0xc0007c08>;
+ clock-frequency = <1067212800>;
+ current-speed = <115200>;
interrupt-parent = <&MPIC>;
- interrupts = <d 2>;
+ interrupts = <0xd 0x2>;
};
MPIC: pic@7400 {
@@ -128,7 +130,7 @@
compatible = "chrp,open-pic";
interrupt-controller;
#interrupt-cells = <2>;
- reg = <7400 400>;
+ reg = <0x00007400 0x00000400>;
big-endian;
};
@@ -138,42 +140,42 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <1000 1000>;
- bus-range = <0 0>;
+ reg = <0x00001000 0x00001000>;
+ bus-range = <0x0 0x0>;
/*----------------------------------------------------+
| PCI memory range.
| 01 denotes I/O space
| 02 denotes 32-bit memory space
+----------------------------------------------------*/
- ranges = <02000000 0 40000000 40000000 0 10000000
- 01000000 0 00000000 7e000000 0 00010000>;
- clock-frequency = <7f28154>;
+ ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000
+ 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>;
+ clock-frequency = <133333332>;
interrupt-parent = <&MPIC>;
- interrupts = <17 2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupts = <0x17 0x2>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
/*----------------------------------------------------+
| The INTA, INTB, INTC, INTD are shared.
+----------------------------------------------------*/
interrupt-map = <
- 0800 0 0 1 &RT0 24 0
- 0800 0 0 2 &RT0 25 0
- 0800 0 0 3 &RT0 26 0
- 0800 0 0 4 &RT0 27 0
+ 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
+ 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
+ 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
+ 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
- 1000 0 0 1 &RT0 25 0
- 1000 0 0 2 &RT0 26 0
- 1000 0 0 3 &RT0 27 0
- 1000 0 0 4 &RT0 24 0
+ 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
+ 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
+ 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
+ 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
- 1800 0 0 1 &RT0 26 0
- 1800 0 0 2 &RT0 27 0
- 1800 0 0 3 &RT0 24 0
- 1800 0 0 4 &RT0 25 0
+ 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
+ 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
+ 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
+ 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
- 2000 0 0 1 &RT0 27 0
- 2000 0 0 2 &RT0 24 0
- 2000 0 0 3 &RT0 25 0
- 2000 0 0 4 &RT0 26 0
+ 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
+ 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
+ 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
+ 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
>;
RT0: router@1180 {
@@ -183,7 +185,7 @@
clock-frequency = <0>;
#address-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <17 2>;
+ interrupts = <0x17 0x2>;
interrupt-parent = <&MPIC>;
};
};
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
index cc2873a..077819b 100644
--- a/arch/powerpc/boot/dts/katmai.dts
+++ b/arch/powerpc/boot/dts/katmai.dts
@@ -12,12 +12,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,katmai";
compatible = "amcc,katmai";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -33,13 +35,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440SPe";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
@@ -47,14 +49,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; /* Filled in by zImage */
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440spe","ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -64,11 +66,11 @@
compatible = "ibm,uic-440spe","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -76,11 +78,11 @@
compatible = "ibm,uic-440spe","ibm,uic";
interrupt-controller;
cell-index = <2>;
- dcr-reg = <0e0 009>;
+ dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <a 4 b 4>; /* cascade */
+ interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -88,22 +90,22 @@
compatible = "ibm,uic-440spe","ibm,uic";
interrupt-controller;
cell-index = <3>;
- dcr-reg = <0f0 009>;
+ dcr-reg = <0x0f0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <10 4 11 4>; /* cascade */
+ interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-440spe";
- dcr-reg = <00e 002>;
+ dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-440spe";
- dcr-reg = <00c 002>;
+ dcr-reg = <0x00c 0x002>;
};
plb {
@@ -115,108 +117,108 @@
SDRAM0: sdram {
compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <1>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC1 6 4
- /*RXEOB*/ 1 &UIC1 7 4
- /*SERR*/ 2 &UIC1 1 4
- /*TXDE*/ 3 &UIC1 2 4
- /*RXDE*/ 4 &UIC1 3 4>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
+ /*RXEOB*/ 0x1 &UIC1 0x7 0x4
+ /*SERR*/ 0x2 &UIC1 0x1 0x4
+ /*TXDE*/ 0x3 &UIC1 0x2 0x4
+ /*RXDE*/ 0x4 &UIC1 0x3 0x4>;
};
POB0: opb {
compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <00000000 4 e0000000 20000000>;
+ ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>;
clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc {
compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
};
UART0: serial@10000200 {
device_type = "serial";
compatible = "ns16550";
- reg = <10000200 8>;
- virtual-reg = <a0000200>;
+ reg = <0x10000200 0x00000008>;
+ virtual-reg = <0xa0000200>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <1c200>;
+ current-speed = <115200>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@10000300 {
device_type = "serial";
compatible = "ns16550";
- reg = <10000300 8>;
- virtual-reg = <a0000300>;
+ reg = <0x10000300 0x00000008>;
+ virtual-reg = <0xa0000300>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART2: serial@10000600 {
device_type = "serial";
compatible = "ns16550";
- reg = <10000600 8>;
- virtual-reg = <a0000600>;
+ reg = <0x10000600 0x00000008>;
+ virtual-reg = <0xa0000600>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC1>;
- interrupts = <5 4>;
+ interrupts = <0x5 0x4>;
};
IIC0: i2c@10000400 {
compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
- reg = <10000400 14>;
+ reg = <0x10000400 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@10000500 {
compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
- reg = <10000500 14>;
+ reg = <0x10000500 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
};
EMAC0: ethernet@10000800 {
- linux,network-index = <0>;
+ linux,network-index = <0x0>;
device_type = "network";
compatible = "ibm,emac-440spe", "ibm,emac4";
interrupt-parent = <&UIC1>;
- interrupts = <1c 4 1d 4>;
- reg = <10000800 70>;
+ interrupts = <0x1c 0x4 0x1d 0x4>;
+ reg = <0x10000800 0x00000074>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "gmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
has-inverted-stacr-oc;
has-new-stacr-staopc;
};
@@ -231,23 +233,23 @@
primary;
large-inbound-windows;
enable-msi-hole;
- reg = <c 0ec00000 8 /* Config space access */
- 0 0 0 /* no IACK cycles */
- c 0ed00000 4 /* Special cycles */
- c 0ec80000 100 /* Internal registers */
- c 0ec80100 fc>; /* Internal messaging registers */
+ reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
+ 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
+ 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
+ 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
+ 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
- 01000000 0 00000000 0000000c 08000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0 to 0xf */
- bus-range = <0 f>;
+ bus-range = <0x0 0xf>;
/*
* On Katmai, the following PCI-X interrupts signals
@@ -258,13 +260,13 @@
* INTC: J2: 1-2
* INTD: J1: 1-2
*/
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 1 */
- 0800 0 0 1 &UIC1 14 8
- 0800 0 0 2 &UIC1 13 8
- 0800 0 0 3 &UIC1 12 8
- 0800 0 0 4 &UIC1 11 8
+ 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8
+ 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8
+ 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8
+ 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8
>;
};
@@ -275,23 +277,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
primary;
- port = <0>; /* port number */
- reg = <d 00000000 20000000 /* Config space access */
- c 10000000 00001000>; /* Registers */
- dcr-reg = <100 020>;
- sdr-base = <300>;
+ port = <0x0>; /* port number */
+ reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
+ 0x0000000c 0x10000000 0x00001000>; /* Registers */
+ dcr-reg = <0x100 0x020>;
+ sdr-base = <0x300>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
- 01000000 0 00000000 0000000f 80000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 10 to 0x1f */
- bus-range = <10 1f>;
+ bus-range = <0x10 0x1f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -301,12 +303,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC3 0 4 /* swizzled int A */
- 0000 0 0 2 &UIC3 1 4 /* swizzled int B */
- 0000 0 0 3 &UIC3 2 4 /* swizzled int C */
- 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
};
PCIE1: pciex@d20000000 {
@@ -316,23 +318,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
primary;
- port = <1>; /* port number */
- reg = <d 20000000 20000000 /* Config space access */
- c 10001000 00001000>; /* Registers */
- dcr-reg = <120 020>;
- sdr-base = <340>;
+ port = <0x1>; /* port number */
+ reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
+ 0x0000000c 0x10001000 0x00001000>; /* Registers */
+ dcr-reg = <0x120 0x020>;
+ sdr-base = <0x340>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
- 01000000 0 00000000 0000000f 80010000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 10 to 0x1f */
- bus-range = <20 2f>;
+ bus-range = <0x20 0x2f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -342,12 +344,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC3 4 4 /* swizzled int A */
- 0000 0 0 2 &UIC3 5 4 /* swizzled int B */
- 0000 0 0 3 &UIC3 6 4 /* swizzled int C */
- 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
};
PCIE2: pciex@d40000000 {
@@ -357,23 +359,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
primary;
- port = <2>; /* port number */
- reg = <d 40000000 20000000 /* Config space access */
- c 10002000 00001000>; /* Registers */
- dcr-reg = <140 020>;
- sdr-base = <370>;
+ port = <0x2>; /* port number */
+ reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */
+ 0x0000000c 0x10002000 0x00001000>; /* Registers */
+ dcr-reg = <0x140 0x020>;
+ sdr-base = <0x370>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 0000000f 00000000 0 80000000
- 01000000 0 00000000 0000000f 80020000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 10 to 0x1f */
- bus-range = <30 3f>;
+ bus-range = <0x30 0x3f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -383,12 +385,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC3 8 4 /* swizzled int A */
- 0000 0 0 2 &UIC3 9 4 /* swizzled int B */
- 0000 0 0 3 &UIC3 a 4 /* swizzled int C */
- 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
};
};
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 48c9a6e..dececc4 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -8,12 +8,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "amcc,kilauea";
compatible = "amcc,kilauea";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -29,13 +31,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,405EX";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <4000>; /* 16 kB */
- d-cache-size = <4000>; /* 16 kB */
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <16384>; /* 16 kB */
+ d-cache-size = <16384>; /* 16 kB */
dcr-controller;
dcr-access-method = "native";
};
@@ -43,14 +45,14 @@
memory {
device_type = "memory";
- reg = <0 0>; /* Filled in by U-Boot */
+ reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller {
compatible = "ibm,uic-405ex", "ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -60,11 +62,11 @@
compatible = "ibm,uic-405ex","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -72,11 +74,11 @@
compatible = "ibm,uic-405ex","ibm,uic";
interrupt-controller;
cell-index = <2>;
- dcr-reg = <0e0 009>;
+ dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1c 4 1d 4>; /* cascade */
+ interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -89,72 +91,72 @@
SDRAM0: memory-controller {
compatible = "ibm,sdram-405ex";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
- interrupt-map-mask = <ffffffff>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
+ interrupt-map-mask = <0xffffffff>;
};
POB0: opb {
compatible = "ibm,opb-405ex", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <80000000 80000000 10000000
- ef600000 ef600000 a00000
- f0000000 f0000000 10000000>;
- dcr-reg = <0a0 5>;
+ ranges = <0x80000000 0x80000000 0x10000000
+ 0xef600000 0xef600000 0x00a00000
+ 0xf0000000 0xf0000000 0x10000000>;
+ dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-405ex", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
- reg = <0 000000 4000000>;
+ reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
- reg = <0 200000>;
+ reg = <0x00000000 0x00200000>;
};
partition@200000 {
label = "root";
- reg = <200000 200000>;
+ reg = <0x00200000 0x00200000>;
};
partition@400000 {
label = "user";
- reg = <400000 3b60000>;
+ reg = <0x00400000 0x03b60000>;
};
partition@3f60000 {
label = "env";
- reg = <3f60000 40000>;
+ reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
- reg = <3fa0000 60000>;
+ reg = <0x03fa0000 0x00060000>;
};
};
};
@@ -162,68 +164,68 @@
UART0: serial@ef600200 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600200 8>;
- virtual-reg = <ef600200>;
+ reg = <0xef600200 0x00000008>;
+ virtual-reg = <0xef600200>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1a 4>;
+ interrupts = <0x1a 0x4>;
};
UART1: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
IIC0: i2c@ef600400 {
compatible = "ibm,iic-405ex", "ibm,iic";
- reg = <ef600400 14>;
+ reg = <0xef600400 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600500 {
compatible = "ibm,iic-405ex", "ibm,iic";
- reg = <ef600500 14>;
+ reg = <0xef600500 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
};
RGMII0: emac-rgmii@ef600b00 {
compatible = "ibm,rgmii-405ex", "ibm,rgmii";
- reg = <ef600b00 104>;
+ reg = <0xef600b00 0x00000104>;
has-mdio;
};
EMAC0: ethernet@ef600900 {
- linux,network-index = <0>;
+ linux,network-index = <0x0>;
device_type = "network";
- compatible = "ibm,emac-405ex", "ibm,emac4";
+ compatible = "ibm,emac-405ex", "ibm,emac4sync";
interrupt-parent = <&EMAC0>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 18 4
- /*Wake*/ 1 &UIC1 1d 4>;
- reg = <ef600900 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
+ /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
+ reg = <0xef600900 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
has-inverted-stacr-oc;
@@ -231,27 +233,27 @@
};
EMAC1: ethernet@ef600a00 {
- linux,network-index = <1>;
+ linux,network-index = <0x1>;
device_type = "network";
- compatible = "ibm,emac-405ex", "ibm,emac4";
+ compatible = "ibm,emac-405ex", "ibm,emac4sync";
interrupt-parent = <&EMAC1>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 19 4
- /*Wake*/ 1 &UIC1 1f 4>;
- reg = <ef600a00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
+ /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
+ reg = <0xef600a00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
has-inverted-stacr-oc;
@@ -266,23 +268,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
primary;
- port = <0>; /* port number */
- reg = <a0000000 20000000 /* Config space access */
- ef000000 00001000>; /* Registers */
- dcr-reg = <040 020>;
- sdr-base = <400>;
+ port = <0x0>; /* port number */
+ reg = <0xa0000000 0x20000000 /* Config space access */
+ 0xef000000 0x00001000>; /* Registers */
+ dcr-reg = <0x040 0x020>;
+ sdr-base = <0x400>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 90000000 0 08000000
- 01000000 0 00000000 e0000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
+ 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0x00 to 0x3f */
- bus-range = <00 3f>;
+ bus-range = <0x0 0x3f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -292,12 +294,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC2 0 4 /* swizzled int A */
- 0000 0 0 2 &UIC2 1 4 /* swizzled int B */
- 0000 0 0 3 &UIC2 2 4 /* swizzled int C */
- 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
};
PCIE1: pciex@0c0000000 {
@@ -307,23 +309,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
primary;
- port = <1>; /* port number */
- reg = <c0000000 20000000 /* Config space access */
- ef001000 00001000>; /* Registers */
- dcr-reg = <060 020>;
- sdr-base = <440>;
+ port = <0x1>; /* port number */
+ reg = <0xc0000000 0x20000000 /* Config space access */
+ 0xef001000 0x00001000>; /* Registers */
+ dcr-reg = <0x060 0x020>;
+ sdr-base = <0x440>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 98000000 0 08000000
- 01000000 0 00000000 e0010000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
+ 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0x40 to 0x7f */
- bus-range = <40 7f>;
+ bus-range = <0x40 0x7f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -333,12 +335,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC2 b 4 /* swizzled int A */
- 0000 0 0 2 &UIC2 c 4 /* swizzled int B */
- 0000 0 0 3 &UIC2 d 4 /* swizzled int C */
- 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
};
};
};
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index f869ce3c..4973758 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>; /* From U-boot */
bus-frequency = <0>; /* From U-boot */
clock-frequency = <0>; /* From U-boot */
+ next-level-cache = <&L2>;
};
};
@@ -58,16 +59,16 @@
memory-controller@2000 {
compatible = "fsl,8540-memory-controller";
reg = <0x2000 0x1000>;
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
interrupts = <0x12 0x2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; /* 32 bytes */
cache-size = <0x40000>; /* L2, 256K */
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
interrupts = <0x10 0x2>;
};
@@ -78,10 +79,51 @@
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <0x2b 0x2>;
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 { /* For TSECs */
#address-cells = <1>;
#size-cells = <0>;
@@ -89,13 +131,13 @@
reg = <0x24520 0x20>;
PHY1: ethernet-phy@1 {
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
reg = <0x1>;
device_type = "ethernet-phy";
};
PHY2: ethernet-phy@2 {
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
reg = <0x2>;
device_type = "ethernet-phy";
};
@@ -109,7 +151,7 @@
/* Mac address filled in by bootwrapper */
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
phy-handle = <&PHY1>;
};
@@ -121,11 +163,11 @@
/* Mac address filled in by bootwrapper */
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
phy-handle = <&PHY2>;
};
- MPIC: pic@40000 {
+ mpic: pic@40000 {
#address-cells = <0>;
#interrupt-cells = <2>;
interrupt-controller;
@@ -164,7 +206,7 @@
#interrupt-cells = <2>;
interrupt-controller;
interrupts = <0x2e 0x2>;
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
reg = <0x90c00 0x80>;
compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
};
@@ -202,7 +244,7 @@
fsl,mdc-pin = <25>;
PHY0: ethernet-phy@0 {
- interrupt-parent = <&MPIC>;
+ interrupt-parent = <&mpic>;
reg = <0x0>;
device_type = "ethernet-phy";
};
diff --git a/arch/powerpc/boot/dts/makalu.dts b/arch/powerpc/boot/dts/makalu.dts
index 84cc5e7..945508c 100644
--- a/arch/powerpc/boot/dts/makalu.dts
+++ b/arch/powerpc/boot/dts/makalu.dts
@@ -8,12 +8,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "amcc,makalu";
compatible = "amcc,makalu";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -29,13 +31,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,405EX";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by U-Boot */
timebase-frequency = <0>; /* Filled in by U-Boot */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <4000>; /* 16 kB */
- d-cache-size = <4000>; /* 16 kB */
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <16384>; /* 16 kB */
+ d-cache-size = <16384>; /* 16 kB */
dcr-controller;
dcr-access-method = "native";
};
@@ -43,14 +45,14 @@
memory {
device_type = "memory";
- reg = <0 0>; /* Filled in by U-Boot */
+ reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
};
UIC0: interrupt-controller {
compatible = "ibm,uic-405ex", "ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -60,11 +62,11 @@
compatible = "ibm,uic-405ex","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -72,11 +74,11 @@
compatible = "ibm,uic-405ex","ibm,uic";
interrupt-controller;
cell-index = <2>;
- dcr-reg = <0e0 009>;
+ dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1c 4 1d 4>; /* cascade */
+ interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -89,72 +91,72 @@
SDRAM0: memory-controller {
compatible = "ibm,sdram-405ex";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
- interrupt-map-mask = <ffffffff>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
+ interrupt-map-mask = <0xffffffff>;
};
POB0: opb {
compatible = "ibm,opb-405ex", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <80000000 80000000 10000000
- ef600000 ef600000 a00000
- f0000000 f0000000 10000000>;
- dcr-reg = <0a0 5>;
+ ranges = <0x80000000 0x80000000 0x10000000
+ 0xef600000 0xef600000 0x00a00000
+ 0xf0000000 0xf0000000 0x10000000>;
+ dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by U-Boot */
EBC0: ebc {
compatible = "ibm,ebc-405ex", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
/* ranges property is supplied by U-Boot */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl512n", "cfi-flash";
bank-width = <2>;
- reg = <0 000000 4000000>;
+ reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
- reg = <0 200000>;
+ reg = <0x00000000 0x00200000>;
};
partition@200000 {
label = "root";
- reg = <200000 200000>;
+ reg = <0x00200000 0x00200000>;
};
partition@400000 {
label = "user";
- reg = <400000 3b60000>;
+ reg = <0x00400000 0x03b60000>;
};
partition@3f60000 {
label = "env";
- reg = <3f60000 40000>;
+ reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
- reg = <3fa0000 60000>;
+ reg = <0x03fa0000 0x00060000>;
};
};
};
@@ -162,68 +164,68 @@
UART0: serial@ef600200 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600200 8>;
- virtual-reg = <ef600200>;
+ reg = <0xef600200 0x00000008>;
+ virtual-reg = <0xef600200>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1a 4>;
+ interrupts = <0x1a 0x4>;
};
UART1: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by U-Boot */
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
IIC0: i2c@ef600400 {
compatible = "ibm,iic-405ex", "ibm,iic";
- reg = <ef600400 14>;
+ reg = <0xef600400 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600500 {
compatible = "ibm,iic-405ex", "ibm,iic";
- reg = <ef600500 14>;
+ reg = <0xef600500 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
};
RGMII0: emac-rgmii@ef600b00 {
compatible = "ibm,rgmii-405ex", "ibm,rgmii";
- reg = <ef600b00 104>;
+ reg = <0xef600b00 0x00000104>;
has-mdio;
};
EMAC0: ethernet@ef600900 {
- linux,network-index = <0>;
+ linux,network-index = <0x0>;
device_type = "network";
- compatible = "ibm,emac-405ex", "ibm,emac4";
+ compatible = "ibm,emac-405ex", "ibm,emac4sync";
interrupt-parent = <&EMAC0>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 18 4
- /*Wake*/ 1 &UIC1 1d 4>;
- reg = <ef600900 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
+ /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
+ reg = <0xef600900 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <0000003f>; /* Start at 6 */
+ phy-map = <0x0000003f>; /* Start at 6 */
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
has-inverted-stacr-oc;
@@ -231,27 +233,27 @@
};
EMAC1: ethernet@ef600a00 {
- linux,network-index = <1>;
+ linux,network-index = <0x1>;
device_type = "network";
- compatible = "ibm,emac-405ex", "ibm,emac4";
+ compatible = "ibm,emac-405ex", "ibm,emac4sync";
interrupt-parent = <&EMAC1>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 19 4
- /*Wake*/ 1 &UIC1 1f 4>;
- reg = <ef600a00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
+ /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
+ reg = <0xef600a00 0x000000c4>;
local-mac-address = [000000000000]; /* Filled in by U-Boot */
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
has-inverted-stacr-oc;
@@ -266,23 +268,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
primary;
- port = <0>; /* port number */
- reg = <a0000000 20000000 /* Config space access */
- ef000000 00001000>; /* Registers */
- dcr-reg = <040 020>;
- sdr-base = <400>;
+ port = <0x0>; /* port number */
+ reg = <0xa0000000 0x20000000 /* Config space access */
+ 0xef000000 0x00001000>; /* Registers */
+ dcr-reg = <0x040 0x020>;
+ sdr-base = <0x400>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 90000000 0 08000000
- 01000000 0 00000000 e0000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
+ 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0x00 to 0x3f */
- bus-range = <00 3f>;
+ bus-range = <0x0 0x3f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -292,12 +294,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC2 0 4 /* swizzled int A */
- 0000 0 0 2 &UIC2 1 4 /* swizzled int B */
- 0000 0 0 3 &UIC2 2 4 /* swizzled int C */
- 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
};
PCIE1: pciex@0c0000000 {
@@ -307,23 +309,23 @@
#address-cells = <3>;
compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
primary;
- port = <1>; /* port number */
- reg = <c0000000 20000000 /* Config space access */
- ef001000 00001000>; /* Registers */
- dcr-reg = <060 020>;
- sdr-base = <440>;
+ port = <0x1>; /* port number */
+ reg = <0xc0000000 0x20000000 /* Config space access */
+ 0xef001000 0x00001000>; /* Registers */
+ dcr-reg = <0x060 0x020>;
+ sdr-base = <0x440>;
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 98000000 0 08000000
- 01000000 0 00000000 e0010000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
+ 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* This drives busses 0x40 to 0x7f */
- bus-range = <40 7f>;
+ bus-range = <0x40 0x7f>;
/* Legacy interrupts (note the weird polarity, the bridge seems
* to invert PCIe legacy interrupts).
@@ -333,12 +335,12 @@
* below are basically de-swizzled numbers.
* The real slot is on idsel 0, so the swizzling is 1:1
*/
- interrupt-map-mask = <0000 0 0 7>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
interrupt-map = <
- 0000 0 0 1 &UIC2 b 4 /* swizzled int A */
- 0000 0 0 2 &UIC2 c 4 /* swizzled int B */
- 0000 0 0 3 &UIC2 d 4 /* swizzled int C */
- 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>;
+ 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
+ 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
+ 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
+ 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
};
};
};
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index 94ad7b2..1f9036c 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -1,7 +1,7 @@
/*
- * MPC5121E MDS Device Tree Source
+ * MPC5121E ADS Device Tree Source
*
- * Copyright 2007 Freescale Semiconductor Inc.
+ * Copyright 2007,2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -17,6 +17,10 @@
#address-cells = <1>;
#size-cells = <1>;
+ aliases {
+ pci = &pci;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -39,8 +43,41 @@
reg = <0x00000000 0x10000000>; // 256MB at 0
};
+ mbx@20000000 {
+ compatible = "fsl,mpc5121-mbx";
+ reg = <0x20000000 0x4000>;
+ interrupts = <66 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sram@30000000 {
+ compatible = "fsl,mpc5121-sram";
+ reg = <0x30000000 0x20000>; // 128K at 0x30000000
+ };
+
+ nfc@40000000 {
+ compatible = "fsl,mpc5121-nfc";
+ reg = <0x40000000 0x100000>; // 1M at 0x40000000
+ interrupts = <6 8>;
+ interrupt-parent = < &ipic >;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ bank-width = <1>;
+ // ADS has two Hynix 512MB Nand flash chips in a single
+ // stacked package .
+ chips = <2>;
+ nand0@0 {
+ label = "nand0";
+ reg = <0x00000000 0x02000000>; // first 32 MB of chip 0
+ };
+ nand1@20000000 {
+ label = "nand1";
+ reg = <0x20000000 0x02000000>; // first 32 MB of chip 1
+ };
+ };
+
localbus@80000020 {
- compatible = "fsl,mpc5121ads-localbus";
+ compatible = "fsl,mpc5121-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x80000020 0x40>;
@@ -51,14 +88,51 @@
flash@0,0 {
compatible = "cfi-flash";
reg = <0 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
bank-width = <4>;
- device-width = <1>;
+ device-width = <2>;
+ protected@0 {
+ label = "protected";
+ reg = <0x00000000 0x00040000>; // first sector is protected
+ read-only;
+ };
+ filesystem@40000 {
+ label = "filesystem";
+ reg = <0x00040000 0x03c00000>; // 60M for filesystem
+ };
+ kernel@3c40000 {
+ label = "kernel";
+ reg = <0x03c40000 0x00280000>; // 2.5M for kernel
+ };
+ device-tree@3ec0000 {
+ label = "device-tree";
+ reg = <0x03ec0000 0x00040000>; // one sector for device tree
+ };
+ u-boot@3f00000 {
+ label = "u-boot";
+ reg = <0x03f00000 0x00100000>; // 1M for u-boot
+ read-only;
+ };
};
board-control@2,0 {
compatible = "fsl,mpc5121ads-cpld";
reg = <0x2 0x0 0x8000>;
};
+
+ cpld_pic: pic@2,a {
+ compatible = "fsl,mpc5121ads-cpld-pic";
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0x2 0xa 0x5>;
+ interrupt-parent = < &ipic >;
+ // irq routing
+ // all irqs but touch screen are routed to irq0 (ipic 48)
+ // touch screen is statically routed to irq1 (ipic 17)
+ // so don't use it here
+ interrupts = <48 0x8>;
+ };
};
soc@80000000 {
@@ -85,38 +159,252 @@
reg = <0xc00 0x100>;
};
- // 512x PSCs are not 52xx PSCs compatible
+ rtc@a00 { // Real time clock
+ compatible = "fsl,mpc5121-rtc";
+ reg = <0xa00 0x100>;
+ interrupts = <79 0x8 80 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ clock@f00 { // Clock control
+ compatible = "fsl,mpc5121-clock";
+ reg = <0xf00 0x100>;
+ };
+
+ pmc@1000{ //Power Management Controller
+ compatible = "fsl,mpc5121-pmc";
+ reg = <0x1000 0x100>;
+ interrupts = <83 0x2>;
+ interrupt-parent = < &ipic >;
+ };
+
+ gpio@1100 {
+ compatible = "fsl,mpc5121-gpio";
+ reg = <0x1100 0x100>;
+ interrupts = <78 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ mscan@1300 {
+ compatible = "fsl,mpc5121-mscan";
+ cell-index = <0>;
+ interrupts = <12 0x8>;
+ interrupt-parent = < &ipic >;
+ reg = <0x1300 0x80>;
+ };
+
+ mscan@1380 {
+ compatible = "fsl,mpc5121-mscan";
+ cell-index = <1>;
+ interrupts = <13 0x8>;
+ interrupt-parent = < &ipic >;
+ reg = <0x1380 0x80>;
+ };
+
+ i2c@1700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5121-i2c", "fsl-i2c";
+ cell-index = <0>;
+ reg = <0x1700 0x20>;
+ interrupts = <9 0x8>;
+ interrupt-parent = < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2c@1720 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5121-i2c", "fsl-i2c";
+ cell-index = <1>;
+ reg = <0x1720 0x20>;
+ interrupts = <10 0x8>;
+ interrupt-parent = < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2c@1740 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5121-i2c", "fsl-i2c";
+ cell-index = <2>;
+ reg = <0x1740 0x20>;
+ interrupts = <11 0x8>;
+ interrupt-parent = < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2ccontrol@1760 {
+ compatible = "fsl,mpc5121-i2c-ctrl";
+ reg = <0x1760 0x8>;
+ };
+
+ axe@2000 {
+ compatible = "fsl,mpc5121-axe";
+ reg = <0x2000 0x100>;
+ interrupts = <42 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ display@2100 {
+ compatible = "fsl,mpc5121-diu", "fsl-diu";
+ reg = <0x2100 0x100>;
+ interrupts = <64 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ mdio@2800 {
+ compatible = "fsl,mpc5121-fec-mdio";
+ reg = <0x2800 0x800>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy: ethernet-phy@0 {
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@2800 {
+ device_type = "network";
+ compatible = "fsl,mpc5121-fec";
+ reg = <0x2800 0x800>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <4 0x8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy >;
+ fsl,align-tx-packets = <4>;
+ };
+
+ // 5121e has two dr usb modules
+ // mpc5121_ads only uses USB0
+
+ // USB1 using external ULPI PHY
+ //usb@3000 {
+ // compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
+ // reg = <0x3000 0x1000>;
+ // #address-cells = <1>;
+ // #size-cells = <0>;
+ // interrupt-parent = < &ipic >;
+ // interrupts = <43 0x8>;
+ // dr_mode = "otg";
+ // phy_type = "ulpi";
+ // port1;
+ //};
+
+ // USB0 using internal UTMI PHY
+ usb@4000 {
+ compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
+ reg = <0x4000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ dr_mode = "otg";
+ phy_type = "utmi_wide";
+ port0;
+ };
+
+ // IO control
+ ioctl@a000 {
+ compatible = "fsl,mpc5121-ioctl";
+ reg = <0xA000 0x1000>;
+ };
+
+ pata@10200 {
+ compatible = "fsl,mpc5121-pata";
+ reg = <0x10200 0x100>;
+ interrupts = <5 0x8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ // 512x PSCs are not 52xx PSC compatible
// PSC3 serial port A aka ttyPSC0
serial@11300 {
device_type = "serial";
- compatible = "fsl,mpc5121-psc-uart";
+ compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
// Logical port assignment needed until driver
// learns to use aliases
port-number = <0>;
cell-index = <3>;
reg = <0x11300 0x100>;
- interrupts = <0x28 0x8>; // actually the fifo irq
+ interrupts = <40 0x8>;
interrupt-parent = < &ipic >;
+ rx-fifo-size = <16>;
+ tx-fifo-size = <16>;
};
// PSC4 serial port B aka ttyPSC1
serial@11400 {
device_type = "serial";
- compatible = "fsl,mpc5121-psc-uart";
+ compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
// Logical port assignment needed until driver
// learns to use aliases
port-number = <1>;
cell-index = <4>;
reg = <0x11400 0x100>;
- interrupts = <0x28 0x8>; // actually the fifo irq
+ interrupts = <40 0x8>;
+ interrupt-parent = < &ipic >;
+ rx-fifo-size = <16>;
+ tx-fifo-size = <16>;
+ };
+
+ // PSC5 in ac97 mode
+ ac97@11500 {
+ compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
+ cell-index = <5>;
+ reg = <0x11500 0x100>;
+ interrupts = <40 0x8>;
+ interrupt-parent = < &ipic >;
+ fsl,mode = "ac97-slave";
+ rx-fifo-size = <384>;
+ tx-fifo-size = <384>;
+ };
+
+ pscfifo@11f00 {
+ compatible = "fsl,mpc5121-psc-fifo";
+ reg = <0x11f00 0x100>;
+ interrupts = <40 0x8>;
interrupt-parent = < &ipic >;
};
- pscsfifo@11f00 {
- compatible = "fsl,mpc5121-psc-fifo";
- reg = <0x11f00 0x100>;
- interrupts = <0x28 0x8>;
+ dma@14000 {
+ compatible = "fsl,mpc5121-dma2";
+ reg = <0x14000 0x1800>;
+ interrupts = <65 0x8>;
interrupt-parent = < &ipic >;
};
+
+ };
+
+ pci: pci@80008500 {
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ // IDSEL 0x15 - Slot 1 PCI
+ 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
+ 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
+ 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
+ 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
+
+ // IDSEL 0x16 - Slot 2 MiniPCI
+ 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
+ 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
+
+ // IDSEL 0x17 - Slot 3 MiniPCI
+ 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
+ 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
+ >;
+ interrupt-parent = < &ipic >;
+ interrupts = <1 0x8>;
+ bus-range = <0 0>;
+ ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;
+ clock-frequency = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0x80008500 0x100>;
+ compatible = "fsl,mpc5121-pci";
+ device_type = "pci";
};
};
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 4936349..705c23c 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -124,14 +124,12 @@
};
mpic: pic@7400 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x7400 0x400>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
pci@1000 {
compatible = "tsi108-pci";
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 46e2da3..2a1929a 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -217,6 +217,17 @@
linux,network-index = <1>;
fsl,cpm-command = <0x16200300>;
};
+
+ i2c@11860 {
+ compatible = "fsl,mpc8272-i2c",
+ "fsl,cpm2-i2c";
+ reg = <0x11860 0x20 0x8afc 0x2>;
+ interrupts = <1 8>;
+ interrupt-parent = <&PIC>;
+ fsl,cpm-command = <0x29600000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
PIC: interrupt-controller@10c00 {
@@ -226,22 +237,15 @@
compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
};
-/* May need to remove if on a part without crypto engine */
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "fsl,mpc8272-talitos-sec2",
- "fsl,talitos-sec2",
- "fsl,talitos",
- "talitos";
- reg = <0x30000 0x10000>;
- interrupts = <11 8>;
+ compatible = "fsl,sec1.0";
+ reg = <0x40000 0x13000>;
+ interrupts = <47 0x8>;
interrupt-parent = <&PIC>;
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x7e>;
-/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
- descriptor-types-mask = <0x1010ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x1010415>;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index e1f0dca..3664fb5 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -144,6 +144,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8313-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
@@ -219,17 +254,14 @@
};
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
- reg = <0x30000 0x7000>;
+ compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- /* Rev. 2.2 */
- num-channels = <1>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x0000004c>;
- descriptor-types-mask = <0x0122003f>;
+ fsl,num-channels = <1>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x4c>;
+ fsl,descriptor-types-mask = <0x0122003f>;
};
/* IPIC
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index d7a1ece..f704513 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -132,6 +132,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8315-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
@@ -206,17 +241,16 @@
};
crypto@30000 {
- model = "SEC3";
- device_type = "crypto";
- compatible = "talitos";
+ compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
+ "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
+ "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- /* Rev. 3.0 geometry */
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x000001fe>;
- descriptor-types-mask = <0x03ab0ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x97c>;
+ fsl,descriptor-types-mask = <0x3ab0abf>;
};
sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 539e02f..7345743 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -114,18 +114,50 @@
interrupt-parent = <&ipic>;
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8323-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
- reg = <0x30000 0x7000>;
+ compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- /* Rev. 2.2 */
- num-channels = <1>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x0000004c>;
- descriptor-types-mask = <0x0122003f>;
+ fsl,num-channels = <1>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x4c>;
+ fsl,descriptor-types-mask = <0x0122003f>;
};
ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 179c81c..e74c045 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -68,7 +68,7 @@
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
- interrupt-parent = <&pic>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -79,7 +79,7 @@
reg = <0x4500 0x100>;
clock-frequency = <0>;
interrupts = <9 0x8>;
- interrupt-parent = <&pic>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
@@ -89,24 +89,56 @@
reg = <0x4600 0x100>;
clock-frequency = <0>;
interrupts = <10 0x8>;
- interrupt-parent = <&pic>;
+ interrupt-parent = <&ipic>;
+ };
+
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8323-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
};
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
- reg = <0x30000 0x7000>;
+ compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
- interrupt-parent = <&pic>;
- /* Rev. 2.2 */
- num-channels = <1>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x0000004c>;
- descriptor-types-mask = <0x0122003f>;
+ interrupt-parent = <&ipic>;
+ fsl,num-channels = <1>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x4c>;
+ fsl,descriptor-types-mask = <0x0122003f>;
};
- pic:pic@700 {
+ ipic:pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
@@ -240,13 +272,13 @@
compatible = "fsl,ucc-mdio";
phy00:ethernet-phy@00 {
- interrupt-parent = <&pic>;
+ interrupt-parent = <&ipic>;
interrupts = <0>;
reg = <0x0>;
device_type = "ethernet-phy";
};
phy04:ethernet-phy@04 {
- interrupt-parent = <&pic>;
+ interrupt-parent = <&ipic>;
interrupts = <0>;
reg = <0x4>;
device_type = "ethernet-phy";
@@ -261,7 +293,7 @@
reg = <0x80 0x80>;
big-endian;
interrupts = <32 0x8 33 0x8>; //high:32 low:33
- interrupt-parent = <&pic>;
+ interrupt-parent = <&ipic>;
};
};
@@ -270,21 +302,21 @@
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 AD16 (USB) */
- 0x8000 0x0 0x0 0x1 &pic 17 0x8
+ 0x8000 0x0 0x0 0x1 &ipic 17 0x8
/* IDSEL 0x11 AD17 (Mini1)*/
- 0x8800 0x0 0x0 0x1 &pic 18 0x8
- 0x8800 0x0 0x0 0x2 &pic 19 0x8
- 0x8800 0x0 0x0 0x3 &pic 20 0x8
- 0x8800 0x0 0x0 0x4 &pic 48 0x8
+ 0x8800 0x0 0x0 0x1 &ipic 18 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 19 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 48 0x8
/* IDSEL 0x12 AD18 (PCI/Mini2) */
- 0x9000 0x0 0x0 0x1 &pic 19 0x8
- 0x9000 0x0 0x0 0x2 &pic 20 0x8
- 0x9000 0x0 0x0 0x3 &pic 48 0x8
- 0x9000 0x0 0x0 0x4 &pic 17 0x8>;
+ 0x9000 0x0 0x0 0x1 &ipic 19 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 48 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 17 0x8>;
- interrupt-parent = <&pic>;
+ interrupt-parent = <&ipic>;
interrupts = <66 0x8>;
bus-range = <0x0 0x0>;
ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 9426676..8dfab56 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -93,6 +93,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
usb@22000 {
compatible = "fsl-usb2-mph";
reg = <0x22000 0x1000>;
@@ -178,16 +213,14 @@
};
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
+ compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x0000007e>;
- descriptor-types-mask = <0x01010ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index f81d735..49ca349 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -91,6 +91,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
@@ -151,16 +186,14 @@
};
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
+ compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x0000007e>;
- descriptor-types-mask = <0x01010ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 0199c5c..ba586cb 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -103,6 +103,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
/* phy type (ULPI or SERIAL) are only types supported for MPH */
/* port = 0 or 1 */
usb@22000 {
@@ -193,20 +228,15 @@
interrupt-parent = <&ipic>;
};
- /* May need to remove if on a part without crypto engine */
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
+ compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x0000007e>;
- /* desc mask is for rev2.0,
- * we need runtime fixup for >2.0 */
- descriptor-types-mask = <0x01010ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
};
/* IPIC
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 8160ff2..3701dae 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -118,18 +118,50 @@
interrupt-parent = <&ipic>;
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
+ compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x0000007e>;
- /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
- descriptor-types-mask = <0x01010ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
new file mode 100644
index 0000000..8acd1d6
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -0,0 +1,432 @@
+/*
+ * MPC8360E RDK Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ * Copyright 2007-2008 MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8360rdk";
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8360@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ /* filled by u-boot */
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ /* filled by u-boot */
+ reg = <0 0>;
+ };
+
+ soc@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc",
+ "simple-bus";
+ ranges = <0 0xe0000000 0x200000>;
+ reg = <0xe0000000 0x200>;
+ /* filled by u-boot */
+ bus-frequency = <0>;
+
+ wdt@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <0x200 0x100>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <14 8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <16 8>;
+ interrupt-parent = <&ipic>;
+ dfsrr;
+ };
+
+ serial0: serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ interrupts = <9 8>;
+ interrupt-parent = <&ipic>;
+ /* filled by u-boot */
+ clock-frequency = <0>;
+ };
+
+ serial1: serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ interrupts = <10 8>;
+ interrupt-parent = <&ipic>;
+ /* filled by u-boot */
+ clock-frequency = <0>;
+ };
+
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
+ crypto@30000 {
+ compatible = "fsl,sec2-crypto";
+ reg = <0x30000 0x10000>;
+ interrupts = <11 8>;
+ interrupt-parent = <&ipic>;
+ num-channels = <4>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x7e>;
+ /*
+ * desc mask is for rev1.x, we need runtime fixup
+ * for >=2.x
+ */
+ descriptor-types-mask = <0x1010ebf>;
+ };
+
+ ipic: interrupt-controller@700 {
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ compatible = "fsl,pq2pro-pic", "fsl,ipic";
+ interrupt-controller;
+ reg = <0x700 0x100>;
+ };
+
+ qe_pio_b: gpio-controller@1418 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8360-qe-pario-bank",
+ "fsl,mpc8323-qe-pario-bank";
+ reg = <0x1418 0x18>;
+ gpio-controller;
+ };
+
+ qe_pio_e: gpio-controller@1460 {
+ #gpio-cells = <2>;
+ compatible = "fsl,mpc8360-qe-pario-bank",
+ "fsl,mpc8323-qe-pario-bank";
+ reg = <0x1460 0x18>;
+ gpio-controller;
+ };
+
+ qe@100000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "qe";
+ compatible = "fsl,qe", "simple-bus";
+ ranges = <0 0x100000 0x100000>;
+ reg = <0x100000 0x480>;
+ /* filled by u-boot */
+ clock-frequency = <0>;
+ bus-frequency = <0>;
+ brg-frequency = <0>;
+
+ muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
+ ranges = <0 0x10000 0xc000>;
+
+ data-only@0 {
+ compatible = "fsl,qe-muram-data",
+ "fsl,cpm-muram-data";
+ reg = <0 0xc000>;
+ };
+ };
+
+ timer@440 {
+ compatible = "fsl,mpc8360-qe-gtm",
+ "fsl,qe-gtm", "fsl,gtm";
+ reg = <0x440 0x40>;
+ interrupts = <12 13 14 15>;
+ interrupt-parent = <&qeic>;
+ /* filled by u-boot */
+ clock-frequency = <0>;
+ };
+
+ spi@4c0 {
+ cell-index = <0>;
+ compatible = "fsl,spi";
+ reg = <0x4c0 0x40>;
+ interrupts = <2>;
+ interrupt-parent = <&qeic>;
+ mode = "cpu-qe";
+ };
+
+ spi@500 {
+ cell-index = <1>;
+ compatible = "fsl,spi";
+ reg = <0x500 0x40>;
+ interrupts = <1>;
+ interrupt-parent = <&qeic>;
+ mode = "cpu-qe";
+ };
+
+ enet0: ucc@2000 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ cell-index = <1>;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
+ rx-clock-name = "none";
+ tx-clock-name = "clk9";
+ phy-handle = <&phy2>;
+ phy-connection-type = "rgmii-rxid";
+ /* filled by u-boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ enet1: ucc@3000 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ cell-index = <2>;
+ reg = <0x3000 0x200>;
+ interrupts = <33>;
+ interrupt-parent = <&qeic>;
+ rx-clock-name = "none";
+ tx-clock-name = "clk4";
+ phy-handle = <&phy4>;
+ phy-connection-type = "rgmii-rxid";
+ /* filled by u-boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ enet2: ucc@2600 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ cell-index = <7>;
+ reg = <0x2600 0x200>;
+ interrupts = <42>;
+ interrupt-parent = <&qeic>;
+ rx-clock-name = "clk20";
+ tx-clock-name = "clk19";
+ phy-handle = <&phy1>;
+ phy-connection-type = "mii";
+ /* filled by u-boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ enet3: ucc@3200 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ cell-index = <4>;
+ reg = <0x3200 0x200>;
+ interrupts = <35>;
+ interrupt-parent = <&qeic>;
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk7";
+ phy-handle = <&phy3>;
+ phy-connection-type = "mii";
+ /* filled by u-boot */
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ mdio@2120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,ucc-mdio";
+ reg = <0x2120 0x18>;
+
+ phy1: ethernet-phy@1 {
+ device_type = "ethernet-phy";
+ compatible = "national,DP83848VV";
+ reg = <1>;
+ };
+
+ phy2: ethernet-phy@2 {
+ device_type = "ethernet-phy";
+ compatible = "broadcom,BCM5481UA2KMLG";
+ reg = <2>;
+ };
+
+ phy3: ethernet-phy@3 {
+ device_type = "ethernet-phy";
+ compatible = "national,DP83848VV";
+ reg = <3>;
+ };
+
+ phy4: ethernet-phy@4 {
+ device_type = "ethernet-phy";
+ compatible = "broadcom,BCM5481UA2KMLG";
+ reg = <4>;
+ };
+ };
+
+ serial2: ucc@2400 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ reg = <0x2400 0x200>;
+ cell-index = <5>;
+ port-number = <0>;
+ rx-clock-name = "brg7";
+ tx-clock-name = "brg8";
+ interrupts = <40>;
+ interrupt-parent = <&qeic>;
+ soft-uart;
+ };
+
+ serial3: ucc@3400 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ reg = <0x3400 0x200>;
+ cell-index = <6>;
+ port-number = <1>;
+ rx-clock-name = "brg13";
+ tx-clock-name = "brg14";
+ interrupts = <41>;
+ interrupt-parent = <&qeic>;
+ soft-uart;
+ };
+
+ qeic: interrupt-controller@80 {
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ compatible = "fsl,qe-ic";
+ interrupt-controller;
+ reg = <0x80 0x80>;
+ big-endian;
+ interrupts = <32 8 33 8>;
+ interrupt-parent = <&ipic>;
+ };
+ };
+ };
+
+ localbus@e0005000 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
+ "simple-bus";
+ reg = <0xe0005000 0xd8>;
+ ranges = <0 0 0xff800000 0x0800000
+ 1 0 0x60000000 0x0001000
+ 2 0 0x70000000 0x4000000>;
+
+ flash@0,0 {
+ compatible = "intel,PC28F640P30T85", "cfi-flash";
+ reg = <0 0 0x800000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ display@2,0 {
+ device_type = "display";
+ compatible = "fujitsu,MB86277", "fujitsu,mint";
+ reg = <2 0 0x4000000>;
+ fujitsu,sh3;
+ little-endian;
+ /* filled by u-boot */
+ address = <0>;
+ depth = <0>;
+ width = <0>;
+ height = <0>;
+ linebytes = <0>;
+ /* linux,opened; - added by uboot */
+ };
+ };
+
+ pci0: pci@e0008500 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
+ reg = <0xe0008500 0x100>;
+ ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
+ 0x42000000 0 0x80000000 0x80000000 0 0x10000000
+ 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
+ interrupts = <66 8>;
+ interrupt-parent = <&ipic>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */
+ 0xa000 0 0 1 &ipic 18 8
+ 0xa000 0 0 2 &ipic 19 8
+
+ /* PCI1 IDSEL 0x15 AD21 */
+ 0xa800 0 0 1 &ipic 19 8
+ 0xa800 0 0 2 &ipic 20 8
+ 0xa800 0 0 3 &ipic 21 8
+ 0xa800 0 0 4 &ipic 18 8>;
+ /* filled by u-boot */
+ bus-range = <0 0>;
+ clock-frequency = <0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index fea5925..0a700cb 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -233,41 +233,6 @@
interrupt-parent = <&ipic>;
};
- crypto@30000 {
- model = "SEC3";
- compatible = "talitos";
- reg = <0x30000 0x10000>;
- interrupts = <11 0x8>;
- interrupt-parent = <&ipic>;
- /* Rev. 3.0 geometry */
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x000001fe>;
- descriptor-types-mask = <0x03ab0ebf>;
- };
-
- sdhc@2e000 {
- model = "eSDHC";
- compatible = "fsl,esdhc";
- reg = <0x2e000 0x1000>;
- interrupts = <42 0x8>;
- interrupt-parent = <&ipic>;
- };
-
- sata@18000 {
- compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
- reg = <0x18000 0x1000>;
- interrupts = <44 0x8>;
- interrupt-parent = <&ipic>;
- };
-
- sata@19000 {
- compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
- reg = <0x19000 0x1000>;
- interrupts = <45 0x8>;
- interrupt-parent = <&ipic>;
- };
-
dma@82a8 {
#address-cells = <1>;
#size-cells = <1>;
@@ -303,6 +268,40 @@
};
};
+ crypto@30000 {
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
+ };
+
+ sdhc@2e000 {
+ model = "eSDHC";
+ compatible = "fsl,esdhc";
+ reg = <0x2e000 0x1000>;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ sata@18000 {
+ compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
+ sata@19000 {
+ compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
+ reg = <0x19000 0x1000>;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
/* IPIC
* interrupts cell = <intr #, sense>
* sense values match linux IORESOURCE_IRQ_* defines:
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index f3083c7..ed137aa 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -143,6 +143,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
@@ -213,17 +248,15 @@
};
crypto@30000 {
- model = "SEC3";
- device_type = "crypto";
- compatible = "talitos";
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- /* Rev. 3.0 geometry */
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x000001fe>;
- descriptor-types-mask = <0x03ab0ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 1d6ea08..29c8c76 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -157,6 +157,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
@@ -234,16 +269,15 @@
};
crypto@30000 {
- model = "SEC3";
- compatible = "talitos";
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- /* Rev. 3.0 geometry */
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x000001fe>;
- descriptor-types-mask = <0x03ab0ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sdhc@2e000 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 0e872a6..34a7f2f 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -143,6 +143,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
@@ -213,17 +248,15 @@
};
crypto@30000 {
- model = "SEC3";
- device_type = "crypto";
- compatible = "talitos";
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- /* Rev. 3.0 geometry */
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x000001fe>;
- descriptor-types-mask = <0x03ab0ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
};
/* IPIC
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 6f78a9f..d641a89 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -157,6 +157,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
@@ -234,16 +269,15 @@
};
crypto@30000 {
- model = "SEC3";
- compatible = "talitos";
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- /* Rev. 3.0 geometry */
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x000001fe>;
- descriptor-types-mask = <0x03ab0ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sdhc@2e000 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 1eb8def..e4d7030 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -143,6 +143,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
usb@23000 {
compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>;
@@ -213,17 +248,15 @@
};
crypto@30000 {
- model = "SEC3";
- device_type = "crypto";
- compatible = "talitos";
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- /* Rev. 3.0 geometry */
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x000001fe>;
- descriptor-types-mask = <0x03ab0ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
};
sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
new file mode 100644
index 0000000..02cfa24
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -0,0 +1,432 @@
+/*
+ * MPC8536 DS Device Tree Source
+ *
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "fsl,mpc8536ds";
+ compatible = "fsl,mpc8536ds";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ pci3 = &pci3;
+ };
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8536@0 {
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 00000000>; // Filled by U-Boot
+ };
+
+ soc@ffe00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xffe00000 0x100000>;
+ reg = <0xffe00000 0x1000>;
+ bus-frequency = <0>; // Filled out by uboot.
+
+ memory-controller@2000 {
+ compatible = "fsl,mpc8536-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 0x2>;
+ };
+
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,mpc8536-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <16 0x2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 0x2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <43 0x2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ rtc@68 {
+ compatible = "dallas,ds3232";
+ reg = <0x68>;
+ };
+ };
+
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
+ reg = <0x21300 4>;
+ ranges = <0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8536-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <14 0x2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8536-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <15 0x2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8536-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <16 0x2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8536-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <17 0x2>;
+ };
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
+ interrupts = <10 0x1>;
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <10 0x1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ usb@22000 {
+ compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
+ reg = <0x22000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <28 0x2>;
+ phy_type = "ulpi";
+ };
+
+ usb@23000 {
+ compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
+ reg = <0x23000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <46 0x2>;
+ phy_type = "ulpi";
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet@26000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x26000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <31 2 32 2 33 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ usb@2b000 {
+ compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
+ reg = <0x2b000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <60 0x2>;
+ dr_mode = "peripheral";
+ phy_type = "ulpi";
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <42 0x2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <42 0x2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ crypto@30000 {
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2 58 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
+ };
+
+ sata@18000 {
+ compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
+ reg = <0x18000 0x1000>;
+ cell-index = <1>;
+ interrupts = <74 0x2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ sata@19000 {
+ compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
+ reg = <0x19000 0x1000>;
+ cell-index = <2>;
+ interrupts = <41 0x2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ global-utilities@e0000 { //global utilities block
+ compatible = "fsl,mpc8548-guts";
+ reg = <0xe0000 0x1000>;
+ fsl,has-rstcr;
+ };
+
+ mpic: pic@40000 {
+ clock-frequency = <0>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ big-endian;
+ };
+
+ msi@41600 {
+ compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
+ reg = <0x41600 0x80>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe0 0
+ 0xe1 0
+ 0xe2 0
+ 0xe3 0
+ 0xe4 0
+ 0xe5 0
+ 0xe6 0
+ 0xe7 0>;
+ interrupt-parent = <&mpic>;
+ };
+ };
+
+ pci0: pci@ffe08000 {
+ cell-index = <0>;
+ compatible = "fsl,mpc8540-pci";
+ device_type = "pci";
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x11 J17 Slot 1 */
+ 0x8800 0 0 1 &mpic 1 1
+ 0x8800 0 0 2 &mpic 2 1
+ 0x8800 0 0 3 &mpic 3 1
+ 0x8800 0 0 4 &mpic 4 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <24 0x2>;
+ bus-range = <0 0xff>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
+ clock-frequency = <66666666>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xffe08000 0x1000>;
+ };
+
+ pci1: pcie@ffe09000 {
+ cell-index = <1>;
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xffe09000 0x1000>;
+ bus-range = <0 0xff>;
+ ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
+ 0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
+ clock-frequency = <33333333>;
+ interrupt-parent = <&mpic>;
+ interrupts = <25 0x2>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 4 1
+ 0000 0 0 2 &mpic 5 1
+ 0000 0 0 3 &mpic 6 1
+ 0000 0 0 4 &mpic 7 1
+ >;
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <0x02000000 0 0x98000000
+ 0x02000000 0 0x98000000
+ 0 0x08000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci2: pcie@ffe0a000 {
+ cell-index = <2>;
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xffe0a000 0x1000>;
+ bus-range = <0 0xff>;
+ ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
+ 0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
+ clock-frequency = <33333333>;
+ interrupt-parent = <&mpic>;
+ interrupts = <26 0x2>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 0 1
+ 0000 0 0 2 &mpic 1 1
+ 0000 0 0 3 &mpic 2 1
+ 0000 0 0 4 &mpic 3 1
+ >;
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <0x02000000 0 0x90000000
+ 0x02000000 0 0x90000000
+ 0 0x08000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci3: pcie@ffe0b000 {
+ cell-index = <3>;
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xffe0b000 0x1000>;
+ bus-range = <0 0xff>;
+ ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
+ clock-frequency = <33333333>;
+ interrupt-parent = <&mpic>;
+ interrupts = <27 0x2>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 8 1
+ 0000 0 0 2 &mpic 9 1
+ 0000 0 0 3 &mpic 10 1
+ 0000 0 0 4 &mpic 11 1
+ >;
+
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <0x02000000 0 0xa0000000
+ 0x02000000 0 0xa0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00100000>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 18033ed..f2273a8 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
@@ -83,6 +84,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -165,14 +207,12 @@
interrupt-parent = <&mpic>;
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 663c7c5..c4469f1 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8541-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
@@ -83,6 +84,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8541-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8541-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8541-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8541-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -147,15 +189,24 @@
interrupt-parent = <&mpic>;
};
+ crypto@30000 {
+ compatible = "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
+ };
+
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
cpm@919c0 {
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 6a0d8db..7d3829d 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -41,6 +41,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -65,7 +66,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8544-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
@@ -209,15 +210,40 @@
fsl,has-rstcr;
};
+ crypto@30000 {
+ compatible = "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0xfe>;
+ fsl,descriptor-types-mask = <0x12b0ebf>;
+ };
+
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
+ };
+
+ msi@41600 {
+ compatible = "fsl,mpc8544-msi", "fsl,mpic-msi";
+ reg = <0x41600 0x80>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe0 0
+ 0xe1 0
+ 0xe2 0
+ 0xe3 0
+ 0xe4 0
+ 0xe5 0
+ 0xe6 0
+ 0xe7 0>;
+ interrupt-parent = <&mpic>;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 4811b81..d84466b 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -45,6 +45,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -68,7 +69,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8548-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
@@ -99,6 +100,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -207,15 +249,24 @@
fsl,has-rstcr;
};
+ crypto@30000 {
+ compatible = "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0xfe>;
+ fsl,descriptor-types-mask = <0x12b0ebf>;
+ };
+
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index b025c56..e03a780 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -40,6 +40,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8555-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
@@ -83,6 +84,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -147,15 +189,24 @@
interrupt-parent = <&mpic>;
};
+ crypto@30000 {
+ compatible = "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
+ };
+
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
cpm@919c0 {
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 0cc16ab..ba8159d 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -64,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
@@ -73,6 +73,47 @@
interrupts = <16 2>;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -134,6 +175,7 @@
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
device_type = "open-pic";
};
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index a025a8e..9c30a34 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -42,6 +42,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -70,7 +71,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8568-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
@@ -106,6 +107,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8568-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8568-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8568-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8568-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -189,27 +231,23 @@
};
crypto@30000 {
- device_type = "crypto";
- model = "SEC2";
- compatible = "talitos";
- reg = <0x30000 0xf000>;
+ compatible = "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
interrupts = <45 2>;
interrupt-parent = <&mpic>;
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0xfe>;
- descriptor-types-mask = <0x12b0ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0xfe>;
+ fsl,descriptor-types-mask = <0x12b0ebf>;
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
par_io@e0100 {
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 66f27ab..08c61e3 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -42,6 +42,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
PowerPC,8572@1 {
@@ -54,6 +55,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -84,7 +86,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,mpc8572-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
@@ -115,6 +117,88 @@
dfsrr;
};
+ dma@c300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+ reg = <0xc300 0x4>;
+ ranges = <0x0 0xc100 0x200>;
+ cell-index = <1>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8572-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <76 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8572-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <77 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8572-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <78 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8572-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <79 2>;
+ };
+ };
+
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8572-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8572-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8572-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8572-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -221,15 +305,41 @@
fsl,has-rstcr;
};
+ msi@41600 {
+ compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
+ reg = <0x41600 0x80>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe0 0
+ 0xe1 0
+ 0xe2 0
+ 0xe3 0
+ 0xe4 0
+ 0xe5 0
+ 0xe6 0
+ 0xe7 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+ crypto@30000 {
+ compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
+ "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2 58 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x9fe>;
+ fsl,descriptor-types-mask = <0x3ab0ebf>;
+ };
+
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index fa9b6bb..981941e 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -172,14 +172,28 @@
};
mpic: interrupt-controller@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
+ };
+
+ msi@41600 {
+ compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
+ reg = <0x41600 0x80>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe0 0
+ 0xe1 0
+ 0xe2 0
+ 0xe3 0
+ 0xe4 0
+ 0xe5 0
+ 0xe6 0
+ 0xe7 0>;
+ interrupt-parent = <&mpic>;
};
global-utilities@e0000 {
@@ -349,7 +363,7 @@
0xe000 0 0 4 &mpic 1 1
/* IDSEL 0x1f */
- 0xf800 0 0 1 &mpic 3 0
+ 0xf800 0 0 1 &mpic 3 2
0xf800 0 0 2 &mpic 0 1
>;
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 1e4bfe9..ae08761 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -134,6 +134,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8641-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8641-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8641-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8641-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -239,14 +280,12 @@
};
mpic: pic@40000 {
- clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
global-utilities@e0000 {
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index 765e43c..bd70065 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -171,6 +171,17 @@
fsl,cpm-command = <0000>;
linux,network-index = <1>;
};
+
+ i2c@860 {
+ compatible = "fsl,mpc866-i2c",
+ "fsl,cpm1-i2c";
+ reg = <0x860 0x20 0x3c80 0x30>;
+ interrupts = <16>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-command = <0x10>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index 9895043..b123e9f 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -215,6 +215,17 @@
fsl,cpm-command = <0x80>;
linux,network-index = <2>;
};
+
+ i2c@860 {
+ compatible = "fsl,mpc885-i2c",
+ "fsl,cpm1-i2c";
+ reg = <0x860 0x20 0x3c80 0x30>;
+ interrupts = <16>;
+ interrupt-parent = <&CPM_PIC>;
+ fsl,cpm-command = <0x10>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
};
diff --git a/arch/powerpc/boot/dts/ps3.dts b/arch/powerpc/boot/dts/ps3.dts
index 379ded2..96ba5b5 100644
--- a/arch/powerpc/boot/dts/ps3.dts
+++ b/arch/powerpc/boot/dts/ps3.dts
@@ -18,6 +18,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+/dts-v1/;
+
/ {
model = "SonyPS3";
compatible = "sony,ps3";
@@ -34,7 +36,7 @@
memory {
device_type = "memory";
- reg = <0 0 0 0>;
+ reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
};
/*
@@ -55,14 +57,14 @@
cpu@0 {
device_type = "cpu";
- reg = <0>;
- ibm,ppc-interrupt-server#s = <0 1>;
+ reg = <0x00000000>;
+ ibm,ppc-interrupt-server#s = <0x0 0x1>;
clock-frequency = <0>;
timebase-frequency = <0>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
- i-cache-line-size = <80>;
- d-cache-line-size = <80>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ i-cache-line-size = <128>;
+ d-cache-line-size = <128>;
};
};
};
diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts
index 6a8fa70..9684c80 100644
--- a/arch/powerpc/boot/dts/rainier.dts
+++ b/arch/powerpc/boot/dts/rainier.dts
@@ -12,12 +12,14 @@
*
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,rainier";
compatible = "amcc,rainier";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -35,13 +37,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440GRx";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
@@ -49,14 +51,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; /* Filled in by zImage */
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440grx","ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -66,11 +68,11 @@
compatible = "ibm,uic-440grx","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -78,22 +80,22 @@
compatible = "ibm,uic-440grx","ibm,uic";
interrupt-controller;
cell-index = <2>;
- dcr-reg = <0e0 009>;
+ dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1c 4 1d 4>; /* cascade */
+ interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
- dcr-reg = <00e 002>;
+ dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
- dcr-reg = <00c 002>;
+ dcr-reg = <0x00c 0x002>;
};
plb {
@@ -105,80 +107,80 @@
SDRAM0: sdram {
compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
DMA0: dma {
compatible = "ibm,dma-440grx", "ibm,dma-4xx";
- dcr-reg = <100 027>;
+ dcr-reg = <0x100 0x027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
- interrupt-map-mask = <ffffffff>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
+ interrupt-map-mask = <0xffffffff>;
};
POB0: opb {
compatible = "ibm,opb-440grx", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <00000000 1 00000000 80000000
- 80000000 1 80000000 80000000>;
+ ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+ 0x80000000 0x00000001 0x80000000 0x80000000>;
interrupt-parent = <&UIC1>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc {
compatible = "ibm,ebc-440grx", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl256n", "cfi-flash";
bank-width = <2>;
- reg = <0 000000 4000000>;
+ reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Kernel";
- reg = <0 180000>;
+ reg = <0x00000000 0x00180000>;
};
partition@180000 {
label = "ramdisk";
- reg = <180000 200000>;
+ reg = <0x00180000 0x00200000>;
};
partition@380000 {
label = "file system";
- reg = <380000 3aa0000>;
+ reg = <0x00380000 0x03aa0000>;
};
partition@3e20000 {
label = "kozio";
- reg = <3e20000 140000>;
+ reg = <0x03e20000 0x00140000>;
};
partition@3f60000 {
label = "env";
- reg = <3f60000 40000>;
+ reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
- reg = <3fa0000 60000>;
+ reg = <0x03fa0000 0x00060000>;
};
};
@@ -187,69 +189,69 @@
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <1c200>;
+ current-speed = <115200>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600400 8>;
- virtual-reg = <ef600400>;
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600500 8>;
- virtual-reg = <ef600500>;
+ reg = <0xef600500 0x00000008>;
+ virtual-reg = <0xef600500>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC1>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
};
UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600600 8>;
- virtual-reg = <ef600600>;
+ reg = <0xef600600 0x00000008>;
+ virtual-reg = <0xef600600>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC1>;
- interrupts = <4 4>;
+ interrupts = <0x4 0x4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-440grx", "ibm,iic";
- reg = <ef600700 14>;
+ reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600800 {
compatible = "ibm,iic-440grx", "ibm,iic";
- reg = <ef600800 14>;
+ reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-440grx", "ibm,zmii";
- reg = <ef600d00 c>;
+ reg = <0xef600d00 0x0000000c>;
};
RGMII0: emac-rgmii@ef601000 {
compatible = "ibm,rgmii-440grx", "ibm,rgmii";
- reg = <ef601000 8>;
+ reg = <0xef601000 0x00000008>;
has-mdio;
};
@@ -257,23 +259,23 @@
device_type = "network";
compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
interrupt-parent = <&EMAC0>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 18 4
- /*Wake*/ 1 &UIC1 1d 4>;
- reg = <ef600e00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
+ /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
+ reg = <0xef600e00 0x00000074>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
rgmii-device = <&RGMII0>;
@@ -286,23 +288,23 @@
device_type = "network";
compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
interrupt-parent = <&EMAC1>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 19 4
- /*Wake*/ 1 &UIC1 1f 4>;
- reg = <ef600f00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
+ /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
+ reg = <0xef600f00 0x00000074>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
rgmii-device = <&RGMII0>;
@@ -319,24 +321,25 @@
#address-cells = <3>;
compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
primary;
- reg = <1 eec00000 8 /* Config space access */
- 1 eed00000 4 /* IACK */
- 1 eed00000 4 /* Special cycle */
- 1 ef400000 40>; /* Internal registers */
+ reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
+ 0x00000001 0xeed00000 0x00000004 /* IACK */
+ 0x00000001 0xeed00000 0x00000004 /* Special cycle */
+ 0x00000001 0xef400000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
- ranges = <02000000 0 80000000 1 80000000 0 10000000
- 01000000 0 00000000 1 e8000000 0 00100000>;
+ ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000
+ 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000
+ 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* All PCI interrupts are routed to IRQ 67 */
- interrupt-map-mask = <0000 0 0 0>;
- interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
+ interrupt-map-mask = <0x0 0x0 0x0 0x0>;
+ interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
};
};
diff --git a/arch/powerpc/boot/dts/sam440ep.dts b/arch/powerpc/boot/dts/sam440ep.dts
new file mode 100644
index 0000000..f0663be
--- /dev/null
+++ b/arch/powerpc/boot/dts/sam440ep.dts
@@ -0,0 +1,293 @@
+/*
+ * Device Tree Source for ACube Sam440ep based off bamboo.dts code
+ * original copyrights below
+ *
+ * Copyright (c) 2006, 2007 IBM Corp.
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * Modified from bamboo.dts for sam440ep:
+ * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ model = "acube,sam440ep";
+ compatible = "acube,sam440ep";
+
+ aliases {
+ ethernet0 = &EMAC0;
+ ethernet1 = &EMAC1;
+ serial0 = &UART0;
+ serial1 = &UART1;
+ serial2 = &UART2;
+ serial3 = &UART3;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,440EP";
+ reg = <0>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ timebase-frequency = <0>; /* Filled in by zImage */
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0 0>; /* Filled in by zImage */
+ };
+
+ UIC0: interrupt-controller0 {
+ compatible = "ibm,uic-440ep","ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0x0c0 9>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = "ibm,uic-440ep","ibm,uic";
+ interrupt-controller;
+ cell-index = <1>;
+ dcr-reg = <0x0d0 9>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <0x1e 4 0x1f 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ SDR0: sdr {
+ compatible = "ibm,sdr-440ep";
+ dcr-reg = <0x00e 2>;
+ };
+
+ CPR0: cpr {
+ compatible = "ibm,cpr-440ep";
+ dcr-reg = <0x00c 2>;
+ };
+
+ plb {
+ compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ SDRAM0: sdram {
+ compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
+ dcr-reg = <0x010 2>;
+ };
+
+ DMA0: dma {
+ compatible = "ibm,dma-440ep", "ibm,dma-440gp";
+ dcr-reg = <0x100 0x027>;
+ };
+
+ MAL0: mcmal {
+ compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
+ dcr-reg = <0x180 0x062>;
+ num-tx-chans = <4>;
+ num-rx-chans = <2>;
+ interrupt-parent = <&MAL0>;
+ interrupts = <0 1 2 3 4>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*TXEOB*/ 0 &UIC0 10 4
+ /*RXEOB*/ 1 &UIC0 11 4
+ /*SERR*/ 2 &UIC1 0 4
+ /*TXDE*/ 3 &UIC1 1 4
+ /*RXDE*/ 4 &UIC1 2 4>;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* Bamboo is oddball in the 44x world and doesn't use the ERPN
+ * bits.
+ */
+ ranges = <0x00000000 0 0x00000000 0x80000000
+ 0x80000000 0 0x80000000 0x80000000>;
+ interrupt-parent = <&UIC1>;
+ interrupts = <7 4>;
+ clock-frequency = <0>; /* Filled in by zImage */
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
+ dcr-reg = <0x012 2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ interrupts = <5 1>;
+ interrupt-parent = <&UIC1>;
+ };
+
+ UART0: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600300 8>;
+ virtual-reg = <0xef600300>;
+ clock-frequency = <0>; /* Filled in by zImage */
+ current-speed = <0x1c200>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0 4>;
+ };
+
+ UART1: serial@ef600400 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600400 8>;
+ virtual-reg = <0xef600400>;
+ clock-frequency = <0>;
+ current-speed = <0>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <1 4>;
+ };
+
+ UART2: serial@ef600500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600500 8>;
+ virtual-reg = <0xef600500>;
+ clock-frequency = <0>;
+ current-speed = <0>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <3 4>;
+ };
+
+ UART3: serial@ef600600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0xef600600 8>;
+ virtual-reg = <0xef600600>;
+ clock-frequency = <0>;
+ current-speed = <0>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <4 4>;
+ };
+
+ IIC0: i2c@ef600700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
+ index = <0>;
+ reg = <0xef600700 0x14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <2 4>;
+ rtc@68 {
+ compatible = "stm,m41t80";
+ reg = <0x68>;
+ };
+ };
+
+ IIC1: i2c@ef600800 {
+ compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
+ index = <5>;
+ reg = <0xef600800 0x14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <7 4>;
+ };
+
+ ZMII0: emac-zmii@ef600d00 {
+ compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
+ reg = <0xef600d00 0xc>;
+ };
+
+ EMAC0: ethernet@ef600e00 {
+ linux,network-index = <0>;
+ device_type = "network";
+ compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
+ interrupt-parent = <&UIC1>;
+ interrupts = <0x1c 4 0x1d 4>;
+ reg = <0xef600e00 0x70>;
+ local-mac-address = [000000000000];
+ mal-device = <&MAL0>;
+ mal-tx-channel = <0 1>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ phy-mode = "rmii";
+ phy-map = <00000000>;
+ zmii-device = <&ZMII0>;
+ zmii-channel = <0>;
+ };
+
+ EMAC1: ethernet@ef600f00 {
+ linux,network-index = <1>;
+ device_type = "network";
+ compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
+ interrupt-parent = <&UIC1>;
+ interrupts = <0x1e 4 0x1f 4>;
+ reg = <0xef600f00 0x70>;
+ local-mac-address = [000000000000];
+ mal-device = <&MAL0>;
+ mal-tx-channel = <2 3>;
+ mal-rx-channel = <1>;
+ cell-index = <1>;
+ max-frame-size = <0x5dc>;
+ rx-fifo-size = <0x1000>;
+ tx-fifo-size = <0x800>;
+ phy-mode = "rmii";
+ phy-map = <00000000>;
+ zmii-device = <&ZMII0>;
+ zmii-channel = <1>;
+ };
+ usb@ef601000 {
+ compatible = "ohci-be";
+ reg = <0xef601000 0x80>;
+ interrupts = <8 4 9 4>;
+ interrupt-parent = <&UIC1>;
+ };
+ };
+
+ PCI0: pci@ec000000 {
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
+ primary;
+ reg = <0 0xeec00000 8 /* Config space access */
+ 0 0xeed00000 4 /* IACK */
+ 0 0xeed00000 4 /* Special cycle */
+ 0 0xef400000 0x40>; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+ * later cannot be changed. Chip supports a second
+ * IO range but we don't use it for now
+ */
+ ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
+ 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>;
+ };
+ };
+
+ chosen {
+ linux,stdout-path = "/plb/opb/serial@ef600300";
+ };
+};
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 3839d4b..45f789b 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -95,6 +95,41 @@
mode = "cpu";
};
+ dma@82a8 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+ reg = <0x82a8 4>;
+ ranges = <0 0x8100 0x1a8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x80 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x100 0x80>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
+ reg = <0x180 0x28>;
+ interrupt-parent = <&ipic>;
+ interrupts = <71 8>;
+ };
+ };
+
/* phy type (ULPI or SERIAL) are only types supported for MPH */
/* port = 0 or 1 */
usb@22000 {
@@ -186,19 +221,15 @@
interrupt-parent = <&ipic>;
};
- /* May need to remove if on a part without crypto engine */
crypto@30000 {
- model = "SEC2";
- compatible = "talitos";
+ compatible = "fsl,sec2.0";
reg = <0x30000 0x10000>;
interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
- num-channels = <4>;
- channel-fifo-len = <24>;
- exec-units-mask = <0x0000007e>;
- /* desc mask is for rev2.0,
- * we need runtime fixup for >2.0 */
- descriptor-types-mask = <0x01010ebf>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
};
/* IPIC
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 22d9671..333552b 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -44,6 +44,7 @@
timebase-frequency = <0>; // From uboot
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -161,7 +162,7 @@
interrupts = <0x12 0x2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8548-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; // 32 bytes
@@ -192,6 +193,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -262,15 +304,24 @@
fsl,has-rstcr;
};
+ crypto@30000 {
+ compatible = "fsl,sec2.1", "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0xfe>;
+ fsl,descriptor-types-mask = <0x12b0ebf>;
+ };
+
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
- #size-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
compatible = "chrp,open-pic";
device_type = "open-pic";
- big-endian;
};
};
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index 0476802..db3632e 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -43,6 +43,7 @@
timebase-frequency = <0>; // From uboot
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -66,7 +67,7 @@
interrupts = <0x12 0x2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8560-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <0x20>; // 32 bytes
@@ -97,6 +98,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -155,8 +197,8 @@
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
- #size-cells = <0>;
#interrupt-cells = <2>;
+ compatible = "chrp,open-pic";
reg = <0x40000 0x40000>;
device_type = "open-pic";
};
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 3eebeec..9652456 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -151,6 +151,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8641-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8641-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8641-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8641-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index 72d6756..72d15f0 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -12,12 +12,14 @@
*
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,sequoia";
compatible = "amcc,sequoia";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -35,13 +37,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440EPx";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
@@ -49,14 +51,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; /* Filled in by zImage */
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440epx","ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -66,11 +68,11 @@
compatible = "ibm,uic-440epx","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
@@ -78,22 +80,22 @@
compatible = "ibm,uic-440epx","ibm,uic";
interrupt-controller;
cell-index = <2>;
- dcr-reg = <0e0 009>;
+ dcr-reg = <0x0e0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1c 4 1d 4>; /* cascade */
+ interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
- dcr-reg = <00e 002>;
+ dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
- dcr-reg = <00c 002>;
+ dcr-reg = <0x00c 0x002>;
};
plb {
@@ -105,44 +107,44 @@
SDRAM0: sdram {
compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
DMA0: dma {
compatible = "ibm,dma-440epx", "ibm,dma-4xx";
- dcr-reg = <100 027>;
+ dcr-reg = <0x100 0x027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <2>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
- interrupt-map-mask = <ffffffff>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
+ interrupt-map-mask = <0xffffffff>;
};
USB1: usb@e0000400 {
compatible = "ohci-be";
- reg = <0 e0000400 60>;
+ reg = <0x00000000 0xe0000400 0x00000060>;
interrupt-parent = <&UIC0>;
- interrupts = <15 8>;
+ interrupts = <0x15 0x8>;
};
USB0: ehci@e0000300 {
compatible = "ibm,usb-ehci-440epx", "usb-ehci";
interrupt-parent = <&UIC0>;
- interrupts = <1a 4>;
- reg = <0 e0000300 90 0 e0000390 70>;
+ interrupts = <0x1a 0x4>;
+ reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
big-endian;
};
@@ -150,50 +152,50 @@
compatible = "ibm,opb-440epx", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <00000000 1 00000000 80000000
- 80000000 1 80000000 80000000>;
+ ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+ 0x80000000 0x00000001 0x80000000 0x80000000>;
interrupt-parent = <&UIC1>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc {
compatible = "ibm,ebc-440epx", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
nor_flash@0,0 {
compatible = "amd,s29gl256n", "cfi-flash";
bank-width = <2>;
- reg = <0 000000 4000000>;
+ reg = <0x00000000 0x00000000 0x04000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Kernel";
- reg = <0 180000>;
+ reg = <0x00000000 0x00180000>;
};
partition@180000 {
label = "ramdisk";
- reg = <180000 200000>;
+ reg = <0x00180000 0x00200000>;
};
partition@380000 {
label = "file system";
- reg = <380000 3aa0000>;
+ reg = <0x00380000 0x03aa0000>;
};
partition@3e20000 {
label = "kozio";
- reg = <3e20000 140000>;
+ reg = <0x03e20000 0x00140000>;
};
partition@3f60000 {
label = "env";
- reg = <3f60000 40000>;
+ reg = <0x03f60000 0x00040000>;
};
partition@3fa0000 {
label = "u-boot";
- reg = <3fa0000 60000>;
+ reg = <0x03fa0000 0x00060000>;
};
};
@@ -202,69 +204,69 @@
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <1c200>;
+ current-speed = <115200>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600400 8>;
- virtual-reg = <ef600400>;
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600500 8>;
- virtual-reg = <ef600500>;
+ reg = <0xef600500 0x00000008>;
+ virtual-reg = <0xef600500>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC1>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
};
UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600600 8>;
- virtual-reg = <ef600600>;
+ reg = <0xef600600 0x00000008>;
+ virtual-reg = <0xef600600>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC1>;
- interrupts = <4 4>;
+ interrupts = <0x4 0x4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-440epx", "ibm,iic";
- reg = <ef600700 14>;
+ reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600800 {
compatible = "ibm,iic-440epx", "ibm,iic";
- reg = <ef600800 14>;
+ reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-440epx", "ibm,zmii";
- reg = <ef600d00 c>;
+ reg = <0xef600d00 0x0000000c>;
};
RGMII0: emac-rgmii@ef601000 {
compatible = "ibm,rgmii-440epx", "ibm,rgmii";
- reg = <ef601000 8>;
+ reg = <0xef601000 0x00000008>;
has-mdio;
};
@@ -272,23 +274,23 @@
device_type = "network";
compatible = "ibm,emac-440epx", "ibm,emac4";
interrupt-parent = <&EMAC0>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 18 4
- /*Wake*/ 1 &UIC1 1d 4>;
- reg = <ef600e00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
+ /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
+ reg = <0xef600e00 0x00000074>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
rgmii-device = <&RGMII0>;
@@ -301,23 +303,23 @@
device_type = "network";
compatible = "ibm,emac-440epx", "ibm,emac4";
interrupt-parent = <&EMAC1>;
- interrupts = <0 1>;
+ interrupts = <0x0 0x1>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*Status*/ 0 &UIC0 19 4
- /*Wake*/ 1 &UIC1 1f 4>;
- reg = <ef600f00 70>;
+ interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
+ /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
+ reg = <0xef600f00 0x00000074>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
rgmii-device = <&RGMII0>;
@@ -334,10 +336,10 @@
#address-cells = <3>;
compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
primary;
- reg = <1 eec00000 8 /* Config space access */
- 1 eed00000 4 /* IACK */
- 1 eed00000 4 /* Special cycle */
- 1 ef400000 40>; /* Internal registers */
+ reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
+ 0x00000001 0xeed00000 0x00000004 /* IACK */
+ 0x00000001 0xeed00000 0x00000004 /* Special cycle */
+ 0x00000001 0xef400000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
@@ -347,16 +349,16 @@
* I/O 1 E800 0000 1 E800 FFFF 64KB
* I/O 1 E880 0000 1 EBFF FFFF 56MB
*/
- ranges = <02000000 0 80000000 1 80000000 0 40000000
- 01000000 0 00000000 1 e8000000 0 00010000
- 01000000 0 00000000 1 e8800000 0 03800000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
+ 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
+ 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* All PCI interrupts are routed to IRQ 67 */
- interrupt-map-mask = <0000 0 0 0>;
- interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
+ interrupt-map-mask = <0x0 0x0 0x0 0x0>;
+ interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
};
};
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
index 5893816..eab680c 100644
--- a/arch/powerpc/boot/dts/storcenter.dts
+++ b/arch/powerpc/boot/dts/storcenter.dts
@@ -95,6 +95,7 @@
mpic: interrupt-controller@40000 {
#interrupt-cells = <2>;
+ #address-cells = <0>;
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index f81fd7f..fcd1db6 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -38,6 +38,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -62,7 +63,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
@@ -82,6 +83,47 @@
dfsrr;
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -131,6 +173,7 @@
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
device_type = "open-pic";
};
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts
index e808e1c..058438f 100644
--- a/arch/powerpc/boot/dts/taishan.dts
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -10,12 +10,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,taishan";
compatible = "amcc,taishan";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC2;
@@ -31,13 +33,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440GX";
- reg = <0>;
- clock-frequency = <2FAF0800>; // 800MHz
+ reg = <0x00000000>;
+ clock-frequency = <800000000>; // 800MHz
timebase-frequency = <0>; // Filled in by zImage
- i-cache-line-size = <32>;
- d-cache-line-size = <32>;
- i-cache-size = <8000>; /* 32 kB */
- d-cache-size = <8000>; /* 32 kB */
+ i-cache-line-size = <50>;
+ d-cache-line-size = <50>;
+ i-cache-size = <32768>; /* 32 kB */
+ d-cache-size = <32768>; /* 32 kB */
dcr-controller;
dcr-access-method = "native";
};
@@ -45,7 +47,7 @@
memory {
device_type = "memory";
- reg = <0 0 0>; // Filled in by zImage
+ reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
};
@@ -53,7 +55,7 @@
compatible = "ibm,uic-440gx", "ibm,uic";
interrupt-controller;
cell-index = <3>;
- dcr-reg = <200 009>;
+ dcr-reg = <0x200 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -64,11 +66,11 @@
compatible = "ibm,uic-440gx", "ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <01 4 00 4>; /* cascade - first non-critical */
+ interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
interrupt-parent = <&UICB0>;
};
@@ -77,11 +79,11 @@
compatible = "ibm,uic-440gx", "ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <03 4 02 4>; /* cascade */
+ interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
interrupt-parent = <&UICB0>;
};
@@ -89,29 +91,29 @@
compatible = "ibm,uic-440gx", "ibm,uic";
interrupt-controller;
cell-index = <2>; /* was 1 */
- dcr-reg = <210 009>;
+ dcr-reg = <0x210 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <05 4 04 4>; /* cascade */
+ interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
interrupt-parent = <&UICB0>;
};
CPC0: cpc {
compatible = "ibm,cpc-440gp";
- dcr-reg = <0b0 003 0e0 010>;
+ dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
// FIXME: anything else?
};
L2C0: l2c {
compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
- dcr-reg = <20 8 /* Internal SRAM DCR's */
- 30 8>; /* L2 cache DCR's */
- cache-line-size = <20>; /* 32 bytes */
- cache-size = <40000>; /* L2, 256K */
+ dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
+ 0x030 0x008>; /* L2 cache DCR's */
+ cache-line-size = <32>; /* 32 bytes */
+ cache-size = <262144>; /* L2, 256K */
interrupt-parent = <&UIC2>;
- interrupts = <17 1>;
+ interrupts = <0x17 0x1>;
};
plb {
@@ -119,41 +121,41 @@
#address-cells = <2>;
#size-cells = <1>;
ranges;
- clock-frequency = <9896800>; // 160MHz
+ clock-frequency = <160000000>; // 160MHz
SDRAM0: memory-controller {
compatible = "ibm,sdram-440gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
// FIXME: anything else?
};
SRAM0: sram {
compatible = "ibm,sram-440gp";
- dcr-reg = <020 8 00a 1>;
+ dcr-reg = <0x020 0x008 0x00a 0x001>;
};
DMA0: dma {
// FIXME: ???
compatible = "ibm,dma-440gp";
- dcr-reg = <100 027>;
+ dcr-reg = <0x100 0x027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
num-rx-chans = <4>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
- interrupt-map-mask = <ffffffff>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
+ interrupt-map-mask = <0xffffffff>;
};
POB0: opb {
@@ -162,29 +164,56 @@
#size-cells = <1>;
/* Wish there was a nicer way of specifying a full 32-bit
range */
- ranges = <00000000 1 00000000 80000000
- 80000000 1 80000000 80000000>;
- dcr-reg = <090 00b>;
+ ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+ 0x80000000 0x00000001 0x80000000 0x80000000>;
+ dcr-reg = <0x090 0x00b>;
interrupt-parent = <&UIC1>;
- interrupts = <7 4>;
- clock-frequency = <4C4B400>; // 80MHz
+ interrupts = <0x7 0x4>;
+ clock-frequency = <80000000>; // 80MHz
EBC0: ebc {
compatible = "ibm,ebc-440gx", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
- clock-frequency = <4C4B400>; // 80MHz
+ clock-frequency = <80000000>; // 80MHz
/* ranges property is supplied by zImage
* based on firmware's configuration of the
* EBC bridge */
- interrupts = <5 4>;
+ interrupts = <0x5 0x4>;
interrupt-parent = <&UIC1>;
- /* TODO: Add other EBC devices */
+ nor_flash@0,0 {
+ compatible = "cfi-flash";
+ bank-width = <4>;
+ device-width = <2>;
+ reg = <0x0 0x0 0x4000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "kernel";
+ reg = <0x0 0x180000>;
+ };
+ partition@180000 {
+ label = "root";
+ reg = <0x180000 0x200000>;
+ };
+ partition@380000 {
+ label = "user";
+ reg = <0x380000 0x3bc0000>;
+ };
+ partition@3f40000 {
+ label = "env";
+ reg = <0x3f40000 0x80000>;
+ };
+ partition@3fc0000 {
+ label = "u-boot";
+ reg = <0x3fc0000 0x40000>;
+ };
+ };
};
@@ -192,103 +221,103 @@
UART0: serial@40000200 {
device_type = "serial";
compatible = "ns16550";
- reg = <40000200 8>;
- virtual-reg = <e0000200>;
- clock-frequency = <A8C000>;
- current-speed = <1C200>; /* 115200 */
+ reg = <0x40000200 0x00000008>;
+ virtual-reg = <0xe0000200>;
+ clock-frequency = <11059200>;
+ current-speed = <115200>; /* 115200 */
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@40000300 {
device_type = "serial";
compatible = "ns16550";
- reg = <40000300 8>;
- virtual-reg = <e0000300>;
- clock-frequency = <A8C000>;
- current-speed = <1C200>; /* 115200 */
+ reg = <0x40000300 0x00000008>;
+ virtual-reg = <0xe0000300>;
+ clock-frequency = <11059200>;
+ current-speed = <115200>; /* 115200 */
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
IIC0: i2c@40000400 {
/* FIXME */
compatible = "ibm,iic-440gp", "ibm,iic";
- reg = <40000400 14>;
+ reg = <0x40000400 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@40000500 {
/* FIXME */
compatible = "ibm,iic-440gp", "ibm,iic";
- reg = <40000500 14>;
+ reg = <0x40000500 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
};
GPIO0: gpio@40000700 {
/* FIXME */
compatible = "ibm,gpio-440gp";
- reg = <40000700 20>;
+ reg = <0x40000700 0x00000020>;
};
ZMII0: emac-zmii@40000780 {
compatible = "ibm,zmii-440gx", "ibm,zmii";
- reg = <40000780 c>;
+ reg = <0x40000780 0x0000000c>;
};
RGMII0: emac-rgmii@40000790 {
compatible = "ibm,rgmii";
- reg = <40000790 8>;
+ reg = <0x40000790 0x00000008>;
};
TAH0: emac-tah@40000b50 {
compatible = "ibm,tah-440gx", "ibm,tah";
- reg = <40000b50 30>;
+ reg = <0x40000b50 0x00000030>;
};
TAH1: emac-tah@40000d50 {
compatible = "ibm,tah-440gx", "ibm,tah";
- reg = <40000d50 30>;
+ reg = <0x40000d50 0x00000030>;
};
EMAC0: ethernet@40000800 {
- unused = <1>;
+ unused = <0x1>;
device_type = "network";
compatible = "ibm,emac-440gx", "ibm,emac4";
interrupt-parent = <&UIC1>;
- interrupts = <1c 4 1d 4>;
- reg = <40000800 70>;
+ interrupts = <0x1c 0x4 0x1d 0x4>;
+ reg = <0x40000800 0x00000074>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000001>;
+ phy-map = <0x00000001>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
EMAC1: ethernet@40000900 {
- unused = <1>;
+ unused = <0x1>;
device_type = "network";
compatible = "ibm,emac-440gx", "ibm,emac4";
interrupt-parent = <&UIC1>;
- interrupts = <1e 4 1f 4>;
- reg = <40000900 70>;
+ interrupts = <0x1e 0x4 0x1f 0x4>;
+ reg = <0x40000900 0x00000074>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <1>;
mal-rx-channel = <1>;
cell-index = <1>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000001>;
+ phy-map = <0x00000001>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
};
@@ -297,18 +326,18 @@
device_type = "network";
compatible = "ibm,emac-440gx", "ibm,emac4";
interrupt-parent = <&UIC2>;
- interrupts = <0 4 1 4>;
- reg = <40000c00 70>;
+ interrupts = <0x0 0x4 0x1 0x4>;
+ reg = <0x40000c00 0x00000074>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <2>;
mal-rx-channel = <2>;
cell-index = <2>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000001>;
+ phy-map = <0x00000001>;
rgmii-device = <&RGMII0>;
rgmii-channel = <0>;
zmii-device = <&ZMII0>;
@@ -321,18 +350,18 @@
device_type = "network";
compatible = "ibm,emac-440gx", "ibm,emac4";
interrupt-parent = <&UIC2>;
- interrupts = <2 4 3 4>;
- reg = <40000e00 70>;
+ interrupts = <0x2 0x4 0x3 0x4>;
+ reg = <0x40000e00 0x00000074>;
local-mac-address = [000000000000]; // Filled in by zImage
mal-device = <&MAL0>;
mal-tx-channel = <3>;
mal-rx-channel = <3>;
cell-index = <3>;
- max-frame-size = <2328>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <9000>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rgmii";
- phy-map = <00000003>;
+ phy-map = <0x00000003>;
rgmii-device = <&RGMII0>;
rgmii-channel = <1>;
zmii-device = <&ZMII0>;
@@ -344,9 +373,9 @@
GPT0: gpt@40000a00 {
/* FIXME */
- reg = <40000a00 d4>;
+ reg = <0x40000a00 0x000000d4>;
interrupt-parent = <&UIC0>;
- interrupts = <12 4 13 4 14 4 15 4 16 4>;
+ interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
};
};
@@ -360,34 +389,34 @@
primary;
large-inbound-windows;
enable-msi-hole;
- reg = <2 0ec00000 8 /* Config space access */
- 0 0 0 /* no IACK cycles */
- 2 0ed00000 4 /* Special cycles */
- 2 0ec80000 100 /* Internal registers */
- 2 0ec80100 fc>; /* Internal messaging registers */
+ reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */
+ 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
+ 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
+ 0x00000002 0x0ec80000 0x00000100 /* Internal registers */
+ 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed
*/
- ranges = <02000000 0 80000000 00000003 80000000 0 80000000
- 01000000 0 00000000 00000002 08000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
+ 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 1 */
- 0800 0 0 1 &UIC0 17 8
- 0800 0 0 2 &UIC0 18 8
- 0800 0 0 3 &UIC0 19 8
- 0800 0 0 4 &UIC0 1a 8
+ 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8
+ 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8
+ 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8
+ 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8
/* IDSEL 2 */
- 1000 0 0 1 &UIC0 18 8
- 1000 0 0 2 &UIC0 19 8
- 1000 0 0 3 &UIC0 1a 8
- 1000 0 0 4 &UIC0 17 8
+ 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8
+ 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8
+ 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8
+ 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8
>;
};
};
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 773a68e..3008bf8 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -70,6 +70,20 @@
fsl,has-wdt;
};
+ can@900 {
+ compatible = "fsl,mpc5200-mscan";
+ interrupts = <2 17 0>;
+ interrupt-parent = <&mpc5200_pic>;
+ reg = <0x900 0x80>;
+ };
+
+ can@980 {
+ compatible = "fsl,mpc5200-mscan";
+ interrupts = <2 18 0>;
+ interrupt-parent = <&mpc5200_pic>;
+ reg = <0x980 0x80>;
+ };
+
gpio@b00 {
compatible = "fsl,mpc5200-gpio";
reg = <0xb00 0x40>;
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 1addb3a..e1d260b 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -12,8 +12,8 @@
/dts-v1/;
/ {
- model = "tqm,8540";
- compatible = "tqm,8540", "tqm,85xx";
+ model = "tqc,tqm8540";
+ compatible = "tqc,tqm8540";
#address-cells = <1>;
#size-cells = <1>;
@@ -40,6 +40,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -64,7 +65,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
@@ -89,6 +90,47 @@
};
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8540-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -177,6 +219,7 @@
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
};
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 9e01093..d76441e 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -12,8 +12,8 @@
/dts-v1/;
/ {
- model = "tqm,8541";
- compatible = "tqm,8541", "tqm,85xx";
+ model = "tqc,tqm8541";
+ compatible = "tqc,tqm8541";
#address-cells = <1>;
#size-cells = <1>;
@@ -39,6 +39,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
@@ -88,6 +89,47 @@
};
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8541-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8541-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8541-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8541-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -158,12 +200,24 @@
interrupt-parent = <&mpic>;
};
+ crypto@30000 {
+ compatible = "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
+ };
+
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
cpm@919c0 {
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
new file mode 100644
index 0000000..64d2d5b
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -0,0 +1,406 @@
+/*
+ * TQM8548 Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "tqc,tqm8548";
+ compatible = "tqc,tqm8548";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8548@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ next-level-cache = <&L2>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000>; // Filled in by U-Boot
+ };
+
+ soc8548@a0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xa0000000 0x100000>;
+ reg = <0xa0000000 0x1000>; // CCSRBAR
+ bus-frequency = <0>;
+
+ memory-controller@2000 {
+ compatible = "fsl,mpc8548-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,mpc8548-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>; // 32 bytes
+ cache-size = <0x80000>; // L2, 512K
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy1: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy2: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ phy4: ethernet-phy@4 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <4>;
+ device_type = "ethernet-phy";
+ };
+ phy5: ethernet-phy@5 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <5>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
+ };
+
+ enet2: ethernet@26000 {
+ cell-index = <2>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x26000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <31 2 32 2 33 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy3>;
+ };
+
+ enet3: ethernet@27000 {
+ cell-index = <3>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x27000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <37 2 38 2 39 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy4>;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ current-speed = <115200>;
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ current-speed = <115200>;
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ global-utilities@e0000 { // global utilities reg
+ compatible = "fsl,mpc8548-guts";
+ reg = <0xe0000 0x1000>;
+ fsl,has-rstcr;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ };
+ };
+
+ localbus@a0005000 {
+ compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
+ "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0xa0005000 0x100>; // BRx, ORx, etc.
+
+ ranges = <
+ 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
+ 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
+ 2 0x0 0xa3000000 0x00008000 // CAN (2 x i82527)
+ 3 0x0 0xa3010000 0x00008000 // NAND FLASH
+
+ >;
+
+ flash@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <1 0x0 0x8000000>;
+ bank-width = <4>;
+ device-width = <1>;
+
+ partition@0 {
+ label = "kernel";
+ reg = <0x00000000 0x00200000>;
+ };
+ partition@200000 {
+ label = "root";
+ reg = <0x00200000 0x00300000>;
+ };
+ partition@500000 {
+ label = "user";
+ reg = <0x00500000 0x07a00000>;
+ };
+ partition@7f00000 {
+ label = "env1";
+ reg = <0x07f00000 0x00040000>;
+ };
+ partition@7f40000 {
+ label = "env2";
+ reg = <0x07f40000 0x00040000>;
+ };
+ partition@7f80000 {
+ label = "u-boot";
+ reg = <0x07f80000 0x00080000>;
+ read-only;
+ };
+ };
+
+ /* Note: CAN support needs be enabled in U-Boot */
+ can0@2,0 {
+ compatible = "intel,82527"; // Bosch CC770
+ reg = <2 0x0 0x100>;
+ interrupts = <4 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+ can1@2,100 {
+ compatible = "intel,82527"; // Bosch CC770
+ reg = <2 0x100 0x100>;
+ interrupts = <4 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+ /* Note: NAND support needs to be enabled in U-Boot */
+ upm@3,0 {
+ #address-cells = <0>;
+ #size-cells = <0>;
+ compatible = "fsl,upm-nand";
+ reg = <3 0x0 0x800>;
+ fsl,upm-addr-offset = <0x10>;
+ fsl,upm-cmd-offset = <0x08>;
+ chip-delay = <25>; // in micro-seconds
+
+ nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "fs";
+ reg = <0x00000000 0x01000000>;
+ };
+ };
+ };
+ };
+
+ pci0: pci@a0008000 {
+ cell-index = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ device_type = "pci";
+ reg = <0xa0008000 0x1000>;
+ clock-frequency = <33333333>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 28 */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xa2000000 0 0x01000000>;
+ };
+
+ pci1: pcie@a000a000 {
+ cell-index = <2>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 0x0 (PEX) */
+ 0x00000 0 0 1 &mpic 0 1
+ 0x00000 0 0 2 &mpic 1 1
+ 0x00000 0 0 3 &mpic 2 1
+ 0x00000 0 0 4 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <26 2>;
+ bus-range = <0 0xff>;
+ ranges = <0x02000000 0 0xb0000000 0xb0000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xaf000000 0 0x08000000>;
+ clock-frequency = <33333333>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xa000a000 0x1000>;
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <0x02000000 0 0xb0000000 0x02000000 0
+ 0xb0000000 0 0x10000000
+ 0x01000000 0 0x00000000 0x01000000 0
+ 0x00000000 0 0x08000000>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
new file mode 100644
index 0000000..2563112
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -0,0 +1,411 @@
+/*
+ * TQM8548 Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "tqc,tqm8548";
+ compatible = "tqc,tqm8548";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8548@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ next-level-cache = <&L2>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000>; // Filled in by U-Boot
+ };
+
+ soc8548@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xe0000000 0x100000>;
+ reg = <0xe0000000 0x1000>; // CCSRBAR
+ bus-frequency = <0>;
+
+ memory-controller@2000 {
+ compatible = "fsl,mpc8548-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,mpc8548-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>; // 32 bytes
+ cache-size = <0x80000>; // L2, 512K
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ };
+ };
+
+ i2c@3100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x3100 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8548-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy1: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy2: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ phy4: ethernet-phy@4 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <4>;
+ device_type = "ethernet-phy";
+ };
+ phy5: ethernet-phy@5 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <5>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
+ };
+
+ enet2: ethernet@26000 {
+ cell-index = <2>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x26000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <31 2 32 2 33 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy3>;
+ };
+
+ enet3: ethernet@27000 {
+ cell-index = <3>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <0x27000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <37 2 38 2 39 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy4>;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ current-speed = <115200>;
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ current-speed = <115200>;
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ global-utilities@e0000 { // global utilities reg
+ compatible = "fsl,mpc8548-guts";
+ reg = <0xe0000 0x1000>;
+ fsl,has-rstcr;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ };
+ };
+
+ localbus@e0005000 {
+ compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
+ "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0xe0005000 0x100>; // BRx, ORx, etc.
+
+ ranges = <
+ 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
+ 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
+ 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
+ 3 0x0 0xe3010000 0x00008000 // NAND FLASH
+
+ >;
+
+ flash@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <1 0x0 0x8000000>;
+ bank-width = <4>;
+ device-width = <1>;
+
+ partition@0 {
+ label = "kernel";
+ reg = <0x00000000 0x00200000>;
+ };
+ partition@200000 {
+ label = "root";
+ reg = <0x00200000 0x00300000>;
+ };
+ partition@500000 {
+ label = "user";
+ reg = <0x00500000 0x07a00000>;
+ };
+ partition@7f00000 {
+ label = "env1";
+ reg = <0x07f00000 0x00040000>;
+ };
+ partition@7f40000 {
+ label = "env2";
+ reg = <0x07f40000 0x00040000>;
+ };
+ partition@7f80000 {
+ label = "u-boot";
+ reg = <0x07f80000 0x00080000>;
+ read-only;
+ };
+ };
+
+ /* Note: CAN support needs be enabled in U-Boot */
+ can0@2,0 {
+ compatible = "intel,82527"; // Bosch CC770
+ reg = <2 0x0 0x100>;
+ interrupts = <4 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+ can1@2,100 {
+ compatible = "intel,82527"; // Bosch CC770
+ reg = <2 0x100 0x100>;
+ interrupts = <4 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+ /* Note: NAND support needs to be enabled in U-Boot */
+ upm@3,0 {
+ #address-cells = <0>;
+ #size-cells = <0>;
+ compatible = "fsl,upm-nand";
+ reg = <3 0x0 0x800>;
+ fsl,upm-addr-offset = <0x10>;
+ fsl,upm-cmd-offset = <0x08>;
+ chip-delay = <25>; // in micro-seconds
+
+ nand@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "fs";
+ reg = <0x00000000 0x01000000>;
+ };
+ };
+ };
+ };
+
+ pci0: pci@e0008000 {
+ cell-index = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ device_type = "pci";
+ reg = <0xe0008000 0x1000>;
+ clock-frequency = <33333333>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 28 */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
+ };
+
+ pci1: pcie@e000a000 {
+ cell-index = <2>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 0x0 (PEX) */
+ 0x00000 0 0 1 &mpic 0 1
+ 0x00000 0 0 2 &mpic 1 1
+ 0x00000 0 0 3 &mpic 2 1
+ 0x00000 0 0 4 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <26 2>;
+ bus-range = <0 0xff>;
+ ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xef000000 0 0x08000000>;
+ clock-frequency = <33333333>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe000a000 0x1000>;
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <0x02000000 0 0xc0000000 0x02000000 0
+ 0xc0000000 0 0x20000000
+ 0x01000000 0 0x00000000 0x01000000 0
+ 0x00000000 0 0x08000000>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index a20eb06..6f7ea59 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -12,8 +12,8 @@
/dts-v1/;
/ {
- model = "tqm,8555";
- compatible = "tqm,8555", "tqm,85xx";
+ model = "tqc,tqm8555";
+ compatible = "tqc,tqm8555";
#address-cells = <1>;
#size-cells = <1>;
@@ -39,6 +39,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -63,7 +64,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
@@ -88,6 +89,47 @@
};
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -158,12 +200,24 @@
interrupt-parent = <&mpic>;
};
+ crypto@30000 {
+ compatible = "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
+ };
+
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
cpm@919c0 {
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index b9ac6c9..3fe3520 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -2,6 +2,7 @@
* TQM 8560 Device Tree Source
*
* Copyright 2008 Freescale Semiconductor Inc.
+ * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -12,8 +13,8 @@
/dts-v1/;
/ {
- model = "tqm,8560";
- compatible = "tqm,8560", "tqm,85xx";
+ model = "tqc,tqm8560";
+ compatible = "tqc,tqm8560";
#address-cells = <1>;
#size-cells = <1>;
@@ -40,6 +41,7 @@
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
+ next-level-cache = <&L2>;
};
};
@@ -64,7 +66,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>;
@@ -89,6 +91,47 @@
};
};
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8560-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
@@ -145,6 +188,7 @@
#interrupt-cells = <2>;
reg = <0x40000 0x40000>;
device_type = "open-pic";
+ compatible = "chrp,open-pic";
};
cpm@919c0 {
@@ -221,6 +265,70 @@
};
};
+ localbus@e0005000 {
+ compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
+ "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <0xe0005000 0x100>; // BRx, ORx, etc.
+
+ ranges = <
+ 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
+ 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
+ 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
+ >;
+
+ flash@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <1 0x0 0x8000000>;
+ bank-width = <4>;
+ device-width = <1>;
+
+ partition@0 {
+ label = "kernel";
+ reg = <0x00000000 0x00200000>;
+ };
+ partition@200000 {
+ label = "root";
+ reg = <0x00200000 0x00300000>;
+ };
+ partition@500000 {
+ label = "user";
+ reg = <0x00500000 0x07a00000>;
+ };
+ partition@7f00000 {
+ label = "env1";
+ reg = <0x07f00000 0x00040000>;
+ };
+ partition@7f40000 {
+ label = "env2";
+ reg = <0x07f40000 0x00040000>;
+ };
+ partition@7f80000 {
+ label = "u-boot";
+ reg = <0x07f80000 0x00080000>;
+ read-only;
+ };
+ };
+
+ /* Note: CAN support needs be enabled in U-Boot */
+ can0@2,0 {
+ compatible = "intel,82527"; // Bosch CC770
+ reg = <2 0x0 0x100>;
+ interrupts = <4 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+ can1@2,100 {
+ compatible = "intel,82527"; // Bosch CC770
+ reg = <2 0x100 0x100>;
+ interrupts = <4 0>;
+ interrupt-parent = <&mpic>;
+ };
+ };
+
pci0: pci@e0008000 {
cell-index = <0>;
#interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts
new file mode 100644
index 0000000..dc8e78e
--- /dev/null
+++ b/arch/powerpc/boot/dts/virtex440-ml507.dts
@@ -0,0 +1,296 @@
+/*
+ * This file supports the Xilinx ML507 board with the 440 processor.
+ * A reference design for the FPGA is provided at http://git.xilinx.com.
+ *
+ * (C) Copyright 2008 Xilinx, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,virtex440";
+ dcr-parent = <&ppc440_0>;
+ model = "testing";
+ DDR2_SDRAM: memory@0 {
+ device_type = "memory";
+ reg = < 0 0x10000000 >;
+ } ;
+ chosen {
+ bootargs = "console=ttyS0 ip=on root=/dev/ram";
+ linux,stdout-path = "/plb@0/serial@83e00000";
+ } ;
+ cpus {
+ #address-cells = <1>;
+ #cpus = <1>;
+ #size-cells = <0>;
+ ppc440_0: cpu@0 {
+ clock-frequency = <400000000>;
+ compatible = "PowerPC,440", "ibm,ppc440";
+ d-cache-line-size = <0x20>;
+ d-cache-size = <0x8000>;
+ dcr-access-method = "native";
+ dcr-controller ;
+ device_type = "cpu";
+ i-cache-line-size = <0x20>;
+ i-cache-size = <0x8000>;
+ model = "PowerPC,440";
+ reg = <0>;
+ timebase-frequency = <400000000>;
+ xlnx,apu-control = <1>;
+ xlnx,apu-udi-0 = <0>;
+ xlnx,apu-udi-1 = <0>;
+ xlnx,apu-udi-10 = <0>;
+ xlnx,apu-udi-11 = <0>;
+ xlnx,apu-udi-12 = <0>;
+ xlnx,apu-udi-13 = <0>;
+ xlnx,apu-udi-14 = <0>;
+ xlnx,apu-udi-15 = <0>;
+ xlnx,apu-udi-2 = <0>;
+ xlnx,apu-udi-3 = <0>;
+ xlnx,apu-udi-4 = <0>;
+ xlnx,apu-udi-5 = <0>;
+ xlnx,apu-udi-6 = <0>;
+ xlnx,apu-udi-7 = <0>;
+ xlnx,apu-udi-8 = <0>;
+ xlnx,apu-udi-9 = <0>;
+ xlnx,dcr-autolock-enable = <1>;
+ xlnx,dcu-rd-ld-cache-plb-prio = <0>;
+ xlnx,dcu-rd-noncache-plb-prio = <0>;
+ xlnx,dcu-rd-touch-plb-prio = <0>;
+ xlnx,dcu-rd-urgent-plb-prio = <0>;
+ xlnx,dcu-wr-flush-plb-prio = <0>;
+ xlnx,dcu-wr-store-plb-prio = <0>;
+ xlnx,dcu-wr-urgent-plb-prio = <0>;
+ xlnx,dma0-control = <0>;
+ xlnx,dma0-plb-prio = <0>;
+ xlnx,dma0-rxchannelctrl = <0x1010000>;
+ xlnx,dma0-rxirqtimer = <0x3ff>;
+ xlnx,dma0-txchannelctrl = <0x1010000>;
+ xlnx,dma0-txirqtimer = <0x3ff>;
+ xlnx,dma1-control = <0>;
+ xlnx,dma1-plb-prio = <0>;
+ xlnx,dma1-rxchannelctrl = <0x1010000>;
+ xlnx,dma1-rxirqtimer = <0x3ff>;
+ xlnx,dma1-txchannelctrl = <0x1010000>;
+ xlnx,dma1-txirqtimer = <0x3ff>;
+ xlnx,dma2-control = <0>;
+ xlnx,dma2-plb-prio = <0>;
+ xlnx,dma2-rxchannelctrl = <0x1010000>;
+ xlnx,dma2-rxirqtimer = <0x3ff>;
+ xlnx,dma2-txchannelctrl = <0x1010000>;
+ xlnx,dma2-txirqtimer = <0x3ff>;
+ xlnx,dma3-control = <0>;
+ xlnx,dma3-plb-prio = <0>;
+ xlnx,dma3-rxchannelctrl = <0x1010000>;
+ xlnx,dma3-rxirqtimer = <0x3ff>;
+ xlnx,dma3-txchannelctrl = <0x1010000>;
+ xlnx,dma3-txirqtimer = <0x3ff>;
+ xlnx,endian-reset = <0>;
+ xlnx,generate-plb-timespecs = <1>;
+ xlnx,icu-rd-fetch-plb-prio = <0>;
+ xlnx,icu-rd-spec-plb-prio = <0>;
+ xlnx,icu-rd-touch-plb-prio = <0>;
+ xlnx,interconnect-imask = <0xffffffff>;
+ xlnx,mplb-allow-lock-xfer = <1>;
+ xlnx,mplb-arb-mode = <0>;
+ xlnx,mplb-awidth = <0x20>;
+ xlnx,mplb-counter = <0x500>;
+ xlnx,mplb-dwidth = <0x80>;
+ xlnx,mplb-max-burst = <8>;
+ xlnx,mplb-native-dwidth = <0x80>;
+ xlnx,mplb-p2p = <0>;
+ xlnx,mplb-prio-dcur = <2>;
+ xlnx,mplb-prio-dcuw = <3>;
+ xlnx,mplb-prio-icu = <4>;
+ xlnx,mplb-prio-splb0 = <1>;
+ xlnx,mplb-prio-splb1 = <0>;
+ xlnx,mplb-read-pipe-enable = <1>;
+ xlnx,mplb-sync-tattribute = <0>;
+ xlnx,mplb-wdog-enable = <1>;
+ xlnx,mplb-write-pipe-enable = <1>;
+ xlnx,mplb-write-post-enable = <1>;
+ xlnx,num-dma = <1>;
+ xlnx,pir = <0xf>;
+ xlnx,ppc440mc-addr-base = <0>;
+ xlnx,ppc440mc-addr-high = <0xfffffff>;
+ xlnx,ppc440mc-arb-mode = <0>;
+ xlnx,ppc440mc-bank-conflict-mask = <0xc00000>;
+ xlnx,ppc440mc-control = <0xf810008f>;
+ xlnx,ppc440mc-max-burst = <8>;
+ xlnx,ppc440mc-prio-dcur = <2>;
+ xlnx,ppc440mc-prio-dcuw = <3>;
+ xlnx,ppc440mc-prio-icu = <4>;
+ xlnx,ppc440mc-prio-splb0 = <1>;
+ xlnx,ppc440mc-prio-splb1 = <0>;
+ xlnx,ppc440mc-row-conflict-mask = <0x3ffe00>;
+ xlnx,ppcdm-asyncmode = <0>;
+ xlnx,ppcds-asyncmode = <0>;
+ xlnx,user-reset = <0>;
+ DMA0: sdma@80 {
+ compatible = "xlnx,ll-dma-1.00.a";
+ dcr-reg = < 0x80 0x11 >;
+ interrupt-parent = <&xps_intc_0>;
+ interrupts = < 9 2 0xa 2 >;
+ } ;
+ } ;
+ } ;
+ plb_v46_0: plb@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,plb-v46-1.02.a", "simple-bus";
+ ranges ;
+ DIP_Switches_8Bit: gpio@81460000 {
+ compatible = "xlnx,xps-gpio-1.00.a";
+ interrupt-parent = <&xps_intc_0>;
+ interrupts = < 6 2 >;
+ reg = < 0x81460000 0x10000 >;
+ xlnx,all-inputs = <1>;
+ xlnx,all-inputs-2 = <0>;
+ xlnx,dout-default = <0>;
+ xlnx,dout-default-2 = <0>;
+ xlnx,family = "virtex5";
+ xlnx,gpio-width = <8>;
+ xlnx,interrupt-present = <1>;
+ xlnx,is-bidir = <1>;
+ xlnx,is-bidir-2 = <1>;
+ xlnx,is-dual = <0>;
+ xlnx,tri-default = <0xffffffff>;
+ xlnx,tri-default-2 = <0xffffffff>;
+ } ;
+ Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "xlnx,compound";
+ ethernet@81c00000 {
+ compatible = "xlnx,xps-ll-temac-1.01.b";
+ device_type = "network";
+ interrupt-parent = <&xps_intc_0>;
+ interrupts = < 5 2 >;
+ llink-connected = <&DMA0>;
+ local-mac-address = [ 02 00 00 00 00 00 ];
+ reg = < 0x81c00000 0x40 >;
+ xlnx,bus2core-clk-ratio = <1>;
+ xlnx,phy-type = <1>;
+ xlnx,phyaddr = <1>;
+ xlnx,rxcsum = <1>;
+ xlnx,rxfifo = <0x1000>;
+ xlnx,temac-type = <0>;
+ xlnx,txcsum = <1>;
+ xlnx,txfifo = <0x1000>;
+ } ;
+ } ;
+ LEDs_8Bit: gpio@81400000 {
+ compatible = "xlnx,xps-gpio-1.00.a";
+ reg = < 0x81400000 0x10000 >;
+ xlnx,all-inputs = <0>;
+ xlnx,all-inputs-2 = <0>;
+ xlnx,dout-default = <0>;
+ xlnx,dout-default-2 = <0>;
+ xlnx,family = "virtex5";
+ xlnx,gpio-width = <8>;
+ xlnx,interrupt-present = <0>;
+ xlnx,is-bidir = <1>;
+ xlnx,is-bidir-2 = <1>;
+ xlnx,is-dual = <0>;
+ xlnx,tri-default = <0xffffffff>;
+ xlnx,tri-default-2 = <0xffffffff>;
+ } ;
+ LEDs_Positions: gpio@81420000 {
+ compatible = "xlnx,xps-gpio-1.00.a";
+ reg = < 0x81420000 0x10000 >;
+ xlnx,all-inputs = <0>;
+ xlnx,all-inputs-2 = <0>;
+ xlnx,dout-default = <0>;
+ xlnx,dout-default-2 = <0>;
+ xlnx,family = "virtex5";
+ xlnx,gpio-width = <5>;
+ xlnx,interrupt-present = <0>;
+ xlnx,is-bidir = <1>;
+ xlnx,is-bidir-2 = <1>;
+ xlnx,is-dual = <0>;
+ xlnx,tri-default = <0xffffffff>;
+ xlnx,tri-default-2 = <0xffffffff>;
+ } ;
+ Push_Buttons_5Bit: gpio@81440000 {
+ compatible = "xlnx,xps-gpio-1.00.a";
+ interrupt-parent = <&xps_intc_0>;
+ interrupts = < 7 2 >;
+ reg = < 0x81440000 0x10000 >;
+ xlnx,all-inputs = <1>;
+ xlnx,all-inputs-2 = <0>;
+ xlnx,dout-default = <0>;
+ xlnx,dout-default-2 = <0>;
+ xlnx,family = "virtex5";
+ xlnx,gpio-width = <5>;
+ xlnx,interrupt-present = <1>;
+ xlnx,is-bidir = <1>;
+ xlnx,is-bidir-2 = <1>;
+ xlnx,is-dual = <0>;
+ xlnx,tri-default = <0xffffffff>;
+ xlnx,tri-default-2 = <0xffffffff>;
+ } ;
+ RS232_Uart_1: serial@83e00000 {
+ clock-frequency = <100000000>;
+ compatible = "xlnx,xps-uart16550-2.00.a", "ns16550";
+ current-speed = <0x2580>;
+ device_type = "serial";
+ interrupt-parent = <&xps_intc_0>;
+ interrupts = < 8 2 >;
+ reg = < 0x83e00000 0x10000 >;
+ reg-offset = <3>;
+ reg-shift = <2>;
+ xlnx,family = "virtex5";
+ xlnx,has-external-rclk = <0>;
+ xlnx,has-external-xin = <0>;
+ xlnx,is-a-16550 = <1>;
+ } ;
+ SysACE_CompactFlash: sysace@83600000 {
+ compatible = "xlnx,xps-sysace-1.00.a";
+ interrupt-parent = <&xps_intc_0>;
+ interrupts = < 4 2 >;
+ reg = < 0x83600000 0x10000 >;
+ xlnx,family = "virtex5";
+ xlnx,mem-width = <0x10>;
+ } ;
+ xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 {
+ compatible = "xlnx,xps-bram-if-cntlr-1.00.a";
+ reg = < 0xffff0000 0x10000 >;
+ xlnx,family = "virtex5";
+ } ;
+ xps_intc_0: interrupt-controller@81800000 {
+ #interrupt-cells = <2>;
+ compatible = "xlnx,xps-intc-1.00.a";
+ interrupt-controller ;
+ reg = < 0x81800000 0x10000 >;
+ xlnx,num-intr-inputs = <0xb>;
+ } ;
+ xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
+ compatible = "xlnx,xps-timebase-wdt-1.00.b";
+ interrupt-parent = <&xps_intc_0>;
+ interrupts = < 2 0 1 2 >;
+ reg = < 0x83a00000 0x10000 >;
+ xlnx,family = "virtex5";
+ xlnx,wdt-enable-once = <0>;
+ xlnx,wdt-interval = <0x1e>;
+ } ;
+ xps_timer_1: timer@83c00000 {
+ compatible = "xlnx,xps-timer-1.00.a";
+ interrupt-parent = <&xps_intc_0>;
+ interrupts = < 3 2 >;
+ reg = < 0x83c00000 0x10000 >;
+ xlnx,count-width = <0x20>;
+ xlnx,family = "virtex5";
+ xlnx,gen0-assert = <1>;
+ xlnx,gen1-assert = <1>;
+ xlnx,one-timer-only = <1>;
+ xlnx,trig0-assert = <1>;
+ xlnx,trig1-assert = <1>;
+ } ;
+ } ;
+} ;
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts
index a328607..4a9f726 100644
--- a/arch/powerpc/boot/dts/walnut.dts
+++ b/arch/powerpc/boot/dts/walnut.dts
@@ -9,12 +9,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "ibm,walnut";
compatible = "ibm,walnut";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC;
@@ -29,13 +31,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,405GP";
- reg = <0>;
- clock-frequency = <bebc200>; /* Filled in by zImage */
+ reg = <0x00000000>;
+ clock-frequency = <200000000>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <4000>;
- d-cache-size = <4000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <16384>;
+ d-cache-size = <16384>;
dcr-controller;
dcr-access-method = "native";
};
@@ -43,14 +45,14 @@
memory {
device_type = "memory";
- reg = <0 0>; /* Filled in by zImage */
+ reg = <0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller {
compatible = "ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 9>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -65,63 +67,63 @@
SDRAM0: memory-controller {
compatible = "ibm,sdram-405gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
MAL: mcmal {
compatible = "ibm,mcmal-405gp", "ibm,mcmal";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <1>;
num-rx-chans = <1>;
interrupt-parent = <&UIC0>;
interrupts = <
- b 4 /* TXEOB */
- c 4 /* RXEOB */
- a 4 /* SERR */
- d 4 /* TXDE */
- e 4 /* RXDE */>;
+ 0xb 0x4 /* TXEOB */
+ 0xc 0x4 /* RXEOB */
+ 0xa 0x4 /* SERR */
+ 0xd 0x4 /* TXDE */
+ 0xe 0x4 /* RXDE */>;
};
POB0: opb {
compatible = "ibm,opb-405gp", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <ef600000 ef600000 a00000>;
- dcr-reg = <0a0 5>;
+ ranges = <0xef600000 0xef600000 0x00a00000>;
+ dcr-reg = <0x0a0 0x005>;
clock-frequency = <0>; /* Filled in by zImage */
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <2580>;
+ current-speed = <9600>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600400 8>;
- virtual-reg = <ef600400>;
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <2580>;
+ current-speed = <9600>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
IIC: i2c@ef600500 {
compatible = "ibm,iic-405gp", "ibm,iic";
- reg = <ef600500 11>;
+ reg = <0xef600500 0x00000011>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
GPIO: gpio@ef600700 {
compatible = "ibm,gpio-405gp";
- reg = <ef600700 20>;
+ reg = <0xef600700 0x00000020>;
};
EMAC: ethernet@ef600800 {
@@ -129,26 +131,26 @@
compatible = "ibm,emac-405gp", "ibm,emac";
interrupt-parent = <&UIC0>;
interrupts = <
- f 4 /* Ethernet */
- 9 4 /* Ethernet Wake Up */>;
+ 0xf 0x4 /* Ethernet */
+ 0x9 0x4 /* Ethernet Wake Up */>;
local-mac-address = [000000000000]; /* Filled in by zImage */
- reg = <ef600800 70>;
+ reg = <0xef600800 0x00000070>;
mal-device = <&MAL>;
mal-tx-channel = <0>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000001>;
+ phy-map = <0x00000001>;
};
};
EBC0: ebc {
compatible = "ibm,ebc-405gp", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
/* The ranges property is supplied by the bootwrapper
@@ -158,18 +160,18 @@
clock-frequency = <0>; /* Filled in by zImage */
sram@0,0 {
- reg = <0 0 80000>;
+ reg = <0x00000000 0x00000000 0x00080000>;
};
flash@0,80000 {
compatible = "jedec-flash";
bank-width = <1>;
- reg = <0 80000 80000>;
+ reg = <0x00000000 0x00080000 0x00080000>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "OpenBIOS";
- reg = <0 80000>;
+ reg = <0x00000000 0x00080000>;
read-only;
};
};
@@ -177,24 +179,24 @@
nvram@1,0 {
/* NVRAM and RTC */
compatible = "ds1743-nvram";
- #bytes = <2000>;
- reg = <1 0 2000>;
+ #bytes = <0x2000>;
+ reg = <0x00000001 0x00000000 0x00002000>;
};
keyboard@2,0 {
compatible = "intel,82C42PC";
- reg = <2 0 2>;
+ reg = <0x00000002 0x00000000 0x00000002>;
};
ir@3,0 {
compatible = "ti,TIR2000PAG";
- reg = <3 0 10>;
+ reg = <0x00000003 0x00000000 0x00000010>;
};
fpga@7,0 {
compatible = "Walnut-FPGA";
- reg = <7 0 10>;
- virtual-reg = <f0300005>;
+ reg = <0x00000007 0x00000000 0x00000010>;
+ virtual-reg = <0xf0300005>;
};
};
@@ -205,35 +207,35 @@
#address-cells = <3>;
compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
primary;
- reg = <eec00000 8 /* Config space access */
- eed80000 4 /* IACK */
- eed80000 4 /* Special cycle */
- ef480000 40>; /* Internal registers */
+ reg = <0xeec00000 0x00000008 /* Config space access */
+ 0xeed80000 0x00000004 /* IACK */
+ 0xeed80000 0x00000004 /* Special cycle */
+ 0xef480000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
- ranges = <02000000 0 80000000 80000000 0 20000000
- 01000000 0 00000000 e8000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
+ 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
/* Walnut has all 4 IRQ pins tied together per slot */
- interrupt-map-mask = <f800 0 0 0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* IDSEL 1 */
- 0800 0 0 0 &UIC0 1c 8
+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
/* IDSEL 2 */
- 1000 0 0 0 &UIC0 1d 8
+ 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
/* IDSEL 3 */
- 1800 0 0 0 &UIC0 1e 8
+ 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
/* IDSEL 4 */
- 2000 0 0 0 &UIC0 1f 8
+ 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
>;
};
};
diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts
index b04a52e..340018c 100644
--- a/arch/powerpc/boot/dts/warp.dts
+++ b/arch/powerpc/boot/dts/warp.dts
@@ -9,12 +9,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "pika,warp";
compatible = "pika,warp";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -28,13 +30,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440EP";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
@@ -42,14 +44,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; /* Filled in by zImage */
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -59,22 +61,22 @@
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-440ep";
- dcr-reg = <00e 002>;
+ dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-440ep";
- dcr-reg = <00c 002>;
+ dcr-reg = <0x00c 0x002>;
};
plb {
@@ -86,86 +88,79 @@
SDRAM0: sdram {
compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
DMA0: dma {
compatible = "ibm,dma-440ep", "ibm,dma-440gp";
- dcr-reg = <100 027>;
+ dcr-reg = <0x100 0x027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
};
POB0: opb {
compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <00000000 0 00000000 80000000
- 80000000 0 80000000 80000000>;
+ ranges = <0x00000000 0x00000000 0x00000000 0x80000000
+ 0x80000000 0x00000000 0x80000000 0x80000000>;
interrupt-parent = <&UIC1>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc {
compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
fpga@2,0 {
compatible = "pika,fpga";
- reg = <2 0 2200>;
- interrupts = <18 8>;
+ reg = <0x00000002 0x00000000 0x00001000>;
+ interrupts = <0x18 0x8>;
interrupt-parent = <&UIC0>;
};
+ fpga@2,4000 {
+ compatible = "pika,fpga-sd";
+ reg = <0x00000002 0x00004000 0x00000A00>;
+ };
+
nor_flash@0,0 {
- compatible = "amd,s29gl512n", "cfi-flash";
+ compatible = "amd,s29gl032a", "cfi-flash";
bank-width = <2>;
- reg = <0 0 4000000>;
+ reg = <0x00000000 0x00000000 0x00400000>;
#address-cells = <1>;
#size-cells = <1>;
- partition@0 {
- label = "kernel";
- reg = <0 180000>;
- };
- partition@180000 {
- label = "root";
- reg = <180000 3480000>;
- };
- partition@3600000 {
- label = "user";
- reg = <3600000 900000>;
- };
- partition@3f00000 {
+ partition@300000 {
label = "fpga";
- reg = <3f00000 40000>;
+ reg = <0x0030000 0x00040000>;
};
- partition@3f40000 {
+ partition@340000 {
label = "env";
- reg = <3f40000 40000>;
+ reg = <0x0340000 0x00040000>;
};
- partition@3f80000 {
+ partition@380000 {
label = "u-boot";
- reg = <3f80000 80000>;
+ reg = <0x0380000 0x00080000>;
};
};
};
@@ -173,60 +168,80 @@
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <1c200>;
+ current-speed = <115200>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
- reg = <ef600700 14>;
+ reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
+ index = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ad7414@4a {
+ compatible = "adi,ad7414";
+ reg = <0x4a>;
+ interrupts = <0x19 0x8>;
+ interrupt-parent = <&UIC0>;
+ };
};
GPIO0: gpio@ef600b00 {
compatible = "ibm,gpio-440ep";
- reg = <ef600b00 48>;
+ reg = <0xef600b00 0x00000048>;
+ #gpio-cells = <2>;
+ gpio-controller;
};
GPIO1: gpio@ef600c00 {
compatible = "ibm,gpio-440ep";
- reg = <ef600c00 48>;
+ reg = <0xef600c00 0x00000048>;
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ led@31 {
+ compatible = "linux,gpio-led";
+ linux,name = ":green:";
+ gpios = <&GPIO1 0x30 0>;
+ };
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
- reg = <ef600d00 c>;
+ reg = <0xef600d00 0x0000000c>;
};
EMAC0: ethernet@ef600e00 {
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
- interrupts = <1c 4 1d 4>;
- reg = <ef600e00 70>;
+ interrupts = <0x1c 0x4 0x1d 0x4>;
+ reg = <0xef600e00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0 1>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
usb@ef601000 {
compatible = "ohci-be";
- reg = <ef601000 80>;
- interrupts = <8 1 9 1>;
+ reg = <0xef601000 0x00000080>;
+ interrupts = <0x8 0x1 0x9 0x1>;
interrupt-parent = < &UIC1 >;
};
};
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts
index 0d6d332..e39422a 100644
--- a/arch/powerpc/boot/dts/yosemite.dts
+++ b/arch/powerpc/boot/dts/yosemite.dts
@@ -9,12 +9,14 @@
* any warranty of any kind, whether express or implied.
*/
+/dts-v1/;
+
/ {
#address-cells = <2>;
#size-cells = <1>;
model = "amcc,yosemite";
compatible = "amcc,yosemite","amcc,bamboo";
- dcr-parent = <&/cpus/cpu@0>;
+ dcr-parent = <&{/cpus/cpu@0}>;
aliases {
ethernet0 = &EMAC0;
@@ -32,13 +34,13 @@
cpu@0 {
device_type = "cpu";
model = "PowerPC,440EP";
- reg = <0>;
+ reg = <0x00000000>;
clock-frequency = <0>; /* Filled in by zImage */
timebase-frequency = <0>; /* Filled in by zImage */
- i-cache-line-size = <20>;
- d-cache-line-size = <20>;
- i-cache-size = <8000>;
- d-cache-size = <8000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
dcr-controller;
dcr-access-method = "native";
};
@@ -46,14 +48,14 @@
memory {
device_type = "memory";
- reg = <0 0 0>; /* Filled in by zImage */
+ reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
};
UIC0: interrupt-controller0 {
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <0>;
- dcr-reg = <0c0 009>;
+ dcr-reg = <0x0c0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
@@ -63,22 +65,22 @@
compatible = "ibm,uic-440ep","ibm,uic";
interrupt-controller;
cell-index = <1>;
- dcr-reg = <0d0 009>;
+ dcr-reg = <0x0d0 0x009>;
#address-cells = <0>;
#size-cells = <0>;
#interrupt-cells = <2>;
- interrupts = <1e 4 1f 4>; /* cascade */
+ interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
interrupt-parent = <&UIC0>;
};
SDR0: sdr {
compatible = "ibm,sdr-440ep";
- dcr-reg = <00e 002>;
+ dcr-reg = <0x00e 0x002>;
};
CPR0: cpr {
compatible = "ibm,cpr-440ep";
- dcr-reg = <00c 002>;
+ dcr-reg = <0x00c 0x002>;
};
plb {
@@ -90,29 +92,29 @@
SDRAM0: sdram {
compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
- dcr-reg = <010 2>;
+ dcr-reg = <0x010 0x002>;
};
DMA0: dma {
compatible = "ibm,dma-440ep", "ibm,dma-440gp";
- dcr-reg = <100 027>;
+ dcr-reg = <0x100 0x027>;
};
MAL0: mcmal {
compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
- dcr-reg = <180 62>;
+ dcr-reg = <0x180 0x062>;
num-tx-chans = <4>;
num-rx-chans = <2>;
interrupt-parent = <&MAL0>;
- interrupts = <0 1 2 3 4>;
+ interrupts = <0x0 0x1 0x2 0x3 0x4>;
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
- /*RXEOB*/ 1 &UIC0 b 4
- /*SERR*/ 2 &UIC1 0 4
- /*TXDE*/ 3 &UIC1 1 4
- /*RXDE*/ 4 &UIC1 2 4>;
+ interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
+ /*RXEOB*/ 0x1 &UIC0 0xb 0x4
+ /*SERR*/ 0x2 &UIC1 0x0 0x4
+ /*TXDE*/ 0x3 &UIC1 0x1 0x4
+ /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
};
POB0: opb {
@@ -122,110 +124,110 @@
/* Bamboo is oddball in the 44x world and doesn't use the ERPN
* bits.
*/
- ranges = <00000000 0 00000000 80000000
- 80000000 0 80000000 80000000>;
+ ranges = <0x00000000 0x00000000 0x00000000 0x80000000
+ 0x80000000 0x00000000 0x80000000 0x80000000>;
interrupt-parent = <&UIC1>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
clock-frequency = <0>; /* Filled in by zImage */
EBC0: ebc {
compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
- dcr-reg = <012 2>;
+ dcr-reg = <0x012 0x002>;
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by zImage */
- interrupts = <5 1>;
+ interrupts = <0x5 0x1>;
interrupt-parent = <&UIC1>;
};
UART0: serial@ef600300 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600300 8>;
- virtual-reg = <ef600300>;
+ reg = <0xef600300 0x00000008>;
+ virtual-reg = <0xef600300>;
clock-frequency = <0>; /* Filled in by zImage */
- current-speed = <1c200>;
+ current-speed = <115200>;
interrupt-parent = <&UIC0>;
- interrupts = <0 4>;
+ interrupts = <0x0 0x4>;
};
UART1: serial@ef600400 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600400 8>;
- virtual-reg = <ef600400>;
+ reg = <0xef600400 0x00000008>;
+ virtual-reg = <0xef600400>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <1 4>;
+ interrupts = <0x1 0x4>;
};
UART2: serial@ef600500 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600500 8>;
- virtual-reg = <ef600500>;
+ reg = <0xef600500 0x00000008>;
+ virtual-reg = <0xef600500>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <3 4>;
+ interrupts = <0x3 0x4>;
status = "disabled";
};
UART3: serial@ef600600 {
device_type = "serial";
compatible = "ns16550";
- reg = <ef600600 8>;
- virtual-reg = <ef600600>;
+ reg = <0xef600600 0x00000008>;
+ virtual-reg = <0xef600600>;
clock-frequency = <0>;
current-speed = <0>;
interrupt-parent = <&UIC0>;
- interrupts = <4 4>;
+ interrupts = <0x4 0x4>;
status = "disabled";
};
IIC0: i2c@ef600700 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
- reg = <ef600700 14>;
+ reg = <0xef600700 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <2 4>;
+ interrupts = <0x2 0x4>;
};
IIC1: i2c@ef600800 {
compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
- reg = <ef600800 14>;
+ reg = <0xef600800 0x00000014>;
interrupt-parent = <&UIC0>;
- interrupts = <7 4>;
+ interrupts = <0x7 0x4>;
};
spi@ef600900 {
compatible = "amcc,spi-440ep";
- reg = <ef600900 6>;
- interrupts = <8 4>;
+ reg = <0xef600900 0x00000006>;
+ interrupts = <0x8 0x4>;
interrupt-parent = <&UIC0>;
};
ZMII0: emac-zmii@ef600d00 {
compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
- reg = <ef600d00 c>;
+ reg = <0xef600d00 0x0000000c>;
};
EMAC0: ethernet@ef600e00 {
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
- interrupts = <1c 4 1d 4>;
- reg = <ef600e00 70>;
+ interrupts = <0x1c 0x4 0x1d 0x4>;
+ reg = <0xef600e00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <0 1>;
mal-rx-channel = <0>;
cell-index = <0>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <0>;
};
@@ -234,26 +236,26 @@
device_type = "network";
compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
interrupt-parent = <&UIC1>;
- interrupts = <1e 4 1f 4>;
- reg = <ef600f00 70>;
+ interrupts = <0x1e 0x4 0x1f 0x4>;
+ reg = <0xef600f00 0x00000070>;
local-mac-address = [000000000000];
mal-device = <&MAL0>;
mal-tx-channel = <2 3>;
mal-rx-channel = <1>;
cell-index = <1>;
- max-frame-size = <5dc>;
- rx-fifo-size = <1000>;
- tx-fifo-size = <800>;
+ max-frame-size = <1500>;
+ rx-fifo-size = <4096>;
+ tx-fifo-size = <2048>;
phy-mode = "rmii";
- phy-map = <00000000>;
+ phy-map = <0x00000000>;
zmii-device = <&ZMII0>;
zmii-channel = <1>;
};
usb@ef601000 {
compatible = "ohci-be";
- reg = <ef601000 80>;
- interrupts = <8 4 9 4>;
+ reg = <0xef601000 0x00000080>;
+ interrupts = <0x8 0x4 0x9 0x4>;
interrupt-parent = < &UIC1 >;
};
};
@@ -265,35 +267,35 @@
#address-cells = <3>;
compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
primary;
- reg = <0 eec00000 8 /* Config space access */
- 0 eed00000 4 /* IACK */
- 0 eed00000 4 /* Special cycle */
- 0 ef400000 40>; /* Internal registers */
+ reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
+ 0x00000000 0xeed00000 0x00000004 /* IACK */
+ 0x00000000 0xeed00000 0x00000004 /* Special cycle */
+ 0x00000000 0xef400000 0x00000040>; /* Internal registers */
/* Outbound ranges, one memory and one IO,
* later cannot be changed. Chip supports a second
* IO range but we don't use it for now
*/
- ranges = <02000000 0 a0000000 0 a0000000 0 20000000
- 01000000 0 00000000 0 e8000000 0 00010000>;
+ ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
+ 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
/* Inbound 2GB range starting at 0 */
- dma-ranges = <42000000 0 0 0 0 0 80000000>;
+ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
/* Bamboo has all 4 IRQ pins tied together per slot */
- interrupt-map-mask = <f800 0 0 0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
interrupt-map = <
/* IDSEL 1 */
- 0800 0 0 0 &UIC0 1c 8
+ 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
/* IDSEL 2 */
- 1000 0 0 0 &UIC0 1b 8
+ 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8
/* IDSEL 3 */
- 1800 0 0 0 &UIC0 1a 8
+ 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8
/* IDSEL 4 */
- 2000 0 0 0 &UIC0 19 8
+ 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8
>;
};
};
diff --git a/arch/powerpc/boot/oflib.c b/arch/powerpc/boot/oflib.c
index 95b8fd6..b0ec9cf 100644
--- a/arch/powerpc/boot/oflib.c
+++ b/arch/powerpc/boot/oflib.c
@@ -168,8 +168,19 @@
void *of_vmlinux_alloc(unsigned long size)
{
- void *p = malloc(size);
+ unsigned long start = (unsigned long)_start, end = (unsigned long)_end;
+ void *addr;
+ void *p;
+ /* With some older POWER4 firmware we need to claim the area the kernel
+ * will reside in. Newer firmwares don't need this so we just ignore
+ * the return value.
+ */
+ addr = of_claim(start, end - start, 0);
+ printf("Trying to claim from 0x%lx to 0x%lx (0x%lx) got %p\r\n",
+ start, end, end - start, addr);
+
+ p = malloc(size);
if (!p)
fatal("Can't allocate memory for kernel image!\n\r");
diff --git a/arch/powerpc/boot/redboot-83xx.c b/arch/powerpc/boot/redboot-83xx.c
new file mode 100644
index 0000000..79aa9e1
--- /dev/null
+++ b/arch/powerpc/boot/redboot-83xx.c
@@ -0,0 +1,60 @@
+/*
+ * RedBoot firmware support
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2008 Codehermit
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "redboot.h"
+#include "fsl-soc.h"
+#include "io.h"
+
+static bd_t bd;
+BSS_STACK(4096);
+
+#define MHZ(x) ((x + 500000) / 1000000)
+
+static void platform_fixups(void)
+{
+ void *node;
+
+ dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+ dt_fixup_mac_addresses(bd.bi_enetaddr);
+ dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq);
+
+ node = finddevice("/soc/cpm/brg");
+ if (node) {
+ printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n",
+ bd.bi_busfreq, MHZ(bd.bi_busfreq));
+ setprop(node, "clock-frequency", &bd.bi_busfreq, 4);
+ }
+
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ memcpy(&bd, (char *)r3, sizeof(bd));
+
+ if (bd.bi_tag != 0x42444944)
+ return;
+
+ simple_alloc_init(_end,
+ bd.bi_memstart + bd.bi_memsize - (unsigned long)_end,
+ 32, 64);
+
+ fdt_init(_dtb_start);
+ serial_console_init();
+ platform_ops.fixups = platform_fixups;
+
+ loader_info.cmdline = (char *)bd.bi_cmdline;
+ loader_info.cmdline_len = strlen((char *)bd.bi_cmdline);
+}
diff --git a/arch/powerpc/boot/simpleboot.c b/arch/powerpc/boot/simpleboot.c
index 86cd285..c58a0da 100644
--- a/arch/powerpc/boot/simpleboot.c
+++ b/arch/powerpc/boot/simpleboot.c
@@ -23,6 +23,8 @@
BSS_STACK(4*1024);
+extern int platform_specific_init(void) __attribute__((weak));
+
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
{
@@ -80,5 +82,9 @@
/* prepare the device tree and find the console */
fdt_init(_dtb_start);
+
+ if (platform_specific_init)
+ platform_specific_init();
+
serial_console_init();
}
diff --git a/arch/powerpc/boot/virtex.c b/arch/powerpc/boot/virtex.c
new file mode 100644
index 0000000..f622805
--- /dev/null
+++ b/arch/powerpc/boot/virtex.c
@@ -0,0 +1,100 @@
+/*
+ * The platform specific code for virtex devices since a boot loader is not
+ * always used.
+ *
+ * (C) Copyright 2008 Xilinx, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "io.h"
+#include "stdio.h"
+
+#define UART_DLL 0 /* Out: Divisor Latch Low */
+#define UART_DLM 1 /* Out: Divisor Latch High */
+#define UART_FCR 2 /* Out: FIFO Control Register */
+#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
+#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
+#define UART_LCR 3 /* Out: Line Control Register */
+#define UART_MCR 4 /* Out: Modem Control Register */
+#define UART_MCR_RTS 0x02 /* RTS complement */
+#define UART_MCR_DTR 0x01 /* DTR complement */
+#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
+#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
+
+static int virtex_ns16550_console_init(void *devp)
+{
+ unsigned char *reg_base;
+ u32 reg_shift, reg_offset, clk, spd;
+ u16 divisor;
+ int n;
+
+ if (dt_get_virtual_reg(devp, (void **)®_base, 1) < 1)
+ return -1;
+
+ n = getprop(devp, "reg-offset", ®_offset, sizeof(reg_offset));
+ if (n == sizeof(reg_offset))
+ reg_base += reg_offset;
+
+ n = getprop(devp, "reg-shift", ®_shift, sizeof(reg_shift));
+ if (n != sizeof(reg_shift))
+ reg_shift = 0;
+
+ n = getprop(devp, "current-speed", (void *)&spd, sizeof(spd));
+ if (n != sizeof(spd))
+ spd = 9600;
+
+ /* should there be a default clock rate?*/
+ n = getprop(devp, "clock-frequency", (void *)&clk, sizeof(clk));
+ if (n != sizeof(clk))
+ return -1;
+
+ divisor = clk / (16 * spd);
+
+ /* Access baud rate */
+ out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB);
+
+ /* Baud rate based on input clock */
+ out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF);
+ out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8);
+
+ /* 8 data, 1 stop, no parity */
+ out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8);
+
+ /* RTS/DTR */
+ out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR);
+
+ /* Clear transmitter and receiver */
+ out_8(reg_base + (UART_FCR << reg_shift),
+ UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR);
+ return 0;
+}
+
+/* For virtex, the kernel may be loaded without using a bootloader and if so
+ some UARTs need more setup than is provided in the normal console init
+*/
+int platform_specific_init(void)
+{
+ void *devp;
+ char devtype[MAX_PROP_LEN];
+ char path[MAX_PATH_LEN];
+
+ devp = finddevice("/chosen");
+ if (devp == NULL)
+ return -1;
+
+ if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) {
+ devp = finddevice(path);
+ if (devp == NULL)
+ return -1;
+
+ if ((getprop(devp, "device_type", devtype, sizeof(devtype)) > 0)
+ && !strcmp(devtype, "serial")
+ && (dt_is_compatible(devp, "ns16550")))
+ virtex_ns16550_console_init(devp);
+ }
+ return 0;
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index d6c96d9..644bf9d 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -138,14 +138,20 @@
tmp=$tmpdir/zImage.$$.o
ksection=.kernel:vmlinux.strip
isection=.kernel:initrd
+link_address='0x400000'
case "$platform" in
-pmac|pseries|chrp)
+pseries)
+ platformo=$object/of.o
+ link_address='0x4000000'
+ ;;
+pmac|chrp)
platformo=$object/of.o
;;
coff)
platformo=$object/of.o
lds=$object/zImage.coff.lds
+ link_address='0x500000'
;;
miboot|uboot)
# miboot and U-boot want just the bare bits, not an ELF binary
@@ -171,13 +177,13 @@
*-mpc824*)
platformo=$object/cuboot-824x.o
;;
- *-mpc83*)
+ *-mpc83*|*-asp834x*)
platformo=$object/cuboot-83xx.o
;;
*-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*)
platformo=$object/cuboot-85xx-cpm2.o
;;
- *-mpc85*|*-tqm8540|*-sbc85*)
+ *-mpc85*|*-tqm85*|*-sbc85*)
platformo=$object/cuboot-85xx.o
;;
esac
@@ -190,6 +196,7 @@
objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data"
ksection=.kernel:vmlinux.bin
isection=.kernel:initrd
+ link_address=''
;;
ep88xc|ep405|ep8248e)
platformo="$object/fixed-head.o $object/$platform.o"
@@ -200,7 +207,19 @@
binary=y
;;
simpleboot-virtex405-*)
- platformo="$object/virtex405-head.o $object/simpleboot.o"
+ platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o"
+ binary=y
+ ;;
+simpleboot-virtex440-*)
+ platformo="$object/simpleboot.o $object/virtex.o"
+ binary=y
+ ;;
+simpleboot-*)
+ platformo="$object/simpleboot.o"
+ binary=y
+ ;;
+asp834x-redboot)
+ platformo="$object/fixed-head.o $object/redboot-83xx.o"
binary=y
;;
esac
@@ -268,7 +287,10 @@
fi
if [ "$platform" != "miboot" ]; then
- ${CROSS}ld -m elf32ppc -T $lds -o "$ofile" \
+ if [ -n "$link_address" ] ; then
+ text_start="-Ttext $link_address --defsym _start=$link_address"
+ fi
+ ${CROSS}ld -m elf32ppc -T $lds $text_start -o "$ofile" \
$platformo $tmp $object/wrapper.a
rm $tmp
fi
diff --git a/arch/powerpc/boot/zImage.coff.lds.S b/arch/powerpc/boot/zImage.coff.lds.S
index fe87a90..856dc78 100644
--- a/arch/powerpc/boot/zImage.coff.lds.S
+++ b/arch/powerpc/boot/zImage.coff.lds.S
@@ -3,7 +3,6 @@
EXTERN(_zimage_start_opd)
SECTIONS
{
- . = (5*1024*1024);
_start = .;
.text :
{
diff --git a/arch/powerpc/boot/zImage.lds.S b/arch/powerpc/boot/zImage.lds.S
index f6e380f..0962d62 100644
--- a/arch/powerpc/boot/zImage.lds.S
+++ b/arch/powerpc/boot/zImage.lds.S
@@ -3,7 +3,6 @@
EXTERN(_zimage_start)
SECTIONS
{
- . = (4*1024*1024);
_start = .;
.text :
{
diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig
new file mode 100644
index 0000000..9ce5cbc
--- /dev/null
+++ b/arch/powerpc/configs/44x/sam440ep_defconfig
@@ -0,0 +1,1192 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.25
+# Mon May 5 13:43:02 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+CONFIG_44x=y
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_4xx=y
+CONFIG_BOOKE=y
+CONFIG_PTE_64BIT=y
+CONFIG_PHYS_64BIT=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+# CONFIG_IKCONFIG_PROC is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_PPC4xx_PCI_EXPRESS is not set
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_BAMBOO is not set
+# CONFIG_EBONY is not set
+CONFIG_SAM440EP=y
+# CONFIG_SEQUOIA is not set
+# CONFIG_TAISHAN is not set
+# CONFIG_KATMAI is not set
+# CONFIG_RAINIER is not set
+# CONFIG_WARP is not set
+# CONFIG_CANYONLANDS is not set
+# CONFIG_YOSEMITE is not set
+CONFIG_440EP=y
+CONFIG_IBM440EP_ERR42=y
+# CONFIG_IPIC is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_RESOURCES_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_4xx_SOC=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+# CONFIG_MTD is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=35000
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_XILINX_SYSACE is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+# CONFIG_SATA_PMP is not set
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+CONFIG_SATA_SIL=y
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+# CONFIG_MII is not set
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_IBM_NEW_EMAC=y
+CONFIG_IBM_NEW_EMAC_RXB=128
+CONFIG_IBM_NEW_EMAC_TXB=64
+CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
+CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
+CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
+# CONFIG_IBM_NEW_EMAC_DEBUG is not set
+CONFIG_IBM_NEW_EMAC_ZMII=y
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_IBM_IIC=y
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+CONFIG_FB_DDC=y
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+CONFIG_FB_MACMODES=y
+CONFIG_FB_BACKLIGHT=y
+CONFIG_FB_MODE_HELPERS=y
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_OF is not set
+# CONFIG_FB_CT65550 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+CONFIG_FB_RADEON=y
+CONFIG_FB_RADEON_I2C=y
+CONFIG_FB_RADEON_BACKLIGHT=y
+# CONFIG_FB_RADEON_DEBUG is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_VIRTUAL is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_CORGI is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=m
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_HCD_PPC_OF=y
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+# CONFIG_USB_MON is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+CONFIG_RTC_DRV_M41T80=y
+CONFIG_RTC_DRV_M41T80_WDT=y
+# CONFIG_RTC_DRV_S35390A is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+# CONFIG_EXT2_FS_SECURITY is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+CONFIG_REISERFS_FS=y
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_REISERFS_FS_XATTR is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=y
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=y
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+CONFIG_AFFS_FS=m
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+CONFIG_AMIGA_PARTITION=y
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/44x/taishan_defconfig b/arch/powerpc/configs/44x/taishan_defconfig
index 087aedc..e53c926 100644
--- a/arch/powerpc/configs/44x/taishan_defconfig
+++ b/arch/powerpc/configs/44x/taishan_defconfig
@@ -348,7 +348,83 @@
# CONFIG_SYS_HYPERVISOR is not set
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
-# CONFIG_MTD is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLKDEVS is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
CONFIG_OF_DEVICE=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
@@ -660,6 +736,7 @@
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
CONFIG_CRAMFS=y
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
diff --git a/arch/powerpc/configs/44x/virtex5_defconfig b/arch/powerpc/configs/44x/virtex5_defconfig
new file mode 100644
index 0000000..9c41f66b
--- /dev/null
+++ b/arch/powerpc/configs/44x/virtex5_defconfig
@@ -0,0 +1,1107 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc8
+# Wed Jul 2 15:36:41 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+CONFIG_44x=y
+# CONFIG_E200 is not set
+CONFIG_4xx=y
+CONFIG_BOOKE=y
+CONFIG_PTE_64BIT=y
+CONFIG_PHYS_64BIT=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_GROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
+# CONFIG_PPC4xx_PCI_EXPRESS is not set
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+# CONFIG_BAMBOO is not set
+# CONFIG_EBONY is not set
+# CONFIG_SEQUOIA is not set
+# CONFIG_TAISHAN is not set
+# CONFIG_KATMAI is not set
+# CONFIG_RAINIER is not set
+# CONFIG_WARP is not set
+# CONFIG_CANYONLANDS is not set
+# CONFIG_YOSEMITE is not set
+CONFIG_XILINX_VIRTEX440_GENERIC_BOARD=y
+CONFIG_XILINX_VIRTEX=y
+CONFIG_XILINX_VIRTEX_5_FXT=y
+# CONFIG_IPIC is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+# CONFIG_PREEMPT_RCU is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_MATH_EMULATION=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_RESOURCES_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+CONFIG_EXTRA_TARGETS=""
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_4xx_SOC=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IP_VS is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+CONFIG_NETFILTER_XTABLES=m
+# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
+# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_MAC is not set
+# CONFIG_NETFILTER_XT_MATCH_MARK is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
+# CONFIG_NETFILTER_XT_MATCH_STRING is not set
+# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_QUEUE is not set
+CONFIG_IP_NF_IPTABLES=m
+# CONFIG_IP_NF_MATCH_RECENT is not set
+# CONFIG_IP_NF_MATCH_ECN is not set
+# CONFIG_IP_NF_MATCH_AH is not set
+# CONFIG_IP_NF_MATCH_TTL is not set
+# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
+CONFIG_IP_NF_FILTER=m
+# CONFIG_IP_NF_TARGET_REJECT is not set
+# CONFIG_IP_NF_TARGET_LOG is not set
+# CONFIG_IP_NF_TARGET_ULOG is not set
+CONFIG_IP_NF_MANGLE=m
+# CONFIG_IP_NF_TARGET_ECN is not set
+# CONFIG_IP_NF_TARGET_TTL is not set
+# CONFIG_IP_NF_RAW is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# IPv6: Netfilter Configuration
+#
+# CONFIG_IP6_NF_QUEUE is not set
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=8192
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_XILINX_SYSACE is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=y
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_LIFEBOOK=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+# CONFIG_MOUSE_SERIAL is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+CONFIG_XILINX_HWICAP=y
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_IBM_IIC is not set
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+CONFIG_I2C_DEBUG_CORE=y
+CONFIG_I2C_DEBUG_ALGO=y
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_OF is not set
+# CONFIG_FB_CT65550 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+CONFIG_FB_XILINX=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+CONFIG_FONTS=y
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+# CONFIG_FONT_6x11 is not set
+# CONFIG_FONT_7x14 is not set
+# CONFIG_FONT_PEARL_8x8 is not set
+# CONFIG_FONT_ACORN_8x8 is not set
+# CONFIG_FONT_MINI_4x6 is not set
+# CONFIG_FONT_SUN8x16 is not set
+# CONFIG_FONT_SUN12x22 is not set
+# CONFIG_FONT_10x18 is not set
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=y
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=m
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_SAMPLES is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
new file mode 100644
index 0000000..d2c435f
--- /dev/null
+++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
@@ -0,0 +1,1128 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc2
+# Mon May 19 21:12:32 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_FSL_EMB_PERFMON is not set
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+# CONFIG_EPOLL is not set
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_MULTIPLATFORM is not set
+# CONFIG_PPC_82xx is not set
+CONFIG_PPC_83xx=y
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_MPC83xx=y
+# CONFIG_MPC831x_RDB is not set
+# CONFIG_MPC832x_MDS is not set
+# CONFIG_MPC832x_RDB is not set
+# CONFIG_MPC834x_MDS is not set
+# CONFIG_MPC834x_ITX is not set
+# CONFIG_MPC836x_MDS is not set
+CONFIG_MPC836x_RDK=y
+# CONFIG_MPC837x_MDS is not set
+# CONFIG_MPC837x_RDB is not set
+# CONFIG_SBC834x is not set
+CONFIG_IPIC=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+CONFIG_QUICC_ENGINE=y
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_LBC=y
+CONFIG_FSL_GTM=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_OF_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+CONFIG_BROADCOM_PHY=y
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_GIANFAR is not set
+CONFIG_UCC_GETH=y
+CONFIG_UGETH_NAPI=y
+# CONFIG_UGETH_MAGIC_PACKET is not set
+# CONFIG_UGETH_FILTERING is not set
+# CONFIG_UGETH_TX_ON_DEMAND is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_SERIAL_QE=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_MPC83xx=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+CONFIG_SPI_SPIDEV=y
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_HAVE_GPIO_LIB=y
+
+#
+# GPIO Support
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_83xx_WDT=y
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+CONFIG_FB_MACMODES=y
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+CONFIG_FB_OF=y
+# CONFIG_FB_CT65550 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_VGA16 is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_FSL_DIU is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_BIND34 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+CONFIG_UCC_SLOW=y
+CONFIG_UCC_FAST=y
+CONFIG_UCC=y
+CONFIG_QE_GPIO=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_IRQSTACKS is not set
+CONFIG_PPC_EARLY_DEBUG=y
+# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
+# CONFIG_PPC_EARLY_DEBUG_G5 is not set
+# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
+# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
+# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
+# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
+# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
+# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
+# CONFIG_PPC_EARLY_DEBUG_44x is not set
+# CONFIG_PPC_EARLY_DEBUG_40x is not set
+# CONFIG_PPC_EARLY_DEBUG_CPM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+CONFIG_PPC_LIB_RHEAP=y
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig
new file mode 100644
index 0000000..b3b770b
--- /dev/null
+++ b/arch/powerpc/configs/85xx/tqm8548_defconfig
@@ -0,0 +1,1225 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc5
+# Thu Jun 26 14:40:02 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+CONFIG_PPC_85xx=y
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_E500=y
+# CONFIG_PPC_E500MC is not set
+CONFIG_BOOKE=y
+CONFIG_FSL_BOOKE=y
+CONFIG_FSL_EMB_PERFMON=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_SPE=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+# CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_MPC85xx=y
+# CONFIG_MPC8540_ADS is not set
+# CONFIG_MPC8560_ADS is not set
+# CONFIG_MPC85xx_CDS is not set
+# CONFIG_MPC85xx_MDS is not set
+# CONFIG_MPC85xx_DS is not set
+# CONFIG_KSI8560 is not set
+# CONFIG_STX_GP3 is not set
+# CONFIG_TQM8540 is not set
+# CONFIG_TQM8541 is not set
+CONFIG_TQM8548=y
+# CONFIG_TQM8555 is not set
+# CONFIG_TQM8560 is not set
+# CONFIG_SBC8548 is not set
+# CONFIG_SBC8560 is not set
+CONFIG_TQM85xx=y
+# CONFIG_IPIC is not set
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+CONFIG_PPC_CPM_NEW_BINDING=y
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_MATH_EMULATION=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+# CONFIG_SECCOMP is not set
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_PCI=y
+CONFIG_FSL_LBC=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEASPM is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYSICAL_ALIGN=0x10000000
+CONFIG_TASK_SIZE=0xc0000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+CONFIG_MTD_NAND_ECC_SMC=y
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_NAND_FSL_ELBC is not set
+CONFIG_MTD_NAND_FSL_UPM=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=m
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+CONFIG_IDE=y
+CONFIG_IDE_MAX_HWIFS=4
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+# CONFIG_BLK_DEV_IDEDISK is not set
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_PLATFORM is not set
+CONFIG_BLK_DEV_IDEDMA_SFF=y
+
+#
+# PCI IDE chipsets support
+#
+CONFIG_BLK_DEV_IDEPCI=y
+CONFIG_IDEPCI_PCIBUS_ORDER=y
+# CONFIG_BLK_DEV_OFFBOARD is not set
+CONFIG_BLK_DEV_GENERIC=y
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_JMICRON is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8213 is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+CONFIG_BLK_DEV_VIA82CXXX=y
+# CONFIG_BLK_DEV_TC86C001 is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_BLK_DEV_HD_ONLY is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+CONFIG_E1000_NAPI=y
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+CONFIG_GFAR_NAPI=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NIU is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+CONFIG_SENSORS_LM75=y
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+CONFIG_DAB=y
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS1307=y
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_PPC is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/asp8347_defconfig b/arch/powerpc/configs/asp8347_defconfig
new file mode 100644
index 0000000..60bb4d1
--- /dev/null
+++ b/arch/powerpc/configs/asp8347_defconfig
@@ -0,0 +1,1214 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.25-rc6
+# Tue May 6 02:21:00 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_FSL_EMB_PERFMON=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_REDBOOT=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+# CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+# CONFIG_EPOLL is not set
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_MULTIPLATFORM is not set
+# CONFIG_PPC_82xx is not set
+CONFIG_PPC_83xx=y
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_MPC83xx=y
+# CONFIG_MPC831x_RDB is not set
+# CONFIG_MPC832x_MDS is not set
+# CONFIG_MPC832x_RDB is not set
+# CONFIG_MPC834x_MDS is not set
+# CONFIG_MPC834x_ITX is not set
+# CONFIG_MPC836x_MDS is not set
+# CONFIG_MPC837x_MDS is not set
+# CONFIG_MPC837x_RDB is not set
+# CONFIG_SBC834x is not set
+CONFIG_ASP834x=y
+CONFIG_PPC_MPC834x=y
+CONFIG_IPIC=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=m
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+# CONFIG_GFAR_NAPI is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+CONFIG_THERMAL=y
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_83xx_WDT=y
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=m
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_FSL=y
+CONFIG_USB_EHCI_HCD_PPC_OF=y
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+
+#
+# Conflicting RTC option has been selected, check GEN_RTC and RTC
+#
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+CONFIG_RTC_DRV_DS1374=y
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_DMADEVICES is not set
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_BIND34 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+# CONFIG_CRYPTO_SEQIV is not set
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=m
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_XTS is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/configs/c2k_defconfig b/arch/powerpc/configs/c2k_defconfig
new file mode 100644
index 0000000..dc599c7
--- /dev/null
+++ b/arch/powerpc/configs/c2k_defconfig
@@ -0,0 +1,1872 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc2
+# Thu May 15 11:00:14 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+# CONFIG_ALTIVEC is not set
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_CHECK_CACHE_COHERENCY=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+CONFIG_AUDIT=y
+CONFIG_AUDITSYSCALL=y
+CONFIG_AUDIT_TREE=y
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=m
+CONFIG_HAVE_OPROFILE=y
+CONFIG_KPROBES=y
+CONFIG_KRETPROBES=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Platform support
+#
+CONFIG_PPC_MULTIPLATFORM=y
+# CONFIG_PPC_82xx is not set
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_86xx is not set
+CONFIG_CLASSIC32=y
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_MPC5121_ADS is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_EMBEDDED6xx=y
+# CONFIG_LINKSTATION is not set
+# CONFIG_STORCENTER is not set
+# CONFIG_MPC7448HPC2 is not set
+# CONFIG_PPC_HOLLY is not set
+# CONFIG_PPC_PRPMC2800 is not set
+CONFIG_PPC_C2K=y
+CONFIG_MV64X60=y
+# CONFIG_IPIC is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=m
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=m
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+
+#
+# CPU Frequency drivers
+#
+# CONFIG_TAU is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+CONFIG_HIGHMEM=y
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_PREEMPT_NONE is not set
+CONFIG_PREEMPT_VOLUNTARY=y
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+# CONFIG_KEXEC is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+# CONFIG_PROC_DEVICETREE is not set
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCCARD is not set
+CONFIG_HOTPLUG_PCI=y
+# CONFIG_HOTPLUG_PCI_FAKE is not set
+# CONFIG_HOTPLUG_PCI_CPCI is not set
+CONFIG_HOTPLUG_PCI_SHPC=m
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+CONFIG_INET_AH=m
+CONFIG_INET_ESP=m
+CONFIG_INET_IPCOMP=m
+CONFIG_INET_XFRM_TUNNEL=m
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IP_VS=m
+# CONFIG_IP_VS_DEBUG is not set
+CONFIG_IP_VS_TAB_BITS=12
+
+#
+# IPVS transport protocol load balancing support
+#
+CONFIG_IP_VS_PROTO_TCP=y
+CONFIG_IP_VS_PROTO_UDP=y
+CONFIG_IP_VS_PROTO_ESP=y
+CONFIG_IP_VS_PROTO_AH=y
+
+#
+# IPVS scheduler
+#
+CONFIG_IP_VS_RR=m
+CONFIG_IP_VS_WRR=m
+CONFIG_IP_VS_LC=m
+CONFIG_IP_VS_WLC=m
+CONFIG_IP_VS_LBLC=m
+CONFIG_IP_VS_LBLCR=m
+CONFIG_IP_VS_DH=m
+CONFIG_IP_VS_SH=m
+CONFIG_IP_VS_SED=m
+CONFIG_IP_VS_NQ=m
+
+#
+# IPVS application helper
+#
+CONFIG_IP_VS_FTP=m
+CONFIG_IPV6=m
+CONFIG_IPV6_PRIVACY=y
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+CONFIG_INET6_AH=m
+CONFIG_INET6_ESP=m
+CONFIG_INET6_IPCOMP=m
+# CONFIG_IPV6_MIP6 is not set
+CONFIG_INET6_XFRM_TUNNEL=m
+CONFIG_INET6_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+CONFIG_IPV6_TUNNEL=m
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETLABEL is not set
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+CONFIG_BRIDGE_NETFILTER=y
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+CONFIG_NETFILTER_XTABLES=m
+# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
+# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+# CONFIG_NETFILTER_XT_TARGET_MARK is not set
+# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
+# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
+# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
+# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
+# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
+# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
+# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
+# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
+# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
+# CONFIG_NETFILTER_XT_MATCH_ESP is not set
+# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
+# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
+# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
+# CONFIG_NETFILTER_XT_MATCH_MAC is not set
+# CONFIG_NETFILTER_XT_MATCH_MARK is not set
+# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
+# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
+# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
+# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
+# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
+# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
+# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
+# CONFIG_NETFILTER_XT_MATCH_REALM is not set
+# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
+# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
+# CONFIG_NETFILTER_XT_MATCH_STRING is not set
+# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
+# CONFIG_NETFILTER_XT_MATCH_TIME is not set
+# CONFIG_NETFILTER_XT_MATCH_U32 is not set
+# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
+
+#
+# IP: Netfilter Configuration
+#
+CONFIG_IP_NF_QUEUE=m
+CONFIG_IP_NF_IPTABLES=m
+CONFIG_IP_NF_MATCH_RECENT=m
+CONFIG_IP_NF_MATCH_ECN=m
+# CONFIG_IP_NF_MATCH_AH is not set
+CONFIG_IP_NF_MATCH_TTL=m
+CONFIG_IP_NF_MATCH_ADDRTYPE=m
+CONFIG_IP_NF_FILTER=m
+CONFIG_IP_NF_TARGET_REJECT=m
+CONFIG_IP_NF_TARGET_LOG=m
+CONFIG_IP_NF_TARGET_ULOG=m
+CONFIG_IP_NF_MANGLE=m
+CONFIG_IP_NF_TARGET_ECN=m
+# CONFIG_IP_NF_TARGET_TTL is not set
+CONFIG_IP_NF_RAW=m
+CONFIG_IP_NF_ARPTABLES=m
+CONFIG_IP_NF_ARPFILTER=m
+CONFIG_IP_NF_ARP_MANGLE=m
+
+#
+# IPv6: Netfilter Configuration
+#
+# CONFIG_IP6_NF_QUEUE is not set
+CONFIG_IP6_NF_IPTABLES=m
+CONFIG_IP6_NF_MATCH_RT=m
+CONFIG_IP6_NF_MATCH_OPTS=m
+CONFIG_IP6_NF_MATCH_FRAG=m
+CONFIG_IP6_NF_MATCH_HL=m
+CONFIG_IP6_NF_MATCH_IPV6HEADER=m
+# CONFIG_IP6_NF_MATCH_AH is not set
+# CONFIG_IP6_NF_MATCH_MH is not set
+CONFIG_IP6_NF_MATCH_EUI64=m
+CONFIG_IP6_NF_FILTER=m
+CONFIG_IP6_NF_TARGET_LOG=m
+# CONFIG_IP6_NF_TARGET_REJECT is not set
+CONFIG_IP6_NF_MANGLE=m
+# CONFIG_IP6_NF_TARGET_HL is not set
+CONFIG_IP6_NF_RAW=m
+
+#
+# Bridge: Netfilter Configuration
+#
+CONFIG_BRIDGE_NF_EBTABLES=m
+CONFIG_BRIDGE_EBT_BROUTE=m
+CONFIG_BRIDGE_EBT_T_FILTER=m
+CONFIG_BRIDGE_EBT_T_NAT=m
+CONFIG_BRIDGE_EBT_802_3=m
+CONFIG_BRIDGE_EBT_AMONG=m
+CONFIG_BRIDGE_EBT_ARP=m
+CONFIG_BRIDGE_EBT_IP=m
+CONFIG_BRIDGE_EBT_LIMIT=m
+CONFIG_BRIDGE_EBT_MARK=m
+CONFIG_BRIDGE_EBT_PKTTYPE=m
+CONFIG_BRIDGE_EBT_STP=m
+CONFIG_BRIDGE_EBT_VLAN=m
+CONFIG_BRIDGE_EBT_ARPREPLY=m
+CONFIG_BRIDGE_EBT_DNAT=m
+CONFIG_BRIDGE_EBT_MARK_T=m
+CONFIG_BRIDGE_EBT_REDIRECT=m
+CONFIG_BRIDGE_EBT_SNAT=m
+CONFIG_BRIDGE_EBT_LOG=m
+# CONFIG_BRIDGE_EBT_ULOG is not set
+# CONFIG_BRIDGE_EBT_NFLOG is not set
+# CONFIG_IP_DCCP is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_TIPC is not set
+CONFIG_ATM=m
+CONFIG_ATM_CLIP=m
+# CONFIG_ATM_CLIP_NO_ICMP is not set
+CONFIG_ATM_LANE=m
+# CONFIG_ATM_MPOA is not set
+CONFIG_ATM_BR2684=m
+# CONFIG_ATM_BR2684_IPFILTER is not set
+CONFIG_BRIDGE=m
+CONFIG_VLAN_8021Q=m
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+CONFIG_NET_SCH_CBQ=m
+CONFIG_NET_SCH_HTB=m
+CONFIG_NET_SCH_HFSC=m
+CONFIG_NET_SCH_ATM=m
+CONFIG_NET_SCH_PRIO=m
+# CONFIG_NET_SCH_RR is not set
+CONFIG_NET_SCH_RED=m
+CONFIG_NET_SCH_SFQ=m
+CONFIG_NET_SCH_TEQL=m
+CONFIG_NET_SCH_TBF=m
+CONFIG_NET_SCH_GRED=m
+CONFIG_NET_SCH_DSMARK=m
+CONFIG_NET_SCH_NETEM=m
+
+#
+# Classification
+#
+CONFIG_NET_CLS=y
+# CONFIG_NET_CLS_BASIC is not set
+CONFIG_NET_CLS_TCINDEX=m
+CONFIG_NET_CLS_ROUTE4=m
+CONFIG_NET_CLS_ROUTE=y
+CONFIG_NET_CLS_FW=m
+CONFIG_NET_CLS_U32=m
+CONFIG_CLS_U32_PERF=y
+# CONFIG_CLS_U32_MARK is not set
+CONFIG_NET_CLS_RSVP=m
+CONFIG_NET_CLS_RSVP6=m
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_CLS_IND=y
+CONFIG_NET_SCH_FIFO=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_TCPPROBE is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_CMTP=m
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIUSB=m
+CONFIG_BT_HCIUSB_SCO=y
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+# CONFIG_BT_HCIUART_LL is not set
+CONFIG_BT_HCIBCM203X=m
+# CONFIG_BT_HCIBPA10X is not set
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIVHCI=m
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_EXT=y
+# CONFIG_MAC80211 is not set
+CONFIG_IEEE80211=m
+# CONFIG_IEEE80211_DEBUG is not set
+CONFIG_IEEE80211_CRYPT_WEP=m
+CONFIG_IEEE80211_CRYPT_CCMP=m
+CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=m
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=m
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+CONFIG_MTD_CFI_I4=y
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_PCI is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=m
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=16384
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+CONFIG_SCSI_NETLINK=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+CONFIG_CHR_DEV_ST=m
+CONFIG_CHR_DEV_OSST=m
+CONFIG_BLK_DEV_SR=m
+CONFIG_BLK_DEV_SR_VENDOR=y
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+CONFIG_SCSI_CONSTANTS=y
+CONFIG_SCSI_LOGGING=y
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_ATTRS=m
+CONFIG_SCSI_ISCSI_ATTRS=m
+# CONFIG_SCSI_SAS_LIBSAS is not set
+CONFIG_SCSI_SRP_ATTRS=m
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+CONFIG_BLK_DEV_3W_XXXX_RAID=m
+CONFIG_SCSI_3W_9XXX=m
+CONFIG_SCSI_ACARD=m
+CONFIG_SCSI_AACRAID=m
+CONFIG_SCSI_AIC7XXX=m
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=4
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
+CONFIG_AIC7XXX_DEBUG_MASK=0
+# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set
+CONFIG_SCSI_AIC7XXX_OLD=m
+CONFIG_SCSI_AIC79XX=m
+CONFIG_AIC79XX_CMDS_PER_DEVICE=4
+CONFIG_AIC79XX_RESET_DELAY_MS=15000
+# CONFIG_AIC79XX_DEBUG_ENABLE is not set
+CONFIG_AIC79XX_DEBUG_MASK=0
+# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+CONFIG_SCSI_ARCMSR=m
+CONFIG_MEGARAID_NEWGEN=y
+CONFIG_MEGARAID_MM=m
+CONFIG_MEGARAID_MAILBOX=m
+# CONFIG_MEGARAID_LEGACY is not set
+CONFIG_MEGARAID_SAS=m
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+CONFIG_SCSI_FUTURE_DOMAIN=m
+CONFIG_SCSI_GDTH=m
+CONFIG_SCSI_IPS=m
+CONFIG_SCSI_INITIO=m
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+CONFIG_SCSI_SYM53C8XX_2=m
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+CONFIG_SCSI_SYM53C8XX_MMIO=y
+CONFIG_SCSI_QLOGIC_1280=m
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+CONFIG_SCSI_LPFC=m
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+CONFIG_VITESSE_PHY=y
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_MV643XX_ETH=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_ATM_DRIVERS is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_NET_FC is not set
+CONFIG_NETCONSOLE=m
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+CONFIG_NETPOLL_TRAP=y
+CONFIG_NET_POLL_CONTROLLER=y
+CONFIG_ISDN=m
+CONFIG_ISDN_I4L=m
+CONFIG_ISDN_PPP=y
+CONFIG_ISDN_PPP_VJ=y
+CONFIG_ISDN_MPP=y
+CONFIG_IPPP_FILTER=y
+# CONFIG_ISDN_PPP_BSDCOMP is not set
+CONFIG_ISDN_AUDIO=y
+CONFIG_ISDN_TTY_FAX=y
+
+#
+# ISDN feature submodules
+#
+CONFIG_ISDN_DRV_LOOP=m
+# CONFIG_ISDN_DIVERSION is not set
+
+#
+# ISDN4Linux hardware drivers
+#
+
+#
+# Passive cards
+#
+CONFIG_ISDN_DRV_HISAX=m
+
+#
+# D-channel protocol features
+#
+CONFIG_HISAX_EURO=y
+CONFIG_DE_AOC=y
+CONFIG_HISAX_NO_SENDCOMPLETE=y
+CONFIG_HISAX_NO_LLC=y
+CONFIG_HISAX_NO_KEYPAD=y
+CONFIG_HISAX_1TR6=y
+CONFIG_HISAX_NI1=y
+CONFIG_HISAX_MAX_CARDS=8
+
+#
+# HiSax supported cards
+#
+CONFIG_HISAX_16_3=y
+CONFIG_HISAX_S0BOX=y
+CONFIG_HISAX_FRITZPCI=y
+CONFIG_HISAX_AVM_A1_PCMCIA=y
+CONFIG_HISAX_ELSA=y
+CONFIG_HISAX_DIEHLDIVA=y
+CONFIG_HISAX_SEDLBAUER=y
+CONFIG_HISAX_NICCY=y
+CONFIG_HISAX_BKM_A4T=y
+CONFIG_HISAX_SCT_QUADRO=y
+CONFIG_HISAX_GAZEL=y
+CONFIG_HISAX_W6692=y
+CONFIG_HISAX_HFC_SX=y
+# CONFIG_HISAX_DEBUG is not set
+
+#
+# HiSax PCMCIA card service modules
+#
+
+#
+# HiSax sub driver modules
+#
+CONFIG_HISAX_ST5481=m
+CONFIG_HISAX_HFCUSB=m
+# CONFIG_HISAX_HFC4S8S is not set
+CONFIG_HISAX_FRITZ_PCIPNP=m
+CONFIG_HISAX_HDLC=y
+
+#
+# Active cards
+#
+CONFIG_HYSDN=m
+CONFIG_HYSDN_CAPI=y
+# CONFIG_ISDN_DRV_GIGASET is not set
+CONFIG_ISDN_CAPI=m
+CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y
+CONFIG_CAPI_TRACE=y
+CONFIG_ISDN_CAPI_MIDDLEWARE=y
+CONFIG_ISDN_CAPI_CAPI20=m
+CONFIG_ISDN_CAPI_CAPIFS_BOOL=y
+CONFIG_ISDN_CAPI_CAPIFS=m
+CONFIG_ISDN_CAPI_CAPIDRV=m
+
+#
+# CAPI hardware drivers
+#
+CONFIG_CAPI_AVM=y
+CONFIG_ISDN_DRV_AVMB1_B1PCI=m
+CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y
+CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m
+CONFIG_ISDN_DRV_AVMB1_T1PCI=m
+CONFIG_ISDN_DRV_AVMB1_C4=m
+CONFIG_CAPI_EICON=y
+CONFIG_ISDN_DIVAS=m
+CONFIG_ISDN_DIVAS_BRIPCI=y
+CONFIG_ISDN_DIVAS_PRIPCI=y
+CONFIG_ISDN_DIVAS_DIVACAPI=m
+CONFIG_ISDN_DIVAS_USERIDI=m
+CONFIG_ISDN_DIVAS_MAINT=m
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+CONFIG_INPUT_UINPUT=m
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_COMPUTONE is not set
+# CONFIG_ROCKETPORT is not set
+# CONFIG_CYCLADES is not set
+# CONFIG_DIGIEPCA is not set
+# CONFIG_MOXA_INTELLIO is not set
+# CONFIG_MOXA_SMARTIO is not set
+# CONFIG_ISI is not set
+# CONFIG_SYNCLINK is not set
+# CONFIG_SYNCLINKMP is not set
+# CONFIG_SYNCLINK_GT is not set
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_SX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_MPSC=y
+CONFIG_SERIAL_MPSC_CONSOLE=y
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=m
+CONFIG_NVRAM=m
+CONFIG_GEN_RTC=m
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+CONFIG_RAW_DRIVER=y
+CONFIG_MAX_RAW_DEVS=8192
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+CONFIG_I2C_MV64XXX=m
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+CONFIG_SENSORS_EEPROM=m
+CONFIG_SENSORS_PCF8574=m
+# CONFIG_PCF8575 is not set
+CONFIG_SENSORS_PCF8591=m
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=m
+CONFIG_HWMON_VID=m
+# CONFIG_SENSORS_AD7418 is not set
+CONFIG_SENSORS_ADM1021=m
+CONFIG_SENSORS_ADM1025=m
+CONFIG_SENSORS_ADM1026=m
+# CONFIG_SENSORS_ADM1029 is not set
+CONFIG_SENSORS_ADM1031=m
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+CONFIG_SENSORS_DS1621=m
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+CONFIG_SENSORS_GL518SM=m
+# CONFIG_SENSORS_GL520SM is not set
+CONFIG_SENSORS_IT87=m
+# CONFIG_SENSORS_LM63 is not set
+CONFIG_SENSORS_LM75=m
+CONFIG_SENSORS_LM77=m
+CONFIG_SENSORS_LM78=m
+CONFIG_SENSORS_LM80=m
+CONFIG_SENSORS_LM83=m
+CONFIG_SENSORS_LM85=m
+CONFIG_SENSORS_LM87=m
+CONFIG_SENSORS_LM90=m
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+CONFIG_SENSORS_MAX1619=m
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+CONFIG_SENSORS_SMSC47M1=m
+# CONFIG_SENSORS_SMSC47M192 is not set
+CONFIG_SENSORS_SMSC47B397=m
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+CONFIG_SENSORS_VIA686A=m
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+CONFIG_SENSORS_W83781D=m
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+CONFIG_SENSORS_W83L785TS=m
+# CONFIG_SENSORS_W83L786NG is not set
+CONFIG_SENSORS_W83627HF=m
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+CONFIG_SOFT_WATCHDOG=m
+# CONFIG_MV64X60_WDT is not set
+
+#
+# PCI-based Watchdog Cards
+#
+CONFIG_PCIPCWATCHDOG=m
+CONFIG_WDTPCI=m
+CONFIG_WDT_501_PCI=y
+
+#
+# USB-based Watchdog Cards
+#
+CONFIG_USBPCWATCHDOG=m
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_HID=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_HCD_PPC_OF=y
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=m
+CONFIG_USB_OHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_UHCI_HCD=m
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_DPCM=y
+# CONFIG_USB_STORAGE_USBAT is not set
+CONFIG_USB_STORAGE_SDDR09=y
+CONFIG_USB_STORAGE_SDDR55=y
+CONFIG_USB_STORAGE_JUMPSHOT=y
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+CONFIG_USB_MDC800=m
+CONFIG_USB_MICROTEK=m
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_EZUSB=y
+CONFIG_USB_SERIAL_GENERIC=y
+# CONFIG_USB_SERIAL_AIRCABLE is not set
+# CONFIG_USB_SERIAL_AIRPRIME is not set
+# CONFIG_USB_SERIAL_ARK3116 is not set
+CONFIG_USB_SERIAL_BELKIN=m
+# CONFIG_USB_SERIAL_CH341 is not set
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+# CONFIG_USB_SERIAL_CP2101 is not set
+# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
+CONFIG_USB_SERIAL_EMPEG=m
+CONFIG_USB_SERIAL_FTDI_SIO=m
+# CONFIG_USB_SERIAL_FUNSOFT is not set
+CONFIG_USB_SERIAL_VISOR=m
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+# CONFIG_USB_SERIAL_GARMIN is not set
+# CONFIG_USB_SERIAL_IPW is not set
+# CONFIG_USB_SERIAL_IUU is not set
+CONFIG_USB_SERIAL_KEYSPAN_PDA=m
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+# CONFIG_USB_SERIAL_MOS7720 is not set
+# CONFIG_USB_SERIAL_MOS7840 is not set
+# CONFIG_USB_SERIAL_NAVMAN is not set
+CONFIG_USB_SERIAL_PL2303=m
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+# CONFIG_USB_SERIAL_HP4X is not set
+CONFIG_USB_SERIAL_SAFE=m
+CONFIG_USB_SERIAL_SAFE_PADDED=y
+# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_TI is not set
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+# CONFIG_USB_SERIAL_OPTION is not set
+CONFIG_USB_SERIAL_OMNINET=m
+# CONFIG_USB_SERIAL_DEBUG is not set
+
+#
+# USB Miscellaneous drivers
+#
+CONFIG_USB_EMI62=m
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+CONFIG_USB_AUERSWALD=m
+CONFIG_USB_RIO500=m
+CONFIG_USB_LEGOTOWER=m
+CONFIG_USB_LCD=m
+# CONFIG_USB_BERRY_CHARGE is not set
+CONFIG_USB_LED=m
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_TEST=m
+CONFIG_USB_ATM=m
+CONFIG_USB_SPEEDTOUCH=m
+# CONFIG_USB_CXACRU is not set
+# CONFIG_USB_UEAGLEATM is not set
+# CONFIG_USB_XUSBATM is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_INFINIBAND=m
+CONFIG_INFINIBAND_USER_MAD=m
+CONFIG_INFINIBAND_USER_ACCESS=m
+CONFIG_INFINIBAND_USER_MEM=y
+CONFIG_INFINIBAND_ADDR_TRANS=y
+CONFIG_INFINIBAND_MTHCA=m
+CONFIG_INFINIBAND_MTHCA_DEBUG=y
+CONFIG_INFINIBAND_AMSO1100=m
+# CONFIG_INFINIBAND_AMSO1100_DEBUG is not set
+# CONFIG_MLX4_INFINIBAND is not set
+# CONFIG_INFINIBAND_NES is not set
+CONFIG_INFINIBAND_IPOIB=m
+CONFIG_INFINIBAND_IPOIB_CM=y
+CONFIG_INFINIBAND_IPOIB_DEBUG=y
+# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set
+CONFIG_INFINIBAND_SRP=m
+# CONFIG_INFINIBAND_ISER is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+# CONFIG_FSL_DMA is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+CONFIG_EXT3_FS=m
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=m
+CONFIG_FS_MBCACHE=m
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+CONFIG_PRINT_QUOTA_WARNING=y
+# CONFIG_QFMT_V1 is not set
+CONFIG_QFMT_V2=y
+CONFIG_QUOTACTL=y
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=m
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_ECRYPT_FS is not set
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=m
+CONFIG_VXFS_FS=m
+# CONFIG_MINIX_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_ACL_SUPPORT=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_SUNRPC_XPRT_RDMA=m
+# CONFIG_SUNRPC_BIND34 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+CONFIG_RPCSEC_GSS_SPKM3=m
+# CONFIG_SMB_FS is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+CONFIG_CIFS_XATTR=y
+CONFIG_CIFS_POSIX=y
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+CONFIG_OSF_PARTITION=y
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+CONFIG_MAC_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+CONFIG_BSD_DISKLABEL=y
+CONFIG_MINIX_SUBPARTITION=y
+CONFIG_SOLARIS_X86_PARTITION=y
+CONFIG_UNIXWARE_DISKLABEL=y
+# CONFIG_LDM_PARTITION is not set
+CONFIG_SGI_PARTITION=y
+# CONFIG_ULTRIX_PARTITION is not set
+CONFIG_SUN_PARTITION=y
+# CONFIG_KARMA_PARTITION is not set
+CONFIG_EFI_PARTITION=y
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="utf8"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_CHECK_SIGNATURE=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+# CONFIG_DEBUG_MUTEXES is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_HIGHMEM=y
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_KPROBES_SANITY_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_LKDTM is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+CONFIG_DEBUG_STACKOVERFLOW=y
+CONFIG_DEBUG_STACK_USAGE=y
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_BDI_SWITCH is not set
+CONFIG_BOOTX_TEXT=y
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+CONFIG_KEYS=y
+CONFIG_KEYS_DEBUG_PROC_KEYS=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_NETWORK_XFRM is not set
+CONFIG_SECURITY_CAPABILITIES=y
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1
+CONFIG_SECURITY_SELINUX_DISABLE=y
+CONFIG_SECURITY_SELINUX_DEVELOP=y
+CONFIG_SECURITY_SELINUX_AVC_STATS=y
+CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
+# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
+# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_AEAD=m
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_NULL=m
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_AUTHENC=m
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+CONFIG_CRYPTO_MD4=m
+CONFIG_CRYPTO_MD5=y
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA512=m
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_WP512=m
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+# CONFIG_CRYPTO_CAMELLIA is not set
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+CONFIG_CRYPTO_KHAZAD=m
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_TWOFISH_COMMON=m
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/mpc8536_ds_defconfig b/arch/powerpc/configs/mpc8536_ds_defconfig
new file mode 100644
index 0000000..f1e2931
--- /dev/null
+++ b/arch/powerpc/configs/mpc8536_ds_defconfig
@@ -0,0 +1,1637 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.26-rc8
+# Wed Jul 2 01:34:26 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+CONFIG_PPC_85xx=y
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_E500=y
+# CONFIG_PPC_E500MC is not set
+CONFIG_BOOKE=y
+CONFIG_FSL_BOOKE=y
+CONFIG_FSL_EMB_PERFMON=y
+# CONFIG_PHYS_64BIT is not set
+CONFIG_SPE=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
+CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+CONFIG_DEFAULT_UIMAGE=y
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+CONFIG_AUDIT=y
+# CONFIG_AUDITSYSCALL is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+CONFIG_GROUP_SCHED=y
+# CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+CONFIG_CLASSIC_RCU=y
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC512x is not set
+# CONFIG_PPC_MPC5121 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_MPC85xx=y
+# CONFIG_MPC8540_ADS is not set
+# CONFIG_MPC8560_ADS is not set
+# CONFIG_MPC85xx_CDS is not set
+# CONFIG_MPC85xx_MDS is not set
+CONFIG_MPC8536_DS=y
+# CONFIG_MPC85xx_DS is not set
+# CONFIG_KSI8560 is not set
+# CONFIG_STX_GP3 is not set
+# CONFIG_TQM8540 is not set
+# CONFIG_TQM8541 is not set
+# CONFIG_TQM8548 is not set
+# CONFIG_TQM8555 is not set
+# CONFIG_TQM8560 is not set
+# CONFIG_SBC8548 is not set
+# CONFIG_SBC8560 is not set
+# CONFIG_IPIC is not set
+CONFIG_MPIC=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+CONFIG_HIGHMEM=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=m
+CONFIG_MATH_EMULATION=y
+# CONFIG_IOMMU_HELPER is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_HAS_WALK_MEMORY=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_FSL_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYSICAL_ALIGN=0x10000000
+CONFIG_TASK_SIZE=0xc0000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+CONFIG_NET_KEY=m
+# CONFIG_NET_KEY_MIGRATE is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+CONFIG_NET_IPGRE=y
+CONFIG_NET_IPGRE_BROADCAST=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_ARPD=y
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=y
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=y
+CONFIG_INET6_XFRM_MODE_TUNNEL=y
+CONFIG_INET6_XFRM_MODE_BEET=y
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+# CONFIG_MTD is not set
+CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=y
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=524288
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+CONFIG_BLK_DEV_SR=y
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+CONFIG_SCSI_LOGGING=y
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+# CONFIG_SATA_AHCI is not set
+CONFIG_SATA_SIL24=y
+CONFIG_SATA_FSL=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+CONFIG_SATA_SIL=y
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+CONFIG_DUMMY=y
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+CONFIG_VITESSE_PHY=y
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_E1000E_ENABLED is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+CONFIG_SKGE=y
+# CONFIG_SKGE_DEBUG is not set
+CONFIG_SKY2=y
+# CONFIG_SKY2_DEBUG is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+CONFIG_GFAR_NAPI=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NIU is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_I8042=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_OF_PLATFORM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+CONFIG_SENSORS_EEPROM=y
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_THERMAL=y
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_DVB_CORE=m
+CONFIG_VIDEO_MEDIA=m
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_DVB_CAPTURE_DRIVERS=y
+
+#
+# Supported SAA7146 based PCI Adapters
+#
+# CONFIG_TTPCI_EEPROM is not set
+# CONFIG_DVB_BUDGET_CORE is not set
+
+#
+# Supported USB Adapters
+#
+# CONFIG_DVB_USB is not set
+# CONFIG_DVB_TTUSB_BUDGET is not set
+# CONFIG_DVB_TTUSB_DEC is not set
+# CONFIG_DVB_CINERGYT2 is not set
+
+#
+# Supported FlexCopII (B2C2) Adapters
+#
+# CONFIG_DVB_B2C2_FLEXCOP is not set
+
+#
+# Supported BT878 Adapters
+#
+
+#
+# Supported Pluto2 Adapters
+#
+# CONFIG_DVB_PLUTO2 is not set
+
+#
+# Supported DVB Frontends
+#
+
+#
+# Customise DVB Frontends
+#
+# CONFIG_DVB_FE_CUSTOMISE is not set
+
+#
+# DVB-S (satellite) frontends
+#
+# CONFIG_DVB_CX24110 is not set
+# CONFIG_DVB_CX24123 is not set
+# CONFIG_DVB_MT312 is not set
+# CONFIG_DVB_S5H1420 is not set
+# CONFIG_DVB_STV0299 is not set
+# CONFIG_DVB_TDA8083 is not set
+# CONFIG_DVB_TDA10086 is not set
+# CONFIG_DVB_VES1X93 is not set
+# CONFIG_DVB_TUNER_ITD1000 is not set
+# CONFIG_DVB_TDA826X is not set
+# CONFIG_DVB_TUA6100 is not set
+
+#
+# DVB-T (terrestrial) frontends
+#
+# CONFIG_DVB_SP8870 is not set
+# CONFIG_DVB_SP887X is not set
+# CONFIG_DVB_CX22700 is not set
+# CONFIG_DVB_CX22702 is not set
+# CONFIG_DVB_L64781 is not set
+# CONFIG_DVB_TDA1004X is not set
+# CONFIG_DVB_NXT6000 is not set
+# CONFIG_DVB_MT352 is not set
+# CONFIG_DVB_ZL10353 is not set
+# CONFIG_DVB_DIB3000MB is not set
+# CONFIG_DVB_DIB3000MC is not set
+# CONFIG_DVB_DIB7000M is not set
+# CONFIG_DVB_DIB7000P is not set
+# CONFIG_DVB_TDA10048 is not set
+
+#
+# DVB-C (cable) frontends
+#
+# CONFIG_DVB_VES1820 is not set
+# CONFIG_DVB_TDA10021 is not set
+# CONFIG_DVB_TDA10023 is not set
+# CONFIG_DVB_STV0297 is not set
+
+#
+# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
+#
+# CONFIG_DVB_NXT200X is not set
+# CONFIG_DVB_OR51211 is not set
+# CONFIG_DVB_OR51132 is not set
+# CONFIG_DVB_BCM3510 is not set
+# CONFIG_DVB_LGDT330X is not set
+# CONFIG_DVB_S5H1409 is not set
+# CONFIG_DVB_AU8522 is not set
+# CONFIG_DVB_S5H1411 is not set
+
+#
+# Digital terrestrial only tuners/PLL
+#
+# CONFIG_DVB_PLL is not set
+# CONFIG_DVB_TUNER_DIB0070 is not set
+
+#
+# SEC control devices for DVB-S
+#
+# CONFIG_DVB_LNBP21 is not set
+# CONFIG_DVB_ISL6405 is not set
+# CONFIG_DVB_ISL6421 is not set
+CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+# CONFIG_SND_MIXER_OSS is not set
+# CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+CONFIG_SND_AC97_CODEC=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALS4000 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_OXYGEN is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5530 is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_HIFIER is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+CONFIG_SND_INTEL8X0=y
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VIRTUOSO is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+# CONFIG_SND_AC97_POWER_SAVE is not set
+
+#
+# ALSA PowerMac devices
+#
+
+#
+# ALSA PowerPC devices
+#
+
+#
+# USB devices
+#
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_USX2Y is not set
+# CONFIG_SND_USB_CAIAQ is not set
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# ALSA SoC audio for Freescale SOCs
+#
+
+#
+# SoC Audio for the Texas Instruments OMAP
+#
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=y
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+CONFIG_USB_EHCI_FSL=y
+CONFIG_USB_EHCI_HCD_PPC_OF=y
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PPC_OF=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
+CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
+CONFIG_USB_OHCI_HCD_PCI=y
+CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
+CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+CONFIG_RTC_DRV_CMOS=y
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_PPC is not set
+CONFIG_DMADEVICES=y
+
+#
+# DMA Devices
+#
+CONFIG_FSL_DMA=y
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+# CONFIG_NET_DMA is not set
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+# CONFIG_NTFS_RW is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+CONFIG_ADFS_FS=m
+# CONFIG_ADFS_FS_RW is not set
+CONFIG_AFFS_FS=m
+CONFIG_HFS_FS=m
+CONFIG_HFSPLUS_FS=m
+CONFIG_BEFS_FS=m
+# CONFIG_BEFS_DEBUG is not set
+CONFIG_BFS_FS=m
+CONFIG_EFS_FS=m
+CONFIG_CRAMFS=y
+CONFIG_VXFS_FS=m
+# CONFIG_MINIX_FS is not set
+CONFIG_HPFS_FS=m
+CONFIG_QNX4FS_FS=m
+# CONFIG_ROMFS_FS is not set
+CONFIG_SYSV_FS=m
+CONFIG_UFS_FS=m
+# CONFIG_UFS_FS_WRITE is not set
+# CONFIG_UFS_DEBUG is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_NFSD=y
+# CONFIG_NFSD_V3 is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_BIND34 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+CONFIG_MAC_PARTITION=y
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_VIRQ_DEBUG is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index 12f9b5a..f9d279b 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.25-rc6
-# Sat Apr 5 09:35:48 2008
+# Linux kernel version: 2.6.26-rc8
+# Wed Jul 9 13:50:48 2008
#
# CONFIG_PPC64 is not set
@@ -32,6 +32,8 @@
CONFIG_GENERIC_HARDIRQS=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_GENERIC_HWEIGHT=y
@@ -88,6 +90,7 @@
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
@@ -115,12 +118,14 @@
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
@@ -157,6 +162,7 @@
# CONFIG_PQ2ADS is not set
CONFIG_BAMBOO=y
CONFIG_EBONY=y
+CONFIG_SAM440EP=y
CONFIG_SEQUOIA=y
CONFIG_TAISHAN=y
CONFIG_KATMAI=y
@@ -164,6 +170,7 @@
CONFIG_WARP=y
CONFIG_CANYONLANDS=y
CONFIG_YOSEMITE=y
+CONFIG_XILINX_VIRTEX440_GENERIC_BOARD=y
CONFIG_440EP=y
CONFIG_440EPX=y
CONFIG_440GRX=y
@@ -172,6 +179,8 @@
CONFIG_440SPe=y
CONFIG_460EX=y
CONFIG_IBM440EP_ERR42=y
+CONFIG_XILINX_VIRTEX=y
+CONFIG_XILINX_VIRTEX_5_FXT=y
# CONFIG_IPIC is not set
# CONFIG_MPIC is not set
# CONFIG_MPIC_WEIRD is not set
@@ -220,13 +229,16 @@
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
+CONFIG_EXTRA_TARGETS=""
CONFIG_SECCOMP=y
CONFIG_ISA_DMA_API=y
@@ -246,6 +258,7 @@
# CONFIG_PCI_DEBUG is not set
# CONFIG_PCCARD is not set
# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
#
# Advanced setup
@@ -255,13 +268,13 @@
#
# Default settings for advanced configuration options are used
#
-CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
CONFIG_TASK_SIZE=0xc0000000
CONFIG_CONSISTENT_START=0xff100000
CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x01000000
#
# Networking
@@ -303,8 +316,6 @@
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
@@ -366,6 +377,7 @@
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
#
# User Modules And Translation Layers
@@ -478,6 +490,10 @@
#
# IEEE 1394 (FireWire) support
#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
# CONFIG_I2O is not set
@@ -528,7 +544,6 @@
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
@@ -546,6 +561,7 @@
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
@@ -553,6 +569,7 @@
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
# CONFIG_WAN is not set
# CONFIG_FDDI is not set
# CONFIG_HIPPI is not set
@@ -579,6 +596,7 @@
# Character devices
#
# CONFIG_VT is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
@@ -611,22 +629,19 @@
# CONFIG_HW_RANDOM is not set
# CONFIG_NVRAM is not set
# CONFIG_GEN_RTC is not set
+CONFIG_XILINX_HWICAP=m
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
#
@@ -639,12 +654,22 @@
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
# CONFIG_DAB is not set
#
@@ -671,6 +696,8 @@
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
# CONFIG_USB is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -679,14 +706,11 @@
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set
-
-#
-# Userspace I/O
-#
# CONFIG_UIO is not set
#
@@ -701,7 +725,6 @@
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
@@ -770,7 +793,6 @@
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
@@ -798,6 +820,7 @@
# Library routines
#
CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
@@ -818,6 +841,7 @@
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
@@ -828,6 +852,7 @@
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
@@ -840,6 +865,7 @@
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
@@ -851,6 +877,9 @@
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_DEBUGGER is not set
+# CONFIG_CODE_PATCHING_SELFTEST is not set
+# CONFIG_FTR_FIXUP_SELFTEST is not set
+# CONFIG_IRQSTACKS is not set
# CONFIG_BDI_SWITCH is not set
# CONFIG_PPC_EARLY_DEBUG is not set
@@ -861,50 +890,80 @@
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
-# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=y
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
-# CONFIG_CRYPTO_NULL is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-CONFIG_CRYPTO_ECB=y
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_PCBC=y
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CTR is not set
-# CONFIG_CRYPTO_GCM is not set
-# CONFIG_CRYPTO_CCM is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_FCRYPT is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_LZO is not set
# CONFIG_CRYPTO_HW is not set
# CONFIG_PPC_CLOCK is not set
+# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index adaa05f..fe6ffa6 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -946,6 +946,7 @@
CONFIG_HVC_CONSOLE=y
CONFIG_HVC_RTAS=y
CONFIG_HVCS=m
+CONFIG_IBM_BSR=m
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
CONFIG_GEN_RTC=y
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index f3f5e26..bf0b1fd 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -50,12 +50,13 @@
obj-$(CONFIG_IBMEBUS) += ibmebus.o
obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
+obj-$(CONFIG_E500) += idle_e500.o
obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
obj-$(CONFIG_TAU) += tau_6xx.o
obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
swsusp_$(CONFIG_WORD_SIZE).o
obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
-obj-$(CONFIG_MODULES) += module_$(CONFIG_WORD_SIZE).o
+obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o
obj-$(CONFIG_44x) += cpu_setup_44x.o
ifeq ($(CONFIG_PPC_MERGE),y)
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index e06f75d..3671297 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -48,6 +48,7 @@
#define HARD 0x80 /* string, stwcx. */
#define E4 0x40 /* SPE endianness is word */
#define E8 0x80 /* SPE endianness is double word */
+#define SPLT 0x80 /* VSX SPLAT load */
/* DSISR bits reported for a DCBZ instruction: */
#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */
@@ -363,10 +364,10 @@
* Only POWER6 has these instructions, and it does true little-endian,
* so we don't need the address swizzling.
*/
-static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr,
- unsigned int reg, unsigned int flags)
+static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg,
+ unsigned int flags)
{
- char *ptr = (char *) ¤t->thread.fpr[reg];
+ char *ptr = (char *) ¤t->thread.TS_FPR(reg);
int i, ret;
if (!(flags & F))
@@ -637,6 +638,36 @@
}
#endif /* CONFIG_SPE */
+#ifdef CONFIG_VSX
+/*
+ * Emulate VSX instructions...
+ */
+static int emulate_vsx(unsigned char __user *addr, unsigned int reg,
+ unsigned int areg, struct pt_regs *regs,
+ unsigned int flags, unsigned int length)
+{
+ char *ptr = (char *) ¤t->thread.TS_FPR(reg);
+ int ret;
+
+ flush_vsx_to_thread(current);
+
+ if (flags & ST)
+ ret = __copy_to_user(addr, ptr, length);
+ else {
+ if (flags & SPLT){
+ ret = __copy_from_user(ptr, addr, length);
+ ptr += length;
+ }
+ ret |= __copy_from_user(ptr, addr, length);
+ }
+ if (flags & U)
+ regs->gpr[areg] = regs->dar;
+ if (ret)
+ return -EFAULT;
+ return 1;
+}
+#endif
+
/*
* Called on alignment exception. Attempts to fixup
*
@@ -647,7 +678,7 @@
int fix_alignment(struct pt_regs *regs)
{
- unsigned int instr, nb, flags;
+ unsigned int instr, nb, flags, instruction = 0;
unsigned int reg, areg;
unsigned int dsisr;
unsigned char __user *addr;
@@ -689,6 +720,7 @@
if (cpu_has_feature(CPU_FTR_REAL_LE) && (regs->msr & MSR_LE))
instr = cpu_to_le32(instr);
dsisr = make_dsisr(instr);
+ instruction = instr;
}
/* extract the operation and registers from the dsisr */
@@ -728,6 +760,30 @@
/* DAR has the operand effective address */
addr = (unsigned char __user *)regs->dar;
+#ifdef CONFIG_VSX
+ if ((instruction & 0xfc00003e) == 0x7c000018) {
+ /* Additional register addressing bit (64 VSX vs 32 FPR/GPR */
+ reg |= (instruction & 0x1) << 5;
+ /* Simple inline decoder instead of a table */
+ if (instruction & 0x200)
+ nb = 16;
+ else if (instruction & 0x080)
+ nb = 8;
+ else
+ nb = 4;
+ flags = 0;
+ if (instruction & 0x100)
+ flags |= ST;
+ if (instruction & 0x040)
+ flags |= U;
+ /* splat load needs a special decoder */
+ if ((instruction & 0x400) == 0){
+ flags |= SPLT;
+ nb = 8;
+ }
+ return emulate_vsx(addr, reg, areg, regs, flags, nb);
+ }
+#endif
/* A size of 0 indicates an instruction we don't support, with
* the exception of DCBZ which is handled as a special case here
*/
@@ -759,7 +815,7 @@
/* Special case for 16-byte FP loads and stores */
if (nb == 16)
- return emulate_fp_pair(regs, addr, reg, flags);
+ return emulate_fp_pair(addr, reg, flags);
/* If we are loading, get the data from user space, else
* get it from register values
@@ -784,7 +840,7 @@
return -EFAULT;
}
} else if (flags & F) {
- data.dd = current->thread.fpr[reg];
+ data.dd = current->thread.TS_FPR(reg);
if (flags & S) {
/* Single-precision FP store requires conversion... */
#ifdef CONFIG_PPC_FPU
@@ -862,7 +918,7 @@
if (unlikely(ret))
return -EFAULT;
} else if (flags & F)
- current->thread.fpr[reg] = data.dd;
+ current->thread.TS_FPR(reg) = data.dd;
else
regs->gpr[reg] = data.ll;
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index ec9228d..92768d3 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -52,6 +52,10 @@
#include <asm/iseries/alpaca.h>
#endif
+#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
+#include "head_booke.h"
+#endif
+
int main(void)
{
DEFINE(THREAD, offsetof(struct task_struct, thread));
@@ -74,6 +78,10 @@
DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
+ DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
+#endif /* CONFIG_VSX */
#ifdef CONFIG_PPC64
DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
#else /* CONFIG_PPC64 */
@@ -242,6 +250,25 @@
DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
#endif /* CONFIG_PPC64 */
+#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
+ DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
+ DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
+ /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
+ DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
+ DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
+ DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
+ DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
+ DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
+ DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
+ DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
+ DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
+ DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
+ DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
+ DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
+ DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
+ DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
+#endif
+
DEFINE(CLONE_VM, CLONE_VM);
DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
index e3623e3..5465e8d 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -33,6 +33,7 @@
mtlr r4
blr
_GLOBAL(__setup_cpu_460ex)
+_GLOBAL(__setup_cpu_460gt)
b __init_fpu_44x
_GLOBAL(__setup_cpu_440gx)
_GLOBAL(__setup_cpu_440spe)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index e44d553..f7f3c21 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -37,6 +37,7 @@
extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -52,6 +53,8 @@
extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
extern void __restore_cpu_pa6t(void);
extern void __restore_cpu_ppc970(void);
+extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
+extern void __restore_cpu_power7(void);
#endif /* CONFIG_PPC64 */
/* This table only contains "desktop" CPUs, it need to be filled with embedded
@@ -67,7 +70,12 @@
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
- PPC_FEATURE_TRUE_LE)
+ PPC_FEATURE_TRUE_LE | \
+ PPC_FEATURE_PSERIES_PERFMON_COMPAT)
+#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
+ PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
+ PPC_FEATURE_TRUE_LE | \
+ PPC_FEATURE_PSERIES_PERFMON_COMPAT)
#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
PPC_FEATURE_TRUE_LE | \
PPC_FEATURE_HAS_ALTIVEC_COMP)
@@ -380,6 +388,37 @@
.machine_check = machine_check_generic,
.platform = "power6",
},
+ { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x0f000003,
+ .cpu_name = "POWER7 (architected)",
+ .cpu_features = CPU_FTRS_POWER7,
+ .cpu_user_features = COMMON_USER_POWER7,
+ .icache_bsize = 128,
+ .dcache_bsize = 128,
+ .machine_check = machine_check_generic,
+ .platform = "power7",
+ },
+ { /* Power7 */
+ .pvr_mask = 0xffff0000,
+ .pvr_value = 0x003f0000,
+ .cpu_name = "POWER7 (raw)",
+ .cpu_features = CPU_FTRS_POWER7,
+ .cpu_user_features = COMMON_USER_POWER7,
+ .icache_bsize = 128,
+ .dcache_bsize = 128,
+ .num_pmcs = 6,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_power7,
+ .cpu_restore = __restore_cpu_power7,
+ .oprofile_cpu_type = "ppc64/power7",
+ .oprofile_type = PPC_OPROFILE_POWER4,
+ .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
+ .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
+ .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
+ POWER6_MMCRA_OTHER,
+ .platform = "power7",
+ },
{ /* Cell Broadband Engine */
.pvr_mask = 0xffff0000,
.pvr_value = 0x00700000,
@@ -1410,6 +1449,16 @@
.machine_check = machine_check_440A,
.platform = "ppc440",
},
+ { /* 440 in Xilinx Virtex-5 FXT */
+ .pvr_mask = 0xfffffff0,
+ .pvr_value = 0x7ff21910,
+ .cpu_name = "440 in Virtex-5 FXT",
+ .cpu_features = CPU_FTRS_44X,
+ .cpu_user_features = COMMON_USER_BOOKE,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .platform = "ppc440",
+ },
{ /* 460EX */
.pvr_mask = 0xffff0002,
.pvr_value = 0x13020002,
@@ -1427,9 +1476,10 @@
.pvr_value = 0x13020000,
.cpu_name = "460GT",
.cpu_features = CPU_FTRS_44X,
- .cpu_user_features = COMMON_USER_BOOKE,
+ .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .cpu_setup = __setup_cpu_460gt,
.machine_check = machine_check_440A,
.platform = "ppc440",
},
@@ -1491,7 +1541,6 @@
.pvr_mask = 0xffff0000,
.pvr_value = 0x80200000,
.cpu_name = "e500",
- /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
.cpu_features = CPU_FTRS_E500,
.cpu_user_features = COMMON_USER_BOOKE |
PPC_FEATURE_HAS_SPE_COMP |
@@ -1508,7 +1557,6 @@
.pvr_mask = 0xffff0000,
.pvr_value = 0x80210000,
.cpu_name = "e500v2",
- /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
.cpu_features = CPU_FTRS_E500_2,
.cpu_user_features = COMMON_USER_BOOKE |
PPC_FEATURE_HAS_SPE_COMP |
@@ -1522,6 +1570,20 @@
.machine_check = machine_check_e500,
.platform = "ppc8548",
},
+ { /* e500mc */
+ .pvr_mask = 0xffff0000,
+ .pvr_value = 0x80230000,
+ .cpu_name = "e500mc",
+ .cpu_features = CPU_FTRS_E500MC,
+ .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+ .icache_bsize = 64,
+ .dcache_bsize = 64,
+ .num_pmcs = 4,
+ .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
+ .oprofile_type = PPC_OPROFILE_FSL_EMB,
+ .machine_check = machine_check_e500,
+ .platform = "ppce500mc",
+ },
{ /* default match */
.pvr_mask = 0x00000000,
.pvr_value = 0x00000000,
@@ -1587,38 +1649,3 @@
BUG();
return NULL;
}
-
-void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
-{
- struct fixup_entry {
- unsigned long mask;
- unsigned long value;
- long start_off;
- long end_off;
- } *fcur, *fend;
-
- fcur = fixup_start;
- fend = fixup_end;
-
- for (; fcur < fend; fcur++) {
- unsigned int *pstart, *pend, *p;
-
- if ((value & fcur->mask) == fcur->value)
- continue;
-
- /* These PTRRELOCs will disappear once the new scheme for
- * modules and vdso is implemented
- */
- pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
- pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
-
- for (p = pstart; p < pend; p++) {
- *p = 0x60000000u;
- asm volatile ("dcbst 0, %0" : : "r" (p));
- }
- asm volatile ("sync" : : : "memory");
- for (p = pstart; p < pend; p++)
- asm volatile ("icbi 0,%0" : : "r" (p));
- asm volatile ("sync; isync" : : : "memory");
- }
-}
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index eae401d..0a8439a 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -48,7 +48,7 @@
static cpumask_t cpus_in_crash = CPU_MASK_NONE;
cpumask_t cpus_in_sr = CPU_MASK_NONE;
-#define CRASH_HANDLER_MAX 1
+#define CRASH_HANDLER_MAX 2
/* NULL terminated list of shutdown handles */
static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1];
static DEFINE_SPINLOCK(crash_handlers_lock);
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 9ee3c52..e0debcc 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -14,6 +14,7 @@
#include <linux/crash_dump.h>
#include <linux/bootmem.h>
#include <linux/lmb.h>
+#include <asm/code-patching.h>
#include <asm/kdump.h>
#include <asm/prom.h>
#include <asm/firmware.h>
@@ -33,6 +34,8 @@
static void __init create_trampoline(unsigned long addr)
{
+ unsigned int *p = (unsigned int *)addr;
+
/* The maximum range of a single instruction branch, is the current
* instruction's address + (32 MB - 4) bytes. For the trampoline we
* need to branch to current address + 32 MB. So we insert a nop at
@@ -41,8 +44,8 @@
* branch to "addr" we jump to ("addr" + 32 MB). Although it requires
* two instructions it doesn't require any registers.
*/
- create_instruction(addr, 0x60000000); /* nop */
- create_branch(addr + 4, addr + PHYSICAL_START, 0);
+ patch_instruction(p, PPC_NOP_INSTR);
+ patch_branch(++p, addr + PHYSICAL_START, 0);
}
void __init setup_kdump_trampoline(void)
diff --git a/arch/powerpc/kernel/dma_64.c b/arch/powerpc/kernel/dma_64.c
index 3a317cb..ae5708e 100644
--- a/arch/powerpc/kernel/dma_64.c
+++ b/arch/powerpc/kernel/dma_64.c
@@ -15,15 +15,6 @@
* Generic iommu implementation
*/
-static inline unsigned long device_to_mask(struct device *dev)
-{
- if (dev->dma_mask && *dev->dma_mask)
- return *dev->dma_mask;
- /* Assume devices without mask can take 32 bit addresses */
- return 0xfffffffful;
-}
-
-
/* Allocates a contiguous real buffer and creates mappings over it.
* Returns the virtual address of the buffer and sets dma_handle
* to the dma address (mapping) of the first page.
@@ -50,32 +41,38 @@
*/
static dma_addr_t dma_iommu_map_single(struct device *dev, void *vaddr,
size_t size,
- enum dma_data_direction direction)
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
return iommu_map_single(dev, dev->archdata.dma_data, vaddr, size,
- device_to_mask(dev), direction);
+ device_to_mask(dev), direction, attrs);
}
static void dma_iommu_unmap_single(struct device *dev, dma_addr_t dma_handle,
size_t size,
- enum dma_data_direction direction)
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
- iommu_unmap_single(dev->archdata.dma_data, dma_handle, size, direction);
+ iommu_unmap_single(dev->archdata.dma_data, dma_handle, size, direction,
+ attrs);
}
static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,
- int nelems, enum dma_data_direction direction)
+ int nelems, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
- return iommu_map_sg(dev, sglist, nelems,
- device_to_mask(dev), direction);
+ return iommu_map_sg(dev, dev->archdata.dma_data, sglist, nelems,
+ device_to_mask(dev), direction, attrs);
}
static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist,
- int nelems, enum dma_data_direction direction)
+ int nelems, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
- iommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction);
+ iommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction,
+ attrs);
}
/* We support DMA to/from any memory page via the iommu */
@@ -148,19 +145,22 @@
static dma_addr_t dma_direct_map_single(struct device *dev, void *ptr,
size_t size,
- enum dma_data_direction direction)
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
return virt_to_abs(ptr) + get_dma_direct_offset(dev);
}
static void dma_direct_unmap_single(struct device *dev, dma_addr_t dma_addr,
size_t size,
- enum dma_data_direction direction)
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
}
static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
- int nents, enum dma_data_direction direction)
+ int nents, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
struct scatterlist *sg;
int i;
@@ -174,7 +174,8 @@
}
static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
- int nents, enum dma_data_direction direction)
+ int nents, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
}
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 7231a70..da52269 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -45,29 +45,54 @@
#endif
#ifdef CONFIG_BOOKE
-#include "head_booke.h"
-#define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level) \
- mtspr exc_level##_SPRG,r8; \
- BOOKE_LOAD_EXC_LEVEL_STACK(exc_level); \
- lwz r0,GPR10-INT_FRAME_SIZE(r8); \
- stw r0,GPR10(r11); \
- lwz r0,GPR11-INT_FRAME_SIZE(r8); \
- stw r0,GPR11(r11); \
- mfspr r8,exc_level##_SPRG
-
.globl mcheck_transfer_to_handler
mcheck_transfer_to_handler:
- TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK)
- b transfer_to_handler_full
+ mfspr r0,SPRN_DSRR0
+ stw r0,_DSRR0(r11)
+ mfspr r0,SPRN_DSRR1
+ stw r0,_DSRR1(r11)
+ /* fall through */
.globl debug_transfer_to_handler
debug_transfer_to_handler:
- TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG)
- b transfer_to_handler_full
+ mfspr r0,SPRN_CSRR0
+ stw r0,_CSRR0(r11)
+ mfspr r0,SPRN_CSRR1
+ stw r0,_CSRR1(r11)
+ /* fall through */
.globl crit_transfer_to_handler
crit_transfer_to_handler:
- TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT)
+#ifdef CONFIG_FSL_BOOKE
+ mfspr r0,SPRN_MAS0
+ stw r0,MAS0(r11)
+ mfspr r0,SPRN_MAS1
+ stw r0,MAS1(r11)
+ mfspr r0,SPRN_MAS2
+ stw r0,MAS2(r11)
+ mfspr r0,SPRN_MAS3
+ stw r0,MAS3(r11)
+ mfspr r0,SPRN_MAS6
+ stw r0,MAS6(r11)
+#ifdef CONFIG_PHYS_64BIT
+ mfspr r0,SPRN_MAS7
+ stw r0,MAS7(r11)
+#endif /* CONFIG_PHYS_64BIT */
+#endif /* CONFIG_FSL_BOOKE */
+#ifdef CONFIG_44x
+ mfspr r0,SPRN_MMUCR
+ stw r0,MMUCR(r11)
+#endif
+ mfspr r0,SPRN_SRR0
+ stw r0,_SRR0(r11)
+ mfspr r0,SPRN_SRR1
+ stw r0,_SRR1(r11)
+
+ mfspr r8,SPRN_SPRG3
+ lwz r0,KSP_LIMIT(r8)
+ stw r0,SAVED_KSP_LIMIT(r11)
+ rlwimi r0,r1,0,0,(31-THREAD_SHIFT)
+ stw r0,KSP_LIMIT(r8)
/* fall through */
#endif
@@ -78,6 +103,16 @@
stw r0,GPR10(r11)
lwz r0,crit_r11@l(0)
stw r0,GPR11(r11)
+ mfspr r0,SPRN_SRR0
+ stw r0,crit_srr0@l(0)
+ mfspr r0,SPRN_SRR1
+ stw r0,crit_srr1@l(0)
+
+ mfspr r8,SPRN_SPRG3
+ lwz r0,KSP_LIMIT(r8)
+ stw r0,saved_ksp_limit@l(0)
+ rlwimi r0,r1,0,0,(31-THREAD_SHIFT)
+ stw r0,KSP_LIMIT(r8)
/* fall through */
#endif
@@ -142,13 +177,14 @@
cmplw r1,r9 /* if r1 <= ksp_limit */
ble- stack_ovf /* then the kernel stack overflowed */
5:
-#ifdef CONFIG_6xx
+#if defined(CONFIG_6xx) || defined(CONFIG_E500)
rlwinm r9,r1,0,0,31-THREAD_SHIFT
tophys(r9,r9) /* check local flags */
lwz r12,TI_LOCAL_FLAGS(r9)
mtcrf 0x01,r12
bt- 31-TLF_NAPPING,4f
-#endif /* CONFIG_6xx */
+ bt- 31-TLF_SLEEPING,7f
+#endif /* CONFIG_6xx || CONFIG_E500 */
.globl transfer_to_handler_cont
transfer_to_handler_cont:
3:
@@ -161,10 +197,17 @@
SYNC
RFI /* jump to handler, enable MMU */
-#ifdef CONFIG_6xx
+#if defined (CONFIG_6xx) || defined(CONFIG_E500)
4: rlwinm r12,r12,0,~_TLF_NAPPING
stw r12,TI_LOCAL_FLAGS(r9)
- b power_save_6xx_restore
+ b power_save_ppc32_restore
+
+7: rlwinm r12,r12,0,~_TLF_SLEEPING
+ stw r12,TI_LOCAL_FLAGS(r9)
+ lwz r9,_MSR(r11) /* if sleeping, clear MSR.EE */
+ rlwinm r9,r9,0,~MSR_EE
+ lwz r12,_LINK(r11) /* and return to address in LR */
+ b fast_exception_return
#endif
/*
@@ -669,7 +712,7 @@
/* Check current_thread_info()->flags */
rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
lwz r9,TI_FLAGS(r9)
- andi. r0,r9,(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NEED_RESCHED)
+ andi. r0,r9,_TIF_USER_WORK_MASK
bne do_work
restore_user:
@@ -860,17 +903,90 @@
exc_lvl_rfi; \
b .; /* prevent prefetch past exc_lvl_rfi */
+#define RESTORE_xSRR(exc_lvl_srr0, exc_lvl_srr1) \
+ lwz r9,_##exc_lvl_srr0(r1); \
+ lwz r10,_##exc_lvl_srr1(r1); \
+ mtspr SPRN_##exc_lvl_srr0,r9; \
+ mtspr SPRN_##exc_lvl_srr1,r10;
+
+#if defined(CONFIG_FSL_BOOKE)
+#ifdef CONFIG_PHYS_64BIT
+#define RESTORE_MAS7 \
+ lwz r11,MAS7(r1); \
+ mtspr SPRN_MAS7,r11;
+#else
+#define RESTORE_MAS7
+#endif /* CONFIG_PHYS_64BIT */
+#define RESTORE_MMU_REGS \
+ lwz r9,MAS0(r1); \
+ lwz r10,MAS1(r1); \
+ lwz r11,MAS2(r1); \
+ mtspr SPRN_MAS0,r9; \
+ lwz r9,MAS3(r1); \
+ mtspr SPRN_MAS1,r10; \
+ lwz r10,MAS6(r1); \
+ mtspr SPRN_MAS2,r11; \
+ mtspr SPRN_MAS3,r9; \
+ mtspr SPRN_MAS6,r10; \
+ RESTORE_MAS7;
+#elif defined(CONFIG_44x)
+#define RESTORE_MMU_REGS \
+ lwz r9,MMUCR(r1); \
+ mtspr SPRN_MMUCR,r9;
+#else
+#define RESTORE_MMU_REGS
+#endif
+
+#ifdef CONFIG_40x
.globl ret_from_crit_exc
ret_from_crit_exc:
+ mfspr r9,SPRN_SPRG3
+ lis r10,saved_ksp_limit@ha;
+ lwz r10,saved_ksp_limit@l(r10);
+ tovirt(r9,r9);
+ stw r10,KSP_LIMIT(r9)
+ lis r9,crit_srr0@ha;
+ lwz r9,crit_srr0@l(r9);
+ lis r10,crit_srr1@ha;
+ lwz r10,crit_srr1@l(r10);
+ mtspr SPRN_SRR0,r9;
+ mtspr SPRN_SRR1,r10;
RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
+#endif /* CONFIG_40x */
#ifdef CONFIG_BOOKE
+ .globl ret_from_crit_exc
+ret_from_crit_exc:
+ mfspr r9,SPRN_SPRG3
+ lwz r10,SAVED_KSP_LIMIT(r1)
+ stw r10,KSP_LIMIT(r9)
+ RESTORE_xSRR(SRR0,SRR1);
+ RESTORE_MMU_REGS;
+ RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
+
.globl ret_from_debug_exc
ret_from_debug_exc:
+ mfspr r9,SPRN_SPRG3
+ lwz r10,SAVED_KSP_LIMIT(r1)
+ stw r10,KSP_LIMIT(r9)
+ lwz r9,THREAD_INFO-THREAD(r9)
+ rlwinm r10,r1,0,0,(31-THREAD_SHIFT)
+ lwz r10,TI_PREEMPT(r10)
+ stw r10,TI_PREEMPT(r9)
+ RESTORE_xSRR(SRR0,SRR1);
+ RESTORE_xSRR(CSRR0,CSRR1);
+ RESTORE_MMU_REGS;
RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI)
.globl ret_from_mcheck_exc
ret_from_mcheck_exc:
+ mfspr r9,SPRN_SPRG3
+ lwz r10,SAVED_KSP_LIMIT(r1)
+ stw r10,KSP_LIMIT(r9)
+ RESTORE_xSRR(SRR0,SRR1);
+ RESTORE_xSRR(CSRR0,CSRR1);
+ RESTORE_xSRR(DSRR0,DSRR1);
+ RESTORE_MMU_REGS;
RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI)
#endif /* CONFIG_BOOKE */
@@ -926,7 +1042,7 @@
lwz r9,TI_FLAGS(r9)
andi. r0,r9,_TIF_NEED_RESCHED
bne- do_resched
- andi. r0,r9,_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK
+ andi. r0,r9,_TIF_USER_WORK_MASK
beq restore_user
do_user_signal: /* r10 contains MSR_KERNEL here */
ori r10,r10,MSR_EE
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 2f511a9..d736924 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -354,6 +354,11 @@
mflr r20 /* Return to switch caller */
mfmsr r22
li r0, MSR_FP
+#ifdef CONFIG_VSX
+BEGIN_FTR_SECTION
+ oris r0,r0,MSR_VSX@h /* Disable VSX */
+END_FTR_SECTION_IFSET(CPU_FTR_VSX)
+#endif /* CONFIG_VSX */
#ifdef CONFIG_ALTIVEC
BEGIN_FTR_SECTION
oris r0,r0,MSR_VEC@h /* Disable altivec */
@@ -384,16 +389,16 @@
ld r8,KSP(r4) /* new stack pointer */
BEGIN_FTR_SECTION
- b 2f
-END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
-BEGIN_FTR_SECTION
+ BEGIN_FTR_SECTION_NESTED(95)
clrrdi r6,r8,28 /* get its ESID */
clrrdi r9,r1,28 /* get current sp ESID */
-END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
-BEGIN_FTR_SECTION
+ FTR_SECTION_ELSE_NESTED(95)
clrrdi r6,r8,40 /* get its 1T ESID */
clrrdi r9,r1,40 /* get current sp 1T ESID */
-END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
+ ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_1T_SEGMENT, 95)
+FTR_SECTION_ELSE
+ b 2f
+ALT_FTR_SECTION_END_IFSET(CPU_FTR_SLB)
clrldi. r0,r6,2 /* is new ESID c00000000? */
cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
cror eq,4*cr1+eq,eq
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 821e152..a088c06 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -24,6 +24,29 @@
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
+#ifdef CONFIG_VSX
+#define REST_32FPVSRS(n,c,base) \
+BEGIN_FTR_SECTION \
+ b 2f; \
+END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
+ REST_32FPRS(n,base); \
+ b 3f; \
+2: REST_32VSRS(n,c,base); \
+3:
+
+#define SAVE_32FPVSRS(n,c,base) \
+BEGIN_FTR_SECTION \
+ b 2f; \
+END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
+ SAVE_32FPRS(n,base); \
+ b 3f; \
+2: SAVE_32VSRS(n,c,base); \
+3:
+#else
+#define REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)
+#define SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base)
+#endif
+
/*
* This task wants to use the FPU now.
* On UP, disable FP for the task which had the FPU previously,
@@ -34,6 +57,11 @@
_GLOBAL(load_up_fpu)
mfmsr r5
ori r5,r5,MSR_FP
+#ifdef CONFIG_VSX
+BEGIN_FTR_SECTION
+ oris r5,r5,MSR_VSX@h
+END_FTR_SECTION_IFSET(CPU_FTR_VSX)
+#endif
SYNC
MTMSRD(r5) /* enable use of fpu now */
isync
@@ -50,7 +78,7 @@
beq 1f
toreal(r4)
addi r4,r4,THREAD /* want last_task_used_math->thread */
- SAVE_32FPRS(0, r4)
+ SAVE_32FPVSRS(0, r5, r4)
mffs fr0
stfd fr0,THREAD_FPSCR(r4)
PPC_LL r5,PT_REGS(r4)
@@ -77,7 +105,7 @@
#endif
lfd fr0,THREAD_FPSCR(r5)
MTFSF_L(fr0)
- REST_32FPRS(0, r5)
+ REST_32FPVSRS(0, r4, r5)
#ifndef CONFIG_SMP
subi r4,r5,THREAD
fromreal(r4)
@@ -85,7 +113,7 @@
#endif /* CONFIG_SMP */
/* restore registers and return */
/* we haven't used ctr or xer or lr */
- b fast_exception_return
+ blr
/*
* giveup_fpu(tsk)
@@ -96,6 +124,11 @@
_GLOBAL(giveup_fpu)
mfmsr r5
ori r5,r5,MSR_FP
+#ifdef CONFIG_VSX
+BEGIN_FTR_SECTION
+ oris r5,r5,MSR_VSX@h
+END_FTR_SECTION_IFSET(CPU_FTR_VSX)
+#endif
SYNC_601
ISYNC_601
MTMSRD(r5) /* enable use of fpu now */
@@ -106,7 +139,7 @@
addi r3,r3,THREAD /* want THREAD of task */
PPC_LL r5,PT_REGS(r3)
PPC_LCMPI 0,r5,0
- SAVE_32FPRS(0, r3)
+ SAVE_32FPVSRS(0, r4 ,r3)
mffs fr0
stfd fr0,THREAD_FPSCR(r3)
beq 1f
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 785af9b..99ee2f0 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -421,8 +421,10 @@
b ProgramCheck
END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE)
EXCEPTION_PROLOG
- bne load_up_fpu /* if from user, just load it up */
- addi r3,r1,STACK_FRAME_OVERHEAD
+ beq 1f
+ bl load_up_fpu /* if from user, just load it up */
+ b fast_exception_return
+1: addi r3,r1,STACK_FRAME_OVERHEAD
EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
/* Decrementer */
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 8552e67..56d8e5d 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -93,6 +93,12 @@
.space 4
_ENTRY(crit_r11)
.space 4
+_ENTRY(crit_srr0)
+ .space 4
+_ENTRY(crit_srr1)
+ .space 4
+_ENTRY(saved_ksp_limit)
+ .space 4
/*
* Exception vector entry code. This code runs with address translation
@@ -148,14 +154,14 @@
mfcr r10; /* save CR in r10 for now */\
mfspr r11,SPRN_SRR3; /* check whether user or kernel */\
andi. r11,r11,MSR_PR; \
- lis r11,critical_stack_top@h; \
- ori r11,r11,critical_stack_top@l; \
+ lis r11,critirq_ctx@ha; \
+ tophys(r11,r11); \
+ lwz r11,critirq_ctx@l(r11); \
beq 1f; \
/* COMING FROM USER MODE */ \
mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
- addi r11,r11,THREAD_SIZE; \
-1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\
+1: addi r11,r11,THREAD_SIZE-INT_FRAME_SIZE; /* Alloc an excpt frm */\
tophys(r11,r11); \
stw r10,_CCR(r11); /* save various registers */\
stw r12,GPR12(r11); \
@@ -996,16 +1002,6 @@
swapper_pg_dir:
.space PGD_TABLE_SIZE
-
-/* Stack for handling critical exceptions from kernel mode */
- .section .bss
- .align 12
-exception_stack_bottom:
- .space 4096
-critical_stack_top:
- .globl exception_stack_top
-exception_stack_top:
-
/* Room for two PTE pointers, usually the kernel and current user pointers
* to their respective root page table.
*/
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 22b5d2c..f3a1ea9 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -293,119 +293,9 @@
MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception)
/* Data Storage Interrupt */
- START_EXCEPTION(DataStorage)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
- mtspr SPRN_SPRG4W, r12
- mtspr SPRN_SPRG5W, r13
- mfcr r11
- mtspr SPRN_SPRG7W, r11
+ DATA_STORAGE_EXCEPTION
- /*
- * Check if it was a store fault, if not then bail
- * because a user tried to access a kernel or
- * read-protected page. Otherwise, get the
- * offending address and handle it.
- */
- mfspr r10, SPRN_ESR
- andis. r10, r10, ESR_ST@h
- beq 2f
-
- mfspr r10, SPRN_DEAR /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, PAGE_OFFSET@h
- cmplw r10, r11
- blt+ 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
-
- mfspr r12,SPRN_MMUCR
- rlwinm r12,r12,0,0,23 /* Clear TID */
-
- b 4f
-
- /* Get the PGD for the current thread */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-
- /* Load PID into MMUCR TID */
- mfspr r12,SPRN_MMUCR /* Get MMUCR */
- mfspr r13,SPRN_PID /* Get PID */
- rlwimi r12,r13,0,24,31 /* Set TID */
-
-4:
- mtspr SPRN_MMUCR,r12
-
- rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
- lwzx r11, r12, r11 /* Get pgd/pmd entry */
- rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
- lwz r11, 4(r12) /* Get pte entry */
-
- andi. r13, r11, _PAGE_RW /* Is it writeable? */
- beq 2f /* Bail if not */
-
- /* Update 'changed'.
- */
- ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
- stw r11, 4(r12) /* Update Linux page table */
-
- li r13, PPC44x_TLB_SR@l /* Set SR */
- rlwimi r13, r11, 29, 29, 29 /* SX = _PAGE_HWEXEC */
- rlwimi r13, r11, 0, 30, 30 /* SW = _PAGE_RW */
- rlwimi r13, r11, 29, 28, 28 /* UR = _PAGE_USER */
- rlwimi r12, r11, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */
- rlwimi r12, r11, 29, 30, 30 /* (_PAGE_USER>>3)->r12 */
- and r12, r12, r11 /* HWEXEC/RW & USER */
- rlwimi r13, r12, 0, 26, 26 /* UX = HWEXEC & USER */
- rlwimi r13, r12, 3, 27, 27 /* UW = RW & USER */
-
- rlwimi r11,r13,0,26,31 /* Insert static perms */
-
- /*
- * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
- * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
- * include/asm-powerpc/pgtable-ppc32.h for details).
- */
- rlwinm r11,r11,0,20,10
-
- /* find the TLB index that caused the fault. It has to be here. */
- tlbsx r10, 0, r10
-
- tlbwe r11, r10, PPC44x_TLB_ATTRIB /* Write ATTRIB */
-
- /* Done...restore registers and get out of here.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
-
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- rfi /* Force context change */
-
-2:
- /*
- * The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
-
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b data_access
-
- /* Instruction Storage Interrupt */
+ /* Instruction Storage Interrupt */
INSTRUCTION_STORAGE_EXCEPTION
/* External Input Interrupt */
@@ -423,7 +313,6 @@
#else
EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
#endif
-
/* System Call Interrupt */
START_EXCEPTION(SystemCall)
NORMAL_EXCEPTION_PROLOG
@@ -484,18 +373,57 @@
4:
mtspr SPRN_MMUCR,r12
+ /* Mask of required permission bits. Note that while we
+ * do copy ESR:ST to _PAGE_RW position as trying to write
+ * to an RO page is pretty common, we don't do it with
+ * _PAGE_DIRTY. We could do it, but it's a fairly rare
+ * event so I'd rather take the overhead when it happens
+ * rather than adding an instruction here. We should measure
+ * whether the whole thing is worth it in the first place
+ * as we could avoid loading SPRN_ESR completely in the first
+ * place...
+ *
+ * TODO: Is it worth doing that mfspr & rlwimi in the first
+ * place or can we save a couple of instructions here ?
+ */
+ mfspr r12,SPRN_ESR
+ li r13,_PAGE_PRESENT|_PAGE_ACCESSED
+ rlwimi r13,r12,10,30,30
+
+ /* Load the PTE */
rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
lwzx r11, r12, r11 /* Get pgd/pmd entry */
rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
beq 2f /* Bail if no table */
rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
- lwz r11, 4(r12) /* Get pte entry */
- andi. r13, r11, _PAGE_PRESENT /* Is the page present? */
- beq 2f /* Bail if not present */
+ lwz r11, 0(r12) /* Get high word of pte entry */
+ lwz r12, 4(r12) /* Get low word of pte entry */
- ori r11, r11, _PAGE_ACCESSED
- stw r11, 4(r12)
+ lis r10,tlb_44x_index@ha
+
+ andc. r13,r13,r12 /* Check permission */
+
+ /* Load the next available TLB index */
+ lwz r13,tlb_44x_index@l(r10)
+
+ bne 2f /* Bail if permission mismach */
+
+ /* Increment, rollover, and store TLB index */
+ addi r13,r13,1
+
+ /* Compare with watermark (instruction gets patched) */
+ .globl tlb_44x_patch_hwater_D
+tlb_44x_patch_hwater_D:
+ cmpwi 0,r13,1 /* reserve entries */
+ ble 5f
+ li r13,0
+5:
+ /* Store the next available TLB index */
+ stw r13,tlb_44x_index@l(r10)
+
+ /* Re-load the faulting address */
+ mfspr r10,SPRN_DEAR
/* Jump to common tlb load */
b finish_tlb_load
@@ -510,7 +438,7 @@
mfspr r12, SPRN_SPRG4R
mfspr r11, SPRN_SPRG1
mfspr r10, SPRN_SPRG0
- b data_access
+ b DataStorage
/* Instruction TLB Error Interrupt */
/*
@@ -554,18 +482,42 @@
4:
mtspr SPRN_MMUCR,r12
+ /* Make up the required permissions */
+ li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC
+
rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
lwzx r11, r12, r11 /* Get pgd/pmd entry */
rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
beq 2f /* Bail if no table */
rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
- lwz r11, 4(r12) /* Get pte entry */
- andi. r13, r11, _PAGE_PRESENT /* Is the page present? */
- beq 2f /* Bail if not present */
+ lwz r11, 0(r12) /* Get high word of pte entry */
+ lwz r12, 4(r12) /* Get low word of pte entry */
- ori r11, r11, _PAGE_ACCESSED
- stw r11, 4(r12)
+ lis r10,tlb_44x_index@ha
+
+ andc. r13,r13,r12 /* Check permission */
+
+ /* Load the next available TLB index */
+ lwz r13,tlb_44x_index@l(r10)
+
+ bne 2f /* Bail if permission mismach */
+
+ /* Increment, rollover, and store TLB index */
+ addi r13,r13,1
+
+ /* Compare with watermark (instruction gets patched) */
+ .globl tlb_44x_patch_hwater_I
+tlb_44x_patch_hwater_I:
+ cmpwi 0,r13,1 /* reserve entries */
+ ble 5f
+ li r13,0
+5:
+ /* Store the next available TLB index */
+ stw r13,tlb_44x_index@l(r10)
+
+ /* Re-load the faulting address */
+ mfspr r10,SPRN_SRR0
/* Jump to common TLB load point */
b finish_tlb_load
@@ -587,86 +539,40 @@
/*
* Local functions
- */
- /*
- * Data TLB exceptions will bail out to this point
- * if they can't resolve the lightweight TLB fault.
- */
-data_access:
- NORMAL_EXCEPTION_PROLOG
- mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
- stw r5,_ESR(r11)
- mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
- EXC_XFER_EE_LITE(0x0300, handle_page_fault)
+ */
/*
* Both the instruction and data TLB miss get to this
* point to load the TLB.
* r10 - EA of fault
- * r11 - available to use
- * r12 - Pointer to the 64-bit PTE
- * r13 - available to use
+ * r11 - PTE high word value
+ * r12 - PTE low word value
+ * r13 - TLB index
* MMUCR - loaded with proper value when we get here
* Upon exit, we reload everything and RFI.
*/
finish_tlb_load:
- /*
- * We set execute, because we don't have the granularity to
- * properly set this at the page level (Linux problem).
- * If shared is set, we cause a zero PID->TID load.
- * Many of these bits are software only. Bits we don't set
- * here we (properly should) assume have the appropriate value.
- */
-
- /* Load the next available TLB index */
- lis r13, tlb_44x_index@ha
- lwz r13, tlb_44x_index@l(r13)
- /* Load the TLB high watermark */
- lis r11, tlb_44x_hwater@ha
- lwz r11, tlb_44x_hwater@l(r11)
-
- /* Increment, rollover, and store TLB index */
- addi r13, r13, 1
- cmpw 0, r13, r11 /* reserve entries */
- ble 7f
- li r13, 0
-7:
- /* Store the next available TLB index */
- lis r11, tlb_44x_index@ha
- stw r13, tlb_44x_index@l(r11)
-
- lwz r11, 0(r12) /* Get MS word of PTE */
- lwz r12, 4(r12) /* Get LS word of PTE */
- rlwimi r11, r12, 0, 0 , 19 /* Insert RPN */
- tlbwe r11, r13, PPC44x_TLB_XLAT /* Write XLAT */
+ /* Combine RPN & ERPN an write WS 0 */
+ rlwimi r11,r12,0,0,19
+ tlbwe r11,r13,PPC44x_TLB_XLAT
/*
- * Create PAGEID. This is the faulting address,
+ * Create WS1. This is the faulting address (EPN),
* page size, and valid flag.
*/
- li r11, PPC44x_TLB_VALID | PPC44x_TLB_4K
- rlwimi r10, r11, 0, 20, 31 /* Insert valid and page size */
- tlbwe r10, r13, PPC44x_TLB_PAGEID /* Write PAGEID */
+ li r11,PPC44x_TLB_VALID | PPC44x_TLB_4K
+ rlwimi r10,r11,0,20,31 /* Insert valid and page size*/
+ tlbwe r10,r13,PPC44x_TLB_PAGEID /* Write PAGEID */
- li r10, PPC44x_TLB_SR@l /* Set SR */
- rlwimi r10, r12, 0, 30, 30 /* Set SW = _PAGE_RW */
- rlwimi r10, r12, 29, 29, 29 /* SX = _PAGE_HWEXEC */
- rlwimi r10, r12, 29, 28, 28 /* UR = _PAGE_USER */
- rlwimi r11, r12, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */
- and r11, r12, r11 /* HWEXEC & USER */
- rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */
-
- rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
-
- /*
- * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
- * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
- * include/asm-powerpc/pgtable-ppc32.h for details).
- */
- rlwinm r12, r12, 0, 20, 10
-
- tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
+ /* And WS 2 */
+ li r10,0xf85 /* Mask to apply from PTE */
+ rlwimi r10,r12,29,30,30 /* DIRTY -> SW position */
+ and r11,r12,r10 /* Mask PTE bits to keep */
+ andi. r10,r12,_PAGE_USER /* User page ? */
+ beq 1f /* nope, leave U bits empty */
+ rlwimi r11,r11,3,26,28 /* yes, copy S bits to U */
+1: tlbwe r11,r13,PPC44x_TLB_ATTRIB /* Write ATTRIB */
/* Done...restore registers and get out of here.
*/
@@ -742,15 +648,6 @@
swapper_pg_dir:
.space PGD_TABLE_SIZE
-/* Reserved 4k for the critical exception stack & 4k for the machine
- * check stack per CPU for kernel mode exceptions */
- .section .bss
- .align 12
-exception_stack_bottom:
- .space BOOKE_EXCEPTION_STACK_SIZE
- .globl exception_stack_top
-exception_stack_top:
-
/*
* Room for two PTE pointers, usually the kernel and current user pointers
* to their respective root page table.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 25e84c0..cc8fb47 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -275,7 +275,11 @@
. = 0xf00
b performance_monitor_pSeries
- STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable)
+ . = 0xf20
+ b altivec_unavailable_pSeries
+
+ . = 0xf40
+ b vsx_unavailable_pSeries
#ifdef CONFIG_CBE_RAS
HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error)
@@ -295,6 +299,8 @@
/* moved from 0xf00 */
STD_EXCEPTION_PSERIES(., performance_monitor)
+ STD_EXCEPTION_PSERIES(., altivec_unavailable)
+ STD_EXCEPTION_PSERIES(., vsx_unavailable)
/*
* An interrupt came in while soft-disabled; clear EE in SRR1,
@@ -739,7 +745,8 @@
ENABLE_INTS
bl .kernel_fp_unavailable_exception
BUG_OPCODE
-1: b .load_up_fpu
+1: bl .load_up_fpu
+ b fast_exception_return
.align 7
.globl altivec_unavailable_common
@@ -747,7 +754,10 @@
EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
#ifdef CONFIG_ALTIVEC
BEGIN_FTR_SECTION
- bne .load_up_altivec /* if from user, just load it up */
+ beq 1f
+ bl .load_up_altivec
+ b fast_exception_return
+1:
END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
#endif
bl .save_nvgprs
@@ -827,9 +837,70 @@
std r4,0(r3)
#endif /* CONFIG_SMP */
/* restore registers and return */
- b fast_exception_return
+ blr
#endif /* CONFIG_ALTIVEC */
+ .align 7
+ .globl vsx_unavailable_common
+vsx_unavailable_common:
+ EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
+#ifdef CONFIG_VSX
+BEGIN_FTR_SECTION
+ bne .load_up_vsx
+1:
+END_FTR_SECTION_IFSET(CPU_FTR_VSX)
+#endif
+ bl .save_nvgprs
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ ENABLE_INTS
+ bl .vsx_unavailable_exception
+ b .ret_from_except
+
+#ifdef CONFIG_VSX
+/*
+ * load_up_vsx(unused, unused, tsk)
+ * Disable VSX for the task which had it previously,
+ * and save its vector registers in its thread_struct.
+ * Reuse the fp and vsx saves, but first check to see if they have
+ * been saved already.
+ * On entry: r13 == 'current' && last_task_used_vsx != 'current'
+ */
+_STATIC(load_up_vsx)
+/* Load FP and VSX registers if they haven't been done yet */
+ andi. r5,r12,MSR_FP
+ beql+ load_up_fpu /* skip if already loaded */
+ andis. r5,r12,MSR_VEC@h
+ beql+ load_up_altivec /* skip if already loaded */
+
+#ifndef CONFIG_SMP
+ ld r3,last_task_used_vsx@got(r2)
+ ld r4,0(r3)
+ cmpdi 0,r4,0
+ beq 1f
+ /* Disable VSX for last_task_used_vsx */
+ addi r4,r4,THREAD
+ ld r5,PT_REGS(r4)
+ ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+ lis r6,MSR_VSX@h
+ andc r6,r4,r6
+ std r6,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#endif /* CONFIG_SMP */
+ ld r4,PACACURRENT(r13)
+ addi r4,r4,THREAD /* Get THREAD */
+ li r6,1
+ stw r6,THREAD_USED_VSR(r4) /* ... also set thread used vsr */
+ /* enable use of VSX after return */
+ oris r12,r12,MSR_VSX@h
+ std r12,_MSR(r1)
+#ifndef CONFIG_SMP
+ /* Update last_task_used_math to 'current' */
+ ld r4,PACACURRENT(r13)
+ std r4,0(r3)
+#endif /* CONFIG_SMP */
+ b fast_exception_return
+#endif /* CONFIG_VSX */
+
/*
* Hash table stuff
*/
@@ -1127,7 +1198,6 @@
3: HMT_LOW
lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
/* start. */
- sync
#ifndef CONFIG_SMP
b 3b /* Never go on non-SMP */
@@ -1135,6 +1205,8 @@
cmpwi 0,r23,0
beq 3b /* Loop until told to go */
+ sync /* order paca.run and cur_cpu_spec */
+
/* See if we need to call a cpu state restore handler */
LOAD_REG_IMMEDIATE(r23, cur_cpu_spec)
ld r23,0(r23)
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index aefafc6..fce2df9 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -43,9 +43,7 @@
SAVE_2GPRS(7, r11)
/* To handle the additional exception priority levels on 40x and Book-E
- * processors we allocate a 4k stack per additional priority level. The various
- * head_xxx.S files allocate space (exception_stack_top) for each priority's
- * stack times the number of CPUs
+ * processors we allocate a stack per additional priority level.
*
* On 40x critical is the only additional level
* On 44x/e500 we have critical and machine check
@@ -61,36 +59,37 @@
* going to critical or their own debug level we aren't currently
* providing configurations that micro-optimize space usage.
*/
-#ifdef CONFIG_44x
-#define NUM_EXCEPTION_LVLS 2
-#else
-#define NUM_EXCEPTION_LVLS 3
-#endif
-#define BOOKE_EXCEPTION_STACK_SIZE (4096 * NUM_EXCEPTION_LVLS)
/* CRIT_SPRG only used in critical exception handling */
#define CRIT_SPRG SPRN_SPRG2
/* MCHECK_SPRG only used in machine check exception handling */
#define MCHECK_SPRG SPRN_SPRG6W
-#define MCHECK_STACK_TOP (exception_stack_top - 4096)
-#define CRIT_STACK_TOP (exception_stack_top)
+#define MCHECK_STACK_BASE mcheckirq_ctx
+#define CRIT_STACK_BASE critirq_ctx
-/* only on e200 for now */
-#define DEBUG_STACK_TOP (exception_stack_top - 8192)
+/* only on e500mc/e200 */
+#define DEBUG_STACK_BASE dbgirq_ctx
+#ifdef CONFIG_PPC_E500MC
+#define DEBUG_SPRG SPRN_SPRG9
+#else
#define DEBUG_SPRG SPRN_SPRG6W
+#endif
+
+#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
#ifdef CONFIG_SMP
#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
mfspr r8,SPRN_PIR; \
- mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \
- neg r8,r8; \
- addis r8,r8,level##_STACK_TOP@ha; \
- addi r8,r8,level##_STACK_TOP@l
+ slwi r8,r8,2; \
+ addis r8,r8,level##_STACK_BASE@ha; \
+ lwz r8,level##_STACK_BASE@l(r8); \
+ addi r8,r8,EXC_LVL_FRAME_OVERHEAD;
#else
#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
- lis r8,level##_STACK_TOP@h; \
- ori r8,r8,level##_STACK_TOP@l
+ lis r8,level##_STACK_BASE@ha; \
+ lwz r8,level##_STACK_BASE@l(r8); \
+ addi r8,r8,EXC_LVL_FRAME_OVERHEAD;
#endif
/*
@@ -104,22 +103,36 @@
#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \
mtspr exc_level##_SPRG,r8; \
BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \
- stw r10,GPR10-INT_FRAME_SIZE(r8); \
- stw r11,GPR11-INT_FRAME_SIZE(r8); \
- mfcr r10; /* save CR in r10 for now */\
- mfspr r11,exc_level_srr1; /* check whether user or kernel */\
- andi. r11,r11,MSR_PR; \
- mr r11,r8; \
- mfspr r8,exc_level##_SPRG; \
- beq 1f; \
- /* COMING FROM USER MODE */ \
+ stw r9,GPR9(r8); /* save various registers */\
+ mfcr r9; /* save CR in r9 for now */\
+ stw r10,GPR10(r8); \
+ stw r11,GPR11(r8); \
+ stw r9,_CCR(r8); /* save CR on stack */\
+ mfspr r10,exc_level_srr1; /* check whether user or kernel */\
+ andi. r10,r10,MSR_PR; \
mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
- addi r11,r11,THREAD_SIZE; \
-1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\
- stw r10,_CCR(r11); /* save various registers */\
- stw r12,GPR12(r11); \
+ addi r11,r11,EXC_LVL_FRAME_OVERHEAD; /* allocate stack frame */\
+ beq 1f; \
+ /* COMING FROM USER MODE */ \
+ stw r9,_CCR(r11); /* save CR */\
+ lwz r10,GPR10(r8); /* copy regs from exception stack */\
+ lwz r9,GPR9(r8); \
+ stw r10,GPR10(r11); \
+ lwz r10,GPR11(r8); \
stw r9,GPR9(r11); \
+ stw r10,GPR11(r11); \
+ b 2f; \
+ /* COMING FROM PRIV MODE */ \
+1: lwz r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r11); \
+ lwz r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r11); \
+ stw r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r8); \
+ stw r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r8); \
+ lwz r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r11); \
+ stw r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r8); \
+ mr r11,r8; \
+2: mfspr r8,exc_level##_SPRG; \
+ stw r12,GPR12(r11); /* save various registers */\
mflr r10; \
stw r10,_LINK(r11); \
mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\
@@ -231,7 +244,7 @@
* the code where the exception occurred (since exception entry \
* doesn't turn off DE automatically). We simulate the effect \
* of turning off DE on entry to an exception handler by turning \
- * off DE in the CSRR1 value and clearing the debug status. \
+ * off DE in the DSRR1 value and clearing the debug status. \
*/ \
mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \
andis. r10,r10,DBSR_IC@h; \
@@ -262,17 +275,17 @@
lwz r12,GPR12(r11); \
mtspr DEBUG_SPRG,r8; \
BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \
- lwz r10,GPR10-INT_FRAME_SIZE(r8); \
- lwz r11,GPR11-INT_FRAME_SIZE(r8); \
+ lwz r10,GPR10(r8); \
+ lwz r11,GPR11(r8); \
mfspr r8,DEBUG_SPRG; \
\
RFDI; \
b .; \
\
- /* continue normal handling for a critical exception... */ \
+ /* continue normal handling for a debug exception... */ \
2: mfspr r4,SPRN_DBSR; \
addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
+ EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
#define DEBUG_CRIT_EXCEPTION \
START_EXCEPTION(DebugCrit); \
@@ -315,8 +328,8 @@
lwz r12,GPR12(r11); \
mtspr CRIT_SPRG,r8; \
BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \
- lwz r10,GPR10-INT_FRAME_SIZE(r8); \
- lwz r11,GPR11-INT_FRAME_SIZE(r8); \
+ lwz r10,GPR10(r8); \
+ lwz r11,GPR11(r8); \
mfspr r8,CRIT_SPRG; \
\
rfci; \
@@ -327,6 +340,14 @@
addi r3,r1,STACK_FRAME_OVERHEAD; \
EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
+#define DATA_STORAGE_EXCEPTION \
+ START_EXCEPTION(DataStorage) \
+ NORMAL_EXCEPTION_PROLOG; \
+ mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \
+ stw r5,_ESR(r11); \
+ mfspr r4,SPRN_DEAR; /* Grab the DEAR */ \
+ EXC_XFER_EE_LITE(0x0300, handle_page_fault)
+
#define INSTRUCTION_STORAGE_EXCEPTION \
START_EXCEPTION(InstructionStorage) \
NORMAL_EXCEPTION_PROLOG; \
@@ -363,8 +384,31 @@
#define FP_UNAVAILABLE_EXCEPTION \
START_EXCEPTION(FloatingPointUnavailable) \
NORMAL_EXCEPTION_PROLOG; \
- bne load_up_fpu; /* if from user, just load it up */ \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
+ beq 1f; \
+ bl load_up_fpu; /* if from user, just load it up */ \
+ b fast_exception_return; \
+1: addi r3,r1,STACK_FRAME_OVERHEAD; \
EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
+#ifndef __ASSEMBLY__
+struct exception_regs {
+ unsigned long mas0;
+ unsigned long mas1;
+ unsigned long mas2;
+ unsigned long mas3;
+ unsigned long mas6;
+ unsigned long mas7;
+ unsigned long srr0;
+ unsigned long srr1;
+ unsigned long csrr0;
+ unsigned long csrr1;
+ unsigned long dsrr0;
+ unsigned long dsrr1;
+ unsigned long saved_ksp_limit;
+};
+
+/* ensure this structure is always sized to a multiple of the stack alignment */
+#define STACK_EXC_LVL_FRAME_SIZE _ALIGN_UP(sizeof (struct exception_regs), 16)
+
+#endif /* __ASSEMBLY__ */
#endif /* __HEAD_BOOKE_H__ */
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index e581524..c426850 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -39,6 +39,7 @@
#include <asm/thread_info.h>
#include <asm/ppc_asm.h>
#include <asm/asm-offsets.h>
+#include <asm/cache.h>
#include "head_booke.h"
/* As with the other PowerPC ports, it is expected that when code
@@ -304,7 +305,7 @@
SET_IVOR(13, DataTLBError);
SET_IVOR(14, InstructionTLBError);
SET_IVOR(15, DebugDebug);
-#if defined(CONFIG_E500)
+#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
SET_IVOR(15, DebugCrit);
#endif
SET_IVOR(32, SPEUnavailable);
@@ -313,6 +314,9 @@
#ifndef CONFIG_E200
SET_IVOR(35, PerformanceMonitor);
#endif
+#ifdef CONFIG_PPC_E500MC
+ SET_IVOR(36, Doorbell);
+#endif
/* Establish the interrupt vector base */
lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
@@ -750,10 +754,13 @@
/* Performance Monitor */
EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
+#ifdef CONFIG_PPC_E500MC
+ EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_EE)
+#endif
/* Debug Interrupt */
DEBUG_DEBUG_EXCEPTION
-#if defined(CONFIG_E500)
+#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
DEBUG_CRIT_EXCEPTION
#endif
@@ -1065,6 +1072,52 @@
isync /* Force context change */
blr
+_GLOBAL(flush_dcache_L1)
+ mfspr r3,SPRN_L1CFG0
+
+ rlwinm r5,r3,9,3 /* Extract cache block size */
+ twlgti r5,1 /* Only 32 and 64 byte cache blocks
+ * are currently defined.
+ */
+ li r4,32
+ subfic r6,r5,2 /* r6 = log2(1KiB / cache block size) -
+ * log2(number of ways)
+ */
+ slw r5,r4,r5 /* r5 = cache block size */
+
+ rlwinm r7,r3,0,0xff /* Extract number of KiB in the cache */
+ mulli r7,r7,13 /* An 8-way cache will require 13
+ * loads per set.
+ */
+ slw r7,r7,r6
+
+ /* save off HID0 and set DCFA */
+ mfspr r8,SPRN_HID0
+ ori r9,r8,HID0_DCFA@l
+ mtspr SPRN_HID0,r9
+ isync
+
+ lis r4,KERNELBASE@h
+ mtctr r7
+
+1: lwz r3,0(r4) /* Load... */
+ add r4,r4,r5
+ bdnz 1b
+
+ msync
+ lis r4,KERNELBASE@h
+ mtctr r7
+
+1: dcbf 0,r4 /* ...and flush. */
+ add r4,r4,r5
+ bdnz 1b
+
+ /* restore HID0 */
+ mtspr SPRN_HID0,r8
+ isync
+
+ blr
+
/*
* We put a few things here that have to be page-aligned. This stuff
* goes at the beginning of the data segment, which is page-aligned.
@@ -1080,15 +1133,6 @@
swapper_pg_dir:
.space PGD_TABLE_SIZE
-/* Reserved 4k for the critical exception stack & 4k for the machine
- * check stack per CPU for kernel mode exceptions */
- .section .bss
- .align 12
-exception_stack_bottom:
- .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
- .globl exception_stack_top
-exception_stack_top:
-
/*
* Room for two PTE pointers, usually the kernel and current user pointers
* to their respective root page table.
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index 9971159..9d42eb5 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -53,7 +53,7 @@
struct bus_type ibmebus_bus_type;
/* These devices will automatically be added to the bus during init */
-static struct of_device_id __initdata builtin_matches[] = {
+static struct of_device_id __initdata ibmebus_matches[] = {
{ .compatible = "IBM,lhca" },
{ .compatible = "IBM,lhea" },
{},
@@ -82,7 +82,8 @@
static dma_addr_t ibmebus_map_single(struct device *dev,
void *ptr,
size_t size,
- enum dma_data_direction direction)
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
return (dma_addr_t)(ptr);
}
@@ -90,14 +91,16 @@
static void ibmebus_unmap_single(struct device *dev,
dma_addr_t dma_addr,
size_t size,
- enum dma_data_direction direction)
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
return;
}
static int ibmebus_map_sg(struct device *dev,
struct scatterlist *sgl,
- int nents, enum dma_data_direction direction)
+ int nents, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
struct scatterlist *sg;
int i;
@@ -112,7 +115,8 @@
static void ibmebus_unmap_sg(struct device *dev,
struct scatterlist *sg,
- int nents, enum dma_data_direction direction)
+ int nents, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
return;
}
@@ -350,7 +354,7 @@
return err;
}
- err = ibmebus_create_devices(builtin_matches);
+ err = ibmebus_create_devices(ibmebus_matches);
if (err) {
device_unregister(&ibmebus_bus_device);
bus_unregister(&ibmebus_bus_type);
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S
index 01bcd52..019b02d 100644
--- a/arch/powerpc/kernel/idle_6xx.S
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -153,7 +153,7 @@
* address of current. R11 points to the exception frame (physical
* address). We have to preserve r10.
*/
-_GLOBAL(power_save_6xx_restore)
+_GLOBAL(power_save_ppc32_restore)
lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */
stw r9,_NIP(r11) /* make it do a blr */
diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S
new file mode 100644
index 0000000..0630403
--- /dev/null
+++ b/arch/powerpc/kernel/idle_e500.S
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Dave Liu <daveliu@freescale.com>
+ * copy from idle_6xx.S and modify for e500 based processor,
+ * implement the power_save function in idle.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/threads.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+ .text
+
+_GLOBAL(e500_idle)
+ rlwinm r3,r1,0,0,31-THREAD_SHIFT /* current thread_info */
+ lwz r4,TI_LOCAL_FLAGS(r3) /* set napping bit */
+ ori r4,r4,_TLF_NAPPING /* so when we take an exception */
+ stw r4,TI_LOCAL_FLAGS(r3) /* it will return to our caller */
+
+ /* Check if we can nap or doze, put HID0 mask in r3 */
+ lis r3,0
+BEGIN_FTR_SECTION
+ lis r3,HID0_DOZE@h
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
+
+BEGIN_FTR_SECTION
+ /* Now check if user enabled NAP mode */
+ lis r4,powersave_nap@ha
+ lwz r4,powersave_nap@l(r4)
+ cmpwi 0,r4,0
+ beq 1f
+ stwu r1,-16(r1)
+ mflr r0
+ stw r0,20(r1)
+ bl flush_dcache_L1
+ lwz r0,20(r1)
+ addi r1,r1,16
+ mtlr r0
+ lis r3,HID0_NAP@h
+END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
+BEGIN_FTR_SECTION
+ msync
+ li r7,L2CSR0_L2FL@l
+ mtspr SPRN_L2CSR0,r7
+2:
+ mfspr r7,SPRN_L2CSR0
+ andi. r4,r7,L2CSR0_L2FL@l
+ bne 2b
+END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP)
+1:
+ /* Go to NAP or DOZE now */
+ mfspr r4,SPRN_HID0
+ rlwinm r4,r4,0,~(HID0_DOZE|HID0_NAP|HID0_SLEEP)
+ or r4,r4,r3
+ isync
+ mtspr SPRN_HID0,r4
+ isync
+
+ mfmsr r7
+ oris r7,r7,MSR_WE@h
+ ori r7,r7,MSR_EE
+ msync
+ mtmsr r7
+ isync
+2: b 2b
+
+/*
+ * Return from NAP/DOZE mode, restore some CPU specific registers,
+ * r2 containing physical address of current.
+ * r11 points to the exception frame (physical address).
+ * We have to preserve r10.
+ */
+_GLOBAL(power_save_ppc32_restore)
+ lwz r9,_LINK(r11) /* interrupted in e500_idle */
+ stw r9,_NIP(r11) /* make it do a blr */
+
+#ifdef CONFIG_SMP
+ mfspr r12,SPRN_SPRG3
+ lwz r11,TI_CPU(r12) /* get cpu number * 4 */
+ slwi r11,r11,2
+#else
+ li r11,0
+#endif
+ b transfer_to_handler_cont
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index 0c66366..8c68ee9 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -267,11 +267,11 @@
spin_unlock_irqrestore(&(tbl->it_lock), flags);
}
-int iommu_map_sg(struct device *dev, struct scatterlist *sglist,
- int nelems, unsigned long mask,
- enum dma_data_direction direction)
+int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
+ struct scatterlist *sglist, int nelems,
+ unsigned long mask, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
- struct iommu_table *tbl = dev->archdata.dma_data;
dma_addr_t dma_next = 0, dma_addr;
unsigned long flags;
struct scatterlist *s, *outs, *segstart;
@@ -412,7 +412,8 @@
void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
- int nelems, enum dma_data_direction direction)
+ int nelems, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
struct scatterlist *sg;
unsigned long flags;
@@ -554,7 +555,7 @@
*/
dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl,
void *vaddr, size_t size, unsigned long mask,
- enum dma_data_direction direction)
+ enum dma_data_direction direction, struct dma_attrs *attrs)
{
dma_addr_t dma_handle = DMA_ERROR_CODE;
unsigned long uaddr;
@@ -587,7 +588,8 @@
}
void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
- size_t size, enum dma_data_direction direction)
+ size_t size, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
unsigned int npages;
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index dcc946e..6ac8612 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -356,9 +356,42 @@
{
if (ppc_md.init_IRQ)
ppc_md.init_IRQ();
+
+ exc_lvl_ctx_init();
+
irq_ctx_init();
}
+#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
+struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
+struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
+struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
+
+void exc_lvl_ctx_init(void)
+{
+ struct thread_info *tp;
+ int i;
+
+ for_each_possible_cpu(i) {
+ memset((void *)critirq_ctx[i], 0, THREAD_SIZE);
+ tp = critirq_ctx[i];
+ tp->cpu = i;
+ tp->preempt_count = 0;
+
+#ifdef CONFIG_BOOKE
+ memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE);
+ tp = dbgirq_ctx[i];
+ tp->cpu = i;
+ tp->preempt_count = 0;
+
+ memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE);
+ tp = mcheckirq_ctx[i];
+ tp->cpu = i;
+ tp->preempt_count = HARDIRQ_OFFSET;
+#endif
+ }
+}
+#endif
#ifdef CONFIG_IRQSTACKS
struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
@@ -465,7 +498,7 @@
host->revmap_type = revmap_type;
host->inval_irq = inval_irq;
host->ops = ops;
- host->of_node = of_node;
+ host->of_node = of_node_get(of_node);
if (host->ops->match == NULL)
host->ops->match = default_irq_host_match;
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index c176c51..4ba2af1 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -34,6 +34,13 @@
#include <asm/cacheflush.h>
#include <asm/sstep.h>
#include <asm/uaccess.h>
+#include <asm/system.h>
+
+#ifdef CONFIG_BOOKE
+#define MSR_SINGLESTEP (MSR_DE)
+#else
+#define MSR_SINGLESTEP (MSR_SE)
+#endif
DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
@@ -53,7 +60,8 @@
ret = -EINVAL;
}
- /* insn must be on a special executable page on ppc64 */
+ /* insn must be on a special executable page on ppc64. This is
+ * not explicitly required on ppc32 (right now), but it doesn't hurt */
if (!ret) {
p->ainsn.insn = get_insn_slot();
if (!p->ainsn.insn)
@@ -95,7 +103,16 @@
static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
{
- regs->msr |= MSR_SE;
+ /* We turn off async exceptions to ensure that the single step will
+ * be for the instruction we have the kprobe on, if we dont its
+ * possible we'd get the single step reported for an exception handler
+ * like Decrementer or External Interrupt */
+ regs->msr &= ~MSR_EE;
+ regs->msr |= MSR_SINGLESTEP;
+#ifdef CONFIG_BOOKE
+ regs->msr &= ~MSR_CE;
+ mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
+#endif
/*
* On powerpc we should single step on the original
@@ -158,7 +175,8 @@
kprobe_opcode_t insn = *p->ainsn.insn;
if (kcb->kprobe_status == KPROBE_HIT_SS &&
is_trap(insn)) {
- regs->msr &= ~MSR_SE;
+ /* Turn off 'trace' bits */
+ regs->msr &= ~MSR_SINGLESTEP;
regs->msr |= kcb->kprobe_saved_msr;
goto no_kprobe;
}
@@ -376,6 +394,10 @@
if (!cur)
return 0;
+ /* make sure we got here for instruction we have a kprobe on */
+ if (((unsigned long)cur->ainsn.insn + 4) != regs->nip)
+ return 0;
+
if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
kcb->kprobe_status = KPROBE_HIT_SSDONE;
cur->post_handler(cur, regs, 0);
@@ -395,10 +417,10 @@
/*
* if somebody else is singlestepping across a probe point, msr
- * will have SE set, in which case, continue the remaining processing
+ * will have DE/SE set, in which case, continue the remaining processing
* of do_debug, as if this is not a probe hit.
*/
- if (regs->msr & MSR_SE)
+ if (regs->msr & MSR_SINGLESTEP)
return 0;
return 1;
@@ -421,7 +443,7 @@
* normal page fault.
*/
regs->nip = (unsigned long)cur->addr;
- regs->msr &= ~MSR_SE;
+ regs->msr &= ~MSR_SINGLESTEP; /* Turn off 'trace' bits */
regs->msr |= kcb->kprobe_saved_msr;
if (kcb->kprobe_status == KPROBE_REENTER)
restore_previous_kprobe(kcb);
@@ -498,7 +520,7 @@
#ifdef CONFIG_PPC64
unsigned long arch_deref_entry_point(void *entry)
{
- return (unsigned long)(((func_descr_t *)entry)->entry);
+ return ((func_descr_t *)entry)->entry;
}
#endif
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 1e656b4..827a572 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -573,7 +573,7 @@
return single_open(file, lparcfg_data, NULL);
}
-const struct file_operations lparcfg_fops = {
+static const struct file_operations lparcfg_fops = {
.owner = THIS_MODULE,
.read = seq_read,
.write = lparcfg_write,
@@ -581,7 +581,7 @@
.release = single_release,
};
-int __init lparcfg_init(void)
+static int __init lparcfg_init(void)
{
struct proc_dir_entry *ent;
mode_t mode = S_IRUSR | S_IRGRP | S_IROTH;
@@ -601,7 +601,7 @@
return 0;
}
-void __exit lparcfg_cleanup(void)
+static void __exit lparcfg_cleanup(void)
{
if (proc_ppc64_lparcfg)
remove_proc_entry("lparcfg", proc_ppc64_lparcfg->parent);
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index b732b5f..a168514 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -158,7 +158,7 @@
* on calling the interrupts, but we would like to call it off irq level
* so that the interrupt controller is clean.
*/
-void kexec_smp_down(void *arg)
+static void kexec_smp_down(void *arg)
{
if (ppc_md.kexec_cpu_down)
ppc_md.kexec_cpu_down(0, 1);
@@ -249,7 +249,7 @@
* We could use a smaller stack if we don't care about anything using
* current, but that audit has not been performed.
*/
-union thread_union kexec_stack
+static union thread_union kexec_stack
__attribute__((__section__(".data.init_task"))) = { };
/* Our assembly helper, in kexec_stub.S */
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index 7b91602..85cb6f3 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -116,3 +116,8 @@
mtlr r0
mr r3,r4
blr
+
+_GLOBAL(__setup_cpu_power7)
+_GLOBAL(__restore_cpu_power7)
+ /* place holder */
+ blr
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 89aaaa6..6321ae3 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -489,7 +489,7 @@
*
* flush_icache_range(unsigned long start, unsigned long stop)
*/
-_GLOBAL(__flush_icache_range)
+_KPROBE(__flush_icache_range)
BEGIN_FTR_SECTION
blr /* for 601, do nothing */
END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 942951e..4dd70cf 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -506,6 +506,39 @@
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+/*
+ * __giveup_vsx(tsk)
+ * Disable VSX for the task given as the argument.
+ * Does NOT save vsx registers.
+ * Enables the VSX for use in the kernel on return.
+ */
+_GLOBAL(__giveup_vsx)
+ mfmsr r5
+ oris r5,r5,MSR_VSX@h
+ mtmsrd r5 /* enable use of VSX now */
+ isync
+
+ cmpdi 0,r3,0
+ beqlr- /* if no previous owner, done */
+ addi r3,r3,THREAD /* want THREAD of task */
+ ld r5,PT_REGS(r3)
+ cmpdi 0,r5,0
+ beq 1f
+ ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+ lis r3,MSR_VSX@h
+ andc r4,r4,r3 /* disable VSX for previous task */
+ std r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#ifndef CONFIG_SMP
+ li r5,0
+ ld r4,last_task_used_vsx@got(r2)
+ std r5,0(r4)
+#endif /* CONFIG_SMP */
+ blr
+
+#endif /* CONFIG_VSX */
+
/* kexec_wait(phys_cpu)
*
* wait for the flag to change, indicating this kernel is going away but
diff --git a/arch/powerpc/kernel/module.c b/arch/powerpc/kernel/module.c
new file mode 100644
index 0000000..af07003
--- /dev/null
+++ b/arch/powerpc/kernel/module.c
@@ -0,0 +1,116 @@
+/* Kernel module help for powerpc.
+ Copyright (C) 2001, 2003 Rusty Russell IBM Corporation.
+ Copyright (C) 2008 Freescale Semiconductor, Inc.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+#include <linux/module.h>
+#include <linux/elf.h>
+#include <linux/moduleloader.h>
+#include <linux/err.h>
+#include <linux/vmalloc.h>
+#include <linux/bug.h>
+#include <asm/module.h>
+#include <asm/uaccess.h>
+#include <asm/firmware.h>
+#include <linux/sort.h>
+
+#include "setup.h"
+
+LIST_HEAD(module_bug_list);
+
+void *module_alloc(unsigned long size)
+{
+ if (size == 0)
+ return NULL;
+
+ return vmalloc_exec(size);
+}
+
+/* Free memory returned from module_alloc */
+void module_free(struct module *mod, void *module_region)
+{
+ vfree(module_region);
+ /* FIXME: If module_region == mod->init_region, trim exception
+ table entries. */
+}
+
+static const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
+ const Elf_Shdr *sechdrs,
+ const char *name)
+{
+ char *secstrings;
+ unsigned int i;
+
+ secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
+ for (i = 1; i < hdr->e_shnum; i++)
+ if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0)
+ return &sechdrs[i];
+ return NULL;
+}
+
+int module_finalize(const Elf_Ehdr *hdr,
+ const Elf_Shdr *sechdrs, struct module *me)
+{
+ const Elf_Shdr *sect;
+ int err;
+
+ err = module_bug_finalize(hdr, sechdrs, me);
+ if (err)
+ return err;
+
+ /* Apply feature fixups */
+ sect = find_section(hdr, sechdrs, "__ftr_fixup");
+ if (sect != NULL)
+ do_feature_fixups(cur_cpu_spec->cpu_features,
+ (void *)sect->sh_addr,
+ (void *)sect->sh_addr + sect->sh_size);
+
+#ifdef CONFIG_PPC64
+ sect = find_section(hdr, sechdrs, "__fw_ftr_fixup");
+ if (sect != NULL)
+ do_feature_fixups(powerpc_firmware_features,
+ (void *)sect->sh_addr,
+ (void *)sect->sh_addr + sect->sh_size);
+#endif
+
+ sect = find_section(hdr, sechdrs, "__lwsync_fixup");
+ if (sect != NULL)
+ do_lwsync_fixups(cur_cpu_spec->cpu_features,
+ (void *)sect->sh_addr,
+ (void *)sect->sh_addr + sect->sh_size);
+
+ return 0;
+}
+
+void module_arch_cleanup(struct module *mod)
+{
+ module_bug_cleanup(mod);
+}
+
+struct bug_entry *module_find_bug(unsigned long bugaddr)
+{
+ struct mod_arch_specific *mod;
+ unsigned int i;
+ struct bug_entry *bug;
+
+ list_for_each_entry(mod, &module_bug_list, bug_list) {
+ bug = mod->bug_table;
+ for (i = 0; i < mod->num_bugs; ++i, ++bug)
+ if (bugaddr == bug->bug_addr)
+ return bug;
+ }
+ return NULL;
+}
diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c
index eab3138..2df91a0 100644
--- a/arch/powerpc/kernel/module_32.c
+++ b/arch/powerpc/kernel/module_32.c
@@ -34,23 +34,6 @@
#define DEBUGP(fmt , ...)
#endif
-LIST_HEAD(module_bug_list);
-
-void *module_alloc(unsigned long size)
-{
- if (size == 0)
- return NULL;
- return vmalloc(size);
-}
-
-/* Free memory returned from module_alloc */
-void module_free(struct module *mod, void *module_region)
-{
- vfree(module_region);
- /* FIXME: If module_region == mod->init_region, trim exception
- table entries. */
-}
-
/* Count how many different relocations (different symbol, different
addend) */
static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num)
@@ -325,58 +308,3 @@
}
return 0;
}
-
-static const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
- const Elf_Shdr *sechdrs,
- const char *name)
-{
- char *secstrings;
- unsigned int i;
-
- secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
- for (i = 1; i < hdr->e_shnum; i++)
- if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0)
- return &sechdrs[i];
- return NULL;
-}
-
-int module_finalize(const Elf_Ehdr *hdr,
- const Elf_Shdr *sechdrs,
- struct module *me)
-{
- const Elf_Shdr *sect;
- int err;
-
- err = module_bug_finalize(hdr, sechdrs, me);
- if (err) /* never true, currently */
- return err;
-
- /* Apply feature fixups */
- sect = find_section(hdr, sechdrs, "__ftr_fixup");
- if (sect != NULL)
- do_feature_fixups(cur_cpu_spec->cpu_features,
- (void *)sect->sh_addr,
- (void *)sect->sh_addr + sect->sh_size);
-
- return 0;
-}
-
-void module_arch_cleanup(struct module *mod)
-{
- module_bug_cleanup(mod);
-}
-
-struct bug_entry *module_find_bug(unsigned long bugaddr)
-{
- struct mod_arch_specific *mod;
- unsigned int i;
- struct bug_entry *bug;
-
- list_for_each_entry(mod, &module_bug_list, bug_list) {
- bug = mod->bug_table;
- for (i = 0; i < mod->num_bugs; ++i, ++bug)
- if (bugaddr == bug->bug_addr)
- return bug;
- }
- return NULL;
-}
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 3a82b02..ee6a298 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -24,6 +24,7 @@
#include <asm/module.h>
#include <asm/uaccess.h>
#include <asm/firmware.h>
+#include <asm/code-patching.h>
#include <linux/sort.h>
#include "setup.h"
@@ -101,22 +102,6 @@
return _count_relocs;
}
-void *module_alloc(unsigned long size)
-{
- if (size == 0)
- return NULL;
-
- return vmalloc_exec(size);
-}
-
-/* Free memory returned from module_alloc */
-void module_free(struct module *mod, void *module_region)
-{
- vfree(module_region);
- /* FIXME: If module_region == mod->init_region, trim exception
- table entries. */
-}
-
static int relacmp(const void *_x, const void *_y)
{
const Elf64_Rela *x, *y;
@@ -346,7 +331,7 @@
restore r2. */
static int restore_r2(u32 *instruction, struct module *me)
{
- if (*instruction != 0x60000000) {
+ if (*instruction != PPC_NOP_INSTR) {
printk("%s: Expect noop after relocate, got %08x\n",
me->name, *instruction);
return 0;
@@ -466,65 +451,3 @@
return 0;
}
-
-LIST_HEAD(module_bug_list);
-
-static const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
- const Elf_Shdr *sechdrs,
- const char *name)
-{
- char *secstrings;
- unsigned int i;
-
- secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
- for (i = 1; i < hdr->e_shnum; i++)
- if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0)
- return &sechdrs[i];
- return NULL;
-}
-
-int module_finalize(const Elf_Ehdr *hdr,
- const Elf_Shdr *sechdrs, struct module *me)
-{
- const Elf_Shdr *sect;
- int err;
-
- err = module_bug_finalize(hdr, sechdrs, me);
- if (err)
- return err;
-
- /* Apply feature fixups */
- sect = find_section(hdr, sechdrs, "__ftr_fixup");
- if (sect != NULL)
- do_feature_fixups(cur_cpu_spec->cpu_features,
- (void *)sect->sh_addr,
- (void *)sect->sh_addr + sect->sh_size);
-
- sect = find_section(hdr, sechdrs, "__fw_ftr_fixup");
- if (sect != NULL)
- do_feature_fixups(powerpc_firmware_features,
- (void *)sect->sh_addr,
- (void *)sect->sh_addr + sect->sh_size);
-
- return 0;
-}
-
-void module_arch_cleanup(struct module *mod)
-{
- module_bug_cleanup(mod);
-}
-
-struct bug_entry *module_find_bug(unsigned long bugaddr)
-{
- struct mod_arch_specific *mod;
- unsigned int i;
- struct bug_entry *bug;
-
- list_for_each_entry(mod, &module_bug_list, bug_list) {
- bug = mod->bug_table;
- for (i = 0; i < mod->num_bugs; ++i, ++bug)
- if (bugaddr == bug->bug_addr)
- return bug;
- }
- return NULL;
-}
diff --git a/arch/powerpc/kernel/msi.c b/arch/powerpc/kernel/msi.c
index c62d101..3bb7d3d 100644
--- a/arch/powerpc/kernel/msi.c
+++ b/arch/powerpc/kernel/msi.c
@@ -34,5 +34,5 @@
void arch_teardown_msi_irqs(struct pci_dev *dev)
{
- return ppc_md.teardown_msi_irqs(dev);
+ ppc_md.teardown_msi_irqs(dev);
}
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c
index 5748ddb..e9be908 100644
--- a/arch/powerpc/kernel/of_device.c
+++ b/arch/powerpc/kernel/of_device.c
@@ -89,54 +89,6 @@
}
EXPORT_SYMBOL(of_device_alloc);
-ssize_t of_device_get_modalias(struct of_device *ofdev,
- char *str, ssize_t len)
-{
- const char *compat;
- int cplen, i;
- ssize_t tsize, csize, repend;
-
- /* Name & Type */
- csize = snprintf(str, len, "of:N%sT%s",
- ofdev->node->name, ofdev->node->type);
-
- /* Get compatible property if any */
- compat = of_get_property(ofdev->node, "compatible", &cplen);
- if (!compat)
- return csize;
-
- /* Find true end (we tolerate multiple \0 at the end */
- for (i=(cplen-1); i>=0 && !compat[i]; i--)
- cplen--;
- if (!cplen)
- return csize;
- cplen++;
-
- /* Check space (need cplen+1 chars including final \0) */
- tsize = csize + cplen;
- repend = tsize;
-
- if (csize>=len) /* @ the limit, all is already filled */
- return tsize;
-
- if (tsize>=len) { /* limit compat list */
- cplen = len-csize-1;
- repend = len;
- }
-
- /* Copy and do char replacement */
- memcpy(&str[csize+1], compat, cplen);
- for (i=csize; i<repend; i++) {
- char c = str[i];
- if (c=='\0')
- str[i] = 'C';
- else if (c==' ')
- str[i] = '_';
- }
-
- return tsize;
-}
-
int of_device_uevent(struct device *dev, struct kobj_uevent_env *env)
{
struct of_device *ofdev;
diff --git a/arch/powerpc/kernel/ppc32.h b/arch/powerpc/kernel/ppc32.h
index 90e5627..dc16aef 100644
--- a/arch/powerpc/kernel/ppc32.h
+++ b/arch/powerpc/kernel/ppc32.h
@@ -120,6 +120,7 @@
elf_fpregset_t mc_fregs;
unsigned int mc_pad[2];
elf_vrregset_t32 mc_vregs __attribute__((__aligned__(16)));
+ elf_vsrreghalf_t32 mc_vsregs __attribute__((__aligned__(16)));
};
struct ucontext32 {
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index a8d0250..e1ea4fe 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -107,6 +107,9 @@
#ifdef CONFIG_ALTIVEC
EXPORT_SYMBOL(giveup_altivec);
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+EXPORT_SYMBOL(giveup_vsx);
+#endif /* CONFIG_VSX */
#ifdef CONFIG_SPE
EXPORT_SYMBOL(giveup_spe);
#endif /* CONFIG_SPE */
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 7de41c3..219f363 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -53,6 +53,7 @@
#ifndef CONFIG_SMP
struct task_struct *last_task_used_math = NULL;
struct task_struct *last_task_used_altivec = NULL;
+struct task_struct *last_task_used_vsx = NULL;
struct task_struct *last_task_used_spe = NULL;
#endif
@@ -104,17 +105,6 @@
}
EXPORT_SYMBOL(enable_kernel_fp);
-int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
-{
- if (!tsk->thread.regs)
- return 0;
- flush_fp_to_thread(current);
-
- memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs));
-
- return 1;
-}
-
#ifdef CONFIG_ALTIVEC
void enable_kernel_altivec(void)
{
@@ -148,37 +138,49 @@
preempt_enable();
}
}
-
-int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs)
-{
- /* ELF_NVRREG includes the VSCR and VRSAVE which we need to save
- * separately, see below */
- const int nregs = ELF_NVRREG - 2;
- elf_vrreg_t *reg;
- u32 *dest;
-
- if (tsk == current)
- flush_altivec_to_thread(tsk);
-
- reg = (elf_vrreg_t *)vrregs;
-
- /* copy the 32 vr registers */
- memcpy(reg, &tsk->thread.vr[0], nregs * sizeof(*reg));
- reg += nregs;
-
- /* copy the vscr */
- memcpy(reg, &tsk->thread.vscr, sizeof(*reg));
- reg++;
-
- /* vrsave is stored in the high 32bit slot of the final 128bits */
- memset(reg, 0, sizeof(*reg));
- dest = (u32 *)reg;
- *dest = tsk->thread.vrsave;
-
- return 1;
-}
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+#if 0
+/* not currently used, but some crazy RAID module might want to later */
+void enable_kernel_vsx(void)
+{
+ WARN_ON(preemptible());
+
+#ifdef CONFIG_SMP
+ if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
+ giveup_vsx(current);
+ else
+ giveup_vsx(NULL); /* just enable vsx for kernel - force */
+#else
+ giveup_vsx(last_task_used_vsx);
+#endif /* CONFIG_SMP */
+}
+EXPORT_SYMBOL(enable_kernel_vsx);
+#endif
+
+void giveup_vsx(struct task_struct *tsk)
+{
+ giveup_fpu(tsk);
+ giveup_altivec(tsk);
+ __giveup_vsx(tsk);
+}
+
+void flush_vsx_to_thread(struct task_struct *tsk)
+{
+ if (tsk->thread.regs) {
+ preempt_disable();
+ if (tsk->thread.regs->msr & MSR_VSX) {
+#ifdef CONFIG_SMP
+ BUG_ON(tsk != current);
+#endif
+ giveup_vsx(tsk);
+ }
+ preempt_enable();
+ }
+}
+#endif /* CONFIG_VSX */
+
#ifdef CONFIG_SPE
void enable_kernel_spe(void)
@@ -209,14 +211,6 @@
preempt_enable();
}
}
-
-int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
-{
- flush_spe_to_thread(current);
- /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */
- memcpy(evrregs, ¤t->thread.evr[0], sizeof(u32) * 35);
- return 1;
-}
#endif /* CONFIG_SPE */
#ifndef CONFIG_SMP
@@ -233,6 +227,10 @@
if (last_task_used_altivec == current)
last_task_used_altivec = NULL;
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ if (last_task_used_vsx == current)
+ last_task_used_vsx = NULL;
+#endif /* CONFIG_VSX */
#ifdef CONFIG_SPE
if (last_task_used_spe == current)
last_task_used_spe = NULL;
@@ -297,6 +295,11 @@
if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
giveup_altivec(prev);
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
+ /* VMX and FPU registers are already save here */
+ __giveup_vsx(prev);
+#endif /* CONFIG_VSX */
#ifdef CONFIG_SPE
/*
* If the previous thread used spe in the last quantum
@@ -317,6 +320,10 @@
if (new->thread.regs && last_task_used_altivec == new)
new->thread.regs->msr |= MSR_VEC;
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ if (new->thread.regs && last_task_used_vsx == new)
+ new->thread.regs->msr |= MSR_VSX;
+#endif /* CONFIG_VSX */
#ifdef CONFIG_SPE
/* Avoid the trap. On smp this this never happens since
* we don't set last_task_used_spe
@@ -417,6 +424,8 @@
{MSR_EE, "EE"},
{MSR_PR, "PR"},
{MSR_FP, "FP"},
+ {MSR_VEC, "VEC"},
+ {MSR_VSX, "VSX"},
{MSR_ME, "ME"},
{MSR_IR, "IR"},
{MSR_DR, "DR"},
@@ -484,10 +493,8 @@
* Lookup NIP late so we have the best change of getting the
* above info out without failing
*/
- printk("NIP ["REG"] ", regs->nip);
- print_symbol("%s\n", regs->nip);
- printk("LR ["REG"] ", regs->link);
- print_symbol("%s\n", regs->link);
+ printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
+ printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
#endif
show_stack(current, (unsigned long *) regs->gpr[1]);
if (!user_mode(regs))
@@ -534,6 +541,7 @@
{
flush_fp_to_thread(current);
flush_altivec_to_thread(current);
+ flush_vsx_to_thread(current);
flush_spe_to_thread(current);
}
@@ -689,6 +697,9 @@
#endif
discard_lazy_cpu_state();
+#ifdef CONFIG_VSX
+ current->thread.used_vsr = 0;
+#endif
memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
current->thread.fpscr.val = 0;
#ifdef CONFIG_ALTIVEC
@@ -971,8 +982,7 @@
newsp = stack[0];
ip = stack[STACK_FRAME_LR_SAVE];
if (!firstframe || ip != lr) {
- printk("["REG"] ["REG"] ", sp, ip);
- print_symbol("%s", ip);
+ printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
if (firstframe)
printk(" (unreliable)");
printk("\n");
@@ -987,10 +997,9 @@
&& stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
struct pt_regs *regs = (struct pt_regs *)
(sp + STACK_FRAME_OVERHEAD);
- printk("--- Exception: %lx", regs->trap);
- print_symbol(" at %s\n", regs->nip);
lr = regs->link;
- print_symbol(" LR = %s\n", lr);
+ printk("--- Exception: %lx at %pS\n LR = %pS\n",
+ regs->trap, (void *)regs->nip, (void *)lr);
firstframe = 1;
}
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 2aefe2a..87d83c5 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -609,6 +609,10 @@
{"altivec", 0, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC},
{"ibm,vmx", 1, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC},
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ /* Yes, this _really_ is ibm,vmx == 2 to enable VSX */
+ {"ibm,vmx", 2, CPU_FTR_VSX, PPC_FEATURE_HAS_VSX},
+#endif /* CONFIG_VSX */
#ifdef CONFIG_PPC64
{"ibm,dfp", 1, 0, PPC_FEATURE_HAS_DFP},
{"ibm,purr", 1, CPU_FTR_PURR, 0},
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 6d6df1e..1ea8c8d 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -620,6 +620,7 @@
#define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
#define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
#define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
+#define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */
/* Option vector 2: Open Firmware options supported */
#define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
@@ -650,6 +651,8 @@
static unsigned char ibm_architecture_vec[] = {
W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
W(0xffff0000), W(0x003e0000), /* POWER6 */
+ W(0xffff0000), W(0x003f0000), /* POWER7 */
+ W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */
W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
5 - 1, /* 5 option vectors */
@@ -658,7 +661,7 @@
3 - 2, /* length */
0, /* don't ignore, don't halt */
OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 |
- OV1_PPC_2_04 | OV1_PPC_2_05,
+ OV1_PPC_2_04 | OV1_PPC_2_05 | OV1_PPC_2_06,
/* option vector 2: Open Firmware options supported */
34 - 2, /* length */
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 2a9fe97..8feb93e 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -215,29 +215,56 @@
unsigned int pos, unsigned int count,
void *kbuf, void __user *ubuf)
{
+#ifdef CONFIG_VSX
+ double buf[33];
+ int i;
+#endif
flush_fp_to_thread(target);
+#ifdef CONFIG_VSX
+ /* copy to local buffer then write that out */
+ for (i = 0; i < 32 ; i++)
+ buf[i] = target->thread.TS_FPR(i);
+ memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
+ return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
+
+#else
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
- offsetof(struct thread_struct, fpr[32]));
+ offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
&target->thread.fpr, 0, -1);
+#endif
}
static int fpr_set(struct task_struct *target, const struct user_regset *regset,
unsigned int pos, unsigned int count,
const void *kbuf, const void __user *ubuf)
{
+#ifdef CONFIG_VSX
+ double buf[33];
+ int i;
+#endif
flush_fp_to_thread(target);
+#ifdef CONFIG_VSX
+ /* copy to local buffer then write that out */
+ i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
+ if (i)
+ return i;
+ for (i = 0; i < 32 ; i++)
+ target->thread.TS_FPR(i) = buf[i];
+ memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
+ return 0;
+#else
BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
- offsetof(struct thread_struct, fpr[32]));
+ offsetof(struct thread_struct, TS_FPR(32)));
return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
&target->thread.fpr, 0, -1);
+#endif
}
-
#ifdef CONFIG_ALTIVEC
/*
* Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
@@ -323,6 +350,56 @@
}
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+/*
+ * Currently to set and and get all the vsx state, you need to call
+ * the fp and VMX calls aswell. This only get/sets the lower 32
+ * 128bit VSX registers.
+ */
+
+static int vsr_active(struct task_struct *target,
+ const struct user_regset *regset)
+{
+ flush_vsx_to_thread(target);
+ return target->thread.used_vsr ? regset->n : 0;
+}
+
+static int vsr_get(struct task_struct *target, const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ double buf[32];
+ int ret, i;
+
+ flush_vsx_to_thread(target);
+
+ for (i = 0; i < 32 ; i++)
+ buf[i] = current->thread.fpr[i][TS_VSRLOWOFFSET];
+ ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+ buf, 0, 32 * sizeof(double));
+
+ return ret;
+}
+
+static int vsr_set(struct task_struct *target, const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ double buf[32];
+ int ret,i;
+
+ flush_vsx_to_thread(target);
+
+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+ buf, 0, 32 * sizeof(double));
+ for (i = 0; i < 32 ; i++)
+ current->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
+
+
+ return ret;
+}
+#endif /* CONFIG_VSX */
+
#ifdef CONFIG_SPE
/*
@@ -399,6 +476,9 @@
#ifdef CONFIG_ALTIVEC
REGSET_VMX,
#endif
+#ifdef CONFIG_VSX
+ REGSET_VSX,
+#endif
#ifdef CONFIG_SPE
REGSET_SPE,
#endif
@@ -422,6 +502,13 @@
.active = vr_active, .get = vr_get, .set = vr_set
},
#endif
+#ifdef CONFIG_VSX
+ [REGSET_VSX] = {
+ .core_note_type = NT_PPC_VSX, .n = 32,
+ .size = sizeof(double), .align = sizeof(double),
+ .active = vsr_active, .get = vsr_get, .set = vsr_set
+ },
+#endif
#ifdef CONFIG_SPE
[REGSET_SPE] = {
.n = 35,
@@ -728,7 +815,8 @@
tmp = ptrace_get_reg(child, (int) index);
} else {
flush_fp_to_thread(child);
- tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
+ tmp = ((unsigned long *)child->thread.fpr)
+ [TS_FPRWIDTH * (index - PT_FPR0)];
}
ret = put_user(tmp,(unsigned long __user *) data);
break;
@@ -755,7 +843,8 @@
ret = ptrace_put_reg(child, index, data);
} else {
flush_fp_to_thread(child);
- ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
+ ((unsigned long *)child->thread.fpr)
+ [TS_FPRWIDTH * (index - PT_FPR0)] = data;
ret = 0;
}
break;
@@ -820,6 +909,21 @@
sizeof(u32)),
(const void __user *) data);
#endif
+#ifdef CONFIG_VSX
+ case PTRACE_GETVSRREGS:
+ return copy_regset_to_user(child, &user_ppc_native_view,
+ REGSET_VSX,
+ 0, (32 * sizeof(vector128) +
+ sizeof(u32)),
+ (void __user *) data);
+
+ case PTRACE_SETVSRREGS:
+ return copy_regset_from_user(child, &user_ppc_native_view,
+ REGSET_VSX,
+ 0, (32 * sizeof(vector128) +
+ sizeof(u32)),
+ (const void __user *) data);
+#endif
#ifdef CONFIG_SPE
case PTRACE_GETEVRREGS:
/* Get the child spe register state. */
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 4c1de6a..67bf1a1 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -64,6 +64,11 @@
return -EPERM;
}
+/* Macros to workout the correct index for the FPR in the thread struct */
+#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1)
+#define FPRHALF(i) (((i) - PT_FPR0) & 1)
+#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) + FPRHALF(i)
+
long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
compat_ulong_t caddr, compat_ulong_t cdata)
{
@@ -122,7 +127,8 @@
* to be an array of unsigned int (32 bits) - the
* index passed in is based on this assumption.
*/
- tmp = ((unsigned int *)child->thread.fpr)[index - PT_FPR0];
+ tmp = ((unsigned int *)child->thread.fpr)
+ [FPRINDEX(index)];
}
ret = put_user((unsigned int)tmp, (u32 __user *)data);
break;
@@ -162,7 +168,8 @@
CHECK_FULL_REGS(child->thread.regs);
if (numReg >= PT_FPR0) {
flush_fp_to_thread(child);
- tmp = ((unsigned long int *)child->thread.fpr)[numReg - PT_FPR0];
+ tmp = ((unsigned long int *)child->thread.fpr)
+ [FPRINDEX(numReg)];
} else { /* register within PT_REGS struct */
tmp = ptrace_get_reg(child, numReg);
}
@@ -217,7 +224,8 @@
* to be an array of unsigned int (32 bits) - the
* index passed in is based on this assumption.
*/
- ((unsigned int *)child->thread.fpr)[index - PT_FPR0] = data;
+ ((unsigned int *)child->thread.fpr)
+ [FPRINDEX(index)] = data;
ret = 0;
}
break;
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c
index f9c6abc..1be9fe3 100644
--- a/arch/powerpc/kernel/rtas-proc.c
+++ b/arch/powerpc/kernel/rtas-proc.c
@@ -160,7 +160,7 @@
return single_open(file, ppc_rtas_sensors_show, NULL);
}
-const struct file_operations ppc_rtas_sensors_operations = {
+static const struct file_operations ppc_rtas_sensors_operations = {
.open = sensors_open,
.read = seq_read,
.llseek = seq_lseek,
@@ -172,7 +172,7 @@
return single_open(file, ppc_rtas_poweron_show, NULL);
}
-const struct file_operations ppc_rtas_poweron_operations = {
+static const struct file_operations ppc_rtas_poweron_operations = {
.open = poweron_open,
.read = seq_read,
.llseek = seq_lseek,
@@ -185,7 +185,7 @@
return single_open(file, ppc_rtas_progress_show, NULL);
}
-const struct file_operations ppc_rtas_progress_operations = {
+static const struct file_operations ppc_rtas_progress_operations = {
.open = progress_open,
.read = seq_read,
.llseek = seq_lseek,
@@ -198,7 +198,7 @@
return single_open(file, ppc_rtas_clock_show, NULL);
}
-const struct file_operations ppc_rtas_clock_operations = {
+static const struct file_operations ppc_rtas_clock_operations = {
.open = clock_open,
.read = seq_read,
.llseek = seq_lseek,
@@ -211,7 +211,7 @@
return single_open(file, ppc_rtas_tone_freq_show, NULL);
}
-const struct file_operations ppc_rtas_tone_freq_operations = {
+static const struct file_operations ppc_rtas_tone_freq_operations = {
.open = tone_freq_open,
.read = seq_read,
.llseek = seq_lseek,
@@ -224,7 +224,7 @@
return single_open(file, ppc_rtas_tone_volume_show, NULL);
}
-const struct file_operations ppc_rtas_tone_volume_operations = {
+static const struct file_operations ppc_rtas_tone_volume_operations = {
.open = tone_volume_open,
.read = seq_read,
.llseek = seq_lseek,
@@ -237,7 +237,7 @@
return single_open(file, ppc_rtas_rmo_buf_show, NULL);
}
-const struct file_operations ppc_rtas_rmo_buf_ops = {
+static const struct file_operations ppc_rtas_rmo_buf_ops = {
.open = rmo_buf_open,
.read = seq_read,
.llseek = seq_lseek,
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 647f3e8..c680f1b 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -340,8 +340,8 @@
EXPORT_SYMBOL(rtas_get_error_log_max);
-char rtas_err_buf[RTAS_ERROR_LOG_MAX];
-int rtas_last_error_token;
+static char rtas_err_buf[RTAS_ERROR_LOG_MAX];
+static int rtas_last_error_token;
/** Return a copy of the detailed error text associated with the
* most recent failed call to rtas. Because the error text
@@ -484,7 +484,7 @@
}
EXPORT_SYMBOL(rtas_busy_delay);
-int rtas_error_rc(int rtas_rc)
+static int rtas_error_rc(int rtas_rc)
{
int rc;
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index 0a5e22b..09ded5c 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -731,7 +731,7 @@
.release = validate_flash_release,
};
-int __init rtas_flash_init(void)
+static int __init rtas_flash_init(void)
{
int rc;
@@ -817,7 +817,7 @@
return rc;
}
-void __exit rtas_flash_cleanup(void)
+static void __exit rtas_flash_cleanup(void)
{
rtas_flash_term_hook = NULL;
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 3ab88a9..589a279 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -155,12 +155,12 @@
return PCIBIOS_DEVICE_NOT_FOUND;
}
-struct pci_ops rtas_pci_ops = {
+static struct pci_ops rtas_pci_ops = {
.read = rtas_pci_read_config,
.write = rtas_pci_write_config,
};
-int is_python(struct device_node *dev)
+static int is_python(struct device_node *dev)
{
const char *model = of_get_property(dev, "model", NULL);
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index db540ea..61a3f413 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -500,6 +500,7 @@
}
#endif /* CONFIG_SMP */
+#ifdef CONFIG_PCSPKR_PLATFORM
static __init int add_pcspkr(void)
{
struct device_node *np;
@@ -522,6 +523,7 @@
return ret;
}
device_initcall(add_pcspkr);
+#endif /* CONFIG_PCSPKR_PLATFORM */
void probe_machine(void)
{
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 19e8fcb..4efebe8 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -101,6 +101,10 @@
PTRRELOC(&__start___ftr_fixup),
PTRRELOC(&__stop___ftr_fixup));
+ do_lwsync_fixups(spec->cpu_features,
+ PTRRELOC(&__start___lwsync_fixup),
+ PTRRELOC(&__stop___lwsync_fixup));
+
return KERNELBASE + offset;
}
@@ -127,6 +131,11 @@
ppc_md.power_save = ppc6xx_idle;
#endif
+#ifdef CONFIG_E500
+ if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
+ cpu_has_feature(CPU_FTR_CAN_NAP))
+ ppc_md.power_save = e500_idle;
+#endif
if (ppc_md.progress)
ppc_md.progress("id mach(): done", 0x200);
}
@@ -248,6 +257,28 @@
#define irqstack_early_init()
#endif
+#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
+static void __init exc_lvl_early_init(void)
+{
+ unsigned int i;
+
+ /* interrupt stacks must be in lowmem, we get that for free on ppc32
+ * as the lmb is limited to lowmem by LMB_REAL_LIMIT */
+ for_each_possible_cpu(i) {
+ critirq_ctx[i] = (struct thread_info *)
+ __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
+#ifdef CONFIG_BOOKE
+ dbgirq_ctx[i] = (struct thread_info *)
+ __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
+ mcheckirq_ctx[i] = (struct thread_info *)
+ __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
+#endif
+ }
+}
+#else
+#define exc_lvl_early_init()
+#endif
+
/* Warning, IO base is not yet inited */
void __init setup_arch(char **cmdline_p)
{
@@ -305,6 +336,8 @@
init_mm.end_data = (unsigned long) _edata;
init_mm.brk = klimit;
+ exc_lvl_early_init();
+
irqstack_early_init();
/* set up the bootmem stuff with available memory */
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 098fd96..04d8de9 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -363,6 +363,8 @@
&__start___ftr_fixup, &__stop___ftr_fixup);
do_feature_fixups(powerpc_firmware_features,
&__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
+ do_lwsync_fixups(cur_cpu_spec->cpu_features,
+ &__start___lwsync_fixup, &__stop___lwsync_fixup);
/*
* Unflatten the device-tree passed by prom_init or kexec
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index a65a44f..ad55488 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -120,7 +120,7 @@
int ret;
int is32 = is_32bit_task();
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
+ if (current_thread_info()->local_flags & _TLF_RESTORE_SIGMASK)
oldset = ¤t->saved_sigmask;
else if (!oldset)
oldset = ¤t->blocked;
@@ -131,9 +131,10 @@
check_syscall_restart(regs, &ka, signr > 0);
if (signr <= 0) {
+ struct thread_info *ti = current_thread_info();
/* No signal to deliver -- put the saved sigmask back */
- if (test_thread_flag(TIF_RESTORE_SIGMASK)) {
- clear_thread_flag(TIF_RESTORE_SIGMASK);
+ if (ti->local_flags & _TLF_RESTORE_SIGMASK) {
+ ti->local_flags &= ~_TLF_RESTORE_SIGMASK;
sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL);
}
return 0; /* no signals delivered */
@@ -169,10 +170,9 @@
/*
* A signal was successfully delivered; the saved sigmask is in
- * its frame, and we can clear the TIF_RESTORE_SIGMASK flag.
+ * its frame, and we can clear the TLF_RESTORE_SIGMASK flag.
*/
- if (test_thread_flag(TIF_RESTORE_SIGMASK))
- clear_thread_flag(TIF_RESTORE_SIGMASK);
+ current_thread_info()->local_flags &= ~_TLF_RESTORE_SIGMASK;
}
return ret;
diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h
index 77efb3d..28f4b9f 100644
--- a/arch/powerpc/kernel/signal.h
+++ b/arch/powerpc/kernel/signal.h
@@ -24,6 +24,16 @@
siginfo_t *info, sigset_t *oldset,
struct pt_regs *regs);
+extern unsigned long copy_fpr_to_user(void __user *to,
+ struct task_struct *task);
+extern unsigned long copy_fpr_from_user(struct task_struct *task,
+ void __user *from);
+#ifdef CONFIG_VSX
+extern unsigned long copy_vsx_to_user(void __user *to,
+ struct task_struct *task);
+extern unsigned long copy_vsx_from_user(struct task_struct *task,
+ void __user *from);
+#endif
#ifdef CONFIG_PPC64
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index ad69434..3e80aa32 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -68,6 +68,13 @@
#define ucontext ucontext32
/*
+ * Userspace code may pass a ucontext which doesn't include VSX added
+ * at the end. We need to check for this case.
+ */
+#define UCONTEXTSIZEWITHOUTVSX \
+ (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
+
+/*
* Returning 0 means we return to userspace via
* ret_from_except and thus restore all user
* registers from *regs. This is what we need
@@ -243,7 +250,7 @@
current->state = TASK_INTERRUPTIBLE;
schedule();
- set_thread_flag(TIF_RESTORE_SIGMASK);
+ set_restore_sigmask();
return -ERESTARTNOHAND;
}
@@ -328,6 +335,75 @@
int abigap[56];
};
+#ifdef CONFIG_VSX
+unsigned long copy_fpr_to_user(void __user *to,
+ struct task_struct *task)
+{
+ double buf[ELF_NFPREG];
+ int i;
+
+ /* save FPR copy to local buffer then write to the thread_struct */
+ for (i = 0; i < (ELF_NFPREG - 1) ; i++)
+ buf[i] = task->thread.TS_FPR(i);
+ memcpy(&buf[i], &task->thread.fpscr, sizeof(double));
+ return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
+}
+
+unsigned long copy_fpr_from_user(struct task_struct *task,
+ void __user *from)
+{
+ double buf[ELF_NFPREG];
+ int i;
+
+ if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
+ return 1;
+ for (i = 0; i < (ELF_NFPREG - 1) ; i++)
+ task->thread.TS_FPR(i) = buf[i];
+ memcpy(&task->thread.fpscr, &buf[i], sizeof(double));
+
+ return 0;
+}
+
+unsigned long copy_vsx_to_user(void __user *to,
+ struct task_struct *task)
+{
+ double buf[ELF_NVSRHALFREG];
+ int i;
+
+ /* save FPR copy to local buffer then write to the thread_struct */
+ for (i = 0; i < ELF_NVSRHALFREG; i++)
+ buf[i] = task->thread.fpr[i][TS_VSRLOWOFFSET];
+ return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
+}
+
+unsigned long copy_vsx_from_user(struct task_struct *task,
+ void __user *from)
+{
+ double buf[ELF_NVSRHALFREG];
+ int i;
+
+ if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
+ return 1;
+ for (i = 0; i < ELF_NVSRHALFREG ; i++)
+ task->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
+ return 0;
+}
+#else
+inline unsigned long copy_fpr_to_user(void __user *to,
+ struct task_struct *task)
+{
+ return __copy_to_user(to, task->thread.fpr,
+ ELF_NFPREG * sizeof(double));
+}
+
+inline unsigned long copy_fpr_from_user(struct task_struct *task,
+ void __user *from)
+{
+ return __copy_from_user(task->thread.fpr, from,
+ ELF_NFPREG * sizeof(double));
+}
+#endif
+
/*
* Save the current user registers on the user stack.
* We only save the altivec/spe registers if the process has used
@@ -336,13 +412,13 @@
static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
int sigret)
{
+ unsigned long msr = regs->msr;
+
/* Make sure floating point registers are stored in regs */
flush_fp_to_thread(current);
- /* save general and floating-point registers */
- if (save_general_regs(regs, frame) ||
- __copy_to_user(&frame->mc_fregs, current->thread.fpr,
- ELF_NFPREG * sizeof(double)))
+ /* save general registers */
+ if (save_general_regs(regs, frame))
return 1;
#ifdef CONFIG_ALTIVEC
@@ -354,8 +430,7 @@
return 1;
/* set MSR_VEC in the saved MSR value to indicate that
frame->mc_vregs contains valid data */
- if (__put_user(regs->msr | MSR_VEC, &frame->mc_gregs[PT_MSR]))
- return 1;
+ msr |= MSR_VEC;
}
/* else assert((regs->msr & MSR_VEC) == 0) */
@@ -367,7 +442,22 @@
if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
return 1;
#endif /* CONFIG_ALTIVEC */
-
+ if (copy_fpr_to_user(&frame->mc_fregs, current))
+ return 1;
+#ifdef CONFIG_VSX
+ /*
+ * Copy VSR 0-31 upper half from thread_struct to local
+ * buffer, then write that to userspace. Also set MSR_VSX in
+ * the saved MSR value to indicate that frame->mc_vregs
+ * contains valid data
+ */
+ if (current->thread.used_vsr) {
+ __giveup_vsx(current);
+ if (copy_vsx_to_user(&frame->mc_vsregs, current))
+ return 1;
+ msr |= MSR_VSX;
+ }
+#endif /* CONFIG_VSX */
#ifdef CONFIG_SPE
/* save spe registers */
if (current->thread.used_spe) {
@@ -377,8 +467,7 @@
return 1;
/* set MSR_SPE in the saved MSR value to indicate that
frame->mc_vregs contains valid data */
- if (__put_user(regs->msr | MSR_SPE, &frame->mc_gregs[PT_MSR]))
- return 1;
+ msr |= MSR_SPE;
}
/* else assert((regs->msr & MSR_SPE) == 0) */
@@ -387,6 +476,8 @@
return 1;
#endif /* CONFIG_SPE */
+ if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
+ return 1;
if (sigret) {
/* Set up the sigreturn trampoline: li r0,sigret; sc */
if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
@@ -409,6 +500,9 @@
long err;
unsigned int save_r2 = 0;
unsigned long msr;
+#ifdef CONFIG_VSX
+ int i;
+#endif
/*
* restore general registers but not including MSR or SOFTE. Also
@@ -436,16 +530,11 @@
*/
discard_lazy_cpu_state();
- /* force the process to reload the FP registers from
- current->thread when it next does FP instructions */
- regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
- if (__copy_from_user(current->thread.fpr, &sr->mc_fregs,
- sizeof(sr->mc_fregs)))
- return 1;
-
#ifdef CONFIG_ALTIVEC
- /* force the process to reload the altivec registers from
- current->thread when it next does altivec instructions */
+ /*
+ * Force the process to reload the altivec registers from
+ * current->thread when it next does altivec instructions
+ */
regs->msr &= ~MSR_VEC;
if (msr & MSR_VEC) {
/* restore altivec registers from the stack */
@@ -459,6 +548,31 @@
if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
return 1;
#endif /* CONFIG_ALTIVEC */
+ if (copy_fpr_from_user(current, &sr->mc_fregs))
+ return 1;
+
+#ifdef CONFIG_VSX
+ /*
+ * Force the process to reload the VSX registers from
+ * current->thread when it next does VSX instruction.
+ */
+ regs->msr &= ~MSR_VSX;
+ if (msr & MSR_VSX) {
+ /*
+ * Restore altivec registers from the stack to a local
+ * buffer, then write this out to the thread_struct
+ */
+ if (copy_vsx_from_user(current, &sr->mc_vsregs))
+ return 1;
+ } else if (current->thread.used_vsr)
+ for (i = 0; i < 32 ; i++)
+ current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
+#endif /* CONFIG_VSX */
+ /*
+ * force the process to reload the FP registers from
+ * current->thread when it next does FP instructions
+ */
+ regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
#ifdef CONFIG_SPE
/* force the process to reload the spe registers from
@@ -823,12 +937,42 @@
{
unsigned char tmp;
+#ifdef CONFIG_PPC64
+ unsigned long new_msr = 0;
+
+ if (new_ctx &&
+ __get_user(new_msr, &new_ctx->uc_mcontext.mc_gregs[PT_MSR]))
+ return -EFAULT;
+ /*
+ * Check that the context is not smaller than the original
+ * size (with VMX but without VSX)
+ */
+ if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
+ return -EINVAL;
+ /*
+ * If the new context state sets the MSR VSX bits but
+ * it doesn't provide VSX state.
+ */
+ if ((ctx_size < sizeof(struct ucontext)) &&
+ (new_msr & MSR_VSX))
+ return -EINVAL;
+#ifdef CONFIG_VSX
+ /*
+ * If userspace doesn't provide enough room for VSX data,
+ * but current thread has used VSX, we don't have anywhere
+ * to store the full context back into.
+ */
+ if ((ctx_size < sizeof(struct ucontext)) &&
+ (current->thread.used_vsr && old_ctx))
+ return -EINVAL;
+#endif
+#else
/* Context size is for future use. Right now, we only make sure
* we are passed something we understand
*/
if (ctx_size < sizeof(struct ucontext))
return -EINVAL;
-
+#endif
if (old_ctx != NULL) {
struct mcontext __user *mctx;
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index da7c058..65ad925 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -112,11 +112,29 @@
#else /* CONFIG_ALTIVEC */
err |= __put_user(0, &sc->v_regs);
#endif /* CONFIG_ALTIVEC */
+ flush_fp_to_thread(current);
+ /* copy fpr regs and fpscr */
+ err |= copy_fpr_to_user(&sc->fp_regs, current);
+#ifdef CONFIG_VSX
+ /*
+ * Copy VSX low doubleword to local buffer for formatting,
+ * then out to userspace. Update v_regs to point after the
+ * VMX data.
+ */
+ if (current->thread.used_vsr) {
+ __giveup_vsx(current);
+ v_regs += ELF_NVRREG;
+ err |= copy_vsx_to_user(v_regs, current);
+ /* set MSR_VSX in the MSR value in the frame to
+ * indicate that sc->vs_reg) contains valid data.
+ */
+ msr |= MSR_VSX;
+ }
+#endif /* CONFIG_VSX */
err |= __put_user(&sc->gp_regs, &sc->regs);
WARN_ON(!FULL_REGS(regs));
err |= __copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE);
err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
- err |= __copy_to_user(&sc->fp_regs, ¤t->thread.fpr, FP_REGS_SIZE);
err |= __put_user(signr, &sc->signal);
err |= __put_user(handler, &sc->handler);
if (set != NULL)
@@ -137,29 +155,32 @@
#endif
unsigned long err = 0;
unsigned long save_r13 = 0;
- elf_greg_t *gregs = (elf_greg_t *)regs;
unsigned long msr;
+#ifdef CONFIG_VSX
int i;
+#endif
/* If this is not a signal return, we preserve the TLS in r13 */
if (!sig)
save_r13 = regs->gpr[13];
- /* copy everything before MSR */
- err |= __copy_from_user(regs, &sc->gp_regs,
- PT_MSR*sizeof(unsigned long));
-
+ /* copy the GPRs */
+ err |= __copy_from_user(regs->gpr, sc->gp_regs, sizeof(regs->gpr));
+ err |= __get_user(regs->nip, &sc->gp_regs[PT_NIP]);
/* get MSR separately, transfer the LE bit if doing signal return */
err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
if (sig)
regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
-
+ err |= __get_user(regs->orig_gpr3, &sc->gp_regs[PT_ORIG_R3]);
+ err |= __get_user(regs->ctr, &sc->gp_regs[PT_CTR]);
+ err |= __get_user(regs->link, &sc->gp_regs[PT_LNK]);
+ err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]);
+ err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]);
/* skip SOFTE */
- for (i = PT_MSR+1; i <= PT_RESULT; i++) {
- if (i == PT_SOFTE)
- continue;
- err |= __get_user(gregs[i], &sc->gp_regs[i]);
- }
+ err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]);
+ err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
+ err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
+ err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
if (!sig)
regs->gpr[13] = save_r13;
@@ -180,9 +201,7 @@
* This has to be done before copying stuff into current->thread.fpr/vr
* for the reasons explained in the previous comment.
*/
- regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC);
-
- err |= __copy_from_user(¤t->thread.fpr, &sc->fp_regs, FP_REGS_SIZE);
+ regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
#ifdef CONFIG_ALTIVEC
err |= __get_user(v_regs, &sc->v_regs);
@@ -202,7 +221,23 @@
else
current->thread.vrsave = 0;
#endif /* CONFIG_ALTIVEC */
+ /* restore floating point */
+ err |= copy_fpr_from_user(current, &sc->fp_regs);
+#ifdef CONFIG_VSX
+ /*
+ * Get additional VSX data. Update v_regs to point after the
+ * VMX data. Copy VSX low doubleword from userspace to local
+ * buffer for formatting, then into the taskstruct.
+ */
+ v_regs += ELF_NVRREG;
+ if ((msr & MSR_VSX) != 0)
+ err |= copy_vsx_from_user(current, v_regs);
+ else
+ for (i = 0; i < 32 ; i++)
+ current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
+#else
+#endif
return err;
}
@@ -233,6 +268,13 @@
}
/*
+ * Userspace code may pass a ucontext which doesn't include VSX added
+ * at the end. We need to check for this case.
+ */
+#define UCONTEXTSIZEWITHOUTVSX \
+ (sizeof(struct ucontext) - 32*sizeof(long))
+
+/*
* Handle {get,set,swap}_context operations
*/
int sys_swapcontext(struct ucontext __user *old_ctx,
@@ -241,13 +283,34 @@
{
unsigned char tmp;
sigset_t set;
+ unsigned long new_msr = 0;
- /* Context size is for future use. Right now, we only make sure
- * we are passed something we understand
+ if (new_ctx &&
+ __get_user(new_msr, &new_ctx->uc_mcontext.gp_regs[PT_MSR]))
+ return -EFAULT;
+ /*
+ * Check that the context is not smaller than the original
+ * size (with VMX but without VSX)
*/
- if (ctx_size < sizeof(struct ucontext))
+ if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
return -EINVAL;
-
+ /*
+ * If the new context state sets the MSR VSX bits but
+ * it doesn't provide VSX state.
+ */
+ if ((ctx_size < sizeof(struct ucontext)) &&
+ (new_msr & MSR_VSX))
+ return -EINVAL;
+#ifdef CONFIG_VSX
+ /*
+ * If userspace doesn't provide enough room for VSX data,
+ * but current thread has used VSX, we don't have anywhere
+ * to store the full context back into.
+ */
+ if ((ctx_size < sizeof(struct ucontext)) &&
+ (current->thread.used_vsr && old_ctx))
+ return -EINVAL;
+#endif
if (old_ctx != NULL) {
if (!access_ok(VERIFY_WRITE, old_ctx, sizeof(*old_ctx))
|| setup_sigcontext(&old_ctx->uc_mcontext, regs, 0, NULL, 0)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 5191b46..f5ae9fa 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -171,12 +171,8 @@
smp_call_function(stop_this_cpu, NULL, 0);
}
-extern struct gettimeofday_struct do_gtod;
-
struct thread_info *current_set[NR_CPUS];
-DECLARE_PER_CPU(unsigned int, pvr);
-
static void __devinit smp_store_cpu_info(int id)
{
per_cpu(pvr, id) = mfspr(SPRN_PVR);
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c
index 67d6f68..c906c4b 100644
--- a/arch/powerpc/kernel/softemu8xx.c
+++ b/arch/powerpc/kernel/softemu8xx.c
@@ -124,7 +124,7 @@
disp = instword & 0xffff;
ea = (u32 *)(regs->gpr[idxreg] + disp);
- ip = (u32 *)¤t->thread.fpr[flreg];
+ ip = (u32 *)¤t->thread.TS_FPR(flreg);
switch ( inst )
{
@@ -168,7 +168,7 @@
break;
case FMR:
/* assume this is a fp move -- Cort */
- memcpy(ip, ¤t->thread.fpr[(instword>>11)&0x1f],
+ memcpy(ip, ¤t->thread.TS_FPR((instword>>11)&0x1f),
sizeof(double));
break;
default:
diff --git a/arch/powerpc/kernel/stacktrace.c b/arch/powerpc/kernel/stacktrace.c
index 3cf0d94..071bee3 100644
--- a/arch/powerpc/kernel/stacktrace.c
+++ b/arch/powerpc/kernel/stacktrace.c
@@ -10,34 +10,35 @@
* 2 of the License, or (at your option) any later version.
*/
+#include <linux/module.h>
#include <linux/sched.h>
#include <linux/stacktrace.h>
#include <linux/module.h>
#include <asm/ptrace.h>
+#include <asm/processor.h>
/*
* Save stack-backtrace addresses into a stack_trace buffer.
*/
-void save_stack_trace(struct stack_trace *trace)
+static void save_context_stack(struct stack_trace *trace, unsigned long sp,
+ struct task_struct *tsk, int savesched)
{
- unsigned long sp;
-
- asm("mr %0,1" : "=r" (sp));
-
for (;;) {
unsigned long *stack = (unsigned long *) sp;
unsigned long newsp, ip;
- if (!validate_sp(sp, current, STACK_FRAME_OVERHEAD))
+ if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
return;
newsp = stack[0];
ip = stack[STACK_FRAME_LR_SAVE];
- if (!trace->skip)
- trace->entries[trace->nr_entries++] = ip;
- else
- trace->skip--;
+ if (savesched || !in_sched_functions(ip)) {
+ if (!trace->skip)
+ trace->entries[trace->nr_entries++] = ip;
+ else
+ trace->skip--;
+ }
if (trace->nr_entries >= trace->max_entries)
return;
@@ -45,4 +46,19 @@
sp = newsp;
}
}
+
+void save_stack_trace(struct stack_trace *trace)
+{
+ unsigned long sp;
+
+ asm("mr %0,1" : "=r" (sp));
+
+ save_context_stack(trace, sp, current, 1);
+}
EXPORT_SYMBOL_GPL(save_stack_trace);
+
+void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
+{
+ save_context_stack(trace, tsk->thread.regs->gpr[1], tsk, 0);
+}
+EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index 4fe69ca..c04832c 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -143,6 +143,9 @@
struct file * file = NULL;
unsigned long ret = -EINVAL;
+ if (!arch_validate_prot(prot))
+ goto out;
+
if (shift) {
if (off & ((1 << shift) - 1))
goto out;
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index f1a38a6..e2ee66b 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -129,7 +129,7 @@
static signed long __initdata iSeries_recal_tb;
/* Forward declaration is only needed for iSereis compiles */
-void __init clocksource_init(void);
+static void __init clocksource_init(void);
#endif
#define XSEC_PER_SEC (1024*1024)
@@ -150,8 +150,8 @@
unsigned tb_to_us;
#define TICKLEN_SCALE NTP_SCALE_SHIFT
-u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */
-u64 ticklen_to_xs; /* 0.64 fraction */
+static u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */
+static u64 ticklen_to_xs; /* 0.64 fraction */
/* If last_tick_len corresponds to about 1/HZ seconds, then
last_tick_len << TICKLEN_SHIFT will be about 2^63. */
@@ -164,7 +164,7 @@
static unsigned tb_to_ns_shift __read_mostly;
static unsigned long boot_tb __read_mostly;
-struct gettimeofday_struct do_gtod;
+static struct gettimeofday_struct do_gtod;
extern struct timezone sys_tz;
static long timezone_offset;
@@ -742,10 +742,6 @@
}
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
- /* Set the time base to zero */
- mtspr(SPRN_TBWL, 0);
- mtspr(SPRN_TBWU, 0);
-
/* Clear any pending timer interrupts */
mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
@@ -832,7 +828,7 @@
++vdso_data->tb_update_count;
}
-void __init clocksource_init(void)
+static void __init clocksource_init(void)
{
struct clocksource *clock;
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 4b5b7ff..878fbdd 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -967,6 +967,20 @@
die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
}
+void vsx_unavailable_exception(struct pt_regs *regs)
+{
+ if (user_mode(regs)) {
+ /* A user program has executed an vsx instruction,
+ but this kernel doesn't support vsx. */
+ _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
+ return;
+ }
+
+ printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception "
+ "%lx at %lx\n", regs->trap, regs->nip);
+ die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
+}
+
void performance_monitor_exception(struct pt_regs *regs)
{
perf_irq(regs);
@@ -1030,21 +1044,29 @@
#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
-void DebugException(struct pt_regs *regs, unsigned long debug_status)
+void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
{
if (debug_status & DBSR_IC) { /* instruction completion */
regs->msr &= ~MSR_DE;
+
+ /* Disable instruction completion */
+ mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
+ /* Clear the instruction completion event */
+ mtspr(SPRN_DBSR, DBSR_IC);
+
+ if (notify_die(DIE_SSTEP, "single_step", regs, 5,
+ 5, SIGTRAP) == NOTIFY_STOP) {
+ return;
+ }
+
+ if (debugger_sstep(regs))
+ return;
+
if (user_mode(regs)) {
current->thread.dbcr0 &= ~DBCR0_IC;
- } else {
- /* Disable instruction completion */
- mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
- /* Clear the instruction completion event */
- mtspr(SPRN_DBSR, DBSR_IC);
- if (debugger_sstep(regs))
- return;
}
- _exception(SIGTRAP, regs, TRAP_TRACE, 0);
+
+ _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
}
}
#endif /* CONFIG_4xx || CONFIG_BOOKE */
@@ -1091,6 +1113,21 @@
}
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+void vsx_assist_exception(struct pt_regs *regs)
+{
+ if (!user_mode(regs)) {
+ printk(KERN_EMERG "VSX assist exception in kernel mode"
+ " at %lx\n", regs->nip);
+ die("Kernel VSX assist exception", regs, SIGILL);
+ }
+
+ flush_vsx_to_thread(current);
+ printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip);
+ _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
+}
+#endif /* CONFIG_VSX */
+
#ifdef CONFIG_FSL_BOOKE
void CacheLockingException(struct pt_regs *regs, unsigned long address,
unsigned long error_code)
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index ce245a8..f177c60 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -571,6 +571,11 @@
if (start64)
do_feature_fixups(powerpc_firmware_features,
start64, start64 + size64);
+
+ start64 = find_section64(v64->hdr, "__lwsync_fixup", &size64);
+ if (start64)
+ do_lwsync_fixups(cur_cpu_spec->cpu_features,
+ start64, start64 + size64);
#endif /* CONFIG_PPC64 */
start32 = find_section32(v32->hdr, "__ftr_fixup", &size32);
@@ -585,6 +590,11 @@
start32, start32 + size32);
#endif /* CONFIG_PPC64 */
+ start32 = find_section32(v32->hdr, "__lwsync_fixup", &size32);
+ if (start32)
+ do_lwsync_fixups(cur_cpu_spec->cpu_features,
+ start32, start32 + size32);
+
return 0;
}
diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S
index 9352ab5..be3b6a4 100644
--- a/arch/powerpc/kernel/vdso32/vdso32.lds.S
+++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S
@@ -24,7 +24,7 @@
. = ALIGN(16);
.text : {
- *(.text .stub .text.* .gnu.linkonce.t.*)
+ *(.text .stub .text.* .gnu.linkonce.t.* __ftr_alt_*)
}
PROVIDE(__etext = .);
PROVIDE(_etext = .);
@@ -33,6 +33,9 @@
. = ALIGN(8);
__ftr_fixup : { *(__ftr_fixup) }
+ . = ALIGN(8);
+ __lwsync_fixup : { *(__lwsync_fixup) }
+
#ifdef CONFIG_PPC64
. = ALIGN(8);
__fw_ftr_fixup : { *(__fw_ftr_fixup) }
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S
index 932b3fd..d0b2526 100644
--- a/arch/powerpc/kernel/vdso64/vdso64.lds.S
+++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S
@@ -24,7 +24,7 @@
. = ALIGN(16);
.text : {
- *(.text .stub .text.* .gnu.linkonce.t.*)
+ *(.text .stub .text.* .gnu.linkonce.t.* __ftr_alt_*)
*(.sfpr .glink)
} :text
PROVIDE(__etext = .);
@@ -35,6 +35,9 @@
__ftr_fixup : { *(__ftr_fixup) }
. = ALIGN(8);
+ __lwsync_fixup : { *(__lwsync_fixup) }
+
+ . = ALIGN(8);
__fw_ftr_fixup : { *(__fw_ftr_fixup) }
/*
@@ -43,15 +46,15 @@
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
.rodata1 : { *(.rodata1) }
+ .dynamic : { *(.dynamic) } :text :dynamic
+
.eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr
.eh_frame : { KEEP (*(.eh_frame)) } :text
.gcc_except_table : { *(.gcc_except_table) }
+ .rela.dyn ALIGN(8) : { *(.rela.dyn) }
.opd ALIGN(8) : { KEEP (*(.opd)) }
.got ALIGN(8) : { *(.got .toc) }
- .rela.dyn ALIGN(8) : { *(.rela.dyn) }
-
- .dynamic : { *(.dynamic) } :text :dynamic
_end = .;
PROVIDE(end = .);
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 53d57d1..87a72c6 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -35,7 +35,7 @@
ALIGN_FUNCTION();
*(.text.head)
_text = .;
- *(.text .fixup .text.init.refok .exit.text.refok)
+ *(.text .fixup .text.init.refok .exit.text.refok __ftr_alt_*)
SCHED_TEXT
LOCK_TEXT
KPROBES_TEXT
@@ -125,6 +125,12 @@
*(__ftr_fixup)
__stop___ftr_fixup = .;
}
+ . = ALIGN(8);
+ __lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) {
+ __start___lwsync_fixup = .;
+ *(__lwsync_fixup)
+ __stop___lwsync_fixup = .;
+ }
#ifdef CONFIG_PPC64
. = ALIGN(8);
__fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) {
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index e522b06..2a88e8b 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -24,3 +24,7 @@
endif
obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
+
+obj-y += code-patching.o
+obj-y += feature-fixups.o
+obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
new file mode 100644
index 0000000..0559fe0
--- /dev/null
+++ b/arch/powerpc/lib/code-patching.c
@@ -0,0 +1,448 @@
+/*
+ * Copyright 2008 Michael Ellerman, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/vmalloc.h>
+#include <linux/init.h>
+#include <asm/page.h>
+#include <asm/code-patching.h>
+
+
+void patch_instruction(unsigned int *addr, unsigned int instr)
+{
+ *addr = instr;
+ asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (addr));
+}
+
+void patch_branch(unsigned int *addr, unsigned long target, int flags)
+{
+ patch_instruction(addr, create_branch(addr, target, flags));
+}
+
+unsigned int create_branch(const unsigned int *addr,
+ unsigned long target, int flags)
+{
+ unsigned int instruction;
+ long offset;
+
+ offset = target;
+ if (! (flags & BRANCH_ABSOLUTE))
+ offset = offset - (unsigned long)addr;
+
+ /* Check we can represent the target in the instruction format */
+ if (offset < -0x2000000 || offset > 0x1fffffc || offset & 0x3)
+ return 0;
+
+ /* Mask out the flags and target, so they don't step on each other. */
+ instruction = 0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC);
+
+ return instruction;
+}
+
+unsigned int create_cond_branch(const unsigned int *addr,
+ unsigned long target, int flags)
+{
+ unsigned int instruction;
+ long offset;
+
+ offset = target;
+ if (! (flags & BRANCH_ABSOLUTE))
+ offset = offset - (unsigned long)addr;
+
+ /* Check we can represent the target in the instruction format */
+ if (offset < -0x8000 || offset > 0x7FFF || offset & 0x3)
+ return 0;
+
+ /* Mask out the flags and target, so they don't step on each other. */
+ instruction = 0x40000000 | (flags & 0x3FF0003) | (offset & 0xFFFC);
+
+ return instruction;
+}
+
+static unsigned int branch_opcode(unsigned int instr)
+{
+ return (instr >> 26) & 0x3F;
+}
+
+static int instr_is_branch_iform(unsigned int instr)
+{
+ return branch_opcode(instr) == 18;
+}
+
+static int instr_is_branch_bform(unsigned int instr)
+{
+ return branch_opcode(instr) == 16;
+}
+
+int instr_is_relative_branch(unsigned int instr)
+{
+ if (instr & BRANCH_ABSOLUTE)
+ return 0;
+
+ return instr_is_branch_iform(instr) || instr_is_branch_bform(instr);
+}
+
+static unsigned long branch_iform_target(const unsigned int *instr)
+{
+ signed long imm;
+
+ imm = *instr & 0x3FFFFFC;
+
+ /* If the top bit of the immediate value is set this is negative */
+ if (imm & 0x2000000)
+ imm -= 0x4000000;
+
+ if ((*instr & BRANCH_ABSOLUTE) == 0)
+ imm += (unsigned long)instr;
+
+ return (unsigned long)imm;
+}
+
+static unsigned long branch_bform_target(const unsigned int *instr)
+{
+ signed long imm;
+
+ imm = *instr & 0xFFFC;
+
+ /* If the top bit of the immediate value is set this is negative */
+ if (imm & 0x8000)
+ imm -= 0x10000;
+
+ if ((*instr & BRANCH_ABSOLUTE) == 0)
+ imm += (unsigned long)instr;
+
+ return (unsigned long)imm;
+}
+
+unsigned long branch_target(const unsigned int *instr)
+{
+ if (instr_is_branch_iform(*instr))
+ return branch_iform_target(instr);
+ else if (instr_is_branch_bform(*instr))
+ return branch_bform_target(instr);
+
+ return 0;
+}
+
+int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr)
+{
+ if (instr_is_branch_iform(*instr) || instr_is_branch_bform(*instr))
+ return branch_target(instr) == addr;
+
+ return 0;
+}
+
+unsigned int translate_branch(const unsigned int *dest, const unsigned int *src)
+{
+ unsigned long target;
+
+ target = branch_target(src);
+
+ if (instr_is_branch_iform(*src))
+ return create_branch(dest, target, *src);
+ else if (instr_is_branch_bform(*src))
+ return create_cond_branch(dest, target, *src);
+
+ return 0;
+}
+
+
+#ifdef CONFIG_CODE_PATCHING_SELFTEST
+
+static void __init test_trampoline(void)
+{
+ asm ("nop;\n");
+}
+
+#define check(x) \
+ if (!(x)) printk("code-patching: test failed at line %d\n", __LINE__);
+
+static void __init test_branch_iform(void)
+{
+ unsigned int instr;
+ unsigned long addr;
+
+ addr = (unsigned long)&instr;
+
+ /* The simplest case, branch to self, no flags */
+ check(instr_is_branch_iform(0x48000000));
+ /* All bits of target set, and flags */
+ check(instr_is_branch_iform(0x4bffffff));
+ /* High bit of opcode set, which is wrong */
+ check(!instr_is_branch_iform(0xcbffffff));
+ /* Middle bits of opcode set, which is wrong */
+ check(!instr_is_branch_iform(0x7bffffff));
+
+ /* Simplest case, branch to self with link */
+ check(instr_is_branch_iform(0x48000001));
+ /* All bits of targets set */
+ check(instr_is_branch_iform(0x4bfffffd));
+ /* Some bits of targets set */
+ check(instr_is_branch_iform(0x4bff00fd));
+ /* Must be a valid branch to start with */
+ check(!instr_is_branch_iform(0x7bfffffd));
+
+ /* Absolute branch to 0x100 */
+ instr = 0x48000103;
+ check(instr_is_branch_to_addr(&instr, 0x100));
+ /* Absolute branch to 0x420fc */
+ instr = 0x480420ff;
+ check(instr_is_branch_to_addr(&instr, 0x420fc));
+ /* Maximum positive relative branch, + 20MB - 4B */
+ instr = 0x49fffffc;
+ check(instr_is_branch_to_addr(&instr, addr + 0x1FFFFFC));
+ /* Smallest negative relative branch, - 4B */
+ instr = 0x4bfffffc;
+ check(instr_is_branch_to_addr(&instr, addr - 4));
+ /* Largest negative relative branch, - 32 MB */
+ instr = 0x4a000000;
+ check(instr_is_branch_to_addr(&instr, addr - 0x2000000));
+
+ /* Branch to self, with link */
+ instr = create_branch(&instr, addr, BRANCH_SET_LINK);
+ check(instr_is_branch_to_addr(&instr, addr));
+
+ /* Branch to self - 0x100, with link */
+ instr = create_branch(&instr, addr - 0x100, BRANCH_SET_LINK);
+ check(instr_is_branch_to_addr(&instr, addr - 0x100));
+
+ /* Branch to self + 0x100, no link */
+ instr = create_branch(&instr, addr + 0x100, 0);
+ check(instr_is_branch_to_addr(&instr, addr + 0x100));
+
+ /* Maximum relative negative offset, - 32 MB */
+ instr = create_branch(&instr, addr - 0x2000000, BRANCH_SET_LINK);
+ check(instr_is_branch_to_addr(&instr, addr - 0x2000000));
+
+ /* Out of range relative negative offset, - 32 MB + 4*/
+ instr = create_branch(&instr, addr - 0x2000004, BRANCH_SET_LINK);
+ check(instr == 0);
+
+ /* Out of range relative positive offset, + 32 MB */
+ instr = create_branch(&instr, addr + 0x2000000, BRANCH_SET_LINK);
+ check(instr == 0);
+
+ /* Unaligned target */
+ instr = create_branch(&instr, addr + 3, BRANCH_SET_LINK);
+ check(instr == 0);
+
+ /* Check flags are masked correctly */
+ instr = create_branch(&instr, addr, 0xFFFFFFFC);
+ check(instr_is_branch_to_addr(&instr, addr));
+ check(instr == 0x48000000);
+}
+
+static void __init test_create_function_call(void)
+{
+ unsigned int *iptr;
+ unsigned long dest;
+
+ /* Check we can create a function call */
+ iptr = (unsigned int *)ppc_function_entry(test_trampoline);
+ dest = ppc_function_entry(test_create_function_call);
+ patch_instruction(iptr, create_branch(iptr, dest, BRANCH_SET_LINK));
+ check(instr_is_branch_to_addr(iptr, dest));
+}
+
+static void __init test_branch_bform(void)
+{
+ unsigned long addr;
+ unsigned int *iptr, instr, flags;
+
+ iptr = &instr;
+ addr = (unsigned long)iptr;
+
+ /* The simplest case, branch to self, no flags */
+ check(instr_is_branch_bform(0x40000000));
+ /* All bits of target set, and flags */
+ check(instr_is_branch_bform(0x43ffffff));
+ /* High bit of opcode set, which is wrong */
+ check(!instr_is_branch_bform(0xc3ffffff));
+ /* Middle bits of opcode set, which is wrong */
+ check(!instr_is_branch_bform(0x7bffffff));
+
+ /* Absolute conditional branch to 0x100 */
+ instr = 0x43ff0103;
+ check(instr_is_branch_to_addr(&instr, 0x100));
+ /* Absolute conditional branch to 0x20fc */
+ instr = 0x43ff20ff;
+ check(instr_is_branch_to_addr(&instr, 0x20fc));
+ /* Maximum positive relative conditional branch, + 32 KB - 4B */
+ instr = 0x43ff7ffc;
+ check(instr_is_branch_to_addr(&instr, addr + 0x7FFC));
+ /* Smallest negative relative conditional branch, - 4B */
+ instr = 0x43fffffc;
+ check(instr_is_branch_to_addr(&instr, addr - 4));
+ /* Largest negative relative conditional branch, - 32 KB */
+ instr = 0x43ff8000;
+ check(instr_is_branch_to_addr(&instr, addr - 0x8000));
+
+ /* All condition code bits set & link */
+ flags = 0x3ff000 | BRANCH_SET_LINK;
+
+ /* Branch to self */
+ instr = create_cond_branch(iptr, addr, flags);
+ check(instr_is_branch_to_addr(&instr, addr));
+
+ /* Branch to self - 0x100 */
+ instr = create_cond_branch(iptr, addr - 0x100, flags);
+ check(instr_is_branch_to_addr(&instr, addr - 0x100));
+
+ /* Branch to self + 0x100 */
+ instr = create_cond_branch(iptr, addr + 0x100, flags);
+ check(instr_is_branch_to_addr(&instr, addr + 0x100));
+
+ /* Maximum relative negative offset, - 32 KB */
+ instr = create_cond_branch(iptr, addr - 0x8000, flags);
+ check(instr_is_branch_to_addr(&instr, addr - 0x8000));
+
+ /* Out of range relative negative offset, - 32 KB + 4*/
+ instr = create_cond_branch(iptr, addr - 0x8004, flags);
+ check(instr == 0);
+
+ /* Out of range relative positive offset, + 32 KB */
+ instr = create_cond_branch(iptr, addr + 0x8000, flags);
+ check(instr == 0);
+
+ /* Unaligned target */
+ instr = create_cond_branch(iptr, addr + 3, flags);
+ check(instr == 0);
+
+ /* Check flags are masked correctly */
+ instr = create_cond_branch(iptr, addr, 0xFFFFFFFC);
+ check(instr_is_branch_to_addr(&instr, addr));
+ check(instr == 0x43FF0000);
+}
+
+static void __init test_translate_branch(void)
+{
+ unsigned long addr;
+ unsigned int *p, *q;
+ void *buf;
+
+ buf = vmalloc(PAGE_ALIGN(0x2000000 + 1));
+ check(buf);
+ if (!buf)
+ return;
+
+ /* Simple case, branch to self moved a little */
+ p = buf;
+ addr = (unsigned long)p;
+ patch_branch(p, addr, 0);
+ check(instr_is_branch_to_addr(p, addr));
+ q = p + 1;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(q, addr));
+
+ /* Maximum negative case, move b . to addr + 32 MB */
+ p = buf;
+ addr = (unsigned long)p;
+ patch_branch(p, addr, 0);
+ q = buf + 0x2000000;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(p, addr));
+ check(instr_is_branch_to_addr(q, addr));
+ check(*q == 0x4a000000);
+
+ /* Maximum positive case, move x to x - 32 MB + 4 */
+ p = buf + 0x2000000;
+ addr = (unsigned long)p;
+ patch_branch(p, addr, 0);
+ q = buf + 4;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(p, addr));
+ check(instr_is_branch_to_addr(q, addr));
+ check(*q == 0x49fffffc);
+
+ /* Jump to x + 16 MB moved to x + 20 MB */
+ p = buf;
+ addr = 0x1000000 + (unsigned long)buf;
+ patch_branch(p, addr, BRANCH_SET_LINK);
+ q = buf + 0x1400000;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(p, addr));
+ check(instr_is_branch_to_addr(q, addr));
+
+ /* Jump to x + 16 MB moved to x - 16 MB + 4 */
+ p = buf + 0x1000000;
+ addr = 0x2000000 + (unsigned long)buf;
+ patch_branch(p, addr, 0);
+ q = buf + 4;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(p, addr));
+ check(instr_is_branch_to_addr(q, addr));
+
+
+ /* Conditional branch tests */
+
+ /* Simple case, branch to self moved a little */
+ p = buf;
+ addr = (unsigned long)p;
+ patch_instruction(p, create_cond_branch(p, addr, 0));
+ check(instr_is_branch_to_addr(p, addr));
+ q = p + 1;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(q, addr));
+
+ /* Maximum negative case, move b . to addr + 32 KB */
+ p = buf;
+ addr = (unsigned long)p;
+ patch_instruction(p, create_cond_branch(p, addr, 0xFFFFFFFC));
+ q = buf + 0x8000;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(p, addr));
+ check(instr_is_branch_to_addr(q, addr));
+ check(*q == 0x43ff8000);
+
+ /* Maximum positive case, move x to x - 32 KB + 4 */
+ p = buf + 0x8000;
+ addr = (unsigned long)p;
+ patch_instruction(p, create_cond_branch(p, addr, 0xFFFFFFFC));
+ q = buf + 4;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(p, addr));
+ check(instr_is_branch_to_addr(q, addr));
+ check(*q == 0x43ff7ffc);
+
+ /* Jump to x + 12 KB moved to x + 20 KB */
+ p = buf;
+ addr = 0x3000 + (unsigned long)buf;
+ patch_instruction(p, create_cond_branch(p, addr, BRANCH_SET_LINK));
+ q = buf + 0x5000;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(p, addr));
+ check(instr_is_branch_to_addr(q, addr));
+
+ /* Jump to x + 8 KB moved to x - 8 KB + 4 */
+ p = buf + 0x2000;
+ addr = 0x4000 + (unsigned long)buf;
+ patch_instruction(p, create_cond_branch(p, addr, 0));
+ q = buf + 4;
+ patch_instruction(q, translate_branch(q, p));
+ check(instr_is_branch_to_addr(p, addr));
+ check(instr_is_branch_to_addr(q, addr));
+
+ /* Free the buffer we were using */
+ vfree(buf);
+}
+
+static int __init test_code_patching(void)
+{
+ printk(KERN_DEBUG "Running code patching self-tests ...\n");
+
+ test_branch_iform();
+ test_branch_bform();
+ test_create_function_call();
+ test_translate_branch();
+
+ return 0;
+}
+late_initcall(test_code_patching);
+
+#endif /* CONFIG_CODE_PATCHING_SELFTEST */
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index 6656d47..5d83907 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -348,8 +348,15 @@
switch (direction) {
case DMA_NONE:
BUG();
- case DMA_FROM_DEVICE: /* invalidate only */
- invalidate_dcache_range(start, end);
+ case DMA_FROM_DEVICE:
+ /*
+ * invalidate only when cache-line aligned otherwise there is
+ * the potential for discarding uncommitted data from the cache
+ */
+ if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 1)))
+ flush_dcache_range(start, end);
+ else
+ invalidate_dcache_range(start, end);
break;
case DMA_TO_DEVICE: /* writeback only */
clean_dcache_range(start, end);
diff --git a/arch/powerpc/lib/feature-fixups-test.S b/arch/powerpc/lib/feature-fixups-test.S
new file mode 100644
index 0000000..cb73748
--- /dev/null
+++ b/arch/powerpc/lib/feature-fixups-test.S
@@ -0,0 +1,742 @@
+/*
+ * Copyright 2008 Michael Ellerman, IBM Corporation.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/feature-fixups.h>
+#include <asm/ppc_asm.h>
+#include <asm/synch.h>
+
+ .text
+
+#define globl(x) \
+ .globl x; \
+x:
+
+globl(ftr_fixup_test1)
+ or 1,1,1
+ or 2,2,2 /* fixup will nop out this instruction */
+ or 3,3,3
+
+globl(end_ftr_fixup_test1)
+
+globl(ftr_fixup_test1_orig)
+ or 1,1,1
+ or 2,2,2
+ or 3,3,3
+
+globl(ftr_fixup_test1_expected)
+ or 1,1,1
+ nop
+ or 3,3,3
+
+globl(ftr_fixup_test2)
+ or 1,1,1
+ or 2,2,2 /* fixup will replace this with ftr_fixup_test2_alt */
+ or 3,3,3
+
+globl(end_ftr_fixup_test2)
+
+globl(ftr_fixup_test2_orig)
+ or 1,1,1
+ or 2,2,2
+ or 3,3,3
+
+globl(ftr_fixup_test2_alt)
+ or 31,31,31
+
+globl(ftr_fixup_test2_expected)
+ or 1,1,1
+ or 31,31,31
+ or 3,3,3
+
+globl(ftr_fixup_test3)
+ or 1,1,1
+ or 2,2,2 /* fixup will fail to replace this */
+ or 3,3,3
+
+globl(end_ftr_fixup_test3)
+
+globl(ftr_fixup_test3_orig)
+ or 1,1,1
+ or 2,2,2
+ or 3,3,3
+
+globl(ftr_fixup_test3_alt)
+ or 31,31,31
+ or 31,31,31
+
+globl(ftr_fixup_test4)
+ or 1,1,1
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+ or 3,3,3
+
+globl(end_ftr_fixup_test4)
+
+globl(ftr_fixup_test4_expected)
+ or 1,1,1
+ or 31,31,31
+ or 31,31,31
+ nop
+ nop
+ or 3,3,3
+
+globl(ftr_fixup_test4_orig)
+ or 1,1,1
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+ or 3,3,3
+
+globl(ftr_fixup_test4_alt)
+ or 31,31,31
+ or 31,31,31
+
+
+globl(ftr_fixup_test5)
+ or 1,1,1
+BEGIN_FTR_SECTION
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+ or 2,2,2
+FTR_SECTION_ELSE
+2: b 3f
+3: or 5,5,5
+ beq 3b
+ b 1f
+ or 6,6,6
+ b 2b
+1: bdnz 3b
+ALT_FTR_SECTION_END(0, 1)
+ or 1,1,1
+
+globl(end_ftr_fixup_test5)
+
+globl(ftr_fixup_test5_expected)
+ or 1,1,1
+2: b 3f
+3: or 5,5,5
+ beq 3b
+ b 1f
+ or 6,6,6
+ b 2b
+1: bdnz 3b
+ or 1,1,1
+
+globl(ftr_fixup_test6)
+1: or 1,1,1
+BEGIN_FTR_SECTION
+ or 5,5,5
+2: PPC_LCMPI r3,0
+ beq 4f
+ blt 2b
+ b 1b
+ b 4f
+FTR_SECTION_ELSE
+2: or 2,2,2
+ PPC_LCMPI r3,1
+ beq 3f
+ blt 2b
+ b 3f
+ b 1b
+ALT_FTR_SECTION_END(0, 1)
+3: or 1,1,1
+ or 2,2,2
+4: or 3,3,3
+
+globl(end_ftr_fixup_test6)
+
+globl(ftr_fixup_test6_expected)
+1: or 1,1,1
+2: or 2,2,2
+ PPC_LCMPI r3,1
+ beq 3f
+ blt 2b
+ b 3f
+ b 1b
+2: or 1,1,1
+ or 2,2,2
+3: or 3,3,3
+
+
+#define MAKE_MACRO_TEST(TYPE) \
+globl(ftr_fixup_test_ ##TYPE##_macros) \
+ or 1,1,1; \
+ /* Basic test, this section should all be nop'ed */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+ or 2,2,2; \
+ or 2,2,2; \
+END_##TYPE##_SECTION(0, 1) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Basic test, this section should NOT be nop'ed */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+ or 2,2,2; \
+ or 2,2,2; \
+END_##TYPE##_SECTION(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nesting test, inner section should be nop'ed */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(80) \
+ or 3,3,3; \
+ or 3,3,3; \
+END_##TYPE##_SECTION_NESTED(0, 1, 80) \
+ or 2,2,2; \
+ or 2,2,2; \
+END_##TYPE##_SECTION(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nesting test, whole section should be nop'ed */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(80) \
+ or 3,3,3; \
+ or 3,3,3; \
+END_##TYPE##_SECTION_NESTED(0, 0, 80) \
+ or 2,2,2; \
+ or 2,2,2; \
+END_##TYPE##_SECTION(0, 1) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nesting test, none should be nop'ed */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(80) \
+ or 3,3,3; \
+ or 3,3,3; \
+END_##TYPE##_SECTION_NESTED(0, 0, 80) \
+ or 2,2,2; \
+ or 2,2,2; \
+END_##TYPE##_SECTION(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Basic alt section test, default case should be taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 3,3,3; \
+ or 3,3,3; \
+ or 3,3,3; \
+##TYPE##_SECTION_ELSE \
+ or 5,5,5; \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Basic alt section test, else case should be taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 3,3,3; \
+ or 3,3,3; \
+ or 3,3,3; \
+##TYPE##_SECTION_ELSE \
+ or 31,31,31; \
+ or 31,31,31; \
+ or 31,31,31; \
+ALT_##TYPE##_SECTION_END(0, 1) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Alt with smaller else case, should be padded with nops */ \
+BEGIN_##TYPE##_SECTION \
+ or 3,3,3; \
+ or 3,3,3; \
+ or 3,3,3; \
+##TYPE##_SECTION_ELSE \
+ or 31,31,31; \
+ALT_##TYPE##_SECTION_END(0, 1) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Alt section with nested section in default case */ \
+ /* Default case should be taken, with nop'ed inner section */ \
+BEGIN_##TYPE##_SECTION \
+ or 3,3,3; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 3,3,3; \
+ or 3,3,3; \
+END_##TYPE##_SECTION_NESTED(0, 1, 95) \
+ or 3,3,3; \
+##TYPE##_SECTION_ELSE \
+ or 2,2,2; \
+ or 2,2,2; \
+ALT_##TYPE##_SECTION_END(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Alt section with nested section in else, default taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 3,3,3; \
+ or 3,3,3; \
+ or 3,3,3; \
+##TYPE##_SECTION_ELSE \
+ or 5,5,5; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 3,3,3; \
+END_##TYPE##_SECTION_NESTED(0, 1, 95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Alt section with nested section in else, else taken & nop */ \
+BEGIN_##TYPE##_SECTION \
+ or 3,3,3; \
+ or 3,3,3; \
+ or 3,3,3; \
+##TYPE##_SECTION_ELSE \
+ or 5,5,5; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 3,3,3; \
+END_##TYPE##_SECTION_NESTED(0, 1, 95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END(0, 1) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Feature section with nested alt section, default taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 1,1,1; \
+##TYPE##_SECTION_ELSE_NESTED(95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \
+ or 2,2,2; \
+END_##TYPE##_SECTION(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Feature section with nested alt section, else taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 1,1,1; \
+##TYPE##_SECTION_ELSE_NESTED(95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \
+ or 2,2,2; \
+END_##TYPE##_SECTION(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Feature section with nested alt section, all nop'ed */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 1,1,1; \
+##TYPE##_SECTION_ELSE_NESTED(95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \
+ or 2,2,2; \
+END_##TYPE##_SECTION(0, 1) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, default with inner default taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 1,1,1; \
+##TYPE##_SECTION_ELSE_NESTED(95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \
+ or 2,2,2; \
+##TYPE##_SECTION_ELSE \
+ or 31,31,31; \
+BEGIN_##TYPE##_SECTION_NESTED(94) \
+ or 5,5,5; \
+##TYPE##_SECTION_ELSE_NESTED(94) \
+ or 1,1,1; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \
+ or 31,31,31; \
+ALT_##TYPE##_SECTION_END(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, default with inner else taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 1,1,1; \
+##TYPE##_SECTION_ELSE_NESTED(95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \
+ or 2,2,2; \
+##TYPE##_SECTION_ELSE \
+ or 31,31,31; \
+BEGIN_##TYPE##_SECTION_NESTED(94) \
+ or 5,5,5; \
+##TYPE##_SECTION_ELSE_NESTED(94) \
+ or 1,1,1; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \
+ or 31,31,31; \
+ALT_##TYPE##_SECTION_END(0, 0) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, else with inner default taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 1,1,1; \
+##TYPE##_SECTION_ELSE_NESTED(95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \
+ or 2,2,2; \
+##TYPE##_SECTION_ELSE \
+ or 31,31,31; \
+BEGIN_##TYPE##_SECTION_NESTED(94) \
+ or 5,5,5; \
+##TYPE##_SECTION_ELSE_NESTED(94) \
+ or 1,1,1; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \
+ or 31,31,31; \
+ALT_##TYPE##_SECTION_END(0, 1) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, else with inner else taken */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+BEGIN_##TYPE##_SECTION_NESTED(95) \
+ or 1,1,1; \
+##TYPE##_SECTION_ELSE_NESTED(95) \
+ or 5,5,5; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \
+ or 2,2,2; \
+##TYPE##_SECTION_ELSE \
+ or 31,31,31; \
+BEGIN_##TYPE##_SECTION_NESTED(94) \
+ or 5,5,5; \
+##TYPE##_SECTION_ELSE_NESTED(94) \
+ or 1,1,1; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) \
+ or 31,31,31; \
+ALT_##TYPE##_SECTION_END(0, 1) \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, else can have large else case */ \
+BEGIN_##TYPE##_SECTION \
+ or 2,2,2; \
+ or 2,2,2; \
+ or 2,2,2; \
+ or 2,2,2; \
+##TYPE##_SECTION_ELSE \
+BEGIN_##TYPE##_SECTION_NESTED(94) \
+ or 5,5,5; \
+ or 5,5,5; \
+ or 5,5,5; \
+ or 5,5,5; \
+##TYPE##_SECTION_ELSE_NESTED(94) \
+ or 1,1,1; \
+ or 1,1,1; \
+ or 1,1,1; \
+ or 1,1,1; \
+ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) \
+ALT_##TYPE##_SECTION_END(0, 1) \
+ or 1,1,1; \
+ or 1,1,1;
+
+#define MAKE_MACRO_TEST_EXPECTED(TYPE) \
+globl(ftr_fixup_test_ ##TYPE##_macros_expected) \
+ or 1,1,1; \
+ /* Basic test, this section should all be nop'ed */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ nop; \
+ nop; \
+ nop; \
+/* END_##TYPE##_SECTION(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Basic test, this section should NOT be nop'ed */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 2,2,2; \
+ or 2,2,2; \
+ or 2,2,2; \
+/* END_##TYPE##_SECTION(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nesting test, inner section should be nop'ed */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 2,2,2; \
+ or 2,2,2; \
+/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \
+ nop; \
+ nop; \
+/* END_##TYPE##_SECTION_NESTED(0, 1, 80) */ \
+ or 2,2,2; \
+ or 2,2,2; \
+/* END_##TYPE##_SECTION(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nesting test, whole section should be nop'ed */ \
+ /* NB. inner section is not nop'ed, but then entire outer is */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ nop; \
+ nop; \
+/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \
+ nop; \
+ nop; \
+/* END_##TYPE##_SECTION_NESTED(0, 0, 80) */ \
+ nop; \
+ nop; \
+/* END_##TYPE##_SECTION(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nesting test, none should be nop'ed */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 2,2,2; \
+ or 2,2,2; \
+/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \
+ or 3,3,3; \
+ or 3,3,3; \
+/* END_##TYPE##_SECTION_NESTED(0, 0, 80) */ \
+ or 2,2,2; \
+ or 2,2,2; \
+/* END_##TYPE##_SECTION(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Basic alt section test, default case should be taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 3,3,3; \
+ or 3,3,3; \
+ or 3,3,3; \
+/* ##TYPE##_SECTION_ELSE */ \
+ /* or 5,5,5; */ \
+ /* or 5,5,5; */ \
+/* ALT_##TYPE##_SECTION_END(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Basic alt section test, else case should be taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ /* or 3,3,3; */ \
+ /* or 3,3,3; */ \
+ /* or 3,3,3; */ \
+/* ##TYPE##_SECTION_ELSE */ \
+ or 31,31,31; \
+ or 31,31,31; \
+ or 31,31,31; \
+/* ALT_##TYPE##_SECTION_END(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Alt with smaller else case, should be padded with nops */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ /* or 3,3,3; */ \
+ /* or 3,3,3; */ \
+ /* or 3,3,3; */ \
+/* ##TYPE##_SECTION_ELSE */ \
+ or 31,31,31; \
+ nop; \
+ nop; \
+/* ALT_##TYPE##_SECTION_END(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Alt section with nested section in default case */ \
+ /* Default case should be taken, with nop'ed inner section */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 3,3,3; \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ nop; \
+ nop; \
+/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \
+ or 3,3,3; \
+/* ##TYPE##_SECTION_ELSE */ \
+ /* or 2,2,2; */ \
+ /* or 2,2,2; */ \
+/* ALT_##TYPE##_SECTION_END(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Alt section with nested section in else, default taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 3,3,3; \
+ or 3,3,3; \
+ or 3,3,3; \
+/* ##TYPE##_SECTION_ELSE */ \
+ /* or 5,5,5; */ \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ /* or 3,3,3; */ \
+/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \
+ /* or 5,5,5; */ \
+/* ALT_##TYPE##_SECTION_END(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Alt section with nested section in else, else taken & nop */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ /* or 3,3,3; */ \
+ /* or 3,3,3; */ \
+ /* or 3,3,3; */ \
+/* ##TYPE##_SECTION_ELSE */ \
+ or 5,5,5; \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ nop; \
+/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \
+ or 5,5,5; \
+/* ALT_##TYPE##_SECTION_END(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Feature section with nested alt section, default taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 2,2,2; \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ or 1,1,1; \
+/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
+ /* or 5,5,5; */ \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \
+ or 2,2,2; \
+/* END_##TYPE##_SECTION(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Feature section with nested alt section, else taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 2,2,2; \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ /* or 1,1,1; */ \
+/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
+ or 5,5,5; \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \
+ or 2,2,2; \
+/* END_##TYPE##_SECTION(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Feature section with nested alt section, all nop'ed */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ nop; \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ nop; \
+/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
+ /* or 5,5,5; */ \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \
+ nop; \
+/* END_##TYPE##_SECTION(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, default with inner default taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 2,2,2; \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ or 1,1,1; \
+/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
+ /* or 5,5,5; */ \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \
+ or 2,2,2; \
+/* ##TYPE##_SECTION_ELSE */ \
+ /* or 31,31,31; */ \
+/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
+ /* or 5,5,5; */ \
+/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
+ /* or 1,1,1; */ \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \
+ /* or 31,31,31; */ \
+/* ALT_##TYPE##_SECTION_END(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, default with inner else taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ or 2,2,2; \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ /* or 1,1,1; */ \
+/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
+ or 5,5,5; \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \
+ or 2,2,2; \
+/* ##TYPE##_SECTION_ELSE */ \
+ /* or 31,31,31; */ \
+/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
+ /* or 5,5,5; */ \
+/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
+ /* or 1,1,1; */ \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \
+ /* or 31,31,31; */ \
+/* ALT_##TYPE##_SECTION_END(0, 0) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, else with inner default taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ /* or 2,2,2; */ \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ /* or 1,1,1; */ \
+/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
+ /* or 5,5,5; */ \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \
+ /* or 2,2,2; */ \
+/* ##TYPE##_SECTION_ELSE */ \
+ or 31,31,31; \
+/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
+ or 5,5,5; \
+/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
+ /* or 1,1,1; */ \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \
+ or 31,31,31; \
+/* ALT_##TYPE##_SECTION_END(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, else with inner else taken */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ /* or 2,2,2; */ \
+/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
+ /* or 1,1,1; */ \
+/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
+ /* or 5,5,5; */ \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \
+ /* or 2,2,2; */ \
+/* ##TYPE##_SECTION_ELSE */ \
+ or 31,31,31; \
+/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
+ /* or 5,5,5; */ \
+/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
+ or 1,1,1; \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) */ \
+ or 31,31,31; \
+/* ALT_##TYPE##_SECTION_END(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ /* Nested alt sections, else can have large else case */ \
+/* BEGIN_##TYPE##_SECTION */ \
+ /* or 2,2,2; */ \
+ /* or 2,2,2; */ \
+ /* or 2,2,2; */ \
+ /* or 2,2,2; */ \
+/* ##TYPE##_SECTION_ELSE */ \
+/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
+ /* or 5,5,5; */ \
+ /* or 5,5,5; */ \
+ /* or 5,5,5; */ \
+ /* or 5,5,5; */ \
+/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
+ or 1,1,1; \
+ or 1,1,1; \
+ or 1,1,1; \
+ or 1,1,1; \
+/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) */ \
+/* ALT_##TYPE##_SECTION_END(0, 1) */ \
+ or 1,1,1; \
+ or 1,1,1;
+
+MAKE_MACRO_TEST(FTR);
+MAKE_MACRO_TEST_EXPECTED(FTR);
+
+#ifdef CONFIG_PPC64
+MAKE_MACRO_TEST(FW_FTR);
+MAKE_MACRO_TEST_EXPECTED(FW_FTR);
+#endif
+
+globl(lwsync_fixup_test)
+1: or 1,1,1
+ LWSYNC
+globl(end_lwsync_fixup_test)
+
+globl(lwsync_fixup_test_expected_LWSYNC)
+1: or 1,1,1
+ lwsync
+
+globl(lwsync_fixup_test_expected_SYNC)
+1: or 1,1,1
+ sync
+
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
new file mode 100644
index 0000000..4e43702
--- /dev/null
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -0,0 +1,351 @@
+/*
+ * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
+ *
+ * Modifications for ppc64:
+ * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
+ *
+ * Copyright 2008 Michael Ellerman, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <asm/cputable.h>
+#include <asm/code-patching.h>
+
+
+struct fixup_entry {
+ unsigned long mask;
+ unsigned long value;
+ long start_off;
+ long end_off;
+ long alt_start_off;
+ long alt_end_off;
+};
+
+static unsigned int *calc_addr(struct fixup_entry *fcur, long offset)
+{
+ /*
+ * We store the offset to the code as a negative offset from
+ * the start of the alt_entry, to support the VDSO. This
+ * routine converts that back into an actual address.
+ */
+ return (unsigned int *)((unsigned long)fcur + offset);
+}
+
+static int patch_alt_instruction(unsigned int *src, unsigned int *dest,
+ unsigned int *alt_start, unsigned int *alt_end)
+{
+ unsigned int instr;
+
+ instr = *src;
+
+ if (instr_is_relative_branch(*src)) {
+ unsigned int *target = (unsigned int *)branch_target(src);
+
+ /* Branch within the section doesn't need translating */
+ if (target < alt_start || target >= alt_end) {
+ instr = translate_branch(dest, src);
+ if (!instr)
+ return 1;
+ }
+ }
+
+ patch_instruction(dest, instr);
+
+ return 0;
+}
+
+static int patch_feature_section(unsigned long value, struct fixup_entry *fcur)
+{
+ unsigned int *start, *end, *alt_start, *alt_end, *src, *dest;
+
+ start = calc_addr(fcur, fcur->start_off);
+ end = calc_addr(fcur, fcur->end_off);
+ alt_start = calc_addr(fcur, fcur->alt_start_off);
+ alt_end = calc_addr(fcur, fcur->alt_end_off);
+
+ if ((alt_end - alt_start) > (end - start))
+ return 1;
+
+ if ((value & fcur->mask) == fcur->value)
+ return 0;
+
+ src = alt_start;
+ dest = start;
+
+ for (; src < alt_end; src++, dest++) {
+ if (patch_alt_instruction(src, dest, alt_start, alt_end))
+ return 1;
+ }
+
+ for (; dest < end; dest++)
+ patch_instruction(dest, PPC_NOP_INSTR);
+
+ return 0;
+}
+
+void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
+{
+ struct fixup_entry *fcur, *fend;
+
+ fcur = fixup_start;
+ fend = fixup_end;
+
+ for (; fcur < fend; fcur++) {
+ if (patch_feature_section(value, fcur)) {
+ __WARN();
+ printk("Unable to patch feature section at %p - %p" \
+ " with %p - %p\n",
+ calc_addr(fcur, fcur->start_off),
+ calc_addr(fcur, fcur->end_off),
+ calc_addr(fcur, fcur->alt_start_off),
+ calc_addr(fcur, fcur->alt_end_off));
+ }
+ }
+}
+
+void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
+{
+ unsigned int *start, *end, *dest;
+
+ if (!(value & CPU_FTR_LWSYNC))
+ return ;
+
+ start = fixup_start;
+ end = fixup_end;
+
+ for (; start < end; start++) {
+ dest = (void *)start + *start;
+ patch_instruction(dest, PPC_LWSYNC_INSTR);
+ }
+}
+
+#ifdef CONFIG_FTR_FIXUP_SELFTEST
+
+#define check(x) \
+ if (!(x)) printk("feature-fixups: test failed at line %d\n", __LINE__);
+
+/* This must be after the text it fixes up, vmlinux.lds.S enforces that atm */
+static struct fixup_entry fixup;
+
+static long calc_offset(struct fixup_entry *entry, unsigned int *p)
+{
+ return (unsigned long)p - (unsigned long)entry;
+}
+
+void test_basic_patching(void)
+{
+ extern unsigned int ftr_fixup_test1;
+ extern unsigned int end_ftr_fixup_test1;
+ extern unsigned int ftr_fixup_test1_orig;
+ extern unsigned int ftr_fixup_test1_expected;
+ int size = &end_ftr_fixup_test1 - &ftr_fixup_test1;
+
+ fixup.value = fixup.mask = 8;
+ fixup.start_off = calc_offset(&fixup, &ftr_fixup_test1 + 1);
+ fixup.end_off = calc_offset(&fixup, &ftr_fixup_test1 + 2);
+ fixup.alt_start_off = fixup.alt_end_off = 0;
+
+ /* Sanity check */
+ check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0);
+
+ /* Check we don't patch if the value matches */
+ patch_feature_section(8, &fixup);
+ check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0);
+
+ /* Check we do patch if the value doesn't match */
+ patch_feature_section(0, &fixup);
+ check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_expected, size) == 0);
+
+ /* Check we do patch if the mask doesn't match */
+ memcpy(&ftr_fixup_test1, &ftr_fixup_test1_orig, size);
+ check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0);
+ patch_feature_section(~8, &fixup);
+ check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_expected, size) == 0);
+}
+
+static void test_alternative_patching(void)
+{
+ extern unsigned int ftr_fixup_test2;
+ extern unsigned int end_ftr_fixup_test2;
+ extern unsigned int ftr_fixup_test2_orig;
+ extern unsigned int ftr_fixup_test2_alt;
+ extern unsigned int ftr_fixup_test2_expected;
+ int size = &end_ftr_fixup_test2 - &ftr_fixup_test2;
+
+ fixup.value = fixup.mask = 0xF;
+ fixup.start_off = calc_offset(&fixup, &ftr_fixup_test2 + 1);
+ fixup.end_off = calc_offset(&fixup, &ftr_fixup_test2 + 2);
+ fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test2_alt);
+ fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test2_alt + 1);
+
+ /* Sanity check */
+ check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0);
+
+ /* Check we don't patch if the value matches */
+ patch_feature_section(0xF, &fixup);
+ check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0);
+
+ /* Check we do patch if the value doesn't match */
+ patch_feature_section(0, &fixup);
+ check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_expected, size) == 0);
+
+ /* Check we do patch if the mask doesn't match */
+ memcpy(&ftr_fixup_test2, &ftr_fixup_test2_orig, size);
+ check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0);
+ patch_feature_section(~0xF, &fixup);
+ check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_expected, size) == 0);
+}
+
+static void test_alternative_case_too_big(void)
+{
+ extern unsigned int ftr_fixup_test3;
+ extern unsigned int end_ftr_fixup_test3;
+ extern unsigned int ftr_fixup_test3_orig;
+ extern unsigned int ftr_fixup_test3_alt;
+ int size = &end_ftr_fixup_test3 - &ftr_fixup_test3;
+
+ fixup.value = fixup.mask = 0xC;
+ fixup.start_off = calc_offset(&fixup, &ftr_fixup_test3 + 1);
+ fixup.end_off = calc_offset(&fixup, &ftr_fixup_test3 + 2);
+ fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test3_alt);
+ fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test3_alt + 2);
+
+ /* Sanity check */
+ check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0);
+
+ /* Expect nothing to be patched, and the error returned to us */
+ check(patch_feature_section(0xF, &fixup) == 1);
+ check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0);
+ check(patch_feature_section(0, &fixup) == 1);
+ check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0);
+ check(patch_feature_section(~0xF, &fixup) == 1);
+ check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0);
+}
+
+static void test_alternative_case_too_small(void)
+{
+ extern unsigned int ftr_fixup_test4;
+ extern unsigned int end_ftr_fixup_test4;
+ extern unsigned int ftr_fixup_test4_orig;
+ extern unsigned int ftr_fixup_test4_alt;
+ extern unsigned int ftr_fixup_test4_expected;
+ int size = &end_ftr_fixup_test4 - &ftr_fixup_test4;
+ unsigned long flag;
+
+ /* Check a high-bit flag */
+ flag = 1UL << ((sizeof(unsigned long) - 1) * 8);
+ fixup.value = fixup.mask = flag;
+ fixup.start_off = calc_offset(&fixup, &ftr_fixup_test4 + 1);
+ fixup.end_off = calc_offset(&fixup, &ftr_fixup_test4 + 5);
+ fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test4_alt);
+ fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test4_alt + 2);
+
+ /* Sanity check */
+ check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0);
+
+ /* Check we don't patch if the value matches */
+ patch_feature_section(flag, &fixup);
+ check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0);
+
+ /* Check we do patch if the value doesn't match */
+ patch_feature_section(0, &fixup);
+ check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_expected, size) == 0);
+
+ /* Check we do patch if the mask doesn't match */
+ memcpy(&ftr_fixup_test4, &ftr_fixup_test4_orig, size);
+ check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0);
+ patch_feature_section(~flag, &fixup);
+ check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_expected, size) == 0);
+}
+
+static void test_alternative_case_with_branch(void)
+{
+ extern unsigned int ftr_fixup_test5;
+ extern unsigned int end_ftr_fixup_test5;
+ extern unsigned int ftr_fixup_test5_expected;
+ int size = &end_ftr_fixup_test5 - &ftr_fixup_test5;
+
+ check(memcmp(&ftr_fixup_test5, &ftr_fixup_test5_expected, size) == 0);
+}
+
+static void test_alternative_case_with_external_branch(void)
+{
+ extern unsigned int ftr_fixup_test6;
+ extern unsigned int end_ftr_fixup_test6;
+ extern unsigned int ftr_fixup_test6_expected;
+ int size = &end_ftr_fixup_test6 - &ftr_fixup_test6;
+
+ check(memcmp(&ftr_fixup_test6, &ftr_fixup_test6_expected, size) == 0);
+}
+
+static void test_cpu_macros(void)
+{
+ extern void ftr_fixup_test_FTR_macros;
+ extern void ftr_fixup_test_FTR_macros_expected;
+ unsigned long size = &ftr_fixup_test_FTR_macros_expected -
+ &ftr_fixup_test_FTR_macros;
+
+ /* The fixups have already been done for us during boot */
+ check(memcmp(&ftr_fixup_test_FTR_macros,
+ &ftr_fixup_test_FTR_macros_expected, size) == 0);
+}
+
+static void test_fw_macros(void)
+{
+#ifdef CONFIG_PPC64
+ extern void ftr_fixup_test_FW_FTR_macros;
+ extern void ftr_fixup_test_FW_FTR_macros_expected;
+ unsigned long size = &ftr_fixup_test_FW_FTR_macros_expected -
+ &ftr_fixup_test_FW_FTR_macros;
+
+ /* The fixups have already been done for us during boot */
+ check(memcmp(&ftr_fixup_test_FW_FTR_macros,
+ &ftr_fixup_test_FW_FTR_macros_expected, size) == 0);
+#endif
+}
+
+static void test_lwsync_macros(void)
+{
+ extern void lwsync_fixup_test;
+ extern void end_lwsync_fixup_test;
+ extern void lwsync_fixup_test_expected_LWSYNC;
+ extern void lwsync_fixup_test_expected_SYNC;
+ unsigned long size = &end_lwsync_fixup_test -
+ &lwsync_fixup_test;
+
+ /* The fixups have already been done for us during boot */
+ if (cur_cpu_spec->cpu_features & CPU_FTR_LWSYNC) {
+ check(memcmp(&lwsync_fixup_test,
+ &lwsync_fixup_test_expected_LWSYNC, size) == 0);
+ } else {
+ check(memcmp(&lwsync_fixup_test,
+ &lwsync_fixup_test_expected_SYNC, size) == 0);
+ }
+}
+
+static int __init test_feature_fixups(void)
+{
+ printk(KERN_DEBUG "Running feature fixup self-tests ...\n");
+
+ test_basic_patching();
+ test_alternative_patching();
+ test_alternative_case_too_big();
+ test_alternative_case_too_small();
+ test_alternative_case_with_branch();
+ test_alternative_case_with_external_branch();
+ test_cpu_macros();
+ test_fw_macros();
+ test_lwsync_macros();
+
+ return 0;
+}
+late_initcall(test_feature_fixups);
+
+#endif /* CONFIG_FTR_FIXUP_SELFTEST */
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c
index 381306b..29e545e 100644
--- a/arch/powerpc/math-emu/math.c
+++ b/arch/powerpc/math-emu/math.c
@@ -230,14 +230,14 @@
case LFD:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
lfd(op0, op1, op2, op3);
break;
case LFDU:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
lfd(op0, op1, op2, op3);
regs->gpr[idx] = (unsigned long)op1;
@@ -245,21 +245,21 @@
case STFD:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
stfd(op0, op1, op2, op3);
break;
case STFDU:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
stfd(op0, op1, op2, op3);
regs->gpr[idx] = (unsigned long)op1;
break;
case OP63:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
fmr(op0, op1, op2, op3);
break;
default:
@@ -356,28 +356,28 @@
switch (type) {
case AB:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case AC:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)¤t->thread.fpr[(insn >> 6) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f);
break;
case ABC:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
- op2 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
- op3 = (void *)¤t->thread.fpr[(insn >> 6) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
+ op2 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
+ op3 = (void *)¤t->thread.TS_FPR((insn >> 6) & 0x1f);
break;
case D:
idx = (insn >> 16) & 0x1f;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
break;
@@ -387,27 +387,27 @@
goto illegal;
sdisp = (insn & 0xffff);
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)(regs->gpr[idx] + sdisp);
break;
case X:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
break;
case XA:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
break;
case XB:
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
- op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case XE:
idx = (insn >> 16) & 0x1f;
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
if (!idx) {
if (((insn >> 1) & 0x3ff) == STFIWX)
op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]);
@@ -421,7 +421,7 @@
case XEU:
idx = (insn >> 16) & 0x1f;
- op0 = (void *)¤t->thread.fpr[(insn >> 21) & 0x1f];
+ op0 = (void *)¤t->thread.TS_FPR((insn >> 21) & 0x1f);
op1 = (void *)((idx ? regs->gpr[idx] : 0)
+ regs->gpr[(insn >> 11) & 0x1f]);
break;
@@ -429,8 +429,8 @@
case XCR:
op0 = (void *)®s->ccr;
op1 = (void *)((insn >> 23) & 0x7);
- op2 = (void *)¤t->thread.fpr[(insn >> 16) & 0x1f];
- op3 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op2 = (void *)¤t->thread.TS_FPR((insn >> 16) & 0x1f);
+ op3 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
break;
case XCRL:
@@ -450,7 +450,7 @@
case XFLB:
op0 = (void *)((insn >> 17) & 0xff);
- op1 = (void *)¤t->thread.fpr[(insn >> 11) & 0x1f];
+ op1 = (void *)¤t->thread.TS_FPR((insn >> 11) & 0x1f);
break;
default:
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index 953fb91..98052ac 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -27,6 +27,7 @@
#include <asm/mmu.h>
#include <asm/system.h>
#include <asm/page.h>
+#include <asm/cacheflush.h>
#include "mmu_decl.h"
@@ -37,11 +38,35 @@
unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
int icache_44x_need_flush;
+static void __init ppc44x_update_tlb_hwater(void)
+{
+ extern unsigned int tlb_44x_patch_hwater_D[];
+ extern unsigned int tlb_44x_patch_hwater_I[];
+
+ /* The TLB miss handlers hard codes the watermark in a cmpli
+ * instruction to improve performances rather than loading it
+ * from the global variable. Thus, we patch the instructions
+ * in the 2 TLB miss handlers when updating the value
+ */
+ tlb_44x_patch_hwater_D[0] = (tlb_44x_patch_hwater_D[0] & 0xffff0000) |
+ tlb_44x_hwater;
+ flush_icache_range((unsigned long)&tlb_44x_patch_hwater_D[0],
+ (unsigned long)&tlb_44x_patch_hwater_D[1]);
+ tlb_44x_patch_hwater_I[0] = (tlb_44x_patch_hwater_I[0] & 0xffff0000) |
+ tlb_44x_hwater;
+ flush_icache_range((unsigned long)&tlb_44x_patch_hwater_I[0],
+ (unsigned long)&tlb_44x_patch_hwater_I[1]);
+}
+
/*
* "Pins" a 256MB TLB entry in AS0 for kernel lowmem
*/
static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
{
+ unsigned int entry = tlb_44x_hwater--;
+
+ ppc44x_update_tlb_hwater();
+
__asm__ __volatile__(
"tlbwe %2,%3,%4\n"
"tlbwe %1,%3,%5\n"
@@ -50,7 +75,7 @@
: "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
"r" (phys),
"r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
- "r" (tlb_44x_hwater--), /* slot for this TLB entry */
+ "r" (entry),
"i" (PPC44x_TLB_PAGEID),
"i" (PPC44x_TLB_XLAT),
"i" (PPC44x_TLB_ATTRIB));
@@ -58,6 +83,8 @@
void __init MMU_init_hw(void)
{
+ ppc44x_update_tlb_hwater();
+
flush_instruction_cache();
}
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 7b25107..1707d00 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -306,7 +306,8 @@
flush_dcache_icache_page(page);
set_bit(PG_arch_1, &page->flags);
}
- pte_update(ptep, 0, _PAGE_HWEXEC);
+ pte_update(ptep, 0, _PAGE_HWEXEC |
+ _PAGE_ACCESSED);
_tlbie(address, mm->context.id);
pte_unmap_unlock(ptep, ptl);
up_read(&mm->mmap_sem);
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index 70f4c83..a719f53 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -388,7 +388,7 @@
*/
rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */
or r30,r30,r31
- ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED | _PAGE_HASHPTE
+ ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED
oris r30,r30,_PAGE_COMBO@h
/* Write the linux PTE atomically (setting busy) */
stdcx. r30,0,r6
@@ -468,7 +468,7 @@
* go to out-of-line code to try to modify the HPTE. We look for
* the bit at (1 >> (index + 32))
*/
- andi. r0,r31,_PAGE_HASHPTE
+ rldicl. r0,r31,64-12,48
li r26,0 /* Default hidx */
beq htab_insert_pte
@@ -726,11 +726,11 @@
bne- ht64_bail_ok
END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE)
/* Prepare new PTE value (turn access RW into DIRTY, then
- * add BUSY,HASHPTE and ACCESSED)
+ * add BUSY and ACCESSED)
*/
rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */
or r30,r30,r31
- ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED | _PAGE_HASHPTE
+ ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED
/* Write the linux PTE atomically (setting busy) */
stdcx. r30,0,r6
bne- 1b
@@ -798,18 +798,21 @@
/* Check if we may already be in the hashtable, in this case, we
* go to out-of-line code to try to modify the HPTE
*/
- andi. r0,r31,_PAGE_HASHPTE
+ rldicl. r0,r31,64-12,48
bne ht64_modify_pte
ht64_insert_pte:
/* Clear hpte bits in new pte (we also clear BUSY btw) and
- * add _PAGE_HASHPTE
+ * add _PAGE_HPTE_SUB0
*/
lis r0,_PAGE_HPTEFLAGS@h
ori r0,r0,_PAGE_HPTEFLAGS@l
andc r30,r30,r0
+#ifdef CONFIG_PPC_64K_PAGES
+ oris r30,r30,_PAGE_HPTE_SUB0@h
+#else
ori r30,r30,_PAGE_HASHPTE
-
+#endif
/* Phyical address in r5 */
rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT
sldi r5,r5,PAGE_SHIFT
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 0f2d239..8d3b58e 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -120,7 +120,7 @@
/* Pre-POWER4 CPUs (4k pages only)
*/
-struct mmu_psize_def mmu_psize_defaults_old[] = {
+static struct mmu_psize_def mmu_psize_defaults_old[] = {
[MMU_PAGE_4K] = {
.shift = 12,
.sllp = 0,
@@ -134,7 +134,7 @@
*
* Support for 16Mb large pages
*/
-struct mmu_psize_def mmu_psize_defaults_gp[] = {
+static struct mmu_psize_def mmu_psize_defaults_gp[] = {
[MMU_PAGE_4K] = {
.shift = 12,
.sllp = 0,
@@ -533,8 +533,6 @@
unsigned long base = 0, size = 0, limit;
int i;
- extern unsigned long tce_alloc_start, tce_alloc_end;
-
DBG(" -> htab_initialize()\n");
/* Initialize segment sizes */
@@ -697,6 +695,28 @@
return pp;
}
+#ifdef CONFIG_PPC_MM_SLICES
+unsigned int get_paca_psize(unsigned long addr)
+{
+ unsigned long index, slices;
+
+ if (addr < SLICE_LOW_TOP) {
+ slices = get_paca()->context.low_slices_psize;
+ index = GET_LOW_SLICE_INDEX(addr);
+ } else {
+ slices = get_paca()->context.high_slices_psize;
+ index = GET_HIGH_SLICE_INDEX(addr);
+ }
+ return (slices >> (index * 4)) & 0xF;
+}
+
+#else
+unsigned int get_paca_psize(unsigned long addr)
+{
+ return get_paca()->context.user_psize;
+}
+#endif
+
/*
* Demote a segment to using 4k pages.
* For now this makes the whole process use 4k pages.
@@ -704,13 +724,13 @@
#ifdef CONFIG_PPC_64K_PAGES
void demote_segment_4k(struct mm_struct *mm, unsigned long addr)
{
- if (mm->context.user_psize == MMU_PAGE_4K)
+ if (get_slice_psize(mm, addr) == MMU_PAGE_4K)
return;
- slice_set_user_psize(mm, MMU_PAGE_4K);
+ slice_set_range_psize(mm, addr, 1, MMU_PAGE_4K);
#ifdef CONFIG_SPU_BASE
spu_flush_all_slbs(mm);
#endif
- if (get_paca()->context.user_psize != MMU_PAGE_4K) {
+ if (get_paca_psize(addr) != MMU_PAGE_4K) {
get_paca()->context = mm->context;
slb_flush_and_rebolt();
}
@@ -794,11 +814,7 @@
DBG_LOW(" user region with no mm !\n");
return 1;
}
-#ifdef CONFIG_PPC_MM_SLICES
psize = get_slice_psize(mm, ea);
-#else
- psize = mm->context.user_psize;
-#endif
ssize = user_segment_size(ea);
vsid = get_vsid(mm->context.id, ea, ssize);
break;
@@ -870,7 +886,7 @@
/* Do actual hashing */
#ifdef CONFIG_PPC_64K_PAGES
/* If _PAGE_4K_PFN is set, make sure this is a 4k segment */
- if (pte_val(*ptep) & _PAGE_4K_PFN) {
+ if ((pte_val(*ptep) & _PAGE_4K_PFN) && psize == MMU_PAGE_64K) {
demote_segment_4k(mm, ea);
psize = MMU_PAGE_4K;
}
@@ -899,7 +915,7 @@
}
}
if (user_region) {
- if (psize != get_paca()->context.user_psize) {
+ if (psize != get_paca_psize(ea)) {
get_paca()->context = mm->context;
slb_flush_and_rebolt();
}
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index a02266d..0d12fba 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -458,8 +458,7 @@
old_pte = pte_val(*ptep);
if (old_pte & _PAGE_BUSY)
goto out;
- new_pte = old_pte | _PAGE_BUSY |
- _PAGE_ACCESSED | _PAGE_HASHPTE;
+ new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED;
} while(old_pte != __cmpxchg_u64((unsigned long *)ptep,
old_pte, new_pte));
@@ -499,12 +498,14 @@
HPTES_PER_GROUP) & ~0x7UL;
/* clear HPTE slot informations in new PTE */
+#ifdef CONFIG_PPC_64K_PAGES
+ new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0;
+#else
new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
-
+#endif
/* Add in WIMG bits */
- /* XXX We should store these in the pte */
- /* --BenH: I think they are ... */
- rflags |= _PAGE_COHERENT;
+ rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
+ _PAGE_COHERENT | _PAGE_GUARDED));
/* Insert into the hash table, primary slot */
slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0,
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 1952b4d..388ceda 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -43,6 +43,7 @@
#include <asm/btext.h>
#include <asm/tlb.h>
#include <asm/sections.h>
+#include <asm/system.h>
#include "mmu_decl.h"
@@ -56,8 +57,8 @@
DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-unsigned long total_memory;
-unsigned long total_lowmem;
+phys_addr_t total_memory;
+phys_addr_t total_lowmem;
phys_addr_t memstart_addr = (phys_addr_t)~0ull;
EXPORT_SYMBOL(memstart_addr);
@@ -76,8 +77,6 @@
/* XXX should be in current.h -- paulus */
extern struct task_struct *current_set[NR_CPUS];
-extern int init_bootmem_done;
-
/*
* this tells the system to map all of ram with the segregs
* (i.e. page tables) instead of the bats.
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 6aa6537..6ef63ca 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -185,7 +185,7 @@
* do this by hand as the proffered address may not be correctly aligned.
* Subtraction of non-aligned pointers produces undefined results.
*/
-unsigned long __meminit vmemmap_section_start(unsigned long page)
+static unsigned long __meminit vmemmap_section_start(unsigned long page)
{
unsigned long offset = page - ((unsigned long)(vmemmap));
@@ -198,7 +198,7 @@
* which overlaps this vmemmap page is initialised then this page is
* initialised already.
*/
-int __meminit vmemmap_populated(unsigned long start, int page_size)
+static int __meminit vmemmap_populated(unsigned long start, int page_size)
{
unsigned long end = start + page_size;
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 51f82d8..1ca2235 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -44,6 +44,7 @@
#include <asm/btext.h>
#include <asm/tlb.h>
#include <asm/sections.h>
+#include <asm/sparsemem.h>
#include <asm/vdso.h>
#include <asm/fixmap.h>
@@ -329,7 +330,7 @@
void __init paging_init(void)
{
unsigned long total_ram = lmb_phys_mem_size();
- unsigned long top_of_ram = lmb_end_of_DRAM();
+ phys_addr_t top_of_ram = lmb_end_of_DRAM();
unsigned long max_zone_pfns[MAX_NR_ZONES];
#ifdef CONFIG_PPC32
@@ -348,10 +349,10 @@
kmap_prot = PAGE_KERNEL;
#endif /* CONFIG_HIGHMEM */
- printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
- top_of_ram, total_ram);
+ printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%lx\n",
+ (u64)top_of_ram, total_ram);
printk(KERN_DEBUG "Memory hole size: %ldMB\n",
- (top_of_ram - total_ram) >> 20);
+ (long int)((top_of_ram - total_ram) >> 20));
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
#ifdef CONFIG_HIGHMEM
max_zone_pfns[ZONE_DMA] = lowmem_end_addr >> PAGE_SHIFT;
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 0480225..fab3cfa 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -29,7 +29,7 @@
#ifdef CONFIG_PPC32
extern void mapin_ram(void);
extern int map_page(unsigned long va, phys_addr_t pa, int flags);
-extern void setbat(int index, unsigned long virt, unsigned long phys,
+extern void setbat(int index, unsigned long virt, phys_addr_t phys,
unsigned int size, int flags);
extern void settlbcam(int index, unsigned long virt, phys_addr_t phys,
unsigned int size, int flags, unsigned int pid);
@@ -49,8 +49,8 @@
extern unsigned long ioremap_bot;
extern unsigned long __max_low_memory;
extern phys_addr_t __initial_memory_limit_addr;
-extern unsigned long total_memory;
-extern unsigned long total_lowmem;
+extern phys_addr_t total_memory;
+extern phys_addr_t total_lowmem;
extern phys_addr_t memstart_addr;
extern phys_addr_t lowmem_end_addr;
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index dc704da..cf4bffb 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -268,6 +268,144 @@
return result;
}
+struct of_drconf_cell {
+ u64 base_addr;
+ u32 drc_index;
+ u32 reserved;
+ u32 aa_index;
+ u32 flags;
+};
+
+#define DRCONF_MEM_ASSIGNED 0x00000008
+#define DRCONF_MEM_AI_INVALID 0x00000040
+#define DRCONF_MEM_RESERVED 0x00000080
+
+/*
+ * Read the next lmb list entry from the ibm,dynamic-memory property
+ * and return the information in the provided of_drconf_cell structure.
+ */
+static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp)
+{
+ const u32 *cp;
+
+ drmem->base_addr = read_n_cells(n_mem_addr_cells, cellp);
+
+ cp = *cellp;
+ drmem->drc_index = cp[0];
+ drmem->reserved = cp[1];
+ drmem->aa_index = cp[2];
+ drmem->flags = cp[3];
+
+ *cellp = cp + 4;
+}
+
+/*
+ * Retreive and validate the ibm,dynamic-memory property of the device tree.
+ *
+ * The layout of the ibm,dynamic-memory property is a number N of lmb
+ * list entries followed by N lmb list entries. Each lmb list entry
+ * contains information as layed out in the of_drconf_cell struct above.
+ */
+static int of_get_drconf_memory(struct device_node *memory, const u32 **dm)
+{
+ const u32 *prop;
+ u32 len, entries;
+
+ prop = of_get_property(memory, "ibm,dynamic-memory", &len);
+ if (!prop || len < sizeof(unsigned int))
+ return 0;
+
+ entries = *prop++;
+
+ /* Now that we know the number of entries, revalidate the size
+ * of the property read in to ensure we have everything
+ */
+ if (len < (entries * (n_mem_addr_cells + 4) + 1) * sizeof(unsigned int))
+ return 0;
+
+ *dm = prop;
+ return entries;
+}
+
+/*
+ * Retreive and validate the ibm,lmb-size property for drconf memory
+ * from the device tree.
+ */
+static u64 of_get_lmb_size(struct device_node *memory)
+{
+ const u32 *prop;
+ u32 len;
+
+ prop = of_get_property(memory, "ibm,lmb-size", &len);
+ if (!prop || len < sizeof(unsigned int))
+ return 0;
+
+ return read_n_cells(n_mem_size_cells, &prop);
+}
+
+struct assoc_arrays {
+ u32 n_arrays;
+ u32 array_sz;
+ const u32 *arrays;
+};
+
+/*
+ * Retreive and validate the list of associativity arrays for drconf
+ * memory from the ibm,associativity-lookup-arrays property of the
+ * device tree..
+ *
+ * The layout of the ibm,associativity-lookup-arrays property is a number N
+ * indicating the number of associativity arrays, followed by a number M
+ * indicating the size of each associativity array, followed by a list
+ * of N associativity arrays.
+ */
+static int of_get_assoc_arrays(struct device_node *memory,
+ struct assoc_arrays *aa)
+{
+ const u32 *prop;
+ u32 len;
+
+ prop = of_get_property(memory, "ibm,associativity-lookup-arrays", &len);
+ if (!prop || len < 2 * sizeof(unsigned int))
+ return -1;
+
+ aa->n_arrays = *prop++;
+ aa->array_sz = *prop++;
+
+ /* Now that we know the number of arrrays and size of each array,
+ * revalidate the size of the property read in.
+ */
+ if (len < (aa->n_arrays * aa->array_sz + 2) * sizeof(unsigned int))
+ return -1;
+
+ aa->arrays = prop;
+ return 0;
+}
+
+/*
+ * This is like of_node_to_nid_single() for memory represented in the
+ * ibm,dynamic-reconfiguration-memory node.
+ */
+static int of_drconf_to_nid_single(struct of_drconf_cell *drmem,
+ struct assoc_arrays *aa)
+{
+ int default_nid = 0;
+ int nid = default_nid;
+ int index;
+
+ if (min_common_depth > 0 && min_common_depth <= aa->array_sz &&
+ !(drmem->flags & DRCONF_MEM_AI_INVALID) &&
+ drmem->aa_index < aa->n_arrays) {
+ index = drmem->aa_index * aa->array_sz + min_common_depth - 1;
+ nid = aa->arrays[index];
+
+ if (nid == 0xffff || nid >= MAX_NUMNODES)
+ nid = default_nid;
+ }
+
+ return nid;
+}
+
/*
* Figure out to which domain a cpu belongs and stick it there.
* Return the id of the domain used.
@@ -355,57 +493,50 @@
*/
static void __init parse_drconf_memory(struct device_node *memory)
{
- const unsigned int *lm, *dm, *aa;
- unsigned int ls, ld, la;
- unsigned int n, aam, aalen;
- unsigned long lmb_size, size, start;
- int nid, default_nid = 0;
- unsigned int ai, flags;
+ const u32 *dm;
+ unsigned int n, rc;
+ unsigned long lmb_size, size;
+ int nid;
+ struct assoc_arrays aa;
- lm = of_get_property(memory, "ibm,lmb-size", &ls);
- dm = of_get_property(memory, "ibm,dynamic-memory", &ld);
- aa = of_get_property(memory, "ibm,associativity-lookup-arrays", &la);
- if (!lm || !dm || !aa ||
- ls < sizeof(unsigned int) || ld < sizeof(unsigned int) ||
- la < 2 * sizeof(unsigned int))
+ n = of_get_drconf_memory(memory, &dm);
+ if (!n)
return;
- lmb_size = read_n_cells(n_mem_size_cells, &lm);
- n = *dm++; /* number of LMBs */
- aam = *aa++; /* number of associativity lists */
- aalen = *aa++; /* length of each associativity list */
- if (ld < (n * (n_mem_addr_cells + 4) + 1) * sizeof(unsigned int) ||
- la < (aam * aalen + 2) * sizeof(unsigned int))
+ lmb_size = of_get_lmb_size(memory);
+ if (!lmb_size)
+ return;
+
+ rc = of_get_assoc_arrays(memory, &aa);
+ if (rc)
return;
for (; n != 0; --n) {
- start = read_n_cells(n_mem_addr_cells, &dm);
- ai = dm[2];
- flags = dm[3];
- dm += 4;
- /* 0x80 == reserved, 0x8 = assigned to us */
- if ((flags & 0x80) || !(flags & 0x8))
- continue;
- nid = default_nid;
- /* flags & 0x40 means associativity index is invalid */
- if (min_common_depth > 0 && min_common_depth <= aalen &&
- (flags & 0x40) == 0 && ai < aam) {
- /* this is like of_node_to_nid_single */
- nid = aa[ai * aalen + min_common_depth - 1];
- if (nid == 0xffff || nid >= MAX_NUMNODES)
- nid = default_nid;
- }
+ struct of_drconf_cell drmem;
- fake_numa_create_new_node(((start + lmb_size) >> PAGE_SHIFT),
- &nid);
+ read_drconf_cell(&drmem, &dm);
+
+ /* skip this block if the reserved bit is set in flags (0x80)
+ or if the block is not assigned to this partition (0x8) */
+ if ((drmem.flags & DRCONF_MEM_RESERVED)
+ || !(drmem.flags & DRCONF_MEM_ASSIGNED))
+ continue;
+
+ nid = of_drconf_to_nid_single(&drmem, &aa);
+
+ fake_numa_create_new_node(
+ ((drmem.base_addr + lmb_size) >> PAGE_SHIFT),
+ &nid);
+
node_set_online(nid);
- size = numa_enforce_memory_limit(start, lmb_size);
+ size = numa_enforce_memory_limit(drmem.base_addr, lmb_size);
if (!size)
continue;
- add_active_range(nid, start >> PAGE_SHIFT,
- (start >> PAGE_SHIFT) + (size >> PAGE_SHIFT));
+ add_active_range(nid, drmem.base_addr >> PAGE_SHIFT,
+ (drmem.base_addr >> PAGE_SHIFT)
+ + (size >> PAGE_SHIFT));
}
}
@@ -770,6 +901,79 @@
#ifdef CONFIG_MEMORY_HOTPLUG
/*
+ * Validate the node associated with the memory section we are
+ * trying to add.
+ */
+int valid_hot_add_scn(int *nid, unsigned long start, u32 lmb_size,
+ unsigned long scn_addr)
+{
+ nodemask_t nodes;
+
+ if (*nid < 0 || !node_online(*nid))
+ *nid = any_online_node(NODE_MASK_ALL);
+
+ if ((scn_addr >= start) && (scn_addr < (start + lmb_size))) {
+ nodes_setall(nodes);
+ while (NODE_DATA(*nid)->node_spanned_pages == 0) {
+ node_clear(*nid, nodes);
+ *nid = any_online_node(nodes);
+ }
+
+ return 1;
+ }
+
+ return 0;
+}
+
+/*
+ * Find the node associated with a hot added memory section represented
+ * by the ibm,dynamic-reconfiguration-memory node.
+ */
+static int hot_add_drconf_scn_to_nid(struct device_node *memory,
+ unsigned long scn_addr)
+{
+ const u32 *dm;
+ unsigned int n, rc;
+ unsigned long lmb_size;
+ int default_nid = any_online_node(NODE_MASK_ALL);
+ int nid;
+ struct assoc_arrays aa;
+
+ n = of_get_drconf_memory(memory, &dm);
+ if (!n)
+ return default_nid;;
+
+ lmb_size = of_get_lmb_size(memory);
+ if (!lmb_size)
+ return default_nid;
+
+ rc = of_get_assoc_arrays(memory, &aa);
+ if (rc)
+ return default_nid;
+
+ for (; n != 0; --n) {
+ struct of_drconf_cell drmem;
+
+ read_drconf_cell(&drmem, &dm);
+
+ /* skip this block if it is reserved or not assigned to
+ * this partition */
+ if ((drmem.flags & DRCONF_MEM_RESERVED)
+ || !(drmem.flags & DRCONF_MEM_ASSIGNED))
+ continue;
+
+ nid = of_drconf_to_nid_single(&drmem, &aa);
+
+ if (valid_hot_add_scn(&nid, drmem.base_addr, lmb_size,
+ scn_addr))
+ return nid;
+ }
+
+ BUG(); /* section address should be found above */
+ return 0;
+}
+
+/*
* Find the node associated with a hot added memory section. Section
* corresponds to a SPARSEMEM section, not an LMB. It is assumed that
* sections are fully contained within a single LMB.
@@ -777,12 +981,17 @@
int hot_add_scn_to_nid(unsigned long scn_addr)
{
struct device_node *memory = NULL;
- nodemask_t nodes;
- int default_nid = any_online_node(NODE_MASK_ALL);
int nid;
if (!numa_enabled || (min_common_depth < 0))
- return default_nid;
+ return any_online_node(NODE_MASK_ALL);
+
+ memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
+ if (memory) {
+ nid = hot_add_drconf_scn_to_nid(memory, scn_addr);
+ of_node_put(memory);
+ return nid;
+ }
while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
unsigned long start, size;
@@ -801,13 +1010,9 @@
size = read_n_cells(n_mem_size_cells, &memcell_buf);
nid = of_node_to_nid_single(memory);
- /* Domains not present at boot default to 0 */
- if (nid < 0 || !node_online(nid))
- nid = default_nid;
-
- if ((scn_addr >= start) && (scn_addr < (start + size))) {
+ if (valid_hot_add_scn(&nid, start, size, scn_addr)) {
of_node_put(memory);
- goto got_nid;
+ return nid;
}
if (--ranges) /* process all ranges in cell */
@@ -815,14 +1020,5 @@
}
BUG(); /* section address should be found above */
return 0;
-
- /* Temporary code to ensure that returned node is not empty */
-got_nid:
- nodes_setall(nodes);
- while (NODE_DATA(nid)->node_spanned_pages == 0) {
- node_clear(nid, nodes);
- nid = any_online_node(nodes);
- }
- return nid;
}
#endif /* CONFIG_MEMORY_HOTPLUG */
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index e0ff59f..c758407 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -53,9 +53,9 @@
#endif
#ifdef HAVE_BATS
-extern unsigned long v_mapped_by_bats(unsigned long va);
-extern unsigned long p_mapped_by_bats(unsigned long pa);
-void setbat(int index, unsigned long virt, unsigned long phys,
+extern phys_addr_t v_mapped_by_bats(unsigned long va);
+extern unsigned long p_mapped_by_bats(phys_addr_t pa);
+void setbat(int index, unsigned long virt, phys_addr_t phys,
unsigned int size, int flags);
#else /* !HAVE_BATS */
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index cef9f15..c53145f 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -38,21 +38,18 @@
unsigned long Hash_size, Hash_mask;
unsigned long _SDR1;
-union ubat { /* BAT register values to be loaded */
- struct ppc_bat bat;
- u32 word[2];
-} BATS[8][2]; /* 8 pairs of IBAT, DBAT */
+struct ppc_bat BATS[8][2]; /* 8 pairs of IBAT, DBAT */
struct batrange { /* stores address ranges mapped by BATs */
unsigned long start;
unsigned long limit;
- unsigned long phys;
+ phys_addr_t phys;
} bat_addrs[8];
/*
* Return PA for this VA if it is mapped by a BAT, or 0
*/
-unsigned long v_mapped_by_bats(unsigned long va)
+phys_addr_t v_mapped_by_bats(unsigned long va)
{
int b;
for (b = 0; b < 4; ++b)
@@ -64,7 +61,7 @@
/*
* Return VA for a given PA or 0 if not mapped
*/
-unsigned long p_mapped_by_bats(unsigned long pa)
+unsigned long p_mapped_by_bats(phys_addr_t pa)
{
int b;
for (b = 0; b < 4; ++b)
@@ -119,12 +116,12 @@
* The parameters are not checked; in particular size must be a power
* of 2 between 128k and 256M.
*/
-void __init setbat(int index, unsigned long virt, unsigned long phys,
+void __init setbat(int index, unsigned long virt, phys_addr_t phys,
unsigned int size, int flags)
{
unsigned int bl;
int wimgxpp;
- union ubat *bat = BATS[index];
+ struct ppc_bat *bat = BATS[index];
if (((flags & _PAGE_NO_CACHE) == 0) &&
cpu_has_feature(CPU_FTR_NEED_COHERENT))
@@ -137,15 +134,15 @@
wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
| _PAGE_COHERENT | _PAGE_GUARDED);
wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
- bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
- bat[1].word[1] = phys | wimgxpp;
+ bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
+ bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp;
#ifndef CONFIG_KGDB /* want user access for breakpoints */
if (flags & _PAGE_USER)
#endif
- bat[1].bat.batu.vp = 1;
+ bat[1].batu |= 1; /* Vp = 1 */
if (flags & _PAGE_GUARDED) {
/* G bit must be zero in IBATs */
- bat[0].word[0] = bat[0].word[1] = 0;
+ bat[0].batu = bat[0].batl = 0;
} else {
/* make IBAT same as DBAT */
bat[0] = bat[1];
@@ -158,8 +155,8 @@
| _PAGE_COHERENT);
wimgxpp |= (flags & _PAGE_RW)?
((flags & _PAGE_USER)? PP_RWRW: PP_RWXX): PP_RXRX;
- bat->word[0] = virt | wimgxpp | 4; /* Ks=0, Ku=1 */
- bat->word[1] = phys | bl | 0x40; /* V=1 */
+ bat->batu = virt | wimgxpp | 4; /* Ks=0, Ku=1 */
+ bat->batl = phys | bl | 0x40; /* V=1 */
}
bat_addrs[index].start = virt;
diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c
index 2bd12d9..db44e02 100644
--- a/arch/powerpc/mm/slice.c
+++ b/arch/powerpc/mm/slice.c
@@ -215,10 +215,7 @@
mm->context.high_slices_psize);
spin_unlock_irqrestore(&slice_convert_lock, flags);
- mb();
- /* XXX this is sub-optimal but will do for now */
- on_each_cpu(slice_flush_segments, mm, 1);
#ifdef CONFIG_SPU_BASE
spu_flush_all_slbs(mm);
#endif
@@ -384,17 +381,34 @@
return slice_find_area_bottomup(mm, len, mask, psize, use_cache);
}
+#define or_mask(dst, src) do { \
+ (dst).low_slices |= (src).low_slices; \
+ (dst).high_slices |= (src).high_slices; \
+} while (0)
+
+#define andnot_mask(dst, src) do { \
+ (dst).low_slices &= ~(src).low_slices; \
+ (dst).high_slices &= ~(src).high_slices; \
+} while (0)
+
+#ifdef CONFIG_PPC_64K_PAGES
+#define MMU_PAGE_BASE MMU_PAGE_64K
+#else
+#define MMU_PAGE_BASE MMU_PAGE_4K
+#endif
+
unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
unsigned long flags, unsigned int psize,
int topdown, int use_cache)
{
- struct slice_mask mask;
+ struct slice_mask mask = {0, 0};
struct slice_mask good_mask;
struct slice_mask potential_mask = {0,0} /* silence stupid warning */;
- int pmask_set = 0;
+ struct slice_mask compat_mask = {0, 0};
int fixed = (flags & MAP_FIXED);
int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT);
struct mm_struct *mm = current->mm;
+ unsigned long newaddr;
/* Sanity checks */
BUG_ON(mm->task_size == 0);
@@ -416,21 +430,48 @@
if (!fixed && addr) {
addr = _ALIGN_UP(addr, 1ul << pshift);
slice_dbg(" aligned addr=%lx\n", addr);
+ /* Ignore hint if it's too large or overlaps a VMA */
+ if (addr > mm->task_size - len ||
+ !slice_area_is_free(mm, addr, len))
+ addr = 0;
}
- /* First makeup a "good" mask of slices that have the right size
+ /* First make up a "good" mask of slices that have the right size
* already
*/
good_mask = slice_mask_for_size(mm, psize);
slice_print_mask(" good_mask", good_mask);
+ /*
+ * Here "good" means slices that are already the right page size,
+ * "compat" means slices that have a compatible page size (i.e.
+ * 4k in a 64k pagesize kernel), and "free" means slices without
+ * any VMAs.
+ *
+ * If MAP_FIXED:
+ * check if fits in good | compat => OK
+ * check if fits in good | compat | free => convert free
+ * else bad
+ * If have hint:
+ * check if hint fits in good => OK
+ * check if hint fits in good | free => convert free
+ * Otherwise:
+ * search in good, found => OK
+ * search in good | free, found => convert free
+ * search in good | compat | free, found => convert free.
+ */
+
+#ifdef CONFIG_PPC_64K_PAGES
+ /* If we support combo pages, we can allow 64k pages in 4k slices */
+ if (psize == MMU_PAGE_64K) {
+ compat_mask = slice_mask_for_size(mm, MMU_PAGE_4K);
+ if (fixed)
+ or_mask(good_mask, compat_mask);
+ }
+#endif
+
/* First check hint if it's valid or if we have MAP_FIXED */
- if ((addr != 0 || fixed) && (mm->task_size - len) >= addr) {
-
- /* Don't bother with hint if it overlaps a VMA */
- if (!fixed && !slice_area_is_free(mm, addr, len))
- goto search;
-
+ if (addr != 0 || fixed) {
/* Build a mask for the requested range */
mask = slice_range_to_mask(addr, len);
slice_print_mask(" mask", mask);
@@ -442,54 +483,66 @@
slice_dbg(" fits good !\n");
return addr;
}
-
- /* We don't fit in the good mask, check what other slices are
- * empty and thus can be converted
+ } else {
+ /* Now let's see if we can find something in the existing
+ * slices for that size
*/
- potential_mask = slice_mask_for_free(mm);
- potential_mask.low_slices |= good_mask.low_slices;
- potential_mask.high_slices |= good_mask.high_slices;
- pmask_set = 1;
- slice_print_mask(" potential", potential_mask);
- if (slice_check_fit(mask, potential_mask)) {
- slice_dbg(" fits potential !\n");
- goto convert;
+ newaddr = slice_find_area(mm, len, good_mask, psize, topdown,
+ use_cache);
+ if (newaddr != -ENOMEM) {
+ /* Found within the good mask, we don't have to setup,
+ * we thus return directly
+ */
+ slice_dbg(" found area at 0x%lx\n", newaddr);
+ return newaddr;
}
}
- /* If we have MAP_FIXED and failed the above step, then error out */
+ /* We don't fit in the good mask, check what other slices are
+ * empty and thus can be converted
+ */
+ potential_mask = slice_mask_for_free(mm);
+ or_mask(potential_mask, good_mask);
+ slice_print_mask(" potential", potential_mask);
+
+ if ((addr != 0 || fixed) && slice_check_fit(mask, potential_mask)) {
+ slice_dbg(" fits potential !\n");
+ goto convert;
+ }
+
+ /* If we have MAP_FIXED and failed the above steps, then error out */
if (fixed)
return -EBUSY;
- search:
slice_dbg(" search...\n");
- /* Now let's see if we can find something in the existing slices
- * for that size
+ /* If we had a hint that didn't work out, see if we can fit
+ * anywhere in the good area.
*/
- addr = slice_find_area(mm, len, good_mask, psize, topdown, use_cache);
- if (addr != -ENOMEM) {
- /* Found within the good mask, we don't have to setup,
- * we thus return directly
- */
- slice_dbg(" found area at 0x%lx\n", addr);
- return addr;
- }
-
- /* Won't fit, check what can be converted */
- if (!pmask_set) {
- potential_mask = slice_mask_for_free(mm);
- potential_mask.low_slices |= good_mask.low_slices;
- potential_mask.high_slices |= good_mask.high_slices;
- pmask_set = 1;
- slice_print_mask(" potential", potential_mask);
+ if (addr) {
+ addr = slice_find_area(mm, len, good_mask, psize, topdown,
+ use_cache);
+ if (addr != -ENOMEM) {
+ slice_dbg(" found area at 0x%lx\n", addr);
+ return addr;
+ }
}
/* Now let's see if we can find something in the existing slices
- * for that size
+ * for that size plus free slices
*/
addr = slice_find_area(mm, len, potential_mask, psize, topdown,
use_cache);
+
+#ifdef CONFIG_PPC_64K_PAGES
+ if (addr == -ENOMEM && psize == MMU_PAGE_64K) {
+ /* retry the search with 4k-page slices included */
+ or_mask(potential_mask, compat_mask);
+ addr = slice_find_area(mm, len, potential_mask, psize,
+ topdown, use_cache);
+ }
+#endif
+
if (addr == -ENOMEM)
return -ENOMEM;
@@ -498,7 +551,13 @@
slice_print_mask(" mask", mask);
convert:
- slice_convert(mm, mask, psize);
+ andnot_mask(mask, good_mask);
+ andnot_mask(mask, compat_mask);
+ if (mask.low_slices || mask.high_slices) {
+ slice_convert(mm, mask, psize);
+ if (psize > MMU_PAGE_BASE)
+ on_each_cpu(slice_flush_segments, mm, 1);
+ }
return addr;
}
@@ -598,6 +657,36 @@
spin_unlock_irqrestore(&slice_convert_lock, flags);
}
+void slice_set_psize(struct mm_struct *mm, unsigned long address,
+ unsigned int psize)
+{
+ unsigned long i, flags;
+ u64 *p;
+
+ spin_lock_irqsave(&slice_convert_lock, flags);
+ if (address < SLICE_LOW_TOP) {
+ i = GET_LOW_SLICE_INDEX(address);
+ p = &mm->context.low_slices_psize;
+ } else {
+ i = GET_HIGH_SLICE_INDEX(address);
+ p = &mm->context.high_slices_psize;
+ }
+ *p = (*p & ~(0xful << (i * 4))) | ((unsigned long) psize << (i * 4));
+ spin_unlock_irqrestore(&slice_convert_lock, flags);
+
+#ifdef CONFIG_SPU_BASE
+ spu_flush_all_slbs(mm);
+#endif
+}
+
+void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
+ unsigned long len, unsigned int psize)
+{
+ struct slice_mask mask = slice_range_to_mask(start, len);
+
+ slice_convert(mm, mask, psize);
+}
+
/*
* is_hugepage_only_range() is used by generic code to verify wether
* a normal mmap mapping (non hugetlbfs) is valid on a given area.
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c
index efbbd13..60e6032 100644
--- a/arch/powerpc/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
@@ -30,8 +30,8 @@
};
#define NR_STAB_CACHE_ENTRIES 8
-DEFINE_PER_CPU(long, stab_cache_ptr);
-DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]);
+static DEFINE_PER_CPU(long, stab_cache_ptr);
+static DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]);
/*
* Create a segment table entry for the given esid/vsid pair.
diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_64.c
index 69ad829..a01b5c6 100644
--- a/arch/powerpc/mm/tlb_64.c
+++ b/arch/powerpc/mm/tlb_64.c
@@ -37,8 +37,8 @@
* include/asm-powerpc/tlb.h file -- tgall
*/
DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
-unsigned long pte_freelist_forced_free;
+static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
+static unsigned long pte_freelist_forced_free;
struct pte_freelist_batch
{
@@ -47,9 +47,6 @@
pgtable_free_t tables[0];
};
-DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
-unsigned long pte_freelist_forced_free;
-
#define PTE_FREELIST_SIZE \
((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
/ sizeof(pgtable_free_t))
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 6abe913..249ba01 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -17,6 +17,15 @@
help
This option enables support for the IBM PPC440GP evaluation board.
+config SAM440EP
+ bool "Sam440ep"
+ depends on 44x
+ default n
+ select 440EP
+ select PCI
+ help
+ This option enables support for the ACube Sam440ep board.
+
config SEQUOIA
bool "Sequoia"
depends on 44x
@@ -102,6 +111,22 @@
# help
# This option enables support for the IBM PPC440GX evaluation board.
+config XILINX_VIRTEX440_GENERIC_BOARD
+ bool "Generic Xilinx Virtex 440 board"
+ depends on 44x
+ default n
+ select XILINX_VIRTEX_5_FXT
+ help
+ This option enables generic support for Xilinx Virtex based boards
+ that use a 440 based processor in the Virtex 5 FXT FPGA architecture.
+
+ The generic virtex board support matches any device tree which
+ specifies 'xlnx,virtex440' in its compatible field. This includes
+ the Xilinx ML5xx reference designs using the powerpc core.
+
+ Most Virtex 5 designs should use this unless it needs to do some
+ special configuration at board probe time.
+
# 44x specific CPU modules, selected based on the board above.
config 440EP
bool
@@ -152,3 +177,13 @@
# 44x errata/workaround config symbols, selected by the CPU models above
config IBM440EP_ERR42
bool
+
+# Xilinx specific config options.
+config XILINX_VIRTEX
+ bool
+
+# Xilinx Virtex 5 FXT FPGA architecture, selected by a Xilinx board above
+config XILINX_VIRTEX_5_FXT
+ bool
+ select XILINX_VIRTEX
+
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 774165f..8d0b1a1 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -3,9 +3,11 @@
obj-$(CONFIG_TAISHAN) += taishan.o
obj-$(CONFIG_BAMBOO) += bamboo.o
obj-$(CONFIG_YOSEMITE) += bamboo.o
+obj-$(CONFIG_SAM440EP) += sam440ep.o
obj-$(CONFIG_SEQUOIA) += sequoia.o
obj-$(CONFIG_KATMAI) += katmai.o
obj-$(CONFIG_RAINIER) += rainier.o
obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_WARP) += warp-nand.o
obj-$(CONFIG_CANYONLANDS) += canyonlands.o
+obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
diff --git a/arch/powerpc/platforms/44x/sam440ep.c b/arch/powerpc/platforms/44x/sam440ep.c
new file mode 100644
index 0000000..47f10e6
--- /dev/null
+++ b/arch/powerpc/platforms/44x/sam440ep.c
@@ -0,0 +1,79 @@
+/*
+ * Sam440ep board specific routines based off bamboo.c code
+ * original copyrights below
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ * Copyright 2004 MontaVista Software Inc.
+ *
+ * Rewritten and ported to the merged powerpc tree:
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright 2007 IBM Corporation
+ *
+ * Modified from bamboo.c for sam440ep:
+ * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/pci-bridge.h>
+#include <asm/ppc4xx.h>
+#include <linux/i2c.h>
+
+static __initdata struct of_device_id sam440ep_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ {},
+};
+
+static int __init sam440ep_device_probe(void)
+{
+ of_platform_bus_probe(NULL, sam440ep_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(sam440ep, sam440ep_device_probe);
+
+static int __init sam440ep_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "acube,sam440ep"))
+ return 0;
+
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
+ return 1;
+}
+
+define_machine(sam440ep) {
+ .name = "Sam440ep",
+ .probe = sam440ep_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .restart = ppc4xx_reset_system,
+ .calibrate_decr = generic_calibrate_decr,
+};
+
+static struct i2c_board_info sam440ep_rtc_info = {
+ .type = "m41st85",
+ .addr = 0x68,
+ .irq = -1,
+};
+
+static int sam440ep_setup_rtc(void)
+{
+ return i2c_register_board_info(0, &sam440ep_rtc_info, 1);
+}
+machine_device_initcall(sam440ep, sam440ep_setup_rtc);
diff --git a/arch/powerpc/platforms/44x/virtex.c b/arch/powerpc/platforms/44x/virtex.c
new file mode 100644
index 0000000..68637fa
--- /dev/null
+++ b/arch/powerpc/platforms/44x/virtex.c
@@ -0,0 +1,60 @@
+/*
+ * Xilinx Virtex 5FXT based board support, derived from
+ * the Xilinx Virtex (IIpro & 4FX) based board support
+ *
+ * Copyright 2007 Secret Lab Technologies Ltd.
+ * Copyright 2008 Xilinx, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+#include <asm/xilinx_intc.h>
+#include <asm/reg.h>
+#include <asm/ppc4xx.h>
+#include "44x.h"
+
+static struct of_device_id xilinx_of_bus_ids[] __initdata = {
+ { .compatible = "simple-bus", },
+ { .compatible = "xlnx,plb-v46-1.00.a", },
+ { .compatible = "xlnx,plb-v46-1.02.a", },
+ { .compatible = "xlnx,plb-v34-1.01.a", },
+ { .compatible = "xlnx,plb-v34-1.02.a", },
+ { .compatible = "xlnx,opb-v20-1.10.c", },
+ { .compatible = "xlnx,dcr-v29-1.00.a", },
+ { .compatible = "xlnx,compound", },
+ {}
+};
+
+static int __init virtex_device_probe(void)
+{
+ of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(virtex, virtex_device_probe);
+
+static int __init virtex_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "xlnx,virtex440"))
+ return 0;
+
+ return 1;
+}
+
+define_machine(virtex) {
+ .name = "Xilinx Virtex440",
+ .probe = virtex_probe,
+ .init_IRQ = xilinx_intc_init_tree,
+ .get_irq = xilinx_intc_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+ .restart = ppc4xx_reset_system,
+};
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
index 9150318..e55746b 100644
--- a/arch/powerpc/platforms/44x/warp-nand.c
+++ b/arch/powerpc/platforms/44x/warp-nand.c
@@ -11,8 +11,10 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/ndfc.h>
+#include <linux/of.h>
#include <asm/machdep.h>
+
#ifdef CONFIG_MTD_NAND_NDFC
#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */
@@ -35,13 +37,23 @@
{
.name = "root",
.offset = 0x0200000,
- .size = 0x3400000
+ .size = 0x3E00000
},
{
- .name = "user",
- .offset = 0x3600000,
- .size = 0x0A00000
+ .name = "persistent",
+ .offset = 0x4000000,
+ .size = 0x4000000
},
+ {
+ .name = "persistent1",
+ .offset = 0x8000000,
+ .size = 0x4000000
+ },
+ {
+ .name = "persistent2",
+ .offset = 0xC000000,
+ .size = 0x4000000
+ }
};
struct ndfc_controller_settings warp_ndfc_settings = {
@@ -67,27 +79,22 @@
.resource = &warp_ndfc,
};
-static struct nand_ecclayout nand_oob_16 = {
- .eccbytes = 3,
- .eccpos = { 0, 1, 2, 3, 6, 7 },
- .oobfree = { {.offset = 8, .length = 16} }
-};
-
+/* Do NOT set the ecclayout: let it default so it is correct for both
+ * 64M and 256M flash chips.
+ */
static struct platform_nand_chip warp_nand_chip0 = {
.nr_chips = 1,
.chip_offset = CS_NAND_0,
.nr_partitions = ARRAY_SIZE(nand_parts),
.partitions = nand_parts,
- .chip_delay = 50,
- .ecclayout = &nand_oob_16,
+ .chip_delay = 20,
.priv = &warp_chip0_settings,
};
static struct platform_device warp_nand_device = {
.name = "ndfc-chip",
.id = 0,
- .num_resources = 1,
- .resource = &warp_ndfc,
+ .num_resources = 0,
.dev = {
.platform_data = &warp_nand_chip0,
.parent = &warp_ndfc_device.dev,
@@ -96,6 +103,28 @@
static int warp_setup_nand_flash(void)
{
+ struct device_node *np;
+
+ /* Try to detect a rev A based on NOR size. */
+ np = of_find_compatible_node(NULL, NULL, "cfi-flash");
+ if (np) {
+ struct property *pp;
+
+ pp = of_find_property(np, "reg", NULL);
+ if (pp && (pp->length == 12)) {
+ u32 *v = pp->value;
+ if (v[2] == 0x4000000) {
+ /* Rev A = 64M NAND */
+ warp_nand_chip0.nr_partitions = 3;
+
+ nand_parts[1].size = 0x3000000;
+ nand_parts[2].offset = 0x3200000;
+ nand_parts[2].size = 0x0e00000;
+ }
+ }
+ of_node_put(np);
+ }
+
platform_device_register(&warp_ndfc_device);
platform_device_register(&warp_nand_device);
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
index 39cf615..9565995 100644
--- a/arch/powerpc/platforms/44x/warp.c
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -12,6 +12,9 @@
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/kthread.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
#include <asm/machdep.h>
#include <asm/prom.h>
@@ -27,6 +30,18 @@
{},
};
+static __initdata struct i2c_board_info warp_i2c_info[] = {
+ { I2C_BOARD_INFO("ad7414", 0x4a) }
+};
+
+static int __init warp_arch_init(void)
+{
+ /* This should go away once support is moved to the dts. */
+ i2c_register_board_info(0, warp_i2c_info, ARRAY_SIZE(warp_i2c_info));
+ return 0;
+}
+machine_arch_initcall(warp, warp_arch_init);
+
static int __init warp_device_probe(void)
{
of_platform_bus_probe(NULL, warp_of_bus, NULL);
@@ -52,61 +67,232 @@
};
-#define LED_GREEN (0x80000000 >> 0)
-#define LED_RED (0x80000000 >> 1)
-
-
-/* This is for the power LEDs 1 = on, 0 = off, -1 = leave alone */
-void warp_set_power_leds(int green, int red)
+/* I am not sure this is the best place for this... */
+static int __init warp_post_info(void)
{
- static void __iomem *gpio_base = NULL;
- unsigned leds;
+ struct device_node *np;
+ void __iomem *fpga;
+ u32 post1, post2;
- if (gpio_base == NULL) {
- struct device_node *np;
+ /* Sighhhh... POST information is in the sd area. */
+ np = of_find_compatible_node(NULL, NULL, "pika,fpga-sd");
+ if (np == NULL)
+ return -ENOENT;
- /* Power LEDS are on the second GPIO controller */
- np = of_find_compatible_node(NULL, NULL, "ibm,gpio-440EP");
- if (np)
- np = of_find_compatible_node(np, NULL, "ibm,gpio-440EP");
- if (np == NULL) {
- printk(KERN_ERR __FILE__ ": Unable to find gpio\n");
- return;
- }
+ fpga = of_iomap(np, 0);
+ of_node_put(np);
+ if (fpga == NULL)
+ return -ENOENT;
- gpio_base = of_iomap(np, 0);
- of_node_put(np);
- if (gpio_base == NULL) {
- printk(KERN_ERR __FILE__ ": Unable to map gpio");
- return;
- }
- }
+ post1 = in_be32(fpga + 0x40);
+ post2 = in_be32(fpga + 0x44);
- leds = in_be32(gpio_base);
+ iounmap(fpga);
- switch (green) {
- case 0: leds &= ~LED_GREEN; break;
- case 1: leds |= LED_GREEN; break;
- }
- switch (red) {
- case 0: leds &= ~LED_RED; break;
- case 1: leds |= LED_RED; break;
- }
+ if (post1 || post2)
+ printk(KERN_INFO "Warp POST %08x %08x\n", post1, post2);
+ else
+ printk(KERN_INFO "Warp POST OK\n");
- out_be32(gpio_base, leds);
+ return 0;
}
-EXPORT_SYMBOL(warp_set_power_leds);
+machine_late_initcall(warp, warp_post_info);
#ifdef CONFIG_SENSORS_AD7414
+
+static LIST_HEAD(dtm_shutdown_list);
+static void __iomem *dtm_fpga;
+static void __iomem *gpio_base;
+
+
+struct dtm_shutdown {
+ struct list_head list;
+ void (*func)(void *arg);
+ void *arg;
+};
+
+
+int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg)
+{
+ struct dtm_shutdown *shutdown;
+
+ shutdown = kmalloc(sizeof(struct dtm_shutdown), GFP_KERNEL);
+ if (shutdown == NULL)
+ return -ENOMEM;
+
+ shutdown->func = func;
+ shutdown->arg = arg;
+
+ list_add(&shutdown->list, &dtm_shutdown_list);
+
+ return 0;
+}
+
+int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg)
+{
+ struct dtm_shutdown *shutdown;
+
+ list_for_each_entry(shutdown, &dtm_shutdown_list, list)
+ if (shutdown->func == func && shutdown->arg == arg) {
+ list_del(&shutdown->list);
+ kfree(shutdown);
+ return 0;
+ }
+
+ return -EINVAL;
+}
+
+static irqreturn_t temp_isr(int irq, void *context)
+{
+ struct dtm_shutdown *shutdown;
+
+ local_irq_disable();
+
+ /* Run through the shutdown list. */
+ list_for_each_entry(shutdown, &dtm_shutdown_list, list)
+ shutdown->func(shutdown->arg);
+
+ printk(KERN_EMERG "\n\nCritical Temperature Shutdown\n");
+
+ while (1) {
+ if (dtm_fpga) {
+ unsigned reset = in_be32(dtm_fpga + 0x14);
+ out_be32(dtm_fpga + 0x14, reset);
+ }
+
+ if (gpio_base) {
+ unsigned leds = in_be32(gpio_base);
+
+ /* green off, red toggle */
+ leds &= ~0x80000000;
+ leds ^= 0x40000000;
+
+ out_be32(gpio_base, leds);
+ }
+
+ mdelay(500);
+ }
+}
+
+static int pika_setup_leds(void)
+{
+ struct device_node *np;
+ const u32 *gpios;
+ int len;
+
+ np = of_find_compatible_node(NULL, NULL, "linux,gpio-led");
+ if (!np) {
+ printk(KERN_ERR __FILE__ ": Unable to find gpio-led\n");
+ return -ENOENT;
+ }
+
+ gpios = of_get_property(np, "gpios", &len);
+ of_node_put(np);
+ if (!gpios || len < 4) {
+ printk(KERN_ERR __FILE__
+ ": Unable to get gpios property (%d)\n", len);
+ return -ENOENT;
+ }
+
+ np = of_find_node_by_phandle(gpios[0]);
+ if (!np) {
+ printk(KERN_ERR __FILE__ ": Unable to find gpio\n");
+ return -ENOENT;
+ }
+
+ gpio_base = of_iomap(np, 0);
+ of_node_put(np);
+ if (!gpio_base) {
+ printk(KERN_ERR __FILE__ ": Unable to map gpio");
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+static void pika_setup_critical_temp(struct i2c_client *client)
+{
+ struct device_node *np;
+ int irq, rc;
+
+ /* Do this before enabling critical temp interrupt since we
+ * may immediately interrupt.
+ */
+ pika_setup_leds();
+
+ /* These registers are in 1 degree increments. */
+ i2c_smbus_write_byte_data(client, 2, 65); /* Thigh */
+ i2c_smbus_write_byte_data(client, 3, 55); /* Tlow */
+
+ np = of_find_compatible_node(NULL, NULL, "adi,ad7414");
+ if (np == NULL) {
+ printk(KERN_ERR __FILE__ ": Unable to find ad7414\n");
+ return;
+ }
+
+ irq = irq_of_parse_and_map(np, 0);
+ of_node_put(np);
+ if (irq == NO_IRQ) {
+ printk(KERN_ERR __FILE__ ": Unable to get ad7414 irq\n");
+ return;
+ }
+
+ rc = request_irq(irq, temp_isr, 0, "ad7414", NULL);
+ if (rc) {
+ printk(KERN_ERR __FILE__
+ ": Unable to request ad7414 irq %d = %d\n", irq, rc);
+ return;
+ }
+}
+
+static inline void pika_dtm_check_fan(void __iomem *fpga)
+{
+ static int fan_state;
+ u32 fan = in_be32(fpga + 0x34) & (1 << 14);
+
+ if (fan_state != fan) {
+ fan_state = fan;
+ if (fan)
+ printk(KERN_WARNING "Fan rotation error detected."
+ " Please check hardware.\n");
+ }
+}
+
static int pika_dtm_thread(void __iomem *fpga)
{
- extern int ad7414_get_temp(int index);
+ struct i2c_adapter *adap;
+ struct i2c_client *client;
+
+ /* We loop in case either driver was compiled as a module and
+ * has not been insmoded yet.
+ */
+ while (!(adap = i2c_get_adapter(0))) {
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(HZ);
+ }
+
+ while (1) {
+ list_for_each_entry(client, &adap->clients, list)
+ if (client->addr == 0x4a)
+ goto found_it;
+
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(HZ);
+ }
+
+found_it:
+ i2c_put_adapter(adap);
+
+ pika_setup_critical_temp(client);
+
+ printk(KERN_INFO "PIKA DTM thread running.\n");
while (!kthread_should_stop()) {
- int temp = ad7414_get_temp(0);
+ u16 temp = swab16(i2c_smbus_read_word_data(client, 0));
+ out_be32(fpga + 0x20, temp);
- out_be32(fpga, temp);
+ pika_dtm_check_fan(fpga);
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(HZ);
@@ -115,37 +301,44 @@
return 0;
}
+
static int __init pika_dtm_start(void)
{
struct task_struct *dtm_thread;
struct device_node *np;
- struct resource res;
- void __iomem *fpga;
np = of_find_compatible_node(NULL, NULL, "pika,fpga");
if (np == NULL)
return -ENOENT;
- /* We do not call of_iomap here since it would map in the entire
- * fpga space, which is over 8k.
- */
- if (of_address_to_resource(np, 0, &res)) {
- of_node_put(np);
- return -ENOENT;
- }
+ dtm_fpga = of_iomap(np, 0);
of_node_put(np);
-
- fpga = ioremap(res.start, 0x24);
- if (fpga == NULL)
+ if (dtm_fpga == NULL)
return -ENOENT;
- dtm_thread = kthread_run(pika_dtm_thread, fpga + 0x20, "pika-dtm");
+ dtm_thread = kthread_run(pika_dtm_thread, dtm_fpga, "pika-dtm");
if (IS_ERR(dtm_thread)) {
- iounmap(fpga);
+ iounmap(dtm_fpga);
return PTR_ERR(dtm_thread);
}
return 0;
}
-device_initcall(pika_dtm_start);
+machine_late_initcall(warp, pika_dtm_start);
+
+#else /* !CONFIG_SENSORS_AD7414 */
+
+int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg)
+{
+ return 0;
+}
+
+int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg)
+{
+ return 0;
+}
+
#endif
+
+EXPORT_SYMBOL(pika_dtm_register_shutdown);
+EXPORT_SYMBOL(pika_dtm_unregister_shutdown);
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 4c0da0c..c62f893 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -2,18 +2,29 @@
bool
select FSL_SOC
select IPIC
- default n
+ select PPC_CLOCK
config PPC_MPC5121
bool
select PPC_MPC512x
- default n
config MPC5121_ADS
bool "Freescale MPC5121E ADS"
depends on PPC_MULTIPLATFORM && PPC32
select DEFAULT_UIMAGE
select PPC_MPC5121
+ select MPC5121_ADS_CPLD
help
This option enables support for the MPC5121E ADS board.
- default n
+
+config MPC5121_GENERIC
+ bool "Generic support for simple MPC5121 based boards"
+ depends on PPC_MULTIPLATFORM && PPC32
+ select DEFAULT_UIMAGE
+ select PPC_MPC5121
+ help
+ This option enables support for simple MPC5121 based boards
+ which do not need custom platform specific setup.
+
+ Compatible boards include: Protonic LVT base boards (ZANMCU
+ and VICVT2).
diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile
index 232c89f..90be2f5 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,4 +1,6 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
-obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o
+obj-y += clock.o mpc512x_shared.o
+obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
+obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
new file mode 100644
index 0000000..f416014
--- /dev/null
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -0,0 +1,729 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby <jrigby@freescale.com>
+ *
+ * Implements the clk api defined in include/linux/clk.h
+ *
+ * Original based on linux/arch/arm/mach-integrator/clock.c
+ *
+ * Copyright (C) 2004 ARM Limited.
+ * Written by Deep Blue Solutions Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/clk.h>
+#include <linux/mutex.h>
+#include <linux/io.h>
+
+#include <linux/of_platform.h>
+#include <asm/mpc512x.h>
+#include <asm/clk_interface.h>
+
+#undef CLK_DEBUG
+
+static int clocks_initialized;
+
+#define CLK_HAS_RATE 0x1 /* has rate in MHz */
+#define CLK_HAS_CTRL 0x2 /* has control reg and bit */
+
+struct clk {
+ struct list_head node;
+ char name[32];
+ int flags;
+ struct device *dev;
+ unsigned long rate;
+ struct module *owner;
+ void (*calc) (struct clk *);
+ struct clk *parent;
+ int reg, bit; /* CLK_HAS_CTRL */
+ int div_shift; /* only used by generic_div_clk_calc */
+};
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+
+static struct clk *mpc5121_clk_get(struct device *dev, const char *id)
+{
+ struct clk *p, *clk = ERR_PTR(-ENOENT);
+ int dev_match = 0;
+ int id_match = 0;
+
+ if (dev == NULL && id == NULL)
+ return NULL;
+
+ mutex_lock(&clocks_mutex);
+ list_for_each_entry(p, &clocks, node) {
+ if (dev && dev == p->dev)
+ dev_match++;
+ if (strcmp(id, p->name) == 0)
+ id_match++;
+ if ((dev_match || id_match) && try_module_get(p->owner)) {
+ clk = p;
+ break;
+ }
+ }
+ mutex_unlock(&clocks_mutex);
+
+ return clk;
+}
+
+#ifdef CLK_DEBUG
+static void dump_clocks(void)
+{
+ struct clk *p;
+
+ mutex_lock(&clocks_mutex);
+ printk(KERN_INFO "CLOCKS:\n");
+ list_for_each_entry(p, &clocks, node) {
+ printk(KERN_INFO " %s %ld", p->name, p->rate);
+ if (p->parent)
+ printk(KERN_INFO " %s %ld", p->parent->name,
+ p->parent->rate);
+ if (p->flags & CLK_HAS_CTRL)
+ printk(KERN_INFO " reg/bit %d/%d", p->reg, p->bit);
+ printk("\n");
+ }
+ mutex_unlock(&clocks_mutex);
+}
+#define DEBUG_CLK_DUMP() dump_clocks()
+#else
+#define DEBUG_CLK_DUMP()
+#endif
+
+
+static void mpc5121_clk_put(struct clk *clk)
+{
+ module_put(clk->owner);
+}
+
+#define NRPSC 12
+
+struct mpc512x_clockctl {
+ u32 spmr; /* System PLL Mode Reg */
+ u32 sccr[2]; /* System Clk Ctrl Reg 1 & 2 */
+ u32 scfr1; /* System Clk Freq Reg 1 */
+ u32 scfr2; /* System Clk Freq Reg 2 */
+ u32 reserved;
+ u32 bcr; /* Bread Crumb Reg */
+ u32 pccr[NRPSC]; /* PSC Clk Ctrl Reg 0-11 */
+ u32 spccr; /* SPDIF Clk Ctrl Reg */
+ u32 cccr; /* CFM Clk Ctrl Reg */
+ u32 dccr; /* DIU Clk Cnfg Reg */
+};
+
+struct mpc512x_clockctl __iomem *clockctl;
+
+static int mpc5121_clk_enable(struct clk *clk)
+{
+ unsigned int mask;
+
+ if (clk->flags & CLK_HAS_CTRL) {
+ mask = in_be32(&clockctl->sccr[clk->reg]);
+ mask |= 1 << clk->bit;
+ out_be32(&clockctl->sccr[clk->reg], mask);
+ }
+ return 0;
+}
+
+static void mpc5121_clk_disable(struct clk *clk)
+{
+ unsigned int mask;
+
+ if (clk->flags & CLK_HAS_CTRL) {
+ mask = in_be32(&clockctl->sccr[clk->reg]);
+ mask &= ~(1 << clk->bit);
+ out_be32(&clockctl->sccr[clk->reg], mask);
+ }
+}
+
+static unsigned long mpc5121_clk_get_rate(struct clk *clk)
+{
+ if (clk->flags & CLK_HAS_RATE)
+ return clk->rate;
+ else
+ return 0;
+}
+
+static long mpc5121_clk_round_rate(struct clk *clk, unsigned long rate)
+{
+ return rate;
+}
+
+static int mpc5121_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+ return 0;
+}
+
+static int clk_register(struct clk *clk)
+{
+ mutex_lock(&clocks_mutex);
+ list_add(&clk->node, &clocks);
+ mutex_unlock(&clocks_mutex);
+ return 0;
+}
+
+static unsigned long spmf_mult(void)
+{
+ /*
+ * Convert spmf to multiplier
+ */
+ static int spmf_to_mult[] = {
+ 68, 1, 12, 16,
+ 20, 24, 28, 32,
+ 36, 40, 44, 48,
+ 52, 56, 60, 64
+ };
+ int spmf = (clockctl->spmr >> 24) & 0xf;
+ return spmf_to_mult[spmf];
+}
+
+static unsigned long sysdiv_div_x_2(void)
+{
+ /*
+ * Convert sysdiv to divisor x 2
+ * Some divisors have fractional parts so
+ * multiply by 2 then divide by this value
+ */
+ static int sysdiv_to_div_x_2[] = {
+ 4, 5, 6, 7,
+ 8, 9, 10, 14,
+ 12, 16, 18, 22,
+ 20, 24, 26, 30,
+ 28, 32, 34, 38,
+ 36, 40, 42, 46,
+ 44, 48, 50, 54,
+ 52, 56, 58, 62,
+ 60, 64, 66,
+ };
+ int sysdiv = (clockctl->scfr2 >> 26) & 0x3f;
+ return sysdiv_to_div_x_2[sysdiv];
+}
+
+static unsigned long ref_to_sys(unsigned long rate)
+{
+ rate *= spmf_mult();
+ rate *= 2;
+ rate /= sysdiv_div_x_2();
+
+ return rate;
+}
+
+static unsigned long sys_to_ref(unsigned long rate)
+{
+ rate *= sysdiv_div_x_2();
+ rate /= 2;
+ rate /= spmf_mult();
+
+ return rate;
+}
+
+static long ips_to_ref(unsigned long rate)
+{
+ int ips_div = (clockctl->scfr1 >> 23) & 0x7;
+
+ rate *= ips_div; /* csb_clk = ips_clk * ips_div */
+ rate *= 2; /* sys_clk = csb_clk * 2 */
+ return sys_to_ref(rate);
+}
+
+static unsigned long devtree_getfreq(char *clockname)
+{
+ struct device_node *np;
+ const unsigned int *prop;
+ unsigned int val = 0;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-immr");
+ if (np) {
+ prop = of_get_property(np, clockname, NULL);
+ if (prop)
+ val = *prop;
+ of_node_put(np);
+ }
+ return val;
+}
+
+static void ref_clk_calc(struct clk *clk)
+{
+ unsigned long rate;
+
+ rate = devtree_getfreq("bus-frequency");
+ if (rate == 0) {
+ printk(KERN_ERR "No bus-frequency in dev tree\n");
+ clk->rate = 0;
+ return;
+ }
+ clk->rate = ips_to_ref(rate);
+}
+
+static struct clk ref_clk = {
+ .name = "ref_clk",
+ .calc = ref_clk_calc,
+};
+
+
+static void sys_clk_calc(struct clk *clk)
+{
+ clk->rate = ref_to_sys(ref_clk.rate);
+}
+
+static struct clk sys_clk = {
+ .name = "sys_clk",
+ .calc = sys_clk_calc,
+};
+
+static void diu_clk_calc(struct clk *clk)
+{
+ int diudiv_x_2 = clockctl->scfr1 & 0xff;
+ unsigned long rate;
+
+ rate = sys_clk.rate;
+
+ rate *= 2;
+ rate /= diudiv_x_2;
+
+ clk->rate = rate;
+}
+
+static void half_clk_calc(struct clk *clk)
+{
+ clk->rate = clk->parent->rate / 2;
+}
+
+static void generic_div_clk_calc(struct clk *clk)
+{
+ int div = (clockctl->scfr1 >> clk->div_shift) & 0x7;
+
+ clk->rate = clk->parent->rate / div;
+}
+
+static void unity_clk_calc(struct clk *clk)
+{
+ clk->rate = clk->parent->rate;
+}
+
+static struct clk csb_clk = {
+ .name = "csb_clk",
+ .calc = half_clk_calc,
+ .parent = &sys_clk,
+};
+
+static void e300_clk_calc(struct clk *clk)
+{
+ int spmf = (clockctl->spmr >> 16) & 0xf;
+ int ratex2 = clk->parent->rate * spmf;
+
+ clk->rate = ratex2 / 2;
+}
+
+static struct clk e300_clk = {
+ .name = "e300_clk",
+ .calc = e300_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk ips_clk = {
+ .name = "ips_clk",
+ .calc = generic_div_clk_calc,
+ .parent = &csb_clk,
+ .div_shift = 23,
+};
+
+/*
+ * Clocks controlled by SCCR1 (.reg = 0)
+ */
+static struct clk lpc_clk = {
+ .name = "lpc_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 30,
+ .calc = generic_div_clk_calc,
+ .parent = &ips_clk,
+ .div_shift = 11,
+};
+
+static struct clk nfc_clk = {
+ .name = "nfc_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 29,
+ .calc = generic_div_clk_calc,
+ .parent = &ips_clk,
+ .div_shift = 8,
+};
+
+static struct clk pata_clk = {
+ .name = "pata_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 28,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+/*
+ * PSC clocks (bits 27 - 16)
+ * are setup elsewhere
+ */
+
+static struct clk sata_clk = {
+ .name = "sata_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 14,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk fec_clk = {
+ .name = "fec_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 13,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk pci_clk = {
+ .name = "pci_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 0,
+ .bit = 11,
+ .calc = generic_div_clk_calc,
+ .parent = &csb_clk,
+ .div_shift = 20,
+};
+
+/*
+ * Clocks controlled by SCCR2 (.reg = 1)
+ */
+static struct clk diu_clk = {
+ .name = "diu_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 31,
+ .calc = diu_clk_calc,
+};
+
+static struct clk axe_clk = {
+ .name = "axe_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 30,
+ .calc = unity_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk usb1_clk = {
+ .name = "usb1_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 28,
+ .calc = unity_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk usb2_clk = {
+ .name = "usb2_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 27,
+ .calc = unity_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk i2c_clk = {
+ .name = "i2c_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 26,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk mscan_clk = {
+ .name = "mscan_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 25,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk sdhc_clk = {
+ .name = "sdhc_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 24,
+ .calc = unity_clk_calc,
+ .parent = &ips_clk,
+};
+
+static struct clk mbx_bus_clk = {
+ .name = "mbx_bus_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 22,
+ .calc = half_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk mbx_clk = {
+ .name = "mbx_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 21,
+ .calc = unity_clk_calc,
+ .parent = &csb_clk,
+};
+
+static struct clk mbx_3d_clk = {
+ .name = "mbx_3d_clk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 20,
+ .calc = generic_div_clk_calc,
+ .parent = &mbx_bus_clk,
+ .div_shift = 14,
+};
+
+static void psc_mclk_in_calc(struct clk *clk)
+{
+ clk->rate = devtree_getfreq("psc_mclk_in");
+ if (!clk->rate)
+ clk->rate = 25000000;
+}
+
+static struct clk psc_mclk_in = {
+ .name = "psc_mclk_in",
+ .calc = psc_mclk_in_calc,
+};
+
+static struct clk spdif_txclk = {
+ .name = "spdif_txclk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 23,
+};
+
+static struct clk spdif_rxclk = {
+ .name = "spdif_rxclk",
+ .flags = CLK_HAS_CTRL,
+ .reg = 1,
+ .bit = 23,
+};
+
+static void ac97_clk_calc(struct clk *clk)
+{
+ /* ac97 bit clock is always 24.567 MHz */
+ clk->rate = 24567000;
+}
+
+static struct clk ac97_clk = {
+ .name = "ac97_clk_in",
+ .calc = ac97_clk_calc,
+};
+
+struct clk *rate_clks[] = {
+ &ref_clk,
+ &sys_clk,
+ &diu_clk,
+ &csb_clk,
+ &e300_clk,
+ &ips_clk,
+ &fec_clk,
+ &sata_clk,
+ &pata_clk,
+ &nfc_clk,
+ &lpc_clk,
+ &mbx_bus_clk,
+ &mbx_clk,
+ &mbx_3d_clk,
+ &axe_clk,
+ &usb1_clk,
+ &usb2_clk,
+ &i2c_clk,
+ &mscan_clk,
+ &sdhc_clk,
+ &pci_clk,
+ &psc_mclk_in,
+ &spdif_txclk,
+ &spdif_rxclk,
+ &ac97_clk,
+ NULL
+};
+
+static void rate_clk_init(struct clk *clk)
+{
+ if (clk->calc) {
+ clk->calc(clk);
+ clk->flags |= CLK_HAS_RATE;
+ clk_register(clk);
+ } else {
+ printk(KERN_WARNING
+ "Could not initialize clk %s without a calc routine\n",
+ clk->name);
+ }
+}
+
+static void rate_clks_init(void)
+{
+ struct clk **cpp, *clk;
+
+ cpp = rate_clks;
+ while ((clk = *cpp++))
+ rate_clk_init(clk);
+}
+
+/*
+ * There are two clk enable registers with 32 enable bits each
+ * psc clocks and device clocks are all stored in dev_clks
+ */
+struct clk dev_clks[2][32];
+
+/*
+ * Given a psc number return the dev_clk
+ * associated with it
+ */
+static struct clk *psc_dev_clk(int pscnum)
+{
+ int reg, bit;
+ struct clk *clk;
+
+ reg = 0;
+ bit = 27 - pscnum;
+
+ clk = &dev_clks[reg][bit];
+ clk->reg = 0;
+ clk->bit = bit;
+ return clk;
+}
+
+/*
+ * PSC clock rate calculation
+ */
+static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
+{
+ unsigned long mclk_src = sys_clk.rate;
+ unsigned long mclk_div;
+
+ /*
+ * Can only change value of mclk divider
+ * when the divider is disabled.
+ *
+ * Zero is not a valid divider so minimum
+ * divider is 1
+ *
+ * disable/set divider/enable
+ */
+ out_be32(&clockctl->pccr[pscnum], 0);
+ out_be32(&clockctl->pccr[pscnum], 0x00020000);
+ out_be32(&clockctl->pccr[pscnum], 0x00030000);
+
+ if (clockctl->pccr[pscnum] & 0x80) {
+ clk->rate = spdif_rxclk.rate;
+ return;
+ }
+
+ switch ((clockctl->pccr[pscnum] >> 14) & 0x3) {
+ case 0:
+ mclk_src = sys_clk.rate;
+ break;
+ case 1:
+ mclk_src = ref_clk.rate;
+ break;
+ case 2:
+ mclk_src = psc_mclk_in.rate;
+ break;
+ case 3:
+ mclk_src = spdif_txclk.rate;
+ break;
+ }
+
+ mclk_div = ((clockctl->pccr[pscnum] >> 17) & 0x7fff) + 1;
+ clk->rate = mclk_src / mclk_div;
+}
+
+/*
+ * Find all psc nodes in device tree and assign a clock
+ * with name "psc%d_mclk" and dev pointing at the device
+ * returned from of_find_device_by_node
+ */
+static void psc_clks_init(void)
+{
+ struct device_node *np;
+ const u32 *cell_index;
+ struct of_device *ofdev;
+
+ for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
+ cell_index = of_get_property(np, "cell-index", NULL);
+ if (cell_index) {
+ int pscnum = *cell_index;
+ struct clk *clk = psc_dev_clk(pscnum);
+
+ clk->flags = CLK_HAS_RATE | CLK_HAS_CTRL;
+ ofdev = of_find_device_by_node(np);
+ clk->dev = &ofdev->dev;
+ /*
+ * AC97 is special rate clock does
+ * not go through normal path
+ */
+ if (strcmp("ac97", np->name) == 0)
+ clk->rate = ac97_clk.rate;
+ else
+ psc_calc_rate(clk, pscnum, np);
+ sprintf(clk->name, "psc%d_mclk", pscnum);
+ clk_register(clk);
+ clk_enable(clk);
+ }
+ }
+}
+
+static struct clk_interface mpc5121_clk_functions = {
+ .clk_get = mpc5121_clk_get,
+ .clk_enable = mpc5121_clk_enable,
+ .clk_disable = mpc5121_clk_disable,
+ .clk_get_rate = mpc5121_clk_get_rate,
+ .clk_put = mpc5121_clk_put,
+ .clk_round_rate = mpc5121_clk_round_rate,
+ .clk_set_rate = mpc5121_clk_set_rate,
+ .clk_set_parent = NULL,
+ .clk_get_parent = NULL,
+};
+
+static int
+mpc5121_clk_init(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock");
+ if (np) {
+ clockctl = of_iomap(np, 0);
+ of_node_put(np);
+ }
+
+ if (!clockctl) {
+ printk(KERN_ERR "Could not map clock control registers\n");
+ return 0;
+ }
+
+ rate_clks_init();
+ psc_clks_init();
+
+ /* leave clockctl mapped forever */
+ /*iounmap(clockctl); */
+ DEBUG_CLK_DUMP();
+ clocks_initialized++;
+ clk_functions = mpc5121_clk_functions;
+ return 0;
+}
+
+
+arch_initcall(mpc5121_clk_init);
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 50bd3a3..5ebf693 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. All rights reserved.
*
* Author: John Rigby, <jrigby@freescale.com>, Thur Mar 29 2007
*
@@ -15,7 +15,6 @@
#include <linux/kernel.h>
#include <linux/io.h>
-#include <linux/irq.h>
#include <linux/of_platform.h>
#include <asm/machdep.h>
@@ -23,65 +22,22 @@
#include <asm/prom.h>
#include <asm/time.h>
-/**
- * mpc512x_find_ips_freq - Find the IPS bus frequency for a device
- * @node: device node
- *
- * Returns IPS bus frequency, or 0 if the bus frequency cannot be found.
- */
-unsigned long
-mpc512x_find_ips_freq(struct device_node *node)
+#include "mpc512x.h"
+#include "mpc5121_ads.h"
+
+static void __init mpc5121_ads_setup_arch(void)
{
- struct device_node *np;
- const unsigned int *p_ips_freq = NULL;
-
- of_node_get(node);
- while (node) {
- p_ips_freq = of_get_property(node, "bus-frequency", NULL);
- if (p_ips_freq)
- break;
-
- np = of_get_parent(node);
- of_node_put(node);
- node = np;
- }
- if (node)
- of_node_put(node);
-
- return p_ips_freq ? *p_ips_freq : 0;
-}
-EXPORT_SYMBOL(mpc512x_find_ips_freq);
-
-static struct of_device_id __initdata of_bus_ids[] = {
- { .name = "soc", },
- { .name = "localbus", },
- {},
-};
-
-static void __init mpc5121_ads_declare_of_platform_devices(void)
-{
- /* Find every child of the SOC node and add it to of_platform */
- if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
- printk(KERN_ERR __FILE__ ": "
- "Error while probing of_platform bus\n");
+ printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n");
+ /*
+ * cpld regs are needed early
+ */
+ mpc5121_ads_cpld_map();
}
static void __init mpc5121_ads_init_IRQ(void)
{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
- if (!np)
- return;
-
- ipic_init(np, 0);
- of_node_put(np);
-
- /*
- * Initialize the default interrupt mapping priorities,
- * in case the boot rom changed something on us.
- */
- ipic_set_default_priority();
+ mpc512x_init_IRQ();
+ mpc5121_ads_cpld_pic_init();
}
/*
@@ -97,7 +53,8 @@
define_machine(mpc5121_ads) {
.name = "MPC5121 ADS",
.probe = mpc5121_ads_probe,
- .init = mpc5121_ads_declare_of_platform_devices,
+ .setup_arch = mpc5121_ads_setup_arch,
+ .init = mpc512x_declare_of_platform_devices,
.init_IRQ = mpc5121_ads_init_IRQ,
.get_irq = ipic_get_irq,
.calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.h b/arch/powerpc/platforms/512x/mpc5121_ads.h
new file mode 100644
index 0000000..662076c
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.h
@@ -0,0 +1,16 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Prototypes for ADS5121 specific code
+ */
+
+#ifndef __MPC512ADS_H__
+#define __MPC512ADS_H__
+extern void __init mpc5121_ads_cpld_map(void);
+extern void __init mpc5121_ads_cpld_pic_init(void);
+#endif /* __MPC512ADS_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
new file mode 100644
index 0000000..a6ce805
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -0,0 +1,204 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, <jrigby@freescale.com>
+ *
+ * Description:
+ * MPC5121ADS CPLD irq handling
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <asm/prom.h>
+
+static struct device_node *cpld_pic_node;
+static struct irq_host *cpld_pic_host;
+
+/*
+ * Bits to ignore in the misc_status register
+ * 0x10 touch screen pendown is hard routed to irq1
+ * 0x02 pci status is read from pci status register
+ */
+#define MISC_IGNORE 0x12
+
+/*
+ * Nothing to ignore in pci status register
+ */
+#define PCI_IGNORE 0x00
+
+struct cpld_pic {
+ u8 pci_mask;
+ u8 pci_status;
+ u8 route;
+ u8 misc_mask;
+ u8 misc_status;
+ u8 misc_control;
+};
+
+static struct cpld_pic __iomem *cpld_regs;
+
+static void __iomem *
+irq_to_pic_mask(unsigned int irq)
+{
+ return irq <= 7 ? &cpld_regs->pci_mask : &cpld_regs->misc_mask;
+}
+
+static unsigned int
+irq_to_pic_bit(unsigned int irq)
+{
+ return 1 << (irq & 0x7);
+}
+
+static void
+cpld_mask_irq(unsigned int irq)
+{
+ unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
+ void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
+
+ out_8(pic_mask,
+ in_8(pic_mask) | irq_to_pic_bit(cpld_irq));
+}
+
+static void
+cpld_unmask_irq(unsigned int irq)
+{
+ unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
+ void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
+
+ out_8(pic_mask,
+ in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq));
+}
+
+static struct irq_chip cpld_pic = {
+ .typename = " CPLD PIC ",
+ .mask = cpld_mask_irq,
+ .ack = cpld_mask_irq,
+ .unmask = cpld_unmask_irq,
+};
+
+static int
+cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp,
+ u8 __iomem *maskp)
+{
+ int cpld_irq;
+ u8 status = in_8(statusp);
+ u8 mask = in_8(maskp);
+
+ /* ignore don't cares and masked irqs */
+ status |= (ignore | mask);
+
+ if (status == 0xff)
+ return NO_IRQ_IGNORE;
+
+ cpld_irq = ffz(status) + offset;
+
+ return irq_linear_revmap(cpld_pic_host, cpld_irq);
+}
+
+static void
+cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status,
+ &cpld_regs->pci_mask);
+ if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
+ generic_handle_irq(irq);
+ return;
+ }
+
+ irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status,
+ &cpld_regs->misc_mask);
+ if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
+ generic_handle_irq(irq);
+ return;
+ }
+}
+
+static int
+cpld_pic_host_match(struct irq_host *h, struct device_node *node)
+{
+ return cpld_pic_node == node;
+}
+
+static int
+cpld_pic_host_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ get_irq_desc(virq)->status |= IRQ_LEVEL;
+ set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq);
+ return 0;
+}
+
+static struct
+irq_host_ops cpld_pic_host_ops = {
+ .match = cpld_pic_host_match,
+ .map = cpld_pic_host_map,
+};
+
+void __init
+mpc5121_ads_cpld_map(void)
+{
+ struct device_node *np = NULL;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
+ if (!np) {
+ printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
+ return;
+ }
+
+ cpld_regs = of_iomap(np, 0);
+ of_node_put(np);
+}
+
+void __init
+mpc5121_ads_cpld_pic_init(void)
+{
+ unsigned int cascade_irq;
+ struct device_node *np = NULL;
+
+ pr_debug("cpld_ic_init\n");
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
+ if (!np) {
+ printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
+ return;
+ }
+
+ if (!cpld_regs)
+ goto end;
+
+ cascade_irq = irq_of_parse_and_map(np, 0);
+ if (cascade_irq == NO_IRQ)
+ goto end;
+
+ /*
+ * statically route touch screen pendown through 1
+ * and ignore it here
+ * route all others through our cascade irq
+ */
+ out_8(&cpld_regs->route, 0xfd);
+ out_8(&cpld_regs->pci_mask, 0xff);
+ /* unmask pci ints in misc mask */
+ out_8(&cpld_regs->misc_mask, ~(MISC_IGNORE));
+
+ cpld_pic_node = of_node_get(np);
+
+ cpld_pic_host =
+ irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, 16, &cpld_pic_host_ops, 16);
+ if (!cpld_pic_host) {
+ printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
+ goto end;
+ }
+
+ set_irq_chained_handler(cascade_irq, cpld_pic_cascade);
+end:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c
new file mode 100644
index 0000000..2479de9
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, <jrigby@freescale.com>
+ *
+ * Description:
+ * MPC5121 SoC setup
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+
+#include "mpc512x.h"
+
+/*
+ * list of supported boards
+ */
+static char *board[] __initdata = {
+ "prt,prtlvt",
+ NULL
+};
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc5121_generic_probe(void)
+{
+ unsigned long node = of_get_flat_dt_root();
+ int i = 0;
+
+ while (board[i]) {
+ if (of_flat_dt_is_compatible(node, board[i]))
+ break;
+ i++;
+ }
+
+ return board[i] != NULL;
+}
+
+define_machine(mpc5121_generic) {
+ .name = "MPC5121 generic",
+ .probe = mpc5121_generic_probe,
+ .init = mpc512x_declare_of_platform_devices,
+ .init_IRQ = mpc512x_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
new file mode 100644
index 0000000..9c03693
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Prototypes for MPC512x shared code
+ */
+
+#ifndef __MPC512X_H__
+#define __MPC512X_H__
+extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
+extern void __init mpc512x_init_IRQ(void);
+void __init mpc512x_declare_of_platform_devices(void);
+#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
new file mode 100644
index 0000000..d8cd579
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby <jrigby@freescale.com>
+ *
+ * Description:
+ * MPC512x Shared code
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+
+#include "mpc512x.h"
+
+unsigned long
+mpc512x_find_ips_freq(struct device_node *node)
+{
+ struct device_node *np;
+ const unsigned int *p_ips_freq = NULL;
+
+ of_node_get(node);
+ while (node) {
+ p_ips_freq = of_get_property(node, "bus-frequency", NULL);
+ if (p_ips_freq)
+ break;
+
+ np = of_get_parent(node);
+ of_node_put(node);
+ node = np;
+ }
+ if (node)
+ of_node_put(node);
+
+ return p_ips_freq ? *p_ips_freq : 0;
+}
+EXPORT_SYMBOL(mpc512x_find_ips_freq);
+
+void __init mpc512x_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+ of_node_put(np);
+
+ /*
+ * Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+/*
+ * Nodes to do bus probe on, soc and localbus
+ */
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .compatible = "fsl,mpc5121-immr", },
+ { .compatible = "fsl,mpc5121-localbus", },
+ {},
+};
+
+void __init mpc512x_declare_of_platform_devices(void)
+{
+ if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
+ printk(KERN_ERR __FILE__ ": "
+ "Error while probing of_platform bus\n");
+}
+
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index e3428dd..5a382bb 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -63,6 +63,7 @@
#define MPC52xx_PCI_TCR_P 0x01000000
#define MPC52xx_PCI_TCR_LD 0x00010000
+#define MPC52xx_PCI_TCR_WCT8 0x00000008
#define MPC52xx_PCI_TBATR_DISABLE 0x0
#define MPC52xx_PCI_TBATR_ENABLE 0x1
@@ -313,7 +314,7 @@
out_be32(&pci_regs->tbatr1,
MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM );
- out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD);
+ out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8);
tmp = in_be32(&pci_regs->gscr);
#if 0
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 917ac88..1c8034b 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,7 +1,8 @@
-choice
- prompt "82xx Board Type"
- depends on PPC_82xx
- default MPC8272_ADS
+menuconfig PPC_82xx
+ bool "82xx-based boards (PQ II)"
+ depends on 6xx && PPC_MULTIPLATFORM
+
+if PPC_82xx
config MPC8272_ADS
bool "Freescale MPC8272 ADS"
@@ -36,7 +37,7 @@
This board is also resold by Freescale as the QUICCStart
MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE.
-endchoice
+endif
config PQ2ADS
bool
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c
index d5770fd..373e993 100644
--- a/arch/powerpc/platforms/82xx/ep8248e.c
+++ b/arch/powerpc/platforms/82xx/ep8248e.c
@@ -59,6 +59,7 @@
of_node_put(np);
}
+#ifdef CONFIG_FS_ENET_MDIO_FCC
static void ep8248e_set_mdc(struct mdiobb_ctrl *ctrl, int level)
{
if (level)
@@ -164,6 +165,7 @@
.probe = ep8248e_mdio_probe,
.remove = ep8248e_mdio_remove,
};
+#endif
struct cpm_pin {
int port, pin, flags;
@@ -296,7 +298,9 @@
static int __init declare_of_platform_devices(void)
{
of_platform_bus_probe(NULL, of_bus_ids, NULL);
+#ifdef CONFIG_FS_ENET_MDIO_FCC
of_register_platform_driver(&ep8248e_mdio_driver);
+#endif
return 0;
}
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c
index 7d30187..8054c68 100644
--- a/arch/powerpc/platforms/82xx/mpc8272_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c
@@ -96,6 +96,10 @@
{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* I2C */
+ {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
+ {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
};
static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index a801381..9876d7e 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -109,7 +109,7 @@
{
get_irq_desc(virq)->status |= IRQ_LEVEL;
set_irq_chip_data(virq, h->host_data);
- set_irq_chip(virq, &pq2ads_pci_ic);
+ set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq);
return 0;
}
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 13587e2..27d9bf8 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,10 +1,12 @@
-menuconfig MPC83xx
- bool "83xx Board Type"
- depends on PPC_83xx
+menuconfig PPC_83xx
+ bool "83xx-based boards"
+ depends on 6xx && PPC_MULTIPLATFORM
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
+ select FSL_SOC
+ select IPIC
-if MPC83xx
+if PPC_83xx
config MPC831x_RDB
bool "Freescale MPC831x RDB"
@@ -58,6 +60,17 @@
help
This option enables support for the MPC836x MDS Processor Board.
+config MPC836x_RDK
+ bool "Freescale/Logic MPC836x RDK"
+ select DEFAULT_UIMAGE
+ select QUICC_ENGINE
+ select QE_GPIO
+ select FSL_GTM
+ select FSL_LBC
+ help
+ This option enables support for the MPC836x RDK Processor Board,
+ also known as ZOOM PowerQUICC Kit.
+
config MPC837x_MDS
bool "Freescale MPC837x MDS"
select DEFAULT_UIMAGE
@@ -79,6 +92,15 @@
help
This option enables support for the Wind River SBC834x board.
+config ASP834x
+ bool "Analogue & Micro ASP 834x"
+ select PPC_MPC834x
+ select REDBOOT
+ help
+ This enables support for the Analogue & Micro ASP 83xx
+ board.
+
+
endif
# used for usb
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 7e6dd3e..f331fd7 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -8,7 +8,9 @@
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
+obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o
obj-$(CONFIG_SBC834x) += sbc834x.o
obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o
+obj-$(CONFIG_ASP834x) += asp834x.o
diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c
new file mode 100644
index 0000000..bb30d67
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/asp834x.c
@@ -0,0 +1,90 @@
+/*
+ * arch/powerpc/platforms/83xx/asp834x.c
+ *
+ * Analogue & Micro ASP8347 board specific routines
+ * clone of mpc834x_itx
+ *
+ * Copyright 2008 Codehermit
+ *
+ * Maintainer: Bryan O'Donoghue <bodonoghue@codhermit.ie>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/pci.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+
+#include "mpc83xx.h"
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init asp834x_setup_arch(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("asp834x_setup_arch()", 0);
+
+ mpc834x_usb_cfg();
+}
+
+static void __init asp834x_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_node_by_type(NULL, "ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ of_node_put(np);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+static struct __initdata of_device_id asp8347_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init asp8347_declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, asp8347_ids, NULL);
+ return 0;
+}
+machine_device_initcall(asp834x, asp8347_declare_of_platform_devices);
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init asp834x_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ return of_flat_dt_is_compatible(root, "analogue-and-micro,asp8347e");
+}
+
+define_machine(asp834x) {
+ .name = "ASP8347E",
+ .probe = asp834x_probe,
+ .setup_arch = asp834x_setup_arch,
+ .init_IRQ = asp834x_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
new file mode 100644
index 0000000..c10dec4
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
@@ -0,0 +1,102 @@
+/*
+ * MPC8360E-RDK board file.
+ *
+ * Copyright (c) 2006 Freescale Semicondutor, Inc.
+ * Copyright (c) 2007-2008 MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/of_platform.h>
+#include <linux/io.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+#include <sysdev/fsl_soc.h>
+
+#include "mpc83xx.h"
+
+static struct of_device_id __initdata mpc836x_rdk_ids[] = {
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init mpc836x_rdk_declare_of_platform_devices(void)
+{
+ return of_platform_bus_probe(NULL, mpc836x_rdk_ids, NULL);
+}
+machine_device_initcall(mpc836x_rdk, mpc836x_rdk_declare_of_platform_devices);
+
+static void __init mpc836x_rdk_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc836x_rdk_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+ mpc83xx_add_bridge(np);
+#endif
+
+ qe_reset();
+}
+
+static void __init mpc836x_rdk_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ /*
+ * Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+ of_node_put(np);
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+ if (!np)
+ return;
+
+ qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
+ of_node_put(np);
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened.
+ */
+static int __init mpc836x_rdk_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc8360rdk");
+}
+
+define_machine(mpc836x_rdk) {
+ .name = "MPC836x RDK",
+ .probe = mpc836x_rdk_probe,
+ .setup_arch = mpc836x_rdk_setup_arch,
+ .init_IRQ = mpc836x_rdk_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index ecbe580..cebea5c 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -38,6 +38,12 @@
help
This option enables support for the MPC85xx MDS board
+config MPC8536_DS
+ bool "Freescale MPC8536 DS"
+ select DEFAULT_UIMAGE
+ help
+ This option enables support for the MPC8536 DS board
+
config MPC85xx_DS
bool "Freescale MPC85xx DS"
select PPC_I8259
@@ -75,6 +81,14 @@
select TQM85xx
select CPM2
+config TQM8548
+ bool "TQ Components TQM8548"
+ help
+ This option enables support for the TQ Components TQM8548 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
+
config TQM8555
bool "TQ Components TQM8555"
help
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 6cea185..cb3054e 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -4,6 +4,7 @@
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
+obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
new file mode 100644
index 0000000..6b846aa
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -0,0 +1,125 @@
+/*
+ * MPC8536 DS Board Setup
+ *
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+void __init mpc8536_ds_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np;
+
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (np == NULL) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Failed to map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET |
+ MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
+ 0, 256, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+ of_node_put(np);
+
+ mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init mpc8536_ds_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc8536_ds_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_node_by_type(np, "pci") {
+ if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+ of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
+ struct resource rsrc;
+ of_address_to_resource(np, 0, &rsrc);
+ if ((rsrc.start & 0xfffff) == 0x8000)
+ fsl_add_bridge(np, 1);
+ else
+ fsl_add_bridge(np, 0);
+ }
+ }
+
+#endif
+
+ printk("MPC8536 DS board from Freescale Semiconductor\n");
+}
+
+static struct of_device_id __initdata mpc8536_ds_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc8536_ds_publish_devices(void)
+{
+ return of_platform_bus_probe(NULL, mpc8536_ds_ids, NULL);
+}
+machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init mpc8536_ds_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc8536ds");
+}
+
+define_machine(mpc8536_ds) {
+ .name = "MPC8536 DS",
+ .probe = mpc8536_ds_probe,
+ .setup_arch = mpc8536_ds_setup_arch,
+ .init_IRQ = mpc8536_ds_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 3582c84..ba498d6 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -119,6 +119,8 @@
{3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
/* SCC2 */
+ {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
@@ -145,7 +147,6 @@
{1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
- {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
@@ -156,8 +157,9 @@
{1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
{1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
- {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
- {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
+ {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */
+ {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */
+ {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
};
static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 8b1de78..50d7ea8f 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -26,6 +26,7 @@
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
#include <asm/system.h>
#include <asm/pgtable.h>
@@ -335,6 +336,19 @@
return of_flat_dt_is_compatible(root, "MPC85xxCDS");
}
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ return of_platform_bus_probe(NULL, of_bus_ids, NULL);
+}
+machine_device_initcall(mpc85xx_cds, declare_of_platform_devices);
+
define_machine(mpc85xx_cds) {
.name = "MPC85xx CDS",
.probe = mpc85xx_cds_probe,
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index dfd8b4a..25f41cd2 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -58,14 +58,13 @@
{
struct mpic *mpic;
struct resource r;
- struct device_node *np = NULL;
+ struct device_node *np;
#ifdef CONFIG_PPC_I8259
struct device_node *cascade_node = NULL;
int cascade_irq;
#endif
- np = of_find_node_by_type(np, "open-pic");
-
+ np = of_find_node_by_type(NULL, "open-pic");
if (np == NULL) {
printk(KERN_ERR "Could not find open-pic node\n");
return;
@@ -78,9 +77,11 @@
}
mpic = mpic_alloc(np, r.start,
- MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ MPIC_PRIMARY | MPIC_WANTS_RESET |
+ MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
+ of_node_put(np);
mpic_init(mpic);
@@ -184,7 +185,7 @@
}
}
-static struct of_device_id mpc85xxds_ids[] = {
+static struct of_device_id __initdata mpc85xxds_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{},
@@ -195,6 +196,7 @@
return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL);
}
machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
+machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 77681ac..d850880 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -120,8 +120,18 @@
#endif
#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
- fsl_add_bridge(np, 1);
+ for_each_node_by_type(np, "pci") {
+ if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+ of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
+ struct resource rsrc;
+ if (!of_address_to_resource(np, 0, &rsrc)) {
+ if ((rsrc.start & 0xfffff) == 0x8000)
+ fsl_add_bridge(np, 1);
+ else
+ fsl_add_bridge(np, 0);
+ }
+ }
+ }
#endif
}
@@ -165,10 +175,11 @@
{
unsigned long root = of_get_flat_dt_root();
- if ((of_flat_dt_is_compatible(root, "tqm,8540")) ||
- (of_flat_dt_is_compatible(root, "tqm,8541")) ||
- (of_flat_dt_is_compatible(root, "tqm,8555")) ||
- (of_flat_dt_is_compatible(root, "tqm,8560")))
+ if ((of_flat_dt_is_compatible(root, "tqc,tqm8540")) ||
+ (of_flat_dt_is_compatible(root, "tqc,tqm8541")) ||
+ (of_flat_dt_is_compatible(root, "tqc,tqm8548")) ||
+ (of_flat_dt_is_compatible(root, "tqc,tqm8555")) ||
+ (of_flat_dt_is_compatible(root, "tqc,tqm8560")))
return 1;
return 0;
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 053f49a..80a81e0 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -1,7 +1,13 @@
-choice
- prompt "86xx Board Type"
- depends on PPC_86xx
- default MPC8641_HPCN
+config PPC_86xx
+menuconfig PPC_86xx
+ bool "86xx-based boards"
+ depends on 6xx && PPC_MULTIPLATFORM
+ select FSL_SOC
+ select ALTIVEC
+ help
+ The Freescale E600 SoCs have 74xx cores.
+
+if PPC_86xx
config MPC8641_HPCN
bool "Freescale MPC8641 HPCN"
@@ -24,7 +30,7 @@
help
This option enables support for the MPC8610 HPCD board.
-endchoice
+endif
config MPC8641
bool
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 1b9b4a9..8fee37d 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -2,6 +2,7 @@
# Makefile for the PowerPC 86xx linux kernel.
#
+obj-y := pic.o
obj-$(CONFIG_SMP) += mpc86xx_smp.o
obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
obj-$(CONFIG_SBC8641D) += sbc8641d.o
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index dea1320..3072530 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -39,6 +39,8 @@
#include <sysdev/fsl_pci.h>
#include <sysdev/fsl_soc.h>
+#include "mpc86xx.h"
+
static unsigned char *pixis_bdcfg0, *pixis_arch;
static struct of_device_id __initdata mpc8610_ids[] = {
@@ -56,27 +58,6 @@
}
machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
-static void __init mpc86xx_hpcd_init_irq(void)
-{
- struct mpic *mpic1;
- struct device_node *np;
- struct resource res;
-
- /* Determine PIC address. */
- np = of_find_node_by_type(NULL, "open-pic");
- if (np == NULL)
- return;
- of_address_to_resource(np, 0, &res);
-
- /* Alloc mpic structure and per isu has 16 INT entries. */
- mpic1 = mpic_alloc(np, res.start,
- MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 0, 256, " MPIC ");
- BUG_ON(mpic1 == NULL);
-
- mpic_init(mpic1);
-}
-
#ifdef CONFIG_PCI
static void __devinit quirk_uli1575(struct pci_dev *dev)
{
@@ -404,7 +385,7 @@
.name = "MPC86xx HPCD",
.probe = mpc86xx_hpcd_probe,
.setup_arch = mpc86xx_hpcd_setup_arch,
- .init_IRQ = mpc86xx_hpcd_init_irq,
+ .init_IRQ = mpc86xx_init_irq,
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
.time_init = mpc86xx_time_init,
diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h
index 525ffa1..08efb57 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx.h
+++ b/arch/powerpc/platforms/86xx/mpc86xx.h
@@ -15,6 +15,7 @@
* mpc86xx_* files. Mostly for use by mpc86xx_setup().
*/
-extern void __init mpc86xx_smp_init(void);
+extern void mpc86xx_smp_init(void);
+extern void mpc86xx_init_irq(void);
#endif /* __MPC86XX_H__ */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index f13704a..7916599 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -28,7 +28,6 @@
#include <asm/prom.h>
#include <mm/mmu_decl.h>
#include <asm/udbg.h>
-#include <asm/i8259.h>
#include <asm/mpic.h>
@@ -46,67 +45,6 @@
#endif
#ifdef CONFIG_PCI
-static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
-{
- unsigned int cascade_irq = i8259_irq();
- if (cascade_irq != NO_IRQ)
- generic_handle_irq(cascade_irq);
- desc->chip->eoi(irq);
-}
-#endif /* CONFIG_PCI */
-
-static void __init
-mpc86xx_hpcn_init_irq(void)
-{
- struct mpic *mpic1;
- struct device_node *np;
- struct resource res;
-#ifdef CONFIG_PCI
- struct device_node *cascade_node = NULL;
- int cascade_irq;
-#endif
-
- /* Determine PIC address. */
- np = of_find_node_by_type(NULL, "open-pic");
- if (np == NULL)
- return;
- of_address_to_resource(np, 0, &res);
-
- /* Alloc mpic structure and per isu has 16 INT entries. */
- mpic1 = mpic_alloc(np, res.start,
- MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 0, 256, " MPIC ");
- BUG_ON(mpic1 == NULL);
-
- mpic_init(mpic1);
-
-#ifdef CONFIG_PCI
- /* Initialize i8259 controller */
- for_each_node_by_type(np, "interrupt-controller")
- if (of_device_is_compatible(np, "chrp,iic")) {
- cascade_node = np;
- break;
- }
- if (cascade_node == NULL) {
- printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
- return;
- }
-
- cascade_irq = irq_of_parse_and_map(cascade_node, 0);
- if (cascade_irq == NO_IRQ) {
- printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
- return;
- }
- DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
-
- i8259_init(cascade_node, 0);
- of_node_put(cascade_node);
-
- set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
-#endif
-}
-
-#ifdef CONFIG_PCI
extern int uses_fsl_uli_m1575;
extern int uli_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn);
@@ -237,7 +175,7 @@
.name = "MPC86xx HPCN",
.probe = mpc86xx_hpcn_probe,
.setup_arch = mpc86xx_hpcn_setup_arch,
- .init_IRQ = mpc86xx_hpcn_init_irq,
+ .init_IRQ = mpc86xx_init_irq,
.show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
index ba55b0f..835f2dc 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/delay.h>
+#include <asm/code-patching.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/pci-bridge.h>
@@ -56,8 +57,7 @@
unsigned int save_vector;
unsigned long target, flags;
int n = 0;
- volatile unsigned int *vector
- = (volatile unsigned int *)(KERNELBASE + 0x100);
+ unsigned int *vector = (unsigned int *)(KERNELBASE + 0x100);
if (nr < 0 || nr >= NR_CPUS)
return;
@@ -71,7 +71,7 @@
/* Setup fake reset vector to call __secondary_start_mpc86xx. */
target = (unsigned long) __secondary_start_mpc86xx;
- create_branch((unsigned long)vector, target, BRANCH_SET_LINK);
+ patch_branch(vector, target, BRANCH_SET_LINK);
/* Kick that CPU */
smp_86xx_release_core(nr);
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
new file mode 100644
index 0000000..8881c5d
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/mpic.h>
+#include <asm/i8259.h>
+
+#ifdef CONFIG_PPC_I8259
+static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ unsigned int cascade_irq = i8259_irq();
+ if (cascade_irq != NO_IRQ)
+ generic_handle_irq(cascade_irq);
+ desc->chip->eoi(irq);
+}
+#endif /* CONFIG_PPC_I8259 */
+
+void __init mpc86xx_init_irq(void)
+{
+ struct mpic *mpic;
+ struct device_node *np;
+ struct resource res;
+#ifdef CONFIG_PPC_I8259
+ struct device_node *cascade_node = NULL;
+ int cascade_irq;
+#endif
+
+ /* Determine PIC address. */
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (np == NULL)
+ return;
+ of_address_to_resource(np, 0, &res);
+
+ mpic = mpic_alloc(np, res.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET |
+ MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
+ 0, 256, " MPIC ");
+ of_node_put(np);
+ BUG_ON(mpic == NULL);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_PPC_I8259
+ /* Initialize i8259 controller */
+ for_each_node_by_type(np, "interrupt-controller")
+ if (of_device_is_compatible(np, "chrp,iic")) {
+ cascade_node = np;
+ break;
+ }
+
+ if (cascade_node == NULL) {
+ printk(KERN_DEBUG "Could not find i8259 PIC\n");
+ return;
+ }
+
+ cascade_irq = irq_of_parse_and_map(cascade_node, 0);
+ if (cascade_irq == NO_IRQ) {
+ printk(KERN_ERR "Failed to map cascade interrupt\n");
+ return;
+ }
+
+ i8259_init(cascade_node, 0);
+ of_node_put(cascade_node);
+
+ set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
+#endif
+}
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c
index 510a06e..00e6fad 100644
--- a/arch/powerpc/platforms/86xx/sbc8641d.c
+++ b/arch/powerpc/platforms/86xx/sbc8641d.c
@@ -38,29 +38,6 @@
#include "mpc86xx.h"
static void __init
-sbc8641_init_irq(void)
-{
- struct mpic *mpic1;
- struct device_node *np;
- struct resource res;
-
- /* Determine PIC address. */
- np = of_find_node_by_type(NULL, "open-pic");
- if (np == NULL)
- return;
- of_address_to_resource(np, 0, &res);
-
- /* Alloc mpic structure and per isu has 16 INT entries. */
- mpic1 = mpic_alloc(np, res.start,
- MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 0, 256, " MPIC ");
- of_node_put(np);
- BUG_ON(mpic1 == NULL);
-
- mpic_init(mpic1);
-}
-
-static void __init
sbc8641_setup_arch(void)
{
#ifdef CONFIG_PCI
@@ -151,7 +128,7 @@
.name = "SBC8641D",
.probe = sbc8641_probe,
.setup_arch = sbc8641_setup_arch,
- .init_IRQ = sbc8641_init_irq,
+ .init_IRQ = mpc86xx_init_irq,
.show_cpuinfo = sbc8641_show_cpuinfo,
.get_irq = mpic_get_irq,
.restart = fsl_rstcr_restart,
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index c028a5b..caaec29 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -65,6 +65,10 @@
{CPM_PORTD, 13, CPM_PIN_OUTPUT},
{CPM_PORTD, 14, CPM_PIN_OUTPUT},
{CPM_PORTD, 15, CPM_PIN_OUTPUT},
+
+ /* I2C */
+ {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
+ {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
};
static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index 6e7ded0..45ed6cd 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -158,6 +158,9 @@
{CPM_PORTE, 28, CPM_PIN_OUTPUT},
{CPM_PORTE, 29, CPM_PIN_OUTPUT},
#endif
+ /* I2C */
+ {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
+ {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
};
static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 87454c5..690c1f4 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -1,36 +1,9 @@
menu "Platform support"
-choice
- prompt "Machine type"
- depends on PPC64 || 6xx
- default PPC_MULTIPLATFORM
-
config PPC_MULTIPLATFORM
- bool "Generic desktop/server/laptop"
- help
- Select this option if configuring for an IBM pSeries or
- RS/6000 machine, an Apple machine, or a PReP, CHRP,
- Maple or Cell-based machine.
-
-config PPC_82xx
- bool "Freescale 82xx"
- depends on 6xx
-
-config PPC_83xx
- bool "Freescale 83xx"
- depends on 6xx
- select FSL_SOC
- select MPC83xx
- select IPIC
-
-config PPC_86xx
- bool "Freescale 86xx"
- depends on 6xx
- select FSL_SOC
- select ALTIVEC
- help
- The Freescale E600 SoCs have 74xx cores.
-endchoice
+ bool
+ depends on PPC64 || 6xx
+ default y
config CLASSIC32
def_bool y
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index f7efaa9..5bc4b611 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -95,6 +95,11 @@
select FSL_EMB_PERFMON
bool
+config PPC_E500MC
+ bool "e500mc Support"
+ select PPC_FPU
+ depends on E500
+
config PPC_FPU
bool
default y if PPC64
@@ -155,9 +160,25 @@
If in doubt, say Y here.
+config VSX
+ bool "VSX Support"
+ depends on POWER4 && ALTIVEC && PPC_FPU
+ ---help---
+
+ This option enables kernel support for the Vector Scaler extensions
+ to the PowerPC processor. The kernel currently supports saving and
+ restoring VSX registers, and turning on the 'VSX enable' bit so user
+ processes can execute VSX instructions.
+
+ This option is only useful if you have a processor that supports
+ VSX (P7 and above), but does not have any affect on a non-VSX
+ CPUs (it does, however add code to the kernel).
+
+ If in doubt, say Y here.
+
config SPE
bool "SPE Support"
- depends on E200 || E500
+ depends on E200 || (E500 && !PPC_E500MC)
default y
---help---
This option enables kernel support for the Signal Processing
@@ -182,7 +203,7 @@
config PPC_MM_SLICES
bool
- default y if HUGETLB_PAGE
+ default y if HUGETLB_PAGE || PPC_64K_PAGES
default n
config VIRT_CPU_ACCOUNTING
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index c39f5c2..896548b 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -14,6 +14,7 @@
#include <linux/pci.h>
#include <linux/msi.h>
#include <linux/of_platform.h>
+#include <linux/debugfs.h>
#include <asm/dcr.h>
#include <asm/machdep.h>
@@ -69,8 +70,19 @@
dma_addr_t fifo_phys;
dcr_host_t dcr_host;
u32 read_offset;
+#ifdef DEBUG
+ u32 __iomem *trigger;
+#endif
};
+#ifdef DEBUG
+void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic);
+#else
+static inline void axon_msi_debug_setup(struct device_node *dn,
+ struct axon_msic *msic) { }
+#endif
+
+
static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
{
pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n);
@@ -346,7 +358,14 @@
goto out_free_msic;
}
- msic->irq_host = irq_alloc_host(of_node_get(dn), IRQ_HOST_MAP_NOMAP,
+ virq = irq_of_parse_and_map(dn, 0);
+ if (virq == NO_IRQ) {
+ printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n",
+ dn->full_name);
+ goto out_free_fifo;
+ }
+
+ msic->irq_host = irq_alloc_host(dn, IRQ_HOST_MAP_NOMAP,
NR_IRQS, &msic_host_ops, 0);
if (!msic->irq_host) {
printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n",
@@ -356,13 +375,6 @@
msic->irq_host->host_data = msic;
- virq = irq_of_parse_and_map(dn, 0);
- if (virq == NO_IRQ) {
- printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n",
- dn->full_name);
- goto out_free_host;
- }
-
set_irq_data(virq, msic);
set_irq_chained_handler(virq, axon_msi_cascade);
pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq);
@@ -381,12 +393,12 @@
ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;
ppc_md.msi_check_device = axon_msi_check_device;
+ axon_msi_debug_setup(dn, msic);
+
printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name);
return 0;
-out_free_host:
- kfree(msic->irq_host);
out_free_fifo:
dma_free_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES, msic->fifo_virt,
msic->fifo_phys);
@@ -418,3 +430,47 @@
return of_register_platform_driver(&axon_msi_driver);
}
subsys_initcall(axon_msi_init);
+
+
+#ifdef DEBUG
+static int msic_set(void *data, u64 val)
+{
+ struct axon_msic *msic = data;
+ out_le32(msic->trigger, val);
+ return 0;
+}
+
+static int msic_get(void *data, u64 *val)
+{
+ *val = 0;
+ return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(fops_msic, msic_get, msic_set, "%llu\n");
+
+void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic)
+{
+ char name[8];
+ u64 addr;
+
+ addr = of_translate_address(dn, of_get_property(dn, "reg", NULL));
+ if (addr == OF_BAD_ADDR) {
+ pr_debug("axon_msi: couldn't translate reg property\n");
+ return;
+ }
+
+ msic->trigger = ioremap(addr, 0x4);
+ if (!msic->trigger) {
+ pr_debug("axon_msi: ioremap failed\n");
+ return;
+ }
+
+ snprintf(name, sizeof(name), "msic_%d", of_node_to_nid(dn));
+
+ if (!debugfs_create_file(name, 0600, powerpc_debugfs_root,
+ msic, &fops_msic)) {
+ pr_debug("axon_msi: debugfs_create_file failed!\n");
+ return;
+ }
+}
+#endif /* DEBUG */
diff --git a/arch/powerpc/platforms/cell/beat_htab.c b/arch/powerpc/platforms/cell/beat_htab.c
index 81467ff..2e67bd8 100644
--- a/arch/powerpc/platforms/cell/beat_htab.c
+++ b/arch/powerpc/platforms/cell/beat_htab.c
@@ -112,7 +112,7 @@
if (!(vflags & HPTE_V_BOLTED))
DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
- if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))
+ if (rflags & _PAGE_NO_CACHE)
hpte_r &= ~_PAGE_COHERENT;
spin_lock(&beat_htab_lock);
@@ -334,7 +334,7 @@
if (!(vflags & HPTE_V_BOLTED))
DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
- if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))
+ if (rflags & _PAGE_NO_CACHE)
hpte_r &= ~_PAGE_COHERENT;
/* insert into not-volted entry */
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 45646b2..eeacb3a 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -540,7 +540,7 @@
static unsigned long dma_iommu_fixed_base;
struct dma_mapping_ops dma_iommu_fixed_ops;
-static void cell_dma_dev_setup_iommu(struct device *dev)
+static struct iommu_table *cell_get_iommu_table(struct device *dev)
{
struct iommu_window *window;
struct cbe_iommu *iommu;
@@ -555,11 +555,11 @@
printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n",
archdata->of_node ? archdata->of_node->full_name : "?",
archdata->numa_node);
- return;
+ return NULL;
}
window = list_entry(iommu->windows.next, struct iommu_window, list);
- archdata->dma_data = &window->table;
+ return &window->table;
}
static void cell_dma_dev_setup_fixed(struct device *dev);
@@ -572,7 +572,7 @@
if (get_dma_ops(dev) == &dma_iommu_fixed_ops)
cell_dma_dev_setup_fixed(dev);
else if (get_pci_dma_ops() == &dma_iommu_ops)
- cell_dma_dev_setup_iommu(dev);
+ archdata->dma_data = cell_get_iommu_table(dev);
else if (get_pci_dma_ops() == &dma_direct_ops)
archdata->dma_data = (void *)cell_dma_direct_offset;
else
diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c
index 655704a..505f9b9 100644
--- a/arch/powerpc/platforms/cell/ras.c
+++ b/arch/powerpc/platforms/cell/ras.c
@@ -17,6 +17,7 @@
#include <asm/reg.h>
#include <asm/io.h>
#include <asm/prom.h>
+#include <asm/kexec.h>
#include <asm/machdep.h>
#include <asm/rtas.h>
#include <asm/cell-regs.h>
@@ -226,6 +227,11 @@
return cbe_ptcal_disable();
}
+static void cbe_ptcal_crash_shutdown(void)
+{
+ cbe_ptcal_disable();
+}
+
static struct notifier_block cbe_ptcal_reboot_notifier = {
.notifier_call = cbe_ptcal_notify_reboot
};
@@ -241,12 +247,20 @@
return -ENODEV;
ret = register_reboot_notifier(&cbe_ptcal_reboot_notifier);
- if (ret) {
- printk(KERN_ERR "Can't disable PTCAL, so not enabling\n");
- return ret;
- }
+ if (ret)
+ goto out1;
+
+ ret = crash_shutdown_register(&cbe_ptcal_crash_shutdown);
+ if (ret)
+ goto out2;
return cbe_ptcal_enable();
+
+out2:
+ unregister_reboot_notifier(&cbe_ptcal_reboot_notifier);
+out1:
+ printk(KERN_ERR "Can't disable PTCAL, so not enabling\n");
+ return ret;
}
arch_initcall(cbe_ptcal_init);
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 3f4b4ae..4e56556 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -300,7 +300,7 @@
panic("spider_pic: can't map registers !");
/* Allocate a host */
- pic->host = irq_alloc_host(of_node_get(of_node), IRQ_HOST_MAP_LINEAR,
+ pic->host = irq_alloc_host(of_node, IRQ_HOST_MAP_LINEAR,
SPIDER_SRC_COUNT, &spider_host_ops,
SPIDER_IRQ_INVALID);
if (pic->host == NULL)
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c
index 177735f..6653ddb 100644
--- a/arch/powerpc/platforms/cell/spufs/context.c
+++ b/arch/powerpc/platforms/cell/spufs/context.c
@@ -130,17 +130,17 @@
if (ctx->local_store)
unmap_mapping_range(ctx->local_store, 0, LS_SIZE, 1);
if (ctx->mfc)
- unmap_mapping_range(ctx->mfc, 0, 0x1000, 1);
+ unmap_mapping_range(ctx->mfc, 0, SPUFS_MFC_MAP_SIZE, 1);
if (ctx->cntl)
- unmap_mapping_range(ctx->cntl, 0, 0x1000, 1);
+ unmap_mapping_range(ctx->cntl, 0, SPUFS_CNTL_MAP_SIZE, 1);
if (ctx->signal1)
- unmap_mapping_range(ctx->signal1, 0, PAGE_SIZE, 1);
+ unmap_mapping_range(ctx->signal1, 0, SPUFS_SIGNAL_MAP_SIZE, 1);
if (ctx->signal2)
- unmap_mapping_range(ctx->signal2, 0, PAGE_SIZE, 1);
+ unmap_mapping_range(ctx->signal2, 0, SPUFS_SIGNAL_MAP_SIZE, 1);
if (ctx->mss)
- unmap_mapping_range(ctx->mss, 0, 0x1000, 1);
+ unmap_mapping_range(ctx->mss, 0, SPUFS_MSS_MAP_SIZE, 1);
if (ctx->psmap)
- unmap_mapping_range(ctx->psmap, 0, 0x20000, 1);
+ unmap_mapping_range(ctx->psmap, 0, SPUFS_PS_MAP_SIZE, 1);
mutex_unlock(&ctx->mapping_lock);
}
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index c81341f..99c7306 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -238,11 +238,13 @@
return size;
}
-static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma,
- unsigned long address)
+static int
+spufs_mem_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
struct spu_context *ctx = vma->vm_file->private_data;
- unsigned long pfn, offset, addr0 = address;
+ unsigned long address = (unsigned long)vmf->virtual_address;
+ unsigned long pfn, offset;
+
#ifdef CONFIG_SPU_FS_64K_LS
struct spu_state *csa = &ctx->csa;
int psize;
@@ -260,15 +262,15 @@
}
#endif /* CONFIG_SPU_FS_64K_LS */
- offset = (address - vma->vm_start) + (vma->vm_pgoff << PAGE_SHIFT);
+ offset = vmf->pgoff << PAGE_SHIFT;
if (offset >= LS_SIZE)
- return NOPFN_SIGBUS;
+ return VM_FAULT_SIGBUS;
- pr_debug("spufs_mem_mmap_nopfn address=0x%lx -> 0x%lx, offset=0x%lx\n",
- addr0, address, offset);
+ pr_debug("spufs_mem_mmap_fault address=0x%lx, offset=0x%lx\n",
+ address, offset);
if (spu_acquire(ctx))
- return NOPFN_REFAULT;
+ return VM_FAULT_NOPAGE;
if (ctx->state == SPU_STATE_SAVED) {
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
@@ -283,12 +285,12 @@
spu_release(ctx);
- return NOPFN_REFAULT;
+ return VM_FAULT_NOPAGE;
}
static struct vm_operations_struct spufs_mem_mmap_vmops = {
- .nopfn = spufs_mem_mmap_nopfn,
+ .fault = spufs_mem_mmap_fault,
};
static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma)
@@ -351,20 +353,19 @@
#endif
};
-static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
- unsigned long address,
+static int spufs_ps_fault(struct vm_area_struct *vma,
+ struct vm_fault *vmf,
unsigned long ps_offs,
unsigned long ps_size)
{
struct spu_context *ctx = vma->vm_file->private_data;
- unsigned long area, offset = address - vma->vm_start;
+ unsigned long area, offset = vmf->pgoff << PAGE_SHIFT;
int ret = 0;
- spu_context_nospu_trace(spufs_ps_nopfn__enter, ctx);
+ spu_context_nospu_trace(spufs_ps_fault__enter, ctx);
- offset += vma->vm_pgoff << PAGE_SHIFT;
if (offset >= ps_size)
- return NOPFN_SIGBUS;
+ return VM_FAULT_SIGBUS;
/*
* Because we release the mmap_sem, the context may be destroyed while
@@ -378,7 +379,7 @@
* pages to hand out to the user, but we don't want to wait
* with the mmap_sem held.
* It is possible to drop the mmap_sem here, but then we need
- * to return NOPFN_REFAULT because the mappings may have
+ * to return VM_FAULT_NOPAGE because the mappings may have
* hanged.
*/
if (spu_acquire(ctx))
@@ -386,14 +387,15 @@
if (ctx->state == SPU_STATE_SAVED) {
up_read(¤t->mm->mmap_sem);
- spu_context_nospu_trace(spufs_ps_nopfn__sleep, ctx);
+ spu_context_nospu_trace(spufs_ps_fault__sleep, ctx);
ret = spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE);
- spu_context_trace(spufs_ps_nopfn__wake, ctx, ctx->spu);
+ spu_context_trace(spufs_ps_fault__wake, ctx, ctx->spu);
down_read(¤t->mm->mmap_sem);
} else {
area = ctx->spu->problem_phys + ps_offs;
- vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT);
- spu_context_trace(spufs_ps_nopfn__insert, ctx, ctx->spu);
+ vm_insert_pfn(vma, (unsigned long)vmf->virtual_address,
+ (area + offset) >> PAGE_SHIFT);
+ spu_context_trace(spufs_ps_fault__insert, ctx, ctx->spu);
}
if (!ret)
@@ -401,18 +403,18 @@
refault:
put_spu_context(ctx);
- return NOPFN_REFAULT;
+ return VM_FAULT_NOPAGE;
}
#if SPUFS_MMAP_4K
-static unsigned long spufs_cntl_mmap_nopfn(struct vm_area_struct *vma,
- unsigned long address)
+static int spufs_cntl_mmap_fault(struct vm_area_struct *vma,
+ struct vm_fault *vmf)
{
- return spufs_ps_nopfn(vma, address, 0x4000, 0x1000);
+ return spufs_ps_fault(vma, vmf, 0x4000, SPUFS_CNTL_MAP_SIZE);
}
static struct vm_operations_struct spufs_cntl_mmap_vmops = {
- .nopfn = spufs_cntl_mmap_nopfn,
+ .fault = spufs_cntl_mmap_fault,
};
/*
@@ -1097,23 +1099,23 @@
return 4;
}
-static unsigned long spufs_signal1_mmap_nopfn(struct vm_area_struct *vma,
- unsigned long address)
+static int
+spufs_signal1_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
-#if PAGE_SIZE == 0x1000
- return spufs_ps_nopfn(vma, address, 0x14000, 0x1000);
-#elif PAGE_SIZE == 0x10000
+#if SPUFS_SIGNAL_MAP_SIZE == 0x1000
+ return spufs_ps_fault(vma, vmf, 0x14000, SPUFS_SIGNAL_MAP_SIZE);
+#elif SPUFS_SIGNAL_MAP_SIZE == 0x10000
/* For 64k pages, both signal1 and signal2 can be used to mmap the whole
* signal 1 and 2 area
*/
- return spufs_ps_nopfn(vma, address, 0x10000, 0x10000);
+ return spufs_ps_fault(vma, vmf, 0x10000, SPUFS_SIGNAL_MAP_SIZE);
#else
#error unsupported page size
#endif
}
static struct vm_operations_struct spufs_signal1_mmap_vmops = {
- .nopfn = spufs_signal1_mmap_nopfn,
+ .fault = spufs_signal1_mmap_fault,
};
static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
@@ -1234,23 +1236,23 @@
}
#if SPUFS_MMAP_4K
-static unsigned long spufs_signal2_mmap_nopfn(struct vm_area_struct *vma,
- unsigned long address)
+static int
+spufs_signal2_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
-#if PAGE_SIZE == 0x1000
- return spufs_ps_nopfn(vma, address, 0x1c000, 0x1000);
-#elif PAGE_SIZE == 0x10000
+#if SPUFS_SIGNAL_MAP_SIZE == 0x1000
+ return spufs_ps_fault(vma, vmf, 0x1c000, SPUFS_SIGNAL_MAP_SIZE);
+#elif SPUFS_SIGNAL_MAP_SIZE == 0x10000
/* For 64k pages, both signal1 and signal2 can be used to mmap the whole
* signal 1 and 2 area
*/
- return spufs_ps_nopfn(vma, address, 0x10000, 0x10000);
+ return spufs_ps_fault(vma, vmf, 0x10000, SPUFS_SIGNAL_MAP_SIZE);
#else
#error unsupported page size
#endif
}
static struct vm_operations_struct spufs_signal2_mmap_vmops = {
- .nopfn = spufs_signal2_mmap_nopfn,
+ .fault = spufs_signal2_mmap_fault,
};
static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
@@ -1362,14 +1364,14 @@
spufs_signal2_type_set, "%llu\n", SPU_ATTR_ACQUIRE);
#if SPUFS_MMAP_4K
-static unsigned long spufs_mss_mmap_nopfn(struct vm_area_struct *vma,
- unsigned long address)
+static int
+spufs_mss_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
- return spufs_ps_nopfn(vma, address, 0x0000, 0x1000);
+ return spufs_ps_fault(vma, vmf, 0x0000, SPUFS_MSS_MAP_SIZE);
}
static struct vm_operations_struct spufs_mss_mmap_vmops = {
- .nopfn = spufs_mss_mmap_nopfn,
+ .fault = spufs_mss_mmap_fault,
};
/*
@@ -1424,14 +1426,14 @@
.mmap = spufs_mss_mmap,
};
-static unsigned long spufs_psmap_mmap_nopfn(struct vm_area_struct *vma,
- unsigned long address)
+static int
+spufs_psmap_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
- return spufs_ps_nopfn(vma, address, 0x0000, 0x20000);
+ return spufs_ps_fault(vma, vmf, 0x0000, SPUFS_PS_MAP_SIZE);
}
static struct vm_operations_struct spufs_psmap_mmap_vmops = {
- .nopfn = spufs_psmap_mmap_nopfn,
+ .fault = spufs_psmap_mmap_fault,
};
/*
@@ -1484,14 +1486,14 @@
#if SPUFS_MMAP_4K
-static unsigned long spufs_mfc_mmap_nopfn(struct vm_area_struct *vma,
- unsigned long address)
+static int
+spufs_mfc_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
{
- return spufs_ps_nopfn(vma, address, 0x3000, 0x1000);
+ return spufs_ps_fault(vma, vmf, 0x3000, SPUFS_MFC_MAP_SIZE);
}
static struct vm_operations_struct spufs_mfc_mmap_vmops = {
- .nopfn = spufs_mfc_mmap_nopfn,
+ .fault = spufs_mfc_mmap_fault,
};
/*
@@ -2553,22 +2555,74 @@
wake_up(&ctx->switch_log->wait);
}
-struct tree_descr spufs_dir_contents[] = {
+static int spufs_show_ctx(struct seq_file *s, void *private)
+{
+ struct spu_context *ctx = s->private;
+ u64 mfc_control_RW;
+
+ mutex_lock(&ctx->state_mutex);
+ if (ctx->spu) {
+ struct spu *spu = ctx->spu;
+ struct spu_priv2 __iomem *priv2 = spu->priv2;
+
+ spin_lock_irq(&spu->register_lock);
+ mfc_control_RW = in_be64(&priv2->mfc_control_RW);
+ spin_unlock_irq(&spu->register_lock);
+ } else {
+ struct spu_state *csa = &ctx->csa;
+
+ mfc_control_RW = csa->priv2.mfc_control_RW;
+ }
+
+ seq_printf(s, "%c flgs(%lx) sflgs(%lx) pri(%d) ts(%d) spu(%02d)"
+ " %c %lx %lx %lx %lx %x %x\n",
+ ctx->state == SPU_STATE_SAVED ? 'S' : 'R',
+ ctx->flags,
+ ctx->sched_flags,
+ ctx->prio,
+ ctx->time_slice,
+ ctx->spu ? ctx->spu->number : -1,
+ !list_empty(&ctx->rq) ? 'q' : ' ',
+ ctx->csa.class_0_pending,
+ ctx->csa.class_0_dar,
+ ctx->csa.class_1_dsisr,
+ mfc_control_RW,
+ ctx->ops->runcntl_read(ctx),
+ ctx->ops->status_read(ctx));
+
+ mutex_unlock(&ctx->state_mutex);
+
+ return 0;
+}
+
+static int spufs_ctx_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, spufs_show_ctx, SPUFS_I(inode)->i_ctx);
+}
+
+static const struct file_operations spufs_ctx_fops = {
+ .open = spufs_ctx_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = single_release,
+};
+
+struct spufs_tree_descr spufs_dir_contents[] = {
{ "capabilities", &spufs_caps_fops, 0444, },
- { "mem", &spufs_mem_fops, 0666, },
- { "regs", &spufs_regs_fops, 0666, },
+ { "mem", &spufs_mem_fops, 0666, LS_SIZE, },
+ { "regs", &spufs_regs_fops, 0666, sizeof(struct spu_reg128[128]), },
{ "mbox", &spufs_mbox_fops, 0444, },
{ "ibox", &spufs_ibox_fops, 0444, },
{ "wbox", &spufs_wbox_fops, 0222, },
- { "mbox_stat", &spufs_mbox_stat_fops, 0444, },
- { "ibox_stat", &spufs_ibox_stat_fops, 0444, },
- { "wbox_stat", &spufs_wbox_stat_fops, 0444, },
+ { "mbox_stat", &spufs_mbox_stat_fops, 0444, sizeof(u32), },
+ { "ibox_stat", &spufs_ibox_stat_fops, 0444, sizeof(u32), },
+ { "wbox_stat", &spufs_wbox_stat_fops, 0444, sizeof(u32), },
{ "signal1", &spufs_signal1_fops, 0666, },
{ "signal2", &spufs_signal2_fops, 0666, },
{ "signal1_type", &spufs_signal1_type, 0666, },
{ "signal2_type", &spufs_signal2_type, 0666, },
{ "cntl", &spufs_cntl_fops, 0666, },
- { "fpcr", &spufs_fpcr_fops, 0666, },
+ { "fpcr", &spufs_fpcr_fops, 0666, sizeof(struct spu_reg128), },
{ "lslr", &spufs_lslr_ops, 0444, },
{ "mfc", &spufs_mfc_fops, 0666, },
{ "mss", &spufs_mss_fops, 0666, },
@@ -2578,29 +2632,31 @@
{ "decr_status", &spufs_decr_status_ops, 0666, },
{ "event_mask", &spufs_event_mask_ops, 0666, },
{ "event_status", &spufs_event_status_ops, 0444, },
- { "psmap", &spufs_psmap_fops, 0666, },
+ { "psmap", &spufs_psmap_fops, 0666, SPUFS_PS_MAP_SIZE, },
{ "phys-id", &spufs_id_ops, 0666, },
{ "object-id", &spufs_object_id_ops, 0666, },
- { "mbox_info", &spufs_mbox_info_fops, 0444, },
- { "ibox_info", &spufs_ibox_info_fops, 0444, },
- { "wbox_info", &spufs_wbox_info_fops, 0444, },
- { "dma_info", &spufs_dma_info_fops, 0444, },
- { "proxydma_info", &spufs_proxydma_info_fops, 0444, },
+ { "mbox_info", &spufs_mbox_info_fops, 0444, sizeof(u32), },
+ { "ibox_info", &spufs_ibox_info_fops, 0444, sizeof(u32), },
+ { "wbox_info", &spufs_wbox_info_fops, 0444, sizeof(u32), },
+ { "dma_info", &spufs_dma_info_fops, 0444,
+ sizeof(struct spu_dma_info), },
+ { "proxydma_info", &spufs_proxydma_info_fops, 0444,
+ sizeof(struct spu_proxydma_info)},
{ "tid", &spufs_tid_fops, 0444, },
{ "stat", &spufs_stat_fops, 0444, },
{ "switch_log", &spufs_switch_log_fops, 0444 },
{},
};
-struct tree_descr spufs_dir_nosched_contents[] = {
+struct spufs_tree_descr spufs_dir_nosched_contents[] = {
{ "capabilities", &spufs_caps_fops, 0444, },
- { "mem", &spufs_mem_fops, 0666, },
+ { "mem", &spufs_mem_fops, 0666, LS_SIZE, },
{ "mbox", &spufs_mbox_fops, 0444, },
{ "ibox", &spufs_ibox_fops, 0444, },
{ "wbox", &spufs_wbox_fops, 0222, },
- { "mbox_stat", &spufs_mbox_stat_fops, 0444, },
- { "ibox_stat", &spufs_ibox_stat_fops, 0444, },
- { "wbox_stat", &spufs_wbox_stat_fops, 0444, },
+ { "mbox_stat", &spufs_mbox_stat_fops, 0444, sizeof(u32), },
+ { "ibox_stat", &spufs_ibox_stat_fops, 0444, sizeof(u32), },
+ { "wbox_stat", &spufs_wbox_stat_fops, 0444, sizeof(u32), },
{ "signal1", &spufs_signal1_nosched_fops, 0222, },
{ "signal2", &spufs_signal2_nosched_fops, 0222, },
{ "signal1_type", &spufs_signal1_type, 0666, },
@@ -2609,7 +2665,7 @@
{ "mfc", &spufs_mfc_fops, 0666, },
{ "cntl", &spufs_cntl_fops, 0666, },
{ "npc", &spufs_npc_ops, 0666, },
- { "psmap", &spufs_psmap_fops, 0666, },
+ { "psmap", &spufs_psmap_fops, 0666, SPUFS_PS_MAP_SIZE, },
{ "phys-id", &spufs_id_ops, 0666, },
{ "object-id", &spufs_object_id_ops, 0666, },
{ "tid", &spufs_tid_fops, 0444, },
@@ -2617,6 +2673,11 @@
{},
};
+struct spufs_tree_descr spufs_dir_debug_contents[] = {
+ { ".ctx", &spufs_ctx_fops, 0444, },
+ {},
+};
+
struct spufs_coredump_reader spufs_coredump_read[] = {
{ "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])},
{ "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) },
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index f407b24..7123472 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -42,10 +42,19 @@
#include "spufs.h"
+struct spufs_sb_info {
+ int debug;
+};
+
static struct kmem_cache *spufs_inode_cache;
char *isolated_loader;
static int isolated_loader_size;
+static struct spufs_sb_info *spufs_get_sb_info(struct super_block *sb)
+{
+ return sb->s_fs_info;
+}
+
static struct inode *
spufs_alloc_inode(struct super_block *sb)
{
@@ -109,7 +118,7 @@
static int
spufs_new_file(struct super_block *sb, struct dentry *dentry,
const struct file_operations *fops, int mode,
- struct spu_context *ctx)
+ size_t size, struct spu_context *ctx)
{
static struct inode_operations spufs_file_iops = {
.setattr = spufs_setattr,
@@ -125,6 +134,7 @@
ret = 0;
inode->i_op = &spufs_file_iops;
inode->i_fop = fops;
+ inode->i_size = size;
inode->i_private = SPUFS_I(inode)->i_ctx = get_spu_context(ctx);
d_add(dentry, inode);
out:
@@ -177,7 +187,7 @@
return simple_rmdir(parent, dir);
}
-static int spufs_fill_dir(struct dentry *dir, struct tree_descr *files,
+static int spufs_fill_dir(struct dentry *dir, struct spufs_tree_descr *files,
int mode, struct spu_context *ctx)
{
struct dentry *dentry, *tmp;
@@ -189,7 +199,7 @@
if (!dentry)
goto out;
ret = spufs_new_file(dir->d_sb, dentry, files->ops,
- files->mode & mode, ctx);
+ files->mode & mode, files->size, ctx);
if (ret)
goto out;
files++;
@@ -279,6 +289,13 @@
if (ret)
goto out_free_ctx;
+ if (spufs_get_sb_info(dir->i_sb)->debug)
+ ret = spufs_fill_dir(dentry, spufs_dir_debug_contents,
+ mode, ctx);
+
+ if (ret)
+ goto out_free_ctx;
+
d_instantiate(dentry, inode);
dget(dentry);
dir->i_nlink++;
@@ -639,18 +656,19 @@
/* File system initialization */
enum {
- Opt_uid, Opt_gid, Opt_mode, Opt_err,
+ Opt_uid, Opt_gid, Opt_mode, Opt_debug, Opt_err,
};
static match_table_t spufs_tokens = {
- { Opt_uid, "uid=%d" },
- { Opt_gid, "gid=%d" },
- { Opt_mode, "mode=%o" },
- { Opt_err, NULL },
+ { Opt_uid, "uid=%d" },
+ { Opt_gid, "gid=%d" },
+ { Opt_mode, "mode=%o" },
+ { Opt_debug, "debug" },
+ { Opt_err, NULL },
};
static int
-spufs_parse_options(char *options, struct inode *root)
+spufs_parse_options(struct super_block *sb, char *options, struct inode *root)
{
char *p;
substring_t args[MAX_OPT_ARGS];
@@ -678,6 +696,9 @@
return 0;
root->i_mode = option | S_IFDIR;
break;
+ case Opt_debug:
+ spufs_get_sb_info(sb)->debug = 1;
+ break;
default:
return 0;
}
@@ -736,7 +757,7 @@
SPUFS_I(inode)->i_ctx = NULL;
ret = -EINVAL;
- if (!spufs_parse_options(data, inode))
+ if (!spufs_parse_options(sb, data, inode))
goto out_iput;
ret = -ENOMEM;
@@ -754,6 +775,7 @@
static int
spufs_fill_super(struct super_block *sb, void *data, int silent)
{
+ struct spufs_sb_info *info;
static struct super_operations s_ops = {
.alloc_inode = spufs_alloc_inode,
.destroy_inode = spufs_destroy_inode,
@@ -765,11 +787,16 @@
save_mount_options(sb, data);
+ info = kzalloc(sizeof(*info), GFP_KERNEL);
+ if (!info)
+ return -ENOMEM;
+
sb->s_maxbytes = MAX_LFS_FILESIZE;
sb->s_blocksize = PAGE_CACHE_SIZE;
sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
sb->s_magic = SPUFS_MAGIC;
sb->s_op = &s_ops;
+ sb->s_fs_info = info;
return spufs_create_root(sb, data);
}
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index e929e70..3465474 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -899,7 +899,8 @@
spu_add_to_rq(ctx);
} else {
spu_context_nospu_trace(spusched_tick__newslice, ctx);
- ctx->time_slice++;
+ if (!ctx->time_slice)
+ ctx->time_slice++;
}
out:
spu_release(ctx);
@@ -993,6 +994,7 @@
struct timespec ts;
struct spu *spu;
enum spu_utilization_state old_state;
+ int node;
ktime_get_ts(&ts);
curtime = timespec_to_ns(&ts);
@@ -1014,6 +1016,11 @@
spu->stats.times[old_state] += delta;
spu->stats.util_state = new_state;
spu->stats.tstamp = curtime;
+ node = spu->node;
+ if (old_state == SPU_UTIL_USER)
+ atomic_dec(&cbe_spu_info[node].busy_spus);
+ if (new_state == SPU_UTIL_USER);
+ atomic_inc(&cbe_spu_info[node].busy_spus);
}
}
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 454c277..8ae8ef9 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -32,6 +32,13 @@
#include <asm/spu_csa.h>
#include <asm/spu_info.h>
+#define SPUFS_PS_MAP_SIZE 0x20000
+#define SPUFS_MFC_MAP_SIZE 0x1000
+#define SPUFS_CNTL_MAP_SIZE 0x1000
+#define SPUFS_CNTL_MAP_SIZE 0x1000
+#define SPUFS_SIGNAL_MAP_SIZE PAGE_SIZE
+#define SPUFS_MSS_MAP_SIZE 0x1000
+
/* The magic number for our file system */
enum {
SPUFS_MAGIC = 0x23c9b64e,
@@ -228,8 +235,16 @@
#define SPUFS_I(inode) \
container_of(inode, struct spufs_inode_info, vfs_inode)
-extern struct tree_descr spufs_dir_contents[];
-extern struct tree_descr spufs_dir_nosched_contents[];
+struct spufs_tree_descr {
+ const char *name;
+ const struct file_operations *ops;
+ int mode;
+ size_t size;
+};
+
+extern struct spufs_tree_descr spufs_dir_contents[];
+extern struct spufs_tree_descr spufs_dir_nosched_contents[];
+extern struct spufs_tree_descr spufs_dir_debug_contents[];
/* system call implementation */
extern struct spufs_calls spufs_calls;
diff --git a/arch/powerpc/platforms/cell/spufs/sputrace.c b/arch/powerpc/platforms/cell/spufs/sputrace.c
index 5320242..8c0e957 100644
--- a/arch/powerpc/platforms/cell/spufs/sputrace.c
+++ b/arch/powerpc/platforms/cell/spufs/sputrace.c
@@ -182,10 +182,10 @@
{ "spu_yield__enter", "ctx %p", spu_context_nospu_event },
{ "spu_deactivate__enter", "ctx %p", spu_context_nospu_event },
{ "__spu_deactivate__unload", "ctx %p spu %p", spu_context_event },
- { "spufs_ps_nopfn__enter", "ctx %p", spu_context_nospu_event },
- { "spufs_ps_nopfn__sleep", "ctx %p", spu_context_nospu_event },
- { "spufs_ps_nopfn__wake", "ctx %p spu %p", spu_context_event },
- { "spufs_ps_nopfn__insert", "ctx %p spu %p", spu_context_event },
+ { "spufs_ps_fault__enter", "ctx %p", spu_context_nospu_event },
+ { "spufs_ps_fault__sleep", "ctx %p", spu_context_nospu_event },
+ { "spufs_ps_fault__wake", "ctx %p spu %p", spu_context_event },
+ { "spufs_ps_fault__insert", "ctx %p spu %p", spu_context_event },
{ "spu_acquire_saved__enter", "ctx %p", spu_context_nospu_event },
{ "destroy_spu_context__enter", "ctx %p", spu_context_nospu_event },
{ "spufs_stop_callback__enter", "ctx %p spu %p", spu_context_event },
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 116babb..1ba7ce5 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -63,13 +63,6 @@
DEFINE_PER_CPU(struct timer_list, heartbeat_timer);
unsigned long event_scan_interval;
-/*
- * XXX this should be in xmon.h, but putting it there means xmon.h
- * has to include <linux/interrupt.h> (to get irqreturn_t), which
- * causes all sorts of problems. -- paulus
- */
-extern irqreturn_t xmon_irq(int, void *);
-
extern unsigned long loops_per_jiffy;
/* To be replaced by RTAS when available */
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 4290889..4f9f818 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -59,6 +59,16 @@
help
This option enables support for the Motorola PrPMC2800 board
+config PPC_C2K
+ bool "SBS/GEFanuc C2K board"
+ depends on EMBEDDED6xx
+ select MV64X60
+ select NOT_COHERENT_CACHE
+ select MTD_CFI_I4
+ help
+ This option enables support for the GE Fanuc C2K board (formerly
+ an SBS board).
+
config TSI108_BRIDGE
bool
select PCI
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
index 06524d3..0773c08 100644
--- a/arch/powerpc/platforms/embedded6xx/Makefile
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -6,3 +6,4 @@
obj-$(CONFIG_STORCENTER) += storcenter.o
obj-$(CONFIG_PPC_HOLLY) += holly.o
obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o
+obj-$(CONFIG_PPC_C2K) += c2k.o
diff --git a/arch/powerpc/platforms/embedded6xx/c2k.c b/arch/powerpc/platforms/embedded6xx/c2k.c
new file mode 100644
index 0000000..d0b25b8
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/c2k.c
@@ -0,0 +1,158 @@
+/*
+ * Board setup routines for the GEFanuc C2K board
+ *
+ * Author: Remi Machet <rmachet@slac.stanford.edu>
+ *
+ * Originated from prpmc2800.c
+ *
+ * 2008 (c) Stanford University
+ * 2007 (c) MontaVista, Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/seq_file.h>
+#include <linux/time.h>
+#include <linux/of.h>
+#include <linux/kexec.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/system.h>
+#include <asm/time.h>
+
+#include <mm/mmu_decl.h>
+
+#include <sysdev/mv64x60.h>
+
+#define MV64x60_MPP_CNTL_0 0x0000
+#define MV64x60_MPP_CNTL_2 0x0008
+
+#define MV64x60_GPP_IO_CNTL 0x0000
+#define MV64x60_GPP_LEVEL_CNTL 0x0010
+#define MV64x60_GPP_VALUE_SET 0x0018
+
+static void __iomem *mv64x60_mpp_reg_base;
+static void __iomem *mv64x60_gpp_reg_base;
+
+static void __init c2k_setup_arch(void)
+{
+ struct device_node *np;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ /*
+ * ioremap mpp and gpp registers in case they are later
+ * needed by c2k_reset_board().
+ */
+ np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp");
+ reg = of_get_property(np, "reg", NULL);
+ paddr = of_translate_address(np, reg);
+ of_node_put(np);
+ mv64x60_mpp_reg_base = ioremap(paddr, reg[1]);
+
+ np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp");
+ reg = of_get_property(np, "reg", NULL);
+ paddr = of_translate_address(np, reg);
+ of_node_put(np);
+ mv64x60_gpp_reg_base = ioremap(paddr, reg[1]);
+
+#ifdef CONFIG_PCI
+ mv64x60_pci_init();
+#endif
+}
+
+static void c2k_reset_board(void)
+{
+ u32 temp;
+
+ local_irq_disable();
+
+ temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0);
+ temp &= 0xFFFF0FFF;
+ out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp);
+
+ temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
+ temp |= 0x00000004;
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
+
+ temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
+ temp |= 0x00000004;
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
+
+ temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2);
+ temp &= 0xFFFF0FFF;
+ out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp);
+
+ temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
+ temp |= 0x00080000;
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
+
+ temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
+ temp |= 0x00080000;
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
+
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004);
+}
+
+static void c2k_restart(char *cmd)
+{
+ c2k_reset_board();
+ msleep(100);
+ panic("restart failed\n");
+}
+
+#ifdef CONFIG_NOT_COHERENT_CACHE
+#define COHERENCY_SETTING "off"
+#else
+#define COHERENCY_SETTING "on"
+#endif
+
+void c2k_show_cpuinfo(struct seq_file *m)
+{
+ uint memsize = total_memory;
+
+ seq_printf(m, "Vendor\t\t: GEFanuc\n");
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+ seq_printf(m, "coherency\t: %s\n", COHERENCY_SETTING);
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init c2k_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "GEFanuc,C2K"))
+ return 0;
+
+ printk(KERN_INFO "Detected a GEFanuc C2K board\n");
+
+ _set_L2CR(0);
+ _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I);
+ return 1;
+}
+
+define_machine(c2k) {
+ .name = "C2K",
+ .probe = c2k_probe,
+ .setup_arch = c2k_setup_arch,
+ .init_early = mv64x60_init_early,
+ .show_cpuinfo = c2k_show_cpuinfo,
+ .init_IRQ = mv64x60_init_irq,
+ .get_irq = mv64x60_get_irq,
+ .restart = c2k_restart,
+ .calibrate_decr = generic_calibrate_decr,
+#ifdef CONFIG_KEXEC
+ .machine_kexec = default_machine_kexec,
+ .machine_kexec_prepare = default_machine_kexec_prepare,
+ .machine_crash_shutdown = default_machine_crash_shutdown,
+#endif
+};
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index 11fa3c7..ab5d868 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -214,13 +214,13 @@
enum dma_data_direction direction)
{
return iommu_map_single(NULL, &vio_iommu_table, vaddr, size,
- DMA_32BIT_MASK, direction);
+ DMA_32BIT_MASK, direction, NULL);
}
void iseries_hv_unmap(dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
- iommu_unmap_single(&vio_iommu_table, dma_handle, size, direction);
+ iommu_unmap_single(&vio_iommu_table, dma_handle, size, direction, NULL);
}
void __init iommu_vio_init(void)
diff --git a/arch/powerpc/platforms/maple/time.c b/arch/powerpc/platforms/maple/time.c
index 9f7579b..53bca13 100644
--- a/arch/powerpc/platforms/maple/time.c
+++ b/arch/powerpc/platforms/maple/time.c
@@ -41,8 +41,6 @@
#define DBG(x...)
#endif
-extern void GregorianDay(struct rtc_time * tm);
-
static int maple_rtc_addr;
static int maple_clock_read(int addr)
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 829b8b0..6d149ae 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -34,16 +34,10 @@
#include <asm/time.h>
#include <asm/pmac_feature.h>
#include <asm/mpic.h>
+#include <asm/xmon.h>
#include "pmac.h"
-/*
- * XXX this should be in xmon.h, but putting it there means xmon.h
- * has to include <linux/interrupt.h> (to get irqreturn_t), which
- * causes all sorts of problems. -- paulus
- */
-extern irqreturn_t xmon_irq(int, void *);
-
#ifdef CONFIG_PPC32
struct pmac_irq_hw {
unsigned int event;
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index cb2d8945..4ae3d00 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -36,6 +36,7 @@
#include <asm/ptrace.h>
#include <asm/atomic.h>
+#include <asm/code-patching.h>
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/pgtable.h>
@@ -786,8 +787,7 @@
{
unsigned int save_vector;
unsigned long target, flags;
- volatile unsigned int *vector
- = ((volatile unsigned int *)(KERNELBASE+0x100));
+ unsigned int *vector = (unsigned int *)(KERNELBASE+0x100);
if (nr < 0 || nr > 3)
return;
@@ -804,7 +804,7 @@
* b __secondary_start_pmac_0 + nr*8 - KERNELBASE
*/
target = (unsigned long) __secondary_start_pmac_0 + nr * 8;
- create_branch((unsigned long)vector, target, BRANCH_SET_LINK);
+ patch_branch(vector, target, BRANCH_SET_LINK);
/* Put some life in our friend */
pmac_call_feature(PMAC_FTR_RESET_CPU, NULL, nr, 0);
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 43c493f..d66c362 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -349,9 +349,14 @@
result = dev->match_id == drv->match_id;
- pr_info("%s:%d: dev=%u(%s), drv=%u(%s): %s\n", __func__, __LINE__,
- dev->match_id, dev->core.bus_id, drv->match_id, drv->core.name,
- (result ? "match" : "miss"));
+ if (result)
+ pr_info("%s:%d: dev=%u(%s), drv=%u(%s): match\n", __func__,
+ __LINE__, dev->match_id, dev->core.bus_id,
+ drv->match_id, drv->core.name);
+ else
+ pr_debug("%s:%d: dev=%u(%s), drv=%u(%s): miss\n", __func__,
+ __LINE__, dev->match_id, dev->core.bus_id,
+ drv->match_id, drv->core.name);
return result;
}
@@ -362,7 +367,7 @@
struct ps3_system_bus_driver *drv;
BUG_ON(!dev);
- pr_info(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
+ pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
drv = ps3_system_bus_dev_to_system_bus_drv(dev);
BUG_ON(!drv);
@@ -370,10 +375,10 @@
if (drv->probe)
result = drv->probe(dev);
else
- pr_info("%s:%d: %s no probe method\n", __func__, __LINE__,
+ pr_debug("%s:%d: %s no probe method\n", __func__, __LINE__,
dev->core.bus_id);
- pr_info(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id);
+ pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id);
return result;
}
@@ -384,7 +389,7 @@
struct ps3_system_bus_driver *drv;
BUG_ON(!dev);
- pr_info(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
+ pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
drv = ps3_system_bus_dev_to_system_bus_drv(dev);
BUG_ON(!drv);
@@ -395,7 +400,7 @@
dev_dbg(&dev->core, "%s:%d %s: no remove method\n",
__func__, __LINE__, drv->core.name);
- pr_info(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id);
+ pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id);
return result;
}
@@ -550,7 +555,7 @@
*/
static dma_addr_t ps3_sb_map_single(struct device *_dev, void *ptr, size_t size,
- enum dma_data_direction direction)
+ enum dma_data_direction direction, struct dma_attrs *attrs)
{
struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
int result;
@@ -570,7 +575,8 @@
static dma_addr_t ps3_ioc0_map_single(struct device *_dev, void *ptr,
size_t size,
- enum dma_data_direction direction)
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
int result;
@@ -603,7 +609,7 @@
}
static void ps3_unmap_single(struct device *_dev, dma_addr_t dma_addr,
- size_t size, enum dma_data_direction direction)
+ size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
{
struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
int result;
@@ -617,7 +623,7 @@
}
static int ps3_sb_map_sg(struct device *_dev, struct scatterlist *sgl,
- int nents, enum dma_data_direction direction)
+ int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
{
#if defined(CONFIG_PS3_DYNAMIC_DMA)
BUG_ON("do");
@@ -646,14 +652,15 @@
static int ps3_ioc0_map_sg(struct device *_dev, struct scatterlist *sg,
int nents,
- enum dma_data_direction direction)
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
BUG();
return 0;
}
static void ps3_sb_unmap_sg(struct device *_dev, struct scatterlist *sg,
- int nents, enum dma_data_direction direction)
+ int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
{
#if defined(CONFIG_PS3_DYNAMIC_DMA)
BUG_ON("do");
@@ -661,7 +668,8 @@
}
static void ps3_ioc0_unmap_sg(struct device *_dev, struct scatterlist *sg,
- int nents, enum dma_data_direction direction)
+ int nents, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
{
BUG();
}
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 6f544ba..c027f0a7 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -812,6 +812,7 @@
static inline void __restore_bars (struct pci_dn *pdn)
{
int i;
+ u32 cmd;
if (NULL==pdn->phb) return;
for (i=4; i<10; i++) {
@@ -832,6 +833,19 @@
/* max latency, min grant, interrupt pin and line */
rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
+
+ /* Restore PERR & SERR bits, some devices require it,
+ don't touch the other command bits */
+ rtas_read_config(pdn, PCI_COMMAND, 4, &cmd);
+ if (pdn->config_space[1] & PCI_COMMAND_PARITY)
+ cmd |= PCI_COMMAND_PARITY;
+ else
+ cmd &= ~PCI_COMMAND_PARITY;
+ if (pdn->config_space[1] & PCI_COMMAND_SERR)
+ cmd |= PCI_COMMAND_SERR;
+ else
+ cmd &= ~PCI_COMMAND_SERR;
+ rtas_write_config(pdn, PCI_COMMAND, 4, cmd);
}
/**
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c
index 9d3a40f..5a707da 100644
--- a/arch/powerpc/platforms/pseries/firmware.c
+++ b/arch/powerpc/platforms/pseries/firmware.c
@@ -26,6 +26,7 @@
#include <asm/prom.h>
#include <asm/udbg.h>
+#include "pseries.h"
typedef struct {
unsigned long val;
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 3c5727d..a1a368d 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -15,34 +15,13 @@
#include <asm/machdep.h>
#include <asm/pSeries_reconfig.h>
-static int pseries_remove_memory(struct device_node *np)
+static int pseries_remove_lmb(unsigned long base, unsigned int lmb_size)
{
- const char *type;
- const unsigned int *my_index;
- const unsigned int *regs;
- u64 start_pfn, start;
+ unsigned long start, start_pfn;
struct zone *zone;
- int ret = -EINVAL;
+ int ret;
- /*
- * Check to see if we are actually removing memory
- */
- type = of_get_property(np, "device_type", NULL);
- if (type == NULL || strcmp(type, "memory") != 0)
- return 0;
-
- /*
- * Find the memory index and size of the removing section
- */
- my_index = of_get_property(np, "ibm,my-drc-index", NULL);
- if (!my_index)
- return ret;
-
- regs = of_get_property(np, "reg", NULL);
- if (!regs)
- return ret;
-
- start_pfn = section_nr_to_pfn(*my_index & 0xffff);
+ start_pfn = base >> PFN_SECTION_SHIFT;
zone = page_zone(pfn_to_page(start_pfn));
/*
@@ -54,29 +33,58 @@
* to sysfs "state" file and we can't remove sysfs entries
* while writing to it. So we have to defer it to here.
*/
- ret = __remove_pages(zone, start_pfn, regs[3] >> PAGE_SHIFT);
+ ret = __remove_pages(zone, start_pfn, lmb_size >> PAGE_SHIFT);
if (ret)
return ret;
/*
* Update memory regions for memory remove
*/
- lmb_remove(start_pfn << PAGE_SHIFT, regs[3]);
+ lmb_remove(base, lmb_size);
/*
* Remove htab bolted mappings for this section of memory
*/
- start = (unsigned long)__va(start_pfn << PAGE_SHIFT);
- ret = remove_section_mapping(start, start + regs[3]);
+ start = (unsigned long)__va(base);
+ ret = remove_section_mapping(start, start + lmb_size);
+ return ret;
+}
+
+static int pseries_remove_memory(struct device_node *np)
+{
+ const char *type;
+ const unsigned int *regs;
+ unsigned long base;
+ unsigned int lmb_size;
+ int ret = -EINVAL;
+
+ /*
+ * Check to see if we are actually removing memory
+ */
+ type = of_get_property(np, "device_type", NULL);
+ if (type == NULL || strcmp(type, "memory") != 0)
+ return 0;
+
+ /*
+ * Find the bae address and size of the lmb
+ */
+ regs = of_get_property(np, "reg", NULL);
+ if (!regs)
+ return ret;
+
+ base = *(unsigned long *)regs;
+ lmb_size = regs[3];
+
+ ret = pseries_remove_lmb(base, lmb_size);
return ret;
}
static int pseries_add_memory(struct device_node *np)
{
const char *type;
- const unsigned int *my_index;
const unsigned int *regs;
- u64 start_pfn;
+ unsigned long base;
+ unsigned int lmb_size;
int ret = -EINVAL;
/*
@@ -87,23 +95,49 @@
return 0;
/*
- * Find the memory index and size of the added section
+ * Find the base and size of the lmb
*/
- my_index = of_get_property(np, "ibm,my-drc-index", NULL);
- if (!my_index)
- return ret;
-
regs = of_get_property(np, "reg", NULL);
if (!regs)
return ret;
- start_pfn = section_nr_to_pfn(*my_index & 0xffff);
+ base = *(unsigned long *)regs;
+ lmb_size = regs[3];
/*
* Update memory region to represent the memory add
*/
- lmb_add(start_pfn << PAGE_SHIFT, regs[3]);
- return 0;
+ ret = lmb_add(base, lmb_size);
+ return (ret < 0) ? -EINVAL : 0;
+}
+
+static int pseries_drconf_memory(unsigned long *base, unsigned int action)
+{
+ struct device_node *np;
+ const unsigned long *lmb_size;
+ int rc;
+
+ np = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
+ if (!np)
+ return -EINVAL;
+
+ lmb_size = of_get_property(np, "ibm,lmb-size", NULL);
+ if (!lmb_size) {
+ of_node_put(np);
+ return -EINVAL;
+ }
+
+ if (action == PSERIES_DRCONF_MEM_ADD) {
+ rc = lmb_add(*base, *lmb_size);
+ rc = (rc < 0) ? -EINVAL : 0;
+ } else if (action == PSERIES_DRCONF_MEM_REMOVE) {
+ rc = pseries_remove_lmb(*base, *lmb_size);
+ } else {
+ rc = -EINVAL;
+ }
+
+ of_node_put(np);
+ return rc;
}
static int pseries_memory_notifier(struct notifier_block *nb,
@@ -120,6 +154,11 @@
if (pseries_remove_memory(node))
err = NOTIFY_BAD;
break;
+ case PSERIES_DRCONF_MEM_ADD:
+ case PSERIES_DRCONF_MEM_REMOVE:
+ if (pseries_drconf_memory(node, action))
+ err = NOTIFY_BAD;
+ break;
default:
err = NOTIFY_DONE;
break;
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 176f1f39d..9a12908 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -135,9 +135,10 @@
u64 rpn;
long l, limit;
- if (npages == 1)
- return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
- direction);
+ if (npages == 1) {
+ tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, direction);
+ return;
+ }
tcep = __get_cpu_var(tce_page);
@@ -147,9 +148,11 @@
if (!tcep) {
tcep = (u64 *)__get_free_page(GFP_ATOMIC);
/* If allocation fails, fall back to the loop implementation */
- if (!tcep)
- return tce_build_pSeriesLP(tbl, tcenum, npages,
- uaddr, direction);
+ if (!tcep) {
+ tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
+ direction);
+ return;
+ }
__get_cpu_var(tce_page) = tcep;
}
diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c
index e9dd5fe..53cbd53 100644
--- a/arch/powerpc/platforms/pseries/kexec.c
+++ b/arch/powerpc/platforms/pseries/kexec.c
@@ -70,4 +70,4 @@
return 0;
}
-__initcall(pseries_kexec_setup);
+machine_device_initcall(pseries, pseries_kexec_setup);
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 2cbaedb..52a80e5 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -52,7 +52,7 @@
extern void pSeries_find_serial_port(void);
-int vtermno; /* virtual terminal# for udbg */
+static int vtermno; /* virtual terminal# for udbg */
#define __ALIGNED__ __attribute__((__aligned__(sizeof(long))))
static void udbg_hvsi_putc(char c)
@@ -305,7 +305,7 @@
flags = 0;
/* Make pHyp happy */
- if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))
+ if ((rflags & _PAGE_NO_CACHE) & !(rflags & _PAGE_WRITETHRU))
hpte_r &= ~_PAGE_COHERENT;
lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 2b548af..d20b96e 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -55,7 +55,7 @@
static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
static DEFINE_SPINLOCK(ras_log_buf_lock);
-char mce_data_buf[RTAS_ERROR_LOG_MAX];
+static char mce_data_buf[RTAS_ERROR_LOG_MAX];
static int ras_get_sensor_state_token;
static int ras_check_exception_token;
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index 75769aa..7637bd3 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -365,7 +365,7 @@
*buf = '\0';
buf++;
- handle = simple_strtoul(handle_str, NULL, 10);
+ handle = simple_strtoul(handle_str, NULL, 0);
*npp = of_find_node_by_phandle(handle);
return buf;
@@ -422,8 +422,8 @@
{
struct device_node *np;
unsigned char *value;
- char *name, *end;
- int length;
+ char *name, *end, *next_prop;
+ int rc, length;
struct property *newprop, *oldprop;
buf = parse_node(buf, bufsize, &np);
end = buf + bufsize;
@@ -431,7 +431,8 @@
if (!np)
return -ENODEV;
- if (parse_next_property(buf, end, &name, &length, &value) == NULL)
+ next_prop = parse_next_property(buf, end, &name, &length, &value);
+ if (!next_prop)
return -EINVAL;
newprop = new_property(name, length, value, NULL);
@@ -442,7 +443,34 @@
if (!oldprop)
return -ENODEV;
- return prom_update_property(np, newprop, oldprop);
+ rc = prom_update_property(np, newprop, oldprop);
+ if (rc)
+ return rc;
+
+ /* For memory under the ibm,dynamic-reconfiguration-memory node
+ * of the device tree, adding and removing memory is just an update
+ * to the ibm,dynamic-memory property instead of adding/removing a
+ * memory node in the device tree. For these cases we still need to
+ * involve the notifier chain.
+ */
+ if (!strcmp(name, "ibm,dynamic-memory")) {
+ int action;
+
+ next_prop = parse_next_property(next_prop, end, &name,
+ &length, &value);
+ if (!next_prop)
+ return -EINVAL;
+
+ if (!strcmp(name, "add"))
+ action = PSERIES_DRCONF_MEM_ADD;
+ else
+ action = PSERIES_DRCONF_MEM_REMOVE;
+
+ blocking_notifier_call_chain(&pSeries_reconfig_chain,
+ action, value);
+ }
+
+ return 0;
}
/**
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c
index 7d3e2b0..c9ffd8c 100644
--- a/arch/powerpc/platforms/pseries/rtasd.c
+++ b/arch/powerpc/platforms/pseries/rtasd.c
@@ -32,7 +32,7 @@
static DEFINE_SPINLOCK(rtasd_log_lock);
-DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait);
+static DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait);
static char *rtas_log_buf;
static unsigned long rtas_log_start;
@@ -329,7 +329,7 @@
return 0;
}
-const struct file_operations proc_rtas_log_operations = {
+static const struct file_operations proc_rtas_log_operations = {
.read = rtas_log_read,
.poll = rtas_log_poll,
.open = rtas_log_open,
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index f5d29f5..90beb44 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -109,7 +109,7 @@
fwnmi_active = 1;
}
-void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
+static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
{
unsigned int cascade_irq = i8259_irq();
if (cascade_irq != NO_IRQ)
@@ -482,7 +482,7 @@
* possible with power button press. If ibm,power-off-ups token is used
* it will allow auto poweron after power is restored.
*/
-void pSeries_power_off(void)
+static void pSeries_power_off(void)
{
int rc;
int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
diff --git a/arch/powerpc/sysdev/6xx-suspend.S b/arch/powerpc/sysdev/6xx-suspend.S
new file mode 100644
index 0000000..21cda085d
--- /dev/null
+++ b/arch/powerpc/sysdev/6xx-suspend.S
@@ -0,0 +1,52 @@
+/*
+ * Enter and leave sleep state on chips with 6xx-style HID0
+ * power management bits, which don't leave sleep state via reset.
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <asm/ppc_asm.h>
+#include <asm/reg.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
+
+_GLOBAL(mpc6xx_enter_standby)
+ mflr r4
+
+ mfspr r5, SPRN_HID0
+ rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
+ oris r5, r5, HID0_SLEEP@h
+ mtspr SPRN_HID0, r5
+ isync
+
+ lis r5, ret_from_standby@h
+ ori r5, r5, ret_from_standby@l
+ mtlr r5
+
+ rlwinm r5, r1, 0, 0, 31-THREAD_SHIFT
+ lwz r6, TI_LOCAL_FLAGS(r5)
+ ori r6, r6, _TLF_SLEEPING
+ stw r6, TI_LOCAL_FLAGS(r5)
+
+ mfmsr r5
+ ori r5, r5, MSR_EE
+ oris r5, r5, MSR_POW@h
+ sync
+ mtmsr r5
+ isync
+
+1: b 1b
+
+ret_from_standby:
+ mfspr r5, SPRN_HID0
+ rlwinm r5, r5, 0, ~HID0_SLEEP
+ mtspr SPRN_HID0, r5
+
+ mtlr r4
+ blr
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 6d386d0..16a0ed2 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -4,6 +4,7 @@
mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
+fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o
obj-$(CONFIG_PPC_MPC106) += grackle.o
obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o
@@ -11,8 +12,9 @@
obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o
-obj-$(CONFIG_FSL_PCI) += fsl_pci.o
+obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
+obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
@@ -40,7 +42,12 @@
ifeq ($(ARCH),powerpc)
obj-$(CONFIG_CPM) += cpm_common.o
obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o
+obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o
obj-$(CONFIG_PPC_DCR) += dcr.o
obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o
obj-$(CONFIG_UCODE_PATCH) += micropatch.o
endif
+
+ifeq ($(CONFIG_SUSPEND),y)
+obj-$(CONFIG_6xx) += 6xx-suspend.o
+endif
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/sysdev/bestcomm/bestcomm.c
index 64ec7d6..446c9ea 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.c
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c
@@ -443,7 +443,7 @@
/* Done ! */
printk(KERN_INFO "DMA: MPC52xx BestComm engine @%08lx ok !\n",
- bcom_eng->regs_base);
+ (long)bcom_eng->regs_base);
return 0;
diff --git a/arch/powerpc/sysdev/bestcomm/gen_bd.c b/arch/powerpc/sysdev/bestcomm/gen_bd.c
index 8d33eaf..a3a134c 100644
--- a/arch/powerpc/sysdev/bestcomm/gen_bd.c
+++ b/arch/powerpc/sysdev/bestcomm/gen_bd.c
@@ -20,6 +20,7 @@
#include <asm/io.h>
#include <asm/mpc52xx.h>
+#include <asm/mpc52xx_psc.h>
#include "bestcomm.h"
#include "bestcomm_priv.h"
@@ -253,6 +254,100 @@
}
EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_release);
+/* ---------------------------------------------------------------------
+ * PSC support code
+ */
+
+/**
+ * bcom_psc_parameters - Bestcomm initialization value table for PSC devices
+ *
+ * This structure is only used internally. It is a lookup table for PSC
+ * specific parameters to bestcomm tasks.
+ */
+static struct bcom_psc_params {
+ int rx_initiator;
+ int rx_ipr;
+ int tx_initiator;
+ int tx_ipr;
+} bcom_psc_params[] = {
+ [0] = {
+ .rx_initiator = BCOM_INITIATOR_PSC1_RX,
+ .rx_ipr = BCOM_IPR_PSC1_RX,
+ .tx_initiator = BCOM_INITIATOR_PSC1_TX,
+ .tx_ipr = BCOM_IPR_PSC1_TX,
+ },
+ [1] = {
+ .rx_initiator = BCOM_INITIATOR_PSC2_RX,
+ .rx_ipr = BCOM_IPR_PSC2_RX,
+ .tx_initiator = BCOM_INITIATOR_PSC2_TX,
+ .tx_ipr = BCOM_IPR_PSC2_TX,
+ },
+ [2] = {
+ .rx_initiator = BCOM_INITIATOR_PSC3_RX,
+ .rx_ipr = BCOM_IPR_PSC3_RX,
+ .tx_initiator = BCOM_INITIATOR_PSC3_TX,
+ .tx_ipr = BCOM_IPR_PSC3_TX,
+ },
+ [3] = {
+ .rx_initiator = BCOM_INITIATOR_PSC4_RX,
+ .rx_ipr = BCOM_IPR_PSC4_RX,
+ .tx_initiator = BCOM_INITIATOR_PSC4_TX,
+ .tx_ipr = BCOM_IPR_PSC4_TX,
+ },
+ [4] = {
+ .rx_initiator = BCOM_INITIATOR_PSC5_RX,
+ .rx_ipr = BCOM_IPR_PSC5_RX,
+ .tx_initiator = BCOM_INITIATOR_PSC5_TX,
+ .tx_ipr = BCOM_IPR_PSC5_TX,
+ },
+ [5] = {
+ .rx_initiator = BCOM_INITIATOR_PSC6_RX,
+ .rx_ipr = BCOM_IPR_PSC6_RX,
+ .tx_initiator = BCOM_INITIATOR_PSC6_TX,
+ .tx_ipr = BCOM_IPR_PSC6_TX,
+ },
+};
+
+/**
+ * bcom_psc_gen_bd_rx_init - Allocate a receive bcom_task for a PSC port
+ * @psc_num: Number of the PSC to allocate a task for
+ * @queue_len: number of buffer descriptors to allocate for the task
+ * @fifo: physical address of FIFO register
+ * @maxbufsize: Maximum receive data size in bytes.
+ *
+ * Allocate a bestcomm task structure for receiving data from a PSC.
+ */
+struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len,
+ phys_addr_t fifo, int maxbufsize)
+{
+ if (psc_num >= MPC52xx_PSC_MAXNUM)
+ return NULL;
+
+ return bcom_gen_bd_rx_init(queue_len, fifo,
+ bcom_psc_params[psc_num].rx_initiator,
+ bcom_psc_params[psc_num].rx_ipr,
+ maxbufsize);
+}
+EXPORT_SYMBOL_GPL(bcom_psc_gen_bd_rx_init);
+
+/**
+ * bcom_psc_gen_bd_tx_init - Allocate a transmit bcom_task for a PSC port
+ * @psc_num: Number of the PSC to allocate a task for
+ * @queue_len: number of buffer descriptors to allocate for the task
+ * @fifo: physical address of FIFO register
+ *
+ * Allocate a bestcomm task structure for transmitting data to a PSC.
+ */
+struct bcom_task *
+bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len, phys_addr_t fifo)
+{
+ struct psc;
+ return bcom_gen_bd_tx_init(queue_len, fifo,
+ bcom_psc_params[psc_num].tx_initiator,
+ bcom_psc_params[psc_num].tx_ipr);
+}
+EXPORT_SYMBOL_GPL(bcom_psc_gen_bd_tx_init);
+
MODULE_DESCRIPTION("BestComm General Buffer Descriptor tasks driver");
MODULE_AUTHOR("Jeff Gibbons <jeff.gibbons@appspec.com>");
diff --git a/arch/powerpc/sysdev/bestcomm/gen_bd.h b/arch/powerpc/sysdev/bestcomm/gen_bd.h
index 5b6fa80..de47260 100644
--- a/arch/powerpc/sysdev/bestcomm/gen_bd.h
+++ b/arch/powerpc/sysdev/bestcomm/gen_bd.h
@@ -44,5 +44,10 @@
bcom_gen_bd_tx_release(struct bcom_task *tsk);
+/* PSC support utility wrappers */
+struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len,
+ phys_addr_t fifo, int maxbufsize);
+struct bcom_task * bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len,
+ phys_addr_t fifo);
#endif /* __BESTCOMM_GEN_BD_H__ */
diff --git a/arch/powerpc/sysdev/bestcomm/sram.c b/arch/powerpc/sysdev/bestcomm/sram.c
index 9978438..5d74ef7 100644
--- a/arch/powerpc/sysdev/bestcomm/sram.c
+++ b/arch/powerpc/sysdev/bestcomm/sram.c
@@ -86,7 +86,7 @@
if (!bcom_sram->base_virt) {
printk(KERN_ERR "%s: bcom_sram_init: "
"Map error SRAM zone 0x%08lx (0x%0x)!\n",
- owner, bcom_sram->base_phys, bcom_sram->size );
+ owner, (long)bcom_sram->base_phys, bcom_sram->size );
rv = -ENOMEM;
goto error_release;
}
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 58292a0..661df42 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -159,7 +159,7 @@
out_be32(&cpic_reg->cpic_cimr, 0);
- cpm_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR,
+ cpm_pic_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
64, &cpm_pic_host_ops, 64);
if (cpm_pic_host == NULL) {
printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index 5fe65b2..b16ca3e 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -266,7 +266,7 @@
out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);
/* create a legacy host */
- cpm2_pic_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
+ cpm2_pic_host = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
64, &cpm2_pic_host_ops, 64);
if (cpm2_pic_host == NULL) {
printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index cb7df2d..e4b7296 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -37,7 +37,7 @@
u8 __iomem *txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]);
if (c == '\n')
- udbg_putc('\r');
+ udbg_putc_cpm('\r');
while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000)
;
@@ -53,7 +53,6 @@
setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO);
#endif
udbg_putc = udbg_putc_cpm;
- udbg_putc('X');
}
}
#endif
@@ -85,9 +84,13 @@
np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data");
if (!np) {
- printk(KERN_ERR "Cannot find CPM muram data node");
- ret = -ENODEV;
- goto out;
+ /* try legacy bindings */
+ np = of_find_node_by_name(NULL, "data-only");
+ if (!np) {
+ printk(KERN_ERR "Cannot find CPM muram data node");
+ ret = -ENODEV;
+ goto out;
+ }
}
muram_pbase = of_translate_address(np, zero);
@@ -189,6 +192,12 @@
}
EXPORT_SYMBOL(cpm_muram_addr);
+unsigned long cpm_muram_offset(void __iomem *addr)
+{
+ return addr - (void __iomem *)muram_vbase;
+}
+EXPORT_SYMBOL(cpm_muram_offset);
+
/**
* cpm_muram_dma - turn a muram virtual address into a DMA address
* @offset: virtual address from cpm_muram_addr() to convert
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
index 437e48d..a8ba998 100644
--- a/arch/powerpc/sysdev/dcr.c
+++ b/arch/powerpc/sysdev/dcr.c
@@ -23,6 +23,107 @@
#include <asm/prom.h>
#include <asm/dcr.h>
+#ifdef CONFIG_PPC_DCR_MMIO
+static struct device_node *find_dcr_parent(struct device_node *node)
+{
+ struct device_node *par, *tmp;
+ const u32 *p;
+
+ for (par = of_node_get(node); par;) {
+ if (of_get_property(par, "dcr-controller", NULL))
+ break;
+ p = of_get_property(par, "dcr-parent", NULL);
+ tmp = par;
+ if (p == NULL)
+ par = of_get_parent(par);
+ else
+ par = of_find_node_by_phandle(*p);
+ of_node_put(tmp);
+ }
+ return par;
+}
+#endif
+
+#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
+
+bool dcr_map_ok_generic(dcr_host_t host)
+{
+ if (host.type == DCR_HOST_NATIVE)
+ return dcr_map_ok_native(host.host.native);
+ else if (host.type == DCR_HOST_MMIO)
+ return dcr_map_ok_mmio(host.host.mmio);
+ else
+ return 0;
+}
+EXPORT_SYMBOL_GPL(dcr_map_ok_generic);
+
+dcr_host_t dcr_map_generic(struct device_node *dev,
+ unsigned int dcr_n,
+ unsigned int dcr_c)
+{
+ dcr_host_t host;
+ struct device_node *dp;
+ const char *prop;
+
+ host.type = DCR_HOST_INVALID;
+
+ dp = find_dcr_parent(dev);
+ if (dp == NULL)
+ return host;
+
+ prop = of_get_property(dp, "dcr-access-method", NULL);
+
+ pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop);
+
+ if (!strcmp(prop, "native")) {
+ host.type = DCR_HOST_NATIVE;
+ host.host.native = dcr_map_native(dev, dcr_n, dcr_c);
+ } else if (!strcmp(prop, "mmio")) {
+ host.type = DCR_HOST_MMIO;
+ host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);
+ }
+
+ of_node_put(dp);
+ return host;
+}
+EXPORT_SYMBOL_GPL(dcr_map_generic);
+
+void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)
+{
+ if (host.type == DCR_HOST_NATIVE)
+ dcr_unmap_native(host.host.native, dcr_c);
+ else if (host.type == DCR_HOST_MMIO)
+ dcr_unmap_mmio(host.host.mmio, dcr_c);
+ else /* host.type == DCR_HOST_INVALID */
+ WARN_ON(true);
+}
+EXPORT_SYMBOL_GPL(dcr_unmap_generic);
+
+u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n)
+{
+ if (host.type == DCR_HOST_NATIVE)
+ return dcr_read_native(host.host.native, dcr_n);
+ else if (host.type == DCR_HOST_MMIO)
+ return dcr_read_mmio(host.host.mmio, dcr_n);
+ else /* host.type == DCR_HOST_INVALID */
+ WARN_ON(true);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(dcr_read_generic);
+
+void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value)
+{
+ if (host.type == DCR_HOST_NATIVE)
+ dcr_write_native(host.host.native, dcr_n, value);
+ else if (host.type == DCR_HOST_MMIO)
+ dcr_write_mmio(host.host.mmio, dcr_n, value);
+ else /* host.type == DCR_HOST_INVALID */
+ WARN_ON(true);
+}
+EXPORT_SYMBOL_GPL(dcr_write_generic);
+
+#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
+
unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
{
unsigned int ds;
@@ -47,26 +148,7 @@
}
EXPORT_SYMBOL_GPL(dcr_resource_len);
-#ifndef CONFIG_PPC_DCR_NATIVE
-
-static struct device_node * find_dcr_parent(struct device_node * node)
-{
- struct device_node *par, *tmp;
- const u32 *p;
-
- for (par = of_node_get(node); par;) {
- if (of_get_property(par, "dcr-controller", NULL))
- break;
- p = of_get_property(par, "dcr-parent", NULL);
- tmp = par;
- if (p == NULL)
- par = of_get_parent(par);
- else
- par = of_find_node_by_phandle(*p);
- of_node_put(tmp);
- }
- return par;
-}
+#ifdef CONFIG_PPC_DCR_MMIO
u64 of_translate_dcr_address(struct device_node *dev,
unsigned int dcr_n,
@@ -75,7 +157,7 @@
struct device_node *dp;
const u32 *p;
unsigned int stride;
- u64 ret;
+ u64 ret = OF_BAD_ADDR;
dp = find_dcr_parent(dev);
if (dp == NULL)
@@ -90,7 +172,7 @@
if (p == NULL)
p = of_get_property(dp, "dcr-mmio-space", NULL);
if (p == NULL)
- return OF_BAD_ADDR;
+ goto done;
/* Maybe could do some better range checking here */
ret = of_translate_address(dp, p);
@@ -98,21 +180,25 @@
ret += (u64)(stride) * (u64)dcr_n;
if (out_stride)
*out_stride = stride;
+
+ done:
+ of_node_put(dp);
return ret;
}
-dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
- unsigned int dcr_c)
+dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
+ unsigned int dcr_n,
+ unsigned int dcr_c)
{
- dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
+ dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
u64 addr;
pr_debug("dcr_map(%s, 0x%x, 0x%x)\n",
dev->full_name, dcr_n, dcr_c);
addr = of_translate_dcr_address(dev, dcr_n, &ret.stride);
- pr_debug("translates to addr: 0x%lx, stride: 0x%x\n",
- addr, ret.stride);
+ pr_debug("translates to addr: 0x%llx, stride: 0x%x\n",
+ (unsigned long long) addr, ret.stride);
if (addr == OF_BAD_ADDR)
return ret;
pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);
@@ -124,11 +210,11 @@
ret.token -= dcr_n * ret.stride;
return ret;
}
-EXPORT_SYMBOL_GPL(dcr_map);
+EXPORT_SYMBOL_GPL(dcr_map_mmio);
-void dcr_unmap(dcr_host_t host, unsigned int dcr_c)
+void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c)
{
- dcr_host_t h = host;
+ dcr_host_mmio_t h = host;
if (h.token == NULL)
return;
@@ -136,7 +222,11 @@
iounmap(h.token);
h.token = NULL;
}
-EXPORT_SYMBOL_GPL(dcr_unmap);
-#else /* defined(CONFIG_PPC_DCR_NATIVE) */
+EXPORT_SYMBOL_GPL(dcr_unmap_mmio);
+
+#endif /* defined(CONFIG_PPC_DCR_MMIO) */
+
+#ifdef CONFIG_PPC_DCR_NATIVE
DEFINE_SPINLOCK(dcr_ind_lock);
-#endif /* !defined(CONFIG_PPC_DCR_NATIVE) */
+#endif /* defined(CONFIG_PPC_DCR_NATIVE) */
+
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
new file mode 100644
index 0000000..714ec02
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -0,0 +1,434 @@
+/*
+ * Freescale General-purpose Timers Module
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ * Shlomi Gridish <gridish@freescale.com>
+ * Jerry Huang <Chang-Ming.Huang@freescale.com>
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ * Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/list.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/spinlock.h>
+#include <linux/bitops.h>
+#include <asm/fsl_gtm.h>
+
+#define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1)
+#define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0)
+
+#define GTMDR_ICLK_MASK (3 << 1)
+#define GTMDR_ICLK_ICAS (0 << 1)
+#define GTMDR_ICLK_ICLK (1 << 1)
+#define GTMDR_ICLK_SLGO (2 << 1)
+#define GTMDR_FRR (1 << 3)
+#define GTMDR_ORI (1 << 4)
+#define GTMDR_SPS(x) ((x) << 8)
+
+struct gtm_timers_regs {
+ u8 gtcfr1; /* Timer 1, Timer 2 global config register */
+ u8 res0[0x3];
+ u8 gtcfr2; /* Timer 3, timer 4 global config register */
+ u8 res1[0xB];
+ __be16 gtmdr1; /* Timer 1 mode register */
+ __be16 gtmdr2; /* Timer 2 mode register */
+ __be16 gtrfr1; /* Timer 1 reference register */
+ __be16 gtrfr2; /* Timer 2 reference register */
+ __be16 gtcpr1; /* Timer 1 capture register */
+ __be16 gtcpr2; /* Timer 2 capture register */
+ __be16 gtcnr1; /* Timer 1 counter */
+ __be16 gtcnr2; /* Timer 2 counter */
+ __be16 gtmdr3; /* Timer 3 mode register */
+ __be16 gtmdr4; /* Timer 4 mode register */
+ __be16 gtrfr3; /* Timer 3 reference register */
+ __be16 gtrfr4; /* Timer 4 reference register */
+ __be16 gtcpr3; /* Timer 3 capture register */
+ __be16 gtcpr4; /* Timer 4 capture register */
+ __be16 gtcnr3; /* Timer 3 counter */
+ __be16 gtcnr4; /* Timer 4 counter */
+ __be16 gtevr1; /* Timer 1 event register */
+ __be16 gtevr2; /* Timer 2 event register */
+ __be16 gtevr3; /* Timer 3 event register */
+ __be16 gtevr4; /* Timer 4 event register */
+ __be16 gtpsr1; /* Timer 1 prescale register */
+ __be16 gtpsr2; /* Timer 2 prescale register */
+ __be16 gtpsr3; /* Timer 3 prescale register */
+ __be16 gtpsr4; /* Timer 4 prescale register */
+ u8 res2[0x40];
+} __attribute__ ((packed));
+
+struct gtm {
+ unsigned int clock;
+ struct gtm_timers_regs __iomem *regs;
+ struct gtm_timer timers[4];
+ spinlock_t lock;
+ struct list_head list_node;
+};
+
+static LIST_HEAD(gtms);
+
+/**
+ * gtm_get_timer - request GTM timer to use it with the rest of GTM API
+ * Context: non-IRQ
+ *
+ * This function reserves GTM timer for later use. It returns gtm_timer
+ * structure to use with the rest of GTM API, you should use timer->irq
+ * to manage timer interrupt.
+ */
+struct gtm_timer *gtm_get_timer16(void)
+{
+ struct gtm *gtm = NULL;
+ int i;
+
+ list_for_each_entry(gtm, >ms, list_node) {
+ spin_lock_irq(>m->lock);
+
+ for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
+ if (!gtm->timers[i].requested) {
+ gtm->timers[i].requested = true;
+ spin_unlock_irq(>m->lock);
+ return >m->timers[i];
+ }
+ }
+
+ spin_unlock_irq(>m->lock);
+ }
+
+ if (gtm)
+ return ERR_PTR(-EBUSY);
+ return ERR_PTR(-ENODEV);
+}
+EXPORT_SYMBOL(gtm_get_timer16);
+
+/**
+ * gtm_get_specific_timer - request specific GTM timer
+ * @gtm: specific GTM, pass here GTM's device_node->data
+ * @timer: specific timer number, Timer1 is 0.
+ * Context: non-IRQ
+ *
+ * This function reserves GTM timer for later use. It returns gtm_timer
+ * structure to use with the rest of GTM API, you should use timer->irq
+ * to manage timer interrupt.
+ */
+struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm,
+ unsigned int timer)
+{
+ struct gtm_timer *ret = ERR_PTR(-EBUSY);
+
+ if (timer > 3)
+ return ERR_PTR(-EINVAL);
+
+ spin_lock_irq(>m->lock);
+
+ if (gtm->timers[timer].requested)
+ goto out;
+
+ ret = >m->timers[timer];
+ ret->requested = true;
+
+out:
+ spin_unlock_irq(>m->lock);
+ return ret;
+}
+EXPORT_SYMBOL(gtm_get_specific_timer16);
+
+/**
+ * gtm_put_timer16 - release 16 bits GTM timer
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ * Context: any
+ *
+ * This function releases GTM timer so others may request it.
+ */
+void gtm_put_timer16(struct gtm_timer *tmr)
+{
+ gtm_stop_timer16(tmr);
+
+ spin_lock_irq(&tmr->gtm->lock);
+ tmr->requested = false;
+ spin_unlock_irq(&tmr->gtm->lock);
+}
+EXPORT_SYMBOL(gtm_put_timer16);
+
+/*
+ * This is back-end for the exported functions, it's used to reset single
+ * timer in reference mode.
+ */
+static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency,
+ int reference_value, bool free_run)
+{
+ struct gtm *gtm = tmr->gtm;
+ int num = tmr - >m->timers[0];
+ unsigned int prescaler;
+ u8 iclk = GTMDR_ICLK_ICLK;
+ u8 psr;
+ u8 sps;
+ unsigned long flags;
+ int max_prescaler = 256 * 256 * 16;
+
+ /* CPM2 doesn't have primary prescaler */
+ if (!tmr->gtpsr)
+ max_prescaler /= 256;
+
+ prescaler = gtm->clock / frequency;
+ /*
+ * We have two 8 bit prescalers -- primary and secondary (psr, sps),
+ * plus "slow go" mode (clk / 16). So, total prescale value is
+ * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr.
+ */
+ if (prescaler > max_prescaler)
+ return -EINVAL;
+
+ if (prescaler > max_prescaler / 16) {
+ iclk = GTMDR_ICLK_SLGO;
+ prescaler /= 16;
+ }
+
+ if (prescaler <= 256) {
+ psr = 0;
+ sps = prescaler - 1;
+ } else {
+ psr = 256 - 1;
+ sps = prescaler / 256 - 1;
+ }
+
+ spin_lock_irqsave(>m->lock, flags);
+
+ /*
+ * Properly reset timers: stop, reset, set up prescalers, reference
+ * value and clear event register.
+ */
+ clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
+ GTCFR_STP(num) | GTCFR_RST(num));
+
+ setbits8(tmr->gtcfr, GTCFR_STP(num));
+
+ if (tmr->gtpsr)
+ out_be16(tmr->gtpsr, psr);
+ clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
+ GTMDR_ORI | (free_run ? GTMDR_FRR : 0));
+ out_be16(tmr->gtcnr, 0);
+ out_be16(tmr->gtrfr, reference_value);
+ out_be16(tmr->gtevr, 0xFFFF);
+
+ /* Let it be. */
+ clrbits8(tmr->gtcfr, GTCFR_STP(num));
+
+ spin_unlock_irqrestore(>m->lock, flags);
+
+ return 0;
+}
+
+/**
+ * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @usec: timer interval in microseconds
+ * @reload: if set, the timer will reset upon expiry rather than
+ * continue running free.
+ * Context: any
+ *
+ * This function (re)sets the GTM timer so that it counts up to the requested
+ * interval value, and fires the interrupt when the value is reached. This
+ * function will reduce the precision of the timer as needed in order for the
+ * requested timeout to fit in a 16-bit register.
+ */
+int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload)
+{
+ /* quite obvious, frequency which is enough for µSec precision */
+ int freq = 1000000;
+ unsigned int bit;
+
+ bit = fls_long(usec);
+ if (bit > 15) {
+ freq >>= bit - 15;
+ usec >>= bit - 15;
+ }
+
+ if (!freq)
+ return -EINVAL;
+
+ return gtm_set_ref_timer16(tmr, freq, usec, reload);
+}
+EXPORT_SYMBOL(gtm_set_timer16);
+
+/**
+ * gtm_set_exact_utimer16 - (re)set 16 bits timer
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @usec: timer interval in microseconds
+ * @reload: if set, the timer will reset upon expiry rather than
+ * continue running free.
+ * Context: any
+ *
+ * This function (re)sets GTM timer so that it counts up to the requested
+ * interval value, and fires the interrupt when the value is reached. If reload
+ * flag was set, timer will also reset itself upon reference value, otherwise
+ * it continues to increment.
+ *
+ * The _exact_ bit in the function name states that this function will not
+ * crop precision of the "usec" argument, thus usec is limited to 16 bits
+ * (single timer width).
+ */
+int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload)
+{
+ /* quite obvious, frequency which is enough for µSec precision */
+ const int freq = 1000000;
+
+ /*
+ * We can lower the frequency (and probably power consumption) by
+ * dividing both frequency and usec by 2 until there is no remainder.
+ * But we won't bother with this unless savings are measured, so just
+ * run the timer as is.
+ */
+
+ return gtm_set_ref_timer16(tmr, freq, usec, reload);
+}
+EXPORT_SYMBOL(gtm_set_exact_timer16);
+
+/**
+ * gtm_stop_timer16 - stop single timer
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ * Context: any
+ *
+ * This function simply stops the GTM timer.
+ */
+void gtm_stop_timer16(struct gtm_timer *tmr)
+{
+ struct gtm *gtm = tmr->gtm;
+ int num = tmr - >m->timers[0];
+ unsigned long flags;
+
+ spin_lock_irqsave(>m->lock, flags);
+
+ setbits8(tmr->gtcfr, GTCFR_STP(num));
+ out_be16(tmr->gtevr, 0xFFFF);
+
+ spin_unlock_irqrestore(>m->lock, flags);
+}
+EXPORT_SYMBOL(gtm_stop_timer16);
+
+/**
+ * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
+ * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @events: events mask to ack
+ * Context: any
+ *
+ * Thus function used to acknowledge timer interrupt event, use it inside the
+ * interrupt handler.
+ */
+void gtm_ack_timer16(struct gtm_timer *tmr, u16 events)
+{
+ out_be16(tmr->gtevr, events);
+}
+EXPORT_SYMBOL(gtm_ack_timer16);
+
+static void __init gtm_set_shortcuts(struct device_node *np,
+ struct gtm_timer *timers,
+ struct gtm_timers_regs __iomem *regs)
+{
+ /*
+ * Yeah, I don't like this either, but timers' registers a bit messed,
+ * so we have to provide shortcuts to write timer independent code.
+ * Alternative option is to create gt*() accessors, but that will be
+ * even uglier and cryptic.
+ */
+ timers[0].gtcfr = ®s->gtcfr1;
+ timers[0].gtmdr = ®s->gtmdr1;
+ timers[0].gtcnr = ®s->gtcnr1;
+ timers[0].gtrfr = ®s->gtrfr1;
+ timers[0].gtevr = ®s->gtevr1;
+
+ timers[1].gtcfr = ®s->gtcfr1;
+ timers[1].gtmdr = ®s->gtmdr2;
+ timers[1].gtcnr = ®s->gtcnr2;
+ timers[1].gtrfr = ®s->gtrfr2;
+ timers[1].gtevr = ®s->gtevr2;
+
+ timers[2].gtcfr = ®s->gtcfr2;
+ timers[2].gtmdr = ®s->gtmdr3;
+ timers[2].gtcnr = ®s->gtcnr3;
+ timers[2].gtrfr = ®s->gtrfr3;
+ timers[2].gtevr = ®s->gtevr3;
+
+ timers[3].gtcfr = ®s->gtcfr2;
+ timers[3].gtmdr = ®s->gtmdr4;
+ timers[3].gtcnr = ®s->gtcnr4;
+ timers[3].gtrfr = ®s->gtrfr4;
+ timers[3].gtevr = ®s->gtevr4;
+
+ /* CPM2 doesn't have primary prescaler */
+ if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) {
+ timers[0].gtpsr = ®s->gtpsr1;
+ timers[1].gtpsr = ®s->gtpsr2;
+ timers[2].gtpsr = ®s->gtpsr3;
+ timers[3].gtpsr = ®s->gtpsr4;
+ }
+}
+
+static int __init fsl_gtm_init(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, "fsl,gtm") {
+ int i;
+ struct gtm *gtm;
+ const u32 *clock;
+ int size;
+
+ gtm = kzalloc(sizeof(*gtm), GFP_KERNEL);
+ if (!gtm) {
+ pr_err("%s: unable to allocate memory\n",
+ np->full_name);
+ continue;
+ }
+
+ spin_lock_init(>m->lock);
+
+ clock = of_get_property(np, "clock-frequency", &size);
+ if (!clock || size != sizeof(*clock)) {
+ pr_err("%s: no clock-frequency\n", np->full_name);
+ goto err;
+ }
+ gtm->clock = *clock;
+
+ for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
+ int ret;
+ struct resource irq;
+
+ ret = of_irq_to_resource(np, i, &irq);
+ if (ret == NO_IRQ) {
+ pr_err("%s: not enough interrupts specified\n",
+ np->full_name);
+ goto err;
+ }
+ gtm->timers[i].irq = irq.start;
+ gtm->timers[i].gtm = gtm;
+ }
+
+ gtm->regs = of_iomap(np, 0);
+ if (!gtm->regs) {
+ pr_err("%s: unable to iomap registers\n",
+ np->full_name);
+ goto err;
+ }
+
+ gtm_set_shortcuts(np, gtm->timers, gtm->regs);
+ list_add(>m->list_node, >ms);
+
+ /* We don't want to lose the node and its ->data */
+ np->data = gtm;
+ of_node_get(np);
+
+ continue;
+err:
+ kfree(gtm);
+ }
+ return 0;
+}
+arch_initcall(fsl_gtm_init);
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
new file mode 100644
index 0000000..2c5187c
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -0,0 +1,429 @@
+/*
+ * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Tony Li <tony.li@freescale.com>
+ * Jason Jin <Jason.jin@freescale.com>
+ *
+ * The hwirq alloc and free code reuse from sysdev/mpic_msi.c
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+#include <linux/irq.h>
+#include <linux/bootmem.h>
+#include <linux/bitmap.h>
+#include <linux/msi.h>
+#include <linux/pci.h>
+#include <linux/of_platform.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/prom.h>
+#include <asm/hw_irq.h>
+#include <asm/ppc-pci.h>
+#include "fsl_msi.h"
+
+struct fsl_msi_feature {
+ u32 fsl_pic_ip;
+ u32 msiir_offset;
+};
+
+static struct fsl_msi *fsl_msi;
+
+static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
+{
+ return in_be32(base + (reg >> 2));
+}
+
+/*
+ * We do not need this actually. The MSIR register has been read once
+ * in the cascade interrupt. So, this MSI interrupt has been acked
+*/
+static void fsl_msi_end_irq(unsigned int virq)
+{
+}
+
+static struct irq_chip fsl_msi_chip = {
+ .mask = mask_msi_irq,
+ .unmask = unmask_msi_irq,
+ .ack = fsl_msi_end_irq,
+ .typename = " FSL-MSI ",
+};
+
+static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ struct irq_chip *chip = &fsl_msi_chip;
+
+ get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
+
+ set_irq_chip_and_handler(virq, chip, handle_edge_irq);
+
+ return 0;
+}
+
+static struct irq_host_ops fsl_msi_host_ops = {
+ .map = fsl_msi_host_map,
+};
+
+static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
+{
+ unsigned long flags;
+ int order = get_count_order(num);
+ int offset;
+
+ spin_lock_irqsave(&msi->bitmap_lock, flags);
+
+ offset = bitmap_find_free_region(msi->fsl_msi_bitmap,
+ NR_MSI_IRQS, order);
+
+ spin_unlock_irqrestore(&msi->bitmap_lock, flags);
+
+ pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n",
+ __func__, num, order, offset);
+
+ return offset;
+}
+
+static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
+{
+ unsigned long flags;
+ int order = get_count_order(num);
+
+ pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n",
+ __func__, num, order, offset);
+
+ spin_lock_irqsave(&msi->bitmap_lock, flags);
+ bitmap_release_region(msi->fsl_msi_bitmap, offset, order);
+ spin_unlock_irqrestore(&msi->bitmap_lock, flags);
+}
+
+static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
+{
+ int i;
+ int len;
+ const u32 *p;
+
+ bitmap_allocate_region(msi->fsl_msi_bitmap, 0,
+ get_count_order(NR_MSI_IRQS));
+
+ p = of_get_property(msi->of_node, "msi-available-ranges", &len);
+
+ if (!p) {
+ /* No msi-available-ranges property,
+ * All the 256 MSI interrupts can be used
+ */
+ fsl_msi_free_hwirqs(msi, 0, 0x100);
+ return 0;
+ }
+
+ if ((len % (2 * sizeof(u32))) != 0) {
+ printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges "
+ "property on %s\n", msi->of_node->full_name);
+ return -EINVAL;
+ }
+
+ /* Format is: (<u32 start> <u32 count>)+ */
+ len /= 2 * sizeof(u32);
+ for (i = 0; i < len; i++, p += 2)
+ fsl_msi_free_hwirqs(msi, *p, *(p + 1));
+
+ return 0;
+}
+
+static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
+{
+ int rc;
+ int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
+
+ msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL);
+
+ if (msi_data->fsl_msi_bitmap == NULL) {
+ pr_debug("%s: ENOMEM allocating allocator bitmap!\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ rc = fsl_msi_free_dt_hwirqs(msi_data);
+ if (rc)
+ goto out_free;
+
+ return 0;
+out_free:
+ kfree(msi_data->fsl_msi_bitmap);
+
+ msi_data->fsl_msi_bitmap = NULL;
+ return rc;
+
+}
+
+static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
+{
+ if (type == PCI_CAP_ID_MSIX)
+ pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
+
+ return 0;
+}
+
+static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
+{
+ struct msi_desc *entry;
+ struct fsl_msi *msi_data = fsl_msi;
+
+ list_for_each_entry(entry, &pdev->msi_list, list) {
+ if (entry->irq == NO_IRQ)
+ continue;
+ set_irq_msi(entry->irq, NULL);
+ fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1);
+ irq_dispose_mapping(entry->irq);
+ }
+
+ return;
+}
+
+static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
+ struct msi_msg *msg)
+{
+ struct fsl_msi *msi_data = fsl_msi;
+
+ msg->address_lo = msi_data->msi_addr_lo;
+ msg->address_hi = msi_data->msi_addr_hi;
+ msg->data = hwirq;
+
+ pr_debug("%s: allocated srs: %d, ibs: %d\n",
+ __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
+}
+
+static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
+{
+ irq_hw_number_t hwirq;
+ int rc;
+ unsigned int virq;
+ struct msi_desc *entry;
+ struct msi_msg msg;
+ struct fsl_msi *msi_data = fsl_msi;
+
+ list_for_each_entry(entry, &pdev->msi_list, list) {
+ hwirq = fsl_msi_alloc_hwirqs(msi_data, 1);
+ if (hwirq < 0) {
+ rc = hwirq;
+ pr_debug("%s: fail allocating msi interrupt\n",
+ __func__);
+ goto out_free;
+ }
+
+ virq = irq_create_mapping(msi_data->irqhost, hwirq);
+
+ if (virq == NO_IRQ) {
+ pr_debug("%s: fail mapping hwirq 0x%lx\n",
+ __func__, hwirq);
+ fsl_msi_free_hwirqs(msi_data, hwirq, 1);
+ rc = -ENOSPC;
+ goto out_free;
+ }
+ set_irq_msi(virq, entry);
+
+ fsl_compose_msi_msg(pdev, hwirq, &msg);
+ write_msi_msg(virq, &msg);
+ }
+ return 0;
+
+out_free:
+ return rc;
+}
+
+static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ unsigned int cascade_irq;
+ struct fsl_msi *msi_data = fsl_msi;
+ int msir_index = -1;
+ u32 msir_value = 0;
+ u32 intr_index;
+ u32 have_shift = 0;
+
+ spin_lock(&desc->lock);
+ if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
+ if (desc->chip->mask_ack)
+ desc->chip->mask_ack(irq);
+ else {
+ desc->chip->mask(irq);
+ desc->chip->ack(irq);
+ }
+ }
+
+ if (unlikely(desc->status & IRQ_INPROGRESS))
+ goto unlock;
+
+ msir_index = (int)desc->handler_data;
+
+ if (msir_index >= NR_MSI_REG)
+ cascade_irq = NO_IRQ;
+
+ desc->status |= IRQ_INPROGRESS;
+ switch (fsl_msi->feature & FSL_PIC_IP_MASK) {
+ case FSL_PIC_IP_MPIC:
+ msir_value = fsl_msi_read(msi_data->msi_regs,
+ msir_index * 0x10);
+ break;
+ case FSL_PIC_IP_IPIC:
+ msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
+ break;
+ }
+
+ while (msir_value) {
+ intr_index = ffs(msir_value) - 1;
+
+ cascade_irq = irq_linear_revmap(msi_data->irqhost,
+ msir_index * IRQS_PER_MSI_REG +
+ intr_index + have_shift);
+ if (cascade_irq != NO_IRQ)
+ generic_handle_irq(cascade_irq);
+ have_shift += intr_index + 1;
+ msir_value = msir_value >> (intr_index + 1);
+ }
+ desc->status &= ~IRQ_INPROGRESS;
+
+ switch (msi_data->feature & FSL_PIC_IP_MASK) {
+ case FSL_PIC_IP_MPIC:
+ desc->chip->eoi(irq);
+ break;
+ case FSL_PIC_IP_IPIC:
+ if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
+ desc->chip->unmask(irq);
+ break;
+ }
+unlock:
+ spin_unlock(&desc->lock);
+}
+
+static int __devinit fsl_of_msi_probe(struct of_device *dev,
+ const struct of_device_id *match)
+{
+ struct fsl_msi *msi;
+ struct resource res;
+ int err, i, count;
+ int rc;
+ int virt_msir;
+ const u32 *p;
+ struct fsl_msi_feature *features = match->data;
+
+ printk(KERN_DEBUG "Setting up Freescale MSI support\n");
+
+ msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL);
+ if (!msi) {
+ dev_err(&dev->dev, "No memory for MSI structure\n");
+ err = -ENOMEM;
+ goto error_out;
+ }
+
+ msi->of_node = of_node_get(dev->node);
+
+ msi->irqhost = irq_alloc_host(of_node_get(dev->node),
+ IRQ_HOST_MAP_LINEAR,
+ NR_MSI_IRQS, &fsl_msi_host_ops, 0);
+ if (msi->irqhost == NULL) {
+ dev_err(&dev->dev, "No memory for MSI irqhost\n");
+ of_node_put(dev->node);
+ err = -ENOMEM;
+ goto error_out;
+ }
+
+ /* Get the MSI reg base */
+ err = of_address_to_resource(dev->node, 0, &res);
+ if (err) {
+ dev_err(&dev->dev, "%s resource error!\n",
+ dev->node->full_name);
+ goto error_out;
+ }
+
+ msi->msi_regs = ioremap(res.start, res.end - res.start + 1);
+ if (!msi->msi_regs) {
+ dev_err(&dev->dev, "ioremap problem failed\n");
+ goto error_out;
+ }
+
+ msi->feature = features->fsl_pic_ip;
+
+ msi->irqhost->host_data = msi;
+
+ msi->msi_addr_hi = 0x0;
+ msi->msi_addr_lo = res.start + features->msiir_offset;
+
+ rc = fsl_msi_init_allocator(msi);
+ if (rc) {
+ dev_err(&dev->dev, "Error allocating MSI bitmap\n");
+ goto error_out;
+ }
+
+ p = of_get_property(dev->node, "interrupts", &count);
+ if (!p) {
+ dev_err(&dev->dev, "no interrupts property found on %s\n",
+ dev->node->full_name);
+ err = -ENODEV;
+ goto error_out;
+ }
+ if (count % 8 != 0) {
+ dev_err(&dev->dev, "Malformed interrupts property on %s\n",
+ dev->node->full_name);
+ err = -EINVAL;
+ goto error_out;
+ }
+
+ count /= sizeof(u32);
+ for (i = 0; i < count / 2; i++) {
+ if (i > NR_MSI_REG)
+ break;
+ virt_msir = irq_of_parse_and_map(dev->node, i);
+ if (virt_msir != NO_IRQ) {
+ set_irq_data(virt_msir, (void *)i);
+ set_irq_chained_handler(virt_msir, fsl_msi_cascade);
+ }
+ }
+
+ fsl_msi = msi;
+
+ WARN_ON(ppc_md.setup_msi_irqs);
+ ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
+ ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
+ ppc_md.msi_check_device = fsl_msi_check_device;
+ return 0;
+error_out:
+ kfree(msi);
+ return err;
+}
+
+static const struct fsl_msi_feature mpic_msi_feature = {
+ .fsl_pic_ip = FSL_PIC_IP_MPIC,
+ .msiir_offset = 0x140,
+};
+
+static const struct fsl_msi_feature ipic_msi_feature = {
+ .fsl_pic_ip = FSL_PIC_IP_IPIC,
+ .msiir_offset = 0x38,
+};
+
+static const struct of_device_id fsl_of_msi_ids[] = {
+ {
+ .compatible = "fsl,mpic-msi",
+ .data = (void *)&mpic_msi_feature,
+ },
+ {
+ .compatible = "fsl,ipic-msi",
+ .data = (void *)&ipic_msi_feature,
+ },
+ {}
+};
+
+static struct of_platform_driver fsl_of_msi_driver = {
+ .name = "fsl-msi",
+ .match_table = fsl_of_msi_ids,
+ .probe = fsl_of_msi_probe,
+};
+
+static __init int fsl_of_msi_init(void)
+{
+ return of_register_platform_driver(&fsl_of_msi_driver);
+}
+
+subsys_initcall(fsl_of_msi_init);
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
new file mode 100644
index 0000000..a653468
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Tony Li <tony.li@freescale.com>
+ * Jason Jin <Jason.jin@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+#ifndef _POWERPC_SYSDEV_FSL_MSI_H
+#define _POWERPC_SYSDEV_FSL_MSI_H
+
+#define NR_MSI_REG 8
+#define IRQS_PER_MSI_REG 32
+#define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG)
+
+#define FSL_PIC_IP_MASK 0x0000000F
+#define FSL_PIC_IP_MPIC 0x00000001
+#define FSL_PIC_IP_IPIC 0x00000002
+
+struct fsl_msi {
+ /* Device node of the MSI interrupt*/
+ struct device_node *of_node;
+
+ struct irq_host *irqhost;
+
+ unsigned long cascade_irq;
+
+ u32 msi_addr_lo;
+ u32 msi_addr_hi;
+ void __iomem *msi_regs;
+ u32 feature;
+
+ unsigned long *fsl_msi_bitmap;
+ spinlock_t bitmap_lock;
+};
+
+#endif /* _POWERPC_SYSDEV_FSL_MSI_H */
+
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index bf13c21..87b0aa1 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -106,6 +106,16 @@
}
}
+static void __init setup_pci_pcsrbar(struct pci_controller *hose)
+{
+#ifdef CONFIG_PCI_MSI
+ phys_addr_t immr_base;
+
+ immr_base = get_immrbase();
+ early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base);
+#endif
+}
+
static int fsl_pcie_bus_fixup;
static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
@@ -211,6 +221,8 @@
/* Setup PEX window registers */
setup_pci_atmu(hose, &rsrc);
+ /* Setup PEXCSRBAR */
+ setup_pci_pcsrbar(hose);
return 0;
}
@@ -231,6 +243,8 @@
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 019657c11..ebcec73 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -414,128 +414,6 @@
arch_initcall(gfar_of_init);
-#ifdef CONFIG_I2C_BOARDINFO
-#include <linux/i2c.h>
-struct i2c_driver_device {
- char *of_device;
- char *i2c_type;
-};
-
-static struct i2c_driver_device i2c_devices[] __initdata = {
- {"ricoh,rs5c372a", "rs5c372a"},
- {"ricoh,rs5c372b", "rs5c372b"},
- {"ricoh,rv5c386", "rv5c386"},
- {"ricoh,rv5c387a", "rv5c387a"},
- {"dallas,ds1307", "ds1307"},
- {"dallas,ds1337", "ds1337"},
- {"dallas,ds1338", "ds1338"},
- {"dallas,ds1339", "ds1339"},
- {"dallas,ds1340", "ds1340"},
- {"stm,m41t00", "m41t00"},
- {"dallas,ds1374", "ds1374"},
-};
-
-static int __init of_find_i2c_driver(struct device_node *node,
- struct i2c_board_info *info)
-{
- int i;
-
- for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
- if (!of_device_is_compatible(node, i2c_devices[i].of_device))
- continue;
- if (strlcpy(info->type, i2c_devices[i].i2c_type,
- I2C_NAME_SIZE) >= I2C_NAME_SIZE)
- return -ENOMEM;
- return 0;
- }
- return -ENODEV;
-}
-
-static void __init of_register_i2c_devices(struct device_node *adap_node,
- int bus_num)
-{
- struct device_node *node = NULL;
-
- while ((node = of_get_next_child(adap_node, node))) {
- struct i2c_board_info info = {};
- const u32 *addr;
- int len;
-
- addr = of_get_property(node, "reg", &len);
- if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
- printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
- continue;
- }
-
- info.irq = irq_of_parse_and_map(node, 0);
- if (info.irq == NO_IRQ)
- info.irq = -1;
-
- if (of_find_i2c_driver(node, &info) < 0)
- continue;
-
- info.addr = *addr;
-
- i2c_register_board_info(bus_num, &info, 1);
- }
-}
-
-static int __init fsl_i2c_of_init(void)
-{
- struct device_node *np;
- unsigned int i = 0;
- struct platform_device *i2c_dev;
- int ret;
-
- for_each_compatible_node(np, NULL, "fsl-i2c") {
- struct resource r[2];
- struct fsl_i2c_platform_data i2c_data;
- const unsigned char *flags = NULL;
-
- memset(&r, 0, sizeof(r));
- memset(&i2c_data, 0, sizeof(i2c_data));
-
- ret = of_address_to_resource(np, 0, &r[0]);
- if (ret)
- goto err;
-
- of_irq_to_resource(np, 0, &r[1]);
-
- i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
- if (IS_ERR(i2c_dev)) {
- ret = PTR_ERR(i2c_dev);
- goto err;
- }
-
- i2c_data.device_flags = 0;
- flags = of_get_property(np, "dfsrr", NULL);
- if (flags)
- i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
-
- flags = of_get_property(np, "fsl5200-clocking", NULL);
- if (flags)
- i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
-
- ret =
- platform_device_add_data(i2c_dev, &i2c_data,
- sizeof(struct
- fsl_i2c_platform_data));
- if (ret)
- goto unreg;
-
- of_register_i2c_devices(np, i++);
- }
-
- return 0;
-
-unreg:
- platform_device_unregister(i2c_dev);
-err:
- return ret;
-}
-
-arch_initcall(fsl_i2c_of_init);
-#endif
#ifdef CONFIG_PPC_83xx
static int __init mpc83xx_wdt_init(void)
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index 216c0f5..a96584a 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -276,7 +276,7 @@
spin_unlock_irqrestore(&i8259_lock, flags);
/* create a legacy host */
- i8259_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY,
+ i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY,
0, &i8259_host_ops, 0);
if (i8259_host == NULL) {
printk(KERN_ERR "i8259: failed to allocate irq host !\n");
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c
index cfbd2aa..7fd49c9 100644
--- a/arch/powerpc/sysdev/indirect_pci.c
+++ b/arch/powerpc/sysdev/indirect_pci.c
@@ -123,6 +123,12 @@
(bus->number == hose->first_busno))
val &= 0xffffff00;
+ /* Workaround for PCI_28 Errata in 440EPx/GRx */
+ if ((hose->indirect_type & PPC_INDIRECT_TYPE_BROKEN_MRM) &&
+ offset == PCI_CACHE_LINE_SIZE) {
+ val = 0;
+ }
+
/*
* Note: the caller has already checked that offset is
* suitably aligned and that len is 1, 2 or 4.
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 0f2dfb0..caba1c0 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -725,25 +725,21 @@
struct resource res;
u32 temp = 0, ret;
+ ret = of_address_to_resource(node, 0, &res);
+ if (ret)
+ return NULL;
+
ipic = alloc_bootmem(sizeof(struct ipic));
if (ipic == NULL)
return NULL;
memset(ipic, 0, sizeof(struct ipic));
- ipic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
+ ipic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
NR_IPIC_INTS,
&ipic_host_ops, 0);
- if (ipic->irqhost == NULL) {
- of_node_put(node);
+ if (ipic->irqhost == NULL)
return NULL;
- }
-
- ret = of_address_to_resource(node, 0, &res);
- if (ret) {
- of_node_put(node);
- return NULL;
- }
ipic->regs = ioremap(res.start, res.end - res.start + 1);
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 6c90c95..8e3478c 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1016,13 +1016,11 @@
memset(mpic, 0, sizeof(struct mpic));
mpic->name = name;
- mpic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
+ mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
isu_size, &mpic_host_ops,
flags & MPIC_LARGE_VECTORS ? 2048 : 256);
- if (mpic->irqhost == NULL) {
- of_node_put(node);
+ if (mpic->irqhost == NULL)
return NULL;
- }
mpic->irqhost->host_data = mpic;
mpic->hc_irq = mpic_irq_chip;
@@ -1143,10 +1141,14 @@
greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0));
mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK)
>> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
- if (isu_size == 0)
- mpic->num_sources =
- ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
- >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
+ if (isu_size == 0) {
+ if (flags & MPIC_BROKEN_FRR_NIRQS)
+ mpic->num_sources = mpic->irq_count;
+ else
+ mpic->num_sources =
+ ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
+ >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
+ }
/* Map the per-CPU registers */
for (i = 0; i < mpic->num_cpus; i++) {
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c
index d272a52..de3e5e8 100644
--- a/arch/powerpc/sysdev/mpic_msi.c
+++ b/arch/powerpc/sysdev/mpic_msi.c
@@ -16,6 +16,7 @@
#include <asm/hw_irq.h>
#include <asm/ppc-pci.h>
+#include <sysdev/mpic.h>
static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
{
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 33cbfb2..68aff60 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -95,6 +95,7 @@
unsigned int virq;
struct msi_desc *entry;
struct msi_msg msg;
+ int ret;
pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
pdev, nvec, type);
@@ -108,8 +109,9 @@
* few MSIs for someone, but restrictions will apply to how the
* sources can be changed independently.
*/
- hwirq = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK);
- if (hwirq < 0) {
+ ret = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK);
+ hwirq = ret;
+ if (ret < 0) {
pr_debug("pasemi_msi: failed allocating hwirq\n");
return hwirq;
}
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 1d5a408..6e2f868 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -115,17 +115,19 @@
struct msi_desc *entry;
struct msi_msg msg;
u64 addr;
+ int ret;
addr = find_ht_magic_addr(pdev);
msg.address_lo = addr & 0xFFFFFFFF;
msg.address_hi = addr >> 32;
list_for_each_entry(entry, &pdev->msi_list, list) {
- hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1);
- if (hwirq < 0) {
+ ret = mpic_msi_alloc_hwirqs(msi_mpic, 1);
+ if (ret < 0) {
pr_debug("u3msi: failed allocating hwirq\n");
- return hwirq;
+ return ret;
}
+ hwirq = ret;
virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
if (virq == NO_IRQ) {
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index a132e0d..32e0ad0 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -15,6 +15,7 @@
#include <linux/console.h>
#include <linux/mv643xx.h>
#include <linux/platform_device.h>
+#include <linux/of_platform.h>
#include <asm/prom.h>
@@ -25,6 +26,11 @@
* PowerPC of_platform_bus_type. They support platform_bus_type instead.
*/
+static struct of_device_id __initdata of_mv64x60_devices[] = {
+ { .compatible = "marvell,mv64306-devctrl", },
+ {}
+};
+
/*
* Create MPSC platform devices
*/
@@ -484,6 +490,10 @@
of_node_put(np);
}
+ /* Now add every node that is on the device bus */
+ for_each_compatible_node(np, NULL, "marvell,mv64360")
+ of_platform_bus_probe(np, of_mv64x60_devices, NULL);
+
return 0;
}
arch_initcall(mv64x60_device_setup);
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index b4a54c5..fb368df 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -75,6 +75,11 @@
!of_device_is_compatible(hose->dn, "ibm,plb-pci"))
return;
+ if (of_device_is_compatible(hose->dn, "ibm,plb440epx-pci") ||
+ of_device_is_compatible(hose->dn, "ibm,plb440grx-pci")) {
+ hose->indirect_type |= PPC_INDIRECT_TYPE_BROKEN_MRM;
+ }
+
/* Hide the PCI host BARs from the kernel as their content doesn't
* fit well in the resource management
*/
@@ -1634,6 +1639,15 @@
}
port = &ppc4xx_pciex_ports[portno];
port->index = portno;
+
+ /*
+ * Check if device is enabled
+ */
+ if (!of_device_is_available(np)) {
+ printk(KERN_INFO "PCIE%d: Port disabled via device-tree\n", port->index);
+ return;
+ }
+
port->node = of_node_get(np);
pval = of_get_property(np, "sdr-base", NULL);
if (pval == NULL) {
diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig
index adc6621..4bb18f5 100644
--- a/arch/powerpc/sysdev/qe_lib/Kconfig
+++ b/arch/powerpc/sysdev/qe_lib/Kconfig
@@ -20,3 +20,16 @@
bool
default y if UCC_FAST || UCC_SLOW
+config QE_USB
+ bool
+ help
+ QE USB Host Controller support
+
+config QE_GPIO
+ bool "QE GPIO support"
+ depends on QUICC_ENGINE
+ select GENERIC_GPIO
+ select HAVE_GPIO_LIB
+ help
+ Say Y here if you're going to use hardware that connects to the
+ QE GPIOs.
diff --git a/arch/powerpc/sysdev/qe_lib/Makefile b/arch/powerpc/sysdev/qe_lib/Makefile
index 874fe1a..f1855c1 100644
--- a/arch/powerpc/sysdev/qe_lib/Makefile
+++ b/arch/powerpc/sysdev/qe_lib/Makefile
@@ -6,3 +6,5 @@
obj-$(CONFIG_UCC) += ucc.o
obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
obj-$(CONFIG_UCC_FAST) += ucc_fast.o
+obj-$(CONFIG_QE_USB) += usb.o
+obj-$(CONFIG_QE_GPIO) += gpio.o
diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c
new file mode 100644
index 0000000..8e5a0bc
--- /dev/null
+++ b/arch/powerpc/sysdev/qe_lib/gpio.c
@@ -0,0 +1,149 @@
+/*
+ * QUICC Engine GPIOs
+ *
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
+#include <asm/qe.h>
+
+struct qe_gpio_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data register to clear/set bits safely */
+ u32 cpdata;
+};
+
+static inline struct qe_gpio_chip *
+to_qe_gpio_chip(struct of_mm_gpio_chip *mm_gc)
+{
+ return container_of(mm_gc, struct qe_gpio_chip, mm_gc);
+}
+
+static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+ struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
+ struct qe_pio_regs __iomem *regs = mm_gc->regs;
+
+ qe_gc->cpdata = in_be32(®s->cpdata);
+}
+
+static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct qe_pio_regs __iomem *regs = mm_gc->regs;
+ u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio);
+
+ return in_be32(®s->cpdata) & pin_mask;
+}
+
+static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
+ struct qe_pio_regs __iomem *regs = mm_gc->regs;
+ unsigned long flags;
+ u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio);
+
+ spin_lock_irqsave(&qe_gc->lock, flags);
+
+ if (val)
+ qe_gc->cpdata |= pin_mask;
+ else
+ qe_gc->cpdata &= ~pin_mask;
+
+ out_be32(®s->cpdata, qe_gc->cpdata);
+
+ spin_unlock_irqrestore(&qe_gc->lock, flags);
+}
+
+static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&qe_gc->lock, flags);
+
+ __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_IN, 0, 0, 0);
+
+ spin_unlock_irqrestore(&qe_gc->lock, flags);
+
+ return 0;
+}
+
+static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&qe_gc->lock, flags);
+
+ __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_OUT, 0, 0, 0);
+
+ spin_unlock_irqrestore(&qe_gc->lock, flags);
+
+ qe_gpio_set(gc, gpio, val);
+
+ return 0;
+}
+
+static int __init qe_add_gpiochips(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, "fsl,mpc8323-qe-pario-bank") {
+ int ret;
+ struct qe_gpio_chip *qe_gc;
+ struct of_mm_gpio_chip *mm_gc;
+ struct of_gpio_chip *of_gc;
+ struct gpio_chip *gc;
+
+ qe_gc = kzalloc(sizeof(*qe_gc), GFP_KERNEL);
+ if (!qe_gc) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ spin_lock_init(&qe_gc->lock);
+
+ mm_gc = &qe_gc->mm_gc;
+ of_gc = &mm_gc->of_gc;
+ gc = &of_gc->gc;
+
+ mm_gc->save_regs = qe_gpio_save_regs;
+ of_gc->gpio_cells = 2;
+ gc->ngpio = QE_PIO_PINS;
+ gc->direction_input = qe_gpio_dir_in;
+ gc->direction_output = qe_gpio_dir_out;
+ gc->get = qe_gpio_get;
+ gc->set = qe_gpio_set;
+
+ ret = of_mm_gpiochip_add(np, mm_gc);
+ if (ret)
+ goto err;
+ continue;
+err:
+ pr_err("%s: registration failed with status %d\n",
+ np->full_name, ret);
+ kfree(qe_gc);
+ /* try others anyway */
+ }
+ return 0;
+}
+arch_initcall(qe_add_gpiochips);
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index cff550e..9e82d7e 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -35,7 +35,6 @@
#include <asm/rheap.h>
static void qe_snums_init(void);
-static void qe_muram_init(void);
static int qe_sdma_init(void);
static DEFINE_SPINLOCK(qe_lock);
@@ -88,7 +87,7 @@
EXPORT_SYMBOL(get_qe_base);
-void qe_reset(void)
+void __init qe_reset(void)
{
if (qe_immr == NULL)
qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE);
@@ -325,97 +324,6 @@
return 0;
}
-/*
- * muram_alloc / muram_free bits.
- */
-static DEFINE_SPINLOCK(qe_muram_lock);
-
-/* 16 blocks should be enough to satisfy all requests
- * until the memory subsystem goes up... */
-static rh_block_t qe_boot_muram_rh_block[16];
-static rh_info_t qe_muram_info;
-
-static void qe_muram_init(void)
-{
- struct device_node *np;
- const u32 *address;
- u64 size;
- unsigned int flags;
-
- /* initialize the info header */
- rh_init(&qe_muram_info, 1,
- sizeof(qe_boot_muram_rh_block) /
- sizeof(qe_boot_muram_rh_block[0]), qe_boot_muram_rh_block);
-
- /* Attach the usable muram area */
- /* XXX: This is a subset of the available muram. It
- * varies with the processor and the microcode patches activated.
- */
- np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
- if (!np) {
- np = of_find_node_by_name(NULL, "data-only");
- if (!np) {
- WARN_ON(1);
- return;
- }
- }
-
- address = of_get_address(np, 0, &size, &flags);
- WARN_ON(!address);
-
- of_node_put(np);
- if (address)
- rh_attach_region(&qe_muram_info, *address, (int)size);
-}
-
-/* This function returns an index into the MURAM area.
- */
-unsigned long qe_muram_alloc(int size, int align)
-{
- unsigned long start;
- unsigned long flags;
-
- spin_lock_irqsave(&qe_muram_lock, flags);
- start = rh_alloc_align(&qe_muram_info, size, align, "QE");
- spin_unlock_irqrestore(&qe_muram_lock, flags);
-
- return start;
-}
-EXPORT_SYMBOL(qe_muram_alloc);
-
-int qe_muram_free(unsigned long offset)
-{
- int ret;
- unsigned long flags;
-
- spin_lock_irqsave(&qe_muram_lock, flags);
- ret = rh_free(&qe_muram_info, offset);
- spin_unlock_irqrestore(&qe_muram_lock, flags);
-
- return ret;
-}
-EXPORT_SYMBOL(qe_muram_free);
-
-/* not sure if this is ever needed */
-unsigned long qe_muram_alloc_fixed(unsigned long offset, int size)
-{
- unsigned long start;
- unsigned long flags;
-
- spin_lock_irqsave(&qe_muram_lock, flags);
- start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc");
- spin_unlock_irqrestore(&qe_muram_lock, flags);
-
- return start;
-}
-EXPORT_SYMBOL(qe_muram_alloc_fixed);
-
-void qe_muram_dump(void)
-{
- rh_dump(&qe_muram_info);
-}
-EXPORT_SYMBOL(qe_muram_dump);
-
/* The maximum number of RISCs we support */
#define MAX_QE_RISC 2
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index f59444d..63cdf98 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -329,21 +329,19 @@
struct resource res;
u32 temp = 0, ret, high_active = 0;
+ ret = of_address_to_resource(node, 0, &res);
+ if (ret)
+ return;
+
qe_ic = alloc_bootmem(sizeof(struct qe_ic));
if (qe_ic == NULL)
return;
memset(qe_ic, 0, sizeof(struct qe_ic));
- qe_ic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
+ qe_ic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
NR_QE_IC_INTS, &qe_ic_host_ops, 0);
- if (qe_ic->irqhost == NULL) {
- of_node_put(node);
- return;
- }
-
- ret = of_address_to_resource(node, 0, &res);
- if (ret)
+ if (qe_ic->irqhost == NULL)
return;
qe_ic->regs = ioremap(res.start, res.end - res.start + 1);
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c
index 93916a4..7c87460 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_io.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_io.c
@@ -28,21 +28,7 @@
#undef DEBUG
-#define NUM_OF_PINS 32
-
-struct port_regs {
- __be32 cpodr; /* Open drain register */
- __be32 cpdata; /* Data register */
- __be32 cpdir1; /* Direction register */
- __be32 cpdir2; /* Direction register */
- __be32 cppar1; /* Pin assignment register */
- __be32 cppar2; /* Pin assignment register */
-#ifdef CONFIG_PPC_85xx
- u8 pad[8];
-#endif
-};
-
-static struct port_regs __iomem *par_io;
+static struct qe_pio_regs __iomem *par_io;
static int num_par_io_ports = 0;
int par_io_init(struct device_node *np)
@@ -64,69 +50,79 @@
return 0;
}
+void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, int dir,
+ int open_drain, int assignment, int has_irq)
+{
+ u32 pin_mask1bit;
+ u32 pin_mask2bits;
+ u32 new_mask2bits;
+ u32 tmp_val;
+
+ /* calculate pin location for single and 2 bits information */
+ pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1)));
+
+ /* Set open drain, if required */
+ tmp_val = in_be32(&par_io->cpodr);
+ if (open_drain)
+ out_be32(&par_io->cpodr, pin_mask1bit | tmp_val);
+ else
+ out_be32(&par_io->cpodr, ~pin_mask1bit & tmp_val);
+
+ /* define direction */
+ tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
+ in_be32(&par_io->cpdir2) :
+ in_be32(&par_io->cpdir1);
+
+ /* get all bits mask for 2 bit per port */
+ pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS -
+ (pin % (QE_PIO_PINS / 2) + 1) * 2));
+
+ /* Get the final mask we need for the right definition */
+ new_mask2bits = (u32) (dir << (QE_PIO_PINS -
+ (pin % (QE_PIO_PINS / 2) + 1) * 2));
+
+ /* clear and set 2 bits mask */
+ if (pin > (QE_PIO_PINS / 2) - 1) {
+ out_be32(&par_io->cpdir2,
+ ~pin_mask2bits & tmp_val);
+ tmp_val &= ~pin_mask2bits;
+ out_be32(&par_io->cpdir2, new_mask2bits | tmp_val);
+ } else {
+ out_be32(&par_io->cpdir1,
+ ~pin_mask2bits & tmp_val);
+ tmp_val &= ~pin_mask2bits;
+ out_be32(&par_io->cpdir1, new_mask2bits | tmp_val);
+ }
+ /* define pin assignment */
+ tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
+ in_be32(&par_io->cppar2) :
+ in_be32(&par_io->cppar1);
+
+ new_mask2bits = (u32) (assignment << (QE_PIO_PINS -
+ (pin % (QE_PIO_PINS / 2) + 1) * 2));
+ /* clear and set 2 bits mask */
+ if (pin > (QE_PIO_PINS / 2) - 1) {
+ out_be32(&par_io->cppar2,
+ ~pin_mask2bits & tmp_val);
+ tmp_val &= ~pin_mask2bits;
+ out_be32(&par_io->cppar2, new_mask2bits | tmp_val);
+ } else {
+ out_be32(&par_io->cppar1,
+ ~pin_mask2bits & tmp_val);
+ tmp_val &= ~pin_mask2bits;
+ out_be32(&par_io->cppar1, new_mask2bits | tmp_val);
+ }
+}
+EXPORT_SYMBOL(__par_io_config_pin);
+
int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
int assignment, int has_irq)
{
- u32 pin_mask1bit, pin_mask2bits, new_mask2bits, tmp_val;
+ if (!par_io || port >= num_par_io_ports)
+ return -EINVAL;
- if (!par_io)
- return -1;
-
- /* calculate pin location for single and 2 bits information */
- pin_mask1bit = (u32) (1 << (NUM_OF_PINS - (pin + 1)));
-
- /* Set open drain, if required */
- tmp_val = in_be32(&par_io[port].cpodr);
- if (open_drain)
- out_be32(&par_io[port].cpodr, pin_mask1bit | tmp_val);
- else
- out_be32(&par_io[port].cpodr, ~pin_mask1bit & tmp_val);
-
- /* define direction */
- tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ?
- in_be32(&par_io[port].cpdir2) :
- in_be32(&par_io[port].cpdir1);
-
- /* get all bits mask for 2 bit per port */
- pin_mask2bits = (u32) (0x3 << (NUM_OF_PINS -
- (pin % (NUM_OF_PINS / 2) + 1) * 2));
-
- /* Get the final mask we need for the right definition */
- new_mask2bits = (u32) (dir << (NUM_OF_PINS -
- (pin % (NUM_OF_PINS / 2) + 1) * 2));
-
- /* clear and set 2 bits mask */
- if (pin > (NUM_OF_PINS / 2) - 1) {
- out_be32(&par_io[port].cpdir2,
- ~pin_mask2bits & tmp_val);
- tmp_val &= ~pin_mask2bits;
- out_be32(&par_io[port].cpdir2, new_mask2bits | tmp_val);
- } else {
- out_be32(&par_io[port].cpdir1,
- ~pin_mask2bits & tmp_val);
- tmp_val &= ~pin_mask2bits;
- out_be32(&par_io[port].cpdir1, new_mask2bits | tmp_val);
- }
- /* define pin assignment */
- tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ?
- in_be32(&par_io[port].cppar2) :
- in_be32(&par_io[port].cppar1);
-
- new_mask2bits = (u32) (assignment << (NUM_OF_PINS -
- (pin % (NUM_OF_PINS / 2) + 1) * 2));
- /* clear and set 2 bits mask */
- if (pin > (NUM_OF_PINS / 2) - 1) {
- out_be32(&par_io[port].cppar2,
- ~pin_mask2bits & tmp_val);
- tmp_val &= ~pin_mask2bits;
- out_be32(&par_io[port].cppar2, new_mask2bits | tmp_val);
- } else {
- out_be32(&par_io[port].cppar1,
- ~pin_mask2bits & tmp_val);
- tmp_val &= ~pin_mask2bits;
- out_be32(&par_io[port].cppar1, new_mask2bits | tmp_val);
- }
-
+ __par_io_config_pin(&par_io[port], pin, dir, open_drain, assignment,
+ has_irq);
return 0;
}
EXPORT_SYMBOL(par_io_config_pin);
@@ -137,10 +133,10 @@
if (port >= num_par_io_ports)
return -EINVAL;
- if (pin >= NUM_OF_PINS)
+ if (pin >= QE_PIO_PINS)
return -EINVAL;
/* calculate pin location */
- pin_mask = (u32) (1 << (NUM_OF_PINS - 1 - pin));
+ pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin));
tmp_val = in_be32(&par_io[port].cpdata);
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c
index 0e348d9..d3c7f5a 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc.c
@@ -26,7 +26,8 @@
#include <asm/qe.h>
#include <asm/ucc.h>
-static DEFINE_SPINLOCK(ucc_lock);
+DEFINE_SPINLOCK(cmxgcr_lock);
+EXPORT_SYMBOL(cmxgcr_lock);
int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
{
@@ -35,10 +36,10 @@
if (ucc_num > UCC_MAX_NUM - 1)
return -EINVAL;
- spin_lock_irqsave(&ucc_lock, flags);
+ spin_lock_irqsave(&cmxgcr_lock, flags);
clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG,
ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT);
- spin_unlock_irqrestore(&ucc_lock, flags);
+ spin_unlock_irqrestore(&cmxgcr_lock, flags);
return 0;
}
diff --git a/arch/powerpc/sysdev/qe_lib/usb.c b/arch/powerpc/sysdev/qe_lib/usb.c
new file mode 100644
index 0000000..8105462
--- /dev/null
+++ b/arch/powerpc/sysdev/qe_lib/usb.c
@@ -0,0 +1,55 @@
+/*
+ * QE USB routines
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ * Shlomi Gridish <gridish@freescale.com>
+ * Jerry Huang <Chang-Ming.Huang@freescale.com>
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ * Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <asm/immap_qe.h>
+#include <asm/qe.h>
+
+int qe_usb_clock_set(enum qe_clock clk, int rate)
+{
+ struct qe_mux __iomem *mux = &qe_immr->qmx;
+ unsigned long flags;
+ u32 val;
+
+ switch (clk) {
+ case QE_CLK3: val = QE_CMXGCR_USBCS_CLK3; break;
+ case QE_CLK5: val = QE_CMXGCR_USBCS_CLK5; break;
+ case QE_CLK7: val = QE_CMXGCR_USBCS_CLK7; break;
+ case QE_CLK9: val = QE_CMXGCR_USBCS_CLK9; break;
+ case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break;
+ case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break;
+ case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break;
+ case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break;
+ case QE_BRG9: val = QE_CMXGCR_USBCS_BRG9; break;
+ case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break;
+ default:
+ pr_err("%s: requested unknown clock %d\n", __func__, clk);
+ return -EINVAL;
+ }
+
+ if (qe_clock_is_brg(clk))
+ qe_setbrg(clk, rate, 1);
+
+ spin_lock_irqsave(&cmxgcr_lock, flags);
+
+ clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val);
+
+ spin_unlock_irqrestore(&cmxgcr_lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL(qe_usb_clock_set);
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index ac1a72d..24e1f5a 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -426,11 +426,10 @@
{
DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");
- pci_irq_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY,
+ pci_irq_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY,
0, &pci_irq_host_ops, 0);
if (pci_irq_host == NULL) {
printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n");
- of_node_put(node);
return;
}
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 625b275..d35405c 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -280,12 +280,10 @@
}
uic->dcrbase = *dcrreg;
- uic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR,
+ uic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
NR_UIC_INTS, &uic_host_ops, -1);
- if (! uic->irqhost) {
- of_node_put(node);
+ if (! uic->irqhost)
return NULL; /* FIXME: panic? */
- }
uic->irqhost->host_data = uic;
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index bfcf70e..34c3d06 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -54,7 +54,7 @@
#define skipbl xmon_skipbl
#ifdef CONFIG_SMP
-cpumask_t cpus_in_xmon = CPU_MASK_NONE;
+static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
static unsigned long xmon_taken = 1;
static int xmon_owner;
static int xmon_gate;
@@ -154,7 +154,7 @@
static void dump_tlb_44x(void);
#endif
-int xmon_no_auto_backtrace;
+static int xmon_no_auto_backtrace;
extern void xmon_enter(void);
extern void xmon_leave(void);
@@ -327,6 +327,11 @@
{
xmon_speaker = 0;
}
+
+int cpus_are_in_xmon(void)
+{
+ return !cpus_empty(cpus_in_xmon);
+}
#endif
static int xmon_core(struct pt_regs *regs, int fromipi)
@@ -593,7 +598,7 @@
{
if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF))
return 0;
- if (iabr == 0)
+ if (iabr == NULL)
return 0;
xmon_core(regs, 0);
return 1;
@@ -1142,7 +1147,7 @@
} else {
/* assume a breakpoint address */
bp = at_breakpoint(a);
- if (bp == 0) {
+ if (bp == NULL) {
printf("No breakpoint at %x\n", a);
break;
}
@@ -1370,7 +1375,7 @@
#endif
}
-void excprint(struct pt_regs *fp)
+static void excprint(struct pt_regs *fp)
{
unsigned long trap;
@@ -1408,7 +1413,7 @@
print_bug_trap(fp);
}
-void prregs(struct pt_regs *fp)
+static void prregs(struct pt_regs *fp)
{
int n, trap;
unsigned long base;
@@ -1463,7 +1468,7 @@
printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
}
-void cacheflush(void)
+static void cacheflush(void)
{
int cmd;
unsigned long nflush;
@@ -1495,7 +1500,7 @@
catch_memory_errors = 0;
}
-unsigned long
+static unsigned long
read_spr(int n)
{
unsigned int instrs[2];
@@ -1533,7 +1538,7 @@
return ret;
}
-void
+static void
write_spr(int n, unsigned long val)
{
unsigned int instrs[2];
@@ -1571,7 +1576,7 @@
extern char exc_prolog;
extern char dec_exc;
-void super_regs(void)
+static void super_regs(void)
{
int cmd;
unsigned long val;
@@ -1629,7 +1634,7 @@
/*
* Stuff for reading and writing memory safely
*/
-int
+static int
mread(unsigned long adrs, void *buf, int size)
{
volatile int n;
@@ -1666,7 +1671,7 @@
return n;
}
-int
+static int
mwrite(unsigned long adrs, void *buf, int size)
{
volatile int n;
@@ -1731,7 +1736,7 @@
#define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
-void
+static void
byterev(unsigned char *val, int size)
{
int t;
@@ -1793,7 +1798,7 @@
" x exit this mode\n"
"";
-void
+static void
memex(void)
{
int cmd, inc, i, nslash;
@@ -1944,7 +1949,7 @@
}
}
-int
+static int
bsesc(void)
{
int c;
@@ -1984,7 +1989,7 @@
#define isxdigit(c) (('0' <= (c) && (c) <= '9') \
|| ('a' <= (c) && (c) <= 'f') \
|| ('A' <= (c) && (c) <= 'F'))
-void
+static void
dump(void)
{
int c;
@@ -2022,7 +2027,7 @@
}
}
-void
+static void
prdump(unsigned long adrs, long ndump)
{
long n, m, c, r, nr;
@@ -2066,7 +2071,7 @@
typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
-int
+static int
generic_inst_dump(unsigned long adr, long count, int praddr,
instruction_dump_func dump_func)
{
@@ -2104,7 +2109,7 @@
return adr - first_adr;
}
-int
+static int
ppc_inst_dump(unsigned long adr, long count, int praddr)
{
return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
@@ -2126,7 +2131,7 @@
static unsigned long mcount; /* # bytes to affect */
static unsigned long mdiffs; /* max # differences to print */
-void
+static void
memops(int cmd)
{
scanhex((void *)&mdest);
@@ -2152,7 +2157,7 @@
}
}
-void
+static void
memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
{
unsigned n, prt;
@@ -2170,7 +2175,7 @@
static unsigned mend;
static unsigned mask;
-void
+static void
memlocate(void)
{
unsigned a, n;
@@ -2203,7 +2208,7 @@
static unsigned long mskip = 0x1000;
static unsigned long mlim = 0xffffffff;
-void
+static void
memzcan(void)
{
unsigned char v;
@@ -2230,7 +2235,7 @@
printf("%.8x\n", a - mskip);
}
-void proccall(void)
+static void proccall(void)
{
unsigned long args[8];
unsigned long ret;
@@ -2388,7 +2393,7 @@
return 1;
}
-void
+static void
scannl(void)
{
int c;
@@ -2399,7 +2404,7 @@
c = inchar();
}
-int hexdigit(int c)
+static int hexdigit(int c)
{
if( '0' <= c && c <= '9' )
return c - '0';
@@ -2430,13 +2435,13 @@
static char line[256];
static char *lineptr;
-void
+static void
flush_input(void)
{
lineptr = NULL;
}
-int
+static int
inchar(void)
{
if (lineptr == NULL || *lineptr == 0) {
@@ -2449,7 +2454,7 @@
return *lineptr++;
}
-void
+static void
take_input(char *str)
{
lineptr = str;
@@ -2618,7 +2623,8 @@
}
}
#endif /* CONFIG_44x */
-void xmon_init(int enable)
+
+static void xmon_init(int enable)
{
#ifdef CONFIG_PPC_ISERIES
if (firmware_has_feature(FW_FEATURE_ISERIES))
diff --git a/arch/ppc/.gitignore b/arch/ppc/.gitignore
deleted file mode 100644
index 1e79a0a..0000000
--- a/arch/ppc/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-/include
diff --git a/arch/ppc/4xx_io/Makefile b/arch/ppc/4xx_io/Makefile
deleted file mode 100644
index 6a8cd57..0000000
--- a/arch/ppc/4xx_io/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Makefile for the linux MPC4xx ppc-specific parts
-#
-
-
-obj-$(CONFIG_SERIAL_SICC) += serial_sicc.o
diff --git a/arch/ppc/4xx_io/serial_sicc.c b/arch/ppc/4xx_io/serial_sicc.c
deleted file mode 100644
index efa0a56..0000000
--- a/arch/ppc/4xx_io/serial_sicc.c
+++ /dev/null
@@ -1,2005 +0,0 @@
-/*
- * Driver for IBM STB3xxx SICC serial port
- *
- * Based on drivers/char/serial_amba.c, by ARM Ltd.
- *
- * Copyright 2001 IBM Corp.
- * Author: IBM China Research Lab
- * Yudong Yang <yangyud@cn.ibm.com>
- * Yi Ge <geyi@cn.ibm.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- *
- * This is a driver for SICC serial port on IBM Redwood 4 evaluation board.
- * The driver support both as a console device and normal serial device and
- * is compatible with normal ttyS* devices.
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/interrupt.h>
-#include <linux/tty.h>
-#include <linux/tty_flip.h>
-#include <linux/major.h>
-#include <linux/string.h>
-#include <linux/fcntl.h>
-#include <linux/ptrace.h>
-#include <linux/ioport.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/capability.h>
-#include <linux/circ_buf.h>
-#include <linux/serial.h>
-#include <linux/console.h>
-#include <linux/sysrq.h>
-#include <linux/bitops.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/serial.h>
-
-
-#include <linux/serialP.h>
-
-
-/* -----------------------------------------------------------------------------
- * From STB03xxx SICC UART Specification
- * -----------------------------------------------------------------------------
- * UART Register Offsets.
- */
-
-#define BL_SICC_LSR 0x0000000 /* line status register read/clear */
-#define BL_SICC_LSRS 0x0000001 /* set line status register read/set */
-#define BL_SICC_HSR 0x0000002 /* handshake status register r/clear */
-#define BL_SICC_HSRS 0x0000003 /* set handshake status register r/set */
-#define BL_SICC_BRDH 0x0000004 /* baudrate divisor high reg r/w */
-#define BL_SICC_BRDL 0x0000005 /* baudrate divisor low reg r/w */
-#define BL_SICC_LCR 0x0000006 /* control register r/w */
-#define BL_SICC_RCR 0x0000007 /* receiver command register r/w */
-#define BL_SICC_TxCR 0x0000008 /* transmitter command register r/w */
-#define BL_SICC_RBR 0x0000009 /* receive buffer r */
-#define BL_SICC_TBR 0x0000009 /* transmit buffer w */
-#define BL_SICC_CTL2 0x000000A /* added for Vesta */
-#define BL_SICC_IrCR 0x000000B /* added for Vesta IR */
-
-/* masks and definitions for serial port control register */
-
-#define _LCR_LM_MASK 0xc0 /* loop back modes */
-#define _LCR_DTR_MASK 0x20 /* data terminal ready 0-inactive */
-#define _LCR_RTS_MASK 0x10 /* request to send 0-inactive */
-#define _LCR_DB_MASK 0x08 /* data bits mask */
-#define _LCR_PE_MASK 0x04 /* parity enable */
-#define _LCR_PTY_MASK 0x02 /* parity */
-#define _LCR_SB_MASK 0x01 /* stop bit mask */
-
-#define _LCR_LM_NORM 0x00 /* normal operation */
-#define _LCR_LM_LOOP 0x40 /* internal loopback mode */
-#define _LCR_LM_ECHO 0x80 /* automatic echo mode */
-#define _LCR_LM_RES 0xc0 /* reserved */
-
-#define _LCR_DTR_ACTIVE _LCR_DTR_MASK /* DTR is active */
-#define _LCR_RTS_ACTIVE _LCR_RTS_MASK /* RTS is active */
-#define _LCR_DB_8_BITS _LCR_DB_MASK /* 8 data bits */
-#define _LCR_DB_7_BITS 0x00 /* 7 data bits */
-#define _LCR_PE_ENABLE _LCR_PE_MASK /* parity enabled */
-#define _LCR_PE_DISABLE 0x00 /* parity disabled */
-#define _LCR_PTY_EVEN 0x00 /* even parity */
-#define _LCR_PTY_ODD _LCR_PTY_MASK /* odd parity */
-#define _LCR_SB_1_BIT 0x00 /* one stop bit */
-#define _LCR_SB_2_BIT _LCR_SB_MASK /* two stop bit */
-
-/* serial port handshake register */
-
-#define _HSR_DIS_MASK 0x80 /* DSR input inactive error mask */
-#define _HSR_CS_MASK 0x40 /* CTS input inactive error mask */
-#define _HSR_DIS_ACT 0x00 /* dsr input is active */
-#define _HSR_DIS_INACT _HSR_DIS_MASK /* dsr input is inactive */
-#define _HSR_CS_ACT 0x00 /* cts input is active */
-#define _HSR_CS_INACT _HSR_CS_MASK /* cts input is active */
-
-/* serial port line status register */
-
-#define _LSR_RBR_MASK 0x80 /* receive buffer ready mask */
-#define _LSR_FE_MASK 0x40 /* framing error */
-#define _LSR_OE_MASK 0x20 /* overrun error */
-#define _LSR_PE_MASK 0x10 /* parity error */
-#define _LSR_LB_MASK 0x08 /* line break */
-#define _LSR_TBR_MASK 0x04 /* transmit buffer ready */
-#define _LSR_TSR_MASK 0x02 /* transmit shift register ready */
-
-#define _LSR_RBR_FULL _LSR_RBR_MASK /* receive buffer is full */
-#define _LSR_FE_ERROR _LSR_FE_MASK /* framing error detected */
-#define _LSR_OE_ERROR _LSR_OE_MASK /* overrun error detected */
-#define _LSR_PE_ERROR _LSR_PE_MASK /* parity error detected */
-#define _LSR_LB_BREAK _LSR_LB_MASK /* line break detected */
-#define _LSR_TBR_EMPTY _LSR_TBR_MASK /* transmit buffer is ready */
-#define _LSR_TSR_EMPTY _LSR_TSR_MASK /* transmit shift register is empty */
-#define _LSR_TX_ALL 0x06 /* all physical transmit is done */
-
-#define _LSR_RX_ERR (_LSR_LB_BREAK | _LSR_FE_MASK | _LSR_OE_MASK | \
- _LSR_PE_MASK )
-
-/* serial port receiver command register */
-
-#define _RCR_ER_MASK 0x80 /* enable receiver mask */
-#define _RCR_DME_MASK 0x60 /* dma mode */
-#define _RCR_EIE_MASK 0x10 /* error interrupt enable mask */
-#define _RCR_PME_MASK 0x08 /* pause mode mask */
-
-#define _RCR_ER_ENABLE _RCR_ER_MASK /* receiver enabled */
-#define _RCR_DME_DISABLE 0x00 /* dma disabled */
-#define _RCR_DME_RXRDY 0x20 /* dma disabled, RxRDY interrupt enabled*/
-#define _RCR_DME_ENABLE2 0x40 /* dma enabled,receiver src channel 2 */
-#define _RCR_DME_ENABLE3 0x60 /* dma enabled,receiver src channel 3 */
-#define _RCR_PME_HARD _RCR_PME_MASK /* RTS controlled by hardware */
-#define _RCR_PME_SOFT 0x00 /* RTS controlled by software */
-
-/* serial port transmit command register */
-
-#define _TxCR_ET_MASK 0x80 /* transmitter enable mask */
-#define _TxCR_DME_MASK 0x60 /* dma mode mask */
-#define _TxCR_TIE_MASK 0x10 /* empty interrupt enable mask */
-#define _TxCR_EIE_MASK 0x08 /* error interrupt enable mask */
-#define _TxCR_SPE_MASK 0x04 /* stop/pause mask */
-#define _TxCR_TB_MASK 0x02 /* transmit break mask */
-
-#define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmitter enabled */
-#define _TxCR_DME_DISABLE 0x00 /* transmitter disabled, TBR intr disabled */
-#define _TxCR_DME_TBR 0x20 /* transmitter disabled, TBR intr enabled */
-#define _TxCR_DME_CHAN_2 0x40 /* dma enabled, destination chann 2 */
-#define _TxCR_DME_CHAN_3 0x60 /* dma enabled, destination chann 3 */
-
-/* serial ctl reg 2 - added for Vesta */
-
-#define _CTL2_EXTERN 0x80 /* */
-#define _CTL2_USEFIFO 0x40 /* */
-#define _CTL2_RESETRF 0x08 /* */
-#define _CTL2_RESETTF 0x04 /* */
-
-
-
-#define SERIAL_SICC_NAME "ttySICC"
-#define SERIAL_SICC_MAJOR 150
-#define SERIAL_SICC_MINOR 1
-#define SERIAL_SICC_NR 1
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-/*
- * Things needed by tty driver
- */
-static struct tty_driver *siccnormal_driver;
-
-#if defined(CONFIG_SERIAL_SICC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
-#define SUPPORT_SYSRQ
-#endif
-
-/*
- * Things needed internally to this driver
- */
-
-/*
- * tmp_buf is used as a temporary buffer by serial_write. We need to
- * lock it in case the copy_from_user blocks while swapping in a page,
- * and some other program tries to do a serial write at the same time.
- * Since the lock will only come under contention when the system is
- * swapping and available memory is low, it makes sense to share one
- * buffer across all the serial ports, since it significantly saves
- * memory if large numbers of serial ports are open.
- */
-static u_char *tmp_buf;
-
-#define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
-
-/* number of characters left in xmit buffer before we ask for more */
-#define WAKEUP_CHARS 256
-#define SICC_ISR_PASS_LIMIT 256
-
-#define EVT_WRITE_WAKEUP 0
-
-struct SICC_icount {
- __u32 cts;
- __u32 dsr;
- __u32 rng;
- __u32 dcd;
- __u32 rx;
- __u32 tx;
- __u32 frame;
- __u32 overrun;
- __u32 parity;
- __u32 brk;
- __u32 buf_overrun;
-};
-
-/*
- * Static information about the port
- */
-struct SICC_port {
- unsigned int uart_base;
- unsigned int uart_base_phys;
- unsigned int irqrx;
- unsigned int irqtx;
- unsigned int uartclk;
- unsigned int fifosize;
- unsigned int tiocm_support;
- void (*set_mctrl)(struct SICC_port *, u_int mctrl);
-};
-
-/*
- * This is the state information which is persistent across opens
- */
-struct SICC_state {
- struct SICC_icount icount;
- unsigned int line;
- unsigned int close_delay;
- unsigned int closing_wait;
- unsigned int custom_divisor;
- unsigned int flags;
- int count;
- struct SICC_info *info;
- spinlock_t sicc_lock;
-};
-
-#define SICC_XMIT_SIZE 1024
-/*
- * This is the state information which is only valid when the port is open.
- */
-struct SICC_info {
- struct SICC_port *port;
- struct SICC_state *state;
- struct tty_struct *tty;
- unsigned char x_char;
- unsigned char old_status;
- unsigned char read_status_mask;
- unsigned char ignore_status_mask;
- struct circ_buf xmit;
- unsigned int flags;
-#ifdef SUPPORT_SYSRQ
- unsigned long sysrq;
-#endif
-
- unsigned int event;
- unsigned int timeout;
- unsigned int lcr_h;
- unsigned int mctrl;
- int blocked_open;
-
- struct tasklet_struct tlet;
-
- wait_queue_head_t open_wait;
- wait_queue_head_t close_wait;
- wait_queue_head_t delta_msr_wait;
-};
-
-#ifdef CONFIG_SERIAL_SICC_CONSOLE
-static struct console siccuart_cons;
-#endif
-static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios);
-static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout);
-
-
-
-static void powerpcMtcic_cr(unsigned long value)
-{
- mtdcr(DCRN_CICCR, value);
-}
-
-static unsigned long powerpcMfcic_cr(void)
-{
- return mfdcr(DCRN_CICCR);
-}
-
-static unsigned long powerpcMfclkgpcr(void)
-{
- return mfdcr(DCRN_SCCR);
-}
-
-static void sicc_set_mctrl_null(struct SICC_port *port, u_int mctrl)
-{
-}
-
-static struct SICC_port sicc_ports[SERIAL_SICC_NR] = {
- {
- .uart_base = 0,
- .uart_base_phys = SICC0_IO_BASE,
- .irqrx = SICC0_INTRX,
- .irqtx = SICC0_INTTX,
-// .uartclk = 0,
- .fifosize = 1,
- .set_mctrl = sicc_set_mctrl_null,
- }
-};
-
-static struct SICC_state sicc_state[SERIAL_SICC_NR];
-
-static void siccuart_enable_rx_interrupt(struct SICC_info *info)
-{
- unsigned char cr;
-
- cr = readb(info->port->uart_base+BL_SICC_RCR);
- cr &= ~_RCR_DME_MASK;
- cr |= _RCR_DME_RXRDY;
- writeb(cr, info->port->uart_base+BL_SICC_RCR);
-}
-
-static void siccuart_disable_rx_interrupt(struct SICC_info *info)
-{
- unsigned char cr;
-
- cr = readb(info->port->uart_base+BL_SICC_RCR);
- cr &= ~_RCR_DME_MASK;
- cr |= _RCR_DME_DISABLE;
- writeb(cr, info->port->uart_base+BL_SICC_RCR);
-}
-
-
-static void siccuart_enable_tx_interrupt(struct SICC_info *info)
-{
- unsigned char cr;
-
- cr = readb(info->port->uart_base+BL_SICC_TxCR);
- cr &= ~_TxCR_DME_MASK;
- cr |= _TxCR_DME_TBR;
- writeb(cr, info->port->uart_base+BL_SICC_TxCR);
-}
-
-static void siccuart_disable_tx_interrupt(struct SICC_info *info)
-{
- unsigned char cr;
-
- cr = readb(info->port->uart_base+BL_SICC_TxCR);
- cr &= ~_TxCR_DME_MASK;
- cr |= _TxCR_DME_DISABLE;
- writeb(cr, info->port->uart_base+BL_SICC_TxCR);
-}
-
-
-static void siccuart_stop(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- /* disable interrupts while stopping serial port interrupts */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- siccuart_disable_tx_interrupt(info);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-static void siccuart_start(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- /* disable interrupts while starting serial port interrupts */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (info->xmit.head != info->xmit.tail
- && info->xmit.buf)
- siccuart_enable_tx_interrupt(info);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-
-/*
- * This routine is used by the interrupt handler to schedule
- * processing in the software interrupt portion of the driver.
- */
-static void siccuart_event(struct SICC_info *info, int event)
-{
- info->event |= 1 << event;
- tasklet_schedule(&info->tlet);
-}
-
-static void
-siccuart_rx_chars(struct SICC_info *info)
-{
- struct tty_struct *tty = info->tty;
- unsigned int status, ch, rsr, flg, ignored = 0;
- struct SICC_icount *icount = &info->state->icount;
- struct SICC_port *port = info->port;
-
- status = readb(port->uart_base+BL_SICC_LSR );
- while (status & _LSR_RBR_FULL) {
- ch = readb(port->uart_base+BL_SICC_RBR);
-
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- goto ignore_char;
- icount->rx++;
-
- flg = TTY_NORMAL;
-
- /*
- * Note that the error handling code is
- * out of the main execution path
- */
- rsr = readb(port->uart_base+BL_SICC_LSR);
- if (rsr & _LSR_RX_ERR)
- goto handle_error;
-#ifdef SUPPORT_SYSRQ
- if (info->sysrq) {
- if (ch && time_before(jiffies, info->sysrq)) {
- handle_sysrq(ch, NULL);
- info->sysrq = 0;
- goto ignore_char;
- }
- info->sysrq = 0;
- }
-#endif
- error_return:
- *tty->flip.flag_buf_ptr++ = flg;
- *tty->flip.char_buf_ptr++ = ch;
- tty->flip.count++;
- ignore_char:
- status = readb(port->uart_base+BL_SICC_LSR );
- }
-out:
- tty_flip_buffer_push(tty);
- return;
-
-handle_error:
- if (rsr & _LSR_LB_BREAK) {
- rsr &= ~(_LSR_FE_MASK | _LSR_PE_MASK);
- icount->brk++;
-
-#ifdef SUPPORT_SYSRQ
- if (info->state->line == siccuart_cons.index) {
- if (!info->sysrq) {
- info->sysrq = jiffies + HZ*5;
- goto ignore_char;
- }
- }
-#endif
- } else if (rsr & _LSR_PE_MASK)
- icount->parity++;
- else if (rsr & _LSR_FE_MASK)
- icount->frame++;
- if (rsr & _LSR_OE_MASK)
- icount->overrun++;
-
- if (rsr & info->ignore_status_mask) {
- if (++ignored > 100)
- goto out;
- goto ignore_char;
- }
- rsr &= info->read_status_mask;
-
- if (rsr & _LSR_LB_BREAK)
- flg = TTY_BREAK;
- else if (rsr & _LSR_PE_MASK)
- flg = TTY_PARITY;
- else if (rsr & _LSR_FE_MASK)
- flg = TTY_FRAME;
-
- if (rsr & _LSR_OE_MASK) {
- /*
- * CHECK: does overrun affect the current character?
- * ASSUMPTION: it does not.
- */
- *tty->flip.flag_buf_ptr++ = flg;
- *tty->flip.char_buf_ptr++ = ch;
- tty->flip.count++;
- if (tty->flip.count >= TTY_FLIPBUF_SIZE)
- goto ignore_char;
- ch = 0;
- flg = TTY_OVERRUN;
- }
-#ifdef SUPPORT_SYSRQ
- info->sysrq = 0;
-#endif
- goto error_return;
-}
-
-static void siccuart_tx_chars(struct SICC_info *info)
-{
- struct SICC_port *port = info->port;
- int count;
- unsigned char status;
-
-
- if (info->x_char) {
- writeb(info->x_char, port->uart_base+ BL_SICC_TBR);
- info->state->icount.tx++;
- info->x_char = 0;
- return;
- }
- if (info->xmit.head == info->xmit.tail
- || info->tty->stopped
- || info->tty->hw_stopped) {
- siccuart_disable_tx_interrupt(info);
- writeb(status&(~_LSR_RBR_MASK),port->uart_base+BL_SICC_LSR);
- return;
- }
-
- count = port->fifosize;
- do {
- writeb(info->xmit.buf[info->xmit.tail], port->uart_base+ BL_SICC_TBR);
- info->xmit.tail = (info->xmit.tail + 1) & (SICC_XMIT_SIZE - 1);
- info->state->icount.tx++;
- if (info->xmit.head == info->xmit.tail)
- break;
- } while (--count > 0);
-
- if (CIRC_CNT(info->xmit.head,
- info->xmit.tail,
- SICC_XMIT_SIZE) < WAKEUP_CHARS)
- siccuart_event(info, EVT_WRITE_WAKEUP);
-
- if (info->xmit.head == info->xmit.tail) {
- siccuart_disable_tx_interrupt(info);
- }
-}
-
-
-static irqreturn_t siccuart_int_rx(int irq, void *dev_id)
-{
- struct SICC_info *info = dev_id;
- siccuart_rx_chars(info)
- return IRQ_HANDLED;
-}
-
-
-static irqreturn_t siccuart_int_tx(int irq, void *dev_id)
-{
- struct SICC_info *info = dev_id;
- siccuart_tx_chars(info);
- return IRQ_HANDLED;
-}
-
-static void siccuart_tasklet_action(unsigned long data)
-{
- struct SICC_info *info = (struct SICC_info *)data;
- struct tty_struct *tty;
-
- tty = info->tty;
- if (!tty || !test_and_clear_bit(EVT_WRITE_WAKEUP, &info->event))
- return;
-
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
- wake_up_interruptible(&tty->write_wait);
-}
-
-static int siccuart_startup(struct SICC_info *info)
-{
- unsigned long flags;
- unsigned long page;
- int retval = 0;
-
- if (info->flags & ASYNC_INITIALIZED) {
- return 0;
- }
-
- page = get_zeroed_page(GFP_KERNEL);
- if (!page)
- return -ENOMEM;
-
- if (info->port->uart_base == 0)
- info->port->uart_base = (int)ioremap(info->port->uart_base_phys, PAGE_SIZE);
- if (info->port->uart_base == 0) {
- free_page(page);
- return -ENOMEM;
- }
-
- /* lock access to info while doing setup */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
-
- if (info->xmit.buf)
- free_page(page);
- else
- info->xmit.buf = (unsigned char *) page;
-
-
- info->mctrl = 0;
- if (info->tty->termios->c_cflag & CBAUD)
- info->mctrl = TIOCM_RTS | TIOCM_DTR;
- info->port->set_mctrl(info->port, info->mctrl);
-
- /*
- * initialise the old status of the modem signals
- */
- info->old_status = 0; // UART_GET_FR(info->port) & AMBA_UARTFR_MODEM_ANY;
-
-
- if (info->tty)
- clear_bit(TTY_IO_ERROR, &info->tty->flags);
- info->xmit.head = info->xmit.tail = 0;
-
- /*
- * Set up the tty->alt_speed kludge
- */
- if (info->tty) {
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
- info->tty->alt_speed = 57600;
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
- info->tty->alt_speed = 115200;
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
- info->tty->alt_speed = 230400;
- if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
- info->tty->alt_speed = 460800;
- }
-
-
- writeb( 0x00, info->port->uart_base + BL_SICC_IrCR ); // disable IrDA
-
-
- /*
- * and set the speed of the serial port
- */
- siccuart_change_speed(info, 0);
-
- // enable rx/tx ports
- writeb(_RCR_ER_ENABLE /*| _RCR_PME_HARD*/, info->port->uart_base + BL_SICC_RCR);
- writeb(_TxCR_ET_ENABLE , info->port->uart_base + BL_SICC_TxCR);
-
- readb(info->port->uart_base + BL_SICC_RBR); // clear rx port
-
- writeb(0xf8, info->port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */
-
- /*
- * Finally, enable interrupts
- */
-
- /*
- * Allocate the IRQ
- */
- retval = request_irq(info->port->irqrx, siccuart_int_rx, 0, "SICC rx", info);
- if (retval) {
- if (capable(CAP_SYS_ADMIN)) {
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
- retval = 0;
- }
- goto errout;
- }
- retval = request_irq(info->port->irqtx, siccuart_int_tx, 0, "SICC tx", info);
- if (retval) {
- if (capable(CAP_SYS_ADMIN)) {
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
- retval = 0;
- }
- free_irq(info->port->irqrx, info);
- goto errout;
- }
-
- siccuart_enable_rx_interrupt(info);
-
- info->flags |= ASYNC_INITIALIZED;
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return 0;
-
-
-errout:
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return retval;
-}
-
-/*
- * This routine will shutdown a serial port; interrupts are disabled, and
- * DTR is dropped if the hangup on close termio flag is on.
- */
-static void siccuart_shutdown(struct SICC_info *info)
-{
- unsigned long flags;
-
- if (!(info->flags & ASYNC_INITIALIZED))
- return;
-
- /* lock while shutting down port */
- spin_lock_irqsave(&info->state->sicc_lock,flags); /* Disable interrupts */
-
- /*
- * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
- * here so the queue might never be woken up
- */
- wake_up_interruptible(&info->delta_msr_wait);
-
- /*
- * disable all interrupts, disable the port
- */
- siccuart_disable_rx_interrupt(info);
- siccuart_disable_tx_interrupt(info);
-
- /*
- * Free the IRQ
- */
- free_irq(info->port->irqtx, info);
- free_irq(info->port->irqrx, info);
-
- if (info->xmit.buf) {
- unsigned long pg = (unsigned long) info->xmit.buf;
- info->xmit.buf = NULL;
- free_page(pg);
- }
-
-
- if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
- info->mctrl &= ~(TIOCM_DTR|TIOCM_RTS);
- info->port->set_mctrl(info->port, info->mctrl);
-
- /* kill off our tasklet */
- tasklet_kill(&info->tlet);
- if (info->tty)
- set_bit(TTY_IO_ERROR, &info->tty->flags);
-
- info->flags &= ~ASYNC_INITIALIZED;
-
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-
-static void siccuart_change_speed(struct SICC_info *info, struct termios *old_termios)
-{
- unsigned int lcr_h, baud, quot, cflag, old_rcr, old_tcr, bits;
- unsigned long flags;
-
- if (!info->tty || !info->tty->termios)
- return;
-
- cflag = info->tty->termios->c_cflag;
-
- pr_debug("siccuart_set_cflag(0x%x) called\n", cflag);
- /* byte size and parity */
- switch (cflag & CSIZE) {
- case CS7: lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; bits = 9; break;
- default: lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; bits = 10; break; // CS8
- }
- if (cflag & CSTOPB) {
- lcr_h |= _LCR_SB_2_BIT;
- bits ++;
- }
- if (cflag & PARENB) {
- lcr_h |= _LCR_PE_ENABLE;
- bits++;
- if (!(cflag & PARODD))
- lcr_h |= _LCR_PTY_ODD;
- else
- lcr_h |= _LCR_PTY_EVEN;
- }
-
- do {
- /* Determine divisor based on baud rate */
- baud = tty_get_baud_rate(info->tty);
- if (!baud)
- baud = 9600;
-
-
- {
- // here is ppc403SetBaud(com_port, baud);
- unsigned long divisor, clockSource, temp;
-
- /* Ensure CICCR[7] is 0 to select Internal Baud Clock */
- powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF));
-
- /* Determine Internal Baud Clock Frequency */
- /* powerpcMfclkgpcr() reads DCR 0x120 - the*/
- /* SCCR (Serial Clock Control Register) on Vesta */
- temp = powerpcMfclkgpcr();
-
- if(temp & 0x00000080) {
- clockSource = 324000000;
- }
- else {
- clockSource = 216000000;
- }
- clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18);
- divisor = clockSource/(16*baud) - 1;
- /* divisor has only 12 bits of resolution */
- if(divisor>0x00000FFF){
- divisor=0x00000FFF;
- }
-
- quot = divisor;
- }
-
- if (baud == 38400 &&
- ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST))
- quot = info->state->custom_divisor;
-
- if (!quot && old_termios) {
- info->tty->termios->c_cflag &= ~CBAUD;
- info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD);
- old_termios = NULL;
- }
- } while (quot == 0 && old_termios);
-
- /* As a last resort, if the quotient is zero, default to 9600 bps */
- if (!quot)
- quot = (info->port->uartclk / (16 * 9600)) - 1;
-
- info->timeout = info->port->fifosize * HZ * bits / baud;
- info->timeout += HZ/50; /* Add .02 seconds of slop */
-
- if (cflag & CRTSCTS)
- info->flags |= ASYNC_CTS_FLOW;
- else
- info->flags &= ~ASYNC_CTS_FLOW;
- if (cflag & CLOCAL)
- info->flags &= ~ASYNC_CHECK_CD;
- else
- info->flags |= ASYNC_CHECK_CD;
-
- /*
- * Set up parity check flag
- */
-#define RELEVENT_IFLAG(iflag) ((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
-
- info->read_status_mask = _LSR_OE_MASK;
- if (I_INPCK(info->tty))
- info->read_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK;
- if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
- info->read_status_mask |= _LSR_LB_MASK;
-
- /*
- * Characters to ignore
- */
- info->ignore_status_mask = 0;
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= _LSR_FE_MASK | _LSR_PE_MASK;
- if (I_IGNBRK(info->tty)) {
- info->ignore_status_mask |= _LSR_LB_MASK;
- /*
- * If we're ignoring parity and break indicators,
- * ignore overruns to (for real raw support).
- */
- if (I_IGNPAR(info->tty))
- info->ignore_status_mask |= _LSR_OE_MASK;
- }
-
- /* disable interrupts while reading and clearing registers */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
-
- old_rcr = readb(info->port->uart_base + BL_SICC_RCR);
- old_tcr = readb(info->port->uart_base + BL_SICC_TxCR);
-
-
- writeb(0, info->port->uart_base + BL_SICC_RCR);
- writeb(0, info->port->uart_base + BL_SICC_TxCR);
-
- /*RLBtrace (&ppc403Chan0, 0x2000000c, 0, 0);*/
-
-
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-
-
- /* Set baud rate */
- writeb((quot & 0x00000F00)>>8, info->port->uart_base + BL_SICC_BRDH );
- writeb( quot & 0x00000FF, info->port->uart_base + BL_SICC_BRDL );
-
- /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */
- /* For now, do NOT use FIFOs since 403 UART did not have this */
- /* capability and this driver was inherited from 403UART. */
- writeb(_CTL2_EXTERN, info->port->uart_base + BL_SICC_CTL2);
-
- writeb(lcr_h, info->port->uart_base + BL_SICC_LCR);
-
- writeb(old_rcr, info->port->uart_base + BL_SICC_RCR); // restore rcr
- writeb(old_tcr, info->port->uart_base + BL_SICC_TxCR); // restore txcr
-
-}
-
-
-static void siccuart_put_char(struct tty_struct *tty, u_char ch)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- if (!tty || !info->xmit.buf)
- return;
-
- /* lock info->xmit while adding character to tx buffer */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE) != 0) {
- info->xmit.buf[info->xmit.head] = ch;
- info->xmit.head = (info->xmit.head + 1) & (SICC_XMIT_SIZE - 1);
- }
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-static void siccuart_flush_chars(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- if (info->xmit.head == info->xmit.tail
- || tty->stopped
- || tty->hw_stopped
- || !info->xmit.buf)
- return;
-
- /* disable interrupts while transmitting characters */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- siccuart_enable_tx_interrupt(info);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-static int siccuart_write(struct tty_struct *tty,
- const u_char * buf, int count)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
- int c, ret = 0;
-
- if (!tty || !info->xmit.buf || !tmp_buf)
- return 0;
-
- /* lock info->xmit while removing characters from buffer */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- while (1) {
- c = CIRC_SPACE_TO_END(info->xmit.head,
- info->xmit.tail,
- SICC_XMIT_SIZE);
- if (count < c)
- c = count;
- if (c <= 0)
- break;
- memcpy(info->xmit.buf + info->xmit.head, buf, c);
- info->xmit.head = (info->xmit.head + c) &
- (SICC_XMIT_SIZE - 1);
- buf += c;
- count -= c;
- ret += c;
- }
- if (info->xmit.head != info->xmit.tail
- && !tty->stopped
- && !tty->hw_stopped)
- siccuart_enable_tx_interrupt(info);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return ret;
-}
-
-static int siccuart_write_room(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
-
- return CIRC_SPACE(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE);
-}
-
-static int siccuart_chars_in_buffer(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
-
- return CIRC_CNT(info->xmit.head, info->xmit.tail, SICC_XMIT_SIZE);
-}
-
-static void siccuart_flush_buffer(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- pr_debug("siccuart_flush_buffer(%d) called\n", tty->index);
- /* lock info->xmit while zeroing buffer counts */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->xmit.head = info->xmit.tail = 0;
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- wake_up_interruptible(&tty->write_wait);
- if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
- tty->ldisc.write_wakeup)
- (tty->ldisc.write_wakeup)(tty);
-}
-
-/*
- * This function is used to send a high-priority XON/XOFF character to
- * the device
- */
-static void siccuart_send_xchar(struct tty_struct *tty, char ch)
-{
- struct SICC_info *info = tty->driver_data;
-
- info->x_char = ch;
- if (ch)
- siccuart_enable_tx_interrupt(info);
-}
-
-static void siccuart_throttle(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
-
- if (I_IXOFF(tty))
- siccuart_send_xchar(tty, STOP_CHAR(tty));
-
- if (tty->termios->c_cflag & CRTSCTS) {
- /* disable interrupts while setting modem control lines */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->mctrl &= ~TIOCM_RTS;
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- }
-}
-
-static void siccuart_unthrottle(struct tty_struct *tty)
-{
- struct SICC_info *info = (struct SICC_info *) tty->driver_data;
- unsigned long flags;
-
- if (I_IXOFF(tty)) {
- if (info->x_char)
- info->x_char = 0;
- else
- siccuart_send_xchar(tty, START_CHAR(tty));
- }
-
- if (tty->termios->c_cflag & CRTSCTS) {
- /* disable interrupts while setting modem control lines */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->mctrl |= TIOCM_RTS;
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- }
-}
-
-static int get_serial_info(struct SICC_info *info, struct serial_struct *retinfo)
-{
- struct SICC_state *state = info->state;
- struct SICC_port *port = info->port;
- struct serial_struct tmp;
-
- memset(&tmp, 0, sizeof(tmp));
- tmp.type = 0;
- tmp.line = state->line;
- tmp.port = port->uart_base;
- if (HIGH_BITS_OFFSET)
- tmp.port_high = port->uart_base >> HIGH_BITS_OFFSET;
- tmp.irq = port->irqrx;
- tmp.flags = 0;
- tmp.xmit_fifo_size = port->fifosize;
- tmp.baud_base = port->uartclk / 16;
- tmp.close_delay = state->close_delay;
- tmp.closing_wait = state->closing_wait;
- tmp.custom_divisor = state->custom_divisor;
-
- if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
- return -EFAULT;
- return 0;
-}
-
-static int set_serial_info(struct SICC_info *info,
- struct serial_struct *newinfo)
-{
- struct serial_struct new_serial;
- struct SICC_state *state, old_state;
- struct SICC_port *port;
- unsigned long new_port;
- unsigned int i, change_irq, change_port;
- int retval = 0;
-
- if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
- return -EFAULT;
-
- state = info->state;
- old_state = *state;
- port = info->port;
-
- new_port = new_serial.port;
- if (HIGH_BITS_OFFSET)
- new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET;
-
- change_irq = new_serial.irq != port->irqrx;
- change_port = new_port != port->uart_base;
-
- if (!capable(CAP_SYS_ADMIN)) {
- if (change_irq || change_port ||
- (new_serial.baud_base != port->uartclk / 16) ||
- (new_serial.close_delay != state->close_delay) ||
- (new_serial.xmit_fifo_size != port->fifosize) ||
- ((new_serial.flags & ~ASYNC_USR_MASK) !=
- (state->flags & ~ASYNC_USR_MASK)))
- return -EPERM;
- state->flags = ((state->flags & ~ASYNC_USR_MASK) |
- (new_serial.flags & ASYNC_USR_MASK));
- info->flags = ((info->flags & ~ASYNC_USR_MASK) |
- (new_serial.flags & ASYNC_USR_MASK));
- state->custom_divisor = new_serial.custom_divisor;
- goto check_and_exit;
- }
-
- if ((new_serial.irq >= NR_IRQS) || (new_serial.irq < 0) ||
- (new_serial.baud_base < 9600))
- return -EINVAL;
-
- if (new_serial.type && change_port) {
- for (i = 0; i < SERIAL_SICC_NR; i++)
- if ((port != sicc_ports + i) &&
- sicc_ports[i].uart_base != new_port)
- return -EADDRINUSE;
- }
-
- if ((change_port || change_irq) && (state->count > 1))
- return -EBUSY;
-
- /*
- * OK, past this point, all the error checking has been done.
- * At this point, we start making changes.....
- */
- port->uartclk = new_serial.baud_base * 16;
- state->flags = ((state->flags & ~ASYNC_FLAGS) |
- (new_serial.flags & ASYNC_FLAGS));
- info->flags = ((state->flags & ~ASYNC_INTERNAL_FLAGS) |
- (info->flags & ASYNC_INTERNAL_FLAGS));
- state->custom_divisor = new_serial.custom_divisor;
- state->close_delay = msecs_to_jiffies(10 * new_serial.close_delay);
- state->closing_wait = msecs_to_jiffies(10 * new_serial.closing_wait);
- info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
- port->fifosize = new_serial.xmit_fifo_size;
-
- if (change_port || change_irq) {
- /*
- * We need to shutdown the serial port at the old
- * port/irq combination.
- */
- siccuart_shutdown(info);
- port->irqrx = new_serial.irq;
- port->uart_base = new_port;
- }
-
-check_and_exit:
- if (!port->uart_base)
- return 0;
- if (info->flags & ASYNC_INITIALIZED) {
- if ((old_state.flags & ASYNC_SPD_MASK) !=
- (state->flags & ASYNC_SPD_MASK) ||
- (old_state.custom_divisor != state->custom_divisor)) {
- if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
- info->tty->alt_speed = 57600;
- if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
- info->tty->alt_speed = 115200;
- if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
- info->tty->alt_speed = 230400;
- if ((state->flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
- info->tty->alt_speed = 460800;
- siccuart_change_speed(info, NULL);
- }
- } else
- retval = siccuart_startup(info);
- return retval;
-}
-
-
-/*
- * get_lsr_info - get line status register info
- */
-static int get_lsr_info(struct SICC_info *info, unsigned int *value)
-{
- unsigned int result, status;
- unsigned long flags;
-
- /* disable interrupts while reading status from port */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- status = readb(info->port->uart_base + BL_SICC_LSR);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- result = status & _LSR_TSR_EMPTY ? TIOCSER_TEMT : 0;
-
- /*
- * If we're about to load something into the transmit
- * register, we'll pretend the transmitter isn't empty to
- * avoid a race condition (depending on when the transmit
- * interrupt happens).
- */
- if (info->x_char ||
- ((CIRC_CNT(info->xmit.head, info->xmit.tail,
- SICC_XMIT_SIZE) > 0) &&
- !info->tty->stopped && !info->tty->hw_stopped))
- result &= TIOCSER_TEMT;
-
- return put_user(result, value);
-}
-
-static int get_modem_info(struct SICC_info *info, unsigned int *value)
-{
- unsigned int result = info->mctrl;
-
- return put_user(result, value);
-}
-
-static int set_modem_info(struct SICC_info *info, unsigned int cmd,
- unsigned int *value)
-{
- unsigned int arg, old;
- unsigned long flags;
-
- if (get_user(arg, value))
- return -EFAULT;
-
- old = info->mctrl;
- switch (cmd) {
- case TIOCMBIS:
- info->mctrl |= arg;
- break;
-
- case TIOCMBIC:
- info->mctrl &= ~arg;
- break;
-
- case TIOCMSET:
- info->mctrl = arg;
- break;
-
- default:
- return -EINVAL;
- }
- /* disable interrupts while setting modem control lines */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (old != info->mctrl)
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return 0;
-}
-
-static void siccuart_break_ctl(struct tty_struct *tty, int break_state)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
- unsigned int lcr_h;
-
-
- /* disable interrupts while setting break state */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- lcr_h = readb(info->port + BL_SICC_LSR);
- if (break_state == -1)
- lcr_h |= _LSR_LB_MASK;
- else
- lcr_h &= ~_LSR_LB_MASK;
- writeb(lcr_h, info->port + BL_SICC_LSRS);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
-}
-
-static int siccuart_ioctl(struct tty_struct *tty, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- struct SICC_info *info = tty->driver_data;
- struct SICC_icount cnow;
- struct serial_icounter_struct icount;
- unsigned long flags;
-
- if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
- (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT) &&
- (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
- if (tty->flags & (1 << TTY_IO_ERROR))
- return -EIO;
- }
-
- switch (cmd) {
- case TIOCMGET:
- return get_modem_info(info, (unsigned int *)arg);
- case TIOCMBIS:
- case TIOCMBIC:
- case TIOCMSET:
- return set_modem_info(info, cmd, (unsigned int *)arg);
- case TIOCGSERIAL:
- return get_serial_info(info,
- (struct serial_struct *)arg);
- case TIOCSSERIAL:
- return set_serial_info(info,
- (struct serial_struct *)arg);
- case TIOCSERGETLSR: /* Get line status register */
- return get_lsr_info(info, (unsigned int *)arg);
- /*
- * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
- * - mask passed in arg for lines of interest
- * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
- * Caller should use TIOCGICOUNT to see which one it was
- */
- case TIOCMIWAIT:
- return 0;
- /*
- * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
- * Return: write counters to the user passed counter struct
- * NB: both 1->0 and 0->1 transitions are counted except for
- * RI where only 0->1 is counted.
- */
- case TIOCGICOUNT:
- /* disable interrupts while getting interrupt count */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- cnow = info->state->icount;
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- icount.cts = cnow.cts;
- icount.dsr = cnow.dsr;
- icount.rng = cnow.rng;
- icount.dcd = cnow.dcd;
- icount.rx = cnow.rx;
- icount.tx = cnow.tx;
- icount.frame = cnow.frame;
- icount.overrun = cnow.overrun;
- icount.parity = cnow.parity;
- icount.brk = cnow.brk;
- icount.buf_overrun = cnow.buf_overrun;
-
- return copy_to_user((void *)arg, &icount, sizeof(icount))
- ? -EFAULT : 0;
-
- default:
- return -ENOIOCTLCMD;
- }
- return 0;
-}
-
-static void siccuart_set_termios(struct tty_struct *tty, struct termios *old_termios)
-{
- struct SICC_info *info = tty->driver_data;
- unsigned long flags;
- unsigned int cflag = tty->termios->c_cflag;
-
- if ((cflag ^ old_termios->c_cflag) == 0 &&
- RELEVENT_IFLAG(tty->termios->c_iflag ^ old_termios->c_iflag) == 0)
- return;
-
- siccuart_change_speed(info, old_termios);
-
- /* Handle transition to B0 status */
- if ((old_termios->c_cflag & CBAUD) &&
- !(cflag & CBAUD)) {
- /* disable interrupts while setting break state */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->mctrl &= ~(TIOCM_RTS | TIOCM_DTR);
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- }
-
- /* Handle transition away from B0 status */
- if (!(old_termios->c_cflag & CBAUD) &&
- (cflag & CBAUD)) {
- /* disable interrupts while setting break state */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- info->mctrl |= TIOCM_DTR;
- if (!(cflag & CRTSCTS) ||
- !test_bit(TTY_THROTTLED, &tty->flags))
- info->mctrl |= TIOCM_RTS;
- info->port->set_mctrl(info->port, info->mctrl);
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- }
-
- /* Handle turning off CRTSCTS */
- if ((old_termios->c_cflag & CRTSCTS) &&
- !(cflag & CRTSCTS)) {
- tty->hw_stopped = 0;
- siccuart_start(tty);
- }
-
-#if 0
- /*
- * No need to wake up processes in open wait, since they
- * sample the CLOCAL flag once, and don't recheck it.
- * XXX It's not clear whether the current behavior is correct
- * or not. Hence, this may change.....
- */
- if (!(old_termios->c_cflag & CLOCAL) &&
- (tty->termios->c_cflag & CLOCAL))
- wake_up_interruptible(&info->open_wait);
-#endif
-}
-
-static void siccuart_close(struct tty_struct *tty, struct file *filp)
-{
- struct SICC_info *info = tty->driver_data;
- struct SICC_state *state;
- unsigned long flags;
-
- if (!info)
- return;
-
- state = info->state;
-
- //pr_debug("siccuart_close() called\n");
-
- /* lock tty->driver_data while closing port */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
-
- if (tty_hung_up_p(filp)) {
- goto quick_close;
- }
-
- if ((tty->count == 1) && (state->count != 1)) {
- /*
- * Uh, oh. tty->count is 1, which means that the tty
- * structure will be freed. state->count should always
- * be one in these conditions. If it's greater than
- * one, we've got real problems, since it means the
- * serial port won't be shutdown.
- */
- printk("siccuart_close: bad serial port count; tty->count is 1, state->count is %d\n", state->count);
- state->count = 1;
- }
- if (--state->count < 0) {
- printk("rs_close: bad serial port count for %s: %d\n", tty->name, state->count);
- state->count = 0;
- }
- if (state->count) {
- goto quick_close;
- }
- info->flags |= ASYNC_CLOSING;
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- /*
- * Now we wait for the transmit buffer to clear; and we notify
- * the line discipline to only process XON/XOFF characters.
- */
- tty->closing = 1;
- if (info->state->closing_wait != ASYNC_CLOSING_WAIT_NONE)
- tty_wait_until_sent(tty, info->state->closing_wait);
- /*
- * At this point, we stop accepting input. To do this, we
- * disable the receive line status interrupts.
- */
- if (info->flags & ASYNC_INITIALIZED) {
- siccuart_disable_rx_interrupt(info);
- /*
- * Before we drop DTR, make sure the UART transmitter
- * has completely drained; this is especially
- * important if there is a transmit FIFO!
- */
- siccuart_wait_until_sent(tty, info->timeout);
- }
- siccuart_shutdown(info);
- if (tty->driver->flush_buffer)
- tty->driver->flush_buffer(tty);
- if (tty->ldisc.flush_buffer)
- tty->ldisc.flush_buffer(tty);
- tty->closing = 0;
- info->event = 0;
- info->tty = NULL;
- if (info->blocked_open) {
- if (info->state->close_delay)
- schedule_timeout_interruptible(info->state->close_delay);
- wake_up_interruptible(&info->open_wait);
- }
- info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
- wake_up_interruptible(&info->close_wait);
- return;
-
-quick_close:
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- return;
-}
-
-static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout)
-{
- struct SICC_info *info = (struct SICC_info *) tty->driver_data;
- unsigned long char_time, expire;
-
- if (info->port->fifosize == 0)
- return;
-
- /*
- * Set the check interval to be 1/5 of the estimated time to
- * send a single character, and make it at least 1. The check
- * interval should also be less than the timeout.
- *
- * Note: we have to use pretty tight timings here to satisfy
- * the NIST-PCTS.
- */
- char_time = (info->timeout - msecs_to_jiffies(20)) / info->port->fifosize;
- char_time = char_time / 5;
- if (char_time == 0)
- char_time = 1;
-
- // Crazy!! sometimes the input arg 'timeout' can be negtive numbers :-(
- if (timeout >= 0 && timeout < char_time)
- char_time = timeout;
- /*
- * If the transmitter hasn't cleared in twice the approximate
- * amount of time to send the entire FIFO, it probably won't
- * ever clear. This assumes the UART isn't doing flow
- * control, which is currently the case. Hence, if it ever
- * takes longer than info->timeout, this is probably due to a
- * UART bug of some kind. So, we clamp the timeout parameter at
- * 2*info->timeout.
- */
- if (!timeout || timeout > 2 * info->timeout)
- timeout = 2 * info->timeout;
-
- expire = jiffies + timeout;
- pr_debug("siccuart_wait_until_sent(%d), jiff=%lu, expire=%lu char_time=%lu...\n",
- tty->index, jiffies,
- expire, char_time);
- while ((readb(info->port->uart_base + BL_SICC_LSR) & _LSR_TX_ALL) != _LSR_TX_ALL) {
- schedule_timeout_interruptible(char_time);
- if (signal_pending(current))
- break;
- if (timeout && time_after(jiffies, expire))
- break;
- }
- set_current_state(TASK_RUNNING);
-}
-
-static void siccuart_hangup(struct tty_struct *tty)
-{
- struct SICC_info *info = tty->driver_data;
- struct SICC_state *state = info->state;
-
- siccuart_flush_buffer(tty);
- if (info->flags & ASYNC_CLOSING)
- return;
- siccuart_shutdown(info);
- info->event = 0;
- state->count = 0;
- info->flags &= ~ASYNC_NORMAL_ACTIVE;
- info->tty = NULL;
- wake_up_interruptible(&info->open_wait);
-}
-
-static int block_til_ready(struct tty_struct *tty, struct file *filp,
- struct SICC_info *info)
-{
- DECLARE_WAITQUEUE(wait, current);
- struct SICC_state *state = info->state;
- unsigned long flags;
- int do_clocal = 0, extra_count = 0, retval;
-
- /*
- * If the device is in the middle of being closed, then block
- * until it's done, and then try again.
- */
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
- interruptible_sleep_on(&info->close_wait);
- return (info->flags & ASYNC_HUP_NOTIFY) ?
- -EAGAIN : -ERESTARTSYS;
- }
-
- /*
- * If non-blocking mode is set, or the port is not enabled,
- * then make the check up front and then exit.
- */
- if ((filp->f_flags & O_NONBLOCK) ||
- (tty->flags & (1 << TTY_IO_ERROR))) {
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
- }
-
- if (tty->termios->c_cflag & CLOCAL)
- do_clocal = 1;
-
- /*
- * Block waiting for the carrier detect and the line to become
- * free (i.e., not in use by the callout). While we are in
- * this loop, state->count is dropped by one, so that
- * rs_close() knows when to free things. We restore it upon
- * exit, either normal or abnormal.
- */
- retval = 0;
- add_wait_queue(&info->open_wait, &wait);
- /* lock while decrementing state->count */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (!tty_hung_up_p(filp)) {
- extra_count = 1;
- state->count--;
- }
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- info->blocked_open++;
- while (1) {
- /* disable interrupts while setting modem control lines */
- spin_lock_irqsave(&info->state->sicc_lock,flags);
- if (tty->termios->c_cflag & CBAUD) {
- info->mctrl = TIOCM_DTR | TIOCM_RTS;
- info->port->set_mctrl(info->port, info->mctrl);
- }
- spin_unlock_irqrestore(&info->state->sicc_lock,flags);
- set_current_state(TASK_INTERRUPTIBLE);
- if (tty_hung_up_p(filp) ||
- !(info->flags & ASYNC_INITIALIZED)) {
- if (info->flags & ASYNC_HUP_NOTIFY)
- retval = -EAGAIN;
- else
- retval = -ERESTARTSYS;
- break;
- }
- if (!(info->flags & ASYNC_CLOSING) &&
- (do_clocal /*|| (UART_GET_FR(info->port) & SICC_UARTFR_DCD)*/))
- break;
- if (signal_pending(current)) {
- retval = -ERESTARTSYS;
- break;
- }
- schedule();
- }
- set_current_state(TASK_RUNNING);
- remove_wait_queue(&info->open_wait, &wait);
- if (extra_count)
- state->count++;
- info->blocked_open--;
- if (retval)
- return retval;
- info->flags |= ASYNC_NORMAL_ACTIVE;
- return 0;
-}
-
-static struct SICC_info *siccuart_get(int line)
-{
- struct SICC_info *info;
- struct SICC_state *state = sicc_state + line;
-
- state->count++;
- if (state->info)
- return state->info;
- info = kzalloc(sizeof(struct SICC_info), GFP_KERNEL);
- if (info) {
- init_waitqueue_head(&info->open_wait);
- init_waitqueue_head(&info->close_wait);
- init_waitqueue_head(&info->delta_msr_wait);
- info->flags = state->flags;
- info->state = state;
- info->port = sicc_ports + line;
- tasklet_init(&info->tlet, siccuart_tasklet_action,
- (unsigned long)info);
- }
- if (state->info) {
- kfree(info);
- return state->info;
- }
- state->info = info;
- return info;
-}
-
-static int siccuart_open(struct tty_struct *tty, struct file *filp)
-{
- struct SICC_info *info;
- int retval, line = tty->index;
-
-
- // is this a line that we've got?
- if (line >= SERIAL_SICC_NR) {
- return -ENODEV;
- }
-
- info = siccuart_get(line);
- if (!info)
- return -ENOMEM;
-
- tty->driver_data = info;
- info->tty = tty;
- info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
-
- /*
- * Make sure we have the temporary buffer allocated
- */
- if (!tmp_buf) {
- unsigned long page = get_zeroed_page(GFP_KERNEL);
- if (tmp_buf)
- free_page(page);
- else if (!page) {
- return -ENOMEM;
- }
- tmp_buf = (u_char *)page;
- }
-
- /*
- * If the port is in the middle of closing, bail out now.
- */
- if (tty_hung_up_p(filp) ||
- (info->flags & ASYNC_CLOSING)) {
- if (info->flags & ASYNC_CLOSING)
- interruptible_sleep_on(&info->close_wait);
- return -EAGAIN;
- }
-
- /*
- * Start up the serial port
- */
- retval = siccuart_startup(info);
- if (retval) {
- return retval;
- }
-
- retval = block_til_ready(tty, filp, info);
- if (retval) {
- return retval;
- }
-
-#ifdef CONFIG_SERIAL_SICC_CONSOLE
- if (siccuart_cons.cflag && siccuart_cons.index == line) {
- tty->termios->c_cflag = siccuart_cons.cflag;
- siccuart_cons.cflag = 0;
- siccuart_change_speed(info, NULL);
- }
-#endif
- return 0;
-}
-
-static const struct tty_operations sicc_ops = {
- .open = siccuart_open,
- .close = siccuart_close,
- .write = siccuart_write,
- .put_char = siccuart_put_char,
- .flush_chars = siccuart_flush_chars,
- .write_room = siccuart_write_room,
- .chars_in_buffer = siccuart_chars_in_buffer,
- .flush_buffer = siccuart_flush_buffer,
- .ioctl = siccuart_ioctl,
- .throttle = siccuart_throttle,
- .unthrottle = siccuart_unthrottle,
- .send_xchar = siccuart_send_xchar,
- .set_termios = siccuart_set_termios,
- .stop = siccuart_stop,
- .start = siccuart_start,
- .hangup = siccuart_hangup,
- .break_ctl = siccuart_break_ctl,
- .wait_until_sent = siccuart_wait_until_sent,
-};
-
-int __init siccuart_init(void)
-{
- int i;
- siccnormal_driver = alloc_tty_driver(SERIAL_SICC_NR);
- if (!siccnormal_driver)
- return -ENOMEM;
- printk("IBM Vesta SICC serial port driver V 0.1 by Yudong Yang and Yi Ge / IBM CRL .\n");
- siccnormal_driver->driver_name = "serial_sicc";
- siccnormal_driver->owner = THIS_MODULE;
- siccnormal_driver->name = SERIAL_SICC_NAME;
- siccnormal_driver->major = SERIAL_SICC_MAJOR;
- siccnormal_driver->minor_start = SERIAL_SICC_MINOR;
- siccnormal_driver->type = TTY_DRIVER_TYPE_SERIAL;
- siccnormal_driver->subtype = SERIAL_TYPE_NORMAL;
- siccnormal_driver->init_termios = tty_std_termios;
- siccnormal_driver->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
- siccnormal_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
- tty_set_operations(siccnormal_driver, &sicc_ops);
-
- if (tty_register_driver(siccnormal_driver))
- panic("Couldn't register SICC serial driver\n");
-
- for (i = 0; i < SERIAL_SICC_NR; i++) {
- struct SICC_state *state = sicc_state + i;
- state->line = i;
- state->close_delay = msecs_to_jiffies(500);
- state->closing_wait = 30 * HZ;
- spin_lock_init(&state->sicc_lock);
- }
-
-
- return 0;
-}
-
-__initcall(siccuart_init);
-
-#ifdef CONFIG_SERIAL_SICC_CONSOLE
-/************** console driver *****************/
-
-/*
- * This code is currently never used; console->read is never called.
- * Therefore, although we have an implementation, we don't use it.
- * FIXME: the "const char *s" should be fixed to "char *s" some day.
- * (when the definition in include/linux/console.h is also fixed)
- */
-#ifdef used_and_not_const_char_pointer
-static int siccuart_console_read(struct console *co, const char *s, u_int count)
-{
- struct SICC_port *port = &sicc_ports[co->index];
- unsigned int status;
- char *w;
- int c;
-
- pr_debug("siccuart_console_read() called\n");
-
- c = 0;
- w = s;
- while (c < count) {
- if(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL) {
- *w++ = readb(port->uart_base + BL_SICC_RBR);
- c++;
- } else {
- // nothing more to get, return
- return c;
- }
- }
- // return the count
- return c;
-}
-#endif
-
-/*
- * Print a string to the serial port trying not to disturb
- * any possible real use of the port...
- *
- * The console_lock must be held when we get here.
- */
-static void siccuart_console_write(struct console *co, const char *s, u_int count)
-{
- struct SICC_port *port = &sicc_ports[co->index];
- unsigned int old_cr;
- int i;
-
- /*
- * First save the CR then disable the interrupts
- */
- old_cr = readb(port->uart_base + BL_SICC_TxCR);
- writeb(old_cr & ~_TxCR_DME_MASK, port->uart_base + BL_SICC_TxCR);
-
- /*
- * Now, do each character
- */
- for (i = 0; i < count; i++) {
- while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
- writeb(s[i], port->uart_base + BL_SICC_TBR);
- if (s[i] == '\n') {
- while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
- writeb('\r', port->uart_base + BL_SICC_TBR);
- }
- }
-
- /*
- * Finally, wait for transmitter to become empty
- * and restore the TCR
- */
- while ((readb(port->uart_base + BL_SICC_LSR)&_LSR_TX_ALL) != _LSR_TX_ALL);
- writeb(old_cr, port->uart_base + BL_SICC_TxCR);
-}
-
-/*
- * Receive character from the serial port
- */
-static int siccuart_console_wait_key(struct console *co)
-{
- struct SICC_port *port = &sicc_ports[co->index];
- int c;
-
- while(!(readb(port->uart_base + BL_SICC_LSR) & _LSR_RBR_FULL));
- c = readb(port->uart_base + BL_SICC_RBR);
- return c;
-}
-
-static struct tty_driver *siccuart_console_device(struct console *c, int *index)
-{
- *index = c->index;
- return siccnormal_driver;
-}
-
-static int __init siccuart_console_setup(struct console *co, char *options)
-{
- struct SICC_port *port;
- int baud = 9600;
- int bits = 8;
- int parity = 'n';
- u_int cflag = CREAD | HUPCL | CLOCAL;
- u_int lcr_h, quot;
-
-
- if (co->index >= SERIAL_SICC_NR)
- co->index = 0;
-
- port = &sicc_ports[co->index];
-
- if (port->uart_base == 0)
- port->uart_base = (int)ioremap(port->uart_base_phys, PAGE_SIZE);
-
- if (options) {
- char *s = options;
- baud = simple_strtoul(s, NULL, 10);
- while (*s >= '0' && *s <= '9')
- s++;
- if (*s) parity = *s++;
- if (*s) bits = *s - '0';
- }
-
- /*
- * Now construct a cflag setting.
- */
- switch (baud) {
- case 1200: cflag |= B1200; break;
- case 2400: cflag |= B2400; break;
- case 4800: cflag |= B4800; break;
- default: cflag |= B9600; baud = 9600; break;
- case 19200: cflag |= B19200; break;
- case 38400: cflag |= B38400; break;
- case 57600: cflag |= B57600; break;
- case 115200: cflag |= B115200; break;
- }
- switch (bits) {
- case 7: cflag |= CS7; lcr_h = _LCR_PE_DISABLE | _LCR_DB_7_BITS | _LCR_SB_1_BIT; break;
- default: cflag |= CS8; lcr_h = _LCR_PE_DISABLE | _LCR_DB_8_BITS | _LCR_SB_1_BIT; break;
- }
- switch (parity) {
- case 'o':
- case 'O': cflag |= PARODD; lcr_h |= _LCR_PTY_ODD; break;
- case 'e':
- case 'E': cflag |= PARENB; lcr_h |= _LCR_PE_ENABLE | _LCR_PTY_ODD; break;
- }
-
- co->cflag = cflag;
-
-
- {
- // a copy of is inserted here ppc403SetBaud(com_port, (int)9600);
- unsigned long divisor, clockSource, temp;
- unsigned int rate = baud;
-
- /* Ensure CICCR[7] is 0 to select Internal Baud Clock */
- powerpcMtcic_cr((unsigned long)(powerpcMfcic_cr() & 0xFEFFFFFF));
-
- /* Determine Internal Baud Clock Frequency */
- /* powerpcMfclkgpcr() reads DCR 0x120 - the*/
- /* SCCR (Serial Clock Control Register) on Vesta */
- temp = powerpcMfclkgpcr();
-
- if(temp & 0x00000080) {
- clockSource = 324000000;
- }
- else {
- clockSource = 216000000;
- }
- clockSource = clockSource/(unsigned long)((temp&0x00FC0000)>>18);
- divisor = clockSource/(16*rate) - 1;
- /* divisor has only 12 bits of resolution */
- if(divisor>0x00000FFF){
- divisor=0x00000FFF;
- }
-
- quot = divisor;
- }
-
- writeb((quot & 0x00000F00)>>8, port->uart_base + BL_SICC_BRDH );
- writeb( quot & 0x00000FF, port->uart_base + BL_SICC_BRDL );
-
- /* Set CTL2 reg to use external clock (ExtClk) and enable FIFOs. */
- /* For now, do NOT use FIFOs since 403 UART did not have this */
- /* capability and this driver was inherited from 403UART. */
- writeb(_CTL2_EXTERN, port->uart_base + BL_SICC_CTL2);
-
- writeb(lcr_h, port->uart_base + BL_SICC_LCR);
- writeb(_RCR_ER_ENABLE | _RCR_PME_HARD, port->uart_base + BL_SICC_RCR);
- writeb( _TxCR_ET_ENABLE , port->uart_base + BL_SICC_TxCR);
-
- // writeb(, info->port->uart_base + BL_SICC_RCR );
- /*
- * Transmitter Command Register: Transmitter enabled & DMA + TBR interrupt
- * + Transmitter Empty interrupt + Transmitter error interrupt disabled &
- * Stop mode when CTS active enabled & Transmit Break + Pattern Generation
- * mode disabled.
- */
-
- writeb( 0x00, port->uart_base + BL_SICC_IrCR ); // disable IrDA
-
- readb(port->uart_base + BL_SICC_RBR);
-
- writeb(0xf8, port->uart_base + BL_SICC_LSR); /* reset bits 0-4 of LSR */
-
- /* we will enable the port as we need it */
-
- return 0;
-}
-
-static struct console siccuart_cons =
-{
- .name = SERIAL_SICC_NAME,
- .write = siccuart_console_write,
-#ifdef used_and_not_const_char_pointer
- .read = siccuart_console_read,
-#endif
- .device = siccuart_console_device,
- .wait_key = siccuart_console_wait_key,
- .setup = siccuart_console_setup,
- .flags = CON_PRINTBUFFER,
- .index = -1,
-};
-
-void __init sicc_console_init(void)
-{
- register_console(&siccuart_cons);
-}
-
-#endif /* CONFIG_SERIAL_SICC_CONSOLE */
diff --git a/arch/ppc/8260_io/Kconfig b/arch/ppc/8260_io/Kconfig
deleted file mode 100644
index ea9651e..0000000
--- a/arch/ppc/8260_io/Kconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-#
-# CPM2 Communication options
-#
-
-menu "CPM2 Options"
- depends on CPM2
-
-config SCC_ENET
- bool "CPM SCC Ethernet"
- depends on NET_ETHERNET
-
-#
-# CONFIG_FEC_ENET is only used to get netdevices to call our init
-# function. Any combination of FCC1,2,3 are supported.
-#
-config FEC_ENET
- bool "FCC Ethernet"
- depends on NET_ETHERNET
-
-config FCC1_ENET
- bool "Ethernet on FCC1"
- depends on FEC_ENET
- help
- Use CPM2 fast Ethernet controller 1 to drive Ethernet (default).
-
-config FCC2_ENET
- bool "Ethernet on FCC2"
- depends on FEC_ENET
- help
- Use CPM2 fast Ethernet controller 2 to drive Ethernet.
-
-config FCC3_ENET
- bool "Ethernet on FCC3"
- depends on FEC_ENET
- help
- Use CPM2 fast Ethernet controller 3 to drive Ethernet.
-
-config USE_MDIO
- bool "Use MDIO for PHY configuration"
- depends on FEC_ENET
-
-choice
- prompt "Type of PHY"
- depends on 8260 && USE_MDIO
- default FCC_GENERIC_PHY
-
-config FCC_LXT970
- bool "LXT970"
-
-config FCC_LXT971
- bool "LXT971"
-
-config FCC_QS6612
- bool "QS6612"
-
-config FCC_DM9131
- bool "DM9131"
-
-config FCC_DM9161
- bool "DM9161"
-
-config FCC_GENERIC_PHY
- bool "Generic"
-endchoice
-endmenu
diff --git a/arch/ppc/8260_io/Makefile b/arch/ppc/8260_io/Makefile
deleted file mode 100644
index 971f292..0000000
--- a/arch/ppc/8260_io/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Makefile for the linux ppc-specific parts of comm processor (v2)
-#
-
-obj-$(CONFIG_FEC_ENET) += fcc_enet.o
-obj-$(CONFIG_SCC_ENET) += enet.o
diff --git a/arch/ppc/8260_io/enet.c b/arch/ppc/8260_io/enet.c
deleted file mode 100644
index ec1defe..0000000
--- a/arch/ppc/8260_io/enet.c
+++ /dev/null
@@ -1,865 +0,0 @@
-/*
- * Ethernet driver for Motorola MPC8260.
- * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
- * Copyright (c) 2000 MontaVista Software Inc. (source@mvista.com)
- * 2.3.99 Updates
- *
- * I copied this from the 8xx CPM Ethernet driver, so follow the
- * credits back through that.
- *
- * This version of the driver is somewhat selectable for the different
- * processor/board combinations. It works for the boards I know about
- * now, and should be easily modified to include others. Some of the
- * configuration information is contained in <asm/cpm1.h> and the
- * remainder is here.
- *
- * Buffer descriptors are kept in the CPM dual port RAM, and the frame
- * buffers are in the host memory.
- *
- * Right now, I am very watseful with the buffers. I allocate memory
- * pages and then divide them into 2K frame buffers. This way I know I
- * have buffers large enough to hold one frame within one buffer descriptor.
- * Once I get this working, I will use 64 or 128 byte CPM buffers, which
- * will be much more memory efficient and will easily handle lots of
- * small packets.
- *
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/bitops.h>
-
-#include <asm/immap_cpm2.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8260.h>
-#include <asm/uaccess.h>
-#include <asm/cpm2.h>
-#include <asm/irq.h>
-
-/*
- * Theory of Operation
- *
- * The MPC8260 CPM performs the Ethernet processing on an SCC. It can use
- * an aribtrary number of buffers on byte boundaries, but must have at
- * least two receive buffers to prevent constant overrun conditions.
- *
- * The buffer descriptors are allocated from the CPM dual port memory
- * with the data buffers allocated from host memory, just like all other
- * serial communication protocols. The host memory buffers are allocated
- * from the free page pool, and then divided into smaller receive and
- * transmit buffers. The size of the buffers should be a power of two,
- * since that nicely divides the page. This creates a ring buffer
- * structure similar to the LANCE and other controllers.
- *
- * Like the LANCE driver:
- * The driver runs as two independent, single-threaded flows of control. One
- * is the send-packet routine, which enforces single-threaded use by the
- * cep->tx_busy flag. The other thread is the interrupt handler, which is
- * single threaded by the hardware and other software.
- */
-
-/* The transmitter timeout
- */
-#define TX_TIMEOUT (2*HZ)
-
-/* The number of Tx and Rx buffers. These are allocated from the page
- * pool. The code may assume these are power of two, so it is best
- * to keep them that size.
- * We don't need to allocate pages for the transmitter. We just use
- * the skbuffer directly.
- */
-#define CPM_ENET_RX_PAGES 4
-#define CPM_ENET_RX_FRSIZE 2048
-#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
-#define TX_RING_SIZE 8 /* Must be power of two */
-#define TX_RING_MOD_MASK 7 /* for this to work */
-
-/* The CPM stores dest/src/type, data, and checksum for receive packets.
- */
-#define PKT_MAXBUF_SIZE 1518
-#define PKT_MINBUF_SIZE 64
-#define PKT_MAXBLR_SIZE 1520
-
-/* The CPM buffer descriptors track the ring buffers. The rx_bd_base and
- * tx_bd_base always point to the base of the buffer descriptors. The
- * cur_rx and cur_tx point to the currently available buffer.
- * The dirty_tx tracks the current buffer that is being sent by the
- * controller. The cur_tx and dirty_tx are equal under both completely
- * empty and completely full conditions. The empty/ready indicator in
- * the buffer descriptor determines the actual condition.
- */
-struct scc_enet_private {
- /* The saved address of a sent-in-place packet/buffer, for skfree(). */
- struct sk_buff* tx_skbuff[TX_RING_SIZE];
- ushort skb_cur;
- ushort skb_dirty;
-
- /* CPM dual port RAM relative addresses.
- */
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
- cbd_t *dirty_tx; /* The ring entries to be free()ed. */
- scc_t *sccp;
- struct net_device_stats stats;
- uint tx_full;
- spinlock_t lock;
-};
-
-static int scc_enet_open(struct net_device *dev);
-static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
-static int scc_enet_rx(struct net_device *dev);
-static irqreturn_t scc_enet_interrupt(int irq, void *dev_id);
-static int scc_enet_close(struct net_device *dev);
-static struct net_device_stats *scc_enet_get_stats(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
-
-/* These will be configurable for the SCC choice.
-*/
-#define CPM_ENET_BLOCK CPM_CR_SCC1_SBLOCK
-#define CPM_ENET_PAGE CPM_CR_SCC1_PAGE
-#define PROFF_ENET PROFF_SCC1
-#define SCC_ENET 0
-#define SIU_INT_ENET SIU_INT_SCC1
-
-/* These are both board and SCC dependent....
-*/
-#define PD_ENET_RXD ((uint)0x00000001)
-#define PD_ENET_TXD ((uint)0x00000002)
-#define PD_ENET_TENA ((uint)0x00000004)
-#define PC_ENET_RENA ((uint)0x00020000)
-#define PC_ENET_CLSN ((uint)0x00000004)
-#define PC_ENET_TXCLK ((uint)0x00000800)
-#define PC_ENET_RXCLK ((uint)0x00000400)
-#define CMX_CLK_ROUTE ((uint)0x25000000)
-#define CMX_CLK_MASK ((uint)0xff000000)
-
-/* Specific to a board.
-*/
-#define PC_EST8260_ENET_LOOPBACK ((uint)0x80000000)
-#define PC_EST8260_ENET_SQE ((uint)0x40000000)
-#define PC_EST8260_ENET_NOTFD ((uint)0x20000000)
-
-static int
-scc_enet_open(struct net_device *dev)
-{
-
- /* I should reset the ring buffers here, but I don't yet know
- * a simple way to do that.
- */
- netif_start_queue(dev);
- return 0; /* Always succeed */
-}
-
-static int
-scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
- volatile cbd_t *bdp;
-
-
- /* Fill in a Tx ring entry */
- bdp = cep->cur_tx;
-
-#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- /* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since cep->tx_full should be set.
- */
- printk("%s: tx queue full!.\n", dev->name);
- return 1;
- }
-#endif
-
- /* Clear all of the status flags.
- */
- bdp->cbd_sc &= ~BD_ENET_TX_STATS;
-
- /* If the frame is short, tell CPM to pad it.
- */
- if (skb->len <= ETH_ZLEN)
- bdp->cbd_sc |= BD_ENET_TX_PAD;
- else
- bdp->cbd_sc &= ~BD_ENET_TX_PAD;
-
- /* Set buffer length and buffer pointer.
- */
- bdp->cbd_datlen = skb->len;
- bdp->cbd_bufaddr = __pa(skb->data);
-
- /* Save skb pointer.
- */
- cep->tx_skbuff[cep->skb_cur] = skb;
-
- cep->stats.tx_bytes += skb->len;
- cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
-
- spin_lock_irq(&cep->lock);
-
- /* Send it on its way. Tell CPM its ready, interrupt when done,
- * its the last BD of the frame, and to put the CRC on the end.
- */
- bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);
-
- dev->trans_start = jiffies;
-
- /* If this was the last BD in the ring, start at the beginning again.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- netif_stop_queue(dev);
- cep->tx_full = 1;
- }
-
- cep->cur_tx = (cbd_t *)bdp;
-
- spin_unlock_irq(&cep->lock);
-
- return 0;
-}
-
-static void
-scc_enet_timeout(struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
-
- printk("%s: transmit timed out.\n", dev->name);
- cep->stats.tx_errors++;
-#ifndef final_version
- {
- int i;
- cbd_t *bdp;
- printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
- cep->cur_tx, cep->tx_full ? " (full)" : "",
- cep->cur_rx);
- bdp = cep->tx_bd_base;
- printk(" Tx @base %p :\n", bdp);
- for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp = cep->rx_bd_base;
- printk(" Rx @base %p :\n", bdp);
- for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- }
-#endif
- if (!cep->tx_full)
- netif_wake_queue(dev);
-}
-
-/* The interrupt handler.
- * This is called from the CPM handler, not the MPC core interrupt.
- */
-static irqreturn_t
-scc_enet_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- volatile struct scc_enet_private *cep;
- volatile cbd_t *bdp;
- ushort int_events;
- int must_restart;
-
- cep = dev->priv;
-
- /* Get the interrupt events that caused us to be here.
- */
- int_events = cep->sccp->scc_scce;
- cep->sccp->scc_scce = int_events;
- must_restart = 0;
-
- /* Handle receive event in its own function.
- */
- if (int_events & SCCE_ENET_RXF)
- scc_enet_rx(dev_id);
-
- /* Check for a transmit error. The manual is a little unclear
- * about this, so the debug code until I get it figured out. It
- * appears that if TXE is set, then TXB is not set. However,
- * if carrier sense is lost during frame transmission, the TXE
- * bit is set, "and continues the buffer transmission normally."
- * I don't know if "normally" implies TXB is set when the buffer
- * descriptor is closed.....trial and error :-).
- */
-
- /* Transmit OK, or non-fatal error. Update the buffer descriptors.
- */
- if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) {
- spin_lock(&cep->lock);
- bdp = cep->dirty_tx;
- while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
- if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
- break;
-
- if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
- cep->stats.tx_heartbeat_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
- cep->stats.tx_window_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
- cep->stats.tx_aborted_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
- cep->stats.tx_fifo_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
- cep->stats.tx_carrier_errors++;
-
-
- /* No heartbeat or Lost carrier are not really bad errors.
- * The others require a restart transmit command.
- */
- if (bdp->cbd_sc &
- (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
- must_restart = 1;
- cep->stats.tx_errors++;
- }
-
- cep->stats.tx_packets++;
-
- /* Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (bdp->cbd_sc & BD_ENET_TX_DEF)
- cep->stats.collisions++;
-
- /* Free the sk buffer associated with this last transmit.
- */
- dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
- cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;
-
- /* Update pointer to next buffer descriptor to be transmitted.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- /* I don't know if we can be held off from processing these
- * interrupts for more than one frame time. I really hope
- * not. In such a case, we would now want to check the
- * currently available BD (cur_tx) and determine if any
- * buffers between the dirty_tx and cur_tx have also been
- * sent. We would want to process anything in between that
- * does not have BD_ENET_TX_READY set.
- */
-
- /* Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (cep->tx_full) {
- cep->tx_full = 0;
- if (netif_queue_stopped(dev)) {
- netif_wake_queue(dev);
- }
- }
-
- cep->dirty_tx = (cbd_t *)bdp;
- }
-
- if (must_restart) {
- volatile cpm_cpm2_t *cp;
-
- /* Some transmit errors cause the transmitter to shut
- * down. We now issue a restart transmit. Since the
- * errors close the BD and update the pointers, the restart
- * _should_ pick up without having to reset any of our
- * pointers either.
- */
-
- cp = cpmp;
- cp->cp_cpcr =
- mk_cr_cmd(CPM_ENET_PAGE, CPM_ENET_BLOCK, 0,
- CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- }
- spin_unlock(&cep->lock);
- }
-
- /* Check for receive busy, i.e. packets coming but no place to
- * put them. This "can't happen" because the receive interrupt
- * is tossing previous frames.
- */
- if (int_events & SCCE_ENET_BSY) {
- cep->stats.rx_dropped++;
- printk("SCC ENET: BSY can't happen.\n");
- }
-
- return IRQ_HANDLED;
-}
-
-/* During a receive, the cur_rx points to the current incoming buffer.
- * When we update through the ring, if the next incoming buffer has
- * not been given to the system, we just set the empty indicator,
- * effectively tossing the packet.
- */
-static int
-scc_enet_rx(struct net_device *dev)
-{
- struct scc_enet_private *cep;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
- ushort pkt_len;
-
- cep = dev->priv;
-
- /* First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = cep->cur_rx;
-
-for (;;) {
- if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
- break;
-
-#ifndef final_version
- /* Since we have allocated space to hold a complete frame, both
- * the first and last indicators should be set.
- */
- if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
- (BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
- printk("CPM ENET: rcv is not first+last\n");
-#endif
-
- /* Frame too long or too short.
- */
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
- cep->stats.rx_length_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
- cep->stats.rx_frame_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
- cep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
- cep->stats.rx_crc_errors++;
-
- /* Report late collisions as a frame error.
- * On this error, the BD is closed, but we don't know what we
- * have in the buffer. So, just drop this frame on the floor.
- */
- if (bdp->cbd_sc & BD_ENET_RX_CL) {
- cep->stats.rx_frame_errors++;
- }
- else {
-
- /* Process the incoming frame.
- */
- cep->stats.rx_packets++;
- pkt_len = bdp->cbd_datlen;
- cep->stats.rx_bytes += pkt_len;
-
- /* This does 16 byte alignment, much more than we need.
- * The packet length includes FCS, but we don't want to
- * include that when passing upstream as it messes up
- * bridging applications.
- */
- skb = dev_alloc_skb(pkt_len-4);
-
- if (skb == NULL) {
- printk("%s: Memory squeeze, dropping packet.\n", dev->name);
- cep->stats.rx_dropped++;
- }
- else {
- skb_put(skb,pkt_len-4); /* Make room */
- skb_copy_to_linear_data(skb,
- (unsigned char *)__va(bdp->cbd_bufaddr),
- pkt_len-4);
- skb->protocol=eth_type_trans(skb,dev);
- netif_rx(skb);
- }
- }
-
- /* Clear the status flags for this buffer.
- */
- bdp->cbd_sc &= ~BD_ENET_RX_STATS;
-
- /* Mark the buffer empty.
- */
- bdp->cbd_sc |= BD_ENET_RX_EMPTY;
-
- /* Update BD pointer to next entry.
- */
- if (bdp->cbd_sc & BD_ENET_RX_WRAP)
- bdp = cep->rx_bd_base;
- else
- bdp++;
-
- }
- cep->cur_rx = (cbd_t *)bdp;
-
- return 0;
-}
-
-static int
-scc_enet_close(struct net_device *dev)
-{
- /* Don't know what to do yet.
- */
- netif_stop_queue(dev);
-
- return 0;
-}
-
-static struct net_device_stats *scc_enet_get_stats(struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
-
- return &cep->stats;
-}
-
-/* Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-
-static void set_multicast_list(struct net_device *dev)
-{
- struct scc_enet_private *cep;
- struct dev_mc_list *dmi;
- u_char *mcptr, *tdptr;
- volatile scc_enet_t *ep;
- int i, j;
- cep = (struct scc_enet_private *)dev->priv;
-
- /* Get pointer to SCC area in parameter RAM.
- */
- ep = (scc_enet_t *)dev->base_addr;
-
- if (dev->flags&IFF_PROMISC) {
-
- /* Log any net taps. */
- printk("%s: Promiscuous mode enabled.\n", dev->name);
- cep->sccp->scc_psmr |= SCC_PSMR_PRO;
- } else {
-
- cep->sccp->scc_psmr &= ~SCC_PSMR_PRO;
-
- if (dev->flags & IFF_ALLMULTI) {
- /* Catch all multicast addresses, so set the
- * filter to all 1's.
- */
- ep->sen_gaddr1 = 0xffff;
- ep->sen_gaddr2 = 0xffff;
- ep->sen_gaddr3 = 0xffff;
- ep->sen_gaddr4 = 0xffff;
- }
- else {
- /* Clear filter and add the addresses in the list.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
-
- dmi = dev->mc_list;
-
- for (i=0; i<dev->mc_count; i++) {
-
- /* Only support group multicast for now.
- */
- if (!(dmi->dmi_addr[0] & 1))
- continue;
-
- /* The address in dmi_addr is LSB first,
- * and taddr is MSB first. We have to
- * copy bytes MSB first from dmi_addr.
- */
- mcptr = (u_char *)dmi->dmi_addr + 5;
- tdptr = (u_char *)&ep->sen_taddrh;
- for (j=0; j<6; j++)
- *tdptr++ = *mcptr--;
-
- /* Ask CPM to run CRC and set bit in
- * filter mask.
- */
- cpmp->cp_cpcr = mk_cr_cmd(CPM_ENET_PAGE,
- CPM_ENET_BLOCK, 0,
- CPM_CR_SET_GADDR) | CPM_CR_FLG;
- /* this delay is necessary here -- Cort */
- udelay(10);
- while (cpmp->cp_cpcr & CPM_CR_FLG);
- }
- }
- }
-}
-
-/* Initialize the CPM Ethernet on SCC.
- */
-static int __init scc_enet_init(void)
-{
- struct net_device *dev;
- struct scc_enet_private *cep;
- int i, j, err;
- uint dp_offset;
- unsigned char *eap;
- unsigned long mem_addr;
- bd_t *bd;
- volatile cbd_t *bdp;
- volatile cpm_cpm2_t *cp;
- volatile scc_t *sccp;
- volatile scc_enet_t *ep;
- volatile cpm2_map_t *immap;
- volatile iop_cpm2_t *io;
-
- cp = cpmp; /* Get pointer to Communication Processor */
-
- immap = (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal registers */
- io = &immap->im_ioport;
-
- bd = (bd_t *)__res;
-
- /* Create an Ethernet device instance.
- */
- dev = alloc_etherdev(sizeof(*cep));
- if (!dev)
- return -ENOMEM;
-
- cep = dev->priv;
- spin_lock_init(&cep->lock);
-
- /* Get pointer to SCC area in parameter RAM.
- */
- ep = (scc_enet_t *)(&immap->im_dprambase[PROFF_ENET]);
-
- /* And another to the SCC register area.
- */
- sccp = (volatile scc_t *)(&immap->im_scc[SCC_ENET]);
- cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */
-
- /* Disable receive and transmit in case someone left it running.
- */
- sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- /* Configure port C and D pins for SCC Ethernet. This
- * won't work for all SCC possibilities....it will be
- * board/port specific.
- */
- io->iop_pparc |=
- (PC_ENET_RENA | PC_ENET_CLSN | PC_ENET_TXCLK | PC_ENET_RXCLK);
- io->iop_pdirc &=
- ~(PC_ENET_RENA | PC_ENET_CLSN | PC_ENET_TXCLK | PC_ENET_RXCLK);
- io->iop_psorc &=
- ~(PC_ENET_RENA | PC_ENET_TXCLK | PC_ENET_RXCLK);
- io->iop_psorc |= PC_ENET_CLSN;
-
- io->iop_ppard |= (PD_ENET_RXD | PD_ENET_TXD | PD_ENET_TENA);
- io->iop_pdird |= (PD_ENET_TXD | PD_ENET_TENA);
- io->iop_pdird &= ~PD_ENET_RXD;
- io->iop_psord |= PD_ENET_TXD;
- io->iop_psord &= ~(PD_ENET_RXD | PD_ENET_TENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- immap->im_cpmux.cmx_scr &= ~CMX_CLK_MASK;
- immap->im_cpmux.cmx_scr |= CMX_CLK_ROUTE;
-
- /* Allocate space for the buffer descriptors in the DP ram.
- * These are relative offsets in the DP ram address space.
- * Initialize base addresses for the buffer descriptors.
- */
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE, 8);
- ep->sen_genscc.scc_rbase = dp_offset;
- cep->rx_bd_base = (cbd_t *)cpm_dpram_addr(dp_offset);
-
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE, 8);
- ep->sen_genscc.scc_tbase = dp_offset;
- cep->tx_bd_base = (cbd_t *)cpm_dpram_addr(dp_offset);
-
- cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
- cep->cur_rx = cep->rx_bd_base;
-
- ep->sen_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
- ep->sen_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;
-
- /* Set maximum bytes per receive buffer.
- * This appears to be an Ethernet frame size, not the buffer
- * fragment size. It must be a multiple of four.
- */
- ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;
-
- /* Set CRC preset and mask.
- */
- ep->sen_cpres = 0xffffffff;
- ep->sen_cmask = 0xdebb20e3;
-
- ep->sen_crcec = 0; /* CRC Error counter */
- ep->sen_alec = 0; /* alignment error counter */
- ep->sen_disfc = 0; /* discard frame counter */
-
- ep->sen_pads = 0x8888; /* Tx short frame pad character */
- ep->sen_retlim = 15; /* Retry limit threshold */
-
- ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
- ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
-
- ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */
- ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */
-
- /* Clear hash tables.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
- ep->sen_iaddr1 = 0;
- ep->sen_iaddr2 = 0;
- ep->sen_iaddr3 = 0;
- ep->sen_iaddr4 = 0;
-
- /* Set Ethernet station address.
- *
- * This is supplied in the board information structure, so we
- * copy that into the controller.
- */
- eap = (unsigned char *)&(ep->sen_paddrh);
- for (i=5; i>=0; i--)
- *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
-
- ep->sen_pper = 0; /* 'cause the book says so */
- ep->sen_taddrl = 0; /* temp address (LSB) */
- ep->sen_taddrm = 0;
- ep->sen_taddrh = 0; /* temp address (MSB) */
-
- /* Now allocate the host memory pages and initialize the
- * buffer descriptors.
- */
- bdp = cep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- bdp = cep->rx_bd_base;
- for (i=0; i<CPM_ENET_RX_PAGES; i++) {
-
- /* Allocate a page.
- */
- mem_addr = __get_free_page(GFP_KERNEL);
- /* BUG: no check for failure */
-
- /* Initialize the BD for every fragment in the page.
- */
- for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
- bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
- bdp->cbd_bufaddr = __pa(mem_addr);
- mem_addr += CPM_ENET_RX_FRSIZE;
- bdp++;
- }
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* Let's re-initialize the channel now. We have to do it later
- * than the manual describes because we have just now finished
- * the BD initialization.
- */
- cpmp->cp_cpcr = mk_cr_cmd(CPM_ENET_PAGE, CPM_ENET_BLOCK, 0,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- cep->skb_cur = cep->skb_dirty = 0;
-
- sccp->scc_scce = 0xffff; /* Clear any pending events */
-
- /* Enable interrupts for transmit error, complete frame
- * received, and any transmit buffer we have also set the
- * interrupt flag.
- */
- sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
-
- /* Install our interrupt handler.
- */
- request_irq(SIU_INT_ENET, scc_enet_interrupt, 0, "enet", dev);
- /* BUG: no check for failure */
-
- /* Set GSMR_H to enable all normal operating modes.
- * Set GSMR_L to enable Ethernet to MC68160.
- */
- sccp->scc_gsmrh = 0;
- sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);
-
- /* Set sync/delimiters.
- */
- sccp->scc_dsr = 0xd555;
-
- /* Set processing mode. Use Ethernet CRC, catch broadcast, and
- * start frame search 22 bit times after RENA.
- */
- sccp->scc_psmr = (SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
-
- /* It is now OK to enable the Ethernet transmitter.
- * Unfortunately, there are board implementation differences here.
- */
- io->iop_pparc &= ~(PC_EST8260_ENET_LOOPBACK |
- PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
- io->iop_psorc &= ~(PC_EST8260_ENET_LOOPBACK |
- PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
- io->iop_pdirc |= (PC_EST8260_ENET_LOOPBACK |
- PC_EST8260_ENET_SQE | PC_EST8260_ENET_NOTFD);
- io->iop_pdatc &= ~(PC_EST8260_ENET_LOOPBACK | PC_EST8260_ENET_SQE);
- io->iop_pdatc |= PC_EST8260_ENET_NOTFD;
-
- dev->base_addr = (unsigned long)ep;
-
- /* The CPM Ethernet specific entries in the device structure. */
- dev->open = scc_enet_open;
- dev->hard_start_xmit = scc_enet_start_xmit;
- dev->tx_timeout = scc_enet_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = scc_enet_close;
- dev->get_stats = scc_enet_get_stats;
- dev->set_multicast_list = set_multicast_list;
-
- /* And last, enable the transmit and receive processing.
- */
- sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- printk("%s: SCC ENET Version 0.1, ", dev->name);
- for (i=0; i<5; i++)
- printk("%02x:", dev->dev_addr[i]);
- printk("%02x\n", dev->dev_addr[5]);
-
- return 0;
-}
-
-module_init(scc_enet_init);
diff --git a/arch/ppc/8260_io/fcc_enet.c b/arch/ppc/8260_io/fcc_enet.c
deleted file mode 100644
index d38b57e..0000000
--- a/arch/ppc/8260_io/fcc_enet.c
+++ /dev/null
@@ -1,2379 +0,0 @@
-/*
- * Fast Ethernet Controller (FCC) driver for Motorola MPC8260.
- * Copyright (c) 2000 MontaVista Software, Inc. Dan Malek (dmalek@jlc.net)
- *
- * This version of the driver is a combination of the 8xx fec and
- * 8260 SCC Ethernet drivers. This version has some additional
- * configuration options, which should probably be moved out of
- * here. This driver currently works for the EST SBC8260,
- * SBS Diablo/BCM, Embedded Planet RPX6, TQM8260, and others.
- *
- * Right now, I am very watseful with the buffers. I allocate memory
- * pages and then divide them into 2K frame buffers. This way I know I
- * have buffers large enough to hold one frame within one buffer descriptor.
- * Once I get this working, I will use 64 or 128 byte CPM buffers, which
- * will be much more memory efficient and will easily handle lots of
- * small packets. Since this is a cache coherent processor and CPM,
- * I could also preallocate SKB's and use them directly on the interface.
- *
- * 2004-12 Leo Li (leoli@freescale.com)
- * - Rework the FCC clock configuration part, make it easier to configure.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/mii.h>
-#include <linux/workqueue.h>
-#include <linux/bitops.h>
-
-#include <asm/immap_cpm2.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8260.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/signal.h>
-
-/* We can't use the PHY interrupt if we aren't using MDIO. */
-#if !defined(CONFIG_USE_MDIO)
-#undef PHY_INTERRUPT
-#endif
-
-/* If we have a PHY interrupt, we will advertise both full-duplex and half-
- * duplex capabilities. If we don't have a PHY interrupt, then we will only
- * advertise half-duplex capabilities.
- */
-#define MII_ADVERTISE_HALF (ADVERTISE_100HALF | ADVERTISE_10HALF | \
- ADVERTISE_CSMA)
-#define MII_ADVERTISE_ALL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
- MII_ADVERTISE_HALF)
-#ifdef PHY_INTERRUPT
-#define MII_ADVERTISE_DEFAULT MII_ADVERTISE_ALL
-#else
-#define MII_ADVERTISE_DEFAULT MII_ADVERTISE_HALF
-#endif
-#include <asm/cpm2.h>
-
-/* The transmitter timeout
- */
-#define TX_TIMEOUT (2*HZ)
-
-#ifdef CONFIG_USE_MDIO
-/* Forward declarations of some structures to support different PHYs */
-
-typedef struct {
- uint mii_data;
- void (*funct)(uint mii_reg, struct net_device *dev);
-} phy_cmd_t;
-
-typedef struct {
- uint id;
- char *name;
-
- const phy_cmd_t *config;
- const phy_cmd_t *startup;
- const phy_cmd_t *ack_int;
- const phy_cmd_t *shutdown;
-} phy_info_t;
-
-/* values for phy_status */
-
-#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
-#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
-#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
-#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
-#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
-#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
-#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
-
-#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
-#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
-#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
-#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
-#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
-#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
-#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
-#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
-#endif /* CONFIG_USE_MDIO */
-
-/* The number of Tx and Rx buffers. These are allocated from the page
- * pool. The code may assume these are power of two, so it is best
- * to keep them that size.
- * We don't need to allocate pages for the transmitter. We just use
- * the skbuffer directly.
- */
-#define FCC_ENET_RX_PAGES 16
-#define FCC_ENET_RX_FRSIZE 2048
-#define FCC_ENET_RX_FRPPG (PAGE_SIZE / FCC_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (FCC_ENET_RX_FRPPG * FCC_ENET_RX_PAGES)
-#define TX_RING_SIZE 16 /* Must be power of two */
-#define TX_RING_MOD_MASK 15 /* for this to work */
-
-/* The FCC stores dest/src/type, data, and checksum for receive packets.
- * size includes support for VLAN
- */
-#define PKT_MAXBUF_SIZE 1522
-#define PKT_MINBUF_SIZE 64
-
-/* Maximum input DMA size. Must be a should(?) be a multiple of 4.
- * size includes support for VLAN
- */
-#define PKT_MAXDMA_SIZE 1524
-
-/* Maximum input buffer size. Must be a multiple of 32.
-*/
-#define PKT_MAXBLR_SIZE 1536
-
-static int fcc_enet_open(struct net_device *dev);
-static int fcc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
-static int fcc_enet_rx(struct net_device *dev);
-static irqreturn_t fcc_enet_interrupt(int irq, void *dev_id);
-static int fcc_enet_close(struct net_device *dev);
-static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev);
-/* static void set_multicast_list(struct net_device *dev); */
-static void fcc_restart(struct net_device *dev, int duplex);
-static void fcc_stop(struct net_device *dev);
-static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
-
-/* These will be configurable for the FCC choice.
- * Multiple ports can be configured. There is little choice among the
- * I/O pins to the PHY, except the clocks. We will need some board
- * dependent clock selection.
- * Why in the hell did I put these inside #ifdef's? I dunno, maybe to
- * help show what pins are used for each device.
- */
-
-/* Since the CLK setting changes greatly from board to board, I changed
- * it to a easy way. You just need to specify which CLK number to use.
- * Note that only limited choices can be make on each port.
- */
-
-/* FCC1 Clock Source Configuration. There are board specific.
- Can only choose from CLK9-12 */
-#ifdef CONFIG_SBC82xx
-#define F1_RXCLK 9
-#define F1_TXCLK 10
-#else
-#define F1_RXCLK 12
-#define F1_TXCLK 11
-#endif
-
-/* FCC2 Clock Source Configuration. There are board specific.
- Can only choose from CLK13-16 */
-#define F2_RXCLK 13
-#define F2_TXCLK 14
-
-/* FCC3 Clock Source Configuration. There are board specific.
- Can only choose from CLK13-16 */
-#define F3_RXCLK 15
-#define F3_TXCLK 16
-
-/* Automatically generates register configurations */
-#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */
-
-#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */
-#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */
-#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */
-#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */
-#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */
-#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */
-
-#define PC_F1RXCLK PC_CLK(F1_RXCLK)
-#define PC_F1TXCLK PC_CLK(F1_TXCLK)
-#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK))
-#define CMX1_CLK_MASK ((uint)0xff000000)
-
-#define PC_F2RXCLK PC_CLK(F2_RXCLK)
-#define PC_F2TXCLK PC_CLK(F2_TXCLK)
-#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK))
-#define CMX2_CLK_MASK ((uint)0x00ff0000)
-
-#define PC_F3RXCLK PC_CLK(F3_RXCLK)
-#define PC_F3TXCLK PC_CLK(F3_TXCLK)
-#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK))
-#define CMX3_CLK_MASK ((uint)0x0000ff00)
-
-
-/* I/O Pin assignment for FCC1. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PA1_COL ((uint)0x00000001)
-#define PA1_CRS ((uint)0x00000002)
-#define PA1_TXER ((uint)0x00000004)
-#define PA1_TXEN ((uint)0x00000008)
-#define PA1_RXDV ((uint)0x00000010)
-#define PA1_RXER ((uint)0x00000020)
-#define PA1_TXDAT ((uint)0x00003c00)
-#define PA1_RXDAT ((uint)0x0003c000)
-#define PA1_PSORA_BOUT (PA1_RXDAT | PA1_TXDAT)
-#define PA1_PSORA_BIN (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
- PA1_RXDV | PA1_RXER)
-#define PA1_DIRA_BOUT (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
-#define PA1_DIRA_BIN (PA1_TXDAT | PA1_TXEN | PA1_TXER)
-
-
-/* I/O Pin assignment for FCC2. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PB2_TXER ((uint)0x00000001)
-#define PB2_RXDV ((uint)0x00000002)
-#define PB2_TXEN ((uint)0x00000004)
-#define PB2_RXER ((uint)0x00000008)
-#define PB2_COL ((uint)0x00000010)
-#define PB2_CRS ((uint)0x00000020)
-#define PB2_TXDAT ((uint)0x000003c0)
-#define PB2_RXDAT ((uint)0x00003c00)
-#define PB2_PSORB_BOUT (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
- PB2_RXER | PB2_RXDV | PB2_TXER)
-#define PB2_PSORB_BIN (PB2_TXEN)
-#define PB2_DIRB_BOUT (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
-#define PB2_DIRB_BIN (PB2_TXDAT | PB2_TXEN | PB2_TXER)
-
-
-/* I/O Pin assignment for FCC3. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PB3_RXDV ((uint)0x00004000)
-#define PB3_RXER ((uint)0x00008000)
-#define PB3_TXER ((uint)0x00010000)
-#define PB3_TXEN ((uint)0x00020000)
-#define PB3_COL ((uint)0x00040000)
-#define PB3_CRS ((uint)0x00080000)
-#ifndef CONFIG_RPX8260
-#define PB3_TXDAT ((uint)0x0f000000)
-#define PC3_TXDAT ((uint)0x00000000)
-#else
-#define PB3_TXDAT ((uint)0x0f000000)
-#define PC3_TXDAT 0
-#endif
-#define PB3_RXDAT ((uint)0x00f00000)
-#define PB3_PSORB_BOUT (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
- PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN)
-#define PB3_PSORB_BIN (0)
-#define PB3_DIRB_BOUT (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
-#define PB3_DIRB_BIN (PB3_TXDAT | PB3_TXEN | PB3_TXER)
-
-#define PC3_PSORC_BOUT (PC3_TXDAT)
-#define PC3_PSORC_BIN (0)
-#define PC3_DIRC_BOUT (0)
-#define PC3_DIRC_BIN (PC3_TXDAT)
-
-
-/* MII status/control serial interface.
-*/
-#if defined(CONFIG_RPX8260)
-/* The EP8260 doesn't use Port C for MDIO */
-#define PC_MDIO ((uint)0x00000000)
-#define PC_MDCK ((uint)0x00000000)
-#elif defined(CONFIG_TQM8260)
-/* TQM8260 has MDIO and MDCK on PC30 and PC31 respectively */
-#define PC_MDIO ((uint)0x00000002)
-#define PC_MDCK ((uint)0x00000001)
-#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260)
-#define PC_MDIO ((uint)0x00400000)
-#define PC_MDCK ((uint)0x00200000)
-#else
-#define PC_MDIO ((uint)0x00000004)
-#define PC_MDCK ((uint)0x00000020)
-#endif
-
-#if defined(CONFIG_USE_MDIO) && (!defined(PC_MDIO) || !defined(PC_MDCK))
-#error "Must define PC_MDIO and PC_MDCK if using MDIO"
-#endif
-
-/* PHY addresses */
-/* default to dynamic config of phy addresses */
-#define FCC1_PHY_ADDR 0
-#ifdef CONFIG_PQ2FADS
-#define FCC2_PHY_ADDR 0
-#else
-#define FCC2_PHY_ADDR 2
-#endif
-#define FCC3_PHY_ADDR 3
-
-/* A table of information for supporting FCCs. This does two things.
- * First, we know how many FCCs we have and they are always externally
- * numbered from zero. Second, it holds control register and I/O
- * information that could be different among board designs.
- */
-typedef struct fcc_info {
- uint fc_fccnum;
- uint fc_phyaddr;
- uint fc_cpmblock;
- uint fc_cpmpage;
- uint fc_proff;
- uint fc_interrupt;
- uint fc_trxclocks;
- uint fc_clockroute;
- uint fc_clockmask;
- uint fc_mdio;
- uint fc_mdck;
-} fcc_info_t;
-
-static fcc_info_t fcc_ports[] = {
-#ifdef CONFIG_FCC1_ENET
- { 0, FCC1_PHY_ADDR, CPM_CR_FCC1_SBLOCK, CPM_CR_FCC1_PAGE, PROFF_FCC1, SIU_INT_FCC1,
- (PC_F1RXCLK | PC_F1TXCLK), CMX1_CLK_ROUTE, CMX1_CLK_MASK,
- PC_MDIO, PC_MDCK },
-#endif
-#ifdef CONFIG_FCC2_ENET
- { 1, FCC2_PHY_ADDR, CPM_CR_FCC2_SBLOCK, CPM_CR_FCC2_PAGE, PROFF_FCC2, SIU_INT_FCC2,
- (PC_F2RXCLK | PC_F2TXCLK), CMX2_CLK_ROUTE, CMX2_CLK_MASK,
- PC_MDIO, PC_MDCK },
-#endif
-#ifdef CONFIG_FCC3_ENET
- { 2, FCC3_PHY_ADDR, CPM_CR_FCC3_SBLOCK, CPM_CR_FCC3_PAGE, PROFF_FCC3, SIU_INT_FCC3,
- (PC_F3RXCLK | PC_F3TXCLK), CMX3_CLK_ROUTE, CMX3_CLK_MASK,
- PC_MDIO, PC_MDCK },
-#endif
-};
-
-/* The FCC buffer descriptors track the ring buffers. The rx_bd_base and
- * tx_bd_base always point to the base of the buffer descriptors. The
- * cur_rx and cur_tx point to the currently available buffer.
- * The dirty_tx tracks the current buffer that is being sent by the
- * controller. The cur_tx and dirty_tx are equal under both completely
- * empty and completely full conditions. The empty/ready indicator in
- * the buffer descriptor determines the actual condition.
- */
-struct fcc_enet_private {
- /* The saved address of a sent-in-place packet/buffer, for skfree(). */
- struct sk_buff* tx_skbuff[TX_RING_SIZE];
- ushort skb_cur;
- ushort skb_dirty;
-
- /* CPM dual port RAM relative addresses.
- */
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
- cbd_t *dirty_tx; /* The ring entries to be free()ed. */
- volatile fcc_t *fccp;
- volatile fcc_enet_t *ep;
- struct net_device_stats stats;
- uint tx_free;
- spinlock_t lock;
-
-#ifdef CONFIG_USE_MDIO
- uint phy_id;
- uint phy_id_done;
- uint phy_status;
- phy_info_t *phy;
- struct work_struct phy_relink;
- struct work_struct phy_display_config;
- struct net_device *dev;
-
- uint sequence_done;
-
- uint phy_addr;
-#endif /* CONFIG_USE_MDIO */
-
- int link;
- int old_link;
- int full_duplex;
-
- fcc_info_t *fip;
-};
-
-static void init_fcc_shutdown(fcc_info_t *fip, struct fcc_enet_private *cep,
- volatile cpm2_map_t *immap);
-static void init_fcc_startup(fcc_info_t *fip, struct net_device *dev);
-static void init_fcc_ioports(fcc_info_t *fip, volatile iop_cpm2_t *io,
- volatile cpm2_map_t *immap);
-static void init_fcc_param(fcc_info_t *fip, struct net_device *dev,
- volatile cpm2_map_t *immap);
-
-#ifdef CONFIG_USE_MDIO
-static int mii_queue(struct net_device *dev, int request, void (*func)(uint, struct net_device *));
-static uint mii_send_receive(fcc_info_t *fip, uint cmd);
-static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c);
-
-/* Make MII read/write commands for the FCC.
-*/
-#define mk_mii_read(REG) (0x60020000 | (((REG) & 0x1f) << 18))
-#define mk_mii_write(REG, VAL) (0x50020000 | (((REG) & 0x1f) << 18) | \
- ((VAL) & 0xffff))
-#define mk_mii_end 0
-#endif /* CONFIG_USE_MDIO */
-
-
-static int
-fcc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;
- volatile cbd_t *bdp;
-
- /* Fill in a Tx ring entry */
- bdp = cep->cur_tx;
-
-#ifndef final_version
- if (!cep->tx_free || (bdp->cbd_sc & BD_ENET_TX_READY)) {
- /* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since the tx queue should be stopped.
- */
- printk("%s: tx queue full!.\n", dev->name);
- return 1;
- }
-#endif
-
- /* Clear all of the status flags. */
- bdp->cbd_sc &= ~BD_ENET_TX_STATS;
-
- /* If the frame is short, tell CPM to pad it. */
- if (skb->len <= ETH_ZLEN)
- bdp->cbd_sc |= BD_ENET_TX_PAD;
- else
- bdp->cbd_sc &= ~BD_ENET_TX_PAD;
-
- /* Set buffer length and buffer pointer. */
- bdp->cbd_datlen = skb->len;
- bdp->cbd_bufaddr = __pa(skb->data);
-
- spin_lock_irq(&cep->lock);
-
- /* Save skb pointer. */
- cep->tx_skbuff[cep->skb_cur] = skb;
-
- cep->stats.tx_bytes += skb->len;
- cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
-
- /* Send it on its way. Tell CPM its ready, interrupt when done,
- * its the last BD of the frame, and to put the CRC on the end.
- */
- bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);
-
-#if 0
- /* Errata says don't do this. */
- cep->fccp->fcc_ftodr = 0x8000;
-#endif
- dev->trans_start = jiffies;
-
- /* If this was the last BD in the ring, start at the beginning again. */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- if (!--cep->tx_free)
- netif_stop_queue(dev);
-
- cep->cur_tx = (cbd_t *)bdp;
-
- spin_unlock_irq(&cep->lock);
-
- return 0;
-}
-
-
-static void
-fcc_enet_timeout(struct net_device *dev)
-{
- struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;
-
- printk("%s: transmit timed out.\n", dev->name);
- cep->stats.tx_errors++;
-#ifndef final_version
- {
- int i;
- cbd_t *bdp;
- printk(" Ring data dump: cur_tx %p tx_free %d cur_rx %p.\n",
- cep->cur_tx, cep->tx_free,
- cep->cur_rx);
- bdp = cep->tx_bd_base;
- printk(" Tx @base %p :\n", bdp);
- for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp = cep->rx_bd_base;
- printk(" Rx @base %p :\n", bdp);
- for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- }
-#endif
- if (cep->tx_free)
- netif_wake_queue(dev);
-}
-
-/* The interrupt handler. */
-static irqreturn_t
-fcc_enet_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- volatile struct fcc_enet_private *cep;
- volatile cbd_t *bdp;
- ushort int_events;
- int must_restart;
-
- cep = dev->priv;
-
- /* Get the interrupt events that caused us to be here.
- */
- int_events = cep->fccp->fcc_fcce;
- cep->fccp->fcc_fcce = (int_events & cep->fccp->fcc_fccm);
- must_restart = 0;
-
-#ifdef PHY_INTERRUPT
- /* We have to be careful here to make sure that we aren't
- * interrupted by a PHY interrupt.
- */
- disable_irq_nosync(PHY_INTERRUPT);
-#endif
-
- /* Handle receive event in its own function.
- */
- if (int_events & FCC_ENET_RXF)
- fcc_enet_rx(dev_id);
-
- /* Check for a transmit error. The manual is a little unclear
- * about this, so the debug code until I get it figured out. It
- * appears that if TXE is set, then TXB is not set. However,
- * if carrier sense is lost during frame transmission, the TXE
- * bit is set, "and continues the buffer transmission normally."
- * I don't know if "normally" implies TXB is set when the buffer
- * descriptor is closed.....trial and error :-).
- */
-
- /* Transmit OK, or non-fatal error. Update the buffer descriptors.
- */
- if (int_events & (FCC_ENET_TXE | FCC_ENET_TXB)) {
- spin_lock(&cep->lock);
- bdp = cep->dirty_tx;
- while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
- if (cep->tx_free == TX_RING_SIZE)
- break;
-
- if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
- cep->stats.tx_heartbeat_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
- cep->stats.tx_window_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
- cep->stats.tx_aborted_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
- cep->stats.tx_fifo_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
- cep->stats.tx_carrier_errors++;
-
-
- /* No heartbeat or Lost carrier are not really bad errors.
- * The others require a restart transmit command.
- */
- if (bdp->cbd_sc &
- (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
- must_restart = 1;
- cep->stats.tx_errors++;
- }
-
- cep->stats.tx_packets++;
-
- /* Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (bdp->cbd_sc & BD_ENET_TX_DEF)
- cep->stats.collisions++;
-
- /* Free the sk buffer associated with this last transmit. */
- dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
- cep->tx_skbuff[cep->skb_dirty] = NULL;
- cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;
-
- /* Update pointer to next buffer descriptor to be transmitted. */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- /* I don't know if we can be held off from processing these
- * interrupts for more than one frame time. I really hope
- * not. In such a case, we would now want to check the
- * currently available BD (cur_tx) and determine if any
- * buffers between the dirty_tx and cur_tx have also been
- * sent. We would want to process anything in between that
- * does not have BD_ENET_TX_READY set.
- */
-
- /* Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (!cep->tx_free++) {
- if (netif_queue_stopped(dev)) {
- netif_wake_queue(dev);
- }
- }
-
- cep->dirty_tx = (cbd_t *)bdp;
- }
-
- if (must_restart) {
- volatile cpm_cpm2_t *cp;
-
- /* Some transmit errors cause the transmitter to shut
- * down. We now issue a restart transmit. Since the
- * errors close the BD and update the pointers, the restart
- * _should_ pick up without having to reset any of our
- * pointers either. Also, To workaround 8260 device erratum
- * CPM37, we must disable and then re-enable the transmitter
- * following a Late Collision, Underrun, or Retry Limit error.
- */
- cep->fccp->fcc_gfmr &= ~FCC_GFMR_ENT;
- udelay(10); /* wait a few microseconds just on principle */
- cep->fccp->fcc_gfmr |= FCC_GFMR_ENT;
-
- cp = cpmp;
- cp->cp_cpcr =
- mk_cr_cmd(cep->fip->fc_cpmpage, cep->fip->fc_cpmblock,
- 0x0c, CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- }
- spin_unlock(&cep->lock);
- }
-
- /* Check for receive busy, i.e. packets coming but no place to
- * put them.
- */
- if (int_events & FCC_ENET_BSY) {
- cep->fccp->fcc_fcce = FCC_ENET_BSY;
- cep->stats.rx_dropped++;
- }
-
-#ifdef PHY_INTERRUPT
- enable_irq(PHY_INTERRUPT);
-#endif
- return IRQ_HANDLED;
-}
-
-/* During a receive, the cur_rx points to the current incoming buffer.
- * When we update through the ring, if the next incoming buffer has
- * not been given to the system, we just set the empty indicator,
- * effectively tossing the packet.
- */
-static int
-fcc_enet_rx(struct net_device *dev)
-{
- struct fcc_enet_private *cep;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
- ushort pkt_len;
-
- cep = dev->priv;
-
- /* First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = cep->cur_rx;
-
-for (;;) {
- if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
- break;
-
-#ifndef final_version
- /* Since we have allocated space to hold a complete frame, both
- * the first and last indicators should be set.
- */
- if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
- (BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
- printk("CPM ENET: rcv is not first+last\n");
-#endif
-
- /* Frame too long or too short. */
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
- cep->stats.rx_length_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
- cep->stats.rx_frame_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
- cep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
- cep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CL) /* Late Collision */
- cep->stats.rx_frame_errors++;
-
- if (!(bdp->cbd_sc &
- (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | BD_ENET_RX_CR
- | BD_ENET_RX_OV | BD_ENET_RX_CL)))
- {
- /* Process the incoming frame. */
- cep->stats.rx_packets++;
-
- /* Remove the FCS from the packet length. */
- pkt_len = bdp->cbd_datlen - 4;
- cep->stats.rx_bytes += pkt_len;
-
- /* This does 16 byte alignment, much more than we need. */
- skb = dev_alloc_skb(pkt_len);
-
- if (skb == NULL) {
- printk("%s: Memory squeeze, dropping packet.\n", dev->name);
- cep->stats.rx_dropped++;
- }
- else {
- skb_put(skb,pkt_len); /* Make room */
- skb_copy_to_linear_data(skb,
- (unsigned char *)__va(bdp->cbd_bufaddr),
- pkt_len);
- skb->protocol=eth_type_trans(skb,dev);
- netif_rx(skb);
- }
- }
-
- /* Clear the status flags for this buffer. */
- bdp->cbd_sc &= ~BD_ENET_RX_STATS;
-
- /* Mark the buffer empty. */
- bdp->cbd_sc |= BD_ENET_RX_EMPTY;
-
- /* Update BD pointer to next entry. */
- if (bdp->cbd_sc & BD_ENET_RX_WRAP)
- bdp = cep->rx_bd_base;
- else
- bdp++;
-
- }
- cep->cur_rx = (cbd_t *)bdp;
-
- return 0;
-}
-
-static int
-fcc_enet_close(struct net_device *dev)
-{
-#ifdef CONFIG_USE_MDIO
- struct fcc_enet_private *fep = dev->priv;
-#endif
-
- netif_stop_queue(dev);
- fcc_stop(dev);
-#ifdef CONFIG_USE_MDIO
- if (fep->phy)
- mii_do_cmd(dev, fep->phy->shutdown);
-#endif
-
- return 0;
-}
-
-static struct net_device_stats *fcc_enet_get_stats(struct net_device *dev)
-{
- struct fcc_enet_private *cep = (struct fcc_enet_private *)dev->priv;
-
- return &cep->stats;
-}
-
-#ifdef CONFIG_USE_MDIO
-
-/* NOTE: Most of the following comes from the FEC driver for 860. The
- * overall structure of MII code has been retained (as it's proved stable
- * and well-tested), but actual transfer requests are processed "at once"
- * instead of being queued (there's no interrupt-driven MII transfer
- * mechanism, one has to toggle the data/clock bits manually).
- */
-static int
-mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *))
-{
- struct fcc_enet_private *fep;
- int retval, tmp;
-
- /* Add PHY address to register command. */
- fep = dev->priv;
- regval |= fep->phy_addr << 23;
-
- retval = 0;
-
- tmp = mii_send_receive(fep->fip, regval);
- if (func)
- func(tmp, dev);
-
- return retval;
-}
-
-static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c)
-{
- int k;
-
- if(!c)
- return;
-
- for(k = 0; (c+k)->mii_data != mk_mii_end; k++)
- mii_queue(dev, (c+k)->mii_data, (c+k)->funct);
-}
-
-static void mii_parse_sr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);
-
- if (mii_reg & BMSR_LSTATUS)
- s |= PHY_STAT_LINK;
- if (mii_reg & BMSR_RFAULT)
- s |= PHY_STAT_FAULT;
- if (mii_reg & BMSR_ANEGCOMPLETE)
- s |= PHY_STAT_ANC;
-
- fep->phy_status = s;
-}
-
-static void mii_parse_cr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP);
-
- if (mii_reg & BMCR_ANENABLE)
- s |= PHY_CONF_ANE;
- if (mii_reg & BMCR_LOOPBACK)
- s |= PHY_CONF_LOOP;
-
- fep->phy_status = s;
-}
-
-static void mii_parse_anar(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_CONF_SPMASK);
-
- if (mii_reg & ADVERTISE_10HALF)
- s |= PHY_CONF_10HDX;
- if (mii_reg & ADVERTISE_10FULL)
- s |= PHY_CONF_10FDX;
- if (mii_reg & ADVERTISE_100HALF)
- s |= PHY_CONF_100HDX;
- if (mii_reg & ADVERTISE_100FULL)
- s |= PHY_CONF_100FDX;
-
- fep->phy_status = s;
-}
-
-/* ------------------------------------------------------------------------- */
-/* Generic PHY support. Should work for all PHYs, but does not support link
- * change interrupts.
- */
-#ifdef CONFIG_FCC_GENERIC_PHY
-
-static phy_info_t phy_info_generic = {
- 0x00000000, /* 0-->match any PHY */
- "GENERIC",
-
- (const phy_cmd_t []) { /* config */
- /* advertise only half-duplex capabilities */
- { mk_mii_write(MII_ADVERTISE, MII_ADVERTISE_HALF),
- mii_parse_anar },
-
- /* enable auto-negotiation */
- { mk_mii_write(MII_BMCR, BMCR_ANENABLE), mii_parse_cr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup */
- /* restart auto-negotiation */
- { mk_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART),
- NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* We don't actually use the ack_int table with a generic
- * PHY, but putting a reference to mii_parse_sr here keeps
- * us from getting a compiler warning about unused static
- * functions in the case where we only compile in generic
- * PHY support.
- */
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown */
- { mk_mii_end, }
- },
-};
-#endif /* ifdef CONFIG_FCC_GENERIC_PHY */
-
-/* ------------------------------------------------------------------------- */
-/* The Level one LXT970 is used by many boards */
-
-#ifdef CONFIG_FCC_LXT970
-
-#define MII_LXT970_MIRROR 16 /* Mirror register */
-#define MII_LXT970_IER 17 /* Interrupt Enable Register */
-#define MII_LXT970_ISR 18 /* Interrupt Status Register */
-#define MII_LXT970_CONFIG 19 /* Configuration Register */
-#define MII_LXT970_CSR 20 /* Chip Status Register */
-
-static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- if (mii_reg & 0x0800) {
- if (mii_reg & 0x1000)
- s |= PHY_STAT_100FDX;
- else
- s |= PHY_STAT_100HDX;
- } else {
- if (mii_reg & 0x1000)
- s |= PHY_STAT_10FDX;
- else
- s |= PHY_STAT_10HDX;
- }
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_lxt970 = {
- 0x07810000,
- "LXT970",
-
- (const phy_cmd_t []) { /* config */
-#if 0
-// { mk_mii_write(MII_ADVERTISE, 0x0021), NULL },
-
- /* Set default operation of 100-TX....for some reason
- * some of these bits are set on power up, which is wrong.
- */
- { mk_mii_write(MII_LXT970_CONFIG, 0), NULL },
-#endif
- { mk_mii_read(MII_BMCR), mii_parse_cr },
- { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
- { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* read SR and ISR to acknowledge */
-
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_read(MII_LXT970_ISR), NULL },
-
- /* find out the current status */
-
- { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_LXT970_IER, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_LXT970 */
-
-/* ------------------------------------------------------------------------- */
-/* The Level one LXT971 is used on some of my custom boards */
-
-#ifdef CONFIG_FCC_LXT971
-
-/* register definitions for the 971 */
-
-#define MII_LXT971_PCR 16 /* Port Control Register */
-#define MII_LXT971_SR2 17 /* Status Register 2 */
-#define MII_LXT971_IER 18 /* Interrupt Enable Register */
-#define MII_LXT971_ISR 19 /* Interrupt Status Register */
-#define MII_LXT971_LCR 20 /* LED Control Register */
-#define MII_LXT971_TCR 30 /* Transmit Control Register */
-
-/*
- * I had some nice ideas of running the MDIO faster...
- * The 971 should support 8MHz and I tried it, but things acted really
- * weird, so 2.5 MHz ought to be enough for anyone...
- */
-
-static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- if (mii_reg & 0x4000) {
- if (mii_reg & 0x0200)
- s |= PHY_STAT_100FDX;
- else
- s |= PHY_STAT_100HDX;
- } else {
- if (mii_reg & 0x0200)
- s |= PHY_STAT_10FDX;
- else
- s |= PHY_STAT_10HDX;
- }
- if (mii_reg & 0x0008)
- s |= PHY_STAT_FAULT;
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_lxt971 = {
- 0x0001378e,
- "LXT971",
-
- (const phy_cmd_t []) { /* config */
- /* configure link capabilities to advertise */
- { mk_mii_write(MII_ADVERTISE, MII_ADVERTISE_DEFAULT),
- mii_parse_anar },
-
- /* enable auto-negotiation */
- { mk_mii_write(MII_BMCR, BMCR_ANENABLE), mii_parse_cr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
-
- /* restart auto-negotiation */
- { mk_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART),
- NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* find out the current status */
- { mk_mii_read(MII_BMSR), NULL },
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
-
- /* we only need to read ISR to acknowledge */
- { mk_mii_read(MII_LXT971_ISR), NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_LXT971_IER, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FCC_LXT971 */
-
-/* ------------------------------------------------------------------------- */
-/* The Quality Semiconductor QS6612 is used on the RPX CLLF */
-
-#ifdef CONFIG_FCC_QS6612
-
-/* register definitions */
-
-#define MII_QS6612_MCR 17 /* Mode Control Register */
-#define MII_QS6612_FTR 27 /* Factory Test Register */
-#define MII_QS6612_MCO 28 /* Misc. Control Register */
-#define MII_QS6612_ISR 29 /* Interrupt Source Register */
-#define MII_QS6612_IMR 30 /* Interrupt Mask Register */
-#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */
-
-static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- switch((mii_reg >> 2) & 7) {
- case 1: s |= PHY_STAT_10HDX; break;
- case 2: s |= PHY_STAT_100HDX; break;
- case 5: s |= PHY_STAT_10FDX; break;
- case 6: s |= PHY_STAT_100FDX; break;
- }
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_qs6612 = {
- 0x00181440,
- "QS6612",
-
- (const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_ADVERTISE, 0x061), NULL }, /* 10 Mbps */
-
- /* The PHY powers up isolated on the RPX,
- * so send a command to allow operation.
- */
-
- { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL },
-
- /* parse cr and anar to get some info */
-
- { mk_mii_read(MII_BMCR), mii_parse_cr },
- { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
- { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
-
- /* we need to read ISR, SR and ANER to acknowledge */
-
- { mk_mii_read(MII_QS6612_ISR), NULL },
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_read(MII_EXPANSION), NULL },
-
- /* read pcr to get info */
-
- { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-
-#endif /* CONFIG_FEC_QS6612 */
-
-
-/* ------------------------------------------------------------------------- */
-/* The Davicom DM9131 is used on the HYMOD board */
-
-#ifdef CONFIG_FCC_DM9131
-
-/* register definitions */
-
-#define MII_DM9131_ACR 16 /* Aux. Config Register */
-#define MII_DM9131_ACSR 17 /* Aux. Config/Status Register */
-#define MII_DM9131_10TCSR 18 /* 10BaseT Config/Status Reg. */
-#define MII_DM9131_INTR 21 /* Interrupt Register */
-#define MII_DM9131_RECR 22 /* Receive Error Counter Reg. */
-#define MII_DM9131_DISCR 23 /* Disconnect Counter Register */
-
-static void mii_parse_dm9131_acsr(uint mii_reg, struct net_device *dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- switch ((mii_reg >> 12) & 0xf) {
- case 1: s |= PHY_STAT_10HDX; break;
- case 2: s |= PHY_STAT_10FDX; break;
- case 4: s |= PHY_STAT_100HDX; break;
- case 8: s |= PHY_STAT_100FDX; break;
- }
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_dm9131 = {
- 0x00181b80,
- "DM9131",
-
- (const phy_cmd_t []) { /* config */
- /* parse cr and anar to get some info */
- { mk_mii_read(MII_BMCR), mii_parse_cr },
- { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_DM9131_INTR, 0x0002), NULL },
- { mk_mii_write(MII_BMCR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
-
- /* we need to read INTR, SR and ANER to acknowledge */
-
- { mk_mii_read(MII_DM9131_INTR), NULL },
- { mk_mii_read(MII_BMSR), mii_parse_sr },
- { mk_mii_read(MII_EXPANSION), NULL },
-
- /* read acsr to get info */
-
- { mk_mii_read(MII_DM9131_ACSR), mii_parse_dm9131_acsr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_DM9131_INTR, 0x0f00), NULL },
- { mk_mii_end, }
- },
-};
-
-
-#endif /* CONFIG_FEC_DM9131 */
-#ifdef CONFIG_FCC_DM9161
-/* ------------------------------------------------------------------------- */
-/* DM9161 Control register values */
-#define MIIM_DM9161_CR_STOP 0x0400
-#define MIIM_DM9161_CR_RSTAN 0x1200
-
-#define MIIM_DM9161_SCR 0x10
-#define MIIM_DM9161_SCR_INIT 0x0610
-
-/* DM9161 Specified Configuration and Status Register */
-#define MIIM_DM9161_SCSR 0x11
-#define MIIM_DM9161_SCSR_100F 0x8000
-#define MIIM_DM9161_SCSR_100H 0x4000
-#define MIIM_DM9161_SCSR_10F 0x2000
-#define MIIM_DM9161_SCSR_10H 0x1000
-/* DM9161 10BT register */
-#define MIIM_DM9161_10BTCSR 0x12
-#define MIIM_DM9161_10BTCSR_INIT 0x7800
-/* DM9161 Interrupt Register */
-#define MIIM_DM9161_INTR 0x15
-#define MIIM_DM9161_INTR_PEND 0x8000
-#define MIIM_DM9161_INTR_DPLX_MASK 0x0800
-#define MIIM_DM9161_INTR_SPD_MASK 0x0400
-#define MIIM_DM9161_INTR_LINK_MASK 0x0200
-#define MIIM_DM9161_INTR_MASK 0x0100
-#define MIIM_DM9161_INTR_DPLX_CHANGE 0x0010
-#define MIIM_DM9161_INTR_SPD_CHANGE 0x0008
-#define MIIM_DM9161_INTR_LINK_CHANGE 0x0004
-#define MIIM_DM9161_INTR_INIT 0x0000
-#define MIIM_DM9161_INTR_STOP \
-(MIIM_DM9161_INTR_DPLX_MASK | MIIM_DM9161_INTR_SPD_MASK \
- | MIIM_DM9161_INTR_LINK_MASK | MIIM_DM9161_INTR_MASK)
-
-static void mii_parse_dm9161_sr(uint mii_reg, struct net_device * dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint regstat, timeout=0xffff;
-
- while(!(mii_reg & 0x0020) && timeout--)
- {
- regstat=mk_mii_read(MII_BMSR);
- regstat |= fep->phy_addr <<23;
- mii_reg = mii_send_receive(fep->fip,regstat);
- }
-
- mii_parse_sr(mii_reg, dev);
-}
-
-static void mii_parse_dm9161_scsr(uint mii_reg, struct net_device * dev)
-{
- volatile struct fcc_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
- switch((mii_reg >>12) & 0xf) {
- case 1:
- {
- s |= PHY_STAT_10HDX;
- printk("10BaseT Half Duplex\n");
- break;
- }
- case 2:
- {
- s |= PHY_STAT_10FDX;
- printk("10BaseT Full Duplex\n");
- break;
- }
- case 4:
- {
- s |= PHY_STAT_100HDX;
- printk("100BaseT Half Duplex\n");
- break;
- }
- case 8:
- {
- s |= PHY_STAT_100FDX;
- printk("100BaseT Full Duplex\n");
- break;
- }
- }
-
- fep->phy_status = s;
-
-}
-
-static void mii_dm9161_wait(uint mii_reg, struct net_device *dev)
-{
- int timeout = HZ;
-
- /* Davicom takes a bit to come up after a reset,
- * so wait here for a bit */
- schedule_timeout_uninterruptible(timeout);
-}
-
-static phy_info_t phy_info_dm9161 = {
- 0x00181b88,
- "Davicom DM9161E",
- (const phy_cmd_t[]) { /* config */
- { mk_mii_write(MII_BMCR, MIIM_DM9161_CR_STOP), NULL},
- /* Do not bypass the scrambler/descrambler */
- { mk_mii_write(MIIM_DM9161_SCR, MIIM_DM9161_SCR_INIT), NULL},
- /* Configure 10BTCSR register */
- { mk_mii_write(MIIM_DM9161_10BTCSR, MIIM_DM9161_10BTCSR_INIT),NULL},
- /* Configure some basic stuff */
- { mk_mii_write(MII_BMCR, 0x1000), NULL},
- { mk_mii_read(MII_BMCR), mii_parse_cr },
- { mk_mii_read(MII_ADVERTISE), mii_parse_anar },
- { mk_mii_end,}
- },
- (const phy_cmd_t[]) { /* startup */
- /* Restart Auto Negotiation */
- { mk_mii_write(MII_BMCR, MIIM_DM9161_CR_RSTAN), NULL},
- /* Status is read once to clear old link state */
- { mk_mii_read(MII_BMSR), mii_dm9161_wait},
- /* Auto-negotiate */
- { mk_mii_read(MII_BMSR), mii_parse_dm9161_sr},
- /* Read the status */
- { mk_mii_read(MIIM_DM9161_SCSR), mii_parse_dm9161_scsr},
- /* Clear any pending interrupts */
- { mk_mii_read(MIIM_DM9161_INTR), NULL},
- /* Enable Interrupts */
- { mk_mii_write(MIIM_DM9161_INTR, MIIM_DM9161_INTR_INIT), NULL},
- { mk_mii_end,}
- },
- (const phy_cmd_t[]) { /* ack_int */
- { mk_mii_read(MIIM_DM9161_INTR), NULL},
-#if 0
- { mk_mii_read(MII_BMSR), NULL},
- { mk_mii_read(MII_BMSR), mii_parse_dm9161_sr},
- { mk_mii_read(MIIM_DM9161_SCSR), mii_parse_dm9161_scsr},
-#endif
- { mk_mii_end,}
- },
- (const phy_cmd_t[]) { /* shutdown */
- { mk_mii_read(MIIM_DM9161_INTR),NULL},
- { mk_mii_write(MIIM_DM9161_INTR, MIIM_DM9161_INTR_STOP), NULL},
- { mk_mii_end,}
- },
-};
-#endif /* CONFIG_FCC_DM9161 */
-
-static phy_info_t *phy_info[] = {
-
-#ifdef CONFIG_FCC_LXT970
- &phy_info_lxt970,
-#endif /* CONFIG_FEC_LXT970 */
-
-#ifdef CONFIG_FCC_LXT971
- &phy_info_lxt971,
-#endif /* CONFIG_FEC_LXT971 */
-
-#ifdef CONFIG_FCC_QS6612
- &phy_info_qs6612,
-#endif /* CONFIG_FEC_QS6612 */
-
-#ifdef CONFIG_FCC_DM9131
- &phy_info_dm9131,
-#endif /* CONFIG_FEC_DM9131 */
-
-#ifdef CONFIG_FCC_DM9161
- &phy_info_dm9161,
-#endif /* CONFIG_FCC_DM9161 */
-
-#ifdef CONFIG_FCC_GENERIC_PHY
- /* Generic PHY support. This must be the last PHY in the table.
- * It will be used to support any PHY that doesn't match a previous
- * entry in the table.
- */
- &phy_info_generic,
-#endif /* CONFIG_FCC_GENERIC_PHY */
-
- NULL
-};
-
-static void mii_display_status(struct work_struct *work)
-{
- volatile struct fcc_enet_private *fep =
- container_of(work, struct fcc_enet_private, phy_relink);
- struct net_device *dev = fep->dev;
- uint s = fep->phy_status;
-
- if (!fep->link && !fep->old_link) {
- /* Link is still down - don't print anything */
- return;
- }
-
- printk("%s: status: ", dev->name);
-
- if (!fep->link) {
- printk("link down");
- } else {
- printk("link up");
-
- switch(s & PHY_STAT_SPMASK) {
- case PHY_STAT_100FDX: printk(", 100 Mbps Full Duplex"); break;
- case PHY_STAT_100HDX: printk(", 100 Mbps Half Duplex"); break;
- case PHY_STAT_10FDX: printk(", 10 Mbps Full Duplex"); break;
- case PHY_STAT_10HDX: printk(", 10 Mbps Half Duplex"); break;
- default:
- printk(", Unknown speed/duplex");
- }
-
- if (s & PHY_STAT_ANC)
- printk(", auto-negotiation complete");
- }
-
- if (s & PHY_STAT_FAULT)
- printk(", remote fault");
-
- printk(".\n");
-}
-
-static void mii_display_config(struct work_struct *work)
-{
- volatile struct fcc_enet_private *fep =
- container_of(work, struct fcc_enet_private,
- phy_display_config);
- struct net_device *dev = fep->dev;
- uint s = fep->phy_status;
-
- printk("%s: config: auto-negotiation ", dev->name);
-
- if (s & PHY_CONF_ANE)
- printk("on");
- else
- printk("off");
-
- if (s & PHY_CONF_100FDX)
- printk(", 100FDX");
- if (s & PHY_CONF_100HDX)
- printk(", 100HDX");
- if (s & PHY_CONF_10FDX)
- printk(", 10FDX");
- if (s & PHY_CONF_10HDX)
- printk(", 10HDX");
- if (!(s & PHY_CONF_SPMASK))
- printk(", No speed/duplex selected?");
-
- if (s & PHY_CONF_LOOP)
- printk(", loopback enabled");
-
- printk(".\n");
-
- fep->sequence_done = 1;
-}
-
-static void mii_relink(struct net_device *dev)
-{
- struct fcc_enet_private *fep = dev->priv;
- int duplex = 0;
-
- fep->old_link = fep->link;
- fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
-
-#ifdef MDIO_DEBUG
- printk(" mii_relink: link=%d\n", fep->link);
-#endif
-
- if (fep->link) {
- if (fep->phy_status
- & (PHY_STAT_100FDX | PHY_STAT_10FDX))
- duplex = 1;
- fcc_restart(dev, duplex);
-#ifdef MDIO_DEBUG
- printk(" mii_relink: duplex=%d\n", duplex);
-#endif
- }
-}
-
-static void mii_queue_relink(uint mii_reg, struct net_device *dev)
-{
- struct fcc_enet_private *fep = dev->priv;
-
- mii_relink(dev);
-
- schedule_work(&fep->phy_relink);
-}
-
-static void mii_queue_config(uint mii_reg, struct net_device *dev)
-{
- struct fcc_enet_private *fep = dev->priv;
-
- schedule_work(&fep->phy_display_config);
-}
-
-phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_BMCR), mii_queue_relink },
- { mk_mii_end, } };
-phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_BMCR), mii_queue_config },
- { mk_mii_end, } };
-
-
-/* Read remainder of PHY ID.
-*/
-static void
-mii_discover_phy3(uint mii_reg, struct net_device *dev)
-{
- struct fcc_enet_private *fep;
- int i;
-
- fep = dev->priv;
- printk("mii_reg: %08x\n", mii_reg);
- fep->phy_id |= (mii_reg & 0xffff);
-
- for(i = 0; phy_info[i]; i++)
- if((phy_info[i]->id == (fep->phy_id >> 4)) || !phy_info[i]->id)
- break;
-
- if(!phy_info[i])
- panic("%s: PHY id 0x%08x is not supported!\n",
- dev->name, fep->phy_id);
-
- fep->phy = phy_info[i];
- fep->phy_id_done = 1;
-
- printk("%s: Phy @ 0x%x, type %s (0x%08x)\n",
- dev->name, fep->phy_addr, fep->phy->name, fep->phy_id);
-}
-
-/* Scan all of the MII PHY addresses looking for someone to respond
- * with a valid ID. This usually happens quickly.
- */
-static void
-mii_discover_phy(uint mii_reg, struct net_device *dev)
-{
- struct fcc_enet_private *fep;
- uint phytype;
-
- fep = dev->priv;
-
- if ((phytype = (mii_reg & 0xffff)) != 0xffff) {
-
- /* Got first part of ID, now get remainder. */
- fep->phy_id = phytype << 16;
- mii_queue(dev, mk_mii_read(MII_PHYSID2), mii_discover_phy3);
- } else {
- fep->phy_addr++;
- if (fep->phy_addr < 32) {
- mii_queue(dev, mk_mii_read(MII_PHYSID1),
- mii_discover_phy);
- } else {
- printk("fec: No PHY device found.\n");
- }
- }
-}
-#endif /* CONFIG_USE_MDIO */
-
-#ifdef PHY_INTERRUPT
-/* This interrupt occurs when the PHY detects a link change. */
-static irqreturn_t
-mii_link_interrupt(int irq, void * dev_id)
-{
- struct net_device *dev = dev_id;
- struct fcc_enet_private *fep = dev->priv;
- fcc_info_t *fip = fep->fip;
-
- if (fep->phy) {
- /* We don't want to be interrupted by an FCC
- * interrupt here.
- */
- disable_irq_nosync(fip->fc_interrupt);
-
- mii_do_cmd(dev, fep->phy->ack_int);
- /* restart and display status */
- mii_do_cmd(dev, phy_cmd_relink);
-
- enable_irq(fip->fc_interrupt);
- }
- return IRQ_HANDLED;
-}
-#endif /* ifdef PHY_INTERRUPT */
-
-#if 0 /* This should be fixed someday */
-/* Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-static void
-set_multicast_list(struct net_device *dev)
-{
- struct fcc_enet_private *cep;
- struct dev_mc_list *dmi;
- u_char *mcptr, *tdptr;
- volatile fcc_enet_t *ep;
- int i, j;
-
- cep = (struct fcc_enet_private *)dev->priv;
-
-return;
- /* Get pointer to FCC area in parameter RAM.
- */
- ep = (fcc_enet_t *)dev->base_addr;
-
- if (dev->flags&IFF_PROMISC) {
-
- /* Log any net taps. */
- printk("%s: Promiscuous mode enabled.\n", dev->name);
- cep->fccp->fcc_fpsmr |= FCC_PSMR_PRO;
- } else {
-
- cep->fccp->fcc_fpsmr &= ~FCC_PSMR_PRO;
-
- if (dev->flags & IFF_ALLMULTI) {
- /* Catch all multicast addresses, so set the
- * filter to all 1's.
- */
- ep->fen_gaddrh = 0xffffffff;
- ep->fen_gaddrl = 0xffffffff;
- }
- else {
- /* Clear filter and add the addresses in the list.
- */
- ep->fen_gaddrh = 0;
- ep->fen_gaddrl = 0;
-
- dmi = dev->mc_list;
-
- for (i=0; i<dev->mc_count; i++, dmi = dmi->next) {
-
- /* Only support group multicast for now.
- */
- if (!(dmi->dmi_addr[0] & 1))
- continue;
-
- /* The address in dmi_addr is LSB first,
- * and taddr is MSB first. We have to
- * copy bytes MSB first from dmi_addr.
- */
- mcptr = (u_char *)dmi->dmi_addr + 5;
- tdptr = (u_char *)&ep->fen_taddrh;
- for (j=0; j<6; j++)
- *tdptr++ = *mcptr--;
-
- /* Ask CPM to run CRC and set bit in
- * filter mask.
- */
- cpmp->cp_cpcr = mk_cr_cmd(cep->fip->fc_cpmpage,
- cep->fip->fc_cpmblock, 0x0c,
- CPM_CR_SET_GADDR) | CPM_CR_FLG;
- udelay(10);
- while (cpmp->cp_cpcr & CPM_CR_FLG);
- }
- }
- }
-}
-#endif /* if 0 */
-
-
-/* Set the individual MAC address.
- */
-int fcc_enet_set_mac_address(struct net_device *dev, void *p)
-{
- struct sockaddr *addr= (struct sockaddr *) p;
- struct fcc_enet_private *cep;
- volatile fcc_enet_t *ep;
- unsigned char *eap;
- int i;
-
- cep = (struct fcc_enet_private *)(dev->priv);
- ep = cep->ep;
-
- if (netif_running(dev))
- return -EBUSY;
-
- memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
-
- eap = (unsigned char *) &(ep->fen_paddrh);
- for (i=5; i>=0; i--)
- *eap++ = addr->sa_data[i];
-
- return 0;
-}
-
-
-/* Initialize the CPM Ethernet on FCC.
- */
-static int __init fec_enet_init(void)
-{
- struct net_device *dev;
- struct fcc_enet_private *cep;
- fcc_info_t *fip;
- int i, np, err;
- volatile cpm2_map_t *immap;
- volatile iop_cpm2_t *io;
-
- immap = (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal registers */
- io = &immap->im_ioport;
-
- np = sizeof(fcc_ports) / sizeof(fcc_info_t);
- fip = fcc_ports;
-
- while (np-- > 0) {
- /* Create an Ethernet device instance.
- */
- dev = alloc_etherdev(sizeof(*cep));
- if (!dev)
- return -ENOMEM;
-
- cep = dev->priv;
- spin_lock_init(&cep->lock);
- cep->fip = fip;
-
- init_fcc_shutdown(fip, cep, immap);
- init_fcc_ioports(fip, io, immap);
- init_fcc_param(fip, dev, immap);
-
- dev->base_addr = (unsigned long)(cep->ep);
-
- /* The CPM Ethernet specific entries in the device
- * structure.
- */
- dev->open = fcc_enet_open;
- dev->hard_start_xmit = fcc_enet_start_xmit;
- dev->tx_timeout = fcc_enet_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = fcc_enet_close;
- dev->get_stats = fcc_enet_get_stats;
- /* dev->set_multicast_list = set_multicast_list; */
- dev->set_mac_address = fcc_enet_set_mac_address;
-
- init_fcc_startup(fip, dev);
-
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- printk("%s: FCC ENET Version 0.3, ", dev->name);
- for (i=0; i<5; i++)
- printk("%02x:", dev->dev_addr[i]);
- printk("%02x\n", dev->dev_addr[5]);
-
-#ifdef CONFIG_USE_MDIO
- /* Queue up command to detect the PHY and initialize the
- * remainder of the interface.
- */
- cep->phy_id_done = 0;
- cep->phy_addr = fip->fc_phyaddr;
- mii_queue(dev, mk_mii_read(MII_PHYSID1), mii_discover_phy);
- INIT_WORK(&cep->phy_relink, mii_display_status);
- INIT_WORK(&cep->phy_display_config, mii_display_config);
- cep->dev = dev;
-#endif /* CONFIG_USE_MDIO */
-
- fip++;
- }
-
- return 0;
-}
-module_init(fec_enet_init);
-
-/* Make sure the device is shut down during initialization.
-*/
-static void __init
-init_fcc_shutdown(fcc_info_t *fip, struct fcc_enet_private *cep,
- volatile cpm2_map_t *immap)
-{
- volatile fcc_enet_t *ep;
- volatile fcc_t *fccp;
-
- /* Get pointer to FCC area in parameter RAM.
- */
- ep = (fcc_enet_t *)(&immap->im_dprambase[fip->fc_proff]);
-
- /* And another to the FCC register area.
- */
- fccp = (volatile fcc_t *)(&immap->im_fcc[fip->fc_fccnum]);
- cep->fccp = fccp; /* Keep the pointers handy */
- cep->ep = ep;
-
- /* Disable receive and transmit in case someone left it running.
- */
- fccp->fcc_gfmr &= ~(FCC_GFMR_ENR | FCC_GFMR_ENT);
-}
-
-/* Initialize the I/O pins for the FCC Ethernet.
-*/
-static void __init
-init_fcc_ioports(fcc_info_t *fip, volatile iop_cpm2_t *io,
- volatile cpm2_map_t *immap)
-{
-
- /* FCC1 pins are on port A/C. FCC2/3 are port B/C.
- */
- if (fip->fc_proff == PROFF_FCC1) {
- /* Configure port A and C pins for FCC1 Ethernet.
- */
- io->iop_pdira &= ~PA1_DIRA_BOUT;
- io->iop_pdira |= PA1_DIRA_BIN;
- io->iop_psora &= ~PA1_PSORA_BOUT;
- io->iop_psora |= PA1_PSORA_BIN;
- io->iop_ppara |= (PA1_DIRA_BOUT | PA1_DIRA_BIN);
- }
- if (fip->fc_proff == PROFF_FCC2) {
- /* Configure port B and C pins for FCC Ethernet.
- */
- io->iop_pdirb &= ~PB2_DIRB_BOUT;
- io->iop_pdirb |= PB2_DIRB_BIN;
- io->iop_psorb &= ~PB2_PSORB_BOUT;
- io->iop_psorb |= PB2_PSORB_BIN;
- io->iop_pparb |= (PB2_DIRB_BOUT | PB2_DIRB_BIN);
- }
- if (fip->fc_proff == PROFF_FCC3) {
- /* Configure port B and C pins for FCC Ethernet.
- */
- io->iop_pdirb &= ~PB3_DIRB_BOUT;
- io->iop_pdirb |= PB3_DIRB_BIN;
- io->iop_psorb &= ~PB3_PSORB_BOUT;
- io->iop_psorb |= PB3_PSORB_BIN;
- io->iop_pparb |= (PB3_DIRB_BOUT | PB3_DIRB_BIN);
-
- io->iop_pdirc &= ~PC3_DIRC_BOUT;
- io->iop_pdirc |= PC3_DIRC_BIN;
- io->iop_psorc &= ~PC3_PSORC_BOUT;
- io->iop_psorc |= PC3_PSORC_BIN;
- io->iop_pparc |= (PC3_DIRC_BOUT | PC3_DIRC_BIN);
-
- }
-
- /* Port C has clocks......
- */
- io->iop_psorc &= ~(fip->fc_trxclocks);
- io->iop_pdirc &= ~(fip->fc_trxclocks);
- io->iop_pparc |= fip->fc_trxclocks;
-
-#ifdef CONFIG_USE_MDIO
- /* ....and the MII serial clock/data.
- */
- io->iop_pdatc |= (fip->fc_mdio | fip->fc_mdck);
- io->iop_podrc &= ~(fip->fc_mdio | fip->fc_mdck);
- io->iop_pdirc |= (fip->fc_mdio | fip->fc_mdck);
- io->iop_pparc &= ~(fip->fc_mdio | fip->fc_mdck);
-#endif /* CONFIG_USE_MDIO */
-
- /* Configure Serial Interface clock routing.
- * First, clear all FCC bits to zero,
- * then set the ones we want.
- */
- immap->im_cpmux.cmx_fcr &= ~(fip->fc_clockmask);
- immap->im_cpmux.cmx_fcr |= fip->fc_clockroute;
-}
-
-static void __init
-init_fcc_param(fcc_info_t *fip, struct net_device *dev,
- volatile cpm2_map_t *immap)
-{
- unsigned char *eap;
- unsigned long mem_addr;
- bd_t *bd;
- int i, j;
- struct fcc_enet_private *cep;
- volatile fcc_enet_t *ep;
- volatile cbd_t *bdp;
- volatile cpm_cpm2_t *cp;
-
- cep = (struct fcc_enet_private *)(dev->priv);
- ep = cep->ep;
- cp = cpmp;
-
- bd = (bd_t *)__res;
-
- /* Zero the whole thing.....I must have missed some individually.
- * It works when I do this.
- */
- memset((char *)ep, 0, sizeof(fcc_enet_t));
-
- /* Allocate space for the buffer descriptors from regular memory.
- * Initialize base addresses for the buffer descriptors.
- */
- cep->rx_bd_base = kmalloc(sizeof(cbd_t) * RX_RING_SIZE,
- GFP_KERNEL | GFP_DMA);
- ep->fen_genfcc.fcc_rbase = __pa(cep->rx_bd_base);
- cep->tx_bd_base = kmalloc(sizeof(cbd_t) * TX_RING_SIZE,
- GFP_KERNEL | GFP_DMA);
- ep->fen_genfcc.fcc_tbase = __pa(cep->tx_bd_base);
-
- cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
- cep->cur_rx = cep->rx_bd_base;
-
- ep->fen_genfcc.fcc_rstate = (CPMFCR_GBL | CPMFCR_EB) << 24;
- ep->fen_genfcc.fcc_tstate = (CPMFCR_GBL | CPMFCR_EB) << 24;
-
- /* Set maximum bytes per receive buffer.
- * It must be a multiple of 32.
- */
- ep->fen_genfcc.fcc_mrblr = PKT_MAXBLR_SIZE;
-
- /* Allocate space in the reserved FCC area of DPRAM for the
- * internal buffers. No one uses this space (yet), so we
- * can do this. Later, we will add resource management for
- * this area.
- */
- mem_addr = CPM_FCC_SPECIAL_BASE + (fip->fc_fccnum * 128);
- ep->fen_genfcc.fcc_riptr = mem_addr;
- ep->fen_genfcc.fcc_tiptr = mem_addr+32;
- ep->fen_padptr = mem_addr+64;
- memset((char *)(&(immap->im_dprambase[(mem_addr+64)])), 0x88, 32);
-
- ep->fen_genfcc.fcc_rbptr = 0;
- ep->fen_genfcc.fcc_tbptr = 0;
- ep->fen_genfcc.fcc_rcrc = 0;
- ep->fen_genfcc.fcc_tcrc = 0;
- ep->fen_genfcc.fcc_res1 = 0;
- ep->fen_genfcc.fcc_res2 = 0;
-
- ep->fen_camptr = 0; /* CAM isn't used in this driver */
-
- /* Set CRC preset and mask.
- */
- ep->fen_cmask = 0xdebb20e3;
- ep->fen_cpres = 0xffffffff;
-
- ep->fen_crcec = 0; /* CRC Error counter */
- ep->fen_alec = 0; /* alignment error counter */
- ep->fen_disfc = 0; /* discard frame counter */
- ep->fen_retlim = 15; /* Retry limit threshold */
- ep->fen_pper = 0; /* Normal persistence */
-
- /* Clear hash filter tables.
- */
- ep->fen_gaddrh = 0;
- ep->fen_gaddrl = 0;
- ep->fen_iaddrh = 0;
- ep->fen_iaddrl = 0;
-
- /* Clear the Out-of-sequence TxBD.
- */
- ep->fen_tfcstat = 0;
- ep->fen_tfclen = 0;
- ep->fen_tfcptr = 0;
-
- ep->fen_mflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
- ep->fen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
-
- /* Set Ethernet station address.
- *
- * This is supplied in the board information structure, so we
- * copy that into the controller.
- * So, far we have only been given one Ethernet address. We make
- * it unique by setting a few bits in the upper byte of the
- * non-static part of the address.
- */
- eap = (unsigned char *)&(ep->fen_paddrh);
- for (i=5; i>=0; i--) {
-
-/*
- * The EP8260 only uses FCC3, so we can safely give it the real
- * MAC address.
- */
-#ifdef CONFIG_SBC82xx
- if (i == 5) {
- /* bd->bi_enetaddr holds the SCC0 address; the FCC
- devices count up from there */
- dev->dev_addr[i] = bd->bi_enetaddr[i] & ~3;
- dev->dev_addr[i] += 1 + fip->fc_fccnum;
- *eap++ = dev->dev_addr[i];
- }
-#else
-#ifndef CONFIG_RPX8260
- if (i == 3) {
- dev->dev_addr[i] = bd->bi_enetaddr[i];
- dev->dev_addr[i] |= (1 << (7 - fip->fc_fccnum));
- *eap++ = dev->dev_addr[i];
- } else
-#endif
- {
- *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
- }
-#endif
- }
-
- ep->fen_taddrh = 0;
- ep->fen_taddrm = 0;
- ep->fen_taddrl = 0;
-
- ep->fen_maxd1 = PKT_MAXDMA_SIZE; /* maximum DMA1 length */
- ep->fen_maxd2 = PKT_MAXDMA_SIZE; /* maximum DMA2 length */
-
- /* Clear stat counters, in case we ever enable RMON.
- */
- ep->fen_octc = 0;
- ep->fen_colc = 0;
- ep->fen_broc = 0;
- ep->fen_mulc = 0;
- ep->fen_uspc = 0;
- ep->fen_frgc = 0;
- ep->fen_ospc = 0;
- ep->fen_jbrc = 0;
- ep->fen_p64c = 0;
- ep->fen_p65c = 0;
- ep->fen_p128c = 0;
- ep->fen_p256c = 0;
- ep->fen_p512c = 0;
- ep->fen_p1024c = 0;
-
- ep->fen_rfthr = 0; /* Suggested by manual */
- ep->fen_rfcnt = 0;
- ep->fen_cftype = 0;
-
- /* Now allocate the host memory pages and initialize the
- * buffer descriptors.
- */
- bdp = cep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = 0;
- bdp->cbd_datlen = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- bdp = cep->rx_bd_base;
- for (i=0; i<FCC_ENET_RX_PAGES; i++) {
-
- /* Allocate a page.
- */
- mem_addr = __get_free_page(GFP_KERNEL);
-
- /* Initialize the BD for every fragment in the page.
- */
- for (j=0; j<FCC_ENET_RX_FRPPG; j++) {
- bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
- bdp->cbd_datlen = 0;
- bdp->cbd_bufaddr = __pa(mem_addr);
- mem_addr += FCC_ENET_RX_FRSIZE;
- bdp++;
- }
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* Let's re-initialize the channel now. We have to do it later
- * than the manual describes because we have just now finished
- * the BD initialization.
- */
- cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock, 0x0c,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- cep->skb_cur = cep->skb_dirty = 0;
-}
-
-/* Let 'er rip.
-*/
-static void __init
-init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
-{
- volatile fcc_t *fccp;
- struct fcc_enet_private *cep;
-
- cep = (struct fcc_enet_private *)(dev->priv);
- fccp = cep->fccp;
-
-#ifdef CONFIG_RPX8260
-#ifdef PHY_INTERRUPT
- /* Route PHY interrupt to IRQ. The following code only works for
- * IRQ1 - IRQ7. It does not work for Port C interrupts.
- */
- *((volatile u_char *) (RPX_CSR_ADDR + 13)) &= ~BCSR13_FETH_IRQMASK;
- *((volatile u_char *) (RPX_CSR_ADDR + 13)) |=
- ((PHY_INTERRUPT - SIU_INT_IRQ1 + 1) << 4);
-#endif
- /* Initialize MDIO pins. */
- *((volatile u_char *) (RPX_CSR_ADDR + 4)) &= ~BCSR4_MII_MDC;
- *((volatile u_char *) (RPX_CSR_ADDR + 4)) |=
- BCSR4_MII_READ | BCSR4_MII_MDIO;
- /* Enable external LXT971 PHY. */
- *((volatile u_char *) (RPX_CSR_ADDR + 4)) |= BCSR4_EN_PHY;
- udelay(1000);
- *((volatile u_char *) (RPX_CSR_ADDR+ 4)) |= BCSR4_EN_MII;
- udelay(1000);
-#endif /* ifdef CONFIG_RPX8260 */
-
- fccp->fcc_fcce = 0xffff; /* Clear any pending events */
-
- /* Leave FCC interrupts masked for now. Will be unmasked by
- * fcc_restart().
- */
- fccp->fcc_fccm = 0;
-
- /* Install our interrupt handler.
- */
- if (request_irq(fip->fc_interrupt, fcc_enet_interrupt, 0, "fenet",
- dev) < 0)
- printk("Can't get FCC IRQ %d\n", fip->fc_interrupt);
-
-#ifdef PHY_INTERRUPT
- /* Make IRQn edge triggered. This does not work if PHY_INTERRUPT is
- * on Port C.
- */
- ((volatile cpm2_map_t *) CPM_MAP_ADDR)->im_intctl.ic_siexr |=
- (1 << (14 - (PHY_INTERRUPT - SIU_INT_IRQ1)));
-
- if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0,
- "mii", dev) < 0)
- printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
-#endif /* PHY_INTERRUPT */
-
- /* Set GFMR to enable Ethernet operating mode.
- */
- fccp->fcc_gfmr = (FCC_GFMR_TCI | FCC_GFMR_MODE_ENET);
-
- /* Set sync/delimiters.
- */
- fccp->fcc_fdsr = 0xd555;
-
- /* Set protocol specific processing mode for Ethernet.
- * This has to be adjusted for Full Duplex operation after we can
- * determine how to detect that.
- */
- fccp->fcc_fpsmr = FCC_PSMR_ENCRC;
-
-#ifdef CONFIG_PQ2ADS
- /* Enable the PHY. */
- *(volatile uint *)(BCSR_ADDR + 4) &= ~BCSR1_FETHIEN;
- *(volatile uint *)(BCSR_ADDR + 4) |= BCSR1_FETH_RST;
-#endif
-#if defined(CONFIG_PQ2ADS) || defined(CONFIG_PQ2FADS)
- /* Enable the 2nd PHY. */
- *(volatile uint *)(BCSR_ADDR + 12) &= ~BCSR3_FETHIEN2;
- *(volatile uint *)(BCSR_ADDR + 12) |= BCSR3_FETH2_RST;
-#endif
-
-#if defined(CONFIG_USE_MDIO) || defined(CONFIG_TQM8260)
- /* start in full duplex mode, and negotiate speed
- */
- fcc_restart (dev, 1);
-#else
- /* start in half duplex mode
- */
- fcc_restart (dev, 0);
-#endif
-}
-
-#ifdef CONFIG_USE_MDIO
-/* MII command/status interface.
- * I'm not going to describe all of the details. You can find the
- * protocol definition in many other places, including the data sheet
- * of most PHY parts.
- * I wonder what "they" were thinking (maybe weren't) when they leave
- * the I2C in the CPM but I have to toggle these bits......
- */
-#ifdef CONFIG_RPX8260
- /* The EP8260 has the MDIO pins in a BCSR instead of on Port C
- * like most other boards.
- */
-#define MDIO_ADDR ((volatile u_char *)(RPX_CSR_ADDR + 4))
-#define MAKE_MDIO_OUTPUT *MDIO_ADDR &= ~BCSR4_MII_READ
-#define MAKE_MDIO_INPUT *MDIO_ADDR |= BCSR4_MII_READ | BCSR4_MII_MDIO
-#define OUT_MDIO(bit) \
- if (bit) \
- *MDIO_ADDR |= BCSR4_MII_MDIO; \
- else \
- *MDIO_ADDR &= ~BCSR4_MII_MDIO;
-#define IN_MDIO (*MDIO_ADDR & BCSR4_MII_MDIO)
-#define OUT_MDC(bit) \
- if (bit) \
- *MDIO_ADDR |= BCSR4_MII_MDC; \
- else \
- *MDIO_ADDR &= ~BCSR4_MII_MDC;
-#else /* ifdef CONFIG_RPX8260 */
- /* This is for the usual case where the MDIO pins are on Port C.
- */
-#define MDIO_ADDR (((volatile cpm2_map_t *)CPM_MAP_ADDR)->im_ioport)
-#define MAKE_MDIO_OUTPUT MDIO_ADDR.iop_pdirc |= fip->fc_mdio
-#define MAKE_MDIO_INPUT MDIO_ADDR.iop_pdirc &= ~fip->fc_mdio
-#define OUT_MDIO(bit) \
- if (bit) \
- MDIO_ADDR.iop_pdatc |= fip->fc_mdio; \
- else \
- MDIO_ADDR.iop_pdatc &= ~fip->fc_mdio;
-#define IN_MDIO ((MDIO_ADDR.iop_pdatc) & fip->fc_mdio)
-#define OUT_MDC(bit) \
- if (bit) \
- MDIO_ADDR.iop_pdatc |= fip->fc_mdck; \
- else \
- MDIO_ADDR.iop_pdatc &= ~fip->fc_mdck;
-#endif /* ifdef CONFIG_RPX8260 */
-
-static uint
-mii_send_receive(fcc_info_t *fip, uint cmd)
-{
- uint retval;
- int read_op, i, off;
- const int us = 1;
-
- read_op = ((cmd & 0xf0000000) == 0x60000000);
-
- /* Write preamble
- */
- OUT_MDIO(1);
- MAKE_MDIO_OUTPUT;
- OUT_MDIO(1);
- for (i = 0; i < 32; i++)
- {
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- OUT_MDC(0);
- }
-
- /* Write data
- */
- for (i = 0, off = 31; i < (read_op ? 14 : 32); i++, --off)
- {
- OUT_MDIO((cmd >> off) & 0x00000001);
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- OUT_MDC(0);
- }
-
- retval = cmd;
-
- if (read_op)
- {
- retval >>= 16;
-
- MAKE_MDIO_INPUT;
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- OUT_MDC(0);
-
- for (i = 0; i < 16; i++)
- {
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- retval <<= 1;
- if (IN_MDIO)
- retval++;
- OUT_MDC(0);
- }
- }
-
- MAKE_MDIO_INPUT;
- udelay(us);
- OUT_MDC(1);
- udelay(us);
- OUT_MDC(0);
-
- return retval;
-}
-#endif /* CONFIG_USE_MDIO */
-
-static void
-fcc_stop(struct net_device *dev)
-{
- struct fcc_enet_private *fep= (struct fcc_enet_private *)(dev->priv);
- volatile fcc_t *fccp = fep->fccp;
- fcc_info_t *fip = fep->fip;
- volatile fcc_enet_t *ep = fep->ep;
- volatile cpm_cpm2_t *cp = cpmp;
- volatile cbd_t *bdp;
- int i;
-
- if ((fccp->fcc_gfmr & (FCC_GFMR_ENR | FCC_GFMR_ENT)) == 0)
- return; /* already down */
-
- fccp->fcc_fccm = 0;
-
- /* issue the graceful stop tx command */
- while (cp->cp_cpcr & CPM_CR_FLG);
- cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock,
- 0x0c, CPM_CR_GRA_STOP_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Disable transmit/receive */
- fccp->fcc_gfmr &= ~(FCC_GFMR_ENR | FCC_GFMR_ENT);
-
- /* issue the restart tx command */
- fccp->fcc_fcce = FCC_ENET_GRA;
- while (cp->cp_cpcr & CPM_CR_FLG);
- cp->cp_cpcr = mk_cr_cmd(fip->fc_cpmpage, fip->fc_cpmblock,
- 0x0c, CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* free tx buffers */
- fep->skb_cur = fep->skb_dirty = 0;
- for (i=0; i<=TX_RING_MOD_MASK; i++) {
- if (fep->tx_skbuff[i] != NULL) {
- dev_kfree_skb(fep->tx_skbuff[i]);
- fep->tx_skbuff[i] = NULL;
- }
- }
- fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
- fep->tx_free = TX_RING_SIZE;
- ep->fen_genfcc.fcc_tbptr = ep->fen_genfcc.fcc_tbase;
-
- /* Initialize the tx buffer descriptors. */
- bdp = fep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
- bdp->cbd_sc = 0;
- bdp->cbd_datlen = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
- /* Set the last buffer to wrap. */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-}
-
-static void
-fcc_restart(struct net_device *dev, int duplex)
-{
- struct fcc_enet_private *fep = (struct fcc_enet_private *)(dev->priv);
- volatile fcc_t *fccp = fep->fccp;
-
- /* stop any transmissions in progress */
- fcc_stop(dev);
-
- if (duplex)
- fccp->fcc_fpsmr |= FCC_PSMR_FDE | FCC_PSMR_LPB;
- else
- fccp->fcc_fpsmr &= ~(FCC_PSMR_FDE | FCC_PSMR_LPB);
-
- /* Enable interrupts for transmit error, complete frame
- * received, and any transmit buffer we have also set the
- * interrupt flag.
- */
- fccp->fcc_fccm = (FCC_ENET_TXE | FCC_ENET_RXF | FCC_ENET_TXB);
-
- /* Enable transmit/receive */
- fccp->fcc_gfmr |= FCC_GFMR_ENR | FCC_GFMR_ENT;
-}
-
-static int
-fcc_enet_open(struct net_device *dev)
-{
- struct fcc_enet_private *fep = dev->priv;
-
-#ifdef CONFIG_USE_MDIO
- fep->sequence_done = 0;
- fep->link = 0;
-
- if (fep->phy) {
- fcc_restart(dev, 0); /* always start in half-duplex */
- mii_do_cmd(dev, fep->phy->ack_int);
- mii_do_cmd(dev, fep->phy->config);
- mii_do_cmd(dev, phy_cmd_config); /* display configuration */
- while(!fep->sequence_done)
- schedule();
-
- mii_do_cmd(dev, fep->phy->startup);
- netif_start_queue(dev);
- return 0; /* Success */
- }
- return -ENODEV; /* No PHY we understand */
-#else
- fep->link = 1;
- fcc_restart(dev, 0); /* always start in half-duplex */
- netif_start_queue(dev);
- return 0; /* Always succeed */
-#endif /* CONFIG_USE_MDIO */
-}
-
diff --git a/arch/ppc/8xx_io/Kconfig b/arch/ppc/8xx_io/Kconfig
deleted file mode 100644
index c623e44..0000000
--- a/arch/ppc/8xx_io/Kconfig
+++ /dev/null
@@ -1,134 +0,0 @@
-#
-# MPC8xx Communication options
-#
-
-menu "MPC8xx CPM Options"
- depends on 8xx
-
-config SCC_ENET
- bool "CPM SCC Ethernet"
- depends on NET_ETHERNET
- help
- Enable Ethernet support via the Motorola MPC8xx serial
- communications controller.
-
-choice
- prompt "SCC used for Ethernet"
- depends on SCC_ENET
- default SCC1_ENET
-
-config SCC1_ENET
- bool "SCC1"
- help
- Use MPC8xx serial communications controller 1 to drive Ethernet
- (default).
-
-config SCC2_ENET
- bool "SCC2"
- help
- Use MPC8xx serial communications controller 2 to drive Ethernet.
-
-config SCC3_ENET
- bool "SCC3"
- help
- Use MPC8xx serial communications controller 3 to drive Ethernet.
-
-endchoice
-
-config FEC_ENET
- bool "860T FEC Ethernet"
- depends on NET_ETHERNET
- help
- Enable Ethernet support via the Fast Ethernet Controller (FCC) on
- the Motorola MPC8260.
-
-config USE_MDIO
- bool "Use MDIO for PHY configuration"
- depends on FEC_ENET
- help
- On some boards the hardware configuration of the ethernet PHY can be
- used without any software interaction over the MDIO interface, so
- all MII code can be omitted. Say N here if unsure or if you don't
- need link status reports.
-
-config FEC_AM79C874
- bool "Support AMD79C874 PHY"
- depends on USE_MDIO
-
-config FEC_LXT970
- bool "Support LXT970 PHY"
- depends on USE_MDIO
-
-config FEC_LXT971
- bool "Support LXT971 PHY"
- depends on USE_MDIO
-
-config FEC_QS6612
- bool "Support QS6612 PHY"
- depends on USE_MDIO
-
-config ENET_BIG_BUFFERS
- bool "Use Big CPM Ethernet Buffers"
- depends on SCC_ENET || FEC_ENET
- help
- Allocate large buffers for MPC8xx Ethernet. Increases throughput
- and decreases the likelihood of dropped packets, but costs memory.
-
-# This doesn't really belong here, but it is convenient to ask
-# 8xx specific questions.
-comment "Generic MPC8xx Options"
-
-config 8xx_COPYBACK
- bool "Copy-Back Data Cache (else Writethrough)"
- help
- Saying Y here will cause the cache on an MPC8xx processor to be used
- in Copy-Back mode. If you say N here, it is used in Writethrough
- mode.
-
- If in doubt, say Y here.
-
-config 8xx_CPU6
- bool "CPU6 Silicon Errata (860 Pre Rev. C)"
- help
- MPC860 CPUs, prior to Rev C have some bugs in the silicon, which
- require workarounds for Linux (and most other OSes to work). If you
- get a BUG() very early in boot, this might fix the problem. For
- more details read the document entitled "MPC860 Family Device Errata
- Reference" on Motorola's website. This option also incurs a
- performance hit.
-
- If in doubt, say N here.
-
-choice
- prompt "Microcode patch selection"
- default NO_UCODE_PATCH
- help
- Help not implemented yet, coming soon.
-
-config NO_UCODE_PATCH
- bool "None"
-
-config USB_SOF_UCODE_PATCH
- bool "USB SOF patch"
- help
- Help not implemented yet, coming soon.
-
-config I2C_SPI_UCODE_PATCH
- bool "I2C/SPI relocation patch"
- help
- Help not implemented yet, coming soon.
-
-config I2C_SPI_SMC1_UCODE_PATCH
- bool "I2C/SPI/SMC1 relocation patch"
- help
- Help not implemented yet, coming soon.
-
-endchoice
-
-config UCODE_PATCH
- bool
- default y
- depends on !NO_UCODE_PATCH
-
-endmenu
-
diff --git a/arch/ppc/8xx_io/Makefile b/arch/ppc/8xx_io/Makefile
deleted file mode 100644
index 1051a06..0000000
--- a/arch/ppc/8xx_io/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
-#
-# Makefile for the linux MPC8xx ppc-specific parts of comm processor
-#
-
-obj-y := commproc.o
-
-obj-$(CONFIG_FEC_ENET) += fec.o
-obj-$(CONFIG_SCC_ENET) += enet.o
-obj-$(CONFIG_UCODE_PATCH) += micropatch.o
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
deleted file mode 100644
index 752443d..0000000
--- a/arch/ppc/8xx_io/commproc.c
+++ /dev/null
@@ -1,432 +0,0 @@
-/*
- * General Purpose functions for the global management of the
- * Communication Processor Module.
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * In addition to the individual control of the communication
- * channels, there are a few functions that globally affect the
- * communication processor.
- *
- * Buffer descriptors must be allocated from the dual ported memory
- * space. The allocator for that is here. When the communication
- * process is reset, we reclaim the memory available. There is
- * currently no deallocator for this memory.
- * The amount of space available is platform dependent. On the
- * MBX, the EPPC software loads additional microcode into the
- * communication processor, and uses some of the DP ram for this
- * purpose. Current, the first 512 bytes and the last 256 bytes of
- * memory are used. Right now I am conservative and only use the
- * memory that can never be used for microcode. If there are
- * applications that require more DP ram, we can expand the boundaries
- * but then we have to be careful of any downloaded microcode.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/dma-mapping.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/module.h>
-#include <asm/mpc8xx.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/8xx_immap.h>
-#include <asm/cpm1.h>
-#include <asm/io.h>
-#include <asm/tlbflush.h>
-#include <asm/rheap.h>
-
-#define immr_map(member) \
-({ \
- u32 offset = offsetof(immap_t, member); \
- void *addr = ioremap (IMAP_ADDR + offset, \
- FIELD_SIZEOF(immap_t, member)); \
- addr; \
-})
-
-#define immr_map_size(member, size) \
-({ \
- u32 offset = offsetof(immap_t, member); \
- void *addr = ioremap (IMAP_ADDR + offset, size); \
- addr; \
-})
-
-static void m8xx_cpm_dpinit(void);
-cpm8xx_t *cpmp; /* Pointer to comm processor space */
-
-/* CPM interrupt vector functions.
-*/
-struct cpm_action {
- void (*handler)(void *);
- void *dev_id;
-};
-static struct cpm_action cpm_vecs[CPMVEC_NR];
-static irqreturn_t cpm_interrupt(int irq, void * dev);
-static irqreturn_t cpm_error_interrupt(int irq, void *dev);
-/* Define a table of names to identify CPM interrupt handlers in
- * /proc/interrupts.
- */
-const char *cpm_int_name[] =
- { "error", "PC4", "PC5", "SMC2",
- "SMC1", "SPI", "PC6", "Timer 4",
- "", "PC7", "PC8", "PC9",
- "Timer 3", "", "PC10", "PC11",
- "I2C", "RISC Timer", "Timer 2", "",
- "IDMA2", "IDMA1", "SDMA error", "PC12",
- "PC13", "Timer 1", "PC14", "SCC4",
- "SCC3", "SCC2", "SCC1", "PC15"
- };
-
-static void
-cpm_mask_irq(unsigned int irq)
-{
- int cpm_vec = irq - CPM_IRQ_OFFSET;
-
- clrbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
-}
-
-static void
-cpm_unmask_irq(unsigned int irq)
-{
- int cpm_vec = irq - CPM_IRQ_OFFSET;
-
- setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
-}
-
-static void
-cpm_ack(unsigned int irq)
-{
- /* We do not need to do anything here. */
-}
-
-static void
-cpm_eoi(unsigned int irq)
-{
- int cpm_vec = irq - CPM_IRQ_OFFSET;
-
- out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec));
-}
-
-struct hw_interrupt_type cpm_pic = {
- .typename = " CPM ",
- .enable = cpm_unmask_irq,
- .disable = cpm_mask_irq,
- .ack = cpm_ack,
- .end = cpm_eoi,
-};
-
-void
-m8xx_cpm_reset(void)
-{
- volatile immap_t *imp;
- volatile cpm8xx_t *commproc;
-
- imp = (immap_t *)IMAP_ADDR;
- commproc = (cpm8xx_t *)&imp->im_cpm;
-
-#ifdef CONFIG_UCODE_PATCH
- /* Perform a reset.
- */
- commproc->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
-
- /* Wait for it.
- */
- while (commproc->cp_cpcr & CPM_CR_FLG);
-
- cpm_load_patch(imp);
-#endif
-
- /* Set SDMA Bus Request priority 5.
- * On 860T, this also enables FEC priority 6. I am not sure
- * this is what we really want for some applications, but the
- * manual recommends it.
- * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
- */
- out_be32(&imp->im_siu_conf.sc_sdcr, 1),
-
- /* Reclaim the DP memory for our use. */
- m8xx_cpm_dpinit();
-
- /* Tell everyone where the comm processor resides.
- */
- cpmp = (cpm8xx_t *)commproc;
-}
-
-/* This is called during init_IRQ. We used to do it above, but this
- * was too early since init_IRQ was not yet called.
- */
-static struct irqaction cpm_error_irqaction = {
- .handler = cpm_error_interrupt,
- .mask = CPU_MASK_NONE,
-};
-static struct irqaction cpm_interrupt_irqaction = {
- .handler = cpm_interrupt,
- .mask = CPU_MASK_NONE,
- .name = "CPM cascade",
-};
-
-void
-cpm_interrupt_init(void)
-{
- int i;
-
- /* Initialize the CPM interrupt controller.
- */
- out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr,
- (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
- ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK);
- out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, 0);
-
- /* install the CPM interrupt controller routines for the CPM
- * interrupt vectors
- */
- for ( i = CPM_IRQ_OFFSET ; i < CPM_IRQ_OFFSET + NR_CPM_INTS ; i++ )
- irq_desc[i].chip = &cpm_pic;
-
- /* Set our interrupt handler with the core CPU. */
- if (setup_irq(CPM_INTERRUPT, &cpm_interrupt_irqaction))
- panic("Could not allocate CPM IRQ!");
-
- /* Install our own error handler. */
- cpm_error_irqaction.name = cpm_int_name[CPMVEC_ERROR];
- if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction))
- panic("Could not allocate CPM error IRQ!");
-
- setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, CICR_IEN);
-}
-
-/*
- * Get the CPM interrupt vector.
- */
-int
-cpm_get_irq(void)
-{
- int cpm_vec;
-
- /* Get the vector by setting the ACK bit and then reading
- * the register.
- */
- out_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr, 1);
- cpm_vec = in_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr);
- cpm_vec >>= 11;
-
- return cpm_vec;
-}
-
-/* CPM interrupt controller cascade interrupt.
-*/
-static irqreturn_t
-cpm_interrupt(int irq, void * dev)
-{
- /* This interrupt handler never actually gets called. It is
- * installed only to unmask the CPM cascade interrupt in the SIU
- * and to make the CPM cascade interrupt visible in /proc/interrupts.
- */
- return IRQ_HANDLED;
-}
-
-/* The CPM can generate the error interrupt when there is a race condition
- * between generating and masking interrupts. All we have to do is ACK it
- * and return. This is a no-op function so we don't need any special
- * tests in the interrupt handler.
- */
-static irqreturn_t
-cpm_error_interrupt(int irq, void *dev)
-{
- return IRQ_HANDLED;
-}
-
-/* A helper function to translate the handler prototype required by
- * request_irq() to the handler prototype required by cpm_install_handler().
- */
-static irqreturn_t
-cpm_handler_helper(int irq, void *dev_id)
-{
- int cpm_vec = irq - CPM_IRQ_OFFSET;
-
- (*cpm_vecs[cpm_vec].handler)(dev_id);
-
- return IRQ_HANDLED;
-}
-
-/* Install a CPM interrupt handler.
- * This routine accepts a CPM interrupt vector in the range 0 to 31.
- * This routine is retained for backward compatibility. Rather than using
- * this routine to install a CPM interrupt handler, you can now use
- * request_irq() with an IRQ in the range CPM_IRQ_OFFSET to
- * CPM_IRQ_OFFSET + NR_CPM_INTS - 1 (16 to 47).
- *
- * Notice that the prototype of the interrupt handler function must be
- * different depending on whether you install the handler with
- * request_irq() or cpm_install_handler().
- */
-void
-cpm_install_handler(int cpm_vec, void (*handler)(void *), void *dev_id)
-{
- int err;
-
- /* If null handler, assume we are trying to free the IRQ.
- */
- if (!handler) {
- free_irq(CPM_IRQ_OFFSET + cpm_vec, dev_id);
- return;
- }
-
- if (cpm_vecs[cpm_vec].handler != 0)
- printk(KERN_INFO "CPM interrupt %x replacing %x\n",
- (uint)handler, (uint)cpm_vecs[cpm_vec].handler);
- cpm_vecs[cpm_vec].handler = handler;
- cpm_vecs[cpm_vec].dev_id = dev_id;
-
- if ((err = request_irq(CPM_IRQ_OFFSET + cpm_vec, cpm_handler_helper,
- 0, cpm_int_name[cpm_vec], dev_id)))
- printk(KERN_ERR "request_irq() returned %d for CPM vector %d\n",
- err, cpm_vec);
-}
-
-/* Free a CPM interrupt handler.
- * This routine accepts a CPM interrupt vector in the range 0 to 31.
- * This routine is retained for backward compatibility.
- */
-void
-cpm_free_handler(int cpm_vec)
-{
- request_irq(CPM_IRQ_OFFSET + cpm_vec, NULL, 0, 0,
- cpm_vecs[cpm_vec].dev_id);
-
- cpm_vecs[cpm_vec].handler = NULL;
- cpm_vecs[cpm_vec].dev_id = NULL;
-}
-
-/* Set a baud rate generator. This needs lots of work. There are
- * four BRGs, any of which can be wired to any channel.
- * The internal baud rate clock is the system clock divided by 16.
- * This assumes the baudrate is 16x oversampled by the uart.
- */
-#define BRG_INT_CLK (((bd_t *)__res)->bi_intfreq)
-#define BRG_UART_CLK (BRG_INT_CLK/16)
-#define BRG_UART_CLK_DIV16 (BRG_UART_CLK/16)
-
-void
-cpm_setbrg(uint brg, uint rate)
-{
- volatile uint *bp;
-
- /* This is good enough to get SMCs running.....
- */
- bp = (uint *)&cpmp->cp_brgc1;
- bp += brg;
- /* The BRG has a 12-bit counter. For really slow baud rates (or
- * really fast processors), we may have to further divide by 16.
- */
- if (((BRG_UART_CLK / rate) - 1) < 4096)
- *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN;
- else
- *bp = (((BRG_UART_CLK_DIV16 / rate) - 1) << 1) |
- CPM_BRG_EN | CPM_BRG_DIV16;
-}
-
-/*
- * dpalloc / dpfree bits.
- */
-static spinlock_t cpm_dpmem_lock;
-/*
- * 16 blocks should be enough to satisfy all requests
- * until the memory subsystem goes up...
- */
-static rh_block_t cpm_boot_dpmem_rh_block[16];
-static rh_info_t cpm_dpmem_info;
-
-#define CPM_DPMEM_ALIGNMENT 8
-static u8* dpram_vbase;
-static uint dpram_pbase;
-
-void m8xx_cpm_dpinit(void)
-{
- spin_lock_init(&cpm_dpmem_lock);
-
- dpram_vbase = immr_map_size(im_cpm.cp_dpmem, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE);
- dpram_pbase = (uint)&((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem;
-
- /* Initialize the info header */
- rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
- sizeof(cpm_boot_dpmem_rh_block) /
- sizeof(cpm_boot_dpmem_rh_block[0]),
- cpm_boot_dpmem_rh_block);
-
- /*
- * Attach the usable dpmem area.
- * XXX: This is actually crap. CPM_DATAONLY_BASE and
- * CPM_DATAONLY_SIZE are a subset of the available dparm. It varies
- * with the processor and the microcode patches applied / activated.
- * But the following should be at least safe.
- */
- rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
-}
-
-/*
- * Allocate the requested size worth of DP memory.
- * This function returns an offset into the DPRAM area.
- * Use cpm_dpram_addr() to get the virtual address of the area.
- */
-unsigned long cpm_dpalloc(uint size, uint align)
-{
- unsigned long start;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- cpm_dpmem_info.alignment = align;
- start = rh_alloc(&cpm_dpmem_info, size, "commproc");
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return start;
-}
-EXPORT_SYMBOL(cpm_dpalloc);
-
-int cpm_dpfree(unsigned long offset)
-{
- int ret;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- ret = rh_free(&cpm_dpmem_info, offset);
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return ret;
-}
-EXPORT_SYMBOL(cpm_dpfree);
-
-unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
-{
- unsigned long start;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- cpm_dpmem_info.alignment = align;
- start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return start;
-}
-EXPORT_SYMBOL(cpm_dpalloc_fixed);
-
-void cpm_dpdump(void)
-{
- rh_dump(&cpm_dpmem_info);
-}
-EXPORT_SYMBOL(cpm_dpdump);
-
-void *cpm_dpram_addr(unsigned long offset)
-{
- return (void *)(dpram_vbase + offset);
-}
-EXPORT_SYMBOL(cpm_dpram_addr);
-
-uint cpm_dpram_phys(u8* addr)
-{
- return (dpram_pbase + (uint)(addr - dpram_vbase));
-}
-EXPORT_SYMBOL(cpm_dpram_phys);
diff --git a/arch/ppc/8xx_io/enet.c b/arch/ppc/8xx_io/enet.c
deleted file mode 100644
index 5899aea..0000000
--- a/arch/ppc/8xx_io/enet.c
+++ /dev/null
@@ -1,982 +0,0 @@
-/*
- * Ethernet driver for Motorola MPC8xx.
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * I copied the basic skeleton from the lance driver, because I did not
- * know how to write the Linux driver, but I did know how the LANCE worked.
- *
- * This version of the driver is somewhat selectable for the different
- * processor/board combinations. It works for the boards I know about
- * now, and should be easily modified to include others. Some of the
- * configuration information is contained in <asm/cpm1.h> and the
- * remainder is here.
- *
- * Buffer descriptors are kept in the CPM dual port RAM, and the frame
- * buffers are in the host memory.
- *
- * Right now, I am very watseful with the buffers. I allocate memory
- * pages and then divide them into 2K frame buffers. This way I know I
- * have buffers large enough to hold one frame within one buffer descriptor.
- * Once I get this working, I will use 64 or 128 byte CPM buffers, which
- * will be much more memory efficient and will easily handle lots of
- * small packets.
- *
- */
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/dma-mapping.h>
-#include <linux/bitops.h>
-
-#include <asm/8xx_immap.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/uaccess.h>
-#include <asm/cpm1.h>
-#include <asm/cacheflush.h>
-
-/*
- * Theory of Operation
- *
- * The MPC8xx CPM performs the Ethernet processing on SCC1. It can use
- * an aribtrary number of buffers on byte boundaries, but must have at
- * least two receive buffers to prevent constant overrun conditions.
- *
- * The buffer descriptors are allocated from the CPM dual port memory
- * with the data buffers allocated from host memory, just like all other
- * serial communication protocols. The host memory buffers are allocated
- * from the free page pool, and then divided into smaller receive and
- * transmit buffers. The size of the buffers should be a power of two,
- * since that nicely divides the page. This creates a ring buffer
- * structure similar to the LANCE and other controllers.
- *
- * Like the LANCE driver:
- * The driver runs as two independent, single-threaded flows of control. One
- * is the send-packet routine, which enforces single-threaded use by the
- * cep->tx_busy flag. The other thread is the interrupt handler, which is
- * single threaded by the hardware and other software.
- *
- * The send packet thread has partial control over the Tx ring and the
- * 'cep->tx_busy' flag. It sets the tx_busy flag whenever it's queuing a Tx
- * packet. If the next queue slot is empty, it clears the tx_busy flag when
- * finished otherwise it sets the 'lp->tx_full' flag.
- *
- * The MBX has a control register external to the MPC8xx that has some
- * control of the Ethernet interface. Information is in the manual for
- * your board.
- *
- * The RPX boards have an external control/status register. Consult the
- * programming documents for details unique to your board.
- *
- * For the TQM8xx(L) modules, there is no control register interface.
- * All functions are directly controlled using I/O pins. See <asm/cpm1.h>.
- */
-
-/* The transmitter timeout
- */
-#define TX_TIMEOUT (2*HZ)
-
-/* The number of Tx and Rx buffers. These are allocated from the page
- * pool. The code may assume these are power of two, so it is best
- * to keep them that size.
- * We don't need to allocate pages for the transmitter. We just use
- * the skbuffer directly.
- */
-#ifdef CONFIG_ENET_BIG_BUFFERS
-#define CPM_ENET_RX_PAGES 32
-#define CPM_ENET_RX_FRSIZE 2048
-#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
-#define TX_RING_SIZE 64 /* Must be power of two */
-#define TX_RING_MOD_MASK 63 /* for this to work */
-#else
-#define CPM_ENET_RX_PAGES 4
-#define CPM_ENET_RX_FRSIZE 2048
-#define CPM_ENET_RX_FRPPG (PAGE_SIZE / CPM_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (CPM_ENET_RX_FRPPG * CPM_ENET_RX_PAGES)
-#define TX_RING_SIZE 8 /* Must be power of two */
-#define TX_RING_MOD_MASK 7 /* for this to work */
-#endif
-
-/* The CPM stores dest/src/type, data, and checksum for receive packets.
- */
-#define PKT_MAXBUF_SIZE 1518
-#define PKT_MINBUF_SIZE 64
-#define PKT_MAXBLR_SIZE 1520
-
-/* The CPM buffer descriptors track the ring buffers. The rx_bd_base and
- * tx_bd_base always point to the base of the buffer descriptors. The
- * cur_rx and cur_tx point to the currently available buffer.
- * The dirty_tx tracks the current buffer that is being sent by the
- * controller. The cur_tx and dirty_tx are equal under both completely
- * empty and completely full conditions. The empty/ready indicator in
- * the buffer descriptor determines the actual condition.
- */
-struct scc_enet_private {
- /* The saved address of a sent-in-place packet/buffer, for skfree(). */
- struct sk_buff* tx_skbuff[TX_RING_SIZE];
- ushort skb_cur;
- ushort skb_dirty;
-
- /* CPM dual port RAM relative addresses.
- */
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
- cbd_t *dirty_tx; /* The ring entries to be free()ed. */
- scc_t *sccp;
-
- /* Virtual addresses for the receive buffers because we can't
- * do a __va() on them anymore.
- */
- unsigned char *rx_vaddr[RX_RING_SIZE];
- struct net_device_stats stats;
- uint tx_full;
- spinlock_t lock;
-};
-
-static int scc_enet_open(struct net_device *dev);
-static int scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
-static int scc_enet_rx(struct net_device *dev);
-static void scc_enet_interrupt(void *dev_id);
-static int scc_enet_close(struct net_device *dev);
-static struct net_device_stats *scc_enet_get_stats(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
-
-/* Get this from various configuration locations (depends on board).
-*/
-/*static ushort my_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };*/
-
-/* Typically, 860(T) boards use SCC1 for Ethernet, and other 8xx boards
- * use SCC2. Some even may use SCC3.
- * This is easily extended if necessary.
- */
-#if defined(CONFIG_SCC3_ENET)
-#define CPM_CR_ENET CPM_CR_CH_SCC3
-#define PROFF_ENET PROFF_SCC3
-#define SCC_ENET 2 /* Index, not number! */
-#define CPMVEC_ENET CPMVEC_SCC3
-#elif defined(CONFIG_SCC2_ENET)
-#define CPM_CR_ENET CPM_CR_CH_SCC2
-#define PROFF_ENET PROFF_SCC2
-#define SCC_ENET 1 /* Index, not number! */
-#define CPMVEC_ENET CPMVEC_SCC2
-#elif defined(CONFIG_SCC1_ENET)
-#define CPM_CR_ENET CPM_CR_CH_SCC1
-#define PROFF_ENET PROFF_SCC1
-#define SCC_ENET 0 /* Index, not number! */
-#define CPMVEC_ENET CPMVEC_SCC1
-#else
-#error CONFIG_SCCx_ENET not defined
-#endif
-
-static int
-scc_enet_open(struct net_device *dev)
-{
-
- /* I should reset the ring buffers here, but I don't yet know
- * a simple way to do that.
- */
-
- netif_start_queue(dev);
- return 0; /* Always succeed */
-}
-
-static int
-scc_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
- volatile cbd_t *bdp;
-
- /* Fill in a Tx ring entry */
- bdp = cep->cur_tx;
-
-#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- /* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since cep->tx_busy should be set.
- */
- printk("%s: tx queue full!.\n", dev->name);
- return 1;
- }
-#endif
-
- /* Clear all of the status flags.
- */
- bdp->cbd_sc &= ~BD_ENET_TX_STATS;
-
- /* If the frame is short, tell CPM to pad it.
- */
- if (skb->len <= ETH_ZLEN)
- bdp->cbd_sc |= BD_ENET_TX_PAD;
- else
- bdp->cbd_sc &= ~BD_ENET_TX_PAD;
-
- /* Set buffer length and buffer pointer.
- */
- bdp->cbd_datlen = skb->len;
- bdp->cbd_bufaddr = __pa(skb->data);
-
- /* Save skb pointer.
- */
- cep->tx_skbuff[cep->skb_cur] = skb;
-
- cep->stats.tx_bytes += skb->len;
- cep->skb_cur = (cep->skb_cur+1) & TX_RING_MOD_MASK;
-
- /* Push the data cache so the CPM does not get stale memory
- * data.
- */
- flush_dcache_range((unsigned long)(skb->data),
- (unsigned long)(skb->data + skb->len));
-
- spin_lock_irq(&cep->lock);
-
- /* Send it on its way. Tell CPM its ready, interrupt when done,
- * its the last BD of the frame, and to put the CRC on the end.
- */
- bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC);
-
- dev->trans_start = jiffies;
-
- /* If this was the last BD in the ring, start at the beginning again.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- netif_stop_queue(dev);
- cep->tx_full = 1;
- }
-
- cep->cur_tx = (cbd_t *)bdp;
-
- spin_unlock_irq(&cep->lock);
-
- return 0;
-}
-
-static void
-scc_enet_timeout(struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
-
- printk("%s: transmit timed out.\n", dev->name);
- cep->stats.tx_errors++;
-#ifndef final_version
- {
- int i;
- cbd_t *bdp;
- printk(" Ring data dump: cur_tx %p%s cur_rx %p.\n",
- cep->cur_tx, cep->tx_full ? " (full)" : "",
- cep->cur_rx);
- bdp = cep->tx_bd_base;
- for (i = 0 ; i < TX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp = cep->rx_bd_base;
- for (i = 0 ; i < RX_RING_SIZE; i++, bdp++)
- printk("%04x %04x %08x\n",
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- }
-#endif
- if (!cep->tx_full)
- netif_wake_queue(dev);
-}
-
-/* The interrupt handler.
- * This is called from the CPM handler, not the MPC core interrupt.
- */
-static void
-scc_enet_interrupt(void *dev_id)
-{
- struct net_device *dev = dev_id;
- volatile struct scc_enet_private *cep;
- volatile cbd_t *bdp;
- ushort int_events;
- int must_restart;
-
- cep = (struct scc_enet_private *)dev->priv;
-
- /* Get the interrupt events that caused us to be here.
- */
- int_events = cep->sccp->scc_scce;
- cep->sccp->scc_scce = int_events;
- must_restart = 0;
-
- /* Handle receive event in its own function.
- */
- if (int_events & SCCE_ENET_RXF)
- scc_enet_rx(dev_id);
-
- /* Check for a transmit error. The manual is a little unclear
- * about this, so the debug code until I get it figured out. It
- * appears that if TXE is set, then TXB is not set. However,
- * if carrier sense is lost during frame transmission, the TXE
- * bit is set, "and continues the buffer transmission normally."
- * I don't know if "normally" implies TXB is set when the buffer
- * descriptor is closed.....trial and error :-).
- */
-
- /* Transmit OK, or non-fatal error. Update the buffer descriptors.
- */
- if (int_events & (SCCE_ENET_TXE | SCCE_ENET_TXB)) {
- spin_lock(&cep->lock);
- bdp = cep->dirty_tx;
- while ((bdp->cbd_sc&BD_ENET_TX_READY)==0) {
- if ((bdp==cep->cur_tx) && (cep->tx_full == 0))
- break;
-
- if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
- cep->stats.tx_heartbeat_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
- cep->stats.tx_window_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
- cep->stats.tx_aborted_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
- cep->stats.tx_fifo_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
- cep->stats.tx_carrier_errors++;
-
-
- /* No heartbeat or Lost carrier are not really bad errors.
- * The others require a restart transmit command.
- */
- if (bdp->cbd_sc &
- (BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN)) {
- must_restart = 1;
- cep->stats.tx_errors++;
- }
-
- cep->stats.tx_packets++;
-
- /* Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (bdp->cbd_sc & BD_ENET_TX_DEF)
- cep->stats.collisions++;
-
- /* Free the sk buffer associated with this last transmit.
- */
- dev_kfree_skb_irq(cep->tx_skbuff[cep->skb_dirty]);
- cep->skb_dirty = (cep->skb_dirty + 1) & TX_RING_MOD_MASK;
-
- /* Update pointer to next buffer descriptor to be transmitted.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = cep->tx_bd_base;
- else
- bdp++;
-
- /* I don't know if we can be held off from processing these
- * interrupts for more than one frame time. I really hope
- * not. In such a case, we would now want to check the
- * currently available BD (cur_tx) and determine if any
- * buffers between the dirty_tx and cur_tx have also been
- * sent. We would want to process anything in between that
- * does not have BD_ENET_TX_READY set.
- */
-
- /* Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (cep->tx_full) {
- cep->tx_full = 0;
- if (netif_queue_stopped(dev))
- netif_wake_queue(dev);
- }
-
- cep->dirty_tx = (cbd_t *)bdp;
- }
-
- if (must_restart) {
- volatile cpm8xx_t *cp;
-
- /* Some transmit errors cause the transmitter to shut
- * down. We now issue a restart transmit. Since the
- * errors close the BD and update the pointers, the restart
- * _should_ pick up without having to reset any of our
- * pointers either.
- */
- cp = cpmp;
- cp->cp_cpcr =
- mk_cr_cmd(CPM_CR_ENET, CPM_CR_RESTART_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- }
- spin_unlock(&cep->lock);
- }
-
- /* Check for receive busy, i.e. packets coming but no place to
- * put them. This "can't happen" because the receive interrupt
- * is tossing previous frames.
- */
- if (int_events & SCCE_ENET_BSY) {
- cep->stats.rx_dropped++;
- printk("CPM ENET: BSY can't happen.\n");
- }
-
- return;
-}
-
-/* During a receive, the cur_rx points to the current incoming buffer.
- * When we update through the ring, if the next incoming buffer has
- * not been given to the system, we just set the empty indicator,
- * effectively tossing the packet.
- */
-static int
-scc_enet_rx(struct net_device *dev)
-{
- struct scc_enet_private *cep;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
- ushort pkt_len;
-
- cep = (struct scc_enet_private *)dev->priv;
-
- /* First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = cep->cur_rx;
-
-for (;;) {
- if (bdp->cbd_sc & BD_ENET_RX_EMPTY)
- break;
-
-#ifndef final_version
- /* Since we have allocated space to hold a complete frame, both
- * the first and last indicators should be set.
- */
- if ((bdp->cbd_sc & (BD_ENET_RX_FIRST | BD_ENET_RX_LAST)) !=
- (BD_ENET_RX_FIRST | BD_ENET_RX_LAST))
- printk("CPM ENET: rcv is not first+last\n");
-#endif
-
- /* Frame too long or too short.
- */
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
- cep->stats.rx_length_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
- cep->stats.rx_frame_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
- cep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
- cep->stats.rx_crc_errors++;
-
- /* Report late collisions as a frame error.
- * On this error, the BD is closed, but we don't know what we
- * have in the buffer. So, just drop this frame on the floor.
- */
- if (bdp->cbd_sc & BD_ENET_RX_CL) {
- cep->stats.rx_frame_errors++;
- }
- else {
-
- /* Process the incoming frame.
- */
- cep->stats.rx_packets++;
- pkt_len = bdp->cbd_datlen;
- cep->stats.rx_bytes += pkt_len;
-
- /* This does 16 byte alignment, much more than we need.
- * The packet length includes FCS, but we don't want to
- * include that when passing upstream as it messes up
- * bridging applications.
- */
- skb = dev_alloc_skb(pkt_len-4);
-
- if (skb == NULL) {
- printk("%s: Memory squeeze, dropping packet.\n", dev->name);
- cep->stats.rx_dropped++;
- }
- else {
- skb_put(skb,pkt_len-4); /* Make room */
- skb_copy_to_linear_data(skb,
- cep->rx_vaddr[bdp - cep->rx_bd_base],
- pkt_len-4);
- skb->protocol=eth_type_trans(skb,dev);
- netif_rx(skb);
- }
- }
-
- /* Clear the status flags for this buffer.
- */
- bdp->cbd_sc &= ~BD_ENET_RX_STATS;
-
- /* Mark the buffer empty.
- */
- bdp->cbd_sc |= BD_ENET_RX_EMPTY;
-
- /* Update BD pointer to next entry.
- */
- if (bdp->cbd_sc & BD_ENET_RX_WRAP)
- bdp = cep->rx_bd_base;
- else
- bdp++;
-
- }
- cep->cur_rx = (cbd_t *)bdp;
-
- return 0;
-}
-
-static int
-scc_enet_close(struct net_device *dev)
-{
- /* Don't know what to do yet.
- */
- netif_stop_queue(dev);
-
- return 0;
-}
-
-static struct net_device_stats *scc_enet_get_stats(struct net_device *dev)
-{
- struct scc_enet_private *cep = (struct scc_enet_private *)dev->priv;
-
- return &cep->stats;
-}
-
-/* Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-
-static void set_multicast_list(struct net_device *dev)
-{
- struct scc_enet_private *cep;
- struct dev_mc_list *dmi;
- u_char *mcptr, *tdptr;
- volatile scc_enet_t *ep;
- int i, j;
- cep = (struct scc_enet_private *)dev->priv;
-
- /* Get pointer to SCC area in parameter RAM.
- */
- ep = (scc_enet_t *)dev->base_addr;
-
- if (dev->flags&IFF_PROMISC) {
-
- /* Log any net taps. */
- printk("%s: Promiscuous mode enabled.\n", dev->name);
- cep->sccp->scc_psmr |= SCC_PSMR_PRO;
- } else {
-
- cep->sccp->scc_psmr &= ~SCC_PSMR_PRO;
-
- if (dev->flags & IFF_ALLMULTI) {
- /* Catch all multicast addresses, so set the
- * filter to all 1's.
- */
- ep->sen_gaddr1 = 0xffff;
- ep->sen_gaddr2 = 0xffff;
- ep->sen_gaddr3 = 0xffff;
- ep->sen_gaddr4 = 0xffff;
- }
- else {
- /* Clear filter and add the addresses in the list.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
-
- dmi = dev->mc_list;
-
- for (i=0; i<dev->mc_count; i++) {
-
- /* Only support group multicast for now.
- */
- if (!(dmi->dmi_addr[0] & 1))
- continue;
-
- /* The address in dmi_addr is LSB first,
- * and taddr is MSB first. We have to
- * copy bytes MSB first from dmi_addr.
- */
- mcptr = (u_char *)dmi->dmi_addr + 5;
- tdptr = (u_char *)&ep->sen_taddrh;
- for (j=0; j<6; j++)
- *tdptr++ = *mcptr--;
-
- /* Ask CPM to run CRC and set bit in
- * filter mask.
- */
- cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_SET_GADDR) | CPM_CR_FLG;
- /* this delay is necessary here -- Cort */
- udelay(10);
- while (cpmp->cp_cpcr & CPM_CR_FLG);
- }
- }
- }
-}
-
-/* Initialize the CPM Ethernet on SCC. If EPPC-Bug loaded us, or performed
- * some other network I/O, a whole bunch of this has already been set up.
- * It is no big deal if we do it again, we just have to disable the
- * transmit and receive to make sure we don't catch the CPM with some
- * inconsistent control information.
- */
-static int __init scc_enet_init(void)
-{
- struct net_device *dev;
- struct scc_enet_private *cep;
- int i, j, k, err;
- uint dp_offset;
- unsigned char *eap, *ba;
- dma_addr_t mem_addr;
- bd_t *bd;
- volatile cbd_t *bdp;
- volatile cpm8xx_t *cp;
- volatile scc_t *sccp;
- volatile scc_enet_t *ep;
- volatile immap_t *immap;
-
- cp = cpmp; /* Get pointer to Communication Processor */
-
- immap = (immap_t *)(mfspr(SPRN_IMMR) & 0xFFFF0000); /* and to internal registers */
-
- bd = (bd_t *)__res;
-
- dev = alloc_etherdev(sizeof(*cep));
- if (!dev)
- return -ENOMEM;
-
- cep = dev->priv;
- spin_lock_init(&cep->lock);
-
- /* Get pointer to SCC area in parameter RAM.
- */
- ep = (scc_enet_t *)(&cp->cp_dparam[PROFF_ENET]);
-
- /* And another to the SCC register area.
- */
- sccp = (volatile scc_t *)(&cp->cp_scc[SCC_ENET]);
- cep->sccp = (scc_t *)sccp; /* Keep the pointer handy */
-
- /* Disable receive and transmit in case EPPC-Bug started it.
- */
- sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- /* Cookbook style from the MPC860 manual.....
- * Not all of this is necessary if EPPC-Bug has initialized
- * the network.
- * So far we are lucky, all board configurations use the same
- * pins, or at least the same I/O Port for these functions.....
- * It can't last though......
- */
-
-#if (defined(PA_ENET_RXD) && defined(PA_ENET_TXD))
- /* Configure port A pins for Txd and Rxd.
- */
- immap->im_ioport.iop_papar |= (PA_ENET_RXD | PA_ENET_TXD);
- immap->im_ioport.iop_padir &= ~(PA_ENET_RXD | PA_ENET_TXD);
- immap->im_ioport.iop_paodr &= ~PA_ENET_TXD;
-#elif (defined(PB_ENET_RXD) && defined(PB_ENET_TXD))
- /* Configure port B pins for Txd and Rxd.
- */
- immap->im_cpm.cp_pbpar |= (PB_ENET_RXD | PB_ENET_TXD);
- immap->im_cpm.cp_pbdir &= ~(PB_ENET_RXD | PB_ENET_TXD);
- immap->im_cpm.cp_pbodr &= ~PB_ENET_TXD;
-#else
-#error Exactly ONE pair of PA_ENET_[RT]XD, PB_ENET_[RT]XD must be defined
-#endif
-
-#if defined(PC_ENET_LBK)
- /* Configure port C pins to disable External Loopback
- */
- immap->im_ioport.iop_pcpar &= ~PC_ENET_LBK;
- immap->im_ioport.iop_pcdir |= PC_ENET_LBK;
- immap->im_ioport.iop_pcso &= ~PC_ENET_LBK;
- immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */
-#endif /* PC_ENET_LBK */
-
-#ifdef PE_ENET_TCLK
- /* Configure port E for TCLK and RCLK.
- */
- cp->cp_pepar |= (PE_ENET_TCLK | PE_ENET_RCLK);
- cp->cp_pedir &= ~(PE_ENET_TCLK | PE_ENET_RCLK);
- cp->cp_peso &= ~(PE_ENET_TCLK | PE_ENET_RCLK);
-#else
- /* Configure port A for TCLK and RCLK.
- */
- immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
- immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
-#endif
-
- /* Configure port C pins to enable CLSN and RENA.
- */
- immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
- immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
- immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- cp->cp_sicr &= ~SICR_ENET_MASK;
- cp->cp_sicr |= SICR_ENET_CLKRT;
-
- /* Manual says set SDDR, but I can't find anything with that
- * name. I think it is a misprint, and should be SDCR. This
- * has already been set by the communication processor initialization.
- */
-
- /* Allocate space for the buffer descriptors in the DP ram.
- * These are relative offsets in the DP ram address space.
- * Initialize base addresses for the buffer descriptors.
- */
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * RX_RING_SIZE, 8);
- ep->sen_genscc.scc_rbase = dp_offset;
- cep->rx_bd_base = cpm_dpram_addr(dp_offset);
-
- dp_offset = cpm_dpalloc(sizeof(cbd_t) * TX_RING_SIZE, 8);
- ep->sen_genscc.scc_tbase = dp_offset;
- cep->tx_bd_base = cpm_dpram_addr(dp_offset);
-
- cep->dirty_tx = cep->cur_tx = cep->tx_bd_base;
- cep->cur_rx = cep->rx_bd_base;
-
- /* Issue init Rx BD command for SCC.
- * Manual says to perform an Init Rx parameters here. We have
- * to perform both Rx and Tx because the SCC may have been
- * already running.
- * In addition, we have to do it later because we don't yet have
- * all of the BD control/status set properly.
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_RX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- */
-
- /* Initialize function code registers for big-endian.
- */
- ep->sen_genscc.scc_rfcr = SCC_EB;
- ep->sen_genscc.scc_tfcr = SCC_EB;
-
- /* Set maximum bytes per receive buffer.
- * This appears to be an Ethernet frame size, not the buffer
- * fragment size. It must be a multiple of four.
- */
- ep->sen_genscc.scc_mrblr = PKT_MAXBLR_SIZE;
-
- /* Set CRC preset and mask.
- */
- ep->sen_cpres = 0xffffffff;
- ep->sen_cmask = 0xdebb20e3;
-
- ep->sen_crcec = 0; /* CRC Error counter */
- ep->sen_alec = 0; /* alignment error counter */
- ep->sen_disfc = 0; /* discard frame counter */
-
- ep->sen_pads = 0x8888; /* Tx short frame pad character */
- ep->sen_retlim = 15; /* Retry limit threshold */
-
- ep->sen_maxflr = PKT_MAXBUF_SIZE; /* maximum frame length register */
- ep->sen_minflr = PKT_MINBUF_SIZE; /* minimum frame length register */
-
- ep->sen_maxd1 = PKT_MAXBLR_SIZE; /* maximum DMA1 length */
- ep->sen_maxd2 = PKT_MAXBLR_SIZE; /* maximum DMA2 length */
-
- /* Clear hash tables.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
- ep->sen_iaddr1 = 0;
- ep->sen_iaddr2 = 0;
- ep->sen_iaddr3 = 0;
- ep->sen_iaddr4 = 0;
-
- /* Set Ethernet station address.
- */
- eap = (unsigned char *)&(ep->sen_paddrh);
- for (i=5; i>=0; i--)
- *eap++ = dev->dev_addr[i] = bd->bi_enetaddr[i];
-
- ep->sen_pper = 0; /* 'cause the book says so */
- ep->sen_taddrl = 0; /* temp address (LSB) */
- ep->sen_taddrm = 0;
- ep->sen_taddrh = 0; /* temp address (MSB) */
-
- /* Now allocate the host memory pages and initialize the
- * buffer descriptors.
- */
- bdp = cep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- bdp = cep->rx_bd_base;
- k = 0;
- for (i=0; i<CPM_ENET_RX_PAGES; i++) {
-
- /* Allocate a page.
- */
- ba = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE,
- &mem_addr, GFP_KERNEL);
- /* BUG: no check for failure */
-
- /* Initialize the BD for every fragment in the page.
- */
- for (j=0; j<CPM_ENET_RX_FRPPG; j++) {
- bdp->cbd_sc = BD_ENET_RX_EMPTY | BD_ENET_RX_INTR;
- bdp->cbd_bufaddr = mem_addr;
- cep->rx_vaddr[k++] = ba;
- mem_addr += CPM_ENET_RX_FRSIZE;
- ba += CPM_ENET_RX_FRSIZE;
- bdp++;
- }
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* Let's re-initialize the channel now. We have to do it later
- * than the manual describes because we have just now finished
- * the BD initialization.
- */
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_ENET, CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- cep->skb_cur = cep->skb_dirty = 0;
-
- sccp->scc_scce = 0xffff; /* Clear any pending events */
-
- /* Enable interrupts for transmit error, complete frame
- * received, and any transmit buffer we have also set the
- * interrupt flag.
- */
- sccp->scc_sccm = (SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
-
- /* Install our interrupt handler.
- */
- cpm_install_handler(CPMVEC_ENET, scc_enet_interrupt, dev);
-
- /* Set GSMR_H to enable all normal operating modes.
- * Set GSMR_L to enable Ethernet to MC68160.
- */
- sccp->scc_gsmrh = 0;
- sccp->scc_gsmrl = (SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 | SCC_GSMRL_MODE_ENET);
-
- /* Set sync/delimiters.
- */
- sccp->scc_dsr = 0xd555;
-
- /* Set processing mode. Use Ethernet CRC, catch broadcast, and
- * start frame search 22 bit times after RENA.
- */
- sccp->scc_psmr = (SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
-
- /* It is now OK to enable the Ethernet transmitter.
- * Unfortunately, there are board implementation differences here.
- */
-#if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA) && !defined (PE_ENET_TENA))
- immap->im_ioport.iop_pcpar |= PC_ENET_TENA;
- immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
-#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && !defined (PE_ENET_TENA))
- cp->cp_pbpar |= PB_ENET_TENA;
- cp->cp_pbdir |= PB_ENET_TENA;
-#elif ( !defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && defined (PE_ENET_TENA))
- cp->cp_pepar |= PE_ENET_TENA;
- cp->cp_pedir &= ~PE_ENET_TENA;
- cp->cp_peso |= PE_ENET_TENA;
-#else
-#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA, PE_ENET_TENA
-#endif
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
- /* And while we are here, set the configuration to enable ethernet.
- */
- *((volatile uint *)RPX_CSR_ADDR) &= ~BCSR0_ETHLPBK;
- *((volatile uint *)RPX_CSR_ADDR) |=
- (BCSR0_ETHEN | BCSR0_COLTESTDIS | BCSR0_FULLDPLXDIS);
-#endif
-
-#ifdef CONFIG_BSEIP
- /* BSE uses port B and C for PHY control.
- */
- cp->cp_pbpar &= ~(PB_BSE_POWERUP | PB_BSE_FDXDIS);
- cp->cp_pbdir |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
- cp->cp_pbdat |= (PB_BSE_POWERUP | PB_BSE_FDXDIS);
-
- immap->im_ioport.iop_pcpar &= ~PC_BSE_LOOPBACK;
- immap->im_ioport.iop_pcdir |= PC_BSE_LOOPBACK;
- immap->im_ioport.iop_pcso &= ~PC_BSE_LOOPBACK;
- immap->im_ioport.iop_pcdat &= ~PC_BSE_LOOPBACK;
-#endif
-
-#ifdef CONFIG_FADS
- cp->cp_pbpar |= PB_ENET_TENA;
- cp->cp_pbdir |= PB_ENET_TENA;
-
- /* Enable the EEST PHY.
- */
- *((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
-#endif
-
- dev->base_addr = (unsigned long)ep;
-#if 0
- dev->name = "CPM_ENET";
-#endif
-
- /* The CPM Ethernet specific entries in the device structure. */
- dev->open = scc_enet_open;
- dev->hard_start_xmit = scc_enet_start_xmit;
- dev->tx_timeout = scc_enet_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = scc_enet_close;
- dev->get_stats = scc_enet_get_stats;
- dev->set_multicast_list = set_multicast_list;
-
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- /* And last, enable the transmit and receive processing.
- */
- sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- printk("%s: CPM ENET Version 0.2 on SCC%d, ", dev->name, SCC_ENET+1);
- for (i=0; i<5; i++)
- printk("%02x:", dev->dev_addr[i]);
- printk("%02x\n", dev->dev_addr[5]);
-
- return 0;
-}
-
-module_init(scc_enet_init);
-
diff --git a/arch/ppc/8xx_io/fec.c b/arch/ppc/8xx_io/fec.c
deleted file mode 100644
index 2c604d4..0000000
--- a/arch/ppc/8xx_io/fec.c
+++ /dev/null
@@ -1,1983 +0,0 @@
-/*
- * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * This version of the driver is specific to the FADS implementation,
- * since the board contains control registers external to the processor
- * for the control of the LevelOne LXT970 transceiver. The MPC860T manual
- * describes connections using the internal parallel port I/O, which
- * is basically all of Port D.
- *
- * Includes support for the following PHYs: QS6612, LXT970, LXT971/2.
- *
- * Right now, I am very wasteful with the buffers. I allocate memory
- * pages and then divide them into 2K frame buffers. This way I know I
- * have buffers large enough to hold one frame within one buffer descriptor.
- * Once I get this working, I will use 64 or 128 byte CPM buffers, which
- * will be much more memory efficient and will easily handle lots of
- * small packets.
- *
- * Much better multiple PHY support by Magnus Damm.
- * Copyright (c) 2000 Ericsson Radio Systems AB.
- *
- * Make use of MII for PHY control configurable.
- * Some fixes.
- * Copyright (c) 2000-2002 Wolfgang Denk, DENX Software Engineering.
- *
- * Support for AMD AM79C874 added.
- * Thomas Lange, thomas@corelatus.com
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/bitops.h>
-#ifdef CONFIG_FEC_PACKETHOOK
-#include <linux/pkthook.h>
-#endif
-
-#include <asm/8xx_immap.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/cpm1.h>
-
-#ifdef CONFIG_USE_MDIO
-/* Forward declarations of some structures to support different PHYs
-*/
-
-typedef struct {
- uint mii_data;
- void (*funct)(uint mii_reg, struct net_device *dev);
-} phy_cmd_t;
-
-typedef struct {
- uint id;
- char *name;
-
- const phy_cmd_t *config;
- const phy_cmd_t *startup;
- const phy_cmd_t *ack_int;
- const phy_cmd_t *shutdown;
-} phy_info_t;
-#endif /* CONFIG_USE_MDIO */
-
-/* The number of Tx and Rx buffers. These are allocated from the page
- * pool. The code may assume these are power of two, so it is best
- * to keep them that size.
- * We don't need to allocate pages for the transmitter. We just use
- * the skbuffer directly.
- */
-#ifdef CONFIG_ENET_BIG_BUFFERS
-#define FEC_ENET_RX_PAGES 16
-#define FEC_ENET_RX_FRSIZE 2048
-#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
-#define TX_RING_SIZE 16 /* Must be power of two */
-#define TX_RING_MOD_MASK 15 /* for this to work */
-#else
-#define FEC_ENET_RX_PAGES 4
-#define FEC_ENET_RX_FRSIZE 2048
-#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE)
-#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
-#define TX_RING_SIZE 8 /* Must be power of two */
-#define TX_RING_MOD_MASK 7 /* for this to work */
-#endif
-
-/* Interrupt events/masks.
-*/
-#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
-#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
-#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
-#define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
-#define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
-#define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
-#define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
-#define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
-#define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
-#define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
-
-/*
-*/
-#define FEC_ECNTRL_PINMUX 0x00000004
-#define FEC_ECNTRL_ETHER_EN 0x00000002
-#define FEC_ECNTRL_RESET 0x00000001
-
-#define FEC_RCNTRL_BC_REJ 0x00000010
-#define FEC_RCNTRL_PROM 0x00000008
-#define FEC_RCNTRL_MII_MODE 0x00000004
-#define FEC_RCNTRL_DRT 0x00000002
-#define FEC_RCNTRL_LOOP 0x00000001
-
-#define FEC_TCNTRL_FDEN 0x00000004
-#define FEC_TCNTRL_HBC 0x00000002
-#define FEC_TCNTRL_GTS 0x00000001
-
-/* Delay to wait for FEC reset command to complete (in us)
-*/
-#define FEC_RESET_DELAY 50
-
-/* The FEC stores dest/src/type, data, and checksum for receive packets.
- */
-#define PKT_MAXBUF_SIZE 1518
-#define PKT_MINBUF_SIZE 64
-#define PKT_MAXBLR_SIZE 1520
-
-/* The FEC buffer descriptors track the ring buffers. The rx_bd_base and
- * tx_bd_base always point to the base of the buffer descriptors. The
- * cur_rx and cur_tx point to the currently available buffer.
- * The dirty_tx tracks the current buffer that is being sent by the
- * controller. The cur_tx and dirty_tx are equal under both completely
- * empty and completely full conditions. The empty/ready indicator in
- * the buffer descriptor determines the actual condition.
- */
-struct fec_enet_private {
- /* The saved address of a sent-in-place packet/buffer, for skfree(). */
- struct sk_buff* tx_skbuff[TX_RING_SIZE];
- ushort skb_cur;
- ushort skb_dirty;
-
- /* CPM dual port RAM relative addresses.
- */
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
- cbd_t *dirty_tx; /* The ring entries to be free()ed. */
-
- /* Virtual addresses for the receive buffers because we can't
- * do a __va() on them anymore.
- */
- unsigned char *rx_vaddr[RX_RING_SIZE];
-
- struct net_device_stats stats;
- uint tx_full;
- spinlock_t lock;
-
-#ifdef CONFIG_USE_MDIO
- uint phy_id;
- uint phy_id_done;
- uint phy_status;
- uint phy_speed;
- phy_info_t *phy;
- struct work_struct phy_task;
- struct net_device *dev;
-
- uint sequence_done;
-
- uint phy_addr;
-#endif /* CONFIG_USE_MDIO */
-
- int link;
- int old_link;
- int full_duplex;
-
-#ifdef CONFIG_FEC_PACKETHOOK
- unsigned long ph_lock;
- fec_ph_func *ph_rxhandler;
- fec_ph_func *ph_txhandler;
- __u16 ph_proto;
- volatile __u32 *ph_regaddr;
- void *ph_priv;
-#endif
-};
-
-static int fec_enet_open(struct net_device *dev);
-static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
-#ifdef CONFIG_USE_MDIO
-static void fec_enet_mii(struct net_device *dev);
-#endif /* CONFIG_USE_MDIO */
-#ifdef CONFIG_FEC_PACKETHOOK
-static void fec_enet_tx(struct net_device *dev, __u32 regval);
-static void fec_enet_rx(struct net_device *dev, __u32 regval);
-#else
-static void fec_enet_tx(struct net_device *dev);
-static void fec_enet_rx(struct net_device *dev);
-#endif
-static int fec_enet_close(struct net_device *dev);
-static struct net_device_stats *fec_enet_get_stats(struct net_device *dev);
-static void set_multicast_list(struct net_device *dev);
-static void fec_restart(struct net_device *dev, int duplex);
-static void fec_stop(struct net_device *dev);
-static ushort my_enet_addr[3];
-
-#ifdef CONFIG_USE_MDIO
-/* MII processing. We keep this as simple as possible. Requests are
- * placed on the list (if there is room). When the request is finished
- * by the MII, an optional function may be called.
- */
-typedef struct mii_list {
- uint mii_regval;
- void (*mii_func)(uint val, struct net_device *dev);
- struct mii_list *mii_next;
-} mii_list_t;
-
-#define NMII 20
-mii_list_t mii_cmds[NMII];
-mii_list_t *mii_free;
-mii_list_t *mii_head;
-mii_list_t *mii_tail;
-
-static int mii_queue(struct net_device *dev, int request,
- void (*func)(uint, struct net_device *));
-
-/* Make MII read/write commands for the FEC.
-*/
-#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
-#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \
- (VAL & 0xffff))
-#define mk_mii_end 0
-#endif /* CONFIG_USE_MDIO */
-
-/* Transmitter timeout.
-*/
-#define TX_TIMEOUT (2*HZ)
-
-#ifdef CONFIG_USE_MDIO
-/* Register definitions for the PHY.
-*/
-
-#define MII_REG_CR 0 /* Control Register */
-#define MII_REG_SR 1 /* Status Register */
-#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */
-#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */
-#define MII_REG_ANAR 4 /* A-N Advertisement Register */
-#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */
-#define MII_REG_ANER 6 /* A-N Expansion Register */
-#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */
-#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */
-
-/* values for phy_status */
-
-#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
-#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
-#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
-#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
-#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
-#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
-#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
-
-#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
-#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
-#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
-#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
-#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
-#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
-#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
-#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
-#endif /* CONFIG_USE_MDIO */
-
-#ifdef CONFIG_FEC_PACKETHOOK
-int
-fec_register_ph(struct net_device *dev, fec_ph_func *rxfun, fec_ph_func *txfun,
- __u16 proto, volatile __u32 *regaddr, void *priv)
-{
- struct fec_enet_private *fep;
- int retval = 0;
-
- fep = dev->priv;
-
- if (test_and_set_bit(0, (void*)&fep->ph_lock) != 0) {
- /* Someone is messing with the packet hook */
- return -EAGAIN;
- }
- if (fep->ph_rxhandler != NULL || fep->ph_txhandler != NULL) {
- retval = -EBUSY;
- goto out;
- }
- fep->ph_rxhandler = rxfun;
- fep->ph_txhandler = txfun;
- fep->ph_proto = proto;
- fep->ph_regaddr = regaddr;
- fep->ph_priv = priv;
-
- out:
- fep->ph_lock = 0;
-
- return retval;
-}
-
-
-int
-fec_unregister_ph(struct net_device *dev)
-{
- struct fec_enet_private *fep;
- int retval = 0;
-
- fep = dev->priv;
-
- if (test_and_set_bit(0, (void*)&fep->ph_lock) != 0) {
- /* Someone is messing with the packet hook */
- return -EAGAIN;
- }
-
- fep->ph_rxhandler = fep->ph_txhandler = NULL;
- fep->ph_proto = 0;
- fep->ph_regaddr = NULL;
- fep->ph_priv = NULL;
-
- fep->ph_lock = 0;
-
- return retval;
-}
-
-EXPORT_SYMBOL(fec_register_ph);
-EXPORT_SYMBOL(fec_unregister_ph);
-
-#endif /* CONFIG_FEC_PACKETHOOK */
-
-static int
-fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct fec_enet_private *fep;
- volatile fec_t *fecp;
- volatile cbd_t *bdp;
-
- fep = dev->priv;
- fecp = (volatile fec_t*)dev->base_addr;
-
- if (!fep->link) {
- /* Link is down or autonegotiation is in progress. */
- return 1;
- }
-
- /* Fill in a Tx ring entry */
- bdp = fep->cur_tx;
-
-#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- /* Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since dev->tbusy should be set.
- */
- printk("%s: tx queue full!.\n", dev->name);
- return 1;
- }
-#endif
-
- /* Clear all of the status flags.
- */
- bdp->cbd_sc &= ~BD_ENET_TX_STATS;
-
- /* Set buffer length and buffer pointer.
- */
- bdp->cbd_bufaddr = __pa(skb->data);
- bdp->cbd_datlen = skb->len;
-
- /* Save skb pointer.
- */
- fep->tx_skbuff[fep->skb_cur] = skb;
-
- fep->stats.tx_bytes += skb->len;
- fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK;
-
- /* Push the data cache so the CPM does not get stale memory
- * data.
- */
- flush_dcache_range((unsigned long)skb->data,
- (unsigned long)skb->data + skb->len);
-
- /* disable interrupts while triggering transmit */
- spin_lock_irq(&fep->lock);
-
- /* Send it on its way. Tell FEC its ready, interrupt when done,
- * its the last BD of the frame, and to put the CRC on the end.
- */
-
- bdp->cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
- | BD_ENET_TX_LAST | BD_ENET_TX_TC);
-
- dev->trans_start = jiffies;
-
- /* Trigger transmission start */
- fecp->fec_x_des_active = 0x01000000;
-
- /* If this was the last BD in the ring, start at the beginning again.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP) {
- bdp = fep->tx_bd_base;
- } else {
- bdp++;
- }
-
- if (bdp->cbd_sc & BD_ENET_TX_READY) {
- netif_stop_queue(dev);
- fep->tx_full = 1;
- }
-
- fep->cur_tx = (cbd_t *)bdp;
-
- spin_unlock_irq(&fep->lock);
-
- return 0;
-}
-
-static void
-fec_timeout(struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
-
- printk("%s: transmit timed out.\n", dev->name);
- fep->stats.tx_errors++;
-#ifndef final_version
- {
- int i;
- cbd_t *bdp;
-
- printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n",
- (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "",
- (unsigned long)fep->dirty_tx,
- (unsigned long)fep->cur_rx);
-
- bdp = fep->tx_bd_base;
- printk(" tx: %u buffers\n", TX_RING_SIZE);
- for (i = 0 ; i < TX_RING_SIZE; i++) {
- printk(" %08x: %04x %04x %08x\n",
- (uint) bdp,
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp++;
- }
-
- bdp = fep->rx_bd_base;
- printk(" rx: %lu buffers\n", RX_RING_SIZE);
- for (i = 0 ; i < RX_RING_SIZE; i++) {
- printk(" %08x: %04x %04x %08x\n",
- (uint) bdp,
- bdp->cbd_sc,
- bdp->cbd_datlen,
- bdp->cbd_bufaddr);
- bdp++;
- }
- }
-#endif
- if (!fep->tx_full)
- netif_wake_queue(dev);
-}
-
-/* The interrupt handler.
- * This is called from the MPC core interrupt.
- */
-static irqreturn_t
-fec_enet_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- volatile fec_t *fecp;
- uint int_events;
-#ifdef CONFIG_FEC_PACKETHOOK
- struct fec_enet_private *fep = dev->priv;
- __u32 regval;
-
- if (fep->ph_regaddr) regval = *fep->ph_regaddr;
-#endif
- fecp = (volatile fec_t*)dev->base_addr;
-
- /* Get the interrupt events that caused us to be here.
- */
- while ((int_events = fecp->fec_ievent) != 0) {
- fecp->fec_ievent = int_events;
- if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
- FEC_ENET_BABT | FEC_ENET_EBERR)) != 0) {
- printk("FEC ERROR %x\n", int_events);
- }
-
- /* Handle receive event in its own function.
- */
- if (int_events & FEC_ENET_RXF) {
-#ifdef CONFIG_FEC_PACKETHOOK
- fec_enet_rx(dev, regval);
-#else
- fec_enet_rx(dev);
-#endif
- }
-
- /* Transmit OK, or non-fatal error. Update the buffer
- descriptors. FEC handles all errors, we just discover
- them as part of the transmit process.
- */
- if (int_events & FEC_ENET_TXF) {
-#ifdef CONFIG_FEC_PACKETHOOK
- fec_enet_tx(dev, regval);
-#else
- fec_enet_tx(dev);
-#endif
- }
-
- if (int_events & FEC_ENET_MII) {
-#ifdef CONFIG_USE_MDIO
- fec_enet_mii(dev);
-#else
-printk("%s[%d] %s: unexpected FEC_ENET_MII event\n", __FILE__, __LINE__, __func__);
-#endif /* CONFIG_USE_MDIO */
- }
-
- }
- return IRQ_RETVAL(IRQ_HANDLED);
-}
-
-
-static void
-#ifdef CONFIG_FEC_PACKETHOOK
-fec_enet_tx(struct net_device *dev, __u32 regval)
-#else
-fec_enet_tx(struct net_device *dev)
-#endif
-{
- struct fec_enet_private *fep;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
-
- fep = dev->priv;
- /* lock while transmitting */
- spin_lock(&fep->lock);
- bdp = fep->dirty_tx;
-
- while ((bdp->cbd_sc&BD_ENET_TX_READY) == 0) {
- if (bdp == fep->cur_tx && fep->tx_full == 0) break;
-
- skb = fep->tx_skbuff[fep->skb_dirty];
- /* Check for errors. */
- if (bdp->cbd_sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
- BD_ENET_TX_RL | BD_ENET_TX_UN |
- BD_ENET_TX_CSL)) {
- fep->stats.tx_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_HB) /* No heartbeat */
- fep->stats.tx_heartbeat_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_LC) /* Late collision */
- fep->stats.tx_window_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_RL) /* Retrans limit */
- fep->stats.tx_aborted_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_UN) /* Underrun */
- fep->stats.tx_fifo_errors++;
- if (bdp->cbd_sc & BD_ENET_TX_CSL) /* Carrier lost */
- fep->stats.tx_carrier_errors++;
- } else {
-#ifdef CONFIG_FEC_PACKETHOOK
- /* Packet hook ... */
- if (fep->ph_txhandler &&
- ((struct ethhdr *)skb->data)->h_proto
- == fep->ph_proto) {
- fep->ph_txhandler((__u8*)skb->data, skb->len,
- regval, fep->ph_priv);
- }
-#endif
- fep->stats.tx_packets++;
- }
-
-#ifndef final_version
- if (bdp->cbd_sc & BD_ENET_TX_READY)
- printk("HEY! Enet xmit interrupt and TX_READY.\n");
-#endif
- /* Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (bdp->cbd_sc & BD_ENET_TX_DEF)
- fep->stats.collisions++;
-
- /* Free the sk buffer associated with this last transmit.
- */
-#if 0
-printk("TXI: %x %x %x\n", bdp, skb, fep->skb_dirty);
-#endif
- dev_kfree_skb_irq (skb/*, FREE_WRITE*/);
- fep->tx_skbuff[fep->skb_dirty] = NULL;
- fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;
-
- /* Update pointer to next buffer descriptor to be transmitted.
- */
- if (bdp->cbd_sc & BD_ENET_TX_WRAP)
- bdp = fep->tx_bd_base;
- else
- bdp++;
-
- /* Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (fep->tx_full) {
- fep->tx_full = 0;
- if (netif_queue_stopped(dev))
- netif_wake_queue(dev);
- }
-#ifdef CONFIG_FEC_PACKETHOOK
- /* Re-read register. Not exactly guaranteed to be correct,
- but... */
- if (fep->ph_regaddr) regval = *fep->ph_regaddr;
-#endif
- }
- fep->dirty_tx = (cbd_t *)bdp;
- spin_unlock(&fep->lock);
-}
-
-
-/* During a receive, the cur_rx points to the current incoming buffer.
- * When we update through the ring, if the next incoming buffer has
- * not been given to the system, we just set the empty indicator,
- * effectively tossing the packet.
- */
-static void
-#ifdef CONFIG_FEC_PACKETHOOK
-fec_enet_rx(struct net_device *dev, __u32 regval)
-#else
-fec_enet_rx(struct net_device *dev)
-#endif
-{
- struct fec_enet_private *fep;
- volatile fec_t *fecp;
- volatile cbd_t *bdp;
- struct sk_buff *skb;
- ushort pkt_len;
- __u8 *data;
-
- fep = dev->priv;
- fecp = (volatile fec_t*)dev->base_addr;
-
- /* First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = fep->cur_rx;
-
-while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) {
-
-#ifndef final_version
- /* Since we have allocated space to hold a complete frame,
- * the last indicator should be set.
- */
- if ((bdp->cbd_sc & BD_ENET_RX_LAST) == 0)
- printk("FEC ENET: rcv is not +last\n");
-#endif
-
- /* Check for errors. */
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
- BD_ENET_RX_CR | BD_ENET_RX_OV)) {
- fep->stats.rx_errors++;
- if (bdp->cbd_sc & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
- /* Frame too long or too short. */
- fep->stats.rx_length_errors++;
- }
- if (bdp->cbd_sc & BD_ENET_RX_NO) /* Frame alignment */
- fep->stats.rx_frame_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_CR) /* CRC Error */
- fep->stats.rx_crc_errors++;
- if (bdp->cbd_sc & BD_ENET_RX_OV) /* FIFO overrun */
- fep->stats.rx_crc_errors++;
- }
-
- /* Report late collisions as a frame error.
- * On this error, the BD is closed, but we don't know what we
- * have in the buffer. So, just drop this frame on the floor.
- */
- if (bdp->cbd_sc & BD_ENET_RX_CL) {
- fep->stats.rx_errors++;
- fep->stats.rx_frame_errors++;
- goto rx_processing_done;
- }
-
- /* Process the incoming frame.
- */
- fep->stats.rx_packets++;
- pkt_len = bdp->cbd_datlen;
- fep->stats.rx_bytes += pkt_len;
- data = fep->rx_vaddr[bdp - fep->rx_bd_base];
-
-#ifdef CONFIG_FEC_PACKETHOOK
- /* Packet hook ... */
- if (fep->ph_rxhandler) {
- if (((struct ethhdr *)data)->h_proto == fep->ph_proto) {
- switch (fep->ph_rxhandler(data, pkt_len, regval,
- fep->ph_priv)) {
- case 1:
- goto rx_processing_done;
- break;
- case 0:
- break;
- default:
- fep->stats.rx_errors++;
- goto rx_processing_done;
- }
- }
- }
-
- /* If it wasn't filtered - copy it to an sk buffer. */
-#endif
-
- /* This does 16 byte alignment, exactly what we need.
- * The packet length includes FCS, but we don't want to
- * include that when passing upstream as it messes up
- * bridging applications.
- */
- skb = dev_alloc_skb(pkt_len-4);
-
- if (skb == NULL) {
- printk("%s: Memory squeeze, dropping packet.\n", dev->name);
- fep->stats.rx_dropped++;
- } else {
- skb_put(skb,pkt_len-4); /* Make room */
- skb_copy_to_linear_data(skb, data, pkt_len-4);
- skb->protocol=eth_type_trans(skb,dev);
- netif_rx(skb);
- }
- rx_processing_done:
-
- /* Clear the status flags for this buffer.
- */
- bdp->cbd_sc &= ~BD_ENET_RX_STATS;
-
- /* Mark the buffer empty.
- */
- bdp->cbd_sc |= BD_ENET_RX_EMPTY;
-
- /* Update BD pointer to next entry.
- */
- if (bdp->cbd_sc & BD_ENET_RX_WRAP)
- bdp = fep->rx_bd_base;
- else
- bdp++;
-
-#if 1
- /* Doing this here will keep the FEC running while we process
- * incoming frames. On a heavily loaded network, we should be
- * able to keep up at the expense of system resources.
- */
- fecp->fec_r_des_active = 0x01000000;
-#endif
-#ifdef CONFIG_FEC_PACKETHOOK
- /* Re-read register. Not exactly guaranteed to be correct,
- but... */
- if (fep->ph_regaddr) regval = *fep->ph_regaddr;
-#endif
- } /* while (!(bdp->cbd_sc & BD_ENET_RX_EMPTY)) */
- fep->cur_rx = (cbd_t *)bdp;
-
-#if 0
- /* Doing this here will allow us to process all frames in the
- * ring before the FEC is allowed to put more there. On a heavily
- * loaded network, some frames may be lost. Unfortunately, this
- * increases the interrupt overhead since we can potentially work
- * our way back to the interrupt return only to come right back
- * here.
- */
- fecp->fec_r_des_active = 0x01000000;
-#endif
-}
-
-
-#ifdef CONFIG_USE_MDIO
-static void
-fec_enet_mii(struct net_device *dev)
-{
- struct fec_enet_private *fep;
- volatile fec_t *ep;
- mii_list_t *mip;
- uint mii_reg;
-
- fep = (struct fec_enet_private *)dev->priv;
- ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec);
- mii_reg = ep->fec_mii_data;
-
- if ((mip = mii_head) == NULL) {
- printk("MII and no head!\n");
- return;
- }
-
- if (mip->mii_func != NULL)
- (*(mip->mii_func))(mii_reg, dev);
-
- mii_head = mip->mii_next;
- mip->mii_next = mii_free;
- mii_free = mip;
-
- if ((mip = mii_head) != NULL) {
- ep->fec_mii_data = mip->mii_regval;
-
- }
-}
-
-static int
-mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *))
-{
- struct fec_enet_private *fep;
- unsigned long flags;
- mii_list_t *mip;
- int retval;
-
- /* Add PHY address to register command.
- */
- fep = dev->priv;
- regval |= fep->phy_addr << 23;
-
- retval = 0;
-
- /* lock while modifying mii_list */
- spin_lock_irqsave(&fep->lock, flags);
-
- if ((mip = mii_free) != NULL) {
- mii_free = mip->mii_next;
- mip->mii_regval = regval;
- mip->mii_func = func;
- mip->mii_next = NULL;
- if (mii_head) {
- mii_tail->mii_next = mip;
- mii_tail = mip;
- } else {
- mii_head = mii_tail = mip;
- (&(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec))->fec_mii_data = regval;
- }
- } else {
- retval = 1;
- }
-
- spin_unlock_irqrestore(&fep->lock, flags);
-
- return(retval);
-}
-
-static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c)
-{
- int k;
-
- if(!c)
- return;
-
- for(k = 0; (c+k)->mii_data != mk_mii_end; k++)
- mii_queue(dev, (c+k)->mii_data, (c+k)->funct);
-}
-
-static void mii_parse_sr(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);
-
- if (mii_reg & 0x0004)
- *s |= PHY_STAT_LINK;
- if (mii_reg & 0x0010)
- *s |= PHY_STAT_FAULT;
- if (mii_reg & 0x0020)
- *s |= PHY_STAT_ANC;
-
- fep->link = (*s & PHY_STAT_LINK) ? 1 : 0;
-}
-
-static void mii_parse_cr(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_CONF_ANE | PHY_CONF_LOOP);
-
- if (mii_reg & 0x1000)
- *s |= PHY_CONF_ANE;
- if (mii_reg & 0x4000)
- *s |= PHY_CONF_LOOP;
-}
-
-static void mii_parse_anar(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_CONF_SPMASK);
-
- if (mii_reg & 0x0020)
- *s |= PHY_CONF_10HDX;
- if (mii_reg & 0x0040)
- *s |= PHY_CONF_10FDX;
- if (mii_reg & 0x0080)
- *s |= PHY_CONF_100HDX;
- if (mii_reg & 0x00100)
- *s |= PHY_CONF_100FDX;
-}
-#if 0
-static void mii_disp_reg(uint mii_reg, struct net_device *dev)
-{
- printk("reg %u = 0x%04x\n", (mii_reg >> 18) & 0x1f, mii_reg & 0xffff);
-}
-#endif
-
-/* ------------------------------------------------------------------------- */
-/* The Level one LXT970 is used by many boards */
-
-#ifdef CONFIG_FEC_LXT970
-
-#define MII_LXT970_MIRROR 16 /* Mirror register */
-#define MII_LXT970_IER 17 /* Interrupt Enable Register */
-#define MII_LXT970_ISR 18 /* Interrupt Status Register */
-#define MII_LXT970_CONFIG 19 /* Configuration Register */
-#define MII_LXT970_CSR 20 /* Chip Status Register */
-
-static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_STAT_SPMASK);
-
- if (mii_reg & 0x0800) {
- if (mii_reg & 0x1000)
- *s |= PHY_STAT_100FDX;
- else
- *s |= PHY_STAT_100HDX;
- }
- else {
- if (mii_reg & 0x1000)
- *s |= PHY_STAT_10FDX;
- else
- *s |= PHY_STAT_10HDX;
- }
-}
-
-static phy_info_t phy_info_lxt970 = {
- 0x07810000,
- "LXT970",
-
- (const phy_cmd_t []) { /* config */
-#if 0
-// { mk_mii_write(MII_REG_ANAR, 0x0021), NULL },
-
- /* Set default operation of 100-TX....for some reason
- * some of these bits are set on power up, which is wrong.
- */
- { mk_mii_write(MII_LXT970_CONFIG, 0), NULL },
-#endif
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* read SR and ISR to acknowledge */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_LXT970_ISR), NULL },
-
- /* find out the current status */
-
- { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_LXT970_IER, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_LXT970 */
-
-/* ------------------------------------------------------------------------- */
-/* The Level one LXT971 is used on some of my custom boards */
-
-#ifdef CONFIG_FEC_LXT971
-
-/* register definitions for the 971 */
-
-#define MII_LXT971_PCR 16 /* Port Control Register */
-#define MII_LXT971_SR2 17 /* Status Register 2 */
-#define MII_LXT971_IER 18 /* Interrupt Enable Register */
-#define MII_LXT971_ISR 19 /* Interrupt Status Register */
-#define MII_LXT971_LCR 20 /* LED Control Register */
-#define MII_LXT971_TCR 30 /* Transmit Control Register */
-
-/*
- * I had some nice ideas of running the MDIO faster...
- * The 971 should support 8MHz and I tried it, but things acted really
- * weird, so 2.5 MHz ought to be enough for anyone...
- */
-
-static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_STAT_SPMASK);
-
- if (mii_reg & 0x4000) {
- if (mii_reg & 0x0200)
- *s |= PHY_STAT_100FDX;
- else
- *s |= PHY_STAT_100HDX;
- }
- else {
- if (mii_reg & 0x0200)
- *s |= PHY_STAT_10FDX;
- else
- *s |= PHY_STAT_10HDX;
- }
- if (mii_reg & 0x0008)
- *s |= PHY_STAT_FAULT;
-}
-
-static phy_info_t phy_info_lxt971 = {
- 0x0001378e,
- "LXT971",
-
- (const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_REG_ANAR, 0x021), NULL }, /* 10 Mbps, HD */
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
-
- /* Somehow does the 971 tell me that the link is down
- * the first read after power-up.
- * read here to get a valid value in ack_int */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* find out the current status */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
-
- /* we only need to read ISR to acknowledge */
-
- { mk_mii_read(MII_LXT971_ISR), NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_LXT971_IER, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_LXT970 */
-
-
-/* ------------------------------------------------------------------------- */
-/* The Quality Semiconductor QS6612 is used on the RPX CLLF */
-
-#ifdef CONFIG_FEC_QS6612
-
-/* register definitions */
-
-#define MII_QS6612_MCR 17 /* Mode Control Register */
-#define MII_QS6612_FTR 27 /* Factory Test Register */
-#define MII_QS6612_MCO 28 /* Misc. Control Register */
-#define MII_QS6612_ISR 29 /* Interrupt Source Register */
-#define MII_QS6612_IMR 30 /* Interrupt Mask Register */
-#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */
-
-static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- *s &= ~(PHY_STAT_SPMASK);
-
- switch((mii_reg >> 2) & 7) {
- case 1: *s |= PHY_STAT_10HDX; break;
- case 2: *s |= PHY_STAT_100HDX; break;
- case 5: *s |= PHY_STAT_10FDX; break;
- case 6: *s |= PHY_STAT_100FDX; break;
- }
-}
-
-static phy_info_t phy_info_qs6612 = {
- 0x00181440,
- "QS6612",
-
- (const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_REG_ANAR, 0x061), NULL }, /* 10 Mbps */
-
- /* The PHY powers up isolated on the RPX,
- * so send a command to allow operation.
- */
-
- { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL },
-
- /* parse cr and anar to get some info */
-
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
-
- /* we need to read ISR, SR and ANER to acknowledge */
-
- { mk_mii_read(MII_QS6612_ISR), NULL },
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_REG_ANER), NULL },
-
- /* read pcr to get info */
-
- { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_QS6612 */
-
-/* ------------------------------------------------------------------------- */
-/* The Advanced Micro Devices AM79C874 is used on the ICU862 */
-
-#ifdef CONFIG_FEC_AM79C874
-
-/* register definitions for the 79C874 */
-
-#define MII_AM79C874_MFR 16 /* Miscellaneous Features Register */
-#define MII_AM79C874_ICSR 17 /* Interrupt Control/Status Register */
-#define MII_AM79C874_DR 18 /* Diagnostic Register */
-#define MII_AM79C874_PMLR 19 /* Power Management & Loopback Register */
-#define MII_AM79C874_MCR 21 /* Mode Control Register */
-#define MII_AM79C874_DC 23 /* Disconnect Counter */
-#define MII_AM79C874_REC 24 /* Receiver Error Counter */
-
-static void mii_parse_amd79c874_dr(uint mii_reg, struct net_device *dev, uint data)
-{
- volatile struct fec_enet_private *fep = dev->priv;
- uint s = fep->phy_status;
-
- s &= ~(PHY_STAT_SPMASK);
-
- /* Register 18: Bit 10 is data rate, 11 is Duplex */
- switch ((mii_reg >> 10) & 3) {
- case 0: s |= PHY_STAT_10HDX; break;
- case 1: s |= PHY_STAT_100HDX; break;
- case 2: s |= PHY_STAT_10FDX; break;
- case 3: s |= PHY_STAT_100FDX; break;
- }
-
- fep->phy_status = s;
-}
-
-static phy_info_t phy_info_amd79c874 = {
- 0x00022561,
- "AM79C874",
-
- (const phy_cmd_t []) { /* config */
-// { mk_mii_write(MII_REG_ANAR, 0x021), NULL }, /* 10 Mbps, HD */
- { mk_mii_read(MII_REG_CR), mii_parse_cr },
- { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* startup - enable interrupts */
- { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL },
- { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* ack_int */
- /* find out the current status */
-
- { mk_mii_read(MII_REG_SR), mii_parse_sr },
- { mk_mii_read(MII_AM79C874_DR), mii_parse_amd79c874_dr },
-
- /* we only need to read ICSR to acknowledge */
-
- { mk_mii_read(MII_AM79C874_ICSR), NULL },
- { mk_mii_end, }
- },
- (const phy_cmd_t []) { /* shutdown - disable interrupts */
- { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL },
- { mk_mii_end, }
- },
-};
-
-#endif /* CONFIG_FEC_AM79C874 */
-
-static phy_info_t *phy_info[] = {
-
-#ifdef CONFIG_FEC_LXT970
- &phy_info_lxt970,
-#endif /* CONFIG_FEC_LXT970 */
-
-#ifdef CONFIG_FEC_LXT971
- &phy_info_lxt971,
-#endif /* CONFIG_FEC_LXT971 */
-
-#ifdef CONFIG_FEC_QS6612
- &phy_info_qs6612,
-#endif /* CONFIG_FEC_QS6612 */
-
-#ifdef CONFIG_FEC_AM79C874
- &phy_info_amd79c874,
-#endif /* CONFIG_FEC_AM79C874 */
-
- NULL
-};
-
-static void mii_display_status(struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
- volatile uint *s = &(fep->phy_status);
-
- if (!fep->link && !fep->old_link) {
- /* Link is still down - don't print anything */
- return;
- }
-
- printk("%s: status: ", dev->name);
-
- if (!fep->link) {
- printk("link down");
- } else {
- printk("link up");
-
- switch(*s & PHY_STAT_SPMASK) {
- case PHY_STAT_100FDX: printk(", 100 Mbps Full Duplex"); break;
- case PHY_STAT_100HDX: printk(", 100 Mbps Half Duplex"); break;
- case PHY_STAT_10FDX: printk(", 10 Mbps Full Duplex"); break;
- case PHY_STAT_10HDX: printk(", 10 Mbps Half Duplex"); break;
- default:
- printk(", Unknown speed/duplex");
- }
-
- if (*s & PHY_STAT_ANC)
- printk(", auto-negotiation complete");
- }
-
- if (*s & PHY_STAT_FAULT)
- printk(", remote fault");
-
- printk(".\n");
-}
-
-static void mii_display_config(struct work_struct *work)
-{
- struct fec_enet_private *fep =
- container_of(work, struct fec_enet_private, phy_task);
- struct net_device *dev = fep->dev;
- volatile uint *s = &(fep->phy_status);
-
- printk("%s: config: auto-negotiation ", dev->name);
-
- if (*s & PHY_CONF_ANE)
- printk("on");
- else
- printk("off");
-
- if (*s & PHY_CONF_100FDX)
- printk(", 100FDX");
- if (*s & PHY_CONF_100HDX)
- printk(", 100HDX");
- if (*s & PHY_CONF_10FDX)
- printk(", 10FDX");
- if (*s & PHY_CONF_10HDX)
- printk(", 10HDX");
- if (!(*s & PHY_CONF_SPMASK))
- printk(", No speed/duplex selected?");
-
- if (*s & PHY_CONF_LOOP)
- printk(", loopback enabled");
-
- printk(".\n");
-
- fep->sequence_done = 1;
-}
-
-static void mii_relink(struct work_struct *work)
-{
- struct fec_enet_private *fep =
- container_of(work, struct fec_enet_private, phy_task);
- struct net_device *dev = fep->dev;
- int duplex;
-
- fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
- mii_display_status(dev);
- fep->old_link = fep->link;
-
- if (fep->link) {
- duplex = 0;
- if (fep->phy_status
- & (PHY_STAT_100FDX | PHY_STAT_10FDX))
- duplex = 1;
- fec_restart(dev, duplex);
- }
- else
- fec_stop(dev);
-
-#if 0
- enable_irq(fep->mii_irq);
-#endif
-
-}
-
-static void mii_queue_relink(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
-
- fep->dev = dev;
- INIT_WORK(&fep->phy_task, mii_relink);
- schedule_work(&fep->phy_task);
-}
-
-static void mii_queue_config(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
-
- fep->dev = dev;
- INIT_WORK(&fep->phy_task, mii_display_config);
- schedule_work(&fep->phy_task);
-}
-
-
-
-phy_cmd_t phy_cmd_relink[] = { { mk_mii_read(MII_REG_CR), mii_queue_relink },
- { mk_mii_end, } };
-phy_cmd_t phy_cmd_config[] = { { mk_mii_read(MII_REG_CR), mii_queue_config },
- { mk_mii_end, } };
-
-
-
-/* Read remainder of PHY ID.
-*/
-static void
-mii_discover_phy3(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep;
- int i;
-
- fep = dev->priv;
- fep->phy_id |= (mii_reg & 0xffff);
-
- for(i = 0; phy_info[i]; i++)
- if(phy_info[i]->id == (fep->phy_id >> 4))
- break;
-
- if(!phy_info[i])
- panic("%s: PHY id 0x%08x is not supported!\n",
- dev->name, fep->phy_id);
-
- fep->phy = phy_info[i];
- fep->phy_id_done = 1;
-
- printk("%s: Phy @ 0x%x, type %s (0x%08x)\n",
- dev->name, fep->phy_addr, fep->phy->name, fep->phy_id);
-}
-
-/* Scan all of the MII PHY addresses looking for someone to respond
- * with a valid ID. This usually happens quickly.
- */
-static void
-mii_discover_phy(uint mii_reg, struct net_device *dev)
-{
- struct fec_enet_private *fep;
- uint phytype;
-
- fep = dev->priv;
-
- if ((phytype = (mii_reg & 0xffff)) != 0xffff) {
-
- /* Got first part of ID, now get remainder.
- */
- fep->phy_id = phytype << 16;
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), mii_discover_phy3);
- } else {
- fep->phy_addr++;
- if (fep->phy_addr < 32) {
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR1),
- mii_discover_phy);
- } else {
- printk("fec: No PHY device found.\n");
- }
- }
-}
-#endif /* CONFIG_USE_MDIO */
-
-/* This interrupt occurs when the PHY detects a link change.
-*/
-static
-#ifdef CONFIG_RPXCLASSIC
-void mii_link_interrupt(void *dev_id)
-#else
-irqreturn_t mii_link_interrupt(int irq, void * dev_id)
-#endif
-{
-#ifdef CONFIG_USE_MDIO
- struct net_device *dev = dev_id;
- struct fec_enet_private *fep = dev->priv;
- volatile immap_t *immap = (immap_t *)IMAP_ADDR;
- volatile fec_t *fecp = &(immap->im_cpm.cp_fec);
- unsigned int ecntrl = fecp->fec_ecntrl;
-
- /* We need the FEC enabled to access the MII
- */
- if ((ecntrl & FEC_ECNTRL_ETHER_EN) == 0) {
- fecp->fec_ecntrl |= FEC_ECNTRL_ETHER_EN;
- }
-#endif /* CONFIG_USE_MDIO */
-
-#if 0
- disable_irq(fep->mii_irq); /* disable now, enable later */
-#endif
-
-
-#ifdef CONFIG_USE_MDIO
- mii_do_cmd(dev, fep->phy->ack_int);
- mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */
-
- if ((ecntrl & FEC_ECNTRL_ETHER_EN) == 0) {
- fecp->fec_ecntrl = ecntrl; /* restore old settings */
- }
-#else
-printk("%s[%d] %s: unexpected Link interrupt\n", __FILE__, __LINE__, __func__);
-#endif /* CONFIG_USE_MDIO */
-
-#ifndef CONFIG_RPXCLASSIC
- return IRQ_RETVAL(IRQ_HANDLED);
-#endif /* CONFIG_RPXCLASSIC */
-}
-
-static int
-fec_enet_open(struct net_device *dev)
-{
- struct fec_enet_private *fep = dev->priv;
-
- /* I should reset the ring buffers here, but I don't yet know
- * a simple way to do that.
- */
-
-#ifdef CONFIG_USE_MDIO
- fep->sequence_done = 0;
- fep->link = 0;
-
- if (fep->phy) {
- mii_do_cmd(dev, fep->phy->ack_int);
- mii_do_cmd(dev, fep->phy->config);
- mii_do_cmd(dev, phy_cmd_config); /* display configuration */
- while(!fep->sequence_done)
- schedule();
-
- mii_do_cmd(dev, fep->phy->startup);
- netif_start_queue(dev);
- return 0; /* Success */
- }
- return -ENODEV; /* No PHY we understand */
-#else
- fep->link = 1;
- netif_start_queue(dev);
- return 0; /* Success */
-#endif /* CONFIG_USE_MDIO */
-
-}
-
-static int
-fec_enet_close(struct net_device *dev)
-{
- /* Don't know what to do yet.
- */
- netif_stop_queue(dev);
- fec_stop(dev);
-
- return 0;
-}
-
-static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
-{
- struct fec_enet_private *fep = (struct fec_enet_private *)dev->priv;
-
- return &fep->stats;
-}
-
-/* Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-
-static void set_multicast_list(struct net_device *dev)
-{
- struct fec_enet_private *fep;
- volatile fec_t *ep;
-
- fep = (struct fec_enet_private *)dev->priv;
- ep = &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec);
-
- if (dev->flags&IFF_PROMISC) {
-
- /* Log any net taps. */
- printk("%s: Promiscuous mode enabled.\n", dev->name);
- ep->fec_r_cntrl |= FEC_RCNTRL_PROM;
- } else {
-
- ep->fec_r_cntrl &= ~FEC_RCNTRL_PROM;
-
- if (dev->flags & IFF_ALLMULTI) {
- /* Catch all multicast addresses, so set the
- * filter to all 1's.
- */
- ep->fec_hash_table_high = 0xffffffff;
- ep->fec_hash_table_low = 0xffffffff;
- }
-#if 0
- else {
- /* Clear filter and add the addresses in the list.
- */
- ep->sen_gaddr1 = 0;
- ep->sen_gaddr2 = 0;
- ep->sen_gaddr3 = 0;
- ep->sen_gaddr4 = 0;
-
- dmi = dev->mc_list;
-
- for (i=0; i<dev->mc_count; i++) {
-
- /* Only support group multicast for now.
- */
- if (!(dmi->dmi_addr[0] & 1))
- continue;
-
- /* The address in dmi_addr is LSB first,
- * and taddr is MSB first. We have to
- * copy bytes MSB first from dmi_addr.
- */
- mcptr = (u_char *)dmi->dmi_addr + 5;
- tdptr = (u_char *)&ep->sen_taddrh;
- for (j=0; j<6; j++)
- *tdptr++ = *mcptr--;
-
- /* Ask CPM to run CRC and set bit in
- * filter mask.
- */
- cpmp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_SCC1, CPM_CR_SET_GADDR) | CPM_CR_FLG;
- /* this delay is necessary here -- Cort */
- udelay(10);
- while (cpmp->cp_cpcr & CPM_CR_FLG);
- }
- }
-#endif
- }
-}
-
-/* Initialize the FEC Ethernet on 860T.
- */
-static int __init fec_enet_init(void)
-{
- struct net_device *dev;
- struct fec_enet_private *fep;
- int i, j, k, err;
- unsigned char *eap, *iap, *ba;
- dma_addr_t mem_addr;
- volatile cbd_t *bdp;
- cbd_t *cbd_base;
- volatile immap_t *immap;
- volatile fec_t *fecp;
- bd_t *bd;
-#ifdef CONFIG_SCC_ENET
- unsigned char tmpaddr[6];
-#endif
-
- immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
-
- bd = (bd_t *)__res;
-
- dev = alloc_etherdev(sizeof(*fep));
- if (!dev)
- return -ENOMEM;
-
- fep = dev->priv;
-
- fecp = &(immap->im_cpm.cp_fec);
-
- /* Whack a reset. We should wait for this.
- */
- fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET;
- for (i = 0;
- (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
- ++i) {
- udelay(1);
- }
- if (i == FEC_RESET_DELAY) {
- printk ("FEC Reset timeout!\n");
- }
-
- /* Set the Ethernet address. If using multiple Enets on the 8xx,
- * this needs some work to get unique addresses.
- */
- eap = (unsigned char *)my_enet_addr;
- iap = bd->bi_enetaddr;
-
-#ifdef CONFIG_SCC_ENET
- /*
- * If a board has Ethernet configured both on a SCC and the
- * FEC, it needs (at least) 2 MAC addresses (we know that Sun
- * disagrees, but anyway). For the FEC port, we create
- * another address by setting one of the address bits above
- * something that would have (up to now) been allocated.
- */
- for (i=0; i<6; i++)
- tmpaddr[i] = *iap++;
- tmpaddr[3] |= 0x80;
- iap = tmpaddr;
-#endif
-
- for (i=0; i<6; i++) {
- dev->dev_addr[i] = *eap++ = *iap++;
- }
-
- /* Allocate memory for buffer descriptors.
- */
- if (((RX_RING_SIZE + TX_RING_SIZE) * sizeof(cbd_t)) > PAGE_SIZE) {
- printk("FEC init error. Need more space.\n");
- printk("FEC initialization failed.\n");
- return 1;
- }
- cbd_base = (cbd_t *)dma_alloc_coherent(dev->class_dev.dev, PAGE_SIZE,
- &mem_addr, GFP_KERNEL);
-
- /* Set receive and transmit descriptor base.
- */
- fep->rx_bd_base = cbd_base;
- fep->tx_bd_base = cbd_base + RX_RING_SIZE;
-
- fep->skb_cur = fep->skb_dirty = 0;
-
- /* Initialize the receive buffer descriptors.
- */
- bdp = fep->rx_bd_base;
- k = 0;
- for (i=0; i<FEC_ENET_RX_PAGES; i++) {
-
- /* Allocate a page.
- */
- ba = (unsigned char *)dma_alloc_coherent(dev->class_dev.dev,
- PAGE_SIZE,
- &mem_addr,
- GFP_KERNEL);
- /* BUG: no check for failure */
-
- /* Initialize the BD for every fragment in the page.
- */
- for (j=0; j<FEC_ENET_RX_FRPPG; j++) {
- bdp->cbd_sc = BD_ENET_RX_EMPTY;
- bdp->cbd_bufaddr = mem_addr;
- fep->rx_vaddr[k++] = ba;
- mem_addr += FEC_ENET_RX_FRSIZE;
- ba += FEC_ENET_RX_FRSIZE;
- bdp++;
- }
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
-#ifdef CONFIG_FEC_PACKETHOOK
- fep->ph_lock = 0;
- fep->ph_rxhandler = fep->ph_txhandler = NULL;
- fep->ph_proto = 0;
- fep->ph_regaddr = NULL;
- fep->ph_priv = NULL;
-#endif
-
- /* Install our interrupt handler.
- */
- if (request_irq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec", dev) != 0)
- panic("Could not allocate FEC IRQ!");
-
-#ifdef CONFIG_RPXCLASSIC
- /* Make Port C, bit 15 an input that causes interrupts.
- */
- immap->im_ioport.iop_pcpar &= ~0x0001;
- immap->im_ioport.iop_pcdir &= ~0x0001;
- immap->im_ioport.iop_pcso &= ~0x0001;
- immap->im_ioport.iop_pcint |= 0x0001;
- cpm_install_handler(CPMVEC_PIO_PC15, mii_link_interrupt, dev);
-
- /* Make LEDS reflect Link status.
- */
- *((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE;
-#endif
-
-#ifdef PHY_INTERRUPT
- ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel |=
- (0x80000000 >> PHY_INTERRUPT);
-
- if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0, "mii", dev) != 0)
- panic("Could not allocate MII IRQ!");
-#endif
-
- dev->base_addr = (unsigned long)fecp;
-
- /* The FEC Ethernet specific entries in the device structure. */
- dev->open = fec_enet_open;
- dev->hard_start_xmit = fec_enet_start_xmit;
- dev->tx_timeout = fec_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = fec_enet_close;
- dev->get_stats = fec_enet_get_stats;
- dev->set_multicast_list = set_multicast_list;
-
-#ifdef CONFIG_USE_MDIO
- for (i=0; i<NMII-1; i++)
- mii_cmds[i].mii_next = &mii_cmds[i+1];
- mii_free = mii_cmds;
-#endif /* CONFIG_USE_MDIO */
-
- /* Configure all of port D for MII.
- */
- immap->im_ioport.iop_pdpar = 0x1fff;
-
- /* Bits moved from Rev. D onward.
- */
- if ((mfspr(SPRN_IMMR) & 0xffff) < 0x0501)
- immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */
- else
- immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */
-
-#ifdef CONFIG_USE_MDIO
- /* Set MII speed to 2.5 MHz
- */
- fecp->fec_mii_speed = fep->phy_speed =
- (( (bd->bi_intfreq + 500000) / 2500000 / 2 ) & 0x3F ) << 1;
-#else
- fecp->fec_mii_speed = 0; /* turn off MDIO */
-#endif /* CONFIG_USE_MDIO */
-
- err = register_netdev(dev);
- if (err) {
- free_netdev(dev);
- return err;
- }
-
- printk ("%s: FEC ENET Version 0.2, FEC irq %d"
-#ifdef PHY_INTERRUPT
- ", MII irq %d"
-#endif
- ", addr ",
- dev->name, FEC_INTERRUPT
-#ifdef PHY_INTERRUPT
- , PHY_INTERRUPT
-#endif
- );
- for (i=0; i<6; i++)
- printk("%02x%c", dev->dev_addr[i], (i==5) ? '\n' : ':');
-
-#ifdef CONFIG_USE_MDIO /* start in full duplex mode, and negotiate speed */
- fec_restart (dev, 1);
-#else /* always use half duplex mode only */
- fec_restart (dev, 0);
-#endif
-
-#ifdef CONFIG_USE_MDIO
- /* Queue up command to detect the PHY and initialize the
- * remainder of the interface.
- */
- fep->phy_id_done = 0;
- fep->phy_addr = 0;
- mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
-#endif /* CONFIG_USE_MDIO */
-
- return 0;
-}
-module_init(fec_enet_init);
-
-/* This function is called to start or restart the FEC during a link
- * change. This only happens when switching between half and full
- * duplex.
- */
-static void
-fec_restart(struct net_device *dev, int duplex)
-{
- struct fec_enet_private *fep;
- int i;
- volatile cbd_t *bdp;
- volatile immap_t *immap;
- volatile fec_t *fecp;
-
- immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
-
- fecp = &(immap->im_cpm.cp_fec);
-
- fep = dev->priv;
-
- /* Whack a reset. We should wait for this.
- */
- fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET;
- for (i = 0;
- (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
- ++i) {
- udelay(1);
- }
- if (i == FEC_RESET_DELAY) {
- printk ("FEC Reset timeout!\n");
- }
-
- /* Set station address.
- */
- fecp->fec_addr_low = (my_enet_addr[0] << 16) | my_enet_addr[1];
- fecp->fec_addr_high = my_enet_addr[2];
-
- /* Reset all multicast.
- */
- fecp->fec_hash_table_high = 0;
- fecp->fec_hash_table_low = 0;
-
- /* Set maximum receive buffer size.
- */
- fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
- fecp->fec_r_hash = PKT_MAXBUF_SIZE;
-
- /* Set receive and transmit descriptor base.
- */
- fecp->fec_r_des_start = iopa((uint)(fep->rx_bd_base));
- fecp->fec_x_des_start = iopa((uint)(fep->tx_bd_base));
-
- fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
- fep->cur_rx = fep->rx_bd_base;
-
- /* Reset SKB transmit buffers.
- */
- fep->skb_cur = fep->skb_dirty = 0;
- for (i=0; i<=TX_RING_MOD_MASK; i++) {
- if (fep->tx_skbuff[i] != NULL) {
- dev_kfree_skb(fep->tx_skbuff[i]);
- fep->tx_skbuff[i] = NULL;
- }
- }
-
- /* Initialize the receive buffer descriptors.
- */
- bdp = fep->rx_bd_base;
- for (i=0; i<RX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = BD_ENET_RX_EMPTY;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* ...and the same for transmit.
- */
- bdp = fep->tx_bd_base;
- for (i=0; i<TX_RING_SIZE; i++) {
-
- /* Initialize the BD for every fragment in the page.
- */
- bdp->cbd_sc = 0;
- bdp->cbd_bufaddr = 0;
- bdp++;
- }
-
- /* Set the last buffer to wrap.
- */
- bdp--;
- bdp->cbd_sc |= BD_SC_WRAP;
-
- /* Enable MII mode.
- */
- if (duplex) {
- fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE; /* MII enable */
- fecp->fec_x_cntrl = FEC_TCNTRL_FDEN; /* FD enable */
- }
- else {
- fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
- fecp->fec_x_cntrl = 0;
- }
- fep->full_duplex = duplex;
-
- /* Enable big endian and don't care about SDMA FC.
- */
- fecp->fec_fun_code = 0x78000000;
-
-#ifdef CONFIG_USE_MDIO
- /* Set MII speed.
- */
- fecp->fec_mii_speed = fep->phy_speed;
-#endif /* CONFIG_USE_MDIO */
-
- /* Clear any outstanding interrupt.
- */
- fecp->fec_ievent = 0xffc0;
-
- fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
-
- /* Enable interrupts we wish to service.
- */
- fecp->fec_imask = ( FEC_ENET_TXF | FEC_ENET_TXB |
- FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII );
-
- /* And last, enable the transmit and receive processing.
- */
- fecp->fec_ecntrl = FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN;
- fecp->fec_r_des_active = 0x01000000;
-}
-
-static void
-fec_stop(struct net_device *dev)
-{
- volatile immap_t *immap;
- volatile fec_t *fecp;
- struct fec_enet_private *fep;
- int i;
-
- immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
-
- fecp = &(immap->im_cpm.cp_fec);
-
- if ((fecp->fec_ecntrl & FEC_ECNTRL_ETHER_EN) == 0)
- return; /* already down */
-
- fep = dev->priv;
-
-
- fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */
-
- for (i = 0;
- ((fecp->fec_ievent & 0x10000000) == 0) && (i < FEC_RESET_DELAY);
- ++i) {
- udelay(1);
- }
- if (i == FEC_RESET_DELAY) {
- printk ("FEC timeout on graceful transmit stop\n");
- }
-
- /* Clear outstanding MII command interrupts.
- */
- fecp->fec_ievent = FEC_ENET_MII;
-
- /* Enable MII command finished interrupt
- */
- fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
- fecp->fec_imask = FEC_ENET_MII;
-
-#ifdef CONFIG_USE_MDIO
- /* Set MII speed.
- */
- fecp->fec_mii_speed = fep->phy_speed;
-#endif /* CONFIG_USE_MDIO */
-
- /* Disable FEC
- */
- fecp->fec_ecntrl &= ~(FEC_ECNTRL_ETHER_EN);
-}
diff --git a/arch/ppc/8xx_io/micropatch.c b/arch/ppc/8xx_io/micropatch.c
deleted file mode 100644
index 9a5d95d..0000000
--- a/arch/ppc/8xx_io/micropatch.c
+++ /dev/null
@@ -1,743 +0,0 @@
-
-/* Microcode patches for the CPM as supplied by Motorola.
- * This is the one for IIC/SPI. There is a newer one that
- * also relocates SMC2, but this would require additional changes
- * to uart.c, so I am holding off on that for a moment.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <asm/irq.h>
-#include <asm/mpc8xx.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/8xx_immap.h>
-#include <asm/cpm1.h>
-
-/*
- * I2C/SPI relocation patch arrays.
- */
-
-#ifdef CONFIG_I2C_SPI_UCODE_PATCH
-
-uint patch_2000[] = {
- 0x7FFFEFD9,
- 0x3FFD0000,
- 0x7FFB49F7,
- 0x7FF90000,
- 0x5FEFADF7,
- 0x5F89ADF7,
- 0x5FEFAFF7,
- 0x5F89AFF7,
- 0x3A9CFBC8,
- 0xE7C0EDF0,
- 0x77C1E1BB,
- 0xF4DC7F1D,
- 0xABAD932F,
- 0x4E08FDCF,
- 0x6E0FAFF8,
- 0x7CCF76CF,
- 0xFD1FF9CF,
- 0xABF88DC6,
- 0xAB5679F7,
- 0xB0937383,
- 0xDFCE79F7,
- 0xB091E6BB,
- 0xE5BBE74F,
- 0xB3FA6F0F,
- 0x6FFB76CE,
- 0xEE0DF9CF,
- 0x2BFBEFEF,
- 0xCFEEF9CF,
- 0x76CEAD24,
- 0x90B2DF9A,
- 0x7FDDD0BF,
- 0x4BF847FD,
- 0x7CCF76CE,
- 0xCFEF7E1F,
- 0x7F1D7DFD,
- 0xF0B6EF71,
- 0x7FC177C1,
- 0xFBC86079,
- 0xE722FBC8,
- 0x5FFFDFFF,
- 0x5FB2FFFB,
- 0xFBC8F3C8,
- 0x94A67F01,
- 0x7F1D5F39,
- 0xAFE85F5E,
- 0xFFDFDF96,
- 0xCB9FAF7D,
- 0x5FC1AFED,
- 0x8C1C5FC1,
- 0xAFDD5FC3,
- 0xDF9A7EFD,
- 0xB0B25FB2,
- 0xFFFEABAD,
- 0x5FB2FFFE,
- 0x5FCE600B,
- 0xE6BB600B,
- 0x5FCEDFC6,
- 0x27FBEFDF,
- 0x5FC8CFDE,
- 0x3A9CE7C0,
- 0xEDF0F3C8,
- 0x7F0154CD,
- 0x7F1D2D3D,
- 0x363A7570,
- 0x7E0AF1CE,
- 0x37EF2E68,
- 0x7FEE10EC,
- 0xADF8EFDE,
- 0xCFEAE52F,
- 0x7D0FE12B,
- 0xF1CE5F65,
- 0x7E0A4DF8,
- 0xCFEA5F72,
- 0x7D0BEFEE,
- 0xCFEA5F74,
- 0xE522EFDE,
- 0x5F74CFDA,
- 0x0B627385,
- 0xDF627E0A,
- 0x30D8145B,
- 0xBFFFF3C8,
- 0x5FFFDFFF,
- 0xA7F85F5E,
- 0xBFFE7F7D,
- 0x10D31450,
- 0x5F36BFFF,
- 0xAF785F5E,
- 0xBFFDA7F8,
- 0x5F36BFFE,
- 0x77FD30C0,
- 0x4E08FDCF,
- 0xE5FF6E0F,
- 0xAFF87E1F,
- 0x7E0FFD1F,
- 0xF1CF5F1B,
- 0xABF80D5E,
- 0x5F5EFFEF,
- 0x79F730A2,
- 0xAFDD5F34,
- 0x47F85F34,
- 0xAFED7FDD,
- 0x50B24978,
- 0x47FD7F1D,
- 0x7DFD70AD,
- 0xEF717EC1,
- 0x6BA47F01,
- 0x2D267EFD,
- 0x30DE5F5E,
- 0xFFFD5F5E,
- 0xFFEF5F5E,
- 0xFFDF0CA0,
- 0xAFED0A9E,
- 0xAFDD0C3A,
- 0x5F3AAFBD,
- 0x7FBDB082,
- 0x5F8247F8
-};
-
-uint patch_2f00[] = {
- 0x3E303430,
- 0x34343737,
- 0xABF7BF9B,
- 0x994B4FBD,
- 0xBD599493,
- 0x349FFF37,
- 0xFB9B177D,
- 0xD9936956,
- 0xBBFDD697,
- 0xBDD2FD11,
- 0x31DB9BB3,
- 0x63139637,
- 0x93733693,
- 0x193137F7,
- 0x331737AF,
- 0x7BB9B999,
- 0xBB197957,
- 0x7FDFD3D5,
- 0x73B773F7,
- 0x37933B99,
- 0x1D115316,
- 0x99315315,
- 0x31694BF4,
- 0xFBDBD359,
- 0x31497353,
- 0x76956D69,
- 0x7B9D9693,
- 0x13131979,
- 0x79376935
-};
-#endif
-
-/*
- * I2C/SPI/SMC1 relocation patch arrays.
- */
-
-#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
-
-uint patch_2000[] = {
- 0x3fff0000,
- 0x3ffd0000,
- 0x3ffb0000,
- 0x3ff90000,
- 0x5f13eff8,
- 0x5eb5eff8,
- 0x5f88adf7,
- 0x5fefadf7,
- 0x3a9cfbc8,
- 0x77cae1bb,
- 0xf4de7fad,
- 0xabae9330,
- 0x4e08fdcf,
- 0x6e0faff8,
- 0x7ccf76cf,
- 0xfdaff9cf,
- 0xabf88dc8,
- 0xab5879f7,
- 0xb0925d8d,
- 0xdfd079f7,
- 0xb090e6bb,
- 0xe5bbe74f,
- 0x9e046f0f,
- 0x6ffb76ce,
- 0xee0cf9cf,
- 0x2bfbefef,
- 0xcfeef9cf,
- 0x76cead23,
- 0x90b3df99,
- 0x7fddd0c1,
- 0x4bf847fd,
- 0x7ccf76ce,
- 0xcfef77ca,
- 0x7eaf7fad,
- 0x7dfdf0b7,
- 0xef7a7fca,
- 0x77cafbc8,
- 0x6079e722,
- 0xfbc85fff,
- 0xdfff5fb3,
- 0xfffbfbc8,
- 0xf3c894a5,
- 0xe7c9edf9,
- 0x7f9a7fad,
- 0x5f36afe8,
- 0x5f5bffdf,
- 0xdf95cb9e,
- 0xaf7d5fc3,
- 0xafed8c1b,
- 0x5fc3afdd,
- 0x5fc5df99,
- 0x7efdb0b3,
- 0x5fb3fffe,
- 0xabae5fb3,
- 0xfffe5fd0,
- 0x600be6bb,
- 0x600b5fd0,
- 0xdfc827fb,
- 0xefdf5fca,
- 0xcfde3a9c,
- 0xe7c9edf9,
- 0xf3c87f9e,
- 0x54ca7fed,
- 0x2d3a3637,
- 0x756f7e9a,
- 0xf1ce37ef,
- 0x2e677fee,
- 0x10ebadf8,
- 0xefdecfea,
- 0xe52f7d9f,
- 0xe12bf1ce,
- 0x5f647e9a,
- 0x4df8cfea,
- 0x5f717d9b,
- 0xefeecfea,
- 0x5f73e522,
- 0xefde5f73,
- 0xcfda0b61,
- 0x5d8fdf61,
- 0xe7c9edf9,
- 0x7e9a30d5,
- 0x1458bfff,
- 0xf3c85fff,
- 0xdfffa7f8,
- 0x5f5bbffe,
- 0x7f7d10d0,
- 0x144d5f33,
- 0xbfffaf78,
- 0x5f5bbffd,
- 0xa7f85f33,
- 0xbffe77fd,
- 0x30bd4e08,
- 0xfdcfe5ff,
- 0x6e0faff8,
- 0x7eef7e9f,
- 0xfdeff1cf,
- 0x5f17abf8,
- 0x0d5b5f5b,
- 0xffef79f7,
- 0x309eafdd,
- 0x5f3147f8,
- 0x5f31afed,
- 0x7fdd50af,
- 0x497847fd,
- 0x7f9e7fed,
- 0x7dfd70a9,
- 0xef7e7ece,
- 0x6ba07f9e,
- 0x2d227efd,
- 0x30db5f5b,
- 0xfffd5f5b,
- 0xffef5f5b,
- 0xffdf0c9c,
- 0xafed0a9a,
- 0xafdd0c37,
- 0x5f37afbd,
- 0x7fbdb081,
- 0x5f8147f8,
- 0x3a11e710,
- 0xedf0ccdd,
- 0xf3186d0a,
- 0x7f0e5f06,
- 0x7fedbb38,
- 0x3afe7468,
- 0x7fedf4fc,
- 0x8ffbb951,
- 0xb85f77fd,
- 0xb0df5ddd,
- 0xdefe7fed,
- 0x90e1e74d,
- 0x6f0dcbf7,
- 0xe7decfed,
- 0xcb74cfed,
- 0xcfeddf6d,
- 0x91714f74,
- 0x5dd2deef,
- 0x9e04e7df,
- 0xefbb6ffb,
- 0xe7ef7f0e,
- 0x9e097fed,
- 0xebdbeffa,
- 0xeb54affb,
- 0x7fea90d7,
- 0x7e0cf0c3,
- 0xbffff318,
- 0x5fffdfff,
- 0xac59efea,
- 0x7fce1ee5,
- 0xe2ff5ee1,
- 0xaffbe2ff,
- 0x5ee3affb,
- 0xf9cc7d0f,
- 0xaef8770f,
- 0x7d0fb0c6,
- 0xeffbbfff,
- 0xcfef5ede,
- 0x7d0fbfff,
- 0x5ede4cf8,
- 0x7fddd0bf,
- 0x49f847fd,
- 0x7efdf0bb,
- 0x7fedfffd,
- 0x7dfdf0b7,
- 0xef7e7e1e,
- 0x5ede7f0e,
- 0x3a11e710,
- 0xedf0ccab,
- 0xfb18ad2e,
- 0x1ea9bbb8,
- 0x74283b7e,
- 0x73c2e4bb,
- 0x2ada4fb8,
- 0xdc21e4bb,
- 0xb2a1ffbf,
- 0x5e2c43f8,
- 0xfc87e1bb,
- 0xe74ffd91,
- 0x6f0f4fe8,
- 0xc7ba32e2,
- 0xf396efeb,
- 0x600b4f78,
- 0xe5bb760b,
- 0x53acaef8,
- 0x4ef88b0e,
- 0xcfef9e09,
- 0xabf8751f,
- 0xefef5bac,
- 0x741f4fe8,
- 0x751e760d,
- 0x7fdbf081,
- 0x741cafce,
- 0xefcc7fce,
- 0x751e70ac,
- 0x741ce7bb,
- 0x3372cfed,
- 0xafdbefeb,
- 0xe5bb760b,
- 0x53f2aef8,
- 0xafe8e7eb,
- 0x4bf8771e,
- 0x7e247fed,
- 0x4fcbe2cc,
- 0x7fbc30a9,
- 0x7b0f7a0f,
- 0x34d577fd,
- 0x308b5db7,
- 0xde553e5f,
- 0xaf78741f,
- 0x741f30f0,
- 0xcfef5e2c,
- 0x741f3eac,
- 0xafb8771e,
- 0x5e677fed,
- 0x0bd3e2cc,
- 0x741ccfec,
- 0xe5ca53cd,
- 0x6fcb4f74,
- 0x5dadde4b,
- 0x2ab63d38,
- 0x4bb3de30,
- 0x751f741c,
- 0x6c42effa,
- 0xefea7fce,
- 0x6ffc30be,
- 0xefec3fca,
- 0x30b3de2e,
- 0xadf85d9e,
- 0xaf7daefd,
- 0x5d9ede2e,
- 0x5d9eafdd,
- 0x761f10ac,
- 0x1da07efd,
- 0x30adfffe,
- 0x4908fb18,
- 0x5fffdfff,
- 0xafbb709b,
- 0x4ef85e67,
- 0xadf814ad,
- 0x7a0f70ad,
- 0xcfef50ad,
- 0x7a0fde30,
- 0x5da0afed,
- 0x3c12780f,
- 0xefef780f,
- 0xefef790f,
- 0xa7f85e0f,
- 0xffef790f,
- 0xefef790f,
- 0x14adde2e,
- 0x5d9eadfd,
- 0x5e2dfffb,
- 0xe79addfd,
- 0xeff96079,
- 0x607ae79a,
- 0xddfceff9,
- 0x60795dff,
- 0x607acfef,
- 0xefefefdf,
- 0xefbfef7f,
- 0xeeffedff,
- 0xebffe7ff,
- 0xafefafdf,
- 0xafbfaf7f,
- 0xaeffadff,
- 0xabffa7ff,
- 0x6fef6fdf,
- 0x6fbf6f7f,
- 0x6eff6dff,
- 0x6bff67ff,
- 0x2fef2fdf,
- 0x2fbf2f7f,
- 0x2eff2dff,
- 0x2bff27ff,
- 0x4e08fd1f,
- 0xe5ff6e0f,
- 0xaff87eef,
- 0x7e0ffdef,
- 0xf11f6079,
- 0xabf8f542,
- 0x7e0af11c,
- 0x37cfae3a,
- 0x7fec90be,
- 0xadf8efdc,
- 0xcfeae52f,
- 0x7d0fe12b,
- 0xf11c6079,
- 0x7e0a4df8,
- 0xcfea5dc4,
- 0x7d0befec,
- 0xcfea5dc6,
- 0xe522efdc,
- 0x5dc6cfda,
- 0x4e08fd1f,
- 0x6e0faff8,
- 0x7c1f761f,
- 0xfdeff91f,
- 0x6079abf8,
- 0x761cee24,
- 0xf91f2bfb,
- 0xefefcfec,
- 0xf91f6079,
- 0x761c27fb,
- 0xefdf5da7,
- 0xcfdc7fdd,
- 0xd09c4bf8,
- 0x47fd7c1f,
- 0x761ccfcf,
- 0x7eef7fed,
- 0x7dfdf093,
- 0xef7e7f1e,
- 0x771efb18,
- 0x6079e722,
- 0xe6bbe5bb,
- 0xae0ae5bb,
- 0x600bae85,
- 0xe2bbe2bb,
- 0xe2bbe2bb,
- 0xaf02e2bb,
- 0xe2bb2ff9,
- 0x6079e2bb
-};
-
-uint patch_2f00[] = {
- 0x30303030,
- 0x3e3e3434,
- 0xabbf9b99,
- 0x4b4fbdbd,
- 0x59949334,
- 0x9fff37fb,
- 0x9b177dd9,
- 0x936956bb,
- 0xfbdd697b,
- 0xdd2fd113,
- 0x1db9f7bb,
- 0x36313963,
- 0x79373369,
- 0x3193137f,
- 0x7331737a,
- 0xf7bb9b99,
- 0x9bb19795,
- 0x77fdfd3d,
- 0x573b773f,
- 0x737933f7,
- 0xb991d115,
- 0x31699315,
- 0x31531694,
- 0xbf4fbdbd,
- 0x35931497,
- 0x35376956,
- 0xbd697b9d,
- 0x96931313,
- 0x19797937,
- 0x6935af78,
- 0xb9b3baa3,
- 0xb8788683,
- 0x368f78f7,
- 0x87778733,
- 0x3ffffb3b,
- 0x8e8f78b8,
- 0x1d118e13,
- 0xf3ff3f8b,
- 0x6bd8e173,
- 0xd1366856,
- 0x68d1687b,
- 0x3daf78b8,
- 0x3a3a3f87,
- 0x8f81378f,
- 0xf876f887,
- 0x77fd8778,
- 0x737de8d6,
- 0xbbf8bfff,
- 0xd8df87f7,
- 0xfd876f7b,
- 0x8bfff8bd,
- 0x8683387d,
- 0xb873d87b,
- 0x3b8fd7f8,
- 0xf7338883,
- 0xbb8ee1f8,
- 0xef837377,
- 0x3337b836,
- 0x817d11f8,
- 0x7378b878,
- 0xd3368b7d,
- 0xed731b7d,
- 0x833731f3,
- 0xf22f3f23
-};
-
-uint patch_2e00[] = {
- 0x27eeeeee,
- 0xeeeeeeee,
- 0xeeeeeeee,
- 0xeeeeeeee,
- 0xee4bf4fb,
- 0xdbd259bb,
- 0x1979577f,
- 0xdfd2d573,
- 0xb773f737,
- 0x4b4fbdbd,
- 0x25b9b177,
- 0xd2d17376,
- 0x956bbfdd,
- 0x697bdd2f,
- 0xff9f79ff,
- 0xff9ff22f
-};
-#endif
-
-/*
- * USB SOF patch arrays.
- */
-
-#ifdef CONFIG_USB_SOF_UCODE_PATCH
-
-uint patch_2000[] = {
- 0x7fff0000,
- 0x7ffd0000,
- 0x7ffb0000,
- 0x49f7ba5b,
- 0xba383ffb,
- 0xf9b8b46d,
- 0xe5ab4e07,
- 0xaf77bffe,
- 0x3f7bbf79,
- 0xba5bba38,
- 0xe7676076,
- 0x60750000
-};
-
-uint patch_2f00[] = {
- 0x3030304c,
- 0xcab9e441,
- 0xa1aaf220
-};
-#endif
-
-void
-cpm_load_patch(volatile immap_t *immr)
-{
- volatile uint *dp; /* Dual-ported RAM. */
- volatile cpm8xx_t *commproc;
- volatile iic_t *iip;
- volatile spi_t *spp;
- volatile smc_uart_t *smp;
- int i;
-
- commproc = (cpm8xx_t *)&immr->im_cpm;
-
-#ifdef CONFIG_USB_SOF_UCODE_PATCH
- commproc->cp_rccr = 0;
-
- dp = (uint *)(commproc->cp_dpmem);
- for (i=0; i<(sizeof(patch_2000)/4); i++)
- *dp++ = patch_2000[i];
-
- dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
- for (i=0; i<(sizeof(patch_2f00)/4); i++)
- *dp++ = patch_2f00[i];
-
- commproc->cp_rccr = 0x0009;
-
- printk("USB SOF microcode patch installed\n");
-#endif /* CONFIG_USB_SOF_UCODE_PATCH */
-
-#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \
- defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
-
- commproc->cp_rccr = 0;
-
- dp = (uint *)(commproc->cp_dpmem);
- for (i=0; i<(sizeof(patch_2000)/4); i++)
- *dp++ = patch_2000[i];
-
- dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
- for (i=0; i<(sizeof(patch_2f00)/4); i++)
- *dp++ = patch_2f00[i];
-
- iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
-# define RPBASE 0x0500
- iip->iic_rpbase = RPBASE;
-
- /* Put SPI above the IIC, also 32-byte aligned.
- */
- i = (RPBASE + sizeof(iic_t) + 31) & ~31;
- spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
- spp->spi_rpbase = i;
-
-# if defined(CONFIG_I2C_SPI_UCODE_PATCH)
- commproc->cp_cpmcr1 = 0x802a;
- commproc->cp_cpmcr2 = 0x8028;
- commproc->cp_cpmcr3 = 0x802e;
- commproc->cp_cpmcr4 = 0x802c;
- commproc->cp_rccr = 1;
-
- printk("I2C/SPI microcode patch installed.\n");
-# endif /* CONFIG_I2C_SPI_UCODE_PATCH */
-
-# if defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
-
- dp = (uint *)&(commproc->cp_dpmem[0x0e00]);
- for (i=0; i<(sizeof(patch_2e00)/4); i++)
- *dp++ = patch_2e00[i];
-
- commproc->cp_cpmcr1 = 0x8080;
- commproc->cp_cpmcr2 = 0x808a;
- commproc->cp_cpmcr3 = 0x8028;
- commproc->cp_cpmcr4 = 0x802a;
- commproc->cp_rccr = 3;
-
- smp = (smc_uart_t *)&commproc->cp_dparam[PROFF_SMC1];
- smp->smc_rpbase = 0x1FC0;
-
- printk("I2C/SPI/SMC1 microcode patch installed.\n");
-# endif /* CONFIG_I2C_SPI_SMC1_UCODE_PATCH) */
-
-#endif /* some variation of the I2C/SPI patch was selected */
-}
-
-/*
- * Take this entire routine out, since no one calls it and its
- * logic is suspect.
- */
-
-#if 0
-void
-verify_patch(volatile immap_t *immr)
-{
- volatile uint *dp;
- volatile cpm8xx_t *commproc;
- int i;
-
- commproc = (cpm8xx_t *)&immr->im_cpm;
-
- printk("cp_rccr %x\n", commproc->cp_rccr);
- commproc->cp_rccr = 0;
-
- dp = (uint *)(commproc->cp_dpmem);
- for (i=0; i<(sizeof(patch_2000)/4); i++)
- if (*dp++ != patch_2000[i]) {
- printk("patch_2000 bad at %d\n", i);
- dp--;
- printk("found 0x%X, wanted 0x%X\n", *dp, patch_2000[i]);
- break;
- }
-
- dp = (uint *)&(commproc->cp_dpmem[0x0f00]);
- for (i=0; i<(sizeof(patch_2f00)/4); i++)
- if (*dp++ != patch_2f00[i]) {
- printk("patch_2f00 bad at %d\n", i);
- dp--;
- printk("found 0x%X, wanted 0x%X\n", *dp, patch_2f00[i]);
- break;
- }
-
- commproc->cp_rccr = 0x0009;
-}
-#endif
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
deleted file mode 100644
index 0f1863e..0000000
--- a/arch/ppc/Kconfig
+++ /dev/null
@@ -1,1186 +0,0 @@
-# For a description of the syntax of this configuration file,
-# see Documentation/kbuild/kconfig-language.txt.
-#
-
-mainmenu "Linux/PowerPC Kernel Configuration"
-
-config WORD_SIZE
- int
- default 32
-
-config MMU
- bool
- default y
-
-config GENERIC_HARDIRQS
- bool
- default y
-
-config RWSEM_GENERIC_SPINLOCK
- bool
-
-config RWSEM_XCHGADD_ALGORITHM
- bool
- default y
-
-config ARCH_HAS_ILOG2_U32
- bool
- default y
-
-config ARCH_HAS_ILOG2_U64
- bool
- default n
-
-config GENERIC_HWEIGHT
- bool
- default y
-
-config GENERIC_CALIBRATE_DELAY
- bool
- default y
-
-config PPC
- bool
- default y
- select HAVE_IDE
- select HAVE_OPROFILE
- select HAVE_KPROBES
-
-config PPC32
- bool
- default y
-
-# All PPCs use generic nvram driver through ppc_md
-config GENERIC_NVRAM
- bool
- default y
-
-config GENERIC_FIND_NEXT_BIT
- bool
- default y
-
-config SCHED_NO_NO_OMIT_FRAME_POINTER
- bool
- default y
-
-config ARCH_MAY_HAVE_PC_FDC
- bool
- default y
-
-config GENERIC_BUG
- bool
- default y
- depends on BUG
-
-source "init/Kconfig"
-
-menu "Processor"
-
-choice
- prompt "Processor Type"
- default 6xx
-
-config 6xx
- bool "6xx/7xx/74xx/52xx/82xx"
- select PPC_FPU
- help
- There are four types of PowerPC chips supported. The more common
- types (601, 603, 604, 740, 750, 7400), the older Freescale
- (formerly Motorola) embedded versions (821, 823, 850, 855, 860,
- 52xx, 82xx), the IBM embedded versions (403 and 405) and
- the Book E embedded processors from IBM (44x) and Freescale (85xx).
- For support for 64-bit processors, set ARCH=powerpc.
- Unless you are building a kernel for one of the embedded processor
- systems, choose 6xx.
- Also note that because the 52xx, 82xx family have a 603e
- core, specific support for that chipset is asked later on.
-
-config 40x
- bool "40x"
- select PPC_DCR_NATIVE
-
-config 44x
- bool "44x"
- select PPC_DCR_NATIVE
-
-config 8xx
- bool "8xx"
- select PPC_LIB_RHEAP
-
-endchoice
-
-config PPC_FPU
- bool
-
-config PPC_DCR_NATIVE
- bool
- default n
-
-config PPC_DCR
- bool
- depends on PPC_DCR_NATIVE
- default y
-
-config PTE_64BIT
- bool
- depends on 44x
- default y if 44x
-
-config PHYS_64BIT
- bool
- depends on 44x
- default y if 44x
- ---help---
- This option enables kernel support for larger than 32-bit physical
- addresses. This features is not be available on all e500 cores.
-
- If in doubt, say N here.
-
-config ALTIVEC
- bool "AltiVec Support"
- depends on 6xx
- depends on !8260
- ---help---
- This option enables kernel support for the Altivec extensions to the
- PowerPC processor. The kernel currently supports saving and restoring
- altivec registers, and turning on the 'altivec enable' bit so user
- processes can execute altivec instructions.
-
- This option is only usefully if you have a processor that supports
- altivec (G4, otherwise known as 74xx series), but does not have
- any affect on a non-altivec cpu (it does, however add code to the
- kernel).
-
- If in doubt, say Y here.
-
-config TAU
- bool "Thermal Management Support"
- depends on 6xx && !8260
- help
- G3 and G4 processors have an on-chip temperature sensor called the
- 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
- temperature within 2-4 degrees Celsius. This option shows the current
- on-die temperature in /proc/cpuinfo if the cpu supports it.
-
- Unfortunately, on some chip revisions, this sensor is very inaccurate
- and in some cases, does not work at all, so don't assume the cpu
- temp is actually what /proc/cpuinfo says it is.
-
-config TAU_INT
- bool "Interrupt driven TAU driver (DANGEROUS)"
- depends on TAU
- ---help---
- The TAU supports an interrupt driven mode which causes an interrupt
- whenever the temperature goes out of range. This is the fastest way
- to get notified the temp has exceeded a range. With this option off,
- a timer is used to re-check the temperature periodically.
-
- However, on some cpus it appears that the TAU interrupt hardware
- is buggy and can cause a situation which would lead unexplained hard
- lockups.
-
- Unless you are extending the TAU driver, or enjoy kernel/hardware
- debugging, leave this option off.
-
-config TAU_AVERAGE
- bool "Average high and low temp"
- depends on TAU
- ---help---
- The TAU hardware can compare the temperature to an upper and lower
- bound. The default behavior is to show both the upper and lower
- bound in /proc/cpuinfo. If the range is large, the temperature is
- either changing a lot, or the TAU hardware is broken (likely on some
- G4's). If the range is small (around 4 degrees), the temperature is
- relatively stable. If you say Y here, a single temperature value,
- halfway between the upper and lower bounds, will be reported in
- /proc/cpuinfo.
-
- If in doubt, say N here.
-
-config MATH_EMULATION
- bool "Math emulation"
- depends on 4xx || 8xx
- ---help---
- Some PowerPC chips designed for embedded applications do not have
- a floating-point unit and therefore do not implement the
- floating-point instructions in the PowerPC instruction set. If you
- say Y here, the kernel will include code to emulate a floating-point
- unit, which will allow programs that use floating-point
- instructions to run.
-
- If you have an Apple machine or an IBM RS/6000 or pSeries machine,
- or any machine with a 6xx, 7xx or 7xxx series processor, say N
- here. Saying Y here will not hurt performance (on any machine) but
- will increase the size of the kernel.
-
-config KEXEC
- bool "kexec system call (EXPERIMENTAL)"
- depends on EXPERIMENTAL
- help
- kexec is a system call that implements the ability to shutdown your
- current kernel, and to start another kernel. It is like a reboot
- but it is independent of the system firmware. And like a reboot
- you can start any kernel with it, not just Linux.
-
- The name comes from the similarity to the exec system call.
-
- It is an ongoing process to be certain the hardware in a machine
- is properly shutdown, so do not be surprised if this code does not
- initially work for you. It may help to enable device hotplugging
- support. As of this writing the exact hardware interface is
- strongly in flux, so no good recommendation can be made.
-
- In the GameCube implementation, kexec allows you to load and
- run DOL files, including kernel and homebrew DOLs.
-
-source "drivers/cpufreq/Kconfig"
-
-config PPC601_SYNC_FIX
- bool "Workarounds for PPC601 bugs"
- depends on 6xx && PPC_PREP
- help
- Some versions of the PPC601 (the first PowerPC chip) have bugs which
- mean that extra synchronization instructions are required near
- certain instructions, typically those that make major changes to the
- CPU state. These extra instructions reduce performance slightly.
- If you say N here, these extra instructions will not be included,
- resulting in a kernel which will run faster but may not run at all
- on some systems with the PPC601 chip.
-
- If in doubt, say Y here.
-
-source arch/ppc/platforms/4xx/Kconfig
-
-config PPC_STD_MMU
- bool
- depends on 6xx
- default y
-
-config NOT_COHERENT_CACHE
- bool
- depends on 4xx || 8xx
- default y
-
-endmenu
-
-menu "Platform options"
-
-config FADS
- bool
-
-choice
- prompt "8xx Machine Type"
- depends on 8xx
- default RPXLITE
-
-config RPXLITE
- bool "RPX-Lite"
- ---help---
- Single-board computers based around the PowerPC MPC8xx chips and
- intended for embedded applications. The following types are
- supported:
-
- RPX-Lite:
- Embedded Planet RPX Lite. PC104 form-factor SBC based on the MPC823.
-
- RPX-Classic:
- Embedded Planet RPX Classic Low-fat. Credit-card-size SBC based on
- the MPC 860
-
- BSE-IP:
- Bright Star Engineering ip-Engine.
-
- TQM823L:
- TQM850L:
- TQM855L:
- TQM860L:
- MPC8xx based family of mini modules, half credit card size,
- up to 64 MB of RAM, 8 MB Flash, (Fast) Ethernet, 2 x serial ports,
- 2 x CAN bus interface, ...
- Manufacturer: TQ Components, www.tq-group.de
- Date of Release: October (?) 1999
- End of Life: not yet :-)
- URL:
- - module: <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>
- - starter kit: <http://www.denx.de/PDF/STK8xxLHWM201.pdf>
- - images: <http://www.denx.de/embedded-ppc-en.html>
-
- FPS850L:
- FingerPrint Sensor System (based on TQM850L)
- Manufacturer: IKENDI AG, <http://www.ikendi.com/>
- Date of Release: November 1999
- End of life: end 2000 ?
- URL: see TQM850L
-
- IVMS8:
- MPC860 based board used in the "Integrated Voice Mail System",
- Small Version (8 voice channels)
- Manufacturer: Speech Design, <http://www.speech-design.de/>
- Date of Release: December 2000 (?)
- End of life: -
- URL: <http://www.speech-design.de/>
-
- IVML24:
- MPC860 based board used in the "Integrated Voice Mail System",
- Large Version (24 voice channels)
- Manufacturer: Speech Design, <http://www.speech-design.de/>
- Date of Release: March 2001 (?)
- End of life: -
- URL: <http://www.speech-design.de/>
-
- HERMES:
- Hermes-Pro ISDN/LAN router with integrated 8 x hub
- Manufacturer: Multidata Gesellschaft fur Datentechnik und Informatik
- <http://www.multidata.de/>
- Date of Release: 2000 (?)
- End of life: -
- URL: <http://www.multidata.de/english/products/hpro.htm>
-
- IP860:
- VMEBus IP (Industry Pack) carrier board with MPC860
- Manufacturer: MicroSys GmbH, <http://www.microsys.de/>
- Date of Release: ?
- End of life: -
- URL: <http://www.microsys.de/html/ip860.html>
-
- PCU_E:
- PCU = Peripheral Controller Unit, Extended
- Manufacturer: Siemens AG, ICN (Information and Communication Networks)
- <http://www.siemens.de/page/1,3771,224315-1-999_2_226207-0,00.html>
- Date of Release: April 2001
- End of life: August 2001
- URL: n. a.
-
-config RPXCLASSIC
- bool "RPX-Classic"
- help
- The RPX-Classic is a single-board computer based on the Motorola
- MPC860. It features 16MB of DRAM and a variable amount of flash,
- I2C EEPROM, thermal monitoring, a PCMCIA slot, a DIP switch and two
- LEDs. Variants with Ethernet ports exist. Say Y here to support it
- directly.
-
-config BSEIP
- bool "BSE-IP"
- help
- Say Y here to support the Bright Star Engineering ipEngine SBC.
- This is a credit-card-sized device featuring a MPC823 processor,
- 26MB DRAM, 4MB flash, Ethernet, a 16K-gate FPGA, USB, an LCD/video
- controller, and two RS232 ports.
-
-config MPC8XXFADS
- bool "FADS"
- select FADS
-
-config TQM823L
- bool "TQM823L"
- help
- Say Y here to support the TQM823L, one of an MPC8xx-based family of
- mini SBCs (half credit-card size) from TQ Components first released
- in late 1999. Technical references are at
- <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
- <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
- <http://www.denx.de/embedded-ppc-en.html>.
-
-config TQM850L
- bool "TQM850L"
- help
- Say Y here to support the TQM850L, one of an MPC8xx-based family of
- mini SBCs (half credit-card size) from TQ Components first released
- in late 1999. Technical references are at
- <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
- <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
- <http://www.denx.de/embedded-ppc-en.html>.
-
-config TQM855L
- bool "TQM855L"
- help
- Say Y here to support the TQM855L, one of an MPC8xx-based family of
- mini SBCs (half credit-card size) from TQ Components first released
- in late 1999. Technical references are at
- <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
- <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
- <http://www.denx.de/embedded-ppc-en.html>.
-
-config TQM860L
- bool "TQM860L"
- help
- Say Y here to support the TQM860L, one of an MPC8xx-based family of
- mini SBCs (half credit-card size) from TQ Components first released
- in late 1999. Technical references are at
- <http://www.denx.de/PDF/TQM8xxLHWM201.pdf>, and
- <http://www.denx.de/PDF/STK8xxLHWM201.pdf>, and an image at
- <http://www.denx.de/embedded-ppc-en.html>.
-
-config FPS850L
- bool "FPS850L"
-
-config IVMS8
- bool "IVMS8"
- help
- Say Y here to support the Integrated Voice-Mail Small 8-channel SBC
- from Speech Design, released March 2001. The manufacturer's website
- is at <http://www.speech-design.de/>.
-
-config IVML24
- bool "IVML24"
- help
- Say Y here to support the Integrated Voice-Mail Large 24-channel SBC
- from Speech Design, released March 2001. The manufacturer's website
- is at <http://www.speech-design.de/>.
-
-config HERMES_PRO
- bool "HERMES"
-
-config IP860
- bool "IP860"
-
-config LWMON
- bool "LWMON"
-
-config PCU_E
- bool "PCU_E"
-
-config CCM
- bool "CCM"
-
-config LANTEC
- bool "LANTEC"
-
-config MBX
- bool "MBX"
- help
- MBX is a line of Motorola single-board computer based around the
- MPC821 and MPC860 processors, and intended for embedded-controller
- applications. Say Y here to support these boards directly.
-
-config WINCEPT
- bool "WinCept"
- help
- The Wincept 100/110 is a Motorola single-board computer based on the
- MPC821 PowerPC, introduced in 1998 and designed to be used in
- thin-client machines. Say Y to support it directly.
-
-endchoice
-
-choice
- prompt "Machine Type"
- depends on 6xx
- default PPC_PREP
- ---help---
- Linux currently supports several different kinds of PowerPC-based
- machines: Apple Power Macintoshes and clones (such as the Motorola
- Starmax series), PReP (PowerPC Reference Platform) machines (such
- as the Motorola PowerStacks, Motorola cPCI/VME embedded systems,
- and some IBM RS/6000 systems), CHRP (Common Hardware Reference
- Platform) machines (including all of the recent IBM RS/6000 and
- pSeries machines), and several embedded PowerPC systems containing
- 4xx, 6xx, 7xx, 8xx, 74xx, and 82xx processors. Currently, the
- default option is to build a kernel which works on PReP.
-
- Note that support for Apple and CHRP machines is now only available
- with ARCH=powerpc, and has been removed from this menu. If you
- wish to build a kernel for an Apple or CHRP machine, exit this
- configuration process and re-run it with ARCH=powerpc.
-
- Select PReP if configuring for a PReP machine.
-
-config PPC_PREP
- bool "PReP"
-
-config KATANA
- bool "Artesyn-Katana"
- help
- Select KATANA if configuring an Artesyn KATANA 750i or 3750
- cPCI board.
-
-config WILLOW
- bool "Cogent-Willow"
-
-config CPCI690
- bool "Force-CPCI690"
- help
- Select CPCI690 if configuring a Force CPCI690 cPCI board.
-
-config POWERPMC250
- bool "Force-PowerPMC250"
-
-config CHESTNUT
- bool "IBM 750FX Eval board or 750GX Eval board"
- help
- Select CHESTNUT if configuring an IBM 750FX Eval Board or a
- IBM 750GX Eval board.
-
-config SPRUCE
- bool "IBM-Spruce"
- select PPC_INDIRECT_PCI
-
-config HDPU
- bool "Sky-HDPU"
- help
- Select HDPU if configuring a Sky Computers Compute Blade.
-
-config HDPU_FEATURES
- depends on HDPU
- tristate "HDPU-Features"
- help
- Select to enable HDPU enhanced features.
-
-config EV64260
- bool "Marvell-EV64260BP"
- help
- Select EV64260 if configuring a Marvell (formerly Galileo)
- EV64260BP Evaluation platform.
-
-config LOPEC
- bool "Motorola-LoPEC"
- select PPC_I8259
-
-config MVME5100
- bool "Motorola-MVME5100"
- select PPC_INDIRECT_PCI
-
-config PPLUS
- bool "Motorola-PowerPlus"
- select PPC_I8259
- select PPC_INDIRECT_PCI
-
-config PRPMC750
- bool "Motorola-PrPMC750"
- select PPC_INDIRECT_PCI
-
-config PRPMC800
- bool "Motorola-PrPMC800"
- select PPC_INDIRECT_PCI
-
-config SANDPOINT
- bool "Motorola-Sandpoint"
- select PPC_I8259
- help
- Select SANDPOINT if configuring for a Motorola Sandpoint X3
- (any flavor).
-
-config RADSTONE_PPC7D
- bool "Radstone Technology PPC7D board"
- select PPC_I8259
-
-config PAL4
- bool "SBS-Palomar4"
-
-config EST8260
- bool "EST8260"
- ---help---
- The EST8260 is a single-board computer manufactured by Wind River
- Systems, Inc. (formerly Embedded Support Tools Corp.) and based on
- the MPC8260. Wind River Systems has a website at
- <http://www.windriver.com/>, but the EST8260 cannot be found on it
- and has probably been discontinued or rebadged.
-
-config SBC82xx
- bool "SBC82xx"
- ---help---
- SBC PowerQUICC II, single-board computer with MPC82xx CPU
- Manufacturer: Wind River Systems, Inc.
- Date of Release: May 2003
- End of Life: -
- URL: <http://www.windriver.com/>
-
-config SBS8260
- bool "SBS8260"
-
-config RPX8260
- bool "RPXSUPER"
-
-config TQM8260
- bool "TQM8260"
- ---help---
- MPC8260 based module, little larger than credit card,
- up to 128 MB global + 64 MB local RAM, 32 MB Flash,
- 32 kB EEPROM, 256 kB L@ Cache, 10baseT + 100baseT Ethernet,
- 2 x serial ports, ...
- Manufacturer: TQ Components, www.tq-group.de
- Date of Release: June 2001
- End of Life: not yet :-)
- URL: <http://www.denx.de/PDF/TQM82xx_SPEC_Rev005.pdf>
-
-config PQ2FADS
- bool "Freescale-PQ2FADS"
- help
- Select PQ2FADS if you wish to configure for a Freescale
- PQ2FADS board (-VR or -ZU).
-
-config LITE5200
- bool "Freescale LITE5200 / (IceCube)"
- select PPC_MPC52xx
- help
- Support for the LITE5200 dev board for the MPC5200 from Freescale.
- This is for the LITE5200 version 2.0 board. Don't know if it changes
- much but it's only been tested on this board version. I think this
- board is also known as IceCube.
-
-config LITE5200B
- bool "Freescale LITE5200B"
- depends on LITE5200
- help
- Support for the LITE5200B dev board for the MPC5200 from Freescale.
- This is the new board with 2 PCI slots.
-
-config EV64360
- bool "Marvell-EV64360BP"
- help
- Select EV64360 if configuring a Marvell EV64360BP Evaluation
- platform.
-endchoice
-
-config TQM8xxL
- bool
- depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L)
- default y
-
-config EMBEDDEDBOOT
- bool
- depends on 8xx || 8260
- default y
-
-config PPC_MPC52xx
- bool
-
-config 8260
- bool "CPM2 Support" if WILLOW
- depends on 6xx
- default y if TQM8260 || RPX8260 || EST8260 || SBS8260 || SBC82xx || PQ2FADS
- help
- The MPC8260 is a typical embedded CPU made by Motorola. Selecting
- this option means that you wish to build a kernel for a machine with
- an 8260 class CPU.
-
-config CPM1
- bool
- depends on 8xx
- default y
- help
- The CPM1 (Communications Processor Module) is a coprocessor on
- embedded CPUs made by Motorola. Selecting this option means that
- you wish to build a kernel for a machine with a CPM1 coprocessor
- on it (8xx, 827x, 8560).
-
-config CPM2
- bool
- depends on 8260 || MPC8560 || MPC8555
- select PPC_LIB_RHEAP
- default y
- help
- The CPM2 (Communications Processor Module) is a coprocessor on
- embedded CPUs made by Motorola. Selecting this option means that
- you wish to build a kernel for a machine with a CPM2 coprocessor
- on it (826x, 827x, 8560).
-
-config PPC_GEN550
- bool
- depends on SANDPOINT || SPRUCE || PPLUS || \
- PRPMC750 || PRPMC800 || LOPEC || \
- (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D
- default y
-
-config FORCE
- bool
- depends on 6xx && POWERPMC250
- default y
-
-config GT64260
- bool
- depends on EV64260 || CPCI690
- default y
-
-config MV64360 # Really MV64360 & MV64460
- bool
- depends on CHESTNUT || KATANA || RADSTONE_PPC7D || HDPU || EV64360
- default y
-
-config MV64X60
- bool
- depends on (GT64260 || MV64360)
- select PPC_INDIRECT_PCI
- default y
-
-config MV643XX_ETH_0
- bool
- depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360 || HDPU)
- default y
-
-config MV643XX_ETH_1
- bool
- depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360)
- default y
-
-config MV643XX_ETH_2
- bool
- depends on MV643XX_ETH && (KATANA || RADSTONE_PPC7D || EV64360)
- default y
-
-menu "Set bridge options"
- depends on MV64X60
-
-config NOT_COHERENT_CACHE
- bool "Turn off Cache Coherency"
- default n
- help
- Some 64x60 bridges lock up when trying to enforce cache coherency.
- When this option is selected, cache coherency will be turned off.
- Note that this can cause other problems (e.g., stale data being
- speculatively loaded via a cached mapping). Use at your own risk.
-
-config MV64X60_BASE
- hex "Set bridge base used by firmware"
- default "0xf1000000"
- help
- A firmware can leave the base address of the bridge's registers at
- a non-standard location. If so, set this value to reflect the
- address of that non-standard location.
-
-config MV64X60_NEW_BASE
- hex "Set bridge base used by kernel"
- default "0xf1000000"
- help
- If the current base address of the bridge's registers is not where
- you want it, set this value to the address that you want it moved to.
-
-endmenu
-
-config NONMONARCH_SUPPORT
- bool "Enable Non-Monarch Support"
- depends on PRPMC800
-
-config HARRIER
- bool
- depends on PRPMC800
- default y
-
-config EPIC_SERIAL_MODE
- bool
- depends on 6xx && (LOPEC || SANDPOINT)
- default y
-
-config MPC10X_BRIDGE
- bool
- depends on POWERPMC250 || LOPEC || SANDPOINT
- select PPC_INDIRECT_PCI
- default y
-
-config MPC10X_OPENPIC
- bool
- depends on POWERPMC250 || LOPEC || SANDPOINT
- default y
-
-config MPC10X_STORE_GATHERING
- bool "Enable MPC10x store gathering"
- depends on MPC10X_BRIDGE
-
-config SANDPOINT_ENABLE_UART1
- bool "Enable DUART mode on Sandpoint"
- depends on SANDPOINT
- help
- If this option is enabled then the MPC824x processor will run
- in DUART mode instead of UART mode.
-
-config HARRIER_STORE_GATHERING
- bool "Enable Harrier store gathering"
- depends on HARRIER
-
-config MVME5100_IPMC761_PRESENT
- bool "MVME5100 configured with an IPMC761"
- depends on MVME5100
- select PPC_I8259
-
-config SPRUCE_BAUD_33M
- bool "Spruce baud clock support"
- depends on SPRUCE
-
-config PC_KEYBOARD
- bool "PC PS/2 style Keyboard"
- depends on 4xx || CPM2
-
-config PPCBUG_NVRAM
- bool "Enable reading PPCBUG NVRAM during boot" if PPLUS || LOPEC
- default y if PPC_PREP
-
-config SMP
- depends on PPC_STD_MMU
- bool "Symmetric multi-processing support"
- ---help---
- This enables support for systems with more than one CPU. If you have
- a system with only one CPU, say N. If you have a system with more
- than one CPU, say Y. Note that the kernel does not currently
- support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
- since they have inadequate hardware support for multiprocessor
- operation.
-
- If you say N here, the kernel will run on single and multiprocessor
- machines, but will use only one CPU of a multiprocessor machine. If
- you say Y here, the kernel will run on single-processor machines.
- On a single-processor machine, the kernel will run faster if you say
- N here.
-
- If you don't know what to do here, say N.
-
-config IRQ_ALL_CPUS
- bool "Distribute interrupts on all CPUs by default"
- depends on SMP && !MV64360
- help
- This option gives the kernel permission to distribute IRQs across
- multiple CPUs. Saying N here will route all IRQs to the first
- CPU. Generally saying Y is safe, although some problems have been
- reported with SMP Power Macintoshes with this option enabled.
-
-config NR_CPUS
- int "Maximum number of CPUs (2-32)"
- range 2 32
- depends on SMP
- default "4"
-
-config HIGHMEM
- bool "High memory support"
-
-config ARCH_POPULATES_NODE_MAP
- def_bool y
-
-source kernel/Kconfig.hz
-source kernel/Kconfig.preempt
-source "mm/Kconfig"
-
-source "fs/Kconfig.binfmt"
-
-config PREP_RESIDUAL
- bool "Support for PReP Residual Data"
- depends on PPC_PREP
- help
- Some PReP systems have residual data passed to the kernel by the
- firmware. This allows detection of memory size, devices present and
- other useful pieces of information. Sometimes this information is
- not present or incorrect, in which case it could lead to the machine
- behaving incorrectly. If this happens, either disable PREP_RESIDUAL
- or pass the 'noresidual' option to the kernel.
-
- If you are running a PReP system, say Y here, otherwise say N.
-
-config PROC_PREPRESIDUAL
- bool "Support for reading of PReP Residual Data in /proc"
- depends on PREP_RESIDUAL && PROC_FS
- help
- Enabling this option will create a /proc/residual file which allows
- you to get at the residual data on PReP systems. You will need a tool
- (lsresidual) to parse it. If you aren't on a PReP system, you don't
- want this.
-
-config CMDLINE_BOOL
- bool "Default bootloader kernel arguments"
-
-config CMDLINE
- string "Initial kernel command string"
- depends on CMDLINE_BOOL
- default "console=ttyS0,9600 console=tty0 root=/dev/sda2"
- help
- On some platforms, there is currently no way for the boot loader to
- pass arguments to the kernel. For these platforms, you can supply
- some command-line options at build time by entering them here. In
- most cases you will need to specify the root device here.
-
-if BROKEN
-source kernel/power/Kconfig
-endif
-
-config SECCOMP
- bool "Enable seccomp to safely compute untrusted bytecode"
- depends on PROC_FS
- default y
- help
- This kernel feature is useful for number crunching applications
- that may need to compute untrusted bytecode during their
- execution. By using pipes or other transports made available to
- the process as file descriptors supporting the read/write
- syscalls, it's possible to isolate those applications in
- their own address space using seccomp. Once seccomp is
- enabled via /proc/<pid>/seccomp, it cannot be disabled
- and the task is only allowed to execute a few safe syscalls
- defined by each seccomp mode.
-
- If unsure, say Y. Only embedded should say N here.
-
-endmenu
-
-config ISA_DMA_API
- bool
- default y
-
-menu "Bus options"
-
-config ISA
- bool "Support for ISA-bus hardware"
- depends on PPC_PREP
- help
- Find out whether you have ISA slots on your motherboard. ISA is the
- name of a bus system, i.e. the way the CPU talks to the other stuff
- inside your box. If you have an Apple machine, say N here; if you
- have an IBM RS/6000 or pSeries machine or a PReP machine, say Y. If
- you have an embedded board, consult your board documentation.
-
-config ZONE_DMA
- bool
- default y
-
-config GENERIC_ISA_DMA
- bool
- depends on 6xx && !CPM2
- default y
-
-config PPC_I8259
- bool
- default y if PPC_PREP
- default n
-
-config PPC_INDIRECT_PCI
- bool
- depends on PCI
- default y if 40x || 44x || PPC_PREP
- default n
-
-config EISA
- bool
- help
- The Extended Industry Standard Architecture (EISA) bus is a bus
- architecture used on some older intel-based PCs.
-
-config SBUS
- bool
-
-# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
-config MCA
- bool
-
-config PCI
- bool "PCI support" if 40x || CPM2 || PPC_MPC52xx
- default y if !40x && !CPM2 && !8xx
- default PCI_QSPAN if !4xx && !CPM2 && 8xx
- help
- Find out whether your system includes a PCI bus. PCI is the name of
- a bus system, i.e. the way the CPU talks to the other stuff inside
- your box. If you say Y here, the kernel will include drivers and
- infrastructure code to support PCI bus devices.
-
-config PCI_DOMAINS
- def_bool PCI
-
-config PCI_SYSCALL
- def_bool PCI
-
-config PCI_QSPAN
- bool "QSpan PCI"
- depends on !4xx && !CPM2 && 8xx
- select PPC_I8259
- help
- Say Y here if you have a system based on a Motorola 8xx-series
- embedded processor with a QSPAN PCI interface, otherwise say N.
-
-config PCI_8260
- bool
- depends on PCI && 8260
- select PPC_INDIRECT_PCI
- default y
-
-config 8260_PCI9
- bool "Enable workaround for MPC826x erratum PCI 9"
- depends on PCI_8260
- default y
-
-choice
- prompt "IDMA channel for PCI 9 workaround"
- depends on 8260_PCI9
-
-config 8260_PCI9_IDMA1
- bool "IDMA1"
-
-config 8260_PCI9_IDMA2
- bool "IDMA2"
-
-config 8260_PCI9_IDMA3
- bool "IDMA3"
-
-config 8260_PCI9_IDMA4
- bool "IDMA4"
-
-endchoice
-
-source "drivers/pci/Kconfig"
-
-source "drivers/pcmcia/Kconfig"
-
-config RAPIDIO
- bool "RapidIO support" if MPC8540 || MPC8560
- help
- If you say Y here, the kernel will include drivers and
- infrastructure code to support RapidIO interconnect devices.
-
-source "drivers/rapidio/Kconfig"
-
-endmenu
-
-menu "Advanced setup"
-
-config ADVANCED_OPTIONS
- bool "Prompt for advanced kernel configuration options"
- help
- This option will enable prompting for a variety of advanced kernel
- configuration options. These options can cause the kernel to not
- work if they are set incorrectly, but can be used to optimize certain
- aspects of kernel memory management.
-
- Unless you know what you are doing, say N here.
-
-comment "Default settings for advanced configuration options are used"
- depends on !ADVANCED_OPTIONS
-
-config HIGHMEM_START_BOOL
- bool "Set high memory pool address"
- depends on ADVANCED_OPTIONS && HIGHMEM
- help
- This option allows you to set the base address of the kernel virtual
- area used to map high memory pages. This can be useful in
- optimizing the layout of kernel virtual memory.
-
- Say N here unless you know what you are doing.
-
-config HIGHMEM_START
- hex "Virtual start address of high memory pool" if HIGHMEM_START_BOOL
- default "0xfe000000"
-
-config LOWMEM_SIZE_BOOL
- bool "Set maximum low memory"
- depends on ADVANCED_OPTIONS
- help
- This option allows you to set the maximum amount of memory which
- will be used as "low memory", that is, memory which the kernel can
- access directly, without having to set up a kernel virtual mapping.
- This can be useful in optimizing the layout of kernel virtual
- memory.
-
- Say N here unless you know what you are doing.
-
-config LOWMEM_SIZE
- hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
- default "0x30000000"
-
-config KERNEL_START_BOOL
- bool "Set custom kernel base address"
- depends on ADVANCED_OPTIONS
- help
- This option allows you to set the kernel virtual address at which
- the kernel will map low memory (the kernel image will be linked at
- this address). This can be useful in optimizing the virtual memory
- layout of the system.
-
- Say N here unless you know what you are doing.
-
-config KERNEL_START
- hex "Virtual address of kernel base" if KERNEL_START_BOOL
- default "0xc0000000"
-
-config TASK_SIZE_BOOL
- bool "Set custom user task size"
- depends on ADVANCED_OPTIONS
- help
- This option allows you to set the amount of virtual address space
- allocated to user tasks. This can be useful in optimizing the
- virtual memory layout of the system.
-
- Say N here unless you know what you are doing.
-
-config TASK_SIZE
- hex "Size of user task space" if TASK_SIZE_BOOL
- default "0x80000000"
-
-config CONSISTENT_START_BOOL
- bool "Set custom consistent memory pool address"
- depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
- help
- This option allows you to set the base virtual address
- of the consistent memory pool. This pool of virtual
- memory is used to make consistent memory allocations.
-
-config CONSISTENT_START
- hex "Base virtual address of consistent memory pool" if CONSISTENT_START_BOOL
- default "0xff100000" if NOT_COHERENT_CACHE
-
-config CONSISTENT_SIZE_BOOL
- bool "Set custom consistent memory pool size"
- depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
- help
- This option allows you to set the size of the
- consistent memory pool. This pool of virtual memory
- is used to make consistent memory allocations.
-
-config CONSISTENT_SIZE
- hex "Size of consistent memory pool" if CONSISTENT_SIZE_BOOL
- default "0x00200000" if NOT_COHERENT_CACHE
-
-config BOOT_LOAD_BOOL
- bool "Set the boot link/load address"
- depends on ADVANCED_OPTIONS && !PPC_PREP
- help
- This option allows you to set the initial load address of the zImage
- or zImage.initrd file. This can be useful if you are on a board
- which has a small amount of memory.
-
- Say N here unless you know what you are doing.
-
-config BOOT_LOAD
- hex "Link/load address for booting" if BOOT_LOAD_BOOL
- default "0x00400000" if 40x || 8xx || 8260
- default "0x01000000" if 44x
- default "0x00800000"
-
-config PIN_TLB
- bool "Pinned Kernel TLBs (860 ONLY)"
- depends on ADVANCED_OPTIONS && 8xx
-
-config PPC_LIB_RHEAP
- bool
-
-endmenu
-
-source "net/Kconfig"
-
-source "drivers/Kconfig"
-
-source "fs/Kconfig"
-
-source "arch/ppc/8xx_io/Kconfig"
-
-source "arch/ppc/8260_io/Kconfig"
-
-
-menu "IBM 40x options"
- depends on 40x
-
-config SERIAL_SICC
- bool "SICC Serial port"
- depends on STB03xxx
-
-config UART1_DFLT_CONSOLE
- bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-
-config SERIAL_SICC_CONSOLE
- bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-
-endmenu
-
-source "lib/Kconfig"
-
-source "arch/ppc/Kconfig.debug"
-
-source "security/Kconfig"
-
-source "crypto/Kconfig"
diff --git a/arch/ppc/Kconfig.debug b/arch/ppc/Kconfig.debug
deleted file mode 100644
index f94b877..0000000
--- a/arch/ppc/Kconfig.debug
+++ /dev/null
@@ -1,66 +0,0 @@
-menu "Kernel hacking"
-
-source "lib/Kconfig.debug"
-
-config KGDB
- bool "Include kgdb kernel debugger"
- depends on DEBUG_KERNEL && (BROKEN || PPC_GEN550 || 4xx)
- select DEBUG_INFO
- help
- Include in-kernel hooks for kgdb, the Linux kernel source level
- debugger. See <http://kgdb.sourceforge.net/> for more information.
- Unless you are intending to debug the kernel, say N here.
-
-choice
- prompt "Serial Port"
- depends on KGDB
- default KGDB_TTYS1
-
-config KGDB_TTYS0
- bool "ttyS0"
-
-config KGDB_TTYS1
- bool "ttyS1"
-
-config KGDB_TTYS2
- bool "ttyS2"
-
-config KGDB_TTYS3
- bool "ttyS3"
-
-endchoice
-
-config KGDB_CONSOLE
- bool "Enable serial console thru kgdb port"
- depends on KGDB && 8xx || CPM2
- help
- If you enable this, all serial console messages will be sent
- over the gdb stub.
- If unsure, say N.
-
-config XMON
- bool "Include xmon kernel debugger"
- depends on DEBUG_KERNEL
- help
- Include in-kernel hooks for the xmon kernel monitor/debugger.
- Unless you are intending to debug the kernel, say N here.
-
-config BDI_SWITCH
- bool "Include BDI-2000 user context switcher"
- depends on DEBUG_KERNEL
- help
- Include in-kernel support for the Abatron BDI2000 debugger.
- Unless you are intending to debug the kernel with one of these
- machines, say N here.
-
-config SERIAL_TEXT_DEBUG
- bool "Support for early boot texts over serial port"
- depends on 4xx || LOPEC || MV64X60 || PPLUS || PRPMC800 || \
- PPC_GEN550 || PPC_MPC52xx
-
-config PPC_OCP
- bool
- depends on IBM_OCP
- default y
-
-endmenu
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
deleted file mode 100644
index 2352d13..0000000
--- a/arch/ppc/Makefile
+++ /dev/null
@@ -1,135 +0,0 @@
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies.
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1994 by Linus Torvalds
-# Changes for PPC by Gary Thomas
-# Rewritten by Cort Dougan and Paul Mackerras
-#
-
-# This must match PAGE_OFFSET in include/asm-ppc/page.h.
-KERNELLOAD := $(CONFIG_KERNEL_START)
-
-HAS_BIARCH := $(call cc-option-yn, -m32)
-ifeq ($(HAS_BIARCH),y)
-AS := $(AS) -a32
-LD := $(LD) -m elf32ppc
-CC := $(CC) -m32
-endif
-
-LDFLAGS_vmlinux := -Ttext $(KERNELLOAD) -Bstatic
-# The -Iarch/$(ARCH)/include is temporary while we are merging
-KBUILD_CPPFLAGS += -Iarch/$(ARCH) -Iarch/$(ARCH)/include
-KBUILD_AFLAGS += -Iarch/$(ARCH)
-KBUILD_CFLAGS += -Iarch/$(ARCH) -msoft-float -pipe \
- -ffixed-r2 -mmultiple
-
-# No AltiVec instruction when building kernel
-KBUILD_CFLAGS += $(call cc-option, -mno-altivec)
-
-CPP = $(CC) -E $(KBUILD_CFLAGS)
-# Temporary hack until we have migrated to asm-powerpc
-LINUXINCLUDE += -Iarch/$(ARCH)/include
-
-CHECKFLAGS += -D__powerpc__
-
-cpu-as-$(CONFIG_4xx) += -Wa,-m405
-cpu-as-$(CONFIG_6xx) += -Wa,-maltivec
-
-KBUILD_AFLAGS += $(cpu-as-y)
-KBUILD_CFLAGS += $(cpu-as-y)
-
-# Default to the common case.
-KBUILD_DEFCONFIG := ebony_defconfig
-
-head-y := arch/ppc/kernel/head.o
-head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o
-head-$(CONFIG_4xx) := arch/ppc/kernel/head_4xx.o
-head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o
-
-head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o
-
-core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \
- arch/ppc/platforms/ \
- arch/ppc/mm/ arch/ppc/lib/ \
- arch/ppc/syslib/ arch/powerpc/sysdev/ \
- arch/powerpc/lib/
-core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/
-core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/
-core-$(CONFIG_XMON) += arch/ppc/xmon/
-drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/
-drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/
-drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/
-
-drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
-
-BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
-
-PHONY += $(BOOT_TARGETS)
-
-all: uImage zImage
-
-CPPFLAGS_vmlinux.lds := -Upowerpc
-
-# All the instructions talk about "make bzImage".
-bzImage: zImage
-
-boot := arch/$(ARCH)/boot
-
-$(BOOT_TARGETS): vmlinux
- $(Q)$(MAKE) $(build)=$(boot) $@
-
-uImage: vmlinux
- $(Q)$(MAKE) $(build)=$(boot)/images $(boot)/images/$@
-
-define archhelp
- @echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/images/zImage.*)'
- @echo ' uImage - Create a bootable image for U-Boot / PPCBoot'
- @echo ' install - Install kernel using'
- @echo ' (your) ~/bin/installkernel or'
- @echo ' (distribution) /sbin/installkernel or'
- @echo ' install to $$(INSTALL_PATH) and run lilo'
- @echo ' *_defconfig - Select default config from arch/$(ARCH)/ppc/configs'
-endef
-
-archclean:
- $(Q)$(MAKE) $(clean)=arch/ppc/boot
- # Temporary hack until we have migrated to asm-powerpc
- $(Q)rm -rf arch/$(ARCH)/include
-
-archprepare: checkbin
-
-# Temporary hack until we have migrated to asm-powerpc
-include/asm: arch/$(ARCH)/include/asm
-arch/$(ARCH)/include/asm:
- $(Q)if [ ! -d arch/$(ARCH)/include ]; then mkdir -p arch/$(ARCH)/include; fi
- $(Q)ln -fsn $(srctree)/include/asm-powerpc arch/$(ARCH)/include/asm
-
-# Use the file '.tmp_gas_check' for binutils tests, as gas won't output
-# to stdout and these checks are run even on install targets.
-TOUT := .tmp_gas_check
-# Ensure this is binutils 2.12.1 (or 2.12.90.0.7) or later for altivec
-# instructions.
-# gcc-3.4 and binutils-2.14 are a fatal combination.
-
-checkbin:
- @if test "$(call cc-version)" = "0304" ; then \
- if ! /bin/echo mftb 5 | $(AS) -v -mppc -many -o $(TOUT) >/dev/null 2>&1 ; then \
- echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build '; \
- echo 'correctly with gcc-3.4 and your version of binutils.'; \
- echo '*** Please upgrade your binutils or downgrade your gcc'; \
- false; \
- fi ; \
- fi
- @if ! /bin/echo dssall | $(AS) -many -o $(TOUT) >/dev/null 2>&1 ; then \
- echo -n '*** ${VERSION}.${PATCHLEVEL} kernels no longer build ' ; \
- echo 'correctly with old versions of binutils.' ; \
- echo '*** Please upgrade your binutils to 2.12.1 or newer' ; \
- false ; \
- fi
-
-CLEAN_FILES += $(TOUT)
-
diff --git a/arch/ppc/boot/Makefile b/arch/ppc/boot/Makefile
deleted file mode 100644
index 500497e..0000000
--- a/arch/ppc/boot/Makefile
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# arch/ppc/boot/Makefile
-#
-# This file is included by the global makefile so that you can add your own
-# architecture-specific flags and dependencies.
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Copyright (C) 1994 by Linus Torvalds
-# Adapted for PowerPC by Gary Thomas
-# modified by Cort (cort@cs.nmt.edu)
-#
-
-# KBUILD_CFLAGS used when building rest of boot (takes effect recursively)
-KBUILD_CFLAGS += -fno-builtin -D__BOOTER__ -Iarch/$(ARCH)/boot/include
-HOSTCFLAGS += -Iarch/$(ARCH)/boot/include
-
-BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd
-
-bootdir-y := simple
-subdir-y := lib common images
-subdir-$(CONFIG_PPC_PREP) += of1275
-
-# for cleaning
-subdir- += simple
-
-hostprogs-y := $(addprefix utils/, mkprep mkbugboot mktree)
-
-PHONY += $(BOOT_TARGETS) $(bootdir-y)
-
-$(BOOT_TARGETS): $(bootdir-y)
-
-$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \
- $(addprefix $(obj)/,$(hostprogs-y))
- $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS)
diff --git a/arch/ppc/boot/common/Makefile b/arch/ppc/boot/common/Makefile
deleted file mode 100644
index a2e85e3..0000000
--- a/arch/ppc/boot/common/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-# This file is subject to the terms and conditions of the GNU General Public
-# License. See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-# Tom Rini January 2001
-#
-
-lib-y := string.o util.o misc-common.o \
- serial_stub.o bootinfo.o
-lib-$(CONFIG_SERIAL_8250_CONSOLE) += ns16550.o
diff --git a/arch/ppc/boot/common/bootinfo.c b/arch/ppc/boot/common/bootinfo.c
deleted file mode 100644
index f4dc9b9..0000000
--- a/arch/ppc/boot/common/bootinfo.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * General bootinfo record utilities
- * Author: Randy Vinson <rvinson@mvista.com>
- *
- * 2002 (c) MontaVista Software, Inc. This file is licensed under the terms
- * of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#include <linux/types.h>
-#include <linux/string.h>
-#include <asm/bootinfo.h>
-
-#include "nonstdio.h"
-
-static struct bi_record * birec = NULL;
-
-static struct bi_record *
-__bootinfo_build(struct bi_record *rec, unsigned long tag, unsigned long size,
- void *data)
-{
- /* set the tag */
- rec->tag = tag;
-
- /* if the caller has any data, copy it */
- if (size)
- memcpy(rec->data, (char *)data, size);
-
- /* set the record size */
- rec->size = sizeof(struct bi_record) + size;
-
- /* advance to the next available space */
- rec = (struct bi_record *)((unsigned long)rec + rec->size);
-
- return rec;
-}
-
-void
-bootinfo_init(struct bi_record *rec)
-{
-
- /* save start of birec area */
- birec = rec;
-
- /* create an empty list */
- rec = __bootinfo_build(rec, BI_FIRST, 0, NULL);
- (void) __bootinfo_build(rec, BI_LAST, 0, NULL);
-
-}
-
-void
-bootinfo_append(unsigned long tag, unsigned long size, void * data)
-{
-
- struct bi_record *rec = birec;
-
- /* paranoia */
- if ((rec == NULL) || (rec->tag != BI_FIRST))
- return;
-
- /* find the last entry in the list */
- while (rec->tag != BI_LAST)
- rec = (struct bi_record *)((ulong)rec + rec->size);
-
- /* overlay BI_LAST record with new one and tag on a new BI_LAST */
- rec = __bootinfo_build(rec, tag, size, data);
- (void) __bootinfo_build(rec, BI_LAST, 0, NULL);
-}
diff --git a/arch/ppc/boot/common/crt0.S b/arch/ppc/boot/common/crt0.S
deleted file mode 100644
index 8f0ef04..0000000
--- a/arch/ppc/boot/common/crt0.S
+++ /dev/null
@@ -1,80 +0,0 @@
-/* Copyright (c) 1997 Paul Mackerras <paulus@cs.anu.edu.au>
- * Initial Power Macintosh COFF version.
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- * Modifications for IBM PowerPC 400-class processor evaluation
- * boards.
- *
- * Module name: crt0.S
- *
- * Description:
- * Boot loader execution entry point. Clears out .bss section as per
- * ANSI C requirements. Invalidates and flushes the caches over the
- * range covered by the boot loader's .text section. Sets up a stack
- * below the .text section entry point.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <asm/ppc_asm.h>
-
- .text
-
- .globl _start
-_start:
-#ifdef XCOFF
- .long __start,0,0
-
- .globl __start
-__start:
-#endif
-
- ## Flush and invalidate the caches for the range in memory covering
- ## the .text section of the boot loader
-
- lis r9,_start@h # r9 = &_start
- lis r8,_etext@ha #
- addi r8,r8,_etext@l # r8 = &_etext
-3: dcbf r0,r9 # Flush the data cache
- icbi r0,r9 # Invalidate the instruction cache
- addi r9,r9,0x10 # Increment by one cache line
- cmplw cr0,r9,r8 # Are we at the end yet?
- blt 3b # No, keep flushing and invalidating
- sync # sync ; isync after flushing the icache
- isync
-
- ## Clear out the BSS as per ANSI C requirements
-
- lis r7,_end@ha
- addi r7,r7,_end@l # r7 = &_end
- lis r8,__bss_start@ha #
- addi r8,r8,__bss_start@l # r8 = &_bss_start
-
- ## Determine how large an area, in number of words, to clear
-
- subf r7,r8,r7 # r7 = &_end - &_bss_start + 1
- addi r7,r7,3 # r7 += 3
- srwi. r7,r7,2 # r7 = size in words.
- beq 2f # If the size is zero, do not bother
- addi r8,r8,-4 # r8 -= 4
- mtctr r7 # SPRN_CTR = number of words to clear
- li r0,0 # r0 = 0
-1: stwu r0,4(r8) # Clear out a word
- bdnz 1b # If we are not done yet, keep clearing
-2:
-
-#ifdef CONFIG_40x
- ## Set up the stack
-
- lis r9,_start@h # r9 = &_start (text section entry)
- ori r9,r9,_start@l
- subi r1,r9,64 # Start the stack 64 bytes below _start
- clrrwi r1,r1,4 # Make sure it is aligned on 16 bytes.
- li r0,0
- stwu r0,-16(r1)
- mtlr r9
-#endif
-
- b start # All done, start the real work.
diff --git a/arch/ppc/boot/common/misc-common.c b/arch/ppc/boot/common/misc-common.c
deleted file mode 100644
index 9589969..0000000
--- a/arch/ppc/boot/common/misc-common.c
+++ /dev/null
@@ -1,555 +0,0 @@
-/*
- * Misc. bootloader code (almost) all platforms can use
- *
- * Author: Johnnie Peters <jpeters@mvista.com>
- * Editor: Tom Rini <trini@mvista.com>
- *
- * Derived from arch/ppc/boot/prep/misc.c
- *
- * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <stdarg.h> /* for va_ bits */
-#include <linux/string.h>
-#include <linux/zlib.h>
-#include "nonstdio.h"
-
-/* If we're on a PReP, assume we have a keyboard controller
- * Also note, if we're not PReP, we assume you are a serial
- * console - Tom */
-#if defined(CONFIG_PPC_PREP) && defined(CONFIG_VGA_CONSOLE)
-extern void cursor(int x, int y);
-extern void scroll(void);
-extern char *vidmem;
-extern int lines, cols;
-extern int orig_x, orig_y;
-extern int keyb_present;
-extern int CRT_tstc(void);
-extern int CRT_getc(void);
-#else
-int cursor(int x, int y) {return 0;}
-void scroll(void) {}
-char vidmem[1];
-#define lines 0
-#define cols 0
-int orig_x = 0;
-int orig_y = 0;
-#define keyb_present 0
-int CRT_tstc(void) {return 0;}
-int CRT_getc(void) {return 0;}
-#endif
-
-extern char *avail_ram;
-extern char *end_avail;
-extern char _end[];
-
-void puts(const char *);
-void putc(const char c);
-void puthex(unsigned long val);
-void gunzip(void *, int, unsigned char *, int *);
-static int _cvt(unsigned long val, char *buf, long radix, char *digits);
-
-void _vprintk(void(*putc)(const char), const char *fmt0, va_list ap);
-unsigned char *ISA_io = NULL;
-
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
-extern unsigned long com_port;
-
-extern int serial_tstc(unsigned long com_port);
-extern unsigned char serial_getc(unsigned long com_port);
-extern void serial_putc(unsigned long com_port, unsigned char c);
-#endif
-
-void pause(void)
-{
- puts("pause\n");
-}
-
-void exit(void)
-{
- puts("exit\n");
- while(1);
-}
-
-int tstc(void)
-{
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- if(keyb_present)
- return (CRT_tstc() || serial_tstc(com_port));
- else
- return (serial_tstc(com_port));
-#else
- return CRT_tstc();
-#endif
-}
-
-int getc(void)
-{
- while (1) {
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- if (serial_tstc(com_port))
- return (serial_getc(com_port));
-#endif /* serial console */
- if (keyb_present)
- if(CRT_tstc())
- return (CRT_getc());
- }
-}
-
-void
-putc(const char c)
-{
- int x,y;
-
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- serial_putc(com_port, c);
- if ( c == '\n' )
- serial_putc(com_port, '\r');
-#endif /* serial console */
-
- x = orig_x;
- y = orig_y;
-
- if ( c == '\n' ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- } else if (c == '\r') {
- x = 0;
- } else if (c == '\b') {
- if (x > 0) {
- x--;
- }
- } else {
- vidmem [ ( x + cols * y ) * 2 ] = c;
- if ( ++x >= cols ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- }
- }
-
- cursor(x, y);
-
- orig_x = x;
- orig_y = y;
-}
-
-void puts(const char *s)
-{
- int x,y;
- char c;
-
- x = orig_x;
- y = orig_y;
-
- while ( ( c = *s++ ) != '\0' ) {
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE) \
- || defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- serial_putc(com_port, c);
- if ( c == '\n' ) serial_putc(com_port, '\r');
-#endif /* serial console */
-
- if ( c == '\n' ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- } else if (c == '\b') {
- if (x > 0) {
- x--;
- }
- } else {
- vidmem [ ( x + cols * y ) * 2 ] = c;
- if ( ++x >= cols ) {
- x = 0;
- if ( ++y >= lines ) {
- scroll();
- y--;
- }
- }
- }
- }
-
- cursor(x, y);
-
- orig_x = x;
- orig_y = y;
-}
-
-void error(char *x)
-{
- puts("\n\n");
- puts(x);
- puts("\n\n -- System halted");
-
- while(1); /* Halt */
-}
-
-static void *zalloc(unsigned size)
-{
- void *p = avail_ram;
-
- size = (size + 7) & -8;
- avail_ram += size;
- if (avail_ram > end_avail) {
- puts("oops... out of memory\n");
- pause();
- }
- return p;
-}
-
-#define HEAD_CRC 2
-#define EXTRA_FIELD 4
-#define ORIG_NAME 8
-#define COMMENT 0x10
-#define RESERVED 0xe0
-
-void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
-{
- z_stream s;
- int r, i, flags;
-
- /* skip header */
- i = 10;
- flags = src[3];
- if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) {
- puts("bad gzipped data\n");
- exit();
- }
- if ((flags & EXTRA_FIELD) != 0)
- i = 12 + src[10] + (src[11] << 8);
- if ((flags & ORIG_NAME) != 0)
- while (src[i++] != 0)
- ;
- if ((flags & COMMENT) != 0)
- while (src[i++] != 0)
- ;
- if ((flags & HEAD_CRC) != 0)
- i += 2;
- if (i >= *lenp) {
- puts("gunzip: ran out of data in header\n");
- exit();
- }
-
- /* Initialize ourself. */
- s.workspace = zalloc(zlib_inflate_workspacesize());
- r = zlib_inflateInit2(&s, -MAX_WBITS);
- if (r != Z_OK) {
- puts("zlib_inflateInit2 returned "); puthex(r); puts("\n");
- exit();
- }
- s.next_in = src + i;
- s.avail_in = *lenp - i;
- s.next_out = dst;
- s.avail_out = dstlen;
- r = zlib_inflate(&s, Z_FINISH);
- if (r != Z_OK && r != Z_STREAM_END) {
- puts("inflate returned "); puthex(r); puts("\n");
- exit();
- }
- *lenp = s.next_out - (unsigned char *) dst;
- zlib_inflateEnd(&s);
-}
-
-void
-puthex(unsigned long val)
-{
-
- unsigned char buf[10];
- int i;
- for (i = 7; i >= 0; i--)
- {
- buf[i] = "0123456789ABCDEF"[val & 0x0F];
- val >>= 4;
- }
- buf[8] = '\0';
- puts(buf);
-}
-
-#define FALSE 0
-#define TRUE 1
-
-void
-_printk(char const *fmt, ...)
-{
- va_list ap;
-
- va_start(ap, fmt);
- _vprintk(putc, fmt, ap);
- va_end(ap);
- return;
-}
-
-#define is_digit(c) ((c >= '0') && (c <= '9'))
-
-void
-_vprintk(void(*putc)(const char), const char *fmt0, va_list ap)
-{
- char c, sign, *cp = 0;
- int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right;
- char buf[32];
- long val;
- while ((c = *fmt0++))
- {
- if (c == '%')
- {
- c = *fmt0++;
- left_prec = right_prec = pad_on_right = 0;
- if (c == '-')
- {
- c = *fmt0++;
- pad_on_right++;
- }
- if (c == '0')
- {
- zero_fill = TRUE;
- c = *fmt0++;
- } else
- {
- zero_fill = FALSE;
- }
- while (is_digit(c))
- {
- left_prec = (left_prec * 10) + (c - '0');
- c = *fmt0++;
- }
- if (c == '.')
- {
- c = *fmt0++;
- zero_fill++;
- while (is_digit(c))
- {
- right_prec = (right_prec * 10) + (c - '0');
- c = *fmt0++;
- }
- } else
- {
- right_prec = left_prec;
- }
- sign = '\0';
- switch (c)
- {
- case 'd':
- case 'x':
- case 'X':
- val = va_arg(ap, long);
- switch (c)
- {
- case 'd':
- if (val < 0)
- {
- sign = '-';
- val = -val;
- }
- length = _cvt(val, buf, 10, "0123456789");
- break;
- case 'x':
- length = _cvt(val, buf, 16, "0123456789abcdef");
- break;
- case 'X':
- length = _cvt(val, buf, 16, "0123456789ABCDEF");
- break;
- }
- cp = buf;
- break;
- case 's':
- cp = va_arg(ap, char *);
- length = strlen(cp);
- break;
- case 'c':
- c = va_arg(ap, long /*char*/);
- (*putc)(c);
- continue;
- default:
- (*putc)('?');
- }
- pad = left_prec - length;
- if (sign != '\0')
- {
- pad--;
- }
- if (zero_fill)
- {
- c = '0';
- if (sign != '\0')
- {
- (*putc)(sign);
- sign = '\0';
- }
- } else
- {
- c = ' ';
- }
- if (!pad_on_right)
- {
- while (pad-- > 0)
- {
- (*putc)(c);
- }
- }
- if (sign != '\0')
- {
- (*putc)(sign);
- }
- while (length-- > 0)
- {
- (*putc)(c = *cp++);
- if (c == '\n')
- {
- (*putc)('\r');
- }
- }
- if (pad_on_right)
- {
- while (pad-- > 0)
- {
- (*putc)(c);
- }
- }
- } else
- {
- (*putc)(c);
- if (c == '\n')
- {
- (*putc)('\r');
- }
- }
- }
-}
-
-int
-_cvt(unsigned long val, char *buf, long radix, char *digits)
-{
- char temp[80];
- char *cp = temp;
- int length = 0;
- if (val == 0)
- { /* Special case */
- *cp++ = '0';
- } else
- while (val)
- {
- *cp++ = digits[val % radix];
- val /= radix;
- }
- while (cp != temp)
- {
- *buf++ = *--cp;
- length++;
- }
- *buf = '\0';
- return (length);
-}
-
-void
-_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base)
-{
- int i, c;
- if ((unsigned int)s > (unsigned int)p)
- {
- s = (unsigned int)s - (unsigned int)p;
- }
- while (s > 0)
- {
- if (base)
- {
- _printk("%06X: ", (int)p - (int)base);
- } else
- {
- _printk("%06X: ", p);
- }
- for (i = 0; i < 16; i++)
- {
- if (i < s)
- {
- _printk("%02X", p[i] & 0xFF);
- } else
- {
- _printk(" ");
- }
- if ((i % 2) == 1) _printk(" ");
- if ((i % 8) == 7) _printk(" ");
- }
- _printk(" |");
- for (i = 0; i < 16; i++)
- {
- if (i < s)
- {
- c = p[i] & 0xFF;
- if ((c < 0x20) || (c >= 0x7F)) c = '.';
- } else
- {
- c = ' ';
- }
- _printk("%c", c);
- }
- _printk("|\n");
- s -= 16;
- p += 16;
- }
-}
-
-void
-_dump_buf(unsigned char *p, int s)
-{
- _printk("\n");
- _dump_buf_with_offset(p, s, 0);
-}
-
-/* Very simple inb/outb routines. We declare ISA_io to be 0 above, and
- * then modify it on platforms which need to. We do it like this
- * because on some platforms we give inb/outb an exact location, and
- * on others it's an offset from a given location. -- Tom
- */
-
-void ISA_init(unsigned long base)
-{
- ISA_io = (unsigned char *)base;
-}
-
-void
-outb(int port, unsigned char val)
-{
- /* Ensure I/O operations complete */
- __asm__ volatile("eieio");
- ISA_io[port] = val;
-}
-
-unsigned char
-inb(int port)
-{
- /* Ensure I/O operations complete */
- __asm__ volatile("eieio");
- return (ISA_io[port]);
-}
-
-/*
- * Local variables:
- * c-indent-level: 8
- * c-basic-offset: 8
- * tab-width: 8
- * End:
- */
diff --git a/arch/ppc/boot/common/ns16550.c b/arch/ppc/boot/common/ns16550.c
deleted file mode 100644
index fc5b720..0000000
--- a/arch/ppc/boot/common/ns16550.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * COM1 NS16550 support
- */
-
-#include <linux/types.h>
-#include <linux/serial.h>
-#include <linux/serial_reg.h>
-#include <asm/serial.h>
-
-#if defined(CONFIG_XILINX_VIRTEX)
-#include <platforms/4xx/xparameters/xparameters.h>
-#endif
-#include "nonstdio.h"
-#include "serial.h"
-
-#define SERIAL_BAUD 9600
-
-extern unsigned long ISA_io;
-
-static struct serial_state rs_table[RS_TABLE_SIZE] = {
- SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
-};
-
-static int shift;
-
-unsigned long serial_init(int chan, void *ignored)
-{
- unsigned long com_port, base_baud;
- unsigned char lcr, dlm;
-
- /* We need to find out which type io we're expecting. If it's
- * 'SERIAL_IO_PORT', we get an offset from the isa_io_base.
- * If it's 'SERIAL_IO_MEM', we can the exact location. -- Tom */
- switch (rs_table[chan].io_type) {
- case SERIAL_IO_PORT:
- com_port = rs_table[chan].port;
- break;
- case SERIAL_IO_MEM:
- com_port = (unsigned long)rs_table[chan].iomem_base;
- break;
- default:
- /* We can't deal with it. */
- return -1;
- }
-
- /* How far apart the registers are. */
- shift = rs_table[chan].iomem_reg_shift;
- /* Base baud.. */
- base_baud = rs_table[chan].baud_base;
-
- /* save the LCR */
- lcr = inb(com_port + (UART_LCR << shift));
- /* Access baud rate */
- outb(com_port + (UART_LCR << shift), 0x80);
- dlm = inb(com_port + (UART_DLM << shift));
- /*
- * Test if serial port is unconfigured.
- * We assume that no-one uses less than 110 baud or
- * less than 7 bits per character these days.
- * -- paulus.
- */
-
- if ((dlm <= 4) && (lcr & 2))
- /* port is configured, put the old LCR back */
- outb(com_port + (UART_LCR << shift), lcr);
- else {
- /* Input clock. */
- outb(com_port + (UART_DLL << shift),
- (base_baud / SERIAL_BAUD) & 0xFF);
- outb(com_port + (UART_DLM << shift),
- (base_baud / SERIAL_BAUD) >> 8);
- /* 8 data, 1 stop, no parity */
- outb(com_port + (UART_LCR << shift), 0x03);
- /* RTS/DTR */
- outb(com_port + (UART_MCR << shift), 0x03);
- }
- /* Clear & enable FIFOs */
- outb(com_port + (UART_FCR << shift), 0x07);
-
- return (com_port);
-}
-
-void
-serial_putc(unsigned long com_port, unsigned char c)
-{
- while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_THRE) == 0)
- ;
- outb(com_port, c);
-}
-
-unsigned char
-serial_getc(unsigned long com_port)
-{
- while ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) == 0)
- ;
- return inb(com_port);
-}
-
-int
-serial_tstc(unsigned long com_port)
-{
- return ((inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) != 0);
-}
diff --git a/arch/ppc/boot/common/serial_stub.c b/arch/ppc/boot/common/serial_stub.c
deleted file mode 100644
index 5cc9ae6..0000000
--- a/arch/ppc/boot/common/serial_stub.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This is a few stub routines to make the boot code cleaner looking when
- * there is no serial port support doesn't need to be closed, for example.
- *
- * Author: Tom Rini <trini@mvista.com>
- *
- * 2003 (c) MontaVista, Software, Inc. This file is licensed under the terms
- * of the GNU General Public License version 2. This program is licensed "as
- * is" without any warranty of any kind, whether express or implied.
- */
-
-unsigned long __attribute__ ((weak))
-serial_init(int chan, void *ignored)
-{
- return 0;
-}
-
-void __attribute__ ((weak))
-serial_close(unsigned long com_port)
-{
-}
diff --git a/arch/ppc/boot/common/string.S b/arch/ppc/boot/common/string.S
deleted file mode 100644
index 8016e43..0000000
--- a/arch/ppc/boot/common/string.S
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * String handling functions for PowerPC.
- *
- * Copyright (C) 1996 Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#define r0 0
-#define r3 3
-#define r4 4
-#define r5 5
-#define r6 6
-#define r7 7
-#define r8 8
-
- .globl strlen
-strlen:
- addi r4,r3,-1
-1: lbzu r0,1(r4)
- cmpwi 0,r0,0
- bne 1b
- subf r3,r3,r4
- blr
-
- .globl memset
-memset:
- rlwimi r4,r4,8,16,23
- rlwimi r4,r4,16,0,15
- addi r6,r3,-4
- cmplwi 0,r5,4
- blt 7f
- stwu r4,4(r6)
- beqlr
- andi. r0,r6,3
- add r5,r0,r5
- subf r6,r0,r6
- rlwinm r0,r5,32-2,2,31
- mtctr r0
- bdz 6f
-1: stwu r4,4(r6)
- bdnz 1b
-6: andi. r5,r5,3
-7: cmpwi 0,r5,0
- beqlr
- mtctr r5
- addi r6,r6,3
-8: stbu r4,1(r6)
- bdnz 8b
- blr
-
- .globl memmove
-memmove:
- cmplw 0,r3,r4
- bgt backwards_memcpy
- /* fall through */
-
- .globl memcpy
-memcpy:
- rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
- addi r6,r3,-4
- addi r4,r4,-4
- beq 2f /* if less than 8 bytes to do */
- andi. r0,r6,3 /* get dest word aligned */
- mtctr r7
- bne 5f
-1: lwz r7,4(r4)
- lwzu r8,8(r4)
- stw r7,4(r6)
- stwu r8,8(r6)
- bdnz 1b
- andi. r5,r5,7
-2: cmplwi 0,r5,4
- blt 3f
- lwzu r0,4(r4)
- addi r5,r5,-4
- stwu r0,4(r6)
-3: cmpwi 0,r5,0
- beqlr
- mtctr r5
- addi r4,r4,3
- addi r6,r6,3
-4: lbzu r0,1(r4)
- stbu r0,1(r6)
- bdnz 4b
- blr
-5: subfic r0,r0,4
- mtctr r0
-6: lbz r7,4(r4)
- addi r4,r4,1
- stb r7,4(r6)
- addi r6,r6,1
- bdnz 6b
- subf r5,r0,r5
- rlwinm. r7,r5,32-3,3,31
- beq 2b
- mtctr r7
- b 1b
-
- .globl backwards_memcpy
-backwards_memcpy:
- rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
- add r6,r3,r5
- add r4,r4,r5
- beq 2f
- andi. r0,r6,3
- mtctr r7
- bne 5f
-1: lwz r7,-4(r4)
- lwzu r8,-8(r4)
- stw r7,-4(r6)
- stwu r8,-8(r6)
- bdnz 1b
- andi. r5,r5,7
-2: cmplwi 0,r5,4
- blt 3f
- lwzu r0,-4(r4)
- subi r5,r5,4
- stwu r0,-4(r6)
-3: cmpwi 0,r5,0
- beqlr
- mtctr r5
-4: lbzu r0,-1(r4)
- stbu r0,-1(r6)
- bdnz 4b
- blr
-5: mtctr r0
-6: lbzu r7,-1(r4)
- stbu r7,-1(r6)
- bdnz 6b
- subf r5,r0,r5
- rlwinm. r7,r5,32-3,3,31
- beq 2b
- mtctr r7
- b 1b
-
- .globl memcmp
-memcmp:
- cmpwi 0,r5,0
- blelr
- mtctr r5
- addi r6,r3,-1
- addi r4,r4,-1
-1: lbzu r3,1(r6)
- lbzu r0,1(r4)
- subf. r3,r0,r3
- bdnzt 2,1b
- blr
diff --git a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S
deleted file mode 100644
index 0c5e43c..0000000
--- a/arch/ppc/boot/common/util.S
+++ /dev/null
@@ -1,293 +0,0 @@
-/*
- * Useful bootup functions, which are more easily done in asm than C.
- *
- * NOTE: Be very very careful about the registers you use here.
- * We don't follow any ABI calling convention among the
- * assembler functions that call each other, especially early
- * in the initialization. Please preserve at least r3 and r4
- * for these early functions, as they often contain information
- * passed from boot roms into the C decompress function.
- *
- * Author: Tom Rini
- * trini@mvista.com
- * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others).
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <asm/processor.h>
-#include <asm/cache.h>
-#include <asm/ppc_asm.h>
-
-
- .text
-
-#ifdef CONFIG_6xx
- .globl disable_6xx_mmu
-disable_6xx_mmu:
- /* Establish default MSR value, exception prefix 0xFFF.
- * If necessary, this function must fix up the LR if we
- * return to a different address space once the MMU is
- * disabled.
- */
- li r8,MSR_IP|MSR_FP
- mtmsr r8
- isync
-
- /* Test for a 601 */
- mfpvr r10
- srwi r10,r10,16
- cmpwi 0,r10,1 /* 601 ? */
- beq .clearbats_601
-
- /* Clear BATs */
- li r8,0
- mtspr SPRN_DBAT0U,r8
- mtspr SPRN_DBAT0L,r8
- mtspr SPRN_DBAT1U,r8
- mtspr SPRN_DBAT1L,r8
- mtspr SPRN_DBAT2U,r8
- mtspr SPRN_DBAT2L,r8
- mtspr SPRN_DBAT3U,r8
- mtspr SPRN_DBAT3L,r8
-.clearbats_601:
- mtspr SPRN_IBAT0U,r8
- mtspr SPRN_IBAT0L,r8
- mtspr SPRN_IBAT1U,r8
- mtspr SPRN_IBAT1L,r8
- mtspr SPRN_IBAT2U,r8
- mtspr SPRN_IBAT2L,r8
- mtspr SPRN_IBAT3U,r8
- mtspr SPRN_IBAT3L,r8
- isync
- sync
- sync
-
- /* Set segment registers */
- li r8,16 /* load up segment register values */
- mtctr r8 /* for context 0 */
- lis r8,0x2000 /* Ku = 1, VSID = 0 */
- li r10,0
-3: mtsrin r8,r10
- addi r8,r8,0x111 /* increment VSID */
- addis r10,r10,0x1000 /* address of next segment */
- bdnz 3b
- blr
-
- .globl disable_6xx_l1cache
-disable_6xx_l1cache:
- /* Enable, invalidate and then disable the L1 icache/dcache. */
- li r8,0
- ori r8,r8,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI)
- mfspr r11,SPRN_HID0
- or r11,r11,r8
- andc r10,r11,r8
- isync
- mtspr SPRN_HID0,r8
- sync
- isync
- mtspr SPRN_HID0,r10
- sync
- isync
- blr
-#endif
-
- .globl _setup_L2CR
-_setup_L2CR:
-/*
- * We should be skipping this section on CPUs where this results in an
- * illegal instruction. If not, please send trini@kernel.crashing.org
- * the PVR of your CPU.
- */
- /* Invalidate/disable L2 cache */
- sync
- isync
- mfspr r8,SPRN_L2CR
- rlwinm r8,r8,0,1,31
- oris r8,r8,L2CR_L2I@h
- sync
- isync
- mtspr SPRN_L2CR,r8
- sync
- isync
-
- /* Wait for the invalidation to complete */
- mfspr r8,SPRN_PVR
- srwi r8,r8,16
- cmplwi cr0,r8,0x8000 /* 7450 */
- cmplwi cr1,r8,0x8001 /* 7455 */
- cmplwi cr2,r8,0x8002 /* 7457 */
- cror 4*cr0+eq,4*cr0+eq,4*cr1+eq /* Now test if any are true. */
- cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
- bne 2f
-
-1: mfspr r8,SPRN_L2CR /* On 745x, poll L2I bit (bit 10) */
- rlwinm. r9,r8,0,10,10
- bne 1b
- b 3f
-
-2: mfspr r8,SPRN_L2CR /* On 75x & 74[01]0, poll L2IP bit (bit 31) */
- rlwinm. r9,r8,0,31,31
- bne 2b
-
-3: rlwinm r8,r8,0,11,9 /* Turn off L2I bit */
- sync
- isync
- mtspr SPRN_L2CR,r8
- sync
- isync
- blr
-
- .globl _setup_L3CR
-_setup_L3CR:
- /* Invalidate/disable L3 cache */
- sync
- isync
- mfspr r8,SPRN_L3CR
- rlwinm r8,r8,0,1,31
- ori r8,r8,L3CR_L3I@l
- sync
- isync
- mtspr SPRN_L3CR,r8
- sync
- isync
-
- /* Wait for the invalidation to complete */
-1: mfspr r8,SPRN_L3CR
- rlwinm. r9,r8,0,21,21
- bne 1b
-
- rlwinm r8,r8,0,22,20 /* Turn off L3I bit */
- sync
- isync
- mtspr SPRN_L3CR,r8
- sync
- isync
- blr
-
-
-/* udelay (on non-601 processors) needs to know the period of the
- * timebase in nanoseconds. This used to be hardcoded to be 60ns
- * (period of 66MHz/4). Now a variable is used that is initialized to
- * 60 for backward compatibility, but it can be overridden as necessary
- * with code something like this:
- * extern unsigned long timebase_period_ns;
- * timebase_period_ns = 1000000000 / bd->bi_tbfreq;
- */
- .data
- .globl timebase_period_ns
-timebase_period_ns:
- .long 60
-
- .text
-/*
- * Delay for a number of microseconds
- */
- .globl udelay
-udelay:
- mfspr r4,SPRN_PVR
- srwi r4,r4,16
- cmpwi 0,r4,1 /* 601 ? */
- bne .udelay_not_601
-00: li r0,86 /* Instructions / microsecond? */
- mtctr r0
-10: addi r0,r0,0 /* NOP */
- bdnz 10b
- subic. r3,r3,1
- bne 00b
- blr
-
-.udelay_not_601:
- mulli r4,r3,1000 /* nanoseconds */
- /* Change r4 to be the number of ticks using:
- * (nanoseconds + (timebase_period_ns - 1 )) / timebase_period_ns
- * timebase_period_ns defaults to 60 (16.6MHz) */
- lis r5,timebase_period_ns@ha
- lwz r5,timebase_period_ns@l(r5)
- add r4,r4,r5
- addi r4,r4,-1
- divw r4,r4,r5 /* BUS ticks */
-1: mftbu r5
- mftb r6
- mftbu r7
- cmpw 0,r5,r7
- bne 1b /* Get [synced] base time */
- addc r9,r6,r4 /* Compute end time */
- addze r8,r5
-2: mftbu r5
- cmpw 0,r5,r8
- blt 2b
- bgt 3f
- mftb r6
- cmpw 0,r6,r9
- blt 2b
-3: blr
-
- .section ".relocate_code","xa"
-/*
- * Flush and enable instruction cache
- * First, flush the data cache in case it was enabled and may be
- * holding instructions for copy back.
- */
- .globl flush_instruction_cache
-flush_instruction_cache:
- mflr r6
- bl flush_data_cache
-
-#ifdef CONFIG_8xx
- lis r3, IDC_INVALL@h
- mtspr SPRN_IC_CST, r3
- lis r3, IDC_ENABLE@h
- mtspr SPRN_IC_CST, r3
- lis r3, IDC_DISABLE@h
- mtspr SPRN_DC_CST, r3
-#elif CONFIG_4xx
- lis r3,start@h # r9 = &_start
- lis r4,_etext@ha
- addi r4,r4,_etext@l # r8 = &_etext
-1: dcbf r0,r3 # Flush the data cache
- icbi r0,r3 # Invalidate the instruction cache
- addi r3,r3,0x10 # Increment by one cache line
- cmplw cr0,r3,r4 # Are we at the end yet?
- blt 1b # No, keep flushing and invalidating
-#else
- /* Enable, invalidate and then disable the L1 icache/dcache. */
- li r3,0
- ori r3,r3,(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI)
- mfspr r4,SPRN_HID0
- or r5,r4,r3
- isync
- mtspr SPRN_HID0,r5
- sync
- isync
- ori r5,r4,HID0_ICE /* Enable cache */
- mtspr SPRN_HID0,r5
- sync
- isync
-#endif
- mtlr r6
- blr
-
-#define NUM_CACHE_LINES 128*8
-#define cache_flush_buffer 0x1000
-
-/*
- * Flush data cache
- * Do this by just reading lots of stuff into the cache.
- */
- .globl flush_data_cache
-flush_data_cache:
- lis r3,cache_flush_buffer@h
- ori r3,r3,cache_flush_buffer@l
- li r4,NUM_CACHE_LINES
- mtctr r4
-00: lwz r4,0(r3)
- addi r3,r3,L1_CACHE_BYTES /* Next line, please */
- bdnz 00b
-10: blr
-
- .previous
-
diff --git a/arch/ppc/boot/images/.gitignore b/arch/ppc/boot/images/.gitignore
deleted file mode 100644
index 21c2dc5..0000000
--- a/arch/ppc/boot/images/.gitignore
+++ /dev/null
@@ -1,6 +0,0 @@
-sImage
-vmapus
-vmlinux*
-miboot*
-zImage*
-uImage
diff --git a/arch/ppc/boot/images/Makefile b/arch/ppc/boot/images/Makefile
deleted file mode 100644
index 58415d5..0000000
--- a/arch/ppc/boot/images/Makefile
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# This dir holds all of the images for PPC machines.
-# Tom Rini January 2001
-
-MKIMAGE := $(srctree)/scripts/mkuboot.sh
-
-extra-y := vmlinux.bin vmlinux.gz
-
-# two make processes may write to vmlinux.gz at the same time with make -j
-quiet_cmd_mygzip = GZIP $@
-cmd_mygzip = gzip -f -9 < $< > $@.$$$$ && mv $@.$$$$ $@
-
-
-OBJCOPYFLAGS_vmlinux.bin := -O binary
-$(obj)/vmlinux.bin: vmlinux FORCE
- $(call if_changed,objcopy)
-
-$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
- $(call if_changed,mygzip)
-
-quiet_cmd_uimage = UIMAGE $@
- cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A ppc -O linux -T kernel \
- -C gzip -a 00000000 -e 00000000 -n 'Linux-$(KERNELRELEASE)' \
- -d $< $@
-
-targets += uImage
-$(obj)/uImage: $(obj)/vmlinux.gz
- $(Q)rm -f $@
- $(call cmd,uimage)
- @echo -n ' Image: $@ '
- @if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
-
-# Files generated that shall be removed upon make clean
-clean-files := sImage vmapus vmlinux* miboot* zImage* uImage
diff --git a/arch/ppc/boot/include/cpc700.h b/arch/ppc/boot/include/cpc700.h
deleted file mode 100644
index 28cfcde..0000000
--- a/arch/ppc/boot/include/cpc700.h
+++ /dev/null
@@ -1,26 +0,0 @@
-
-#ifndef __PPC_BOOT_CPC700_H
-#define __PPC_BOOT_CPC700_H
-
-#define CPC700_MEM_CFGADDR 0xff500008
-#define CPC700_MEM_CFGDATA 0xff50000c
-
-#define CPC700_MB0SA 0x38
-#define CPC700_MB0EA 0x58
-#define CPC700_MB1SA 0x3c
-#define CPC700_MB1EA 0x5c
-#define CPC700_MB2SA 0x40
-#define CPC700_MB2EA 0x60
-#define CPC700_MB3SA 0x44
-#define CPC700_MB3EA 0x64
-#define CPC700_MB4SA 0x48
-#define CPC700_MB4EA 0x68
-
-static inline long
-cpc700_read_memreg(int reg)
-{
- out_be32((volatile unsigned int *) CPC700_MEM_CFGADDR, reg);
- return in_be32((volatile unsigned int *) CPC700_MEM_CFGDATA);
-}
-
-#endif
diff --git a/arch/ppc/boot/include/iso_font.h b/arch/ppc/boot/include/iso_font.h
deleted file mode 100644
index bff050e..0000000
--- a/arch/ppc/boot/include/iso_font.h
+++ /dev/null
@@ -1,257 +0,0 @@
-static const unsigned char font[] = {
-/* 0x00 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x01 */ 0x00,0x00,0x7E,0x81,0xA5,0x81,0x81,0xBD,0x99,0x81,0x81,0x7E,0x00,0x00,0x00,0x00,
-/* 0x02 */ 0x00,0x00,0x7E,0xFF,0xDB,0xFF,0xFF,0xC3,0xC3,0xE7,0xFF,0x7E,0x00,0x00,0x00,0x00,
-/* 0x03 */ 0x00,0x00,0x00,0x00,0x6C,0xFE,0xFE,0xFE,0xFE,0x7C,0x38,0x10,0x00,0x00,0x00,0x00,
-/* 0x04 */ 0x00,0x00,0x00,0x00,0x10,0x38,0x7C,0xFE,0x7C,0x38,0x10,0x00,0x00,0x00,0x00,0x00,
-/* 0x05 */ 0x00,0x00,0x00,0x18,0x3C,0x3C,0xE7,0xE7,0xE7,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x06 */ 0x00,0x00,0x00,0x18,0x3C,0x7E,0xFF,0xFF,0x7E,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x07 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x3C,0x3C,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x08 */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xE7,0xC3,0xC3,0xE7,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
-/* 0x09 */ 0x00,0x00,0x00,0x00,0x00,0x3C,0x66,0x42,0x42,0x66,0x3C,0x00,0x00,0x00,0x00,0x00,
-/* 0x0A */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xC3,0x99,0xBD,0xBD,0x99,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,
-/* 0x0B */ 0x00,0x00,0x3E,0x0E,0x1A,0x32,0x78,0xCC,0xCC,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00,
-/* 0x0C */ 0x00,0x00,0x3C,0x66,0x66,0x66,0x66,0x3C,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x0D */ 0x00,0x00,0x30,0x38,0x3C,0x36,0x33,0x30,0x30,0x70,0xF0,0xE0,0x00,0x00,0x00,0x00,
-/* 0x0E */ 0x00,0x00,0x7F,0x63,0x7F,0x63,0x63,0x63,0x63,0x67,0xE7,0xE6,0xC0,0x00,0x00,0x00,
-/* 0x0F */ 0x00,0x00,0x00,0x18,0x18,0xDB,0x3C,0xE7,0x3C,0xDB,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x10 */ 0x00,0x80,0xC0,0xE0,0xF0,0xF8,0xFE,0xF8,0xF0,0xE0,0xC0,0x80,0x00,0x00,0x00,0x00,
-/* 0x11 */ 0x00,0x02,0x06,0x0E,0x1E,0x3E,0xFE,0x3E,0x1E,0x0E,0x06,0x02,0x00,0x00,0x00,0x00,
-/* 0x12 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,0x00,
-/* 0x13 */ 0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x66,0x66,0x00,0x00,0x00,0x00,
-/* 0x14 */ 0x00,0x00,0x7F,0xDB,0xDB,0xDB,0x7B,0x1B,0x1B,0x1B,0x1B,0x1B,0x00,0x00,0x00,0x00,
-/* 0x15 */ 0x00,0x7C,0xC6,0x60,0x38,0x6C,0xC6,0xC6,0x6C,0x38,0x0C,0xC6,0x7C,0x00,0x00,0x00,
-/* 0x16 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xFE,0xFE,0xFE,0x00,0x00,0x00,0x00,
-/* 0x17 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x7E,0x3C,0x18,0x7E,0x00,0x00,0x00,0x00,
-/* 0x18 */ 0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x19 */ 0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,
-/* 0x1A */ 0x00,0x00,0x00,0x00,0x00,0x18,0x0C,0xFE,0x0C,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x1B */ 0x00,0x00,0x00,0x00,0x00,0x30,0x60,0xFE,0x60,0x30,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x1C */ 0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0xC0,0xC0,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x1D */ 0x00,0x00,0x00,0x00,0x00,0x28,0x6C,0xFE,0x6C,0x28,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x1E */ 0x00,0x00,0x00,0x00,0x10,0x38,0x38,0x7C,0x7C,0xFE,0xFE,0x00,0x00,0x00,0x00,0x00,
-/* 0x1F */ 0x00,0x00,0x00,0x00,0xFE,0xFE,0x7C,0x7C,0x38,0x38,0x10,0x00,0x00,0x00,0x00,0x00,
-/* 0x20 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x21 */ 0x00,0x00,0x18,0x3C,0x3C,0x3C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x22 */ 0x00,0x66,0x66,0x66,0x24,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x23 */ 0x00,0x00,0x00,0x6C,0x6C,0xFE,0x6C,0x6C,0x6C,0xFE,0x6C,0x6C,0x00,0x00,0x00,0x00,
-/* 0x24 */ 0x18,0x18,0x7C,0xC6,0xC2,0xC0,0x7C,0x06,0x06,0x86,0xC6,0x7C,0x18,0x18,0x00,0x00,
-/* 0x25 */ 0x00,0x00,0x00,0x00,0xC2,0xC6,0x0C,0x18,0x30,0x60,0xC6,0x86,0x00,0x00,0x00,0x00,
-/* 0x26 */ 0x00,0x00,0x38,0x6C,0x6C,0x38,0x76,0xDC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x27 */ 0x00,0x30,0x30,0x30,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x28 */ 0x00,0x00,0x0C,0x18,0x30,0x30,0x30,0x30,0x30,0x30,0x18,0x0C,0x00,0x00,0x00,0x00,
-/* 0x29 */ 0x00,0x00,0x30,0x18,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x18,0x30,0x00,0x00,0x00,0x00,
-/* 0x2A */ 0x00,0x00,0x00,0x00,0x00,0x66,0x3C,0xFF,0x3C,0x66,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x2B */ 0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x2C */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00,
-/* 0x2D */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x2E */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x2F */ 0x00,0x00,0x00,0x00,0x02,0x06,0x0C,0x18,0x30,0x60,0xC0,0x80,0x00,0x00,0x00,0x00,
-/* 0x30 */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xD6,0xD6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00,
-/* 0x31 */ 0x00,0x00,0x18,0x38,0x78,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x00,0x00,0x00,0x00,
-/* 0x32 */ 0x00,0x00,0x7C,0xC6,0x06,0x0C,0x18,0x30,0x60,0xC0,0xC6,0xFE,0x00,0x00,0x00,0x00,
-/* 0x33 */ 0x00,0x00,0x7C,0xC6,0x06,0x06,0x3C,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x34 */ 0x00,0x00,0x0C,0x1C,0x3C,0x6C,0xCC,0xFE,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00,
-/* 0x35 */ 0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xFC,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x36 */ 0x00,0x00,0x38,0x60,0xC0,0xC0,0xFC,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x37 */ 0x00,0x00,0xFE,0xC6,0x06,0x06,0x0C,0x18,0x30,0x30,0x30,0x30,0x00,0x00,0x00,0x00,
-/* 0x38 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x7C,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x39 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x7E,0x06,0x06,0x06,0x0C,0x78,0x00,0x00,0x00,0x00,
-/* 0x3A */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,
-/* 0x3B */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x30,0x00,0x00,0x00,0x00,
-/* 0x3C */ 0x00,0x00,0x00,0x06,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x06,0x00,0x00,0x00,0x00,
-/* 0x3D */ 0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x3E */ 0x00,0x00,0x00,0x60,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x60,0x00,0x00,0x00,0x00,
-/* 0x3F */ 0x00,0x00,0x7C,0xC6,0xC6,0x0C,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x40 */ 0x00,0x00,0x00,0x7C,0xC6,0xC6,0xDE,0xDE,0xDE,0xDC,0xC0,0x7C,0x00,0x00,0x00,0x00,
-/* 0x41 */ 0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x42 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x66,0x66,0x66,0x66,0xFC,0x00,0x00,0x00,0x00,
-/* 0x43 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x00,0x00,0x00,0x00,
-/* 0x44 */ 0x00,0x00,0xF8,0x6C,0x66,0x66,0x66,0x66,0x66,0x66,0x6C,0xF8,0x00,0x00,0x00,0x00,
-/* 0x45 */ 0x00,0x00,0xFE,0x66,0x62,0x68,0x78,0x68,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00,
-/* 0x46 */ 0x00,0x00,0xFE,0x66,0x62,0x68,0x78,0x68,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
-/* 0x47 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xDE,0xC6,0xC6,0x66,0x3A,0x00,0x00,0x00,0x00,
-/* 0x48 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x49 */ 0x00,0x00,0x3C,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x4A */ 0x00,0x00,0x1E,0x0C,0x0C,0x0C,0x0C,0x0C,0xCC,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00,
-/* 0x4B */ 0x00,0x00,0xE6,0x66,0x66,0x6C,0x78,0x78,0x6C,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
-/* 0x4C */ 0x00,0x00,0xF0,0x60,0x60,0x60,0x60,0x60,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00,
-/* 0x4D */ 0x00,0x00,0xC6,0xEE,0xFE,0xFE,0xD6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x4E */ 0x00,0x00,0xC6,0xE6,0xF6,0xFE,0xDE,0xCE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x4F */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x50 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
-/* 0x51 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xD6,0xDE,0x7C,0x0C,0x0E,0x00,0x00,
-/* 0x52 */ 0x00,0x00,0xFC,0x66,0x66,0x66,0x7C,0x6C,0x66,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
-/* 0x53 */ 0x00,0x00,0x7C,0xC6,0xC6,0x60,0x38,0x0C,0x06,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x54 */ 0x00,0x00,0x7E,0x7E,0x5A,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x55 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x56 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x6C,0x38,0x10,0x00,0x00,0x00,0x00,
-/* 0x57 */ 0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0xEE,0x6C,0x00,0x00,0x00,0x00,
-/* 0x58 */ 0x00,0x00,0xC6,0xC6,0x6C,0x7C,0x38,0x38,0x7C,0x6C,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x59 */ 0x00,0x00,0x66,0x66,0x66,0x66,0x3C,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x5A */ 0x00,0x00,0xFE,0xC6,0x86,0x0C,0x18,0x30,0x60,0xC2,0xC6,0xFE,0x00,0x00,0x00,0x00,
-/* 0x5B */ 0x00,0x00,0x3C,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x3C,0x00,0x00,0x00,0x00,
-/* 0x5C */ 0x00,0x00,0x00,0x80,0xC0,0xE0,0x70,0x38,0x1C,0x0E,0x06,0x02,0x00,0x00,0x00,0x00,
-/* 0x5D */ 0x00,0x00,0x3C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x3C,0x00,0x00,0x00,0x00,
-/* 0x5E */ 0x10,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x5F */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,
-/* 0x60 */ 0x30,0x30,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x61 */ 0x00,0x00,0x00,0x00,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x62 */ 0x00,0x00,0xE0,0x60,0x60,0x78,0x6C,0x66,0x66,0x66,0x66,0x7C,0x00,0x00,0x00,0x00,
-/* 0x63 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC0,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x64 */ 0x00,0x00,0x1C,0x0C,0x0C,0x3C,0x6C,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x65 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xFE,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x66 */ 0x00,0x00,0x38,0x6C,0x64,0x60,0xF0,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
-/* 0x67 */ 0x00,0x00,0x00,0x00,0x00,0x3E,0x66,0x66,0x66,0x66,0x66,0x3E,0x06,0x66,0x3C,0x00,
-/* 0x68 */ 0x00,0x00,0xE0,0x60,0x60,0x6C,0x76,0x66,0x66,0x66,0x66,0xE6,0x00,0x00,0x00,0x00,
-/* 0x69 */ 0x00,0x00,0x18,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x6A */ 0x00,0x00,0x06,0x06,0x00,0x0E,0x06,0x06,0x06,0x06,0x06,0x06,0x66,0x66,0x3C,0x00,
-/* 0x6B */ 0x00,0x00,0xE0,0x60,0x60,0x66,0x6C,0x78,0x78,0x6C,0x66,0xE6,0x00,0x00,0x00,0x00,
-/* 0x6C */ 0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x6D */ 0x00,0x00,0x00,0x00,0x00,0x6C,0xFE,0xD6,0xD6,0xD6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x6E */ 0x00,0x00,0x00,0x00,0x00,0xDC,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00,
-/* 0x6F */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x70 */ 0x00,0x00,0x00,0x00,0x00,0xFC,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0x60,0xF0,0x00,
-/* 0x71 */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xCC,0xCC,0xCC,0xCC,0xCC,0x7C,0x0C,0x0C,0x1E,0x00,
-/* 0x72 */ 0x00,0x00,0x00,0x00,0x00,0xDC,0x76,0x66,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00,
-/* 0x73 */ 0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0x60,0x38,0x0C,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x74 */ 0x00,0x00,0x10,0x30,0x30,0xFC,0x30,0x30,0x30,0x30,0x36,0x1C,0x00,0x00,0x00,0x00,
-/* 0x75 */ 0x00,0x00,0x00,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x76 */ 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x3C,0x18,0x00,0x00,0x00,0x00,
-/* 0x77 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0x6C,0x00,0x00,0x00,0x00,
-/* 0x78 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0x6C,0x38,0x38,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00,
-/* 0x79 */ 0x00,0x00,0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0xF8,0x00,
-/* 0x7A */ 0x00,0x00,0x00,0x00,0x00,0xFE,0xCC,0x18,0x30,0x60,0xC6,0xFE,0x00,0x00,0x00,0x00,
-/* 0x7B */ 0x00,0x00,0x0E,0x18,0x18,0x18,0x70,0x18,0x18,0x18,0x18,0x0E,0x00,0x00,0x00,0x00,
-/* 0x7C */ 0x00,0x00,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x7D */ 0x00,0x00,0x70,0x18,0x18,0x18,0x0E,0x18,0x18,0x18,0x18,0x70,0x00,0x00,0x00,0x00,
-/* 0x7E */ 0x00,0x00,0x76,0xDC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0x7F */ 0x00,0x00,0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xC6,0xFE,0x00,0x00,0x00,0x00,0x00,
-/* 0x80 */ 0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x0C,0x06,0x7C,0x00,0x00,
-/* 0x81 */ 0x00,0x00,0xCC,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x82 */ 0x00,0x0C,0x18,0x30,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x83 */ 0x00,0x10,0x38,0x6C,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x84 */ 0x00,0x00,0xCC,0x00,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x85 */ 0x00,0x60,0x30,0x18,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x86 */ 0x00,0x38,0x6C,0x38,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x87 */ 0x00,0x00,0x00,0x00,0x3C,0x66,0x60,0x60,0x66,0x3C,0x0C,0x06,0x3C,0x00,0x00,0x00,
-/* 0x88 */ 0x00,0x10,0x38,0x6C,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x89 */ 0x00,0x00,0xC6,0x00,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x8A */ 0x00,0x60,0x30,0x18,0x00,0x7C,0xC6,0xC6,0xFE,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x8B */ 0x00,0x00,0x66,0x00,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x8C */ 0x00,0x18,0x3C,0x66,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x8D */ 0x00,0x60,0x30,0x18,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0x8E */ 0x00,0xC6,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x8F */ 0x38,0x6C,0x38,0x00,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0x90 */ 0x18,0x30,0x60,0x00,0xFE,0x66,0x60,0x7C,0x60,0x60,0x66,0xFE,0x00,0x00,0x00,0x00,
-/* 0x91 */ 0x00,0x00,0x00,0x00,0x00,0xCC,0x76,0x36,0x7E,0xD8,0xD8,0x6E,0x00,0x00,0x00,0x00,
-/* 0x92 */ 0x00,0x00,0x3E,0x6C,0xCC,0xCC,0xFE,0xCC,0xCC,0xCC,0xCC,0xCE,0x00,0x00,0x00,0x00,
-/* 0x93 */ 0x00,0x10,0x38,0x6C,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x94 */ 0x00,0x00,0xC6,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x95 */ 0x00,0x60,0x30,0x18,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x96 */ 0x00,0x30,0x78,0xCC,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x97 */ 0x00,0x60,0x30,0x18,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0x98 */ 0x00,0x00,0xC6,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0x78,0x00,
-/* 0x99 */ 0x00,0xC6,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x9A */ 0x00,0xC6,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0x9B */ 0x00,0x18,0x18,0x3C,0x66,0x60,0x60,0x60,0x66,0x3C,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x9C */ 0x00,0x38,0x6C,0x64,0x60,0xF8,0x60,0x60,0x60,0x60,0xE6,0xFC,0x00,0x00,0x00,0x00,
-/* 0x9D */ 0x00,0x00,0x66,0x66,0x3C,0x18,0x7E,0x18,0x7E,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0x9E */ 0x00,0xF8,0xCC,0xCC,0xF8,0xC4,0xCC,0xDE,0xCC,0xCC,0xCC,0xC6,0x00,0x00,0x00,0x00,
-/* 0x9F */ 0x00,0x0E,0x1B,0x18,0x18,0x18,0x7E,0x18,0x18,0x18,0x18,0x18,0xD8,0x70,0x00,0x00,
-/* 0xA0 */ 0x00,0x18,0x30,0x60,0x00,0x78,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0xA1 */ 0x00,0x0C,0x18,0x30,0x00,0x38,0x18,0x18,0x18,0x18,0x18,0x3C,0x00,0x00,0x00,0x00,
-/* 0xA2 */ 0x00,0x18,0x30,0x60,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0xA3 */ 0x00,0x18,0x30,0x60,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00,
-/* 0xA4 */ 0x00,0x00,0x76,0xDC,0x00,0xDC,0x66,0x66,0x66,0x66,0x66,0x66,0x00,0x00,0x00,0x00,
-/* 0xA5 */ 0x76,0xDC,0x00,0xC6,0xE6,0xF6,0xFE,0xDE,0xCE,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0xA6 */ 0x00,0x3C,0x6C,0x6C,0x3E,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xA7 */ 0x00,0x38,0x6C,0x6C,0x38,0x00,0x7C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xA8 */ 0x00,0x00,0x30,0x30,0x00,0x30,0x30,0x60,0xC0,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00,
-/* 0xA9 */ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00,
-/* 0xAA */ 0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0x06,0x06,0x06,0x00,0x00,0x00,0x00,0x00,
-/* 0xAB */ 0x00,0xC0,0xC0,0xC2,0xC6,0xCC,0x18,0x30,0x60,0xDC,0x86,0x0C,0x18,0x3E,0x00,0x00,
-/* 0xAC */ 0x00,0xC0,0xC0,0xC2,0xC6,0xCC,0x18,0x30,0x66,0xCE,0x9E,0x3E,0x06,0x06,0x00,0x00,
-/* 0xAD */ 0x00,0x00,0x18,0x18,0x00,0x18,0x18,0x18,0x3C,0x3C,0x3C,0x18,0x00,0x00,0x00,0x00,
-/* 0xAE */ 0x00,0x00,0x00,0x00,0x00,0x36,0x6C,0xD8,0x6C,0x36,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xAF */ 0x00,0x00,0x00,0x00,0x00,0xD8,0x6C,0x36,0x6C,0xD8,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xB0 */ 0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,0x11,0x44,
-/* 0xB1 */ 0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,0x55,0xAA,
-/* 0xB2 */ 0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,0xDD,0x77,
-/* 0xB3 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xB4 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xB5 */ 0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xB6 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xB7 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xB8 */ 0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xB9 */ 0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xBA */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xBB */ 0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xBC */ 0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xBD */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xBE */ 0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xBF */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC0 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xC1 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xC2 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC3 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC4 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xC5 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC6 */ 0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xC7 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xC8 */ 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xC9 */ 0x00,0x00,0x00,0x00,0x00,0x3F,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xCA */ 0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xCB */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xCC */ 0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xCD */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xCE */ 0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xCF */ 0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xD0 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xD1 */ 0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xD2 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xD3 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xD4 */ 0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xD5 */ 0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xD6 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xD7 */ 0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,
-/* 0xD8 */ 0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xD9 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xDA */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xDB */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
-/* 0xDC */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
-/* 0xDD */ 0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,0xF0,
-/* 0xDE */ 0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,0x0F,
-/* 0xDF */ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xE0 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0xD8,0xD8,0xD8,0xDC,0x76,0x00,0x00,0x00,0x00,
-/* 0xE1 */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xFC,0xC6,0xC6,0xC6,0xC6,0xDC,0xC0,0xC0,0x00,0x00,
-/* 0xE2 */ 0x00,0x00,0xFE,0xC6,0xC6,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0x00,0x00,0x00,0x00,
-/* 0xE3 */ 0x00,0x00,0x00,0x00,0x00,0xFE,0x6C,0x6C,0x6C,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,
-/* 0xE4 */ 0x00,0x00,0xFE,0xC6,0x60,0x30,0x18,0x18,0x30,0x60,0xC6,0xFE,0x00,0x00,0x00,0x00,
-/* 0xE5 */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xD8,0xD8,0xD8,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00,
-/* 0xE6 */ 0x00,0x00,0x00,0x00,0x00,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0xC0,0x00,0x00,0x00,
-/* 0xE7 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,
-/* 0xE8 */ 0x00,0x00,0x7E,0x18,0x3C,0x66,0x66,0x66,0x66,0x3C,0x18,0x7E,0x00,0x00,0x00,0x00,
-/* 0xE9 */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00,
-/* 0xEA */ 0x00,0x00,0x38,0x6C,0xC6,0xC6,0xC6,0x6C,0x6C,0x6C,0x6C,0xEE,0x00,0x00,0x00,0x00,
-/* 0xEB */ 0x00,0x00,0x1E,0x30,0x18,0x0C,0x3E,0x66,0x66,0x66,0x66,0x3C,0x00,0x00,0x00,0x00,
-/* 0xEC */ 0x00,0x00,0x00,0x00,0x00,0x7E,0xDB,0xDB,0xDB,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xED */ 0x00,0x00,0x00,0x03,0x06,0x7E,0xDB,0xDB,0xF3,0x7E,0x60,0xC0,0x00,0x00,0x00,0x00,
-/* 0xEE */ 0x00,0x00,0x1C,0x30,0x60,0x60,0x7C,0x60,0x60,0x60,0x30,0x1C,0x00,0x00,0x00,0x00,
-/* 0xEF */ 0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00,
-/* 0xF0 */ 0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,
-/* 0xF1 */ 0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,
-/* 0xF2 */ 0x00,0x00,0x00,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x00,0x7E,0x00,0x00,0x00,0x00,
-/* 0xF3 */ 0x00,0x00,0x00,0x0C,0x18,0x30,0x60,0x30,0x18,0x0C,0x00,0x7E,0x00,0x00,0x00,0x00,
-/* 0xF4 */ 0x00,0x0E,0x1B,0x1B,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,
-/* 0xF5 */ 0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xD8,0xD8,0xD8,0x70,0x00,0x00,0x00,0x00,
-/* 0xF6 */ 0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x7E,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,
-/* 0xF7 */ 0x00,0x00,0x00,0x00,0x00,0x76,0xDC,0x00,0x76,0xDC,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xF8 */ 0x00,0x38,0x6C,0x6C,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xF9 */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xFA */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xFB */ 0x00,0x0F,0x0C,0x0C,0x0C,0x0C,0x0C,0xEC,0x6C,0x6C,0x3C,0x1C,0x00,0x00,0x00,0x00,
-/* 0xFC */ 0x00,0xD8,0x6C,0x6C,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xFD */ 0x00,0x70,0xD8,0x30,0x60,0xC8,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
-/* 0xFE */ 0x00,0x00,0x00,0x00,0x7C,0x7C,0x7C,0x7C,0x7C,0x7C,0x7C,0x00,0x00,0x00,0x00,0x00,
-};
diff --git a/arch/ppc/boot/include/mpc10x.h b/arch/ppc/boot/include/mpc10x.h
deleted file mode 100644
index 6e5d540..0000000
--- a/arch/ppc/boot/include/mpc10x.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Common defines for the Motorola SPS MPC106/8240/107 Host bridge/Mem
- * ctrl/EPIC/etc.
- *
- * Author: Tom Rini <trini@mvista.com>
- *
- * This is a heavily stripped down version of:
- * include/asm-ppc/mpc10x.h
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __BOOT_MPC10X_H__
-#define __BOOT_MPC10X_H__
-
-/*
- * The values here don't completely map everything but should work in most
- * cases.
- *
- * MAP A (PReP Map)
- * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff
- * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff
- * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000
- * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
- *
- * MAP B (CHRP Map)
- * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff
- * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff
- * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000
- * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
- */
-
-/* Define the type of map to use */
-#define MPC10X_MEM_MAP_A 1
-#define MPC10X_MEM_MAP_B 2
-
-/* Map A (PReP Map) Defines */
-#define MPC10X_MAPA_CNFG_ADDR 0x80000cf8
-#define MPC10X_MAPA_CNFG_DATA 0x80000cfc
-
-/* Map B (CHRP Map) Defines */
-#define MPC10X_MAPB_CNFG_ADDR 0xfec00000
-#define MPC10X_MAPB_CNFG_DATA 0xfee00000
-
-/* Define offsets for the memory controller registers in the config space */
-#define MPC10X_MCTLR_MEM_START_1 0x80 /* Banks 0-3 */
-#define MPC10X_MCTLR_MEM_START_2 0x84 /* Banks 4-7 */
-#define MPC10X_MCTLR_EXT_MEM_START_1 0x88 /* Banks 0-3 */
-#define MPC10X_MCTLR_EXT_MEM_START_2 0x8c /* Banks 4-7 */
-
-#define MPC10X_MCTLR_MEM_END_1 0x90 /* Banks 0-3 */
-#define MPC10X_MCTLR_MEM_END_2 0x94 /* Banks 4-7 */
-#define MPC10X_MCTLR_EXT_MEM_END_1 0x98 /* Banks 0-3 */
-#define MPC10X_MCTLR_EXT_MEM_END_2 0x9c /* Banks 4-7 */
-
-#define MPC10X_MCTLR_MEM_BANK_ENABLES 0xa0
-
-#endif /* __BOOT_MPC10X_H__ */
diff --git a/arch/ppc/boot/include/mpsc_defs.h b/arch/ppc/boot/include/mpsc_defs.h
deleted file mode 100644
index 9f37e13..0000000
--- a/arch/ppc/boot/include/mpsc_defs.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * arch/ppc/boot/include/mpsc_defs.h
- *
- * Register definitions for the Marvell Multi-Protocol Serial Controller (MPSC),
- * Serial DMA Controller (SDMA), and Baud Rate Generator (BRG).
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef _PPC_BOOT_MPSC_DEFS_H__
-#define _PPC_BOOT_MPSC_DEFS_H__
-
-#define MPSC_NUM_CTLRS 2
-
-/*
- *****************************************************************************
- *
- * Multi-Protocol Serial Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* Main Configuratino Register Offsets */
-#define MPSC_MMCRL 0x0000
-#define MPSC_MMCRH 0x0004
-#define MPSC_MPCR 0x0008
-#define MPSC_CHR_1 0x000c
-#define MPSC_CHR_2 0x0010
-#define MPSC_CHR_3 0x0014
-#define MPSC_CHR_4 0x0018
-#define MPSC_CHR_5 0x001c
-#define MPSC_CHR_6 0x0020
-#define MPSC_CHR_7 0x0024
-#define MPSC_CHR_8 0x0028
-#define MPSC_CHR_9 0x002c
-#define MPSC_CHR_10 0x0030
-#define MPSC_CHR_11 0x0034
-
-#define MPSC_MPCR_CL_5 0
-#define MPSC_MPCR_CL_6 1
-#define MPSC_MPCR_CL_7 2
-#define MPSC_MPCR_CL_8 3
-#define MPSC_MPCR_SBL_1 0
-#define MPSC_MPCR_SBL_2 3
-
-#define MPSC_CHR_2_TEV (1<<1)
-#define MPSC_CHR_2_TA (1<<7)
-#define MPSC_CHR_2_TTCS (1<<9)
-#define MPSC_CHR_2_REV (1<<17)
-#define MPSC_CHR_2_RA (1<<23)
-#define MPSC_CHR_2_CRD (1<<25)
-#define MPSC_CHR_2_EH (1<<31)
-#define MPSC_CHR_2_PAR_ODD 0
-#define MPSC_CHR_2_PAR_SPACE 1
-#define MPSC_CHR_2_PAR_EVEN 2
-#define MPSC_CHR_2_PAR_MARK 3
-
-/* MPSC Signal Routing */
-#define MPSC_MRR 0x0000
-#define MPSC_RCRR 0x0004
-#define MPSC_TCRR 0x0008
-
-/*
- *****************************************************************************
- *
- * Serial DMA Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define SDMA_SDC 0x0000
-#define SDMA_SDCM 0x0008
-#define SDMA_RX_DESC 0x0800
-#define SDMA_RX_BUF_PTR 0x0808
-#define SDMA_SCRDP 0x0810
-#define SDMA_TX_DESC 0x0c00
-#define SDMA_SCTDP 0x0c10
-#define SDMA_SFTDP 0x0c14
-
-#define SDMA_DESC_CMDSTAT_PE (1<<0)
-#define SDMA_DESC_CMDSTAT_CDL (1<<1)
-#define SDMA_DESC_CMDSTAT_FR (1<<3)
-#define SDMA_DESC_CMDSTAT_OR (1<<6)
-#define SDMA_DESC_CMDSTAT_BR (1<<9)
-#define SDMA_DESC_CMDSTAT_MI (1<<10)
-#define SDMA_DESC_CMDSTAT_A (1<<11)
-#define SDMA_DESC_CMDSTAT_AM (1<<12)
-#define SDMA_DESC_CMDSTAT_CT (1<<13)
-#define SDMA_DESC_CMDSTAT_C (1<<14)
-#define SDMA_DESC_CMDSTAT_ES (1<<15)
-#define SDMA_DESC_CMDSTAT_L (1<<16)
-#define SDMA_DESC_CMDSTAT_F (1<<17)
-#define SDMA_DESC_CMDSTAT_P (1<<18)
-#define SDMA_DESC_CMDSTAT_EI (1<<23)
-#define SDMA_DESC_CMDSTAT_O (1<<31)
-
-#define SDMA_DESC_DFLT (SDMA_DESC_CMDSTAT_O | \
- SDMA_DESC_CMDSTAT_EI)
-
-#define SDMA_SDC_RFT (1<<0)
-#define SDMA_SDC_SFM (1<<1)
-#define SDMA_SDC_BLMR (1<<6)
-#define SDMA_SDC_BLMT (1<<7)
-#define SDMA_SDC_POVR (1<<8)
-#define SDMA_SDC_RIFB (1<<9)
-
-#define SDMA_SDCM_ERD (1<<7)
-#define SDMA_SDCM_AR (1<<15)
-#define SDMA_SDCM_STD (1<<16)
-#define SDMA_SDCM_TXD (1<<23)
-#define SDMA_SDCM_AT (1<<31)
-
-#define SDMA_0_CAUSE_RXBUF (1<<0)
-#define SDMA_0_CAUSE_RXERR (1<<1)
-#define SDMA_0_CAUSE_TXBUF (1<<2)
-#define SDMA_0_CAUSE_TXEND (1<<3)
-#define SDMA_1_CAUSE_RXBUF (1<<8)
-#define SDMA_1_CAUSE_RXERR (1<<9)
-#define SDMA_1_CAUSE_TXBUF (1<<10)
-#define SDMA_1_CAUSE_TXEND (1<<11)
-
-#define SDMA_CAUSE_RX_MASK (SDMA_0_CAUSE_RXBUF | SDMA_0_CAUSE_RXERR | \
- SDMA_1_CAUSE_RXBUF | SDMA_1_CAUSE_RXERR)
-#define SDMA_CAUSE_TX_MASK (SDMA_0_CAUSE_TXBUF | SDMA_0_CAUSE_TXEND | \
- SDMA_1_CAUSE_TXBUF | SDMA_1_CAUSE_TXEND)
-
-/* SDMA Interrupt registers */
-#define SDMA_INTR_CAUSE 0x0000
-#define SDMA_INTR_MASK 0x0080
-
-/*
- *****************************************************************************
- *
- * Baud Rate Generator Interface Registers
- *
- *****************************************************************************
- */
-
-#define BRG_BCR 0x0000
-#define BRG_BTR 0x0004
-
-#endif /*_PPC_BOOT_MPSC_DEFS_H__ */
diff --git a/arch/ppc/boot/include/nonstdio.h b/arch/ppc/boot/include/nonstdio.h
deleted file mode 100644
index f2b5526..0000000
--- a/arch/ppc/boot/include/nonstdio.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * This is sort of a catchall for I/O related functions. Stuff that
- * wouldn't be in 'stdio.h' normally is here, and it's 'nonstdio.h'
- * for a reason. -- Tom
- */
-typedef int FILE;
-extern FILE *stdin, *stdout;
-#define NULL ((void *)0)
-#define EOF (-1)
-#define fopen(n, m) NULL
-#define fflush(f) 0
-#define fclose(f) 0
-#define perror(s) printf("%s: no files!\n", (s))
-
-extern int getc(void);
-extern int printf(const char *format, ...);
-extern int sprintf(char *str, const char *format, ...);
-extern int tstc(void);
-extern void exit(void);
-extern void outb(int port, unsigned char val);
-extern void putc(const char c);
-extern void puthex(unsigned long val);
-extern void puts(const char *);
-extern void udelay(long delay);
-extern unsigned char inb(int port);
-extern void board_isa_init(void);
-extern void ISA_init(unsigned long base);
diff --git a/arch/ppc/boot/include/of1275.h b/arch/ppc/boot/include/of1275.h
deleted file mode 100644
index 4ed88ac..0000000
--- a/arch/ppc/boot/include/of1275.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-typedef void *prom_handle;
-typedef void *ihandle;
-typedef void *phandle;
-typedef int (*prom_entry)(void *);
-
-#define OF_INVALID_HANDLE ((prom_handle)-1UL)
-
-extern prom_entry of_prom_entry;
-
-/* function declarations */
-
-int call_prom(const char *service, int nargs, int nret, ...);
-int call_prom_ret(const char *service, int nargs, int nret,
- unsigned int *rets, ...);
-void * claim(unsigned int virt, unsigned int size, unsigned int align);
-int map(unsigned int phys, unsigned int virt, unsigned int size);
-void enter(void);
-void exit(void);
-phandle finddevice(const char *name);
-int getprop(phandle node, const char *name, void *buf, int buflen);
-void ofinit(prom_entry entry);
-int ofstdio(ihandle *stdin, ihandle *stdout, ihandle *stderr);
-int read(ihandle instance, void *buf, int buflen);
-void release(void *virt, unsigned int size);
-int write(ihandle instance, void *buf, int buflen);
-
-/* inlines */
-
-extern inline void pause(void)
-{
- enter();
-}
diff --git a/arch/ppc/boot/include/rs6000.h b/arch/ppc/boot/include/rs6000.h
deleted file mode 100644
index 433f450..0000000
--- a/arch/ppc/boot/include/rs6000.h
+++ /dev/null
@@ -1,243 +0,0 @@
-/* IBM RS/6000 "XCOFF" file definitions for BFD.
- Copyright (C) 1990, 1991 Free Software Foundation, Inc.
- FIXME: Can someone provide a transliteration of this name into ASCII?
- Using the following chars caused a compiler warning on HIUX (so I replaced
- them with octal escapes), and isn't useful without an understanding of what
- character set it is.
- Written by Mimi Ph\373\364ng-Th\345o V\365 of IBM
- and John Gilmore of Cygnus Support. */
-
-/********************** FILE HEADER **********************/
-
-struct external_filehdr {
- char f_magic[2]; /* magic number */
- char f_nscns[2]; /* number of sections */
- char f_timdat[4]; /* time & date stamp */
- char f_symptr[4]; /* file pointer to symtab */
- char f_nsyms[4]; /* number of symtab entries */
- char f_opthdr[2]; /* sizeof(optional hdr) */
- char f_flags[2]; /* flags */
-};
-
- /* IBM RS/6000 */
-#define U802WRMAGIC 0730 /* writeable text segments **chh** */
-#define U802ROMAGIC 0735 /* readonly sharable text segments */
-#define U802TOCMAGIC 0737 /* readonly text segments and TOC */
-
-#define BADMAG(x) \
- ((x).f_magic != U802ROMAGIC && (x).f_magic != U802WRMAGIC && \
- (x).f_magic != U802TOCMAGIC)
-
-#define FILHDR struct external_filehdr
-#define FILHSZ 20
-
-
-/********************** AOUT "OPTIONAL HEADER" **********************/
-
-
-typedef struct
-{
- unsigned char magic[2]; /* type of file */
- unsigned char vstamp[2]; /* version stamp */
- unsigned char tsize[4]; /* text size in bytes, padded to FW bdry */
- unsigned char dsize[4]; /* initialized data " " */
- unsigned char bsize[4]; /* uninitialized data " " */
- unsigned char entry[4]; /* entry pt. */
- unsigned char text_start[4]; /* base of text used for this file */
- unsigned char data_start[4]; /* base of data used for this file */
- unsigned char o_toc[4]; /* address of TOC */
- unsigned char o_snentry[2]; /* section number of entry point */
- unsigned char o_sntext[2]; /* section number of .text section */
- unsigned char o_sndata[2]; /* section number of .data section */
- unsigned char o_sntoc[2]; /* section number of TOC */
- unsigned char o_snloader[2]; /* section number of .loader section */
- unsigned char o_snbss[2]; /* section number of .bss section */
- unsigned char o_algntext[2]; /* .text alignment */
- unsigned char o_algndata[2]; /* .data alignment */
- unsigned char o_modtype[2]; /* module type (??) */
- unsigned char o_cputype[2]; /* cpu type */
- unsigned char o_maxstack[4]; /* max stack size (??) */
- unsigned char o_maxdata[4]; /* max data size (??) */
- unsigned char o_resv2[12]; /* reserved */
-}
-AOUTHDR;
-
-#define AOUTSZ 72
-#define SMALL_AOUTSZ (28)
-#define AOUTHDRSZ 72
-
-#define RS6K_AOUTHDR_OMAGIC 0x0107 /* old: text & data writeable */
-#define RS6K_AOUTHDR_NMAGIC 0x0108 /* new: text r/o, data r/w */
-#define RS6K_AOUTHDR_ZMAGIC 0x010B /* paged: text r/o, both page-aligned */
-
-
-/********************** SECTION HEADER **********************/
-
-
-struct external_scnhdr {
- char s_name[8]; /* section name */
- char s_paddr[4]; /* physical address, aliased s_nlib */
- char s_vaddr[4]; /* virtual address */
- char s_size[4]; /* section size */
- char s_scnptr[4]; /* file ptr to raw data for section */
- char s_relptr[4]; /* file ptr to relocation */
- char s_lnnoptr[4]; /* file ptr to line numbers */
- char s_nreloc[2]; /* number of relocation entries */
- char s_nlnno[2]; /* number of line number entries*/
- char s_flags[4]; /* flags */
-};
-
-/*
- * names of "special" sections
- */
-#define _TEXT ".text"
-#define _DATA ".data"
-#define _BSS ".bss"
-#define _PAD ".pad"
-#define _LOADER ".loader"
-
-#define SCNHDR struct external_scnhdr
-#define SCNHSZ 40
-
-/* XCOFF uses a special .loader section with type STYP_LOADER. */
-#define STYP_LOADER 0x1000
-
-/* XCOFF uses a special .debug section with type STYP_DEBUG. */
-#define STYP_DEBUG 0x2000
-
-/* XCOFF handles line number or relocation overflow by creating
- another section header with STYP_OVRFLO set. */
-#define STYP_OVRFLO 0x8000
-
-/********************** LINE NUMBERS **********************/
-
-/* 1 line number entry for every "breakpointable" source line in a section.
- * Line numbers are grouped on a per function basis; first entry in a function
- * grouping will have l_lnno = 0 and in place of physical address will be the
- * symbol table index of the function name.
- */
-struct external_lineno {
- union {
- char l_symndx[4]; /* function name symbol index, iff l_lnno == 0*/
- char l_paddr[4]; /* (physical) address of line number */
- } l_addr;
- char l_lnno[2]; /* line number */
-};
-
-
-#define LINENO struct external_lineno
-#define LINESZ 6
-
-
-/********************** SYMBOLS **********************/
-
-#define E_SYMNMLEN 8 /* # characters in a symbol name */
-#define E_FILNMLEN 14 /* # characters in a file name */
-#define E_DIMNUM 4 /* # array dimensions in auxiliary entry */
-
-struct external_syment
-{
- union {
- char e_name[E_SYMNMLEN];
- struct {
- char e_zeroes[4];
- char e_offset[4];
- } e;
- } e;
- char e_value[4];
- char e_scnum[2];
- char e_type[2];
- char e_sclass[1];
- char e_numaux[1];
-};
-
-
-
-#define N_BTMASK (017)
-#define N_TMASK (060)
-#define N_BTSHFT (4)
-#define N_TSHIFT (2)
-
-
-union external_auxent {
- struct {
- char x_tagndx[4]; /* str, un, or enum tag indx */
- union {
- struct {
- char x_lnno[2]; /* declaration line number */
- char x_size[2]; /* str/union/array size */
- } x_lnsz;
- char x_fsize[4]; /* size of function */
- } x_misc;
- union {
- struct { /* if ISFCN, tag, or .bb */
- char x_lnnoptr[4]; /* ptr to fcn line # */
- char x_endndx[4]; /* entry ndx past block end */
- } x_fcn;
- struct { /* if ISARY, up to 4 dimen. */
- char x_dimen[E_DIMNUM][2];
- } x_ary;
- } x_fcnary;
- char x_tvndx[2]; /* tv index */
- } x_sym;
-
- union {
- char x_fname[E_FILNMLEN];
- struct {
- char x_zeroes[4];
- char x_offset[4];
- } x_n;
- } x_file;
-
- struct {
- char x_scnlen[4]; /* section length */
- char x_nreloc[2]; /* # relocation entries */
- char x_nlinno[2]; /* # line numbers */
- } x_scn;
-
- struct {
- char x_tvfill[4]; /* tv fill value */
- char x_tvlen[2]; /* length of .tv */
- char x_tvran[2][2]; /* tv range */
- } x_tv; /* info about .tv section (in auxent of symbol .tv)) */
-
- struct {
- unsigned char x_scnlen[4];
- unsigned char x_parmhash[4];
- unsigned char x_snhash[2];
- unsigned char x_smtyp[1];
- unsigned char x_smclas[1];
- unsigned char x_stab[4];
- unsigned char x_snstab[2];
- } x_csect;
-
-};
-
-#define SYMENT struct external_syment
-#define SYMESZ 18
-#define AUXENT union external_auxent
-#define AUXESZ 18
-#define DBXMASK 0x80 /* for dbx storage mask */
-#define SYMNAME_IN_DEBUG(symptr) ((symptr)->n_sclass & DBXMASK)
-
-
-
-/********************** RELOCATION DIRECTIVES **********************/
-
-
-struct external_reloc {
- char r_vaddr[4];
- char r_symndx[4];
- char r_size[1];
- char r_type[1];
-};
-
-
-#define RELOC struct external_reloc
-#define RELSZ 10
-
-#define DEFAULT_DATA_SECTION_ALIGNMENT 4
-#define DEFAULT_BSS_SECTION_ALIGNMENT 4
-#define DEFAULT_TEXT_SECTION_ALIGNMENT 4
-/* For new sections we havn't heard of before */
-#define DEFAULT_SECTION_ALIGNMENT 4
diff --git a/arch/ppc/boot/include/serial.h b/arch/ppc/boot/include/serial.h
deleted file mode 100644
index d710eab..0000000
--- a/arch/ppc/boot/include/serial.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * A really private header file for the (dumb) serial driver in arch/ppc/boot
- *
- * Shamelessly taken from include/linux/serialP.h:
- *
- * Copyright (C) 1997 by Theodore Ts'o.
- *
- * Redistribution of this file is permitted under the terms of the GNU
- * Public License (GPL)
- */
-
-#ifndef _PPC_BOOT_SERIALP_H
-#define _PPC_BOOT_SERIALP_H
-
-/*
- * This is our internal structure for each serial port's state.
- *
- * Many fields are paralleled by the structure used by the serial_struct
- * structure.
- *
- * Given that this is how SERIAL_PORT_DFNS are done, and that we need
- * to use a few of their fields, we need to have our own copy of it.
- */
-struct serial_state {
- int magic;
- int baud_base;
- unsigned long port;
- int irq;
- int flags;
- int hub6;
- int type;
- int line;
- int revision; /* Chip revision (950) */
- int xmit_fifo_size;
- int custom_divisor;
- int count;
- u8 *iomem_base;
- u16 iomem_reg_shift;
- unsigned short close_delay;
- unsigned short closing_wait; /* time to wait before closing */
- unsigned long icount;
- int io_type;
- void *info;
- void *dev;
-};
-#endif /* _PPC_BOOT_SERIAL_H */
diff --git a/arch/ppc/boot/ld.script b/arch/ppc/boot/ld.script
deleted file mode 100644
index d4dd8f1..0000000
--- a/arch/ppc/boot/ld.script
+++ /dev/null
@@ -1,85 +0,0 @@
-OUTPUT_ARCH(powerpc:common)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .plt : { *(.plt) }
- .text :
- {
- *(.text)
- *(.fixup)
- __relocate_start = .;
- *(.relocate_code)
- __relocate_end = .;
- }
- _etext = .;
- PROVIDE (etext = .);
-
- /* Read-write section, merged into data segment: */
- . = ALIGN(4096);
- .data :
- {
- *(.data)
- *(.data1)
- *(.data.boot)
- *(.sdata)
- *(.sdata2)
- *(.got.plt) *(.got)
- *(.dynamic)
- *(.rodata)
- *(.rodata.*)
- *(.rodata1)
- *(.got1)
- __image_begin = .;
- *(.image)
- __image_end = .;
- . = ALIGN(4096);
- __ramdisk_begin = .;
- *(.ramdisk)
- __ramdisk_end = .;
- . = ALIGN(4096);
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = ALIGN(4096);
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-
- /DISCARD/ : {
- *(__ksymtab)
- *(__ksymtab_strings)
- *(__bug_table)
- *(__kcrctab)
- }
-
-}
diff --git a/arch/ppc/boot/lib/.gitignore b/arch/ppc/boot/lib/.gitignore
deleted file mode 100644
index 1629a61..0000000
--- a/arch/ppc/boot/lib/.gitignore
+++ /dev/null
@@ -1,3 +0,0 @@
-inffast.c
-inflate.c
-inftrees.c
diff --git a/arch/ppc/boot/lib/Makefile b/arch/ppc/boot/lib/Makefile
deleted file mode 100644
index 2f995f7..0000000
--- a/arch/ppc/boot/lib/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# Makefile for some libs needed by zImage.
-#
-
-CFLAGS_kbd.o := -Idrivers/char
-CFLAGS_vreset.o := -Iarch/ppc/boot/include
-
-zlib := inffast.c inflate.c inftrees.c
-
-lib-y += $(zlib:.c=.o) div64.o
-lib-$(CONFIG_VGA_CONSOLE) += vreset.o kbd.o
-
-
-# zlib files needs header from their original place
-EXTRA_CFLAGS += -Ilib/zlib_inflate
-
-quiet_cmd_copy_zlib = COPY $@
- cmd_copy_zlib = cat $< > $@
-
-$(addprefix $(obj)/,$(zlib)): $(obj)/%: $(srctree)/lib/zlib_inflate/%
- $(call cmd,copy_zlib)
-
-clean-files := $(zlib)
diff --git a/arch/ppc/boot/lib/div64.S b/arch/ppc/boot/lib/div64.S
deleted file mode 100644
index 3527569..0000000
--- a/arch/ppc/boot/lib/div64.S
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Divide a 64-bit unsigned number by a 32-bit unsigned number.
- * This routine assumes that the top 32 bits of the dividend are
- * non-zero to start with.
- * On entry, r3 points to the dividend, which get overwritten with
- * the 64-bit quotient, and r4 contains the divisor.
- * On exit, r3 contains the remainder.
- *
- * Copyright (C) 2002 Paul Mackerras, IBM Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <asm/ppc_asm.h>
-#include <asm/processor.h>
-
-_GLOBAL(__div64_32)
- lwz r5,0(r3) # get the dividend into r5/r6
- lwz r6,4(r3)
- cmplw r5,r4
- li r7,0
- li r8,0
- blt 1f
- divwu r7,r5,r4 # if dividend.hi >= divisor,
- mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
- subf. r5,r0,r5 # dividend.hi %= divisor
- beq 3f
-1: mr r11,r5 # here dividend.hi != 0
- andis. r0,r5,0xc000
- bne 2f
- cntlzw r0,r5 # we are shifting the dividend right
- li r10,-1 # to make it < 2^32, and shifting
- srw r10,r10,r0 # the divisor right the same amount,
- add r9,r4,r10 # rounding up (so the estimate cannot
- andc r11,r6,r10 # ever be too large, only too small)
- andc r9,r9,r10
- or r11,r5,r11
- rotlw r9,r9,r0
- rotlw r11,r11,r0
- divwu r11,r11,r9 # then we divide the shifted quantities
-2: mullw r10,r11,r4 # to get an estimate of the quotient,
- mulhwu r9,r11,r4 # multiply the estimate by the divisor,
- subfc r6,r10,r6 # take the product from the divisor,
- add r8,r8,r11 # and add the estimate to the accumulated
- subfe. r5,r9,r5 # quotient
- bne 1b
-3: cmplw r6,r4
- blt 4f
- divwu r0,r6,r4 # perform the remaining 32-bit division
- mullw r10,r0,r4 # and get the remainder
- add r8,r8,r0
- subf r6,r10,r6
-4: stw r7,0(r3) # return the quotient in *r3
- stw r8,4(r3)
- mr r3,r6 # return the remainder in r3
- blr
diff --git a/arch/ppc/boot/lib/kbd.c b/arch/ppc/boot/lib/kbd.c
deleted file mode 100644
index 3931727..0000000
--- a/arch/ppc/boot/lib/kbd.c
+++ /dev/null
@@ -1,248 +0,0 @@
-#include <linux/keyboard.h>
-
-#include "defkeymap.c" /* yeah I know it's bad -- Cort */
-
-
-unsigned char shfts, ctls, alts, caps;
-
-#define KBDATAP 0x60 /* kbd data port */
-#define KBSTATUSPORT 0x61 /* kbd status */
-#define KBSTATP 0x64 /* kbd status port */
-#define KBINRDY 0x01
-#define KBOUTRDY 0x02
-
-extern unsigned char inb(int port);
-extern void outb(int port, char val);
-extern void puts(const char *);
-extern void puthex(unsigned long val);
-extern void udelay(long x);
-
-static int kbd(int noblock)
-{
- unsigned char dt, brk, val;
- unsigned code;
-loop:
- if (noblock) {
- if ((inb(KBSTATP) & KBINRDY) == 0)
- return (-1);
- } else while((inb(KBSTATP) & KBINRDY) == 0) ;
-
- dt = inb(KBDATAP);
-
- brk = dt & 0x80; /* brk == 1 on key release */
- dt = dt & 0x7f; /* keycode */
-
- if (shfts)
- code = shift_map[dt];
- else if (ctls)
- code = ctrl_map[dt];
- else
- code = plain_map[dt];
-
- val = KVAL(code);
- switch (KTYP(code) & 0x0f) {
- case KT_LATIN:
- if (brk)
- break;
- if (alts)
- val |= 0x80;
- if (val == 0x7f) /* map delete to backspace */
- val = '\b';
- return val;
-
- case KT_LETTER:
- if (brk)
- break;
- if (caps)
- val -= 'a'-'A';
- return val;
-
- case KT_SPEC:
- if (brk)
- break;
- if (val == KVAL(K_CAPS))
- caps = !caps;
- else if (val == KVAL(K_ENTER)) {
-enter: /* Wait for key up */
- while (1) {
- while((inb(KBSTATP) & KBINRDY) == 0) ;
- dt = inb(KBDATAP);
- if (dt & 0x80) /* key up */ break;
- }
- return 10;
- }
- break;
-
- case KT_PAD:
- if (brk)
- break;
- if (val < 10)
- return val;
- if (val == KVAL(K_PENTER))
- goto enter;
- break;
-
- case KT_SHIFT:
- switch (val) {
- case KG_SHIFT:
- case KG_SHIFTL:
- case KG_SHIFTR:
- shfts = brk ? 0 : 1;
- break;
- case KG_ALT:
- case KG_ALTGR:
- alts = brk ? 0 : 1;
- break;
- case KG_CTRL:
- case KG_CTRLL:
- case KG_CTRLR:
- ctls = brk ? 0 : 1;
- break;
- }
- break;
-
- case KT_LOCK:
- switch (val) {
- case KG_SHIFT:
- case KG_SHIFTL:
- case KG_SHIFTR:
- if (brk)
- shfts = !shfts;
- break;
- case KG_ALT:
- case KG_ALTGR:
- if (brk)
- alts = !alts;
- break;
- case KG_CTRL:
- case KG_CTRLL:
- case KG_CTRLR:
- if (brk)
- ctls = !ctls;
- break;
- }
- break;
- }
- if (brk) return (-1); /* Ignore initial 'key up' codes */
- goto loop;
-}
-
-static int __kbdreset(void)
-{
- unsigned char c;
- int i, t;
-
- /* flush input queue */
- t = 2000;
- while ((inb(KBSTATP) & KBINRDY))
- {
- (void)inb(KBDATAP);
- if (--t == 0)
- return 1;
- }
- /* Send self-test */
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0)
- return 2;
- outb(KBSTATP,0xAA);
- t = 200000;
- while ((inb(KBSTATP) & KBINRDY) == 0) /* wait input ready */
- if (--t == 0)
- return 3;
- if ((c = inb(KBDATAP)) != 0x55)
- {
- puts("Keyboard self test failed - result:");
- puthex(c);
- puts("\n");
- }
- /* Enable interrupts and keyboard controller */
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0) return 4;
- outb(KBSTATP,0x60);
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0) return 5;
- outb(KBDATAP,0x45);
- for (i = 0; i < 10000; i++) udelay(1);
-
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0) return 6;
- outb(KBSTATP,0x20);
- t = 200000;
- while ((inb(KBSTATP) & KBINRDY) == 0) /* wait input ready */
- if (--t == 0) return 7;
- if (! (inb(KBDATAP) & 0x40)) {
- /*
- * Quote from PS/2 System Reference Manual:
- *
- * "Address hex 0060 and address hex 0064 should be
- * written only when the input-buffer-full bit and
- * output-buffer-full bit in the Controller Status
- * register are set 0." (KBINRDY and KBOUTRDY)
- */
- t = 200000;
- while (inb(KBSTATP) & (KBINRDY | KBOUTRDY))
- if (--t == 0) return 8;
- outb(KBDATAP,0xF0);
- t = 200000;
- while (inb(KBSTATP) & (KBINRDY | KBOUTRDY))
- if (--t == 0) return 9;
- outb(KBDATAP,0x01);
- }
- t = 20000;
- while (inb(KBSTATP) & KBOUTRDY)
- if (--t == 0) return 10;
- outb(KBSTATP,0xAE);
- return 0;
-}
-
-static void kbdreset(void)
-{
- int ret = __kbdreset();
-
- if (ret) {
- puts("__kbdreset failed: ");
- puthex(ret);
- puts("\n");
- }
-}
-
-/* We have to actually read the keyboard when CRT_tstc is called,
- * since the pending data might be a key release code, and therefore
- * not valid data. In this case, kbd() will return -1, even though there's
- * data to be read. Of course, we might actually read a valid key press,
- * in which case it gets queued into key_pending for use by CRT_getc.
- */
-
-static int kbd_reset = 0;
-
-static int key_pending = -1;
-
-int CRT_getc(void)
-{
- int c;
- if (!kbd_reset) {kbdreset(); kbd_reset++; }
-
- if (key_pending != -1) {
- c = key_pending;
- key_pending = -1;
- return c;
- } else {
- while ((c = kbd(0)) == 0) ;
- return c;
- }
-}
-
-int CRT_tstc(void)
-{
- if (!kbd_reset) {kbdreset(); kbd_reset++; }
-
- while (key_pending == -1 && ((inb(KBSTATP) & KBINRDY) != 0)) {
- key_pending = kbd(1);
- }
-
- return (key_pending != -1);
-}
diff --git a/arch/ppc/boot/lib/vreset.c b/arch/ppc/boot/lib/vreset.c
deleted file mode 100644
index 98539e9..0000000
--- a/arch/ppc/boot/lib/vreset.c
+++ /dev/null
@@ -1,805 +0,0 @@
-/*
- * vreset.c
- *
- * Initialize the VGA control registers to 80x25 text mode.
- *
- * Adapted from a program by:
- * Steve Sellgren
- * San Francisco Indigo Company
- * sfindigo!sellgren@uunet.uu.net
- *
- * Original concept by:
- * Gary Thomas <gdt@linuxppc.org>
- * Adapted for Moto boxes by:
- * Pat Kane & Mark Scott, 1996
- * Adapted for IBM portables by:
- * Takeshi Ishimoto
- * Multi-console support:
- * Terje Malmedal <terje.malmedal@usit.uio.no>
- */
-
-#include "iso_font.h"
-#include "nonstdio.h"
-
-extern char *vidmem;
-extern int lines, cols;
-struct VaRegs;
-
-/*
- * VGA Register
- */
-struct VgaRegs
-{
- unsigned short io_port;
- unsigned char io_index;
- unsigned char io_value;
-};
-
-void unlockVideo(int slot);
-void setTextRegs(struct VgaRegs *svp);
-void setTextCLUT(int shift);
-void clearVideoMemory(void);
-void loadFont(unsigned char *ISA_mem);
-
-static void mdelay(int ms)
-{
- for (; ms > 0; --ms)
- udelay(1000);
-}
-
-/*
- * Default console text mode registers used to reset
- * graphics adapter.
- */
-#define NREGS 54
-#define ENDMK 0xFFFF /* End marker */
-
-#define S3Vendor 0x5333
-#define CirrusVendor 0x1013
-#define DiamondVendor 0x100E
-#define MatroxVendor 0x102B
-#define ParadiseVendor 0x101C
-
-struct VgaRegs GenVgaTextRegs[NREGS+1] = {
- /* port index value */
- /* SR Regs */
- { 0x3c4, 0x1, 0x0 },
- { 0x3c4, 0x2, 0x3 },
- { 0x3c4, 0x3, 0x0 },
- { 0x3c4, 0x4, 0x2 },
- /* CR Regs */
- { 0x3d4, 0x0, 0x5f },
- { 0x3d4, 0x1, 0x4f },
- { 0x3d4, 0x2, 0x50 },
- { 0x3d4, 0x3, 0x82 },
- { 0x3d4, 0x4, 0x55 },
- { 0x3d4, 0x5, 0x81 },
- { 0x3d4, 0x6, 0xbf },
- { 0x3d4, 0x7, 0x1f },
- { 0x3d4, 0x8, 0x00 },
- { 0x3d4, 0x9, 0x4f },
- { 0x3d4, 0xa, 0x0d },
- { 0x3d4, 0xb, 0x0e },
- { 0x3d4, 0xc, 0x00 },
- { 0x3d4, 0xd, 0x00 },
- { 0x3d4, 0xe, 0x00 },
- { 0x3d4, 0xf, 0x00 },
- { 0x3d4, 0x10, 0x9c },
- { 0x3d4, 0x11, 0x8e },
- { 0x3d4, 0x12, 0x8f },
- { 0x3d4, 0x13, 0x28 },
- { 0x3d4, 0x14, 0x1f },
- { 0x3d4, 0x15, 0x96 },
- { 0x3d4, 0x16, 0xb9 },
- { 0x3d4, 0x17, 0xa3 },
- /* GR Regs */
- { 0x3ce, 0x0, 0x0 },
- { 0x3ce, 0x1, 0x0 },
- { 0x3ce, 0x2, 0x0 },
- { 0x3ce, 0x3, 0x0 },
- { 0x3ce, 0x4, 0x0 },
- { 0x3ce, 0x5, 0x10 },
- { 0x3ce, 0x6, 0xe },
- { 0x3ce, 0x7, 0x0 },
- { 0x3ce, 0x8, 0xff },
- { ENDMK }
-};
-
-struct RGBColors
-{
- unsigned char r, g, b;
-};
-
-/*
- * Default console text mode color table.
- * These values were obtained by booting Linux with
- * text mode firmware & then dumping the registers.
- */
-struct RGBColors TextCLUT[256] =
-{
- /* red green blue */
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x2a },
- { 0x0, 0x2a, 0x0 },
- { 0x0, 0x2a, 0x2a },
- { 0x2a, 0x0, 0x0 },
- { 0x2a, 0x0, 0x2a },
- { 0x2a, 0x2a, 0x0 },
- { 0x2a, 0x2a, 0x2a },
- { 0x0, 0x0, 0x15 },
- { 0x0, 0x0, 0x3f },
- { 0x0, 0x2a, 0x15 },
- { 0x0, 0x2a, 0x3f },
- { 0x2a, 0x0, 0x15 },
- { 0x2a, 0x0, 0x3f },
- { 0x2a, 0x2a, 0x15 },
- { 0x2a, 0x2a, 0x3f },
- { 0x0, 0x15, 0x0 },
- { 0x0, 0x15, 0x2a },
- { 0x0, 0x3f, 0x0 },
- { 0x0, 0x3f, 0x2a },
- { 0x2a, 0x15, 0x0 },
- { 0x2a, 0x15, 0x2a },
- { 0x2a, 0x3f, 0x0 },
- { 0x2a, 0x3f, 0x2a },
- { 0x0, 0x15, 0x15 },
- { 0x0, 0x15, 0x3f },
- { 0x0, 0x3f, 0x15 },
- { 0x0, 0x3f, 0x3f },
- { 0x2a, 0x15, 0x15 },
- { 0x2a, 0x15, 0x3f },
- { 0x2a, 0x3f, 0x15 },
- { 0x2a, 0x3f, 0x3f },
- { 0x15, 0x0, 0x0 },
- { 0x15, 0x0, 0x2a },
- { 0x15, 0x2a, 0x0 },
- { 0x15, 0x2a, 0x2a },
- { 0x3f, 0x0, 0x0 },
- { 0x3f, 0x0, 0x2a },
- { 0x3f, 0x2a, 0x0 },
- { 0x3f, 0x2a, 0x2a },
- { 0x15, 0x0, 0x15 },
- { 0x15, 0x0, 0x3f },
- { 0x15, 0x2a, 0x15 },
- { 0x15, 0x2a, 0x3f },
- { 0x3f, 0x0, 0x15 },
- { 0x3f, 0x0, 0x3f },
- { 0x3f, 0x2a, 0x15 },
- { 0x3f, 0x2a, 0x3f },
- { 0x15, 0x15, 0x0 },
- { 0x15, 0x15, 0x2a },
- { 0x15, 0x3f, 0x0 },
- { 0x15, 0x3f, 0x2a },
- { 0x3f, 0x15, 0x0 },
- { 0x3f, 0x15, 0x2a },
- { 0x3f, 0x3f, 0x0 },
- { 0x3f, 0x3f, 0x2a },
- { 0x15, 0x15, 0x15 },
- { 0x15, 0x15, 0x3f },
- { 0x15, 0x3f, 0x15 },
- { 0x15, 0x3f, 0x3f },
- { 0x3f, 0x15, 0x15 },
- { 0x3f, 0x15, 0x3f },
- { 0x3f, 0x3f, 0x15 },
- { 0x3f, 0x3f, 0x3f },
- { 0x39, 0xc, 0x5 },
- { 0x15, 0x2c, 0xf },
- { 0x26, 0x10, 0x3d },
- { 0x29, 0x29, 0x38 },
- { 0x4, 0x1a, 0xe },
- { 0x2, 0x1e, 0x3a },
- { 0x3c, 0x25, 0x33 },
- { 0x3c, 0xc, 0x2c },
- { 0x3f, 0x3, 0x2b },
- { 0x1c, 0x9, 0x13 },
- { 0x25, 0x2a, 0x35 },
- { 0x1e, 0xa, 0x38 },
- { 0x24, 0x8, 0x3 },
- { 0x3, 0xe, 0x36 },
- { 0xc, 0x6, 0x2a },
- { 0x26, 0x3, 0x32 },
- { 0x5, 0x2f, 0x33 },
- { 0x3c, 0x35, 0x2f },
- { 0x2d, 0x26, 0x3e },
- { 0xd, 0xa, 0x10 },
- { 0x25, 0x3c, 0x11 },
- { 0xd, 0x4, 0x2e },
- { 0x5, 0x19, 0x3e },
- { 0xc, 0x13, 0x34 },
- { 0x2b, 0x6, 0x24 },
- { 0x4, 0x3, 0xd },
- { 0x2f, 0x3c, 0xc },
- { 0x2a, 0x37, 0x1f },
- { 0xf, 0x12, 0x38 },
- { 0x38, 0xe, 0x2a },
- { 0x12, 0x2f, 0x19 },
- { 0x29, 0x2e, 0x31 },
- { 0x25, 0x13, 0x3e },
- { 0x33, 0x3e, 0x33 },
- { 0x1d, 0x2c, 0x25 },
- { 0x15, 0x15, 0x5 },
- { 0x32, 0x25, 0x39 },
- { 0x1a, 0x7, 0x1f },
- { 0x13, 0xe, 0x1d },
- { 0x36, 0x17, 0x34 },
- { 0xf, 0x15, 0x23 },
- { 0x2, 0x35, 0xd },
- { 0x15, 0x3f, 0xc },
- { 0x14, 0x2f, 0xf },
- { 0x19, 0x21, 0x3e },
- { 0x27, 0x11, 0x2f },
- { 0x38, 0x3f, 0x3c },
- { 0x36, 0x2d, 0x15 },
- { 0x16, 0x17, 0x2 },
- { 0x1, 0xa, 0x3d },
- { 0x1b, 0x11, 0x3f },
- { 0x21, 0x3c, 0xd },
- { 0x1a, 0x39, 0x3d },
- { 0x8, 0xe, 0xe },
- { 0x22, 0x21, 0x23 },
- { 0x1e, 0x30, 0x5 },
- { 0x1f, 0x22, 0x3d },
- { 0x1e, 0x2f, 0xa },
- { 0x0, 0x1c, 0xe },
- { 0x0, 0x1c, 0x15 },
- { 0x0, 0x1c, 0x1c },
- { 0x0, 0x15, 0x1c },
- { 0x0, 0xe, 0x1c },
- { 0x0, 0x7, 0x1c },
- { 0xe, 0xe, 0x1c },
- { 0x11, 0xe, 0x1c },
- { 0x15, 0xe, 0x1c },
- { 0x18, 0xe, 0x1c },
- { 0x1c, 0xe, 0x1c },
- { 0x1c, 0xe, 0x18 },
- { 0x1c, 0xe, 0x15 },
- { 0x1c, 0xe, 0x11 },
- { 0x1c, 0xe, 0xe },
- { 0x1c, 0x11, 0xe },
- { 0x1c, 0x15, 0xe },
- { 0x1c, 0x18, 0xe },
- { 0x1c, 0x1c, 0xe },
- { 0x18, 0x1c, 0xe },
- { 0x15, 0x1c, 0xe },
- { 0x11, 0x1c, 0xe },
- { 0xe, 0x1c, 0xe },
- { 0xe, 0x1c, 0x11 },
- { 0xe, 0x1c, 0x15 },
- { 0xe, 0x1c, 0x18 },
- { 0xe, 0x1c, 0x1c },
- { 0xe, 0x18, 0x1c },
- { 0xe, 0x15, 0x1c },
- { 0xe, 0x11, 0x1c },
- { 0x14, 0x14, 0x1c },
- { 0x16, 0x14, 0x1c },
- { 0x18, 0x14, 0x1c },
- { 0x1a, 0x14, 0x1c },
- { 0x1c, 0x14, 0x1c },
- { 0x1c, 0x14, 0x1a },
- { 0x1c, 0x14, 0x18 },
- { 0x1c, 0x14, 0x16 },
- { 0x1c, 0x14, 0x14 },
- { 0x1c, 0x16, 0x14 },
- { 0x1c, 0x18, 0x14 },
- { 0x1c, 0x1a, 0x14 },
- { 0x1c, 0x1c, 0x14 },
- { 0x1a, 0x1c, 0x14 },
- { 0x18, 0x1c, 0x14 },
- { 0x16, 0x1c, 0x14 },
- { 0x14, 0x1c, 0x14 },
- { 0x14, 0x1c, 0x16 },
- { 0x14, 0x1c, 0x18 },
- { 0x14, 0x1c, 0x1a },
- { 0x14, 0x1c, 0x1c },
- { 0x14, 0x1a, 0x1c },
- { 0x14, 0x18, 0x1c },
- { 0x14, 0x16, 0x1c },
- { 0x0, 0x0, 0x10 },
- { 0x4, 0x0, 0x10 },
- { 0x8, 0x0, 0x10 },
- { 0xc, 0x0, 0x10 },
- { 0x10, 0x0, 0x10 },
- { 0x10, 0x0, 0xc },
- { 0x10, 0x0, 0x8 },
- { 0x10, 0x0, 0x4 },
- { 0x10, 0x0, 0x0 },
- { 0x10, 0x4, 0x0 },
- { 0x10, 0x8, 0x0 },
- { 0x10, 0xc, 0x0 },
- { 0x10, 0x10, 0x0 },
- { 0xc, 0x10, 0x0 },
- { 0x8, 0x10, 0x0 },
- { 0x4, 0x10, 0x0 },
- { 0x0, 0x10, 0x0 },
- { 0x0, 0x10, 0x4 },
- { 0x0, 0x10, 0x8 },
- { 0x0, 0x10, 0xc },
- { 0x0, 0x10, 0x10 },
- { 0x0, 0xc, 0x10 },
- { 0x0, 0x8, 0x10 },
- { 0x0, 0x4, 0x10 },
- { 0x8, 0x8, 0x10 },
- { 0xa, 0x8, 0x10 },
- { 0xc, 0x8, 0x10 },
- { 0xe, 0x8, 0x10 },
- { 0x10, 0x8, 0x10 },
- { 0x10, 0x8, 0xe },
- { 0x10, 0x8, 0xc },
- { 0x10, 0x8, 0xa },
- { 0x10, 0x8, 0x8 },
- { 0x10, 0xa, 0x8 },
- { 0x10, 0xc, 0x8 },
- { 0x10, 0xe, 0x8 },
- { 0x10, 0x10, 0x8 },
- { 0xe, 0x10, 0x8 },
- { 0xc, 0x10, 0x8 },
- { 0xa, 0x10, 0x8 },
- { 0x8, 0x10, 0x8 },
- { 0x8, 0x10, 0xa },
- { 0x8, 0x10, 0xc },
- { 0x8, 0x10, 0xe },
- { 0x8, 0x10, 0x10 },
- { 0x8, 0xe, 0x10 },
- { 0x8, 0xc, 0x10 },
- { 0x8, 0xa, 0x10 },
- { 0xb, 0xb, 0x10 },
- { 0xc, 0xb, 0x10 },
- { 0xd, 0xb, 0x10 },
- { 0xf, 0xb, 0x10 },
- { 0x10, 0xb, 0x10 },
- { 0x10, 0xb, 0xf },
- { 0x10, 0xb, 0xd },
- { 0x10, 0xb, 0xc },
- { 0x10, 0xb, 0xb },
- { 0x10, 0xc, 0xb },
- { 0x10, 0xd, 0xb },
- { 0x10, 0xf, 0xb },
- { 0x10, 0x10, 0xb },
- { 0xf, 0x10, 0xb },
- { 0xd, 0x10, 0xb },
- { 0xc, 0x10, 0xb },
- { 0xb, 0x10, 0xb },
- { 0xb, 0x10, 0xc },
- { 0xb, 0x10, 0xd },
- { 0xb, 0x10, 0xf },
- { 0xb, 0x10, 0x10 },
- { 0xb, 0xf, 0x10 },
- { 0xb, 0xd, 0x10 },
- { 0xb, 0xc, 0x10 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 },
- { 0x0, 0x0, 0x0 }
-};
-
-unsigned char AC[21] = {
- 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
- 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
- 0x0C, 0x00, 0x0F, 0x08, 0x00};
-
-static int scanPCI(int start_slt);
-static int PCIVendor(int);
-#ifdef DEBUG
-static void printslots(void);
-#endif
-extern void puthex(unsigned long);
-extern void puts(const char *);
-static void unlockS3(void);
-
-static inline void
-outw(int port, unsigned short val)
-{
- outb(port, val >> 8);
- outb(port+1, val);
-}
-
-int
-vga_init(unsigned char *ISA_mem)
-{
- int slot;
- struct VgaRegs *VgaTextRegs;
-
- /* See if VGA already in TEXT mode - exit if so! */
- outb(0x3CE, 0x06);
- if ((inb(0x3CF) & 0x01) == 0){
- puts("VGA already in text mode\n");
- return 0;
- }
-
- /* If no VGA responding in text mode, then we have some work to do...
- */
- slot = -1;
- while((slot = scanPCI(slot)) > -1) { /* find video card in use */
- unlockVideo(slot); /* enable I/O to card */
- VgaTextRegs = GenVgaTextRegs;
-
- switch (PCIVendor(slot)) {
- default:
- break;
- case(S3Vendor):
- unlockS3();
- break;
-
- case(CirrusVendor):
- outw(0x3C4, 0x0612); /* unlock ext regs */
- outw(0x3C4, 0x0700); /* reset ext sequence mode */
- break;
-
- case(ParadiseVendor): /* IBM Portable 850 */
- outw(0x3ce, 0x0f05); /* unlock pardise registers */
- outw(0x3c4, 0x0648);
- outw(0x3d4, 0x2985);
- outw(0x3d4, 0x34a6);
- outb(0x3ce, 0x0b); /* disable linear addressing */
- outb(0x3cf, inb(0x3cf) & ~0x30);
- outw(0x3c4, 0x1400);
- outb(0x3ce, 0x0e); /* disable 256 color mode */
- outb(0x3cf, inb(0x3cf) & ~0x01);
- outb(0xd00, 0xff); /* enable auto-centering */
- if (!(inb(0xd01) & 0x03)) {
- outb(0x3d4, 0x33);
- outb(0x3d5, inb(0x3d5) & ~0x90);
- outb(0x3d4, 0x32);
- outb(0x3d5, inb(0x3d5) | 0x04);
- outw(0x3d4, 0x0250);
- outw(0x3d4, 0x07ba);
- outw(0x3d4, 0x0900);
- outw(0x3d4, 0x15e7);
- outw(0x3d4, 0x2a95);
- }
- outw(0x3d4, 0x34a0);
- break;
-
- #if 0 /* Untested - probably doesn't work */
- case(MatroxVendor):
- case(DiamondVendor):
- puts("VGA Chip Vendor ID: ");
- puthex(PCIVendor(slot));
- puts("\n");
- mdelay(1000);
- #endif
- };
-
- outw(0x3C4, 0x0120); /* disable video */
- setTextRegs(VgaTextRegs); /* initial register setup */
- setTextCLUT(0); /* load color lookup table */
- loadFont(ISA_mem); /* load font */
- setTextRegs(VgaTextRegs); /* reload registers */
- outw(0x3C4, 0x0100); /* re-enable video */
- clearVideoMemory();
-
- if (PCIVendor(slot) == S3Vendor) {
- outb(0x3c2, 0x63); /* MISC */
- } /* endif */
-
- #ifdef DEBUG
- printslots();
- mdelay(5000);
- #endif
-
- mdelay(1000); /* give time for the video monitor to come up */
- }
- return (1); /* 'CRT' I/O supported */
-}
-
-/*
- * Write to VGA Attribute registers.
- */
-void
-writeAttr(unsigned char index, unsigned char data, unsigned char videoOn)
-{
- unsigned char v;
- v = inb(0x3da); /* reset attr. address toggle */
- if (videoOn)
- outb(0x3c0, (index & 0x1F) | 0x20);
- else
- outb(0x3c0, (index & 0x1F));
- outb(0x3c0, data);
-}
-
-void
-setTextRegs(struct VgaRegs *svp)
-{
- int i;
-
- /*
- * saved settings
- */
- while( svp->io_port != ENDMK ) {
- outb(svp->io_port, svp->io_index);
- outb(svp->io_port+1, svp->io_value);
- svp++;
- }
-
- outb(0x3c2, 0x67); /* MISC */
- outb(0x3c6, 0xff); /* MASK */
-
- for ( i = 0; i < 0x10; i++)
- writeAttr(i, AC[i], 0); /* palette */
- writeAttr(0x10, 0x0c, 0); /* text mode */
- writeAttr(0x11, 0x00, 0); /* overscan color (border) */
- writeAttr(0x12, 0x0f, 0); /* plane enable */
- writeAttr(0x13, 0x08, 0); /* pixel panning */
- writeAttr(0x14, 0x00, 1); /* color select; video on */
-}
-
-void
-setTextCLUT(int shift)
-{
- int i;
-
- outb(0x3C6, 0xFF);
- i = inb(0x3C7);
- outb(0x3C8, 0);
- i = inb(0x3C7);
-
- for ( i = 0; i < 256; i++) {
- outb(0x3C9, TextCLUT[i].r << shift);
- outb(0x3C9, TextCLUT[i].g << shift);
- outb(0x3C9, TextCLUT[i].b << shift);
- }
-}
-
-void
-loadFont(unsigned char *ISA_mem)
-{
- int i, j;
- unsigned char *font_page = (unsigned char *) &ISA_mem[0xA0000];
-
- outb(0x3C2, 0x67);
- /*
- * Load font
- */
- i = inb(0x3DA); /* Reset Attr toggle */
-
- outb(0x3C0,0x30);
- outb(0x3C0, 0x01); /* graphics mode */
-
- outw(0x3C4, 0x0001); /* reset sequencer */
- outw(0x3C4, 0x0204); /* write to plane 2 */
- outw(0x3C4, 0x0406); /* enable plane graphics */
- outw(0x3C4, 0x0003); /* reset sequencer */
- outw(0x3CE, 0x0402); /* read plane 2 */
- outw(0x3CE, 0x0500); /* write mode 0, read mode 0 */
- outw(0x3CE, 0x0605); /* set graphics mode */
-
- for (i = 0; i < sizeof(font); i += 16) {
- for (j = 0; j < 16; j++) {
- __asm__ volatile("eieio");
- font_page[(2*i)+j] = font[i+j];
- }
- }
-}
-
-static void
-unlockS3(void)
-{
- int s3_device_id;
- outw(0x3d4, 0x3848);
- outw(0x3d4, 0x39a5);
- outb(0x3d4, 0x2d);
- s3_device_id = inb(0x3d5) << 8;
- outb(0x3d4, 0x2e);
- s3_device_id |= inb(0x3d5);
-
- if (s3_device_id != 0x8812) {
- /* From the S3 manual */
- outb(0x46E8, 0x10); /* Put into setup mode */
- outb(0x3C3, 0x10);
- outb(0x102, 0x01); /* Enable registers */
- outb(0x46E8, 0x08); /* Enable video */
- outb(0x3C3, 0x08);
- outb(0x4AE8, 0x00);
-
-#if 0
- outb(0x42E8, 0x80); /* Reset graphics engine? */
-#endif
-
- outb(0x3D4, 0x38); /* Unlock all registers */
- outb(0x3D5, 0x48);
- outb(0x3D4, 0x39);
- outb(0x3D5, 0xA5);
- outb(0x3D4, 0x40);
- outb(0x3D5, inb(0x3D5)|0x01);
- outb(0x3D4, 0x33);
- outb(0x3D5, inb(0x3D5)&~0x52);
- outb(0x3D4, 0x35);
- outb(0x3D5, inb(0x3D5)&~0x30);
- outb(0x3D4, 0x3A);
- outb(0x3D5, 0x00);
- outb(0x3D4, 0x53);
- outb(0x3D5, 0x00);
- outb(0x3D4, 0x31);
- outb(0x3D5, inb(0x3D5)&~0x4B);
- outb(0x3D4, 0x58);
-
- outb(0x3D5, 0);
-
- outb(0x3D4, 0x54);
- outb(0x3D5, 0x38);
- outb(0x3D4, 0x60);
- outb(0x3D5, 0x07);
- outb(0x3D4, 0x61);
- outb(0x3D5, 0x80);
- outb(0x3D4, 0x62);
- outb(0x3D5, 0xA1);
- outb(0x3D4, 0x69); /* High order bits for cursor address */
- outb(0x3D5, 0);
-
- outb(0x3D4, 0x32);
- outb(0x3D5, inb(0x3D5)&~0x10);
- } else {
- outw(0x3c4, 0x0806); /* IBM Portable 860 */
- outw(0x3c4, 0x1041);
- outw(0x3c4, 0x1128);
- outw(0x3d4, 0x4000);
- outw(0x3d4, 0x3100);
- outw(0x3d4, 0x3a05);
- outw(0x3d4, 0x6688);
- outw(0x3d4, 0x5800); /* disable linear addressing */
- outw(0x3d4, 0x4500); /* disable H/W cursor */
- outw(0x3c4, 0x5410); /* enable auto-centering */
- outw(0x3c4, 0x561f);
- outw(0x3c4, 0x1b80); /* lock DCLK selection */
- outw(0x3d4, 0x3900); /* lock S3 registers */
- outw(0x3d4, 0x3800);
- } /* endif */
-}
-
-/*
- * cursor() sets an offset (0-1999) into the 80x25 text area.
- */
-void
-cursor(int x, int y)
-{
- int pos = (y*cols)+x;
- outb(0x3D4, 14);
- outb(0x3D5, pos >> 8);
- outb(0x3D4, 15);
- outb(0x3D5, pos);
-}
-
-void
-clearVideoMemory(void)
-{
- int i, j;
- for (i = 0; i < lines; i++) {
- for (j = 0; j < cols; j++) {
- vidmem[((i*cols)+j)*2] = 0x20; /* fill with space character */
- vidmem[((i*cols)+j)*2+1] = 0x07; /* set bg & fg attributes */
- }
- }
-}
-
-/* ============ */
-
-
-#define NSLOTS 8
-#define NPCIREGS 5
-
-
-/*
- should use devfunc number/indirect method to be totally safe on
- all machines, this works for now on 3 slot Moto boxes
-*/
-
-struct PCI_ConfigInfo {
- unsigned long * config_addr;
- unsigned long regs[NPCIREGS];
-} PCI_slots [NSLOTS] = {
-
- { (unsigned long *)0x80808000, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80800800, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80801000, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80802000, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80804000, {0xDEADBEEF,} }, /* onboard */
- { (unsigned long *)0x80810000, {0xDEADBEEF,} }, /* slot A/1 */
- { (unsigned long *)0x80820000, {0xDEADBEEF,} }, /* slot B/2 */
- { (unsigned long *)0x80840000, {0xDEADBEEF,} } /* slot C/3 */
-};
-
-
-
-/*
- * The following code modifies the PCI Command register
- * to enable memory and I/O accesses.
- */
-void
-unlockVideo(int slot)
-{
- volatile unsigned char * ppci;
-
- ppci = (unsigned char * )PCI_slots[slot].config_addr;
- ppci[4] = 0x0003; /* enable memory and I/O accesses */
- ppci[0x10] = 0x00000; /* turn off memory mapping */
- ppci[0x11] = 0x00000; /* mem_base = 0 */
- ppci[0x12] = 0x00000;
- ppci[0x13] = 0x00000;
- __asm__ volatile("eieio");
-
- outb(0x3d4, 0x11);
- outb(0x3d5, 0x0e); /* unlock CR0-CR7 */
-}
-
-long
-SwapBytes(long lv) /* turn little endian into big indian long */
-{
- long t;
- t = (lv&0x000000FF) << 24;
- t |= (lv&0x0000FF00) << 8;
- t |= (lv&0x00FF0000) >> 8;
- t |= (lv&0xFF000000) >> 24;
- return(t);
-}
-
-
-#define DEVID 0
-#define CMD 1
-#define CLASS 2
-#define MEMBASE 4
-
-int
-scanPCI(int start_slt)
-{
- int slt, r;
- struct PCI_ConfigInfo *pslot;
- int theSlot = -1;
- int highVgaSlot = 0;
-
- for ( slt = start_slt + 1; slt < NSLOTS; slt++) {
- pslot = &PCI_slots[slt];
- for ( r = 0; r < NPCIREGS; r++) {
- pslot->regs[r] = SwapBytes ( pslot->config_addr[r] );
- }
- /* card in slot ? */
- if ( pslot->regs[DEVID] != 0xFFFFFFFF ) {
- /* VGA ? */
- if ( ((pslot->regs[CLASS] & 0xFFFFFF00) == 0x03000000) ||
- ((pslot->regs[CLASS] & 0xFFFFFF00) == 0x00010000)) {
- highVgaSlot = slt;
- /* did firmware enable it ? */
- if ( (pslot->regs[CMD] & 0x03) ) {
- theSlot = slt;
- break;
- }
- }
- }
- }
-
- return ( theSlot );
-}
-
-/* return Vendor ID of card in the slot */
-static
-int PCIVendor(int slotnum) {
- struct PCI_ConfigInfo *pslot;
-
- pslot = &PCI_slots[slotnum];
-
-return (pslot->regs[DEVID] & 0xFFFF);
-}
-
-#ifdef DEBUG
-static
-void printslots(void)
-{
- int i;
-#if 0
- struct PCI_ConfigInfo *pslot;
-#endif
- for(i=0; i < NSLOTS; i++) {
-#if 0
- pslot = &PCI_slots[i];
- printf("Slot: %d, Addr: %x, Vendor: %08x, Class: %08x\n",
- i, pslot->config_addr, pslot->regs[0], pslot->regs[2]);
-#else
- puts("PCI Slot number: "); puthex(i);
- puts(" Vendor ID: ");
- puthex(PCIVendor(i)); puts("\n");
-#endif
- }
-}
-#endif /* DEBUG */
diff --git a/arch/ppc/boot/of1275/Makefile b/arch/ppc/boot/of1275/Makefile
deleted file mode 100644
index 0b979c0..0000000
--- a/arch/ppc/boot/of1275/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-#
-# Makefile of1275 stuff
-#
-
-lib-y := claim.o enter.o exit.o finddevice.o getprop.o ofinit.o \
- ofstdio.o read.o release.o write.o map.o call_prom.o
diff --git a/arch/ppc/boot/of1275/call_prom.c b/arch/ppc/boot/of1275/call_prom.c
deleted file mode 100644
index 9479a3a..0000000
--- a/arch/ppc/boot/of1275/call_prom.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 1996-2005 Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-#include <stdarg.h>
-
-int call_prom(const char *service, int nargs, int nret, ...)
-{
- int i;
- struct prom_args {
- const char *service;
- int nargs;
- int nret;
- unsigned int args[12];
- } args;
- va_list list;
-
- args.service = service;
- args.nargs = nargs;
- args.nret = nret;
-
- va_start(list, nret);
- for (i = 0; i < nargs; i++)
- args.args[i] = va_arg(list, unsigned int);
- va_end(list);
-
- for (i = 0; i < nret; i++)
- args.args[nargs+i] = 0;
-
- if (of_prom_entry(&args) < 0)
- return -1;
-
- return (nret > 0)? args.args[nargs]: 0;
-}
-
-int call_prom_ret(const char *service, int nargs, int nret,
- unsigned int *rets, ...)
-{
- int i;
- struct prom_args {
- const char *service;
- int nargs;
- int nret;
- unsigned int args[12];
- } args;
- va_list list;
-
- args.service = service;
- args.nargs = nargs;
- args.nret = nret;
-
- va_start(list, rets);
- for (i = 0; i < nargs; i++)
- args.args[i] = va_arg(list, unsigned int);
- va_end(list);
-
- for (i = 0; i < nret; i++)
- args.args[nargs+i] = 0;
-
- if (of_prom_entry(&args) < 0)
- return -1;
-
- if (rets != (void *) 0)
- for (i = 1; i < nret; ++i)
- rets[i-1] = args.args[nargs+i];
-
- return (nret > 0)? args.args[nargs]: 0;
-}
diff --git a/arch/ppc/boot/of1275/claim.c b/arch/ppc/boot/of1275/claim.c
deleted file mode 100644
index 1ed3aee..0000000
--- a/arch/ppc/boot/of1275/claim.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-#include "nonstdio.h"
-
-/*
- * Older OF's require that when claiming a specific range of addresses,
- * we claim the physical space in the /memory node and the virtual
- * space in the chosen mmu node, and then do a map operation to
- * map virtual to physical.
- */
-static int need_map = -1;
-static ihandle chosen_mmu;
-static phandle memory;
-
-/* returns true if s2 is a prefix of s1 */
-static int string_match(const char *s1, const char *s2)
-{
- for (; *s2; ++s2)
- if (*s1++ != *s2)
- return 0;
- return 1;
-}
-
-static int check_of_version(void)
-{
- phandle oprom, chosen;
- char version[64];
-
- oprom = finddevice("/openprom");
- if (oprom == OF_INVALID_HANDLE)
- return 0;
- if (getprop(oprom, "model", version, sizeof(version)) <= 0)
- return 0;
- version[sizeof(version)-1] = 0;
- printf("OF version = '%s'\n", version);
- if (!string_match(version, "Open Firmware, 1.")
- && !string_match(version, "FirmWorks,3."))
- return 0;
- chosen = finddevice("/chosen");
- if (chosen == OF_INVALID_HANDLE) {
- chosen = finddevice("/chosen@0");
- if (chosen == OF_INVALID_HANDLE) {
- printf("no chosen\n");
- return 0;
- }
- }
- if (getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) {
- printf("no mmu\n");
- return 0;
- }
- memory = (ihandle) call_prom("open", 1, 1, "/memory");
- if (memory == OF_INVALID_HANDLE) {
- memory = (ihandle) call_prom("open", 1, 1, "/memory@0");
- if (memory == OF_INVALID_HANDLE) {
- printf("no memory node\n");
- return 0;
- }
- }
- printf("old OF detected\n");
- return 1;
-}
-
-void *claim(unsigned int virt, unsigned int size, unsigned int align)
-{
- int ret;
- unsigned int result;
-
- if (need_map < 0)
- need_map = check_of_version();
- if (align || !need_map)
- return (void *) call_prom("claim", 3, 1, virt, size, align);
-
- ret = call_prom_ret("call-method", 5, 2, &result, "claim", memory,
- align, size, virt);
- if (ret != 0 || result == -1)
- return (void *) -1;
- ret = call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu,
- align, size, virt);
- /* 0x12 == coherent + read/write */
- ret = call_prom("call-method", 6, 1, "map", chosen_mmu,
- 0x12, size, virt, virt);
- return virt;
-}
diff --git a/arch/ppc/boot/of1275/enter.c b/arch/ppc/boot/of1275/enter.c
deleted file mode 100644
index abe87a8..0000000
--- a/arch/ppc/boot/of1275/enter.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-void
-enter(void)
-{
- struct prom_args {
- char *service;
- } args;
-
- args.service = "enter";
- (*of_prom_entry)(&args);
-}
diff --git a/arch/ppc/boot/of1275/exit.c b/arch/ppc/boot/of1275/exit.c
deleted file mode 100644
index b9f89b6..0000000
--- a/arch/ppc/boot/of1275/exit.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-void
-exit(void)
-{
- struct prom_args {
- char *service;
- } args;
-
- for (;;) {
- args.service = "exit";
- (*of_prom_entry)(&args);
- }
-}
diff --git a/arch/ppc/boot/of1275/finddevice.c b/arch/ppc/boot/of1275/finddevice.c
deleted file mode 100644
index 0dcb120..0000000
--- a/arch/ppc/boot/of1275/finddevice.c
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-phandle finddevice(const char *name)
-{
- return (phandle) call_prom("finddevice", 1, 1, name);
-}
diff --git a/arch/ppc/boot/of1275/getprop.c b/arch/ppc/boot/of1275/getprop.c
deleted file mode 100644
index 0cf75f0..0000000
--- a/arch/ppc/boot/of1275/getprop.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-int
-getprop(phandle node, const char *name, void *buf, int buflen)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- phandle node;
- const char *name;
- void *buf;
- int buflen;
- int size;
- } args;
-
- args.service = "getprop";
- args.nargs = 4;
- args.nret = 1;
- args.node = node;
- args.name = name;
- args.buf = buf;
- args.buflen = buflen;
- args.size = -1;
- (*of_prom_entry)(&args);
- return args.size;
-}
diff --git a/arch/ppc/boot/of1275/map.c b/arch/ppc/boot/of1275/map.c
deleted file mode 100644
index 443256c..0000000
--- a/arch/ppc/boot/of1275/map.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-#include "nonstdio.h"
-
-extern ihandle of_prom_mmu;
-
-int
-map(unsigned int phys, unsigned int virt, unsigned int size)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- char *method;
- ihandle mmu_ihandle;
- int misc;
- unsigned int size;
- unsigned int virt;
- unsigned int phys;
- int ret0;
- } args;
-
- if (of_prom_mmu == 0) {
- printf("map() called, no MMU found\n");
- return -1;
- }
- args.service = "call-method";
- args.nargs = 6;
- args.nret = 1;
- args.method = "map";
- args.mmu_ihandle = of_prom_mmu;
- args.misc = 0;
- args.phys = phys;
- args.virt = virt;
- args.size = size;
- (*of_prom_entry)(&args);
-
- return (int)args.ret0;
-}
diff --git a/arch/ppc/boot/of1275/ofinit.c b/arch/ppc/boot/of1275/ofinit.c
deleted file mode 100644
index 0ee8af7..0000000
--- a/arch/ppc/boot/of1275/ofinit.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-prom_entry of_prom_entry;
-ihandle of_prom_mmu;
-
-void
-ofinit(prom_entry prom_ptr)
-{
- phandle chosen;
-
- of_prom_entry = prom_ptr;
-
- if ((chosen = finddevice("/chosen")) == OF_INVALID_HANDLE)
- return;
- if (getprop(chosen, "mmu", &of_prom_mmu, sizeof(ihandle)) != 4)
- return;
-}
diff --git a/arch/ppc/boot/of1275/ofstdio.c b/arch/ppc/boot/of1275/ofstdio.c
deleted file mode 100644
index 10abbe3..0000000
--- a/arch/ppc/boot/of1275/ofstdio.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-int
-ofstdio(ihandle *stdin, ihandle *stdout, ihandle *stderr)
-{
- ihandle in, out;
- phandle chosen;
-
- if ((chosen = finddevice("/chosen")) == OF_INVALID_HANDLE)
- goto err;
- if (getprop(chosen, "stdout", &out, sizeof(out)) != 4)
- goto err;
- if (getprop(chosen, "stdin", &in, sizeof(in)) != 4)
- goto err;
-
- *stdin = in;
- *stdout = out;
- *stderr = out;
- return 0;
-err:
- return -1;
-}
diff --git a/arch/ppc/boot/of1275/read.c b/arch/ppc/boot/of1275/read.c
deleted file mode 100644
index 1228136..0000000
--- a/arch/ppc/boot/of1275/read.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-int
-read(ihandle instance, void *buf, int buflen)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- ihandle instance;
- void *buf;
- int buflen;
- int actual;
- } args;
-
- args.service = "read";
- args.nargs = 3;
- args.nret = 1;
- args.instance = instance;
- args.buf = buf;
- args.buflen = buflen;
- args.actual = -1;
- (*of_prom_entry)(&args);
- return args.actual;
-}
diff --git a/arch/ppc/boot/of1275/release.c b/arch/ppc/boot/of1275/release.c
deleted file mode 100644
index 28032d3..0000000
--- a/arch/ppc/boot/of1275/release.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-void
-release(void *virt, unsigned int size)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- void *virt;
- unsigned int size;
- } args;
-
- args.service = "release";
- args.nargs = 2;
- args.nret = 0;
- args.virt = virt;
- args.size = size;
- (*of_prom_entry)(&args);
-}
diff --git a/arch/ppc/boot/of1275/write.c b/arch/ppc/boot/of1275/write.c
deleted file mode 100644
index 7361b9b..0000000
--- a/arch/ppc/boot/of1275/write.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Copyright (C) Paul Mackerras 1997.
- * Copyright (C) Leigh Brown 2002.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include "of1275.h"
-
-int
-write(ihandle instance, void *buf, int buflen)
-{
- struct prom_args {
- char *service;
- int nargs;
- int nret;
- ihandle instance;
- void *buf;
- int buflen;
- int actual;
- } args;
-
- args.service = "write";
- args.nargs = 3;
- args.nret = 1;
- args.instance = instance;
- args.buf = buf;
- args.buflen = buflen;
- args.actual = -1;
- (*of_prom_entry)(&args);
- return args.actual;
-}
diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile
deleted file mode 100644
index 5b87779..0000000
--- a/arch/ppc/boot/simple/Makefile
+++ /dev/null
@@ -1,277 +0,0 @@
-# This is far from simple, but I couldn't think of a good name. This is
-# for making the 'zImage' or 'zImage.initrd' on a number of targets.
-#
-# Author: Tom Rini <trini@mvista.com>
-#
-# Notes:
-# (1) For machines that do not want to use the ELF image directly (including
-# stripping just the ELF header off), they must set the variables
-# zimage-$(CONFIG_MACHINE) and zimagerd-$(CONFIG_MACHINE) to the target
-# that produces the desired image and they must set end-$(CONFIG_MACHINE)
-# to what will be suffixed to the image filename.
-# (2) Regardless of (1), to have the resulting image be something other
-# than 'zImage.elf', set end-$(CONFIG_MACHINE) to be the suffix used for
-# the zImage, znetboot, and znetbootrd targets.
-# (3) For machine targets which use the mktree program, you can optionally
-# set entrypoint-$(CONFIG_MACHINE) to the location which the image should be
-# loaded at. The optimal setting for entrypoint-$(CONFIG_MACHINE) is the link
-# address.
-# (4) It is advisable to pass in the memory size using BI_MEMSIZE and
-# get_mem_size(), which is memory controller dependent. Add in the correct
-# XXX_memory.o file for this to work, as well as editing the
-# misc-$(CONFIG_MACHINE) variable.
-
-boot := arch/ppc/boot
-common := $(boot)/common
-utils := $(boot)/utils
-bootlib := $(boot)/lib
-images := $(boot)/images
-of1275 := $(boot)/of1275
-tftpboot := /tftpboot
-
-# Normally, we use the 'misc.c' file for decompress_kernel and
-# whatnot. Sometimes we need to override this however.
-misc-y := misc.o
-
-# Normally, we have our images end in .elf, but something we want to
-# change this.
-end-y := elf
-
-# Additionally, we normally don't need to mess with the L2 / L3 caches
-# if present on 'classic' PPC.
-cacheflag-y := -DCLEAR_CACHES=""
-# This file will flush / disable the L2, and L3 if present.
-clear_L2_L3 := $(srctree)/$(boot)/simple/clear.S
-
-#
-# See arch/ppc/kconfig and arch/ppc/platforms/Kconfig
-# for definition of what platform each config option refer to.
-#----------------------------------------------------------------------------
- zimage-$(CONFIG_CPCI690) := zImage-STRIPELF
-zimageinitrd-$(CONFIG_CPCI690) := zImage.initrd-STRIPELF
- extra.o-$(CONFIG_CPCI690) := misc-cpci690.o
- end-$(CONFIG_CPCI690) := cpci690
- cacheflag-$(CONFIG_CPCI690) := -include $(clear_L2_L3)
-
- zimage-$(CONFIG_IBM_OPENBIOS) := zImage-TREE
-zimageinitrd-$(CONFIG_IBM_OPENBIOS) := zImage.initrd-TREE
- end-$(CONFIG_IBM_OPENBIOS) := treeboot
- misc-$(CONFIG_IBM_OPENBIOS) := misc-embedded.o
-
- end-$(CONFIG_EMBEDDEDBOOT) := embedded
- misc-$(CONFIG_EMBEDDEDBOOT) := misc-embedded.o
-
- zimage-$(CONFIG_BAMBOO) := zImage-TREE
-zimageinitrd-$(CONFIG_BAMBOO) := zImage.initrd-TREE
- end-$(CONFIG_BAMBOO) := bamboo
- entrypoint-$(CONFIG_BAMBOO) := 0x01000000
- extra.o-$(CONFIG_BAMBOO) := pibs.o
-
- zimage-$(CONFIG_BUBINGA) := zImage-TREE
-zimageinitrd-$(CONFIG_BUBINGA) := zImage.initrd-TREE
- end-$(CONFIG_BUBINGA) := bubinga
- entrypoint-$(CONFIG_BUBINGA) := 0x01000000
- extra.o-$(CONFIG_BUBINGA) := openbios.o
-
- zimage-$(CONFIG_EBONY) := zImage-TREE
-zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE
- end-$(CONFIG_EBONY) := ebony
- entrypoint-$(CONFIG_EBONY) := 0x01000000
- extra.o-$(CONFIG_EBONY) := openbios.o
-
- zimage-$(CONFIG_LUAN) := zImage-TREE
-zimageinitrd-$(CONFIG_LUAN) := zImage.initrd-TREE
- end-$(CONFIG_LUAN) := luan
- entrypoint-$(CONFIG_LUAN) := 0x01000000
- extra.o-$(CONFIG_LUAN) := pibs.o
-
- zimage-$(CONFIG_YUCCA) := zImage-TREE
-zimageinitrd-$(CONFIG_YUCCA) := zImage.initrd-TREE
- end-$(CONFIG_YUCCA) := yucca
- entrypoint-$(CONFIG_YUCCA) := 0x01000000
- extra.o-$(CONFIG_YUCCA) := pibs.o
-
- zimage-$(CONFIG_OCOTEA) := zImage-TREE
-zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE
- end-$(CONFIG_OCOTEA) := ocotea
- entrypoint-$(CONFIG_OCOTEA) := 0x01000000
- extra.o-$(CONFIG_OCOTEA) := pibs.o
-
- zimage-$(CONFIG_SYCAMORE) := zImage-TREE
-zimageinitrd-$(CONFIG_SYCAMORE) := zImage.initrd-TREE
- end-$(CONFIG_SYCAMORE) := sycamore
- entrypoint-$(CONFIG_SYCAMORE) := 0x01000000
- extra.o-$(CONFIG_SYCAMORE) := openbios.o
-
- zimage-$(CONFIG_WALNUT) := zImage-TREE
-zimageinitrd-$(CONFIG_WALNUT) := zImage.initrd-TREE
- end-$(CONFIG_WALNUT) := walnut
- entrypoint-$(CONFIG_WALNUT) := 0x01000000
- extra.o-$(CONFIG_WALNUT) := openbios.o
-
- extra.o-$(CONFIG_EV64260) := misc-ev64260.o
- end-$(CONFIG_EV64260) := ev64260
- cacheflag-$(CONFIG_EV64260) := -include $(clear_L2_L3)
-
- extra.o-$(CONFIG_CHESTNUT) := misc-chestnut.o
- end-$(CONFIG_CHESTNUT) := chestnut
-
- extra.o-$(CONFIG_KATANA) := misc-katana.o
- end-$(CONFIG_KATANA) := katana
- cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3)
-
- extra.o-$(CONFIG_RADSTONE_PPC7D) := misc-radstone_ppc7d.o
- end-$(CONFIG_RADSTONE_PPC7D) := radstone_ppc7d
- cacheflag-$(CONFIG_RADSTONE_PPC7D) := -include $(clear_L2_L3)
-
- extra.o-$(CONFIG_EV64360) := misc-ev64360.o
- end-$(CONFIG_EV64360) := ev64360
- cacheflag-$(CONFIG_EV64360) := -include $(clear_L2_L3)
-
-# kconfig 'feature', only one of these will ever be 'y' at a time.
-# The rest will be unset.
-motorola := $(CONFIG_MVME5100)$(CONFIG_PRPMC750) \
-$(CONFIG_PRPMC800)$(CONFIG_LOPEC)$(CONFIG_PPLUS)
-motorola := $(strip $(motorola))
-
- zimage-$(motorola) := zImage-PPLUS
-zimageinitrd-$(motorola) := zImage.initrd-PPLUS
- end-$(motorola) := pplus
-
-# Overrides previous assingment
- extra.o-$(CONFIG_PPLUS) := prepmap.o
- extra.o-$(CONFIG_LOPEC) := mpc10x_memory.o
-
-# Really only valid if CONFIG_6xx=y
- zimage-$(CONFIG_PPC_PREP) := zImage-PPLUS
-zimageinitrd-$(CONFIG_PPC_PREP) := zImage.initrd-PPLUS
-ifeq ($(CONFIG_6xx),y)
- extra.o-$(CONFIG_PPC_PREP) := prepmap.o
- misc-$(CONFIG_PPC_PREP) += misc-prep.o mpc10x_memory.o
-endif
- end-$(CONFIG_PPC_PREP) := prep
-
- end-$(CONFIG_SANDPOINT) := sandpoint
- cacheflag-$(CONFIG_SANDPOINT) := -include $(clear_L2_L3)
-
- zimage-$(CONFIG_SPRUCE) := zImage-TREE
-zimageinitrd-$(CONFIG_SPRUCE) := zImage.initrd-TREE
- end-$(CONFIG_SPRUCE) := spruce
- entrypoint-$(CONFIG_SPRUCE) := 0x00800000
- misc-$(CONFIG_SPRUCE) += misc-spruce.o
-
- zimage-$(CONFIG_LITE5200) := zImage-STRIPELF
-zimageinitrd-$(CONFIG_LITE5200) := zImage.initrd-STRIPELF
- end-$(CONFIG_LITE5200) := lite5200
- cacheflag-$(CONFIG_LITE5200) := -include $(clear_L2_L3)
-
-
-# SMP images should have a '.smp' suffix.
- end-$(CONFIG_SMP) := $(end-y).smp
-
-# This is a treeboot that needs init functions until the
-# boot rom is sorted out (i.e. this is short lived)
-EXTRA_AFLAGS := $(extra-aflags-y)
-# head.o needs to get the cacheflags defined.
-AFLAGS_head.o += $(cacheflag-y)
-
-# Linker args. This specifies where the image will be run at.
-LD_ARGS := -T $(srctree)/$(boot)/ld.script \
- -Ttext $(CONFIG_BOOT_LOAD) -Bstatic
-OBJCOPY_ARGS := -O elf32-powerpc
-
-# head.o and relocate.o must be at the start.
-boot-y := head.o relocate.o $(extra.o-y) $(misc-y)
-boot-$(CONFIG_REDWOOD_5) += embed_config.o
-boot-$(CONFIG_REDWOOD_6) += embed_config.o
-boot-$(CONFIG_8xx) += embed_config.o
-boot-$(CONFIG_8260) += embed_config.o
-boot-$(CONFIG_EP405) += embed_config.o
-boot-$(CONFIG_XILINX_ML300) += embed_config.o
-boot-$(CONFIG_XILINX_ML403) += embed_config.o
-boot-$(CONFIG_BSEIP) += iic.o
-boot-$(CONFIG_MBX) += iic.o pci.o qspan_pci.o
-boot-$(CONFIG_MV64X60) += misc-mv64x60.o
-boot-$(CONFIG_RPXCLASSIC) += iic.o pci.o qspan_pci.o
-boot-$(CONFIG_RPXLITE) += iic.o
-# Different boards need different serial implementations.
-ifeq ($(CONFIG_SERIAL_CPM_CONSOLE),y)
-boot-$(CONFIG_8xx) += m8xx_tty.o
-boot-$(CONFIG_8260) += m8260_tty.o
-endif
-boot-$(CONFIG_SERIAL_MPC52xx_CONSOLE) += mpc52xx_tty.o
-boot-$(CONFIG_SERIAL_MPSC_CONSOLE) += mv64x60_tty.o
-boot-$(CONFIG_SERIAL_UARTLITE_CONSOLE) += uartlite_tty.o
-
-LIBS := $(common)/lib.a $(bootlib)/lib.a
-ifeq ($(CONFIG_PPC_PREP),y)
-LIBS += $(of1275)/lib.a
-endif
-
-OBJS := $(addprefix $(obj)/,$(boot-y))
-
-# Tools
-MKBUGBOOT := $(utils)/mkbugboot
-MKPREP := $(utils)/mkprep
-MKTREE := $(utils)/mktree
-
-targets := dummy.o
-
-$(obj)/zvmlinux: $(OBJS) $(LIBS) $(srctree)/$(boot)/ld.script \
- $(images)/vmlinux.gz $(obj)/dummy.o
- $(OBJCOPY) $(OBJCOPY_ARGS) \
- --add-section=.image=$(images)/vmlinux.gz \
- --set-section-flags=.image=contents,alloc,load,readonly,data \
- $(obj)/dummy.o $(obj)/image.o
- $(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/image.o $(LIBS)
- $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab \
- -R .stabstr -R .ramdisk
-
-$(obj)/zvmlinux.initrd: $(OBJS) $(LIBS) $(srctree)/$(boot)/ld.script \
- $(images)/vmlinux.gz $(obj)/dummy.o
- $(OBJCOPY) $(OBJCOPY_ARGS) \
- --add-section=.ramdisk=$(images)/ramdisk.image.gz \
- --set-section-flags=.ramdisk=contents,alloc,load,readonly,data \
- --add-section=.image=$(images)/vmlinux.gz \
- --set-section-flags=.image=contents,alloc,load,readonly,data \
- $(obj)/dummy.o $(obj)/image.o
- $(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/image.o $(LIBS)
- $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab \
- -R .stabstr
-
-# Sort-of dummy rules, that let us format the image we want.
-zImage: $(images)/$(zimage-y) $(obj)/zvmlinux
- cp -f $(obj)/zvmlinux $(images)/zImage.elf
- rm -f $(obj)/zvmlinux
-
-zImage.initrd: $(images)/$(zimageinitrd-y) $(obj)/zvmlinux.initrd
- cp -f $(obj)/zvmlinux.initrd $(images)/zImage.initrd.elf
- rm -f $(obj)/zvmlinux.initrd
-
-znetboot: zImage
- cp $(images)/zImage.$(end-y) $(tftpboot)/zImage.$(end-y)
-
-znetboot.initrd: zImage.initrd
- cp $(images)/zImage.initrd.$(end-y) $(tftpboot)/zImage.initrd.$(end-y)
-
-$(images)/zImage-STRIPELF: $(obj)/zvmlinux
- dd if=$(obj)/zvmlinux of=$(images)/zImage.$(end-y) skip=64 bs=1k
-
-$(images)/zImage.initrd-STRIPELF: $(obj)/zvmlinux.initrd
- dd if=$(obj)/zvmlinux.initrd of=$(images)/zImage.initrd.$(end-y) \
- skip=64 bs=1k
-
-$(images)/zImage-TREE: $(obj)/zvmlinux $(MKTREE)
- $(MKTREE) $(obj)/zvmlinux $(images)/zImage.$(end-y) $(entrypoint-y)
-
-$(images)/zImage.initrd-TREE: $(obj)/zvmlinux.initrd $(MKTREE)
- $(MKTREE) $(obj)/zvmlinux.initrd $(images)/zImage.initrd.$(end-y) \
- $(entrypoint-y)
-
-$(images)/zImage-PPLUS: $(obj)/zvmlinux $(MKPREP) $(MKBUGBOOT)
- $(MKPREP) -pbp $(obj)/zvmlinux $(images)/zImage.$(end-y)
- $(MKBUGBOOT) $(obj)/zvmlinux $(images)/zImage.bugboot
-
-$(images)/zImage.initrd-PPLUS: $(obj)/zvmlinux.initrd $(MKPREP) $(MKBUGBOOT)
- $(MKPREP) -pbp $(obj)/zvmlinux.initrd $(images)/zImage.initrd.$(end-y)
- $(MKBUGBOOT) $(obj)/zvmlinux.initrd $(images)/zImage.initrd.bugboot
diff --git a/arch/ppc/boot/simple/chrpmap.c b/arch/ppc/boot/simple/chrpmap.c
deleted file mode 100644
index 14d9e05..0000000
--- a/arch/ppc/boot/simple/chrpmap.c
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * 2004 (C) IBM. This file is licensed under the terms of the GNU General
- * Public License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <nonstdio.h>
-
-void board_isa_init(void)
-{
- ISA_init(0xFE000000);
-}
diff --git a/arch/ppc/boot/simple/clear.S b/arch/ppc/boot/simple/clear.S
deleted file mode 100644
index 95c5647..0000000
--- a/arch/ppc/boot/simple/clear.S
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Code to call _setup_L2CR to flus, invalidate and disable the L2,
- * and if present, do the same to the L3.
- */
-
-#define CLEAR_CACHES \
- bl _setup_L2CR; \
- \
- /* If 745x, turn off L3CR as well */ \
- mfspr r8,SPRN_PVR; \
- srwi r8,r8,16; \
- \
- cmpli cr0,r8,0x8000; /* 7450 */ \
- cmpli cr1,r8,0x8001; /* 7455 */ \
- cmpli cr2,r8,0x8002; /* 7457 */ \
- /* Now test if any are true. */ \
- cror 4*cr0+eq,4*cr0+eq,4*cr1+eq; \
- cror 4*cr0+eq,4*cr0+eq,4*cr2+eq; \
- beql _setup_L3CR
diff --git a/arch/ppc/boot/simple/cpc700_memory.c b/arch/ppc/boot/simple/cpc700_memory.c
deleted file mode 100644
index d75420a..0000000
--- a/arch/ppc/boot/simple/cpc700_memory.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Find memory based upon settings in the CPC700 bridge
- *
- * Author: Dan Cox
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <asm/types.h>
-#include <asm/io.h>
-#include "cpc700.h"
-
-unsigned long
-cpc700_get_mem_size(void)
-{
- int i;
- unsigned long len, amt;
-
- /* Start at MB1EA, since MB0EA will most likely be the ending address
- for ROM space. */
- for(len = 0, i = CPC700_MB1EA; i <= CPC700_MB4EA; i+=4) {
- amt = cpc700_read_memreg(i);
- if (amt == 0)
- break;
- len = amt;
- }
-
- return len;
-}
-
-
diff --git a/arch/ppc/boot/simple/dummy.c b/arch/ppc/boot/simple/dummy.c
deleted file mode 100644
index 31dbf45..0000000
--- a/arch/ppc/boot/simple/dummy.c
+++ /dev/null
@@ -1,4 +0,0 @@
-int main(void)
-{
- return 0;
-}
diff --git a/arch/ppc/boot/simple/embed_config.c b/arch/ppc/boot/simple/embed_config.c
deleted file mode 100644
index 3b46792..0000000
--- a/arch/ppc/boot/simple/embed_config.c
+++ /dev/null
@@ -1,938 +0,0 @@
-/* Board specific functions for those embedded 8xx boards that do
- * not have boot monitor support for board information.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/string.h>
-#include <asm/reg.h>
-#ifdef CONFIG_8xx
-#include <asm/mpc8xx.h>
-#endif
-#ifdef CONFIG_8260
-#include <asm/mpc8260.h>
-#include <asm/immap_cpm2.h>
-#endif
-#ifdef CONFIG_40x
-#include <asm/io.h>
-#endif
-#ifdef CONFIG_XILINX_VIRTEX
-#include <platforms/4xx/xparameters/xparameters.h>
-#endif
-extern unsigned long timebase_period_ns;
-
-/* For those boards that don't provide one.
-*/
-#if !defined(CONFIG_MBX)
-static bd_t bdinfo;
-#endif
-
-/* IIC functions.
- * These are just the basic master read/write operations so we can
- * examine serial EEPROM.
- */
-extern void iic_read(uint devaddr, u_char *buf, uint offset, uint count);
-
-/* Supply a default Ethernet address for those eval boards that don't
- * ship with one. This is an address from the MBX board I have, so
- * it is unlikely you will find it on your network.
- */
-static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };
-
-#if defined(CONFIG_MBX)
-
-/* The MBX hands us a pretty much ready to go board descriptor. This
- * is where the idea started in the first place.
- */
-void
-embed_config(bd_t **bdp)
-{
- u_char *mp;
- u_char eebuf[128];
- int i = 8;
- bd_t *bd;
-
- bd = *bdp;
-
- /* Read the first 128 bytes of the EEPROM. There is more,
- * but this is all we need.
- */
- iic_read(0xa4, eebuf, 0, 128);
-
- /* All we are looking for is the Ethernet MAC address. The
- * first 8 bytes are 'MOTOROLA', so check for part of that.
- * Next, the VPD describes a MAC 'packet' as being of type 08
- * and size 06. So we look for that and the MAC must follow.
- * If there are more than one, we still only care about the first.
- * If it's there, assume we have a valid MAC address. If not,
- * grab our default one.
- */
- if ((*(uint *)eebuf) == 0x4d4f544f) {
- while (i < 127 && !(eebuf[i] == 0x08 && eebuf[i + 1] == 0x06))
- i += eebuf[i + 1] + 2; /* skip this packet */
-
- if (i == 127) /* Couldn't find. */
- mp = (u_char *)def_enet_addr;
- else
- mp = &eebuf[i + 2];
- }
- else
- mp = (u_char *)def_enet_addr;
-
- for (i=0; i<6; i++)
- bd->bi_enetaddr[i] = *mp++;
-
- /* The boot rom passes these to us in MHz. Linux now expects
- * them to be in Hz.
- */
- bd->bi_intfreq *= 1000000;
- bd->bi_busfreq *= 1000000;
-
- /* Stuff a baud rate here as well.
- */
- bd->bi_baudrate = 9600;
-}
-#endif /* CONFIG_MBX */
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || \
- defined(CONFIG_RPX8260) || defined(CONFIG_EP405)
-/* Helper functions for Embedded Planet boards.
-*/
-/* Because I didn't find anything that would do this.......
-*/
-u_char
-aschex_to_byte(u_char *cp)
-{
- u_char byte, c;
-
- c = *cp++;
-
- if ((c >= 'A') && (c <= 'F')) {
- c -= 'A';
- c += 10;
- } else if ((c >= 'a') && (c <= 'f')) {
- c -= 'a';
- c += 10;
- } else
- c -= '0';
-
- byte = c * 16;
-
- c = *cp;
-
- if ((c >= 'A') && (c <= 'F')) {
- c -= 'A';
- c += 10;
- } else if ((c >= 'a') && (c <= 'f')) {
- c -= 'a';
- c += 10;
- } else
- c -= '0';
-
- byte += c;
-
- return(byte);
-}
-
-static void
-rpx_eth(bd_t *bd, u_char *cp)
-{
- int i;
-
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = aschex_to_byte(cp);
- cp += 2;
- }
-}
-
-#ifdef CONFIG_RPX8260
-static uint
-rpx_baseten(u_char *cp)
-{
- uint retval;
-
- retval = 0;
-
- while (*cp != '\n') {
- retval *= 10;
- retval += (*cp) - '0';
- cp++;
- }
- return(retval);
-}
-#endif
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
-static void
-rpx_brate(bd_t *bd, u_char *cp)
-{
- uint rate;
-
- rate = 0;
-
- while (*cp != '\n') {
- rate *= 10;
- rate += (*cp) - '0';
- cp++;
- }
-
- bd->bi_baudrate = rate * 100;
-}
-
-static void
-rpx_cpuspeed(bd_t *bd, u_char *cp)
-{
- uint num, den;
-
- num = den = 0;
-
- while (*cp != '\n') {
- num *= 10;
- num += (*cp) - '0';
- cp++;
- if (*cp == '/') {
- cp++;
- den = (*cp) - '0';
- break;
- }
- }
-
- /* I don't know why the RPX just can't state the actual
- * CPU speed.....
- */
- if (den) {
- num /= den;
- num *= den;
- }
- bd->bi_intfreq = bd->bi_busfreq = num * 1000000;
-
- /* The 8xx can only run a maximum 50 MHz bus speed (until
- * Motorola changes this :-). Greater than 50 MHz parts
- * run internal/2 for bus speed.
- */
- if (num > 50)
- bd->bi_busfreq /= 2;
-}
-#endif
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_EP405)
-static void
-rpx_memsize(bd_t *bd, u_char *cp)
-{
- uint size;
-
- size = 0;
-
- while (*cp != '\n') {
- size *= 10;
- size += (*cp) - '0';
- cp++;
- }
-
- bd->bi_memsize = size * 1024 * 1024;
-}
-#endif /* LITE || CLASSIC || EP405 */
-#if defined(CONFIG_EP405)
-static void
-rpx_nvramsize(bd_t *bd, u_char *cp)
-{
- uint size;
-
- size = 0;
-
- while (*cp != '\n') {
- size *= 10;
- size += (*cp) - '0';
- cp++;
- }
-
- bd->bi_nvramsize = size * 1024;
-}
-#endif /* CONFIG_EP405 */
-
-#endif /* Embedded Planet boards */
-
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
-
-/* Read the EEPROM on the RPX-Lite board.
-*/
-void
-embed_config(bd_t **bdp)
-{
- u_char eebuf[256], *cp;
- bd_t *bd;
-
- /* Read the first 256 bytes of the EEPROM. I think this
- * is really all there is, and I hope if it gets bigger the
- * info we want is still up front.
- */
- bd = &bdinfo;
- *bdp = bd;
-
-#if 1
- iic_read(0xa8, eebuf, 0, 128);
- iic_read(0xa8, &eebuf[128], 128, 128);
-
- /* We look for two things, the Ethernet address and the
- * serial baud rate. The records are separated by
- * newlines.
- */
- cp = eebuf;
- for (;;) {
- if (*cp == 'E') {
- cp++;
- if (*cp == 'A') {
- cp += 2;
- rpx_eth(bd, cp);
- }
- }
- if (*cp == 'S') {
- cp++;
- if (*cp == 'B') {
- cp += 2;
- rpx_brate(bd, cp);
- }
- }
- if (*cp == 'D') {
- cp++;
- if (*cp == '1') {
- cp += 2;
- rpx_memsize(bd, cp);
- }
- }
- if (*cp == 'H') {
- cp++;
- if (*cp == 'Z') {
- cp += 2;
- rpx_cpuspeed(bd, cp);
- }
- }
-
- /* Scan to the end of the record.
- */
- while ((*cp != '\n') && (*cp != 0xff))
- cp++;
-
- /* If the next character is a 0 or ff, we are done.
- */
- cp++;
- if ((*cp == 0) || (*cp == 0xff))
- break;
- }
- bd->bi_memstart = 0;
-#else
- /* For boards without initialized EEPROM.
- */
- bd->bi_memstart = 0;
- bd->bi_memsize = (8 * 1024 * 1024);
- bd->bi_intfreq = 48000000;
- bd->bi_busfreq = 48000000;
- bd->bi_baudrate = 9600;
-#endif
-}
-#endif /* RPXLITE || RPXCLASSIC */
-
-#ifdef CONFIG_BSEIP
-/* Build a board information structure for the BSE ip-Engine.
- * There is more to come since we will add some environment
- * variables and a function to read them.
- */
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- bd = &bdinfo;
- *bdp = bd;
-
- /* Baud rate and processor speed will eventually come
- * from the environment variables.
- */
- bd->bi_baudrate = 9600;
-
- /* Get the Ethernet station address from the Flash ROM.
- */
- cp = (u_char *)0xfe003ffa;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-
- /* The rest of this should come from the environment as well.
- */
- bd->bi_memstart = 0;
- bd->bi_memsize = (16 * 1024 * 1024);
- bd->bi_intfreq = 48000000;
- bd->bi_busfreq = 48000000;
-}
-#endif /* BSEIP */
-
-#ifdef CONFIG_FADS
-/* Build a board information structure for the FADS.
- */
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- bd = &bdinfo;
- *bdp = bd;
-
- /* Just fill in some known values.
- */
- bd->bi_baudrate = 9600;
-
- /* Use default enet.
- */
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-
- bd->bi_memstart = 0;
- bd->bi_memsize = (8 * 1024 * 1024);
- bd->bi_intfreq = 40000000;
- bd->bi_busfreq = 40000000;
-}
-#endif /* FADS */
-
-#ifdef CONFIG_8260
-/* Compute 8260 clock values if the rom doesn't provide them.
- */
-static unsigned char bus2core_8260[] = {
-/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
- 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2,
- 6, 5, 13, 2, 14, 4, 15, 2, 3, 11, 8, 10, 16, 12, 7, 2,
-};
-
-static void
-clk_8260(bd_t *bd)
-{
- uint scmr, vco_out, clkin;
- uint plldf, pllmf, corecnf;
- volatile cpm2_map_t *ip;
-
- ip = (cpm2_map_t *)CPM_MAP_ADDR;
- scmr = ip->im_clkrst.car_scmr;
-
- /* The clkin is always bus frequency.
- */
- clkin = bd->bi_busfreq;
-
- /* Collect the bits from the scmr.
- */
- plldf = (scmr >> 12) & 1;
- pllmf = scmr & 0xfff;
- corecnf = (scmr >> 24) &0x1f;
-
- /* This is arithmetic from the 8260 manual.
- */
- vco_out = clkin / (plldf + 1);
- vco_out *= 2 * (pllmf + 1);
- bd->bi_vco = vco_out; /* Save for later */
-
- bd->bi_cpmfreq = vco_out / 2; /* CPM Freq, in MHz */
- bd->bi_intfreq = bd->bi_busfreq * bus2core_8260[corecnf] / 2;
-
- /* Set Baud rate divisor. The power up default is divide by 16,
- * but we set it again here in case it was changed.
- */
- ip->im_clkrst.car_sccr = 1; /* DIV 16 BRG */
- bd->bi_brgfreq = vco_out / 16;
-}
-
-static unsigned char bus2core_8280[] = {
-/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
- 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2,
- 6, 5, 13, 2, 14, 2, 15, 2, 3, 2, 2, 2, 16, 2, 2, 2,
-};
-
-static void
-clk_8280(bd_t *bd)
-{
- uint scmr, main_clk, clkin;
- uint pllmf, corecnf;
- volatile cpm2_map_t *ip;
-
- ip = (cpm2_map_t *)CPM_MAP_ADDR;
- scmr = ip->im_clkrst.car_scmr;
-
- /* The clkin is always bus frequency.
- */
- clkin = bd->bi_busfreq;
-
- /* Collect the bits from the scmr.
- */
- pllmf = scmr & 0xf;
- corecnf = (scmr >> 24) & 0x1f;
-
- /* This is arithmetic from the 8280 manual.
- */
- main_clk = clkin * (pllmf + 1);
-
- bd->bi_cpmfreq = main_clk / 2; /* CPM Freq, in MHz */
- bd->bi_intfreq = bd->bi_busfreq * bus2core_8280[corecnf] / 2;
-
- /* Set Baud rate divisor. The power up default is divide by 16,
- * but we set it again here in case it was changed.
- */
- ip->im_clkrst.car_sccr = (ip->im_clkrst.car_sccr & 0x3) | 0x1;
- bd->bi_brgfreq = main_clk / 16;
-}
-#endif
-
-#ifdef CONFIG_SBC82xx
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
- unsigned long pvr;
-
- bd = *bdp;
-
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_baudrate = 9600;
- bd->bi_memsize = 256 * 1024 * 1024; /* just a guess */
-
- cp = (void*)SBC82xx_MACADDR_NVRAM_SCC1;
- memcpy(bd->bi_enetaddr, cp, 6);
-
- /* can busfreq be calculated? */
- pvr = mfspr(SPRN_PVR);
- if ((pvr & 0xffff0000) == 0x80820000) {
- bd->bi_busfreq = 100000000;
- clk_8280(bd);
- } else {
- bd->bi_busfreq = 66000000;
- clk_8260(bd);
- }
-
-}
-#endif /* SBC82xx */
-
-#if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260)
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- bd = *bdp;
-#if 0
- /* This is actually provided by my boot rom. I have it
- * here for those people that may load the kernel with
- * a JTAG/COP tool and not the rom monitor.
- */
- bd->bi_baudrate = 115200;
- bd->bi_intfreq = 200000000;
- bd->bi_busfreq = 66666666;
- bd->bi_cpmfreq = 66666666;
- bd->bi_brgfreq = 33333333;
- bd->bi_memsize = 16 * 1024 * 1024;
-#else
- /* The boot rom passes these to us in MHz. Linux now expects
- * them to be in Hz.
- */
- bd->bi_intfreq *= 1000000;
- bd->bi_busfreq *= 1000000;
- bd->bi_cpmfreq *= 1000000;
- bd->bi_brgfreq *= 1000000;
-#endif
-
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-}
-#endif /* EST8260 */
-
-#ifdef CONFIG_SBS8260
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- /* This should provided by the boot rom.
- */
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_baudrate = 9600;
- bd->bi_memsize = 64 * 1024 * 1024;
-
- /* Set all of the clocks. We have to know the speed of the
- * external clock. The development board had 66 MHz.
- */
- bd->bi_busfreq = 66666666;
- clk_8260(bd);
-
- /* I don't know how to compute this yet.
- */
- bd->bi_intfreq = 133000000;
-
-
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-}
-#endif /* SBS8260 */
-
-#ifdef CONFIG_RPX8260
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp, *keyvals;
- int i;
- bd_t *bd;
-
- keyvals = (u_char *)*bdp;
-
- bd = &bdinfo;
- *bdp = bd;
-
- /* This is almost identical to the RPX-Lite/Classic functions
- * on the 8xx boards. It would be nice to have a key lookup
- * function in a string, but the format of all of the fields
- * is slightly different.
- */
- cp = keyvals;
- for (;;) {
- if (*cp == 'E') {
- cp++;
- if (*cp == 'A') {
- cp += 2;
- rpx_eth(bd, cp);
- }
- }
- if (*cp == 'S') {
- cp++;
- if (*cp == 'B') {
- cp += 2;
- bd->bi_baudrate = rpx_baseten(cp);
- }
- }
- if (*cp == 'D') {
- cp++;
- if (*cp == '1') {
- cp += 2;
- bd->bi_memsize = rpx_baseten(cp) * 1024 * 1024;
- }
- }
- if (*cp == 'X') {
- cp++;
- if (*cp == 'T') {
- cp += 2;
- bd->bi_busfreq = rpx_baseten(cp);
- }
- }
- if (*cp == 'N') {
- cp++;
- if (*cp == 'V') {
- cp += 2;
- bd->bi_nvsize = rpx_baseten(cp) * 1024 * 1024;
- }
- }
-
- /* Scan to the end of the record.
- */
- while ((*cp != '\n') && (*cp != 0xff))
- cp++;
-
- /* If the next character is a 0 or ff, we are done.
- */
- cp++;
- if ((*cp == 0) || (*cp == 0xff))
- break;
- }
- bd->bi_memstart = 0;
-
- /* The memory size includes both the 60x and local bus DRAM.
- * I don't want to use the local bus DRAM for real memory,
- * so subtract it out. It would be nice if they were separate
- * keys.
- */
- bd->bi_memsize -= 32 * 1024 * 1024;
-
- /* Set all of the clocks. We have to know the speed of the
- * external clock.
- */
- clk_8260(bd);
-
- /* I don't know how to compute this yet.
- */
- bd->bi_intfreq = 200000000;
-}
-#endif /* RPX6 for testing */
-
-#ifdef CONFIG_ADS8260
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- /* This should provided by the boot rom.
- */
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_baudrate = 9600;
- bd->bi_memsize = 16 * 1024 * 1024;
-
- /* Set all of the clocks. We have to know the speed of the
- * external clock. The development board had 66 MHz.
- */
- bd->bi_busfreq = 66666666;
- clk_8260(bd);
-
- /* I don't know how to compute this yet.
- */
- bd->bi_intfreq = 200000000;
-
-
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-}
-#endif /* ADS8260 */
-
-#ifdef CONFIG_WILLOW
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd;
-
- /* Willow has Open Firmware....I should learn how to get this
- * information from it.
- */
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_baudrate = 9600;
- bd->bi_memsize = 32 * 1024 * 1024;
-
- /* Set all of the clocks. We have to know the speed of the
- * external clock. The development board had 66 MHz.
- */
- bd->bi_busfreq = 66666666;
- clk_8260(bd);
-
- /* I don't know how to compute this yet.
- */
- bd->bi_intfreq = 200000000;
-
-
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- bd->bi_enetaddr[i] = *cp++;
- }
-}
-#endif /* WILLOW */
-
-#if defined(CONFIG_XILINX_ML300) || defined(CONFIG_XILINX_ML403)
-void
-embed_config(bd_t ** bdp)
-{
- static const unsigned long line_size = 32;
- static const unsigned long congruence_classes = 256;
- unsigned long addr;
- unsigned long dccr;
- uint8_t* cp;
- bd_t *bd;
- int i;
-
- /*
- * Invalidate the data cache if the data cache is turned off.
- * - The 405 core does not invalidate the data cache on power-up
- * or reset but does turn off the data cache. We cannot assume
- * that the cache contents are valid.
- * - If the data cache is turned on this must have been done by
- * a bootloader and we assume that the cache contents are
- * valid.
- */
- __asm__("mfdccr %0": "=r" (dccr));
- if (dccr == 0) {
- for (addr = 0;
- addr < (congruence_classes * line_size);
- addr += line_size) {
- __asm__("dccci 0,%0": :"b"(addr));
- }
- }
-
- bd = &bdinfo;
- *bdp = bd;
- bd->bi_memsize = XPAR_DDR_0_SIZE;
- bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ;
- bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ;
- bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ;
-
- /* Copy the default ethernet address */
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++)
- bd->bi_enetaddr[i] = *cp++;
-
- timebase_period_ns = 1000000000 / bd->bi_tbfreq;
- /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
-}
-#endif /* CONFIG_XILINX_ML300 || CONFIG_XILINX_ML403 */
-
-#ifdef CONFIG_IBM_OPENBIOS
-/* This could possibly work for all treeboot roms.
-*/
-#if defined(CONFIG_BUBINGA)
-#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */
-#else
-#define BOARD_INFO_VECTOR 0xFFFE0B50
-#endif
-
-void
-embed_config(bd_t **bdp)
-{
- u_char *cp;
- int i;
- bd_t *bd, *treeboot_bd;
- bd_t *(*get_board_info)(void) =
- (bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);
-#if !defined(CONFIG_STB03xxx)
-
- /* shut down the Ethernet controller that the boot rom
- * sometimes leaves running.
- */
- mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
- while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
- out_be32((volatile u32*)EMAC0_BASE,0x20000000); /* then reset EMAC */
-#endif
-
- bd = &bdinfo;
- *bdp = bd;
- if ((treeboot_bd = get_board_info()) != NULL) {
- memcpy(bd, treeboot_bd, sizeof(bd_t));
- }
- else {
- /* Hmmm...better try to stuff some defaults.
- */
- bd->bi_memsize = 16 * 1024 * 1024;
- cp = (u_char *)def_enet_addr;
- for (i=0; i<6; i++) {
- /* I should probably put different ones here,
- * hopefully only one is used.
- */
- bd->BD_EMAC_ADDR(0,i) = *cp;
-
-#ifdef CONFIG_PCI
- bd->bi_pci_enetaddr[i] = *cp++;
-#endif
- }
- bd->bi_tbfreq = 200 * 1000 * 1000;
- bd->bi_intfreq = 200000000;
- bd->bi_busfreq = 100000000;
-#ifdef CONFIG_PCI
- bd->bi_pci_busfreq = 66666666;
-#endif
- }
- /* Yeah, this look weird, but on Redwood 4 they are
- * different object in the structure. Sincr Redwwood 5
- * and Redwood 6 use OpenBIOS, it requires a special value.
- */
-#if defined(CONFIG_REDWOOD_5) || defined (CONFIG_REDWOOD_6)
- bd->bi_tbfreq = 27 * 1000 * 1000;
-#endif
- timebase_period_ns = 1000000000 / bd->bi_tbfreq;
-}
-#endif /* CONFIG_IBM_OPENBIOS */
-
-#ifdef CONFIG_EP405
-#include <linux/serial_reg.h>
-
-void
-embed_config(bd_t **bdp)
-{
- u32 chcr0;
- u_char *cp;
- bd_t *bd;
-
- /* Different versions of the PlanetCore firmware vary in how
- they set up the serial port - in particular whether they
- use the internal or external serial clock for UART0. Make
- sure the UART is in a known state. */
- /* FIXME: We should use the board's 11.0592MHz external serial
- clock - it will be more accurate for serial rates. For
- now, however the baud rates in ep405.h are for the internal
- clock. */
- chcr0 = mfdcr(DCRN_CHCR0);
- if ( (chcr0 & 0x1fff) != 0x103e ) {
- mtdcr(DCRN_CHCR0, (chcr0 & 0xffffe000) | 0x103e);
- /* The following tricks serial_init() into resetting the baud rate */
- writeb(0, UART0_IO_BASE + UART_LCR);
- }
-
- /* We haven't seen actual problems with the EP405 leaving the
- * EMAC running (as we have on Walnut). But the registers
- * suggest it may not be left completely quiescent. Reset it
- * just to be sure. */
- mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
- while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
- out_be32((unsigned *)EMAC0_BASE,0x20000000); /* then reset EMAC */
-
- bd = &bdinfo;
- *bdp = bd;
-#if 1
- cp = (u_char *)0xF0000EE0;
- for (;;) {
- if (*cp == 'E') {
- cp++;
- if (*cp == 'A') {
- cp += 2;
- rpx_eth(bd, cp);
- }
- }
-
- if (*cp == 'D') {
- cp++;
- if (*cp == '1') {
- cp += 2;
- rpx_memsize(bd, cp);
- }
- }
-
- if (*cp == 'N') {
- cp++;
- if (*cp == 'V') {
- cp += 2;
- rpx_nvramsize(bd, cp);
- }
- }
- while ((*cp != '\n') && (*cp != 0xff))
- cp++;
-
- cp++;
- if ((*cp == 0) || (*cp == 0xff))
- break;
- }
- bd->bi_intfreq = 200000000;
- bd->bi_busfreq = 100000000;
- bd->bi_pci_busfreq= 33000000 ;
-#else
-
- bd->bi_memsize = 64000000;
- bd->bi_intfreq = 200000000;
- bd->bi_busfreq = 100000000;
- bd->bi_pci_busfreq= 33000000 ;
-#endif
-}
-#endif
diff --git a/arch/ppc/boot/simple/head.S b/arch/ppc/boot/simple/head.S
deleted file mode 100644
index 1b4d7b1..0000000
--- a/arch/ppc/boot/simple/head.S
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * Initial board bringup code for many different boards.
- *
- * Author: Tom Rini
- * trini@mvista.com
- * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others).
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <asm/reg.h>
-#include <asm/cache.h>
-#include <asm/ppc_asm.h>
-
- .text
-
-/*
- * Begin at some arbitrary location in RAM or Flash
- * Initialize core registers
- * Configure memory controller (Not executing from RAM)
- * Move the boot code to the link address (8M)
- * Setup C stack
- * Initialize UART
- * Decompress the kernel to 0x0
- * Jump to the kernel entry
- *
- */
-
- .globl start
-start:
- bl start_
-#ifdef CONFIG_IBM_OPENBIOS
- /* The IBM "Tree" bootrom knows that the address of the bootrom
- * read only structure is 4 bytes after _start.
- */
- .long 0x62726f6d # structure ID - "brom"
- .long 0x5f726f00 # - "_ro\0"
- .long 1 # structure version
- .long bootrom_cmdline # address of *bootrom_cmdline
-#endif
-
-start_:
-#ifdef CONFIG_FORCE
- /* We have some really bad firmware. We must disable the L1
- * icache/dcache now or the board won't boot.
- */
- li r4,0x0000
- isync
- mtspr SPRN_HID0,r4
- sync
- isync
-#endif
-
-#if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP)
- mr r29,r3 /* On the MBX860, r3 is the board info pointer.
- * On the RPXSUPER, r3 points to the NVRAM
- * configuration keys.
- * On PReP, r3 is the pointer to the residual data.
- */
-#endif
-
-#if defined(CONFIG_XILINX_VIRTEX_4_FX)
- /* PPC errata 213: only for Virtex-4 FX */
- mfccr0 0
- oris 0,0,0x50000000@h
- mtccr0 0
-#endif
-
- mflr r3 /* Save our actual starting address. */
-
- /* The following functions we call must not modify r3 or r4.....
- */
-#ifdef CONFIG_6xx
- /* On PReP we must look at the OpenFirmware pointer and sanity
- * test it. On other platforms, we disable the MMU right now
- * and other bits.
- */
-#ifdef CONFIG_PPC_PREP
-/*
- * Save the OF pointer to r25, but only if the entry point is in a sane
- * location; if not we store 0. If there is no entry point, or it is
- * invalid, we establish the default MSR value immediately. Otherwise,
- * we defer doing that, to allow OF functions to be called, until we
- * begin uncompressing the kernel.
- */
- lis r8,0x0fff /* r8 = 0x0fffffff */
- ori r8,r8,0xffff
-
- subc r8,r8,r5 /* r8 = (r5 <= r8) ? ~0 : 0 */
- subfe r8,r8,r8
- nand r8,r8,r8
-
- and. r5,r5,r8 /* r5 will be cleared if (r5 > r8) */
- bne+ haveOF
-
- li r8,MSR_IP|MSR_FP /* Not OF: set MSR immediately */
- mtmsr r8
- isync
-haveOF:
- mr r25,r5
-#else
- bl disable_6xx_mmu
-#endif
- bl disable_6xx_l1cache
-
- CLEAR_CACHES
-#endif
-
-#ifdef CONFIG_8xx
- mfmsr r8 /* Turn off interrupts */
- li r9,0
- ori r9,r9,MSR_EE
- andc r8,r8,r9
- mtmsr r8
-
- /* We do this because some boot roms don't initialize the
- * processor correctly. Don't do this if you want to debug
- * using a BDM device.
- */
- li r4,0 /* Zero DER to prevent FRZ */
- mtspr SPRN_DER,r4
-#endif
-
-#if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP)
- mr r4,r29 /* put the board info pointer where the relocate
- * routine will find it
- */
-#endif
-
- /* Get the load address.
- */
- subi r3, r3, 4 /* Get the actual IP, not NIP */
- b relocate
-
diff --git a/arch/ppc/boot/simple/iic.c b/arch/ppc/boot/simple/iic.c
deleted file mode 100644
index 5e91489..0000000
--- a/arch/ppc/boot/simple/iic.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/* Minimal support functions to read configuration from IIC EEPROMS
- * on MPC8xx boards. Originally written for RPGC RPX-Lite.
- * Dan Malek (dmalek@jlc.net).
- */
-#include <linux/types.h>
-#include <asm/uaccess.h>
-#include <asm/mpc8xx.h>
-#include <asm/cpm1.h>
-
-
-/* IIC functions.
- * These are just the basic master read/write operations so we can
- * examine serial EEPROM.
- */
-void iic_read(uint devaddr, u_char *buf, uint offset, uint count);
-
-static int iic_init_done;
-
-static void
-iic_init(void)
-{
- volatile iic_t *iip;
- volatile i2c8xx_t *i2c;
- volatile cpm8xx_t *cp;
- volatile immap_t *immap;
- uint dpaddr;
-
- immap = (immap_t *)IMAP_ADDR;
- cp = (cpm8xx_t *)&(immap->im_cpm);
-
- /* Reset the CPM. This is necessary on the 860 processors
- * that may have started the SCC1 ethernet without relocating
- * the IIC.
- * This also stops the Ethernet in case we were loaded by a
- * BOOTP rom monitor.
- */
- cp->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
-
- /* Wait for it.
- */
- while (cp->cp_cpcr & (CPM_CR_RST | CPM_CR_FLG));
-
- /* Remove any microcode patches. We will install our own
- * later.
- */
- cp->cp_cpmcr1 = 0;
- cp->cp_cpmcr2 = 0;
- cp->cp_cpmcr3 = 0;
- cp->cp_cpmcr4 = 0;
- cp->cp_rccr = 0;
-
- iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
- i2c = (i2c8xx_t *)&(immap->im_i2c);
-
- /* Initialize Port B IIC pins.
- */
- cp->cp_pbpar |= 0x00000030;
- cp->cp_pbdir |= 0x00000030;
- cp->cp_pbodr |= 0x00000030;
-
- /* Initialize the parameter ram.
- */
-
- /* Allocate space for a two transmit and one receive buffer
- * descriptor in the DP ram.
- * For now, this address seems OK, but it may have to
- * change with newer versions of the firmware.
- */
- dpaddr = 0x0840;
-
- /* Set up the IIC parameters in the parameter ram.
- */
- iip->iic_tbase = dpaddr;
- iip->iic_rbase = dpaddr + (2 * sizeof(cbd_t));
-
- iip->iic_tfcr = SMC_EB;
- iip->iic_rfcr = SMC_EB;
-
- /* This should really be done by the reader/writer.
- */
- iip->iic_mrblr = 128;
-
- /* Initialize Tx/Rx parameters.
- */
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Select an arbitrary address. Just make sure it is unique.
- */
- i2c->i2c_i2add = 0x34;
-
- /* Make clock run maximum slow.
- */
- i2c->i2c_i2brg = 7;
-
- /* Disable interrupts.
- */
- i2c->i2c_i2cmr = 0;
- i2c->i2c_i2cer = 0xff;
-
- /* Enable SDMA.
- */
- immap->im_siu_conf.sc_sdcr = 1;
-
- iic_init_done = 1;
-}
-
-/* Read from IIC.
- * Caller provides device address, memory buffer, and byte count.
- */
-static u_char iitemp[32];
-
-void
-iic_read(uint devaddr, u_char *buf, uint offset, uint count)
-{
- volatile iic_t *iip;
- volatile i2c8xx_t *i2c;
- volatile cbd_t *tbdf, *rbdf;
- volatile cpm8xx_t *cp;
- volatile immap_t *immap;
- u_char *tb;
- uint temp;
-
- /* If the interface has not been initialized, do that now.
- */
- if (!iic_init_done)
- iic_init();
-
- immap = (immap_t *)IMAP_ADDR;
- cp = (cpm8xx_t *)&(immap->im_cpm);
-
- iip = (iic_t *)&cp->cp_dparam[PROFF_IIC];
- i2c = (i2c8xx_t *)&(immap->im_i2c);
-
- tbdf = (cbd_t *)&cp->cp_dpmem[iip->iic_tbase];
- rbdf = (cbd_t *)&cp->cp_dpmem[iip->iic_rbase];
-
- /* Send a "dummy write" operation. This is a write request with
- * only the offset sent, followed by another start condition.
- * This will ensure we start reading from the first location
- * of the EEPROM.
- */
- tb = iitemp;
- tb = (u_char *)(((uint)tb + 15) & ~15);
- tbdf->cbd_bufaddr = (int)tb;
- *tb = devaddr & 0xfe; /* Device address */
- *(tb+1) = offset; /* Offset */
- tbdf->cbd_datlen = 2; /* Length */
- tbdf->cbd_sc =
- BD_SC_READY | BD_SC_LAST | BD_SC_WRAP | BD_IIC_START;
-
- i2c->i2c_i2mod = 1; /* Enable */
- i2c->i2c_i2cer = 0xff;
- i2c->i2c_i2com = 0x81; /* Start master */
-
- /* Wait for IIC transfer.
- */
-#if 0
- while ((i2c->i2c_i2cer & 3) == 0);
-
- if (tbdf->cbd_sc & BD_SC_READY)
- printf("IIC ra complete but tbuf ready\n");
-#else
- temp = 10000000;
- while ((tbdf->cbd_sc & BD_SC_READY) && (temp != 0))
- temp--;
-#if 0
- /* We can't do this...there is no serial port yet!
- */
- if (temp == 0) {
- printf("Timeout reading EEPROM\n");
- return;
- }
-#endif
-#endif
-
- /* Chip errata, clear enable.
- */
- i2c->i2c_i2mod = 0;
-
- /* To read, we need an empty buffer of the proper length.
- * All that is used is the first byte for address, the remainder
- * is just used for timing (and doesn't really have to exist).
- */
- tbdf->cbd_bufaddr = (int)tb;
- *tb = devaddr | 1; /* Device address */
- rbdf->cbd_bufaddr = (uint)buf; /* Desination buffer */
- tbdf->cbd_datlen = rbdf->cbd_datlen = count + 1; /* Length */
- tbdf->cbd_sc = BD_SC_READY | BD_SC_LAST | BD_SC_WRAP | BD_IIC_START;
- rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
-
- /* Chip bug, set enable here.
- */
- i2c->i2c_i2mod = 1; /* Enable */
- i2c->i2c_i2cer = 0xff;
- i2c->i2c_i2com = 0x81; /* Start master */
-
- /* Wait for IIC transfer.
- */
-#if 0
- while ((i2c->i2c_i2cer & 1) == 0);
-
- if (rbdf->cbd_sc & BD_SC_EMPTY)
- printf("IIC read complete but rbuf empty\n");
-#else
- temp = 10000000;
- while ((tbdf->cbd_sc & BD_SC_READY) && (temp != 0))
- temp--;
-#endif
-
- /* Chip errata, clear enable.
- */
- i2c->i2c_i2mod = 0;
-}
diff --git a/arch/ppc/boot/simple/m8260_tty.c b/arch/ppc/boot/simple/m8260_tty.c
deleted file mode 100644
index d770947..0000000
--- a/arch/ppc/boot/simple/m8260_tty.c
+++ /dev/null
@@ -1,325 +0,0 @@
-/* Minimal serial functions needed to send messages out the serial
- * port on SMC1.
- */
-#include <linux/types.h>
-#include <asm/mpc8260.h>
-#include <asm/cpm2.h>
-#include <asm/immap_cpm2.h>
-
-uint no_print;
-extern char *params[];
-extern int nparams;
-static u_char cons_hold[128], *sgptr;
-static int cons_hold_cnt;
-
-/* If defined, enables serial console. The value (1 through 4)
- * should designate which SCC is used, but this isn't complete. Only
- * SCC1 is known to work at this time.
- * We're only linked if SERIAL_CPM_CONSOLE=y, so we only need to test
- * SERIAL_CPM_SCC1.
- */
-#ifdef CONFIG_SERIAL_CPM_SCC1
-#define SCC_CONSOLE 1
-#endif
-
-unsigned long
-serial_init(int ignored, bd_t *bd)
-{
-#ifdef SCC_CONSOLE
- volatile scc_t *sccp;
- volatile scc_uart_t *sup;
-#else
- volatile smc_t *sp;
- volatile smc_uart_t *up;
-#endif
- volatile cbd_t *tbdf, *rbdf;
- volatile cpm2_map_t *ip;
- volatile iop_cpm2_t *io;
- volatile cpm_cpm2_t *cp;
- uint dpaddr, memaddr;
-
- ip = (cpm2_map_t *)CPM_MAP_ADDR;
- cp = &ip->im_cpm;
- io = &ip->im_ioport;
-
- /* Perform a reset.
- */
- cp->cp_cpcr = (CPM_CR_RST | CPM_CR_FLG);
-
- /* Wait for it.
- */
- while (cp->cp_cpcr & CPM_CR_FLG);
-
-#ifdef CONFIG_ADS8260
- /* Enable the RS-232 transceivers.
- */
- *(volatile uint *)(BCSR_ADDR + 4) &=
- ~(BCSR1_RS232_EN1 | BCSR1_RS232_EN2);
-#endif
-
-#ifdef SCC_CONSOLE
- sccp = (scc_t *)&(ip->im_scc[SCC_CONSOLE-1]);
- sup = (scc_uart_t *)&ip->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)];
- sccp->scc_sccm &= ~(UART_SCCM_TX | UART_SCCM_RX);
- sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
- /* Use Port D for SCC1 instead of other functions.
- */
- io->iop_ppard |= 0x00000003;
- io->iop_psord &= ~0x00000001; /* Rx */
- io->iop_psord |= 0x00000002; /* Tx */
- io->iop_pdird &= ~0x00000001; /* Rx */
- io->iop_pdird |= 0x00000002; /* Tx */
-
-#else
- sp = (smc_t*)&(ip->im_smc[0]);
- *(ushort *)(&ip->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
- up = (smc_uart_t *)&ip->im_dprambase[PROFF_SMC1];
-
- /* Disable transmitter/receiver.
- */
- sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-
- /* Use Port D for SMC1 instead of other functions.
- */
- io->iop_ppard |= 0x00c00000;
- io->iop_pdird |= 0x00400000;
- io->iop_pdird &= ~0x00800000;
- io->iop_psord &= ~0x00c00000;
-#endif
-
- /* Allocate space for two buffer descriptors in the DP ram.
- * For now, this address seems OK, but it may have to
- * change with newer versions of the firmware.
- */
- dpaddr = 0x0800;
-
- /* Grab a few bytes from the top of memory.
- */
- memaddr = (bd->bi_memsize - 256) & ~15;
-
- /* Set the physical address of the host memory buffers in
- * the buffer descriptors.
- */
- rbdf = (cbd_t *)&ip->im_dprambase[dpaddr];
- rbdf->cbd_bufaddr = memaddr;
- rbdf->cbd_sc = 0;
- tbdf = rbdf + 1;
- tbdf->cbd_bufaddr = memaddr+128;
- tbdf->cbd_sc = 0;
-
- /* Set up the uart parameters in the parameter ram.
- */
-#ifdef SCC_CONSOLE
- sup->scc_genscc.scc_rbase = dpaddr;
- sup->scc_genscc.scc_tbase = dpaddr + sizeof(cbd_t);
-
- /* Set up the uart parameters in the
- * parameter ram.
- */
- sup->scc_genscc.scc_rfcr = CPMFCR_GBL | CPMFCR_EB;
- sup->scc_genscc.scc_tfcr = CPMFCR_GBL | CPMFCR_EB;
-
- sup->scc_genscc.scc_mrblr = 128;
- sup->scc_maxidl = 8;
- sup->scc_brkcr = 1;
- sup->scc_parec = 0;
- sup->scc_frmec = 0;
- sup->scc_nosec = 0;
- sup->scc_brkec = 0;
- sup->scc_uaddr1 = 0;
- sup->scc_uaddr2 = 0;
- sup->scc_toseq = 0;
- sup->scc_char1 = 0x8000;
- sup->scc_char2 = 0x8000;
- sup->scc_char3 = 0x8000;
- sup->scc_char4 = 0x8000;
- sup->scc_char5 = 0x8000;
- sup->scc_char6 = 0x8000;
- sup->scc_char7 = 0x8000;
- sup->scc_char8 = 0x8000;
- sup->scc_rccm = 0xc0ff;
-
- /* Send the CPM an initialize command.
- */
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_SCC1_PAGE, CPM_CR_SCC1_SBLOCK, 0,
- CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sccp->scc_gsmrh = 0;
- sccp->scc_gsmrl =
- (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
-
- /* Disable all interrupts and clear all pending
- * events.
- */
- sccp->scc_sccm = 0;
- sccp->scc_scce = 0xffff;
- sccp->scc_dsr = 0x7e7e;
- sccp->scc_psmr = 0x3000;
-
- /* Wire BRG1 to SCC1. The console driver will take care of
- * others.
- */
- ip->im_cpmux.cmx_scr = 0;
-#else
- up->smc_rbase = dpaddr;
- up->smc_tbase = dpaddr+sizeof(cbd_t);
- up->smc_rfcr = CPMFCR_EB;
- up->smc_tfcr = CPMFCR_EB;
- up->smc_brklen = 0;
- up->smc_brkec = 0;
- up->smc_brkcr = 0;
- up->smc_mrblr = 128;
- up->smc_maxidl = 8;
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
-
- /* Mask all interrupts and remove anything pending.
- */
- sp->smc_smcm = 0;
- sp->smc_smce = 0xff;
-
- /* Set up the baud rate generator.
- */
- ip->im_cpmux.cmx_smr = 0;
-#endif
-
- /* The baud rate divisor needs to be coordinated with clk_8260().
- */
- ip->im_brgc1 =
- (((bd->bi_brgfreq/16) / bd->bi_baudrate) << 1) |
- CPM_BRG_EN;
-
- /* Make the first buffer the only buffer.
- */
- tbdf->cbd_sc |= BD_SC_WRAP;
- rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
-
- /* Initialize Tx/Rx parameters.
- */
-#ifdef SCC_CONSOLE
- sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#else
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_SMC1_PAGE, CPM_CR_SMC1_SBLOCK, 0, CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Enable transmitter/receiver.
- */
- sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
-#endif
-
- /* This is ignored.
- */
- return 0;
-}
-
-int
-serial_readbuf(u_char *cbuf)
-{
- volatile cbd_t *rbdf;
- volatile char *buf;
-#ifdef SCC_CONSOLE
- volatile scc_uart_t *sup;
-#else
- volatile smc_uart_t *up;
-#endif
- volatile cpm2_map_t *ip;
- int i, nc;
-
- ip = (cpm2_map_t *)CPM_MAP_ADDR;
-
-#ifdef SCC_CONSOLE
- sup = (scc_uart_t *)&ip->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)];
- rbdf = (cbd_t *)&ip->im_dprambase[sup->scc_genscc.scc_rbase];
-#else
- up = (smc_uart_t *)&(ip->im_dprambase[PROFF_SMC1]);
- rbdf = (cbd_t *)&ip->im_dprambase[up->smc_rbase];
-#endif
-
- /* Wait for character to show up.
- */
- buf = (char *)rbdf->cbd_bufaddr;
- while (rbdf->cbd_sc & BD_SC_EMPTY);
- nc = rbdf->cbd_datlen;
- for (i=0; i<nc; i++)
- *cbuf++ = *buf++;
- rbdf->cbd_sc |= BD_SC_EMPTY;
-
- return(nc);
-}
-
-void
-serial_putc(void *ignored, const char c)
-{
- volatile cbd_t *tbdf;
- volatile char *buf;
-#ifdef SCC_CONSOLE
- volatile scc_uart_t *sup;
-#else
- volatile smc_uart_t *up;
-#endif
- volatile cpm2_map_t *ip;
-
- ip = (cpm2_map_t *)CPM_MAP_ADDR;
-#ifdef SCC_CONSOLE
- sup = (scc_uart_t *)&ip->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)];
- tbdf = (cbd_t *)&ip->im_dprambase[sup->scc_genscc.scc_tbase];
-#else
- up = (smc_uart_t *)&(ip->im_dprambase[PROFF_SMC1]);
- tbdf = (cbd_t *)&ip->im_dprambase[up->smc_tbase];
-#endif
-
- /* Wait for last character to go.
- */
- buf = (char *)tbdf->cbd_bufaddr;
- while (tbdf->cbd_sc & BD_SC_READY);
-
- *buf = c;
- tbdf->cbd_datlen = 1;
- tbdf->cbd_sc |= BD_SC_READY;
-}
-
-char
-serial_getc(void *ignored)
-{
- char c;
-
- if (cons_hold_cnt <= 0) {
- cons_hold_cnt = serial_readbuf(cons_hold);
- sgptr = cons_hold;
- }
- c = *sgptr++;
- cons_hold_cnt--;
-
- return(c);
-}
-
-int
-serial_tstc(void *ignored)
-{
- volatile cbd_t *rbdf;
-#ifdef SCC_CONSOLE
- volatile scc_uart_t *sup;
-#else
- volatile smc_uart_t *up;
-#endif
- volatile cpm2_map_t *ip;
-
- ip = (cpm2_map_t *)CPM_MAP_ADDR;
-#ifdef SCC_CONSOLE
- sup = (scc_uart_t *)&ip->im_dprambase[PROFF_SCC1 + ((SCC_CONSOLE-1) << 8)];
- rbdf = (cbd_t *)&ip->im_dprambase[sup->scc_genscc.scc_rbase];
-#else
- up = (smc_uart_t *)&(ip->im_dprambase[PROFF_SMC1]);
- rbdf = (cbd_t *)&ip->im_dprambase[up->smc_rbase];
-#endif
-
- return(!(rbdf->cbd_sc & BD_SC_EMPTY));
-}
diff --git a/arch/ppc/boot/simple/m8xx_tty.c b/arch/ppc/boot/simple/m8xx_tty.c
deleted file mode 100644
index f28924e..0000000
--- a/arch/ppc/boot/simple/m8xx_tty.c
+++ /dev/null
@@ -1,289 +0,0 @@
-/* Minimal serial functions needed to send messages out the serial
- * port on the MBX console.
- *
- * The MBX uses SMC1 for the serial port. We reset the port and use
- * only the first BD that EPPC-Bug set up as a character FIFO.
- *
- * Later versions (at least 1.4, maybe earlier) of the MBX EPPC-Bug
- * use COM1 instead of SMC1 as the console port. This kinda sucks
- * for the rest of the kernel, so here we force the use of SMC1 again.
- */
-#include <linux/types.h>
-#include <asm/uaccess.h>
-#include <asm/mpc8xx.h>
-#include <asm/cpm1.h>
-
-#ifdef CONFIG_MBX
-#define MBX_CSR1 ((volatile u_char *)0xfa100000)
-#define CSR1_COMEN (u_char)0x02
-#endif
-
-#ifdef TQM_SMC2_CONSOLE
-#define PROFF_CONS PROFF_SMC2
-#define CPM_CR_CH_CONS CPM_CR_CH_SMC2
-#define SMC_INDEX 1
-static volatile iop8xx_t *iopp = (iop8xx_t *)&(((immap_t *)IMAP_ADDR)->im_ioport);
-#else
-#define PROFF_CONS PROFF_SMC1
-#define CPM_CR_CH_CONS CPM_CR_CH_SMC1
-#define SMC_INDEX 0
-#endif
-
-static cpm8xx_t *cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
-
-unsigned long
-serial_init(int ignored, bd_t *bd)
-{
- volatile smc_t *sp;
- volatile smc_uart_t *up;
- volatile cbd_t *tbdf, *rbdf;
- volatile cpm8xx_t *cp;
- uint dpaddr, memaddr;
-#ifndef CONFIG_MBX
- uint ui;
-#endif
-
- cp = cpmp;
- sp = (smc_t*)&(cp->cp_smc[SMC_INDEX]);
- up = (smc_uart_t *)&cp->cp_dparam[PROFF_CONS];
-
- /* Disable transmitter/receiver.
- */
- sp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-
-#ifdef CONFIG_FADS
- /* Enable SMC1/2 transceivers.
- */
- *((volatile uint *)BCSR1) &= ~(BCSR1_RS232EN_1|BCSR1_RS232EN_2);
-#endif
-
-#ifndef CONFIG_MBX
- {
- /* Initialize SMCx and use it for the console port.
- */
-
- /* Enable SDMA.
- */
- ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sdcr = 1;
-
-#ifdef TQM_SMC2_CONSOLE
- /* Use Port A for SMC2 instead of other functions.
- */
- iopp->iop_papar |= 0x00c0;
- iopp->iop_padir &= ~0x00c0;
- iopp->iop_paodr &= ~0x00c0;
-#else
- /* Use Port B for SMCs instead of other functions.
- */
- cp->cp_pbpar |= 0x00000cc0;
- cp->cp_pbdir &= ~0x00000cc0;
- cp->cp_pbodr &= ~0x00000cc0;
-#endif
-
- /* Allocate space for two buffer descriptors in the DP ram.
- * For now, this address seems OK, but it may have to
- * change with newer versions of the firmware.
- */
- dpaddr = 0x0800;
-
- /* Grab a few bytes from the top of memory for SMC FIFOs.
- */
- memaddr = (bd->bi_memsize - 32) & ~15;
-
- /* Set the physical address of the host memory buffers in
- * the buffer descriptors.
- */
- rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr];
- rbdf->cbd_bufaddr = memaddr;
- rbdf->cbd_sc = 0;
- tbdf = rbdf + 1;
- tbdf->cbd_bufaddr = memaddr+4;
- tbdf->cbd_sc = 0;
-
- /* Set up the uart parameters in the parameter ram.
- */
- up->smc_rbase = dpaddr;
- up->smc_tbase = dpaddr+sizeof(cbd_t);
- up->smc_rfcr = SMC_EB;
- up->smc_tfcr = SMC_EB;
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
-
- /* Mask all interrupts and remove anything pending.
- */
- sp->smc_smcm = 0;
- sp->smc_smce = 0xff;
-
- /* Set up the baud rate generator.
- * See 8xx_io/commproc.c for details.
- * This wires BRG1 to SMC1 and BRG2 to SMC2;
- */
- cp->cp_simode = 0x10000000;
- ui = bd->bi_intfreq / 16 / bd->bi_baudrate;
-#ifdef TQM_SMC2_CONSOLE
- cp->cp_brgc2 =
-#else
- cp->cp_brgc1 =
-#endif
- ((ui - 1) < 4096)
- ? (((ui - 1) << 1) | CPM_BRG_EN)
- : ((((ui / 16) - 1) << 1) | CPM_BRG_EN | CPM_BRG_DIV16);
-
-#else /* CONFIG_MBX */
- if (*MBX_CSR1 & CSR1_COMEN) {
- /* COM1 is enabled. Initialize SMC1 and use it for
- * the console port.
- */
-
- /* Enable SDMA.
- */
- ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sdcr = 1;
-
- /* Use Port B for SMCs instead of other functions.
- */
- cp->cp_pbpar |= 0x00000cc0;
- cp->cp_pbdir &= ~0x00000cc0;
- cp->cp_pbodr &= ~0x00000cc0;
-
- /* Allocate space for two buffer descriptors in the DP ram.
- * For now, this address seems OK, but it may have to
- * change with newer versions of the firmware.
- */
- dpaddr = 0x0800;
-
- /* Grab a few bytes from the top of memory. EPPC-Bug isn't
- * running any more, so we can do this.
- */
- memaddr = (bd->bi_memsize - 32) & ~15;
-
- /* Set the physical address of the host memory buffers in
- * the buffer descriptors.
- */
- rbdf = (cbd_t *)&cp->cp_dpmem[dpaddr];
- rbdf->cbd_bufaddr = memaddr;
- rbdf->cbd_sc = 0;
- tbdf = rbdf + 1;
- tbdf->cbd_bufaddr = memaddr+4;
- tbdf->cbd_sc = 0;
-
- /* Set up the uart parameters in the parameter ram.
- */
- up->smc_rbase = dpaddr;
- up->smc_tbase = dpaddr+sizeof(cbd_t);
- up->smc_rfcr = SMC_EB;
- up->smc_tfcr = SMC_EB;
-
- /* Set UART mode, 8 bit, no parity, one stop.
- * Enable receive and transmit.
- */
- sp->smc_smcmr = smcr_mk_clen(9) | SMCMR_SM_UART;
-
- /* Mask all interrupts and remove anything pending.
- */
- sp->smc_smcm = 0;
- sp->smc_smce = 0xff;
-
- /* Set up the baud rate generator.
- * See 8xx_io/commproc.c for details.
- */
- cp->cp_simode = 0x10000000;
- cp->cp_brgc1 =
- (((bd->bi_intfreq/16) / 9600) << 1) | CPM_BRG_EN;
-
- /* Enable SMC1 for console output.
- */
- *MBX_CSR1 &= ~CSR1_COMEN;
- }
- else {
-#endif /* ndef CONFIG_MBX */
- /* SMCx is used as console port.
- */
- tbdf = (cbd_t *)&cp->cp_dpmem[up->smc_tbase];
- rbdf = (cbd_t *)&cp->cp_dpmem[up->smc_rbase];
-
- /* Issue a stop transmit, and wait for it.
- */
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_CONS,
- CPM_CR_STOP_TX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
- }
-
- /* Make the first buffer the only buffer.
- */
- tbdf->cbd_sc |= BD_SC_WRAP;
- rbdf->cbd_sc |= BD_SC_EMPTY | BD_SC_WRAP;
-
- /* Single character receive.
- */
- up->smc_mrblr = 1;
- up->smc_maxidl = 0;
-
- /* Initialize Tx/Rx parameters.
- */
- cp->cp_cpcr = mk_cr_cmd(CPM_CR_CH_CONS, CPM_CR_INIT_TRX) | CPM_CR_FLG;
- while (cp->cp_cpcr & CPM_CR_FLG);
-
- /* Enable transmitter/receiver.
- */
- sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN;
-
- /* This is ignored.
- */
- return 0;
-}
-
-void
-serial_putc(void *ignored, const char c)
-{
- volatile cbd_t *tbdf;
- volatile char *buf;
- volatile smc_uart_t *up;
-
- up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS];
- tbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_tbase];
-
- /* Wait for last character to go.
- */
- buf = (char *)tbdf->cbd_bufaddr;
- while (tbdf->cbd_sc & BD_SC_READY);
-
- *buf = c;
- tbdf->cbd_datlen = 1;
- tbdf->cbd_sc |= BD_SC_READY;
-}
-
-char
-serial_getc(void *ignored)
-{
- volatile cbd_t *rbdf;
- volatile char *buf;
- volatile smc_uart_t *up;
- char c;
-
- up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS];
- rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
-
- /* Wait for character to show up.
- */
- buf = (char *)rbdf->cbd_bufaddr;
- while (rbdf->cbd_sc & BD_SC_EMPTY);
- c = *buf;
- rbdf->cbd_sc |= BD_SC_EMPTY;
-
- return(c);
-}
-
-int
-serial_tstc(void *ignored)
-{
- volatile cbd_t *rbdf;
- volatile smc_uart_t *up;
-
- up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_CONS];
- rbdf = (cbd_t *)&cpmp->cp_dpmem[up->smc_rbase];
-
- return(!(rbdf->cbd_sc & BD_SC_EMPTY));
-}
diff --git a/arch/ppc/boot/simple/misc-chestnut.c b/arch/ppc/boot/simple/misc-chestnut.c
deleted file mode 100644
index 14a4b56..0000000
--- a/arch/ppc/boot/simple/misc-chestnut.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Setup for the IBM Chestnut (ibm-750fxgx_eval)
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <asm/io.h>
-#include <asm/mv64x60_defs.h>
-#include <platforms/chestnut.h>
-
-/* Not in the kernel so won't include kernel.h to get its 'max' definition */
-#define max(a,b) (((a) > (b)) ? (a) : (b))
-
-void
-mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
-{
-#ifdef CONFIG_SERIAL_8250_CONSOLE
- /*
- * Change device bus 2 window so that bootoader can do I/O thru
- * 8250/16550 UART that's mapped in that window.
- */
- out_le32(new_base + MV64x60_CPU2DEV_2_BASE, CHESTNUT_UART_BASE >> 16);
- out_le32(new_base + MV64x60_CPU2DEV_2_SIZE, CHESTNUT_UART_SIZE >> 16);
- __asm__ __volatile__("sync");
-#endif
-}
diff --git a/arch/ppc/boot/simple/misc-cpci690.c b/arch/ppc/boot/simple/misc-cpci690.c
deleted file mode 100644
index 8a8614d..0000000
--- a/arch/ppc/boot/simple/misc-cpci690.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Add birec data for Force CPCI690 board.
- *
- * Author: Mark A. Greer <source@mvista.com>
- *
- * 2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <asm/io.h>
-#include <platforms/cpci690.h>
-
-#define KB (1024UL)
-#define MB (1024UL*KB)
-#define GB (1024UL*MB)
-
-extern u32 mv64x60_console_baud;
-extern u32 mv64x60_mpsc_clk_src;
-extern u32 mv64x60_mpsc_clk_freq;
-
-u32 mag = 0xffff;
-
-unsigned long
-get_mem_size(void)
-{
- u32 size;
-
- switch (in_8(((void __iomem *)CPCI690_BR_BASE + CPCI690_BR_MEM_CTLR))
- & 0x07) {
- case 0x01:
- size = 256*MB;
- break;
- case 0x02:
- size = 512*MB;
- break;
- case 0x03:
- size = 768*MB;
- break;
- case 0x04:
- size = 1*GB;
- break;
- case 0x05:
- size = 1*GB + 512*MB;
- break;
- case 0x06:
- size = 2*GB;
- break;
- default:
- size = 0;
- }
-
- return size;
-}
-
-void
-mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
-{
- mv64x60_console_baud = CPCI690_MPSC_BAUD;
- mv64x60_mpsc_clk_src = CPCI690_MPSC_CLK_SRC;
- mv64x60_mpsc_clk_freq =
- (get_mem_size() >= (1*GB)) ? 100000000 : 133333333;
-}
diff --git a/arch/ppc/boot/simple/misc-embedded.c b/arch/ppc/boot/simple/misc-embedded.c
deleted file mode 100644
index d5a00eb..0000000
--- a/arch/ppc/boot/simple/misc-embedded.c
+++ /dev/null
@@ -1,276 +0,0 @@
-/*
- * Originally adapted by Gary Thomas. Much additional work by
- * Cort Dougan <cort@fsmlabs.com>. On top of that still more work by
- * Dan Malek <dmalek@jlc.net>.
- *
- * Currently maintained by: Tom Rini <trini@kernel.crashing.org>
- */
-
-#include <linux/types.h>
-#include <linux/string.h>
-#include <asm/bootinfo.h>
-#include <asm/mmu.h>
-#include <asm/page.h>
-#include <asm/residual.h>
-#if defined(CONFIG_4xx)
-#include <asm/ibm4xx.h>
-#elif defined(CONFIG_8xx)
-#include <asm/mpc8xx.h>
-#elif defined(CONFIG_8260)
-#include <asm/mpc8260.h>
-#endif
-
-#include "nonstdio.h"
-
-/* The linker tells us where the image is. */
-extern char __image_begin, __image_end;
-extern char __ramdisk_begin, __ramdisk_end;
-extern char _end[];
-
-/* Because of the limited amount of memory on embedded, it presents
- * loading problems. The biggest is that we load this boot program
- * into a relatively low memory address, and the Linux kernel Bss often
- * extends into this space when it get loaded. When the kernel starts
- * and zeros the BSS space, it also writes over the information we
- * save here and pass to the kernel (usually board info).
- * On these boards, we grab some known memory holes to hold this information.
- */
-char cmd_buf[256];
-char *cmd_line = cmd_buf;
-char *avail_ram;
-char *end_avail;
-char *zimage_start;
-
-/* This is for 4xx treeboot. It provides a place for the bootrom
- * give us a pointer to a rom environment command line.
- */
-char *bootrom_cmdline = "";
-
-/* This is the default cmdline that will be given to the user at boot time..
- * If none was specified at compile time, we'll give it one that should work.
- * -- Tom */
-#ifdef CONFIG_CMDLINE_BOOL
-char compiled_string[] = CONFIG_CMDLINE;
-#endif
-char ramroot_string[] = "root=/dev/ram";
-char netroot_string[] = "root=/dev/nfs rw ip=on";
-
-/* Serial port to use. */
-unsigned long com_port;
-
-/* We need to make sure that this is before the images to ensure
- * that it's in a mapped location. - Tom */
-bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot")));
-bd_t *hold_residual = &hold_resid_buf;
-
-extern unsigned long serial_init(int chan, bd_t *bp);
-extern void serial_close(unsigned long com_port);
-extern unsigned long start;
-extern void flush_instruction_cache(void);
-extern void gunzip(void *, int, unsigned char *, int *);
-extern void embed_config(bd_t **bp);
-
-/* Weak function for boards which don't need to build the
- * board info struct because they are using PPCBoot/U-Boot.
- */
-void __attribute__ ((weak))
-embed_config(bd_t **bdp)
-{
-}
-
-unsigned long
-load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, bd_t *bp)
-{
- char *cp, ch;
- int timer = 0, zimage_size;
- unsigned long initrd_size;
-
- /* First, capture the embedded board information. Then
- * initialize the serial console port.
- */
- embed_config(&bp);
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || \
- defined(CONFIG_SERIAL_8250_CONSOLE) || \
- defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
- com_port = serial_init(0, bp);
-#endif
-
- /* Grab some space for the command line and board info. Since
- * we no longer use the ELF header, but it was loaded, grab
- * that space.
- */
-#ifdef CONFIG_MBX
- /* Because of the way the MBX loads the ELF image, we can't
- * tell where we started. We read a magic variable from the NVRAM
- * that gives us the intermediate buffer load address.
- */
- load_addr = *(uint *)0xfa000020;
- load_addr += 0x10000; /* Skip ELF header */
-#endif
- /* copy board data */
- if (bp)
- memcpy(hold_residual,bp,sizeof(bd_t));
-
- /* Set end of memory available to us. It is always the highest
- * memory address provided by the board information.
- */
- end_avail = (char *)(bp->bi_memsize);
-
- puts("\nloaded at: "); puthex(load_addr);
- puts(" "); puthex((unsigned long)(load_addr + (4*num_words))); puts("\n");
- if ( (unsigned long)load_addr != (unsigned long)&start ) {
- puts("relocated to: "); puthex((unsigned long)&start);
- puts(" ");
- puthex((unsigned long)((unsigned long)&start + (4*num_words)));
- puts("\n");
- }
-
- if ( bp ) {
- puts("board data at: "); puthex((unsigned long)bp);
- puts(" ");
- puthex((unsigned long)((unsigned long)bp + sizeof(bd_t)));
- puts("\nrelocated to: ");
- puthex((unsigned long)hold_residual);
- puts(" ");
- puthex((unsigned long)((unsigned long)hold_residual + sizeof(bd_t)));
- puts("\n");
- }
-
- /*
- * We link ourself to an arbitrary low address. When we run, we
- * relocate ourself to that address. __image_being points to
- * the part of the image where the zImage is. -- Tom
- */
- zimage_start = (char *)(unsigned long)(&__image_begin);
- zimage_size = (unsigned long)(&__image_end) -
- (unsigned long)(&__image_begin);
-
- initrd_size = (unsigned long)(&__ramdisk_end) -
- (unsigned long)(&__ramdisk_begin);
-
- /*
- * The zImage and initrd will be between start and _end, so they've
- * already been moved once. We're good to go now. -- Tom
- */
- puts("zimage at: "); puthex((unsigned long)zimage_start);
- puts(" "); puthex((unsigned long)(zimage_size+zimage_start));
- puts("\n");
-
- if ( initrd_size ) {
- puts("initrd at: ");
- puthex((unsigned long)(&__ramdisk_begin));
- puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n");
- }
-
- /*
- * setup avail_ram - this is the first part of ram usable
- * by the uncompress code. Anything after this program in RAM
- * is now fair game. -- Tom
- */
- avail_ram = (char *)PAGE_ALIGN((unsigned long)_end);
-
- puts("avail ram: "); puthex((unsigned long)avail_ram); puts(" ");
- puthex((unsigned long)end_avail); puts("\n");
- puts("\nLinux/PPC load: ");
- cp = cmd_line;
- /* This is where we try and pick the right command line for booting.
- * If we were given one at compile time, use it. It Is Right.
- * If we weren't, see if we have a ramdisk. If so, thats root.
- * When in doubt, give them the netroot (root=/dev/nfs rw) -- Tom
- */
-#ifdef CONFIG_CMDLINE_BOOL
- memcpy (cmd_line, compiled_string, sizeof(compiled_string));
-#else
- if ( initrd_size )
- memcpy (cmd_line, ramroot_string, sizeof(ramroot_string));
- else
- memcpy (cmd_line, netroot_string, sizeof(netroot_string));
-#endif
- while ( *cp )
- putc(*cp++);
- while (timer++ < 5*1000) {
- if (tstc()) {
- while ((ch = getc()) != '\n' && ch != '\r') {
- if (ch == '\b' || ch == '\177') {
- if (cp != cmd_line) {
- cp--;
- puts("\b \b");
- }
- } else if (ch == '\030' /* ^x */
- || ch == '\025') { /* ^u */
- while (cp != cmd_line) {
- cp--;
- puts("\b \b");
- }
- } else {
- *cp++ = ch;
- putc(ch);
- }
- }
- break; /* Exit 'timer' loop */
- }
- udelay(1000); /* 1 msec */
- }
- *cp = 0;
- puts("\nUncompressing Linux...");
-
- gunzip(0, 0x400000, zimage_start, &zimage_size);
- flush_instruction_cache();
- puts("done.\n");
- {
- struct bi_record *rec;
- unsigned long initrd_loc = 0;
- unsigned long rec_loc = _ALIGN((unsigned long)(zimage_size) +
- (1 << 20) - 1, (1 << 20));
- rec = (struct bi_record *)rec_loc;
-
- /* We need to make sure that the initrd and bi_recs do not
- * overlap. */
- if ( initrd_size ) {
- initrd_loc = (unsigned long)(&__ramdisk_begin);
- /* If the bi_recs are in the middle of the current
- * initrd, move the initrd to the next MB
- * boundary. */
- if ((rec_loc > initrd_loc) &&
- ((initrd_loc + initrd_size)
- > rec_loc)) {
- initrd_loc = _ALIGN((unsigned long)(zimage_size)
- + (2 << 20) - 1, (2 << 20));
- memmove((void *)initrd_loc, &__ramdisk_begin,
- initrd_size);
- puts("initrd moved: "); puthex(initrd_loc);
- puts(" "); puthex(initrd_loc + initrd_size);
- puts("\n");
- }
- }
-
- rec->tag = BI_FIRST;
- rec->size = sizeof(struct bi_record);
- rec = (struct bi_record *)((unsigned long)rec + rec->size);
-
- rec->tag = BI_CMD_LINE;
- memcpy( (char *)rec->data, cmd_line, strlen(cmd_line)+1);
- rec->size = sizeof(struct bi_record) + strlen(cmd_line) + 1;
- rec = (struct bi_record *)((unsigned long)rec + rec->size);
-
- if ( initrd_size ) {
- rec->tag = BI_INITRD;
- rec->data[0] = initrd_loc;
- rec->data[1] = initrd_size;
- rec->size = sizeof(struct bi_record) + 2 *
- sizeof(unsigned long);
- rec = (struct bi_record *)((unsigned long)rec +
- rec->size);
- }
-
- rec->tag = BI_LAST;
- rec->size = sizeof(struct bi_record);
- rec = (struct bi_record *)((unsigned long)rec + rec->size);
- }
- puts("Now booting the kernel\n");
-#if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE)
- serial_close(com_port);
-#endif
-
- return (unsigned long)hold_residual;
-}
diff --git a/arch/ppc/boot/simple/misc-ev64260.c b/arch/ppc/boot/simple/misc-ev64260.c
deleted file mode 100644
index 0b39786..0000000
--- a/arch/ppc/boot/simple/misc-ev64260.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Host bridge init code for the Marvell/Galileo EV-64260-BP evaluation board
- * with a GT64260 onboard.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <asm/reg.h>
-#include <asm/io.h>
-#include <asm/mv64x60_defs.h>
-#include <platforms/ev64260.h>
-
-#ifdef CONFIG_SERIAL_MPSC_CONSOLE
-extern u32 mv64x60_console_baud;
-extern u32 mv64x60_mpsc_clk_src;
-extern u32 mv64x60_mpsc_clk_freq;
-#endif
-
-void
-mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
-{
- u32 p, v;
-
- /* DINK doesn't enable 745x timebase, so enable here (Adrian Cox) */
- p = mfspr(SPRN_PVR);
- p >>= 16;
-
- /* Reasonable SWAG at a 745x PVR value */
- if (((p & 0xfff0) == 0x8000) && (p != 0x800c)) {
- v = mfspr(SPRN_HID0);
- v |= HID0_TBEN;
- mtspr(SPRN_HID0, v);
- }
-
-#ifdef CONFIG_SERIAL_8250_CONSOLE
- /*
- * Change device bus 2 window so that bootoader can do I/O thru
- * 8250/16550 UART that's mapped in that window.
- */
- out_le32(new_base + MV64x60_CPU2DEV_2_BASE, EV64260_UART_BASE >> 20);
- out_le32(new_base + MV64x60_CPU2DEV_2_SIZE, EV64260_UART_END >> 20);
- __asm__ __volatile__("sync");
-#elif defined(CONFIG_SERIAL_MPSC_CONSOLE)
- mv64x60_console_baud = EV64260_DEFAULT_BAUD;
- mv64x60_mpsc_clk_src = EV64260_MPSC_CLK_SRC;
- mv64x60_mpsc_clk_freq = EV64260_MPSC_CLK_FREQ;
-#endif
-}
diff --git a/arch/ppc/boot/simple/misc-ev64360.c b/arch/ppc/boot/simple/misc-ev64360.c
deleted file mode 100644
index 96eaebb..0000000
--- a/arch/ppc/boot/simple/misc-ev64360.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Copyright (C) 2005 Lee Nicks <allinux@gmail.com>
- *
- * Based on arch/ppc/boot/simple/misc-katana.c from:
- * Mark A. Greer <source@mvista.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#include <linux/types.h>
-#include <asm/io.h>
-#include <asm/mv64x60_defs.h>
-#include <platforms/ev64360.h>
-
-extern u32 mv64x60_console_baud;
-extern u32 mv64x60_mpsc_clk_src;
-extern u32 mv64x60_mpsc_clk_freq;
-
-/* Not in the kernel so won't include kernel.h to get its 'min' definition */
-#ifndef min
-#define min(a,b) (((a) < (b)) ? (a) : (b))
-#endif
-
-void
-mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
-{
- mv64x60_console_baud = EV64360_DEFAULT_BAUD;
- mv64x60_mpsc_clk_src = EV64360_MPSC_CLK_SRC;
- mv64x60_mpsc_clk_freq = EV64360_MPSC_CLK_FREQ;
-}
diff --git a/arch/ppc/boot/simple/misc-katana.c b/arch/ppc/boot/simple/misc-katana.c
deleted file mode 100644
index 79a1bbc..0000000
--- a/arch/ppc/boot/simple/misc-katana.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * Set up MPSC values to bootwrapper can prompt user.
- *
- * Author: Mark A. Greer <source@mvista.com>
- *
- * 2004 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <asm/io.h>
-#include <asm/mv64x60_defs.h>
-#include <platforms/katana.h>
-
-extern u32 mv64x60_console_baud;
-extern u32 mv64x60_mpsc_clk_src;
-extern u32 mv64x60_mpsc_clk_freq;
-
-/* Not in the kernel so won't include kernel.h to get its 'min' definition */
-#ifndef min
-#define min(a,b) (((a) < (b)) ? (a) : (b))
-#endif
-
-unsigned long mv64360_get_mem_size(void);
-
-void
-mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
-{
- mv64x60_console_baud = KATANA_DEFAULT_BAUD;
- mv64x60_mpsc_clk_src = KATANA_MPSC_CLK_SRC;
- mv64x60_mpsc_clk_freq =
- min(katana_bus_freq((void __iomem *)KATANA_CPLD_BASE),
- MV64x60_TCLK_FREQ_MAX);
-}
-
-unsigned long
-get_mem_size(void)
-{
- return mv64360_get_mem_size();
-}
diff --git a/arch/ppc/boot/simple/misc-mv64x60.c b/arch/ppc/boot/simple/misc-mv64x60.c
deleted file mode 100644
index 28b3108..0000000
--- a/arch/ppc/boot/simple/misc-mv64x60.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Relocate bridge's register base and call board specific routine.
- *
- * Author: Mark A. Greer <source@mvista.com>
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <asm/io.h>
-#include <asm/mv64x60_defs.h>
-
-extern struct bi_record *decompress_kernel(unsigned long load_addr,
- int num_words, unsigned long cksum);
-
-
-u32 size_reg[MV64x60_CPU2MEM_WINDOWS] = {
- MV64x60_CPU2MEM_0_SIZE, MV64x60_CPU2MEM_1_SIZE,
- MV64x60_CPU2MEM_2_SIZE, MV64x60_CPU2MEM_3_SIZE
-};
-
-/* Read mem ctlr to get the amount of mem in system */
-unsigned long
-mv64360_get_mem_size(void)
-{
- u32 enables, i, v;
- u32 mem = 0;
-
- enables = in_le32((void __iomem *)CONFIG_MV64X60_NEW_BASE +
- MV64360_CPU_BAR_ENABLE) & 0xf;
-
- for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++)
- if (!(enables & (1<<i))) {
- v = in_le32((void __iomem *)CONFIG_MV64X60_NEW_BASE
- + size_reg[i]) & 0xffff;
- v = (v + 1) << 16;
- mem += v;
- }
-
- return mem;
-}
-
-void
-mv64x60_move_base(void __iomem *old_base, void __iomem *new_base)
-{
- u32 bits, mask, b;
-
- if (old_base != new_base) {
-#ifdef CONFIG_GT64260
- bits = 12;
- mask = 0x07000000;
-#else /* Must be mv64[34]60 */
- bits = 16;
- mask = 0x03000000;
-#endif
- b = in_le32(old_base + MV64x60_INTERNAL_SPACE_DECODE);
- b &= mask;
- b |= ((u32)new_base >> (32 - bits));
- out_le32(old_base + MV64x60_INTERNAL_SPACE_DECODE, b);
-
- __asm__ __volatile__("sync");
-
- /* Wait for change to happen (in accordance with the manual) */
- while (in_le32(new_base + MV64x60_INTERNAL_SPACE_DECODE) != b);
- }
-}
-
-void __attribute__ ((weak))
-mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
-{
-}
-
-void *
-load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,
- void *ign1, void *ign2)
-{
- mv64x60_move_base((void __iomem *)CONFIG_MV64X60_BASE,
- (void __iomem *)CONFIG_MV64X60_NEW_BASE);
- mv64x60_board_init((void __iomem *)CONFIG_MV64X60_BASE,
- (void __iomem *)CONFIG_MV64X60_NEW_BASE);
- return decompress_kernel(load_addr, num_words, cksum);
-}
diff --git a/arch/ppc/boot/simple/misc-prep.c b/arch/ppc/boot/simple/misc-prep.c
deleted file mode 100644
index 0086e1c..0000000
--- a/arch/ppc/boot/simple/misc-prep.c
+++ /dev/null
@@ -1,209 +0,0 @@
-/*
- * Maintainer: Tom Rini <trini@kernel.crashing.org>
- *
- * In the past: Gary Thomas, Cort Dougan <cort@cs.nmt.edu>
- */
-
-#include <linux/pci_ids.h>
-#include <linux/types.h>
-#include <asm/residual.h>
-#include <asm/string.h>
-#include <asm/byteorder.h>
-#include "mpc10x.h"
-#include "of1275.h"
-#include "nonstdio.h"
-
-extern int keyb_present; /* keyboard controller is present by default */
-RESIDUAL hold_resid_buf;
-RESIDUAL *hold_residual = &hold_resid_buf;
-static void *OFW_interface; /* Pointer to OF, if available. */
-
-#ifdef CONFIG_VGA_CONSOLE
-char *vidmem = (char *)0xC00B8000;
-int lines = 25, cols = 80;
-int orig_x, orig_y = 24;
-#endif /* CONFIG_VGA_CONSOLE */
-
-extern int CRT_tstc(void);
-extern int vga_init(unsigned char *ISA_mem);
-extern void gunzip(void *, int, unsigned char *, int *);
-extern unsigned long serial_init(int chan, void *ignored);
-extern void serial_fixups(void);
-extern struct bi_record *decompress_kernel(unsigned long load_addr,
- int num_words, unsigned long cksum);
-extern void disable_6xx_mmu(void);
-extern unsigned long mpc10x_get_mem_size(void);
-
-static void
-writel(unsigned int val, unsigned int address)
-{
- /* Ensure I/O operations complete */
- __asm__ volatile("eieio");
- *(unsigned int *)address = cpu_to_le32(val);
-}
-
-#define PCI_CFG_ADDR(dev,off) ((0x80<<24) | (dev<<8) | (off&0xfc))
-#define PCI_CFG_DATA(off) (MPC10X_MAPA_CNFG_DATA+(off&3))
-
-static void
-pci_read_config_32(unsigned char devfn,
- unsigned char offset,
- unsigned int *val)
-{
- /* Ensure I/O operations complete */
- __asm__ volatile("eieio");
- *(unsigned int *)PCI_CFG_ADDR(devfn,offset) =
- cpu_to_le32(MPC10X_MAPA_CNFG_ADDR);
- /* Ensure I/O operations complete */
- __asm__ volatile("eieio");
- *val = le32_to_cpu(*(unsigned int *)PCI_CFG_DATA(offset));
- return;
-}
-
-#ifdef CONFIG_VGA_CONSOLE
-void
-scroll(void)
-{
- int i;
-
- memcpy ( vidmem, vidmem + cols * 2, ( lines - 1 ) * cols * 2 );
- for ( i = ( lines - 1 ) * cols * 2; i < lines * cols * 2; i += 2 )
- vidmem[i] = ' ';
-}
-#endif /* CONFIG_VGA_CONSOLE */
-
-unsigned long
-load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,
- RESIDUAL *residual, void *OFW)
-{
- int start_multi = 0;
- unsigned int pci_viddid, pci_did, tulip_pci_base, tulip_base;
-
- /* If we have Open Firmware, initialise it immediately */
- if (OFW) {
- OFW_interface = OFW;
- ofinit(OFW_interface);
- }
-
- board_isa_init();
-#if defined(CONFIG_VGA_CONSOLE)
- vga_init((unsigned char *)0xC0000000);
-#endif /* CONFIG_VGA_CONSOLE */
-
- if (residual) {
- /* Is this Motorola PPCBug? */
- if ((1 & residual->VitalProductData.FirmwareSupports) &&
- (1 == residual->VitalProductData.FirmwareSupplier)) {
- unsigned char base_mod;
- unsigned char board_type = inb(0x801) & 0xF0;
-
- /*
- * Reset the onboard 21x4x Ethernet
- * Motorola Ethernet is at IDSEL 14 (devfn 0x70)
- */
- pci_read_config_32(0x70, 0x00, &pci_viddid);
- pci_did = (pci_viddid & 0xffff0000) >> 16;
- /* Be sure we've really found a 21x4x chip */
- if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_DEC) &&
- ((pci_did == PCI_DEVICE_ID_DEC_TULIP_FAST) ||
- (pci_did == PCI_DEVICE_ID_DEC_TULIP) ||
- (pci_did == PCI_DEVICE_ID_DEC_TULIP_PLUS) ||
- (pci_did == PCI_DEVICE_ID_DEC_21142))) {
- pci_read_config_32(0x70,
- 0x10,
- &tulip_pci_base);
- /* Get the physical base address */
- tulip_base =
- (tulip_pci_base & ~0x03UL) + 0x80000000;
- /* Strobe the 21x4x reset bit in CSR0 */
- writel(0x1, tulip_base);
- }
-
- /* If this is genesis 2 board then check for no
- * keyboard controller and more than one processor.
- */
- if (board_type == 0xe0) {
- base_mod = inb(0x803);
- /* if a MVME2300/2400 or a Sitka then no keyboard */
- if((base_mod == 0xFA) || (base_mod == 0xF9) ||
- (base_mod == 0xE1)) {
- keyb_present = 0; /* no keyboard */
- }
- }
- /* If this is a multiprocessor system then
- * park the other processor so that the
- * kernel knows where to find them.
- */
- if (residual->MaxNumCpus > 1)
- start_multi = 1;
- }
- memcpy(hold_residual,residual,sizeof(RESIDUAL));
- }
-
- /* Call decompress_kernel */
- decompress_kernel(load_addr, num_words, cksum);
-
- if (start_multi) {
- residual->VitalProductData.SmpIar = (unsigned long)0xc0;
- residual->Cpus[1].CpuState = CPU_GOOD;
- hold_residual->VitalProductData.Reserved5 = 0xdeadbeef;
- }
-
- /* Now go and clear out the BATs and ensure that our MSR is
- * correct .*/
- disable_6xx_mmu();
-
- /* Make r3 be a pointer to the residual data. */
- return (unsigned long)hold_residual;
-}
-
-unsigned long
-get_mem_size(void)
-{
- unsigned int pci_viddid, pci_did;
-
- /* First, figure out what kind of host bridge we are on. If it's
- * an MPC10x, we can ask it directly how much memory it has.
- * Otherwise, see if the residual data has anything. This isn't
- * the best way, but it can be the only way. If there's nothing,
- * assume 32MB. -- Tom.
- */
- /* See what our host bridge is. */
- pci_read_config_32(0x00, 0x00, &pci_viddid);
- pci_did = (pci_viddid & 0xffff0000) >> 16;
- /* See if we are on an MPC10x. */
- if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
- && ((pci_did == PCI_DEVICE_ID_MOTOROLA_MPC105)
- || (pci_did == PCI_DEVICE_ID_MOTOROLA_MPC106)
- || (pci_did == PCI_DEVICE_ID_MOTOROLA_MPC107)))
- return mpc10x_get_mem_size();
- /* If it's not, see if we have anything in the residual data. */
- else if (hold_residual && hold_residual->TotalMemory)
- return hold_residual->TotalMemory;
- else if (OFW_interface) {
- /*
- * This is a 'best guess' check. We want to make sure
- * we don't try this on a PReP box without OF
- * -- Cort
- */
- while (OFW_interface)
- {
- phandle dev_handle;
- int mem_info[2];
-
- /* get handle to memory description */
- if (!(dev_handle = finddevice("/memory@0")))
- break;
-
- /* get the info */
- if (getprop(dev_handle, "reg", mem_info,
- sizeof(mem_info)) != 8)
- break;
-
- return mem_info[1];
- }
- }
-
- /* Fall back to hard-coding 32MB. */
- return 32*1024*1024;
-}
diff --git a/arch/ppc/boot/simple/misc-radstone_ppc7d.c b/arch/ppc/boot/simple/misc-radstone_ppc7d.c
deleted file mode 100644
index 0f302ea..0000000
--- a/arch/ppc/boot/simple/misc-radstone_ppc7d.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Misc data for Radstone PPC7D board.
- *
- * Author: James Chapman <jchapman@katalix.com>
- */
-
-#include <linux/types.h>
-#include <platforms/radstone_ppc7d.h>
-
-#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
-extern u32 mv64x60_console_baud;
-extern u32 mv64x60_mpsc_clk_src;
-extern u32 mv64x60_mpsc_clk_freq;
-#endif
-
-void
-mv64x60_board_init(void __iomem *old_base, void __iomem *new_base)
-{
-#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
- mv64x60_console_baud = PPC7D_DEFAULT_BAUD;
- mv64x60_mpsc_clk_src = PPC7D_MPSC_CLK_SRC;
- mv64x60_mpsc_clk_freq = PPC7D_MPSC_CLK_FREQ;
-#endif
-}
diff --git a/arch/ppc/boot/simple/misc-spruce.c b/arch/ppc/boot/simple/misc-spruce.c
deleted file mode 100644
index 5b3a6c6..0000000
--- a/arch/ppc/boot/simple/misc-spruce.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * Misc. bootloader code for IBM Spruce reference platform
- *
- * Authors: Johnnie Peters <jpeters@mvista.com>
- * Matt Porter <mporter@mvista.com>
- *
- * Derived from arch/ppc/boot/prep/misc.c
- *
- * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <linux/pci.h>
-
-#include <asm/bootinfo.h>
-
-extern unsigned long decompress_kernel(unsigned long load_addr, int num_words,
- unsigned long cksum);
-
-/* Define some important locations of the Spruce. */
-#define SPRUCE_PCI_CONFIG_ADDR 0xfec00000
-#define SPRUCE_PCI_CONFIG_DATA 0xfec00004
-
-/* PCI configuration space access routines. */
-unsigned int *pci_config_address = (unsigned int *)SPRUCE_PCI_CONFIG_ADDR;
-unsigned char *pci_config_data = (unsigned char *)SPRUCE_PCI_CONFIG_DATA;
-
-void cpc700_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned char *val)
-{
- out_le32(pci_config_address,
- (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000));
-
- *val= (in_le32((unsigned *)pci_config_data) >> (8 * (offset & 3))) & 0xff;
-}
-
-void cpc700_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned char val)
-{
- out_le32(pci_config_address,
- (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000));
-
- out_8(pci_config_data + (offset&3), val);
-}
-
-void cpc700_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned short *val)
-{
- out_le32(pci_config_address,
- (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000));
-
- *val= in_le16((unsigned short *)(pci_config_data + (offset&3)));
-}
-
-void cpc700_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned short val)
-{
- out_le32(pci_config_address,
- (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000));
-
- out_le16((unsigned short *)(pci_config_data + (offset&3)), val);
-}
-
-void cpc700_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned int *val)
-{
- out_le32(pci_config_address,
- (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000));
-
- *val= in_le32((unsigned *)pci_config_data);
-}
-
-void cpc700_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned int val)
-{
- out_le32(pci_config_address,
- (((bus & 0xff)<<16) | (dev_fn<<8) | (offset&0xfc) | 0x80000000));
-
- out_le32((unsigned *)pci_config_data, val);
-}
-
-#define PCNET32_WIO_RDP 0x10
-#define PCNET32_WIO_RAP 0x12
-#define PCNET32_WIO_RESET 0x14
-
-#define PCNET32_DWIO_RDP 0x10
-#define PCNET32_DWIO_RAP 0x14
-#define PCNET32_DWIO_RESET 0x18
-
-/* Processor interface config register access */
-#define PIFCFGADDR 0xff500000
-#define PIFCFGDATA 0xff500004
-
-#define PLBMIFOPT 0x18 /* PLB Master Interface Options */
-
-#define MEM_MBEN 0x24
-#define MEM_TYPE 0x28
-#define MEM_B1SA 0x3c
-#define MEM_B1EA 0x5c
-#define MEM_B2SA 0x40
-#define MEM_B2EA 0x60
-
-unsigned long
-get_mem_size(void)
-{
- int loop;
- unsigned long mem_size = 0;
- unsigned long mem_mben;
- unsigned long mem_type;
- unsigned long mem_start;
- unsigned long mem_end;
- volatile int *mem_addr = (int *)0xff500008;
- volatile int *mem_data = (int *)0xff50000c;
-
- /* Get the size of memory from the memory controller. */
- *mem_addr = MEM_MBEN;
- asm("sync");
- mem_mben = *mem_data;
- asm("sync");
- for(loop = 0; loop < 1000; loop++);
-
- *mem_addr = MEM_TYPE;
- asm("sync");
- mem_type = *mem_data;
- asm("sync");
- for(loop = 0; loop < 1000; loop++);
-
- *mem_addr = MEM_TYPE;
- /* Confirm bank 1 has DRAM memory */
- if ((mem_mben & 0x40000000) &&
- ((mem_type & 0x30000000) == 0x10000000)) {
- *mem_addr = MEM_B1SA;
- asm("sync");
- mem_start = *mem_data;
- asm("sync");
- for(loop = 0; loop < 1000; loop++);
-
- *mem_addr = MEM_B1EA;
- asm("sync");
- mem_end = *mem_data;
- asm("sync");
- for(loop = 0; loop < 1000; loop++);
-
- mem_size = mem_end - mem_start + 0x100000;
- }
-
- /* Confirm bank 2 has DRAM memory */
- if ((mem_mben & 0x20000000) &&
- ((mem_type & 0xc000000) == 0x4000000)) {
- *mem_addr = MEM_B2SA;
- asm("sync");
- mem_start = *mem_data;
- asm("sync");
- for(loop = 0; loop < 1000; loop++);
-
- *mem_addr = MEM_B2EA;
- asm("sync");
- mem_end = *mem_data;
- asm("sync");
- for(loop = 0; loop < 1000; loop++);
-
- mem_size += mem_end - mem_start + 0x100000;
- }
- return mem_size;
-}
-
-unsigned long
-load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,
- void *ign1, void *ign2)
-{
- int csr0;
- int csr_id;
- int pci_devfn;
- int found_multi = 0;
- unsigned short vendor;
- unsigned short device;
- unsigned short command;
- unsigned char header_type;
- unsigned int bar0;
- volatile int *pif_addr = (int *)0xff500000;
- volatile int *pif_data = (int *)0xff500004;
-
- /*
- * Gah, these firmware guys need to learn that hardware
- * byte swapping is evil! Disable all hardware byte
- * swapping so it doesn't hurt anyone.
- */
- *pif_addr = PLBMIFOPT;
- asm("sync");
- *pif_data = 0x00000000;
- asm("sync");
-
- /* Search out and turn off the PcNet ethernet boot device. */
- for (pci_devfn = 1; pci_devfn < 0xff; pci_devfn++) {
- if (PCI_FUNC(pci_devfn) && !found_multi)
- continue;
-
- cpc700_pcibios_read_config_byte(0, pci_devfn,
- PCI_HEADER_TYPE, &header_type);
-
- if (!PCI_FUNC(pci_devfn))
- found_multi = header_type & 0x80;
-
- cpc700_pcibios_read_config_word(0, pci_devfn, PCI_VENDOR_ID,
- &vendor);
-
- if (vendor != 0xffff) {
- cpc700_pcibios_read_config_word(0, pci_devfn,
- PCI_DEVICE_ID, &device);
-
- /* If this PCI device is the Lance PCNet board then turn it off */
- if ((vendor == PCI_VENDOR_ID_AMD) &&
- (device == PCI_DEVICE_ID_AMD_LANCE)) {
-
- /* Turn on I/O Space on the board. */
- cpc700_pcibios_read_config_word(0, pci_devfn,
- PCI_COMMAND, &command);
- command |= 0x1;
- cpc700_pcibios_write_config_word(0, pci_devfn,
- PCI_COMMAND, command);
-
- /* Get the I/O space address */
- cpc700_pcibios_read_config_dword(0, pci_devfn,
- PCI_BASE_ADDRESS_0, &bar0);
- bar0 &= 0xfffffffe;
-
- /* Reset the PCNet Board */
- inl (bar0+PCNET32_DWIO_RESET);
- inw (bar0+PCNET32_WIO_RESET);
-
- /* First do a work oriented read of csr0. If the value is
- * 4 then this is the correct mode to access the board.
- * If not try a double word ortiented read.
- */
- outw(0, bar0 + PCNET32_WIO_RAP);
- csr0 = inw(bar0 + PCNET32_WIO_RDP);
-
- if (csr0 == 4) {
- /* Check the Chip id register */
- outw(88, bar0 + PCNET32_WIO_RAP);
- csr_id = inw(bar0 + PCNET32_WIO_RDP);
-
- if (csr_id) {
- /* This is the valid mode - set the stop bit */
- outw(0, bar0 + PCNET32_WIO_RAP);
- outw(csr0, bar0 + PCNET32_WIO_RDP);
- }
- } else {
- outl(0, bar0 + PCNET32_DWIO_RAP);
- csr0 = inl(bar0 + PCNET32_DWIO_RDP);
- if (csr0 == 4) {
- /* Check the Chip id register */
- outl(88, bar0 + PCNET32_WIO_RAP);
- csr_id = inl(bar0 + PCNET32_WIO_RDP);
-
- if (csr_id) {
- /* This is the valid mode - set the stop bit*/
- outl(0, bar0 + PCNET32_WIO_RAP);
- outl(csr0, bar0 + PCNET32_WIO_RDP);
- }
- }
- }
- }
- }
- }
-
- return decompress_kernel(load_addr, num_words, cksum);
-}
diff --git a/arch/ppc/boot/simple/misc.c b/arch/ppc/boot/simple/misc.c
deleted file mode 100644
index c3d3305..0000000
--- a/arch/ppc/boot/simple/misc.c
+++ /dev/null
@@ -1,278 +0,0 @@
-/*
- * Misc. bootloader code for many machines. This assumes you have are using
- * a 6xx/7xx/74xx CPU in your machine. This assumes the chunk of memory
- * below 8MB is free. Finally, it assumes you have a NS16550-style uart for
- * your serial console. If a machine meets these requirements, it can quite
- * likely use this code during boot.
- *
- * Author: Matt Porter <mporter@mvista.com>
- * Derived from arch/ppc/boot/prep/misc.c
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <linux/string.h>
-
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/bootinfo.h>
-#ifdef CONFIG_4xx
-#include <asm/ibm4xx.h>
-#endif
-#include <asm/reg.h>
-
-#include "nonstdio.h"
-
-/* Default cmdline */
-#ifdef CONFIG_CMDLINE
-#define CMDLINE CONFIG_CMDLINE
-#else
-#define CMDLINE ""
-#endif
-
-/* Keyboard (and VGA console)? */
-#ifdef CONFIG_VGA_CONSOLE
-#define HAS_KEYB 1
-#else
-#define HAS_KEYB 0
-#endif
-
-/* Will / Can the user give input?
- */
-#if (defined(CONFIG_SERIAL_8250_CONSOLE) \
- || defined(CONFIG_VGA_CONSOLE) \
- || defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
- || defined(CONFIG_SERIAL_MPSC_CONSOLE))
-#define INTERACTIVE_CONSOLE 1
-#endif
-
-char *avail_ram;
-char *end_avail;
-char *zimage_start;
-char cmd_preset[] = CMDLINE;
-char cmd_buf[256];
-char *cmd_line = cmd_buf;
-int keyb_present = HAS_KEYB;
-int zimage_size;
-
-unsigned long com_port;
-unsigned long initrd_size = 0;
-
-/* The linker tells us various locations in the image */
-extern char __image_begin, __image_end;
-extern char __ramdisk_begin, __ramdisk_end;
-extern char _end[];
-/* Original location */
-extern unsigned long start;
-
-extern int CRT_tstc(void);
-extern unsigned long serial_init(int chan, void *ignored);
-extern void serial_close(unsigned long com_port);
-extern void gunzip(void *, int, unsigned char *, int *);
-extern void serial_fixups(void);
-
-/* Allow get_mem_size to be hooked into. This is the default. */
-unsigned long __attribute__ ((weak))
-get_mem_size(void)
-{
- return 0;
-}
-
-#if defined(CONFIG_40x)
-#define PPC4xx_EMAC0_MR0 EMAC0_BASE
-#endif
-
-#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0)
-#define PPC4xx_EMAC0_MR0 PPC44x_EMAC0_MR0
-#endif
-
-struct bi_record *
-decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum)
-{
-#ifdef INTERACTIVE_CONSOLE
- int timer = 0;
- char ch;
-#endif
- char *cp;
- struct bi_record *rec;
- unsigned long initrd_loc = 0, TotalMemory = 0;
-
-#if defined(CONFIG_SERIAL_8250_CONSOLE) || defined(CONFIG_SERIAL_MPSC_CONSOLE)
- com_port = serial_init(0, NULL);
-#endif
-
-#if defined(PPC4xx_EMAC0_MR0)
- /* Reset MAL */
- mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR);
- /* Wait for reset */
- while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {};
- /* Reset EMAC */
- *(volatile unsigned long *)PPC4xx_EMAC0_MR0 = 0x20000000;
- __asm__ __volatile__("eieio");
-#endif
-
- /*
- * Call get_mem_size(), which is memory controller dependent,
- * and we must have the correct file linked in here.
- */
- TotalMemory = get_mem_size();
-
- /* assume the chunk below 8M is free */
- end_avail = (char *)0x00800000;
-
- /*
- * Reveal where we were loaded at and where we
- * were relocated to.
- */
- puts("loaded at: "); puthex(load_addr);
- puts(" "); puthex((unsigned long)(load_addr + (4*num_words)));
- puts("\n");
- if ( (unsigned long)load_addr != (unsigned long)&start )
- {
- puts("relocated to: "); puthex((unsigned long)&start);
- puts(" ");
- puthex((unsigned long)((unsigned long)&start + (4*num_words)));
- puts("\n");
- }
-
- /*
- * We link ourself to 0x00800000. When we run, we relocate
- * ourselves there. So we just need __image_begin for the
- * start. -- Tom
- */
- zimage_start = (char *)(unsigned long)(&__image_begin);
- zimage_size = (unsigned long)(&__image_end) -
- (unsigned long)(&__image_begin);
-
- initrd_size = (unsigned long)(&__ramdisk_end) -
- (unsigned long)(&__ramdisk_begin);
-
- /*
- * The zImage and initrd will be between start and _end, so they've
- * already been moved once. We're good to go now. -- Tom
- */
- avail_ram = (char *)PAGE_ALIGN((unsigned long)_end);
- puts("zimage at: "); puthex((unsigned long)zimage_start);
- puts(" "); puthex((unsigned long)(zimage_size+zimage_start));
- puts("\n");
-
- if ( initrd_size ) {
- puts("initrd at: ");
- puthex((unsigned long)(&__ramdisk_begin));
- puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n");
- }
-
-#ifndef CONFIG_40x /* don't overwrite the 40x image located at 0x00400000! */
- avail_ram = (char *)0x00400000;
-#endif
- end_avail = (char *)0x00800000;
- puts("avail ram: "); puthex((unsigned long)avail_ram); puts(" ");
- puthex((unsigned long)end_avail); puts("\n");
-
- if (keyb_present)
- CRT_tstc(); /* Forces keyboard to be initialized */
-
- /* Display standard Linux/PPC boot prompt for kernel args */
- puts("\nLinux/PPC load: ");
- cp = cmd_line;
- memcpy (cmd_line, cmd_preset, sizeof(cmd_preset));
- while ( *cp ) putc(*cp++);
-
-#ifdef INTERACTIVE_CONSOLE
- /*
- * If they have a console, allow them to edit the command line.
- * Otherwise, don't bother wasting the five seconds.
- */
- while (timer++ < 5*1000) {
- if (tstc()) {
- while ((ch = getc()) != '\n' && ch != '\r') {
- /* Test for backspace/delete */
- if (ch == '\b' || ch == '\177') {
- if (cp != cmd_line) {
- cp--;
- puts("\b \b");
- }
- /* Test for ^x/^u (and wipe the line) */
- } else if (ch == '\030' || ch == '\025') {
- while (cp != cmd_line) {
- cp--;
- puts("\b \b");
- }
- } else {
- *cp++ = ch;
- putc(ch);
- }
- }
- break; /* Exit 'timer' loop */
- }
- udelay(1000); /* 1 msec */
- }
- *cp = 0;
-#endif
- puts("\n");
-
- puts("Uncompressing Linux...");
- gunzip(NULL, 0x400000, zimage_start, &zimage_size);
- puts("done.\n");
-
- /* get the bi_rec address */
- rec = bootinfo_addr(zimage_size);
-
- /* We need to make sure that the initrd and bi_recs do not
- * overlap. */
- if ( initrd_size ) {
- unsigned long rec_loc = (unsigned long) rec;
- initrd_loc = (unsigned long)(&__ramdisk_begin);
- /* If the bi_recs are in the middle of the current
- * initrd, move the initrd to the next MB
- * boundary. */
- if ((rec_loc > initrd_loc) &&
- ((initrd_loc + initrd_size) > rec_loc)) {
- initrd_loc = _ALIGN((unsigned long)(zimage_size)
- + (2 << 20) - 1, (2 << 20));
- memmove((void *)initrd_loc, &__ramdisk_begin,
- initrd_size);
- puts("initrd moved: "); puthex(initrd_loc);
- puts(" "); puthex(initrd_loc + initrd_size);
- puts("\n");
- }
- }
-
- bootinfo_init(rec);
- if ( TotalMemory )
- bootinfo_append(BI_MEMSIZE, sizeof(int), (void*)&TotalMemory);
-
- bootinfo_append(BI_CMD_LINE, strlen(cmd_line)+1, (void*)cmd_line);
-
- /* add a bi_rec for the initrd if it exists */
- if (initrd_size) {
- unsigned long initrd[2];
-
- initrd[0] = initrd_loc;
- initrd[1] = initrd_size;
-
- bootinfo_append(BI_INITRD, sizeof(initrd), &initrd);
- }
- puts("Now booting the kernel\n");
- serial_close(com_port);
-
- return rec;
-}
-
-void __attribute__ ((weak))
-board_isa_init(void)
-{
-}
-
-/* Allow decompress_kernel to be hooked into. This is the default. */
-void * __attribute__ ((weak))
-load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,
- void *ign1, void *ign2)
-{
- board_isa_init();
- return decompress_kernel(load_addr, num_words, cksum);
-}
diff --git a/arch/ppc/boot/simple/mpc10x_memory.c b/arch/ppc/boot/simple/mpc10x_memory.c
deleted file mode 100644
index 8da8f57..0000000
--- a/arch/ppc/boot/simple/mpc10x_memory.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * A routine to find out how much memory the machine has.
- *
- * Based on:
- * arch/ppc/kernel/mpc10x_common.c
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/pci.h>
-#include <asm/types.h>
-#include <asm/io.h>
-#include "mpc10x.h"
-
-/*
- * *** WARNING - A BAT MUST be set to access the PCI config addr/data regs ***
- */
-
-/*
- * PCI config space macros, similar to indirect_xxx and early_xxx macros.
- * We assume bus 0.
- */
-#define MPC10X_CFG_read(val, addr, type, op) *val = op((type)(addr))
-#define MPC10X_CFG_write(val, addr, type, op) op((type *)(addr), (val))
-
-#define MPC10X_PCI_OP(rw, size, type, op, mask) \
-static void \
-mpc10x_##rw##_config_##size(unsigned int __iomem *cfg_addr, \
- unsigned int *cfg_data, int devfn, int offset, \
- type val) \
-{ \
- out_be32(cfg_addr, \
- ((offset & 0xfc) << 24) | (devfn << 16) \
- | (0 << 8) | 0x80); \
- MPC10X_CFG_##rw(val, cfg_data + (offset & mask), type, op); \
- return; \
-}
-
-MPC10X_PCI_OP(read, byte, u8 *, in_8, 3)
-MPC10X_PCI_OP(read, dword, u32 *, in_le32, 0)
-
-/*
- * Read the memory controller registers to determine the amount of memory in
- * the system. This assumes that the firmware has correctly set up the memory
- * controller registers. On CONFIG_PPC_PREP, we know we are being called
- * under a PReP memory map. On all other machines, we assume we are under
- * a CHRP memory map. Further, on CONFIG_PPC_PREP we must rename
- * this function.
- */
-#ifdef CONFIG_PPC_PREP
-#define get_mem_size mpc10x_get_mem_size
-#endif
-unsigned long
-get_mem_size(void)
-{
- unsigned int *config_addr, *config_data, val;
- unsigned long start, end, total, offset;
- int i;
- unsigned char bank_enables;
-
-#ifdef CONFIG_PPC_PREP
- config_addr = (unsigned int *)MPC10X_MAPA_CNFG_ADDR;
- config_data = (unsigned int *)MPC10X_MAPA_CNFG_DATA;
-#else
- config_addr = (unsigned int *)MPC10X_MAPB_CNFG_ADDR;
- config_data = (unsigned int *)MPC10X_MAPB_CNFG_DATA;
-#endif
-
- mpc10x_read_config_byte(config_addr, config_data, PCI_DEVFN(0,0),
- MPC10X_MCTLR_MEM_BANK_ENABLES, &bank_enables);
-
- total = 0;
-
- for (i = 0; i < 8; i++) {
- if (bank_enables & (1 << i)) {
- offset = MPC10X_MCTLR_MEM_START_1 + ((i > 3) ? 4 : 0);
- mpc10x_read_config_dword(config_addr, config_data,
- PCI_DEVFN(0,0), offset, &val);
- start = (val >> ((i & 3) << 3)) & 0xff;
-
- offset = MPC10X_MCTLR_EXT_MEM_START_1 + ((i>3) ? 4 : 0);
- mpc10x_read_config_dword(config_addr, config_data,
- PCI_DEVFN(0,0), offset, &val);
- val = (val >> ((i & 3) << 3)) & 0x03;
- start = (val << 28) | (start << 20);
-
- offset = MPC10X_MCTLR_MEM_END_1 + ((i > 3) ? 4 : 0);
- mpc10x_read_config_dword(config_addr, config_data,
- PCI_DEVFN(0,0), offset, &val);
- end = (val >> ((i & 3) << 3)) & 0xff;
-
- offset = MPC10X_MCTLR_EXT_MEM_END_1 + ((i > 3) ? 4 : 0);
- mpc10x_read_config_dword(config_addr, config_data,
- PCI_DEVFN(0,0), offset, &val);
- val = (val >> ((i & 3) << 3)) & 0x03;
- end = (val << 28) | (end << 20) | 0xfffff;
-
- total += (end - start + 1);
- }
- }
-
- return total;
-}
diff --git a/arch/ppc/boot/simple/mpc52xx_tty.c b/arch/ppc/boot/simple/mpc52xx_tty.c
deleted file mode 100644
index 6955891..0000000
--- a/arch/ppc/boot/simple/mpc52xx_tty.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * Minimal serial functions needed to send messages out a MPC52xx
- * Programmable Serial Controller (PSC).
- *
- * Author: Dale Farnsworth <dfarnsworth@mvista.com>
- *
- * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#include <linux/types.h>
-#include <asm/uaccess.h>
-#include <asm/mpc52xx.h>
-#include <asm/mpc52xx_psc.h>
-#include <asm/serial.h>
-#include <asm/io.h>
-#include <asm/time.h>
-
-
-#ifdef MPC52xx_PF_CONSOLE_PORT
-#define MPC52xx_CONSOLE MPC52xx_PSCx_OFFSET(MPC52xx_PF_CONSOLE_PORT)
-#define MPC52xx_PSC_CONFIG_SHIFT ((MPC52xx_PF_CONSOLE_PORT-1)<<2)
-#else
-#error "MPC52xx_PF_CONSOLE_PORT not defined"
-#endif
-
-static struct mpc52xx_psc __iomem *psc =
- (struct mpc52xx_psc __iomem *) MPC52xx_PA(MPC52xx_CONSOLE);
-
-/* The decrementer counts at the system bus clock frequency
- * divided by four. The most accurate time base is connected to the
- * rtc. We read the decrementer change during one rtc tick
- * and multiply by 4 to get the system bus clock frequency. Since a
- * rtc tick is one seconds, and that's pretty long, we change the rtc
- * dividers temporarily to set them 64x faster ;)
- */
-static int
-mpc52xx_ipbfreq(void)
-{
- struct mpc52xx_rtc __iomem *rtc =
- (struct mpc52xx_rtc __iomem *) MPC52xx_PA(MPC52xx_RTC_OFFSET);
- struct mpc52xx_cdm __iomem *cdm =
- (struct mpc52xx_cdm __iomem *) MPC52xx_PA(MPC52xx_CDM_OFFSET);
- int current_time, previous_time;
- int tbl_start, tbl_end;
- int xlbfreq, ipbfreq;
-
- out_be32(&rtc->dividers, 0x8f1f0000); /* Set RTC 64x faster */
- previous_time = in_be32(&rtc->time);
- while ((current_time = in_be32(&rtc->time)) == previous_time) ;
- tbl_start = get_tbl();
- previous_time = current_time;
- while ((current_time = in_be32(&rtc->time)) == previous_time) ;
- tbl_end = get_tbl();
- out_be32(&rtc->dividers, 0xffff0000); /* Restore RTC */
-
- xlbfreq = (tbl_end - tbl_start) << 8;
- ipbfreq = (in_8(&cdm->ipb_clk_sel) & 1) ? xlbfreq / 2 : xlbfreq;
-
- return ipbfreq;
-}
-
-unsigned long
-serial_init(int ignored, void *ignored2)
-{
- struct mpc52xx_gpio __iomem *gpio =
- (struct mpc52xx_gpio __iomem *) MPC52xx_PA(MPC52xx_GPIO_OFFSET);
- int divisor;
- int mode1;
- int mode2;
- u32 val32;
-
- static int been_here = 0;
-
- if (been_here)
- return 0;
-
- been_here = 1;
-
- val32 = in_be32(&gpio->port_config);
- val32 &= ~(0x7 << MPC52xx_PSC_CONFIG_SHIFT);
- val32 |= MPC52xx_GPIO_PSC_CONFIG_UART_WITHOUT_CD
- << MPC52xx_PSC_CONFIG_SHIFT;
- out_be32(&gpio->port_config, val32);
-
- out_8(&psc->command, MPC52xx_PSC_RST_TX
- | MPC52xx_PSC_RX_DISABLE | MPC52xx_PSC_TX_ENABLE);
- out_8(&psc->command, MPC52xx_PSC_RST_RX);
-
- out_be32(&psc->sicr, 0x0);
- out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
- out_be16(&psc->tfalarm, 0xf8);
-
- out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1
- | MPC52xx_PSC_RX_ENABLE
- | MPC52xx_PSC_TX_ENABLE);
-
- divisor = ((mpc52xx_ipbfreq()
- / (CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD * 16)) + 1) >> 1;
-
- mode1 = MPC52xx_PSC_MODE_8_BITS | MPC52xx_PSC_MODE_PARNONE
- | MPC52xx_PSC_MODE_ERR;
- mode2 = MPC52xx_PSC_MODE_ONE_STOP;
-
- out_8(&psc->ctur, divisor>>8);
- out_8(&psc->ctlr, divisor);
- out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
- out_8(&psc->mode, mode1);
- out_8(&psc->mode, mode2);
-
- return 0; /* ignored */
-}
-
-void
-serial_putc(void *ignored, const char c)
-{
- serial_init(0, NULL);
-
- while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP)) ;
- out_8(&psc->mpc52xx_psc_buffer_8, c);
- while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP)) ;
-}
-
-char
-serial_getc(void *ignored)
-{
- while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY)) ;
-
- return in_8(&psc->mpc52xx_psc_buffer_8);
-}
-
-int
-serial_tstc(void *ignored)
-{
- return (in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY) != 0;
-}
diff --git a/arch/ppc/boot/simple/mv64x60_tty.c b/arch/ppc/boot/simple/mv64x60_tty.c
deleted file mode 100644
index 8a73578..0000000
--- a/arch/ppc/boot/simple/mv64x60_tty.c
+++ /dev/null
@@ -1,364 +0,0 @@
-/*
- * Bootloader version of the embedded MPSC/UART driver for the Marvell 64x60.
- * Note: Due to a GT64260A erratum, DMA will be used for UART input (via SDMA).
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/* This code assumes that the data cache has been disabled (L1, L2, L3). */
-
-#include <linux/types.h>
-#include <linux/serial_reg.h>
-#include <asm/serial.h>
-#include <asm/io.h>
-#include <asm/mv64x60_defs.h>
-#include <mpsc_defs.h>
-
-#ifdef CONFIG_EV64360
-#include <platforms/ev64360.h>
-u32 mv64x60_console_baud = EV64360_DEFAULT_BAUD;
-u32 mv64x60_mpsc_clk_src = EV64360_MPSC_CLK_SRC; /* TCLK */
-u32 mv64x60_mpsc_clk_freq = EV64360_MPSC_CLK_FREQ;
-#else
-u32 mv64x60_console_baud = 9600;
-u32 mv64x60_mpsc_clk_src = 8; /* TCLK */
-u32 mv64x60_mpsc_clk_freq = 100000000;
-#endif
-
-extern void udelay(long);
-static void stop_dma(int chan);
-
-static void __iomem *mv64x60_base = (void __iomem *)CONFIG_MV64X60_NEW_BASE;
-
-struct sdma_regs {
- u32 sdc;
- u32 sdcm;
- u32 rx_desc;
- u32 rx_buf_ptr;
- u32 scrdp;
- u32 tx_desc;
- u32 sctdp;
- u32 sftdp;
-};
-
-static struct sdma_regs sdma_regs[2];
-
-#define SDMA_REGS_INIT(s, reg_base) { \
- (s)->sdc = (reg_base) + SDMA_SDC; \
- (s)->sdcm = (reg_base) + SDMA_SDCM; \
- (s)->rx_desc = (reg_base) + SDMA_RX_DESC; \
- (s)->rx_buf_ptr = (reg_base) + SDMA_RX_BUF_PTR; \
- (s)->scrdp = (reg_base) + SDMA_SCRDP; \
- (s)->tx_desc = (reg_base) + SDMA_TX_DESC; \
- (s)->sctdp = (reg_base) + SDMA_SCTDP; \
- (s)->sftdp = (reg_base) + SDMA_SFTDP; \
-}
-
-static u32 mpsc_base[2] = { MV64x60_MPSC_0_OFFSET, MV64x60_MPSC_1_OFFSET };
-
-struct mv64x60_rx_desc {
- u16 bufsize;
- u16 bytecnt;
- u32 cmd_stat;
- u32 next_desc_ptr;
- u32 buffer;
-};
-
-struct mv64x60_tx_desc {
- u16 bytecnt;
- u16 shadow;
- u32 cmd_stat;
- u32 next_desc_ptr;
- u32 buffer;
-};
-
-#define MAX_RESET_WAIT 10000
-#define MAX_TX_WAIT 10000
-
-#define RX_NUM_DESC 2
-#define TX_NUM_DESC 2
-
-#define RX_BUF_SIZE 32
-#define TX_BUF_SIZE 32
-
-static struct mv64x60_rx_desc rd[2][RX_NUM_DESC] __attribute__ ((aligned(32)));
-static struct mv64x60_tx_desc td[2][TX_NUM_DESC] __attribute__ ((aligned(32)));
-
-static char rx_buf[2][RX_NUM_DESC * RX_BUF_SIZE] __attribute__ ((aligned(32)));
-static char tx_buf[2][TX_NUM_DESC * TX_BUF_SIZE] __attribute__ ((aligned(32)));
-
-static int cur_rd[2] = { 0, 0 };
-static int cur_td[2] = { 0, 0 };
-
-static char chan_initialized[2] = { 0, 0 };
-
-
-#define RX_INIT_RDP(rdp) { \
- (rdp)->bufsize = 2; \
- (rdp)->bytecnt = 0; \
- (rdp)->cmd_stat = SDMA_DESC_CMDSTAT_L | SDMA_DESC_CMDSTAT_F | \
- SDMA_DESC_CMDSTAT_O; \
-}
-
-#ifdef CONFIG_MV64360
-static u32 cpu2mem_tab[MV64x60_CPU2MEM_WINDOWS][2] = {
- { MV64x60_CPU2MEM_0_BASE, MV64x60_CPU2MEM_0_SIZE },
- { MV64x60_CPU2MEM_1_BASE, MV64x60_CPU2MEM_1_SIZE },
- { MV64x60_CPU2MEM_2_BASE, MV64x60_CPU2MEM_2_SIZE },
- { MV64x60_CPU2MEM_3_BASE, MV64x60_CPU2MEM_3_SIZE }
-};
-
-static u32 com2mem_tab[MV64x60_CPU2MEM_WINDOWS][2] = {
- { MV64360_MPSC2MEM_0_BASE, MV64360_MPSC2MEM_0_SIZE },
- { MV64360_MPSC2MEM_1_BASE, MV64360_MPSC2MEM_1_SIZE },
- { MV64360_MPSC2MEM_2_BASE, MV64360_MPSC2MEM_2_SIZE },
- { MV64360_MPSC2MEM_3_BASE, MV64360_MPSC2MEM_3_SIZE }
-};
-
-static u32 dram_selects[MV64x60_CPU2MEM_WINDOWS] = { 0xe, 0xd, 0xb, 0x7 };
-#endif
-
-unsigned long
-serial_init(int chan, void *ignored)
-{
- u32 mpsc_routing_base, sdma_base, brg_bcr, cdv;
- int i;
-
- chan = (chan == 1); /* default to chan 0 if anything but 1 */
-
- if (chan_initialized[chan])
- return chan;
-
- chan_initialized[chan] = 1;
-
- if (chan == 0) {
- sdma_base = MV64x60_SDMA_0_OFFSET;
- brg_bcr = MV64x60_BRG_0_OFFSET + BRG_BCR;
- SDMA_REGS_INIT(&sdma_regs[0], MV64x60_SDMA_0_OFFSET);
- } else {
- sdma_base = MV64x60_SDMA_1_OFFSET;
- brg_bcr = MV64x60_BRG_1_OFFSET + BRG_BCR;
- SDMA_REGS_INIT(&sdma_regs[0], MV64x60_SDMA_1_OFFSET);
- }
-
- mpsc_routing_base = MV64x60_MPSC_ROUTING_OFFSET;
-
- stop_dma(chan);
-
- /* Set up ring buffers */
- for (i=0; i<RX_NUM_DESC; i++) {
- RX_INIT_RDP(&rd[chan][i]);
- rd[chan][i].buffer = (u32)&rx_buf[chan][i * RX_BUF_SIZE];
- rd[chan][i].next_desc_ptr = (u32)&rd[chan][i+1];
- }
- rd[chan][RX_NUM_DESC - 1].next_desc_ptr = (u32)&rd[chan][0];
-
- for (i=0; i<TX_NUM_DESC; i++) {
- td[chan][i].bytecnt = 0;
- td[chan][i].shadow = 0;
- td[chan][i].buffer = (u32)&tx_buf[chan][i * TX_BUF_SIZE];
- td[chan][i].cmd_stat = SDMA_DESC_CMDSTAT_F|SDMA_DESC_CMDSTAT_L;
- td[chan][i].next_desc_ptr = (u32)&td[chan][i+1];
- }
- td[chan][TX_NUM_DESC - 1].next_desc_ptr = (u32)&td[chan][0];
-
- /* Set MPSC Routing */
- out_le32(mv64x60_base + mpsc_routing_base + MPSC_MRR, 0x3ffffe38);
-
-#ifdef CONFIG_GT64260
- out_le32(mv64x60_base + GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102);
-#else /* Must be MV64360 or MV64460 */
- {
- u32 enables, prot_bits, v;
-
- /* Set up comm unit to memory mapping windows */
- /* Note: Assumes MV64x60_CPU2MEM_WINDOWS == 4 */
-
- enables = in_le32(mv64x60_base + MV64360_CPU_BAR_ENABLE) & 0xf;
- prot_bits = 0;
-
- for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++) {
- if (!(enables & (1 << i))) {
- v = in_le32(mv64x60_base + cpu2mem_tab[i][0]);
- v = ((v & 0xffff) << 16) | (dram_selects[i] << 8);
- out_le32(mv64x60_base + com2mem_tab[i][0], v);
-
- v = in_le32(mv64x60_base + cpu2mem_tab[i][1]);
- v = (v & 0xffff) << 16;
- out_le32(mv64x60_base + com2mem_tab[i][1], v);
-
- prot_bits |= (0x3 << (i << 1)); /* r/w access */
- }
- }
-
- out_le32(mv64x60_base + MV64360_MPSC_0_REMAP, 0);
- out_le32(mv64x60_base + MV64360_MPSC_1_REMAP, 0);
- out_le32(mv64x60_base + MV64360_MPSC2MEM_ACC_PROT_0, prot_bits);
- out_le32(mv64x60_base + MV64360_MPSC2MEM_ACC_PROT_1, prot_bits);
- out_le32(mv64x60_base + MV64360_MPSC2MEM_BAR_ENABLE, enables);
- }
-#endif
-
- /* MPSC 0/1 Rx & Tx get clocks BRG0/1 */
- out_le32(mv64x60_base + mpsc_routing_base + MPSC_RCRR, 0x00000100);
- out_le32(mv64x60_base + mpsc_routing_base + MPSC_TCRR, 0x00000100);
-
- /* clear pending interrupts */
- out_le32(mv64x60_base + MV64x60_SDMA_INTR_OFFSET + SDMA_INTR_MASK, 0);
-
- out_le32(mv64x60_base + SDMA_SCRDP + sdma_base, (int)&rd[chan][0]);
- out_le32(mv64x60_base + SDMA_SCTDP + sdma_base,
- (int)&td[chan][TX_NUM_DESC - 1]);
- out_le32(mv64x60_base + SDMA_SFTDP + sdma_base,
- (int)&td[chan][TX_NUM_DESC - 1]);
-
- out_le32(mv64x60_base + SDMA_SDC + sdma_base,
- SDMA_SDC_RFT | SDMA_SDC_SFM | SDMA_SDC_BLMR | SDMA_SDC_BLMT |
- (3 << 12));
-
- cdv = ((mv64x60_mpsc_clk_freq/(32*mv64x60_console_baud))-1);
- out_le32(mv64x60_base + brg_bcr,
- ((mv64x60_mpsc_clk_src << 18) | (1 << 16) | cdv));
-
- /* Put MPSC into UART mode, no null modem, 16x clock mode */
- out_le32(mv64x60_base + MPSC_MMCRL + mpsc_base[chan], 0x000004c4);
- out_le32(mv64x60_base + MPSC_MMCRH + mpsc_base[chan], 0x04400400);
-
- out_le32(mv64x60_base + MPSC_CHR_1 + mpsc_base[chan], 0);
- out_le32(mv64x60_base + MPSC_CHR_9 + mpsc_base[chan], 0);
- out_le32(mv64x60_base + MPSC_CHR_10 + mpsc_base[chan], 0);
- out_le32(mv64x60_base + MPSC_CHR_3 + mpsc_base[chan], 4);
- out_le32(mv64x60_base + MPSC_CHR_4 + mpsc_base[chan], 0);
- out_le32(mv64x60_base + MPSC_CHR_5 + mpsc_base[chan], 0);
- out_le32(mv64x60_base + MPSC_CHR_6 + mpsc_base[chan], 0);
- out_le32(mv64x60_base + MPSC_CHR_7 + mpsc_base[chan], 0);
- out_le32(mv64x60_base + MPSC_CHR_8 + mpsc_base[chan], 0);
-
- /* 8 data bits, 1 stop bit */
- out_le32(mv64x60_base + MPSC_MPCR + mpsc_base[chan], (3 << 12));
- out_le32(mv64x60_base + SDMA_SDCM + sdma_base, SDMA_SDCM_ERD);
- out_le32(mv64x60_base + MPSC_CHR_2 + mpsc_base[chan], MPSC_CHR_2_EH);
-
- udelay(100);
-
- return chan;
-}
-
-static void
-stop_dma(int chan)
-{
- int i;
-
- /* Abort MPSC Rx (aborting Tx messes things up) */
- out_le32(mv64x60_base + MPSC_CHR_2 + mpsc_base[chan], MPSC_CHR_2_RA);
-
- /* Abort SDMA Rx, Tx */
- out_le32(mv64x60_base + sdma_regs[chan].sdcm,
- SDMA_SDCM_AR | SDMA_SDCM_STD);
-
- for (i=0; i<MAX_RESET_WAIT; i++) {
- if ((in_le32(mv64x60_base + sdma_regs[chan].sdcm) &
- (SDMA_SDCM_AR | SDMA_SDCM_AT)) == 0)
- break;
-
- udelay(100);
- }
-}
-
-static int
-wait_for_ownership(int chan)
-{
- int i;
-
- for (i=0; i<MAX_TX_WAIT; i++) {
- if ((in_le32(mv64x60_base + sdma_regs[chan].sdcm) &
- SDMA_SDCM_TXD) == 0)
- break;
-
- udelay(1000);
- }
-
- return (i < MAX_TX_WAIT);
-}
-
-void
-serial_putc(unsigned long com_port, unsigned char c)
-{
- struct mv64x60_tx_desc *tdp;
-
- if (wait_for_ownership(com_port) == 0)
- return;
-
- tdp = &td[com_port][cur_td[com_port]];
- if (++cur_td[com_port] >= TX_NUM_DESC)
- cur_td[com_port] = 0;
-
- *(unchar *)(tdp->buffer ^ 7) = c;
- tdp->bytecnt = 1;
- tdp->shadow = 1;
- tdp->cmd_stat = SDMA_DESC_CMDSTAT_L | SDMA_DESC_CMDSTAT_F |
- SDMA_DESC_CMDSTAT_O;
-
- out_le32(mv64x60_base + sdma_regs[com_port].sctdp, (int)tdp);
- out_le32(mv64x60_base + sdma_regs[com_port].sftdp, (int)tdp);
- out_le32(mv64x60_base + sdma_regs[com_port].sdcm,
- in_le32(mv64x60_base + sdma_regs[com_port].sdcm) |
- SDMA_SDCM_TXD);
-}
-
-unsigned char
-serial_getc(unsigned long com_port)
-{
- struct mv64x60_rx_desc *rdp;
- unchar c = '\0';
-
- rdp = &rd[com_port][cur_rd[com_port]];
-
- if ((rdp->cmd_stat & (SDMA_DESC_CMDSTAT_O|SDMA_DESC_CMDSTAT_ES)) == 0) {
- c = *(unchar *)(rdp->buffer ^ 7);
- RX_INIT_RDP(rdp);
- if (++cur_rd[com_port] >= RX_NUM_DESC)
- cur_rd[com_port] = 0;
- }
-
- return c;
-}
-
-int
-serial_tstc(unsigned long com_port)
-{
- struct mv64x60_rx_desc *rdp;
- int loop_count = 0;
- int rc = 0;
-
- rdp = &rd[com_port][cur_rd[com_port]];
-
- /* Go through rcv descs until empty looking for one with data (no error)*/
- while (((rdp->cmd_stat & SDMA_DESC_CMDSTAT_O) == 0) &&
- (loop_count++ < RX_NUM_DESC)) {
-
- /* If there was an error, reinit the desc & continue */
- if ((rdp->cmd_stat & SDMA_DESC_CMDSTAT_ES) != 0) {
- RX_INIT_RDP(rdp);
- if (++cur_rd[com_port] >= RX_NUM_DESC)
- cur_rd[com_port] = 0;
- rdp = (struct mv64x60_rx_desc *)rdp->next_desc_ptr;
- } else {
- rc = 1;
- break;
- }
- }
-
- return rc;
-}
-
-void
-serial_close(unsigned long com_port)
-{
- stop_dma(com_port);
-}
diff --git a/arch/ppc/boot/simple/openbios.c b/arch/ppc/boot/simple/openbios.c
deleted file mode 100644
index 6ff2701..0000000
--- a/arch/ppc/boot/simple/openbios.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright (c) 2005 DENX Software Engineering
- * Stefan Roese <sr@denx.de>
- *
- * Based on original work by
- * 2005 (c) SYSGO AG - g.jaeger@sysgo.com
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without
- * any warranty of any kind, whether express or implied.
- *
- */
-
-#include <linux/types.h>
-#include <linux/string.h>
-#include <asm/ppcboot.h>
-#include <asm/ibm4xx.h>
-#include <asm/reg.h>
-#ifdef CONFIG_40x
-#include <asm/io.h>
-#endif
-
-#if defined(CONFIG_BUBINGA)
-#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */
-#else
-#define BOARD_INFO_VECTOR 0xFFFE0B50
-#endif
-
-#ifdef CONFIG_40x
-/* Supply a default Ethernet address for those eval boards that don't
- * ship with one. This is an address from the MBX board I have, so
- * it is unlikely you will find it on your network.
- */
-static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };
-
-extern unsigned long timebase_period_ns;
-#endif /* CONFIG_40x */
-
-extern unsigned long decompress_kernel(unsigned long load_addr, int num_words,
- unsigned long cksum);
-
-/* We need to make sure that this is before the images to ensure
- * that it's in a mapped location. */
-bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot")));
-bd_t *hold_residual = &hold_resid_buf;
-
-typedef struct openbios_board_info {
- unsigned char bi_s_version[4]; /* Version of this structure */
- unsigned char bi_r_version[30]; /* Version of the IBM ROM */
- unsigned int bi_memsize; /* DRAM installed, in bytes */
-#ifdef CONFIG_405EP
- unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */
-#else /* CONFIG_405EP */
- unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
-#endif /* CONFIG_405EP */
- unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
- unsigned int bi_intfreq; /* Processor speed, in Hz */
- unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
-#ifdef CONFIG_405EP
- unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */
- unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */
-#endif /* CONFIG_405EP */
-} openbios_bd_t;
-
-void *
-load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,
- void *ign1, void *ign2)
-{
-#ifdef CONFIG_40x
- openbios_bd_t *openbios_bd = NULL;
- openbios_bd_t *(*get_board_info)(void) =
- (openbios_bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);
-
- /*
- * On 40x platforms we not only need the MAC-addresses, but also the
- * clocks and memsize. Now try to get all values using the OpenBIOS
- * "get_board_info()" callback.
- */
- if ((openbios_bd = get_board_info()) != NULL) {
- /*
- * Copy bd_info from OpenBIOS struct into U-Boot struct
- * used by kernel
- */
- hold_residual->bi_memsize = openbios_bd->bi_memsize;
- hold_residual->bi_intfreq = openbios_bd->bi_intfreq;
- hold_residual->bi_busfreq = openbios_bd->bi_busfreq;
- hold_residual->bi_pci_busfreq = openbios_bd->bi_pci_busfreq;
- memcpy(hold_residual->bi_pci_enetaddr, openbios_bd->bi_pci_enetaddr, 6);
-#ifdef CONFIG_405EP
- memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr[0], 6);
- memcpy(hold_residual->bi_enet1addr, openbios_bd->bi_enetaddr[1], 6);
- hold_residual->bi_opbfreq = openbios_bd->bi_opb_busfreq;
- hold_residual->bi_procfreq = openbios_bd->bi_pllouta_freq;
-#else /* CONFIG_405EP */
- memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr, 6);
-#endif /* CONFIG_405EP */
- } else {
- /* Hmmm...better try to stuff some defaults.
- */
- hold_residual->bi_memsize = 16 * 1024 * 1024;
- hold_residual->bi_intfreq = 200000000;
- hold_residual->bi_busfreq = 100000000;
- hold_residual->bi_pci_busfreq = 66666666;
-
- /*
- * Only supply one mac-address in this fallback
- */
- memcpy(hold_residual->bi_enetaddr, (void *)def_enet_addr, 6);
-#ifdef CONFIG_405EP
- hold_residual->bi_opbfreq = 50000000;
- hold_residual->bi_procfreq = 200000000;
-#endif /* CONFIG_405EP */
- }
-
- timebase_period_ns = 1000000000 / hold_residual->bi_intfreq;
-#endif /* CONFIG_40x */
-
-#ifdef CONFIG_440GP
- /* simply copy the MAC addresses */
- memcpy(hold_residual->bi_enetaddr, (char *)OPENBIOS_MAC_BASE, 6);
- memcpy(hold_residual->bi_enet1addr, (char *)(OPENBIOS_MAC_BASE+OPENBIOS_MAC_OFFSET), 6);
-#endif /* CONFIG_440GP */
-
- decompress_kernel(load_addr, num_words, cksum);
-
- return (void *)hold_residual;
-}
diff --git a/arch/ppc/boot/simple/pci.c b/arch/ppc/boot/simple/pci.c
deleted file mode 100644
index b0f673c..0000000
--- a/arch/ppc/boot/simple/pci.c
+++ /dev/null
@@ -1,274 +0,0 @@
-/* Stand alone funtions for QSpan Tundra support.
- */
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <asm/mpc8xx.h>
-
-extern void puthex(unsigned long val);
-extern void puts(const char *);
-
-/* To map PCI devices, you first write 0xffffffff into the device
- * base address registers. When the register is read back, the
- * number of most significant '1' bits describes the amount of address
- * space needed for mapping. If the most significant bit is not set,
- * either the device does not use that address register, or it has
- * a fixed address that we can't change. After the address is assigned,
- * the command register has to be written to enable the card.
- */
-typedef struct {
- u_char pci_bus;
- u_char pci_devfn;
- ushort pci_command;
- uint pci_addrs[6];
-} pci_map_t;
-
-/* We should probably dynamically allocate these structures.
-*/
-#define MAX_PCI_DEVS 32
-int pci_dev_cnt;
-pci_map_t pci_map[MAX_PCI_DEVS];
-
-void pci_conf_write(int bus, int device, int func, int reg, uint writeval);
-void pci_conf_read(int bus, int device, int func, int reg, void *readval);
-void probe_addresses(int bus, int devfn);
-void map_pci_addrs(void);
-
-extern int
-qs_pci_read_config_byte(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned char *val);
-extern int
-qs_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned short *val);
-extern int
-qs_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned int *val);
-extern int
-qs_pci_write_config_byte(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned char val);
-extern int
-qs_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned short val);
-extern int
-qs_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned int val);
-
-
-/* This is a really stripped version of PCI bus scan. All we are
- * looking for are devices that exist.
- */
-void
-pci_scanner(int addr_probe)
-{
- unsigned int devfn, l, class, bus_number;
- unsigned char hdr_type, is_multi;
-
- is_multi = 0;
- bus_number = 0;
- for (devfn = 0; devfn < 0xff; ++devfn) {
- /* The device numbers are comprised of upper 5 bits of
- * device number and lower 3 bits of multi-function number.
- */
- if ((devfn & 7) && !is_multi) {
- /* Don't scan multifunction addresses if this is
- * not a multifunction device.
- */
- continue;
- }
-
- /* Read the header to determine card type.
- */
- qs_pci_read_config_byte(bus_number, devfn, PCI_HEADER_TYPE,
- &hdr_type);
-
- /* If this is a base device number, check the header to
- * determine if it is mulifunction.
- */
- if ((devfn & 7) == 0)
- is_multi = hdr_type & 0x80;
-
- /* Check to see if the board is really in the slot.
- */
- qs_pci_read_config_dword(bus_number, devfn, PCI_VENDOR_ID, &l);
- /* some broken boards return 0 if a slot is empty: */
- if (l == 0xffffffff || l == 0x00000000 || l == 0x0000ffff ||
- l == 0xffff0000) {
- /* Nothing there.
- */
- is_multi = 0;
- continue;
- }
-
- /* If we are not performing an address probe,
- * just simply print out some information.
- */
- if (!addr_probe) {
- qs_pci_read_config_dword(bus_number, devfn,
- PCI_CLASS_REVISION, &class);
-
- class >>= 8; /* upper 3 bytes */
-
-#if 0
- printf("Found (%3d:%d): vendor 0x%04x, device 0x%04x, class 0x%06x\n",
- (devfn >> 3), (devfn & 7),
- (l & 0xffff), (l >> 16) & 0xffff, class);
-#else
- puts("Found ("); puthex(devfn >> 3);
- puts(":"); puthex(devfn & 7);
- puts("): vendor "); puthex(l & 0xffff);
- puts(", device "); puthex((l >> 16) & 0xffff);
- puts(", class "); puthex(class); puts("\n");
-#endif
- }
- else {
- /* If this is a "normal" device, build address list.
- */
- if ((hdr_type & 0x7f) == PCI_HEADER_TYPE_NORMAL)
- probe_addresses(bus_number, devfn);
- }
- }
-
- /* Now map the boards.
- */
- if (addr_probe)
- map_pci_addrs();
-}
-
-/* Probe addresses for the specified device. This is a destructive
- * operation because it writes the registers.
- */
-void
-probe_addresses(bus, devfn)
-{
- int i;
- uint pciaddr;
- ushort pcicmd;
- pci_map_t *pm;
-
- if (pci_dev_cnt >= MAX_PCI_DEVS) {
- puts("Too many PCI devices\n");
- return;
- }
-
- pm = &pci_map[pci_dev_cnt++];
-
- pm->pci_bus = bus;
- pm->pci_devfn = devfn;
-
- for (i=0; i<6; i++) {
- qs_pci_write_config_dword(bus, devfn, PCI_BASE_ADDRESS_0 + (i * 4), -1);
- qs_pci_read_config_dword(bus, devfn, PCI_BASE_ADDRESS_0 + (i * 4),
- &pciaddr);
- pm->pci_addrs[i] = pciaddr;
- qs_pci_read_config_word(bus, devfn, PCI_COMMAND, &pcicmd);
- pm->pci_command = pcicmd;
- }
-}
-
-/* Map the cards into the PCI space. The PCI has separate memory
- * and I/O spaces. In addition, some memory devices require mapping
- * below 1M. The least significant 4 bits of the address register
- * provide information. If this is an I/O device, only the LS bit
- * is used to indicate that, so I/O devices can be mapped to a two byte
- * boundard. Memory addresses can be mapped to a 32 byte boundary.
- * The QSpan implementations usually have a 1Gbyte space for each
- * memory and I/O spaces.
- *
- * This isn't a terribly fancy algorithm. I just map the spaces from
- * the top starting with the largest address space. When finished,
- * the registers are written and the card enabled.
- *
- * While the Tundra can map a large address space on most boards, we
- * need to be careful because it may overlap other devices (like IMMR).
- */
-#define MEMORY_SPACE_SIZE 0x20000000
-#define IO_SPACE_SIZE 0x20000000
-
-void
-map_pci_addrs()
-{
- uint pci_mem_top, pci_mem_low;
- uint pci_io_top;
- uint addr_mask, reg_addr, space;
- int i, j;
- pci_map_t *pm;
-
- pci_mem_top = MEMORY_SPACE_SIZE;
- pci_io_top = IO_SPACE_SIZE;
- pci_mem_low = (1 * 1024 * 1024); /* Below one meg addresses */
-
- /* We can't map anything more than the maximum space, but test
- * for it anyway to catch devices out of range.
- */
- addr_mask = 0x80000000;
-
- do {
- space = (~addr_mask) + 1; /* Size of the space */
- for (i=0; i<pci_dev_cnt; i++) {
- pm = &pci_map[i];
- for (j=0; j<6; j++) {
- /* If the MS bit is not set, this has either
- * already been mapped, or is not used.
- */
- reg_addr = pm->pci_addrs[j];
- if ((reg_addr & 0x80000000) == 0)
- continue;
- if (reg_addr & PCI_BASE_ADDRESS_SPACE_IO) {
- if ((reg_addr & PCI_BASE_ADDRESS_IO_MASK) != addr_mask)
- continue;
- if (pci_io_top < space) {
- puts("Out of PCI I/O space\n");
- }
- else {
- pci_io_top -= space;
- pm->pci_addrs[j] = pci_io_top;
- pm->pci_command |= PCI_COMMAND_IO;
- }
- }
- else {
- if ((reg_addr & PCI_BASE_ADDRESS_MEM_MASK) != addr_mask)
- continue;
-
- /* Memory space. Test if below 1M.
- */
- if (reg_addr & PCI_BASE_ADDRESS_MEM_TYPE_1M) {
- if (pci_mem_low < space) {
- puts("Out of PCI 1M space\n");
- }
- else {
- pci_mem_low -= space;
- pm->pci_addrs[j] = pci_mem_low;
- }
- }
- else {
- if (pci_mem_top < space) {
- puts("Out of PCI Mem space\n");
- }
- else {
- pci_mem_top -= space;
- pm->pci_addrs[j] = pci_mem_top;
- }
- }
- pm->pci_command |= PCI_COMMAND_MEMORY;
- }
- }
- }
- addr_mask >>= 1;
- addr_mask |= 0x80000000;
- } while (addr_mask != 0xfffffffe);
-
- /* Now, run the list one more time and map everything.
- */
- for (i=0; i<pci_dev_cnt; i++) {
- pm = &pci_map[i];
- for (j=0; j<6; j++) {
- qs_pci_write_config_dword(pm->pci_bus, pm->pci_devfn,
- PCI_BASE_ADDRESS_0 + (j * 4), pm->pci_addrs[j]);
- }
-
- /* Enable memory or address mapping.
- */
- qs_pci_write_config_word(pm->pci_bus, pm->pci_devfn, PCI_COMMAND,
- pm->pci_command);
- }
-}
-
diff --git a/arch/ppc/boot/simple/pibs.c b/arch/ppc/boot/simple/pibs.c
deleted file mode 100644
index f39d01e..0000000
--- a/arch/ppc/boot/simple/pibs.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * 2004-2005 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/ctype.h>
-#include <asm/ppcboot.h>
-#include <asm/ibm4xx.h>
-
-extern unsigned long decompress_kernel(unsigned long load_addr, int num_words,
- unsigned long cksum);
-
-/* We need to make sure that this is before the images to ensure
- * that it's in a mapped location. - Tom */
-bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot")));
-bd_t *hold_residual = &hold_resid_buf;
-
-/* String functions lifted from lib/vsprintf.c and lib/ctype.c */
-unsigned char _ctype[] = {
-_C,_C,_C,_C,_C,_C,_C,_C, /* 0-7 */
-_C,_C|_S,_C|_S,_C|_S,_C|_S,_C|_S,_C,_C, /* 8-15 */
-_C,_C,_C,_C,_C,_C,_C,_C, /* 16-23 */
-_C,_C,_C,_C,_C,_C,_C,_C, /* 24-31 */
-_S|_SP,_P,_P,_P,_P,_P,_P,_P, /* 32-39 */
-_P,_P,_P,_P,_P,_P,_P,_P, /* 40-47 */
-_D,_D,_D,_D,_D,_D,_D,_D, /* 48-55 */
-_D,_D,_P,_P,_P,_P,_P,_P, /* 56-63 */
-_P,_U|_X,_U|_X,_U|_X,_U|_X,_U|_X,_U|_X,_U, /* 64-71 */
-_U,_U,_U,_U,_U,_U,_U,_U, /* 72-79 */
-_U,_U,_U,_U,_U,_U,_U,_U, /* 80-87 */
-_U,_U,_U,_P,_P,_P,_P,_P, /* 88-95 */
-_P,_L|_X,_L|_X,_L|_X,_L|_X,_L|_X,_L|_X,_L, /* 96-103 */
-_L,_L,_L,_L,_L,_L,_L,_L, /* 104-111 */
-_L,_L,_L,_L,_L,_L,_L,_L, /* 112-119 */
-_L,_L,_L,_P,_P,_P,_P,_C, /* 120-127 */
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 128-143 */
-0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 144-159 */
-_S|_SP,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P, /* 160-175 */
-_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P,_P, /* 176-191 */
-_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U,_U, /* 192-207 */
-_U,_U,_U,_U,_U,_U,_U,_P,_U,_U,_U,_U,_U,_U,_U,_L, /* 208-223 */
-_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L,_L, /* 224-239 */
-_L,_L,_L,_L,_L,_L,_L,_P,_L,_L,_L,_L,_L,_L,_L,_L}; /* 240-255 */
-
-/**
- * simple_strtoull - convert a string to an unsigned long long
- * @cp: The start of the string
- * @endp: A pointer to the end of the parsed string will be placed here
- * @base: The number base to use
- */
-unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base)
-{
- unsigned long long result = 0,value;
-
- if (!base) {
- base = 10;
- if (*cp == '0') {
- base = 8;
- cp++;
- if ((toupper(*cp) == 'X') && isxdigit(cp[1])) {
- cp++;
- base = 16;
- }
- }
- } else if (base == 16) {
- if (cp[0] == '0' && toupper(cp[1]) == 'X')
- cp += 2;
- }
- while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp)
- ? toupper(*cp) : *cp)-'A'+10) < base) {
- result = result*base + value;
- cp++;
- }
- if (endp)
- *endp = (char *)cp;
- return result;
-}
-
-void *
-load_kernel(unsigned long load_addr, int num_words, unsigned long cksum,
- void *ign1, void *ign2)
-{
- unsigned long long mac64;
-
- decompress_kernel(load_addr, num_words, cksum);
-
- mac64 = simple_strtoull((char *)PIBS_MAC_BASE, 0, 16);
- memcpy(hold_residual->bi_enetaddr, (char *)&mac64+2, 6);
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP)
- mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET), 0, 16);
- memcpy(hold_residual->bi_enet1addr, (char *)&mac64+2, 6);
-#endif
-#ifdef CONFIG_440GX
- mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*2), 0, 16);
- memcpy(hold_residual->bi_enet2addr, (char *)&mac64+2, 6);
- mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*3), 0, 16);
- memcpy(hold_residual->bi_enet3addr, (char *)&mac64+2, 6);
-#endif
- return (void *)hold_residual;
-}
diff --git a/arch/ppc/boot/simple/prepmap.c b/arch/ppc/boot/simple/prepmap.c
deleted file mode 100644
index c871a4d..0000000
--- a/arch/ppc/boot/simple/prepmap.c
+++ /dev/null
@@ -1,12 +0,0 @@
-/*
- * 2004 (C) IBM. This file is licensed under the terms of the GNU General
- * Public License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <nonstdio.h>
-
-void board_isa_init(void)
-{
- ISA_init(0x80000000);
-}
diff --git a/arch/ppc/boot/simple/qspan_pci.c b/arch/ppc/boot/simple/qspan_pci.c
deleted file mode 100644
index d2966d0..0000000
--- a/arch/ppc/boot/simple/qspan_pci.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * LinuxPPC arch/ppc/kernel/qspan_pci.c Dan Malek (dmalek@jlc.net)
- *
- * QSpan Motorola bus to PCI bridge. The config address register
- * is located 0x500 from the base of the bridge control/status registers.
- * The data register is located at 0x504.
- * This is a two step operation. First, the address register is written,
- * then the data register is read/written as required.
- * I don't know what to do about interrupts (yet).
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <asm/mpc8xx.h>
-
-/*
- * When reading the configuration space, if something does not respond
- * the bus times out and we get a machine check interrupt. So, the
- * good ol' exception tables come to mind to trap it and return some
- * value.
- *
- * On an error we just return a -1, since that is what the caller wants
- * returned if nothing is present. I copied this from __get_user_asm,
- * with the only difference of returning -1 instead of EFAULT.
- * There is an associated hack in the machine check trap code.
- *
- * The QSPAN is also a big endian device, that is it makes the PCI
- * look big endian to us. This presents a problem for the Linux PCI
- * functions, which assume little endian. For example, we see the
- * first 32-bit word like this:
- * ------------------------
- * | Device ID | Vendor ID |
- * ------------------------
- * If we read/write as a double word, that's OK. But in our world,
- * when read as a word, device ID is at location 0, not location 2 as
- * the little endian PCI would believe. We have to switch bits in
- * the PCI addresses given to us to get the data to/from the correct
- * byte lanes.
- *
- * The QSPAN only supports 4 bits of "slot" in the dev_fn instead of 5.
- * It always forces the MS bit to zero. Therefore, dev_fn values
- * greater than 128 are returned as "no device found" errors.
- *
- * The QSPAN can only perform long word (32-bit) configuration cycles.
- * The "offset" must have the two LS bits set to zero. Read operations
- * require we read the entire word and then sort out what should be
- * returned. Write operations other than long word require that we
- * read the long word, update the proper word or byte, then write the
- * entire long word back.
- *
- * PCI Bridge hack. We assume (correctly) that bus 0 is the primary
- * PCI bus from the QSPAN. If we are called with a bus number other
- * than zero, we create a Type 1 configuration access that a downstream
- * PCI bridge will interpret.
- */
-
-#define __get_pci_config(x, addr, op) \
- __asm__ __volatile__( \
- "1: "op" %0,0(%1)\n" \
- " eieio\n" \
- "2:\n" \
- ".section .fixup,\"ax\"\n" \
- "3: li %0,-1\n" \
- " b 2b\n" \
- ".section __ex_table,\"a\"\n" \
- " .align 2\n" \
- " .long 1b,3b\n" \
- ".text" \
- : "=r"(x) : "r"(addr))
-
-#define QS_CONFIG_ADDR ((volatile uint *)(PCI_CSR_ADDR + 0x500))
-#define QS_CONFIG_DATA ((volatile uint *)(PCI_CSR_ADDR + 0x504))
-
-#define mk_config_addr(bus, dev, offset) \
- (((bus)<<16) | ((dev)<<8) | (offset & 0xfc))
-
-#define mk_config_type1(bus, dev, offset) \
- mk_config_addr(bus, dev, offset) | 1;
-
-/* Initialize the QSpan device registers after power up.
-*/
-void
-qspan_init(void)
-{
- uint *qptr;
-
-
-
- qptr = (uint *)PCI_CSR_ADDR;
-
- /* PCI Configuration/status. Upper bits written to clear
- * pending interrupt or status. Lower bits enable QSPAN as
- * PCI master, enable memory and I/O cycles, and enable PCI
- * parity error checking.
- * IMPORTANT: The last two bits of this word enable PCI
- * master cycles into the QBus. The QSpan is broken and can't
- * meet the timing specs of the PQ bus for this to work. Therefore,
- * if you don't have external bus arbitration, you can't use
- * this function.
- */
-#ifdef EXTERNAL_PQ_ARB
- qptr[1] = 0xf9000147;
-#else
- qptr[1] = 0xf9000144;
-#endif
-
- /* PCI Misc configuration. Set PCI latency timer resolution
- * of 8 cycles, set cache size to 4 x 32.
- */
- qptr[3] = 0;
-
- /* Set up PCI Target address mapping. Enable, Posted writes,
- * 2Gbyte space (processor memory controller determines actual size).
- */
- qptr[64] = 0x8f000080;
-
- /* Map processor 0x80000000 to PCI 0x00000000.
- * Processor address bit 1 determines I/O type access (0x80000000)
- * or memory type access (0xc0000000).
- */
- qptr[65] = 0x80000000;
-
- /* Enable error logging and clear any pending error status.
- */
- qptr[80] = 0x90000000;
-
- qptr[512] = 0x000c0003;
-
- /* Set up Qbus slave image.
- */
- qptr[960] = 0x01000000;
- qptr[961] = 0x000000d1;
- qptr[964] = 0x00000000;
- qptr[965] = 0x000000d1;
-
-}
-
-/* Functions to support PCI bios-like features to read/write configuration
- * space. If the function fails for any reason, a -1 (0xffffffff) value
- * must be returned.
- */
-#define DEVICE_NOT_FOUND (-1)
-#define SUCCESSFUL 0
-
-int qs_pci_read_config_byte(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned char *val)
-{
- uint temp;
- u_char *cp;
-
- if ((bus > 7) || (dev_fn > 127)) {
- *val = 0xff;
- return DEVICE_NOT_FOUND;
- }
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- __get_pci_config(temp, QS_CONFIG_DATA, "lwz");
-
- offset ^= 0x03;
- cp = ((u_char *)&temp) + (offset & 0x03);
- *val = *cp;
- return SUCCESSFUL;
-}
-
-int qs_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned short *val)
-{
- uint temp;
- ushort *sp;
-
- if ((bus > 7) || (dev_fn > 127)) {
- *val = 0xffff;
- return DEVICE_NOT_FOUND;
- }
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- __get_pci_config(temp, QS_CONFIG_DATA, "lwz");
- offset ^= 0x02;
-
- sp = ((ushort *)&temp) + ((offset >> 1) & 1);
- *val = *sp;
- return SUCCESSFUL;
-}
-
-int qs_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned int *val)
-{
- if ((bus > 7) || (dev_fn > 127)) {
- *val = 0xffffffff;
- return DEVICE_NOT_FOUND;
- }
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- __get_pci_config(*val, QS_CONFIG_DATA, "lwz");
- return SUCCESSFUL;
-}
-
-int qs_pci_write_config_byte(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned char val)
-{
- uint temp;
- u_char *cp;
-
- if ((bus > 7) || (dev_fn > 127))
- return DEVICE_NOT_FOUND;
-
- qs_pci_read_config_dword(bus, dev_fn, offset, &temp);
-
- offset ^= 0x03;
- cp = ((u_char *)&temp) + (offset & 0x03);
- *cp = val;
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- *QS_CONFIG_DATA = temp;
-
- return SUCCESSFUL;
-}
-
-int qs_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned short val)
-{
- uint temp;
- ushort *sp;
-
- if ((bus > 7) || (dev_fn > 127))
- return DEVICE_NOT_FOUND;
-
- qs_pci_read_config_dword(bus, dev_fn, offset, &temp);
-
- offset ^= 0x02;
- sp = ((ushort *)&temp) + ((offset >> 1) & 1);
- *sp = val;
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- *QS_CONFIG_DATA = temp;
-
- return SUCCESSFUL;
-}
-
-int qs_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned int val)
-{
- if ((bus > 7) || (dev_fn > 127))
- return DEVICE_NOT_FOUND;
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- *(unsigned int *)QS_CONFIG_DATA = val;
-
- return SUCCESSFUL;
-}
-
diff --git a/arch/ppc/boot/simple/relocate.S b/arch/ppc/boot/simple/relocate.S
deleted file mode 100644
index 1bbbcd2..0000000
--- a/arch/ppc/boot/simple/relocate.S
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * This is the common part of the loader relocation and initialization
- * process. All of the board/processor specific initialization is
- * done before we get here.
- *
- * Author: Tom Rini
- * trini@mvista.com
- * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others).
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <asm/cache.h>
-#include <asm/ppc_asm.h>
-
-#define GETSYM(reg, sym) \
- lis reg, sym@h; ori reg, reg, sym@l
-
- .text
- /* We get called from the early initialization code.
- * Register 3 has the address where we were loaded,
- * Register 4 contains any residual data passed from the
- * boot rom.
- */
- .globl relocate
-relocate:
- /* Save r3, r4 for later.
- * The r8/r11 are legacy registers so I don't have to
- * rewrite the code below :-).
- */
- mr r8, r3
- mr r11, r4
-
- /* compute the size of the whole image in words. */
- GETSYM(r4,start)
- GETSYM(r5,end)
-
- addi r5,r5,3 /* round up */
- sub r5,r5,r4 /* end - start */
- srwi r5,r5,2
- mr r7,r5 /* Save for later use. */
-
- /*
- * Check if we need to relocate ourselves to the link addr or were
- * we loaded there to begin with.
- */
- cmpw cr0,r3,r4
- beq start_ldr /* If 0, we don't need to relocate */
-
- /* Move this code somewhere safe. This is max(load + size, end)
- * r8 == load address
- */
- GETSYM(r4, start)
- GETSYM(r5, end)
-
- sub r6,r5,r4
- add r6,r8,r6 /* r6 == phys(load + size) */
-
- cmpw r5,r6
- bgt 1f
- b 2f
-1:
- mr r6, r5
-2:
- /* dest is in r6 */
- /* Ensure alignment --- this code is precautionary */
- addi r6,r6,4
- li r5,0x0003
- andc r6,r6,r5
-
- /* Find physical address and size of do_relocate */
- GETSYM(r5, __relocate_start)
- GETSYM(r4, __relocate_end)
- GETSYM(r3, start)
-
- /* Size to copy */
- sub r4,r4,r5
- srwi r4,r4,2
-
- /* Src addr to copy (= __relocate_start - start + where_loaded) */
- sub r3,r5,r3
- add r5,r8,r3
-
- /* Save dest */
- mr r3, r6
-
- /* Do the copy */
- mtctr r4
-3: lwz r4,0(r5)
- stw r4,0(r3)
- addi r3,r3,4
- addi r5,r5,4
- bdnz 3b
-
- GETSYM(r4, __relocate_start)
- GETSYM(r5, do_relocate)
-
- sub r4,r5,r4 /* Get entry point for do_relocate in */
- add r6,r6,r4 /* relocated section */
-
- /* This will return to the relocated do_relocate */
- mtlr r6
- b flush_instruction_cache
-
- .section ".relocate_code","xa"
-
-do_relocate:
- /* We have 2 cases --- start < load, or start > load
- * This determines whether we copy from the end, or the start.
- * Its easier to have 2 loops than to have paramaterised
- * loops. Sigh.
- */
- li r6,0 /* Clear checksum */
- mtctr r7 /* Setup for a loop */
-
- GETSYM(r4, start)
- mr r3,r8 /* Get the load addr */
-
- cmpw cr0,r4,r3 /* If we need to copy from the end, do so */
- bgt do_relocate_from_end
-
-do_relocate_from_start:
-1: lwz r5,0(r3) /* Load and decrement */
- stw r5,0(r4) /* Store and decrement */
- addi r3,r3,4
- addi r4,r4,4
- xor r6,r6,r5 /* Update checksum */
- bdnz 1b /* Are we done? */
- b do_relocate_out /* Finished */
-
-do_relocate_from_end:
- GETSYM(r3, end)
- slwi r4,r7,2
- add r4,r8,r4 /* Get the physical end */
-1: lwzu r5,-4(r4)
- stwu r5, -4(r3)
- xor r6,r6,r5
- bdnz 1b
-
-do_relocate_out:
- GETSYM(r3,start_ldr)
- mtlr r3 /* Easiest way to do an absolute jump */
-/* Some boards don't boot up with the I-cache enabled. Do that
- * now because the decompress runs much faster that way.
- * As a side effect, we have to ensure the data cache is not enabled
- * so we can access the serial I/O without trouble.
- */
- b flush_instruction_cache
-
- .previous
-
-start_ldr:
-/* Clear all of BSS and set up stack for C calls */
- lis r3,__bss_start@h
- ori r3,r3,__bss_start@l
- lis r4,end@h
- ori r4,r4,end@l
- subi r3,r3,4
- subi r4,r4,4
- li r0,0
-50: stwu r0,4(r3)
- cmpw cr0,r3,r4
- blt 50b
-90: mr r9,r1 /* Save old stack pointer (in case it matters) */
- lis r1,.stack@h
- ori r1,r1,.stack@l
- addi r1,r1,4096*2
- subi r1,r1,256
- li r2,0x000F /* Mask pointer to 16-byte boundary */
- andc r1,r1,r2
-
- /*
- * Exec kernel loader
- */
- mr r3,r8 /* Load point */
- mr r4,r7 /* Program length */
- mr r5,r6 /* Checksum */
- mr r6,r11 /* Residual data */
- mr r7,r25 /* Validated OFW interface */
- bl load_kernel
-
- /*
- * Make sure the kernel knows we don't have things set in
- * registers. -- Tom
- */
- li r4,0
- li r5,0
- li r6,0
-
- /*
- * Start at the begining.
- */
-#ifdef CONFIG_PPC_PREP
- li r9,0xc
- mtlr r9
- /* tell kernel we're prep, by putting 0xdeadc0de at KERNELLOAD,
- * and tell the kernel to start on the 4th instruction since we
- * overwrite the first 3 sometimes (which are 'nop').
- */
- lis r10,0xdeadc0de@h
- ori r10,r10,0xdeadc0de@l
- li r9,0
- stw r10,0(r9)
-#else
- li r9,0
- mtlr r9
-#endif
- blr
-
- .comm .stack,4096*2,4
diff --git a/arch/ppc/boot/simple/rw4/ppc_40x.h b/arch/ppc/boot/simple/rw4/ppc_40x.h
deleted file mode 100644
index 561fb26..0000000
--- a/arch/ppc/boot/simple/rw4/ppc_40x.h
+++ /dev/null
@@ -1,664 +0,0 @@
-/*----------------------------------------------------------------------------+
-| This source code has been made available to you by IBM on an AS-IS
-| basis. Anyone receiving this source is licensed under IBM
-| copyrights to use it in any way he or she deems fit, including
-| copying it, modifying it, compiling it, and redistributing it either
-| with or without modifications. No license under IBM patents or
-| patent applications is to be implied by the copyright license.
-|
-| Any user of this software should understand that IBM cannot provide
-| technical support for this software and will not be responsible for
-| any consequences resulting from the use of this software.
-|
-| Any person who transfers this source code or any derivative work
-| must include the IBM copyright notice, this paragraph, and the
-| preceding two paragraphs in the transferred software.
-|
-| COPYRIGHT I B M CORPORATION 1997
-| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
-+----------------------------------------------------------------------------*/
-/*----------------------------------------------------------------------------+
-| Author: Tony J. Cerreto
-| Component: Assembler include file.
-| File: ppc_40x.h
-| Purpose: Include file containing PPC DCR defines.
-|
-| Changes:
-| Date Author Comment
-| --------- ------ --------------------------------------------------------
-| 01-Mar-00 tjc Created
-+----------------------------------------------------------------------------*/
-/* added by linguohui*/
-#define MW
-/*----------------------------------------------------------------------------+
-| PPC Special purpose registers Numbers
-+----------------------------------------------------------------------------*/
-#define ccr0 0x3b3 /* core configuration reg */
-#define ctr 0x009 /* count register */
-#define ctrreg 0x009 /* count register */
-#define dbcr0 0x3f2 /* debug control register 0 */
-#define dbcr1 0x3bd /* debug control register 1 */
-#define dbsr 0x3f0 /* debug status register */
-#define dccr 0x3fa /* data cache control reg. */
-#define dcwr 0x3ba /* data cache write-thru reg */
-#define dear 0x3d5 /* data exception address reg */
-#define esr 0x3d4 /* exception syndrome register */
-#define evpr 0x3d6 /* exception vector prefix reg */
-#define iccr 0x3fb /* instruction cache cntrl re */
-#define icdbdr 0x3d3 /* instr cache dbug data reg */
-#define lrreg 0x008 /* link register */
-#define pid 0x3b1 /* process id reg */
-#define pit 0x3db /* programmable interval time */
-#define pvr 0x11f /* processor version register */
-#define sgr 0x3b9 /* storage guarded reg */
-#define sler 0x3bb /* storage little endian reg */
-#define sprg0 0x110 /* special general purpose 0 */
-#define sprg1 0x111 /* special general purpose 1 */
-#define sprg2 0x112 /* special general purpose 2 */
-#define sprg3 0x113 /* special general purpose 3 */
-#define sprg4 0x114 /* special general purpose 4 */
-#define sprg5 0x115 /* special general purpose 5 */
-#define sprg6 0x116 /* special general purpose 6 */
-#define sprg7 0x117 /* special general purpose 7 */
-#define srr0 0x01a /* save/restore register 0 */
-#define srr1 0x01b /* save/restore register 1 */
-#define srr2 0x3de /* save/restore register 2 */
-#define srr3 0x3df /* save/restore register 3 */
-#define tbhi 0x11D
-#define tblo 0x11C
-#define tcr 0x3da /* timer control register */
-#define tsr 0x3d8 /* timer status register */
-#define xerreg 0x001 /* fixed point exception */
-#define xer 0x001 /* fixed point exception */
-#define zpr 0x3b0 /* zone protection reg */
-
-/*----------------------------------------------------------------------------+
-| Decompression Controller
-+----------------------------------------------------------------------------*/
-#define kiar 0x014 /* Decompression cntl addr reg */
-#define kidr 0x015 /* Decompression cntl data reg */
-#define kitor0 0x00 /* index table origin Reg 0 */
-#define kitor1 0x01 /* index table origin Reg 1 */
-#define kitor2 0x02 /* index table origin Reg 2 */
-#define kitor3 0x03 /* index table origin Reg 3 */
-#define kaddr0 0x04 /* addr decode Definition Reg 0 */
-#define kaddr1 0x05 /* addr decode Definition Reg 1 */
-#define kconf 0x40 /* Decompression cntl config reg */
-#define kid 0x41 /* Decompression cntl id reg */
-#define kver 0x42 /* Decompression cntl ver number */
-#define kpear 0x50 /* bus error addr reg (PLB) */
-#define kbear 0x51 /* bus error addr reg (DCP-EBC) */
-#define kesr0 0x52 /* bus error status reg 0 */
-
-/*----------------------------------------------------------------------------+
-| Romeo Specific Device Control Register Numbers.
-+----------------------------------------------------------------------------*/
-#ifndef VESTA
-#define cdbcr 0x3d7 /* cache debug cntrl reg */
-
-#define a_latcnt 0x1a9 /* PLB Latency count */
-#define a_tgval 0x1ac /* tone generation value */
-#define a_plb_pr 0x1bf /* PLB priority */
-
-#define cic_sel1 0x031 /* select register 1 */
-#define cic_sel2 0x032 /* select register 2 */
-
-#define clkgcrst 0x122 /* chip reset register */
-
-#define cp_cpmsr 0x100 /*rstatus register */
-#define cp_cpmer 0x101 /* enable register */
-
-#define dcp_kiar 0x190 /* indirect address register */
-#define dcp_kidr 0x191 /* indirect data register */
-
-#define hsmc_mcgr 0x1c0 /* HSMC global register */
-#define hsmc_mcbesr 0x1c1 /* bus error status register */
-#define hsmc_mcbear 0x1c2 /* bus error address register*/
-#define hsmc_mcbr0 0x1c4 /* SDRAM sub-ctrl bank reg 0 */
-#define hsmc_mccr0 0x1c5 /* SDRAM sub-ctrl ctrl reg 0 */
-#define hsmc_mcbr1 0x1c7 /* SDRAM sub-ctrl bank reg 1 */
-#define hsmc_mccr1 0x1c8 /* SDRAM sub-ctrl ctrl reg 1 */
-#define hsmc_sysr 0x1d1 /* system register */
-#define hsmc_data 0x1d2 /* data register */
-#define hsmc_mccrr 0x1d3 /* refresh register */
-
-#define ocm_pbar 0x1E0 /* base address register */
-
-#define plb0_pacr0 0x057 /* PLB arbiter control reg */
-#define plb1_pacr1 0x067 /* PLB arbiter control reg */
-
-#define v_displb 0x157 /* set left border of display*/
-#define v_disptb 0x158 /* top border of display */
-#define v_osd_la 0x159 /* first link address for OSD*/
-#define v_ptsdlta 0x15E /* PTS delta register */
-#define v_v0base 0x16C /* base mem add for VBI-0 */
-#define v_v1base 0x16D /* base mem add for VBI-1 */
-#define v_osbase 0x16E /* base mem add for OSD data */
-#endif
-
-/*----------------------------------------------------------------------------+
-| Vesta Device Control Register Numbers.
-+----------------------------------------------------------------------------*/
-/*----------------------------------------------------------------------------+
-| Cross bar switch.
-+----------------------------------------------------------------------------*/
-#define cbs0_cr 0x010 /* CBS configuration register */
-
-/*----------------------------------------------------------------------------+
-| DCR external master (DCRX).
-+----------------------------------------------------------------------------*/
-#define dcrx0_icr 0x020 /* internal control register */
-#define dcrx0_isr 0x021 /* internal status register */
-#define dcrx0_ecr 0x022 /* external control register */
-#define dcrx0_esr 0x023 /* external status register */
-#define dcrx0_tar 0x024 /* target address register */
-#define dcrx0_tdr 0x025 /* target data register */
-#define dcrx0_igr 0x026 /* interrupt generation register */
-#define dcrx0_bcr 0x027 /* buffer control register */
-
-/*----------------------------------------------------------------------------+
-| Chip interconnect configuration.
-+----------------------------------------------------------------------------*/
-#define cic0_cr 0x030 /* CIC control register */
-#define cic0_vcr 0x033 /* video macro control reg */
-#define cic0_sel3 0x035 /* select register 3 */
-
-/*----------------------------------------------------------------------------+
-| Chip interconnect configuration.
-+----------------------------------------------------------------------------*/
-#define sgpo0_sgpO 0x036 /* simplified GPIO output */
-#define sgpo0_gpod 0x037 /* simplified GPIO open drain */
-#define sgpo0_gptc 0x038 /* simplified GPIO tristate cntl */
-#define sgpo0_gpi 0x039 /* simplified GPIO input */
-
-/*----------------------------------------------------------------------------+
-| Universal interrupt controller.
-+----------------------------------------------------------------------------*/
-#define uic0_sr 0x040 /* status register */
-#define uic0_srs 0x041 /* status register set */
-#define uic0_er 0x042 /* enable register */
-#define uic0_cr 0x043 /* critical register */
-#define uic0_pr 0x044 /* parity register */
-#define uic0_tr 0x045 /* triggering register */
-#define uic0_msr 0x046 /* masked status register */
-#define uic0_vr 0x047 /* vector register */
-#define uic0_vcr 0x048 /* enable config register */
-
-/*----------------------------------------------------------------------------+
-| PLB 0 and 1.
-+----------------------------------------------------------------------------*/
-#define pb0_pesr 0x054 /* PLB error status reg 0 */
-#define pb0_pesrs 0x055 /* PLB error status reg 0 set */
-#define pb0_pear 0x056 /* PLB error address reg */
-
-#define pb1_pesr 0x064 /* PLB error status reg 1 */
-#define pb1_pesrs 0x065 /* PLB error status reg 1 set */
-#define pb1_pear 0x066 /* PLB error address reg */
-
-/*----------------------------------------------------------------------------+
-| EBIU DCR registers.
-+----------------------------------------------------------------------------*/
-#define ebiu0_brcrh0 0x070 /* bus region register 0 high */
-#define ebiu0_brcrh1 0x071 /* bus region register 1 high */
-#define ebiu0_brcrh2 0x072 /* bus region register 2 high */
-#define ebiu0_brcrh3 0x073 /* bus region register 3 high */
-#define ebiu0_brcrh4 0x074 /* bus region register 4 high */
-#define ebiu0_brcrh5 0x075 /* bus region register 5 high */
-#define ebiu0_brcrh6 0x076 /* bus region register 6 high */
-#define ebiu0_brcrh7 0x077 /* bus region register 7 high */
-#define ebiu0_brcr0 0x080 /* bus region register 0 */
-#define ebiu0_brcr1 0x081 /* bus region register 1 */
-#define ebiu0_brcr2 0x082 /* bus region register 2 */
-#define ebiu0_brcr3 0x083 /* bus region register 3 */
-#define ebiu0_brcr4 0x084 /* bus region register 4 */
-#define ebiu0_brcr5 0x085 /* bus region register 5 */
-#define ebiu0_brcr6 0x086 /* bus region register 6 */
-#define ebiu0_brcr7 0x087 /* bus region register 7 */
-#define ebiu0_bear 0x090 /* bus error address register */
-#define ebiu0_besr 0x091 /* bus error syndrome reg */
-#define ebiu0_besr0s 0x093 /* bus error syndrome reg */
-#define ebiu0_biucr 0x09a /* bus interface control reg */
-
-/*----------------------------------------------------------------------------+
-| OPB bridge.
-+----------------------------------------------------------------------------*/
-#define opbw0_gesr 0x0b0 /* error status reg */
-#define opbw0_gesrs 0x0b1 /* error status reg */
-#define opbw0_gear 0x0b2 /* error address reg */
-
-/*----------------------------------------------------------------------------+
-| DMA.
-+----------------------------------------------------------------------------*/
-#define dma0_cr0 0x0c0 /* DMA channel control reg 0 */
-#define dma0_ct0 0x0c1 /* DMA count register 0 */
-#define dma0_da0 0x0c2 /* DMA destination addr reg 0 */
-#define dma0_sa0 0x0c3 /* DMA source addr register 0 */
-#define dma0_cc0 0x0c4 /* DMA chained count 0 */
-#define dma0_cr1 0x0c8 /* DMA channel control reg 1 */
-#define dma0_ct1 0x0c9 /* DMA count register 1 */
-#define dma0_da1 0x0ca /* DMA destination addr reg 1 */
-#define dma0_sa1 0x0cb /* DMA source addr register 1 */
-#define dma0_cc1 0x0cc /* DMA chained count 1 */
-#define dma0_cr2 0x0d0 /* DMA channel control reg 2 */
-#define dma0_ct2 0x0d1 /* DMA count register 2 */
-#define dma0_da2 0x0d2 /* DMA destination addr reg 2 */
-#define dma0_sa2 0x0d3 /* DMA source addr register 2 */
-#define dma0_cc2 0x0d4 /* DMA chained count 2 */
-#define dma0_cr3 0x0d8 /* DMA channel control reg 3 */
-#define dma0_ct3 0x0d9 /* DMA count register 3 */
-#define dma0_da3 0x0da /* DMA destination addr reg 3 */
-#define dma0_sa3 0x0db /* DMA source addr register 3 */
-#define dma0_cc3 0x0dc /* DMA chained count 3 */
-#define dma0_sr 0x0e0 /* DMA status register */
-#define dma0_srs 0x0e1 /* DMA status register */
-#define dma0_s1 0x031 /* DMA select1 register */
-#define dma0_s2 0x032 /* DMA select2 register */
-
-/*---------------------------------------------------------------------------+
-| Clock and power management.
-+----------------------------------------------------------------------------*/
-#define cpm0_fr 0x102 /* force register */
-
-/*----------------------------------------------------------------------------+
-| Serial Clock Control.
-+----------------------------------------------------------------------------*/
-#define ser0_ccr 0x120 /* serial clock control register */
-
-/*----------------------------------------------------------------------------+
-| Audio Clock Control.
-+----------------------------------------------------------------------------*/
-#define aud0_apcr 0x121 /* audio clock ctrl register */
-
-/*----------------------------------------------------------------------------+
-| DENC.
-+----------------------------------------------------------------------------*/
-#define denc0_idr 0x130 /* DENC ID register */
-#define denc0_cr1 0x131 /* control register 1 */
-#define denc0_rr1 0x132 /* microvision 1 (reserved 1) */
-#define denc0_cr2 0x133 /* control register 2 */
-#define denc0_rr2 0x134 /* microvision 2 (reserved 2) */
-#define denc0_rr3 0x135 /* microvision 3 (reserved 3) */
-#define denc0_rr4 0x136 /* microvision 4 (reserved 4) */
-#define denc0_rr5 0x137 /* microvision 5 (reserved 5) */
-#define denc0_ccdr 0x138 /* closed caption data */
-#define denc0_cccr 0x139 /* closed caption control */
-#define denc0_trr 0x13A /* teletext request register */
-#define denc0_tosr 0x13B /* teletext odd field line se */
-#define denc0_tesr 0x13C /* teletext even field line s */
-#define denc0_rlsr 0x13D /* RGB rhift left register */
-#define denc0_vlsr 0x13E /* video level shift register */
-#define denc0_vsr 0x13F /* video scaling register */
-
-/*----------------------------------------------------------------------------+
-| Video decoder. Suspect 0x179, 0x169, 0x16a, 0x152 (rc).
-+----------------------------------------------------------------------------*/
-#define vid0_ccntl 0x140 /* control decoder operation */
-#define vid0_cmode 0x141 /* video operational mode */
-#define vid0_sstc0 0x142 /* STC high order bits 31:0 */
-#define vid0_sstc1 0x143 /* STC low order bit 32 */
-#define vid0_spts0 0x144 /* PTS high order bits 31:0 */
-#define vid0_spts1 0x145 /* PTS low order bit 32 */
-#define vid0_fifo 0x146 /* FIFO data port */
-#define vid0_fifos 0x147 /* FIFO status */
-#define vid0_cmd 0x148 /* send command to decoder */
-#define vid0_cmdd 0x149 /* port for command params */
-#define vid0_cmdst 0x14A /* command status */
-#define vid0_cmdad 0x14B /* command address */
-#define vid0_procia 0x14C /* instruction store */
-#define vid0_procid 0x14D /* data port for I_Store */
-#define vid0_osdm 0x151 /* OSD mode control */
-#define vid0_hosti 0x152 /* base interrupt register */
-#define vid0_mask 0x153 /* interrupt mask register */
-#define vid0_dispm 0x154 /* operational mode for Disp */
-#define vid0_dispd 0x155 /* setting for 'Sync' delay */
-#define vid0_vbctl 0x156 /* VBI */
-#define vid0_ttxctl 0x157 /* teletext control */
-#define vid0_disptb 0x158 /* display left/top border */
-#define vid0_osdgla 0x159 /* Graphics plane link addr */
-#define vid0_osdila 0x15A /* Image plane link addr */
-#define vid0_rbthr 0x15B /* rate buffer threshold */
-#define vid0_osdcla 0x15C /* Cursor link addr */
-#define vid0_stcca 0x15D /* STC common address */
-#define vid0_ptsctl 0x15F /* PTS Control */
-#define vid0_wprot 0x165 /* write protect for I_Store */
-#define vid0_vcqa 0x167 /* video clip queued block Ad */
-#define vid0_vcql 0x168 /* video clip queued block Le */
-#define vid0_blksz 0x169 /* block size bytes for copy op */
-#define vid0_srcad 0x16a /* copy source address bits 6-31 */
-#define vid0_udbas 0x16B /* base mem add for user data */
-#define vid0_vbibas 0x16C /* base mem add for VBI 0/1 */
-#define vid0_osdibas 0x16D /* Image plane base address */
-#define vid0_osdgbas 0x16E /* Graphic plane base address */
-#define vid0_rbbase 0x16F /* base mem add for video buf */
-#define vid0_dramad 0x170 /* DRAM address */
-#define vid0_dramdt 0x171 /* data port for DRAM access */
-#define vid0_dramcs 0x172 /* DRAM command and statusa */
-#define vid0_vcwa 0x173 /* v clip work address */
-#define vid0_vcwl 0x174 /* v clip work length */
-#define vid0_mseg0 0x175 /* segment address 0 */
-#define vid0_mseg1 0x176 /* segment address 1 */
-#define vid0_mseg2 0x177 /* segment address 2 */
-#define vid0_mseg3 0x178 /* segment address 3 */
-#define vid0_fbbase 0x179 /* frame buffer base memory */
-#define vid0_osdcbas 0x17A /* Cursor base addr */
-#define vid0_lboxtb 0x17B /* top left border */
-#define vid0_trdly 0x17C /* transparency gate delay */
-#define vid0_sbord 0x17D /* left/top small pict. bord. */
-#define vid0_zoffs 0x17E /* hor/ver zoom window */
-#define vid0_rbsz 0x17F /* rate buffer size read */
-
-/*----------------------------------------------------------------------------+
-| Transport demultiplexer.
-+----------------------------------------------------------------------------*/
-#define xpt0_lr 0x180 /* demux location register */
-#define xpt0_data 0x181 /* demux data register */
-#define xpt0_ir 0x182 /* demux interrupt register */
-
-#define xpt0_config1 0x0000 /* configuration 1 */
-#define xpt0_control1 0x0001 /* control 1 */
-#define xpt0_festat 0x0002 /* Front-end status */
-#define xpt0_feimask 0x0003 /* Front_end interrupt Mask */
-#define xpt0_ocmcnfg 0x0004 /* OCM Address */
-#define xpt0_settapi 0x0005 /* Set TAP Interrupt */
-
-#define xpt0_pcrhi 0x0010 /* PCR High */
-#define xpt0_pcrlow 0x0011 /* PCR Low */
-#define xpt0_lstchi 0x0012 /* Latched STC High */
-#define xpt0_lstclow 0x0013 /* Latched STC Low */
-#define xpt0_stchi 0x0014 /* STC High */
-#define xpt0_stclow 0x0015 /* STC Low */
-#define xpt0_pwm 0x0016 /* PWM */
-#define xpt0_pcrstct 0x0017 /* PCR-STC Threshold */
-#define xpt0_pcrstcd 0x0018 /* PCR-STC Delta */
-#define xpt0_stccomp 0x0019 /* STC Compare */
-#define xpt0_stccmpd 0x001a /* STC Compare Disarm */
-
-#define xpt0_dsstat 0x0048 /* Descrambler Status */
-#define xpt0_dsimask 0x0049 /* Descrambler Interrupt Mask */
-
-#define xpt0_vcchng 0x01f0 /* Video Channel Change */
-#define xpt0_acchng 0x01f1 /* Audio Channel Change */
-#define xpt0_axenable 0x01fe /* Aux PID Enables */
-#define xpt0_pcrpid 0x01ff /* PCR PID */
-
-#define xpt0_config2 0x1000 /* Configuration 2 */
-#define xpt0_pbuflvl 0x1002 /* Packet Buffer Level */
-#define xpt0_intmask 0x1003 /* Interrupt Mask */
-#define xpt0_plbcnfg 0x1004 /* PLB Configuration */
-
-#define xpt0_qint 0x1010 /* Queues Interrupts */
-#define xpt0_qintmsk 0x1011 /* Queues Interrupts Mask */
-#define xpt0_astatus 0x1012 /* Audio Status */
-#define xpt0_aintmask 0x1013 /* Audio Interrupt Mask */
-#define xpt0_vstatus 0x1014 /* Video Status */
-#define xpt0_vintmask 0x1015 /* Video Interrupt Mask */
-
-#define xpt0_qbase 0x1020 /* Queue Base */
-#define xpt0_bucketq 0x1021 /* Bucket Queue */
-#define xpt0_qstops 0x1024 /* Queue Stops */
-#define xpt0_qresets 0x1025 /* Queue Resets */
-#define xpt0_sfchng 0x1026 /* Section Filter Change */
-
-/*----------------------------------------------------------------------------+
-| Audio decoder. Suspect 0x1ad, 0x1b4, 0x1a3, 0x1a5 (read/write status)
-+----------------------------------------------------------------------------*/
-#define aud0_ctrl0 0x1a0 /* control 0 */
-#define aud0_ctrl1 0x1a1 /* control 1 */
-#define aud0_ctrl2 0x1a2 /* control 2 */
-#define aud0_cmd 0x1a3 /* command register */
-#define aud0_isr 0x1a4 /* interrupt status register */
-#define aud0_imr 0x1a5 /* interrupt mask register */
-#define aud0_dsr 0x1a6 /* decoder status register */
-#define aud0_stc 0x1a7 /* system time clock */
-#define aud0_csr 0x1a8 /* channel status register */
-#define aud0_lcnt 0x1a9 /* queued address register 2 */
-#define aud0_pts 0x1aa /* presentation time stamp */
-#define aud0_tgctrl 0x1ab /* tone generation control */
-#define aud0_qlr2 0x1ac /* queued length register 2 */
-#define aud0_auxd 0x1ad /* aux data */
-#define aud0_strmid 0x1ae /* stream ID */
-#define aud0_qar 0x1af /* queued address register */
-#define aud0_dsps 0x1b0 /* DSP status */
-#define aud0_qlr 0x1b1 /* queued len address */
-#define aud0_dspc 0x1b2 /* DSP control */
-#define aud0_wlr2 0x1b3 /* working length register 2 */
-#define aud0_instd 0x1b4 /* instruction download */
-#define aud0_war 0x1b5 /* working address register */
-#define aud0_seg1 0x1b6 /* segment 1 base register */
-#define aud0_seg2 0x1b7 /* segment 2 base register */
-#define aud0_avf 0x1b9 /* audio att value front */
-#define aud0_avr 0x1ba /* audio att value rear */
-#define aud0_avc 0x1bb /* audio att value center */
-#define aud0_seg3 0x1bc /* segment 3 base register */
-#define aud0_offset 0x1bd /* offset address */
-#define aud0_wrl 0x1be /* working length register */
-#define aud0_war2 0x1bf /* working address register 2 */
-
-/*----------------------------------------------------------------------------+
-| High speed memory controller 0 and 1.
-+----------------------------------------------------------------------------*/
-#define hsmc0_gr 0x1e0 /* HSMC global register */
-#define hsmc0_besr 0x1e1 /* bus error status register */
-#define hsmc0_bear 0x1e2 /* bus error address register */
-#define hsmc0_br0 0x1e4 /* SDRAM sub-ctrl bank reg 0 */
-#define hsmc0_cr0 0x1e5 /* SDRAM sub-ctrl ctrl reg 0 */
-#define hsmc0_br1 0x1e7 /* SDRAM sub-ctrl bank reg 1 */
-#define hsmc0_cr1 0x1e8 /* SDRAM sub-ctrl ctrl reg 1 */
-#define hsmc0_sysr 0x1f1 /* system register */
-#define hsmc0_data 0x1f2 /* data register */
-#define hsmc0_crr 0x1f3 /* refresh register */
-
-#define hsmc1_gr 0x1c0 /* HSMC global register */
-#define hsmc1_besr 0x1c1 /* bus error status register */
-#define hsmc1_bear 0x1c2 /* bus error address register */
-#define hsmc1_br0 0x1c4 /* SDRAM sub-ctrl bank reg 0 */
-#define hsmc1_cr0 0x1c5 /* SDRAM sub-ctrl ctrl reg 0 */
-#define hsmc1_br1 0x1c7 /* SDRAM sub-ctrl bank reg 1 */
-#define hsmc1_cr1 0x1c8 /* SDRAM sub-ctrl ctrl reg 1 */
-#define hsmc1_sysr 0x1d1 /* system register */
-#define hsmc1_data 0x1d2 /* data register */
-#define hsmc1_crr 0x1d3 /* refresh register */
-
-/*----------------------------------------------------------------------------+
-| Machine State Register bit definitions.
-+----------------------------------------------------------------------------*/
-#define msr_ape 0x00100000
-#define msr_apa 0x00080000
-#define msr_we 0x00040000
-#define msr_ce 0x00020000
-#define msr_ile 0x00010000
-#define msr_ee 0x00008000
-#define msr_pr 0x00004000
-#define msr_me 0x00001000
-#define msr_de 0x00000200
-#define msr_ir 0x00000020
-#define msr_dr 0x00000010
-#define msr_le 0x00000001
-
-/*----------------------------------------------------------------------------+
-| Used during interrupt processing.
-+----------------------------------------------------------------------------*/
-#define stack_reg_image_size 160
-
-/*----------------------------------------------------------------------------+
-| Function prolog definition and other Metaware (EABI) defines.
-+----------------------------------------------------------------------------*/
-#ifdef MW
-
-#define r0 0
-#define r1 1
-#define r2 2
-#define r3 3
-#define r4 4
-#define r5 5
-#define r6 6
-#define r7 7
-#define r8 8
-#define r9 9
-#define r10 10
-#define r11 11
-#define r12 12
-#define r13 13
-#define r14 14
-#define r15 15
-#define r16 16
-#define r17 17
-#define r18 18
-#define r19 19
-#define r20 20
-#define r21 21
-#define r22 22
-#define r23 23
-#define r24 24
-#define r25 25
-#define r26 26
-#define r27 27
-#define r28 28
-#define r29 29
-#define r30 30
-#define r31 31
-
-#define cr0 0
-#define cr1 1
-#define cr2 2
-#define cr3 3
-#define cr4 4
-#define cr5 5
-#define cr6 6
-#define cr7 7
-
-#define function_prolog(func_name) .text; \
- .align 2; \
- .globl func_name; \
- func_name:
-#define function_epilog(func_name) .type func_name,@function; \
- .size func_name,.-func_name
-
-#define function_call(func_name) bl func_name
-
-#define stack_frame_min 8
-#define stack_frame_bc 0
-#define stack_frame_lr 4
-#define stack_neg_off 0
-
-#endif
-
-/*----------------------------------------------------------------------------+
-| Function prolog definition and other DIAB (Elf) defines.
-+----------------------------------------------------------------------------*/
-#ifdef ELF_DIAB
-
-fprolog: macro f_name
- .text
- .align 2
- .globl f_name
-f_name:
- endm
-
-fepilog: macro f_name
- .type f_name,@function
- .size f_name,.-f_name
- endm
-
-#define function_prolog(func_name) fprolog func_name
-#define function_epilog(func_name) fepilog func_name
-#define function_call(func_name) bl func_name
-
-#define stack_frame_min 8
-#define stack_frame_bc 0
-#define stack_frame_lr 4
-#define stack_neg_off 0
-
-#endif
-
-/*----------------------------------------------------------------------------+
-| Function prolog definition and other Xlc (XCOFF) defines.
-+----------------------------------------------------------------------------*/
-#ifdef XCOFF
-
-.machine "403ga"
-
-#define r0 0
-#define r1 1
-#define r2 2
-#define r3 3
-#define r4 4
-#define r5 5
-#define r6 6
-#define r7 7
-#define r8 8
-#define r9 9
-#define r10 10
-#define r11 11
-#define r12 12
-#define r13 13
-#define r14 14
-#define r15 15
-#define r16 16
-#define r17 17
-#define r18 18
-#define r19 19
-#define r20 20
-#define r21 21
-#define r22 22
-#define r23 23
-#define r24 24
-#define r25 25
-#define r26 26
-#define r27 27
-#define r28 28
-#define r29 29
-#define r30 30
-#define r31 31
-
-#define cr0 0
-#define cr1 1
-#define cr2 2
-#define cr3 3
-#define cr4 4
-#define cr5 5
-#define cr6 6
-#define cr7 7
-
-#define function_prolog(func_name) .csect .func_name[PR]; \
- .globl .func_name[PR]; \
- func_name:
-
-#define function_epilog(func_name) .toc; \
- .csect func_name[DS]; \
- .globl func_name[DS]; \
- .long .func_name[PR]; \
- .long TOC[tc0]
-
-#define function_call(func_name) .extern .func_name[PR]; \
- stw r2,stack_frame_toc(r1); \
- mfspr r2,sprg0; \
- bl .func_name[PR]; \
- lwz r2,stack_frame_toc(r1)
-
-#define stack_frame_min 56
-#define stack_frame_bc 0
-#define stack_frame_lr 8
-#define stack_frame_toc 20
-#define stack_neg_off 276
-
-#endif
-#define function_prolog(func_name) .text; \
- .align 2; \
- .globl func_name; \
- func_name:
-#define function_epilog(func_name) .type func_name,@function; \
- .size func_name,.-func_name
-
-#define function_call(func_name) bl func_name
-
-/*----------------------------------------------------------------------------+
-| Function prolog definition for GNU
-+----------------------------------------------------------------------------*/
-#ifdef _GNU_TOOL
-
-#define function_prolog(func_name) .globl func_name; \
- func_name:
-#define function_epilog(func_name)
-
-#endif
diff --git a/arch/ppc/boot/simple/rw4/rw4_init.S b/arch/ppc/boot/simple/rw4/rw4_init.S
deleted file mode 100644
index b106196..0000000
--- a/arch/ppc/boot/simple/rw4/rw4_init.S
+++ /dev/null
@@ -1,78 +0,0 @@
-#define VESTA
-#include "ppc_40x.h"
-#
- .align 2
- .text
-#
-# added by linguohui
- .extern initb_ebiu0, initb_config, hdw_init_finish
- .extern initb_hsmc0, initb_hsmc1, initb_cache
-# end added
- .globl HdwInit
-#
-HdwInit:
-#
-#-----------------------------------------------------------------------*
-# If we are not executing from the FLASH get out *
-#-----------------------------------------------------------------------*
-# SAW keep this or comment out a la Hawthorne?
-# r3 contains NIP when used with Linux
-# rlwinm r28, r3, 8, 24, 31 # if MSB == 0xFF -> FLASH address
-# cmpwi r28, 0xff
-# bne locn01
-#
-#
-#------------------------------------------------------------------------
-# Init_cpu. Bank registers are setup for the IBM STB.
-#------------------------------------------------------------------------
-#
-# Setup processor core clock to be driven off chip. This is GPI4 bit
-# twenty. Setup Open Drain, Output Select, Three-State Control, and
-# Three-State Select registers.
-#
-
-
- pb0pesr = 0x054
- pb0pear = 0x056
-
- mflr r30
-
-#-----------------------------------------------------------------------------
-# Vectors will be at 0x1F000000
-# Dummy Machine check handler just does RFI before true handler gets installed
-#-----------------------------------------------------------------------------
-#if 1 /* xuwentao added*/
-#ifdef SDRAM16MB
- lis r10,0x0000
- addi r10,r10,0x0000
-#else
- lis r10,0x1F00
- addi r10,r10,0x0000
-#endif
-
- mtspr evpr,r10 #EVPR: 0x0 or 0x1f000000 depending
- isync # on SDRAM memory model used.
-
- lis r10,0xFFFF # clear PB0_PESR because some
- ori r10,r10,0xFFFF # transitions from flash,changed by linguohui
- mtdcr pb0pesr,r10 # to load RAM image via RiscWatch
- lis r10,0x0000 # cause PB0_PESR machine checks
- mtdcr pb0pear,r10
- addis r10,r10,0x0000 # clear the
- mtxer r10 # XER just in case...
-#endif /* xuwentao*/
-
- bl initb_ebiu0 # init EBIU
-
- bl initb_config # config PPC and board
-
-
-
-
-#------------------------------------------------------------------------
-# EVPR setup moved to top of this function.
-#------------------------------------------------------------------------
-#
- mtlr r30
- blr
- .end
diff --git a/arch/ppc/boot/simple/rw4/rw4_init_brd.S b/arch/ppc/boot/simple/rw4/rw4_init_brd.S
deleted file mode 100644
index 386afda..0000000
--- a/arch/ppc/boot/simple/rw4/rw4_init_brd.S
+++ /dev/null
@@ -1,1125 +0,0 @@
-/*----------------------------------------------------------------------------+
-| This source code has been made available to you by IBM on an AS-IS
-| basis. Anyone receiving this source is licensed under IBM
-| copyrights to use it in any way he or she deems fit, including
-| copying it, modifying it, compiling it, and redistributing it either
-| with or without modifications. No license under IBM patents or
-| patent applications is to be implied by the copyright license.
-|
-| Any user of this software should understand that IBM cannot provide
-| technical support for this software and will not be responsible for
-| any consequences resulting from the use of this software.
-|
-| Any person who transfers this source code or any derivative work
-| must include the IBM copyright notice, this paragraph, and the
-| preceding two paragraphs in the transferred software.
-|
-| COPYRIGHT I B M CORPORATION 1997
-| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
-+----------------------------------------------------------------------------*/
-/*----------------------------------------------------------------------------+
-| Author: Tony J. Cerreto
-| Component: BSPS
-| File: init_brd.s
-| Purpose: Vesta Evaluation Board initialization subroutines. The following
-| routines are available:
-| 1. INITB_EBIU0: Initialize EBIU0.
-| 2. INITB_CONFIG: Configure board.
-| 3. INITB_HSMC0: Initialize HSMC0 (SDRAM).
-| 4. INITB_HSMC1: Initialize HSMC1 (SDRAM).
-| 5. INITB_CACHE: Initialize Data and Instruction Cache.
-| 6. INITB_DCACHE: Initialize Data Cache.
-| 7. INITB_ICACHE: Initialize Instruction Cache.
-| 8. INITB_GET_CSPD: Get CPU Speed (Bus Speed and Processor Speed)
-|
-| Changes:
-| Date: Author Comment:
-| --------- ------ --------
-| 01-Mar-00 tjc Created
-| 04-Mar-00 jfh Modified CIC_SEL3_VAL to support 1284 (Mux3 & GPIO 21-28)
-| 04-Mar-00 jfh Modified XILINIX Reg 0 to support 1284 (Mux3 & GPIO 21-28)
-| 04-Mar-00 jfh Modified XILINIX Reg 1 to support 1284 (Mux3 & GPIO 21-28)
-| 04-Mar-00 jfh Modified XILINIX Reg 4 to support 1284 (Mux3 & GPIO 21-28)
-| 19-May-00 rlb Relcoated HSMC0 to 0x1F000000 to support 32MB of contiguous
-| SDRAM space. Changed cache ctl regs to reflect this.
-| 22-May-00 tjc Changed initb_get_cspd interface and eliminated
-| initb_get_bspd routines.
-| 26-May-00 tjc Added two nop instructions after all mtxxx/mfxxx
-| instructions due to PPC405 bug.
-+----------------------------------------------------------------------------*/
-#define VESTA
-#include "ppc_40x.h"
-#include "stb.h"
-
-/*----------------------------------------------------------------------------+
-| BOARD CONFIGURATION DEFINES
-+----------------------------------------------------------------------------*/
-#define CBS0_CR_VAL 0x00000002 /* CBS control reg value */
-#define CIC0_CR_VAL 0xD0800448 /* CIC control reg value */
-#define CIC0_SEL3_VAL 0x11500000 /* CIC select 3 reg value */
-#define CIC0_VCR_VAL 0x00631700 /* CIC video cntl reg value */
-
-/*----------------------------------------------------------------------------+
-| EBIU0 BANK REGISTERS DEFINES
-+----------------------------------------------------------------------------*/
-#define EBIU0_BRCRH0_VAL 0x00000000 /* BR High 0 (Extension Reg)*/
-#define EBIU0_BRCRH1_VAL 0x00000000 /* BR High 1 (Extension Reg)*/
-#define EBIU0_BRCRH2_VAL 0x40000000 /* BR High 2 (Extension Reg)*/
-#define EBIU0_BRCRH3_VAL 0x40000000 /* BR High 3 (Extension Reg)*/
-#define EBIU0_BRCRH4_VAL 0x00000000 /* BR High 4 (Extension Reg)*/
-#define EBIU0_BRCRH5_VAL 0x00000000 /* BR High 5 (Extension Reg)*/
-#define EBIU0_BRCRH6_VAL 0x00000000 /* BR High 6 (Extension Reg)*/
-#define EBIU0_BRCRH7_VAL 0x40000000 /* BR High 7 (Extension Reg)*/
-
-#define EBIU0_BRCR0_VAL 0xFC58BFFE /* BR 0: 16 bit Flash 4 MB */
-#define EBIU0_BRCR1_VAL 0xFF00BFFE /* BR 1: Ext Connector 1 MB */
-#if 1
-#define EBIU0_BRCR2_VAL 0x207CFFBE /* BR 2: Xilinx 8 MB */
- /* twt == 0x3f */
-#else
-#define EBIU0_BRCR2_VAL 0x207CCFBE /* BR 2: Xilinx 8 MB */
- /* twt == 0x0f */
-#endif
-#define EBIU0_BRCR3_VAL 0x407CBFBE /* BR 3: IDE Drive 8 MB */
-#define EBIU0_BRCR4_VAL 0xFF00BFFF /* BR 4: Disabled. 0 MB */
-#define EBIU0_BRCR5_VAL 0xFF00BFFF /* BR 5: Disabled. 0 MB */
-#define EBIU0_BRCR6_VAL 0xFF00BFFF /* BR 6: Disabled. 0 MB */
-#define EBIU0_BRCR7_VAL 0xCE3F0003 /* BR 7: Line Mode DMA 2 MB */
-
-/*----------------------------------------------------------------------------+
-| GPIO DEFINES
-+----------------------------------------------------------------------------*/
-#define STB_GPIO0_OUTPUT (STB_GPIO0_BASE_ADDRESS+ 0x00)
-#define STB_GPIO0_TC (STB_GPIO0_BASE_ADDRESS+ 0x04)
-#define STB_GPIO0_OS_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x08)
-#define STB_GPIO0_OS_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x0C)
-#define STB_GPIO0_TS_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x10)
-#define STB_GPIO0_TS_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x14)
-#define STB_GPIO0_OD (STB_GPIO0_BASE_ADDRESS+ 0x18)
-#define STB_GPIO0_INPUT (STB_GPIO0_BASE_ADDRESS+ 0x1C)
-#define STB_GPIO0_R1 (STB_GPIO0_BASE_ADDRESS+ 0x20)
-#define STB_GPIO0_R2 (STB_GPIO0_BASE_ADDRESS+ 0x24)
-#define STB_GPIO0_R3 (STB_GPIO0_BASE_ADDRESS+ 0x28)
-#define STB_GPIO0_IS_1_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x30)
-#define STB_GPIO0_IS_1_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x34)
-#define STB_GPIO0_IS_2_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x38)
-#define STB_GPIO0_IS_2_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x3C)
-#define STB_GPIO0_IS_3_0_31 (STB_GPIO0_BASE_ADDRESS+ 0x40)
-#define STB_GPIO0_IS_3_32_63 (STB_GPIO0_BASE_ADDRESS+ 0x44)
-#define STB_GPIO0_SS_1 (STB_GPIO0_BASE_ADDRESS+ 0x50)
-#define STB_GPIO0_SS_2 (STB_GPIO0_BASE_ADDRESS+ 0x54)
-#define STB_GPIO0_SS_3 (STB_GPIO0_BASE_ADDRESS+ 0x58)
-
-#define GPIO0_TC_VAL 0x0C020004 /* three-state control val */
-#define GPIO0_OS_0_31_VAL 0x51A00004 /* output select 0-31 val */
-#define GPIO0_OS_32_63_VAL 0x0000002F /* output select 32-63 val */
-#define GPIO0_TS_0_31_VAL 0x51A00000 /* three-state sel 0-31 val*/
-#define GPIO0_TS_32_63_VAL 0x0000000F /* three-state sel 32-63 val*/
-#define GPIO0_OD_VAL 0xC0000004 /* open drain val */
-#define GPIO0_IS_1_0_31_VAL 0x50000151 /* input select 1 0-31 val */
-#define GPIO0_IS_1_32_63_VAL 0x00000000 /* input select 1 32-63 val */
-#define GPIO0_IS_2_0_31_VAL 0x00000000 /* input select 2 0-31 val */
-#define GPIO0_IS_2_32_63_VAL 0x00000000 /* input select 2 32-63 val */
-#define GPIO0_IS_3_0_31_VAL 0x00000440 /* input select 3 0-31 val */
-#define GPIO0_IS_3_32_63_VAL 0x00000000 /* input select 3 32-63 val */
-#define GPIO0_SS_1_VAL 0x00000000 /* sync select 1 val */
-#define GPIO0_SS_2_VAL 0x00000000 /* sync select 2 val */
-#define GPIO0_SS_3_VAL 0x00000000 /* sync select 3 val */
-
-/*----------------------------------------------------------------------------+
-| XILINX DEFINES
-+----------------------------------------------------------------------------*/
-#define STB_XILINX_LED (STB_FPGA_BASE_ADDRESS+ 0x0100)
-#define STB_XILINX1_REG0 (STB_FPGA_BASE_ADDRESS+ 0x40000)
-#define STB_XILINX1_REG1 (STB_FPGA_BASE_ADDRESS+ 0x40002)
-#define STB_XILINX1_REG2 (STB_FPGA_BASE_ADDRESS+ 0x40004)
-#define STB_XILINX1_REG3 (STB_FPGA_BASE_ADDRESS+ 0x40006)
-#define STB_XILINX1_REG4 (STB_FPGA_BASE_ADDRESS+ 0x40008)
-#define STB_XILINX1_REG5 (STB_FPGA_BASE_ADDRESS+ 0x4000A)
-#define STB_XILINX1_REG6 (STB_FPGA_BASE_ADDRESS+ 0x4000C)
-#define STB_XILINX1_ID (STB_FPGA_BASE_ADDRESS+ 0x4000E)
-#define STB_XILINX1_FLUSH (STB_FPGA_BASE_ADDRESS+ 0x4000E)
-#define STB_XILINX2_REG0 (STB_FPGA_BASE_ADDRESS+ 0x80000)
-#define STB_XILINX2_REG1 (STB_FPGA_BASE_ADDRESS+ 0x80002)
-#define STB_XILINX2_REG2 (STB_FPGA_BASE_ADDRESS+ 0x80004)
-
-#define XILINX1_R0_VAL 0x2440 /* Xilinx 1 Register 0 Val */
-#define XILINX1_R1_VAL 0x0025 /* Xilinx 1 Register 1 Val */
-#define XILINX1_R2_VAL 0x0441 /* Xilinx 1 Register 2 Val */
-#define XILINX1_R3_VAL 0x0008 /* Xilinx 1 Register 3 Val */
-#define XILINX1_R4_VAL 0x0100 /* Xilinx 1 Register 4 Val */
-#define XILINX1_R5_VAL 0x6810 /* Xilinx 1 Register 5 Val */
-#define XILINX1_R6_VAL 0x0000 /* Xilinx 1 Register 6 Val */
-#if 0
-#define XILINX2_R0_VAL 0x0008 /* Xilinx 2 Register 0 Val */
-#define XILINX2_R1_VAL 0x0000 /* Xilinx 2 Register 1 Val */
-#else
-#define XILINX2_R0_VAL 0x0018 /* disable IBM IrDA RxD */
-#define XILINX2_R1_VAL 0x0008 /* enable SICC MAX chip */
-#endif
-#define XILINX2_R2_VAL 0x0000 /* Xilinx 2 Register 2 Val */
-
-/*----------------------------------------------------------------------------+
-| HSMC BANK REGISTERS DEFINES
-+----------------------------------------------------------------------------*/
-#ifdef SDRAM16MB
-#define HSMC0_BR0_VAL 0x000D2D55 /* 0x1F000000-007FFFFF R/W */
-#define HSMC0_BR1_VAL 0x008D2D55 /* 0x1F800000-1FFFFFFF R/W */
-#else
-#define HSMC0_BR0_VAL 0x1F0D2D55 /* 0x1F000000-007FFFFF R/W */
-#define HSMC0_BR1_VAL 0x1F8D2D55 /* 0x1F800000-1FFFFFFF R/W */
-#endif
-#define HSMC1_BR0_VAL 0xA00D2D55 /* 0xA0000000-A07FFFFF R/W */
-#define HSMC1_BR1_VAL 0xA08D2D55 /* 0xA0800000-A0FFFFFF R/W */
-
-/*----------------------------------------------------------------------------+
-| CACHE DEFINES
-+----------------------------------------------------------------------------*/
-#define DCACHE_NLINES 128 /* no. D-cache lines */
-#define DCACHE_NBYTES 32 /* no. bytes/ D-cache line */
-#define ICACHE_NLINES 256 /* no. I-cache lines */
-#define ICACHE_NBYTES 32 /* no. bytes/ I-cache line */
-#ifdef SDRAM16MB
-#define DCACHE_ENABLE 0x80000000 /* D-cache regions to enable*/
-#define ICACHE_ENABLE 0x80000001 /* I-cache regions to enable*/
-#else
-#define DCACHE_ENABLE 0x18000000 /* D-cache regions to enable*/
-#define ICACHE_ENABLE 0x18000001 /* I-cache regions to enable*/
-#endif
-
-/*----------------------------------------------------------------------------+
-| CPU CORE SPEED CALCULATION DEFINES
-+----------------------------------------------------------------------------*/
-#define GCS_LCNT 500000 /* CPU speed loop count */
-#define GCS_TROW_BYTES 8 /* no. bytes in table row */
-#define GCS_CTICK_TOL 100 /* allowable clock tick tol */
-#define GCS_NMULT 4 /* no. of core speed mults */
-
- /*--------------------------------------------------------------------+
- | No. 13.5Mhz
- | Clock Ticks
- | based on a
- | loop count Bus
- | of 100,000 Speed
- +--------------------------------------------------------------------*/
-gcs_lookup_table:
- .int 50000, 54000000 /* 54.0 Mhz */
- .int 66667, 40500000 /* 40.5 Mhz */
- .int 54545, 49500000 /* 49.5 Mhz */
- .int 46154, 58500000 /* 58.5 Mhz */
- .int 0, 0 /* end of table flag */
-
-
-/*****************************************************************************+
-| XXXXXXX XXX XXX XXXXXX XXXXXXX XXXXXX XX XX XX XXXX
-| XX X XX XX X XX X XX X XX XX XXX XX XXXX XX
-| XX X XXX XX XX X XX XX XXXX XX XX XX XX
-| XXXX X XX XXXX XXXXX XX XXXX XX XX XX
-| XX X XXX XX XX X XX XX XX XXX XXXXXX XX
-| XX X XX XX XX XX X XX XX XX XX XX XX XX XX
-| XXXXXXX XXX XXX XXXX XXXXXXX XXX XX XX XX XX XX XXXXXXX
-+*****************************************************************************/
-/******************************************************************************
-|
-| Routine: INITB_EBIU0.
-|
-| Purpose: Initialize all the EBIU0 Bank Registers
-| Parameters: None.
-| Returns: None.
-|
-******************************************************************************/
- function_prolog(initb_ebiu0)
- /*--------------------------------------------------------------------+
- | Set EBIU0 Bank 0
- +--------------------------------------------------------------------*/
- lis r10,EBIU0_BRCR0_VAL@h
- ori r10,r10,EBIU0_BRCR0_VAL@l
- mtdcr ebiu0_brcr0,r10
- lis r10,EBIU0_BRCRH0_VAL@h
- ori r10,r10,EBIU0_BRCRH0_VAL@l
- mtdcr ebiu0_brcrh0,r10
-
- /*--------------------------------------------------------------------+
- | Set EBIU0 Bank 1
- +--------------------------------------------------------------------*/
- lis r10,EBIU0_BRCR1_VAL@h
- ori r10,r10,EBIU0_BRCR1_VAL@l
- mtdcr ebiu0_brcr1,r10
- lis r10,EBIU0_BRCRH1_VAL@h
- ori r10,r10,EBIU0_BRCRH1_VAL@l
- mtdcr ebiu0_brcrh1,r10
-
- /*--------------------------------------------------------------------+
- | Set EBIU0 Bank 2
- +--------------------------------------------------------------------*/
- lis r10,EBIU0_BRCR2_VAL@h
- ori r10,r10,EBIU0_BRCR2_VAL@l
- mtdcr ebiu0_brcr2,r10
- lis r10,EBIU0_BRCRH2_VAL@h
- ori r10,r10,EBIU0_BRCRH2_VAL@l
- mtdcr ebiu0_brcrh2,r10
-
- /*--------------------------------------------------------------------+
- | Set EBIU0 Bank 3
- +--------------------------------------------------------------------*/
- lis r10,EBIU0_BRCR3_VAL@h
- ori r10,r10,EBIU0_BRCR3_VAL@l
- mtdcr ebiu0_brcr3,r10
- lis r10,EBIU0_BRCRH3_VAL@h
- ori r10,r10,EBIU0_BRCRH3_VAL@l
- mtdcr ebiu0_brcrh3,r10
-
- /*--------------------------------------------------------------------+
- | Set EBIU0 Bank 4
- +--------------------------------------------------------------------*/
- lis r10,EBIU0_BRCR4_VAL@h
- ori r10,r10,EBIU0_BRCR4_VAL@l
- mtdcr ebiu0_brcr4,r10
- lis r10,EBIU0_BRCRH4_VAL@h
- ori r10,r10,EBIU0_BRCRH4_VAL@l
- mtdcr ebiu0_brcrh4,r10
-
- /*--------------------------------------------------------------------+
- | Set EBIU0 Bank 5
- +--------------------------------------------------------------------*/
- lis r10,EBIU0_BRCR5_VAL@h
- ori r10,r10,EBIU0_BRCR5_VAL@l
- mtdcr ebiu0_brcr5,r10
- lis r10,EBIU0_BRCRH5_VAL@h
- ori r10,r10,EBIU0_BRCRH5_VAL@l
- mtdcr ebiu0_brcrh5,r10
-
- /*--------------------------------------------------------------------+
- | Set EBIU0 Bank 6
- +--------------------------------------------------------------------*/
- lis r10,EBIU0_BRCR6_VAL@h
- ori r10,r10,EBIU0_BRCR6_VAL@l
- mtdcr ebiu0_brcr6,r10
- lis r10,EBIU0_BRCRH6_VAL@h
- ori r10,r10,EBIU0_BRCRH6_VAL@l
- mtdcr ebiu0_brcrh6,r10
-
- /*--------------------------------------------------------------------+
- | Set EBIU0 Bank 7
- +--------------------------------------------------------------------*/
- lis r10,EBIU0_BRCR7_VAL@h
- ori r10,r10,EBIU0_BRCR7_VAL@l
- mtdcr ebiu0_brcr7,r10
- lis r10,EBIU0_BRCRH7_VAL@h
- ori r10,r10,EBIU0_BRCRH7_VAL@l
- mtdcr ebiu0_brcrh7,r10
-
- blr
- function_epilog(initb_ebiu0)
-
-
-/******************************************************************************
-|
-| Routine: INITB_CONFIG
-|
-| Purpose: Configure the Vesta Evaluation Board. The following items
-| will be configured:
-| 1. Cross-Bar Switch.
-| 2. Chip Interconnect.
-| 3. Clear/reset key PPC registers.
-| 4. Xilinx and GPIO Registers.
-|
-| Returns: None.
-|
-******************************************************************************/
- function_prolog(initb_config)
- /*--------------------------------------------------------------------+
- | Init CROSS-BAR SWITCH
- +--------------------------------------------------------------------*/
- lis r10,CBS0_CR_VAL@h /* r10 <- CBS Cntl Reg val */
- ori r10,r10,CBS0_CR_VAL@l
- mtdcr cbs0_cr,r10
-
- /*--------------------------------------------------------------------+
- | Init Chip-Interconnect (CIC) Registers
- +--------------------------------------------------------------------*/
- lis r10,CIC0_CR_VAL@h /* r10 <- CIC Cntl Reg val */
- ori r10,r10,CIC0_CR_VAL@l
- mtdcr cic0_cr,r10
-
- lis r10,CIC0_SEL3_VAL@h /* r10 <- CIC SEL3 Reg val */
- ori r10,r10,CIC0_SEL3_VAL@l
- mtdcr cic0_sel3,r10
-
- lis r10,CIC0_VCR_VAL@h /* r10 <- CIC Vid C-Reg val */
- ori r10,r10,CIC0_VCR_VAL@l
- mtdcr cic0_vcr,r10
-
- /*--------------------------------------------------------------------+
- | Clear SGR and DCWR
- +--------------------------------------------------------------------*/
- li r10,0x0000
- mtspr sgr,r10
- mtspr dcwr,r10
-
- /*--------------------------------------------------------------------+
- | Clear/set up some machine state registers.
- +--------------------------------------------------------------------*/
- li r10,0x0000 /* r10 <- 0 */
- mtdcr ebiu0_besr,r10 /* clr Bus Err Syndrome Reg */
- mtspr esr,r10 /* clr Exceptn Syndrome Reg */
- mttcr r10 /* timer control register */
-
- mtdcr uic0_er,r10 /* disable all interrupts */
-
- /* UIC_IIC0 | UIC_IIC1 | UIC_U0 | UIC_IR_RCV | UIC_IR_XMIT */
- lis r10, 0x00600e00@h
- ori r10,r10,0x00600e00@l
- mtdcr uic0_pr,r10
-
- li r10,0x00000020 /* UIC_EIR1 */
- mtdcr uic0_tr,r10
-
- lis r10,0xFFFF /* r10 <- 0xFFFFFFFF */
- ori r10,r10,0xFFFF /* */
- mtdbsr r10 /* clear/reset the dbsr */
- mtdcr uic0_sr,r10 /* clear pending interrupts */
-
- li r10,0x1000 /* set Machine Exception bit*/
- oris r10,r10,0x2 /* set Criticl Exception bit*/
- mtmsr r10 /* change MSR */
-
- /*--------------------------------------------------------------------+
- | Clear XER.
- +--------------------------------------------------------------------*/
- li r10,0x0000
- mtxer r10
-
- /*--------------------------------------------------------------------+
- | Init GPIO0 Registers
- +--------------------------------------------------------------------*/
- lis r10, STB_GPIO0_TC@h /* Three-state control */
- ori r10,r10,STB_GPIO0_TC@l
- lis r11, GPIO0_TC_VAL@h
- ori r11,r11,GPIO0_TC_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_OS_0_31@h /* output select 0-31 */
- ori r10,r10,STB_GPIO0_OS_0_31@l
- lis r11, GPIO0_OS_0_31_VAL@h
- ori r11,r11,GPIO0_OS_0_31_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_OS_32_63@h /* output select 32-63 */
- ori r10,r10,STB_GPIO0_OS_32_63@l
- lis r11, GPIO0_OS_32_63_VAL@h
- ori r11,r11,GPIO0_OS_32_63_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_TS_0_31@h /* three-state select 0-31 */
- ori r10,r10,STB_GPIO0_TS_0_31@l
- lis r11, GPIO0_TS_0_31_VAL@h
- ori r11,r11,GPIO0_TS_0_31_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_TS_32_63@h /* three-state select 32-63 */
- ori r10,r10,STB_GPIO0_TS_32_63@l
- lis r11, GPIO0_TS_32_63_VAL@h
- ori r11,r11,GPIO0_TS_32_63_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_OD@h /* open drain */
- ori r10,r10,STB_GPIO0_OD@l
- lis r11, GPIO0_OD_VAL@h
- ori r11,r11,GPIO0_OD_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_IS_1_0_31@h /* input select 1, 0-31 */
- ori r10,r10,STB_GPIO0_IS_1_0_31@l
- lis r11, GPIO0_IS_1_0_31_VAL@h
- ori r11,r11,GPIO0_IS_1_0_31_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_IS_1_32_63@h /* input select 1, 32-63 */
- ori r10,r10,STB_GPIO0_IS_1_32_63@l
- lis r11, GPIO0_IS_1_32_63_VAL@h
- ori r11,r11,GPIO0_IS_1_32_63_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_IS_2_0_31@h /* input select 2, 0-31 */
- ori r10,r10,STB_GPIO0_IS_2_0_31@l
- lis r11, GPIO0_IS_2_0_31_VAL@h
- ori r11,r11,GPIO0_IS_2_0_31_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_IS_2_32_63@h /* input select 2, 32-63 */
- ori r10,r10,STB_GPIO0_IS_2_32_63@l
- lis r11, GPIO0_IS_2_32_63_VAL@h
- ori r11,r11,GPIO0_IS_2_32_63_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_IS_3_0_31@h /* input select 3, 0-31 */
- ori r10,r10,STB_GPIO0_IS_3_0_31@l
- lis r11, GPIO0_IS_3_0_31_VAL@h
- ori r11,r11,GPIO0_IS_3_0_31_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_IS_3_32_63@h /* input select 3, 32-63 */
- ori r10,r10,STB_GPIO0_IS_3_32_63@l
- lis r11, GPIO0_IS_3_32_63_VAL@h
- ori r11,r11,GPIO0_IS_3_32_63_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_SS_1@h /* sync select 1 */
- ori r10,r10,STB_GPIO0_SS_1@l
- lis r11, GPIO0_SS_1_VAL@h
- ori r11,r11,GPIO0_SS_1_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_SS_2@h /* sync select 2 */
- ori r10,r10,STB_GPIO0_SS_2@l
- lis r11, GPIO0_SS_2_VAL@h
- ori r11,r11,GPIO0_SS_2_VAL@l
- stw r11,0(r10)
-
- lis r10, STB_GPIO0_SS_3@h /* sync select 3 */
- ori r10,r10,STB_GPIO0_SS_3@l
- lis r11, GPIO0_SS_3_VAL@h
- ori r11,r11,GPIO0_SS_3_VAL@l
- stw r11,0(r10)
-
- /*--------------------------------------------------------------------+
- | Init Xilinx #1 Registers
- +--------------------------------------------------------------------*/
- lis r10, STB_XILINX1_REG0@h /* init Xilinx1 Reg 0 */
- ori r10,r10,STB_XILINX1_REG0@l
- li r11,XILINX1_R0_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX1_REG1@h /* init Xilinx1 Reg 1 */
- ori r10,r10,STB_XILINX1_REG1@l
- li r11,XILINX1_R1_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX1_REG2@h /* init Xilinx1 Reg 2 */
- ori r10,r10,STB_XILINX1_REG2@l
- li r11,XILINX1_R2_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX1_REG3@h /* init Xilinx1 Reg 3 */
- ori r10,r10,STB_XILINX1_REG3@l
- li r11,XILINX1_R3_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX1_REG4@h /* init Xilinx1 Reg 4 */
- ori r10,r10,STB_XILINX1_REG4@l
- li r11,XILINX1_R4_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX1_REG5@h /* init Xilinx1 Reg 5 */
- ori r10,r10,STB_XILINX1_REG5@l
- li r11,XILINX1_R5_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX1_REG6@h /* init Xilinx1 Reg 6 */
- ori r10,r10,STB_XILINX1_REG6@l
- li r11,XILINX1_R6_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX1_FLUSH@h /* latch registers in Xilinx*/
- ori r10,r10,STB_XILINX1_FLUSH@l
- li r11,0x0000
- sth r11,0(r10)
-
- /*--------------------------------------------------------------------+
- | Init Xilinx #2 Registers
- +--------------------------------------------------------------------*/
- lis r10, STB_XILINX2_REG0@h /* init Xilinx2 Reg 0 */
- ori r10,r10,STB_XILINX2_REG0@l
- li r11,XILINX2_R0_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX2_REG1@h /* init Xilinx2 Reg 1 */
- ori r10,r10,STB_XILINX2_REG1@l
- li r11,XILINX2_R1_VAL
- sth r11,0(r10)
-
- lis r10, STB_XILINX2_REG2@h /* init Xilinx2 Reg 2 */
- ori r10,r10,STB_XILINX2_REG2@l
- li r11,XILINX2_R2_VAL
- sth r11,0(r10)
-
- blr
- function_epilog(initb_config)
-
-
-/******************************************************************************
-|
-| Routine: INITB_HSMC0.
-|
-| Purpose: Initialize the HSMC0 Registers for SDRAM
-| Parameters: None.
-| Returns: R3 = 0: Successful
-| = -1: Unsuccessful, SDRAM did not reset properly.
-|
-******************************************************************************/
- function_prolog(initb_hsmc0)
- mflr r0 /* Save return addr */
-
- /*--------------------------------------------------------------------+
- | Set Global SDRAM Controller to recommended default
- +--------------------------------------------------------------------*/
- lis r10,0x6C00
- ori r10,r10,0x0000
- mtdcr hsmc0_gr,r10
-
- /*--------------------------------------------------------------------+
- | Set HSMC0 Data Register to recommended default
- +--------------------------------------------------------------------*/
- lis r10,0x0037
- ori r10,r10,0x0000
- mtdcr hsmc0_data,r10
-
- /*--------------------------------------------------------------------+
- | Init HSMC0 Bank Register 0
- +--------------------------------------------------------------------*/
- lis r10,HSMC0_BR0_VAL@h
- ori r10,r10,HSMC0_BR0_VAL@l
- mtdcr hsmc0_br0,r10
-
- /*--------------------------------------------------------------------+
- | Init HSMC0 Bank Register 1
- +--------------------------------------------------------------------*/
- lis r10,HSMC0_BR1_VAL@h
- ori r10,r10,HSMC0_BR1_VAL@l
- mtdcr hsmc0_br1,r10
-
- /*--------------------------------------------------------------------+
- | Set HSMC0 Control Reg 0
- +--------------------------------------------------------------------*/
- lis r10,0x8077 /* PRECHARGE ALL DEVICE BKS */
- ori r10,r10,0x0000
- mtdcr hsmc0_cr0,r10
- li r3,0x0000
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne cr0,hsmc0_err
-
- lis r10,0x8078 /* AUTO-REFRESH */
- ori r10,r10,0x0000
- mtdcr hsmc0_cr0,r10
- li r3,0x0000
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne cr0,hsmc0_err
-
- lis r10,0x8070 /* PROG MODE W/DATA REG VAL */
- ori r10,r10,0x8000
- mtdcr hsmc0_cr0,r10
- li r3,0x0000
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne hsmc0_err
-
- /*--------------------------------------------------------------------+
- | Set HSMC0 Control Reg 1
- +--------------------------------------------------------------------*/
- lis r10,0x8077 /* PRECHARGE ALL DEVICE BKS */
- ori r10,r10,0x0000
- mtdcr hsmc0_cr1,r10
- li r3,0x0001
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne cr0,hsmc0_err
-
- lis r10,0x8078 /* AUTO-REFRESH */
- ori r10,r10,0x0000
- mtdcr hsmc0_cr1,r10
- li r3,0x0001
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne cr0,hsmc0_err
-
- lis r10,0x8070 /* PROG MODE W/DATA REG VAL */
- ori r10,r10,0x8000
- mtdcr hsmc0_cr1,r10
- li r3,0x0001
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne cr0,hsmc0_err
-
- /*--------------------------------------------------------------------+
- | Set HSMC0 Refresh Register
- +--------------------------------------------------------------------*/
- lis r10,0x0FE1
- ori r10,r10,0x0000
- mtdcr hsmc0_crr,r10
- li r3,0
-
-hsmc0_err:
- mtlr r0
- blr
- function_epilog(initb_hsmc0)
-
-
-/******************************************************************************
-|
-| Routine: INITB_HSMC1.
-|
-| Purpose: Initialize the HSMC1 Registers for SDRAM
-| Parameters: None.
-| Returns: R3 = 0: Successful
-| = -1: Unsuccessful, SDRAM did not reset properly.
-|
-******************************************************************************/
- function_prolog(initb_hsmc1)
- mflr r0 /* Save return addr */
-
- /*--------------------------------------------------------------------+
- | Set Global SDRAM Controller to recommended default
- +--------------------------------------------------------------------*/
- lis r10,0x6C00
- ori r10,r10,0x0000
- mtdcr hsmc1_gr,r10
-
- /*--------------------------------------------------------------------+
- | Set HSMC1 Data Register to recommended default
- +--------------------------------------------------------------------*/
- lis r10,0x0037
- ori r10,r10,0x0000
- mtdcr hsmc1_data,r10
-
- /*--------------------------------------------------------------------+
- | Init HSMC1 Bank Register 0
- +--------------------------------------------------------------------*/
- lis r10,HSMC1_BR0_VAL@h
- ori r10,r10,HSMC1_BR0_VAL@l
- mtdcr hsmc1_br0,r10
-
- /*--------------------------------------------------------------------+
- | Init HSMC1 Bank Register 1
- +--------------------------------------------------------------------*/
- lis r10,HSMC1_BR1_VAL@h
- ori r10,r10,HSMC1_BR1_VAL@l
- mtdcr hsmc1_br1,r10
-
- /*--------------------------------------------------------------------+
- | Set HSMC1 Control Reg 0
- +--------------------------------------------------------------------*/
- lis r10,0x8077 /* PRECHARGE ALL DEVICE BANKS */
- ori r10,r10,0x0000
- mtdcr hsmc1_cr0,r10
- li r3,0x0002
- bl hsmc_cr_wait /* wait for operation completion */
- cmpwi cr0,r3,0x0000
- bne hsmc1_err
-
- lis r10,0x8078 /* AUTO-REFRESH */
- ori r10,r10,0x0000
- mtdcr hsmc1_cr0,r10
- li r3,0x0002
- bl hsmc_cr_wait /* wait for operation completion */
- cmpwi cr0,r3,0x0000
- bne hsmc1_err
-
- lis r10,0x8070 /* PROGRAM MODE W/DATA REG VALUE */
- ori r10,r10,0x8000
- mtdcr hsmc1_cr0,r10
- li r3,0x0002
- bl hsmc_cr_wait /* wait for operation completion */
- cmpwi cr0,r3,0x0000
- bne hsmc1_err
-
- /*--------------------------------------------------------------------+
- | Set HSMC1 Control Reg 1
- +--------------------------------------------------------------------*/
- lis r10,0x8077 /* PRECHARGE ALL DEVICE BKS */
- ori r10,r10,0x0000
- mtdcr hsmc1_cr1,r10
- li r3,0x0003
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne hsmc1_err
-
- lis r10,0x8078 /* AUTO-REFRESH */
- ori r10,r10,0x0000
- mtdcr hsmc1_cr1,r10
- li r3,0x0003
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne hsmc1_err
-
- lis r10,0x8070 /* PROG MODE W/DATA REG VAL */
- ori r10,r10,0x8000
- mtdcr hsmc1_cr1,r10
- li r3,0x0003
- bl hsmc_cr_wait /* wait for op completion */
- cmpwi cr0,r3,0x0000
- bne hsmc1_err
-
- /*--------------------------------------------------------------------+
- | Set HSMC1 Refresh Register
- +--------------------------------------------------------------------*/
- lis r10,0x0FE1
- ori r10,r10,0x0000
- mtdcr hsmc1_crr,r10
- xor r3,r3,r3
-
-hsmc1_err:
- mtlr r0
- blr
- function_epilog(initb_hsmc1)
-
-
-/******************************************************************************
-|
-| Routine: INITB_CACHE
-|
-| Purpose: This routine will enable Data and Instruction Cache.
-| The Data Cache is an 8K two-way set associative and the
-| Instruction Cache is an 16K two-way set associative cache.
-|
-| Parameters: None.
-|
-| Returns: None.
-|
-******************************************************************************/
- function_prolog(initb_cache)
- mflr r0 /* Save return addr */
-
- bl initb_Dcache /* enable D-Cache */
- bl initb_Icache /* enable I-Cache */
-
- mtlr r0
- blr
- function_epilog(initb_cache)
-
-
-/******************************************************************************
-|
-| Routine: INITB_DCACHE
-|
-| Purpose: This routine will invalidate all data in the Data Cache and
-| then enable D-Cache. If cache is enabled already, the D-Cache
-| will be flushed before the data is invalidated.
-|
-| Parameters: None.
-|
-| Returns: None.
-|
-******************************************************************************/
- function_prolog(initb_Dcache)
- /*--------------------------------------------------------------------+
- | Flush Data Cache if enabled
- +--------------------------------------------------------------------*/
- mfdccr r10 /* r10 <- DCCR */
- isync /* ensure prev insts done */
- cmpwi r10,0x00
- beq ic_dcinv /* D-cache off, invalidate */
-
- /*--------------------------------------------------------------------+
- | Data Cache enabled, force known memory addresses to be Cached
- +--------------------------------------------------------------------*/
- lis r10,HSMC0_BR0_VAL@h /* r10 <- first memory loc */
- andis. r10,r10,0xFFF0
- li r11,DCACHE_NLINES /* r11 <- # A-way addresses */
- addi r11,r11,DCACHE_NLINES /* r11 <- # B-way addresses */
- mtctr r11 /* set loop counter */
-
-ic_dcload:
- lwz r12,0(r10) /* force cache of address */
- addi r10,r10,DCACHE_NBYTES /* r10 <- next memory loc */
- bdnz ic_dcload
- sync /* ensure prev insts done */
- isync
-
- /*--------------------------------------------------------------------+
- | Flush the known memory addresses from Cache
- +--------------------------------------------------------------------*/
- lis r10,HSMC0_BR0_VAL@h /* r10 <- first memory loc */
- andis. r10,r10,0xFFF0
- mtctr r11 /* set loop counter */
-
-ic_dcflush:
- dcbf 0,r10 /* flush D-cache line */
- addi r10,r10,DCACHE_NBYTES /* r10 <- next memory loc */
- bdnz ic_dcflush
- sync /* ensure prev insts done */
- isync
-
- /*--------------------------------------------------------------------+
- | Disable then invalidate Data Cache
- +--------------------------------------------------------------------*/
- li r10,0 /* r10 <- 0 */
- mtdccr r10 /* disable the D-Cache */
- isync /* ensure prev insts done */
-
-ic_dcinv:
- li r10,0 /* r10 <- line address */
- li r11,DCACHE_NLINES /* r11 <- # lines in cache */
- mtctr r11 /* set loop counter */
-
-ic_dcloop:
- dccci 0,r10 /* invalidate A/B cache lns */
- addi r10,r10,DCACHE_NBYTES /* bump to next line */
- bdnz ic_dcloop
- sync /* ensure prev insts done */
- isync
-
- /*--------------------------------------------------------------------+
- | Enable Data Cache
- +--------------------------------------------------------------------*/
- lis r10,DCACHE_ENABLE@h /* r10 <- D-cache enable msk*/
- ori r10,r10,DCACHE_ENABLE@l
- mtdccr r10
- sync /* ensure prev insts done */
- isync
-
- blr
- function_epilog(initb_Dcache)
-
-
-/******************************************************************************
-|
-| Routine: INITB_ICACHE
-|
-| Purpose: This routine will invalidate all data in the Instruction
-| Cache then enable I-Cache.
-|
-| Parameters: None.
-|
-| Returns: None.
-|
-******************************************************************************/
- function_prolog(initb_Icache)
- /*--------------------------------------------------------------------+
- | Invalidate Instruction Cache
- +--------------------------------------------------------------------*/
- li r10,0 /* r10 <- lines address */
- iccci 0,r10 /* invalidate all I-cache */
- sync /* ensure prev insts done */
- isync
-
- /*--------------------------------------------------------------------+
- | Enable Instruction Cache
- +--------------------------------------------------------------------*/
- lis r10,ICACHE_ENABLE@h /* r10 <- I-cache enable msk*/
- ori r10,r10,ICACHE_ENABLE@l
- mticcr r10
- sync /* ensure prev insts done */
- isync
-
- blr
- function_epilog(initb_Icache)
-
-#if 0
-/******************************************************************************
-|
-| Routine: INITB_GET_CSPD
-|
-| Purpose: Determine the CPU Core Speed. The 13.5 Mhz Time Base
-| Counter (TBC) is used to measure a conditional branch
-| instruction.
-|
-| Parameters: R3 = Address of Bus Speed
-| R4 = Address of Core Speed
-|
-| Returns: (R3) = >0: Bus Speed.
-| 0: Bus Speed not found in Look-Up Table.
-| (R4) = >0: Core Speed.
-| 0: Core Speed not found in Look-Up Table.
-|
-| Note: 1. This routine assumes the bdnz branch instruction takes
-| two instruction cycles to complete.
-| 2. This routine must be called before interrupts are enabled.
-|
-******************************************************************************/
- function_prolog(initb_get_cspd)
- mflr r0 /* Save return address */
- /*--------------------------------------------------------------------+
- | Set-up timed loop
- +--------------------------------------------------------------------*/
- lis r9,gcs_time_loop@h /* r9 <- addr loop instr */
- ori r9,r9,gcs_time_loop@l
- lis r10,GCS_LCNT@h /* r10 <- loop count */
- ori r10,r10,GCS_LCNT@l
- mtctr r10 /* ctr <- loop count */
- lis r11,STB_TIMERS_TBC@h /* r11 <- TBC register addr */
- ori r11,r11,STB_TIMERS_TBC@l
- li r12,0 /* r12 <- 0 */
-
- /*--------------------------------------------------------------------+
- | Cache timed-loop instruction
- +--------------------------------------------------------------------*/
- icbt 0,r9
- sync
- isync
-
- /*--------------------------------------------------------------------+
- | Get number of 13.5 Mhz cycles to execute time-loop
- +--------------------------------------------------------------------*/
- stw r12,0(r11) /* reset TBC */
-gcs_time_loop:
- bdnz+ gcs_time_loop /* force branch pred taken */
- lwz r5,0(r11) /* r5 <- num 13.5 Mhz ticks */
- li r6,5 /* LUT based on 1/5th the...*/
- divw r5,r5,r6 /*..loop count used */
- sync
- isync
-
- /*--------------------------------------------------------------------+
- | Look-up core speed based on TBC value
- +--------------------------------------------------------------------*/
- lis r6,gcs_lookup_table@h /* r6 <- pts at core spd LUT*/
- ori r6,r6,gcs_lookup_table@l
- bl gcs_cspd_lookup /* find core speed in LUT */
-
- mtlr r0 /* set return address */
- blr
- function_epilog(initb_get_cspd)
-
-#endif
-/*****************************************************************************+
-| XXXX XX XX XXXXXX XXXXXXX XXXXXX XX XX XX XXXX
-| XX XXX XX X XX X XX X XX XX XXX XX XXXX XX
-| XX XXXX XX XX XX X XX XX XXXX XX XX XX XX
-| XX XX XXXX XX XXXX XXXXX XX XXXX XX XX XX
-| XX XX XXX XX XX X XX XX XX XXX XXXXXX XX
-| XX XX XX XX XX X XX XX XX XX XX XX XX XX
-| XXXX XX XX XXXX XXXXXXX XXX XX XX XX XX XX XXXXXXX
-+*****************************************************************************/
-/******************************************************************************
-|
-| Routine: HSMC_CR_WAIT
-|
-| Purpose: Wait for the HSMC Control Register (bits 12-16) to be reset
-| after an auto-refresh, pre-charge or program mode register
-| command execution.
-|
-| Parameters: R3 = HSMC Control Register ID.
-| 0: HSMC0 CR0
-| 1: HSMC0 CR1
-| 2: HSMC1 CR0
-| 3: HSMC1 CR1
-|
-| Returns: R3 = 0: Successful
-| -1: Unsuccessful
-|
-******************************************************************************/
-hsmc_cr_wait:
-
- li r11,10 /* r11 <- retry counter */
- mtctr r11 /* set retry counter */
- mr r11,r3 /* r11 <- HSMC CR reg id */
-
-hsmc_cr_rep:
- bdz hsmc_cr_err /* branch if max retries hit*/
-
- /*--------------------------------------------------------------------+
- | GET HSMCx_CRx value based on HSMC Control Register ID
- +--------------------------------------------------------------------*/
-try_hsmc0_cr0: /* CHECK IF ID=HSMC0 CR0 REG*/
- cmpwi cr0,r11,0x0000
- bne cr0,try_hsmc0_cr1
- mfdcr r10,hsmc0_cr0 /* r11 <- HSMC0 CR0 value */
- b hsmc_cr_read
-
-try_hsmc0_cr1: /* CHECK IF ID=HSMC0 CR1 REG*/
- cmpwi cr0,r11,0x0001
- bne cr0,try_hsmc1_cr0
- mfdcr r10,hsmc0_cr1 /* r10 <- HSMC0 CR1 value */
- b hsmc_cr_read
-
-try_hsmc1_cr0: /* CHECK IF ID=HSMC1 CR0 REG*/
- cmpwi cr0,r11,0x0002
- bne cr0,try_hsmc1_cr1
- mfdcr r10,hsmc1_cr0 /* r10 <- HSMC1 CR0 value */
- b hsmc_cr_read
-
-try_hsmc1_cr1: /* CHECK IF ID=HSMC1 CR1 REG*/
- cmpwi cr0,r11,0x0003
- bne cr0,hsmc_cr_err
- mfdcr r10,hsmc1_cr1 /* r10 <- HSMC1 CR1 value */
-
- /*--------------------------------------------------------------------+
- | Check if HSMC CR register was reset after command execution
- +--------------------------------------------------------------------*/
-hsmc_cr_read:
- lis r12,0x000F /* create "AND" mask */
- ori r12,r12,0x8000
- and. r10,r10,r12 /* r10 <- HSMC CR bits 12-16*/
- bne cr0,hsmc_cr_rep /* wait for bits to reset */
- li r3,0 /* set return code = success*/
- b hsmc_cr_done
-
-hsmc_cr_err: /* ERROR: SDRAM didn't reset*/
- li r3,-1 /* set RC=unsuccessful */
-
-hsmc_cr_done:
- blr
-
-#if 0
-/******************************************************************************
-|
-| Routine: GCS_CSPD_LOOKUP
-|
-| Purpose: Uses the number of 13.5 Mhz clock ticks found after executing
-| the branch instruction time loop to look-up the CPU Core Speed
-| in the Core Speed Look-up Table.
-|
-| Parameters: R3 = Address of Bus Speed
-| R4 = Address of Core Speed
-| R5 = Number of 13.5 Mhz clock ticks found in time loop.
-| R6 = Pointer to Core-Speed Look-Up Table
-|
-| Returns: (R3) = >0: Bus Speed.
-| 0: Bus Speed not found in Look-Up Table.
-| (R4) = >0: Core Speed.
-| 0: Core Speed not found in Look-Up Table.
-|
-| Note: Core Speed = Bus Speed * Mult Factor (1-4x).
-|
-******************************************************************************/
-gcs_cspd_lookup:
-
- li r9,1 /* r9 <- core speed mult */
- /*--------------------------------------------------------------------+
- | Get theoritical number 13.5 Mhz ticks for a given Bus Speed from
- | Look-up Table. Check all mult factors to determine if calculated
- | value matches theoretical value (within a tolerance).
- +--------------------------------------------------------------------*/
-gcs_cspd_loop:
- lwz r10,0(r6) /* r10 <- no. ticks from LUT*/
- divw r10,r10,r9 /* r10 <- div mult (1-4x) */
- subi r11,r10,GCS_CTICK_TOL /* r11 <- no. tks low range */
- addi r12,r10,GCS_CTICK_TOL /* r12 <- no. tks high range*/
-
- cmpw cr0,r5,r11 /* calc value within range? */
- blt gcs_cspd_retry /* less than low range */
- cmpw cr0,r5,r12
- bgt gcs_cspd_retry /* greater than high range */
- b gcs_cspd_fnd /* calc value within range */
-
- /*--------------------------------------------------------------------+
- | SO FAR CORE SPEED NOT FOUND: Check next mult factor
- +--------------------------------------------------------------------*/
-gcs_cspd_retry:
- addi r9,r9,1 /* bump mult factor (1-4x) */
- cmpwi cr0,r9,GCS_NMULT
- ble gcs_cspd_loop
-
- /*--------------------------------------------------------------------+
- | SO FAR CORE SPEED NOT FOUND: Point at next Bus Speed in LUT
- +--------------------------------------------------------------------*/
- li r9,1 /* reset mult factor */
- addi r6,r6,GCS_TROW_BYTES /* point at next table entry*/
- lwz r10,0(r6)
- cmpwi cr0,r10,0 /* check for EOT flag */
- bne gcs_cspd_loop
-
- /*--------------------------------------------------------------------+
- | COMPUTE CORE SPEED AND GET BUS SPEED FROM LOOK-UP TABLE
- +--------------------------------------------------------------------*/
-gcs_cspd_fnd:
- lwz r5,4(r6) /* r5 <- Bus Speed in LUT */
- mullw r6,r5,r9 /* r6 <- Core speed */
- stw r5,0(r3) /* (r3) <- Bus Speed */
- stw r6,0(r4) /* (r4) <- Core Speed */
-
- blr
-#endif
diff --git a/arch/ppc/boot/simple/rw4/stb.h b/arch/ppc/boot/simple/rw4/stb.h
deleted file mode 100644
index 9afa5ab..0000000
--- a/arch/ppc/boot/simple/rw4/stb.h
+++ /dev/null
@@ -1,239 +0,0 @@
-/*----------------------------------------------------------------------------+
-| This source code has been made available to you by IBM on an AS-IS
-| basis. Anyone receiving this source is licensed under IBM
-| copyrights to use it in any way he or she deems fit, including
-| copying it, modifying it, compiling it, and redistributing it either
-| with or without modifications. No license under IBM patents or
-| patent applications is to be implied by the copyright license.
-|
-| Any user of this software should understand that IBM cannot provide
-| technical support for this software and will not be responsible for
-| any consequences resulting from the use of this software.
-|
-| Any person who transfers this source code or any derivative work
-| must include the IBM copyright notice, this paragraph, and the
-| preceding two paragraphs in the transferred software.
-|
-| COPYRIGHT I B M CORPORATION 1999
-| LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
-+----------------------------------------------------------------------------*/
-/*----------------------------------------------------------------------------+
-| Author: Maciej P. Tyrlik
-| Component: Include file.
-| File: stb.h
-| Purpose: Common Set-tob-box definitions.
-| Changes:
-| Date: Comment:
-| ----- --------
-| 14-Jan-97 Created for ElPaso pass 1 MPT
-| 13-May-97 Added function prototype and global variables MPT
-| 08-Dec-98 Added RAW IR task information MPT
-| 19-Jan-99 Port to Romeo MPT
-| 19-May-00 Changed SDRAM to 32MB contiguous 0x1F000000 - 0x20FFFFFF RLB
-+----------------------------------------------------------------------------*/
-
-#ifndef _stb_h_
-#define _stb_h_
-
-/*----------------------------------------------------------------------------+
-| Read/write from I/O macros.
-+----------------------------------------------------------------------------*/
-#define inbyte(port) (*((unsigned char volatile *)(port)))
-#define outbyte(port,data) *(unsigned char volatile *)(port)=\
- (unsigned char)(data)
-
-#define inshort(port) (*((unsigned short volatile *)(port)))
-#define outshort(port,data) *(unsigned short volatile *)(port)=\
- (unsigned short)(data)
-
-#define inword(port) (*((unsigned long volatile *)(port)))
-#define outword(port,data) *(unsigned long volatile *)(port)=\
- (unsigned long)(data)
-
-/*----------------------------------------------------------------------------+
-| STB interrupts.
-+----------------------------------------------------------------------------*/
-#define STB_XP_TP_INT 0
-#define STB_XP_APP_INT 1
-#define STB_AUD_INT 2
-#define STB_VID_INT 3
-#define STB_DMA0_INT 4
-#define STB_DMA1_INT 5
-#define STB_DMA2_INT 6
-#define STB_DMA3_INT 7
-#define STB_SCI_INT 8
-#define STB_I2C1_INT 9
-#define STB_I2C2_INT 10
-#define STB_GPT_PWM0 11
-#define STB_GPT_PWM1 12
-#define STB_SCP_INT 13
-#define STB_SSP_INT 14
-#define STB_GPT_PWM2 15
-#define STB_EXT5_INT 16
-#define STB_EXT6_INT 17
-#define STB_EXT7_INT 18
-#define STB_EXT8_INT 19
-#define STB_SCC_INT 20
-#define STB_SICC_RECV_INT 21
-#define STB_SICC_TRAN_INT 22
-#define STB_PPU_INT 23
-#define STB_DCRX_INT 24
-#define STB_EXT0_INT 25
-#define STB_EXT1_INT 26
-#define STB_EXT2_INT 27
-#define STB_EXT3_INT 28
-#define STB_EXT4_INT 29
-#define STB_REDWOOD_ENET_INT STB_EXT1_INT
-
-/*----------------------------------------------------------------------------+
-| STB tasks, task stack sizes, and task priorities. The actual task priority
-| is 1 more than the specified number since priority 0 is reserved (system
-| internally adds 1 to supplied priority number).
-+----------------------------------------------------------------------------*/
-#define STB_IDLE_TASK_SS (5* 1024)
-#define STB_IDLE_TASK_PRIO 0
-#define STB_LEDTEST_SS (2* 1024)
-#define STB_LEDTEST_PRIO 0
-#define STB_CURSOR_TASK_SS (10* 1024)
-#define STB_CURSOR_TASK_PRIO 7
-#define STB_MPEG_TASK_SS (10* 1024)
-#define STB_MPEG_TASK_PRIO 9
-#define STB_DEMUX_TASK_SS (10* 1024)
-#define STB_DEMUX_TASK_PRIO 20
-#define RAW_STB_IR_TASK_SS (10* 1024)
-#define RAW_STB_IR_TASK_PRIO 20
-
-#define STB_SERIAL_ER_TASK_SS (10* 1024)
-#define STB_SERIAL_ER_TASK_PRIO 1
-#define STB_CA_TASK_SS (10* 1024)
-#define STB_CA_TASK_PRIO 8
-
-#define INIT_DEFAULT_VIDEO_SS (10* 1024)
-#define INIT_DEFAULT_VIDEO_PRIO 8
-#define INIT_DEFAULT_SERVI_SS (10* 1024)
-#define INIT_DEFAULT_SERVI_PRIO 8
-#define INIT_DEFAULT_POST_SS (10* 1024)
-#define INIT_DEFAULT_POST_PRIO 8
-#define INIT_DEFAULT_INTER_SS (10* 1024)
-#define INIT_DEFAULT_INTER_PRIO 8
-#define INIT_DEFAULT_BR_SS (10* 1024)
-#define INIT_DEFAULT_BR_PRIO 8
-#define INITIAL_TASK_STACK_SIZE (32* 1024)
-
-#ifdef VESTA
-/*----------------------------------------------------------------------------+
-| Vesta Overall Address Map (all addresses are double mapped, bit 0 of the
-| address is not decoded. Numbers below are dependent on board configuration.
-| FLASH, SDRAM, DRAM numbers can be affected by actual board setup.
-|
-| FFE0,0000 - FFFF,FFFF FLASH
-| F200,0000 - F210,FFFF FPGA logic
-| Ethernet = F200,0000
-| LED Display = F200,0100
-| Xilinx #1 Regs = F204,0000
-| Xilinx #2 Regs = F208,0000
-| Spare = F20C,0000
-| IDE CS0 = F210,0000
-| F410,0000 - F410,FFFF IDE CS1
-| C000,0000 - C7FF,FFFF OBP
-| C000,0000 - C000,0014 SICC (16550 + infra red)
-| C001,0000 - C001,0018 PPU (Parallel Port)
-| C002,0000 - C002,001B SC0 (Smart Card 0)
-| C003,0000 - C003,000F I2C0
-| C004,0000 - C004,0009 SCC (16550 UART)
-| C005,0000 - C005,0124 GPT (Timers)
-| C006,0000 - C006,0058 GPIO0
-| C007,0000 - C007,001b SC1 (Smart Card 1)
-| C008,0000 - C008,FFFF Unused
-| C009,0000 - C009,FFFF Unused
-| C00A,0000 - C00A,FFFF Unused
-| C00B,0000 - C00B,000F I2C1
-| C00C,0000 - C00C,0006 SCP
-| C00D,0000 - C00D,0010 SSP
-| A000,0000 - A0FF,FFFF SDRAM1 (16M)
-| 0000,0000 - 00FF,FFFF SDRAM0 (16M)
-+----------------------------------------------------------------------------*/
-#define STB_FLASH_BASE_ADDRESS 0xFFE00000
-#define STB_FPGA_BASE_ADDRESS 0xF2000000
-#define STB_SICC_BASE_ADDRESS 0xC0000000
-#define STB_PPU_BASE_ADDR 0xC0010000
-#define STB_SC0_BASE_ADDRESS 0xC0020000
-#define STB_I2C1_BASE_ADDRESS 0xC0030000
-#define STB_SCC_BASE_ADDRESS 0xC0040000
-#define STB_TIMERS_BASE_ADDRESS 0xC0050000
-#define STB_GPIO0_BASE_ADDRESS 0xC0060000
-#define STB_SC1_BASE_ADDRESS 0xC0070000
-#define STB_I2C2_BASE_ADDRESS 0xC00B0000
-#define STB_SCP_BASE_ADDRESS 0xC00C0000
-#define STB_SSP_BASE_ADDRESS 0xC00D0000
-/*----------------------------------------------------------------------------+
-|The following are used by the IBM RTOS SW.
-|15-May-00 Changed these values to reflect movement of base addresses in
-|order to support 32MB of contiguous SDRAM space.
-|Points to the cacheable region since these values are used in IBM RTOS
-|to establish the vector address.
-+----------------------------------------------------------------------------*/
-#define STB_SDRAM1_BASE_ADDRESS 0x20000000
-#define STB_SDRAM1_SIZE 0x01000000
-#define STB_SDRAM0_BASE_ADDRESS 0x1F000000
-#define STB_SDRAM0_SIZE 0x01000000
-
-#else
-/*----------------------------------------------------------------------------+
-| ElPaso Overall Address Map (all addresses are double mapped, bit 0 of the
-| address is not decoded. Numbers below are dependent on board configuration.
-| FLASH, SDRAM, DRAM numbers can be affected by actual board setup. OPB
-| devices are inside the ElPaso chip.
-| FFE0,0000 - FFFF,FFFF FLASH
-| F144,0000 - F104,FFFF FPGA logic
-| F140,0000 - F100,0000 ethernet (through FPGA logic)
-| C000,0000 - C7FF,FFFF OBP
-| C000,0000 - C000,0014 SICC (16550+ infra red)
-| C001,0000 - C001,0016 PPU (parallel port)
-| C002,0000 - C002,001B SC (smart card)
-| C003,0000 - C003,000F I2C 1
-| C004,0000 - C004,0009 SCC (16550 UART)
-| C005,0000 - C005,0124 Timers
-| C006,0000 - C006,0058 GPIO0
-| C007,0000 - C007,0058 GPIO1
-| C008,0000 - C008,0058 GPIO2
-| C009,0000 - C009,0058 GPIO3
-| C00A,0000 - C00A,0058 GPIO4
-| C00B,0000 - C00B,000F I2C 2
-| C00C,0000 - C00C,0006 SCP
-| C00D,0000 - C00D,0006 SSP
-| A000,0000 - A0FF,FFFF SDRAM 16M
-| 0000,0000 - 00FF,FFFF DRAM 16M
-+----------------------------------------------------------------------------*/
-#define STB_FLASH_BASE_ADDRESS 0xFFE00000
-#define STB_FPGA_BASE_ADDRESS 0xF1440000
-#define STB_ENET_BASE_ADDRESS 0xF1400000
-#define STB_SICC_BASE_ADDRESS 0xC0000000
-#define STB_PPU_BASE_ADDR 0xC0010000
-#define STB_SC_BASE_ADDRESS 0xC0020000
-#define STB_I2C1_BASE_ADDRESS 0xC0030000
-#define STB_SCC_BASE_ADDRESS 0xC0040000
-#define STB_TIMERS_BASE_ADDRESS 0xC0050000
-#define STB_GPIO0_BASE_ADDRESS 0xC0060000
-#define STB_GPIO1_BASE_ADDRESS 0xC0070000
-#define STB_GPIO2_BASE_ADDRESS 0xC0080000
-#define STB_GPIO3_BASE_ADDRESS 0xC0090000
-#define STB_GPIO4_BASE_ADDRESS 0xC00A0000
-#define STB_I2C2_BASE_ADDRESS 0xC00B0000
-#define STB_SCP_BASE_ADDRESS 0xC00C0000
-#define STB_SSP_BASE_ADDRESS 0xC00D0000
-#define STB_SDRAM_BASE_ADDRESS 0xA0000000
-#endif
-
-/*----------------------------------------------------------------------------+
-| Other common defines.
-+----------------------------------------------------------------------------*/
-#ifndef TRUE
-#define TRUE 1
-#endif
-
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#endif /* _stb_h_ */
diff --git a/arch/ppc/boot/simple/uartlite_tty.c b/arch/ppc/boot/simple/uartlite_tty.c
deleted file mode 100644
index ca1743e..0000000
--- a/arch/ppc/boot/simple/uartlite_tty.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Xilinx UARTLITE bootloader driver
- *
- * Copyright (c) 2007 Secret Lab Technologies Ltd.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/types.h>
-#include <asm/serial.h>
-#include <asm/io.h>
-#include <platforms/4xx/xparameters/xparameters.h>
-
-#define UARTLITE_BASEADDR ((void*)(XPAR_UARTLITE_0_BASEADDR))
-
-unsigned long
-serial_init(int chan, void *ignored)
-{
- /* Clear the RX FIFO */
- out_be32(UARTLITE_BASEADDR + 0x0C, 0x2);
- return 0;
-}
-
-void
-serial_putc(unsigned long com_port, unsigned char c)
-{
- while ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x08) != 0); /* spin */
- out_be32(UARTLITE_BASEADDR + 0x4, c);
-}
-
-unsigned char
-serial_getc(unsigned long com_port)
-{
- while ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x01) == 0); /* spin */
- return in_be32(UARTLITE_BASEADDR);
-}
-
-int
-serial_tstc(unsigned long com_port)
-{
- return ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x01) != 0);
-}
diff --git a/arch/ppc/boot/utils/.gitignore b/arch/ppc/boot/utils/.gitignore
deleted file mode 100644
index bbdfb3b..0000000
--- a/arch/ppc/boot/utils/.gitignore
+++ /dev/null
@@ -1,3 +0,0 @@
-mkprep
-mkbugboot
-mktree
diff --git a/arch/ppc/boot/utils/elf.pl b/arch/ppc/boot/utils/elf.pl
deleted file mode 100644
index d3e9d9d..0000000
--- a/arch/ppc/boot/utils/elf.pl
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# ELF header field numbers
-#
-
-$e_ident = 0; # Identification bytes / magic number
-$e_type = 1; # ELF file type
-$e_machine = 2; # Target machine type
-$e_version = 3; # File version
-$e_entry = 4; # Start address
-$e_phoff = 5; # Program header file offset
-$e_shoff = 6; # Section header file offset
-$e_flags = 7; # File flags
-$e_ehsize = 8; # Size of ELF header
-$e_phentsize = 9; # Size of program header
-$e_phnum = 10; # Number of program header entries
-$e_shentsize = 11; # Size of section header
-$e_shnum = 12; # Number of section header entries
-$e_shstrndx = 13; # Section header table string index
-
-#
-# Section header field numbers
-#
-
-$sh_name = 0; # Section name
-$sh_type = 1; # Section header type
-$sh_flags = 2; # Section header flags
-$sh_addr = 3; # Virtual address
-$sh_offset = 4; # File offset
-$sh_size = 5; # Section size
-$sh_link = 6; # Miscellaneous info
-$sh_info = 7; # More miscellaneous info
-$sh_addralign = 8; # Memory alignment
-$sh_entsize = 9; # Entry size if this is a table
diff --git a/arch/ppc/boot/utils/mkbugboot.c b/arch/ppc/boot/utils/mkbugboot.c
deleted file mode 100644
index 1640c41..0000000
--- a/arch/ppc/boot/utils/mkbugboot.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * Makes a Motorola PPCBUG ROM bootable image which can be flashed
- * into one of the FLASH banks on a Motorola PowerPlus board.
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#define ELF_HEADER_SIZE 65536
-
-#include <unistd.h>
-#include <sys/stat.h>
-#include <string.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <errno.h>
-#include <fcntl.h>
-#include <netinet/in.h>
-#ifdef __sun__
-#include <inttypes.h>
-#else
-#include <stdint.h>
-#endif
-
-/* size of read buffer */
-#define SIZE 0x1000
-
-/* PPCBUG ROM boot header */
-typedef struct bug_boot_header {
- uint8_t magic_word[4]; /* "BOOT" */
- uint32_t entry_offset; /* Offset from top of header to code */
- uint32_t routine_length; /* Length of code */
- uint8_t routine_name[8]; /* Name of the boot code */
-} bug_boot_header_t;
-
-#define HEADER_SIZE sizeof(bug_boot_header_t)
-
-void update_checksum(void *buf, size_t size, uint16_t *sum)
-{
- uint32_t csum = *sum;
-
- while (size) {
- csum += *(uint16_t *)buf;
- if (csum > 0xffff)
- csum -= 0xffff;
- buf = (uint16_t *)buf + 1;
- size -= 2;
- }
- *sum = csum;
-}
-
-uint32_t copy_image(int in_fd, int out_fd, uint16_t *sum)
-{
- uint8_t buf[SIZE];
- int offset = 0;
- int n;
- uint32_t image_size = 0;
-
- lseek(in_fd, ELF_HEADER_SIZE, SEEK_SET);
-
- /* Copy an image while recording its size */
- while ( (n = read(in_fd, buf + offset, SIZE - offset)) > 0 ) {
- n += offset;
- offset = n & 1;
- n -= offset;
- image_size = image_size + n;
- /* who's going to deal with short writes? */
- write(out_fd, buf, n);
- update_checksum(buf, n, sum);
- if (offset)
- buf[0] = buf[n];
- }
-
- /* BUG romboot requires that our size is divisible by 2 */
- /* align image to 2 byte boundary */
- if (offset) {
- image_size += 2;
- buf[1] = '\0';
- write(out_fd, buf, 2);
- update_checksum(buf, 2, sum);
- }
- return image_size;
-}
-
-void write_bugboot_header(int out_fd, uint32_t boot_size, uint16_t *sum)
-{
- static bug_boot_header_t bbh = {
- .magic_word = "BOOT",
- .routine_name = "LINUXROM"
- };
-
- /* Fill in the PPCBUG ROM boot header */
- bbh.entry_offset = htonl(HEADER_SIZE); /* Entry address */
- bbh.routine_length= htonl(HEADER_SIZE+boot_size+2); /* Routine length */
-
- /* Output the header and bootloader to the file */
- write(out_fd, &bbh, sizeof(bug_boot_header_t));
- update_checksum(&bbh, sizeof(bug_boot_header_t), sum);
-}
-
-int main(int argc, char *argv[])
-{
- int image_fd, bugboot_fd;
- uint32_t kernel_size = 0;
- uint16_t checksum = 0;
-
- if (argc != 3) {
- fprintf(stderr, "usage: %s <kernel_image> <bugboot>\n",argv[0]);
- exit(-1);
- }
-
- /* Get file args */
-
- /* kernel image file */
- if ((image_fd = open(argv[1] , 0)) < 0)
- exit(-1);
-
- /* bugboot file */
- if (!strcmp(argv[2], "-"))
- bugboot_fd = 1; /* stdout */
- else if ((bugboot_fd = creat(argv[2] , 0755)) < 0)
- exit(-1);
-
- /* Set file position after ROM header block where zImage will be written */
- lseek(bugboot_fd, HEADER_SIZE, SEEK_SET);
-
- /* Copy kernel image into bugboot image */
- kernel_size = copy_image(image_fd, bugboot_fd, &checksum);
-
- /* Set file position to beginning where header/romboot will be written */
- lseek(bugboot_fd, 0, SEEK_SET);
-
- /* Write out BUG header/romboot */
- write_bugboot_header(bugboot_fd, kernel_size, &checksum);
-
- /* Write out the calculated checksum */
- lseek(bugboot_fd, 0, SEEK_END);
- write(bugboot_fd, &checksum, 2);
-
- /* Close bugboot file */
- close(bugboot_fd);
- return 0;
-}
diff --git a/arch/ppc/boot/utils/mkprep.c b/arch/ppc/boot/utils/mkprep.c
deleted file mode 100644
index 192bb39..0000000
--- a/arch/ppc/boot/utils/mkprep.c
+++ /dev/null
@@ -1,241 +0,0 @@
-/*
- * Makes a prep bootable image which can be dd'd onto
- * a disk device to make a bootdisk. Will take
- * as input a elf executable, strip off the header
- * and write out a boot image as:
- * 1) default - strips elf header
- * suitable as a network boot image
- * 2) -pbp - strips elf header and writes out prep boot partition image
- * cat or dd onto disk for booting
- * 3) -asm - strips elf header and writes out as asm data
- * useful for generating data for a compressed image
- * -- Cort
- *
- * Modified for x86 hosted builds by Matt Porter <porter@neta.com>
- * Modified for Sparc hosted builds by Peter Wahl <PeterWahl@web.de>
- */
-
-#include <stdio.h>
-#include <string.h>
-#include <stdlib.h>
-
-/* size of read buffer */
-#define SIZE 0x1000
-
-/*
- * Partition table entry
- * - from the PReP spec
- */
-typedef struct partition_entry {
- unsigned char boot_indicator;
- unsigned char starting_head;
- unsigned char starting_sector;
- unsigned char starting_cylinder;
-
- unsigned char system_indicator;
- unsigned char ending_head;
- unsigned char ending_sector;
- unsigned char ending_cylinder;
-
- unsigned char beginning_sector[4];
- unsigned char number_of_sectors[4];
-} partition_entry_t;
-
-#define BootActive 0x80
-#define SystemPrep 0x41
-
-void copy_image(FILE *, FILE *);
-void write_prep_partition(FILE *, FILE *);
-void write_asm_data(FILE *, FILE *);
-
-unsigned int elfhdr_size = 65536;
-
-int main(int argc, char *argv[])
-{
- FILE *in, *out;
- int argptr = 1;
- int prep = 0;
- int asmoutput = 0;
-
- if (argc < 3 || argc > 4) {
- fprintf(stderr, "usage: %s [-pbp] [-asm] <boot-file> <image>\n",
- argv[0]);
- exit(-1);
- }
-
-/* needs to handle args more elegantly -- but this is a small/simple program */
-
- /* check for -pbp */
- if (!strcmp(argv[argptr], "-pbp")) {
- prep = 1;
- argptr++;
- }
-
- /* check for -asm */
- if (!strcmp(argv[argptr], "-asm")) {
- asmoutput = 1;
- argptr++;
- }
-
- /* input file */
- if (!strcmp(argv[argptr], "-"))
- in = stdin;
- else if (!(in = fopen(argv[argptr], "r")))
- exit(-1);
- argptr++;
-
- /* output file */
- if (!strcmp(argv[argptr], "-"))
- out = stdout;
- else if (!(out = fopen(argv[argptr], "w")))
- exit(-1);
- argptr++;
-
- /* skip elf header in input file */
- /*if ( !prep )*/
- fseek(in, elfhdr_size, SEEK_SET);
-
- /* write prep partition if necessary */
- if (prep)
- write_prep_partition(in, out);
-
- /* write input image to bootimage */
- if (asmoutput)
- write_asm_data(in, out);
- else
- copy_image(in, out);
-
- return 0;
-}
-
-void store_le32(unsigned int v, unsigned char *p)
-{
- p[0] = v;
- p[1] = v >>= 8;
- p[2] = v >>= 8;
- p[3] = v >> 8;
-}
-
-void write_prep_partition(FILE *in, FILE *out)
-{
- unsigned char block[512];
- partition_entry_t pe;
- unsigned char *entry = block;
- unsigned char *length = block + 4;
- long pos = ftell(in), size;
-
- if (fseek(in, 0, SEEK_END) < 0) {
- fprintf(stderr,"info failed\n");
- exit(-1);
- }
- size = ftell(in);
- if (fseek(in, pos, SEEK_SET) < 0) {
- fprintf(stderr,"info failed\n");
- exit(-1);
- }
-
- memset(block, '\0', sizeof(block));
-
- /* set entry point and boot image size skipping over elf header */
- store_le32(0x400/*+65536*/, entry);
- store_le32(size-elfhdr_size+0x400, length);
-
- /* sets magic number for msdos partition (used by linux) */
- block[510] = 0x55;
- block[511] = 0xAA;
-
- /*
- * Build a "PReP" partition table entry in the boot record
- * - "PReP" may only look at the system_indicator
- */
- pe.boot_indicator = BootActive;
- pe.system_indicator = SystemPrep;
- /*
- * The first block of the diskette is used by this "boot record" which
- * actually contains the partition table. (The first block of the
- * partition contains the boot image, but I digress...) We'll set up
- * one partition on the diskette and it shall contain the rest of the
- * diskette.
- */
- pe.starting_head = 0; /* zero-based */
- pe.starting_sector = 2; /* one-based */
- pe.starting_cylinder = 0; /* zero-based */
- pe.ending_head = 1; /* assumes two heads */
- pe.ending_sector = 18; /* assumes 18 sectors/track */
- pe.ending_cylinder = 79; /* assumes 80 cylinders/diskette */
-
- /*
- * The "PReP" software ignores the above fields and just looks at
- * the next two.
- * - size of the diskette is (assumed to be)
- * (2 tracks/cylinder)(18 sectors/tracks)(80 cylinders/diskette)
- * - unlike the above sector numbers, the beginning sector is zero-based!
- */
-#if 0
- store_le32(1, pe.beginning_sector);
-#else
- /* This has to be 0 on the PowerStack? */
- store_le32(0, pe.beginning_sector);
-#endif
-
- store_le32(2*18*80-1, pe.number_of_sectors);
-
- memcpy(&block[0x1BE], &pe, sizeof(pe));
-
- fwrite(block, sizeof(block), 1, out);
- fwrite(entry, 4, 1, out);
- fwrite(length, 4, 1, out);
- /* set file position to 2nd sector where image will be written */
- fseek( out, 0x400, SEEK_SET );
-}
-
-
-
-void copy_image(FILE *in, FILE *out)
-{
- char buf[SIZE];
- int n;
-
- while ( (n = fread(buf, 1, SIZE, in)) > 0 )
- fwrite(buf, 1, n, out);
-}
-
-
-void
-write_asm_data(FILE *in, FILE *out)
-{
- int i, cnt, pos = 0;
- unsigned int cksum = 0, val;
- unsigned char *lp;
- unsigned char buf[SIZE];
- size_t len;
-
- fputs("\t.data\n\t.globl input_data\ninput_data:\n", out);
- while ((len = fread(buf, 1, sizeof(buf), in)) > 0) {
- cnt = 0;
- lp = buf;
- /* Round up to longwords */
- while (len & 3)
- buf[len++] = '\0';
- for (i = 0; i < len; i += 4) {
- if (cnt == 0)
- fputs("\t.long\t", out);
- fprintf(out, "0x%02X%02X%02X%02X",
- lp[0], lp[1], lp[2], lp[3]);
- val = *(unsigned long *)lp;
- cksum ^= val;
- lp += 4;
- if (++cnt == 4) {
- cnt = 0;
- fprintf(out, " # %x \n", pos+i-12);
- } else {
- fputs(",", out);
- }
- }
- if (cnt)
- fputs("0\n", out);
- pos += len;
- }
- fprintf(out, "\t.globl input_len\ninput_len:\t.long\t0x%x\n", pos);
- fprintf(stderr, "cksum = %x\n", cksum);
-}
diff --git a/arch/ppc/boot/utils/mktree.c b/arch/ppc/boot/utils/mktree.c
deleted file mode 100644
index 2be22e2..0000000
--- a/arch/ppc/boot/utils/mktree.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/*
- * Makes a tree bootable image for IBM Evaluation boards.
- * Basically, just take a zImage, skip the ELF header, and stuff
- * a 32 byte header on the front.
- *
- * We use htonl, which is a network macro, to make sure we're doing
- * The Right Thing on an LE machine. It's non-obvious, but it should
- * work on anything BSD'ish.
- */
-
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/stat.h>
-#include <unistd.h>
-#include <netinet/in.h>
-#ifdef __sun__
-#include <inttypes.h>
-#else
-#include <stdint.h>
-#endif
-
-/* This gets tacked on the front of the image. There are also a few
- * bytes allocated after the _start label used by the boot rom (see
- * head.S for details).
- */
-typedef struct boot_block {
- uint32_t bb_magic; /* 0x0052504F */
- uint32_t bb_dest; /* Target address of the image */
- uint32_t bb_num_512blocks; /* Size, rounded-up, in 512 byte blks */
- uint32_t bb_debug_flag; /* Run debugger or image after load */
- uint32_t bb_entry_point; /* The image address to start */
- uint32_t bb_checksum; /* 32 bit checksum including header */
- uint32_t reserved[2];
-} boot_block_t;
-
-#define IMGBLK 512
-char tmpbuf[IMGBLK];
-
-int main(int argc, char *argv[])
-{
- int in_fd, out_fd;
- int nblks, i;
- uint cksum, *cp;
- struct stat st;
- boot_block_t bt;
-
- if (argc < 3) {
- fprintf(stderr, "usage: %s <zImage-file> <boot-image> [entry-point]\n",argv[0]);
- exit(1);
- }
-
- if (stat(argv[1], &st) < 0) {
- perror("stat");
- exit(2);
- }
-
- nblks = (st.st_size + IMGBLK) / IMGBLK;
-
- bt.bb_magic = htonl(0x0052504F);
-
- /* If we have the optional entry point parameter, use it */
- if (argc == 4)
- bt.bb_dest = bt.bb_entry_point = htonl(strtoul(argv[3], NULL, 0));
- else
- bt.bb_dest = bt.bb_entry_point = htonl(0x500000);
-
- /* We know these from the linker command.
- * ...and then move it up into memory a little more so the
- * relocation can happen.
- */
- bt.bb_num_512blocks = htonl(nblks);
- bt.bb_debug_flag = 0;
-
- bt.bb_checksum = 0;
-
- /* To be neat and tidy :-).
- */
- bt.reserved[0] = 0;
- bt.reserved[1] = 0;
-
- if ((in_fd = open(argv[1], O_RDONLY)) < 0) {
- perror("zImage open");
- exit(3);
- }
-
- if ((out_fd = open(argv[2], (O_RDWR | O_CREAT | O_TRUNC), 0666)) < 0) {
- perror("bootfile open");
- exit(3);
- }
-
- cksum = 0;
- cp = (void *)&bt;
- for (i=0; i<sizeof(bt)/sizeof(uint); i++)
- cksum += *cp++;
-
- /* Assume zImage is an ELF file, and skip the 64K header.
- */
- if (read(in_fd, tmpbuf, IMGBLK) != IMGBLK) {
- fprintf(stderr, "%s is too small to be an ELF image\n",
- argv[1]);
- exit(4);
- }
-
- if ((*(uint *)tmpbuf) != htonl(0x7f454c46)) {
- fprintf(stderr, "%s is not an ELF image\n", argv[1]);
- exit(4);
- }
-
- if (lseek(in_fd, (64 * 1024), SEEK_SET) < 0) {
- fprintf(stderr, "%s failed to seek in ELF image\n", argv[1]);
- exit(4);
- }
-
- nblks -= (64 * 1024) / IMGBLK;
-
- /* And away we go......
- */
- if (write(out_fd, &bt, sizeof(bt)) != sizeof(bt)) {
- perror("boot-image write");
- exit(5);
- }
-
- while (nblks-- > 0) {
- if (read(in_fd, tmpbuf, IMGBLK) < 0) {
- perror("zImage read");
- exit(5);
- }
- cp = (uint *)tmpbuf;
- for (i=0; i<sizeof(tmpbuf)/sizeof(uint); i++)
- cksum += *cp++;
- if (write(out_fd, tmpbuf, sizeof(tmpbuf)) != sizeof(tmpbuf)) {
- perror("boot-image write");
- exit(5);
- }
- }
-
- /* rewrite the header with the computed checksum.
- */
- bt.bb_checksum = htonl(cksum);
- if (lseek(out_fd, 0, SEEK_SET) < 0) {
- perror("rewrite seek");
- exit(1);
- }
- if (write(out_fd, &bt, sizeof(bt)) != sizeof(bt)) {
- perror("boot-image rewrite");
- exit(1);
- }
-
- exit(0);
-}
diff --git a/arch/ppc/configs/FADS_defconfig b/arch/ppc/configs/FADS_defconfig
deleted file mode 100644
index c1934f8..0000000
--- a/arch/ppc/configs/FADS_defconfig
+++ /dev/null
@@ -1,520 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-CONFIG_8xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_SERIAL_CONSOLE=y
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_RPXLITE is not set
-# CONFIG_RPXCLASSIC is not set
-# CONFIG_BSEIP is not set
-CONFIG_FADS=y
-# CONFIG_TQM823L is not set
-# CONFIG_TQM850L is not set
-# CONFIG_TQM855L is not set
-# CONFIG_TQM860L is not set
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-# CONFIG_IVMS8 is not set
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-# CONFIG_MBX is not set
-# CONFIG_WINCEPT is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-# CONFIG_SERIAL_CPM_SCC2 is not set
-# CONFIG_SERIAL_CPM_SCC3 is not set
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-CONFIG_SERIAL_CPM_SMC2=y
-# CONFIG_SERIAL_CPM_ALT_SMC2 is not set
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# MPC8xx CPM Options
-#
-CONFIG_SCC_ENET=y
-CONFIG_SCC1_ENET=y
-# CONFIG_SCC2_ENET is not set
-# CONFIG_SCC3_ENET is not set
-# CONFIG_FEC_ENET is not set
-CONFIG_ENET_BIG_BUFFERS=y
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-# CONFIG_8xx_CPU6 is not set
-# CONFIG_UCODE_PATCH is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/IVMS8_defconfig b/arch/ppc/configs/IVMS8_defconfig
deleted file mode 100644
index 66bbefe..0000000
--- a/arch/ppc/configs/IVMS8_defconfig
+++ /dev/null
@@ -1,548 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-CONFIG_8xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_SERIAL_CONSOLE=y
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_RPXLITE is not set
-# CONFIG_RPXCLASSIC is not set
-# CONFIG_BSEIP is not set
-# CONFIG_FADS is not set
-# CONFIG_TQM823L is not set
-# CONFIG_TQM850L is not set
-# CONFIG_TQM855L is not set
-# CONFIG_TQM860L is not set
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-CONFIG_IVMS8=y
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-# CONFIG_MBX is not set
-# CONFIG_WINCEPT is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-CONFIG_IDEDISK_MULTI_MODE=y
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_BLK_DEV_MPC8xx_IDE=y
-CONFIG_IDE_8xx_PCCARD=y
-# CONFIG_IDE_8xx_DIRECT is not set
-# CONFIG_IDE_EXT_DIRECT is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-# CONFIG_SERIAL_CPM_SCC2 is not set
-# CONFIG_SERIAL_CPM_SCC3 is not set
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-# CONFIG_SERIAL_CPM_SMC2 is not set
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-CONFIG_MAC_PARTITION=y
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# MPC8xx CPM Options
-#
-# CONFIG_SCC_ENET is not set
-CONFIG_FEC_ENET=y
-CONFIG_USE_MDIO=y
-CONFIG_FEC_AM79C874=y
-CONFIG_FEC_LXT970=y
-CONFIG_FEC_LXT971=y
-CONFIG_FEC_QS6612=y
-CONFIG_ENET_BIG_BUFFERS=y
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-# CONFIG_8xx_CPU6 is not set
-# CONFIG_UCODE_PATCH is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/TQM823L_defconfig b/arch/ppc/configs/TQM823L_defconfig
deleted file mode 100644
index 3b44f3d..0000000
--- a/arch/ppc/configs/TQM823L_defconfig
+++ /dev/null
@@ -1,521 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-CONFIG_8xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_SERIAL_CONSOLE=y
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_RPXLITE is not set
-# CONFIG_RPXCLASSIC is not set
-# CONFIG_BSEIP is not set
-# CONFIG_FADS is not set
-CONFIG_TQM823L=y
-# CONFIG_TQM850L is not set
-# CONFIG_TQM855L is not set
-# CONFIG_TQM860L is not set
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-# CONFIG_IVMS8 is not set
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-# CONFIG_MBX is not set
-# CONFIG_WINCEPT is not set
-CONFIG_TQM8xxL=y
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-# CONFIG_SERIAL_CPM_SCC2 is not set
-# CONFIG_SERIAL_CPM_SCC3 is not set
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-CONFIG_SERIAL_CPM_SMC2=y
-CONFIG_SERIAL_CPM_ALT_SMC2=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# MPC8xx CPM Options
-#
-CONFIG_SCC_ENET=y
-# CONFIG_SCC1_ENET is not set
-CONFIG_SCC2_ENET=y
-# CONFIG_SCC3_ENET is not set
-# CONFIG_FEC_ENET is not set
-CONFIG_ENET_BIG_BUFFERS=y
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-# CONFIG_8xx_CPU6 is not set
-# CONFIG_UCODE_PATCH is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/TQM8260_defconfig b/arch/ppc/configs/TQM8260_defconfig
deleted file mode 100644
index 57cfa83..0000000
--- a/arch/ppc/configs/TQM8260_defconfig
+++ /dev/null
@@ -1,499 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_8xx is not set
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_8260=y
-CONFIG_PPC_STD_MMU=y
-CONFIG_SERIAL_CONSOLE=y
-# CONFIG_EST8260 is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-CONFIG_TQM8260=y
-# CONFIG_WILLOW_1 is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PC_KEYBOARD is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_PPC601_SYNC_FIX is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=32
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-# CONFIG_TMPFS is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-# CONFIG_SCC_ENET is not set
-CONFIG_FEC_ENET=y
-# CONFIG_USE_MDIO is not set
-
-#
-# MPC8260 CPM Options
-#
-CONFIG_SCC_CONSOLE=y
-# CONFIG_FCC1_ENET is not set
-CONFIG_FCC2_ENET=y
-# CONFIG_FCC3_ENET is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/TQM850L_defconfig b/arch/ppc/configs/TQM850L_defconfig
deleted file mode 100644
index b02d196..0000000
--- a/arch/ppc/configs/TQM850L_defconfig
+++ /dev/null
@@ -1,521 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-CONFIG_8xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_SERIAL_CONSOLE=y
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_RPXLITE is not set
-# CONFIG_RPXCLASSIC is not set
-# CONFIG_BSEIP is not set
-# CONFIG_FADS is not set
-# CONFIG_TQM823L is not set
-CONFIG_TQM850L=y
-# CONFIG_TQM855L is not set
-# CONFIG_TQM860L is not set
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-# CONFIG_IVMS8 is not set
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-# CONFIG_MBX is not set
-# CONFIG_WINCEPT is not set
-CONFIG_TQM8xxL=y
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-# CONFIG_SERIAL_CPM_SCC2 is not set
-# CONFIG_SERIAL_CPM_SCC3 is not set
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-CONFIG_SERIAL_CPM_SMC2=y
-CONFIG_SERIAL_CPM_ALT_SMC2=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# MPC8xx CPM Options
-#
-CONFIG_SCC_ENET=y
-# CONFIG_SCC1_ENET is not set
-CONFIG_SCC2_ENET=y
-# CONFIG_SCC3_ENET is not set
-# CONFIG_FEC_ENET is not set
-CONFIG_ENET_BIG_BUFFERS=y
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-CONFIG_8xx_CPU6=y
-# CONFIG_UCODE_PATCH is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/TQM860L_defconfig b/arch/ppc/configs/TQM860L_defconfig
deleted file mode 100644
index 857e4ab..0000000
--- a/arch/ppc/configs/TQM860L_defconfig
+++ /dev/null
@@ -1,549 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-CONFIG_8xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_SERIAL_CONSOLE=y
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_RPXLITE is not set
-# CONFIG_RPXCLASSIC is not set
-# CONFIG_BSEIP is not set
-# CONFIG_FADS is not set
-# CONFIG_TQM823L is not set
-# CONFIG_TQM850L is not set
-# CONFIG_TQM855L is not set
-CONFIG_TQM860L=y
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-# CONFIG_IVMS8 is not set
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-# CONFIG_MBX is not set
-# CONFIG_WINCEPT is not set
-CONFIG_TQM8xxL=y
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-CONFIG_IDE=y
-
-#
-# IDE, ATA and ATAPI Block devices
-#
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_HD is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_BLK_DEV_MPC8xx_IDE=y
-CONFIG_IDE_8xx_PCCARD=y
-# CONFIG_IDE_8xx_DIRECT is not set
-# CONFIG_IDE_EXT_DIRECT is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-# CONFIG_SERIAL_CPM_SCC2 is not set
-# CONFIG_SERIAL_CPM_SCC3 is not set
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-CONFIG_SERIAL_CPM_SMC2=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-CONFIG_MAC_PARTITION=y
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# MPC8xx CPM Options
-#
-CONFIG_SCC_ENET=y
-CONFIG_SCC1_ENET=y
-# CONFIG_SCC2_ENET is not set
-# CONFIG_SCC3_ENET is not set
-# CONFIG_FEC_ENET is not set
-CONFIG_ENET_BIG_BUFFERS=y
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-# CONFIG_8xx_CPU6 is not set
-# CONFIG_UCODE_PATCH is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/bamboo_defconfig b/arch/ppc/configs/bamboo_defconfig
deleted file mode 100644
index 41fd393..0000000
--- a/arch/ppc/configs/bamboo_defconfig
+++ /dev/null
@@ -1,944 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.12
-# Tue Jun 28 15:24:25 2005
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-CONFIG_44x=y
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-CONFIG_PPC_FPU=y
-CONFIG_BOOKE=y
-CONFIG_PTE_64BIT=y
-CONFIG_PHYS_64BIT=y
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_BAMBOO=y
-# CONFIG_EBONY is not set
-# CONFIG_LUAN is not set
-# CONFIG_OCOTEA is not set
-CONFIG_440EP=y
-CONFIG_440=y
-CONFIG_IBM440EP_ERR42=y
-CONFIG_IBM_OCP=y
-# CONFIG_PPC4xx_DMA is not set
-CONFIG_PPC_GEN550=y
-# CONFIG_PM is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-CONFIG_SECCOMP=y
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-# CONFIG_PCI_DEBUG is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x01000000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-# CONFIG_STANDALONE is not set
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-# CONFIG_BLK_DEV_UB is not set
-# CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-CONFIG_BLK_DEV_IDEPCI=y
-# CONFIG_IDEPCI_SHARE_IRQ is not set
-# CONFIG_BLK_DEV_OFFBOARD is not set
-# CONFIG_BLK_DEV_GENERIC is not set
-# CONFIG_BLK_DEV_OPTI621 is not set
-# CONFIG_BLK_DEV_SL82C105 is not set
-CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
-# CONFIG_IDEDMA_PCI_AUTO is not set
-# CONFIG_BLK_DEV_AEC62XX is not set
-# CONFIG_BLK_DEV_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD74XX is not set
-CONFIG_BLK_DEV_CMD64X=y
-# CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
-# CONFIG_BLK_DEV_CS5520 is not set
-# CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
-# CONFIG_BLK_DEV_HPT366 is not set
-# CONFIG_BLK_DEV_SC1200 is not set
-# CONFIG_BLK_DEV_PIIX is not set
-# CONFIG_BLK_DEV_IT821X is not set
-# CONFIG_BLK_DEV_NS87415 is not set
-# CONFIG_BLK_DEV_PDC202XX_OLD is not set
-# CONFIG_BLK_DEV_PDC202XX_NEW is not set
-# CONFIG_BLK_DEV_SVWKS is not set
-# CONFIG_BLK_DEV_SIIMAGE is not set
-# CONFIG_BLK_DEV_SLC90E66 is not set
-# CONFIG_BLK_DEV_TRM290 is not set
-# CONFIG_BLK_DEV_VIA82CXXX is not set
-# CONFIG_IDE_ARM is not set
-CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_IDEDMA_IVB is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-# CONFIG_BLK_DEV_SD is not set
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-# CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI Transport Attributes
-#
-CONFIG_SCSI_SPI_ATTRS=y
-# CONFIG_SCSI_FC_ATTRS is not set
-# CONFIG_SCSI_ISCSI_ATTRS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA21XX is not set
-# CONFIG_SCSI_QLA22XX is not set
-# CONFIG_SCSI_QLA2300 is not set
-# CONFIG_SCSI_QLA2322 is not set
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_LPFC is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-# CONFIG_FUSION_SPI is not set
-# CONFIG_FUSION_FC is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_CONNTRACK_MARK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_IBM_EMAC=y
-# CONFIG_IBM_EMAC_ERRMSG is not set
-CONFIG_IBM_EMAC_RXB=64
-CONFIG_IBM_EMAC_TXB=8
-CONFIG_IBM_EMAC_FGAP=8
-CONFIG_IBM_EMAC_SKBRES=0
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-CONFIG_EEPRO100=y
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-CONFIG_NATSEMI=y
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-CONFIG_E1000=y
-# CONFIG_E1000_NAPI is not set
-# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_LIBPS2 is not set
-# CONFIG_SERIO_RAW is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-CONFIG_USB=y
-CONFIG_USB_DEBUG=y
-
-#
-# Miscellaneous USB options
-#
-# CONFIG_USB_DEVICEFS is not set
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_OTG is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_EHCI_HCD is not set
-# CONFIG_USB_ISP116X_HCD is not set
-# CONFIG_USB_OHCI_HCD is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_SL811_HCD is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_BLUETOOTH_TTY is not set
-# CONFIG_USB_ACM is not set
-# CONFIG_USB_PRINTER is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
-# CONFIG_USB_STORAGE is not set
-
-#
-# USB Input Devices
-#
-# CONFIG_USB_HID is not set
-
-#
-# USB HID Boot Protocol drivers
-#
-# CONFIG_USB_KBD is not set
-# CONFIG_USB_MOUSE is not set
-# CONFIG_USB_AIPTEK is not set
-# CONFIG_USB_WACOM is not set
-# CONFIG_USB_ACECAD is not set
-# CONFIG_USB_KBTAB is not set
-# CONFIG_USB_POWERMATE is not set
-# CONFIG_USB_MTOUCH is not set
-# CONFIG_USB_ITMTOUCH is not set
-# CONFIG_USB_EGALAX is not set
-# CONFIG_USB_XPAD is not set
-# CONFIG_USB_ATI_REMOTE is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_MICROTEK is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_DABUSB is not set
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-
-#
-# USB Network Adapters
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-CONFIG_USB_PEGASUS=y
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
-CONFIG_USB_MON=y
-
-#
-# USB port drivers
-#
-
-#
-# USB Serial Converter support
-#
-# CONFIG_USB_SERIAL is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGETKIT is not set
-# CONFIG_USB_PHIDGETSERVO is not set
-# CONFIG_USB_IDMOUSE is not set
-
-#
-# USB DSL modem support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# SN Devices
-#
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-
-#
-# XFS support
-#
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_FS is not set
-# CONFIG_KGDB is not set
-# CONFIG_XMON is not set
-CONFIG_BDI_SWITCH=y
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_PPC_OCP=y
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/bseip_defconfig b/arch/ppc/configs/bseip_defconfig
deleted file mode 100644
index ce9f9f77..0000000
--- a/arch/ppc/configs/bseip_defconfig
+++ /dev/null
@@ -1,517 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-CONFIG_8xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_SERIAL_CONSOLE=y
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_RPXLITE is not set
-# CONFIG_RPXCLASSIC is not set
-CONFIG_BSEIP=y
-# CONFIG_FADS is not set
-# CONFIG_TQM823L is not set
-# CONFIG_TQM850L is not set
-# CONFIG_TQM855L is not set
-# CONFIG_TQM860L is not set
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-# CONFIG_IVMS8 is not set
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-# CONFIG_MBX is not set
-# CONFIG_WINCEPT is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-# CONFIG_SERIAL_CPM_SCC2 is not set
-# CONFIG_SERIAL_CPM_SCC3 is not set
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-CONFIG_SERIAL_CPM_SMC2=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# MPC8xx CPM Options
-#
-CONFIG_SCC_ENET=y
-# CONFIG_SCC1_ENET is not set
-CONFIG_SCC2_ENET=y
-# CONFIG_SCC3_ENET is not set
-# CONFIG_FEC_ENET is not set
-# CONFIG_ENET_BIG_BUFFERS is not set
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-# CONFIG_8xx_CPU6 is not set
-# CONFIG_UCODE_PATCH is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/bubinga_defconfig b/arch/ppc/configs/bubinga_defconfig
deleted file mode 100644
index ebec801..0000000
--- a/arch/ppc/configs/bubinga_defconfig
+++ /dev/null
@@ -1,592 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_ASH is not set
-CONFIG_BUBINGA=y
-# CONFIG_CPCI405 is not set
-# CONFIG_EP405 is not set
-# CONFIG_OAK is not set
-# CONFIG_REDWOOD_5 is not set
-# CONFIG_REDWOOD_6 is not set
-# CONFIG_SYCAMORE is not set
-# CONFIG_WALNUT is not set
-CONFIG_IBM405_ERR77=y
-CONFIG_IBM405_ERR51=y
-CONFIG_IBM_OCP=y
-CONFIG_BIOS_FIXUP=y
-CONFIG_405EP=y
-CONFIG_IBM_OPENBIOS=y
-# CONFIG_PM is not set
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-CONFIG_IBM_EMAC=y
-# CONFIG_IBM_EMAC_ERRMSG is not set
-CONFIG_IBM_EMAC_RXB=64
-CONFIG_IBM_EMAC_TXB=8
-CONFIG_IBM_EMAC_FGAP=8
-CONFIG_IBM_EMAC_SKBRES=0
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_PPC_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/chestnut_defconfig b/arch/ppc/configs/chestnut_defconfig
deleted file mode 100644
index e219aad..0000000
--- a/arch/ppc/configs/chestnut_defconfig
+++ /dev/null
@@ -1,794 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11
-# Fri Mar 11 14:32:49 2005
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_GEN550=y
-CONFIG_PPC_STD_MMU=y
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_KATANA is not set
-# CONFIG_WILLOW is not set
-# CONFIG_CPCI690 is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-CONFIG_CHESTNUT=y
-# CONFIG_SPRUCE is not set
-# CONFIG_EV64260 is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_RADSTONE_PPC7D is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_PQ2FADS is not set
-# CONFIG_LITE5200 is not set
-# CONFIG_MPC834x_SYS is not set
-CONFIG_MV64360=y
-CONFIG_MV64X60=y
-
-#
-# Set bridge options
-#
-CONFIG_MV64X60_BASE=0xf1000000
-CONFIG_MV64X60_NEW_BASE=0xf1000000
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0,115200 ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# PC-card bridges
-#
-
-#
-# Advanced setup
-#
-CONFIG_ADVANCED_OPTIONS=y
-CONFIG_HIGHMEM_START=0xfe000000
-# CONFIG_LOWMEM_SIZE_BOOL is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-# CONFIG_KERNEL_START_BOOL is not set
-CONFIG_KERNEL_START=0xc0000000
-# CONFIG_TASK_SIZE_BOOL is not set
-CONFIG_TASK_SIZE=0x80000000
-# CONFIG_CONSISTENT_START_BOOL is not set
-CONFIG_CONSISTENT_START=0xff100000
-# CONFIG_CONSISTENT_SIZE_BOOL is not set
-CONFIG_CONSISTENT_SIZE=0x00200000
-# CONFIG_BOOT_LOAD_BOOL is not set
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-# CONFIG_MTD_CFI_NOSWAP is not set
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_XIP is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0xfc000000
-CONFIG_MTD_PHYSMAP_LEN=0x02000000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=4
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-CONFIG_TULIP_MMIO=y
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-CONFIG_MV643XX_ETH=y
-CONFIG_MV643XX_ETH_0=y
-CONFIG_MV643XX_ETH_1=y
-# CONFIG_MV643XX_ETH_2 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-# CONFIG_SERIAL_MPSC is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-
-#
-# XFS support
-#
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-CONFIG_DEVFS_FS=y
-CONFIG_DEVFS_MOUNT=y
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_JFFS2_FS_NOR_ECC is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_PRINTK_TIME is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/cpci405_defconfig b/arch/ppc/configs/cpci405_defconfig
deleted file mode 100644
index a336ffa..0000000
--- a/arch/ppc/configs/cpci405_defconfig
+++ /dev/null
@@ -1,631 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_ASH is not set
-CONFIG_CPCI405=y
-# CONFIG_EP405 is not set
-# CONFIG_EVB405EP is not set
-# CONFIG_OAK is not set
-# CONFIG_REDWOOD_5 is not set
-# CONFIG_REDWOOD_6 is not set
-# CONFIG_SYCAMORE is not set
-# CONFIG_WALNUT is not set
-CONFIG_IBM405_ERR77=y
-CONFIG_IBM405_ERR51=y
-CONFIG_IBM_OCP=y
-CONFIG_PPC_OCP=y
-CONFIG_405GP=y
-# CONFIG_PM is not set
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-CONFIG_IBM_EMAC=y
-# CONFIG_IBM_EMAC_ERRMSG is not set
-CONFIG_IBM_EMAC_RXB=64
-CONFIG_IBM_EMAC_TXB=8
-CONFIG_IBM_EMAC_FGAP=8
-CONFIG_IBM_EMAC_SKBRES=0
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_UNIX98_PTYS is not set
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/cpci690_defconfig b/arch/ppc/configs/cpci690_defconfig
deleted file mode 100644
index ff3f7e0..0000000
--- a/arch/ppc/configs/cpci690_defconfig
+++ /dev/null
@@ -1,798 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13-mm1
-# Thu Sep 1 17:10:37 2005
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-CONFIG_PPC_FPU=y
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-# CONFIG_WANT_EARLY_SERIAL is not set
-CONFIG_PPC_STD_MMU=y
-# CONFIG_NOT_COHERENT_CACHE is not set
-
-#
-# Performance-monitoring counters support
-#
-# CONFIG_PERFCTR is not set
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_KATANA is not set
-# CONFIG_WILLOW is not set
-CONFIG_CPCI690=y
-# CONFIG_POWERPMC250 is not set
-# CONFIG_CHESTNUT is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_HDPU is not set
-# CONFIG_EV64260 is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_RADSTONE_PPC7D is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_PQ2FADS is not set
-# CONFIG_LITE5200 is not set
-# CONFIG_MPC834x_SYS is not set
-# CONFIG_EV64360 is not set
-CONFIG_GT64260=y
-CONFIG_MV64X60=y
-
-#
-# Set bridge options
-#
-CONFIG_MV64X60_BASE=0xf1000000
-CONFIG_MV64X60_NEW_BASE=0xf1000000
-# CONFIG_SMP is not set
-CONFIG_HIGHMEM=y
-CONFIG_HZ_100=y
-# CONFIG_HZ_250 is not set
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=100
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyMM0 ip=on"
-# CONFIG_PM is not set
-CONFIG_SECCOMP=y
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETFILTER_NETLINK is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# PHY device support
-#
-# CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_ULI526X is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-CONFIG_EEPRO100=y
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_KGDBOE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NETPOLL_RX is not set
-# CONFIG_NETPOLL_TRAP is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_MPSC=y
-CONFIG_SERIAL_MPSC_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-CONFIG_HWMON=y
-# CONFIG_HWMON_VID is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia Capabilities Port drivers
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Speakup console speech
-#
-# CONFIG_SPEAKUP is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# SN Devices
-#
-
-#
-# Distributed Lock Manager
-#
-# CONFIG_DLM is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_REISER4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-
-#
-# XFS support
-#
-# CONFIG_XFS_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
-# CONFIG_RELAYFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_ASFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-CONFIG_NFS_V4=y
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-CONFIG_SUNRPC_GSS=y
-CONFIG_RPCSEC_GSS_KRB5=y
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_MD4 is not set
-CONFIG_CRYPTO_MD5=y
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_CRYPTO_TGR192 is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_AES is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/ebony_defconfig b/arch/ppc/configs/ebony_defconfig
deleted file mode 100644
index c8deca3..0000000
--- a/arch/ppc/configs/ebony_defconfig
+++ /dev/null
@@ -1,585 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODULE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-CONFIG_44x=y
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-CONFIG_BOOKE=y
-CONFIG_PTE_64BIT=y
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_EBONY=y
-# CONFIG_OCOTEA is not set
-CONFIG_440GP=y
-CONFIG_440=y
-CONFIG_IBM_OCP=y
-# CONFIG_PM is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x01000000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-# CONFIG_BLK_DEV_RAM is not set
-CONFIG_LBD=y
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-CONFIG_IBM_EMAC=y
-# CONFIG_IBM_EMAC_ERRMSG is not set
-CONFIG_IBM_EMAC_RXB=64
-CONFIG_IBM_EMAC_TXB=8
-CONFIG_IBM_EMAC_FGAP=8
-CONFIG_IBM_EMAC_SKBRES=0
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_KGDB is not set
-# CONFIG_XMON is not set
-CONFIG_BDI_SWITCH=y
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_PPC_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/ep405_defconfig b/arch/ppc/configs/ep405_defconfig
deleted file mode 100644
index 880b5f8..0000000
--- a/arch/ppc/configs/ep405_defconfig
+++ /dev/null
@@ -1,572 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_ASH is not set
-# CONFIG_BUBINGA is not set
-# CONFIG_CPCI405 is not set
-CONFIG_EP405=y
-# CONFIG_OAK is not set
-# CONFIG_REDWOOD_5 is not set
-# CONFIG_REDWOOD_6 is not set
-# CONFIG_SYCAMORE is not set
-# CONFIG_WALNUT is not set
-# CONFIG_EP405PC is not set
-CONFIG_IBM405_ERR77=y
-CONFIG_IBM405_ERR51=y
-CONFIG_IBM_OCP=y
-CONFIG_BIOS_FIXUP=y
-CONFIG_405GP=y
-CONFIG_EMBEDDEDBOOT=y
-# CONFIG_PM is not set
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_PPC_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/est8260_defconfig b/arch/ppc/configs/est8260_defconfig
deleted file mode 100644
index b3f6446..0000000
--- a/arch/ppc/configs/est8260_defconfig
+++ /dev/null
@@ -1,491 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_8xx is not set
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_8260=y
-CONFIG_PPC_STD_MMU=y
-CONFIG_SERIAL_CONSOLE=y
-CONFIG_EST8260=y
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_WILLOW_1 is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PC_KEYBOARD is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_PPC601_SYNC_FIX is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_UNIX98_PTY_COUNT=256
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_DEVPTS_FS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-CONFIG_SCC_ENET=y
-# CONFIG_FEC_ENET is not set
-
-#
-# MPC8260 CPM Options
-#
-CONFIG_SCC_CONSOLE=y
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/ev64260_defconfig b/arch/ppc/configs/ev64260_defconfig
deleted file mode 100644
index 587e9a3..0000000
--- a/arch/ppc/configs/ev64260_defconfig
+++ /dev/null
@@ -1,758 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc2
-# Fri Nov 19 11:17:02 2004
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-CONFIG_ALTIVEC=y
-CONFIG_TAU=y
-# CONFIG_TAU_INT is not set
-# CONFIG_TAU_AVERAGE is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_GEN550=y
-CONFIG_PPC_STD_MMU=y
-# CONFIG_NOT_COHERENT_CACHE is not set
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_SPRUCE is not set
-CONFIG_EV64260=y
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_LITE5200 is not set
-CONFIG_GT64260=y
-CONFIG_MV64X60=y
-
-#
-# Set bridge options
-#
-CONFIG_MV64X60_BASE=0xf1000000
-CONFIG_MV64X60_NEW_BASE=0xfbe00000
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0,115200 ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_CONNTRACK_MARK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_E100_NAPI is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_RAW is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=y
-# CONFIG_MOUSE_SERIAL is not set
-# CONFIG_MOUSE_VSXXXAA is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=m
-CONFIG_I2C_CHARDEV=m
-
-#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_SCx200_ACB is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-# CONFIG_I2C_PCA_ISA is not set
-
-#
-# Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_VIA686A is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-
-#
-# Other I2C Chip support
-#
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-CONFIG_VGA_CONSOLE=y
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_PROC_KCORE is not set
-CONFIG_SYSFS=y
-CONFIG_DEVFS_FS=y
-# CONFIG_DEVFS_MOUNT is not set
-# CONFIG_DEVFS_DEBUG is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/ev64360_defconfig b/arch/ppc/configs/ev64360_defconfig
deleted file mode 100644
index f297c4b..0000000
--- a/arch/ppc/configs/ev64360_defconfig
+++ /dev/null
@@ -1,817 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.14
-# Fri Oct 28 19:15:34 2005
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_LOCK_KERNEL=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_HOTPLUG=y
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-CONFIG_PPC_FPU=y
-CONFIG_ALTIVEC=y
-CONFIG_TAU=y
-# CONFIG_TAU_INT is not set
-# CONFIG_TAU_AVERAGE is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-# CONFIG_WANT_EARLY_SERIAL is not set
-CONFIG_PPC_STD_MMU=y
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_KATANA is not set
-# CONFIG_WILLOW is not set
-# CONFIG_CPCI690 is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_CHESTNUT is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_HDPU is not set
-# CONFIG_EV64260 is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_RADSTONE_PPC7D is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_PQ2FADS is not set
-# CONFIG_LITE5200 is not set
-# CONFIG_MPC834x_SYS is not set
-CONFIG_EV64360=y
-CONFIG_MV64360=y
-CONFIG_MV64X60=y
-
-#
-# Set bridge options
-#
-CONFIG_MV64X60_BASE=0xf1000000
-CONFIG_MV64X60_NEW_BASE=0xf1000000
-# CONFIG_SMP is not set
-# CONFIG_HIGHMEM is not set
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-# CONFIG_PREEMPT_NONE is not set
-# CONFIG_PREEMPT_VOLUNTARY is not set
-CONFIG_PREEMPT=y
-CONFIG_PREEMPT_BKL=y
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyMM0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2"
-# CONFIG_PM is not set
-# CONFIG_HIBERNATION is not set
-CONFIG_SECCOMP=y
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Advanced setup
-#
-CONFIG_ADVANCED_OPTIONS=y
-CONFIG_HIGHMEM_START=0xfe000000
-# CONFIG_LOWMEM_SIZE_BOOL is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-# CONFIG_KERNEL_START_BOOL is not set
-CONFIG_KERNEL_START=0xc0000000
-# CONFIG_TASK_SIZE_BOOL is not set
-CONFIG_TASK_SIZE=0x80000000
-# CONFIG_CONSISTENT_START_BOOL is not set
-CONFIG_CONSISTENT_START=0xff100000
-# CONFIG_CONSISTENT_SIZE_BOOL is not set
-CONFIG_CONSISTENT_SIZE=0x00200000
-# CONFIG_BOOT_LOAD_BOOL is not set
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-# CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_OTP is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0xff000000
-CONFIG_MTD_PHYSMAP_LEN=0x01000000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=4
-# CONFIG_MTD_PLATRAM is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-CONFIG_MTD_PHRAM=y
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# PHY device support
-#
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-CONFIG_MV643XX_ETH=y
-CONFIG_MV643XX_ETH_0=y
-# CONFIG_MV643XX_ETH_1 is not set
-# CONFIG_MV643XX_ETH_2 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_MPSC=y
-CONFIG_SERIAL_MPSC_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-# CONFIG_WATCHDOG_NOWAYOUT is not set
-
-#
-# Watchdog Device Drivers
-#
-# CONFIG_SOFT_WATCHDOG is not set
-CONFIG_MV64X60_WDT=y
-
-#
-# PCI-based Watchdog Cards
-#
-# CONFIG_PCIPCWATCHDOG is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-CONFIG_HWMON=y
-# CONFIG_HWMON_VID is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia Capabilities Port drivers
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# SN Devices
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_RELAYFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_WRITEBUFFER=y
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/hdpu_defconfig b/arch/ppc/configs/hdpu_defconfig
deleted file mode 100644
index 956a178..0000000
--- a/arch/ppc/configs/hdpu_defconfig
+++ /dev/null
@@ -1,890 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11
-# Wed Mar 16 12:43:19 2005
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_LOCK_KERNEL=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_HOTPLUG=y
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-# CONFIG_CPUSETS is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-CONFIG_STOP_MACHINE=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-# CONFIG_PM is not set
-CONFIG_PPC_STD_MMU=y
-# CONFIG_NOT_COHERENT_CACHE is not set
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_KATANA is not set
-# CONFIG_WILLOW is not set
-# CONFIG_CPCI690 is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_CHESTNUT is not set
-# CONFIG_SPRUCE is not set
-CONFIG_HDPU=y
-# CONFIG_EV64260 is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_RADSTONE_PPC7D is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_PQ2FADS is not set
-# CONFIG_LITE5200 is not set
-# CONFIG_MPC834x_SYS is not set
-CONFIG_MV64360=y
-CONFIG_MV64X60=y
-
-#
-# Set bridge options
-#
-CONFIG_MV64X60_BASE=0xf1000000
-CONFIG_MV64X60_NEW_BASE=0xf1000000
-# CONFIG_SMP is not set
-# CONFIG_IRQ_ALL_CPUS is not set
-# CONFIG_NR_CPUS is not set
-CONFIG_PREEMPT=y
-CONFIG_HIGHMEM=y
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="root=/dev/nfs ip=auto"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Advanced setup
-#
-CONFIG_ADVANCED_OPTIONS=y
-# CONFIG_HIGHMEM_START_BOOL is not set
-CONFIG_HIGHMEM_START=0xfe000000
-# CONFIG_LOWMEM_SIZE_BOOL is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START_BOOL=y
-CONFIG_KERNEL_START=0x80000000
-# CONFIG_TASK_SIZE_BOOL is not set
-CONFIG_TASK_SIZE=0x80000000
-# CONFIG_BOOT_LOAD_BOOL is not set
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=y
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-# CONFIG_MTD_BLOCK is not set
-# CONFIG_MTD_BLOCK_RO is not set
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-# CONFIG_MTD_CFI_ADV_OPTIONS is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0xfc000000
-CONFIG_MTD_PHYSMAP_LEN=0x04000000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=4
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-CONFIG_CHR_DEV_SG=y
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI Transport Attributes
-#
-# CONFIG_SCSI_SPI_ATTRS is not set
-# CONFIG_SCSI_FC_ATTRS is not set
-# CONFIG_SCSI_ISCSI_ATTRS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-CONFIG_SCSI_AIC7XXX=y
-CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
-CONFIG_AIC7XXX_RESET_DELAY_MS=15000
-# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
-CONFIG_AIC7XXX_DEBUG_MASK=0
-# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA21XX is not set
-# CONFIG_SCSI_QLA22XX is not set
-# CONFIG_SCSI_QLA2300 is not set
-# CONFIG_SCSI_QLA2322 is not set
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_IP_TCPDIAG is not set
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-CONFIG_MV643XX_ETH=y
-CONFIG_MV643XX_ETH_0=y
-# CONFIG_MV643XX_ETH_1 is not set
-# CONFIG_MV643XX_ETH_2 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_MPSC=y
-CONFIG_SERIAL_MPSC_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-
-#
-# XFS support
-#
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-# CONFIG_ZISOFS is not set
-CONFIG_UDF_FS=y
-CONFIG_UDF_NLS=y
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_JFFS2_FS_NOR_ECC is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V4=y
-CONFIG_NFS_DIRECTIO=y
-CONFIG_NFSD=y
-CONFIG_NFSD_V3=y
-CONFIG_NFSD_V4=y
-CONFIG_NFSD_TCP=y
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
-CONFIG_SUNRPC=y
-CONFIG_SUNRPC_GSS=y
-CONFIG_RPCSEC_GSS_KRB5=y
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-# CONFIG_NLS_ISO8859_1 is not set
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=15
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-CONFIG_CRYPTO=y
-# CONFIG_CRYPTO_HMAC is not set
-# CONFIG_CRYPTO_NULL is not set
-# CONFIG_CRYPTO_MD4 is not set
-CONFIG_CRYPTO_MD5=y
-# CONFIG_CRYPTO_SHA1 is not set
-# CONFIG_CRYPTO_SHA256 is not set
-# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
-# CONFIG_CRYPTO_TGR192 is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
-# CONFIG_CRYPTO_AES is not set
-# CONFIG_CRYPTO_CAST5 is not set
-# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
-# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_TEST is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/katana_defconfig b/arch/ppc/configs/katana_defconfig
deleted file mode 100644
index 7311fe6..0000000
--- a/arch/ppc/configs/katana_defconfig
+++ /dev/null
@@ -1,948 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13-mm1
-# Thu Sep 1 17:16:03 2005
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-CONFIG_PPC_FPU=y
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-# CONFIG_WANT_EARLY_SERIAL is not set
-CONFIG_PPC_STD_MMU=y
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Performance-monitoring counters support
-#
-# CONFIG_PERFCTR is not set
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-CONFIG_KATANA=y
-# CONFIG_WILLOW is not set
-# CONFIG_CPCI690 is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_CHESTNUT is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_HDPU is not set
-# CONFIG_EV64260 is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_RADSTONE_PPC7D is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_PQ2FADS is not set
-# CONFIG_LITE5200 is not set
-# CONFIG_MPC834x_SYS is not set
-# CONFIG_EV64360 is not set
-CONFIG_MV64360=y
-CONFIG_MV64X60=y
-
-#
-# Set bridge options
-#
-CONFIG_MV64X60_BASE=0xf8100000
-CONFIG_MV64X60_NEW_BASE=0xf8100000
-# CONFIG_SMP is not set
-CONFIG_HIGHMEM=y
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyMM0 ip=on"
-# CONFIG_PM is not set
-CONFIG_SECCOMP=y
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Advanced setup
-#
-CONFIG_ADVANCED_OPTIONS=y
-# CONFIG_HIGHMEM_START_BOOL is not set
-CONFIG_HIGHMEM_START=0xfe000000
-# CONFIG_LOWMEM_SIZE_BOOL is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-# CONFIG_KERNEL_START_BOOL is not set
-CONFIG_KERNEL_START=0xc0000000
-# CONFIG_TASK_SIZE_BOOL is not set
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START_BOOL=y
-CONFIG_CONSISTENT_START=0xf0000000
-CONFIG_CONSISTENT_SIZE_BOOL=y
-CONFIG_CONSISTENT_SIZE=0x00400000
-# CONFIG_BOOT_LOAD_BOOL is not set
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETFILTER_NETLINK is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-# CONFIG_MTD_CMDLINE_PARTS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_2 is not set
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-# CONFIG_MTD_CFI_I1 is not set
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_OTP is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0xe0000000
-CONFIG_MTD_PHYSMAP_LEN=0x0
-CONFIG_MTD_PHYSMAP_BANKWIDTH=4
-# CONFIG_MTD_PLATRAM is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-CONFIG_MTD_PHRAM=y
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# PHY device support
-#
-# CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_ULI526X is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-CONFIG_E1000=y
-# CONFIG_E1000_NAPI is not set
-# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-CONFIG_MV643XX_ETH=y
-CONFIG_MV643XX_ETH_0=y
-CONFIG_MV643XX_ETH_1=y
-CONFIG_MV643XX_ETH_2=y
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_KGDBOE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NETPOLL_RX is not set
-# CONFIG_NETPOLL_TRAP is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_MPSC=y
-CONFIG_SERIAL_MPSC_CONSOLE=y
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-
-#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_MPC is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_SCx200_ACB is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-# CONFIG_I2C_PCA_ISA is not set
-CONFIG_I2C_MV64XXX=y
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
-CONFIG_SENSORS_M41T00=y
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-CONFIG_HWMON=y
-# CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ADM9240 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_ATXP1 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_FSCPOS is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_LM92 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_SIS5595 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_VIA686A is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83792D is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia Capabilities Port drivers
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Speakup console speech
-#
-# CONFIG_SPEAKUP is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# SN Devices
-#
-
-#
-# Distributed Lock Manager
-#
-# CONFIG_DLM is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_REISER4_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-
-#
-# XFS support
-#
-# CONFIG_XFS_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
-# CONFIG_RELAYFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_ASFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-# CONFIG_JFFS2_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/lite5200_defconfig b/arch/ppc/configs/lite5200_defconfig
deleted file mode 100644
index 7e7a943..0000000
--- a/arch/ppc/configs/lite5200_defconfig
+++ /dev/null
@@ -1,436 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-# CONFIG_ALTIVEC is not set
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_FSL_OCP=y
-CONFIG_PPC_STD_MMU=y
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-CONFIG_LITE5200=y
-CONFIG_PPC_MPC52xx=y
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0 root=/dev/ram0 rw"
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-#
-# Advanced setup
-#
-CONFIG_ADVANCED_OPTIONS=y
-CONFIG_HIGHMEM_START=0xfe000000
-# CONFIG_LOWMEM_SIZE_BOOL is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-# CONFIG_KERNEL_START_BOOL is not set
-CONFIG_KERNEL_START=0xc0000000
-# CONFIG_TASK_SIZE_BOOL is not set
-CONFIG_TASK_SIZE=0x80000000
-# CONFIG_BOOT_LOAD_BOOL is not set
-CONFIG_BOOT_LOAD=0x00800000
-#
-# Device Drivers
-#
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_DEBUG_DRIVER is not set
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-#
-# Plug and Play support
-#
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-#
-# Fusion MPT device support
-#
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-#
-# Macintosh device drivers
-#
-#
-# Networking support
-#
-# CONFIG_NET is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-#
-# ISDN subsystem
-#
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-#
-# Input device support
-#
-CONFIG_INPUT=y
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=y
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_MPC52xx=y
-CONFIG_SERIAL_MPC52xx_CONSOLE=y
-CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=9600
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-#
-# Misc devices
-#
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-#
-# Digital Video Broadcasting Devices
-#
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-#
-# Console display driver support
-#
-CONFIG_VGA_CONSOLE=y
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-#
-# USB support
-#
-# CONFIG_USB is not set
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-# CONFIG_NLS_CODEPAGE_437 is not set
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-# CONFIG_NLS_ASCII is not set
-CONFIG_NLS_ISO8859_1=m
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-# CONFIG_NLS_UTF8 is not set
-#
-# Library routines
-#
-# CONFIG_CRC16 is not set
-# CONFIG_CRC32 is not set
-# CONFIG_LIBCRC32C is not set
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-#
-# Kernel hacking
-#
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SLAB is not set
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_DEBUG_SPINLOCK is not set
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-# CONFIG_KGDB is not set
-# CONFIG_XMON is not set
-# CONFIG_BDI_SWITCH is not set
-CONFIG_DEBUG_INFO=y
-CONFIG_SERIAL_TEXT_DEBUG=y
-CONFIG_PPC_OCP=y
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/lopec_defconfig b/arch/ppc/configs/lopec_defconfig
deleted file mode 100644
index 85ea06b..0000000
--- a/arch/ppc/configs/lopec_defconfig
+++ /dev/null
@@ -1,814 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-CONFIG_LOPEC=y
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-CONFIG_EPIC_SERIAL_MODE=y
-CONFIG_MPC10X_BRIDGE=y
-# CONFIG_MPC10X_STORE_GATHERING is not set
-CONFIG_PPCBUG_NVRAM=y
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=m
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-CONFIG_PCI_NAMES=y
-
-#
-# PCMCIA/CardBus support
-#
-# CONFIG_PCMCIA is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=m
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=m
-CONFIG_BLK_DEV_RAM_SIZE=4096
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-CONFIG_BLK_DEV_IDEDISK=y
-CONFIG_IDEDISK_MULTI_MODE=y
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-CONFIG_BLK_DEV_IDEPCI=y
-# CONFIG_IDEPCI_SHARE_IRQ is not set
-# CONFIG_BLK_DEV_OFFBOARD is not set
-CONFIG_BLK_DEV_GENERIC=y
-# CONFIG_BLK_DEV_OPTI621 is not set
-CONFIG_BLK_DEV_SL82C105=y
-CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
-CONFIG_IDEDMA_PCI_AUTO=y
-# CONFIG_IDEDMA_ONLYDISK is not set
-CONFIG_BLK_DEV_ADMA=y
-# CONFIG_BLK_DEV_AEC62XX is not set
-# CONFIG_BLK_DEV_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD74XX is not set
-# CONFIG_BLK_DEV_CMD64X is not set
-# CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
-# CONFIG_BLK_DEV_CS5520 is not set
-# CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
-# CONFIG_BLK_DEV_HPT366 is not set
-# CONFIG_BLK_DEV_SC1200 is not set
-# CONFIG_BLK_DEV_PIIX is not set
-# CONFIG_BLK_DEV_NS87415 is not set
-# CONFIG_BLK_DEV_PDC202XX_OLD is not set
-# CONFIG_BLK_DEV_PDC202XX_NEW is not set
-# CONFIG_BLK_DEV_SVWKS is not set
-# CONFIG_BLK_DEV_SIIMAGE is not set
-# CONFIG_BLK_DEV_SLC90E66 is not set
-# CONFIG_BLK_DEV_TRM290 is not set
-# CONFIG_BLK_DEV_VIA82CXXX is not set
-CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_IDEDMA_IVB is not set
-CONFIG_IDEDMA_AUTO=y
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-# CONFIG_BLK_DEV_SR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI Transport Attributes
-#
-CONFIG_SCSI_SPI_ATTRS=y
-# CONFIG_SCSI_FC_ATTRS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INIA100 is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA21XX is not set
-# CONFIG_SCSI_QLA22XX is not set
-# CONFIG_SCSI_QLA2300 is not set
-# CONFIG_SCSI_QLA2322 is not set
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_QLA6322 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_E100_NAPI is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=1
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB=m
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_DYNAMIC_MINORS is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_EHCI_HCD is not set
-CONFIG_USB_OHCI_HCD=m
-# CONFIG_USB_UHCI_HCD is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_BLUETOOTH_TTY is not set
-CONFIG_USB_ACM=m
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_STORAGE is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-CONFIG_USB_HID=m
-
-#
-# Input core support is needed for USB HID input layer or HIDBP support
-#
-# CONFIG_USB_HIDDEV is not set
-
-#
-# USB HID Boot Protocol drivers
-#
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_MICROTEK is not set
-# CONFIG_USB_HPUSBSCSI is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_DABUSB is not set
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
-
-#
-# USB port drivers
-#
-
-#
-# USB Serial Converter support
-#
-CONFIG_USB_SERIAL=m
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-CONFIG_USB_SERIAL_VISOR=m
-# CONFIG_USB_SERIAL_IPAQ is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KLSI is not set
-# CONFIG_USB_SERIAL_KOBIL_SCT is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_SAFE is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_XIRCOM is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_TIGL is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGETSERVO is not set
-# CONFIG_USB_TEST is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-# CONFIG_LIBCRC32C is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/luan_defconfig b/arch/ppc/configs/luan_defconfig
deleted file mode 100644
index 71d7bf1..0000000
--- a/arch/ppc/configs/luan_defconfig
+++ /dev/null
@@ -1,668 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11-rc2
-# Mon Jan 31 16:26:31 2005
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-CONFIG_44x=y
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-CONFIG_BOOKE=y
-CONFIG_PTE_64BIT=y
-CONFIG_PHYS_64BIT=y
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_EBONY is not set
-CONFIG_LUAN=y
-# CONFIG_OCOTEA is not set
-CONFIG_440SP=y
-CONFIG_440=y
-CONFIG_IBM_OCP=y
-CONFIG_IBM_EMAC4=y
-# CONFIG_PPC4xx_DMA is not set
-CONFIG_PPC_GEN550=y
-# CONFIG_PM is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on console=ttyS0,115200"
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# PC-card bridges
-#
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x01000000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-# CONFIG_STANDALONE is not set
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-# CONFIG_BLK_DEV_RAM is not set
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_CONNTRACK_MARK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_IBM_EMAC=y
-# CONFIG_IBM_EMAC_ERRMSG is not set
-CONFIG_IBM_EMAC_RXB=128
-CONFIG_IBM_EMAC_TXB=128
-CONFIG_IBM_EMAC_FGAP=8
-CONFIG_IBM_EMAC_SKBRES=0
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_LIBPS2 is not set
-# CONFIG_SERIO_RAW is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_FS is not set
-# CONFIG_KGDB is not set
-# CONFIG_XMON is not set
-CONFIG_BDI_SWITCH=y
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_PPC_OCP=y
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/mbx_defconfig b/arch/ppc/configs/mbx_defconfig
deleted file mode 100644
index 52c3799..0000000
--- a/arch/ppc/configs/mbx_defconfig
+++ /dev/null
@@ -1,512 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_SYSCTL is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Platform support
-#
-CONFIG_PPC=y
-CONFIG_PPC32=y
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_POWER3 is not set
-CONFIG_8xx=y
-
-#
-# IBM 4xx options
-#
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_SERIAL_CONSOLE=y
-CONFIG_NOT_COHERENT_CACHE=y
-# CONFIG_RPXLITE is not set
-# CONFIG_RPXCLASSIC is not set
-# CONFIG_BSEIP is not set
-# CONFIG_FADS is not set
-# CONFIG_TQM823L is not set
-# CONFIG_TQM850L is not set
-# CONFIG_TQM855L is not set
-# CONFIG_TQM860L is not set
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-# CONFIG_IVMS8 is not set
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-CONFIG_MBX=y
-# CONFIG_WINCEPT is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-
-#
-# General setup
-#
-# CONFIG_HIGHMEM is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-CONFIG_KCORE_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_KERNEL_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_HOTPLUG is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# ATA/IDE/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI support
-#
-# CONFIG_SCSI is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# I2O device support
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-# CONFIG_NETFILTER is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_XFRM_USER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-# CONFIG_ETHERTAP is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices (depends on LLC=y)
-#
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN_BOOL is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-CONFIG_SERIAL_CPM_SCC2=y
-CONFIG_SERIAL_CPM_SCC3=y
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-CONFIG_SERIAL_CPM_SMC2=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# I2C Hardware Sensors Mainboard support
-#
-
-#
-# I2C Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-# CONFIG_HANGCHECK_TIMER is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_TMPFS=y
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# MPC8xx CPM Options
-#
-CONFIG_SCC_ENET=y
-CONFIG_SCC1_ENET=y
-# CONFIG_SCC2_ENET is not set
-# CONFIG_SCC3_ENET is not set
-# CONFIG_FEC_ENET is not set
-CONFIG_ENET_BIG_BUFFERS=y
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-CONFIG_8xx_CPU6=y
-# CONFIG_UCODE_PATCH is not set
-
-#
-# USB support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KALLSYMS is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/ml300_defconfig b/arch/ppc/configs/ml300_defconfig
deleted file mode 100644
index d66cacd..0000000
--- a/arch/ppc/configs/ml300_defconfig
+++ /dev/null
@@ -1,739 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.16-rc1
-# Wed Jan 18 00:49:20 2006
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-CONFIG_SLAB=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_KMOD=y
-
-#
-# Block layer
-#
-CONFIG_LBD=y
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-# CONFIG_WANT_EARLY_SERIAL is not set
-
-#
-# IBM 4xx options
-#
-# CONFIG_BUBINGA is not set
-# CONFIG_CPCI405 is not set
-# CONFIG_EP405 is not set
-# CONFIG_REDWOOD_5 is not set
-# CONFIG_REDWOOD_6 is not set
-# CONFIG_SYCAMORE is not set
-# CONFIG_WALNUT is not set
-CONFIG_XILINX_ML300=y
-CONFIG_IBM405_ERR77=y
-CONFIG_IBM405_ERR51=y
-CONFIG_XILINX_VIRTEX=y
-CONFIG_EMBEDDEDBOOT=y
-# CONFIG_PPC4xx_DMA is not set
-CONFIG_PPC_GEN550=y
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_HIGHMEM is not set
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0,9600"
-# CONFIG_PM is not set
-# CONFIG_HIBERNATION is not set
-CONFIG_SECCOMP=y
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-# CONFIG_PPC_I8259 is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
-# CONFIG_TIPC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-# CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Macintosh device drivers
-#
-# CONFIG_WINDFARM is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-CONFIG_TUN=y
-
-#
-# PHY device support
-#
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-# CONFIG_IBM_EMAC is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-# CONFIG_TELCLOCK is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia Capabilities Port drivers
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-
-#
-# SN Devices
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_RELAYFS_FS is not set
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-CONFIG_NLS_UTF8=y
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_DETECT_SOFTLOCKUP=y
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_VM is not set
-CONFIG_FORCED_INLINING=y
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_KGDB is not set
-# CONFIG_XMON is not set
-# CONFIG_BDI_SWITCH is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/ml403_defconfig b/arch/ppc/configs/ml403_defconfig
deleted file mode 100644
index 71bcfa7..0000000
--- a/arch/ppc/configs/ml403_defconfig
+++ /dev/null
@@ -1,740 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.16-rc1
-# Wed Jan 18 01:11:41 2006
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_BSD_PROCESS_ACCT_V3=y
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-CONFIG_SLAB=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_KMOD=y
-
-#
-# Block layer
-#
-CONFIG_LBD=y
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-# CONFIG_WANT_EARLY_SERIAL is not set
-
-#
-# IBM 4xx options
-#
-# CONFIG_BUBINGA is not set
-# CONFIG_CPCI405 is not set
-# CONFIG_EP405 is not set
-# CONFIG_REDWOOD_5 is not set
-# CONFIG_REDWOOD_6 is not set
-# CONFIG_SYCAMORE is not set
-# CONFIG_WALNUT is not set
-# CONFIG_XILINX_ML300 is not set
-CONFIG_XILINX_ML403=y
-CONFIG_IBM405_ERR77=y
-CONFIG_IBM405_ERR51=y
-CONFIG_XILINX_VIRTEX=y
-CONFIG_EMBEDDEDBOOT=y
-# CONFIG_PPC4xx_DMA is not set
-CONFIG_PPC_GEN550=y
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_HIGHMEM is not set
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0,9600"
-# CONFIG_PM is not set
-# CONFIG_HIBERNATION is not set
-CONFIG_SECCOMP=y
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-# CONFIG_PPC_I8259 is not set
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-CONFIG_PACKET_MMAP=y
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
-# CONFIG_TIPC is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-# CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Macintosh device drivers
-#
-# CONFIG_WINDFARM is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-CONFIG_TUN=y
-
-#
-# PHY device support
-#
-
-#
-# Ethernet (10 or 100Mbit)
-#
-# CONFIG_NET_ETHERNET is not set
-# CONFIG_IBM_EMAC is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-# CONFIG_SERIO is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-# CONFIG_TELCLOCK is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia Capabilities Port drivers
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-
-#
-# SN Devices
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_RELAYFS_FS is not set
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-# CONFIG_NFS_FS is not set
-# CONFIG_NFSD is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-CONFIG_NLS=y
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=y
-# CONFIG_NLS_CODEPAGE_737 is not set
-# CONFIG_NLS_CODEPAGE_775 is not set
-# CONFIG_NLS_CODEPAGE_850 is not set
-# CONFIG_NLS_CODEPAGE_852 is not set
-# CONFIG_NLS_CODEPAGE_855 is not set
-# CONFIG_NLS_CODEPAGE_857 is not set
-# CONFIG_NLS_CODEPAGE_860 is not set
-# CONFIG_NLS_CODEPAGE_861 is not set
-# CONFIG_NLS_CODEPAGE_862 is not set
-# CONFIG_NLS_CODEPAGE_863 is not set
-# CONFIG_NLS_CODEPAGE_864 is not set
-# CONFIG_NLS_CODEPAGE_865 is not set
-# CONFIG_NLS_CODEPAGE_866 is not set
-# CONFIG_NLS_CODEPAGE_869 is not set
-# CONFIG_NLS_CODEPAGE_936 is not set
-# CONFIG_NLS_CODEPAGE_950 is not set
-# CONFIG_NLS_CODEPAGE_932 is not set
-# CONFIG_NLS_CODEPAGE_949 is not set
-# CONFIG_NLS_CODEPAGE_874 is not set
-# CONFIG_NLS_ISO8859_8 is not set
-# CONFIG_NLS_CODEPAGE_1250 is not set
-# CONFIG_NLS_CODEPAGE_1251 is not set
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-# CONFIG_NLS_ISO8859_2 is not set
-# CONFIG_NLS_ISO8859_3 is not set
-# CONFIG_NLS_ISO8859_4 is not set
-# CONFIG_NLS_ISO8859_5 is not set
-# CONFIG_NLS_ISO8859_6 is not set
-# CONFIG_NLS_ISO8859_7 is not set
-# CONFIG_NLS_ISO8859_9 is not set
-# CONFIG_NLS_ISO8859_13 is not set
-# CONFIG_NLS_ISO8859_14 is not set
-# CONFIG_NLS_ISO8859_15 is not set
-# CONFIG_NLS_KOI8_R is not set
-# CONFIG_NLS_KOI8_U is not set
-CONFIG_NLS_UTF8=y
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_PRINTK_TIME=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_DETECT_SOFTLOCKUP=y
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_KOBJECT is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_VM is not set
-CONFIG_FORCED_INLINING=y
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_KGDB is not set
-# CONFIG_XMON is not set
-# CONFIG_BDI_SWITCH is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/mvme5100_defconfig b/arch/ppc/configs/mvme5100_defconfig
deleted file mode 100644
index 46776b9..0000000
--- a/arch/ppc/configs/mvme5100_defconfig
+++ /dev/null
@@ -1,746 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.9-rc2
-# Wed Sep 22 09:53:26 2004
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_GENERIC_IOMAP=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SHMEM=y
-# CONFIG_TINY_SHMEM is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-CONFIG_MVME5100=y
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_LITE5200 is not set
-# CONFIG_MVME5100_IPMC761_PRESENT is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_BLK_DEV_IDESCSI is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_IDE_ARM is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI Transport Attributes
-#
-CONFIG_SCSI_SPI_ATTRS=y
-# CONFIG_SCSI_FC_ATTRS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INIA100 is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=8
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=32
-# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA21XX is not set
-# CONFIG_SCSI_QLA22XX is not set
-# CONFIG_SCSI_QLA2300 is not set
-# CONFIG_SCSI_QLA2322 is not set
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_QLA6322 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-CONFIG_INET_TUNNEL=m
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-CONFIG_IP_NF_CONNTRACK=m
-# CONFIG_IP_NF_CT_ACCT is not set
-# CONFIG_IP_NF_CT_PROTO_SCTP is not set
-CONFIG_IP_NF_FTP=m
-CONFIG_IP_NF_IRC=m
-CONFIG_IP_NF_TFTP=m
-CONFIG_IP_NF_AMANDA=m
-# CONFIG_IP_NF_QUEUE is not set
-CONFIG_IP_NF_IPTABLES=m
-# CONFIG_IP_NF_MATCH_LIMIT is not set
-# CONFIG_IP_NF_MATCH_IPRANGE is not set
-# CONFIG_IP_NF_MATCH_MAC is not set
-# CONFIG_IP_NF_MATCH_PKTTYPE is not set
-# CONFIG_IP_NF_MATCH_MARK is not set
-# CONFIG_IP_NF_MATCH_MULTIPORT is not set
-# CONFIG_IP_NF_MATCH_TOS is not set
-# CONFIG_IP_NF_MATCH_RECENT is not set
-# CONFIG_IP_NF_MATCH_ECN is not set
-# CONFIG_IP_NF_MATCH_DSCP is not set
-# CONFIG_IP_NF_MATCH_AH_ESP is not set
-# CONFIG_IP_NF_MATCH_LENGTH is not set
-# CONFIG_IP_NF_MATCH_TTL is not set
-# CONFIG_IP_NF_MATCH_TCPMSS is not set
-CONFIG_IP_NF_MATCH_HELPER=m
-# CONFIG_IP_NF_MATCH_STATE is not set
-# CONFIG_IP_NF_MATCH_CONNTRACK is not set
-# CONFIG_IP_NF_MATCH_OWNER is not set
-# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
-# CONFIG_IP_NF_MATCH_REALM is not set
-# CONFIG_IP_NF_MATCH_SCTP is not set
-# CONFIG_IP_NF_FILTER is not set
-# CONFIG_IP_NF_TARGET_LOG is not set
-# CONFIG_IP_NF_TARGET_ULOG is not set
-# CONFIG_IP_NF_TARGET_TCPMSS is not set
-# CONFIG_IP_NF_NAT is not set
-# CONFIG_IP_NF_MANGLE is not set
-# CONFIG_IP_NF_RAW is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-CONFIG_XFRM=y
-CONFIG_XFRM_USER=y
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_E100_NAPI is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_VIA_VELOCITY is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/ocotea_defconfig b/arch/ppc/configs/ocotea_defconfig
deleted file mode 100644
index 9dcf575..0000000
--- a/arch/ppc/configs/ocotea_defconfig
+++ /dev/null
@@ -1,599 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-CONFIG_44x=y
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-CONFIG_BOOKE=y
-CONFIG_PTE_64BIT=y
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_EBONY is not set
-CONFIG_OCOTEA=y
-CONFIG_440GX=y
-CONFIG_440A=y
-CONFIG_IBM_OCP=y
-CONFIG_IBM_EMAC4=y
-# CONFIG_PM is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on console=ttyS0,115200"
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x01000000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_DEBUG_DRIVER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-# CONFIG_IP_NF_CONNTRACK is not set
-# CONFIG_IP_NF_QUEUE is not set
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-# CONFIG_IP_NF_COMPAT_IPCHAINS is not set
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_IBM_EMAC=y
-# CONFIG_IBM_EMAC_ERRMSG is not set
-CONFIG_IBM_EMAC_RXB=128
-CONFIG_IBM_EMAC_TXB=128
-CONFIG_IBM_EMAC_FGAP=8
-CONFIG_IBM_EMAC_SKBRES=0
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_MULTIPORT is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-# CONFIG_EXT2_FS is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-CONFIG_DEBUG_KERNEL=y
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_KGDB is not set
-# CONFIG_XMON is not set
-CONFIG_BDI_SWITCH=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_PPC_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/pplus_defconfig b/arch/ppc/configs/pplus_defconfig
deleted file mode 100644
index 5e459bc..0000000
--- a/arch/ppc/configs/pplus_defconfig
+++ /dev/null
@@ -1,720 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_ALTIVEC is not set
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-CONFIG_PPLUS=y
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-CONFIG_PPC_GEN550=y
-# CONFIG_PPCBUG_NVRAM is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-CONFIG_BLK_DEV_FD=y
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_BLK_DEV_INITRD is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDETAPE is not set
-CONFIG_BLK_DEV_IDEFLOPPY=y
-CONFIG_BLK_DEV_IDESCSI=y
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-CONFIG_SCSI_CONSTANTS=y
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_SYM53C8XX_2 is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA21XX is not set
-# CONFIG_SCSI_QLA22XX is not set
-# CONFIG_SCSI_QLA2300 is not set
-# CONFIG_SCSI_QLA2322 is not set
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_QLA6322 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_INET_ECN is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# IP: Netfilter Configuration
-#
-CONFIG_IP_NF_CONNTRACK=m
-CONFIG_IP_NF_FTP=m
-# CONFIG_IP_NF_IRC is not set
-# CONFIG_IP_NF_TFTP is not set
-# CONFIG_IP_NF_AMANDA is not set
-# CONFIG_IP_NF_QUEUE is not set
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_LIMIT=m
-# CONFIG_IP_NF_MATCH_IPRANGE is not set
-CONFIG_IP_NF_MATCH_MAC=m
-CONFIG_IP_NF_MATCH_PKTTYPE=m
-CONFIG_IP_NF_MATCH_MARK=m
-CONFIG_IP_NF_MATCH_MULTIPORT=m
-CONFIG_IP_NF_MATCH_TOS=m
-# CONFIG_IP_NF_MATCH_RECENT is not set
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_DSCP=m
-CONFIG_IP_NF_MATCH_AH_ESP=m
-# CONFIG_IP_NF_MATCH_LENGTH is not set
-# CONFIG_IP_NF_MATCH_TTL is not set
-# CONFIG_IP_NF_MATCH_TCPMSS is not set
-CONFIG_IP_NF_MATCH_HELPER=m
-CONFIG_IP_NF_MATCH_STATE=m
-CONFIG_IP_NF_MATCH_CONNTRACK=m
-CONFIG_IP_NF_MATCH_OWNER=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_NAT=m
-CONFIG_IP_NF_NAT_NEEDED=y
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
-# CONFIG_IP_NF_TARGET_NETMAP is not set
-# CONFIG_IP_NF_TARGET_SAME is not set
-# CONFIG_IP_NF_NAT_SNMP_BASIC is not set
-CONFIG_IP_NF_NAT_FTP=m
-# CONFIG_IP_NF_MANGLE is not set
-# CONFIG_IP_NF_TARGET_LOG is not set
-CONFIG_IP_NF_TARGET_ULOG=m
-# CONFIG_IP_NF_TARGET_TCPMSS is not set
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-# CONFIG_IP_NF_ARP_MANGLE is not set
-CONFIG_IP_NF_COMPAT_IPCHAINS=m
-# CONFIG_IP_NF_COMPAT_IPFWADM is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-CONFIG_IPV6_SCTP__=y
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_CRC32=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-CONFIG_EEPRO100=y
-# CONFIG_EEPRO100_PIO is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# Mice
-#
-# CONFIG_BUSMOUSE is not set
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-# CONFIG_TMPFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_SUNRPC_GSS is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/prep_defconfig b/arch/ppc/configs/prep_defconfig
deleted file mode 100644
index b7cee2d..0000000
--- a/arch/ppc/configs/prep_defconfig
+++ /dev/null
@@ -1,1679 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.18-rc6
-# Wed Sep 6 15:09:32 2006
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION="-prep"
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-# CONFIG_RELAY is not set
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_EMBEDDED is not set
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-CONFIG_HOTPLUG=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_RT_MUTEXES=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_SLAB=y
-CONFIG_VM_EVENT_COUNTERS=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_MODVERSIONS=y
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Block layer
-#
-CONFIG_LBD=y
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_DEFAULT_AS is not set
-# CONFIG_DEFAULT_DEADLINE is not set
-CONFIG_DEFAULT_CFQ=y
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="cfq"
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-CONFIG_PPC_FPU=y
-# CONFIG_ALTIVEC is not set
-# CONFIG_TAU is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC601_SYNC_FIX=y
-# CONFIG_WANT_EARLY_SERIAL is not set
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-CONFIG_PPC_PREP=y
-# CONFIG_APUS is not set
-# CONFIG_KATANA is not set
-# CONFIG_WILLOW is not set
-# CONFIG_CPCI690 is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_CHESTNUT is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_HDPU is not set
-# CONFIG_EV64260 is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_RADSTONE_PPC7D is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_PQ2FADS is not set
-# CONFIG_LITE5200 is not set
-# CONFIG_MPC834x_SYS is not set
-# CONFIG_EV64360 is not set
-CONFIG_PPCBUG_NVRAM=y
-# CONFIG_SMP is not set
-# CONFIG_HIGHMEM is not set
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=m
-CONFIG_PREP_RESIDUAL=y
-CONFIG_PROC_PREPRESIDUAL=y
-# CONFIG_CMDLINE_BOOL is not set
-CONFIG_PM=y
-# CONFIG_PM_LEGACY is not set
-# CONFIG_PM_DEBUG is not set
-CONFIG_HIBERNATION=y
-CONFIG_PM_STD_PARTITION=""
-# CONFIG_SECCOMP is not set
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-CONFIG_ISA=y
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PPC_I8259=y
-CONFIG_PPC_INDIRECT_PCI=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_DEBUG is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-CONFIG_PCCARD=m
-# CONFIG_PCMCIA_DEBUG is not set
-# CONFIG_PCMCIA is not set
-CONFIG_CARDBUS=y
-
-#
-# PC-card bridges
-#
-CONFIG_YENTA=m
-CONFIG_YENTA_O2=y
-CONFIG_YENTA_RICOH=y
-CONFIG_YENTA_TI=y
-CONFIG_YENTA_ENE_TUNE=y
-CONFIG_YENTA_TOSHIBA=y
-CONFIG_PCMCIA_PROBE=y
-CONFIG_PCCARD_NONSTATIC=m
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_NETDEBUG is not set
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-# CONFIG_IP_PNP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_DIAG is not set
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
-
-#
-# IP: Virtual Server Configuration
-#
-# CONFIG_IP_VS is not set
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETWORK_SECMARK is not set
-CONFIG_NETFILTER=y
-# CONFIG_NETFILTER_DEBUG is not set
-
-#
-# Core Netfilter Configuration
-#
-CONFIG_NETFILTER_NETLINK=m
-CONFIG_NETFILTER_NETLINK_QUEUE=m
-CONFIG_NETFILTER_NETLINK_LOG=m
-CONFIG_NETFILTER_XTABLES=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-
-#
-# IP: Netfilter Configuration
-#
-CONFIG_IP_NF_CONNTRACK=m
-# CONFIG_IP_NF_CT_ACCT is not set
-CONFIG_IP_NF_CONNTRACK_MARK=y
-# CONFIG_IP_NF_CONNTRACK_EVENTS is not set
-# CONFIG_IP_NF_CONNTRACK_NETLINK is not set
-# CONFIG_IP_NF_CT_PROTO_SCTP is not set
-CONFIG_IP_NF_FTP=m
-CONFIG_IP_NF_IRC=m
-# CONFIG_IP_NF_NETBIOS_NS is not set
-CONFIG_IP_NF_TFTP=m
-CONFIG_IP_NF_AMANDA=m
-# CONFIG_IP_NF_PPTP is not set
-# CONFIG_IP_NF_H323 is not set
-# CONFIG_IP_NF_SIP is not set
-CONFIG_IP_NF_QUEUE=m
-# CONFIG_IP_NF_IPTABLES is not set
-# CONFIG_IP_NF_ARPTABLES is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
-# CONFIG_TIPC is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-CONFIG_NET_CLS_ROUTE=y
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
-CONFIG_WIRELESS_EXT=y
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-# CONFIG_STANDALONE is not set
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-CONFIG_FW_LOADER=m
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-# CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-CONFIG_PARPORT=m
-CONFIG_PARPORT_PC=m
-CONFIG_PARPORT_SERIAL=m
-CONFIG_PARPORT_PC_FIFO=y
-CONFIG_PARPORT_PC_SUPERIO=y
-# CONFIG_PARPORT_GSC is not set
-# CONFIG_PARPORT_AX88796 is not set
-CONFIG_PARPORT_1284=y
-
-#
-# Plug and Play support
-#
-# CONFIG_PNP is not set
-
-#
-# Block devices
-#
-CONFIG_BLK_DEV_FD=m
-# CONFIG_BLK_DEV_XD is not set
-# CONFIG_PARIDE is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-# CONFIG_BLK_DEV_UB is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-# CONFIG_BLK_DEV_IDE_SATA is not set
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-CONFIG_BLK_DEV_IDESCSI=y
-# CONFIG_IDE_TASK_IOCTL is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-CONFIG_BLK_DEV_IDEPCI=y
-CONFIG_IDEPCI_SHARE_IRQ=y
-# CONFIG_BLK_DEV_OFFBOARD is not set
-CONFIG_BLK_DEV_GENERIC=y
-# CONFIG_BLK_DEV_OPTI621 is not set
-CONFIG_BLK_DEV_SL82C105=y
-CONFIG_BLK_DEV_IDEDMA_PCI=y
-# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
-CONFIG_IDEDMA_PCI_AUTO=y
-# CONFIG_IDEDMA_ONLYDISK is not set
-# CONFIG_BLK_DEV_AEC62XX is not set
-# CONFIG_BLK_DEV_ALI15X3 is not set
-# CONFIG_BLK_DEV_AMD74XX is not set
-# CONFIG_BLK_DEV_CMD64X is not set
-# CONFIG_BLK_DEV_TRIFLEX is not set
-# CONFIG_BLK_DEV_CY82C693 is not set
-# CONFIG_BLK_DEV_CS5520 is not set
-# CONFIG_BLK_DEV_CS5530 is not set
-# CONFIG_BLK_DEV_HPT34X is not set
-# CONFIG_BLK_DEV_HPT366 is not set
-# CONFIG_BLK_DEV_SC1200 is not set
-# CONFIG_BLK_DEV_PIIX is not set
-# CONFIG_BLK_DEV_IT821X is not set
-# CONFIG_BLK_DEV_NS87415 is not set
-# CONFIG_BLK_DEV_PDC202XX_OLD is not set
-# CONFIG_BLK_DEV_PDC202XX_NEW is not set
-# CONFIG_BLK_DEV_SVWKS is not set
-# CONFIG_BLK_DEV_SIIMAGE is not set
-# CONFIG_BLK_DEV_SLC90E66 is not set
-# CONFIG_BLK_DEV_TRM290 is not set
-# CONFIG_BLK_DEV_VIA82CXXX is not set
-# CONFIG_IDE_ARM is not set
-# CONFIG_IDE_CHIPSETS is not set
-CONFIG_BLK_DEV_IDEDMA=y
-# CONFIG_IDEDMA_IVB is not set
-CONFIG_IDEDMA_AUTO=y
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-# CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-
-#
-# SCSI Transport Attributes
-#
-CONFIG_SCSI_SPI_ATTRS=y
-# CONFIG_SCSI_FC_ATTRS is not set
-# CONFIG_SCSI_ISCSI_ATTRS is not set
-# CONFIG_SCSI_SAS_ATTRS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_ISCSI_TCP is not set
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_7000FASST is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AHA152X is not set
-# CONFIG_SCSI_AHA1542 is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_SCSI_IN2000 is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_MEGARAID_SAS is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_HPTIOP is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_DTC3280 is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_GENERIC_NCR5380 is not set
-# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-# CONFIG_SCSI_PPA is not set
-# CONFIG_SCSI_IMM is not set
-# CONFIG_SCSI_NCR53C406A is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-CONFIG_SCSI_SYM53C8XX_MMIO=y
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_PAS16 is not set
-# CONFIG_SCSI_PSI240I is not set
-# CONFIG_SCSI_QLOGIC_FAS is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-# CONFIG_SCSI_QLA_FC is not set
-# CONFIG_SCSI_LPFC is not set
-# CONFIG_SCSI_SYM53C416 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_T128 is not set
-# CONFIG_SCSI_U14_34F is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Old CD-ROM drivers (not SCSI, not IDE)
-#
-# CONFIG_CD_NO_IDESCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-# CONFIG_FUSION_SPI is not set
-# CONFIG_FUSION_FC is not set
-# CONFIG_FUSION_SAS is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-CONFIG_IEEE1394=m
-
-#
-# Subsystem Options
-#
-# CONFIG_IEEE1394_VERBOSEDEBUG is not set
-CONFIG_IEEE1394_OUI_DB=y
-CONFIG_IEEE1394_EXTRA_CONFIG_ROMS=y
-CONFIG_IEEE1394_CONFIG_ROM_IP1394=y
-# CONFIG_IEEE1394_EXPORT_FULL_API is not set
-
-#
-# Device Drivers
-#
-# CONFIG_IEEE1394_PCILYNX is not set
-CONFIG_IEEE1394_OHCI1394=m
-
-#
-# Protocol Drivers
-#
-CONFIG_IEEE1394_VIDEO1394=m
-CONFIG_IEEE1394_SBP2=m
-CONFIG_IEEE1394_ETH1394=m
-CONFIG_IEEE1394_DV1394=m
-CONFIG_IEEE1394_RAWIO=m
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-# CONFIG_WINDFARM is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-CONFIG_TUN=m
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# PHY device support
-#
-# CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_LANCE is not set
-# CONFIG_NET_VENDOR_SMC is not set
-# CONFIG_NET_VENDOR_RACAL is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-CONFIG_DE2104X=y
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-CONFIG_TULIP_MMIO=y
-# CONFIG_TULIP_NAPI is not set
-CONFIG_DE4X5=m
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_ULI526X is not set
-# CONFIG_PCMCIA_XIRCOM is not set
-# CONFIG_PCMCIA_XIRTULIP is not set
-# CONFIG_AT1700 is not set
-# CONFIG_DEPCA is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_ISA is not set
-CONFIG_NET_PCI=y
-CONFIG_PCNET32=y
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_AC3200 is not set
-# CONFIG_APRICOT is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_CS89x0 is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_NET_POCKET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-# CONFIG_MYRI10GE is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-CONFIG_NET_RADIO=y
-# CONFIG_NET_WIRELESS_RTNETLINK is not set
-
-#
-# Obsolete Wireless cards support (pre-802.11)
-#
-# CONFIG_STRIP is not set
-# CONFIG_ARLAN is not set
-# CONFIG_WAVELAN is not set
-
-#
-# Wireless 802.11b ISA/PCI cards support
-#
-# CONFIG_IPW2100 is not set
-# CONFIG_IPW2200 is not set
-# CONFIG_AIRO is not set
-CONFIG_HERMES=m
-# CONFIG_PLX_HERMES is not set
-# CONFIG_TMD_HERMES is not set
-# CONFIG_NORTEL_HERMES is not set
-# CONFIG_PCI_HERMES is not set
-# CONFIG_ATMEL is not set
-
-#
-# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
-#
-# CONFIG_PRISM54 is not set
-# CONFIG_USB_ZD1201 is not set
-# CONFIG_HOSTAP is not set
-CONFIG_NET_WIRELESS=y
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PLIP is not set
-CONFIG_PPP=y
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_ASYNC=y
-# CONFIG_PPP_SYNC_TTY is not set
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_PPP_MPPE is not set
-CONFIG_PPPOE=m
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
-CONFIG_NETCONSOLE=m
-CONFIG_NETPOLL=y
-# CONFIG_NETPOLL_RX is not set
-# CONFIG_NETPOLL_TRAP is not set
-CONFIG_NET_POLL_CONTROLLER=y
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_EVBUG=m
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=y
-# CONFIG_MOUSE_SERIAL is not set
-# CONFIG_MOUSE_INPORT is not set
-# CONFIG_MOUSE_LOGIBM is not set
-# CONFIG_MOUSE_PC110PAD is not set
-# CONFIG_MOUSE_VSXXXAA is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-CONFIG_INPUT_MISC=y
-CONFIG_INPUT_PCSPKR=m
-CONFIG_INPUT_UINPUT=m
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_PARKBD is not set
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-CONFIG_VT_CONSOLE=y
-CONFIG_HW_CONSOLE=y
-# CONFIG_VT_HW_CONSOLE_BINDING is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_PCI=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_PRINTER is not set
-# CONFIG_PPDEV is not set
-# CONFIG_TIPAR is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_HW_RANDOM is not set
-CONFIG_NVRAM=y
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-# CONFIG_TELCLOCK is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=m
-
-#
-# I2C Algorithms
-#
-CONFIG_I2C_ALGOBIT=y
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_ELEKTOR is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_MPC is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-# CONFIG_I2C_PCA_ISA is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_M41T00 is not set
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-
-#
-# Hardware Monitoring support
-#
-# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-CONFIG_VIDEO_V4L2=y
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-# CONFIG_USB_DABUSB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FIRMWARE_EDID is not set
-CONFIG_FB=y
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-CONFIG_FB_MODE_HELPERS=y
-CONFIG_FB_TILEBLITTING=y
-# CONFIG_FB_CIRRUS is not set
-# CONFIG_FB_PM2 is not set
-# CONFIG_FB_CYBER2000 is not set
-# CONFIG_FB_CT65550 is not set
-# CONFIG_FB_ASILIANT is not set
-# CONFIG_FB_IMSTT is not set
-# CONFIG_FB_VGA16 is not set
-# CONFIG_FB_S1D13XXX is not set
-# CONFIG_FB_NVIDIA is not set
-# CONFIG_FB_RIVA is not set
-CONFIG_FB_MATROX=y
-CONFIG_FB_MATROX_MILLENIUM=y
-CONFIG_FB_MATROX_MYSTIQUE=y
-CONFIG_FB_MATROX_G=y
-CONFIG_FB_MATROX_I2C=y
-CONFIG_FB_MATROX_MAVEN=m
-# CONFIG_FB_MATROX_MULTIHEAD is not set
-# CONFIG_FB_RADEON is not set
-# CONFIG_FB_ATY128 is not set
-# CONFIG_FB_ATY is not set
-# CONFIG_FB_SAVAGE is not set
-# CONFIG_FB_SIS is not set
-# CONFIG_FB_NEOMAGIC is not set
-# CONFIG_FB_KYRO is not set
-# CONFIG_FB_3DFX is not set
-# CONFIG_FB_VOODOO1 is not set
-# CONFIG_FB_TRIDENT is not set
-# CONFIG_FB_VIRTUAL is not set
-
-#
-# Console display driver support
-#
-CONFIG_VGA_CONSOLE=y
-# CONFIG_VGACON_SOFT_SCROLLBACK is not set
-# CONFIG_MDA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-# CONFIG_FONTS is not set
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_LOGO_LINUX_CLUT224=y
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
-CONFIG_SOUND=m
-
-#
-# Advanced Linux Sound Architecture
-#
-CONFIG_SND=m
-CONFIG_SND_TIMER=m
-CONFIG_SND_PCM=m
-CONFIG_SND_HWDEP=m
-CONFIG_SND_RAWMIDI=m
-CONFIG_SND_SEQUENCER=m
-# CONFIG_SND_SEQ_DUMMY is not set
-CONFIG_SND_OSSEMUL=y
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_PCM_OSS_PLUGINS=y
-CONFIG_SND_SEQUENCER_OSS=y
-# CONFIG_SND_DYNAMIC_MINORS is not set
-CONFIG_SND_SUPPORT_OLD_API=y
-CONFIG_SND_VERBOSE_PROCFS=y
-# CONFIG_SND_VERBOSE_PRINTK is not set
-# CONFIG_SND_DEBUG is not set
-
-#
-# Generic devices
-#
-CONFIG_SND_MPU401_UART=m
-CONFIG_SND_OPL3_LIB=m
-# CONFIG_SND_DUMMY is not set
-# CONFIG_SND_VIRMIDI is not set
-# CONFIG_SND_MTPAV is not set
-# CONFIG_SND_SERIAL_U16550 is not set
-# CONFIG_SND_MPU401 is not set
-
-#
-# ISA devices
-#
-CONFIG_SND_CS4231_LIB=m
-# CONFIG_SND_ADLIB is not set
-# CONFIG_SND_AD1848 is not set
-# CONFIG_SND_CMI8330 is not set
-# CONFIG_SND_CS4231 is not set
-CONFIG_SND_CS4232=m
-# CONFIG_SND_CS4236 is not set
-# CONFIG_SND_ES1688 is not set
-# CONFIG_SND_ES18XX is not set
-# CONFIG_SND_GUSCLASSIC is not set
-# CONFIG_SND_GUSEXTREME is not set
-# CONFIG_SND_GUSMAX is not set
-# CONFIG_SND_OPL3SA2 is not set
-# CONFIG_SND_OPTI92X_AD1848 is not set
-# CONFIG_SND_OPTI92X_CS4231 is not set
-# CONFIG_SND_OPTI93X is not set
-# CONFIG_SND_MIRO is not set
-# CONFIG_SND_SB8 is not set
-# CONFIG_SND_SB16 is not set
-# CONFIG_SND_SBAWE is not set
-# CONFIG_SND_SGALAXY is not set
-# CONFIG_SND_SSCAPE is not set
-# CONFIG_SND_WAVEFRONT is not set
-
-#
-# PCI devices
-#
-# CONFIG_SND_AD1889 is not set
-# CONFIG_SND_ALS300 is not set
-# CONFIG_SND_ALS4000 is not set
-# CONFIG_SND_ALI5451 is not set
-# CONFIG_SND_ATIIXP is not set
-# CONFIG_SND_ATIIXP_MODEM is not set
-# CONFIG_SND_AU8810 is not set
-# CONFIG_SND_AU8820 is not set
-# CONFIG_SND_AU8830 is not set
-# CONFIG_SND_AZT3328 is not set
-# CONFIG_SND_BT87X is not set
-# CONFIG_SND_CA0106 is not set
-# CONFIG_SND_CMIPCI is not set
-# CONFIG_SND_CS4281 is not set
-# CONFIG_SND_CS46XX is not set
-# CONFIG_SND_DARLA20 is not set
-# CONFIG_SND_GINA20 is not set
-# CONFIG_SND_LAYLA20 is not set
-# CONFIG_SND_DARLA24 is not set
-# CONFIG_SND_GINA24 is not set
-# CONFIG_SND_LAYLA24 is not set
-# CONFIG_SND_MONA is not set
-# CONFIG_SND_MIA is not set
-# CONFIG_SND_ECHO3G is not set
-# CONFIG_SND_INDIGO is not set
-# CONFIG_SND_INDIGOIO is not set
-# CONFIG_SND_INDIGODJ is not set
-# CONFIG_SND_EMU10K1 is not set
-# CONFIG_SND_EMU10K1X is not set
-# CONFIG_SND_ENS1370 is not set
-# CONFIG_SND_ENS1371 is not set
-# CONFIG_SND_ES1938 is not set
-# CONFIG_SND_ES1968 is not set
-# CONFIG_SND_FM801 is not set
-# CONFIG_SND_HDA_INTEL is not set
-# CONFIG_SND_HDSP is not set
-# CONFIG_SND_HDSPM is not set
-# CONFIG_SND_ICE1712 is not set
-# CONFIG_SND_ICE1724 is not set
-# CONFIG_SND_INTEL8X0 is not set
-# CONFIG_SND_INTEL8X0M is not set
-# CONFIG_SND_KORG1212 is not set
-# CONFIG_SND_MAESTRO3 is not set
-# CONFIG_SND_MIXART is not set
-# CONFIG_SND_NM256 is not set
-# CONFIG_SND_PCXHR is not set
-# CONFIG_SND_RIPTIDE is not set
-# CONFIG_SND_RME32 is not set
-# CONFIG_SND_RME96 is not set
-# CONFIG_SND_RME9652 is not set
-# CONFIG_SND_SONICVIBES is not set
-# CONFIG_SND_TRIDENT is not set
-# CONFIG_SND_VIA82XX is not set
-# CONFIG_SND_VIA82XX_MODEM is not set
-# CONFIG_SND_VX222 is not set
-# CONFIG_SND_YMFPCI is not set
-
-#
-# ALSA PowerMac devices
-#
-
-#
-# Apple Onboard Audio driver
-#
-# CONFIG_SND_AOA is not set
-# CONFIG_SND_AOA_SOUNDBUS is not set
-
-#
-# USB devices
-#
-CONFIG_SND_USB_AUDIO=m
-# CONFIG_SND_USB_USX2Y is not set
-
-#
-# Open Sound System
-#
-# CONFIG_SOUND_PRIME is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-CONFIG_USB_ARCH_HAS_EHCI=y
-CONFIG_USB=y
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_SUSPEND is not set
-# CONFIG_USB_OTG is not set
-
-#
-# USB Host Controller Drivers
-#
-CONFIG_USB_EHCI_HCD=m
-CONFIG_USB_EHCI_SPLIT_ISO=y
-CONFIG_USB_EHCI_ROOT_HUB_TT=y
-# CONFIG_USB_EHCI_TT_NEWSCHED is not set
-# CONFIG_USB_ISP116X_HCD is not set
-CONFIG_USB_OHCI_HCD=y
-# CONFIG_USB_OHCI_BIG_ENDIAN is not set
-CONFIG_USB_OHCI_LITTLE_ENDIAN=y
-CONFIG_USB_UHCI_HCD=m
-# CONFIG_USB_SL811_HCD is not set
-
-#
-# USB Device Class drivers
-#
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# may also be needed; see USB_STORAGE Help for more information
-#
-CONFIG_USB_STORAGE=m
-# CONFIG_USB_STORAGE_DEBUG is not set
-CONFIG_USB_STORAGE_DATAFAB=y
-CONFIG_USB_STORAGE_FREECOM=y
-CONFIG_USB_STORAGE_ISD200=y
-CONFIG_USB_STORAGE_DPCM=y
-CONFIG_USB_STORAGE_USBAT=y
-CONFIG_USB_STORAGE_SDDR09=y
-CONFIG_USB_STORAGE_SDDR55=y
-CONFIG_USB_STORAGE_JUMPSHOT=y
-# CONFIG_USB_STORAGE_ALAUDA is not set
-# CONFIG_USB_LIBUSUAL is not set
-
-#
-# USB Input Devices
-#
-CONFIG_USB_HID=y
-CONFIG_USB_HIDINPUT=y
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
-CONFIG_USB_HIDDEV=y
-# CONFIG_USB_AIPTEK is not set
-# CONFIG_USB_WACOM is not set
-# CONFIG_USB_ACECAD is not set
-# CONFIG_USB_KBTAB is not set
-# CONFIG_USB_POWERMATE is not set
-# CONFIG_USB_TOUCHSCREEN is not set
-# CONFIG_USB_YEALINK is not set
-# CONFIG_USB_XPAD is not set
-# CONFIG_USB_ATI_REMOTE is not set
-# CONFIG_USB_ATI_REMOTE2 is not set
-# CONFIG_USB_KEYSPAN_REMOTE is not set
-# CONFIG_USB_APPLETOUCH is not set
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-# CONFIG_USB_MICROTEK is not set
-
-#
-# USB Network Adapters
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-CONFIG_USB_PEGASUS=m
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
-# CONFIG_USB_MON is not set
-
-#
-# USB port drivers
-#
-# CONFIG_USB_USS720 is not set
-
-#
-# USB Serial Converter support
-#
-CONFIG_USB_SERIAL=m
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_AIRPRIME is not set
-# CONFIG_USB_SERIAL_ARK3116 is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_CP2101 is not set
-# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-# CONFIG_USB_SERIAL_FUNSOFT is not set
-CONFIG_USB_SERIAL_VISOR=m
-# CONFIG_USB_SERIAL_IPAQ is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
-# CONFIG_USB_SERIAL_GARMIN is not set
-# CONFIG_USB_SERIAL_IPW is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-CONFIG_USB_SERIAL_KEYSPAN=m
-CONFIG_USB_SERIAL_KEYSPAN_MPR=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19=y
-CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
-CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
-CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
-# CONFIG_USB_SERIAL_KLSI is not set
-# CONFIG_USB_SERIAL_KOBIL_SCT is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_NAVMAN is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_HP4X is not set
-# CONFIG_USB_SERIAL_SAFE is not set
-# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
-# CONFIG_USB_SERIAL_TI is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_XIRCOM is not set
-# CONFIG_USB_SERIAL_OPTION is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-CONFIG_USB_EZUSB=y
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYPRESS_CY7C63 is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGETKIT is not set
-# CONFIG_USB_PHIDGETSERVO is not set
-# CONFIG_USB_IDMOUSE is not set
-# CONFIG_USB_APPLEDISPLAY is not set
-# CONFIG_USB_SISUSBVGA is not set
-# CONFIG_USB_LD is not set
-# CONFIG_USB_TEST is not set
-
-#
-# USB DSL modem support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-
-#
-# Real Time Clock
-#
-# CONFIG_RTC_CLASS is not set
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-# CONFIG_EXT2_FS_XIP is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-CONFIG_REISERFS_FS=y
-# CONFIG_REISERFS_CHECK is not set
-# CONFIG_REISERFS_PROC_INFO is not set
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
-CONFIG_JFS_FS=m
-CONFIG_JFS_POSIX_ACL=y
-CONFIG_JFS_SECURITY=y
-# CONFIG_JFS_DEBUG is not set
-# CONFIG_JFS_STATISTICS is not set
-CONFIG_FS_POSIX_ACL=y
-CONFIG_XFS_FS=m
-# CONFIG_XFS_QUOTA is not set
-CONFIG_XFS_SECURITY=y
-CONFIG_XFS_POSIX_ACL=y
-# CONFIG_XFS_RT is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-CONFIG_AUTOFS4_FS=m
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-CONFIG_UDF_FS=m
-CONFIG_UDF_NLS=y
-
-#
-# DOS/FAT/NT Filesystems
-#
-CONFIG_FAT_FS=m
-CONFIG_MSDOS_FS=m
-CONFIG_VFAT_FS=m
-CONFIG_FAT_DEFAULT_CODEPAGE=437
-CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-CONFIG_HFS_FS=m
-CONFIG_HFSPLUS_FS=m
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_CRAMFS=m
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-CONFIG_UFS_FS=m
-# CONFIG_UFS_FS_WRITE is not set
-# CONFIG_UFS_DEBUG is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-CONFIG_NFSD=y
-CONFIG_NFSD_V2_ACL=y
-CONFIG_NFSD_V3=y
-CONFIG_NFSD_V3_ACL=y
-# CONFIG_NFSD_V4 is not set
-CONFIG_NFSD_TCP=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_EXPORTFS=y
-CONFIG_NFS_ACL_SUPPORT=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-CONFIG_MAC_PARTITION=y
-CONFIG_MSDOS_PARTITION=y
-# CONFIG_BSD_DISKLABEL is not set
-# CONFIG_MINIX_SUBPARTITION is not set
-# CONFIG_SOLARIS_X86_PARTITION is not set
-# CONFIG_UNIXWARE_DISKLABEL is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_KARMA_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-CONFIG_NLS=m
-CONFIG_NLS_DEFAULT="iso8859-1"
-CONFIG_NLS_CODEPAGE_437=m
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
-CONFIG_NLS_ISO8859_1=m
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
-CONFIG_NLS_UTF8=m
-
-#
-# Library routines
-#
-CONFIG_CRC_CCITT=y
-# CONFIG_CRC16 is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_TEXTSEARCH=y
-CONFIG_TEXTSEARCH_KMP=m
-CONFIG_TEXTSEARCH_BM=m
-CONFIG_TEXTSEARCH_FSM=m
-CONFIG_PLIST=y
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-CONFIG_MAGIC_SYSRQ=y
-# CONFIG_UNUSED_SYMBOLS is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_DETECT_SOFTLOCKUP=y
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-# CONFIG_DEBUG_MUTEXES is not set
-# CONFIG_DEBUG_RWSEMS is not set
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-# CONFIG_DEBUG_KOBJECT is not set
-# CONFIG_DEBUG_INFO is not set
-# CONFIG_DEBUG_FS is not set
-# CONFIG_DEBUG_VM is not set
-CONFIG_FORCED_INLINING=y
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_XMON is not set
-# CONFIG_BDI_SWITCH is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/prpmc750_defconfig b/arch/ppc/configs/prpmc750_defconfig
deleted file mode 100644
index 82d52f6..0000000
--- a/arch/ppc/configs/prpmc750_defconfig
+++ /dev/null
@@ -1,594 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_ALTIVEC is not set
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-CONFIG_PRPMC750=y
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-CONFIG_PPC_GEN550=y
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-CONFIG_TULIP_MMIO=y
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-CONFIG_EEPRO100=y
-# CONFIG_EEPRO100_PIO is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/prpmc800_defconfig b/arch/ppc/configs/prpmc800_defconfig
deleted file mode 100644
index 613c266..0000000
--- a/arch/ppc/configs/prpmc800_defconfig
+++ /dev/null
@@ -1,656 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-CONFIG_PRPMC800=y
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-CONFIG_PPC_GEN550=y
-# CONFIG_NONMONARCH_SUPPORT is not set
-CONFIG_HARRIER=y
-# CONFIG_HARRIER_STORE_GATHERING is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-# CONFIG_BLK_DEV_SR_VENDOR is not set
-# CONFIG_CHR_DEV_SG is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-# CONFIG_SCSI_MULTI_LUN is not set
-# CONFIG_SCSI_REPORT_LUNS is not set
-# CONFIG_SCSI_CONSTANTS is not set
-# CONFIG_SCSI_LOGGING is not set
-
-#
-# SCSI Transport Attributes
-#
-CONFIG_SCSI_SPI_ATTRS=y
-# CONFIG_SCSI_FC_ATTRS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_ADVANSYS is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_CPQFCTS is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INIA100 is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA21XX is not set
-# CONFIG_SCSI_QLA22XX is not set
-# CONFIG_SCSI_QLA2300 is not set
-# CONFIG_SCSI_QLA2322 is not set
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_QLA6322 is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-CONFIG_EEPRO100=y
-# CONFIG_EEPRO100_PIO is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/radstone_ppc7d_defconfig b/arch/ppc/configs/radstone_ppc7d_defconfig
deleted file mode 100644
index 9f64532..0000000
--- a/arch/ppc/configs/radstone_ppc7d_defconfig
+++ /dev/null
@@ -1,991 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.13-rc3
-# Tue Jul 26 00:02:09 2005
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_KOBJECT_UEVENT=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SHMEM=y
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-CONFIG_PPC_FPU=y
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_GEN550=y
-# CONFIG_PM is not set
-CONFIG_PPC_STD_MMU=y
-# CONFIG_NOT_COHERENT_CACHE is not set
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_KATANA is not set
-# CONFIG_WILLOW is not set
-# CONFIG_CPCI690 is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_CHESTNUT is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_HDPU is not set
-# CONFIG_EV64260 is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-CONFIG_RADSTONE_PPC7D=y
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX8260 is not set
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-# CONFIG_PQ2FADS is not set
-# CONFIG_LITE5200 is not set
-# CONFIG_MPC834x_SYS is not set
-CONFIG_MV64360=y
-CONFIG_MV64X60=y
-
-#
-# Set bridge options
-#
-CONFIG_MV64X60_BASE=0xfef00000
-CONFIG_MV64X60_NEW_BASE=0xfef00000
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=y
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="console=ttyS0,9600"
-CONFIG_SECCOMP=y
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-CONFIG_PCI_NAMES=y
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-# CONFIG_PCCARD is not set
-
-#
-# Advanced setup
-#
-CONFIG_ADVANCED_OPTIONS=y
-CONFIG_HIGHMEM_START=0xfe000000
-# CONFIG_LOWMEM_SIZE_BOOL is not set
-CONFIG_LOWMEM_SIZE=0x30000000
-# CONFIG_KERNEL_START_BOOL is not set
-CONFIG_KERNEL_START=0xc0000000
-# CONFIG_TASK_SIZE_BOOL is not set
-CONFIG_TASK_SIZE=0x80000000
-# CONFIG_BOOT_LOAD_BOOL is not set
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_FIB_HASH=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_BIC=y
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-CONFIG_BRIDGE=y
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_PARTITIONS is not set
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_FTL=y
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_OTP is not set
-CONFIG_MTD_CFI_INTELEXT=y
-# CONFIG_MTD_CFI_AMDSTD is not set
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-
-#
-# Mapping drivers for chip access
-#
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-# CONFIG_MTD_PHYSMAP is not set
-# CONFIG_MTD_PLATRAM is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLKMTD is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-CONFIG_SCSI=y
-CONFIG_SCSI_PROC_FS=y
-
-#
-# SCSI support type (disk, tape, CD-ROM)
-#
-CONFIG_BLK_DEV_SD=y
-# CONFIG_CHR_DEV_ST is not set
-# CONFIG_CHR_DEV_OSST is not set
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-# CONFIG_CHR_DEV_SCH is not set
-
-#
-# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
-#
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_LOGGING=y
-
-#
-# SCSI Transport Attributes
-#
-CONFIG_SCSI_SPI_ATTRS=y
-# CONFIG_SCSI_FC_ATTRS is not set
-# CONFIG_SCSI_ISCSI_ATTRS is not set
-
-#
-# SCSI low-level drivers
-#
-# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
-# CONFIG_SCSI_3W_9XXX is not set
-# CONFIG_SCSI_ACARD is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
-# CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
-# CONFIG_SCSI_DPT_I2O is not set
-# CONFIG_MEGARAID_NEWGEN is not set
-# CONFIG_MEGARAID_LEGACY is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
-# CONFIG_SCSI_DMX3191D is not set
-# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_FUTURE_DOMAIN is not set
-# CONFIG_SCSI_GDTH is not set
-# CONFIG_SCSI_IPS is not set
-# CONFIG_SCSI_INITIO is not set
-# CONFIG_SCSI_INIA100 is not set
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
-CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
-CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
-# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
-# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_QLOGIC_FC is not set
-# CONFIG_SCSI_QLOGIC_1280 is not set
-CONFIG_SCSI_QLA2XXX=y
-# CONFIG_SCSI_QLA21XX is not set
-# CONFIG_SCSI_QLA22XX is not set
-# CONFIG_SCSI_QLA2300 is not set
-# CONFIG_SCSI_QLA2322 is not set
-# CONFIG_SCSI_QLA6312 is not set
-# CONFIG_SCSI_LPFC is not set
-# CONFIG_SCSI_DC395x is not set
-# CONFIG_SCSI_DC390T is not set
-# CONFIG_SCSI_NSP32 is not set
-# CONFIG_SCSI_DEBUG is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-# CONFIG_FUSION_SPI is not set
-# CONFIG_FUSION_FC is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-CONFIG_R8169=y
-CONFIG_R8169_NAPI=y
-# CONFIG_SKGE is not set
-CONFIG_SK98LIN=y
-# CONFIG_VIA_VELOCITY is not set
-CONFIG_TIGON3=y
-# CONFIG_BNX2 is not set
-CONFIG_MV643XX_ETH=y
-CONFIG_MV643XX_ETH_0=y
-CONFIG_MV643XX_ETH_1=y
-# CONFIG_MV643XX_ETH_2 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_NET_FC is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-CONFIG_KEYBOARD_XTKBD=y
-# CONFIG_KEYBOARD_NEWTON is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_PCIPS2 is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_SERIO_RAW is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-CONFIG_VT=y
-# CONFIG_VT_CONSOLE is not set
-CONFIG_HW_CONSOLE=y
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_MPSC=y
-# CONFIG_SERIAL_MPSC_CONSOLE is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-
-#
-# Watchdog Device Drivers
-#
-# CONFIG_SOFT_WATCHDOG is not set
-
-#
-# PCI-based Watchdog Cards
-#
-# CONFIG_PCIPCWATCHDOG is not set
-# CONFIG_WDTPCI is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-
-#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_MPC is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_SCx200_ACB is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-# CONFIG_I2C_PCA_ISA is not set
-CONFIG_I2C_MV64XXX=y
-CONFIG_I2C_SENSOR=y
-
-#
-# Miscellaneous I2C Chip support
-#
-CONFIG_SENSORS_DS1337=y
-# CONFIG_SENSORS_DS1374 is not set
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
-# CONFIG_SENSORS_M41T00 is not set
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-CONFIG_HWMON=y
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ADM9240 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_ATXP1 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_FSCPOS is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-CONFIG_SENSORS_LM90=y
-# CONFIG_SENSORS_LM92 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_SIS5595 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_VIA686A is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Console display driver support
-#
-# CONFIG_VGA_CONSOLE is not set
-CONFIG_DUMMY_CONSOLE=y
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# SN Devices
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT2_FS_XIP is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
-
-#
-# XFS support
-#
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_WRITEBUFFER=y
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V3_ACL is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-CONFIG_CRC_CCITT=y
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-# CONFIG_DEBUG_KERNEL is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
-
-#
-# Hardware crypto devices
-#
diff --git a/arch/ppc/configs/redwood5_defconfig b/arch/ppc/configs/redwood5_defconfig
deleted file mode 100644
index 4c5486d..0000000
--- a/arch/ppc/configs/redwood5_defconfig
+++ /dev/null
@@ -1,557 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_ASH is not set
-# CONFIG_CPCI405 is not set
-# CONFIG_EP405 is not set
-# CONFIG_OAK is not set
-CONFIG_REDWOOD_5=y
-# CONFIG_REDWOOD_6 is not set
-# CONFIG_SYCAMORE is not set
-# CONFIG_WALNUT is not set
-CONFIG_IBM405_ERR77=y
-CONFIG_IBM405_ERR51=y
-CONFIG_IBM_OCP=y
-CONFIG_PPC_OCP=y
-CONFIG_STB03xxx=y
-CONFIG_IBM_OPENBIOS=y
-# CONFIG_PM is not set
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-# CONFIG_SERIAL_SICC is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-# CONFIG_BLK_DEV_IDECD is not set
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-# CONFIG_IDE_TASKFILE_IO is not set
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_IDE_GENERIC=y
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IBM_EMAC is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_UNIX98_PTYS is not set
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-# CONFIG_DEVFS_FS is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/redwood6_defconfig b/arch/ppc/configs/redwood6_defconfig
deleted file mode 100644
index 5752845..0000000
--- a/arch/ppc/configs/redwood6_defconfig
+++ /dev/null
@@ -1,535 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-# CONFIG_MODULE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_ASH is not set
-# CONFIG_CPCI405 is not set
-# CONFIG_EP405 is not set
-# CONFIG_OAK is not set
-# CONFIG_REDWOOD_5 is not set
-CONFIG_REDWOOD_6=y
-# CONFIG_SYCAMORE is not set
-# CONFIG_WALNUT is not set
-CONFIG_IBM405_ERR77=y
-CONFIG_IBM405_ERR51=y
-CONFIG_IBM_OCP=y
-CONFIG_PPC_OCP=y
-CONFIG_STB03xxx=y
-CONFIG_IBM_OPENBIOS=y
-# CONFIG_PM is not set
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-# CONFIG_SERIAL_SICC is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IBM_EMAC is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-# CONFIG_CRC32 is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/rpx8260_defconfig b/arch/ppc/configs/rpx8260_defconfig
deleted file mode 100644
index a9c4544..0000000
--- a/arch/ppc/configs/rpx8260_defconfig
+++ /dev/null
@@ -1,555 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_E500 is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBC82xx is not set
-# CONFIG_SBS8260 is not set
-CONFIG_RPX8260=y
-# CONFIG_TQM8260 is not set
-# CONFIG_ADS8272 is not set
-CONFIG_8260=y
-CONFIG_CPM2=y
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Bus options
-#
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-# CONFIG_SERIAL_CPM_SCC2 is not set
-# CONFIG_SERIAL_CPM_SCC3 is not set
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-# CONFIG_SERIAL_CPM_SMC2 is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-# CONFIG_SCC_ENET is not set
-CONFIG_FEC_ENET=y
-# CONFIG_USE_MDIO is not set
-
-#
-# CPM2 Options
-#
-# CONFIG_FCC1_ENET is not set
-# CONFIG_FCC2_ENET is not set
-CONFIG_FCC3_ENET=y
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC32 is not set
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_KGDB_CONSOLE is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/rpxcllf_defconfig b/arch/ppc/configs/rpxcllf_defconfig
deleted file mode 100644
index cf932f1..0000000
--- a/arch/ppc/configs/rpxcllf_defconfig
+++ /dev/null
@@ -1,582 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc1
-# Mon Nov 1 16:41:04 2004
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_CLEAN_COMPILE is not set
-CONFIG_BROKEN=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_KOBJECT_UEVENT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SHMEM is not set
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-CONFIG_TINY_SHMEM=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-CONFIG_8xx=y
-# CONFIG_E500 is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_RPXLITE is not set
-CONFIG_RPXCLASSIC=y
-# CONFIG_BSEIP is not set
-# CONFIG_FADS is not set
-# CONFIG_TQM823L is not set
-# CONFIG_TQM850L is not set
-# CONFIG_TQM855L is not set
-# CONFIG_TQM860L is not set
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-# CONFIG_IVMS8 is not set
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-# CONFIG_MBX is not set
-# CONFIG_WINCEPT is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Bus options
-#
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-CONFIG_SERIAL_CPM_SCC2=y
-CONFIG_SERIAL_CPM_SCC3=y
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-CONFIG_SERIAL_CPM_SMC2=y
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
-# CONFIG_HUGETLBFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# MPC8xx CPM Options
-#
-CONFIG_SCC_ENET=y
-CONFIG_SCC1_ENET=y
-# CONFIG_SCC2_ENET is not set
-# CONFIG_SCC3_ENET is not set
-CONFIG_FEC_ENET=y
-# CONFIG_USE_MDIO is not set
-CONFIG_ENET_BIG_BUFFERS=y
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-# CONFIG_8xx_CPU6 is not set
-CONFIG_NO_UCODE_PATCH=y
-# CONFIG_USB_SOF_UCODE_PATCH is not set
-# CONFIG_I2C_SPI_UCODE_PATCH is not set
-# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC32 is not set
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/rpxlite_defconfig b/arch/ppc/configs/rpxlite_defconfig
deleted file mode 100644
index 828dd6e..0000000
--- a/arch/ppc/configs/rpxlite_defconfig
+++ /dev/null
@@ -1,581 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.10-rc1
-# Mon Nov 1 16:41:09 2004
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-# CONFIG_CLEAN_COMPILE is not set
-CONFIG_BROKEN=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_KOBJECT_UEVENT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-# CONFIG_FUTEX is not set
-# CONFIG_EPOLL is not set
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-# CONFIG_SHMEM is not set
-CONFIG_CC_ALIGN_FUNCTIONS=0
-CONFIG_CC_ALIGN_LABELS=0
-CONFIG_CC_ALIGN_LOOPS=0
-CONFIG_CC_ALIGN_JUMPS=0
-CONFIG_TINY_SHMEM=y
-
-#
-# Loadable module support
-#
-# CONFIG_MODULES is not set
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-CONFIG_8xx=y
-# CONFIG_E500 is not set
-CONFIG_MATH_EMULATION=y
-# CONFIG_CPU_FREQ is not set
-CONFIG_EMBEDDEDBOOT=y
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-CONFIG_RPXLITE=y
-# CONFIG_RPXCLASSIC is not set
-# CONFIG_BSEIP is not set
-# CONFIG_FADS is not set
-# CONFIG_TQM823L is not set
-# CONFIG_TQM850L is not set
-# CONFIG_TQM855L is not set
-# CONFIG_TQM860L is not set
-# CONFIG_FPS850L is not set
-# CONFIG_SPD823TS is not set
-# CONFIG_IVMS8 is not set
-# CONFIG_IVML24 is not set
-# CONFIG_SM850 is not set
-# CONFIG_HERMES_PRO is not set
-# CONFIG_IP860 is not set
-# CONFIG_LWMON is not set
-# CONFIG_PCU_E is not set
-# CONFIG_CCM is not set
-# CONFIG_LANTEC is not set
-# CONFIG_MBX is not set
-# CONFIG_WINCEPT is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-# CONFIG_CMDLINE_BOOL is not set
-
-#
-# Bus options
-#
-# CONFIG_PCI is not set
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PCI_QSPAN is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_STANDALONE=y
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_LBD is not set
-# CONFIG_CDROM_PKTCDVD is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-# CONFIG_MII is not set
-# CONFIG_OAKNET is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-
-#
-# Ethernet (10000 Mbit)
-#
-
-#
-# Token Ring devices
-#
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-# CONFIG_SERIAL_8250 is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_SERIAL_CPM_SCC1 is not set
-# CONFIG_SERIAL_CPM_SCC2 is not set
-# CONFIG_SERIAL_CPM_SCC3 is not set
-# CONFIG_SERIAL_CPM_SCC4 is not set
-CONFIG_SERIAL_CPM_SMC1=y
-# CONFIG_SERIAL_CPM_SMC2 is not set
-CONFIG_UNIX98_PTYS=y
-# CONFIG_LEGACY_PTYS is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB_ARCH_HAS_HCD is not set
-# CONFIG_USB_ARCH_HAS_OHCI is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_XATTR is not set
-# CONFIG_HUGETLBFS is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# MPC8xx CPM Options
-#
-CONFIG_SCC_ENET=y
-# CONFIG_SCC1_ENET is not set
-CONFIG_SCC2_ENET=y
-# CONFIG_SCC3_ENET is not set
-# CONFIG_FEC_ENET is not set
-# CONFIG_ENET_BIG_BUFFERS is not set
-
-#
-# Generic MPC8xx Options
-#
-CONFIG_8xx_COPYBACK=y
-# CONFIG_8xx_CPU6 is not set
-CONFIG_NO_UCODE_PATCH=y
-# CONFIG_USB_SOF_UCODE_PATCH is not set
-# CONFIG_I2C_SPI_UCODE_PATCH is not set
-# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
-
-#
-# Library routines
-#
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC32 is not set
-# CONFIG_LIBCRC32C is not set
-
-#
-# Profiling support
-#
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/sandpoint_defconfig b/arch/ppc/configs/sandpoint_defconfig
deleted file mode 100644
index 9525e34..0000000
--- a/arch/ppc/configs/sandpoint_defconfig
+++ /dev/null
@@ -1,737 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_HOTPLUG=y
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-CONFIG_ALTIVEC=y
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-# CONFIG_SPRUCE is not set
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-CONFIG_SANDPOINT=y
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-CONFIG_PPC_GEN550=y
-CONFIG_EPIC_SERIAL_MODE=y
-CONFIG_MPC10X_BRIDGE=y
-# CONFIG_MPC10X_STORE_GATHERING is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-CONFIG_BINFMT_MISC=m
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# PCMCIA/CardBus support
-#
-# CONFIG_PCMCIA is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-# CONFIG_FW_LOADER is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDE=y
-
-#
-# Please see Documentation/ide.txt for help/info on IDE drives
-#
-CONFIG_BLK_DEV_IDEDISK=y
-# CONFIG_IDEDISK_MULTI_MODE is not set
-# CONFIG_IDEDISK_STROKE is not set
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_BLK_DEV_IDETAPE is not set
-# CONFIG_BLK_DEV_IDEFLOPPY is not set
-# CONFIG_IDE_TASK_IOCTL is not set
-CONFIG_IDE_TASKFILE_IO=y
-
-#
-# IDE chipset support/bugfixes
-#
-CONFIG_BLK_DEV_SL82C105=y
-# CONFIG_BLK_DEV_IDEPCI is not set
-# CONFIG_BLK_DEV_IDEDMA is not set
-# CONFIG_IDEDMA_AUTO is not set
-# CONFIG_BLK_DEV_HD is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-CONFIG_DUMMY=m
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-CONFIG_NET_VENDOR_3COM=y
-CONFIG_VORTEX=y
-# CONFIG_TYPHOON is not set
-
-#
-# Tulip family network device support
-#
-CONFIG_NET_TULIP=y
-# CONFIG_DE2104X is not set
-CONFIG_TULIP=y
-# CONFIG_TULIP_MWI is not set
-# CONFIG_TULIP_MMIO is not set
-# CONFIG_TULIP_NAPI is not set
-# CONFIG_DE4X5 is not set
-# CONFIG_WINBOND_840 is not set
-# CONFIG_DM9102 is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_E100_NAPI is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-CONFIG_8139TOO=y
-CONFIG_8139TOO_PIO=y
-# CONFIG_8139TOO_TUNE_TWISTER is not set
-# CONFIG_8139TOO_8129 is not set
-# CONFIG_8139_OLD_RX_RESET is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=m
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_FILTER is not set
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPP_BSDCOMP=m
-# CONFIG_PPPOE is not set
-# CONFIG_SLIP is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-# CONFIG_SERIO is not set
-# CONFIG_SERIO_I8042 is not set
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB=y
-# CONFIG_USB_DEBUG is not set
-
-#
-# Miscellaneous USB options
-#
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_BANDWIDTH is not set
-# CONFIG_USB_DYNAMIC_MINORS is not set
-
-#
-# USB Host Controller Drivers
-#
-# CONFIG_USB_EHCI_HCD is not set
-CONFIG_USB_OHCI_HCD=y
-# CONFIG_USB_UHCI_HCD is not set
-
-#
-# USB Device Class drivers
-#
-# CONFIG_USB_BLUETOOTH_TTY is not set
-CONFIG_USB_ACM=m
-# CONFIG_USB_PRINTER is not set
-# CONFIG_USB_STORAGE is not set
-
-#
-# USB Human Interface Devices (HID)
-#
-# CONFIG_USB_HID is not set
-
-#
-# Input core support is needed for USB HID input layer or HIDBP support
-#
-
-#
-# USB HID Boot Protocol drivers
-#
-
-#
-# USB Imaging devices
-#
-# CONFIG_USB_MDC800 is not set
-
-#
-# USB Multimedia devices
-#
-# CONFIG_USB_DABUSB is not set
-
-#
-# Video4Linux support is needed for USB Multimedia device support
-#
-
-#
-# USB Network adaptors
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-# CONFIG_USB_PEGASUS is not set
-# CONFIG_USB_RTL8150 is not set
-# CONFIG_USB_USBNET is not set
-
-#
-# USB port drivers
-#
-
-#
-# USB Serial Converter support
-#
-CONFIG_USB_SERIAL=m
-# CONFIG_USB_SERIAL_GENERIC is not set
-# CONFIG_USB_SERIAL_BELKIN is not set
-# CONFIG_USB_SERIAL_WHITEHEAT is not set
-# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_EMPEG is not set
-# CONFIG_USB_SERIAL_FTDI_SIO is not set
-CONFIG_USB_SERIAL_VISOR=m
-# CONFIG_USB_SERIAL_IPAQ is not set
-# CONFIG_USB_SERIAL_IR is not set
-# CONFIG_USB_SERIAL_EDGEPORT is not set
-# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
-# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
-# CONFIG_USB_SERIAL_KEYSPAN is not set
-# CONFIG_USB_SERIAL_KLSI is not set
-# CONFIG_USB_SERIAL_KOBIL_SCT is not set
-# CONFIG_USB_SERIAL_MCT_U232 is not set
-# CONFIG_USB_SERIAL_PL2303 is not set
-# CONFIG_USB_SERIAL_SAFE is not set
-# CONFIG_USB_SERIAL_CYBERJACK is not set
-# CONFIG_USB_SERIAL_XIRCOM is not set
-# CONFIG_USB_SERIAL_OMNINET is not set
-
-#
-# USB Miscellaneous drivers
-#
-# CONFIG_USB_EMI62 is not set
-# CONFIG_USB_EMI26 is not set
-# CONFIG_USB_TIGL is not set
-# CONFIG_USB_AUERSWALD is not set
-# CONFIG_USB_RIO500 is not set
-# CONFIG_USB_LEGOTOWER is not set
-# CONFIG_USB_LCD is not set
-# CONFIG_USB_LED is not set
-# CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGETSERVO is not set
-# CONFIG_USB_TEST is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_LOCKD_V4=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=m
-CONFIG_ZLIB_DEFLATE=m
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/spruce_defconfig b/arch/ppc/configs/spruce_defconfig
deleted file mode 100644
index 430dd9c..0000000
--- a/arch/ppc/configs/spruce_defconfig
+++ /dev/null
@@ -1,577 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-CONFIG_KALLSYMS=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-CONFIG_6xx=y
-# CONFIG_40x is not set
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_ALTIVEC is not set
-# CONFIG_TAU is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_PPC_STD_MMU=y
-
-#
-# Platform options
-#
-# CONFIG_PPC_MULTIPLATFORM is not set
-# CONFIG_APUS is not set
-# CONFIG_WILLOW is not set
-# CONFIG_PCORE is not set
-# CONFIG_POWERPMC250 is not set
-# CONFIG_EV64260 is not set
-CONFIG_SPRUCE=y
-# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
-# CONFIG_MVME5100 is not set
-# CONFIG_PPLUS is not set
-# CONFIG_PRPMC750 is not set
-# CONFIG_PRPMC800 is not set
-# CONFIG_SANDPOINT is not set
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
-# CONFIG_PAL4 is not set
-# CONFIG_GEMINI is not set
-# CONFIG_EST8260 is not set
-# CONFIG_SBS8260 is not set
-# CONFIG_RPX6 is not set
-# CONFIG_TQM8260 is not set
-CONFIG_PPC_GEN550=y
-CONFIG_SPRUCE_BAUD_33M=y
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_GENERIC_ISA_DMA=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00800000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-# CONFIG_BLK_DEV_RAM is not set
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-# CONFIG_IP_PNP_BOOTP is not set
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_NET_PCI=y
-CONFIG_PCNET32=y
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-# CONFIG_E100 is not set
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Userland interfaces
-#
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-CONFIG_SERIO_PCIPS2=y
-
-#
-# Input Device Drivers
-#
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-CONFIG_GEN_RTC=y
-# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-# CONFIG_EXT3_FS_POSIX_ACL is not set
-# CONFIG_EXT3_FS_SECURITY is not set
-CONFIG_JBD=y
-# CONFIG_JBD_DEBUG is not set
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-CONFIG_ISO9660_FS=y
-# CONFIG_JOLIET is not set
-# CONFIG_ZISOFS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/sycamore_defconfig b/arch/ppc/configs/sycamore_defconfig
deleted file mode 100644
index 6996cca..0000000
--- a/arch/ppc/configs/sycamore_defconfig
+++ /dev/null
@@ -1,663 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-CONFIG_STANDALONE=y
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-CONFIG_MODVERSIONS=y
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_ASH is not set
-# CONFIG_CPCI405 is not set
-# CONFIG_EP405 is not set
-# CONFIG_EVB405EP is not set
-# CONFIG_OAK is not set
-# CONFIG_REDWOOD_5 is not set
-# CONFIG_REDWOOD_6 is not set
-CONFIG_SYCAMORE=y
-# CONFIG_WALNUT is not set
-CONFIG_IBM_OCP=y
-CONFIG_PPC_OCP=y
-CONFIG_BIOS_FIXUP=y
-CONFIG_405GPR=y
-CONFIG_IBM_OPENBIOS=y
-# CONFIG_PM is not set
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_LEGACY_PROC is not set
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_DECNET is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-CONFIG_NETDEVICES=y
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-CONFIG_IBM_EMAC=y
-# CONFIG_IBM_EMAC_ERRMSG is not set
-CONFIG_IBM_EMAC_RXB=64
-CONFIG_IBM_EMAC_TXB=8
-CONFIG_IBM_EMAC_FGAP=8
-CONFIG_IBM_EMAC_SKBRES=0
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-
-#
-# Amateur Radio support
-#
-# CONFIG_HAMRADIO is not set
-
-#
-# IrDA (infrared) support
-#
-# CONFIG_IRDA is not set
-
-#
-# Bluetooth support
-#
-# CONFIG_BT is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-CONFIG_INPUT_MOUSEDEV=y
-CONFIG_INPUT_MOUSEDEV_PSAUX=y
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-CONFIG_SERIO_I8042=y
-CONFIG_SERIO_SERPORT=y
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-CONFIG_INPUT_KEYBOARD=y
-CONFIG_KEYBOARD_ATKBD=y
-# CONFIG_KEYBOARD_SUNKBD is not set
-# CONFIG_KEYBOARD_LKKBD is not set
-# CONFIG_KEYBOARD_XTKBD is not set
-# CONFIG_KEYBOARD_NEWTON is not set
-CONFIG_INPUT_MOUSE=y
-CONFIG_MOUSE_PS2=y
-# CONFIG_MOUSE_SERIAL is not set
-# CONFIG_MOUSE_VSXXXAA is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-
-#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-# CONFIG_I2C_IBM_IIC is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PIIX4 is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_SCx200_ACB is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-
-#
-# Hardware Sensors Chip support
-#
-# CONFIG_I2C_SENSOR is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_VIA686A is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-
-#
-# Other I2C Chip support
-#
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_INTERMEZZO_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/taishan_defconfig b/arch/ppc/configs/taishan_defconfig
deleted file mode 100644
index 1ca0204..0000000
--- a/arch/ppc/configs/taishan_defconfig
+++ /dev/null
@@ -1,1077 +0,0 @@
-#
-# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.20
-# Mon Feb 12 11:11:58 2007
-#
-CONFIG_MMU=y
-CONFIG_GENERIC_HARDIRQS=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_ARCH_HAS_ILOG2_U32=y
-# CONFIG_ARCH_HAS_ILOG2_U64 is not set
-CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-CONFIG_GENERIC_FIND_NEXT_BIT=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
-CONFIG_ARCH_MAY_HAVE_PC_FDC=y
-CONFIG_GENERIC_BUG=y
-CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_BROKEN_ON_SMP=y
-CONFIG_INIT_ENV_ARG_LIMIT=32
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-# CONFIG_IPC_NS is not set
-# CONFIG_POSIX_MQUEUE is not set
-# CONFIG_BSD_PROCESS_ACCT is not set
-# CONFIG_TASKSTATS is not set
-# CONFIG_UTS_NS is not set
-# CONFIG_AUDIT is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_SYSFS_DEPRECATED=y
-# CONFIG_RELAY is not set
-CONFIG_INITRAMFS_SOURCE=""
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_SYSCTL=y
-CONFIG_EMBEDDED=y
-CONFIG_SYSCTL_SYSCALL=y
-CONFIG_KALLSYMS=y
-# CONFIG_KALLSYMS_ALL is not set
-# CONFIG_KALLSYMS_EXTRA_PASS is not set
-# CONFIG_HOTPLUG is not set
-CONFIG_PRINTK=y
-CONFIG_BUG=y
-CONFIG_ELF_CORE=y
-CONFIG_BASE_FULL=y
-CONFIG_FUTEX=y
-CONFIG_EPOLL=y
-CONFIG_SHMEM=y
-CONFIG_SLAB=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
-CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-# CONFIG_MODVERSIONS is not set
-# CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
-
-#
-# Block layer
-#
-CONFIG_BLOCK=y
-# CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
-
-#
-# IO Schedulers
-#
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-CONFIG_DEFAULT_AS=y
-# CONFIG_DEFAULT_DEADLINE is not set
-# CONFIG_DEFAULT_CFQ is not set
-# CONFIG_DEFAULT_NOOP is not set
-CONFIG_DEFAULT_IOSCHED="anticipatory"
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-# CONFIG_40x is not set
-CONFIG_44x=y
-# CONFIG_8xx is not set
-# CONFIG_E200 is not set
-# CONFIG_E500 is not set
-CONFIG_PPC_DCR_NATIVE=y
-CONFIG_PPC_DCR=y
-CONFIG_BOOKE=y
-CONFIG_PTE_64BIT=y
-CONFIG_PHYS_64BIT=y
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_KEXEC is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-CONFIG_WANT_EARLY_SERIAL=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_BAMBOO is not set
-# CONFIG_EBONY is not set
-# CONFIG_LUAN is not set
-# CONFIG_YUCCA is not set
-# CONFIG_OCOTEA is not set
-CONFIG_TAISHAN=y
-CONFIG_440GX=y
-CONFIG_440A=y
-CONFIG_IBM_OCP=y
-CONFIG_IBM_EMAC4=y
-CONFIG_PPC4xx_DMA=y
-CONFIG_PPC4xx_EDMA=y
-CONFIG_PPC_GEN550=y
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_ARCH_POPULATES_NODE_MAP=y
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-# CONFIG_HZ_300 is not set
-# CONFIG_HZ_1000 is not set
-CONFIG_HZ=250
-CONFIG_PREEMPT_NONE=y
-# CONFIG_PREEMPT_VOLUNTARY is not set
-# CONFIG_PREEMPT is not set
-CONFIG_SELECT_MEMORY_MODEL=y
-CONFIG_FLATMEM_MANUAL=y
-# CONFIG_DISCONTIGMEM_MANUAL is not set
-# CONFIG_SPARSEMEM_MANUAL is not set
-CONFIG_FLATMEM=y
-CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-CONFIG_SPLIT_PTLOCK_CPUS=4
-CONFIG_RESOURCES_64BIT=y
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on console=ttyS0,115200"
-CONFIG_SECCOMP=y
-CONFIG_ISA_DMA_API=y
-
-#
-# Bus options
-#
-CONFIG_ZONE_DMA=y
-# CONFIG_PPC_I8259 is not set
-CONFIG_PPC_INDIRECT_PCI=y
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-# CONFIG_PCI_DEBUG is not set
-
-#
-# PCCARD (PCMCIA/CardBus) support
-#
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_CONSISTENT_START=0xff100000
-CONFIG_CONSISTENT_SIZE=0x00200000
-CONFIG_BOOT_LOAD=0x01000000
-
-#
-# Networking
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_NETDEBUG is not set
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-CONFIG_UNIX=y
-CONFIG_XFRM=y
-# CONFIG_XFRM_USER is not set
-# CONFIG_XFRM_SUB_POLICY is not set
-# CONFIG_XFRM_MIGRATE is not set
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-# CONFIG_IP_MULTICAST is not set
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_ASK_IP_FIB_HASH=y
-# CONFIG_IP_FIB_TRIE is not set
-CONFIG_IP_FIB_HASH=y
-# CONFIG_IP_MULTIPLE_TABLES is not set
-# CONFIG_IP_ROUTE_MULTIPATH is not set
-# CONFIG_IP_ROUTE_VERBOSE is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_ARPD is not set
-# CONFIG_SYN_COOKIES is not set
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_XFRM_TUNNEL is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_INET_XFRM_MODE_TRANSPORT=y
-CONFIG_INET_XFRM_MODE_TUNNEL=y
-CONFIG_INET_XFRM_MODE_BEET=y
-CONFIG_INET_DIAG=y
-CONFIG_INET_TCP_DIAG=y
-# CONFIG_TCP_CONG_ADVANCED is not set
-CONFIG_TCP_CONG_CUBIC=y
-CONFIG_DEFAULT_TCP_CONG="cubic"
-# CONFIG_TCP_MD5SIG is not set
-# CONFIG_IPV6 is not set
-# CONFIG_INET6_XFRM_TUNNEL is not set
-# CONFIG_INET6_TUNNEL is not set
-# CONFIG_NETWORK_SECMARK is not set
-# CONFIG_NETFILTER is not set
-
-#
-# DCCP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_DCCP is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-
-#
-# TIPC Configuration (EXPERIMENTAL)
-#
-# CONFIG_TIPC is not set
-# CONFIG_ATM is not set
-CONFIG_BRIDGE=y
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-CONFIG_LLC=y
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-# CONFIG_IEEE80211 is not set
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-# CONFIG_STANDALONE is not set
-CONFIG_PREVENT_FIRMWARE_BUILD=y
-# CONFIG_DEBUG_DRIVER is not set
-# CONFIG_DEBUG_DEVRES is not set
-# CONFIG_SYS_HYPERVISOR is not set
-
-#
-# Connector - unified userspace <-> kernelspace linker
-#
-# CONFIG_CONNECTOR is not set
-
-#
-# Memory Technology Devices (MTD)
-#
-CONFIG_MTD=y
-# CONFIG_MTD_DEBUG is not set
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
-# CONFIG_MTD_REDBOOT_PARTS is not set
-CONFIG_MTD_CMDLINE_PARTS=y
-
-#
-# User Modules And Translation Layers
-#
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-# CONFIG_RFD_FTL is not set
-# CONFIG_SSFDC is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-CONFIG_MTD_CFI=y
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_GEN_PROBE=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_NOSWAP=y
-# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
-# CONFIG_MTD_CFI_GEOMETRY is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
-# CONFIG_MTD_CFI_I4 is not set
-# CONFIG_MTD_CFI_I8 is not set
-# CONFIG_MTD_OTP is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-CONFIG_MTD_CFI_AMDSTD=y
-# CONFIG_MTD_CFI_STAA is not set
-CONFIG_MTD_CFI_UTIL=y
-# CONFIG_MTD_RAM is not set
-# CONFIG_MTD_ROM is not set
-# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_OBSOLETE_CHIPS is not set
-
-#
-# Mapping drivers for chip access
-#
-CONFIG_MTD_COMPLEX_MAPPINGS=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0x8000000
-CONFIG_MTD_PHYSMAP_LEN=0x0
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-# CONFIG_MTD_PCI is not set
-# CONFIG_MTD_PLATRAM is not set
-
-#
-# Self-contained MTD device drivers
-#
-# CONFIG_MTD_PMC551 is not set
-# CONFIG_MTD_SLRAM is not set
-# CONFIG_MTD_PHRAM is not set
-# CONFIG_MTD_MTDRAM is not set
-# CONFIG_MTD_BLOCK2MTD is not set
-
-#
-# Disk-On-Chip Device Drivers
-#
-# CONFIG_MTD_DOC2000 is not set
-# CONFIG_MTD_DOC2001 is not set
-# CONFIG_MTD_DOC2001PLUS is not set
-
-#
-# NAND Flash Device Drivers
-#
-# CONFIG_MTD_NAND is not set
-# CONFIG_MTD_NAND_CAFE is not set
-
-#
-# OneNAND Flash Device Drivers
-#
-# CONFIG_MTD_ONENAND is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-# CONFIG_BLK_DEV_COW_COMMON is not set
-# CONFIG_BLK_DEV_LOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_SX8 is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CDROM_PKTCDVD is not set
-# CONFIG_ATA_OVER_ETH is not set
-
-#
-# Misc devices
-#
-# CONFIG_SGI_IOC4 is not set
-# CONFIG_TIFM_CORE is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_RAID_ATTRS is not set
-# CONFIG_SCSI is not set
-# CONFIG_SCSI_NETLINK is not set
-
-#
-# Serial ATA (prod) and Parallel ATA (experimental) drivers
-#
-# CONFIG_ATA is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-# CONFIG_MAC_EMUMOUSEBTN is not set
-# CONFIG_WINDFARM is not set
-
-#
-# Network device support
-#
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# PHY device support
-#
-# CONFIG_PHYLIB is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_CASSINI is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-CONFIG_IBM_EMAC=y
-CONFIG_IBM_EMAC_RXB=128
-CONFIG_IBM_EMAC_TXB=128
-CONFIG_IBM_EMAC_POLL_WEIGHT=32
-CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256
-CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0
-CONFIG_IBM_EMAC_PHY_RX_CLK_FIX=y
-# CONFIG_IBM_EMAC_DEBUG is not set
-CONFIG_IBM_EMAC_ZMII=y
-CONFIG_IBM_EMAC_RGMII=y
-CONFIG_IBM_EMAC_TAH=y
-CONFIG_NET_PCI=y
-# CONFIG_PCNET32 is not set
-# CONFIG_AMD8111_ETH is not set
-# CONFIG_ADAPTEC_STARFIRE is not set
-# CONFIG_B44 is not set
-# CONFIG_FORCEDETH is not set
-# CONFIG_DGRS is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_E100=y
-# CONFIG_FEALNX is not set
-# CONFIG_NATSEMI is not set
-# CONFIG_NE2K_PCI is not set
-# CONFIG_8139CP is not set
-# CONFIG_8139TOO is not set
-# CONFIG_SIS900 is not set
-# CONFIG_EPIC100 is not set
-# CONFIG_SUNDANCE is not set
-# CONFIG_TLAN is not set
-# CONFIG_VIA_RHINE is not set
-# CONFIG_SC92031 is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SIS190 is not set
-# CONFIG_SKGE is not set
-# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_VIA_VELOCITY is not set
-# CONFIG_TIGON3 is not set
-# CONFIG_BNX2 is not set
-# CONFIG_QLA3XXX is not set
-# CONFIG_ATL1 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_CHELSIO_T1 is not set
-# CONFIG_CHELSIO_T3 is not set
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-# CONFIG_MYRI10GE is not set
-# CONFIG_NETXEN_NIC is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-CONFIG_PPP=y
-# CONFIG_PPP_MULTILINK is not set
-# CONFIG_PPP_FILTER is not set
-# CONFIG_PPP_ASYNC is not set
-# CONFIG_PPP_SYNC_TTY is not set
-# CONFIG_PPP_DEFLATE is not set
-# CONFIG_PPP_BSDCOMP is not set
-# CONFIG_PPP_MPPE is not set
-CONFIG_PPPOE=y
-# CONFIG_SLIP is not set
-CONFIG_SLHC=y
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-# CONFIG_INPUT is not set
-
-#
-# Hardware I/O ports
-#
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_PCIPS2 is not set
-# CONFIG_SERIO_LIBPS2 is not set
-# CONFIG_SERIO_RAW is not set
-# CONFIG_GAMEPORT is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_PCI=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-CONFIG_SERIAL_8250_RUNTIME_UARTS=4
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-CONFIG_SERIAL_8250_SHARE_IRQ=y
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_RSA is not set
-
-#
-# Non-8250 serial port support
-#
-# CONFIG_SERIAL_UARTLITE is not set
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_JSM is not set
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_HW_RANDOM=m
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# TPM devices
-#
-# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-
-#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
-# I2C Hardware Bus support
-#
-# CONFIG_I2C_ALI1535 is not set
-# CONFIG_I2C_ALI1563 is not set
-# CONFIG_I2C_ALI15X3 is not set
-# CONFIG_I2C_AMD756 is not set
-# CONFIG_I2C_AMD8111 is not set
-# CONFIG_I2C_I801 is not set
-# CONFIG_I2C_I810 is not set
-# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_IBM_IIC=y
-# CONFIG_I2C_MPC is not set
-# CONFIG_I2C_NFORCE2 is not set
-# CONFIG_I2C_OCORES is not set
-# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PROSAVAGE is not set
-# CONFIG_I2C_SAVAGE4 is not set
-# CONFIG_I2C_SIS5595 is not set
-# CONFIG_I2C_SIS630 is not set
-# CONFIG_I2C_SIS96X is not set
-# CONFIG_I2C_STUB is not set
-# CONFIG_I2C_VIA is not set
-# CONFIG_I2C_VIAPRO is not set
-# CONFIG_I2C_VOODOO3 is not set
-# CONFIG_I2C_PCA_ISA is not set
-
-#
-# Miscellaneous I2C Chip support
-#
-# CONFIG_SENSORS_DS1337 is not set
-# CONFIG_SENSORS_DS1374 is not set
-CONFIG_SENSORS_EEPROM=y
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_M41T00 is not set
-# CONFIG_SENSORS_MAX6875 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# SPI support
-#
-# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
-CONFIG_HWMON=y
-# CONFIG_HWMON_VID is not set
-# CONFIG_SENSORS_ABITUGURU is not set
-# CONFIG_SENSORS_ADM1021 is not set
-# CONFIG_SENSORS_ADM1025 is not set
-# CONFIG_SENSORS_ADM1026 is not set
-# CONFIG_SENSORS_ADM1031 is not set
-# CONFIG_SENSORS_ADM9240 is not set
-# CONFIG_SENSORS_ASB100 is not set
-# CONFIG_SENSORS_ATXP1 is not set
-# CONFIG_SENSORS_DS1621 is not set
-# CONFIG_SENSORS_F71805F is not set
-# CONFIG_SENSORS_FSCHER is not set
-# CONFIG_SENSORS_FSCPOS is not set
-# CONFIG_SENSORS_GL518SM is not set
-# CONFIG_SENSORS_GL520SM is not set
-# CONFIG_SENSORS_IT87 is not set
-# CONFIG_SENSORS_LM63 is not set
-# CONFIG_SENSORS_LM75 is not set
-# CONFIG_SENSORS_LM77 is not set
-# CONFIG_SENSORS_LM78 is not set
-# CONFIG_SENSORS_LM80 is not set
-# CONFIG_SENSORS_LM83 is not set
-# CONFIG_SENSORS_LM85 is not set
-# CONFIG_SENSORS_LM87 is not set
-# CONFIG_SENSORS_LM90 is not set
-# CONFIG_SENSORS_LM92 is not set
-# CONFIG_SENSORS_MAX1619 is not set
-# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_PC87427 is not set
-# CONFIG_SENSORS_SIS5595 is not set
-# CONFIG_SENSORS_SMSC47M1 is not set
-# CONFIG_SENSORS_SMSC47M192 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
-# CONFIG_SENSORS_VIA686A is not set
-# CONFIG_SENSORS_VT1211 is not set
-# CONFIG_SENSORS_VT8231 is not set
-# CONFIG_SENSORS_W83781D is not set
-# CONFIG_SENSORS_W83791D is not set
-# CONFIG_SENSORS_W83792D is not set
-# CONFIG_SENSORS_W83793 is not set
-# CONFIG_SENSORS_W83L785TS is not set
-# CONFIG_SENSORS_W83627HF is not set
-# CONFIG_SENSORS_W83627EHF is not set
-# CONFIG_HWMON_DEBUG_CHIP is not set
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-CONFIG_FIRMWARE_EDID=y
-# CONFIG_FB is not set
-# CONFIG_FB_IBM_GXT4500 is not set
-# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-CONFIG_USB_ARCH_HAS_HCD=y
-CONFIG_USB_ARCH_HAS_OHCI=y
-CONFIG_USB_ARCH_HAS_EHCI=y
-# CONFIG_USB is not set
-
-#
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
-#
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
-# CONFIG_MMC is not set
-
-#
-# LED devices
-#
-# CONFIG_NEW_LEDS is not set
-
-#
-# LED drivers
-#
-
-#
-# LED Triggers
-#
-
-#
-# InfiniBand support
-#
-# CONFIG_INFINIBAND is not set
-
-#
-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
-#
-
-#
-# Real Time Clock
-#
-# CONFIG_RTC_CLASS is not set
-
-#
-# DMA Engine support
-#
-# CONFIG_DMA_ENGINE is not set
-
-#
-# DMA Clients
-#
-
-#
-# DMA Devices
-#
-
-#
-# Auxiliary Display support
-#
-
-#
-# Virtualization
-#
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_XATTR=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-# CONFIG_EXT4DEV_FS is not set
-CONFIG_JBD=y
-CONFIG_JBD_DEBUG=y
-CONFIG_FS_MBCACHE=y
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-CONFIG_FS_POSIX_ACL=y
-# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
-# CONFIG_OCFS2_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-CONFIG_INOTIFY=y
-CONFIG_INOTIFY_USER=y
-# CONFIG_QUOTA is not set
-CONFIG_DNOTIFY=y
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-# CONFIG_FUSE_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_MSDOS_FS is not set
-# CONFIG_VFAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_PROC_SYSCTL=y
-CONFIG_SYSFS=y
-CONFIG_TMPFS=y
-# CONFIG_TMPFS_POSIX_ACL is not set
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-# CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_FS_DEBUG=0
-CONFIG_JFFS2_FS_WRITEBUFFER=y
-CONFIG_JFFS2_SUMMARY=y
-# CONFIG_JFFS2_FS_XATTR is not set
-# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
-CONFIG_JFFS2_ZLIB=y
-CONFIG_JFFS2_RTIME=y
-# CONFIG_JFFS2_RUBIN is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-CONFIG_NFS_COMMON=y
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_RPCSEC_GSS_SPKM3 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-# CONFIG_9P_FS is not set
-
-#
-# Partition Types
-#
-# CONFIG_PARTITION_ADVANCED is not set
-CONFIG_MSDOS_PARTITION=y
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# Distributed Lock Manager
-#
-# CONFIG_DLM is not set
-
-#
-# Library routines
-#
-CONFIG_BITREVERSE=y
-# CONFIG_CRC_CCITT is not set
-# CONFIG_CRC16 is not set
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-CONFIG_ZLIB_INFLATE=y
-CONFIG_ZLIB_DEFLATE=y
-CONFIG_PLIST=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT=y
-# CONFIG_PROFILING is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_PRINTK_TIME is not set
-CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_MAGIC_SYSRQ is not set
-# CONFIG_UNUSED_SYMBOLS is not set
-CONFIG_DEBUG_FS=y
-# CONFIG_HEADERS_CHECK is not set
-CONFIG_DEBUG_KERNEL=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_DETECT_SOFTLOCKUP=y
-# CONFIG_SCHEDSTATS is not set
-# CONFIG_DEBUG_SLAB is not set
-# CONFIG_DEBUG_RT_MUTEXES is not set
-# CONFIG_RT_MUTEX_TESTER is not set
-# CONFIG_DEBUG_SPINLOCK is not set
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
-# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
-# CONFIG_DEBUG_KOBJECT is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
-CONFIG_DEBUG_INFO=y
-# CONFIG_DEBUG_VM is not set
-# CONFIG_DEBUG_LIST is not set
-CONFIG_FORCED_INLINING=y
-# CONFIG_RCU_TORTURE_TEST is not set
-# CONFIG_KGDB is not set
-# CONFIG_XMON is not set
-CONFIG_BDI_SWITCH=y
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_PPC_OCP=y
-
-#
-# Security options
-#
-# CONFIG_KEYS is not set
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/configs/walnut_defconfig b/arch/ppc/configs/walnut_defconfig
deleted file mode 100644
index bf9721a..0000000
--- a/arch/ppc/configs/walnut_defconfig
+++ /dev/null
@@ -1,578 +0,0 @@
-#
-# Automatically generated make config: don't edit
-#
-CONFIG_MMU=y
-CONFIG_RWSEM_XCHGADD_ALGORITHM=y
-CONFIG_HAVE_DEC_LOCK=y
-CONFIG_PPC=y
-CONFIG_PPC32=y
-CONFIG_GENERIC_NVRAM=y
-
-#
-# Code maturity level options
-#
-CONFIG_EXPERIMENTAL=y
-CONFIG_CLEAN_COMPILE=y
-# CONFIG_STANDALONE is not set
-CONFIG_BROKEN_ON_SMP=y
-
-#
-# General setup
-#
-CONFIG_SWAP=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-# CONFIG_BSD_PROCESS_ACCT is not set
-CONFIG_SYSCTL=y
-# CONFIG_AUDIT is not set
-CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_HOTPLUG is not set
-# CONFIG_IKCONFIG is not set
-CONFIG_EMBEDDED=y
-# CONFIG_KALLSYMS is not set
-CONFIG_FUTEX=y
-# CONFIG_EPOLL is not set
-CONFIG_IOSCHED_NOOP=y
-CONFIG_IOSCHED_AS=y
-CONFIG_IOSCHED_DEADLINE=y
-CONFIG_IOSCHED_CFQ=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-
-#
-# Loadable module support
-#
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_MODULE_FORCE_UNLOAD is not set
-CONFIG_OBSOLETE_MODPARM=y
-# CONFIG_MODVERSIONS is not set
-CONFIG_KMOD=y
-
-#
-# Processor
-#
-# CONFIG_6xx is not set
-CONFIG_40x=y
-# CONFIG_44x is not set
-# CONFIG_POWER3 is not set
-# CONFIG_POWER4 is not set
-# CONFIG_8xx is not set
-# CONFIG_MATH_EMULATION is not set
-# CONFIG_CPU_FREQ is not set
-CONFIG_4xx=y
-
-#
-# IBM 4xx options
-#
-# CONFIG_ASH is not set
-# CONFIG_BUBINGA is not set
-# CONFIG_CPCI405 is not set
-# CONFIG_EP405 is not set
-# CONFIG_OAK is not set
-# CONFIG_REDWOOD_5 is not set
-# CONFIG_REDWOOD_6 is not set
-# CONFIG_SYCAMORE is not set
-CONFIG_WALNUT=y
-CONFIG_IBM405_ERR77=y
-CONFIG_IBM405_ERR51=y
-CONFIG_IBM_OCP=y
-CONFIG_BIOS_FIXUP=y
-CONFIG_405GP=y
-CONFIG_IBM_OPENBIOS=y
-# CONFIG_PM is not set
-CONFIG_UART0_TTYS0=y
-# CONFIG_UART0_TTYS1 is not set
-CONFIG_NOT_COHERENT_CACHE=y
-
-#
-# Platform options
-#
-# CONFIG_PC_KEYBOARD is not set
-# CONFIG_SMP is not set
-# CONFIG_PREEMPT is not set
-# CONFIG_HIGHMEM is not set
-CONFIG_KERNEL_ELF=y
-CONFIG_BINFMT_ELF=y
-# CONFIG_BINFMT_MISC is not set
-CONFIG_CMDLINE_BOOL=y
-CONFIG_CMDLINE="ip=on"
-
-#
-# Bus options
-#
-CONFIG_PCI=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_LEGACY_PROC=y
-# CONFIG_PCI_NAMES is not set
-
-#
-# Advanced setup
-#
-# CONFIG_ADVANCED_OPTIONS is not set
-
-#
-# Default settings for advanced configuration options are used
-#
-CONFIG_HIGHMEM_START=0xfe000000
-CONFIG_LOWMEM_SIZE=0x30000000
-CONFIG_KERNEL_START=0xc0000000
-CONFIG_TASK_SIZE=0x80000000
-CONFIG_BOOT_LOAD=0x00400000
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-
-#
-# Memory Technology Devices (MTD)
-#
-# CONFIG_MTD is not set
-
-#
-# Parallel port support
-#
-# CONFIG_PARPORT is not set
-
-#
-# Plug and Play support
-#
-
-#
-# Block devices
-#
-# CONFIG_BLK_DEV_FD is not set
-# CONFIG_BLK_CPQ_DA is not set
-# CONFIG_BLK_CPQ_CISS_DA is not set
-# CONFIG_BLK_DEV_DAC960 is not set
-# CONFIG_BLK_DEV_UMEM is not set
-CONFIG_BLK_DEV_LOOP=y
-# CONFIG_BLK_DEV_CRYPTOLOOP is not set
-# CONFIG_BLK_DEV_NBD is not set
-# CONFIG_BLK_DEV_CARMEL is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=4096
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_LBD is not set
-
-#
-# ATA/ATAPI/MFM/RLL support
-#
-# CONFIG_IDE is not set
-
-#
-# SCSI device support
-#
-# CONFIG_SCSI is not set
-
-#
-# Multi-device support (RAID and LVM)
-#
-# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-
-#
-# IEEE 1394 (FireWire) support
-#
-# CONFIG_IEEE1394 is not set
-
-#
-# I2O device support
-#
-# CONFIG_I2O is not set
-
-#
-# Macintosh device drivers
-#
-
-#
-# Networking support
-#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-# CONFIG_PACKET is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-# CONFIG_IP_PNP_DHCP is not set
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-# CONFIG_BRIDGE is not set
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-# CONFIG_NET_HW_FLOWCONTROL is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
-CONFIG_NETDEVICES=y
-# CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
-# CONFIG_EQUALIZER is not set
-# CONFIG_TUN is not set
-
-#
-# ARCnet devices
-#
-# CONFIG_ARCNET is not set
-
-#
-# Ethernet (10 or 100Mbit)
-#
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-# CONFIG_OAKNET is not set
-# CONFIG_HAPPYMEAL is not set
-# CONFIG_SUNGEM is not set
-# CONFIG_NET_VENDOR_3COM is not set
-
-#
-# Tulip family network device support
-#
-# CONFIG_NET_TULIP is not set
-# CONFIG_HP100 is not set
-# CONFIG_NET_PCI is not set
-
-#
-# Ethernet (1000 Mbit)
-#
-# CONFIG_ACENIC is not set
-# CONFIG_DL2K is not set
-# CONFIG_E1000 is not set
-# CONFIG_NS83820 is not set
-# CONFIG_HAMACHI is not set
-# CONFIG_YELLOWFIN is not set
-# CONFIG_R8169 is not set
-# CONFIG_SK98LIN is not set
-# CONFIG_TIGON3 is not set
-
-#
-# Ethernet (10000 Mbit)
-#
-# CONFIG_IXGB is not set
-# CONFIG_S2IO is not set
-
-#
-# Token Ring devices
-#
-# CONFIG_TR is not set
-
-#
-# Wireless LAN (non-hamradio)
-#
-# CONFIG_NET_RADIO is not set
-
-#
-# Wan interfaces
-#
-# CONFIG_WAN is not set
-# CONFIG_FDDI is not set
-# CONFIG_HIPPI is not set
-# CONFIG_PPP is not set
-# CONFIG_SLIP is not set
-# CONFIG_RCPCI is not set
-# CONFIG_SHAPER is not set
-# CONFIG_NETCONSOLE is not set
-
-#
-# ISDN subsystem
-#
-# CONFIG_ISDN is not set
-
-#
-# Telephony Support
-#
-# CONFIG_PHONE is not set
-
-#
-# Input device support
-#
-CONFIG_INPUT=y
-
-#
-# Userland interfaces
-#
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_JOYDEV is not set
-# CONFIG_INPUT_TSDEV is not set
-# CONFIG_INPUT_EVDEV is not set
-# CONFIG_INPUT_EVBUG is not set
-
-#
-# Input I/O drivers
-#
-# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
-CONFIG_SERIO=y
-# CONFIG_SERIO_I8042 is not set
-# CONFIG_SERIO_SERPORT is not set
-# CONFIG_SERIO_CT82C710 is not set
-# CONFIG_SERIO_PCIPS2 is not set
-
-#
-# Input Device Drivers
-#
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_INPUT_JOYSTICK is not set
-# CONFIG_INPUT_TOUCHSCREEN is not set
-# CONFIG_INPUT_MISC is not set
-
-#
-# Character devices
-#
-# CONFIG_VT is not set
-# CONFIG_SERIAL_NONSTANDARD is not set
-
-#
-# Serial drivers
-#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=4
-# CONFIG_SERIAL_8250_EXTENDED is not set
-
-#
-# Non-8250 serial port support
-#
-CONFIG_SERIAL_CORE=y
-CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
-# CONFIG_QIC02_TAPE is not set
-
-#
-# IPMI
-#
-# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
-# CONFIG_WATCHDOG is not set
-# CONFIG_NVRAM is not set
-# CONFIG_GEN_RTC is not set
-# CONFIG_DTLK is not set
-# CONFIG_R3964 is not set
-# CONFIG_APPLICOM is not set
-
-#
-# Ftape, the floppy tape device driver
-#
-# CONFIG_FTAPE is not set
-# CONFIG_AGP is not set
-# CONFIG_DRM is not set
-# CONFIG_RAW_DRIVER is not set
-
-#
-# I2C support
-#
-# CONFIG_I2C is not set
-
-#
-# Misc devices
-#
-
-#
-# Multimedia devices
-#
-# CONFIG_VIDEO_DEV is not set
-
-#
-# Digital Video Broadcasting Devices
-#
-# CONFIG_DVB is not set
-
-#
-# Graphics support
-#
-# CONFIG_FB is not set
-
-#
-# Sound
-#
-# CONFIG_SOUND is not set
-
-#
-# USB support
-#
-# CONFIG_USB is not set
-
-#
-# USB Gadget Support
-#
-# CONFIG_USB_GADGET is not set
-
-#
-# File systems
-#
-CONFIG_EXT2_FS=y
-# CONFIG_EXT2_FS_XATTR is not set
-# CONFIG_EXT3_FS is not set
-# CONFIG_JBD is not set
-# CONFIG_REISERFS_FS is not set
-# CONFIG_JFS_FS is not set
-# CONFIG_XFS_FS is not set
-# CONFIG_MINIX_FS is not set
-# CONFIG_ROMFS_FS is not set
-# CONFIG_QUOTA is not set
-# CONFIG_AUTOFS_FS is not set
-# CONFIG_AUTOFS4_FS is not set
-
-#
-# CD-ROM/DVD Filesystems
-#
-# CONFIG_ISO9660_FS is not set
-# CONFIG_UDF_FS is not set
-
-#
-# DOS/FAT/NT Filesystems
-#
-# CONFIG_FAT_FS is not set
-# CONFIG_NTFS_FS is not set
-
-#
-# Pseudo filesystems
-#
-CONFIG_PROC_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
-# CONFIG_DEVPTS_FS_XATTR is not set
-CONFIG_TMPFS=y
-# CONFIG_HUGETLB_PAGE is not set
-CONFIG_RAMFS=y
-
-#
-# Miscellaneous filesystems
-#
-# CONFIG_ADFS_FS is not set
-# CONFIG_AFFS_FS is not set
-# CONFIG_HFS_FS is not set
-# CONFIG_HFSPLUS_FS is not set
-# CONFIG_BEFS_FS is not set
-# CONFIG_BFS_FS is not set
-# CONFIG_EFS_FS is not set
-# CONFIG_CRAMFS is not set
-# CONFIG_VXFS_FS is not set
-# CONFIG_HPFS_FS is not set
-# CONFIG_QNX4FS_FS is not set
-# CONFIG_SYSV_FS is not set
-# CONFIG_UFS_FS is not set
-
-#
-# Network File Systems
-#
-CONFIG_NFS_FS=y
-# CONFIG_NFS_V3 is not set
-# CONFIG_NFS_V4 is not set
-# CONFIG_NFS_DIRECTIO is not set
-# CONFIG_NFSD is not set
-CONFIG_ROOT_NFS=y
-CONFIG_LOCKD=y
-# CONFIG_EXPORTFS is not set
-CONFIG_SUNRPC=y
-# CONFIG_RPCSEC_GSS_KRB5 is not set
-# CONFIG_SMB_FS is not set
-# CONFIG_CIFS is not set
-# CONFIG_NCP_FS is not set
-# CONFIG_CODA_FS is not set
-# CONFIG_AFS_FS is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_ACORN_PARTITION is not set
-# CONFIG_OSF_PARTITION is not set
-# CONFIG_AMIGA_PARTITION is not set
-# CONFIG_ATARI_PARTITION is not set
-# CONFIG_MAC_PARTITION is not set
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_LDM_PARTITION is not set
-# CONFIG_NEC98_PARTITION is not set
-# CONFIG_SGI_PARTITION is not set
-# CONFIG_ULTRIX_PARTITION is not set
-# CONFIG_SUN_PARTITION is not set
-# CONFIG_EFI_PARTITION is not set
-
-#
-# Native Language Support
-#
-# CONFIG_NLS is not set
-
-#
-# IBM 40x options
-#
-
-#
-# Library routines
-#
-CONFIG_CRC32=y
-# CONFIG_LIBCRC32C is not set
-
-#
-# Kernel hacking
-#
-# CONFIG_DEBUG_KERNEL is not set
-# CONFIG_SERIAL_TEXT_DEBUG is not set
-CONFIG_PPC_OCP=y
-
-#
-# Security options
-#
-# CONFIG_SECURITY is not set
-
-#
-# Cryptographic options
-#
-# CONFIG_CRYPTO is not set
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
deleted file mode 100644
index 7b73905..0000000
--- a/arch/ppc/kernel/Makefile
+++ /dev/null
@@ -1,21 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-extra-$(CONFIG_PPC_STD_MMU) := head.o
-extra-$(CONFIG_40x) := head_4xx.o
-extra-$(CONFIG_44x) := head_44x.o
-extra-$(CONFIG_8xx) := head_8xx.o
-extra-y += vmlinux.lds
-
-obj-y := entry.o traps.o time.o misc.o \
- setup.o \
- ppc_htab.o
-obj-$(CONFIG_MODULES) += ppc_ksyms.o
-obj-$(CONFIG_PCI) += pci.o
-obj-$(CONFIG_KGDB) += ppc-stub.o
-obj-$(CONFIG_SMP) += smp.o smp-tbsync.o
-obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
-
-ifndef CONFIG_MATH_EMULATION
-obj-$(CONFIG_8xx) += softemu8xx.o
-endif
diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c
deleted file mode 100644
index 8dcbdd6..0000000
--- a/arch/ppc/kernel/asm-offsets.c
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * This program is used to generate definitions needed by
- * assembly language modules.
- *
- * We use the technique used in the OSF Mach kernel code:
- * generate asm statements containing #defines,
- * compile this file to assembler, and then extract the
- * #defines from the assembly-language output.
- */
-
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/suspend.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/kbuild.h>
-
-#include <asm/io.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/processor.h>
-#include <asm/cputable.h>
-#include <asm/thread_info.h>
-#include <asm/vdso_datapage.h>
-
-int
-main(void)
-{
- DEFINE(THREAD, offsetof(struct task_struct, thread));
- DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
- DEFINE(MM, offsetof(struct task_struct, mm));
- DEFINE(PTRACE, offsetof(struct task_struct, ptrace));
- DEFINE(KSP, offsetof(struct thread_struct, ksp));
- DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
- DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
- DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
- DEFINE(THREAD_FPR0, offsetof(struct thread_struct, fpr[0]));
- DEFINE(THREAD_FPSCR, offsetof(struct thread_struct, fpscr));
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
- DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, dbcr0));
- DEFINE(PT_PTRACED, PT_PTRACED);
-#endif
-#ifdef CONFIG_ALTIVEC
- DEFINE(THREAD_VR0, offsetof(struct thread_struct, vr[0]));
- DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
- DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
- DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
-#endif /* CONFIG_ALTIVEC */
- /* Interrupt register frame */
- DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
- DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
- /* in fact we only use gpr0 - gpr9 and gpr20 - gpr23 */
- DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
- DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
- DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
- DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
- DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
- DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
- DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
- DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
- DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
- DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
- DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
- DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
- DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
- DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
- DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
- DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
- DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
- DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
- DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
- DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
- DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
- DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
- DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
- DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
- DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
- DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
- DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
- DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
- DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
- DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
- DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
- DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
- /* Note: these symbols include _ because they overlap with special
- * register names
- */
- DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
- DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
- DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
- DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
- DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
- DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
- DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
- DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
- DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
- /* The PowerPC 400-class & Book-E processors have neither the DAR nor the DSISR
- * SPRs. Hence, we overload them to hold the similar DEAR and ESR SPRs
- * for such processors. For critical interrupts we use them to
- * hold SRR0 and SRR1.
- */
- DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
- DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
- DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
- DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
- DEFINE(TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
- DEFINE(CLONE_VM, CLONE_VM);
- DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
- DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
-
- /* About the CPU features table */
- DEFINE(CPU_SPEC_ENTRY_SIZE, sizeof(struct cpu_spec));
- DEFINE(CPU_SPEC_PVR_MASK, offsetof(struct cpu_spec, pvr_mask));
- DEFINE(CPU_SPEC_PVR_VALUE, offsetof(struct cpu_spec, pvr_value));
- DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
- DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
-
- DEFINE(TI_TASK, offsetof(struct thread_info, task));
- DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
- DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
- DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
- DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
- DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
-
- DEFINE(pbe_address, offsetof(struct pbe, address));
- DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
- DEFINE(pbe_next, offsetof(struct pbe, next));
-
- DEFINE(TASK_SIZE, TASK_SIZE);
- DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
-
- /* datapage offsets for use by vdso */
- DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
- DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
- DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
- DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
- DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
- DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
- DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
- DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
- DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
- DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
- DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
- DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
- DEFINE(TSPEC32_TV_SEC, offsetof(struct timespec, tv_sec));
- DEFINE(TSPEC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
-
- /* timeval/timezone offsets for use by vdso */
- DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
- DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
-
- /* Other bits used by the vdso */
- DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
- DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
- DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
- DEFINE(CLOCK_REALTIME_RES, TICK_NSEC);
-
- return 0;
-}
diff --git a/arch/ppc/kernel/cpu_setup_power4.S b/arch/ppc/kernel/cpu_setup_power4.S
deleted file mode 100644
index 6a674e8..0000000
--- a/arch/ppc/kernel/cpu_setup_power4.S
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * This file contains low level CPU setup functions.
- * Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/ppc_asm.h>
-#include <asm/cputable.h>
-#include <asm/asm-offsets.h>
-#include <asm/cache.h>
-
-_GLOBAL(__970_cpu_preinit)
- /*
- * Deal only with PPC970 and PPC970FX.
- */
- mfspr r0,SPRN_PVR
- srwi r0,r0,16
- cmpwi cr0,r0,0x39
- cmpwi cr1,r0,0x3c
- cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
- bnelr
-
- /* Make sure HID4:rm_ci is off before MMU is turned off, that large
- * pages are enabled with HID4:61 and clear HID5:DCBZ_size and
- * HID5:DCBZ32_ill
- */
- li r0,0
- mfspr r11,SPRN_HID4
- rldimi r11,r0,40,23 /* clear bit 23 (rm_ci) */
- rldimi r11,r0,2,61 /* clear bit 61 (lg_pg_en) */
- sync
- mtspr SPRN_HID4,r11
- isync
- sync
- mfspr r11,SPRN_HID5
- rldimi r11,r0,6,56 /* clear bits 56 & 57 (DCBZ*) */
- sync
- mtspr SPRN_HID5,r11
- isync
- sync
-
- /* Setup some basic HID1 features */
- mfspr r0,SPRN_HID1
- li r11,0x1200 /* enable i-fetch cacheability */
- sldi r11,r11,44 /* and prefetch */
- or r0,r0,r11
- mtspr SPRN_HID1,r0
- mtspr SPRN_HID1,r0
- isync
-
- /* Clear HIOR */
- li r0,0
- sync
- mtspr SPRN_HIOR,0 /* Clear interrupt prefix */
- isync
- blr
-
-_GLOBAL(__setup_cpu_ppc970)
- mfspr r0,SPRN_HID0
- li r11,5 /* clear DOZE and SLEEP */
- rldimi r0,r11,52,8 /* set NAP and DPM */
- mtspr SPRN_HID0,r0
- mfspr r0,SPRN_HID0
- mfspr r0,SPRN_HID0
- mfspr r0,SPRN_HID0
- mfspr r0,SPRN_HID0
- mfspr r0,SPRN_HID0
- mfspr r0,SPRN_HID0
- sync
- isync
- blr
-
-/* Definitions for the table use to save CPU states */
-#define CS_HID0 0
-#define CS_HID1 8
-#define CS_HID4 16
-#define CS_HID5 24
-#define CS_SIZE 32
-
- .data
- .balign L1_CACHE_BYTES
-cpu_state_storage:
- .space CS_SIZE
- .balign L1_CACHE_BYTES,0
- .text
-
-/* Called in normal context to backup CPU 0 state. This
- * does not include cache settings. This function is also
- * called for machine sleep. This does not include the MMU
- * setup, BATs, etc... but rather the "special" registers
- * like HID0, HID1, HID4, etc...
- */
-_GLOBAL(__save_cpu_setup)
- /* Some CR fields are volatile, we back it up all */
- mfcr r7
-
- /* Get storage ptr */
- lis r5,cpu_state_storage@h
- ori r5,r5,cpu_state_storage@l
-
- /* We only deal with 970 for now */
- mfspr r0,SPRN_PVR
- srwi r0,r0,16
- cmpwi cr0,r0,0x39
- cmpwi cr1,r0,0x3c
- cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
- bne 1f
-
- /* Save HID0,1,4 and 5 */
- mfspr r3,SPRN_HID0
- std r3,CS_HID0(r5)
- mfspr r3,SPRN_HID1
- std r3,CS_HID1(r5)
- mfspr r3,SPRN_HID4
- std r3,CS_HID4(r5)
- mfspr r3,SPRN_HID5
- std r3,CS_HID5(r5)
-
-1:
- mtcr r7
- blr
-
-/* Called with no MMU context (typically MSR:IR/DR off) to
- * restore CPU state as backed up by the previous
- * function. This does not include cache setting
- */
-_GLOBAL(__restore_cpu_setup)
- /* Some CR fields are volatile, we back it up all */
- mfcr r7
-
- /* Get storage ptr */
- lis r5,(cpu_state_storage-KERNELBASE)@h
- ori r5,r5,cpu_state_storage@l
-
- /* We only deal with 970 for now */
- mfspr r0,SPRN_PVR
- srwi r0,r0,16
- cmpwi cr0,r0,0x39
- cmpwi cr1,r0,0x3c
- cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
- bne 1f
-
- /* Clear interrupt prefix */
- li r0,0
- sync
- mtspr SPRN_HIOR,0
- isync
-
- /* Restore HID0 */
- ld r3,CS_HID0(r5)
- sync
- isync
- mtspr SPRN_HID0,r3
- mfspr r3,SPRN_HID0
- mfspr r3,SPRN_HID0
- mfspr r3,SPRN_HID0
- mfspr r3,SPRN_HID0
- mfspr r3,SPRN_HID0
- mfspr r3,SPRN_HID0
- sync
- isync
-
- /* Restore HID1 */
- ld r3,CS_HID1(r5)
- sync
- isync
- mtspr SPRN_HID1,r3
- mtspr SPRN_HID1,r3
- sync
- isync
-
- /* Restore HID4 */
- ld r3,CS_HID4(r5)
- sync
- isync
- mtspr SPRN_HID4,r3
- sync
- isync
-
- /* Restore HID5 */
- ld r3,CS_HID5(r5)
- sync
- isync
- mtspr SPRN_HID5,r3
- sync
- isync
-1:
- mtcr r7
- blr
-
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
deleted file mode 100644
index 5f3a5d0..0000000
--- a/arch/ppc/kernel/entry.S
+++ /dev/null
@@ -1,960 +0,0 @@
-/*
- * PowerPC version
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- * Rewritten by Cort Dougan (cort@fsmlabs.com) for PReP
- * Copyright (C) 1996 Cort Dougan <cort@fsmlabs.com>
- * Adapted for Power Macintosh by Paul Mackerras.
- * Low-level exception handlers and MMU support
- * rewritten by Paul Mackerras.
- * Copyright (C) 1996 Paul Mackerras.
- * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
- *
- * This file contains the system call entry code, context switch
- * code, and exception/interrupt return code for PowerPC.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/errno.h>
-#include <linux/sys.h>
-#include <linux/threads.h>
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/cputable.h>
-#include <asm/thread_info.h>
-#include <asm/ppc_asm.h>
-#include <asm/asm-offsets.h>
-#include <asm/unistd.h>
-
-#undef SHOW_SYSCALLS
-#undef SHOW_SYSCALLS_TASK
-
-/*
- * MSR_KERNEL is > 0x10000 on 4xx/Book-E since it include MSR_CE.
- */
-#if MSR_KERNEL >= 0x10000
-#define LOAD_MSR_KERNEL(r, x) lis r,(x)@h; ori r,r,(x)@l
-#else
-#define LOAD_MSR_KERNEL(r, x) li r,(x)
-#endif
-
-#ifdef CONFIG_BOOKE
-#include "head_booke.h"
-#define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level) \
- mtspr exc_level##_SPRG,r8; \
- BOOKE_LOAD_EXC_LEVEL_STACK(exc_level); \
- lwz r0,GPR10-INT_FRAME_SIZE(r8); \
- stw r0,GPR10(r11); \
- lwz r0,GPR11-INT_FRAME_SIZE(r8); \
- stw r0,GPR11(r11); \
- mfspr r8,exc_level##_SPRG
-
- .globl mcheck_transfer_to_handler
-mcheck_transfer_to_handler:
- TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK)
- b transfer_to_handler_full
-
- .globl debug_transfer_to_handler
-debug_transfer_to_handler:
- TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG)
- b transfer_to_handler_full
-
- .globl crit_transfer_to_handler
-crit_transfer_to_handler:
- TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT)
- /* fall through */
-#endif
-
-#ifdef CONFIG_40x
- .globl crit_transfer_to_handler
-crit_transfer_to_handler:
- lwz r0,crit_r10@l(0)
- stw r0,GPR10(r11)
- lwz r0,crit_r11@l(0)
- stw r0,GPR11(r11)
- /* fall through */
-#endif
-
-/*
- * This code finishes saving the registers to the exception frame
- * and jumps to the appropriate handler for the exception, turning
- * on address translation.
- * Note that we rely on the caller having set cr0.eq iff the exception
- * occurred in kernel mode (i.e. MSR:PR = 0).
- */
- .globl transfer_to_handler_full
-transfer_to_handler_full:
- SAVE_NVGPRS(r11)
- /* fall through */
-
- .globl transfer_to_handler
-transfer_to_handler:
- stw r2,GPR2(r11)
- stw r12,_NIP(r11)
- stw r9,_MSR(r11)
- andi. r2,r9,MSR_PR
- mfctr r12
- mfspr r2,SPRN_XER
- stw r12,_CTR(r11)
- stw r2,_XER(r11)
- mfspr r12,SPRN_SPRG3
- addi r2,r12,-THREAD
- tovirt(r2,r2) /* set r2 to current */
- beq 2f /* if from user, fix up THREAD.regs */
- addi r11,r1,STACK_FRAME_OVERHEAD
- stw r11,PT_REGS(r12)
-#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
- /* Check to see if the dbcr0 register is set up to debug. Use the
- single-step bit to do this. */
- lwz r12,THREAD_DBCR0(r12)
- andis. r12,r12,DBCR0_IC@h
- beq+ 3f
- /* From user and task is ptraced - load up global dbcr0 */
- li r12,-1 /* clear all pending debug events */
- mtspr SPRN_DBSR,r12
- lis r11,global_dbcr0@ha
- tophys(r11,r11)
- addi r11,r11,global_dbcr0@l
- lwz r12,0(r11)
- mtspr SPRN_DBCR0,r12
- lwz r12,4(r11)
- addi r12,r12,-1
- stw r12,4(r11)
-#endif
- b 3f
-
-2: /* if from kernel, check interrupted DOZE/NAP mode and
- * check for stack overflow
- */
- lwz r9,THREAD_INFO-THREAD(r12)
- cmplw r1,r9 /* if r1 <= current->thread_info */
- ble- stack_ovf /* then the kernel stack overflowed */
-5:
-#ifdef CONFIG_6xx
- tophys(r9,r9) /* check local flags */
- lwz r12,TI_LOCAL_FLAGS(r9)
- mtcrf 0x01,r12
- bt- 31-TLF_NAPPING,4f
-#endif /* CONFIG_6xx */
- .globl transfer_to_handler_cont
-transfer_to_handler_cont:
-3:
- mflr r9
- lwz r11,0(r9) /* virtual address of handler */
- lwz r9,4(r9) /* where to go when done */
- mtspr SPRN_SRR0,r11
- mtspr SPRN_SRR1,r10
- mtlr r9
- SYNC
- RFI /* jump to handler, enable MMU */
-
-#ifdef CONFIG_6xx
-4: rlwinm r12,r12,0,~_TLF_NAPPING
- stw r12,TI_LOCAL_FLAGS(r9)
- b power_save_6xx_restore
-#endif
-
-/*
- * On kernel stack overflow, load up an initial stack pointer
- * and call StackOverflow(regs), which should not return.
- */
-stack_ovf:
- /* sometimes we use a statically-allocated stack, which is OK. */
- lis r12,_end@h
- ori r12,r12,_end@l
- cmplw r1,r12
- ble 5b /* r1 <= &_end is OK */
- SAVE_NVGPRS(r11)
- addi r3,r1,STACK_FRAME_OVERHEAD
- lis r1,init_thread_union@ha
- addi r1,r1,init_thread_union@l
- addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
- lis r9,StackOverflow@ha
- addi r9,r9,StackOverflow@l
- LOAD_MSR_KERNEL(r10,MSR_KERNEL)
- FIX_SRR1(r10,r12)
- mtspr SPRN_SRR0,r9
- mtspr SPRN_SRR1,r10
- SYNC
- RFI
-
-/*
- * Handle a system call.
- */
- .stabs "arch/ppc/kernel/",N_SO,0,0,0f
- .stabs "entry.S",N_SO,0,0,0f
-0:
-
-_GLOBAL(DoSyscall)
- stw r3,ORIG_GPR3(r1)
- li r12,0
- stw r12,RESULT(r1)
- lwz r11,_CCR(r1) /* Clear SO bit in CR */
- rlwinm r11,r11,0,4,2
- stw r11,_CCR(r1)
-#ifdef SHOW_SYSCALLS
- bl do_show_syscall
-#endif /* SHOW_SYSCALLS */
- rlwinm r10,r1,0,0,18 /* current_thread_info() */
- lwz r11,TI_FLAGS(r10)
- andi. r11,r11,_TIF_SYSCALL_T_OR_A
- bne- syscall_dotrace
-syscall_dotrace_cont:
- cmplwi 0,r0,NR_syscalls
- lis r10,sys_call_table@h
- ori r10,r10,sys_call_table@l
- slwi r0,r0,2
- bge- 66f
- lwzx r10,r10,r0 /* Fetch system call handler [ptr] */
- mtlr r10
- addi r9,r1,STACK_FRAME_OVERHEAD
- PPC440EP_ERR42
- blrl /* Call handler */
- .globl ret_from_syscall
-ret_from_syscall:
-#ifdef SHOW_SYSCALLS
- bl do_show_syscall_exit
-#endif
- mr r6,r3
- rlwinm r12,r1,0,0,18 /* current_thread_info() */
- /* disable interrupts so current_thread_info()->flags can't change */
- LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */
- SYNC
- MTMSRD(r10)
- lwz r9,TI_FLAGS(r12)
- li r8,-_LAST_ERRNO
- andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP|_TIF_USER_WORK_MASK|_TIF_PERSYSCALL_MASK)
- bne- syscall_exit_work
- cmplw 0,r3,r8
- blt+ syscall_exit_cont
- lwz r11,_CCR(r1) /* Load CR */
- neg r3,r3
- oris r11,r11,0x1000 /* Set SO bit in CR */
- stw r11,_CCR(r1)
-syscall_exit_cont:
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
- /* If the process has its own DBCR0 value, load it up. The single
- step bit tells us that dbcr0 should be loaded. */
- lwz r0,THREAD+THREAD_DBCR0(r2)
- andis. r10,r0,DBCR0_IC@h
- bnel- load_dbcr0
-#endif
-#ifdef CONFIG_44x
- lis r4,icache_44x_need_flush@ha
- lwz r5,icache_44x_need_flush@l(r4)
- cmplwi cr0,r5,0
- bne- 2f
-1:
-#endif /* CONFIG_44x */
-BEGIN_FTR_SECTION
- lwarx r7,0,r1
-END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
- stwcx. r0,0,r1 /* to clear the reservation */
- lwz r4,_LINK(r1)
- lwz r5,_CCR(r1)
- mtlr r4
- mtcr r5
- lwz r7,_NIP(r1)
- lwz r8,_MSR(r1)
- FIX_SRR1(r8, r0)
- lwz r2,GPR2(r1)
- lwz r1,GPR1(r1)
- mtspr SPRN_SRR0,r7
- mtspr SPRN_SRR1,r8
- SYNC
- RFI
-#ifdef CONFIG_44x
-2: li r7,0
- iccci r0,r0
- stw r7,icache_44x_need_flush@l(r4)
- b 1b
-#endif /* CONFIG_44x */
-
-66: li r3,-ENOSYS
- b ret_from_syscall
-
- .globl ret_from_fork
-ret_from_fork:
- REST_NVGPRS(r1)
- bl schedule_tail
- li r3,0
- b ret_from_syscall
-
-/* Traced system call support */
-syscall_dotrace:
- SAVE_NVGPRS(r1)
- li r0,0xc00
- stw r0,TRAP(r1)
- addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_syscall_trace_enter
- lwz r0,GPR0(r1) /* Restore original registers */
- lwz r3,GPR3(r1)
- lwz r4,GPR4(r1)
- lwz r5,GPR5(r1)
- lwz r6,GPR6(r1)
- lwz r7,GPR7(r1)
- lwz r8,GPR8(r1)
- REST_NVGPRS(r1)
- b syscall_dotrace_cont
-
-syscall_exit_work:
- andi. r0,r9,_TIF_RESTOREALL
- beq+ 0f
- REST_NVGPRS(r1)
- b 2f
-0: cmplw 0,r3,r8
- blt+ 1f
- andi. r0,r9,_TIF_NOERROR
- bne- 1f
- lwz r11,_CCR(r1) /* Load CR */
- neg r3,r3
- oris r11,r11,0x1000 /* Set SO bit in CR */
- stw r11,_CCR(r1)
-
-1: stw r6,RESULT(r1) /* Save result */
- stw r3,GPR3(r1) /* Update return value */
-2: andi. r0,r9,(_TIF_PERSYSCALL_MASK)
- beq 4f
-
- /* Clear per-syscall TIF flags if any are set. */
-
- li r11,_TIF_PERSYSCALL_MASK
- addi r12,r12,TI_FLAGS
-3: lwarx r8,0,r12
- andc r8,r8,r11
-#ifdef CONFIG_IBM405_ERR77
- dcbt 0,r12
-#endif
- stwcx. r8,0,r12
- bne- 3b
- subi r12,r12,TI_FLAGS
-
-4: /* Anything which requires enabling interrupts? */
- andi. r0,r9,(_TIF_SYSCALL_T_OR_A|_TIF_SINGLESTEP)
- beq ret_from_except
-
- /* Re-enable interrupts */
- ori r10,r10,MSR_EE
- SYNC
- MTMSRD(r10)
-
- /* Save NVGPRS if they're not saved already */
- lwz r4,TRAP(r1)
- andi. r4,r4,1
- beq 5f
- SAVE_NVGPRS(r1)
- li r4,0xc00
- stw r4,TRAP(r1)
-5:
- addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_syscall_trace_leave
- b ret_from_except_full
-
-#ifdef SHOW_SYSCALLS
-do_show_syscall:
-#ifdef SHOW_SYSCALLS_TASK
- lis r11,show_syscalls_task@ha
- lwz r11,show_syscalls_task@l(r11)
- cmp 0,r2,r11
- bnelr
-#endif
- stw r31,GPR31(r1)
- mflr r31
- lis r3,7f@ha
- addi r3,r3,7f@l
- lwz r4,GPR0(r1)
- lwz r5,GPR3(r1)
- lwz r6,GPR4(r1)
- lwz r7,GPR5(r1)
- lwz r8,GPR6(r1)
- lwz r9,GPR7(r1)
- bl printk
- lis r3,77f@ha
- addi r3,r3,77f@l
- lwz r4,GPR8(r1)
- mr r5,r2
- bl printk
- lwz r0,GPR0(r1)
- lwz r3,GPR3(r1)
- lwz r4,GPR4(r1)
- lwz r5,GPR5(r1)
- lwz r6,GPR6(r1)
- lwz r7,GPR7(r1)
- lwz r8,GPR8(r1)
- mtlr r31
- lwz r31,GPR31(r1)
- blr
-
-do_show_syscall_exit:
-#ifdef SHOW_SYSCALLS_TASK
- lis r11,show_syscalls_task@ha
- lwz r11,show_syscalls_task@l(r11)
- cmp 0,r2,r11
- bnelr
-#endif
- stw r31,GPR31(r1)
- mflr r31
- stw r3,RESULT(r1) /* Save result */
- mr r4,r3
- lis r3,79f@ha
- addi r3,r3,79f@l
- bl printk
- lwz r3,RESULT(r1)
- mtlr r31
- lwz r31,GPR31(r1)
- blr
-
-7: .string "syscall %d(%x, %x, %x, %x, %x, "
-77: .string "%x), current=%p\n"
-79: .string " -> %x\n"
- .align 2,0
-
-#ifdef SHOW_SYSCALLS_TASK
- .data
- .globl show_syscalls_task
-show_syscalls_task:
- .long -1
- .text
-#endif
-#endif /* SHOW_SYSCALLS */
-
-/*
- * The fork/clone functions need to copy the full register set into
- * the child process. Therefore we need to save all the nonvolatile
- * registers (r13 - r31) before calling the C code.
- */
- .globl ppc_fork
-ppc_fork:
- SAVE_NVGPRS(r1)
- lwz r0,TRAP(r1)
- rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */
- stw r0,TRAP(r1) /* register set saved */
- b sys_fork
-
- .globl ppc_vfork
-ppc_vfork:
- SAVE_NVGPRS(r1)
- lwz r0,TRAP(r1)
- rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */
- stw r0,TRAP(r1) /* register set saved */
- b sys_vfork
-
- .globl ppc_clone
-ppc_clone:
- SAVE_NVGPRS(r1)
- lwz r0,TRAP(r1)
- rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */
- stw r0,TRAP(r1) /* register set saved */
- b sys_clone
-
- .globl ppc_swapcontext
-ppc_swapcontext:
- SAVE_NVGPRS(r1)
- lwz r0,TRAP(r1)
- rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */
- stw r0,TRAP(r1) /* register set saved */
- b sys_swapcontext
-
-/*
- * Top-level page fault handling.
- * This is in assembler because if do_page_fault tells us that
- * it is a bad kernel page fault, we want to save the non-volatile
- * registers before calling bad_page_fault.
- */
- .globl handle_page_fault
-handle_page_fault:
- stw r4,_DAR(r1)
- addi r3,r1,STACK_FRAME_OVERHEAD
- bl do_page_fault
- cmpwi r3,0
- beq+ ret_from_except
- SAVE_NVGPRS(r1)
- lwz r0,TRAP(r1)
- clrrwi r0,r0,1
- stw r0,TRAP(r1)
- mr r5,r3
- addi r3,r1,STACK_FRAME_OVERHEAD
- lwz r4,_DAR(r1)
- bl bad_page_fault
- b ret_from_except_full
-
-/*
- * This routine switches between two different tasks. The process
- * state of one is saved on its kernel stack. Then the state
- * of the other is restored from its kernel stack. The memory
- * management hardware is updated to the second process's state.
- * Finally, we can return to the second process.
- * On entry, r3 points to the THREAD for the current task, r4
- * points to the THREAD for the new task.
- *
- * This routine is always called with interrupts disabled.
- *
- * Note: there are two ways to get to the "going out" portion
- * of this code; either by coming in via the entry (_switch)
- * or via "fork" which must set up an environment equivalent
- * to the "_switch" path. If you change this , you'll have to
- * change the fork code also.
- *
- * The code which creates the new task context is in 'copy_thread'
- * in arch/ppc/kernel/process.c
- */
-_GLOBAL(_switch)
- stwu r1,-INT_FRAME_SIZE(r1)
- mflr r0
- stw r0,INT_FRAME_SIZE+4(r1)
- /* r3-r12 are caller saved -- Cort */
- SAVE_NVGPRS(r1)
- stw r0,_NIP(r1) /* Return to switch caller */
- mfmsr r11
- li r0,MSR_FP /* Disable floating-point */
-#ifdef CONFIG_ALTIVEC
-BEGIN_FTR_SECTION
- oris r0,r0,MSR_VEC@h /* Disable altivec */
- mfspr r12,SPRN_VRSAVE /* save vrsave register value */
- stw r12,THREAD+THREAD_VRSAVE(r2)
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-#endif /* CONFIG_ALTIVEC */
- and. r0,r0,r11 /* FP or altivec enabled? */
- beq+ 1f
- andc r11,r11,r0
- MTMSRD(r11)
- isync
-1: stw r11,_MSR(r1)
- mfcr r10
- stw r10,_CCR(r1)
- stw r1,KSP(r3) /* Set old stack pointer */
-
-#ifdef CONFIG_SMP
- /* We need a sync somewhere here to make sure that if the
- * previous task gets rescheduled on another CPU, it sees all
- * stores it has performed on this one.
- */
- sync
-#endif /* CONFIG_SMP */
-
- tophys(r0,r4)
- CLR_TOP32(r0)
- mtspr SPRN_SPRG3,r0 /* Update current THREAD phys addr */
- lwz r1,KSP(r4) /* Load new stack pointer */
-
- /* save the old current 'last' for return value */
- mr r3,r2
- addi r2,r4,-THREAD /* Update current */
-
-#ifdef CONFIG_ALTIVEC
-BEGIN_FTR_SECTION
- lwz r0,THREAD+THREAD_VRSAVE(r2)
- mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-#endif /* CONFIG_ALTIVEC */
- lwz r0,_CCR(r1)
- mtcrf 0xFF,r0
- /* r3-r12 are destroyed -- Cort */
- REST_NVGPRS(r1)
-
- lwz r4,_NIP(r1) /* Return to _switch caller in new task */
- mtlr r4
- addi r1,r1,INT_FRAME_SIZE
- blr
-
- .globl fast_exception_return
-fast_exception_return:
-#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
- andi. r10,r9,MSR_RI /* check for recoverable interrupt */
- beq 1f /* if not, we've got problems */
-#endif
-
-2: REST_4GPRS(3, r11)
- lwz r10,_CCR(r11)
- REST_GPR(1, r11)
- mtcr r10
- lwz r10,_LINK(r11)
- mtlr r10
- REST_GPR(10, r11)
- mtspr SPRN_SRR1,r9
- mtspr SPRN_SRR0,r12
- REST_GPR(9, r11)
- REST_GPR(12, r11)
- lwz r11,GPR11(r11)
- SYNC
- RFI
-
-#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
-/* check if the exception happened in a restartable section */
-1: lis r3,exc_exit_restart_end@ha
- addi r3,r3,exc_exit_restart_end@l
- cmplw r12,r3
- bge 3f
- lis r4,exc_exit_restart@ha
- addi r4,r4,exc_exit_restart@l
- cmplw r12,r4
- blt 3f
- lis r3,fee_restarts@ha
- tophys(r3,r3)
- lwz r5,fee_restarts@l(r3)
- addi r5,r5,1
- stw r5,fee_restarts@l(r3)
- mr r12,r4 /* restart at exc_exit_restart */
- b 2b
-
- .section .bss
- .align 2
-fee_restarts:
- .space 4
- .previous
-
-/* aargh, a nonrecoverable interrupt, panic */
-/* aargh, we don't know which trap this is */
-/* but the 601 doesn't implement the RI bit, so assume it's OK */
-3:
-BEGIN_FTR_SECTION
- b 2b
-END_FTR_SECTION_IFSET(CPU_FTR_601)
- li r10,-1
- stw r10,TRAP(r11)
- addi r3,r1,STACK_FRAME_OVERHEAD
- lis r10,MSR_KERNEL@h
- ori r10,r10,MSR_KERNEL@l
- bl transfer_to_handler_full
- .long nonrecoverable_exception
- .long ret_from_except
-#endif
-
- .globl ret_from_except_full
-ret_from_except_full:
- REST_NVGPRS(r1)
- /* fall through */
-
- .globl ret_from_except
-ret_from_except:
- /* Hard-disable interrupts so that current_thread_info()->flags
- * can't change between when we test it and when we return
- * from the interrupt. */
- LOAD_MSR_KERNEL(r10,MSR_KERNEL)
- SYNC /* Some chip revs have problems here... */
- MTMSRD(r10) /* disable interrupts */
-
- lwz r3,_MSR(r1) /* Returning to user mode? */
- andi. r0,r3,MSR_PR
- beq resume_kernel
-
-user_exc_return: /* r10 contains MSR_KERNEL here */
- /* Check current_thread_info()->flags */
- rlwinm r9,r1,0,0,18
- lwz r9,TI_FLAGS(r9)
- andi. r0,r9,(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NEED_RESCHED)
- bne do_work
-
-restore_user:
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
- /* Check whether this process has its own DBCR0 value. The single
- step bit tells us that dbcr0 should be loaded. */
- lwz r0,THREAD+THREAD_DBCR0(r2)
- andis. r10,r0,DBCR0_IC@h
- bnel- load_dbcr0
-#endif
-
-#ifdef CONFIG_PREEMPT
- b restore
-
-/* N.B. the only way to get here is from the beq following ret_from_except. */
-resume_kernel:
- /* check current_thread_info->preempt_count */
- rlwinm r9,r1,0,0,18
- lwz r0,TI_PREEMPT(r9)
- cmpwi 0,r0,0 /* if non-zero, just restore regs and return */
- bne restore
- lwz r0,TI_FLAGS(r9)
- andi. r0,r0,_TIF_NEED_RESCHED
- beq+ restore
- andi. r0,r3,MSR_EE /* interrupts off? */
- beq restore /* don't schedule if so */
-1: bl preempt_schedule_irq
- rlwinm r9,r1,0,0,18
- lwz r3,TI_FLAGS(r9)
- andi. r0,r3,_TIF_NEED_RESCHED
- bne- 1b
-#else
-resume_kernel:
-#endif /* CONFIG_PREEMPT */
-
- /* interrupts are hard-disabled at this point */
-restore:
-#ifdef CONFIG_44x
- lis r4,icache_44x_need_flush@ha
- lwz r5,icache_44x_need_flush@l(r4)
- cmplwi cr0,r5,0
- beq+ 1f
- li r6,0
- iccci r0,r0
- stw r6,icache_44x_need_flush@l(r4)
-1:
-#endif /* CONFIG_44x */
- lwz r0,GPR0(r1)
- lwz r2,GPR2(r1)
- REST_4GPRS(3, r1)
- REST_2GPRS(7, r1)
-
- lwz r10,_XER(r1)
- lwz r11,_CTR(r1)
- mtspr SPRN_XER,r10
- mtctr r11
-
- PPC405_ERR77(0,r1)
-BEGIN_FTR_SECTION
- lwarx r11,0,r1
-END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)
- stwcx. r0,0,r1 /* to clear the reservation */
-
-#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
- lwz r9,_MSR(r1)
- andi. r10,r9,MSR_RI /* check if this exception occurred */
- beql nonrecoverable /* at a bad place (MSR:RI = 0) */
-
- lwz r10,_CCR(r1)
- lwz r11,_LINK(r1)
- mtcrf 0xFF,r10
- mtlr r11
-
- /*
- * Once we put values in SRR0 and SRR1, we are in a state
- * where exceptions are not recoverable, since taking an
- * exception will trash SRR0 and SRR1. Therefore we clear the
- * MSR:RI bit to indicate this. If we do take an exception,
- * we can't return to the point of the exception but we
- * can restart the exception exit path at the label
- * exc_exit_restart below. -- paulus
- */
- LOAD_MSR_KERNEL(r10,MSR_KERNEL & ~MSR_RI)
- SYNC
- MTMSRD(r10) /* clear the RI bit */
- .globl exc_exit_restart
-exc_exit_restart:
- lwz r9,_MSR(r1)
- lwz r12,_NIP(r1)
- FIX_SRR1(r9,r10)
- mtspr SPRN_SRR0,r12
- mtspr SPRN_SRR1,r9
- REST_4GPRS(9, r1)
- lwz r1,GPR1(r1)
- .globl exc_exit_restart_end
-exc_exit_restart_end:
- SYNC
- RFI
-
-#else /* !(CONFIG_4xx || CONFIG_BOOKE) */
- /*
- * This is a bit different on 4xx/Book-E because it doesn't have
- * the RI bit in the MSR.
- * The TLB miss handler checks if we have interrupted
- * the exception exit path and restarts it if so
- * (well maybe one day it will... :).
- */
- lwz r11,_LINK(r1)
- mtlr r11
- lwz r10,_CCR(r1)
- mtcrf 0xff,r10
- REST_2GPRS(9, r1)
- .globl exc_exit_restart
-exc_exit_restart:
- lwz r11,_NIP(r1)
- lwz r12,_MSR(r1)
-exc_exit_start:
- mtspr SPRN_SRR0,r11
- mtspr SPRN_SRR1,r12
- REST_2GPRS(11, r1)
- lwz r1,GPR1(r1)
- .globl exc_exit_restart_end
-exc_exit_restart_end:
- PPC405_ERR77_SYNC
- rfi
- b . /* prevent prefetch past rfi */
-
-/*
- * Returning from a critical interrupt in user mode doesn't need
- * to be any different from a normal exception. For a critical
- * interrupt in the kernel, we just return (without checking for
- * preemption) since the interrupt may have happened at some crucial
- * place (e.g. inside the TLB miss handler), and because we will be
- * running with r1 pointing into critical_stack, not the current
- * process's kernel stack (and therefore current_thread_info() will
- * give the wrong answer).
- * We have to restore various SPRs that may have been in use at the
- * time of the critical interrupt.
- *
- */
-#ifdef CONFIG_40x
-#define PPC_40x_TURN_OFF_MSR_DR \
- /* avoid any possible TLB misses here by turning off MSR.DR, we \
- * assume the instructions here are mapped by a pinned TLB entry */ \
- li r10,MSR_IR; \
- mtmsr r10; \
- isync; \
- tophys(r1, r1);
-#else
-#define PPC_40x_TURN_OFF_MSR_DR
-#endif
-
-#define RET_FROM_EXC_LEVEL(exc_lvl_srr0, exc_lvl_srr1, exc_lvl_rfi) \
- REST_NVGPRS(r1); \
- lwz r3,_MSR(r1); \
- andi. r3,r3,MSR_PR; \
- LOAD_MSR_KERNEL(r10,MSR_KERNEL); \
- bne user_exc_return; \
- lwz r0,GPR0(r1); \
- lwz r2,GPR2(r1); \
- REST_4GPRS(3, r1); \
- REST_2GPRS(7, r1); \
- lwz r10,_XER(r1); \
- lwz r11,_CTR(r1); \
- mtspr SPRN_XER,r10; \
- mtctr r11; \
- PPC405_ERR77(0,r1); \
- stwcx. r0,0,r1; /* to clear the reservation */ \
- lwz r11,_LINK(r1); \
- mtlr r11; \
- lwz r10,_CCR(r1); \
- mtcrf 0xff,r10; \
- PPC_40x_TURN_OFF_MSR_DR; \
- lwz r9,_DEAR(r1); \
- lwz r10,_ESR(r1); \
- mtspr SPRN_DEAR,r9; \
- mtspr SPRN_ESR,r10; \
- lwz r11,_NIP(r1); \
- lwz r12,_MSR(r1); \
- mtspr exc_lvl_srr0,r11; \
- mtspr exc_lvl_srr1,r12; \
- lwz r9,GPR9(r1); \
- lwz r12,GPR12(r1); \
- lwz r10,GPR10(r1); \
- lwz r11,GPR11(r1); \
- lwz r1,GPR1(r1); \
- PPC405_ERR77_SYNC; \
- exc_lvl_rfi; \
- b .; /* prevent prefetch past exc_lvl_rfi */
-
- .globl ret_from_crit_exc
-ret_from_crit_exc:
- RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
-
-#ifdef CONFIG_BOOKE
- .globl ret_from_debug_exc
-ret_from_debug_exc:
- RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI)
-
- .globl ret_from_mcheck_exc
-ret_from_mcheck_exc:
- RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI)
-#endif /* CONFIG_BOOKE */
-
-/*
- * Load the DBCR0 value for a task that is being ptraced,
- * having first saved away the global DBCR0. Note that r0
- * has the dbcr0 value to set upon entry to this.
- */
-load_dbcr0:
- mfmsr r10 /* first disable debug exceptions */
- rlwinm r10,r10,0,~MSR_DE
- mtmsr r10
- isync
- mfspr r10,SPRN_DBCR0
- lis r11,global_dbcr0@ha
- addi r11,r11,global_dbcr0@l
- stw r10,0(r11)
- mtspr SPRN_DBCR0,r0
- lwz r10,4(r11)
- addi r10,r10,1
- stw r10,4(r11)
- li r11,-1
- mtspr SPRN_DBSR,r11 /* clear all pending debug events */
- blr
-
- .section .bss
- .align 4
-global_dbcr0:
- .space 8
- .previous
-#endif /* !(CONFIG_4xx || CONFIG_BOOKE) */
-
-do_work: /* r10 contains MSR_KERNEL here */
- andi. r0,r9,_TIF_NEED_RESCHED
- beq do_user_signal
-
-do_resched: /* r10 contains MSR_KERNEL here */
- ori r10,r10,MSR_EE
- SYNC
- MTMSRD(r10) /* hard-enable interrupts */
- bl schedule
-recheck:
- LOAD_MSR_KERNEL(r10,MSR_KERNEL)
- SYNC
- MTMSRD(r10) /* disable interrupts */
- rlwinm r9,r1,0,0,18
- lwz r9,TI_FLAGS(r9)
- andi. r0,r9,_TIF_NEED_RESCHED
- bne- do_resched
- andi. r0,r9,_TIF_SIGPENDING
- beq restore_user
-do_user_signal: /* r10 contains MSR_KERNEL here */
- ori r10,r10,MSR_EE
- SYNC
- MTMSRD(r10) /* hard-enable interrupts */
- /* save r13-r31 in the exception frame, if not already done */
- lwz r3,TRAP(r1)
- andi. r0,r3,1
- beq 2f
- SAVE_NVGPRS(r1)
- rlwinm r3,r3,0,0,30
- stw r3,TRAP(r1)
-2: li r3,0
- addi r4,r1,STACK_FRAME_OVERHEAD
- bl do_signal
- REST_NVGPRS(r1)
- b recheck
-
-/*
- * We come here when we are at the end of handling an exception
- * that occurred at a place where taking an exception will lose
- * state information, such as the contents of SRR0 and SRR1.
- */
-nonrecoverable:
- lis r10,exc_exit_restart_end@ha
- addi r10,r10,exc_exit_restart_end@l
- cmplw r12,r10
- bge 3f
- lis r11,exc_exit_restart@ha
- addi r11,r11,exc_exit_restart@l
- cmplw r12,r11
- blt 3f
- lis r10,ee_restarts@ha
- lwz r12,ee_restarts@l(r10)
- addi r12,r12,1
- stw r12,ee_restarts@l(r10)
- mr r12,r11 /* restart at exc_exit_restart */
- blr
-3: /* OK, we can't recover, kill this process */
- /* but the 601 doesn't implement the RI bit, so assume it's OK */
-BEGIN_FTR_SECTION
- blr
-END_FTR_SECTION_IFSET(CPU_FTR_601)
- lwz r3,TRAP(r1)
- andi. r0,r3,1
- beq 4f
- SAVE_NVGPRS(r1)
- rlwinm r3,r3,0,0,30
- stw r3,TRAP(r1)
-4: addi r3,r1,STACK_FRAME_OVERHEAD
- bl nonrecoverable_exception
- /* shouldn't return */
- b 4b
-
- .section .bss
- .align 2
-ee_restarts:
- .space 4
- .previous
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
deleted file mode 100644
index e7e642b..0000000
--- a/arch/ppc/kernel/head.S
+++ /dev/null
@@ -1,1220 +0,0 @@
-/*
- * PowerPC version
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
- * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
- * Adapted for Power Macintosh by Paul Mackerras.
- * Low-level exception handlers and MMU support
- * rewritten by Paul Mackerras.
- * Copyright (C) 1996 Paul Mackerras.
- * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * This file contains the low-level support and setup for the
- * PowerPC platform, including trap and interrupt dispatch.
- * (The PPC 8xx embedded CPUs use head_8xx.S instead.)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/pgtable.h>
-#include <asm/cputable.h>
-#include <asm/cache.h>
-#include <asm/thread_info.h>
-#include <asm/ppc_asm.h>
-#include <asm/asm-offsets.h>
-
-/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
-#define LOAD_BAT(n, reg, RA, RB) \
- /* see the comment for clear_bats() -- Cort */ \
- li RA,0; \
- mtspr SPRN_IBAT##n##U,RA; \
- mtspr SPRN_DBAT##n##U,RA; \
- lwz RA,(n*16)+0(reg); \
- lwz RB,(n*16)+4(reg); \
- mtspr SPRN_IBAT##n##U,RA; \
- mtspr SPRN_IBAT##n##L,RB; \
- beq 1f; \
- lwz RA,(n*16)+8(reg); \
- lwz RB,(n*16)+12(reg); \
- mtspr SPRN_DBAT##n##U,RA; \
- mtspr SPRN_DBAT##n##L,RB; \
-1:
-
- .text
- .stabs "arch/ppc/kernel/",N_SO,0,0,0f
- .stabs "head.S",N_SO,0,0,0f
-0:
- .globl _stext
-_stext:
-
-/*
- * _start is defined this way because the XCOFF loader in the OpenFirmware
- * on the powermac expects the entry point to be a procedure descriptor.
- */
- .text
- .globl _start
-_start:
- /*
- * These are here for legacy reasons, the kernel used to
- * need to look like a coff function entry for the pmac
- * but we're always started by some kind of bootloader now.
- * -- Cort
- */
- nop /* used by __secondary_hold on prep (mtx) and chrp smp */
- nop /* used by __secondary_hold on prep (mtx) and chrp smp */
- nop
-
-/* PMAC
- * Enter here with the kernel text, data and bss loaded starting at
- * 0, running with virtual == physical mapping.
- * r5 points to the prom entry point (the client interface handler
- * address). Address translation is turned on, with the prom
- * managing the hash table. Interrupts are disabled. The stack
- * pointer (r1) points to just below the end of the half-meg region
- * from 0x380000 - 0x400000, which is mapped in already.
- *
- * If we are booted from MacOS via BootX, we enter with the kernel
- * image loaded somewhere, and the following values in registers:
- * r3: 'BooX' (0x426f6f58)
- * r4: virtual address of boot_infos_t
- * r5: 0
- *
- * APUS
- * r3: 'APUS'
- * r4: physical address of memory base
- * Linux/m68k style BootInfo structure at &_end.
- *
- * PREP
- * This is jumped to on prep systems right after the kernel is relocated
- * to its proper place in memory by the boot loader. The expected layout
- * of the regs is:
- * r3: ptr to residual data
- * r4: initrd_start or if no initrd then 0
- * r5: initrd_end - unused if r4 is 0
- * r6: Start of command line string
- * r7: End of command line string
- *
- * This just gets a minimal mmu environment setup so we can call
- * start_here() to do the real work.
- * -- Cort
- */
-
- .globl __start
-__start:
- mr r31,r3 /* save parameters */
- mr r30,r4
- mr r29,r5
- mr r28,r6
- mr r27,r7
- li r24,0 /* cpu # */
-
-/*
- * early_init() does the early machine identification and does
- * the necessary low-level setup and clears the BSS
- * -- Cort <cort@fsmlabs.com>
- */
- bl early_init
-
-/* Switch MMU off, clear BATs and flush TLB. At this point, r3 contains
- * the physical address we are running at, returned by early_init()
- */
- bl mmu_off
-__after_mmu_off:
- bl clear_bats
- bl flush_tlbs
-
- bl initial_bats
-#ifdef CONFIG_BOOTX_TEXT
- bl setup_disp_bat
-#endif
-
-/*
- * Call setup_cpu for CPU 0 and initialize 6xx Idle
- */
- bl reloc_offset
- li r24,0 /* cpu# */
- bl call_setup_cpu /* Call setup_cpu for this CPU */
-#ifdef CONFIG_6xx
- bl reloc_offset
- bl init_idle_6xx
-#endif /* CONFIG_6xx */
-
-
-/*
- * We need to run with _start at physical address 0.
- * If the MMU is already turned on, we copy stuff to KERNELBASE,
- * otherwise we copy it to 0.
- */
- bl reloc_offset
- mr r26,r3
- addis r4,r3,KERNELBASE@h /* current address of _start */
- cmpwi 0,r4,0 /* are we already running at 0? */
- bne relocate_kernel
-
-/*
- * we now have the 1st 16M of ram mapped with the bats.
- * prep needs the mmu to be turned on here, but pmac already has it on.
- * this shouldn't bother the pmac since it just gets turned on again
- * as we jump to our code at KERNELBASE. -- Cort
- * Actually no, pmac doesn't have it on any more. BootX enters with MMU
- * off, and in other cases, we now turn it off before changing BATs above.
- */
-turn_on_mmu:
- mfmsr r0
- ori r0,r0,MSR_DR|MSR_IR
- mtspr SPRN_SRR1,r0
- lis r0,start_here@h
- ori r0,r0,start_here@l
- mtspr SPRN_SRR0,r0
- SYNC
- RFI /* enables MMU */
-
-/*
- * We need __secondary_hold as a place to hold the other cpus on
- * an SMP machine, even when we are running a UP kernel.
- */
- . = 0xc0 /* for prep bootloader */
- li r3,1 /* MTX only has 1 cpu */
- .globl __secondary_hold
-__secondary_hold:
- /* tell the master we're here */
- stw r3,4(0)
-#ifdef CONFIG_SMP
-100: lwz r4,0(0)
- /* wait until we're told to start */
- cmpw 0,r4,r3
- bne 100b
- /* our cpu # was at addr 0 - go */
- mr r24,r3 /* cpu # */
- b __secondary_start
-#else
- b .
-#endif /* CONFIG_SMP */
-
-/*
- * Exception entry code. This code runs with address translation
- * turned off, i.e. using physical addresses.
- * We assume sprg3 has the physical address of the current
- * task's thread_struct.
- */
-#define EXCEPTION_PROLOG \
- mtspr SPRN_SPRG0,r10; \
- mtspr SPRN_SPRG1,r11; \
- mfcr r10; \
- EXCEPTION_PROLOG_1; \
- EXCEPTION_PROLOG_2
-
-#define EXCEPTION_PROLOG_1 \
- mfspr r11,SPRN_SRR1; /* check whether user or kernel */ \
- andi. r11,r11,MSR_PR; \
- tophys(r11,r1); /* use tophys(r1) if kernel */ \
- beq 1f; \
- mfspr r11,SPRN_SPRG3; \
- lwz r11,THREAD_INFO-THREAD(r11); \
- addi r11,r11,THREAD_SIZE; \
- tophys(r11,r11); \
-1: subi r11,r11,INT_FRAME_SIZE /* alloc exc. frame */
-
-
-#define EXCEPTION_PROLOG_2 \
- CLR_TOP32(r11); \
- stw r10,_CCR(r11); /* save registers */ \
- stw r12,GPR12(r11); \
- stw r9,GPR9(r11); \
- mfspr r10,SPRN_SPRG0; \
- stw r10,GPR10(r11); \
- mfspr r12,SPRN_SPRG1; \
- stw r12,GPR11(r11); \
- mflr r10; \
- stw r10,_LINK(r11); \
- mfspr r12,SPRN_SRR0; \
- mfspr r9,SPRN_SRR1; \
- stw r1,GPR1(r11); \
- stw r1,0(r11); \
- tovirt(r1,r11); /* set new kernel sp */ \
- li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
- MTMSRD(r10); /* (except for mach check in rtas) */ \
- stw r0,GPR0(r11); \
- SAVE_4GPRS(3, r11); \
- SAVE_2GPRS(7, r11)
-
-/*
- * Note: code which follows this uses cr0.eq (set if from kernel),
- * r11, r12 (SRR0), and r9 (SRR1).
- *
- * Note2: once we have set r1 we are in a position to take exceptions
- * again, and we could thus set MSR:RI at that point.
- */
-
-/*
- * Exception vectors.
- */
-#define EXCEPTION(n, label, hdlr, xfer) \
- . = n; \
-label: \
- EXCEPTION_PROLOG; \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- xfer(n, hdlr)
-
-#define EXC_XFER_TEMPLATE(n, hdlr, trap, copyee, tfer, ret) \
- li r10,trap; \
- stw r10,TRAP(r11); \
- li r10,MSR_KERNEL; \
- copyee(r10, r9); \
- bl tfer; \
-i##n: \
- .long hdlr; \
- .long ret
-
-#define COPY_EE(d, s) rlwimi d,s,0,16,16
-#define NOCOPY(d, s)
-
-#define EXC_XFER_STD(n, hdlr) \
- EXC_XFER_TEMPLATE(n, hdlr, n, NOCOPY, transfer_to_handler_full, \
- ret_from_except_full)
-
-#define EXC_XFER_LITE(n, hdlr) \
- EXC_XFER_TEMPLATE(n, hdlr, n+1, NOCOPY, transfer_to_handler, \
- ret_from_except)
-
-#define EXC_XFER_EE(n, hdlr) \
- EXC_XFER_TEMPLATE(n, hdlr, n, COPY_EE, transfer_to_handler_full, \
- ret_from_except_full)
-
-#define EXC_XFER_EE_LITE(n, hdlr) \
- EXC_XFER_TEMPLATE(n, hdlr, n+1, COPY_EE, transfer_to_handler, \
- ret_from_except)
-
-/* System reset */
-/* core99 pmac starts the seconary here by changing the vector, and
- putting it back to what it was (unknown_exception) when done. */
- EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
-
-/* Machine check */
- . = 0x200
- mtspr SPRN_SPRG0,r10
- mtspr SPRN_SPRG1,r11
- mfcr r10
- EXCEPTION_PROLOG_1
-7: EXCEPTION_PROLOG_2
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_STD(0x200, machine_check_exception)
-
-/* Data access exception. */
- . = 0x300
-DataAccess:
- EXCEPTION_PROLOG
- mfspr r10,SPRN_DSISR
- andis. r0,r10,0xa470 /* weird error? */
- bne 1f /* if not, try to put a PTE */
- mfspr r4,SPRN_DAR /* into the hash table */
- rlwinm r3,r10,32-15,21,21 /* DSISR_STORE -> _PAGE_RW */
- bl hash_page
-1: stw r10,_DSISR(r11)
- mr r5,r10
- mfspr r4,SPRN_DAR
- EXC_XFER_EE_LITE(0x300, handle_page_fault)
-
-/* Instruction access exception. */
- . = 0x400
-InstructionAccess:
- EXCEPTION_PROLOG
- andis. r0,r9,0x4000 /* no pte found? */
- beq 1f /* if so, try to put a PTE */
- li r3,0 /* into the hash table */
- mr r4,r12 /* SRR0 is fault address */
- bl hash_page
-1: mr r4,r12
- mr r5,r9
- EXC_XFER_EE_LITE(0x400, handle_page_fault)
-
-/* External interrupt */
- EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
-
-/* Alignment exception */
- . = 0x600
-Alignment:
- EXCEPTION_PROLOG
- mfspr r4,SPRN_DAR
- stw r4,_DAR(r11)
- mfspr r5,SPRN_DSISR
- stw r5,_DSISR(r11)
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_EE(0x600, alignment_exception)
-
-/* Program check exception */
- EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
-
-/* Floating-point unavailable */
- . = 0x800
-FPUnavailable:
- EXCEPTION_PROLOG
- bne load_up_fpu /* if from user, just load it up */
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
-
-/* Decrementer */
- EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
-
- EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
-
-/* System call */
- . = 0xc00
-SystemCall:
- EXCEPTION_PROLOG
- EXC_XFER_EE_LITE(0xc00, DoSyscall)
-
-/* Single step - not used on 601 */
- EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
- EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
-
-/*
- * The Altivec unavailable trap is at 0x0f20. Foo.
- * We effectively remap it to 0x3000.
- * We include an altivec unavailable exception vector even if
- * not configured for Altivec, so that you can't panic a
- * non-altivec kernel running on a machine with altivec just
- * by executing an altivec instruction.
- */
- . = 0xf00
- b Trap_0f
-
- . = 0xf20
- b AltiVecUnavailable
-
-Trap_0f:
- EXCEPTION_PROLOG
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_EE(0xf00, unknown_exception)
-
-/*
- * Handle TLB miss for instruction on 603/603e.
- * Note: we get an alternate set of r0 - r3 to use automatically.
- */
- . = 0x1000
-InstructionTLBMiss:
-/*
- * r0: stored ctr
- * r1: linux style pte ( later becomes ppc hardware pte )
- * r2: ptr to linux-style pte
- * r3: scratch
- */
- mfctr r0
- /* Get PTE (linux-style) and check access */
- mfspr r3,SPRN_IMISS
- lis r1,KERNELBASE@h /* check if kernel address */
- cmplw 0,r3,r1
- mfspr r2,SPRN_SPRG3
- li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
- lwz r2,PGDIR(r2)
- blt+ 112f
- lis r2,swapper_pg_dir@ha /* if kernel address, use */
- addi r2,r2,swapper_pg_dir@l /* kernel page table */
- mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
- rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
-112: tophys(r2,r2)
- rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
- lwz r2,0(r2) /* get pmd entry */
- rlwinm. r2,r2,0,0,19 /* extract address of pte page */
- beq- InstructionAddressInvalid /* return if no mapping */
- rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
- lwz r3,0(r2) /* get linux-style pte */
- andc. r1,r1,r3 /* check access & ~permission */
- bne- InstructionAddressInvalid /* return if access not permitted */
- ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */
- /*
- * NOTE! We are assuming this is not an SMP system, otherwise
- * we would need to update the pte atomically with lwarx/stwcx.
- */
- stw r3,0(r2) /* update PTE (accessed bit) */
- /* Convert linux-style PTE to low word of PPC-style PTE */
- rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */
- rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */
- and r1,r1,r2 /* writable if _RW and _DIRTY */
- rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
- rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
- ori r1,r1,0xe14 /* clear out reserved bits and M */
- andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
- mtspr SPRN_RPA,r1
- mfspr r3,SPRN_IMISS
- tlbli r3
- mfspr r3,SPRN_SRR1 /* Need to restore CR0 */
- mtcrf 0x80,r3
- rfi
-InstructionAddressInvalid:
- mfspr r3,SPRN_SRR1
- rlwinm r1,r3,9,6,6 /* Get load/store bit */
-
- addis r1,r1,0x2000
- mtspr SPRN_DSISR,r1 /* (shouldn't be needed) */
- mtctr r0 /* Restore CTR */
- andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */
- or r2,r2,r1
- mtspr SPRN_SRR1,r2
- mfspr r1,SPRN_IMISS /* Get failing address */
- rlwinm. r2,r2,0,31,31 /* Check for little endian access */
- rlwimi r2,r2,1,30,30 /* change 1 -> 3 */
- xor r1,r1,r2
- mtspr SPRN_DAR,r1 /* Set fault address */
- mfmsr r0 /* Restore "normal" registers */
- xoris r0,r0,MSR_TGPR>>16
- mtcrf 0x80,r3 /* Restore CR0 */
- mtmsr r0
- b InstructionAccess
-
-/*
- * Handle TLB miss for DATA Load operation on 603/603e
- */
- . = 0x1100
-DataLoadTLBMiss:
-/*
- * r0: stored ctr
- * r1: linux style pte ( later becomes ppc hardware pte )
- * r2: ptr to linux-style pte
- * r3: scratch
- */
- mfctr r0
- /* Get PTE (linux-style) and check access */
- mfspr r3,SPRN_DMISS
- lis r1,KERNELBASE@h /* check if kernel address */
- cmplw 0,r3,r1
- mfspr r2,SPRN_SPRG3
- li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
- lwz r2,PGDIR(r2)
- blt+ 112f
- lis r2,swapper_pg_dir@ha /* if kernel address, use */
- addi r2,r2,swapper_pg_dir@l /* kernel page table */
- mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
- rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
-112: tophys(r2,r2)
- rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
- lwz r2,0(r2) /* get pmd entry */
- rlwinm. r2,r2,0,0,19 /* extract address of pte page */
- beq- DataAddressInvalid /* return if no mapping */
- rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
- lwz r3,0(r2) /* get linux-style pte */
- andc. r1,r1,r3 /* check access & ~permission */
- bne- DataAddressInvalid /* return if access not permitted */
- ori r3,r3,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */
- /*
- * NOTE! We are assuming this is not an SMP system, otherwise
- * we would need to update the pte atomically with lwarx/stwcx.
- */
- stw r3,0(r2) /* update PTE (accessed bit) */
- /* Convert linux-style PTE to low word of PPC-style PTE */
- rlwinm r1,r3,32-10,31,31 /* _PAGE_RW -> PP lsb */
- rlwinm r2,r3,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */
- and r1,r1,r2 /* writable if _RW and _DIRTY */
- rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
- rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
- ori r1,r1,0xe14 /* clear out reserved bits and M */
- andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
- mtspr SPRN_RPA,r1
- mfspr r3,SPRN_DMISS
- tlbld r3
- mfspr r3,SPRN_SRR1 /* Need to restore CR0 */
- mtcrf 0x80,r3
- rfi
-DataAddressInvalid:
- mfspr r3,SPRN_SRR1
- rlwinm r1,r3,9,6,6 /* Get load/store bit */
- addis r1,r1,0x2000
- mtspr SPRN_DSISR,r1
- mtctr r0 /* Restore CTR */
- andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */
- mtspr SPRN_SRR1,r2
- mfspr r1,SPRN_DMISS /* Get failing address */
- rlwinm. r2,r2,0,31,31 /* Check for little endian access */
- beq 20f /* Jump if big endian */
- xori r1,r1,3
-20: mtspr SPRN_DAR,r1 /* Set fault address */
- mfmsr r0 /* Restore "normal" registers */
- xoris r0,r0,MSR_TGPR>>16
- mtcrf 0x80,r3 /* Restore CR0 */
- mtmsr r0
- b DataAccess
-
-/*
- * Handle TLB miss for DATA Store on 603/603e
- */
- . = 0x1200
-DataStoreTLBMiss:
-/*
- * r0: stored ctr
- * r1: linux style pte ( later becomes ppc hardware pte )
- * r2: ptr to linux-style pte
- * r3: scratch
- */
- mfctr r0
- /* Get PTE (linux-style) and check access */
- mfspr r3,SPRN_DMISS
- lis r1,KERNELBASE@h /* check if kernel address */
- cmplw 0,r3,r1
- mfspr r2,SPRN_SPRG3
- li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
- lwz r2,PGDIR(r2)
- blt+ 112f
- lis r2,swapper_pg_dir@ha /* if kernel address, use */
- addi r2,r2,swapper_pg_dir@l /* kernel page table */
- mfspr r1,SPRN_SRR1 /* and MSR_PR bit from SRR1 */
- rlwinm r1,r1,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */
-112: tophys(r2,r2)
- rlwimi r2,r3,12,20,29 /* insert top 10 bits of address */
- lwz r2,0(r2) /* get pmd entry */
- rlwinm. r2,r2,0,0,19 /* extract address of pte page */
- beq- DataAddressInvalid /* return if no mapping */
- rlwimi r2,r3,22,20,29 /* insert next 10 bits of address */
- lwz r3,0(r2) /* get linux-style pte */
- andc. r1,r1,r3 /* check access & ~permission */
- bne- DataAddressInvalid /* return if access not permitted */
- ori r3,r3,_PAGE_ACCESSED|_PAGE_DIRTY
- /*
- * NOTE! We are assuming this is not an SMP system, otherwise
- * we would need to update the pte atomically with lwarx/stwcx.
- */
- stw r3,0(r2) /* update PTE (accessed/dirty bits) */
- /* Convert linux-style PTE to low word of PPC-style PTE */
- rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
- li r1,0xe15 /* clear out reserved bits and M */
- andc r1,r3,r1 /* PP = user? 2: 0 */
- mtspr SPRN_RPA,r1
- mfspr r3,SPRN_DMISS
- tlbld r3
- mfspr r3,SPRN_SRR1 /* Need to restore CR0 */
- mtcrf 0x80,r3
- rfi
-
-#ifndef CONFIG_ALTIVEC
-#define altivec_assist_exception unknown_exception
-#endif
-
- EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE)
- EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
- EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE)
- EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD)
- EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE)
- EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE)
-
- .globl mol_trampoline
- .set mol_trampoline, i0x2f00
-
- . = 0x3000
-
-AltiVecUnavailable:
- EXCEPTION_PROLOG
-#ifdef CONFIG_ALTIVEC
- bne load_up_altivec /* if from user, just load it up */
-#endif /* CONFIG_ALTIVEC */
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception)
-
-#ifdef CONFIG_ALTIVEC
-/* Note that the AltiVec support is closely modeled after the FP
- * support. Changes to one are likely to be applicable to the
- * other! */
-load_up_altivec:
-/*
- * Disable AltiVec for the task which had AltiVec previously,
- * and save its AltiVec registers in its thread_struct.
- * Enables AltiVec for use in the kernel on return.
- * On SMP we know the AltiVec units are free, since we give it up every
- * switch. -- Kumar
- */
- mfmsr r5
- oris r5,r5,MSR_VEC@h
- MTMSRD(r5) /* enable use of AltiVec now */
- isync
-/*
- * For SMP, we don't do lazy AltiVec switching because it just gets too
- * horrendously complex, especially when a task switches from one CPU
- * to another. Instead we call giveup_altivec in switch_to.
- */
-#ifndef CONFIG_SMP
- tophys(r6,0)
- addis r3,r6,last_task_used_altivec@ha
- lwz r4,last_task_used_altivec@l(r3)
- cmpwi 0,r4,0
- beq 1f
- add r4,r4,r6
- addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */
- SAVE_32VRS(0,r10,r4)
- mfvscr vr0
- li r10,THREAD_VSCR
- stvx vr0,r10,r4
- lwz r5,PT_REGS(r4)
- add r5,r5,r6
- lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
- lis r10,MSR_VEC@h
- andc r4,r4,r10 /* disable altivec for previous task */
- stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-1:
-#endif /* CONFIG_SMP */
- /* enable use of AltiVec after return */
- oris r9,r9,MSR_VEC@h
- mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
- li r4,1
- li r10,THREAD_VSCR
- stw r4,THREAD_USED_VR(r5)
- lvx vr0,r10,r5
- mtvscr vr0
- REST_32VRS(0,r10,r5)
-#ifndef CONFIG_SMP
- subi r4,r5,THREAD
- sub r4,r4,r6
- stw r4,last_task_used_altivec@l(r3)
-#endif /* CONFIG_SMP */
- /* restore registers and return */
- /* we haven't used ctr or xer or lr */
- b fast_exception_return
-
-/*
- * giveup_altivec(tsk)
- * Disable AltiVec for the task given as the argument,
- * and save the AltiVec registers in its thread_struct.
- * Enables AltiVec for use in the kernel on return.
- */
-
- .globl giveup_altivec
-giveup_altivec:
- mfmsr r5
- oris r5,r5,MSR_VEC@h
- SYNC
- MTMSRD(r5) /* enable use of AltiVec now */
- isync
- cmpwi 0,r3,0
- beqlr- /* if no previous owner, done */
- addi r3,r3,THREAD /* want THREAD of task */
- lwz r5,PT_REGS(r3)
- cmpwi 0,r5,0
- SAVE_32VRS(0, r4, r3)
- mfvscr vr0
- li r4,THREAD_VSCR
- stvx vr0,r4,r3
- beq 1f
- lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
- lis r3,MSR_VEC@h
- andc r4,r4,r3 /* disable AltiVec for previous task */
- stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-1:
-#ifndef CONFIG_SMP
- li r5,0
- lis r4,last_task_used_altivec@ha
- stw r5,last_task_used_altivec@l(r4)
-#endif /* CONFIG_SMP */
- blr
-#endif /* CONFIG_ALTIVEC */
-
-/*
- * This code is jumped to from the startup code to copy
- * the kernel image to physical address 0.
- */
-relocate_kernel:
- addis r9,r26,klimit@ha /* fetch klimit */
- lwz r25,klimit@l(r9)
- addis r25,r25,-KERNELBASE@h
- li r3,0 /* Destination base address */
- li r6,0 /* Destination offset */
- li r5,0x4000 /* # bytes of memory to copy */
- bl copy_and_flush /* copy the first 0x4000 bytes */
- addi r0,r3,4f@l /* jump to the address of 4f */
- mtctr r0 /* in copy and do the rest. */
- bctr /* jump to the copy */
-4: mr r5,r25
- bl copy_and_flush /* copy the rest */
- b turn_on_mmu
-
-/*
- * Copy routine used to copy the kernel to start at physical address 0
- * and flush and invalidate the caches as needed.
- * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
- * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
- */
-copy_and_flush:
- addi r5,r5,-4
- addi r6,r6,-4
-4: li r0,L1_CACHE_BYTES/4
- mtctr r0
-3: addi r6,r6,4 /* copy a cache line */
- lwzx r0,r6,r4
- stwx r0,r6,r3
- bdnz 3b
- dcbst r6,r3 /* write it to memory */
- sync
- icbi r6,r3 /* flush the icache line */
- cmplw 0,r6,r5
- blt 4b
- sync /* additional sync needed on g4 */
- isync
- addi r5,r5,4
- addi r6,r6,4
- blr
-
-#ifdef CONFIG_SMP
- .globl __secondary_start_pmac_0
-__secondary_start_pmac_0:
- /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
- li r24,0
- b 1f
- li r24,1
- b 1f
- li r24,2
- b 1f
- li r24,3
-1:
- /* on powersurge, we come in here with IR=0 and DR=1, and DBAT 0
- set to map the 0xf0000000 - 0xffffffff region */
- mfmsr r0
- rlwinm r0,r0,0,28,26 /* clear DR (0x10) */
- SYNC
- mtmsr r0
- isync
-
- .globl __secondary_start
-__secondary_start:
- /* Copy some CPU settings from CPU 0 */
- bl __restore_cpu_setup
-
- lis r3,-KERNELBASE@h
- mr r4,r24
- bl call_setup_cpu /* Call setup_cpu for this CPU */
-#ifdef CONFIG_6xx
- lis r3,-KERNELBASE@h
- bl init_idle_6xx
-#endif /* CONFIG_6xx */
-
- /* get current_thread_info and current */
- lis r1,secondary_ti@ha
- tophys(r1,r1)
- lwz r1,secondary_ti@l(r1)
- tophys(r2,r1)
- lwz r2,TI_TASK(r2)
-
- /* stack */
- addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
- li r0,0
- tophys(r3,r1)
- stw r0,0(r3)
-
- /* load up the MMU */
- bl load_up_mmu
-
- /* ptr to phys current thread */
- tophys(r4,r2)
- addi r4,r4,THREAD /* phys address of our thread_struct */
- CLR_TOP32(r4)
- mtspr SPRN_SPRG3,r4
- li r3,0
- mtspr SPRN_SPRG2,r3 /* 0 => not in RTAS */
-
- /* enable MMU and jump to start_secondary */
- li r4,MSR_KERNEL
- FIX_SRR1(r4,r5)
- lis r3,start_secondary@h
- ori r3,r3,start_secondary@l
- mtspr SPRN_SRR0,r3
- mtspr SPRN_SRR1,r4
- SYNC
- RFI
-#endif /* CONFIG_SMP */
-
-/*
- * Those generic dummy functions are kept for CPUs not
- * included in CONFIG_6xx
- */
-#if !defined(CONFIG_6xx)
-_GLOBAL(__save_cpu_setup)
- blr
-_GLOBAL(__restore_cpu_setup)
- blr
-#endif /* !defined(CONFIG_6xx) */
-
-
-/*
- * Load stuff into the MMU. Intended to be called with
- * IR=0 and DR=0.
- */
-load_up_mmu:
- sync /* Force all PTE updates to finish */
- isync
- tlbia /* Clear all TLB entries */
- sync /* wait for tlbia/tlbie to finish */
- TLBSYNC /* ... on all CPUs */
- /* Load the SDR1 register (hash table base & size) */
- lis r6,_SDR1@ha
- tophys(r6,r6)
- lwz r6,_SDR1@l(r6)
- mtspr SPRN_SDR1,r6
- li r0,16 /* load up segment register values */
- mtctr r0 /* for context 0 */
- lis r3,0x2000 /* Ku = 1, VSID = 0 */
- li r4,0
-3: mtsrin r3,r4
- addi r3,r3,0x111 /* increment VSID */
- addis r4,r4,0x1000 /* address of next segment */
- bdnz 3b
-
-/* Load the BAT registers with the values set up by MMU_init.
- MMU_init takes care of whether we're on a 601 or not. */
- mfpvr r3
- srwi r3,r3,16
- cmpwi r3,1
- lis r3,BATS@ha
- addi r3,r3,BATS@l
- tophys(r3,r3)
- LOAD_BAT(0,r3,r4,r5)
- LOAD_BAT(1,r3,r4,r5)
- LOAD_BAT(2,r3,r4,r5)
- LOAD_BAT(3,r3,r4,r5)
-
- blr
-
-/*
- * This is where the main kernel code starts.
- */
-start_here:
- /* ptr to current */
- lis r2,init_task@h
- ori r2,r2,init_task@l
- /* Set up for using our exception vectors */
- /* ptr to phys current thread */
- tophys(r4,r2)
- addi r4,r4,THREAD /* init task's THREAD */
- CLR_TOP32(r4)
- mtspr SPRN_SPRG3,r4
- li r3,0
- mtspr SPRN_SPRG2,r3 /* 0 => not in RTAS */
-
- /* stack */
- lis r1,init_thread_union@ha
- addi r1,r1,init_thread_union@l
- li r0,0
- stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
-/*
- * Do early bootinfo parsing, platform-specific initialization,
- * and set up the MMU.
- */
- mr r3,r31
- mr r4,r30
- mr r5,r29
- mr r6,r28
- mr r7,r27
- bl machine_init
- bl MMU_init
-
-/*
- * Go back to running unmapped so we can load up new values
- * for SDR1 (hash table pointer) and the segment registers
- * and change to using our exception vectors.
- */
- lis r4,2f@h
- ori r4,r4,2f@l
- tophys(r4,r4)
- li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
- FIX_SRR1(r3,r5)
- mtspr SPRN_SRR0,r4
- mtspr SPRN_SRR1,r3
- SYNC
- RFI
-/* Load up the kernel context */
-2: bl load_up_mmu
-
-#ifdef CONFIG_BDI_SWITCH
- /* Add helper information for the Abatron bdiGDB debugger.
- * We do this here because we know the mmu is disabled, and
- * will be enabled for real in just a few instructions.
- */
- lis r5, abatron_pteptrs@h
- ori r5, r5, abatron_pteptrs@l
- stw r5, 0xf0(r0) /* This much match your Abatron config */
- lis r6, swapper_pg_dir@h
- ori r6, r6, swapper_pg_dir@l
- tophys(r5, r5)
- stw r6, 0(r5)
-#endif /* CONFIG_BDI_SWITCH */
-
-/* Now turn on the MMU for real! */
- li r4,MSR_KERNEL
- FIX_SRR1(r4,r5)
- lis r3,start_kernel@h
- ori r3,r3,start_kernel@l
- mtspr SPRN_SRR0,r3
- mtspr SPRN_SRR1,r4
- SYNC
- RFI
-
-/*
- * Set up the segment registers for a new context.
- */
-_GLOBAL(set_context)
- mulli r3,r3,897 /* multiply context by skew factor */
- rlwinm r3,r3,4,8,27 /* VSID = (context & 0xfffff) << 4 */
- addis r3,r3,0x6000 /* Set Ks, Ku bits */
- li r0,NUM_USER_SEGMENTS
- mtctr r0
-
-#ifdef CONFIG_BDI_SWITCH
- /* Context switch the PTE pointer for the Abatron BDI2000.
- * The PGDIR is passed as second argument.
- */
- lis r5, KERNELBASE@h
- lwz r5, 0xf0(r5)
- stw r4, 0x4(r5)
-#endif
- li r4,0
- isync
-3:
- mtsrin r3,r4
- addi r3,r3,0x111 /* next VSID */
- rlwinm r3,r3,0,8,3 /* clear out any overflow from VSID field */
- addis r4,r4,0x1000 /* address of next segment */
- bdnz 3b
- sync
- isync
- blr
-
-/*
- * An undocumented "feature" of 604e requires that the v bit
- * be cleared before changing BAT values.
- *
- * Also, newer IBM firmware does not clear bat3 and 4 so
- * this makes sure it's done.
- * -- Cort
- */
-clear_bats:
- li r10,0
- mfspr r9,SPRN_PVR
- rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
- cmpwi r9, 1
- beq 1f
-
- mtspr SPRN_DBAT0U,r10
- mtspr SPRN_DBAT0L,r10
- mtspr SPRN_DBAT1U,r10
- mtspr SPRN_DBAT1L,r10
- mtspr SPRN_DBAT2U,r10
- mtspr SPRN_DBAT2L,r10
- mtspr SPRN_DBAT3U,r10
- mtspr SPRN_DBAT3L,r10
-1:
- mtspr SPRN_IBAT0U,r10
- mtspr SPRN_IBAT0L,r10
- mtspr SPRN_IBAT1U,r10
- mtspr SPRN_IBAT1L,r10
- mtspr SPRN_IBAT2U,r10
- mtspr SPRN_IBAT2L,r10
- mtspr SPRN_IBAT3U,r10
- mtspr SPRN_IBAT3L,r10
-BEGIN_FTR_SECTION
- /* Here's a tweak: at this point, CPU setup have
- * not been called yet, so HIGH_BAT_EN may not be
- * set in HID0 for the 745x processors. However, it
- * seems that doesn't affect our ability to actually
- * write to these SPRs.
- */
- mtspr SPRN_DBAT4U,r10
- mtspr SPRN_DBAT4L,r10
- mtspr SPRN_DBAT5U,r10
- mtspr SPRN_DBAT5L,r10
- mtspr SPRN_DBAT6U,r10
- mtspr SPRN_DBAT6L,r10
- mtspr SPRN_DBAT7U,r10
- mtspr SPRN_DBAT7L,r10
- mtspr SPRN_IBAT4U,r10
- mtspr SPRN_IBAT4L,r10
- mtspr SPRN_IBAT5U,r10
- mtspr SPRN_IBAT5L,r10
- mtspr SPRN_IBAT6U,r10
- mtspr SPRN_IBAT6L,r10
- mtspr SPRN_IBAT7U,r10
- mtspr SPRN_IBAT7L,r10
-END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
- blr
-
-flush_tlbs:
- lis r10, 0x40
-1: addic. r10, r10, -0x1000
- tlbie r10
- blt 1b
- sync
- blr
-
-mmu_off:
- addi r4, r3, __after_mmu_off - _start
- mfmsr r3
- andi. r0,r3,MSR_DR|MSR_IR /* MMU enabled? */
- beqlr
- andc r3,r3,r0
- mtspr SPRN_SRR0,r4
- mtspr SPRN_SRR1,r3
- sync
- RFI
-
-/*
- * Use the first pair of BAT registers to map the 1st 16MB
- * of RAM to KERNELBASE. From this point on we can't safely
- * call OF any more.
- */
-initial_bats:
- lis r11,KERNELBASE@h
- mfspr r9,SPRN_PVR
- rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
- cmpwi 0,r9,1
- bne 4f
- ori r11,r11,4 /* set up BAT registers for 601 */
- li r8,0x7f /* valid, block length = 8MB */
- oris r9,r11,0x800000@h /* set up BAT reg for 2nd 8M */
- oris r10,r8,0x800000@h /* set up BAT reg for 2nd 8M */
- mtspr SPRN_IBAT0U,r11 /* N.B. 601 has valid bit in */
- mtspr SPRN_IBAT0L,r8 /* lower BAT register */
- mtspr SPRN_IBAT1U,r9
- mtspr SPRN_IBAT1L,r10
- isync
- blr
-
-4: tophys(r8,r11)
-#ifdef CONFIG_SMP
- ori r8,r8,0x12 /* R/W access, M=1 */
-#else
- ori r8,r8,2 /* R/W access */
-#endif /* CONFIG_SMP */
- ori r11,r11,BL_256M<<2|0x2 /* set up BAT registers for 604 */
-
- mtspr SPRN_DBAT0L,r8 /* N.B. 6xx (not 601) have valid */
- mtspr SPRN_DBAT0U,r11 /* bit in upper BAT register */
- mtspr SPRN_IBAT0L,r8
- mtspr SPRN_IBAT0U,r11
- isync
- blr
-
-#ifdef CONFIG_BOOTX_TEXT
-setup_disp_bat:
- /*
- * setup the display bat prepared for us in prom.c
- */
- mflr r8
- bl reloc_offset
- mtlr r8
- addis r8,r3,disp_BAT@ha
- addi r8,r8,disp_BAT@l
- lwz r11,0(r8)
- lwz r8,4(r8)
- mfspr r9,SPRN_PVR
- rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */
- cmpwi 0,r9,1
- beq 1f
- mtspr SPRN_DBAT3L,r8
- mtspr SPRN_DBAT3U,r11
- blr
-1: mtspr SPRN_IBAT3L,r8
- mtspr SPRN_IBAT3U,r11
- blr
-
-#endif /* defined(CONFIG_BOOTX_TEXT) */
-
-#ifdef CONFIG_8260
-/* Jump into the system reset for the rom.
- * We first disable the MMU, and then jump to the ROM reset address.
- *
- * r3 is the board info structure, r4 is the location for starting.
- * I use this for building a small kernel that can load other kernels,
- * rather than trying to write or rely on a rom monitor that can tftp load.
- */
- .globl m8260_gorom
-m8260_gorom:
- mfmsr r0
- rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */
- sync
- mtmsr r0
- sync
- mfspr r11, SPRN_HID0
- lis r10, 0
- ori r10,r10,HID0_ICE|HID0_DCE
- andc r11, r11, r10
- mtspr SPRN_HID0, r11
- isync
- li r5, MSR_ME|MSR_RI
- lis r6,2f@h
- addis r6,r6,-KERNELBASE@h
- ori r6,r6,2f@l
- mtspr SPRN_SRR0,r6
- mtspr SPRN_SRR1,r5
- isync
- sync
- rfi
-2:
- mtlr r4
- blr
-#endif
-
-
-/*
- * We put a few things here that have to be page-aligned.
- * This stuff goes at the beginning of the data segment,
- * which is page-aligned.
- */
- .data
- .globl sdata
-sdata:
- .globl empty_zero_page
-empty_zero_page:
- .space 4096
-
- .globl swapper_pg_dir
-swapper_pg_dir:
- .space 4096
-
-/*
- * This space gets a copy of optional info passed to us by the bootstrap
- * Used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
- .globl cmd_line
-cmd_line:
- .space 512
-
- .globl intercept_table
-intercept_table:
- .long 0, 0, i0x200, i0x300, i0x400, 0, i0x600, i0x700
- .long i0x800, 0, 0, 0, 0, i0xd00, 0, 0
- .long 0, 0, 0, i0x1300, 0, 0, 0, 0
- .long 0, 0, 0, 0, 0, 0, 0, 0
- .long 0, 0, 0, 0, 0, 0, 0, 0
- .long 0, 0, 0, 0, 0, 0, 0, 0
-
-/* Room for two PTE pointers, usually the kernel and current user pointers
- * to their respective root page table.
- */
-abatron_pteptrs:
- .space 8
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
deleted file mode 100644
index ebb5a40..0000000
--- a/arch/ppc/kernel/head_44x.S
+++ /dev/null
@@ -1,769 +0,0 @@
-/*
- * Kernel execution entry point code.
- *
- * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
- * Initial PowerPC version.
- * Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
- * Rewritten for PReP
- * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
- * Low-level exception handers, MMU support, and rewrite.
- * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
- * PowerPC 8xx modifications.
- * Copyright (c) 1998-1999 TiVo, Inc.
- * PowerPC 403GCX modifications.
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- * PowerPC 403GCX/405GP modifications.
- * Copyright 2000 MontaVista Software Inc.
- * PPC405 modifications
- * PowerPC 403GCX/405GP modifications.
- * Author: MontaVista Software, Inc.
- * frank_rowand@mvista.com or source@mvista.com
- * debbie_chu@mvista.com
- * Copyright 2002-2005 MontaVista Software, Inc.
- * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/pgtable.h>
-#include <asm/ibm4xx.h>
-#include <asm/ibm44x.h>
-#include <asm/cputable.h>
-#include <asm/thread_info.h>
-#include <asm/ppc_asm.h>
-#include <asm/asm-offsets.h>
-#include "head_booke.h"
-
-
-/* As with the other PowerPC ports, it is expected that when code
- * execution begins here, the following registers contain valid, yet
- * optional, information:
- *
- * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
- * r4 - Starting address of the init RAM disk
- * r5 - Ending address of the init RAM disk
- * r6 - Start of kernel command line string (e.g. "mem=128")
- * r7 - End of kernel command line string
- *
- */
- .text
-_GLOBAL(_stext)
-_GLOBAL(_start)
- /*
- * Reserve a word at a fixed location to store the address
- * of abatron_pteptrs
- */
- nop
-/*
- * Save parameters we are passed
- */
- mr r31,r3
- mr r30,r4
- mr r29,r5
- mr r28,r6
- mr r27,r7
- li r24,0 /* CPU number */
-
-/*
- * Set up the initial MMU state
- *
- * We are still executing code at the virtual address
- * mappings set by the firmware for the base of RAM.
- *
- * We first invalidate all TLB entries but the one
- * we are running from. We then load the KERNELBASE
- * mappings so we can begin to use kernel addresses
- * natively and so the interrupt vector locations are
- * permanently pinned (necessary since Book E
- * implementations always have translation enabled).
- *
- * TODO: Use the known TLB entry we are running from to
- * determine which physical region we are located
- * in. This can be used to determine where in RAM
- * (on a shared CPU system) or PCI memory space
- * (on a DRAMless system) we are located.
- * For now, we assume a perfect world which means
- * we are located at the base of DRAM (physical 0).
- */
-
-/*
- * Search TLB for entry that we are currently using.
- * Invalidate all entries but the one we are using.
- */
- /* Load our current PID->MMUCR TID and MSR IS->MMUCR STS */
- mfspr r3,SPRN_PID /* Get PID */
- mfmsr r4 /* Get MSR */
- andi. r4,r4,MSR_IS@l /* TS=1? */
- beq wmmucr /* If not, leave STS=0 */
- oris r3,r3,PPC44x_MMUCR_STS@h /* Set STS=1 */
-wmmucr: mtspr SPRN_MMUCR,r3 /* Put MMUCR */
- sync
-
- bl invstr /* Find our address */
-invstr: mflr r5 /* Make it accessible */
- tlbsx r23,0,r5 /* Find entry we are in */
- li r4,0 /* Start at TLB entry 0 */
- li r3,0 /* Set PAGEID inval value */
-1: cmpw r23,r4 /* Is this our entry? */
- beq skpinv /* If so, skip the inval */
- tlbwe r3,r4,PPC44x_TLB_PAGEID /* If not, inval the entry */
-skpinv: addi r4,r4,1 /* Increment */
- cmpwi r4,64 /* Are we done? */
- bne 1b /* If not, repeat */
- isync /* If so, context change */
-
-/*
- * Configure and load pinned entry into TLB slot 63.
- */
-
- lis r3,KERNELBASE@h /* Load the kernel virtual address */
- ori r3,r3,KERNELBASE@l
-
- /* Kernel is at the base of RAM */
- li r4, 0 /* Load the kernel physical address */
-
- /* Load the kernel PID = 0 */
- li r0,0
- mtspr SPRN_PID,r0
- sync
-
- /* Initialize MMUCR */
- li r5,0
- mtspr SPRN_MMUCR,r5
- sync
-
- /* pageid fields */
- clrrwi r3,r3,10 /* Mask off the effective page number */
- ori r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_256M
-
- /* xlat fields */
- clrrwi r4,r4,10 /* Mask off the real page number */
- /* ERPN is 0 for first 4GB page */
-
- /* attrib fields */
- /* Added guarded bit to protect against speculative loads/stores */
- li r5,0
- ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G)
-
- li r0,63 /* TLB slot 63 */
-
- tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
- tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */
- tlbwe r5,r0,PPC44x_TLB_ATTRIB /* Load the attrib/access fields */
-
- /* Force context change */
- mfmsr r0
- mtspr SPRN_SRR1, r0
- lis r0,3f@h
- ori r0,r0,3f@l
- mtspr SPRN_SRR0,r0
- sync
- rfi
-
- /* If necessary, invalidate original entry we used */
-3: cmpwi r23,63
- beq 4f
- li r6,0
- tlbwe r6,r23,PPC44x_TLB_PAGEID
- isync
-
-4:
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- /*
- * Add temporary UART mapping for early debug.
- * We can map UART registers wherever we want as long as they don't
- * interfere with other system mappings (e.g. with pinned entries).
- * For an example of how we handle this - see ocotea.h. --ebs
- */
- /* pageid fields */
- lis r3,UART0_IO_BASE@h
- ori r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_4K
-
- /* xlat fields */
- lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */
-#ifdef UART0_PHYS_ERPN
- ori r4,r4,UART0_PHYS_ERPN /* Add ERPN if above 4GB */
-#endif
-
- /* attrib fields */
- li r5,0
- ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G)
-
- li r0,62 /* TLB slot 62 */
-
- tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
- tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */
- tlbwe r5,r0,PPC44x_TLB_ATTRIB /* Load the attrib/access fields */
-
- /* Force context change */
- isync
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-
- /* Establish the interrupt vector offsets */
- SET_IVOR(0, CriticalInput);
- SET_IVOR(1, MachineCheck);
- SET_IVOR(2, DataStorage);
- SET_IVOR(3, InstructionStorage);
- SET_IVOR(4, ExternalInput);
- SET_IVOR(5, Alignment);
- SET_IVOR(6, Program);
- SET_IVOR(7, FloatingPointUnavailable);
- SET_IVOR(8, SystemCall);
- SET_IVOR(9, AuxillaryProcessorUnavailable);
- SET_IVOR(10, Decrementer);
- SET_IVOR(11, FixedIntervalTimer);
- SET_IVOR(12, WatchdogTimer);
- SET_IVOR(13, DataTLBError);
- SET_IVOR(14, InstructionTLBError);
- SET_IVOR(15, Debug);
-
- /* Establish the interrupt vector base */
- lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
- mtspr SPRN_IVPR,r4
-
- /*
- * This is where the main kernel code starts.
- */
-
- /* ptr to current */
- lis r2,init_task@h
- ori r2,r2,init_task@l
-
- /* ptr to current thread */
- addi r4,r2,THREAD /* init task's THREAD */
- mtspr SPRN_SPRG3,r4
-
- /* stack */
- lis r1,init_thread_union@h
- ori r1,r1,init_thread_union@l
- li r0,0
- stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
-
- bl early_init
-
-/*
- * Decide what sort of machine this is and initialize the MMU.
- */
- mr r3,r31
- mr r4,r30
- mr r5,r29
- mr r6,r28
- mr r7,r27
- bl machine_init
- bl MMU_init
-
- /* Setup PTE pointers for the Abatron bdiGDB */
- lis r6, swapper_pg_dir@h
- ori r6, r6, swapper_pg_dir@l
- lis r5, abatron_pteptrs@h
- ori r5, r5, abatron_pteptrs@l
- lis r4, KERNELBASE@h
- ori r4, r4, KERNELBASE@l
- stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */
- stw r6, 0(r5)
-
- /* Let's move on */
- lis r4,start_kernel@h
- ori r4,r4,start_kernel@l
- lis r3,MSR_KERNEL@h
- ori r3,r3,MSR_KERNEL@l
- mtspr SPRN_SRR0,r4
- mtspr SPRN_SRR1,r3
- rfi /* change context and jump to start_kernel */
-
-/*
- * Interrupt vector entry code
- *
- * The Book E MMUs are always on so we don't need to handle
- * interrupts in real mode as with previous PPC processors. In
- * this case we handle interrupts in the kernel virtual address
- * space.
- *
- * Interrupt vectors are dynamically placed relative to the
- * interrupt prefix as determined by the address of interrupt_base.
- * The interrupt vectors offsets are programmed using the labels
- * for each interrupt vector entry.
- *
- * Interrupt vectors must be aligned on a 16 byte boundary.
- * We align on a 32 byte cache line boundary for good measure.
- */
-
-interrupt_base:
- /* Critical Input Interrupt */
- CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
-
- /* Machine Check Interrupt */
-#ifdef CONFIG_440A
- MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-#else
- CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-#endif
-
- /* Data Storage Interrupt */
- START_EXCEPTION(DataStorage)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
- mtspr SPRN_SPRG4W, r12
- mtspr SPRN_SPRG5W, r13
- mfcr r11
- mtspr SPRN_SPRG7W, r11
-
- /*
- * Check if it was a store fault, if not then bail
- * because a user tried to access a kernel or
- * read-protected page. Otherwise, get the
- * offending address and handle it.
- */
- mfspr r10, SPRN_ESR
- andis. r10, r10, ESR_ST@h
- beq 2f
-
- mfspr r10, SPRN_DEAR /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- cmplw r10, r11
- blt+ 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
-
- mfspr r12,SPRN_MMUCR
- rlwinm r12,r12,0,0,23 /* Clear TID */
-
- b 4f
-
- /* Get the PGD for the current thread */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-
- /* Load PID into MMUCR TID */
- mfspr r12,SPRN_MMUCR /* Get MMUCR */
- mfspr r13,SPRN_PID /* Get PID */
- rlwimi r12,r13,0,24,31 /* Set TID */
-
-4:
- mtspr SPRN_MMUCR,r12
-
- rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
- lwzx r11, r12, r11 /* Get pgd/pmd entry */
- rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
- lwz r11, 4(r12) /* Get pte entry */
-
- andi. r13, r11, _PAGE_RW /* Is it writeable? */
- beq 2f /* Bail if not */
-
- /* Update 'changed'.
- */
- ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
- stw r11, 4(r12) /* Update Linux page table */
-
- li r13, PPC44x_TLB_SR@l /* Set SR */
- rlwimi r13, r11, 29, 29, 29 /* SX = _PAGE_HWEXEC */
- rlwimi r13, r11, 0, 30, 30 /* SW = _PAGE_RW */
- rlwimi r13, r11, 29, 28, 28 /* UR = _PAGE_USER */
- rlwimi r12, r11, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */
- rlwimi r12, r11, 29, 30, 30 /* (_PAGE_USER>>3)->r12 */
- and r12, r12, r11 /* HWEXEC/RW & USER */
- rlwimi r13, r12, 0, 26, 26 /* UX = HWEXEC & USER */
- rlwimi r13, r12, 3, 27, 27 /* UW = RW & USER */
-
- rlwimi r11,r13,0,26,31 /* Insert static perms */
-
- rlwinm r11,r11,0,20,15 /* Clear U0-U3 */
-
- /* find the TLB index that caused the fault. It has to be here. */
- tlbsx r10, 0, r10
-
- tlbwe r11, r10, PPC44x_TLB_ATTRIB /* Write ATTRIB */
-
- /* Done...restore registers and get out of here.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
-
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- rfi /* Force context change */
-
-2:
- /*
- * The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
-
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b data_access
-
- /* Instruction Storage Interrupt */
- INSTRUCTION_STORAGE_EXCEPTION
-
- /* External Input Interrupt */
- EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE)
-
- /* Alignment Interrupt */
- ALIGNMENT_EXCEPTION
-
- /* Program Interrupt */
- PROGRAM_EXCEPTION
-
- /* Floating Point Unavailable Interrupt */
-#ifdef CONFIG_PPC_FPU
- FP_UNAVAILABLE_EXCEPTION
-#else
- EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
-#endif
-
- /* System Call Interrupt */
- START_EXCEPTION(SystemCall)
- NORMAL_EXCEPTION_PROLOG
- EXC_XFER_EE_LITE(0x0c00, DoSyscall)
-
- /* Auxillary Processor Unavailable Interrupt */
- EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
-
- /* Decrementer Interrupt */
- DECREMENTER_EXCEPTION
-
- /* Fixed Internal Timer Interrupt */
- /* TODO: Add FIT support */
- EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
-
- /* Watchdog Timer Interrupt */
- /* TODO: Add watchdog support */
-#ifdef CONFIG_BOOKE_WDT
- CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
-#else
- CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception)
-#endif
-
- /* Data TLB Error Interrupt */
- START_EXCEPTION(DataTLBError)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
- mtspr SPRN_SPRG4W, r12
- mtspr SPRN_SPRG5W, r13
- mfcr r11
- mtspr SPRN_SPRG7W, r11
- mfspr r10, SPRN_DEAR /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- cmplw r10, r11
- blt+ 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
-
- mfspr r12,SPRN_MMUCR
- rlwinm r12,r12,0,0,23 /* Clear TID */
-
- b 4f
-
- /* Get the PGD for the current thread */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-
- /* Load PID into MMUCR TID */
- mfspr r12,SPRN_MMUCR
- mfspr r13,SPRN_PID /* Get PID */
- rlwimi r12,r13,0,24,31 /* Set TID */
-
-4:
- mtspr SPRN_MMUCR,r12
-
- rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
- lwzx r11, r12, r11 /* Get pgd/pmd entry */
- rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
- lwz r11, 4(r12) /* Get pte entry */
- andi. r13, r11, _PAGE_PRESENT /* Is the page present? */
- beq 2f /* Bail if not present */
-
- ori r11, r11, _PAGE_ACCESSED
- stw r11, 4(r12)
-
- /* Jump to common tlb load */
- b finish_tlb_load
-
-2:
- /* The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b data_access
-
- /* Instruction TLB Error Interrupt */
- /*
- * Nearly the same as above, except we get our
- * information from different registers and bailout
- * to a different point.
- */
- START_EXCEPTION(InstructionTLBError)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
- mtspr SPRN_SPRG4W, r12
- mtspr SPRN_SPRG5W, r13
- mfcr r11
- mtspr SPRN_SPRG7W, r11
- mfspr r10, SPRN_SRR0 /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- cmplw r10, r11
- blt+ 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
-
- mfspr r12,SPRN_MMUCR
- rlwinm r12,r12,0,0,23 /* Clear TID */
-
- b 4f
-
- /* Get the PGD for the current thread */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-
- /* Load PID into MMUCR TID */
- mfspr r12,SPRN_MMUCR
- mfspr r13,SPRN_PID /* Get PID */
- rlwimi r12,r13,0,24,31 /* Set TID */
-
-4:
- mtspr SPRN_MMUCR,r12
-
- rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
- lwzx r11, r12, r11 /* Get pgd/pmd entry */
- rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
- lwz r11, 4(r12) /* Get pte entry */
- andi. r13, r11, _PAGE_PRESENT /* Is the page present? */
- beq 2f /* Bail if not present */
-
- ori r11, r11, _PAGE_ACCESSED
- stw r11, 4(r12)
-
- /* Jump to common TLB load point */
- b finish_tlb_load
-
-2:
- /* The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b InstructionStorage
-
- /* Debug Interrupt */
- DEBUG_EXCEPTION
-
-/*
- * Local functions
- */
- /*
- * Data TLB exceptions will bail out to this point
- * if they can't resolve the lightweight TLB fault.
- */
-data_access:
- NORMAL_EXCEPTION_PROLOG
- mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
- stw r5,_ESR(r11)
- mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
- EXC_XFER_EE_LITE(0x0300, handle_page_fault)
-
-/*
-
- * Both the instruction and data TLB miss get to this
- * point to load the TLB.
- * r10 - EA of fault
- * r11 - available to use
- * r12 - Pointer to the 64-bit PTE
- * r13 - available to use
- * MMUCR - loaded with proper value when we get here
- * Upon exit, we reload everything and RFI.
- */
-finish_tlb_load:
- /*
- * We set execute, because we don't have the granularity to
- * properly set this at the page level (Linux problem).
- * If shared is set, we cause a zero PID->TID load.
- * Many of these bits are software only. Bits we don't set
- * here we (properly should) assume have the appropriate value.
- */
-
- /* Load the next available TLB index */
- lis r13, tlb_44x_index@ha
- lwz r13, tlb_44x_index@l(r13)
- /* Load the TLB high watermark */
- lis r11, tlb_44x_hwater@ha
- lwz r11, tlb_44x_hwater@l(r11)
-
- /* Increment, rollover, and store TLB index */
- addi r13, r13, 1
- cmpw 0, r13, r11 /* reserve entries */
- ble 7f
- li r13, 0
-7:
- /* Store the next available TLB index */
- lis r11, tlb_44x_index@ha
- stw r13, tlb_44x_index@l(r11)
-
- lwz r11, 0(r12) /* Get MS word of PTE */
- lwz r12, 4(r12) /* Get LS word of PTE */
- rlwimi r11, r12, 0, 0 , 19 /* Insert RPN */
- tlbwe r11, r13, PPC44x_TLB_XLAT /* Write XLAT */
-
- /*
- * Create PAGEID. This is the faulting address,
- * page size, and valid flag.
- */
- li r11, PPC44x_TLB_VALID | PPC44x_TLB_4K
- rlwimi r10, r11, 0, 20, 31 /* Insert valid and page size */
- tlbwe r10, r13, PPC44x_TLB_PAGEID /* Write PAGEID */
-
- li r10, PPC44x_TLB_SR@l /* Set SR */
- rlwimi r10, r12, 0, 30, 30 /* Set SW = _PAGE_RW */
- rlwimi r10, r12, 29, 29, 29 /* SX = _PAGE_HWEXEC */
- rlwimi r10, r12, 29, 28, 28 /* UR = _PAGE_USER */
- rlwimi r11, r12, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */
- and r11, r12, r11 /* HWEXEC & USER */
- rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */
-
- rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
- rlwinm r12, r12, 0, 20, 15 /* Clear U0-U3 */
- tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
-
- /* Done...restore registers and get out of here.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- rfi /* Force context change */
-
-/*
- * Global functions
- */
-
-/*
- * extern void giveup_altivec(struct task_struct *prev)
- *
- * The 44x core does not have an AltiVec unit.
- */
-_GLOBAL(giveup_altivec)
- blr
-
-/*
- * extern void giveup_fpu(struct task_struct *prev)
- *
- * The 44x core does not have an FPU.
- */
-#ifndef CONFIG_PPC_FPU
-_GLOBAL(giveup_fpu)
- blr
-#endif
-
-/*
- * extern void abort(void)
- *
- * At present, this routine just applies a system reset.
- */
-_GLOBAL(abort)
- mfspr r13,SPRN_DBCR0
- oris r13,r13,DBCR0_RST_SYSTEM@h
- mtspr SPRN_DBCR0,r13
-
-_GLOBAL(set_context)
-
-#ifdef CONFIG_BDI_SWITCH
- /* Context switch the PTE pointer for the Abatron BDI2000.
- * The PGDIR is the second parameter.
- */
- lis r5, abatron_pteptrs@h
- ori r5, r5, abatron_pteptrs@l
- stw r4, 0x4(r5)
-#endif
- mtspr SPRN_PID,r3
- isync /* Force context change */
- blr
-
-/*
- * We put a few things here that have to be page-aligned. This stuff
- * goes at the beginning of the data segment, which is page-aligned.
- */
- .data
- .align 12
- .globl sdata
-sdata:
- .globl empty_zero_page
-empty_zero_page:
- .space 4096
-
-/*
- * To support >32-bit physical addresses, we use an 8KB pgdir.
- */
- .globl swapper_pg_dir
-swapper_pg_dir:
- .space 8192
-
-/* Reserved 4k for the critical exception stack & 4k for the machine
- * check stack per CPU for kernel mode exceptions */
- .section .bss
- .align 12
-exception_stack_bottom:
- .space BOOKE_EXCEPTION_STACK_SIZE
- .globl exception_stack_top
-exception_stack_top:
-
-/*
- * This space gets a copy of optional info passed to us by the bootstrap
- * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
- .globl cmd_line
-cmd_line:
- .space 512
-
-/*
- * Room for two PTE pointers, usually the kernel and current user pointers
- * to their respective root page table.
- */
-abatron_pteptrs:
- .space 8
diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
deleted file mode 100644
index 51da157..0000000
--- a/arch/ppc/kernel/head_4xx.S
+++ /dev/null
@@ -1,1021 +0,0 @@
-/*
- * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
- * Initial PowerPC version.
- * Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
- * Rewritten for PReP
- * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
- * Low-level exception handers, MMU support, and rewrite.
- * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
- * PowerPC 8xx modifications.
- * Copyright (c) 1998-1999 TiVo, Inc.
- * PowerPC 403GCX modifications.
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- * PowerPC 403GCX/405GP modifications.
- * Copyright 2000 MontaVista Software Inc.
- * PPC405 modifications
- * PowerPC 403GCX/405GP modifications.
- * Author: MontaVista Software, Inc.
- * frank_rowand@mvista.com or source@mvista.com
- * debbie_chu@mvista.com
- *
- *
- * Module name: head_4xx.S
- *
- * Description:
- * Kernel execution entry point code.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/pgtable.h>
-#include <asm/ibm4xx.h>
-#include <asm/cputable.h>
-#include <asm/thread_info.h>
-#include <asm/ppc_asm.h>
-#include <asm/asm-offsets.h>
-
-/* As with the other PowerPC ports, it is expected that when code
- * execution begins here, the following registers contain valid, yet
- * optional, information:
- *
- * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
- * r4 - Starting address of the init RAM disk
- * r5 - Ending address of the init RAM disk
- * r6 - Start of kernel command line string (e.g. "mem=96m")
- * r7 - End of kernel command line string
- *
- * This is all going to change RSN when we add bi_recs....... -- Dan
- */
- .text
-_GLOBAL(_stext)
-_GLOBAL(_start)
-
- /* Save parameters we are passed.
- */
- mr r31,r3
- mr r30,r4
- mr r29,r5
- mr r28,r6
- mr r27,r7
-
- /* We have to turn on the MMU right away so we get cache modes
- * set correctly.
- */
- bl initial_mmu
-
-/* We now have the lower 16 Meg mapped into TLB entries, and the caches
- * ready to work.
- */
-turn_on_mmu:
- lis r0,MSR_KERNEL@h
- ori r0,r0,MSR_KERNEL@l
- mtspr SPRN_SRR1,r0
- lis r0,start_here@h
- ori r0,r0,start_here@l
- mtspr SPRN_SRR0,r0
- SYNC
- rfi /* enables MMU */
- b . /* prevent prefetch past rfi */
-
-/*
- * This area is used for temporarily saving registers during the
- * critical exception prolog.
- */
- . = 0xc0
-crit_save:
-_GLOBAL(crit_r10)
- .space 4
-_GLOBAL(crit_r11)
- .space 4
-
-/*
- * Exception vector entry code. This code runs with address translation
- * turned off (i.e. using physical addresses). We assume SPRG3 has the
- * physical address of the current task thread_struct.
- * Note that we have to have decremented r1 before we write to any fields
- * of the exception frame, since a critical interrupt could occur at any
- * time, and it will write to the area immediately below the current r1.
- */
-#define NORMAL_EXCEPTION_PROLOG \
- mtspr SPRN_SPRG0,r10; /* save two registers to work with */\
- mtspr SPRN_SPRG1,r11; \
- mtspr SPRN_SPRG2,r1; \
- mfcr r10; /* save CR in r10 for now */\
- mfspr r11,SPRN_SRR1; /* check whether user or kernel */\
- andi. r11,r11,MSR_PR; \
- beq 1f; \
- mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\
- lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\
- addi r1,r1,THREAD_SIZE; \
-1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\
- tophys(r11,r1); \
- stw r10,_CCR(r11); /* save various registers */\
- stw r12,GPR12(r11); \
- stw r9,GPR9(r11); \
- mfspr r10,SPRN_SPRG0; \
- stw r10,GPR10(r11); \
- mfspr r12,SPRN_SPRG1; \
- stw r12,GPR11(r11); \
- mflr r10; \
- stw r10,_LINK(r11); \
- mfspr r10,SPRN_SPRG2; \
- mfspr r12,SPRN_SRR0; \
- stw r10,GPR1(r11); \
- mfspr r9,SPRN_SRR1; \
- stw r10,0(r11); \
- rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
- stw r0,GPR0(r11); \
- SAVE_4GPRS(3, r11); \
- SAVE_2GPRS(7, r11)
-
-/*
- * Exception prolog for critical exceptions. This is a little different
- * from the normal exception prolog above since a critical exception
- * can potentially occur at any point during normal exception processing.
- * Thus we cannot use the same SPRG registers as the normal prolog above.
- * Instead we use a couple of words of memory at low physical addresses.
- * This is OK since we don't support SMP on these processors.
- */
-#define CRITICAL_EXCEPTION_PROLOG \
- stw r10,crit_r10@l(0); /* save two registers to work with */\
- stw r11,crit_r11@l(0); \
- mfcr r10; /* save CR in r10 for now */\
- mfspr r11,SPRN_SRR3; /* check whether user or kernel */\
- andi. r11,r11,MSR_PR; \
- lis r11,critical_stack_top@h; \
- ori r11,r11,critical_stack_top@l; \
- beq 1f; \
- /* COMING FROM USER MODE */ \
- mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
- lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
- addi r11,r11,THREAD_SIZE; \
-1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\
- tophys(r11,r11); \
- stw r10,_CCR(r11); /* save various registers */\
- stw r12,GPR12(r11); \
- stw r9,GPR9(r11); \
- mflr r10; \
- stw r10,_LINK(r11); \
- mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\
- stw r12,_DEAR(r11); /* since they may have had stuff */\
- mfspr r9,SPRN_ESR; /* in them at the point where the */\
- stw r9,_ESR(r11); /* exception was taken */\
- mfspr r12,SPRN_SRR2; \
- stw r1,GPR1(r11); \
- mfspr r9,SPRN_SRR3; \
- stw r1,0(r11); \
- tovirt(r1,r11); \
- rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
- stw r0,GPR0(r11); \
- SAVE_4GPRS(3, r11); \
- SAVE_2GPRS(7, r11)
-
- /*
- * State at this point:
- * r9 saved in stack frame, now saved SRR3 & ~MSR_WE
- * r10 saved in crit_r10 and in stack frame, trashed
- * r11 saved in crit_r11 and in stack frame,
- * now phys stack/exception frame pointer
- * r12 saved in stack frame, now saved SRR2
- * CR saved in stack frame, CR0.EQ = !SRR3.PR
- * LR, DEAR, ESR in stack frame
- * r1 saved in stack frame, now virt stack/excframe pointer
- * r0, r3-r8 saved in stack frame
- */
-
-/*
- * Exception vectors.
- */
-#define START_EXCEPTION(n, label) \
- . = n; \
-label:
-
-#define EXCEPTION(n, label, hdlr, xfer) \
- START_EXCEPTION(n, label); \
- NORMAL_EXCEPTION_PROLOG; \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- xfer(n, hdlr)
-
-#define CRITICAL_EXCEPTION(n, label, hdlr) \
- START_EXCEPTION(n, label); \
- CRITICAL_EXCEPTION_PROLOG; \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
- NOCOPY, crit_transfer_to_handler, \
- ret_from_crit_exc)
-
-#define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret) \
- li r10,trap; \
- stw r10,TRAP(r11); \
- lis r10,msr@h; \
- ori r10,r10,msr@l; \
- copyee(r10, r9); \
- bl tfer; \
- .long hdlr; \
- .long ret
-
-#define COPY_EE(d, s) rlwimi d,s,0,16,16
-#define NOCOPY(d, s)
-
-#define EXC_XFER_STD(n, hdlr) \
- EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \
- ret_from_except_full)
-
-#define EXC_XFER_LITE(n, hdlr) \
- EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \
- ret_from_except)
-
-#define EXC_XFER_EE(n, hdlr) \
- EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \
- ret_from_except_full)
-
-#define EXC_XFER_EE_LITE(n, hdlr) \
- EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \
- ret_from_except)
-
-
-/*
- * 0x0100 - Critical Interrupt Exception
- */
- CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception)
-
-/*
- * 0x0200 - Machine Check Exception
- */
- CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-
-/*
- * 0x0300 - Data Storage Exception
- * This happens for just a few reasons. U0 set (but we don't do that),
- * or zone protection fault (user violation, write to protected page).
- * If this is just an update of modified status, we do that quickly
- * and exit. Otherwise, we call heavywight functions to do the work.
- */
- START_EXCEPTION(0x0300, DataStorage)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
-#ifdef CONFIG_403GCX
- stw r12, 0(r0)
- stw r9, 4(r0)
- mfcr r11
- mfspr r12, SPRN_PID
- stw r11, 8(r0)
- stw r12, 12(r0)
-#else
- mtspr SPRN_SPRG4, r12
- mtspr SPRN_SPRG5, r9
- mfcr r11
- mfspr r12, SPRN_PID
- mtspr SPRN_SPRG7, r11
- mtspr SPRN_SPRG6, r12
-#endif
-
- /* First, check if it was a zone fault (which means a user
- * tried to access a kernel or read-protected page - always
- * a SEGV). All other faults here must be stores, so no
- * need to check ESR_DST as well. */
- mfspr r10, SPRN_ESR
- andis. r10, r10, ESR_DIZ@h
- bne 2f
-
- mfspr r10, SPRN_DEAR /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- cmplw r10, r11
- blt+ 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
- li r9, 0
- mtspr SPRN_PID, r9 /* TLB will have 0 TID */
- b 4f
-
- /* Get the PGD for the current thread.
- */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-4:
- tophys(r11, r11)
- rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
- lwz r11, 0(r11) /* Get L1 entry */
- rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
- lwz r11, 0(r12) /* Get Linux PTE */
-
- andi. r9, r11, _PAGE_RW /* Is it writeable? */
- beq 2f /* Bail if not */
-
- /* Update 'changed'.
- */
- ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
- stw r11, 0(r12) /* Update Linux page table */
-
- /* Most of the Linux PTE is ready to load into the TLB LO.
- * We set ZSEL, where only the LS-bit determines user access.
- * We set execute, because we don't have the granularity to
- * properly set this at the page level (Linux problem).
- * If shared is set, we cause a zero PID->TID load.
- * Many of these bits are software only. Bits we don't set
- * here we (properly should) assume have the appropriate value.
- */
- li r12, 0x0ce2
- andc r11, r11, r12 /* Make sure 20, 21 are zero */
-
- /* find the TLB index that caused the fault. It has to be here.
- */
- tlbsx r9, 0, r10
-
- tlbwe r11, r9, TLB_DATA /* Load TLB LO */
-
- /* Done...restore registers and get out of here.
- */
-#ifdef CONFIG_403GCX
- lwz r12, 12(r0)
- lwz r11, 8(r0)
- mtspr SPRN_PID, r12
- mtcr r11
- lwz r9, 4(r0)
- lwz r12, 0(r0)
-#else
- mfspr r12, SPRN_SPRG6
- mfspr r11, SPRN_SPRG7
- mtspr SPRN_PID, r12
- mtcr r11
- mfspr r9, SPRN_SPRG5
- mfspr r12, SPRN_SPRG4
-#endif
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- PPC405_ERR77_SYNC
- rfi /* Should sync shadow TLBs */
- b . /* prevent prefetch past rfi */
-
-2:
- /* The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
-#ifdef CONFIG_403GCX
- lwz r12, 12(r0)
- lwz r11, 8(r0)
- mtspr SPRN_PID, r12
- mtcr r11
- lwz r9, 4(r0)
- lwz r12, 0(r0)
-#else
- mfspr r12, SPRN_SPRG6
- mfspr r11, SPRN_SPRG7
- mtspr SPRN_PID, r12
- mtcr r11
- mfspr r9, SPRN_SPRG5
- mfspr r12, SPRN_SPRG4
-#endif
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b DataAccess
-
-/*
- * 0x0400 - Instruction Storage Exception
- * This is caused by a fetch from non-execute or guarded pages.
- */
- START_EXCEPTION(0x0400, InstructionAccess)
- NORMAL_EXCEPTION_PROLOG
- mr r4,r12 /* Pass SRR0 as arg2 */
- li r5,0 /* Pass zero as arg3 */
- EXC_XFER_EE_LITE(0x400, handle_page_fault)
-
-/* 0x0500 - External Interrupt Exception */
- EXCEPTION(0x0500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
-
-/* 0x0600 - Alignment Exception */
- START_EXCEPTION(0x0600, Alignment)
- NORMAL_EXCEPTION_PROLOG
- mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */
- stw r4,_DEAR(r11)
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_EE(0x600, alignment_exception)
-
-/* 0x0700 - Program Exception */
- START_EXCEPTION(0x0700, ProgramCheck)
- NORMAL_EXCEPTION_PROLOG
- mfspr r4,SPRN_ESR /* Grab the ESR and save it */
- stw r4,_ESR(r11)
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_STD(0x700, program_check_exception)
-
- EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE)
-
-/* 0x0C00 - System Call Exception */
- START_EXCEPTION(0x0C00, SystemCall)
- NORMAL_EXCEPTION_PROLOG
- EXC_XFER_EE_LITE(0xc00, DoSyscall)
-
- EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE)
-
-/* 0x1000 - Programmable Interval Timer (PIT) Exception */
- START_EXCEPTION(0x1000, Decrementer)
- NORMAL_EXCEPTION_PROLOG
- lis r0,TSR_PIS@h
- mtspr SPRN_TSR,r0 /* Clear the PIT exception */
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_LITE(0x1000, timer_interrupt)
-
-#if 0
-/* NOTE:
- * FIT and WDT handlers are not implemented yet.
- */
-
-/* 0x1010 - Fixed Interval Timer (FIT) Exception
-*/
- STND_EXCEPTION(0x1010, FITException, unknown_exception)
-
-/* 0x1020 - Watchdog Timer (WDT) Exception
-*/
-#ifdef CONFIG_BOOKE_WDT
- CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
-#else
- CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception)
-#endif
-#endif
-
-/* 0x1100 - Data TLB Miss Exception
- * As the name implies, translation is not in the MMU, so search the
- * page tables and fix it. The only purpose of this function is to
- * load TLB entries from the page table if they exist.
- */
- START_EXCEPTION(0x1100, DTLBMiss)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
-#ifdef CONFIG_403GCX
- stw r12, 0(r0)
- stw r9, 4(r0)
- mfcr r11
- mfspr r12, SPRN_PID
- stw r11, 8(r0)
- stw r12, 12(r0)
-#else
- mtspr SPRN_SPRG4, r12
- mtspr SPRN_SPRG5, r9
- mfcr r11
- mfspr r12, SPRN_PID
- mtspr SPRN_SPRG7, r11
- mtspr SPRN_SPRG6, r12
-#endif
- mfspr r10, SPRN_DEAR /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- cmplw r10, r11
- blt+ 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
- li r9, 0
- mtspr SPRN_PID, r9 /* TLB will have 0 TID */
- b 4f
-
- /* Get the PGD for the current thread.
- */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-4:
- tophys(r11, r11)
- rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
- lwz r12, 0(r11) /* Get L1 entry */
- andi. r9, r12, _PMD_PRESENT /* Check if it points to a PTE page */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
- lwz r11, 0(r12) /* Get Linux PTE */
- andi. r9, r11, _PAGE_PRESENT
- beq 5f
-
- ori r11, r11, _PAGE_ACCESSED
- stw r11, 0(r12)
-
- /* Create TLB tag. This is the faulting address plus a static
- * set of bits. These are size, valid, E, U0.
- */
- li r12, 0x00c0
- rlwimi r10, r12, 0, 20, 31
-
- b finish_tlb_load
-
-2: /* Check for possible large-page pmd entry */
- rlwinm. r9, r12, 2, 22, 24
- beq 5f
-
- /* Create TLB tag. This is the faulting address, plus a static
- * set of bits (valid, E, U0) plus the size from the PMD.
- */
- ori r9, r9, 0x40
- rlwimi r10, r9, 0, 20, 31
- mr r11, r12
-
- b finish_tlb_load
-
-5:
- /* The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
-#ifdef CONFIG_403GCX
- lwz r12, 12(r0)
- lwz r11, 8(r0)
- mtspr SPRN_PID, r12
- mtcr r11
- lwz r9, 4(r0)
- lwz r12, 0(r0)
-#else
- mfspr r12, SPRN_SPRG6
- mfspr r11, SPRN_SPRG7
- mtspr SPRN_PID, r12
- mtcr r11
- mfspr r9, SPRN_SPRG5
- mfspr r12, SPRN_SPRG4
-#endif
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b DataAccess
-
-/* 0x1200 - Instruction TLB Miss Exception
- * Nearly the same as above, except we get our information from different
- * registers and bailout to a different point.
- */
- START_EXCEPTION(0x1200, ITLBMiss)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
-#ifdef CONFIG_403GCX
- stw r12, 0(r0)
- stw r9, 4(r0)
- mfcr r11
- mfspr r12, SPRN_PID
- stw r11, 8(r0)
- stw r12, 12(r0)
-#else
- mtspr SPRN_SPRG4, r12
- mtspr SPRN_SPRG5, r9
- mfcr r11
- mfspr r12, SPRN_PID
- mtspr SPRN_SPRG7, r11
- mtspr SPRN_SPRG6, r12
-#endif
- mfspr r10, SPRN_SRR0 /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- cmplw r10, r11
- blt+ 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
- li r9, 0
- mtspr SPRN_PID, r9 /* TLB will have 0 TID */
- b 4f
-
- /* Get the PGD for the current thread.
- */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-4:
- tophys(r11, r11)
- rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
- lwz r12, 0(r11) /* Get L1 entry */
- andi. r9, r12, _PMD_PRESENT /* Check if it points to a PTE page */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
- lwz r11, 0(r12) /* Get Linux PTE */
- andi. r9, r11, _PAGE_PRESENT
- beq 5f
-
- ori r11, r11, _PAGE_ACCESSED
- stw r11, 0(r12)
-
- /* Create TLB tag. This is the faulting address plus a static
- * set of bits. These are size, valid, E, U0.
- */
- li r12, 0x00c0
- rlwimi r10, r12, 0, 20, 31
-
- b finish_tlb_load
-
-2: /* Check for possible large-page pmd entry */
- rlwinm. r9, r12, 2, 22, 24
- beq 5f
-
- /* Create TLB tag. This is the faulting address, plus a static
- * set of bits (valid, E, U0) plus the size from the PMD.
- */
- ori r9, r9, 0x40
- rlwimi r10, r9, 0, 20, 31
- mr r11, r12
-
- b finish_tlb_load
-
-5:
- /* The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
-#ifdef CONFIG_403GCX
- lwz r12, 12(r0)
- lwz r11, 8(r0)
- mtspr SPRN_PID, r12
- mtcr r11
- lwz r9, 4(r0)
- lwz r12, 0(r0)
-#else
- mfspr r12, SPRN_SPRG6
- mfspr r11, SPRN_SPRG7
- mtspr SPRN_PID, r12
- mtcr r11
- mfspr r9, SPRN_SPRG5
- mfspr r12, SPRN_SPRG4
-#endif
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b InstructionAccess
-
- EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
-#ifdef CONFIG_IBM405_ERR51
- /* 405GP errata 51 */
- START_EXCEPTION(0x1700, Trap_17)
- b DTLBMiss
-#else
- EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
-#endif
- EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE)
-
-/* Check for a single step debug exception while in an exception
- * handler before state has been saved. This is to catch the case
- * where an instruction that we are trying to single step causes
- * an exception (eg ITLB/DTLB miss) and thus the first instruction of
- * the exception handler generates a single step debug exception.
- *
- * If we get a debug trap on the first instruction of an exception handler,
- * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is
- * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR).
- * The exception handler was handling a non-critical interrupt, so it will
- * save (and later restore) the MSR via SPRN_SRR1, which will still have
- * the MSR_DE bit set.
- */
- /* 0x2000 - Debug Exception */
- START_EXCEPTION(0x2000, DebugTrap)
- CRITICAL_EXCEPTION_PROLOG
-
- /*
- * If this is a single step or branch-taken exception in an
- * exception entry sequence, it was probably meant to apply to
- * the code where the exception occurred (since exception entry
- * doesn't turn off DE automatically). We simulate the effect
- * of turning off DE on entry to an exception handler by turning
- * off DE in the SRR3 value and clearing the debug status.
- */
- mfspr r10,SPRN_DBSR /* check single-step/branch taken */
- andis. r10,r10,DBSR_IC@h
- beq+ 2f
-
- andi. r10,r9,MSR_IR|MSR_PR /* check supervisor + MMU off */
- beq 1f /* branch and fix it up */
-
- mfspr r10,SPRN_SRR2 /* Faulting instruction address */
- cmplwi r10,0x2100
- bgt+ 2f /* address above exception vectors */
-
- /* here it looks like we got an inappropriate debug exception. */
-1: rlwinm r9,r9,0,~MSR_DE /* clear DE in the SRR3 value */
- lis r10,DBSR_IC@h /* clear the IC event */
- mtspr SPRN_DBSR,r10
- /* restore state and get out */
- lwz r10,_CCR(r11)
- lwz r0,GPR0(r11)
- lwz r1,GPR1(r11)
- mtcrf 0x80,r10
- mtspr SPRN_SRR2,r12
- mtspr SPRN_SRR3,r9
- lwz r9,GPR9(r11)
- lwz r12,GPR12(r11)
- lwz r10,crit_r10@l(0)
- lwz r11,crit_r11@l(0)
- PPC405_ERR77_SYNC
- rfci
- b .
-
- /* continue normal handling for a critical exception... */
-2: mfspr r4,SPRN_DBSR
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_TEMPLATE(DebugException, 0x2002, \
- (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
- NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
-
-/*
- * The other Data TLB exceptions bail out to this point
- * if they can't resolve the lightweight TLB fault.
- */
-DataAccess:
- NORMAL_EXCEPTION_PROLOG
- mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
- stw r5,_ESR(r11)
- mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
- EXC_XFER_EE_LITE(0x300, handle_page_fault)
-
-/* Other PowerPC processors, namely those derived from the 6xx-series
- * have vectors from 0x2100 through 0x2F00 defined, but marked as reserved.
- * However, for the 4xx-series processors these are neither defined nor
- * reserved.
- */
-
- /* Damn, I came up one instruction too many to fit into the
- * exception space :-). Both the instruction and data TLB
- * miss get to this point to load the TLB.
- * r10 - TLB_TAG value
- * r11 - Linux PTE
- * r12, r9 - avilable to use
- * PID - loaded with proper value when we get here
- * Upon exit, we reload everything and RFI.
- * Actually, it will fit now, but oh well.....a common place
- * to load the TLB.
- */
-tlb_4xx_index:
- .long 0
-finish_tlb_load:
- /* load the next available TLB index.
- */
- lwz r9, tlb_4xx_index@l(0)
- addi r9, r9, 1
- andi. r9, r9, (PPC4XX_TLB_SIZE-1)
- stw r9, tlb_4xx_index@l(0)
-
-6:
- /*
- * Clear out the software-only bits in the PTE to generate the
- * TLB_DATA value. These are the bottom 2 bits of the RPM, the
- * top 3 bits of the zone field, and M.
- */
- li r12, 0x0ce2
- andc r11, r11, r12
-
- tlbwe r11, r9, TLB_DATA /* Load TLB LO */
- tlbwe r10, r9, TLB_TAG /* Load TLB HI */
-
- /* Done...restore registers and get out of here.
- */
-#ifdef CONFIG_403GCX
- lwz r12, 12(r0)
- lwz r11, 8(r0)
- mtspr SPRN_PID, r12
- mtcr r11
- lwz r9, 4(r0)
- lwz r12, 0(r0)
-#else
- mfspr r12, SPRN_SPRG6
- mfspr r11, SPRN_SPRG7
- mtspr SPRN_PID, r12
- mtcr r11
- mfspr r9, SPRN_SPRG5
- mfspr r12, SPRN_SPRG4
-#endif
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- PPC405_ERR77_SYNC
- rfi /* Should sync shadow TLBs */
- b . /* prevent prefetch past rfi */
-
-/* extern void giveup_fpu(struct task_struct *prev)
- *
- * The PowerPC 4xx family of processors do not have an FPU, so this just
- * returns.
- */
-_GLOBAL(giveup_fpu)
- blr
-
-/* This is where the main kernel code starts.
- */
-start_here:
-
- /* ptr to current */
- lis r2,init_task@h
- ori r2,r2,init_task@l
-
- /* ptr to phys current thread */
- tophys(r4,r2)
- addi r4,r4,THREAD /* init task's THREAD */
- mtspr SPRN_SPRG3,r4
-
- /* stack */
- lis r1,init_thread_union@ha
- addi r1,r1,init_thread_union@l
- li r0,0
- stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
-
- bl early_init /* We have to do this with MMU on */
-
-/*
- * Decide what sort of machine this is and initialize the MMU.
- */
- mr r3,r31
- mr r4,r30
- mr r5,r29
- mr r6,r28
- mr r7,r27
- bl machine_init
- bl MMU_init
-
-/* Go back to running unmapped so we can load up new values
- * and change to using our exception vectors.
- * On the 4xx, all we have to do is invalidate the TLB to clear
- * the old 16M byte TLB mappings.
- */
- lis r4,2f@h
- ori r4,r4,2f@l
- tophys(r4,r4)
- lis r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@h
- ori r3,r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@l
- mtspr SPRN_SRR0,r4
- mtspr SPRN_SRR1,r3
- rfi
- b . /* prevent prefetch past rfi */
-
-/* Load up the kernel context */
-2:
- sync /* Flush to memory before changing TLB */
- tlbia
- isync /* Flush shadow TLBs */
-
- /* set up the PTE pointers for the Abatron bdiGDB.
- */
- lis r6, swapper_pg_dir@h
- ori r6, r6, swapper_pg_dir@l
- lis r5, abatron_pteptrs@h
- ori r5, r5, abatron_pteptrs@l
- stw r5, 0xf0(r0) /* Must match your Abatron config file */
- tophys(r5,r5)
- stw r6, 0(r5)
-
-/* Now turn on the MMU for real! */
- lis r4,MSR_KERNEL@h
- ori r4,r4,MSR_KERNEL@l
- lis r3,start_kernel@h
- ori r3,r3,start_kernel@l
- mtspr SPRN_SRR0,r3
- mtspr SPRN_SRR1,r4
- rfi /* enable MMU and jump to start_kernel */
- b . /* prevent prefetch past rfi */
-
-/* Set up the initial MMU state so we can do the first level of
- * kernel initialization. This maps the first 16 MBytes of memory 1:1
- * virtual to physical and more importantly sets the cache mode.
- */
-initial_mmu:
- tlbia /* Invalidate all TLB entries */
- isync
-
- /* We should still be executing code at physical address 0x0000xxxx
- * at this point. However, start_here is at virtual address
- * 0xC000xxxx. So, set up a TLB mapping to cover this once
- * translation is enabled.
- */
-
- lis r3,KERNELBASE@h /* Load the kernel virtual address */
- ori r3,r3,KERNELBASE@l
- tophys(r4,r3) /* Load the kernel physical address */
-
- iccci r0,r3 /* Invalidate the i-cache before use */
-
- /* Load the kernel PID.
- */
- li r0,0
- mtspr SPRN_PID,r0
- sync
-
- /* Configure and load two entries into TLB slots 62 and 63.
- * In case we are pinning TLBs, these are reserved in by the
- * other TLB functions. If not reserving, then it doesn't
- * matter where they are loaded.
- */
- clrrwi r4,r4,10 /* Mask off the real page number */
- ori r4,r4,(TLB_WR | TLB_EX) /* Set the write and execute bits */
-
- clrrwi r3,r3,10 /* Mask off the effective page number */
- ori r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M))
-
- li r0,63 /* TLB slot 63 */
-
- tlbwe r4,r0,TLB_DATA /* Load the data portion of the entry */
- tlbwe r3,r0,TLB_TAG /* Load the tag portion of the entry */
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(SERIAL_DEBUG_IO_BASE)
-
- /* Load a TLB entry for the UART, so that ppc4xx_progress() can use
- * the UARTs nice and early. We use a 4k real==virtual mapping. */
-
- lis r3,SERIAL_DEBUG_IO_BASE@h
- ori r3,r3,SERIAL_DEBUG_IO_BASE@l
- mr r4,r3
- clrrwi r4,r4,12
- ori r4,r4,(TLB_WR|TLB_I|TLB_M|TLB_G)
-
- clrrwi r3,r3,12
- ori r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_4K))
-
- li r0,0 /* TLB slot 0 */
- tlbwe r4,r0,TLB_DATA
- tlbwe r3,r0,TLB_TAG
-#endif /* CONFIG_SERIAL_DEBUG_TEXT && SERIAL_DEBUG_IO_BASE */
-
- isync
-
- /* Establish the exception vector base
- */
- lis r4,KERNELBASE@h /* EVPR only uses the high 16-bits */
- tophys(r0,r4) /* Use the physical address */
- mtspr SPRN_EVPR,r0
-
- blr
-
-_GLOBAL(abort)
- mfspr r13,SPRN_DBCR0
- oris r13,r13,DBCR0_RST_SYSTEM@h
- mtspr SPRN_DBCR0,r13
-
-_GLOBAL(set_context)
-
-#ifdef CONFIG_BDI_SWITCH
- /* Context switch the PTE pointer for the Abatron BDI2000.
- * The PGDIR is the second parameter.
- */
- lis r5, KERNELBASE@h
- lwz r5, 0xf0(r5)
- stw r4, 0x4(r5)
-#endif
- sync
- mtspr SPRN_PID,r3
- isync /* Need an isync to flush shadow */
- /* TLBs after changing PID */
- blr
-
-/* We put a few things here that have to be page-aligned. This stuff
- * goes at the beginning of the data segment, which is page-aligned.
- */
- .data
- .align 12
- .globl sdata
-sdata:
- .globl empty_zero_page
-empty_zero_page:
- .space 4096
- .globl swapper_pg_dir
-swapper_pg_dir:
- .space 4096
-
-
-/* Stack for handling critical exceptions from kernel mode */
- .section .bss
- .align 12
-exception_stack_bottom:
- .space 4096
-critical_stack_top:
- .globl exception_stack_top
-exception_stack_top:
-
-/* This space gets a copy of optional info passed to us by the bootstrap
- * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
- .globl cmd_line
-cmd_line:
- .space 512
-
-/* Room for two PTE pointers, usually the kernel and current user pointers
- * to their respective root page table.
- */
-abatron_pteptrs:
- .space 8
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
deleted file mode 100644
index 321bda2..0000000
--- a/arch/ppc/kernel/head_8xx.S
+++ /dev/null
@@ -1,959 +0,0 @@
-/*
- * PowerPC version
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
- * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
- * Low-level exception handlers and MMU support
- * rewritten by Paul Mackerras.
- * Copyright (C) 1996 Paul Mackerras.
- * MPC8xx modifications by Dan Malek
- * Copyright (C) 1997 Dan Malek (dmalek@jlc.net).
- *
- * This file contains low-level support and setup for PowerPC 8xx
- * embedded processors, including trap and interrupt dispatch.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/cache.h>
-#include <asm/pgtable.h>
-#include <asm/cputable.h>
-#include <asm/thread_info.h>
-#include <asm/ppc_asm.h>
-#include <asm/asm-offsets.h>
-
-/* Macro to make the code more readable. */
-#ifdef CONFIG_8xx_CPU6
-#define DO_8xx_CPU6(val, reg) \
- li reg, val; \
- stw reg, 12(r0); \
- lwz reg, 12(r0);
-#else
-#define DO_8xx_CPU6(val, reg)
-#endif
- .text
- .globl _stext
-_stext:
- .text
- .globl _start
-_start:
-
-/* MPC8xx
- * This port was done on an MBX board with an 860. Right now I only
- * support an ELF compressed (zImage) boot from EPPC-Bug because the
- * code there loads up some registers before calling us:
- * r3: ptr to board info data
- * r4: initrd_start or if no initrd then 0
- * r5: initrd_end - unused if r4 is 0
- * r6: Start of command line string
- * r7: End of command line string
- *
- * I decided to use conditional compilation instead of checking PVR and
- * adding more processor specific branches around code I don't need.
- * Since this is an embedded processor, I also appreciate any memory
- * savings I can get.
- *
- * The MPC8xx does not have any BATs, but it supports large page sizes.
- * We first initialize the MMU to support 8M byte pages, then load one
- * entry into each of the instruction and data TLBs to map the first
- * 8M 1:1. I also mapped an additional I/O space 1:1 so we can get to
- * the "internal" processor registers before MMU_init is called.
- *
- * The TLB code currently contains a major hack. Since I use the condition
- * code register, I have to save and restore it. I am out of registers, so
- * I just store it in memory location 0 (the TLB handlers are not reentrant).
- * To avoid making any decisions, I need to use the "segment" valid bit
- * in the first level table, but that would require many changes to the
- * Linux page directory/table functions that I don't want to do right now.
- *
- * I used to use SPRG2 for a temporary register in the TLB handler, but it
- * has since been put to other uses. I now use a hack to save a register
- * and the CCR at memory location 0.....Someday I'll fix this.....
- * -- Dan
- */
- .globl __start
-__start:
- mr r31,r3 /* save parameters */
- mr r30,r4
- mr r29,r5
- mr r28,r6
- mr r27,r7
-
- /* We have to turn on the MMU right away so we get cache modes
- * set correctly.
- */
- bl initial_mmu
-
-/* We now have the lower 8 Meg mapped into TLB entries, and the caches
- * ready to work.
- */
-
-turn_on_mmu:
- mfmsr r0
- ori r0,r0,MSR_DR|MSR_IR
- mtspr SPRN_SRR1,r0
- lis r0,start_here@h
- ori r0,r0,start_here@l
- mtspr SPRN_SRR0,r0
- SYNC
- rfi /* enables MMU */
-
-/*
- * Exception entry code. This code runs with address translation
- * turned off, i.e. using physical addresses.
- * We assume sprg3 has the physical address of the current
- * task's thread_struct.
- */
-#define EXCEPTION_PROLOG \
- mtspr SPRN_SPRG0,r10; \
- mtspr SPRN_SPRG1,r11; \
- mfcr r10; \
- EXCEPTION_PROLOG_1; \
- EXCEPTION_PROLOG_2
-
-#define EXCEPTION_PROLOG_1 \
- mfspr r11,SPRN_SRR1; /* check whether user or kernel */ \
- andi. r11,r11,MSR_PR; \
- tophys(r11,r1); /* use tophys(r1) if kernel */ \
- beq 1f; \
- mfspr r11,SPRN_SPRG3; \
- lwz r11,THREAD_INFO-THREAD(r11); \
- addi r11,r11,THREAD_SIZE; \
- tophys(r11,r11); \
-1: subi r11,r11,INT_FRAME_SIZE /* alloc exc. frame */
-
-
-#define EXCEPTION_PROLOG_2 \
- CLR_TOP32(r11); \
- stw r10,_CCR(r11); /* save registers */ \
- stw r12,GPR12(r11); \
- stw r9,GPR9(r11); \
- mfspr r10,SPRN_SPRG0; \
- stw r10,GPR10(r11); \
- mfspr r12,SPRN_SPRG1; \
- stw r12,GPR11(r11); \
- mflr r10; \
- stw r10,_LINK(r11); \
- mfspr r12,SPRN_SRR0; \
- mfspr r9,SPRN_SRR1; \
- stw r1,GPR1(r11); \
- stw r1,0(r11); \
- tovirt(r1,r11); /* set new kernel sp */ \
- li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
- MTMSRD(r10); /* (except for mach check in rtas) */ \
- stw r0,GPR0(r11); \
- SAVE_4GPRS(3, r11); \
- SAVE_2GPRS(7, r11)
-
-/*
- * Note: code which follows this uses cr0.eq (set if from kernel),
- * r11, r12 (SRR0), and r9 (SRR1).
- *
- * Note2: once we have set r1 we are in a position to take exceptions
- * again, and we could thus set MSR:RI at that point.
- */
-
-/*
- * Exception vectors.
- */
-#define EXCEPTION(n, label, hdlr, xfer) \
- . = n; \
-label: \
- EXCEPTION_PROLOG; \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- xfer(n, hdlr)
-
-#define EXC_XFER_TEMPLATE(n, hdlr, trap, copyee, tfer, ret) \
- li r10,trap; \
- stw r10,TRAP(r11); \
- li r10,MSR_KERNEL; \
- copyee(r10, r9); \
- bl tfer; \
-i##n: \
- .long hdlr; \
- .long ret
-
-#define COPY_EE(d, s) rlwimi d,s,0,16,16
-#define NOCOPY(d, s)
-
-#define EXC_XFER_STD(n, hdlr) \
- EXC_XFER_TEMPLATE(n, hdlr, n, NOCOPY, transfer_to_handler_full, \
- ret_from_except_full)
-
-#define EXC_XFER_LITE(n, hdlr) \
- EXC_XFER_TEMPLATE(n, hdlr, n+1, NOCOPY, transfer_to_handler, \
- ret_from_except)
-
-#define EXC_XFER_EE(n, hdlr) \
- EXC_XFER_TEMPLATE(n, hdlr, n, COPY_EE, transfer_to_handler_full, \
- ret_from_except_full)
-
-#define EXC_XFER_EE_LITE(n, hdlr) \
- EXC_XFER_TEMPLATE(n, hdlr, n+1, COPY_EE, transfer_to_handler, \
- ret_from_except)
-
-/* System reset */
- EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
-
-/* Machine check */
- . = 0x200
-MachineCheck:
- EXCEPTION_PROLOG
- mfspr r4,SPRN_DAR
- stw r4,_DAR(r11)
- mfspr r5,SPRN_DSISR
- stw r5,_DSISR(r11)
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_STD(0x200, machine_check_exception)
-
-/* Data access exception.
- * This is "never generated" by the MPC8xx. We jump to it for other
- * translation errors.
- */
- . = 0x300
-DataAccess:
- EXCEPTION_PROLOG
- mfspr r10,SPRN_DSISR
- stw r10,_DSISR(r11)
- mr r5,r10
- mfspr r4,SPRN_DAR
- EXC_XFER_EE_LITE(0x300, handle_page_fault)
-
-/* Instruction access exception.
- * This is "never generated" by the MPC8xx. We jump to it for other
- * translation errors.
- */
- . = 0x400
-InstructionAccess:
- EXCEPTION_PROLOG
- mr r4,r12
- mr r5,r9
- EXC_XFER_EE_LITE(0x400, handle_page_fault)
-
-/* External interrupt */
- EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
-
-/* Alignment exception */
- . = 0x600
-Alignment:
- EXCEPTION_PROLOG
- mfspr r4,SPRN_DAR
- stw r4,_DAR(r11)
- mfspr r5,SPRN_DSISR
- stw r5,_DSISR(r11)
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_EE(0x600, alignment_exception)
-
-/* Program check exception */
- EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
-
-/* No FPU on MPC8xx. This exception is not supposed to happen.
-*/
- EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD)
-
-/* Decrementer */
- EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
-
- EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
-
-/* System call */
- . = 0xc00
-SystemCall:
- EXCEPTION_PROLOG
- EXC_XFER_EE_LITE(0xc00, DoSyscall)
-
-/* Single step - not used on 601 */
- EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
- EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE)
-
-/* On the MPC8xx, this is a software emulation interrupt. It occurs
- * for all unimplemented and illegal instructions.
- */
- EXCEPTION(0x1000, SoftEmu, SoftwareEmulation, EXC_XFER_STD)
-
- . = 0x1100
-/*
- * For the MPC8xx, this is a software tablewalk to load the instruction
- * TLB. It is modelled after the example in the Motorola manual. The task
- * switch loads the M_TWB register with the pointer to the first level table.
- * If we discover there is no second level table (value is zero) or if there
- * is an invalid pte, we load that into the TLB, which causes another fault
- * into the TLB Error interrupt where we can handle such problems.
- * We have to use the MD_xxx registers for the tablewalk because the
- * equivalent MI_xxx registers only perform the attribute functions.
- */
-InstructionTLBMiss:
-#ifdef CONFIG_8xx_CPU6
- stw r3, 8(r0)
-#endif
- DO_8xx_CPU6(0x3f80, r3)
- mtspr SPRN_M_TW, r10 /* Save a couple of working registers */
- mfcr r10
- stw r10, 0(r0)
- stw r11, 4(r0)
- mfspr r10, SPRN_SRR0 /* Get effective address of fault */
- DO_8xx_CPU6(0x3780, r3)
- mtspr SPRN_MD_EPN, r10 /* Have to use MD_EPN for walk, MI_EPN can't */
- mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- andi. r11, r10, 0x0800 /* Address >= 0x80000000 */
- beq 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
- rlwimi r10, r11, 0, 2, 19
-3:
- lwz r11, 0(r10) /* Get the level 1 entry */
- rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
- beq 2f /* If zero, don't try to find a pte */
-
- /* We have a pte table, so load the MI_TWC with the attributes
- * for this "segment."
- */
- ori r11,r11,1 /* Set valid bit */
- DO_8xx_CPU6(0x2b80, r3)
- mtspr SPRN_MI_TWC, r11 /* Set segment attributes */
- DO_8xx_CPU6(0x3b80, r3)
- mtspr SPRN_MD_TWC, r11 /* Load pte table base address */
- mfspr r11, SPRN_MD_TWC /* ....and get the pte address */
- lwz r10, 0(r11) /* Get the pte */
-
-#ifdef CONFIG_SWAP
- /* do not set the _PAGE_ACCESSED bit of a non-present page */
- andi. r11, r10, _PAGE_PRESENT
- beq 4f
- ori r10, r10, _PAGE_ACCESSED
- mfspr r11, SPRN_MD_TWC /* get the pte address again */
- stw r10, 0(r11)
-4:
-#else
- ori r10, r10, _PAGE_ACCESSED
- stw r10, 0(r11)
-#endif
-
- /* The Linux PTE won't go exactly into the MMU TLB.
- * Software indicator bits 21, 22 and 28 must be clear.
- * Software indicator bits 24, 25, 26, and 27 must be
- * set. All other Linux PTE bits control the behavior
- * of the MMU.
- */
-2: li r11, 0x00f0
- rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */
- DO_8xx_CPU6(0x2d80, r3)
- mtspr SPRN_MI_RPN, r10 /* Update TLB entry */
-
- mfspr r10, SPRN_M_TW /* Restore registers */
- lwz r11, 0(r0)
- mtcr r11
- lwz r11, 4(r0)
-#ifdef CONFIG_8xx_CPU6
- lwz r3, 8(r0)
-#endif
- rfi
-
- . = 0x1200
-DataStoreTLBMiss:
- stw r3, 8(r0)
- DO_8xx_CPU6(0x3f80, r3)
- mtspr SPRN_M_TW, r10 /* Save a couple of working registers */
- mfcr r10
- stw r10, 0(r0)
- stw r11, 4(r0)
- mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- andi. r11, r10, 0x0800
- beq 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
- rlwimi r10, r11, 0, 2, 19
- stw r12, 16(r0)
- b LoadLargeDTLB
-3:
- lwz r11, 0(r10) /* Get the level 1 entry */
- rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
- beq 2f /* If zero, don't try to find a pte */
-
- /* We have a pte table, so load fetch the pte from the table.
- */
- ori r11, r11, 1 /* Set valid bit in physical L2 page */
- DO_8xx_CPU6(0x3b80, r3)
- mtspr SPRN_MD_TWC, r11 /* Load pte table base address */
- mfspr r10, SPRN_MD_TWC /* ....and get the pte address */
- lwz r10, 0(r10) /* Get the pte */
-
- /* Insert the Guarded flag into the TWC from the Linux PTE.
- * It is bit 27 of both the Linux PTE and the TWC (at least
- * I got that right :-). It will be better when we can put
- * this into the Linux pgd/pmd and load it in the operation
- * above.
- */
- rlwimi r11, r10, 0, 27, 27
- DO_8xx_CPU6(0x3b80, r3)
- mtspr SPRN_MD_TWC, r11
-
-#ifdef CONFIG_SWAP
- /* do not set the _PAGE_ACCESSED bit of a non-present page */
- andi. r11, r10, _PAGE_PRESENT
- beq 4f
- ori r10, r10, _PAGE_ACCESSED
-4:
- /* and update pte in table */
-#else
- ori r10, r10, _PAGE_ACCESSED
-#endif
- mfspr r11, SPRN_MD_TWC /* get the pte address again */
- stw r10, 0(r11)
-
- /* The Linux PTE won't go exactly into the MMU TLB.
- * Software indicator bits 21, 22 and 28 must be clear.
- * Software indicator bits 24, 25, 26, and 27 must be
- * set. All other Linux PTE bits control the behavior
- * of the MMU.
- */
-2: li r11, 0x00f0
- rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */
- DO_8xx_CPU6(0x3d80, r3)
- mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
-
- mfspr r10, SPRN_M_TW /* Restore registers */
- lwz r11, 0(r0)
- mtcr r11
- lwz r11, 4(r0)
- lwz r3, 8(r0)
- rfi
-
-/* This is an instruction TLB error on the MPC8xx. This could be due
- * to many reasons, such as executing guarded memory or illegal instruction
- * addresses. There is nothing to do but handle a big time error fault.
- */
- . = 0x1300
-InstructionTLBError:
- b InstructionAccess
-
-LoadLargeDTLB:
- li r12, 0
- lwz r11, 0(r10) /* Get the level 1 entry */
- rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
- beq 3f /* If zero, don't try to find a pte */
-
- /* We have a pte table, so load fetch the pte from the table.
- */
- ori r11, r11, 1 /* Set valid bit in physical L2 page */
- DO_8xx_CPU6(0x3b80, r3)
- mtspr SPRN_MD_TWC, r11 /* Load pte table base address */
- mfspr r10, SPRN_MD_TWC /* ....and get the pte address */
- lwz r10, 0(r10) /* Get the pte */
-
- /* Insert the Guarded flag into the TWC from the Linux PTE.
- * It is bit 27 of both the Linux PTE and the TWC (at least
- * I got that right :-). It will be better when we can put
- * this into the Linux pgd/pmd and load it in the operation
- * above.
- */
- rlwimi r11, r10, 0, 27, 27
-
- rlwimi r12, r10, 0, 0, 9 /* extract phys. addr */
- mfspr r3, SPRN_MD_EPN
- rlwinm r3, r3, 0, 0, 9 /* extract virtual address */
- tophys(r3, r3)
- cmpw r3, r12 /* only use 8M page if it is a direct
- kernel mapping */
- bne 1f
- ori r11, r11, MD_PS8MEG
- li r12, 1
- b 2f
-1:
- li r12, 0 /* can't use 8MB TLB, so zero r12. */
-2:
- DO_8xx_CPU6(0x3b80, r3)
- mtspr SPRN_MD_TWC, r11
-
- /* The Linux PTE won't go exactly into the MMU TLB.
- * Software indicator bits 21, 22 and 28 must be clear.
- * Software indicator bits 24, 25, 26, and 27 must be
- * set. All other Linux PTE bits control the behavior
- * of the MMU.
- */
-3: li r11, 0x00f0
- rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */
- cmpwi r12, 1
- bne 4f
- ori r10, r10, 0x8
-
- mfspr r12, SPRN_MD_EPN
- lis r3, 0xff80 /* 10-19 must be clear for 8MB TLB */
- ori r3, r3, 0x0fff
- and r12, r3, r12
- DO_8xx_CPU6(0x3780, r3)
- mtspr SPRN_MD_EPN, r12
-
- lis r3, 0xff80 /* 10-19 must be clear for 8MB TLB */
- ori r3, r3, 0x0fff
- and r10, r3, r10
-4:
- DO_8xx_CPU6(0x3d80, r3)
- mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
-
- mfspr r10, SPRN_M_TW /* Restore registers */
- lwz r11, 0(r0)
- mtcr r11
- lwz r11, 4(r0)
-
- lwz r12, 16(r0)
- lwz r3, 8(r0)
- rfi
-
-/* This is the data TLB error on the MPC8xx. This could be due to
- * many reasons, including a dirty update to a pte. We can catch that
- * one here, but anything else is an error. First, we track down the
- * Linux pte. If it is valid, write access is allowed, but the
- * page dirty bit is not set, we will set it and reload the TLB. For
- * any other case, we bail out to a higher level function that can
- * handle it.
- */
- . = 0x1400
-DataTLBError:
-#ifdef CONFIG_8xx_CPU6
- stw r3, 8(r0)
-#endif
- DO_8xx_CPU6(0x3f80, r3)
- mtspr SPRN_M_TW, r10 /* Save a couple of working registers */
- mfcr r10
- stw r10, 0(r0)
- stw r11, 4(r0)
-
- /* First, make sure this was a store operation.
- */
- mfspr r10, SPRN_DSISR
- andis. r11, r10, 0x0200 /* If set, indicates store op */
- beq 2f
-
- /* The EA of a data TLB miss is automatically stored in the MD_EPN
- * register. The EA of a data TLB error is automatically stored in
- * the DAR, but not the MD_EPN register. We must copy the 20 most
- * significant bits of the EA from the DAR to MD_EPN before we
- * start walking the page tables. We also need to copy the CASID
- * value from the M_CASID register.
- * Addendum: The EA of a data TLB error is _supposed_ to be stored
- * in DAR, but it seems that this doesn't happen in some cases, such
- * as when the error is due to a dcbi instruction to a page with a
- * TLB that doesn't have the changed bit set. In such cases, there
- * does not appear to be any way to recover the EA of the error
- * since it is neither in DAR nor MD_EPN. As a workaround, the
- * _PAGE_HWWRITE bit is set for all kernel data pages when the PTEs
- * are initialized in mapin_ram(). This will avoid the problem,
- * assuming we only use the dcbi instruction on kernel addresses.
- */
- mfspr r10, SPRN_DAR
- rlwinm r11, r10, 0, 0, 19
- ori r11, r11, MD_EVALID
- mfspr r10, SPRN_M_CASID
- rlwimi r11, r10, 0, 28, 31
- DO_8xx_CPU6(0x3780, r3)
- mtspr SPRN_MD_EPN, r11
-
- mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- andi. r11, r10, 0x0800
- beq 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
- rlwimi r10, r11, 0, 2, 19
-3:
- lwz r11, 0(r10) /* Get the level 1 entry */
- rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
- beq 2f /* If zero, bail */
-
- /* We have a pte table, so fetch the pte from the table.
- */
- ori r11, r11, 1 /* Set valid bit in physical L2 page */
- DO_8xx_CPU6(0x3b80, r3)
- mtspr SPRN_MD_TWC, r11 /* Load pte table base address */
- mfspr r11, SPRN_MD_TWC /* ....and get the pte address */
- lwz r10, 0(r11) /* Get the pte */
-
- andi. r11, r10, _PAGE_RW /* Is it writeable? */
- beq 2f /* Bail out if not */
-
- /* Update 'changed', among others.
- */
-#ifdef CONFIG_SWAP
- ori r10, r10, _PAGE_DIRTY|_PAGE_HWWRITE
- /* do not set the _PAGE_ACCESSED bit of a non-present page */
- andi. r11, r10, _PAGE_PRESENT
- beq 4f
- ori r10, r10, _PAGE_ACCESSED
-4:
-#else
- ori r10, r10, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
-#endif
- mfspr r11, SPRN_MD_TWC /* Get pte address again */
- stw r10, 0(r11) /* and update pte in table */
-
- /* The Linux PTE won't go exactly into the MMU TLB.
- * Software indicator bits 21, 22 and 28 must be clear.
- * Software indicator bits 24, 25, 26, and 27 must be
- * set. All other Linux PTE bits control the behavior
- * of the MMU.
- */
- li r11, 0x00f0
- rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */
- DO_8xx_CPU6(0x3d80, r3)
- mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
-
- mfspr r10, SPRN_M_TW /* Restore registers */
- lwz r11, 0(r0)
- mtcr r11
- lwz r11, 4(r0)
-#ifdef CONFIG_8xx_CPU6
- lwz r3, 8(r0)
-#endif
- rfi
-2:
- mfspr r10, SPRN_M_TW /* Restore registers */
- lwz r11, 0(r0)
- mtcr r11
- lwz r11, 4(r0)
-#ifdef CONFIG_8xx_CPU6
- lwz r3, 8(r0)
-#endif
- b DataAccess
-
- EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
-
-/* On the MPC8xx, these next four traps are used for development
- * support of breakpoints and such. Someday I will get around to
- * using them.
- */
- EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
- EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
-
- . = 0x2000
-
- .globl giveup_fpu
-giveup_fpu:
- blr
-
-/*
- * This is where the main kernel code starts.
- */
-start_here:
- /* ptr to current */
- lis r2,init_task@h
- ori r2,r2,init_task@l
-
- /* ptr to phys current thread */
- tophys(r4,r2)
- addi r4,r4,THREAD /* init task's THREAD */
- mtspr SPRN_SPRG3,r4
- li r3,0
- mtspr SPRN_SPRG2,r3 /* 0 => r1 has kernel sp */
-
- /* stack */
- lis r1,init_thread_union@ha
- addi r1,r1,init_thread_union@l
- li r0,0
- stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
-
- bl early_init /* We have to do this with MMU on */
-
-/*
- * Decide what sort of machine this is and initialize the MMU.
- */
- mr r3,r31
- mr r4,r30
- mr r5,r29
- mr r6,r28
- mr r7,r27
- bl machine_init
- bl MMU_init
-
-/*
- * Go back to running unmapped so we can load up new values
- * and change to using our exception vectors.
- * On the 8xx, all we have to do is invalidate the TLB to clear
- * the old 8M byte TLB mappings and load the page table base register.
- */
- /* The right way to do this would be to track it down through
- * init's THREAD like the context switch code does, but this is
- * easier......until someone changes init's static structures.
- */
- lis r6, swapper_pg_dir@h
- ori r6, r6, swapper_pg_dir@l
- tophys(r6,r6)
-#ifdef CONFIG_8xx_CPU6
- lis r4, cpu6_errata_word@h
- ori r4, r4, cpu6_errata_word@l
- li r3, 0x3980
- stw r3, 12(r4)
- lwz r3, 12(r4)
-#endif
- mtspr SPRN_M_TWB, r6
- lis r4,2f@h
- ori r4,r4,2f@l
- tophys(r4,r4)
- li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
- mtspr SPRN_SRR0,r4
- mtspr SPRN_SRR1,r3
- rfi
-/* Load up the kernel context */
-2:
- SYNC /* Force all PTE updates to finish */
- tlbia /* Clear all TLB entries */
- sync /* wait for tlbia/tlbie to finish */
- TLBSYNC /* ... on all CPUs */
-
- /* set up the PTE pointers for the Abatron bdiGDB.
- */
- tovirt(r6,r6)
- lis r5, abatron_pteptrs@h
- ori r5, r5, abatron_pteptrs@l
- stw r5, 0xf0(r0) /* Must match your Abatron config file */
- tophys(r5,r5)
- stw r6, 0(r5)
-
-/* Now turn on the MMU for real! */
- li r4,MSR_KERNEL
- lis r3,start_kernel@h
- ori r3,r3,start_kernel@l
- mtspr SPRN_SRR0,r3
- mtspr SPRN_SRR1,r4
- rfi /* enable MMU and jump to start_kernel */
-
-/* Set up the initial MMU state so we can do the first level of
- * kernel initialization. This maps the first 8 MBytes of memory 1:1
- * virtual to physical. Also, set the cache mode since that is defined
- * by TLB entries and perform any additional mapping (like of the IMMR).
- * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel,
- * 24 Mbytes of data, and the 8M IMMR space. Anything not covered by
- * these mappings is mapped by page tables.
- */
-initial_mmu:
- tlbia /* Invalidate all TLB entries */
-#ifdef CONFIG_PIN_TLB
- lis r8, MI_RSV4I@h
- ori r8, r8, 0x1c00
-#else
- li r8, 0
-#endif
- mtspr SPRN_MI_CTR, r8 /* Set instruction MMU control */
-
-#ifdef CONFIG_PIN_TLB
- lis r10, (MD_RSV4I | MD_RESETVAL)@h
- ori r10, r10, 0x1c00
- mr r8, r10
-#else
- lis r10, MD_RESETVAL@h
-#endif
-#ifndef CONFIG_8xx_COPYBACK
- oris r10, r10, MD_WTDEF@h
-#endif
- mtspr SPRN_MD_CTR, r10 /* Set data TLB control */
-
- /* Now map the lower 8 Meg into the TLBs. For this quick hack,
- * we can load the instruction and data TLB registers with the
- * same values.
- */
- lis r8, KERNELBASE@h /* Create vaddr for TLB */
- ori r8, r8, MI_EVALID /* Mark it valid */
- mtspr SPRN_MI_EPN, r8
- mtspr SPRN_MD_EPN, r8
- li r8, MI_PS8MEG /* Set 8M byte page */
- ori r8, r8, MI_SVALID /* Make it valid */
- mtspr SPRN_MI_TWC, r8
- mtspr SPRN_MD_TWC, r8
- li r8, MI_BOOTINIT /* Create RPN for address 0 */
- mtspr SPRN_MI_RPN, r8 /* Store TLB entry */
- mtspr SPRN_MD_RPN, r8
- lis r8, MI_Kp@h /* Set the protection mode */
- mtspr SPRN_MI_AP, r8
- mtspr SPRN_MD_AP, r8
-
- /* Map another 8 MByte at the IMMR to get the processor
- * internal registers (among other things).
- */
-#ifdef CONFIG_PIN_TLB
- addi r10, r10, 0x0100
- mtspr SPRN_MD_CTR, r10
-#endif
- mfspr r9, 638 /* Get current IMMR */
- andis. r9, r9, 0xff80 /* Get 8Mbyte boundary */
-
- mr r8, r9 /* Create vaddr for TLB */
- ori r8, r8, MD_EVALID /* Mark it valid */
- mtspr SPRN_MD_EPN, r8
- li r8, MD_PS8MEG /* Set 8M byte page */
- ori r8, r8, MD_SVALID /* Make it valid */
- mtspr SPRN_MD_TWC, r8
- mr r8, r9 /* Create paddr for TLB */
- ori r8, r8, MI_BOOTINIT|0x2 /* Inhibit cache -- Cort */
- mtspr SPRN_MD_RPN, r8
-
-#ifdef CONFIG_PIN_TLB
- /* Map two more 8M kernel data pages.
- */
- addi r10, r10, 0x0100
- mtspr SPRN_MD_CTR, r10
-
- lis r8, KERNELBASE@h /* Create vaddr for TLB */
- addis r8, r8, 0x0080 /* Add 8M */
- ori r8, r8, MI_EVALID /* Mark it valid */
- mtspr SPRN_MD_EPN, r8
- li r9, MI_PS8MEG /* Set 8M byte page */
- ori r9, r9, MI_SVALID /* Make it valid */
- mtspr SPRN_MD_TWC, r9
- li r11, MI_BOOTINIT /* Create RPN for address 0 */
- addis r11, r11, 0x0080 /* Add 8M */
- mtspr SPRN_MD_RPN, r11
-
- addi r10, r10, 0x0100
- mtspr SPRN_MD_CTR, r10
-
- addis r8, r8, 0x0080 /* Add 8M */
- mtspr SPRN_MD_EPN, r8
- mtspr SPRN_MD_TWC, r9
- addis r11, r11, 0x0080 /* Add 8M */
- mtspr SPRN_MD_RPN, r11
-#endif
-
- /* Since the cache is enabled according to the information we
- * just loaded into the TLB, invalidate and enable the caches here.
- * We should probably check/set other modes....later.
- */
- lis r8, IDC_INVALL@h
- mtspr SPRN_IC_CST, r8
- mtspr SPRN_DC_CST, r8
- lis r8, IDC_ENABLE@h
- mtspr SPRN_IC_CST, r8
-#ifdef CONFIG_8xx_COPYBACK
- mtspr SPRN_DC_CST, r8
-#else
- /* For a debug option, I left this here to easily enable
- * the write through cache mode
- */
- lis r8, DC_SFWT@h
- mtspr SPRN_DC_CST, r8
- lis r8, IDC_ENABLE@h
- mtspr SPRN_DC_CST, r8
-#endif
- blr
-
-
-/*
- * Set up to use a given MMU context.
- * r3 is context number, r4 is PGD pointer.
- *
- * We place the physical address of the new task page directory loaded
- * into the MMU base register, and set the ASID compare register with
- * the new "context."
- */
-_GLOBAL(set_context)
-
-#ifdef CONFIG_BDI_SWITCH
- /* Context switch the PTE pointer for the Abatron BDI2000.
- * The PGDIR is passed as second argument.
- */
- lis r5, KERNELBASE@h
- lwz r5, 0xf0(r5)
- stw r4, 0x4(r5)
-#endif
-
-#ifdef CONFIG_8xx_CPU6
- lis r6, cpu6_errata_word@h
- ori r6, r6, cpu6_errata_word@l
- tophys (r4, r4)
- li r7, 0x3980
- stw r7, 12(r6)
- lwz r7, 12(r6)
- mtspr SPRN_M_TWB, r4 /* Update MMU base address */
- li r7, 0x3380
- stw r7, 12(r6)
- lwz r7, 12(r6)
- mtspr SPRN_M_CASID, r3 /* Update context */
-#else
- mtspr SPRN_M_CASID,r3 /* Update context */
- tophys (r4, r4)
- mtspr SPRN_M_TWB, r4 /* and pgd */
-#endif
- SYNC
- blr
-
-#ifdef CONFIG_8xx_CPU6
-/* It's here because it is unique to the 8xx.
- * It is important we get called with interrupts disabled. I used to
- * do that, but it appears that all code that calls this already had
- * interrupt disabled.
- */
- .globl set_dec_cpu6
-set_dec_cpu6:
- lis r7, cpu6_errata_word@h
- ori r7, r7, cpu6_errata_word@l
- li r4, 0x2c00
- stw r4, 8(r7)
- lwz r4, 8(r7)
- mtspr 22, r3 /* Update Decrementer */
- SYNC
- blr
-#endif
-
-/*
- * We put a few things here that have to be page-aligned.
- * This stuff goes at the beginning of the data segment,
- * which is page-aligned.
- */
- .data
- .globl sdata
-sdata:
- .globl empty_zero_page
-empty_zero_page:
- .space 4096
-
- .globl swapper_pg_dir
-swapper_pg_dir:
- .space 4096
-
-/*
- * This space gets a copy of optional info passed to us by the bootstrap
- * Used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
- .globl cmd_line
-cmd_line:
- .space 512
-
-/* Room for two PTE table poiners, usually the kernel and current user
- * pointer to their respective root page table (pgdir).
- */
-abatron_pteptrs:
- .space 8
-
-#ifdef CONFIG_8xx_CPU6
- .globl cpu6_errata_word
-cpu6_errata_word:
- .space 16
-#endif
-
diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
deleted file mode 100644
index 166d597..0000000
--- a/arch/ppc/kernel/head_booke.h
+++ /dev/null
@@ -1,308 +0,0 @@
-#ifndef __HEAD_BOOKE_H__
-#define __HEAD_BOOKE_H__
-
-/*
- * Macros used for common Book-e exception handling
- */
-
-#define SET_IVOR(vector_number, vector_label) \
- li r26,vector_label@l; \
- mtspr SPRN_IVOR##vector_number,r26; \
- sync
-
-#define NORMAL_EXCEPTION_PROLOG \
- mtspr SPRN_SPRG0,r10; /* save two registers to work with */\
- mtspr SPRN_SPRG1,r11; \
- mtspr SPRN_SPRG4W,r1; \
- mfcr r10; /* save CR in r10 for now */\
- mfspr r11,SPRN_SRR1; /* check whether user or kernel */\
- andi. r11,r11,MSR_PR; \
- beq 1f; \
- mfspr r1,SPRN_SPRG3; /* if from user, start at top of */\
- lwz r1,THREAD_INFO-THREAD(r1); /* this thread's kernel stack */\
- addi r1,r1,THREAD_SIZE; \
-1: subi r1,r1,INT_FRAME_SIZE; /* Allocate an exception frame */\
- mr r11,r1; \
- stw r10,_CCR(r11); /* save various registers */\
- stw r12,GPR12(r11); \
- stw r9,GPR9(r11); \
- mfspr r10,SPRN_SPRG0; \
- stw r10,GPR10(r11); \
- mfspr r12,SPRN_SPRG1; \
- stw r12,GPR11(r11); \
- mflr r10; \
- stw r10,_LINK(r11); \
- mfspr r10,SPRN_SPRG4R; \
- mfspr r12,SPRN_SRR0; \
- stw r10,GPR1(r11); \
- mfspr r9,SPRN_SRR1; \
- stw r10,0(r11); \
- rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
- stw r0,GPR0(r11); \
- SAVE_4GPRS(3, r11); \
- SAVE_2GPRS(7, r11)
-
-/* To handle the additional exception priority levels on 40x and Book-E
- * processors we allocate a 4k stack per additional priority level. The various
- * head_xxx.S files allocate space (exception_stack_top) for each priority's
- * stack times the number of CPUs
- *
- * On 40x critical is the only additional level
- * On 44x/e500 we have critical and machine check
- * On e200 we have critical and debug (machine check occurs via critical)
- *
- * Additionally we reserve a SPRG for each priority level so we can free up a
- * GPR to use as the base for indirect access to the exception stacks. This
- * is necessary since the MMU is always on, for Book-E parts, and the stacks
- * are offset from KERNELBASE.
- *
- */
-#define BOOKE_EXCEPTION_STACK_SIZE (8192)
-
-/* CRIT_SPRG only used in critical exception handling */
-#define CRIT_SPRG SPRN_SPRG2
-/* MCHECK_SPRG only used in machine check exception handling */
-#define MCHECK_SPRG SPRN_SPRG6W
-
-#define MCHECK_STACK_TOP (exception_stack_top - 4096)
-#define CRIT_STACK_TOP (exception_stack_top)
-
-/* only on e200 for now */
-#define DEBUG_STACK_TOP (exception_stack_top - 4096)
-#define DEBUG_SPRG SPRN_SPRG6W
-
-#ifdef CONFIG_SMP
-#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
- mfspr r8,SPRN_PIR; \
- mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \
- neg r8,r8; \
- addis r8,r8,level##_STACK_TOP@ha; \
- addi r8,r8,level##_STACK_TOP@l
-#else
-#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
- lis r8,level##_STACK_TOP@h; \
- ori r8,r8,level##_STACK_TOP@l
-#endif
-
-/*
- * Exception prolog for critical/machine check exceptions. This is a
- * little different from the normal exception prolog above since a
- * critical/machine check exception can potentially occur at any point
- * during normal exception processing. Thus we cannot use the same SPRG
- * registers as the normal prolog above. Instead we use a portion of the
- * critical/machine check exception stack at low physical addresses.
- */
-#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \
- mtspr exc_level##_SPRG,r8; \
- BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \
- stw r10,GPR10-INT_FRAME_SIZE(r8); \
- stw r11,GPR11-INT_FRAME_SIZE(r8); \
- mfcr r10; /* save CR in r10 for now */\
- mfspr r11,exc_level_srr1; /* check whether user or kernel */\
- andi. r11,r11,MSR_PR; \
- mr r11,r8; \
- mfspr r8,exc_level##_SPRG; \
- beq 1f; \
- /* COMING FROM USER MODE */ \
- mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
- lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
- addi r11,r11,THREAD_SIZE; \
-1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\
- stw r10,_CCR(r11); /* save various registers */\
- stw r12,GPR12(r11); \
- stw r9,GPR9(r11); \
- mflr r10; \
- stw r10,_LINK(r11); \
- mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\
- stw r12,_DEAR(r11); /* since they may have had stuff */\
- mfspr r9,SPRN_ESR; /* in them at the point where the */\
- stw r9,_ESR(r11); /* exception was taken */\
- mfspr r12,exc_level_srr0; \
- stw r1,GPR1(r11); \
- mfspr r9,exc_level_srr1; \
- stw r1,0(r11); \
- mr r1,r11; \
- rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
- stw r0,GPR0(r11); \
- SAVE_4GPRS(3, r11); \
- SAVE_2GPRS(7, r11)
-
-#define CRITICAL_EXCEPTION_PROLOG \
- EXC_LEVEL_EXCEPTION_PROLOG(CRIT, SPRN_CSRR0, SPRN_CSRR1)
-#define DEBUG_EXCEPTION_PROLOG \
- EXC_LEVEL_EXCEPTION_PROLOG(DEBUG, SPRN_DSRR0, SPRN_DSRR1)
-#define MCHECK_EXCEPTION_PROLOG \
- EXC_LEVEL_EXCEPTION_PROLOG(MCHECK, SPRN_MCSRR0, SPRN_MCSRR1)
-
-/*
- * Exception vectors.
- */
-#define START_EXCEPTION(label) \
- .align 5; \
-label:
-
-#define FINISH_EXCEPTION(func) \
- bl transfer_to_handler_full; \
- .long func; \
- .long ret_from_except_full
-
-#define EXCEPTION(n, label, hdlr, xfer) \
- START_EXCEPTION(label); \
- NORMAL_EXCEPTION_PROLOG; \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- xfer(n, hdlr)
-
-#define CRITICAL_EXCEPTION(n, label, hdlr) \
- START_EXCEPTION(label); \
- CRITICAL_EXCEPTION_PROLOG; \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
- NOCOPY, crit_transfer_to_handler, \
- ret_from_crit_exc)
-
-#define MCHECK_EXCEPTION(n, label, hdlr) \
- START_EXCEPTION(label); \
- MCHECK_EXCEPTION_PROLOG; \
- mfspr r5,SPRN_ESR; \
- stw r5,_ESR(r11); \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_TEMPLATE(hdlr, n+2, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), \
- NOCOPY, mcheck_transfer_to_handler, \
- ret_from_mcheck_exc)
-
-#define EXC_XFER_TEMPLATE(hdlr, trap, msr, copyee, tfer, ret) \
- li r10,trap; \
- stw r10,TRAP(r11); \
- lis r10,msr@h; \
- ori r10,r10,msr@l; \
- copyee(r10, r9); \
- bl tfer; \
- .long hdlr; \
- .long ret
-
-#define COPY_EE(d, s) rlwimi d,s,0,16,16
-#define NOCOPY(d, s)
-
-#define EXC_XFER_STD(n, hdlr) \
- EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, NOCOPY, transfer_to_handler_full, \
- ret_from_except_full)
-
-#define EXC_XFER_LITE(n, hdlr) \
- EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, NOCOPY, transfer_to_handler, \
- ret_from_except)
-
-#define EXC_XFER_EE(n, hdlr) \
- EXC_XFER_TEMPLATE(hdlr, n, MSR_KERNEL, COPY_EE, transfer_to_handler_full, \
- ret_from_except_full)
-
-#define EXC_XFER_EE_LITE(n, hdlr) \
- EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \
- ret_from_except)
-
-/* Check for a single step debug exception while in an exception
- * handler before state has been saved. This is to catch the case
- * where an instruction that we are trying to single step causes
- * an exception (eg ITLB/DTLB miss) and thus the first instruction of
- * the exception handler generates a single step debug exception.
- *
- * If we get a debug trap on the first instruction of an exception handler,
- * we reset the MSR_DE in the _exception handler's_ MSR (the debug trap is
- * a critical exception, so we are using SPRN_CSRR1 to manipulate the MSR).
- * The exception handler was handling a non-critical interrupt, so it will
- * save (and later restore) the MSR via SPRN_CSRR1, which will still have
- * the MSR_DE bit set.
- */
-#define DEBUG_EXCEPTION \
- START_EXCEPTION(Debug); \
- CRITICAL_EXCEPTION_PROLOG; \
- \
- /* \
- * If there is a single step or branch-taken exception in an \
- * exception entry sequence, it was probably meant to apply to \
- * the code where the exception occurred (since exception entry \
- * doesn't turn off DE automatically). We simulate the effect \
- * of turning off DE on entry to an exception handler by turning \
- * off DE in the CSRR1 value and clearing the debug status. \
- */ \
- mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \
- andis. r10,r10,DBSR_IC@h; \
- beq+ 2f; \
- \
- lis r10,KERNELBASE@h; /* check if exception in vectors */ \
- ori r10,r10,KERNELBASE@l; \
- cmplw r12,r10; \
- blt+ 2f; /* addr below exception vectors */ \
- \
- lis r10,Debug@h; \
- ori r10,r10,Debug@l; \
- cmplw r12,r10; \
- bgt+ 2f; /* addr above exception vectors */ \
- \
- /* here it looks like we got an inappropriate debug exception. */ \
-1: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CSRR1 value */ \
- lis r10,DBSR_IC@h; /* clear the IC event */ \
- mtspr SPRN_DBSR,r10; \
- /* restore state and get out */ \
- lwz r10,_CCR(r11); \
- lwz r0,GPR0(r11); \
- lwz r1,GPR1(r11); \
- mtcrf 0x80,r10; \
- mtspr SPRN_CSRR0,r12; \
- mtspr SPRN_CSRR1,r9; \
- lwz r9,GPR9(r11); \
- lwz r12,GPR12(r11); \
- mtspr CRIT_SPRG,r8; \
- BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \
- lwz r10,GPR10-INT_FRAME_SIZE(r8); \
- lwz r11,GPR11-INT_FRAME_SIZE(r8); \
- mfspr r8,CRIT_SPRG; \
- \
- rfci; \
- b .; \
- \
- /* continue normal handling for a critical exception... */ \
-2: mfspr r4,SPRN_DBSR; \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
-
-#define INSTRUCTION_STORAGE_EXCEPTION \
- START_EXCEPTION(InstructionStorage) \
- NORMAL_EXCEPTION_PROLOG; \
- mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \
- stw r5,_ESR(r11); \
- mr r4,r12; /* Pass SRR0 as arg2 */ \
- li r5,0; /* Pass zero as arg3 */ \
- EXC_XFER_EE_LITE(0x0400, handle_page_fault)
-
-#define ALIGNMENT_EXCEPTION \
- START_EXCEPTION(Alignment) \
- NORMAL_EXCEPTION_PROLOG; \
- mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \
- stw r4,_DEAR(r11); \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_EE(0x0600, alignment_exception)
-
-#define PROGRAM_EXCEPTION \
- START_EXCEPTION(Program) \
- NORMAL_EXCEPTION_PROLOG; \
- mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \
- stw r4,_ESR(r11); \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_STD(0x0700, program_check_exception)
-
-#define DECREMENTER_EXCEPTION \
- START_EXCEPTION(Decrementer) \
- NORMAL_EXCEPTION_PROLOG; \
- lis r0,TSR_DIS@h; /* Setup the DEC interrupt mask */ \
- mtspr SPRN_TSR,r0; /* Clear the DEC interrupt */ \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_LITE(0x0900, timer_interrupt)
-
-#define FP_UNAVAILABLE_EXCEPTION \
- START_EXCEPTION(FloatingPointUnavailable) \
- NORMAL_EXCEPTION_PROLOG; \
- bne load_up_fpu; /* if from user, just load it up */ \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
-
-#endif /* __HEAD_BOOKE_H__ */
diff --git a/arch/ppc/kernel/machine_kexec.c b/arch/ppc/kernel/machine_kexec.c
deleted file mode 100644
index a469ba4..0000000
--- a/arch/ppc/kernel/machine_kexec.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * machine_kexec.c - handle transition of Linux booting another kernel
- * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com>
- *
- * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
- *
- * This source code is licensed under the GNU General Public License,
- * Version 2. See the file COPYING for more details.
- */
-
-#include <linux/mm.h>
-#include <linux/kexec.h>
-#include <linux/delay.h>
-#include <linux/reboot.h>
-#include <asm/pgtable.h>
-#include <asm/pgalloc.h>
-#include <asm/mmu_context.h>
-#include <asm/io.h>
-#include <asm/hw_irq.h>
-#include <asm/cacheflush.h>
-#include <asm/machdep.h>
-
-typedef NORET_TYPE void (*relocate_new_kernel_t)(
- unsigned long indirection_page,
- unsigned long reboot_code_buffer,
- unsigned long start_address) ATTRIB_NORET;
-
-extern const unsigned char relocate_new_kernel[];
-extern const unsigned int relocate_new_kernel_size;
-
-void machine_shutdown(void)
-{
- if (ppc_md.machine_shutdown)
- ppc_md.machine_shutdown();
-}
-
-void machine_crash_shutdown(struct pt_regs *regs)
-{
- if (ppc_md.machine_crash_shutdown)
- ppc_md.machine_crash_shutdown();
-}
-
-/*
- * Do what every setup is needed on image and the
- * reboot code buffer to allow us to avoid allocations
- * later.
- */
-int machine_kexec_prepare(struct kimage *image)
-{
- if (ppc_md.machine_kexec_prepare)
- return ppc_md.machine_kexec_prepare(image);
- /*
- * Fail if platform doesn't provide its own machine_kexec_prepare
- * implementation.
- */
- return -ENOSYS;
-}
-
-void machine_kexec_cleanup(struct kimage *image)
-{
- if (ppc_md.machine_kexec_cleanup)
- ppc_md.machine_kexec_cleanup(image);
-}
-
-/*
- * Do not allocate memory (or fail in any way) in machine_kexec().
- * We are past the point of no return, committed to rebooting now.
- */
-NORET_TYPE void machine_kexec(struct kimage *image)
-{
- if (ppc_md.machine_kexec)
- ppc_md.machine_kexec(image);
- else {
- /*
- * Fall back to normal restart if platform doesn't provide
- * its own kexec function, and user insist to kexec...
- */
- machine_restart(NULL);
- }
- for(;;);
-}
-
-/*
- * This is a generic machine_kexec function suitable at least for
- * non-OpenFirmware embedded platforms.
- * It merely copies the image relocation code to the control page and
- * jumps to it.
- * A platform specific function may just call this one.
- */
-void machine_kexec_simple(struct kimage *image)
-{
- unsigned long page_list;
- unsigned long reboot_code_buffer, reboot_code_buffer_phys;
- relocate_new_kernel_t rnk;
-
- /* Interrupts aren't acceptable while we reboot */
- local_irq_disable();
-
- page_list = image->head;
-
- /* we need both effective and real address here */
- reboot_code_buffer =
- (unsigned long)page_address(image->control_code_page);
- reboot_code_buffer_phys = virt_to_phys((void *)reboot_code_buffer);
-
- /* copy our kernel relocation code to the control code page */
- memcpy((void *)reboot_code_buffer, relocate_new_kernel,
- relocate_new_kernel_size);
-
- flush_icache_range(reboot_code_buffer,
- reboot_code_buffer + KEXEC_CONTROL_CODE_SIZE);
- printk(KERN_INFO "Bye!\n");
-
- /* now call it */
- rnk = (relocate_new_kernel_t) reboot_code_buffer;
- (*rnk)(page_list, reboot_code_buffer_phys, image->start);
-}
-
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
deleted file mode 100644
index d5e0dfc..0000000
--- a/arch/ppc/kernel/misc.S
+++ /dev/null
@@ -1,868 +0,0 @@
-/*
- * This file contains miscellaneous low-level functions.
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
- * and Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/sys.h>
-#include <asm/unistd.h>
-#include <asm/errno.h>
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/cache.h>
-#include <asm/cputable.h>
-#include <asm/mmu.h>
-#include <asm/ppc_asm.h>
-#include <asm/thread_info.h>
-#include <asm/asm-offsets.h>
-
-#ifdef CONFIG_8xx
-#define ISYNC_8xx isync
-#else
-#define ISYNC_8xx
-#endif
- .text
-
- .align 5
-_GLOBAL(__delay)
- cmpwi 0,r3,0
- mtctr r3
- beqlr
-1: bdnz 1b
- blr
-
-/*
- * Returns (address we're running at) - (address we were linked at)
- * for use before the text and data are mapped to KERNELBASE.
- */
-_GLOBAL(reloc_offset)
- mflr r0
- bl 1f
-1: mflr r3
- lis r4,1b@ha
- addi r4,r4,1b@l
- subf r3,r4,r3
- mtlr r0
- blr
-
-/*
- * add_reloc_offset(x) returns x + reloc_offset().
- */
-_GLOBAL(add_reloc_offset)
- mflr r0
- bl 1f
-1: mflr r5
- lis r4,1b@ha
- addi r4,r4,1b@l
- subf r5,r4,r5
- add r3,r3,r5
- mtlr r0
- blr
-
-/*
- * sub_reloc_offset(x) returns x - reloc_offset().
- */
-_GLOBAL(sub_reloc_offset)
- mflr r0
- bl 1f
-1: mflr r5
- lis r4,1b@ha
- addi r4,r4,1b@l
- subf r5,r4,r5
- subf r3,r5,r3
- mtlr r0
- blr
-
-/*
- * reloc_got2 runs through the .got2 section adding an offset
- * to each entry.
- */
-_GLOBAL(reloc_got2)
- mflr r11
- lis r7,__got2_start@ha
- addi r7,r7,__got2_start@l
- lis r8,__got2_end@ha
- addi r8,r8,__got2_end@l
- subf r8,r7,r8
- srwi. r8,r8,2
- beqlr
- mtctr r8
- bl 1f
-1: mflr r0
- lis r4,1b@ha
- addi r4,r4,1b@l
- subf r0,r4,r0
- add r7,r0,r7
-2: lwz r0,0(r7)
- add r0,r0,r3
- stw r0,0(r7)
- addi r7,r7,4
- bdnz 2b
- mtlr r11
- blr
-
-/*
- * call_setup_cpu - call the setup_cpu function for this cpu
- * r3 = data offset, r24 = cpu number
- *
- * Setup function is called with:
- * r3 = data offset
- * r4 = ptr to CPU spec (relocated)
- */
-_GLOBAL(call_setup_cpu)
- addis r4,r3,cur_cpu_spec@ha
- addi r4,r4,cur_cpu_spec@l
- lwz r4,0(r4)
- add r4,r4,r3
- lwz r5,CPU_SPEC_SETUP(r4)
- cmpi 0,r5,0
- add r5,r5,r3
- beqlr
- mtctr r5
- bctr
-
-/*
- * complement mask on the msr then "or" some values on.
- * _nmask_and_or_msr(nmask, value_to_or)
- */
-_GLOBAL(_nmask_and_or_msr)
- mfmsr r0 /* Get current msr */
- andc r0,r0,r3 /* And off the bits set in r3 (first parm) */
- or r0,r0,r4 /* Or on the bits in r4 (second parm) */
- SYNC /* Some chip revs have problems here... */
- mtmsr r0 /* Update machine state */
- isync
- blr /* Done */
-
-
-/*
- * Flush MMU TLB
- */
-_GLOBAL(_tlbia)
-#if defined(CONFIG_40x)
- sync /* Flush to memory before changing mapping */
- tlbia
- isync /* Flush shadow TLB */
-#elif defined(CONFIG_44x)
- li r3,0
- sync
-
- /* Load high watermark */
- lis r4,tlb_44x_hwater@ha
- lwz r5,tlb_44x_hwater@l(r4)
-
-1: tlbwe r3,r3,PPC44x_TLB_PAGEID
- addi r3,r3,1
- cmpw 0,r3,r5
- ble 1b
-
- isync
-#else /* !(CONFIG_40x || CONFIG_44x) */
-#if defined(CONFIG_SMP)
- rlwinm r8,r1,0,0,18
- lwz r8,TI_CPU(r8)
- oris r8,r8,10
- mfmsr r10
- SYNC
- rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
- rlwinm r0,r0,0,28,26 /* clear DR */
- mtmsr r0
- SYNC_601
- isync
- lis r9,mmu_hash_lock@h
- ori r9,r9,mmu_hash_lock@l
- tophys(r9,r9)
-10: lwarx r7,0,r9
- cmpwi 0,r7,0
- bne- 10b
- stwcx. r8,0,r9
- bne- 10b
- sync
- tlbia
- sync
- TLBSYNC
- li r0,0
- stw r0,0(r9) /* clear mmu_hash_lock */
- mtmsr r10
- SYNC_601
- isync
-#else /* CONFIG_SMP */
- sync
- tlbia
- sync
-#endif /* CONFIG_SMP */
-#endif /* ! defined(CONFIG_40x) */
- blr
-
-/*
- * Flush MMU TLB for a particular address
- */
-_GLOBAL(_tlbie)
-#if defined(CONFIG_40x)
- /* We run the search with interrupts disabled because we have to change
- * the PID and I don't want to preempt when that happens.
- */
- mfmsr r5
- mfspr r6,SPRN_PID
- wrteei 0
- mtspr SPRN_PID,r4
- tlbsx. r3, 0, r3
- mtspr SPRN_PID,r6
- wrtee r5
- bne 10f
- sync
- /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear.
- * Since 25 is the V bit in the TLB_TAG, loading this value will invalidate
- * the TLB entry. */
- tlbwe r3, r3, TLB_TAG
- isync
-10:
-#elif defined(CONFIG_44x)
- mfspr r5,SPRN_MMUCR
- rlwimi r5,r4,0,24,31 /* Set TID */
-
- /* We have to run the search with interrupts disabled, even critical
- * and debug interrupts (in fact the only critical exceptions we have
- * are debug and machine check). Otherwise an interrupt which causes
- * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */
- mfmsr r4
- lis r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha
- addi r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
- andc r6,r4,r6
- mtmsr r6
- mtspr SPRN_MMUCR,r5
- tlbsx. r3, 0, r3
- mtmsr r4
- bne 10f
- sync
- /* There are only 64 TLB entries, so r3 < 64,
- * which means bit 22, is clear. Since 22 is
- * the V bit in the TLB_PAGEID, loading this
- * value will invalidate the TLB entry.
- */
- tlbwe r3, r3, PPC44x_TLB_PAGEID
- isync
-10:
-#else /* !(CONFIG_40x || CONFIG_44x) */
-#if defined(CONFIG_SMP)
- rlwinm r8,r1,0,0,18
- lwz r8,TI_CPU(r8)
- oris r8,r8,11
- mfmsr r10
- SYNC
- rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
- rlwinm r0,r0,0,28,26 /* clear DR */
- mtmsr r0
- SYNC_601
- isync
- lis r9,mmu_hash_lock@h
- ori r9,r9,mmu_hash_lock@l
- tophys(r9,r9)
-10: lwarx r7,0,r9
- cmpwi 0,r7,0
- bne- 10b
- stwcx. r8,0,r9
- bne- 10b
- eieio
- tlbie r3
- sync
- TLBSYNC
- li r0,0
- stw r0,0(r9) /* clear mmu_hash_lock */
- mtmsr r10
- SYNC_601
- isync
-#else /* CONFIG_SMP */
- tlbie r3
- sync
-#endif /* CONFIG_SMP */
-#endif /* ! CONFIG_40x */
- blr
-
-/*
- * Flush instruction cache.
- * This is a no-op on the 601.
- */
-_GLOBAL(flush_instruction_cache)
-#if defined(CONFIG_8xx)
- isync
- lis r5, IDC_INVALL@h
- mtspr SPRN_IC_CST, r5
-#elif defined(CONFIG_4xx)
-#ifdef CONFIG_403GCX
- li r3, 512
- mtctr r3
- lis r4, KERNELBASE@h
-1: iccci 0, r4
- addi r4, r4, 16
- bdnz 1b
-#else
- lis r3, KERNELBASE@h
- iccci 0,r3
-#endif
-#else
- mfspr r3,SPRN_PVR
- rlwinm r3,r3,16,16,31
- cmpwi 0,r3,1
- beqlr /* for 601, do nothing */
- /* 603/604 processor - use invalidate-all bit in HID0 */
- mfspr r3,SPRN_HID0
- ori r3,r3,HID0_ICFI
- mtspr SPRN_HID0,r3
-#endif /* CONFIG_8xx/4xx */
- isync
- blr
-
-/*
- * Write any modified data cache blocks out to memory
- * and invalidate the corresponding instruction cache blocks.
- * This is a no-op on the 601.
- *
- * __flush_icache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(__flush_icache_range)
-BEGIN_FTR_SECTION
- blr /* for 601, do nothing */
-END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
- li r5,L1_CACHE_BYTES-1
- andc r3,r3,r5
- subf r4,r3,r4
- add r4,r4,r5
- srwi. r4,r4,L1_CACHE_SHIFT
- beqlr
- mtctr r4
- mr r6,r3
-1: dcbst 0,r3
- addi r3,r3,L1_CACHE_BYTES
- bdnz 1b
- sync /* wait for dcbst's to get to ram */
- mtctr r4
-2: icbi 0,r6
- addi r6,r6,L1_CACHE_BYTES
- bdnz 2b
- sync /* additional sync needed on g4 */
- isync
- blr
-/*
- * Write any modified data cache blocks out to memory.
- * Does not invalidate the corresponding cache lines (especially for
- * any corresponding instruction cache).
- *
- * clean_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(clean_dcache_range)
- li r5,L1_CACHE_BYTES-1
- andc r3,r3,r5
- subf r4,r3,r4
- add r4,r4,r5
- srwi. r4,r4,L1_CACHE_SHIFT
- beqlr
- mtctr r4
-
-1: dcbst 0,r3
- addi r3,r3,L1_CACHE_BYTES
- bdnz 1b
- sync /* wait for dcbst's to get to ram */
- blr
-
-/*
- * Write any modified data cache blocks out to memory and invalidate them.
- * Does not invalidate the corresponding instruction cache blocks.
- *
- * flush_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(flush_dcache_range)
- li r5,L1_CACHE_BYTES-1
- andc r3,r3,r5
- subf r4,r3,r4
- add r4,r4,r5
- srwi. r4,r4,L1_CACHE_SHIFT
- beqlr
- mtctr r4
-
-1: dcbf 0,r3
- addi r3,r3,L1_CACHE_BYTES
- bdnz 1b
- sync /* wait for dcbst's to get to ram */
- blr
-
-/*
- * Like above, but invalidate the D-cache. This is used by the 8xx
- * to invalidate the cache so the PPC core doesn't get stale data
- * from the CPM (no cache snooping here :-).
- *
- * invalidate_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(invalidate_dcache_range)
- li r5,L1_CACHE_BYTES-1
- andc r3,r3,r5
- subf r4,r3,r4
- add r4,r4,r5
- srwi. r4,r4,L1_CACHE_SHIFT
- beqlr
- mtctr r4
-
-1: dcbi 0,r3
- addi r3,r3,L1_CACHE_BYTES
- bdnz 1b
- sync /* wait for dcbi's to get to ram */
- blr
-
-#ifdef CONFIG_NOT_COHERENT_CACHE
-/*
- * 40x cores have 8K or 16K dcache and 32 byte line size.
- * 44x has a 32K dcache and 32 byte line size.
- * 8xx has 1, 2, 4, 8K variants.
- * For now, cover the worst case of the 44x.
- * Must be called with external interrupts disabled.
- */
-#define CACHE_NWAYS 64
-#define CACHE_NLINES 16
-
-_GLOBAL(flush_dcache_all)
- li r4, (2 * CACHE_NWAYS * CACHE_NLINES)
- mtctr r4
- lis r5, KERNELBASE@h
-1: lwz r3, 0(r5) /* Load one word from every line */
- addi r5, r5, L1_CACHE_BYTES
- bdnz 1b
- blr
-#endif /* CONFIG_NOT_COHERENT_CACHE */
-
-/*
- * Flush a particular page from the data cache to RAM.
- * Note: this is necessary because the instruction cache does *not*
- * snoop from the data cache.
- * This is a no-op on the 601 which has a unified cache.
- *
- * void __flush_dcache_icache(void *page)
- */
-_GLOBAL(__flush_dcache_icache)
-BEGIN_FTR_SECTION
- blr /* for 601, do nothing */
-END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
- rlwinm r3,r3,0,0,19 /* Get page base address */
- li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
- mtctr r4
- mr r6,r3
-0: dcbst 0,r3 /* Write line to ram */
- addi r3,r3,L1_CACHE_BYTES
- bdnz 0b
- sync
-#ifndef CONFIG_44x
- /* We don't flush the icache on 44x. Those have a virtual icache
- * and we don't have access to the virtual address here (it's
- * not the page vaddr but where it's mapped in user space). The
- * flushing of the icache on these is handled elsewhere, when
- * a change in the address space occurs, before returning to
- * user space
- */
- mtctr r4
-1: icbi 0,r6
- addi r6,r6,L1_CACHE_BYTES
- bdnz 1b
- sync
- isync
-#endif /* CONFIG_44x */
- blr
-
-/*
- * Flush a particular page from the data cache to RAM, identified
- * by its physical address. We turn off the MMU so we can just use
- * the physical address (this may be a highmem page without a kernel
- * mapping).
- *
- * void __flush_dcache_icache_phys(unsigned long physaddr)
- */
-_GLOBAL(__flush_dcache_icache_phys)
-BEGIN_FTR_SECTION
- blr /* for 601, do nothing */
-END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
- mfmsr r10
- rlwinm r0,r10,0,28,26 /* clear DR */
- mtmsr r0
- isync
- rlwinm r3,r3,0,0,19 /* Get page base address */
- li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
- mtctr r4
- mr r6,r3
-0: dcbst 0,r3 /* Write line to ram */
- addi r3,r3,L1_CACHE_BYTES
- bdnz 0b
- sync
- mtctr r4
-1: icbi 0,r6
- addi r6,r6,L1_CACHE_BYTES
- bdnz 1b
- sync
- mtmsr r10 /* restore DR */
- isync
- blr
-
-/*
- * Clear pages using the dcbz instruction, which doesn't cause any
- * memory traffic (except to write out any cache lines which get
- * displaced). This only works on cacheable memory.
- *
- * void clear_pages(void *page, int order) ;
- */
-_GLOBAL(clear_pages)
- li r0,4096/L1_CACHE_BYTES
- slw r0,r0,r4
- mtctr r0
-#ifdef CONFIG_8xx
- li r4, 0
-1: stw r4, 0(r3)
- stw r4, 4(r3)
- stw r4, 8(r3)
- stw r4, 12(r3)
-#else
-1: dcbz 0,r3
-#endif
- addi r3,r3,L1_CACHE_BYTES
- bdnz 1b
- blr
-
-/*
- * Copy a whole page. We use the dcbz instruction on the destination
- * to reduce memory traffic (it eliminates the unnecessary reads of
- * the destination into cache). This requires that the destination
- * is cacheable.
- */
-#define COPY_16_BYTES \
- lwz r6,4(r4); \
- lwz r7,8(r4); \
- lwz r8,12(r4); \
- lwzu r9,16(r4); \
- stw r6,4(r3); \
- stw r7,8(r3); \
- stw r8,12(r3); \
- stwu r9,16(r3)
-
-_GLOBAL(copy_page)
- addi r3,r3,-4
- addi r4,r4,-4
-
-#ifdef CONFIG_8xx
- /* don't use prefetch on 8xx */
- li r0,4096/L1_CACHE_BYTES
- mtctr r0
-1: COPY_16_BYTES
- bdnz 1b
- blr
-
-#else /* not 8xx, we can prefetch */
- li r5,4
-
-#if MAX_COPY_PREFETCH > 1
- li r0,MAX_COPY_PREFETCH
- li r11,4
- mtctr r0
-11: dcbt r11,r4
- addi r11,r11,L1_CACHE_BYTES
- bdnz 11b
-#else /* MAX_COPY_PREFETCH == 1 */
- dcbt r5,r4
- li r11,L1_CACHE_BYTES+4
-#endif /* MAX_COPY_PREFETCH */
- li r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH
- crclr 4*cr0+eq
-2:
- mtctr r0
-1:
- dcbt r11,r4
- dcbz r5,r3
- COPY_16_BYTES
-#if L1_CACHE_BYTES >= 32
- COPY_16_BYTES
-#if L1_CACHE_BYTES >= 64
- COPY_16_BYTES
- COPY_16_BYTES
-#if L1_CACHE_BYTES >= 128
- COPY_16_BYTES
- COPY_16_BYTES
- COPY_16_BYTES
- COPY_16_BYTES
-#endif
-#endif
-#endif
- bdnz 1b
- beqlr
- crnot 4*cr0+eq,4*cr0+eq
- li r0,MAX_COPY_PREFETCH
- li r11,4
- b 2b
-#endif /* CONFIG_8xx */
-
-/*
- * void atomic_clear_mask(atomic_t mask, atomic_t *addr)
- * void atomic_set_mask(atomic_t mask, atomic_t *addr);
- */
-_GLOBAL(atomic_clear_mask)
-10: lwarx r5,0,r4
- andc r5,r5,r3
- PPC405_ERR77(0,r4)
- stwcx. r5,0,r4
- bne- 10b
- blr
-_GLOBAL(atomic_set_mask)
-10: lwarx r5,0,r4
- or r5,r5,r3
- PPC405_ERR77(0,r4)
- stwcx. r5,0,r4
- bne- 10b
- blr
-
-/*
- * I/O string operations
- *
- * insb(port, buf, len)
- * outsb(port, buf, len)
- * insw(port, buf, len)
- * outsw(port, buf, len)
- * insl(port, buf, len)
- * outsl(port, buf, len)
- * insw_ns(port, buf, len)
- * outsw_ns(port, buf, len)
- * insl_ns(port, buf, len)
- * outsl_ns(port, buf, len)
- *
- * The *_ns versions don't do byte-swapping.
- */
-_GLOBAL(_insb)
- cmpwi 0,r5,0
- mtctr r5
- subi r4,r4,1
- blelr-
-00: lbz r5,0(r3)
-01: eieio
-02: stbu r5,1(r4)
- ISYNC_8xx
- .section .fixup,"ax"
-03: blr
- .text
- .section __ex_table, "a"
- .align 2
- .long 00b, 03b
- .long 01b, 03b
- .long 02b, 03b
- .text
- bdnz 00b
- blr
-
-_GLOBAL(_outsb)
- cmpwi 0,r5,0
- mtctr r5
- subi r4,r4,1
- blelr-
-00: lbzu r5,1(r4)
-01: stb r5,0(r3)
-02: eieio
- ISYNC_8xx
- .section .fixup,"ax"
-03: blr
- .text
- .section __ex_table, "a"
- .align 2
- .long 00b, 03b
- .long 01b, 03b
- .long 02b, 03b
- .text
- bdnz 00b
- blr
-
-_GLOBAL(_insw_ns)
- cmpwi 0,r5,0
- mtctr r5
- subi r4,r4,2
- blelr-
-00: lhz r5,0(r3)
-01: eieio
-02: sthu r5,2(r4)
- ISYNC_8xx
- .section .fixup,"ax"
-03: blr
- .text
- .section __ex_table, "a"
- .align 2
- .long 00b, 03b
- .long 01b, 03b
- .long 02b, 03b
- .text
- bdnz 00b
- blr
-
-_GLOBAL(_outsw_ns)
- cmpwi 0,r5,0
- mtctr r5
- subi r4,r4,2
- blelr-
-00: lhzu r5,2(r4)
-01: sth r5,0(r3)
-02: eieio
- ISYNC_8xx
- .section .fixup,"ax"
-03: blr
- .text
- .section __ex_table, "a"
- .align 2
- .long 00b, 03b
- .long 01b, 03b
- .long 02b, 03b
- .text
- bdnz 00b
- blr
-
-_GLOBAL(_insl_ns)
- cmpwi 0,r5,0
- mtctr r5
- subi r4,r4,4
- blelr-
-00: lwz r5,0(r3)
-01: eieio
-02: stwu r5,4(r4)
- ISYNC_8xx
- .section .fixup,"ax"
-03: blr
- .text
- .section __ex_table, "a"
- .align 2
- .long 00b, 03b
- .long 01b, 03b
- .long 02b, 03b
- .text
- bdnz 00b
- blr
-
-_GLOBAL(_outsl_ns)
- cmpwi 0,r5,0
- mtctr r5
- subi r4,r4,4
- blelr-
-00: lwzu r5,4(r4)
-01: stw r5,0(r3)
-02: eieio
- ISYNC_8xx
- .section .fixup,"ax"
-03: blr
- .text
- .section __ex_table, "a"
- .align 2
- .long 00b, 03b
- .long 01b, 03b
- .long 02b, 03b
- .text
- bdnz 00b
- blr
-
-/*
- * Extended precision shifts.
- *
- * Updated to be valid for shift counts from 0 to 63 inclusive.
- * -- Gabriel
- *
- * R3/R4 has 64 bit value
- * R5 has shift count
- * result in R3/R4
- *
- * ashrdi3: arithmetic right shift (sign propagation)
- * lshrdi3: logical right shift
- * ashldi3: left shift
- */
-_GLOBAL(__ashrdi3)
- subfic r6,r5,32
- srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
- addi r7,r5,32 # could be xori, or addi with -32
- slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
- rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
- sraw r7,r3,r7 # t2 = MSW >> (count-32)
- or r4,r4,r6 # LSW |= t1
- slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
- sraw r3,r3,r5 # MSW = MSW >> count
- or r4,r4,r7 # LSW |= t2
- blr
-
-_GLOBAL(__ashldi3)
- subfic r6,r5,32
- slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
- addi r7,r5,32 # could be xori, or addi with -32
- srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
- slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
- or r3,r3,r6 # MSW |= t1
- slw r4,r4,r5 # LSW = LSW << count
- or r3,r3,r7 # MSW |= t2
- blr
-
-_GLOBAL(__lshrdi3)
- subfic r6,r5,32
- srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
- addi r7,r5,32 # could be xori, or addi with -32
- slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
- srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
- or r4,r4,r6 # LSW |= t1
- srw r3,r3,r5 # MSW = MSW >> count
- or r4,r4,r7 # LSW |= t2
- blr
-
-_GLOBAL(abs)
- srawi r4,r3,31
- xor r3,r3,r4
- sub r3,r3,r4
- blr
-
-_GLOBAL(_get_SP)
- mr r3,r1 /* Close enough */
- blr
-
-/*
- * Create a kernel thread
- * kernel_thread(fn, arg, flags)
- */
-_GLOBAL(kernel_thread)
- stwu r1,-16(r1)
- stw r30,8(r1)
- stw r31,12(r1)
- mr r30,r3 /* function */
- mr r31,r4 /* argument */
- ori r3,r5,CLONE_VM /* flags */
- oris r3,r3,CLONE_UNTRACED>>16
- li r4,0 /* new sp (unused) */
- li r0,__NR_clone
- sc
- cmpwi 0,r3,0 /* parent or child? */
- bne 1f /* return if parent */
- li r0,0 /* make top-level stack frame */
- stwu r0,-16(r1)
- mtlr r30 /* fn addr in lr */
- mr r3,r31 /* load arg and call fn */
- PPC440EP_ERR42
- blrl
- li r0,__NR_exit /* exit if function returns */
- li r3,0
- sc
-1: lwz r30,8(r1)
- lwz r31,12(r1)
- addi r1,r1,16
- blr
-
-_GLOBAL(kernel_execve)
- li r0,__NR_execve
- sc
- bnslr
- neg r3,r3
- blr
-
-/*
- * This routine is just here to keep GCC happy - sigh...
- */
-_GLOBAL(__main)
- blr
-
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
deleted file mode 100644
index df3ef6d..0000000
--- a/arch/ppc/kernel/pci.c
+++ /dev/null
@@ -1,1233 +0,0 @@
-/*
- * Common prep/chrp pci routines. -- Cort
- */
-
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <linux/capability.h>
-#include <linux/sched.h>
-#include <linux/errno.h>
-#include <linux/bootmem.h>
-
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/sections.h>
-#include <asm/pci-bridge.h>
-#include <asm/byteorder.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-unsigned long isa_io_base = 0;
-unsigned long isa_mem_base = 0;
-unsigned long pci_dram_offset = 0;
-int pcibios_assign_bus_offset = 1;
-
-void pcibios_make_OF_bus_map(void);
-
-static int pci_relocate_bridge_resource(struct pci_bus *bus, int i);
-static int probe_resource(struct pci_bus *parent, struct resource *pr,
- struct resource *res, struct resource **conflict);
-static void update_bridge_base(struct pci_bus *bus, int i);
-static void pcibios_fixup_resources(struct pci_dev* dev);
-static void fixup_broken_pcnet32(struct pci_dev* dev);
-static int reparent_resources(struct resource *parent, struct resource *res);
-static void fixup_cpc710_pci64(struct pci_dev* dev);
-
-/* By default, we don't re-assign bus numbers.
- */
-int pci_assign_all_buses;
-
-struct pci_controller* hose_head;
-struct pci_controller** hose_tail = &hose_head;
-
-static int pci_bus_count;
-
-static void
-fixup_broken_pcnet32(struct pci_dev* dev)
-{
- if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) {
- dev->vendor = PCI_VENDOR_ID_AMD;
- pci_write_config_word(dev, PCI_VENDOR_ID, PCI_VENDOR_ID_AMD);
- }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32);
-
-static void
-fixup_cpc710_pci64(struct pci_dev* dev)
-{
- /* Hide the PCI64 BARs from the kernel as their content doesn't
- * fit well in the resource management
- */
- dev->resource[0].start = dev->resource[0].end = 0;
- dev->resource[0].flags = 0;
- dev->resource[1].start = dev->resource[1].end = 0;
- dev->resource[1].flags = 0;
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
-
-static void
-pcibios_fixup_resources(struct pci_dev *dev)
-{
- struct pci_controller* hose = (struct pci_controller *)dev->sysdata;
- int i;
- unsigned long offset;
-
- if (!hose) {
- printk(KERN_ERR "No hose for PCI dev %s!\n", pci_name(dev));
- return;
- }
- for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
- struct resource *res = dev->resource + i;
- if (!res->flags)
- continue;
- if (res->end == 0xffffffff) {
- DBG("PCI:%s Resource %d [%016llx-%016llx] is unassigned\n",
- pci_name(dev), i,
- (unsigned long long)res->start,
- (unsigned long long)res->end);
- res->end -= res->start;
- res->start = 0;
- res->flags |= IORESOURCE_UNSET;
- continue;
- }
- offset = 0;
- if (res->flags & IORESOURCE_MEM) {
- offset = hose->pci_mem_offset;
- } else if (res->flags & IORESOURCE_IO) {
- offset = (unsigned long) hose->io_base_virt
- - isa_io_base;
- }
- if (offset != 0) {
- res->start += offset;
- res->end += offset;
-#ifdef DEBUG
- printk("Fixup res %d (%lx) of dev %s: %lx -> %lx\n",
- i, res->flags, pci_name(dev),
- res->start - offset, res->start);
-#endif
- }
- }
-
- /* Call machine specific resource fixup */
- if (ppc_md.pcibios_fixup_resources)
- ppc_md.pcibios_fixup_resources(dev);
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
-
-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
-{
- unsigned long offset = 0;
- struct pci_controller *hose = dev->sysdata;
-
- if (hose && res->flags & IORESOURCE_IO)
- offset = (unsigned long)hose->io_base_virt - isa_io_base;
- else if (hose && res->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
- region->start = res->start - offset;
- region->end = res->end - offset;
-}
-EXPORT_SYMBOL(pcibios_resource_to_bus);
-
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
-{
- unsigned long offset = 0;
- struct pci_controller *hose = dev->sysdata;
-
- if (hose && res->flags & IORESOURCE_IO)
- offset = (unsigned long)hose->io_base_virt - isa_io_base;
- else if (hose && res->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
- res->start = region->start + offset;
- res->end = region->end + offset;
-}
-EXPORT_SYMBOL(pcibios_bus_to_resource);
-
-/*
- * We need to avoid collisions with `mirrored' VGA ports
- * and other strange ISA hardware, so we always want the
- * addresses to be allocated in the 0x000-0x0ff region
- * modulo 0x400.
- *
- * Why? Because some silly external IO cards only decode
- * the low 10 bits of the IO address. The 0x00-0xff region
- * is reserved for motherboard devices that decode all 16
- * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
- * but we want to try to avoid allocating at 0x2900-0x2bff
- * which might have be mirrored at 0x0100-0x03ff..
- */
-void pcibios_align_resource(void *data, struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- struct pci_dev *dev = data;
-
- if (res->flags & IORESOURCE_IO) {
- resource_size_t start = res->start;
-
- if (size > 0x100) {
- printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%lld bytes)\n", pci_name(dev),
- dev->resource - res, (unsigned long long)size);
- }
-
- if (start & 0x300) {
- start = (start + 0x3ff) & ~0x3ff;
- res->start = start;
- }
- }
-}
-EXPORT_SYMBOL(pcibios_align_resource);
-
-/*
- * Handle resources of PCI devices. If the world were perfect, we could
- * just allocate all the resource regions and do nothing more. It isn't.
- * On the other hand, we cannot just re-allocate all devices, as it would
- * require us to know lots of host bridge internals. So we attempt to
- * keep as much of the original configuration as possible, but tweak it
- * when it's found to be wrong.
- *
- * Known BIOS problems we have to work around:
- * - I/O or memory regions not configured
- * - regions configured, but not enabled in the command register
- * - bogus I/O addresses above 64K used
- * - expansion ROMs left enabled (this may sound harmless, but given
- * the fact the PCI specs explicitly allow address decoders to be
- * shared between expansion ROMs and other resource regions, it's
- * at least dangerous)
- *
- * Our solution:
- * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
- * This gives us fixed barriers on where we can allocate.
- * (2) Allocate resources for all enabled devices. If there is
- * a collision, just mark the resource as unallocated. Also
- * disable expansion ROMs during this step.
- * (3) Try to allocate resources for disabled devices. If the
- * resources were assigned correctly, everything goes well,
- * if they weren't, they won't disturb allocation of other
- * resources.
- * (4) Assign new addresses to resources which were either
- * not configured at all or misconfigured. If explicitly
- * requested by the user, configure expansion ROM address
- * as well.
- */
-
-static void __init
-pcibios_allocate_bus_resources(struct list_head *bus_list)
-{
- struct pci_bus *bus;
- int i;
- struct resource *res, *pr;
-
- /* Depth-First Search on bus tree */
- list_for_each_entry(bus, bus_list, node) {
- for (i = 0; i < 4; ++i) {
- if ((res = bus->resource[i]) == NULL || !res->flags
- || res->start > res->end)
- continue;
- if (bus->parent == NULL)
- pr = (res->flags & IORESOURCE_IO)?
- &ioport_resource: &iomem_resource;
- else {
- pr = pci_find_parent_resource(bus->self, res);
- if (pr == res) {
- /* this happens when the generic PCI
- * code (wrongly) decides that this
- * bridge is transparent -- paulus
- */
- continue;
- }
- }
-
- DBG("PCI: bridge rsrc %llx..%llx (%lx), parent %p\n",
- (unsigned long long)res->start,
- (unsigned long long)res->end, res->flags, pr);
- if (pr) {
- if (request_resource(pr, res) == 0)
- continue;
- /*
- * Must be a conflict with an existing entry.
- * Move that entry (or entries) under the
- * bridge resource and try again.
- */
- if (reparent_resources(pr, res) == 0)
- continue;
- }
- printk(KERN_ERR "PCI: Cannot allocate resource region "
- "%d of PCI bridge %d\n", i, bus->number);
- if (pci_relocate_bridge_resource(bus, i))
- bus->resource[i] = NULL;
- }
- pcibios_allocate_bus_resources(&bus->children);
- }
-}
-
-/*
- * Reparent resource children of pr that conflict with res
- * under res, and make res replace those children.
- */
-static int __init
-reparent_resources(struct resource *parent, struct resource *res)
-{
- struct resource *p, **pp;
- struct resource **firstpp = NULL;
-
- for (pp = &parent->child; (p = *pp) != NULL; pp = &p->sibling) {
- if (p->end < res->start)
- continue;
- if (res->end < p->start)
- break;
- if (p->start < res->start || p->end > res->end)
- return -1; /* not completely contained */
- if (firstpp == NULL)
- firstpp = pp;
- }
- if (firstpp == NULL)
- return -1; /* didn't find any conflicting entries? */
- res->parent = parent;
- res->child = *firstpp;
- res->sibling = *pp;
- *firstpp = res;
- *pp = NULL;
- for (p = res->child; p != NULL; p = p->sibling) {
- p->parent = res;
- DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n",
- p->name, (unsigned long long)p->start,
- (unsigned long long)p->end, res->name);
- }
- return 0;
-}
-
-/*
- * A bridge has been allocated a range which is outside the range
- * of its parent bridge, so it needs to be moved.
- */
-static int __init
-pci_relocate_bridge_resource(struct pci_bus *bus, int i)
-{
- struct resource *res, *pr, *conflict;
- unsigned long try, size;
- int j;
- struct pci_bus *parent = bus->parent;
-
- if (parent == NULL) {
- /* shouldn't ever happen */
- printk(KERN_ERR "PCI: can't move host bridge resource\n");
- return -1;
- }
- res = bus->resource[i];
- if (res == NULL)
- return -1;
- pr = NULL;
- for (j = 0; j < 4; j++) {
- struct resource *r = parent->resource[j];
- if (!r)
- continue;
- if ((res->flags ^ r->flags) & (IORESOURCE_IO | IORESOURCE_MEM))
- continue;
- if (!((res->flags ^ r->flags) & IORESOURCE_PREFETCH)) {
- pr = r;
- break;
- }
- if (res->flags & IORESOURCE_PREFETCH)
- pr = r;
- }
- if (pr == NULL)
- return -1;
- size = res->end - res->start;
- if (pr->start > pr->end || size > pr->end - pr->start)
- return -1;
- try = pr->end;
- for (;;) {
- res->start = try - size;
- res->end = try;
- if (probe_resource(bus->parent, pr, res, &conflict) == 0)
- break;
- if (conflict->start <= pr->start + size)
- return -1;
- try = conflict->start - 1;
- }
- if (request_resource(pr, res)) {
- DBG(KERN_ERR "PCI: huh? couldn't move to %llx..%llx\n",
- (unsigned long long)res->start,
- (unsigned long long)res->end);
- return -1; /* "can't happen" */
- }
- update_bridge_base(bus, i);
- printk(KERN_INFO "PCI: bridge %d resource %d moved to %llx..%llx\n",
- bus->number, i, (unsigned long long)res->start,
- (unsigned long long)res->end);
- return 0;
-}
-
-static int __init
-probe_resource(struct pci_bus *parent, struct resource *pr,
- struct resource *res, struct resource **conflict)
-{
- struct pci_bus *bus;
- struct pci_dev *dev;
- struct resource *r;
- int i;
-
- for (r = pr->child; r != NULL; r = r->sibling) {
- if (r->end >= res->start && res->end >= r->start) {
- *conflict = r;
- return 1;
- }
- }
- list_for_each_entry(bus, &parent->children, node) {
- for (i = 0; i < 4; ++i) {
- if ((r = bus->resource[i]) == NULL)
- continue;
- if (!r->flags || r->start > r->end || r == res)
- continue;
- if (pci_find_parent_resource(bus->self, r) != pr)
- continue;
- if (r->end >= res->start && res->end >= r->start) {
- *conflict = r;
- return 1;
- }
- }
- }
- list_for_each_entry(dev, &parent->devices, bus_list) {
- for (i = 0; i < 6; ++i) {
- r = &dev->resource[i];
- if (!r->flags || (r->flags & IORESOURCE_UNSET))
- continue;
- if (pci_find_parent_resource(dev, r) != pr)
- continue;
- if (r->end >= res->start && res->end >= r->start) {
- *conflict = r;
- return 1;
- }
- }
- }
- return 0;
-}
-
-static void __init
-update_bridge_base(struct pci_bus *bus, int i)
-{
- struct resource *res = bus->resource[i];
- u8 io_base_lo, io_limit_lo;
- u16 mem_base, mem_limit;
- u16 cmd;
- unsigned long start, end, off;
- struct pci_dev *dev = bus->self;
- struct pci_controller *hose = dev->sysdata;
-
- if (!hose) {
- printk("update_bridge_base: no hose?\n");
- return;
- }
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- pci_write_config_word(dev, PCI_COMMAND,
- cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY));
- if (res->flags & IORESOURCE_IO) {
- off = (unsigned long) hose->io_base_virt - isa_io_base;
- start = res->start - off;
- end = res->end - off;
- io_base_lo = (start >> 8) & PCI_IO_RANGE_MASK;
- io_limit_lo = (end >> 8) & PCI_IO_RANGE_MASK;
- if (end > 0xffff) {
- pci_write_config_word(dev, PCI_IO_BASE_UPPER16,
- start >> 16);
- pci_write_config_word(dev, PCI_IO_LIMIT_UPPER16,
- end >> 16);
- io_base_lo |= PCI_IO_RANGE_TYPE_32;
- } else
- io_base_lo |= PCI_IO_RANGE_TYPE_16;
- pci_write_config_byte(dev, PCI_IO_BASE, io_base_lo);
- pci_write_config_byte(dev, PCI_IO_LIMIT, io_limit_lo);
-
- } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
- == IORESOURCE_MEM) {
- off = hose->pci_mem_offset;
- mem_base = ((res->start - off) >> 16) & PCI_MEMORY_RANGE_MASK;
- mem_limit = ((res->end - off) >> 16) & PCI_MEMORY_RANGE_MASK;
- pci_write_config_word(dev, PCI_MEMORY_BASE, mem_base);
- pci_write_config_word(dev, PCI_MEMORY_LIMIT, mem_limit);
-
- } else if ((res->flags & (IORESOURCE_MEM | IORESOURCE_PREFETCH))
- == (IORESOURCE_MEM | IORESOURCE_PREFETCH)) {
- off = hose->pci_mem_offset;
- mem_base = ((res->start - off) >> 16) & PCI_PREF_RANGE_MASK;
- mem_limit = ((res->end - off) >> 16) & PCI_PREF_RANGE_MASK;
- pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, mem_base);
- pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, mem_limit);
-
- } else {
- DBG(KERN_ERR "PCI: ugh, bridge %s res %d has flags=%lx\n",
- pci_name(dev), i, res->flags);
- }
- pci_write_config_word(dev, PCI_COMMAND, cmd);
-}
-
-static inline void alloc_resource(struct pci_dev *dev, int idx)
-{
- struct resource *pr, *r = &dev->resource[idx];
-
- DBG("PCI:%s: Resource %d: %016llx-%016llx (f=%lx)\n",
- pci_name(dev), idx, (unsigned long long)r->start,
- (unsigned long long)r->end, r->flags);
- pr = pci_find_parent_resource(dev, r);
- if (!pr || request_resource(pr, r) < 0) {
- printk(KERN_ERR "PCI: Cannot allocate resource region %d"
- " of device %s\n", idx, pci_name(dev));
- if (pr)
- DBG("PCI: parent is %p: %016llx-%016llx (f=%lx)\n",
- pr, (unsigned long long)pr->start,
- (unsigned long long)pr->end, pr->flags);
- /* We'll assign a new address later */
- r->flags |= IORESOURCE_UNSET;
- r->end -= r->start;
- r->start = 0;
- }
-}
-
-static void __init
-pcibios_allocate_resources(int pass)
-{
- struct pci_dev *dev = NULL;
- int idx, disabled;
- u16 command;
- struct resource *r;
-
- for_each_pci_dev(dev) {
- pci_read_config_word(dev, PCI_COMMAND, &command);
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
- if (r->parent) /* Already allocated */
- continue;
- if (!r->flags || (r->flags & IORESOURCE_UNSET))
- continue; /* Not assigned at all */
- if (r->flags & IORESOURCE_IO)
- disabled = !(command & PCI_COMMAND_IO);
- else
- disabled = !(command & PCI_COMMAND_MEMORY);
- if (pass == disabled)
- alloc_resource(dev, idx);
- }
- if (pass)
- continue;
- r = &dev->resource[PCI_ROM_RESOURCE];
- if (r->flags & IORESOURCE_ROM_ENABLE) {
- /* Turn the ROM off, leave the resource region, but keep it unregistered. */
- u32 reg;
- DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
- r->flags &= ~IORESOURCE_ROM_ENABLE;
- pci_read_config_dword(dev, dev->rom_base_reg, ®);
- pci_write_config_dword(dev, dev->rom_base_reg,
- reg & ~PCI_ROM_ADDRESS_ENABLE);
- }
- }
-}
-
-static void __init
-pcibios_assign_resources(void)
-{
- struct pci_dev *dev = NULL;
- int idx;
- struct resource *r;
-
- for_each_pci_dev(dev) {
- int class = dev->class >> 8;
-
- /* Don't touch classless devices and host bridges */
- if (!class || class == PCI_CLASS_BRIDGE_HOST)
- continue;
-
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
-
- /*
- * We shall assign a new address to this resource,
- * either because the BIOS (sic) forgot to do so
- * or because we have decided the old address was
- * unusable for some reason.
- */
- if ((r->flags & IORESOURCE_UNSET) && r->end &&
- (!ppc_md.pcibios_enable_device_hook ||
- !ppc_md.pcibios_enable_device_hook(dev, 1))) {
- r->flags &= ~IORESOURCE_UNSET;
- pci_assign_resource(dev, idx);
- }
- }
-
-#if 0 /* don't assign ROMs */
- r = &dev->resource[PCI_ROM_RESOURCE];
- r->end -= r->start;
- r->start = 0;
- if (r->end)
- pci_assign_resource(dev, PCI_ROM_RESOURCE);
-#endif
- }
-}
-
-
-static int next_controller_index;
-
-struct pci_controller * __init
-pcibios_alloc_controller(void)
-{
- struct pci_controller *hose;
-
- hose = (struct pci_controller *)alloc_bootmem(sizeof(*hose));
- memset(hose, 0, sizeof(struct pci_controller));
-
- *hose_tail = hose;
- hose_tail = &hose->next;
-
- hose->index = next_controller_index++;
-
- return hose;
-}
-
-void pcibios_make_OF_bus_map(void)
-{
-}
-
-static int __init
-pcibios_init(void)
-{
- struct pci_controller *hose;
- struct pci_bus *bus;
- int next_busno;
-
- printk(KERN_INFO "PCI: Probing PCI hardware\n");
-
- /* Scan all of the recorded PCI controllers. */
- for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
- if (pci_assign_all_buses)
- hose->first_busno = next_busno;
- hose->last_busno = 0xff;
- bus = pci_scan_bus(hose->first_busno, hose->ops, hose);
- hose->last_busno = bus->subordinate;
- if (pci_assign_all_buses || next_busno <= hose->last_busno)
- next_busno = hose->last_busno + pcibios_assign_bus_offset;
- }
- pci_bus_count = next_busno;
-
- /* OpenFirmware based machines need a map of OF bus
- * numbers vs. kernel bus numbers since we may have to
- * remap them.
- */
- if (pci_assign_all_buses && have_of)
- pcibios_make_OF_bus_map();
-
- /* Do machine dependent PCI interrupt routing */
- if (ppc_md.pci_swizzle && ppc_md.pci_map_irq)
- pci_fixup_irqs(ppc_md.pci_swizzle, ppc_md.pci_map_irq);
-
- /* Call machine dependent fixup */
- if (ppc_md.pcibios_fixup)
- ppc_md.pcibios_fixup();
-
- /* Allocate and assign resources */
- pcibios_allocate_bus_resources(&pci_root_buses);
- pcibios_allocate_resources(0);
- pcibios_allocate_resources(1);
- pcibios_assign_resources();
-
- /* Call machine dependent post-init code */
- if (ppc_md.pcibios_after_init)
- ppc_md.pcibios_after_init();
-
- return 0;
-}
-
-subsys_initcall(pcibios_init);
-
-unsigned char __init
-common_swizzle(struct pci_dev *dev, unsigned char *pinp)
-{
- struct pci_controller *hose = dev->sysdata;
-
- if (dev->bus->number != hose->first_busno) {
- u8 pin = *pinp;
- do {
- pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
- /* Move up the chain of bridges. */
- dev = dev->bus->self;
- } while (dev->bus->self);
- *pinp = pin;
-
- /* The slot is the idsel of the last bridge. */
- }
- return PCI_SLOT(dev->devfn);
-}
-
-unsigned long resource_fixup(struct pci_dev * dev, struct resource * res,
- unsigned long start, unsigned long size)
-{
- return start;
-}
-
-void __init pcibios_fixup_bus(struct pci_bus *bus)
-{
- struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
- unsigned long io_offset;
- struct resource *res;
- int i;
-
- io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
- if (bus->parent == NULL) {
- /* This is a host bridge - fill in its resources */
- hose->bus = bus;
-
- bus->resource[0] = res = &hose->io_resource;
- if (!res->flags) {
- if (io_offset)
- printk(KERN_ERR "I/O resource not set for host"
- " bridge %d\n", hose->index);
- res->start = 0;
- res->end = IO_SPACE_LIMIT;
- res->flags = IORESOURCE_IO;
- }
- res->start += io_offset;
- res->end += io_offset;
-
- for (i = 0; i < 3; ++i) {
- res = &hose->mem_resources[i];
- if (!res->flags) {
- if (i > 0)
- continue;
- printk(KERN_ERR "Memory resource not set for "
- "host bridge %d\n", hose->index);
- res->start = hose->pci_mem_offset;
- res->end = ~0U;
- res->flags = IORESOURCE_MEM;
- }
- bus->resource[i+1] = res;
- }
- } else {
- /* This is a subordinate bridge */
- pci_read_bridge_bases(bus);
-
- for (i = 0; i < 4; ++i) {
- if ((res = bus->resource[i]) == NULL)
- continue;
- if (!res->flags)
- continue;
- if (io_offset && (res->flags & IORESOURCE_IO)) {
- res->start += io_offset;
- res->end += io_offset;
- } else if (hose->pci_mem_offset
- && (res->flags & IORESOURCE_MEM)) {
- res->start += hose->pci_mem_offset;
- res->end += hose->pci_mem_offset;
- }
- }
- }
-
- if (ppc_md.pcibios_fixup_bus)
- ppc_md.pcibios_fixup_bus(bus);
-}
-
-char __init *pcibios_setup(char *str)
-{
- return str;
-}
-
-/* the next one is stolen from the alpha port... */
-void __init
-pcibios_update_irq(struct pci_dev *dev, int irq)
-{
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
- /* XXX FIXME - update OF device tree node interrupt property */
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- if (ppc_md.pcibios_enable_device_hook)
- if (ppc_md.pcibios_enable_device_hook(dev, 0))
- return -EINVAL;
-
- return pci_enable_resources(dev, mask);
-}
-
-struct pci_controller*
-pci_bus_to_hose(int bus)
-{
- struct pci_controller* hose = hose_head;
-
- for (; hose; hose = hose->next)
- if (bus >= hose->first_busno && bus <= hose->last_busno)
- return hose;
- return NULL;
-}
-
-void __iomem *
-pci_bus_io_base(unsigned int bus)
-{
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
- if (!hose)
- return NULL;
- return hose->io_base_virt;
-}
-
-unsigned long
-pci_bus_io_base_phys(unsigned int bus)
-{
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
- if (!hose)
- return 0;
- return hose->io_base_phys;
-}
-
-unsigned long
-pci_bus_mem_base_phys(unsigned int bus)
-{
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
- if (!hose)
- return 0;
- return hose->pci_mem_offset;
-}
-
-unsigned long
-pci_resource_to_bus(struct pci_dev *pdev, struct resource *res)
-{
- /* Hack alert again ! See comments in chrp_pci.c
- */
- struct pci_controller* hose =
- (struct pci_controller *)pdev->sysdata;
- if (hose && res->flags & IORESOURCE_MEM)
- return res->start - hose->pci_mem_offset;
- /* We may want to do something with IOs here... */
- return res->start;
-}
-
-
-static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
- resource_size_t *offset,
- enum pci_mmap_state mmap_state)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
- unsigned long io_offset = 0;
- int i, res_bit;
-
- if (hose == 0)
- return NULL; /* should never happen */
-
- /* If memory, add on the PCI bridge address offset */
- if (mmap_state == pci_mmap_mem) {
-#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
- *offset += hose->pci_mem_offset;
-#endif
- res_bit = IORESOURCE_MEM;
- } else {
- io_offset = hose->io_base_virt - ___IO_BASE;
- *offset += io_offset;
- res_bit = IORESOURCE_IO;
- }
-
- /*
- * Check that the offset requested corresponds to one of the
- * resources of the device.
- */
- for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
- struct resource *rp = &dev->resource[i];
- int flags = rp->flags;
-
- /* treat ROM as memory (should be already) */
- if (i == PCI_ROM_RESOURCE)
- flags |= IORESOURCE_MEM;
-
- /* Active and same type? */
- if ((flags & res_bit) == 0)
- continue;
-
- /* In the range of this resource? */
- if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
- continue;
-
- /* found it! construct the final physical address */
- if (mmap_state == pci_mmap_io)
- *offset += hose->io_base_phys - io_offset;
- return rp;
- }
-
- return NULL;
-}
-
-/*
- * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
- * device mapping.
- */
-static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
- pgprot_t protection,
- enum pci_mmap_state mmap_state,
- int write_combine)
-{
- unsigned long prot = pgprot_val(protection);
-
- /* Write combine is always 0 on non-memory space mappings. On
- * memory space, if the user didn't pass 1, we check for a
- * "prefetchable" resource. This is a bit hackish, but we use
- * this to workaround the inability of /sysfs to provide a write
- * combine bit
- */
- if (mmap_state != pci_mmap_mem)
- write_combine = 0;
- else if (write_combine == 0) {
- if (rp->flags & IORESOURCE_PREFETCH)
- write_combine = 1;
- }
-
- /* XXX would be nice to have a way to ask for write-through */
- prot |= _PAGE_NO_CACHE;
- if (write_combine)
- prot &= ~_PAGE_GUARDED;
- else
- prot |= _PAGE_GUARDED;
-
- printk("PCI map for %s:%llx, prot: %lx\n", pci_name(dev),
- (unsigned long long)rp->start, prot);
-
- return __pgprot(prot);
-}
-
-/*
- * This one is used by /dev/mem and fbdev who have no clue about the
- * PCI device, it tries to find the PCI device first and calls the
- * above routine
- */
-pgprot_t pci_phys_mem_access_prot(struct file *file,
- unsigned long pfn,
- unsigned long size,
- pgprot_t protection)
-{
- struct pci_dev *pdev = NULL;
- struct resource *found = NULL;
- unsigned long prot = pgprot_val(protection);
- unsigned long offset = pfn << PAGE_SHIFT;
- int i;
-
- if (page_is_ram(pfn))
- return prot;
-
- prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
-
- for_each_pci_dev(pdev) {
- for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
- struct resource *rp = &pdev->resource[i];
- int flags = rp->flags;
-
- /* Active and same type? */
- if ((flags & IORESOURCE_MEM) == 0)
- continue;
- /* In the range of this resource? */
- if (offset < (rp->start & PAGE_MASK) ||
- offset > rp->end)
- continue;
- found = rp;
- break;
- }
- if (found)
- break;
- }
- if (found) {
- if (found->flags & IORESOURCE_PREFETCH)
- prot &= ~_PAGE_GUARDED;
- pci_dev_put(pdev);
- }
-
- DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
-
- return __pgprot(prot);
-}
-
-
-/*
- * Perform the actual remap of the pages for a PCI device mapping, as
- * appropriate for this architecture. The region in the process to map
- * is described by vm_start and vm_end members of VMA, the base physical
- * address is found in vm_pgoff.
- * The pci device structure is provided so that architectures may make mapping
- * decisions on a per-device or per-bus basis.
- *
- * Returns a negative error code on failure, zero on success.
- */
-int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
- enum pci_mmap_state mmap_state,
- int write_combine)
-{
- resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
- struct resource *rp;
- int ret;
-
- rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
- if (rp == NULL)
- return -EINVAL;
-
- vma->vm_pgoff = offset >> PAGE_SHIFT;
- vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
- vma->vm_page_prot,
- mmap_state, write_combine);
-
- ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
- vma->vm_end - vma->vm_start, vma->vm_page_prot);
-
- return ret;
-}
-
-/* Obsolete functions. Should be removed once the symbios driver
- * is fixed
- */
-unsigned long
-phys_to_bus(unsigned long pa)
-{
- struct pci_controller *hose;
- int i;
-
- for (hose = hose_head; hose; hose = hose->next) {
- for (i = 0; i < 3; ++i) {
- if (pa >= hose->mem_resources[i].start
- && pa <= hose->mem_resources[i].end) {
- /*
- * XXX the hose->pci_mem_offset really
- * only applies to mem_resources[0].
- * We need a way to store an offset for
- * the others. -- paulus
- */
- if (i == 0)
- pa -= hose->pci_mem_offset;
- return pa;
- }
- }
- }
- /* hmmm, didn't find it */
- return 0;
-}
-
-unsigned long
-pci_phys_to_bus(unsigned long pa, int busnr)
-{
- struct pci_controller* hose = pci_bus_to_hose(busnr);
- if (!hose)
- return pa;
- return pa - hose->pci_mem_offset;
-}
-
-unsigned long
-pci_bus_to_phys(unsigned int ba, int busnr)
-{
- struct pci_controller* hose = pci_bus_to_hose(busnr);
- if (!hose)
- return ba;
- return ba + hose->pci_mem_offset;
-}
-
-/* Provide information on locations of various I/O regions in physical
- * memory. Do this on a per-card basis so that we choose the right
- * root bridge.
- * Note that the returned IO or memory base is a physical address
- */
-
-long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
-{
- struct pci_controller* hose;
- long result = -EOPNOTSUPP;
-
- hose = pci_bus_to_hose(bus);
- if (!hose)
- return -ENODEV;
-
- switch (which) {
- case IOBASE_BRIDGE_NUMBER:
- return (long)hose->first_busno;
- case IOBASE_MEMORY:
- return (long)hose->pci_mem_offset;
- case IOBASE_IO:
- return (long)hose->io_base_phys;
- case IOBASE_ISA_IO:
- return (long)isa_io_base;
- case IOBASE_ISA_MEM:
- return (long)isa_mem_base;
- }
-
- return result;
-}
-
-void pci_resource_to_user(const struct pci_dev *dev, int bar,
- const struct resource *rsrc,
- resource_size_t *start, resource_size_t *end)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
- resource_size_t offset = 0;
-
- if (hose == NULL)
- return;
-
- if (rsrc->flags & IORESOURCE_IO)
- offset = (unsigned long)hose->io_base_virt - _IO_BASE;
-
- /* We pass a fully fixed up address to userland for MMIO instead of
- * a BAR value because X is lame and expects to be able to use that
- * to pass to /dev/mem !
- *
- * That means that we'll have potentially 64 bits values where some
- * userland apps only expect 32 (like X itself since it thinks only
- * Sparc has 64 bits MMIO) but if we don't do that, we break it on
- * 32 bits CHRPs :-(
- *
- * Hopefully, the sysfs insterface is immune to that gunk. Once X
- * has been fixed (and the fix spread enough), we can re-enable the
- * 2 lines below and pass down a BAR value to userland. In that case
- * we'll also have to re-enable the matching code in
- * __pci_mmap_make_offset().
- *
- * BenH.
- */
-#if 0
- else if (rsrc->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
-#endif
-
- *start = rsrc->start - offset;
- *end = rsrc->end - offset;
-}
-
-void __init pci_init_resource(struct resource *res, resource_size_t start,
- resource_size_t end, int flags, char *name)
-{
- res->start = start;
- res->end = end;
- res->flags = flags;
- res->name = name;
- res->parent = NULL;
- res->sibling = NULL;
- res->child = NULL;
-}
-
-void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
-{
- resource_size_t start = pci_resource_start(dev, bar);
- resource_size_t len = pci_resource_len(dev, bar);
- unsigned long flags = pci_resource_flags(dev, bar);
-
- if (!len)
- return NULL;
- if (max && len > max)
- len = max;
- if (flags & IORESOURCE_IO)
- return ioport_map(start, len);
- if (flags & IORESOURCE_MEM)
- /* Not checking IORESOURCE_CACHEABLE because PPC does
- * not currently distinguish between ioremap and
- * ioremap_nocache.
- */
- return ioremap(start, len);
- /* What? */
- return NULL;
-}
-
-void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
-{
- /* Nothing to do */
-}
-EXPORT_SYMBOL(pci_iomap);
-EXPORT_SYMBOL(pci_iounmap);
-
-unsigned long pci_address_to_pio(phys_addr_t address)
-{
- struct pci_controller* hose = hose_head;
-
- for (; hose; hose = hose->next) {
- unsigned int size = hose->io_resource.end -
- hose->io_resource.start + 1;
- if (address >= hose->io_base_phys &&
- address < (hose->io_base_phys + size)) {
- unsigned long base =
- (unsigned long)hose->io_base_virt - _IO_BASE;
- return base + (address - hose->io_base_phys);
- }
- }
- return (unsigned int)-1;
-}
-EXPORT_SYMBOL(pci_address_to_pio);
-
-/*
- * Null PCI config access functions, for the case when we can't
- * find a hose.
- */
-#define NULL_PCI_OP(rw, size, type) \
-static int \
-null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
-{ \
- return PCIBIOS_DEVICE_NOT_FOUND; \
-}
-
-static int
-null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 *val)
-{
- return PCIBIOS_DEVICE_NOT_FOUND;
-}
-
-static int
-null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 val)
-{
- return PCIBIOS_DEVICE_NOT_FOUND;
-}
-
-static struct pci_ops null_pci_ops =
-{
- null_read_config,
- null_write_config
-};
-
-/*
- * These functions are used early on before PCI scanning is done
- * and all of the pci_dev and pci_bus structures have been created.
- */
-static struct pci_bus *
-fake_pci_bus(struct pci_controller *hose, int busnr)
-{
- static struct pci_bus bus;
-
- if (hose == 0) {
- hose = pci_bus_to_hose(busnr);
- if (hose == 0)
- printk(KERN_ERR "Can't find hose for PCI bus %d!\n", busnr);
- }
- bus.number = busnr;
- bus.sysdata = hose;
- bus.ops = hose? hose->ops: &null_pci_ops;
- return &bus;
-}
-
-#define EARLY_PCI_OP(rw, size, type) \
-int early_##rw##_config_##size(struct pci_controller *hose, int bus, \
- int devfn, int offset, type value) \
-{ \
- return pci_bus_##rw##_config_##size(fake_pci_bus(hose, bus), \
- devfn, offset, value); \
-}
-
-EARLY_PCI_OP(read, byte, u8 *)
-EARLY_PCI_OP(read, word, u16 *)
-EARLY_PCI_OP(read, dword, u32 *)
-EARLY_PCI_OP(write, byte, u8)
-EARLY_PCI_OP(write, word, u16)
-EARLY_PCI_OP(write, dword, u32)
diff --git a/arch/ppc/kernel/ppc-stub.c b/arch/ppc/kernel/ppc-stub.c
deleted file mode 100644
index 5f9ee7b..0000000
--- a/arch/ppc/kernel/ppc-stub.c
+++ /dev/null
@@ -1,866 +0,0 @@
-/*
- * ppc-stub.c: KGDB support for the Linux kernel.
- *
- * adapted from arch/sparc/kernel/sparc-stub.c for the PowerPC
- * some stuff borrowed from Paul Mackerras' xmon
- * Copyright (C) 1998 Michael AK Tesch (tesch@cs.wisc.edu)
- *
- * Modifications to run under Linux
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- *
- * This file originally came from the gdb sources, and the
- * copyright notices have been retained below.
- */
-
-/****************************************************************************
-
- THIS SOFTWARE IS NOT COPYRIGHTED
-
- HP offers the following for use in the public domain. HP makes no
- warranty with regard to the software or its performance and the
- user accepts the software "AS IS" with all faults.
-
- HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD
- TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
-
-****************************************************************************/
-
-/****************************************************************************
- * Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $
- *
- * Module name: remcom.c $
- * Revision: 1.34 $
- * Date: 91/03/09 12:29:49 $
- * Contributor: Lake Stevens Instrument Division$
- *
- * Description: low level support for gdb debugger. $
- *
- * Considerations: only works on target hardware $
- *
- * Written by: Glenn Engel $
- * ModuleState: Experimental $
- *
- * NOTES: See Below $
- *
- * Modified for SPARC by Stu Grossman, Cygnus Support.
- *
- * This code has been extensively tested on the Fujitsu SPARClite demo board.
- *
- * To enable debugger support, two things need to happen. One, a
- * call to set_debug_traps() is necessary in order to allow any breakpoints
- * or error conditions to be properly intercepted and reported to gdb.
- * Two, a breakpoint needs to be generated to begin communication. This
- * is most easily accomplished by a call to breakpoint(). Breakpoint()
- * simulates a breakpoint by executing a trap #1.
- *
- *************
- *
- * The following gdb commands are supported:
- *
- * command function Return value
- *
- * g return the value of the CPU registers hex data or ENN
- * G set the value of the CPU registers OK or ENN
- * qOffsets Get section offsets. Reply is Text=xxx;Data=yyy;Bss=zzz
- *
- * mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
- * MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
- *
- * c Resume at current address SNN ( signal NN)
- * cAA..AA Continue at address AA..AA SNN
- *
- * s Step one instruction SNN
- * sAA..AA Step one instruction from AA..AA SNN
- *
- * k kill
- *
- * ? What was the last sigval ? SNN (signal NN)
- *
- * bBB..BB Set baud rate to BB..BB OK or BNN, then sets
- * baud rate
- *
- * All commands and responses are sent with a packet which includes a
- * checksum. A packet consists of
- *
- * $<packet info>#<checksum>.
- *
- * where
- * <packet info> :: <characters representing the command or response>
- * <checksum> :: <two hex digits computed as modulo 256 sum of <packetinfo>>
- *
- * When a packet is received, it is first acknowledged with either '+' or '-'.
- * '+' indicates a successful transfer. '-' indicates a failed transfer.
- *
- * Example:
- *
- * Host: Reply:
- * $m0,10#2a +$00010203040506070809101112131415#42
- *
- ****************************************************************************/
-
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/init.h>
-#include <linux/sysrq.h>
-
-#include <asm/cacheflush.h>
-#include <asm/system.h>
-#include <asm/signal.h>
-#include <asm/kgdb.h>
-#include <asm/pgtable.h>
-#include <asm/ptrace.h>
-
-void breakinst(void);
-
-/*
- * BUFMAX defines the maximum number of characters in inbound/outbound buffers
- * at least NUMREGBYTES*2 are needed for register packets
- */
-#define BUFMAX 2048
-static char remcomInBuffer[BUFMAX];
-static char remcomOutBuffer[BUFMAX];
-
-static int initialized;
-static int kgdb_active;
-static int kgdb_started;
-static u_int fault_jmp_buf[100];
-static int kdebug;
-
-
-static const char hexchars[]="0123456789abcdef";
-
-/* Place where we save old trap entries for restoration - sparc*/
-/* struct tt_entry kgdb_savettable[256]; */
-/* typedef void (*trapfunc_t)(void); */
-
-static void kgdb_fault_handler(struct pt_regs *regs);
-static int handle_exception (struct pt_regs *regs);
-
-#if 0
-/* Install an exception handler for kgdb */
-static void exceptionHandler(int tnum, unsigned int *tfunc)
-{
- /* We are dorking with a live trap table, all irqs off */
-}
-#endif
-
-int
-kgdb_setjmp(long *buf)
-{
- asm ("mflr 0; stw 0,0(%0);"
- "stw 1,4(%0); stw 2,8(%0);"
- "mfcr 0; stw 0,12(%0);"
- "stmw 13,16(%0)"
- : : "r" (buf));
- /* XXX should save fp regs as well */
- return 0;
-}
-void
-kgdb_longjmp(long *buf, int val)
-{
- if (val == 0)
- val = 1;
- asm ("lmw 13,16(%0);"
- "lwz 0,12(%0); mtcrf 0x38,0;"
- "lwz 0,0(%0); lwz 1,4(%0); lwz 2,8(%0);"
- "mtlr 0; mr 3,%1"
- : : "r" (buf), "r" (val));
-}
-/* Convert ch from a hex digit to an int */
-static int
-hex(unsigned char ch)
-{
- if (ch >= 'a' && ch <= 'f')
- return ch-'a'+10;
- if (ch >= '0' && ch <= '9')
- return ch-'0';
- if (ch >= 'A' && ch <= 'F')
- return ch-'A'+10;
- return -1;
-}
-
-/* Convert the memory pointed to by mem into hex, placing result in buf.
- * Return a pointer to the last char put in buf (null), in case of mem fault,
- * return 0.
- */
-static unsigned char *
-mem2hex(const char *mem, char *buf, int count)
-{
- unsigned char ch;
- unsigned short tmp_s;
- unsigned long tmp_l;
-
- if (kgdb_setjmp((long*)fault_jmp_buf) == 0) {
- debugger_fault_handler = kgdb_fault_handler;
-
- /* Accessing 16 bit and 32 bit objects in a single
- ** load instruction is required to avoid bad side
- ** effects for some IO registers.
- */
-
- if ((count == 2) && (((long)mem & 1) == 0)) {
- tmp_s = *(unsigned short *)mem;
- mem += 2;
- *buf++ = hexchars[(tmp_s >> 12) & 0xf];
- *buf++ = hexchars[(tmp_s >> 8) & 0xf];
- *buf++ = hexchars[(tmp_s >> 4) & 0xf];
- *buf++ = hexchars[tmp_s & 0xf];
-
- } else if ((count == 4) && (((long)mem & 3) == 0)) {
- tmp_l = *(unsigned int *)mem;
- mem += 4;
- *buf++ = hexchars[(tmp_l >> 28) & 0xf];
- *buf++ = hexchars[(tmp_l >> 24) & 0xf];
- *buf++ = hexchars[(tmp_l >> 20) & 0xf];
- *buf++ = hexchars[(tmp_l >> 16) & 0xf];
- *buf++ = hexchars[(tmp_l >> 12) & 0xf];
- *buf++ = hexchars[(tmp_l >> 8) & 0xf];
- *buf++ = hexchars[(tmp_l >> 4) & 0xf];
- *buf++ = hexchars[tmp_l & 0xf];
-
- } else {
- while (count-- > 0) {
- ch = *mem++;
- *buf++ = hexchars[ch >> 4];
- *buf++ = hexchars[ch & 0xf];
- }
- }
-
- } else {
- /* error condition */
- }
- debugger_fault_handler = NULL;
- *buf = 0;
- return buf;
-}
-
-/* convert the hex array pointed to by buf into binary to be placed in mem
- * return a pointer to the character AFTER the last byte written.
-*/
-static char *
-hex2mem(char *buf, char *mem, int count)
-{
- unsigned char ch;
- int i;
- char *orig_mem;
- unsigned short tmp_s;
- unsigned long tmp_l;
-
- orig_mem = mem;
-
- if (kgdb_setjmp((long*)fault_jmp_buf) == 0) {
- debugger_fault_handler = kgdb_fault_handler;
-
- /* Accessing 16 bit and 32 bit objects in a single
- ** store instruction is required to avoid bad side
- ** effects for some IO registers.
- */
-
- if ((count == 2) && (((long)mem & 1) == 0)) {
- tmp_s = hex(*buf++) << 12;
- tmp_s |= hex(*buf++) << 8;
- tmp_s |= hex(*buf++) << 4;
- tmp_s |= hex(*buf++);
-
- *(unsigned short *)mem = tmp_s;
- mem += 2;
-
- } else if ((count == 4) && (((long)mem & 3) == 0)) {
- tmp_l = hex(*buf++) << 28;
- tmp_l |= hex(*buf++) << 24;
- tmp_l |= hex(*buf++) << 20;
- tmp_l |= hex(*buf++) << 16;
- tmp_l |= hex(*buf++) << 12;
- tmp_l |= hex(*buf++) << 8;
- tmp_l |= hex(*buf++) << 4;
- tmp_l |= hex(*buf++);
-
- *(unsigned long *)mem = tmp_l;
- mem += 4;
-
- } else {
- for (i=0; i<count; i++) {
- ch = hex(*buf++) << 4;
- ch |= hex(*buf++);
- *mem++ = ch;
- }
- }
-
-
- /*
- ** Flush the data cache, invalidate the instruction cache.
- */
- flush_icache_range((int)orig_mem, (int)orig_mem + count - 1);
-
- } else {
- /* error condition */
- }
- debugger_fault_handler = NULL;
- return mem;
-}
-
-/*
- * While we find nice hex chars, build an int.
- * Return number of chars processed.
- */
-static int
-hexToInt(char **ptr, int *intValue)
-{
- int numChars = 0;
- int hexValue;
-
- *intValue = 0;
-
- if (kgdb_setjmp((long*)fault_jmp_buf) == 0) {
- debugger_fault_handler = kgdb_fault_handler;
- while (**ptr) {
- hexValue = hex(**ptr);
- if (hexValue < 0)
- break;
-
- *intValue = (*intValue << 4) | hexValue;
- numChars ++;
-
- (*ptr)++;
- }
- } else {
- /* error condition */
- }
- debugger_fault_handler = NULL;
-
- return (numChars);
-}
-
-/* scan for the sequence $<data>#<checksum> */
-static void
-getpacket(char *buffer)
-{
- unsigned char checksum;
- unsigned char xmitcsum;
- int i;
- int count;
- unsigned char ch;
-
- do {
- /* wait around for the start character, ignore all other
- * characters */
- while ((ch = (getDebugChar() & 0x7f)) != '$') ;
-
- checksum = 0;
- xmitcsum = -1;
-
- count = 0;
-
- /* now, read until a # or end of buffer is found */
- while (count < BUFMAX) {
- ch = getDebugChar() & 0x7f;
- if (ch == '#')
- break;
- checksum = checksum + ch;
- buffer[count] = ch;
- count = count + 1;
- }
-
- if (count >= BUFMAX)
- continue;
-
- buffer[count] = 0;
-
- if (ch == '#') {
- xmitcsum = hex(getDebugChar() & 0x7f) << 4;
- xmitcsum |= hex(getDebugChar() & 0x7f);
- if (checksum != xmitcsum)
- putDebugChar('-'); /* failed checksum */
- else {
- putDebugChar('+'); /* successful transfer */
- /* if a sequence char is present, reply the ID */
- if (buffer[2] == ':') {
- putDebugChar(buffer[0]);
- putDebugChar(buffer[1]);
- /* remove sequence chars from buffer */
- count = strlen(buffer);
- for (i=3; i <= count; i++)
- buffer[i-3] = buffer[i];
- }
- }
- }
- } while (checksum != xmitcsum);
-}
-
-/* send the packet in buffer. */
-static void putpacket(unsigned char *buffer)
-{
- unsigned char checksum;
- int count;
- unsigned char ch, recv;
-
- /* $<packet info>#<checksum>. */
- do {
- putDebugChar('$');
- checksum = 0;
- count = 0;
-
- while ((ch = buffer[count])) {
- putDebugChar(ch);
- checksum += ch;
- count += 1;
- }
-
- putDebugChar('#');
- putDebugChar(hexchars[checksum >> 4]);
- putDebugChar(hexchars[checksum & 0xf]);
- recv = getDebugChar();
- } while ((recv & 0x7f) != '+');
-}
-
-static void kgdb_flush_cache_all(void)
-{
- flush_instruction_cache();
-}
-
-/* Set up exception handlers for tracing and breakpoints
- * [could be called kgdb_init()]
- */
-void set_debug_traps(void)
-{
-#if 0
- unsigned char c;
-
- save_and_cli(flags);
-
- /* In case GDB is started before us, ack any packets (presumably
- * "$?#xx") sitting there.
- *
- * I've found this code causes more problems than it solves,
- * so that's why it's commented out. GDB seems to work fine
- * now starting either before or after the kernel -bwb
- */
-
- while((c = getDebugChar()) != '$');
- while((c = getDebugChar()) != '#');
- c = getDebugChar(); /* eat first csum byte */
- c = getDebugChar(); /* eat second csum byte */
- putDebugChar('+'); /* ack it */
-#endif
- debugger = kgdb;
- debugger_bpt = kgdb_bpt;
- debugger_sstep = kgdb_sstep;
- debugger_iabr_match = kgdb_iabr_match;
- debugger_dabr_match = kgdb_dabr_match;
-
- initialized = 1;
-}
-
-static void kgdb_fault_handler(struct pt_regs *regs)
-{
- kgdb_longjmp((long*)fault_jmp_buf, 1);
-}
-
-int kgdb_bpt(struct pt_regs *regs)
-{
- return handle_exception(regs);
-}
-
-int kgdb_sstep(struct pt_regs *regs)
-{
- return handle_exception(regs);
-}
-
-void kgdb(struct pt_regs *regs)
-{
- handle_exception(regs);
-}
-
-int kgdb_iabr_match(struct pt_regs *regs)
-{
- printk(KERN_ERR "kgdb doesn't support iabr, what?!?\n");
- return handle_exception(regs);
-}
-
-int kgdb_dabr_match(struct pt_regs *regs)
-{
- printk(KERN_ERR "kgdb doesn't support dabr, what?!?\n");
- return handle_exception(regs);
-}
-
-/* Convert the hardware trap type code to a unix signal number. */
-/*
- * This table contains the mapping between PowerPC hardware trap types, and
- * signals, which are primarily what GDB understands.
- */
-static struct hard_trap_info
-{
- unsigned int tt; /* Trap type code for powerpc */
- unsigned char signo; /* Signal that we map this trap into */
-} hard_trap_info[] = {
-#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
- { 0x100, SIGINT }, /* critical input interrupt */
- { 0x200, SIGSEGV }, /* machine check */
- { 0x300, SIGSEGV }, /* data storage */
- { 0x400, SIGBUS }, /* instruction storage */
- { 0x500, SIGINT }, /* interrupt */
- { 0x600, SIGBUS }, /* alignment */
- { 0x700, SIGILL }, /* program */
- { 0x800, SIGILL }, /* reserved */
- { 0x900, SIGILL }, /* reserved */
- { 0xa00, SIGILL }, /* reserved */
- { 0xb00, SIGILL }, /* reserved */
- { 0xc00, SIGCHLD }, /* syscall */
- { 0xd00, SIGILL }, /* reserved */
- { 0xe00, SIGILL }, /* reserved */
- { 0xf00, SIGILL }, /* reserved */
- /*
- ** 0x1000 PIT
- ** 0x1010 FIT
- ** 0x1020 watchdog
- ** 0x1100 data TLB miss
- ** 0x1200 instruction TLB miss
- */
- { 0x2002, SIGTRAP}, /* debug */
-#else
- { 0x200, SIGSEGV }, /* machine check */
- { 0x300, SIGSEGV }, /* address error (store) */
- { 0x400, SIGBUS }, /* instruction bus error */
- { 0x500, SIGINT }, /* interrupt */
- { 0x600, SIGBUS }, /* alingment */
- { 0x700, SIGTRAP }, /* breakpoint trap */
- { 0x800, SIGFPE }, /* fpu unavail */
- { 0x900, SIGALRM }, /* decrementer */
- { 0xa00, SIGILL }, /* reserved */
- { 0xb00, SIGILL }, /* reserved */
- { 0xc00, SIGCHLD }, /* syscall */
- { 0xd00, SIGTRAP }, /* single-step/watch */
- { 0xe00, SIGFPE }, /* fp assist */
-#endif
- { 0, 0} /* Must be last */
-
-};
-
-static int computeSignal(unsigned int tt)
-{
- struct hard_trap_info *ht;
-
- for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
- if (ht->tt == tt)
- return ht->signo;
-
- return SIGHUP; /* default for things we don't know about */
-}
-
-#define PC_REGNUM 64
-#define SP_REGNUM 1
-
-/*
- * This function does all command processing for interfacing to gdb.
- */
-static int
-handle_exception (struct pt_regs *regs)
-{
- int sigval;
- int addr;
- int length;
- char *ptr;
- unsigned int msr;
-
- /* We don't handle user-mode breakpoints. */
- if (user_mode(regs))
- return 0;
-
- if (debugger_fault_handler) {
- debugger_fault_handler(regs);
- panic("kgdb longjump failed!\n");
- }
- if (kgdb_active) {
- printk(KERN_ERR "interrupt while in kgdb, returning\n");
- return 0;
- }
-
- kgdb_active = 1;
- kgdb_started = 1;
-
-#ifdef KGDB_DEBUG
- printk("kgdb: entering handle_exception; trap [0x%x]\n",
- (unsigned int)regs->trap);
-#endif
-
- kgdb_interruptible(0);
- lock_kernel();
- msr = mfmsr();
- mtmsr(msr & ~MSR_EE); /* disable interrupts */
-
- if (regs->nip == (unsigned long)breakinst) {
- /* Skip over breakpoint trap insn */
- regs->nip += 4;
- }
-
- /* reply to host that an exception has occurred */
- sigval = computeSignal(regs->trap);
- ptr = remcomOutBuffer;
-
- *ptr++ = 'T';
- *ptr++ = hexchars[sigval >> 4];
- *ptr++ = hexchars[sigval & 0xf];
- *ptr++ = hexchars[PC_REGNUM >> 4];
- *ptr++ = hexchars[PC_REGNUM & 0xf];
- *ptr++ = ':';
- ptr = mem2hex((char *)®s->nip, ptr, 4);
- *ptr++ = ';';
- *ptr++ = hexchars[SP_REGNUM >> 4];
- *ptr++ = hexchars[SP_REGNUM & 0xf];
- *ptr++ = ':';
- ptr = mem2hex(((char *)regs) + SP_REGNUM*4, ptr, 4);
- *ptr++ = ';';
- *ptr++ = 0;
-
- putpacket(remcomOutBuffer);
- if (kdebug)
- printk("remcomOutBuffer: %s\n", remcomOutBuffer);
-
- /* XXX We may want to add some features dealing with poking the
- * XXX page tables, ... (look at sparc-stub.c for more info)
- * XXX also required hacking to the gdb sources directly...
- */
-
- while (1) {
- remcomOutBuffer[0] = 0;
-
- getpacket(remcomInBuffer);
- switch (remcomInBuffer[0]) {
- case '?': /* report most recent signal */
- remcomOutBuffer[0] = 'S';
- remcomOutBuffer[1] = hexchars[sigval >> 4];
- remcomOutBuffer[2] = hexchars[sigval & 0xf];
- remcomOutBuffer[3] = 0;
- break;
-#if 0
- case 'q': /* this screws up gdb for some reason...*/
- {
- extern long _start, sdata, __bss_start;
-
- ptr = &remcomInBuffer[1];
- if (strncmp(ptr, "Offsets", 7) != 0)
- break;
-
- ptr = remcomOutBuffer;
- sprintf(ptr, "Text=%8.8x;Data=%8.8x;Bss=%8.8x",
- &_start, &sdata, &__bss_start);
- break;
- }
-#endif
- case 'd':
- /* toggle debug flag */
- kdebug ^= 1;
- break;
-
- case 'g': /* return the value of the CPU registers.
- * some of them are non-PowerPC names :(
- * they are stored in gdb like:
- * struct {
- * u32 gpr[32];
- * f64 fpr[32];
- * u32 pc, ps, cnd, lr; (ps=msr)
- * u32 cnt, xer, mq;
- * }
- */
- {
- int i;
- ptr = remcomOutBuffer;
- /* General Purpose Regs */
- ptr = mem2hex((char *)regs, ptr, 32 * 4);
- /* Floating Point Regs - FIXME */
- /*ptr = mem2hex((char *), ptr, 32 * 8);*/
- for(i=0; i<(32*8*2); i++) { /* 2chars/byte */
- ptr[i] = '0';
- }
- ptr += 32*8*2;
- /* pc, msr, cr, lr, ctr, xer, (mq is unused) */
- ptr = mem2hex((char *)®s->nip, ptr, 4);
- ptr = mem2hex((char *)®s->msr, ptr, 4);
- ptr = mem2hex((char *)®s->ccr, ptr, 4);
- ptr = mem2hex((char *)®s->link, ptr, 4);
- ptr = mem2hex((char *)®s->ctr, ptr, 4);
- ptr = mem2hex((char *)®s->xer, ptr, 4);
- }
- break;
-
- case 'G': /* set the value of the CPU registers */
- {
- ptr = &remcomInBuffer[1];
-
- /*
- * If the stack pointer has moved, you should pray.
- * (cause only god can help you).
- */
-
- /* General Purpose Regs */
- hex2mem(ptr, (char *)regs, 32 * 4);
-
- /* Floating Point Regs - FIXME?? */
- /*ptr = hex2mem(ptr, ??, 32 * 8);*/
- ptr += 32*8*2;
-
- /* pc, msr, cr, lr, ctr, xer, (mq is unused) */
- ptr = hex2mem(ptr, (char *)®s->nip, 4);
- ptr = hex2mem(ptr, (char *)®s->msr, 4);
- ptr = hex2mem(ptr, (char *)®s->ccr, 4);
- ptr = hex2mem(ptr, (char *)®s->link, 4);
- ptr = hex2mem(ptr, (char *)®s->ctr, 4);
- ptr = hex2mem(ptr, (char *)®s->xer, 4);
-
- strcpy(remcomOutBuffer,"OK");
- }
- break;
- case 'H':
- /* don't do anything, yet, just acknowledge */
- hexToInt(&ptr, &addr);
- strcpy(remcomOutBuffer,"OK");
- break;
-
- case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */
- /* Try to read %x,%x. */
-
- ptr = &remcomInBuffer[1];
-
- if (hexToInt(&ptr, &addr) && *ptr++ == ','
- && hexToInt(&ptr, &length)) {
- if (mem2hex((char *)addr, remcomOutBuffer,
- length))
- break;
- strcpy(remcomOutBuffer, "E03");
- } else
- strcpy(remcomOutBuffer, "E01");
- break;
-
- case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
- /* Try to read '%x,%x:'. */
-
- ptr = &remcomInBuffer[1];
-
- if (hexToInt(&ptr, &addr) && *ptr++ == ','
- && hexToInt(&ptr, &length)
- && *ptr++ == ':') {
- if (hex2mem(ptr, (char *)addr, length))
- strcpy(remcomOutBuffer, "OK");
- else
- strcpy(remcomOutBuffer, "E03");
- flush_icache_range(addr, addr+length);
- } else
- strcpy(remcomOutBuffer, "E02");
- break;
-
-
- case 'k': /* kill the program, actually just continue */
- case 'c': /* cAA..AA Continue; address AA..AA optional */
- /* try to read optional parameter, pc unchanged if no parm */
-
- ptr = &remcomInBuffer[1];
- if (hexToInt(&ptr, &addr))
- regs->nip = addr;
-
-/* Need to flush the instruction cache here, as we may have deposited a
- * breakpoint, and the icache probably has no way of knowing that a data ref to
- * some location may have changed something that is in the instruction cache.
- */
- kgdb_flush_cache_all();
- mtmsr(msr);
-
- kgdb_interruptible(1);
- unlock_kernel();
- kgdb_active = 0;
- if (kdebug) {
- printk("remcomInBuffer: %s\n", remcomInBuffer);
- printk("remcomOutBuffer: %s\n", remcomOutBuffer);
- }
- return 1;
-
- case 's':
- kgdb_flush_cache_all();
-#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
- mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC);
- regs->msr |= MSR_DE;
-#else
- regs->msr |= MSR_SE;
-#endif
- unlock_kernel();
- kgdb_active = 0;
- if (kdebug) {
- printk("remcomInBuffer: %s\n", remcomInBuffer);
- printk("remcomOutBuffer: %s\n", remcomOutBuffer);
- }
- return 1;
-
- case 'r': /* Reset (if user process..exit ???)*/
- panic("kgdb reset.");
- break;
- } /* switch */
- if (remcomOutBuffer[0] && kdebug) {
- printk("remcomInBuffer: %s\n", remcomInBuffer);
- printk("remcomOutBuffer: %s\n", remcomOutBuffer);
- }
- /* reply to the request */
- putpacket(remcomOutBuffer);
- } /* while(1) */
-}
-
-/* This function will generate a breakpoint exception. It is used at the
- beginning of a program to sync up with a debugger and can be used
- otherwise as a quick means to stop program execution and "break" into
- the debugger. */
-
-void
-breakpoint(void)
-{
- if (!initialized) {
- printk("breakpoint() called b4 kgdb init\n");
- return;
- }
-
- asm(" .globl breakinst \n\
- breakinst: .long 0x7d821008");
-}
-
-#ifdef CONFIG_KGDB_CONSOLE
-/* Output string in GDB O-packet format if GDB has connected. If nothing
- output, returns 0 (caller must then handle output). */
-int
-kgdb_output_string (const char* s, unsigned int count)
-{
- char buffer[512];
-
- if (!kgdb_started)
- return 0;
-
- count = (count <= (sizeof(buffer) / 2 - 2))
- ? count : (sizeof(buffer) / 2 - 2);
-
- buffer[0] = 'O';
- mem2hex (s, &buffer[1], count);
- putpacket(buffer);
-
- return 1;
-}
-#endif
-
-static void sysrq_handle_gdb(int key, struct pt_regs *pt_regs,
- struct tty_struct *tty)
-{
- printk("Entering GDB stub\n");
- breakpoint();
-}
-static struct sysrq_key_op sysrq_gdb_op = {
- .handler = sysrq_handle_gdb,
- .help_msg = "Gdb",
- .action_msg = "GDB",
-};
-
-static int gdb_register_sysrq(void)
-{
- printk("Registering GDB sysrq handler\n");
- register_sysrq_key('g', &sysrq_gdb_op);
- return 0;
-}
-module_init(gdb_register_sysrq);
diff --git a/arch/ppc/kernel/ppc_htab.c b/arch/ppc/kernel/ppc_htab.c
deleted file mode 100644
index 9ed36dd..0000000
--- a/arch/ppc/kernel/ppc_htab.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/*
- * PowerPC hash table management proc entry. Will show information
- * about the current hash table and will allow changes to it.
- *
- * Written by Cort Dougan (cort@cs.nmt.edu)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/proc_fs.h>
-#include <linux/stat.h>
-#include <linux/sysctl.h>
-#include <linux/capability.h>
-#include <linux/ctype.h>
-#include <linux/threads.h>
-#include <linux/seq_file.h>
-#include <linux/init.h>
-#include <linux/bitops.h>
-
-#include <asm/uaccess.h>
-#include <asm/mmu.h>
-#include <asm/residual.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/cputable.h>
-#include <asm/system.h>
-#include <asm/reg.h>
-
-static int ppc_htab_show(struct seq_file *m, void *v);
-static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
- size_t count, loff_t *ppos);
-extern PTE *Hash, *Hash_end;
-extern unsigned long Hash_size, Hash_mask;
-extern unsigned long _SDR1;
-extern unsigned long htab_reloads;
-extern unsigned long htab_preloads;
-extern unsigned long htab_evicts;
-extern unsigned long pte_misses;
-extern unsigned long pte_errors;
-extern unsigned int primary_pteg_full;
-extern unsigned int htab_hash_searches;
-
-static int ppc_htab_open(struct inode *inode, struct file *file)
-{
- return single_open(file, ppc_htab_show, NULL);
-}
-
-const struct file_operations ppc_htab_operations = {
- .open = ppc_htab_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .write = ppc_htab_write,
- .release = single_release,
-};
-
-static char *pmc1_lookup(unsigned long mmcr0)
-{
- switch ( mmcr0 & (0x7f<<7) )
- {
- case 0x0:
- return "none";
- case MMCR0_PMC1_CYCLES:
- return "cycles";
- case MMCR0_PMC1_ICACHEMISS:
- return "ic miss";
- case MMCR0_PMC1_DTLB:
- return "dtlb miss";
- default:
- return "unknown";
- }
-}
-
-static char *pmc2_lookup(unsigned long mmcr0)
-{
- switch ( mmcr0 & 0x3f )
- {
- case 0x0:
- return "none";
- case MMCR0_PMC2_CYCLES:
- return "cycles";
- case MMCR0_PMC2_DCACHEMISS:
- return "dc miss";
- case MMCR0_PMC2_ITLB:
- return "itlb miss";
- case MMCR0_PMC2_LOADMISSTIME:
- return "load miss time";
- default:
- return "unknown";
- }
-}
-
-/*
- * print some useful info about the hash table. This function
- * is _REALLY_ slow (see the nested for loops below) but nothing
- * in here should be really timing critical. -- Cort
- */
-static int ppc_htab_show(struct seq_file *m, void *v)
-{
- unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
-#if defined(CONFIG_PPC_STD_MMU)
- unsigned int kptes = 0, uptes = 0;
- PTE *ptr;
-#endif /* CONFIG_PPC_STD_MMU */
-
- if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
- mmcr0 = mfspr(SPRN_MMCR0);
- pmc1 = mfspr(SPRN_PMC1);
- pmc2 = mfspr(SPRN_PMC2);
- seq_printf(m,
- "604 Performance Monitoring\n"
- "MMCR0\t\t: %08lx %s%s ",
- mmcr0,
- ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
- ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
- seq_printf(m,
- "\nPMC1\t\t: %08lx (%s)\n"
- "PMC2\t\t: %08lx (%s)\n",
- pmc1, pmc1_lookup(mmcr0),
- pmc2, pmc2_lookup(mmcr0));
- }
-
-#ifdef CONFIG_PPC_STD_MMU
- /* if we don't have a htab */
- if ( Hash_size == 0 ) {
- seq_printf(m, "No Hash Table used\n");
- return 0;
- }
-
- for (ptr = Hash; ptr < Hash_end; ptr++) {
- unsigned int mctx, vsid;
-
- if (!ptr->v)
- continue;
- /* undo the esid skew */
- vsid = ptr->vsid;
- mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
- if (mctx == 0)
- kptes++;
- else
- uptes++;
- }
-
- seq_printf(m,
- "PTE Hash Table Information\n"
- "Size\t\t: %luKb\n"
- "Buckets\t\t: %lu\n"
- "Address\t\t: %08lx\n"
- "Entries\t\t: %lu\n"
- "User ptes\t: %u\n"
- "Kernel ptes\t: %u\n"
- "Percent full\t: %lu%%\n"
- , (unsigned long)(Hash_size>>10),
- (Hash_size/(sizeof(PTE)*8)),
- (unsigned long)Hash,
- Hash_size/sizeof(PTE)
- , uptes,
- kptes,
- ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
- );
-
- seq_printf(m,
- "Reloads\t\t: %lu\n"
- "Preloads\t: %lu\n"
- "Searches\t: %u\n"
- "Overflows\t: %u\n"
- "Evicts\t\t: %lu\n",
- htab_reloads, htab_preloads, htab_hash_searches,
- primary_pteg_full, htab_evicts);
-#endif /* CONFIG_PPC_STD_MMU */
-
- seq_printf(m,
- "Non-error misses: %lu\n"
- "Error misses\t: %lu\n",
- pte_misses, pte_errors);
- return 0;
-}
-
-/*
- * Allow user to define performance counters and resize the hash table
- */
-static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
- size_t count, loff_t *ppos)
-{
-#ifdef CONFIG_PPC_STD_MMU
- unsigned long tmp;
- char buffer[16];
-
- if (!capable(CAP_SYS_ADMIN))
- return -EACCES;
- if (strncpy_from_user(buffer, ubuffer, 15))
- return -EFAULT;
- buffer[15] = 0;
-
- /* don't set the htab size for now */
- if ( !strncmp( buffer, "size ", 5) )
- return -EBUSY;
-
- if ( !strncmp( buffer, "reset", 5) )
- {
- if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
- /* reset PMC1 and PMC2 */
- mtspr(SPRN_PMC1, 0);
- mtspr(SPRN_PMC2, 0);
- }
- htab_reloads = 0;
- htab_evicts = 0;
- pte_misses = 0;
- pte_errors = 0;
- }
-
- /* Everything below here requires the performance monitor feature. */
- if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
- return count;
-
- /* turn off performance monitoring */
- if ( !strncmp( buffer, "off", 3) )
- {
- mtspr(SPRN_MMCR0, 0);
- mtspr(SPRN_PMC1, 0);
- mtspr(SPRN_PMC2, 0);
- }
-
- if ( !strncmp( buffer, "user", 4) )
- {
- /* setup mmcr0 and clear the correct pmc */
- tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
- mtspr(SPRN_MMCR0, tmp);
- mtspr(SPRN_PMC1, 0);
- mtspr(SPRN_PMC2, 0);
- }
-
- if ( !strncmp( buffer, "kernel", 6) )
- {
- /* setup mmcr0 and clear the correct pmc */
- tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
- mtspr(SPRN_MMCR0, tmp);
- mtspr(SPRN_PMC1, 0);
- mtspr(SPRN_PMC2, 0);
- }
-
- /* PMC1 values */
- if ( !strncmp( buffer, "dtlb", 4) )
- {
- /* setup mmcr0 and clear the correct pmc */
- tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
- mtspr(SPRN_MMCR0, tmp);
- mtspr(SPRN_PMC1, 0);
- }
-
- if ( !strncmp( buffer, "ic miss", 7) )
- {
- /* setup mmcr0 and clear the correct pmc */
- tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
- mtspr(SPRN_MMCR0, tmp);
- mtspr(SPRN_PMC1, 0);
- }
-
- /* PMC2 values */
- if ( !strncmp( buffer, "load miss time", 14) )
- {
- /* setup mmcr0 and clear the correct pmc */
- asm volatile(
- "mfspr %0,%1\n\t" /* get current mccr0 */
- "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
- "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
- "mtspr %1,%0 \n\t" /* set new mccr0 */
- "mtspr %3,%4 \n\t" /* reset the pmc */
- : "=r" (tmp)
- : "i" (SPRN_MMCR0),
- "i" (MMCR0_PMC2_LOADMISSTIME),
- "i" (SPRN_PMC2), "r" (0) );
- }
-
- if ( !strncmp( buffer, "itlb", 4) )
- {
- /* setup mmcr0 and clear the correct pmc */
- asm volatile(
- "mfspr %0,%1\n\t" /* get current mccr0 */
- "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
- "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
- "mtspr %1,%0 \n\t" /* set new mccr0 */
- "mtspr %3,%4 \n\t" /* reset the pmc */
- : "=r" (tmp)
- : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
- "i" (SPRN_PMC2), "r" (0) );
- }
-
- if ( !strncmp( buffer, "dc miss", 7) )
- {
- /* setup mmcr0 and clear the correct pmc */
- asm volatile(
- "mfspr %0,%1\n\t" /* get current mccr0 */
- "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
- "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
- "mtspr %1,%0 \n\t" /* set new mccr0 */
- "mtspr %3,%4 \n\t" /* reset the pmc */
- : "=r" (tmp)
- : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
- "i" (SPRN_PMC2), "r" (0) );
- }
-
- return count;
-#else /* CONFIG_PPC_STD_MMU */
- return 0;
-#endif /* CONFIG_PPC_STD_MMU */
-}
-
-int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
- void __user *buffer_arg, size_t *lenp, loff_t *ppos)
-{
- int vleft, first=1, len, left, val;
- char __user *buffer = (char __user *) buffer_arg;
- #define TMPBUFLEN 256
- char buf[TMPBUFLEN], *p;
- static const char *sizestrings[4] = {
- "2MB", "256KB", "512KB", "1MB"
- };
- static const char *clockstrings[8] = {
- "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
- "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
- };
- static const char *typestrings[4] = {
- "flow-through burst SRAM", "reserved SRAM",
- "pipelined burst SRAM", "pipelined late-write SRAM"
- };
- static const char *holdstrings[4] = {
- "0.5", "1.0", "(reserved2)", "(reserved3)"
- };
-
- if (!cpu_has_feature(CPU_FTR_L2CR))
- return -EFAULT;
-
- if ( /*!table->maxlen ||*/ (*ppos && !write)) {
- *lenp = 0;
- return 0;
- }
-
- vleft = table->maxlen / sizeof(int);
- left = *lenp;
-
- for (; left /*&& vleft--*/; first=0) {
- if (write) {
- while (left) {
- char c;
- if(get_user(c, buffer))
- return -EFAULT;
- if (!isspace(c))
- break;
- left--;
- buffer++;
- }
- if (!left)
- break;
- len = left;
- if (len > TMPBUFLEN-1)
- len = TMPBUFLEN-1;
- if(copy_from_user(buf, buffer, len))
- return -EFAULT;
- buf[len] = 0;
- p = buf;
- if (*p < '0' || *p > '9')
- break;
- val = simple_strtoul(p, &p, 0);
- len = p-buf;
- if ((len < left) && *p && !isspace(*p))
- break;
- buffer += len;
- left -= len;
- _set_L2CR(val);
- } else {
- p = buf;
- if (!first)
- *p++ = '\t';
- val = _get_L2CR();
- p += sprintf(p, "0x%08x: ", val);
- p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
- "disabled");
- p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
- p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
- p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
- p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
- p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
- p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
- p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
- "copy-back");
- p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
- p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
- p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
- p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
- p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
-
- p += sprintf(p,"\n");
-
- len = strlen(buf);
- if (len > left)
- len = left;
- if (copy_to_user(buffer, buf, len))
- return -EFAULT;
- left -= len;
- buffer += len;
- break;
- }
- }
-
- if (!write && !first && left) {
- if(put_user('\n', (char __user *) buffer))
- return -EFAULT;
- left--, buffer++;
- }
- if (write) {
- char __user *s = (char __user *) buffer;
- while (left) {
- char c;
- if(get_user(c, s++))
- return -EFAULT;
- if (!isspace(c))
- break;
- left--;
- }
- }
- if (write && first)
- return -EINVAL;
- *lenp -= left;
- *ppos += *lenp;
- return 0;
-}
-
-#ifdef CONFIG_SYSCTL
-/*
- * Register our sysctl.
- */
-static ctl_table htab_ctl_table[]={
- {
- .procname = "l2cr",
- .mode = 0644,
- .proc_handler = &proc_dol2crvec,
- },
- {}
-};
-static ctl_table htab_sysctl_root[] = {
- {
- .ctl_name = CTL_KERN,
- .procname = "kernel",
- .mode = 0555,
- .child = htab_ctl_table,
- },
- {}
-};
-
-static int __init
-register_ppc_htab_sysctl(void)
-{
- register_sysctl_table(htab_sysctl_root);
-
- return 0;
-}
-
-__initcall(register_ppc_htab_sysctl);
-#endif
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
deleted file mode 100644
index 5d529bc..0000000
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ /dev/null
@@ -1,258 +0,0 @@
-#include <linux/module.h>
-#include <linux/threads.h>
-#include <linux/smp.h>
-#include <linux/sched.h>
-#include <linux/elfcore.h>
-#include <linux/string.h>
-#include <linux/interrupt.h>
-#include <linux/screen_info.h>
-#include <linux/vt_kern.h>
-#include <linux/nvram.h>
-#include <linux/console.h>
-#include <linux/irq.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-#include <linux/bitops.h>
-
-#include <asm/page.h>
-#include <asm/processor.h>
-#include <asm/uaccess.h>
-#include <asm/io.h>
-#include <asm/ide.h>
-#include <asm/atomic.h>
-#include <asm/checksum.h>
-#include <asm/pgtable.h>
-#include <asm/tlbflush.h>
-#include <asm/cacheflush.h>
-#include <linux/adb.h>
-#include <linux/cuda.h>
-#include <linux/pmu.h>
-#include <asm/system.h>
-#include <asm/pci-bridge.h>
-#include <asm/irq.h>
-#include <asm/dma.h>
-#include <asm/machdep.h>
-#include <asm/hw_irq.h>
-#include <asm/nvram.h>
-#include <asm/mmu_context.h>
-#include <asm/backlight.h>
-#include <asm/time.h>
-#include <asm/cputable.h>
-#include <asm/btext.h>
-#include <asm/xmon.h>
-#include <asm/signal.h>
-#include <asm/dcr.h>
-
-#ifdef CONFIG_8xx
-#include <asm/cpm1.h>
-#endif
-
-extern void transfer_to_handler(void);
-extern void do_IRQ(struct pt_regs *regs);
-extern void machine_check_exception(struct pt_regs *regs);
-extern void alignment_exception(struct pt_regs *regs);
-extern void program_check_exception(struct pt_regs *regs);
-extern void single_step_exception(struct pt_regs *regs);
-extern int sys_sigreturn(struct pt_regs *regs);
-
-long long __ashrdi3(long long, int);
-long long __ashldi3(long long, int);
-long long __lshrdi3(long long, int);
-
-EXPORT_SYMBOL(empty_zero_page);
-EXPORT_SYMBOL(clear_pages);
-EXPORT_SYMBOL(clear_user_page);
-EXPORT_SYMBOL(copy_page);
-EXPORT_SYMBOL(transfer_to_handler);
-EXPORT_SYMBOL(do_IRQ);
-EXPORT_SYMBOL(machine_check_exception);
-EXPORT_SYMBOL(alignment_exception);
-EXPORT_SYMBOL(program_check_exception);
-EXPORT_SYMBOL(single_step_exception);
-EXPORT_SYMBOL(sys_sigreturn);
-EXPORT_SYMBOL(ppc_n_lost_interrupts);
-
-EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
-EXPORT_SYMBOL(DMA_MODE_READ);
-EXPORT_SYMBOL(DMA_MODE_WRITE);
-
-#if !defined(__INLINE_BITOPS)
-EXPORT_SYMBOL(set_bit);
-EXPORT_SYMBOL(clear_bit);
-EXPORT_SYMBOL(change_bit);
-EXPORT_SYMBOL(test_and_set_bit);
-EXPORT_SYMBOL(test_and_clear_bit);
-EXPORT_SYMBOL(test_and_change_bit);
-#endif /* __INLINE_BITOPS */
-
-EXPORT_SYMBOL(strcpy);
-EXPORT_SYMBOL(strncpy);
-EXPORT_SYMBOL(strcat);
-EXPORT_SYMBOL(strlen);
-EXPORT_SYMBOL(strcmp);
-EXPORT_SYMBOL(strncmp);
-
-EXPORT_SYMBOL(csum_partial);
-EXPORT_SYMBOL(csum_partial_copy_generic);
-EXPORT_SYMBOL(ip_fast_csum);
-EXPORT_SYMBOL(csum_tcpudp_magic);
-
-EXPORT_SYMBOL(__copy_tofrom_user);
-EXPORT_SYMBOL(__clear_user);
-EXPORT_SYMBOL(__strncpy_from_user);
-EXPORT_SYMBOL(__strnlen_user);
-
-/*
-EXPORT_SYMBOL(inb);
-EXPORT_SYMBOL(inw);
-EXPORT_SYMBOL(inl);
-EXPORT_SYMBOL(outb);
-EXPORT_SYMBOL(outw);
-EXPORT_SYMBOL(outl);
-EXPORT_SYMBOL(outsl);*/
-
-EXPORT_SYMBOL(_insb);
-EXPORT_SYMBOL(_outsb);
-EXPORT_SYMBOL(_insw_ns);
-EXPORT_SYMBOL(_outsw_ns);
-EXPORT_SYMBOL(_insl_ns);
-EXPORT_SYMBOL(_outsl_ns);
-EXPORT_SYMBOL(iopa);
-EXPORT_SYMBOL(ioremap);
-#ifdef CONFIG_44x
-EXPORT_SYMBOL(ioremap64);
-#endif
-EXPORT_SYMBOL(__ioremap);
-EXPORT_SYMBOL(iounmap);
-EXPORT_SYMBOL(ioremap_bot); /* aka VMALLOC_END */
-
-#ifdef CONFIG_PCI
-EXPORT_SYMBOL(isa_io_base);
-EXPORT_SYMBOL(isa_mem_base);
-EXPORT_SYMBOL(pci_dram_offset);
-EXPORT_SYMBOL(pci_alloc_consistent);
-EXPORT_SYMBOL(pci_free_consistent);
-EXPORT_SYMBOL(pci_bus_io_base);
-EXPORT_SYMBOL(pci_bus_io_base_phys);
-EXPORT_SYMBOL(pci_bus_mem_base_phys);
-EXPORT_SYMBOL(pci_bus_to_hose);
-EXPORT_SYMBOL(pci_resource_to_bus);
-EXPORT_SYMBOL(pci_phys_to_bus);
-EXPORT_SYMBOL(pci_bus_to_phys);
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_NOT_COHERENT_CACHE
-extern void flush_dcache_all(void);
-EXPORT_SYMBOL(flush_dcache_all);
-#endif
-
-EXPORT_SYMBOL(start_thread);
-EXPORT_SYMBOL(kernel_thread);
-
-EXPORT_SYMBOL(flush_instruction_cache);
-EXPORT_SYMBOL(giveup_fpu);
-EXPORT_SYMBOL(__flush_icache_range);
-EXPORT_SYMBOL(flush_dcache_range);
-EXPORT_SYMBOL(flush_icache_user_range);
-EXPORT_SYMBOL(flush_dcache_page);
-EXPORT_SYMBOL(flush_tlb_kernel_range);
-EXPORT_SYMBOL(flush_tlb_page);
-EXPORT_SYMBOL(_tlbie);
-#ifdef CONFIG_ALTIVEC
-#ifndef CONFIG_SMP
-EXPORT_SYMBOL(last_task_used_altivec);
-#endif
-EXPORT_SYMBOL(giveup_altivec);
-#endif /* CONFIG_ALTIVEC */
-#ifdef CONFIG_SMP
-EXPORT_SYMBOL(smp_call_function);
-EXPORT_SYMBOL(smp_hw_index);
-#endif
-
-EXPORT_SYMBOL(ppc_md);
-
-#ifdef CONFIG_ADB
-EXPORT_SYMBOL(adb_request);
-EXPORT_SYMBOL(adb_register);
-EXPORT_SYMBOL(adb_unregister);
-EXPORT_SYMBOL(adb_poll);
-EXPORT_SYMBOL(adb_try_handler_change);
-#endif /* CONFIG_ADB */
-#ifdef CONFIG_ADB_CUDA
-EXPORT_SYMBOL(cuda_request);
-EXPORT_SYMBOL(cuda_poll);
-#endif /* CONFIG_ADB_CUDA */
-#if defined(CONFIG_BOOTX_TEXT)
-EXPORT_SYMBOL(btext_update_display);
-#endif
-EXPORT_SYMBOL(to_tm);
-
-EXPORT_SYMBOL(pm_power_off);
-
-EXPORT_SYMBOL(__ashrdi3);
-EXPORT_SYMBOL(__ashldi3);
-EXPORT_SYMBOL(__lshrdi3);
-EXPORT_SYMBOL(memcpy);
-EXPORT_SYMBOL(cacheable_memcpy);
-EXPORT_SYMBOL(memset);
-EXPORT_SYMBOL(memmove);
-EXPORT_SYMBOL(memcmp);
-EXPORT_SYMBOL(memchr);
-
-#if defined(CONFIG_FB_VGA16_MODULE)
-EXPORT_SYMBOL(screen_info);
-#endif
-
-EXPORT_SYMBOL(__delay);
-EXPORT_SYMBOL(timer_interrupt);
-EXPORT_SYMBOL(irq_desc);
-EXPORT_SYMBOL(tb_ticks_per_jiffy);
-EXPORT_SYMBOL(console_drivers);
-#ifdef CONFIG_XMON
-EXPORT_SYMBOL(xmon);
-EXPORT_SYMBOL(xmon_printf);
-#endif
-
-#if defined(CONFIG_KGDB) || defined(CONFIG_XMON)
-extern void (*debugger)(struct pt_regs *regs);
-extern int (*debugger_bpt)(struct pt_regs *regs);
-extern int (*debugger_sstep)(struct pt_regs *regs);
-extern int (*debugger_iabr_match)(struct pt_regs *regs);
-extern int (*debugger_dabr_match)(struct pt_regs *regs);
-extern void (*debugger_fault_handler)(struct pt_regs *regs);
-
-EXPORT_SYMBOL(debugger);
-EXPORT_SYMBOL(debugger_bpt);
-EXPORT_SYMBOL(debugger_sstep);
-EXPORT_SYMBOL(debugger_iabr_match);
-EXPORT_SYMBOL(debugger_dabr_match);
-EXPORT_SYMBOL(debugger_fault_handler);
-#endif
-
-#ifdef CONFIG_8xx
-EXPORT_SYMBOL(cpm_install_handler);
-EXPORT_SYMBOL(cpm_free_handler);
-#endif /* CONFIG_8xx */
-#if defined(CONFIG_8xx) || defined(CONFIG_40x)
-EXPORT_SYMBOL(__res);
-#endif
-
-EXPORT_SYMBOL(next_mmu_context);
-EXPORT_SYMBOL(set_context);
-EXPORT_SYMBOL(disarm_decr);
-#ifdef CONFIG_PPC_STD_MMU
-extern long mol_trampoline;
-EXPORT_SYMBOL(mol_trampoline); /* For MOL */
-EXPORT_SYMBOL(flush_hash_pages); /* For MOL */
-#ifdef CONFIG_SMP
-extern int mmu_hash_lock;
-EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */
-#endif /* CONFIG_SMP */
-extern long *intercept_table;
-EXPORT_SYMBOL(intercept_table);
-#endif /* CONFIG_PPC_STD_MMU */
-#ifdef CONFIG_PPC_DCR_NATIVE
-EXPORT_SYMBOL(__mtdcr);
-EXPORT_SYMBOL(__mfdcr);
-#endif
diff --git a/arch/ppc/kernel/relocate_kernel.S b/arch/ppc/kernel/relocate_kernel.S
deleted file mode 100644
index 9b2ad48..0000000
--- a/arch/ppc/kernel/relocate_kernel.S
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * relocate_kernel.S - put the kernel image in place to boot
- * Copyright (C) 2002-2003 Eric Biederman <ebiederm@xmission.com>
- *
- * GameCube/ppc32 port Copyright (C) 2004 Albert Herranz
- *
- * This source code is licensed under the GNU General Public License,
- * Version 2. See the file COPYING for more details.
- */
-
-#include <asm/reg.h>
-#include <asm/ppc_asm.h>
-#include <asm/processor.h>
-
-#include <asm/kexec.h>
-
-#define PAGE_SIZE 4096 /* must be same value as in <asm/page.h> */
-
- /*
- * Must be relocatable PIC code callable as a C function.
- */
- .globl relocate_new_kernel
-relocate_new_kernel:
- /* r3 = page_list */
- /* r4 = reboot_code_buffer */
- /* r5 = start_address */
-
- li r0, 0
-
- /*
- * Set Machine Status Register to a known status,
- * switch the MMU off and jump to 1: in a single step.
- */
-
- mr r8, r0
- ori r8, r8, MSR_RI|MSR_ME
- mtspr SPRN_SRR1, r8
- addi r8, r4, 1f - relocate_new_kernel
- mtspr SPRN_SRR0, r8
- sync
- rfi
-
-1:
- /* from this point address translation is turned off */
- /* and interrupts are disabled */
-
- /* set a new stack at the bottom of our page... */
- /* (not really needed now) */
- addi r1, r4, KEXEC_CONTROL_CODE_SIZE - 8 /* for LR Save+Back Chain */
- stw r0, 0(r1)
-
- /* Do the copies */
- li r6, 0 /* checksum */
- mr r0, r3
- b 1f
-
-0: /* top, read another word for the indirection page */
- lwzu r0, 4(r3)
-
-1:
- /* is it a destination page? (r8) */
- rlwinm. r7, r0, 0, 31, 31 /* IND_DESTINATION (1<<0) */
- beq 2f
-
- rlwinm r8, r0, 0, 0, 19 /* clear kexec flags, page align */
- b 0b
-
-2: /* is it an indirection page? (r3) */
- rlwinm. r7, r0, 0, 30, 30 /* IND_INDIRECTION (1<<1) */
- beq 2f
-
- rlwinm r3, r0, 0, 0, 19 /* clear kexec flags, page align */
- subi r3, r3, 4
- b 0b
-
-2: /* are we done? */
- rlwinm. r7, r0, 0, 29, 29 /* IND_DONE (1<<2) */
- beq 2f
- b 3f
-
-2: /* is it a source page? (r9) */
- rlwinm. r7, r0, 0, 28, 28 /* IND_SOURCE (1<<3) */
- beq 0b
-
- rlwinm r9, r0, 0, 0, 19 /* clear kexec flags, page align */
-
- li r7, PAGE_SIZE / 4
- mtctr r7
- subi r9, r9, 4
- subi r8, r8, 4
-9:
- lwzu r0, 4(r9) /* do the copy */
- xor r6, r6, r0
- stwu r0, 4(r8)
- dcbst 0, r8
- sync
- icbi 0, r8
- bdnz 9b
-
- addi r9, r9, 4
- addi r8, r8, 4
- b 0b
-
-3:
-
- /* To be certain of avoiding problems with self-modifying code
- * execute a serializing instruction here.
- */
- isync
- sync
-
- /* jump to the entry point, usually the setup routine */
- mtlr r5
- blrl
-
-1: b 1b
-
-relocate_new_kernel_end:
-
- .globl relocate_new_kernel_size
-relocate_new_kernel_size:
- .long relocate_new_kernel_end - relocate_new_kernel
-
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
deleted file mode 100644
index 51e8094..0000000
--- a/arch/ppc/kernel/setup.c
+++ /dev/null
@@ -1,572 +0,0 @@
-/*
- * Common prep boot and setup code.
- */
-
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/reboot.h>
-#include <linux/delay.h>
-#include <linux/initrd.h>
-#include <linux/screen_info.h>
-#include <linux/bootmem.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/cpu.h>
-#include <linux/console.h>
-
-#include <asm/residual.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/processor.h>
-#include <asm/pgtable.h>
-#include <asm/bootinfo.h>
-#include <asm/setup.h>
-#include <asm/smp.h>
-#include <asm/elf.h>
-#include <asm/cputable.h>
-#include <asm/bootx.h>
-#include <asm/btext.h>
-#include <asm/machdep.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/sections.h>
-#include <asm/nvram.h>
-#include <asm/xmon.h>
-#include <asm/ocp.h>
-#include <asm/irq.h>
-
-#define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
- defined(CONFIG_PPC_MPC52xx))
-
-#if USES_PPC_SYS
-#include <asm/ppc_sys.h>
-#endif
-
-#if defined CONFIG_KGDB
-#include <asm/kgdb.h>
-#endif
-
-extern void platform_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7);
-extern void reloc_got2(unsigned long offset);
-
-extern void ppc6xx_idle(void);
-extern void power4_idle(void);
-
-extern boot_infos_t *boot_infos;
-
-/* Used with the BI_MEMSIZE bootinfo parameter to store the memory
- size value reported by the boot loader. */
-unsigned long boot_mem_size;
-
-unsigned long ISA_DMA_THRESHOLD;
-unsigned int DMA_MODE_READ;
-unsigned int DMA_MODE_WRITE;
-
-#ifdef CONFIG_PPC_PREP
-extern void prep_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7);
-
-dev_t boot_dev;
-#endif /* CONFIG_PPC_PREP */
-
-int have_of;
-EXPORT_SYMBOL(have_of);
-
-#ifdef __DO_IRQ_CANON
-int ppc_do_canonicalize_irqs;
-EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
-#endif
-
-#ifdef CONFIG_VGA_CONSOLE
-unsigned long vgacon_remap_base;
-#endif
-
-struct machdep_calls ppc_md;
-
-/*
- * These are used in binfmt_elf.c to put aux entries on the stack
- * for each elf executable being started.
- */
-int dcache_bsize;
-int icache_bsize;
-int ucache_bsize;
-
-#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_FB_VGA16) || \
- defined(CONFIG_FB_VGA16_MODULE) || defined(CONFIG_FB_VESA)
-struct screen_info screen_info = {
- 0, 25, /* orig-x, orig-y */
- 0, /* unused */
- 0, /* orig-video-page */
- 0, /* orig-video-mode */
- 80, /* orig-video-cols */
- 0,0,0, /* ega_ax, ega_bx, ega_cx */
- 25, /* orig-video-lines */
- 1, /* orig-video-isVGA */
- 16 /* orig-video-points */
-};
-#endif /* CONFIG_VGA_CONSOLE || CONFIG_FB_VGA16 || CONFIG_FB_VESA */
-
-void machine_restart(char *cmd)
-{
-#ifdef CONFIG_NVRAM
- nvram_sync();
-#endif
- ppc_md.restart(cmd);
-}
-
-static void ppc_generic_power_off(void)
-{
- ppc_md.power_off();
-}
-
-void machine_halt(void)
-{
-#ifdef CONFIG_NVRAM
- nvram_sync();
-#endif
- ppc_md.halt();
-}
-
-void (*pm_power_off)(void) = ppc_generic_power_off;
-
-void machine_power_off(void)
-{
-#ifdef CONFIG_NVRAM
- nvram_sync();
-#endif
- if (pm_power_off)
- pm_power_off();
- ppc_generic_power_off();
-}
-
-#ifdef CONFIG_TAU
-extern u32 cpu_temp(unsigned long cpu);
-extern u32 cpu_temp_both(unsigned long cpu);
-#endif /* CONFIG_TAU */
-
-int show_cpuinfo(struct seq_file *m, void *v)
-{
- int i = (int) v - 1;
- int err = 0;
- unsigned int pvr;
- unsigned short maj, min;
- unsigned long lpj;
-
- if (i >= NR_CPUS) {
- /* Show summary information */
-#ifdef CONFIG_SMP
- unsigned long bogosum = 0;
- for_each_online_cpu(i)
- bogosum += cpu_data[i].loops_per_jiffy;
- seq_printf(m, "total bogomips\t: %lu.%02lu\n",
- bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
-#endif /* CONFIG_SMP */
-
- if (ppc_md.show_cpuinfo != NULL)
- err = ppc_md.show_cpuinfo(m);
- return err;
- }
-
-#ifdef CONFIG_SMP
- if (!cpu_online(i))
- return 0;
- pvr = cpu_data[i].pvr;
- lpj = cpu_data[i].loops_per_jiffy;
-#else
- pvr = mfspr(SPRN_PVR);
- lpj = loops_per_jiffy;
-#endif
-
- seq_printf(m, "processor\t: %d\n", i);
- seq_printf(m, "cpu\t\t: ");
-
- if (cur_cpu_spec->pvr_mask)
- seq_printf(m, "%s", cur_cpu_spec->cpu_name);
- else
- seq_printf(m, "unknown (%08x)", pvr);
-#ifdef CONFIG_ALTIVEC
- if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
- seq_printf(m, ", altivec supported");
-#endif
- seq_printf(m, "\n");
-
-#ifdef CONFIG_TAU
- if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
-#ifdef CONFIG_TAU_AVERAGE
- /* more straightforward, but potentially misleading */
- seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
- cpu_temp(i));
-#else
- /* show the actual temp sensor range */
- u32 temp;
- temp = cpu_temp_both(i);
- seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
- temp & 0xff, temp >> 16);
-#endif
- }
-#endif /* CONFIG_TAU */
-
- if (ppc_md.show_percpuinfo != NULL) {
- err = ppc_md.show_percpuinfo(m, i);
- if (err)
- return err;
- }
-
- /* If we are a Freescale core do a simple check so
- * we dont have to keep adding cases in the future */
- if ((PVR_VER(pvr) & 0x8000) == 0x8000) {
- maj = PVR_MAJ(pvr);
- min = PVR_MIN(pvr);
- } else {
- switch (PVR_VER(pvr)) {
- case 0x0020: /* 403 family */
- maj = PVR_MAJ(pvr) + 1;
- min = PVR_MIN(pvr);
- break;
- case 0x1008: /* 740P/750P ?? */
- maj = ((pvr >> 8) & 0xFF) - 1;
- min = pvr & 0xFF;
- break;
- default:
- maj = (pvr >> 8) & 0xFF;
- min = pvr & 0xFF;
- break;
- }
- }
-
- seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
- maj, min, PVR_VER(pvr), PVR_REV(pvr));
-
- seq_printf(m, "bogomips\t: %lu.%02lu\n",
- lpj / (500000/HZ), (lpj / (5000/HZ)) % 100);
-
-#if USES_PPC_SYS
- if (cur_ppc_sys_spec->ppc_sys_name)
- seq_printf(m, "chipset\t\t: %s\n",
- cur_ppc_sys_spec->ppc_sys_name);
-#endif
-
-#ifdef CONFIG_SMP
- seq_printf(m, "\n");
-#endif
-
- return 0;
-}
-
-static void *c_start(struct seq_file *m, loff_t *pos)
-{
- int i = *pos;
-
- return i <= NR_CPUS? (void *) (i + 1): NULL;
-}
-
-static void *c_next(struct seq_file *m, void *v, loff_t *pos)
-{
- ++*pos;
- return c_start(m, pos);
-}
-
-static void c_stop(struct seq_file *m, void *v)
-{
-}
-
-const struct seq_operations cpuinfo_op = {
- .start =c_start,
- .next = c_next,
- .stop = c_stop,
- .show = show_cpuinfo,
-};
-
-/*
- * We're called here very early in the boot. We determine the machine
- * type and call the appropriate low-level setup functions.
- * -- Cort <cort@fsmlabs.com>
- *
- * Note that the kernel may be running at an address which is different
- * from the address that it was linked at, so we must use RELOC/PTRRELOC
- * to access static data (including strings). -- paulus
- */
-__init
-unsigned long
-early_init(int r3, int r4, int r5)
-{
- unsigned long phys;
- unsigned long offset = reloc_offset();
- struct cpu_spec *spec;
-
- /* Default */
- phys = offset + KERNELBASE;
-
- /* First zero the BSS -- use memset, some arches don't have
- * caches on yet */
- memset_io(PTRRELOC(&__bss_start), 0, _end - __bss_start);
-
- /*
- * Identify the CPU type and fix up code sections
- * that depend on which cpu we have.
- */
-#if defined(CONFIG_440EP) && defined(CONFIG_PPC_FPU)
- /* We pass the virtual PVR here for 440EP as 440EP and 440GR have
- * identical PVRs and there is no reliable way to check for the FPU
- */
- spec = identify_cpu(offset, (mfspr(SPRN_PVR) | 0x8));
-#else
- spec = identify_cpu(offset, mfspr(SPRN_PVR));
-#endif
- do_feature_fixups(spec->cpu_features,
- PTRRELOC(&__start___ftr_fixup),
- PTRRELOC(&__stop___ftr_fixup));
-
- return phys;
-}
-
-#ifdef CONFIG_PPC_PREP
-/*
- * The PPC_PREP version of platform_init...
- */
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
-#ifdef CONFIG_BOOTX_TEXT
- if (boot_text_mapped) {
- btext_clearscreen();
- btext_welcome();
- }
-#endif
-
- parse_bootinfo(find_bootinfo());
-
- prep_init(r3, r4, r5, r6, r7);
-}
-#endif /* CONFIG_PPC_PREP */
-
-struct bi_record *find_bootinfo(void)
-{
- struct bi_record *rec;
-
- rec = (struct bi_record *)_ALIGN((ulong)__bss_start+(1<<20)-1,(1<<20));
- if ( rec->tag != BI_FIRST ) {
- /*
- * This 0x10000 offset is a terrible hack but it will go away when
- * we have the bootloader handle all the relocation and
- * prom calls -- Cort
- */
- rec = (struct bi_record *)_ALIGN((ulong)__bss_start+0x10000+(1<<20)-1,(1<<20));
- if ( rec->tag != BI_FIRST )
- return NULL;
- }
- return rec;
-}
-
-void parse_bootinfo(struct bi_record *rec)
-{
- if (rec == NULL || rec->tag != BI_FIRST)
- return;
- while (rec->tag != BI_LAST) {
- ulong *data = rec->data;
- switch (rec->tag) {
- case BI_CMD_LINE:
- strlcpy(cmd_line, (void *)data, sizeof(cmd_line));
- break;
-#ifdef CONFIG_BLK_DEV_INITRD
- case BI_INITRD:
- initrd_start = data[0] + KERNELBASE;
- initrd_end = data[0] + data[1] + KERNELBASE;
- break;
-#endif /* CONFIG_BLK_DEV_INITRD */
- case BI_MEMSIZE:
- boot_mem_size = data[0];
- break;
- }
- rec = (struct bi_record *)((ulong)rec + rec->size);
- }
-}
-
-/*
- * Find out what kind of machine we're on and save any data we need
- * from the early boot process (devtree is copied on pmac by prom_init()).
- * This is called very early on the boot process, after a minimal
- * MMU environment has been set up but before MMU_init is called.
- */
-void __init
-machine_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
-#ifdef CONFIG_CMDLINE
- strlcpy(cmd_line, CONFIG_CMDLINE, sizeof(cmd_line));
-#endif /* CONFIG_CMDLINE */
-
-#ifdef CONFIG_6xx
- ppc_md.power_save = ppc6xx_idle;
-#endif
-
- platform_init(r3, r4, r5, r6, r7);
-
- if (ppc_md.progress)
- ppc_md.progress("id mach(): done", 0x200);
-}
-#ifdef CONFIG_BOOKE_WDT
-/* Checks wdt=x and wdt_period=xx command-line option */
-int __init early_parse_wdt(char *p)
-{
- if (p && strncmp(p, "0", 1) != 0)
- booke_wdt_enabled = 1;
-
- return 0;
-}
-early_param("wdt", early_parse_wdt);
-
-int __init early_parse_wdt_period (char *p)
-{
- if (p)
- booke_wdt_period = simple_strtoul(p, NULL, 0);
-
- return 0;
-}
-early_param("wdt_period", early_parse_wdt_period);
-#endif /* CONFIG_BOOKE_WDT */
-
-/* Checks "l2cr=xxxx" command-line option */
-int __init ppc_setup_l2cr(char *str)
-{
- if (cpu_has_feature(CPU_FTR_L2CR)) {
- unsigned long val = simple_strtoul(str, NULL, 0);
- printk(KERN_INFO "l2cr set to %lx\n", val);
- _set_L2CR(0); /* force invalidate by disable cache */
- _set_L2CR(val); /* and enable it */
- }
- return 1;
-}
-__setup("l2cr=", ppc_setup_l2cr);
-
-#ifdef CONFIG_GENERIC_NVRAM
-
-/* Generic nvram hooks used by drivers/char/gen_nvram.c */
-unsigned char nvram_read_byte(int addr)
-{
- if (ppc_md.nvram_read_val)
- return ppc_md.nvram_read_val(addr);
- return 0xff;
-}
-EXPORT_SYMBOL(nvram_read_byte);
-
-void nvram_write_byte(unsigned char val, int addr)
-{
- if (ppc_md.nvram_write_val)
- ppc_md.nvram_write_val(addr, val);
-}
-EXPORT_SYMBOL(nvram_write_byte);
-
-void nvram_sync(void)
-{
- if (ppc_md.nvram_sync)
- ppc_md.nvram_sync();
-}
-EXPORT_SYMBOL(nvram_sync);
-
-#endif /* CONFIG_NVRAM */
-
-static struct cpu cpu_devices[NR_CPUS];
-
-int __init ppc_init(void)
-{
- int i;
-
- /* clear the progress line */
- if ( ppc_md.progress ) ppc_md.progress(" ", 0xffff);
-
- /* register CPU devices */
- for_each_possible_cpu(i)
- register_cpu(&cpu_devices[i], i);
-
- /* call platform init */
- if (ppc_md.init != NULL) {
- ppc_md.init();
- }
- return 0;
-}
-
-arch_initcall(ppc_init);
-
-/* Warning, IO base is not yet inited */
-void __init setup_arch(char **cmdline_p)
-{
- extern char *klimit;
- extern void do_init_bootmem(void);
-
- /* so udelay does something sensible, assume <= 1000 bogomips */
- loops_per_jiffy = 500000000 / HZ;
-
- if (ppc_md.init_early)
- ppc_md.init_early();
-
-#ifdef CONFIG_XMON
- xmon_init(1);
- if (strstr(cmd_line, "xmon"))
- xmon(NULL);
-#endif /* CONFIG_XMON */
- if ( ppc_md.progress ) ppc_md.progress("setup_arch: enter", 0x3eab);
-
-#if defined(CONFIG_KGDB)
- if (ppc_md.kgdb_map_scc)
- ppc_md.kgdb_map_scc();
- set_debug_traps();
- if (strstr(cmd_line, "gdb")) {
- if (ppc_md.progress)
- ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000);
- printk("kgdb breakpoint activated\n");
- breakpoint();
- }
-#endif
-
- /*
- * Set cache line size based on type of cpu as a default.
- * Systems with OF can look in the properties on the cpu node(s)
- * for a possibly more accurate value.
- */
- if (! cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) {
- dcache_bsize = cur_cpu_spec->dcache_bsize;
- icache_bsize = cur_cpu_spec->icache_bsize;
- ucache_bsize = 0;
- } else
- ucache_bsize = dcache_bsize = icache_bsize
- = cur_cpu_spec->dcache_bsize;
-
- /* reboot on panic */
- panic_timeout = 180;
-
- init_mm.start_code = PAGE_OFFSET;
- init_mm.end_code = (unsigned long) _etext;
- init_mm.end_data = (unsigned long) _edata;
- init_mm.brk = (unsigned long) klimit;
-
- /* Save unparsed command line copy for /proc/cmdline */
- strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
- *cmdline_p = cmd_line;
-
- parse_early_param();
-
- /* set up the bootmem stuff with available memory */
- do_init_bootmem();
- if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
-
-#ifdef CONFIG_PPC_OCP
- /* Initialize OCP device list */
- ocp_early_init();
- if ( ppc_md.progress ) ppc_md.progress("ocp: exit", 0x3eab);
-#endif
-
-#ifdef CONFIG_DUMMY_CONSOLE
- conswitchp = &dummy_con;
-#endif
-
- ppc_md.setup_arch();
- if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
-
- paging_init();
-}
diff --git a/arch/ppc/kernel/smp-tbsync.c b/arch/ppc/kernel/smp-tbsync.c
deleted file mode 100644
index d0cf3f8..0000000
--- a/arch/ppc/kernel/smp-tbsync.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * Smp timebase synchronization for ppc.
- *
- * Copyright (C) 2003 Samuel Rydh (samuel@ibrium.se)
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <linux/unistd.h>
-#include <linux/init.h>
-#include <asm/atomic.h>
-#include <asm/smp.h>
-#include <asm/time.h>
-
-#define NUM_ITER 300
-
-enum {
- kExit=0, kSetAndTest, kTest
-};
-
-static struct {
- volatile int tbu;
- volatile int tbl;
- volatile int mark;
- volatile int cmd;
- volatile int handshake;
- int filler[3];
-
- volatile int ack;
- int filler2[7];
-
- volatile int race_result;
-} *tbsync;
-
-static volatile int running;
-
-static void __devinit
-enter_contest( int mark, int add )
-{
- while( (int)(get_tbl() - mark) < 0 )
- tbsync->race_result = add;
-}
-
-void __devinit
-smp_generic_take_timebase( void )
-{
- int cmd, tbl, tbu;
- unsigned long flags;
-
- local_irq_save(flags);
- while( !running )
- ;
- rmb();
-
- for( ;; ) {
- tbsync->ack = 1;
- while( !tbsync->handshake )
- ;
- rmb();
-
- cmd = tbsync->cmd;
- tbl = tbsync->tbl;
- tbu = tbsync->tbu;
- tbsync->ack = 0;
- if( cmd == kExit )
- break;
-
- if( cmd == kSetAndTest ) {
- while( tbsync->handshake )
- ;
- asm volatile ("mttbl %0" :: "r" (tbl) );
- asm volatile ("mttbu %0" :: "r" (tbu) );
- } else {
- while( tbsync->handshake )
- ;
- }
- enter_contest( tbsync->mark, -1 );
- }
- local_irq_restore(flags);
-}
-
-static int __devinit
-start_contest( int cmd, int offset, int num )
-{
- int i, tbu, tbl, mark, score=0;
-
- tbsync->cmd = cmd;
-
- local_irq_disable();
- for( i=-3; i<num; ) {
- tbl = get_tbl() + 400;
- tbsync->tbu = tbu = get_tbu();
- tbsync->tbl = tbl + offset;
- tbsync->mark = mark = tbl + 400;
-
- wmb();
-
- tbsync->handshake = 1;
- while( tbsync->ack )
- ;
-
- while( (int)(get_tbl() - tbl) <= 0 )
- ;
- tbsync->handshake = 0;
- enter_contest( mark, 1 );
-
- while( !tbsync->ack )
- ;
-
- if( tbsync->tbu != get_tbu() || ((tbsync->tbl ^ get_tbl()) & 0x80000000) )
- continue;
- if( i++ > 0 )
- score += tbsync->race_result;
- }
- local_irq_enable();
- return score;
-}
-
-void __devinit
-smp_generic_give_timebase( void )
-{
- int i, score, score2, old, min=0, max=5000, offset=1000;
-
- printk("Synchronizing timebase\n");
-
- /* if this fails then this kernel won't work anyway... */
- tbsync = kzalloc( sizeof(*tbsync), GFP_KERNEL );
- mb();
- running = 1;
-
- while( !tbsync->ack )
- ;
-
- /* binary search */
- for( old=-1 ; old != offset ; offset=(min+max)/2 ) {
- score = start_contest( kSetAndTest, offset, NUM_ITER );
-
- printk("score %d, offset %d\n", score, offset );
-
- if( score > 0 )
- max = offset;
- else
- min = offset;
- old = offset;
- }
- score = start_contest( kSetAndTest, min, NUM_ITER );
- score2 = start_contest( kSetAndTest, max, NUM_ITER );
-
- printk( "Min %d (score %d), Max %d (score %d)\n", min, score, max, score2 );
- score = abs( score );
- score2 = abs( score2 );
- offset = (score < score2) ? min : max;
-
- /* guard against inaccurate mttb */
- for( i=0; i<10; i++ ) {
- start_contest( kSetAndTest, offset, NUM_ITER/10 );
-
- if( (score2=start_contest(kTest, offset, NUM_ITER)) < 0 )
- score2 = -score2;
- if( score2 <= score || score2 < 20 )
- break;
- }
- printk("Final offset: %d (%d/%d)\n", offset, score2, NUM_ITER );
-
- /* exiting */
- tbsync->cmd = kExit;
- wmb();
- tbsync->handshake = 1;
- while( tbsync->ack )
- ;
- tbsync->handshake = 0;
- kfree( tbsync );
- tbsync = NULL;
- running = 0;
-
- /* all done */
- smp_tb_synchronized = 1;
-}
diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c
deleted file mode 100644
index bcab0d2..0000000
--- a/arch/ppc/kernel/smp.c
+++ /dev/null
@@ -1,414 +0,0 @@
-/*
- * Smp support for ppc.
- *
- * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
- * deal of code from the sparc and intel versions.
- *
- * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/cache.h>
-
-#include <asm/ptrace.h>
-#include <asm/atomic.h>
-#include <asm/irq.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/smp.h>
-#include <asm/residual.h>
-#include <asm/time.h>
-#include <asm/thread_info.h>
-#include <asm/tlbflush.h>
-#include <asm/xmon.h>
-#include <asm/machdep.h>
-
-volatile int smp_commenced;
-int smp_tb_synchronized;
-struct cpuinfo_PPC cpu_data[NR_CPUS];
-atomic_t ipi_recv;
-atomic_t ipi_sent;
-cpumask_t cpu_online_map;
-cpumask_t cpu_possible_map;
-int smp_hw_index[NR_CPUS];
-struct thread_info *secondary_ti;
-static struct task_struct *idle_tasks[NR_CPUS];
-
-EXPORT_SYMBOL(cpu_online_map);
-EXPORT_SYMBOL(cpu_possible_map);
-
-/* SMP operations for this machine */
-struct smp_ops_t *smp_ops;
-
-/* all cpu mappings are 1-1 -- Cort */
-volatile unsigned long cpu_callin_map[NR_CPUS];
-
-int start_secondary(void *);
-void smp_call_function_interrupt(void);
-static int __smp_call_function(void (*func) (void *info), void *info,
- int wait, int target);
-
-/* Low level assembly function used to backup CPU 0 state */
-extern void __save_cpu_setup(void);
-
-/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
- *
- * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
- * in /proc/interrupts will be wrong!!! --Troy */
-#define PPC_MSG_CALL_FUNCTION 0
-#define PPC_MSG_RESCHEDULE 1
-#define PPC_MSG_INVALIDATE_TLB 2
-#define PPC_MSG_XMON_BREAK 3
-
-static inline void
-smp_message_pass(int target, int msg)
-{
- if (smp_ops) {
- atomic_inc(&ipi_sent);
- smp_ops->message_pass(target, msg);
- }
-}
-
-/*
- * Common functions
- */
-void smp_message_recv(int msg)
-{
- atomic_inc(&ipi_recv);
-
- switch( msg ) {
- case PPC_MSG_CALL_FUNCTION:
- smp_call_function_interrupt();
- break;
- case PPC_MSG_RESCHEDULE:
- set_need_resched();
- break;
- case PPC_MSG_INVALIDATE_TLB:
- _tlbia();
- break;
-#ifdef CONFIG_XMON
- case PPC_MSG_XMON_BREAK:
- xmon(get_irq_regs());
- break;
-#endif /* CONFIG_XMON */
- default:
- printk("SMP %d: smp_message_recv(): unknown msg %d\n",
- smp_processor_id(), msg);
- break;
- }
-}
-
-/*
- * 750's don't broadcast tlb invalidates so
- * we have to emulate that behavior.
- * -- Cort
- */
-void smp_send_tlb_invalidate(int cpu)
-{
- if ( PVR_VER(mfspr(SPRN_PVR)) == 8 )
- smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB);
-}
-
-void smp_send_reschedule(int cpu)
-{
- /*
- * This is only used if `cpu' is running an idle task,
- * so it will reschedule itself anyway...
- *
- * This isn't the case anymore since the other CPU could be
- * sleeping and won't reschedule until the next interrupt (such
- * as the timer).
- * -- Cort
- */
- /* This is only used if `cpu' is running an idle task,
- so it will reschedule itself anyway... */
- smp_message_pass(cpu, PPC_MSG_RESCHEDULE);
-}
-
-#ifdef CONFIG_XMON
-void smp_send_xmon_break(int cpu)
-{
- smp_message_pass(cpu, PPC_MSG_XMON_BREAK);
-}
-#endif /* CONFIG_XMON */
-
-static void stop_this_cpu(void *dummy)
-{
- local_irq_disable();
- while (1)
- ;
-}
-
-void smp_send_stop(void)
-{
- smp_call_function(stop_this_cpu, NULL, 0);
-}
-
-/*
- * Structure and data for smp_call_function(). This is designed to minimise
- * static memory requirements. It also looks cleaner.
- * Stolen from the i386 version.
- */
-static DEFINE_SPINLOCK(call_lock);
-
-static struct call_data_struct {
- void (*func) (void *info);
- void *info;
- atomic_t started;
- atomic_t finished;
- int wait;
-} *call_data;
-
-/*
- * this function sends a 'generic call function' IPI to all other CPUs
- * in the system.
- */
-
-int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
- int wait)
-/*
- * [SUMMARY] Run a function on all other CPUs.
- * <func> The function to run. This must be fast and non-blocking.
- * <info> An arbitrary pointer to pass to the function.
- * <nonatomic> currently unused.
- * <wait> If true, wait (atomically) until function has completed on other CPUs.
- * [RETURNS] 0 on success, else a negative status code. Does not return until
- * remote CPUs are nearly ready to execute <<func>> or are or have executed.
- *
- * You must not call this function with disabled interrupts or from a
- * hardware interrupt handler or from a bottom half handler.
- */
-{
- /* FIXME: get cpu lock with hotplug cpus, or change this to
- bitmask. --RR */
- if (num_online_cpus() <= 1)
- return 0;
- /* Can deadlock when called with interrupts disabled */
- WARN_ON(irqs_disabled());
- return __smp_call_function(func, info, wait, MSG_ALL_BUT_SELF);
-}
-
-static int __smp_call_function(void (*func) (void *info), void *info,
- int wait, int target)
-{
- struct call_data_struct data;
- int ret = -1;
- int timeout;
- int ncpus = 1;
-
- if (target == MSG_ALL_BUT_SELF)
- ncpus = num_online_cpus() - 1;
- else if (target == MSG_ALL)
- ncpus = num_online_cpus();
-
- data.func = func;
- data.info = info;
- atomic_set(&data.started, 0);
- data.wait = wait;
- if (wait)
- atomic_set(&data.finished, 0);
-
- spin_lock(&call_lock);
- call_data = &data;
- /* Send a message to all other CPUs and wait for them to respond */
- smp_message_pass(target, PPC_MSG_CALL_FUNCTION);
-
- /* Wait for response */
- timeout = 1000000;
- while (atomic_read(&data.started) != ncpus) {
- if (--timeout == 0) {
- printk("smp_call_function on cpu %d: other cpus not responding (%d)\n",
- smp_processor_id(), atomic_read(&data.started));
- goto out;
- }
- barrier();
- udelay(1);
- }
-
- if (wait) {
- timeout = 1000000;
- while (atomic_read(&data.finished) != ncpus) {
- if (--timeout == 0) {
- printk("smp_call_function on cpu %d: other cpus not finishing (%d/%d)\n",
- smp_processor_id(), atomic_read(&data.finished), atomic_read(&data.started));
- goto out;
- }
- barrier();
- udelay(1);
- }
- }
- ret = 0;
-
- out:
- spin_unlock(&call_lock);
- return ret;
-}
-
-void smp_call_function_interrupt(void)
-{
- void (*func) (void *info) = call_data->func;
- void *info = call_data->info;
- int wait = call_data->wait;
-
- /*
- * Notify initiating CPU that I've grabbed the data and am
- * about to execute the function
- */
- atomic_inc(&call_data->started);
- /*
- * At this point the info structure may be out of scope unless wait==1
- */
- (*func)(info);
- if (wait)
- atomic_inc(&call_data->finished);
-}
-
-static void __devinit smp_store_cpu_info(int id)
-{
- struct cpuinfo_PPC *c = &cpu_data[id];
-
- /* assume bogomips are same for everything */
- c->loops_per_jiffy = loops_per_jiffy;
- c->pvr = mfspr(SPRN_PVR);
-}
-
-void __init smp_prepare_cpus(unsigned int max_cpus)
-{
- int num_cpus, i, cpu;
- struct task_struct *p;
-
- /* Fixup boot cpu */
- smp_store_cpu_info(smp_processor_id());
- cpu_callin_map[smp_processor_id()] = 1;
-
- if (smp_ops == NULL) {
- printk("SMP not supported on this machine.\n");
- return;
- }
-
- /* Probe platform for CPUs: always linear. */
- num_cpus = smp_ops->probe();
-
- if (num_cpus < 2)
- smp_tb_synchronized = 1;
-
- for (i = 0; i < num_cpus; ++i)
- cpu_set(i, cpu_possible_map);
-
- /* Backup CPU 0 state */
- __save_cpu_setup();
-
- for_each_possible_cpu(cpu) {
- if (cpu == smp_processor_id())
- continue;
- /* create a process for the processor */
- p = fork_idle(cpu);
- if (IS_ERR(p))
- panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
- task_thread_info(p)->cpu = cpu;
- idle_tasks[cpu] = p;
- }
-}
-
-void __devinit smp_prepare_boot_cpu(void)
-{
- cpu_set(smp_processor_id(), cpu_online_map);
- cpu_set(smp_processor_id(), cpu_possible_map);
-}
-
-int __init setup_profiling_timer(unsigned int multiplier)
-{
- return 0;
-}
-
-/* Processor coming up starts here */
-int __devinit start_secondary(void *unused)
-{
- int cpu;
-
- atomic_inc(&init_mm.mm_count);
- current->active_mm = &init_mm;
-
- cpu = smp_processor_id();
- smp_store_cpu_info(cpu);
- set_dec(tb_ticks_per_jiffy);
- preempt_disable();
- cpu_callin_map[cpu] = 1;
-
- printk("CPU %d done callin...\n", cpu);
- smp_ops->setup_cpu(cpu);
- printk("CPU %d done setup...\n", cpu);
- smp_ops->take_timebase();
- printk("CPU %d done timebase take...\n", cpu);
-
- spin_lock(&call_lock);
- cpu_set(cpu, cpu_online_map);
- spin_unlock(&call_lock);
-
- local_irq_enable();
-
- cpu_idle();
- return 0;
-}
-
-int __cpu_up(unsigned int cpu)
-{
- char buf[32];
- int c;
-
- secondary_ti = task_thread_info(idle_tasks[cpu]);
- mb();
-
- /*
- * There was a cache flush loop here to flush the cache
- * to memory for the first 8MB of RAM. The cache flush
- * has been pushed into the kick_cpu function for those
- * platforms that need it.
- */
-
- /* wake up cpu */
- smp_ops->kick_cpu(cpu);
-
- /*
- * wait to see if the cpu made a callin (is actually up).
- * use this value that I found through experimentation.
- * -- Cort
- */
- for (c = 1000; c && !cpu_callin_map[cpu]; c--)
- udelay(100);
-
- if (!cpu_callin_map[cpu]) {
- sprintf(buf, "didn't find cpu %u", cpu);
- if (ppc_md.progress) ppc_md.progress(buf, 0x360+cpu);
- printk("Processor %u is stuck.\n", cpu);
- return -ENOENT;
- }
-
- sprintf(buf, "found cpu %u", cpu);
- if (ppc_md.progress) ppc_md.progress(buf, 0x350+cpu);
- printk("Processor %d found.\n", cpu);
-
- smp_ops->give_timebase();
-
- /* Wait until cpu puts itself in the online map */
- while (!cpu_online(cpu))
- cpu_relax();
-
- return 0;
-}
-
-void smp_cpus_done(unsigned int max_cpus)
-{
- smp_ops->setup_cpu(0);
-}
diff --git a/arch/ppc/kernel/softemu8xx.c b/arch/ppc/kernel/softemu8xx.c
deleted file mode 100644
index 9bbb6bf..0000000
--- a/arch/ppc/kernel/softemu8xx.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * Software emulation of some PPC instructions for the 8xx core.
- *
- * Copyright (C) 1998 Dan Malek (dmalek@jlc.net)
- *
- * Software floating emuation for the MPC8xx processor. I did this mostly
- * because it was easier than trying to get the libraries compiled for
- * software floating point. The goal is still to get the libraries done,
- * but I lost patience and needed some hacks to at least get init and
- * shells running. The first problem is the setjmp/longjmp that save
- * and restore the floating point registers.
- *
- * For this emulation, our working registers are found on the register
- * save area.
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/interrupt.h>
-
-#include <asm/pgtable.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/io.h>
-
-extern void
-print_8xx_pte(struct mm_struct *mm, unsigned long addr);
-extern int
-get_8xx_pte(struct mm_struct *mm, unsigned long addr);
-
-/* Eventually we may need a look-up table, but this works for now.
-*/
-#define LFS 48
-#define LFD 50
-#define LFDU 51
-#define STFD 54
-#define STFDU 55
-#define FMR 63
-
-/*
- * We return 0 on success, 1 on unimplemented instruction, and EFAULT
- * if a load/store faulted.
- */
-int
-Soft_emulate_8xx(struct pt_regs *regs)
-{
- uint inst, instword;
- uint flreg, idxreg, disp;
- uint retval;
- signed short sdisp;
- uint *ea, *ip;
-
- retval = 0;
-
- instword = *((uint *)regs->nip);
- inst = instword >> 26;
-
- flreg = (instword >> 21) & 0x1f;
- idxreg = (instword >> 16) & 0x1f;
- disp = instword & 0xffff;
-
- ea = (uint *)(regs->gpr[idxreg] + disp);
- ip = (uint *)¤t->thread.fpr[flreg];
-
- switch ( inst )
- {
- case LFD:
- /* this is a 16 bit quantity that is sign extended
- * so use a signed short here -- Cort
- */
- sdisp = (instword & 0xffff);
- ea = (uint *)(regs->gpr[idxreg] + sdisp);
- if (copy_from_user(ip, ea, sizeof(double)))
- retval = -EFAULT;
- break;
-
- case LFDU:
- if (copy_from_user(ip, ea, sizeof(double)))
- retval = -EFAULT;
- else
- regs->gpr[idxreg] = (uint)ea;
- break;
- case LFS:
- sdisp = (instword & 0xffff);
- ea = (uint *)(regs->gpr[idxreg] + sdisp);
- if (copy_from_user(ip, ea, sizeof(float)))
- retval = -EFAULT;
- break;
- case STFD:
- /* this is a 16 bit quantity that is sign extended
- * so use a signed short here -- Cort
- */
- sdisp = (instword & 0xffff);
- ea = (uint *)(regs->gpr[idxreg] + sdisp);
- if (copy_to_user(ea, ip, sizeof(double)))
- retval = -EFAULT;
- break;
-
- case STFDU:
- if (copy_to_user(ea, ip, sizeof(double)))
- retval = -EFAULT;
- else
- regs->gpr[idxreg] = (uint)ea;
- break;
- case FMR:
- /* assume this is a fp move -- Cort */
- memcpy( ip, ¤t->thread.fpr[(instword>>11)&0x1f],
- sizeof(double) );
- break;
- default:
- retval = 1;
- printk("Bad emulation %s/%d\n"
- " NIP: %08lx instruction: %08x opcode: %x "
- "A: %x B: %x C: %x code: %x rc: %x\n",
- current->comm,current->pid,
- regs->nip,
- instword,inst,
- (instword>>16)&0x1f,
- (instword>>11)&0x1f,
- (instword>>6)&0x1f,
- (instword>>1)&0x3ff,
- instword&1);
- {
- int pa;
- print_8xx_pte(current->mm,regs->nip);
- pa = get_8xx_pte(current->mm,regs->nip) & PAGE_MASK;
- pa |= (regs->nip & ~PAGE_MASK);
- pa = (unsigned long)__va(pa);
- printk("Kernel VA for NIP %x ", pa);
- print_8xx_pte(current->mm,pa);
- }
-
- }
-
- if (retval == 0)
- regs->nip += 4;
- return(retval);
-}
-
diff --git a/arch/ppc/kernel/time.c b/arch/ppc/kernel/time.c
deleted file mode 100644
index 18ee851..0000000
--- a/arch/ppc/kernel/time.c
+++ /dev/null
@@ -1,445 +0,0 @@
-/*
- * Common time routines among all ppc machines.
- *
- * Written by Cort Dougan (cort@cs.nmt.edu) to merge
- * Paul Mackerras' version and mine for PReP and Pmac.
- * MPC8xx/MBX changes by Dan Malek (dmalek@jlc.net).
- *
- * First round of bugfixes by Gabriel Paubert (paubert@iram.es)
- * to make clock more stable (2.4.0-test5). The only thing
- * that this code assumes is that the timebases have been synchronized
- * by firmware on SMP and are never stopped (never do sleep
- * on SMP then, nap and doze are OK).
- *
- * TODO (not necessarily in this file):
- * - improve precision and reproducibility of timebase frequency
- * measurement at boot time.
- * - get rid of xtime_lock for gettimeofday (generic kernel problem
- * to be implemented on all architectures for SMP scalability and
- * eventually implementing gettimeofday without entering the kernel).
- * - put all time/clock related variables in a single structure
- * to minimize number of cache lines touched by gettimeofday()
- * - for astronomical applications: add a new function to get
- * non ambiguous timestamps even around leap seconds. This needs
- * a new timestamp format and a good name.
- *
- *
- * The following comment is partially obsolete (at least the long wait
- * is no more a valid reason):
- * Since the MPC8xx has a programmable interrupt timer, I decided to
- * use that rather than the decrementer. Two reasons: 1.) the clock
- * frequency is low, causing 2.) a long wait in the timer interrupt
- * while ((d = get_dec()) == dval)
- * loop. The MPC8xx can be driven from a variety of input clocks,
- * so a number of assumptions have been made here because the kernel
- * parameter HZ is a constant. We assume (correctly, today :-) that
- * the MPC8xx on the MBX board is driven from a 32.768 kHz crystal.
- * This is then divided by 4, providing a 8192 Hz clock into the PIT.
- * Since it is not possible to get a nice 100 Hz clock out of this, without
- * creating a software PLL, I have set HZ to 128. -- Dan
- *
- * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
- * "A Kernel Model for Precision Timekeeping" by Dave Mills
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/interrupt.h>
-#include <linux/timex.h>
-#include <linux/kernel_stat.h>
-#include <linux/mc146818rtc.h>
-#include <linux/time.h>
-#include <linux/init.h>
-#include <linux/profile.h>
-
-#include <asm/io.h>
-#include <asm/nvram.h>
-#include <asm/cache.h>
-#include <asm/8xx_immap.h>
-#include <asm/machdep.h>
-#include <asm/irq_regs.h>
-
-#include <asm/time.h>
-
-unsigned long disarm_decr[NR_CPUS];
-
-extern struct timezone sys_tz;
-
-/* keep track of when we need to update the rtc */
-time_t last_rtc_update;
-
-/* The decrementer counts down by 128 every 128ns on a 601. */
-#define DECREMENTER_COUNT_601 (1000000000 / HZ)
-
-unsigned tb_ticks_per_jiffy;
-unsigned tb_to_us;
-unsigned tb_last_stamp;
-unsigned long tb_to_ns_scale;
-
-/* used for timezone offset */
-static long timezone_offset;
-
-DEFINE_SPINLOCK(rtc_lock);
-
-EXPORT_SYMBOL(rtc_lock);
-
-/* Timer interrupt helper function */
-static inline int tb_delta(unsigned *jiffy_stamp) {
- int delta;
- if (__USE_RTC()) {
- delta = get_rtcl();
- if (delta < *jiffy_stamp) *jiffy_stamp -= 1000000000;
- delta -= *jiffy_stamp;
- } else {
- delta = get_tbl() - *jiffy_stamp;
- }
- return delta;
-}
-
-#ifdef CONFIG_SMP
-unsigned long profile_pc(struct pt_regs *regs)
-{
- unsigned long pc = instruction_pointer(regs);
-
- if (in_lock_functions(pc))
- return regs->link;
-
- return pc;
-}
-EXPORT_SYMBOL(profile_pc);
-#endif
-
-void wakeup_decrementer(void)
-{
- set_dec(tb_ticks_per_jiffy);
- /* No currently-supported powerbook has a 601,
- * so use get_tbl, not native
- */
- last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
-}
-
-/*
- * timer_interrupt - gets called when the decrementer overflows,
- * with interrupts disabled.
- * We set it up to overflow again in 1/HZ seconds.
- */
-void timer_interrupt(struct pt_regs * regs)
-{
- struct pt_regs *old_regs;
- int next_dec;
- unsigned long cpu = smp_processor_id();
- unsigned jiffy_stamp = last_jiffy_stamp(cpu);
- extern void do_IRQ(struct pt_regs *);
-
- if (atomic_read(&ppc_n_lost_interrupts) != 0)
- do_IRQ(regs);
-
- old_regs = set_irq_regs(regs);
- irq_enter();
-
- while ((next_dec = tb_ticks_per_jiffy - tb_delta(&jiffy_stamp)) <= 0) {
- jiffy_stamp += tb_ticks_per_jiffy;
-
- profile_tick(CPU_PROFILING);
- update_process_times(user_mode(regs));
-
- if (smp_processor_id())
- continue;
-
- /* We are in an interrupt, no need to save/restore flags */
- write_seqlock(&xtime_lock);
- tb_last_stamp = jiffy_stamp;
- do_timer(1);
-
- /*
- * update the rtc when needed, this should be performed on the
- * right fraction of a second. Half or full second ?
- * Full second works on mk48t59 clocks, others need testing.
- * Note that this update is basically only used through
- * the adjtimex system calls. Setting the HW clock in
- * any other way is a /dev/rtc and userland business.
- * This is still wrong by -0.5/+1.5 jiffies because of the
- * timer interrupt resolution and possible delay, but here we
- * hit a quantization limit which can only be solved by higher
- * resolution timers and decoupling time management from timer
- * interrupts. This is also wrong on the clocks
- * which require being written at the half second boundary.
- * We should have an rtc call that only sets the minutes and
- * seconds like on Intel to avoid problems with non UTC clocks.
- */
- if ( ppc_md.set_rtc_time && ntp_synced() &&
- xtime.tv_sec - last_rtc_update >= 659 &&
- abs((xtime.tv_nsec / 1000) - (1000000-1000000/HZ)) < 500000/HZ) {
- if (ppc_md.set_rtc_time(xtime.tv_sec+1 + timezone_offset) == 0)
- last_rtc_update = xtime.tv_sec+1;
- else
- /* Try again one minute later */
- last_rtc_update += 60;
- }
- write_sequnlock(&xtime_lock);
- }
- if ( !disarm_decr[smp_processor_id()] )
- set_dec(next_dec);
- last_jiffy_stamp(cpu) = jiffy_stamp;
-
- if (ppc_md.heartbeat && !ppc_md.heartbeat_count--)
- ppc_md.heartbeat();
-
- irq_exit();
- set_irq_regs(old_regs);
-}
-
-/*
- * This version of gettimeofday has microsecond resolution.
- */
-void do_gettimeofday(struct timeval *tv)
-{
- unsigned long flags;
- unsigned long seq;
- unsigned delta, usec, sec;
-
- do {
- seq = read_seqbegin_irqsave(&xtime_lock, flags);
- sec = xtime.tv_sec;
- usec = (xtime.tv_nsec / 1000);
- delta = tb_ticks_since(tb_last_stamp);
-#ifdef CONFIG_SMP
- /* As long as timebases are not in sync, gettimeofday can only
- * have jiffy resolution on SMP.
- */
- if (!smp_tb_synchronized)
- delta = 0;
-#endif /* CONFIG_SMP */
- } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
-
- usec += mulhwu(tb_to_us, delta);
- while (usec >= 1000000) {
- sec++;
- usec -= 1000000;
- }
- tv->tv_sec = sec;
- tv->tv_usec = usec;
-}
-
-EXPORT_SYMBOL(do_gettimeofday);
-
-int do_settimeofday(struct timespec *tv)
-{
- time_t wtm_sec, new_sec = tv->tv_sec;
- long wtm_nsec, new_nsec = tv->tv_nsec;
- unsigned long flags;
- int tb_delta;
-
- if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
- return -EINVAL;
-
- write_seqlock_irqsave(&xtime_lock, flags);
- /* Updating the RTC is not the job of this code. If the time is
- * stepped under NTP, the RTC will be update after STA_UNSYNC
- * is cleared. Tool like clock/hwclock either copy the RTC
- * to the system time, in which case there is no point in writing
- * to the RTC again, or write to the RTC but then they don't call
- * settimeofday to perform this operation. Note also that
- * we don't touch the decrementer since:
- * a) it would lose timer interrupt synchronization on SMP
- * (if it is working one day)
- * b) it could make one jiffy spuriously shorter or longer
- * which would introduce another source of uncertainty potentially
- * harmful to relatively short timers.
- */
-
- /* This works perfectly on SMP only if the tb are in sync but
- * guarantees an error < 1 jiffy even if they are off by eons,
- * still reasonable when gettimeofday resolution is 1 jiffy.
- */
- tb_delta = tb_ticks_since(last_jiffy_stamp(smp_processor_id()));
-
- new_nsec -= 1000 * mulhwu(tb_to_us, tb_delta);
-
- wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - new_sec);
- wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - new_nsec);
-
- set_normalized_timespec(&xtime, new_sec, new_nsec);
- set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
- /* In case of a large backwards jump in time with NTP, we want the
- * clock to be updated as soon as the PLL is again in lock.
- */
- last_rtc_update = new_sec - 658;
-
- ntp_clear();
- write_sequnlock_irqrestore(&xtime_lock, flags);
- clock_was_set();
- return 0;
-}
-
-EXPORT_SYMBOL(do_settimeofday);
-
-/* This function is only called on the boot processor */
-void __init time_init(void)
-{
- time_t sec, old_sec;
- unsigned old_stamp, stamp, elapsed;
-
- if (ppc_md.time_init != NULL)
- timezone_offset = ppc_md.time_init();
-
- if (__USE_RTC()) {
- /* 601 processor: dec counts down by 128 every 128ns */
- tb_ticks_per_jiffy = DECREMENTER_COUNT_601;
- /* mulhwu_scale_factor(1000000000, 1000000) is 0x418937 */
- tb_to_us = 0x418937;
- } else {
- ppc_md.calibrate_decr();
- tb_to_ns_scale = mulhwu(tb_to_us, 1000 << 10);
- }
-
- /* Now that the decrementer is calibrated, it can be used in case the
- * clock is stuck, but the fact that we have to handle the 601
- * makes things more complex. Repeatedly read the RTC until the
- * next second boundary to try to achieve some precision. If there
- * is no RTC, we still need to set tb_last_stamp and
- * last_jiffy_stamp(cpu 0) to the current stamp.
- */
- stamp = get_native_tbl();
- if (ppc_md.get_rtc_time) {
- sec = ppc_md.get_rtc_time();
- elapsed = 0;
- do {
- old_stamp = stamp;
- old_sec = sec;
- stamp = get_native_tbl();
- if (__USE_RTC() && stamp < old_stamp)
- old_stamp -= 1000000000;
- elapsed += stamp - old_stamp;
- sec = ppc_md.get_rtc_time();
- } while ( sec == old_sec && elapsed < 2*HZ*tb_ticks_per_jiffy);
- if (sec==old_sec)
- printk("Warning: real time clock seems stuck!\n");
- xtime.tv_sec = sec;
- xtime.tv_nsec = 0;
- /* No update now, we just read the time from the RTC ! */
- last_rtc_update = xtime.tv_sec;
- }
- last_jiffy_stamp(0) = tb_last_stamp = stamp;
-
- /* Not exact, but the timer interrupt takes care of this */
- set_dec(tb_ticks_per_jiffy);
-
- /* If platform provided a timezone (pmac), we correct the time */
- if (timezone_offset) {
- sys_tz.tz_minuteswest = -timezone_offset / 60;
- sys_tz.tz_dsttime = 0;
- xtime.tv_sec -= timezone_offset;
- }
- set_normalized_timespec(&wall_to_monotonic,
- -xtime.tv_sec, -xtime.tv_nsec);
-}
-
-#define FEBRUARY 2
-#define STARTOFTIME 1970
-#define SECDAY 86400L
-#define SECYR (SECDAY * 365)
-
-/*
- * Note: this is wrong for 2100, but our signed 32-bit time_t will
- * have overflowed long before that, so who cares. -- paulus
- */
-#define leapyear(year) ((year) % 4 == 0)
-#define days_in_year(a) (leapyear(a) ? 366 : 365)
-#define days_in_month(a) (month_days[(a) - 1])
-
-static int month_days[12] = {
- 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
-};
-
-void to_tm(int tim, struct rtc_time * tm)
-{
- register int i;
- register long hms, day, gday;
-
- gday = day = tim / SECDAY;
- hms = tim % SECDAY;
-
- /* Hours, minutes, seconds are easy */
- tm->tm_hour = hms / 3600;
- tm->tm_min = (hms % 3600) / 60;
- tm->tm_sec = (hms % 3600) % 60;
-
- /* Number of years in days */
- for (i = STARTOFTIME; day >= days_in_year(i); i++)
- day -= days_in_year(i);
- tm->tm_year = i;
-
- /* Number of months in days left */
- if (leapyear(tm->tm_year))
- days_in_month(FEBRUARY) = 29;
- for (i = 1; day >= days_in_month(i); i++)
- day -= days_in_month(i);
- days_in_month(FEBRUARY) = 28;
- tm->tm_mon = i;
-
- /* Days are what is left over (+1) from all that. */
- tm->tm_mday = day + 1;
-
- /*
- * Determine the day of week. Jan. 1, 1970 was a Thursday.
- */
- tm->tm_wday = (gday + 4) % 7;
-}
-
-/* Auxiliary function to compute scaling factors */
-/* Actually the choice of a timebase running at 1/4 the of the bus
- * frequency giving resolution of a few tens of nanoseconds is quite nice.
- * It makes this computation very precise (27-28 bits typically) which
- * is optimistic considering the stability of most processor clock
- * oscillators and the precision with which the timebase frequency
- * is measured but does not harm.
- */
-unsigned mulhwu_scale_factor(unsigned inscale, unsigned outscale) {
- unsigned mlt=0, tmp, err;
- /* No concern for performance, it's done once: use a stupid
- * but safe and compact method to find the multiplier.
- */
- for (tmp = 1U<<31; tmp != 0; tmp >>= 1) {
- if (mulhwu(inscale, mlt|tmp) < outscale) mlt|=tmp;
- }
- /* We might still be off by 1 for the best approximation.
- * A side effect of this is that if outscale is too large
- * the returned value will be zero.
- * Many corner cases have been checked and seem to work,
- * some might have been forgotten in the test however.
- */
- err = inscale*(mlt+1);
- if (err <= inscale/2) mlt++;
- return mlt;
-}
-
-unsigned long long sched_clock(void)
-{
- unsigned long lo, hi, hi2;
- unsigned long long tb;
-
- if (!__USE_RTC()) {
- do {
- hi = get_tbu();
- lo = get_tbl();
- hi2 = get_tbu();
- } while (hi2 != hi);
- tb = ((unsigned long long) hi << 32) | lo;
- tb = (tb * tb_to_ns_scale) >> 10;
- } else {
- do {
- hi = get_rtcu();
- lo = get_rtcl();
- hi2 = get_rtcu();
- } while (hi2 != hi);
- tb = ((unsigned long long) hi) * 1000000000 + lo;
- }
- return tb;
-}
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
deleted file mode 100644
index a467a42..0000000
--- a/arch/ppc/kernel/traps.c
+++ /dev/null
@@ -1,826 +0,0 @@
-/*
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Modified by Cort Dougan (cort@cs.nmt.edu)
- * and Paul Mackerras (paulus@cs.anu.edu.au)
- */
-
-/*
- * This file handles the architecture-dependent parts of hardware exceptions
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/prctl.h>
-#include <linux/bug.h>
-
-#include <asm/pgtable.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/reg.h>
-#include <asm/xmon.h>
-#include <asm/pmc.h>
-
-#ifdef CONFIG_XMON
-extern int xmon_bpt(struct pt_regs *regs);
-extern int xmon_sstep(struct pt_regs *regs);
-extern int xmon_iabr_match(struct pt_regs *regs);
-extern int xmon_dabr_match(struct pt_regs *regs);
-
-int (*debugger)(struct pt_regs *regs) = xmon;
-int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
-int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
-int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match;
-int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match;
-void (*debugger_fault_handler)(struct pt_regs *regs);
-#else
-#ifdef CONFIG_KGDB
-int (*debugger)(struct pt_regs *regs);
-int (*debugger_bpt)(struct pt_regs *regs);
-int (*debugger_sstep)(struct pt_regs *regs);
-int (*debugger_iabr_match)(struct pt_regs *regs);
-int (*debugger_dabr_match)(struct pt_regs *regs);
-void (*debugger_fault_handler)(struct pt_regs *regs);
-#else
-#define debugger(regs) do { } while (0)
-#define debugger_bpt(regs) 0
-#define debugger_sstep(regs) 0
-#define debugger_iabr_match(regs) 0
-#define debugger_dabr_match(regs) 0
-#define debugger_fault_handler ((void (*)(struct pt_regs *))0)
-#endif
-#endif
-
-/*
- * Trap & Exception support
- */
-
-DEFINE_SPINLOCK(die_lock);
-
-int die(const char * str, struct pt_regs * fp, long err)
-{
- static int die_counter;
- int nl = 0;
- console_verbose();
- spin_lock_irq(&die_lock);
- printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
-#ifdef CONFIG_PREEMPT
- printk("PREEMPT ");
- nl = 1;
-#endif
-#ifdef CONFIG_SMP
- printk("SMP NR_CPUS=%d ", NR_CPUS);
- nl = 1;
-#endif
- if (nl)
- printk("\n");
- show_regs(fp);
- add_taint(TAINT_DIE);
- spin_unlock_irq(&die_lock);
- /* do_exit() should take care of panic'ing from an interrupt
- * context so we don't handle it here
- */
- do_exit(err);
-}
-
-void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
-{
- siginfo_t info;
-
- if (!user_mode(regs)) {
- debugger(regs);
- die("Exception in kernel mode", regs, signr);
- }
- info.si_signo = signr;
- info.si_errno = 0;
- info.si_code = code;
- info.si_addr = (void __user *) addr;
- force_sig_info(signr, &info, current);
-
- /*
- * Init gets no signals that it doesn't have a handler for.
- * That's all very well, but if it has caused a synchronous
- * exception and we ignore the resulting signal, it will just
- * generate the same exception over and over again and we get
- * nowhere. Better to kill it and let the kernel panic.
- */
- if (is_global_init(current)) {
- __sighandler_t handler;
-
- spin_lock_irq(¤t->sighand->siglock);
- handler = current->sighand->action[signr-1].sa.sa_handler;
- spin_unlock_irq(¤t->sighand->siglock);
- if (handler == SIG_DFL) {
- /* init has generated a synchronous exception
- and it doesn't have a handler for the signal */
- printk(KERN_CRIT "init has generated signal %d "
- "but has no handler for it\n", signr);
- do_exit(signr);
- }
- }
-}
-
-/*
- * I/O accesses can cause machine checks on powermacs.
- * Check if the NIP corresponds to the address of a sync
- * instruction for which there is an entry in the exception
- * table.
- * Note that the 601 only takes a machine check on TEA
- * (transfer error ack) signal assertion, and does not
- * set any of the top 16 bits of SRR1.
- * -- paulus.
- */
-static inline int check_io_access(struct pt_regs *regs)
-{
-#if defined CONFIG_8xx
- unsigned long msr = regs->msr;
- const struct exception_table_entry *entry;
- unsigned int *nip = (unsigned int *)regs->nip;
-
- if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
- && (entry = search_exception_tables(regs->nip)) != NULL) {
- /*
- * Check that it's a sync instruction, or somewhere
- * in the twi; isync; nop sequence that inb/inw/inl uses.
- * As the address is in the exception table
- * we should be able to read the instr there.
- * For the debug message, we look at the preceding
- * load or store.
- */
- if (*nip == 0x60000000) /* nop */
- nip -= 2;
- else if (*nip == 0x4c00012c) /* isync */
- --nip;
- /* eieio from I/O string functions */
- else if ((*nip) == 0x7c0006ac || *(nip+1) == 0x7c0006ac)
- nip += 2;
- if (*nip == 0x7c0004ac || (*nip >> 26) == 3 ||
- (*(nip+1) >> 26) == 3) {
- /* sync or twi */
- unsigned int rb;
-
- --nip;
- rb = (*nip >> 11) & 0x1f;
- printk(KERN_DEBUG "%s bad port %lx at %p\n",
- (*nip & 0x100)? "OUT to": "IN from",
- regs->gpr[rb] - _IO_BASE, nip);
- regs->msr |= MSR_RI;
- regs->nip = entry->fixup;
- return 1;
- }
- }
-#endif /* CONFIG_8xx */
- return 0;
-}
-
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
-/* On 4xx, the reason for the machine check or program exception
- is in the ESR. */
-#define get_reason(regs) ((regs)->dsisr)
-#define get_mc_reason(regs) ((regs)->dsisr)
-#define REASON_FP ESR_FP
-#define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
-#define REASON_PRIVILEGED ESR_PPR
-#define REASON_TRAP ESR_PTR
-
-/* single-step stuff */
-#define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
-#define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
-
-#else
-/* On non-4xx, the reason for the machine check or program
- exception is in the MSR. */
-#define get_reason(regs) ((regs)->msr)
-#define get_mc_reason(regs) ((regs)->msr)
-#define REASON_FP 0x100000
-#define REASON_ILLEGAL 0x80000
-#define REASON_PRIVILEGED 0x40000
-#define REASON_TRAP 0x20000
-
-#define single_stepping(regs) ((regs)->msr & MSR_SE)
-#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
-#endif
-
-/*
- * This is "fall-back" implementation for configurations
- * which don't provide platform-specific machine check info
- */
-void __attribute__ ((weak))
-platform_machine_check(struct pt_regs *regs)
-{
-}
-
-#if defined(CONFIG_4xx)
-int machine_check_4xx(struct pt_regs *regs)
-{
- unsigned long reason = get_mc_reason(regs);
-
- if (reason & ESR_IMCP) {
- printk("Instruction");
- mtspr(SPRN_ESR, reason & ~ESR_IMCP);
- } else
- printk("Data");
- printk(" machine check in kernel mode.\n");
-
- return 0;
-}
-
-int machine_check_440A(struct pt_regs *regs)
-{
- unsigned long reason = get_mc_reason(regs);
-
- printk("Machine check in kernel mode.\n");
- if (reason & ESR_IMCP){
- printk("Instruction Synchronous Machine Check exception\n");
- mtspr(SPRN_ESR, reason & ~ESR_IMCP);
- }
- else {
- u32 mcsr = mfspr(SPRN_MCSR);
- if (mcsr & MCSR_IB)
- printk("Instruction Read PLB Error\n");
- if (mcsr & MCSR_DRB)
- printk("Data Read PLB Error\n");
- if (mcsr & MCSR_DWB)
- printk("Data Write PLB Error\n");
- if (mcsr & MCSR_TLBP)
- printk("TLB Parity Error\n");
- if (mcsr & MCSR_ICP){
- flush_instruction_cache();
- printk("I-Cache Parity Error\n");
- }
- if (mcsr & MCSR_DCSP)
- printk("D-Cache Search Parity Error\n");
- if (mcsr & MCSR_DCFP)
- printk("D-Cache Flush Parity Error\n");
- if (mcsr & MCSR_IMPE)
- printk("Machine Check exception is imprecise\n");
-
- /* Clear MCSR */
- mtspr(SPRN_MCSR, mcsr);
- }
- return 0;
-}
-#else
-int machine_check_generic(struct pt_regs *regs)
-{
- unsigned long reason = get_mc_reason(regs);
-
- printk("Machine check in kernel mode.\n");
- printk("Caused by (from SRR1=%lx): ", reason);
- switch (reason & 0x601F0000) {
- case 0x80000:
- printk("Machine check signal\n");
- break;
- case 0: /* for 601 */
- case 0x40000:
- case 0x140000: /* 7450 MSS error and TEA */
- printk("Transfer error ack signal\n");
- break;
- case 0x20000:
- printk("Data parity error signal\n");
- break;
- case 0x10000:
- printk("Address parity error signal\n");
- break;
- case 0x20000000:
- printk("L1 Data Cache error\n");
- break;
- case 0x40000000:
- printk("L1 Instruction Cache error\n");
- break;
- case 0x00100000:
- printk("L2 data cache parity error\n");
- break;
- default:
- printk("Unknown values in msr\n");
- }
- return 0;
-}
-#endif /* everything else */
-
-void machine_check_exception(struct pt_regs *regs)
-{
- int recover = 0;
-
- if (cur_cpu_spec->machine_check)
- recover = cur_cpu_spec->machine_check(regs);
- if (recover > 0)
- return;
-
- if (user_mode(regs)) {
- regs->msr |= MSR_RI;
- _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
- return;
- }
-
-#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
- /* the qspan pci read routines can cause machine checks -- Cort */
- bad_page_fault(regs, regs->dar, SIGBUS);
- return;
-#endif
-
- if (debugger_fault_handler) {
- debugger_fault_handler(regs);
- regs->msr |= MSR_RI;
- return;
- }
-
- if (check_io_access(regs))
- return;
-
- /*
- * Optional platform-provided routine to print out
- * additional info, e.g. bus error registers.
- */
- platform_machine_check(regs);
-
- debugger(regs);
- die("machine check", regs, SIGBUS);
-}
-
-void SMIException(struct pt_regs *regs)
-{
- debugger(regs);
-#if !(defined(CONFIG_XMON) || defined(CONFIG_KGDB))
- show_regs(regs);
- panic("System Management Interrupt");
-#endif
-}
-
-void unknown_exception(struct pt_regs *regs)
-{
- printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
- regs->nip, regs->msr, regs->trap, print_tainted());
- _exception(SIGTRAP, regs, 0, 0);
-}
-
-void instruction_breakpoint_exception(struct pt_regs *regs)
-{
- if (debugger_iabr_match(regs))
- return;
- _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
-}
-
-void RunModeException(struct pt_regs *regs)
-{
- _exception(SIGTRAP, regs, 0, 0);
-}
-
-/* Illegal instruction emulation support. Originally written to
- * provide the PVR to user applications using the mfspr rd, PVR.
- * Return non-zero if we can't emulate, or -EFAULT if the associated
- * memory access caused an access fault. Return zero on success.
- *
- * There are a couple of ways to do this, either "decode" the instruction
- * or directly match lots of bits. In this case, matching lots of
- * bits is faster and easier.
- *
- */
-#define INST_MFSPR_PVR 0x7c1f42a6
-#define INST_MFSPR_PVR_MASK 0xfc1fffff
-
-#define INST_DCBA 0x7c0005ec
-#define INST_DCBA_MASK 0x7c0007fe
-
-#define INST_MCRXR 0x7c000400
-#define INST_MCRXR_MASK 0x7c0007fe
-
-#define INST_STRING 0x7c00042a
-#define INST_STRING_MASK 0x7c0007fe
-#define INST_STRING_GEN_MASK 0x7c00067e
-#define INST_LSWI 0x7c0004aa
-#define INST_LSWX 0x7c00042a
-#define INST_STSWI 0x7c0005aa
-#define INST_STSWX 0x7c00052a
-
-static int emulate_string_inst(struct pt_regs *regs, u32 instword)
-{
- u8 rT = (instword >> 21) & 0x1f;
- u8 rA = (instword >> 16) & 0x1f;
- u8 NB_RB = (instword >> 11) & 0x1f;
- u32 num_bytes;
- unsigned long EA;
- int pos = 0;
-
- /* Early out if we are an invalid form of lswx */
- if ((instword & INST_STRING_MASK) == INST_LSWX)
- if ((rT == rA) || (rT == NB_RB))
- return -EINVAL;
-
- EA = (rA == 0) ? 0 : regs->gpr[rA];
-
- switch (instword & INST_STRING_MASK) {
- case INST_LSWX:
- case INST_STSWX:
- EA += NB_RB;
- num_bytes = regs->xer & 0x7f;
- break;
- case INST_LSWI:
- case INST_STSWI:
- num_bytes = (NB_RB == 0) ? 32 : NB_RB;
- break;
- default:
- return -EINVAL;
- }
-
- while (num_bytes != 0)
- {
- u8 val;
- u32 shift = 8 * (3 - (pos & 0x3));
-
- switch ((instword & INST_STRING_MASK)) {
- case INST_LSWX:
- case INST_LSWI:
- if (get_user(val, (u8 __user *)EA))
- return -EFAULT;
- /* first time updating this reg,
- * zero it out */
- if (pos == 0)
- regs->gpr[rT] = 0;
- regs->gpr[rT] |= val << shift;
- break;
- case INST_STSWI:
- case INST_STSWX:
- val = regs->gpr[rT] >> shift;
- if (put_user(val, (u8 __user *)EA))
- return -EFAULT;
- break;
- }
- /* move EA to next address */
- EA += 1;
- num_bytes--;
-
- /* manage our position within the register */
- if (++pos == 4) {
- pos = 0;
- if (++rT == 32)
- rT = 0;
- }
- }
-
- return 0;
-}
-
-static int emulate_instruction(struct pt_regs *regs)
-{
- u32 instword;
- u32 rd;
-
- if (!user_mode(regs))
- return -EINVAL;
- CHECK_FULL_REGS(regs);
-
- if (get_user(instword, (u32 __user *)(regs->nip)))
- return -EFAULT;
-
- /* Emulate the mfspr rD, PVR.
- */
- if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
- rd = (instword >> 21) & 0x1f;
- regs->gpr[rd] = mfspr(SPRN_PVR);
- return 0;
- }
-
- /* Emulating the dcba insn is just a no-op. */
- if ((instword & INST_DCBA_MASK) == INST_DCBA)
- return 0;
-
- /* Emulate the mcrxr insn. */
- if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
- int shift = (instword >> 21) & 0x1c;
- unsigned long msk = 0xf0000000UL >> shift;
-
- regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
- regs->xer &= ~0xf0000000UL;
- return 0;
- }
-
- /* Emulate load/store string insn. */
- if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
- return emulate_string_inst(regs, instword);
-
- return -EINVAL;
-}
-
-/*
- * After we have successfully emulated an instruction, we have to
- * check if the instruction was being single-stepped, and if so,
- * pretend we got a single-step exception. This was pointed out
- * by Kumar Gala. -- paulus
- */
-static void emulate_single_step(struct pt_regs *regs)
-{
- if (single_stepping(regs)) {
- clear_single_step(regs);
- _exception(SIGTRAP, regs, TRAP_TRACE, 0);
- }
-}
-
-int is_valid_bugaddr(unsigned long addr)
-{
- return addr >= PAGE_OFFSET;
-}
-
-void program_check_exception(struct pt_regs *regs)
-{
- unsigned int reason = get_reason(regs);
- extern int do_mathemu(struct pt_regs *regs);
-
-#ifdef CONFIG_MATH_EMULATION
- /* (reason & REASON_ILLEGAL) would be the obvious thing here,
- * but there seems to be a hardware bug on the 405GP (RevD)
- * that means ESR is sometimes set incorrectly - either to
- * ESR_DST (!?) or 0. In the process of chasing this with the
- * hardware people - not sure if it can happen on any illegal
- * instruction or only on FP instructions, whether there is a
- * pattern to occurrences etc. -dgibson 31/Mar/2003 */
- if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
- emulate_single_step(regs);
- return;
- }
-#endif /* CONFIG_MATH_EMULATION */
-
- if (reason & REASON_FP) {
- /* IEEE FP exception */
- int code = 0;
- u32 fpscr;
-
- /* We must make sure the FP state is consistent with
- * our MSR_FP in regs
- */
- preempt_disable();
- if (regs->msr & MSR_FP)
- giveup_fpu(current);
- preempt_enable();
-
- fpscr = current->thread.fpscr.val;
- fpscr &= fpscr << 22; /* mask summary bits with enables */
- if (fpscr & FPSCR_VX)
- code = FPE_FLTINV;
- else if (fpscr & FPSCR_OX)
- code = FPE_FLTOVF;
- else if (fpscr & FPSCR_UX)
- code = FPE_FLTUND;
- else if (fpscr & FPSCR_ZX)
- code = FPE_FLTDIV;
- else if (fpscr & FPSCR_XX)
- code = FPE_FLTRES;
- _exception(SIGFPE, regs, code, regs->nip);
- return;
- }
-
- if (reason & REASON_TRAP) {
- /* trap exception */
- if (debugger_bpt(regs))
- return;
-
- if (!(regs->msr & MSR_PR) && /* not user-mode */
- report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
- regs->nip += 4;
- return;
- }
- _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
- return;
- }
-
- /* Try to emulate it if we should. */
- if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
- switch (emulate_instruction(regs)) {
- case 0:
- regs->nip += 4;
- emulate_single_step(regs);
- return;
- case -EFAULT:
- _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
- return;
- }
- }
-
- if (reason & REASON_PRIVILEGED)
- _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
- else
- _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
-}
-
-void single_step_exception(struct pt_regs *regs)
-{
- regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
- if (debugger_sstep(regs))
- return;
- _exception(SIGTRAP, regs, TRAP_TRACE, 0);
-}
-
-void alignment_exception(struct pt_regs *regs)
-{
- int sig, code, fixed = 0;
-
- fixed = fix_alignment(regs);
- if (fixed == 1) {
- regs->nip += 4; /* skip over emulated instruction */
- emulate_single_step(regs);
- return;
- }
- if (fixed == -EFAULT) {
- sig = SIGSEGV;
- code = SEGV_ACCERR;
- } else {
- sig = SIGBUS;
- code = BUS_ADRALN;
- }
- if (user_mode(regs))
- _exception(sig, regs, code, regs->dar);
- else
- bad_page_fault(regs, regs->dar, sig);
-}
-
-void StackOverflow(struct pt_regs *regs)
-{
- printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
- current, regs->gpr[1]);
- debugger(regs);
- show_regs(regs);
- panic("kernel stack overflow");
-}
-
-void nonrecoverable_exception(struct pt_regs *regs)
-{
- printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
- regs->nip, regs->msr);
- debugger(regs);
- die("nonrecoverable exception", regs, SIGKILL);
-}
-
-void trace_syscall(struct pt_regs *regs)
-{
- printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
- current, current->pid, regs->nip, regs->link, regs->gpr[0],
- regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
-}
-
-#ifdef CONFIG_8xx
-void SoftwareEmulation(struct pt_regs *regs)
-{
- extern int do_mathemu(struct pt_regs *);
- extern int Soft_emulate_8xx(struct pt_regs *);
- int errcode;
-
- CHECK_FULL_REGS(regs);
-
- if (!user_mode(regs)) {
- debugger(regs);
- die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
- }
-
-#ifdef CONFIG_MATH_EMULATION
- errcode = do_mathemu(regs);
-#else
- errcode = Soft_emulate_8xx(regs);
-#endif
- if (errcode) {
- if (errcode > 0)
- _exception(SIGFPE, regs, 0, 0);
- else if (errcode == -EFAULT)
- _exception(SIGSEGV, regs, 0, 0);
- else
- _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
- } else
- emulate_single_step(regs);
-}
-#endif /* CONFIG_8xx */
-
-#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
-
-void DebugException(struct pt_regs *regs, unsigned long debug_status)
-{
- if (debug_status & DBSR_IC) { /* instruction completion */
- regs->msr &= ~MSR_DE;
- if (user_mode(regs)) {
- current->thread.dbcr0 &= ~DBCR0_IC;
- } else {
- /* Disable instruction completion */
- mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
- /* Clear the instruction completion event */
- mtspr(SPRN_DBSR, DBSR_IC);
- if (debugger_sstep(regs))
- return;
- }
- _exception(SIGTRAP, regs, TRAP_TRACE, 0);
- }
-}
-#endif /* CONFIG_4xx || CONFIG_BOOKE */
-
-#if !defined(CONFIG_TAU_INT)
-void TAUException(struct pt_regs *regs)
-{
- printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
- regs->nip, regs->msr, regs->trap, print_tainted());
-}
-#endif /* CONFIG_INT_TAU */
-
-/*
- * FP unavailable trap from kernel - print a message, but let
- * the task use FP in the kernel until it returns to user mode.
- */
-void kernel_fp_unavailable_exception(struct pt_regs *regs)
-{
- regs->msr |= MSR_FP;
- printk(KERN_ERR "floating point used in kernel (task=%p, pc=%lx)\n",
- current, regs->nip);
-}
-
-void altivec_unavailable_exception(struct pt_regs *regs)
-{
- static int kernel_altivec_count;
-
-#ifndef CONFIG_ALTIVEC
- if (user_mode(regs)) {
- /* A user program has executed an altivec instruction,
- but this kernel doesn't support altivec. */
- _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
- return;
- }
-#endif
- /* The kernel has executed an altivec instruction without
- first enabling altivec. Whinge but let it do it. */
- if (++kernel_altivec_count < 10)
- printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n",
- current, regs->nip);
- regs->msr |= MSR_VEC;
-}
-
-#ifdef CONFIG_ALTIVEC
-void altivec_assist_exception(struct pt_regs *regs)
-{
- int err;
-
- preempt_disable();
- if (regs->msr & MSR_VEC)
- giveup_altivec(current);
- preempt_enable();
- if (!user_mode(regs)) {
- printk(KERN_ERR "altivec assist exception in kernel mode"
- " at %lx\n", regs->nip);
- debugger(regs);
- die("altivec assist exception", regs, SIGFPE);
- return;
- }
-
- err = emulate_altivec(regs);
- if (err == 0) {
- regs->nip += 4; /* skip emulated instruction */
- emulate_single_step(regs);
- return;
- }
-
- if (err == -EFAULT) {
- /* got an error reading the instruction */
- _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
- } else {
- /* didn't recognize the instruction */
- /* XXX quick hack for now: set the non-Java bit in the VSCR */
- printk(KERN_ERR "unrecognized altivec instruction "
- "in %s at %lx\n", current->comm, regs->nip);
- current->thread.vscr.u[3] |= 0x10000;
- }
-}
-#endif /* CONFIG_ALTIVEC */
-
-#ifdef CONFIG_BOOKE_WDT
-/*
- * Default handler for a Watchdog exception,
- * spins until a reboot occurs
- */
-void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
-{
- /* Generic WatchdogHandler, implement your own */
- mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
- return;
-}
-
-void WatchdogException(struct pt_regs *regs)
-{
- printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
- WatchdogHandler(regs);
-}
-#endif
-
-void __init trap_init(void)
-{
-}
diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S
deleted file mode 100644
index 8a24bc4..0000000
--- a/arch/ppc/kernel/vmlinux.lds.S
+++ /dev/null
@@ -1,164 +0,0 @@
-#include <asm-generic/vmlinux.lds.h>
-
-OUTPUT_ARCH(powerpc:common)
-jiffies = jiffies_64 + 4;
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .gnu.hash : { *(.gnu.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
-/* .init : { *(.init) } =0*/
- .plt : { *(.plt) }
- .text :
- {
- _text = .;
- TEXT_TEXT
- SCHED_TEXT
- LOCK_TEXT
- *(.fixup)
- *(.got1)
- __got2_start = .;
- *(.got2)
- __got2_end = .;
- }
- _etext = .;
- PROVIDE (etext = .);
-
- RODATA
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- .fixup : { *(.fixup) }
-
- __ex_table : {
- __start___ex_table = .;
- *(__ex_table)
- __stop___ex_table = .;
- }
-
- __bug_table : {
- __start___bug_table = .;
- *(__bug_table)
- __stop___bug_table = .;
- }
-
- /* Read-write section, merged into data segment: */
- . = ALIGN(4096);
- .data :
- {
- DATA_DATA
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.got.plt) *(.got)
- *(.dynamic)
- CONSTRUCTORS
- }
-
- . = ALIGN(4096);
- __nosave_begin = .;
- .data_nosave : { *(.data.nosave) }
- . = ALIGN(4096);
- __nosave_end = .;
-
- . = ALIGN(32);
- .data.cacheline_aligned : { *(.data.cacheline_aligned) }
-
- _edata = .;
- PROVIDE (edata = .);
-
- . = ALIGN(8192);
- .data.init_task : { *(.data.init_task) }
-
- NOTES
-
- . = ALIGN(4096);
- __init_begin = .;
- .init.text : {
- _sinittext = .;
- INIT_TEXT
- _einittext = .;
- }
- /* .exit.text is discarded at runtime, not link time,
- to deal with references from __bug_table */
- .exit.text : { EXIT_TEXT }
- .init.data : {
- INIT_DATA
- __vtop_table_begin = .;
- *(.vtop_fixup);
- __vtop_table_end = .;
- __ptov_table_begin = .;
- *(.ptov_fixup);
- __ptov_table_end = .;
- }
- . = ALIGN(16);
- __setup_start = .;
- .init.setup : { *(.init.setup) }
- __setup_end = .;
- __initcall_start = .;
- .initcall.init : {
- INITCALLS
- }
- __initcall_end = .;
-
- __con_initcall_start = .;
- .con_initcall.init : { *(.con_initcall.init) }
- __con_initcall_end = .;
-
- SECURITY_INIT
-
- __start___ftr_fixup = .;
- __ftr_fixup : { *(__ftr_fixup) }
- __stop___ftr_fixup = .;
-
- PERCPU(4096)
-
-#ifdef CONFIG_BLK_DEV_INITRD
- . = ALIGN(4096);
- __initramfs_start = .;
- .init.ramfs : { *(.init.ramfs) }
- __initramfs_end = .;
-#endif
-
- . = ALIGN(4096);
- __init_end = .;
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- __bss_stop = .;
-
- _end = . ;
- PROVIDE (end = .);
-
- /* Sections to be discarded. */
- /DISCARD/ : {
- *(.exitcall.exit)
- EXIT_DATA
- }
-}
diff --git a/arch/ppc/lib/Makefile b/arch/ppc/lib/Makefile
deleted file mode 100644
index 095e661..0000000
--- a/arch/ppc/lib/Makefile
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# Makefile for ppc-specific library files..
-#
-
-obj-y := checksum.o string.o div64.o
diff --git a/arch/ppc/lib/checksum.S b/arch/ppc/lib/checksum.S
deleted file mode 100644
index 7874e8a..0000000
--- a/arch/ppc/lib/checksum.S
+++ /dev/null
@@ -1,225 +0,0 @@
-/*
- * This file contains assembly-language implementations
- * of IP-style 1's complement checksum routines.
- *
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * Severely hacked about by Paul Mackerras (paulus@cs.anu.edu.au).
- */
-
-#include <linux/sys.h>
-#include <asm/processor.h>
-#include <asm/errno.h>
-#include <asm/ppc_asm.h>
-
- .text
-
-/*
- * ip_fast_csum(buf, len) -- Optimized for IP header
- * len is in words and is always >= 5.
- */
-_GLOBAL(ip_fast_csum)
- lwz r0,0(r3)
- lwzu r5,4(r3)
- addic. r4,r4,-2
- addc r0,r0,r5
- mtctr r4
- blelr-
-1: lwzu r4,4(r3)
- adde r0,r0,r4
- bdnz 1b
- addze r0,r0 /* add in final carry */
- rlwinm r3,r0,16,0,31 /* fold two halves together */
- add r3,r0,r3
- not r3,r3
- srwi r3,r3,16
- blr
-
-/*
- * Compute checksum of TCP or UDP pseudo-header:
- * csum_tcpudp_magic(saddr, daddr, len, proto, sum)
- */
-_GLOBAL(csum_tcpudp_magic)
- rlwimi r5,r6,16,0,15 /* put proto in upper half of len */
- addc r0,r3,r4 /* add 4 32-bit words together */
- adde r0,r0,r5
- adde r0,r0,r7
- addze r0,r0 /* add in final carry */
- rlwinm r3,r0,16,0,31 /* fold two halves together */
- add r3,r0,r3
- not r3,r3
- srwi r3,r3,16
- blr
-
-/*
- * computes the checksum of a memory block at buff, length len,
- * and adds in "sum" (32-bit)
- *
- * csum_partial(buff, len, sum)
- */
-_GLOBAL(csum_partial)
- addic r0,r5,0
- subi r3,r3,4
- srwi. r6,r4,2
- beq 3f /* if we're doing < 4 bytes */
- andi. r5,r3,2 /* Align buffer to longword boundary */
- beq+ 1f
- lhz r5,4(r3) /* do 2 bytes to get aligned */
- addi r3,r3,2
- subi r4,r4,2
- addc r0,r0,r5
- srwi. r6,r4,2 /* # words to do */
- beq 3f
-1: mtctr r6
-2: lwzu r5,4(r3) /* the bdnz has zero overhead, so it should */
- adde r0,r0,r5 /* be unnecessary to unroll this loop */
- bdnz 2b
- andi. r4,r4,3
-3: cmpwi 0,r4,2
- blt+ 4f
- lhz r5,4(r3)
- addi r3,r3,2
- subi r4,r4,2
- adde r0,r0,r5
-4: cmpwi 0,r4,1
- bne+ 5f
- lbz r5,4(r3)
- slwi r5,r5,8 /* Upper byte of word */
- adde r0,r0,r5
-5: addze r3,r0 /* add in final carry */
- blr
-
-/*
- * Computes the checksum of a memory block at src, length len,
- * and adds in "sum" (32-bit), while copying the block to dst.
- * If an access exception occurs on src or dst, it stores -EFAULT
- * to *src_err or *dst_err respectively, and (for an error on
- * src) zeroes the rest of dst.
- *
- * csum_partial_copy_generic(src, dst, len, sum, src_err, dst_err)
- */
-_GLOBAL(csum_partial_copy_generic)
- addic r0,r6,0
- subi r3,r3,4
- subi r4,r4,4
- srwi. r6,r5,2
- beq 3f /* if we're doing < 4 bytes */
- andi. r9,r4,2 /* Align dst to longword boundary */
- beq+ 1f
-81: lhz r6,4(r3) /* do 2 bytes to get aligned */
- addi r3,r3,2
- subi r5,r5,2
-91: sth r6,4(r4)
- addi r4,r4,2
- addc r0,r0,r6
- srwi. r6,r5,2 /* # words to do */
- beq 3f
-1: srwi. r6,r5,4 /* # groups of 4 words to do */
- beq 10f
- mtctr r6
-71: lwz r6,4(r3)
-72: lwz r9,8(r3)
-73: lwz r10,12(r3)
-74: lwzu r11,16(r3)
- adde r0,r0,r6
-75: stw r6,4(r4)
- adde r0,r0,r9
-76: stw r9,8(r4)
- adde r0,r0,r10
-77: stw r10,12(r4)
- adde r0,r0,r11
-78: stwu r11,16(r4)
- bdnz 71b
-10: rlwinm. r6,r5,30,30,31 /* # words left to do */
- beq 13f
- mtctr r6
-82: lwzu r9,4(r3)
-92: stwu r9,4(r4)
- adde r0,r0,r9
- bdnz 82b
-13: andi. r5,r5,3
-3: cmpwi 0,r5,2
- blt+ 4f
-83: lhz r6,4(r3)
- addi r3,r3,2
- subi r5,r5,2
-93: sth r6,4(r4)
- addi r4,r4,2
- adde r0,r0,r6
-4: cmpwi 0,r5,1
- bne+ 5f
-84: lbz r6,4(r3)
-94: stb r6,4(r4)
- slwi r6,r6,8 /* Upper byte of word */
- adde r0,r0,r6
-5: addze r3,r0 /* add in final carry */
- blr
-
-/* These shouldn't go in the fixup section, since that would
- cause the ex_table addresses to get out of order. */
-
-src_error_4:
- mfctr r6 /* update # bytes remaining from ctr */
- rlwimi r5,r6,4,0,27
- b 79f
-src_error_1:
- li r6,0
- subi r5,r5,2
-95: sth r6,4(r4)
- addi r4,r4,2
-79: srwi. r6,r5,2
- beq 3f
- mtctr r6
-src_error_2:
- li r6,0
-96: stwu r6,4(r4)
- bdnz 96b
-3: andi. r5,r5,3
- beq src_error
-src_error_3:
- li r6,0
- mtctr r5
- addi r4,r4,3
-97: stbu r6,1(r4)
- bdnz 97b
-src_error:
- cmpwi 0,r7,0
- beq 1f
- li r6,-EFAULT
- stw r6,0(r7)
-1: addze r3,r0
- blr
-
-dst_error:
- cmpwi 0,r8,0
- beq 1f
- li r6,-EFAULT
- stw r6,0(r8)
-1: addze r3,r0
- blr
-
-.section __ex_table,"a"
- .long 81b,src_error_1
- .long 91b,dst_error
- .long 71b,src_error_4
- .long 72b,src_error_4
- .long 73b,src_error_4
- .long 74b,src_error_4
- .long 75b,dst_error
- .long 76b,dst_error
- .long 77b,dst_error
- .long 78b,dst_error
- .long 82b,src_error_2
- .long 92b,dst_error
- .long 83b,src_error_3
- .long 93b,dst_error
- .long 84b,src_error_3
- .long 94b,dst_error
- .long 95b,dst_error
- .long 96b,dst_error
- .long 97b,dst_error
diff --git a/arch/ppc/lib/div64.S b/arch/ppc/lib/div64.S
deleted file mode 100644
index 3527569..0000000
--- a/arch/ppc/lib/div64.S
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Divide a 64-bit unsigned number by a 32-bit unsigned number.
- * This routine assumes that the top 32 bits of the dividend are
- * non-zero to start with.
- * On entry, r3 points to the dividend, which get overwritten with
- * the 64-bit quotient, and r4 contains the divisor.
- * On exit, r3 contains the remainder.
- *
- * Copyright (C) 2002 Paul Mackerras, IBM Corp.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <asm/ppc_asm.h>
-#include <asm/processor.h>
-
-_GLOBAL(__div64_32)
- lwz r5,0(r3) # get the dividend into r5/r6
- lwz r6,4(r3)
- cmplw r5,r4
- li r7,0
- li r8,0
- blt 1f
- divwu r7,r5,r4 # if dividend.hi >= divisor,
- mullw r0,r7,r4 # quotient.hi = dividend.hi / divisor
- subf. r5,r0,r5 # dividend.hi %= divisor
- beq 3f
-1: mr r11,r5 # here dividend.hi != 0
- andis. r0,r5,0xc000
- bne 2f
- cntlzw r0,r5 # we are shifting the dividend right
- li r10,-1 # to make it < 2^32, and shifting
- srw r10,r10,r0 # the divisor right the same amount,
- add r9,r4,r10 # rounding up (so the estimate cannot
- andc r11,r6,r10 # ever be too large, only too small)
- andc r9,r9,r10
- or r11,r5,r11
- rotlw r9,r9,r0
- rotlw r11,r11,r0
- divwu r11,r11,r9 # then we divide the shifted quantities
-2: mullw r10,r11,r4 # to get an estimate of the quotient,
- mulhwu r9,r11,r4 # multiply the estimate by the divisor,
- subfc r6,r10,r6 # take the product from the divisor,
- add r8,r8,r11 # and add the estimate to the accumulated
- subfe. r5,r9,r5 # quotient
- bne 1b
-3: cmplw r6,r4
- blt 4f
- divwu r0,r6,r4 # perform the remaining 32-bit division
- mullw r10,r0,r4 # and get the remainder
- add r8,r8,r0
- subf r6,r10,r6
-4: stw r7,0(r3) # return the quotient in *r3
- stw r8,4(r3)
- mr r3,r6 # return the remainder in r3
- blr
diff --git a/arch/ppc/lib/locks.c b/arch/ppc/lib/locks.c
deleted file mode 100644
index ea4aee6..0000000
--- a/arch/ppc/lib/locks.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/*
- * Locks for smp ppc
- *
- * Written by Cort Dougan (cort@cs.nmt.edu)
- */
-
-#include <linux/sched.h>
-#include <linux/spinlock.h>
-#include <linux/module.h>
-#include <asm/ppc_asm.h>
-#include <asm/smp.h>
-
-#ifdef CONFIG_DEBUG_SPINLOCK
-
-#undef INIT_STUCK
-#define INIT_STUCK 200000000 /*0xffffffff*/
-
-/*
- * Try to acquire a spinlock.
- * Only does the stwcx. if the load returned 0 - the Programming
- * Environments Manual suggests not doing unnecessary stcwx.'s
- * since they may inhibit forward progress by other CPUs in getting
- * a lock.
- */
-static inline unsigned long __spin_trylock(volatile unsigned long *lock)
-{
- unsigned long ret;
-
- __asm__ __volatile__ ("\n\
-1: lwarx %0,0,%1\n\
- cmpwi 0,%0,0\n\
- bne 2f\n"
- PPC405_ERR77(0,%1)
-" stwcx. %2,0,%1\n\
- bne- 1b\n\
- isync\n\
-2:"
- : "=&r"(ret)
- : "r"(lock), "r"(1)
- : "cr0", "memory");
-
- return ret;
-}
-
-void _raw_spin_lock(spinlock_t *lock)
-{
- int cpu = smp_processor_id();
- unsigned int stuck = INIT_STUCK;
- while (__spin_trylock(&lock->lock)) {
- while ((unsigned volatile long)lock->lock != 0) {
- if (!--stuck) {
- printk("_spin_lock(%p) CPU#%d NIP %p"
- " holder: cpu %ld pc %08lX\n",
- lock, cpu, __builtin_return_address(0),
- lock->owner_cpu,lock->owner_pc);
- stuck = INIT_STUCK;
- /* steal the lock */
- /*xchg_u32((void *)&lock->lock,0);*/
- }
- }
- }
- lock->owner_pc = (unsigned long)__builtin_return_address(0);
- lock->owner_cpu = cpu;
-}
-EXPORT_SYMBOL(_raw_spin_lock);
-
-int _raw_spin_trylock(spinlock_t *lock)
-{
- if (__spin_trylock(&lock->lock))
- return 0;
- lock->owner_cpu = smp_processor_id();
- lock->owner_pc = (unsigned long)__builtin_return_address(0);
- return 1;
-}
-EXPORT_SYMBOL(_raw_spin_trylock);
-
-void _raw_spin_unlock(spinlock_t *lp)
-{
- if ( !lp->lock )
- printk("_spin_unlock(%p): no lock cpu %d curr PC %p %s/%d\n",
- lp, smp_processor_id(), __builtin_return_address(0),
- current->comm, current->pid);
- if ( lp->owner_cpu != smp_processor_id() )
- printk("_spin_unlock(%p): cpu %d trying clear of cpu %d pc %lx val %lx\n",
- lp, smp_processor_id(), (int)lp->owner_cpu,
- lp->owner_pc,lp->lock);
- lp->owner_pc = lp->owner_cpu = 0;
- wmb();
- lp->lock = 0;
-}
-EXPORT_SYMBOL(_raw_spin_unlock);
-
-/*
- * For rwlocks, zero is unlocked, -1 is write-locked,
- * positive is read-locked.
- */
-static __inline__ int __read_trylock(rwlock_t *rw)
-{
- signed int tmp;
-
- __asm__ __volatile__(
-"2: lwarx %0,0,%1 # __read_trylock\n\
- addic. %0,%0,1\n\
- ble- 1f\n"
- PPC405_ERR77(0,%1)
-" stwcx. %0,0,%1\n\
- bne- 2b\n\
- isync\n\
-1:"
- : "=&r"(tmp)
- : "r"(&rw->lock)
- : "cr0", "memory");
-
- return tmp;
-}
-
-int _raw_read_trylock(rwlock_t *rw)
-{
- return __read_trylock(rw) > 0;
-}
-EXPORT_SYMBOL(_raw_read_trylock);
-
-void _raw_read_lock(rwlock_t *rw)
-{
- unsigned int stuck;
-
- while (__read_trylock(rw) <= 0) {
- stuck = INIT_STUCK;
- while (!read_can_lock(rw)) {
- if (--stuck == 0) {
- printk("_read_lock(%p) CPU#%d lock %d\n",
- rw, raw_smp_processor_id(), rw->lock);
- stuck = INIT_STUCK;
- }
- }
- }
-}
-EXPORT_SYMBOL(_raw_read_lock);
-
-void _raw_read_unlock(rwlock_t *rw)
-{
- if ( rw->lock == 0 )
- printk("_read_unlock(): %s/%d (nip %08lX) lock %d\n",
- current->comm,current->pid,current->thread.regs->nip,
- rw->lock);
- wmb();
- atomic_dec((atomic_t *) &(rw)->lock);
-}
-EXPORT_SYMBOL(_raw_read_unlock);
-
-void _raw_write_lock(rwlock_t *rw)
-{
- unsigned int stuck;
-
- while (cmpxchg(&rw->lock, 0, -1) != 0) {
- stuck = INIT_STUCK;
- while (!write_can_lock(rw)) {
- if (--stuck == 0) {
- printk("write_lock(%p) CPU#%d lock %d)\n",
- rw, raw_smp_processor_id(), rw->lock);
- stuck = INIT_STUCK;
- }
- }
- }
- wmb();
-}
-EXPORT_SYMBOL(_raw_write_lock);
-
-int _raw_write_trylock(rwlock_t *rw)
-{
- if (cmpxchg(&rw->lock, 0, -1) != 0)
- return 0;
- wmb();
- return 1;
-}
-EXPORT_SYMBOL(_raw_write_trylock);
-
-void _raw_write_unlock(rwlock_t *rw)
-{
- if (rw->lock >= 0)
- printk("_write_lock(): %s/%d (nip %08lX) lock %d\n",
- current->comm,current->pid,current->thread.regs->nip,
- rw->lock);
- wmb();
- rw->lock = 0;
-}
-EXPORT_SYMBOL(_raw_write_unlock);
-
-#endif
diff --git a/arch/ppc/lib/string.S b/arch/ppc/lib/string.S
deleted file mode 100644
index 927253b..0000000
--- a/arch/ppc/lib/string.S
+++ /dev/null
@@ -1,732 +0,0 @@
-/*
- * String handling functions for PowerPC.
- *
- * Copyright (C) 1996 Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <asm/processor.h>
-#include <asm/cache.h>
-#include <asm/errno.h>
-#include <asm/ppc_asm.h>
-
-#define COPY_16_BYTES \
- lwz r7,4(r4); \
- lwz r8,8(r4); \
- lwz r9,12(r4); \
- lwzu r10,16(r4); \
- stw r7,4(r6); \
- stw r8,8(r6); \
- stw r9,12(r6); \
- stwu r10,16(r6)
-
-#define COPY_16_BYTES_WITHEX(n) \
-8 ## n ## 0: \
- lwz r7,4(r4); \
-8 ## n ## 1: \
- lwz r8,8(r4); \
-8 ## n ## 2: \
- lwz r9,12(r4); \
-8 ## n ## 3: \
- lwzu r10,16(r4); \
-8 ## n ## 4: \
- stw r7,4(r6); \
-8 ## n ## 5: \
- stw r8,8(r6); \
-8 ## n ## 6: \
- stw r9,12(r6); \
-8 ## n ## 7: \
- stwu r10,16(r6)
-
-#define COPY_16_BYTES_EXCODE(n) \
-9 ## n ## 0: \
- addi r5,r5,-(16 * n); \
- b 104f; \
-9 ## n ## 1: \
- addi r5,r5,-(16 * n); \
- b 105f; \
-.section __ex_table,"a"; \
- .align 2; \
- .long 8 ## n ## 0b,9 ## n ## 0b; \
- .long 8 ## n ## 1b,9 ## n ## 0b; \
- .long 8 ## n ## 2b,9 ## n ## 0b; \
- .long 8 ## n ## 3b,9 ## n ## 0b; \
- .long 8 ## n ## 4b,9 ## n ## 1b; \
- .long 8 ## n ## 5b,9 ## n ## 1b; \
- .long 8 ## n ## 6b,9 ## n ## 1b; \
- .long 8 ## n ## 7b,9 ## n ## 1b; \
- .text
-
- .text
- .stabs "arch/ppc/lib/",N_SO,0,0,0f
- .stabs "string.S",N_SO,0,0,0f
-
-CACHELINE_BYTES = L1_CACHE_BYTES
-LG_CACHELINE_BYTES = L1_CACHE_SHIFT
-CACHELINE_MASK = (L1_CACHE_BYTES-1)
-
-_GLOBAL(strcpy)
- addi r5,r3,-1
- addi r4,r4,-1
-1: lbzu r0,1(r4)
- cmpwi 0,r0,0
- stbu r0,1(r5)
- bne 1b
- blr
-
-/* This clears out any unused part of the destination buffer,
- just as the libc version does. -- paulus */
-_GLOBAL(strncpy)
- cmpwi 0,r5,0
- beqlr
- mtctr r5
- addi r6,r3,-1
- addi r4,r4,-1
-1: lbzu r0,1(r4)
- cmpwi 0,r0,0
- stbu r0,1(r6)
- bdnzf 2,1b /* dec ctr, branch if ctr != 0 && !cr0.eq */
- bnelr /* if we didn't hit a null char, we're done */
- mfctr r5
- cmpwi 0,r5,0 /* any space left in destination buffer? */
- beqlr /* we know r0 == 0 here */
-2: stbu r0,1(r6) /* clear it out if so */
- bdnz 2b
- blr
-
-_GLOBAL(strcat)
- addi r5,r3,-1
- addi r4,r4,-1
-1: lbzu r0,1(r5)
- cmpwi 0,r0,0
- bne 1b
- addi r5,r5,-1
-1: lbzu r0,1(r4)
- cmpwi 0,r0,0
- stbu r0,1(r5)
- bne 1b
- blr
-
-_GLOBAL(strcmp)
- addi r5,r3,-1
- addi r4,r4,-1
-1: lbzu r3,1(r5)
- cmpwi 1,r3,0
- lbzu r0,1(r4)
- subf. r3,r0,r3
- beqlr 1
- beq 1b
- blr
-
-_GLOBAL(strncmp)
- PPC_LCMPI r5,0
- beqlr
- mtctr r5
- addi r5,r3,-1
- addi r4,r4,-1
-1: lbzu r3,1(r5)
- cmpwi 1,r3,0
- lbzu r0,1(r4)
- subf. r3,r0,r3
- beqlr 1
- bdnzt eq,1b
- blr
-
-_GLOBAL(strlen)
- addi r4,r3,-1
-1: lbzu r0,1(r4)
- cmpwi 0,r0,0
- bne 1b
- subf r3,r3,r4
- blr
-
-/*
- * Use dcbz on the complete cache lines in the destination
- * to set them to zero. This requires that the destination
- * area is cacheable. -- paulus
- */
-_GLOBAL(cacheable_memzero)
- mr r5,r4
- li r4,0
- addi r6,r3,-4
- cmplwi 0,r5,4
- blt 7f
- stwu r4,4(r6)
- beqlr
- andi. r0,r6,3
- add r5,r0,r5
- subf r6,r0,r6
- clrlwi r7,r6,32-LG_CACHELINE_BYTES
- add r8,r7,r5
- srwi r9,r8,LG_CACHELINE_BYTES
- addic. r9,r9,-1 /* total number of complete cachelines */
- ble 2f
- xori r0,r7,CACHELINE_MASK & ~3
- srwi. r0,r0,2
- beq 3f
- mtctr r0
-4: stwu r4,4(r6)
- bdnz 4b
-3: mtctr r9
- li r7,4
-#if !defined(CONFIG_8xx)
-10: dcbz r7,r6
-#else
-10: stw r4, 4(r6)
- stw r4, 8(r6)
- stw r4, 12(r6)
- stw r4, 16(r6)
-#if CACHE_LINE_SIZE >= 32
- stw r4, 20(r6)
- stw r4, 24(r6)
- stw r4, 28(r6)
- stw r4, 32(r6)
-#endif /* CACHE_LINE_SIZE */
-#endif
- addi r6,r6,CACHELINE_BYTES
- bdnz 10b
- clrlwi r5,r8,32-LG_CACHELINE_BYTES
- addi r5,r5,4
-2: srwi r0,r5,2
- mtctr r0
- bdz 6f
-1: stwu r4,4(r6)
- bdnz 1b
-6: andi. r5,r5,3
-7: cmpwi 0,r5,0
- beqlr
- mtctr r5
- addi r6,r6,3
-8: stbu r4,1(r6)
- bdnz 8b
- blr
-
-_GLOBAL(memset)
- rlwimi r4,r4,8,16,23
- rlwimi r4,r4,16,0,15
- addi r6,r3,-4
- cmplwi 0,r5,4
- blt 7f
- stwu r4,4(r6)
- beqlr
- andi. r0,r6,3
- add r5,r0,r5
- subf r6,r0,r6
- srwi r0,r5,2
- mtctr r0
- bdz 6f
-1: stwu r4,4(r6)
- bdnz 1b
-6: andi. r5,r5,3
-7: cmpwi 0,r5,0
- beqlr
- mtctr r5
- addi r6,r6,3
-8: stbu r4,1(r6)
- bdnz 8b
- blr
-
-/*
- * This version uses dcbz on the complete cache lines in the
- * destination area to reduce memory traffic. This requires that
- * the destination area is cacheable.
- * We only use this version if the source and dest don't overlap.
- * -- paulus.
- */
-_GLOBAL(cacheable_memcpy)
- add r7,r3,r5 /* test if the src & dst overlap */
- add r8,r4,r5
- cmplw 0,r4,r7
- cmplw 1,r3,r8
- crand 0,0,4 /* cr0.lt &= cr1.lt */
- blt memcpy /* if regions overlap */
-
- addi r4,r4,-4
- addi r6,r3,-4
- neg r0,r3
- andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */
- beq 58f
-
- cmplw 0,r5,r0 /* is this more than total to do? */
- blt 63f /* if not much to do */
- andi. r8,r0,3 /* get it word-aligned first */
- subf r5,r0,r5
- mtctr r8
- beq+ 61f
-70: lbz r9,4(r4) /* do some bytes */
- stb r9,4(r6)
- addi r4,r4,1
- addi r6,r6,1
- bdnz 70b
-61: srwi. r0,r0,2
- mtctr r0
- beq 58f
-72: lwzu r9,4(r4) /* do some words */
- stwu r9,4(r6)
- bdnz 72b
-
-58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
- clrlwi r5,r5,32-LG_CACHELINE_BYTES
- li r11,4
- mtctr r0
- beq 63f
-53:
-#if !defined(CONFIG_8xx)
- dcbz r11,r6
-#endif
- COPY_16_BYTES
-#if L1_CACHE_BYTES >= 32
- COPY_16_BYTES
-#if L1_CACHE_BYTES >= 64
- COPY_16_BYTES
- COPY_16_BYTES
-#if L1_CACHE_BYTES >= 128
- COPY_16_BYTES
- COPY_16_BYTES
- COPY_16_BYTES
- COPY_16_BYTES
-#endif
-#endif
-#endif
- bdnz 53b
-
-63: srwi. r0,r5,2
- mtctr r0
- beq 64f
-30: lwzu r0,4(r4)
- stwu r0,4(r6)
- bdnz 30b
-
-64: andi. r0,r5,3
- mtctr r0
- beq+ 65f
-40: lbz r0,4(r4)
- stb r0,4(r6)
- addi r4,r4,1
- addi r6,r6,1
- bdnz 40b
-65: blr
-
-_GLOBAL(memmove)
- cmplw 0,r3,r4
- bgt backwards_memcpy
- /* fall through */
-
-_GLOBAL(memcpy)
- srwi. r7,r5,3
- addi r6,r3,-4
- addi r4,r4,-4
- beq 2f /* if less than 8 bytes to do */
- andi. r0,r6,3 /* get dest word aligned */
- mtctr r7
- bne 5f
-1: lwz r7,4(r4)
- lwzu r8,8(r4)
- stw r7,4(r6)
- stwu r8,8(r6)
- bdnz 1b
- andi. r5,r5,7
-2: cmplwi 0,r5,4
- blt 3f
- lwzu r0,4(r4)
- addi r5,r5,-4
- stwu r0,4(r6)
-3: cmpwi 0,r5,0
- beqlr
- mtctr r5
- addi r4,r4,3
- addi r6,r6,3
-4: lbzu r0,1(r4)
- stbu r0,1(r6)
- bdnz 4b
- blr
-5: subfic r0,r0,4
- mtctr r0
-6: lbz r7,4(r4)
- addi r4,r4,1
- stb r7,4(r6)
- addi r6,r6,1
- bdnz 6b
- subf r5,r0,r5
- rlwinm. r7,r5,32-3,3,31
- beq 2b
- mtctr r7
- b 1b
-
-_GLOBAL(backwards_memcpy)
- rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
- add r6,r3,r5
- add r4,r4,r5
- beq 2f
- andi. r0,r6,3
- mtctr r7
- bne 5f
-1: lwz r7,-4(r4)
- lwzu r8,-8(r4)
- stw r7,-4(r6)
- stwu r8,-8(r6)
- bdnz 1b
- andi. r5,r5,7
-2: cmplwi 0,r5,4
- blt 3f
- lwzu r0,-4(r4)
- subi r5,r5,4
- stwu r0,-4(r6)
-3: cmpwi 0,r5,0
- beqlr
- mtctr r5
-4: lbzu r0,-1(r4)
- stbu r0,-1(r6)
- bdnz 4b
- blr
-5: mtctr r0
-6: lbzu r7,-1(r4)
- stbu r7,-1(r6)
- bdnz 6b
- subf r5,r0,r5
- rlwinm. r7,r5,32-3,3,31
- beq 2b
- mtctr r7
- b 1b
-
-_GLOBAL(memcmp)
- cmpwi 0,r5,0
- ble- 2f
- mtctr r5
- addi r6,r3,-1
- addi r4,r4,-1
-1: lbzu r3,1(r6)
- lbzu r0,1(r4)
- subf. r3,r0,r3
- bdnzt 2,1b
- blr
-2: li r3,0
- blr
-
-_GLOBAL(memchr)
- cmpwi 0,r5,0
- ble- 2f
- mtctr r5
- addi r3,r3,-1
-1: lbzu r0,1(r3)
- cmpw 0,r0,r4
- bdnzf 2,1b
- beqlr
-2: li r3,0
- blr
-
-_GLOBAL(__copy_tofrom_user)
- addi r4,r4,-4
- addi r6,r3,-4
- neg r0,r3
- andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */
- beq 58f
-
- cmplw 0,r5,r0 /* is this more than total to do? */
- blt 63f /* if not much to do */
- andi. r8,r0,3 /* get it word-aligned first */
- mtctr r8
- beq+ 61f
-70: lbz r9,4(r4) /* do some bytes */
-71: stb r9,4(r6)
- addi r4,r4,1
- addi r6,r6,1
- bdnz 70b
-61: subf r5,r0,r5
- srwi. r0,r0,2
- mtctr r0
- beq 58f
-72: lwzu r9,4(r4) /* do some words */
-73: stwu r9,4(r6)
- bdnz 72b
-
- .section __ex_table,"a"
- .align 2
- .long 70b,100f
- .long 71b,101f
- .long 72b,102f
- .long 73b,103f
- .text
-
-58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
- clrlwi r5,r5,32-LG_CACHELINE_BYTES
- li r11,4
- beq 63f
-
-#ifdef CONFIG_8xx
- /* Don't use prefetch on 8xx */
- mtctr r0
- li r0,0
-53: COPY_16_BYTES_WITHEX(0)
- bdnz 53b
-
-#else /* not CONFIG_8xx */
- /* Here we decide how far ahead to prefetch the source */
- li r3,4
- cmpwi r0,1
- li r7,0
- ble 114f
- li r7,1
-#if MAX_COPY_PREFETCH > 1
- /* Heuristically, for large transfers we prefetch
- MAX_COPY_PREFETCH cachelines ahead. For small transfers
- we prefetch 1 cacheline ahead. */
- cmpwi r0,MAX_COPY_PREFETCH
- ble 112f
- li r7,MAX_COPY_PREFETCH
-112: mtctr r7
-111: dcbt r3,r4
- addi r3,r3,CACHELINE_BYTES
- bdnz 111b
-#else
- dcbt r3,r4
- addi r3,r3,CACHELINE_BYTES
-#endif /* MAX_COPY_PREFETCH > 1 */
-
-114: subf r8,r7,r0
- mr r0,r7
- mtctr r8
-
-53: dcbt r3,r4
-54: dcbz r11,r6
- .section __ex_table,"a"
- .align 2
- .long 54b,105f
- .text
-/* the main body of the cacheline loop */
- COPY_16_BYTES_WITHEX(0)
-#if L1_CACHE_BYTES >= 32
- COPY_16_BYTES_WITHEX(1)
-#if L1_CACHE_BYTES >= 64
- COPY_16_BYTES_WITHEX(2)
- COPY_16_BYTES_WITHEX(3)
-#if L1_CACHE_BYTES >= 128
- COPY_16_BYTES_WITHEX(4)
- COPY_16_BYTES_WITHEX(5)
- COPY_16_BYTES_WITHEX(6)
- COPY_16_BYTES_WITHEX(7)
-#endif
-#endif
-#endif
- bdnz 53b
- cmpwi r0,0
- li r3,4
- li r7,0
- bne 114b
-#endif /* CONFIG_8xx */
-
-63: srwi. r0,r5,2
- mtctr r0
- beq 64f
-30: lwzu r0,4(r4)
-31: stwu r0,4(r6)
- bdnz 30b
-
-64: andi. r0,r5,3
- mtctr r0
- beq+ 65f
-40: lbz r0,4(r4)
-41: stb r0,4(r6)
- addi r4,r4,1
- addi r6,r6,1
- bdnz 40b
-65: li r3,0
- blr
-
-/* read fault, initial single-byte copy */
-100: li r9,0
- b 90f
-/* write fault, initial single-byte copy */
-101: li r9,1
-90: subf r5,r8,r5
- li r3,0
- b 99f
-/* read fault, initial word copy */
-102: li r9,0
- b 91f
-/* write fault, initial word copy */
-103: li r9,1
-91: li r3,2
- b 99f
-
-/*
- * this stuff handles faults in the cacheline loop and branches to either
- * 104f (if in read part) or 105f (if in write part), after updating r5
- */
- COPY_16_BYTES_EXCODE(0)
-#if L1_CACHE_BYTES >= 32
- COPY_16_BYTES_EXCODE(1)
-#if L1_CACHE_BYTES >= 64
- COPY_16_BYTES_EXCODE(2)
- COPY_16_BYTES_EXCODE(3)
-#if L1_CACHE_BYTES >= 128
- COPY_16_BYTES_EXCODE(4)
- COPY_16_BYTES_EXCODE(5)
- COPY_16_BYTES_EXCODE(6)
- COPY_16_BYTES_EXCODE(7)
-#endif
-#endif
-#endif
-
-/* read fault in cacheline loop */
-104: li r9,0
- b 92f
-/* fault on dcbz (effectively a write fault) */
-/* or write fault in cacheline loop */
-105: li r9,1
-92: li r3,LG_CACHELINE_BYTES
- mfctr r8
- add r0,r0,r8
- b 106f
-/* read fault in final word loop */
-108: li r9,0
- b 93f
-/* write fault in final word loop */
-109: li r9,1
-93: andi. r5,r5,3
- li r3,2
- b 99f
-/* read fault in final byte loop */
-110: li r9,0
- b 94f
-/* write fault in final byte loop */
-111: li r9,1
-94: li r5,0
- li r3,0
-/*
- * At this stage the number of bytes not copied is
- * r5 + (ctr << r3), and r9 is 0 for read or 1 for write.
- */
-99: mfctr r0
-106: slw r3,r0,r3
- add. r3,r3,r5
- beq 120f /* shouldn't happen */
- cmpwi 0,r9,0
- bne 120f
-/* for a read fault, first try to continue the copy one byte at a time */
- mtctr r3
-130: lbz r0,4(r4)
-131: stb r0,4(r6)
- addi r4,r4,1
- addi r6,r6,1
- bdnz 130b
-/* then clear out the destination: r3 bytes starting at 4(r6) */
-132: mfctr r3
- srwi. r0,r3,2
- li r9,0
- mtctr r0
- beq 113f
-112: stwu r9,4(r6)
- bdnz 112b
-113: andi. r0,r3,3
- mtctr r0
- beq 120f
-114: stb r9,4(r6)
- addi r6,r6,1
- bdnz 114b
-120: blr
-
- .section __ex_table,"a"
- .align 2
- .long 30b,108b
- .long 31b,109b
- .long 40b,110b
- .long 41b,111b
- .long 130b,132b
- .long 131b,120b
- .long 112b,120b
- .long 114b,120b
- .text
-
-_GLOBAL(__clear_user)
- addi r6,r3,-4
- li r3,0
- li r5,0
- cmplwi 0,r4,4
- blt 7f
- /* clear a single word */
-11: stwu r5,4(r6)
- beqlr
- /* clear word sized chunks */
- andi. r0,r6,3
- add r4,r0,r4
- subf r6,r0,r6
- srwi r0,r4,2
- andi. r4,r4,3
- mtctr r0
- bdz 7f
-1: stwu r5,4(r6)
- bdnz 1b
- /* clear byte sized chunks */
-7: cmpwi 0,r4,0
- beqlr
- mtctr r4
- addi r6,r6,3
-8: stbu r5,1(r6)
- bdnz 8b
- blr
-90: mr r3,r4
- blr
-91: mfctr r3
- slwi r3,r3,2
- add r3,r3,r4
- blr
-92: mfctr r3
- blr
-
- .section __ex_table,"a"
- .align 2
- .long 11b,90b
- .long 1b,91b
- .long 8b,92b
- .text
-
-_GLOBAL(__strncpy_from_user)
- addi r6,r3,-1
- addi r4,r4,-1
- cmpwi 0,r5,0
- beq 2f
- mtctr r5
-1: lbzu r0,1(r4)
- cmpwi 0,r0,0
- stbu r0,1(r6)
- bdnzf 2,1b /* dec ctr, branch if ctr != 0 && !cr0.eq */
- beq 3f
-2: addi r6,r6,1
-3: subf r3,r3,r6
- blr
-99: li r3,-EFAULT
- blr
-
- .section __ex_table,"a"
- .align 2
- .long 1b,99b
- .text
-
-/* r3 = str, r4 = len (> 0), r5 = top (highest addr) */
-_GLOBAL(__strnlen_user)
- addi r7,r3,-1
- subf r6,r7,r5 /* top+1 - str */
- cmplw 0,r4,r6
- bge 0f
- mr r6,r4
-0: mtctr r6 /* ctr = min(len, top - str) */
-1: lbzu r0,1(r7) /* get next byte */
- cmpwi 0,r0,0
- bdnzf 2,1b /* loop if --ctr != 0 && byte != 0 */
- addi r7,r7,1
- subf r3,r3,r7 /* number of bytes we have looked at */
- beqlr /* return if we found a 0 byte */
- cmpw 0,r3,r4 /* did we look at all len bytes? */
- blt 99f /* if not, must have hit top */
- addi r3,r4,1 /* return len + 1 to indicate no null found */
- blr
-99: li r3,0 /* bad address, return 0 */
- blr
-
- .section __ex_table,"a"
- .align 2
- .long 1b,99b
diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c
deleted file mode 100644
index fbb577a..0000000
--- a/arch/ppc/mm/44x_mmu.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * Modifications by Matt Porter (mporter@mvista.com) to support
- * PPC44x Book E processors.
- *
- * This file contains the routines for initializing the MMU
- * on the 4xx series of chips.
- * -- paulus
- *
- * Derived from arch/ppc/mm/init.c:
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- * and Cort Dougan (PReP) (cort@cs.nmt.edu)
- * Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * Derived from "arch/i386/mm/init.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/stddef.h>
-#include <linux/vmalloc.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/highmem.h>
-
-#include <asm/pgalloc.h>
-#include <asm/prom.h>
-#include <asm/io.h>
-#include <asm/mmu_context.h>
-#include <asm/pgtable.h>
-#include <asm/mmu.h>
-#include <asm/uaccess.h>
-#include <asm/smp.h>
-#include <asm/bootx.h>
-#include <asm/machdep.h>
-#include <asm/setup.h>
-
-#include "mmu_decl.h"
-
-extern char etext[], _stext[];
-
-/* Used by the 44x TLB replacement exception handler.
- * Just needed it declared someplace.
- */
-unsigned int tlb_44x_index = 0;
-unsigned int tlb_44x_hwater = PPC4XX_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
-int icache_44x_need_flush;
-
-/*
- * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
- */
-static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
-{
- __asm__ __volatile__(
- "tlbwe %2,%3,%4\n"
- "tlbwe %1,%3,%5\n"
- "tlbwe %0,%3,%6\n"
- :
- : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
- "r" (phys),
- "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
- "r" (tlb_44x_hwater--), /* slot for this TLB entry */
- "i" (PPC44x_TLB_PAGEID),
- "i" (PPC44x_TLB_XLAT),
- "i" (PPC44x_TLB_ATTRIB));
-}
-
-void __init MMU_init_hw(void)
-{
- flush_instruction_cache();
-}
-
-unsigned long __init mmu_mapin_ram(void)
-{
- unsigned long addr;
-
- /* Pin in enough TLBs to cover any lowmem not covered by the
- * initial 256M mapping established in head_44x.S */
- for (addr = PPC_PIN_SIZE; addr < total_lowmem;
- addr += PPC_PIN_SIZE)
- ppc44x_pin_tlb(addr + PAGE_OFFSET, addr);
-
- return total_lowmem;
-}
diff --git a/arch/ppc/mm/4xx_mmu.c b/arch/ppc/mm/4xx_mmu.c
deleted file mode 100644
index ea785db..0000000
--- a/arch/ppc/mm/4xx_mmu.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * This file contains the routines for initializing the MMU
- * on the 4xx series of chips.
- * -- paulus
- *
- * Derived from arch/ppc/mm/init.c:
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- * and Cort Dougan (PReP) (cort@cs.nmt.edu)
- * Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * Derived from "arch/i386/mm/init.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/stddef.h>
-#include <linux/vmalloc.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/highmem.h>
-
-#include <asm/pgalloc.h>
-#include <asm/prom.h>
-#include <asm/io.h>
-#include <asm/mmu_context.h>
-#include <asm/pgtable.h>
-#include <asm/mmu.h>
-#include <asm/uaccess.h>
-#include <asm/smp.h>
-#include <asm/bootx.h>
-#include <asm/machdep.h>
-#include <asm/setup.h>
-#include "mmu_decl.h"
-
-extern int __map_without_ltlbs;
-/*
- * MMU_init_hw does the chip-specific initialization of the MMU hardware.
- */
-void __init MMU_init_hw(void)
-{
- /*
- * The Zone Protection Register (ZPR) defines how protection will
- * be applied to every page which is a member of a given zone. At
- * present, we utilize only two of the 4xx's zones.
- * The zone index bits (of ZSEL) in the PTE are used for software
- * indicators, except the LSB. For user access, zone 1 is used,
- * for kernel access, zone 0 is used. We set all but zone 1
- * to zero, allowing only kernel access as indicated in the PTE.
- * For zone 1, we set a 01 binary (a value of 10 will not work)
- * to allow user access as indicated in the PTE. This also allows
- * kernel access as indicated in the PTE.
- */
-
- mtspr(SPRN_ZPR, 0x10000000);
-
- flush_instruction_cache();
-
- /*
- * Set up the real-mode cache parameters for the exception vector
- * handlers (which are run in real-mode).
- */
-
- mtspr(SPRN_DCWR, 0x00000000); /* All caching is write-back */
-
- /*
- * Cache instruction and data space where the exception
- * vectors and the kernel live in real-mode.
- */
-
- mtspr(SPRN_DCCR, 0xF0000000); /* 512 MB of data space at 0x0. */
- mtspr(SPRN_ICCR, 0xF0000000); /* 512 MB of instr. space at 0x0. */
-}
-
-#define LARGE_PAGE_SIZE_16M (1<<24)
-#define LARGE_PAGE_SIZE_4M (1<<22)
-
-unsigned long __init mmu_mapin_ram(void)
-{
- unsigned long v, s;
- phys_addr_t p;
-
- v = KERNELBASE;
- p = PPC_MEMSTART;
- s = total_lowmem;
-
- if (__map_without_ltlbs)
- return 0;
-
- while (s >= LARGE_PAGE_SIZE_16M) {
- pmd_t *pmdp;
- unsigned long val = p | _PMD_SIZE_16M | _PAGE_HWEXEC | _PAGE_HWWRITE;
-
- pmdp = pmd_offset(pgd_offset_k(v), v);
- pmd_val(*pmdp++) = val;
- pmd_val(*pmdp++) = val;
- pmd_val(*pmdp++) = val;
- pmd_val(*pmdp++) = val;
-
- v += LARGE_PAGE_SIZE_16M;
- p += LARGE_PAGE_SIZE_16M;
- s -= LARGE_PAGE_SIZE_16M;
- }
-
- while (s >= LARGE_PAGE_SIZE_4M) {
- pmd_t *pmdp;
- unsigned long val = p | _PMD_SIZE_4M | _PAGE_HWEXEC | _PAGE_HWWRITE;
-
- pmdp = pmd_offset(pgd_offset_k(v), v);
- pmd_val(*pmdp) = val;
-
- v += LARGE_PAGE_SIZE_4M;
- p += LARGE_PAGE_SIZE_4M;
- s -= LARGE_PAGE_SIZE_4M;
- }
-
- return total_lowmem - s;
-}
diff --git a/arch/ppc/mm/Makefile b/arch/ppc/mm/Makefile
deleted file mode 100644
index 691ba2b..0000000
--- a/arch/ppc/mm/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
-#
-# Makefile for the linux ppc-specific parts of the memory manager.
-#
-
-obj-y := fault.o init.o mem_pieces.o \
- mmu_context.o pgtable.o
-
-obj-$(CONFIG_PPC_STD_MMU) += hashtable.o ppc_mmu.o tlb.o
-obj-$(CONFIG_40x) += 4xx_mmu.o
-obj-$(CONFIG_44x) += 44x_mmu.o
diff --git a/arch/ppc/mm/fault.c b/arch/ppc/mm/fault.c
deleted file mode 100644
index 36c0e75..0000000
--- a/arch/ppc/mm/fault.c
+++ /dev/null
@@ -1,436 +0,0 @@
-/*
- * PowerPC version
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Derived from "arch/i386/mm/fault.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * Modified by Cort Dougan and Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/highmem.h>
-#include <linux/module.h>
-
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/mmu.h>
-#include <asm/mmu_context.h>
-#include <asm/system.h>
-#include <asm/uaccess.h>
-#include <asm/tlbflush.h>
-
-#if defined(CONFIG_XMON) || defined(CONFIG_KGDB)
-extern void (*debugger)(struct pt_regs *);
-extern void (*debugger_fault_handler)(struct pt_regs *);
-extern int (*debugger_dabr_match)(struct pt_regs *);
-int debugger_kernel_faults = 1;
-#endif
-
-unsigned long htab_reloads; /* updated by hashtable.S:hash_page() */
-unsigned long htab_evicts; /* updated by hashtable.S:hash_page() */
-unsigned long htab_preloads; /* updated by hashtable.S:add_hash_page() */
-unsigned long pte_misses; /* updated by do_page_fault() */
-unsigned long pte_errors; /* updated by do_page_fault() */
-unsigned int probingmem;
-
-/*
- * Check whether the instruction at regs->nip is a store using
- * an update addressing form which will update r1.
- */
-static int store_updates_sp(struct pt_regs *regs)
-{
- unsigned int inst;
-
- if (get_user(inst, (unsigned int __user *)regs->nip))
- return 0;
- /* check for 1 in the rA field */
- if (((inst >> 16) & 0x1f) != 1)
- return 0;
- /* check major opcode */
- switch (inst >> 26) {
- case 37: /* stwu */
- case 39: /* stbu */
- case 45: /* sthu */
- case 53: /* stfsu */
- case 55: /* stfdu */
- return 1;
- case 31:
- /* check minor opcode */
- switch ((inst >> 1) & 0x3ff) {
- case 183: /* stwux */
- case 247: /* stbux */
- case 439: /* sthux */
- case 695: /* stfsux */
- case 759: /* stfdux */
- return 1;
- }
- }
- return 0;
-}
-
-/*
- * For 600- and 800-family processors, the error_code parameter is DSISR
- * for a data fault, SRR1 for an instruction fault. For 400-family processors
- * the error_code parameter is ESR for a data fault, 0 for an instruction
- * fault.
- */
-int do_page_fault(struct pt_regs *regs, unsigned long address,
- unsigned long error_code)
-{
- struct vm_area_struct * vma;
- struct mm_struct *mm = current->mm;
- siginfo_t info;
- int code = SEGV_MAPERR;
- int fault;
-#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE)
- int is_write = error_code & ESR_DST;
-#else
- int is_write = 0;
-
- /*
- * Fortunately the bit assignments in SRR1 for an instruction
- * fault and DSISR for a data fault are mostly the same for the
- * bits we are interested in. But there are some bits which
- * indicate errors in DSISR but can validly be set in SRR1.
- */
- if (TRAP(regs) == 0x400)
- error_code &= 0x48200000;
- else
- is_write = error_code & 0x02000000;
-#endif /* CONFIG_4xx || CONFIG_BOOKE */
-
-#if defined(CONFIG_XMON) || defined(CONFIG_KGDB)
- if (debugger_fault_handler && TRAP(regs) == 0x300) {
- debugger_fault_handler(regs);
- return 0;
- }
-#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
- if (error_code & 0x00400000) {
- /* DABR match */
- if (debugger_dabr_match(regs))
- return 0;
- }
-#endif /* !(CONFIG_4xx || CONFIG_BOOKE)*/
-#endif /* CONFIG_XMON || CONFIG_KGDB */
-
- if (in_atomic() || mm == NULL)
- return SIGSEGV;
-
- down_read(&mm->mmap_sem);
- vma = find_vma(mm, address);
- if (!vma)
- goto bad_area;
- if (vma->vm_start <= address)
- goto good_area;
- if (!(vma->vm_flags & VM_GROWSDOWN))
- goto bad_area;
- if (!is_write)
- goto bad_area;
-
- /*
- * N.B. The rs6000/xcoff ABI allows programs to access up to
- * a few hundred bytes below the stack pointer.
- * The kernel signal delivery code writes up to about 1.5kB
- * below the stack pointer (r1) before decrementing it.
- * The exec code can write slightly over 640kB to the stack
- * before setting the user r1. Thus we allow the stack to
- * expand to 1MB without further checks.
- */
- if (address + 0x100000 < vma->vm_end) {
- /* get user regs even if this fault is in kernel mode */
- struct pt_regs *uregs = current->thread.regs;
- if (uregs == NULL)
- goto bad_area;
-
- /*
- * A user-mode access to an address a long way below
- * the stack pointer is only valid if the instruction
- * is one which would update the stack pointer to the
- * address accessed if the instruction completed,
- * i.e. either stwu rs,n(r1) or stwux rs,r1,rb
- * (or the byte, halfword, float or double forms).
- *
- * If we don't check this then any write to the area
- * between the last mapped region and the stack will
- * expand the stack rather than segfaulting.
- */
- if (address + 2048 < uregs->gpr[1]
- && (!user_mode(regs) || !store_updates_sp(regs)))
- goto bad_area;
- }
- if (expand_stack(vma, address))
- goto bad_area;
-
-good_area:
- code = SEGV_ACCERR;
-#if defined(CONFIG_6xx)
- if (error_code & 0x95700000)
- /* an error such as lwarx to I/O controller space,
- address matching DABR, eciwx, etc. */
- goto bad_area;
-#endif /* CONFIG_6xx */
-#if defined(CONFIG_8xx)
- /* The MPC8xx seems to always set 0x80000000, which is
- * "undefined". Of those that can be set, this is the only
- * one which seems bad.
- */
- if (error_code & 0x10000000)
- /* Guarded storage error. */
- goto bad_area;
-#endif /* CONFIG_8xx */
-
- /* a write */
- if (is_write) {
- if (!(vma->vm_flags & VM_WRITE))
- goto bad_area;
-#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
- /* an exec - 4xx/Book-E allows for per-page execute permission */
- } else if (TRAP(regs) == 0x400) {
- pte_t *ptep;
- pmd_t *pmdp;
-
-#if 0
- /* It would be nice to actually enforce the VM execute
- permission on CPUs which can do so, but far too
- much stuff in userspace doesn't get the permissions
- right, so we let any page be executed for now. */
- if (! (vma->vm_flags & VM_EXEC))
- goto bad_area;
-#endif
-
- /* Since 4xx/Book-E supports per-page execute permission,
- * we lazily flush dcache to icache. */
- ptep = NULL;
- if (get_pteptr(mm, address, &ptep, &pmdp)) {
- spinlock_t *ptl = pte_lockptr(mm, pmdp);
- spin_lock(ptl);
- if (pte_present(*ptep)) {
- struct page *page = pte_page(*ptep);
-
- if (!test_bit(PG_arch_1, &page->flags)) {
- flush_dcache_icache_page(page);
- set_bit(PG_arch_1, &page->flags);
- }
- pte_update(ptep, 0, _PAGE_HWEXEC);
- _tlbie(address, mm->context.id);
- pte_unmap_unlock(ptep, ptl);
- up_read(&mm->mmap_sem);
- return 0;
- }
- pte_unmap_unlock(ptep, ptl);
- }
-#endif
- /* a read */
- } else {
- /* protection fault */
- if (error_code & 0x08000000)
- goto bad_area;
- if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))
- goto bad_area;
- }
-
- /*
- * If for any reason at all we couldn't handle the fault,
- * make sure we exit gracefully rather than endlessly redo
- * the fault.
- */
- survive:
- fault = handle_mm_fault(mm, vma, address, is_write);
- if (unlikely(fault & VM_FAULT_ERROR)) {
- if (fault & VM_FAULT_OOM)
- goto out_of_memory;
- else if (fault & VM_FAULT_SIGBUS)
- goto do_sigbus;
- BUG();
- }
- if (fault & VM_FAULT_MAJOR)
- current->maj_flt++;
- else
- current->min_flt++;
-
- up_read(&mm->mmap_sem);
- /*
- * keep track of tlb+htab misses that are good addrs but
- * just need pte's created via handle_mm_fault()
- * -- Cort
- */
- pte_misses++;
- return 0;
-
-bad_area:
- up_read(&mm->mmap_sem);
- pte_errors++;
-
- /* User mode accesses cause a SIGSEGV */
- if (user_mode(regs)) {
- _exception(SIGSEGV, regs, code, address);
- return 0;
- }
-
- return SIGSEGV;
-
-/*
- * We ran out of memory, or some other thing happened to us that made
- * us unable to handle the page fault gracefully.
- */
-out_of_memory:
- up_read(&mm->mmap_sem);
- if (is_global_init(current)) {
- yield();
- down_read(&mm->mmap_sem);
- goto survive;
- }
- printk("VM: killing process %s\n", current->comm);
- if (user_mode(regs))
- do_group_exit(SIGKILL);
- return SIGKILL;
-
-do_sigbus:
- up_read(&mm->mmap_sem);
- info.si_signo = SIGBUS;
- info.si_errno = 0;
- info.si_code = BUS_ADRERR;
- info.si_addr = (void __user *)address;
- force_sig_info (SIGBUS, &info, current);
- if (!user_mode(regs))
- return SIGBUS;
- return 0;
-}
-
-/*
- * bad_page_fault is called when we have a bad access from the kernel.
- * It is called from the DSI and ISI handlers in head.S and from some
- * of the procedures in traps.c.
- */
-void
-bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
-{
- const struct exception_table_entry *entry;
-
- /* Are we prepared to handle this fault? */
- if ((entry = search_exception_tables(regs->nip)) != NULL) {
- regs->nip = entry->fixup;
- return;
- }
-
- /* kernel has accessed a bad area */
-#if defined(CONFIG_XMON) || defined(CONFIG_KGDB)
- if (debugger_kernel_faults)
- debugger(regs);
-#endif
- die("kernel access of bad area", regs, sig);
-}
-
-#ifdef CONFIG_8xx
-
-/* The pgtable.h claims some functions generically exist, but I
- * can't find them......
- */
-pte_t *va_to_pte(unsigned long address)
-{
- pgd_t *dir;
- pmd_t *pmd;
- pte_t *pte;
-
- if (address < TASK_SIZE)
- return NULL;
-
- dir = pgd_offset(&init_mm, address);
- if (dir) {
- pmd = pmd_offset(dir, address & PAGE_MASK);
- if (pmd && pmd_present(*pmd)) {
- pte = pte_offset_kernel(pmd, address & PAGE_MASK);
- if (pte && pte_present(*pte))
- return(pte);
- }
- }
- return NULL;
-}
-
-unsigned long va_to_phys(unsigned long address)
-{
- pte_t *pte;
-
- pte = va_to_pte(address);
- if (pte)
- return(((unsigned long)(pte_val(*pte)) & PAGE_MASK) | (address & ~(PAGE_MASK)));
- return (0);
-}
-
-void
-print_8xx_pte(struct mm_struct *mm, unsigned long addr)
-{
- pgd_t * pgd;
- pmd_t * pmd;
- pte_t * pte;
-
- printk(" pte @ 0x%8lx: ", addr);
- pgd = pgd_offset(mm, addr & PAGE_MASK);
- if (pgd) {
- pmd = pmd_offset(pgd, addr & PAGE_MASK);
- if (pmd && pmd_present(*pmd)) {
- pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
- if (pte) {
- printk(" (0x%08lx)->(0x%08lx)->0x%08lx\n",
- (long)pgd, (long)pte, (long)pte_val(*pte));
-#define pp ((long)pte_val(*pte))
- printk(" RPN: %05lx PP: %lx SPS: %lx SH: %lx "
- "CI: %lx v: %lx\n",
- pp>>12, /* rpn */
- (pp>>10)&3, /* pp */
- (pp>>3)&1, /* small */
- (pp>>2)&1, /* shared */
- (pp>>1)&1, /* cache inhibit */
- pp&1 /* valid */
- );
-#undef pp
- }
- else {
- printk("no pte\n");
- }
- }
- else {
- printk("no pmd\n");
- }
- }
- else {
- printk("no pgd\n");
- }
-}
-
-int
-get_8xx_pte(struct mm_struct *mm, unsigned long addr)
-{
- pgd_t * pgd;
- pmd_t * pmd;
- pte_t * pte;
- int retval = 0;
-
- pgd = pgd_offset(mm, addr & PAGE_MASK);
- if (pgd) {
- pmd = pmd_offset(pgd, addr & PAGE_MASK);
- if (pmd && pmd_present(*pmd)) {
- pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
- if (pte) {
- retval = (int)pte_val(*pte);
- }
- }
- }
- return(retval);
-}
-#endif /* CONFIG_8xx */
diff --git a/arch/ppc/mm/hashtable.S b/arch/ppc/mm/hashtable.S
deleted file mode 100644
index 5f364dc..0000000
--- a/arch/ppc/mm/hashtable.S
+++ /dev/null
@@ -1,617 +0,0 @@
-/*
- * $Id: hashtable.S,v 1.6 1999/10/08 01:56:15 paulus Exp $
- *
- * PowerPC version
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
- * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
- * Adapted for Power Macintosh by Paul Mackerras.
- * Low-level exception handlers and MMU support
- * rewritten by Paul Mackerras.
- * Copyright (C) 1996 Paul Mackerras.
- *
- * This file contains low-level assembler routines for managing
- * the PowerPC MMU hash table. (PPC 8xx processors don't use a
- * hash table, so this file is not used on them.)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/cputable.h>
-#include <asm/ppc_asm.h>
-#include <asm/thread_info.h>
-#include <asm/asm-offsets.h>
-
-#ifdef CONFIG_SMP
- .section .bss
- .align 2
- .globl mmu_hash_lock
-mmu_hash_lock:
- .space 4
-#endif /* CONFIG_SMP */
-
-/*
- * Sync CPUs with hash_page taking & releasing the hash
- * table lock
- */
-#ifdef CONFIG_SMP
- .text
-_GLOBAL(hash_page_sync)
- lis r8,mmu_hash_lock@h
- ori r8,r8,mmu_hash_lock@l
- lis r0,0x0fff
- b 10f
-11: lwz r6,0(r8)
- cmpwi 0,r6,0
- bne 11b
-10: lwarx r6,0,r8
- cmpwi 0,r6,0
- bne- 11b
- stwcx. r0,0,r8
- bne- 10b
- isync
- eieio
- li r0,0
- stw r0,0(r8)
- blr
-#endif
-
-/*
- * Load a PTE into the hash table, if possible.
- * The address is in r4, and r3 contains an access flag:
- * _PAGE_RW (0x400) if a write.
- * r9 contains the SRR1 value, from which we use the MSR_PR bit.
- * SPRG3 contains the physical address of the current task's thread.
- *
- * Returns to the caller if the access is illegal or there is no
- * mapping for the address. Otherwise it places an appropriate PTE
- * in the hash table and returns from the exception.
- * Uses r0, r3 - r8, ctr, lr.
- */
- .text
-_GLOBAL(hash_page)
- tophys(r7,0) /* gets -KERNELBASE into r7 */
-#ifdef CONFIG_SMP
- addis r8,r7,mmu_hash_lock@h
- ori r8,r8,mmu_hash_lock@l
- lis r0,0x0fff
- b 10f
-11: lwz r6,0(r8)
- cmpwi 0,r6,0
- bne 11b
-10: lwarx r6,0,r8
- cmpwi 0,r6,0
- bne- 11b
- stwcx. r0,0,r8
- bne- 10b
- isync
-#endif
- /* Get PTE (linux-style) and check access */
- lis r0,KERNELBASE@h /* check if kernel address */
- cmplw 0,r4,r0
- mfspr r8,SPRN_SPRG3 /* current task's THREAD (phys) */
- ori r3,r3,_PAGE_USER|_PAGE_PRESENT /* test low addresses as user */
- lwz r5,PGDIR(r8) /* virt page-table root */
- blt+ 112f /* assume user more likely */
- lis r5,swapper_pg_dir@ha /* if kernel address, use */
- addi r5,r5,swapper_pg_dir@l /* kernel page table */
- rlwimi r3,r9,32-12,29,29 /* MSR_PR -> _PAGE_USER */
-112: add r5,r5,r7 /* convert to phys addr */
- rlwimi r5,r4,12,20,29 /* insert top 10 bits of address */
- lwz r8,0(r5) /* get pmd entry */
- rlwinm. r8,r8,0,0,19 /* extract address of pte page */
-#ifdef CONFIG_SMP
- beq- hash_page_out /* return if no mapping */
-#else
- /* XXX it seems like the 601 will give a machine fault on the
- rfi if its alignment is wrong (bottom 4 bits of address are
- 8 or 0xc) and we have had a not-taken conditional branch
- to the address following the rfi. */
- beqlr-
-#endif
- rlwimi r8,r4,22,20,29 /* insert next 10 bits of address */
- rlwinm r0,r3,32-3,24,24 /* _PAGE_RW access -> _PAGE_DIRTY */
- ori r0,r0,_PAGE_ACCESSED|_PAGE_HASHPTE
-
- /*
- * Update the linux PTE atomically. We do the lwarx up-front
- * because almost always, there won't be a permission violation
- * and there won't already be an HPTE, and thus we will have
- * to update the PTE to set _PAGE_HASHPTE. -- paulus.
- */
-retry:
- lwarx r6,0,r8 /* get linux-style pte */
- andc. r5,r3,r6 /* check access & ~permission */
-#ifdef CONFIG_SMP
- bne- hash_page_out /* return if access not permitted */
-#else
- bnelr-
-#endif
- or r5,r0,r6 /* set accessed/dirty bits */
- stwcx. r5,0,r8 /* attempt to update PTE */
- bne- retry /* retry if someone got there first */
-
- mfsrin r3,r4 /* get segment reg for segment */
- mfctr r0
- stw r0,_CTR(r11)
- bl create_hpte /* add the hash table entry */
-
-/*
- * htab_reloads counts the number of times we have to fault an
- * HPTE into the hash table. This should only happen after a
- * fork (because fork does a flush_tlb_mm) or a vmalloc or ioremap.
- * Where a page is faulted into a process's address space,
- * update_mmu_cache gets called to put the HPTE into the hash table
- * and those are counted as preloads rather than reloads.
- */
- addis r8,r7,htab_reloads@ha
- lwz r3,htab_reloads@l(r8)
- addi r3,r3,1
- stw r3,htab_reloads@l(r8)
-
-#ifdef CONFIG_SMP
- eieio
- addis r8,r7,mmu_hash_lock@ha
- li r0,0
- stw r0,mmu_hash_lock@l(r8)
-#endif
-
- /* Return from the exception */
- lwz r5,_CTR(r11)
- mtctr r5
- lwz r0,GPR0(r11)
- lwz r7,GPR7(r11)
- lwz r8,GPR8(r11)
- b fast_exception_return
-
-#ifdef CONFIG_SMP
-hash_page_out:
- eieio
- addis r8,r7,mmu_hash_lock@ha
- li r0,0
- stw r0,mmu_hash_lock@l(r8)
- blr
-#endif /* CONFIG_SMP */
-
-/*
- * Add an entry for a particular page to the hash table.
- *
- * add_hash_page(unsigned context, unsigned long va, unsigned long pmdval)
- *
- * We assume any necessary modifications to the pte (e.g. setting
- * the accessed bit) have already been done and that there is actually
- * a hash table in use (i.e. we're not on a 603).
- */
-_GLOBAL(add_hash_page)
- mflr r0
- stw r0,4(r1)
-
- /* Convert context and va to VSID */
- mulli r3,r3,897*16 /* multiply context by context skew */
- rlwinm r0,r4,4,28,31 /* get ESID (top 4 bits of va) */
- mulli r0,r0,0x111 /* multiply by ESID skew */
- add r3,r3,r0 /* note create_hpte trims to 24 bits */
-
-#ifdef CONFIG_SMP
- rlwinm r8,r1,0,0,18 /* use cpu number to make tag */
- lwz r8,TI_CPU(r8) /* to go in mmu_hash_lock */
- oris r8,r8,12
-#endif /* CONFIG_SMP */
-
- /*
- * We disable interrupts here, even on UP, because we don't
- * want to race with hash_page, and because we want the
- * _PAGE_HASHPTE bit to be a reliable indication of whether
- * the HPTE exists (or at least whether one did once).
- * We also turn off the MMU for data accesses so that we
- * we can't take a hash table miss (assuming the code is
- * covered by a BAT). -- paulus
- */
- mfmsr r10
- SYNC
- rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
- rlwinm r0,r0,0,28,26 /* clear MSR_DR */
- mtmsr r0
- SYNC_601
- isync
-
- tophys(r7,0)
-
-#ifdef CONFIG_SMP
- addis r9,r7,mmu_hash_lock@ha
- addi r9,r9,mmu_hash_lock@l
-10: lwarx r0,0,r9 /* take the mmu_hash_lock */
- cmpi 0,r0,0
- bne- 11f
- stwcx. r8,0,r9
- beq+ 12f
-11: lwz r0,0(r9)
- cmpi 0,r0,0
- beq 10b
- b 11b
-12: isync
-#endif
-
- /*
- * Fetch the linux pte and test and set _PAGE_HASHPTE atomically.
- * If _PAGE_HASHPTE was already set, we don't replace the existing
- * HPTE, so we just unlock and return.
- */
- mr r8,r5
- rlwimi r8,r4,22,20,29
-1: lwarx r6,0,r8
- andi. r0,r6,_PAGE_HASHPTE
- bne 9f /* if HASHPTE already set, done */
- ori r5,r6,_PAGE_HASHPTE
- stwcx. r5,0,r8
- bne- 1b
-
- bl create_hpte
-
- addis r8,r7,htab_preloads@ha
- lwz r3,htab_preloads@l(r8)
- addi r3,r3,1
- stw r3,htab_preloads@l(r8)
-
-9:
-#ifdef CONFIG_SMP
- eieio
- li r0,0
- stw r0,0(r9) /* clear mmu_hash_lock */
-#endif
-
- /* reenable interrupts and DR */
- mtmsr r10
- SYNC_601
- isync
-
- lwz r0,4(r1)
- mtlr r0
- blr
-
-/*
- * This routine adds a hardware PTE to the hash table.
- * It is designed to be called with the MMU either on or off.
- * r3 contains the VSID, r4 contains the virtual address,
- * r5 contains the linux PTE, r6 contains the old value of the
- * linux PTE (before setting _PAGE_HASHPTE) and r7 contains the
- * offset to be added to addresses (0 if the MMU is on,
- * -KERNELBASE if it is off).
- * On SMP, the caller should have the mmu_hash_lock held.
- * We assume that the caller has (or will) set the _PAGE_HASHPTE
- * bit in the linux PTE in memory. The value passed in r6 should
- * be the old linux PTE value; if it doesn't have _PAGE_HASHPTE set
- * this routine will skip the search for an existing HPTE.
- * This procedure modifies r0, r3 - r6, r8, cr0.
- * -- paulus.
- *
- * For speed, 4 of the instructions get patched once the size and
- * physical address of the hash table are known. These definitions
- * of Hash_base and Hash_bits below are just an example.
- */
-Hash_base = 0xc0180000
-Hash_bits = 12 /* e.g. 256kB hash table */
-Hash_msk = (((1 << Hash_bits) - 1) * 64)
-
-/* defines for the PTE format for 32-bit PPCs */
-#define PTE_SIZE 8
-#define PTEG_SIZE 64
-#define LG_PTEG_SIZE 6
-#define LDPTEu lwzu
-#define STPTE stw
-#define CMPPTE cmpw
-#define PTE_H 0x40
-#define PTE_V 0x80000000
-#define TST_V(r) rlwinm. r,r,0,0,0
-#define SET_V(r) oris r,r,PTE_V@h
-#define CLR_V(r,t) rlwinm r,r,0,1,31
-
-#define HASH_LEFT 31-(LG_PTEG_SIZE+Hash_bits-1)
-#define HASH_RIGHT 31-LG_PTEG_SIZE
-
-_GLOBAL(create_hpte)
- /* Convert linux-style PTE (r5) to low word of PPC-style PTE (r8) */
- rlwinm r8,r5,32-10,31,31 /* _PAGE_RW -> PP lsb */
- rlwinm r0,r5,32-7,31,31 /* _PAGE_DIRTY -> PP lsb */
- and r8,r8,r0 /* writable if _RW & _DIRTY */
- rlwimi r5,r5,32-1,30,30 /* _PAGE_USER -> PP msb */
- rlwimi r5,r5,32-2,31,31 /* _PAGE_USER -> PP lsb */
- ori r8,r8,0xe14 /* clear out reserved bits and M */
- andc r8,r5,r8 /* PP = user? (rw&dirty? 2: 3): 0 */
-BEGIN_FTR_SECTION
- ori r8,r8,_PAGE_COHERENT /* set M (coherence required) */
-END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT)
-
- /* Construct the high word of the PPC-style PTE (r5) */
- rlwinm r5,r3,7,1,24 /* put VSID in 0x7fffff80 bits */
- rlwimi r5,r4,10,26,31 /* put in API (abbrev page index) */
- SET_V(r5) /* set V (valid) bit */
-
- /* Get the address of the primary PTE group in the hash table (r3) */
-_GLOBAL(hash_page_patch_A)
- addis r0,r7,Hash_base@h /* base address of hash table */
- rlwimi r0,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */
- rlwinm r3,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
- xor r3,r3,r0 /* make primary hash */
- li r0,8 /* PTEs/group */
-
- /*
- * Test the _PAGE_HASHPTE bit in the old linux PTE, and skip the search
- * if it is clear, meaning that the HPTE isn't there already...
- */
- andi. r6,r6,_PAGE_HASHPTE
- beq+ 10f /* no PTE: go look for an empty slot */
- tlbie r4
-
- addis r4,r7,htab_hash_searches@ha
- lwz r6,htab_hash_searches@l(r4)
- addi r6,r6,1 /* count how many searches we do */
- stw r6,htab_hash_searches@l(r4)
-
- /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */
- mtctr r0
- addi r4,r3,-PTE_SIZE
-1: LDPTEu r6,PTE_SIZE(r4) /* get next PTE */
- CMPPTE 0,r6,r5
- bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
- beq+ found_slot
-
- /* Search the secondary PTEG for a matching PTE */
- ori r5,r5,PTE_H /* set H (secondary hash) bit */
-_GLOBAL(hash_page_patch_B)
- xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
- xori r4,r4,(-PTEG_SIZE & 0xffff)
- addi r4,r4,-PTE_SIZE
- mtctr r0
-2: LDPTEu r6,PTE_SIZE(r4)
- CMPPTE 0,r6,r5
- bdnzf 2,2b
- beq+ found_slot
- xori r5,r5,PTE_H /* clear H bit again */
-
- /* Search the primary PTEG for an empty slot */
-10: mtctr r0
- addi r4,r3,-PTE_SIZE /* search primary PTEG */
-1: LDPTEu r6,PTE_SIZE(r4) /* get next PTE */
- TST_V(r6) /* test valid bit */
- bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
- beq+ found_empty
-
- /* update counter of times that the primary PTEG is full */
- addis r4,r7,primary_pteg_full@ha
- lwz r6,primary_pteg_full@l(r4)
- addi r6,r6,1
- stw r6,primary_pteg_full@l(r4)
-
- /* Search the secondary PTEG for an empty slot */
- ori r5,r5,PTE_H /* set H (secondary hash) bit */
-_GLOBAL(hash_page_patch_C)
- xoris r4,r3,Hash_msk>>16 /* compute secondary hash */
- xori r4,r4,(-PTEG_SIZE & 0xffff)
- addi r4,r4,-PTE_SIZE
- mtctr r0
-2: LDPTEu r6,PTE_SIZE(r4)
- TST_V(r6)
- bdnzf 2,2b
- beq+ found_empty
- xori r5,r5,PTE_H /* clear H bit again */
-
- /*
- * Choose an arbitrary slot in the primary PTEG to overwrite.
- * Since both the primary and secondary PTEGs are full, and we
- * have no information that the PTEs in the primary PTEG are
- * more important or useful than those in the secondary PTEG,
- * and we know there is a definite (although small) speed
- * advantage to putting the PTE in the primary PTEG, we always
- * put the PTE in the primary PTEG.
- */
- addis r4,r7,next_slot@ha
- lwz r6,next_slot@l(r4)
- addi r6,r6,PTE_SIZE
- andi. r6,r6,7*PTE_SIZE
- stw r6,next_slot@l(r4)
- add r4,r3,r6
-
- /* update counter of evicted pages */
- addis r6,r7,htab_evicts@ha
- lwz r3,htab_evicts@l(r6)
- addi r3,r3,1
- stw r3,htab_evicts@l(r6)
-
-#ifndef CONFIG_SMP
- /* Store PTE in PTEG */
-found_empty:
- STPTE r5,0(r4)
-found_slot:
- STPTE r8,PTE_SIZE/2(r4)
-
-#else /* CONFIG_SMP */
-/*
- * Between the tlbie above and updating the hash table entry below,
- * another CPU could read the hash table entry and put it in its TLB.
- * There are 3 cases:
- * 1. using an empty slot
- * 2. updating an earlier entry to change permissions (i.e. enable write)
- * 3. taking over the PTE for an unrelated address
- *
- * In each case it doesn't really matter if the other CPUs have the old
- * PTE in their TLB. So we don't need to bother with another tlbie here,
- * which is convenient as we've overwritten the register that had the
- * address. :-) The tlbie above is mainly to make sure that this CPU comes
- * and gets the new PTE from the hash table.
- *
- * We do however have to make sure that the PTE is never in an invalid
- * state with the V bit set.
- */
-found_empty:
-found_slot:
- CLR_V(r5,r0) /* clear V (valid) bit in PTE */
- STPTE r5,0(r4)
- sync
- TLBSYNC
- STPTE r8,PTE_SIZE/2(r4) /* put in correct RPN, WIMG, PP bits */
- sync
- SET_V(r5)
- STPTE r5,0(r4) /* finally set V bit in PTE */
-#endif /* CONFIG_SMP */
-
- sync /* make sure pte updates get to memory */
- blr
-
- .section .bss
- .align 2
-next_slot:
- .space 4
- .globl primary_pteg_full
-primary_pteg_full:
- .space 4
- .globl htab_hash_searches
-htab_hash_searches:
- .space 4
- .previous
-
-/*
- * Flush the entry for a particular page from the hash table.
- *
- * flush_hash_pages(unsigned context, unsigned long va, unsigned long pmdval,
- * int count)
- *
- * We assume that there is a hash table in use (Hash != 0).
- */
-_GLOBAL(flush_hash_pages)
- tophys(r7,0)
-
- /*
- * We disable interrupts here, even on UP, because we want
- * the _PAGE_HASHPTE bit to be a reliable indication of
- * whether the HPTE exists (or at least whether one did once).
- * We also turn off the MMU for data accesses so that we
- * we can't take a hash table miss (assuming the code is
- * covered by a BAT). -- paulus
- */
- mfmsr r10
- SYNC
- rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
- rlwinm r0,r0,0,28,26 /* clear MSR_DR */
- mtmsr r0
- SYNC_601
- isync
-
- /* First find a PTE in the range that has _PAGE_HASHPTE set */
- rlwimi r5,r4,22,20,29
-1: lwz r0,0(r5)
- cmpwi cr1,r6,1
- andi. r0,r0,_PAGE_HASHPTE
- bne 2f
- ble cr1,19f
- addi r4,r4,0x1000
- addi r5,r5,4
- addi r6,r6,-1
- b 1b
-
- /* Convert context and va to VSID */
-2: mulli r3,r3,897*16 /* multiply context by context skew */
- rlwinm r0,r4,4,28,31 /* get ESID (top 4 bits of va) */
- mulli r0,r0,0x111 /* multiply by ESID skew */
- add r3,r3,r0 /* note code below trims to 24 bits */
-
- /* Construct the high word of the PPC-style PTE (r11) */
- rlwinm r11,r3,7,1,24 /* put VSID in 0x7fffff80 bits */
- rlwimi r11,r4,10,26,31 /* put in API (abbrev page index) */
- SET_V(r11) /* set V (valid) bit */
-
-#ifdef CONFIG_SMP
- addis r9,r7,mmu_hash_lock@ha
- addi r9,r9,mmu_hash_lock@l
- rlwinm r8,r1,0,0,18
- add r8,r8,r7
- lwz r8,TI_CPU(r8)
- oris r8,r8,9
-10: lwarx r0,0,r9
- cmpi 0,r0,0
- bne- 11f
- stwcx. r8,0,r9
- beq+ 12f
-11: lwz r0,0(r9)
- cmpi 0,r0,0
- beq 10b
- b 11b
-12: isync
-#endif
-
- /*
- * Check the _PAGE_HASHPTE bit in the linux PTE. If it is
- * already clear, we're done (for this pte). If not,
- * clear it (atomically) and proceed. -- paulus.
- */
-33: lwarx r8,0,r5 /* fetch the pte */
- andi. r0,r8,_PAGE_HASHPTE
- beq 8f /* done if HASHPTE is already clear */
- rlwinm r8,r8,0,31,29 /* clear HASHPTE bit */
- stwcx. r8,0,r5 /* update the pte */
- bne- 33b
-
- /* Get the address of the primary PTE group in the hash table (r3) */
-_GLOBAL(flush_hash_patch_A)
- addis r8,r7,Hash_base@h /* base address of hash table */
- rlwimi r8,r3,LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* VSID -> hash */
- rlwinm r0,r4,20+LG_PTEG_SIZE,HASH_LEFT,HASH_RIGHT /* PI -> hash */
- xor r8,r0,r8 /* make primary hash */
-
- /* Search the primary PTEG for a PTE whose 1st (d)word matches r5 */
- li r0,8 /* PTEs/group */
- mtctr r0
- addi r12,r8,-PTE_SIZE
-1: LDPTEu r0,PTE_SIZE(r12) /* get next PTE */
- CMPPTE 0,r0,r11
- bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
- beq+ 3f
-
- /* Search the secondary PTEG for a matching PTE */
- ori r11,r11,PTE_H /* set H (secondary hash) bit */
- li r0,8 /* PTEs/group */
-_GLOBAL(flush_hash_patch_B)
- xoris r12,r8,Hash_msk>>16 /* compute secondary hash */
- xori r12,r12,(-PTEG_SIZE & 0xffff)
- addi r12,r12,-PTE_SIZE
- mtctr r0
-2: LDPTEu r0,PTE_SIZE(r12)
- CMPPTE 0,r0,r11
- bdnzf 2,2b
- xori r11,r11,PTE_H /* clear H again */
- bne- 4f /* should rarely fail to find it */
-
-3: li r0,0
- STPTE r0,0(r12) /* invalidate entry */
-4: sync
- tlbie r4 /* in hw tlb too */
- sync
-
-8: ble cr1,9f /* if all ptes checked */
-81: addi r6,r6,-1
- addi r5,r5,4 /* advance to next pte */
- addi r4,r4,0x1000
- lwz r0,0(r5) /* check next pte */
- cmpwi cr1,r6,1
- andi. r0,r0,_PAGE_HASHPTE
- bne 33b
- bgt cr1,81b
-
-9:
-#ifdef CONFIG_SMP
- TLBSYNC
- li r0,0
- stw r0,0(r9) /* clear mmu_hash_lock */
-#endif
-
-19: mtmsr r10
- SYNC_601
- isync
- blr
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
deleted file mode 100644
index 1a63711..0000000
--- a/arch/ppc/mm/init.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/*
- * PowerPC version
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- * and Cort Dougan (PReP) (cort@cs.nmt.edu)
- * Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- * PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
- *
- * Derived from "arch/i386/mm/init.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/bootmem.h>
-#include <linux/highmem.h>
-#include <linux/initrd.h>
-#include <linux/pagemap.h>
-
-#include <asm/pgalloc.h>
-#include <asm/prom.h>
-#include <asm/io.h>
-#include <asm/mmu_context.h>
-#include <asm/pgtable.h>
-#include <asm/mmu.h>
-#include <asm/smp.h>
-#include <asm/machdep.h>
-#include <asm/btext.h>
-#include <asm/tlb.h>
-#include <asm/bootinfo.h>
-
-#include "mem_pieces.h"
-#include "mmu_decl.h"
-
-#if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
-/* The amount of lowmem must be within 0xF0000000 - KERNELBASE. */
-#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - KERNELBASE))
-#error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL"
-#endif
-#endif
-#define MAX_LOW_MEM CONFIG_LOWMEM_SIZE
-
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-
-unsigned long total_memory;
-unsigned long total_lowmem;
-
-unsigned long ppc_memstart;
-unsigned long ppc_memoffset = PAGE_OFFSET;
-
-int mem_init_done;
-int init_bootmem_done;
-int boot_mapsize;
-
-extern char _end[];
-extern char etext[], _stext[];
-extern char __init_begin, __init_end;
-
-#ifdef CONFIG_HIGHMEM
-pte_t *kmap_pte;
-pgprot_t kmap_prot;
-
-EXPORT_SYMBOL(kmap_prot);
-EXPORT_SYMBOL(kmap_pte);
-#endif
-
-void MMU_init(void);
-void set_phys_avail(unsigned long total_ram);
-
-/* XXX should be in current.h -- paulus */
-extern struct task_struct *current_set[NR_CPUS];
-
-char *klimit = _end;
-struct mem_pieces phys_avail;
-
-/*
- * this tells the system to map all of ram with the segregs
- * (i.e. page tables) instead of the bats.
- * -- Cort
- */
-int __map_without_bats;
-int __map_without_ltlbs;
-
-/* max amount of RAM to use */
-unsigned long __max_memory;
-/* max amount of low RAM to map in */
-unsigned long __max_low_memory = MAX_LOW_MEM;
-
-void show_mem(void)
-{
- int i,free = 0,total = 0,reserved = 0;
- int shared = 0, cached = 0;
- int highmem = 0;
-
- printk("Mem-info:\n");
- show_free_areas();
- i = max_mapnr;
- while (i-- > 0) {
- total++;
- if (PageHighMem(mem_map+i))
- highmem++;
- if (PageReserved(mem_map+i))
- reserved++;
- else if (PageSwapCache(mem_map+i))
- cached++;
- else if (!page_count(mem_map+i))
- free++;
- else
- shared += page_count(mem_map+i) - 1;
- }
- printk("%d pages of RAM\n",total);
- printk("%d pages of HIGHMEM\n", highmem);
- printk("%d free pages\n",free);
- printk("%d reserved pages\n",reserved);
- printk("%d pages shared\n",shared);
- printk("%d pages swap cached\n",cached);
-}
-
-/* Free up now-unused memory */
-static void free_sec(unsigned long start, unsigned long end, const char *name)
-{
- unsigned long cnt = 0;
-
- while (start < end) {
- ClearPageReserved(virt_to_page(start));
- init_page_count(virt_to_page(start));
- free_page(start);
- cnt++;
- start += PAGE_SIZE;
- }
- if (cnt) {
- printk(" %ldk %s", cnt << (PAGE_SHIFT - 10), name);
- totalram_pages += cnt;
- }
-}
-
-void free_initmem(void)
-{
-#define FREESEC(TYPE) \
- free_sec((unsigned long)(&__ ## TYPE ## _begin), \
- (unsigned long)(&__ ## TYPE ## _end), \
- #TYPE);
-
- printk ("Freeing unused kernel memory:");
- FREESEC(init);
- printk("\n");
- ppc_md.progress = NULL;
-#undef FREESEC
-}
-
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
- printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
-
- for (; start < end; start += PAGE_SIZE) {
- ClearPageReserved(virt_to_page(start));
- init_page_count(virt_to_page(start));
- free_page(start);
- totalram_pages++;
- }
-}
-#endif
-
-/*
- * Check for command-line options that affect what MMU_init will do.
- */
-void MMU_setup(void)
-{
- /* Check for nobats option (used in mapin_ram). */
- if (strstr(cmd_line, "nobats")) {
- __map_without_bats = 1;
- }
-
- if (strstr(cmd_line, "noltlbs")) {
- __map_without_ltlbs = 1;
- }
-
- /* Look for mem= option on command line */
- if (strstr(cmd_line, "mem=")) {
- char *p, *q;
- unsigned long maxmem = 0;
-
- for (q = cmd_line; (p = strstr(q, "mem=")) != 0; ) {
- q = p + 4;
- if (p > cmd_line && p[-1] != ' ')
- continue;
- maxmem = simple_strtoul(q, &q, 0);
- if (*q == 'k' || *q == 'K') {
- maxmem <<= 10;
- ++q;
- } else if (*q == 'm' || *q == 'M') {
- maxmem <<= 20;
- ++q;
- }
- }
- __max_memory = maxmem;
- }
-}
-
-/*
- * MMU_init sets up the basic memory mappings for the kernel,
- * including both RAM and possibly some I/O regions,
- * and sets up the page tables and the MMU hardware ready to go.
- */
-void __init MMU_init(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("MMU:enter", 0x111);
-
- /* parse args from command line */
- MMU_setup();
-
- /*
- * Figure out how much memory we have, how much
- * is lowmem, and how much is highmem. If we were
- * passed the total memory size from the bootloader,
- * just use it.
- */
- if (boot_mem_size)
- total_memory = boot_mem_size;
- else
- total_memory = ppc_md.find_end_of_memory();
-
- if (__max_memory && total_memory > __max_memory)
- total_memory = __max_memory;
- total_lowmem = total_memory;
- if (total_lowmem > __max_low_memory) {
- total_lowmem = __max_low_memory;
-#ifndef CONFIG_HIGHMEM
- total_memory = total_lowmem;
-#endif /* CONFIG_HIGHMEM */
- }
- set_phys_avail(total_lowmem);
-
- /* Initialize the MMU hardware */
- if (ppc_md.progress)
- ppc_md.progress("MMU:hw init", 0x300);
- MMU_init_hw();
-
- /* Map in all of RAM starting at KERNELBASE */
- if (ppc_md.progress)
- ppc_md.progress("MMU:mapin", 0x301);
- mapin_ram();
-
-#ifdef CONFIG_HIGHMEM
- ioremap_base = PKMAP_BASE;
-#else
- ioremap_base = 0xfe000000UL; /* for now, could be 0xfffff000 */
-#endif /* CONFIG_HIGHMEM */
- ioremap_bot = ioremap_base;
-
- /* Map in I/O resources */
- if (ppc_md.progress)
- ppc_md.progress("MMU:setio", 0x302);
- if (ppc_md.setup_io_mappings)
- ppc_md.setup_io_mappings();
-
- /* Initialize the context management stuff */
- mmu_context_init();
-
- if (ppc_md.progress)
- ppc_md.progress("MMU:exit", 0x211);
-
-#ifdef CONFIG_BOOTX_TEXT
- /* By default, we are no longer mapped */
- boot_text_mapped = 0;
- /* Must be done last, or ppc_md.progress will die. */
- map_boot_text();
-#endif
-}
-
-/* This is only called until mem_init is done. */
-void __init *early_get_page(void)
-{
- void *p;
-
- if (init_bootmem_done) {
- p = alloc_bootmem_pages(PAGE_SIZE);
- } else {
- p = mem_pieces_find(PAGE_SIZE, PAGE_SIZE);
- }
- return p;
-}
-
-/*
- * Initialize the bootmem system and give it all the memory we
- * have available.
- */
-void __init do_init_bootmem(void)
-{
- unsigned long start, size;
- int i;
-
- /*
- * Find an area to use for the bootmem bitmap.
- * We look for the first area which is at least
- * 128kB in length (128kB is enough for a bitmap
- * for 4GB of memory, using 4kB pages), plus 1 page
- * (in case the address isn't page-aligned).
- */
- start = 0;
- size = 0;
- for (i = 0; i < phys_avail.n_regions; ++i) {
- unsigned long a = phys_avail.regions[i].address;
- unsigned long s = phys_avail.regions[i].size;
- if (s <= size)
- continue;
- start = a;
- size = s;
- if (s >= 33 * PAGE_SIZE)
- break;
- }
- start = PAGE_ALIGN(start);
-
- min_low_pfn = start >> PAGE_SHIFT;
- max_low_pfn = (PPC_MEMSTART + total_lowmem) >> PAGE_SHIFT;
- max_pfn = (PPC_MEMSTART + total_memory) >> PAGE_SHIFT;
- boot_mapsize = init_bootmem_node(&contig_page_data, min_low_pfn,
- PPC_MEMSTART >> PAGE_SHIFT,
- max_low_pfn);
-
- /* remove the bootmem bitmap from the available memory */
- mem_pieces_remove(&phys_avail, start, boot_mapsize, 1);
-
- /* add everything in phys_avail into the bootmem map */
- for (i = 0; i < phys_avail.n_regions; ++i)
- free_bootmem(phys_avail.regions[i].address,
- phys_avail.regions[i].size);
-
- init_bootmem_done = 1;
-}
-
-/*
- * paging_init() sets up the page tables - in fact we've already done this.
- */
-void __init paging_init(void)
-{
- unsigned long start_pfn, end_pfn;
- unsigned long max_zone_pfns[MAX_NR_ZONES];
-#ifdef CONFIG_HIGHMEM
- map_page(PKMAP_BASE, 0, 0); /* XXX gross */
- pkmap_page_table = pte_offset_kernel(pmd_offset(pgd_offset_k
- (PKMAP_BASE), PKMAP_BASE), PKMAP_BASE);
- map_page(KMAP_FIX_BEGIN, 0, 0); /* XXX gross */
- kmap_pte = pte_offset_kernel(pmd_offset(pgd_offset_k
- (KMAP_FIX_BEGIN), KMAP_FIX_BEGIN), KMAP_FIX_BEGIN);
- kmap_prot = PAGE_KERNEL;
-#endif /* CONFIG_HIGHMEM */
- /* All pages are DMA-able so we put them all in the DMA zone. */
- start_pfn = __pa(PAGE_OFFSET) >> PAGE_SHIFT;
- end_pfn = start_pfn + (total_memory >> PAGE_SHIFT);
- add_active_range(0, start_pfn, end_pfn);
-
- memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
-#ifdef CONFIG_HIGHMEM
- max_zone_pfns[ZONE_DMA] = total_lowmem >> PAGE_SHIFT;
- max_zone_pfns[ZONE_HIGHMEM] = total_memory >> PAGE_SHIFT;
-#else
- max_zone_pfns[ZONE_DMA] = total_memory >> PAGE_SHIFT;
-#endif /* CONFIG_HIGHMEM */
- free_area_init_nodes(max_zone_pfns);
-}
-
-void __init mem_init(void)
-{
- unsigned long addr;
- int codepages = 0;
- int datapages = 0;
- int initpages = 0;
-#ifdef CONFIG_HIGHMEM
- unsigned long highmem_mapnr;
-
- highmem_mapnr = total_lowmem >> PAGE_SHIFT;
-#endif /* CONFIG_HIGHMEM */
- max_mapnr = total_memory >> PAGE_SHIFT;
-
- high_memory = (void *) __va(PPC_MEMSTART + total_lowmem);
- num_physpages = max_mapnr; /* RAM is assumed contiguous */
-
- totalram_pages += free_all_bootmem();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* if we are booted from BootX with an initial ramdisk,
- make sure the ramdisk pages aren't reserved. */
- if (initrd_start) {
- for (addr = initrd_start; addr < initrd_end; addr += PAGE_SIZE)
- ClearPageReserved(virt_to_page(addr));
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- for (addr = PAGE_OFFSET; addr < (unsigned long)high_memory;
- addr += PAGE_SIZE) {
- if (!PageReserved(virt_to_page(addr)))
- continue;
- if (addr < (ulong) etext)
- codepages++;
- else if (addr >= (unsigned long)&__init_begin
- && addr < (unsigned long)&__init_end)
- initpages++;
- else if (addr < (ulong) klimit)
- datapages++;
- }
-
-#ifdef CONFIG_HIGHMEM
- {
- unsigned long pfn;
-
- for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
- struct page *page = mem_map + pfn;
-
- ClearPageReserved(page);
- init_page_count(page);
- __free_page(page);
- totalhigh_pages++;
- }
- totalram_pages += totalhigh_pages;
- }
-#endif /* CONFIG_HIGHMEM */
-
- printk("Memory: %luk available (%dk kernel code, %dk data, %dk init, %ldk highmem)\n",
- (unsigned long)nr_free_pages()<< (PAGE_SHIFT-10),
- codepages<< (PAGE_SHIFT-10), datapages<< (PAGE_SHIFT-10),
- initpages<< (PAGE_SHIFT-10),
- (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
-
- mem_init_done = 1;
-}
-
-/*
- * Set phys_avail to the amount of physical memory,
- * less the kernel text/data/bss.
- */
-void __init
-set_phys_avail(unsigned long total_memory)
-{
- unsigned long kstart, ksize;
-
- /*
- * Initially, available physical memory is equivalent to all
- * physical memory.
- */
-
- phys_avail.regions[0].address = PPC_MEMSTART;
- phys_avail.regions[0].size = total_memory;
- phys_avail.n_regions = 1;
-
- /*
- * Map out the kernel text/data/bss from the available physical
- * memory.
- */
-
- kstart = __pa(_stext); /* should be 0 */
- ksize = PAGE_ALIGN(klimit - _stext);
-
- mem_pieces_remove(&phys_avail, kstart, ksize, 0);
- mem_pieces_remove(&phys_avail, 0, 0x4000, 0);
-
-#if defined(CONFIG_BLK_DEV_INITRD)
- /* Remove the init RAM disk from the available memory. */
- if (initrd_start) {
- mem_pieces_remove(&phys_avail, __pa(initrd_start),
- initrd_end - initrd_start, 1);
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-}
-
-/* Mark some memory as reserved by removing it from phys_avail. */
-void __init reserve_phys_mem(unsigned long start, unsigned long size)
-{
- mem_pieces_remove(&phys_avail, start, size, 1);
-}
-
-/*
- * This is called when a page has been modified by the kernel.
- * It just marks the page as not i-cache clean. We do the i-cache
- * flush later when the page is given to a user process, if necessary.
- */
-void flush_dcache_page(struct page *page)
-{
- clear_bit(PG_arch_1, &page->flags);
-}
-
-void flush_dcache_icache_page(struct page *page)
-{
-#ifdef CONFIG_BOOKE
- void *start = kmap_atomic(page, KM_PPC_SYNC_ICACHE);
- __flush_dcache_icache(start);
- kunmap_atomic(start, KM_PPC_SYNC_ICACHE);
-#elif defined(CONFIG_8xx)
- /* On 8xx there is no need to kmap since highmem is not supported */
- __flush_dcache_icache(page_address(page));
-#else
- __flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
-#endif
-
-}
-void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
-{
- clear_page(page);
- clear_bit(PG_arch_1, &pg->flags);
-}
-
-void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
- struct page *pg)
-{
- copy_page(vto, vfrom);
- clear_bit(PG_arch_1, &pg->flags);
-}
-
-void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
- unsigned long addr, int len)
-{
- unsigned long maddr;
-
- maddr = (unsigned long) kmap(page) + (addr & ~PAGE_MASK);
- flush_icache_range(maddr, maddr + len);
- kunmap(page);
-}
-
-/*
- * This is called at the end of handling a user page fault, when the
- * fault has been handled by updating a PTE in the linux page tables.
- * We use it to preload an HPTE into the hash table corresponding to
- * the updated linux PTE.
- */
-void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
- pte_t pte)
-{
- /* handle i-cache coherency */
- unsigned long pfn = pte_pfn(pte);
-
- if (pfn_valid(pfn)) {
- struct page *page = pfn_to_page(pfn);
-#ifdef CONFIG_8xx
- /* On 8xx, the TLB handlers work in 2 stages:
- * First, a zeroed entry is loaded by TLBMiss handler,
- * which causes the TLBError handler to be triggered.
- * That means the zeroed TLB has to be invalidated
- * whenever a page miss occurs.
- */
- _tlbie(address, 0 /* 8xx doesn't care about PID */);
-#endif
- if (!PageReserved(page)
- && !test_bit(PG_arch_1, &page->flags)) {
- if (vma->vm_mm == current->active_mm)
- __flush_dcache_icache((void *) address);
- else
- flush_dcache_icache_page(page);
- set_bit(PG_arch_1, &page->flags);
- }
- }
-
-#ifdef CONFIG_PPC_STD_MMU
- /* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */
- if (Hash != 0 && pte_young(pte)) {
- struct mm_struct *mm;
- pmd_t *pmd;
-
- mm = (address < TASK_SIZE)? vma->vm_mm: &init_mm;
- pmd = pmd_offset(pgd_offset(mm, address), address);
- if (!pmd_none(*pmd))
- add_hash_page(mm->context.id, address, pmd_val(*pmd));
- }
-#endif
-}
-
-/*
- * This is called by /dev/mem to know if a given address has to
- * be mapped non-cacheable or not
- */
-int page_is_ram(unsigned long pfn)
-{
- return pfn < max_pfn;
-}
-
-pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
- unsigned long size, pgprot_t vma_prot)
-{
- if (ppc_md.phys_mem_access_prot)
- return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
-
- if (!page_is_ram(pfn))
- vma_prot = __pgprot(pgprot_val(vma_prot)
- | _PAGE_GUARDED | _PAGE_NO_CACHE);
- return vma_prot;
-}
-EXPORT_SYMBOL(phys_mem_access_prot);
diff --git a/arch/ppc/mm/mem_pieces.c b/arch/ppc/mm/mem_pieces.c
deleted file mode 100644
index 6030a0d..0000000
--- a/arch/ppc/mm/mem_pieces.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/*
- * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
- * Changes to accommodate Power Macintoshes.
- * Cort Dougan <cort@cs.nmt.edu>
- * Rewrites.
- * Grant Erickson <grant@lcse.umn.edu>
- * General rework and split from mm/init.c.
- *
- * Module name: mem_pieces.c
- *
- * Description:
- * Routines and data structures for manipulating and representing
- * phyiscal memory extents (i.e. address/length pairs).
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <asm/page.h>
-
-#include "mem_pieces.h"
-
-extern struct mem_pieces phys_avail;
-
-static void mem_pieces_print(struct mem_pieces *);
-
-/*
- * Scan a region for a piece of a given size with the required alignment.
- */
-void __init *
-mem_pieces_find(unsigned int size, unsigned int align)
-{
- int i;
- unsigned a, e;
- struct mem_pieces *mp = &phys_avail;
-
- for (i = 0; i < mp->n_regions; ++i) {
- a = mp->regions[i].address;
- e = a + mp->regions[i].size;
- a = (a + align - 1) & -align;
- if (a + size <= e) {
- mem_pieces_remove(mp, a, size, 1);
- return (void *) __va(a);
- }
- }
- panic("Couldn't find %u bytes at %u alignment\n", size, align);
-
- return NULL;
-}
-
-/*
- * Remove some memory from an array of pieces
- */
-void __init
-mem_pieces_remove(struct mem_pieces *mp, unsigned int start, unsigned int size,
- int must_exist)
-{
- int i, j;
- unsigned int end, rs, re;
- struct reg_property *rp;
-
- end = start + size;
- for (i = 0, rp = mp->regions; i < mp->n_regions; ++i, ++rp) {
- if (end > rp->address && start < rp->address + rp->size)
- break;
- }
- if (i >= mp->n_regions) {
- if (must_exist)
- printk("mem_pieces_remove: [%x,%x) not in any region\n",
- start, end);
- return;
- }
- for (; i < mp->n_regions && end > rp->address; ++i, ++rp) {
- rs = rp->address;
- re = rs + rp->size;
- if (must_exist && (start < rs || end > re)) {
- printk("mem_pieces_remove: bad overlap [%x,%x) with",
- start, end);
- mem_pieces_print(mp);
- must_exist = 0;
- }
- if (start > rs) {
- rp->size = start - rs;
- if (end < re) {
- /* need to split this entry */
- if (mp->n_regions >= MEM_PIECES_MAX)
- panic("eek... mem_pieces overflow");
- for (j = mp->n_regions; j > i + 1; --j)
- mp->regions[j] = mp->regions[j-1];
- ++mp->n_regions;
- rp[1].address = end;
- rp[1].size = re - end;
- }
- } else {
- if (end < re) {
- rp->address = end;
- rp->size = re - end;
- } else {
- /* need to delete this entry */
- for (j = i; j < mp->n_regions - 1; ++j)
- mp->regions[j] = mp->regions[j+1];
- --mp->n_regions;
- --i;
- --rp;
- }
- }
- }
-}
-
-static void __init
-mem_pieces_print(struct mem_pieces *mp)
-{
- int i;
-
- for (i = 0; i < mp->n_regions; ++i)
- printk(" [%x, %x)", mp->regions[i].address,
- mp->regions[i].address + mp->regions[i].size);
- printk("\n");
-}
-
-void __init
-mem_pieces_sort(struct mem_pieces *mp)
-{
- unsigned long a, s;
- int i, j;
-
- for (i = 1; i < mp->n_regions; ++i) {
- a = mp->regions[i].address;
- s = mp->regions[i].size;
- for (j = i - 1; j >= 0; --j) {
- if (a >= mp->regions[j].address)
- break;
- mp->regions[j+1] = mp->regions[j];
- }
- mp->regions[j+1].address = a;
- mp->regions[j+1].size = s;
- }
-}
-
-void __init
-mem_pieces_coalesce(struct mem_pieces *mp)
-{
- unsigned long a, s, ns;
- int i, j, d;
-
- d = 0;
- for (i = 0; i < mp->n_regions; i = j) {
- a = mp->regions[i].address;
- s = mp->regions[i].size;
- for (j = i + 1; j < mp->n_regions
- && mp->regions[j].address - a <= s; ++j) {
- ns = mp->regions[j].address + mp->regions[j].size - a;
- if (ns > s)
- s = ns;
- }
- mp->regions[d].address = a;
- mp->regions[d].size = s;
- ++d;
- }
- mp->n_regions = d;
-}
diff --git a/arch/ppc/mm/mem_pieces.h b/arch/ppc/mm/mem_pieces.h
deleted file mode 100644
index e2b700d..0000000
--- a/arch/ppc/mm/mem_pieces.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
- * Changes to accommodate Power Macintoshes.
- * Cort Dougan <cort@cs.nmt.edu>
- * Rewrites.
- * Grant Erickson <grant@lcse.umn.edu>
- * General rework and split from mm/init.c.
- *
- * Module name: mem_pieces.h
- *
- * Description:
- * Routines and data structures for manipulating and representing
- * phyiscal memory extents (i.e. address/length pairs).
- *
- */
-
-#ifndef __MEM_PIECES_H__
-#define __MEM_PIECES_H__
-
-#include <asm/prom.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/* Type Definitions */
-
-#define MEM_PIECES_MAX 32
-
-struct mem_pieces {
- int n_regions;
- struct reg_property regions[MEM_PIECES_MAX];
-};
-
-/* Function Prototypes */
-
-extern void *mem_pieces_find(unsigned int size, unsigned int align);
-extern void mem_pieces_remove(struct mem_pieces *mp, unsigned int start,
- unsigned int size, int must_exist);
-extern void mem_pieces_coalesce(struct mem_pieces *mp);
-extern void mem_pieces_sort(struct mem_pieces *mp);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __MEM_PIECES_H__ */
diff --git a/arch/ppc/mm/mmu_context.c b/arch/ppc/mm/mmu_context.c
deleted file mode 100644
index dacf45c..0000000
--- a/arch/ppc/mm/mmu_context.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * This file contains the routines for handling the MMU on those
- * PowerPC implementations where the MMU substantially follows the
- * architecture specification. This includes the 6xx, 7xx, 7xxx,
- * and 8260 implementations but excludes the 8xx and 4xx.
- * -- paulus
- *
- * Derived from arch/ppc/mm/init.c:
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- * and Cort Dougan (PReP) (cort@cs.nmt.edu)
- * Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * Derived from "arch/i386/mm/init.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/mm.h>
-#include <linux/init.h>
-
-#include <asm/mmu_context.h>
-#include <asm/tlbflush.h>
-
-unsigned long next_mmu_context;
-unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
-#ifdef FEW_CONTEXTS
-atomic_t nr_free_contexts;
-struct mm_struct *context_mm[LAST_CONTEXT+1];
-void steal_context(void);
-#endif /* FEW_CONTEXTS */
-
-/*
- * Initialize the context management stuff.
- */
-void __init
-mmu_context_init(void)
-{
- /*
- * Some processors have too few contexts to reserve one for
- * init_mm, and require using context 0 for a normal task.
- * Other processors reserve the use of context zero for the kernel.
- * This code assumes FIRST_CONTEXT < 32.
- */
- context_map[0] = (1 << FIRST_CONTEXT) - 1;
- next_mmu_context = FIRST_CONTEXT;
-#ifdef FEW_CONTEXTS
- atomic_set(&nr_free_contexts, LAST_CONTEXT - FIRST_CONTEXT + 1);
-#endif /* FEW_CONTEXTS */
-}
-
-#ifdef FEW_CONTEXTS
-/*
- * Steal a context from a task that has one at the moment.
- * This is only used on 8xx and 4xx and we presently assume that
- * they don't do SMP. If they do then this will have to check
- * whether the MM we steal is in use.
- * We also assume that this is only used on systems that don't
- * use an MMU hash table - this is true for 8xx and 4xx.
- * This isn't an LRU system, it just frees up each context in
- * turn (sort-of pseudo-random replacement :). This would be the
- * place to implement an LRU scheme if anyone was motivated to do it.
- * -- paulus
- */
-void
-steal_context(void)
-{
- struct mm_struct *mm;
-
- /* free up context `next_mmu_context' */
- /* if we shouldn't free context 0, don't... */
- if (next_mmu_context < FIRST_CONTEXT)
- next_mmu_context = FIRST_CONTEXT;
- mm = context_mm[next_mmu_context];
- flush_tlb_mm(mm);
- destroy_context(mm);
-}
-#endif /* FEW_CONTEXTS */
diff --git a/arch/ppc/mm/mmu_decl.h b/arch/ppc/mm/mmu_decl.h
deleted file mode 100644
index 5f813e3..0000000
--- a/arch/ppc/mm/mmu_decl.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*
- * Declarations of procedures and variables shared between files
- * in arch/ppc/mm/.
- *
- * Derived from arch/ppc/mm/init.c:
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- * and Cort Dougan (PReP) (cort@cs.nmt.edu)
- * Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * Derived from "arch/i386/mm/init.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-#include <asm/tlbflush.h>
-#include <asm/mmu.h>
-
-extern void mapin_ram(void);
-extern int map_page(unsigned long va, phys_addr_t pa, int flags);
-extern void setbat(int index, unsigned long virt, unsigned long phys,
- unsigned int size, int flags);
-extern void reserve_phys_mem(unsigned long start, unsigned long size);
-extern void settlbcam(int index, unsigned long virt, phys_addr_t phys,
- unsigned int size, int flags, unsigned int pid);
-extern void invalidate_tlbcam_entry(int index);
-
-extern int __map_without_bats;
-extern unsigned long ioremap_base;
-extern unsigned long ioremap_bot;
-extern unsigned int rtas_data, rtas_size;
-
-extern unsigned long total_memory;
-extern unsigned long total_lowmem;
-extern int mem_init_done;
-
-extern PTE *Hash, *Hash_end;
-extern unsigned long Hash_size, Hash_mask;
-
-extern unsigned int num_tlbcam_entries;
-
-/* ...and now those things that may be slightly different between processor
- * architectures. -- Dan
- */
-#if defined(CONFIG_8xx)
-#define flush_HPTE(X, va, pg) _tlbie(va, 0 /* 8xx doesn't care about PID */)
-#define MMU_init_hw() do { } while(0)
-#define mmu_mapin_ram() (0UL)
-
-#elif defined(CONFIG_4xx)
-#define flush_HPTE(pid, va, pg) _tlbie(va, pid)
-extern void MMU_init_hw(void);
-extern unsigned long mmu_mapin_ram(void);
-
-#else
-/* anything except 4xx or 8xx */
-extern void MMU_init_hw(void);
-extern unsigned long mmu_mapin_ram(void);
-
-/* Be careful....this needs to be updated if we ever encounter 603 SMPs,
- * which includes all new 82xx processors. We need tlbie/tlbsync here
- * in that case (I think). -- Dan.
- */
-static inline void flush_HPTE(unsigned context, unsigned long va,
- unsigned long pdval)
-{
- if ((Hash != 0) &&
- cpu_has_feature(CPU_FTR_HPTE_TABLE))
- flush_hash_pages(0, va, pdval, 1);
- else
- _tlbie(va);
-}
-#endif
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c
deleted file mode 100644
index 03a79bff..0000000
--- a/arch/ppc/mm/pgtable.c
+++ /dev/null
@@ -1,403 +0,0 @@
-/*
- * This file contains the routines setting up the linux page tables.
- * -- paulus
- *
- * Derived from arch/ppc/mm/init.c:
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- * and Cort Dougan (PReP) (cort@cs.nmt.edu)
- * Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * Derived from "arch/i386/mm/init.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/mm.h>
-#include <linux/vmalloc.h>
-#include <linux/init.h>
-#include <linux/highmem.h>
-
-#include <asm/pgtable.h>
-#include <asm/pgalloc.h>
-#include <asm/io.h>
-
-#include "mmu_decl.h"
-
-unsigned long ioremap_base;
-unsigned long ioremap_bot;
-int io_bat_index;
-
-#if defined(CONFIG_6xx)
-#define HAVE_BATS 1
-#endif
-
-extern char etext[], _stext[];
-
-#ifdef CONFIG_SMP
-extern void hash_page_sync(void);
-#endif
-
-#ifdef HAVE_BATS
-extern unsigned long v_mapped_by_bats(unsigned long va);
-extern unsigned long p_mapped_by_bats(unsigned long pa);
-void setbat(int index, unsigned long virt, unsigned long phys,
- unsigned int size, int flags);
-
-#else /* !HAVE_BATS */
-#define v_mapped_by_bats(x) (0UL)
-#define p_mapped_by_bats(x) (0UL)
-#endif /* HAVE_BATS */
-
-#ifdef CONFIG_PTE_64BIT
-/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */
-#define PGDIR_ORDER 1
-#else
-#define PGDIR_ORDER 0
-#endif
-
-pgd_t *pgd_alloc(struct mm_struct *mm)
-{
- pgd_t *ret;
-
- ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, PGDIR_ORDER);
- return ret;
-}
-
-void pgd_free(struct mm_struct *mm, pgd_t *pgd)
-{
- free_pages((unsigned long)pgd, PGDIR_ORDER);
-}
-
-__init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
-{
- pte_t *pte;
- extern int mem_init_done;
- extern void *early_get_page(void);
-
- if (mem_init_done) {
- pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
- } else {
- pte = (pte_t *)early_get_page();
- if (pte)
- clear_page(pte);
- }
- return pte;
-}
-
-pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
-{
- struct page *ptepage;
-
-#ifdef CONFIG_HIGHPTE
- gfp_t flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT;
-#else
- gfp_t flags = GFP_KERNEL | __GFP_REPEAT;
-#endif
-
- ptepage = alloc_pages(flags, 0);
- if (ptepage) {
- clear_highpage(ptepage);
- pgtable_page_ctor(ptepage);
- }
- return ptepage;
-}
-
-void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
-{
-#ifdef CONFIG_SMP
- hash_page_sync();
-#endif
- free_page((unsigned long)pte);
-}
-
-void pte_free(struct mm_struct *mm, pgtable_t ptepage)
-{
-#ifdef CONFIG_SMP
- hash_page_sync();
-#endif
- pgtable_page_dtor(ptepage);
- __free_page(ptepage);
-}
-
-#ifndef CONFIG_PHYS_64BIT
-void __iomem *
-ioremap(phys_addr_t addr, unsigned long size)
-{
- return __ioremap(addr, size, _PAGE_NO_CACHE);
-}
-#else /* CONFIG_PHYS_64BIT */
-void __iomem *
-ioremap64(unsigned long long addr, unsigned long size)
-{
- return __ioremap(addr, size, _PAGE_NO_CACHE);
-}
-
-void __iomem *
-ioremap(phys_addr_t addr, unsigned long size)
-{
- phys_addr_t addr64 = fixup_bigphys_addr(addr, size);
-
- return ioremap64(addr64, size);
-}
-#endif /* CONFIG_PHYS_64BIT */
-
-void __iomem *
-__ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
-{
- unsigned long v, i;
- phys_addr_t p;
- int err;
-
- /*
- * Choose an address to map it to.
- * Once the vmalloc system is running, we use it.
- * Before then, we use space going down from ioremap_base
- * (ioremap_bot records where we're up to).
- */
- p = addr & PAGE_MASK;
- size = PAGE_ALIGN(addr + size) - p;
-
- /*
- * If the address lies within the first 16 MB, assume it's in ISA
- * memory space
- */
- if (p < 16*1024*1024)
- p += _ISA_MEM_BASE;
-
- /*
- * Don't allow anybody to remap normal RAM that we're using.
- * mem_init() sets high_memory so only do the check after that.
- */
- if ( mem_init_done && (p < virt_to_phys(high_memory)) )
- {
- printk("__ioremap(): phys addr "PHYS_FMT" is RAM lr %p\n", p,
- __builtin_return_address(0));
- return NULL;
- }
-
- if (size == 0)
- return NULL;
-
- /*
- * Is it already mapped? Perhaps overlapped by a previous
- * BAT mapping. If the whole area is mapped then we're done,
- * otherwise remap it since we want to keep the virt addrs for
- * each request contiguous.
- *
- * We make the assumption here that if the bottom and top
- * of the range we want are mapped then it's mapped to the
- * same virt address (and this is contiguous).
- * -- Cort
- */
- if ((v = p_mapped_by_bats(p)) /*&& p_mapped_by_bats(p+size-1)*/ )
- goto out;
-
- if (mem_init_done) {
- struct vm_struct *area;
- area = get_vm_area(size, VM_IOREMAP);
- if (area == 0)
- return NULL;
- v = (unsigned long) area->addr;
- } else {
- v = (ioremap_bot -= size);
- }
-
- if ((flags & _PAGE_PRESENT) == 0)
- flags |= _PAGE_KERNEL;
- if (flags & _PAGE_NO_CACHE)
- flags |= _PAGE_GUARDED;
-
- /*
- * Should check if it is a candidate for a BAT mapping
- */
-
- err = 0;
- for (i = 0; i < size && err == 0; i += PAGE_SIZE)
- err = map_page(v+i, p+i, flags);
- if (err) {
- if (mem_init_done)
- vunmap((void *)v);
- return NULL;
- }
-
-out:
- return (void __iomem *) (v + ((unsigned long)addr & ~PAGE_MASK));
-}
-
-void iounmap(volatile void __iomem *addr)
-{
- /*
- * If mapped by BATs then there is nothing to do.
- * Calling vfree() generates a benign warning.
- */
- if (v_mapped_by_bats((unsigned long)addr)) return;
-
- if (addr > high_memory && (unsigned long) addr < ioremap_bot)
- vunmap((void *) (PAGE_MASK & (unsigned long)addr));
-}
-
-void __iomem *ioport_map(unsigned long port, unsigned int len)
-{
- return (void __iomem *) (port + _IO_BASE);
-}
-
-void ioport_unmap(void __iomem *addr)
-{
- /* Nothing to do */
-}
-EXPORT_SYMBOL(ioport_map);
-EXPORT_SYMBOL(ioport_unmap);
-
-int
-map_page(unsigned long va, phys_addr_t pa, int flags)
-{
- pmd_t *pd;
- pte_t *pg;
- int err = -ENOMEM;
-
- /* Use upper 10 bits of VA to index the first level map */
- pd = pmd_offset(pgd_offset_k(va), va);
- /* Use middle 10 bits of VA to index the second-level map */
- pg = pte_alloc_kernel(pd, va);
- if (pg != 0) {
- err = 0;
- set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT, __pgprot(flags)));
- if (mem_init_done)
- flush_HPTE(0, va, pmd_val(*pd));
- }
- return err;
-}
-
-/*
- * Map in all of physical memory starting at KERNELBASE.
- */
-void __init mapin_ram(void)
-{
- unsigned long v, p, s, f;
-
- s = mmu_mapin_ram();
- v = KERNELBASE + s;
- p = PPC_MEMSTART + s;
- for (; s < total_lowmem; s += PAGE_SIZE) {
- if ((char *) v >= _stext && (char *) v < etext)
- f = _PAGE_RAM_TEXT;
- else
- f = _PAGE_RAM;
- map_page(v, p, f);
- v += PAGE_SIZE;
- p += PAGE_SIZE;
- }
-}
-
-/* is x a power of 4? */
-#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
-
-/*
- * Set up a mapping for a block of I/O.
- * virt, phys, size must all be page-aligned.
- * This should only be called before ioremap is called.
- */
-void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
- unsigned int size, int flags)
-{
- int i;
-
- if (virt > KERNELBASE && virt < ioremap_bot)
- ioremap_bot = ioremap_base = virt;
-
-#ifdef HAVE_BATS
- /*
- * Use a BAT for this if possible...
- */
- if (io_bat_index < 2 && is_power_of_2(size)
- && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
- setbat(io_bat_index, virt, phys, size, flags);
- ++io_bat_index;
- return;
- }
-#endif /* HAVE_BATS */
-
- /* No BATs available, put it in the page tables. */
- for (i = 0; i < size; i += PAGE_SIZE)
- map_page(virt + i, phys + i, flags);
-}
-
-/* Scan the real Linux page tables and return a PTE pointer for
- * a virtual address in a context.
- * Returns true (1) if PTE was found, zero otherwise. The pointer to
- * the PTE pointer is unmodified if PTE is not found.
- */
-int
-get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep, pmd_t **pmdp)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
- int retval = 0;
-
- pgd = pgd_offset(mm, addr & PAGE_MASK);
- if (pgd) {
- pmd = pmd_offset(pgd, addr & PAGE_MASK);
- if (pmd_present(*pmd)) {
- pte = pte_offset_map(pmd, addr & PAGE_MASK);
- if (pte) {
- retval = 1;
- *ptep = pte;
- if (pmdp)
- *pmdp = pmd;
- /* XXX caller needs to do pte_unmap, yuck */
- }
- }
- }
- return(retval);
-}
-
-/* Find physical address for this virtual address. Normally used by
- * I/O functions, but anyone can call it.
- */
-unsigned long iopa(unsigned long addr)
-{
- unsigned long pa;
-
- /* I don't know why this won't work on PMacs or CHRP. It
- * appears there is some bug, or there is some implicit
- * mapping done not properly represented by BATs or in page
- * tables.......I am actively working on resolving this, but
- * can't hold up other stuff. -- Dan
- */
- pte_t *pte;
- struct mm_struct *mm;
-
- /* Check the BATs */
- pa = v_mapped_by_bats(addr);
- if (pa)
- return pa;
-
- /* Allow mapping of user addresses (within the thread)
- * for DMA if necessary.
- */
- if (addr < TASK_SIZE)
- mm = current->mm;
- else
- mm = &init_mm;
-
- pa = 0;
- if (get_pteptr(mm, addr, &pte, NULL)) {
- pa = (pte_val(*pte) & PAGE_MASK) | (addr & ~PAGE_MASK);
- pte_unmap(pte);
- }
-
- return(pa);
-}
-
diff --git a/arch/ppc/mm/ppc_mmu.c b/arch/ppc/mm/ppc_mmu.c
deleted file mode 100644
index 0c1dc15..0000000
--- a/arch/ppc/mm/ppc_mmu.c
+++ /dev/null
@@ -1,269 +0,0 @@
-/*
- * This file contains the routines for handling the MMU on those
- * PowerPC implementations where the MMU substantially follows the
- * architecture specification. This includes the 6xx, 7xx, 7xxx,
- * and 8260 implementations but excludes the 8xx and 4xx.
- * -- paulus
- *
- * Derived from arch/ppc/mm/init.c:
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- * and Cort Dougan (PReP) (cort@cs.nmt.edu)
- * Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * Derived from "arch/i386/mm/init.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/highmem.h>
-
-#include <asm/prom.h>
-#include <asm/mmu.h>
-#include <asm/machdep.h>
-
-#include "mmu_decl.h"
-#include "mem_pieces.h"
-
-PTE *Hash, *Hash_end;
-unsigned long Hash_size, Hash_mask;
-unsigned long _SDR1;
-
-union ubat { /* BAT register values to be loaded */
- BAT bat;
- u32 word[2];
-} BATS[4][2]; /* 4 pairs of IBAT, DBAT */
-
-struct batrange { /* stores address ranges mapped by BATs */
- unsigned long start;
- unsigned long limit;
- unsigned long phys;
-} bat_addrs[4];
-
-/*
- * Return PA for this VA if it is mapped by a BAT, or 0
- */
-unsigned long v_mapped_by_bats(unsigned long va)
-{
- int b;
- for (b = 0; b < 4; ++b)
- if (va >= bat_addrs[b].start && va < bat_addrs[b].limit)
- return bat_addrs[b].phys + (va - bat_addrs[b].start);
- return 0;
-}
-
-/*
- * Return VA for a given PA or 0 if not mapped
- */
-unsigned long p_mapped_by_bats(unsigned long pa)
-{
- int b;
- for (b = 0; b < 4; ++b)
- if (pa >= bat_addrs[b].phys
- && pa < (bat_addrs[b].limit-bat_addrs[b].start)
- +bat_addrs[b].phys)
- return bat_addrs[b].start+(pa-bat_addrs[b].phys);
- return 0;
-}
-
-unsigned long __init mmu_mapin_ram(void)
-{
- unsigned long tot, bl, done;
- unsigned long max_size = (256<<20);
- unsigned long align;
-
- if (__map_without_bats)
- return 0;
-
- /* Set up BAT2 and if necessary BAT3 to cover RAM. */
-
- /* Make sure we don't map a block larger than the
- smallest alignment of the physical address. */
- /* alignment of PPC_MEMSTART */
- align = ~(PPC_MEMSTART-1) & PPC_MEMSTART;
- /* set BAT block size to MIN(max_size, align) */
- if (align && align < max_size)
- max_size = align;
-
- tot = total_lowmem;
- for (bl = 128<<10; bl < max_size; bl <<= 1) {
- if (bl * 2 > tot)
- break;
- }
-
- setbat(2, KERNELBASE, PPC_MEMSTART, bl, _PAGE_RAM);
- done = (unsigned long)bat_addrs[2].limit - KERNELBASE + 1;
- if ((done < tot) && !bat_addrs[3].limit) {
- /* use BAT3 to cover a bit more */
- tot -= done;
- for (bl = 128<<10; bl < max_size; bl <<= 1)
- if (bl * 2 > tot)
- break;
- setbat(3, KERNELBASE+done, PPC_MEMSTART+done, bl, _PAGE_RAM);
- done = (unsigned long)bat_addrs[3].limit - KERNELBASE + 1;
- }
-
- return done;
-}
-
-/*
- * Set up one of the I/D BAT (block address translation) register pairs.
- * The parameters are not checked; in particular size must be a power
- * of 2 between 128k and 256M.
- */
-void __init setbat(int index, unsigned long virt, unsigned long phys,
- unsigned int size, int flags)
-{
- unsigned int bl;
- int wimgxpp;
- union ubat *bat = BATS[index];
-
- if (((flags & _PAGE_NO_CACHE) == 0) &&
- cpu_has_feature(CPU_FTR_NEED_COHERENT))
- flags |= _PAGE_COHERENT;
-
- bl = (size >> 17) - 1;
- if (PVR_VER(mfspr(SPRN_PVR)) != 1) {
- /* 603, 604, etc. */
- /* Do DBAT first */
- wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
- | _PAGE_COHERENT | _PAGE_GUARDED);
- wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
- bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
- bat[1].word[1] = phys | wimgxpp;
-#ifndef CONFIG_KGDB /* want user access for breakpoints */
- if (flags & _PAGE_USER)
-#endif
- bat[1].bat.batu.vp = 1;
- if (flags & _PAGE_GUARDED) {
- /* G bit must be zero in IBATs */
- bat[0].word[0] = bat[0].word[1] = 0;
- } else {
- /* make IBAT same as DBAT */
- bat[0] = bat[1];
- }
- } else {
- /* 601 cpu */
- if (bl > BL_8M)
- bl = BL_8M;
- wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
- | _PAGE_COHERENT);
- wimgxpp |= (flags & _PAGE_RW)?
- ((flags & _PAGE_USER)? PP_RWRW: PP_RWXX): PP_RXRX;
- bat->word[0] = virt | wimgxpp | 4; /* Ks=0, Ku=1 */
- bat->word[1] = phys | bl | 0x40; /* V=1 */
- }
-
- bat_addrs[index].start = virt;
- bat_addrs[index].limit = virt + ((bl + 1) << 17) - 1;
- bat_addrs[index].phys = phys;
-}
-
-/*
- * Initialize the hash table and patch the instructions in hashtable.S.
- */
-void __init MMU_init_hw(void)
-{
- unsigned int hmask, mb, mb2;
- unsigned int n_hpteg, lg_n_hpteg;
-
- extern unsigned int hash_page_patch_A[];
- extern unsigned int hash_page_patch_B[], hash_page_patch_C[];
- extern unsigned int hash_page[];
- extern unsigned int flush_hash_patch_A[], flush_hash_patch_B[];
-
- if (!cpu_has_feature(CPU_FTR_HPTE_TABLE)) {
- /*
- * Put a blr (procedure return) instruction at the
- * start of hash_page, since we can still get DSI
- * exceptions on a 603.
- */
- hash_page[0] = 0x4e800020;
- flush_icache_range((unsigned long) &hash_page[0],
- (unsigned long) &hash_page[1]);
- return;
- }
-
- if ( ppc_md.progress ) ppc_md.progress("hash:enter", 0x105);
-
-#define LG_HPTEG_SIZE 6 /* 64 bytes per HPTEG */
-#define SDR1_LOW_BITS ((n_hpteg - 1) >> 10)
-#define MIN_N_HPTEG 1024 /* min 64kB hash table */
-
- /*
- * Allow 1 HPTE (1/8 HPTEG) for each page of memory.
- * This is less than the recommended amount, but then
- * Linux ain't AIX.
- */
- n_hpteg = total_memory / (PAGE_SIZE * 8);
- if (n_hpteg < MIN_N_HPTEG)
- n_hpteg = MIN_N_HPTEG;
- lg_n_hpteg = __ilog2(n_hpteg);
- if (n_hpteg & (n_hpteg - 1)) {
- ++lg_n_hpteg; /* round up if not power of 2 */
- n_hpteg = 1 << lg_n_hpteg;
- }
- Hash_size = n_hpteg << LG_HPTEG_SIZE;
-
- /*
- * Find some memory for the hash table.
- */
- if ( ppc_md.progress ) ppc_md.progress("hash:find piece", 0x322);
- Hash = mem_pieces_find(Hash_size, Hash_size);
- cacheable_memzero(Hash, Hash_size);
- _SDR1 = __pa(Hash) | SDR1_LOW_BITS;
-
- Hash_end = (PTE *) ((unsigned long)Hash + Hash_size);
-
- printk("Total memory = %ldMB; using %ldkB for hash table (at %p)\n",
- total_memory >> 20, Hash_size >> 10, Hash);
-
-
- /*
- * Patch up the instructions in hashtable.S:create_hpte
- */
- if ( ppc_md.progress ) ppc_md.progress("hash:patch", 0x345);
- Hash_mask = n_hpteg - 1;
- hmask = Hash_mask >> (16 - LG_HPTEG_SIZE);
- mb2 = mb = 32 - LG_HPTEG_SIZE - lg_n_hpteg;
- if (lg_n_hpteg > 16)
- mb2 = 16 - LG_HPTEG_SIZE;
-
- hash_page_patch_A[0] = (hash_page_patch_A[0] & ~0xffff)
- | ((unsigned int)(Hash) >> 16);
- hash_page_patch_A[1] = (hash_page_patch_A[1] & ~0x7c0) | (mb << 6);
- hash_page_patch_A[2] = (hash_page_patch_A[2] & ~0x7c0) | (mb2 << 6);
- hash_page_patch_B[0] = (hash_page_patch_B[0] & ~0xffff) | hmask;
- hash_page_patch_C[0] = (hash_page_patch_C[0] & ~0xffff) | hmask;
-
- /*
- * Ensure that the locations we've patched have been written
- * out from the data cache and invalidated in the instruction
- * cache, on those machines with split caches.
- */
- flush_icache_range((unsigned long) &hash_page_patch_A[0],
- (unsigned long) &hash_page_patch_C[1]);
-
- /*
- * Patch up the instructions in hashtable.S:flush_hash_page
- */
- flush_hash_patch_A[0] = (flush_hash_patch_A[0] & ~0xffff)
- | ((unsigned int)(Hash) >> 16);
- flush_hash_patch_A[1] = (flush_hash_patch_A[1] & ~0x7c0) | (mb << 6);
- flush_hash_patch_A[2] = (flush_hash_patch_A[2] & ~0x7c0) | (mb2 << 6);
- flush_hash_patch_B[0] = (flush_hash_patch_B[0] & ~0xffff) | hmask;
- flush_icache_range((unsigned long) &flush_hash_patch_A[0],
- (unsigned long) &flush_hash_patch_B[1]);
-
- if ( ppc_md.progress ) ppc_md.progress("hash:done", 0x205);
-}
diff --git a/arch/ppc/mm/tlb.c b/arch/ppc/mm/tlb.c
deleted file mode 100644
index 4ff260b..0000000
--- a/arch/ppc/mm/tlb.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * This file contains the routines for TLB flushing.
- * On machines where the MMU uses a hash table to store virtual to
- * physical translations, these routines flush entries from the
- * hash table also.
- * -- paulus
- *
- * Derived from arch/ppc/mm/init.c:
- * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
- *
- * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
- * and Cort Dougan (PReP) (cort@cs.nmt.edu)
- * Copyright (C) 1996 Paul Mackerras
- * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
- *
- * Derived from "arch/i386/mm/init.c"
- * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/highmem.h>
-#include <linux/pagemap.h>
-#include <asm/tlbflush.h>
-#include <asm/tlb.h>
-
-#include "mmu_decl.h"
-
-/*
- * Called when unmapping pages to flush entries from the TLB/hash table.
- */
-void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, unsigned long addr)
-{
- unsigned long ptephys;
-
- if (Hash != 0) {
- ptephys = __pa(ptep) & PAGE_MASK;
- flush_hash_pages(mm->context.id, addr, ptephys, 1);
- }
-}
-
-/*
- * Called by ptep_set_access_flags, must flush on CPUs for which the
- * DSI handler can't just "fixup" the TLB on a write fault
- */
-void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr)
-{
- if (Hash != 0)
- return;
- _tlbie(addr);
-}
-
-/*
- * Called at the end of a mmu_gather operation to make sure the
- * TLB flush is completely done.
- */
-void tlb_flush(struct mmu_gather *tlb)
-{
- if (Hash == 0) {
- /*
- * 603 needs to flush the whole TLB here since
- * it doesn't use a hash table.
- */
- _tlbia();
- }
-}
-
-/*
- * TLB flushing:
- *
- * - flush_tlb_mm(mm) flushes the specified mm context TLB's
- * - flush_tlb_page(vma, vmaddr) flushes one page
- * - flush_tlb_range(vma, start, end) flushes a range of pages
- * - flush_tlb_kernel_range(start, end) flushes kernel pages
- *
- * since the hardware hash table functions as an extension of the
- * tlb as far as the linux tables are concerned, flush it too.
- * -- Cort
- */
-
-/*
- * 750 SMP is a Bad Idea because the 750 doesn't broadcast all
- * the cache operations on the bus. Hence we need to use an IPI
- * to get the other CPU(s) to invalidate their TLBs.
- */
-#ifdef CONFIG_SMP_750
-#define FINISH_FLUSH smp_send_tlb_invalidate(0)
-#else
-#define FINISH_FLUSH do { } while (0)
-#endif
-
-static void flush_range(struct mm_struct *mm, unsigned long start,
- unsigned long end)
-{
- pmd_t *pmd;
- unsigned long pmd_end;
- int count;
- unsigned int ctx = mm->context.id;
-
- if (Hash == 0) {
- _tlbia();
- return;
- }
- start &= PAGE_MASK;
- if (start >= end)
- return;
- end = (end - 1) | ~PAGE_MASK;
- pmd = pmd_offset(pgd_offset(mm, start), start);
- for (;;) {
- pmd_end = ((start + PGDIR_SIZE) & PGDIR_MASK) - 1;
- if (pmd_end > end)
- pmd_end = end;
- if (!pmd_none(*pmd)) {
- count = ((pmd_end - start) >> PAGE_SHIFT) + 1;
- flush_hash_pages(ctx, start, pmd_val(*pmd), count);
- }
- if (pmd_end == end)
- break;
- start = pmd_end + 1;
- ++pmd;
- }
-}
-
-/*
- * Flush kernel TLB entries in the given range
- */
-void flush_tlb_kernel_range(unsigned long start, unsigned long end)
-{
- flush_range(&init_mm, start, end);
- FINISH_FLUSH;
-}
-
-/*
- * Flush all the (user) entries for the address space described by mm.
- */
-void flush_tlb_mm(struct mm_struct *mm)
-{
- struct vm_area_struct *mp;
-
- if (Hash == 0) {
- _tlbia();
- return;
- }
-
- for (mp = mm->mmap; mp != NULL; mp = mp->vm_next)
- flush_range(mp->vm_mm, mp->vm_start, mp->vm_end);
- FINISH_FLUSH;
-}
-
-void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
-{
- struct mm_struct *mm;
- pmd_t *pmd;
-
- if (Hash == 0) {
- _tlbie(vmaddr);
- return;
- }
- mm = (vmaddr < TASK_SIZE)? vma->vm_mm: &init_mm;
- pmd = pmd_offset(pgd_offset(mm, vmaddr), vmaddr);
- if (!pmd_none(*pmd))
- flush_hash_pages(mm->context.id, vmaddr, pmd_val(*pmd), 1);
- FINISH_FLUSH;
-}
-
-/*
- * For each address in the range, find the pte for the address
- * and check _PAGE_HASHPTE bit; if it is set, find and destroy
- * the corresponding HPTE.
- */
-void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
- unsigned long end)
-{
- flush_range(vma->vm_mm, start, end);
- FINISH_FLUSH;
-}
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
deleted file mode 100644
index 76551b6..0000000
--- a/arch/ppc/platforms/4xx/Kconfig
+++ /dev/null
@@ -1,285 +0,0 @@
-config 4xx
- bool
- depends on 40x || 44x
- default y
-
-config WANT_EARLY_SERIAL
- bool
- select SERIAL_8250
- default n
-
-menu "IBM 4xx options"
- depends on 4xx
-
-choice
- prompt "Machine Type"
- depends on 40x
- default WALNUT
-
-config BUBINGA
- bool "Bubinga"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM 405EP evaluation board.
-
-config CPCI405
- bool "CPCI405"
- help
- This option enables support for the CPCI405 board.
-
-config EP405
- bool "EP405/EP405PC"
- select EMBEDDEDBOOT
- help
- This option enables support for the EP405/EP405PC boards.
-
-config REDWOOD_5
- bool "Redwood-5"
- help
- This option enables support for the IBM STB04 evaluation board.
-
-config REDWOOD_6
- bool "Redwood-6"
- help
- This option enables support for the IBM STBx25xx evaluation board.
-
-config SYCAMORE
- bool "Sycamore"
- help
- This option enables support for the IBM PPC405GPr evaluation board.
-
-config WALNUT
- bool "Walnut"
- help
- This option enables support for the IBM PPC405GP evaluation board.
-
-config XILINX_ML300
- bool "Xilinx-ML300"
- select XILINX_VIRTEX_II_PRO
- select EMBEDDEDBOOT
- help
- This option enables support for the Xilinx ML300 evaluation board.
-
-config XILINX_ML403
- bool "Xilinx-ML403"
- select XILINX_VIRTEX_4_FX
- select EMBEDDEDBOOT
- help
- This option enables support for the Xilinx ML403 evaluation board.
-endchoice
-
-choice
- prompt "Machine Type"
- depends on 44x
- default EBONY
-
-config BAMBOO
- bool "Bamboo"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM PPC440EP evaluation board.
-
-config EBONY
- bool "Ebony"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM PPC440GP evaluation board.
-
-config LUAN
- bool "Luan"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM PPC440SP evaluation board.
-
-config YUCCA
- bool "Yucca"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the AMCC PPC440SPe evaluation board.
-
-config OCOTEA
- bool "Ocotea"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM PPC440GX evaluation board.
-
-config TAISHAN
- bool "Taishan"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the AMCC PPC440GX evaluation board.
-
-endchoice
-
-config EP405PC
- bool "EP405PC Support"
- depends on EP405
-
-
-# It's often necessary to know the specific 4xx processor type.
-# Fortunately, it is impled (so far) from the board type, so we
-# don't need to ask more redundant questions.
-config NP405H
- bool
- depends on ASH
- default y
-
-config 440EP
- bool
- depends on BAMBOO
- select PPC_FPU
- default y
-
-config 440GP
- bool
- depends on EBONY
- default y
-
-config 440GX
- bool
- depends on OCOTEA || TAISHAN
- default y
-
-config 440SP
- bool
- depends on LUAN
- default y
-
-config 440SPE
- bool
- depends on YUCCA
- default y
-
-config 440
- bool
- depends on 440GP || 440SP || 440SPE || 440EP
- default y
-
-config 440A
- bool
- depends on 440GX
- default y
-
-config IBM440EP_ERR42
- bool
- depends on 440EP
- default y
-
-# All 405-based cores up until the 405GPR and 405EP have this errata.
-config IBM405_ERR77
- bool
- depends on 40x && !403GCX && !405GPR && !405EP
- default y
-
-# All 40x-based cores, up until the 405GPR and 405EP have this errata.
-config IBM405_ERR51
- bool
- depends on 40x && !405GPR && !405EP
- default y
-
-config BOOKE
- bool
- depends on 44x
- default y
-
-config IBM_OCP
- bool
- depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT
- default y
-
-config IBM_EMAC4
- bool
- depends on 440GX || 440SP || 440SPE
- default y
-
-config BIOS_FIXUP
- bool
- depends on BUBINGA || EP405 || SYCAMORE || WALNUT || CPCI405
- default y
-
-# OAK doesn't exist but wanted to keep this around for any future 403GCX boards
-config 403GCX
- bool
- depends on OAK
- default y
-
-config 405EP
- bool
- depends on BUBINGA
- default y
-
-config 405GP
- bool
- depends on CPCI405 || EP405 || WALNUT
- default y
-
-config 405GPR
- bool
- depends on SYCAMORE
- default y
-
-config XILINX_VIRTEX_II_PRO
- bool
- select XILINX_VIRTEX
-
-config XILINX_VIRTEX_4_FX
- bool
- select XILINX_VIRTEX
-
-config XILINX_VIRTEX
- bool
-
-config STB03xxx
- bool
- depends on REDWOOD_5 || REDWOOD_6
- default y
-
-config EMBEDDEDBOOT
- bool
-
-config IBM_OPENBIOS
- bool
- depends on ASH || REDWOOD_5 || REDWOOD_6
- default y
-
-config PPC4xx_DMA
- bool "PPC4xx DMA controller support"
- depends on 4xx
-
-config PPC4xx_EDMA
- bool
- depends on !STB03xxx && PPC4xx_DMA
- default y
-
-config PPC_GEN550
- bool
- depends on 4xx
- default y
-
-choice
- prompt "TTYS0 device and default console"
- depends on 40x
- default UART0_TTYS0
-
-config UART0_TTYS0
- bool "UART0"
-
-config UART0_TTYS1
- bool "UART1"
-
-endchoice
-
-config SERIAL_SICC
- bool "SICC Serial port support"
- depends on STB03xxx
-
-config UART1_DFLT_CONSOLE
- bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-
-config SERIAL_SICC_CONSOLE
- bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-endmenu
diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile
deleted file mode 100644
index 723ad79..0000000
--- a/arch/ppc/platforms/4xx/Makefile
+++ /dev/null
@@ -1,31 +0,0 @@
-#
-# Makefile for the PowerPC 4xx linux kernel.
-
-obj-$(CONFIG_BAMBOO) += bamboo.o
-obj-$(CONFIG_CPCI405) += cpci405.o
-obj-$(CONFIG_EBONY) += ebony.o
-obj-$(CONFIG_EP405) += ep405.o
-obj-$(CONFIG_BUBINGA) += bubinga.o
-obj-$(CONFIG_LUAN) += luan.o
-obj-$(CONFIG_YUCCA) += yucca.o
-obj-$(CONFIG_OCOTEA) += ocotea.o
-obj-$(CONFIG_REDWOOD_5) += redwood5.o
-obj-$(CONFIG_REDWOOD_6) += redwood6.o
-obj-$(CONFIG_SYCAMORE) += sycamore.o
-obj-$(CONFIG_TAISHAN) += taishan.o
-obj-$(CONFIG_WALNUT) += walnut.o
-obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o
-obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o
-
-obj-$(CONFIG_405GP) += ibm405gp.o
-obj-$(CONFIG_REDWOOD_5) += ibmstb4.o
-obj-$(CONFIG_NP405H) += ibmnp405h.o
-obj-$(CONFIG_REDWOOD_6) += ibmstbx25.o
-obj-$(CONFIG_440EP) += ibm440ep.o
-obj-$(CONFIG_440GP) += ibm440gp.o
-obj-$(CONFIG_440GX) += ibm440gx.o
-obj-$(CONFIG_440SP) += ibm440sp.o
-obj-$(CONFIG_440SPE) += ppc440spe.o
-obj-$(CONFIG_405EP) += ibm405ep.o
-obj-$(CONFIG_405GPR) += ibm405gpr.o
-
diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c
deleted file mode 100644
index 01f20f4..0000000
--- a/arch/ppc/platforms/4xx/bamboo.c
+++ /dev/null
@@ -1,442 +0,0 @@
-/*
- * Bamboo board specific routines
- *
- * Wade Farnsworth <wfarnsworth@mvista.com>
- * Copyright 2004 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/blkdev.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/initrd.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <linux/ethtool.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/ocp.h>
-#include <asm/pci-bridge.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/ppcboot.h>
-
-#include <syslib/gen550.h>
-#include <syslib/ibm440gx_common.h>
-
-extern bd_t __res;
-
-static struct ibm44x_clocks clocks __initdata;
-
-/*
- * Bamboo external IRQ triggering/polarity settings
- */
-unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: Ethernet transceiver */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ1: Expansion connector */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2: PCI slot 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ3: PCI slot 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ4: PCI slot 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ5: PCI slot 3 */
- (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ6: SMI pushbutton */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ7: EXT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ8: EXT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ9: EXT */
-};
-
-static void __init
-bamboo_calibrate_decr(void)
-{
- unsigned int freq;
-
- if (mfspr(SPRN_CCR1) & CCR1_TCS)
- freq = BAMBOO_TMRCLK;
- else
- freq = clocks.cpu;
-
- ibm44x_calibrate_decr(freq);
-
-}
-
-static int
-bamboo_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: IBM\n");
- seq_printf(m, "machine\t\t: PPC440EP EVB (Bamboo)\n");
-
- return 0;
-}
-
-static inline int
-bamboo_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 28, 28, 28, 28 }, /* IDSEL 1 - PCI Slot 0 */
- { 27, 27, 27, 27 }, /* IDSEL 2 - PCI Slot 1 */
- { 26, 26, 26, 26 }, /* IDSEL 3 - PCI Slot 2 */
- { 25, 25, 25, 25 }, /* IDSEL 4 - PCI Slot 3 */
- };
-
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static void __init bamboo_set_emacdata(void)
-{
- u8 * base_addr;
- struct ocp_def *def;
- struct ocp_func_emac_data *emacdata;
- u8 val;
- int mode;
- u32 excluded = 0;
-
- base_addr = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);
- val = readb(base_addr);
- iounmap((void *) base_addr);
- if (BAMBOO_SEL_MII(val))
- mode = PHY_MODE_MII;
- else if (BAMBOO_SEL_RMII(val))
- mode = PHY_MODE_RMII;
- else
- mode = PHY_MODE_SMII;
-
- /*
- * SW2 on the Bamboo is used for ethernet configuration and is accessed
- * via the CONFIG2 register in the FPGA. If the ANEG pin is set,
- * overwrite the supported features with the settings in SW2.
- *
- * This is used as a workaround for the improperly biased RJ-45 sockets
- * on the Rev. 0 Bamboo. By default only 10baseT is functional.
- * Removing inductors L17 and L18 from the board allows 100baseT, but
- * disables 10baseT. The Rev. 1 has no such limitations.
- */
-
- base_addr = ioremap64(BAMBOO_FPGA_CONFIG2_REG_ADDR, 8);
- val = readb(base_addr);
- iounmap((void *) base_addr);
- if (!BAMBOO_AUTONEGOTIATE(val)) {
- excluded |= SUPPORTED_Autoneg;
- if (BAMBOO_FORCE_100Mbps(val)) {
- excluded |= SUPPORTED_10baseT_Full;
- excluded |= SUPPORTED_10baseT_Half;
- if (BAMBOO_FULL_DUPLEX_EN(val))
- excluded |= SUPPORTED_100baseT_Half;
- else
- excluded |= SUPPORTED_100baseT_Full;
- } else {
- excluded |= SUPPORTED_100baseT_Full;
- excluded |= SUPPORTED_100baseT_Half;
- if (BAMBOO_FULL_DUPLEX_EN(val))
- excluded |= SUPPORTED_10baseT_Half;
- else
- excluded |= SUPPORTED_10baseT_Full;
- }
- }
-
- /* Set mac_addr, phy mode and unsupported phy features for each EMAC */
-
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
- emacdata = def->additions;
- memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
- emacdata->phy_mode = mode;
- emacdata->phy_feat_exc = excluded;
-
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);
- emacdata = def->additions;
- memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
- emacdata->phy_mode = mode;
- emacdata->phy_feat_exc = excluded;
-}
-
-static int
-bamboo_exclude_device(unsigned char bus, unsigned char devfn)
-{
- return (bus == 0 && devfn == 0);
-}
-
-#define PCI_READW(offset) \
- (readw((void *)((u32)pci_reg_base+offset)))
-
-#define PCI_WRITEW(value, offset) \
- (writew(value, (void *)((u32)pci_reg_base+offset)))
-
-#define PCI_WRITEL(value, offset) \
- (writel(value, (void *)((u32)pci_reg_base+offset)))
-
-static void __init
-bamboo_setup_pci(void)
-{
- void *pci_reg_base;
- unsigned long memory_size;
- memory_size = ppc_md.find_end_of_memory();
-
- pci_reg_base = ioremap64(BAMBOO_PCIL0_BASE, BAMBOO_PCIL0_SIZE);
-
- /* Enable PCI I/O, Mem, and Busmaster cycles */
- PCI_WRITEW(PCI_READW(PCI_COMMAND) |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER, PCI_COMMAND);
-
- /* Disable region first */
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM0MA);
-
- /* PLB starting addr: 0x00000000A0000000 */
- PCI_WRITEL(BAMBOO_PCI_PHY_MEM_BASE, BAMBOO_PCIL0_PMM0LA);
-
- /* PCI start addr, 0xA0000000 (PCI Address) */
- PCI_WRITEL(BAMBOO_PCI_MEM_BASE, BAMBOO_PCIL0_PMM0PCILA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM0PCIHA);
-
- /* Enable no pre-fetch, enable region */
- PCI_WRITEL(((0xffffffff -
- (BAMBOO_PCI_UPPER_MEM - BAMBOO_PCI_MEM_BASE)) | 0x01),
- BAMBOO_PCIL0_PMM0MA);
-
- /* Disable region one */
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM1LA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCILA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCIHA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA);
-
- /* Disable region two */
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM2LA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCILA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCIHA);
- PCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA);
-
- /* Now configure the PCI->PLB windows, we only use PTM1
- *
- * For Inbound flow, set the window size to all available memory
- * This is required because if size is smaller,
- * then Eth/PCI DD would fail as PCI card not able to access
- * the memory allocated by DD.
- */
-
- PCI_WRITEL(0, BAMBOO_PCIL0_PTM1MS); /* disabled region 1 */
- PCI_WRITEL(0, BAMBOO_PCIL0_PTM1LA); /* begin of address map */
-
- memory_size = 1 << fls(memory_size - 1);
-
- /* Size low + Enabled */
- PCI_WRITEL((0xffffffff - (memory_size - 1)) | 0x1, BAMBOO_PCIL0_PTM1MS);
-
- eieio();
- iounmap(pci_reg_base);
-}
-
-static void __init
-bamboo_setup_hose(void)
-{
- unsigned int bar_response, bar;
- struct pci_controller *hose;
-
- bamboo_setup_pci();
-
- hose = pcibios_alloc_controller();
-
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- hose->pci_mem_offset = BAMBOO_PCI_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource,
- BAMBOO_PCI_LOWER_IO,
- BAMBOO_PCI_UPPER_IO,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0],
- BAMBOO_PCI_LOWER_MEM,
- BAMBOO_PCI_UPPER_MEM,
- IORESOURCE_MEM,
- "PCI host bridge");
-
- ppc_md.pci_exclude_device = bamboo_exclude_device;
-
- hose->io_space.start = BAMBOO_PCI_LOWER_IO;
- hose->io_space.end = BAMBOO_PCI_UPPER_IO;
- hose->mem_space.start = BAMBOO_PCI_LOWER_MEM;
- hose->mem_space.end = BAMBOO_PCI_UPPER_MEM;
- isa_io_base =
- (unsigned long)ioremap64(BAMBOO_PCI_IO_BASE, BAMBOO_PCI_IO_SIZE);
- hose->io_base_virt = (void *)isa_io_base;
-
- setup_indirect_pci(hose,
- BAMBOO_PCI_CFGA_PLB32,
- BAMBOO_PCI_CFGD_PLB32);
- hose->set_cfg_type = 1;
-
- /* Zero config bars */
- for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
- early_write_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- 0x00000000);
- early_read_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- &bar_response);
- }
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = bamboo_map_irq;
-}
-
-TODC_ALLOC();
-
-static void __init
-bamboo_early_serial_map(void)
-{
- struct uart_port port;
-
- /* Setup ioremapped serial port access */
- memset(&port, 0, sizeof(port));
- port.membase = ioremap64(PPC440EP_UART0_ADDR, 8);
- port.irq = 0;
- port.uartclk = clocks.uart0;
- port.regshift = 0;
- port.iotype = UPIO_MEM;
- port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- port.line = 0;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 0 failed\n");
- }
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(0, &port);
-#endif
-
- port.membase = ioremap64(PPC440EP_UART1_ADDR, 8);
- port.irq = 1;
- port.uartclk = clocks.uart1;
- port.line = 1;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 1 failed\n");
- }
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(1, &port);
-#endif
-
- port.membase = ioremap64(PPC440EP_UART2_ADDR, 8);
- port.irq = 3;
- port.uartclk = clocks.uart2;
- port.line = 2;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 2 failed\n");
- }
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(2, &port);
-#endif
-
- port.membase = ioremap64(PPC440EP_UART3_ADDR, 8);
- port.irq = 4;
- port.uartclk = clocks.uart3;
- port.line = 3;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 3 failed\n");
- }
-}
-
-static void __init
-bamboo_setup_arch(void)
-{
-
- bamboo_set_emacdata();
-
- ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
- ocp_sys_info.opb_bus_freq = clocks.opb;
-
- /* Setup TODC access */
- TODC_INIT(TODC_TYPE_DS1743,
- 0,
- 0,
- ioremap64(BAMBOO_RTC_ADDR, BAMBOO_RTC_SIZE),
- 8);
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000/HZ;
-
- /* Setup PCI host bridge */
- bamboo_setup_hose();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- bamboo_early_serial_map();
-
- /* Identify the system */
- printk("IBM Bamboo port (MontaVista Software, Inc. (source@mvista.com))\n");
-}
-
-void __init platform_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7)
-{
- ibm44x_platform_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = bamboo_setup_arch;
- ppc_md.show_cpuinfo = bamboo_show_cpuinfo;
- ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
-
- ppc_md.calibrate_decr = bamboo_calibrate_decr;
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = bamboo_early_serial_map;
-#endif
-}
-
diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bamboo.h
deleted file mode 100644
index dcd3d09..0000000
--- a/arch/ppc/platforms/4xx/bamboo.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Bamboo board definitions
- *
- * Wade Farnsworth <wfarnsworth@mvista.com>
- *
- * Copyright 2004 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_BAMBOO_H__
-#define __ASM_BAMBOO_H__
-
-#include <platforms/4xx/ibm440ep.h>
-
-/* F/W TLB mapping used in bootloader glue to reset EMAC */
-#define PPC44x_EMAC0_MR0 0x0EF600E00
-
-/* Location of MAC addresses in PIBS image */
-#define PIBS_FLASH_BASE 0xfff00000
-#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0xc0400)
-#define PIBS_MAC_SIZE 0x200
-#define PIBS_MAC_OFFSET 0x100
-
-/* Default clock rate */
-#define BAMBOO_TMRCLK 25000000
-
-/* RTC/NVRAM location */
-#define BAMBOO_RTC_ADDR 0x080000000ULL
-#define BAMBOO_RTC_SIZE 0x2000
-
-/* FPGA Registers */
-#define BAMBOO_FPGA_ADDR 0x080002000ULL
-
-#define BAMBOO_FPGA_CONFIG2_REG_ADDR (BAMBOO_FPGA_ADDR + 0x1)
-#define BAMBOO_FULL_DUPLEX_EN(x) (x & 0x08)
-#define BAMBOO_FORCE_100Mbps(x) (x & 0x04)
-#define BAMBOO_AUTONEGOTIATE(x) (x & 0x02)
-
-#define BAMBOO_FPGA_SETTING_REG_ADDR (BAMBOO_FPGA_ADDR + 0x3)
-#define BAMBOO_BOOT_SMALL_FLASH(x) (!(x & 0x80))
-#define BAMBOO_LARGE_FLASH_EN(x) (!(x & 0x40))
-#define BAMBOO_BOOT_NAND_FLASH(x) (!(x & 0x20))
-
-#define BAMBOO_FPGA_SELECTION1_REG_ADDR (BAMBOO_FPGA_ADDR + 0x4)
-#define BAMBOO_SEL_MII(x) (x & 0x80)
-#define BAMBOO_SEL_RMII(x) (x & 0x40)
-#define BAMBOO_SEL_SMII(x) (x & 0x20)
-
-/* Flash */
-#define BAMBOO_SMALL_FLASH_LOW 0x087f00000ULL
-#define BAMBOO_SMALL_FLASH_HIGH 0x0fff00000ULL
-#define BAMBOO_SMALL_FLASH_SIZE 0x100000
-#define BAMBOO_LARGE_FLASH_LOW 0x087800000ULL
-#define BAMBOO_LARGE_FLASH_HIGH1 0x0ff800000ULL
-#define BAMBOO_LARGE_FLASH_HIGH2 0x0ffc00000ULL
-#define BAMBOO_LARGE_FLASH_SIZE 0x400000
-#define BAMBOO_SRAM_LOW 0x087f00000ULL
-#define BAMBOO_SRAM_HIGH1 0x0fff00000ULL
-#define BAMBOO_SRAM_HIGH2 0x0ff800000ULL
-#define BAMBOO_SRAM_SIZE 0x100000
-#define BAMBOO_NAND_FLASH_REG_ADDR 0x090000000ULL
-#define BAMBOO_NAND_FLASH_REG_SIZE 0x2000
-
-/*
- * Serial port defines
- */
-#define RS_TABLE_SIZE 4
-
-#define UART0_IO_BASE 0xEF600300
-#define UART1_IO_BASE 0xEF600400
-#define UART2_IO_BASE 0xEF600500
-#define UART3_IO_BASE 0xEF600600
-
-#define BASE_BAUD 33177600/3/16
-#define UART0_INT 0
-#define UART1_INT 1
-#define UART2_INT 3
-#define UART3_INT 4
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (void*)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1) \
- STD_UART_OP(2) \
- STD_UART_OP(3)
-
-/* PCI support */
-#define BAMBOO_PCI_CFGA_PLB32 0xeec00000
-#define BAMBOO_PCI_CFGD_PLB32 0xeec00004
-
-#define BAMBOO_PCI_IO_BASE 0x00000000e8000000ULL
-#define BAMBOO_PCI_IO_SIZE 0x00010000
-#define BAMBOO_PCI_MEM_OFFSET 0x00000000
-#define BAMBOO_PCI_PHY_MEM_BASE 0x00000000a0000000ULL
-
-#define BAMBOO_PCI_LOWER_IO 0x00000000
-#define BAMBOO_PCI_UPPER_IO 0x0000ffff
-#define BAMBOO_PCI_LOWER_MEM 0xa0000000
-#define BAMBOO_PCI_UPPER_MEM 0xafffffff
-#define BAMBOO_PCI_MEM_BASE 0xa0000000
-
-#define BAMBOO_PCIL0_BASE 0x00000000ef400000ULL
-#define BAMBOO_PCIL0_SIZE 0x40
-
-#define BAMBOO_PCIL0_PMM0LA 0x000
-#define BAMBOO_PCIL0_PMM0MA 0x004
-#define BAMBOO_PCIL0_PMM0PCILA 0x008
-#define BAMBOO_PCIL0_PMM0PCIHA 0x00C
-#define BAMBOO_PCIL0_PMM1LA 0x010
-#define BAMBOO_PCIL0_PMM1MA 0x014
-#define BAMBOO_PCIL0_PMM1PCILA 0x018
-#define BAMBOO_PCIL0_PMM1PCIHA 0x01C
-#define BAMBOO_PCIL0_PMM2LA 0x020
-#define BAMBOO_PCIL0_PMM2MA 0x024
-#define BAMBOO_PCIL0_PMM2PCILA 0x028
-#define BAMBOO_PCIL0_PMM2PCIHA 0x02C
-#define BAMBOO_PCIL0_PTM1MS 0x030
-#define BAMBOO_PCIL0_PTM1LA 0x034
-#define BAMBOO_PCIL0_PTM2MS 0x038
-#define BAMBOO_PCIL0_PTM2LA 0x03C
-
-#endif /* __ASM_BAMBOO_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/bubinga.c b/arch/ppc/platforms/4xx/bubinga.c
deleted file mode 100644
index cd696be..0000000
--- a/arch/ppc/platforms/4xx/bubinga.c
+++ /dev/null
@@ -1,265 +0,0 @@
-/*
- * Support for IBM PPC 405EP evaluation board (Bubinga).
- *
- * Author: SAW (IBM), derived from walnut.c.
- * Maintained by MontaVista Software <source@mvista.com>
- *
- * 2003 (c) MontaVista Softare Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/threads.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/blkdev.h>
-#include <linux/pci.h>
-#include <linux/rtc.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/system.h>
-#include <asm/pci-bridge.h>
-#include <asm/processor.h>
-#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/todc.h>
-#include <asm/kgdb.h>
-#include <asm/ocp.h>
-#include <asm/ibm_ocp_pci.h>
-
-#include <platforms/4xx/ibm405ep.h>
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-extern bd_t __res;
-
-void *bubinga_rtc_base;
-
-/* Some IRQs unique to the board
- * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
- */
-int __init
-ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */
- {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */
- {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */
- {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */
- };
-
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-};
-
-/* The serial clock for the chip is an internal clock determined by
- * different clock speeds/dividers.
- * Calculate the proper input baud rate and setup the serial driver.
- */
-static void __init
-bubinga_early_serial_map(void)
-{
- u32 uart_div;
- int uart_clock;
- struct uart_port port;
-
- /* Calculate the serial clock input frequency
- *
- * The base baud is the PLL OUTA (provided in the board info
- * structure) divided by the external UART Divisor, divided
- * by 16.
- */
- uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);
- uart_clock = __res.bi_procfreq / uart_div;
-
- /* Setup serial port access */
- memset(&port, 0, sizeof(port));
- port.membase = (void*)ACTING_UART0_IO_BASE;
- port.irq = ACTING_UART0_INT;
- port.uartclk = uart_clock;
- port.regshift = 0;
- port.iotype = UPIO_MEM;
- port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- port.line = 0;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 0 failed\n");
- }
-
- port.membase = (void*)ACTING_UART1_IO_BASE;
- port.irq = ACTING_UART1_INT;
- port.line = 1;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 1 failed\n");
- }
-}
-
-void __init
-bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
-{
-#ifdef CONFIG_PCI
-
- unsigned int bar_response, bar;
- /*
- * Expected PCI mapping:
- *
- * PLB addr PCI memory addr
- * --------------------- ---------------------
- * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
- * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
- *
- * PLB addr PCI io addr
- * --------------------- ---------------------
- * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
- *
- * The following code is simplified by assuming that the bootrom
- * has been well behaved in following this mapping.
- */
-
-#ifdef DEBUG
- int i;
-
- printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
- printk("PCI bridge regs before fixup \n");
- for (i = 0; i <= 3; i++) {
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
- }
- printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
- printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
- printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
- printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
-
-#endif
-
- /* added for IBM boot rom version 1.15 bios bar changes -AK */
-
- /* Disable region first */
- out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
- /* PLB starting addr, PCI: 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
- /* PCI start addr, 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
- /* 512MB range of PLB to PCI */
- out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
- /* Enable no pre-fetch, enable region */
- out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
- (PPC405_PCI_UPPER_MEM -
- PPC405_PCI_MEM_BASE)) | 0x01));
-
- /* Disable region one */
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->ptm1ms), 0x00000001);
-
- /* Disable region two */
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->ptm2ms), 0x00000000);
- out_le32((void *) &(pcip->ptm2la), 0x00000000);
-
- /* Zero config bars */
- for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
- early_write_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- 0x00000000);
- early_read_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- &bar_response);
- DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
- hose->first_busno, PCI_SLOT(hose->first_busno),
- PCI_FUNC(hose->first_busno), bar, bar_response);
- }
- /* end workaround */
-
-#ifdef DEBUG
- printk("PCI bridge regs after fixup \n");
- for (i = 0; i <= 3; i++) {
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
- }
- printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
- printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
- printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
- printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
-
-#endif
-#endif
-}
-
-void __init
-bubinga_setup_arch(void)
-{
- ppc4xx_setup_arch();
-
- ibm_ocp_set_emac(0, 1);
-
- bubinga_early_serial_map();
-
- /* RTC step for the evb405ep */
- bubinga_rtc_base = (void *) BUBINGA_RTC_VADDR;
- TODC_INIT(TODC_TYPE_DS1743, bubinga_rtc_base, bubinga_rtc_base,
- bubinga_rtc_base, 8);
- /* Identify the system */
- printk("IBM Bubinga port (MontaVista Software, Inc. <source@mvista.com>)\n");
-}
-
-void __init
-bubinga_map_io(void)
-{
- ppc4xx_map_io();
- io_block_mapping(BUBINGA_RTC_VADDR,
- BUBINGA_RTC_PADDR, BUBINGA_RTC_SIZE, _PAGE_IO);
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = bubinga_setup_arch;
- ppc_md.setup_io_mappings = bubinga_map_io;
-
-#ifdef CONFIG_GEN_RTC
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-#endif
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = bubinga_early_serial_map;
-#endif
-}
-
diff --git a/arch/ppc/platforms/4xx/bubinga.h b/arch/ppc/platforms/4xx/bubinga.h
deleted file mode 100644
index 5c40806..0000000
--- a/arch/ppc/platforms/4xx/bubinga.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Bubinga board definitions
- *
- * Copyright (c) 2005 DENX Software Engineering
- * Stefan Roese <sr@denx.de>
- *
- * Based on original work by
- * SAW (IBM)
- * 2003 (c) MontaVista Softare Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __BUBINGA_H__
-#define __BUBINGA_H__
-
-#include <platforms/4xx/ibm405ep.h>
-#include <asm/ppcboot.h>
-
-/* Memory map for the Bubinga board.
- * Generic 4xx plus RTC.
- */
-
-#define BUBINGA_RTC_PADDR ((uint)0xf0000000)
-#define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR
-#define BUBINGA_RTC_SIZE ((uint)8*1024)
-
-/* The UART clock is based off an internal clock -
- * define BASE_BAUD based on the internal clock and divider(s).
- * Since BASE_BAUD must be a constant, we will initialize it
- * using clock/divider values which OpenBIOS initializes
- * for typical configurations at various CPU speeds.
- * The base baud is calculated as (FWDA / EXT UART DIV / 16)
- */
-#define BASE_BAUD 0
-
-/* Flash */
-#define PPC40x_FPGA_BASE 0xF0300000
-#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */
-#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
-#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
-#define PPC40x_FLASH_LOW 0xFFF00000
-#define PPC40x_FLASH_HIGH 0xFFF80000
-#define PPC40x_FLASH_SIZE 0x80000
-
-#define PPC4xx_MACHINE_NAME "IBM Bubinga"
-
-#endif /* __BUBINGA_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/cpci405.c b/arch/ppc/platforms/4xx/cpci405.c
deleted file mode 100644
index 2e7e25d..0000000
--- a/arch/ppc/platforms/4xx/cpci405.c
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * Board setup routines for the esd CPCI-405 cPCI Board.
- *
- * Copyright 2001-2006 esd electronic system design - hannover germany
- *
- * Authors: Matthias Fuchs
- * matthias.fuchs@esd-electronics.com
- * Stefan Roese
- * stefan.roese@esd-electronics.com
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/system.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-#include <asm/todc.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <asm/ocp.h>
-#include <asm/ibm_ocp_pci.h>
-#include <platforms/4xx/ibm405gp.h>
-
-#ifdef CONFIG_GEN_RTC
-void *cpci405_nvram;
-#endif
-
-extern bd_t __res;
-
-/*
- * Some IRQs unique to CPCI-405.
- */
-int __init
-ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {28, 29, 30, 27}, /* IDSEL 15 - cPCI slot 8 */
- {29, 30, 27, 28}, /* IDSEL 16 - cPCI slot 7 */
- {30, 27, 28, 29}, /* IDSEL 17 - cPCI slot 6 */
- {27, 28, 29, 30}, /* IDSEL 18 - cPCI slot 5 */
- {28, 29, 30, 27}, /* IDSEL 19 - cPCI slot 4 */
- {29, 30, 27, 28}, /* IDSEL 20 - cPCI slot 3 */
- {30, 27, 28, 29}, /* IDSEL 21 - cPCI slot 2 */
- };
- const long min_idsel = 15, max_idsel = 21, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-};
-
-/* The serial clock for the chip is an internal clock determined by
- * different clock speeds/dividers.
- * Calculate the proper input baud rate and setup the serial driver.
- */
-static void __init
-cpci405_early_serial_map(void)
-{
- u32 uart_div;
- int uart_clock;
- struct uart_port port;
-
- /* Calculate the serial clock input frequency
- *
- * The uart clock is the cpu frequency (provided in the board info
- * structure) divided by the external UART Divisor.
- */
- uart_div = ((mfdcr(DCRN_CHCR_BASE) & CHR0_UDIV) >> 1) + 1;
- uart_clock = __res.bi_procfreq / uart_div;
-
- /* Setup serial port access */
- memset(&port, 0, sizeof(port));
-#if defined(CONFIG_UART0_TTYS0)
- port.membase = (void*)UART0_IO_BASE;
- port.irq = UART0_INT;
-#else
- port.membase = (void*)UART1_IO_BASE;
- port.irq = UART1_INT;
-#endif
- port.uartclk = uart_clock;
- port.regshift = 0;
- port.iotype = UPIO_MEM;
- port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- port.line = 0;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 0 failed\n");
- }
-#if defined(CONFIG_UART0_TTYS0)
- port.membase = (void*)UART1_IO_BASE;
- port.irq = UART1_INT;
-#else
- port.membase = (void*)UART0_IO_BASE;
- port.irq = UART0_INT;
-#endif
- port.line = 1;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 1 failed\n");
- }
-}
-
-void __init
-cpci405_setup_arch(void)
-{
- ppc4xx_setup_arch();
-
- ibm_ocp_set_emac(0, 0);
-
- cpci405_early_serial_map();
-
-#ifdef CONFIG_GEN_RTC
- TODC_INIT(TODC_TYPE_MK48T35,
- cpci405_nvram, cpci405_nvram, cpci405_nvram, 8);
-#endif
-}
-
-void __init
-bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
-{
-#ifdef CONFIG_PCI
- unsigned int bar_response, bar;
-
- /* Disable region first */
- out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
- /* PLB starting addr, PCI: 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
- /* PCI start addr, 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
- /* 512MB range of PLB to PCI */
- out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
- /* Enable no pre-fetch, enable region */
- out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
- (PPC405_PCI_UPPER_MEM -
- PPC405_PCI_MEM_BASE)) | 0x01));
-
- /* Disable region one */
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->ptm1ms), 0x00000001);
-
- /* Disable region two */
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->ptm2ms), 0x00000000);
- out_le32((void *) &(pcip->ptm2la), 0x00000000);
-
- /* Zero config bars */
- for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
- early_write_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- 0x00000000);
- early_read_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- &bar_response);
- }
-#endif
-}
-
-void __init
-cpci405_map_io(void)
-{
- ppc4xx_map_io();
-
-#ifdef CONFIG_GEN_RTC
- cpci405_nvram = ioremap(CPCI405_NVRAM_PADDR, CPCI405_NVRAM_SIZE);
-#endif
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = cpci405_setup_arch;
- ppc_md.setup_io_mappings = cpci405_map_io;
-
-#ifdef CONFIG_GEN_RTC
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-#endif
-}
diff --git a/arch/ppc/platforms/4xx/cpci405.h b/arch/ppc/platforms/4xx/cpci405.h
deleted file mode 100644
index a6c0a13..0000000
--- a/arch/ppc/platforms/4xx/cpci405.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
- * CPCI-405 board specific definitions
- *
- * Copyright 2001-2006 esd electronic system design - hannover germany
- *
- * Authors: Matthias Fuchs
- * matthias.fuchs@esd-electronics.com
- * Stefan Roese
- * stefan.roese@esd-electronics.com
- */
-
-#ifdef __KERNEL__
-#ifndef __CPCI405_H__
-#define __CPCI405_H__
-
-#include <platforms/4xx/ibm405gp.h>
-#include <asm/ppcboot.h>
-
-/* Map for the NVRAM space */
-#define CPCI405_NVRAM_PADDR ((uint)0xf0200000)
-#define CPCI405_NVRAM_SIZE ((uint)32*1024)
-
-#define BASE_BAUD 0
-
-#define PPC4xx_MACHINE_NAME "esd CPCI-405"
-
-#endif /* __CPCI405_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c
deleted file mode 100644
index 8027a36..0000000
--- a/arch/ppc/platforms/4xx/ebony.c
+++ /dev/null
@@ -1,334 +0,0 @@
-/*
- * Ebony board specific routines
- *
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2002-2005 MontaVista Software Inc.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003-2005 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/blkdev.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/initrd.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/ocp.h>
-#include <asm/pci-bridge.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/ppcboot.h>
-#include <asm/tlbflush.h>
-
-#include <syslib/gen550.h>
-#include <syslib/ibm440gp_common.h>
-
-extern bd_t __res;
-
-static struct ibm44x_clocks clocks __initdata;
-
-/*
- * Ebony external IRQ triggering/polarity settings
- */
-unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: PCI slot 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ1: PCI slot 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2: PCI slot 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ3: PCI slot 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ4: IRDA */
- (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ5: SMI pushbutton */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ6: PHYs */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ7: AUX */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ8: EXT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ9: EXT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ10: EXT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ11: EXT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ12: EXT */
-};
-
-static void __init
-ebony_calibrate_decr(void)
-{
- unsigned int freq;
-
- /*
- * Determine system clock speed
- *
- * If we are on Rev. B silicon, then use
- * default external system clock. If we are
- * on Rev. C silicon then errata forces us to
- * use the internal clock.
- */
- if (strcmp(cur_cpu_spec->cpu_name, "440GP Rev. B") == 0)
- freq = EBONY_440GP_RB_SYSCLK;
- else
- freq = EBONY_440GP_RC_SYSCLK;
-
- ibm44x_calibrate_decr(freq);
-}
-
-static int
-ebony_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: IBM\n");
- seq_printf(m, "machine\t\t: Ebony\n");
-
- return 0;
-}
-
-static inline int
-ebony_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 23, 23, 23, 23 }, /* IDSEL 1 - PCI Slot 0 */
- { 24, 24, 24, 24 }, /* IDSEL 2 - PCI Slot 1 */
- { 25, 25, 25, 25 }, /* IDSEL 3 - PCI Slot 2 */
- { 26, 26, 26, 26 }, /* IDSEL 4 - PCI Slot 3 */
- };
-
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-#define PCIX_WRITEL(value, offset) \
- (writel(value, pcix_reg_base + offset))
-
-/*
- * FIXME: This is only here to "make it work". This will move
- * to a ibm_pcix.c which will contain a generic IBM PCIX bridge
- * configuration library. -Matt
- */
-static void __init
-ebony_setup_pcix(void)
-{
- void __iomem *pcix_reg_base;
-
- pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE);
-
- /* Disable all windows */
- PCIX_WRITEL(0, PCIX0_POM0SA);
- PCIX_WRITEL(0, PCIX0_POM1SA);
- PCIX_WRITEL(0, PCIX0_POM2SA);
- PCIX_WRITEL(0, PCIX0_PIM0SA);
- PCIX_WRITEL(0, PCIX0_PIM1SA);
- PCIX_WRITEL(0, PCIX0_PIM2SA);
-
- /* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */
- PCIX_WRITEL(0x00000003, PCIX0_POM0LAH);
- PCIX_WRITEL(0x80000000, PCIX0_POM0LAL);
- PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH);
- PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL);
- PCIX_WRITEL(0x80000001, PCIX0_POM0SA);
-
- /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
- PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
- PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
- PCIX_WRITEL(0x80000007, PCIX0_PIM0SA);
-
- eieio();
-}
-
-static void __init
-ebony_setup_hose(void)
-{
- struct pci_controller *hose;
-
- /* Configure windows on the PCI-X host bridge */
- ebony_setup_pcix();
-
- hose = pcibios_alloc_controller();
-
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- hose->pci_mem_offset = EBONY_PCI_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource,
- EBONY_PCI_LOWER_IO,
- EBONY_PCI_UPPER_IO,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0],
- EBONY_PCI_LOWER_MEM,
- EBONY_PCI_UPPER_MEM,
- IORESOURCE_MEM,
- "PCI host bridge");
-
- hose->io_space.start = EBONY_PCI_LOWER_IO;
- hose->io_space.end = EBONY_PCI_UPPER_IO;
- hose->mem_space.start = EBONY_PCI_LOWER_MEM;
- hose->mem_space.end = EBONY_PCI_UPPER_MEM;
- hose->io_base_virt = ioremap64(EBONY_PCI_IO_BASE, EBONY_PCI_IO_SIZE);
- isa_io_base = (unsigned long)hose->io_base_virt;
-
- setup_indirect_pci(hose,
- EBONY_PCI_CFGA_PLB32,
- EBONY_PCI_CFGD_PLB32);
- hose->set_cfg_type = 1;
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = ebony_map_irq;
-}
-
-TODC_ALLOC();
-
-static void __init
-ebony_early_serial_map(void)
-{
- struct uart_port port;
-
- /* Setup ioremapped serial port access */
- memset(&port, 0, sizeof(port));
- port.membase = ioremap64(PPC440GP_UART0_ADDR, 8);
- port.irq = 0;
- port.uartclk = clocks.uart0;
- port.regshift = 0;
- port.iotype = UPIO_MEM;
- port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- port.line = 0;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 0 failed\n");
- }
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(0, &port);
-
- /* Purge TLB entry added in head_44x.S for early serial access */
- _tlbie(UART0_IO_BASE, 0);
-#endif
-
- port.membase = ioremap64(PPC440GP_UART1_ADDR, 8);
- port.irq = 1;
- port.uartclk = clocks.uart1;
- port.line = 1;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 1 failed\n");
- }
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(1, &port);
-#endif
-}
-
-static void __init
-ebony_setup_arch(void)
-{
- struct ocp_def *def;
- struct ocp_func_emac_data *emacdata;
-
- /* Set mac_addr for each EMAC */
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
- emacdata = def->additions;
- emacdata->phy_map = 0x00000001; /* Skip 0x00 */
- emacdata->phy_mode = PHY_MODE_RMII;
- memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
-
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);
- emacdata = def->additions;
- emacdata->phy_map = 0x00000001; /* Skip 0x00 */
- emacdata->phy_mode = PHY_MODE_RMII;
- memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
-
- /*
- * Determine various clocks.
- * To be completely correct we should get SysClk
- * from FPGA, because it can be changed by on-board switches
- * --ebs
- */
- ibm440gp_get_clocks(&clocks, 33333333, 6 * 1843200);
- ocp_sys_info.opb_bus_freq = clocks.opb;
-
- /* Setup TODC access */
- TODC_INIT(TODC_TYPE_DS1743,
- 0,
- 0,
- ioremap64(EBONY_RTC_ADDR, EBONY_RTC_SIZE),
- 8);
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000/HZ;
-
- /* Setup PCI host bridge */
- ebony_setup_hose();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- ebony_early_serial_map();
-
- /* Identify the system */
- printk("IBM Ebony port (MontaVista Software, Inc. (source@mvista.com))\n");
-}
-
-void __init platform_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7)
-{
- ibm44x_platform_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = ebony_setup_arch;
- ppc_md.show_cpuinfo = ebony_show_cpuinfo;
- ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
-
- ppc_md.calibrate_decr = ebony_calibrate_decr;
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = ebony_early_serial_map;
-#endif
-}
-
diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h
deleted file mode 100644
index f40e33d..0000000
--- a/arch/ppc/platforms/4xx/ebony.h
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * Ebony board definitions
- *
- * Matt Porter <mporter@mvista.com>
- *
- * Copyright 2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_EBONY_H__
-#define __ASM_EBONY_H__
-
-#include <platforms/4xx/ibm440gp.h>
-
-/* F/W TLB mapping used in bootloader glue to reset EMAC */
-#define PPC44x_EMAC0_MR0 0xE0000800
-
-/* Where to find the MAC info */
-#define OPENBIOS_MAC_BASE 0xfffffe0c
-#define OPENBIOS_MAC_OFFSET 0x0c
-
-/* Default clock rates for Rev. B and Rev. C silicon */
-#define EBONY_440GP_RB_SYSCLK 33000000
-#define EBONY_440GP_RC_SYSCLK 400000000
-
-/* RTC/NVRAM location */
-#define EBONY_RTC_ADDR 0x0000000148000000ULL
-#define EBONY_RTC_SIZE 0x2000
-
-/* Flash */
-#define EBONY_FPGA_ADDR 0x0000000148300000ULL
-#define EBONY_BOOT_SMALL_FLASH(x) (x & 0x20)
-#define EBONY_ONBRD_FLASH_EN(x) (x & 0x02)
-#define EBONY_FLASH_SEL(x) (x & 0x01)
-#define EBONY_SMALL_FLASH_LOW1 0x00000001ff800000ULL
-#define EBONY_SMALL_FLASH_LOW2 0x00000001ff880000ULL
-#define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000ULL
-#define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000ULL
-#define EBONY_SMALL_FLASH_SIZE 0x80000
-#define EBONY_LARGE_FLASH_LOW 0x00000001ff800000ULL
-#define EBONY_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
-#define EBONY_LARGE_FLASH_SIZE 0x400000
-
-#define EBONY_SMALL_FLASH_BASE 0x00000001fff80000ULL
-#define EBONY_LARGE_FLASH_BASE 0x00000001ff800000ULL
-
-/*
- * Serial port defines
- */
-
-#if defined(__BOOTER__)
-/* OpenBIOS defined UART mappings, used by bootloader shim */
-#define UART0_IO_BASE 0xE0000200
-#define UART1_IO_BASE 0xE0000300
-#else
-/* head_44x.S created UART mapping, used before early_serial_setup.
- * We cannot use default OpenBIOS UART mappings because they
- * don't work for configurations with more than 512M RAM. --ebs
- */
-#define UART0_IO_BASE 0xF0000200
-#define UART1_IO_BASE 0xF0000300
-#endif
-
-/* external Epson SG-615P */
-#define BASE_BAUD 691200
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (void*)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-
-/* PCI support */
-#define EBONY_PCI_LOWER_IO 0x00000000
-#define EBONY_PCI_UPPER_IO 0x0000ffff
-#define EBONY_PCI_LOWER_MEM 0x80002000
-#define EBONY_PCI_UPPER_MEM 0xffffefff
-
-#define EBONY_PCI_CFGREGS_BASE 0x000000020ec00000
-#define EBONY_PCI_CFGA_PLB32 0x0ec00000
-#define EBONY_PCI_CFGD_PLB32 0x0ec00004
-
-#define EBONY_PCI_IO_BASE 0x0000000208000000ULL
-#define EBONY_PCI_IO_SIZE 0x00010000
-#define EBONY_PCI_MEM_OFFSET 0x00000000
-
-#endif /* __ASM_EBONY_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ep405.c b/arch/ppc/platforms/4xx/ep405.c
deleted file mode 100644
index 5aa2950..0000000
--- a/arch/ppc/platforms/4xx/ep405.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * Embedded Planet 405GP board
- * http://www.embeddedplanet.com
- *
- * Author: Matthew Locke <mlocke@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <asm/system.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-#include <asm/todc.h>
-#include <asm/ocp.h>
-#include <asm/ibm_ocp_pci.h>
-
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-u8 *ep405_bcsr;
-u8 *ep405_nvram;
-
-static struct {
- u8 cpld_xirq_select;
- int pci_idsel;
- int irq;
-} ep405_devtable[] = {
-#ifdef CONFIG_EP405PC
- {0x07, 0x0E, 25}, /* EP405PC: USB */
-#endif
-};
-
-int __init
-ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- int i;
-
- /* AFAICT this is only called a few times during PCI setup, so
- performance is not critical */
- for (i = 0; i < ARRAY_SIZE(ep405_devtable); i++) {
- if (idsel == ep405_devtable[i].pci_idsel)
- return ep405_devtable[i].irq;
- }
- return -1;
-};
-
-void __init
-ep405_setup_arch(void)
-{
- ppc4xx_setup_arch();
-
- ibm_ocp_set_emac(0, 0);
-
- if (__res.bi_nvramsize == 512*1024) {
- /* FIXME: we should properly handle NVRTCs of different sizes */
- TODC_INIT(TODC_TYPE_DS1557, ep405_nvram, ep405_nvram, ep405_nvram, 8);
- }
-}
-
-void __init
-bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
-{
-#ifdef CONFIG_PCI
- unsigned int bar_response, bar;
- /*
- * Expected PCI mapping:
- *
- * PLB addr PCI memory addr
- * --------------------- ---------------------
- * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
- * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
- *
- * PLB addr PCI io addr
- * --------------------- ---------------------
- * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
- *
- */
-
- /* Disable region zero first */
- out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
- /* PLB starting addr, PCI: 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
- /* PCI start addr, 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
- /* 512MB range of PLB to PCI */
- out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
- /* Enable no pre-fetch, enable region */
- out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
- (PPC405_PCI_UPPER_MEM -
- PPC405_PCI_MEM_BASE)) | 0x01));
-
- /* Disable region one */
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->ptm1ms), 0x00000000);
-
- /* Disable region two */
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->ptm2ms), 0x00000000);
-
- /* Configure PTM (PCI->PLB) region 1 */
- out_le32((void *) &(pcip->ptm1la), 0x00000000); /* PLB base address */
- /* Disable PTM region 2 */
- out_le32((void *) &(pcip->ptm2ms), 0x00000000);
-
- /* Zero config bars */
- for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
- early_write_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- 0x00000000);
- early_read_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- &bar_response);
- DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
- hose->first_busno, PCI_SLOT(hose->first_busno),
- PCI_FUNC(hose->first_busno), bar, bar_response);
- }
- /* end workaround */
-#endif
-}
-
-void __init
-ep405_map_io(void)
-{
- bd_t *bip = &__res;
-
- ppc4xx_map_io();
-
- ep405_bcsr = ioremap(EP405_BCSR_PADDR, EP405_BCSR_SIZE);
-
- if (bip->bi_nvramsize > 0) {
- ep405_nvram = ioremap(EP405_NVRAM_PADDR, bip->bi_nvramsize);
- }
-}
-
-void __init
-ep405_init_IRQ(void)
-{
- int i;
-
- ppc4xx_init_IRQ();
-
- /* Workaround for a bug in the firmware it incorrectly sets
- the IRQ polarities for XIRQ0 and XIRQ1 */
- mtdcr(DCRN_UIC_PR(DCRN_UIC0_BASE), 0xffffff80); /* set the polarity */
- mtdcr(DCRN_UIC_SR(DCRN_UIC0_BASE), 0x00000060); /* clear bogus interrupts */
-
- /* Activate the XIRQs from the CPLD */
- writeb(0xf0, ep405_bcsr+10);
-
- /* Set up IRQ routing */
- for (i = 0; i < ARRAY_SIZE(ep405_devtable); i++) {
- if ( (ep405_devtable[i].irq >= 25)
- && (ep405_devtable[i].irq) <= 31) {
- writeb(ep405_devtable[i].cpld_xirq_select, ep405_bcsr+5);
- writeb(ep405_devtable[i].irq - 25, ep405_bcsr+6);
- }
- }
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = ep405_setup_arch;
- ppc_md.setup_io_mappings = ep405_map_io;
- ppc_md.init_IRQ = ep405_init_IRQ;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-
- if (__res.bi_nvramsize == 512*1024) {
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- } else {
- printk("EP405: NVRTC size is not 512k (not a DS1557). Not sure what to do with it\n");
- }
-}
diff --git a/arch/ppc/platforms/4xx/ep405.h b/arch/ppc/platforms/4xx/ep405.h
deleted file mode 100644
index 9814fc4..0000000
--- a/arch/ppc/platforms/4xx/ep405.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Embedded Planet 405GP board
- * http://www.embeddedplanet.com
- *
- * Author: Matthew Locke <mlocke@mvista.com>
- *
- * 2000 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_EP405_H__
-#define __ASM_EP405_H__
-
-/* We have a 405GP core */
-#include <platforms/4xx/ibm405gp.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-typedef struct board_info {
- unsigned int bi_memsize; /* DRAM installed, in bytes */
- unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
- unsigned int bi_intfreq; /* Processor speed, in Hz */
- unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
- unsigned int bi_nvramsize; /* Size of the NVRAM/RTC */
-} bd_t;
-
-/* Some 4xx parts use a different timebase frequency from the internal clock.
-*/
-#define bi_tbfreq bi_intfreq
-
-extern u8 *ep405_bcsr;
-extern u8 *ep405_nvram;
-
-/* Map for the BCSR and NVRAM space */
-#define EP405_BCSR_PADDR ((uint)0xf4000000)
-#define EP405_BCSR_SIZE ((uint)16)
-#define EP405_NVRAM_PADDR ((uint)0xf4200000)
-
-/* serial defines */
-#define BASE_BAUD 399193
-
-#define PPC4xx_MACHINE_NAME "Embedded Planet 405GP"
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __ASM_EP405_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibm405ep.c b/arch/ppc/platforms/4xx/ibm405ep.c
deleted file mode 100644
index fb3630a..0000000
--- a/arch/ppc/platforms/4xx/ibm405ep.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * Support for IBM PPC 405EP processors.
- *
- * Author: SAW (IBM), derived from ibmnp405l.c.
- * Maintained by MontaVista Software <source@mvista.com>
- *
- * 2003 (c) MontaVista Softare Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/threads.h>
-#include <linux/param.h>
-#include <linux/string.h>
-
-#include <asm/ibm4xx.h>
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-
-#include <platforms/4xx/ibm405ep.h>
-
-static struct ocp_func_mal_data ibm405ep_mal0_def = {
- .num_tx_chans = 4, /* Number of TX channels */
- .num_rx_chans = 2, /* Number of RX channels */
- .txeob_irq = 11, /* TX End Of Buffer IRQ */
- .rxeob_irq = 12, /* RX End Of Buffer IRQ */
- .txde_irq = 13, /* TX Descriptor Error IRQ */
- .rxde_irq = 14, /* RX Descriptor Error IRQ */
- .serr_irq = 10, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_emac_data ibm405ep_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = -1, /* ZMII device index */
- .zmii_mux = 0, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 9, /* WOL interrupt number */
- .mdio_idx = 0, /* MDIO via EMAC0 */
- .tah_idx = -1, /* No TAH */
-};
-
-static struct ocp_func_emac_data ibm405ep_emac1_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = -1, /* ZMII device index */
- .zmii_mux = 0, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 1, /* MAL rx channel number */
- .mal_tx_chan = 2, /* MAL tx channel number */
- .wol_irq = 9, /* WOL interrupt number */
- .mdio_idx = 0, /* MDIO via EMAC0 */
- .tah_idx = -1, /* No TAH */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_iic_data ibm405ep_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_OPB,
- .index = 0,
- .paddr = 0xEF600000,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = UART0_IO_BASE,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = UART1_IO_BASE,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .paddr = 0xEF600500,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ibm405ep_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .paddr = 0xEF600700,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ibm405ep_mal0_def,
- .show = &ocp_show_mal_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = EMAC0_BASE,
- .irq = 15,
- .pm = OCP_CPM_NA,
- .additions = &ibm405ep_emac0_def,
- .show = &ocp_show_emac_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 1,
- .paddr = 0xEF600900,
- .irq = 17,
- .pm = OCP_CPM_NA,
- .additions = &ibm405ep_emac1_def,
- .show = &ocp_show_emac_data
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0xffff7f80,
- .triggering = 0x00000000,
- .ext_irq_mask = 0x0000007f, /* IRQ0 - IRQ6 */
- }
-};
diff --git a/arch/ppc/platforms/4xx/ibm405ep.h b/arch/ppc/platforms/4xx/ibm405ep.h
deleted file mode 100644
index 3ef20a5..0000000
--- a/arch/ppc/platforms/4xx/ibm405ep.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * IBM PPC 405EP processor defines.
- *
- * Author: SAW (IBM), derived from ibm405gp.h.
- * Maintained by MontaVista Software <source@mvista.com>
- *
- * 2003 (c) MontaVista Softare Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBM405EP_H__
-#define __ASM_IBM405EP_H__
-
-
-/* ibm405.h at bottom of this file */
-
-/* PCI
- * PCI Bridge config reg definitions
- * see 17-19 of manual
- */
-
-#define PPC405_PCI_CONFIG_ADDR 0xeec00000
-#define PPC405_PCI_CONFIG_DATA 0xeec00004
-
-#define PPC405_PCI_PHY_MEM_BASE 0x80000000 /* hose_a->pci_mem_offset */
- /* setbat */
-#define PPC405_PCI_MEM_BASE PPC405_PCI_PHY_MEM_BASE /* setbat */
-#define PPC405_PCI_PHY_IO_BASE 0xe8000000 /* setbat */
-#define PPC405_PCI_IO_BASE PPC405_PCI_PHY_IO_BASE /* setbat */
-
-#define PPC405_PCI_LOWER_MEM 0x80000000 /* hose_a->mem_space.start */
-#define PPC405_PCI_UPPER_MEM 0xBfffffff /* hose_a->mem_space.end */
-#define PPC405_PCI_LOWER_IO 0x00000000 /* hose_a->io_space.start */
-#define PPC405_PCI_UPPER_IO 0x0000ffff /* hose_a->io_space.end */
-
-#define PPC405_ISA_IO_BASE PPC405_PCI_IO_BASE
-
-#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE)
-#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR
-#define PPC4xx_PCI_IO_SIZE ((uint)64*1024)
-#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR)
-#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR
-#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024)
-#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000)
-#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR
-#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024)
-#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000)
-#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR
-#define PPC4xx_ONB_IO_SIZE ((uint)4*1024)
-
-/* serial port defines */
-#define RS_TABLE_SIZE 2
-
-#define UART0_INT 0
-#define UART1_INT 1
-
-#define PCIL0_BASE 0xEF400000
-#define UART0_IO_BASE 0xEF600300
-#define UART1_IO_BASE 0xEF600400
-#define EMAC0_BASE 0xEF600800
-
-#define BD_EMAC_ADDR(e,i) bi_enetaddr[e][i]
-
-#if defined(CONFIG_UART0_TTYS0)
-#define ACTING_UART0_IO_BASE UART0_IO_BASE
-#define ACTING_UART1_IO_BASE UART1_IO_BASE
-#define ACTING_UART0_INT UART0_INT
-#define ACTING_UART1_INT UART1_INT
-#else
-#define ACTING_UART0_IO_BASE UART1_IO_BASE
-#define ACTING_UART1_IO_BASE UART0_IO_BASE
-#define ACTING_UART0_INT UART1_INT
-#define ACTING_UART1_INT UART0_INT
-#endif
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, ACTING_UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (u8 *)ACTING_UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_DEBUG_IO_BASE ACTING_UART0_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-
-/* DCR defines */
-#define DCRN_CPMSR_BASE 0x0BA
-#define DCRN_CPMFR_BASE 0x0B9
-
-#define DCRN_CPC0_PLLMR0_BASE 0x0F0
-#define DCRN_CPC0_BOOT_BASE 0x0F1
-#define DCRN_CPC0_CR1_BASE 0x0F2
-#define DCRN_CPC0_EPRCSR_BASE 0x0F3
-#define DCRN_CPC0_PLLMR1_BASE 0x0F4
-#define DCRN_CPC0_UCR_BASE 0x0F5
-#define DCRN_CPC0_UCR_U0DIV 0x07F
-#define DCRN_CPC0_SRR_BASE 0x0F6
-#define DCRN_CPC0_JTAGID_BASE 0x0F7
-#define DCRN_CPC0_SPARE_BASE 0x0F8
-#define DCRN_CPC0_PCI_BASE 0x0F9
-
-
-#define IBM_CPM_GPT 0x80000000 /* GPT interface */
-#define IBM_CPM_PCI 0x40000000 /* PCI bridge */
-#define IBM_CPM_UIC 0x00010000 /* Universal Int Controller */
-#define IBM_CPM_CPU 0x00008000 /* processor core */
-#define IBM_CPM_EBC 0x00002000 /* EBC controller */
-#define IBM_CPM_SDRAM0 0x00004000 /* SDRAM memory controller */
-#define IBM_CPM_GPIO0 0x00001000 /* General Purpose IO */
-#define IBM_CPM_TMRCLK 0x00000400 /* CPU timers */
-#define IBM_CPM_PLB 0x00000100 /* PLB bus arbiter */
-#define IBM_CPM_OPB 0x00000080 /* PLB to OPB bridge */
-#define IBM_CPM_DMA 0x00000040 /* DMA controller */
-#define IBM_CPM_IIC0 0x00000010 /* IIC interface */
-#define IBM_CPM_UART1 0x00000002 /* serial port 0 */
-#define IBM_CPM_UART0 0x00000001 /* serial port 1 */
-#define DFLT_IBM4xx_PM ~(IBM_CPM_PCI | IBM_CPM_CPU | IBM_CPM_DMA \
- | IBM_CPM_OPB | IBM_CPM_EBC \
- | IBM_CPM_SDRAM0 | IBM_CPM_PLB \
- | IBM_CPM_UIC | IBM_CPM_TMRCLK)
-#define DCRN_DMA0_BASE 0x100
-#define DCRN_DMA1_BASE 0x108
-#define DCRN_DMA2_BASE 0x110
-#define DCRN_DMA3_BASE 0x118
-#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */
-#define DCRN_DMASR_BASE 0x120
-#define DCRN_EBC_BASE 0x012
-#define DCRN_DCP0_BASE 0x014
-#define DCRN_MAL_BASE 0x180
-#define DCRN_OCM0_BASE 0x018
-#define DCRN_PLB0_BASE 0x084
-#define DCRN_PLLMR_BASE 0x0B0
-#define DCRN_POB0_BASE 0x0A0
-#define DCRN_SDRAM0_BASE 0x010
-#define DCRN_UIC0_BASE 0x0C0
-#define UIC0 DCRN_UIC0_BASE
-
-#include <asm/ibm405.h>
-
-#endif /* __ASM_IBM405EP_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibm405gp.c b/arch/ppc/platforms/4xx/ibm405gp.c
deleted file mode 100644
index 2ac67a2f..0000000
--- a/arch/ppc/platforms/4xx/ibm405gp.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- *
- * Copyright 2000-2001 MontaVista Software Inc.
- * Original author: Armin Kuster akuster@mvista.com
- *
- * Module name: ibm405gp.c
- *
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/threads.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <platforms/4xx/ibm405gp.h>
-#include <asm/ibm4xx.h>
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-
-static struct ocp_func_emac_data ibm405gp_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = -1, /* ZMII device index */
- .zmii_mux = 0, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 9, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_mal_data ibm405gp_mal0_def = {
- .num_tx_chans = 1, /* Number of TX channels */
- .num_rx_chans = 1, /* Number of RX channels */
- .txeob_irq = 11, /* TX End Of Buffer IRQ */
- .rxeob_irq = 12, /* RX End Of Buffer IRQ */
- .txde_irq = 13, /* TX Descriptor Error IRQ */
- .rxde_irq = 14, /* RX Descriptor Error IRQ */
- .serr_irq = 10, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_iic_data ibm405gp_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_OPB,
- .index = 0,
- .paddr = 0xEF600000,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = UART0_IO_BASE,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = UART1_IO_BASE,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .paddr = 0xEF600500,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ibm405gp_iic0_def,
- .show = &ocp_show_iic_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .paddr = 0xEF600700,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ibm405gp_mal0_def,
- .show = &ocp_show_mal_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = EMAC0_BASE,
- .irq = 15,
- .pm = IBM_CPM_EMAC0,
- .additions = &ibm405gp_emac0_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0xffffff80,
- .triggering = 0x10000000,
- .ext_irq_mask = 0x0000007f, /* IRQ0 - IRQ6 */
- }
-};
diff --git a/arch/ppc/platforms/4xx/ibm405gp.h b/arch/ppc/platforms/4xx/ibm405gp.h
deleted file mode 100644
index 9f15e55..0000000
--- a/arch/ppc/platforms/4xx/ibm405gp.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * Author: Armin Kuster akuster@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBM405GP_H__
-#define __ASM_IBM405GP_H__
-
-
-/* ibm405.h at bottom of this file */
-
-/* PCI
- * PCI Bridge config reg definitions
- * see 17-19 of manual
- */
-
-#define PPC405_PCI_CONFIG_ADDR 0xeec00000
-#define PPC405_PCI_CONFIG_DATA 0xeec00004
-
-#define PPC405_PCI_PHY_MEM_BASE 0x80000000 /* hose_a->pci_mem_offset */
- /* setbat */
-#define PPC405_PCI_MEM_BASE PPC405_PCI_PHY_MEM_BASE /* setbat */
-#define PPC405_PCI_PHY_IO_BASE 0xe8000000 /* setbat */
-#define PPC405_PCI_IO_BASE PPC405_PCI_PHY_IO_BASE /* setbat */
-
-#define PPC405_PCI_LOWER_MEM 0x80000000 /* hose_a->mem_space.start */
-#define PPC405_PCI_UPPER_MEM 0xBfffffff /* hose_a->mem_space.end */
-#define PPC405_PCI_LOWER_IO 0x00000000 /* hose_a->io_space.start */
-#define PPC405_PCI_UPPER_IO 0x0000ffff /* hose_a->io_space.end */
-
-#define PPC405_ISA_IO_BASE PPC405_PCI_IO_BASE
-
-#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE)
-#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR
-#define PPC4xx_PCI_IO_SIZE ((uint)64*1024)
-#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR)
-#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR
-#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024)
-#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000)
-#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR
-#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024)
-#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000)
-#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR
-#define PPC4xx_ONB_IO_SIZE ((uint)4*1024)
-
-/* serial port defines */
-#define RS_TABLE_SIZE 2
-
-#define UART0_INT 0
-#define UART1_INT 1
-
-#define PCIL0_BASE 0xEF400000
-#define UART0_IO_BASE 0xEF600300
-#define UART1_IO_BASE 0xEF600400
-#define EMAC0_BASE 0xEF600800
-
-#define BD_EMAC_ADDR(e,i) bi_enetaddr[i]
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (u8 *)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#if defined(CONFIG_UART0_TTYS0)
-#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-#endif
-
-#if defined(CONFIG_UART0_TTYS1)
-#define SERIAL_DEBUG_IO_BASE UART1_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(1) \
- STD_UART_OP(0)
-#endif
-
-/* DCR defines */
-#define DCRN_CHCR_BASE 0x0B1
-#define DCRN_CHPSR_BASE 0x0B4
-#define DCRN_CPMSR_BASE 0x0B8
-#define DCRN_CPMFR_BASE 0x0BA
-
-#define CHR0_U0EC 0x00000080 /* Select external clock for UART0 */
-#define CHR0_U1EC 0x00000040 /* Select external clock for UART1 */
-#define CHR0_UDIV 0x0000003E /* UART internal clock divisor */
-#define CHR1_CETE 0x00800000 /* CPU external timer enable */
-
-#define DCRN_CHPSR_BASE 0x0B4
-#define PSR_PLL_FWD_MASK 0xC0000000
-#define PSR_PLL_FDBACK_MASK 0x30000000
-#define PSR_PLL_TUNING_MASK 0x0E000000
-#define PSR_PLB_CPU_MASK 0x01800000
-#define PSR_OPB_PLB_MASK 0x00600000
-#define PSR_PCI_PLB_MASK 0x00180000
-#define PSR_EB_PLB_MASK 0x00060000
-#define PSR_ROM_WIDTH_MASK 0x00018000
-#define PSR_ROM_LOC 0x00004000
-#define PSR_PCI_ASYNC_EN 0x00001000
-#define PSR_PCI_ARBIT_EN 0x00000400
-
-#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
-#define IBM_CPM_PCI 0x40000000 /* PCI bridge */
-#define IBM_CPM_CPU 0x20000000 /* processor core */
-#define IBM_CPM_DMA 0x10000000 /* DMA controller */
-#define IBM_CPM_OPB 0x08000000 /* PLB to OPB bridge */
-#define IBM_CPM_DCP 0x04000000 /* CodePack */
-#define IBM_CPM_EBC 0x02000000 /* ROM/SRAM peripheral controller */
-#define IBM_CPM_SDRAM0 0x01000000 /* SDRAM memory controller */
-#define IBM_CPM_PLB 0x00800000 /* PLB bus arbiter */
-#define IBM_CPM_GPIO0 0x00400000 /* General Purpose IO (??) */
-#define IBM_CPM_UART0 0x00200000 /* serial port 0 */
-#define IBM_CPM_UART1 0x00100000 /* serial port 1 */
-#define IBM_CPM_UIC 0x00080000 /* Universal Interrupt Controller */
-#define IBM_CPM_TMRCLK 0x00040000 /* CPU timers */
-#define IBM_CPM_EMAC0 0x00020000 /* on-chip ethernet MM unit */
-#define DFLT_IBM4xx_PM ~(IBM_CPM_PCI | IBM_CPM_CPU | IBM_CPM_DMA \
- | IBM_CPM_OPB | IBM_CPM_EBC \
- | IBM_CPM_SDRAM0 | IBM_CPM_PLB \
- | IBM_CPM_UIC | IBM_CPM_TMRCLK)
-
-#define DCRN_DMA0_BASE 0x100
-#define DCRN_DMA1_BASE 0x108
-#define DCRN_DMA2_BASE 0x110
-#define DCRN_DMA3_BASE 0x118
-#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */
-#define DCRN_DMASR_BASE 0x120
-#define DCRN_EBC_BASE 0x012
-#define DCRN_DCP0_BASE 0x014
-#define DCRN_MAL_BASE 0x180
-#define DCRN_OCM0_BASE 0x018
-#define DCRN_PLB0_BASE 0x084
-#define DCRN_PLLMR_BASE 0x0B0
-#define DCRN_POB0_BASE 0x0A0
-#define DCRN_SDRAM0_BASE 0x010
-#define DCRN_UIC0_BASE 0x0C0
-#define UIC0 DCRN_UIC0_BASE
-
-#include <asm/ibm405.h>
-
-#endif /* __ASM_IBM405GP_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibm405gpr.c b/arch/ppc/platforms/4xx/ibm405gpr.c
deleted file mode 100644
index 9f4dacf..0000000
--- a/arch/ppc/platforms/4xx/ibm405gpr.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/threads.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <platforms/4xx/ibm405gpr.h>
-#include <asm/ibm4xx.h>
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-
-static struct ocp_func_emac_data ibm405gpr_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = -1, /* ZMII device index */
- .zmii_mux = 0, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 9, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_mal_data ibm405gpr_mal0_def = {
- .num_tx_chans = 1, /* Number of TX channels */
- .num_rx_chans = 1, /* Number of RX channels */
- .txeob_irq = 11, /* TX End Of Buffer IRQ */
- .rxeob_irq = 12, /* RX End Of Buffer IRQ */
- .txde_irq = 13, /* TX Descriptor Error IRQ */
- .rxde_irq = 14, /* RX Descriptor Error IRQ */
- .serr_irq = 10, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_iic_data ibm405gpr_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_OPB,
- .index = 0,
- .paddr = 0xEF600000,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = UART0_IO_BASE,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = UART1_IO_BASE,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .paddr = 0xEF600500,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ibm405gpr_iic0_def,
- .show = &ocp_show_iic_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .paddr = 0xEF600700,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ibm405gpr_mal0_def,
- .show = &ocp_show_mal_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = EMAC0_BASE,
- .irq = 15,
- .pm = IBM_CPM_EMAC0,
- .additions = &ibm405gpr_emac0_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0xffffe000,
- .triggering = 0x10000000,
- .ext_irq_mask = 0x00001fff, /* IRQ7 - IRQ12, IRQ0 - IRQ6 */
- }
-};
diff --git a/arch/ppc/platforms/4xx/ibm405gpr.h b/arch/ppc/platforms/4xx/ibm405gpr.h
deleted file mode 100644
index 9e01f15..0000000
--- a/arch/ppc/platforms/4xx/ibm405gpr.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBM405GPR_H__
-#define __ASM_IBM405GPR_H__
-
-
-/* ibm405.h at bottom of this file */
-
-/* PCI
- * PCI Bridge config reg definitions
- * see 17-19 of manual
- */
-
-#define PPC405_PCI_CONFIG_ADDR 0xeec00000
-#define PPC405_PCI_CONFIG_DATA 0xeec00004
-
-#define PPC405_PCI_PHY_MEM_BASE 0x80000000 /* hose_a->pci_mem_offset */
- /* setbat */
-#define PPC405_PCI_MEM_BASE PPC405_PCI_PHY_MEM_BASE /* setbat */
-#define PPC405_PCI_PHY_IO_BASE 0xe8000000 /* setbat */
-#define PPC405_PCI_IO_BASE PPC405_PCI_PHY_IO_BASE /* setbat */
-
-#define PPC405_PCI_LOWER_MEM 0x80000000 /* hose_a->mem_space.start */
-#define PPC405_PCI_UPPER_MEM 0xBfffffff /* hose_a->mem_space.end */
-#define PPC405_PCI_LOWER_IO 0x00000000 /* hose_a->io_space.start */
-#define PPC405_PCI_UPPER_IO 0x0000ffff /* hose_a->io_space.end */
-
-#define PPC405_ISA_IO_BASE PPC405_PCI_IO_BASE
-
-#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE)
-#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR
-#define PPC4xx_PCI_IO_SIZE ((uint)64*1024)
-#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR)
-#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR
-#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024)
-#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000)
-#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR
-#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024)
-#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000)
-#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR
-#define PPC4xx_ONB_IO_SIZE ((uint)4*1024)
-
-/* serial port defines */
-#define RS_TABLE_SIZE 2
-
-#define UART0_INT 0
-#define UART1_INT 1
-
-#define PCIL0_BASE 0xEF400000
-#define UART0_IO_BASE 0xEF600300
-#define UART1_IO_BASE 0xEF600400
-#define EMAC0_BASE 0xEF600800
-
-#define BD_EMAC_ADDR(e,i) bi_enetaddr[i]
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (u8 *)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#if defined(CONFIG_UART0_TTYS0)
-#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-#endif
-
-#if defined(CONFIG_UART0_TTYS1)
-#define SERIAL_DEBUG_IO_BASE UART1_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(1) \
- STD_UART_OP(0)
-#endif
-
-/* DCR defines */
-#define DCRN_CHCR_BASE 0x0B1
-#define DCRN_CHPSR_BASE 0x0B4
-#define DCRN_CPMSR_BASE 0x0B8
-#define DCRN_CPMFR_BASE 0x0BA
-
-#define CHR0_U0EC 0x00000080 /* Select external clock for UART0 */
-#define CHR0_U1EC 0x00000040 /* Select external clock for UART1 */
-#define CHR0_UDIV 0x0000003E /* UART internal clock divisor */
-#define CHR1_CETE 0x00800000 /* CPU external timer enable */
-
-#define DCRN_CHPSR_BASE 0x0B4
-#define PSR_PLL_FWD_MASK 0xC0000000
-#define PSR_PLL_FDBACK_MASK 0x30000000
-#define PSR_PLL_TUNING_MASK 0x0E000000
-#define PSR_PLB_CPU_MASK 0x01800000
-#define PSR_OPB_PLB_MASK 0x00600000
-#define PSR_PCI_PLB_MASK 0x00180000
-#define PSR_EB_PLB_MASK 0x00060000
-#define PSR_ROM_WIDTH_MASK 0x00018000
-#define PSR_ROM_LOC 0x00004000
-#define PSR_PCI_ASYNC_EN 0x00001000
-#define PSR_PCI_ARBIT_EN 0x00000400
-
-#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
-#define IBM_CPM_PCI 0x40000000 /* PCI bridge */
-#define IBM_CPM_CPU 0x20000000 /* processor core */
-#define IBM_CPM_DMA 0x10000000 /* DMA controller */
-#define IBM_CPM_OPB 0x08000000 /* PLB to OPB bridge */
-#define IBM_CPM_DCP 0x04000000 /* CodePack */
-#define IBM_CPM_EBC 0x02000000 /* ROM/SRAM peripheral controller */
-#define IBM_CPM_SDRAM0 0x01000000 /* SDRAM memory controller */
-#define IBM_CPM_PLB 0x00800000 /* PLB bus arbiter */
-#define IBM_CPM_GPIO0 0x00400000 /* General Purpose IO (??) */
-#define IBM_CPM_UART0 0x00200000 /* serial port 0 */
-#define IBM_CPM_UART1 0x00100000 /* serial port 1 */
-#define IBM_CPM_UIC 0x00080000 /* Universal Interrupt Controller */
-#define IBM_CPM_TMRCLK 0x00040000 /* CPU timers */
-#define IBM_CPM_EMAC0 0x00020000 /* on-chip ethernet MM unit */
-#define DFLT_IBM4xx_PM ~(IBM_CPM_PCI | IBM_CPM_CPU | IBM_CPM_DMA \
- | IBM_CPM_OPB | IBM_CPM_EBC \
- | IBM_CPM_SDRAM0 | IBM_CPM_PLB \
- | IBM_CPM_UIC | IBM_CPM_TMRCLK)
-
-#define DCRN_DMA0_BASE 0x100
-#define DCRN_DMA1_BASE 0x108
-#define DCRN_DMA2_BASE 0x110
-#define DCRN_DMA3_BASE 0x118
-#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */
-#define DCRN_DMASR_BASE 0x120
-#define DCRN_EBC_BASE 0x012
-#define DCRN_DCP0_BASE 0x014
-#define DCRN_MAL_BASE 0x180
-#define DCRN_OCM0_BASE 0x018
-#define DCRN_PLB0_BASE 0x084
-#define DCRN_PLLMR_BASE 0x0B0
-#define DCRN_POB0_BASE 0x0A0
-#define DCRN_SDRAM0_BASE 0x010
-#define DCRN_UIC0_BASE 0x0C0
-#define UIC0 DCRN_UIC0_BASE
-
-#include <asm/ibm405.h>
-
-#endif /* __ASM_IBM405GPR_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c
deleted file mode 100644
index 0de9153..0000000
--- a/arch/ppc/platforms/4xx/ibm440ep.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * PPC440EP I/O descriptions
- *
- * Wade Farnsworth <wfarnsworth@mvista.com>
- * Copyright 2004 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <platforms/4xx/ibm440ep.h>
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-
-static struct ocp_func_emac_data ibm440ep_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 0, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 61, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-
-static struct ocp_func_emac_data ibm440ep_emac1_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 1, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 1, /* MAL rx channel number */
- .mal_tx_chan = 2, /* MAL tx channel number */
- .wol_irq = 63, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_mal_data ibm440ep_mal0_def = {
- .num_tx_chans = 4, /* Number of TX channels */
- .num_rx_chans = 2, /* Number of RX channels */
- .txeob_irq = 10, /* TX End Of Buffer IRQ */
- .rxeob_irq = 11, /* RX End Of Buffer IRQ */
- .txde_irq = 33, /* TX Descriptor Error IRQ */
- .rxde_irq = 34, /* RX Descriptor Error IRQ */
- .serr_irq = 32, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_iic_data ibm440ep_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-
-static struct ocp_func_iic_data ibm440ep_iic1_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_OPB,
- .index = 0,
- .paddr = 0x0EF600000ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = PPC440EP_UART0_ADDR,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = PPC440EP_UART1_ADDR,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 2,
- .paddr = PPC440EP_UART2_ADDR,
- .irq = UART2_INT,
- .pm = IBM_CPM_UART2,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 3,
- .paddr = PPC440EP_UART3_ADDR,
- .irq = UART3_INT,
- .pm = IBM_CPM_UART3,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = 0x0EF600700ULL,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ibm440ep_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 1,
- .paddr = 0x0EF600800ULL,
- .irq = 7,
- .pm = IBM_CPM_IIC1,
- .additions = &ibm440ep_iic1_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .index = 0,
- .paddr = 0x0EF600B00ULL,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .index = 1,
- .paddr = 0x0EF600C00ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ibm440ep_mal0_def,
- .show = &ocp_show_mal_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = 0x0EF600E00ULL,
- .irq = 60,
- .pm = OCP_CPM_NA,
- .additions = &ibm440ep_emac0_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 1,
- .paddr = 0x0EF600F00ULL,
- .irq = 62,
- .pm = OCP_CPM_NA,
- .additions = &ibm440ep_emac1_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_ZMII,
- .paddr = 0x0EF600D00ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0xffbffe03,
- .triggering = 0x00000000,
- .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */
- },
- { .polarity = 0xffffc6af,
- .triggering = 0x06000140,
- .ext_irq_mask = 0x00003800, /* IRQ7 - IRQ9 */
- },
-};
-
-static struct resource usb_gadget_resources[] = {
- [0] = {
- .start = 0x050000100ULL,
- .end = 0x05000017FULL,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = 55,
- .end = 55,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 dma_mask = 0xffffffffULL;
-
-static struct platform_device usb_gadget_device = {
- .name = "musbhsfc",
- .id = 0,
- .num_resources = ARRAY_SIZE(usb_gadget_resources),
- .resource = usb_gadget_resources,
- .dev = {
- .dma_mask = &dma_mask,
- .coherent_dma_mask = 0xffffffffULL,
- }
-};
-
-static struct platform_device *ibm440ep_devs[] __initdata = {
- &usb_gadget_device,
-};
-
-static int __init
-ibm440ep_platform_add_devices(void)
-{
- return platform_add_devices(ibm440ep_devs, ARRAY_SIZE(ibm440ep_devs));
-}
-arch_initcall(ibm440ep_platform_add_devices);
-
diff --git a/arch/ppc/platforms/4xx/ibm440ep.h b/arch/ppc/platforms/4xx/ibm440ep.h
deleted file mode 100644
index d925727..0000000
--- a/arch/ppc/platforms/4xx/ibm440ep.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * PPC440EP definitions
- *
- * Wade Farnsworth <wfarnsworth@mvista.com>
- *
- * Copyright 2002 Roland Dreier
- * Copyright 2004 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __PPC_PLATFORMS_IBM440EP_H
-#define __PPC_PLATFORMS_IBM440EP_H
-
-#include <asm/ibm44x.h>
-
-/* UART */
-#define PPC440EP_UART0_ADDR 0x0EF600300
-#define PPC440EP_UART1_ADDR 0x0EF600400
-#define PPC440EP_UART2_ADDR 0x0EF600500
-#define PPC440EP_UART3_ADDR 0x0EF600600
-#define UART0_INT 0
-#define UART1_INT 1
-#define UART2_INT 3
-#define UART3_INT 4
-
-/* Clock and Power Management */
-#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
-#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
-#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
-#define IBM_CPM_USB1H 0x08000000 /* USB 1.1 Host */
-#define IBM_CPM_FPU 0x04000000 /* floating point unit */
-#define IBM_CPM_CPU 0x02000000 /* processor core */
-#define IBM_CPM_DMA 0x01000000 /* DMA controller */
-#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
-#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
-#define IBM_CPM_EBC 0x00200000 /* External Bus Controller */
-#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
-#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
-#define IBM_CPM_PLB4 0x00040000 /* PLB4 bus arbiter */
-#define IBM_CPM_PLB4x3 0x00020000 /* PLB4 to PLB3 bridge controller */
-#define IBM_CPM_PLB3x4 0x00010000 /* PLB3 to PLB4 bridge controller */
-#define IBM_CPM_PLB3 0x00008000 /* PLB3 bus arbiter */
-#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
-#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
-#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
-#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
-#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
-#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
-#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
-#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
-#define IBM_CPM_EMAC0 0x00000020 /* ethernet port 0 */
-#define IBM_CPM_EMAC1 0x00000010 /* ethernet port 1 */
-#define IBM_CPM_UART2 0x00000008 /* serial port 2 */
-#define IBM_CPM_UART3 0x00000004 /* serial port 3 */
-#define IBM_CPM_USB2D 0x00000002 /* USB 2.0 Device */
-#define IBM_CPM_USB2H 0x00000001 /* USB 2.0 Host */
-
-#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC0 | IBM_CPM_UIC1 | IBM_CPM_CPU \
- | IBM_CPM_EBC | IBM_CPM_BGO | IBM_CPM_FPU \
- | IBM_CPM_EBM | IBM_CPM_PLB4 | IBM_CPM_3x4 \
- | IBM_CPM_PLB3 | IBM_CPM_PLB4x3 \
- | IBM_CPM_EMAC0 | IBM_CPM_TMRCLK \
- | IBM_CPM_DMA | IBM_CPM_PCI | IBM_CPM_EMAC1)
-
-
-#endif /* __PPC_PLATFORMS_IBM440EP_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibm440gp.c b/arch/ppc/platforms/4xx/ibm440gp.c
deleted file mode 100644
index b67a72e..0000000
--- a/arch/ppc/platforms/4xx/ibm440gp.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * PPC440GP I/O descriptions
- *
- * Matt Porter <mporter@mvista.com>
- * Copyright 2002-2004 MontaVista Software Inc.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/init.h>
-#include <linux/module.h>
-#include <platforms/4xx/ibm440gp.h>
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-
-static struct ocp_func_emac_data ibm440gp_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 0, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 61, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-
-static struct ocp_func_emac_data ibm440gp_emac1_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 1, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 1, /* MAL rx channel number */
- .mal_tx_chan = 2, /* MAL tx channel number */
- .wol_irq = 63, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_mal_data ibm440gp_mal0_def = {
- .num_tx_chans = 4, /* Number of TX channels */
- .num_rx_chans = 2, /* Number of RX channels */
- .txeob_irq = 10, /* TX End Of Buffer IRQ */
- .rxeob_irq = 11, /* RX End Of Buffer IRQ */
- .txde_irq = 33, /* TX Descriptor Error IRQ */
- .rxde_irq = 34, /* RX Descriptor Error IRQ */
- .serr_irq = 32, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_iic_data ibm440gp_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-
-static struct ocp_func_iic_data ibm440gp_iic1_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_OPB,
- .index = 0,
- .paddr = 0x0000000140000000ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = PPC440GP_UART0_ADDR,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = PPC440GP_UART1_ADDR,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = 0x0000000140000400ULL,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ibm440gp_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 1,
- .paddr = 0x0000000140000500ULL,
- .irq = 3,
- .pm = IBM_CPM_IIC1,
- .additions = &ibm440gp_iic1_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .index = 0,
- .paddr = 0x0000000140000700ULL,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ibm440gp_mal0_def,
- .show = &ocp_show_mal_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = 0x0000000140000800ULL,
- .irq = 60,
- .pm = OCP_CPM_NA,
- .additions = &ibm440gp_emac0_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 1,
- .paddr = 0x0000000140000900ULL,
- .irq = 62,
- .pm = OCP_CPM_NA,
- .additions = &ibm440gp_emac1_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_ZMII,
- .paddr = 0x0000000140000780ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0xfffffe03,
- .triggering = 0x01c00000,
- .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */
- },
- { .polarity = 0xffffc0ff,
- .triggering = 0x00ff8000,
- .ext_irq_mask = 0x00003f00, /* IRQ7 - IRQ12 */
- },
-};
diff --git a/arch/ppc/platforms/4xx/ibm440gp.h b/arch/ppc/platforms/4xx/ibm440gp.h
deleted file mode 100644
index 391c90e..0000000
--- a/arch/ppc/platforms/4xx/ibm440gp.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * PPC440GP definitions
- *
- * Roland Dreier <roland@digitalvampire.org>
- *
- * Copyright 2002 Roland Dreier
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * This file contains code that was originally in the files ibm44x.h
- * and ebony.h, which were written by Matt Porter of MontaVista Software Inc.
- */
-
-#ifdef __KERNEL__
-#ifndef __PPC_PLATFORMS_IBM440GP_H
-#define __PPC_PLATFORMS_IBM440GP_H
-
-
-/* UART */
-#define PPC440GP_UART0_ADDR 0x0000000140000200ULL
-#define PPC440GP_UART1_ADDR 0x0000000140000300ULL
-#define UART0_INT 0
-#define UART1_INT 1
-
-/* Clock and Power Management */
-#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
-#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
-#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
-#define IBM_CPM_CPU 0x02000000 /* processor core */
-#define IBM_CPM_DMA 0x01000000 /* DMA controller */
-#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
-#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
-#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
-#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
-#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
-#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
-#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
-#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
-#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
-#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
-#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
-#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
-#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
-#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
-#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
-
-#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
- | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
- | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
- | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI)
-/*
- * Serial port defines
- */
-#define RS_TABLE_SIZE 2
-
-#include <asm/ibm44x.h>
-#include <syslib/ibm440gp_common.h>
-
-#endif /* __PPC_PLATFORMS_IBM440GP_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibm440gx.c b/arch/ppc/platforms/4xx/ibm440gx.c
deleted file mode 100644
index 685abff..0000000
--- a/arch/ppc/platforms/4xx/ibm440gx.c
+++ /dev/null
@@ -1,231 +0,0 @@
-/*
- * PPC440GX I/O descriptions
- *
- * Matt Porter <mporter@mvista.com>
- * Copyright 2002-2004 MontaVista Software Inc.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/init.h>
-#include <linux/module.h>
-#include <platforms/4xx/ibm440gx.h>
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-
-static struct ocp_func_emac_data ibm440gx_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 0, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 61, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-
-static struct ocp_func_emac_data ibm440gx_emac1_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 1, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 1, /* MAL rx channel number */
- .mal_tx_chan = 1, /* MAL tx channel number */
- .wol_irq = 63, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-
-static struct ocp_func_emac_data ibm440gx_emac2_def = {
- .rgmii_idx = 0, /* RGMII device index */
- .rgmii_mux = 0, /* RGMII input of this EMAC */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 2, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 2, /* MAL rx channel number */
- .mal_tx_chan = 2, /* MAL tx channel number */
- .wol_irq = 65, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = 0, /* TAH device index */
-};
-
-static struct ocp_func_emac_data ibm440gx_emac3_def = {
- .rgmii_idx = 0, /* RGMII device index */
- .rgmii_mux = 1, /* RGMII input of this EMAC */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 3, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 3, /* MAL rx channel number */
- .mal_tx_chan = 3, /* MAL tx channel number */
- .wol_irq = 67, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = 1, /* TAH device index */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_mal_data ibm440gx_mal0_def = {
- .num_tx_chans = 4, /* Number of TX channels */
- .num_rx_chans = 4, /* Number of RX channels */
- .txeob_irq = 10, /* TX End Of Buffer IRQ */
- .rxeob_irq = 11, /* RX End Of Buffer IRQ */
- .txde_irq = 33, /* TX Descriptor Error IRQ */
- .rxde_irq = 34, /* RX Descriptor Error IRQ */
- .serr_irq = 32, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_iic_data ibm440gx_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-
-static struct ocp_func_iic_data ibm440gx_iic1_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_OPB,
- .index = 0,
- .paddr = 0x0000000140000000ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = PPC440GX_UART0_ADDR,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = PPC440GX_UART1_ADDR,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = 0x0000000140000400ULL,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ibm440gx_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 1,
- .paddr = 0x0000000140000500ULL,
- .irq = 3,
- .pm = IBM_CPM_IIC1,
- .additions = &ibm440gx_iic1_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .index = 0,
- .paddr = 0x0000000140000700ULL,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ibm440gx_mal0_def,
- .show = &ocp_show_mal_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = 0x0000000140000800ULL,
- .irq = 60,
- .pm = OCP_CPM_NA,
- .additions = &ibm440gx_emac0_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 1,
- .paddr = 0x0000000140000900ULL,
- .irq = 62,
- .pm = OCP_CPM_NA,
- .additions = &ibm440gx_emac1_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 2,
- .paddr = 0x0000000140000C00ULL,
- .irq = 64,
- .pm = OCP_CPM_NA,
- .additions = &ibm440gx_emac2_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 3,
- .paddr = 0x0000000140000E00ULL,
- .irq = 66,
- .pm = OCP_CPM_NA,
- .additions = &ibm440gx_emac3_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_RGMII,
- .paddr = 0x0000000140000790ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_ZMII,
- .paddr = 0x0000000140000780ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_TAH,
- .index = 0,
- .paddr = 0x0000000140000b50ULL,
- .irq = 68,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_TAH,
- .index = 1,
- .paddr = 0x0000000140000d50ULL,
- .irq = 69,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0xfffffe03,
- .triggering = 0x01c00000,
- .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */
- },
- { .polarity = 0xffffc0ff,
- .triggering = 0x00ff8000,
- .ext_irq_mask = 0x00003f00, /* IRQ7 - IRQ12 */
- },
- { .polarity = 0xffff83ff,
- .triggering = 0x000f83c0,
- .ext_irq_mask = 0x00007c00, /* IRQ13 - IRQ17 */
- },
-};
diff --git a/arch/ppc/platforms/4xx/ibm440gx.h b/arch/ppc/platforms/4xx/ibm440gx.h
deleted file mode 100644
index 599c428..0000000
--- a/arch/ppc/platforms/4xx/ibm440gx.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * PPC440GX definitions
- *
- * Matt Porter <mporter@mvista.com>
- *
- * Copyright 2002 Roland Dreier
- * Copyright 2003 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __PPC_PLATFORMS_IBM440GX_H
-#define __PPC_PLATFORMS_IBM440GX_H
-
-
-#include <asm/ibm44x.h>
-
-/* UART */
-#define PPC440GX_UART0_ADDR 0x0000000140000200ULL
-#define PPC440GX_UART1_ADDR 0x0000000140000300ULL
-#define UART0_INT 0
-#define UART1_INT 1
-
-/* Clock and Power Management */
-#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
-#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
-#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
-#define IBM_CPM_RGMII 0x10000000 /* RGMII */
-#define IBM_CPM_TAHOE0 0x08000000 /* TAHOE 0 */
-#define IBM_CPM_TAHOE1 0x04000000 /* TAHOE 1 */
-#define IBM_CPM_CPU 0x02000000 /* processor core */
-#define IBM_CPM_DMA 0x01000000 /* DMA controller */
-#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
-#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
-#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
-#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
-#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
-#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
-#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
-#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
-#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
-#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
-#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
-#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
-#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
-#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
-#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
-#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */
-#define IBM_CPM_EMAC1 0x00000010 /* EMAC 1 */
-#define IBM_CPM_EMAC2 0x00000008 /* EMAC 2 */
-#define IBM_CPM_EMAC3 0x00000004 /* EMAC 3 */
-
-#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
- | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
- | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
- | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \
- | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \
- | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \
- | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 )
-/*
- * Serial port defines
- */
-#define RS_TABLE_SIZE 2
-
-#endif /* __PPC_PLATFORMS_IBM440GX_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibm440sp.c b/arch/ppc/platforms/4xx/ibm440sp.c
deleted file mode 100644
index de8f7ac..0000000
--- a/arch/ppc/platforms/4xx/ibm440sp.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * PPC440SP I/O descriptions
- *
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2002-2005 MontaVista Software Inc.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/init.h>
-#include <linux/module.h>
-#include <platforms/4xx/ibm440sp.h>
-#include <asm/ocp.h>
-
-static struct ocp_func_emac_data ibm440sp_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = -1, /* No ZMII */
- .zmii_mux = -1, /* No ZMII */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 61, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_mal_data ibm440sp_mal0_def = {
- .num_tx_chans = 1, /* Number of TX channels */
- .num_rx_chans = 1, /* Number of RX channels */
- .txeob_irq = 38, /* TX End Of Buffer IRQ */
- .rxeob_irq = 39, /* RX End Of Buffer IRQ */
- .txde_irq = 34, /* TX Descriptor Error IRQ */
- .rxde_irq = 35, /* RX Descriptor Error IRQ */
- .serr_irq = 33, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_iic_data ibm440sp_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-
-static struct ocp_func_iic_data ibm440sp_iic1_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_OPB,
- .index = 0,
- .paddr = 0x0000000140000000ULL,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = PPC440SP_UART0_ADDR,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = PPC440SP_UART1_ADDR,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 2,
- .paddr = PPC440SP_UART2_ADDR,
- .irq = UART2_INT,
- .pm = IBM_CPM_UART2,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = 0x00000001f0000400ULL,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ibm440sp_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 1,
- .paddr = 0x00000001f0000500ULL,
- .irq = 3,
- .pm = IBM_CPM_IIC1,
- .additions = &ibm440sp_iic1_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .index = 0,
- .paddr = 0x00000001f0000700ULL,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ibm440sp_mal0_def,
- .show = &ocp_show_mal_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = 0x00000001f0000800ULL,
- .irq = 60,
- .pm = OCP_CPM_NA,
- .additions = &ibm440sp_emac0_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
diff --git a/arch/ppc/platforms/4xx/ibm440sp.h b/arch/ppc/platforms/4xx/ibm440sp.h
deleted file mode 100644
index 2978682..0000000
--- a/arch/ppc/platforms/4xx/ibm440sp.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * PPC440SP definitions
- *
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * Copyright 2004-2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifdef __KERNEL__
-#ifndef __PPC_PLATFORMS_IBM440SP_H
-#define __PPC_PLATFORMS_IBM440SP_H
-
-
-#include <asm/ibm44x.h>
-
-/* UART */
-#define PPC440SP_UART0_ADDR 0x00000001f0000200ULL
-#define PPC440SP_UART1_ADDR 0x00000001f0000300ULL
-#define PPC440SP_UART2_ADDR 0x00000001f0000600ULL
-#define UART0_INT 0
-#define UART1_INT 1
-#define UART2_INT 2
-
-/* Clock and Power Management */
-#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
-#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
-#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
-#define IBM_CPM_CPU 0x02000000 /* processor core */
-#define IBM_CPM_DMA 0x01000000 /* DMA controller */
-#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
-#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
-#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
-#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
-#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
-#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
-#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
-#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
-#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
-#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
-#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
-#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
-#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
-#define IBM_CPM_UART2 0x00000100 /* serial port 1 */
-#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
-#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
-#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */
-
-#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
- | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
- | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
- | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \
- | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \
- | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \
- | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 )
-#endif /* __PPC_PLATFORMS_IBM440SP_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibmnp405h.c b/arch/ppc/platforms/4xx/ibmnp405h.c
deleted file mode 100644
index 1afc364..0000000
--- a/arch/ppc/platforms/4xx/ibmnp405h.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <asm/ocp.h>
-#include <platforms/4xx/ibmnp405h.h>
-
-static struct ocp_func_emac_data ibmnp405h_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 0, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 41, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-
-static struct ocp_func_emac_data ibmnp405h_emac1_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 1, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 1, /* MAL rx channel number */
- .mal_tx_chan = 2, /* MAL tx channel number */
- .wol_irq = 41, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-static struct ocp_func_emac_data ibmnp405h_emac2_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 2, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 2, /* MAL rx channel number */
- .mal_tx_chan = 4, /* MAL tx channel number */
- .wol_irq = 41, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-static struct ocp_func_emac_data ibmnp405h_emac3_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = 0, /* ZMII device index */
- .zmii_mux = 3, /* ZMII input of this EMAC */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 3, /* MAL rx channel number */
- .mal_tx_chan = 6, /* MAL tx channel number */
- .wol_irq = 41, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_mal_data ibmnp405h_mal0_def = {
- .num_tx_chans = 8, /* Number of TX channels */
- .num_rx_chans = 4, /* Number of RX channels */
- .txeob_irq = 17, /* TX End Of Buffer IRQ */
- .rxeob_irq = 18, /* RX End Of Buffer IRQ */
- .txde_irq = 46, /* TX Descriptor Error IRQ */
- .rxde_irq = 47, /* RX Descriptor Error IRQ */
- .serr_irq = 45, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_iic_data ibmnp405h_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_OPB,
- .index = 0,
- .paddr = 0xEF600000,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = UART0_IO_BASE,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = UART1_IO_BASE,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .paddr = 0xEF600500,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ibmnp405h_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .paddr = 0xEF600700,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ibmnp405h_mal0_def,
- .show = &ocp_show_mal_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = EMAC0_BASE,
- .irq = 37,
- .pm = IBM_CPM_EMAC0,
- .additions = &ibmnp405h_emac0_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 1,
- .paddr = 0xEF600900,
- .irq = 38,
- .pm = IBM_CPM_EMAC1,
- .additions = &ibmnp405h_emac1_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 2,
- .paddr = 0xEF600a00,
- .irq = 39,
- .pm = IBM_CPM_EMAC2,
- .additions = &ibmnp405h_emac2_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 3,
- .paddr = 0xEF600b00,
- .irq = 40,
- .pm = IBM_CPM_EMAC3,
- .additions = &ibmnp405h_emac3_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_ZMII,
- .paddr = 0xEF600C10,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
diff --git a/arch/ppc/platforms/4xx/ibmnp405h.h b/arch/ppc/platforms/4xx/ibmnp405h.h
deleted file mode 100644
index 08a6a77..0000000
--- a/arch/ppc/platforms/4xx/ibmnp405h.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBMNP405H_H__
-#define __ASM_IBMNP405H_H__
-
-
-/* ibm405.h at bottom of this file */
-
-#define PPC405_PCI_CONFIG_ADDR 0xeec00000
-#define PPC405_PCI_CONFIG_DATA 0xeec00004
-#define PPC405_PCI_PHY_MEM_BASE 0x80000000 /* hose_a->pci_mem_offset */
- /* setbat */
-#define PPC405_PCI_MEM_BASE PPC405_PCI_PHY_MEM_BASE /* setbat */
-#define PPC405_PCI_PHY_IO_BASE 0xe8000000 /* setbat */
-#define PPC405_PCI_IO_BASE PPC405_PCI_PHY_IO_BASE /* setbat */
-
-#define PPC405_PCI_LOWER_MEM 0x00000000 /* hose_a->mem_space.start */
-#define PPC405_PCI_UPPER_MEM 0xBfffffff /* hose_a->mem_space.end */
-#define PPC405_PCI_LOWER_IO 0x00000000 /* hose_a->io_space.start */
-#define PPC405_PCI_UPPER_IO 0x0000ffff /* hose_a->io_space.end */
-
-#define PPC405_ISA_IO_BASE PPC405_PCI_IO_BASE
-
-#define PPC4xx_PCI_IO_ADDR ((uint)PPC405_PCI_PHY_IO_BASE)
-#define PPC4xx_PCI_IO_SIZE ((uint)64*1024)
-#define PPC4xx_PCI_CFG_ADDR ((uint)PPC405_PCI_CONFIG_ADDR)
-#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024)
-#define PPC4xx_PCI_LCFG_ADDR ((uint)0xef400000)
-#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024)
-#define PPC4xx_ONB_IO_ADDR ((uint)0xef600000)
-#define PPC4xx_ONB_IO_SIZE ((uint)4*1024)
-
-/* serial port defines */
-#define RS_TABLE_SIZE 4
-
-#define UART0_INT 0
-#define UART1_INT 1
-#define PCIL0_BASE 0xEF400000
-#define UART0_IO_BASE 0xEF600300
-#define UART1_IO_BASE 0xEF600400
-#define OPB0_BASE 0xEF600600
-#define EMAC0_BASE 0xEF600800
-
-#define BD_EMAC_ADDR(e,i) bi_enetaddr[e][i]
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base:(u8 *) UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#if defined(CONFIG_UART0_TTYS0)
-#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-#endif
-
-#if defined(CONFIG_UART0_TTYS1)
-#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(1) \
- STD_UART_OP(0)
-#endif
-
-/* DCR defines */
-/* ------------------------------------------------------------------------- */
-
-#define DCRN_CHCR_BASE 0x0F1
-#define DCRN_CHPSR_BASE 0x0B4
-#define DCRN_CPMSR_BASE 0x0BA
-#define DCRN_CPMFR_BASE 0x0B9
-#define DCRN_CPMER_BASE 0x0B8
-
-/* CPM Clocking & Power Management defines */
-#define IBM_CPM_PCI 0x40000000 /* PCI */
-#define IBM_CPM_EMAC2 0x20000000 /* EMAC 2 MII */
-#define IBM_CPM_EMAC3 0x04000000 /* EMAC 3 MII */
-#define IBM_CPM_EMAC0 0x00800000 /* EMAC 0 MII */
-#define IBM_CPM_EMAC1 0x00100000 /* EMAC 1 MII */
-#define IBM_CPM_EMMII 0 /* Shift value for MII */
-#define IBM_CPM_EMRX 1 /* Shift value for recv */
-#define IBM_CPM_EMTX 2 /* Shift value for MAC */
-#define IBM_CPM_UIC1 0x00020000 /* Universal Interrupt Controller */
-#define IBM_CPM_UIC0 0x00010000 /* Universal Interrupt Controller */
-#define IBM_CPM_CPU 0x00008000 /* processor core */
-#define IBM_CPM_EBC 0x00004000 /* ROM/SRAM peripheral controller */
-#define IBM_CPM_SDRAM0 0x00002000 /* SDRAM memory controller */
-#define IBM_CPM_GPIO0 0x00001000 /* General Purpose IO (??) */
-#define IBM_CPM_HDLC 0x00000800 /* HDCL */
-#define IBM_CPM_TMRCLK 0x00000400 /* CPU timers */
-#define IBM_CPM_PLB 0x00000100 /* PLB bus arbiter */
-#define IBM_CPM_OPB 0x00000080 /* PLB to OPB bridge */
-#define IBM_CPM_DMA 0x00000040 /* DMA controller */
-#define IBM_CPM_IIC0 0x00000010 /* IIC interface */
-#define IBM_CPM_UART0 0x00000002 /* serial port 0 */
-#define IBM_CPM_UART1 0x00000001 /* serial port 1 */
-/* this is the default setting for devices put to sleep when booting */
-
-#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC0 | IBM_CPM_UIC1 | IBM_CPM_CPU \
- | IBM_CPM_EBC | IBM_CPM_SDRAM0 | IBM_CPM_PLB \
- | IBM_CPM_OPB | IBM_CPM_TMRCLK | IBM_CPM_DMA \
- | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 | IBM_CPM_EMAC2 \
- | IBM_CPM_EMAC3 | IBM_CPM_PCI)
-
-#define DCRN_DMA0_BASE 0x100
-#define DCRN_DMA1_BASE 0x108
-#define DCRN_DMA2_BASE 0x110
-#define DCRN_DMA3_BASE 0x118
-#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */
-#define DCRN_DMASR_BASE 0x120
-#define DCRN_EBC_BASE 0x012
-#define DCRN_DCP0_BASE 0x014
-#define DCRN_MAL_BASE 0x180
-#define DCRN_OCM0_BASE 0x018
-#define DCRN_PLB0_BASE 0x084
-#define DCRN_PLLMR_BASE 0x0B0
-#define DCRN_POB0_BASE 0x0A0
-#define DCRN_SDRAM0_BASE 0x010
-#define DCRN_UIC0_BASE 0x0C0
-#define DCRN_UIC1_BASE 0x0D0
-#define DCRN_CPC0_EPRCSR 0x0F3
-
-#define UIC0_UIC1NC 0x00000002
-
-#define CHR1_CETE 0x00000004 /* CPU external timer enable */
-#define UIC0 DCRN_UIC0_BASE
-#define UIC1 DCRN_UIC1_BASE
-
-#undef NR_UICS
-#define NR_UICS 2
-
-/* EMAC DCRN's FIXME: armin */
-#define DCRN_MALRXCTP2R(base) ((base) + 0x42) /* Channel Rx 2 Channel Table Pointer */
-#define DCRN_MALRXCTP3R(base) ((base) + 0x43) /* Channel Rx 3 Channel Table Pointer */
-#define DCRN_MALTXCTP4R(base) ((base) + 0x24) /* Channel Tx 4 Channel Table Pointer */
-#define DCRN_MALTXCTP5R(base) ((base) + 0x25) /* Channel Tx 5 Channel Table Pointer */
-#define DCRN_MALTXCTP6R(base) ((base) + 0x26) /* Channel Tx 6 Channel Table Pointer */
-#define DCRN_MALTXCTP7R(base) ((base) + 0x27) /* Channel Tx 7 Channel Table Pointer */
-#define DCRN_MALRCBS2(base) ((base) + 0x62) /* Channel Rx 2 Channel Buffer Size */
-#define DCRN_MALRCBS3(base) ((base) + 0x63) /* Channel Rx 3 Channel Buffer Size */
-
-#include <asm/ibm405.h>
-
-#endif /* __ASM_IBMNP405H_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibmstb4.c b/arch/ppc/platforms/4xx/ibmstb4.c
deleted file mode 100644
index 799a2ec..0000000
--- a/arch/ppc/platforms/4xx/ibmstb4.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-#include <platforms/4xx/ibmstb4.h>
-
-static struct ocp_func_iic_data ibmstb4_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-
-static struct ocp_func_iic_data ibmstb4_iic1_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] __initdata = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = UART0_IO_BASE,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = UART1_IO_BASE,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 2,
- .paddr = UART2_IO_BASE,
- .irq = UART2_INT,
- .pm = IBM_CPM_UART2,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .paddr = IIC0_BASE,
- .irq = IIC0_IRQ,
- .pm = IBM_CPM_IIC0,
- .additions = &ibmstb4_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .paddr = IIC1_BASE,
- .irq = IIC1_IRQ,
- .pm = IBM_CPM_IIC1,
- .additions = &ibmstb4_iic1_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .paddr = GPIO0_BASE,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IDE,
- .paddr = IDE0_BASE,
- .irq = IDE0_IRQ,
- .pm = OCP_CPM_NA,
- },
- { .vendor = OCP_VENDOR_INVALID,
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0x7fffff01,
- .triggering = 0x00000000,
- .ext_irq_mask = 0x0000007e, /* IRQ0 - IRQ5 */
- }
-};
-
-static struct resource ohci_usb_resources[] = {
- [0] = {
- .start = USB0_BASE,
- .end = USB0_BASE + USB0_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = USB0_IRQ,
- .end = USB0_IRQ,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 dma_mask = 0xffffffffULL;
-
-static struct platform_device ohci_usb_device = {
- .name = "ppc-soc-ohci",
- .id = 0,
- .num_resources = ARRAY_SIZE(ohci_usb_resources),
- .resource = ohci_usb_resources,
- .dev = {
- .dma_mask = &dma_mask,
- .coherent_dma_mask = 0xffffffffULL,
- }
-};
-
-static struct platform_device *ibmstb4_devs[] __initdata = {
- &ohci_usb_device,
-};
-
-static int __init
-ibmstb4_platform_add_devices(void)
-{
- return platform_add_devices(ibmstb4_devs, ARRAY_SIZE(ibmstb4_devs));
-}
-arch_initcall(ibmstb4_platform_add_devices);
diff --git a/arch/ppc/platforms/4xx/ibmstb4.h b/arch/ppc/platforms/4xx/ibmstb4.h
deleted file mode 100644
index 31a08ab..0000000
--- a/arch/ppc/platforms/4xx/ibmstb4.h
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBMSTB4_H__
-#define __ASM_IBMSTB4_H__
-
-
-/* serial port defines */
-#define STB04xxx_IO_BASE ((uint)0xe0000000)
-#define PPC4xx_PCI_IO_ADDR STB04xxx_IO_BASE
-#define PPC4xx_ONB_IO_PADDR STB04xxx_IO_BASE
-#define PPC4xx_ONB_IO_VADDR ((uint)0xe0000000)
-#define PPC4xx_ONB_IO_SIZE ((uint)14*64*1024)
-
-/*
- * map STB04xxx internal i/o address (0x400x00xx) to an address
- * which is below the 2GB limit...
- *
- * 4000 000x uart1 -> 0xe000 000x
- * 4001 00xx ppu
- * 4002 00xx smart card
- * 4003 000x iic
- * 4004 000x uart0
- * 4005 0xxx timer
- * 4006 00xx gpio
- * 4007 00xx smart card
- * 400b 000x iic
- * 400c 000x scp
- * 400d 000x modem
- * 400e 000x uart2
-*/
-#define STB04xxx_MAP_IO_ADDR(a) (((uint)(a)) + (STB04xxx_IO_BASE - 0x40000000))
-
-#define RS_TABLE_SIZE 3
-#define UART0_INT 20
-
-#ifdef __BOOTER__
-#define UART0_IO_BASE 0x40040000
-#else
-#define UART0_IO_BASE 0xe0040000
-#endif
-
-#define UART1_INT 21
-
-#ifdef __BOOTER__
-#define UART1_IO_BASE 0x40000000
-#else
-#define UART1_IO_BASE 0xe0000000
-#endif
-
-#define UART2_INT 31
-#ifdef __BOOTER__
-#define UART2_IO_BASE 0x400e0000
-#else
-#define UART2_IO_BASE 0xe00e0000
-#endif
-
-#define IDE0_BASE 0x400F0000
-#define IDE0_SIZE 0x200
-#define IDE0_IRQ 25
-#define IIC0_BASE 0x40030000
-#define IIC1_BASE 0x400b0000
-#define OPB0_BASE 0x40000000
-#define GPIO0_BASE 0x40060000
-
-#define USB0_BASE 0x40010000
-#define USB0_SIZE 0xA0
-#define USB0_IRQ 18
-
-#define IIC_NUMS 2
-#define UART_NUMS 3
-#define IIC0_IRQ 9
-#define IIC1_IRQ 10
-#define IIC_OWN 0x55
-#define IIC_CLOCK 50
-
-#define BD_EMAC_ADDR(e,i) bi_enetaddr[i]
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (u8 *)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#if defined(CONFIG_UART0_TTYS0)
-#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1) \
- STD_UART_OP(2)
-#endif
-
-#if defined(CONFIG_UART0_TTYS1)
-#define SERIAL_DEBUG_IO_BASE UART2_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(1) \
- STD_UART_OP(0) \
- STD_UART_OP(2)
-#endif
-
-#if defined(CONFIG_UART0_TTYS2)
-#define SERIAL_DEBUG_IO_BASE UART2_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(2) \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-#endif
-
-#define DCRN_BE_BASE 0x090
-#define DCRN_DMA0_BASE 0x0C0
-#define DCRN_DMA1_BASE 0x0C8
-#define DCRN_DMA2_BASE 0x0D0
-#define DCRN_DMA3_BASE 0x0D8
-#define DCRNCAP_DMA_CC 1 /* have DMA chained count capability */
-#define DCRN_DMASR_BASE 0x0E0
-#define DCRN_PLB0_BASE 0x054
-#define DCRN_PLB1_BASE 0x064
-#define DCRN_POB0_BASE 0x0B0
-#define DCRN_SCCR_BASE 0x120
-#define DCRN_UIC0_BASE 0x040
-#define DCRN_BE_BASE 0x090
-#define DCRN_DMA0_BASE 0x0C0
-#define DCRN_DMA1_BASE 0x0C8
-#define DCRN_DMA2_BASE 0x0D0
-#define DCRN_DMA3_BASE 0x0D8
-#define DCRN_CIC_BASE 0x030
-#define DCRN_DMASR_BASE 0x0E0
-#define DCRN_EBIMC_BASE 0x070
-#define DCRN_DCRX_BASE 0x020
-#define DCRN_CPMFR_BASE 0x102
-#define DCRN_SCCR_BASE 0x120
-#define UIC0 DCRN_UIC0_BASE
-
-#define IBM_CPM_IIC0 0x80000000 /* IIC 0 interface */
-#define IBM_CPM_USB0 0x40000000 /* IEEE-1284 */
-#define IBM_CPM_IIC1 0x20000000 /* IIC 1 interface */
-#define IBM_CPM_CPU 0x10000000 /* PPC405B3 clock control */
-#define IBM_CPM_AUD 0x08000000 /* Audio Decoder */
-#define IBM_CPM_EBIU 0x04000000 /* External Bus Interface Unit */
-#define IBM_CPM_SDRAM1 0x02000000 /* SDRAM 1 memory controller */
-#define IBM_CPM_DMA 0x01000000 /* DMA controller */
-#define IBM_CPM_DMA1 0x00800000 /* reserved */
-#define IBM_CPM_XPT1 0x00400000 /* reserved */
-#define IBM_CPM_XPT2 0x00200000 /* reserved */
-#define IBM_CPM_UART1 0x00100000 /* Serial 1 / Infrared */
-#define IBM_CPM_UART0 0x00080000 /* Serial 0 / 16550 */
-#define IBM_CPM_EPI 0x00040000 /* DCR Extension */
-#define IBM_CPM_SC0 0x00020000 /* Smart Card 0 */
-#define IBM_CPM_VID 0x00010000 /* reserved */
-#define IBM_CPM_SC1 0x00008000 /* Smart Card 1 */
-#define IBM_CPM_USBSDRA 0x00004000 /* SDRAM 0 memory controller */
-#define IBM_CPM_XPT0 0x00002000 /* Transport - 54 Mhz */
-#define IBM_CPM_CBS 0x00001000 /* Cross Bar Switch */
-#define IBM_CPM_GPT 0x00000800 /* GPTPWM */
-#define IBM_CPM_GPIO0 0x00000400 /* General Purpose IO 0 */
-#define IBM_CPM_DENC 0x00000200 /* Digital video Encoder */
-#define IBM_CPM_TMRCLK 0x00000100 /* CPU timers */
-#define IBM_CPM_XPT27 0x00000080 /* Transport - 27 Mhz */
-#define IBM_CPM_UIC 0x00000040 /* Universal Interrupt Controller */
-#define IBM_CPM_SSP 0x00000010 /* Modem Serial Interface (SSP) */
-#define IBM_CPM_UART2 0x00000008 /* Serial Control Port */
-#define IBM_CPM_DDIO 0x00000004 /* Descrambler */
-#define IBM_CPM_VID2 0x00000002 /* Video Decoder clock domain 2 */
-
-#define DFLT_IBM4xx_PM ~(IBM_CPM_CPU | IBM_CPM_EBIU | IBM_CPM_SDRAM1 \
- | IBM_CPM_DMA | IBM_CPM_DMA1 | IBM_CPM_CBS \
- | IBM_CPM_USBSDRA | IBM_CPM_XPT0 | IBM_CPM_TMRCLK \
- | IBM_CPM_XPT27 | IBM_CPM_UIC )
-
-#define DCRN_BEAR (DCRN_BE_BASE + 0x0) /* Bus Error Address Register */
-#define DCRN_BESR (DCRN_BE_BASE + 0x1) /* Bus Error Syndrome Register */
-/* DCRN_BESR */
-#define BESR_DSES 0x80000000 /* Data-Side Error Status */
-#define BESR_DMES 0x40000000 /* DMA Error Status */
-#define BESR_RWS 0x20000000 /* Read/Write Status */
-#define BESR_ETMASK 0x1C000000 /* Error Type */
-#define ET_PROT 0
-#define ET_PARITY 1
-#define ET_NCFG 2
-#define ET_BUSERR 4
-#define ET_BUSTO 6
-
-#define CHR1_CETE 0x00800000 /* CPU external timer enable */
-#define CHR1_PCIPW 0x00008000 /* PCI Int enable/Peripheral Write enable */
-
-#define DCRN_CICCR (DCRN_CIC_BASE + 0x0) /* CIC Control Register */
-#define DCRN_DMAS1 (DCRN_CIC_BASE + 0x1) /* DMA Select1 Register */
-#define DCRN_DMAS2 (DCRN_CIC_BASE + 0x2) /* DMA Select2 Register */
-#define DCRN_CICVCR (DCRN_CIC_BASE + 0x3) /* CIC Video COntro Register */
-#define DCRN_CICSEL3 (DCRN_CIC_BASE + 0x5) /* CIC Select 3 Register */
-#define DCRN_SGPO (DCRN_CIC_BASE + 0x6) /* CIC GPIO Output Register */
-#define DCRN_SGPOD (DCRN_CIC_BASE + 0x7) /* CIC GPIO OD Register */
-#define DCRN_SGPTC (DCRN_CIC_BASE + 0x8) /* CIC GPIO Tristate Ctrl Reg */
-#define DCRN_SGPI (DCRN_CIC_BASE + 0x9) /* CIC GPIO Input Reg */
-
-#define DCRN_DCRXICR (DCRN_DCRX_BASE + 0x0) /* Internal Control Register */
-#define DCRN_DCRXISR (DCRN_DCRX_BASE + 0x1) /* Internal Status Register */
-#define DCRN_DCRXECR (DCRN_DCRX_BASE + 0x2) /* External Control Register */
-#define DCRN_DCRXESR (DCRN_DCRX_BASE + 0x3) /* External Status Register */
-#define DCRN_DCRXTAR (DCRN_DCRX_BASE + 0x4) /* Target Address Register */
-#define DCRN_DCRXTDR (DCRN_DCRX_BASE + 0x5) /* Target Data Register */
-#define DCRN_DCRXIGR (DCRN_DCRX_BASE + 0x6) /* Interrupt Generation Register */
-#define DCRN_DCRXBCR (DCRN_DCRX_BASE + 0x7) /* Line Buffer Control Register */
-
-#define DCRN_BRCRH0 (DCRN_EBIMC_BASE + 0x0) /* Bus Region Config High 0 */
-#define DCRN_BRCRH1 (DCRN_EBIMC_BASE + 0x1) /* Bus Region Config High 1 */
-#define DCRN_BRCRH2 (DCRN_EBIMC_BASE + 0x2) /* Bus Region Config High 2 */
-#define DCRN_BRCRH3 (DCRN_EBIMC_BASE + 0x3) /* Bus Region Config High 3 */
-#define DCRN_BRCRH4 (DCRN_EBIMC_BASE + 0x4) /* Bus Region Config High 4 */
-#define DCRN_BRCRH5 (DCRN_EBIMC_BASE + 0x5) /* Bus Region Config High 5 */
-#define DCRN_BRCRH6 (DCRN_EBIMC_BASE + 0x6) /* Bus Region Config High 6 */
-#define DCRN_BRCRH7 (DCRN_EBIMC_BASE + 0x7) /* Bus Region Config High 7 */
-#define DCRN_BRCR0 (DCRN_EBIMC_BASE + 0x10) /* BRC 0 */
-#define DCRN_BRCR1 (DCRN_EBIMC_BASE + 0x11) /* BRC 1 */
-#define DCRN_BRCR2 (DCRN_EBIMC_BASE + 0x12) /* BRC 2 */
-#define DCRN_BRCR3 (DCRN_EBIMC_BASE + 0x13) /* BRC 3 */
-#define DCRN_BRCR4 (DCRN_EBIMC_BASE + 0x14) /* BRC 4 */
-#define DCRN_BRCR5 (DCRN_EBIMC_BASE + 0x15) /* BRC 5 */
-#define DCRN_BRCR6 (DCRN_EBIMC_BASE + 0x16) /* BRC 6 */
-#define DCRN_BRCR7 (DCRN_EBIMC_BASE + 0x17) /* BRC 7 */
-#define DCRN_BEAR0 (DCRN_EBIMC_BASE + 0x20) /* Bus Error Address Register */
-#define DCRN_BESR0 (DCRN_EBIMC_BASE + 0x21) /* Bus Error Status Register */
-#define DCRN_BIUCR (DCRN_EBIMC_BASE + 0x2A) /* Bus Interfac Unit Ctrl Reg */
-
-#include <asm/ibm405.h>
-
-#endif /* __ASM_IBMSTB4_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ibmstbx25.c b/arch/ppc/platforms/4xx/ibmstbx25.c
deleted file mode 100644
index 090ddcb..0000000
--- a/arch/ppc/platforms/4xx/ibmstbx25.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <asm/ocp.h>
-#include <platforms/4xx/ibmstbx25.h>
-#include <asm/ppc4xx_pic.h>
-
-static struct ocp_func_iic_data ibmstbx25_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] __initdata = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = UART0_IO_BASE,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = UART1_IO_BASE,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 2,
- .paddr = UART2_IO_BASE,
- .irq = UART2_INT,
- .pm = IBM_CPM_UART2,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .paddr = IIC0_BASE,
- .irq = IIC0_IRQ,
- .pm = IBM_CPM_IIC0,
- .additions = &ibmstbx25_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .paddr = GPIO0_BASE,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0xffff8f80,
- .triggering = 0x00000000,
- .ext_irq_mask = 0x0000707f, /* IRQ7 - IRQ9, IRQ0 - IRQ6 */
- }
-};
diff --git a/arch/ppc/platforms/4xx/ibmstbx25.h b/arch/ppc/platforms/4xx/ibmstbx25.h
deleted file mode 100644
index 31b6334..0000000
--- a/arch/ppc/platforms/4xx/ibmstbx25.h
+++ /dev/null
@@ -1,258 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBMSTBX25_H__
-#define __ASM_IBMSTBX25_H__
-
-
-/* serial port defines */
-#define STBx25xx_IO_BASE ((uint)0xe0000000)
-#define PPC4xx_ONB_IO_PADDR STBx25xx_IO_BASE
-#define PPC4xx_ONB_IO_VADDR ((uint)0xe0000000)
-#define PPC4xx_ONB_IO_SIZE ((uint)14*64*1024)
-
-/*
- * map STBxxxx internal i/o address (0x400x00xx) to an address
- * which is below the 2GB limit...
- *
- * 4000 000x uart1 -> 0xe000 000x
- * 4001 00xx uart2
- * 4002 00xx smart card
- * 4003 000x iic
- * 4004 000x uart0
- * 4005 0xxx timer
- * 4006 00xx gpio
- * 4007 00xx smart card
- * 400b 000x iic
- * 400c 000x scp
- * 400d 000x modem
- * 400e 000x uart2
-*/
-#define STBx25xx_MAP_IO_ADDR(a) (((uint)(a)) + (STBx25xx_IO_BASE - 0x40000000))
-
-#define RS_TABLE_SIZE 3
-
-#define OPB_BASE_START 0x40000000
-#define EBIU_BASE_START 0xF0100000
-#define DCR_BASE_START 0x0000
-
-#ifdef __BOOTER__
-#define UART1_IO_BASE 0x40000000
-#define UART2_IO_BASE 0x40010000
-#else
-#define UART1_IO_BASE 0xe0000000
-#define UART2_IO_BASE 0xe0010000
-#endif
-#define SC0_BASE 0x40020000 /* smart card #0 */
-#define IIC0_BASE 0x40030000
-#ifdef __BOOTER__
-#define UART0_IO_BASE 0x40040000
-#else
-#define UART0_IO_BASE 0xe0040000
-#endif
-#define SCC0_BASE 0x40040000 /* Serial 0 controller IrdA */
-#define GPT0_BASE 0x40050000 /* General purpose timers */
-#define GPIO0_BASE 0x40060000
-#define SC1_BASE 0x40070000 /* smart card #1 */
-#define SCP0_BASE 0x400C0000 /* Serial Controller Port */
-#define SSP0_BASE 0x400D0000 /* Sync serial port */
-
-#define IDE0_BASE 0xf0100000
-#define REDWOOD_IDE_CTRL 0xf1100000
-
-#define RTCFPC_IRQ 0
-#define XPORT_IRQ 1
-#define AUD_IRQ 2
-#define AID_IRQ 3
-#define DMA0 4
-#define DMA1_IRQ 5
-#define DMA2_IRQ 6
-#define DMA3_IRQ 7
-#define SC0_IRQ 8
-#define IIC0_IRQ 9
-#define IIR0_IRQ 10
-#define GPT0_IRQ 11
-#define GPT1_IRQ 12
-#define SCP0_IRQ 13
-#define SSP0_IRQ 14
-#define GPT2_IRQ 15 /* count down timer */
-#define SC1_IRQ 16
-/* IRQ 17 - 19 external */
-#define UART0_INT 20
-#define UART1_INT 21
-#define UART2_INT 22
-#define XPTDMA_IRQ 23
-#define DCRIDE_IRQ 24
-/* IRQ 25 - 30 external */
-#define IDE0_IRQ 26
-
-#define IIC_NUMS 1
-#define UART_NUMS 3
-#define IIC_OWN 0x55
-#define IIC_CLOCK 50
-
-#define BD_EMAC_ADDR(e,i) bi_enetaddr[i]
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (u8 *)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#if defined(CONFIG_UART0_TTYS0)
-#define SERIAL_DEBUG_IO_BASE UART0_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1) \
- STD_UART_OP(2)
-#endif
-
-#if defined(CONFIG_UART0_TTYS1)
-#define SERIAL_DEBUG_IO_BASE UART2_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(1) \
- STD_UART_OP(0) \
- STD_UART_OP(2)
-#endif
-
-#if defined(CONFIG_UART0_TTYS2)
-#define SERIAL_DEBUG_IO_BASE UART2_IO_BASE
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(2) \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-#endif
-
-#define DCRN_BE_BASE 0x090
-#define DCRN_DMA0_BASE 0x0C0
-#define DCRN_DMA1_BASE 0x0C8
-#define DCRN_DMA2_BASE 0x0D0
-#define DCRN_DMA3_BASE 0x0D8
-#define DCRNCAP_DMA_CC 1 /* have DMA chained count capability */
-#define DCRN_DMASR_BASE 0x0E0
-#define DCRN_PLB0_BASE 0x054
-#define DCRN_PLB1_BASE 0x064
-#define DCRN_POB0_BASE 0x0B0
-#define DCRN_SCCR_BASE 0x120
-#define DCRN_UIC0_BASE 0x040
-#define DCRN_BE_BASE 0x090
-#define DCRN_DMA0_BASE 0x0C0
-#define DCRN_DMA1_BASE 0x0C8
-#define DCRN_DMA2_BASE 0x0D0
-#define DCRN_DMA3_BASE 0x0D8
-#define DCRN_CIC_BASE 0x030
-#define DCRN_DMASR_BASE 0x0E0
-#define DCRN_EBIMC_BASE 0x070
-#define DCRN_DCRX_BASE 0x020
-#define DCRN_CPMFR_BASE 0x102
-#define DCRN_SCCR_BASE 0x120
-#define DCRN_RTCFP_BASE 0x310
-
-#define UIC0 DCRN_UIC0_BASE
-
-#define IBM_CPM_IIC0 0x80000000 /* IIC 0 interface */
-#define IBM_CPM_CPU 0x10000000 /* PPC405B3 clock control */
-#define IBM_CPM_AUD 0x08000000 /* Audio Decoder */
-#define IBM_CPM_EBIU 0x04000000 /* External Bus Interface Unit */
-#define IBM_CPM_IRR 0x02000000 /* Infrared receiver */
-#define IBM_CPM_DMA 0x01000000 /* DMA controller */
-#define IBM_CPM_UART2 0x00200000 /* Serial Control Port */
-#define IBM_CPM_UART1 0x00100000 /* Serial 1 / Infrared */
-#define IBM_CPM_UART0 0x00080000 /* Serial 0 / 16550 */
-#define IBM_PM_DCRIDE 0x00040000 /* DCR timeout & IDE line Mode clock */
-#define IBM_CPM_SC0 0x00020000 /* Smart Card 0 */
-#define IBM_CPM_VID 0x00010000 /* reserved */
-#define IBM_CPM_SC1 0x00008000 /* Smart Card 0 */
-#define IBM_CPM_XPT0 0x00002000 /* Transport - 54 Mhz */
-#define IBM_CPM_CBS 0x00001000 /* Cross Bar Switch */
-#define IBM_CPM_GPT 0x00000800 /* GPTPWM */
-#define IBM_CPM_GPIO0 0x00000400 /* General Purpose IO 0 */
-#define IBM_CPM_DENC 0x00000200 /* Digital video Encoder */
-#define IBM_CPM_C405T 0x00000100 /* CPU timers */
-#define IBM_CPM_XPT27 0x00000080 /* Transport - 27 Mhz */
-#define IBM_CPM_UIC 0x00000040 /* Universal Interrupt Controller */
-#define IBM_CPM_RTCFPC 0x00000020 /* Realtime clock and front panel */
-#define IBM_CPM_SSP 0x00000010 /* Modem Serial Interface (SSP) */
-#define IBM_CPM_VID2 0x00000002 /* Video Decoder clock domain 2 */
-#define DFLT_IBM4xx_PM ~(IBM_CPM_CPU | IBM_CPM_EBIU | IBM_CPM_DMA \
- | IBM_CPM_CBS | IBM_CPM_XPT0 | IBM_CPM_C405T \
- | IBM_CPM_XPT27 | IBM_CPM_UIC)
-
-#define DCRN_BEAR (DCRN_BE_BASE + 0x0) /* Bus Error Address Register */
-#define DCRN_BESR (DCRN_BE_BASE + 0x1) /* Bus Error Syndrome Register */
-/* DCRN_BESR */
-#define BESR_DSES 0x80000000 /* Data-Side Error Status */
-#define BESR_DMES 0x40000000 /* DMA Error Status */
-#define BESR_RWS 0x20000000 /* Read/Write Status */
-#define BESR_ETMASK 0x1C000000 /* Error Type */
-#define ET_PROT 0
-#define ET_PARITY 1
-#define ET_NCFG 2
-#define ET_BUSERR 4
-#define ET_BUSTO 6
-
-#define CHR1_CETE 0x00800000 /* CPU external timer enable */
-#define CHR1_PCIPW 0x00008000 /* PCI Int enable/Peripheral Write enable */
-
-#define DCRN_CICCR (DCRN_CIC_BASE + 0x0) /* CIC Control Register */
-#define DCRN_DMAS1 (DCRN_CIC_BASE + 0x1) /* DMA Select1 Register */
-#define DCRN_DMAS2 (DCRN_CIC_BASE + 0x2) /* DMA Select2 Register */
-#define DCRN_CICVCR (DCRN_CIC_BASE + 0x3) /* CIC Video COntro Register */
-#define DCRN_CICSEL3 (DCRN_CIC_BASE + 0x5) /* CIC Select 3 Register */
-#define DCRN_SGPO (DCRN_CIC_BASE + 0x6) /* CIC GPIO Output Register */
-#define DCRN_SGPOD (DCRN_CIC_BASE + 0x7) /* CIC GPIO OD Register */
-#define DCRN_SGPTC (DCRN_CIC_BASE + 0x8) /* CIC GPIO Tristate Ctrl Reg */
-#define DCRN_SGPI (DCRN_CIC_BASE + 0x9) /* CIC GPIO Input Reg */
-
-#define DCRN_DCRXICR (DCRN_DCRX_BASE + 0x0) /* Internal Control Register */
-#define DCRN_DCRXISR (DCRN_DCRX_BASE + 0x1) /* Internal Status Register */
-#define DCRN_DCRXECR (DCRN_DCRX_BASE + 0x2) /* External Control Register */
-#define DCRN_DCRXESR (DCRN_DCRX_BASE + 0x3) /* External Status Register */
-#define DCRN_DCRXTAR (DCRN_DCRX_BASE + 0x4) /* Target Address Register */
-#define DCRN_DCRXTDR (DCRN_DCRX_BASE + 0x5) /* Target Data Register */
-#define DCRN_DCRXIGR (DCRN_DCRX_BASE + 0x6) /* Interrupt Generation Register */
-#define DCRN_DCRXBCR (DCRN_DCRX_BASE + 0x7) /* Line Buffer Control Register */
-
-#define DCRN_BRCRH0 (DCRN_EBIMC_BASE + 0x0) /* Bus Region Config High 0 */
-#define DCRN_BRCRH1 (DCRN_EBIMC_BASE + 0x1) /* Bus Region Config High 1 */
-#define DCRN_BRCRH2 (DCRN_EBIMC_BASE + 0x2) /* Bus Region Config High 2 */
-#define DCRN_BRCRH3 (DCRN_EBIMC_BASE + 0x3) /* Bus Region Config High 3 */
-#define DCRN_BRCRH4 (DCRN_EBIMC_BASE + 0x4) /* Bus Region Config High 4 */
-#define DCRN_BRCRH5 (DCRN_EBIMC_BASE + 0x5) /* Bus Region Config High 5 */
-#define DCRN_BRCRH6 (DCRN_EBIMC_BASE + 0x6) /* Bus Region Config High 6 */
-#define DCRN_BRCRH7 (DCRN_EBIMC_BASE + 0x7) /* Bus Region Config High 7 */
-#define DCRN_BRCR0 (DCRN_EBIMC_BASE + 0x10) /* BRC 0 */
-#define DCRN_BRCR1 (DCRN_EBIMC_BASE + 0x11) /* BRC 1 */
-#define DCRN_BRCR2 (DCRN_EBIMC_BASE + 0x12) /* BRC 2 */
-#define DCRN_BRCR3 (DCRN_EBIMC_BASE + 0x13) /* BRC 3 */
-#define DCRN_BRCR4 (DCRN_EBIMC_BASE + 0x14) /* BRC 4 */
-#define DCRN_BRCR5 (DCRN_EBIMC_BASE + 0x15) /* BRC 5 */
-#define DCRN_BRCR6 (DCRN_EBIMC_BASE + 0x16) /* BRC 6 */
-#define DCRN_BRCR7 (DCRN_EBIMC_BASE + 0x17) /* BRC 7 */
-#define DCRN_BEAR0 (DCRN_EBIMC_BASE + 0x20) /* Bus Error Address Register */
-#define DCRN_BESR0 (DCRN_EBIMC_BASE + 0x21) /* Bus Error Status Register */
-#define DCRN_BIUCR (DCRN_EBIMC_BASE + 0x2A) /* Bus Interfac Unit Ctrl Reg */
-
-#define DCRN_RTC_FPC0_CNTL (DCRN_RTCFP_BASE + 0x00) /* RTC cntl */
-#define DCRN_RTC_FPC0_INT (DCRN_RTCFP_BASE + 0x01) /* RTC Interrupt */
-#define DCRN_RTC_FPC0_TIME (DCRN_RTCFP_BASE + 0x02) /* RTC time reg */
-#define DCRN_RTC_FPC0_ALRM (DCRN_RTCFP_BASE + 0x03) /* RTC Alarm reg */
-#define DCRN_RTC_FPC0_D1 (DCRN_RTCFP_BASE + 0x04) /* LED Data 1 */
-#define DCRN_RTC_FPC0_D2 (DCRN_RTCFP_BASE + 0x05) /* LED Data 2 */
-#define DCRN_RTC_FPC0_D3 (DCRN_RTCFP_BASE + 0x06) /* LED Data 3 */
-#define DCRN_RTC_FPC0_D4 (DCRN_RTCFP_BASE + 0x07) /* LED Data 4 */
-#define DCRN_RTC_FPC0_D5 (DCRN_RTCFP_BASE + 0x08) /* LED Data 5 */
-#define DCRN_RTC_FPC0_FCNTL (DCRN_RTCFP_BASE + 0x09) /* LED control */
-#define DCRN_RTC_FPC0_BRT (DCRN_RTCFP_BASE + 0x0A) /* Brightness cntl */
-
-#include <asm/ibm405.h>
-
-#endif /* __ASM_IBMSTBX25_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c
deleted file mode 100644
index f6d8c2e..0000000
--- a/arch/ppc/platforms/4xx/luan.c
+++ /dev/null
@@ -1,371 +0,0 @@
-/*
- * Luan board specific routines
- *
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * Copyright 2004-2005 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/blkdev.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/initrd.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/ocp.h>
-#include <asm/pci-bridge.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/ppcboot.h>
-
-#include <syslib/ibm44x_common.h>
-#include <syslib/ibm440gx_common.h>
-#include <syslib/ibm440sp_common.h>
-
-extern bd_t __res;
-
-static struct ibm44x_clocks clocks __initdata;
-
-static void __init
-luan_calibrate_decr(void)
-{
- unsigned int freq;
-
- if (mfspr(SPRN_CCR1) & CCR1_TCS)
- freq = LUAN_TMR_CLK;
- else
- freq = clocks.cpu;
-
- ibm44x_calibrate_decr(freq);
-}
-
-static int
-luan_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: IBM\n");
- seq_printf(m, "machine\t\t: PPC440SP EVB (Luan)\n");
-
- return 0;
-}
-
-static inline int
-luan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
-
- /* PCIX0 in adapter mode, no host interrupt routing */
-
- /* PCIX1 */
- if (hose->index == 0) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 49, 49, 49, 49 }, /* IDSEL 1 - PCIX1 Slot 0 */
- { 49, 49, 49, 49 }, /* IDSEL 2 - PCIX1 Slot 1 */
- { 49, 49, 49, 49 }, /* IDSEL 3 - PCIX1 Slot 2 */
- { 49, 49, 49, 49 }, /* IDSEL 4 - PCIX1 Slot 3 */
- };
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- /* PCIX2 */
- } else if (hose->index == 1) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 50, 50, 50, 50 }, /* IDSEL 1 - PCIX2 Slot 0 */
- { 50, 50, 50, 50 }, /* IDSEL 2 - PCIX2 Slot 1 */
- { 50, 50, 50, 50 }, /* IDSEL 3 - PCIX2 Slot 2 */
- { 50, 50, 50, 50 }, /* IDSEL 4 - PCIX2 Slot 3 */
- };
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
- return -1;
-}
-
-static void __init luan_set_emacdata(void)
-{
- struct ocp_def *def;
- struct ocp_func_emac_data *emacdata;
-
- /* Set phy_map, phy_mode, and mac_addr for the EMAC */
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
- emacdata = def->additions;
- emacdata->phy_map = 0x00000001; /* Skip 0x00 */
- emacdata->phy_mode = PHY_MODE_GMII;
- memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
-}
-
-#define PCIX_READW(offset) \
- (readw((void *)((u32)pcix_reg_base+offset)))
-
-#define PCIX_WRITEW(value, offset) \
- (writew(value, (void *)((u32)pcix_reg_base+offset)))
-
-#define PCIX_WRITEL(value, offset) \
- (writel(value, (void *)((u32)pcix_reg_base+offset)))
-
-static void __init
-luan_setup_pcix(void)
-{
- int i;
- void *pcix_reg_base;
-
- for (i=0;i<3;i++) {
- pcix_reg_base = ioremap64(PCIX0_REG_BASE + i*PCIX_REG_OFFSET, PCIX_REG_SIZE);
-
- /* Enable PCIX0 I/O, Mem, and Busmaster cycles */
- PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND);
-
- /* Disable all windows */
- PCIX_WRITEL(0, PCIX0_POM0SA);
- PCIX_WRITEL(0, PCIX0_POM1SA);
- PCIX_WRITEL(0, PCIX0_POM2SA);
- PCIX_WRITEL(0, PCIX0_PIM0SA);
- PCIX_WRITEL(0, PCIX0_PIM0SAH);
- PCIX_WRITEL(0, PCIX0_PIM1SA);
- PCIX_WRITEL(0, PCIX0_PIM2SA);
- PCIX_WRITEL(0, PCIX0_PIM2SAH);
-
- /*
- * Setup 512MB PLB->PCI outbound mem window
- * (a_n000_0000->0_n000_0000)
- * */
- PCIX_WRITEL(0x0000000a, PCIX0_POM0LAH);
- PCIX_WRITEL(0x80000000 | i*LUAN_PCIX_MEM_SIZE, PCIX0_POM0LAL);
- PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH);
- PCIX_WRITEL(0x80000000 | i*LUAN_PCIX_MEM_SIZE, PCIX0_POM0PCIAL);
- PCIX_WRITEL(0xe0000001, PCIX0_POM0SA);
-
- /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
- PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
- PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
- PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA);
- PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH);
-
- iounmap(pcix_reg_base);
- }
-
- eieio();
-}
-
-static void __init
-luan_setup_hose(struct pci_controller *hose,
- int lower_mem,
- int upper_mem,
- int cfga,
- int cfgd,
- u64 pcix_io_base)
-{
- char name[20];
-
- sprintf(name, "PCIX%d host bridge", hose->index);
-
- hose->pci_mem_offset = LUAN_PCIX_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource,
- LUAN_PCIX_LOWER_IO,
- LUAN_PCIX_UPPER_IO,
- IORESOURCE_IO,
- name);
-
- pci_init_resource(&hose->mem_resources[0],
- lower_mem,
- upper_mem,
- IORESOURCE_MEM,
- name);
-
- hose->io_space.start = LUAN_PCIX_LOWER_IO;
- hose->io_space.end = LUAN_PCIX_UPPER_IO;
- hose->mem_space.start = lower_mem;
- hose->mem_space.end = upper_mem;
- hose->io_base_virt = ioremap64(pcix_io_base, PCIX_IO_SIZE);
- isa_io_base = (unsigned long) hose->io_base_virt;
-
- setup_indirect_pci(hose, cfga, cfgd);
- hose->set_cfg_type = 1;
-}
-
-static void __init
-luan_setup_hoses(void)
-{
- struct pci_controller *hose1, *hose2;
-
- /* Configure windows on the PCI-X host bridge */
- luan_setup_pcix();
-
- /* Allocate hoses for PCIX1 and PCIX2 */
- hose1 = pcibios_alloc_controller();
- if (!hose1)
- return;
-
- hose2 = pcibios_alloc_controller();
- if (!hose2) {
- pcibios_free_controller(hose1);
- return;
- }
-
- /* Setup PCIX1 */
- hose1->first_busno = 0;
- hose1->last_busno = 0xff;
-
- luan_setup_hose(hose1,
- LUAN_PCIX1_LOWER_MEM,
- LUAN_PCIX1_UPPER_MEM,
- PCIX1_CFGA,
- PCIX1_CFGD,
- PCIX1_IO_BASE);
-
- hose1->last_busno = pciauto_bus_scan(hose1, hose1->first_busno);
-
- /* Setup PCIX2 */
- hose2->first_busno = hose1->last_busno + 1;
- hose2->last_busno = 0xff;
-
- luan_setup_hose(hose2,
- LUAN_PCIX2_LOWER_MEM,
- LUAN_PCIX2_UPPER_MEM,
- PCIX2_CFGA,
- PCIX2_CFGD,
- PCIX2_IO_BASE);
-
- hose2->last_busno = pciauto_bus_scan(hose2, hose2->first_busno);
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = luan_map_irq;
-}
-
-TODC_ALLOC();
-
-static void __init
-luan_early_serial_map(void)
-{
- struct uart_port port;
-
- /* Setup ioremapped serial port access */
- memset(&port, 0, sizeof(port));
- port.membase = ioremap64(PPC440SP_UART0_ADDR, 8);
- port.irq = UART0_INT;
- port.uartclk = clocks.uart0;
- port.regshift = 0;
- port.iotype = UPIO_MEM;
- port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- port.line = 0;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 0 failed\n");
- }
-
- port.membase = ioremap64(PPC440SP_UART1_ADDR, 8);
- port.irq = UART1_INT;
- port.uartclk = clocks.uart1;
- port.line = 1;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 1 failed\n");
- }
-
- port.membase = ioremap64(PPC440SP_UART2_ADDR, 8);
- port.irq = UART2_INT;
- port.uartclk = BASE_BAUD;
- port.line = 2;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 2 failed\n");
- }
-}
-
-static void __init
-luan_setup_arch(void)
-{
- luan_set_emacdata();
-
-#if !defined(CONFIG_BDI_SWITCH)
- /*
- * The Abatron BDI JTAG debugger does not tolerate others
- * mucking with the debug registers.
- */
- mtspr(SPRN_DBCR0, (DBCR0_TDE | DBCR0_IDM));
-#endif
-
- /*
- * Determine various clocks.
- * To be completely correct we should get SysClk
- * from FPGA, because it can be changed by on-board switches
- * --ebs
- */
- /* 440GX and 440SP clocking is the same -mdp */
- ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
- ocp_sys_info.opb_bus_freq = clocks.opb;
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000/HZ;
-
- /* Setup PCIXn host bridges */
- luan_setup_hoses();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- luan_early_serial_map();
-
- /* Identify the system */
- printk("Luan port (MontaVista Software, Inc. <source@mvista.com>)\n");
-}
-
-void __init platform_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7)
-{
- ibm44x_platform_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = luan_setup_arch;
- ppc_md.show_cpuinfo = luan_show_cpuinfo;
- ppc_md.find_end_of_memory = ibm440sp_find_end_of_memory;
- ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
-
- ppc_md.calibrate_decr = luan_calibrate_decr;
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = luan_early_serial_map;
-#endif
-}
diff --git a/arch/ppc/platforms/4xx/luan.h b/arch/ppc/platforms/4xx/luan.h
deleted file mode 100644
index 68dd46b..0000000
--- a/arch/ppc/platforms/4xx/luan.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Luan board definitions
- *
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * Copyright 2004-2005 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_LUAN_H__
-#define __ASM_LUAN_H__
-
-#include <platforms/4xx/ibm440sp.h>
-
-/* F/W TLB mapping used in bootloader glue to reset EMAC */
-#define PPC44x_EMAC0_MR0 0xa0000800
-
-/* Location of MAC addresses in PIBS image */
-#define PIBS_FLASH_BASE 0xffe00000
-#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400)
-
-/* External timer clock frequency */
-#define LUAN_TMR_CLK 25000000
-
-/* Flash */
-#define LUAN_FPGA_REG_0 0x0000000148300000ULL
-#define LUAN_BOOT_LARGE_FLASH(x) (x & 0x40)
-#define LUAN_SMALL_FLASH_LOW 0x00000001ff900000ULL
-#define LUAN_SMALL_FLASH_HIGH 0x00000001ffe00000ULL
-#define LUAN_SMALL_FLASH_SIZE 0x100000
-#define LUAN_LARGE_FLASH_LOW 0x00000001ff800000ULL
-#define LUAN_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
-#define LUAN_LARGE_FLASH_SIZE 0x400000
-
-/*
- * Serial port defines
- */
-#define RS_TABLE_SIZE 3
-
-/* PIBS defined UART mappings, used before early_serial_setup */
-#define UART0_IO_BASE 0xa0000200
-#define UART1_IO_BASE 0xa0000300
-#define UART2_IO_BASE 0xa0000600
-
-#define BASE_BAUD 11059200
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (void*)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1) \
- STD_UART_OP(2)
-
-/* PCI support */
-#define LUAN_PCIX_LOWER_IO 0x00000000
-#define LUAN_PCIX_UPPER_IO 0x0000ffff
-#define LUAN_PCIX0_LOWER_MEM 0x80000000
-#define LUAN_PCIX0_UPPER_MEM 0x9fffffff
-#define LUAN_PCIX1_LOWER_MEM 0xa0000000
-#define LUAN_PCIX1_UPPER_MEM 0xbfffffff
-#define LUAN_PCIX2_LOWER_MEM 0xc0000000
-#define LUAN_PCIX2_UPPER_MEM 0xdfffffff
-
-#define LUAN_PCIX_MEM_SIZE 0x20000000
-#define LUAN_PCIX_MEM_OFFSET 0x00000000
-
-#endif /* __ASM_LUAN_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
deleted file mode 100644
index 308386e..0000000
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ /dev/null
@@ -1,350 +0,0 @@
-/*
- * Ocotea board specific routines
- *
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * Copyright 2003-2005 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/blkdev.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/initrd.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/ocp.h>
-#include <asm/pci-bridge.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/ppcboot.h>
-#include <asm/tlbflush.h>
-
-#include <syslib/gen550.h>
-#include <syslib/ibm440gx_common.h>
-
-extern bd_t __res;
-
-static struct ibm44x_clocks clocks __initdata;
-
-static void __init
-ocotea_calibrate_decr(void)
-{
- unsigned int freq;
-
- if (mfspr(SPRN_CCR1) & CCR1_TCS)
- freq = OCOTEA_TMR_CLK;
- else
- freq = clocks.cpu;
-
- ibm44x_calibrate_decr(freq);
-}
-
-static int
-ocotea_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: IBM\n");
- seq_printf(m, "machine\t\t: PPC440GX EVB (Ocotea)\n");
- ibm440gx_show_cpuinfo(m);
- return 0;
-}
-
-static inline int
-ocotea_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 23, 23, 23, 23 }, /* IDSEL 1 - PCI Slot 0 */
- { 24, 24, 24, 24 }, /* IDSEL 2 - PCI Slot 1 */
- { 25, 25, 25, 25 }, /* IDSEL 3 - PCI Slot 2 */
- { 26, 26, 26, 26 }, /* IDSEL 4 - PCI Slot 3 */
- };
-
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static void __init ocotea_set_emacdata(void)
-{
- struct ocp_def *def;
- struct ocp_func_emac_data *emacdata;
- int i;
-
- /*
- * Note: Current rev. board only operates in Group 4a
- * mode, so we always set EMAC0-1 for SMII and EMAC2-3
- * for RGMII (though these could run in RTBI just the same).
- *
- * The FPGA reg 3 information isn't even suitable for
- * determining the phy_mode, so if the board becomes
- * usable in !4a, it will be necessary to parse an environment
- * variable from the firmware or similar to properly configure
- * the phy_map/phy_mode.
- */
- /* Set phy_map, phy_mode, and mac_addr for each EMAC */
- for (i=0; i<4; i++) {
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i);
- emacdata = def->additions;
- if (i < 2) {
- emacdata->phy_map = 0x00000001; /* Skip 0x00 */
- emacdata->phy_mode = PHY_MODE_SMII;
- }
- else {
- emacdata->phy_map = 0x0000ffff; /* Skip 0x00-0x0f */
- emacdata->phy_mode = PHY_MODE_RGMII;
- }
- if (i == 0)
- memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
- else if (i == 1)
- memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
- else if (i == 2)
- memcpy(emacdata->mac_addr, __res.bi_enet2addr, 6);
- else if (i == 3)
- memcpy(emacdata->mac_addr, __res.bi_enet3addr, 6);
- }
-}
-
-#define PCIX_READW(offset) \
- (readw(pcix_reg_base+offset))
-
-#define PCIX_WRITEW(value, offset) \
- (writew(value, pcix_reg_base+offset))
-
-#define PCIX_WRITEL(value, offset) \
- (writel(value, pcix_reg_base+offset))
-
-/*
- * FIXME: This is only here to "make it work". This will move
- * to a ibm_pcix.c which will contain a generic IBM PCIX bridge
- * configuration library. -Matt
- */
-static void __init
-ocotea_setup_pcix(void)
-{
- void *pcix_reg_base;
-
- pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE);
-
- /* Enable PCIX0 I/O, Mem, and Busmaster cycles */
- PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND);
-
- /* Disable all windows */
- PCIX_WRITEL(0, PCIX0_POM0SA);
- PCIX_WRITEL(0, PCIX0_POM1SA);
- PCIX_WRITEL(0, PCIX0_POM2SA);
- PCIX_WRITEL(0, PCIX0_PIM0SA);
- PCIX_WRITEL(0, PCIX0_PIM0SAH);
- PCIX_WRITEL(0, PCIX0_PIM1SA);
- PCIX_WRITEL(0, PCIX0_PIM2SA);
- PCIX_WRITEL(0, PCIX0_PIM2SAH);
-
- /* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */
- PCIX_WRITEL(0x00000003, PCIX0_POM0LAH);
- PCIX_WRITEL(0x80000000, PCIX0_POM0LAL);
- PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH);
- PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL);
- PCIX_WRITEL(0x80000001, PCIX0_POM0SA);
-
- /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
- PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
- PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
- PCIX_WRITEL(0x80000007, PCIX0_PIM0SA);
-
- eieio();
-}
-
-static void __init
-ocotea_setup_hose(void)
-{
- struct pci_controller *hose;
-
- /* Configure windows on the PCI-X host bridge */
- ocotea_setup_pcix();
-
- hose = pcibios_alloc_controller();
-
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- hose->pci_mem_offset = OCOTEA_PCI_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource,
- OCOTEA_PCI_LOWER_IO,
- OCOTEA_PCI_UPPER_IO,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0],
- OCOTEA_PCI_LOWER_MEM,
- OCOTEA_PCI_UPPER_MEM,
- IORESOURCE_MEM,
- "PCI host bridge");
-
- hose->io_space.start = OCOTEA_PCI_LOWER_IO;
- hose->io_space.end = OCOTEA_PCI_UPPER_IO;
- hose->mem_space.start = OCOTEA_PCI_LOWER_MEM;
- hose->mem_space.end = OCOTEA_PCI_UPPER_MEM;
- hose->io_base_virt = ioremap64(OCOTEA_PCI_IO_BASE, OCOTEA_PCI_IO_SIZE);
- isa_io_base = (unsigned long) hose->io_base_virt;
-
- setup_indirect_pci(hose,
- OCOTEA_PCI_CFGA_PLB32,
- OCOTEA_PCI_CFGD_PLB32);
- hose->set_cfg_type = 1;
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = ocotea_map_irq;
-}
-
-
-TODC_ALLOC();
-
-static void __init
-ocotea_early_serial_map(void)
-{
- struct uart_port port;
-
- /* Setup ioremapped serial port access */
- memset(&port, 0, sizeof(port));
- port.membase = ioremap64(PPC440GX_UART0_ADDR, 8);
- port.irq = UART0_INT;
- port.uartclk = clocks.uart0;
- port.regshift = 0;
- port.iotype = UPIO_MEM;
- port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- port.line = 0;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 0 failed\n");
- }
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(0, &port);
-
- /* Purge TLB entry added in head_44x.S for early serial access */
- _tlbie(UART0_IO_BASE, 0);
-#endif
-
- port.membase = ioremap64(PPC440GX_UART1_ADDR, 8);
- port.irq = UART1_INT;
- port.uartclk = clocks.uart1;
- port.line = 1;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 1 failed\n");
- }
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(1, &port);
-#endif
-}
-
-static void __init
-ocotea_setup_arch(void)
-{
- ocotea_set_emacdata();
-
- ibm440gx_tah_enable();
-
- /*
- * Determine various clocks.
- * To be completely correct we should get SysClk
- * from FPGA, because it can be changed by on-board switches
- * --ebs
- */
- ibm440gx_get_clocks(&clocks, 33300000, 6 * 1843200);
- ocp_sys_info.opb_bus_freq = clocks.opb;
-
- /* Setup TODC access */
- TODC_INIT(TODC_TYPE_DS1743,
- 0,
- 0,
- ioremap64(OCOTEA_RTC_ADDR, OCOTEA_RTC_SIZE),
- 8);
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000/HZ;
-
- /* Setup PCI host bridge */
- ocotea_setup_hose();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- ocotea_early_serial_map();
-
- /* Identify the system */
- printk("IBM Ocotea port (MontaVista Software, Inc. <source@mvista.com>)\n");
-}
-
-static void __init ocotea_init(void)
-{
- ibm440gx_l2c_setup(&clocks);
-}
-
-void __init platform_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7)
-{
- ibm440gx_platform_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = ocotea_setup_arch;
- ppc_md.show_cpuinfo = ocotea_show_cpuinfo;
- ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
-
- ppc_md.calibrate_decr = ocotea_calibrate_decr;
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = ocotea_early_serial_map;
-#endif
- ppc_md.init = ocotea_init;
-}
diff --git a/arch/ppc/platforms/4xx/ocotea.h b/arch/ppc/platforms/4xx/ocotea.h
deleted file mode 100644
index 89730ce..0000000
--- a/arch/ppc/platforms/4xx/ocotea.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * Ocotea board definitions
- *
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * Copyright 2003-2005 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_OCOTEA_H__
-#define __ASM_OCOTEA_H__
-
-#include <platforms/4xx/ibm440gx.h>
-
-/* F/W TLB mapping used in bootloader glue to reset EMAC */
-#define PPC44x_EMAC0_MR0 0xe0000800
-
-/* Location of MAC addresses in PIBS image */
-#define PIBS_FLASH_BASE 0xfff00000
-#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0xb0500)
-#define PIBS_MAC_SIZE 0x200
-#define PIBS_MAC_OFFSET 0x100
-
-/* External timer clock frequency */
-#define OCOTEA_TMR_CLK 25000000
-
-/* RTC/NVRAM location */
-#define OCOTEA_RTC_ADDR 0x0000000148000000ULL
-#define OCOTEA_RTC_SIZE 0x2000
-
-/* Flash */
-#define OCOTEA_FPGA_REG_0 0x0000000148300000ULL
-#define OCOTEA_BOOT_LARGE_FLASH(x) (x & 0x40)
-#define OCOTEA_SMALL_FLASH_LOW 0x00000001ff900000ULL
-#define OCOTEA_SMALL_FLASH_HIGH 0x00000001fff00000ULL
-#define OCOTEA_SMALL_FLASH_SIZE 0x100000
-#define OCOTEA_LARGE_FLASH_LOW 0x00000001ff800000ULL
-#define OCOTEA_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
-#define OCOTEA_LARGE_FLASH_SIZE 0x400000
-
-/* FPGA_REG_3 (Ethernet Groups) */
-#define OCOTEA_FPGA_REG_3 0x0000000148300003ULL
-
-/*
- * Serial port defines
- */
-#define RS_TABLE_SIZE 2
-
-#if defined(__BOOTER__)
-/* OpenBIOS defined UART mappings, used by bootloader shim */
-#define UART0_IO_BASE 0xE0000200
-#define UART1_IO_BASE 0xE0000300
-#else
-/* head_44x.S created UART mapping, used before early_serial_setup.
- * We cannot use default OpenBIOS UART mappings because they
- * don't work for configurations with more than 512M RAM. --ebs
- */
-#define UART0_IO_BASE 0xF0000200
-#define UART1_IO_BASE 0xF0000300
-#endif
-
-#define BASE_BAUD 11059200/16
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (void*)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-
-/* PCI support */
-#define OCOTEA_PCI_LOWER_IO 0x00000000
-#define OCOTEA_PCI_UPPER_IO 0x0000ffff
-#define OCOTEA_PCI_LOWER_MEM 0x80000000
-#define OCOTEA_PCI_UPPER_MEM 0xffffefff
-
-#define OCOTEA_PCI_CFGREGS_BASE 0x000000020ec00000ULL
-#define OCOTEA_PCI_CFGA_PLB32 0x0ec00000
-#define OCOTEA_PCI_CFGD_PLB32 0x0ec00004
-
-#define OCOTEA_PCI_IO_BASE 0x0000000208000000ULL
-#define OCOTEA_PCI_IO_SIZE 0x00010000
-#define OCOTEA_PCI_MEM_OFFSET 0x00000000
-
-#endif /* __ASM_OCOTEA_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/ppc440spe.c b/arch/ppc/platforms/4xx/ppc440spe.c
deleted file mode 100644
index 1be5d1c..0000000
--- a/arch/ppc/platforms/4xx/ppc440spe.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * PPC440SPe I/O descriptions
- *
- * Roland Dreier <rolandd@cisco.com>
- * Copyright (c) 2005 Cisco Systems. All rights reserved.
- *
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2002-2005 MontaVista Software Inc.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/init.h>
-#include <linux/module.h>
-#include <platforms/4xx/ppc440spe.h>
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-
-static struct ocp_func_emac_data ppc440spe_emac0_def = {
- .rgmii_idx = -1, /* No RGMII */
- .rgmii_mux = -1, /* No RGMII */
- .zmii_idx = -1, /* No ZMII */
- .zmii_mux = -1, /* No ZMII */
- .mal_idx = 0, /* MAL device index */
- .mal_rx_chan = 0, /* MAL rx channel number */
- .mal_tx_chan = 0, /* MAL tx channel number */
- .wol_irq = 61, /* WOL interrupt number */
- .mdio_idx = -1, /* No shared MDIO */
- .tah_idx = -1, /* No TAH */
-};
-OCP_SYSFS_EMAC_DATA()
-
-static struct ocp_func_mal_data ppc440spe_mal0_def = {
- .num_tx_chans = 1, /* Number of TX channels */
- .num_rx_chans = 1, /* Number of RX channels */
- .txeob_irq = 38, /* TX End Of Buffer IRQ */
- .rxeob_irq = 39, /* RX End Of Buffer IRQ */
- .txde_irq = 34, /* TX Descriptor Error IRQ */
- .rxde_irq = 35, /* RX Descriptor Error IRQ */
- .serr_irq = 33, /* MAL System Error IRQ */
- .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
-};
-OCP_SYSFS_MAL_DATA()
-
-static struct ocp_func_iic_data ppc440spe_iic0_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-
-static struct ocp_func_iic_data ppc440spe_iic1_def = {
- .fast_mode = 0, /* Use standad mode (100Khz) */
-};
-OCP_SYSFS_IIC_DATA()
-
-struct ocp_def core_ocp[] = {
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 0,
- .paddr = PPC440SPE_UART0_ADDR,
- .irq = UART0_INT,
- .pm = IBM_CPM_UART0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 1,
- .paddr = PPC440SPE_UART1_ADDR,
- .irq = UART1_INT,
- .pm = IBM_CPM_UART1,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_16550,
- .index = 2,
- .paddr = PPC440SPE_UART2_ADDR,
- .irq = UART2_INT,
- .pm = IBM_CPM_UART2,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 0,
- .paddr = 0x00000004f0000400ULL,
- .irq = 2,
- .pm = IBM_CPM_IIC0,
- .additions = &ppc440spe_iic0_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_IIC,
- .index = 1,
- .paddr = 0x00000004f0000500ULL,
- .irq = 3,
- .pm = IBM_CPM_IIC1,
- .additions = &ppc440spe_iic1_def,
- .show = &ocp_show_iic_data
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_GPIO,
- .index = 0,
- .paddr = 0x00000004f0000700ULL,
- .irq = OCP_IRQ_NA,
- .pm = IBM_CPM_GPIO0,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_MAL,
- .paddr = OCP_PADDR_NA,
- .irq = OCP_IRQ_NA,
- .pm = OCP_CPM_NA,
- .additions = &ppc440spe_mal0_def,
- .show = &ocp_show_mal_data,
- },
- { .vendor = OCP_VENDOR_IBM,
- .function = OCP_FUNC_EMAC,
- .index = 0,
- .paddr = 0x00000004f0000800ULL,
- .irq = 60,
- .pm = OCP_CPM_NA,
- .additions = &ppc440spe_emac0_def,
- .show = &ocp_show_emac_data,
- },
- { .vendor = OCP_VENDOR_INVALID
- }
-};
-
-/* Polarity and triggering settings for internal interrupt sources */
-struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
- { .polarity = 0xffffffff,
- .triggering = 0x010f0004,
- .ext_irq_mask = 0x00000000,
- },
- { .polarity = 0xffffffff,
- .triggering = 0x001f8040,
- .ext_irq_mask = 0x00007c30, /* IRQ6 - IRQ7, IRQ8 - IRQ12 */
- },
- { .polarity = 0xffffffff,
- .triggering = 0x00000000,
- .ext_irq_mask = 0x000000fc, /* IRQ0 - IRQ5 */
- },
- { .polarity = 0xffffffff,
- .triggering = 0x00000000,
- .ext_irq_mask = 0x00000000,
- },
-};
diff --git a/arch/ppc/platforms/4xx/ppc440spe.h b/arch/ppc/platforms/4xx/ppc440spe.h
deleted file mode 100644
index f1e867c..0000000
--- a/arch/ppc/platforms/4xx/ppc440spe.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * PPC440SPe definitions
- *
- * Roland Dreier <rolandd@cisco.com>
- * Copyright (c) 2005 Cisco Systems. All rights reserved.
- *
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2004-2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifdef __KERNEL__
-#ifndef __PPC_PLATFORMS_PPC440SPE_H
-#define __PPC_PLATFORMS_PPC440SPE_H
-
-
-#include <asm/ibm44x.h>
-
-/* UART */
-#define PPC440SPE_UART0_ADDR 0x00000004f0000200ULL
-#define PPC440SPE_UART1_ADDR 0x00000004f0000300ULL
-#define PPC440SPE_UART2_ADDR 0x00000004f0000600ULL
-#define UART0_INT 0
-#define UART1_INT 1
-#define UART2_INT 37
-
-/* Clock and Power Management */
-#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
-#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
-#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
-#define IBM_CPM_CPU 0x02000000 /* processor core */
-#define IBM_CPM_DMA 0x01000000 /* DMA controller */
-#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
-#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
-#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */
-#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
-#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
-#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */
-#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */
-#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
-#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
-#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
-#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
-#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
-#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
-#define IBM_CPM_UART2 0x00000100 /* serial port 1 */
-#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
-#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
-#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */
-
-#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \
- | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \
- | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \
- | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \
- | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \
- | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \
- | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 )
-#endif /* __PPC_PLATFORMS_PPC440SP_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/redwood5.c b/arch/ppc/platforms/4xx/redwood5.c
deleted file mode 100644
index edf4d37..0000000
--- a/arch/ppc/platforms/4xx/redwood5.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Support for the IBM redwood5 eval board file
- *
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2000-2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/pagemap.h>
-#include <linux/platform_device.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/ppc4xx_pic.h>
-
-/*
- * Define external IRQ senses and polarities.
- */
-unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 4 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 5 */
-};
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = SMC91111_BASE_ADDR,
- .end = SMC91111_BASE_ADDR + SMC91111_REG_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = SMC91111_IRQ,
- .end = SMC91111_IRQ,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static struct platform_device *redwood5_devs[] __initdata = {
- &smc91x_device,
-};
-
-static int __init
-redwood5_platform_add_devices(void)
-{
- return platform_add_devices(redwood5_devs, ARRAY_SIZE(redwood5_devs));
-}
-
-void __init
-redwood5_setup_arch(void)
-{
- ppc4xx_setup_arch();
-
-#ifdef CONFIG_DEBUG_BRINGUP
- printk("\n");
- printk("machine\t: %s\n", PPC4xx_MACHINE_NAME);
- printk("\n");
- printk("bi_s_version\t %s\n", bip->bi_s_version);
- printk("bi_r_version\t %s\n", bip->bi_r_version);
- printk("bi_memsize\t 0x%8.8x\t %dMBytes\n", bip->bi_memsize,bip->bi_memsize/(1024*1000));
- printk("bi_enetaddr %d\t %2.2x%2.2x%2.2x-%2.2x%2.2x%2.2x\n", 0,
- bip->bi_enetaddr[0], bip->bi_enetaddr[1],
- bip->bi_enetaddr[2], bip->bi_enetaddr[3],
- bip->bi_enetaddr[4], bip->bi_enetaddr[5]);
-
- printk("bi_intfreq\t 0x%8.8x\t clock:\t %dMhz\n",
- bip->bi_intfreq, bip->bi_intfreq/ 1000000);
-
- printk("bi_busfreq\t 0x%8.8x\t plb bus clock:\t %dMHz\n",
- bip->bi_busfreq, bip->bi_busfreq / 1000000 );
- printk("bi_tbfreq\t 0x%8.8x\t TB freq:\t %dMHz\n",
- bip->bi_tbfreq, bip->bi_tbfreq/1000000);
-
- printk("\n");
-#endif
- device_initcall(redwood5_platform_add_devices);
-}
-
-void __init
-redwood5_map_io(void)
-{
- int i;
-
- ppc4xx_map_io();
- for (i = 0; i < 16; i++) {
- unsigned long v, p;
-
- /* 0x400x0000 -> 0xe00x0000 */
- p = 0x40000000 | (i << 16);
- v = STB04xxx_IO_BASE | (i << 16);
-
- io_block_mapping(v, p, PAGE_SIZE,
- _PAGE_NO_CACHE | pgprot_val(PAGE_KERNEL) | _PAGE_GUARDED);
- }
-
-
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = redwood5_setup_arch;
- ppc_md.setup_io_mappings = redwood5_map_io;
-}
diff --git a/arch/ppc/platforms/4xx/redwood5.h b/arch/ppc/platforms/4xx/redwood5.h
deleted file mode 100644
index 49edd48..0000000
--- a/arch/ppc/platforms/4xx/redwood5.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Macros, definitions, and data structures specific to the IBM PowerPC
- * STB03xxx "Redwood" evaluation board.
- *
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_REDWOOD5_H__
-#define __ASM_REDWOOD5_H__
-
-/* Redwood5 has an STB04xxx core */
-#include <platforms/4xx/ibmstb4.h>
-
-#ifndef __ASSEMBLY__
-typedef struct board_info {
- unsigned char bi_s_version[4]; /* Version of this structure */
- unsigned char bi_r_version[30]; /* Version of the IBM ROM */
- unsigned int bi_memsize; /* DRAM installed, in bytes */
- unsigned int bi_dummy; /* field shouldn't exist */
- unsigned char bi_enetaddr[6]; /* Ethernet MAC address */
- unsigned int bi_intfreq; /* Processor speed, in Hz */
- unsigned int bi_busfreq; /* Bus speed, in Hz */
- unsigned int bi_tbfreq; /* Software timebase freq */
-} bd_t;
-#endif /* !__ASSEMBLY__ */
-
-
-#define SMC91111_BASE_ADDR 0xf2000300
-#define SMC91111_REG_SIZE 16
-#define SMC91111_IRQ 28
-
-#ifdef MAX_HWIFS
-#undef MAX_HWIFS
-#endif
-#define MAX_HWIFS 1
-
-#define _IO_BASE 0
-#define _ISA_MEM_BASE 0
-#define PCI_DRAM_OFFSET 0
-
-#define BASE_BAUD (378000000 / 18 / 16)
-
-#define PPC4xx_MACHINE_NAME "IBM Redwood5"
-
-#endif /* __ASM_REDWOOD5_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/redwood6.c b/arch/ppc/platforms/4xx/redwood6.c
deleted file mode 100644
index 006e29f..0000000
--- a/arch/ppc/platforms/4xx/redwood6.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/pagemap.h>
-#include <linux/platform_device.h>
-#include <linux/ioport.h>
-#include <asm/io.h>
-#include <asm/ppc4xx_pic.h>
-#include <linux/delay.h>
-#include <asm/machdep.h>
-
-/*
- * Define external IRQ senses and polarities.
- */
-unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 7 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 8 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 9 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 4 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 5 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 6 */
-};
-
-static struct resource smc91x_resources[] = {
- [0] = {
- .start = SMC91111_BASE_ADDR,
- .end = SMC91111_BASE_ADDR + SMC91111_REG_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = SMC91111_IRQ,
- .end = SMC91111_IRQ,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device smc91x_device = {
- .name = "smc91x",
- .id = 0,
- .num_resources = ARRAY_SIZE(smc91x_resources),
- .resource = smc91x_resources,
-};
-
-static struct platform_device *redwood6_devs[] __initdata = {
- &smc91x_device,
-};
-
-static int __init
-redwood6_platform_add_devices(void)
-{
- return platform_add_devices(redwood6_devs, ARRAY_SIZE(redwood6_devs));
-}
-
-
-void __init
-redwood6_setup_arch(void)
-{
-#ifdef CONFIG_IDE
- void *xilinx, *xilinx_1, *xilinx_2;
- unsigned short us_reg5;
-#endif
-
- ppc4xx_setup_arch();
-
-#ifdef CONFIG_IDE
- xilinx = (unsigned long) ioremap(IDE_XLINUX_MUX_BASE, 0x10);
- /* init xilinx control registers - enable ide mux, clear reset bit */
- if (!xilinx) {
- printk(KERN_CRIT
- "redwood6_setup_arch() xilinxi ioremap failed\n");
- return;
- }
- xilinx_1 = xilinx + 0xa;
- xilinx_2 = xilinx + 0xe;
-
- us_reg5 = readb(xilinx_1);
- writeb(0x01d1, xilinx_1);
- writeb(0x0008, xilinx_2);
-
- udelay(10 * 1000);
-
- writeb(0x01d1, xilinx_1);
- writeb(0x0008, xilinx_2);
-#endif
-
-#ifdef DEBUG_BRINGUP
- bd_t *bip = (bd_t *) __res;
- printk("\n");
- printk("machine\t: %s\n", PPC4xx_MACHINE_NAME);
- printk("\n");
- printk("bi_s_version\t %s\n", bip->bi_s_version);
- printk("bi_r_version\t %s\n", bip->bi_r_version);
- printk("bi_memsize\t 0x%8.8x\t %dMBytes\n", bip->bi_memsize,
- bip->bi_memsize / (1024 * 1000));
- printk("bi_enetaddr %d\t %2.2x%2.2x%2.2x-%2.2x%2.2x%2.2x\n", 0,
- bip->bi_enetaddr[0], bip->bi_enetaddr[1], bip->bi_enetaddr[2],
- bip->bi_enetaddr[3], bip->bi_enetaddr[4], bip->bi_enetaddr[5]);
-
- printk("bi_intfreq\t 0x%8.8x\t clock:\t %dMhz\n",
- bip->bi_intfreq, bip->bi_intfreq / 1000000);
-
- printk("bi_busfreq\t 0x%8.8x\t plb bus clock:\t %dMHz\n",
- bip->bi_busfreq, bip->bi_busfreq / 1000000);
- printk("bi_tbfreq\t 0x%8.8x\t TB freq:\t %dMHz\n",
- bip->bi_tbfreq, bip->bi_tbfreq / 1000000);
-
- printk("\n");
-#endif
-
- /* Identify the system */
- printk(KERN_INFO "IBM Redwood6 (STBx25XX) Platform\n");
- printk(KERN_INFO
- "Port by MontaVista Software, Inc. (source@mvista.com)\n");
-
- device_initcall(redwood6_platform_add_devices);
-}
-
-void __init
-redwood6_map_io(void)
-{
- int i;
-
- ppc4xx_map_io();
- for (i = 0; i < 16; i++) {
- unsigned long v, p;
-
- /* 0x400x0000 -> 0xe00x0000 */
- p = 0x40000000 | (i << 16);
- v = STBx25xx_IO_BASE | (i << 16);
-
- io_block_mapping(v, p, PAGE_SIZE,
- _PAGE_NO_CACHE | pgprot_val(PAGE_KERNEL) |
- _PAGE_GUARDED);
- }
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = redwood6_setup_arch;
- ppc_md.setup_io_mappings = redwood6_map_io;
-}
diff --git a/arch/ppc/platforms/4xx/redwood6.h b/arch/ppc/platforms/4xx/redwood6.h
deleted file mode 100644
index 1edcbe5..0000000
--- a/arch/ppc/platforms/4xx/redwood6.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Macros, definitions, and data structures specific to the IBM PowerPC
- * STBx25xx "Redwood6" evaluation board.
- *
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_REDWOOD5_H__
-#define __ASM_REDWOOD5_H__
-
-/* Redwood6 has an STBx25xx core */
-#include <platforms/4xx/ibmstbx25.h>
-
-#ifndef __ASSEMBLY__
-typedef struct board_info {
- unsigned char bi_s_version[4]; /* Version of this structure */
- unsigned char bi_r_version[30]; /* Version of the IBM ROM */
- unsigned int bi_memsize; /* DRAM installed, in bytes */
- unsigned int bi_dummy; /* field shouldn't exist */
- unsigned char bi_enetaddr[6]; /* Ethernet MAC address */
- unsigned int bi_intfreq; /* Processor speed, in Hz */
- unsigned int bi_busfreq; /* Bus speed, in Hz */
- unsigned int bi_tbfreq; /* Software timebase freq */
-} bd_t;
-#endif /* !__ASSEMBLY__ */
-
-#define SMC91111_BASE_ADDR 0xf2030300
-#define SMC91111_REG_SIZE 16
-#define SMC91111_IRQ 27
-#define IDE_XLINUX_MUX_BASE 0xf2040000
-#define IDE_DMA_ADDR 0xfce00000
-
-#ifdef MAX_HWIFS
-#undef MAX_HWIFS
-#endif
-#define MAX_HWIFS 1
-
-#define _IO_BASE 0
-#define _ISA_MEM_BASE 0
-#define PCI_DRAM_OFFSET 0
-
-#define BASE_BAUD (378000000 / 18 / 16)
-
-#define PPC4xx_MACHINE_NAME "IBM Redwood6"
-
-#endif /* __ASM_REDWOOD5_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/sycamore.c b/arch/ppc/platforms/4xx/sycamore.c
deleted file mode 100644
index 8689f3e..0000000
--- a/arch/ppc/platforms/4xx/sycamore.c
+++ /dev/null
@@ -1,272 +0,0 @@
-/*
- * Architecture- / platform-specific boot-time initialization code for
- * IBM PowerPC 4xx based boards.
- *
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/threads.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/pci.h>
-#include <linux/rtc.h>
-
-#include <asm/ocp.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/system.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/ibm_ocp_pci.h>
-#include <asm/todc.h>
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-void *kb_cs;
-void *kb_data;
-void *sycamore_rtc_base;
-
-/*
- * Define external IRQ senses and polarities.
- */
-unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 7 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 8 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 9 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 10 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 11 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 12 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 4 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 5 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 6 */
-};
-
-
-/* Some IRQs unique to Sycamore.
- * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
- */
-int __init
-ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */
- {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */
- {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */
- {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */
- };
-
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-};
-
-void __init
-sycamore_setup_arch(void)
-{
- void *fpga_brdc;
- unsigned char fpga_brdc_data;
- void *fpga_enable;
- void *fpga_polarity;
- void *fpga_status;
- void *fpga_trigger;
-
- ppc4xx_setup_arch();
-
- ibm_ocp_set_emac(0, 0);
-
- kb_data = ioremap(SYCAMORE_PS2_BASE, 8);
- if (!kb_data) {
- printk(KERN_CRIT
- "sycamore_setup_arch() kb_data ioremap failed\n");
- return;
- }
-
- kb_cs = kb_data + 1;
-
- fpga_status = ioremap(PPC40x_FPGA_BASE, 8);
- if (!fpga_status) {
- printk(KERN_CRIT
- "sycamore_setup_arch() fpga_status ioremap failed\n");
- return;
- }
-
- fpga_enable = fpga_status + 1;
- fpga_polarity = fpga_status + 2;
- fpga_trigger = fpga_status + 3;
- fpga_brdc = fpga_status + 4;
-
- /* split the keyboard and mouse interrupts */
- fpga_brdc_data = readb(fpga_brdc);
- fpga_brdc_data |= 0x80;
- writeb(fpga_brdc_data, fpga_brdc);
-
- writeb(0x3, fpga_enable);
-
- writeb(0x3, fpga_polarity);
-
- writeb(0x3, fpga_trigger);
-
- /* RTC step for the sycamore */
- sycamore_rtc_base = (void *) SYCAMORE_RTC_VADDR;
- TODC_INIT(TODC_TYPE_DS1743, sycamore_rtc_base, sycamore_rtc_base,
- sycamore_rtc_base, 8);
-
- /* Identify the system */
- printk(KERN_INFO "IBM Sycamore (IBM405GPr) Platform\n");
- printk(KERN_INFO
- "Port by MontaVista Software, Inc. (source@mvista.com)\n");
-}
-
-void __init
-bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
-{
-#ifdef CONFIG_PCI
- unsigned int bar_response, bar;
- /*
- * Expected PCI mapping:
- *
- * PLB addr PCI memory addr
- * --------------------- ---------------------
- * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
- * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
- *
- * PLB addr PCI io addr
- * --------------------- ---------------------
- * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
- *
- * The following code is simplified by assuming that the bootrom
- * has been well behaved in following this mapping.
- */
-
-#ifdef DEBUG
- int i;
-
- printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
- printk("PCI bridge regs before fixup \n");
- for (i = 0; i <= 3; i++) {
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
- }
- printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
- printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
- printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
- printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
-
-#endif
-
- /* added for IBM boot rom version 1.15 bios bar changes -AK */
-
- /* Disable region first */
- out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
- /* PLB starting addr, PCI: 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
- /* PCI start addr, 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
- /* 512MB range of PLB to PCI */
- out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
- /* Enable no pre-fetch, enable region */
- out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
- (PPC405_PCI_UPPER_MEM -
- PPC405_PCI_MEM_BASE)) | 0x01));
-
- /* Enable inbound region one - 1GB size */
- out_le32((void *) &(pcip->ptm1ms), 0xc0000001);
-
- /* Disable outbound region one */
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
-
- /* Disable inbound region two */
- out_le32((void *) &(pcip->ptm2ms), 0x00000000);
-
- /* Disable outbound region two */
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
-
- /* Zero config bars */
- for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
- early_write_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- 0x00000000);
- early_read_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- &bar_response);
- DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
- hose->first_busno, PCI_SLOT(hose->first_busno),
- PCI_FUNC(hose->first_busno), bar, bar_response);
- }
- /* end workaround */
-
-#ifdef DEBUG
- printk("PCI bridge regs after fixup \n");
- for (i = 0; i <= 3; i++) {
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
- }
- printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
- printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
- printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
- printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
-
-#endif
-#endif
-
-}
-
-void __init
-sycamore_map_io(void)
-{
- ppc4xx_map_io();
- io_block_mapping(SYCAMORE_RTC_VADDR,
- SYCAMORE_RTC_PADDR, SYCAMORE_RTC_SIZE, _PAGE_IO);
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = sycamore_setup_arch;
- ppc_md.setup_io_mappings = sycamore_map_io;
-
-#ifdef CONFIG_GEN_RTC
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-#endif
-}
diff --git a/arch/ppc/platforms/4xx/sycamore.h b/arch/ppc/platforms/4xx/sycamore.h
deleted file mode 100644
index 69b169e..0000000
--- a/arch/ppc/platforms/4xx/sycamore.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Sycamore board definitions
- *
- * Copyright (c) 2005 DENX Software Engineering
- * Stefan Roese <sr@denx.de>
- *
- * Based on original work by
- * Armin Kuster <akuster@mvista.com>
- * 2000 (c) MontaVista, Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_SYCAMORE_H__
-#define __ASM_SYCAMORE_H__
-
-#include <platforms/4xx/ibm405gpr.h>
-#include <asm/ppcboot.h>
-
-/* Memory map for the IBM "Sycamore" 405GPr evaluation board.
- * Generic 4xx plus RTC.
- */
-
-#define SYCAMORE_RTC_PADDR ((uint)0xf0000000)
-#define SYCAMORE_RTC_VADDR SYCAMORE_RTC_PADDR
-#define SYCAMORE_RTC_SIZE ((uint)8*1024)
-
-#define BASE_BAUD 691200
-
-#define SYCAMORE_PS2_BASE 0xF0100000
-
-/* Flash */
-#define PPC40x_FPGA_BASE 0xF0300000
-#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */
-#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
-#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
-#define PPC40x_FLASH_LOW 0xFFF00000
-#define PPC40x_FLASH_HIGH 0xFFF80000
-#define PPC40x_FLASH_SIZE 0x80000
-
-#define PPC4xx_MACHINE_NAME "IBM Sycamore"
-
-#endif /* __ASM_SYCAMORE_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/taishan.c b/arch/ppc/platforms/4xx/taishan.c
deleted file mode 100644
index 1156942..0000000
--- a/arch/ppc/platforms/4xx/taishan.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/*
- * arch/ppc/platforms/4xx/taishan.c
- *
- * AMCC Taishan board specific routines
- *
- * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/blkdev.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/initrd.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/nand.h>
-#include <linux/mtd/ndfc.h>
-#include <linux/mtd/physmap.h>
-
-#include <asm/machdep.h>
-#include <asm/ocp.h>
-#include <asm/bootinfo.h>
-#include <asm/ppcboot.h>
-
-#include <syslib/gen550.h>
-#include <syslib/ibm440gx_common.h>
-
-extern bd_t __res;
-
-static struct ibm44x_clocks clocks __initdata;
-
-/*
- * NOR FLASH configuration (using mtd physmap driver)
- */
-
-/* start will be added dynamically, end is always fixed */
-static struct resource taishan_nor_resource = {
- .start = TAISHAN_FLASH_ADDR,
- .end = 0x1ffffffffULL,
- .flags = IORESOURCE_MEM,
-};
-
-#define RW_PART0_OF 0
-#define RW_PART0_SZ 0x180000
-#define RW_PART1_SZ 0x200000
-/* Partition 2 will be autosized dynamically... */
-#define RW_PART3_SZ 0x80000
-#define RW_PART4_SZ 0x40000
-
-static struct mtd_partition taishan_nor_parts[] = {
- {
- .name = "kernel",
- .offset = 0,
- .size = RW_PART0_SZ
- },
- {
- .name = "root",
- .offset = MTDPART_OFS_APPEND,
- .size = RW_PART1_SZ,
- },
- {
- .name = "user",
- .offset = MTDPART_OFS_APPEND,
-/* .size = RW_PART2_SZ */ /* will be adjusted dynamically */
- },
- {
- .name = "env",
- .offset = MTDPART_OFS_APPEND,
- .size = RW_PART3_SZ,
- },
- {
- .name = "u-boot",
- .offset = MTDPART_OFS_APPEND,
- .size = RW_PART4_SZ,
- }
-};
-
-static struct physmap_flash_data taishan_nor_data = {
- .width = 4,
- .parts = taishan_nor_parts,
- .nr_parts = ARRAY_SIZE(taishan_nor_parts),
-};
-
-static struct platform_device taishan_nor_device = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &taishan_nor_data,
- },
- .num_resources = 1,
- .resource = &taishan_nor_resource,
-};
-
-static int taishan_setup_flash(void)
-{
- /*
- * Adjust partition 2 to flash size
- */
- taishan_nor_parts[2].size = __res.bi_flashsize -
- RW_PART0_SZ - RW_PART1_SZ - RW_PART3_SZ - RW_PART4_SZ;
-
- platform_device_register(&taishan_nor_device);
-
- return 0;
-}
-arch_initcall(taishan_setup_flash);
-
-static void __init
-taishan_calibrate_decr(void)
-{
- unsigned int freq;
-
- if (mfspr(SPRN_CCR1) & CCR1_TCS)
- freq = TAISHAN_TMR_CLK;
- else
- freq = clocks.cpu;
-
- ibm44x_calibrate_decr(freq);
-}
-
-static int
-taishan_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: AMCC\n");
- seq_printf(m, "machine\t\t: PPC440GX EVB (Taishan)\n");
- ibm440gx_show_cpuinfo(m);
- return 0;
-}
-
-static inline int
-taishan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 23, 24, 25, 26 }, /* IDSEL 1 - PCI Slot 0 */
- { 24, 25, 26, 23 }, /* IDSEL 2 - PCI Slot 1 */
- };
-
- const long min_idsel = 1, max_idsel = 2, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static void __init taishan_set_emacdata(void)
-{
- struct ocp_def *def;
- struct ocp_func_emac_data *emacdata;
- int i;
-
- /* Set phy_map, phy_mode, and mac_addr for each EMAC */
- for (i=2; i<4; i++) {
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i);
- emacdata = def->additions;
- if (i < 2) {
- emacdata->phy_map = 0x00000001; /* Skip 0x00 */
- emacdata->phy_mode = PHY_MODE_SMII;
- } else {
- emacdata->phy_map = 0x00000001; /* Skip 0x00 */
- emacdata->phy_mode = PHY_MODE_RGMII;
- }
- if (i == 0)
- memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6);
- else if (i == 1)
- memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6);
- else if (i == 2)
- memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
- else if (i == 3)
- memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
- }
-}
-
-#define PCIX_READW(offset) \
- (readw(pcix_reg_base+offset))
-
-#define PCIX_WRITEW(value, offset) \
- (writew(value, pcix_reg_base+offset))
-
-#define PCIX_WRITEL(value, offset) \
- (writel(value, pcix_reg_base+offset))
-
-/*
- * FIXME: This is only here to "make it work". This will move
- * to a ibm_pcix.c which will contain a generic IBM PCIX bridge
- * configuration library. -Matt
- */
-static void __init
-taishan_setup_pcix(void)
-{
- void *pcix_reg_base;
-
- pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE);
-
- /* Enable PCIX0 I/O, Mem, and Busmaster cycles */
- PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND);
-
- /* Disable all windows */
- PCIX_WRITEL(0, PCIX0_POM0SA);
- PCIX_WRITEL(0, PCIX0_POM1SA);
- PCIX_WRITEL(0, PCIX0_POM2SA);
- PCIX_WRITEL(0, PCIX0_PIM0SA);
- PCIX_WRITEL(0, PCIX0_PIM0SAH);
- PCIX_WRITEL(0, PCIX0_PIM1SA);
- PCIX_WRITEL(0, PCIX0_PIM2SA);
- PCIX_WRITEL(0, PCIX0_PIM2SAH);
-
- /* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */
- PCIX_WRITEL(0x00000003, PCIX0_POM0LAH);
- PCIX_WRITEL(0x80000000, PCIX0_POM0LAL);
- PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH);
- PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL);
- PCIX_WRITEL(0x80000001, PCIX0_POM0SA);
-
- /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
- PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
- PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
- PCIX_WRITEL(0x80000007, PCIX0_PIM0SA);
- PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH);
-
- iounmap(pcix_reg_base);
-
- eieio();
-}
-
-static void __init
-taishan_setup_hose(void)
-{
- struct pci_controller *hose;
-
- /* Configure windows on the PCI-X host bridge */
- taishan_setup_pcix();
-
- hose = pcibios_alloc_controller();
-
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- hose->pci_mem_offset = TAISHAN_PCI_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource,
- TAISHAN_PCI_LOWER_IO,
- TAISHAN_PCI_UPPER_IO,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0],
- TAISHAN_PCI_LOWER_MEM,
- TAISHAN_PCI_UPPER_MEM,
- IORESOURCE_MEM,
- "PCI host bridge");
-
- hose->io_space.start = TAISHAN_PCI_LOWER_IO;
- hose->io_space.end = TAISHAN_PCI_UPPER_IO;
- hose->mem_space.start = TAISHAN_PCI_LOWER_MEM;
- hose->mem_space.end = TAISHAN_PCI_UPPER_MEM;
- hose->io_base_virt = ioremap64(TAISHAN_PCI_IO_BASE, TAISHAN_PCI_IO_SIZE);
- isa_io_base = (unsigned long) hose->io_base_virt;
-
- setup_indirect_pci(hose,
- TAISHAN_PCI_CFGA_PLB32,
- TAISHAN_PCI_CFGD_PLB32);
- hose->set_cfg_type = 1;
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = taishan_map_irq;
-}
-
-
-static void __init
-taishan_early_serial_map(void)
-{
- struct uart_port port;
-
- /* Setup ioremapped serial port access */
- memset(&port, 0, sizeof(port));
- port.membase = ioremap64(PPC440GX_UART0_ADDR, 8);
- port.irq = UART0_INT;
- port.uartclk = clocks.uart0;
- port.regshift = 0;
- port.iotype = UPIO_MEM;
- port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- port.line = 0;
-
- if (early_serial_setup(&port) != 0)
- printk("Early serial init of port 0 failed\n");
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(0, &port);
-
- /* Purge TLB entry added in head_44x.S for early serial access */
- _tlbie(UART0_IO_BASE, 0);
-#endif
-
- port.membase = ioremap64(PPC440GX_UART1_ADDR, 8);
- port.irq = UART1_INT;
- port.uartclk = clocks.uart1;
- port.line = 1;
-
- if (early_serial_setup(&port) != 0)
- printk("Early serial init of port 1 failed\n");
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- /* Configure debug serial access */
- gen550_init(1, &port);
-#endif
-}
-
-static void __init
-taishan_setup_arch(void)
-{
- taishan_set_emacdata();
-
- ibm440gx_tah_enable();
-
- /*
- * Determine various clocks.
- * To be completely correct we should get SysClk
- * from FPGA, because it can be changed by on-board switches
- * --ebs
- */
- ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
- ocp_sys_info.opb_bus_freq = clocks.opb;
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000/HZ;
-
- /* Setup PCI host bridge */
- taishan_setup_hose();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- taishan_early_serial_map();
-
- /* Identify the system */
- printk("AMCC PowerPC 440GX Taishan Platform\n");
-}
-
-static void __init taishan_init(void)
-{
- ibm440gx_l2c_setup(&clocks);
-}
-
-void __init platform_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7)
-{
- ibm44x_platform_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = taishan_setup_arch;
- ppc_md.show_cpuinfo = taishan_show_cpuinfo;
- ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
-
- ppc_md.calibrate_decr = taishan_calibrate_decr;
-
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = taishan_early_serial_map;
-#endif
- ppc_md.init = taishan_init;
-}
-
diff --git a/arch/ppc/platforms/4xx/taishan.h b/arch/ppc/platforms/4xx/taishan.h
deleted file mode 100644
index ea7561a..0000000
--- a/arch/ppc/platforms/4xx/taishan.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * arch/ppc/platforms/4xx/taishan.h
- *
- * AMCC Taishan board definitions
- *
- * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_TAISHAN_H__
-#define __ASM_TAISHAN_H__
-
-#include <platforms/4xx/ibm440gx.h>
-
-/* External timer clock frequency */
-#define TAISHAN_TMR_CLK 25000000
-
-/* Flash */
-#define TAISHAN_FPGA_ADDR 0x0000000141000000ULL
-#define TAISHAN_LCM_ADDR 0x0000000142000000ULL
-#define TAISHAN_FLASH_ADDR 0x00000001fc000000ULL
-#define TAISHAN_FLASH_SIZE 0x4000000
-
-/*
- * Serial port defines
- */
-#define RS_TABLE_SIZE 2
-
-/* head_44x.S created UART mapping, used before early_serial_setup.
- * We cannot use default OpenBIOS UART mappings because they
- * don't work for configurations with more than 512M RAM. --ebs
- */
-#define UART0_IO_BASE 0xF0000200
-#define UART1_IO_BASE 0xF0000300
-
-#define BASE_BAUD 11059200/16
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (void*)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-
-/* PCI support */
-#define TAISHAN_PCI_LOWER_IO 0x00000000
-#define TAISHAN_PCI_UPPER_IO 0x0000ffff
-#define TAISHAN_PCI_LOWER_MEM 0x80000000
-#define TAISHAN_PCI_UPPER_MEM 0xffffefff
-
-#define TAISHAN_PCI_CFGA_PLB32 0x0ec00000
-#define TAISHAN_PCI_CFGD_PLB32 0x0ec00004
-
-#define TAISHAN_PCI_IO_BASE 0x0000000208000000ULL
-#define TAISHAN_PCI_IO_SIZE 0x00010000
-#define TAISHAN_PCI_MEM_OFFSET 0x00000000
-
-#endif /* __ASM_TAISHAN_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/virtex.h b/arch/ppc/platforms/4xx/virtex.h
deleted file mode 100644
index 7382804..0000000
--- a/arch/ppc/platforms/4xx/virtex.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Basic Virtex platform defines, included by <asm/ibm4xx.h>
- *
- * 2005-2007 (c) Secret Lab Technologies Ltd.
- * 2002-2004 (c) MontaVista Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_VIRTEX_H__
-#define __ASM_VIRTEX_H__
-
-#include <asm/ibm405.h>
-#include <asm/ppcboot.h>
-
-/* Ugly, ugly, ugly! BASE_BAUD defined here to keep 8250.c happy. */
-#if !defined(BASE_BAUD)
- #define BASE_BAUD (0) /* dummy value; not used */
-#endif
-
-#ifndef __ASSEMBLY__
-extern const char* virtex_machine_name;
-#define PPC4xx_MACHINE_NAME (virtex_machine_name)
-#endif /* !__ASSEMBLY__ */
-
-/* We don't need anything mapped. Size of zero will accomplish that. */
-#define PPC4xx_ONB_IO_PADDR 0u
-#define PPC4xx_ONB_IO_VADDR 0u
-#define PPC4xx_ONB_IO_SIZE 0u
-
-#endif /* __ASM_VIRTEX_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/walnut.c b/arch/ppc/platforms/4xx/walnut.c
deleted file mode 100644
index 2f97723..0000000
--- a/arch/ppc/platforms/4xx/walnut.c
+++ /dev/null
@@ -1,246 +0,0 @@
-/*
- * Architecture- / platform-specific boot-time initialization code for
- * IBM PowerPC 4xx based boards. Adapted from original
- * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
- * <dan@net4x.com>.
- *
- * Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/threads.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/pci.h>
-#include <linux/rtc.h>
-
-#include <asm/system.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/ocp.h>
-#include <asm/ibm_ocp_pci.h>
-#include <asm/todc.h>
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-void *kb_cs;
-void *kb_data;
-void *walnut_rtc_base;
-
-/* Some IRQs unique to Walnut.
- * Used by the generic 405 PCI setup functions in ppc4xx_pci.c
- */
-int __init
-ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {28, 28, 28, 28}, /* IDSEL 1 - PCI slot 1 */
- {29, 29, 29, 29}, /* IDSEL 2 - PCI slot 2 */
- {30, 30, 30, 30}, /* IDSEL 3 - PCI slot 3 */
- {31, 31, 31, 31}, /* IDSEL 4 - PCI slot 4 */
- };
-
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-};
-
-void __init
-walnut_setup_arch(void)
-{
-
- void *fpga_brdc;
- unsigned char fpga_brdc_data;
- void *fpga_enable;
- void *fpga_polarity;
- void *fpga_status;
- void *fpga_trigger;
-
- ppc4xx_setup_arch();
-
- ibm_ocp_set_emac(0, 0);
-
- kb_data = ioremap(WALNUT_PS2_BASE, 8);
- if (!kb_data) {
- printk(KERN_CRIT
- "walnut_setup_arch() kb_data ioremap failed\n");
- return;
- }
-
- kb_cs = kb_data + 1;
-
- fpga_status = ioremap(PPC40x_FPGA_BASE, 8);
- if (!fpga_status) {
- printk(KERN_CRIT
- "walnut_setup_arch() fpga_status ioremap failed\n");
- return;
- }
-
- fpga_enable = fpga_status + 1;
- fpga_polarity = fpga_status + 2;
- fpga_trigger = fpga_status + 3;
- fpga_brdc = fpga_status + 4;
-
- /* split the keyboard and mouse interrupts */
- fpga_brdc_data = readb(fpga_brdc);
- fpga_brdc_data |= 0x80;
- writeb(fpga_brdc_data, fpga_brdc);
-
- writeb(0x3, fpga_enable);
-
- writeb(0x3, fpga_polarity);
-
- writeb(0x3, fpga_trigger);
-
- /* RTC step for the walnut */
- walnut_rtc_base = (void *) WALNUT_RTC_VADDR;
- TODC_INIT(TODC_TYPE_DS1743, walnut_rtc_base, walnut_rtc_base,
- walnut_rtc_base, 8);
- /* Identify the system */
- printk("IBM Walnut port (C) 2000-2002 MontaVista Software, Inc. (source@mvista.com)\n");
-}
-
-void __init
-bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
-{
-#ifdef CONFIG_PCI
- unsigned int bar_response, bar;
- /*
- * Expected PCI mapping:
- *
- * PLB addr PCI memory addr
- * --------------------- ---------------------
- * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff
- * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff
- *
- * PLB addr PCI io addr
- * --------------------- ---------------------
- * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000
- *
- * The following code is simplified by assuming that the bootrom
- * has been well behaved in following this mapping.
- */
-
-#ifdef DEBUG
- int i;
-
- printk("ioremap PCLIO_BASE = 0x%x\n", pcip);
- printk("PCI bridge regs before fixup \n");
- for (i = 0; i <= 3; i++) {
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
- }
- printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
- printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
- printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
- printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
-
-#endif
-
- /* added for IBM boot rom version 1.15 bios bar changes -AK */
-
- /* Disable region first */
- out_le32((void *) &(pcip->pmm[0].ma), 0x00000000);
- /* PLB starting addr, PCI: 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].la), 0x80000000);
- /* PCI start addr, 0x80000000 */
- out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE);
- /* 512MB range of PLB to PCI */
- out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000);
- /* Enable no pre-fetch, enable region */
- out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff -
- (PPC405_PCI_UPPER_MEM -
- PPC405_PCI_MEM_BASE)) | 0x01));
-
- /* Disable region one */
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[1].ma), 0x00000000);
- out_le32((void *) &(pcip->ptm1ms), 0x00000000);
-
- /* Disable region two */
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].la), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000);
- out_le32((void *) &(pcip->pmm[2].ma), 0x00000000);
- out_le32((void *) &(pcip->ptm2ms), 0x00000000);
-
- /* Zero config bars */
- for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
- early_write_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- 0x00000000);
- early_read_config_dword(hose, hose->first_busno,
- PCI_FUNC(hose->first_busno), bar,
- &bar_response);
- DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n",
- hose->first_busno, PCI_SLOT(hose->first_busno),
- PCI_FUNC(hose->first_busno), bar, bar_response);
- }
- /* end work around */
-
-#ifdef DEBUG
- printk("PCI bridge regs after fixup \n");
- for (i = 0; i <= 3; i++) {
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].la)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pcila)));
- printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].pciha)));
- }
- printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms)));
- printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la)));
- printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms)));
- printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la)));
-
-#endif
-#endif
-}
-
-void __init
-walnut_map_io(void)
-{
- ppc4xx_map_io();
- io_block_mapping(WALNUT_RTC_VADDR,
- WALNUT_RTC_PADDR, WALNUT_RTC_SIZE, _PAGE_IO);
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = walnut_setup_arch;
- ppc_md.setup_io_mappings = walnut_map_io;
-
-#ifdef CONFIG_GEN_RTC
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-#endif
-}
diff --git a/arch/ppc/platforms/4xx/walnut.h b/arch/ppc/platforms/4xx/walnut.h
deleted file mode 100644
index d9c4eb7..0000000
--- a/arch/ppc/platforms/4xx/walnut.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Walnut board definitions
- *
- * Copyright (c) 2005 DENX Software Engineering
- * Stefan Roese <sr@denx.de>
- *
- * Based on original work by
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- * Frank Rowand <frank_rowand@mvista.com>
- * Debbie Chu <debbie_chu@mvista.com>
- * 2000 (c) MontaVista, Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_WALNUT_H__
-#define __ASM_WALNUT_H__
-
-#include <platforms/4xx/ibm405gp.h>
-#include <asm/ppcboot.h>
-
-/* Memory map for the IBM "Walnut" 405GP evaluation board.
- * Generic 4xx plus RTC.
- */
-
-#define WALNUT_RTC_PADDR ((uint)0xf0000000)
-#define WALNUT_RTC_VADDR WALNUT_RTC_PADDR
-#define WALNUT_RTC_SIZE ((uint)8*1024)
-
-#define BASE_BAUD 691200
-
-#define WALNUT_PS2_BASE 0xF0100000
-
-/* Flash */
-#define PPC40x_FPGA_BASE 0xF0300000
-#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */
-#define PPC40x_FLASH_ONBD_N(x) (x & 0x02)
-#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01)
-#define PPC40x_FLASH_LOW 0xFFF00000
-#define PPC40x_FLASH_HIGH 0xFFF80000
-#define PPC40x_FLASH_SIZE 0x80000
-#define WALNUT_FPGA_BASE PPC40x_FPGA_BASE
-
-#define PPC4xx_MACHINE_NAME "IBM Walnut"
-
-#endif /* __ASM_WALNUT_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.c b/arch/ppc/platforms/4xx/xilinx_ml300.c
deleted file mode 100644
index 6e522fe..0000000
--- a/arch/ppc/platforms/4xx/xilinx_ml300.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/*
- * Xilinx ML300 evaluation board initialization
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <linux/serialP.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-
-#include <syslib/gen550.h>
-#include <syslib/virtex_devices.h>
-#include <platforms/4xx/xparameters/xparameters.h>
-
-/*
- * As an overview of how the following functions (platform_init,
- * ml300_map_io, ml300_setup_arch and ml300_init_IRQ) fit into the
- * kernel startup procedure, here's a call tree:
- *
- * start_here arch/ppc/kernel/head_4xx.S
- * early_init arch/ppc/kernel/setup.c
- * machine_init arch/ppc/kernel/setup.c
- * platform_init this file
- * ppc4xx_init arch/ppc/syslib/ppc4xx_setup.c
- * parse_bootinfo
- * find_bootinfo
- * "setup some default ppc_md pointers"
- * MMU_init arch/ppc/mm/init.c
- * *ppc_md.setup_io_mappings == ml300_map_io this file
- * ppc4xx_map_io arch/ppc/syslib/ppc4xx_setup.c
- * start_kernel init/main.c
- * setup_arch arch/ppc/kernel/setup.c
- * #if defined(CONFIG_KGDB)
- * *ppc_md.kgdb_map_scc() == gen550_kgdb_map_scc
- * #endif
- * *ppc_md.setup_arch == ml300_setup_arch this file
- * ppc4xx_setup_arch arch/ppc/syslib/ppc4xx_setup.c
- * ppc4xx_find_bridges arch/ppc/syslib/ppc405_pci.c
- * init_IRQ arch/ppc/kernel/irq.c
- * *ppc_md.init_IRQ == ml300_init_IRQ this file
- * ppc4xx_init_IRQ arch/ppc/syslib/ppc4xx_setup.c
- * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
- */
-
-const char* virtex_machine_name = "ML300 Reference Design";
-
-#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
-static volatile unsigned *powerdown_base =
- (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
-
-static void
-xilinx_power_off(void)
-{
- local_irq_disable();
- out_be32(powerdown_base, XPAR_POWER_0_POWERDOWN_VALUE);
- while (1) ;
-}
-#endif
-
-void __init
-ml300_map_io(void)
-{
- ppc4xx_map_io();
-
-#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
- powerdown_base = ioremap((unsigned long) powerdown_base,
- XPAR_POWER_0_POWERDOWN_HIGHADDR -
- XPAR_POWER_0_POWERDOWN_BASEADDR + 1);
-#endif
-}
-
-void __init
-ml300_setup_arch(void)
-{
- virtex_early_serial_map();
- ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
-
- /* Identify the system */
- printk(KERN_INFO "Xilinx ML300 Reference System (Virtex-II Pro)\n");
-}
-
-/* Called after board_setup_irq from ppc4xx_init_IRQ(). */
-void __init
-ml300_init_irq(void)
-{
- ppc4xx_init_IRQ();
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = ml300_setup_arch;
- ppc_md.setup_io_mappings = ml300_map_io;
- ppc_md.init_IRQ = ml300_init_irq;
-
-#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
- ppc_md.power_off = xilinx_power_off;
-#endif
-
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = virtex_early_serial_map;
-#endif
-}
-
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.c b/arch/ppc/platforms/4xx/xilinx_ml403.c
deleted file mode 100644
index bc3ace3..0000000
--- a/arch/ppc/platforms/4xx/xilinx_ml403.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Xilinx ML403 evaluation board initialization
- *
- * Author: Grant Likely <grant.likely@secretlab.ca>
- *
- * 2005-2007 (c) Secret Lab Technologies Ltd.
- * 2002-2004 (c) MontaVista Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <linux/serialP.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-
-#include <syslib/gen550.h>
-#include <syslib/virtex_devices.h>
-#include <platforms/4xx/xparameters/xparameters.h>
-
-/*
- * As an overview of how the following functions (platform_init,
- * ml403_map_io, ml403_setup_arch and ml403_init_IRQ) fit into the
- * kernel startup procedure, here's a call tree:
- *
- * start_here arch/ppc/kernel/head_4xx.S
- * early_init arch/ppc/kernel/setup.c
- * machine_init arch/ppc/kernel/setup.c
- * platform_init this file
- * ppc4xx_init arch/ppc/syslib/ppc4xx_setup.c
- * parse_bootinfo
- * find_bootinfo
- * "setup some default ppc_md pointers"
- * MMU_init arch/ppc/mm/init.c
- * *ppc_md.setup_io_mappings == ml403_map_io this file
- * ppc4xx_map_io arch/ppc/syslib/ppc4xx_setup.c
- * start_kernel init/main.c
- * setup_arch arch/ppc/kernel/setup.c
- * #if defined(CONFIG_KGDB)
- * *ppc_md.kgdb_map_scc() == gen550_kgdb_map_scc
- * #endif
- * *ppc_md.setup_arch == ml403_setup_arch this file
- * ppc4xx_setup_arch arch/ppc/syslib/ppc4xx_setup.c
- * ppc4xx_find_bridges arch/ppc/syslib/ppc405_pci.c
- * init_IRQ arch/ppc/kernel/irq.c
- * *ppc_md.init_IRQ == ml403_init_IRQ this file
- * ppc4xx_init_IRQ arch/ppc/syslib/ppc4xx_setup.c
- * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
- */
-
-const char* virtex_machine_name = "ML403 Reference Design";
-
-#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
-static volatile unsigned *powerdown_base =
- (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
-
-static void
-xilinx_power_off(void)
-{
- local_irq_disable();
- out_be32(powerdown_base, XPAR_POWER_0_POWERDOWN_VALUE);
- while (1) ;
-}
-#endif
-
-void __init
-ml403_map_io(void)
-{
- ppc4xx_map_io();
-
-#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
- powerdown_base = ioremap((unsigned long) powerdown_base,
- XPAR_POWER_0_POWERDOWN_HIGHADDR -
- XPAR_POWER_0_POWERDOWN_BASEADDR + 1);
-#endif
-}
-
-void __init
-ml403_setup_arch(void)
-{
- virtex_early_serial_map();
- ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
-
- /* Identify the system */
- printk(KERN_INFO "Xilinx ML403 Reference System (Virtex-4 FX)\n");
-}
-
-/* Called after board_setup_irq from ppc4xx_init_IRQ(). */
-void __init
-ml403_init_irq(void)
-{
- ppc4xx_init_IRQ();
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- ppc4xx_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = ml403_setup_arch;
- ppc_md.setup_io_mappings = ml403_map_io;
- ppc_md.init_IRQ = ml403_init_irq;
-
-#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
- ppc_md.power_off = xilinx_power_off;
-#endif
-
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = virtex_early_serial_map;
-#endif
-}
-
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters.h b/arch/ppc/platforms/4xx/xparameters/xparameters.h
deleted file mode 100644
index 650888b..0000000
--- a/arch/ppc/platforms/4xx/xparameters/xparameters.h
+++ /dev/null
@@ -1,104 +0,0 @@
-/*
- * arch/ppc/platforms/4xx/xparameters/xparameters.h
- *
- * This file includes the correct xparameters.h for the CONFIG'ed board plus
- * fixups to translate board specific XPAR values to a common set of names
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * 2004 (c) MontaVista Software, Inc. This file is licensed under the terms
- * of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-
-#if defined(CONFIG_XILINX_ML300)
- #include "xparameters_ml300.h"
- #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_PLAYBACK_VEC_ID \
- XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR
- #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_RECORD_VEC_ID \
- XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR
-#elif defined(CONFIG_XILINX_ML403)
- #include "xparameters_ml403.h"
- #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_PLAYBACK_VEC_ID \
- XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR
- #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_RECORD_VEC_ID \
- XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR
-#else
- /* Add other board xparameter includes here before the #else */
- #error No xparameters_*.h file included
-#endif
-
-#ifndef SERIAL_PORT_DFNS
- /* zImage serial port definitions */
- #define RS_TABLE_SIZE 1
- #define SERIAL_PORT_DFNS { \
- .baud_base = XPAR_UARTNS550_0_CLOCK_FREQ_HZ/16, \
- .irq = XPAR_INTC_0_UARTNS550_0_VEC_ID, \
- .flags = ASYNC_BOOT_AUTOCONF, \
- .iomem_base = (u8 *)XPAR_UARTNS550_0_BASEADDR + 3, \
- .iomem_reg_shift = 2, \
- .io_type = SERIAL_IO_MEM, \
- },
-#endif
-
-/*
- * A few reasonable defaults for the #defines which could be missing depending
- * on the IP version or variant (e.g. OPB vs PLB)
- */
-
-#ifndef XPAR_EMAC_0_CAM_EXIST
-#define XPAR_EMAC_0_CAM_EXIST 0
-#endif
-#ifndef XPAR_EMAC_0_JUMBO_EXIST
-#define XPAR_EMAC_0_JUMBO_EXIST 0
-#endif
-#ifndef XPAR_EMAC_0_TX_DRE_TYPE
-#define XPAR_EMAC_0_TX_DRE_TYPE 0
-#endif
-#ifndef XPAR_EMAC_0_RX_DRE_TYPE
-#define XPAR_EMAC_0_RX_DRE_TYPE 0
-#endif
-#ifndef XPAR_EMAC_0_TX_INCLUDE_CSUM
-#define XPAR_EMAC_0_TX_INCLUDE_CSUM 0
-#endif
-#ifndef XPAR_EMAC_0_RX_INCLUDE_CSUM
-#define XPAR_EMAC_0_RX_INCLUDE_CSUM 0
-#endif
-
-#ifndef XPAR_EMAC_1_CAM_EXIST
-#define XPAR_EMAC_1_CAM_EXIST 0
-#endif
-#ifndef XPAR_EMAC_1_JUMBO_EXIST
-#define XPAR_EMAC_1_JUMBO_EXIST 0
-#endif
-#ifndef XPAR_EMAC_1_TX_DRE_TYPE
-#define XPAR_EMAC_1_TX_DRE_TYPE 0
-#endif
-#ifndef XPAR_EMAC_1_RX_DRE_TYPE
-#define XPAR_EMAC_1_RX_DRE_TYPE 0
-#endif
-#ifndef XPAR_EMAC_1_TX_INCLUDE_CSUM
-#define XPAR_EMAC_1_TX_INCLUDE_CSUM 0
-#endif
-#ifndef XPAR_EMAC_1_RX_INCLUDE_CSUM
-#define XPAR_EMAC_1_RX_INCLUDE_CSUM 0
-#endif
-
-#ifndef XPAR_GPIO_0_IS_DUAL
-#define XPAR_GPIO_0_IS_DUAL 0
-#endif
-#ifndef XPAR_GPIO_1_IS_DUAL
-#define XPAR_GPIO_1_IS_DUAL 0
-#endif
-#ifndef XPAR_GPIO_2_IS_DUAL
-#define XPAR_GPIO_2_IS_DUAL 0
-#endif
-#ifndef XPAR_GPIO_3_IS_DUAL
-#define XPAR_GPIO_3_IS_DUAL 0
-#endif
-#ifndef XPAR_GPIO_4_IS_DUAL
-#define XPAR_GPIO_4_IS_DUAL 0
-#endif
-
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters_ml300.h b/arch/ppc/platforms/4xx/xparameters/xparameters_ml300.h
deleted file mode 100644
index 97e3f4d..0000000
--- a/arch/ppc/platforms/4xx/xparameters/xparameters_ml300.h
+++ /dev/null
@@ -1,310 +0,0 @@
-/*******************************************************************
-*
-* Author: Xilinx, Inc.
-*
-*
-* This program is free software; you can redistribute it and/or modify it
-* under the terms of the GNU General Public License as published by the
-* Free Software Foundation; either version 2 of the License, or (at your
-* option) any later version.
-*
-*
-* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
-* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
-* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD,
-* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE
-* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING
-* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
-* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
-* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY
-* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM
-* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND
-* FITNESS FOR A PARTICULAR PURPOSE.
-*
-*
-* Xilinx hardware products are not intended for use in life support
-* appliances, devices, or systems. Use in such applications is
-* expressly prohibited.
-*
-*
-* (c) Copyright 2002-2004 Xilinx Inc.
-* All rights reserved.
-*
-*
-* You should have received a copy of the GNU General Public License along
-* with this program; if not, write to the Free Software Foundation, Inc.,
-* 675 Mass Ave, Cambridge, MA 02139, USA.
-*
-* Description: Driver parameters
-*
-*******************************************************************/
-
-#define XPAR_XPCI_NUM_INSTANCES 1
-#define XPAR_XPCI_CLOCK_HZ 33333333
-#define XPAR_OPB_PCI_REF_0_DEVICE_ID 0
-#define XPAR_OPB_PCI_REF_0_BASEADDR 0x20000000
-#define XPAR_OPB_PCI_REF_0_HIGHADDR 0x3FFFFFFF
-#define XPAR_OPB_PCI_REF_0_CONFIG_ADDR 0x3C000000
-#define XPAR_OPB_PCI_REF_0_CONFIG_DATA 0x3C000004
-#define XPAR_OPB_PCI_REF_0_LCONFIG_ADDR 0x3E000000
-#define XPAR_OPB_PCI_REF_0_MEM_BASEADDR 0x20000000
-#define XPAR_OPB_PCI_REF_0_MEM_HIGHADDR 0x37FFFFFF
-#define XPAR_OPB_PCI_REF_0_IO_BASEADDR 0x38000000
-#define XPAR_OPB_PCI_REF_0_IO_HIGHADDR 0x3BFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XEMAC_NUM_INSTANCES 1
-#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
-#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
-#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
-#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
-#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
-#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
-
-/******************************************************************/
-
-#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_0 0
-#define XPAR_MY_OPB_GPIO_0_BASEADDR_0 0x90000000
-#define XPAR_MY_OPB_GPIO_0_HIGHADDR_0 (0x90000000+0x7)
-#define XPAR_MY_OPB_GPIO_0_DEVICE_ID_1 1
-#define XPAR_MY_OPB_GPIO_0_BASEADDR_1 (0x90000000+0x8)
-#define XPAR_MY_OPB_GPIO_0_HIGHADDR_1 (0x90000000+0x1F)
-#define XPAR_XGPIO_NUM_INSTANCES 2
-
-/******************************************************************/
-
-#define XPAR_XIIC_NUM_INSTANCES 1
-#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000
-#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF
-#define XPAR_OPB_IIC_0_DEVICE_ID 0
-#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0
-
-/******************************************************************/
-
-#define XPAR_XUARTNS550_NUM_INSTANCES 2
-#define XPAR_XUARTNS550_CLOCK_HZ 100000000
-#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
-#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF
-#define XPAR_OPB_UART16550_0_DEVICE_ID 0
-#define XPAR_OPB_UART16550_1_BASEADDR 0xA0010000
-#define XPAR_OPB_UART16550_1_HIGHADDR 0xA0011FFF
-#define XPAR_OPB_UART16550_1_DEVICE_ID 1
-
-/******************************************************************/
-
-#define XPAR_XSPI_NUM_INSTANCES 1
-#define XPAR_OPB_SPI_0_BASEADDR 0xA4000000
-#define XPAR_OPB_SPI_0_HIGHADDR 0xA400007F
-#define XPAR_OPB_SPI_0_DEVICE_ID 0
-#define XPAR_OPB_SPI_0_FIFO_EXIST 1
-#define XPAR_OPB_SPI_0_SPI_SLAVE_ONLY 0
-#define XPAR_OPB_SPI_0_NUM_SS_BITS 1
-
-/******************************************************************/
-
-#define XPAR_XPS2_NUM_INSTANCES 2
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F)
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000)
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F)
-
-/******************************************************************/
-
-#define XPAR_XTOUCHSCREEN_NUM_INSTANCES 1
-#define XPAR_OPB_TSD_REF_0_BASEADDR 0xAA000000
-#define XPAR_OPB_TSD_REF_0_HIGHADDR 0xAA000007
-#define XPAR_OPB_TSD_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF
-#define XPAR_OPB_PAR_PORT_REF_0_BASEADDR 0x90010000
-#define XPAR_OPB_PAR_PORT_REF_0_HIGHADDR 0x900100FF
-#define XPAR_PLB_DDR_0_BASEADDR 0x00000000
-#define XPAR_PLB_DDR_0_HIGHADDR 0x0FFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XINTC_HAS_IPR 1
-#define XPAR_INTC_MAX_NUM_INTR_INPUTS 18
-#define XPAR_XINTC_USE_DCR 0
-#define XPAR_XINTC_NUM_INSTANCES 1
-#define XPAR_DCR_INTC_0_BASEADDR 0xD0000FC0
-#define XPAR_DCR_INTC_0_HIGHADDR 0xD0000FDF
-#define XPAR_DCR_INTC_0_DEVICE_ID 0
-#define XPAR_DCR_INTC_0_KIND_OF_INTR 0x00038000
-
-/******************************************************************/
-
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 0
-#define XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 1
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_TEMP_CRIT_INTR 2
-#define XPAR_DCR_INTC_0_MISC_LOGIC_0_IIC_IRQ_INTR 3
-#define XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 4
-#define XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 5
-#define XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 6
-#define XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR 7
-#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8
-#define XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 9
-#define XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR 10
-#define XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR 11
-#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 12
-#define XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 13
-#define XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR 14
-#define XPAR_DCR_INTC_0_PLB2OPB_BRIDGE_0_BUS_ERROR_DET_INTR 15
-#define XPAR_DCR_INTC_0_PLB_V34_0_BUS_ERROR_DET_INTR 16
-#define XPAR_DCR_INTC_0_OPB2PLB_BRIDGE_0_BUS_ERROR_DET_INTR 17
-
-/******************************************************************/
-
-#define XPAR_XTFT_NUM_INSTANCES 1
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207
-#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_XSYSACE_MEM_WIDTH 8
-#define XPAR_XSYSACE_NUM_INSTANCES 1
-#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000
-#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF
-#define XPAR_OPB_SYSACE_0_DEVICE_ID 0
-#define XPAR_OPB_SYSACE_0_MEM_WIDTH 8
-
-/******************************************************************/
-
-#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
-
-/******************************************************************/
-
-/******************************************************************/
-
-/* Linux Redefines */
-
-/******************************************************************/
-
-#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)
-#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR
-#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID
-#define XPAR_UARTNS550_1_BASEADDR (XPAR_OPB_UART16550_1_BASEADDR+0x1000)
-#define XPAR_UARTNS550_1_HIGHADDR XPAR_OPB_UART16550_1_HIGHADDR
-#define XPAR_UARTNS550_1_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_1_DEVICE_ID XPAR_OPB_UART16550_1_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_GPIO_0_BASEADDR XPAR_MY_OPB_GPIO_0_BASEADDR_0
-#define XPAR_GPIO_0_HIGHADDR XPAR_MY_OPB_GPIO_0_HIGHADDR_0
-#define XPAR_GPIO_0_DEVICE_ID XPAR_MY_OPB_GPIO_0_DEVICE_ID_0
-#define XPAR_GPIO_1_BASEADDR XPAR_MY_OPB_GPIO_0_BASEADDR_1
-#define XPAR_GPIO_1_HIGHADDR XPAR_MY_OPB_GPIO_0_HIGHADDR_1
-#define XPAR_GPIO_1_DEVICE_ID XPAR_MY_OPB_GPIO_0_DEVICE_ID_1
-
-/******************************************************************/
-
-#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR
-#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR
-#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR
-#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_SYSACE_0_BASEADDR XPAR_OPB_SYSACE_0_BASEADDR
-#define XPAR_SYSACE_0_HIGHADDR XPAR_OPB_SYSACE_0_HIGHADDR
-#define XPAR_SYSACE_0_DEVICE_ID XPAR_OPB_SYSACE_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_INTC_0_BASEADDR XPAR_DCR_INTC_0_BASEADDR
-#define XPAR_INTC_0_HIGHADDR XPAR_DCR_INTC_0_HIGHADDR
-#define XPAR_INTC_0_KIND_OF_INTR XPAR_DCR_INTC_0_KIND_OF_INTR
-#define XPAR_INTC_0_DEVICE_ID XPAR_DCR_INTC_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_INTC_0_EMAC_0_VEC_ID XPAR_DCR_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR
-#define XPAR_INTC_0_IIC_0_VEC_ID XPAR_DCR_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR
-#define XPAR_INTC_0_SYSACE_0_VEC_ID XPAR_DCR_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR
-#define XPAR_INTC_0_UARTNS550_0_VEC_ID XPAR_DCR_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR
-#define XPAR_INTC_0_UARTNS550_1_VEC_ID XPAR_DCR_INTC_0_OPB_UART16550_1_IP2INTC_IRPT_INTR
-#define XPAR_INTC_0_PS2_0_VEC_ID XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR
-#define XPAR_INTC_0_PS2_1_VEC_ID XPAR_DCR_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR
-#define XPAR_INTC_0_SPI_0_VEC_ID XPAR_DCR_INTC_0_OPB_SPI_0_IP2INTC_IRPT_INTR
-#define XPAR_INTC_0_TOUCHSCREEN_0_VEC_ID XPAR_DCR_INTC_0_OPB_TSD_REF_0_INTR_INTR
-#define XPAR_INTC_0_PCI_0_VEC_ID_A XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR
-#define XPAR_INTC_0_PCI_0_VEC_ID_B XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR
-#define XPAR_INTC_0_PCI_0_VEC_ID_C XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR
-#define XPAR_INTC_0_PCI_0_VEC_ID_D XPAR_DCR_INTC_0_OPB_PCI_REF_0_INTR_OUT_INTR
-
-/******************************************************************/
-
-#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR
-#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR
-#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT
-#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST
-#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST
-#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_SPI_0_BASEADDR XPAR_OPB_SPI_0_BASEADDR
-#define XPAR_SPI_0_HIGHADDR XPAR_OPB_SPI_0_HIGHADDR
-#define XPAR_SPI_0_DEVICE_ID XPAR_OPB_SPI_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_TOUCHSCREEN_0_BASEADDR XPAR_OPB_TSD_REF_0_BASEADDR
-#define XPAR_TOUCHSCREEN_0_HIGHADDR XPAR_OPB_TSD_REF_0_HIGHADDR
-#define XPAR_TOUCHSCREEN_0_DEVICE_ID XPAR_OPB_TSD_REF_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_TFT_0_BASEADDR XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR
-
-/******************************************************************/
-
-#define XPAR_PCI_0_BASEADDR XPAR_OPB_PCI_REF_0_BASEADDR
-#define XPAR_PCI_0_HIGHADDR XPAR_OPB_PCI_REF_0_HIGHADDR
-#define XPAR_PCI_0_CONFIG_ADDR XPAR_OPB_PCI_REF_0_CONFIG_ADDR
-#define XPAR_PCI_0_CONFIG_DATA XPAR_OPB_PCI_REF_0_CONFIG_DATA
-#define XPAR_PCI_0_LCONFIG_ADDR XPAR_OPB_PCI_REF_0_LCONFIG_ADDR
-#define XPAR_PCI_0_MEM_BASEADDR XPAR_OPB_PCI_REF_0_MEM_BASEADDR
-#define XPAR_PCI_0_MEM_HIGHADDR XPAR_OPB_PCI_REF_0_MEM_HIGHADDR
-#define XPAR_PCI_0_IO_BASEADDR XPAR_OPB_PCI_REF_0_IO_BASEADDR
-#define XPAR_PCI_0_IO_HIGHADDR XPAR_OPB_PCI_REF_0_IO_HIGHADDR
-#define XPAR_PCI_0_CLOCK_FREQ_HZ XPAR_XPCI_CLOCK_HZ
-#define XPAR_PCI_0_DEVICE_ID XPAR_OPB_PCI_REF_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_PS2_0_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0
-#define XPAR_PS2_0_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0
-#define XPAR_PS2_0_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0
-#define XPAR_PS2_1_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1
-#define XPAR_PS2_1_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1
-#define XPAR_PS2_1_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1
-
-/******************************************************************/
-
-#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
-#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
-#define XPAR_DDR_0_SIZE 0x08000000
-
-/******************************************************************/
-
-#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400
-#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF
-#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0
-
-/******************************************************************/
-
-#define XPAR_POWER_0_POWERDOWN_BASEADDR 0x90000004
-#define XPAR_POWER_0_POWERDOWN_HIGHADDR 0x90000007
-#define XPAR_POWER_0_POWERDOWN_VALUE 0xFF
-
-/******************************************************************/
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h b/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h
deleted file mode 100644
index 5cacdcb..0000000
--- a/arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h
+++ /dev/null
@@ -1,243 +0,0 @@
-
-/*******************************************************************
-*
-* CAUTION: This file is automatically generated by libgen.
-* Version: Xilinx EDK 7.1.2 EDK_H.12.5.1
-* DO NOT EDIT.
-*
-* Copyright (c) 2005 Xilinx, Inc. All rights reserved.
-*
-* Description: Driver parameters
-*
-*******************************************************************/
-
-#define XPAR_PLB_BRAM_IF_CNTLR_0_BASEADDR 0xFFFF0000
-#define XPAR_PLB_BRAM_IF_CNTLR_0_HIGHADDR 0xFFFFFFFF
-
-/******************************************************************/
-
-#define XPAR_OPB_EMC_0_MEM0_BASEADDR 0x20000000
-#define XPAR_OPB_EMC_0_MEM0_HIGHADDR 0x200FFFFF
-#define XPAR_OPB_EMC_0_MEM1_BASEADDR 0x28000000
-#define XPAR_OPB_EMC_0_MEM1_HIGHADDR 0x287FFFFF
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR 0xA6000000
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_HIGHADDR 0xA60000FF
-#define XPAR_OPB_EMC_USB_0_MEM0_BASEADDR 0xA5000000
-#define XPAR_OPB_EMC_USB_0_MEM0_HIGHADDR 0xA50000FF
-#define XPAR_PLB_DDR_0_MEM0_BASEADDR 0x00000000
-#define XPAR_PLB_DDR_0_MEM0_HIGHADDR 0x0FFFFFFF
-
-/******************************************************************/
-
-#define XPAR_XEMAC_NUM_INSTANCES 1
-#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
-#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
-#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
-#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
-#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
-#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
-
-/******************************************************************/
-
-#define XPAR_XUARTNS550_NUM_INSTANCES 1
-#define XPAR_XUARTNS550_CLOCK_HZ 100000000
-#define XPAR_OPB_UART16550_0_BASEADDR 0xA0000000
-#define XPAR_OPB_UART16550_0_HIGHADDR 0xA0001FFF
-#define XPAR_OPB_UART16550_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_XGPIO_NUM_INSTANCES 3
-#define XPAR_OPB_GPIO_0_BASEADDR 0x90000000
-#define XPAR_OPB_GPIO_0_HIGHADDR 0x900001FF
-#define XPAR_OPB_GPIO_0_DEVICE_ID 0
-#define XPAR_OPB_GPIO_0_INTERRUPT_PRESENT 0
-#define XPAR_OPB_GPIO_0_IS_DUAL 1
-#define XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR 0x90001000
-#define XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR 0x900011FF
-#define XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID 1
-#define XPAR_OPB_GPIO_EXP_HDR_0_INTERRUPT_PRESENT 0
-#define XPAR_OPB_GPIO_EXP_HDR_0_IS_DUAL 1
-#define XPAR_OPB_GPIO_CHAR_LCD_0_BASEADDR 0x90002000
-#define XPAR_OPB_GPIO_CHAR_LCD_0_HIGHADDR 0x900021FF
-#define XPAR_OPB_GPIO_CHAR_LCD_0_DEVICE_ID 2
-#define XPAR_OPB_GPIO_CHAR_LCD_0_INTERRUPT_PRESENT 0
-#define XPAR_OPB_GPIO_CHAR_LCD_0_IS_DUAL 0
-
-/******************************************************************/
-
-#define XPAR_XPS2_NUM_INSTANCES 2
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0 0
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0 0xA9000000
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0 (0xA9000000+0x3F)
-#define XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1 1
-#define XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1 (0xA9000000+0x1000)
-#define XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1 (0xA9000000+0x103F)
-
-/******************************************************************/
-
-#define XPAR_XIIC_NUM_INSTANCES 1
-#define XPAR_OPB_IIC_0_BASEADDR 0xA8000000
-#define XPAR_OPB_IIC_0_HIGHADDR 0xA80001FF
-#define XPAR_OPB_IIC_0_DEVICE_ID 0
-#define XPAR_OPB_IIC_0_TEN_BIT_ADR 0
-#define XPAR_OPB_IIC_0_GPO_WIDTH 1
-
-/******************************************************************/
-
-#define XPAR_INTC_MAX_NUM_INTR_INPUTS 10
-#define XPAR_XINTC_HAS_IPR 1
-#define XPAR_XINTC_USE_DCR 0
-#define XPAR_XINTC_NUM_INSTANCES 1
-#define XPAR_OPB_INTC_0_BASEADDR 0xD1000FC0
-#define XPAR_OPB_INTC_0_HIGHADDR 0xD1000FDF
-#define XPAR_OPB_INTC_0_DEVICE_ID 0
-#define XPAR_OPB_INTC_0_KIND_OF_INTR 0x00000000
-
-/******************************************************************/
-
-#define XPAR_INTC_SINGLE_BASEADDR 0xD1000FC0
-#define XPAR_INTC_SINGLE_HIGHADDR 0xD1000FDF
-#define XPAR_INTC_SINGLE_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
-#define XPAR_OPB_ETHERNET_0_IP2INTC_IRPT_MASK 0X000001
-#define XPAR_OPB_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR 0
-#define XPAR_SYSTEM_USB_HPI_INT_MASK 0X000002
-#define XPAR_OPB_INTC_0_SYSTEM_USB_HPI_INT_INTR 1
-#define XPAR_MISC_LOGIC_0_PHY_MII_INT_MASK 0X000004
-#define XPAR_OPB_INTC_0_MISC_LOGIC_0_PHY_MII_INT_INTR 2
-#define XPAR_OPB_SYSACE_0_SYSACE_IRQ_MASK 0X000008
-#define XPAR_OPB_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR 3
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_MASK 0X000010
-#define XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR 4
-#define XPAR_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_MASK 0X000020
-#define XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR 5
-#define XPAR_OPB_IIC_0_IP2INTC_IRPT_MASK 0X000040
-#define XPAR_OPB_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR 6
-#define XPAR_OPB_PS2_DUAL_REF_0_SYS_INTR2_MASK 0X000080
-#define XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR 7
-#define XPAR_OPB_PS2_DUAL_REF_0_SYS_INTR1_MASK 0X000100
-#define XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR 8
-#define XPAR_OPB_UART16550_0_IP2INTC_IRPT_MASK 0X000200
-#define XPAR_OPB_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR 9
-
-/******************************************************************/
-
-#define XPAR_XTFT_NUM_INSTANCES 1
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR 0xD0000200
-#define XPAR_PLB_TFT_CNTLR_REF_0_DCR_HIGHADDR 0xD0000207
-#define XPAR_PLB_TFT_CNTLR_REF_0_DEVICE_ID 0
-
-/******************************************************************/
-
-#define XPAR_XSYSACE_MEM_WIDTH 16
-#define XPAR_XSYSACE_NUM_INSTANCES 1
-#define XPAR_OPB_SYSACE_0_BASEADDR 0xCF000000
-#define XPAR_OPB_SYSACE_0_HIGHADDR 0xCF0001FF
-#define XPAR_OPB_SYSACE_0_DEVICE_ID 0
-#define XPAR_OPB_SYSACE_0_MEM_WIDTH 16
-
-/******************************************************************/
-
-#define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 300000000
-
-/******************************************************************/
-
-
-/******************************************************************/
-
-/* Linux Redefines */
-
-/******************************************************************/
-
-#define XPAR_UARTNS550_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR+0x1000)
-#define XPAR_UARTNS550_0_HIGHADDR XPAR_OPB_UART16550_0_HIGHADDR
-#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ XPAR_XUARTNS550_CLOCK_HZ
-#define XPAR_UARTNS550_0_DEVICE_ID XPAR_OPB_UART16550_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_INTC_0_BASEADDR XPAR_OPB_INTC_0_BASEADDR
-#define XPAR_INTC_0_HIGHADDR XPAR_OPB_INTC_0_HIGHADDR
-#define XPAR_INTC_0_KIND_OF_INTR XPAR_OPB_INTC_0_KIND_OF_INTR
-#define XPAR_INTC_0_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_INTC_0_EMAC_0_VEC_ID XPAR_OPB_INTC_0_OPB_ETHERNET_0_IP2INTC_IRPT_INTR
-#define XPAR_INTC_0_SYSACE_0_VEC_ID XPAR_OPB_INTC_0_OPB_SYSACE_0_SYSACE_IRQ_INTR
-#define XPAR_INTC_0_IIC_0_VEC_ID XPAR_OPB_INTC_0_OPB_IIC_0_IP2INTC_IRPT_INTR
-#define XPAR_INTC_0_PS2_1_VEC_ID XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR2_INTR
-#define XPAR_INTC_0_PS2_0_VEC_ID XPAR_OPB_INTC_0_OPB_PS2_DUAL_REF_0_SYS_INTR1_INTR
-#define XPAR_INTC_0_UARTNS550_0_VEC_ID XPAR_OPB_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR
-
-/******************************************************************/
-
-#define XPAR_TFT_0_BASEADDR XPAR_PLB_TFT_CNTLR_REF_0_DCR_BASEADDR
-
-/******************************************************************/
-
-#define XPAR_EMAC_0_BASEADDR XPAR_OPB_ETHERNET_0_BASEADDR
-#define XPAR_EMAC_0_HIGHADDR XPAR_OPB_ETHERNET_0_HIGHADDR
-#define XPAR_EMAC_0_DMA_PRESENT XPAR_OPB_ETHERNET_0_DMA_PRESENT
-#define XPAR_EMAC_0_MII_EXIST XPAR_OPB_ETHERNET_0_MII_EXIST
-#define XPAR_EMAC_0_ERR_COUNT_EXIST XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST
-#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_GPIO_0_BASEADDR XPAR_OPB_GPIO_0_BASEADDR_0
-#define XPAR_GPIO_0_HIGHADDR XPAR_OPB_GPIO_0_HIGHADDR_0
-#define XPAR_GPIO_0_DEVICE_ID XPAR_OPB_GPIO_0_DEVICE_ID_0
-#define XPAR_GPIO_1_BASEADDR XPAR_OPB_GPIO_0_BASEADDR_1
-#define XPAR_GPIO_1_HIGHADDR XPAR_OPB_GPIO_0_HIGHADDR_1
-#define XPAR_GPIO_1_DEVICE_ID XPAR_OPB_GPIO_0_DEVICE_ID_1
-#define XPAR_GPIO_2_BASEADDR XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR_0
-#define XPAR_GPIO_2_HIGHADDR XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR_0
-#define XPAR_GPIO_2_DEVICE_ID XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID_0
-#define XPAR_GPIO_3_BASEADDR XPAR_OPB_GPIO_EXP_HDR_0_BASEADDR_1
-#define XPAR_GPIO_3_HIGHADDR XPAR_OPB_GPIO_EXP_HDR_0_HIGHADDR_1
-#define XPAR_GPIO_3_DEVICE_ID XPAR_OPB_GPIO_EXP_HDR_0_DEVICE_ID_1
-#define XPAR_GPIO_4_BASEADDR XPAR_OPB_GPIO_CHAR_LCD_0_BASEADDR
-#define XPAR_GPIO_4_HIGHADDR XPAR_OPB_GPIO_CHAR_LCD_0_HIGHADDR
-#define XPAR_GPIO_4_DEVICE_ID XPAR_OPB_GPIO_CHAR_LCD_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_PS2_0_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_0
-#define XPAR_PS2_0_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_0
-#define XPAR_PS2_0_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_0
-#define XPAR_PS2_1_BASEADDR XPAR_OPB_PS2_DUAL_REF_0_BASEADDR_1
-#define XPAR_PS2_1_HIGHADDR XPAR_OPB_PS2_DUAL_REF_0_HIGHADDR_1
-#define XPAR_PS2_1_DEVICE_ID XPAR_OPB_PS2_DUAL_REF_0_DEVICE_ID_1
-
-/******************************************************************/
-
-#define XPAR_SYSACE_0_BASEADDR XPAR_OPB_SYSACE_0_BASEADDR
-#define XPAR_SYSACE_0_HIGHADDR XPAR_OPB_SYSACE_0_HIGHADDR
-#define XPAR_SYSACE_0_DEVICE_ID XPAR_OPB_SYSACE_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_IIC_0_BASEADDR XPAR_OPB_IIC_0_BASEADDR
-#define XPAR_IIC_0_HIGHADDR XPAR_OPB_IIC_0_HIGHADDR
-#define XPAR_IIC_0_TEN_BIT_ADR XPAR_OPB_IIC_0_TEN_BIT_ADR
-#define XPAR_IIC_0_DEVICE_ID XPAR_OPB_IIC_0_DEVICE_ID
-
-/******************************************************************/
-
-#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
-#define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
-#define XPAR_DDR_0_SIZE 0x4000000
-
-/******************************************************************/
-
-#define XPAR_PERSISTENT_0_IIC_0_BASEADDR 0x00000400
-#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR 0x000007FF
-#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0
-
-/******************************************************************/
-
-#define XPAR_PCI_0_CLOCK_FREQ_HZ 0
-
-/******************************************************************/
-
diff --git a/arch/ppc/platforms/4xx/yucca.c b/arch/ppc/platforms/4xx/yucca.c
deleted file mode 100644
index f6cfd44..0000000
--- a/arch/ppc/platforms/4xx/yucca.c
+++ /dev/null
@@ -1,393 +0,0 @@
-/*
- * Yucca board specific routines
- *
- * Roland Dreier <rolandd@cisco.com> (based on luan.c by Matt Porter)
- *
- * Copyright 2004-2005 MontaVista Software Inc.
- * Copyright (c) 2005 Cisco Systems. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/blkdev.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/initrd.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/ocp.h>
-#include <asm/pci-bridge.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/ppcboot.h>
-
-#include <syslib/ibm44x_common.h>
-#include <syslib/ibm440gx_common.h>
-#include <syslib/ibm440sp_common.h>
-#include <syslib/ppc440spe_pcie.h>
-
-extern bd_t __res;
-
-static struct ibm44x_clocks clocks __initdata;
-
-static void __init
-yucca_calibrate_decr(void)
-{
- unsigned int freq;
-
- if (mfspr(SPRN_CCR1) & CCR1_TCS)
- freq = YUCCA_TMR_CLK;
- else
- freq = clocks.cpu;
-
- ibm44x_calibrate_decr(freq);
-}
-
-static int
-yucca_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: AMCC\n");
- seq_printf(m, "machine\t\t: PPC440SPe EVB (Yucca)\n");
-
- return 0;
-}
-
-static enum {
- HOSE_UNKNOWN,
- HOSE_PCIX,
- HOSE_PCIE0,
- HOSE_PCIE1,
- HOSE_PCIE2
-} hose_type[4];
-
-static inline int
-yucca_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
-
- if (hose_type[hose->index] == HOSE_PCIX) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 81, -1, -1, -1 }, /* IDSEL 1 - PCIX0 Slot 0 */
- };
- const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- } else if (hose_type[hose->index] == HOSE_PCIE0) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 96, 97, 98, 99 },
- };
- const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- } else if (hose_type[hose->index] == HOSE_PCIE1) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 100, 101, 102, 103 },
- };
- const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- } else if (hose_type[hose->index] == HOSE_PCIE2) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 104, 105, 106, 107 },
- };
- const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
- return -1;
-}
-
-static void __init yucca_set_emacdata(void)
-{
- struct ocp_def *def;
- struct ocp_func_emac_data *emacdata;
-
- /* Set phy_map, phy_mode, and mac_addr for the EMAC */
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
- emacdata = def->additions;
- emacdata->phy_map = 0x00000001; /* Skip 0x00 */
- emacdata->phy_mode = PHY_MODE_GMII;
- memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
-}
-
-static int __init yucca_pcie_card_present(int port)
-{
- void __iomem *pcie_fpga_base;
- u16 reg;
-
- pcie_fpga_base = ioremap64(YUCCA_FPGA_REG_BASE, YUCCA_FPGA_REG_SIZE);
- reg = in_be16(pcie_fpga_base + FPGA_REG1C);
- iounmap(pcie_fpga_base);
-
- switch(port) {
- case 0: return !(reg & FPGA_REG1C_PE0_PRSNT);
- case 1: return !(reg & FPGA_REG1C_PE1_PRSNT);
- case 2: return !(reg & FPGA_REG1C_PE2_PRSNT);
- default: return 0;
- }
-}
-
-/*
- * For the given slot, set rootpoint mode, send power to the slot,
- * turn on the green LED and turn off the yellow LED, enable the clock
- * and turn off reset.
- */
-static void __init yucca_setup_pcie_fpga_rootpoint(int port)
-{
- void __iomem *pcie_reg_fpga_base;
- u16 power, clock, green_led, yellow_led, reset_off, rootpoint, endpoint;
-
- pcie_reg_fpga_base = ioremap64(YUCCA_FPGA_REG_BASE, YUCCA_FPGA_REG_SIZE);
-
- switch(port) {
- case 0:
- rootpoint = FPGA_REG1C_PE0_ROOTPOINT;
- endpoint = 0;
- power = FPGA_REG1A_PE0_PWRON;
- green_led = FPGA_REG1A_PE0_GLED;
- clock = FPGA_REG1A_PE0_REFCLK_ENABLE;
- yellow_led = FPGA_REG1A_PE0_YLED;
- reset_off = FPGA_REG1C_PE0_PERST;
- break;
- case 1:
- rootpoint = 0;
- endpoint = FPGA_REG1C_PE1_ENDPOINT;
- power = FPGA_REG1A_PE1_PWRON;
- green_led = FPGA_REG1A_PE1_GLED;
- clock = FPGA_REG1A_PE1_REFCLK_ENABLE;
- yellow_led = FPGA_REG1A_PE1_YLED;
- reset_off = FPGA_REG1C_PE1_PERST;
- break;
- case 2:
- rootpoint = 0;
- endpoint = FPGA_REG1C_PE2_ENDPOINT;
- power = FPGA_REG1A_PE2_PWRON;
- green_led = FPGA_REG1A_PE2_GLED;
- clock = FPGA_REG1A_PE2_REFCLK_ENABLE;
- yellow_led = FPGA_REG1A_PE2_YLED;
- reset_off = FPGA_REG1C_PE2_PERST;
- break;
-
- default:
- iounmap(pcie_reg_fpga_base);
- return;
- }
-
- out_be16(pcie_reg_fpga_base + FPGA_REG1A,
- ~(power | clock | green_led) &
- (yellow_led | in_be16(pcie_reg_fpga_base + FPGA_REG1A)));
- out_be16(pcie_reg_fpga_base + FPGA_REG1C,
- ~(endpoint | reset_off) &
- (rootpoint | in_be16(pcie_reg_fpga_base + FPGA_REG1C)));
-
- /*
- * Leave device in reset for a while after powering on the
- * slot to give it a chance to initialize.
- */
- mdelay(250);
-
- out_be16(pcie_reg_fpga_base + FPGA_REG1C,
- reset_off | in_be16(pcie_reg_fpga_base + FPGA_REG1C));
-
- iounmap(pcie_reg_fpga_base);
-}
-
-static void __init
-yucca_setup_hoses(void)
-{
- struct pci_controller *hose;
- char name[20];
- int i;
-
- if (0 && ppc440spe_init_pcie()) {
- printk(KERN_WARNING "PPC440SPe PCI Express initialization failed\n");
- return;
- }
-
- for (i = 0; i <= 2; ++i) {
- if (!yucca_pcie_card_present(i))
- continue;
-
- printk(KERN_INFO "PCIE%d: card present\n", i);
- yucca_setup_pcie_fpga_rootpoint(i);
- if (ppc440spe_init_pcie_rootport(i)) {
- printk(KERN_WARNING "PCIE%d: initialization failed\n", i);
- continue;
- }
-
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- sprintf(name, "PCIE%d host bridge", i);
- pci_init_resource(&hose->io_resource,
- YUCCA_PCIX_LOWER_IO,
- YUCCA_PCIX_UPPER_IO,
- IORESOURCE_IO,
- name);
-
- hose->mem_space.start = YUCCA_PCIE_LOWER_MEM +
- i * YUCCA_PCIE_MEM_SIZE;
- hose->mem_space.end = hose->mem_space.start +
- YUCCA_PCIE_MEM_SIZE - 1;
-
- pci_init_resource(&hose->mem_resources[0],
- hose->mem_space.start,
- hose->mem_space.end,
- IORESOURCE_MEM,
- name);
-
- hose->first_busno = 0;
- hose->last_busno = 15;
- hose_type[hose->index] = HOSE_PCIE0 + i;
-
- ppc440spe_setup_pcie(hose, i);
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
- }
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = yucca_map_irq;
-}
-
-TODC_ALLOC();
-
-static void __init
-yucca_early_serial_map(void)
-{
- struct uart_port port;
-
- /* Setup ioremapped serial port access */
- memset(&port, 0, sizeof(port));
- port.membase = ioremap64(PPC440SPE_UART0_ADDR, 8);
- port.irq = UART0_INT;
- port.uartclk = clocks.uart0;
- port.regshift = 0;
- port.iotype = UPIO_MEM;
- port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
- port.line = 0;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 0 failed\n");
- }
-
- port.membase = ioremap64(PPC440SPE_UART1_ADDR, 8);
- port.irq = UART1_INT;
- port.uartclk = clocks.uart1;
- port.line = 1;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 1 failed\n");
- }
-
- port.membase = ioremap64(PPC440SPE_UART2_ADDR, 8);
- port.irq = UART2_INT;
- port.uartclk = BASE_BAUD;
- port.line = 2;
-
- if (early_serial_setup(&port) != 0) {
- printk("Early serial init of port 2 failed\n");
- }
-}
-
-static void __init
-yucca_setup_arch(void)
-{
- yucca_set_emacdata();
-
-#if !defined(CONFIG_BDI_SWITCH)
- /*
- * The Abatron BDI JTAG debugger does not tolerate others
- * mucking with the debug registers.
- */
- mtspr(SPRN_DBCR0, (DBCR0_TDE | DBCR0_IDM));
-#endif
-
- /*
- * Determine various clocks.
- * To be completely correct we should get SysClk
- * from FPGA, because it can be changed by on-board switches
- * --ebs
- */
- /* 440GX and 440SPe clocking is the same - rd */
- ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
- ocp_sys_info.opb_bus_freq = clocks.opb;
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000/HZ;
-
- /* Setup PCIXn host bridges */
- yucca_setup_hoses();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- yucca_early_serial_map();
-
- /* Identify the system */
- printk("Yucca port (Roland Dreier <rolandd@cisco.com>)\n");
-}
-
-void __init platform_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6, unsigned long r7)
-{
- ibm44x_platform_init(r3, r4, r5, r6, r7);
-
- ppc_md.setup_arch = yucca_setup_arch;
- ppc_md.show_cpuinfo = yucca_show_cpuinfo;
- ppc_md.find_end_of_memory = ibm440sp_find_end_of_memory;
- ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
-
- ppc_md.calibrate_decr = yucca_calibrate_decr;
-#ifdef CONFIG_KGDB
- ppc_md.early_serial_map = yucca_early_serial_map;
-#endif
-}
diff --git a/arch/ppc/platforms/4xx/yucca.h b/arch/ppc/platforms/4xx/yucca.h
deleted file mode 100644
index bc9684e..0000000
--- a/arch/ppc/platforms/4xx/yucca.h
+++ /dev/null
@@ -1,108 +0,0 @@
-/*
- * Yucca board definitions
- *
- * Roland Dreier <rolandd@cisco.com> (based on luan.h by Matt Porter)
- *
- * Copyright 2004-2005 MontaVista Software Inc.
- * Copyright (c) 2005 Cisco Systems. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_YUCCA_H__
-#define __ASM_YUCCA_H__
-
-#include <platforms/4xx/ppc440spe.h>
-
-/* F/W TLB mapping used in bootloader glue to reset EMAC */
-#define PPC44x_EMAC0_MR0 0xa0000800
-
-/* Location of MAC addresses in PIBS image */
-#define PIBS_FLASH_BASE 0xffe00000
-#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400)
-
-/* External timer clock frequency */
-#define YUCCA_TMR_CLK 25000000
-
-/*
- * FPGA registers
- */
-#define YUCCA_FPGA_REG_BASE 0x00000004e2000000ULL
-#define YUCCA_FPGA_REG_SIZE 0x24
-
-#define FPGA_REG1A 0x1a
-
-#define FPGA_REG1A_PE0_GLED 0x8000
-#define FPGA_REG1A_PE1_GLED 0x4000
-#define FPGA_REG1A_PE2_GLED 0x2000
-#define FPGA_REG1A_PE0_YLED 0x1000
-#define FPGA_REG1A_PE1_YLED 0x0800
-#define FPGA_REG1A_PE2_YLED 0x0400
-#define FPGA_REG1A_PE0_PWRON 0x0200
-#define FPGA_REG1A_PE1_PWRON 0x0100
-#define FPGA_REG1A_PE2_PWRON 0x0080
-#define FPGA_REG1A_PE0_REFCLK_ENABLE 0x0040
-#define FPGA_REG1A_PE1_REFCLK_ENABLE 0x0020
-#define FPGA_REG1A_PE2_REFCLK_ENABLE 0x0010
-#define FPGA_REG1A_PE_SPREAD0 0x0008
-#define FPGA_REG1A_PE_SPREAD1 0x0004
-#define FPGA_REG1A_PE_SELSOURCE_0 0x0002
-#define FPGA_REG1A_PE_SELSOURCE_1 0x0001
-
-#define FPGA_REG1C 0x1c
-
-#define FPGA_REG1C_PE0_ROOTPOINT 0x8000
-#define FPGA_REG1C_PE1_ENDPOINT 0x4000
-#define FPGA_REG1C_PE2_ENDPOINT 0x2000
-#define FPGA_REG1C_PE0_PRSNT 0x1000
-#define FPGA_REG1C_PE1_PRSNT 0x0800
-#define FPGA_REG1C_PE2_PRSNT 0x0400
-#define FPGA_REG1C_PE0_WAKE 0x0080
-#define FPGA_REG1C_PE1_WAKE 0x0040
-#define FPGA_REG1C_PE2_WAKE 0x0020
-#define FPGA_REG1C_PE0_PERST 0x0010
-#define FPGA_REG1C_PE1_PERST 0x0008
-#define FPGA_REG1C_PE2_PERST 0x0004
-
-/*
- * Serial port defines
- */
-#define RS_TABLE_SIZE 3
-
-/* PIBS defined UART mappings, used before early_serial_setup */
-#define UART0_IO_BASE 0xa0000200
-#define UART1_IO_BASE 0xa0000300
-#define UART2_IO_BASE 0xa0000600
-
-#define BASE_BAUD 11059200
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: (void*)UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1) \
- STD_UART_OP(2)
-
-/* PCI support */
-#define YUCCA_PCIX_LOWER_IO 0x00000000
-#define YUCCA_PCIX_UPPER_IO 0x0000ffff
-#define YUCCA_PCIX_LOWER_MEM 0x80000000
-#define YUCCA_PCIX_UPPER_MEM 0x8fffffff
-#define YUCCA_PCIE_LOWER_MEM 0x90000000
-#define YUCCA_PCIE_MEM_SIZE 0x10000000
-
-#define YUCCA_PCIX_MEM_SIZE 0x10000000
-#define YUCCA_PCIX_MEM_OFFSET 0x00000000
-#define YUCCA_PCIE_MEM_SIZE 0x10000000
-#define YUCCA_PCIE_MEM_OFFSET 0x00000000
-
-#endif /* __ASM_YUCCA_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
deleted file mode 100644
index 6260231..0000000
--- a/arch/ppc/platforms/Makefile
+++ /dev/null
@@ -1,25 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o
-obj-$(CONFIG_PREP_RESIDUAL) += residual.o
-obj-$(CONFIG_TQM8260) += tqm8260_setup.o
-obj-$(CONFIG_CPCI690) += cpci690.o
-obj-$(CONFIG_EV64260) += ev64260.o
-obj-$(CONFIG_CHESTNUT) += chestnut.o
-obj-$(CONFIG_LOPEC) += lopec.o
-obj-$(CONFIG_KATANA) += katana.o
-obj-$(CONFIG_HDPU) += hdpu.o
-obj-$(CONFIG_MVME5100) += mvme5100.o
-obj-$(CONFIG_PAL4) += pal4_setup.o pal4_pci.o
-obj-$(CONFIG_POWERPMC250) += powerpmc250.o
-obj-$(CONFIG_PPLUS) += pplus.o
-obj-$(CONFIG_PRPMC750) += prpmc750.o
-obj-$(CONFIG_PRPMC800) += prpmc800.o
-obj-$(CONFIG_RADSTONE_PPC7D) += radstone_ppc7d.o
-obj-$(CONFIG_SANDPOINT) += sandpoint.o
-obj-$(CONFIG_SBC82xx) += sbc82xx.o
-obj-$(CONFIG_SPRUCE) += spruce.o
-obj-$(CONFIG_LITE5200) += lite5200.o
-obj-$(CONFIG_EV64360) += ev64360.o
diff --git a/arch/ppc/platforms/bseip.h b/arch/ppc/platforms/bseip.h
deleted file mode 100644
index 691f4a52..0000000
--- a/arch/ppc/platforms/bseip.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * A collection of structures, addresses, and values associated with
- * the Bright Star Engineering ip-Engine board. Copied from the MBX stuff.
- *
- * Copyright (c) 1998 Dan Malek (dmalek@jlc.net)
- */
-#ifndef __MACH_BSEIP_DEFS
-#define __MACH_BSEIP_DEFS
-
-#ifndef __ASSEMBLY__
-/* A Board Information structure that is given to a program when
- * prom starts it up.
- */
-typedef struct bd_info {
- unsigned int bi_memstart; /* Memory start address */
- unsigned int bi_memsize; /* Memory (end) size in bytes */
- unsigned int bi_intfreq; /* Internal Freq, in Hz */
- unsigned int bi_busfreq; /* Bus Freq, in Hz */
- unsigned char bi_enetaddr[6];
- unsigned int bi_baudrate;
-} bd_t;
-
-extern bd_t m8xx_board_info;
-
-/* Memory map is configured by the PROM startup.
- * All we need to get started is the IMMR.
- */
-#define IMAP_ADDR ((uint)0xff000000)
-#define IMAP_SIZE ((uint)(64 * 1024))
-#define PCMCIA_MEM_ADDR ((uint)0x04000000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-#endif /* !__ASSEMBLY__ */
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif
diff --git a/arch/ppc/platforms/ccm.h b/arch/ppc/platforms/ccm.h
deleted file mode 100644
index 69000b1..0000000
--- a/arch/ppc/platforms/ccm.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Siemens Card Controller Module specific definitions
- *
- * Copyright (C) 2001-2002 Wolfgang Denk (wd@denx.de)
- */
-
-#ifndef __MACH_CCM_H
-#define __MACH_CCM_H
-
-
-#include <asm/ppcboot.h>
-
-#define CCM_IMMR_BASE 0xF0000000 /* phys. addr of IMMR */
-#define CCM_IMAP_SIZE (64 * 1024) /* size of mapped area */
-
-#define IMAP_ADDR CCM_IMMR_BASE /* physical base address of IMMR area */
-#define IMAP_SIZE CCM_IMAP_SIZE /* mapped size of IMMR area */
-
-#define FEC_INTERRUPT 13 /* = SIU_LEVEL6 */
-#define DEC_INTERRUPT 11 /* = SIU_LEVEL5 */
-#define CPM_INTERRUPT 9 /* = SIU_LEVEL4 */
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif /* __MACH_CCM_H */
diff --git a/arch/ppc/platforms/chestnut.c b/arch/ppc/platforms/chestnut.c
deleted file mode 100644
index 27c140f..0000000
--- a/arch/ppc/platforms/chestnut.c
+++ /dev/null
@@ -1,574 +0,0 @@
-/*
- * Board setup routines for IBM Chestnut
- *
- * Author: <source@mvista.com>
- *
- * <2004> (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/blkdev.h>
-#include <linux/console.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <linux/mtd/physmap.h>
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/hw_irq.h>
-#include <asm/machdep.h>
-#include <asm/kgdb.h>
-#include <asm/bootinfo.h>
-#include <asm/mv64x60.h>
-#include <platforms/chestnut.h>
-
-static void __iomem *sram_base; /* Virtual addr of Internal SRAM */
-static void __iomem *cpld_base; /* Virtual addr of CPLD Regs */
-
-static mv64x60_handle_t bh;
-
-extern void gen550_progress(char *, unsigned short);
-extern void gen550_init(int, struct uart_port *);
-extern void mv64360_pcibios_fixup(mv64x60_handle_t *bh);
-
-#define CHESTNUT_PRESERVE_MASK (BIT(MV64x60_CPU2DEV_0_WIN) | \
- BIT(MV64x60_CPU2DEV_1_WIN) | \
- BIT(MV64x60_CPU2DEV_2_WIN) | \
- BIT(MV64x60_CPU2DEV_3_WIN) | \
- BIT(MV64x60_CPU2BOOT_WIN))
-/**************************************************************************
- * FUNCTION: chestnut_calibrate_decr
- *
- * DESCRIPTION: initialize decrementer interrupt frequency (used as system
- * timer)
- *
- ****/
-static void __init
-chestnut_calibrate_decr(void)
-{
- ulong freq;
-
- freq = CHESTNUT_BUS_SPEED / 4;
-
- printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
- freq/1000000, freq%1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-}
-
-static int
-chestnut_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: IBM\n");
- seq_printf(m, "machine\t\t: 750FX/GX Eval Board (Chestnut/Buckeye)\n");
-
- return 0;
-}
-
-/**************************************************************************
- * FUNCTION: chestnut_find_end_of_memory
- *
- * DESCRIPTION: ppc_md memory size callback
- *
- ****/
-unsigned long __init
-chestnut_find_end_of_memory(void)
-{
- static int mem_size = 0;
-
- if (mem_size == 0) {
- mem_size = mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE,
- MV64x60_TYPE_MV64460);
- }
- return mem_size;
-}
-
-#if defined(CONFIG_SERIAL_8250)
-static void __init
-chestnut_early_serial_map(void)
-{
- struct uart_port port;
-
- /* Setup serial port access */
- memset(&port, 0, sizeof(port));
- port.uartclk = BASE_BAUD * 16;
- port.irq = UART0_INT;
- port.flags = STD_COM_FLAGS | UPF_IOREMAP;
- port.iotype = UPIO_MEM;
- port.mapbase = CHESTNUT_UART0_IO_BASE;
- port.regshift = 0;
-
- if (early_serial_setup(&port) != 0)
- printk("Early serial init of port 0 failed\n");
-
- /* Assume early_serial_setup() doesn't modify serial_req */
- port.line = 1;
- port.irq = UART1_INT;
- port.mapbase = CHESTNUT_UART1_IO_BASE;
-
- if (early_serial_setup(&port) != 0)
- printk("Early serial init of port 1 failed\n");
-}
-#endif
-
-/**************************************************************************
- * FUNCTION: chestnut_map_irq
- *
- * DESCRIPTION: 0 return since PCI IRQs not needed
- *
- ****/
-static int __init
-chestnut_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] = {
- {CHESTNUT_PCI_SLOT0_IRQ, CHESTNUT_PCI_SLOT0_IRQ,
- CHESTNUT_PCI_SLOT0_IRQ, CHESTNUT_PCI_SLOT0_IRQ},
- {CHESTNUT_PCI_SLOT1_IRQ, CHESTNUT_PCI_SLOT1_IRQ,
- CHESTNUT_PCI_SLOT1_IRQ, CHESTNUT_PCI_SLOT1_IRQ},
- {CHESTNUT_PCI_SLOT2_IRQ, CHESTNUT_PCI_SLOT2_IRQ,
- CHESTNUT_PCI_SLOT2_IRQ, CHESTNUT_PCI_SLOT2_IRQ},
- {CHESTNUT_PCI_SLOT3_IRQ, CHESTNUT_PCI_SLOT3_IRQ,
- CHESTNUT_PCI_SLOT3_IRQ, CHESTNUT_PCI_SLOT3_IRQ},
- };
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
-
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-
-/**************************************************************************
- * FUNCTION: chestnut_setup_bridge
- *
- * DESCRIPTION: initalize board-specific settings on the MV64360
- *
- ****/
-static void __init
-chestnut_setup_bridge(void)
-{
- struct mv64x60_setup_info si;
- int i;
-
- if ( ppc_md.progress )
- ppc_md.progress("chestnut_setup_bridge: enter", 0);
-
- memset(&si, 0, sizeof(si));
-
- si.phys_reg_base = CONFIG_MV64X60_NEW_BASE;
-
- /* setup only PCI bus 0 (bus 1 not used) */
- si.pci_0.enable_bus = 1;
- si.pci_0.pci_io.cpu_base = CHESTNUT_PCI0_IO_PROC_ADDR;
- si.pci_0.pci_io.pci_base_hi = 0;
- si.pci_0.pci_io.pci_base_lo = CHESTNUT_PCI0_IO_PCI_ADDR;
- si.pci_0.pci_io.size = CHESTNUT_PCI0_IO_SIZE;
- si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE; /* no swapping */
- si.pci_0.pci_mem[0].cpu_base = CHESTNUT_PCI0_MEM_PROC_ADDR;
- si.pci_0.pci_mem[0].pci_base_hi = CHESTNUT_PCI0_MEM_PCI_HI_ADDR;
- si.pci_0.pci_mem[0].pci_base_lo = CHESTNUT_PCI0_MEM_PCI_LO_ADDR;
- si.pci_0.pci_mem[0].size = CHESTNUT_PCI0_MEM_SIZE;
- si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE; /* no swapping */
- si.pci_0.pci_cmd_bits = 0;
- si.pci_0.latency_timer = 0x80;
-
- for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++) {
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE;
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE;
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE;
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_NONE |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-#else
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; /* errata */
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; /* errata */
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; /* errata */
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_WB |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES;
-#endif
- }
-
- /* Lookup host bridge - on CPU 0 - no SMP support */
- if (mv64x60_init(&bh, &si)) {
- printk("\n\nPCI Bridge initialization failed!\n");
- }
-
- pci_dram_offset = 0;
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = chestnut_map_irq;
- ppc_md.pci_exclude_device = mv64x60_pci_exclude_device;
-
- mv64x60_set_bus(&bh, 0, 0);
- bh.hose_a->first_busno = 0;
- bh.hose_a->last_busno = 0xff;
- bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0);
-}
-
-void __init
-chestnut_setup_peripherals(void)
-{
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
- CHESTNUT_BOOT_8BIT_BASE, CHESTNUT_BOOT_8BIT_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN,
- CHESTNUT_32BIT_BASE, CHESTNUT_32BIT_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN,
- CHESTNUT_CPLD_BASE, CHESTNUT_CPLD_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
- cpld_base = ioremap(CHESTNUT_CPLD_BASE, CHESTNUT_CPLD_SIZE);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN,
- CHESTNUT_UART_BASE, CHESTNUT_UART_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN,
- CHESTNUT_FRAM_BASE, CHESTNUT_FRAM_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
- CHESTNUT_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
-
-#ifdef CONFIG_NOT_COHERENT_CACHE
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b0);
-#else
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2);
-#endif
- sram_base = ioremap(CHESTNUT_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE);
- memset(sram_base, 0, MV64360_SRAM_SIZE);
-
- /*
- * Configure MPP pins for PCI DMA
- *
- * PCI Slot GNT pin REQ pin
- * 0 MPP16 MPP17
- * 1 MPP18 MPP19
- * 2 MPP20 MPP21
- * 3 MPP22 MPP23
- */
- mv64x60_write(&bh, MV64x60_MPP_CNTL_2,
- (0x1 << 0) | /* MPPSel16 PCI0_GNT[0] */
- (0x1 << 4) | /* MPPSel17 PCI0_REQ[0] */
- (0x1 << 8) | /* MPPSel18 PCI0_GNT[1] */
- (0x1 << 12) | /* MPPSel19 PCI0_REQ[1] */
- (0x1 << 16) | /* MPPSel20 PCI0_GNT[2] */
- (0x1 << 20) | /* MPPSel21 PCI0_REQ[2] */
- (0x1 << 24) | /* MPPSel22 PCI0_GNT[3] */
- (0x1 << 28)); /* MPPSel23 PCI0_REQ[3] */
- /*
- * Set unused MPP pins for output, as per schematic note
- *
- * Unused Pins: MPP01, MPP02, MPP04, MPP05, MPP06
- * MPP09, MPP10, MPP13, MPP14, MPP15
- */
- mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_0,
- (0xf << 4) | /* MPPSel01 GPIO[1] */
- (0xf << 8) | /* MPPSel02 GPIO[2] */
- (0xf << 16) | /* MPPSel04 GPIO[4] */
- (0xf << 20) | /* MPPSel05 GPIO[5] */
- (0xf << 24)); /* MPPSel06 GPIO[6] */
- mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1,
- (0xf << 4) | /* MPPSel09 GPIO[9] */
- (0xf << 8) | /* MPPSel10 GPIO[10] */
- (0xf << 20) | /* MPPSel13 GPIO[13] */
- (0xf << 24) | /* MPPSel14 GPIO[14] */
- (0xf << 28)); /* MPPSel15 GPIO[15] */
- mv64x60_set_bits(&bh, MV64x60_GPP_IO_CNTL, /* Output */
- BIT(1) | BIT(2) | BIT(4) | BIT(5) | BIT(6) |
- BIT(9) | BIT(10) | BIT(13) | BIT(14) | BIT(15));
-
- /*
- * Configure the following MPP pins to indicate a level
- * triggered interrupt
- *
- * MPP24 - Board Reset (just map the MPP & GPP for chestnut_reset)
- * MPP25 - UART A (high)
- * MPP26 - UART B (high)
- * MPP28 - PCI Slot 3 (low)
- * MPP29 - PCI Slot 2 (low)
- * MPP30 - PCI Slot 1 (low)
- * MPP31 - PCI Slot 0 (low)
- */
- mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_3,
- BIT(3) | BIT(2) | BIT(1) | BIT(0) | /* MPP 24 */
- BIT(7) | BIT(6) | BIT(5) | BIT(4) | /* MPP 25 */
- BIT(11) | BIT(10) | BIT(9) | BIT(8) | /* MPP 26 */
- BIT(19) | BIT(18) | BIT(17) | BIT(16) | /* MPP 28 */
- BIT(23) | BIT(22) | BIT(21) | BIT(20) | /* MPP 29 */
- BIT(27) | BIT(26) | BIT(25) | BIT(24) | /* MPP 30 */
- BIT(31) | BIT(30) | BIT(29) | BIT(28)); /* MPP 31 */
-
- /*
- * Define GPP 25 (high), 26 (high), 28 (low), 29 (low), 30 (low),
- * 31 (low) interrupt polarity input signal and level triggered
- */
- mv64x60_clr_bits(&bh, MV64x60_GPP_LEVEL_CNTL, BIT(25) | BIT(26));
- mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL,
- BIT(28) | BIT(29) | BIT(30) | BIT(31));
- mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL,
- BIT(25) | BIT(26) | BIT(28) | BIT(29) | BIT(30) |
- BIT(31));
-
- /* Config GPP interrupt controller to respond to level trigger */
- mv64x60_set_bits(&bh, MV64360_COMM_ARBITER_CNTL, BIT(10));
-
- /*
- * Dismiss and then enable interrupt on GPP interrupt cause for CPU #0
- */
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE,
- ~(BIT(25) | BIT(26) | BIT(28) | BIT(29) | BIT(30) |
- BIT(31)));
- mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK,
- BIT(25) | BIT(26) | BIT(28) | BIT(29) | BIT(30) |
- BIT(31));
-
- /*
- * Dismiss and then enable interrupt on CPU #0 high cause register
- * BIT27 summarizes GPP interrupts 24-31
- */
- mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, BIT(27));
-
- if (ppc_md.progress)
- ppc_md.progress("chestnut_setup_bridge: exit", 0);
-}
-
-/**************************************************************************
- * FUNCTION: chestnut_setup_arch
- *
- * DESCRIPTION: ppc_md machine configuration callback
- *
- ****/
-static void __init
-chestnut_setup_arch(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("chestnut_setup_arch: enter", 0);
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000 / HZ;
-
- /* if the time base value is greater than bus freq/4 (the TB and
- * decrementer tick rate) + signed integer rollover value, we
- * can spend a fair amount of time waiting for the rollover to
- * happen. To get around this, initialize the time base register
- * to a "safe" value.
- */
- set_tb(0, 0);
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- /*
- * Set up the L2CR register.
- */
- _set_L2CR(_get_L2CR() | L2CR_L2E);
-
- chestnut_setup_bridge();
- chestnut_setup_peripherals();
-
-#ifdef CONFIG_DUMMY_CONSOLE
- conswitchp = &dummy_con;
-#endif
-
-#if defined(CONFIG_SERIAL_8250)
- chestnut_early_serial_map();
-#endif
-
- /* Identify the system */
- printk(KERN_INFO "System Identification: IBM 750FX/GX Eval Board\n");
- printk(KERN_INFO "IBM 750FX/GX port (C) 2004 MontaVista Software, Inc."
- " (source@mvista.com)\n");
-
- if (ppc_md.progress)
- ppc_md.progress("chestnut_setup_arch: exit", 0);
-}
-
-#ifdef CONFIG_MTD_PHYSMAP
-static struct mtd_partition ptbl;
-
-static int __init
-chestnut_setup_mtd(void)
-{
- memset(&ptbl, 0, sizeof(ptbl));
-
- ptbl.name = "User FS";
- ptbl.size = CHESTNUT_32BIT_SIZE;
-
- physmap_map.size = CHESTNUT_32BIT_SIZE;
- physmap_set_partitions(&ptbl, 1);
- return 0;
-}
-
-arch_initcall(chestnut_setup_mtd);
-#endif
-
-/**************************************************************************
- * FUNCTION: chestnut_restart
- *
- * DESCRIPTION: ppc_md machine reset callback
- * reset the board via the CPLD command register
- *
- ****/
-static void
-chestnut_restart(char *cmd)
-{
- volatile ulong i = 10000000;
-
- local_irq_disable();
-
- /*
- * Set CPLD Reg 3 bit 0 to 1 to allow MPP signals on reset to work
- *
- * MPP24 - board reset
- */
- writeb(0x1, cpld_base + 3);
-
- /* GPP pin tied to MPP earlier */
- mv64x60_set_bits(&bh, MV64x60_GPP_VALUE_SET, BIT(24));
-
- while (i-- > 0);
- panic("restart failed\n");
-}
-
-static void
-chestnut_halt(void)
-{
- local_irq_disable();
- for (;;);
- /* NOTREACHED */
-}
-
-static void
-chestnut_power_off(void)
-{
- chestnut_halt();
- /* NOTREACHED */
-}
-
-/**************************************************************************
- * FUNCTION: chestnut_map_io
- *
- * DESCRIPTION: configure fixed memory-mapped IO
- *
- ****/
-static void __init
-chestnut_map_io(void)
-{
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- io_block_mapping(CHESTNUT_UART_BASE, CHESTNUT_UART_BASE, 0x100000,
- _PAGE_IO);
-#endif
-}
-
-/**************************************************************************
- * FUNCTION: chestnut_set_bat
- *
- * DESCRIPTION: configures a (temporary) bat mapping for early access to
- * device I/O
- *
- ****/
-static __inline__ void
-chestnut_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT3U, 0xf0001ffe);
- mtspr(SPRN_DBAT3L, 0xf000002a);
- mb();
-}
-
-/**************************************************************************
- * FUNCTION: platform_init
- *
- * DESCRIPTION: main entry point for configuring board-specific machine
- * callbacks
- *
- ****/
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /* Copy the kernel command line arguments to a safe place. */
-
- if (r6) {
- *(char *) (r7 + KERNELBASE) = 0;
- strcpy(cmd_line, (char *) (r6 + KERNELBASE));
- }
-
- isa_mem_base = 0;
-
- ppc_md.setup_arch = chestnut_setup_arch;
- ppc_md.show_cpuinfo = chestnut_show_cpuinfo;
- ppc_md.init_IRQ = mv64360_init_irq;
- ppc_md.get_irq = mv64360_get_irq;
- ppc_md.init = NULL;
-
- ppc_md.find_end_of_memory = chestnut_find_end_of_memory;
- ppc_md.setup_io_mappings = chestnut_map_io;
-
- ppc_md.restart = chestnut_restart;
- ppc_md.power_off = chestnut_power_off;
- ppc_md.halt = chestnut_halt;
-
- ppc_md.time_init = NULL;
- ppc_md.set_rtc_time = NULL;
- ppc_md.get_rtc_time = NULL;
- ppc_md.calibrate_decr = chestnut_calibrate_decr;
-
- ppc_md.nvram_read_val = NULL;
- ppc_md.nvram_write_val = NULL;
-
- ppc_md.heartbeat = NULL;
-
- bh.p_base = CONFIG_MV64X60_NEW_BASE;
-
- chestnut_set_bat();
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG)
- ppc_md.progress = gen550_progress;
-#endif
-#if defined(CONFIG_KGDB)
- ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
-#endif
-
- if (ppc_md.progress)
- ppc_md.progress("chestnut_init(): exit", 0);
-}
diff --git a/arch/ppc/platforms/chestnut.h b/arch/ppc/platforms/chestnut.h
deleted file mode 100644
index e00fd9f..0000000
--- a/arch/ppc/platforms/chestnut.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * Definitions for IBM 750FXGX Eval (Chestnut)
- *
- * Author: <source@mvista.com>
- *
- * Based on Artesyn Katana code done by Tim Montgomery <timm@artesyncp.com>
- * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
- * Based on code done by Mark A. Greer <mgreer@mvista.com>
- *
- * <2004> (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * This is the CPU physical memory map (windows must be at least 1MB and start
- * on a boundary that is a multiple of the window size):
- *
- * Seems on the IBM 750FXGX Eval board, the MV64460 Registers can be in
- * only 2 places per switch U17 0x14000000 or 0xf1000000 easily - chose to
- * implement at 0xf1000000 only at this time
- *
- * 0xfff00000-0xffffffff - 8 Flash
- * 0xffe00000-0xffefffff - BOOT SRAM
- * 0xffd00000-0xffd00004 - CPLD
- * 0xffc00000-0xffc0000f - UART
- * 0xffb00000-0xffb07fff - FRAM
- * 0xff840000-0xffafffff - *** HOLE ***
- * 0xff800000-0xff83ffff - MV64460 Integrated SRAM
- * 0xfe000000-0xff8fffff - *** HOLE ***
- * 0xfc000000-0xfdffffff - 32bit Flash
- * 0xf1010000-0xfbffffff - *** HOLE ***
- * 0xf1000000-0xf100ffff - MV64460 Registers
- */
-
-#ifndef __PPC_PLATFORMS_CHESTNUT_H__
-#define __PPC_PLATFORMS_CHESTNUT_H__
-
-#define CHESTNUT_BOOT_8BIT_BASE 0xfff00000
-#define CHESTNUT_BOOT_8BIT_SIZE_ACTUAL (1024*1024)
-#define CHESTNUT_BOOT_SRAM_BASE 0xffe00000
-#define CHESTNUT_BOOT_SRAM_SIZE_ACTUAL (1024*1024)
-#define CHESTNUT_CPLD_BASE 0xffd00000
-#define CHESTNUT_CPLD_SIZE_ACTUAL 5
-#define CHESTNUT_CPLD_REG3 (CHESTNUT_CPLD_BASE+3)
-#define CHESTNUT_UART_BASE 0xffc00000
-#define CHESTNUT_UART_SIZE_ACTUAL 16
-#define CHESTNUT_FRAM_BASE 0xffb00000
-#define CHESTNUT_FRAM_SIZE_ACTUAL (32*1024)
-#define CHESTNUT_INTERNAL_SRAM_BASE 0xff800000
-#define CHESTNUT_32BIT_BASE 0xfc000000
-#define CHESTNUT_32BIT_SIZE (32*1024*1024)
-
-#define CHESTNUT_BOOT_8BIT_SIZE max(MV64360_WINDOW_SIZE_MIN, \
- CHESTNUT_BOOT_8BIT_SIZE_ACTUAL)
-#define CHESTNUT_BOOT_SRAM_SIZE max(MV64360_WINDOW_SIZE_MIN, \
- CHESTNUT_BOOT_SRAM_SIZE_ACTUAL)
-#define CHESTNUT_CPLD_SIZE max(MV64360_WINDOW_SIZE_MIN, \
- CHESTNUT_CPLD_SIZE_ACTUAL)
-#define CHESTNUT_UART_SIZE max(MV64360_WINDOW_SIZE_MIN, \
- CHESTNUT_UART_SIZE_ACTUAL)
-#define CHESTNUT_FRAM_SIZE max(MV64360_WINDOW_SIZE_MIN, \
- CHESTNUT_FRAM_SIZE_ACTUAL)
-
-#define CHESTNUT_BUS_SPEED 200000000
-#define CHESTNUT_PIBS_DATABASE 0xf0000 /* from PIBS src code */
-
-#define KATANA_ETH0_PHY_ADDR 12
-#define KATANA_ETH1_PHY_ADDR 11
-#define KATANA_ETH2_PHY_ADDR 4
-
-#define CHESTNUT_ETH_TX_QUEUE_SIZE 800
-#define CHESTNUT_ETH_RX_QUEUE_SIZE 400
-
-/*
- * PCI windows
- */
-
-#define CHESTNUT_PCI0_MEM_PROC_ADDR 0x80000000
-#define CHESTNUT_PCI0_MEM_PCI_HI_ADDR 0x00000000
-#define CHESTNUT_PCI0_MEM_PCI_LO_ADDR 0x80000000
-#define CHESTNUT_PCI0_MEM_SIZE 0x10000000
-#define CHESTNUT_PCI0_IO_PROC_ADDR 0xa0000000
-#define CHESTNUT_PCI0_IO_PCI_ADDR 0x00000000
-#define CHESTNUT_PCI0_IO_SIZE 0x01000000
-
-/*
- * Board-specific IRQ info
- */
-#define CHESTNUT_PCI_SLOT0_IRQ (64 + 31)
-#define CHESTNUT_PCI_SLOT1_IRQ (64 + 30)
-#define CHESTNUT_PCI_SLOT2_IRQ (64 + 29)
-#define CHESTNUT_PCI_SLOT3_IRQ (64 + 28)
-
-/* serial port definitions */
-#define CHESTNUT_UART0_IO_BASE (CHESTNUT_UART_BASE + 8)
-#define CHESTNUT_UART1_IO_BASE CHESTNUT_UART_BASE
-
-#define UART0_INT (64 + 25)
-#define UART1_INT (64 + 26)
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define RS_TABLE_SIZE 64
-#else
-#define RS_TABLE_SIZE 2
-#endif
-
-/* Rate for the 3.6864 Mhz clock for the onboard serial chip */
-#define BASE_BAUD (3686400 / 16)
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#endif
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, STD_COM_FLAGS, \
- iomem_base: (u8 *)CHESTNUT_UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-
-#endif /* __PPC_PLATFORMS_CHESTNUT_H__ */
diff --git a/arch/ppc/platforms/cpci690.c b/arch/ppc/platforms/cpci690.c
deleted file mode 100644
index 07f672d..0000000
--- a/arch/ppc/platforms/cpci690.c
+++ /dev/null
@@ -1,453 +0,0 @@
-/*
- * Board setup routines for the Force CPCI690 board.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This programr
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/fs.h>
-#include <linux/seq_file.h>
-#include <linux/console.h>
-#include <linux/initrd.h>
-#include <linux/root_dev.h>
-#include <linux/mv643xx.h>
-#include <linux/platform_device.h>
-#include <asm/bootinfo.h>
-#include <asm/machdep.h>
-#include <asm/todc.h>
-#include <asm/time.h>
-#include <asm/mv64x60.h>
-#include <platforms/cpci690.h>
-
-#define BOARD_VENDOR "Force"
-#define BOARD_MACHINE "CPCI690"
-
-/* Set IDE controllers into Native mode? */
-#define SET_PCI_IDE_NATIVE
-
-static struct mv64x60_handle bh;
-static void __iomem *cpci690_br_base;
-
-TODC_ALLOC();
-
-static int __init
-cpci690_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
-
- if (hose->index == 0) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 90, 91, 88, 89 }, /* IDSEL 30/20 - Sentinel */
- };
-
- const long min_idsel = 20, max_idsel = 20, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- } else {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 93, 94, 95, 92 }, /* IDSEL 28/18 - PMC slot 2 */
- { 0, 0, 0, 0 }, /* IDSEL 29/19 - Not used */
- { 94, 95, 92, 93 }, /* IDSEL 30/20 - PMC slot 1 */
- };
-
- const long min_idsel = 18, max_idsel = 20, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
-}
-
-#define GB (1024UL * 1024UL * 1024UL)
-
-static u32
-cpci690_get_bus_freq(void)
-{
- if (boot_mem_size >= (1*GB)) /* bus speed based on mem size */
- return 100000000;
- else
- return 133333333;
-}
-
-static const unsigned int cpu_750xx[32] = { /* 750FX & 750GX */
- 0, 0, 2, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,/* 0-15*/
- 16, 17, 18, 19, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 0 /*16-31*/
-};
-
-static int
-cpci690_get_cpu_freq(void)
-{
- unsigned long pll_cfg;
-
- pll_cfg = (mfspr(SPRN_HID1) & 0xf8000000) >> 27;
- return cpci690_get_bus_freq() * cpu_750xx[pll_cfg]/2;
-}
-
-static void __init
-cpci690_setup_bridge(void)
-{
- struct mv64x60_setup_info si;
- int i;
-
- memset(&si, 0, sizeof(si));
-
- si.phys_reg_base = CONFIG_MV64X60_NEW_BASE;
-
- si.pci_0.enable_bus = 1;
- si.pci_0.pci_io.cpu_base = CPCI690_PCI0_IO_START_PROC_ADDR;
- si.pci_0.pci_io.pci_base_hi = 0;
- si.pci_0.pci_io.pci_base_lo = CPCI690_PCI0_IO_START_PCI_ADDR;
- si.pci_0.pci_io.size = CPCI690_PCI0_IO_SIZE;
- si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_mem[0].cpu_base = CPCI690_PCI0_MEM_START_PROC_ADDR;
- si.pci_0.pci_mem[0].pci_base_hi = CPCI690_PCI0_MEM_START_PCI_HI_ADDR;
- si.pci_0.pci_mem[0].pci_base_lo = CPCI690_PCI0_MEM_START_PCI_LO_ADDR;
- si.pci_0.pci_mem[0].size = CPCI690_PCI0_MEM_SIZE;
- si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_cmd_bits = 0;
- si.pci_0.latency_timer = 0x80;
-
- si.pci_1.enable_bus = 1;
- si.pci_1.pci_io.cpu_base = CPCI690_PCI1_IO_START_PROC_ADDR;
- si.pci_1.pci_io.pci_base_hi = 0;
- si.pci_1.pci_io.pci_base_lo = CPCI690_PCI1_IO_START_PCI_ADDR;
- si.pci_1.pci_io.size = CPCI690_PCI1_IO_SIZE;
- si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_mem[0].cpu_base = CPCI690_PCI1_MEM_START_PROC_ADDR;
- si.pci_1.pci_mem[0].pci_base_hi = CPCI690_PCI1_MEM_START_PCI_HI_ADDR;
- si.pci_1.pci_mem[0].pci_base_lo = CPCI690_PCI1_MEM_START_PCI_LO_ADDR;
- si.pci_1.pci_mem[0].size = CPCI690_PCI1_MEM_SIZE;
- si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_cmd_bits = 0;
- si.pci_1.latency_timer = 0x80;
-
- for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++) {
- si.cpu_prot_options[i] = 0;
- si.cpu_snoop_options[i] = GT64260_CPU_SNOOP_WB;
- si.pci_0.acc_cntl_options[i] =
- GT64260_PCI_ACC_CNTL_DREADEN |
- GT64260_PCI_ACC_CNTL_RDPREFETCH |
- GT64260_PCI_ACC_CNTL_RDLINEPREFETCH |
- GT64260_PCI_ACC_CNTL_RDMULPREFETCH |
- GT64260_PCI_ACC_CNTL_SWAP_NONE |
- GT64260_PCI_ACC_CNTL_MBURST_32_BTYES;
- si.pci_0.snoop_options[i] = GT64260_PCI_SNOOP_WB;
- si.pci_1.acc_cntl_options[i] =
- GT64260_PCI_ACC_CNTL_DREADEN |
- GT64260_PCI_ACC_CNTL_RDPREFETCH |
- GT64260_PCI_ACC_CNTL_RDLINEPREFETCH |
- GT64260_PCI_ACC_CNTL_RDMULPREFETCH |
- GT64260_PCI_ACC_CNTL_SWAP_NONE |
- GT64260_PCI_ACC_CNTL_MBURST_32_BTYES;
- si.pci_1.snoop_options[i] = GT64260_PCI_SNOOP_WB;
- }
-
- /* Lookup PCI host bridges */
- if (mv64x60_init(&bh, &si))
- printk(KERN_ERR "Bridge initialization failed.\n");
-
- pci_dram_offset = 0; /* System mem at same addr on PCI & cpu bus */
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = cpci690_map_irq;
- ppc_md.pci_exclude_device = mv64x60_pci_exclude_device;
-
- mv64x60_set_bus(&bh, 0, 0);
- bh.hose_a->first_busno = 0;
- bh.hose_a->last_busno = 0xff;
- bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0);
-
- bh.hose_b->first_busno = bh.hose_a->last_busno + 1;
- mv64x60_set_bus(&bh, 1, bh.hose_b->first_busno);
- bh.hose_b->last_busno = 0xff;
- bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b,
- bh.hose_b->first_busno);
-}
-
-static void __init
-cpci690_setup_peripherals(void)
-{
- /* Set up windows to CPLD, RTC/TODC, IPMI. */
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, CPCI690_BR_BASE,
- CPCI690_BR_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN);
- cpci690_br_base = ioremap(CPCI690_BR_BASE, CPCI690_BR_SIZE);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, CPCI690_TODC_BASE,
- CPCI690_TODC_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
- TODC_INIT(TODC_TYPE_MK48T35, 0, 0,
- ioremap(CPCI690_TODC_BASE, CPCI690_TODC_SIZE), 8);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN, CPCI690_IPMI_BASE,
- CPCI690_IPMI_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN);
-
- mv64x60_set_bits(&bh, MV64x60_PCI0_ARBITER_CNTL, (1<<31));
- mv64x60_set_bits(&bh, MV64x60_PCI1_ARBITER_CNTL, (1<<31));
-
- mv64x60_set_bits(&bh, MV64x60_CPU_MASTER_CNTL, (1<<9)); /* Only 1 cpu */
-
- /*
- * Turn off timer/counters. Not turning off watchdog timer because
- * can't read its reg on the 64260A so don't know if we'll be enabling
- * or disabling.
- */
- mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
- ((1<<0) | (1<<8) | (1<<16) | (1<<24)));
- mv64x60_clr_bits(&bh, GT64260_TIMR_CNTR_4_7_CNTL,
- ((1<<0) | (1<<8) | (1<<16) | (1<<24)));
-
- /*
- * Set MPSC Multiplex RMII
- * NOTE: ethernet driver modifies bit 0 and 1
- */
- mv64x60_write(&bh, GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102);
-
-#define GPP_EXTERNAL_INTERRUPTS \
- ((1<<24) | (1<<25) | (1<<26) | (1<<27) | \
- (1<<28) | (1<<29) | (1<<30) | (1<<31))
- /* PCI interrupts are inputs */
- mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, GPP_EXTERNAL_INTERRUPTS);
- /* PCI interrupts are active low */
- mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, GPP_EXTERNAL_INTERRUPTS);
-
- /* Clear any pending interrupts for these inputs and enable them. */
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~GPP_EXTERNAL_INTERRUPTS);
- mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, GPP_EXTERNAL_INTERRUPTS);
-
- /* Route MPP interrupt inputs to GPP */
- mv64x60_write(&bh, MV64x60_MPP_CNTL_2, 0x00000000);
- mv64x60_write(&bh, MV64x60_MPP_CNTL_3, 0x00000000);
-}
-
-static void __init
-cpci690_setup_arch(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("cpci690_setup_arch: enter", 0);
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- if (ppc_md.progress)
- ppc_md.progress("cpci690_setup_arch: Enabling L2 cache", 0);
-
- /* Enable L2 and L3 caches (if 745x) */
- _set_L2CR(_get_L2CR() | L2CR_L2E);
- _set_L3CR(_get_L3CR() | L3CR_L3E);
-
- if (ppc_md.progress)
- ppc_md.progress("cpci690_setup_arch: Initializing bridge", 0);
-
- cpci690_setup_bridge(); /* set up PCI bridge(s) */
- cpci690_setup_peripherals(); /* set up chip selects/GPP/MPP etc */
-
- if (ppc_md.progress)
- ppc_md.progress("cpci690_setup_arch: bridge init complete", 0);
-
- printk(KERN_INFO "%s %s port (C) 2003 MontaVista Software, Inc. "
- "(source@mvista.com)\n", BOARD_VENDOR, BOARD_MACHINE);
-
- if (ppc_md.progress)
- ppc_md.progress("cpci690_setup_arch: exit", 0);
-}
-
-/* Platform device data fixup routines. */
-#if defined(CONFIG_SERIAL_MPSC)
-static void __init
-cpci690_fixup_mpsc_pdata(struct platform_device *pdev)
-{
- struct mpsc_pdata *pdata;
-
- pdata = (struct mpsc_pdata *)pdev->dev.platform_data;
-
- pdata->max_idle = 40;
- pdata->default_baud = CPCI690_MPSC_BAUD;
- pdata->brg_clk_src = CPCI690_MPSC_CLK_SRC;
- pdata->brg_clk_freq = cpci690_get_bus_freq();
-}
-
-static int
-cpci690_platform_notify(struct device *dev)
-{
- static struct {
- char *bus_id;
- void ((*rtn)(struct platform_device *pdev));
- } dev_map[] = {
- { MPSC_CTLR_NAME ".0", cpci690_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME ".1", cpci690_fixup_mpsc_pdata },
- };
- struct platform_device *pdev;
- int i;
-
- if (dev && dev->bus_id)
- for (i=0; i<ARRAY_SIZE(dev_map); i++)
- if (!strncmp(dev->bus_id, dev_map[i].bus_id,
- BUS_ID_SIZE)) {
-
- pdev = container_of(dev,
- struct platform_device, dev);
- dev_map[i].rtn(pdev);
- }
-
- return 0;
-}
-#endif
-
-static void
-cpci690_reset_board(void)
-{
- u32 i = 10000;
-
- local_irq_disable();
- out_8((cpci690_br_base + CPCI690_BR_SW_RESET), 0x11);
-
- while (i != 0) i++;
- panic("restart failed\n");
-}
-
-static void
-cpci690_restart(char *cmd)
-{
- cpci690_reset_board();
-}
-
-static void
-cpci690_halt(void)
-{
- while (1);
- /* NOTREACHED */
-}
-
-static void
-cpci690_power_off(void)
-{
- cpci690_halt();
- /* NOTREACHED */
-}
-
-static int
-cpci690_show_cpuinfo(struct seq_file *m)
-{
- char *s;
-
- seq_printf(m, "cpu MHz\t\t: %d\n",
- (cpci690_get_cpu_freq() + 500000) / 1000000);
- seq_printf(m, "bus MHz\t\t: %d\n",
- (cpci690_get_bus_freq() + 500000) / 1000000);
- seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n");
- seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n");
- seq_printf(m, "FPGA Revision\t: %d\n",
- in_8(cpci690_br_base + CPCI690_BR_MEM_CTLR) >> 5);
-
- switch(bh.type) {
- case MV64x60_TYPE_GT64260A:
- s = "gt64260a";
- break;
- case MV64x60_TYPE_GT64260B:
- s = "gt64260b";
- break;
- case MV64x60_TYPE_MV64360:
- s = "mv64360";
- break;
- case MV64x60_TYPE_MV64460:
- s = "mv64460";
- break;
- default:
- s = "Unknown";
- }
- seq_printf(m, "bridge type\t: %s\n", s);
- seq_printf(m, "bridge rev\t: 0x%x\n", bh.rev);
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- seq_printf(m, "coherency\t: %s\n", "off");
-#else
- seq_printf(m, "coherency\t: %s\n", "on");
-#endif
-
- return 0;
-}
-
-static void __init
-cpci690_calibrate_decr(void)
-{
- ulong freq;
-
- freq = cpci690_get_bus_freq() / 4;
-
- printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
- freq/1000000, freq%1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-}
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC)
-static void __init
-cpci690_map_io(void)
-{
- io_block_mapping(CONFIG_MV64X60_NEW_BASE, CONFIG_MV64X60_NEW_BASE,
- 128 * 1024, _PAGE_IO);
-}
-#endif
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* take care of initrd if we have one */
- if (r4) {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- isa_mem_base = 0;
-
- ppc_md.setup_arch = cpci690_setup_arch;
- ppc_md.show_cpuinfo = cpci690_show_cpuinfo;
- ppc_md.init_IRQ = gt64260_init_irq;
- ppc_md.get_irq = gt64260_get_irq;
- ppc_md.restart = cpci690_restart;
- ppc_md.power_off = cpci690_power_off;
- ppc_md.halt = cpci690_halt;
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
- ppc_md.calibrate_decr = cpci690_calibrate_decr;
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC)
- ppc_md.setup_io_mappings = cpci690_map_io;
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = mv64x60_mpsc_progress;
- mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE);
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-#endif /* defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB_MPSC) */
-
-#if defined(CONFIG_SERIAL_MPSC)
- platform_notify = cpci690_platform_notify;
-#endif
-}
diff --git a/arch/ppc/platforms/cpci690.h b/arch/ppc/platforms/cpci690.h
deleted file mode 100644
index 0fa5a4c..0000000
--- a/arch/ppc/platforms/cpci690.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Definitions for Force CPCI690
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2003 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * The GT64260 has 2 PCI buses each with 1 window from the CPU bus to
- * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
- */
-
-#ifndef __PPC_PLATFORMS_CPCI690_H
-#define __PPC_PLATFORMS_CPCI690_H
-
-/*
- * Define bd_t to pass in the MAC addresses used by the GT64260's enet ctlrs.
- */
-#define CPCI690_BI_MAGIC 0xFE8765DC
-
-typedef struct board_info {
- u32 bi_magic;
- u8 bi_enetaddr[3][6];
-} bd_t;
-
-/* PCI bus Resource setup */
-#define CPCI690_PCI0_MEM_START_PROC_ADDR 0x80000000
-#define CPCI690_PCI0_MEM_START_PCI_HI_ADDR 0x00000000
-#define CPCI690_PCI0_MEM_START_PCI_LO_ADDR 0x80000000
-#define CPCI690_PCI0_MEM_SIZE 0x10000000
-#define CPCI690_PCI0_IO_START_PROC_ADDR 0xa0000000
-#define CPCI690_PCI0_IO_START_PCI_ADDR 0x00000000
-#define CPCI690_PCI0_IO_SIZE 0x01000000
-
-#define CPCI690_PCI1_MEM_START_PROC_ADDR 0x90000000
-#define CPCI690_PCI1_MEM_START_PCI_HI_ADDR 0x00000000
-#define CPCI690_PCI1_MEM_START_PCI_LO_ADDR 0x90000000
-#define CPCI690_PCI1_MEM_SIZE 0x10000000
-#define CPCI690_PCI1_IO_START_PROC_ADDR 0xa1000000
-#define CPCI690_PCI1_IO_START_PCI_ADDR 0x01000000
-#define CPCI690_PCI1_IO_SIZE 0x01000000
-
-/* Board Registers */
-#define CPCI690_BR_BASE 0xf0000000
-#define CPCI690_BR_SIZE_ACTUAL 0x8
-#define CPCI690_BR_SIZE max(GT64260_WINDOW_SIZE_MIN, \
- CPCI690_BR_SIZE_ACTUAL)
-#define CPCI690_BR_LED_CNTL 0x00
-#define CPCI690_BR_SW_RESET 0x01
-#define CPCI690_BR_MISC_STATUS 0x02
-#define CPCI690_BR_SWITCH_STATUS 0x03
-#define CPCI690_BR_MEM_CTLR 0x04
-#define CPCI690_BR_LAST_RESET_1 0x05
-#define CPCI690_BR_LAST_RESET_2 0x06
-
-#define CPCI690_TODC_BASE 0xf0100000
-#define CPCI690_TODC_SIZE_ACTUAL 0x8000 /* Size or NVRAM + RTC */
-#define CPCI690_TODC_SIZE max(GT64260_WINDOW_SIZE_MIN, \
- CPCI690_TODC_SIZE_ACTUAL)
-#define CPCI690_MAC_OFFSET 0x7c10 /* MAC in RTC NVRAM */
-
-#define CPCI690_IPMI_BASE 0xf0200000
-#define CPCI690_IPMI_SIZE_ACTUAL 0x10 /* 16 bytes of IPMI */
-#define CPCI690_IPMI_SIZE max(GT64260_WINDOW_SIZE_MIN, \
- CPCI690_IPMI_SIZE_ACTUAL)
-
-#define CPCI690_MPSC_BAUD 9600
-#define CPCI690_MPSC_CLK_SRC 8 /* TCLK */
-
-#endif /* __PPC_PLATFORMS_CPCI690_H */
diff --git a/arch/ppc/platforms/est8260.h b/arch/ppc/platforms/est8260.h
deleted file mode 100644
index adba68e..0000000
--- a/arch/ppc/platforms/est8260.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* Board information for the EST8260, which should be generic for
- * all 8260 boards. The IMMR is now given to us so the hard define
- * will soon be removed. All of the clock values are computed from
- * the configuration SCMR and the Power-On-Reset word.
- */
-#ifndef __EST8260_PLATFORM
-#define __EST8260_PLATFORM
-
-#define CPM_MAP_ADDR ((uint)0xf0000000)
-
-#define BOOTROM_RESTART_ADDR ((uint)0xff000104)
-
-/* For our show_cpuinfo hooks. */
-#define CPUINFO_VENDOR "EST Corporation"
-#define CPUINFO_MACHINE "SBC8260 PowerPC"
-
-/* A Board Information structure that is given to a program when
- * prom starts it up.
- */
-typedef struct bd_info {
- unsigned int bi_memstart; /* Memory start address */
- unsigned int bi_memsize; /* Memory (end) size in bytes */
- unsigned int bi_intfreq; /* Internal Freq, in Hz */
- unsigned int bi_busfreq; /* Bus Freq, in MHz */
- unsigned int bi_cpmfreq; /* CPM Freq, in MHz */
- unsigned int bi_brgfreq; /* BRG Freq, in MHz */
- unsigned int bi_vco; /* VCO Out from PLL */
- unsigned int bi_baudrate; /* Default console baud rate */
- unsigned int bi_immr; /* IMMR when called from boot rom */
- unsigned char bi_enetaddr[6];
-} bd_t;
-
-extern bd_t m8xx_board_info;
-
-#endif /* __EST8260_PLATFORM */
diff --git a/arch/ppc/platforms/ev64260.c b/arch/ppc/platforms/ev64260.c
deleted file mode 100644
index f522b31..0000000
--- a/arch/ppc/platforms/ev64260.c
+++ /dev/null
@@ -1,649 +0,0 @@
-/*
- * Board setup routines for the Marvell/Galileo EV-64260-BP Evaluation Board.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001-2003 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * The EV-64260-BP port is the result of hard work from many people from
- * many companies. In particular, employees of Marvell/Galileo, Mission
- * Critical Linux, Xyterra, and MontaVista Software were heavily involved.
- *
- * Note: I have not been able to get *all* PCI slots to work reliably
- * at 66 MHz. I recommend setting jumpers J15 & J16 to short pins 1&2
- * so that 33 MHz is used. --MAG
- * Note: The 750CXe and 7450 are not stable with a 125MHz or 133MHz TCLK/SYSCLK.
- * At 100MHz, they are solid.
- */
-
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <linux/irq.h>
-#include <linux/fs.h>
-#include <linux/seq_file.h>
-#include <linux/console.h>
-#include <linux/initrd.h>
-#include <linux/root_dev.h>
-#include <linux/platform_device.h>
-#if !defined(CONFIG_SERIAL_MPSC_CONSOLE)
-#include <linux/serial.h>
-#include <linux/tty.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#else
-#include <linux/mv643xx.h>
-#endif
-#include <asm/bootinfo.h>
-#include <asm/machdep.h>
-#include <asm/mv64x60.h>
-#include <asm/todc.h>
-#include <asm/time.h>
-
-#include <platforms/ev64260.h>
-
-#define BOARD_VENDOR "Marvell/Galileo"
-#define BOARD_MACHINE "EV-64260-BP"
-
-static struct mv64x60_handle bh;
-
-#if !defined(CONFIG_SERIAL_MPSC_CONSOLE)
-extern void gen550_progress(char *, unsigned short);
-extern void gen550_init(int, struct uart_port *);
-#endif
-
-static const unsigned int cpu_7xx[16] = { /* 7xx & 74xx (but not 745x) */
- 18, 15, 14, 2, 4, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0
-};
-static const unsigned int cpu_745x[2][16] = { /* PLL_EXT 0 & 1 */
- { 1, 15, 14, 2, 4, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0 },
- { 0, 30, 0, 2, 0, 26, 0, 18, 0, 22, 20, 24, 28, 32, 0, 0 }
-};
-
-
-TODC_ALLOC();
-
-static int
-ev64260_get_bus_speed(void)
-{
- return 100000000;
-}
-
-static int
-ev64260_get_cpu_speed(void)
-{
- unsigned long pvr, hid1, pll_ext;
-
- pvr = PVR_VER(mfspr(SPRN_PVR));
-
- if (pvr != PVR_VER(PVR_7450)) {
- hid1 = mfspr(SPRN_HID1) >> 28;
- return ev64260_get_bus_speed() * cpu_7xx[hid1]/2;
- }
- else {
- hid1 = (mfspr(SPRN_HID1) & 0x0001e000) >> 13;
- pll_ext = 0; /* No way to read; must get from schematic */
- return ev64260_get_bus_speed() * cpu_745x[pll_ext][hid1]/2;
- }
-}
-
-unsigned long __init
-ev64260_find_end_of_memory(void)
-{
- return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE,
- MV64x60_TYPE_GT64260A);
-}
-
-/*
- * Marvell/Galileo EV-64260-BP Evaluation Board PCI interrupt routing.
- * Note: By playing with J8 and JP1-4, you can get 2 IRQ's from the first
- * PCI bus (in which cast, INTPIN B would be EV64260_PCI_1_IRQ).
- * This is the most IRQs you can get from one bus with this board, though.
- */
-static int __init
-ev64260_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
-
- if (hose->index == 0) {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {EV64260_PCI_0_IRQ,0,0,0}, /* IDSEL 7 - PCI bus 0 */
- {EV64260_PCI_0_IRQ,0,0,0}, /* IDSEL 8 - PCI bus 0 */
- };
-
- const long min_idsel = 7, max_idsel = 8, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
- else {
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { EV64260_PCI_1_IRQ,0,0,0}, /* IDSEL 7 - PCI bus 1 */
- { EV64260_PCI_1_IRQ,0,0,0}, /* IDSEL 8 - PCI bus 1 */
- };
-
- const long min_idsel = 7, max_idsel = 8, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
-}
-
-static void __init
-ev64260_setup_peripherals(void)
-{
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
- EV64260_EMB_FLASH_BASE, EV64260_EMB_FLASH_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN,
- EV64260_EXT_SRAM_BASE, EV64260_EXT_SRAM_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN,
- EV64260_TODC_BASE, EV64260_TODC_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN,
- EV64260_UART_BASE, EV64260_UART_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN,
- EV64260_EXT_FLASH_BASE, EV64260_EXT_FLASH_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN);
-
- TODC_INIT(TODC_TYPE_DS1501, 0, 0,
- ioremap(EV64260_TODC_BASE, EV64260_TODC_SIZE), 8);
-
- mv64x60_clr_bits(&bh, MV64x60_CPU_CONFIG,((1<<12) | (1<<28) | (1<<29)));
- mv64x60_set_bits(&bh, MV64x60_CPU_CONFIG, (1<<27));
-
- if (ev64260_get_bus_speed() > 100000000)
- mv64x60_set_bits(&bh, MV64x60_CPU_CONFIG, (1<<23));
-
- mv64x60_set_bits(&bh, MV64x60_PCI0_PCI_DECODE_CNTL, ((1<<0) | (1<<3)));
- mv64x60_set_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, ((1<<0) | (1<<3)));
-
- /*
- * Enabling of PCI internal-vs-external arbitration
- * is a platform- and errata-dependent decision.
- */
- if (bh.type == MV64x60_TYPE_GT64260A ) {
- mv64x60_set_bits(&bh, MV64x60_PCI0_ARBITER_CNTL, (1<<31));
- mv64x60_set_bits(&bh, MV64x60_PCI1_ARBITER_CNTL, (1<<31));
- }
-
- mv64x60_set_bits(&bh, MV64x60_CPU_MASTER_CNTL, (1<<9)); /* Only 1 cpu */
-
- /*
- * Turn off timer/counters. Not turning off watchdog timer because
- * can't read its reg on the 64260A so don't know if we'll be enabling
- * or disabling.
- */
- mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
- ((1<<0) | (1<<8) | (1<<16) | (1<<24)));
- mv64x60_clr_bits(&bh, GT64260_TIMR_CNTR_4_7_CNTL,
- ((1<<0) | (1<<8) | (1<<16) | (1<<24)));
-
- /*
- * Set MPSC Multiplex RMII
- * NOTE: ethernet driver modifies bit 0 and 1
- */
- mv64x60_write(&bh, GT64260_MPP_SERIAL_PORTS_MULTIPLEX, 0x00001102);
-
- /*
- * The EV-64260-BP uses several Multi-Purpose Pins (MPP) on the 64260
- * bridge as interrupt inputs (via the General Purpose Ports (GPP)
- * register). Need to route the MPP inputs to the GPP and set the
- * polarity correctly.
- *
- * In MPP Control 2 Register
- * MPP 21 -> GPP 21 (DUART channel A intr) bits 20-23 -> 0
- * MPP 22 -> GPP 22 (DUART channel B intr) bits 24-27 -> 0
- */
- mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_2, (0xf<<20) | (0xf<<24) );
-
- /*
- * In MPP Control 3 Register
- * MPP 26 -> GPP 26 (RTC INT) bits 8-11 -> 0
- * MPP 27 -> GPP 27 (PCI 0 INTA) bits 12-15 -> 0
- * MPP 29 -> GPP 29 (PCI 1 INTA) bits 20-23 -> 0
- */
- mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_3, (0xf<<8)|(0xf<<12)|(0xf<<20));
-
-#define GPP_EXTERNAL_INTERRUPTS \
- ((1<<21) | (1<<22) | (1<<26) | (1<<27) | (1<<29))
- /* DUART & PCI interrupts are inputs */
- mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, GPP_EXTERNAL_INTERRUPTS);
- /* DUART & PCI interrupts are active low */
- mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, GPP_EXTERNAL_INTERRUPTS);
-
- /* Clear any pending interrupts for these inputs and enable them. */
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~GPP_EXTERNAL_INTERRUPTS);
- mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, GPP_EXTERNAL_INTERRUPTS);
-
- return;
-}
-
-static void __init
-ev64260_setup_bridge(void)
-{
- struct mv64x60_setup_info si;
- int i;
-
- memset(&si, 0, sizeof(si));
-
- si.phys_reg_base = CONFIG_MV64X60_NEW_BASE;
-
- si.pci_0.enable_bus = 1;
- si.pci_0.pci_io.cpu_base = EV64260_PCI0_IO_CPU_BASE;
- si.pci_0.pci_io.pci_base_hi = 0;
- si.pci_0.pci_io.pci_base_lo = EV64260_PCI0_IO_PCI_BASE;
- si.pci_0.pci_io.size = EV64260_PCI0_IO_SIZE;
- si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_mem[0].cpu_base = EV64260_PCI0_MEM_CPU_BASE;
- si.pci_0.pci_mem[0].pci_base_hi = 0;
- si.pci_0.pci_mem[0].pci_base_lo = EV64260_PCI0_MEM_PCI_BASE;
- si.pci_0.pci_mem[0].size = EV64260_PCI0_MEM_SIZE;
- si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_cmd_bits = 0;
- si.pci_0.latency_timer = 0x8;
-
- si.pci_1.enable_bus = 1;
- si.pci_1.pci_io.cpu_base = EV64260_PCI1_IO_CPU_BASE;
- si.pci_1.pci_io.pci_base_hi = 0;
- si.pci_1.pci_io.pci_base_lo = EV64260_PCI1_IO_PCI_BASE;
- si.pci_1.pci_io.size = EV64260_PCI1_IO_SIZE;
- si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_mem[0].cpu_base = EV64260_PCI1_MEM_CPU_BASE;
- si.pci_1.pci_mem[0].pci_base_hi = 0;
- si.pci_1.pci_mem[0].pci_base_lo = EV64260_PCI1_MEM_PCI_BASE;
- si.pci_1.pci_mem[0].size = EV64260_PCI1_MEM_SIZE;
- si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_cmd_bits = 0;
- si.pci_1.latency_timer = 0x8;
-
- for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++) {
- si.cpu_prot_options[i] = 0;
- si.cpu_snoop_options[i] = GT64260_CPU_SNOOP_WB;
- si.pci_0.acc_cntl_options[i] =
- GT64260_PCI_ACC_CNTL_DREADEN |
- GT64260_PCI_ACC_CNTL_RDPREFETCH |
- GT64260_PCI_ACC_CNTL_RDLINEPREFETCH |
- GT64260_PCI_ACC_CNTL_RDMULPREFETCH |
- GT64260_PCI_ACC_CNTL_SWAP_NONE |
- GT64260_PCI_ACC_CNTL_MBURST_32_BTYES;
- si.pci_0.snoop_options[i] = GT64260_PCI_SNOOP_WB;
- si.pci_1.acc_cntl_options[i] =
- GT64260_PCI_ACC_CNTL_DREADEN |
- GT64260_PCI_ACC_CNTL_RDPREFETCH |
- GT64260_PCI_ACC_CNTL_RDLINEPREFETCH |
- GT64260_PCI_ACC_CNTL_RDMULPREFETCH |
- GT64260_PCI_ACC_CNTL_SWAP_NONE |
- GT64260_PCI_ACC_CNTL_MBURST_32_BTYES;
- si.pci_1.snoop_options[i] = GT64260_PCI_SNOOP_WB;
- }
-
- /* Lookup PCI host bridges */
- if (mv64x60_init(&bh, &si))
- printk(KERN_ERR "Bridge initialization failed.\n");
-
- pci_dram_offset = 0; /* System mem at same addr on PCI & cpu bus */
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = ev64260_map_irq;
- ppc_md.pci_exclude_device = mv64x60_pci_exclude_device;
-
- mv64x60_set_bus(&bh, 0, 0);
- bh.hose_a->first_busno = 0;
- bh.hose_a->last_busno = 0xff;
- bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0);
-
- bh.hose_b->first_busno = bh.hose_a->last_busno + 1;
- mv64x60_set_bus(&bh, 1, bh.hose_b->first_busno);
- bh.hose_b->last_busno = 0xff;
- bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b,
- bh.hose_b->first_busno);
-
- return;
-}
-
-#if defined(CONFIG_SERIAL_8250) && !defined(CONFIG_SERIAL_MPSC_CONSOLE)
-static void __init
-ev64260_early_serial_map(void)
-{
- struct uart_port port;
- static char first_time = 1;
-
- if (first_time) {
- memset(&port, 0, sizeof(port));
-
- port.membase = ioremap(EV64260_SERIAL_0, EV64260_UART_SIZE);
- port.irq = EV64260_UART_0_IRQ;
- port.uartclk = BASE_BAUD * 16;
- port.regshift = 2;
- port.iotype = UPIO_MEM;
- port.flags = STD_COM_FLAGS;
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- gen550_init(0, &port);
-#endif
-
- if (early_serial_setup(&port) != 0)
- printk(KERN_WARNING "Early serial init of port 0 "
- "failed\n");
-
- first_time = 0;
- }
-
- return;
-}
-#elif defined(CONFIG_SERIAL_MPSC_CONSOLE)
-static void __init
-ev64260_early_serial_map(void)
-{
-}
-#endif
-
-static void __init
-ev64260_setup_arch(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("ev64260_setup_arch: enter", 0);
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- if (ppc_md.progress)
- ppc_md.progress("ev64260_setup_arch: Enabling L2 cache", 0);
-
- /* Enable L2 and L3 caches (if 745x) */
- _set_L2CR(_get_L2CR() | L2CR_L2E);
- _set_L3CR(_get_L3CR() | L3CR_L3E);
-
- if (ppc_md.progress)
- ppc_md.progress("ev64260_setup_arch: Initializing bridge", 0);
-
- ev64260_setup_bridge(); /* set up PCI bridge(s) */
- ev64260_setup_peripherals(); /* set up chip selects/GPP/MPP etc */
-
- if (ppc_md.progress)
- ppc_md.progress("ev64260_setup_arch: bridge init complete", 0);
-
-#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_MPSC_CONSOLE)
- ev64260_early_serial_map();
-#endif
-
- printk(KERN_INFO "%s %s port (C) 2001 MontaVista Software, Inc. "
- "(source@mvista.com)\n", BOARD_VENDOR, BOARD_MACHINE);
-
- if (ppc_md.progress)
- ppc_md.progress("ev64260_setup_arch: exit", 0);
-
- return;
-}
-
-/* Platform device data fixup routines. */
-#if defined(CONFIG_SERIAL_MPSC)
-static void __init
-ev64260_fixup_mpsc_pdata(struct platform_device *pdev)
-{
- struct mpsc_pdata *pdata;
-
- pdata = (struct mpsc_pdata *)pdev->dev.platform_data;
-
- pdata->max_idle = 40;
- pdata->default_baud = EV64260_DEFAULT_BAUD;
- pdata->brg_clk_src = EV64260_MPSC_CLK_SRC;
- pdata->brg_clk_freq = EV64260_MPSC_CLK_FREQ;
-
- return;
-}
-
-static int
-ev64260_platform_notify(struct device *dev)
-{
- static struct {
- char *bus_id;
- void ((*rtn)(struct platform_device *pdev));
- } dev_map[] = {
- { MPSC_CTLR_NAME ".0", ev64260_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME ".1", ev64260_fixup_mpsc_pdata },
- };
- struct platform_device *pdev;
- int i;
-
- if (dev && dev->bus_id)
- for (i=0; i<ARRAY_SIZE(dev_map); i++)
- if (!strncmp(dev->bus_id, dev_map[i].bus_id,
- BUS_ID_SIZE)) {
-
- pdev = container_of(dev,
- struct platform_device, dev);
- dev_map[i].rtn(pdev);
- }
-
- return 0;
-}
-#endif
-
-static void
-ev64260_reset_board(void *addr)
-{
- local_irq_disable();
-
- /* disable and invalidate the L2 cache */
- _set_L2CR(0);
- _set_L2CR(0x200000);
-
- /* flush and disable L1 I/D cache */
- __asm__ __volatile__
- ("mfspr 3,1008\n\t"
- "ori 5,5,0xcc00\n\t"
- "ori 4,3,0xc00\n\t"
- "andc 5,3,5\n\t"
- "sync\n\t"
- "mtspr 1008,4\n\t"
- "isync\n\t"
- "sync\n\t"
- "mtspr 1008,5\n\t"
- "isync\n\t"
- "sync\n\t");
-
- /* unmap any other random cs's that might overlap with bootcs */
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, 0, 0, 0);
- bh.ci->disable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, 0, 0, 0);
- bh.ci->disable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN, 0, 0, 0);
- bh.ci->disable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN, 0, 0, 0);
- bh.ci->disable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN);
-
- /* map bootrom back in to gt @ reset defaults */
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
- 0xff800000, 8*1024*1024, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
-
- /* move reg base back to default, setup default pci0 */
- mv64x60_write(&bh, MV64x60_INTERNAL_SPACE_DECODE,
- (1<<24) | CONFIG_MV64X60_BASE >> 20);
-
- /* NOTE: FROM NOW ON no more GT_REGS accesses.. 0x1 is not mapped
- * via BAT or MMU, and MSR IR/DR is ON */
- /* SRR0 has system reset vector, SRR1 has default MSR value */
- /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
- /* NOTE: assumes reset vector is at 0xfff00100 */
- __asm__ __volatile__
- ("mtspr 26, %0\n\t"
- "li 4,(1<<6)\n\t"
- "mtspr 27,4\n\t"
- "rfi\n\t"
- :: "r" (addr):"r4");
-
- return;
-}
-
-static void
-ev64260_restart(char *cmd)
-{
- volatile ulong i = 10000000;
-
- ev64260_reset_board((void *)0xfff00100);
-
- while (i-- > 0);
- panic("restart failed\n");
-}
-
-static void
-ev64260_halt(void)
-{
- local_irq_disable();
- while (1);
- /* NOTREACHED */
-}
-
-static void
-ev64260_power_off(void)
-{
- ev64260_halt();
- /* NOTREACHED */
-}
-
-static int
-ev64260_show_cpuinfo(struct seq_file *m)
-{
- uint pvid;
-
- pvid = mfspr(SPRN_PVR);
- seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n");
- seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n");
- seq_printf(m, "cpu MHz\t\t: %d\n", ev64260_get_cpu_speed()/1000/1000);
- seq_printf(m, "bus MHz\t\t: %d\n", ev64260_get_bus_speed()/1000/1000);
-
- return 0;
-}
-
-/* DS1501 RTC has too much variation to use RTC for calibration */
-static void __init
-ev64260_calibrate_decr(void)
-{
- ulong freq;
-
- freq = ev64260_get_bus_speed()/4;
-
- printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
- freq/1000000, freq%1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-
- return;
-}
-
-/*
- * Set BAT 3 to map 0xfb000000 to 0xfc000000 of physical memory space.
- */
-static __inline__ void
-ev64260_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT1U, 0xfb0001fe);
- mtspr(SPRN_DBAT1L, 0xfb00002a);
- mb();
-
- return;
-}
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
-static void __init
-ev64260_map_io(void)
-{
- io_block_mapping(0xfb000000, 0xfb000000, 0x01000000, _PAGE_IO);
-}
-#endif
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
-#ifdef CONFIG_BLK_DEV_INITRD
- extern int initrd_below_start_ok;
-
- initrd_start=initrd_end=0;
- initrd_below_start_ok=0;
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- parse_bootinfo(find_bootinfo());
-
- isa_mem_base = 0;
- isa_io_base = EV64260_PCI0_IO_CPU_BASE;
- pci_dram_offset = EV64260_PCI0_MEM_CPU_BASE;
-
- loops_per_jiffy = ev64260_get_cpu_speed() / HZ;
-
- ppc_md.setup_arch = ev64260_setup_arch;
- ppc_md.show_cpuinfo = ev64260_show_cpuinfo;
- ppc_md.init_IRQ = gt64260_init_irq;
- ppc_md.get_irq = gt64260_get_irq;
-
- ppc_md.restart = ev64260_restart;
- ppc_md.power_off = ev64260_power_off;
- ppc_md.halt = ev64260_halt;
-
- ppc_md.find_end_of_memory = ev64260_find_end_of_memory;
-
- ppc_md.init = NULL;
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
- ppc_md.calibrate_decr = ev64260_calibrate_decr;
-
- bh.p_base = CONFIG_MV64X60_NEW_BASE;
-
- ev64260_set_bat();
-
-#ifdef CONFIG_SERIAL_8250
-#if defined(CONFIG_SERIAL_TEXT_DEBUG)
- ppc_md.setup_io_mappings = ev64260_map_io;
- ppc_md.progress = gen550_progress;
-#endif
-#if defined(CONFIG_KGDB)
- ppc_md.setup_io_mappings = ev64260_map_io;
- ppc_md.early_serial_map = ev64260_early_serial_map;
-#endif
-#elif defined(CONFIG_SERIAL_MPSC_CONSOLE)
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.setup_io_mappings = ev64260_map_io;
- ppc_md.progress = mv64x60_mpsc_progress;
- mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE);
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-#ifdef CONFIG_KGDB
- ppc_md.setup_io_mappings = ev64260_map_io;
- ppc_md.early_serial_map = ev64260_early_serial_map;
-#endif /* CONFIG_KGDB */
-
-#endif
-
-#if defined(CONFIG_SERIAL_MPSC)
- platform_notify = ev64260_platform_notify;
-#endif
-
- return;
-}
diff --git a/arch/ppc/platforms/ev64260.h b/arch/ppc/platforms/ev64260.h
deleted file mode 100644
index 44d90d5..0000000
--- a/arch/ppc/platforms/ev64260.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * Definitions for Marvell/Galileo EV-64260-BP Evaluation Board.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * The MV64x60 has 2 PCI buses each with 1 window from the CPU bus to
- * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
- * We'll only use one PCI MEM window on each PCI bus.
- *
- * This is the CPU physical memory map (windows must be at least 1MB and start
- * on a boundary that is a multiple of the window size):
- *
- * 0xfc000000-0xffffffff - External FLASH on device module
- * 0xfbf00000-0xfbffffff - Embedded (on board) FLASH
- * 0xfbe00000-0xfbefffff - GT64260 Registers (preferably)
- * but really a config option
- * 0xfbd00000-0xfbdfffff - External SRAM on device module
- * 0xfbc00000-0xfbcfffff - TODC chip on device module
- * 0xfbb00000-0xfbbfffff - External UART on device module
- * 0xa2000000-0xfbafffff - <hole>
- * 0xa1000000-0xa1ffffff - PCI 1 I/O (defined in gt64260.h)
- * 0xa0000000-0xa0ffffff - PCI 0 I/O (defined in gt64260.h)
- * 0x90000000-0x9fffffff - PCI 1 MEM (defined in gt64260.h)
- * 0x80000000-0x8fffffff - PCI 0 MEM (defined in gt64260.h)
- */
-
-#ifndef __PPC_PLATFORMS_EV64260_H
-#define __PPC_PLATFORMS_EV64260_H
-
-/* PCI mappings */
-#define EV64260_PCI0_IO_CPU_BASE 0xa0000000
-#define EV64260_PCI0_IO_PCI_BASE 0x00000000
-#define EV64260_PCI0_IO_SIZE 0x01000000
-
-#define EV64260_PCI0_MEM_CPU_BASE 0x80000000
-#define EV64260_PCI0_MEM_PCI_BASE 0x80000000
-#define EV64260_PCI0_MEM_SIZE 0x10000000
-
-#define EV64260_PCI1_IO_CPU_BASE (EV64260_PCI0_IO_CPU_BASE + \
- EV64260_PCI0_IO_SIZE)
-#define EV64260_PCI1_IO_PCI_BASE (EV64260_PCI0_IO_PCI_BASE + \
- EV64260_PCI0_IO_SIZE)
-#define EV64260_PCI1_IO_SIZE 0x01000000
-
-#define EV64260_PCI1_MEM_CPU_BASE (EV64260_PCI0_MEM_CPU_BASE + \
- EV64260_PCI0_MEM_SIZE)
-#define EV64260_PCI1_MEM_PCI_BASE (EV64260_PCI0_MEM_PCI_BASE + \
- EV64260_PCI0_MEM_SIZE)
-#define EV64260_PCI1_MEM_SIZE 0x10000000
-
-/* CPU Physical Memory Map setup (other than PCI) */
-#define EV64260_EXT_FLASH_BASE 0xfc000000
-#define EV64260_EMB_FLASH_BASE 0xfbf00000
-#define EV64260_EXT_SRAM_BASE 0xfbd00000
-#define EV64260_TODC_BASE 0xfbc00000
-#define EV64260_UART_BASE 0xfbb00000
-
-#define EV64260_EXT_FLASH_SIZE_ACTUAL 0x04000000 /* <= 64MB Extern FLASH */
-#define EV64260_EMB_FLASH_SIZE_ACTUAL 0x00080000 /* 512KB of Embed FLASH */
-#define EV64260_EXT_SRAM_SIZE_ACTUAL 0x00100000 /* 1MB SDRAM */
-#define EV64260_TODC_SIZE_ACTUAL 0x00000020 /* 32 bytes for TODC */
-#define EV64260_UART_SIZE_ACTUAL 0x00000040 /* 64 bytes for DUART */
-
-#define EV64260_EXT_FLASH_SIZE max(GT64260_WINDOW_SIZE_MIN, \
- EV64260_EXT_FLASH_SIZE_ACTUAL)
-#define EV64260_EMB_FLASH_SIZE max(GT64260_WINDOW_SIZE_MIN, \
- EV64260_EMB_FLASH_SIZE_ACTUAL)
-#define EV64260_EXT_SRAM_SIZE max(GT64260_WINDOW_SIZE_MIN, \
- EV64260_EXT_SRAM_SIZE_ACTUAL)
-#define EV64260_TODC_SIZE max(GT64260_WINDOW_SIZE_MIN, \
- EV64260_TODC_SIZE_ACTUAL)
-/* Assembler in bootwrapper blows up if 'max' is used */
-#define EV64260_UART_SIZE GT64260_WINDOW_SIZE_MIN
-#define EV64260_UART_END ((EV64260_UART_BASE + \
- EV64260_UART_SIZE - 1) & 0xfff00000)
-
-/* Board-specific IRQ info */
-#define EV64260_UART_0_IRQ 85
-#define EV64260_UART_1_IRQ 86
-#define EV64260_PCI_0_IRQ 91
-#define EV64260_PCI_1_IRQ 93
-
-/* Serial port setup */
-#define EV64260_DEFAULT_BAUD 115200
-
-#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
-#define SERIAL_PORT_DFNS
-
-#define EV64260_MPSC_CLK_SRC 8 /* TCLK */
-#define EV64260_MPSC_CLK_FREQ 100000000 /* 100MHz clk */
-#else
-#define EV64260_SERIAL_0 (EV64260_UART_BASE + 0x20)
-#define EV64260_SERIAL_1 EV64260_UART_BASE
-
-#define BASE_BAUD (EV64260_DEFAULT_BAUD * 2)
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define RS_TABLE_SIZE 64
-#else
-#define RS_TABLE_SIZE 2
-#endif
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#endif
-
-/* Required for bootloader's ns16550.c code */
-#define STD_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, EV64260_SERIAL_0, EV64260_UART_0_IRQ, STD_COM_FLAGS, \
- iomem_base: (u8 *)EV64260_SERIAL_0, /* ttyS0 */ \
- iomem_reg_shift: 2, \
- io_type: SERIAL_IO_MEM },
-
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DFNS
-#endif
-#endif /* __PPC_PLATFORMS_EV64260_H */
diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c
deleted file mode 100644
index 6765676..0000000
--- a/arch/ppc/platforms/ev64360.c
+++ /dev/null
@@ -1,517 +0,0 @@
-/*
- * Board setup routines for the Marvell EV-64360-BP Evaluation Board.
- *
- * Author: Lee Nicks <allinux@gmail.com>
- *
- * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
- * Based on code done by - Mark A. Greer <mgreer@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/console.h>
-#include <linux/initrd.h>
-#include <linux/root_dev.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/bootmem.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mv643xx.h>
-#include <linux/platform_device.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/smp.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/ppcboot.h>
-#include <asm/mv64x60.h>
-#include <asm/machdep.h>
-#include <platforms/ev64360.h>
-
-#define BOARD_VENDOR "Marvell"
-#define BOARD_MACHINE "EV-64360-BP"
-
-static struct mv64x60_handle bh;
-static void __iomem *sram_base;
-
-static u32 ev64360_flash_size_0;
-static u32 ev64360_flash_size_1;
-
-static u32 ev64360_bus_frequency;
-
-unsigned char __res[sizeof(bd_t)];
-
-TODC_ALLOC();
-
-static int __init
-ev64360_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- return 0;
-}
-
-static void __init
-ev64360_setup_bridge(void)
-{
- struct mv64x60_setup_info si;
- int i;
-
- memset(&si, 0, sizeof(si));
-
- si.phys_reg_base = CONFIG_MV64X60_NEW_BASE;
-
- #ifdef CONFIG_PCI
- si.pci_1.enable_bus = 1;
- si.pci_1.pci_io.cpu_base = EV64360_PCI1_IO_START_PROC_ADDR;
- si.pci_1.pci_io.pci_base_hi = 0;
- si.pci_1.pci_io.pci_base_lo = EV64360_PCI1_IO_START_PCI_ADDR;
- si.pci_1.pci_io.size = EV64360_PCI1_IO_SIZE;
- si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_mem[0].cpu_base = EV64360_PCI1_MEM_START_PROC_ADDR;
- si.pci_1.pci_mem[0].pci_base_hi = EV64360_PCI1_MEM_START_PCI_HI_ADDR;
- si.pci_1.pci_mem[0].pci_base_lo = EV64360_PCI1_MEM_START_PCI_LO_ADDR;
- si.pci_1.pci_mem[0].size = EV64360_PCI1_MEM_SIZE;
- si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_cmd_bits = 0;
- si.pci_1.latency_timer = 0x80;
- #else
- si.pci_0.enable_bus = 0;
- si.pci_1.enable_bus = 0;
- #endif
-
- for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) {
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE;
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE;
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE;
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_NONE |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-#else
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE; /* errata */
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE; /* errata */
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE; /* errata */
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_WB |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES;
-#endif
- }
-
- if (mv64x60_init(&bh, &si))
- printk(KERN_WARNING "Bridge initialization failed.\n");
-
- #ifdef CONFIG_PCI
- pci_dram_offset = 0; /* sys mem at same addr on PCI & cpu bus */
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = ev64360_map_irq;
- ppc_md.pci_exclude_device = mv64x60_pci_exclude_device;
-
- mv64x60_set_bus(&bh, 1, 0);
- bh.hose_b->first_busno = 0;
- bh.hose_b->last_busno = 0xff;
- #endif
-}
-
-/* Bridge & platform setup routines */
-void __init
-ev64360_intr_setup(void)
-{
- /* MPP 8, 9, and 10 */
- mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff);
-
- /*
- * Define GPP 8,9,and 10 interrupt polarity as active low
- * input signal and level triggered
- */
- mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, 0x700);
- mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, 0x700);
-
- /* Config GPP intr ctlr to respond to level trigger */
- mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10));
-
- /* Erranum FEr PCI-#8 */
- mv64x60_clr_bits(&bh, MV64x60_PCI0_CMD, (1<<5) | (1<<9));
- mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<5) | (1<<9));
-
- /*
- * Dismiss and then enable interrupt on GPP interrupt cause
- * for CPU #0
- */
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~0x700);
- mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, 0x700);
-
- /*
- * Dismiss and then enable interrupt on CPU #0 high cause reg
- * BIT25 summarizes GPP interrupts 8-15
- */
- mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, (1<<25));
-}
-
-void __init
-ev64360_setup_peripherals(void)
-{
- u32 base;
-
- /* Set up window for boot CS */
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
- EV64360_BOOT_WINDOW_BASE, EV64360_BOOT_WINDOW_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
-
- /* We only use the 32-bit flash */
- mv64x60_get_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, &base,
- &ev64360_flash_size_0);
- ev64360_flash_size_1 = 0;
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN,
- EV64360_RTC_WINDOW_BASE, EV64360_RTC_WINDOW_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
-
- TODC_INIT(TODC_TYPE_DS1501, 0, 0,
- ioremap(EV64360_RTC_WINDOW_BASE, EV64360_RTC_WINDOW_SIZE), 8);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
- EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
- sram_base = ioremap(EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE);
-
- /* Set up Enet->SRAM window */
- mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN,
- EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0x2);
- bh.ci->enable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN);
-
- /* Give enet r/w access to memory region */
- mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_0, (0x3 << (4 << 1)));
- mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_1, (0x3 << (4 << 1)));
- mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_2, (0x3 << (4 << 1)));
-
- mv64x60_clr_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, (1 << 3));
- mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
- ((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24)));
-
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x00160000);
-#else
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2);
-#endif
-
- /*
- * Setting the SRAM to 0. Note that this generates parity errors on
- * internal data path in SRAM since it's first time accessing it
- * while after reset it's not configured.
- */
- memset(sram_base, 0, MV64360_SRAM_SIZE);
-
- /* set up PCI interrupt controller */
- ev64360_intr_setup();
-}
-
-static void __init
-ev64360_setup_arch(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("ev64360_setup_arch: enter", 0);
-
- set_tb(0, 0);
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- /*
- * Set up the L2CR register.
- */
- _set_L2CR(L2CR_L2E | L2CR_L2PE);
-
- if (ppc_md.progress)
- ppc_md.progress("ev64360_setup_arch: calling setup_bridge", 0);
-
- ev64360_setup_bridge();
- ev64360_setup_peripherals();
- ev64360_bus_frequency = ev64360_bus_freq();
-
- printk(KERN_INFO "%s %s port (C) 2005 Lee Nicks "
- "(allinux@gmail.com)\n", BOARD_VENDOR, BOARD_MACHINE);
- if (ppc_md.progress)
- ppc_md.progress("ev64360_setup_arch: exit", 0);
-}
-
-/* Platform device data fixup routines. */
-#if defined(CONFIG_SERIAL_MPSC)
-static void __init
-ev64360_fixup_mpsc_pdata(struct platform_device *pdev)
-{
- struct mpsc_pdata *pdata;
-
- pdata = (struct mpsc_pdata *)pdev->dev.platform_data;
-
- pdata->max_idle = 40;
- pdata->default_baud = EV64360_DEFAULT_BAUD;
- pdata->brg_clk_src = EV64360_MPSC_CLK_SRC;
- /*
- * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts,
- * TCLK == SysCLK but on 64460, they are separate pins.
- * SysCLK can go up to 200 MHz but TCLK can only go up to 133 MHz.
- */
- pdata->brg_clk_freq = min(ev64360_bus_frequency, MV64x60_TCLK_FREQ_MAX);
-}
-#endif
-
-#if defined(CONFIG_MV643XX_ETH)
-static void __init
-ev64360_fixup_eth_pdata(struct platform_device *pdev)
-{
- struct mv643xx_eth_platform_data *eth_pd;
- static u16 phy_addr[] = {
- EV64360_ETH0_PHY_ADDR,
- EV64360_ETH1_PHY_ADDR,
- EV64360_ETH2_PHY_ADDR,
- };
-
- eth_pd = pdev->dev.platform_data;
- eth_pd->force_phy_addr = 1;
- eth_pd->phy_addr = phy_addr[pdev->id];
- eth_pd->tx_queue_size = EV64360_ETH_TX_QUEUE_SIZE;
- eth_pd->rx_queue_size = EV64360_ETH_RX_QUEUE_SIZE;
-}
-#endif
-
-static int
-ev64360_platform_notify(struct device *dev)
-{
- static struct {
- char *bus_id;
- void ((*rtn)(struct platform_device *pdev));
- } dev_map[] = {
-#if defined(CONFIG_SERIAL_MPSC)
- { MPSC_CTLR_NAME ".0", ev64360_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME ".1", ev64360_fixup_mpsc_pdata },
-#endif
-#if defined(CONFIG_MV643XX_ETH)
- { MV643XX_ETH_NAME ".0", ev64360_fixup_eth_pdata },
- { MV643XX_ETH_NAME ".1", ev64360_fixup_eth_pdata },
- { MV643XX_ETH_NAME ".2", ev64360_fixup_eth_pdata },
-#endif
- };
- struct platform_device *pdev;
- int i;
-
- if (dev && dev->bus_id)
- for (i=0; i<ARRAY_SIZE(dev_map); i++)
- if (!strncmp(dev->bus_id, dev_map[i].bus_id,
- BUS_ID_SIZE)) {
-
- pdev = container_of(dev,
- struct platform_device, dev);
- dev_map[i].rtn(pdev);
- }
-
- return 0;
-}
-
-#ifdef CONFIG_MTD_PHYSMAP
-
-#ifndef MB
-#define MB (1 << 20)
-#endif
-
-/*
- * MTD Layout.
- *
- * FLASH Amount: 0xff000000 - 0xffffffff
- * ------------- -----------------------
- * Reserved: 0xff000000 - 0xff03ffff
- * JFFS2 file system: 0xff040000 - 0xffefffff
- * U-boot: 0xfff00000 - 0xffffffff
- */
-static int __init
-ev64360_setup_mtd(void)
-{
- u32 size;
- int ptbl_entries;
- static struct mtd_partition *ptbl;
-
- size = ev64360_flash_size_0 + ev64360_flash_size_1;
- if (!size)
- return -ENOMEM;
-
- ptbl_entries = 3;
-
- if ((ptbl = kzalloc(ptbl_entries * sizeof(struct mtd_partition),
- GFP_KERNEL)) == NULL) {
-
- printk(KERN_WARNING "Can't alloc MTD partition table\n");
- return -ENOMEM;
- }
-
- ptbl[0].name = "reserved";
- ptbl[0].offset = 0;
- ptbl[0].size = EV64360_MTD_RESERVED_SIZE;
- ptbl[1].name = "jffs2";
- ptbl[1].offset = EV64360_MTD_RESERVED_SIZE;
- ptbl[1].size = EV64360_MTD_JFFS2_SIZE;
- ptbl[2].name = "U-BOOT";
- ptbl[2].offset = EV64360_MTD_RESERVED_SIZE + EV64360_MTD_JFFS2_SIZE;
- ptbl[2].size = EV64360_MTD_UBOOT_SIZE;
-
- physmap_map.size = size;
- physmap_set_partitions(ptbl, ptbl_entries);
- return 0;
-}
-
-arch_initcall(ev64360_setup_mtd);
-#endif
-
-static void
-ev64360_restart(char *cmd)
-{
- ulong i = 0xffffffff;
- volatile unsigned char * rtc_base = ioremap(EV64360_RTC_WINDOW_BASE,0x4000);
-
- /* issue hard reset */
- rtc_base[0xf] = 0x80;
- rtc_base[0xc] = 0x00;
- rtc_base[0xd] = 0x01;
- rtc_base[0xf] = 0x83;
-
- while (i-- > 0) ;
- panic("restart failed\n");
-}
-
-static void
-ev64360_halt(void)
-{
- while (1) ;
- /* NOTREACHED */
-}
-
-static void
-ev64360_power_off(void)
-{
- ev64360_halt();
- /* NOTREACHED */
-}
-
-static int
-ev64360_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: " BOARD_VENDOR "\n");
- seq_printf(m, "machine\t\t: " BOARD_MACHINE "\n");
- seq_printf(m, "bus speed\t: %dMHz\n", ev64360_bus_frequency/1000/1000);
-
- return 0;
-}
-
-static void __init
-ev64360_calibrate_decr(void)
-{
- u32 freq;
-
- freq = ev64360_bus_frequency / 4;
-
- printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
- (long)freq / 1000000, (long)freq % 1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-}
-
-unsigned long __init
-ev64360_find_end_of_memory(void)
-{
- return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE,
- MV64x60_TYPE_MV64360);
-}
-
-static inline void
-ev64360_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT2U, 0xf0001ffe);
- mtspr(SPRN_DBAT2L, 0xf000002a);
- mb();
-}
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
-static void __init
-ev64360_map_io(void)
-{
- io_block_mapping(CONFIG_MV64X60_NEW_BASE, \
- CONFIG_MV64X60_NEW_BASE, \
- 0x00020000, _PAGE_IO);
-}
-#endif
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer)
- * are non-zero, then we should use the board info from the bd_t
- * structure and the cmdline pointed to by r6 instead of the
- * information from birecs, if any. Otherwise, use the information
- * from birecs as discovered by the preceding call to
- * parse_bootinfo(). This rule should work with both PPCBoot, which
- * uses a bd_t board info structure, and the kernel boot wrapper,
- * which uses birecs.
- */
- if (r3 && r6) {
- /* copy board info structure */
- memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
- /* copy command line */
- *(char *)(r7+KERNELBASE) = 0;
- strcpy(cmd_line, (char *)(r6+KERNELBASE));
- }
- #ifdef CONFIG_ISA
- isa_mem_base = 0;
- #endif
-
- ppc_md.setup_arch = ev64360_setup_arch;
- ppc_md.show_cpuinfo = ev64360_show_cpuinfo;
- ppc_md.init_IRQ = mv64360_init_irq;
- ppc_md.get_irq = mv64360_get_irq;
- ppc_md.restart = ev64360_restart;
- ppc_md.power_off = ev64360_power_off;
- ppc_md.halt = ev64360_halt;
- ppc_md.find_end_of_memory = ev64360_find_end_of_memory;
- ppc_md.init = NULL;
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
- ppc_md.calibrate_decr = ev64360_calibrate_decr;
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
- ppc_md.setup_io_mappings = ev64360_map_io;
- ppc_md.progress = mv64x60_mpsc_progress;
- mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE);
-#endif
-
-#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
- platform_notify = ev64360_platform_notify;
-#endif
-
- ev64360_set_bat(); /* Need for ev64360_find_end_of_memory and progress */
-}
diff --git a/arch/ppc/platforms/ev64360.h b/arch/ppc/platforms/ev64360.h
deleted file mode 100644
index b30f472..0000000
--- a/arch/ppc/platforms/ev64360.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * Definitions for Marvell EV-64360-BP Evaluation Board.
- *
- * Author: Lee Nicks <allinux@gmail.com>
- *
- * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
- * Based on code done by Mark A. Greer <mgreer@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/*
- * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to
- * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
- * We'll only use one PCI MEM window on each PCI bus.
- *
- * This is the CPU physical memory map (windows must be at least 64KB and start
- * on a boundary that is a multiple of the window size):
- *
- * 0x42000000-0x4203ffff - Internal SRAM
- * 0xf1000000-0xf100ffff - MV64360 Registers (CONFIG_MV64X60_NEW_BASE)
- * 0xfc800000-0xfcffffff - RTC
- * 0xff000000-0xffffffff - Boot window, 16 MB flash
- * 0xc0000000-0xc3ffffff - PCI I/O (second hose)
- * 0x80000000-0xbfffffff - PCI MEM (second hose)
- */
-
-#ifndef __PPC_PLATFORMS_EV64360_H
-#define __PPC_PLATFORMS_EV64360_H
-
-/* CPU Physical Memory Map setup. */
-#define EV64360_BOOT_WINDOW_BASE 0xff000000
-#define EV64360_BOOT_WINDOW_SIZE 0x01000000 /* 16 MB */
-#define EV64360_INTERNAL_SRAM_BASE 0x42000000
-#define EV64360_RTC_WINDOW_BASE 0xfc800000
-#define EV64360_RTC_WINDOW_SIZE 0x00800000 /* 8 MB */
-
-#define EV64360_PCI1_MEM_START_PROC_ADDR 0x80000000
-#define EV64360_PCI1_MEM_START_PCI_HI_ADDR 0x00000000
-#define EV64360_PCI1_MEM_START_PCI_LO_ADDR 0x80000000
-#define EV64360_PCI1_MEM_SIZE 0x40000000 /* 1 GB */
-#define EV64360_PCI1_IO_START_PROC_ADDR 0xc0000000
-#define EV64360_PCI1_IO_START_PCI_ADDR 0x00000000
-#define EV64360_PCI1_IO_SIZE 0x04000000 /* 64 MB */
-
-#define EV64360_DEFAULT_BAUD 115200
-#define EV64360_MPSC_CLK_SRC 8 /* TCLK */
-#define EV64360_MPSC_CLK_FREQ 133333333
-
-#define EV64360_MTD_RESERVED_SIZE 0x40000
-#define EV64360_MTD_JFFS2_SIZE 0xec0000
-#define EV64360_MTD_UBOOT_SIZE 0x100000
-
-#define EV64360_ETH0_PHY_ADDR 8
-#define EV64360_ETH1_PHY_ADDR 9
-#define EV64360_ETH2_PHY_ADDR 10
-
-#define EV64360_ETH_TX_QUEUE_SIZE 800
-#define EV64360_ETH_RX_QUEUE_SIZE 400
-
-#define EV64360_ETH_PORT_CONFIG_VALUE \
- ETH_UNICAST_NORMAL_MODE | \
- ETH_DEFAULT_RX_QUEUE_0 | \
- ETH_DEFAULT_RX_ARP_QUEUE_0 | \
- ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \
- ETH_RECEIVE_BC_IF_IP | \
- ETH_RECEIVE_BC_IF_ARP | \
- ETH_CAPTURE_TCP_FRAMES_DIS | \
- ETH_CAPTURE_UDP_FRAMES_DIS | \
- ETH_DEFAULT_RX_TCP_QUEUE_0 | \
- ETH_DEFAULT_RX_UDP_QUEUE_0 | \
- ETH_DEFAULT_RX_BPDU_QUEUE_0
-
-#define EV64360_ETH_PORT_CONFIG_EXTEND_VALUE \
- ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \
- ETH_PARTITION_DISABLE
-
-#define GT_ETH_IPG_INT_RX(value) \
- ((value & 0x3fff) << 8)
-
-#define EV64360_ETH_PORT_SDMA_CONFIG_VALUE \
- ETH_RX_BURST_SIZE_4_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- ETH_TX_BURST_SIZE_4_64BIT
-
-#define EV64360_ETH_PORT_SERIAL_CONTROL_VALUE \
- ETH_FORCE_LINK_PASS | \
- ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \
- ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \
- ETH_ADV_SYMMETRIC_FLOW_CTRL | \
- ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
- ETH_FORCE_BP_MODE_NO_JAM | \
- BIT9 | \
- ETH_DO_NOT_FORCE_LINK_FAIL | \
- ETH_RETRANSMIT_16_ATTEMPTS | \
- ETH_ENABLE_AUTO_NEG_SPEED_GMII | \
- ETH_DTE_ADV_0 | \
- ETH_DISABLE_AUTO_NEG_BYPASS | \
- ETH_AUTO_NEG_NO_CHANGE | \
- ETH_MAX_RX_PACKET_9700BYTE | \
- ETH_CLR_EXT_LOOPBACK | \
- ETH_SET_FULL_DUPLEX_MODE | \
- ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX
-
-static inline u32
-ev64360_bus_freq(void)
-{
- return 133333333;
-}
-
-#endif /* __PPC_PLATFORMS_EV64360_H */
diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h
deleted file mode 100644
index 5219366..0000000
--- a/arch/ppc/platforms/fads.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * A collection of structures, addresses, and values associated with
- * the Motorola 860T FADS board. Copied from the MBX stuff.
- *
- * Copyright (c) 1998 Dan Malek (dmalek@jlc.net)
- *
- * Added MPC86XADS support.
- * The MPC86xADS manual says the board "is compatible with the MPC8xxFADS
- * for SW point of view". This is 99% correct.
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- * 2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_FADS_H__
-#define __ASM_FADS_H__
-
-
-#include <asm/ppcboot.h>
-
-/* Memory map is configured by the PROM startup.
- * I tried to follow the FADS manual, although the startup PROM
- * dictates this and we simply have to move some of the physical
- * addresses for Linux.
- */
-#define BCSR_ADDR ((uint)0xff010000)
-
-/* PHY link change interrupt */
-#define PHY_INTERRUPT SIU_IRQ2
-
-#define BCSR_SIZE ((uint)(64 * 1024))
-#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
-#define BCSR1 ((uint)(BCSR_ADDR + 0x04))
-#define BCSR2 ((uint)(BCSR_ADDR + 0x08))
-#define BCSR3 ((uint)(BCSR_ADDR + 0x0c))
-#define BCSR4 ((uint)(BCSR_ADDR + 0x10))
-
-#define IMAP_ADDR ((uint)0xff000000)
-#define IMAP_SIZE ((uint)(64 * 1024))
-
-#define PCMCIA_MEM_ADDR ((uint)0xff020000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-
-/* Bits of interest in the BCSRs.
- */
-#define BCSR1_ETHEN ((uint)0x20000000)
-#define BCSR1_IRDAEN ((uint)0x10000000)
-#define BCSR1_RS232EN_1 ((uint)0x01000000)
-#define BCSR1_PCCEN ((uint)0x00800000)
-#define BCSR1_PCCVCC0 ((uint)0x00400000)
-#define BCSR1_PCCVPP0 ((uint)0x00200000)
-#define BCSR1_PCCVPP1 ((uint)0x00100000)
-#define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1)
-#define BCSR1_RS232EN_2 ((uint)0x00040000)
-#define BCSR1_PCCVCC1 ((uint)0x00010000)
-#define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1)
-
-#define BCSR4_ETHLOOP ((uint)0x80000000) /* EEST Loopback */
-#define BCSR4_EEFDX ((uint)0x40000000) /* EEST FDX enable */
-#define BCSR4_FETH_EN ((uint)0x08000000) /* PHY enable */
-#define BCSR4_FETHCFG0 ((uint)0x04000000) /* PHY autoneg mode */
-#define BCSR4_FETHCFG1 ((uint)0x00400000) /* PHY autoneg mode */
-#define BCSR4_FETHFDE ((uint)0x02000000) /* PHY FDX advertise */
-#define BCSR4_FETHRST ((uint)0x00200000) /* PHY Reset */
-
-/* IO_BASE definition for pcmcia.
- */
-#define _IO_BASE 0x80000000
-#define _IO_BASE_SIZE 0x1000
-
-#ifdef CONFIG_IDE
-#define MAX_HWIFS 1
-#endif
-
-/* Interrupt level assignments.
- */
-#define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */
-
-/* We don't use the 8259.
- */
-#define NR_8259_INTS 0
-
-/* CPM Ethernet through SCC1 or SCC2 */
-
-#if defined(CONFIG_SCC1_ENET) || defined(CONFIG_MPC8xx_SECOND_ETH_SCC1) /* Probably 860 variant */
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- * TCLK - CLK1, RCLK - CLK2.
- */
-#define PA_ENET_RXD ((ushort)0x0001)
-#define PA_ENET_TXD ((ushort)0x0002)
-#define PA_ENET_TCLK ((ushort)0x0100)
-#define PA_ENET_RCLK ((ushort)0x0200)
-#define PB_ENET_TENA ((uint)0x00001000)
-#define PC_ENET_CLSN ((ushort)0x0010)
-#define PC_ENET_RENA ((ushort)0x0020)
-
-/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to
- * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x000000ff)
-#define SICR_ENET_CLKRT ((uint)0x0000002c)
-#endif /* CONFIG_SCC1_ENET */
-
-#ifdef CONFIG_SCC2_ENET /* Probably 823/850 variant */
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- * TCLK - CLK1, RCLK - CLK2.
- */
-#define PA_ENET_RXD ((ushort)0x0004)
-#define PA_ENET_TXD ((ushort)0x0008)
-#define PA_ENET_TCLK ((ushort)0x0400)
-#define PA_ENET_RCLK ((ushort)0x0200)
-#define PB_ENET_TENA ((uint)0x00002000)
-#define PC_ENET_CLSN ((ushort)0x0040)
-#define PC_ENET_RENA ((ushort)0x0080)
-
-/* Control bits in the SICR to route TCLK and RCLK to
- * SCC2. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x0000ff00)
-#define SICR_ENET_CLKRT ((uint)0x00002e00)
-#endif /* CONFIG_SCC2_ENET */
-
-#endif /* __ASM_FADS_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c
deleted file mode 100644
index 904b518..0000000
--- a/arch/ppc/platforms/hdpu.c
+++ /dev/null
@@ -1,1015 +0,0 @@
-/*
- * Board setup routines for the Sky Computers HDPU Compute Blade.
- *
- * Written by Brian Waite <waite@skycomputers.com>
- *
- * Based on code done by - Mark A. Greer <mgreer@mvista.com>
- * Rabeeh Khoury - rabeeh@galileo.co.il
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/seq_file.h>
-#include <linux/platform_device.h>
-
-#include <linux/initrd.h>
-#include <linux/root_dev.h>
-#include <linux/smp.h>
-
-#include <asm/time.h>
-#include <asm/machdep.h>
-#include <asm/todc.h>
-#include <asm/mv64x60.h>
-#include <asm/ppcboot.h>
-#include <platforms/hdpu.h>
-#include <linux/mv643xx.h>
-#include <linux/hdpu_features.h>
-#include <linux/device.h>
-#include <linux/mtd/physmap.h>
-
-#define BOARD_VENDOR "Sky Computers"
-#define BOARD_MACHINE "HDPU-CB-A"
-
-bd_t ppcboot_bd;
-int ppcboot_bd_valid = 0;
-
-static mv64x60_handle_t bh;
-
-extern char cmd_line[];
-
-unsigned long hdpu_find_end_of_memory(void);
-void hdpu_mpsc_progress(char *s, unsigned short hex);
-void hdpu_heartbeat(void);
-
-static void parse_bootinfo(unsigned long r3,
- unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7);
-static void hdpu_set_l1pe(void);
-static void hdpu_cpustate_set(unsigned char new_state);
-#ifdef CONFIG_SMP
-static DEFINE_SPINLOCK(timebase_lock);
-static unsigned int timebase_upper = 0, timebase_lower = 0;
-extern int smp_tb_synchronized;
-
-void __devinit hdpu_tben_give(void);
-void __devinit hdpu_tben_take(void);
-#endif
-
-static int __init
-hdpu_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
-
- if (hose->index == 0) {
- static char pci_irq_table[][4] = {
- {HDPU_PCI_0_IRQ, 0, 0, 0},
- {HDPU_PCI_0_IRQ, 0, 0, 0},
- };
-
- const long min_idsel = 1, max_idsel = 2, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- } else {
- static char pci_irq_table[][4] = {
- {HDPU_PCI_1_IRQ, 0, 0, 0},
- };
-
- const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
- }
-}
-
-static void __init hdpu_intr_setup(void)
-{
- mv64x60_write(&bh, MV64x60_GPP_IO_CNTL,
- (1 | (1 << 2) | (1 << 3) | (1 << 4) | (1 << 5) |
- (1 << 6) | (1 << 7) | (1 << 12) | (1 << 16) |
- (1 << 18) | (1 << 19) | (1 << 20) | (1 << 21) |
- (1 << 22) | (1 << 23) | (1 << 24) | (1 << 25) |
- (1 << 26) | (1 << 27) | (1 << 28) | (1 << 29)));
-
- /* XXXX Erranum FEr PCI-#8 */
- mv64x60_clr_bits(&bh, MV64x60_PCI0_CMD, (1 << 5) | (1 << 9));
- mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1 << 5) | (1 << 9));
-
- /*
- * Dismiss and then enable interrupt on GPP interrupt cause
- * for CPU #0
- */
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~((1 << 8) | (1 << 13)));
- mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, (1 << 8) | (1 << 13));
-
- /*
- * Dismiss and then enable interrupt on CPU #0 high cause reg
- * BIT25 summarizes GPP interrupts 8-15
- */
- mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, (1 << 25));
-}
-
-static void __init hdpu_setup_peripherals(void)
-{
- unsigned int val;
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
- HDPU_EMB_FLASH_BASE, HDPU_EMB_FLASH_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN,
- HDPU_TBEN_BASE, HDPU_TBEN_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN,
- HDPU_NEXUS_ID_BASE, HDPU_NEXUS_ID_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
- HDPU_INTERNAL_SRAM_BASE,
- HDPU_INTERNAL_SRAM_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
-
- bh.ci->disable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN, 0, 0, 0);
-
- mv64x60_clr_bits(&bh, MV64x60_PCI0_PCI_DECODE_CNTL, (1 << 3));
- mv64x60_clr_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, (1 << 3));
- mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
- ((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24)));
-
- /* Enable pipelining */
- mv64x60_set_bits(&bh, MV64x60_CPU_CONFIG, (1 << 13));
- /* Enable Snoop Pipelining */
- mv64x60_set_bits(&bh, MV64360_D_UNIT_CONTROL_HIGH, (1 << 24));
-
- /*
- * Change DRAM read buffer assignment.
- * Assign read buffer 0 dedicated only for CPU,
- * and the rest read buffer 1.
- */
- val = mv64x60_read(&bh, MV64360_SDRAM_CONFIG);
- val = val & 0x03ffffff;
- val = val | 0xf8000000;
- mv64x60_write(&bh, MV64360_SDRAM_CONFIG, val);
-
- /*
- * Configure internal SRAM -
- * Cache coherent write back, if CONFIG_MV64360_SRAM_CACHE_COHERENT set
- * Parity enabled.
- * Parity error propagation
- * Arbitration not parked for CPU only
- * Other bits are reserved.
- */
-#ifdef CONFIG_MV64360_SRAM_CACHE_COHERENT
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2);
-#else
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b0);
-#endif
-
- hdpu_intr_setup();
-}
-
-static void __init hdpu_setup_bridge(void)
-{
- struct mv64x60_setup_info si;
- int i;
-
- memset(&si, 0, sizeof(si));
-
- si.phys_reg_base = HDPU_BRIDGE_REG_BASE;
- si.pci_0.enable_bus = 1;
- si.pci_0.pci_io.cpu_base = HDPU_PCI0_IO_START_PROC_ADDR;
- si.pci_0.pci_io.pci_base_hi = 0;
- si.pci_0.pci_io.pci_base_lo = HDPU_PCI0_IO_START_PCI_ADDR;
- si.pci_0.pci_io.size = HDPU_PCI0_IO_SIZE;
- si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_mem[0].cpu_base = HDPU_PCI0_MEM_START_PROC_ADDR;
- si.pci_0.pci_mem[0].pci_base_hi = HDPU_PCI0_MEM_START_PCI_HI_ADDR;
- si.pci_0.pci_mem[0].pci_base_lo = HDPU_PCI0_MEM_START_PCI_LO_ADDR;
- si.pci_0.pci_mem[0].size = HDPU_PCI0_MEM_SIZE;
- si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_cmd_bits = 0;
- si.pci_0.latency_timer = 0x80;
-
- si.pci_1.enable_bus = 1;
- si.pci_1.pci_io.cpu_base = HDPU_PCI1_IO_START_PROC_ADDR;
- si.pci_1.pci_io.pci_base_hi = 0;
- si.pci_1.pci_io.pci_base_lo = HDPU_PCI1_IO_START_PCI_ADDR;
- si.pci_1.pci_io.size = HDPU_PCI1_IO_SIZE;
- si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_mem[0].cpu_base = HDPU_PCI1_MEM_START_PROC_ADDR;
- si.pci_1.pci_mem[0].pci_base_hi = HDPU_PCI1_MEM_START_PCI_HI_ADDR;
- si.pci_1.pci_mem[0].pci_base_lo = HDPU_PCI1_MEM_START_PCI_LO_ADDR;
- si.pci_1.pci_mem[0].size = HDPU_PCI1_MEM_SIZE;
- si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_cmd_bits = 0;
- si.pci_1.latency_timer = 0x80;
-
- for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) {
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE;
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE;
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE;
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_NONE |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-
- si.pci_0.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_NONE |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-
-#else
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB; /* errata */
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB; /* errata */
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB; /* errata */
-
- si.pci_0.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_WB |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_WB |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-#endif
- }
-
- hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_INIT_PCI);
-
- /* Lookup PCI host bridges */
- mv64x60_init(&bh, &si);
- pci_dram_offset = 0; /* System mem at same addr on PCI & cpu bus */
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = hdpu_map_irq;
-
- mv64x60_set_bus(&bh, 0, 0);
- bh.hose_a->first_busno = 0;
- bh.hose_a->last_busno = 0xff;
- bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0);
-
- bh.hose_b->first_busno = bh.hose_a->last_busno + 1;
- mv64x60_set_bus(&bh, 1, bh.hose_b->first_busno);
- bh.hose_b->last_busno = 0xff;
- bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b,
- bh.hose_b->first_busno);
-
- ppc_md.pci_exclude_device = mv64x60_pci_exclude_device;
-
- hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_INIT_REG);
- /*
- * Enabling of PCI internal-vs-external arbitration
- * is a platform- and errata-dependent decision.
- */
- return;
-}
-
-#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
-static void __init hdpu_early_serial_map(void)
-{
-#ifdef CONFIG_KGDB
- static char first_time = 1;
-
-#if defined(CONFIG_KGDB_TTYS0)
-#define KGDB_PORT 0
-#elif defined(CONFIG_KGDB_TTYS1)
-#define KGDB_PORT 1
-#else
-#error "Invalid kgdb_tty port"
-#endif
-
- if (first_time) {
- gt_early_mpsc_init(KGDB_PORT,
- B9600 | CS8 | CREAD | HUPCL | CLOCAL);
- first_time = 0;
- }
-
- return;
-#endif
-}
-#endif
-
-static void hdpu_init2(void)
-{
- return;
-}
-
-#if defined(CONFIG_MV643XX_ETH)
-static void __init hdpu_fixup_eth_pdata(struct platform_device *pd)
-{
-
- struct mv643xx_eth_platform_data *eth_pd;
- eth_pd = pd->dev.platform_data;
-
- eth_pd->force_phy_addr = 1;
- eth_pd->phy_addr = pd->id;
- eth_pd->speed = SPEED_100;
- eth_pd->duplex = DUPLEX_FULL;
- eth_pd->tx_queue_size = 400;
- eth_pd->rx_queue_size = 800;
-}
-#endif
-
-static void __init hdpu_fixup_mpsc_pdata(struct platform_device *pd)
-{
-
- struct mpsc_pdata *pdata;
-
- pdata = (struct mpsc_pdata *)pd->dev.platform_data;
-
- pdata->max_idle = 40;
- if (ppcboot_bd_valid)
- pdata->default_baud = ppcboot_bd.bi_baudrate;
- else
- pdata->default_baud = HDPU_DEFAULT_BAUD;
- pdata->brg_clk_src = HDPU_MPSC_CLK_SRC;
- pdata->brg_clk_freq = HDPU_MPSC_CLK_FREQ;
-}
-
-#if defined(CONFIG_HDPU_FEATURES)
-static void __init hdpu_fixup_cpustate_pdata(struct platform_device *pd)
-{
- struct platform_device *pds[1];
- pds[0] = pd;
- mv64x60_pd_fixup(&bh, pds, 1);
-}
-#endif
-
-static int hdpu_platform_notify(struct device *dev)
-{
- static struct {
- char *bus_id;
- void ((*rtn) (struct platform_device * pdev));
- } dev_map[] = {
- {
- MPSC_CTLR_NAME ".0", hdpu_fixup_mpsc_pdata},
-#if defined(CONFIG_MV643XX_ETH)
- {
- MV643XX_ETH_NAME ".0", hdpu_fixup_eth_pdata},
-#endif
-#if defined(CONFIG_HDPU_FEATURES)
- {
- HDPU_CPUSTATE_NAME ".0", hdpu_fixup_cpustate_pdata},
-#endif
- };
- struct platform_device *pdev;
- int i;
-
- if (dev && dev->bus_id)
- for (i = 0; i < ARRAY_SIZE(dev_map); i++)
- if (!strncmp(dev->bus_id, dev_map[i].bus_id,
- BUS_ID_SIZE)) {
-
- pdev = container_of(dev,
- struct platform_device,
- dev);
- dev_map[i].rtn(pdev);
- }
-
- return 0;
-}
-
-static void __init hdpu_setup_arch(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("hdpu_setup_arch: enter", 0);
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- ppc_md.heartbeat = hdpu_heartbeat;
-
- ppc_md.heartbeat_reset = HZ;
- ppc_md.heartbeat_count = 1;
-
- if (ppc_md.progress)
- ppc_md.progress("hdpu_setup_arch: Enabling L2 cache", 0);
-
- /* Enable L1 Parity Bits */
- hdpu_set_l1pe();
-
- /* Enable L2 and L3 caches (if 745x) */
- _set_L2CR(0x80080000);
-
- if (ppc_md.progress)
- ppc_md.progress("hdpu_setup_arch: enter", 0);
-
- hdpu_setup_bridge();
-
- hdpu_setup_peripherals();
-
-#ifdef CONFIG_SERIAL_MPSC_CONSOLE
- hdpu_early_serial_map();
-#endif
-
- printk("SKY HDPU Compute Blade \n");
-
- if (ppc_md.progress)
- ppc_md.progress("hdpu_setup_arch: exit", 0);
-
- hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_OK);
- return;
-}
-static void __init hdpu_init_irq(void)
-{
- mv64360_init_irq();
-}
-
-static void __init hdpu_set_l1pe()
-{
- unsigned long ictrl;
- asm volatile ("mfspr %0, 1011":"=r" (ictrl):);
- ictrl |= ICTRL_EICE | ICTRL_EDC | ICTRL_EICP;
- asm volatile ("mtspr 1011, %0"::"r" (ictrl));
-}
-
-/*
- * Set BAT 1 to map 0xf1000000 to end of physical memory space.
- */
-static __inline__ void hdpu_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT1U, 0xf10001fe);
- mtspr(SPRN_DBAT1L, 0xf100002a);
- mb();
-
- return;
-}
-
-unsigned long __init hdpu_find_end_of_memory(void)
-{
- return mv64x60_get_mem_size(CONFIG_MV64X60_NEW_BASE,
- MV64x60_TYPE_MV64360);
-}
-
-static void hdpu_reset_board(void)
-{
- volatile int infinite = 1;
-
- hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_RESET);
-
- local_irq_disable();
-
- /* Clear all the LEDs */
- mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, ((1 << 4) |
- (1 << 5) | (1 << 6)));
-
- /* disable and invalidate the L2 cache */
- _set_L2CR(0);
- _set_L2CR(0x200000);
-
- /* flush and disable L1 I/D cache */
- __asm__ __volatile__
- ("\n"
- "mfspr 3,1008\n"
- "ori 5,5,0xcc00\n"
- "ori 4,3,0xc00\n"
- "andc 5,3,5\n"
- "sync\n"
- "mtspr 1008,4\n"
- "isync\n" "sync\n" "mtspr 1008,5\n" "isync\n" "sync\n");
-
- /* Hit the reset bit */
- mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (1 << 3));
-
- while (infinite)
- infinite = infinite;
-
- return;
-}
-
-static void hdpu_restart(char *cmd)
-{
- volatile ulong i = 10000000;
-
- hdpu_reset_board();
-
- while (i-- > 0) ;
- panic("restart failed\n");
-}
-
-static void hdpu_halt(void)
-{
- local_irq_disable();
-
- hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_HALT);
-
- /* Clear all the LEDs */
- mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, ((1 << 4) | (1 << 5) |
- (1 << 6)));
- while (1) ;
- /* NOTREACHED */
-}
-
-static void hdpu_power_off(void)
-{
- hdpu_halt();
- /* NOTREACHED */
-}
-
-static int hdpu_show_cpuinfo(struct seq_file *m)
-{
- uint pvid;
-
- pvid = mfspr(SPRN_PVR);
- seq_printf(m, "vendor\t\t: Sky Computers\n");
- seq_printf(m, "machine\t\t: HDPU Compute Blade\n");
- seq_printf(m, "PVID\t\t: 0x%x, vendor: %s\n",
- pvid, (pvid & (1 << 15) ? "IBM" : "Motorola"));
-
- return 0;
-}
-
-static void __init hdpu_calibrate_decr(void)
-{
- ulong freq;
-
- if (ppcboot_bd_valid)
- freq = ppcboot_bd.bi_busfreq / 4;
- else
- freq = 133000000;
-
- printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
- freq / 1000000, freq % 1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-
- return;
-}
-
-static void parse_bootinfo(unsigned long r3,
- unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- bd_t *bd = NULL;
- char *cmdline_start = NULL;
- int cmdline_len = 0;
-
- if (r3) {
- if ((r3 & 0xf0000000) == 0)
- r3 += KERNELBASE;
- if ((r3 & 0xf0000000) == KERNELBASE) {
- bd = (void *)r3;
-
- memcpy(&ppcboot_bd, bd, sizeof(ppcboot_bd));
- ppcboot_bd_valid = 1;
- }
- }
-#ifdef CONFIG_BLK_DEV_INITRD
- if (r4 && r5 && r5 > r4) {
- if ((r4 & 0xf0000000) == 0)
- r4 += KERNELBASE;
- if ((r5 & 0xf0000000) == 0)
- r5 += KERNELBASE;
- if ((r4 & 0xf0000000) == KERNELBASE) {
- initrd_start = r4;
- initrd_end = r5;
- initrd_below_start_ok = 1;
- }
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- if (r6 && r7 && r7 > r6) {
- if ((r6 & 0xf0000000) == 0)
- r6 += KERNELBASE;
- if ((r7 & 0xf0000000) == 0)
- r7 += KERNELBASE;
- if ((r6 & 0xf0000000) == KERNELBASE) {
- cmdline_start = (void *)r6;
- cmdline_len = (r7 - r6);
- strncpy(cmd_line, cmdline_start, cmdline_len);
- }
- }
-}
-
-void hdpu_heartbeat(void)
-{
- if (mv64x60_read(&bh, MV64x60_GPP_VALUE) & (1 << 5))
- mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (1 << 5));
- else
- mv64x60_write(&bh, MV64x60_GPP_VALUE_SET, (1 << 5));
-
- ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
-
-}
-
-static void __init hdpu_map_io(void)
-{
- io_block_mapping(0xf1000000, 0xf1000000, 0x20000, _PAGE_IO);
-}
-
-#ifdef CONFIG_SMP
-char hdpu_smp0[] = "SMP Cpu #0";
-char hdpu_smp1[] = "SMP Cpu #1";
-
-static irqreturn_t hdpu_smp_cpu0_int_handler(int irq, void *dev_id)
-{
- volatile unsigned int doorbell;
-
- doorbell = mv64x60_read(&bh, MV64360_CPU0_DOORBELL);
-
- /* Ack the doorbell interrupts */
- mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, doorbell);
-
- if (doorbell & 1) {
- smp_message_recv(0);
- }
- if (doorbell & 2) {
- smp_message_recv(1);
- }
- if (doorbell & 4) {
- smp_message_recv(2);
- }
- if (doorbell & 8) {
- smp_message_recv(3);
- }
- return IRQ_HANDLED;
-}
-
-static irqreturn_t hdpu_smp_cpu1_int_handler(int irq, void *dev_id)
-{
- volatile unsigned int doorbell;
-
- doorbell = mv64x60_read(&bh, MV64360_CPU1_DOORBELL);
-
- /* Ack the doorbell interrupts */
- mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, doorbell);
-
- if (doorbell & 1) {
- smp_message_recv(0);
- }
- if (doorbell & 2) {
- smp_message_recv(1);
- }
- if (doorbell & 4) {
- smp_message_recv(2);
- }
- if (doorbell & 8) {
- smp_message_recv(3);
- }
- return IRQ_HANDLED;
-}
-
-static void smp_hdpu_CPU_two(void)
-{
- __asm__ __volatile__
- ("\n"
- "lis 3,0x0000\n"
- "ori 3,3,0x00c0\n"
- "mtspr 26, 3\n" "li 4,0\n" "mtspr 27,4\n" "rfi");
-
-}
-
-static int smp_hdpu_probe(void)
-{
- int *cpu_count_reg;
- int num_cpus = 0;
-
- cpu_count_reg = ioremap(HDPU_NEXUS_ID_BASE, HDPU_NEXUS_ID_SIZE);
- if (cpu_count_reg) {
- num_cpus = (*cpu_count_reg >> 20) & 0x3;
- iounmap(cpu_count_reg);
- }
-
- /* Validate the bits in the CPLD. If we could not map the reg, return 2.
- * If the register reported 0 or 3, return 2.
- * Older CPLD revisions set these bits to all ones (val = 3).
- */
- if ((num_cpus < 1) || (num_cpus > 2)) {
- printk
- ("Unable to determine the number of processors %d . deafulting to 2.\n",
- num_cpus);
- num_cpus = 2;
- }
- return num_cpus;
-}
-
-static void
-smp_hdpu_message_pass(int target, int msg)
-{
- if (msg > 0x3) {
- printk("SMP %d: smp_message_pass: unknown msg %d\n",
- smp_processor_id(), msg);
- return;
- }
- switch (target) {
- case MSG_ALL:
- mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg);
- mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg);
- break;
- case MSG_ALL_BUT_SELF:
- if (smp_processor_id())
- mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg);
- else
- mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg);
- break;
- default:
- if (target == 0)
- mv64x60_write(&bh, MV64360_CPU0_DOORBELL, 1 << msg);
- else
- mv64x60_write(&bh, MV64360_CPU1_DOORBELL, 1 << msg);
- break;
- }
-}
-
-static void smp_hdpu_kick_cpu(int nr)
-{
- volatile unsigned int *bootaddr;
-
- if (ppc_md.progress)
- ppc_md.progress("smp_hdpu_kick_cpu", 0);
-
- hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR | CPUSTATE_KERNEL_CPU1_KICK);
-
- /* Disable BootCS. Must also reduce the windows size to zero. */
- bh.ci->disable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN, 0, 0, 0);
-
- bootaddr = ioremap(HDPU_INTERNAL_SRAM_BASE, HDPU_INTERNAL_SRAM_SIZE);
- if (!bootaddr) {
- if (ppc_md.progress)
- ppc_md.progress("smp_hdpu_kick_cpu: ioremap failed", 0);
- return;
- }
-
- memcpy((void *)(bootaddr + 0x40), (void *)&smp_hdpu_CPU_two, 0x20);
-
- /* map SRAM to 0xfff00000 */
- bh.ci->disable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
- 0xfff00000, HDPU_INTERNAL_SRAM_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
-
- /* Enable CPU1 arbitration */
- mv64x60_clr_bits(&bh, MV64x60_CPU_MASTER_CNTL, (1 << 9));
-
- /*
- * Wait 100mSecond until other CPU has reached __secondary_start.
- * When it reaches, it is permittable to rever the SRAM mapping etc...
- */
- mdelay(100);
- *(unsigned long *)KERNELBASE = nr;
- asm volatile ("dcbf 0,%0"::"r" (KERNELBASE):"memory");
-
- iounmap(bootaddr);
-
- /* Set up window for internal sram (256KByte insize) */
- bh.ci->disable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
- HDPU_INTERNAL_SRAM_BASE,
- HDPU_INTERNAL_SRAM_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
- /*
- * Set up windows for embedded FLASH (using boot CS window).
- */
-
- bh.ci->disable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
- HDPU_EMB_FLASH_BASE, HDPU_EMB_FLASH_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
-}
-
-static void smp_hdpu_setup_cpu(int cpu_nr)
-{
- if (cpu_nr == 0) {
- if (ppc_md.progress)
- ppc_md.progress("smp_hdpu_setup_cpu 0", 0);
- mv64x60_write(&bh, MV64360_CPU0_DOORBELL_CLR, 0xff);
- mv64x60_write(&bh, MV64360_CPU0_DOORBELL_MASK, 0xff);
- request_irq(60, hdpu_smp_cpu0_int_handler,
- IRQF_DISABLED, hdpu_smp0, 0);
- }
-
- if (cpu_nr == 1) {
- if (ppc_md.progress)
- ppc_md.progress("smp_hdpu_setup_cpu 1", 0);
-
- hdpu_cpustate_set(CPUSTATE_KERNEL_MAJOR |
- CPUSTATE_KERNEL_CPU1_OK);
-
- /* Enable L1 Parity Bits */
- hdpu_set_l1pe();
-
- /* Enable L2 cache */
- _set_L2CR(0);
- _set_L2CR(0x80080000);
-
- mv64x60_write(&bh, MV64360_CPU1_DOORBELL_CLR, 0x0);
- mv64x60_write(&bh, MV64360_CPU1_DOORBELL_MASK, 0xff);
- request_irq(28, hdpu_smp_cpu1_int_handler,
- IRQF_DISABLED, hdpu_smp1, 0);
- }
-
-}
-
-void __devinit hdpu_tben_give()
-{
- volatile unsigned long *val = 0;
-
- /* By writing 0 to the TBEN_BASE, the timebases is frozen */
- val = ioremap(HDPU_TBEN_BASE, 4);
- *val = 0;
- mb();
-
- spin_lock(&timebase_lock);
- timebase_upper = get_tbu();
- timebase_lower = get_tbl();
- spin_unlock(&timebase_lock);
-
- while (timebase_upper || timebase_lower)
- barrier();
-
- /* By writing 1 to the TBEN_BASE, the timebases is thawed */
- *val = 1;
- mb();
-
- iounmap(val);
-
-}
-
-void __devinit hdpu_tben_take()
-{
- while (!(timebase_upper || timebase_lower))
- barrier();
-
- spin_lock(&timebase_lock);
- set_tb(timebase_upper, timebase_lower);
- timebase_upper = 0;
- timebase_lower = 0;
- spin_unlock(&timebase_lock);
-}
-
-static struct smp_ops_t hdpu_smp_ops = {
- .message_pass = smp_hdpu_message_pass,
- .probe = smp_hdpu_probe,
- .kick_cpu = smp_hdpu_kick_cpu,
- .setup_cpu = smp_hdpu_setup_cpu,
- .give_timebase = hdpu_tben_give,
- .take_timebase = hdpu_tben_take,
-};
-#endif /* CONFIG_SMP */
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(r3, r4, r5, r6, r7);
-
- isa_mem_base = 0;
-
- ppc_md.setup_arch = hdpu_setup_arch;
- ppc_md.init = hdpu_init2;
- ppc_md.show_cpuinfo = hdpu_show_cpuinfo;
- ppc_md.init_IRQ = hdpu_init_irq;
- ppc_md.get_irq = mv64360_get_irq;
- ppc_md.restart = hdpu_restart;
- ppc_md.power_off = hdpu_power_off;
- ppc_md.halt = hdpu_halt;
- ppc_md.find_end_of_memory = hdpu_find_end_of_memory;
- ppc_md.calibrate_decr = hdpu_calibrate_decr;
- ppc_md.setup_io_mappings = hdpu_map_io;
-
- bh.p_base = CONFIG_MV64X60_NEW_BASE;
- bh.v_base = (unsigned long *)bh.p_base;
-
- hdpu_set_bat();
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG)
- ppc_md.progress = hdpu_mpsc_progress; /* embedded UART */
- mv64x60_progress_init(bh.p_base);
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-
-#ifdef CONFIG_SMP
- smp_ops = &hdpu_smp_ops;
-#endif /* CONFIG_SMP */
-
-#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
- platform_notify = hdpu_platform_notify;
-#endif
- return;
-}
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
-/* SMP safe version of the serial text debug routine. Uses Semaphore 0 */
-void hdpu_mpsc_progress(char *s, unsigned short hex)
-{
- while (mv64x60_read(&bh, MV64360_WHO_AM_I) !=
- mv64x60_read(&bh, MV64360_SEMAPHORE_0)) {
- }
- mv64x60_mpsc_progress(s, hex);
- mv64x60_write(&bh, MV64360_SEMAPHORE_0, 0xff);
-}
-#endif
-
-static void hdpu_cpustate_set(unsigned char new_state)
-{
- unsigned int state = (new_state << 21);
- mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, (0xff << 21));
- mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, state);
-}
-
-#ifdef CONFIG_MTD_PHYSMAP
-static struct mtd_partition hdpu_partitions[] = {
- {
- .name = "Root FS",
- .size = 0x03400000,
- .offset = 0,
- .mask_flags = 0,
- },{
- .name = "User FS",
- .size = 0x00800000,
- .offset = 0x03400000,
- .mask_flags = 0,
- },{
- .name = "Kernel Image",
- .size = 0x002C0000,
- .offset = 0x03C00000,
- .mask_flags = 0,
- },{
- .name = "bootEnv",
- .size = 0x00040000,
- .offset = 0x03EC0000,
- .mask_flags = 0,
- },{
- .name = "bootROM",
- .size = 0x00100000,
- .offset = 0x03F00000,
- .mask_flags = 0,
- }
-};
-
-static int __init hdpu_setup_mtd(void)
-{
-
- physmap_set_partitions(hdpu_partitions, 5);
- return 0;
-}
-
-arch_initcall(hdpu_setup_mtd);
-#endif
-
-#ifdef CONFIG_HDPU_FEATURES
-
-static struct resource hdpu_cpustate_resources[] = {
- [0] = {
- .name = "addr base",
- .start = MV64x60_GPP_VALUE_SET,
- .end = MV64x60_GPP_VALUE_CLR + 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct resource hdpu_nexus_resources[] = {
- [0] = {
- .name = "nexus register",
- .start = HDPU_NEXUS_ID_BASE,
- .end = HDPU_NEXUS_ID_BASE + HDPU_NEXUS_ID_SIZE,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device hdpu_cpustate_device = {
- .name = HDPU_CPUSTATE_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(hdpu_cpustate_resources),
- .resource = hdpu_cpustate_resources,
-};
-
-static struct platform_device hdpu_nexus_device = {
- .name = HDPU_NEXUS_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(hdpu_nexus_resources),
- .resource = hdpu_nexus_resources,
-};
-
-static int __init hdpu_add_pds(void)
-{
- platform_device_register(&hdpu_cpustate_device);
- platform_device_register(&hdpu_nexus_device);
- return 0;
-}
-
-arch_initcall(hdpu_add_pds);
-#endif
diff --git a/arch/ppc/platforms/hdpu.h b/arch/ppc/platforms/hdpu.h
deleted file mode 100644
index f9e020b..0000000
--- a/arch/ppc/platforms/hdpu.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * Definitions for Sky Computers HDPU board.
- *
- * Brian Waite <waite@skycomputers.com>
- *
- * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
- * Based on code done by Mark A. Greer <mgreer@mvista.com>
- * Based on code done by Tim Montgomery <timm@artesyncp.com>
- *
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/*
- * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to
- * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
- * We'll only use one PCI MEM window on each PCI bus.
- *
- * This is the CPU physical memory map (windows must be at least 64K and start
- * on a boundary that is a multiple of the window size):
- *
- * 0x80000000-0x8fffffff - PCI 0 MEM
- * 0xa0000000-0xafffffff - PCI 1 MEM
- * 0xc0000000-0xc0ffffff - PCI 0 I/O
- * 0xc1000000-0xc1ffffff - PCI 1 I/O
-
- * 0xf1000000-0xf100ffff - MV64360 Registers
- * 0xf1010000-0xfb9fffff - HOLE
- * 0xfbfa0000-0xfbfaffff - TBEN
- * 0xfbf00000-0xfbfbffff - NEXUS
- * 0xfbfc0000-0xfbffffff - Internal SRAM
- * 0xfc000000-0xffffffff - Boot window
- */
-
-#ifndef __PPC_PLATFORMS_HDPU_H
-#define __PPC_PLATFORMS_HDPU_H
-
-/* CPU Physical Memory Map setup. */
-#define HDPU_BRIDGE_REG_BASE 0xf1000000
-
-#define HDPU_TBEN_BASE 0xfbfa0000
-#define HDPU_TBEN_SIZE 0x00010000
-#define HDPU_NEXUS_ID_BASE 0xfbfb0000
-#define HDPU_NEXUS_ID_SIZE 0x00010000
-#define HDPU_INTERNAL_SRAM_BASE 0xfbfc0000
-#define HDPU_INTERNAL_SRAM_SIZE 0x00040000
-#define HDPU_EMB_FLASH_BASE 0xfc000000
-#define HDPU_EMB_FLASH_SIZE 0x04000000
-
-/* PCI Mappings */
-
-#define HDPU_PCI0_MEM_START_PROC_ADDR 0x80000000
-#define HDPU_PCI0_MEM_START_PCI_HI_ADDR 0x00000000
-#define HDPU_PCI0_MEM_START_PCI_LO_ADDR HDPU_PCI0_MEM_START_PROC_ADDR
-#define HDPU_PCI0_MEM_SIZE 0x10000000
-
-#define HDPU_PCI1_MEM_START_PROC_ADDR 0xc0000000
-#define HDPU_PCI1_MEM_START_PCI_HI_ADDR 0x00000000
-#define HDPU_PCI1_MEM_START_PCI_LO_ADDR HDPU_PCI1_MEM_START_PROC_ADDR
-#define HDPU_PCI1_MEM_SIZE 0x20000000
-
-#define HDPU_PCI0_IO_START_PROC_ADDR 0xc0000000
-#define HDPU_PCI0_IO_START_PCI_ADDR 0x00000000
-#define HDPU_PCI0_IO_SIZE 0x01000000
-
-#define HDPU_PCI1_IO_START_PROC_ADDR 0xc1000000
-#define HDPU_PCI1_IO_START_PCI_ADDR 0x01000000
-#define HDPU_PCI1_IO_SIZE 0x01000000
-
-#define HDPU_DEFAULT_BAUD 115200
-#define HDPU_MPSC_CLK_SRC 8 /* TCLK */
-#define HDPU_MPSC_CLK_FREQ 133000000 /* 133 Mhz */
-
-#define HDPU_PCI_0_IRQ (8+64)
-#define HDPU_PCI_1_IRQ (13+64)
-
-#endif /* __PPC_PLATFORMS_HDPU_H */
diff --git a/arch/ppc/platforms/hermes.h b/arch/ppc/platforms/hermes.h
deleted file mode 100644
index de91aff..0000000
--- a/arch/ppc/platforms/hermes.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Multidata HERMES-PRO ( / SL ) board specific definitions
- *
- * Copyright (c) 2000, 2001 Wolfgang Denk (wd@denx.de)
- */
-
-#ifndef __MACH_HERMES_H
-#define __MACH_HERMES_H
-
-
-#include <asm/ppcboot.h>
-
-#define HERMES_IMMR_BASE 0xFF000000 /* phys. addr of IMMR */
-#define HERMES_IMAP_SIZE (64 * 1024) /* size of mapped area */
-
-#define IMAP_ADDR HERMES_IMMR_BASE /* physical base address of IMMR area */
-#define IMAP_SIZE HERMES_IMAP_SIZE /* mapped size of IMMR area */
-
-#define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */
-#define CPM_INTERRUPT 11 /* = SIU_LEVEL5 (was: SIU_LEVEL2) */
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif /* __MACH_HERMES_H */
diff --git a/arch/ppc/platforms/ip860.h b/arch/ppc/platforms/ip860.h
deleted file mode 100644
index 2f1f86c..0000000
--- a/arch/ppc/platforms/ip860.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * MicroSys IP860 VMEBus board specific definitions
- *
- * Copyright (c) 2000, 2001 Wolfgang Denk (wd@denx.de)
- */
-
-#ifndef __MACH_IP860_H
-#define __MACH_IP860_H
-
-
-#include <asm/ppcboot.h>
-
-#define IP860_IMMR_BASE 0xF1000000 /* phys. addr of IMMR */
-#define IP860_IMAP_SIZE (64 * 1024) /* size of mapped area */
-
-#define IMAP_ADDR IP860_IMMR_BASE /* physical base address of IMMR area */
-#define IMAP_SIZE IP860_IMAP_SIZE /* mapped size of IMMR area */
-
-/*
- * MPC8xx Chip Select Usage
- */
-#define IP860_BOOT_CS 0 /* Boot (VMEBus or Flash) Chip Select 0 */
-#define IP860_FLASH_CS 1 /* Flash is on Chip Select 1 */
-#define IP860_SDRAM_CS 2 /* SDRAM is on Chip Select 2 */
-#define IP860_SRAM_CS 3 /* SRAM is on Chip Select 3 */
-#define IP860_BCSR_CS 4 /* BCSR is on Chip Select 4 */
-#define IP860_IP_CS 5 /* IP Slots are on Chip Select 5 */
-#define IP860_VME_STD_CS 6 /* VME Standard I/O is on Chip Select 6 */
-#define IP860_VME_SHORT_CS 7 /* VME Short I/O is on Chip Select 7 */
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif /* __MACH_IP860_H */
diff --git a/arch/ppc/platforms/ivms8.h b/arch/ppc/platforms/ivms8.h
deleted file mode 100644
index 9109e68..0000000
--- a/arch/ppc/platforms/ivms8.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Speech Design Integrated Voicemail board specific definitions
- * - IVMS8 (small, 8 channels)
- * - IVML24 (large, 24 channels)
- *
- * In 2.5 when we force a new bootloader, we can merge these two, and add
- * in _MACH_'s for them. -- Tom
- *
- * Copyright (c) 2000, 2001 Wolfgang Denk (wd@denx.de)
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IVMS8_H__
-#define __ASM_IVMS8_H__
-
-
-#include <asm/ppcboot.h>
-
-#define IVMS_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */
-#define IVMS_IMAP_SIZE (64 * 1024) /* size of mapped area */
-
-#define IMAP_ADDR IVMS_IMMR_BASE /* phys. base address of IMMR area */
-#define IMAP_SIZE IVMS_IMAP_SIZE /* mapped size of IMMR area */
-
-#define PCMCIA_MEM_ADDR ((uint)0xFE100000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-
-#define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */
-#define IDE0_INTERRUPT 10 /* = IRQ5 */
-#define CPM_INTERRUPT 11 /* = SIU_LEVEL5 (was: SIU_LEVEL2) */
-#define PHY_INTERRUPT 12 /* = IRQ6 */
-
-/* override the default number of IDE hardware interfaces */
-#define MAX_HWIFS 1
-
-/*
- * Definitions for IDE0 Interface
- */
-#define IDE0_BASE_OFFSET 0x0000 /* Offset in PCMCIA memory */
-#define IDE0_DATA_REG_OFFSET 0x0000
-#define IDE0_ERROR_REG_OFFSET 0x0081
-#define IDE0_NSECTOR_REG_OFFSET 0x0082
-#define IDE0_SECTOR_REG_OFFSET 0x0083
-#define IDE0_LCYL_REG_OFFSET 0x0084
-#define IDE0_HCYL_REG_OFFSET 0x0085
-#define IDE0_SELECT_REG_OFFSET 0x0086
-#define IDE0_STATUS_REG_OFFSET 0x0087
-#define IDE0_CONTROL_REG_OFFSET 0x0106
-#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */
-
-/* We don't use the 8259. */
-#define NR_8259_INTS 0
-
-#endif /* __ASM_IVMS8_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
deleted file mode 100644
index fe6e88c..0000000
--- a/arch/ppc/platforms/katana.c
+++ /dev/null
@@ -1,902 +0,0 @@
-/*
- * Board setup routines for the Artesyn Katana cPCI boards.
- *
- * Author: Tim Montgomery <timm@artesyncp.com>
- * Maintained by: Mark A. Greer <mgreer@mvista.com>
- *
- * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
- * Based on code done by - Mark A. Greer <mgreer@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-/*
- * Supports the Artesyn 750i, 752i, and 3750. The 752i is virtually identical
- * to the 750i except that it has an mv64460 bridge.
- */
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/console.h>
-#include <linux/initrd.h>
-#include <linux/root_dev.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mv643xx.h>
-#include <linux/platform_device.h>
-#include <asm/io.h>
-#include <asm/unistd.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/smp.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/ppcboot.h>
-#include <asm/mv64x60.h>
-#include <platforms/katana.h>
-#include <asm/machdep.h>
-
-static struct mv64x60_handle bh;
-static katana_id_t katana_id;
-static void __iomem *cpld_base;
-static void __iomem *sram_base;
-static u32 katana_flash_size_0;
-static u32 katana_flash_size_1;
-static u32 katana_bus_frequency;
-static struct pci_controller katana_hose_a;
-
-unsigned char __res[sizeof(bd_t)];
-
-/* PCI Interrupt routing */
-static int __init
-katana_irq_lookup_750i(unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] = {
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- /* IDSEL 4 (PMC 1) */
- { KATANA_PCI_INTB_IRQ_750i, KATANA_PCI_INTC_IRQ_750i,
- KATANA_PCI_INTD_IRQ_750i, KATANA_PCI_INTA_IRQ_750i },
- /* IDSEL 5 (PMC 2) */
- { KATANA_PCI_INTC_IRQ_750i, KATANA_PCI_INTD_IRQ_750i,
- KATANA_PCI_INTA_IRQ_750i, KATANA_PCI_INTB_IRQ_750i },
- /* IDSEL 6 (T8110) */
- {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 },
- /* IDSEL 7 (unused) */
- {0, 0, 0, 0 },
- /* IDSEL 8 (Intel 82544) (752i only but doesn't harm 750i) */
- {KATANA_PCI_INTD_IRQ_750i, 0, 0, 0 },
- };
- const long min_idsel = 4, max_idsel = 8, irqs_per_slot = 4;
-
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static int __init
-katana_irq_lookup_3750(unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] = {
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- { KATANA_PCI_INTA_IRQ_3750, 0, 0, 0 }, /* IDSEL 3 (BCM5691) */
- { KATANA_PCI_INTB_IRQ_3750, 0, 0, 0 }, /* IDSEL 4 (MV64360 #2)*/
- { KATANA_PCI_INTC_IRQ_3750, 0, 0, 0 }, /* IDSEL 5 (MV64360 #3)*/
- };
- const long min_idsel = 3, max_idsel = 5, irqs_per_slot = 4;
-
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static int __init
-katana_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- switch (katana_id) {
- case KATANA_ID_750I:
- case KATANA_ID_752I:
- return katana_irq_lookup_750i(idsel, pin);
-
- case KATANA_ID_3750:
- return katana_irq_lookup_3750(idsel, pin);
-
- default:
- printk(KERN_ERR "Bogus board ID\n");
- return 0;
- }
-}
-
-/* Board info retrieval routines */
-void __init
-katana_get_board_id(void)
-{
- switch (in_8(cpld_base + KATANA_CPLD_PRODUCT_ID)) {
- case KATANA_PRODUCT_ID_3750:
- katana_id = KATANA_ID_3750;
- break;
-
- case KATANA_PRODUCT_ID_750i:
- katana_id = KATANA_ID_750I;
- break;
-
- case KATANA_PRODUCT_ID_752i:
- katana_id = KATANA_ID_752I;
- break;
-
- default:
- printk(KERN_ERR "Unsupported board\n");
- }
-}
-
-int __init
-katana_get_proc_num(void)
-{
- u16 val;
- u8 save_exclude;
- static int proc = -1;
- static u8 first_time = 1;
-
- if (first_time) {
- if (katana_id != KATANA_ID_3750)
- proc = 0;
- else {
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
-
- early_read_config_word(bh.hose_b, 0,
- PCI_DEVFN(0,0), PCI_DEVICE_ID, &val);
-
- mv64x60_pci_exclude_bridge = save_exclude;
-
- switch(val) {
- case PCI_DEVICE_ID_KATANA_3750_PROC0:
- proc = 0;
- break;
-
- case PCI_DEVICE_ID_KATANA_3750_PROC1:
- proc = 1;
- break;
-
- case PCI_DEVICE_ID_KATANA_3750_PROC2:
- proc = 2;
- break;
-
- default:
- printk(KERN_ERR "Bogus Device ID\n");
- }
- }
-
- first_time = 0;
- }
-
- return proc;
-}
-
-static inline int
-katana_is_monarch(void)
-{
- return in_8(cpld_base + KATANA_CPLD_BD_CFG_3) &
- KATANA_CPLD_BD_CFG_3_MONARCH;
-}
-
-static void __init
-katana_setup_bridge(void)
-{
- struct pci_controller hose;
- struct mv64x60_setup_info si;
- void __iomem *vaddr;
- int i;
- u32 v;
- u16 val, type;
- u8 save_exclude;
-
- /*
- * Some versions of the Katana firmware mistakenly change the vendor
- * & device id fields in the bridge's pci device (visible via pci
- * config accesses). This breaks mv64x60_init() because those values
- * are used to identify the type of bridge that's there. Artesyn
- * claims that the subsystem vendor/device id's will have the correct
- * Marvell values so this code puts back the correct values from there.
- */
- memset(&hose, 0, sizeof(hose));
- vaddr = ioremap(CONFIG_MV64X60_NEW_BASE, MV64x60_INTERNAL_SPACE_SIZE);
- setup_indirect_pci_nomap(&hose, vaddr + MV64x60_PCI0_CONFIG_ADDR,
- vaddr + MV64x60_PCI0_CONFIG_DATA);
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
-
- early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID, &val);
-
- if (val != PCI_VENDOR_ID_MARVELL) {
- early_read_config_word(&hose, 0, PCI_DEVFN(0, 0),
- PCI_SUBSYSTEM_VENDOR_ID, &val);
- early_write_config_word(&hose, 0, PCI_DEVFN(0, 0),
- PCI_VENDOR_ID, val);
- early_read_config_word(&hose, 0, PCI_DEVFN(0, 0),
- PCI_SUBSYSTEM_ID, &val);
- early_write_config_word(&hose, 0, PCI_DEVFN(0, 0),
- PCI_DEVICE_ID, val);
- }
-
- /*
- * While we're in here, set the hotswap register correctly.
- * Turn off blue LED; mask ENUM#, clear insertion & extraction bits.
- */
- early_read_config_dword(&hose, 0, PCI_DEVFN(0, 0),
- MV64360_PCICFG_CPCI_HOTSWAP, &v);
- v &= ~(1<<19);
- v |= ((1<<17) | (1<<22) | (1<<23));
- early_write_config_dword(&hose, 0, PCI_DEVFN(0, 0),
- MV64360_PCICFG_CPCI_HOTSWAP, v);
-
- /* While we're at it, grab the bridge type for later */
- early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_DEVICE_ID, &type);
-
- mv64x60_pci_exclude_bridge = save_exclude;
- iounmap(vaddr);
-
- memset(&si, 0, sizeof(si));
-
- si.phys_reg_base = CONFIG_MV64X60_NEW_BASE;
-
- si.pci_1.enable_bus = 1;
- si.pci_1.pci_io.cpu_base = KATANA_PCI1_IO_START_PROC_ADDR;
- si.pci_1.pci_io.pci_base_hi = 0;
- si.pci_1.pci_io.pci_base_lo = KATANA_PCI1_IO_START_PCI_ADDR;
- si.pci_1.pci_io.size = KATANA_PCI1_IO_SIZE;
- si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_mem[0].cpu_base = KATANA_PCI1_MEM_START_PROC_ADDR;
- si.pci_1.pci_mem[0].pci_base_hi = KATANA_PCI1_MEM_START_PCI_HI_ADDR;
- si.pci_1.pci_mem[0].pci_base_lo = KATANA_PCI1_MEM_START_PCI_LO_ADDR;
- si.pci_1.pci_mem[0].size = KATANA_PCI1_MEM_SIZE;
- si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_cmd_bits = 0;
- si.pci_1.latency_timer = 0x80;
-
- for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) {
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE;
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE;
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE;
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_NONE |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-#else
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB;
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB;
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB;
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_WB |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
- ((type == PCI_DEVICE_ID_MARVELL_MV64360) ?
- MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES :
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES);
-#endif
- }
-
- /* Lookup PCI host bridges */
- if (mv64x60_init(&bh, &si))
- printk(KERN_WARNING "Bridge initialization failed.\n");
-
- pci_dram_offset = 0; /* sys mem at same addr on PCI & cpu bus */
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = katana_map_irq;
- ppc_md.pci_exclude_device = mv64x60_pci_exclude_device;
-
- mv64x60_set_bus(&bh, 1, 0);
- bh.hose_b->first_busno = 0;
- bh.hose_b->last_busno = 0xff;
-
- /*
- * Need to access hotswap reg which is in the pci config area of the
- * bridge's hose 0. Note that pcibios_alloc_controller() can't be used
- * to alloc hose_a b/c that would make hose 0 known to the generic
- * pci code which we don't want.
- */
- bh.hose_a = &katana_hose_a;
- setup_indirect_pci_nomap(bh.hose_a,
- bh.v_base + MV64x60_PCI0_CONFIG_ADDR,
- bh.v_base + MV64x60_PCI0_CONFIG_DATA);
-}
-
-/* Bridge & platform setup routines */
-void __init
-katana_intr_setup(void)
-{
- if (bh.type == MV64x60_TYPE_MV64460) /* As per instns from Marvell */
- mv64x60_clr_bits(&bh, MV64x60_CPU_MASTER_CNTL, 1 << 15);
-
- /* MPP 8, 9, and 10 */
- mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0xfff);
-
- /* MPP 14 */
- if ((katana_id == KATANA_ID_750I) || (katana_id == KATANA_ID_752I))
- mv64x60_clr_bits(&bh, MV64x60_MPP_CNTL_1, 0x0f000000);
-
- /*
- * Define GPP 8,9,and 10 interrupt polarity as active low
- * input signal and level triggered
- */
- mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, 0x700);
- mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, 0x700);
-
- if ((katana_id == KATANA_ID_750I) || (katana_id == KATANA_ID_752I)) {
- mv64x60_set_bits(&bh, MV64x60_GPP_LEVEL_CNTL, (1<<14));
- mv64x60_clr_bits(&bh, MV64x60_GPP_IO_CNTL, (1<<14));
- }
-
- /* Config GPP intr ctlr to respond to level trigger */
- mv64x60_set_bits(&bh, MV64x60_COMM_ARBITER_CNTL, (1<<10));
-
- if (bh.type == MV64x60_TYPE_MV64360) {
- /* Erratum FEr PCI-#9 */
- mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD,
- (1<<4) | (1<<5) | (1<<6) | (1<<7));
- mv64x60_set_bits(&bh, MV64x60_PCI1_CMD, (1<<8) | (1<<9));
- } else {
- mv64x60_clr_bits(&bh, MV64x60_PCI1_CMD, (1<<6) | (1<<7));
- mv64x60_set_bits(&bh, MV64x60_PCI1_CMD,
- (1<<4) | (1<<5) | (1<<8) | (1<<9));
- }
-
- /*
- * Dismiss and then enable interrupt on GPP interrupt cause
- * for CPU #0
- */
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~0x700);
- mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, 0x700);
-
- if ((katana_id == KATANA_ID_750I) || (katana_id == KATANA_ID_752I)) {
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~(1<<14));
- mv64x60_set_bits(&bh, MV64x60_GPP_INTR_MASK, (1<<14));
- }
-
- /*
- * Dismiss and then enable interrupt on CPU #0 high cause reg
- * BIT25 summarizes GPP interrupts 8-15
- */
- mv64x60_set_bits(&bh, MV64360_IC_CPU0_INTR_MASK_HI, (1<<25));
-}
-
-void __init
-katana_setup_peripherals(void)
-{
- u32 base;
-
- /* Set up windows for boot CS, soldered & socketed flash, and CPLD */
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
- KATANA_BOOT_WINDOW_BASE, KATANA_BOOT_WINDOW_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
-
- /* Assume firmware set up window sizes correctly for dev 0 & 1 */
- mv64x60_get_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN, &base,
- &katana_flash_size_0);
-
- if (katana_flash_size_0 > 0) {
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_0_WIN,
- KATANA_SOLDERED_FLASH_BASE, katana_flash_size_0, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_0_WIN);
- }
-
- mv64x60_get_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN, &base,
- &katana_flash_size_1);
-
- if (katana_flash_size_1 > 0) {
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_1_WIN,
- (KATANA_SOLDERED_FLASH_BASE + katana_flash_size_0),
- katana_flash_size_1, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN);
- }
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN,
- KATANA_SOCKET_BASE, KATANA_SOCKETED_FLASH_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN,
- KATANA_CPLD_BASE, KATANA_CPLD_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN);
- cpld_base = ioremap(KATANA_CPLD_BASE, KATANA_CPLD_SIZE);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
- KATANA_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
- sram_base = ioremap(KATANA_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE);
-
- /* Set up Enet->SRAM window */
- mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN,
- KATANA_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0x2);
- bh.ci->enable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN);
-
- /* Give enet r/w access to memory region */
- mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_0, (0x3 << (4 << 1)));
- mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_1, (0x3 << (4 << 1)));
- mv64x60_set_bits(&bh, MV64360_ENET2MEM_ACC_PROT_2, (0x3 << (4 << 1)));
-
- mv64x60_clr_bits(&bh, MV64x60_PCI1_PCI_DECODE_CNTL, (1 << 3));
- mv64x60_clr_bits(&bh, MV64x60_TIMR_CNTR_0_3_CNTL,
- ((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24)));
-
- /* Must wait until window set up before retrieving board id */
- katana_get_board_id();
-
- /* Enumerate pci bus (must know board id before getting proc number) */
- if (katana_get_proc_num() == 0)
- bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b, 0);
-
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x00160000);
-#else
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, 0x001600b2);
-#endif
-
- /*
- * Setting the SRAM to 0. Note that this generates parity errors on
- * internal data path in SRAM since it's first time accessing it
- * while after reset it's not configured.
- */
- memset(sram_base, 0, MV64360_SRAM_SIZE);
-
- /* Only processor zero [on 3750] is an PCI interrupt controller */
- if (katana_get_proc_num() == 0)
- katana_intr_setup();
-}
-
-static void __init
-katana_enable_ipmi(void)
-{
- u8 reset_out;
-
- /* Enable access to IPMI ctlr by clearing IPMI PORTSEL bit in CPLD */
- reset_out = in_8(cpld_base + KATANA_CPLD_RESET_OUT);
- reset_out &= ~KATANA_CPLD_RESET_OUT_PORTSEL;
- out_8(cpld_base + KATANA_CPLD_RESET_OUT, reset_out);
-}
-
-static void __init
-katana_setup_arch(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("katana_setup_arch: enter", 0);
-
- set_tb(0, 0);
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- /*
- * Set up the L2CR register.
- *
- * 750FX has only L2E, L2PE (bits 2-8 are reserved)
- * DD2.0 has bug that requires the L2 to be in WRT mode
- * avoid dirty data in cache
- */
- if (PVR_REV(mfspr(SPRN_PVR)) == 0x0200) {
- printk(KERN_INFO "DD2.0 detected. Setting L2 cache"
- "to Writethrough mode\n");
- _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2WT);
- } else
- _set_L2CR(L2CR_L2E | L2CR_L2PE);
-
- if (ppc_md.progress)
- ppc_md.progress("katana_setup_arch: calling setup_bridge", 0);
-
- katana_setup_bridge();
- katana_setup_peripherals();
- katana_enable_ipmi();
-
- katana_bus_frequency = katana_bus_freq(cpld_base);
-
- printk(KERN_INFO "Artesyn Communication Products, LLC - Katana(TM)\n");
- if (ppc_md.progress)
- ppc_md.progress("katana_setup_arch: exit", 0);
-}
-
-void
-katana_fixup_resources(struct pci_dev *dev)
-{
- u16 v16;
-
- pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES>>2);
-
- pci_read_config_word(dev, PCI_COMMAND, &v16);
- v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK;
- pci_write_config_word(dev, PCI_COMMAND, v16);
-}
-
-static const unsigned int cpu_750xx[32] = { /* 750FX & 750GX */
- 0, 0, 2, 2, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,/* 0-15*/
- 16, 17, 18, 19, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38, 40, 0 /*16-31*/
-};
-
-static int
-katana_get_cpu_freq(void)
-{
- unsigned long pll_cfg;
-
- pll_cfg = (mfspr(SPRN_HID1) & 0xf8000000) >> 27;
- return katana_bus_frequency * cpu_750xx[pll_cfg]/2;
-}
-
-/* Platform device data fixup routines. */
-#if defined(CONFIG_SERIAL_MPSC)
-static void __init
-katana_fixup_mpsc_pdata(struct platform_device *pdev)
-{
- struct mpsc_pdata *pdata = (struct mpsc_pdata *)pdev->dev.platform_data;
- bd_t *bdp = (bd_t *)__res;
-
- if (bdp->bi_baudrate)
- pdata->default_baud = bdp->bi_baudrate;
- else
- pdata->default_baud = KATANA_DEFAULT_BAUD;
-
- pdata->max_idle = 40;
- pdata->brg_clk_src = KATANA_MPSC_CLK_SRC;
- /*
- * TCLK (not SysCLk) is routed to BRG, then to the MPSC. On most parts,
- * TCLK == SysCLK but on 64460, they are separate pins.
- * SysCLK can go up to 200 MHz but TCLK can only go up to 133 MHz.
- */
- pdata->brg_clk_freq = min(katana_bus_frequency, MV64x60_TCLK_FREQ_MAX);
-}
-#endif
-
-#if defined(CONFIG_MV643XX_ETH)
-static void __init
-katana_fixup_eth_pdata(struct platform_device *pdev)
-{
- struct mv643xx_eth_platform_data *eth_pd;
- static u16 phy_addr[] = {
- KATANA_ETH0_PHY_ADDR,
- KATANA_ETH1_PHY_ADDR,
- KATANA_ETH2_PHY_ADDR,
- };
-
- eth_pd = pdev->dev.platform_data;
- eth_pd->force_phy_addr = 1;
- eth_pd->phy_addr = phy_addr[pdev->id];
- eth_pd->tx_queue_size = KATANA_ETH_TX_QUEUE_SIZE;
- eth_pd->rx_queue_size = KATANA_ETH_RX_QUEUE_SIZE;
-}
-#endif
-
-#if defined(CONFIG_SYSFS)
-static void __init
-katana_fixup_mv64xxx_pdata(struct platform_device *pdev)
-{
- struct mv64xxx_pdata *pdata = (struct mv64xxx_pdata *)
- pdev->dev.platform_data;
-
- /* Katana supports the mv64xxx hotswap register */
- pdata->hs_reg_valid = 1;
-}
-#endif
-
-static int
-katana_platform_notify(struct device *dev)
-{
- static struct {
- char *bus_id;
- void ((*rtn)(struct platform_device *pdev));
- } dev_map[] = {
-#if defined(CONFIG_SERIAL_MPSC)
- { MPSC_CTLR_NAME ".0", katana_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME ".1", katana_fixup_mpsc_pdata },
-#endif
-#if defined(CONFIG_MV643XX_ETH)
- { MV643XX_ETH_NAME ".0", katana_fixup_eth_pdata },
- { MV643XX_ETH_NAME ".1", katana_fixup_eth_pdata },
- { MV643XX_ETH_NAME ".2", katana_fixup_eth_pdata },
-#endif
-#if defined(CONFIG_SYSFS)
- { MV64XXX_DEV_NAME ".0", katana_fixup_mv64xxx_pdata },
-#endif
- };
- struct platform_device *pdev;
- int i;
-
- if (dev && dev->bus_id)
- for (i=0; i<ARRAY_SIZE(dev_map); i++)
- if (!strncmp(dev->bus_id, dev_map[i].bus_id,
- BUS_ID_SIZE)) {
- pdev = container_of(dev,
- struct platform_device, dev);
- dev_map[i].rtn(pdev);
- }
-
- return 0;
-}
-
-#ifdef CONFIG_MTD_PHYSMAP
-
-#ifndef MB
-#define MB (1 << 20)
-#endif
-
-/*
- * MTD Layout depends on amount of soldered FLASH in system. Sizes in MB.
- *
- * FLASH Amount: 128 64 32 16
- * ------------- --- -- -- --
- * Monitor: 1 1 1 1
- * Primary Kernel: 1.5 1.5 1.5 1.5
- * Primary fs: 30 30 <end> <end>
- * Secondary Kernel: 1.5 1.5 N/A N/A
- * Secondary fs: <end> <end> N/A N/A
- * User: <overlays entire FLASH except for "Monitor" section>
- */
-static int __init
-katana_setup_mtd(void)
-{
- u32 size;
- int ptbl_entries;
- static struct mtd_partition *ptbl;
-
- size = katana_flash_size_0 + katana_flash_size_1;
- if (!size)
- return -ENOMEM;
-
- ptbl_entries = (size >= (64*MB)) ? 6 : 4;
-
- if ((ptbl = kcalloc(ptbl_entries, sizeof(struct mtd_partition),
- GFP_KERNEL)) == NULL) {
- printk(KERN_WARNING "Can't alloc MTD partition table\n");
- return -ENOMEM;
- }
-
- ptbl[0].name = "Monitor";
- ptbl[0].size = KATANA_MTD_MONITOR_SIZE;
- ptbl[1].name = "Primary Kernel";
- ptbl[1].offset = MTDPART_OFS_NXTBLK;
- ptbl[1].size = 0x00180000; /* 1.5 MB */
- ptbl[2].name = "Primary Filesystem";
- ptbl[2].offset = MTDPART_OFS_APPEND;
- ptbl[2].size = MTDPART_SIZ_FULL; /* Correct for 16 & 32 MB */
- ptbl[ptbl_entries-1].name = "User FLASH";
- ptbl[ptbl_entries-1].offset = KATANA_MTD_MONITOR_SIZE;
- ptbl[ptbl_entries-1].size = MTDPART_SIZ_FULL;
-
- if (size >= (64*MB)) {
- ptbl[2].size = 30*MB;
- ptbl[3].name = "Secondary Kernel";
- ptbl[3].offset = MTDPART_OFS_NXTBLK;
- ptbl[3].size = 0x00180000; /* 1.5 MB */
- ptbl[4].name = "Secondary Filesystem";
- ptbl[4].offset = MTDPART_OFS_APPEND;
- ptbl[4].size = MTDPART_SIZ_FULL;
- }
-
- physmap_map.size = size;
- physmap_set_partitions(ptbl, ptbl_entries);
- return 0;
-}
-arch_initcall(katana_setup_mtd);
-#endif
-
-static void
-katana_restart(char *cmd)
-{
- ulong i = 10000000;
-
- /* issue hard reset to the reset command register */
- out_8(cpld_base + KATANA_CPLD_RST_CMD, KATANA_CPLD_RST_CMD_HR);
-
- while (i-- > 0) ;
- panic("restart failed\n");
-}
-
-static void
-katana_halt(void)
-{
- u8 v;
-
- /* Turn on blue LED to indicate its okay to remove */
- if (katana_id == KATANA_ID_750I) {
- u32 v;
- u8 save_exclude;
-
- /* Set LOO bit in cPCI HotSwap reg of hose 0 to turn on LED. */
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- early_read_config_dword(bh.hose_a, 0, PCI_DEVFN(0, 0),
- MV64360_PCICFG_CPCI_HOTSWAP, &v);
- v &= 0xff;
- v |= (1 << 19);
- early_write_config_dword(bh.hose_a, 0, PCI_DEVFN(0, 0),
- MV64360_PCICFG_CPCI_HOTSWAP, v);
- mv64x60_pci_exclude_bridge = save_exclude;
- } else if (katana_id == KATANA_ID_752I) {
- v = in_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF);
- v |= HSL_PLD_HOT_SWAP_LED_BIT;
- out_8(cpld_base + HSL_PLD_BASE + HSL_PLD_HOT_SWAP_OFF, v);
- }
-
- while (1) ;
- /* NOTREACHED */
-}
-
-static void
-katana_power_off(void)
-{
- katana_halt();
- /* NOTREACHED */
-}
-
-static int
-katana_show_cpuinfo(struct seq_file *m)
-{
- char *s;
-
- seq_printf(m, "cpu freq\t: %dMHz\n",
- (katana_get_cpu_freq() + 500000) / 1000000);
- seq_printf(m, "bus freq\t: %ldMHz\n",
- ((long)katana_bus_frequency + 500000) / 1000000);
- seq_printf(m, "vendor\t\t: Artesyn Communication Products, LLC\n");
-
- seq_printf(m, "board\t\t: ");
- switch (katana_id) {
- case KATANA_ID_3750:
- seq_printf(m, "Katana 3750");
- break;
-
- case KATANA_ID_750I:
- seq_printf(m, "Katana 750i");
- break;
-
- case KATANA_ID_752I:
- seq_printf(m, "Katana 752i");
- break;
-
- default:
- seq_printf(m, "Unknown");
- break;
- }
- seq_printf(m, " (product id: 0x%x)\n",
- in_8(cpld_base + KATANA_CPLD_PRODUCT_ID));
-
- seq_printf(m, "pci mode\t: %sMonarch\n",
- katana_is_monarch()? "" : "Non-");
- seq_printf(m, "hardware rev\t: 0x%x\n",
- in_8(cpld_base+KATANA_CPLD_HARDWARE_VER));
- seq_printf(m, "pld rev\t\t: 0x%x\n",
- in_8(cpld_base + KATANA_CPLD_PLD_VER));
-
- switch(bh.type) {
- case MV64x60_TYPE_GT64260A:
- s = "gt64260a";
- break;
- case MV64x60_TYPE_GT64260B:
- s = "gt64260b";
- break;
- case MV64x60_TYPE_MV64360:
- s = "mv64360";
- break;
- case MV64x60_TYPE_MV64460:
- s = "mv64460";
- break;
- default:
- s = "Unknown";
- }
- seq_printf(m, "bridge type\t: %s\n", s);
- seq_printf(m, "bridge rev\t: 0x%x\n", bh.rev);
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- seq_printf(m, "coherency\t: %s\n", "off");
-#else
- seq_printf(m, "coherency\t: %s\n", "on");
-#endif
-
- return 0;
-}
-
-static void __init
-katana_calibrate_decr(void)
-{
- u32 freq;
-
- freq = katana_bus_frequency / 4;
-
- printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n",
- (long)freq / 1000000, (long)freq % 1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-}
-
-/*
- * The katana supports both uImage and zImage. If uImage, get the mem size
- * from the bd info. If zImage, the bootwrapper adds a BI_MEMSIZE entry in
- * the bi_rec data which is sucked out and put into boot_mem_size by
- * parse_bootinfo(). MMU_init() will then use the boot_mem_size for the mem
- * size and not call this routine. The only way this will fail is when a uImage
- * is used but the fw doesn't pass in a valid bi_memsize. This should never
- * happen, though.
- */
-unsigned long __init
-katana_find_end_of_memory(void)
-{
- bd_t *bdp = (bd_t *)__res;
- return bdp->bi_memsize;
-}
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
-static void __init
-katana_map_io(void)
-{
- io_block_mapping(0xf8100000, 0xf8100000, 0x00020000, _PAGE_IO);
-}
-#endif
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer)
- * are non-zero, then we should use the board info from the bd_t
- * structure and the cmdline pointed to by r6 instead of the
- * information from birecs, if any. Otherwise, use the information
- * from birecs as discovered by the preceding call to
- * parse_bootinfo(). This rule should work with both PPCBoot, which
- * uses a bd_t board info structure, and the kernel boot wrapper,
- * which uses birecs.
- */
- if (r3 && r6) {
- /* copy board info structure */
- memcpy((void *)__res, (void *)(r3+KERNELBASE), sizeof(bd_t));
- /* copy command line */
- *(char *)(r7+KERNELBASE) = 0;
- strcpy(cmd_line, (char *)(r6+KERNELBASE));
- }
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* take care of initrd if we have one */
- if (r4) {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- isa_mem_base = 0;
-
- ppc_md.setup_arch = katana_setup_arch;
- ppc_md.pcibios_fixup_resources = katana_fixup_resources;
- ppc_md.show_cpuinfo = katana_show_cpuinfo;
- ppc_md.init_IRQ = mv64360_init_irq;
- ppc_md.get_irq = mv64360_get_irq;
- ppc_md.restart = katana_restart;
- ppc_md.power_off = katana_power_off;
- ppc_md.halt = katana_halt;
- ppc_md.find_end_of_memory = katana_find_end_of_memory;
- ppc_md.calibrate_decr = katana_calibrate_decr;
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE)
- ppc_md.setup_io_mappings = katana_map_io;
- ppc_md.progress = mv64x60_mpsc_progress;
- mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE);
-#endif
-
-#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
- platform_notify = katana_platform_notify;
-#endif
-}
diff --git a/arch/ppc/platforms/katana.h b/arch/ppc/platforms/katana.h
deleted file mode 100644
index 0a9b036..0000000
--- a/arch/ppc/platforms/katana.h
+++ /dev/null
@@ -1,253 +0,0 @@
-/*
- * Definitions for Artesyn Katana750i/3750 board.
- *
- * Author: Tim Montgomery <timm@artesyncp.com>
- * Maintained by: Mark A. Greer <mgreer@mvista.com>
- *
- * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
- * Based on code done by Mark A. Greer <mgreer@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/*
- * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to
- * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
- * We'll only use one PCI MEM window on each PCI bus.
- *
- * This is the CPU physical memory map (windows must be at least 64 KB and start
- * on a boundary that is a multiple of the window size):
- *
- * 0xff800000-0xffffffff - Boot window
- * 0xf8400000-0xf843ffff - Internal SRAM
- * 0xf8200000-0xf83fffff - CPLD
- * 0xf8100000-0xf810ffff - MV64360 Registers (CONFIG_MV64X60_NEW_BASE)
- * 0xf8000000-0xf80fffff - Socketed FLASH
- * 0xe0000000-0xefffffff - Soldered FLASH
- * 0xc0000000-0xc3ffffff - PCI I/O (second hose)
- * 0x80000000-0xbfffffff - PCI MEM (second hose)
- */
-
-#ifndef __PPC_PLATFORMS_KATANA_H
-#define __PPC_PLATFORMS_KATANA_H
-
-/* CPU Physical Memory Map setup. */
-#define KATANA_BOOT_WINDOW_BASE 0xff800000
-#define KATANA_BOOT_WINDOW_SIZE 0x00800000 /* 8 MB */
-#define KATANA_INTERNAL_SRAM_BASE 0xf8400000
-#define KATANA_CPLD_BASE 0xf8200000
-#define KATANA_CPLD_SIZE 0x00200000 /* 2 MB */
-#define KATANA_SOCKET_BASE 0xf8000000
-#define KATANA_SOCKETED_FLASH_SIZE 0x00100000 /* 1 MB */
-#define KATANA_SOLDERED_FLASH_BASE 0xe0000000
-#define KATANA_SOLDERED_FLASH_SIZE 0x10000000 /* 256 MB */
-
-#define KATANA_PCI1_MEM_START_PROC_ADDR 0x80000000
-#define KATANA_PCI1_MEM_START_PCI_HI_ADDR 0x00000000
-#define KATANA_PCI1_MEM_START_PCI_LO_ADDR 0x80000000
-#define KATANA_PCI1_MEM_SIZE 0x40000000 /* 1 GB */
-#define KATANA_PCI1_IO_START_PROC_ADDR 0xc0000000
-#define KATANA_PCI1_IO_START_PCI_ADDR 0x00000000
-#define KATANA_PCI1_IO_SIZE 0x04000000 /* 64 MB */
-
-/* Board-specific IRQ info */
-#define KATANA_PCI_INTA_IRQ_3750 (64+8)
-#define KATANA_PCI_INTB_IRQ_3750 (64+9)
-#define KATANA_PCI_INTC_IRQ_3750 (64+10)
-
-#define KATANA_PCI_INTA_IRQ_750i (64+8)
-#define KATANA_PCI_INTB_IRQ_750i (64+9)
-#define KATANA_PCI_INTC_IRQ_750i (64+10)
-#define KATANA_PCI_INTD_IRQ_750i (64+14)
-
-#define KATANA_CPLD_RST_EVENT 0x00000000
-#define KATANA_CPLD_RST_CMD 0x00001000
-#define KATANA_CPLD_PCI_ERR_INT_EN 0x00002000
-#define KATANA_CPLD_PCI_ERR_INT_PEND 0x00003000
-#define KATANA_CPLD_PRODUCT_ID 0x00004000
-#define KATANA_CPLD_EREADY 0x00005000
-
-#define KATANA_CPLD_HARDWARE_VER 0x00007000
-#define KATANA_CPLD_PLD_VER 0x00008000
-#define KATANA_CPLD_BD_CFG_0 0x00009000
-#define KATANA_CPLD_BD_CFG_1 0x0000a000
-#define KATANA_CPLD_BD_CFG_3 0x0000c000
-#define KATANA_CPLD_LED 0x0000d000
-#define KATANA_CPLD_RESET_OUT 0x0000e000
-
-#define KATANA_CPLD_RST_EVENT_INITACT 0x80
-#define KATANA_CPLD_RST_EVENT_SW 0x40
-#define KATANA_CPLD_RST_EVENT_WD 0x20
-#define KATANA_CPLD_RST_EVENT_COPS 0x10
-#define KATANA_CPLD_RST_EVENT_COPH 0x08
-#define KATANA_CPLD_RST_EVENT_CPCI 0x02
-#define KATANA_CPLD_RST_EVENT_FP 0x01
-
-#define KATANA_CPLD_RST_CMD_SCL 0x80
-#define KATANA_CPLD_RST_CMD_SDA 0x40
-#define KATANA_CPLD_RST_CMD_I2C 0x10
-#define KATANA_CPLD_RST_CMD_FR 0x08
-#define KATANA_CPLD_RST_CMD_SR 0x04
-#define KATANA_CPLD_RST_CMD_HR 0x01
-
-#define KATANA_CPLD_BD_CFG_0_SYSCLK_MASK 0xc0
-#define KATANA_CPLD_BD_CFG_0_SYSCLK_200 0x00
-#define KATANA_CPLD_BD_CFG_0_SYSCLK_166 0x80
-#define KATANA_CPLD_BD_CFG_0_SYSCLK_133 0xc0
-#define KATANA_CPLD_BD_CFG_0_SYSCLK_100 0x40
-
-#define KATANA_CPLD_BD_CFG_1_FL_BANK_MASK 0x03
-#define KATANA_CPLD_BD_CFG_1_FL_BANK_16MB 0x00
-#define KATANA_CPLD_BD_CFG_1_FL_BANK_32MB 0x01
-#define KATANA_CPLD_BD_CFG_1_FL_BANK_64MB 0x02
-#define KATANA_CPLD_BD_CFG_1_FL_BANK_128MB 0x03
-
-#define KATANA_CPLD_BD_CFG_1_FL_NUM_BANKS_MASK 0x04
-#define KATANA_CPLD_BD_CFG_1_FL_NUM_BANKS_ONE 0x00
-#define KATANA_CPLD_BD_CFG_1_FL_NUM_BANKS_TWO 0x04
-
-#define KATANA_CPLD_BD_CFG_3_MONARCH 0x04
-
-#define KATANA_CPLD_RESET_OUT_PORTSEL 0x80
-#define KATANA_CPLD_RESET_OUT_WD 0x20
-#define KATANA_CPLD_RESET_OUT_COPH 0x08
-#define KATANA_CPLD_RESET_OUT_PCI_RST_PCI 0x02
-#define KATANA_CPLD_RESET_OUT_PCI_RST_FP 0x01
-
-#define KATANA_MBOX_RESET_REQUEST 0xC83A
-#define KATANA_MBOX_RESET_ACK 0xE430
-#define KATANA_MBOX_RESET_DONE 0x32E5
-
-#define HSL_PLD_BASE 0x00010000
-#define HSL_PLD_J4SGA_REG_OFF 0
-#define HSL_PLD_J4GA_REG_OFF 1
-#define HSL_PLD_J2GA_REG_OFF 2
-#define HSL_PLD_HOT_SWAP_OFF 6
-#define HSL_PLD_HOT_SWAP_LED_BIT 0x1
-#define GA_MASK 0x1f
-#define HSL_PLD_SIZE 0x1000
-#define K3750_GPP_GEO_ADDR_PINS 0xf8000000
-#define K3750_GPP_GEO_ADDR_SHIFT 27
-
-#define K3750_GPP_EVENT_PROC_0 (1 << 21)
-#define K3750_GPP_EVENT_PROC_1_2 (1 << 2)
-
-#define PCI_VENDOR_ID_ARTESYN 0x1223
-#define PCI_DEVICE_ID_KATANA_3750_PROC0 0x0041
-#define PCI_DEVICE_ID_KATANA_3750_PROC1 0x0042
-#define PCI_DEVICE_ID_KATANA_3750_PROC2 0x0043
-
-#define COPROC_MEM_FUNCTION 0
-#define COPROC_MEM_BAR 0
-#define COPROC_REGS_FUNCTION 0
-#define COPROC_REGS_BAR 4
-#define COPROC_FLASH_FUNCTION 2
-#define COPROC_FLASH_BAR 4
-
-#define KATANA_IPMB_LOCAL_I2C_ADDR 0x08
-
-#define KATANA_DEFAULT_BAUD 9600
-#define KATANA_MPSC_CLK_SRC 8 /* TCLK */
-
-#define KATANA_MTD_MONITOR_SIZE (1 << 20) /* 1 MB */
-
-#define KATANA_ETH0_PHY_ADDR 12
-#define KATANA_ETH1_PHY_ADDR 11
-#define KATANA_ETH2_PHY_ADDR 4
-
-#define KATANA_PRODUCT_ID_3750 0x01
-#define KATANA_PRODUCT_ID_750i 0x02
-#define KATANA_PRODUCT_ID_752i 0x04
-
-#define KATANA_ETH_TX_QUEUE_SIZE 800
-#define KATANA_ETH_RX_QUEUE_SIZE 400
-
-#define KATANA_ETH_PORT_CONFIG_VALUE \
- ETH_UNICAST_NORMAL_MODE | \
- ETH_DEFAULT_RX_QUEUE_0 | \
- ETH_DEFAULT_RX_ARP_QUEUE_0 | \
- ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \
- ETH_RECEIVE_BC_IF_IP | \
- ETH_RECEIVE_BC_IF_ARP | \
- ETH_CAPTURE_TCP_FRAMES_DIS | \
- ETH_CAPTURE_UDP_FRAMES_DIS | \
- ETH_DEFAULT_RX_TCP_QUEUE_0 | \
- ETH_DEFAULT_RX_UDP_QUEUE_0 | \
- ETH_DEFAULT_RX_BPDU_QUEUE_0
-
-#define KATANA_ETH_PORT_CONFIG_EXTEND_VALUE \
- ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \
- ETH_PARTITION_DISABLE
-
-#define GT_ETH_IPG_INT_RX(value) \
- ((value & 0x3fff) << 8)
-
-#define KATANA_ETH_PORT_SDMA_CONFIG_VALUE \
- ETH_RX_BURST_SIZE_4_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- ETH_TX_BURST_SIZE_4_64BIT
-
-#define KATANA_ETH_PORT_SERIAL_CONTROL_VALUE \
- ETH_FORCE_LINK_PASS | \
- ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \
- ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \
- ETH_ADV_SYMMETRIC_FLOW_CTRL | \
- ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
- ETH_FORCE_BP_MODE_NO_JAM | \
- BIT9 | \
- ETH_DO_NOT_FORCE_LINK_FAIL | \
- ETH_RETRANSMIT_16_ATTEMPTS | \
- ETH_ENABLE_AUTO_NEG_SPEED_GMII | \
- ETH_DTE_ADV_0 | \
- ETH_DISABLE_AUTO_NEG_BYPASS | \
- ETH_AUTO_NEG_NO_CHANGE | \
- ETH_MAX_RX_PACKET_9700BYTE | \
- ETH_CLR_EXT_LOOPBACK | \
- ETH_SET_FULL_DUPLEX_MODE | \
- ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX
-
-#ifndef __ASSEMBLY__
-
-typedef enum {
- KATANA_ID_3750,
- KATANA_ID_750I,
- KATANA_ID_752I,
- KATANA_ID_MAX
-} katana_id_t;
-
-#endif
-
-static inline u32
-katana_bus_freq(void __iomem *cpld_base)
-{
- u8 bd_cfg_0;
-
- bd_cfg_0 = in_8(cpld_base + KATANA_CPLD_BD_CFG_0);
-
- switch (bd_cfg_0 & KATANA_CPLD_BD_CFG_0_SYSCLK_MASK) {
- case KATANA_CPLD_BD_CFG_0_SYSCLK_200:
- return 200000000;
- break;
-
- case KATANA_CPLD_BD_CFG_0_SYSCLK_166:
- return 166666666;
- break;
-
- case KATANA_CPLD_BD_CFG_0_SYSCLK_133:
- return 133333333;
- break;
-
- case KATANA_CPLD_BD_CFG_0_SYSCLK_100:
- return 100000000;
- break;
-
- default:
- return 133333333;
- break;
- }
-}
-
-#endif /* __PPC_PLATFORMS_KATANA_H */
diff --git a/arch/ppc/platforms/lantec.h b/arch/ppc/platforms/lantec.h
deleted file mode 100644
index 5e5eb6d..0000000
--- a/arch/ppc/platforms/lantec.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * LANTEC board specific definitions
- *
- * Copyright (c) 2001 Wolfgang Denk (wd@denx.de)
- */
-
-#ifndef __MACH_LANTEC_H
-#define __MACH_LANTEC_H
-
-
-#include <asm/ppcboot.h>
-
-#define IMAP_ADDR 0xFFF00000 /* physical base address of IMMR area */
-#define IMAP_SIZE (64 * 1024) /* mapped size of IMMR area */
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif /* __MACH_LANTEC_H */
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
deleted file mode 100644
index b9e9db6..0000000
--- a/arch/ppc/platforms/lite5200.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/*
- * Platform support file for the Freescale LITE5200 based on MPC52xx.
- * A maximum of this file should be moved to syslib/mpc52xx_?????
- * so that new platform based on MPC52xx need a minimal platform file
- * ( avoid code duplication )
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Based on the 2.4 code written by Kent Borg,
- * Dale Farnsworth <dale.farnsworth@mvista.com> and
- * Wolfgang Denk <wd@denx.de>
- *
- * Copyright 2004-2005 Sylvain Munaut <tnt@246tNt.com>
- * Copyright 2003 Motorola Inc.
- * Copyright 2003 MontaVista Software Inc.
- * Copyright 2003 DENX Software Engineering (wd@denx.de)
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/initrd.h>
-#include <linux/seq_file.h>
-#include <linux/kdev_t.h>
-#include <linux/root_dev.h>
-#include <linux/console.h>
-#include <linux/module.h>
-
-#include <asm/bootinfo.h>
-#include <asm/io.h>
-#include <asm/mpc52xx.h>
-#include <asm/ppc_sys.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-
-
-extern int powersave_nap;
-
-/* Board data given by U-Boot */
-bd_t __res;
-EXPORT_SYMBOL(__res); /* For modules */
-
-
-/* ======================================================================== */
-/* Platform specific code */
-/* ======================================================================== */
-
-/* Supported PSC function in "preference" order */
-struct mpc52xx_psc_func mpc52xx_psc_functions[] = {
- { .id = 0,
- .func = "uart",
- },
- { .id = -1, /* End entry */
- .func = NULL,
- }
- };
-
-
-static int
-lite5200_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "machine\t\t: Freescale LITE5200\n");
- return 0;
-}
-
-#ifdef CONFIG_PCI
-#ifdef CONFIG_LITE5200B
-static int
-lite5200_map_irq(struct pci_dev *dev, unsigned char idsel,
- unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {MPC52xx_IRQ0, MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3},
- {MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3, MPC52xx_IRQ0},
- };
-
- const long min_idsel = 24, max_idsel = 25, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-#else /* Original Lite */
-static int
-lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;
-}
-#endif
-#endif
-
-static void __init
-lite5200_setup_cpu(void)
-{
- struct mpc52xx_gpio __iomem *gpio;
- struct mpc52xx_intr __iomem *intr;
-
- u32 port_config;
- u32 intr_ctrl;
-
- /* Map zones */
- gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
- intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
-
- if (!gpio || !intr) {
- printk(KERN_ERR __FILE__ ": "
- "Error while mapping GPIO/INTR during "
- "lite5200_setup_cpu\n");
- goto unmap_regs;
- }
-
- /* Get port mux config */
- port_config = in_be32(&gpio->port_config);
-
- /* 48Mhz internal, pin is GPIO */
- port_config &= ~0x00800000;
-
- /* USB port */
- port_config &= ~0x00007000; /* Differential mode - USB1 only */
- port_config |= 0x00001000;
-
- /* ATA CS is on csb_4/5 */
- port_config &= ~0x03000000;
- port_config |= 0x01000000;
-
- /* Commit port config */
- out_be32(&gpio->port_config, port_config);
-
- /* IRQ[0-3] setup */
- intr_ctrl = in_be32(&intr->ctrl);
- intr_ctrl &= ~0x00ff0000;
-#ifdef CONFIG_LITE5200B
- /* IRQ[0-3] Level Active Low */
- intr_ctrl |= 0x00ff0000;
-#else
- /* IRQ0 Level Active Low
- * IRQ[1-3] Level Active High */
- intr_ctrl |= 0x00c00000;
-#endif
- out_be32(&intr->ctrl, intr_ctrl);
-
- /* Unmap reg zone */
-unmap_regs:
- if (gpio) iounmap(gpio);
- if (intr) iounmap(intr);
-}
-
-static void __init
-lite5200_setup_arch(void)
-{
- /* CPU & Port mux setup */
- mpc52xx_setup_cpu(); /* Generic */
- lite5200_setup_cpu(); /* Platform specific */
-
-#ifdef CONFIG_PCI
- /* PCI Bridge setup */
- mpc52xx_find_bridges();
-#endif
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- /* Generic MPC52xx platform initialization */
- /* TODO Create one and move a max of stuff in it.
- Put this init in the syslib */
-
- struct bi_record *bootinfo = find_bootinfo();
-
- if (bootinfo)
- parse_bootinfo(bootinfo);
- else {
- /* Load the bd_t board info structure */
- if (r3)
- memcpy((void*)&__res,(void*)(r3+KERNELBASE),
- sizeof(bd_t));
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* Load the initrd */
- if (r4) {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif
-
- /* Load the command line */
- if (r6) {
- *(char *)(r7+KERNELBASE) = 0;
- strcpy(cmd_line, (char *)(r6+KERNELBASE));
- }
- }
-
- /* PPC Sys identification */
- identify_ppc_sys_by_id(mfspr(SPRN_SVR));
-
- /* BAT setup */
- mpc52xx_set_bat();
-
- /* No ISA bus by default */
-#ifdef CONFIG_PCI
- isa_io_base = 0;
- isa_mem_base = 0;
-#endif
-
- /* Powersave */
- /* This is provided as an example on how to do it. But you
- need to be aware that NAP disable bus snoop and that may
- be required for some devices to work properly, like USB ... */
- /* powersave_nap = 1; */
-
-
- /* Setup the ppc_md struct */
- ppc_md.setup_arch = lite5200_setup_arch;
- ppc_md.show_cpuinfo = lite5200_show_cpuinfo;
- ppc_md.show_percpuinfo = NULL;
- ppc_md.init_IRQ = mpc52xx_init_irq;
- ppc_md.get_irq = mpc52xx_get_irq;
-
-#ifdef CONFIG_PCI
- ppc_md.pci_map_irq = lite5200_map_irq;
-#endif
-
- ppc_md.find_end_of_memory = mpc52xx_find_end_of_memory;
- ppc_md.setup_io_mappings = mpc52xx_map_io;
-
- ppc_md.restart = mpc52xx_restart;
- ppc_md.power_off = mpc52xx_power_off;
- ppc_md.halt = mpc52xx_halt;
-
- /* No time keeper on the LITE5200 */
- ppc_md.time_init = NULL;
- ppc_md.get_rtc_time = NULL;
- ppc_md.set_rtc_time = NULL;
-
- ppc_md.calibrate_decr = mpc52xx_calibrate_decr;
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = mpc52xx_progress;
-#endif
-}
-
diff --git a/arch/ppc/platforms/lite5200.h b/arch/ppc/platforms/lite5200.h
deleted file mode 100644
index 852a18e..0000000
--- a/arch/ppc/platforms/lite5200.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Definitions for Freescale LITE5200 : MPC52xx Standard Development
- * Platform board support
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifndef __PLATFORMS_LITE5200_H__
-#define __PLATFORMS_LITE5200_H__
-
-/* Serial port used for low-level debug */
-#define MPC52xx_PF_CONSOLE_PORT 1 /* PSC1 */
-
-
-#endif /* __PLATFORMS_LITE5200_H__ */
diff --git a/arch/ppc/platforms/lopec.c b/arch/ppc/platforms/lopec.c
deleted file mode 100644
index 1e3aa6e..0000000
--- a/arch/ppc/platforms/lopec.c
+++ /dev/null
@@ -1,310 +0,0 @@
-/*
- * Setup routines for the Motorola LoPEC.
- *
- * Author: Dan Cox
- * Maintainer: Tom Rini <trini@kernel.crashing.org>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <linux/delay.h>
-#include <linux/pci_ids.h>
-#include <linux/ioport.h>
-#include <linux/init.h>
-#include <linux/seq_file.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/root_dev.h>
-#include <linux/pci.h>
-
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/io.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/mpc10x.h>
-#include <asm/hw_irq.h>
-#include <asm/prep_nvram.h>
-#include <asm/kgdb.h>
-
-/*
- * Define all of the IRQ senses and polarities. Taken from the
- * LoPEC Programmer's Reference Guide.
- */
-static u_char lopec_openpic_initsenses[16] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 4 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 5 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 6 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 7 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 8 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 9 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 10 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 11 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 12 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 13 */
- (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ 14 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE) /* IRQ 15 */
-};
-
-static inline int __init
-lopec_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- int irq;
- static char pci_irq_table[][4] = {
- {16, 0, 0, 0}, /* ID 11 - Winbond */
- {22, 0, 0, 0}, /* ID 12 - SCSI */
- {0, 0, 0, 0}, /* ID 13 - nothing */
- {17, 0, 0, 0}, /* ID 14 - 82559 Ethernet */
- {27, 0, 0, 0}, /* ID 15 - USB */
- {23, 0, 0, 0}, /* ID 16 - PMC slot 1 */
- {24, 0, 0, 0}, /* ID 17 - PMC slot 2 */
- {25, 0, 0, 0}, /* ID 18 - PCI slot */
- {0, 0, 0, 0}, /* ID 19 - nothing */
- {0, 0, 0, 0}, /* ID 20 - nothing */
- {0, 0, 0, 0}, /* ID 21 - nothing */
- {0, 0, 0, 0}, /* ID 22 - nothing */
- {0, 0, 0, 0}, /* ID 23 - nothing */
- {0, 0, 0, 0}, /* ID 24 - PMC slot 1b */
- {0, 0, 0, 0}, /* ID 25 - nothing */
- {0, 0, 0, 0} /* ID 26 - PMC Slot 2b */
- };
- const long min_idsel = 11, max_idsel = 26, irqs_per_slot = 4;
-
- irq = PCI_IRQ_TABLE_LOOKUP;
- if (!irq)
- return 0;
-
- return irq;
-}
-
-static void __init
-lopec_setup_winbond_83553(struct pci_controller *hose)
-{
- int devfn;
-
- devfn = PCI_DEVFN(11,0);
-
- /* IDE interrupt routing (primary 14, secondary 15) */
- early_write_config_byte(hose, 0, devfn, 0x43, 0xef);
- /* PCI interrupt routing */
- early_write_config_word(hose, 0, devfn, 0x44, 0x0000);
-
- /* ISA-PCI address decoder */
- early_write_config_byte(hose, 0, devfn, 0x48, 0xf0);
-
- /* RTC, kb, not used in PPC */
- early_write_config_byte(hose, 0, devfn, 0x4d, 0x00);
- early_write_config_byte(hose, 0, devfn, 0x4e, 0x04);
- devfn = PCI_DEVFN(11, 1);
- early_write_config_byte(hose, 0, devfn, 0x09, 0x8f);
- early_write_config_dword(hose, 0, devfn, 0x40, 0x00ff0011);
-}
-
-static void __init
-lopec_find_bridges(void)
-{
- struct pci_controller *hose;
-
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- if (mpc10x_bridge_init(hose, MPC10X_MEM_MAP_B, MPC10X_MEM_MAP_B,
- MPC10X_MAPB_EUMB_BASE) == 0) {
-
- hose->mem_resources[0].end = 0xffffffff;
- lopec_setup_winbond_83553(hose);
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = lopec_map_irq;
- }
-}
-
-static int
-lopec_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "machine\t\t: Motorola LoPEC\n");
- return 0;
-}
-
-static void
-lopec_restart(char *cmd)
-{
-#define LOPEC_SYSSTAT1 0xffe00000
- /* force a hard reset, if possible */
- unsigned char reg = *((unsigned char *) LOPEC_SYSSTAT1);
- reg |= 0x80;
- *((unsigned char *) LOPEC_SYSSTAT1) = reg;
-
- local_irq_disable();
- while(1);
-#undef LOPEC_SYSSTAT1
-}
-
-static void
-lopec_halt(void)
-{
- local_irq_disable();
- while(1);
-}
-
-static void
-lopec_power_off(void)
-{
- lopec_halt();
-}
-
-static void __init
-lopec_init_IRQ(void)
-{
- int i;
-
- /*
- * Provide the open_pic code with the correct table of interrupts.
- */
- OpenPIC_InitSenses = lopec_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(lopec_openpic_initsenses);
-
- mpc10x_set_openpic();
-
- /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
- openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
- &i8259_irq);
-
- /*
- * The EPIC allows for a read in the range of 0xFEF00000 ->
- * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
- */
- i8259_init(0xfef00000, 0);
-}
-
-static int __init
-lopec_request_io(void)
-{
- outb(0x00, 0x4d0);
- outb(0xc0, 0x4d1);
-
- request_region(0x00, 0x20, "dma1");
- request_region(0x20, 0x20, "pic1");
- request_region(0x40, 0x20, "timer");
- request_region(0x80, 0x10, "dma page reg");
- request_region(0xa0, 0x20, "pic2");
- request_region(0xc0, 0x20, "dma2");
-
- return 0;
-}
-
-device_initcall(lopec_request_io);
-
-static void __init
-lopec_map_io(void)
-{
- io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
- io_block_mapping(0xb0000000, 0xb0000000, 0x10000000, _PAGE_IO);
-}
-
-/*
- * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
- */
-static __inline__ void
-lopec_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT1U, 0xf8000ffe);
- mtspr(SPRN_DBAT1L, 0xf800002a);
- mb();
-}
-
-TODC_ALLOC();
-
-static void __init
-lopec_setup_arch(void)
-{
-
- TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
- ioremap(0xffe80000, 0x8000), 8);
-
- loops_per_jiffy = 100000000/HZ;
-
- lopec_find_bridges();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#elif defined(CONFIG_ROOT_NFS)
- ROOT_DEV = Root_NFS;
-#elif defined(CONFIG_BLK_DEV_IDEDISK)
- ROOT_DEV = Root_HDA1;
-#else
- ROOT_DEV = Root_SDA1;
-#endif
-
-#ifdef CONFIG_PPCBUG_NVRAM
- /* Read in NVRAM data */
- init_prep_nvram();
-
- /* if no bootargs, look in NVRAM */
- if ( cmd_line[0] == '\0' ) {
- char *bootargs;
- bootargs = prep_nvram_get_var("bootargs");
- if (bootargs != NULL) {
- strcpy(cmd_line, bootargs);
- /* again.. */
- strcpy(boot_command_line, cmd_line);
- }
- }
-#endif
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
- lopec_set_bat();
-
- isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
- isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
- pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
- ISA_DMA_THRESHOLD = 0x00ffffff;
- DMA_MODE_READ = 0x44;
- DMA_MODE_WRITE = 0x48;
- ppc_do_canonicalize_irqs = 1;
-
- ppc_md.setup_arch = lopec_setup_arch;
- ppc_md.show_cpuinfo = lopec_show_cpuinfo;
- ppc_md.init_IRQ = lopec_init_IRQ;
- ppc_md.get_irq = openpic_get_irq;
-
- ppc_md.restart = lopec_restart;
- ppc_md.power_off = lopec_power_off;
- ppc_md.halt = lopec_halt;
-
- ppc_md.setup_io_mappings = lopec_map_io;
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = todc_calibrate_decr;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = gen550_progress;
-#endif
-}
diff --git a/arch/ppc/platforms/lopec.h b/arch/ppc/platforms/lopec.h
deleted file mode 100644
index d597b68..0000000
--- a/arch/ppc/platforms/lopec.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * arch/ppc/platforms/lopec.h
- *
- * Definitions for Motorola LoPEC board.
- *
- * Author: Dan Cox
- * danc@mvista.com (or, alternately, source@mvista.com)
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __H_LOPEC_SERIAL
-#define __H_LOPEC_SERIAL
-
-#define RS_TABLE_SIZE 3
-
-#define BASE_BAUD (1843200 / 16)
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#endif
-
-#define SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, 0xffe10000, 29, STD_COM_FLAGS, \
- iomem_base: (u8 *) 0xffe10000, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, 0xffe11000, 20, STD_COM_FLAGS, \
- iomem_base: (u8 *) 0xffe11000, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, 0xffe12000, 21, STD_COM_FLAGS, \
- iomem_base: (u8 *) 0xffe12000, \
- io_type: SERIAL_IO_MEM }
-
-#endif
diff --git a/arch/ppc/platforms/lwmon.h b/arch/ppc/platforms/lwmon.h
deleted file mode 100644
index e63f3b0..0000000
--- a/arch/ppc/platforms/lwmon.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Liebherr LWMON board specific definitions
- *
- * Copyright (c) 2001 Wolfgang Denk (wd@denx.de)
- */
-
-#ifndef __MACH_LWMON_H
-#define __MACH_LWMON_H
-
-
-#include <asm/ppcboot.h>
-
-#define IMAP_ADDR 0xFFF00000 /* physical base address of IMMR area */
-#define IMAP_SIZE (64 * 1024) /* mapped size of IMMR area */
-
-/*-----------------------------------------------------------------------
- * PCMCIA stuff
- *-----------------------------------------------------------------------
- *
- */
-#define PCMCIA_MEM_SIZE ( 64 << 20 )
-
-#define MAX_HWIFS 1 /* overwrite default in include/asm-ppc/ide.h */
-
-/*
- * Definitions for IDE0 Interface
- */
-#define IDE0_BASE_OFFSET 0
-#define IDE0_DATA_REG_OFFSET (PCMCIA_MEM_SIZE + 0x320)
-#define IDE0_ERROR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 1)
-#define IDE0_NSECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 2)
-#define IDE0_SECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 3)
-#define IDE0_LCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 4)
-#define IDE0_HCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 5)
-#define IDE0_SELECT_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 6)
-#define IDE0_STATUS_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 7)
-#define IDE0_CONTROL_REG_OFFSET 0x0106
-#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */
-
-#define IDE0_INTERRUPT 13
-
-/*
- * Definitions for I2C devices
- */
-#define I2C_ADDR_AUDIO 0x28 /* Audio volume control */
-#define I2C_ADDR_SYSMON 0x2E /* LM87 System Monitor */
-#define I2C_ADDR_RTC 0x51 /* PCF8563 RTC */
-#define I2C_ADDR_POWER_A 0x52 /* PCMCIA/USB power switch, channel A */
-#define I2C_ADDR_POWER_B 0x53 /* PCMCIA/USB power switch, channel B */
-#define I2C_ADDR_KEYBD 0x56 /* PIC LWE keyboard */
-#define I2C_ADDR_PICIO 0x57 /* PIC IO Expander */
-#define I2C_ADDR_EEPROM 0x58 /* EEPROM AT24C164 */
-
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif /* __MACH_LWMON_H */
diff --git a/arch/ppc/platforms/mbx.h b/arch/ppc/platforms/mbx.h
deleted file mode 100644
index 1cf36fa..0000000
--- a/arch/ppc/platforms/mbx.h
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * A collection of structures, addresses, and values associated with
- * the Motorola MBX boards. This was originally created for the
- * MBX860, and probably needs revisions for other boards (like the 821).
- * When this file gets out of control, we can split it up into more
- * meaningful pieces.
- *
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- */
-#ifdef __KERNEL__
-#ifndef __MACH_MBX_DEFS
-#define __MACH_MBX_DEFS
-
-#ifndef __ASSEMBLY__
-/* A Board Information structure that is given to a program when
- * EPPC-Bug starts it up.
- */
-typedef struct bd_info {
- unsigned int bi_tag; /* Should be 0x42444944 "BDID" */
- unsigned int bi_size; /* Size of this structure */
- unsigned int bi_revision; /* revision of this structure */
- unsigned int bi_bdate; /* EPPCbug date, i.e. 0x11061997 */
- unsigned int bi_memstart; /* Memory start address */
- unsigned int bi_memsize; /* Memory (end) size in bytes */
- unsigned int bi_intfreq; /* Internal Freq, in Hz */
- unsigned int bi_busfreq; /* Bus Freq, in Hz */
- unsigned int bi_clun; /* Boot device controller */
- unsigned int bi_dlun; /* Boot device logical dev */
-
- /* These fields are not part of the board information structure
- * provided by the boot rom. They are filled in by embed_config.c
- * so we have the information consistent with other platforms.
- */
- unsigned char bi_enetaddr[6];
- unsigned int bi_baudrate;
-} bd_t;
-
-/* Memory map for the MBX as configured by EPPC-Bug. We could reprogram
- * The SIU and PCI bridge, and try to use larger MMU pages, but the
- * performance gain is not measurable and it certainly complicates the
- * generic MMU model.
- *
- * In a effort to minimize memory usage for embedded applications, any
- * PCI driver or ISA driver must request or map the region required by
- * the device. For convenience (and since we can map up to 4 Mbytes with
- * a single page table page), the MMU initialization will map the
- * NVRAM, Status/Control registers, CPM Dual Port RAM, and the PCI
- * Bridge CSRs 1:1 into the kernel address space.
- */
-#define PCI_ISA_IO_ADDR ((unsigned)0x80000000)
-#define PCI_ISA_IO_SIZE ((uint)(512 * 1024 * 1024))
-#define PCI_IDE_ADDR ((unsigned)0x81000000)
-#define PCI_ISA_MEM_ADDR ((unsigned)0xc0000000)
-#define PCI_ISA_MEM_SIZE ((uint)(512 * 1024 * 1024))
-#define PCMCIA_MEM_ADDR ((uint)0xe0000000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024 * 1024))
-#define PCMCIA_DMA_ADDR ((uint)0xe4000000)
-#define PCMCIA_DMA_SIZE ((uint)(64 * 1024 * 1024))
-#define PCMCIA_ATTRB_ADDR ((uint)0xe8000000)
-#define PCMCIA_ATTRB_SIZE ((uint)(64 * 1024 * 1024))
-#define PCMCIA_IO_ADDR ((uint)0xec000000)
-#define PCMCIA_IO_SIZE ((uint)(64 * 1024 * 1024))
-#define NVRAM_ADDR ((uint)0xfa000000)
-#define NVRAM_SIZE ((uint)(1 * 1024 * 1024))
-#define MBX_CSR_ADDR ((uint)0xfa100000)
-#define MBX_CSR_SIZE ((uint)(1 * 1024 * 1024))
-#define IMAP_ADDR ((uint)0xfa200000)
-#define IMAP_SIZE ((uint)(64 * 1024))
-#define PCI_CSR_ADDR ((uint)0xfa210000)
-#define PCI_CSR_SIZE ((uint)(64 * 1024))
-
-/* Map additional physical space into well known virtual addresses. Due
- * to virtual address mapping, these physical addresses are not accessible
- * in a 1:1 virtual to physical mapping.
- */
-#define ISA_IO_VIRT_ADDR ((uint)0xfa220000)
-#define ISA_IO_VIRT_SIZE ((uint)64 * 1024)
-
-/* Interrupt assignments.
- * These are defined (and fixed) by the MBX hardware implementation.
- */
-#define POWER_FAIL_INT SIU_IRQ0 /* Power fail */
-#define TEMP_HILO_INT SIU_IRQ1 /* Temperature sensor */
-#define QSPAN_INT SIU_IRQ2 /* PCI Bridge (DMA CTLR?) */
-#define ISA_BRIDGE_INT SIU_IRQ3 /* All those PC things */
-#define COMM_L_INT SIU_IRQ6 /* MBX Comm expansion connector pin */
-#define STOP_ABRT_INT SIU_IRQ7 /* Stop/Abort header pin */
-
-/* CPM Ethernet through SCCx.
- *
- * Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use. The TCLK and RCLK seem unique
- * to the MBX860 board. Any two of the four available clocks could be
- * used, and the MPC860 cookbook manual has an example using different
- * clock pins.
- */
-#define PA_ENET_RXD ((ushort)0x0001)
-#define PA_ENET_TXD ((ushort)0x0002)
-#define PA_ENET_TCLK ((ushort)0x0200)
-#define PA_ENET_RCLK ((ushort)0x0800)
-#define PC_ENET_TENA ((ushort)0x0001)
-#define PC_ENET_CLSN ((ushort)0x0010)
-#define PC_ENET_RENA ((ushort)0x0020)
-
-/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
- * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x000000ff)
-#define SICR_ENET_CLKRT ((uint)0x0000003d)
-
-/* The MBX uses the 8259.
-*/
-#define NR_8259_INTS 16
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __MACH_MBX_DEFS */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c
deleted file mode 100644
index 62370f4..0000000
--- a/arch/ppc/platforms/mpc866ads_setup.c
+++ /dev/null
@@ -1,413 +0,0 @@
-/*arch/ppc/platforms/mpc866ads_setup.c
- *
- * Platform setup for the Freescale mpc866ads board
- *
- * Vitaly Bordug <vbordug@ru.mvista.com>
- *
- * Copyright 2005-2006 MontaVista Software Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/ioport.h>
-#include <linux/device.h>
-
-#include <linux/fs_enet_pd.h>
-#include <linux/fs_uart_pd.h>
-#include <linux/mii.h>
-#include <linux/phy.h>
-
-#include <asm/delay.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/time.h>
-#include <asm/ppcboot.h>
-#include <asm/8xx_immap.h>
-#include <asm/cpm1.h>
-#include <asm/ppc_sys.h>
-#include <asm/mpc8xx.h>
-
-extern unsigned char __res[];
-
-static void setup_fec1_ioports(struct fs_platform_info*);
-static void setup_scc1_ioports(struct fs_platform_info*);
-static void setup_smc1_ioports(struct fs_uart_platform_info*);
-static void setup_smc2_ioports(struct fs_uart_platform_info*);
-
-static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata;
-
-static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata;
-
-static struct fs_platform_info mpc8xx_enet_pdata[] = {
- [fsid_fec1] = {
- .rx_ring = 128,
- .tx_ring = 16,
- .rx_copybreak = 240,
-
- .use_napi = 1,
- .napi_weight = 17,
-
- .init_ioports = setup_fec1_ioports,
-
- .bus_id = "0:0f",
- .has_phy = 1,
- },
- [fsid_scc1] = {
- .rx_ring = 64,
- .tx_ring = 8,
- .rx_copybreak = 240,
- .use_napi = 1,
- .napi_weight = 17,
-
-
- .init_ioports = setup_scc1_ioports,
-
- .bus_id = "fixed@100:1",
- },
-};
-
-static struct fs_uart_platform_info mpc866_uart_pdata[] = {
- [fsid_smc1_uart] = {
- .brg = 1,
- .fs_no = fsid_smc1_uart,
- .init_ioports = setup_smc1_ioports,
- .tx_num_fifo = 4,
- .tx_buf_size = 32,
- .rx_num_fifo = 4,
- .rx_buf_size = 32,
- },
- [fsid_smc2_uart] = {
- .brg = 2,
- .fs_no = fsid_smc2_uart,
- .init_ioports = setup_smc2_ioports,
- .tx_num_fifo = 4,
- .tx_buf_size = 32,
- .rx_num_fifo = 4,
- .rx_buf_size = 32,
- },
-};
-
-void __init board_init(void)
-{
- volatile cpm8xx_t *cp = cpmp;
- unsigned *bcsr_io;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
-
-#ifdef CONFIG_SERIAL_CPM_SMC1
- cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
- clrbits32(bcsr_io,(0x80000000 >> 7));
- cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
- cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-#else
- setbits32(bcsr_io,(0x80000000 >> 7));
-
- cp->cp_pbpar &= ~(0x000000c0);
- cp->cp_pbdir |= 0x000000c0;
- cp->cp_smc[0].smc_smcmr = 0;
- cp->cp_smc[0].smc_smce = 0;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
- cp->cp_simode &= ~(0xe0000000 >> 1);
- cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
- clrbits32(bcsr_io,(0x80000000 >> 13));
- cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
- cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-#else
- clrbits32(bcsr_io,(0x80000000 >> 13));
- cp->cp_pbpar &= ~(0x00000c00);
- cp->cp_pbdir |= 0x00000c00;
- cp->cp_smc[1].smc_smcmr = 0;
- cp->cp_smc[1].smc_smce = 0;
-#endif
- iounmap(bcsr_io);
-}
-
-static void setup_fec1_ioports(struct fs_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
-
- setbits16(&immap->im_ioport.iop_pdpar, 0x1fff);
- setbits16(&immap->im_ioport.iop_pddir, 0x1fff);
-}
-
-static void setup_scc1_ioports(struct fs_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
- unsigned *bcsr_io;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
-
- /* Enable the PHY.
- */
- clrbits32(bcsr_io,BCSR1_ETHEN);
-
- /* Configure port A pins for Txd and Rxd.
- */
- /* Disable receive and transmit in case EPPC-Bug started it.
- */
- setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD);
- clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD);
- clrbits16(&immap->im_ioport.iop_paodr, PA_ENET_TXD);
-
- /* Configure port C pins to enable CLSN and RENA.
- */
- clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
- clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
- setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
- /* Configure port A for TCLK and RCLK.
- */
- setbits16(&immap->im_ioport.iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
- clrbits16(&immap->im_ioport.iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
- clrbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA);
- clrbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK);
- setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT);
-
- /* In the original SCC enet driver the following code is placed at
- the end of the initialization */
- setbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA);
- setbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA);
-
-}
-
-static void setup_smc1_ioports(struct fs_uart_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
- unsigned *bcsr_io;
- unsigned int iobits = 0x000000c0;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
-
- clrbits32(bcsr_io,BCSR1_RS232EN_1);
- iounmap(bcsr_io);
-
- setbits32(&immap->im_cpm.cp_pbpar, iobits);
- clrbits32(&immap->im_cpm.cp_pbdir, iobits);
- clrbits16(&immap->im_cpm.cp_pbodr, iobits);
-
-}
-
-static void setup_smc2_ioports(struct fs_uart_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
- unsigned *bcsr_io;
- unsigned int iobits = 0x00000c00;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
-
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
-
- iounmap(bcsr_io);
-
-#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
- setbits32(&immap->im_cpm.cp_pbpar, iobits);
- clrbits32(&immap->im_cpm.cp_pbdir, iobits);
- clrbits16(&immap->im_cpm.cp_pbodr, iobits);
-#else
- setbits16(&immap->im_ioport.iop_papar, iobits);
- clrbits16(&immap->im_ioport.iop_padir, iobits);
- clrbits16(&immap->im_ioport.iop_paodr, iobits);
-#endif
-
-}
-
-static int ma_count = 0;
-
-static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no)
-{
- struct fs_platform_info *fpi;
-
- volatile cpm8xx_t *cp;
- bd_t *bd = (bd_t *) __res;
- char *e;
- int i;
-
- /* Get pointer to Communication Processor */
- cp = cpmp;
-
- if(fs_no >= ARRAY_SIZE(mpc8xx_enet_pdata)) {
- printk(KERN_ERR"No network-suitable #%d device on bus", fs_no);
- return;
- }
-
-
- fpi = &mpc8xx_enet_pdata[fs_no];
- fpi->fs_no = fs_no;
- pdev->dev.platform_data = fpi;
-
- e = (unsigned char *)&bd->bi_enetaddr;
- for (i = 0; i < 6; i++)
- fpi->macaddr[i] = *e++;
-
- fpi->macaddr[5] += ma_count++;
-}
-
-static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev,
- int idx)
-{
- /* This is for FEC devices only */
- if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec")))
- return;
- mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1);
-}
-
-static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev,
- int idx)
-{
- /* This is for SCC devices only */
- if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc")))
- return;
-
- mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
-}
-
-static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev,
- int idx)
-{
- bd_t *bd = (bd_t *) __res;
- struct fs_uart_platform_info *pinfo;
- int num = ARRAY_SIZE(mpc866_uart_pdata);
-
- int id = fs_uart_id_smc2fsid(idx);
-
- /* no need to alter anything if console */
- if ((id < num) && (!pdev->dev.platform_data)) {
- pinfo = &mpc866_uart_pdata[id];
- pinfo->uart_clk = bd->bi_intfreq;
- pdev->dev.platform_data = pinfo;
- }
-}
-
-static int mpc866ads_platform_notify(struct device *dev)
-{
- static const struct platform_notify_dev_map dev_map[] = {
- {
- .bus_id = "fsl-cpm-fec",
- .rtn = mpc866ads_fixup_fec_enet_pdata,
- },
- {
- .bus_id = "fsl-cpm-scc",
- .rtn = mpc866ads_fixup_scc_enet_pdata,
- },
- {
- .bus_id = "fsl-cpm-smc:uart",
- .rtn = mpc866ads_fixup_uart_pdata
- },
- {
- .bus_id = NULL
- }
- };
-
- platform_notify_map(dev_map,dev);
-
- return 0;
-}
-
-int __init mpc866ads_init(void)
-{
- bd_t *bd = (bd_t *) __res;
- struct fs_mii_fec_platform_info* fmpi;
-
- printk(KERN_NOTICE "mpc866ads: Init\n");
-
- platform_notify = mpc866ads_platform_notify;
-
- ppc_sys_device_initfunc();
- ppc_sys_device_disable_all();
-
-#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC1
- ppc_sys_device_enable(MPC8xx_CPM_SCC1);
-#endif
- ppc_sys_device_enable(MPC8xx_CPM_FEC1);
-
- ppc_sys_device_enable(MPC8xx_MDIO_FEC);
-
- fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data =
- &mpc8xx_mdio_fec_pdata;
-
- fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1;
- /* No PHY interrupt line here */
- fmpi->irq[0xf] = PHY_POLL;
-
-/* Since either of the uarts could be used as console, they need to ready */
-#ifdef CONFIG_SERIAL_CPM_SMC1
- ppc_sys_device_enable(MPC8xx_CPM_SMC1);
- ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
- ppc_sys_device_enable(MPC8xx_CPM_SMC2);
- ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
-#endif
- ppc_sys_device_enable(MPC8xx_MDIO_FEC);
-
- fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data =
- &mpc8xx_mdio_fec_pdata;
-
- fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1;
- /* No PHY interrupt line here */
- fmpi->irq[0xf] = PHY_POLL;
-
- return 0;
-}
-
-/*
- To prevent confusion, console selection is gross:
- by 0 assumed SMC1 and by 1 assumed SMC2
- */
-struct platform_device* early_uart_get_pdev(int index)
-{
- bd_t *bd = (bd_t *) __res;
- struct fs_uart_platform_info *pinfo;
-
- struct platform_device* pdev = NULL;
- if(index) { /*assume SMC2 here*/
- pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
- pinfo = &mpc866_uart_pdata[1];
- } else { /*over SMC1*/
- pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
- pinfo = &mpc866_uart_pdata[0];
- }
-
- pinfo->uart_clk = bd->bi_intfreq;
- pdev->dev.platform_data = pinfo;
- ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
- return NULL;
-}
-
-arch_initcall(mpc866ads_init);
diff --git a/arch/ppc/platforms/mvme5100.c b/arch/ppc/platforms/mvme5100.c
deleted file mode 100644
index 053b54a..0000000
--- a/arch/ppc/platforms/mvme5100.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/*
- * Board setup routines for the Motorola MVME5100.
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/pci.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/kdev_t.h>
-#include <linux/root_dev.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <asm/todc.h>
-#include <asm/pci-bridge.h>
-#include <asm/bootinfo.h>
-#include <asm/hawk.h>
-
-#include <platforms/pplus.h>
-#include <platforms/mvme5100.h>
-
-static u_char mvme5100_openpic_initsenses[16] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* i8259 cascade */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* TL16C550 UART 1,2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet1 front panel or P2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Hawk Watchdog 1,2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* DS1621 thermal alarm */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT0# */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT1# */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT2# */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT3# */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTA#, PMC2 INTB# */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTB#, PMC2 INTC# */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTC#, PMC2 INTD# */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTD#, PMC2 INTA# */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet 2 (front panel) */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Abort Switch */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* RTC Alarm */
-};
-
-static inline int
-mvme5100_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- int irq;
-
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 0, 0, 0, 0 }, /* IDSEL 11 - Winbond */
- { 0, 0, 0, 0 }, /* IDSEL 12 - unused */
- { 21, 22, 23, 24 }, /* IDSEL 13 - Universe II */
- { 18, 0, 0, 0 }, /* IDSEL 14 - Enet 1 */
- { 0, 0, 0, 0 }, /* IDSEL 15 - unused */
- { 25, 26, 27, 28 }, /* IDSEL 16 - PMC Slot 1 */
- { 28, 25, 26, 27 }, /* IDSEL 17 - PMC Slot 2 */
- { 0, 0, 0, 0 }, /* IDSEL 18 - unused */
- { 29, 0, 0, 0 }, /* IDSEL 19 - Enet 2 */
- { 0, 0, 0, 0 }, /* IDSEL 20 - PMCSPAN */
- };
-
- const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
- irq = PCI_IRQ_TABLE_LOOKUP;
- /* If lookup is zero, always return 0 */
- if (!irq)
- return 0;
- else
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
- /* If IPMC761 present, return table value */
- return irq;
-#else
- /* If IPMC761 not present, we don't have an i8259 so adjust */
- return (irq - NUM_8259_INTERRUPTS);
-#endif
-}
-
-static void
-mvme5100_pcibios_fixup_resources(struct pci_dev *dev)
-{
- int i;
-
- if ((dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
- (dev->device == PCI_DEVICE_ID_MOTOROLA_HAWK))
- for (i=0; i<DEVICE_COUNT_RESOURCE; i++)
- {
- dev->resource[i].start = 0;
- dev->resource[i].end = 0;
- }
-}
-
-static void __init
-mvme5100_setup_bridge(void)
-{
- struct pci_controller* hose;
-
- hose = pcibios_alloc_controller();
-
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
- hose->pci_mem_offset = MVME5100_PCI_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource, MVME5100_PCI_LOWER_IO,
- MVME5100_PCI_UPPER_IO, IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0], MVME5100_PCI_LOWER_MEM,
- MVME5100_PCI_UPPER_MEM, IORESOURCE_MEM,
- "PCI host bridge");
-
- hose->io_space.start = MVME5100_PCI_LOWER_IO;
- hose->io_space.end = MVME5100_PCI_UPPER_IO;
- hose->mem_space.start = MVME5100_PCI_LOWER_MEM;
- hose->mem_space.end = MVME5100_PCI_UPPER_MEM;
- hose->io_base_virt = (void *)MVME5100_ISA_IO_BASE;
-
- /* Use indirect method of Hawk */
- setup_indirect_pci(hose, MVME5100_PCI_CONFIG_ADDR,
- MVME5100_PCI_CONFIG_DATA);
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pcibios_fixup_resources = mvme5100_pcibios_fixup_resources;
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mvme5100_map_irq;
-}
-
-static void __init
-mvme5100_setup_arch(void)
-{
- if ( ppc_md.progress )
- ppc_md.progress("mvme5100_setup_arch: enter", 0);
-
- loops_per_jiffy = 50000000 / HZ;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- if ( ppc_md.progress )
- ppc_md.progress("mvme5100_setup_arch: find_bridges", 0);
-
- /* Setup PCI host bridge */
- mvme5100_setup_bridge();
-
- /* Find and map our OpenPIC */
- hawk_mpic_init(MVME5100_PCI_MEM_OFFSET);
- OpenPIC_InitSenses = mvme5100_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(mvme5100_openpic_initsenses);
-
- printk("MVME5100 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
-
- if ( ppc_md.progress )
- ppc_md.progress("mvme5100_setup_arch: exit", 0);
-
- return;
-}
-
-static void __init
-mvme5100_init2(void)
-{
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
- request_region(0x00,0x20,"dma1");
- request_region(0x20,0x20,"pic1");
- request_region(0x40,0x20,"timer");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xa0,0x20,"pic2");
- request_region(0xc0,0x20,"dma2");
-#endif
- return;
-}
-
-/*
- * Interrupt setup and service.
- * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
- */
-static void __init
-mvme5100_init_IRQ(void)
-{
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
- int i;
-#endif
-
- if ( ppc_md.progress )
- ppc_md.progress("init_irq: enter", 0);
-
- openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
- openpic_init(NUM_8259_INTERRUPTS);
- openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
- &i8259_irq);
-
- i8259_init(0, 0);
-#else
- openpic_init(0);
-#endif
-
- if ( ppc_md.progress )
- ppc_md.progress("init_irq: exit", 0);
-
- return;
-}
-
-/*
- * Set BAT 3 to map 0xf0000000 to end of physical memory space.
- */
-static __inline__ void
-mvme5100_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT1U, 0xf0001ffe);
- mtspr(SPRN_DBAT1L, 0xf000002a);
- mb();
-}
-
-static unsigned long __init
-mvme5100_find_end_of_memory(void)
-{
- return hawk_get_mem_size(MVME5100_HAWK_SMC_BASE);
-}
-
-static void __init
-mvme5100_map_io(void)
-{
- io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
- ioremap_base = 0xfe000000;
-}
-
-static void
-mvme5100_reset_board(void)
-{
- local_irq_disable();
-
- /* Set exception prefix high - to the firmware */
- _nmask_and_or_msr(0, MSR_IP);
-
- out_8((u_char *)MVME5100_BOARD_MODRST_REG, 0x01);
-
- return;
-}
-
-static void
-mvme5100_restart(char *cmd)
-{
- volatile ulong i = 10000000;
-
- mvme5100_reset_board();
-
- while (i-- > 0);
- panic("restart failed\n");
-}
-
-static void
-mvme5100_halt(void)
-{
- local_irq_disable();
- while (1);
-}
-
-static void
-mvme5100_power_off(void)
-{
- mvme5100_halt();
-}
-
-static int
-mvme5100_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: Motorola\n");
- seq_printf(m, "machine\t\t: MVME5100\n");
-
- return 0;
-}
-
-TODC_ALLOC();
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
- mvme5100_set_bat();
-
- isa_io_base = MVME5100_ISA_IO_BASE;
- isa_mem_base = MVME5100_ISA_MEM_BASE;
- pci_dram_offset = MVME5100_PCI_DRAM_OFFSET;
-
- ppc_md.setup_arch = mvme5100_setup_arch;
- ppc_md.show_cpuinfo = mvme5100_show_cpuinfo;
- ppc_md.init_IRQ = mvme5100_init_IRQ;
- ppc_md.get_irq = openpic_get_irq;
- ppc_md.init = mvme5100_init2;
-
- ppc_md.restart = mvme5100_restart;
- ppc_md.power_off = mvme5100_power_off;
- ppc_md.halt = mvme5100_halt;
-
- ppc_md.find_end_of_memory = mvme5100_find_end_of_memory;
- ppc_md.setup_io_mappings = mvme5100_map_io;
-
- TODC_INIT(TODC_TYPE_MK48T37, MVME5100_NVRAM_AS0, MVME5100_NVRAM_AS1,
- MVME5100_NVRAM_DATA, 8);
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = todc_calibrate_decr;
-
- ppc_md.nvram_read_val = todc_m48txx_read_val;
- ppc_md.nvram_write_val = todc_m48txx_write_val;
-}
diff --git a/arch/ppc/platforms/mvme5100.h b/arch/ppc/platforms/mvme5100.h
deleted file mode 100644
index fbb5495..0000000
--- a/arch/ppc/platforms/mvme5100.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * arch/ppc/platforms/mvme5100.h
- *
- * Definitions for Motorola MVME5100.
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_MVME5100_H__
-#define __ASM_MVME5100_H__
-
-#define MVME5100_HAWK_SMC_BASE 0xfef80000
-
-#define MVME5100_PCI_CONFIG_ADDR 0xfe000cf8
-#define MVME5100_PCI_CONFIG_DATA 0xfe000cfc
-
-#define MVME5100_PCI_IO_BASE 0xfe000000
-#define MVME5100_PCI_MEM_BASE 0x80000000
-
-#define MVME5100_PCI_MEM_OFFSET 0x00000000
-
-#define MVME5100_PCI_DRAM_OFFSET 0x00000000
-#define MVME5100_ISA_MEM_BASE 0x00000000
-#define MVME5100_ISA_IO_BASE MVME5100_PCI_IO_BASE
-
-#define MVME5100_PCI_LOWER_MEM 0x80000000
-#define MVME5100_PCI_UPPER_MEM 0xf3f7ffff
-#define MVME5100_PCI_LOWER_IO 0x00000000
-#define MVME5100_PCI_UPPER_IO 0x0077ffff
-
-/* MVME5100 board register addresses. */
-#define MVME5100_BOARD_STATUS_REG 0xfef88080
-#define MVME5100_BOARD_MODFAIL_REG 0xfef88090
-#define MVME5100_BOARD_MODRST_REG 0xfef880a0
-#define MVME5100_BOARD_TBEN_REG 0xfef880c0
-#define MVME5100_BOARD_SW_READ_REG 0xfef880e0
-#define MVME5100_BOARD_GEO_ADDR_REG 0xfef880e8
-#define MVME5100_BOARD_EXT_FEATURE1_REG 0xfef880f0
-#define MVME5100_BOARD_EXT_FEATURE2_REG 0xfef88100
-
-/* Define the NVRAM/RTC address strobe & data registers */
-#define MVME5100_PHYS_NVRAM_AS0 0xfef880c8
-#define MVME5100_PHYS_NVRAM_AS1 0xfef880d0
-#define MVME5100_PHYS_NVRAM_DATA 0xfef880d8
-
-#define MVME5100_NVRAM_AS0 (MVME5100_PHYS_NVRAM_AS0 - MVME5100_ISA_IO_BASE)
-#define MVME5100_NVRAM_AS1 (MVME5100_PHYS_NVRAM_AS1 - MVME5100_ISA_IO_BASE)
-#define MVME5100_NVRAM_DATA (MVME5100_PHYS_NVRAM_DATA - MVME5100_ISA_IO_BASE)
-
-/* UART clock, addresses, and irq */
-#define MVME5100_BASE_BAUD 1843200
-#define MVME5100_SERIAL_1 0xfef88000
-#define MVME5100_SERIAL_2 0xfef88200
-#ifdef CONFIG_MVME5100_IPMC761_PRESENT
-#define MVME5100_SERIAL_IRQ 17
-#else
-#define MVME5100_SERIAL_IRQ 1
-#endif
-
-#define RS_TABLE_SIZE 4
-
-#define BASE_BAUD ( MVME5100_BASE_BAUD / 16 )
-
-#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
-
-/* All UART IRQs are wire-OR'd to one MPIC IRQ */
-#define STD_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, MVME5100_SERIAL_1, \
- MVME5100_SERIAL_IRQ, \
- STD_COM_FLAGS, /* ttyS0 */ \
- iomem_base: (unsigned char *)MVME5100_SERIAL_1, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, MVME5100_SERIAL_2, \
- MVME5100_SERIAL_IRQ, \
- STD_COM_FLAGS, /* ttyS1 */ \
- iomem_base: (unsigned char *)MVME5100_SERIAL_2, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM },
-
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DFNS
-
-#endif /* __ASM_MVME5100_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/pal4.h b/arch/ppc/platforms/pal4.h
deleted file mode 100644
index 8569c42..0000000
--- a/arch/ppc/platforms/pal4.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Definitions for SBS Palomar IV board
- *
- * Author: Dan Cox
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __PPC_PLATFORMS_PAL4_H
-#define __PPC_PLATFORMS_PAL4_H
-
-#define PAL4_NVRAM 0xfffc0000
-#define PAL4_NVRAM_SIZE 0x8000
-
-#define PAL4_DRAM 0xfff80000
-#define PAL4_DRAM_BR_MASK 0xc0
-#define PAL4_DRAM_BR_SHIFT 6
-#define PAL4_DRAM_RESET 0x10
-#define PAL4_DRAM_EREADY 0x40
-
-#define PAL4_MISC 0xfff80004
-#define PAL4_MISC_FB_MASK 0xc0
-#define PAL4_MISC_FLASH 0x20 /* StratFlash mapping: 1->0xff80, 0->0xfff0 */
-#define PAL4_MISC_MISC 0x08
-#define PAL4_MISC_BITF 0x02
-#define PAL4_MISC_NVKS 0x01
-
-#define PAL4_L2 0xfff80008
-#define PAL4_L2_MASK 0x07
-
-#define PAL4_PLDR 0xfff8000c
-
-/* Only two Ethernet devices on the board... */
-#define PAL4_ETH 31
-#define PAL4_INTA 20
-
-#endif /* __PPC_PLATFORMS_PAL4_H */
diff --git a/arch/ppc/platforms/pal4_pci.c b/arch/ppc/platforms/pal4_pci.c
deleted file mode 100644
index d81ae1c..0000000
--- a/arch/ppc/platforms/pal4_pci.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * PCI support for SBS Palomar IV
- *
- * Author: Dan Cox
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/byteorder.h>
-#include <asm/machdep.h>
-#include <asm/io.h>
-#include <asm/pci-bridge.h>
-#include <asm/uaccess.h>
-
-#include <syslib/cpc700.h>
-
-#include "pal4.h"
-
-/* not much to this.... */
-static inline int __init
-pal4_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- if (idsel == 9)
- return PAL4_ETH;
- else
- return PAL4_INTA + (idsel - 3);
-}
-
-void __init
-pal4_find_bridges(void)
-{
- struct pci_controller *hose;
-
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
- hose->pci_mem_offset = 0;
-
- /* Could snatch these from the CPC700.... */
- pci_init_resource(&hose->io_resource,
- 0x0,
- 0x03ffffff,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0],
- 0x90000000,
- 0x9fffffff,
- IORESOURCE_MEM,
- "PCI host bridge");
-
- hose->io_space.start = 0x00800000;
- hose->io_space.end = 0x03ffffff;
- hose->mem_space.start = 0x90000000;
- hose->mem_space.end = 0x9fffffff;
- hose->io_base_virt = (void *) 0xf8000000;
-
- setup_indirect_pci(hose, CPC700_PCI_CONFIG_ADDR,
- CPC700_PCI_CONFIG_DATA);
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = pal4_map_irq;
-}
diff --git a/arch/ppc/platforms/pal4_serial.h b/arch/ppc/platforms/pal4_serial.h
deleted file mode 100644
index a753432..0000000
--- a/arch/ppc/platforms/pal4_serial.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * Definitions for SBS PalomarIV serial support
- *
- * Author: Dan Cox
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __PPC_PAL4_SERIAL_H
-#define __PPC_PAL4_SERIAL_H
-
-#define CPC700_SERIAL_1 0xff600300
-#define CPC700_SERIAL_2 0xff600400
-
-#define RS_TABLE_SIZE 2
-#define BASE_BAUD (33333333 / 4 / 16)
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF)
-#endif
-
-#define SERIAL_PORT_DFNS \
- {0, BASE_BAUD, CPC700_SERIAL_1, 3, STD_COM_FLAGS, \
- iomem_base: (unsigned char *) CPC700_SERIAL_1, \
- io_type: SERIAL_IO_MEM}, /* ttyS0 */ \
- {0, BASE_BAUD, CPC700_SERIAL_2, 4, STD_COM_FLAGS, \
- iomem_base: (unsigned char *) CPC700_SERIAL_2, \
- io_type: SERIAL_IO_MEM}
-
-#endif
diff --git a/arch/ppc/platforms/pal4_setup.c b/arch/ppc/platforms/pal4_setup.c
deleted file mode 100644
index 3da47d9..0000000
--- a/arch/ppc/platforms/pal4_setup.c
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * Board setup routines for the SBS PalomarIV.
- *
- * Author: Dan Cox
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/time.h>
-#include <linux/irq.h>
-#include <linux/kdev_t.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-
-#include <asm/io.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/machdep.h>
-
-#include <syslib/cpc700.h>
-
-#include "pal4.h"
-
-extern void pal4_find_bridges(void);
-
-unsigned int cpc700_irq_assigns[][2] = {
- {1, 1}, /* IRQ 0: ECC correctable error */
- {1, 1}, /* IRQ 1: PCI write to memory range */
- {0, 1}, /* IRQ 2: PCI write to command register */
- {0, 1}, /* IRQ 3: UART 0 */
- {0, 1}, /* IRQ 4: UART 1 */
- {0, 1}, /* IRQ 5: ICC 0 */
- {0, 1}, /* IRQ 6: ICC 1 */
- {0, 1}, /* IRQ 7: GPT compare 0 */
- {0, 1}, /* IRQ 8: GPT compare 1 */
- {0, 1}, /* IRQ 9: GPT compare 2 */
- {0, 1}, /* IRQ 10: GPT compare 3 */
- {0, 1}, /* IRQ 11: GPT compare 4 */
- {0, 1}, /* IRQ 12: GPT capture 0 */
- {0, 1}, /* IRQ 13: GPT capture 1 */
- {0, 1}, /* IRQ 14: GPT capture 2 */
- {0, 1}, /* IRQ 15: GPT capture 3 */
- {0, 1}, /* IRQ 16: GPT capture 4 */
- {0, 0}, /* IRQ 17: reserved */
- {0, 0}, /* IRQ 18: reserved */
- {0, 0}, /* IRQ 19: reserved */
- {0, 0}, /* IRQ 20: reserved */
- {0, 1}, /* IRQ 21: Ethernet */
- {0, 0}, /* IRQ 22: reserved */
- {0, 0}, /* IRQ 23: reserved */
- {0, 0}, /* IRQ 24: resreved */
- {0, 0}, /* IRQ 25: reserved */
- {0, 0}, /* IRQ 26: reserved */
- {0, 0}, /* IRQ 27: reserved */
- {0, 0}, /* IRQ 28: reserved */
- {0, 0}, /* IRQ 29: reserved */
- {0, 0}, /* IRQ 30: reserved */
- {0, 0}, /* IRQ 31: reserved */
-};
-
-static int
-pal4_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "board\t\t: SBS Palomar IV\n");
-
- return 0;
-}
-
-static void
-pal4_restart(char *cmd)
-{
- local_irq_disable();
- __asm__ __volatile__("lis 3,0xfff0\n \
- ori 3,3,0x100\n \
- mtspr 26,3\n \
- li 3,0\n \
- mtspr 27,3\n \
- rfi");
-
- for(;;);
-}
-
-static void
-pal4_power_off(void)
-{
- local_irq_disable();
- for(;;);
-}
-
-static void
-pal4_halt(void)
-{
- pal4_power_off();
-}
-
-TODC_ALLOC();
-
-static void __init
-pal4_setup_arch(void)
-{
- unsigned long l2;
-
- TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
- ioremap(PAL4_NVRAM, PAL4_NVRAM_SIZE), 8);
-
- pal4_find_bridges();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
- ROOT_DEV = Root_NFS;
-
- /* The L2 gets disabled in the bootloader, but all the proper
- bits should be present from the fw, so just re-enable it */
- l2 = _get_L2CR();
- if (!(l2 & L2CR_L2E)) {
- /* presume that it was initially set if the size is
- still present. */
- if (l2 ^ L2CR_L2SIZ_MASK)
- _set_L2CR(l2 | L2CR_L2E);
- else
- printk("L2 not set by firmware; left disabled.\n");
- }
-}
-
-static void __init
-pal4_map_io(void)
-{
- io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- isa_io_base = 0 /*PAL4_ISA_IO_BASE*/;
- pci_dram_offset = 0 /*PAL4_PCI_SYS_MEM_BASE*/;
-
- ppc_md.setup_arch = pal4_setup_arch;
- ppc_md.show_cpuinfo = pal4_show_cpuinfo;
-
- ppc_md.setup_io_mappings = pal4_map_io;
-
- ppc_md.init_IRQ = cpc700_init_IRQ;
- ppc_md.get_irq = cpc700_get_irq;
-
- ppc_md.restart = pal4_restart;
- ppc_md.halt = pal4_halt;
- ppc_md.power_off = pal4_power_off;
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = todc_calibrate_decr;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-}
-
diff --git a/arch/ppc/platforms/pcu_e.h b/arch/ppc/platforms/pcu_e.h
deleted file mode 100644
index a2c03a2..0000000
--- a/arch/ppc/platforms/pcu_e.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Siemens PCU E board specific definitions
- *
- * Copyright (c) 2001 Wolfgang Denk (wd@denx.de)
- */
-
-#ifndef __MACH_PCU_E_H
-#define __MACH_PCU_E_H
-
-
-#include <asm/ppcboot.h>
-
-#define PCU_E_IMMR_BASE 0xFE000000 /* phys. addr of IMMR */
-#define PCU_E_IMAP_SIZE (64 * 1024) /* size of mapped area */
-
-#define IMAP_ADDR PCU_E_IMMR_BASE /* physical base address of IMMR area */
-#define IMAP_SIZE PCU_E_IMAP_SIZE /* mapped size of IMMR area */
-
-#define FEC_INTERRUPT 15 /* = SIU_LEVEL7 */
-#define DEC_INTERRUPT 13 /* = SIU_LEVEL6 */
-#define CPM_INTERRUPT 11 /* = SIU_LEVEL5 (was: SIU_LEVEL2) */
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif /* __MACH_PCU_E_H */
diff --git a/arch/ppc/platforms/powerpmc250.c b/arch/ppc/platforms/powerpmc250.c
deleted file mode 100644
index 162dc85..0000000
--- a/arch/ppc/platforms/powerpmc250.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * Board setup routines for Force PowerPMC-250 Processor PMC
- *
- * Author: Troy Benjegerdes <tbenjegerdes@mvista.com>
- * Borrowed heavily from prpmc750_*.c by
- * Matt Porter <mporter@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/slab.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-
-#include <asm/byteorder.h>
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/machdep.h>
-#include <asm/time.h>
-#include <platforms/powerpmc250.h>
-#include <asm/open_pic.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc10x.h>
-#include <asm/uaccess.h>
-#include <asm/bootinfo.h>
-
-extern void powerpmc250_find_bridges(void);
-extern unsigned long loops_per_jiffy;
-
-static u_char powerpmc250_openpic_initsenses[] __initdata =
-{
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 1, /* PMC INTA (also MPC107 output interrupt INTA) */
- 1, /* PMC INTB (also I82559 Ethernet controller) */
- 1, /* PMC INTC */
- 1, /* PMC INTD */
- 0, /* DUART interrupt (active high) */
-};
-
-static int
-powerpmc250_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m,"machine\t\t: Force PowerPMC250\n");
-
- return 0;
-}
-
-static void __init
-powerpmc250_setup_arch(void)
-{
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000/HZ;
-
- /* Lookup PCI host bridges */
- powerpmc250_find_bridges();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- printk("Force PowerPMC250 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
-}
-
-#if 0
-/*
- * Compute the PrPMC750's bus speed using the baud clock as a
- * reference.
- */
-unsigned long __init powerpmc250_get_bus_speed(void)
-{
- unsigned long tbl_start, tbl_end;
- unsigned long current_state, old_state, bus_speed;
- unsigned char lcr, dll, dlm;
- int baud_divisor, count;
-
- /* Read the UART's baud clock divisor */
- lcr = readb(PRPMC750_SERIAL_0_LCR);
- writeb(lcr | UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
- dll = readb(PRPMC750_SERIAL_0_DLL);
- dlm = readb(PRPMC750_SERIAL_0_DLM);
- writeb(lcr & ~UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
- baud_divisor = (dlm << 8) | dll;
-
- /*
- * Use the baud clock divisor and base baud clock
- * to determine the baud rate and use that as
- * the number of baud clock edges we use for
- * the time base sample. Make it half the baud
- * rate.
- */
- count = PRPMC750_BASE_BAUD / (baud_divisor * 16);
-
- /* Find the first edge of the baud clock */
- old_state = readb(PRPMC750_STATUS_REG) & PRPMC750_BAUDOUT_MASK;
- do {
- current_state = readb(PRPMC750_STATUS_REG) &
- PRPMC750_BAUDOUT_MASK;
- } while(old_state == current_state);
-
- old_state = current_state;
-
- /* Get the starting time base value */
- tbl_start = get_tbl();
-
- /*
- * Loop until we have found a number of edges equal
- * to half the count (half the baud rate)
- */
- do {
- do {
- current_state = readb(PRPMC750_STATUS_REG) &
- PRPMC750_BAUDOUT_MASK;
- } while(old_state == current_state);
- old_state = current_state;
- } while (--count);
-
- /* Get the ending time base value */
- tbl_end = get_tbl();
-
- /* Compute bus speed */
- bus_speed = (tbl_end-tbl_start)*128;
-
- return bus_speed;
-}
-#endif
-
-static void __init
-powerpmc250_calibrate_decr(void)
-{
- unsigned long freq;
- int divisor = 4;
-
- //freq = powerpmc250_get_bus_speed();
-#warning hardcoded bus freq
- freq = 100000000;
-
- tb_ticks_per_jiffy = freq / (HZ * divisor);
- tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
-}
-
-static void
-powerpmc250_restart(char *cmd)
-{
- local_irq_disable();
- /* Hard reset */
- writeb(0x11, 0xfe000332);
- while(1);
-}
-
-static void
-powerpmc250_halt(void)
-{
- local_irq_disable();
- while (1);
-}
-
-static void
-powerpmc250_power_off(void)
-{
- powerpmc250_halt();
-}
-
-static void __init
-powerpmc250_init_IRQ(void)
-{
-
- OpenPIC_InitSenses = powerpmc250_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(powerpmc250_openpic_initsenses);
- mpc10x_set_openpic();
-}
-
-/*
- * Set BAT 3 to map 0xf0000000 to end of physical memory space.
- */
-static __inline__ void
-powerpmc250_set_bat(void)
-{
- unsigned long bat3u, bat3l;
- static int mapping_set = 0;
-
- if (!mapping_set)
- {
- __asm__ __volatile__(
- " lis %0,0xf000\n \
- ori %1,%0,0x002a\n \
- ori %0,%0,0x1ffe\n \
- mtspr 0x21e,%0\n \
- mtspr 0x21f,%1\n \
- isync\n \
- sync "
- : "=r" (bat3u), "=r" (bat3l));
-
- mapping_set = 1;
- }
- return;
-}
-
-static unsigned long __init
-powerpmc250_find_end_of_memory(void)
-{
- /* Cover I/O space with a BAT */
- /* yuck, better hope your ram size is a power of 2 -- paulus */
- powerpmc250_set_bat();
-
- return mpc10x_get_mem_size(MPC10X_MEM_MAP_B);
-}
-
-static void __init
-powerpmc250_map_io(void)
-{
- io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if ( r4 )
- {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif
-
- /* Copy cmd_line parameters */
- if ( r6)
- {
- *(char *)(r7 + KERNELBASE) = 0;
- strcpy(cmd_line, (char *)(r6 + KERNELBASE));
- }
-
- isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
- isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
- pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
-
- ppc_md.setup_arch = powerpmc250_setup_arch;
- ppc_md.show_cpuinfo = powerpmc250_show_cpuinfo;
- ppc_md.init_IRQ = powerpmc250_init_IRQ;
- ppc_md.get_irq = openpic_get_irq;
-
- ppc_md.find_end_of_memory = powerpmc250_find_end_of_memory;
- ppc_md.setup_io_mappings = powerpmc250_map_io;
-
- ppc_md.restart = powerpmc250_restart;
- ppc_md.power_off = powerpmc250_power_off;
- ppc_md.halt = powerpmc250_halt;
-
- /* PowerPMC250 has no timekeeper part */
- ppc_md.time_init = NULL;
- ppc_md.get_rtc_time = NULL;
- ppc_md.set_rtc_time = NULL;
- ppc_md.calibrate_decr = powerpmc250_calibrate_decr;
-}
-
-
-/*
- * (This used to be arch/ppc/platforms/powerpmc250_pci.c)
- *
- * PCI support for Force PowerPMC250
- *
- */
-
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif /* DEBUG */
-
-static inline int __init
-powerpmc250_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {17, 0, 0, 0}, /* Device 11 - 82559 */
- {0, 0, 0, 0}, /* 12 */
- {0, 0, 0, 0}, /* 13 */
- {0, 0, 0, 0}, /* 14 */
- {0, 0, 0, 0}, /* 15 */
- {16, 17, 18, 19}, /* Device 16 - PMC A1?? */
- };
- const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-};
-
-static int
-powerpmc250_exclude_device(u_char bus, u_char devfn)
-{
- /*
- * While doing PCI Scan the MPC107 will 'detect' itself as
- * device on the PCI Bus, will create an incorrect response and
- * later will respond incorrectly to Configuration read coming
- * from another device.
- *
- * The work around is that when doing a PCI Scan one
- * should skip its own device number in the scan.
- *
- * The top IDsel is AD13 and the middle is AD14.
- *
- * -- Note from force
- */
-
- if ((bus == 0) && (PCI_SLOT(devfn) == 13 || PCI_SLOT(devfn) == 14)) {
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
- else {
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-void __init
-powerpmc250_find_bridges(void)
-{
- struct pci_controller* hose;
-
- hose = pcibios_alloc_controller();
- if (!hose){
- printk("Can't allocate PCI 'hose' structure!!!\n");
- return;
- }
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- if (mpc10x_bridge_init(hose,
- MPC10X_MEM_MAP_B,
- MPC10X_MEM_MAP_B,
- MPC10X_MAPB_EUMB_BASE) == 0) {
-
- hose->mem_resources[0].end = 0xffffffff;
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- /* ppc_md.pcibios_fixup = pcore_pcibios_fixup; */
- ppc_md.pci_swizzle = common_swizzle;
-
- ppc_md.pci_exclude_device = powerpmc250_exclude_device;
- ppc_md.pci_map_irq = powerpmc250_map_irq;
- } else {
- if (ppc_md.progress)
- ppc_md.progress("Bridge init failed", 0x100);
- printk("Host bridge init failed\n");
- }
-
-}
diff --git a/arch/ppc/platforms/powerpmc250.h b/arch/ppc/platforms/powerpmc250.h
deleted file mode 100644
index d33ad8dc..0000000
--- a/arch/ppc/platforms/powerpmc250.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * arch/ppc/platforms/powerpmc250.h
- *
- * Definitions for Force PowerPMC-250 board support
- *
- * Author: Troy Benjegerdes <tbenjegerdes@mvista.com>
- *
- * Borrowed heavily from prpmc750.h by Matt Porter <mporter@mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASMPPC_POWERPMC250_H
-#define __ASMPPC_POWERPMC250_H
-
-#define POWERPMC250_PCI_CONFIG_ADDR 0x80000cf8
-#define POWERPMC250_PCI_CONFIG_DATA 0x80000cfc
-
-#define POWERPMC250_PCI_PHY_MEM_BASE 0xc0000000
-#define POWERPMC250_PCI_MEM_BASE 0xf0000000
-#define POWERPMC250_PCI_IO_BASE 0x80000000
-
-#define POWERPMC250_ISA_IO_BASE POWERPMC250_PCI_IO_BASE
-#define POWERPMC250_ISA_MEM_BASE POWERPMC250_PCI_MEM_BASE
-#define POWERPMC250_PCI_MEM_OFFSET POWERPMC250_PCI_PHY_MEM_BASE
-
-#define POWERPMC250_SYS_MEM_BASE 0x80000000
-
-#define POWERPMC250_HAWK_SMC_BASE 0xfef80000
-
-#define POWERPMC250_BASE_BAUD 12288000
-#define POWERPMC250_SERIAL 0xff000000
-#define POWERPMC250_SERIAL_IRQ 20
-
-/* UART Defines. */
-#define RS_TABLE_SIZE 1
-
-#define BASE_BAUD (POWERPMC250_BASE_BAUD / 16)
-
-#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
-
-#define SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, POWERPMC250_SERIAL, POWERPMC250_SERIAL_IRQ, \
- STD_COM_FLAGS, /* ttyS0 */ \
- iomem_base: (u8 *)POWERPMC250_SERIAL, \
- iomem_reg_shift: 0, \
- io_type: SERIAL_IO_MEM }
-
-#endif /* __ASMPPC_POWERPMC250_H */
diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c
deleted file mode 100644
index cbcac85..0000000
--- a/arch/ppc/platforms/pplus.c
+++ /dev/null
@@ -1,844 +0,0 @@
-/*
- * Board and PCI setup routines for MCG PowerPlus
- *
- * Author: Randy Vinson <rvinson@mvista.com>
- *
- * Derived from original PowerPlus PReP work by
- * Cort Dougan, Johnnie Peters, Matt Porter, and
- * Troy Benjegerdes.
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/console.h>
-#include <linux/pci.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/dma.h>
-#include <asm/machdep.h>
-#include <asm/prep_nvram.h>
-#include <asm/vga.h>
-#include <asm/i8259.h>
-#include <asm/open_pic.h>
-#include <asm/hawk.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/kgdb.h>
-#include <asm/reg.h>
-
-#include "pplus.h"
-
-#undef DUMP_DBATS
-
-TODC_ALLOC();
-
-extern void pplus_setup_hose(void);
-extern void pplus_set_VIA_IDE_native(void);
-
-extern unsigned long loops_per_jiffy;
-unsigned char *Motherboard_map_name;
-
-/* Tables for known hardware */
-
-/* Motorola Mesquite */
-static inline int
-mesquite_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * MPIC interrupts for various IDSEL values (MPIC IRQ0 =
- * Linux IRQ16 (to leave room for ISA IRQs at 0-15).
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {18, 0, 0, 0}, /* IDSEL 14 - Enet 0 */
- { 0, 0, 0, 0}, /* IDSEL 15 - unused */
- {19, 19, 19, 19}, /* IDSEL 16 - PMC Slot 1 */
- { 0, 0, 0, 0}, /* IDSEL 17 - unused */
- { 0, 0, 0, 0}, /* IDSEL 18 - unused */
- { 0, 0, 0, 0}, /* IDSEL 19 - unused */
- {24, 25, 26, 27}, /* IDSEL 20 - P2P bridge (to cPCI 1) */
- { 0, 0, 0, 0}, /* IDSEL 21 - unused */
- {28, 29, 30, 31} /* IDSEL 22 - P2P bridge (to cPCI 2) */
- };
-
- const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-/* Motorola Sitka */
-static inline int
-sitka_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * MPIC interrupts for various IDSEL values (MPIC IRQ0 =
- * Linux IRQ16 (to leave room for ISA IRQs at 0-15).
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {18, 0, 0, 0}, /* IDSEL 14 - Enet 0 */
- { 0, 0, 0, 0}, /* IDSEL 15 - unused */
- {25, 26, 27, 28}, /* IDSEL 16 - PMC Slot 1 */
- {28, 25, 26, 27}, /* IDSEL 17 - PMC Slot 2 */
- { 0, 0, 0, 0}, /* IDSEL 18 - unused */
- { 0, 0, 0, 0}, /* IDSEL 19 - unused */
- {20, 0, 0, 0} /* IDSEL 20 - P2P bridge (to cPCI) */
- };
-
- const long min_idsel = 14, max_idsel = 20, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-/* Motorola MTX */
-static inline int
-MTX_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * MPIC interrupts for various IDSEL values (MPIC IRQ0 =
- * Linux IRQ16 (to leave room for ISA IRQs at 0-15).
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {19, 0, 0, 0}, /* IDSEL 12 - SCSI */
- { 0, 0, 0, 0}, /* IDSEL 13 - unused */
- {18, 0, 0, 0}, /* IDSEL 14 - Enet */
- { 0, 0, 0, 0}, /* IDSEL 15 - unused */
- {25, 26, 27, 28}, /* IDSEL 16 - PMC Slot 1 */
- {26, 27, 28, 25}, /* IDSEL 17 - PMC Slot 2 */
- {27, 28, 25, 26} /* IDSEL 18 - PCI Slot 3 */
- };
-
- const long min_idsel = 12, max_idsel = 18, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-/* Motorola MTX Plus */
-/* Secondary bus interrupt routing is not supported yet */
-static inline int
-MTXplus_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * MPIC interrupts for various IDSEL values (MPIC IRQ0 =
- * Linux IRQ16 (to leave room for ISA IRQs at 0-15).
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {19, 0, 0, 0}, /* IDSEL 12 - SCSI */
- { 0, 0, 0, 0}, /* IDSEL 13 - unused */
- {18, 0, 0, 0}, /* IDSEL 14 - Enet 1 */
- { 0, 0, 0, 0}, /* IDSEL 15 - unused */
- {25, 26, 27, 28}, /* IDSEL 16 - PCI Slot 1P */
- {26, 27, 28, 25}, /* IDSEL 17 - PCI Slot 2P */
- {27, 28, 25, 26}, /* IDSEL 18 - PCI Slot 3P */
- {26, 0, 0, 0}, /* IDSEL 19 - Enet 2 */
- { 0, 0, 0, 0} /* IDSEL 20 - P2P Bridge */
- };
-
- const long min_idsel = 12, max_idsel = 20, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static inline int
-Genesis2_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- /* 2600
- * Raven 31
- * ISA 11
- * SCSI 12 - IRQ3
- * Univ 13
- * eth 14 - IRQ2
- * VGA 15 - IRQ4
- * PMC1 16 - IRQ9,10,11,12 = PMC1 A-D
- * PMC2 17 - IRQ12,9,10,11 = A-D
- * SCSI2 18 - IRQ11
- * eth2 19 - IRQ10
- * PCIX 20 - IRQ9,10,11,12 = PCI A-D
- */
-
- /* 2400
- * Hawk 31
- * ISA 11
- * Univ 13
- * eth 14 - IRQ2
- * PMC1 16 - IRQ9,10,11,12 = PMC A-D
- * PMC2 17 - IRQ12,9,10,11 = PMC A-D
- * PCIX 20 - IRQ9,10,11,12 = PMC A-D
- */
-
- /* 2300
- * Raven 31
- * ISA 11
- * Univ 13
- * eth 14 - IRQ2
- * PMC1 16 - 9,10,11,12 = A-D
- * PMC2 17 - 9,10,11,12 = B,C,D,A
- */
-
- static char pci_irq_table[][4] =
- /*
- * MPIC interrupts for various IDSEL values (MPIC IRQ0 =
- * Linux IRQ16 (to leave room for ISA IRQs at 0-15).
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {19, 0, 0, 0}, /* IDSEL 12 - SCSI */
- { 0, 0, 0, 0}, /* IDSEL 13 - Universe PCI - VME */
- {18, 0, 0, 0}, /* IDSEL 14 - Enet 1 */
- { 0, 0, 0, 0}, /* IDSEL 15 - unused */
- {25, 26, 27, 28}, /* IDSEL 16 - PCI/PMC Slot 1P */
- {28, 25, 26, 27}, /* IDSEL 17 - PCI/PMC Slot 2P */
- {27, 28, 25, 26}, /* IDSEL 18 - PCI Slot 3P */
- {26, 0, 0, 0}, /* IDSEL 19 - Enet 2 */
- {25, 26, 27, 28} /* IDSEL 20 - P2P Bridge */
- };
-
- const long min_idsel = 12, max_idsel = 20, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-#define MOTOROLA_CPUTYPE_REG 0x800
-#define MOTOROLA_BASETYPE_REG 0x803
-#define MPIC_RAVEN_ID 0x48010000
-#define MPIC_HAWK_ID 0x48030000
-#define MOT_PROC2_BIT 0x800
-
-static u_char pplus_openpic_initsenses[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* MVME2600_INT_SIO */
- (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE),/*MVME2600_INT_FALCN_ECC_ERR */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/*MVME2600_INT_PCI_ETHERNET */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_SCSI */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/*MVME2600_INT_PCI_GRAPHICS */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTA */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTB */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTC */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTD */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),
-};
-
-int mot_entry = -1;
-int prep_keybd_present = 1;
-int mot_multi = 0;
-
-struct brd_info {
- /* 0x100 mask assumes for Raven and Hawk boards that the level/edge
- * are set */
- int cpu_type;
- /* 0x200 if this board has a Hawk chip. */
- int base_type;
- /* or'ed with 0x80 if this board should be checked for multi CPU */
- int max_cpu;
- const char *name;
- int (*map_irq) (struct pci_dev *, unsigned char, unsigned char);
-};
-struct brd_info mot_info[] = {
- {0x300, 0x00, 0x00, "MVME 2400", Genesis2_map_irq},
- {0x1E0, 0xE0, 0x00, "Mesquite cPCI (MCP750)", mesquite_map_irq},
- {0x1E0, 0xE1, 0x00, "Sitka cPCI (MCPN750)", sitka_map_irq},
- {0x1E0, 0xE2, 0x00, "Mesquite cPCI (MCP750) w/ HAC", mesquite_map_irq},
- {0x1E0, 0xF6, 0x80, "MTX Plus", MTXplus_map_irq},
- {0x1E0, 0xF6, 0x81, "Dual MTX Plus", MTXplus_map_irq},
- {0x1E0, 0xF7, 0x80, "MTX wo/ Parallel Port", MTX_map_irq},
- {0x1E0, 0xF7, 0x81, "Dual MTX wo/ Parallel Port", MTX_map_irq},
- {0x1E0, 0xF8, 0x80, "MTX w/ Parallel Port", MTX_map_irq},
- {0x1E0, 0xF8, 0x81, "Dual MTX w/ Parallel Port", MTX_map_irq},
- {0x1E0, 0xF9, 0x00, "MVME 2300", Genesis2_map_irq},
- {0x1E0, 0xFA, 0x00, "MVME 2300SC/2600", Genesis2_map_irq},
- {0x1E0, 0xFB, 0x00, "MVME 2600 with MVME712M", Genesis2_map_irq},
- {0x1E0, 0xFC, 0x00, "MVME 2600/2700 with MVME761", Genesis2_map_irq},
- {0x1E0, 0xFD, 0x80, "MVME 3600 with MVME712M", Genesis2_map_irq},
- {0x1E0, 0xFD, 0x81, "MVME 4600 with MVME712M", Genesis2_map_irq},
- {0x1E0, 0xFE, 0x80, "MVME 3600 with MVME761", Genesis2_map_irq},
- {0x1E0, 0xFE, 0x81, "MVME 4600 with MVME761", Genesis2_map_irq},
- {0x000, 0x00, 0x00, "", NULL}
-};
-
-void __init pplus_set_board_type(void)
-{
- unsigned char cpu_type;
- unsigned char base_mod;
- int entry;
- unsigned short devid;
- unsigned long *ProcInfo = NULL;
-
- cpu_type = inb(MOTOROLA_CPUTYPE_REG) & 0xF0;
- base_mod = inb(MOTOROLA_BASETYPE_REG);
- early_read_config_word(0, 0, 0, PCI_VENDOR_ID, &devid);
-
- for (entry = 0; mot_info[entry].cpu_type != 0; entry++) {
- /* Check for Hawk chip */
- if (mot_info[entry].cpu_type & 0x200) {
- if (devid != PCI_DEVICE_ID_MOTOROLA_HAWK)
- continue;
- } else {
- /* store the system config register for later use. */
- ProcInfo =
- (unsigned long *)ioremap(PPLUS_SYS_CONFIG_REG, 4);
-
- /* Check non hawk boards */
- if ((mot_info[entry].cpu_type & 0xff) != cpu_type)
- continue;
-
- if (mot_info[entry].base_type == 0) {
- mot_entry = entry;
- break;
- }
-
- if (mot_info[entry].base_type != base_mod)
- continue;
- }
-
- if (!(mot_info[entry].max_cpu & 0x80)) {
- mot_entry = entry;
- break;
- }
-
- /* processor 1 not present and max processor zero indicated */
- if ((*ProcInfo & MOT_PROC2_BIT)
- && !(mot_info[entry].max_cpu & 0x7f)) {
- mot_entry = entry;
- break;
- }
-
- /* processor 1 present and max processor zero indicated */
- if (!(*ProcInfo & MOT_PROC2_BIT)
- && (mot_info[entry].max_cpu & 0x7f)) {
- mot_entry = entry;
- break;
- }
-
- /* Indicate to system if this is a multiprocessor board */
- if (!(*ProcInfo & MOT_PROC2_BIT))
- mot_multi = 1;
- }
-
- if (mot_entry == -1)
- /* No particular cpu type found - assume Mesquite (MCP750) */
- mot_entry = 1;
-
- Motherboard_map_name = (unsigned char *)mot_info[mot_entry].name;
- ppc_md.pci_map_irq = mot_info[mot_entry].map_irq;
-}
-void __init pplus_pib_init(void)
-{
- unsigned char reg;
- unsigned short short_reg;
-
- struct pci_dev *dev = NULL;
-
- /*
- * Perform specific configuration for the Via Tech or
- * or Winbond PCI-ISA-Bridge part.
- */
- if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
- PCI_DEVICE_ID_VIA_82C586_1, dev))) {
- /*
- * PPCBUG does not set the enable bits
- * for the IDE device. Force them on here.
- */
- pci_read_config_byte(dev, 0x40, ®);
-
- reg |= 0x03; /* IDE: Chip Enable Bits */
- pci_write_config_byte(dev, 0x40, reg);
- }
-
- if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
- PCI_DEVICE_ID_VIA_82C586_2,
- dev)) && (dev->devfn = 0x5a)) {
- /* Force correct USB interrupt */
- dev->irq = 11;
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
-
- if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND,
- PCI_DEVICE_ID_WINBOND_83C553, dev))) {
- /* Clear PCI Interrupt Routing Control Register. */
- short_reg = 0x0000;
- pci_write_config_word(dev, 0x44, short_reg);
- /* Route IDE interrupts to IRQ 14 */
- reg = 0xEE;
- pci_write_config_byte(dev, 0x43, reg);
- }
-
- if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND,
- PCI_DEVICE_ID_WINBOND_82C105, dev))) {
- /*
- * Disable LEGIRQ mode so PCI INTS are routed
- * directly to the 8259 and enable both channels
- */
- pci_write_config_dword(dev, 0x40, 0x10ff0033);
-
- /* Force correct IDE interrupt */
- dev->irq = 14;
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
- pci_dev_put(dev);
-}
-
-void __init pplus_set_VIA_IDE_legacy(void)
-{
- unsigned short vend, dev;
-
- early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_VENDOR_ID, &vend);
- early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_DEVICE_ID, &dev);
-
- if ((vend == PCI_VENDOR_ID_VIA) &&
- (dev == PCI_DEVICE_ID_VIA_82C586_1)) {
- unsigned char temp;
-
- /* put back original "standard" port base addresses */
- early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
- PCI_BASE_ADDRESS_0, 0x1f1);
- early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
- PCI_BASE_ADDRESS_1, 0x3f5);
- early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
- PCI_BASE_ADDRESS_2, 0x171);
- early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
- PCI_BASE_ADDRESS_3, 0x375);
- early_write_config_dword(0, 0, PCI_DEVFN(0xb, 1),
- PCI_BASE_ADDRESS_4, 0xcc01);
-
- /* put into legacy mode */
- early_read_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
- &temp);
- temp &= ~0x05;
- early_write_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
- temp);
- }
-}
-
-void pplus_set_VIA_IDE_native(void)
-{
- unsigned short vend, dev;
-
- early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_VENDOR_ID, &vend);
- early_read_config_word(0, 0, PCI_DEVFN(0xb, 1), PCI_DEVICE_ID, &dev);
-
- if ((vend == PCI_VENDOR_ID_VIA) &&
- (dev == PCI_DEVICE_ID_VIA_82C586_1)) {
- unsigned char temp;
-
- /* put into native mode */
- early_read_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
- &temp);
- temp |= 0x05;
- early_write_config_byte(0, 0, PCI_DEVFN(0xb, 1), PCI_CLASS_PROG,
- temp);
- }
-}
-
-void __init pplus_pcibios_fixup(void)
-{
-
- unsigned char reg;
- unsigned short devid;
- unsigned char base_mod;
-
- printk(KERN_INFO "Setting PCI interrupts for a \"%s\"\n",
- Motherboard_map_name);
-
- /* Setup the Winbond or Via PIB */
- pplus_pib_init();
-
- /* Set up floppy in PS/2 mode */
- outb(0x09, SIO_CONFIG_RA);
- reg = inb(SIO_CONFIG_RD);
- reg = (reg & 0x3F) | 0x40;
- outb(reg, SIO_CONFIG_RD);
- outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
-
- /* This is a hack. If this is a 2300 or 2400 mot board then there is
- * no keyboard controller and we have to indicate that.
- */
-
- early_read_config_word(0, 0, 0, PCI_VENDOR_ID, &devid);
- base_mod = inb(MOTOROLA_BASETYPE_REG);
- if ((devid == PCI_DEVICE_ID_MOTOROLA_HAWK) ||
- (base_mod == 0xF9) || (base_mod == 0xFA) || (base_mod == 0xE1))
- prep_keybd_present = 0;
-}
-
-void __init pplus_find_bridges(void)
-{
- struct pci_controller *hose;
-
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- hose->pci_mem_offset = PREP_ISA_MEM_BASE;
- hose->io_base_virt = (void *)PREP_ISA_IO_BASE;
-
- pci_init_resource(&hose->io_resource, PPLUS_PCI_IO_START,
- PPLUS_PCI_IO_END, IORESOURCE_IO, "PCI host bridge");
- pci_init_resource(&hose->mem_resources[0], PPLUS_PROC_PCI_MEM_START,
- PPLUS_PROC_PCI_MEM_END, IORESOURCE_MEM,
- "PCI host bridge");
-
- hose->io_space.start = PPLUS_PCI_IO_START;
- hose->io_space.end = PPLUS_PCI_IO_END;
- hose->mem_space.start = PPLUS_PCI_MEM_START;
- hose->mem_space.end = PPLUS_PCI_MEM_END - HAWK_MPIC_SIZE;
-
- if (hawk_init(hose, PPLUS_HAWK_PPC_REG_BASE, PPLUS_PROC_PCI_MEM_START,
- PPLUS_PROC_PCI_MEM_END - HAWK_MPIC_SIZE,
- PPLUS_PROC_PCI_IO_START, PPLUS_PROC_PCI_IO_END,
- PPLUS_PROC_PCI_MEM_END - HAWK_MPIC_SIZE + 1)
- != 0) {
- printk(KERN_CRIT "Could not initialize host bridge\n");
-
- }
-
- pplus_set_VIA_IDE_legacy();
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pcibios_fixup = pplus_pcibios_fixup;
- ppc_md.pci_swizzle = common_swizzle;
-}
-
-static int pplus_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: Motorola MCG\n");
- seq_printf(m, "machine\t\t: %s\n", Motherboard_map_name);
-
- return 0;
-}
-
-static void __init pplus_setup_arch(void)
-{
- struct pci_controller *hose;
-
- if (ppc_md.progress)
- ppc_md.progress("pplus_setup_arch: enter", 0);
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000;
-
- if (ppc_md.progress)
- ppc_md.progress("pplus_setup_arch: find_bridges", 0);
-
- /* Setup PCI host bridge */
- pplus_find_bridges();
-
- hose = pci_bus_to_hose(0);
- isa_io_base = (ulong) hose->io_base_virt;
-
- if (ppc_md.progress)
- ppc_md.progress("pplus_setup_arch: set_board_type", 0);
-
- pplus_set_board_type();
-
- /* Enable L2. Assume we don't need to flush -- Cort */
- *(unsigned char *)(PPLUS_L2_CONTROL_REG) |= 3;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- printk(KERN_INFO "Motorola PowerPlus Platform\n");
- printk(KERN_INFO
- "Port by MontaVista Software, Inc. (source@mvista.com)\n");
-
-#ifdef CONFIG_VGA_CONSOLE
- /* remap the VGA memory */
- vgacon_remap_base = (unsigned long)ioremap(PPLUS_ISA_MEM_BASE,
- 0x08000000);
- conswitchp = &vga_con;
-#endif
-#ifdef CONFIG_PPCBUG_NVRAM
- /* Read in NVRAM data */
- init_prep_nvram();
-
- /* if no bootargs, look in NVRAM */
- if (cmd_line[0] == '\0') {
- char *bootargs;
- bootargs = prep_nvram_get_var("bootargs");
- if (bootargs != NULL) {
- strcpy(cmd_line, bootargs);
- /* again.. */
- strcpy(boot_command_line, cmd_line);
- }
- }
-#endif
- if (ppc_md.progress)
- ppc_md.progress("pplus_setup_arch: exit", 0);
-}
-
-static void pplus_restart(char *cmd)
-{
- unsigned long i = 10000;
-
- local_irq_disable();
-
- /* set VIA IDE controller into native mode */
- pplus_set_VIA_IDE_native();
-
- /* set exception prefix high - to the prom */
- _nmask_and_or_msr(0, MSR_IP);
-
- /* make sure bit 0 (reset) is a 0 */
- outb(inb(0x92) & ~1L, 0x92);
- /* signal a reset to system control port A - soft reset */
- outb(inb(0x92) | 1, 0x92);
-
- while (i != 0)
- i++;
- panic("restart failed\n");
-}
-
-static void pplus_halt(void)
-{
- /* set exception prefix high - to the prom */
- _nmask_and_or_msr(MSR_EE, MSR_IP);
-
- /* make sure bit 0 (reset) is a 0 */
- outb(inb(0x92) & ~1L, 0x92);
- /* signal a reset to system control port A - soft reset */
- outb(inb(0x92) | 1, 0x92);
-
- while (1) ;
- /*
- * Not reached
- */
-}
-
-static void pplus_power_off(void)
-{
- pplus_halt();
-}
-
-static void __init pplus_init_IRQ(void)
-{
- int i;
-
- if (ppc_md.progress)
- ppc_md.progress("init_irq: enter", 0);
-
- OpenPIC_InitSenses = pplus_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(pplus_openpic_initsenses);
-
- if (OpenPIC_Addr != NULL) {
-
- openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
- openpic_init(NUM_8259_INTERRUPTS);
- openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
- i8259_irq);
- ppc_md.get_irq = openpic_get_irq;
- }
-
- i8259_init(0, 0);
-
- if (ppc_md.progress)
- ppc_md.progress("init_irq: exit", 0);
-}
-
-#ifdef CONFIG_SMP
-/* PowerPlus (MTX) support */
-static int __init smp_pplus_probe(void)
-{
- extern int mot_multi;
-
- if (mot_multi) {
- openpic_request_IPIs();
- smp_hw_index[1] = 1;
- return 2;
- }
-
- return 1;
-}
-
-static void __init smp_pplus_kick_cpu(int nr)
-{
- *(unsigned long *)KERNELBASE = nr;
- asm volatile ("dcbf 0,%0"::"r" (KERNELBASE):"memory");
- printk(KERN_INFO "CPU1 reset, waiting\n");
-}
-
-static void __init smp_pplus_setup_cpu(int cpu_nr)
-{
- if (OpenPIC_Addr)
- do_openpic_setup_cpu();
-}
-
-static struct smp_ops_t pplus_smp_ops = {
- smp_openpic_message_pass,
- smp_pplus_probe,
- smp_pplus_kick_cpu,
- smp_pplus_setup_cpu,
- .give_timebase = smp_generic_give_timebase,
- .take_timebase = smp_generic_take_timebase,
-};
-#endif /* CONFIG_SMP */
-
-#ifdef DUMP_DBATS
-static void print_dbat(int idx, u32 bat)
-{
-
- char str[64];
-
- sprintf(str, "DBAT%c%c = 0x%08x\n",
- (char)((idx - DBAT0U) / 2) + '0', (idx & 1) ? 'L' : 'U', bat);
- ppc_md.progress(str, 0);
-}
-
-#define DUMP_DBAT(x) \
- do { \
- u32 __temp = mfspr(x);\
- print_dbat(x, __temp); \
- } while (0)
-
-static void dump_dbats(void)
-{
- if (ppc_md.progress) {
- DUMP_DBAT(DBAT0U);
- DUMP_DBAT(DBAT0L);
- DUMP_DBAT(DBAT1U);
- DUMP_DBAT(DBAT1L);
- DUMP_DBAT(DBAT2U);
- DUMP_DBAT(DBAT2L);
- DUMP_DBAT(DBAT3U);
- DUMP_DBAT(DBAT3L);
- }
-}
-#endif
-
-static unsigned long __init pplus_find_end_of_memory(void)
-{
- unsigned long total;
-
- if (ppc_md.progress)
- ppc_md.progress("pplus_find_end_of_memory", 0);
-
-#ifdef DUMP_DBATS
- dump_dbats();
-#endif
-
- total = hawk_get_mem_size(PPLUS_HAWK_SMC_BASE);
- return (total);
-}
-
-static void __init pplus_map_io(void)
-{
- io_block_mapping(PPLUS_ISA_IO_BASE, PPLUS_ISA_IO_BASE, 0x10000000,
- _PAGE_IO);
- io_block_mapping(0xfef80000, 0xfef80000, 0x00080000, _PAGE_IO);
-}
-
-static void __init pplus_init2(void)
-{
-#ifdef CONFIG_NVRAM
- request_region(PREP_NVRAM_AS0, 0x8, "nvram");
-#endif
- request_region(0x20, 0x20, "pic1");
- request_region(0xa0, 0x20, "pic2");
- request_region(0x00, 0x20, "dma1");
- request_region(0x40, 0x20, "timer");
- request_region(0x80, 0x10, "dma page reg");
- request_region(0xc0, 0x20, "dma2");
-}
-
-/*
- * Set BAT 2 to access 0x8000000 so progress messages will work and set BAT 3
- * to 0xf0000000 to access Falcon/Raven or Hawk registers
- */
-static __inline__ void pplus_set_bat(void)
-{
- /* wait for all outstanding memory accesses to complete */
- mb();
-
- /* setup DBATs */
- mtspr(SPRN_DBAT2U, 0x80001ffe);
- mtspr(SPRN_DBAT2L, 0x8000002a);
- mtspr(SPRN_DBAT3U, 0xf0001ffe);
- mtspr(SPRN_DBAT3L, 0xf000002a);
-
- /* wait for updates */
- mb();
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /* Map in board regs, etc. */
- pplus_set_bat();
-
- isa_io_base = PREP_ISA_IO_BASE;
- isa_mem_base = PREP_ISA_MEM_BASE;
- pci_dram_offset = PREP_PCI_DRAM_OFFSET;
- ISA_DMA_THRESHOLD = 0x00ffffff;
- DMA_MODE_READ = 0x44;
- DMA_MODE_WRITE = 0x48;
- ppc_do_canonicalize_irqs = 1;
-
- ppc_md.setup_arch = pplus_setup_arch;
- ppc_md.show_cpuinfo = pplus_show_cpuinfo;
- ppc_md.init_IRQ = pplus_init_IRQ;
- /* this gets changed later on if we have an OpenPIC -- Cort */
- ppc_md.get_irq = i8259_irq;
- ppc_md.init = pplus_init2;
-
- ppc_md.restart = pplus_restart;
- ppc_md.power_off = pplus_power_off;
- ppc_md.halt = pplus_halt;
-
- TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
- PREP_NVRAM_DATA, 8);
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = todc_calibrate_decr;
- ppc_md.nvram_read_val = todc_m48txx_read_val;
- ppc_md.nvram_write_val = todc_m48txx_write_val;
-
- ppc_md.find_end_of_memory = pplus_find_end_of_memory;
- ppc_md.setup_io_mappings = pplus_map_io;
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = gen550_progress;
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-#ifdef CONFIG_KGDB
- ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
-#endif
-#ifdef CONFIG_SMP
- smp_ops = &pplus_smp_ops;
-#endif /* CONFIG_SMP */
-}
diff --git a/arch/ppc/platforms/pplus.h b/arch/ppc/platforms/pplus.h
deleted file mode 100644
index a4bbaa8..0000000
--- a/arch/ppc/platforms/pplus.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Definitions for Motorola MCG Falcon/Raven & HAWK North Bridge & Memory ctlr.
- *
- * Author: Mark A. Greerinclude/asm-ppc/hawk.h
- * mgreer@mvista.com
- *
- * Modified by Randy Vinson (rvinson@mvista.com)
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __PPC_PPLUS_H
-#define __PPC_PPLUS_H
-
-#include <asm/io.h>
-
-/*
- * Due to limitations imposed by legacy hardware (primarily IDE controllers),
- * the PPLUS boards operate using a PReP address map.
- *
- * From Processor (physical) -> PCI:
- * PCI Mem Space: 0xc0000000 - 0xfe000000 -> 0x00000000 - 0x3e000000 (768 MB)
- * PCI I/O Space: 0x80000000 - 0x90000000 -> 0x00000000 - 0x10000000 (256 MB)
- * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
- *
- * From PCI -> Processor (physical):
- * System Memory: 0x80000000 -> 0x00000000
- */
-
-#define PPLUS_ISA_MEM_BASE PREP_ISA_MEM_BASE
-#define PPLUS_ISA_IO_BASE PREP_ISA_IO_BASE
-
-/* PCI Memory space mapping info */
-#define PPLUS_PCI_MEM_SIZE 0x30000000U
-#define PPLUS_PROC_PCI_MEM_START PPLUS_ISA_MEM_BASE
-#define PPLUS_PROC_PCI_MEM_END (PPLUS_PROC_PCI_MEM_START + \
- PPLUS_PCI_MEM_SIZE - 1)
-#define PPLUS_PCI_MEM_START 0x00000000U
-#define PPLUS_PCI_MEM_END (PPLUS_PCI_MEM_START + \
- PPLUS_PCI_MEM_SIZE - 1)
-
-/* PCI I/O space mapping info */
-#define PPLUS_PCI_IO_SIZE 0x10000000U
-#define PPLUS_PROC_PCI_IO_START PPLUS_ISA_IO_BASE
-#define PPLUS_PROC_PCI_IO_END (PPLUS_PROC_PCI_IO_START + \
- PPLUS_PCI_IO_SIZE - 1)
-#define PPLUS_PCI_IO_START 0x00000000U
-#define PPLUS_PCI_IO_END (PPLUS_PCI_IO_START + \
- PPLUS_PCI_IO_SIZE - 1)
-/* System memory mapping info */
-#define PPLUS_PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
-#define PPLUS_PCI_PHY_MEM_OFFSET (PPLUS_ISA_MEM_BASE-PPLUS_PCI_MEM_START)
-
-/* Define base addresses for important sets of registers */
-#define PPLUS_HAWK_SMC_BASE 0xfef80000U
-#define PPLUS_HAWK_PPC_REG_BASE 0xfeff0000U
-#define PPLUS_SYS_CONFIG_REG 0xfef80400U
-#define PPLUS_L2_CONTROL_REG 0x8000081cU
-
-#define PPLUS_VGA_MEM_BASE 0xf0000000U
-
-#endif /* __PPC_PPLUS_H */
diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c
deleted file mode 100644
index 8ed433e..0000000
--- a/arch/ppc/platforms/prep_pci.c
+++ /dev/null
@@ -1,1339 +0,0 @@
-/*
- * PReP pci functions.
- * Originally by Gary Thomas
- * rewritten and updated by Cort Dougan (cort@cs.nmt.edu)
- *
- * The motherboard routes/maps will disappear shortly. -- Cort
- */
-
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/sections.h>
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/ptrace.h>
-#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-#include <asm/residual.h>
-#include <asm/irq.h>
-#include <asm/machdep.h>
-#include <asm/open_pic.h>
-
-extern void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
-
-/* Which PCI interrupt line does a given device [slot] use? */
-/* Note: This really should be two dimensional based in slot/pin used */
-static unsigned char *Motherboard_map;
-unsigned char *Motherboard_map_name;
-
-/* How is the 82378 PIRQ mapping setup? */
-static unsigned char *Motherboard_routes;
-
-static void (*Motherboard_non0)(struct pci_dev *);
-
-static void Powerplus_Map_Non0(struct pci_dev *);
-
-/* Used for Motorola to store system config register */
-static unsigned long *ProcInfo;
-
-/* Tables for known hardware */
-
-/* Motorola PowerStackII - Utah */
-static char Utah_pci_IRQ_map[23] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 5, /* Slot 2 - SCSI - NCR825A */
- 0, /* Slot 3 - unused */
- 3, /* Slot 4 - Ethernet - DEC2114x */
- 0, /* Slot 5 - unused */
- 2, /* Slot 6 - PCI Card slot #1 */
- 3, /* Slot 7 - PCI Card slot #2 */
- 5, /* Slot 8 - PCI Card slot #3 */
- 5, /* Slot 9 - PCI Bridge */
- /* added here in case we ever support PCI bridges */
- /* Secondary PCI bus cards are at slot-9,6 & slot-9,7 */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 5, /* Slot 12 - SCSI - NCR825A */
- 0, /* Slot 13 - unused */
- 3, /* Slot 14 - enet */
- 0, /* Slot 15 - unused */
- 2, /* Slot 16 - unused */
- 3, /* Slot 17 - unused */
- 5, /* Slot 18 - unused */
- 0, /* Slot 19 - unused */
- 0, /* Slot 20 - unused */
- 0, /* Slot 21 - unused */
- 0, /* Slot 22 - unused */
-};
-
-static char Utah_pci_IRQ_routes[] =
-{
- 0, /* Line 0 - Unused */
- 9, /* Line 1 */
- 10, /* Line 2 */
- 11, /* Line 3 */
- 14, /* Line 4 */
- 15, /* Line 5 */
-};
-
-/* Motorola PowerStackII - Omaha */
-/* no integrated SCSI or ethernet */
-static char Omaha_pci_IRQ_map[23] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 3, /* Slot 2 - Winbond EIDE */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 1, /* Slot 6 - PCI slot 1 */
- 2, /* Slot 7 - PCI slot 2 */
- 3, /* Slot 8 - PCI slot 3 */
- 4, /* Slot 9 - PCI slot 4 */ /* needs indirect access */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 0, /* Slot 12 - unused */
- 0, /* Slot 13 - unused */
- 0, /* Slot 14 - unused */
- 0, /* Slot 15 - unused */
- 1, /* Slot 16 - PCI slot 1 */
- 2, /* Slot 17 - PCI slot 2 */
- 3, /* Slot 18 - PCI slot 3 */
- 4, /* Slot 19 - PCI slot 4 */ /* needs indirect access */
- 0,
- 0,
- 0,
-};
-
-static char Omaha_pci_IRQ_routes[] =
-{
- 0, /* Line 0 - Unused */
- 9, /* Line 1 */
- 11, /* Line 2 */
- 14, /* Line 3 */
- 15 /* Line 4 */
-};
-
-/* Motorola PowerStack */
-static char Blackhawk_pci_IRQ_map[19] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 3, /* Slot 12 - SCSI */
- 0, /* Slot 13 - unused */
- 1, /* Slot 14 - Ethernet */
- 0, /* Slot 15 - unused */
- 1, /* Slot P7 */
- 2, /* Slot P6 */
- 3, /* Slot P5 */
-};
-
-static char Blackhawk_pci_IRQ_routes[] =
-{
- 0, /* Line 0 - Unused */
- 9, /* Line 1 */
- 11, /* Line 2 */
- 15, /* Line 3 */
- 15 /* Line 4 */
-};
-
-/* Motorola Mesquite */
-static char Mesquite_pci_IRQ_map[23] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 0, /* Slot 12 - unused */
- 0, /* Slot 13 - unused */
- 2, /* Slot 14 - Ethernet */
- 0, /* Slot 15 - unused */
- 3, /* Slot 16 - PMC */
- 0, /* Slot 17 - unused */
- 0, /* Slot 18 - unused */
- 0, /* Slot 19 - unused */
- 0, /* Slot 20 - unused */
- 0, /* Slot 21 - unused */
- 0, /* Slot 22 - unused */
-};
-
-/* Motorola Sitka */
-static char Sitka_pci_IRQ_map[21] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 0, /* Slot 12 - unused */
- 0, /* Slot 13 - unused */
- 2, /* Slot 14 - Ethernet */
- 0, /* Slot 15 - unused */
- 9, /* Slot 16 - PMC 1 */
- 12, /* Slot 17 - PMC 2 */
- 0, /* Slot 18 - unused */
- 0, /* Slot 19 - unused */
- 4, /* Slot 20 - NT P2P bridge */
-};
-
-/* Motorola MTX */
-static char MTX_pci_IRQ_map[23] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 3, /* Slot 12 - SCSI */
- 0, /* Slot 13 - unused */
- 2, /* Slot 14 - Ethernet */
- 0, /* Slot 15 - unused */
- 9, /* Slot 16 - PCI/PMC slot 1 */
- 10, /* Slot 17 - PCI/PMC slot 2 */
- 11, /* Slot 18 - PCI slot 3 */
- 0, /* Slot 19 - unused */
- 0, /* Slot 20 - unused */
- 0, /* Slot 21 - unused */
- 0, /* Slot 22 - unused */
-};
-
-/* Motorola MTX Plus */
-/* Secondary bus interrupt routing is not supported yet */
-static char MTXplus_pci_IRQ_map[23] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 3, /* Slot 12 - SCSI */
- 0, /* Slot 13 - unused */
- 2, /* Slot 14 - Ethernet 1 */
- 0, /* Slot 15 - unused */
- 9, /* Slot 16 - PCI slot 1P */
- 10, /* Slot 17 - PCI slot 2P */
- 11, /* Slot 18 - PCI slot 3P */
- 10, /* Slot 19 - Ethernet 2 */
- 0, /* Slot 20 - P2P Bridge */
- 0, /* Slot 21 - unused */
- 0, /* Slot 22 - unused */
-};
-
-static char Raven_pci_IRQ_routes[] =
-{
- 0, /* This is a dummy structure */
-};
-
-/* Motorola MVME16xx */
-static char Genesis_pci_IRQ_map[16] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 3, /* Slot 12 - SCSI */
- 0, /* Slot 13 - unused */
- 1, /* Slot 14 - Ethernet */
- 0, /* Slot 15 - unused */
-};
-
-static char Genesis_pci_IRQ_routes[] =
-{
- 0, /* Line 0 - Unused */
- 10, /* Line 1 */
- 11, /* Line 2 */
- 14, /* Line 3 */
- 15 /* Line 4 */
-};
-
-static char Genesis2_pci_IRQ_map[23] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - IDE */
- 3, /* Slot 12 - SCSI */
- 5, /* Slot 13 - Universe PCI - VME Bridge */
- 2, /* Slot 14 - Ethernet */
- 0, /* Slot 15 - unused */
- 9, /* Slot 16 - PMC 1 */
- 12, /* Slot 17 - pci */
- 11, /* Slot 18 - pci */
- 10, /* Slot 19 - pci */
- 0, /* Slot 20 - pci */
- 0, /* Slot 21 - unused */
- 0, /* Slot 22 - unused */
-};
-
-/* Motorola Series-E */
-static char Comet_pci_IRQ_map[23] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 3, /* Slot 12 - SCSI */
- 0, /* Slot 13 - unused */
- 1, /* Slot 14 - Ethernet */
- 0, /* Slot 15 - unused */
- 1, /* Slot 16 - PCI slot 1 */
- 2, /* Slot 17 - PCI slot 2 */
- 3, /* Slot 18 - PCI slot 3 */
- 4, /* Slot 19 - PCI bridge */
- 0,
- 0,
- 0,
-};
-
-static char Comet_pci_IRQ_routes[] =
-{
- 0, /* Line 0 - Unused */
- 10, /* Line 1 */
- 11, /* Line 2 */
- 14, /* Line 3 */
- 15 /* Line 4 */
-};
-
-/* Motorola Series-EX */
-static char Comet2_pci_IRQ_map[23] =
-{
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 3, /* Slot 2 - SCSI - NCR825A */
- 0, /* Slot 3 - unused */
- 1, /* Slot 4 - Ethernet - DEC2104X */
- 0, /* Slot 5 - unused */
- 1, /* Slot 6 - PCI slot 1 */
- 2, /* Slot 7 - PCI slot 2 */
- 3, /* Slot 8 - PCI slot 3 */
- 4, /* Slot 9 - PCI bridge */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 3, /* Slot 12 - SCSI - NCR825A */
- 0, /* Slot 13 - unused */
- 1, /* Slot 14 - Ethernet - DEC2104X */
- 0, /* Slot 15 - unused */
- 1, /* Slot 16 - PCI slot 1 */
- 2, /* Slot 17 - PCI slot 2 */
- 3, /* Slot 18 - PCI slot 3 */
- 4, /* Slot 19 - PCI bridge */
- 0,
- 0,
- 0,
-};
-
-static char Comet2_pci_IRQ_routes[] =
-{
- 0, /* Line 0 - Unused */
- 10, /* Line 1 */
- 11, /* Line 2 */
- 14, /* Line 3 */
- 15, /* Line 4 */
-};
-
-/*
- * ibm 830 (and 850?).
- * This is actually based on the Carolina motherboard
- * -- Cort
- */
-static char ibm8xx_pci_IRQ_map[23] = {
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - FireCoral */
- 4, /* Slot 12 - Ethernet PCIINTD# */
- 2, /* Slot 13 - PCI Slot #2 */
- 2, /* Slot 14 - S3 Video PCIINTD# */
- 0, /* Slot 15 - onboard SCSI (INDI) [1] */
- 3, /* Slot 16 - NCR58C810 RS6000 Only PCIINTC# */
- 0, /* Slot 17 - unused */
- 2, /* Slot 18 - PCI Slot 2 PCIINTx# (See below) */
- 0, /* Slot 19 - unused */
- 0, /* Slot 20 - unused */
- 0, /* Slot 21 - unused */
- 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
-};
-
-static char ibm8xx_pci_IRQ_routes[] = {
- 0, /* Line 0 - unused */
- 15, /* Line 1 */
- 15, /* Line 2 */
- 15, /* Line 3 */
- 15, /* Line 4 */
-};
-
-/*
- * a 6015 ibm board
- * -- Cort
- */
-static char ibm6015_pci_IRQ_map[23] = {
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - */
- 1, /* Slot 12 - SCSI */
- 2, /* Slot 13 - */
- 2, /* Slot 14 - */
- 1, /* Slot 15 - */
- 1, /* Slot 16 - */
- 0, /* Slot 17 - */
- 2, /* Slot 18 - */
- 0, /* Slot 19 - */
- 0, /* Slot 20 - */
- 0, /* Slot 21 - */
- 2, /* Slot 22 - */
-};
-
-static char ibm6015_pci_IRQ_routes[] = {
- 0, /* Line 0 - unused */
- 13, /* Line 1 */
- 15, /* Line 2 */
- 15, /* Line 3 */
- 15, /* Line 4 */
-};
-
-
-/* IBM Nobis and Thinkpad 850 */
-static char Nobis_pci_IRQ_map[23] ={
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - unused */
- 3, /* Slot 12 - SCSI */
- 0, /* Slot 13 - unused */
- 0, /* Slot 14 - unused */
- 0, /* Slot 15 - unused */
-};
-
-static char Nobis_pci_IRQ_routes[] = {
- 0, /* Line 0 - Unused */
- 13, /* Line 1 */
- 13, /* Line 2 */
- 13, /* Line 3 */
- 13 /* Line 4 */
-};
-
-/*
- * IBM RS/6000 43p/140 -- paulus
- * XXX we should get all this from the residual data
- */
-static char ibm43p_pci_IRQ_map[23] = {
- 0, /* Slot 0 - unused */
- 0, /* Slot 1 - unused */
- 0, /* Slot 2 - unused */
- 0, /* Slot 3 - unused */
- 0, /* Slot 4 - unused */
- 0, /* Slot 5 - unused */
- 0, /* Slot 6 - unused */
- 0, /* Slot 7 - unused */
- 0, /* Slot 8 - unused */
- 0, /* Slot 9 - unused */
- 0, /* Slot 10 - unused */
- 0, /* Slot 11 - FireCoral ISA bridge */
- 6, /* Slot 12 - Ethernet */
- 0, /* Slot 13 - openpic */
- 0, /* Slot 14 - unused */
- 0, /* Slot 15 - unused */
- 7, /* Slot 16 - NCR58C825a onboard scsi */
- 0, /* Slot 17 - unused */
- 2, /* Slot 18 - PCI Slot 2 PCIINTx# (See below) */
- 0, /* Slot 19 - unused */
- 0, /* Slot 20 - unused */
- 0, /* Slot 21 - unused */
- 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
-};
-
-static char ibm43p_pci_IRQ_routes[] = {
- 0, /* Line 0 - unused */
- 15, /* Line 1 */
- 15, /* Line 2 */
- 15, /* Line 3 */
- 15, /* Line 4 */
-};
-
-/* Motorola PowerPlus architecture PCI IRQ tables */
-/* Interrupt line values for INTA-D on primary/secondary MPIC inputs */
-
-struct powerplus_irq_list
-{
- unsigned char primary[4]; /* INT A-D */
- unsigned char secondary[4]; /* INT A-D */
-};
-
-/*
- * For standard PowerPlus boards, bus 0 PCI INTs A-D are routed to
- * OpenPIC inputs 9-12. PCI INTs A-D from the on board P2P bridge
- * are routed to OpenPIC inputs 5-8. These values are offset by
- * 16 in the table to reflect the Linux kernel interrupt value.
- */
-struct powerplus_irq_list Powerplus_pci_IRQ_list =
-{
- {25, 26, 27, 28},
- {21, 22, 23, 24}
-};
-
-/*
- * For the MCP750 (system slot board), cPCI INTs A-D are routed to
- * OpenPIC inputs 8-11 and the PMC INTs A-D are routed to OpenPIC
- * input 3. On a hot swap MCP750, the companion card PCI INTs A-D
- * are routed to OpenPIC inputs 12-15. These values are offset by
- * 16 in the table to reflect the Linux kernel interrupt value.
- */
-struct powerplus_irq_list Mesquite_pci_IRQ_list =
-{
- {24, 25, 26, 27},
- {28, 29, 30, 31}
-};
-
-/*
- * This table represents the standard PCI swizzle defined in the
- * PCI bus specification.
- */
-static unsigned char prep_pci_intpins[4][4] =
-{
- { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */
- { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */
- { 3, 4, 1, 2}, /* Buses 2, 6, 10 ... */
- { 4, 1, 2, 3}, /* Buses 3, 7, 11 ... */
-};
-
-/* We have to turn on LEVEL mode for changed IRQs */
-/* All PCI IRQs need to be level mode, so this should be something
- * other than hard-coded as well... IRQs are individually mappable
- * to either edge or level.
- */
-
-/*
- * 8259 edge/level control definitions
- */
-#define ISA8259_M_ELCR 0x4d0
-#define ISA8259_S_ELCR 0x4d1
-
-#define ELCRS_INT15_LVL 0x80
-#define ELCRS_INT14_LVL 0x40
-#define ELCRS_INT12_LVL 0x10
-#define ELCRS_INT11_LVL 0x08
-#define ELCRS_INT10_LVL 0x04
-#define ELCRS_INT9_LVL 0x02
-#define ELCRS_INT8_LVL 0x01
-#define ELCRM_INT7_LVL 0x80
-#define ELCRM_INT5_LVL 0x20
-
-#if 0
-/*
- * PCI config space access.
- */
-#define CFGADDR(dev) ((1<<(dev>>3)) | ((dev&7)<<8))
-#define DEVNO(dev) (dev>>3)
-
-#define MIN_DEVNR 11
-#define MAX_DEVNR 22
-
-static int
-prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 *val)
-{
- struct pci_controller *hose = bus->sysdata;
- volatile void __iomem *cfg_data;
-
- if (bus->number != 0 || DEVNO(devfn) < MIN_DEVNR
- || DEVNO(devfn) > MAX_DEVNR)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /*
- * Note: the caller has already checked that offset is
- * suitably aligned and that len is 1, 2 or 4.
- */
- cfg_data = hose->cfg_data + CFGADDR(devfn) + offset;
- switch (len) {
- case 1:
- *val = in_8(cfg_data);
- break;
- case 2:
- *val = in_le16(cfg_data);
- break;
- default:
- *val = in_le32(cfg_data);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 val)
-{
- struct pci_controller *hose = bus->sysdata;
- volatile void __iomem *cfg_data;
-
- if (bus->number != 0 || DEVNO(devfn) < MIN_DEVNR
- || DEVNO(devfn) > MAX_DEVNR)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /*
- * Note: the caller has already checked that offset is
- * suitably aligned and that len is 1, 2 or 4.
- */
- cfg_data = hose->cfg_data + CFGADDR(devfn) + offset;
- switch (len) {
- case 1:
- out_8(cfg_data, val);
- break;
- case 2:
- out_le16(cfg_data, val);
- break;
- default:
- out_le32(cfg_data, val);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops prep_pci_ops =
-{
- prep_read_config,
- prep_write_config
-};
-#endif
-
-#define MOTOROLA_CPUTYPE_REG 0x800
-#define MOTOROLA_BASETYPE_REG 0x803
-#define MPIC_RAVEN_ID 0x48010000
-#define MPIC_HAWK_ID 0x48030000
-#define MOT_PROC2_BIT 0x800
-
-static u_char prep_openpic_initsenses[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* MVME2600_INT_SIO */
- (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_FALCN_ECC_ERR */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_ETHERNET */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_SCSI */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_GRAPHICS */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTA */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTB */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTC */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTD */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG1 */
-};
-
-#define MOT_RAVEN_PRESENT 0x1
-#define MOT_HAWK_PRESENT 0x2
-
-int mot_entry = -1;
-int prep_keybd_present = 1;
-int MotMPIC;
-int mot_multi;
-
-int __init
-raven_init(void)
-{
- unsigned int devid;
- unsigned int pci_membase;
- unsigned char base_mod;
-
- /* Check to see if the Raven chip exists. */
- if ( _prep_type != _PREP_Motorola) {
- OpenPIC_Addr = NULL;
- return 0;
- }
-
- /* Check to see if this board is a type that might have a Raven. */
- if ((inb(MOTOROLA_CPUTYPE_REG) & 0xF0) != 0xE0) {
- OpenPIC_Addr = NULL;
- return 0;
- }
-
- /* Check the first PCI device to see if it is a Raven. */
- early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &devid);
-
- switch (devid & 0xffff0000) {
- case MPIC_RAVEN_ID:
- MotMPIC = MOT_RAVEN_PRESENT;
- break;
- case MPIC_HAWK_ID:
- MotMPIC = MOT_HAWK_PRESENT;
- break;
- default:
- OpenPIC_Addr = NULL;
- return 0;
- }
-
-
- /* Read the memory base register. */
- early_read_config_dword(NULL, 0, 0, PCI_BASE_ADDRESS_1, &pci_membase);
-
- if (pci_membase == 0) {
- OpenPIC_Addr = NULL;
- return 0;
- }
-
- /* Map the Raven MPIC registers to virtual memory. */
- OpenPIC_Addr = ioremap(pci_membase+0xC0000000, 0x22000);
-
- OpenPIC_InitSenses = prep_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(prep_openpic_initsenses);
-
- ppc_md.get_irq = openpic_get_irq;
-
- /* If raven is present on Motorola store the system config register
- * for later use.
- */
- ProcInfo = (unsigned long *)ioremap(0xfef80400, 4);
-
- /* Indicate to system if this is a multiprocessor board */
- if (!(*ProcInfo & MOT_PROC2_BIT)) {
- mot_multi = 1;
- }
-
- /* This is a hack. If this is a 2300 or 2400 mot board then there is
- * no keyboard controller and we have to indicate that.
- */
- base_mod = inb(MOTOROLA_BASETYPE_REG);
- if ((MotMPIC == MOT_HAWK_PRESENT) || (base_mod == 0xF9) ||
- (base_mod == 0xFA) || (base_mod == 0xE1))
- prep_keybd_present = 0;
-
- return 1;
-}
-
-struct mot_info {
- int cpu_type; /* 0x100 mask assumes for Raven and Hawk boards that the level/edge are set */
- /* 0x200 if this board has a Hawk chip. */
- int base_type;
- int max_cpu; /* ored with 0x80 if this board should be checked for multi CPU */
- const char *name;
- unsigned char *map;
- unsigned char *routes;
- void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */
- struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */
- unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */
-} mot_info[] = {
- {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
- {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00},
- {0x040, 0x00, 0x00, "Blackhawk (Powerstack)", Blackhawk_pci_IRQ_map, Blackhawk_pci_IRQ_routes, NULL, NULL, 0x00},
- {0x050, 0x00, 0x00, "Omaha (PowerStack II Pro3000)", Omaha_pci_IRQ_map, Omaha_pci_IRQ_routes, NULL, NULL, 0x00},
- {0x060, 0x00, 0x00, "Utah (Powerstack II Pro4000)", Utah_pci_IRQ_map, Utah_pci_IRQ_routes, NULL, NULL, 0x00},
- {0x0A0, 0x00, 0x00, "Powerstack (Series EX)", Comet2_pci_IRQ_map, Comet2_pci_IRQ_routes, NULL, NULL, 0x00},
- {0x1E0, 0xE0, 0x00, "Mesquite cPCI (MCP750)", Mesquite_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Mesquite_pci_IRQ_list, 0xFF},
- {0x1E0, 0xE1, 0x00, "Sitka cPCI (MCPN750)", Sitka_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x1E0, 0xE2, 0x00, "Mesquite cPCI (MCP750) w/ HAC", Mesquite_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Mesquite_pci_IRQ_list, 0xC0},
- {0x1E0, 0xF6, 0x80, "MTX Plus", MTXplus_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xA0},
- {0x1E0, 0xF6, 0x81, "Dual MTX Plus", MTXplus_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xA0},
- {0x1E0, 0xF7, 0x80, "MTX wo/ Parallel Port", MTX_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
- {0x1E0, 0xF7, 0x81, "Dual MTX wo/ Parallel Port", MTX_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
- {0x1E0, 0xF8, 0x80, "MTX w/ Parallel Port", MTX_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
- {0x1E0, 0xF8, 0x81, "Dual MTX w/ Parallel Port", MTX_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
- {0x1E0, 0xF9, 0x00, "MVME 2300", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x1E0, 0xFA, 0x00, "MVME 2300SC/2600", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x1E0, 0xFB, 0x00, "MVME 2600 with MVME712M", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x1E0, 0xFC, 0x00, "MVME 2600/2700 with MVME761", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x1E0, 0xFD, 0x80, "MVME 3600 with MVME712M", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
- {0x1E0, 0xFD, 0x81, "MVME 4600 with MVME712M", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x1E0, 0xFE, 0x80, "MVME 3600 with MVME761", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x1E0, 0xFE, 0x81, "MVME 4600 with MVME761", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x1E0, 0xFF, 0x00, "MVME 1600-001 or 1600-011", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
- {0x000, 0x00, 0x00, "", NULL, NULL, NULL, NULL, 0x00}
-};
-
-void __init
-ibm_prep_init(void)
-{
- if (have_residual_data) {
- u32 addr, real_addr, len, offset;
- PPC_DEVICE *mpic;
- PnP_TAG_PACKET *pkt;
-
- /* Use the PReP residual data to determine if an OpenPIC is
- * present. If so, get the large vendor packet which will
- * tell us the base address and length in memory.
- * If we are successful, ioremap the memory area and set
- * OpenPIC_Addr (this indicates that the OpenPIC was found).
- */
- mpic = residual_find_device(-1, NULL, SystemPeripheral,
- ProgrammableInterruptController, MPIC, 0);
- if (!mpic)
- return;
-
- pkt = PnP_find_large_vendor_packet(res->DevicePnPHeap +
- mpic->AllocatedOffset, 9, 0);
-
- if (!pkt)
- return;
-
-#define p pkt->L4_Pack.L4_Data.L4_PPCPack
- if (p.PPCData[1] == 32) {
- switch (p.PPCData[0]) {
- case 1: offset = PREP_ISA_IO_BASE; break;
- case 2: offset = PREP_ISA_MEM_BASE; break;
- default: return; /* Not I/O or memory?? */
- }
- }
- else
- return; /* Not a 32-bit address */
-
- real_addr = ld_le32((unsigned int *) (p.PPCData + 4));
- if (real_addr == 0xffffffff)
- return;
-
- /* Adjust address to be as seen by CPU */
- addr = real_addr + offset;
-
- len = ld_le32((unsigned int *) (p.PPCData + 12));
- if (!len)
- return;
-#undef p
- OpenPIC_Addr = ioremap(addr, len);
- ppc_md.get_irq = openpic_get_irq;
-
- OpenPIC_InitSenses = prep_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(prep_openpic_initsenses);
-
- printk(KERN_INFO "MPIC at 0x%08x (0x%08x), length 0x%08x "
- "mapped to 0x%p\n", addr, real_addr, len, OpenPIC_Addr);
- }
-}
-
-static void __init
-ibm43p_pci_map_non0(struct pci_dev *dev)
-{
- unsigned char intpin;
- static unsigned char bridge_intrs[4] = { 3, 4, 5, 8 };
-
- if (dev == NULL)
- return;
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &intpin);
- if (intpin < 1 || intpin > 4)
- return;
- intpin = (PCI_SLOT(dev->devfn) + intpin - 1) & 3;
- dev->irq = openpic_to_irq(bridge_intrs[intpin]);
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
-}
-
-void __init
-prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
-{
- if (have_residual_data) {
- Motherboard_map_name = res->VitalProductData.PrintableModel;
- Motherboard_map = NULL;
- Motherboard_routes = NULL;
- residual_irq_mask(irq_edge_mask_lo, irq_edge_mask_hi);
- }
-}
-
-void __init
-prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
-{
- Motherboard_map_name = "IBM 6015/7020 (Sandalfoot/Sandalbow)";
- Motherboard_map = ibm6015_pci_IRQ_map;
- Motherboard_routes = ibm6015_pci_IRQ_routes;
- *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */
- *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */
-}
-
-void __init
-prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
-{
- Motherboard_map_name = "IBM Thinkpad 850/860";
- Motherboard_map = Nobis_pci_IRQ_map;
- Motherboard_routes = Nobis_pci_IRQ_routes;
- *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */
- *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */
-}
-
-void __init
-prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
-{
- Motherboard_map_name = "IBM 7248, PowerSeries 830/850 (Carolina)";
- Motherboard_map = ibm8xx_pci_IRQ_map;
- Motherboard_routes = ibm8xx_pci_IRQ_routes;
- *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */
- *irq_edge_mask_hi = 0xA4; /* IRQs 10, 13, 15 level-triggered */
-}
-
-void __init
-prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
-{
- Motherboard_map_name = "IBM 43P-140 (Tiger1)";
- Motherboard_map = ibm43p_pci_IRQ_map;
- Motherboard_routes = ibm43p_pci_IRQ_routes;
- Motherboard_non0 = ibm43p_pci_map_non0;
- *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */
- *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */
-}
-
-void __init
-prep_route_pci_interrupts(void)
-{
- unsigned char *ibc_pirq = (unsigned char *)0x80800860;
- unsigned char *ibc_pcicon = (unsigned char *)0x80800840;
- int i;
-
- if ( _prep_type == _PREP_Motorola)
- {
- unsigned short irq_mode;
- unsigned char cpu_type;
- unsigned char base_mod;
- int entry;
-
- cpu_type = inb(MOTOROLA_CPUTYPE_REG) & 0xF0;
- base_mod = inb(MOTOROLA_BASETYPE_REG);
-
- for (entry = 0; mot_info[entry].cpu_type != 0; entry++) {
- if (mot_info[entry].cpu_type & 0x200) { /* Check for Hawk chip */
- if (!(MotMPIC & MOT_HAWK_PRESENT))
- continue;
- } else { /* Check non hawk boards */
- if ((mot_info[entry].cpu_type & 0xff) != cpu_type)
- continue;
-
- if (mot_info[entry].base_type == 0) {
- mot_entry = entry;
- break;
- }
-
- if (mot_info[entry].base_type != base_mod)
- continue;
- }
-
- if (!(mot_info[entry].max_cpu & 0x80)) {
- mot_entry = entry;
- break;
- }
-
- /* processor 1 not present and max processor zero indicated */
- if ((*ProcInfo & MOT_PROC2_BIT) && !(mot_info[entry].max_cpu & 0x7f)) {
- mot_entry = entry;
- break;
- }
-
- /* processor 1 present and max processor zero indicated */
- if (!(*ProcInfo & MOT_PROC2_BIT) && (mot_info[entry].max_cpu & 0x7f)) {
- mot_entry = entry;
- break;
- }
- }
-
- if (mot_entry == -1) /* No particular cpu type found - assume Blackhawk */
- mot_entry = 3;
-
- Motherboard_map_name = (unsigned char *)mot_info[mot_entry].name;
- Motherboard_map = mot_info[mot_entry].map;
- Motherboard_routes = mot_info[mot_entry].routes;
- Motherboard_non0 = mot_info[mot_entry].map_non0_bus;
-
- if (!(mot_info[entry].cpu_type & 0x100)) {
- /* AJF adjust level/edge control according to routes */
- irq_mode = 0;
- for (i = 1; i <= 4; i++)
- irq_mode |= ( 1 << Motherboard_routes[i] );
- outb( irq_mode & 0xff, 0x4d0 );
- outb( (irq_mode >> 8) & 0xff, 0x4d1 );
- }
- } else if ( _prep_type == _PREP_IBM ) {
- unsigned char irq_edge_mask_lo, irq_edge_mask_hi;
- unsigned short irq_edge_mask;
- int i;
-
- setup_ibm_pci(&irq_edge_mask_lo, &irq_edge_mask_hi);
-
- outb(inb(0x04d0)|irq_edge_mask_lo, 0x4d0); /* primary 8259 */
- outb(inb(0x04d1)|irq_edge_mask_hi, 0x4d1); /* cascaded 8259 */
-
- irq_edge_mask = (irq_edge_mask_hi << 8) | irq_edge_mask_lo;
- for (i = 0; i < 16; ++i, irq_edge_mask >>= 1)
- if (irq_edge_mask & 1)
- irq_desc[i].status |= IRQ_LEVEL;
- } else {
- printk("No known machine pci routing!\n");
- return;
- }
-
- /* Set up mapping from slots */
- if (Motherboard_routes) {
- for (i = 1; i <= 4; i++)
- ibc_pirq[i-1] = Motherboard_routes[i];
-
- /* Enable PCI interrupts */
- *ibc_pcicon |= 0x20;
- }
-}
-
-void __init
-prep_pib_init(void)
-{
- unsigned char reg;
- unsigned short short_reg;
-
- struct pci_dev *dev = NULL;
-
- if (( _prep_type == _PREP_Motorola) && (OpenPIC_Addr)) {
- /*
- * Perform specific configuration for the Via Tech or
- * or Winbond PCI-ISA-Bridge part.
- */
- if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
- PCI_DEVICE_ID_VIA_82C586_1, dev))) {
- /*
- * PPCBUG does not set the enable bits
- * for the IDE device. Force them on here.
- */
- pci_read_config_byte(dev, 0x40, ®);
-
- reg |= 0x03; /* IDE: Chip Enable Bits */
- pci_write_config_byte(dev, 0x40, reg);
- }
- if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
- PCI_DEVICE_ID_VIA_82C586_2,
- dev)) && (dev->devfn = 0x5a)) {
- /* Force correct USB interrupt */
- dev->irq = 11;
- pci_write_config_byte(dev,
- PCI_INTERRUPT_LINE,
- dev->irq);
- }
- if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND,
- PCI_DEVICE_ID_WINBOND_83C553, dev))) {
- /* Clear PCI Interrupt Routing Control Register. */
- short_reg = 0x0000;
- pci_write_config_word(dev, 0x44, short_reg);
- if (OpenPIC_Addr){
- /* Route IDE interrupts to IRQ 14 */
- reg = 0xEE;
- pci_write_config_byte(dev, 0x43, reg);
- }
- }
- }
-
- if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND,
- PCI_DEVICE_ID_WINBOND_82C105, dev))){
- if (OpenPIC_Addr){
- /*
- * Disable LEGIRQ mode so PCI INTS are routed
- * directly to the 8259 and enable both channels
- */
- pci_write_config_dword(dev, 0x40, 0x10ff0033);
-
- /* Force correct IDE interrupt */
- dev->irq = 14;
- pci_write_config_byte(dev,
- PCI_INTERRUPT_LINE,
- dev->irq);
- } else {
- /* Enable LEGIRQ for PCI INT -> 8259 IRQ routing */
- pci_write_config_dword(dev, 0x40, 0x10ff08a1);
- }
- }
- pci_dev_put(dev);
-}
-
-static void __init
-Powerplus_Map_Non0(struct pci_dev *dev)
-{
- struct pci_bus *pbus; /* Parent bus structure pointer */
- struct pci_dev *tdev = dev; /* Temporary device structure */
- unsigned int devnum; /* Accumulated device number */
- unsigned char intline; /* Linux interrupt value */
- unsigned char intpin; /* PCI interrupt pin */
-
- /* Check for valid PCI dev pointer */
- if (dev == NULL) return;
-
- /* Initialize bridge IDSEL variable */
- devnum = PCI_SLOT(tdev->devfn);
-
- /* Read the interrupt pin of the device and adjust for indexing */
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &intpin);
-
- /* If device doesn't request an interrupt, return */
- if ( (intpin < 1) || (intpin > 4) )
- return;
-
- intpin--;
-
- /*
- * Walk up to bus 0, adjusting the interrupt pin for the standard
- * PCI bus swizzle.
- */
- do {
- intpin = (prep_pci_intpins[devnum % 4][intpin]) - 1;
- pbus = tdev->bus; /* up one level */
- tdev = pbus->self;
- devnum = PCI_SLOT(tdev->devfn);
- } while(tdev->bus->number);
-
- /* Use the primary interrupt inputs by default */
- intline = mot_info[mot_entry].pci_irq_list->primary[intpin];
-
- /*
- * If the board has secondary interrupt inputs, walk the bus and
- * note the devfn of the bridge from bus 0. If it is the same as
- * the devfn of the bus bridge with secondary inputs, use those.
- * Otherwise, assume it's a PMC site and get the interrupt line
- * value from the interrupt routing table.
- */
- if (mot_info[mot_entry].secondary_bridge_devfn) {
- pbus = dev->bus;
-
- while (pbus->primary != 0)
- pbus = pbus->parent;
-
- if ((pbus->self)->devfn != 0xA0) {
- if ((pbus->self)->devfn == mot_info[mot_entry].secondary_bridge_devfn)
- intline = mot_info[mot_entry].pci_irq_list->secondary[intpin];
- else {
- if ((char *)(mot_info[mot_entry].map) == (char *)Mesquite_pci_IRQ_map)
- intline = mot_info[mot_entry].map[((pbus->self)->devfn)/8] + 16;
- else {
- int i;
- for (i=0;i<3;i++)
- intpin = (prep_pci_intpins[devnum % 4][intpin]) - 1;
- intline = mot_info[mot_entry].pci_irq_list->primary[intpin];
- }
- }
- }
- }
-
- /* Write calculated interrupt value to header and device list */
- dev->irq = intline;
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, (u8)dev->irq);
-}
-
-void __init
-prep_pcibios_fixup(void)
-{
- struct pci_dev *dev = NULL;
- int irq;
- int have_openpic = (OpenPIC_Addr != NULL);
-
- prep_route_pci_interrupts();
-
- printk("Setting PCI interrupts for a \"%s\"\n", Motherboard_map_name);
-
- /* Iterate through all the PCI devices, setting the IRQ */
- for_each_pci_dev(dev) {
- /*
- * If we have residual data, then this is easy: query the
- * residual data for the IRQ line allocated to the device.
- * This works the same whether we have an OpenPic or not.
- */
- if (have_residual_data) {
- irq = residual_pcidev_irq(dev);
- dev->irq = have_openpic ? openpic_to_irq(irq) : irq;
- }
- /*
- * If we don't have residual data, then we need to use
- * tables to determine the IRQ. The table organisation
- * is different depending on whether there is an OpenPIC
- * or not. The tables are only used for bus 0, so check
- * this first.
- */
- else if (dev->bus->number == 0) {
- irq = Motherboard_map[PCI_SLOT(dev->devfn)];
- dev->irq = have_openpic ? openpic_to_irq(irq)
- : Motherboard_routes[irq];
- }
- /*
- * Finally, if we don't have residual data and the bus is
- * non-zero, use the callback (if provided)
- */
- else {
- if (Motherboard_non0 != NULL)
- Motherboard_non0(dev);
-
- continue;
- }
-
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
-
- /* Setup the Winbond or Via PIB - prep_pib_init() is coded for
- * the non-openpic case, but it breaks (at least) the Utah
- * (Powerstack II Pro4000), so only call it if we have an
- * openpic.
- */
- if (have_openpic)
- prep_pib_init();
-}
-
-static void __init
-prep_pcibios_after_init(void)
-{
-#if 0
- struct pci_dev *dev;
-
- /* If there is a WD 90C, reset the IO BAR to 0x0 (it started that
- * way, but the PCI layer relocated it because it thought 0x0 was
- * invalid for a BAR).
- * If you don't do this, the card's VGA base will be <IO BAR>+0xc0000
- * instead of 0xc0000. vgacon.c (for example) is completely unaware of
- * this little quirk.
- */
- dev = pci_get_device(PCI_VENDOR_ID_WD, PCI_DEVICE_ID_WD_90C, NULL);
- if (dev) {
- dev->resource[1].end -= dev->resource[1].start;
- dev->resource[1].start = 0;
- /* tell the hardware */
- pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0x0);
- pci_dev_put(dev);
- }
-#endif
-}
-
-static void __init
-prep_init_resource(struct resource *res, unsigned long start,
- unsigned long end, int flags)
-{
- res->flags = flags;
- res->start = start;
- res->end = end;
- res->name = "PCI host bridge";
- res->parent = NULL;
- res->sibling = NULL;
- res->child = NULL;
-}
-
-void __init
-prep_find_bridges(void)
-{
- struct pci_controller* hose;
-
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
- hose->pci_mem_offset = PREP_ISA_MEM_BASE;
- hose->io_base_phys = PREP_ISA_IO_BASE;
- hose->io_base_virt = ioremap(PREP_ISA_IO_BASE, 0x800000);
- prep_init_resource(&hose->io_resource, 0, 0x007fffff, IORESOURCE_IO);
- prep_init_resource(&hose->mem_resources[0], 0xc0000000, 0xfeffffff,
- IORESOURCE_MEM);
- setup_indirect_pci(hose, PREP_ISA_IO_BASE + 0xcf8,
- PREP_ISA_IO_BASE + 0xcfc);
-
- printk("PReP architecture\n");
-
- if (have_residual_data) {
- PPC_DEVICE *hostbridge;
-
- hostbridge = residual_find_device(PROCESSORDEVICE, NULL,
- BridgeController, PCIBridge, -1, 0);
- if (hostbridge &&
- ((hostbridge->DeviceId.Interface == PCIBridgeIndirect) ||
- (hostbridge->DeviceId.Interface == PCIBridgeRS6K))) {
- PnP_TAG_PACKET * pkt;
- pkt = PnP_find_large_vendor_packet(
- res->DevicePnPHeap+hostbridge->AllocatedOffset,
- 3, 0);
- if(pkt) {
-#define p pkt->L4_Pack.L4_Data.L4_PPCPack
- setup_indirect_pci(hose,
- ld_le32((unsigned *) (p.PPCData)),
- ld_le32((unsigned *) (p.PPCData+8)));
-#undef p
- } else
- setup_indirect_pci(hose, 0x80000cf8, 0x80000cfc);
- }
- }
-
- ppc_md.pcibios_fixup = prep_pcibios_fixup;
- ppc_md.pcibios_after_init = prep_pcibios_after_init;
-}
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
deleted file mode 100644
index 465b658..0000000
--- a/arch/ppc/platforms/prep_setup.c
+++ /dev/null
@@ -1,1043 +0,0 @@
-/*
- * Copyright (C) 1995 Linus Torvalds
- * Adapted from 'alpha' version by Gary Thomas
- * Modified by Cort Dougan (cort@cs.nmt.edu)
- *
- * Support for PReP (Motorola MTX/MVME)
- * by Troy Benjegerdes (hozer@drgw.net)
- */
-
-/*
- * bootup setup stuff..
- */
-
-#include <linux/delay.h>
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/screen_info.h>
-#include <linux/major.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/init.h>
-#include <linux/initrd.h>
-#include <linux/ioport.h>
-#include <linux/console.h>
-#include <linux/timex.h>
-#include <linux/pci.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-
-#include <asm/sections.h>
-#include <asm/mmu.h>
-#include <asm/processor.h>
-#include <asm/residual.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/cache.h>
-#include <asm/dma.h>
-#include <asm/machdep.h>
-#include <asm/mc146818rtc.h>
-#include <asm/mk48t59.h>
-#include <asm/prep_nvram.h>
-#include <asm/raven.h>
-#include <asm/vga.h>
-#include <asm/time.h>
-#include <asm/mpc10x.h>
-#include <asm/i8259.h>
-#include <asm/open_pic.h>
-#include <asm/pci-bridge.h>
-#include <asm/todc.h>
-
-/* prep registers for L2 */
-#define CACHECRBA 0x80000823 /* Cache configuration register address */
-#define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
-#define L2CACHE_512KB 0x00 /* 512KB */
-#define L2CACHE_256KB 0x01 /* 256KB */
-#define L2CACHE_1MB 0x02 /* 1MB */
-#define L2CACHE_NONE 0x03 /* NONE */
-#define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
-
-TODC_ALLOC();
-
-extern unsigned char prep_nvram_read_val(int addr);
-extern void prep_nvram_write_val(int addr,
- unsigned char val);
-extern unsigned char rs_nvram_read_val(int addr);
-extern void rs_nvram_write_val(int addr,
- unsigned char val);
-extern void ibm_prep_init(void);
-
-extern void prep_find_bridges(void);
-
-int _prep_type;
-
-extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
-extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
-extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
-extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
-extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
-
-
-#define cached_21 (((char *)(ppc_cached_irq_mask))[3])
-#define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
-
-extern PTE *Hash, *Hash_end;
-extern unsigned long Hash_size, Hash_mask;
-extern int probingmem;
-extern unsigned long loops_per_jiffy;
-
-/* useful ISA ports */
-#define PREP_SYSCTL 0x81c
-/* present in the IBM reference design; possibly identical in Mot boxes: */
-#define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */
-#define PREP_IBM_SIMM_PRESENCE 0x804
-#define PREP_IBM_EQUIPMENT 0x80c
-#define PREP_IBM_L2INFO 0x80d
-#define PREP_IBM_PM1 0x82a /* power management register 1 */
-#define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */
-#define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */
-
-/* Equipment Present Register masks: */
-#define PREP_IBM_EQUIPMENT_RESERVED 0x80
-#define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40
-#define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08
-#define PREP_IBM_EQUIPMENT_L2_256 0x04
-#define PREP_IBM_EQUIPMENT_CPU 0x02
-#define PREP_IBM_EQUIPMENT_L2 0x01
-
-/* planar ID values: */
-/* Sandalfoot/Sandalbow (6015/7020) */
-#define PREP_IBM_SANDALFOOT 0xfc
-/* Woodfield, Thinkpad 850/860 (6042/7249) */
-#define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */
-/* PowerSeries 830/850 (6050/6070) */
-#define PREP_IBM_CAROLINA_IDE_0 0xf0
-#define PREP_IBM_CAROLINA_IDE_1 0xf1
-#define PREP_IBM_CAROLINA_IDE_2 0xf2
-#define PREP_IBM_CAROLINA_IDE_3 0xf3
-/* 7248-43P */
-#define PREP_IBM_CAROLINA_SCSI_0 0xf4
-#define PREP_IBM_CAROLINA_SCSI_1 0xf5
-#define PREP_IBM_CAROLINA_SCSI_2 0xf6
-#define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */
-/* Tiger1 (7043-140) */
-#define PREP_IBM_TIGER1_133 0xd1
-#define PREP_IBM_TIGER1_166 0xd2
-#define PREP_IBM_TIGER1_180 0xd3
-#define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */
-#define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */
-
-/* setup_ibm_pci:
- * set Motherboard_map_name, Motherboard_map, Motherboard_routes.
- * return 8259 edge/level masks.
- */
-void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
-
-extern char *Motherboard_map_name; /* for use in *_cpuinfo */
-
-/*
- * As found in the PReP reference implementation.
- * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
- */
-static void __init
-prep_gen_enable_l2(void)
-{
- outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
-}
-
-/* Used by Carolina and Tiger1 */
-static void __init
-prep_carolina_enable_l2(void)
-{
- outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
-}
-
-/* cpuinfo code common to all IBM PReP */
-static void
-prep_ibm_cpuinfo(struct seq_file *m)
-{
- unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
-
- seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
-
- seq_printf(m, "upgrade cpu\t: ");
- if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
- seq_printf(m, "not ");
- }
- seq_printf(m, "present\n");
-
- /* print info about the SCSI fuse */
- seq_printf(m, "scsi fuse\t: ");
- if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
- seq_printf(m, "ok");
- else
- seq_printf(m, "bad");
- seq_printf(m, "\n");
-
- /* print info about SIMMs */
- if (have_residual_data) {
- int i;
- seq_printf(m, "simms\t\t: ");
- for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
- if (res->Memories[i].SIMMSize != 0)
- seq_printf(m, "%d:%ldMiB ", i,
- (res->Memories[i].SIMMSize > 1024) ?
- res->Memories[i].SIMMSize>>20 :
- res->Memories[i].SIMMSize);
- }
- seq_printf(m, "\n");
- }
-}
-
-static int
-prep_gen_cpuinfo(struct seq_file *m)
-{
- prep_ibm_cpuinfo(m);
- return 0;
-}
-
-static int
-prep_sandalfoot_cpuinfo(struct seq_file *m)
-{
- unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
-
- prep_ibm_cpuinfo(m);
-
- /* report amount and type of L2 cache present */
- seq_printf(m, "L2 cache\t: ");
- if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
- seq_printf(m, "not present");
- } else {
- if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
- seq_printf(m, "256KiB");
- else
- seq_printf(m, "unknown size");
-
- if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
- seq_printf(m, ", copy-back");
- else
- seq_printf(m, ", write-through");
- }
- seq_printf(m, "\n");
-
- return 0;
-}
-
-static int
-prep_thinkpad_cpuinfo(struct seq_file *m)
-{
- unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
- char *cpubus_speed, *pci_speed;
-
- prep_ibm_cpuinfo(m);
-
- /* report amount and type of L2 cache present */
- seq_printf(m, "l2 cache\t: ");
- if ((equip_reg & 0x1) == 0) {
- switch ((equip_reg & 0xc) >> 2) {
- case 0x0:
- seq_printf(m, "128KiB look-aside 2-way write-through\n");
- break;
- case 0x1:
- seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
- break;
- case 0x2:
- seq_printf(m, "256KiB look-aside 2-way write-through\n");
- break;
- case 0x3:
- seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
- break;
- }
- } else {
- seq_printf(m, "not present\n");
- }
-
- /* report bus speeds because we can */
- if ((equip_reg & 0x80) == 0) {
- switch ((equip_reg & 0x30) >> 4) {
- case 0x1:
- cpubus_speed = "50";
- pci_speed = "25";
- break;
- case 0x3:
- cpubus_speed = "66";
- pci_speed = "33";
- break;
- default:
- cpubus_speed = "unknown";
- pci_speed = "unknown";
- break;
- }
- } else {
- switch ((equip_reg & 0x30) >> 4) {
- case 0x1:
- cpubus_speed = "25";
- pci_speed = "25";
- break;
- case 0x2:
- cpubus_speed = "60";
- pci_speed = "30";
- break;
- case 0x3:
- cpubus_speed = "33";
- pci_speed = "33";
- break;
- default:
- cpubus_speed = "unknown";
- pci_speed = "unknown";
- break;
- }
- }
- seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
- seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
-
- return 0;
-}
-
-static int
-prep_carolina_cpuinfo(struct seq_file *m)
-{
- unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
-
- prep_ibm_cpuinfo(m);
-
- /* report amount and type of L2 cache present */
- seq_printf(m, "l2 cache\t: ");
- if ((equip_reg & 0x1) == 0) {
- unsigned int l2_reg = inb(PREP_IBM_L2INFO);
-
- /* L2 size */
- if ((l2_reg & 0x60) == 0)
- seq_printf(m, "256KiB");
- else if ((l2_reg & 0x60) == 0x20)
- seq_printf(m, "512KiB");
- else
- seq_printf(m, "unknown size");
-
- /* L2 type */
- if ((l2_reg & 0x3) == 0)
- seq_printf(m, ", async");
- else if ((l2_reg & 0x3) == 1)
- seq_printf(m, ", sync");
- else
- seq_printf(m, ", unknown type");
-
- seq_printf(m, "\n");
- } else {
- seq_printf(m, "not present\n");
- }
-
- return 0;
-}
-
-static int
-prep_tiger1_cpuinfo(struct seq_file *m)
-{
- unsigned int l2_reg = inb(PREP_IBM_L2INFO);
-
- prep_ibm_cpuinfo(m);
-
- /* report amount and type of L2 cache present */
- seq_printf(m, "l2 cache\t: ");
- if ((l2_reg & 0xf) == 0xf) {
- seq_printf(m, "not present\n");
- } else {
- if (l2_reg & 0x8)
- seq_printf(m, "async, ");
- else
- seq_printf(m, "sync burst, ");
-
- if (l2_reg & 0x4)
- seq_printf(m, "parity, ");
- else
- seq_printf(m, "no parity, ");
-
- switch (l2_reg & 0x3) {
- case 0x0:
- seq_printf(m, "256KiB\n");
- break;
- case 0x1:
- seq_printf(m, "512KiB\n");
- break;
- case 0x2:
- seq_printf(m, "1MiB\n");
- break;
- default:
- seq_printf(m, "unknown size\n");
- break;
- }
- }
-
- return 0;
-}
-
-
-/* Used by all Motorola PReP */
-static int
-prep_mot_cpuinfo(struct seq_file *m)
-{
- unsigned int cachew = *((unsigned char *)CACHECRBA);
-
- seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
-
- /* report amount and type of L2 cache present */
- seq_printf(m, "l2 cache\t: ");
- switch (cachew & L2CACHE_MASK) {
- case L2CACHE_512KB:
- seq_printf(m, "512KiB");
- break;
- case L2CACHE_256KB:
- seq_printf(m, "256KiB");
- break;
- case L2CACHE_1MB:
- seq_printf(m, "1MiB");
- break;
- case L2CACHE_NONE:
- seq_printf(m, "none\n");
- goto no_l2;
- break;
- default:
- seq_printf(m, "%x\n", cachew);
- }
-
- seq_printf(m, ", parity %s",
- (cachew & L2CACHE_PARITY)? "enabled" : "disabled");
-
- seq_printf(m, " SRAM:");
-
- switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
- case 1: seq_printf(m, "synchronous, parity, flow-through\n");
- break;
- case 2: seq_printf(m, "asynchronous, no parity\n");
- break;
- case 3: seq_printf(m, "asynchronous, parity\n");
- break;
- default:seq_printf(m, "synchronous, pipelined, no parity\n");
- break;
- }
-
-no_l2:
- /* print info about SIMMs */
- if (have_residual_data) {
- int i;
- seq_printf(m, "simms\t\t: ");
- for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
- if (res->Memories[i].SIMMSize != 0)
- seq_printf(m, "%d:%ldM ", i,
- (res->Memories[i].SIMMSize > 1024) ?
- res->Memories[i].SIMMSize>>20 :
- res->Memories[i].SIMMSize);
- }
- seq_printf(m, "\n");
- }
-
- return 0;
-}
-
-static void
-prep_restart(char *cmd)
-{
-#define PREP_SP92 0x92 /* Special Port 92 */
- local_irq_disable(); /* no interrupts */
-
- /* set exception prefix high - to the prom */
- _nmask_and_or_msr(0, MSR_IP);
-
- /* make sure bit 0 (reset) is a 0 */
- outb( inb(PREP_SP92) & ~1L , PREP_SP92);
- /* signal a reset to system control port A - soft reset */
- outb( inb(PREP_SP92) | 1 , PREP_SP92);
-
- while ( 1 ) ;
- /* not reached */
-#undef PREP_SP92
-}
-
-static void
-prep_halt(void)
-{
- local_irq_disable(); /* no interrupts */
-
- /* set exception prefix high - to the prom */
- _nmask_and_or_msr(0, MSR_IP);
-
- while ( 1 ) ;
- /* not reached */
-}
-
-/* Carrera is the power manager in the Thinkpads. Unfortunately not much is
- * known about it, so we can't power down.
- */
-static void
-prep_carrera_poweroff(void)
-{
- prep_halt();
-}
-
-/*
- * On most IBM PReP's, power management is handled by a Signetics 87c750
- * behind the Utah component on the ISA bus. To access the 750 you must write
- * a series of nibbles to port 0x82a (decoded by the Utah). This is described
- * somewhat in the IBM Carolina Technical Specification.
- * -Hollis
- */
-static void
-utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
-{
- /*
- * byte1: 0 0 0 1 0 d a5 a4
- * byte2: 0 0 0 1 a3 a2 a1 a0
- *
- * d = the bit's value, enabled or disabled
- * (a5 a4 a3) = the byte number, minus 20
- * (a2 a1 a0) = the bit number
- *
- * example: set the 5th bit of byte 21 (21.5)
- * a5 a4 a3 = 001 (byte 1)
- * a2 a1 a0 = 101 (bit 5)
- *
- * byte1 = 0001 0100 (0x14)
- * byte2 = 0001 1101 (0x1d)
- */
- unsigned char byte1=0x10, byte2=0x10;
-
- /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
- bytenum -= 20;
-
- byte1 |= (!!value) << 2; /* set d */
- byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */
-
- byte2 |= (bytenum & 0x1) << 3; /* set a3 */
- byte2 |= bitnum & 0x7; /* set a2, a1, a0 */
-
- outb(byte1, PREP_IBM_PM1); /* first nibble */
- mb();
- udelay(100); /* important: let controller recover */
-
- outb(byte2, PREP_IBM_PM1); /* second nibble */
- mb();
- udelay(100); /* important: let controller recover */
-}
-
-static void
-prep_sig750_poweroff(void)
-{
- /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
-
- local_irq_disable();
- /* set exception prefix high - to the prom */
- _nmask_and_or_msr(0, MSR_IP);
-
- utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
-
- while (1) ;
- /* not reached */
-}
-
-static int
-prep_show_percpuinfo(struct seq_file *m, int i)
-{
- /* PREP's without residual data will give incorrect values here */
- seq_printf(m, "clock\t\t: ");
- if (have_residual_data)
- seq_printf(m, "%ldMHz\n",
- (res->VitalProductData.ProcessorHz > 1024) ?
- res->VitalProductData.ProcessorHz / 1000000 :
- res->VitalProductData.ProcessorHz);
- else
- seq_printf(m, "???\n");
-
- return 0;
-}
-
-/*
- * Fill out screen_info according to the residual data. This allows us to use
- * at least vesafb.
- */
-static void __init
-prep_init_vesa(void)
-{
-#if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
- defined(CONFIG_FB_VESA))
- PPC_DEVICE *vgadev = NULL;
-
- if (have_residual_data)
- vgadev = residual_find_device(~0, NULL, DisplayController,
- SVGAController, -1, 0);
-
- if (vgadev != NULL) {
- PnP_TAG_PACKET *pkt;
-
- pkt = PnP_find_large_vendor_packet(
- (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
- 0x04, 0); /* 0x04 = Display Tag */
- if (pkt != NULL) {
- unsigned char *ptr = (unsigned char *)pkt;
-
- if (ptr[4]) {
- /* graphics mode */
- screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
-
- screen_info.lfb_depth = ptr[4] * 8;
-
- screen_info.lfb_width = swab16(*(short *)(ptr+6));
- screen_info.lfb_height = swab16(*(short *)(ptr+8));
- screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
-
- screen_info.lfb_base = swab32(*(long *)(ptr+12));
- screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
- }
- }
- }
-#endif
-}
-
-/*
- * Set DBAT 2 to access 0x80000000 so early progress messages will work
- */
-static __inline__ void
-prep_set_bat(void)
-{
- /* wait for all outstanding memory access to complete */
- mb();
-
- /* setup DBATs */
- mtspr(SPRN_DBAT2U, 0x80001ffe);
- mtspr(SPRN_DBAT2L, 0x8000002a);
-
- /* wait for updates */
- mb();
-}
-
-/*
- * IBM 3-digit status LED
- */
-static unsigned int ibm_statusled_base;
-
-static void
-ibm_statusled_progress(char *s, unsigned short hex);
-
-static int
-ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
- void * dummy3)
-{
- ibm_statusled_progress(NULL, 0x505); /* SOS */
- return NOTIFY_DONE;
-}
-
-static struct notifier_block ibm_statusled_block = {
- ibm_statusled_panic,
- NULL,
- INT_MAX /* try to do it first */
-};
-
-static void
-ibm_statusled_progress(char *s, unsigned short hex)
-{
- static int notifier_installed;
- /*
- * Progress uses 4 digits and we have only 3. So, we map 0xffff to
- * 0xfff for display switch off. Out of range values are mapped to
- * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
- * Install the panic notifier when the display is first switched off.
- */
- if (hex == 0xffff) {
- hex = 0xfff;
- if (!notifier_installed) {
- ++notifier_installed;
- atomic_notifier_chain_register(&panic_notifier_list,
- &ibm_statusled_block);
- }
- }
- else
- if (hex > 0xfff)
- hex = 0xeff;
-
- mb();
- outw(hex, ibm_statusled_base);
-}
-
-static void __init
-ibm_statusled_init(void)
-{
- /*
- * The IBM 3-digit LED display is specified in the residual data
- * as an operator panel device, type "System Status LED". Find
- * that device and determine its address. We validate all the
- * other parameters on the off-chance another, similar device
- * exists.
- */
- if (have_residual_data) {
- PPC_DEVICE *led;
- PnP_TAG_PACKET *pkt;
-
- led = residual_find_device(~0, NULL, SystemPeripheral,
- OperatorPanel, SystemStatusLED, 0);
- if (!led)
- return;
-
- pkt = PnP_find_packet((unsigned char *)
- &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
- if (!pkt)
- return;
-
- if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
- return;
- if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
- *(unsigned short *)pkt->S8_Pack.RangeMax)
- return;
- if (pkt->S8_Pack.IOAlign != 2)
- return;
- if (pkt->S8_Pack.IONum != 2)
- return;
-
- ibm_statusled_base = ld_le16((unsigned short *)
- (pkt->S8_Pack.RangeMin));
- ppc_md.progress = ibm_statusled_progress;
- }
-}
-
-static void __init
-prep_setup_arch(void)
-{
- unsigned char reg;
- int is_ide=0;
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000;
-
- /* Lookup PCI host bridges */
- prep_find_bridges();
-
- /* Set up floppy in PS/2 mode */
- outb(0x09, SIO_CONFIG_RA);
- reg = inb(SIO_CONFIG_RD);
- reg = (reg & 0x3F) | 0x40;
- outb(reg, SIO_CONFIG_RD);
- outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
-
- switch ( _prep_type )
- {
- case _PREP_IBM:
- reg = inb(PREP_IBM_PLANAR);
- printk(KERN_INFO "IBM planar ID: %02x", reg);
- switch (reg) {
- case PREP_IBM_SANDALFOOT:
- prep_gen_enable_l2();
- setup_ibm_pci = prep_sandalfoot_setup_pci;
- ppc_md.power_off = prep_sig750_poweroff;
- ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
- break;
- case PREP_IBM_THINKPAD:
- prep_gen_enable_l2();
- setup_ibm_pci = prep_thinkpad_setup_pci;
- ppc_md.power_off = prep_carrera_poweroff;
- ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
- break;
- default:
- if (have_residual_data) {
- prep_gen_enable_l2();
- setup_ibm_pci = prep_residual_setup_pci;
- ppc_md.power_off = prep_halt;
- ppc_md.show_cpuinfo = prep_gen_cpuinfo;
- break;
- }
- else
- printk(" - unknown! Assuming Carolina");
- /* fall through */
- case PREP_IBM_CAROLINA_IDE_0:
- case PREP_IBM_CAROLINA_IDE_1:
- case PREP_IBM_CAROLINA_IDE_2:
- case PREP_IBM_CAROLINA_IDE_3:
- is_ide = 1;
- case PREP_IBM_CAROLINA_SCSI_0:
- case PREP_IBM_CAROLINA_SCSI_1:
- case PREP_IBM_CAROLINA_SCSI_2:
- case PREP_IBM_CAROLINA_SCSI_3:
- prep_carolina_enable_l2();
- setup_ibm_pci = prep_carolina_setup_pci;
- ppc_md.power_off = prep_sig750_poweroff;
- ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
- break;
- case PREP_IBM_TIGER1_133:
- case PREP_IBM_TIGER1_166:
- case PREP_IBM_TIGER1_180:
- case PREP_IBM_TIGER1_xxx:
- case PREP_IBM_TIGER1_333:
- prep_carolina_enable_l2();
- setup_ibm_pci = prep_tiger1_setup_pci;
- ppc_md.power_off = prep_sig750_poweroff;
- ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
- break;
- }
- printk("\n");
-
- /* default root device */
- if (is_ide)
- ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
- else
- ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
-
- break;
- case _PREP_Motorola:
- prep_gen_enable_l2();
- ppc_md.power_off = prep_halt;
- ppc_md.show_cpuinfo = prep_mot_cpuinfo;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
- break;
- }
-
- /* Read in NVRAM data */
- init_prep_nvram();
-
- /* if no bootargs, look in NVRAM */
- if ( cmd_line[0] == '\0' ) {
- char *bootargs;
- bootargs = prep_nvram_get_var("bootargs");
- if (bootargs != NULL) {
- strcpy(cmd_line, bootargs);
- /* again.. */
- strcpy(boot_command_line, cmd_line);
- }
- }
-
- prep_init_vesa();
-
- switch (_prep_type) {
- case _PREP_Motorola:
- raven_init();
- break;
- case _PREP_IBM:
- ibm_prep_init();
- break;
- }
-
-#ifdef CONFIG_VGA_CONSOLE
- /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
- vgacon_remap_base = 0xf0000000;
- conswitchp = &vga_con;
-#endif
-}
-
-/*
- * First, see if we can get this information from the residual data.
- * This is important on some IBM PReP systems. If we cannot, we let the
- * TODC code handle doing this.
- */
-static void __init
-prep_calibrate_decr(void)
-{
- if (have_residual_data) {
- unsigned long freq, divisor = 4;
-
- if ( res->VitalProductData.ProcessorBusHz ) {
- freq = res->VitalProductData.ProcessorBusHz;
- printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
- (freq/divisor)/1000000,
- (freq/divisor)%1000000);
- tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
- tb_ticks_per_jiffy = freq / HZ / divisor;
- }
- }
- else
- todc_calibrate_decr();
-}
-
-static void __init
-prep_init_IRQ(void)
-{
- unsigned int pci_viddid, pci_did;
-
- if (OpenPIC_Addr != NULL) {
- openpic_init(NUM_8259_INTERRUPTS);
- /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
- openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
- i8259_irq);
- }
-
- if (have_residual_data) {
- i8259_init(residual_isapic_addr(), 0);
- return;
- }
-
- /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
- * controller, we poll (as they have a different int-ack address). */
- early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
- pci_did = (pci_viddid & 0xffff0000) >> 16;
- if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
- && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
- || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
- i8259_init(0, 0);
- else
- /* PCI interrupt ack address given in section 6.1.8 of the
- * PReP specification. */
- i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
-}
-
-#ifdef CONFIG_SMP
-/* PReP (MTX) support */
-static int __init
-smp_prep_probe(void)
-{
- extern int mot_multi;
-
- if (mot_multi) {
- openpic_request_IPIs();
- smp_hw_index[1] = 1;
- return 2;
- }
-
- return 1;
-}
-
-static void __init
-smp_prep_kick_cpu(int nr)
-{
- *(unsigned long *)KERNELBASE = nr;
- asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
- printk("CPU1 released, waiting\n");
-}
-
-static void __init
-smp_prep_setup_cpu(int cpu_nr)
-{
- if (OpenPIC_Addr)
- do_openpic_setup_cpu();
-}
-
-static struct smp_ops_t prep_smp_ops = {
- smp_openpic_message_pass,
- smp_prep_probe,
- smp_prep_kick_cpu,
- smp_prep_setup_cpu,
- .give_timebase = smp_generic_give_timebase,
- .take_timebase = smp_generic_take_timebase,
-};
-#endif /* CONFIG_SMP */
-
-/*
- * Setup the bat mappings we're going to load that cover
- * the io areas. RAM was mapped by mapin_ram().
- * -- Cort
- */
-static void __init
-prep_map_io(void)
-{
- io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
- io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
-}
-
-static int __init
-prep_request_io(void)
-{
-#ifdef CONFIG_NVRAM
- request_region(PREP_NVRAM_AS0, 0x8, "nvram");
-#endif
- request_region(0x00,0x20,"dma1");
- request_region(0x40,0x20,"timer");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xc0,0x20,"dma2");
-
- return 0;
-}
-
-device_initcall(prep_request_io);
-
-void __init
-prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
-#ifdef CONFIG_PREP_RESIDUAL
- /* make a copy of residual data */
- if ( r3 ) {
- memcpy((void *)res,(void *)(r3+KERNELBASE),
- sizeof(RESIDUAL));
- }
-#endif
-
- isa_io_base = PREP_ISA_IO_BASE;
- isa_mem_base = PREP_ISA_MEM_BASE;
- pci_dram_offset = PREP_PCI_DRAM_OFFSET;
- ISA_DMA_THRESHOLD = 0x00ffffff;
- DMA_MODE_READ = 0x44;
- DMA_MODE_WRITE = 0x48;
- ppc_do_canonicalize_irqs = 1;
-
- /* figure out what kind of prep workstation we are */
- if (have_residual_data) {
- if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
- _prep_type = _PREP_IBM;
- else
- _prep_type = _PREP_Motorola;
- }
- else {
- /* assume motorola if no residual (netboot?) */
- _prep_type = _PREP_Motorola;
- }
-
-#ifdef CONFIG_PREP_RESIDUAL
- /* Switch off all residual data processing if the user requests it */
- if (strstr(cmd_line, "noresidual") != NULL)
- res = NULL;
-#endif
-
- /* Initialise progress early to get maximum benefit */
- prep_set_bat();
- ibm_statusled_init();
-
- ppc_md.setup_arch = prep_setup_arch;
- ppc_md.show_percpuinfo = prep_show_percpuinfo;
- ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
- ppc_md.init_IRQ = prep_init_IRQ;
- /* this gets changed later on if we have an OpenPIC -- Cort */
- ppc_md.get_irq = i8259_irq;
-
- ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
-
- ppc_md.restart = prep_restart;
- ppc_md.power_off = NULL; /* set in prep_setup_arch() */
- ppc_md.halt = prep_halt;
-
- ppc_md.nvram_read_val = prep_nvram_read_val;
- ppc_md.nvram_write_val = prep_nvram_write_val;
-
- ppc_md.time_init = todc_time_init;
- if (_prep_type == _PREP_IBM) {
- ppc_md.rtc_read_val = todc_mc146818_read_val;
- ppc_md.rtc_write_val = todc_mc146818_write_val;
- TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
- 8);
- } else {
- TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
- PREP_NVRAM_DATA, 8);
- }
-
- ppc_md.calibrate_decr = prep_calibrate_decr;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
-
- ppc_md.setup_io_mappings = prep_map_io;
-
-#ifdef CONFIG_SMP
- smp_ops = &prep_smp_ops;
-#endif /* CONFIG_SMP */
-}
diff --git a/arch/ppc/platforms/prpmc750.c b/arch/ppc/platforms/prpmc750.c
deleted file mode 100644
index 93bd593c..0000000
--- a/arch/ppc/platforms/prpmc750.c
+++ /dev/null
@@ -1,360 +0,0 @@
-/*
- * Board setup routines for Motorola PrPMC750
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/slab.h>
-#include <linux/serial_reg.h>
-
-#include <asm/byteorder.h>
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/uaccess.h>
-#include <asm/time.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/hawk.h>
-
-#include "prpmc750.h"
-
-extern unsigned long loops_per_jiffy;
-
-extern void gen550_progress(char *, unsigned short);
-
-static u_char prpmc750_openpic_initsenses[] __initdata =
-{
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UART */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_DEBUGINT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HAWK_WDT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_ABORT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTA */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTB */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTC */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTD */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
-};
-
-/*
- * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
- * Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22.
- */
-static inline int
-prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */
- {0, 0, 0, 0}, /* IDSEL 15 - unused */
- {10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */
- {10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */
- {11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
- {0, 0, 0, 0}, /* IDSEL 19 - unused */
- {9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */
- {11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */
- {12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */
- };
- const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-};
-
-static void __init prpmc750_pcibios_fixup(void)
-{
- struct pci_dev *dev;
- unsigned short wtmp;
-
- /*
- * Kludge to clean up after PPC6BUG which doesn't
- * configure the CL5446 VGA card. Also the
- * resource subsystem doesn't fixup the
- * PCI mem resources on the CL5446.
- */
- if ((dev = pci_get_device(PCI_VENDOR_ID_CIRRUS,
- PCI_DEVICE_ID_CIRRUS_5446, 0))) {
- dev->resource[0].start += PRPMC750_PCI_PHY_MEM_OFFSET;
- dev->resource[0].end += PRPMC750_PCI_PHY_MEM_OFFSET;
- pci_read_config_word(dev, PCI_COMMAND, &wtmp);
- pci_write_config_word(dev, PCI_COMMAND, wtmp | 3);
- /* Enable Color mode in MISC reg */
- outb(0x03, 0x3c2);
- /* Select DRAM config reg */
- outb(0x0f, 0x3c4);
- /* Set proper DRAM config */
- outb(0xdf, 0x3c5);
- pci_dev_put(dev);
- }
-}
-
-void __init prpmc750_find_bridges(void)
-{
- struct pci_controller *hose;
-
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
- hose->io_base_virt = (void *)PRPMC750_ISA_IO_BASE;
- hose->pci_mem_offset = PRPMC750_PCI_PHY_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource,
- PRPMC750_PCI_IO_START,
- PRPMC750_PCI_IO_END,
- IORESOURCE_IO, "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0],
- PRPMC750_PROC_PCI_MEM_START,
- PRPMC750_PROC_PCI_MEM_END,
- IORESOURCE_MEM, "PCI host bridge");
-
- hose->io_space.start = PRPMC750_PCI_IO_START;
- hose->io_space.end = PRPMC750_PCI_IO_END;
- hose->mem_space.start = PRPMC750_PCI_MEM_START;
- hose->mem_space.end = PRPMC750_PCI_MEM_END - HAWK_MPIC_SIZE;
-
- if (hawk_init(hose, PRPMC750_HAWK_PPC_REG_BASE,
- PRPMC750_PROC_PCI_MEM_START,
- PRPMC750_PROC_PCI_MEM_END - HAWK_MPIC_SIZE,
- PRPMC750_PROC_PCI_IO_START, PRPMC750_PROC_PCI_IO_END,
- PRPMC750_PROC_PCI_MEM_END - HAWK_MPIC_SIZE + 1)
- != 0) {
- printk(KERN_CRIT "Could not initialize host bridge\n");
- }
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pcibios_fixup = prpmc750_pcibios_fixup;
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = prpmc_map_irq;
-}
-static int prpmc750_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "machine\t\t: PrPMC750\n");
-
- return 0;
-}
-
-static void __init prpmc750_setup_arch(void)
-{
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000 / HZ;
-
- /* Lookup PCI host bridges */
- prpmc750_find_bridges();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- OpenPIC_InitSenses = prpmc750_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(prpmc750_openpic_initsenses);
-
- printk(KERN_INFO "Port by MontaVista Software, Inc. "
- "(source@mvista.com)\n");
-}
-
-/*
- * Compute the PrPMC750's bus speed using the baud clock as a
- * reference.
- */
-static unsigned long __init prpmc750_get_bus_speed(void)
-{
- unsigned long tbl_start, tbl_end;
- unsigned long current_state, old_state, bus_speed;
- unsigned char lcr, dll, dlm;
- int baud_divisor, count;
-
- /* Read the UART's baud clock divisor */
- lcr = readb(PRPMC750_SERIAL_0_LCR);
- writeb(lcr | UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
- dll = readb(PRPMC750_SERIAL_0_DLL);
- dlm = readb(PRPMC750_SERIAL_0_DLM);
- writeb(lcr & ~UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
- baud_divisor = (dlm << 8) | dll;
-
- /*
- * Use the baud clock divisor and base baud clock
- * to determine the baud rate and use that as
- * the number of baud clock edges we use for
- * the time base sample. Make it half the baud
- * rate.
- */
- count = PRPMC750_BASE_BAUD / (baud_divisor * 16);
-
- /* Find the first edge of the baud clock */
- old_state = readb(PRPMC750_STATUS_REG) & PRPMC750_BAUDOUT_MASK;
- do {
- current_state = readb(PRPMC750_STATUS_REG) &
- PRPMC750_BAUDOUT_MASK;
- } while (old_state == current_state);
-
- old_state = current_state;
-
- /* Get the starting time base value */
- tbl_start = get_tbl();
-
- /*
- * Loop until we have found a number of edges equal
- * to half the count (half the baud rate)
- */
- do {
- do {
- current_state = readb(PRPMC750_STATUS_REG) &
- PRPMC750_BAUDOUT_MASK;
- } while (old_state == current_state);
- old_state = current_state;
- } while (--count);
-
- /* Get the ending time base value */
- tbl_end = get_tbl();
-
- /* Compute bus speed */
- bus_speed = (tbl_end - tbl_start) * 128;
-
- return bus_speed;
-}
-
-static void __init prpmc750_calibrate_decr(void)
-{
- unsigned long freq;
- int divisor = 4;
-
- freq = prpmc750_get_bus_speed();
-
- tb_ticks_per_jiffy = freq / (HZ * divisor);
- tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
-}
-
-static void prpmc750_restart(char *cmd)
-{
- local_irq_disable();
- writeb(PRPMC750_MODRST_MASK, PRPMC750_MODRST_REG);
- while (1) ;
-}
-
-static void prpmc750_halt(void)
-{
- local_irq_disable();
- while (1) ;
-}
-
-static void prpmc750_power_off(void)
-{
- prpmc750_halt();
-}
-
-static void __init prpmc750_init_IRQ(void)
-{
- openpic_init(0);
-}
-
-/*
- * Set BAT 3 to map 0xf0000000 to end of physical memory space.
- */
-static __inline__ void prpmc750_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT1U, 0xf0001ffe);
- mtspr(SPRN_DBAT1L, 0xf000002a);
- mb();
-}
-
-/*
- * We need to read the Falcon/Hawk memory controller
- * to properly determine this value
- */
-static unsigned long __init prpmc750_find_end_of_memory(void)
-{
- /* Read the memory size from the Hawk SMC */
- return hawk_get_mem_size(PRPMC750_HAWK_SMC_BASE);
-}
-
-static void __init prpmc750_map_io(void)
-{
- io_block_mapping(PRPMC750_ISA_IO_BASE, PRPMC750_ISA_IO_BASE,
- 0x10000000, _PAGE_IO);
-#if 0
- io_block_mapping(0xf0000000, 0xc0000000, 0x08000000, _PAGE_IO);
-#endif
- io_block_mapping(0xf8000000, 0xf8000000, 0x08000000, _PAGE_IO);
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /* Cover the Hawk registers with a BAT */
- prpmc750_set_bat();
-
- isa_io_base = PRPMC750_ISA_IO_BASE;
- isa_mem_base = PRPMC750_ISA_MEM_BASE;
- pci_dram_offset = PRPMC750_PCI_DRAM_OFFSET;
-
- ppc_md.setup_arch = prpmc750_setup_arch;
- ppc_md.show_cpuinfo = prpmc750_show_cpuinfo;
- ppc_md.init_IRQ = prpmc750_init_IRQ;
- ppc_md.get_irq = openpic_get_irq;
-
- ppc_md.find_end_of_memory = prpmc750_find_end_of_memory;
- ppc_md.setup_io_mappings = prpmc750_map_io;
-
- ppc_md.restart = prpmc750_restart;
- ppc_md.power_off = prpmc750_power_off;
- ppc_md.halt = prpmc750_halt;
-
- /* PrPMC750 has no timekeeper part */
- ppc_md.time_init = NULL;
- ppc_md.get_rtc_time = NULL;
- ppc_md.set_rtc_time = NULL;
- ppc_md.calibrate_decr = prpmc750_calibrate_decr;
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = gen550_progress;
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-}
diff --git a/arch/ppc/platforms/prpmc750.h b/arch/ppc/platforms/prpmc750.h
deleted file mode 100644
index c4dcff0..0000000
--- a/arch/ppc/platforms/prpmc750.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * arch/ppc/platforms/prpmc750.h
- *
- * Definitions for Motorola PrPMC750 board support
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_PRPMC750_H__
-#define __ASM_PRPMC750_H__
-
-/*
- * Due to limitations imposed by legacy hardware (primarily IDE controllers),
- * the PrPMC750 carrier board operates using a PReP address map.
- *
- * From Processor (physical) -> PCI:
- * PCI Mem Space: 0xc0000000 - 0xfe000000 -> 0x00000000 - 0x3e000000 (768 MB)
- * PCI I/O Space: 0x80000000 - 0x90000000 -> 0x00000000 - 0x10000000 (256 MB)
- * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
- *
- * From PCI -> Processor (physical):
- * System Memory: 0x80000000 -> 0x00000000
- */
-
-#define PRPMC750_ISA_IO_BASE PREP_ISA_IO_BASE
-#define PRPMC750_ISA_MEM_BASE PREP_ISA_MEM_BASE
-
-/* PCI Memory space mapping info */
-#define PRPMC750_PCI_MEM_SIZE 0x30000000U
-#define PRPMC750_PROC_PCI_MEM_START PRPMC750_ISA_MEM_BASE
-#define PRPMC750_PROC_PCI_MEM_END (PRPMC750_PROC_PCI_MEM_START + \
- PRPMC750_PCI_MEM_SIZE - 1)
-#define PRPMC750_PCI_MEM_START 0x00000000U
-#define PRPMC750_PCI_MEM_END (PRPMC750_PCI_MEM_START + \
- PRPMC750_PCI_MEM_SIZE - 1)
-
-/* PCI I/O space mapping info */
-#define PRPMC750_PCI_IO_SIZE 0x10000000U
-#define PRPMC750_PROC_PCI_IO_START PRPMC750_ISA_IO_BASE
-#define PRPMC750_PROC_PCI_IO_END (PRPMC750_PROC_PCI_IO_START + \
- PRPMC750_PCI_IO_SIZE - 1)
-#define PRPMC750_PCI_IO_START 0x00000000U
-#define PRPMC750_PCI_IO_END (PRPMC750_PCI_IO_START + \
- PRPMC750_PCI_IO_SIZE - 1)
-
-/* System memory mapping info */
-#define PRPMC750_PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
-#define PRPMC750_PCI_PHY_MEM_OFFSET (PRPMC750_ISA_MEM_BASE-PRPMC750_PCI_MEM_START)
-
-/* Register address definitions */
-#define PRPMC750_HAWK_SMC_BASE 0xfef80000U
-#define PRPMC750_HAWK_PPC_REG_BASE 0xfeff0000U
-
-#define PRPMC750_BASE_BAUD 1843200
-#define PRPMC750_SERIAL_0 0xfef88000
-#define PRPMC750_SERIAL_0_DLL (PRPMC750_SERIAL_0 + (UART_DLL << 4))
-#define PRPMC750_SERIAL_0_DLM (PRPMC750_SERIAL_0 + (UART_DLM << 4))
-#define PRPMC750_SERIAL_0_LCR (PRPMC750_SERIAL_0 + (UART_LCR << 4))
-
-#define PRPMC750_STATUS_REG 0xfef88080
-#define PRPMC750_BAUDOUT_MASK 0x02
-#define PRPMC750_MONARCH_MASK 0x01
-
-#define PRPMC750_MODRST_REG 0xfef880a0
-#define PRPMC750_MODRST_MASK 0x01
-
-#define PRPMC750_PIRQ_REG 0xfef880b0
-#define PRPMC750_SEL1_MASK 0x02
-#define PRPMC750_SEL0_MASK 0x01
-
-#define PRPMC750_TBEN_REG 0xfef880c0
-#define PRPMC750_TBEN_MASK 0x01
-
-/* UART Defines. */
-#define RS_TABLE_SIZE 4
-
-/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
-#define BASE_BAUD (PRPMC750_BASE_BAUD / 16)
-
-#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
-
-#define SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, PRPMC750_SERIAL_0, 1, STD_COM_FLAGS, \
- iomem_base: (unsigned char *)PRPMC750_SERIAL_0, \
- iomem_reg_shift: 4, \
- io_type: SERIAL_IO_MEM } /* ttyS0 */
-
-#endif /* __ASM_PRPMC750_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/prpmc800.c b/arch/ppc/platforms/prpmc800.c
deleted file mode 100644
index 5bcda7f..0000000
--- a/arch/ppc/platforms/prpmc800.c
+++ /dev/null
@@ -1,472 +0,0 @@
-/*
- * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/harrier_defs.h>
-
-#include <asm/byteorder.h>
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/machdep.h>
-#include <asm/time.h>
-#include <asm/pci-bridge.h>
-#include <asm/open_pic.h>
-#include <asm/bootinfo.h>
-#include <asm/harrier.h>
-
-#include "prpmc800.h"
-
-#define HARRIER_REVI_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_REVI_OFF)
-#define HARRIER_UCTL_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_UCTL_OFF)
-#define HARRIER_MISC_CSR_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_MISC_CSR_OFF)
-#define HARRIER_IFEVP_REG (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEVP_OFF)
-#define HARRIER_IFEDE_REG (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEDE_OFF)
-#define HARRIER_FEEN_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEEN_OFF)
-#define HARRIER_FEMA_REG (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEMA_OFF)
-
-#define HARRIER_VENI_REG (PRPMC800_HARRIER_XCSR_BASE + HARRIER_VENI_OFF)
-#define HARRIER_MISC_CSR (PRPMC800_HARRIER_XCSR_BASE + \
- HARRIER_MISC_CSR_OFF)
-
-#define MONARCH (monarch != 0)
-#define NON_MONARCH (monarch == 0)
-
-extern int mpic_init(void);
-extern unsigned long loops_per_jiffy;
-extern void gen550_progress(char *, unsigned short);
-
-static int monarch = 0;
-static int found_self = 0;
-static int self = 0;
-
-static u_char prpmc800_openpic_initsenses[] __initdata =
-{
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_DEBUGINT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HARRIER_WDT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HOSTINT3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTA */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTB */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTC */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_PMC_INTD */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_UNUSED */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC800_INT_HARRIER_INT (UARTS, ABORT, DMA) */
-};
-
-/*
- * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
- * Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22.
- */
-static inline int
-prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */
- {0, 0, 0, 0}, /* IDSEL 15 - unused */
- {10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */
- {10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */
- {11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
- {0, 0, 0, 0}, /* IDSEL 19 - unused */
- {9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */
- {11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */
- {12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */
- };
- const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-};
-
-static int
-prpmc_read_config_dword(struct pci_controller *hose, u8 bus, u8 devfn,
- int offset, u32 * val)
-{
- /* paranoia */
- if ((hose == NULL) ||
- (hose->cfg_addr == NULL) || (hose->cfg_data == NULL))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- out_be32(hose->cfg_addr, ((offset & 0xfc) << 24) | (devfn << 16)
- | ((bus - hose->bus_offset) << 8) | 0x80);
- *val = in_le32((u32 *) (hose->cfg_data + (offset & 3)));
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-#define HARRIER_PCI_VEND_DEV_ID (PCI_VENDOR_ID_MOTOROLA | \
- (PCI_DEVICE_ID_MOTOROLA_HARRIER << 16))
-static int prpmc_self(u8 bus, u8 devfn)
-{
- /*
- * Harriers always view themselves as being on bus 0. If we're not
- * looking at bus 0, we're not going to find ourselves.
- */
- if (bus != 0)
- return PCIBIOS_DEVICE_NOT_FOUND;
- else {
- int result;
- int val;
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
-
- /* See if target device is a Harrier */
- result = prpmc_read_config_dword(hose, bus, devfn,
- PCI_VENDOR_ID, &val);
- if ((result != PCIBIOS_SUCCESSFUL) ||
- (val != HARRIER_PCI_VEND_DEV_ID))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /*
- * LBA bit is set if target Harrier == initiating Harrier
- * (i.e. if we are reading our own PCI header).
- */
- result = prpmc_read_config_dword(hose, bus, devfn,
- HARRIER_LBA_OFF, &val);
- if ((result != PCIBIOS_SUCCESSFUL) ||
- ((val & HARRIER_LBA_MSK) != HARRIER_LBA_MSK))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- /* It's us, save our location for later */
- self = devfn;
- found_self = 1;
- return PCIBIOS_SUCCESSFUL;
- }
-}
-
-static int prpmc_exclude_device(u8 bus, u8 devfn)
-{
- /*
- * Monarch is allowed to access all PCI devices. Non-monarch is
- * only allowed to access its own Harrier.
- */
-
- if (MONARCH)
- return PCIBIOS_SUCCESSFUL;
- if (found_self)
- if ((bus == 0) && (devfn == self))
- return PCIBIOS_SUCCESSFUL;
- else
- return PCIBIOS_DEVICE_NOT_FOUND;
- else
- return prpmc_self(bus, devfn);
-}
-
-void __init prpmc800_find_bridges(void)
-{
- struct pci_controller *hose;
- int host_bridge;
-
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- ppc_md.pci_exclude_device = prpmc_exclude_device;
- ppc_md.pcibios_fixup = NULL;
- ppc_md.pcibios_fixup_bus = NULL;
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = prpmc_map_irq;
-
- setup_indirect_pci(hose,
- PRPMC800_PCI_CONFIG_ADDR, PRPMC800_PCI_CONFIG_DATA);
-
- /* Get host bridge vendor/dev id */
-
- host_bridge = in_be32((uint *) (HARRIER_VENI_REG));
-
- if (host_bridge != HARRIER_VEND_DEV_ID) {
- printk(KERN_CRIT "Host bridge 0x%x not supported\n",
- host_bridge);
- return;
- }
-
- monarch = in_be32((uint *) HARRIER_MISC_CSR) & HARRIER_SYSCON;
-
- printk(KERN_INFO "Running as %s.\n",
- MONARCH ? "Monarch" : "Non-Monarch");
-
- hose->io_space.start = PRPMC800_PCI_IO_START;
- hose->io_space.end = PRPMC800_PCI_IO_END;
- hose->io_base_virt = (void *)PRPMC800_ISA_IO_BASE;
- hose->pci_mem_offset = PRPMC800_PCI_PHY_MEM_OFFSET;
-
- pci_init_resource(&hose->io_resource,
- PRPMC800_PCI_IO_START, PRPMC800_PCI_IO_END,
- IORESOURCE_IO, "PCI host bridge");
-
- if (MONARCH) {
- hose->mem_space.start = PRPMC800_PCI_MEM_START;
- hose->mem_space.end = PRPMC800_PCI_MEM_END;
-
- pci_init_resource(&hose->mem_resources[0],
- PRPMC800_PCI_MEM_START,
- PRPMC800_PCI_MEM_END,
- IORESOURCE_MEM, "PCI host bridge");
-
- if (harrier_init(hose,
- PRPMC800_HARRIER_XCSR_BASE,
- PRPMC800_PROC_PCI_MEM_START,
- PRPMC800_PROC_PCI_MEM_END,
- PRPMC800_PROC_PCI_IO_START,
- PRPMC800_PROC_PCI_IO_END,
- PRPMC800_HARRIER_MPIC_BASE) != 0)
- printk(KERN_CRIT "Could not initialize HARRIER "
- "bridge\n");
-
- harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
- harrier_wait_eready(PRPMC800_HARRIER_XCSR_BASE);
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- } else {
- pci_init_resource(&hose->mem_resources[0],
- PRPMC800_NM_PCI_MEM_START,
- PRPMC800_NM_PCI_MEM_END,
- IORESOURCE_MEM, "PCI host bridge");
-
- hose->mem_space.start = PRPMC800_NM_PCI_MEM_START;
- hose->mem_space.end = PRPMC800_NM_PCI_MEM_END;
-
- if (harrier_init(hose,
- PRPMC800_HARRIER_XCSR_BASE,
- PRPMC800_NM_PROC_PCI_MEM_START,
- PRPMC800_NM_PROC_PCI_MEM_END,
- PRPMC800_PROC_PCI_IO_START,
- PRPMC800_PROC_PCI_IO_END,
- PRPMC800_HARRIER_MPIC_BASE) != 0)
- printk(KERN_CRIT "Could not initialize HARRIER "
- "bridge\n");
-
- harrier_setup_nonmonarch(PRPMC800_HARRIER_XCSR_BASE,
- HARRIER_ITSZ_1MB);
- harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
- }
-}
-
-static int prpmc800_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "machine\t\t: PrPMC800\n");
-
- return 0;
-}
-
-static void __init prpmc800_setup_arch(void)
-{
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000 / HZ;
-
- /* Lookup PCI host bridges */
- prpmc800_find_bridges();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA2;
-#endif
-
- printk(KERN_INFO "Port by MontaVista Software, Inc. "
- "(source@mvista.com)\n");
-}
-
-/*
- * Compute the PrPMC800's tbl frequency using the baud clock as a reference.
- */
-static void __init prpmc800_calibrate_decr(void)
-{
- unsigned long tbl_start, tbl_end;
- unsigned long current_state, old_state, tb_ticks_per_second;
- unsigned int count;
- unsigned int harrier_revision;
-
- harrier_revision = readb(HARRIER_REVI_REG);
- if (harrier_revision < 2) {
- /* XTAL64 was broken in harrier revision 1 */
- printk(KERN_INFO "time_init: Harrier revision %d, assuming "
- "100 Mhz bus\n", harrier_revision);
- tb_ticks_per_second = 100000000 / 4;
- tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
- tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
- return;
- }
-
- /*
- * The XTAL64 bit oscillates at the 1/64 the base baud clock
- * Set count to XTAL64 cycles per second. Since we'll count
- * half-cycles, we'll reach the count in half a second.
- */
- count = PRPMC800_BASE_BAUD / 64;
-
- /* Find the first edge of the baud clock */
- old_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
- do {
- current_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
- } while (old_state == current_state);
-
- old_state = current_state;
-
- /* Get the starting time base value */
- tbl_start = get_tbl();
-
- /*
- * Loop until we have found a number of edges (half-cycles)
- * equal to the count (half a second)
- */
- do {
- do {
- current_state = readb(HARRIER_UCTL_REG) &
- HARRIER_XTAL64_MASK;
- } while (old_state == current_state);
- old_state = current_state;
- } while (--count);
-
- /* Get the ending time base value */
- tbl_end = get_tbl();
-
- /* We only counted for half a second, so double to get ticks/second */
- tb_ticks_per_second = (tbl_end - tbl_start) * 2;
- tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
- tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
-}
-
-static void prpmc800_restart(char *cmd)
-{
- ulong temp;
-
- local_irq_disable();
- temp = in_be32((uint *) HARRIER_MISC_CSR_REG);
- temp |= HARRIER_RSTOUT;
- out_be32((uint *) HARRIER_MISC_CSR_REG, temp);
- while (1) ;
-}
-
-static void prpmc800_halt(void)
-{
- local_irq_disable();
- while (1) ;
-}
-
-static void prpmc800_power_off(void)
-{
- prpmc800_halt();
-}
-
-static void __init prpmc800_init_IRQ(void)
-{
- OpenPIC_InitSenses = prpmc800_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(prpmc800_openpic_initsenses);
-
- /* Setup external interrupt sources. */
- openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
- /* Setup internal UART interrupt source. */
- openpic_set_sources(16, 1, OpenPIC_Addr + 0x10200);
-
- /* Do the MPIC initialization based on the above settings. */
- openpic_init(0);
-
- /* enable functional exceptions for uarts and abort */
- out_8((u8 *) HARRIER_FEEN_REG, (HARRIER_FE_UA0 | HARRIER_FE_UA1));
- out_8((u8 *) HARRIER_FEMA_REG, ~(HARRIER_FE_UA0 | HARRIER_FE_UA1));
-}
-
-/*
- * Set BAT 3 to map 0xf0000000 to end of physical memory space.
- */
-static __inline__ void prpmc800_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT1U, 0xf0001ffe);
- mtspr(SPRN_DBAT1L, 0xf000002a);
- mb();
-}
-
-/*
- * We need to read the Harrier memory controller
- * to properly determine this value
- */
-static unsigned long __init prpmc800_find_end_of_memory(void)
-{
- /* Read the memory size from the Harrier XCSR */
- return harrier_get_mem_size(PRPMC800_HARRIER_XCSR_BASE);
-}
-
-static void __init prpmc800_map_io(void)
-{
- io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
- io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- prpmc800_set_bat();
-
- isa_io_base = PRPMC800_ISA_IO_BASE;
- isa_mem_base = PRPMC800_ISA_MEM_BASE;
- pci_dram_offset = PRPMC800_PCI_DRAM_OFFSET;
-
- ppc_md.setup_arch = prpmc800_setup_arch;
- ppc_md.show_cpuinfo = prpmc800_show_cpuinfo;
- ppc_md.init_IRQ = prpmc800_init_IRQ;
- ppc_md.get_irq = openpic_get_irq;
-
- ppc_md.find_end_of_memory = prpmc800_find_end_of_memory;
- ppc_md.setup_io_mappings = prpmc800_map_io;
-
- ppc_md.restart = prpmc800_restart;
- ppc_md.power_off = prpmc800_power_off;
- ppc_md.halt = prpmc800_halt;
-
- /* PrPMC800 has no timekeeper part */
- ppc_md.time_init = NULL;
- ppc_md.get_rtc_time = NULL;
- ppc_md.set_rtc_time = NULL;
- ppc_md.calibrate_decr = prpmc800_calibrate_decr;
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = gen550_progress;
-#else /* !CONFIG_SERIAL_TEXT_DEBUG */
- ppc_md.progress = NULL;
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-}
diff --git a/arch/ppc/platforms/prpmc800.h b/arch/ppc/platforms/prpmc800.h
deleted file mode 100644
index 26f604e..0000000
--- a/arch/ppc/platforms/prpmc800.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * arch/ppc/platforms/prpmc800.h
- *
- * Definitions for Motorola PrPMC800 board support
- *
- * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
- /*
- * From Processor to PCI:
- * PCI Mem Space: 0x80000000 - 0xa0000000 -> 0x80000000 - 0xa0000000 (512 MB)
- * PCI I/O Space: 0xfe400000 - 0xfeef0000 -> 0x00000000 - 0x00b00000 (11 MB)
- * Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
- *
- * From PCI to Processor:
- * System Memory: 0x00000000 -> 0x00000000
- */
-
-#ifndef __ASMPPC_PRPMC800_H
-#define __ASMPPC_PRPMC800_H
-
-#define PRPMC800_PCI_CONFIG_ADDR 0xfe000cf8
-#define PRPMC800_PCI_CONFIG_DATA 0xfe000cfc
-
-#define PRPMC800_PROC_PCI_IO_START 0xfe400000U
-#define PRPMC800_PROC_PCI_IO_END 0xfeefffffU
-#define PRPMC800_PCI_IO_START 0x00000000U
-#define PRPMC800_PCI_IO_END 0x00afffffU
-
-#define PRPMC800_PROC_PCI_MEM_START 0x80000000U
-#define PRPMC800_PROC_PCI_MEM_END 0x9fffffffU
-#define PRPMC800_PCI_MEM_START 0x80000000U
-#define PRPMC800_PCI_MEM_END 0x9fffffffU
-
-#define PRPMC800_NM_PROC_PCI_MEM_START 0x40000000U
-#define PRPMC800_NM_PROC_PCI_MEM_END 0xdfffffffU
-#define PRPMC800_NM_PCI_MEM_START 0x40000000U
-#define PRPMC800_NM_PCI_MEM_END 0xdfffffffU
-
-#define PRPMC800_PCI_DRAM_OFFSET 0x00000000U
-#define PRPMC800_PCI_PHY_MEM_OFFSET 0x00000000U
-
-#define PRPMC800_ISA_IO_BASE PRPMC800_PROC_PCI_IO_START
-#define PRPMC800_ISA_MEM_BASE 0x00000000U
-
-#define PRPMC800_HARRIER_XCSR_BASE HARRIER_DEFAULT_XCSR_BASE
-#define PRPMC800_HARRIER_MPIC_BASE 0xff000000
-
-#define PRPMC800_SERIAL_1 0xfeff00c0
-
-#define PRPMC800_BASE_BAUD 1843200
-
-/*
- * interrupt vector number and priority for harrier internal interrupt
- * sources
- */
-#define PRPMC800_INT_IRQ 16
-#define PRPMC800_INT_PRI 15
-
-/* UART Defines. */
-#define RS_TABLE_SIZE 4
-
-/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
-#define BASE_BAUD (PRPMC800_BASE_BAUD / 16)
-
-#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
-
-/* UARTS are at IRQ 16 */
-#define STD_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, PRPMC800_SERIAL_1, 16, STD_COM_FLAGS, /* ttyS0 */\
- iomem_base: (unsigned char *)PRPMC800_SERIAL_1, \
- iomem_reg_shift: 0, \
- io_type: SERIAL_IO_MEM },
-
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DFNS
-
-#endif /* __ASMPPC_PRPMC800_H */
diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c
deleted file mode 100644
index f1dee1e..0000000
--- a/arch/ppc/platforms/radstone_ppc7d.c
+++ /dev/null
@@ -1,1492 +0,0 @@
-/*
- * Board setup routines for the Radstone PPC7D boards.
- *
- * Author: James Chapman <jchapman@katalix.com>
- *
- * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
- * Based on code done by - Mark A. Greer <mgreer@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/* Radstone PPC7D boards are rugged VME boards with PPC 7447A CPUs,
- * Discovery-II, dual gigabit ethernet, dual PMC, USB, keyboard/mouse,
- * 4 serial ports, 2 high speed serial ports (MPSCs) and optional
- * SCSI / VGA.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/serial.h>
-#include <linux/tty.h> /* for linux/serial_core.h */
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-#include <linux/mv643xx.h>
-#include <linux/netdevice.h>
-#include <linux/platform_device.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/prom.h>
-#include <asm/smp.h>
-#include <asm/vga.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/mpc10x.h>
-#include <asm/pci-bridge.h>
-#include <asm/mv64x60.h>
-
-#include "radstone_ppc7d.h"
-
-#undef DEBUG
-
-#define PPC7D_RST_PIN 17 /* GPP17 */
-
-extern u32 mv64360_irq_base;
-extern spinlock_t rtc_lock;
-
-static struct mv64x60_handle bh;
-static int ppc7d_has_alma;
-
-extern void gen550_progress(char *, unsigned short);
-extern void gen550_init(int, struct uart_port *);
-
-/* FIXME - move to h file */
-extern int ds1337_do_command(int id, int cmd, void *arg);
-#define DS1337_GET_DATE 0
-#define DS1337_SET_DATE 1
-
-/* residual data */
-unsigned char __res[sizeof(bd_t)];
-
-/*****************************************************************************
- * Serial port code
- *****************************************************************************/
-
-#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
-static void __init ppc7d_early_serial_map(void)
-{
-#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
- mv64x60_progress_init(CONFIG_MV64X60_NEW_BASE);
-#elif defined(CONFIG_SERIAL_8250)
- struct uart_port serial_req;
-
- /* Setup serial port access */
- memset(&serial_req, 0, sizeof(serial_req));
- serial_req.uartclk = UART_CLK;
- serial_req.irq = 4;
- serial_req.flags = STD_COM_FLAGS;
- serial_req.iotype = UPIO_MEM;
- serial_req.membase = (u_char *) PPC7D_SERIAL_0;
-
- gen550_init(0, &serial_req);
- if (early_serial_setup(&serial_req) != 0)
- printk(KERN_ERR "Early serial init of port 0 failed\n");
-
- /* Assume early_serial_setup() doesn't modify serial_req */
- serial_req.line = 1;
- serial_req.irq = 3;
- serial_req.membase = (u_char *) PPC7D_SERIAL_1;
-
- gen550_init(1, &serial_req);
- if (early_serial_setup(&serial_req) != 0)
- printk(KERN_ERR "Early serial init of port 1 failed\n");
-#else
-#error CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG has no supported CONFIG_SERIAL_XXX
-#endif
-}
-#endif /* CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG */
-
-/*****************************************************************************
- * Low-level board support code
- *****************************************************************************/
-
-static unsigned long __init ppc7d_find_end_of_memory(void)
-{
- bd_t *bp = (bd_t *) __res;
-
- if (bp->bi_memsize)
- return bp->bi_memsize;
-
- return (256 * 1024 * 1024);
-}
-
-static void __init ppc7d_map_io(void)
-{
- /* remove temporary mapping */
- mtspr(SPRN_DBAT3U, 0x00000000);
- mtspr(SPRN_DBAT3L, 0x00000000);
-
- io_block_mapping(0xe8000000, 0xe8000000, 0x08000000, _PAGE_IO);
- io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
-}
-
-static void ppc7d_restart(char *cmd)
-{
- u32 data;
-
- /* Disable GPP17 interrupt */
- data = mv64x60_read(&bh, MV64x60_GPP_INTR_MASK);
- data &= ~(1 << PPC7D_RST_PIN);
- mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, data);
-
- /* Configure MPP17 as GPP */
- data = mv64x60_read(&bh, MV64x60_MPP_CNTL_2);
- data &= ~(0x0000000f << 4);
- mv64x60_write(&bh, MV64x60_MPP_CNTL_2, data);
-
- /* Enable pin GPP17 for output */
- data = mv64x60_read(&bh, MV64x60_GPP_IO_CNTL);
- data |= (1 << PPC7D_RST_PIN);
- mv64x60_write(&bh, MV64x60_GPP_IO_CNTL, data);
-
- /* Toggle GPP9 pin to reset the board */
- mv64x60_write(&bh, MV64x60_GPP_VALUE_CLR, 1 << PPC7D_RST_PIN);
- mv64x60_write(&bh, MV64x60_GPP_VALUE_SET, 1 << PPC7D_RST_PIN);
-
- for (;;) ; /* Spin until reset happens */
- /* NOTREACHED */
-}
-
-static void ppc7d_power_off(void)
-{
- u32 data;
-
- local_irq_disable();
-
- /* Ensure that internal MV643XX watchdog is disabled.
- * The Disco watchdog uses MPP17 on this hardware.
- */
- data = mv64x60_read(&bh, MV64x60_MPP_CNTL_2);
- data &= ~(0x0000000f << 4);
- mv64x60_write(&bh, MV64x60_MPP_CNTL_2, data);
-
- data = mv64x60_read(&bh, MV64x60_WDT_WDC);
- if (data & 0x80000000) {
- mv64x60_write(&bh, MV64x60_WDT_WDC, 1 << 24);
- mv64x60_write(&bh, MV64x60_WDT_WDC, 2 << 24);
- }
-
- for (;;) ; /* No way to shut power off with software */
- /* NOTREACHED */
-}
-
-static void ppc7d_halt(void)
-{
- ppc7d_power_off();
- /* NOTREACHED */
-}
-
-static unsigned long ppc7d_led_no_pulse;
-
-static int __init ppc7d_led_pulse_disable(char *str)
-{
- ppc7d_led_no_pulse = 1;
- return 1;
-}
-
-/* This kernel option disables the heartbeat pulsing of a board LED */
-__setup("ledoff", ppc7d_led_pulse_disable);
-
-static void ppc7d_heartbeat(void)
-{
- u32 data32;
- u8 data8;
- static int max706_wdog = 0;
-
- /* Unfortunately we can't access the LED control registers
- * during early init because they're on the CPLD which is the
- * other side of a PCI bridge which goes unreachable during
- * PCI scan. So write the LEDs only if the MV64360 watchdog is
- * enabled (i.e. userspace apps are running so kernel is up)..
- */
- data32 = mv64x60_read(&bh, MV64x60_WDT_WDC);
- if (data32 & 0x80000000) {
- /* Enable MAX706 watchdog if not done already */
- if (!max706_wdog) {
- outb(3, PPC7D_CPLD_RESET);
- max706_wdog = 1;
- }
-
- /* Hit the MAX706 watchdog */
- outb(0, PPC7D_CPLD_WATCHDOG_TRIG);
-
- /* Pulse LED DS219 if not disabled */
- if (!ppc7d_led_no_pulse) {
- static int led_on = 0;
-
- data8 = inb(PPC7D_CPLD_LEDS);
- if (led_on)
- data8 &= ~PPC7D_CPLD_LEDS_DS219_MASK;
- else
- data8 |= PPC7D_CPLD_LEDS_DS219_MASK;
-
- outb(data8, PPC7D_CPLD_LEDS);
- led_on = !led_on;
- }
- }
- ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
-}
-
-static int ppc7d_show_cpuinfo(struct seq_file *m)
-{
- u8 val;
- u8 val1, val2;
- static int flash_sizes[4] = { 64, 32, 0, 16 };
- static int flash_banks[4] = { 4, 3, 2, 1 };
- static int sdram_bank_sizes[4] = { 128, 256, 512, 1 };
- int sdram_num_banks = 2;
- static char *pci_modes[] = { "PCI33", "PCI66",
- "Unknown", "Unknown",
- "PCIX33", "PCIX66",
- "PCIX100", "PCIX133"
- };
-
- seq_printf(m, "vendor\t\t: Radstone Technology\n");
- seq_printf(m, "machine\t\t: PPC7D\n");
-
- val = inb(PPC7D_CPLD_BOARD_REVISION);
- val1 = (val & PPC7D_CPLD_BOARD_REVISION_NUMBER_MASK) >> 5;
- val2 = (val & PPC7D_CPLD_BOARD_REVISION_LETTER_MASK);
- seq_printf(m, "revision\t: %hd%c%c\n",
- val1,
- (val2 <= 0x18) ? 'A' + val2 : 'Y',
- (val2 > 0x18) ? 'A' + (val2 - 0x19) : ' ');
-
- val = inb(PPC7D_CPLD_MOTHERBOARD_TYPE);
- val1 = val & PPC7D_CPLD_MB_TYPE_PLL_MASK;
- val2 = val & (PPC7D_CPLD_MB_TYPE_ECC_FITTED_MASK |
- PPC7D_CPLD_MB_TYPE_ECC_ENABLE_MASK);
- seq_printf(m, "bus speed\t: %dMHz\n",
- (val1 == PPC7D_CPLD_MB_TYPE_PLL_133) ? 133 :
- (val1 == PPC7D_CPLD_MB_TYPE_PLL_100) ? 100 :
- (val1 == PPC7D_CPLD_MB_TYPE_PLL_64) ? 64 : 0);
-
- val = inb(PPC7D_CPLD_MEM_CONFIG);
- if (val & PPC7D_CPLD_SDRAM_BANK_NUM_MASK) sdram_num_banks--;
-
- val = inb(PPC7D_CPLD_MEM_CONFIG_EXTEND);
- val1 = (val & PPC7D_CPLD_SDRAM_BANK_SIZE_MASK) >> 6;
- seq_printf(m, "SDRAM\t\t: %d banks of %d%c, total %d%c",
- sdram_num_banks,
- sdram_bank_sizes[val1],
- (sdram_bank_sizes[val1] < 128) ? 'G' : 'M',
- sdram_num_banks * sdram_bank_sizes[val1],
- (sdram_bank_sizes[val1] < 128) ? 'G' : 'M');
- if (val2 & PPC7D_CPLD_MB_TYPE_ECC_FITTED_MASK) {
- seq_printf(m, " [ECC %sabled]",
- (val2 & PPC7D_CPLD_MB_TYPE_ECC_ENABLE_MASK) ? "en" :
- "dis");
- }
- seq_printf(m, "\n");
-
- val1 = (val & PPC7D_CPLD_FLASH_DEV_SIZE_MASK);
- val2 = (val & PPC7D_CPLD_FLASH_BANK_NUM_MASK) >> 2;
- seq_printf(m, "FLASH\t\t: %d banks of %dM, total %dM\n",
- flash_banks[val2], flash_sizes[val1],
- flash_banks[val2] * flash_sizes[val1]);
-
- val = inb(PPC7D_CPLD_FLASH_WRITE_CNTL);
- val1 = inb(PPC7D_CPLD_SW_FLASH_WRITE_PROTECT);
- seq_printf(m, " write links\t: %s%s%s%s\n",
- (val & PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK) ? "WRITE " : "",
- (val & PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK) ? "BOOT " : "",
- (val & PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK) ? "USER " : "",
- (val & (PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK |
- PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK |
- PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK)) ==
- 0 ? "NONE" : "");
- seq_printf(m, " write sector h/w enables: %s%s%s%s%s\n",
- (val & PPD7D_CPLD_FLASH_CNTL_RECO_WR_MASK) ? "RECOVERY " :
- "",
- (val & PPD7D_CPLD_FLASH_CNTL_BOOT_WR_MASK) ? "BOOT " : "",
- (val & PPD7D_CPLD_FLASH_CNTL_USER_WR_MASK) ? "USER " : "",
- (val1 & PPC7D_CPLD_FLASH_CNTL_NVRAM_PROT_MASK) ? "NVRAM " :
- "",
- (((val &
- (PPD7D_CPLD_FLASH_CNTL_RECO_WR_MASK |
- PPD7D_CPLD_FLASH_CNTL_BOOT_WR_MASK |
- PPD7D_CPLD_FLASH_CNTL_BOOT_WR_MASK)) == 0)
- && ((val1 & PPC7D_CPLD_FLASH_CNTL_NVRAM_PROT_MASK) ==
- 0)) ? "NONE" : "");
- val1 =
- inb(PPC7D_CPLD_SW_FLASH_WRITE_PROTECT) &
- (PPC7D_CPLD_SW_FLASH_WRPROT_SYSBOOT_MASK |
- PPC7D_CPLD_SW_FLASH_WRPROT_USER_MASK);
- seq_printf(m, " software sector enables: %s%s%s\n",
- (val1 & PPC7D_CPLD_SW_FLASH_WRPROT_SYSBOOT_MASK) ? "SYSBOOT "
- : "",
- (val1 & PPC7D_CPLD_SW_FLASH_WRPROT_USER_MASK) ? "USER " : "",
- (val1 == 0) ? "NONE " : "");
-
- seq_printf(m, "Boot options\t: %s%s%s%s\n",
- (val & PPC7D_CPLD_FLASH_CNTL_ALTBOOT_LINK_MASK) ?
- "ALTERNATE " : "",
- (val & PPC7D_CPLD_FLASH_CNTL_VMEBOOT_LINK_MASK) ? "VME " :
- "",
- (val & PPC7D_CPLD_FLASH_CNTL_RECBOOT_LINK_MASK) ? "RECOVERY "
- : "",
- ((val &
- (PPC7D_CPLD_FLASH_CNTL_ALTBOOT_LINK_MASK |
- PPC7D_CPLD_FLASH_CNTL_VMEBOOT_LINK_MASK |
- PPC7D_CPLD_FLASH_CNTL_RECBOOT_LINK_MASK)) ==
- 0) ? "NONE" : "");
-
- val = inb(PPC7D_CPLD_EQUIPMENT_PRESENT_1);
- seq_printf(m, "Fitted modules\t: %s%s%s%s\n",
- (val & PPC7D_CPLD_EQPT_PRES_1_PMC1_MASK) ? "" : "PMC1 ",
- (val & PPC7D_CPLD_EQPT_PRES_1_PMC2_MASK) ? "" : "PMC2 ",
- (val & PPC7D_CPLD_EQPT_PRES_1_AFIX_MASK) ? "AFIX " : "",
- ((val & (PPC7D_CPLD_EQPT_PRES_1_PMC1_MASK |
- PPC7D_CPLD_EQPT_PRES_1_PMC2_MASK |
- PPC7D_CPLD_EQPT_PRES_1_AFIX_MASK)) ==
- (PPC7D_CPLD_EQPT_PRES_1_PMC1_MASK |
- PPC7D_CPLD_EQPT_PRES_1_PMC2_MASK)) ? "NONE" : "");
-
- if (val & PPC7D_CPLD_EQPT_PRES_1_AFIX_MASK) {
- static const char *ids[] = {
- "unknown",
- "1553 (Dual Channel)",
- "1553 (Single Channel)",
- "8-bit SCSI + VGA",
- "16-bit SCSI + VGA",
- "1553 (Single Channel with sideband)",
- "1553 (Dual Channel with sideband)",
- NULL
- };
- u8 id = __raw_readb((void *)PPC7D_AFIX_REG_BASE + 0x03);
- seq_printf(m, "AFIX module\t: 0x%hx [%s]\n", id,
- id < 7 ? ids[id] : "unknown");
- }
-
- val = inb(PPC7D_CPLD_PCI_CONFIG);
- val1 = (val & PPC7D_CPLD_PCI_CONFIG_PCI0_MASK) >> 4;
- val2 = (val & PPC7D_CPLD_PCI_CONFIG_PCI1_MASK);
- seq_printf(m, "PCI#0\t\t: %s\nPCI#1\t\t: %s\n",
- pci_modes[val1], pci_modes[val2]);
-
- val = inb(PPC7D_CPLD_EQUIPMENT_PRESENT_2);
- seq_printf(m, "PMC1\t\t: %s\nPMC2\t\t: %s\n",
- (val & PPC7D_CPLD_EQPT_PRES_3_PMC1_V_MASK) ? "3.3v" : "5v",
- (val & PPC7D_CPLD_EQPT_PRES_3_PMC2_V_MASK) ? "3.3v" : "5v");
- seq_printf(m, "PMC power source: %s\n",
- (val & PPC7D_CPLD_EQPT_PRES_3_PMC_POWER_MASK) ? "VME" :
- "internal");
-
- val = inb(PPC7D_CPLD_EQUIPMENT_PRESENT_4);
- val2 = inb(PPC7D_CPLD_EQUIPMENT_PRESENT_2);
- seq_printf(m, "Fit options\t: %s%s%s%s%s%s%s\n",
- (val & PPC7D_CPLD_EQPT_PRES_4_LPT_MASK) ? "LPT " : "",
- (val & PPC7D_CPLD_EQPT_PRES_4_PS2_FITTED) ? "PS2 " : "",
- (val & PPC7D_CPLD_EQPT_PRES_4_USB2_FITTED) ? "USB2 " : "",
- (val2 & PPC7D_CPLD_EQPT_PRES_2_UNIVERSE_MASK) ? "VME " : "",
- (val2 & PPC7D_CPLD_EQPT_PRES_2_COM36_MASK) ? "COM3-6 " : "",
- (val2 & PPC7D_CPLD_EQPT_PRES_2_GIGE_MASK) ? "eth0 " : "",
- (val2 & PPC7D_CPLD_EQPT_PRES_2_DUALGIGE_MASK) ? "eth1 " :
- "");
-
- val = inb(PPC7D_CPLD_ID_LINK);
- val1 = val & (PPC7D_CPLD_ID_LINK_E6_MASK |
- PPC7D_CPLD_ID_LINK_E7_MASK |
- PPC7D_CPLD_ID_LINK_E12_MASK |
- PPC7D_CPLD_ID_LINK_E13_MASK);
-
- val = inb(PPC7D_CPLD_FLASH_WRITE_CNTL) &
- (PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK |
- PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK |
- PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK);
-
- seq_printf(m, "Board links present: %s%s%s%s%s%s%s%s\n",
- (val1 & PPC7D_CPLD_ID_LINK_E6_MASK) ? "E6 " : "",
- (val1 & PPC7D_CPLD_ID_LINK_E7_MASK) ? "E7 " : "",
- (val & PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK) ? "E9 " : "",
- (val & PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK) ? "E10 " : "",
- (val & PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK) ? "E11 " : "",
- (val1 & PPC7D_CPLD_ID_LINK_E12_MASK) ? "E12 " : "",
- (val1 & PPC7D_CPLD_ID_LINK_E13_MASK) ? "E13 " : "",
- ((val == 0) && (val1 == 0)) ? "NONE" : "");
-
- val = inb(PPC7D_CPLD_WDOG_RESETSW_MASK);
- seq_printf(m, "Front panel reset switch: %sabled\n",
- (val & PPC7D_CPLD_WDOG_RESETSW_MASK) ? "dis" : "en");
-
- return 0;
-}
-
-static void __init ppc7d_calibrate_decr(void)
-{
- ulong freq;
-
- freq = 100000000 / 4;
-
- pr_debug("time_init: decrementer frequency = %lu.%.6lu MHz\n",
- freq / 1000000, freq % 1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-}
-
-/*****************************************************************************
- * Interrupt stuff
- *****************************************************************************/
-
-static irqreturn_t ppc7d_i8259_intr(int irq, void *dev_id)
-{
- u32 temp = mv64x60_read(&bh, MV64x60_GPP_INTR_CAUSE);
- if (temp & (1 << 28)) {
- i8259_irq();
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, temp & (~(1 << 28)));
- return IRQ_HANDLED;
- }
-
- return IRQ_NONE;
-}
-
-/*
- * Each interrupt cause is assigned an IRQ number.
- * Southbridge has 16*2 (two 8259's) interrupts.
- * Discovery-II has 96 interrupts (cause-hi, cause-lo, gpp x 32).
- * If multiple interrupts are pending, get_irq() returns the
- * lowest pending irq number first.
- *
- *
- * IRQ # Source Trig Active
- * =============================================================
- *
- * Southbridge
- * -----------
- * IRQ # Source Trig
- * =============================================================
- * 0 ISA High Resolution Counter Edge
- * 1 Keyboard Edge
- * 2 Cascade From (IRQ 8-15) Edge
- * 3 Com 2 (Uart 2) Edge
- * 4 Com 1 (Uart 1) Edge
- * 5 PCI Int D/AFIX IRQZ ID4 (2,7) Level
- * 6 GPIO Level
- * 7 LPT Edge
- * 8 RTC Alarm Edge
- * 9 PCI Int A/PMC 2/AFIX IRQW ID1 (2,0) Level
- * 10 PCI Int B/PMC 1/AFIX IRQX ID2 (2,1) Level
- * 11 USB2 Level
- * 12 Mouse Edge
- * 13 Reserved internally by Ali M1535+
- * 14 PCI Int C/VME/AFIX IRQY ID3 (2,6) Level
- * 15 COM 5/6 Level
- *
- * 16..112 Discovery-II...
- *
- * MPP28 Southbridge Edge High
- *
- *
- * Interrupts are cascaded through to the Discovery-II.
- *
- * PCI ---
- * \
- * CPLD --> ALI1535 -------> DISCOVERY-II
- * INTF MPP28
- */
-static void __init ppc7d_init_irq(void)
-{
- int irq;
-
- pr_debug("%s\n", __func__);
- i8259_init(0, 0);
- mv64360_init_irq();
-
- /* IRQs 5,6,9,10,11,14,15 are level sensitive */
- irq_desc[5].status |= IRQ_LEVEL;
- irq_desc[6].status |= IRQ_LEVEL;
- irq_desc[9].status |= IRQ_LEVEL;
- irq_desc[10].status |= IRQ_LEVEL;
- irq_desc[11].status |= IRQ_LEVEL;
- irq_desc[14].status |= IRQ_LEVEL;
- irq_desc[15].status |= IRQ_LEVEL;
-
- /* GPP28 is edge triggered */
- irq_desc[mv64360_irq_base + MV64x60_IRQ_GPP28].status &= ~IRQ_LEVEL;
-}
-
-static u32 ppc7d_irq_canonicalize(u32 irq)
-{
- if ((irq >= 16) && (irq < (16 + 96)))
- irq -= 16;
-
- return irq;
-}
-
-static int ppc7d_get_irq(void)
-{
- int irq;
-
- irq = mv64360_get_irq();
- if (irq == (mv64360_irq_base + MV64x60_IRQ_GPP28))
- irq = i8259_irq();
- return irq;
-}
-
-/*
- * 9 PCI Int A/PMC 2/AFIX IRQW ID1 (2,0) Level
- * 10 PCI Int B/PMC 1/AFIX IRQX ID2 (2,1) Level
- * 14 PCI Int C/VME/AFIX IRQY ID3 (2,6) Level
- * 5 PCI Int D/AFIX IRQZ ID4 (2,7) Level
- */
-static int __init ppc7d_map_irq(struct pci_dev *dev, unsigned char idsel,
- unsigned char pin)
-{
- static const char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {10, 14, 5, 9}, /* IDSEL 10 - PMC2 / AFIX IRQW */
- {9, 10, 14, 5}, /* IDSEL 11 - PMC1 / AFIX IRQX */
- {5, 9, 10, 14}, /* IDSEL 12 - AFIX IRQY */
- {14, 5, 9, 10}, /* IDSEL 13 - AFIX IRQZ */
- };
- const long min_idsel = 10, max_idsel = 14, irqs_per_slot = 4;
-
- pr_debug("%s: %04x/%04x/%x: idsel=%hx pin=%hu\n", __func__,
- dev->vendor, dev->device, PCI_FUNC(dev->devfn), idsel, pin);
-
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-void __init ppc7d_intr_setup(void)
-{
- u32 data;
-
- /*
- * Define GPP 28 interrupt polarity as active high
- * input signal and level triggered
- */
- data = mv64x60_read(&bh, MV64x60_GPP_LEVEL_CNTL);
- data &= ~(1 << 28);
- mv64x60_write(&bh, MV64x60_GPP_LEVEL_CNTL, data);
- data = mv64x60_read(&bh, MV64x60_GPP_IO_CNTL);
- data &= ~(1 << 28);
- mv64x60_write(&bh, MV64x60_GPP_IO_CNTL, data);
-
- /* Config GPP intr ctlr to respond to level trigger */
- data = mv64x60_read(&bh, MV64x60_COMM_ARBITER_CNTL);
- data |= (1 << 10);
- mv64x60_write(&bh, MV64x60_COMM_ARBITER_CNTL, data);
-
- /* XXXX Erranum FEr PCI-#8 */
- data = mv64x60_read(&bh, MV64x60_PCI0_CMD);
- data &= ~((1 << 5) | (1 << 9));
- mv64x60_write(&bh, MV64x60_PCI0_CMD, data);
- data = mv64x60_read(&bh, MV64x60_PCI1_CMD);
- data &= ~((1 << 5) | (1 << 9));
- mv64x60_write(&bh, MV64x60_PCI1_CMD, data);
-
- /*
- * Dismiss and then enable interrupt on GPP interrupt cause
- * for CPU #0
- */
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, ~(1 << 28));
- data = mv64x60_read(&bh, MV64x60_GPP_INTR_MASK);
- data |= (1 << 28);
- mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, data);
-
- /*
- * Dismiss and then enable interrupt on CPU #0 high cause reg
- * BIT27 summarizes GPP interrupts 23-31
- */
- mv64x60_write(&bh, MV64360_IC_MAIN_CAUSE_HI, ~(1 << 27));
- data = mv64x60_read(&bh, MV64360_IC_CPU0_INTR_MASK_HI);
- data |= (1 << 27);
- mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_HI, data);
-}
-
-/*****************************************************************************
- * Platform device data fixup routines.
- *****************************************************************************/
-
-#if defined(CONFIG_SERIAL_MPSC)
-static void __init ppc7d_fixup_mpsc_pdata(struct platform_device *pdev)
-{
- struct mpsc_pdata *pdata;
-
- pdata = (struct mpsc_pdata *)pdev->dev.platform_data;
-
- pdata->max_idle = 40;
- pdata->default_baud = PPC7D_DEFAULT_BAUD;
- pdata->brg_clk_src = PPC7D_MPSC_CLK_SRC;
- pdata->brg_clk_freq = PPC7D_MPSC_CLK_FREQ;
-
- return;
-}
-#endif
-
-#if defined(CONFIG_MV643XX_ETH)
-static void __init ppc7d_fixup_eth_pdata(struct platform_device *pdev)
-{
- struct mv643xx_eth_platform_data *eth_pd;
- static u16 phy_addr[] = {
- PPC7D_ETH0_PHY_ADDR,
- PPC7D_ETH1_PHY_ADDR,
- PPC7D_ETH2_PHY_ADDR,
- };
- int i;
-
- eth_pd = pdev->dev.platform_data;
- eth_pd->force_phy_addr = 1;
- eth_pd->phy_addr = phy_addr[pdev->id];
- eth_pd->tx_queue_size = PPC7D_ETH_TX_QUEUE_SIZE;
- eth_pd->rx_queue_size = PPC7D_ETH_RX_QUEUE_SIZE;
-
- /* Adjust IRQ by mv64360_irq_base */
- for (i = 0; i < pdev->num_resources; i++) {
- struct resource *r = &pdev->resource[i];
-
- if (r->flags & IORESOURCE_IRQ) {
- r->start += mv64360_irq_base;
- r->end += mv64360_irq_base;
- pr_debug("%s, uses IRQ %d\n", pdev->name,
- (int)r->start);
- }
- }
-
-}
-#endif
-
-#if defined(CONFIG_I2C_MV64XXX)
-static void __init
-ppc7d_fixup_i2c_pdata(struct platform_device *pdev)
-{
- struct mv64xxx_i2c_pdata *pdata;
- int i;
-
- pdata = pdev->dev.platform_data;
- if (pdata == NULL) {
- pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
- if (pdata == NULL)
- return;
-
- pdev->dev.platform_data = pdata;
- }
-
- /* divisors M=8, N=3 for 100kHz I2C from 133MHz system clock */
- pdata->freq_m = 8;
- pdata->freq_n = 3;
- pdata->timeout = 500;
- pdata->retries = 3;
-
- /* Adjust IRQ by mv64360_irq_base */
- for (i = 0; i < pdev->num_resources; i++) {
- struct resource *r = &pdev->resource[i];
-
- if (r->flags & IORESOURCE_IRQ) {
- r->start += mv64360_irq_base;
- r->end += mv64360_irq_base;
- pr_debug("%s, uses IRQ %d\n", pdev->name, (int) r->start);
- }
- }
-}
-#endif
-
-static int ppc7d_platform_notify(struct device *dev)
-{
- static struct {
- char *bus_id;
- void ((*rtn) (struct platform_device * pdev));
- } dev_map[] = {
-#if defined(CONFIG_SERIAL_MPSC)
- { MPSC_CTLR_NAME ".0", ppc7d_fixup_mpsc_pdata },
- { MPSC_CTLR_NAME ".1", ppc7d_fixup_mpsc_pdata },
-#endif
-#if defined(CONFIG_MV643XX_ETH)
- { MV643XX_ETH_NAME ".0", ppc7d_fixup_eth_pdata },
- { MV643XX_ETH_NAME ".1", ppc7d_fixup_eth_pdata },
- { MV643XX_ETH_NAME ".2", ppc7d_fixup_eth_pdata },
-#endif
-#if defined(CONFIG_I2C_MV64XXX)
- { MV64XXX_I2C_CTLR_NAME ".0", ppc7d_fixup_i2c_pdata },
-#endif
- };
- struct platform_device *pdev;
- int i;
-
- if (dev && dev->bus_id)
- for (i = 0; i < ARRAY_SIZE(dev_map); i++)
- if (!strncmp(dev->bus_id, dev_map[i].bus_id,
- BUS_ID_SIZE)) {
-
- pdev = container_of(dev,
- struct platform_device,
- dev);
- dev_map[i].rtn(pdev);
- }
-
- return 0;
-}
-
-/*****************************************************************************
- * PCI device fixups.
- * These aren't really fixups per se. They are used to init devices as they
- * are found during PCI scan.
- *
- * The PPC7D has an HB8 PCI-X bridge which must be set up during a PCI
- * scan in order to find other devices on its secondary side.
- *****************************************************************************/
-
-static void __init ppc7d_fixup_hb8(struct pci_dev *dev)
-{
- u16 val16;
-
- if (dev->bus->number == 0) {
- pr_debug("PCI: HB8 init\n");
-
- pci_write_config_byte(dev, 0x1c,
- ((PPC7D_PCI0_IO_START_PCI_ADDR & 0xf000)
- >> 8) | 0x01);
- pci_write_config_byte(dev, 0x1d,
- (((PPC7D_PCI0_IO_START_PCI_ADDR +
- PPC7D_PCI0_IO_SIZE -
- 1) & 0xf000) >> 8) | 0x01);
- pci_write_config_word(dev, 0x30,
- PPC7D_PCI0_IO_START_PCI_ADDR >> 16);
- pci_write_config_word(dev, 0x32,
- ((PPC7D_PCI0_IO_START_PCI_ADDR +
- PPC7D_PCI0_IO_SIZE -
- 1) >> 16) & 0xffff);
-
- pci_write_config_word(dev, 0x20,
- PPC7D_PCI0_MEM0_START_PCI_LO_ADDR >> 16);
- pci_write_config_word(dev, 0x22,
- ((PPC7D_PCI0_MEM0_START_PCI_LO_ADDR +
- PPC7D_PCI0_MEM0_SIZE -
- 1) >> 16) & 0xffff);
- pci_write_config_word(dev, 0x24, 0);
- pci_write_config_word(dev, 0x26, 0);
- pci_write_config_dword(dev, 0x28, 0);
- pci_write_config_dword(dev, 0x2c, 0);
-
- pci_read_config_word(dev, 0x3e, &val16);
- val16 |= ((1 << 5) | (1 << 1)); /* signal master aborts and
- * SERR to primary
- */
- val16 &= ~(1 << 2); /* ISA disable, so all ISA
- * ports forwarded to secondary
- */
- pci_write_config_word(dev, 0x3e, val16);
- }
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_HINT, 0x0028, ppc7d_fixup_hb8);
-
-/* This should perhaps be a separate driver as we're actually initializing
- * the chip for this board here. It's hardly a fixup...
- */
-static void __init ppc7d_fixup_ali1535(struct pci_dev *dev)
-{
- pr_debug("PCI: ALI1535 init\n");
-
- if (dev->bus->number == 1) {
- /* Configure the ISA Port Settings */
- pci_write_config_byte(dev, 0x43, 0x00);
-
- /* Disable PCI Interrupt polling mode */
- pci_write_config_byte(dev, 0x45, 0x00);
-
- /* Multifunction pin select INTFJ -> INTF */
- pci_write_config_byte(dev, 0x78, 0x00);
-
- /* Set PCI INT -> IRQ Routing control in for external
- * pins south bridge.
- */
- pci_write_config_byte(dev, 0x48, 0x31); /* [7-4] INT B -> IRQ10
- * [3-0] INT A -> IRQ9
- */
- pci_write_config_byte(dev, 0x49, 0x5D); /* [7-4] INT D -> IRQ5
- * [3-0] INT C -> IRQ14
- */
-
- /* PPC7D setup */
- /* NEC USB device on IRQ 11 (INTE) - INTF disabled */
- pci_write_config_byte(dev, 0x4A, 0x09);
-
- /* GPIO on IRQ 6 */
- pci_write_config_byte(dev, 0x76, 0x07);
-
- /* SIRQ I (COMS 5/6) use IRQ line 15.
- * Positive (not subtractive) address decode.
- */
- pci_write_config_byte(dev, 0x44, 0x0f);
-
- /* SIRQ II disabled */
- pci_write_config_byte(dev, 0x75, 0x0);
-
- /* On board USB and RTC disabled */
- pci_write_config_word(dev, 0x52, (1 << 14));
- pci_write_config_byte(dev, 0x74, 0x00);
-
- /* On board IDE disabled */
- pci_write_config_byte(dev, 0x58, 0x00);
-
- /* Decode 32-bit addresses */
- pci_write_config_byte(dev, 0x5b, 0);
-
- /* Disable docking IO */
- pci_write_config_word(dev, 0x5c, 0x0000);
-
- /* Disable modem, enable sound */
- pci_write_config_byte(dev, 0x77, (1 << 6));
-
- /* Disable hot-docking mode */
- pci_write_config_byte(dev, 0x7d, 0x00);
- }
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1533, ppc7d_fixup_ali1535);
-
-static int ppc7d_pci_exclude_device(u8 bus, u8 devfn)
-{
- /* Early versions of this board were fitted with IBM ALMA
- * PCI-VME bridge chips. The PCI config space of these devices
- * was not set up correctly and causes PCI scan problems.
- */
- if ((bus == 1) && (PCI_SLOT(devfn) == 4) && ppc7d_has_alma)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- return mv64x60_pci_exclude_device(bus, devfn);
-}
-
-/* This hook is called when each PCI bus is probed.
- */
-static void ppc7d_pci_fixup_bus(struct pci_bus *bus)
-{
- pr_debug("PCI BUS %hu: %lx/%lx %lx/%lx %lx/%lx %lx/%lx\n",
- bus->number,
- bus->resource[0] ? bus->resource[0]->start : 0,
- bus->resource[0] ? bus->resource[0]->end : 0,
- bus->resource[1] ? bus->resource[1]->start : 0,
- bus->resource[1] ? bus->resource[1]->end : 0,
- bus->resource[2] ? bus->resource[2]->start : 0,
- bus->resource[2] ? bus->resource[2]->end : 0,
- bus->resource[3] ? bus->resource[3]->start : 0,
- bus->resource[3] ? bus->resource[3]->end : 0);
-
- if ((bus->number == 1) && (bus->resource[2] != NULL)) {
- /* Hide PCI window 2 of Bus 1 which is used only to
- * map legacy ISA memory space.
- */
- bus->resource[2]->start = 0;
- bus->resource[2]->end = 0;
- bus->resource[2]->flags = 0;
- }
-}
-
-/*****************************************************************************
- * Board device setup code
- *****************************************************************************/
-
-void __init ppc7d_setup_peripherals(void)
-{
- u32 val32;
-
- /* Set up windows for boot CS */
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2BOOT_WIN,
- PPC7D_BOOT_WINDOW_BASE, PPC7D_BOOT_WINDOW_SIZE,
- 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2BOOT_WIN);
-
- /* Boot firmware configures the following DevCS addresses.
- * DevCS0 - board control/status
- * DevCS1 - test registers
- * DevCS2 - AFIX port/address registers (for identifying)
- * DevCS3 - FLASH
- *
- * We don't use DevCS0, DevCS1.
- */
- val32 = mv64x60_read(&bh, MV64360_CPU_BAR_ENABLE);
- val32 |= ((1 << 4) | (1 << 5));
- mv64x60_write(&bh, MV64360_CPU_BAR_ENABLE, val32);
- mv64x60_write(&bh, MV64x60_CPU2DEV_0_BASE, 0);
- mv64x60_write(&bh, MV64x60_CPU2DEV_0_SIZE, 0);
- mv64x60_write(&bh, MV64x60_CPU2DEV_1_BASE, 0);
- mv64x60_write(&bh, MV64x60_CPU2DEV_1_SIZE, 0);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_2_WIN,
- PPC7D_AFIX_REG_BASE, PPC7D_AFIX_REG_SIZE, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_2_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2DEV_3_WIN,
- PPC7D_FLASH_BASE, PPC7D_FLASH_SIZE_ACTUAL, 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_3_WIN);
-
- mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN,
- PPC7D_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE,
- 0);
- bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN);
-
- /* Set up Enet->SRAM window */
- mv64x60_set_32bit_window(&bh, MV64x60_ENET2MEM_4_WIN,
- PPC7D_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE,
- 0x2);
- bh.ci->enable_window_32bit(&bh, MV64x60_ENET2MEM_4_WIN);
-
- /* Give enet r/w access to memory region */
- val32 = mv64x60_read(&bh, MV64360_ENET2MEM_ACC_PROT_0);
- val32 |= (0x3 << (4 << 1));
- mv64x60_write(&bh, MV64360_ENET2MEM_ACC_PROT_0, val32);
- val32 = mv64x60_read(&bh, MV64360_ENET2MEM_ACC_PROT_1);
- val32 |= (0x3 << (4 << 1));
- mv64x60_write(&bh, MV64360_ENET2MEM_ACC_PROT_1, val32);
- val32 = mv64x60_read(&bh, MV64360_ENET2MEM_ACC_PROT_2);
- val32 |= (0x3 << (4 << 1));
- mv64x60_write(&bh, MV64360_ENET2MEM_ACC_PROT_2, val32);
-
- val32 = mv64x60_read(&bh, MV64x60_TIMR_CNTR_0_3_CNTL);
- val32 &= ~((1 << 0) | (1 << 8) | (1 << 16) | (1 << 24));
- mv64x60_write(&bh, MV64x60_TIMR_CNTR_0_3_CNTL, val32);
-
- /* Enumerate pci bus.
- *
- * We scan PCI#0 first (the bus with the HB8 and other
- * on-board peripherals). We must configure the 64360 before
- * each scan, according to the bus number assignments. Busses
- * are assigned incrementally, starting at 0. PCI#0 is
- * usually assigned bus#0, the secondary side of the HB8 gets
- * bus#1 and PCI#1 (second PMC site) gets bus#2. However, if
- * any PMC card has a PCI bridge, these bus assignments will
- * change.
- */
-
- /* Turn off PCI retries */
- val32 = mv64x60_read(&bh, MV64x60_CPU_CONFIG);
- val32 |= (1 << 17);
- mv64x60_write(&bh, MV64x60_CPU_CONFIG, val32);
-
- /* Scan PCI#0 */
- mv64x60_set_bus(&bh, 0, 0);
- bh.hose_a->first_busno = 0;
- bh.hose_a->last_busno = 0xff;
- bh.hose_a->last_busno = pciauto_bus_scan(bh.hose_a, 0);
- printk(KERN_INFO "PCI#0: first=%d last=%d\n",
- bh.hose_a->first_busno, bh.hose_a->last_busno);
-
- /* Scan PCI#1 */
- bh.hose_b->first_busno = bh.hose_a->last_busno + 1;
- mv64x60_set_bus(&bh, 1, bh.hose_b->first_busno);
- bh.hose_b->last_busno = 0xff;
- bh.hose_b->last_busno = pciauto_bus_scan(bh.hose_b,
- bh.hose_b->first_busno);
- printk(KERN_INFO "PCI#1: first=%d last=%d\n",
- bh.hose_b->first_busno, bh.hose_b->last_busno);
-
- /* Turn on PCI retries */
- val32 = mv64x60_read(&bh, MV64x60_CPU_CONFIG);
- val32 &= ~(1 << 17);
- mv64x60_write(&bh, MV64x60_CPU_CONFIG, val32);
-
- /* Setup interrupts */
- ppc7d_intr_setup();
-}
-
-static void __init ppc7d_setup_bridge(void)
-{
- struct mv64x60_setup_info si;
- int i;
- u32 temp;
-
- mv64360_irq_base = 16; /* first 16 intrs are 2 x 8259's */
-
- memset(&si, 0, sizeof(si));
-
- si.phys_reg_base = CONFIG_MV64X60_NEW_BASE;
-
- si.pci_0.enable_bus = 1;
- si.pci_0.pci_io.cpu_base = PPC7D_PCI0_IO_START_PROC_ADDR;
- si.pci_0.pci_io.pci_base_hi = 0;
- si.pci_0.pci_io.pci_base_lo = PPC7D_PCI0_IO_START_PCI_ADDR;
- si.pci_0.pci_io.size = PPC7D_PCI0_IO_SIZE;
- si.pci_0.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_mem[0].cpu_base = PPC7D_PCI0_MEM0_START_PROC_ADDR;
- si.pci_0.pci_mem[0].pci_base_hi = PPC7D_PCI0_MEM0_START_PCI_HI_ADDR;
- si.pci_0.pci_mem[0].pci_base_lo = PPC7D_PCI0_MEM0_START_PCI_LO_ADDR;
- si.pci_0.pci_mem[0].size = PPC7D_PCI0_MEM0_SIZE;
- si.pci_0.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_mem[1].cpu_base = PPC7D_PCI0_MEM1_START_PROC_ADDR;
- si.pci_0.pci_mem[1].pci_base_hi = PPC7D_PCI0_MEM1_START_PCI_HI_ADDR;
- si.pci_0.pci_mem[1].pci_base_lo = PPC7D_PCI0_MEM1_START_PCI_LO_ADDR;
- si.pci_0.pci_mem[1].size = PPC7D_PCI0_MEM1_SIZE;
- si.pci_0.pci_mem[1].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_0.pci_cmd_bits = 0;
- si.pci_0.latency_timer = 0x80;
-
- si.pci_1.enable_bus = 1;
- si.pci_1.pci_io.cpu_base = PPC7D_PCI1_IO_START_PROC_ADDR;
- si.pci_1.pci_io.pci_base_hi = 0;
- si.pci_1.pci_io.pci_base_lo = PPC7D_PCI1_IO_START_PCI_ADDR;
- si.pci_1.pci_io.size = PPC7D_PCI1_IO_SIZE;
- si.pci_1.pci_io.swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_mem[0].cpu_base = PPC7D_PCI1_MEM0_START_PROC_ADDR;
- si.pci_1.pci_mem[0].pci_base_hi = PPC7D_PCI1_MEM0_START_PCI_HI_ADDR;
- si.pci_1.pci_mem[0].pci_base_lo = PPC7D_PCI1_MEM0_START_PCI_LO_ADDR;
- si.pci_1.pci_mem[0].size = PPC7D_PCI1_MEM0_SIZE;
- si.pci_1.pci_mem[0].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_mem[1].cpu_base = PPC7D_PCI1_MEM1_START_PROC_ADDR;
- si.pci_1.pci_mem[1].pci_base_hi = PPC7D_PCI1_MEM1_START_PCI_HI_ADDR;
- si.pci_1.pci_mem[1].pci_base_lo = PPC7D_PCI1_MEM1_START_PCI_LO_ADDR;
- si.pci_1.pci_mem[1].size = PPC7D_PCI1_MEM1_SIZE;
- si.pci_1.pci_mem[1].swap = MV64x60_CPU2PCI_SWAP_NONE;
- si.pci_1.pci_cmd_bits = 0;
- si.pci_1.latency_timer = 0x80;
-
- /* Don't clear the SRAM window since we use it for debug */
- si.window_preserve_mask_32_lo = (1 << MV64x60_CPU2SRAM_WIN);
-
- printk(KERN_INFO "PCI: MV64360 PCI#0 IO at %x, size %x\n",
- si.pci_0.pci_io.cpu_base, si.pci_0.pci_io.size);
- printk(KERN_INFO "PCI: MV64360 PCI#1 IO at %x, size %x\n",
- si.pci_1.pci_io.cpu_base, si.pci_1.pci_io.size);
-
- for (i = 0; i < MV64x60_CPU2MEM_WINDOWS; i++) {
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- si.cpu_prot_options[i] = 0;
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_NONE;
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_NONE;
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_NONE;
-
- si.pci_0.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_NONE |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_NONE |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_128_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES;
-#else
- si.cpu_prot_options[i] = 0;
- /* All PPC7D hardware uses B0 or newer MV64360 silicon which
- * does not have snoop bugs.
- */
- si.enet_options[i] = MV64360_ENET2MEM_SNOOP_WB;
- si.mpsc_options[i] = MV64360_MPSC2MEM_SNOOP_WB;
- si.idma_options[i] = MV64360_IDMA2MEM_SNOOP_WB;
-
- si.pci_0.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_WB |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES;
-
- si.pci_1.acc_cntl_options[i] =
- MV64360_PCI_ACC_CNTL_SNOOP_WB |
- MV64360_PCI_ACC_CNTL_SWAP_NONE |
- MV64360_PCI_ACC_CNTL_MBURST_32_BYTES |
- MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES;
-#endif
- }
-
- /* Lookup PCI host bridges */
- if (mv64x60_init(&bh, &si))
- printk(KERN_ERR "MV64360 initialization failed.\n");
-
- pr_debug("MV64360 regs @ %lx/%p\n", bh.p_base, bh.v_base);
-
- /* Enable WB Cache coherency on SRAM */
- temp = mv64x60_read(&bh, MV64360_SRAM_CONFIG);
- pr_debug("SRAM_CONFIG: %x\n", temp);
-#if defined(CONFIG_NOT_COHERENT_CACHE)
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, temp & ~0x2);
-#else
- mv64x60_write(&bh, MV64360_SRAM_CONFIG, temp | 0x2);
-#endif
- /* If system operates with internal bus arbiter (CPU master
- * control bit8) clear AACK Delay bit [25] in CPU
- * configuration register.
- */
- temp = mv64x60_read(&bh, MV64x60_CPU_MASTER_CNTL);
- if (temp & (1 << 8)) {
- temp = mv64x60_read(&bh, MV64x60_CPU_CONFIG);
- mv64x60_write(&bh, MV64x60_CPU_CONFIG, (temp & ~(1 << 25)));
- }
-
- /* Data and address parity is enabled */
- temp = mv64x60_read(&bh, MV64x60_CPU_CONFIG);
- mv64x60_write(&bh, MV64x60_CPU_CONFIG,
- (temp | (1 << 26) | (1 << 19)));
-
- pci_dram_offset = 0; /* sys mem at same addr on PCI & cpu bus */
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = ppc7d_map_irq;
- ppc_md.pci_exclude_device = ppc7d_pci_exclude_device;
-
- mv64x60_set_bus(&bh, 0, 0);
- bh.hose_a->first_busno = 0;
- bh.hose_a->last_busno = 0xff;
- bh.hose_a->mem_space.start = PPC7D_PCI0_MEM0_START_PCI_LO_ADDR;
- bh.hose_a->mem_space.end =
- PPC7D_PCI0_MEM0_START_PCI_LO_ADDR + PPC7D_PCI0_MEM0_SIZE;
-
- /* These will be set later, as a result of PCI0 scan */
- bh.hose_b->first_busno = 0;
- bh.hose_b->last_busno = 0xff;
- bh.hose_b->mem_space.start = PPC7D_PCI1_MEM0_START_PCI_LO_ADDR;
- bh.hose_b->mem_space.end =
- PPC7D_PCI1_MEM0_START_PCI_LO_ADDR + PPC7D_PCI1_MEM0_SIZE;
-
- pr_debug("MV64360: PCI#0 IO decode %08x/%08x IO remap %08x\n",
- mv64x60_read(&bh, 0x48), mv64x60_read(&bh, 0x50),
- mv64x60_read(&bh, 0xf0));
-}
-
-static void __init ppc7d_setup_arch(void)
-{
- int port;
-
- loops_per_jiffy = 100000000 / HZ;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- if ((cur_cpu_spec->cpu_features & CPU_FTR_SPEC7450) ||
- (cur_cpu_spec->cpu_features & CPU_FTR_L3CR))
- /* 745x is different. We only want to pass along enable. */
- _set_L2CR(L2CR_L2E);
- else if (cur_cpu_spec->cpu_features & CPU_FTR_L2CR)
- /* All modules have 1MB of L2. We also assume that an
- * L2 divisor of 3 will work.
- */
- _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3
- | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF);
-
- if (cur_cpu_spec->cpu_features & CPU_FTR_L3CR)
- /* No L3 cache */
- _set_L3CR(0);
-
-#ifdef CONFIG_DUMMY_CONSOLE
- conswitchp = &dummy_con;
-#endif
-
- /* Lookup PCI host bridges */
- if (ppc_md.progress)
- ppc_md.progress("ppc7d_setup_arch: calling setup_bridge", 0);
-
- ppc7d_setup_bridge();
- ppc7d_setup_peripherals();
-
- /* Disable ethernet. It might have been setup by the bootrom */
- for (port = 0; port < 3; port++)
- mv64x60_write(&bh, MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(port),
- 0x0000ff00);
-
- /* Clear queue pointers to ensure they are all initialized,
- * otherwise since queues 1-7 are unused, they have random
- * pointers which look strange in register dumps. Don't bother
- * with queue 0 since it will be initialized later.
- */
- for (port = 0; port < 3; port++) {
- mv64x60_write(&bh,
- MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_1(port),
- 0x00000000);
- mv64x60_write(&bh,
- MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_2(port),
- 0x00000000);
- mv64x60_write(&bh,
- MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_3(port),
- 0x00000000);
- mv64x60_write(&bh,
- MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_4(port),
- 0x00000000);
- mv64x60_write(&bh,
- MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_5(port),
- 0x00000000);
- mv64x60_write(&bh,
- MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_6(port),
- 0x00000000);
- mv64x60_write(&bh,
- MV643XX_ETH_RX_CURRENT_QUEUE_DESC_PTR_7(port),
- 0x00000000);
- }
-
- printk(KERN_INFO "Radstone Technology PPC7D\n");
- if (ppc_md.progress)
- ppc_md.progress("ppc7d_setup_arch: exit", 0);
-
-}
-
-/* Real Time Clock support.
- * PPC7D has a DS1337 accessed by I2C.
- */
-static ulong ppc7d_get_rtc_time(void)
-{
- struct rtc_time tm;
- int result;
-
- spin_lock(&rtc_lock);
- result = ds1337_do_command(0, DS1337_GET_DATE, &tm);
- spin_unlock(&rtc_lock);
-
- if (result == 0)
- result = mktime(tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
-
- return result;
-}
-
-static int ppc7d_set_rtc_time(unsigned long nowtime)
-{
- struct rtc_time tm;
- int result;
-
- spin_lock(&rtc_lock);
- to_tm(nowtime, &tm);
- result = ds1337_do_command(0, DS1337_SET_DATE, &tm);
- spin_unlock(&rtc_lock);
-
- return result;
-}
-
-/* This kernel command line parameter can be used to have the target
- * wait for a JTAG debugger to attach. Of course, a JTAG debugger
- * with hardware breakpoint support can have the target stop at any
- * location during init, but this is a convenience feature that makes
- * it easier in the common case of loading the code using the ppcboot
- * bootloader..
- */
-static unsigned long ppc7d_wait_debugger;
-
-static int __init ppc7d_waitdbg(char *str)
-{
- ppc7d_wait_debugger = 1;
- return 1;
-}
-
-__setup("waitdbg", ppc7d_waitdbg);
-
-/* Second phase board init, called after other (architecture common)
- * low-level services have been initialized.
- */
-static void ppc7d_init2(void)
-{
- unsigned long flags;
- u32 data;
- u8 data8;
-
- pr_debug("%s: enter\n", __func__);
-
- /* Wait for debugger? */
- if (ppc7d_wait_debugger) {
- printk("Waiting for debugger...\n");
-
- while (readl(&ppc7d_wait_debugger)) ;
- }
-
- /* Hook up i8259 interrupt which is connected to GPP28 */
- request_irq(mv64360_irq_base + MV64x60_IRQ_GPP28, ppc7d_i8259_intr,
- IRQF_DISABLED, "I8259 (GPP28) interrupt", (void *)0);
-
- /* Configure MPP16 as watchdog NMI, MPP17 as watchdog WDE */
- spin_lock_irqsave(&mv64x60_lock, flags);
- data = mv64x60_read(&bh, MV64x60_MPP_CNTL_2);
- data &= ~(0x0000000f << 0);
- data |= (0x00000004 << 0);
- data &= ~(0x0000000f << 4);
- data |= (0x00000004 << 4);
- mv64x60_write(&bh, MV64x60_MPP_CNTL_2, data);
- spin_unlock_irqrestore(&mv64x60_lock, flags);
-
- /* All LEDs off */
- data8 = inb(PPC7D_CPLD_LEDS);
- data8 &= ~0x08;
- data8 |= 0x07;
- outb(data8, PPC7D_CPLD_LEDS);
-
- /* Hook up RTC. We couldn't do this earlier because we need the I2C subsystem */
- ppc_md.set_rtc_time = ppc7d_set_rtc_time;
- ppc_md.get_rtc_time = ppc7d_get_rtc_time;
-
- pr_debug("%s: exit\n", __func__);
-}
-
-/* Called from machine_init(), early, before any of the __init functions
- * have run. We must init software-configurable pins before other functions
- * such as interrupt controllers are initialised.
- */
-void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- u8 val8;
- u8 rev_num;
-
- /* Map 0xe0000000-0xffffffff early because we need access to SRAM
- * and the ISA memory space (for serial port) here. This mapping
- * is redone properly in ppc7d_map_io() later.
- */
- mtspr(SPRN_DBAT3U, 0xe0003fff);
- mtspr(SPRN_DBAT3L, 0xe000002a);
-
- /*
- * Zero SRAM. Note that this generates parity errors on
- * internal data path in SRAM if it's first time accessing it
- * after reset.
- *
- * We do this ASAP to avoid parity errors when reading
- * uninitialized SRAM.
- */
- memset((void *)PPC7D_INTERNAL_SRAM_BASE, 0, MV64360_SRAM_SIZE);
-
- pr_debug("platform_init: r3-r7: %lx %lx %lx %lx %lx\n",
- r3, r4, r5, r6, r7);
-
- parse_bootinfo(find_bootinfo());
-
- /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer)
- * are non-zero, then we should use the board info from the bd_t
- * structure and the cmdline pointed to by r6 instead of the
- * information from birecs, if any. Otherwise, use the information
- * from birecs as discovered by the preceding call to
- * parse_bootinfo(). This rule should work with both PPCBoot, which
- * uses a bd_t board info structure, and the kernel boot wrapper,
- * which uses birecs.
- */
- if (r3 && r6) {
- bd_t *bp = (bd_t *) __res;
-
- /* copy board info structure */
- memcpy((void *)__res, (void *)(r3 + KERNELBASE), sizeof(bd_t));
- /* copy command line */
- *(char *)(r7 + KERNELBASE) = 0;
- strcpy(cmd_line, (char *)(r6 + KERNELBASE));
-
- printk(KERN_INFO "Board info data:-\n");
- printk(KERN_INFO " Internal freq: %lu MHz, bus freq: %lu MHz\n",
- bp->bi_intfreq, bp->bi_busfreq);
- printk(KERN_INFO " Memory: %lx, size %lx\n", bp->bi_memstart,
- bp->bi_memsize);
- printk(KERN_INFO " Console baudrate: %lu\n", bp->bi_baudrate);
- printk(KERN_INFO " Ethernet address: "
- "%02x:%02x:%02x:%02x:%02x:%02x\n",
- bp->bi_enetaddr[0], bp->bi_enetaddr[1],
- bp->bi_enetaddr[2], bp->bi_enetaddr[3],
- bp->bi_enetaddr[4], bp->bi_enetaddr[5]);
- }
-#ifdef CONFIG_BLK_DEV_INITRD
- /* take care of initrd if we have one */
- if (r4) {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- printk(KERN_INFO "INITRD @ %lx/%lx\n", initrd_start, initrd_end);
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- /* Map in board regs, etc. */
- isa_io_base = 0xe8000000;
- isa_mem_base = 0xe8000000;
- pci_dram_offset = 0x00000000;
- ISA_DMA_THRESHOLD = 0x00ffffff;
- DMA_MODE_READ = 0x44;
- DMA_MODE_WRITE = 0x48;
-
- ppc_md.setup_arch = ppc7d_setup_arch;
- ppc_md.init = ppc7d_init2;
- ppc_md.show_cpuinfo = ppc7d_show_cpuinfo;
- /* XXX this is broken... */
- ppc_md.irq_canonicalize = ppc7d_irq_canonicalize;
- ppc_md.init_IRQ = ppc7d_init_irq;
- ppc_md.get_irq = ppc7d_get_irq;
-
- ppc_md.restart = ppc7d_restart;
- ppc_md.power_off = ppc7d_power_off;
- ppc_md.halt = ppc7d_halt;
-
- ppc_md.find_end_of_memory = ppc7d_find_end_of_memory;
- ppc_md.setup_io_mappings = ppc7d_map_io;
-
- ppc_md.time_init = NULL;
- ppc_md.set_rtc_time = NULL;
- ppc_md.get_rtc_time = NULL;
- ppc_md.calibrate_decr = ppc7d_calibrate_decr;
- ppc_md.nvram_read_val = NULL;
- ppc_md.nvram_write_val = NULL;
-
- ppc_md.heartbeat = ppc7d_heartbeat;
- ppc_md.heartbeat_reset = HZ;
- ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
-
- ppc_md.pcibios_fixup_bus = ppc7d_pci_fixup_bus;
-
-#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) || \
- defined(CONFIG_I2C_MV64XXX)
- platform_notify = ppc7d_platform_notify;
-#endif
-
-#ifdef CONFIG_SERIAL_MPSC
- /* On PPC7D, we must configure MPSC support via CPLD control
- * registers.
- */
- outb(PPC7D_CPLD_RTS_COM4_SCLK |
- PPC7D_CPLD_RTS_COM56_ENABLED, PPC7D_CPLD_RTS);
- outb(PPC7D_CPLD_COMS_COM3_TCLKEN |
- PPC7D_CPLD_COMS_COM3_TXEN |
- PPC7D_CPLD_COMS_COM4_TCLKEN |
- PPC7D_CPLD_COMS_COM4_TXEN, PPC7D_CPLD_COMS);
-#endif /* CONFIG_SERIAL_MPSC */
-
-#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
- ppc7d_early_serial_map();
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-#if defined(CONFIG_SERIAL_MPSC_CONSOLE)
- ppc_md.progress = mv64x60_mpsc_progress;
-#elif defined(CONFIG_SERIAL_8250)
- ppc_md.progress = gen550_progress;
-#else
-#error CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG has no supported CONFIG_SERIAL_XXX
-#endif /* CONFIG_SERIAL_8250 */
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-#endif /* CONFIG_KGDB || CONFIG_SERIAL_TEXT_DEBUG */
-
- /* Enable write access to user flash. This is necessary for
- * flash probe.
- */
- val8 = readb((void *)isa_io_base + PPC7D_CPLD_SW_FLASH_WRITE_PROTECT);
- writeb(val8 | (PPC7D_CPLD_SW_FLASH_WRPROT_ENABLED &
- PPC7D_CPLD_SW_FLASH_WRPROT_USER_MASK),
- (void *)isa_io_base + PPC7D_CPLD_SW_FLASH_WRITE_PROTECT);
-
- /* Determine if this board has IBM ALMA VME devices */
- val8 = readb((void *)isa_io_base + PPC7D_CPLD_BOARD_REVISION);
- rev_num = (val8 & PPC7D_CPLD_BOARD_REVISION_NUMBER_MASK) >> 5;
- if (rev_num <= 1)
- ppc7d_has_alma = 1;
-
-#ifdef DEBUG
- console_printk[0] = 8;
-#endif
-}
diff --git a/arch/ppc/platforms/radstone_ppc7d.h b/arch/ppc/platforms/radstone_ppc7d.h
deleted file mode 100644
index 2bb093a..0000000
--- a/arch/ppc/platforms/radstone_ppc7d.h
+++ /dev/null
@@ -1,433 +0,0 @@
-/*
- * Board definitions for the Radstone PPC7D boards.
- *
- * Author: James Chapman <jchapman@katalix.com>
- *
- * Based on code done by Rabeeh Khoury - rabeeh@galileo.co.il
- * Based on code done by - Mark A. Greer <mgreer@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/*
- * The MV64360 has 2 PCI buses each with 1 window from the CPU bus to
- * PCI I/O space and 4 windows from the CPU bus to PCI MEM space.
- * We'll only use one PCI MEM window on each PCI bus.
- *
- * This is the CPU physical memory map (windows must be at least 1MB
- * and start on a boundary that is a multiple of the window size):
- *
- * 0xff800000-0xffffffff - Boot window
- * 0xff000000-0xff000fff - AFIX registers (DevCS2)
- * 0xfef00000-0xfef0ffff - Internal MV64x60 registers
- * 0xfef40000-0xfef7ffff - Internal SRAM
- * 0xfef00000-0xfef0ffff - MV64360 Registers
- * 0x70000000-0x7fffffff - soldered flash (DevCS3)
- * 0xe8000000-0xe9ffffff - PCI I/O
- * 0x80000000-0xbfffffff - PCI MEM
- */
-
-#ifndef __PPC_PLATFORMS_PPC7D_H
-#define __PPC_PLATFORMS_PPC7D_H
-
-#include <asm/ppcboot.h>
-
-/*****************************************************************************
- * CPU Physical Memory Map setup.
- *****************************************************************************/
-
-#define PPC7D_BOOT_WINDOW_BASE 0xff800000
-#define PPC7D_AFIX_REG_BASE 0xff000000
-#define PPC7D_INTERNAL_SRAM_BASE 0xfef40000
-#define PPC7D_FLASH_BASE 0x70000000
-
-#define PPC7D_BOOT_WINDOW_SIZE_ACTUAL 0x00800000 /* 8MB */
-#define PPC7D_FLASH_SIZE_ACTUAL 0x10000000 /* 256MB */
-
-#define PPC7D_BOOT_WINDOW_SIZE max(MV64360_WINDOW_SIZE_MIN, \
- PPC7D_BOOT_WINDOW_SIZE_ACTUAL)
-#define PPC7D_FLASH_SIZE max(MV64360_WINDOW_SIZE_MIN, \
- PPC7D_FLASH_SIZE_ACTUAL)
-#define PPC7D_AFIX_REG_SIZE max(MV64360_WINDOW_SIZE_MIN, 0xff)
-
-
-#define PPC7D_PCI0_MEM0_START_PROC_ADDR 0x80000000UL
-#define PPC7D_PCI0_MEM0_START_PCI_HI_ADDR 0x00000000UL
-#define PPC7D_PCI0_MEM0_START_PCI_LO_ADDR 0x80000000UL
-#define PPC7D_PCI0_MEM0_SIZE 0x20000000UL
-#define PPC7D_PCI0_MEM1_START_PROC_ADDR 0xe8010000UL
-#define PPC7D_PCI0_MEM1_START_PCI_HI_ADDR 0x00000000UL
-#define PPC7D_PCI0_MEM1_START_PCI_LO_ADDR 0x00000000UL
-#define PPC7D_PCI0_MEM1_SIZE 0x000f0000UL
-#define PPC7D_PCI0_IO_START_PROC_ADDR 0xe8000000UL
-#define PPC7D_PCI0_IO_START_PCI_ADDR 0x00000000UL
-#define PPC7D_PCI0_IO_SIZE 0x00010000UL
-
-#define PPC7D_PCI1_MEM0_START_PROC_ADDR 0xa0000000UL
-#define PPC7D_PCI1_MEM0_START_PCI_HI_ADDR 0x00000000UL
-#define PPC7D_PCI1_MEM0_START_PCI_LO_ADDR 0xa0000000UL
-#define PPC7D_PCI1_MEM0_SIZE 0x20000000UL
-#define PPC7D_PCI1_MEM1_START_PROC_ADDR 0xe9800000UL
-#define PPC7D_PCI1_MEM1_START_PCI_HI_ADDR 0x00000000UL
-#define PPC7D_PCI1_MEM1_START_PCI_LO_ADDR 0x00000000UL
-#define PPC7D_PCI1_MEM1_SIZE 0x00800000UL
-#define PPC7D_PCI1_IO_START_PROC_ADDR 0xe9000000UL
-#define PPC7D_PCI1_IO_START_PCI_ADDR 0x00000000UL
-#define PPC7D_PCI1_IO_SIZE 0x00010000UL
-
-#define PPC7D_DEFAULT_BAUD 9600
-#define PPC7D_MPSC_CLK_SRC 8 /* TCLK */
-#define PPC7D_MPSC_CLK_FREQ 133333333 /* 133.3333... MHz */
-
-#define PPC7D_ETH0_PHY_ADDR 8
-#define PPC7D_ETH1_PHY_ADDR 9
-#define PPC7D_ETH2_PHY_ADDR 0
-
-#define PPC7D_ETH_TX_QUEUE_SIZE 400
-#define PPC7D_ETH_RX_QUEUE_SIZE 400
-
-#define PPC7D_ETH_PORT_CONFIG_VALUE \
- MV64340_ETH_UNICAST_NORMAL_MODE | \
- MV64340_ETH_DEFAULT_RX_QUEUE_0 | \
- MV64340_ETH_DEFAULT_RX_ARP_QUEUE_0 | \
- MV64340_ETH_RECEIVE_BC_IF_NOT_IP_OR_ARP | \
- MV64340_ETH_RECEIVE_BC_IF_IP | \
- MV64340_ETH_RECEIVE_BC_IF_ARP | \
- MV64340_ETH_CAPTURE_TCP_FRAMES_DIS | \
- MV64340_ETH_CAPTURE_UDP_FRAMES_DIS | \
- MV64340_ETH_DEFAULT_RX_TCP_QUEUE_0 | \
- MV64340_ETH_DEFAULT_RX_UDP_QUEUE_0 | \
- MV64340_ETH_DEFAULT_RX_BPDU_QUEUE_0
-
-#define PPC7D_ETH_PORT_CONFIG_EXTEND_VALUE \
- MV64340_ETH_SPAN_BPDU_PACKETS_AS_NORMAL | \
- MV64340_ETH_PARTITION_DISABLE
-
-#define GT_ETH_IPG_INT_RX(value) \
- ((value & 0x3fff) << 8)
-
-#define PPC7D_ETH_PORT_SDMA_CONFIG_VALUE \
- MV64340_ETH_RX_BURST_SIZE_4_64BIT | \
- GT_ETH_IPG_INT_RX(0) | \
- MV64340_ETH_TX_BURST_SIZE_4_64BIT
-
-#define PPC7D_ETH_PORT_SERIAL_CONTROL_VALUE \
- MV64340_ETH_ENABLE_AUTO_NEG_FOR_DUPLX | \
- MV64340_ETH_DISABLE_AUTO_NEG_FOR_FLOW_CTRL | \
- MV64340_ETH_ADV_SYMMETRIC_FLOW_CTRL | \
- MV64340_ETH_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
- MV64340_ETH_FORCE_BP_MODE_NO_JAM | \
- (1 << 9) | \
- MV64340_ETH_DO_NOT_FORCE_LINK_FAIL | \
- MV64340_ETH_RETRANSMIT_16_ATTEMPTS | \
- MV64340_ETH_ENABLE_AUTO_NEG_SPEED_GMII | \
- MV64340_ETH_DTE_ADV_0 | \
- MV64340_ETH_DISABLE_AUTO_NEG_BYPASS | \
- MV64340_ETH_AUTO_NEG_NO_CHANGE | \
- MV64340_ETH_MAX_RX_PACKET_9700BYTE | \
- MV64340_ETH_CLR_EXT_LOOPBACK | \
- MV64340_ETH_SET_FULL_DUPLEX_MODE | \
- MV64340_ETH_ENABLE_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX
-
-/*****************************************************************************
- * Serial defines.
- *****************************************************************************/
-
-#define PPC7D_SERIAL_0 0xe80003f8
-#define PPC7D_SERIAL_1 0xe80002f8
-
-#define RS_TABLE_SIZE 2
-
-/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
-#define UART_CLK 1843200
-#define BASE_BAUD ( UART_CLK / 16 )
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF)
-#endif
-
-#define STD_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, PPC7D_SERIAL_0, 4, STD_COM_FLAGS, /* ttyS0 */ \
- iomem_base: (u8 *)PPC7D_SERIAL_0, \
- io_type: SERIAL_IO_MEM, }, \
- { 0, BASE_BAUD, PPC7D_SERIAL_1, 3, STD_COM_FLAGS, /* ttyS1 */ \
- iomem_base: (u8 *)PPC7D_SERIAL_1, \
- io_type: SERIAL_IO_MEM },
-
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DFNS
-
-/*****************************************************************************
- * CPLD defines.
- *
- * Register map:-
- *
- * 0000 to 000F South Bridge DMA 1 Control
- * 0020 and 0021 South Bridge Interrupt 1 Control
- * 0040 to 0043 South Bridge Counter Control
- * 0060 Keyboard
- * 0061 South Bridge NMI Status and Control
- * 0064 Keyboard
- * 0071 and 0072 RTC R/W
- * 0078 to 007B South Bridge BIOS Timer
- * 0080 to 0090 South Bridge DMA Pages
- * 00A0 and 00A1 South Bridge Interrupt 2 Control
- * 00C0 to 00DE South Bridge DMA 2 Control
- * 02E8 to 02EF COM6 R/W
- * 02F8 to 02FF South Bridge COM2 R/W
- * 03E8 to 03EF COM5 R/W
- * 03F8 to 03FF South Bridge COM1 R/W
- * 040A South Bridge DMA Scatter/Gather RO
- * 040B DMA 1 Extended Mode WO
- * 0410 to 043F South Bridge DMA Scatter/Gather
- * 0481 to 048B South Bridge DMA High Pages
- * 04D0 and 04D1 South Bridge Edge/Level Control
- * 04D6 DMA 2 Extended Mode WO
- * 0804 Memory Configuration RO
- * 0806 Memory Configuration Extend RO
- * 0808 SCSI Activity LED R/W
- * 080C Equipment Present 1 RO
- * 080E Equipment Present 2 RO
- * 0810 Equipment Present 3 RO
- * 0812 Equipment Present 4 RO
- * 0818 Key Lock RO
- * 0820 LEDS R/W
- * 0824 COMs R/W
- * 0826 RTS R/W
- * 0828 Reset R/W
- * 082C Watchdog Trig R/W
- * 082E Interrupt R/W
- * 0830 Interrupt Status RO
- * 0832 PCI configuration RO
- * 0854 Board Revision RO
- * 0858 Extended ID RO
- * 0864 ID Link RO
- * 0866 Motherboard Type RO
- * 0868 FLASH Write control RO
- * 086A Software FLASH write protect R/W
- * 086E FLASH Control R/W
- *****************************************************************************/
-
-#define PPC7D_CPLD_MEM_CONFIG 0x0804
-#define PPC7D_CPLD_MEM_CONFIG_EXTEND 0x0806
-#define PPC7D_CPLD_SCSI_ACTIVITY_LED 0x0808
-#define PPC7D_CPLD_EQUIPMENT_PRESENT_1 0x080C
-#define PPC7D_CPLD_EQUIPMENT_PRESENT_2 0x080E
-#define PPC7D_CPLD_EQUIPMENT_PRESENT_3 0x0810
-#define PPC7D_CPLD_EQUIPMENT_PRESENT_4 0x0812
-#define PPC7D_CPLD_KEY_LOCK 0x0818
-#define PPC7D_CPLD_LEDS 0x0820
-#define PPC7D_CPLD_COMS 0x0824
-#define PPC7D_CPLD_RTS 0x0826
-#define PPC7D_CPLD_RESET 0x0828
-#define PPC7D_CPLD_WATCHDOG_TRIG 0x082C
-#define PPC7D_CPLD_INTR 0x082E
-#define PPC7D_CPLD_INTR_STATUS 0x0830
-#define PPC7D_CPLD_PCI_CONFIG 0x0832
-#define PPC7D_CPLD_BOARD_REVISION 0x0854
-#define PPC7D_CPLD_EXTENDED_ID 0x0858
-#define PPC7D_CPLD_ID_LINK 0x0864
-#define PPC7D_CPLD_MOTHERBOARD_TYPE 0x0866
-#define PPC7D_CPLD_FLASH_WRITE_CNTL 0x0868
-#define PPC7D_CPLD_SW_FLASH_WRITE_PROTECT 0x086A
-#define PPC7D_CPLD_FLASH_CNTL 0x086E
-
-/* MEMORY_CONFIG_EXTEND */
-#define PPC7D_CPLD_SDRAM_BANK_NUM_MASK 0x02
-#define PPC7D_CPLD_SDRAM_BANK_SIZE_MASK 0xc0
-#define PPC7D_CPLD_SDRAM_BANK_SIZE_128M 0
-#define PPC7D_CPLD_SDRAM_BANK_SIZE_256M 0x40
-#define PPC7D_CPLD_SDRAM_BANK_SIZE_512M 0x80
-#define PPC7D_CPLD_SDRAM_BANK_SIZE_1G 0xc0
-#define PPC7D_CPLD_FLASH_DEV_SIZE_MASK 0x03
-#define PPC7D_CPLD_FLASH_BANK_NUM_MASK 0x0c
-#define PPC7D_CPLD_FLASH_DEV_SIZE_64M 0
-#define PPC7D_CPLD_FLASH_DEV_SIZE_32M 1
-#define PPC7D_CPLD_FLASH_DEV_SIZE_16M 3
-#define PPC7D_CPLD_FLASH_BANK_NUM_4 0x00
-#define PPC7D_CPLD_FLASH_BANK_NUM_3 0x04
-#define PPC7D_CPLD_FLASH_BANK_NUM_2 0x08
-#define PPC7D_CPLD_FLASH_BANK_NUM_1 0x0c
-
-/* SCSI_LED */
-#define PPC7D_CPLD_SCSI_ACTIVITY_LED_OFF 0
-#define PPC7D_CPLD_SCSI_ACTIVITY_LED_ON 1
-
-/* EQUIPMENT_PRESENT_1 */
-#define PPC7D_CPLD_EQPT_PRES_1_FITTED 0
-#define PPC7D_CPLD_EQPT_PRES_1_PMC2_MASK (0x80 >> 2)
-#define PPC7D_CPLD_EQPT_PRES_1_PMC1_MASK (0x80 >> 3)
-#define PPC7D_CPLD_EQPT_PRES_1_AFIX_MASK (0x80 >> 4)
-
-/* EQUIPMENT_PRESENT_2 */
-#define PPC7D_CPLD_EQPT_PRES_2_FITTED !0
-#define PPC7D_CPLD_EQPT_PRES_2_UNIVERSE_MASK (0x80 >> 0)
-#define PPC7D_CPLD_EQPT_PRES_2_COM36_MASK (0x80 >> 2)
-#define PPC7D_CPLD_EQPT_PRES_2_GIGE_MASK (0x80 >> 3)
-#define PPC7D_CPLD_EQPT_PRES_2_DUALGIGE_MASK (0x80 >> 4)
-
-/* EQUIPMENT_PRESENT_3 */
-#define PPC7D_CPLD_EQPT_PRES_3_PMC2_V_MASK (0x80 >> 3)
-#define PPC7D_CPLD_EQPT_PRES_3_PMC2_5V (0 >> 3)
-#define PPC7D_CPLD_EQPT_PRES_3_PMC2_3V (0x80 >> 3)
-#define PPC7D_CPLD_EQPT_PRES_3_PMC1_V_MASK (0x80 >> 4)
-#define PPC7D_CPLD_EQPT_PRES_3_PMC1_5V (0 >> 4)
-#define PPC7D_CPLD_EQPT_PRES_3_PMC1_3V (0x80 >> 4)
-#define PPC7D_CPLD_EQPT_PRES_3_PMC_POWER_MASK (0x80 >> 5)
-#define PPC7D_CPLD_EQPT_PRES_3_PMC_POWER_INTER (0 >> 5)
-#define PPC7D_CPLD_EQPT_PRES_3_PMC_POWER_VME (0x80 >> 5)
-
-/* EQUIPMENT_PRESENT_4 */
-#define PPC7D_CPLD_EQPT_PRES_4_LPT_MASK (0x80 >> 2)
-#define PPC7D_CPLD_EQPT_PRES_4_LPT_FITTED (0x80 >> 2)
-#define PPC7D_CPLD_EQPT_PRES_4_PS2_USB2_MASK (0xc0 >> 6)
-#define PPC7D_CPLD_EQPT_PRES_4_PS2_FITTED (0x40 >> 6)
-#define PPC7D_CPLD_EQPT_PRES_4_USB2_FITTED (0x80 >> 6)
-
-/* CPLD_LEDS */
-#define PPC7D_CPLD_LEDS_ON (!0)
-#define PPC7D_CPLD_LEDS_OFF (0)
-#define PPC7D_CPLD_LEDS_NVRAM_PAGE_MASK (0xc0 >> 2)
-#define PPC7D_CPLD_LEDS_DS201_MASK (0x80 >> 4)
-#define PPC7D_CPLD_LEDS_DS219_MASK (0x80 >> 5)
-#define PPC7D_CPLD_LEDS_DS220_MASK (0x80 >> 6)
-#define PPC7D_CPLD_LEDS_DS221_MASK (0x80 >> 7)
-
-/* CPLD_COMS */
-#define PPC7D_CPLD_COMS_COM3_TCLKEN (0x80 >> 0)
-#define PPC7D_CPLD_COMS_COM3_RTCLKEN (0x80 >> 1)
-#define PPC7D_CPLD_COMS_COM3_MODE_MASK (0x80 >> 2)
-#define PPC7D_CPLD_COMS_COM3_MODE_RS232 (0)
-#define PPC7D_CPLD_COMS_COM3_MODE_RS422 (0x80 >> 2)
-#define PPC7D_CPLD_COMS_COM3_TXEN (0x80 >> 3)
-#define PPC7D_CPLD_COMS_COM4_TCLKEN (0x80 >> 4)
-#define PPC7D_CPLD_COMS_COM4_RTCLKEN (0x80 >> 5)
-#define PPC7D_CPLD_COMS_COM4_MODE_MASK (0x80 >> 6)
-#define PPC7D_CPLD_COMS_COM4_MODE_RS232 (0)
-#define PPC7D_CPLD_COMS_COM4_MODE_RS422 (0x80 >> 6)
-#define PPC7D_CPLD_COMS_COM4_TXEN (0x80 >> 7)
-
-/* CPLD_RTS */
-#define PPC7D_CPLD_RTS_COM36_LOOPBACK (0x80 >> 0)
-#define PPC7D_CPLD_RTS_COM4_SCLK (0x80 >> 1)
-#define PPC7D_CPLD_RTS_COM3_TXFUNC_MASK (0xc0 >> 2)
-#define PPC7D_CPLD_RTS_COM3_TXFUNC_DISABLED (0 >> 2)
-#define PPC7D_CPLD_RTS_COM3_TXFUNC_ENABLED (0x80 >> 2)
-#define PPC7D_CPLD_RTS_COM3_TXFUNC_ENABLED_RTG3 (0xc0 >> 2)
-#define PPC7D_CPLD_RTS_COM3_TXFUNC_ENABLED_RTG3S (0xc0 >> 2)
-#define PPC7D_CPLD_RTS_COM56_MODE_MASK (0x80 >> 4)
-#define PPC7D_CPLD_RTS_COM56_MODE_RS232 (0)
-#define PPC7D_CPLD_RTS_COM56_MODE_RS422 (0x80 >> 4)
-#define PPC7D_CPLD_RTS_COM56_ENABLE_MASK (0x80 >> 5)
-#define PPC7D_CPLD_RTS_COM56_DISABLED (0)
-#define PPC7D_CPLD_RTS_COM56_ENABLED (0x80 >> 5)
-#define PPC7D_CPLD_RTS_COM4_TXFUNC_MASK (0xc0 >> 6)
-#define PPC7D_CPLD_RTS_COM4_TXFUNC_DISABLED (0 >> 6)
-#define PPC7D_CPLD_RTS_COM4_TXFUNC_ENABLED (0x80 >> 6)
-#define PPC7D_CPLD_RTS_COM4_TXFUNC_ENABLED_RTG3 (0x40 >> 6)
-#define PPC7D_CPLD_RTS_COM4_TXFUNC_ENABLED_RTG3S (0x40 >> 6)
-
-/* WATCHDOG_TRIG */
-#define PPC7D_CPLD_WDOG_CAUSE_MASK (0x80 >> 0)
-#define PPC7D_CPLD_WDOG_CAUSE_NORMAL_RESET (0 >> 0)
-#define PPC7D_CPLD_WDOG_CAUSE_WATCHDOG (0x80 >> 0)
-#define PPC7D_CPLD_WDOG_ENABLE_MASK (0x80 >> 6)
-#define PPC7D_CPLD_WDOG_ENABLE_OFF (0 >> 6)
-#define PPC7D_CPLD_WDOG_ENABLE_ON (0x80 >> 6)
-#define PPC7D_CPLD_WDOG_RESETSW_MASK (0x80 >> 7)
-#define PPC7D_CPLD_WDOG_RESETSW_OFF (0 >> 7)
-#define PPC7D_CPLD_WDOG_RESETSW_ON (0x80 >> 7)
-
-/* Interrupt mask and status bits */
-#define PPC7D_CPLD_INTR_TEMP_MASK (0x80 >> 0)
-#define PPC7D_CPLD_INTR_HB8_MASK (0x80 >> 1)
-#define PPC7D_CPLD_INTR_PHY1_MASK (0x80 >> 2)
-#define PPC7D_CPLD_INTR_PHY0_MASK (0x80 >> 3)
-#define PPC7D_CPLD_INTR_ISANMI_MASK (0x80 >> 5)
-#define PPC7D_CPLD_INTR_CRITTEMP_MASK (0x80 >> 6)
-
-/* CPLD_INTR */
-#define PPC7D_CPLD_INTR_ENABLE_OFF (0)
-#define PPC7D_CPLD_INTR_ENABLE_ON (!0)
-
-/* CPLD_INTR_STATUS */
-#define PPC7D_CPLD_INTR_STATUS_OFF (0)
-#define PPC7D_CPLD_INTR_STATUS_ON (!0)
-
-/* CPLD_PCI_CONFIG */
-#define PPC7D_CPLD_PCI_CONFIG_PCI0_MASK 0x70
-#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCI33 0x00
-#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCI66 0x10
-#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCIX33 0x40
-#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCIX66 0x50
-#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCIX100 0x60
-#define PPC7D_CPLD_PCI_CONFIG_PCI0_PCIX133 0x70
-#define PPC7D_CPLD_PCI_CONFIG_PCI1_MASK 0x07
-#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCI33 0x00
-#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCI66 0x01
-#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCIX33 0x04
-#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCIX66 0x05
-#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCIX100 0x06
-#define PPC7D_CPLD_PCI_CONFIG_PCI1_PCIX133 0x07
-
-/* CPLD_BOARD_REVISION */
-#define PPC7D_CPLD_BOARD_REVISION_NUMBER_MASK 0xe0
-#define PPC7D_CPLD_BOARD_REVISION_LETTER_MASK 0x1f
-
-/* CPLD_EXTENDED_ID */
-#define PPC7D_CPLD_EXTENDED_ID_PPC7D 0x18
-
-/* CPLD_ID_LINK */
-#define PPC7D_CPLD_ID_LINK_VME64_GAP_MASK (0x80 >> 2)
-#define PPC7D_CPLD_ID_LINK_VME64_GA4_MASK (0x80 >> 3)
-#define PPC7D_CPLD_ID_LINK_E13_MASK (0x80 >> 4)
-#define PPC7D_CPLD_ID_LINK_E12_MASK (0x80 >> 5)
-#define PPC7D_CPLD_ID_LINK_E7_MASK (0x80 >> 6)
-#define PPC7D_CPLD_ID_LINK_E6_MASK (0x80 >> 7)
-
-/* CPLD_MOTHERBOARD_TYPE */
-#define PPC7D_CPLD_MB_TYPE_ECC_ENABLE_MASK (0x80 >> 0)
-#define PPC7D_CPLD_MB_TYPE_ECC_ENABLED (0x80 >> 0)
-#define PPC7D_CPLD_MB_TYPE_ECC_DISABLED (0 >> 0)
-#define PPC7D_CPLD_MB_TYPE_ECC_FITTED_MASK (0x80 >> 3)
-#define PPC7D_CPLD_MB_TYPE_PLL_MASK 0x0c
-#define PPC7D_CPLD_MB_TYPE_PLL_133 0x00
-#define PPC7D_CPLD_MB_TYPE_PLL_100 0x08
-#define PPC7D_CPLD_MB_TYPE_PLL_64 0x04
-#define PPC7D_CPLD_MB_TYPE_HW_ID_MASK 0x03
-
-/* CPLD_FLASH_WRITE_CNTL */
-#define PPD7D_CPLD_FLASH_CNTL_WR_LINK_MASK (0x80 >> 0)
-#define PPD7D_CPLD_FLASH_CNTL_WR_LINK_FITTED (0x80 >> 0)
-#define PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_MASK (0x80 >> 2)
-#define PPD7D_CPLD_FLASH_CNTL_BOOT_LINK_FITTED (0x80 >> 2)
-#define PPD7D_CPLD_FLASH_CNTL_USER_LINK_MASK (0x80 >> 3)
-#define PPD7D_CPLD_FLASH_CNTL_USER_LINK_FITTED (0x80 >> 3)
-#define PPD7D_CPLD_FLASH_CNTL_RECO_WR_MASK (0x80 >> 5)
-#define PPD7D_CPLD_FLASH_CNTL_RECO_WR_ENABLED (0x80 >> 5)
-#define PPD7D_CPLD_FLASH_CNTL_BOOT_WR_MASK (0x80 >> 6)
-#define PPD7D_CPLD_FLASH_CNTL_BOOT_WR_ENABLED (0x80 >> 6)
-#define PPD7D_CPLD_FLASH_CNTL_USER_WR_MASK (0x80 >> 7)
-#define PPD7D_CPLD_FLASH_CNTL_USER_WR_ENABLED (0x80 >> 7)
-
-/* CPLD_SW_FLASH_WRITE_PROTECT */
-#define PPC7D_CPLD_SW_FLASH_WRPROT_ENABLED (!0)
-#define PPC7D_CPLD_SW_FLASH_WRPROT_DISABLED (0)
-#define PPC7D_CPLD_SW_FLASH_WRPROT_SYSBOOT_MASK (0x80 >> 6)
-#define PPC7D_CPLD_SW_FLASH_WRPROT_USER_MASK (0x80 >> 7)
-
-/* CPLD_FLASH_WRITE_CNTL */
-#define PPC7D_CPLD_FLASH_CNTL_NVRAM_PROT_MASK (0x80 >> 0)
-#define PPC7D_CPLD_FLASH_CNTL_NVRAM_DISABLED (0 >> 0)
-#define PPC7D_CPLD_FLASH_CNTL_NVRAM_ENABLED (0x80 >> 0)
-#define PPC7D_CPLD_FLASH_CNTL_ALTBOOT_LINK_MASK (0x80 >> 1)
-#define PPC7D_CPLD_FLASH_CNTL_VMEBOOT_LINK_MASK (0x80 >> 2)
-#define PPC7D_CPLD_FLASH_CNTL_RECBOOT_LINK_MASK (0x80 >> 3)
-
-
-#endif /* __PPC_PLATFORMS_PPC7D_H */
diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c
deleted file mode 100644
index d687b0f..0000000
--- a/arch/ppc/platforms/residual.c
+++ /dev/null
@@ -1,1034 +0,0 @@
-/*
- * Code to deal with the PReP residual data.
- *
- * Written by: Cort Dougan (cort@cs.nmt.edu)
- * Improved _greatly_ and rewritten by Gabriel Paubert (paubert@iram.es)
- *
- * This file is based on the following documentation:
- *
- * IBM Power Personal Systems Architecture
- * Residual Data
- * Document Number: PPS-AR-FW0001
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- *
- */
-
-#include <linux/string.h>
-#include <asm/residual.h>
-#include <asm/pnp.h>
-#include <asm/byteorder.h>
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/tty.h>
-#include <linux/major.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/pci.h>
-#include <linux/proc_fs.h>
-
-#include <asm/sections.h>
-#include <asm/mmu.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/ide.h>
-
-
-unsigned char __res[sizeof(RESIDUAL)] = {0,};
-RESIDUAL *res = (RESIDUAL *)&__res;
-
-char * PnP_BASE_TYPES[] __initdata = {
- "Reserved",
- "MassStorageDevice",
- "NetworkInterfaceController",
- "DisplayController",
- "MultimediaController",
- "MemoryController",
- "BridgeController",
- "CommunicationsDevice",
- "SystemPeripheral",
- "InputDevice",
- "ServiceProcessor"
- };
-
-/* Device Sub Type Codes */
-
-unsigned char * PnP_SUB_TYPES[] __initdata = {
- "\001\000SCSIController",
- "\001\001IDEController",
- "\001\002FloppyController",
- "\001\003IPIController",
- "\001\200OtherMassStorageController",
- "\002\000EthernetController",
- "\002\001TokenRingController",
- "\002\002FDDIController",
- "\002\0x80OtherNetworkController",
- "\003\000VGAController",
- "\003\001SVGAController",
- "\003\002XGAController",
- "\003\200OtherDisplayController",
- "\004\000VideoController",
- "\004\001AudioController",
- "\004\200OtherMultimediaController",
- "\005\000RAM",
- "\005\001FLASH",
- "\005\200OtherMemoryDevice",
- "\006\000HostProcessorBridge",
- "\006\001ISABridge",
- "\006\002EISABridge",
- "\006\003MicroChannelBridge",
- "\006\004PCIBridge",
- "\006\005PCMCIABridge",
- "\006\006VMEBridge",
- "\006\200OtherBridgeDevice",
- "\007\000RS232Device",
- "\007\001ATCompatibleParallelPort",
- "\007\200OtherCommunicationsDevice",
- "\010\000ProgrammableInterruptController",
- "\010\001DMAController",
- "\010\002SystemTimer",
- "\010\003RealTimeClock",
- "\010\004L2Cache",
- "\010\005NVRAM",
- "\010\006PowerManagement",
- "\010\007CMOS",
- "\010\010OperatorPanel",
- "\010\011ServiceProcessorClass1",
- "\010\012ServiceProcessorClass2",
- "\010\013ServiceProcessorClass3",
- "\010\014GraphicAssist",
- "\010\017SystemPlanar",
- "\010\200OtherSystemPeripheral",
- "\011\000KeyboardController",
- "\011\001Digitizer",
- "\011\002MouseController",
- "\011\003TabletController",
- "\011\0x80OtherInputController",
- "\012\000GeneralMemoryController",
- NULL
-};
-
-/* Device Interface Type Codes */
-
-unsigned char * PnP_INTERFACES[] __initdata = {
- "\000\000\000General",
- "\001\000\000GeneralSCSI",
- "\001\001\000GeneralIDE",
- "\001\001\001ATACompatible",
-
- "\001\002\000GeneralFloppy",
- "\001\002\001Compatible765",
- "\001\002\002NS398_Floppy", /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
- "\001\002\003NS26E_Floppy", /* Ports 26E and 26F */
- "\001\002\004NS15C_Floppy", /* Ports 15C and 15D */
- "\001\002\005NS2E_Floppy", /* Ports 2E and 2F */
- "\001\002\006CHRP_Floppy", /* CHRP Floppy in PR*P system */
-
- "\001\003\000GeneralIPI",
-
- "\002\000\000GeneralEther",
- "\002\001\000GeneralToken",
- "\002\002\000GeneralFDDI",
-
- "\003\000\000GeneralVGA",
- "\003\001\000GeneralSVGA",
- "\003\002\000GeneralXGA",
-
- "\004\000\000GeneralVideo",
- "\004\001\000GeneralAudio",
- "\004\001\001CS4232Audio", /* CS 4232 Plug 'n Play Configured */
-
- "\005\000\000GeneralRAM",
- /* This one is obviously wrong ! */
- "\005\000\000PCIMemoryController", /* PCI Config Method */
- "\005\000\001RS6KMemoryController", /* RS6K Config Method */
- "\005\001\000GeneralFLASH",
-
- "\006\000\000GeneralHostBridge",
- "\006\001\000GeneralISABridge",
- "\006\002\000GeneralEISABridge",
- "\006\003\000GeneralMCABridge",
- /* GeneralPCIBridge = 0, */
- "\006\004\000PCIBridgeDirect",
- "\006\004\001PCIBridgeIndirect",
- "\006\004\002PCIBridgeRS6K",
- "\006\005\000GeneralPCMCIABridge",
- "\006\006\000GeneralVMEBridge",
-
- "\007\000\000GeneralRS232",
- "\007\000\001COMx",
- "\007\000\002Compatible16450",
- "\007\000\003Compatible16550",
- "\007\000\004NS398SerPort", /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
- "\007\000\005NS26ESerPort", /* Ports 26E and 26F */
- "\007\000\006NS15CSerPort", /* Ports 15C and 15D */
- "\007\000\007NS2ESerPort", /* Ports 2E and 2F */
-
- "\007\001\000GeneralParPort",
- "\007\001\001LPTx",
- "\007\001\002NS398ParPort", /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
- "\007\001\003NS26EParPort", /* Ports 26E and 26F */
- "\007\001\004NS15CParPort", /* Ports 15C and 15D */
- "\007\001\005NS2EParPort", /* Ports 2E and 2F */
-
- "\010\000\000GeneralPIC",
- "\010\000\001ISA_PIC",
- "\010\000\002EISA_PIC",
- "\010\000\003MPIC",
- "\010\000\004RS6K_PIC",
-
- "\010\001\000GeneralDMA",
- "\010\001\001ISA_DMA",
- "\010\001\002EISA_DMA",
-
- "\010\002\000GeneralTimer",
- "\010\002\001ISA_Timer",
- "\010\002\002EISA_Timer",
- "\010\003\000GeneralRTC",
- "\010\003\001ISA_RTC",
-
- "\010\004\001StoreThruOnly",
- "\010\004\002StoreInEnabled",
- "\010\004\003RS6KL2Cache",
-
- "\010\005\000IndirectNVRAM", /* Indirectly addressed */
- "\010\005\001DirectNVRAM", /* Memory Mapped */
- "\010\005\002IndirectNVRAM24", /* Indirectly addressed - 24 bit */
-
- "\010\006\000GeneralPowerManagement",
- "\010\006\001EPOWPowerManagement",
- "\010\006\002PowerControl", // d1378
-
- "\010\007\000GeneralCMOS",
-
- "\010\010\000GeneralOPPanel",
- "\010\010\001HarddiskLight",
- "\010\010\002CDROMLight",
- "\010\010\003PowerLight",
- "\010\010\004KeyLock",
- "\010\010\005ANDisplay", /* AlphaNumeric Display */
- "\010\010\006SystemStatusLED", /* 3 digit 7 segment LED */
- "\010\010\007CHRP_SystemStatusLED", /* CHRP LEDs in PR*P system */
-
- "\010\011\000GeneralServiceProcessor",
- "\010\012\000GeneralServiceProcessor",
- "\010\013\000GeneralServiceProcessor",
-
- "\010\014\001TransferData",
- "\010\014\002IGMC32",
- "\010\014\003IGMC64",
-
- "\010\017\000GeneralSystemPlanar", /* 10/5/95 */
- NULL
- };
-
-static const unsigned char __init *PnP_SUB_TYPE_STR(unsigned char BaseType,
- unsigned char SubType) {
- unsigned char ** s=PnP_SUB_TYPES;
- while (*s && !((*s)[0]==BaseType
- && (*s)[1]==SubType)) s++;
- if (*s) return *s+2;
- else return("Unknown !");
-};
-
-static const unsigned char __init *PnP_INTERFACE_STR(unsigned char BaseType,
- unsigned char SubType,
- unsigned char Interface) {
- unsigned char ** s=PnP_INTERFACES;
- while (*s && !((*s)[0]==BaseType
- && (*s)[1]==SubType
- && (*s)[2]==Interface)) s++;
- if (*s) return *s+3;
- else return NULL;
-};
-
-static void __init printsmallvendor(PnP_TAG_PACKET *pkt, int size) {
- int i, c;
- char decomp[4];
-#define p pkt->S14_Pack.S14_Data.S14_PPCPack
- switch(p.Type) {
- case 1:
- /* Decompress first 3 chars */
- c = *(unsigned short *)p.PPCData;
- decomp[0]='A'-1+((c>>10)&0x1F);
- decomp[1]='A'-1+((c>>5)&0x1F);
- decomp[2]='A'-1+(c&0x1F);
- decomp[3]=0;
- printk(" Chip identification: %s%4.4X\n",
- decomp, ld_le16((unsigned short *)(p.PPCData+2)));
- break;
- default:
- printk(" Small vendor item type 0x%2.2x, data (hex): ",
- p.Type);
- for(i=0; i<size-2; i++) printk("%2.2x ", p.PPCData[i]);
- printk("\n");
- break;
- }
-#undef p
-}
-
-static void __init printsmallpacket(PnP_TAG_PACKET * pkt, int size) {
- static const unsigned char * intlevel[] = {"high", "low"};
- static const unsigned char * intsense[] = {"edge", "level"};
-
- switch (tag_small_item_name(pkt->S1_Pack.Tag)) {
- case PnPVersion:
- printk(" PnPversion 0x%x.%x\n",
- pkt->S1_Pack.Version[0], /* How to interpret version ? */
- pkt->S1_Pack.Version[1]);
- break;
-// case Logicaldevice:
- break;
-// case CompatibleDevice:
- break;
- case IRQFormat:
-#define p pkt->S4_Pack
- printk(" IRQ Mask 0x%4.4x, %s %s sensitive\n",
- ld_le16((unsigned short *)p.IRQMask),
- intlevel[(size>3) ? !(p.IRQInfo&0x05) : 0],
- intsense[(size>3) ? !(p.IRQInfo&0x03) : 0]);
-#undef p
- break;
- case DMAFormat:
-#define p pkt->S5_Pack
- printk(" DMA channel mask 0x%2.2x, info 0x%2.2x\n",
- p.DMAMask, p.DMAInfo);
-#undef p
- break;
- case StartDepFunc:
- printk("Start dependent function:\n");
- break;
- case EndDepFunc:
- printk("End dependent function\n");
- break;
- case IOPort:
-#define p pkt->S8_Pack
- printk(" Variable (%d decoded bits) I/O port\n"
- " from 0x%4.4x to 0x%4.4x, alignment %d, %d ports\n",
- p.IOInfo&ISAAddr16bit?16:10,
- ld_le16((unsigned short *)p.RangeMin),
- ld_le16((unsigned short *)p.RangeMax),
- p.IOAlign, p.IONum);
-#undef p
- break;
- case FixedIOPort:
-#define p pkt->S9_Pack
- printk(" Fixed (10 decoded bits) I/O port from %3.3x to %3.3x\n",
- (p.Range[1]<<8)|p.Range[0],
- ((p.Range[1]<<8)|p.Range[0])+p.IONum-1);
-#undef p
- break;
- case Res1:
- case Res2:
- case Res3:
- printk(" Undefined packet type %d!\n",
- tag_small_item_name(pkt->S1_Pack.Tag));
- break;
- case SmallVendorItem:
- printsmallvendor(pkt,size);
- break;
- default:
- printk(" Type 0x2.2x%d, size=%d\n",
- pkt->S1_Pack.Tag, size);
- break;
- }
-}
-
-static void __init printlargevendor(PnP_TAG_PACKET * pkt, int size) {
- static const unsigned char * addrtype[] = {"I/O", "Memory", "System"};
- static const unsigned char * inttype[] = {"8259", "MPIC", "RS6k BUID %d"};
- static const unsigned char * convtype[] = {"Bus Memory", "Bus I/O", "DMA"};
- static const unsigned char * transtype[] = {"direct", "mapped", "direct-store segment"};
- static const unsigned char * L2type[] = {"WriteThru", "CopyBack"};
- static const unsigned char * L2assoc[] = {"DirectMapped", "2-way set"};
-
- int i;
- char tmpstr[30], *t;
-#define p pkt->L4_Pack.L4_Data.L4_PPCPack
- switch(p.Type) {
- case 2:
- printk(" %d K %s %s L2 cache, %d/%d bytes line/sector size\n",
- ld_le32((unsigned int *)p.PPCData),
- L2type[p.PPCData[10]-1],
- L2assoc[p.PPCData[4]-1],
- ld_le16((unsigned short *)p.PPCData+3),
- ld_le16((unsigned short *)p.PPCData+4));
- break;
- case 3:
- printk(" PCI Bridge parameters\n"
- " ConfigBaseAddress %0x\n"
- " ConfigBaseData %0x\n"
- " Bus number %d\n",
- ld_le32((unsigned int *)p.PPCData),
- ld_le32((unsigned int *)(p.PPCData+8)),
- p.PPCData[16]);
- for(i=20; i<size-4; i+=12) {
- int j, first;
- if(p.PPCData[i]) printk(" PCI Slot %d", p.PPCData[i]);
- else printk (" Integrated PCI device");
- for(j=0, first=1, t=tmpstr; j<4; j++) {
- int line=ld_le16((unsigned short *)(p.PPCData+i+4)+j);
- if(line!=0xffff){
- if(first) first=0; else *t++='/';
- *t++='A'+j;
- }
- }
- *t='\0';
- printk(" DevFunc 0x%x interrupt line(s) %s routed to",
- p.PPCData[i+1],tmpstr);
- sprintf(tmpstr,
- inttype[p.PPCData[i+2]-1],
- p.PPCData[i+3]);
- printk(" %s line(s) ",
- tmpstr);
- for(j=0, first=1, t=tmpstr; j<4; j++) {
- int line=ld_le16((unsigned short *)(p.PPCData+i+4)+j);
- if(line!=0xffff){
- if(first) first=0; else *t++='/';
- t+=sprintf(t,"%d(%c)",
- line&0x7fff,
- line&0x8000?'E':'L');
- }
- }
- printk("%s\n",tmpstr);
- }
- break;
- case 5:
- printk(" Bridge address translation, %s decoding:\n"
- " Processor Bus Size Conversion Translation\n"
- " 0x%8.8x 0x%8.8x 0x%8.8x %s %s\n",
- p.PPCData[0]&1 ? "positive" : "subtractive",
- ld_le32((unsigned int *)p.PPCData+1),
- ld_le32((unsigned int *)p.PPCData+3),
- ld_le32((unsigned int *)p.PPCData+5),
- convtype[p.PPCData[2]-1],
- transtype[p.PPCData[1]-1]);
- break;
- case 6:
- printk(" Bus speed %d Hz, %d slot(s)\n",
- ld_le32((unsigned int *)p.PPCData),
- p.PPCData[4]);
- break;
- case 7:
- printk(" SCSI buses: %d, id(s):", p.PPCData[0]);
- for(i=1; i<=p.PPCData[0]; i++)
- printk(" %d%c", p.PPCData[i], i==p.PPCData[0] ? '\n' : ',');
- break;
- case 9:
- printk(" %s address (%d bits), at 0x%x size 0x%x bytes\n",
- addrtype[p.PPCData[0]-1],
- p.PPCData[1],
- ld_le32((unsigned int *)(p.PPCData+4)),
- ld_le32((unsigned int *)(p.PPCData+12)));
- break;
- case 10:
- sprintf(tmpstr,
- inttype[p.PPCData[0]-1],
- p.PPCData[1]);
-
- printk(" ISA interrupts routed to %s\n"
- " lines",
- tmpstr);
- for(i=0; i<16; i++) {
- int line=ld_le16((unsigned short *)p.PPCData+i+1);
- if (line!=0xffff) printk(" %d(IRQ%d)", line, i);
- }
- printk("\n");
- break;
- default:
- printk(" Large vendor item type 0x%2.2x\n Data (hex):",
- p.Type);
- for(i=0; i<size-4; i++) printk(" %2.2x", p.PPCData[i]);
- printk("\n");
-#undef p
- }
-}
-
-static void __init printlargepacket(PnP_TAG_PACKET * pkt, int size) {
- switch (tag_large_item_name(pkt->S1_Pack.Tag)) {
- case LargeVendorItem:
- printlargevendor(pkt, size);
- break;
- default:
- printk(" Type 0x2.2x%d, size=%d\n",
- pkt->S1_Pack.Tag, size);
- break;
- }
-}
-
-static void __init printpackets(PnP_TAG_PACKET * pkt, const char * cat)
-{
- if (pkt->S1_Pack.Tag== END_TAG) {
- printk(" No packets describing %s resources.\n", cat);
- return;
- }
- printk( " Packets describing %s resources:\n",cat);
- do {
- int size;
- if (tag_type(pkt->S1_Pack.Tag)) {
- size= 3 +
- pkt->L1_Pack.Count0 +
- pkt->L1_Pack.Count1*256;
- printlargepacket(pkt, size);
- } else {
- size=tag_small_count(pkt->S1_Pack.Tag)+1;
- printsmallpacket(pkt, size);
- }
- pkt = (PnP_TAG_PACKET *)((unsigned char *) pkt + size);
- } while (pkt->S1_Pack.Tag != END_TAG);
-}
-
-void __init print_residual_device_info(void)
-{
- int i;
- PPC_DEVICE *dev;
-#define did dev->DeviceId
-
- /* make sure we have residual data first */
- if (!have_residual_data)
- return;
-
- printk("Residual: %ld devices\n", res->ActualNumDevices);
- for ( i = 0;
- i < res->ActualNumDevices ;
- i++)
- {
- char decomp[4], sn[20];
- const char * s;
- dev = &res->Devices[i];
- s = PnP_INTERFACE_STR(did.BaseType, did.SubType,
- did.Interface);
- if(!s) {
- sprintf(sn, "interface %d", did.Interface);
- s=sn;
- }
- if ( did.BusId & PCIDEVICE )
- printk("PCI Device, Bus %d, DevFunc 0x%x:",
- dev->BusAccess.PCIAccess.BusNumber,
- dev->BusAccess.PCIAccess.DevFuncNumber);
- if ( did.BusId & PNPISADEVICE ) printk("PNPISA Device:");
- if ( did.BusId & ISADEVICE )
- printk("ISA Device, Slot %d, LogicalDev %d:",
- dev->BusAccess.ISAAccess.SlotNumber,
- dev->BusAccess.ISAAccess.LogicalDevNumber);
- if ( did.BusId & EISADEVICE ) printk("EISA Device:");
- if ( did.BusId & PROCESSORDEVICE )
- printk("ProcBus Device, Bus %d, BUID %d: ",
- dev->BusAccess.ProcBusAccess.BusNumber,
- dev->BusAccess.ProcBusAccess.BUID);
- if ( did.BusId & PCMCIADEVICE ) printk("PCMCIA ");
- if ( did.BusId & VMEDEVICE ) printk("VME ");
- if ( did.BusId & MCADEVICE ) printk("MCA ");
- if ( did.BusId & MXDEVICE ) printk("MX ");
- /* Decompress first 3 chars */
- decomp[0]='A'-1+((did.DevId>>26)&0x1F);
- decomp[1]='A'-1+((did.DevId>>21)&0x1F);
- decomp[2]='A'-1+((did.DevId>>16)&0x1F);
- decomp[3]=0;
- printk(" %s%4.4lX, %s, %s, %s\n",
- decomp, did.DevId&0xffff,
- PnP_BASE_TYPES[did.BaseType],
- PnP_SUB_TYPE_STR(did.BaseType,did.SubType),
- s);
- if ( dev->AllocatedOffset )
- printpackets( (union _PnP_TAG_PACKET *)
- &res->DevicePnPHeap[dev->AllocatedOffset],
- "allocated");
- if ( dev->PossibleOffset )
- printpackets( (union _PnP_TAG_PACKET *)
- &res->DevicePnPHeap[dev->PossibleOffset],
- "possible");
- if ( dev->CompatibleOffset )
- printpackets( (union _PnP_TAG_PACKET *)
- &res->DevicePnPHeap[dev->CompatibleOffset],
- "compatible");
- }
-}
-
-
-#if 0
-static void __init printVPD(void) {
-#define vpd res->VitalProductData
- int ps=vpd.PageSize, i, j;
- static const char* Usage[]={
- "FirmwareStack", "FirmwareHeap", "FirmwareCode", "BootImage",
- "Free", "Unpopulated", "ISAAddr", "PCIConfig",
- "IOMemory", "SystemIO", "SystemRegs", "PCIAddr",
- "UnPopSystemRom", "SystemROM", "ResumeBlock", "Other"
- };
- static const unsigned char *FWMan[]={
- "IBM", "Motorola", "FirmWorks", "Bull"
- };
- static const unsigned char *FWFlags[]={
- "Conventional", "OpenFirmware", "Diagnostics", "LowDebug",
- "MultiBoot", "LowClient", "Hex41", "FAT",
- "ISO9660", "SCSI_ID_Override", "Tape_Boot", "FW_Boot_Path"
- };
- static const unsigned char *ESM[]={
- "Port92", "PCIConfigA8", "FF001030", "????????"
- };
- static const unsigned char *SIOM[]={
- "Port850", "????????", "PCIConfigA8", "????????"
- };
-
- printk("Model: %s\n",vpd.PrintableModel);
- printk("Serial: %s\n", vpd.Serial);
- printk("FirmwareSupplier: %s\n", FWMan[vpd.FirmwareSupplier]);
- printk("FirmwareFlags:");
- for(j=0; j<12; j++) {
- if (vpd.FirmwareSupports & (1<<j)) {
- printk(" %s%c", FWFlags[j],
- vpd.FirmwareSupports&(-2<<j) ? ',' : '\n');
- }
- }
- printk("NVRamSize: %ld\n", vpd.NvramSize);
- printk("SIMMslots: %ld\n", vpd.NumSIMMSlots);
- printk("EndianSwitchMethod: %s\n",
- ESM[vpd.EndianSwitchMethod>2 ? 2 : vpd.EndianSwitchMethod]);
- printk("SpreadIOMethod: %s\n",
- SIOM[vpd.SpreadIOMethod>3 ? 3 : vpd.SpreadIOMethod]);
- printk("Processor/Bus frequencies (Hz): %ld/%ld\n",
- vpd.ProcessorHz, vpd.ProcessorBusHz);
- printk("Time Base Divisor: %ld\n", vpd.TimeBaseDivisor);
- printk("WordWidth, PageSize: %ld, %d\n", vpd.WordWidth, ps);
- printk("Cache sector size, Lock granularity: %ld, %ld\n",
- vpd.CoherenceBlockSize, vpd.GranuleSize);
- for (i=0; i<res->ActualNumMemSegs; i++) {
- int mask=res->Segs[i].Usage, first, j;
- printk("%8.8lx-%8.8lx ",
- res->Segs[i].BasePage*ps,
- (res->Segs[i].PageCount+res->Segs[i].BasePage)*ps-1);
- for(j=15, first=1; j>=0; j--) {
- if (mask&(1<<j)) {
- if (first) first=0;
- else printk(", ");
- printk("%s", Usage[j]);
- }
- }
- printk("\n");
- }
-}
-
-/*
- * Spit out some info about residual data
- */
-void print_residual_device_info(void)
-{
- int i;
- union _PnP_TAG_PACKET *pkt;
- PPC_DEVICE *dev;
-#define did dev->DeviceId
-
- /* make sure we have residual data first */
- if (!have_residual_data)
- return;
- printk("Residual: %ld devices\n", res->ActualNumDevices);
- for ( i = 0;
- i < res->ActualNumDevices ;
- i++)
- {
- dev = &res->Devices[i];
- /*
- * pci devices
- */
- if ( did.BusId & PCIDEVICE )
- {
- printk("PCI Device:");
- /* unknown vendor */
- if ( !strncmp( "Unknown", pci_strvendor(did.DevId>>16), 7) )
- printk(" id %08lx types %d/%d", did.DevId,
- did.BaseType, did.SubType);
- /* known vendor */
- else
- printk(" %s %s",
- pci_strvendor(did.DevId>>16),
- pci_strdev(did.DevId>>16,
- did.DevId&0xffff)
- );
-
- if ( did.BusId & PNPISADEVICE )
- {
- printk(" pnp:");
- /* get pnp info on the device */
- pkt = (union _PnP_TAG_PACKET *)
- &res->DevicePnPHeap[dev->AllocatedOffset];
- for (; pkt->S1_Pack.Tag != DF_END_TAG;
- pkt++ )
- {
- if ( (pkt->S1_Pack.Tag == S4_Packet) ||
- (pkt->S1_Pack.Tag == S4_Packet_flags) )
- printk(" irq %02x%02x",
- pkt->S4_Pack.IRQMask[0],
- pkt->S4_Pack.IRQMask[1]);
- }
- }
- printk("\n");
- continue;
- }
- /*
- * isa devices
- */
- if ( did.BusId & ISADEVICE )
- {
- printk("ISA Device: basetype: %d subtype: %d",
- did.BaseType, did.SubType);
- printk("\n");
- continue;
- }
- /*
- * eisa devices
- */
- if ( did.BusId & EISADEVICE )
- {
- printk("EISA Device: basetype: %d subtype: %d",
- did.BaseType, did.SubType);
- printk("\n");
- continue;
- }
- /*
- * proc bus devices
- */
- if ( did.BusId & PROCESSORDEVICE )
- {
- printk("ProcBus Device: basetype: %d subtype: %d",
- did.BaseType, did.SubType);
- printk("\n");
- continue;
- }
- /*
- * pcmcia devices
- */
- if ( did.BusId & PCMCIADEVICE )
- {
- printk("PCMCIA Device: basetype: %d subtype: %d",
- did.BaseType, did.SubType);
- printk("\n");
- continue;
- }
- printk("Unknown bus access device: busid %lx\n",
- did.BusId);
- }
-}
-#endif
-
-/* Returns the device index in the residual data,
- any of the search items may be set as -1 for wildcard,
- DevID number field (second halfword) is big endian !
-
- Examples:
- - search for the Interrupt controller (8259 type), 2 methods:
- 1) i8259 = residual_find_device(~0,
- NULL,
- SystemPeripheral,
- ProgrammableInterruptController,
- ISA_PIC,
- 0);
- 2) i8259 = residual_find_device(~0, "PNP0000", -1, -1, -1, 0)
-
- - search for the first two serial devices, whatever their type)
- iserial1 = residual_find_device(~0,NULL,
- CommunicationsDevice,
- RS232Device,
- -1, 0)
- iserial2 = residual_find_device(~0,NULL,
- CommunicationsDevice,
- RS232Device,
- -1, 1)
- - but search for typical COM1 and COM2 is not easy due to the
- fact that the interface may be anything and the name "PNP0500" or
- "PNP0501". Quite bad.
-
-*/
-
-/* devid are easier to uncompress than to compress, so to minimize bloat
-in this rarely used area we unencode and compare */
-
-/* in residual data number is big endian in the device table and
-little endian in the heap, so we use two parameters to avoid writing
-two very similar functions */
-
-static int __init same_DevID(unsigned short vendor,
- unsigned short Number,
- char * str)
-{
- static unsigned const char hexdigit[]="0123456789ABCDEF";
- if (strlen(str)!=7) return 0;
- if ( ( ((vendor>>10)&0x1f)+'A'-1 == str[0]) &&
- ( ((vendor>>5)&0x1f)+'A'-1 == str[1]) &&
- ( (vendor&0x1f)+'A'-1 == str[2]) &&
- (hexdigit[(Number>>12)&0x0f] == str[3]) &&
- (hexdigit[(Number>>8)&0x0f] == str[4]) &&
- (hexdigit[(Number>>4)&0x0f] == str[5]) &&
- (hexdigit[Number&0x0f] == str[6]) ) return 1;
- return 0;
-}
-
-PPC_DEVICE __init *residual_find_device(unsigned long BusMask,
- unsigned char * DevID,
- int BaseType,
- int SubType,
- int Interface,
- int n)
-{
- int i;
- if (!have_residual_data) return NULL;
- for (i=0; i<res->ActualNumDevices; i++) {
-#define Dev res->Devices[i].DeviceId
- if ( (Dev.BusId&BusMask) &&
- (BaseType==-1 || Dev.BaseType==BaseType) &&
- (SubType==-1 || Dev.SubType==SubType) &&
- (Interface==-1 || Dev.Interface==Interface) &&
- (DevID==NULL || same_DevID((Dev.DevId>>16)&0xffff,
- Dev.DevId&0xffff, DevID)) &&
- !(n--) ) return res->Devices+i;
-#undef Dev
- }
- return NULL;
-}
-
-PPC_DEVICE __init *residual_find_device_id(unsigned long BusMask,
- unsigned short DevID,
- int BaseType,
- int SubType,
- int Interface,
- int n)
-{
- int i;
- if (!have_residual_data) return NULL;
- for (i=0; i<res->ActualNumDevices; i++) {
-#define Dev res->Devices[i].DeviceId
- if ( (Dev.BusId&BusMask) &&
- (BaseType==-1 || Dev.BaseType==BaseType) &&
- (SubType==-1 || Dev.SubType==SubType) &&
- (Interface==-1 || Dev.Interface==Interface) &&
- (DevID==0xffff || (Dev.DevId&0xffff) == DevID) &&
- !(n--) ) return res->Devices+i;
-#undef Dev
- }
- return NULL;
-}
-
-static int __init
-residual_scan_pcibridge(PnP_TAG_PACKET * pkt, struct pci_dev *dev)
-{
- int irq = -1;
-
-#define data pkt->L4_Pack.L4_Data.L4_PPCPack.PPCData
- if (dev->bus->number == data[16]) {
- int i, size;
-
- size = 3 + ld_le16((u_short *) (&pkt->L4_Pack.Count0));
- for (i = 20; i < size - 4; i += 12) {
- unsigned char pin;
- int line_irq;
-
- if (dev->devfn != data[i + 1])
- continue;
-
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- if (pin) {
- line_irq = ld_le16((unsigned short *)
- (&data[i + 4 + 2 * (pin - 1)]));
- irq = (line_irq == 0xffff) ? 0
- : line_irq & 0x7fff;
- } else
- irq = 0;
-
- break;
- }
- }
-#undef data
-
- return irq;
-}
-
-int __init
-residual_pcidev_irq(struct pci_dev *dev)
-{
- int i = 0;
- int irq = -1;
- PPC_DEVICE *bridge;
-
- while ((bridge = residual_find_device
- (-1, NULL, BridgeController, PCIBridge, -1, i++))) {
-
- PnP_TAG_PACKET *pkt;
- if (bridge->AllocatedOffset) {
- pkt = PnP_find_large_vendor_packet(res->DevicePnPHeap +
- bridge->AllocatedOffset, 3, 0);
- if (!pkt)
- continue;
-
- irq = residual_scan_pcibridge(pkt, dev);
- if (irq != -1)
- break;
- }
- }
-
- return (irq < 0) ? 0 : irq;
-}
-
-void __init residual_irq_mask(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
-{
- PPC_DEVICE *dev;
- int i = 0;
- unsigned short irq_mask = 0x000; /* default to edge */
-
- while ((dev = residual_find_device(-1, NULL, -1, -1, -1, i++))) {
- PnP_TAG_PACKET *pkt;
- unsigned short mask;
- int size;
- int offset = dev->AllocatedOffset;
-
- if (!offset)
- continue;
-
- pkt = PnP_find_packet(res->DevicePnPHeap + offset,
- IRQFormat, 0);
- if (!pkt)
- continue;
-
- size = tag_small_count(pkt->S1_Pack.Tag) + 1;
- mask = ld_le16((unsigned short *)pkt->S4_Pack.IRQMask);
- if (size > 3 && (pkt->S4_Pack.IRQInfo & 0x0c))
- irq_mask |= mask;
- }
-
- *irq_edge_mask_lo = irq_mask & 0xff;
- *irq_edge_mask_hi = irq_mask >> 8;
-}
-
-unsigned int __init residual_isapic_addr(void)
-{
- PPC_DEVICE *isapic;
- PnP_TAG_PACKET *pkt;
- unsigned int addr;
-
- isapic = residual_find_device(~0, NULL, SystemPeripheral,
- ProgrammableInterruptController,
- ISA_PIC, 0);
- if (!isapic)
- goto unknown;
-
- pkt = PnP_find_large_vendor_packet(res->DevicePnPHeap +
- isapic->AllocatedOffset, 9, 0);
- if (!pkt)
- goto unknown;
-
-#define p pkt->L4_Pack.L4_Data.L4_PPCPack
- /* Must be 32-bit system address */
- if (!((p.PPCData[0] == 3) && (p.PPCData[1] == 32)))
- goto unknown;
-
- /* It doesn't seem to work where length != 1 (what can I say? :-/ ) */
- if (ld_le32((unsigned int *)(p.PPCData + 12)) != 1)
- goto unknown;
-
- addr = ld_le32((unsigned int *) (p.PPCData + 4));
-#undef p
- return addr;
-unknown:
- return 0;
-}
-
-PnP_TAG_PACKET *PnP_find_packet(unsigned char *p,
- unsigned packet_tag,
- int n)
-{
- unsigned mask, masked_tag, size;
- if(!p) return NULL;
- if (tag_type(packet_tag)) mask=0xff; else mask=0xF8;
- masked_tag = packet_tag&mask;
- for(; *p != END_TAG; p+=size) {
- if ((*p & mask) == masked_tag && !(n--))
- return (PnP_TAG_PACKET *) p;
- if (tag_type(*p))
- size=ld_le16((unsigned short *)(p+1))+3;
- else
- size=tag_small_count(*p)+1;
- }
- return NULL; /* not found */
-}
-
-PnP_TAG_PACKET __init *PnP_find_small_vendor_packet(unsigned char *p,
- unsigned packet_type,
- int n)
-{
- int next=0;
- while (p) {
- p = (unsigned char *) PnP_find_packet(p, 0x70, next);
- if (p && p[1]==packet_type && !(n--))
- return (PnP_TAG_PACKET *) p;
- next = 1;
- };
- return NULL; /* not found */
-}
-
-PnP_TAG_PACKET __init *PnP_find_large_vendor_packet(unsigned char *p,
- unsigned packet_type,
- int n)
-{
- int next=0;
- while (p) {
- p = (unsigned char *) PnP_find_packet(p, 0x84, next);
- if (p && p[3]==packet_type && !(n--))
- return (PnP_TAG_PACKET *) p;
- next = 1;
- };
- return NULL; /* not found */
-}
-
-#ifdef CONFIG_PROC_PREPRESIDUAL
-static int proc_prep_residual_read(char * buf, char ** start, off_t off,
- int count, int *eof, void *data)
-{
- int n;
-
- n = res->ResidualLength - off;
- if (n < 0) {
- *eof = 1;
- n = 0;
- }
- else {
- if (n > count)
- n = count;
- else
- *eof = 1;
-
- memcpy(buf, (char *)res + off, n);
- *start = buf;
- }
-
- return n;
-}
-
-int __init
-proc_prep_residual_init(void)
-{
- if (have_residual_data)
- create_proc_read_entry("residual", S_IRUGO, NULL,
- proc_prep_residual_read, NULL);
- return 0;
-}
-
-__initcall(proc_prep_residual_init);
-#endif
diff --git a/arch/ppc/platforms/rpx8260.h b/arch/ppc/platforms/rpx8260.h
deleted file mode 100644
index 843494a..0000000
--- a/arch/ppc/platforms/rpx8260.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * A collection of structures, addresses, and values associated with
- * the Embedded Planet RPX6 (or RPX Super) MPC8260 board.
- * Copied from the RPX-Classic and SBS8260 stuff.
- *
- * Copyright (c) 2001 Dan Malek <dan@embeddededge.com>
- */
-#ifdef __KERNEL__
-#ifndef __ASM_PLATFORMS_RPX8260_H__
-#define __ASM_PLATFORMS_RPX8260_H__
-
-/* A Board Information structure that is given to a program when
- * prom starts it up.
- */
-typedef struct bd_info {
- unsigned int bi_memstart; /* Memory start address */
- unsigned int bi_memsize; /* Memory (end) size in bytes */
- unsigned int bi_nvsize; /* NVRAM size in bytes (can be 0) */
- unsigned int bi_intfreq; /* Internal Freq, in Hz */
- unsigned int bi_busfreq; /* Bus Freq, in MHz */
- unsigned int bi_cpmfreq; /* CPM Freq, in MHz */
- unsigned int bi_brgfreq; /* BRG Freq, in MHz */
- unsigned int bi_vco; /* VCO Out from PLL */
- unsigned int bi_baudrate; /* Default console baud rate */
- unsigned int bi_immr; /* IMMR when called from boot rom */
- unsigned char bi_enetaddr[6];
-} bd_t;
-
-extern bd_t m8xx_board_info;
-
-/* Memory map is configured by the PROM startup.
- * We just map a few things we need. The CSR is actually 4 byte-wide
- * registers that can be accessed as 8-, 16-, or 32-bit values.
- */
-#define CPM_MAP_ADDR ((uint)0xf0000000)
-#define RPX_CSR_ADDR ((uint)0xfa000000)
-#define RPX_CSR_SIZE ((uint)(512 * 1024))
-#define RPX_NVRTC_ADDR ((uint)0xfa080000)
-#define RPX_NVRTC_SIZE ((uint)(512 * 1024))
-
-/* The RPX6 has 16, byte wide control/status registers.
- * Not all are used (yet).
- */
-extern volatile u_char *rpx6_csr_addr;
-
-/* Things of interest in the CSR.
-*/
-#define BCSR0_ID_MASK ((u_char)0xf0) /* Read only */
-#define BCSR0_SWITCH_MASK ((u_char)0x0f) /* Read only */
-#define BCSR1_XCVR_SMC1 ((u_char)0x80)
-#define BCSR1_XCVR_SMC2 ((u_char)0x40)
-#define BCSR2_FLASH_WENABLE ((u_char)0x20)
-#define BCSR2_NVRAM_ENABLE ((u_char)0x10)
-#define BCSR2_ALT_IRQ2 ((u_char)0x08)
-#define BCSR2_ALT_IRQ3 ((u_char)0x04)
-#define BCSR2_PRST ((u_char)0x02) /* Force reset */
-#define BCSR2_ENPRST ((u_char)0x01) /* Enable POR */
-#define BCSR3_MODCLK_MASK ((u_char)0xe0)
-#define BCSR3_ENCLKHDR ((u_char)0x10)
-#define BCSR3_LED5 ((u_char)0x04) /* 0 == on */
-#define BCSR3_LED6 ((u_char)0x02) /* 0 == on */
-#define BCSR3_LED7 ((u_char)0x01) /* 0 == on */
-#define BCSR4_EN_PHY ((u_char)0x80) /* Enable PHY */
-#define BCSR4_EN_MII ((u_char)0x40) /* Enable PHY */
-#define BCSR4_MII_READ ((u_char)0x04)
-#define BCSR4_MII_MDC ((u_char)0x02)
-#define BCSR4_MII_MDIO ((u_char)0x01)
-#define BCSR13_FETH_IRQMASK ((u_char)0xf0)
-#define BCSR15_FETH_IRQ ((u_char)0x20)
-
-#define PHY_INTERRUPT SIU_INT_IRQ7
-
-/* For our show_cpuinfo hooks. */
-#define CPUINFO_VENDOR "Embedded Planet"
-#define CPUINFO_MACHINE "EP8260 PowerPC"
-
-/* Warm reset vector. */
-#define BOOTROM_RESTART_ADDR ((uint)0xfff00104)
-
-#endif /* __ASM_PLATFORMS_RPX8260_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/rpxclassic.h b/arch/ppc/platforms/rpxclassic.h
deleted file mode 100644
index a3c1118..0000000
--- a/arch/ppc/platforms/rpxclassic.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * A collection of structures, addresses, and values associated with
- * the RPCG RPX-Classic board. Copied from the RPX-Lite stuff.
- *
- * Copyright (c) 1998 Dan Malek (dmalek@jlc.net)
- */
-#ifdef __KERNEL__
-#ifndef __MACH_RPX_DEFS
-#define __MACH_RPX_DEFS
-
-
-#ifndef __ASSEMBLY__
-/* A Board Information structure that is given to a program when
- * prom starts it up.
- */
-typedef struct bd_info {
- unsigned int bi_memstart; /* Memory start address */
- unsigned int bi_memsize; /* Memory (end) size in bytes */
- unsigned int bi_intfreq; /* Internal Freq, in Hz */
- unsigned int bi_busfreq; /* Bus Freq, in Hz */
- unsigned char bi_enetaddr[6];
- unsigned int bi_baudrate;
-} bd_t;
-
-extern bd_t m8xx_board_info;
-
-/* Memory map is configured by the PROM startup.
- * We just map a few things we need. The CSR is actually 4 byte-wide
- * registers that can be accessed as 8-, 16-, or 32-bit values.
- */
-#define PCI_ISA_IO_ADDR ((unsigned)0x80000000)
-#define PCI_ISA_IO_SIZE ((uint)(512 * 1024 * 1024))
-#define PCI_ISA_MEM_ADDR ((unsigned)0xc0000000)
-#define PCI_ISA_MEM_SIZE ((uint)(512 * 1024 * 1024))
-#define RPX_CSR_ADDR ((uint)0xfa400000)
-#define RPX_CSR_SIZE ((uint)(4 * 1024))
-#define IMAP_ADDR ((uint)0xfa200000)
-#define IMAP_SIZE ((uint)(64 * 1024))
-#define PCI_CSR_ADDR ((uint)0x80000000)
-#define PCI_CSR_SIZE ((uint)(64 * 1024))
-#define PCMCIA_MEM_ADDR ((uint)0xe0000000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-#define PCMCIA_IO_ADDR ((uint)0xe4000000)
-#define PCMCIA_IO_SIZE ((uint)(4 * 1024))
-#define PCMCIA_ATTRB_ADDR ((uint)0xe8000000)
-#define PCMCIA_ATTRB_SIZE ((uint)(4 * 1024))
-
-/* Things of interest in the CSR.
-*/
-#define BCSR0_ETHEN ((uint)0x80000000)
-#define BCSR0_ETHLPBK ((uint)0x40000000)
-#define BCSR0_COLTESTDIS ((uint)0x20000000)
-#define BCSR0_FULLDPLXDIS ((uint)0x10000000)
-#define BCSR0_ENFLSHSEL ((uint)0x04000000)
-#define BCSR0_FLASH_SEL ((uint)0x02000000)
-#define BCSR0_ENMONXCVR ((uint)0x01000000)
-
-#define BCSR0_PCMCIAVOLT ((uint)0x000f0000) /* CLLF */
-#define BCSR0_PCMCIA3VOLT ((uint)0x000a0000) /* CLLF */
-#define BCSR0_PCMCIA5VOLT ((uint)0x00060000) /* CLLF */
-
-#define BCSR1_IPB5SEL ((uint)0x00100000)
-#define BCSR1_PCVCTL4 ((uint)0x00080000)
-#define BCSR1_PCVCTL5 ((uint)0x00040000)
-#define BCSR1_PCVCTL6 ((uint)0x00020000)
-#define BCSR1_PCVCTL7 ((uint)0x00010000)
-
-#define BCSR2_EN232XCVR ((uint)0x00008000)
-#define BCSR2_QSPACESEL ((uint)0x00004000)
-#define BCSR2_FETHLEDMODE ((uint)0x00000800) /* CLLF */
-
-/* define IO_BASE for pcmcia, CLLF only */
-#if !defined(CONFIG_PCI)
-#define _IO_BASE 0x80000000
-#define _IO_BASE_SIZE 0x1000
-
-/* for pcmcia sandisk */
-#ifdef CONFIG_IDE
-# define MAX_HWIFS 1
-#endif
-#endif
-
-/* Interrupt level assignments.
-*/
-#define FEC_INTERRUPT SIU_LEVEL1 /* FEC interrupt */
-
-
-/* CPM Ethernet through SCCx.
- *
- * Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- */
-#define PA_ENET_RXD ((ushort)0x0001)
-#define PA_ENET_TXD ((ushort)0x0002)
-#define PA_ENET_TCLK ((ushort)0x0200)
-#define PA_ENET_RCLK ((ushort)0x0800)
-#define PB_ENET_TENA ((uint)0x00001000)
-#define PC_ENET_CLSN ((ushort)0x0010)
-#define PC_ENET_RENA ((ushort)0x0020)
-
-/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
- * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x000000ff)
-#define SICR_ENET_CLKRT ((uint)0x0000003d)
-
-/* We don't use the 8259.
-*/
-
-#define NR_8259_INTS 0
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __MACH_RPX_DEFS */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/rpxlite.h b/arch/ppc/platforms/rpxlite.h
deleted file mode 100644
index b615501..0000000
--- a/arch/ppc/platforms/rpxlite.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * A collection of structures, addresses, and values associated with
- * the RPCG RPX-Lite board. Copied from the MBX stuff.
- *
- * Copyright (c) 1998 Dan Malek (dmalek@jlc.net)
- */
-#ifdef __KERNEL__
-#ifndef __MACH_RPX_DEFS
-#define __MACH_RPX_DEFS
-
-
-#ifndef __ASSEMBLY__
-/* A Board Information structure that is given to a program when
- * prom starts it up.
- */
-typedef struct bd_info {
- unsigned int bi_memstart; /* Memory start address */
- unsigned int bi_memsize; /* Memory (end) size in bytes */
- unsigned int bi_intfreq; /* Internal Freq, in Hz */
- unsigned int bi_busfreq; /* Bus Freq, in Hz */
- unsigned char bi_enetaddr[6];
- unsigned int bi_baudrate;
-} bd_t;
-
-extern bd_t m8xx_board_info;
-
-/* Memory map is configured by the PROM startup.
- * We just map a few things we need. The CSR is actually 4 byte-wide
- * registers that can be accessed as 8-, 16-, or 32-bit values.
- */
-#define RPX_CSR_ADDR ((uint)0xfa400000)
-#define RPX_CSR_SIZE ((uint)(4 * 1024))
-#define IMAP_ADDR ((uint)0xfa200000)
-#define IMAP_SIZE ((uint)(64 * 1024))
-#define PCMCIA_MEM_ADDR ((uint)0x04000000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-#define PCMCIA_IO_ADDR ((uint)0x04400000)
-#define PCMCIA_IO_SIZE ((uint)(4 * 1024))
-
-/* Things of interest in the CSR.
-*/
-#define BCSR0_ETHEN ((uint)0x80000000)
-#define BCSR0_ETHLPBK ((uint)0x40000000)
-#define BCSR0_COLTESTDIS ((uint)0x20000000)
-#define BCSR0_FULLDPLXDIS ((uint)0x10000000)
-#define BCSR0_LEDOFF ((uint)0x08000000)
-#define BCSR0_USBDISABLE ((uint)0x04000000)
-#define BCSR0_USBHISPEED ((uint)0x02000000)
-#define BCSR0_USBPWREN ((uint)0x01000000)
-#define BCSR0_PCMCIAVOLT ((uint)0x000f0000)
-#define BCSR0_PCMCIA3VOLT ((uint)0x000a0000)
-#define BCSR0_PCMCIA5VOLT ((uint)0x00060000)
-
-#define BCSR1_IPB5SEL ((uint)0x00100000)
-#define BCSR1_PCVCTL4 ((uint)0x00080000)
-#define BCSR1_PCVCTL5 ((uint)0x00040000)
-#define BCSR1_PCVCTL6 ((uint)0x00020000)
-#define BCSR1_PCVCTL7 ((uint)0x00010000)
-
-/* define IO_BASE for pcmcia */
-#define _IO_BASE 0x80000000
-#define _IO_BASE_SIZE 0x1000
-
-#ifdef CONFIG_IDE
-# define MAX_HWIFS 1
-#endif
-
-/* CPM Ethernet through SCCx.
- *
- * This ENET stuff is for the MPC850 with ethernet on SCC2. Some of
- * this may be unique to the RPX-Lite configuration.
- * Note TENA is on Port B.
- */
-#define PA_ENET_RXD ((ushort)0x0004)
-#define PA_ENET_TXD ((ushort)0x0008)
-#define PA_ENET_TCLK ((ushort)0x0200)
-#define PA_ENET_RCLK ((ushort)0x0800)
-#define PB_ENET_TENA ((uint)0x00002000)
-#define PC_ENET_CLSN ((ushort)0x0040)
-#define PC_ENET_RENA ((ushort)0x0080)
-
-#define SICR_ENET_MASK ((uint)0x0000ff00)
-#define SICR_ENET_CLKRT ((uint)0x00003d00)
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __MACH_RPX_DEFS */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c
deleted file mode 100644
index b4897bd..0000000
--- a/arch/ppc/platforms/sandpoint.c
+++ /dev/null
@@ -1,651 +0,0 @@
-/*
- * Board setup routines for the Motorola SPS Sandpoint Test Platform.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2000-2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * This file adds support for the Motorola SPS Sandpoint Test Platform.
- * These boards have a PPMC slot for the processor so any combination
- * of cpu and host bridge can be attached. This port is for an 8240 PPMC
- * module from Motorola SPS and other closely related cpu/host bridge
- * combinations (e.g., 750/755/7400 with MPC107 host bridge).
- * The sandpoint itself has a Windbond 83c553 (PCI-ISA bridge, 2 DMA ctlrs, 2
- * cascaded 8259 interrupt ctlrs, 8254 Timer/Counter, and an IDE ctlr), a
- * National 87308 (RTC, 2 UARTs, Keyboard & mouse ctlrs, and a floppy ctlr),
- * and 4 PCI slots (only 2 of which are usable; the other 2 are keyed for 3.3V
- * but are really 5V).
- *
- * The firmware on the sandpoint is called DINK (not my acronym :). This port
- * depends on DINK to do some basic initialization (e.g., initialize the memory
- * ctlr) and to ensure that the processor is using MAP B (CHRP map).
- *
- * The switch settings for the Sandpoint board MUST be as follows:
- * S3: down
- * S4: up
- * S5: up
- * S6: down
- *
- * 'down' is in the direction from the PCI slots towards the PPMC slot;
- * 'up' is in the direction from the PPMC slot towards the PCI slots.
- * Be careful, the way the sandpoint board is installed in XT chasses will
- * make the directions reversed.
- *
- * Since Motorola listened to our suggestions for improvement, we now have
- * the Sandpoint X3 board. All of the PCI slots are available, it uses
- * the serial interrupt interface (just a hardware thing we need to
- * configure properly).
- *
- * Use the default X3 switch settings. The interrupts are then:
- * EPIC Source
- * 0 SIOINT (8259, active low)
- * 1 PCI #1
- * 2 PCI #2
- * 3 PCI #3
- * 4 PCI #4
- * 7 Winbond INTC (IDE interrupt)
- * 8 Winbond INTD (IDE interrupt)
- *
- *
- * Motorola has finally released a version of DINK32 that correctly
- * (seemingly) initializes the memory controller correctly, regardless
- * of the amount of memory in the system. Once a method of determining
- * what version of DINK initializes the system for us, if applicable, is
- * found, we can hopefully stop hardcoding 32MB of RAM.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/serial.h>
-#include <linux/tty.h> /* for linux/serial_core.h */
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/time.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/prom.h>
-#include <asm/smp.h>
-#include <asm/vga.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/mpc10x.h>
-#include <asm/pci-bridge.h>
-#include <asm/kgdb.h>
-#include <asm/ppc_sys.h>
-
-#include "sandpoint.h"
-
-/* Set non-zero if an X2 Sandpoint detected. */
-static int sandpoint_is_x2;
-
-unsigned char __res[sizeof(bd_t)];
-
-static void sandpoint_halt(void);
-static void sandpoint_probe_type(void);
-
-/*
- * Define all of the IRQ senses and polarities. Taken from the
- * Sandpoint X3 User's manual.
- */
-static u_char sandpoint_openpic_initsenses[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 0: SIOINT */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 2: PCI Slot 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 3: PCI Slot 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 4: PCI Slot 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 5: PCI Slot 4 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* 8: IDE (INT C) */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE) /* 9: IDE (INT D) */
-};
-
-/*
- * Motorola SPS Sandpoint interrupt routing.
- */
-static inline int
-x3_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 16, 0, 0, 0 }, /* IDSEL 11 - i8259 on Winbond */
- { 0, 0, 0, 0 }, /* IDSEL 12 - unused */
- { 18, 21, 20, 19 }, /* IDSEL 13 - PCI slot 1 */
- { 19, 18, 21, 20 }, /* IDSEL 14 - PCI slot 2 */
- { 20, 19, 18, 21 }, /* IDSEL 15 - PCI slot 3 */
- { 21, 20, 19, 18 }, /* IDSEL 16 - PCI slot 4 */
- };
-
- const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static inline int
-x2_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { 18, 0, 0, 0 }, /* IDSEL 11 - i8259 on Windbond */
- { 0, 0, 0, 0 }, /* IDSEL 12 - unused */
- { 16, 17, 18, 19 }, /* IDSEL 13 - PCI slot 1 */
- { 17, 18, 19, 16 }, /* IDSEL 14 - PCI slot 2 */
- { 18, 19, 16, 17 }, /* IDSEL 15 - PCI slot 3 */
- { 19, 16, 17, 18 }, /* IDSEL 16 - PCI slot 4 */
- };
-
- const long min_idsel = 11, max_idsel = 16, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static void __init
-sandpoint_setup_winbond_83553(struct pci_controller *hose)
-{
- int devfn;
-
- /*
- * Route IDE interrupts directly to the 8259's IRQ 14 & 15.
- * We can't route the IDE interrupt to PCI INTC# or INTD# because those
- * woule interfere with the PMC's INTC# and INTD# lines.
- */
- /*
- * Winbond Fcn 0
- */
- devfn = PCI_DEVFN(11,0);
-
- early_write_config_byte(hose,
- 0,
- devfn,
- 0x43, /* IDE Interrupt Routing Control */
- 0xef);
- early_write_config_word(hose,
- 0,
- devfn,
- 0x44, /* PCI Interrupt Routing Control */
- 0x0000);
-
- /* Want ISA memory cycles to be forwarded to PCI bus */
- early_write_config_byte(hose,
- 0,
- devfn,
- 0x48, /* ISA-to-PCI Addr Decoder Control */
- 0xf0);
-
- /* Enable Port 92. */
- early_write_config_byte(hose,
- 0,
- devfn,
- 0x4e, /* AT System Control Register */
- 0x06);
- /*
- * Winbond Fcn 1
- */
- devfn = PCI_DEVFN(11,1);
-
- /* Put IDE controller into native mode. */
- early_write_config_byte(hose,
- 0,
- devfn,
- 0x09, /* Programming interface Register */
- 0x8f);
-
- /* Init IRQ routing, enable both ports, disable fast 16 */
- early_write_config_dword(hose,
- 0,
- devfn,
- 0x40, /* IDE Control/Status Register */
- 0x00ff0011);
- return;
-}
-
-/* On the sandpoint X2, we must avoid sending configuration cycles to
- * device #12 (IDSEL addr = AD12).
- */
-static int
-x2_exclude_device(u_char bus, u_char devfn)
-{
- if ((bus == 0) && (PCI_SLOT(devfn) == SANDPOINT_HOST_BRIDGE_IDSEL))
- return PCIBIOS_DEVICE_NOT_FOUND;
- else
- return PCIBIOS_SUCCESSFUL;
-}
-
-static void __init
-sandpoint_find_bridges(void)
-{
- struct pci_controller *hose;
-
- hose = pcibios_alloc_controller();
-
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- if (mpc10x_bridge_init(hose,
- MPC10X_MEM_MAP_B,
- MPC10X_MEM_MAP_B,
- MPC10X_MAPB_EUMB_BASE) == 0) {
-
- /* Do early winbond init, then scan PCI bus */
- sandpoint_setup_winbond_83553(hose);
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pcibios_fixup = NULL;
- ppc_md.pcibios_fixup_bus = NULL;
- ppc_md.pci_swizzle = common_swizzle;
- if (sandpoint_is_x2) {
- ppc_md.pci_map_irq = x2_map_irq;
- ppc_md.pci_exclude_device = x2_exclude_device;
- } else
- ppc_md.pci_map_irq = x3_map_irq;
- }
- else {
- if (ppc_md.progress)
- ppc_md.progress("Bridge init failed", 0x100);
- printk("Host bridge init failed\n");
- }
-
- return;
-}
-
-static void __init
-sandpoint_setup_arch(void)
-{
- /* Probe for Sandpoint model */
- sandpoint_probe_type();
- if (sandpoint_is_x2)
- epic_serial_mode = 0;
-
- loops_per_jiffy = 100000000 / HZ;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- /* Lookup PCI host bridges */
- sandpoint_find_bridges();
-
- if (strncmp (cur_ppc_sys_spec->ppc_sys_name, "8245", 4) == 0)
- {
- bd_t *bp = (bd_t *)__res;
- struct plat_serial8250_port *pdata;
-
- pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_UART0);
- if (pdata)
- {
- pdata[0].uartclk = bp->bi_busfreq;
- }
-
-#ifdef CONFIG_SANDPOINT_ENABLE_UART1
- pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC10X_UART1);
- if (pdata)
- {
- pdata[0].uartclk = bp->bi_busfreq;
- }
-#else
- ppc_sys_device_remove(MPC10X_UART1);
-#endif
- }
-
- printk(KERN_INFO "Motorola SPS Sandpoint Test Platform\n");
- printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
-
- /* DINK32 12.3 and below do not correctly enable any caches.
- * We will do this now with good known values. Future versions
- * of DINK32 are supposed to get this correct.
- */
- if (cpu_has_feature(CPU_FTR_SPEC7450))
- /* 745x is different. We only want to pass along enable. */
- _set_L2CR(L2CR_L2E);
- else if (cpu_has_feature(CPU_FTR_L2CR))
- /* All modules have 1MB of L2. We also assume that an
- * L2 divisor of 3 will work.
- */
- _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3
- | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF);
-#if 0
- /* Untested right now. */
- if (cpu_has_feature(CPU_FTR_L3CR)) {
- /* Magic value. */
- _set_L3CR(0x8f032000);
- }
-#endif
-}
-
-#define SANDPOINT_87308_CFG_ADDR 0x15c
-#define SANDPOINT_87308_CFG_DATA 0x15d
-
-#define SANDPOINT_87308_CFG_INB(addr, byte) { \
- outb((addr), SANDPOINT_87308_CFG_ADDR); \
- (byte) = inb(SANDPOINT_87308_CFG_DATA); \
-}
-
-#define SANDPOINT_87308_CFG_OUTB(addr, byte) { \
- outb((addr), SANDPOINT_87308_CFG_ADDR); \
- outb((byte), SANDPOINT_87308_CFG_DATA); \
-}
-
-#define SANDPOINT_87308_SELECT_DEV(dev_num) { \
- SANDPOINT_87308_CFG_OUTB(0x07, (dev_num)); \
-}
-
-#define SANDPOINT_87308_DEV_ENABLE(dev_num) { \
- SANDPOINT_87308_SELECT_DEV(dev_num); \
- SANDPOINT_87308_CFG_OUTB(0x30, 0x01); \
-}
-
-/*
- * To probe the Sandpoint type, we need to check for a connection between GPIO
- * pins 6 and 7 on the NS87308 SuperIO.
- */
-static void __init sandpoint_probe_type(void)
-{
- u8 x;
- /* First, ensure that the GPIO pins are enabled. */
- SANDPOINT_87308_SELECT_DEV(0x07); /* Select GPIO logical device */
- SANDPOINT_87308_CFG_OUTB(0x60, 0x07); /* Base address 0x700 */
- SANDPOINT_87308_CFG_OUTB(0x61, 0x00);
- SANDPOINT_87308_CFG_OUTB(0x30, 0x01); /* Enable */
-
- /* Now, set pin 7 to output and pin 6 to input. */
- outb((inb(0x701) | 0x80) & 0xbf, 0x701);
- /* Set push-pull output */
- outb(inb(0x702) | 0x80, 0x702);
- /* Set pull-up on input */
- outb(inb(0x703) | 0x40, 0x703);
- /* Set output high and check */
- x = inb(0x700);
- outb(x | 0x80, 0x700);
- x = inb(0x700);
- sandpoint_is_x2 = ! (x & 0x40);
- if (ppc_md.progress && sandpoint_is_x2)
- ppc_md.progress("High output says X2", 0);
- /* Set output low and check */
- outb(x & 0x7f, 0x700);
- sandpoint_is_x2 |= inb(0x700) & 0x40;
- if (ppc_md.progress && sandpoint_is_x2)
- ppc_md.progress("Low output says X2", 0);
- if (ppc_md.progress && ! sandpoint_is_x2)
- ppc_md.progress("Sandpoint is X3", 0);
-}
-
-/*
- * Fix IDE interrupts.
- */
-static int __init
-sandpoint_fix_winbond_83553(void)
-{
- /* Make some 8259 interrupt level sensitive */
- outb(0xe0, 0x4d0);
- outb(0xde, 0x4d1);
-
- return 0;
-}
-
-arch_initcall(sandpoint_fix_winbond_83553);
-
-/*
- * Initialize the ISA devices on the Nat'l PC87308VUL SuperIO chip.
- */
-static int __init
-sandpoint_setup_natl_87308(void)
-{
- u_char reg;
-
- /*
- * Enable all the devices on the Super I/O chip.
- */
- SANDPOINT_87308_SELECT_DEV(0x00); /* Select kbd logical device */
- SANDPOINT_87308_CFG_OUTB(0xf0, 0x00); /* Set KBC clock to 8 Mhz */
- SANDPOINT_87308_DEV_ENABLE(0x00); /* Enable keyboard */
- SANDPOINT_87308_DEV_ENABLE(0x01); /* Enable mouse */
- SANDPOINT_87308_DEV_ENABLE(0x02); /* Enable rtc */
- SANDPOINT_87308_DEV_ENABLE(0x03); /* Enable fdc (floppy) */
- SANDPOINT_87308_DEV_ENABLE(0x04); /* Enable parallel */
- SANDPOINT_87308_DEV_ENABLE(0x05); /* Enable UART 2 */
- SANDPOINT_87308_CFG_OUTB(0xf0, 0x82); /* Enable bank select regs */
- SANDPOINT_87308_DEV_ENABLE(0x06); /* Enable UART 1 */
- SANDPOINT_87308_CFG_OUTB(0xf0, 0x82); /* Enable bank select regs */
-
- /* Set up floppy in PS/2 mode */
- outb(0x09, SIO_CONFIG_RA);
- reg = inb(SIO_CONFIG_RD);
- reg = (reg & 0x3F) | 0x40;
- outb(reg, SIO_CONFIG_RD);
- outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
-
- return 0;
-}
-
-arch_initcall(sandpoint_setup_natl_87308);
-
-static int __init
-sandpoint_request_io(void)
-{
- request_region(0x00,0x20,"dma1");
- request_region(0x20,0x20,"pic1");
- request_region(0x40,0x20,"timer");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xa0,0x20,"pic2");
- request_region(0xc0,0x20,"dma2");
-
- return 0;
-}
-
-arch_initcall(sandpoint_request_io);
-
-/*
- * Interrupt setup and service. Interrupts on the Sandpoint come
- * from the four PCI slots plus the 8259 in the Winbond Super I/O (SIO).
- * The 8259 is cascaded from EPIC IRQ0, IRQ1-4 map to PCI slots 1-4,
- * IDE is on EPIC 7 and 8.
- */
-static void __init
-sandpoint_init_IRQ(void)
-{
- int i;
-
- OpenPIC_InitSenses = sandpoint_openpic_initsenses;
- OpenPIC_NumInitSenses = sizeof(sandpoint_openpic_initsenses);
-
- mpc10x_set_openpic();
- openpic_hookup_cascade(sandpoint_is_x2 ? 17 : NUM_8259_INTERRUPTS, "82c59 cascade",
- i8259_irq);
-
- /*
- * The EPIC allows for a read in the range of 0xFEF00000 ->
- * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
- */
- i8259_init(0xfef00000, 0);
-}
-
-static unsigned long __init
-sandpoint_find_end_of_memory(void)
-{
- bd_t *bp = (bd_t *)__res;
-
- if (bp->bi_memsize)
- return bp->bi_memsize;
-
- /* DINK32 13.0 correctly initializes things, so iff you use
- * this you _should_ be able to change this instead of a
- * hardcoded value. */
-#if 0
- return mpc10x_get_mem_size(MPC10X_MEM_MAP_B);
-#else
- return 32*1024*1024;
-#endif
-}
-
-static void __init
-sandpoint_map_io(void)
-{
- io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
-}
-
-static void
-sandpoint_restart(char *cmd)
-{
- local_irq_disable();
-
- /* Set exception prefix high - to the firmware */
- _nmask_and_or_msr(0, MSR_IP);
-
- /* Reset system via Port 92 */
- outb(0x00, 0x92);
- outb(0x01, 0x92);
- for(;;); /* Spin until reset happens */
-}
-
-static void
-sandpoint_power_off(void)
-{
- local_irq_disable();
- for(;;); /* No way to shut power off with software */
- /* NOTREACHED */
-}
-
-static void
-sandpoint_halt(void)
-{
- sandpoint_power_off();
- /* NOTREACHED */
-}
-
-static int
-sandpoint_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: Motorola SPS\n");
- seq_printf(m, "machine\t\t: Sandpoint\n");
-
- return 0;
-}
-
-/*
- * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
- */
-static __inline__ void
-sandpoint_set_bat(void)
-{
- unsigned long bat3u, bat3l;
-
- __asm__ __volatile__(
- " lis %0,0xf800\n \
- ori %1,%0,0x002a\n \
- ori %0,%0,0x0ffe\n \
- mtspr 0x21e,%0\n \
- mtspr 0x21f,%1\n \
- isync\n \
- sync "
- : "=r" (bat3u), "=r" (bat3l));
-}
-
-TODC_ALLOC();
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /* ASSUMPTION: If both r3 (bd_t pointer) and r6 (cmdline pointer)
- * are non-zero, then we should use the board info from the bd_t
- * structure and the cmdline pointed to by r6 instead of the
- * information from birecs, if any. Otherwise, use the information
- * from birecs as discovered by the preceding call to
- * parse_bootinfo(). This rule should work with both PPCBoot, which
- * uses a bd_t board info structure, and the kernel boot wrapper,
- * which uses birecs.
- */
- if (r3 && r6) {
- /* copy board info structure */
- memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
- /* copy command line */
- *(char *)(r7+KERNELBASE) = 0;
- strcpy(cmd_line, (char *)(r6+KERNELBASE));
- }
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* take care of initrd if we have one */
- if (r4) {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- /* Map in board regs, etc. */
- sandpoint_set_bat();
-
- isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
- isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
- pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
- ISA_DMA_THRESHOLD = 0x00ffffff;
- DMA_MODE_READ = 0x44;
- DMA_MODE_WRITE = 0x48;
- ppc_do_canonicalize_irqs = 1;
-
- ppc_md.setup_arch = sandpoint_setup_arch;
- ppc_md.show_cpuinfo = sandpoint_show_cpuinfo;
- ppc_md.init_IRQ = sandpoint_init_IRQ;
- ppc_md.get_irq = openpic_get_irq;
-
- ppc_md.restart = sandpoint_restart;
- ppc_md.power_off = sandpoint_power_off;
- ppc_md.halt = sandpoint_halt;
-
- ppc_md.find_end_of_memory = sandpoint_find_end_of_memory;
- ppc_md.setup_io_mappings = sandpoint_map_io;
-
- TODC_INIT(TODC_TYPE_PC97307, 0x70, 0x00, 0x71, 8);
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = todc_calibrate_decr;
-
- ppc_md.nvram_read_val = todc_mc146818_read_val;
- ppc_md.nvram_write_val = todc_mc146818_write_val;
-
-#ifdef CONFIG_KGDB
- ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
-#endif
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = gen550_progress;
-#endif
-}
diff --git a/arch/ppc/platforms/sandpoint.h b/arch/ppc/platforms/sandpoint.h
deleted file mode 100644
index ed83759..0000000
--- a/arch/ppc/platforms/sandpoint.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * Definitions for Motorola SPS Sandpoint Test Platform
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2000-2003 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * Sandpoint uses the CHRP map (Map B).
- */
-
-#ifndef __PPC_PLATFORMS_SANDPOINT_H
-#define __PPC_PLATFORMS_SANDPOINT_H
-
-#include <asm/ppcboot.h>
-
-#if 0
-/* The Sandpoint X3 allows the IDE interrupt to be directly connected
- * from the Windbond (PCI INTC or INTD) to the serial EPIC. Someday
- * we should try this, but it was easier to use the existing 83c553
- * initialization than change it to route the different interrupts :-).
- * -- Dan
- */
-#define SANDPOINT_IDE_INT0 23 /* EPIC 7 */
-#define SANDPOINT_IDE_INT1 24 /* EPIC 8 */
-#endif
-
-/*
- * The sandpoint boards have processor modules that either have an 8240 or
- * an MPC107 host bridge on them. These bridges have an IDSEL line that allows
- * them to respond to PCI transactions as if they were a normal PCI devices.
- * However, the processor on the processor side of the bridge can not reach
- * out onto the PCI bus and then select the bridge or bad things will happen
- * (documented in the 8240 and 107 manuals).
- * Because of this, we always skip the bridge PCI device when accessing the
- * PCI bus. The PCI slot that the bridge occupies is defined by the macro
- * below.
- */
-#define SANDPOINT_HOST_BRIDGE_IDSEL 12
-
-/*
- * Serial defines.
- */
-#define SANDPOINT_SERIAL_0 0xfe0003f8
-#define SANDPOINT_SERIAL_1 0xfe0002f8
-
-#define RS_TABLE_SIZE 2
-
-/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
-#define BASE_BAUD ( 1843200 / 16 )
-#define UART_CLK 1843200
-
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF)
-#endif
-
-#define STD_SERIAL_PORT_DFNS \
- { 0, BASE_BAUD, SANDPOINT_SERIAL_0, 4, STD_COM_FLAGS, /* ttyS0 */ \
- iomem_base: (u8 *)SANDPOINT_SERIAL_0, \
- io_type: SERIAL_IO_MEM }, \
- { 0, BASE_BAUD, SANDPOINT_SERIAL_1, 3, STD_COM_FLAGS, /* ttyS1 */ \
- iomem_base: (u8 *)SANDPOINT_SERIAL_1, \
- io_type: SERIAL_IO_MEM },
-
-#define SERIAL_PORT_DFNS \
- STD_SERIAL_PORT_DFNS
-
-#endif /* __PPC_PLATFORMS_SANDPOINT_H */
diff --git a/arch/ppc/platforms/sbc82xx.c b/arch/ppc/platforms/sbc82xx.c
deleted file mode 100644
index 24f6e06..0000000
--- a/arch/ppc/platforms/sbc82xx.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * SBC82XX platform support
- *
- * Author: Guy Streeter <streeter@redhat.com>
- *
- * Derived from: est8260_setup.c by Allen Curtis, ONZ
- *
- * Copyright 2004 Red Hat, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/mpc8260.h>
-#include <asm/machdep.h>
-#include <asm/io.h>
-#include <asm/todc.h>
-#include <asm/immap_cpm2.h>
-#include <asm/pci.h>
-
-static void (*callback_init_IRQ)(void);
-
-extern unsigned char __res[sizeof(bd_t)];
-
-#ifdef CONFIG_GEN_RTC
-TODC_ALLOC();
-
-/*
- * Timer init happens before mem_init but after paging init, so we cannot
- * directly use ioremap() at that time.
- * late_time_init() is call after paging init.
- */
-
-static void sbc82xx_time_init(void)
-{
- volatile memctl_cpm2_t *mc = &cpm2_immr->im_memctl;
-
- /* Set up CS11 for RTC chip */
- mc->memc_br11=0;
- mc->memc_or11=0xffff0836;
- mc->memc_br11=SBC82xx_TODC_NVRAM_ADDR | 0x0801;
-
- TODC_INIT(TODC_TYPE_MK48T59, 0, 0, SBC82xx_TODC_NVRAM_ADDR, 0);
-
- todc_info->nvram_data =
- (unsigned int)ioremap(todc_info->nvram_data, 0x2000);
- BUG_ON(!todc_info->nvram_data);
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
- todc_time_init();
-}
-#endif /* CONFIG_GEN_RTC */
-
-static volatile char *sbc82xx_i8259_map;
-static char sbc82xx_i8259_mask = 0xff;
-static DEFINE_SPINLOCK(sbc82xx_i8259_lock);
-
-static void sbc82xx_i8259_mask_and_ack_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- irq_nr -= NR_SIU_INTS;
-
- spin_lock_irqsave(&sbc82xx_i8259_lock, flags);
- sbc82xx_i8259_mask |= 1 << irq_nr;
- (void) sbc82xx_i8259_map[1]; /* Dummy read */
- sbc82xx_i8259_map[1] = sbc82xx_i8259_mask;
- sbc82xx_i8259_map[0] = 0x20; /* OCW2: Non-specific EOI */
- spin_unlock_irqrestore(&sbc82xx_i8259_lock, flags);
-}
-
-static void sbc82xx_i8259_mask_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- irq_nr -= NR_SIU_INTS;
-
- spin_lock_irqsave(&sbc82xx_i8259_lock, flags);
- sbc82xx_i8259_mask |= 1 << irq_nr;
- sbc82xx_i8259_map[1] = sbc82xx_i8259_mask;
- spin_unlock_irqrestore(&sbc82xx_i8259_lock, flags);
-}
-
-static void sbc82xx_i8259_unmask_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- irq_nr -= NR_SIU_INTS;
-
- spin_lock_irqsave(&sbc82xx_i8259_lock, flags);
- sbc82xx_i8259_mask &= ~(1 << irq_nr);
- sbc82xx_i8259_map[1] = sbc82xx_i8259_mask;
- spin_unlock_irqrestore(&sbc82xx_i8259_lock, flags);
-}
-
-static void sbc82xx_i8259_end_irq(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))
- && irq_desc[irq].action)
- sbc82xx_i8259_unmask_irq(irq);
-}
-
-
-struct hw_interrupt_type sbc82xx_i8259_ic = {
- .typename = " i8259 ",
- .enable = sbc82xx_i8259_unmask_irq,
- .disable = sbc82xx_i8259_mask_irq,
- .ack = sbc82xx_i8259_mask_and_ack_irq,
- .end = sbc82xx_i8259_end_irq,
-};
-
-static irqreturn_t sbc82xx_i8259_demux(int dummy, void *dev_id)
-{
- int irq;
-
- spin_lock(&sbc82xx_i8259_lock);
-
- sbc82xx_i8259_map[0] = 0x0c; /* OCW3: Read IR register on RD# pulse */
- irq = sbc82xx_i8259_map[0] & 7; /* Read IRR */
-
- if (irq == 7) {
- /* Possible spurious interrupt */
- int isr;
- sbc82xx_i8259_map[0] = 0x0b; /* OCW3: Read IS register on RD# pulse */
- isr = sbc82xx_i8259_map[0]; /* Read ISR */
-
- if (!(isr & 0x80)) {
- printk(KERN_INFO "Spurious i8259 interrupt\n");
- return IRQ_HANDLED;
- }
- }
- __do_IRQ(NR_SIU_INTS + irq);
- return IRQ_HANDLED;
-}
-
-static struct irqaction sbc82xx_i8259_irqaction = {
- .handler = sbc82xx_i8259_demux,
- .flags = IRQF_DISABLED,
- .mask = CPU_MASK_NONE,
- .name = "i8259 demux",
-};
-
-void __init sbc82xx_init_IRQ(void)
-{
- volatile memctl_cpm2_t *mc = &cpm2_immr->im_memctl;
- volatile intctl_cpm2_t *ic = &cpm2_immr->im_intctl;
- int i;
-
- callback_init_IRQ();
-
- /* u-boot doesn't always set the board up correctly */
- mc->memc_br5 = 0;
- mc->memc_or5 = 0xfff00856;
- mc->memc_br5 = 0x22000801;
-
- sbc82xx_i8259_map = ioremap(0x22008000, 2);
- if (!sbc82xx_i8259_map) {
- printk(KERN_CRIT "Mapping i8259 interrupt controller failed\n");
- return;
- }
-
- /* Set up the interrupt handlers for the i8259 IRQs */
- for (i = NR_SIU_INTS; i < NR_SIU_INTS + 8; i++) {
- irq_desc[i].chip = &sbc82xx_i8259_ic;
- irq_desc[i].status |= IRQ_LEVEL;
- }
-
- /* make IRQ6 level sensitive */
- ic->ic_siexr &= ~(1 << (14 - (SIU_INT_IRQ6 - SIU_INT_IRQ1)));
- irq_desc[SIU_INT_IRQ6].status |= IRQ_LEVEL;
-
- /* Initialise the i8259 */
- sbc82xx_i8259_map[0] = 0x1b; /* ICW1: Level, no cascade, ICW4 */
- sbc82xx_i8259_map[1] = 0x00; /* ICW2: vector base */
- /* No ICW3 (no cascade) */
- sbc82xx_i8259_map[1] = 0x01; /* ICW4: 8086 mode, normal EOI */
-
- sbc82xx_i8259_map[0] = 0x0b; /* OCW3: Read IS register on RD# pulse */
-
- sbc82xx_i8259_map[1] = sbc82xx_i8259_mask; /* Set interrupt mask */
-
- /* Request cascade IRQ */
- if (setup_irq(SIU_INT_IRQ6, &sbc82xx_i8259_irqaction)) {
- printk("Installation of i8259 IRQ demultiplexer failed.\n");
- }
-}
-
-static int sbc82xx_pci_map_irq(struct pci_dev *dev, unsigned char idsel,
- unsigned char pin)
-{
- static char pci_irq_table[][4] = {
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- { SBC82xx_PIRQA, SBC82xx_PIRQB, SBC82xx_PIRQC, SBC82xx_PIRQD }, /* IDSEL 16 - PMC slot */
- { SBC82xx_PC_IRQA, SBC82xx_PC_IRQB, -1, -1 }, /* IDSEL 17 - CardBus */
- { SBC82xx_PIRQA, SBC82xx_PIRQB, SBC82xx_PIRQC, SBC82xx_PIRQD }, /* IDSEL 18 - PCI-X bridge */
- };
-
- const long min_idsel = 16, max_idsel = 18, irqs_per_slot = 4;
-
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static void __devinit quirk_sbc8260_cardbus(struct pci_dev *pdev)
-{
- uint32_t ctrl;
-
- if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(17, 0))
- return;
-
- printk(KERN_INFO "Setting up CardBus controller\n");
-
- /* Set P2CCLK bit in System Control Register */
- pci_read_config_dword(pdev, 0x80, &ctrl);
- ctrl |= (1<<27);
- pci_write_config_dword(pdev, 0x80, ctrl);
-
- /* Set MFUNC up for PCI IRQ routing via INTA and INTB, and LEDs. */
- pci_write_config_dword(pdev, 0x8c, 0x00c01d22);
-
-}
-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, quirk_sbc8260_cardbus);
-
-void __init
-m82xx_board_init(void)
-{
- /* u-boot may be using one of the FCC Ethernet devices.
- Use the MAC address to the SCC. */
- __res[offsetof(bd_t, bi_enetaddr[5])] &= ~3;
-
- /* Anything special for this platform */
- callback_init_IRQ = ppc_md.init_IRQ;
-
- ppc_md.init_IRQ = sbc82xx_init_IRQ;
- ppc_md.pci_map_irq = sbc82xx_pci_map_irq;
-#ifdef CONFIG_GEN_RTC
- ppc_md.time_init = NULL;
- ppc_md.get_rtc_time = NULL;
- ppc_md.set_rtc_time = NULL;
- ppc_md.nvram_read_val = NULL;
- ppc_md.nvram_write_val = NULL;
- late_time_init = sbc82xx_time_init;
-#endif /* CONFIG_GEN_RTC */
-}
diff --git a/arch/ppc/platforms/sbc82xx.h b/arch/ppc/platforms/sbc82xx.h
deleted file mode 100644
index e4042d4..0000000
--- a/arch/ppc/platforms/sbc82xx.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* Board information for the SBCPowerQUICCII, which should be generic for
- * all 8260 boards. The IMMR is now given to us so the hard define
- * will soon be removed. All of the clock values are computed from
- * the configuration SCMR and the Power-On-Reset word.
- */
-
-#ifndef __PPC_SBC82xx_H__
-#define __PPC_SBC82xx_H__
-
-#include <asm/ppcboot.h>
-
-#define CPM_MAP_ADDR 0xf0000000
-
-#define SBC82xx_TODC_NVRAM_ADDR 0xd0000000
-
-#define SBC82xx_MACADDR_NVRAM_FCC1 0x220000c9 /* JP6B */
-#define SBC82xx_MACADDR_NVRAM_SCC1 0x220000cf /* JP6A */
-#define SBC82xx_MACADDR_NVRAM_FCC2 0x220000d5 /* JP7A */
-#define SBC82xx_MACADDR_NVRAM_FCC3 0x220000db /* JP7B */
-
-/* For our show_cpuinfo hooks. */
-#define CPUINFO_VENDOR "Wind River"
-#define CPUINFO_MACHINE "SBC PowerQUICC II"
-
-#define BOOTROM_RESTART_ADDR ((uint)0x40000104)
-
-#define SBC82xx_PC_IRQA (NR_SIU_INTS+0)
-#define SBC82xx_PC_IRQB (NR_SIU_INTS+1)
-#define SBC82xx_MPC185_IRQ (NR_SIU_INTS+2)
-#define SBC82xx_ATM_IRQ (NR_SIU_INTS+3)
-#define SBC82xx_PIRQA (NR_SIU_INTS+4)
-#define SBC82xx_PIRQB (NR_SIU_INTS+5)
-#define SBC82xx_PIRQC (NR_SIU_INTS+6)
-#define SBC82xx_PIRQD (NR_SIU_INTS+7)
-
-#endif /* __PPC_SBC82xx_H__ */
diff --git a/arch/ppc/platforms/sbs8260.h b/arch/ppc/platforms/sbs8260.h
deleted file mode 100644
index d51427a..0000000
--- a/arch/ppc/platforms/sbs8260.h
+++ /dev/null
@@ -1,28 +0,0 @@
-#ifndef __ASSEMBLY__
-/* Board information for various SBS 8260 cards, which should be generic for
- * all 8260 boards. The IMMR is now given to us so the hard define
- * will soon be removed. All of the clock values are computed from
- * the configuration SCMR and the Power-On-Reset word.
- */
-
-#define CPM_MAP_ADDR ((uint)0xfe000000)
-
-
-/* A Board Information structure that is given to a program when
- * prom starts it up.
- */
-typedef struct bd_info {
- unsigned int bi_memstart; /* Memory start address */
- unsigned int bi_memsize; /* Memory (end) size in bytes */
- unsigned int bi_intfreq; /* Internal Freq, in Hz */
- unsigned int bi_busfreq; /* Bus Freq, in MHz */
- unsigned int bi_cpmfreq; /* CPM Freq, in MHz */
- unsigned int bi_brgfreq; /* BRG Freq, in MHz */
- unsigned int bi_vco; /* VCO Out from PLL */
- unsigned int bi_baudrate; /* Default console baud rate */
- unsigned int bi_immr; /* IMMR when called from boot rom */
- unsigned char bi_enetaddr[6];
-} bd_t;
-
-extern bd_t m8xx_board_info;
-#endif /* !__ASSEMBLY__ */
diff --git a/arch/ppc/platforms/spruce.c b/arch/ppc/platforms/spruce.c
deleted file mode 100644
index a344134..0000000
--- a/arch/ppc/platforms/spruce.c
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * Board and PCI setup routines for IBM Spruce
- *
- * Author: MontaVista Software <source@mvista.com>
- *
- * 2000-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/types.h>
-#include <linux/major.h>
-#include <linux/initrd.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/serial.h>
-#include <linux/tty.h>
-#include <linux/serial_core.h>
-#include <linux/serial_8250.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/dma.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-#include <asm/bootinfo.h>
-#include <asm/kgdb.h>
-
-#include <syslib/cpc700.h>
-
-#include "spruce.h"
-
-static inline int
-spruce_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {23, 24, 25, 26}, /* IDSEL 1 - PCI slot 3 */
- {24, 25, 26, 23}, /* IDSEL 2 - PCI slot 2 */
- {25, 26, 23, 24}, /* IDSEL 3 - PCI slot 1 */
- {26, 23, 24, 25}, /* IDSEL 4 - PCI slot 0 */
- };
-
- const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static void __init
-spruce_setup_hose(void)
-{
- struct pci_controller *hose;
-
- /* Setup hose */
- hose = pcibios_alloc_controller();
- if (!hose)
- return;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- pci_init_resource(&hose->io_resource,
- SPRUCE_PCI_LOWER_IO,
- SPRUCE_PCI_UPPER_IO,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource(&hose->mem_resources[0],
- SPRUCE_PCI_LOWER_MEM,
- SPRUCE_PCI_UPPER_MEM,
- IORESOURCE_MEM,
- "PCI host bridge");
-
- hose->io_space.start = SPRUCE_PCI_LOWER_IO;
- hose->io_space.end = SPRUCE_PCI_UPPER_IO;
- hose->mem_space.start = SPRUCE_PCI_LOWER_MEM;
- hose->mem_space.end = SPRUCE_PCI_UPPER_MEM;
- hose->io_base_virt = (void *)SPRUCE_ISA_IO_BASE;
-
- setup_indirect_pci(hose,
- SPRUCE_PCI_CONFIG_ADDR,
- SPRUCE_PCI_CONFIG_DATA);
-
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = spruce_map_irq;
-}
-
-/*
- * CPC700 PIC interrupt programming table
- *
- * First entry is the sensitivity (level/edge), second is the polarity.
- */
-unsigned int cpc700_irq_assigns[32][2] = {
- { 1, 1 }, /* IRQ 0: ECC Correctable Error - rising edge */
- { 1, 1 }, /* IRQ 1: PCI Write Mem Range - rising edge */
- { 0, 1 }, /* IRQ 2: PCI Write Command Reg - active high */
- { 0, 1 }, /* IRQ 3: UART 0 - active high */
- { 0, 1 }, /* IRQ 4: UART 1 - active high */
- { 0, 1 }, /* IRQ 5: ICC 0 - active high */
- { 0, 1 }, /* IRQ 6: ICC 1 - active high */
- { 0, 1 }, /* IRQ 7: GPT Compare 0 - active high */
- { 0, 1 }, /* IRQ 8: GPT Compare 1 - active high */
- { 0, 1 }, /* IRQ 9: GPT Compare 2 - active high */
- { 0, 1 }, /* IRQ 10: GPT Compare 3 - active high */
- { 0, 1 }, /* IRQ 11: GPT Compare 4 - active high */
- { 0, 1 }, /* IRQ 12: GPT Capture 0 - active high */
- { 0, 1 }, /* IRQ 13: GPT Capture 1 - active high */
- { 0, 1 }, /* IRQ 14: GPT Capture 2 - active high */
- { 0, 1 }, /* IRQ 15: GPT Capture 3 - active high */
- { 0, 1 }, /* IRQ 16: GPT Capture 4 - active high */
- { 0, 0 }, /* IRQ 17: Reserved */
- { 0, 0 }, /* IRQ 18: Reserved */
- { 0, 0 }, /* IRQ 19: Reserved */
- { 0, 1 }, /* IRQ 20: FPGA EXT_IRQ0 - active high */
- { 1, 1 }, /* IRQ 21: Mouse - rising edge */
- { 1, 1 }, /* IRQ 22: Keyboard - rising edge */
- { 0, 0 }, /* IRQ 23: PCI Slot 3 - active low */
- { 0, 0 }, /* IRQ 24: PCI Slot 2 - active low */
- { 0, 0 }, /* IRQ 25: PCI Slot 1 - active low */
- { 0, 0 }, /* IRQ 26: PCI Slot 0 - active low */
-};
-
-static void __init
-spruce_calibrate_decr(void)
-{
- int freq, divisor = 4;
-
- /* determine processor bus speed */
- freq = SPRUCE_BUS_SPEED;
- tb_ticks_per_jiffy = freq / HZ / divisor;
- tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
-}
-
-static int
-spruce_show_cpuinfo(struct seq_file *m)
-{
- seq_printf(m, "vendor\t\t: IBM\n");
- seq_printf(m, "machine\t\t: Spruce\n");
-
- return 0;
-}
-
-static void __init
-spruce_early_serial_map(void)
-{
- u32 uart_clk;
- struct uart_port serial_req;
-
- if (SPRUCE_UARTCLK_IS_33M(readb(SPRUCE_FPGA_REG_A)))
- uart_clk = SPRUCE_BAUD_33M * 16;
- else
- uart_clk = SPRUCE_BAUD_30M * 16;
-
- /* Setup serial port access */
- memset(&serial_req, 0, sizeof(serial_req));
- serial_req.uartclk = uart_clk;
- serial_req.irq = UART0_INT;
- serial_req.flags = UPF_BOOT_AUTOCONF;
- serial_req.iotype = UPIO_MEM;
- serial_req.membase = (u_char *)UART0_IO_BASE;
- serial_req.regshift = 0;
-
-#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
- gen550_init(0, &serial_req);
-#endif
-#ifdef CONFIG_SERIAL_8250
- if (early_serial_setup(&serial_req) != 0)
- printk("Early serial init of port 0 failed\n");
-#endif
-
- /* Assume early_serial_setup() doesn't modify serial_req */
- serial_req.line = 1;
- serial_req.irq = UART1_INT;
- serial_req.membase = (u_char *)UART1_IO_BASE;
-
-#if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
- gen550_init(1, &serial_req);
-#endif
-#ifdef CONFIG_SERIAL_8250
- if (early_serial_setup(&serial_req) != 0)
- printk("Early serial init of port 1 failed\n");
-#endif
-}
-
-TODC_ALLOC();
-
-static void __init
-spruce_setup_arch(void)
-{
- /* Setup TODC access */
- TODC_INIT(TODC_TYPE_DS1643, 0, 0, SPRUCE_RTC_BASE_ADDR, 8);
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000 / HZ;
-
- /* Setup PCI host bridge */
- spruce_setup_hose();
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_SDA1;
-#endif
-
- /* Identify the system */
- printk(KERN_INFO "System Identification: IBM Spruce\n");
- printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
-}
-
-static void
-spruce_restart(char *cmd)
-{
- local_irq_disable();
-
- /* SRR0 has system reset vector, SRR1 has default MSR value */
- /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
- __asm__ __volatile__
- ("\n\
- lis 3,0xfff0 \n\
- ori 3,3,0x0100 \n\
- mtspr 26,3 \n\
- li 3,0 \n\
- mtspr 27,3 \n\
- rfi \n\
- ");
- for(;;);
-}
-
-static void
-spruce_power_off(void)
-{
- for(;;);
-}
-
-static void
-spruce_halt(void)
-{
- spruce_restart(NULL);
-}
-
-static void __init
-spruce_map_io(void)
-{
- io_block_mapping(SPRUCE_PCI_IO_BASE, SPRUCE_PCI_PHY_IO_BASE,
- 0x08000000, _PAGE_IO);
-}
-
-/*
- * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
- */
-static __inline__ void
-spruce_set_bat(void)
-{
- mb();
- mtspr(SPRN_DBAT1U, 0xf8000ffe);
- mtspr(SPRN_DBAT1L, 0xf800002a);
- mb();
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /* Map in board regs, etc. */
- spruce_set_bat();
-
- isa_io_base = SPRUCE_ISA_IO_BASE;
- pci_dram_offset = SPRUCE_PCI_SYS_MEM_BASE;
-
- ppc_md.setup_arch = spruce_setup_arch;
- ppc_md.show_cpuinfo = spruce_show_cpuinfo;
- ppc_md.init_IRQ = cpc700_init_IRQ;
- ppc_md.get_irq = cpc700_get_irq;
-
- ppc_md.setup_io_mappings = spruce_map_io;
-
- ppc_md.restart = spruce_restart;
- ppc_md.power_off = spruce_power_off;
- ppc_md.halt = spruce_halt;
-
- ppc_md.time_init = todc_time_init;
- ppc_md.set_rtc_time = todc_set_rtc_time;
- ppc_md.get_rtc_time = todc_get_rtc_time;
- ppc_md.calibrate_decr = spruce_calibrate_decr;
-
- ppc_md.nvram_read_val = todc_direct_read_val;
- ppc_md.nvram_write_val = todc_direct_write_val;
-
- spruce_early_serial_map();
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = gen550_progress;
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-#ifdef CONFIG_KGDB
- ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
-#endif
-}
diff --git a/arch/ppc/platforms/spruce.h b/arch/ppc/platforms/spruce.h
deleted file mode 100644
index f1f96f1..0000000
--- a/arch/ppc/platforms/spruce.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * arch/ppc/platforms/spruce.h
- *
- * Definitions for IBM Spruce reference board support
- *
- * Authors: Matt Porter and Johnnie Peters
- * mporter@mvista.com
- * jpeters@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_SPRUCE_H__
-#define __ASM_SPRUCE_H__
-
-#define SPRUCE_PCI_CONFIG_ADDR 0xfec00000
-#define SPRUCE_PCI_CONFIG_DATA 0xfec00004
-
-#define SPRUCE_PCI_PHY_IO_BASE 0xf8000000
-#define SPRUCE_PCI_IO_BASE SPRUCE_PCI_PHY_IO_BASE
-
-#define SPRUCE_PCI_SYS_MEM_BASE 0x00000000
-
-#define SPRUCE_PCI_LOWER_MEM 0x80000000
-#define SPRUCE_PCI_UPPER_MEM 0x9fffffff
-#define SPRUCE_PCI_LOWER_IO 0x00000000
-#define SPRUCE_PCI_UPPER_IO 0x03ffffff
-
-#define SPRUCE_ISA_IO_BASE SPRUCE_PCI_IO_BASE
-
-#define SPRUCE_MEM_SIZE 0x04000000
-#define SPRUCE_BUS_SPEED 66666667
-
-#define SPRUCE_NVRAM_BASE_ADDR 0xff800000
-#define SPRUCE_RTC_BASE_ADDR SPRUCE_NVRAM_BASE_ADDR
-
-/*
- * Serial port defines
- */
-#define SPRUCE_FPGA_REG_A 0xff820000
-#define SPRUCE_UARTCLK_33M 0x02
-#define SPRUCE_UARTCLK_IS_33M(reg) (reg & SPRUCE_UARTCLK_33M)
-
-#define UART0_IO_BASE 0xff600300
-#define UART1_IO_BASE 0xff600400
-
-#define RS_TABLE_SIZE 2
-
-#define SPRUCE_BAUD_33M (33000000/64)
-#define SPRUCE_BAUD_30M (30000000/64)
-#define BASE_BAUD SPRUCE_BAUD_33M
-
-#define UART0_INT 3
-#define UART1_INT 4
-
-#define STD_UART_OP(num) \
- { 0, BASE_BAUD, 0, UART##num##_INT, \
- ASYNC_BOOT_AUTOCONF, \
- iomem_base: (unsigned char *) UART##num##_IO_BASE, \
- io_type: SERIAL_IO_MEM},
-
-#define SERIAL_PORT_DFNS \
- STD_UART_OP(0) \
- STD_UART_OP(1)
-
-#endif /* __ASM_SPRUCE_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/tqm8260.h b/arch/ppc/platforms/tqm8260.h
deleted file mode 100644
index 7f8c9a6..0000000
--- a/arch/ppc/platforms/tqm8260.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * TQM8260 board specific definitions
- *
- * Copyright (c) 2001 Wolfgang Denk (wd@denx.de)
- */
-
-#ifndef __TQM8260_PLATFORM
-#define __TQM8260_PLATFORM
-
-
-#include <asm/ppcboot.h>
-
-#define CPM_MAP_ADDR ((uint)0xFFF00000)
-#define PHY_INTERRUPT 25
-
-/* For our show_cpuinfo hooks. */
-#define CPUINFO_VENDOR "IN2 Systems"
-#define CPUINFO_MACHINE "TQM8260 PowerPC"
-
-#define BOOTROM_RESTART_ADDR ((uint)0x40000104)
-
-#endif /* __TQM8260_PLATFORM */
diff --git a/arch/ppc/platforms/tqm8260_setup.c b/arch/ppc/platforms/tqm8260_setup.c
deleted file mode 100644
index b766339..0000000
--- a/arch/ppc/platforms/tqm8260_setup.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * TQM8260 platform support
- *
- * Author: Allen Curtis <acurtis@onz.com>
- * Derived from: m8260_setup.c by Dan Malek, MVista
- *
- * Copyright 2002 Ones and Zeros, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-
-#include <asm/mpc8260.h>
-#include <asm/cpm2.h>
-#include <asm/machdep.h>
-
-static int
-tqm8260_set_rtc_time(unsigned long time)
-{
- ((cpm2_map_t *)CPM_MAP_ADDR)->im_sit.sit_tmcnt = time;
- ((cpm2_map_t *)CPM_MAP_ADDR)->im_sit.sit_tmcntsc = 0x3;
-
- return(0);
-}
-
-static unsigned long
-tqm8260_get_rtc_time(void)
-{
- return ((cpm2_map_t *)CPM_MAP_ADDR)->im_sit.sit_tmcnt;
-}
-
-void __init
-m82xx_board_init(void)
-{
- /* Anything special for this platform */
- ppc_md.set_rtc_time = tqm8260_set_rtc_time;
- ppc_md.get_rtc_time = tqm8260_get_rtc_time;
-}
diff --git a/arch/ppc/platforms/tqm8xx.h b/arch/ppc/platforms/tqm8xx.h
deleted file mode 100644
index 662131d..0000000
--- a/arch/ppc/platforms/tqm8xx.h
+++ /dev/null
@@ -1,155 +0,0 @@
-/*
- * TQM8xx(L) board specific definitions
- *
- * Copyright (c) 1999-2002 Wolfgang Denk (wd@denx.de)
- */
-
-#ifdef __KERNEL__
-#ifndef __MACH_TQM8xx_H
-#define __MACH_TQM8xx_H
-
-
-#include <asm/ppcboot.h>
-
-#ifndef __ASSEMBLY__
-#define TQM_IMMR_BASE 0xFFF00000 /* phys. addr of IMMR */
-#define TQM_IMAP_SIZE (64 * 1024) /* size of mapped area */
-
-#define IMAP_ADDR TQM_IMMR_BASE /* physical base address of IMMR area */
-#define IMAP_SIZE TQM_IMAP_SIZE /* mapped size of IMMR area */
-
-/*-----------------------------------------------------------------------
- * PCMCIA stuff
- *-----------------------------------------------------------------------
- *
- */
-#define PCMCIA_MEM_SIZE ( 64 << 20 )
-
-#ifndef CONFIG_KUP4K
-# define MAX_HWIFS 1 /* overwrite default in include/asm-ppc/ide.h */
-
-#else /* CONFIG_KUP4K */
-
-# define MAX_HWIFS 2 /* overwrite default in include/asm-ppc/ide.h */
-# ifndef __ASSEMBLY__
-# include <asm/8xx_immap.h>
-static __inline__ void ide_led(int on)
-{
- volatile immap_t *immap = (immap_t *)IMAP_ADDR;
-
- if (on) {
- immap->im_ioport.iop_padat &= ~0x80;
- } else {
- immap->im_ioport.iop_padat |= 0x80;
- }
-}
-# endif /* __ASSEMBLY__ */
-# define IDE_LED(x) ide_led((x))
-#endif /* CONFIG_KUP4K */
-
-/*
- * Definitions for IDE0 Interface
- */
-#define IDE0_BASE_OFFSET 0
-#define IDE0_DATA_REG_OFFSET (PCMCIA_MEM_SIZE + 0x320)
-#define IDE0_ERROR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 1)
-#define IDE0_NSECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 2)
-#define IDE0_SECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 3)
-#define IDE0_LCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 4)
-#define IDE0_HCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 5)
-#define IDE0_SELECT_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 6)
-#define IDE0_STATUS_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 7)
-#define IDE0_CONTROL_REG_OFFSET 0x0106
-#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */
-
-/* define IO_BASE for PCMCIA */
-#define _IO_BASE 0x80000000
-#define _IO_BASE_SIZE (64<<10)
-
-#define FEC_INTERRUPT 9 /* = SIU_LEVEL4 */
-#define PHY_INTERRUPT 12 /* = IRQ6 */
-#define IDE0_INTERRUPT 13
-
-#ifdef CONFIG_IDE
-#endif
-
-/*-----------------------------------------------------------------------
- * CPM Ethernet through SCCx.
- *-----------------------------------------------------------------------
- *
- */
-
-/*** TQM823L, TQM850L ***********************************************/
-
-#if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L)
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- */
-#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */
-#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */
-#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
-#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
-
-#define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */
-
-#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */
-#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */
-
-/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
- * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x0000ff00)
-#define SICR_ENET_CLKRT ((uint)0x00002600)
-#endif /* CONFIG_TQM823L, CONFIG_TQM850L */
-
-/*** TQM860L ********************************************************/
-
-#ifdef CONFIG_TQM860L
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- */
-#define PA_ENET_RXD ((ushort)0x0001) /* PA 15 */
-#define PA_ENET_TXD ((ushort)0x0002) /* PA 14 */
-#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
-#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
-
-#define PC_ENET_TENA ((ushort)0x0001) /* PC 15 */
-#define PC_ENET_CLSN ((ushort)0x0010) /* PC 11 */
-#define PC_ENET_RENA ((ushort)0x0020) /* PC 10 */
-
-/* Control bits in the SICR to route TCLK (CLK3) and RCLK (CLK1) to
- * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x000000ff)
-#define SICR_ENET_CLKRT ((uint)0x00000026)
-#endif /* CONFIG_TQM860L */
-
-/*** FPS850L *********************************************************/
-
-#ifdef CONFIG_FPS850L
-/* Bits in parallel I/O port registers that have to be set/cleared
- * to configure the pins for SCC1 use.
- */
-#define PA_ENET_RXD ((ushort)0x0004) /* PA 13 */
-#define PA_ENET_TXD ((ushort)0x0008) /* PA 12 */
-#define PA_ENET_RCLK ((ushort)0x0100) /* PA 7 */
-#define PA_ENET_TCLK ((ushort)0x0400) /* PA 5 */
-
-#define PC_ENET_TENA ((ushort)0x0002) /* PC 14 */
-#define PC_ENET_CLSN ((ushort)0x0040) /* PC 9 */
-#define PC_ENET_RENA ((ushort)0x0080) /* PC 8 */
-
-/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to
- * SCC2. Also, make sure GR2 (bit 16) and SC2 (bit 17) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x0000ff00)
-#define SICR_ENET_CLKRT ((uint)0x00002600)
-#endif /* CONFIG_FPS850L */
-
-/* We don't use the 8259.
-*/
-#define NR_8259_INTS 0
-
-#endif /* !__ASSEMBLY__ */
-#endif /* __MACH_TQM8xx_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
deleted file mode 100644
index 52ddebe..0000000
--- a/arch/ppc/syslib/Makefile
+++ /dev/null
@@ -1,96 +0,0 @@
-#
-# Makefile for the linux kernel.
-#
-
-CFLAGS_prom_init.o += -fPIC
-CFLAGS_btext.o += -fPIC
-
-wdt-mpc8xx-$(CONFIG_8xx_WDT) += m8xx_wdt.o
-
-obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
-obj-$(CONFIG_PPCBUG_NVRAM) += prep_nvram.o
-obj-$(CONFIG_PPC_OCP) += ocp.o
-obj-$(CONFIG_IBM_OCP) += ibm_ocp.o
-obj-$(CONFIG_44x) += ibm44x_common.o
-obj-$(CONFIG_440EP) += ibm440gx_common.o
-obj-$(CONFIG_440GP) += ibm440gp_common.o
-obj-$(CONFIG_440GX) += ibm440gx_common.o
-obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o
-obj-$(CONFIG_440SPE) += ibm440gx_common.o ibm440sp_common.o ppc440spe_pcie.o
-ifeq ($(CONFIG_4xx),y)
-ifeq ($(CONFIG_XILINX_VIRTEX),y)
-obj-$(CONFIG_40x) += xilinx_pic.o
-obj-y += virtex_devices.o
-else
-ifeq ($(CONFIG_403),y)
-obj-$(CONFIG_40x) += ppc403_pic.o
-else
-obj-$(CONFIG_40x) += ppc4xx_pic.o
-endif
-endif
-obj-$(CONFIG_44x) += ppc4xx_pic.o
-obj-$(CONFIG_40x) += ppc4xx_setup.o
-obj-$(CONFIG_GEN_RTC) += todc_time.o
-obj-$(CONFIG_PPC4xx_DMA) += ppc4xx_dma.o
-obj-$(CONFIG_PPC4xx_EDMA) += ppc4xx_sgdma.o
-ifeq ($(CONFIG_40x),y)
-obj-$(CONFIG_PCI) += pci_auto.o ppc405_pci.o
-endif
-endif
-obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \
- ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o
-obj-$(CONFIG_PCI_QSPAN) += qspan_pci.o
-obj-$(CONFIG_PPC_PREP) += open_pic.o todc_time.o
-obj-$(CONFIG_BAMBOO) += pci_auto.o todc_time.o
-obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o
-obj-$(CONFIG_EBONY) += pci_auto.o todc_time.o
-obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o
-obj-$(CONFIG_EV64360) += todc_time.o
-obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o
-obj-$(CONFIG_GT64260) += gt64260_pic.o
-obj-$(CONFIG_LOPEC) += pci_auto.o todc_time.o
-obj-$(CONFIG_HDPU) += pci_auto.o
-obj-$(CONFIG_LUAN) += pci_auto.o todc_time.o
-obj-$(CONFIG_YUCCA) += pci_auto.o todc_time.o
-obj-$(CONFIG_KATANA) += pci_auto.o
-obj-$(CONFIG_MV64360) += mv64360_pic.o
-obj-$(CONFIG_MV64X60) += mv64x60.o mv64x60_win.o
-obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o \
- pci_auto.o hawk_common.o
-obj-$(CONFIG_OCOTEA) += pci_auto.o todc_time.o
-obj-$(CONFIG_PAL4) += cpc700_pic.o
-obj-$(CONFIG_POWERPMC250) += pci_auto.o
-obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o \
- todc_time.o pci_auto.o
-obj-$(CONFIG_PRPMC750) += open_pic.o pci_auto.o \
- hawk_common.o
-obj-$(CONFIG_HARRIER) += harrier.o
-obj-$(CONFIG_PRPMC800) += open_pic.o pci_auto.o
-obj-$(CONFIG_RADSTONE_PPC7D) += pci_auto.o
-obj-$(CONFIG_SANDPOINT) += pci_auto.o todc_time.o
-obj-$(CONFIG_SBC82xx) += todc_time.o
-obj-$(CONFIG_SPRUCE) += cpc700_pic.o pci_auto.o \
- todc_time.o
-obj-$(CONFIG_TAISHAN) += pci_auto.o
-obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \
- ppc_sys.o
-obj-$(CONFIG_PCI_8260) += m82xx_pci.o pci_auto.o
-obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o
-obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
-ifeq ($(CONFIG_PPC_GEN550),y)
-obj-$(CONFIG_KGDB) += gen550_kgdb.o gen550_dbg.o
-obj-$(CONFIG_SERIAL_TEXT_DEBUG) += gen550_dbg.o
-endif
-ifeq ($(CONFIG_SERIAL_MPSC_CONSOLE),y)
-obj-$(CONFIG_SERIAL_TEXT_DEBUG) += mv64x60_dbg.o
-endif
-obj-$(CONFIG_BOOTX_TEXT) += btext.o
-obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o ppc_sys.o
-obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o
-obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \
- mpc52xx_sys.o mpc52xx_devices.o ppc_sys.o
-ifeq ($(CONFIG_PPC_MPC52xx),y)
-obj-$(CONFIG_PCI) += mpc52xx_pci.o
-endif
-
-obj-$(CONFIG_PPC_I8259) += i8259.o
diff --git a/arch/ppc/syslib/btext.c b/arch/ppc/syslib/btext.c
deleted file mode 100644
index d116670..0000000
--- a/arch/ppc/syslib/btext.c
+++ /dev/null
@@ -1,860 +0,0 @@
-/*
- * Procedures for drawing on the screen early on in the boot process.
- *
- * Benjamin Herrenschmidt <benh@kernel.crashing.org>
- */
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <linux/utsrelease.h>
-
-#include <asm/sections.h>
-#include <asm/bootx.h>
-#include <asm/btext.h>
-#include <asm/prom.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/pgtable.h>
-#include <asm/io.h>
-#include <asm/reg.h>
-
-#define NO_SCROLL
-
-#ifndef NO_SCROLL
-static void scrollscreen(void);
-#endif
-
-static void draw_byte(unsigned char c, long locX, long locY);
-static void draw_byte_32(unsigned char *bits, unsigned long *base, int rb);
-static void draw_byte_16(unsigned char *bits, unsigned long *base, int rb);
-static void draw_byte_8(unsigned char *bits, unsigned long *base, int rb);
-
-static int g_loc_X;
-static int g_loc_Y;
-static int g_max_loc_X;
-static int g_max_loc_Y;
-
-unsigned long disp_BAT[2] __initdata = {0, 0};
-
-#define cmapsz (16*256)
-
-static unsigned char vga_font[cmapsz];
-
-int boot_text_mapped;
-int force_printk_to_btext = 0;
-
-boot_infos_t disp_bi;
-
-extern char *klimit;
-
-/*
- * Powermac can use btext_* after boot for xmon,
- * chrp only uses it during early boot.
- */
-#ifdef CONFIG_XMON
-#define BTEXT
-#define BTDATA
-#else
-#define BTEXT __init
-#define BTDATA __initdata
-#endif /* CONFIG_XMON */
-
-/*
- * This is called only when we are booted via BootX.
- */
-void __init
-btext_init(boot_infos_t *bi)
-{
- g_loc_X = 0;
- g_loc_Y = 0;
- g_max_loc_X = (bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) / 8;
- g_max_loc_Y = (bi->dispDeviceRect[3] - bi->dispDeviceRect[1]) / 16;
- disp_bi = *bi;
- boot_text_mapped = 1;
-}
-
-void __init
-btext_welcome(void)
-{
- unsigned long flags;
- unsigned long pvr;
- boot_infos_t* bi = &disp_bi;
-
- btext_drawstring("Welcome to Linux, kernel " UTS_RELEASE "\n");
- btext_drawstring("\nlinked at : 0x");
- btext_drawhex(KERNELBASE);
- btext_drawstring("\nframe buffer at : 0x");
- btext_drawhex((unsigned long)bi->dispDeviceBase);
- btext_drawstring(" (phys), 0x");
- btext_drawhex((unsigned long)bi->logicalDisplayBase);
- btext_drawstring(" (log)");
- btext_drawstring("\nklimit : 0x");
- btext_drawhex((unsigned long)klimit);
- btext_drawstring("\nMSR : 0x");
- __asm__ __volatile__ ("mfmsr %0" : "=r" (flags));
- btext_drawhex(flags);
- __asm__ __volatile__ ("mfspr %0, 287" : "=r" (pvr));
- pvr >>= 16;
- if (pvr > 1) {
- btext_drawstring("\nHID0 : 0x");
- __asm__ __volatile__ ("mfspr %0, 1008" : "=r" (flags));
- btext_drawhex(flags);
- }
- if (pvr == 8 || pvr == 12 || pvr == 0x800c) {
- btext_drawstring("\nICTC : 0x");
- __asm__ __volatile__ ("mfspr %0, 1019" : "=r" (flags));
- btext_drawhex(flags);
- }
- btext_drawstring("\n\n");
-}
-
-/* Calc BAT values for mapping the display and store them
- * in disp_BAT. Those values are then used from head.S to map
- * the display during identify_machine() and MMU_Init()
- *
- * The display is mapped to virtual address 0xD0000000, rather
- * than 1:1, because some some CHRP machines put the frame buffer
- * in the region starting at 0xC0000000 (KERNELBASE).
- * This mapping is temporary and will disappear as soon as the
- * setup done by MMU_Init() is applied.
- *
- * For now, we align the BAT and then map 8Mb on 601 and 16Mb
- * on other PPCs. This may cause trouble if the framebuffer
- * is really badly aligned, but I didn't encounter this case
- * yet.
- */
-void __init
-btext_prepare_BAT(void)
-{
- boot_infos_t* bi = &disp_bi;
- unsigned long vaddr = KERNELBASE + 0x10000000;
- unsigned long addr;
- unsigned long lowbits;
-
- addr = (unsigned long)bi->dispDeviceBase;
- if (!addr) {
- boot_text_mapped = 0;
- return;
- }
- if (PVR_VER(mfspr(SPRN_PVR)) != 1) {
- /* 603, 604, G3, G4, ... */
- lowbits = addr & ~0xFF000000UL;
- addr &= 0xFF000000UL;
- disp_BAT[0] = vaddr | (BL_16M<<2) | 2;
- disp_BAT[1] = addr | (_PAGE_NO_CACHE | _PAGE_GUARDED | BPP_RW);
- } else {
- /* 601 */
- lowbits = addr & ~0xFF800000UL;
- addr &= 0xFF800000UL;
- disp_BAT[0] = vaddr | (_PAGE_NO_CACHE | PP_RWXX) | 4;
- disp_BAT[1] = addr | BL_8M | 0x40;
- }
- bi->logicalDisplayBase = (void *) (vaddr + lowbits);
-}
-
-/* This function will enable the early boot text when doing OF booting. This
- * way, xmon output should work too
- */
-void __init
-btext_setup_display(int width, int height, int depth, int pitch,
- unsigned long address)
-{
- boot_infos_t* bi = &disp_bi;
-
- g_loc_X = 0;
- g_loc_Y = 0;
- g_max_loc_X = width / 8;
- g_max_loc_Y = height / 16;
- bi->logicalDisplayBase = (unsigned char *)address;
- bi->dispDeviceBase = (unsigned char *)address;
- bi->dispDeviceRowBytes = pitch;
- bi->dispDeviceDepth = depth;
- bi->dispDeviceRect[0] = bi->dispDeviceRect[1] = 0;
- bi->dispDeviceRect[2] = width;
- bi->dispDeviceRect[3] = height;
- boot_text_mapped = 1;
-}
-
-/* Here's a small text engine to use during early boot
- * or for debugging purposes
- *
- * todo:
- *
- * - build some kind of vgacon with it to enable early printk
- * - move to a separate file
- * - add a few video driver hooks to keep in sync with display
- * changes.
- */
-
-void
-map_boot_text(void)
-{
- unsigned long base, offset, size;
- boot_infos_t *bi = &disp_bi;
- unsigned char *vbase;
-
- /* By default, we are no longer mapped */
- boot_text_mapped = 0;
- if (bi->dispDeviceBase == 0)
- return;
- base = ((unsigned long) bi->dispDeviceBase) & 0xFFFFF000UL;
- offset = ((unsigned long) bi->dispDeviceBase) - base;
- size = bi->dispDeviceRowBytes * bi->dispDeviceRect[3] + offset
- + bi->dispDeviceRect[0];
- vbase = ioremap(base, size);
- if (vbase == 0)
- return;
- bi->logicalDisplayBase = vbase + offset;
- boot_text_mapped = 1;
-}
-
-/* Calc the base address of a given point (x,y) */
-static unsigned char * BTEXT
-calc_base(boot_infos_t *bi, int x, int y)
-{
- unsigned char *base;
-
- base = bi->logicalDisplayBase;
- if (base == 0)
- base = bi->dispDeviceBase;
- base += (x + bi->dispDeviceRect[0]) * (bi->dispDeviceDepth >> 3);
- base += (y + bi->dispDeviceRect[1]) * bi->dispDeviceRowBytes;
- return base;
-}
-
-/* Adjust the display to a new resolution */
-void
-btext_update_display(unsigned long phys, int width, int height,
- int depth, int pitch)
-{
- boot_infos_t *bi = &disp_bi;
-
- if (bi->dispDeviceBase == 0)
- return;
-
- /* check it's the same frame buffer (within 256MB) */
- if ((phys ^ (unsigned long)bi->dispDeviceBase) & 0xf0000000)
- return;
-
- bi->dispDeviceBase = (__u8 *) phys;
- bi->dispDeviceRect[0] = 0;
- bi->dispDeviceRect[1] = 0;
- bi->dispDeviceRect[2] = width;
- bi->dispDeviceRect[3] = height;
- bi->dispDeviceDepth = depth;
- bi->dispDeviceRowBytes = pitch;
- if (boot_text_mapped) {
- iounmap(bi->logicalDisplayBase);
- boot_text_mapped = 0;
- }
- map_boot_text();
- g_loc_X = 0;
- g_loc_Y = 0;
- g_max_loc_X = width / 8;
- g_max_loc_Y = height / 16;
-}
-
-void BTEXT btext_clearscreen(void)
-{
- boot_infos_t* bi = &disp_bi;
- unsigned long *base = (unsigned long *)calc_base(bi, 0, 0);
- unsigned long width = ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
- (bi->dispDeviceDepth >> 3)) >> 2;
- int i,j;
-
- for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1]); i++)
- {
- unsigned long *ptr = base;
- for(j=width; j; --j)
- *(ptr++) = 0;
- base += (bi->dispDeviceRowBytes >> 2);
- }
-}
-
-__inline__ void dcbst(const void* addr)
-{
- __asm__ __volatile__ ("dcbst 0,%0" :: "r" (addr));
-}
-
-void BTEXT btext_flushscreen(void)
-{
- boot_infos_t* bi = &disp_bi;
- unsigned long *base = (unsigned long *)calc_base(bi, 0, 0);
- unsigned long width = ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
- (bi->dispDeviceDepth >> 3)) >> 2;
- int i,j;
-
- for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1]); i++)
- {
- unsigned long *ptr = base;
- for(j=width; j>0; j-=8) {
- dcbst(ptr);
- ptr += 8;
- }
- base += (bi->dispDeviceRowBytes >> 2);
- }
-}
-
-#ifndef NO_SCROLL
-static BTEXT void
-scrollscreen(void)
-{
- boot_infos_t* bi = &disp_bi;
- unsigned long *src = (unsigned long *)calc_base(bi,0,16);
- unsigned long *dst = (unsigned long *)calc_base(bi,0,0);
- unsigned long width = ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
- (bi->dispDeviceDepth >> 3)) >> 2;
- int i,j;
-
-#ifdef CONFIG_ADB_PMU
- pmu_suspend(); /* PMU will not shut us down ! */
-#endif
- for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1] - 16); i++)
- {
- unsigned long *src_ptr = src;
- unsigned long *dst_ptr = dst;
- for(j=width; j; --j)
- *(dst_ptr++) = *(src_ptr++);
- src += (bi->dispDeviceRowBytes >> 2);
- dst += (bi->dispDeviceRowBytes >> 2);
- }
- for (i=0; i<16; i++)
- {
- unsigned long *dst_ptr = dst;
- for(j=width; j; --j)
- *(dst_ptr++) = 0;
- dst += (bi->dispDeviceRowBytes >> 2);
- }
-#ifdef CONFIG_ADB_PMU
- pmu_resume(); /* PMU will not shut us down ! */
-#endif
-}
-#endif /* ndef NO_SCROLL */
-
-void BTEXT btext_drawchar(char c)
-{
- int cline = 0, x;
-
- if (!boot_text_mapped)
- return;
-
- switch (c) {
- case '\b':
- if (g_loc_X > 0)
- --g_loc_X;
- break;
- case '\t':
- g_loc_X = (g_loc_X & -8) + 8;
- break;
- case '\r':
- g_loc_X = 0;
- break;
- case '\n':
- g_loc_X = 0;
- g_loc_Y++;
- cline = 1;
- break;
- default:
- draw_byte(c, g_loc_X++, g_loc_Y);
- }
- if (g_loc_X >= g_max_loc_X) {
- g_loc_X = 0;
- g_loc_Y++;
- cline = 1;
- }
-#ifndef NO_SCROLL
- while (g_loc_Y >= g_max_loc_Y) {
- scrollscreen();
- g_loc_Y--;
- }
-#else
- /* wrap around from bottom to top of screen so we don't
- waste time scrolling each line. -- paulus. */
- if (g_loc_Y >= g_max_loc_Y)
- g_loc_Y = 0;
- if (cline) {
- for (x = 0; x < g_max_loc_X; ++x)
- draw_byte(' ', x, g_loc_Y);
- }
-#endif
-}
-
-void BTEXT
-btext_drawstring(const char *c)
-{
- if (!boot_text_mapped)
- return;
- while (*c)
- btext_drawchar(*c++);
-}
-
-void BTEXT
-btext_drawhex(unsigned long v)
-{
- static char hex_table[] = "0123456789abcdef";
-
- if (!boot_text_mapped)
- return;
- btext_drawchar(hex_table[(v >> 28) & 0x0000000FUL]);
- btext_drawchar(hex_table[(v >> 24) & 0x0000000FUL]);
- btext_drawchar(hex_table[(v >> 20) & 0x0000000FUL]);
- btext_drawchar(hex_table[(v >> 16) & 0x0000000FUL]);
- btext_drawchar(hex_table[(v >> 12) & 0x0000000FUL]);
- btext_drawchar(hex_table[(v >> 8) & 0x0000000FUL]);
- btext_drawchar(hex_table[(v >> 4) & 0x0000000FUL]);
- btext_drawchar(hex_table[(v >> 0) & 0x0000000FUL]);
- btext_drawchar(' ');
-}
-
-static void BTEXT
-draw_byte(unsigned char c, long locX, long locY)
-{
- boot_infos_t* bi = &disp_bi;
- unsigned char *base = calc_base(bi, locX << 3, locY << 4);
- unsigned char *font = &vga_font[((unsigned long)c) * 16];
- int rb = bi->dispDeviceRowBytes;
-
- switch(bi->dispDeviceDepth) {
- case 24:
- case 32:
- draw_byte_32(font, (unsigned long *)base, rb);
- break;
- case 15:
- case 16:
- draw_byte_16(font, (unsigned long *)base, rb);
- break;
- case 8:
- draw_byte_8(font, (unsigned long *)base, rb);
- break;
- }
-}
-
-static unsigned long expand_bits_8[16] BTDATA = {
- 0x00000000,
- 0x000000ff,
- 0x0000ff00,
- 0x0000ffff,
- 0x00ff0000,
- 0x00ff00ff,
- 0x00ffff00,
- 0x00ffffff,
- 0xff000000,
- 0xff0000ff,
- 0xff00ff00,
- 0xff00ffff,
- 0xffff0000,
- 0xffff00ff,
- 0xffffff00,
- 0xffffffff
-};
-
-static unsigned long expand_bits_16[4] BTDATA = {
- 0x00000000,
- 0x0000ffff,
- 0xffff0000,
- 0xffffffff
-};
-
-
-static void BTEXT
-draw_byte_32(unsigned char *font, unsigned long *base, int rb)
-{
- int l, bits;
- int fg = 0xFFFFFFFFUL;
- int bg = 0x00000000UL;
-
- for (l = 0; l < 16; ++l)
- {
- bits = *font++;
- base[0] = (-(bits >> 7) & fg) ^ bg;
- base[1] = (-((bits >> 6) & 1) & fg) ^ bg;
- base[2] = (-((bits >> 5) & 1) & fg) ^ bg;
- base[3] = (-((bits >> 4) & 1) & fg) ^ bg;
- base[4] = (-((bits >> 3) & 1) & fg) ^ bg;
- base[5] = (-((bits >> 2) & 1) & fg) ^ bg;
- base[6] = (-((bits >> 1) & 1) & fg) ^ bg;
- base[7] = (-(bits & 1) & fg) ^ bg;
- base = (unsigned long *) ((char *)base + rb);
- }
-}
-
-static void BTEXT
-draw_byte_16(unsigned char *font, unsigned long *base, int rb)
-{
- int l, bits;
- int fg = 0xFFFFFFFFUL;
- int bg = 0x00000000UL;
- unsigned long *eb = expand_bits_16;
-
- for (l = 0; l < 16; ++l)
- {
- bits = *font++;
- base[0] = (eb[bits >> 6] & fg) ^ bg;
- base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg;
- base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg;
- base[3] = (eb[bits & 3] & fg) ^ bg;
- base = (unsigned long *) ((char *)base + rb);
- }
-}
-
-static void BTEXT
-draw_byte_8(unsigned char *font, unsigned long *base, int rb)
-{
- int l, bits;
- int fg = 0x0F0F0F0FUL;
- int bg = 0x00000000UL;
- unsigned long *eb = expand_bits_8;
-
- for (l = 0; l < 16; ++l)
- {
- bits = *font++;
- base[0] = (eb[bits >> 4] & fg) ^ bg;
- base[1] = (eb[bits & 0xf] & fg) ^ bg;
- base = (unsigned long *) ((char *)base + rb);
- }
-}
-
-static unsigned char vga_font[cmapsz] BTDATA = {
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x81, 0xa5, 0x81, 0x81, 0xbd,
-0x99, 0x81, 0x81, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xff,
-0xdb, 0xff, 0xff, 0xc3, 0xe7, 0xff, 0xff, 0x7e, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x6c, 0xfe, 0xfe, 0xfe, 0xfe, 0x7c, 0x38, 0x10,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x7c, 0xfe,
-0x7c, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
-0x3c, 0x3c, 0xe7, 0xe7, 0xe7, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x18, 0x3c, 0x7e, 0xff, 0xff, 0x7e, 0x18, 0x18, 0x3c,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3c,
-0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff,
-0xff, 0xff, 0xe7, 0xc3, 0xc3, 0xe7, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x42, 0x42, 0x66, 0x3c, 0x00,
-0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xc3, 0x99, 0xbd,
-0xbd, 0x99, 0xc3, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x1e, 0x0e,
-0x1a, 0x32, 0x78, 0xcc, 0xcc, 0xcc, 0xcc, 0x78, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x3c, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x7e, 0x18, 0x18,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x33, 0x3f, 0x30, 0x30, 0x30,
-0x30, 0x70, 0xf0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x63,
-0x7f, 0x63, 0x63, 0x63, 0x63, 0x67, 0xe7, 0xe6, 0xc0, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x18, 0x18, 0xdb, 0x3c, 0xe7, 0x3c, 0xdb, 0x18, 0x18,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfe, 0xf8,
-0xf0, 0xe0, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x0e,
-0x1e, 0x3e, 0xfe, 0x3e, 0x1e, 0x0e, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66,
-0x66, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0xdb,
-0xdb, 0xdb, 0x7b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x7c, 0xc6, 0x60, 0x38, 0x6c, 0xc6, 0xc6, 0x6c, 0x38, 0x0c, 0xc6,
-0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xfe, 0xfe, 0xfe, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3c,
-0x7e, 0x18, 0x18, 0x18, 0x7e, 0x3c, 0x18, 0x7e, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x18, 0x3c, 0x7e, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x7e, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x18, 0x0c, 0xfe, 0x0c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x60, 0xfe, 0x60, 0x30, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0,
-0xc0, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x24, 0x66, 0xff, 0x66, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x38, 0x7c, 0x7c, 0xfe, 0xfe, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xfe, 0x7c, 0x7c,
-0x38, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x18, 0x3c, 0x3c, 0x3c, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x24, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6c,
-0x6c, 0xfe, 0x6c, 0x6c, 0x6c, 0xfe, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00,
-0x18, 0x18, 0x7c, 0xc6, 0xc2, 0xc0, 0x7c, 0x06, 0x06, 0x86, 0xc6, 0x7c,
-0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc2, 0xc6, 0x0c, 0x18,
-0x30, 0x60, 0xc6, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6c,
-0x6c, 0x38, 0x76, 0xdc, 0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x30, 0x30, 0x30, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x18, 0x30, 0x30, 0x30, 0x30,
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-0xff, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x66, 0x66,
-0x7c, 0x62, 0x66, 0x6f, 0x66, 0x66, 0x66, 0xf3, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x0e, 0x1b, 0x18, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x18, 0x18, 0x18,
-0xd8, 0x70, 0x00, 0x00, 0x00, 0x18, 0x30, 0x60, 0x00, 0x78, 0x0c, 0x7c,
-0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x18, 0x30,
-0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x18, 0x30, 0x60, 0x00, 0x7c, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x7c,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x30, 0x60, 0x00, 0xcc, 0xcc, 0xcc,
-0xcc, 0xcc, 0xcc, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xdc,
-0x00, 0xdc, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00,
-0x76, 0xdc, 0x00, 0xc6, 0xe6, 0xf6, 0xfe, 0xde, 0xce, 0xc6, 0xc6, 0xc6,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x6c, 0x6c, 0x3e, 0x00, 0x7e, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6c, 0x6c,
-0x38, 0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x30, 0x30, 0x00, 0x30, 0x30, 0x60, 0xc0, 0xc6, 0xc6, 0x7c,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xc0,
-0xc0, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0xfe, 0x06, 0x06, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0xc0, 0xc0, 0xc2, 0xc6, 0xcc, 0x18, 0x30, 0x60, 0xce, 0x9b, 0x06,
-0x0c, 0x1f, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0xc2, 0xc6, 0xcc, 0x18, 0x30,
-0x66, 0xce, 0x96, 0x3e, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18,
-0x00, 0x18, 0x18, 0x18, 0x3c, 0x3c, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x6c, 0xd8, 0x6c, 0x36, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd8, 0x6c, 0x36,
-0x6c, 0xd8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x44, 0x11, 0x44,
-0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44,
-0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa,
-0x55, 0xaa, 0x55, 0xaa, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77,
-0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0xdd, 0x77, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0xf8,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0xf6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x18, 0xf8,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36,
-0x36, 0xf6, 0x06, 0xf6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x06, 0xf6,
-0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x36, 0xf6, 0x06, 0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xfe, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0xf8,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xff,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x37,
-0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x37, 0x30, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xf7, 0x00, 0xff,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0xff, 0x00, 0xf7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x00, 0xff,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x36, 0x36, 0x36,
-0x36, 0xf7, 0x00, 0xf7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xff,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0xff, 0x00, 0xff, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x3f,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x1f, 0x18, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x18, 0x1f, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f,
-0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x36, 0x36, 0x36, 0xff, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
-0x18, 0x18, 0x18, 0x18, 0x18, 0xff, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xf8,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
-0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, 0xf0, 0xf0, 0xf0,
-0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
-0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
-0x0f, 0x0f, 0x0f, 0x0f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x76, 0xdc, 0xd8, 0xd8, 0xd8, 0xdc, 0x76, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x78, 0xcc, 0xcc, 0xcc, 0xd8, 0xcc, 0xc6, 0xc6, 0xc6, 0xcc,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0xc6, 0xc6, 0xc0, 0xc0, 0xc0,
-0xc0, 0xc0, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0xfe, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0xfe, 0xc6, 0x60, 0x30, 0x18, 0x30, 0x60, 0xc6, 0xfe,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0xd8, 0xd8,
-0xd8, 0xd8, 0xd8, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x66, 0x66, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0xc0, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x18, 0x3c, 0x66, 0x66,
-0x66, 0x3c, 0x18, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
-0x6c, 0xc6, 0xc6, 0xfe, 0xc6, 0xc6, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x38, 0x6c, 0xc6, 0xc6, 0xc6, 0x6c, 0x6c, 0x6c, 0x6c, 0xee,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, 0x30, 0x18, 0x0c, 0x3e, 0x66,
-0x66, 0x66, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x7e, 0xdb, 0xdb, 0xdb, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x03, 0x06, 0x7e, 0xdb, 0xdb, 0xf3, 0x7e, 0x60, 0xc0,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x30, 0x60, 0x60, 0x7c, 0x60,
-0x60, 0x60, 0x30, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c,
-0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0xc6, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0xfe, 0x00, 0x00, 0xfe, 0x00, 0x00, 0xfe, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18,
-0x18, 0x00, 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
-0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x00, 0x7e,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, 0x1b, 0x1b, 0x1b, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
-0x18, 0x18, 0x18, 0x18, 0xd8, 0xd8, 0xd8, 0x70, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x7e, 0x00, 0x18, 0x18, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xdc, 0x00,
-0x76, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6c, 0x6c,
-0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0x0c, 0x0c,
-0x0c, 0x0c, 0x0c, 0xec, 0x6c, 0x6c, 0x3c, 0x1c, 0x00, 0x00, 0x00, 0x00,
-0x00, 0xd8, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0xd8, 0x30, 0x60, 0xc8, 0xf8, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-0x00, 0x00, 0x00, 0x00,
-};
diff --git a/arch/ppc/syslib/cpc700.h b/arch/ppc/syslib/cpc700.h
deleted file mode 100644
index 987e9aa..0000000
--- a/arch/ppc/syslib/cpc700.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Header file for IBM CPC700 Host Bridge, et. al.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * This file contains the defines and macros for the IBM CPC700 host bridge,
- * memory controller, PIC, UARTs, IIC, and Timers.
- */
-
-#ifndef __PPC_SYSLIB_CPC700_H__
-#define __PPC_SYSLIB_CPC700_H__
-
-#include <linux/stddef.h>
-#include <linux/types.h>
-#include <linux/init.h>
-
-/* XXX no barriers? not even any volatiles? -- paulus */
-#define CPC700_OUT_32(a,d) (*(u_int *)a = d)
-#define CPC700_IN_32(a) (*(u_int *)a)
-
-/*
- * PCI Section
- */
-#define CPC700_PCI_CONFIG_ADDR 0xfec00000
-#define CPC700_PCI_CONFIG_DATA 0xfec00004
-
-/* CPU -> PCI memory window 0 */
-#define CPC700_PMM0_LOCAL 0xff400000 /* CPU physical addr */
-#define CPC700_PMM0_MASK_ATTR 0xff400004 /* size and attrs */
-#define CPC700_PMM0_PCI_LOW 0xff400008 /* PCI addr, low word */
-#define CPC700_PMM0_PCI_HIGH 0xff40000c /* PCI addr, high wd */
-/* CPU -> PCI memory window 1 */
-#define CPC700_PMM1_LOCAL 0xff400010
-#define CPC700_PMM1_MASK_ATTR 0xff400014
-#define CPC700_PMM1_PCI_LOW 0xff400018
-#define CPC700_PMM1_PCI_HIGH 0xff40001c
-/* CPU -> PCI memory window 2 */
-#define CPC700_PMM2_LOCAL 0xff400020
-#define CPC700_PMM2_MASK_ATTR 0xff400024
-#define CPC700_PMM2_PCI_LOW 0xff400028
-#define CPC700_PMM2_PCI_HIGH 0xff40002c
-/* PCI memory -> CPU window 1 */
-#define CPC700_PTM1_MEMSIZE 0xff400030 /* window size */
-#define CPC700_PTM1_LOCAL 0xff400034 /* CPU phys addr */
-/* PCI memory -> CPU window 2 */
-#define CPC700_PTM2_MEMSIZE 0xff400038 /* size and enable */
-#define CPC700_PTM2_LOCAL 0xff40003c
-
-/*
- * PIC Section
- *
- * IBM calls the CPC700's programmable interrupt controller the Universal
- * Interrupt Controller or UIC.
- */
-
-/*
- * UIC Register Addresses.
- */
-#define CPC700_UIC_UICSR 0xff500880 /* Status Reg (Rd/Clr)*/
-#define CPC700_UIC_UICSRS 0xff500884 /* Status Reg (Set) */
-#define CPC700_UIC_UICER 0xff500888 /* Enable Reg */
-#define CPC700_UIC_UICCR 0xff50088c /* Critical Reg */
-#define CPC700_UIC_UICPR 0xff500890 /* Polarity Reg */
-#define CPC700_UIC_UICTR 0xff500894 /* Trigger Reg */
-#define CPC700_UIC_UICMSR 0xff500898 /* Masked Status Reg */
-#define CPC700_UIC_UICVR 0xff50089c /* Vector Reg */
-#define CPC700_UIC_UICVCR 0xff5008a0 /* Vector Config Reg */
-
-#define CPC700_UIC_UICER_ENABLE 0x00000001 /* Enable an IRQ */
-
-#define CPC700_UIC_UICVCR_31_HI 0x00000000 /* IRQ 31 hi priority */
-#define CPC700_UIC_UICVCR_0_HI 0x00000001 /* IRQ 0 hi priority */
-#define CPC700_UIC_UICVCR_BASE_MASK 0xfffffffc
-#define CPC700_UIC_UICVCR_ORDER_MASK 0x00000001
-
-/* Specify value of a bit for an IRQ. */
-#define CPC700_UIC_IRQ_BIT(i) ((0x00000001) << (31 - (i)))
-
-/*
- * UIC Exports...
- */
-extern struct hw_interrupt_type cpc700_pic;
-extern unsigned int cpc700_irq_assigns[32][2];
-
-extern void __init cpc700_init_IRQ(void);
-extern int cpc700_get_irq(void);
-
-#endif /* __PPC_SYSLIB_CPC700_H__ */
diff --git a/arch/ppc/syslib/cpc700_pic.c b/arch/ppc/syslib/cpc700_pic.c
deleted file mode 100644
index d48e8f4..0000000
--- a/arch/ppc/syslib/cpc700_pic.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/*
- * Interrupt controller support for IBM Spruce
- *
- * Authors: Mark Greer, Matt Porter, and Johnnie Peters
- * mgreer@mvista.com
- * mporter@mvista.com
- * jpeters@mvista.com
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/irq.h>
-
-#include <asm/io.h>
-#include <asm/system.h>
-#include <asm/irq.h>
-
-#include "cpc700.h"
-
-static void
-cpc700_unmask_irq(unsigned int irq)
-{
- unsigned int tr_bits;
-
- /*
- * IRQ 31 is largest IRQ supported.
- * IRQs 17-19 are reserved.
- */
- if ((irq <= 31) && ((irq < 17) || (irq > 19))) {
- tr_bits = CPC700_IN_32(CPC700_UIC_UICTR);
-
- if ((tr_bits & (1 << (31 - irq))) == 0) {
- /* level trigger interrupt, clear bit in status
- * register */
- CPC700_OUT_32(CPC700_UIC_UICSR, 1 << (31 - irq));
- }
-
- /* Know IRQ fits in entry 0 of ppc_cached_irq_mask[] */
- ppc_cached_irq_mask[0] |= CPC700_UIC_IRQ_BIT(irq);
-
- CPC700_OUT_32(CPC700_UIC_UICER, ppc_cached_irq_mask[0]);
- }
- return;
-}
-
-static void
-cpc700_mask_irq(unsigned int irq)
-{
- /*
- * IRQ 31 is largest IRQ supported.
- * IRQs 17-19 are reserved.
- */
- if ((irq <= 31) && ((irq < 17) || (irq > 19))) {
- /* Know IRQ fits in entry 0 of ppc_cached_irq_mask[] */
- ppc_cached_irq_mask[0] &=
- ~CPC700_UIC_IRQ_BIT(irq);
-
- CPC700_OUT_32(CPC700_UIC_UICER, ppc_cached_irq_mask[0]);
- }
- return;
-}
-
-static void
-cpc700_mask_and_ack_irq(unsigned int irq)
-{
- u_int bit;
-
- /*
- * IRQ 31 is largest IRQ supported.
- * IRQs 17-19 are reserved.
- */
- if ((irq <= 31) && ((irq < 17) || (irq > 19))) {
- /* Know IRQ fits in entry 0 of ppc_cached_irq_mask[] */
- bit = CPC700_UIC_IRQ_BIT(irq);
-
- ppc_cached_irq_mask[0] &= ~bit;
- CPC700_OUT_32(CPC700_UIC_UICER, ppc_cached_irq_mask[0]);
- CPC700_OUT_32(CPC700_UIC_UICSR, bit); /* Write 1 clears IRQ */
- }
- return;
-}
-
-static struct hw_interrupt_type cpc700_pic = {
- .typename = "CPC700 PIC",
- .enable = cpc700_unmask_irq,
- .disable = cpc700_mask_irq,
- .ack = cpc700_mask_and_ack_irq,
-};
-
-__init static void
-cpc700_pic_init_irq(unsigned int irq)
-{
- unsigned int tmp;
-
- /* Set interrupt sense */
- tmp = CPC700_IN_32(CPC700_UIC_UICTR);
- if (cpc700_irq_assigns[irq][0] == 0) {
- tmp &= ~CPC700_UIC_IRQ_BIT(irq);
- } else {
- tmp |= CPC700_UIC_IRQ_BIT(irq);
- }
- CPC700_OUT_32(CPC700_UIC_UICTR, tmp);
-
- /* Set interrupt polarity */
- tmp = CPC700_IN_32(CPC700_UIC_UICPR);
- if (cpc700_irq_assigns[irq][1]) {
- tmp |= CPC700_UIC_IRQ_BIT(irq);
- } else {
- tmp &= ~CPC700_UIC_IRQ_BIT(irq);
- }
- CPC700_OUT_32(CPC700_UIC_UICPR, tmp);
-
- /* Set interrupt critical */
- tmp = CPC700_IN_32(CPC700_UIC_UICCR);
- tmp |= CPC700_UIC_IRQ_BIT(irq);
- CPC700_OUT_32(CPC700_UIC_UICCR, tmp);
-
- return;
-}
-
-__init void
-cpc700_init_IRQ(void)
-{
- int i;
-
- ppc_cached_irq_mask[0] = 0;
- CPC700_OUT_32(CPC700_UIC_UICER, 0x00000000); /* Disable all irq's */
- CPC700_OUT_32(CPC700_UIC_UICSR, 0xffffffff); /* Clear cur intrs */
- CPC700_OUT_32(CPC700_UIC_UICCR, 0xffffffff); /* Gen INT not MCP */
- CPC700_OUT_32(CPC700_UIC_UICPR, 0x00000000); /* Active low */
- CPC700_OUT_32(CPC700_UIC_UICTR, 0x00000000); /* Level Sensitive */
- CPC700_OUT_32(CPC700_UIC_UICVR, CPC700_UIC_UICVCR_0_HI);
- /* IRQ 0 is highest */
-
- for (i = 0; i < 17; i++) {
- irq_desc[i].chip = &cpc700_pic;
- cpc700_pic_init_irq(i);
- }
-
- for (i = 20; i < 32; i++) {
- irq_desc[i].chip = &cpc700_pic;
- cpc700_pic_init_irq(i);
- }
-
- return;
-}
-
-
-
-/*
- * Find the highest IRQ that generating an interrupt, if any.
- */
-int
-cpc700_get_irq(void)
-{
- int irq = 0;
- u_int irq_status, irq_test = 1;
-
- irq_status = CPC700_IN_32(CPC700_UIC_UICMSR);
-
- do
- {
- if (irq_status & irq_test)
- break;
- irq++;
- irq_test <<= 1;
- } while (irq < NR_IRQS);
-
-
- if (irq == NR_IRQS)
- irq = 33;
-
- return (31 - irq);
-}
diff --git a/arch/ppc/syslib/cpm2_common.c b/arch/ppc/syslib/cpm2_common.c
deleted file mode 100644
index 6cd859d..0000000
--- a/arch/ppc/syslib/cpm2_common.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/*
- * General Purpose functions for the global management of the
- * 8260 Communication Processor Module.
- * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
- * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
- * 2.3.99 Updates
- *
- * In addition to the individual control of the communication
- * channels, there are a few functions that globally affect the
- * communication processor.
- *
- * Buffer descriptors must be allocated from the dual ported memory
- * space. The allocator for that is here. When the communication
- * process is reset, we reclaim the memory available. There is
- * currently no deallocator for this memory.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/module.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/mpc8260.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/cpm2.h>
-#include <asm/rheap.h>
-
-static void cpm2_dpinit(void);
-cpm_cpm2_t *cpmp; /* Pointer to comm processor space */
-
-/* We allocate this here because it is used almost exclusively for
- * the communication processor devices.
- */
-cpm2_map_t *cpm2_immr;
-
-#define CPM_MAP_SIZE (0x40000) /* 256k - the PQ3 reserve this amount
- of space for CPM as it is larger
- than on PQ2 */
-
-void
-cpm2_reset(void)
-{
- cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
-
- /* Reclaim the DP memory for our use.
- */
- cpm2_dpinit();
-
- /* Tell everyone where the comm processor resides.
- */
- cpmp = &cpm2_immr->im_cpm;
-}
-
-/* Set a baud rate generator. This needs lots of work. There are
- * eight BRGs, which can be connected to the CPM channels or output
- * as clocks. The BRGs are in two different block of internal
- * memory mapped space.
- * The baud rate clock is the system clock divided by something.
- * It was set up long ago during the initial boot phase and is
- * is given to us.
- * Baud rate clocks are zero-based in the driver code (as that maps
- * to port numbers). Documentation uses 1-based numbering.
- */
-#define BRG_INT_CLK (((bd_t *)__res)->bi_brgfreq)
-#define BRG_UART_CLK (BRG_INT_CLK/16)
-
-/* This function is used by UARTS, or anything else that uses a 16x
- * oversampled clock.
- */
-void
-cpm_setbrg(uint brg, uint rate)
-{
- volatile uint *bp;
-
- /* This is good enough to get SMCs running.....
- */
- if (brg < 4) {
- bp = (uint *)&cpm2_immr->im_brgc1;
- }
- else {
- bp = (uint *)&cpm2_immr->im_brgc5;
- brg -= 4;
- }
- bp += brg;
- *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
-}
-
-/* This function is used to set high speed synchronous baud rate
- * clocks.
- */
-void
-cpm2_fastbrg(uint brg, uint rate, int div16)
-{
- volatile uint *bp;
-
- if (brg < 4) {
- bp = (uint *)&cpm2_immr->im_brgc1;
- }
- else {
- bp = (uint *)&cpm2_immr->im_brgc5;
- brg -= 4;
- }
- bp += brg;
- *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
- if (div16)
- *bp |= CPM_BRG_DIV16;
-}
-
-/*
- * dpalloc / dpfree bits.
- */
-static spinlock_t cpm_dpmem_lock;
-/* 16 blocks should be enough to satisfy all requests
- * until the memory subsystem goes up... */
-static rh_block_t cpm_boot_dpmem_rh_block[16];
-static rh_info_t cpm_dpmem_info;
-
-static void cpm2_dpinit(void)
-{
- spin_lock_init(&cpm_dpmem_lock);
-
- /* initialize the info header */
- rh_init(&cpm_dpmem_info, 1,
- sizeof(cpm_boot_dpmem_rh_block) /
- sizeof(cpm_boot_dpmem_rh_block[0]),
- cpm_boot_dpmem_rh_block);
-
- /* Attach the usable dpmem area */
- /* XXX: This is actually crap. CPM_DATAONLY_BASE and
- * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
- * varies with the processor and the microcode patches activated.
- * But the following should be at least safe.
- */
- rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
-}
-
-/* This function returns an index into the DPRAM area.
- */
-unsigned long cpm_dpalloc(uint size, uint align)
-{
- unsigned long start;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- cpm_dpmem_info.alignment = align;
- start = rh_alloc(&cpm_dpmem_info, size, "commproc");
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return start;
-}
-EXPORT_SYMBOL(cpm_dpalloc);
-
-int cpm_dpfree(unsigned long offset)
-{
- int ret;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- ret = rh_free(&cpm_dpmem_info, offset);
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return ret;
-}
-EXPORT_SYMBOL(cpm_dpfree);
-
-/* not sure if this is ever needed */
-unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
-{
- unsigned long start;
- unsigned long flags;
-
- spin_lock_irqsave(&cpm_dpmem_lock, flags);
- cpm_dpmem_info.alignment = align;
- start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
- spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
-
- return start;
-}
-EXPORT_SYMBOL(cpm_dpalloc_fixed);
-
-void cpm_dpdump(void)
-{
- rh_dump(&cpm_dpmem_info);
-}
-EXPORT_SYMBOL(cpm_dpdump);
-
-void *cpm_dpram_addr(unsigned long offset)
-{
- return (void *)&cpm2_immr->im_dprambase[offset];
-}
-EXPORT_SYMBOL(cpm_dpram_addr);
diff --git a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c
deleted file mode 100644
index fb2d584..0000000
--- a/arch/ppc/syslib/cpm2_pic.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* The CPM2 internal interrupt controller. It is usually
- * the only interrupt controller.
- * There are two 32-bit registers (high/low) for up to 64
- * possible interrupts.
- *
- * Now, the fun starts.....Interrupt Numbers DO NOT MAP
- * in a simple arithmetic fashion to mask or pending registers.
- * That is, interrupt 4 does not map to bit position 4.
- * We create two tables, indexed by vector number, to indicate
- * which register to use and which bit in the register to use.
- */
-
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/irq.h>
-
-#include <asm/immap_cpm2.h>
-#include <asm/mpc8260.h>
-
-#include "cpm2_pic.h"
-
-static u_char irq_to_siureg[] = {
- 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0
-};
-
-/* bit numbers do not match the docs, these are precomputed so the bit for
- * a given irq is (1 << irq_to_siubit[irq]) */
-static u_char irq_to_siubit[] = {
- 0, 15, 14, 13, 12, 11, 10, 9,
- 8, 7, 6, 5, 4, 3, 2, 1,
- 2, 1, 0, 14, 13, 12, 11, 10,
- 9, 8, 7, 6, 5, 4, 3, 0,
- 31, 30, 29, 28, 27, 26, 25, 24,
- 23, 22, 21, 20, 19, 18, 17, 16,
- 16, 17, 18, 19, 20, 21, 22, 23,
- 24, 25, 26, 27, 28, 29, 30, 31,
-};
-
-static void cpm2_mask_irq(unsigned int irq_nr)
-{
- int bit, word;
- volatile uint *simr;
-
- irq_nr -= CPM_IRQ_OFFSET;
-
- bit = irq_to_siubit[irq_nr];
- word = irq_to_siureg[irq_nr];
-
- simr = &(cpm2_immr->im_intctl.ic_simrh);
- ppc_cached_irq_mask[word] &= ~(1 << bit);
- simr[word] = ppc_cached_irq_mask[word];
-}
-
-static void cpm2_unmask_irq(unsigned int irq_nr)
-{
- int bit, word;
- volatile uint *simr;
-
- irq_nr -= CPM_IRQ_OFFSET;
-
- bit = irq_to_siubit[irq_nr];
- word = irq_to_siureg[irq_nr];
-
- simr = &(cpm2_immr->im_intctl.ic_simrh);
- ppc_cached_irq_mask[word] |= 1 << bit;
- simr[word] = ppc_cached_irq_mask[word];
-}
-
-static void cpm2_mask_and_ack(unsigned int irq_nr)
-{
- int bit, word;
- volatile uint *simr, *sipnr;
-
- irq_nr -= CPM_IRQ_OFFSET;
-
- bit = irq_to_siubit[irq_nr];
- word = irq_to_siureg[irq_nr];
-
- simr = &(cpm2_immr->im_intctl.ic_simrh);
- sipnr = &(cpm2_immr->im_intctl.ic_sipnrh);
- ppc_cached_irq_mask[word] &= ~(1 << bit);
- simr[word] = ppc_cached_irq_mask[word];
- sipnr[word] = 1 << bit;
-}
-
-static void cpm2_end_irq(unsigned int irq_nr)
-{
- int bit, word;
- volatile uint *simr;
-
- if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
- && irq_desc[irq_nr].action) {
-
- irq_nr -= CPM_IRQ_OFFSET;
- bit = irq_to_siubit[irq_nr];
- word = irq_to_siureg[irq_nr];
-
- simr = &(cpm2_immr->im_intctl.ic_simrh);
- ppc_cached_irq_mask[word] |= 1 << bit;
- simr[word] = ppc_cached_irq_mask[word];
- /*
- * Work around large numbers of spurious IRQs on PowerPC 82xx
- * systems.
- */
- mb();
- }
-}
-
-static struct hw_interrupt_type cpm2_pic = {
- .typename = " CPM2 SIU ",
- .enable = cpm2_unmask_irq,
- .disable = cpm2_mask_irq,
- .ack = cpm2_mask_and_ack,
- .end = cpm2_end_irq,
-};
-
-int cpm2_get_irq(void)
-{
- int irq;
- unsigned long bits;
-
- /* For CPM2, read the SIVEC register and shift the bits down
- * to get the irq number. */
- bits = cpm2_immr->im_intctl.ic_sivec;
- irq = bits >> 26;
-
- if (irq == 0)
- return(-1);
- return irq+CPM_IRQ_OFFSET;
-}
-
-void cpm2_init_IRQ(void)
-{
- int i;
-
- /* Clear the CPM IRQ controller, in case it has any bits set
- * from the bootloader
- */
-
- /* Mask out everything */
- cpm2_immr->im_intctl.ic_simrh = 0x00000000;
- cpm2_immr->im_intctl.ic_simrl = 0x00000000;
- wmb();
-
- /* Ack everything */
- cpm2_immr->im_intctl.ic_sipnrh = 0xffffffff;
- cpm2_immr->im_intctl.ic_sipnrl = 0xffffffff;
- wmb();
-
- /* Dummy read of the vector */
- i = cpm2_immr->im_intctl.ic_sivec;
- rmb();
-
- /* Initialize the default interrupt mapping priorities,
- * in case the boot rom changed something on us.
- */
- cpm2_immr->im_intctl.ic_sicr = 0;
- cpm2_immr->im_intctl.ic_scprrh = 0x05309770;
- cpm2_immr->im_intctl.ic_scprrl = 0x05309770;
-
-
- /* Enable chaining to OpenPIC, and make everything level
- */
- for (i = 0; i < NR_CPM_INTS; i++) {
- irq_desc[i+CPM_IRQ_OFFSET].chip = &cpm2_pic;
- irq_desc[i+CPM_IRQ_OFFSET].status |= IRQ_LEVEL;
- }
-}
diff --git a/arch/ppc/syslib/cpm2_pic.h b/arch/ppc/syslib/cpm2_pic.h
deleted file mode 100644
index 4673393..0000000
--- a/arch/ppc/syslib/cpm2_pic.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _PPC_KERNEL_CPM2_H
-#define _PPC_KERNEL_CPM2_H
-
-extern int cpm2_get_irq(void);
-
-extern void cpm2_init_IRQ(void);
-
-#endif /* _PPC_KERNEL_CPM2_H */
diff --git a/arch/ppc/syslib/gen550.h b/arch/ppc/syslib/gen550.h
deleted file mode 100644
index 5254d3c..0000000
--- a/arch/ppc/syslib/gen550.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*
- * gen550 prototypes
- *
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * 2004 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-extern void gen550_progress(char *, unsigned short);
-extern void gen550_init(int, struct uart_port *);
-extern void gen550_kgdb_map_scc(void);
diff --git a/arch/ppc/syslib/gen550_dbg.c b/arch/ppc/syslib/gen550_dbg.c
deleted file mode 100644
index 9293f5c..0000000
--- a/arch/ppc/syslib/gen550_dbg.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/*
- * A library of polled 16550 serial routines. These are intended to
- * be used to support progress messages, xmon, kgdb, etc. on a
- * variety of platforms.
- *
- * Adapted from lots of code ripped from the arch/ppc/boot/ polled
- * 16550 support.
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2002-2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <linux/serial.h>
-#include <linux/tty.h> /* For linux/serial_core.h */
-#include <linux/serial_core.h>
-#include <linux/serialP.h>
-#include <linux/serial_reg.h>
-#include <asm/machdep.h>
-#include <asm/serial.h>
-#include <asm/io.h>
-
-#define SERIAL_BAUD 9600
-
-/* SERIAL_PORT_DFNS is defined in <asm/serial.h> */
-#ifndef SERIAL_PORT_DFNS
-#define SERIAL_PORT_DFNS
-#endif
-
-static struct serial_state rs_table[RS_TABLE_SIZE] = {
- SERIAL_PORT_DFNS /* defined in <asm/serial.h> */
-};
-
-static void (*serial_outb)(unsigned long, unsigned char);
-static unsigned long (*serial_inb)(unsigned long);
-
-static int shift;
-
-unsigned long direct_inb(unsigned long addr)
-{
- return readb((void __iomem *)addr);
-}
-
-void direct_outb(unsigned long addr, unsigned char val)
-{
- writeb(val, (void __iomem *)addr);
-}
-
-unsigned long io_inb(unsigned long port)
-{
- return inb(port);
-}
-
-void io_outb(unsigned long port, unsigned char val)
-{
- outb(val, port);
-}
-
-unsigned long serial_init(int chan, void *ignored)
-{
- unsigned long com_port;
- unsigned char lcr, dlm;
-
- /* We need to find out which type io we're expecting. If it's
- * 'SERIAL_IO_PORT', we get an offset from the isa_io_base.
- * If it's 'SERIAL_IO_MEM', we can the exact location. -- Tom */
- switch (rs_table[chan].io_type) {
- case SERIAL_IO_PORT:
- com_port = rs_table[chan].port;
- serial_outb = io_outb;
- serial_inb = io_inb;
- break;
- case SERIAL_IO_MEM:
- com_port = (unsigned long)rs_table[chan].iomem_base;
- serial_outb = direct_outb;
- serial_inb = direct_inb;
- break;
- default:
- /* We can't deal with it. */
- return -1;
- }
-
- /* How far apart the registers are. */
- shift = rs_table[chan].iomem_reg_shift;
-
- /* save the LCR */
- lcr = serial_inb(com_port + (UART_LCR << shift));
-
- /* Access baud rate */
- serial_outb(com_port + (UART_LCR << shift), UART_LCR_DLAB);
- dlm = serial_inb(com_port + (UART_DLM << shift));
-
- /*
- * Test if serial port is unconfigured
- * We assume that no-one uses less than 110 baud or
- * less than 7 bits per character these days.
- * -- paulus.
- */
- if ((dlm <= 4) && (lcr & 2)) {
- /* port is configured, put the old LCR back */
- serial_outb(com_port + (UART_LCR << shift), lcr);
- }
- else {
- /* Input clock. */
- serial_outb(com_port + (UART_DLL << shift),
- (rs_table[chan].baud_base / SERIAL_BAUD) & 0xFF);
- serial_outb(com_port + (UART_DLM << shift),
- (rs_table[chan].baud_base / SERIAL_BAUD) >> 8);
- /* 8 data, 1 stop, no parity */
- serial_outb(com_port + (UART_LCR << shift), 0x03);
- /* RTS/DTR */
- serial_outb(com_port + (UART_MCR << shift), 0x03);
-
- /* Clear & enable FIFOs */
- serial_outb(com_port + (UART_FCR << shift), 0x07);
- }
-
- return (com_port);
-}
-
-void
-serial_putc(unsigned long com_port, unsigned char c)
-{
- while ((serial_inb(com_port + (UART_LSR << shift)) & UART_LSR_THRE) == 0)
- ;
- serial_outb(com_port, c);
-}
-
-unsigned char
-serial_getc(unsigned long com_port)
-{
- while ((serial_inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) == 0)
- ;
- return serial_inb(com_port);
-}
-
-int
-serial_tstc(unsigned long com_port)
-{
- return ((serial_inb(com_port + (UART_LSR << shift)) & UART_LSR_DR) != 0);
-}
-
-void
-serial_close(unsigned long com_port)
-{
-}
-
-void
-gen550_init(int i, struct uart_port *serial_req)
-{
- rs_table[i].io_type = serial_req->iotype;
- rs_table[i].port = serial_req->iobase;
- rs_table[i].iomem_base = serial_req->membase;
- rs_table[i].iomem_reg_shift = serial_req->regshift;
- rs_table[i].baud_base = serial_req->uartclk ? serial_req->uartclk / 16 : BASE_BAUD;
-}
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-void
-gen550_progress(char *s, unsigned short hex)
-{
- volatile unsigned int progress_debugport;
- volatile char c;
-
- progress_debugport = serial_init(0, NULL);
-
- serial_putc(progress_debugport, '\r');
-
- while ((c = *s++) != 0)
- serial_putc(progress_debugport, c);
-
- serial_putc(progress_debugport, '\n');
- serial_putc(progress_debugport, '\r');
-}
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
diff --git a/arch/ppc/syslib/gen550_kgdb.c b/arch/ppc/syslib/gen550_kgdb.c
deleted file mode 100644
index 987cc04..0000000
--- a/arch/ppc/syslib/gen550_kgdb.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * Generic 16550 kgdb support intended to be useful on a variety
- * of platforms. To enable this support, it is necessary to set
- * the CONFIG_GEN550 option. Any virtual mapping of the serial
- * port(s) to be used can be accomplished by setting
- * ppc_md.early_serial_map to a platform-specific mapping function.
- *
- * Adapted from ppc4xx_kgdb.c.
- *
- * Author: Matt Porter <mporter@kernel.crashing.org>
- *
- * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-
-#include <asm/machdep.h>
-
-extern unsigned long serial_init(int, void *);
-extern unsigned long serial_getc(unsigned long);
-extern unsigned long serial_putc(unsigned long, unsigned char);
-
-#if defined(CONFIG_KGDB_TTYS0)
-#define KGDB_PORT 0
-#elif defined(CONFIG_KGDB_TTYS1)
-#define KGDB_PORT 1
-#elif defined(CONFIG_KGDB_TTYS2)
-#define KGDB_PORT 2
-#elif defined(CONFIG_KGDB_TTYS3)
-#define KGDB_PORT 3
-#else
-#error "invalid kgdb_tty port"
-#endif
-
-static volatile unsigned int kgdb_debugport;
-
-void putDebugChar(unsigned char c)
-{
- if (kgdb_debugport == 0)
- kgdb_debugport = serial_init(KGDB_PORT, NULL);
-
- serial_putc(kgdb_debugport, c);
-}
-
-int getDebugChar(void)
-{
- if (kgdb_debugport == 0)
- kgdb_debugport = serial_init(KGDB_PORT, NULL);
-
- return(serial_getc(kgdb_debugport));
-}
-
-void kgdb_interruptible(int enable)
-{
- return;
-}
-
-void putDebugString(char* str)
-{
- while (*str != '\0') {
- putDebugChar(*str);
- str++;
- }
- putDebugChar('\r');
- return;
-}
-
-/*
- * Note: gen550_init() must be called already on the port we are going
- * to use.
- */
-void
-gen550_kgdb_map_scc(void)
-{
- printk(KERN_DEBUG "kgdb init\n");
- if (ppc_md.early_serial_map)
- ppc_md.early_serial_map();
- kgdb_debugport = serial_init(KGDB_PORT, NULL);
-}
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c
deleted file mode 100644
index 3b4fcca..0000000
--- a/arch/ppc/syslib/gt64260_pic.c
+++ /dev/null
@@ -1,323 +0,0 @@
-/*
- * Interrupt controller support for Galileo's GT64260.
- *
- * Author: Chris Zankel <source@mvista.com>
- * Modified by: Mark A. Greer <mgreer@mvista.com>
- *
- * Based on sources from Rabeeh Khoury / Galileo Technology
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * This file contains the specific functions to support the GT64260
- * interrupt controller.
- *
- * The GT64260 has two main interrupt registers (high and low) that
- * summarizes the interrupts generated by the units of the GT64260.
- * Each bit is assigned to an interrupt number, where the low register
- * are assigned from IRQ0 to IRQ31 and the high cause register
- * from IRQ32 to IRQ63
- * The GPP (General Purpose Port) interrupts are assigned from IRQ64 (GPP0)
- * to IRQ95 (GPP31).
- * get_irq() returns the lowest interrupt number that is currently asserted.
- *
- * Note:
- * - This driver does not initialize the GPP when used as an interrupt
- * input.
- */
-
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-
-#include <asm/io.h>
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <asm/mv64x60.h>
-#include <asm/machdep.h>
-
-#define CPU_INTR_STR "gt64260 cpu interface error"
-#define PCI0_INTR_STR "gt64260 pci 0 error"
-#define PCI1_INTR_STR "gt64260 pci 1 error"
-
-/* ========================== forward declaration ========================== */
-
-static void gt64260_unmask_irq(unsigned int);
-static void gt64260_mask_irq(unsigned int);
-
-/* ========================== local declarations =========================== */
-
-struct hw_interrupt_type gt64260_pic = {
- .typename = " gt64260_pic ",
- .enable = gt64260_unmask_irq,
- .disable = gt64260_mask_irq,
- .ack = gt64260_mask_irq,
- .end = gt64260_unmask_irq,
-};
-
-u32 gt64260_irq_base = 0; /* GT64260 handles the next 96 IRQs from here */
-
-static struct mv64x60_handle bh;
-
-/* gt64260_init_irq()
- *
- * This function initializes the interrupt controller. It assigns
- * all interrupts from IRQ0 to IRQ95 to the gt64260 interrupt controller.
- *
- * Note:
- * We register all GPP inputs as interrupt source, but disable them.
- */
-void __init
-gt64260_init_irq(void)
-{
- int i;
-
- if (ppc_md.progress)
- ppc_md.progress("gt64260_init_irq: enter", 0x0);
-
- bh.v_base = mv64x60_get_bridge_vbase();
-
- ppc_cached_irq_mask[0] = 0;
- ppc_cached_irq_mask[1] = 0x0f000000; /* Enable GPP intrs */
- ppc_cached_irq_mask[2] = 0;
-
- /* disable all interrupts and clear current interrupts */
- mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, ppc_cached_irq_mask[2]);
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, 0);
- mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_LO, ppc_cached_irq_mask[0]);
- mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_HI, ppc_cached_irq_mask[1]);
-
- /* use the gt64260 for all (possible) interrupt sources */
- for (i = gt64260_irq_base; i < (gt64260_irq_base + 96); i++)
- irq_desc[i].chip = >64260_pic;
-
- if (ppc_md.progress)
- ppc_md.progress("gt64260_init_irq: exit", 0x0);
-}
-
-/*
- * gt64260_get_irq()
- *
- * This function returns the lowest interrupt number of all interrupts that
- * are currently asserted.
- *
- * Output Variable(s):
- * None.
- *
- * Returns:
- * int <interrupt number> or -2 (bogus interrupt)
- */
-int
-gt64260_get_irq(void)
-{
- int irq;
- int irq_gpp;
-
- irq = mv64x60_read(&bh, GT64260_IC_MAIN_CAUSE_LO);
- irq = __ilog2((irq & 0x3dfffffe) & ppc_cached_irq_mask[0]);
-
- if (irq == -1) {
- irq = mv64x60_read(&bh, GT64260_IC_MAIN_CAUSE_HI);
- irq = __ilog2((irq & 0x0f000db7) & ppc_cached_irq_mask[1]);
-
- if (irq == -1)
- irq = -2; /* bogus interrupt, should never happen */
- else {
- if (irq >= 24) {
- irq_gpp = mv64x60_read(&bh,
- MV64x60_GPP_INTR_CAUSE);
- irq_gpp = __ilog2(irq_gpp &
- ppc_cached_irq_mask[2]);
-
- if (irq_gpp == -1)
- irq = -2;
- else {
- irq = irq_gpp + 64;
- mv64x60_write(&bh,
- MV64x60_GPP_INTR_CAUSE,
- ~(1 << (irq - 64)));
- }
- } else
- irq += 32;
- }
- }
-
- (void)mv64x60_read(&bh, MV64x60_GPP_INTR_CAUSE);
-
- if (irq < 0)
- return (irq);
- else
- return (gt64260_irq_base + irq);
-}
-
-/* gt64260_unmask_irq()
- *
- * This function enables an interrupt.
- *
- * Input Variable(s):
- * unsigned int interrupt number (IRQ0...IRQ95).
- *
- * Output Variable(s):
- * None.
- *
- * Returns:
- * void
- */
-static void
-gt64260_unmask_irq(unsigned int irq)
-{
- irq -= gt64260_irq_base;
-
- if (irq > 31)
- if (irq > 63) /* unmask GPP irq */
- mv64x60_write(&bh, MV64x60_GPP_INTR_MASK,
- ppc_cached_irq_mask[2] |= (1 << (irq - 64)));
- else /* mask high interrupt register */
- mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_HI,
- ppc_cached_irq_mask[1] |= (1 << (irq - 32)));
- else /* mask low interrupt register */
- mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_LO,
- ppc_cached_irq_mask[0] |= (1 << irq));
-
- (void)mv64x60_read(&bh, MV64x60_GPP_INTR_MASK);
- return;
-}
-
-/* gt64260_mask_irq()
- *
- * This function disables the requested interrupt.
- *
- * Input Variable(s):
- * unsigned int interrupt number (IRQ0...IRQ95).
- *
- * Output Variable(s):
- * None.
- *
- * Returns:
- * void
- */
-static void
-gt64260_mask_irq(unsigned int irq)
-{
- irq -= gt64260_irq_base;
-
- if (irq > 31)
- if (irq > 63) /* mask GPP irq */
- mv64x60_write(&bh, MV64x60_GPP_INTR_MASK,
- ppc_cached_irq_mask[2] &= ~(1 << (irq - 64)));
- else /* mask high interrupt register */
- mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_HI,
- ppc_cached_irq_mask[1] &= ~(1 << (irq - 32)));
- else /* mask low interrupt register */
- mv64x60_write(&bh, GT64260_IC_CPU_INTR_MASK_LO,
- ppc_cached_irq_mask[0] &= ~(1 << irq));
-
- (void)mv64x60_read(&bh, MV64x60_GPP_INTR_MASK);
- return;
-}
-
-static irqreturn_t
-gt64260_cpu_error_int_handler(int irq, void *dev_id)
-{
- printk(KERN_ERR "gt64260_cpu_error_int_handler: %s 0x%08x\n",
- "Error on CPU interface - Cause regiser",
- mv64x60_read(&bh, MV64x60_CPU_ERR_CAUSE));
- printk(KERN_ERR "\tCPU error register dump:\n");
- printk(KERN_ERR "\tAddress low 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_ADDR_LO));
- printk(KERN_ERR "\tAddress high 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_ADDR_HI));
- printk(KERN_ERR "\tData low 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_DATA_LO));
- printk(KERN_ERR "\tData high 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_DATA_HI));
- printk(KERN_ERR "\tParity 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_PARITY));
- mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0);
- return IRQ_HANDLED;
-}
-
-static irqreturn_t
-gt64260_pci_error_int_handler(int irq, void *dev_id)
-{
- u32 val;
- unsigned int pci_bus = (unsigned int)dev_id;
-
- if (pci_bus == 0) { /* Error on PCI 0 */
- val = mv64x60_read(&bh, MV64x60_PCI0_ERR_CAUSE);
- printk(KERN_ERR "%s: Error in PCI %d Interface\n",
- "gt64260_pci_error_int_handler", pci_bus);
- printk(KERN_ERR "\tPCI %d error register dump:\n", pci_bus);
- printk(KERN_ERR "\tCause register 0x%08x\n", val);
- printk(KERN_ERR "\tAddress Low 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI0_ERR_ADDR_LO));
- printk(KERN_ERR "\tAddress High 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI0_ERR_ADDR_HI));
- printk(KERN_ERR "\tAttribute 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI0_ERR_DATA_LO));
- printk(KERN_ERR "\tCommand 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI0_ERR_CMD));
- mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, ~val);
- }
- if (pci_bus == 1) { /* Error on PCI 1 */
- val = mv64x60_read(&bh, MV64x60_PCI1_ERR_CAUSE);
- printk(KERN_ERR "%s: Error in PCI %d Interface\n",
- "gt64260_pci_error_int_handler", pci_bus);
- printk(KERN_ERR "\tPCI %d error register dump:\n", pci_bus);
- printk(KERN_ERR "\tCause register 0x%08x\n", val);
- printk(KERN_ERR "\tAddress Low 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI1_ERR_ADDR_LO));
- printk(KERN_ERR "\tAddress High 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI1_ERR_ADDR_HI));
- printk(KERN_ERR "\tAttribute 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI1_ERR_DATA_LO));
- printk(KERN_ERR "\tCommand 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI1_ERR_CMD));
- mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, ~val);
- }
- return IRQ_HANDLED;
-}
-
-static int __init
-gt64260_register_hdlrs(void)
-{
- int rc;
-
- /* Register CPU interface error interrupt handler */
- if ((rc = request_irq(MV64x60_IRQ_CPU_ERR,
- gt64260_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, 0)))
- printk(KERN_WARNING "Can't register cpu error handler: %d", rc);
-
- mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0);
- mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0x000000fe);
-
- /* Register PCI 0 error interrupt handler */
- if ((rc = request_irq(MV64360_IRQ_PCI0, gt64260_pci_error_int_handler,
- IRQF_DISABLED, PCI0_INTR_STR, (void *)0)))
- printk(KERN_WARNING "Can't register pci 0 error handler: %d",
- rc);
-
- mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, 0);
- mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, 0x003c0c24);
-
- /* Register PCI 1 error interrupt handler */
- if ((rc = request_irq(MV64360_IRQ_PCI1, gt64260_pci_error_int_handler,
- IRQF_DISABLED, PCI1_INTR_STR, (void *)1)))
- printk(KERN_WARNING "Can't register pci 1 error handler: %d",
- rc);
-
- mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, 0);
- mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, 0x003c0c24);
-
- return 0;
-}
-
-arch_initcall(gt64260_register_hdlrs);
diff --git a/arch/ppc/syslib/harrier.c b/arch/ppc/syslib/harrier.c
deleted file mode 100644
index 45b797b..0000000
--- a/arch/ppc/syslib/harrier.c
+++ /dev/null
@@ -1,300 +0,0 @@
-/*
- * Motorola MCG Harrier northbridge/memory controller support
- *
- * Author: Dale Farnsworth
- * dale.farnsworth@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/harrier_defs.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/pci.h>
-#include <asm/pci-bridge.h>
-#include <asm/open_pic.h>
-#include <asm/harrier.h>
-
-/* define defaults for inbound windows */
-#define HARRIER_ITAT_DEFAULT (HARRIER_ITAT_ENA | \
- HARRIER_ITAT_MEM | \
- HARRIER_ITAT_WPE | \
- HARRIER_ITAT_GBL)
-
-#define HARRIER_MPAT_DEFAULT (HARRIER_ITAT_ENA | \
- HARRIER_ITAT_MEM | \
- HARRIER_ITAT_WPE | \
- HARRIER_ITAT_GBL)
-
-/*
- * Initialize the inbound window size on a non-monarch harrier.
- */
-void __init harrier_setup_nonmonarch(uint ppc_reg_base, uint in0_size)
-{
- u16 temps;
- u32 temp;
-
- if (in0_size > HARRIER_ITSZ_2GB) {
- printk
- ("harrier_setup_nonmonarch: Invalid window size code %d\n",
- in0_size);
- return;
- }
-
- /* Clear the PCI memory enable bit. If we don't, then when the
- * inbound windows are enabled below, the corresponding BARs will be
- * "live" and start answering to PCI memory reads from their default
- * addresses (0x0), which overlap with system RAM.
- */
- temps = in_le16((u16 *) (ppc_reg_base +
- HARRIER_XCSR_CONFIG(PCI_COMMAND)));
- temps &= ~(PCI_COMMAND_MEMORY);
- out_le16((u16 *) (ppc_reg_base + HARRIER_XCSR_CONFIG(PCI_COMMAND)),
- temps);
-
- /* Setup a non-prefetchable inbound window */
- out_le32((u32 *) (ppc_reg_base +
- HARRIER_XCSR_CONFIG(HARRIER_ITSZ0_OFF)), in0_size);
-
- temp = in_le32((u32 *) (ppc_reg_base +
- HARRIER_XCSR_CONFIG(HARRIER_ITAT0_OFF)));
- temp &= ~HARRIER_ITAT_PRE;
- temp |= HARRIER_ITAT_DEFAULT;
- out_le32((u32 *) (ppc_reg_base +
- HARRIER_XCSR_CONFIG(HARRIER_ITAT0_OFF)), temp);
-
- /* Enable the message passing block */
- temp = in_le32((u32 *) (ppc_reg_base +
- HARRIER_XCSR_CONFIG(HARRIER_MPAT_OFF)));
- temp |= HARRIER_MPAT_DEFAULT;
- out_le32((u32 *) (ppc_reg_base +
- HARRIER_XCSR_CONFIG(HARRIER_MPAT_OFF)), temp);
-}
-
-void __init harrier_release_eready(uint ppc_reg_base)
-{
- ulong temp;
-
- /*
- * Set EREADY to allow the line to be pulled up after everyone is
- * ready.
- */
- temp = in_be32((uint *) (ppc_reg_base + HARRIER_MISC_CSR_OFF));
- temp |= HARRIER_EREADY;
- out_be32((uint *) (ppc_reg_base + HARRIER_MISC_CSR_OFF), temp);
-}
-
-void __init harrier_wait_eready(uint ppc_reg_base)
-{
- ulong temp;
-
- /*
- * Poll the ERDYS line until it goes high to indicate that all
- * non-monarch PrPMCs are ready for bus enumeration (or that there are
- * no PrPMCs present).
- */
-
- /* FIXME: Add a timeout of some kind to prevent endless waits. */
- do {
-
- temp = in_be32((uint *) (ppc_reg_base + HARRIER_MISC_CSR_OFF));
-
- } while (!(temp & HARRIER_ERDYS));
-}
-
-/*
- * Initialize the Motorola MCG Harrier host bridge.
- *
- * This means setting up the PPC bus to PCI memory and I/O space mappings,
- * setting the PCI memory space address of the MPIC (mapped straight
- * through), and ioremap'ing the mpic registers.
- * 'OpenPIC_Addr' will be set correctly by this routine.
- * This routine will not change the PCI_CONFIG_ADDR or PCI_CONFIG_DATA
- * addresses and assumes that the mapping of PCI memory space back to system
- * memory is set up correctly by PPCBug.
- */
-int __init
-harrier_init(struct pci_controller *hose,
- uint ppc_reg_base,
- ulong processor_pci_mem_start,
- ulong processor_pci_mem_end,
- ulong processor_pci_io_start,
- ulong processor_pci_io_end, ulong processor_mpic_base)
-{
- uint addr, offset;
-
- /*
- * Some sanity checks...
- */
- if (((processor_pci_mem_start & 0xffff0000) != processor_pci_mem_start)
- || ((processor_pci_io_start & 0xffff0000) !=
- processor_pci_io_start)) {
- printk("harrier_init: %s\n",
- "PPC to PCI mappings must start on 64 KB boundaries");
- return -1;
- }
-
- if (((processor_pci_mem_end & 0x0000ffff) != 0x0000ffff) ||
- ((processor_pci_io_end & 0x0000ffff) != 0x0000ffff)) {
- printk("harrier_init: PPC to PCI mappings %s\n",
- "must end just before a 64 KB boundaries");
- return -1;
- }
-
- if (((processor_pci_mem_end - processor_pci_mem_start) !=
- (hose->mem_space.end - hose->mem_space.start)) ||
- ((processor_pci_io_end - processor_pci_io_start) !=
- (hose->io_space.end - hose->io_space.start))) {
- printk("harrier_init: %s\n",
- "PPC and PCI memory or I/O space sizes don't match");
- return -1;
- }
-
- if ((processor_mpic_base & 0xfffc0000) != processor_mpic_base) {
- printk("harrier_init: %s\n",
- "MPIC address must start on 256 KB boundary");
- return -1;
- }
-
- if ((pci_dram_offset & 0xffff0000) != pci_dram_offset) {
- printk("harrier_init: %s\n",
- "pci_dram_offset must be multiple of 64 KB");
- return -1;
- }
-
- /*
- * Program the OTAD/OTOF registers to set up the PCI Mem & I/O
- * space mappings. These are the mappings going from the processor to
- * the PCI bus.
- *
- * Note: Don't need to 'AND' start/end addresses with 0xffff0000
- * because sanity check above ensures that they are properly
- * aligned.
- */
-
- /* Set up PPC->PCI Mem mapping */
- addr = processor_pci_mem_start | (processor_pci_mem_end >> 16);
-#ifdef CONFIG_HARRIER_STORE_GATHERING
- offset = (hose->mem_space.start - processor_pci_mem_start) | 0x9a;
-#else
- offset = (hose->mem_space.start - processor_pci_mem_start) | 0x92;
-#endif
- out_be32((uint *) (ppc_reg_base + HARRIER_OTAD0_OFF), addr);
- out_be32((uint *) (ppc_reg_base + HARRIER_OTOF0_OFF), offset);
-
- /* Set up PPC->PCI I/O mapping -- Contiguous I/O space */
- addr = processor_pci_io_start | (processor_pci_io_end >> 16);
- offset = (hose->io_space.start - processor_pci_io_start) | 0x80;
- out_be32((uint *) (ppc_reg_base + HARRIER_OTAD1_OFF), addr);
- out_be32((uint *) (ppc_reg_base + HARRIER_OTOF1_OFF), offset);
-
- /* Enable MPIC */
- OpenPIC_Addr = (void *)processor_mpic_base;
- addr = (processor_mpic_base >> 16) | 1;
- out_be16((ushort *) (ppc_reg_base + HARRIER_MBAR_OFF), addr);
- out_8((u_char *) (ppc_reg_base + HARRIER_MPIC_CSR_OFF),
- HARRIER_MPIC_OPI_ENABLE);
-
- return 0;
-}
-
-/*
- * Find the amount of RAM present.
- * This assumes that PPCBug has initialized the memory controller (SMC)
- * on the Harrier correctly (i.e., it does no sanity checking).
- * It also assumes that the memory base registers are set to configure the
- * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc.
- * however, RAM base registers can be skipped (e.g. A, B, C are set,
- * D is skipped but E is set is okay).
- */
-#define MB (1024*1024UL)
-
-static uint harrier_size_table[] __initdata = {
- 0 * MB, /* 0 ==> 0 MB */
- 32 * MB, /* 1 ==> 32 MB */
- 64 * MB, /* 2 ==> 64 MB */
- 64 * MB, /* 3 ==> 64 MB */
- 128 * MB, /* 4 ==> 128 MB */
- 128 * MB, /* 5 ==> 128 MB */
- 128 * MB, /* 6 ==> 128 MB */
- 256 * MB, /* 7 ==> 256 MB */
- 256 * MB, /* 8 ==> 256 MB */
- 256 * MB, /* 9 ==> 256 MB */
- 512 * MB, /* a ==> 512 MB */
- 512 * MB, /* b ==> 512 MB */
- 512 * MB, /* c ==> 512 MB */
- 1024 * MB, /* d ==> 1024 MB */
- 1024 * MB, /* e ==> 1024 MB */
- 2048 * MB, /* f ==> 2048 MB */
-};
-
-/*
- * *** WARNING: You MUST have a BAT set up to map in the XCSR regs ***
- *
- * Read the memory controller's registers to determine the amount of system
- * memory. Assumes that the memory controller registers are already mapped
- * into virtual memory--too early to use ioremap().
- */
-unsigned long __init harrier_get_mem_size(uint xcsr_base)
-{
- ulong last_addr;
- int i;
- uint vend_dev_id;
- uint *size_table;
- uint val;
- uint *csrp;
- uint size;
- int size_table_entries;
-
- vend_dev_id = in_be32((uint *) xcsr_base + PCI_VENDOR_ID);
-
- if (((vend_dev_id & 0xffff0000) >> 16) != PCI_VENDOR_ID_MOTOROLA) {
- printk("harrier_get_mem_size: %s (0x%x)\n",
- "Not a Motorola Memory Controller", vend_dev_id);
- return 0;
- }
-
- vend_dev_id &= 0x0000ffff;
-
- if (vend_dev_id == PCI_DEVICE_ID_MOTOROLA_HARRIER) {
- size_table = harrier_size_table;
- size_table_entries = sizeof(harrier_size_table) /
- sizeof(harrier_size_table[0]);
- } else {
- printk("harrier_get_mem_size: %s (0x%x)\n",
- "Not a Harrier", vend_dev_id);
- return 0;
- }
-
- last_addr = 0;
-
- csrp = (uint *) (xcsr_base + HARRIER_SDBA_OFF);
- for (i = 0; i < 8; i++) {
- val = in_be32(csrp++);
-
- if (val & 0x100) { /* If enabled */
- size = val >> HARRIER_SDB_SIZE_SHIFT;
- size &= HARRIER_SDB_SIZE_MASK;
- if (size >= size_table_entries) {
- break; /* Register not set correctly */
- }
- size = size_table[size];
-
- val &= ~(size - 1);
- val += size;
-
- if (val > last_addr) {
- last_addr = val;
- }
- }
- }
-
- return last_addr;
-}
diff --git a/arch/ppc/syslib/hawk_common.c b/arch/ppc/syslib/hawk_common.c
deleted file mode 100644
index 86821d8..0000000
--- a/arch/ppc/syslib/hawk_common.c
+++ /dev/null
@@ -1,317 +0,0 @@
-/*
- * Common Motorola PowerPlus Platform--really Falcon/Raven or HAWK.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/pci.h>
-#include <asm/pci-bridge.h>
-#include <asm/open_pic.h>
-#include <asm/hawk.h>
-
-/*
- * The Falcon/Raven and HAWK has 4 sets of registers:
- * 1) PPC Registers which define the mappings from PPC bus to PCI bus,
- * etc.
- * 2) PCI Registers which define the mappings from PCI bus to PPC bus and the
- * MPIC base address.
- * 3) MPIC registers.
- * 4) System Memory Controller (SMC) registers.
- */
-
-/*
- * Initialize the Motorola MCG Raven or HAWK host bridge.
- *
- * This means setting up the PPC bus to PCI memory and I/O space mappings,
- * setting the PCI memory space address of the MPIC (mapped straight
- * through), and ioremap'ing the mpic registers.
- * This routine will set the PCI_CONFIG_ADDR or PCI_CONFIG_DATA
- * addresses based on the PCI I/O address that is passed in.
- * 'OpenPIC_Addr' will be set correctly by this routine.
- */
-int __init
-hawk_init(struct pci_controller *hose,
- uint ppc_reg_base,
- ulong processor_pci_mem_start,
- ulong processor_pci_mem_end,
- ulong processor_pci_io_start,
- ulong processor_pci_io_end,
- ulong processor_mpic_base)
-{
- uint addr, offset;
-
- /*
- * Some sanity checks...
- */
- if (((processor_pci_mem_start&0xffff0000) != processor_pci_mem_start) ||
- ((processor_pci_io_start &0xffff0000) != processor_pci_io_start)) {
- printk("hawk_init: %s\n",
- "PPC to PCI mappings must start on 64 KB boundaries");
- return -1;
- }
-
- if (((processor_pci_mem_end &0x0000ffff) != 0x0000ffff) ||
- ((processor_pci_io_end &0x0000ffff) != 0x0000ffff)) {
- printk("hawk_init: PPC to PCI mappings %s\n",
- "must end just before a 64 KB boundaries");
- return -1;
- }
-
- if (((processor_pci_mem_end - processor_pci_mem_start) !=
- (hose->mem_space.end - hose->mem_space.start)) ||
- ((processor_pci_io_end - processor_pci_io_start) !=
- (hose->io_space.end - hose->io_space.start))) {
- printk("hawk_init: %s\n",
- "PPC and PCI memory or I/O space sizes don't match");
- return -1;
- }
-
- if ((processor_mpic_base & 0xfffc0000) != processor_mpic_base) {
- printk("hawk_init: %s\n",
- "MPIC address must start on 256 MB boundary");
- return -1;
- }
-
- if ((pci_dram_offset & 0xffff0000) != pci_dram_offset) {
- printk("hawk_init: %s\n",
- "pci_dram_offset must be multiple of 64 KB");
- return -1;
- }
-
- /*
- * Disable previous PPC->PCI mappings.
- */
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF0_OFF), 0x00000000);
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF1_OFF), 0x00000000);
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF2_OFF), 0x00000000);
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF3_OFF), 0x00000000);
-
- /*
- * Program the XSADD/XSOFF registers to set up the PCI Mem & I/O
- * space mappings. These are the mappings going from the processor to
- * the PCI bus.
- *
- * Note: Don't need to 'AND' start/end addresses with 0xffff0000
- * because sanity check above ensures that they are properly
- * aligned.
- */
-
- /* Set up PPC->PCI Mem mapping */
- addr = processor_pci_mem_start | (processor_pci_mem_end >> 16);
- offset = (hose->mem_space.start - processor_pci_mem_start) | 0xd2;
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSADD0_OFF), addr);
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF0_OFF), offset);
-
- /* Set up PPC->MPIC mapping on the bridge */
- addr = processor_mpic_base |
- (((processor_mpic_base + HAWK_MPIC_SIZE) >> 16) - 1);
- /* No write posting for this PCI Mem space */
- offset = (hose->mem_space.start - processor_pci_mem_start) | 0xc2;
-
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSADD1_OFF), addr);
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF1_OFF), offset);
-
- /* Set up PPC->PCI I/O mapping -- Contiguous I/O space */
- addr = processor_pci_io_start | (processor_pci_io_end >> 16);
- offset = (hose->io_space.start - processor_pci_io_start) | 0xc0;
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSADD3_OFF), addr);
- out_be32((uint *)(ppc_reg_base + HAWK_PPC_XSOFF3_OFF), offset);
-
- hose->io_base_virt = (void *)ioremap(processor_pci_io_start,
- (processor_pci_io_end - processor_pci_io_start + 1));
-
- /*
- * Set up the indirect method of accessing PCI config space.
- * The PCI config addr/data pair based on start addr of PCI I/O space.
- */
- setup_indirect_pci(hose,
- processor_pci_io_start + HAWK_PCI_CONFIG_ADDR_OFF,
- processor_pci_io_start + HAWK_PCI_CONFIG_DATA_OFF);
-
- /*
- * Disable previous PCI->PPC mappings.
- */
-
- /* XXXX Put in mappings from PCI bus to processor bus XXXX */
-
- /*
- * Disable MPIC response to PCI I/O space (BAR 0).
- * Make MPIC respond to PCI Mem space at specified address.
- * (BAR 1).
- */
- early_write_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- PCI_BASE_ADDRESS_0,
- 0x00000000 | 0x1);
-
- early_write_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- PCI_BASE_ADDRESS_1,
- (processor_mpic_base -
- processor_pci_mem_start +
- hose->mem_space.start) | 0x0);
-
- /* Map MPIC into virtual memory */
- OpenPIC_Addr = ioremap(processor_mpic_base, HAWK_MPIC_SIZE);
-
- return 0;
-}
-
-/*
- * Find the amount of RAM present.
- * This assumes that PPCBug has initialized the memory controller (SMC)
- * on the Falcon/HAWK correctly (i.e., it does no sanity checking).
- * It also assumes that the memory base registers are set to configure the
- * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc.
- * however, RAM base registers can be skipped (e.g. A, B, C are set,
- * D is skipped but E is set is okay).
- */
-#define MB (1024*1024)
-
-static uint reg_offset_table[] __initdata = {
- HAWK_SMC_RAM_A_SIZE_REG_OFF,
- HAWK_SMC_RAM_B_SIZE_REG_OFF,
- HAWK_SMC_RAM_C_SIZE_REG_OFF,
- HAWK_SMC_RAM_D_SIZE_REG_OFF,
- HAWK_SMC_RAM_E_SIZE_REG_OFF,
- HAWK_SMC_RAM_F_SIZE_REG_OFF,
- HAWK_SMC_RAM_G_SIZE_REG_OFF,
- HAWK_SMC_RAM_H_SIZE_REG_OFF
-};
-
-static uint falcon_size_table[] __initdata = {
- 0 * MB, /* 0 ==> 0 MB */
- 16 * MB, /* 1 ==> 16 MB */
- 32 * MB, /* 2 ==> 32 MB */
- 64 * MB, /* 3 ==> 64 MB */
- 128 * MB, /* 4 ==> 128 MB */
- 256 * MB, /* 5 ==> 256 MB */
- 1024 * MB, /* 6 ==> 1024 MB (1 GB) */
-};
-
-static uint hawk_size_table[] __initdata = {
- 0 * MB, /* 0 ==> 0 MB */
- 32 * MB, /* 1 ==> 32 MB */
- 64 * MB, /* 2 ==> 64 MB */
- 64 * MB, /* 3 ==> 64 MB */
- 128 * MB, /* 4 ==> 128 MB */
- 128 * MB, /* 5 ==> 128 MB */
- 128 * MB, /* 6 ==> 128 MB */
- 256 * MB, /* 7 ==> 256 MB */
- 256 * MB, /* 8 ==> 256 MB */
- 512 * MB, /* 9 ==> 512 MB */
-};
-
-/*
- * *** WARNING: You MUST have a BAT set up to map in the SMC regs ***
- *
- * Read the memory controller's registers to determine the amount of system
- * memory. Assumes that the memory controller registers are already mapped
- * into virtual memory--too early to use ioremap().
- */
-unsigned long __init
-hawk_get_mem_size(uint smc_base)
-{
- unsigned long total;
- int i, size_table_entries, reg_limit;
- uint vend_dev_id;
- uint *size_table;
- u_char val;
-
-
- vend_dev_id = in_be32((uint *)smc_base + PCI_VENDOR_ID);
-
- if (((vend_dev_id & 0xffff0000) >> 16) != PCI_VENDOR_ID_MOTOROLA) {
- printk("hawk_get_mem_size: %s (0x%x)\n",
- "Not a Motorola Memory Controller", vend_dev_id);
- return 0;
- }
-
- vend_dev_id &= 0x0000ffff;
-
- if (vend_dev_id == PCI_DEVICE_ID_MOTOROLA_FALCON) {
- size_table = falcon_size_table;
- size_table_entries = sizeof(falcon_size_table) /
- sizeof(falcon_size_table[0]);
-
- reg_limit = FALCON_SMC_REG_COUNT;
- }
- else if (vend_dev_id == PCI_DEVICE_ID_MOTOROLA_HAWK) {
- size_table = hawk_size_table;
- size_table_entries = sizeof(hawk_size_table) /
- sizeof(hawk_size_table[0]);
- reg_limit = HAWK_SMC_REG_COUNT;
- }
- else {
- printk("hawk_get_mem_size: %s (0x%x)\n",
- "Not a Falcon or HAWK", vend_dev_id);
- return 0;
- }
-
- total = 0;
-
- /* Check every reg because PPCBug may skip some */
- for (i=0; i<reg_limit; i++) {
- val = in_8((u_char *)(smc_base + reg_offset_table[i]));
-
- if (val & 0x80) { /* If enabled */
- val &= 0x0f;
-
- /* Don't go past end of size_table */
- if (val < size_table_entries) {
- total += size_table[val];
- }
- else { /* Register not set correctly */
- break;
- }
- }
- }
-
- return total;
-}
-
-int __init
-hawk_mpic_init(unsigned int pci_mem_offset)
-{
- unsigned short devid;
- unsigned int pci_membase;
-
- /* Check the first PCI device to see if it is a Raven or Hawk. */
- early_read_config_word(0, 0, 0, PCI_DEVICE_ID, &devid);
-
- switch (devid) {
- case PCI_DEVICE_ID_MOTOROLA_RAVEN:
- case PCI_DEVICE_ID_MOTOROLA_HAWK:
- break;
- default:
- OpenPIC_Addr = NULL;
- return 1;
- }
-
- /* Read the memory base register. */
- early_read_config_dword(0, 0, 0, PCI_BASE_ADDRESS_1, &pci_membase);
-
- if (pci_membase == 0) {
- OpenPIC_Addr = NULL;
- return 1;
- }
-
- /* Map the MPIC registers to virtual memory. */
- OpenPIC_Addr = ioremap(pci_membase + pci_mem_offset, 0x22000);
-
- return 0;
-}
diff --git a/arch/ppc/syslib/i8259.c b/arch/ppc/syslib/i8259.c
deleted file mode 100644
index 559f27c..0000000
--- a/arch/ppc/syslib/i8259.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * i8259 interrupt controller driver.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/interrupt.h>
-#include <asm/io.h>
-#include <asm/i8259.h>
-
-static volatile void __iomem *pci_intack; /* RO, gives us the irq vector */
-
-static unsigned char cached_8259[2] = { 0xff, 0xff };
-#define cached_A1 (cached_8259[0])
-#define cached_21 (cached_8259[1])
-
-static DEFINE_SPINLOCK(i8259_lock);
-
-static int i8259_pic_irq_offset;
-
-/*
- * Acknowledge the IRQ using either the PCI host bridge's interrupt
- * acknowledge feature or poll. How i8259_init() is called determines
- * which is called. It should be noted that polling is broken on some
- * IBM and Motorola PReP boxes so we must use the int-ack feature on them.
- */
-int i8259_irq(void)
-{
- int irq;
-
- spin_lock(&i8259_lock);
-
- /* Either int-ack or poll for the IRQ */
- if (pci_intack)
- irq = readb(pci_intack);
- else {
- /* Perform an interrupt acknowledge cycle on controller 1. */
- outb(0x0C, 0x20); /* prepare for poll */
- irq = inb(0x20) & 7;
- if (irq == 2 ) {
- /*
- * Interrupt is cascaded so perform interrupt
- * acknowledge on controller 2.
- */
- outb(0x0C, 0xA0); /* prepare for poll */
- irq = (inb(0xA0) & 7) + 8;
- }
- }
-
- if (irq == 7) {
- /*
- * This may be a spurious interrupt.
- *
- * Read the interrupt status register (ISR). If the most
- * significant bit is not set then there is no valid
- * interrupt.
- */
- if (!pci_intack)
- outb(0x0B, 0x20); /* ISR register */
- if(~inb(0x20) & 0x80)
- irq = -1;
- }
-
- spin_unlock(&i8259_lock);
- return irq + i8259_pic_irq_offset;
-}
-
-static void i8259_mask_and_ack_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&i8259_lock, flags);
- irq_nr -= i8259_pic_irq_offset;
- if (irq_nr > 7) {
- cached_A1 |= 1 << (irq_nr-8);
- inb(0xA1); /* DUMMY */
- outb(cached_A1, 0xA1);
- outb(0x20, 0xA0); /* Non-specific EOI */
- outb(0x20, 0x20); /* Non-specific EOI to cascade */
- } else {
- cached_21 |= 1 << irq_nr;
- inb(0x21); /* DUMMY */
- outb(cached_21, 0x21);
- outb(0x20, 0x20); /* Non-specific EOI */
- }
- spin_unlock_irqrestore(&i8259_lock, flags);
-}
-
-static void i8259_set_irq_mask(int irq_nr)
-{
- outb(cached_A1,0xA1);
- outb(cached_21,0x21);
-}
-
-static void i8259_mask_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&i8259_lock, flags);
- irq_nr -= i8259_pic_irq_offset;
- if (irq_nr < 8)
- cached_21 |= 1 << irq_nr;
- else
- cached_A1 |= 1 << (irq_nr-8);
- i8259_set_irq_mask(irq_nr);
- spin_unlock_irqrestore(&i8259_lock, flags);
-}
-
-static void i8259_unmask_irq(unsigned int irq_nr)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&i8259_lock, flags);
- irq_nr -= i8259_pic_irq_offset;
- if (irq_nr < 8)
- cached_21 &= ~(1 << irq_nr);
- else
- cached_A1 &= ~(1 << (irq_nr-8));
- i8259_set_irq_mask(irq_nr);
- spin_unlock_irqrestore(&i8259_lock, flags);
-}
-
-static struct irq_chip i8259_pic = {
- .typename = " i8259 ",
- .mask = i8259_mask_irq,
- .disable = i8259_mask_irq,
- .unmask = i8259_unmask_irq,
- .mask_ack = i8259_mask_and_ack_irq,
-};
-
-static struct resource pic1_iores = {
- .name = "8259 (master)",
- .start = 0x20,
- .end = 0x21,
- .flags = IORESOURCE_BUSY,
-};
-
-static struct resource pic2_iores = {
- .name = "8259 (slave)",
- .start = 0xa0,
- .end = 0xa1,
- .flags = IORESOURCE_BUSY,
-};
-
-static struct resource pic_edgectrl_iores = {
- .name = "8259 edge control",
- .start = 0x4d0,
- .end = 0x4d1,
- .flags = IORESOURCE_BUSY,
-};
-
-static struct irqaction i8259_irqaction = {
- .handler = no_action,
- .flags = IRQF_DISABLED,
- .mask = CPU_MASK_NONE,
- .name = "82c59 secondary cascade",
-};
-
-/*
- * i8259_init()
- * intack_addr - PCI interrupt acknowledge (real) address which will return
- * the active irq from the 8259
- */
-void __init i8259_init(unsigned long intack_addr, int offset)
-{
- unsigned long flags;
- int i;
-
- spin_lock_irqsave(&i8259_lock, flags);
- i8259_pic_irq_offset = offset;
-
- /* init master interrupt controller */
- outb(0x11, 0x20); /* Start init sequence */
- outb(0x00, 0x21); /* Vector base */
- outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */
- outb(0x01, 0x21); /* Select 8086 mode */
-
- /* init slave interrupt controller */
- outb(0x11, 0xA0); /* Start init sequence */
- outb(0x08, 0xA1); /* Vector base */
- outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */
- outb(0x01, 0xA1); /* Select 8086 mode */
-
- /* always read ISR */
- outb(0x0B, 0x20);
- outb(0x0B, 0xA0);
-
- /* Mask all interrupts */
- outb(cached_A1, 0xA1);
- outb(cached_21, 0x21);
-
- spin_unlock_irqrestore(&i8259_lock, flags);
-
- for (i = 0; i < NUM_ISA_INTERRUPTS; ++i) {
- set_irq_chip_and_handler(offset + i, &i8259_pic,
- handle_level_irq);
- irq_desc[offset + i].status |= IRQ_LEVEL;
- }
-
- /* reserve our resources */
- setup_irq(offset + 2, &i8259_irqaction);
- request_resource(&ioport_resource, &pic1_iores);
- request_resource(&ioport_resource, &pic2_iores);
- request_resource(&ioport_resource, &pic_edgectrl_iores);
-
- if (intack_addr != 0)
- pci_intack = ioremap(intack_addr, 1);
-
-}
diff --git a/arch/ppc/syslib/ibm440gp_common.c b/arch/ppc/syslib/ibm440gp_common.c
deleted file mode 100644
index a3927ec..0000000
--- a/arch/ppc/syslib/ibm440gp_common.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * PPC440GP system library
- *
- * Matt Porter <mporter@mvista.com>
- * Copyright 2002-2003 MontaVista Software Inc.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/types.h>
-#include <asm/reg.h>
-#include <asm/ibm44x.h>
-#include <asm/mmu.h>
-
-/*
- * Calculate 440GP clocks
- */
-void __init ibm440gp_get_clocks(struct ibm44x_clocks* p,
- unsigned int sys_clk,
- unsigned int ser_clk)
-{
- u32 cpc0_sys0 = mfdcr(DCRN_CPC0_SYS0);
- u32 cpc0_cr0 = mfdcr(DCRN_CPC0_CR0);
- u32 opdv = ((cpc0_sys0 >> 10) & 0x3) + 1;
- u32 epdv = ((cpc0_sys0 >> 8) & 0x3) + 1;
-
- if (cpc0_sys0 & 0x2){
- /* Bypass system PLL */
- p->cpu = p->plb = sys_clk;
- }
- else {
- u32 fbdv, fwdva, fwdvb, m, vco;
-
- fbdv = (cpc0_sys0 >> 18) & 0x0f;
- if (!fbdv)
- fbdv = 16;
-
- fwdva = 8 - ((cpc0_sys0 >> 15) & 0x7);
- fwdvb = 8 - ((cpc0_sys0 >> 12) & 0x7);
-
- /* Feedback path */
- if (cpc0_sys0 & 0x00000080){
- /* PerClk */
- m = fwdvb * opdv * epdv;
- }
- else {
- /* CPU clock */
- m = fbdv * fwdva;
- }
- vco = sys_clk * m;
- p->cpu = vco / fwdva;
- p->plb = vco / fwdvb;
- }
-
- p->opb = p->plb / opdv;
- p->ebc = p->opb / epdv;
-
- if (cpc0_cr0 & 0x00400000){
- /* External UART clock */
- p->uart0 = p->uart1 = ser_clk;
- }
- else {
- /* Internal UART clock */
- u32 uart_div = ((cpc0_cr0 >> 16) & 0x1f) + 1;
- p->uart0 = p->uart1 = p->plb / uart_div;
- }
-}
diff --git a/arch/ppc/syslib/ibm440gp_common.h b/arch/ppc/syslib/ibm440gp_common.h
deleted file mode 100644
index 94d7835..0000000
--- a/arch/ppc/syslib/ibm440gp_common.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * PPC440GP system library
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#ifdef __KERNEL__
-#ifndef __PPC_SYSLIB_IBM440GP_COMMON_H
-#define __PPC_SYSLIB_IBM440GP_COMMON_H
-
-#ifndef __ASSEMBLY__
-
-#include <linux/init.h>
-#include <syslib/ibm44x_common.h>
-
-/*
- * Please, refer to the Figure 13.1 in 440GP user manual
- *
- * if internal UART clock is used, ser_clk is ignored
- */
-void ibm440gp_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk,
- unsigned int ser_clk) __init;
-
-#endif /* __ASSEMBLY__ */
-#endif /* __PPC_SYSLIB_IBM440GP_COMMON_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
deleted file mode 100644
index 6ad52f4..0000000
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ /dev/null
@@ -1,294 +0,0 @@
-/*
- * PPC440GX system library
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003 - 2006 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <asm/ibm44x.h>
-#include <asm/mmu.h>
-#include <asm/processor.h>
-#include <syslib/ibm440gx_common.h>
-
-/*
- * Calculate 440GX clocks
- */
-static inline u32 __fix_zero(u32 v, u32 def){
- return v ? v : def;
-}
-
-void __init ibm440gx_get_clocks(struct ibm44x_clocks* p, unsigned int sys_clk,
- unsigned int ser_clk)
-{
- u32 pllc = CPR_READ(DCRN_CPR_PLLC);
- u32 plld = CPR_READ(DCRN_CPR_PLLD);
- u32 uart0 = SDR_READ(DCRN_SDR_UART0);
- u32 uart1 = SDR_READ(DCRN_SDR_UART1);
-#ifdef CONFIG_440EP
- u32 uart2 = SDR_READ(DCRN_SDR_UART2);
- u32 uart3 = SDR_READ(DCRN_SDR_UART3);
-#endif
-
- /* Dividers */
- u32 fbdv = __fix_zero((plld >> 24) & 0x1f, 32);
- u32 fwdva = __fix_zero((plld >> 16) & 0xf, 16);
- u32 fwdvb = __fix_zero((plld >> 8) & 7, 8);
- u32 lfbdv = __fix_zero(plld & 0x3f, 64);
- u32 pradv0 = __fix_zero((CPR_READ(DCRN_CPR_PRIMAD) >> 24) & 7, 8);
- u32 prbdv0 = __fix_zero((CPR_READ(DCRN_CPR_PRIMBD) >> 24) & 7, 8);
- u32 opbdv0 = __fix_zero((CPR_READ(DCRN_CPR_OPBD) >> 24) & 3, 4);
- u32 perdv0 = __fix_zero((CPR_READ(DCRN_CPR_PERD) >> 24) & 3, 4);
-
- /* Input clocks for primary dividers */
- u32 clk_a, clk_b;
-
- if (pllc & 0x40000000){
- u32 m;
-
- /* Feedback path */
- switch ((pllc >> 24) & 7){
- case 0:
- /* PLLOUTx */
- m = ((pllc & 0x20000000) ? fwdvb : fwdva) * lfbdv;
- break;
- case 1:
- /* CPU */
- m = fwdva * pradv0;
- break;
- case 5:
- /* PERClk */
- m = fwdvb * prbdv0 * opbdv0 * perdv0;
- break;
- default:
- printk(KERN_EMERG "invalid PLL feedback source\n");
- goto bypass;
- }
- m *= fbdv;
- p->vco = sys_clk * m;
- clk_a = p->vco / fwdva;
- clk_b = p->vco / fwdvb;
- }
- else {
-bypass:
- /* Bypass system PLL */
- p->vco = 0;
- clk_a = clk_b = sys_clk;
- }
-
- p->cpu = clk_a / pradv0;
- p->plb = clk_b / prbdv0;
- p->opb = p->plb / opbdv0;
- p->ebc = p->opb / perdv0;
-
- /* UARTs clock */
- if (uart0 & 0x00800000)
- p->uart0 = ser_clk;
- else
- p->uart0 = p->plb / __fix_zero(uart0 & 0xff, 256);
-
- if (uart1 & 0x00800000)
- p->uart1 = ser_clk;
- else
- p->uart1 = p->plb / __fix_zero(uart1 & 0xff, 256);
-#ifdef CONFIG_440EP
- if (uart2 & 0x00800000)
- p->uart2 = ser_clk;
- else
- p->uart2 = p->plb / __fix_zero(uart2 & 0xff, 256);
-
- if (uart3 & 0x00800000)
- p->uart3 = ser_clk;
- else
- p->uart3 = p->plb / __fix_zero(uart3 & 0xff, 256);
-#endif
-}
-
-/* Issue L2C diagnostic command */
-static inline u32 l2c_diag(u32 addr)
-{
- mtdcr(DCRN_L2C0_ADDR, addr);
- mtdcr(DCRN_L2C0_CMD, L2C_CMD_DIAG);
- while (!(mfdcr(DCRN_L2C0_SR) & L2C_SR_CC)) ;
- return mfdcr(DCRN_L2C0_DATA);
-}
-
-static irqreturn_t l2c_error_handler(int irq, void* dev)
-{
- u32 sr = mfdcr(DCRN_L2C0_SR);
- if (sr & L2C_SR_CPE){
- /* Read cache trapped address */
- u32 addr = l2c_diag(0x42000000);
- printk(KERN_EMERG "L2C: Cache Parity Error, addr[16:26] = 0x%08x\n", addr);
- }
- if (sr & L2C_SR_TPE){
- /* Read tag trapped address */
- u32 addr = l2c_diag(0x82000000) >> 16;
- printk(KERN_EMERG "L2C: Tag Parity Error, addr[16:26] = 0x%08x\n", addr);
- }
-
- /* Clear parity errors */
- if (sr & (L2C_SR_CPE | L2C_SR_TPE)){
- mtdcr(DCRN_L2C0_ADDR, 0);
- mtdcr(DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE);
- } else
- printk(KERN_EMERG "L2C: LRU error\n");
-
- return IRQ_HANDLED;
-}
-
-/* Enable L2 cache */
-void __init ibm440gx_l2c_enable(void){
- u32 r;
- unsigned long flags;
-
- /* Install error handler */
- if (request_irq(87, l2c_error_handler, IRQF_DISABLED, "L2C", 0) < 0){
- printk(KERN_ERR "Cannot install L2C error handler, cache is not enabled\n");
- return;
- }
-
- local_irq_save(flags);
- asm volatile ("sync" ::: "memory");
-
- /* Disable SRAM */
- mtdcr(DCRN_SRAM0_DPC, mfdcr(DCRN_SRAM0_DPC) & ~SRAM_DPC_ENABLE);
- mtdcr(DCRN_SRAM0_SB0CR, mfdcr(DCRN_SRAM0_SB0CR) & ~SRAM_SBCR_BU_MASK);
- mtdcr(DCRN_SRAM0_SB1CR, mfdcr(DCRN_SRAM0_SB1CR) & ~SRAM_SBCR_BU_MASK);
- mtdcr(DCRN_SRAM0_SB2CR, mfdcr(DCRN_SRAM0_SB2CR) & ~SRAM_SBCR_BU_MASK);
- mtdcr(DCRN_SRAM0_SB3CR, mfdcr(DCRN_SRAM0_SB3CR) & ~SRAM_SBCR_BU_MASK);
-
- /* Enable L2_MODE without ICU/DCU */
- r = mfdcr(DCRN_L2C0_CFG) & ~(L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_SS_MASK);
- r |= L2C_CFG_L2M | L2C_CFG_SS_256;
- mtdcr(DCRN_L2C0_CFG, r);
-
- mtdcr(DCRN_L2C0_ADDR, 0);
-
- /* Hardware Clear Command */
- mtdcr(DCRN_L2C0_CMD, L2C_CMD_HCC);
- while (!(mfdcr(DCRN_L2C0_SR) & L2C_SR_CC)) ;
-
- /* Clear Cache Parity and Tag Errors */
- mtdcr(DCRN_L2C0_CMD, L2C_CMD_CCP | L2C_CMD_CTE);
-
- /* Enable 64G snoop region starting at 0 */
- r = mfdcr(DCRN_L2C0_SNP0) & ~(L2C_SNP_BA_MASK | L2C_SNP_SSR_MASK);
- r |= L2C_SNP_SSR_32G | L2C_SNP_ESR;
- mtdcr(DCRN_L2C0_SNP0, r);
-
- r = mfdcr(DCRN_L2C0_SNP1) & ~(L2C_SNP_BA_MASK | L2C_SNP_SSR_MASK);
- r |= 0x80000000 | L2C_SNP_SSR_32G | L2C_SNP_ESR;
- mtdcr(DCRN_L2C0_SNP1, r);
-
- asm volatile ("sync" ::: "memory");
-
- /* Enable ICU/DCU ports */
- r = mfdcr(DCRN_L2C0_CFG);
- r &= ~(L2C_CFG_DCW_MASK | L2C_CFG_PMUX_MASK | L2C_CFG_PMIM | L2C_CFG_TPEI
- | L2C_CFG_CPEI | L2C_CFG_NAM | L2C_CFG_NBRM);
- r |= L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_TPC | L2C_CFG_CPC | L2C_CFG_FRAN
- | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM;
- mtdcr(DCRN_L2C0_CFG, r);
-
- asm volatile ("sync; isync" ::: "memory");
- local_irq_restore(flags);
-}
-
-/* Disable L2 cache */
-void __init ibm440gx_l2c_disable(void){
- u32 r;
- unsigned long flags;
-
- local_irq_save(flags);
- asm volatile ("sync" ::: "memory");
-
- /* Disable L2C mode */
- r = mfdcr(DCRN_L2C0_CFG) & ~(L2C_CFG_L2M | L2C_CFG_ICU | L2C_CFG_DCU);
- mtdcr(DCRN_L2C0_CFG, r);
-
- /* Enable SRAM */
- mtdcr(DCRN_SRAM0_DPC, mfdcr(DCRN_SRAM0_DPC) | SRAM_DPC_ENABLE);
- mtdcr(DCRN_SRAM0_SB0CR,
- SRAM_SBCR_BAS0 | SRAM_SBCR_BS_64KB | SRAM_SBCR_BU_RW);
- mtdcr(DCRN_SRAM0_SB1CR,
- SRAM_SBCR_BAS1 | SRAM_SBCR_BS_64KB | SRAM_SBCR_BU_RW);
- mtdcr(DCRN_SRAM0_SB2CR,
- SRAM_SBCR_BAS2 | SRAM_SBCR_BS_64KB | SRAM_SBCR_BU_RW);
- mtdcr(DCRN_SRAM0_SB3CR,
- SRAM_SBCR_BAS3 | SRAM_SBCR_BS_64KB | SRAM_SBCR_BU_RW);
-
- asm volatile ("sync; isync" ::: "memory");
- local_irq_restore(flags);
-}
-
-void __init ibm440gx_l2c_setup(struct ibm44x_clocks* p)
-{
- /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C,
- enable it on all other revisions
- */
- if (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. A") == 0 ||
- strcmp(cur_cpu_spec->cpu_name, "440GX Rev. B") == 0
- || (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C")
- == 0 && p->cpu > 667000000))
- ibm440gx_l2c_disable();
- else
- ibm440gx_l2c_enable();
-}
-
-int __init ibm440gx_get_eth_grp(void)
-{
- return (SDR_READ(DCRN_SDR_PFC1) & DCRN_SDR_PFC1_EPS) >> DCRN_SDR_PFC1_EPS_SHIFT;
-}
-
-void __init ibm440gx_set_eth_grp(int group)
-{
- SDR_WRITE(DCRN_SDR_PFC1, (SDR_READ(DCRN_SDR_PFC1) & ~DCRN_SDR_PFC1_EPS) | (group << DCRN_SDR_PFC1_EPS_SHIFT));
-}
-
-void __init ibm440gx_tah_enable(void)
-{
- /* Enable TAH0 and TAH1 */
- SDR_WRITE(DCRN_SDR_MFR,SDR_READ(DCRN_SDR_MFR) &
- ~DCRN_SDR_MFR_TAH0);
- SDR_WRITE(DCRN_SDR_MFR,SDR_READ(DCRN_SDR_MFR) &
- ~DCRN_SDR_MFR_TAH1);
-}
-
-int ibm440gx_show_cpuinfo(struct seq_file *m){
-
- u32 l2c_cfg = mfdcr(DCRN_L2C0_CFG);
- const char* s;
- if (l2c_cfg & L2C_CFG_L2M){
- switch (l2c_cfg & (L2C_CFG_ICU | L2C_CFG_DCU)){
- case L2C_CFG_ICU: s = "I-Cache only"; break;
- case L2C_CFG_DCU: s = "D-Cache only"; break;
- default: s = "I-Cache/D-Cache"; break;
- }
- }
- else
- s = "disabled";
-
- seq_printf(m, "L2-Cache\t: %s (0x%08x 0x%08x)\n", s,
- l2c_cfg, mfdcr(DCRN_L2C0_SR));
-
- return 0;
-}
-
-void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4,
- unsigned long r5, unsigned long r6,
- unsigned long r7)
-{
- /* Erratum 440_43 workaround, disable L1 cache parity checking */
- if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") ||
- !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F"))
- mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC);
-
- ibm44x_platform_init(r3, r4, r5, r6, r7);
-}
diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h
deleted file mode 100644
index 8d6f203..0000000
--- a/arch/ppc/syslib/ibm440gx_common.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * PPC440GX system library
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#ifdef __KERNEL__
-#ifndef __PPC_SYSLIB_IBM440GX_COMMON_H
-#define __PPC_SYSLIB_IBM440GX_COMMON_H
-
-#ifndef __ASSEMBLY__
-
-#include <linux/init.h>
-#include <linux/seq_file.h>
-#include <syslib/ibm44x_common.h>
-
-/*
- * Please, refer to the Figure 14.1 in 440GX user manual
- *
- * if internal UART clock is used, ser_clk is ignored
- */
-void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk,
- unsigned int ser_clk) __init;
-
-/* common 440GX platform init */
-void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7) __init;
-
-/* Enable L2 cache */
-void ibm440gx_l2c_enable(void) __init;
-
-/* Disable L2 cache */
-void ibm440gx_l2c_disable(void) __init;
-
-/* Enable/disable L2 cache for a particular chip revision */
-void ibm440gx_l2c_setup(struct ibm44x_clocks*) __init;
-
-/* Get Ethernet Group */
-int ibm440gx_get_eth_grp(void) __init;
-
-/* Set Ethernet Group */
-void ibm440gx_set_eth_grp(int group) __init;
-
-/* Enable TAH devices */
-void ibm440gx_tah_enable(void) __init;
-
-/* Add L2C info to /proc/cpuinfo */
-int ibm440gx_show_cpuinfo(struct seq_file*);
-
-#endif /* __ASSEMBLY__ */
-#endif /* __PPC_SYSLIB_IBM440GX_COMMON_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/syslib/ibm440sp_common.c b/arch/ppc/syslib/ibm440sp_common.c
deleted file mode 100644
index 571f8bc..0000000
--- a/arch/ppc/syslib/ibm440sp_common.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * PPC440SP/PPC440SPe system library
- *
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2002-2005 MontaVista Software Inc.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/types.h>
-#include <linux/serial.h>
-
-#include <asm/param.h>
-#include <asm/ibm44x.h>
-#include <asm/mmu.h>
-#include <asm/machdep.h>
-#include <asm/time.h>
-#include <asm/ppc4xx_pic.h>
-
-/*
- * Read the 440SP memory controller to get size of system memory.
- */
-unsigned long __init ibm440sp_find_end_of_memory(void)
-{
- u32 i;
- u32 mem_size = 0;
-
- /* Read two bank sizes and sum */
- for (i=0; i< MQ0_NUM_BANKS; i++)
- switch (mfdcr(DCRN_MQ0_BS0BAS + i) & MQ0_CONFIG_SIZE_MASK) {
- case MQ0_CONFIG_SIZE_8M:
- mem_size += PPC44x_MEM_SIZE_8M;
- break;
- case MQ0_CONFIG_SIZE_16M:
- mem_size += PPC44x_MEM_SIZE_16M;
- break;
- case MQ0_CONFIG_SIZE_32M:
- mem_size += PPC44x_MEM_SIZE_32M;
- break;
- case MQ0_CONFIG_SIZE_64M:
- mem_size += PPC44x_MEM_SIZE_64M;
- break;
- case MQ0_CONFIG_SIZE_128M:
- mem_size += PPC44x_MEM_SIZE_128M;
- break;
- case MQ0_CONFIG_SIZE_256M:
- mem_size += PPC44x_MEM_SIZE_256M;
- break;
- case MQ0_CONFIG_SIZE_512M:
- mem_size += PPC44x_MEM_SIZE_512M;
- break;
- case MQ0_CONFIG_SIZE_1G:
- mem_size += PPC44x_MEM_SIZE_1G;
- break;
- case MQ0_CONFIG_SIZE_2G:
- mem_size += PPC44x_MEM_SIZE_2G;
- break;
- default:
- break;
- }
- return mem_size;
-}
diff --git a/arch/ppc/syslib/ibm440sp_common.h b/arch/ppc/syslib/ibm440sp_common.h
deleted file mode 100644
index 8077bf8..0000000
--- a/arch/ppc/syslib/ibm440sp_common.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * PPC440SP system library
- *
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2004-2005 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#ifdef __KERNEL__
-#ifndef __PPC_SYSLIB_IBM440SP_COMMON_H
-#define __PPC_SYSLIB_IBM440SP_COMMON_H
-
-#ifndef __ASSEMBLY__
-
-extern unsigned long __init ibm440sp_find_end_of_memory(void);
-
-#endif /* __ASSEMBLY__ */
-#endif /* __PPC_SYSLIB_IBM440SP_COMMON_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/syslib/ibm44x_common.c b/arch/ppc/syslib/ibm44x_common.c
deleted file mode 100644
index 01f99b4..0000000
--- a/arch/ppc/syslib/ibm44x_common.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * PPC44x system library
- *
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2002-2005 MontaVista Software Inc.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#include <linux/time.h>
-#include <linux/types.h>
-#include <linux/serial.h>
-#include <linux/module.h>
-#include <linux/initrd.h>
-
-#include <asm/ibm44x.h>
-#include <asm/mmu.h>
-#include <asm/machdep.h>
-#include <asm/time.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/param.h>
-#include <asm/bootinfo.h>
-#include <asm/ppcboot.h>
-
-#include <syslib/gen550.h>
-
-/* Global Variables */
-bd_t __res;
-
-phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size)
-{
- phys_addr_t page_4gb = 0;
-
- /*
- * Trap the least significant 32-bit portions of an
- * address in the 440's 36-bit address space. Fix
- * them up with the appropriate ERPN
- */
- if ((addr >= PPC44x_IO_LO) && (addr <= PPC44x_IO_HI))
- page_4gb = PPC44x_IO_PAGE;
- else if ((addr >= PPC44x_PCI0CFG_LO) && (addr <= PPC44x_PCI0CFG_HI))
- page_4gb = PPC44x_PCICFG_PAGE;
-#ifdef CONFIG_440SP
- else if ((addr >= PPC44x_PCI1CFG_LO) && (addr <= PPC44x_PCI1CFG_HI))
- page_4gb = PPC44x_PCICFG_PAGE;
- else if ((addr >= PPC44x_PCI2CFG_LO) && (addr <= PPC44x_PCI2CFG_HI))
- page_4gb = PPC44x_PCICFG_PAGE;
-#endif
- else if ((addr >= PPC44x_PCIMEM_LO) && (addr <= PPC44x_PCIMEM_HI))
- page_4gb = PPC44x_PCIMEM_PAGE;
-
- return (page_4gb | addr);
-};
-EXPORT_SYMBOL(fixup_bigphys_addr);
-
-void __init ibm44x_calibrate_decr(unsigned int freq)
-{
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-
- /* Set the time base to zero */
- mtspr(SPRN_TBWL, 0);
- mtspr(SPRN_TBWU, 0);
-
- /* Clear any pending timer interrupts */
- mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
-
- /* Enable decrementer interrupt */
- mtspr(SPRN_TCR, TCR_DIE);
-}
-
-extern void abort(void);
-
-static void ibm44x_restart(char *cmd)
-{
- local_irq_disable();
- abort();
-}
-
-static void ibm44x_power_off(void)
-{
- local_irq_disable();
- for(;;);
-}
-
-static void ibm44x_halt(void)
-{
- local_irq_disable();
- for(;;);
-}
-
-/*
- * Read the 44x memory controller to get size of system memory.
- */
-static unsigned long __init ibm44x_find_end_of_memory(void)
-{
- u32 i, bank_config;
- u32 mem_size = 0;
-
- for (i=0; i<4; i++)
- {
- switch (i)
- {
- case 0:
- mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B0CR);
- break;
- case 1:
- mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B1CR);
- break;
- case 2:
- mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B2CR);
- break;
- case 3:
- mtdcr(DCRN_SDRAM0_CFGADDR, SDRAM0_B3CR);
- break;
- }
-
- bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
-
- if (!(bank_config & SDRAM_CONFIG_BANK_ENABLE))
- continue;
- switch (SDRAM_CONFIG_BANK_SIZE(bank_config))
- {
- case SDRAM_CONFIG_SIZE_8M:
- mem_size += PPC44x_MEM_SIZE_8M;
- break;
- case SDRAM_CONFIG_SIZE_16M:
- mem_size += PPC44x_MEM_SIZE_16M;
- break;
- case SDRAM_CONFIG_SIZE_32M:
- mem_size += PPC44x_MEM_SIZE_32M;
- break;
- case SDRAM_CONFIG_SIZE_64M:
- mem_size += PPC44x_MEM_SIZE_64M;
- break;
- case SDRAM_CONFIG_SIZE_128M:
- mem_size += PPC44x_MEM_SIZE_128M;
- break;
- case SDRAM_CONFIG_SIZE_256M:
- mem_size += PPC44x_MEM_SIZE_256M;
- break;
- case SDRAM_CONFIG_SIZE_512M:
- mem_size += PPC44x_MEM_SIZE_512M;
- break;
- }
- }
- return mem_size;
-}
-
-void __init ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /*
- * If we were passed in a board information, copy it into the
- * residual data area.
- */
- if (r3)
- __res = *(bd_t *)(r3 + KERNELBASE);
-
-#if defined(CONFIG_BLK_DEV_INITRD)
- /*
- * If the init RAM disk has been configured in, and there's a valid
- * starting address for it, set it up.
- */
- if (r4) {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- /* Copy the kernel command line arguments to a safe place. */
-
- if (r6) {
- *(char *) (r7 + KERNELBASE) = 0;
- strcpy(cmd_line, (char *) (r6 + KERNELBASE));
- }
-
- ppc_md.init_IRQ = ppc4xx_pic_init;
- ppc_md.find_end_of_memory = ibm44x_find_end_of_memory;
- ppc_md.restart = ibm44x_restart;
- ppc_md.power_off = ibm44x_power_off;
- ppc_md.halt = ibm44x_halt;
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = gen550_progress;
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-#ifdef CONFIG_KGDB
- ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
-#endif
-
- /*
- * The Abatron BDI JTAG debugger does not tolerate others
- * mucking with the debug registers.
- */
-#if !defined(CONFIG_BDI_SWITCH)
- /* Enable internal debug mode */
- mtspr(SPRN_DBCR0, (DBCR0_IDM));
-
- /* Clear any residual debug events */
- mtspr(SPRN_DBSR, 0xffffffff);
-#endif
-}
-
-/* Called from machine_check_exception */
-void platform_machine_check(struct pt_regs *regs)
-{
-#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
- printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n",
- mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL),
- mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESRH),
- mfdcr(DCRN_PLB0_BESRL));
- printk("PLB1: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n",
- mfdcr(DCRN_PLB1_BEARH), mfdcr(DCRN_PLB1_BEARL),
- mfdcr(DCRN_PLB1_ACR), mfdcr(DCRN_PLB1_BESRH),
- mfdcr(DCRN_PLB1_BESRL));
-#else
- printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n",
- mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL),
- mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESR));
-#endif
- printk("POB0: BEAR=0x%08x%08x BESR0=0x%08x BESR1=0x%08x\n",
- mfdcr(DCRN_POB0_BEARH), mfdcr(DCRN_POB0_BEARL),
- mfdcr(DCRN_POB0_BESR0), mfdcr(DCRN_POB0_BESR1));
- printk("OPB0: BEAR=0x%08x%08x BSTAT=0x%08x\n",
- mfdcr(DCRN_OPB0_BEARH), mfdcr(DCRN_OPB0_BEARL),
- mfdcr(DCRN_OPB0_BSTAT));
-}
diff --git a/arch/ppc/syslib/ibm44x_common.h b/arch/ppc/syslib/ibm44x_common.h
deleted file mode 100644
index f179db8..0000000
--- a/arch/ppc/syslib/ibm44x_common.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * PPC44x system library
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2003, 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#ifdef __KERNEL__
-#ifndef __PPC_SYSLIB_IBM44x_COMMON_H
-#define __PPC_SYSLIB_IBM44x_COMMON_H
-
-#ifndef __ASSEMBLY__
-
-/*
- * All clocks are in Hz
- */
-struct ibm44x_clocks {
- unsigned int vco; /* VCO, 0 if system PLL is bypassed */
- unsigned int cpu; /* CPUCoreClk */
- unsigned int plb; /* PLBClk */
- unsigned int opb; /* OPBClk */
- unsigned int ebc; /* PerClk */
- unsigned int uart0;
- unsigned int uart1;
-#ifdef CONFIG_440EP
- unsigned int uart2;
- unsigned int uart3;
-#endif
-};
-
-/* common 44x platform init */
-void ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7) __init;
-
-/* initialize decrementer and tick-related variables */
-void ibm44x_calibrate_decr(unsigned int freq) __init;
-
-#endif /* __ASSEMBLY__ */
-#endif /* __PPC_SYSLIB_IBM44x_COMMON_H */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/syslib/ibm_ocp.c b/arch/ppc/syslib/ibm_ocp.c
deleted file mode 100644
index 2ee1766..0000000
--- a/arch/ppc/syslib/ibm_ocp.c
+++ /dev/null
@@ -1,10 +0,0 @@
-#include <linux/module.h>
-#include <asm/ibm4xx.h>
-#include <asm/ocp.h>
-
-struct ocp_sys_info_data ocp_sys_info = {
- .opb_bus_freq = 50000000, /* OPB Bus Frequency (Hz) */
- .ebc_bus_freq = 33333333, /* EBC Bus Frequency (Hz) */
-};
-
-EXPORT_SYMBOL(ocp_sys_info);
diff --git a/arch/ppc/syslib/indirect_pci.c b/arch/ppc/syslib/indirect_pci.c
deleted file mode 100644
index 83b323a..0000000
--- a/arch/ppc/syslib/indirect_pci.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * Support for indirect PCI bridges.
- *
- * Copyright (C) 1998 Gabriel Paubert.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/string.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-
-#ifdef CONFIG_PPC_INDIRECT_PCI_BE
-#define PCI_CFG_OUT out_be32
-#else
-#define PCI_CFG_OUT out_le32
-#endif
-
-static int
-indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 *val)
-{
- struct pci_controller *hose = bus->sysdata;
- volatile void __iomem *cfg_data;
- u8 cfg_type = 0;
-
- if (ppc_md.pci_exclude_device)
- if (ppc_md.pci_exclude_device(bus->number, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- if (hose->set_cfg_type)
- if (bus->number != hose->first_busno)
- cfg_type = 1;
-
- PCI_CFG_OUT(hose->cfg_addr,
- (0x80000000 | ((bus->number - hose->bus_offset) << 16)
- | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
-
- /*
- * Note: the caller has already checked that offset is
- * suitably aligned and that len is 1, 2 or 4.
- */
- cfg_data = hose->cfg_data + (offset & 3);
- switch (len) {
- case 1:
- *val = in_8(cfg_data);
- break;
- case 2:
- *val = in_le16(cfg_data);
- break;
- default:
- *val = in_le32(cfg_data);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 val)
-{
- struct pci_controller *hose = bus->sysdata;
- volatile void __iomem *cfg_data;
- u8 cfg_type = 0;
-
- if (ppc_md.pci_exclude_device)
- if (ppc_md.pci_exclude_device(bus->number, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- if (hose->set_cfg_type)
- if (bus->number != hose->first_busno)
- cfg_type = 1;
-
- PCI_CFG_OUT(hose->cfg_addr,
- (0x80000000 | ((bus->number - hose->bus_offset) << 16)
- | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
-
- /*
- * Note: the caller has already checked that offset is
- * suitably aligned and that len is 1, 2 or 4.
- */
- cfg_data = hose->cfg_data + (offset & 3);
- switch (len) {
- case 1:
- out_8(cfg_data, val);
- break;
- case 2:
- out_le16(cfg_data, val);
- break;
- default:
- out_le32(cfg_data, val);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops indirect_pci_ops =
-{
- indirect_read_config,
- indirect_write_config
-};
-
-void __init
-setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
- void __iomem * cfg_data)
-{
- hose->cfg_addr = cfg_addr;
- hose->cfg_data = cfg_data;
- hose->ops = &indirect_pci_ops;
-}
-
-void __init
-setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
-{
- unsigned long base = cfg_addr & PAGE_MASK;
- void __iomem *mbase, *addr, *data;
-
- mbase = ioremap(base, PAGE_SIZE);
- addr = mbase + (cfg_addr & ~PAGE_MASK);
- if ((cfg_data & PAGE_MASK) != base)
- mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
- data = mbase + (cfg_data & ~PAGE_MASK);
- setup_indirect_pci_nomap(hose, addr, data);
-}
diff --git a/arch/ppc/syslib/m8260_pci_erratum9.c b/arch/ppc/syslib/m8260_pci_erratum9.c
deleted file mode 100644
index ebb8c8f..0000000
--- a/arch/ppc/syslib/m8260_pci_erratum9.c
+++ /dev/null
@@ -1,455 +0,0 @@
-/*
- * Workaround for device erratum PCI 9.
- * See Motorola's "XPC826xA Family Device Errata Reference."
- * The erratum applies to all 8260 family Hip4 processors. It is scheduled
- * to be fixed in HiP4 Rev C. Erratum PCI 9 states that a simultaneous PCI
- * inbound write transaction and PCI outbound read transaction can result in a
- * bus deadlock. The suggested workaround is to use the IDMA controller to
- * perform all reads from PCI configuration, memory, and I/O space.
- *
- * Author: andy_lowe@mvista.com
- *
- * 2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/types.h>
-#include <linux/string.h>
-
-#include <asm/io.h>
-#include <asm/pci-bridge.h>
-#include <asm/machdep.h>
-#include <asm/byteorder.h>
-#include <asm/mpc8260.h>
-#include <asm/immap_cpm2.h>
-#include <asm/cpm2.h>
-
-#include "m82xx_pci.h"
-
-#ifdef CONFIG_8260_PCI9
-/*#include <asm/mpc8260_pci9.h>*/ /* included in asm/io.h */
-
-#define IDMA_XFER_BUF_SIZE 64 /* size of the IDMA transfer buffer */
-
-/* define a structure for the IDMA dpram usage */
-typedef struct idma_dpram_s {
- idma_t pram; /* IDMA parameter RAM */
- u_char xfer_buf[IDMA_XFER_BUF_SIZE]; /* IDMA transfer buffer */
- idma_bd_t bd; /* buffer descriptor */
-} idma_dpram_t;
-
-/* define offsets relative to start of IDMA dpram */
-#define IDMA_XFER_BUF_OFFSET (sizeof(idma_t))
-#define IDMA_BD_OFFSET (sizeof(idma_t) + IDMA_XFER_BUF_SIZE)
-
-/* define globals */
-static volatile idma_dpram_t *idma_dpram;
-
-/* Exactly one of CONFIG_8260_PCI9_IDMAn must be defined,
- * where n is 1, 2, 3, or 4. This selects the IDMA channel used for
- * the PCI9 workaround.
- */
-#ifdef CONFIG_8260_PCI9_IDMA1
-#define IDMA_CHAN 0
-#define PROFF_IDMA PROFF_IDMA1_BASE
-#define IDMA_PAGE CPM_CR_IDMA1_PAGE
-#define IDMA_SBLOCK CPM_CR_IDMA1_SBLOCK
-#endif
-#ifdef CONFIG_8260_PCI9_IDMA2
-#define IDMA_CHAN 1
-#define PROFF_IDMA PROFF_IDMA2_BASE
-#define IDMA_PAGE CPM_CR_IDMA2_PAGE
-#define IDMA_SBLOCK CPM_CR_IDMA2_SBLOCK
-#endif
-#ifdef CONFIG_8260_PCI9_IDMA3
-#define IDMA_CHAN 2
-#define PROFF_IDMA PROFF_IDMA3_BASE
-#define IDMA_PAGE CPM_CR_IDMA3_PAGE
-#define IDMA_SBLOCK CPM_CR_IDMA3_SBLOCK
-#endif
-#ifdef CONFIG_8260_PCI9_IDMA4
-#define IDMA_CHAN 3
-#define PROFF_IDMA PROFF_IDMA4_BASE
-#define IDMA_PAGE CPM_CR_IDMA4_PAGE
-#define IDMA_SBLOCK CPM_CR_IDMA4_SBLOCK
-#endif
-
-void idma_pci9_init(void)
-{
- uint dpram_offset;
- volatile idma_t *pram;
- volatile im_idma_t *idma_reg;
- volatile cpm2_map_t *immap = cpm2_immr;
-
- /* allocate IDMA dpram */
- dpram_offset = cpm_dpalloc(sizeof(idma_dpram_t), 64);
- idma_dpram = cpm_dpram_addr(dpram_offset);
-
- /* initialize the IDMA parameter RAM */
- memset((void *)idma_dpram, 0, sizeof(idma_dpram_t));
- pram = &idma_dpram->pram;
- pram->ibase = dpram_offset + IDMA_BD_OFFSET;
- pram->dpr_buf = dpram_offset + IDMA_XFER_BUF_OFFSET;
- pram->ss_max = 32;
- pram->dts = 32;
-
- /* initialize the IDMA_BASE pointer to the IDMA parameter RAM */
- *((ushort *) &immap->im_dprambase[PROFF_IDMA]) = dpram_offset;
-
- /* initialize the IDMA registers */
- idma_reg = (volatile im_idma_t *) &immap->im_sdma.sdma_idsr1;
- idma_reg[IDMA_CHAN].idmr = 0; /* mask all IDMA interrupts */
- idma_reg[IDMA_CHAN].idsr = 0xff; /* clear all event flags */
-
- printk(KERN_WARNING
- "Using IDMA%d for MPC8260 device erratum PCI 9 workaround\n",
- IDMA_CHAN + 1);
-
- return;
-}
-
-/* Use the IDMA controller to transfer data from I/O memory to local RAM.
- * The src address must be a physical address suitable for use by the DMA
- * controller with no translation. The dst address must be a kernel virtual
- * address. The dst address is translated to a physical address via
- * virt_to_phys().
- * The sinc argument specifies whether or not the source address is incremented
- * by the DMA controller. The source address is incremented if and only if sinc
- * is non-zero. The destination address is always incremented since the
- * destination is always host RAM.
- */
-static void
-idma_pci9_read(u8 *dst, u8 *src, int bytes, int unit_size, int sinc)
-{
- unsigned long flags;
- volatile idma_t *pram = &idma_dpram->pram;
- volatile idma_bd_t *bd = &idma_dpram->bd;
- volatile cpm2_map_t *immap = cpm2_immr;
-
- local_irq_save(flags);
-
- /* initialize IDMA parameter RAM for this transfer */
- if (sinc)
- pram->dcm = IDMA_DCM_DMA_WRAP_64 | IDMA_DCM_SINC
- | IDMA_DCM_DINC | IDMA_DCM_SD_MEM2MEM;
- else
- pram->dcm = IDMA_DCM_DMA_WRAP_64 | IDMA_DCM_DINC
- | IDMA_DCM_SD_MEM2MEM;
- pram->ibdptr = pram->ibase;
- pram->sts = unit_size;
- pram->istate = 0;
-
- /* initialize the buffer descriptor */
- bd->dst = virt_to_phys(dst);
- bd->src = (uint) src;
- bd->len = bytes;
- bd->flags = IDMA_BD_V | IDMA_BD_W | IDMA_BD_I | IDMA_BD_L | IDMA_BD_DGBL
- | IDMA_BD_DBO_BE | IDMA_BD_SBO_BE | IDMA_BD_SDTB;
-
- /* issue the START_IDMA command to the CP */
- while (immap->im_cpm.cp_cpcr & CPM_CR_FLG);
- immap->im_cpm.cp_cpcr = mk_cr_cmd(IDMA_PAGE, IDMA_SBLOCK, 0,
- CPM_CR_START_IDMA) | CPM_CR_FLG;
- while (immap->im_cpm.cp_cpcr & CPM_CR_FLG);
-
- /* wait for transfer to complete */
- while(bd->flags & IDMA_BD_V);
-
- local_irq_restore(flags);
-
- return;
-}
-
-/* Use the IDMA controller to transfer data from I/O memory to local RAM.
- * The dst address must be a physical address suitable for use by the DMA
- * controller with no translation. The src address must be a kernel virtual
- * address. The src address is translated to a physical address via
- * virt_to_phys().
- * The dinc argument specifies whether or not the dest address is incremented
- * by the DMA controller. The source address is incremented if and only if sinc
- * is non-zero. The source address is always incremented since the
- * source is always host RAM.
- */
-static void
-idma_pci9_write(u8 *dst, u8 *src, int bytes, int unit_size, int dinc)
-{
- unsigned long flags;
- volatile idma_t *pram = &idma_dpram->pram;
- volatile idma_bd_t *bd = &idma_dpram->bd;
- volatile cpm2_map_t *immap = cpm2_immr;
-
- local_irq_save(flags);
-
- /* initialize IDMA parameter RAM for this transfer */
- if (dinc)
- pram->dcm = IDMA_DCM_DMA_WRAP_64 | IDMA_DCM_SINC
- | IDMA_DCM_DINC | IDMA_DCM_SD_MEM2MEM;
- else
- pram->dcm = IDMA_DCM_DMA_WRAP_64 | IDMA_DCM_SINC
- | IDMA_DCM_SD_MEM2MEM;
- pram->ibdptr = pram->ibase;
- pram->sts = unit_size;
- pram->istate = 0;
-
- /* initialize the buffer descriptor */
- bd->dst = (uint) dst;
- bd->src = virt_to_phys(src);
- bd->len = bytes;
- bd->flags = IDMA_BD_V | IDMA_BD_W | IDMA_BD_I | IDMA_BD_L | IDMA_BD_DGBL
- | IDMA_BD_DBO_BE | IDMA_BD_SBO_BE | IDMA_BD_SDTB;
-
- /* issue the START_IDMA command to the CP */
- while (immap->im_cpm.cp_cpcr & CPM_CR_FLG);
- immap->im_cpm.cp_cpcr = mk_cr_cmd(IDMA_PAGE, IDMA_SBLOCK, 0,
- CPM_CR_START_IDMA) | CPM_CR_FLG;
- while (immap->im_cpm.cp_cpcr & CPM_CR_FLG);
-
- /* wait for transfer to complete */
- while(bd->flags & IDMA_BD_V);
-
- local_irq_restore(flags);
-
- return;
-}
-
-/* Same as idma_pci9_read, but 16-bit little-endian byte swapping is performed
- * if the unit_size is 2, and 32-bit little-endian byte swapping is performed if
- * the unit_size is 4.
- */
-static void
-idma_pci9_read_le(u8 *dst, u8 *src, int bytes, int unit_size, int sinc)
-{
- int i;
- u8 *p;
-
- idma_pci9_read(dst, src, bytes, unit_size, sinc);
- switch(unit_size) {
- case 2:
- for (i = 0, p = dst; i < bytes; i += 2, p += 2)
- swab16s((u16 *) p);
- break;
- case 4:
- for (i = 0, p = dst; i < bytes; i += 4, p += 4)
- swab32s((u32 *) p);
- break;
- default:
- break;
- }
-}
-EXPORT_SYMBOL(idma_pci9_init);
-EXPORT_SYMBOL(idma_pci9_read);
-EXPORT_SYMBOL(idma_pci9_read_le);
-
-static inline int is_pci_mem(unsigned long addr)
-{
- if (addr >= M82xx_PCI_LOWER_MMIO &&
- addr <= M82xx_PCI_UPPER_MMIO)
- return 1;
- if (addr >= M82xx_PCI_LOWER_MEM &&
- addr <= M82xx_PCI_UPPER_MEM)
- return 1;
- return 0;
-}
-
-#define is_pci_mem(pa) ( (pa > 0x80000000) && (pa < 0xc0000000))
-int readb(volatile unsigned char *addr)
-{
- u8 val;
- unsigned long pa = iopa((unsigned long) addr);
-
- if (!is_pci_mem(pa))
- return in_8(addr);
-
- idma_pci9_read((u8 *)&val, (u8 *)pa, sizeof(val), sizeof(val), 0);
- return val;
-}
-
-int readw(volatile unsigned short *addr)
-{
- u16 val;
- unsigned long pa = iopa((unsigned long) addr);
-
- if (!is_pci_mem(pa))
- return in_le16(addr);
-
- idma_pci9_read((u8 *)&val, (u8 *)pa, sizeof(val), sizeof(val), 0);
- return swab16(val);
-}
-
-unsigned readl(volatile unsigned *addr)
-{
- u32 val;
- unsigned long pa = iopa((unsigned long) addr);
-
- if (!is_pci_mem(pa))
- return in_le32(addr);
-
- idma_pci9_read((u8 *)&val, (u8 *)pa, sizeof(val), sizeof(val), 0);
- return swab32(val);
-}
-
-int inb(unsigned port)
-{
- u8 val;
- u8 *addr = (u8 *)(port + _IO_BASE);
-
- idma_pci9_read((u8 *)&val, (u8 *)addr, sizeof(val), sizeof(val), 0);
- return val;
-}
-
-int inw(unsigned port)
-{
- u16 val;
- u8 *addr = (u8 *)(port + _IO_BASE);
-
- idma_pci9_read((u8 *)&val, (u8 *)addr, sizeof(val), sizeof(val), 0);
- return swab16(val);
-}
-
-unsigned inl(unsigned port)
-{
- u32 val;
- u8 *addr = (u8 *)(port + _IO_BASE);
-
- idma_pci9_read((u8 *)&val, (u8 *)addr, sizeof(val), sizeof(val), 0);
- return swab32(val);
-}
-
-void insb(unsigned port, void *buf, int ns)
-{
- u8 *addr = (u8 *)(port + _IO_BASE);
-
- idma_pci9_read((u8 *)buf, (u8 *)addr, ns*sizeof(u8), sizeof(u8), 0);
-}
-
-void insw(unsigned port, void *buf, int ns)
-{
- u8 *addr = (u8 *)(port + _IO_BASE);
-
- idma_pci9_read((u8 *)buf, (u8 *)addr, ns*sizeof(u16), sizeof(u16), 0);
-}
-
-void insl(unsigned port, void *buf, int nl)
-{
- u8 *addr = (u8 *)(port + _IO_BASE);
-
- idma_pci9_read((u8 *)buf, (u8 *)addr, nl*sizeof(u32), sizeof(u32), 0);
-}
-
-void *memcpy_fromio(void *dest, unsigned long src, size_t count)
-{
- unsigned long pa = iopa((unsigned long) src);
-
- if (is_pci_mem(pa))
- idma_pci9_read((u8 *)dest, (u8 *)pa, count, 32, 1);
- else
- memcpy(dest, (void *)src, count);
- return dest;
-}
-
-EXPORT_SYMBOL(readb);
-EXPORT_SYMBOL(readw);
-EXPORT_SYMBOL(readl);
-EXPORT_SYMBOL(inb);
-EXPORT_SYMBOL(inw);
-EXPORT_SYMBOL(inl);
-EXPORT_SYMBOL(insb);
-EXPORT_SYMBOL(insw);
-EXPORT_SYMBOL(insl);
-EXPORT_SYMBOL(memcpy_fromio);
-
-#endif /* ifdef CONFIG_8260_PCI9 */
-
-/* Indirect PCI routines adapted from arch/ppc/kernel/indirect_pci.c.
- * Copyright (C) 1998 Gabriel Paubert.
- */
-#ifndef CONFIG_8260_PCI9
-#define cfg_read(val, addr, type, op) *val = op((type)(addr))
-#else
-#define cfg_read(val, addr, type, op) \
- idma_pci9_read_le((u8*)(val),(u8*)(addr),sizeof(*(val)),sizeof(*(val)),0)
-#endif
-
-#define cfg_write(val, addr, type, op) op((type *)(addr), (val))
-
-static int indirect_write_config(struct pci_bus *pbus, unsigned int devfn, int where,
- int size, u32 value)
-{
- struct pci_controller *hose = pbus->sysdata;
- u8 cfg_type = 0;
- if (ppc_md.pci_exclude_device)
- if (ppc_md.pci_exclude_device(pbus->number, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- if (hose->set_cfg_type)
- if (pbus->number != hose->first_busno)
- cfg_type = 1;
-
- out_be32(hose->cfg_addr,
- (((where & 0xfc) | cfg_type) << 24) | (devfn << 16)
- | ((pbus->number - hose->bus_offset) << 8) | 0x80);
-
- switch (size)
- {
- case 1:
- cfg_write(value, hose->cfg_data + (where & 3), u8, out_8);
- break;
- case 2:
- cfg_write(value, hose->cfg_data + (where & 2), u16, out_le16);
- break;
- case 4:
- cfg_write(value, hose->cfg_data + (where & 0), u32, out_le32);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int indirect_read_config(struct pci_bus *pbus, unsigned int devfn, int where,
- int size, u32 *value)
-{
- struct pci_controller *hose = pbus->sysdata;
- u8 cfg_type = 0;
- if (ppc_md.pci_exclude_device)
- if (ppc_md.pci_exclude_device(pbus->number, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- if (hose->set_cfg_type)
- if (pbus->number != hose->first_busno)
- cfg_type = 1;
-
- out_be32(hose->cfg_addr,
- (((where & 0xfc) | cfg_type) << 24) | (devfn << 16)
- | ((pbus->number - hose->bus_offset) << 8) | 0x80);
-
- switch (size)
- {
- case 1:
- cfg_read(value, hose->cfg_data + (where & 3), u8 *, in_8);
- break;
- case 2:
- cfg_read(value, hose->cfg_data + (where & 2), u16 *, in_le16);
- break;
- case 4:
- cfg_read(value, hose->cfg_data + (where & 0), u32 *, in_le32);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops indirect_pci_ops =
-{
- .read = indirect_read_config,
- .write = indirect_write_config,
-};
-
-void
-setup_m8260_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
-{
- hose->ops = &indirect_pci_ops;
- hose->cfg_addr = (unsigned int *) ioremap(cfg_addr, 4);
- hose->cfg_data = (unsigned char *) ioremap(cfg_data, 4);
-}
diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c
deleted file mode 100644
index b405837..0000000
--- a/arch/ppc/syslib/m8260_setup.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * Copyright (C) 1995 Linus Torvalds
- * Adapted from 'alpha' version by Gary Thomas
- * Modified by Cort Dougan (cort@cs.nmt.edu)
- * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net)
- * Further modified for generic 8xx and 8260 by Dan.
- */
-
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/slab.h>
-#include <linux/init.h>
-#include <linux/initrd.h>
-#include <linux/root_dev.h>
-#include <linux/seq_file.h>
-#include <linux/irq.h>
-
-#include <asm/mmu.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8260.h>
-#include <asm/cpm2.h>
-#include <asm/machdep.h>
-#include <asm/bootinfo.h>
-#include <asm/time.h>
-#include <asm/ppc_sys.h>
-
-#include "cpm2_pic.h"
-
-unsigned char __res[sizeof(bd_t)];
-
-extern void pq2_find_bridges(void);
-extern void pq2pci_init_irq(void);
-extern void idma_pci9_init(void);
-
-/* Place-holder for board-specific init */
-void __attribute__ ((weak)) __init
-m82xx_board_setup(void)
-{
-}
-
-static void __init
-m8260_setup_arch(void)
-{
- /* Print out Vendor and Machine info. */
- printk(KERN_INFO "%s %s port\n", CPUINFO_VENDOR, CPUINFO_MACHINE);
-
- /* Reset the Communication Processor Module. */
- cpm2_reset();
-#ifdef CONFIG_8260_PCI9
- /* Initialise IDMA for PCI erratum workaround */
- idma_pci9_init();
-#endif
-#ifdef CONFIG_PCI_8260
- pq2_find_bridges();
-#endif
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
-#endif
-
- identify_ppc_sys_by_name_and_id(BOARD_CHIP_NAME,
- in_be32((void *)CPM_MAP_ADDR + CPM_IMMR_OFFSET));
-
- m82xx_board_setup();
-}
-
-/* The decrementer counts at the system (internal) clock frequency
- * divided by four.
- */
-static void __init
-m8260_calibrate_decr(void)
-{
- bd_t *binfo = (bd_t *)__res;
- int freq, divisor;
-
- freq = binfo->bi_busfreq;
- divisor = 4;
- tb_ticks_per_jiffy = freq / HZ / divisor;
- tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
-}
-
-/* The 8260 has an internal 1-second timer update register that
- * we should use for this purpose.
- */
-static uint rtc_time;
-
-static int
-m8260_set_rtc_time(unsigned long time)
-{
- rtc_time = time;
-
- return(0);
-}
-
-static unsigned long
-m8260_get_rtc_time(void)
-{
- /* Get time from the RTC.
- */
- return((unsigned long)rtc_time);
-}
-
-#ifndef BOOTROM_RESTART_ADDR
-#warning "Using default BOOTROM_RESTART_ADDR!"
-#define BOOTROM_RESTART_ADDR 0xff000104
-#endif
-
-static void
-m8260_restart(char *cmd)
-{
- extern void m8260_gorom(bd_t *bi, uint addr);
- uint startaddr;
-
- /* Most boot roms have a warmstart as the second instruction
- * of the reset vector. If that doesn't work for you, change this
- * or the reboot program to send a proper address.
- */
- startaddr = BOOTROM_RESTART_ADDR;
- if (cmd != NULL) {
- if (!strncmp(cmd, "startaddr=", 10))
- startaddr = simple_strtoul(&cmd[10], NULL, 0);
- }
-
- m8260_gorom((void*)__pa(__res), startaddr);
-}
-
-static void
-m8260_halt(void)
-{
- local_irq_disable();
- while (1);
-}
-
-static void
-m8260_power_off(void)
-{
- m8260_halt();
-}
-
-static int
-m8260_show_cpuinfo(struct seq_file *m)
-{
- bd_t *bp = (bd_t *)__res;
-
- seq_printf(m, "vendor\t\t: %s\n"
- "machine\t\t: %s\n"
- "\n"
- "mem size\t\t: 0x%08lx\n"
- "console baud\t\t: %ld\n"
- "\n"
- "core clock\t: %lu MHz\n"
- "CPM clock\t: %lu MHz\n"
- "bus clock\t: %lu MHz\n",
- CPUINFO_VENDOR, CPUINFO_MACHINE, bp->bi_memsize,
- bp->bi_baudrate, bp->bi_intfreq / 1000000,
- bp->bi_cpmfreq / 1000000, bp->bi_busfreq / 1000000);
- return 0;
-}
-
-/* Initialize the internal interrupt controller. The number of
- * interrupts supported can vary with the processor type, and the
- * 8260 family can have up to 64.
- * External interrupts can be either edge or level triggered, and
- * need to be initialized by the appropriate driver.
- */
-static void __init
-m8260_init_IRQ(void)
-{
- cpm2_init_IRQ();
-
- /* Initialize the default interrupt mapping priorities,
- * in case the boot rom changed something on us.
- */
- cpm2_immr->im_intctl.ic_siprr = 0x05309770;
-}
-
-/*
- * Same hack as 8xx
- */
-static unsigned long __init
-m8260_find_end_of_memory(void)
-{
- bd_t *binfo = (bd_t *)__res;
-
- return binfo->bi_memsize;
-}
-
-/* Map the IMMR, plus anything else we can cover
- * in that upper space according to the memory controller
- * chip select mapping. Grab another bunch of space
- * below that for stuff we can't cover in the upper.
- */
-static void __init
-m8260_map_io(void)
-{
- uint addr;
-
- /* Map IMMR region to a 256MB BAT */
- addr = (cpm2_immr != NULL) ? (uint)cpm2_immr : CPM_MAP_ADDR;
- io_block_mapping(addr, addr, 0x10000000, _PAGE_IO);
-
- /* Map I/O region to a 256MB BAT */
- io_block_mapping(IO_VIRT_ADDR, IO_PHYS_ADDR, 0x10000000, _PAGE_IO);
-}
-
-/* Place-holder for board-specific ppc_md hooking */
-void __attribute__ ((weak)) __init
-m82xx_board_init(void)
-{
-}
-
-/* Inputs:
- * r3 - Optional pointer to a board information structure.
- * r4 - Optional pointer to the physical starting address of the init RAM
- * disk.
- * r5 - Optional pointer to the physical ending address of the init RAM
- * disk.
- * r6 - Optional pointer to the physical starting address of any kernel
- * command-line parameters.
- * r7 - Optional pointer to the physical ending address of any kernel
- * command-line parameters.
- */
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- if ( r3 )
- memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* take care of initrd if we have one */
- if ( r4 ) {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
- /* take care of cmd line */
- if ( r6 ) {
- *(char *)(r7+KERNELBASE) = 0;
- strcpy(cmd_line, (char *)(r6+KERNELBASE));
- }
-
- ppc_md.setup_arch = m8260_setup_arch;
- ppc_md.show_cpuinfo = m8260_show_cpuinfo;
- ppc_md.init_IRQ = m8260_init_IRQ;
- ppc_md.get_irq = cpm2_get_irq;
-
- ppc_md.restart = m8260_restart;
- ppc_md.power_off = m8260_power_off;
- ppc_md.halt = m8260_halt;
-
- ppc_md.set_rtc_time = m8260_set_rtc_time;
- ppc_md.get_rtc_time = m8260_get_rtc_time;
- ppc_md.calibrate_decr = m8260_calibrate_decr;
-
- ppc_md.find_end_of_memory = m8260_find_end_of_memory;
- ppc_md.setup_io_mappings = m8260_map_io;
-
- /* Call back for board-specific settings and overrides. */
- m82xx_board_init();
-}
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
deleted file mode 100644
index 657a1c2..0000000
--- a/arch/ppc/syslib/m82xx_pci.c
+++ /dev/null
@@ -1,346 +0,0 @@
-/*
- *
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2004 Red Hat, Inc.
- *
- * 2005 (c) MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/immap_cpm2.h>
-#include <asm/mpc8260.h>
-#include <asm/cpm2.h>
-
-#include "m82xx_pci.h"
-
-/*
- * Interrupt routing
- */
-
-static inline int
-pq2pci_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- { PIRQA, PIRQB, PIRQC, PIRQD }, /* IDSEL 22 - PCI slot 0 */
- { PIRQD, PIRQA, PIRQB, PIRQC }, /* IDSEL 23 - PCI slot 1 */
- { PIRQC, PIRQD, PIRQA, PIRQB }, /* IDSEL 24 - PCI slot 2 */
- };
-
- const long min_idsel = 22, max_idsel = 24, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
-static void
-pq2pci_mask_irq(unsigned int irq)
-{
- int bit = irq - NR_CPM_INTS;
-
- *(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit));
- return;
-}
-
-static void
-pq2pci_unmask_irq(unsigned int irq)
-{
- int bit = irq - NR_CPM_INTS;
-
- *(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit));
- return;
-}
-
-static void
-pq2pci_mask_and_ack(unsigned int irq)
-{
- int bit = irq - NR_CPM_INTS;
-
- *(volatile unsigned long *) PCI_INT_MASK_REG |= (1 << (31 - bit));
- return;
-}
-
-static void
-pq2pci_end_irq(unsigned int irq)
-{
- int bit = irq - NR_CPM_INTS;
-
- *(volatile unsigned long *) PCI_INT_MASK_REG &= ~(1 << (31 - bit));
- return;
-}
-
-struct hw_interrupt_type pq2pci_ic = {
- "PQ2 PCI",
- NULL,
- NULL,
- pq2pci_unmask_irq,
- pq2pci_mask_irq,
- pq2pci_mask_and_ack,
- pq2pci_end_irq,
- 0
-};
-
-static irqreturn_t
-pq2pci_irq_demux(int irq, void *dev_id)
-{
- unsigned long stat, mask, pend;
- int bit;
-
- for(;;) {
- stat = *(volatile unsigned long *) PCI_INT_STAT_REG;
- mask = *(volatile unsigned long *) PCI_INT_MASK_REG;
- pend = stat & ~mask & 0xf0000000;
- if (!pend)
- break;
- for (bit = 0; pend != 0; ++bit, pend <<= 1) {
- if (pend & 0x80000000)
- __do_IRQ(NR_CPM_INTS + bit);
- }
- }
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction pq2pci_irqaction = {
- .handler = pq2pci_irq_demux,
- .flags = IRQF_DISABLED,
- .mask = CPU_MASK_NONE,
- .name = "PQ2 PCI cascade",
-};
-
-
-void
-pq2pci_init_irq(void)
-{
- int irq;
- volatile cpm2_map_t *immap = cpm2_immr;
- for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++)
- irq_desc[irq].chip = &pq2pci_ic;
-
- /* make PCI IRQ level sensitive */
- immap->im_intctl.ic_siexr &=
- ~(1 << (14 - (PCI_INT_TO_SIU - SIU_INT_IRQ1)));
-
- /* mask all PCI interrupts */
- *(volatile unsigned long *) PCI_INT_MASK_REG |= 0xfff00000;
-
- /* install the demultiplexer for the PCI cascade interrupt */
- setup_irq(PCI_INT_TO_SIU, &pq2pci_irqaction);
- return;
-}
-
-static int
-pq2pci_exclude_device(u_char bus, u_char devfn)
-{
- return PCIBIOS_SUCCESSFUL;
-}
-
-/* PCI bus configuration registers.
- */
-static void
-pq2ads_setup_pci(struct pci_controller *hose)
-{
- __u32 val;
- volatile cpm2_map_t *immap = cpm2_immr;
- bd_t* binfo = (bd_t*) __res;
- u32 sccr = immap->im_clkrst.car_sccr;
- uint pci_div,freq,time;
- /* PCI int lowest prio */
- /* Each 4 bits is a device bus request and the MS 4bits
- is highest priority */
- /* Bus 4bit value
- --- ----------
- CPM high 0b0000
- CPM middle 0b0001
- CPM low 0b0010
- PCI request 0b0011
- Reserved 0b0100
- Reserved 0b0101
- Internal Core 0b0110
- External Master 1 0b0111
- External Master 2 0b1000
- External Master 3 0b1001
- The rest are reserved
- */
- immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x61207893;
- /* park bus on core */
- immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_CORE;
- /*
- * Set up master windows that allow the CPU to access PCI space. These
- * windows are set up using the two SIU PCIBR registers.
- */
-
- immap->im_memctl.memc_pcimsk0 = M82xx_PCI_PRIM_WND_SIZE;
- immap->im_memctl.memc_pcibr0 = M82xx_PCI_PRIM_WND_BASE | PCIBR_ENABLE;
-
-#ifdef M82xx_PCI_SEC_WND_SIZE
- immap->im_memctl.memc_pcimsk1 = M82xx_PCI_SEC_WND_SIZE;
- immap->im_memctl.memc_pcibr1 = M82xx_PCI_SEC_WND_BASE | PCIBR_ENABLE;
-#endif
-
- /* Enable PCI */
- immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
-
- pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) *
- ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1);
- freq = (uint)((2*binfo->bi_cpmfreq)/(pci_div));
- time = (int)66666666/freq;
-
- /* due to PCI Local Bus spec, some devices needs to wait such a long
- time after RST deassertion. More specifically, 0.508s for 66MHz & twice more for 33 */
- printk("%s: The PCI bus is %d Mhz.\nWaiting %s after deasserting RST...\n",__FILE__,freq,
- (time==1) ? "0.5 seconds":"1 second" );
-
- {
- int i;
- for(i=0;i<(500*time);i++)
- udelay(1000);
- }
-
- /* setup ATU registers */
- immap->im_pci.pci_pocmr0 = cpu_to_le32(POCMR_ENABLE | POCMR_PCI_IO |
- ((~(M82xx_PCI_IO_SIZE - 1U)) >> POTA_ADDR_SHIFT));
- immap->im_pci.pci_potar0 = cpu_to_le32(M82xx_PCI_LOWER_IO >> POTA_ADDR_SHIFT);
- immap->im_pci.pci_pobar0 = cpu_to_le32(M82xx_PCI_IO_BASE >> POTA_ADDR_SHIFT);
-
- /* Set-up non-prefetchable window */
- immap->im_pci.pci_pocmr1 = cpu_to_le32(POCMR_ENABLE | ((~(M82xx_PCI_MMIO_SIZE-1U)) >> POTA_ADDR_SHIFT));
- immap->im_pci.pci_potar1 = cpu_to_le32(M82xx_PCI_LOWER_MMIO >> POTA_ADDR_SHIFT);
- immap->im_pci.pci_pobar1 = cpu_to_le32((M82xx_PCI_LOWER_MMIO - M82xx_PCI_MMIO_OFFSET) >> POTA_ADDR_SHIFT);
-
- /* Set-up prefetchable window */
- immap->im_pci.pci_pocmr2 = cpu_to_le32(POCMR_ENABLE |POCMR_PREFETCH_EN |
- (~(M82xx_PCI_MEM_SIZE-1U) >> POTA_ADDR_SHIFT));
- immap->im_pci.pci_potar2 = cpu_to_le32(M82xx_PCI_LOWER_MEM >> POTA_ADDR_SHIFT);
- immap->im_pci.pci_pobar2 = cpu_to_le32((M82xx_PCI_LOWER_MEM - M82xx_PCI_MEM_OFFSET) >> POTA_ADDR_SHIFT);
-
- /* Inbound transactions from PCI memory space */
- immap->im_pci.pci_picmr0 = cpu_to_le32(PICMR_ENABLE | PICMR_PREFETCH_EN |
- ((~(M82xx_PCI_SLAVE_MEM_SIZE-1U)) >> PITA_ADDR_SHIFT));
- immap->im_pci.pci_pibar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_BUS >> PITA_ADDR_SHIFT);
- immap->im_pci.pci_pitar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_LOCAL>> PITA_ADDR_SHIFT);
-
- /* park bus on PCI */
- immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
-
- /* Enable bus mastering and inbound memory transactions */
- early_read_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, &val);
- val &= 0xffff0000;
- val |= PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER;
- early_write_config_dword(hose, hose->first_busno, 0, PCI_COMMAND, val);
-
-}
-
-void __init pq2_find_bridges(void)
-{
- extern int pci_assign_all_buses;
- struct pci_controller * hose;
- int host_bridge;
-
- pci_assign_all_buses = 1;
-
- hose = pcibios_alloc_controller();
-
- if (!hose)
- return;
-
- ppc_md.pci_swizzle = common_swizzle;
-
- hose->first_busno = 0;
- hose->bus_offset = 0;
- hose->last_busno = 0xff;
-
- setup_m8260_indirect_pci(hose,
- (unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
- (unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
-
- /* Make sure it is a supported bridge */
- early_read_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- PCI_VENDOR_ID,
- &host_bridge);
- switch (host_bridge) {
- case PCI_DEVICE_ID_MPC8265:
- break;
- case PCI_DEVICE_ID_MPC8272:
- break;
- default:
- printk("Attempting to use unrecognized host bridge ID"
- " 0x%08x.\n", host_bridge);
- break;
- }
-
- pq2ads_setup_pci(hose);
-
- hose->io_space.start = M82xx_PCI_LOWER_IO;
- hose->io_space.end = M82xx_PCI_UPPER_IO;
- hose->mem_space.start = M82xx_PCI_LOWER_MEM;
- hose->mem_space.end = M82xx_PCI_UPPER_MMIO;
- hose->pci_mem_offset = M82xx_PCI_MEM_OFFSET;
-
- isa_io_base =
- (unsigned long) ioremap(M82xx_PCI_IO_BASE,
- M82xx_PCI_IO_SIZE);
- hose->io_base_virt = (void *) isa_io_base;
-
- /* setup resources */
- pci_init_resource(&hose->mem_resources[0],
- M82xx_PCI_LOWER_MEM,
- M82xx_PCI_UPPER_MEM,
- IORESOURCE_MEM|IORESOURCE_PREFETCH, "PCI prefetchable memory");
-
- pci_init_resource(&hose->mem_resources[1],
- M82xx_PCI_LOWER_MMIO,
- M82xx_PCI_UPPER_MMIO,
- IORESOURCE_MEM, "PCI memory");
-
- pci_init_resource(&hose->io_resource,
- M82xx_PCI_LOWER_IO,
- M82xx_PCI_UPPER_IO,
- IORESOURCE_IO | 1, "PCI I/O");
-
- ppc_md.pci_exclude_device = pq2pci_exclude_device;
- hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
-
- ppc_md.pci_map_irq = pq2pci_map_irq;
- ppc_md.pcibios_fixup = NULL;
- ppc_md.pcibios_fixup_bus = NULL;
-
-}
diff --git a/arch/ppc/syslib/m82xx_pci.h b/arch/ppc/syslib/m82xx_pci.h
deleted file mode 100644
index 924f73f..0000000
--- a/arch/ppc/syslib/m82xx_pci.h
+++ /dev/null
@@ -1,92 +0,0 @@
-
-#ifndef _PPC_KERNEL_M82XX_PCI_H
-#define _PPC_KERNEL_M82XX_PCI_H
-
-#include <asm/m8260_pci.h>
-/*
- * Local->PCI map (from CPU) controlled by
- * MPC826x master window
- *
- * 0xF6000000 - 0xF7FFFFFF IO space
- * 0x80000000 - 0xBFFFFFFF CPU2PCI memory space PCIBR0
- *
- * 0x80000000 - 0x9FFFFFFF PCI Mem with prefetch (Outbound ATU #1)
- * 0xA0000000 - 0xBFFFFFFF PCI Mem w/o prefetch (Outbound ATU #2)
- * 0xF6000000 - 0xF7FFFFFF 32-bit PCI IO (Outbound ATU #3)
- *
- * PCI->Local map (from PCI)
- * MPC826x slave window controlled by
- *
- * 0x00000000 - 0x07FFFFFF MPC826x local memory (Inbound ATU #1)
- */
-
-/*
- * Slave window that allows PCI masters to access MPC826x local memory.
- * This window is set up using the first set of Inbound ATU registers
- */
-
-#ifndef M82xx_PCI_SLAVE_MEM_LOCAL
-#define M82xx_PCI_SLAVE_MEM_LOCAL (((struct bd_info *)__res)->bi_memstart)
-#define M82xx_PCI_SLAVE_MEM_BUS (((struct bd_info *)__res)->bi_memstart)
-#define M82xx_PCI_SLAVE_MEM_SIZE (((struct bd_info *)__res)->bi_memsize)
-#endif
-
-/*
- * This is the window that allows the CPU to access PCI address space.
- * It will be setup with the SIU PCIBR0 register. All three PCI master
- * windows, which allow the CPU to access PCI prefetch, non prefetch,
- * and IO space (see below), must all fit within this window.
- */
-
-#ifndef M82xx_PCI_LOWER_MEM
-#define M82xx_PCI_LOWER_MEM 0x80000000
-#define M82xx_PCI_UPPER_MEM 0x9fffffff
-#define M82xx_PCI_MEM_OFFSET 0x00000000
-#define M82xx_PCI_MEM_SIZE 0x20000000
-#endif
-
-#ifndef M82xx_PCI_LOWER_MMIO
-#define M82xx_PCI_LOWER_MMIO 0xa0000000
-#define M82xx_PCI_UPPER_MMIO 0xafffffff
-#define M82xx_PCI_MMIO_OFFSET 0x00000000
-#define M82xx_PCI_MMIO_SIZE 0x20000000
-#endif
-
-#ifndef M82xx_PCI_LOWER_IO
-#define M82xx_PCI_LOWER_IO 0x00000000
-#define M82xx_PCI_UPPER_IO 0x01ffffff
-#define M82xx_PCI_IO_BASE 0xf6000000
-#define M82xx_PCI_IO_SIZE 0x02000000
-#endif
-
-#ifndef M82xx_PCI_PRIM_WND_SIZE
-#define M82xx_PCI_PRIM_WND_SIZE ~(M82xx_PCI_IO_SIZE - 1U)
-#define M82xx_PCI_PRIM_WND_BASE (M82xx_PCI_IO_BASE)
-#endif
-
-#ifndef M82xx_PCI_SEC_WND_SIZE
-#define M82xx_PCI_SEC_WND_SIZE ~(M82xx_PCI_MEM_SIZE + M82xx_PCI_MMIO_SIZE - 1U)
-#define M82xx_PCI_SEC_WND_BASE (M82xx_PCI_LOWER_MEM)
-#endif
-
-#ifndef POTA_ADDR_SHIFT
-#define POTA_ADDR_SHIFT 12
-#endif
-
-#ifndef PITA_ADDR_SHIFT
-#define PITA_ADDR_SHIFT 12
-#endif
-
-#ifndef _IO_BASE
-#define _IO_BASE isa_io_base
-#endif
-
-#ifdef CONFIG_8260_PCI9
-struct pci_controller;
-extern void setup_m8260_indirect_pci(struct pci_controller* hose,
- u32 cfg_addr, u32 cfg_data);
-#else
-#define setup_m8260_indirect_pci setup_indirect_pci
-#endif
-
-#endif /* _PPC_KERNEL_M8260_PCI_H */
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
deleted file mode 100644
index 18da720..0000000
--- a/arch/ppc/syslib/m8xx_setup.c
+++ /dev/null
@@ -1,465 +0,0 @@
-/*
- * Copyright (C) 1995 Linus Torvalds
- * Adapted from 'alpha' version by Gary Thomas
- * Modified by Cort Dougan (cort@cs.nmt.edu)
- * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net)
- * Further modified for generic 8xx by Dan.
- */
-
-/*
- * bootup setup stuff..
- */
-
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/tty.h>
-#include <linux/major.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/init.h>
-#include <linux/initrd.h>
-#include <linux/ioport.h>
-#include <linux/bootmem.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-
-#if defined(CONFIG_MTD) && defined(CONFIG_MTD_PHYSMAP)
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#endif
-
-#include <asm/mmu.h>
-#include <asm/reg.h>
-#include <asm/residual.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/8xx_immap.h>
-#include <asm/machdep.h>
-#include <asm/bootinfo.h>
-#include <asm/time.h>
-#include <asm/xmon.h>
-#include <asm/ppc_sys.h>
-
-#include "ppc8xx_pic.h"
-
-#ifdef CONFIG_MTD_PHYSMAP
-#define MPC8xxADS_BANK_WIDTH 4
-#endif
-
-#define MPC8xxADS_U_BOOT_SIZE 0x80000
-#define MPC8xxADS_FREE_AREA_OFFSET MPC8xxADS_U_BOOT_SIZE
-
-#if defined(CONFIG_MTD_PARTITIONS)
- /*
- NOTE: bank width and interleave relative to the installed flash
- should have been chosen within MTD_CFI_GEOMETRY options.
- */
-static struct mtd_partition mpc8xxads_partitions[] = {
- {
- .name = "bootloader",
- .size = MPC8xxADS_U_BOOT_SIZE,
- .offset = 0,
- .mask_flags = MTD_WRITEABLE, /* force read-only */
- }, {
- .name = "User FS",
- .offset = MPC8xxADS_FREE_AREA_OFFSET
- }
-};
-
-#define mpc8xxads_part_num ARRAY_SIZE(mpc8xxads_partitions)
-
-#endif
-
-static int m8xx_set_rtc_time(unsigned long time);
-static unsigned long m8xx_get_rtc_time(void);
-void m8xx_calibrate_decr(void);
-
-unsigned char __res[sizeof(bd_t)];
-
-extern unsigned long find_available_memory(void);
-extern void m8xx_cpm_reset(void);
-extern void m8xx_wdt_handler_install(bd_t *bp);
-extern void rpxfb_alloc_pages(void);
-extern void cpm_interrupt_init(void);
-
-void __attribute__ ((weak))
-board_init(void)
-{
-}
-
-void __init
-m8xx_setup_arch(void)
-{
-#if defined(CONFIG_MTD) && defined(CONFIG_MTD_PHYSMAP)
- bd_t *binfo = (bd_t *)__res;
-#endif
-
- /* Reset the Communication Processor Module.
- */
- m8xx_cpm_reset();
-
-#ifdef CONFIG_FB_RPX
- rpxfb_alloc_pages();
-#endif
-
-#ifdef notdef
- ROOT_DEV = Root_HDA1; /* hda1 */
-#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
-#if 0
- ROOT_DEV = Root_FD0; /* floppy */
- rd_prompt = 1;
- rd_doload = 1;
- rd_image_start = 0;
-#endif
-#if 0 /* XXX this may need to be updated for the new bootmem stuff,
- or possibly just deleted (see set_phys_avail() in init.c).
- - paulus. */
- /* initrd_start and size are setup by boot/head.S and kernel/head.S */
- if ( initrd_start )
- {
- if (initrd_end > *memory_end_p)
- {
- printk("initrd extends beyond end of memory "
- "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
- initrd_end,*memory_end_p);
- initrd_start = 0;
- }
- }
-#endif
-#endif
-
- board_init();
-}
-
-void
-abort(void)
-{
-#ifdef CONFIG_XMON
- xmon(0);
-#endif
- machine_restart(NULL);
-
- /* not reached */
- for (;;);
-}
-
-/* A place holder for time base interrupts, if they are ever enabled. */
-irqreturn_t timebase_interrupt(int irq, void * dev)
-{
- printk ("timebase_interrupt()\n");
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction tbint_irqaction = {
- .handler = timebase_interrupt,
- .mask = CPU_MASK_NONE,
- .name = "tbint",
-};
-
-/* per-board overridable init_internal_rtc() function. */
-void __init __attribute__ ((weak))
-init_internal_rtc(void)
-{
- /* Disable the RTC one second and alarm interrupts. */
- clrbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));
-
- /* Enable the RTC */
- setbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));
-
-}
-
-/* The decrementer counts at the system (internal) clock frequency divided by
- * sixteen, or external oscillator divided by four. We force the processor
- * to use system clock divided by sixteen.
- */
-void __init m8xx_calibrate_decr(void)
-{
- bd_t *binfo = (bd_t *)__res;
- int freq, fp, divisor;
-
- /* Unlock the SCCR. */
- out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, ~KAPWR_KEY);
- out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY);
-
- /* Force all 8xx processors to use divide by 16 processor clock. */
- setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr, 0x02000000);
- /* Processor frequency is MHz.
- * The value 'fp' is the number of decrementer ticks per second.
- */
- fp = binfo->bi_intfreq / 16;
- freq = fp*60; /* try to make freq/1e6 an integer */
- divisor = 60;
- printk("Decrementer Frequency = %d/%d\n", freq, divisor);
- tb_ticks_per_jiffy = freq / HZ / divisor;
- tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
-
- /* Perform some more timer/timebase initialization. This used
- * to be done elsewhere, but other changes caused it to get
- * called more than once....that is a bad thing.
- *
- * First, unlock all of the registers we are going to modify.
- * To protect them from corruption during power down, registers
- * that are maintained by keep alive power are "locked". To
- * modify these registers we have to write the key value to
- * the key location associated with the register.
- * Some boards power up with these unlocked, while others
- * are locked. Writing anything (including the unlock code?)
- * to the unlocked registers will lock them again. So, here
- * we guarantee the registers are locked, then we unlock them
- * for our use.
- */
- out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, ~KAPWR_KEY);
- out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, ~KAPWR_KEY);
- out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, ~KAPWR_KEY);
- out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, KAPWR_KEY);
- out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY);
- out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY);
-
- init_internal_rtc();
-
- /* Enabling the decrementer also enables the timebase interrupts
- * (or from the other point of view, to get decrementer interrupts
- * we have to enable the timebase). The decrementer interrupt
- * is wired into the vector table, nothing to do here for that.
- */
- out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_tbscr, (mk_int_int_mask(DEC_INTERRUPT) << 8) | (TBSCR_TBF | TBSCR_TBE));
-
- if (setup_irq(DEC_INTERRUPT, &tbint_irqaction))
- panic("Could not allocate timer IRQ!");
-
-#ifdef CONFIG_8xx_WDT
- /* Install watchdog timer handler early because it might be
- * already enabled by the bootloader
- */
- m8xx_wdt_handler_install(binfo);
-#endif
-}
-
-/* The RTC on the MPC8xx is an internal register.
- * We want to protect this during power down, so we need to unlock,
- * modify, and re-lock.
- */
-static int
-m8xx_set_rtc_time(unsigned long time)
-{
- out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, KAPWR_KEY);
- out_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc, time);
- out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, ~KAPWR_KEY);
- return(0);
-}
-
-static unsigned long
-m8xx_get_rtc_time(void)
-{
- /* Get time from the RTC. */
- return (unsigned long) in_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc);
-}
-
-static void
-m8xx_restart(char *cmd)
-{
- __volatile__ unsigned char dummy;
-
- local_irq_disable();
-
- setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, 0x00000080);
- /* Clear the ME bit in MSR to cause checkstop on machine check
- */
- mtmsr(mfmsr() & ~0x1000);
-
- dummy = in_8(&((immap_t *)IMAP_ADDR)->im_clkrst.res[0]);
- printk("Restart failed\n");
- while(1);
-}
-
-static void
-m8xx_power_off(void)
-{
- m8xx_restart(NULL);
-}
-
-static void
-m8xx_halt(void)
-{
- m8xx_restart(NULL);
-}
-
-
-static int
-m8xx_show_percpuinfo(struct seq_file *m, int i)
-{
- bd_t *bp;
-
- bp = (bd_t *)__res;
-
- seq_printf(m, "clock\t\t: %uMHz\n"
- "bus clock\t: %uMHz\n",
- bp->bi_intfreq / 1000000,
- bp->bi_busfreq / 1000000);
-
- return 0;
-}
-
-#ifdef CONFIG_PCI
-static struct irqaction mbx_i8259_irqaction = {
- .handler = mbx_i8259_action,
- .mask = CPU_MASK_NONE,
- .name = "i8259 cascade",
-};
-#endif
-
-/* Initialize the internal interrupt controller. The number of
- * interrupts supported can vary with the processor type, and the
- * 82xx family can have up to 64.
- * External interrupts can be either edge or level triggered, and
- * need to be initialized by the appropriate driver.
- */
-static void __init
-m8xx_init_IRQ(void)
-{
- int i;
-
- for (i = SIU_IRQ_OFFSET ; i < SIU_IRQ_OFFSET + NR_SIU_INTS ; i++)
- irq_desc[i].chip = &ppc8xx_pic;
-
- cpm_interrupt_init();
-
-#if defined(CONFIG_PCI)
- for (i = I8259_IRQ_OFFSET ; i < I8259_IRQ_OFFSET + NR_8259_INTS ; i++)
- irq_desc[i].chip = &i8259_pic;
-
- i8259_pic_irq_offset = I8259_IRQ_OFFSET;
- i8259_init(0);
-
- /* The i8259 cascade interrupt must be level sensitive. */
-
- clrbits32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, (0x80000000 >> ISA_BRIDGE_INT));
- if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction))
- enable_irq(ISA_BRIDGE_INT);
-#endif /* CONFIG_PCI */
-}
-
-/* -------------------------------------------------------------------- */
-
-/*
- * This is a big hack right now, but it may turn into something real
- * someday.
- *
- * For the 8xx boards (at this time anyway), there is nothing to initialize
- * associated the PROM. Rather than include all of the prom.c
- * functions in the image just to get prom_init, all we really need right
- * now is the initialization of the physical memory region.
- */
-static unsigned long __init
-m8xx_find_end_of_memory(void)
-{
- bd_t *binfo;
- extern unsigned char __res[];
-
- binfo = (bd_t *)__res;
-
- return binfo->bi_memsize;
-}
-
-/*
- * Now map in some of the I/O space that is generically needed
- * or shared with multiple devices.
- * All of this fits into the same 4Mbyte region, so it only
- * requires one page table page. (or at least it used to -- paulus)
- */
-static void __init
-m8xx_map_io(void)
-{
- io_block_mapping(IMAP_ADDR, IMAP_ADDR, IMAP_SIZE, _PAGE_IO);
-#ifdef CONFIG_MBX
- io_block_mapping(NVRAM_ADDR, NVRAM_ADDR, NVRAM_SIZE, _PAGE_IO);
- io_block_mapping(MBX_CSR_ADDR, MBX_CSR_ADDR, MBX_CSR_SIZE, _PAGE_IO);
- io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO);
-
- /* Map some of the PCI/ISA I/O space to get the IDE interface.
- */
- io_block_mapping(PCI_ISA_IO_ADDR, PCI_ISA_IO_ADDR, 0x4000, _PAGE_IO);
- io_block_mapping(PCI_IDE_ADDR, PCI_IDE_ADDR, 0x4000, _PAGE_IO);
-#endif
-#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
- io_block_mapping(RPX_CSR_ADDR, RPX_CSR_ADDR, RPX_CSR_SIZE, _PAGE_IO);
-#if !defined(CONFIG_PCI)
- io_block_mapping(_IO_BASE,_IO_BASE,_IO_BASE_SIZE, _PAGE_IO);
-#endif
-#endif
-#if defined(CONFIG_RPXTOUCH) || defined(CONFIG_FB_RPX)
- io_block_mapping(HIOX_CSR_ADDR, HIOX_CSR_ADDR, HIOX_CSR_SIZE, _PAGE_IO);
-#endif
-#ifdef CONFIG_FADS
- io_block_mapping(BCSR_ADDR, BCSR_ADDR, BCSR_SIZE, _PAGE_IO);
-#endif
-#ifdef CONFIG_PCI
- io_block_mapping(PCI_CSR_ADDR, PCI_CSR_ADDR, PCI_CSR_SIZE, _PAGE_IO);
-#endif
-#if defined(CONFIG_NETTA)
- io_block_mapping(_IO_BASE,_IO_BASE,_IO_BASE_SIZE, _PAGE_IO);
-#endif
-}
-
-void __init
-platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- if ( r3 )
- memcpy( (void *)__res,(void *)(r3+KERNELBASE), sizeof(bd_t) );
-
-#ifdef CONFIG_PCI
- m8xx_setup_pci_ptrs();
-#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* take care of initrd if we have one */
- if ( r4 )
- {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
- /* take care of cmd line */
- if ( r6 )
- {
- *(char *)(r7+KERNELBASE) = 0;
- strcpy(cmd_line, (char *)(r6+KERNELBASE));
- }
-
- identify_ppc_sys_by_name(BOARD_CHIP_NAME);
-
- ppc_md.setup_arch = m8xx_setup_arch;
- ppc_md.show_percpuinfo = m8xx_show_percpuinfo;
- ppc_md.init_IRQ = m8xx_init_IRQ;
- ppc_md.get_irq = m8xx_get_irq;
- ppc_md.init = NULL;
-
- ppc_md.restart = m8xx_restart;
- ppc_md.power_off = m8xx_power_off;
- ppc_md.halt = m8xx_halt;
-
- ppc_md.time_init = NULL;
- ppc_md.set_rtc_time = m8xx_set_rtc_time;
- ppc_md.get_rtc_time = m8xx_get_rtc_time;
- ppc_md.calibrate_decr = m8xx_calibrate_decr;
-
- ppc_md.find_end_of_memory = m8xx_find_end_of_memory;
- ppc_md.setup_io_mappings = m8xx_map_io;
-}
diff --git a/arch/ppc/syslib/m8xx_wdt.c b/arch/ppc/syslib/m8xx_wdt.c
deleted file mode 100644
index fffac8c..0000000
--- a/arch/ppc/syslib/m8xx_wdt.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * m8xx_wdt.c - MPC8xx watchdog driver
- *
- * Author: Florian Schirmer <jolt@tuxbox.org>
- *
- * 2002 (c) Florian Schirmer <jolt@tuxbox.org> This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <asm/io.h>
-#include <asm/8xx_immap.h>
-#include <syslib/m8xx_wdt.h>
-
-static int wdt_timeout;
-int m8xx_has_internal_rtc = 0;
-
-static irqreturn_t m8xx_wdt_interrupt(int, void *);
-static struct irqaction m8xx_wdt_irqaction = {
- .handler = m8xx_wdt_interrupt,
- .name = "watchdog",
-};
-
-void m8xx_wdt_reset(void)
-{
- volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
-
- out_be16(&imap->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */
- out_be16(&imap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
-}
-
-static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev)
-{
- volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
-
- m8xx_wdt_reset();
-
- setbits16(&imap->im_sit.sit_piscr, PISCR_PS);
- return IRQ_HANDLED;
-}
-
-#define SYPCR_SWP 0x1
-#define SYPCR_SWE 0x4
-
-
-void __init m8xx_wdt_install_irq(volatile immap_t *imap, bd_t *binfo)
-{
- u32 pitc;
- u32 pitrtclk;
-
- /*
- * Fire trigger if half of the wdt ticked down
- */
-
- if (imap->im_sit.sit_rtcsc & RTCSC_38K)
- pitrtclk = 9600;
- else
- pitrtclk = 8192;
-
- if ((wdt_timeout) > (UINT_MAX / pitrtclk))
- pitc = wdt_timeout / binfo->bi_intfreq * pitrtclk / 2;
- else
- pitc = pitrtclk * wdt_timeout / binfo->bi_intfreq / 2;
-
- out_be32(&imap->im_sit.sit_pitc, pitc << 16);
-
- out_be16(&imap->im_sit.sit_piscr, (mk_int_int_mask(PIT_INTERRUPT) << 8) | PISCR_PIE | PISCR_PTE);
-
- if (setup_irq(PIT_INTERRUPT, &m8xx_wdt_irqaction))
- panic("m8xx_wdt: error setting up the watchdog irq!");
-
- printk(KERN_NOTICE
- "m8xx_wdt: keep-alive trigger installed (PITC: 0x%04X)\n", pitc);
-
-}
-
-static void m8xx_wdt_timer_func(unsigned long data);
-
-static struct timer_list m8xx_wdt_timer =
- TIMER_INITIALIZER(m8xx_wdt_timer_func, 0, 0);
-
-void m8xx_wdt_stop_timer(void)
-{
- del_timer(&m8xx_wdt_timer);
-}
-
-void m8xx_wdt_install_timer(void)
-{
- m8xx_wdt_timer.expires = jiffies + (HZ/2);
- add_timer(&m8xx_wdt_timer);
-}
-
-static void m8xx_wdt_timer_func(unsigned long data)
-{
- m8xx_wdt_reset();
- m8xx_wdt_install_timer();
-}
-
-void __init m8xx_wdt_handler_install(bd_t * binfo)
-{
- volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
- u32 sypcr;
-
- sypcr = in_be32(&imap->im_siu_conf.sc_sypcr);
-
- if (!(sypcr & SYPCR_SWE)) {
- printk(KERN_NOTICE "m8xx_wdt: wdt disabled (SYPCR: 0x%08X)\n",
- sypcr);
- return;
- }
-
- m8xx_wdt_reset();
-
- printk(KERN_NOTICE
- "m8xx_wdt: active wdt found (SWTC: 0x%04X, SWP: 0x%01X)\n",
- (sypcr >> 16), sypcr & SYPCR_SWP);
-
- wdt_timeout = (sypcr >> 16) & 0xFFFF;
-
- if (!wdt_timeout)
- wdt_timeout = 0xFFFF;
-
- if (sypcr & SYPCR_SWP)
- wdt_timeout *= 2048;
-
- m8xx_has_internal_rtc = in_be16(&imap->im_sit.sit_rtcsc) & RTCSC_RTE;
-
- /* if the internal RTC is off use a kernel timer */
- if (!m8xx_has_internal_rtc) {
- if (wdt_timeout < (binfo->bi_intfreq/HZ))
- printk(KERN_ERR "m8xx_wdt: timeout too short for ktimer!\n");
- m8xx_wdt_install_timer();
- } else
- m8xx_wdt_install_irq(imap, binfo);
-
- wdt_timeout /= binfo->bi_intfreq;
-}
-
-int m8xx_wdt_get_timeout(void)
-{
- return wdt_timeout;
-}
diff --git a/arch/ppc/syslib/m8xx_wdt.h b/arch/ppc/syslib/m8xx_wdt.h
deleted file mode 100644
index e75835f..0000000
--- a/arch/ppc/syslib/m8xx_wdt.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Author: Florian Schirmer <jolt@tuxbox.org>
- *
- * 2002 (c) Florian Schirmer <jolt@tuxbox.org> This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef _PPC_SYSLIB_M8XX_WDT_H
-#define _PPC_SYSLIB_M8XX_WDT_H
-
-extern int m8xx_has_internal_rtc;
-
-extern void m8xx_wdt_handler_install(bd_t * binfo);
-extern int m8xx_wdt_get_timeout(void);
-extern void m8xx_wdt_reset(void);
-extern void m8xx_wdt_install_timer(void);
-extern void m8xx_wdt_stop_timer(void);
-
-#endif /* _PPC_SYSLIB_M8XX_WDT_H */
diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
deleted file mode 100644
index 437a294..0000000
--- a/arch/ppc/syslib/mpc10x_common.c
+++ /dev/null
@@ -1,654 +0,0 @@
-/*
- * Common routines for the Motorola SPS MPC106, MPC107 and MPC8240 Host bridge,
- * Mem ctlr, EPIC, etc.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * *** WARNING - A BAT MUST be set to access the PCI config addr/data regs ***
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/serial_8250.h>
-#include <linux/fsl_devices.h>
-#include <linux/device.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/open_pic.h>
-#include <asm/mpc10x.h>
-#include <asm/ppc_sys.h>
-
-#ifdef CONFIG_MPC10X_OPENPIC
-#ifdef CONFIG_EPIC_SERIAL_MODE
-#define EPIC_IRQ_BASE (epic_serial_mode ? 16 : 5)
-#else
-#define EPIC_IRQ_BASE 5
-#endif
-#define MPC10X_I2C_IRQ (EPIC_IRQ_BASE + NUM_8259_INTERRUPTS)
-#define MPC10X_DMA0_IRQ (EPIC_IRQ_BASE + 1 + NUM_8259_INTERRUPTS)
-#define MPC10X_DMA1_IRQ (EPIC_IRQ_BASE + 2 + NUM_8259_INTERRUPTS)
-#define MPC10X_UART0_IRQ (EPIC_IRQ_BASE + 4 + NUM_8259_INTERRUPTS)
-#define MPC10X_UART1_IRQ (EPIC_IRQ_BASE + 5 + NUM_8259_INTERRUPTS)
-#else
-#define MPC10X_I2C_IRQ -1
-#define MPC10X_DMA0_IRQ -1
-#define MPC10X_DMA1_IRQ -1
-#define MPC10X_UART0_IRQ -1
-#define MPC10X_UART1_IRQ -1
-#endif
-
-static struct fsl_i2c_platform_data mpc10x_i2c_pdata = {
- .device_flags = 0,
-};
-
-static struct plat_serial8250_port serial_plat_uart0[] = {
- [0] = {
- .mapbase = 0x4500,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
- },
- { },
-};
-static struct plat_serial8250_port serial_plat_uart1[] = {
- [0] = {
- .mapbase = 0x4600,
- .iotype = UPIO_MEM,
- .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
- },
- { },
-};
-
-struct platform_device ppc_sys_platform_devices[] = {
- [MPC10X_IIC1] = {
- .name = "fsl-i2c",
- .id = 1,
- .dev.platform_data = &mpc10x_i2c_pdata,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC10X_EUMB_I2C_OFFSET,
- .end = MPC10X_EUMB_I2C_OFFSET +
- MPC10X_EUMB_I2C_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .flags = IORESOURCE_IRQ
- },
- },
- },
- [MPC10X_DMA0] = {
- .name = "fsl-dma",
- .id = 0,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC10X_EUMB_DMA_OFFSET + 0x10,
- .end = MPC10X_EUMB_DMA_OFFSET + 0x1f,
- .flags = IORESOURCE_MEM,
- },
- {
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC10X_DMA1] = {
- .name = "fsl-dma",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC10X_EUMB_DMA_OFFSET + 0x20,
- .end = MPC10X_EUMB_DMA_OFFSET + 0x2f,
- .flags = IORESOURCE_MEM,
- },
- {
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC10X_DMA1] = {
- .name = "fsl-dma",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = MPC10X_EUMB_DMA_OFFSET + 0x20,
- .end = MPC10X_EUMB_DMA_OFFSET + 0x2f,
- .flags = IORESOURCE_MEM,
- },
- {
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC10X_UART0] = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM,
- .dev.platform_data = serial_plat_uart0,
- },
- [MPC10X_UART1] = {
- .name = "serial8250",
- .id = PLAT8250_DEV_PLATFORM1,
- .dev.platform_data = serial_plat_uart1,
- },
-
-};
-
-/* We use the PCI ID to match on */
-struct ppc_sys_spec *cur_ppc_sys_spec;
-struct ppc_sys_spec ppc_sys_specs[] = {
- {
- .ppc_sys_name = "8245",
- .mask = 0xFFFFFFFF,
- .value = MPC10X_BRIDGE_8245,
- .num_devices = 5,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1, MPC10X_UART0, MPC10X_UART1,
- },
- },
- {
- .ppc_sys_name = "8240",
- .mask = 0xFFFFFFFF,
- .value = MPC10X_BRIDGE_8240,
- .num_devices = 3,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1,
- },
- },
- {
- .ppc_sys_name = "107",
- .mask = 0xFFFFFFFF,
- .value = MPC10X_BRIDGE_107,
- .num_devices = 3,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1,
- },
- },
- { /* default match */
- .ppc_sys_name = "",
- .mask = 0x00000000,
- .value = 0x00000000,
- },
-};
-
-/*
- * mach_mpc10x_fixup: This function enables DUART mode if it detects
- * if it detects two UARTS in the platform device entries.
- */
-static int __init mach_mpc10x_fixup(struct platform_device *pdev)
-{
- if (strncmp (pdev->name, "serial8250", 10) == 0 && pdev->id == 1)
- writeb(readb(serial_plat_uart1[0].membase + 0x11) | 0x1,
- serial_plat_uart1[0].membase + 0x11);
- return 0;
-}
-
-static int __init mach_mpc10x_init(void)
-{
- ppc_sys_device_fixup = mach_mpc10x_fixup;
- return 0;
-}
-postcore_initcall(mach_mpc10x_init);
-
-/* Set resources to match bridge memory map */
-void __init
-mpc10x_bridge_set_resources(int map, struct pci_controller *hose)
-{
-
- switch (map) {
- case MPC10X_MEM_MAP_A:
- pci_init_resource(&hose->io_resource,
- 0x00000000,
- 0x3f7fffff,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource (&hose->mem_resources[0],
- 0xc0000000,
- 0xfeffffff,
- IORESOURCE_MEM,
- "PCI host bridge");
- break;
- case MPC10X_MEM_MAP_B:
- pci_init_resource(&hose->io_resource,
- 0x00000000,
- 0x00bfffff,
- IORESOURCE_IO,
- "PCI host bridge");
-
- pci_init_resource (&hose->mem_resources[0],
- 0x80000000,
- 0xfcffffff,
- IORESOURCE_MEM,
- "PCI host bridge");
- break;
- default:
- printk("mpc10x_bridge_set_resources: "
- "Invalid map specified\n");
- if (ppc_md.progress)
- ppc_md.progress("mpc10x:exit1", 0x100);
- }
-}
-
-/*
- * Do some initialization and put the EUMB registers at the specified address
- * (also map the EPIC registers into virtual space--OpenPIC_Addr will be set).
- *
- * The EPIC is not on the 106, only the 8240 and 107.
- */
-int __init
-mpc10x_bridge_init(struct pci_controller *hose,
- uint current_map,
- uint new_map,
- uint phys_eumb_base)
-{
- int host_bridge, picr1, picr1_bit, i;
- ulong pci_config_addr, pci_config_data;
- u_char pir, byte;
-
- if (ppc_md.progress) ppc_md.progress("mpc10x:enter", 0x100);
-
- /* Set up for current map so we can get at config regs */
- switch (current_map) {
- case MPC10X_MEM_MAP_A:
- setup_indirect_pci(hose,
- MPC10X_MAPA_CNFG_ADDR,
- MPC10X_MAPA_CNFG_DATA);
- break;
- case MPC10X_MEM_MAP_B:
- setup_indirect_pci(hose,
- MPC10X_MAPB_CNFG_ADDR,
- MPC10X_MAPB_CNFG_DATA);
- break;
- default:
- printk("mpc10x_bridge_init: %s\n",
- "Invalid current map specified");
- if (ppc_md.progress)
- ppc_md.progress("mpc10x:exit1", 0x100);
- return -1;
- }
-
- /* Make sure it's a supported bridge */
- early_read_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- PCI_VENDOR_ID,
- &host_bridge);
-
- switch (host_bridge) {
- case MPC10X_BRIDGE_106:
- case MPC10X_BRIDGE_8240:
- case MPC10X_BRIDGE_107:
- case MPC10X_BRIDGE_8245:
- break;
- default:
- if (ppc_md.progress)
- ppc_md.progress("mpc10x:exit2", 0x100);
- return -1;
- }
-
- switch (new_map) {
- case MPC10X_MEM_MAP_A:
- MPC10X_SETUP_HOSE(hose, A);
- pci_config_addr = MPC10X_MAPA_CNFG_ADDR;
- pci_config_data = MPC10X_MAPA_CNFG_DATA;
- picr1_bit = MPC10X_CFG_PICR1_ADDR_MAP_A;
- break;
- case MPC10X_MEM_MAP_B:
- MPC10X_SETUP_HOSE(hose, B);
- pci_config_addr = MPC10X_MAPB_CNFG_ADDR;
- pci_config_data = MPC10X_MAPB_CNFG_DATA;
- picr1_bit = MPC10X_CFG_PICR1_ADDR_MAP_B;
- break;
- default:
- printk("mpc10x_bridge_init: %s\n",
- "Invalid new map specified");
- if (ppc_md.progress)
- ppc_md.progress("mpc10x:exit3", 0x100);
- return -1;
- }
-
- /* Make bridge use the 'new_map', if not already usng it */
- if (current_map != new_map) {
- early_read_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_PICR1_REG,
- &picr1);
-
- picr1 = (picr1 & ~MPC10X_CFG_PICR1_ADDR_MAP_MASK) |
- picr1_bit;
-
- early_write_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_PICR1_REG,
- picr1);
-
- asm volatile("sync");
-
- /* Undo old mappings & map in new cfg data/addr regs */
- iounmap((void *)hose->cfg_addr);
- iounmap((void *)hose->cfg_data);
-
- setup_indirect_pci(hose,
- pci_config_addr,
- pci_config_data);
- }
-
- /* Setup resources to match map */
- mpc10x_bridge_set_resources(new_map, hose);
-
- /*
- * Want processor accesses of 0xFDxxxxxx to be mapped
- * to PCI memory space at 0x00000000. Do not want
- * host bridge to respond to PCI memory accesses of
- * 0xFDxxxxxx. Do not want host bridge to respond
- * to PCI memory addresses 0xFD000000-0xFDFFFFFF;
- * want processor accesses from 0x000A0000-0x000BFFFF
- * to be forwarded to system memory.
- *
- * Only valid if not in agent mode and using MAP B.
- */
- if (new_map == MPC10X_MEM_MAP_B) {
- early_read_config_byte(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_MAPB_OPTIONS_REG,
- &byte);
-
- byte &= ~(MPC10X_CFG_MAPB_OPTIONS_PFAE |
- MPC10X_CFG_MAPB_OPTIONS_PCICH |
- MPC10X_CFG_MAPB_OPTIONS_PROCCH);
-
- if (host_bridge != MPC10X_BRIDGE_106) {
- byte |= MPC10X_CFG_MAPB_OPTIONS_CFAE;
- }
-
- early_write_config_byte(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_MAPB_OPTIONS_REG,
- byte);
- }
-
- if (host_bridge != MPC10X_BRIDGE_106) {
- early_read_config_byte(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_PIR_REG,
- &pir);
-
- if (pir != MPC10X_CFG_PIR_HOST_BRIDGE) {
- printk("Host bridge in Agent mode\n");
- /* Read or Set LMBAR & PCSRBAR? */
- }
-
- /* Set base addr of the 8240/107 EUMB. */
- early_write_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_EUMBBAR,
- phys_eumb_base);
-#ifdef CONFIG_MPC10X_OPENPIC
- /* Map EPIC register part of EUMB into vitual memory - PCORE
- uses an i8259 instead of EPIC. */
- OpenPIC_Addr =
- ioremap(phys_eumb_base + MPC10X_EUMB_EPIC_OFFSET,
- MPC10X_EUMB_EPIC_SIZE);
-#endif
- }
-
-#ifdef CONFIG_MPC10X_STORE_GATHERING
- mpc10x_enable_store_gathering(hose);
-#else
- mpc10x_disable_store_gathering(hose);
-#endif
-
- /* setup platform devices for MPC10x bridges */
- identify_ppc_sys_by_id (host_bridge);
-
- for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
- unsigned int dev_id = cur_ppc_sys_spec->device_list[i];
- ppc_sys_fixup_mem_resource(&ppc_sys_platform_devices[dev_id],
- phys_eumb_base);
- }
-
- /* IRQs are determined at runtime */
- ppc_sys_platform_devices[MPC10X_IIC1].resource[1].start = MPC10X_I2C_IRQ;
- ppc_sys_platform_devices[MPC10X_IIC1].resource[1].end = MPC10X_I2C_IRQ;
- ppc_sys_platform_devices[MPC10X_DMA0].resource[1].start = MPC10X_DMA0_IRQ;
- ppc_sys_platform_devices[MPC10X_DMA0].resource[1].end = MPC10X_DMA0_IRQ;
- ppc_sys_platform_devices[MPC10X_DMA1].resource[1].start = MPC10X_DMA1_IRQ;
- ppc_sys_platform_devices[MPC10X_DMA1].resource[1].end = MPC10X_DMA1_IRQ;
-
- serial_plat_uart0[0].mapbase += phys_eumb_base;
- serial_plat_uart0[0].irq = MPC10X_UART0_IRQ;
- serial_plat_uart0[0].membase = ioremap(serial_plat_uart0[0].mapbase, 0x100);
-
- serial_plat_uart1[0].mapbase += phys_eumb_base;
- serial_plat_uart1[0].irq = MPC10X_UART1_IRQ;
- serial_plat_uart1[0].membase = ioremap(serial_plat_uart1[0].mapbase, 0x100);
-
- /*
- * 8240 erratum 26, 8241/8245 erratum 29, 107 erratum 23: speculative
- * PCI reads may return stale data so turn off.
- */
- if ((host_bridge == MPC10X_BRIDGE_8240)
- || (host_bridge == MPC10X_BRIDGE_8245)
- || (host_bridge == MPC10X_BRIDGE_107)) {
-
- early_read_config_dword(hose, 0, PCI_DEVFN(0,0),
- MPC10X_CFG_PICR1_REG, &picr1);
-
- picr1 &= ~MPC10X_CFG_PICR1_SPEC_PCI_RD;
-
- early_write_config_dword(hose, 0, PCI_DEVFN(0,0),
- MPC10X_CFG_PICR1_REG, picr1);
- }
-
- /*
- * 8241/8245 erratum 28: PCI reads from local memory may return
- * stale data. Workaround by setting PICR2[0] to disable copyback
- * optimization. Oddly, the latest available user manual for the
- * 8245 (Rev 2., dated 10/2003) says PICR2[0] is reserverd.
- */
- if (host_bridge == MPC10X_BRIDGE_8245) {
- u32 picr2;
-
- early_read_config_dword(hose, 0, PCI_DEVFN(0,0),
- MPC10X_CFG_PICR2_REG, &picr2);
-
- picr2 |= MPC10X_CFG_PICR2_COPYBACK_OPT;
-
- early_write_config_dword(hose, 0, PCI_DEVFN(0,0),
- MPC10X_CFG_PICR2_REG, picr2);
- }
-
- if (ppc_md.progress) ppc_md.progress("mpc10x:exit", 0x100);
- return 0;
-}
-
-/*
- * Need to make our own PCI config space access macros because
- * mpc10x_get_mem_size() is called before the data structures are set up for
- * the 'early_xxx' and 'indirect_xxx' routines to work.
- * Assumes bus 0.
- */
-#define MPC10X_CFG_read(val, addr, type, op) *val = op((type)(addr))
-#define MPC10X_CFG_write(val, addr, type, op) op((type *)(addr), (val))
-
-#define MPC10X_PCI_OP(rw, size, type, op, mask) \
-static void \
-mpc10x_##rw##_config_##size(uint *cfg_addr, uint *cfg_data, int devfn, int offset, type val) \
-{ \
- out_be32(cfg_addr, \
- ((offset & 0xfc) << 24) | (devfn << 16) \
- | (0 << 8) | 0x80); \
- MPC10X_CFG_##rw(val, cfg_data + (offset & mask), type, op); \
- return; \
-}
-
-MPC10X_PCI_OP(read, byte, u8 *, in_8, 3)
-MPC10X_PCI_OP(read, dword, u32 *, in_le32, 0)
-#if 0 /* Not used */
-MPC10X_PCI_OP(write, byte, u8, out_8, 3)
-MPC10X_PCI_OP(read, word, u16 *, in_le16, 2)
-MPC10X_PCI_OP(write, word, u16, out_le16, 2)
-MPC10X_PCI_OP(write, dword, u32, out_le32, 0)
-#endif
-
-/*
- * Read the memory controller registers to determine the amount of memory in
- * the system. This assumes that the firmware has correctly set up the memory
- * controller registers.
- */
-unsigned long __init
-mpc10x_get_mem_size(uint mem_map)
-{
- uint *config_addr, *config_data, val;
- ulong start, end, total, offset;
- int i;
- u_char bank_enables;
-
- switch (mem_map) {
- case MPC10X_MEM_MAP_A:
- config_addr = (uint *)MPC10X_MAPA_CNFG_ADDR;
- config_data = (uint *)MPC10X_MAPA_CNFG_DATA;
- break;
- case MPC10X_MEM_MAP_B:
- config_addr = (uint *)MPC10X_MAPB_CNFG_ADDR;
- config_data = (uint *)MPC10X_MAPB_CNFG_DATA;
- break;
- default:
- return 0;
- }
-
- mpc10x_read_config_byte(config_addr,
- config_data,
- PCI_DEVFN(0,0),
- MPC10X_MCTLR_MEM_BANK_ENABLES,
- &bank_enables);
-
- total = 0;
-
- for (i=0; i<8; i++) {
- if (bank_enables & (1 << i)) {
- offset = MPC10X_MCTLR_MEM_START_1 + ((i > 3) ? 4 : 0);
- mpc10x_read_config_dword(config_addr,
- config_data,
- PCI_DEVFN(0,0),
- offset,
- &val);
- start = (val >> ((i & 3) << 3)) & 0xff;
-
- offset = MPC10X_MCTLR_EXT_MEM_START_1 + ((i>3) ? 4 : 0);
- mpc10x_read_config_dword(config_addr,
- config_data,
- PCI_DEVFN(0,0),
- offset,
- &val);
- val = (val >> ((i & 3) << 3)) & 0x03;
- start = (val << 28) | (start << 20);
-
- offset = MPC10X_MCTLR_MEM_END_1 + ((i > 3) ? 4 : 0);
- mpc10x_read_config_dword(config_addr,
- config_data,
- PCI_DEVFN(0,0),
- offset,
- &val);
- end = (val >> ((i & 3) << 3)) & 0xff;
-
- offset = MPC10X_MCTLR_EXT_MEM_END_1 + ((i > 3) ? 4 : 0);
- mpc10x_read_config_dword(config_addr,
- config_data,
- PCI_DEVFN(0,0),
- offset,
- &val);
- val = (val >> ((i & 3) << 3)) & 0x03;
- end = (val << 28) | (end << 20) | 0xfffff;
-
- total += (end - start + 1);
- }
- }
-
- return total;
-}
-
-int __init
-mpc10x_enable_store_gathering(struct pci_controller *hose)
-{
- uint picr1;
-
- early_read_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_PICR1_REG,
- &picr1);
-
- picr1 |= MPC10X_CFG_PICR1_ST_GATH_EN;
-
- early_write_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_PICR1_REG,
- picr1);
-
- return 0;
-}
-
-int __init
-mpc10x_disable_store_gathering(struct pci_controller *hose)
-{
- uint picr1;
-
- early_read_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_PICR1_REG,
- &picr1);
-
- picr1 &= ~MPC10X_CFG_PICR1_ST_GATH_EN;
-
- early_write_config_dword(hose,
- 0,
- PCI_DEVFN(0,0),
- MPC10X_CFG_PICR1_REG,
- picr1);
-
- return 0;
-}
-
-#ifdef CONFIG_MPC10X_OPENPIC
-void __init mpc10x_set_openpic(void)
-{
- /* Map external IRQs */
- openpic_set_sources(0, EPIC_IRQ_BASE, OpenPIC_Addr + 0x10200);
- /* Skip reserved space and map i2c and DMA Ch[01] */
- openpic_set_sources(EPIC_IRQ_BASE, 3, OpenPIC_Addr + 0x11020);
- /* Skip reserved space and map Message Unit Interrupt (I2O) */
- openpic_set_sources(EPIC_IRQ_BASE + 3, 1, OpenPIC_Addr + 0x110C0);
- /* Skip reserved space and map Serial Interrupts */
- openpic_set_sources(EPIC_IRQ_BASE + 4, 2, OpenPIC_Addr + 0x11120);
-
- openpic_init(NUM_8259_INTERRUPTS);
-}
-#endif
diff --git a/arch/ppc/syslib/mpc52xx_devices.c b/arch/ppc/syslib/mpc52xx_devices.c
deleted file mode 100644
index 7487539..0000000
--- a/arch/ppc/syslib/mpc52xx_devices.c
+++ /dev/null
@@ -1,317 +0,0 @@
-/*
- * Freescale MPC52xx device descriptions
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Copyright (C) 2005 Sylvain Munaut <tnt@246tNt.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/fsl_devices.h>
-#include <linux/resource.h>
-#include <linux/platform_device.h>
-#include <asm/mpc52xx.h>
-#include <asm/ppc_sys.h>
-
-
-static u64 mpc52xx_dma_mask = 0xffffffffULL;
-
-static struct fsl_i2c_platform_data mpc52xx_fsl_i2c_pdata = {
- .device_flags = FSL_I2C_DEV_CLOCK_5200,
-};
-
-
-/* We use relative offsets for IORESOURCE_MEM to be independent from the
- * MBAR location at compile time
- */
-
-/* TODO Add the BestComm initiator channel to the device definitions,
- possibly using IORESOURCE_DMA. But that's when BestComm is ready ... */
-
-struct platform_device ppc_sys_platform_devices[] = {
- [MPC52xx_MSCAN1] = {
- .name = "mpc52xx-mscan",
- .id = 0,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x0900,
- .end = 0x097f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_MSCAN1_IRQ,
- .end = MPC52xx_MSCAN1_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_MSCAN2] = {
- .name = "mpc52xx-mscan",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x0980,
- .end = 0x09ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_MSCAN2_IRQ,
- .end = MPC52xx_MSCAN2_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_SPI] = {
- .name = "mpc52xx-spi",
- .id = -1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .start = 0x0f00,
- .end = 0x0f1f,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "modf",
- .start = MPC52xx_SPI_MODF_IRQ,
- .end = MPC52xx_SPI_MODF_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = "spif",
- .start = MPC52xx_SPI_SPIF_IRQ,
- .end = MPC52xx_SPI_SPIF_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_USB] = {
- .name = "ppc-soc-ohci",
- .id = -1,
- .num_resources = 2,
- .dev.dma_mask = &mpc52xx_dma_mask,
- .dev.coherent_dma_mask = 0xffffffffULL,
- .resource = (struct resource[]) {
- {
- .start = 0x1000,
- .end = 0x10ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_USB_IRQ,
- .end = MPC52xx_USB_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_BDLC] = {
- .name = "mpc52xx-bdlc",
- .id = -1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x1300,
- .end = 0x130f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_BDLC_IRQ,
- .end = MPC52xx_BDLC_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_PSC1] = {
- .name = "mpc52xx-psc",
- .id = 0,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x2000,
- .end = 0x209f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_PSC1_IRQ,
- .end = MPC52xx_PSC1_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_PSC2] = {
- .name = "mpc52xx-psc",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x2200,
- .end = 0x229f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_PSC2_IRQ,
- .end = MPC52xx_PSC2_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_PSC3] = {
- .name = "mpc52xx-psc",
- .id = 2,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x2400,
- .end = 0x249f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_PSC3_IRQ,
- .end = MPC52xx_PSC3_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_PSC4] = {
- .name = "mpc52xx-psc",
- .id = 3,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x2600,
- .end = 0x269f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_PSC4_IRQ,
- .end = MPC52xx_PSC4_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_PSC5] = {
- .name = "mpc52xx-psc",
- .id = 4,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x2800,
- .end = 0x289f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_PSC5_IRQ,
- .end = MPC52xx_PSC5_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_PSC6] = {
- .name = "mpc52xx-psc",
- .id = 5,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x2c00,
- .end = 0x2c9f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_PSC6_IRQ,
- .end = MPC52xx_PSC6_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_FEC] = {
- .name = "mpc52xx-fec",
- .id = -1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x3000,
- .end = 0x33ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_FEC_IRQ,
- .end = MPC52xx_FEC_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_ATA] = {
- .name = "mpc52xx-ata",
- .id = -1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x3a00,
- .end = 0x3aff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_ATA_IRQ,
- .end = MPC52xx_ATA_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_I2C1] = {
- .name = "fsl-i2c",
- .id = 0,
- .dev.platform_data = &mpc52xx_fsl_i2c_pdata,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x3d00,
- .end = 0x3d1f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_I2C1_IRQ,
- .end = MPC52xx_I2C1_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC52xx_I2C2] = {
- .name = "fsl-i2c",
- .id = 1,
- .dev.platform_data = &mpc52xx_fsl_i2c_pdata,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .start = 0x3d40,
- .end = 0x3d5f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = MPC52xx_I2C2_IRQ,
- .end = MPC52xx_I2C2_IRQ,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
-};
-
-
-static int __init mach_mpc52xx_fixup(struct platform_device *pdev)
-{
- ppc_sys_fixup_mem_resource(pdev, MPC52xx_MBAR);
- return 0;
-}
-
-static int __init mach_mpc52xx_init(void)
-{
- ppc_sys_device_fixup = mach_mpc52xx_fixup;
- return 0;
-}
-
-postcore_initcall(mach_mpc52xx_init);
diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
deleted file mode 100644
index 20a0eac..0000000
--- a/arch/ppc/syslib/mpc52xx_pci.c
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- * PCI code for the Freescale MPC52xx embedded CPU.
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-
-#include <asm/pci.h>
-
-#include <asm/mpc52xx.h>
-#include "mpc52xx_pci.h"
-
-#include <asm/delay.h>
-#include <asm/machdep.h>
-
-
-/* This macro is defined to activate the workaround for the bug
- 435 of the MPC5200 (L25R). With it activated, we don't do any
- 32 bits configuration access during type-1 cycles */
-#define MPC5200_BUG_435_WORKAROUND
-
-
-static int
-mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn,
- int offset, int len, u32 *val)
-{
- struct pci_controller *hose = bus->sysdata;
- u32 value;
-
- if (ppc_md.pci_exclude_device)
- if (ppc_md.pci_exclude_device(bus->number, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- out_be32(hose->cfg_addr,
- (1 << 31) |
- ((bus->number - hose->bus_offset) << 16) |
- (devfn << 8) |
- (offset & 0xfc));
- mb();
-
-#ifdef MPC5200_BUG_435_WORKAROUND
- if (bus->number != hose->bus_offset) {
- switch (len) {
- case 1:
- value = in_8(((u8 __iomem *)hose->cfg_data) + (offset & 3));
- break;
- case 2:
- value = in_le16(((u16 __iomem *)hose->cfg_data) + ((offset>>1) & 1));
- break;
-
- default:
- value = in_le16((u16 __iomem *)hose->cfg_data) |
- (in_le16(((u16 __iomem *)hose->cfg_data) + 1) << 16);
- break;
- }
- }
- else
-#endif
- {
- value = in_le32(hose->cfg_data);
-
- if (len != 4) {
- value >>= ((offset & 0x3) << 3);
- value &= 0xffffffff >> (32 - (len << 3));
- }
- }
-
- *val = value;
-
- out_be32(hose->cfg_addr, 0);
- mb();
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn,
- int offset, int len, u32 val)
-{
- struct pci_controller *hose = bus->sysdata;
- u32 value, mask;
-
- if (ppc_md.pci_exclude_device)
- if (ppc_md.pci_exclude_device(bus->number, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- out_be32(hose->cfg_addr,
- (1 << 31) |
- ((bus->number - hose->bus_offset) << 16) |
- (devfn << 8) |
- (offset & 0xfc));
- mb();
-
-#ifdef MPC5200_BUG_435_WORKAROUND
- if (bus->number != hose->bus_offset) {
- switch (len) {
- case 1:
- out_8(((u8 __iomem *)hose->cfg_data) +
- (offset & 3), val);
- break;
- case 2:
- out_le16(((u16 __iomem *)hose->cfg_data) +
- ((offset>>1) & 1), val);
- break;
-
- default:
- out_le16((u16 __iomem *)hose->cfg_data,
- (u16)val);
- out_le16(((u16 __iomem *)hose->cfg_data) + 1,
- (u16)(val>>16));
- break;
- }
- }
- else
-#endif
- {
- if (len != 4) {
- value = in_le32(hose->cfg_data);
-
- offset = (offset & 0x3) << 3;
- mask = (0xffffffff >> (32 - (len << 3)));
- mask <<= offset;
-
- value &= ~mask;
- val = value | ((val << offset) & mask);
- }
-
- out_le32(hose->cfg_data, val);
- }
- mb();
-
- out_be32(hose->cfg_addr, 0);
- mb();
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops mpc52xx_pci_ops = {
- .read = mpc52xx_pci_read_config,
- .write = mpc52xx_pci_write_config
-};
-
-
-static void __init
-mpc52xx_pci_setup(struct mpc52xx_pci __iomem *pci_regs)
-{
- u32 tmp;
-
- /* Setup control regs */
- tmp = in_be32(&pci_regs->scr);
- tmp |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- out_be32(&pci_regs->scr, tmp);
-
- /* Setup windows */
- out_be32(&pci_regs->iw0btar, MPC52xx_PCI_IWBTAR_TRANSLATION(
- MPC52xx_PCI_MEM_START + MPC52xx_PCI_MEM_OFFSET,
- MPC52xx_PCI_MEM_START,
- MPC52xx_PCI_MEM_SIZE ));
-
- out_be32(&pci_regs->iw1btar, MPC52xx_PCI_IWBTAR_TRANSLATION(
- MPC52xx_PCI_MMIO_START + MPC52xx_PCI_MEM_OFFSET,
- MPC52xx_PCI_MMIO_START,
- MPC52xx_PCI_MMIO_SIZE ));
-
- out_be32(&pci_regs->iw2btar, MPC52xx_PCI_IWBTAR_TRANSLATION(
- MPC52xx_PCI_IO_BASE,
- MPC52xx_PCI_IO_START,
- MPC52xx_PCI_IO_SIZE ));
-
- out_be32(&pci_regs->iwcr, MPC52xx_PCI_IWCR_PACK(
- ( MPC52xx_PCI_IWCR_ENABLE | /* iw0btar */
- MPC52xx_PCI_IWCR_READ_MULTI |
- MPC52xx_PCI_IWCR_MEM ),
- ( MPC52xx_PCI_IWCR_ENABLE | /* iw1btar */
- MPC52xx_PCI_IWCR_READ |
- MPC52xx_PCI_IWCR_MEM ),
- ( MPC52xx_PCI_IWCR_ENABLE | /* iw2btar */
- MPC52xx_PCI_IWCR_IO )
- ));
-
-
- out_be32(&pci_regs->tbatr0,
- MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_IO );
- out_be32(&pci_regs->tbatr1,
- MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM );
-
- out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD);
-
- /* Reset the exteral bus ( internal PCI controller is NOT resetted ) */
- /* Not necessary and can be a bad thing if for example the bootloader
- is displaying a splash screen or ... Just left here for
- documentation purpose if anyone need it */
- tmp = in_be32(&pci_regs->gscr);
-#if 0
- out_be32(&pci_regs->gscr, tmp | MPC52xx_PCI_GSCR_PR);
- udelay(50);
-#endif
- out_be32(&pci_regs->gscr, tmp & ~MPC52xx_PCI_GSCR_PR);
-}
-
-static void
-mpc52xx_pci_fixup_resources(struct pci_dev *dev)
-{
- int i;
-
- /* We don't rely on boot loader for PCI and resets all
- devices */
- for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
- struct resource *res = &dev->resource[i];
- if (res->end > res->start) { /* Only valid resources */
- res->end -= res->start;
- res->start = 0;
- res->flags |= IORESOURCE_UNSET;
- }
- }
-
- /* The PCI Host bridge of MPC52xx has a prefetch memory resource
- fixed to 1Gb. Doesn't fit in the resource system so we remove it */
- if ( (dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
- ( dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200
- || dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200B) ) {
- struct resource *res = &dev->resource[1];
- res->start = res->end = res->flags = 0;
- }
-}
-
-void __init
-mpc52xx_find_bridges(void)
-{
- struct mpc52xx_pci __iomem *pci_regs;
- struct pci_controller *hose;
-
- pci_assign_all_buses = 1;
-
- pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE);
- if (!pci_regs)
- return;
-
- hose = pcibios_alloc_controller();
- if (!hose) {
- iounmap(pci_regs);
- return;
- }
-
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pcibios_fixup_resources = mpc52xx_pci_fixup_resources;
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
- hose->bus_offset = 0;
- hose->ops = &mpc52xx_pci_ops;
-
- mpc52xx_pci_setup(pci_regs);
-
- hose->pci_mem_offset = MPC52xx_PCI_MEM_OFFSET;
-
- hose->io_base_virt = ioremap(MPC52xx_PCI_IO_BASE, MPC52xx_PCI_IO_SIZE);
- isa_io_base = (unsigned long) hose->io_base_virt;
-
- hose->cfg_addr = &pci_regs->car;
- hose->cfg_data = hose->io_base_virt;
-
- /* Setup resources */
- pci_init_resource(&hose->mem_resources[0],
- MPC52xx_PCI_MEM_START,
- MPC52xx_PCI_MEM_STOP,
- IORESOURCE_MEM|IORESOURCE_PREFETCH,
- "PCI prefetchable memory");
-
- pci_init_resource(&hose->mem_resources[1],
- MPC52xx_PCI_MMIO_START,
- MPC52xx_PCI_MMIO_STOP,
- IORESOURCE_MEM,
- "PCI memory");
-
- pci_init_resource(&hose->io_resource,
- MPC52xx_PCI_IO_START,
- MPC52xx_PCI_IO_STOP,
- IORESOURCE_IO,
- "PCI I/O");
-
-}
diff --git a/arch/ppc/syslib/mpc52xx_pci.h b/arch/ppc/syslib/mpc52xx_pci.h
deleted file mode 100644
index 77d47db..0000000
--- a/arch/ppc/syslib/mpc52xx_pci.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * PCI Include file the Freescale MPC52xx embedded cpu chips
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Inspired from code written by Dale Farnsworth <dfarnsworth@mvista.com>
- * for the 2.4 kernel.
- *
- * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
- * Copyright (C) 2003 MontaVista, Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifndef __SYSLIB_MPC52xx_PCI_H__
-#define __SYSLIB_MPC52xx_PCI_H__
-
-/* ======================================================================== */
-/* PCI windows config */
-/* ======================================================================== */
-
-/*
- * Master windows : MPC52xx -> PCI
- *
- * 0x80000000 -> 0x9FFFFFFF PCI Mem prefetchable IW0BTAR
- * 0xA0000000 -> 0xAFFFFFFF PCI Mem IW1BTAR
- * 0xB0000000 -> 0xB0FFFFFF PCI IO IW2BTAR
- *
- * Slave windows : PCI -> MPC52xx
- *
- * 0xF0000000 -> 0xF003FFFF MPC52xx MBAR TBATR0
- * 0x00000000 -> 0x3FFFFFFF MPC52xx local memory TBATR1
- */
-
-#define MPC52xx_PCI_MEM_OFFSET 0x00000000 /* Offset for MEM MMIO */
-
-#define MPC52xx_PCI_MEM_START 0x80000000
-#define MPC52xx_PCI_MEM_SIZE 0x20000000
-#define MPC52xx_PCI_MEM_STOP (MPC52xx_PCI_MEM_START+MPC52xx_PCI_MEM_SIZE-1)
-
-#define MPC52xx_PCI_MMIO_START 0xa0000000
-#define MPC52xx_PCI_MMIO_SIZE 0x10000000
-#define MPC52xx_PCI_MMIO_STOP (MPC52xx_PCI_MMIO_START+MPC52xx_PCI_MMIO_SIZE-1)
-
-#define MPC52xx_PCI_IO_BASE 0xb0000000
-
-#define MPC52xx_PCI_IO_START 0x00000000
-#define MPC52xx_PCI_IO_SIZE 0x01000000
-#define MPC52xx_PCI_IO_STOP (MPC52xx_PCI_IO_START+MPC52xx_PCI_IO_SIZE-1)
-
-
-#define MPC52xx_PCI_TARGET_IO MPC52xx_MBAR
-#define MPC52xx_PCI_TARGET_MEM 0x00000000
-
-
-/* ======================================================================== */
-/* Structures mapping & Defines for PCI Unit */
-/* ======================================================================== */
-
-#define MPC52xx_PCI_GSCR_BM 0x40000000
-#define MPC52xx_PCI_GSCR_PE 0x20000000
-#define MPC52xx_PCI_GSCR_SE 0x10000000
-#define MPC52xx_PCI_GSCR_XLB2PCI_MASK 0x07000000
-#define MPC52xx_PCI_GSCR_XLB2PCI_SHIFT 24
-#define MPC52xx_PCI_GSCR_IPG2PCI_MASK 0x00070000
-#define MPC52xx_PCI_GSCR_IPG2PCI_SHIFT 16
-#define MPC52xx_PCI_GSCR_BME 0x00004000
-#define MPC52xx_PCI_GSCR_PEE 0x00002000
-#define MPC52xx_PCI_GSCR_SEE 0x00001000
-#define MPC52xx_PCI_GSCR_PR 0x00000001
-
-
-#define MPC52xx_PCI_IWBTAR_TRANSLATION(proc_ad,pci_ad,size) \
- ( ( (proc_ad) & 0xff000000 ) | \
- ( (((size) - 1) >> 8) & 0x00ff0000 ) | \
- ( ((pci_ad) >> 16) & 0x0000ff00 ) )
-
-#define MPC52xx_PCI_IWCR_PACK(win0,win1,win2) (((win0) << 24) | \
- ((win1) << 16) | \
- ((win2) << 8))
-
-#define MPC52xx_PCI_IWCR_DISABLE 0x0
-#define MPC52xx_PCI_IWCR_ENABLE 0x1
-#define MPC52xx_PCI_IWCR_READ 0x0
-#define MPC52xx_PCI_IWCR_READ_LINE 0x2
-#define MPC52xx_PCI_IWCR_READ_MULTI 0x4
-#define MPC52xx_PCI_IWCR_MEM 0x0
-#define MPC52xx_PCI_IWCR_IO 0x8
-
-#define MPC52xx_PCI_TCR_P 0x01000000
-#define MPC52xx_PCI_TCR_LD 0x00010000
-
-#define MPC52xx_PCI_TBATR_DISABLE 0x0
-#define MPC52xx_PCI_TBATR_ENABLE 0x1
-
-
-#ifndef __ASSEMBLY__
-
-struct mpc52xx_pci {
- u32 idr; /* PCI + 0x00 */
- u32 scr; /* PCI + 0x04 */
- u32 ccrir; /* PCI + 0x08 */
- u32 cr1; /* PCI + 0x0C */
- u32 bar0; /* PCI + 0x10 */
- u32 bar1; /* PCI + 0x14 */
- u8 reserved1[16]; /* PCI + 0x18 */
- u32 ccpr; /* PCI + 0x28 */
- u32 sid; /* PCI + 0x2C */
- u32 erbar; /* PCI + 0x30 */
- u32 cpr; /* PCI + 0x34 */
- u8 reserved2[4]; /* PCI + 0x38 */
- u32 cr2; /* PCI + 0x3C */
- u8 reserved3[32]; /* PCI + 0x40 */
- u32 gscr; /* PCI + 0x60 */
- u32 tbatr0; /* PCI + 0x64 */
- u32 tbatr1; /* PCI + 0x68 */
- u32 tcr; /* PCI + 0x6C */
- u32 iw0btar; /* PCI + 0x70 */
- u32 iw1btar; /* PCI + 0x74 */
- u32 iw2btar; /* PCI + 0x78 */
- u8 reserved4[4]; /* PCI + 0x7C */
- u32 iwcr; /* PCI + 0x80 */
- u32 icr; /* PCI + 0x84 */
- u32 isr; /* PCI + 0x88 */
- u32 arb; /* PCI + 0x8C */
- u8 reserved5[104]; /* PCI + 0x90 */
- u32 car; /* PCI + 0xF8 */
- u8 reserved6[4]; /* PCI + 0xFC */
-};
-
-#endif /* __ASSEMBLY__ */
-
-
-#endif /* __SYSLIB_MPC52xx_PCI_H__ */
diff --git a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c
deleted file mode 100644
index f58149c..0000000
--- a/arch/ppc/syslib/mpc52xx_pic.c
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- * Programmable Interrupt Controller functions for the Freescale MPC52xx
- * embedded CPU.
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Based on (well, mostly copied from) the code from the 2.4 kernel by
- * Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg.
- *
- * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
- * Copyright (C) 2003 Montavista Software, Inc
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <asm/mpc52xx.h>
-
-
-static struct mpc52xx_intr __iomem *intr;
-static struct mpc52xx_sdma __iomem *sdma;
-
-static void
-mpc52xx_ic_disable(unsigned int irq)
-{
- u32 val;
-
- if (irq == MPC52xx_IRQ0) {
- val = in_be32(&intr->ctrl);
- val &= ~(1 << 11);
- out_be32(&intr->ctrl, val);
- }
- else if (irq < MPC52xx_IRQ1) {
- BUG();
- }
- else if (irq <= MPC52xx_IRQ3) {
- val = in_be32(&intr->ctrl);
- val &= ~(1 << (10 - (irq - MPC52xx_IRQ1)));
- out_be32(&intr->ctrl, val);
- }
- else if (irq < MPC52xx_SDMA_IRQ_BASE) {
- val = in_be32(&intr->main_mask);
- val |= 1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE));
- out_be32(&intr->main_mask, val);
- }
- else if (irq < MPC52xx_PERP_IRQ_BASE) {
- val = in_be32(&sdma->IntMask);
- val |= 1 << (irq - MPC52xx_SDMA_IRQ_BASE);
- out_be32(&sdma->IntMask, val);
- }
- else {
- val = in_be32(&intr->per_mask);
- val |= 1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE));
- out_be32(&intr->per_mask, val);
- }
-}
-
-static void
-mpc52xx_ic_enable(unsigned int irq)
-{
- u32 val;
-
- if (irq == MPC52xx_IRQ0) {
- val = in_be32(&intr->ctrl);
- val |= 1 << 11;
- out_be32(&intr->ctrl, val);
- }
- else if (irq < MPC52xx_IRQ1) {
- BUG();
- }
- else if (irq <= MPC52xx_IRQ3) {
- val = in_be32(&intr->ctrl);
- val |= 1 << (10 - (irq - MPC52xx_IRQ1));
- out_be32(&intr->ctrl, val);
- }
- else if (irq < MPC52xx_SDMA_IRQ_BASE) {
- val = in_be32(&intr->main_mask);
- val &= ~(1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE)));
- out_be32(&intr->main_mask, val);
- }
- else if (irq < MPC52xx_PERP_IRQ_BASE) {
- val = in_be32(&sdma->IntMask);
- val &= ~(1 << (irq - MPC52xx_SDMA_IRQ_BASE));
- out_be32(&sdma->IntMask, val);
- }
- else {
- val = in_be32(&intr->per_mask);
- val &= ~(1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE)));
- out_be32(&intr->per_mask, val);
- }
-}
-
-static void
-mpc52xx_ic_ack(unsigned int irq)
-{
- u32 val;
-
- /*
- * Only some irqs are reset here, others in interrupting hardware.
- */
-
- switch (irq) {
- case MPC52xx_IRQ0:
- val = in_be32(&intr->ctrl);
- val |= 0x08000000;
- out_be32(&intr->ctrl, val);
- break;
- case MPC52xx_CCS_IRQ:
- val = in_be32(&intr->enc_status);
- val |= 0x00000400;
- out_be32(&intr->enc_status, val);
- break;
- case MPC52xx_IRQ1:
- val = in_be32(&intr->ctrl);
- val |= 0x04000000;
- out_be32(&intr->ctrl, val);
- break;
- case MPC52xx_IRQ2:
- val = in_be32(&intr->ctrl);
- val |= 0x02000000;
- out_be32(&intr->ctrl, val);
- break;
- case MPC52xx_IRQ3:
- val = in_be32(&intr->ctrl);
- val |= 0x01000000;
- out_be32(&intr->ctrl, val);
- break;
- default:
- if (irq >= MPC52xx_SDMA_IRQ_BASE
- && irq < (MPC52xx_SDMA_IRQ_BASE + MPC52xx_SDMA_IRQ_NUM)) {
- out_be32(&sdma->IntPend,
- 1 << (irq - MPC52xx_SDMA_IRQ_BASE));
- }
- break;
- }
-}
-
-static void
-mpc52xx_ic_disable_and_ack(unsigned int irq)
-{
- mpc52xx_ic_disable(irq);
- mpc52xx_ic_ack(irq);
-}
-
-static void
-mpc52xx_ic_end(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- mpc52xx_ic_enable(irq);
-}
-
-static struct hw_interrupt_type mpc52xx_ic = {
- .typename = " MPC52xx ",
- .enable = mpc52xx_ic_enable,
- .disable = mpc52xx_ic_disable,
- .ack = mpc52xx_ic_disable_and_ack,
- .end = mpc52xx_ic_end,
-};
-
-void __init
-mpc52xx_init_irq(void)
-{
- int i;
- u32 intr_ctrl;
-
- /* Remap the necessary zones */
- intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
- sdma = ioremap(MPC52xx_PA(MPC52xx_SDMA_OFFSET), MPC52xx_SDMA_SIZE);
-
- if ((intr==NULL) || (sdma==NULL))
- panic("Can't ioremap PIC/SDMA register for init_irq !");
-
- /* Disable all interrupt sources. */
- out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */
- out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
- out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */
- out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */
- intr_ctrl = in_be32(&intr->ctrl);
- intr_ctrl &= 0x00ff0000; /* Keeps IRQ[0-3] config */
- intr_ctrl |= 0x0f000000 | /* clear IRQ 0-3 */
- 0x00001000 | /* MEE master external enable */
- 0x00000000 | /* 0 means disable IRQ 0-3 */
- 0x00000001; /* CEb route critical normally */
- out_be32(&intr->ctrl, intr_ctrl);
-
- /* Zero a bunch of the priority settings. */
- out_be32(&intr->per_pri1, 0);
- out_be32(&intr->per_pri2, 0);
- out_be32(&intr->per_pri3, 0);
- out_be32(&intr->main_pri1, 0);
- out_be32(&intr->main_pri2, 0);
-
- /* Initialize irq_desc[i].chip's with mpc52xx_ic. */
- for (i = 0; i < NR_IRQS; i++) {
- irq_desc[i].chip = &mpc52xx_ic;
- irq_desc[i].status = IRQ_LEVEL;
- }
-
- #define IRQn_MODE(intr_ctrl,irq) (((intr_ctrl) >> (22-(i<<1))) & 0x03)
- for (i=0 ; i<4 ; i++) {
- int mode;
- mode = IRQn_MODE(intr_ctrl,i);
- if ((mode == 0x1) || (mode == 0x2))
- irq_desc[i?MPC52xx_IRQ1+i-1:MPC52xx_IRQ0].status = 0;
- }
-}
-
-int
-mpc52xx_get_irq(void)
-{
- u32 status;
- int irq = -1;
-
- status = in_be32(&intr->enc_status);
-
- if (status & 0x00000400) { /* critical */
- irq = (status >> 8) & 0x3;
- if (irq == 2) /* high priority peripheral */
- goto peripheral;
- irq += MPC52xx_CRIT_IRQ_BASE;
- }
- else if (status & 0x00200000) { /* main */
- irq = (status >> 16) & 0x1f;
- if (irq == 4) /* low priority peripheral */
- goto peripheral;
- irq += MPC52xx_MAIN_IRQ_BASE;
- }
- else if (status & 0x20000000) { /* peripheral */
-peripheral:
- irq = (status >> 24) & 0x1f;
- if (irq == 0) { /* bestcomm */
- status = in_be32(&sdma->IntPend);
- irq = ffs(status) + MPC52xx_SDMA_IRQ_BASE-1;
- }
- else
- irq += MPC52xx_PERP_IRQ_BASE;
- }
-
- return irq;
-}
-
diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c
deleted file mode 100644
index ab0cf4ce..0000000
--- a/arch/ppc/syslib/mpc52xx_setup.c
+++ /dev/null
@@ -1,313 +0,0 @@
-/*
- * Common code for the boards based on Freescale MPC52xx embedded CPU.
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Support for other bootloaders than UBoot by Dale Farnsworth
- * <dfarnsworth@mvista.com>
- *
- * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
- * Copyright (C) 2003 Montavista Software, Inc
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-
-#include <linux/spinlock.h>
-#include <asm/io.h>
-#include <asm/time.h>
-#include <asm/mpc52xx.h>
-#include <asm/mpc52xx_psc.h>
-#include <asm/pgtable.h>
-#include <asm/ppcboot.h>
-
-#include <syslib/mpc52xx_pci.h>
-
-extern bd_t __res;
-
-static int core_mult[] = { /* CPU Frequency multiplier, taken */
- 0, 0, 0, 10, 20, 20, 25, 45, /* from the datasheet used to compute */
- 30, 55, 40, 50, 0, 60, 35, 0, /* CPU frequency from XLB freq and */
- 30, 25, 65, 10, 70, 20, 75, 45, /* external jumper config */
- 0, 55, 40, 50, 80, 60, 35, 0
-};
-
-void
-mpc52xx_restart(char *cmd)
-{
- struct mpc52xx_gpt __iomem *gpt0 = MPC52xx_VA(MPC52xx_GPTx_OFFSET(0));
-
- local_irq_disable();
-
- /* Turn on the watchdog and wait for it to expire. It effectively
- does a reset */
- out_be32(&gpt0->count, 0x000000ff);
- out_be32(&gpt0->mode, 0x00009004);
-
- while (1);
-}
-
-void
-mpc52xx_halt(void)
-{
- local_irq_disable();
-
- while (1);
-}
-
-void
-mpc52xx_power_off(void)
-{
- /* By default we don't have any way of shut down.
- If a specific board wants to, it can set the power down
- code to any hardware implementation dependent code */
- mpc52xx_halt();
-}
-
-
-void __init
-mpc52xx_set_bat(void)
-{
- /* Set BAT 2 to map the 0xf0000000 area */
- /* This mapping is used during mpc52xx_progress,
- * mpc52xx_find_end_of_memory, and UARTs/GPIO access for debug
- */
- mb();
- mtspr(SPRN_DBAT2U, 0xf0001ffe);
- mtspr(SPRN_DBAT2L, 0xf000002a);
- mb();
-}
-
-void __init
-mpc52xx_map_io(void)
-{
- /* Here we map the MBAR and the whole upper zone. MBAR is only
- 64k but we can't map only 64k with BATs. Map the whole
- 0xf0000000 range is ok and helps eventual lpb devices placed there */
- io_block_mapping(
- MPC52xx_MBAR_VIRT, MPC52xx_MBAR, 0x10000000, _PAGE_IO);
-}
-
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
-#ifndef MPC52xx_PF_CONSOLE_PORT
-#error "mpc52xx PSC for console not selected"
-#endif
-
-static void
-mpc52xx_psc_putc(struct mpc52xx_psc __iomem *psc, unsigned char c)
-{
- while (!(in_be16(&psc->mpc52xx_psc_status) &
- MPC52xx_PSC_SR_TXRDY));
- out_8(&psc->mpc52xx_psc_buffer_8, c);
-}
-
-void
-mpc52xx_progress(char *s, unsigned short hex)
-{
- char c;
- struct mpc52xx_psc __iomem *psc;
-
- psc = MPC52xx_VA(MPC52xx_PSCx_OFFSET(MPC52xx_PF_CONSOLE_PORT));
-
- while ((c = *s++) != 0) {
- if (c == '\n')
- mpc52xx_psc_putc(psc, '\r');
- mpc52xx_psc_putc(psc, c);
- }
-
- mpc52xx_psc_putc(psc, '\r');
- mpc52xx_psc_putc(psc, '\n');
-}
-
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-
-
-unsigned long __init
-mpc52xx_find_end_of_memory(void)
-{
- u32 ramsize = __res.bi_memsize;
-
- /*
- * if bootloader passed a memsize, just use it
- * else get size from sdram config registers
- */
- if (ramsize == 0) {
- struct mpc52xx_mmap_ctl __iomem *mmap_ctl;
- u32 sdram_config_0, sdram_config_1;
-
- /* Temp BAT2 mapping active when this is called ! */
- mmap_ctl = MPC52xx_VA(MPC52xx_MMAP_CTL_OFFSET);
-
- sdram_config_0 = in_be32(&mmap_ctl->sdram0);
- sdram_config_1 = in_be32(&mmap_ctl->sdram1);
-
- if ((sdram_config_0 & 0x1f) >= 0x13)
- ramsize = 1 << ((sdram_config_0 & 0xf) + 17);
-
- if (((sdram_config_1 & 0x1f) >= 0x13) &&
- ((sdram_config_1 & 0xfff00000) == ramsize))
- ramsize += 1 << ((sdram_config_1 & 0xf) + 17);
- }
-
- return ramsize;
-}
-
-void __init
-mpc52xx_calibrate_decr(void)
-{
- int current_time, previous_time;
- int tbl_start, tbl_end;
- unsigned int xlbfreq, cpufreq, ipbfreq, pcifreq, divisor;
-
- xlbfreq = __res.bi_busfreq;
- /* if bootloader didn't pass bus frequencies, calculate them */
- if (xlbfreq == 0) {
- /* Get RTC & Clock manager modules */
- struct mpc52xx_rtc __iomem *rtc;
- struct mpc52xx_cdm __iomem *cdm;
-
- rtc = ioremap(MPC52xx_PA(MPC52xx_RTC_OFFSET), MPC52xx_RTC_SIZE);
- cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
-
- if ((rtc==NULL) || (cdm==NULL))
- panic("Can't ioremap RTC/CDM while computing bus freq");
-
- /* Count bus clock during 1/64 sec */
- out_be32(&rtc->dividers, 0x8f1f0000); /* Set RTC 64x faster */
- previous_time = in_be32(&rtc->time);
- while ((current_time = in_be32(&rtc->time)) == previous_time) ;
- tbl_start = get_tbl();
- previous_time = current_time;
- while ((current_time = in_be32(&rtc->time)) == previous_time) ;
- tbl_end = get_tbl();
- out_be32(&rtc->dividers, 0xffff0000); /* Restore RTC */
-
- /* Compute all frequency from that & CDM settings */
- xlbfreq = (tbl_end - tbl_start) << 8;
- cpufreq = (xlbfreq * core_mult[in_be32(&cdm->rstcfg)&0x1f])/10;
- ipbfreq = (in_8(&cdm->ipb_clk_sel) & 1) ?
- xlbfreq / 2 : xlbfreq;
- switch (in_8(&cdm->pci_clk_sel) & 3) {
- case 0:
- pcifreq = ipbfreq;
- break;
- case 1:
- pcifreq = ipbfreq / 2;
- break;
- default:
- pcifreq = xlbfreq / 4;
- break;
- }
- __res.bi_busfreq = xlbfreq;
- __res.bi_intfreq = cpufreq;
- __res.bi_ipbfreq = ipbfreq;
- __res.bi_pcifreq = pcifreq;
-
- /* Release mapping */
- iounmap(rtc);
- iounmap(cdm);
- }
-
- divisor = 4;
-
- tb_ticks_per_jiffy = xlbfreq / HZ / divisor;
- tb_to_us = mulhwu_scale_factor(xlbfreq / divisor, 1000000);
-}
-
-
-void __init
-mpc52xx_setup_cpu(void)
-{
- struct mpc52xx_cdm __iomem *cdm;
- struct mpc52xx_xlb __iomem *xlb;
-
- /* Map zones */
- cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
- xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
-
- if (!cdm || !xlb) {
- printk(KERN_ERR __FILE__ ": "
- "Error while mapping CDM/XLB during "
- "mpc52xx_setup_cpu\n");
- goto unmap_regs;
- }
-
- /* Use internal 48 Mhz */
- out_8(&cdm->ext_48mhz_en, 0x00);
- out_8(&cdm->fd_enable, 0x01);
- if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */
- out_be16(&cdm->fd_counters, 0x0001);
- else
- out_be16(&cdm->fd_counters, 0x5555);
-
- /* Configure the XLB Arbiter priorities */
- out_be32(&xlb->master_pri_enable, 0xff);
- out_be32(&xlb->master_priority, 0x11111111);
-
- /* Enable ram snooping for 1GB window */
- out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
- out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
-
- /* Disable XLB pipelining */
- /* (cfr errata 292. We could do this only just before ATA PIO
- transaction and re-enable it after ...) */
- out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
-
- /* Unmap reg zone */
-unmap_regs:
- if (cdm) iounmap(cdm);
- if (xlb) iounmap(xlb);
-}
-
-
-int mpc52xx_match_psc_function(int psc_idx, const char *func)
-{
- struct mpc52xx_psc_func *cf = mpc52xx_psc_functions;
-
- while ((cf->id != -1) && (cf->func != NULL)) {
- if ((cf->id == psc_idx) && !strcmp(cf->func,func))
- return 1;
- cf++;
- }
-
- return 0;
-}
-
-int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
-{
- static DEFINE_SPINLOCK(lock);
- struct mpc52xx_cdm __iomem *cdm;
- unsigned long flags;
- u16 mclken_div;
- u16 __iomem *reg;
- u32 mask;
-
- cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
- if (!cdm) {
- printk(KERN_ERR __FILE__ ": Error mapping CDM\n");
- return -ENODEV;
- }
-
- mclken_div = 0x8000 | (clkdiv & 0x1FF);
- switch (psc_id) {
- case 1: reg = &cdm->mclken_div_psc1; mask = 0x20; break;
- case 2: reg = &cdm->mclken_div_psc2; mask = 0x40; break;
- case 3: reg = &cdm->mclken_div_psc3; mask = 0x80; break;
- case 6: reg = &cdm->mclken_div_psc6; mask = 0x10; break;
- default:
- return -ENODEV;
- }
-
- /* Set the rate and enable the clock */
- spin_lock_irqsave(&lock, flags);
- out_be16(reg, mclken_div);
- out_be32(&cdm->clk_enables, in_be32(&cdm->clk_enables) | mask);
- spin_unlock_irqrestore(&lock, flags);
-
- iounmap(cdm);
- return 0;
-}
diff --git a/arch/ppc/syslib/mpc52xx_sys.c b/arch/ppc/syslib/mpc52xx_sys.c
deleted file mode 100644
index b4e6f97..0000000
--- a/arch/ppc/syslib/mpc52xx_sys.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Freescale MPC52xx system descriptions
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Copyright (C) 2005 Sylvain Munaut <tnt@246tNt.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <asm/ppc_sys.h>
-
-struct ppc_sys_spec *cur_ppc_sys_spec;
-struct ppc_sys_spec ppc_sys_specs[] = {
- {
- .ppc_sys_name = "5200",
- .mask = 0xffff0000,
- .value = 0x80110000,
- .num_devices = 15,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC52xx_MSCAN1, MPC52xx_MSCAN2, MPC52xx_SPI,
- MPC52xx_USB, MPC52xx_BDLC, MPC52xx_PSC1, MPC52xx_PSC2,
- MPC52xx_PSC3, MPC52xx_PSC4, MPC52xx_PSC5, MPC52xx_PSC6,
- MPC52xx_FEC, MPC52xx_ATA, MPC52xx_I2C1, MPC52xx_I2C2,
- },
- },
- { /* default match */
- .ppc_sys_name = "",
- .mask = 0x00000000,
- .value = 0x00000000,
- },
-};
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c
deleted file mode 100644
index 80804ee..0000000
--- a/arch/ppc/syslib/mpc8xx_devices.c
+++ /dev/null
@@ -1,243 +0,0 @@
-/*
- * MPC8xx Device descriptions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug<vbordug@ru.mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/serial_8250.h>
-#include <linux/mii.h>
-#include <asm/cpm1.h>
-#include <asm/mpc8xx.h>
-#include <asm/irq.h>
-#include <asm/ppc_sys.h>
-
-/* We use offsets for IORESOURCE_MEM to do not set dependencies at compile time.
- * They will get fixed up by mach_mpc8xx_fixup
- */
-
-struct platform_device ppc_sys_platform_devices[] = {
- [MPC8xx_CPM_FEC1] = {
- .name = "fsl-cpm-fec",
- .id = 1,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0xe00,
- .end = 0xe88,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "interrupt",
- .start = MPC8xx_INT_FEC1,
- .end = MPC8xx_INT_FEC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC8xx_CPM_FEC2] = {
- .name = "fsl-cpm-fec",
- .id = 2,
- .num_resources = 2,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0x1e00,
- .end = 0x1e88,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "interrupt",
- .start = MPC8xx_INT_FEC2,
- .end = MPC8xx_INT_FEC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC8xx_CPM_SCC1] = {
- .name = "fsl-cpm-scc",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0xa00,
- .end = 0xa18,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x3c00,
- .end = 0x3c7f,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "interrupt",
- .start = MPC8xx_INT_SCC1,
- .end = MPC8xx_INT_SCC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC8xx_CPM_SCC2] = {
- .name = "fsl-cpm-scc",
- .id = 2,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0xa20,
- .end = 0xa38,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x3d00,
- .end = 0x3d7f,
- .flags = IORESOURCE_MEM,
- },
-
- {
- .name = "interrupt",
- .start = MPC8xx_INT_SCC2,
- .end = MPC8xx_INT_SCC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC8xx_CPM_SCC3] = {
- .name = "fsl-cpm-scc",
- .id = 3,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0xa40,
- .end = 0xa58,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x3e00,
- .end = 0x3e7f,
- .flags = IORESOURCE_MEM,
- },
-
- {
- .name = "interrupt",
- .start = MPC8xx_INT_SCC3,
- .end = MPC8xx_INT_SCC3,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC8xx_CPM_SCC4] = {
- .name = "fsl-cpm-scc",
- .id = 4,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0xa60,
- .end = 0xa78,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x3f00,
- .end = 0x3f7f,
- .flags = IORESOURCE_MEM,
- },
-
- {
- .name = "interrupt",
- .start = MPC8xx_INT_SCC4,
- .end = MPC8xx_INT_SCC4,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC8xx_CPM_SMC1] = {
- .name = "fsl-cpm-smc",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0xa80,
- .end = 0xa8f,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x3e80,
- .end = 0x3ebf,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "interrupt",
- .start = MPC8xx_INT_SMC1,
- .end = MPC8xx_INT_SMC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC8xx_CPM_SMC2] = {
- .name = "fsl-cpm-smc",
- .id = 2,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0xa90,
- .end = 0xa9f,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x3f80,
- .end = 0x3fbf,
- .flags = IORESOURCE_MEM,
-
- },
- {
- .name = "interrupt",
- .start = MPC8xx_INT_SMC2,
- .end = MPC8xx_INT_SMC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
-
- [MPC8xx_MDIO_FEC] = {
- .name = "fsl-cpm-fec-mdio",
- .id = 0,
- .num_resources = 0,
-
- },
-
-};
-
-static int __init mach_mpc8xx_fixup(struct platform_device *pdev)
-{
- ppc_sys_fixup_mem_resource (pdev, IMAP_ADDR);
- return 0;
-}
-
-static int __init mach_mpc8xx_init(void)
-{
- ppc_sys_device_fixup = mach_mpc8xx_fixup;
- return 0;
-}
-
-postcore_initcall(mach_mpc8xx_init);
diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c
deleted file mode 100644
index 18ba1d7..0000000
--- a/arch/ppc/syslib/mpc8xx_sys.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * MPC8xx System descriptions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug <vbordug@ru.mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <asm/ppc_sys.h>
-
-struct ppc_sys_spec *cur_ppc_sys_spec;
-struct ppc_sys_spec ppc_sys_specs[] = {
- {
- .ppc_sys_name = "MPC86X",
- .mask = 0xFFFFFFFF,
- .value = 0x00000000,
- .num_devices = 8,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC8xx_CPM_FEC1,
- MPC8xx_CPM_SCC1,
- MPC8xx_CPM_SCC2,
- MPC8xx_CPM_SCC3,
- MPC8xx_CPM_SCC4,
- MPC8xx_CPM_SMC1,
- MPC8xx_CPM_SMC2,
- MPC8xx_MDIO_FEC,
- },
- },
- {
- .ppc_sys_name = "MPC885",
- .mask = 0xFFFFFFFF,
- .value = 0x00000000,
- .num_devices = 9,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC8xx_CPM_FEC1,
- MPC8xx_CPM_FEC2,
- MPC8xx_CPM_SCC1,
- MPC8xx_CPM_SCC2,
- MPC8xx_CPM_SCC3,
- MPC8xx_CPM_SCC4,
- MPC8xx_CPM_SMC1,
- MPC8xx_CPM_SMC2,
- MPC8xx_MDIO_FEC,
- },
- },
- { /* default match */
- .ppc_sys_name = "",
- .mask = 0x00000000,
- .value = 0x00000000,
- },
-};
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
deleted file mode 100644
index 2dd2dc5..0000000
--- a/arch/ppc/syslib/mv64360_pic.c
+++ /dev/null
@@ -1,423 +0,0 @@
-/*
- * Interrupt controller support for Marvell's MV64360.
- *
- * Author: Rabeeh Khoury <rabeeh@galileo.co.il>
- * Based on MV64360 PIC written by
- * Chris Zankel <chris@mvista.com>
- * Mark A. Greer <mgreer@mvista.com>
- *
- * Copyright 2004 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/*
- * This file contains the specific functions to support the MV64360
- * interrupt controller.
- *
- * The MV64360 has two main interrupt registers (high and low) that
- * summarizes the interrupts generated by the units of the MV64360.
- * Each bit is assigned to an interrupt number, where the low register
- * are assigned from IRQ0 to IRQ31 and the high cause register
- * from IRQ32 to IRQ63
- * The GPP (General Purpose Pins) interrupts are assigned from IRQ64 (GPP0)
- * to IRQ95 (GPP31).
- * get_irq() returns the lowest interrupt number that is currently asserted.
- *
- * Note:
- * - This driver does not initialize the GPP when used as an interrupt
- * input.
- */
-
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-
-#include <asm/io.h>
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <asm/mv64x60.h>
-#include <asm/machdep.h>
-
-#ifdef CONFIG_IRQ_ALL_CPUS
-#error "The mv64360 does not support distribution of IRQs on all CPUs"
-#endif
-/* ========================== forward declaration ========================== */
-
-static void mv64360_unmask_irq(unsigned int);
-static void mv64360_mask_irq(unsigned int);
-static irqreturn_t mv64360_cpu_error_int_handler(int, void *);
-static irqreturn_t mv64360_sram_error_int_handler(int, void *);
-static irqreturn_t mv64360_pci_error_int_handler(int, void *);
-
-/* ========================== local declarations =========================== */
-
-struct hw_interrupt_type mv64360_pic = {
- .typename = " mv64360 ",
- .enable = mv64360_unmask_irq,
- .disable = mv64360_mask_irq,
- .ack = mv64360_mask_irq,
- .end = mv64360_unmask_irq,
-};
-
-#define CPU_INTR_STR "mv64360 cpu interface error"
-#define SRAM_INTR_STR "mv64360 internal sram error"
-#define PCI0_INTR_STR "mv64360 pci 0 error"
-#define PCI1_INTR_STR "mv64360 pci 1 error"
-
-static struct mv64x60_handle bh;
-
-u32 mv64360_irq_base = 0; /* MV64360 handles the next 96 IRQs from here */
-
-/* mv64360_init_irq()
- *
- * This function initializes the interrupt controller. It assigns
- * all interrupts from IRQ0 to IRQ95 to the mv64360 interrupt controller.
- *
- * Input Variable(s):
- * None.
- *
- * Outpu. Variable(s):
- * None.
- *
- * Returns:
- * void
- *
- * Note:
- * We register all GPP inputs as interrupt source, but disable them.
- */
-void __init
-mv64360_init_irq(void)
-{
- int i;
-
- if (ppc_md.progress)
- ppc_md.progress("mv64360_init_irq: enter", 0x0);
-
- bh.v_base = mv64x60_get_bridge_vbase();
-
- ppc_cached_irq_mask[0] = 0;
- ppc_cached_irq_mask[1] = 0x0f000000; /* Enable GPP intrs */
- ppc_cached_irq_mask[2] = 0;
-
- /* disable all interrupts and clear current interrupts */
- mv64x60_write(&bh, MV64x60_GPP_INTR_CAUSE, 0);
- mv64x60_write(&bh, MV64x60_GPP_INTR_MASK, ppc_cached_irq_mask[2]);
- mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_LO,ppc_cached_irq_mask[0]);
- mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_HI,ppc_cached_irq_mask[1]);
-
- /* All interrupts are level interrupts */
- for (i = mv64360_irq_base; i < (mv64360_irq_base + 96); i++) {
- irq_desc[i].status |= IRQ_LEVEL;
- irq_desc[i].chip = &mv64360_pic;
- }
-
- if (ppc_md.progress)
- ppc_md.progress("mv64360_init_irq: exit", 0x0);
-}
-
-/* mv64360_get_irq()
- *
- * This function returns the lowest interrupt number of all interrupts that
- * are currently asserted.
- *
- * Output Variable(s):
- * None.
- *
- * Returns:
- * int <interrupt number> or -2 (bogus interrupt)
- *
- */
-int
-mv64360_get_irq(void)
-{
- int irq;
- int irq_gpp;
-
-#ifdef CONFIG_SMP
- /*
- * Second CPU gets only doorbell (message) interrupts.
- * The doorbell interrupt is BIT28 in the main interrupt low cause reg.
- */
- int cpu_nr = smp_processor_id();
- if (cpu_nr == 1) {
- if (!(mv64x60_read(&bh, MV64360_IC_MAIN_CAUSE_LO) &
- (1 << MV64x60_IRQ_DOORBELL)))
- return -1;
- return mv64360_irq_base + MV64x60_IRQ_DOORBELL;
- }
-#endif
-
- irq = mv64x60_read(&bh, MV64360_IC_MAIN_CAUSE_LO);
- irq = __ilog2((irq & 0x3dfffffe) & ppc_cached_irq_mask[0]);
-
- if (irq == -1) {
- irq = mv64x60_read(&bh, MV64360_IC_MAIN_CAUSE_HI);
- irq = __ilog2((irq & 0x1f0003f7) & ppc_cached_irq_mask[1]);
-
- if (irq == -1)
- irq = -2; /* bogus interrupt, should never happen */
- else {
- if ((irq >= 24) && (irq < MV64x60_IRQ_DOORBELL)) {
- irq_gpp = mv64x60_read(&bh,
- MV64x60_GPP_INTR_CAUSE);
- irq_gpp = __ilog2(irq_gpp &
- ppc_cached_irq_mask[2]);
-
- if (irq_gpp == -1)
- irq = -2;
- else {
- irq = irq_gpp + 64;
- mv64x60_write(&bh,
- MV64x60_GPP_INTR_CAUSE,
- ~(1 << (irq - 64)));
- }
- }
- else
- irq += 32;
- }
- }
-
- (void)mv64x60_read(&bh, MV64x60_GPP_INTR_CAUSE);
-
- if (irq < 0)
- return (irq);
- else
- return (mv64360_irq_base + irq);
-}
-
-/* mv64360_unmask_irq()
- *
- * This function enables an interrupt.
- *
- * Input Variable(s):
- * unsigned int interrupt number (IRQ0...IRQ95).
- *
- * Output Variable(s):
- * None.
- *
- * Returns:
- * void
- */
-static void
-mv64360_unmask_irq(unsigned int irq)
-{
-#ifdef CONFIG_SMP
- /* second CPU gets only doorbell interrupts */
- if ((irq - mv64360_irq_base) == MV64x60_IRQ_DOORBELL) {
- mv64x60_set_bits(&bh, MV64360_IC_CPU1_INTR_MASK_LO,
- (1 << MV64x60_IRQ_DOORBELL));
- return;
- }
-#endif
- irq -= mv64360_irq_base;
-
- if (irq > 31) {
- if (irq > 63) /* unmask GPP irq */
- mv64x60_write(&bh, MV64x60_GPP_INTR_MASK,
- ppc_cached_irq_mask[2] |= (1 << (irq - 64)));
- else /* mask high interrupt register */
- mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_HI,
- ppc_cached_irq_mask[1] |= (1 << (irq - 32)));
- }
- else /* mask low interrupt register */
- mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_LO,
- ppc_cached_irq_mask[0] |= (1 << irq));
-
- (void)mv64x60_read(&bh, MV64x60_GPP_INTR_MASK);
- return;
-}
-
-/* mv64360_mask_irq()
- *
- * This function disables the requested interrupt.
- *
- * Input Variable(s):
- * unsigned int interrupt number (IRQ0...IRQ95).
- *
- * Output Variable(s):
- * None.
- *
- * Returns:
- * void
- */
-static void
-mv64360_mask_irq(unsigned int irq)
-{
-#ifdef CONFIG_SMP
- if ((irq - mv64360_irq_base) == MV64x60_IRQ_DOORBELL) {
- mv64x60_clr_bits(&bh, MV64360_IC_CPU1_INTR_MASK_LO,
- (1 << MV64x60_IRQ_DOORBELL));
- return;
- }
-#endif
- irq -= mv64360_irq_base;
-
- if (irq > 31) {
- if (irq > 63) /* mask GPP irq */
- mv64x60_write(&bh, MV64x60_GPP_INTR_MASK,
- ppc_cached_irq_mask[2] &= ~(1 << (irq - 64)));
- else /* mask high interrupt register */
- mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_HI,
- ppc_cached_irq_mask[1] &= ~(1 << (irq - 32)));
- }
- else /* mask low interrupt register */
- mv64x60_write(&bh, MV64360_IC_CPU0_INTR_MASK_LO,
- ppc_cached_irq_mask[0] &= ~(1 << irq));
-
- (void)mv64x60_read(&bh, MV64x60_GPP_INTR_MASK);
- return;
-}
-
-static irqreturn_t
-mv64360_cpu_error_int_handler(int irq, void *dev_id)
-{
- printk(KERN_ERR "mv64360_cpu_error_int_handler: %s 0x%08x\n",
- "Error on CPU interface - Cause regiser",
- mv64x60_read(&bh, MV64x60_CPU_ERR_CAUSE));
- printk(KERN_ERR "\tCPU error register dump:\n");
- printk(KERN_ERR "\tAddress low 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_ADDR_LO));
- printk(KERN_ERR "\tAddress high 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_ADDR_HI));
- printk(KERN_ERR "\tData low 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_DATA_LO));
- printk(KERN_ERR "\tData high 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_DATA_HI));
- printk(KERN_ERR "\tParity 0x%08x\n",
- mv64x60_read(&bh, MV64x60_CPU_ERR_PARITY));
- mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0);
- return IRQ_HANDLED;
-}
-
-static irqreturn_t
-mv64360_sram_error_int_handler(int irq, void *dev_id)
-{
- printk(KERN_ERR "mv64360_sram_error_int_handler: %s 0x%08x\n",
- "Error in internal SRAM - Cause register",
- mv64x60_read(&bh, MV64360_SRAM_ERR_CAUSE));
- printk(KERN_ERR "\tSRAM error register dump:\n");
- printk(KERN_ERR "\tAddress Low 0x%08x\n",
- mv64x60_read(&bh, MV64360_SRAM_ERR_ADDR_LO));
- printk(KERN_ERR "\tAddress High 0x%08x\n",
- mv64x60_read(&bh, MV64360_SRAM_ERR_ADDR_HI));
- printk(KERN_ERR "\tData Low 0x%08x\n",
- mv64x60_read(&bh, MV64360_SRAM_ERR_DATA_LO));
- printk(KERN_ERR "\tData High 0x%08x\n",
- mv64x60_read(&bh, MV64360_SRAM_ERR_DATA_HI));
- printk(KERN_ERR "\tParity 0x%08x\n",
- mv64x60_read(&bh, MV64360_SRAM_ERR_PARITY));
- mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0);
- return IRQ_HANDLED;
-}
-
-static irqreturn_t
-mv64360_pci_error_int_handler(int irq, void *dev_id)
-{
- u32 val;
- unsigned int pci_bus = (unsigned int)dev_id;
-
- if (pci_bus == 0) { /* Error on PCI 0 */
- val = mv64x60_read(&bh, MV64x60_PCI0_ERR_CAUSE);
- printk(KERN_ERR "%s: Error in PCI %d Interface\n",
- "mv64360_pci_error_int_handler", pci_bus);
- printk(KERN_ERR "\tPCI %d error register dump:\n", pci_bus);
- printk(KERN_ERR "\tCause register 0x%08x\n", val);
- printk(KERN_ERR "\tAddress Low 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI0_ERR_ADDR_LO));
- printk(KERN_ERR "\tAddress High 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI0_ERR_ADDR_HI));
- printk(KERN_ERR "\tAttribute 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI0_ERR_DATA_LO));
- printk(KERN_ERR "\tCommand 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI0_ERR_CMD));
- mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, ~val);
- }
- if (pci_bus == 1) { /* Error on PCI 1 */
- val = mv64x60_read(&bh, MV64x60_PCI1_ERR_CAUSE);
- printk(KERN_ERR "%s: Error in PCI %d Interface\n",
- "mv64360_pci_error_int_handler", pci_bus);
- printk(KERN_ERR "\tPCI %d error register dump:\n", pci_bus);
- printk(KERN_ERR "\tCause register 0x%08x\n", val);
- printk(KERN_ERR "\tAddress Low 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI1_ERR_ADDR_LO));
- printk(KERN_ERR "\tAddress High 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI1_ERR_ADDR_HI));
- printk(KERN_ERR "\tAttribute 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI1_ERR_DATA_LO));
- printk(KERN_ERR "\tCommand 0x%08x\n",
- mv64x60_read(&bh, MV64x60_PCI1_ERR_CMD));
- mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, ~val);
- }
- return IRQ_HANDLED;
-}
-
-/*
- * Bit 0 of MV64x60_PCIx_ERR_MASK does not exist on the 64360 and because of
- * errata FEr-#11 and FEr-##16 for the 64460, it should be 0 on that chip as
- * well. IOW, don't set bit 0.
- */
-#define MV64360_PCI0_ERR_MASK_VAL 0x00a50c24
-
-static int __init
-mv64360_register_hdlrs(void)
-{
- int rc;
-
- /* Clear old errors and register CPU interface error intr handler */
- mv64x60_write(&bh, MV64x60_CPU_ERR_CAUSE, 0);
- if ((rc = request_irq(MV64x60_IRQ_CPU_ERR + mv64360_irq_base,
- mv64360_cpu_error_int_handler, IRQF_DISABLED, CPU_INTR_STR, NULL)))
- printk(KERN_WARNING "Can't register cpu error handler: %d", rc);
-
- mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0);
- mv64x60_write(&bh, MV64x60_CPU_ERR_MASK, 0x000000ff);
-
- /* Clear old errors and register internal SRAM error intr handler */
- mv64x60_write(&bh, MV64360_SRAM_ERR_CAUSE, 0);
- if ((rc = request_irq(MV64360_IRQ_SRAM_PAR_ERR + mv64360_irq_base,
- mv64360_sram_error_int_handler,IRQF_DISABLED,SRAM_INTR_STR, NULL)))
- printk(KERN_WARNING "Can't register SRAM error handler: %d",rc);
-
- /* Clear old errors and register PCI 0 error intr handler */
- mv64x60_write(&bh, MV64x60_PCI0_ERR_CAUSE, 0);
- if ((rc = request_irq(MV64360_IRQ_PCI0 + mv64360_irq_base,
- mv64360_pci_error_int_handler,
- IRQF_DISABLED, PCI0_INTR_STR, (void *)0)))
- printk(KERN_WARNING "Can't register pci 0 error handler: %d",
- rc);
-
- mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, 0);
- mv64x60_write(&bh, MV64x60_PCI0_ERR_MASK, MV64360_PCI0_ERR_MASK_VAL);
-
- /* Erratum FEr PCI-#16 says to clear bit 0 of PCI SERRn Mask reg. */
- mv64x60_write(&bh, MV64x60_PCI0_ERR_SERR_MASK,
- mv64x60_read(&bh, MV64x60_PCI0_ERR_SERR_MASK) & ~0x1UL);
-
- /* Clear old errors and register PCI 1 error intr handler */
- mv64x60_write(&bh, MV64x60_PCI1_ERR_CAUSE, 0);
- if ((rc = request_irq(MV64360_IRQ_PCI1 + mv64360_irq_base,
- mv64360_pci_error_int_handler,
- IRQF_DISABLED, PCI1_INTR_STR, (void *)1)))
- printk(KERN_WARNING "Can't register pci 1 error handler: %d",
- rc);
-
- mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, 0);
- mv64x60_write(&bh, MV64x60_PCI1_ERR_MASK, MV64360_PCI0_ERR_MASK_VAL);
-
- /* Erratum FEr PCI-#16 says to clear bit 0 of PCI Intr Mask reg. */
- mv64x60_write(&bh, MV64x60_PCI1_ERR_SERR_MASK,
- mv64x60_read(&bh, MV64x60_PCI1_ERR_SERR_MASK) & ~0x1UL);
-
- return 0;
-}
-
-arch_initcall(mv64360_register_hdlrs);
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
deleted file mode 100644
index 418f305..0000000
--- a/arch/ppc/syslib/mv64x60.c
+++ /dev/null
@@ -1,2485 +0,0 @@
-/*
- * Common routines for the Marvell/Galileo Discovery line of host bridges
- * (gt64260, mv64360, mv64460, ...).
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/string.h>
-#include <linux/spinlock.h>
-#include <linux/mv643xx.h>
-#include <linux/platform_device.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/delay.h>
-#include <asm/mv64x60.h>
-
-
-u8 mv64x60_pci_exclude_bridge = 1;
-DEFINE_SPINLOCK(mv64x60_lock);
-
-static phys_addr_t mv64x60_bridge_pbase;
-static void __iomem *mv64x60_bridge_vbase;
-static u32 mv64x60_bridge_type = MV64x60_TYPE_INVALID;
-static u32 mv64x60_bridge_rev;
-#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
-static struct pci_controller sysfs_hose_a;
-#endif
-
-static u32 gt64260_translate_size(u32 base, u32 size, u32 num_bits);
-static u32 gt64260_untranslate_size(u32 base, u32 size, u32 num_bits);
-static void gt64260_set_pci2mem_window(struct pci_controller *hose, u32 bus,
- u32 window, u32 base);
-static void gt64260_set_pci2regs_window(struct mv64x60_handle *bh,
- struct pci_controller *hose, u32 bus, u32 base);
-static u32 gt64260_is_enabled_32bit(struct mv64x60_handle *bh, u32 window);
-static void gt64260_enable_window_32bit(struct mv64x60_handle *bh, u32 window);
-static void gt64260_disable_window_32bit(struct mv64x60_handle *bh, u32 window);
-static void gt64260_enable_window_64bit(struct mv64x60_handle *bh, u32 window);
-static void gt64260_disable_window_64bit(struct mv64x60_handle *bh, u32 window);
-static void gt64260_disable_all_windows(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si);
-static void gt64260a_chip_specific_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si);
-static void gt64260b_chip_specific_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si);
-
-static u32 mv64360_translate_size(u32 base, u32 size, u32 num_bits);
-static u32 mv64360_untranslate_size(u32 base, u32 size, u32 num_bits);
-static void mv64360_set_pci2mem_window(struct pci_controller *hose, u32 bus,
- u32 window, u32 base);
-static void mv64360_set_pci2regs_window(struct mv64x60_handle *bh,
- struct pci_controller *hose, u32 bus, u32 base);
-static u32 mv64360_is_enabled_32bit(struct mv64x60_handle *bh, u32 window);
-static void mv64360_enable_window_32bit(struct mv64x60_handle *bh, u32 window);
-static void mv64360_disable_window_32bit(struct mv64x60_handle *bh, u32 window);
-static void mv64360_enable_window_64bit(struct mv64x60_handle *bh, u32 window);
-static void mv64360_disable_window_64bit(struct mv64x60_handle *bh, u32 window);
-static void mv64360_disable_all_windows(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si);
-static void mv64360_config_io2mem_windows(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]);
-static void mv64360_set_mpsc2regs_window(struct mv64x60_handle *bh, u32 base);
-static void mv64360_chip_specific_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si);
-static void mv64460_chip_specific_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si);
-
-
-/*
- * Define tables that have the chip-specific info for each type of
- * Marvell bridge chip.
- */
-static struct mv64x60_chip_info gt64260a_ci __initdata = { /* GT64260A */
- .translate_size = gt64260_translate_size,
- .untranslate_size = gt64260_untranslate_size,
- .set_pci2mem_window = gt64260_set_pci2mem_window,
- .set_pci2regs_window = gt64260_set_pci2regs_window,
- .is_enabled_32bit = gt64260_is_enabled_32bit,
- .enable_window_32bit = gt64260_enable_window_32bit,
- .disable_window_32bit = gt64260_disable_window_32bit,
- .enable_window_64bit = gt64260_enable_window_64bit,
- .disable_window_64bit = gt64260_disable_window_64bit,
- .disable_all_windows = gt64260_disable_all_windows,
- .chip_specific_init = gt64260a_chip_specific_init,
- .window_tab_32bit = gt64260_32bit_windows,
- .window_tab_64bit = gt64260_64bit_windows,
-};
-
-static struct mv64x60_chip_info gt64260b_ci __initdata = { /* GT64260B */
- .translate_size = gt64260_translate_size,
- .untranslate_size = gt64260_untranslate_size,
- .set_pci2mem_window = gt64260_set_pci2mem_window,
- .set_pci2regs_window = gt64260_set_pci2regs_window,
- .is_enabled_32bit = gt64260_is_enabled_32bit,
- .enable_window_32bit = gt64260_enable_window_32bit,
- .disable_window_32bit = gt64260_disable_window_32bit,
- .enable_window_64bit = gt64260_enable_window_64bit,
- .disable_window_64bit = gt64260_disable_window_64bit,
- .disable_all_windows = gt64260_disable_all_windows,
- .chip_specific_init = gt64260b_chip_specific_init,
- .window_tab_32bit = gt64260_32bit_windows,
- .window_tab_64bit = gt64260_64bit_windows,
-};
-
-static struct mv64x60_chip_info mv64360_ci __initdata = { /* MV64360 */
- .translate_size = mv64360_translate_size,
- .untranslate_size = mv64360_untranslate_size,
- .set_pci2mem_window = mv64360_set_pci2mem_window,
- .set_pci2regs_window = mv64360_set_pci2regs_window,
- .is_enabled_32bit = mv64360_is_enabled_32bit,
- .enable_window_32bit = mv64360_enable_window_32bit,
- .disable_window_32bit = mv64360_disable_window_32bit,
- .enable_window_64bit = mv64360_enable_window_64bit,
- .disable_window_64bit = mv64360_disable_window_64bit,
- .disable_all_windows = mv64360_disable_all_windows,
- .config_io2mem_windows = mv64360_config_io2mem_windows,
- .set_mpsc2regs_window = mv64360_set_mpsc2regs_window,
- .chip_specific_init = mv64360_chip_specific_init,
- .window_tab_32bit = mv64360_32bit_windows,
- .window_tab_64bit = mv64360_64bit_windows,
-};
-
-static struct mv64x60_chip_info mv64460_ci __initdata = { /* MV64460 */
- .translate_size = mv64360_translate_size,
- .untranslate_size = mv64360_untranslate_size,
- .set_pci2mem_window = mv64360_set_pci2mem_window,
- .set_pci2regs_window = mv64360_set_pci2regs_window,
- .is_enabled_32bit = mv64360_is_enabled_32bit,
- .enable_window_32bit = mv64360_enable_window_32bit,
- .disable_window_32bit = mv64360_disable_window_32bit,
- .enable_window_64bit = mv64360_enable_window_64bit,
- .disable_window_64bit = mv64360_disable_window_64bit,
- .disable_all_windows = mv64360_disable_all_windows,
- .config_io2mem_windows = mv64360_config_io2mem_windows,
- .set_mpsc2regs_window = mv64360_set_mpsc2regs_window,
- .chip_specific_init = mv64460_chip_specific_init,
- .window_tab_32bit = mv64360_32bit_windows,
- .window_tab_64bit = mv64360_64bit_windows,
-};
-
-/*
- *****************************************************************************
- *
- * Platform Device Definitions
- *
- *****************************************************************************
- */
-#ifdef CONFIG_SERIAL_MPSC
-static struct mpsc_shared_pdata mv64x60_mpsc_shared_pdata = {
- .mrr_val = 0x3ffffe38,
- .rcrr_val = 0,
- .tcrr_val = 0,
- .intr_cause_val = 0,
- .intr_mask_val = 0,
-};
-
-static struct resource mv64x60_mpsc_shared_resources[] = {
- /* Do not change the order of the IORESOURCE_MEM resources */
- [0] = {
- .name = "mpsc routing base",
- .start = MV64x60_MPSC_ROUTING_OFFSET,
- .end = MV64x60_MPSC_ROUTING_OFFSET +
- MPSC_ROUTING_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "sdma intr base",
- .start = MV64x60_SDMA_INTR_OFFSET,
- .end = MV64x60_SDMA_INTR_OFFSET +
- MPSC_SDMA_INTR_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device mpsc_shared_device = { /* Shared device */
- .name = MPSC_SHARED_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(mv64x60_mpsc_shared_resources),
- .resource = mv64x60_mpsc_shared_resources,
- .dev = {
- .platform_data = &mv64x60_mpsc_shared_pdata,
- },
-};
-
-static struct mpsc_pdata mv64x60_mpsc0_pdata = {
- .mirror_regs = 0,
- .cache_mgmt = 0,
- .max_idle = 0,
- .default_baud = 9600,
- .default_bits = 8,
- .default_parity = 'n',
- .default_flow = 'n',
- .chr_1_val = 0x00000000,
- .chr_2_val = 0x00000000,
- .chr_10_val = 0x00000003,
- .mpcr_val = 0,
- .bcr_val = 0,
- .brg_can_tune = 0,
- .brg_clk_src = 8, /* Default to TCLK */
- .brg_clk_freq = 100000000, /* Default to 100 MHz */
-};
-
-static struct resource mv64x60_mpsc0_resources[] = {
- /* Do not change the order of the IORESOURCE_MEM resources */
- [0] = {
- .name = "mpsc 0 base",
- .start = MV64x60_MPSC_0_OFFSET,
- .end = MV64x60_MPSC_0_OFFSET + MPSC_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "sdma 0 base",
- .start = MV64x60_SDMA_0_OFFSET,
- .end = MV64x60_SDMA_0_OFFSET + MPSC_SDMA_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [2] = {
- .name = "brg 0 base",
- .start = MV64x60_BRG_0_OFFSET,
- .end = MV64x60_BRG_0_OFFSET + MPSC_BRG_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [3] = {
- .name = "sdma 0 irq",
- .start = MV64x60_IRQ_SDMA_0,
- .end = MV64x60_IRQ_SDMA_0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device mpsc0_device = {
- .name = MPSC_CTLR_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(mv64x60_mpsc0_resources),
- .resource = mv64x60_mpsc0_resources,
- .dev = {
- .platform_data = &mv64x60_mpsc0_pdata,
- },
-};
-
-static struct mpsc_pdata mv64x60_mpsc1_pdata = {
- .mirror_regs = 0,
- .cache_mgmt = 0,
- .max_idle = 0,
- .default_baud = 9600,
- .default_bits = 8,
- .default_parity = 'n',
- .default_flow = 'n',
- .chr_1_val = 0x00000000,
- .chr_1_val = 0x00000000,
- .chr_2_val = 0x00000000,
- .chr_10_val = 0x00000003,
- .mpcr_val = 0,
- .bcr_val = 0,
- .brg_can_tune = 0,
- .brg_clk_src = 8, /* Default to TCLK */
- .brg_clk_freq = 100000000, /* Default to 100 MHz */
-};
-
-static struct resource mv64x60_mpsc1_resources[] = {
- /* Do not change the order of the IORESOURCE_MEM resources */
- [0] = {
- .name = "mpsc 1 base",
- .start = MV64x60_MPSC_1_OFFSET,
- .end = MV64x60_MPSC_1_OFFSET + MPSC_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "sdma 1 base",
- .start = MV64x60_SDMA_1_OFFSET,
- .end = MV64x60_SDMA_1_OFFSET + MPSC_SDMA_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [2] = {
- .name = "brg 1 base",
- .start = MV64x60_BRG_1_OFFSET,
- .end = MV64x60_BRG_1_OFFSET + MPSC_BRG_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [3] = {
- .name = "sdma 1 irq",
- .start = MV64360_IRQ_SDMA_1,
- .end = MV64360_IRQ_SDMA_1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device mpsc1_device = {
- .name = MPSC_CTLR_NAME,
- .id = 1,
- .num_resources = ARRAY_SIZE(mv64x60_mpsc1_resources),
- .resource = mv64x60_mpsc1_resources,
- .dev = {
- .platform_data = &mv64x60_mpsc1_pdata,
- },
-};
-#endif
-
-#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
-static struct resource mv64x60_eth_shared_resources[] = {
- [0] = {
- .name = "ethernet shared base",
- .start = MV643XX_ETH_SHARED_REGS,
- .end = MV643XX_ETH_SHARED_REGS +
- MV643XX_ETH_SHARED_REGS_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device mv64x60_eth_shared_device = {
- .name = MV643XX_ETH_SHARED_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(mv64x60_eth_shared_resources),
- .resource = mv64x60_eth_shared_resources,
-};
-
-#ifdef CONFIG_MV643XX_ETH_0
-static struct resource mv64x60_eth0_resources[] = {
- [0] = {
- .name = "eth0 irq",
- .start = MV64x60_IRQ_ETH_0,
- .end = MV64x60_IRQ_ETH_0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct mv643xx_eth_platform_data eth0_pd = {
- .shared = &mv64x60_eth_shared_device;
- .port_number = 0,
-};
-
-static struct platform_device eth0_device = {
- .name = MV643XX_ETH_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
- .resource = mv64x60_eth0_resources,
- .dev = {
- .platform_data = ð0_pd,
- },
-};
-#endif
-
-#ifdef CONFIG_MV643XX_ETH_1
-static struct resource mv64x60_eth1_resources[] = {
- [0] = {
- .name = "eth1 irq",
- .start = MV64x60_IRQ_ETH_1,
- .end = MV64x60_IRQ_ETH_1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct mv643xx_eth_platform_data eth1_pd = {
- .shared = &mv64x60_eth_shared_device;
- .port_number = 1,
-};
-
-static struct platform_device eth1_device = {
- .name = MV643XX_ETH_NAME,
- .id = 1,
- .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
- .resource = mv64x60_eth1_resources,
- .dev = {
- .platform_data = ð1_pd,
- },
-};
-#endif
-
-#ifdef CONFIG_MV643XX_ETH_2
-static struct resource mv64x60_eth2_resources[] = {
- [0] = {
- .name = "eth2 irq",
- .start = MV64x60_IRQ_ETH_2,
- .end = MV64x60_IRQ_ETH_2,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct mv643xx_eth_platform_data eth2_pd = {
- .shared = &mv64x60_eth_shared_device;
- .port_number = 2,
-};
-
-static struct platform_device eth2_device = {
- .name = MV643XX_ETH_NAME,
- .id = 2,
- .num_resources = ARRAY_SIZE(mv64x60_eth2_resources),
- .resource = mv64x60_eth2_resources,
- .dev = {
- .platform_data = ð2_pd,
- },
-};
-#endif
-#endif
-
-#ifdef CONFIG_I2C_MV64XXX
-static struct mv64xxx_i2c_pdata mv64xxx_i2c_pdata = {
- .freq_m = 8,
- .freq_n = 3,
- .timeout = 1000, /* Default timeout of 1 second */
-};
-
-static struct resource mv64xxx_i2c_resources[] = {
- /* Do not change the order of the IORESOURCE_MEM resources */
- [0] = {
- .name = "mv64xxx i2c base",
- .start = MV64XXX_I2C_OFFSET,
- .end = MV64XXX_I2C_OFFSET + MV64XXX_I2C_REG_BLOCK_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .name = "mv64xxx i2c irq",
- .start = MV64x60_IRQ_I2C,
- .end = MV64x60_IRQ_I2C,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device i2c_device = {
- .name = MV64XXX_I2C_CTLR_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(mv64xxx_i2c_resources),
- .resource = mv64xxx_i2c_resources,
- .dev = {
- .platform_data = &mv64xxx_i2c_pdata,
- },
-};
-#endif
-
-#ifdef CONFIG_WATCHDOG
-static struct mv64x60_wdt_pdata mv64x60_wdt_pdata = {
- .timeout = 10, /* default watchdog expiry in seconds */
- .bus_clk = 133, /* default bus clock in MHz */
-};
-
-static struct resource mv64x60_wdt_resources[] = {
- [0] = {
- .name = "mv64x60 wdt base",
- .start = MV64x60_WDT_WDC,
- .end = MV64x60_WDT_WDC + 8 - 1, /* two 32-bit registers */
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device wdt_device = {
- .name = MV64x60_WDT_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(mv64x60_wdt_resources),
- .resource = mv64x60_wdt_resources,
- .dev = {
- .platform_data = &mv64x60_wdt_pdata,
- },
-};
-#endif
-
-#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
-static struct mv64xxx_pdata mv64xxx_pdata = {
- .hs_reg_valid = 0,
-};
-
-static struct platform_device mv64xxx_device = { /* general mv64x60 stuff */
- .name = MV64XXX_DEV_NAME,
- .id = 0,
- .dev = {
- .platform_data = &mv64xxx_pdata,
- },
-};
-#endif
-
-static struct platform_device *mv64x60_pd_devs[] __initdata = {
-#ifdef CONFIG_SERIAL_MPSC
- &mpsc_shared_device,
- &mpsc0_device,
- &mpsc1_device,
-#endif
-#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
- &mv64x60_eth_shared_device,
-#endif
-#ifdef CONFIG_MV643XX_ETH_0
- ð0_device,
-#endif
-#ifdef CONFIG_MV643XX_ETH_1
- ð1_device,
-#endif
-#ifdef CONFIG_MV643XX_ETH_2
- ð2_device,
-#endif
-#ifdef CONFIG_I2C_MV64XXX
- &i2c_device,
-#endif
-#ifdef CONFIG_MV64X60_WDT
- &wdt_device,
-#endif
-#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
- &mv64xxx_device,
-#endif
-};
-
-/*
- *****************************************************************************
- *
- * Bridge Initialization Routines
- *
- *****************************************************************************
- */
-/*
- * mv64x60_init()
- *
- * Initialize the bridge based on setting passed in via 'si'. The bridge
- * handle, 'bh', will be set so that it can be used to make subsequent
- * calls to routines in this file.
- */
-int __init
-mv64x60_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si)
-{
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2];
-
- if (ppc_md.progress)
- ppc_md.progress("mv64x60 initialization", 0x0);
-
- spin_lock_init(&mv64x60_lock);
- mv64x60_early_init(bh, si);
-
- if (mv64x60_get_type(bh) || mv64x60_setup_for_chip(bh)) {
- iounmap(bh->v_base);
- bh->v_base = 0;
- if (ppc_md.progress)
- ppc_md.progress("mv64x60_init: Can't determine chip",0);
- return -1;
- }
-
- bh->ci->disable_all_windows(bh, si);
- mv64x60_get_mem_windows(bh, mem_windows);
- mv64x60_config_cpu2mem_windows(bh, si, mem_windows);
-
- if (bh->ci->config_io2mem_windows)
- bh->ci->config_io2mem_windows(bh, si, mem_windows);
- if (bh->ci->set_mpsc2regs_window)
- bh->ci->set_mpsc2regs_window(bh, si->phys_reg_base);
-
- if (si->pci_1.enable_bus) {
- bh->io_base_b = (u32)ioremap(si->pci_1.pci_io.cpu_base,
- si->pci_1.pci_io.size);
- isa_io_base = bh->io_base_b;
- }
-
- if (si->pci_0.enable_bus) {
- bh->io_base_a = (u32)ioremap(si->pci_0.pci_io.cpu_base,
- si->pci_0.pci_io.size);
- isa_io_base = bh->io_base_a;
-
- mv64x60_alloc_hose(bh, MV64x60_PCI0_CONFIG_ADDR,
- MV64x60_PCI0_CONFIG_DATA, &bh->hose_a);
- mv64x60_config_resources(bh->hose_a, &si->pci_0, bh->io_base_a);
- mv64x60_config_pci_params(bh->hose_a, &si->pci_0);
-
- mv64x60_config_cpu2pci_windows(bh, &si->pci_0, 0);
- mv64x60_config_pci2mem_windows(bh, bh->hose_a, &si->pci_0, 0,
- mem_windows);
- bh->ci->set_pci2regs_window(bh, bh->hose_a, 0,
- si->phys_reg_base);
- }
-
- if (si->pci_1.enable_bus) {
- mv64x60_alloc_hose(bh, MV64x60_PCI1_CONFIG_ADDR,
- MV64x60_PCI1_CONFIG_DATA, &bh->hose_b);
- mv64x60_config_resources(bh->hose_b, &si->pci_1, bh->io_base_b);
- mv64x60_config_pci_params(bh->hose_b, &si->pci_1);
-
- mv64x60_config_cpu2pci_windows(bh, &si->pci_1, 1);
- mv64x60_config_pci2mem_windows(bh, bh->hose_b, &si->pci_1, 1,
- mem_windows);
- bh->ci->set_pci2regs_window(bh, bh->hose_b, 1,
- si->phys_reg_base);
- }
-
- bh->ci->chip_specific_init(bh, si);
- mv64x60_pd_fixup(bh, mv64x60_pd_devs, ARRAY_SIZE(mv64x60_pd_devs));
-
- return 0;
-}
-
-/*
- * mv64x60_early_init()
- *
- * Do some bridge work that must take place before we start messing with
- * the bridge for real.
- */
-void __init
-mv64x60_early_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si)
-{
- struct pci_controller hose_a, hose_b;
-
- memset(bh, 0, sizeof(*bh));
-
- bh->p_base = si->phys_reg_base;
- bh->v_base = ioremap(bh->p_base, MV64x60_INTERNAL_SPACE_SIZE);
-
- mv64x60_bridge_pbase = bh->p_base;
- mv64x60_bridge_vbase = bh->v_base;
-
- /* Assuming pci mode [reserved] bits 4:5 on 64260 are 0 */
- bh->pci_mode_a = mv64x60_read(bh, MV64x60_PCI0_MODE) &
- MV64x60_PCIMODE_MASK;
- bh->pci_mode_b = mv64x60_read(bh, MV64x60_PCI1_MODE) &
- MV64x60_PCIMODE_MASK;
-
- /* Need temporary hose structs to call mv64x60_set_bus() */
- memset(&hose_a, 0, sizeof(hose_a));
- memset(&hose_b, 0, sizeof(hose_b));
- setup_indirect_pci_nomap(&hose_a, bh->v_base + MV64x60_PCI0_CONFIG_ADDR,
- bh->v_base + MV64x60_PCI0_CONFIG_DATA);
- setup_indirect_pci_nomap(&hose_b, bh->v_base + MV64x60_PCI1_CONFIG_ADDR,
- bh->v_base + MV64x60_PCI1_CONFIG_DATA);
- bh->hose_a = &hose_a;
- bh->hose_b = &hose_b;
-
-#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
- /* Save a copy of hose_a for sysfs functions -- hack */
- memcpy(&sysfs_hose_a, &hose_a, sizeof(hose_a));
-#endif
-
- mv64x60_set_bus(bh, 0, 0);
- mv64x60_set_bus(bh, 1, 0);
-
- bh->hose_a = NULL;
- bh->hose_b = NULL;
-
- /* Clear bit 0 of PCI addr decode control so PCI->CPU remap 1:1 */
- mv64x60_clr_bits(bh, MV64x60_PCI0_PCI_DECODE_CNTL, 0x00000001);
- mv64x60_clr_bits(bh, MV64x60_PCI1_PCI_DECODE_CNTL, 0x00000001);
-
- /* Bit 12 MUST be 0; set bit 27--don't auto-update cpu remap regs */
- mv64x60_clr_bits(bh, MV64x60_CPU_CONFIG, (1<<12));
- mv64x60_set_bits(bh, MV64x60_CPU_CONFIG, (1<<27));
-
- mv64x60_set_bits(bh, MV64x60_PCI0_TO_RETRY, 0xffff);
- mv64x60_set_bits(bh, MV64x60_PCI1_TO_RETRY, 0xffff);
-}
-
-/*
- *****************************************************************************
- *
- * Window Config Routines
- *
- *****************************************************************************
- */
-/*
- * mv64x60_get_32bit_window()
- *
- * Determine the base address and size of a 32-bit window on the bridge.
- */
-void __init
-mv64x60_get_32bit_window(struct mv64x60_handle *bh, u32 window,
- u32 *base, u32 *size)
-{
- u32 val, base_reg, size_reg, base_bits, size_bits;
- u32 (*get_from_field)(u32 val, u32 num_bits);
-
- base_reg = bh->ci->window_tab_32bit[window].base_reg;
-
- if (base_reg != 0) {
- size_reg = bh->ci->window_tab_32bit[window].size_reg;
- base_bits = bh->ci->window_tab_32bit[window].base_bits;
- size_bits = bh->ci->window_tab_32bit[window].size_bits;
- get_from_field= bh->ci->window_tab_32bit[window].get_from_field;
-
- val = mv64x60_read(bh, base_reg);
- *base = get_from_field(val, base_bits);
-
- if (size_reg != 0) {
- val = mv64x60_read(bh, size_reg);
- val = get_from_field(val, size_bits);
- *size = bh->ci->untranslate_size(*base, val, size_bits);
- } else
- *size = 0;
- } else {
- *base = 0;
- *size = 0;
- }
-
- pr_debug("get 32bit window: %d, base: 0x%x, size: 0x%x\n",
- window, *base, *size);
-}
-
-/*
- * mv64x60_set_32bit_window()
- *
- * Set the base address and size of a 32-bit window on the bridge.
- */
-void __init
-mv64x60_set_32bit_window(struct mv64x60_handle *bh, u32 window,
- u32 base, u32 size, u32 other_bits)
-{
- u32 val, base_reg, size_reg, base_bits, size_bits;
- u32 (*map_to_field)(u32 val, u32 num_bits);
-
- pr_debug("set 32bit window: %d, base: 0x%x, size: 0x%x, other: 0x%x\n",
- window, base, size, other_bits);
-
- base_reg = bh->ci->window_tab_32bit[window].base_reg;
-
- if (base_reg != 0) {
- size_reg = bh->ci->window_tab_32bit[window].size_reg;
- base_bits = bh->ci->window_tab_32bit[window].base_bits;
- size_bits = bh->ci->window_tab_32bit[window].size_bits;
- map_to_field = bh->ci->window_tab_32bit[window].map_to_field;
-
- val = map_to_field(base, base_bits) | other_bits;
- mv64x60_write(bh, base_reg, val);
-
- if (size_reg != 0) {
- val = bh->ci->translate_size(base, size, size_bits);
- val = map_to_field(val, size_bits);
- mv64x60_write(bh, size_reg, val);
- }
-
- (void)mv64x60_read(bh, base_reg); /* Flush FIFO */
- }
-}
-
-/*
- * mv64x60_get_64bit_window()
- *
- * Determine the base address and size of a 64-bit window on the bridge.
- */
-void __init
-mv64x60_get_64bit_window(struct mv64x60_handle *bh, u32 window,
- u32 *base_hi, u32 *base_lo, u32 *size)
-{
- u32 val, base_lo_reg, size_reg, base_lo_bits, size_bits;
- u32 (*get_from_field)(u32 val, u32 num_bits);
-
- base_lo_reg = bh->ci->window_tab_64bit[window].base_lo_reg;
-
- if (base_lo_reg != 0) {
- size_reg = bh->ci->window_tab_64bit[window].size_reg;
- base_lo_bits = bh->ci->window_tab_64bit[window].base_lo_bits;
- size_bits = bh->ci->window_tab_64bit[window].size_bits;
- get_from_field= bh->ci->window_tab_64bit[window].get_from_field;
-
- *base_hi = mv64x60_read(bh,
- bh->ci->window_tab_64bit[window].base_hi_reg);
-
- val = mv64x60_read(bh, base_lo_reg);
- *base_lo = get_from_field(val, base_lo_bits);
-
- if (size_reg != 0) {
- val = mv64x60_read(bh, size_reg);
- val = get_from_field(val, size_bits);
- *size = bh->ci->untranslate_size(*base_lo, val,
- size_bits);
- } else
- *size = 0;
- } else {
- *base_hi = 0;
- *base_lo = 0;
- *size = 0;
- }
-
- pr_debug("get 64bit window: %d, base hi: 0x%x, base lo: 0x%x, "
- "size: 0x%x\n", window, *base_hi, *base_lo, *size);
-}
-
-/*
- * mv64x60_set_64bit_window()
- *
- * Set the base address and size of a 64-bit window on the bridge.
- */
-void __init
-mv64x60_set_64bit_window(struct mv64x60_handle *bh, u32 window,
- u32 base_hi, u32 base_lo, u32 size, u32 other_bits)
-{
- u32 val, base_lo_reg, size_reg, base_lo_bits, size_bits;
- u32 (*map_to_field)(u32 val, u32 num_bits);
-
- pr_debug("set 64bit window: %d, base hi: 0x%x, base lo: 0x%x, "
- "size: 0x%x, other: 0x%x\n",
- window, base_hi, base_lo, size, other_bits);
-
- base_lo_reg = bh->ci->window_tab_64bit[window].base_lo_reg;
-
- if (base_lo_reg != 0) {
- size_reg = bh->ci->window_tab_64bit[window].size_reg;
- base_lo_bits = bh->ci->window_tab_64bit[window].base_lo_bits;
- size_bits = bh->ci->window_tab_64bit[window].size_bits;
- map_to_field = bh->ci->window_tab_64bit[window].map_to_field;
-
- mv64x60_write(bh, bh->ci->window_tab_64bit[window].base_hi_reg,
- base_hi);
-
- val = map_to_field(base_lo, base_lo_bits) | other_bits;
- mv64x60_write(bh, base_lo_reg, val);
-
- if (size_reg != 0) {
- val = bh->ci->translate_size(base_lo, size, size_bits);
- val = map_to_field(val, size_bits);
- mv64x60_write(bh, size_reg, val);
- }
-
- (void)mv64x60_read(bh, base_lo_reg); /* Flush FIFO */
- }
-}
-
-/*
- * mv64x60_mask()
- *
- * Take the high-order 'num_bits' of 'val' & mask off low bits.
- */
-u32 __init
-mv64x60_mask(u32 val, u32 num_bits)
-{
- return val & (0xffffffff << (32 - num_bits));
-}
-
-/*
- * mv64x60_shift_left()
- *
- * Take the low-order 'num_bits' of 'val', shift left to align at bit 31 (MSB).
- */
-u32 __init
-mv64x60_shift_left(u32 val, u32 num_bits)
-{
- return val << (32 - num_bits);
-}
-
-/*
- * mv64x60_shift_right()
- *
- * Take the high-order 'num_bits' of 'val', shift right to align at bit 0 (LSB).
- */
-u32 __init
-mv64x60_shift_right(u32 val, u32 num_bits)
-{
- return val >> (32 - num_bits);
-}
-
-/*
- *****************************************************************************
- *
- * Chip Identification Routines
- *
- *****************************************************************************
- */
-/*
- * mv64x60_get_type()
- *
- * Determine the type of bridge chip we have.
- */
-int __init
-mv64x60_get_type(struct mv64x60_handle *bh)
-{
- struct pci_controller hose;
- u16 val;
- u8 save_exclude;
-
- memset(&hose, 0, sizeof(hose));
- setup_indirect_pci_nomap(&hose, bh->v_base + MV64x60_PCI0_CONFIG_ADDR,
- bh->v_base + MV64x60_PCI0_CONFIG_DATA);
-
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- /* Sanity check of bridge's Vendor ID */
- early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID, &val);
-
- if (val != PCI_VENDOR_ID_MARVELL) {
- mv64x60_pci_exclude_bridge = save_exclude;
- return -1;
- }
-
- /* Get the revision of the chip */
- early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_CLASS_REVISION,
- &val);
- bh->rev = (u32)(val & 0xff);
-
- /* Figure out the type of Marvell bridge it is */
- early_read_config_word(&hose, 0, PCI_DEVFN(0, 0), PCI_DEVICE_ID, &val);
- mv64x60_pci_exclude_bridge = save_exclude;
-
- switch (val) {
- case PCI_DEVICE_ID_MARVELL_GT64260:
- switch (bh->rev) {
- case GT64260_REV_A:
- bh->type = MV64x60_TYPE_GT64260A;
- break;
-
- default:
- printk(KERN_WARNING "Unsupported GT64260 rev %04x\n",
- bh->rev);
- /* Assume its similar to a 'B' rev and fallthru */
- case GT64260_REV_B:
- bh->type = MV64x60_TYPE_GT64260B;
- break;
- }
- break;
-
- case PCI_DEVICE_ID_MARVELL_MV64360:
- /* Marvell won't tell me how to distinguish a 64361 & 64362 */
- bh->type = MV64x60_TYPE_MV64360;
- break;
-
- case PCI_DEVICE_ID_MARVELL_MV64460:
- bh->type = MV64x60_TYPE_MV64460;
- break;
-
- default:
- printk(KERN_ERR "Unknown Marvell bridge type %04x\n", val);
- return -1;
- }
-
- /* Hang onto bridge type & rev for PIC code */
- mv64x60_bridge_type = bh->type;
- mv64x60_bridge_rev = bh->rev;
-
- return 0;
-}
-
-/*
- * mv64x60_setup_for_chip()
- *
- * Set 'bh' to use the proper set of routine for the bridge chip that we have.
- */
-int __init
-mv64x60_setup_for_chip(struct mv64x60_handle *bh)
-{
- int rc = 0;
-
- /* Set up chip-specific info based on the chip/bridge type */
- switch(bh->type) {
- case MV64x60_TYPE_GT64260A:
- bh->ci = >64260a_ci;
- break;
-
- case MV64x60_TYPE_GT64260B:
- bh->ci = >64260b_ci;
- break;
-
- case MV64x60_TYPE_MV64360:
- bh->ci = &mv64360_ci;
- break;
-
- case MV64x60_TYPE_MV64460:
- bh->ci = &mv64460_ci;
- break;
-
- case MV64x60_TYPE_INVALID:
- default:
- if (ppc_md.progress)
- ppc_md.progress("mv64x60: Unsupported bridge", 0x0);
- printk(KERN_ERR "mv64x60: Unsupported bridge\n");
- rc = -1;
- }
-
- return rc;
-}
-
-/*
- * mv64x60_get_bridge_vbase()
- *
- * Return the virtual address of the bridge's registers.
- */
-void __iomem *
-mv64x60_get_bridge_vbase(void)
-{
- return mv64x60_bridge_vbase;
-}
-
-/*
- * mv64x60_get_bridge_type()
- *
- * Return the type of bridge on the platform.
- */
-u32
-mv64x60_get_bridge_type(void)
-{
- return mv64x60_bridge_type;
-}
-
-/*
- * mv64x60_get_bridge_rev()
- *
- * Return the revision of the bridge on the platform.
- */
-u32
-mv64x60_get_bridge_rev(void)
-{
- return mv64x60_bridge_rev;
-}
-
-/*
- *****************************************************************************
- *
- * System Memory Window Related Routines
- *
- *****************************************************************************
- */
-/*
- * mv64x60_get_mem_size()
- *
- * Calculate the amount of memory that the memory controller is set up for.
- * This should only be used by board-specific code if there is no other
- * way to determine the amount of memory in the system.
- */
-u32 __init
-mv64x60_get_mem_size(u32 bridge_base, u32 chip_type)
-{
- struct mv64x60_handle bh;
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2];
- u32 rc = 0;
-
- memset(&bh, 0, sizeof(bh));
-
- bh.type = chip_type;
- bh.v_base = (void *)bridge_base;
-
- if (!mv64x60_setup_for_chip(&bh)) {
- mv64x60_get_mem_windows(&bh, mem_windows);
- rc = mv64x60_calc_mem_size(&bh, mem_windows);
- }
-
- return rc;
-}
-
-/*
- * mv64x60_get_mem_windows()
- *
- * Get the values in the memory controller & return in the 'mem_windows' array.
- */
-void __init
-mv64x60_get_mem_windows(struct mv64x60_handle *bh,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2])
-{
- u32 i, win;
-
- for (win=MV64x60_CPU2MEM_0_WIN,i=0;win<=MV64x60_CPU2MEM_3_WIN;win++,i++)
- if (bh->ci->is_enabled_32bit(bh, win))
- mv64x60_get_32bit_window(bh, win,
- &mem_windows[i][0], &mem_windows[i][1]);
- else {
- mem_windows[i][0] = 0;
- mem_windows[i][1] = 0;
- }
-}
-
-/*
- * mv64x60_calc_mem_size()
- *
- * Using the memory controller register values in 'mem_windows', determine
- * how much memory it is set up for.
- */
-u32 __init
-mv64x60_calc_mem_size(struct mv64x60_handle *bh,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2])
-{
- u32 i, total = 0;
-
- for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++)
- total += mem_windows[i][1];
-
- return total;
-}
-
-/*
- *****************************************************************************
- *
- * CPU->System MEM, PCI Config Routines
- *
- *****************************************************************************
- */
-/*
- * mv64x60_config_cpu2mem_windows()
- *
- * Configure CPU->Memory windows on the bridge.
- */
-static u32 prot_tab[] __initdata = {
- MV64x60_CPU_PROT_0_WIN, MV64x60_CPU_PROT_1_WIN,
- MV64x60_CPU_PROT_2_WIN, MV64x60_CPU_PROT_3_WIN
-};
-
-static u32 cpu_snoop_tab[] __initdata = {
- MV64x60_CPU_SNOOP_0_WIN, MV64x60_CPU_SNOOP_1_WIN,
- MV64x60_CPU_SNOOP_2_WIN, MV64x60_CPU_SNOOP_3_WIN
-};
-
-void __init
-mv64x60_config_cpu2mem_windows(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2])
-{
- u32 i, win;
-
- /* Set CPU protection & snoop windows */
- for (win=MV64x60_CPU2MEM_0_WIN,i=0;win<=MV64x60_CPU2MEM_3_WIN;win++,i++)
- if (bh->ci->is_enabled_32bit(bh, win)) {
- mv64x60_set_32bit_window(bh, prot_tab[i],
- mem_windows[i][0], mem_windows[i][1],
- si->cpu_prot_options[i]);
- bh->ci->enable_window_32bit(bh, prot_tab[i]);
-
- if (bh->ci->window_tab_32bit[cpu_snoop_tab[i]].
- base_reg != 0) {
- mv64x60_set_32bit_window(bh, cpu_snoop_tab[i],
- mem_windows[i][0], mem_windows[i][1],
- si->cpu_snoop_options[i]);
- bh->ci->enable_window_32bit(bh,
- cpu_snoop_tab[i]);
- }
-
- }
-}
-
-/*
- * mv64x60_config_cpu2pci_windows()
- *
- * Configure the CPU->PCI windows for one of the PCI buses.
- */
-static u32 win_tab[2][4] __initdata = {
- { MV64x60_CPU2PCI0_IO_WIN, MV64x60_CPU2PCI0_MEM_0_WIN,
- MV64x60_CPU2PCI0_MEM_1_WIN, MV64x60_CPU2PCI0_MEM_2_WIN },
- { MV64x60_CPU2PCI1_IO_WIN, MV64x60_CPU2PCI1_MEM_0_WIN,
- MV64x60_CPU2PCI1_MEM_1_WIN, MV64x60_CPU2PCI1_MEM_2_WIN },
-};
-
-static u32 remap_tab[2][4] __initdata = {
- { MV64x60_CPU2PCI0_IO_REMAP_WIN, MV64x60_CPU2PCI0_MEM_0_REMAP_WIN,
- MV64x60_CPU2PCI0_MEM_1_REMAP_WIN, MV64x60_CPU2PCI0_MEM_2_REMAP_WIN },
- { MV64x60_CPU2PCI1_IO_REMAP_WIN, MV64x60_CPU2PCI1_MEM_0_REMAP_WIN,
- MV64x60_CPU2PCI1_MEM_1_REMAP_WIN, MV64x60_CPU2PCI1_MEM_2_REMAP_WIN }
-};
-
-void __init
-mv64x60_config_cpu2pci_windows(struct mv64x60_handle *bh,
- struct mv64x60_pci_info *pi, u32 bus)
-{
- int i;
-
- if (pi->pci_io.size > 0) {
- mv64x60_set_32bit_window(bh, win_tab[bus][0],
- pi->pci_io.cpu_base, pi->pci_io.size, pi->pci_io.swap);
- mv64x60_set_32bit_window(bh, remap_tab[bus][0],
- pi->pci_io.pci_base_lo, 0, 0);
- bh->ci->enable_window_32bit(bh, win_tab[bus][0]);
- } else /* Actually, the window should already be disabled */
- bh->ci->disable_window_32bit(bh, win_tab[bus][0]);
-
- for (i=0; i<3; i++)
- if (pi->pci_mem[i].size > 0) {
- mv64x60_set_32bit_window(bh, win_tab[bus][i+1],
- pi->pci_mem[i].cpu_base, pi->pci_mem[i].size,
- pi->pci_mem[i].swap);
- mv64x60_set_64bit_window(bh, remap_tab[bus][i+1],
- pi->pci_mem[i].pci_base_hi,
- pi->pci_mem[i].pci_base_lo, 0, 0);
- bh->ci->enable_window_32bit(bh, win_tab[bus][i+1]);
- } else /* Actually, the window should already be disabled */
- bh->ci->disable_window_32bit(bh, win_tab[bus][i+1]);
-}
-
-/*
- *****************************************************************************
- *
- * PCI->System MEM Config Routines
- *
- *****************************************************************************
- */
-/*
- * mv64x60_config_pci2mem_windows()
- *
- * Configure the PCI->Memory windows on the bridge.
- */
-static u32 pci_acc_tab[2][4] __initdata = {
- { MV64x60_PCI02MEM_ACC_CNTL_0_WIN, MV64x60_PCI02MEM_ACC_CNTL_1_WIN,
- MV64x60_PCI02MEM_ACC_CNTL_2_WIN, MV64x60_PCI02MEM_ACC_CNTL_3_WIN },
- { MV64x60_PCI12MEM_ACC_CNTL_0_WIN, MV64x60_PCI12MEM_ACC_CNTL_1_WIN,
- MV64x60_PCI12MEM_ACC_CNTL_2_WIN, MV64x60_PCI12MEM_ACC_CNTL_3_WIN }
-};
-
-static u32 pci_snoop_tab[2][4] __initdata = {
- { MV64x60_PCI02MEM_SNOOP_0_WIN, MV64x60_PCI02MEM_SNOOP_1_WIN,
- MV64x60_PCI02MEM_SNOOP_2_WIN, MV64x60_PCI02MEM_SNOOP_3_WIN },
- { MV64x60_PCI12MEM_SNOOP_0_WIN, MV64x60_PCI12MEM_SNOOP_1_WIN,
- MV64x60_PCI12MEM_SNOOP_2_WIN, MV64x60_PCI12MEM_SNOOP_3_WIN }
-};
-
-static u32 pci_size_tab[2][4] __initdata = {
- { MV64x60_PCI0_MEM_0_SIZE, MV64x60_PCI0_MEM_1_SIZE,
- MV64x60_PCI0_MEM_2_SIZE, MV64x60_PCI0_MEM_3_SIZE },
- { MV64x60_PCI1_MEM_0_SIZE, MV64x60_PCI1_MEM_1_SIZE,
- MV64x60_PCI1_MEM_2_SIZE, MV64x60_PCI1_MEM_3_SIZE }
-};
-
-void __init
-mv64x60_config_pci2mem_windows(struct mv64x60_handle *bh,
- struct pci_controller *hose, struct mv64x60_pci_info *pi,
- u32 bus, u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2])
-{
- u32 i, win;
-
- /*
- * Set the access control, snoop, BAR size, and window base addresses.
- * PCI->MEM windows base addresses will match exactly what the
- * CPU->MEM windows are.
- */
- for (win=MV64x60_CPU2MEM_0_WIN,i=0;win<=MV64x60_CPU2MEM_3_WIN;win++,i++)
- if (bh->ci->is_enabled_32bit(bh, win)) {
- mv64x60_set_64bit_window(bh,
- pci_acc_tab[bus][i], 0,
- mem_windows[i][0], mem_windows[i][1],
- pi->acc_cntl_options[i]);
- bh->ci->enable_window_64bit(bh, pci_acc_tab[bus][i]);
-
- if (bh->ci->window_tab_64bit[
- pci_snoop_tab[bus][i]].base_lo_reg != 0) {
-
- mv64x60_set_64bit_window(bh,
- pci_snoop_tab[bus][i], 0,
- mem_windows[i][0], mem_windows[i][1],
- pi->snoop_options[i]);
- bh->ci->enable_window_64bit(bh,
- pci_snoop_tab[bus][i]);
- }
-
- bh->ci->set_pci2mem_window(hose, bus, i,
- mem_windows[i][0]);
- mv64x60_write(bh, pci_size_tab[bus][i],
- mv64x60_mask(mem_windows[i][1] - 1, 20));
-
- /* Enable the window */
- mv64x60_clr_bits(bh, ((bus == 0) ?
- MV64x60_PCI0_BAR_ENABLE :
- MV64x60_PCI1_BAR_ENABLE), (1 << i));
- }
-}
-
-/*
- *****************************************************************************
- *
- * Hose & Resource Alloc/Init Routines
- *
- *****************************************************************************
- */
-/*
- * mv64x60_alloc_hoses()
- *
- * Allocate the PCI hose structures for the bridge's PCI buses.
- */
-void __init
-mv64x60_alloc_hose(struct mv64x60_handle *bh, u32 cfg_addr, u32 cfg_data,
- struct pci_controller **hose)
-{
- *hose = pcibios_alloc_controller();
- setup_indirect_pci_nomap(*hose, bh->v_base + cfg_addr,
- bh->v_base + cfg_data);
-}
-
-/*
- * mv64x60_config_resources()
- *
- * Calculate the offsets, etc. for the hose structures to reflect all of
- * the address remapping that happens as you go from CPU->PCI and PCI->MEM.
- */
-void __init
-mv64x60_config_resources(struct pci_controller *hose,
- struct mv64x60_pci_info *pi, u32 io_base)
-{
- int i;
- /* 2 hoses; 4 resources/hose; string <= 64 bytes */
- static char s[2][4][64];
-
- if (pi->pci_io.size != 0) {
- sprintf(s[hose->index][0], "PCI hose %d I/O Space",
- hose->index);
- pci_init_resource(&hose->io_resource, io_base - isa_io_base,
- io_base - isa_io_base + pi->pci_io.size - 1,
- IORESOURCE_IO, s[hose->index][0]);
- hose->io_space.start = pi->pci_io.pci_base_lo;
- hose->io_space.end = pi->pci_io.pci_base_lo + pi->pci_io.size-1;
- hose->io_base_phys = pi->pci_io.cpu_base;
- hose->io_base_virt = (void *)isa_io_base;
- }
-
- for (i=0; i<3; i++)
- if (pi->pci_mem[i].size != 0) {
- sprintf(s[hose->index][i+1], "PCI hose %d MEM Space %d",
- hose->index, i);
- pci_init_resource(&hose->mem_resources[i],
- pi->pci_mem[i].cpu_base,
- pi->pci_mem[i].cpu_base + pi->pci_mem[i].size-1,
- IORESOURCE_MEM, s[hose->index][i+1]);
- }
-
- hose->mem_space.end = pi->pci_mem[0].pci_base_lo +
- pi->pci_mem[0].size - 1;
- hose->pci_mem_offset = pi->pci_mem[0].cpu_base -
- pi->pci_mem[0].pci_base_lo;
-}
-
-/*
- * mv64x60_config_pci_params()
- *
- * Configure a hose's PCI config space parameters.
- */
-void __init
-mv64x60_config_pci_params(struct pci_controller *hose,
- struct mv64x60_pci_info *pi)
-{
- u32 devfn;
- u16 u16_val;
- u8 save_exclude;
-
- devfn = PCI_DEVFN(0,0);
-
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
-
- /* Set class code to indicate host bridge */
- u16_val = PCI_CLASS_BRIDGE_HOST; /* 0x0600 (host bridge) */
- early_write_config_word(hose, 0, devfn, PCI_CLASS_DEVICE, u16_val);
-
- /* Enable bridge to be PCI master & respond to PCI MEM cycles */
- early_read_config_word(hose, 0, devfn, PCI_COMMAND, &u16_val);
- u16_val &= ~(PCI_COMMAND_IO | PCI_COMMAND_INVALIDATE |
- PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK);
- u16_val |= pi->pci_cmd_bits | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- early_write_config_word(hose, 0, devfn, PCI_COMMAND, u16_val);
-
- /* Set latency timer, cache line size, clear BIST */
- u16_val = (pi->latency_timer << 8) | (L1_CACHE_BYTES >> 2);
- early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val);
-
- mv64x60_pci_exclude_bridge = save_exclude;
-}
-
-/*
- *****************************************************************************
- *
- * PCI Related Routine
- *
- *****************************************************************************
- */
-/*
- * mv64x60_set_bus()
- *
- * Set the bus number for the hose directly under the bridge.
- */
-void __init
-mv64x60_set_bus(struct mv64x60_handle *bh, u32 bus, u32 child_bus)
-{
- struct pci_controller *hose;
- u32 pci_mode, p2p_cfg, pci_cfg_offset, val;
- u8 save_exclude;
-
- if (bus == 0) {
- pci_mode = bh->pci_mode_a;
- p2p_cfg = MV64x60_PCI0_P2P_CONFIG;
- pci_cfg_offset = 0x64;
- hose = bh->hose_a;
- } else {
- pci_mode = bh->pci_mode_b;
- p2p_cfg = MV64x60_PCI1_P2P_CONFIG;
- pci_cfg_offset = 0xe4;
- hose = bh->hose_b;
- }
-
- child_bus &= 0xff;
- val = mv64x60_read(bh, p2p_cfg);
-
- if (pci_mode == MV64x60_PCIMODE_CONVENTIONAL) {
- val &= 0xe0000000; /* Force dev num to 0, turn off P2P bridge */
- val |= (child_bus << 16) | 0xff;
- mv64x60_write(bh, p2p_cfg, val);
- (void)mv64x60_read(bh, p2p_cfg); /* Flush FIFO */
- } else { /* PCI-X */
- /*
- * Need to use the current bus/dev number (that's in the
- * P2P CONFIG reg) to access the bridge's pci config space.
- */
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- early_write_config_dword(hose, (val & 0x00ff0000) >> 16,
- PCI_DEVFN(((val & 0x1f000000) >> 24), 0),
- pci_cfg_offset, child_bus << 8);
- mv64x60_pci_exclude_bridge = save_exclude;
- }
-}
-
-/*
- * mv64x60_pci_exclude_device()
- *
- * This routine is used to make the bridge not appear when the
- * PCI subsystem is accessing PCI devices (in PCI config space).
- */
-int
-mv64x60_pci_exclude_device(u8 bus, u8 devfn)
-{
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
-
- /* Skip slot 0 on both hoses */
- if ((mv64x60_pci_exclude_bridge == 1) && (PCI_SLOT(devfn) == 0) &&
- (hose->first_busno == bus))
-
- return PCIBIOS_DEVICE_NOT_FOUND;
- else
- return PCIBIOS_SUCCESSFUL;
-} /* mv64x60_pci_exclude_device() */
-
-/*
- *****************************************************************************
- *
- * Platform Device Routines
- *
- *****************************************************************************
- */
-
-/*
- * mv64x60_pd_fixup()
- *
- * Need to add the base addr of where the bridge's regs are mapped in the
- * physical addr space so drivers can ioremap() them.
- */
-void __init
-mv64x60_pd_fixup(struct mv64x60_handle *bh, struct platform_device *pd_devs[],
- u32 entries)
-{
- struct resource *r;
- u32 i, j;
-
- for (i=0; i<entries; i++) {
- j = 0;
-
- while ((r = platform_get_resource(pd_devs[i],IORESOURCE_MEM,j))
- != NULL) {
-
- r->start += bh->p_base;
- r->end += bh->p_base;
- j++;
- }
- }
-}
-
-/*
- * mv64x60_add_pds()
- *
- * Add the mv64x60 platform devices to the list of platform devices.
- */
-static int __init
-mv64x60_add_pds(void)
-{
- return platform_add_devices(mv64x60_pd_devs,
- ARRAY_SIZE(mv64x60_pd_devs));
-}
-arch_initcall(mv64x60_add_pds);
-
-/*
- *****************************************************************************
- *
- * GT64260-Specific Routines
- *
- *****************************************************************************
- */
-/*
- * gt64260_translate_size()
- *
- * On the GT64260, the size register is really the "top" address of the window.
- */
-static u32 __init
-gt64260_translate_size(u32 base, u32 size, u32 num_bits)
-{
- return base + mv64x60_mask(size - 1, num_bits);
-}
-
-/*
- * gt64260_untranslate_size()
- *
- * Translate the top address of a window into a window size.
- */
-static u32 __init
-gt64260_untranslate_size(u32 base, u32 size, u32 num_bits)
-{
- if (size >= base)
- size = size - base + (1 << (32 - num_bits));
- else
- size = 0;
-
- return size;
-}
-
-/*
- * gt64260_set_pci2mem_window()
- *
- * The PCI->MEM window registers are actually in PCI config space so need
- * to set them by setting the correct config space BARs.
- */
-static u32 gt64260_reg_addrs[2][4] __initdata = {
- { 0x10, 0x14, 0x18, 0x1c }, { 0x90, 0x94, 0x98, 0x9c }
-};
-
-static void __init
-gt64260_set_pci2mem_window(struct pci_controller *hose, u32 bus, u32 window,
- u32 base)
-{
- u8 save_exclude;
-
- pr_debug("set pci->mem window: %d, hose: %d, base: 0x%x\n", window,
- hose->index, base);
-
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- early_write_config_dword(hose, 0, PCI_DEVFN(0, 0),
- gt64260_reg_addrs[bus][window], mv64x60_mask(base, 20) | 0x8);
- mv64x60_pci_exclude_bridge = save_exclude;
-}
-
-/*
- * gt64260_set_pci2regs_window()
- *
- * Set where the bridge's registers appear in PCI MEM space.
- */
-static u32 gt64260_offset[2] __initdata = {0x20, 0xa0};
-
-static void __init
-gt64260_set_pci2regs_window(struct mv64x60_handle *bh,
- struct pci_controller *hose, u32 bus, u32 base)
-{
- u8 save_exclude;
-
- pr_debug("set pci->internal regs hose: %d, base: 0x%x\n", hose->index,
- base);
-
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- early_write_config_dword(hose, 0, PCI_DEVFN(0,0), gt64260_offset[bus],
- (base << 16));
- mv64x60_pci_exclude_bridge = save_exclude;
-}
-
-/*
- * gt64260_is_enabled_32bit()
- *
- * On a GT64260, a window is enabled iff its top address is >= to its base
- * address.
- */
-static u32 __init
-gt64260_is_enabled_32bit(struct mv64x60_handle *bh, u32 window)
-{
- u32 rc = 0;
-
- if ((gt64260_32bit_windows[window].base_reg != 0) &&
- (gt64260_32bit_windows[window].size_reg != 0) &&
- ((mv64x60_read(bh, gt64260_32bit_windows[window].size_reg) &
- ((1 << gt64260_32bit_windows[window].size_bits) - 1)) >=
- (mv64x60_read(bh, gt64260_32bit_windows[window].base_reg) &
- ((1 << gt64260_32bit_windows[window].base_bits) - 1))))
-
- rc = 1;
-
- return rc;
-}
-
-/*
- * gt64260_enable_window_32bit()
- *
- * On the GT64260, a window is enabled iff the top address is >= to the base
- * address of the window. Since the window has already been configured by
- * the time this routine is called, we have nothing to do here.
- */
-static void __init
-gt64260_enable_window_32bit(struct mv64x60_handle *bh, u32 window)
-{
- pr_debug("enable 32bit window: %d\n", window);
-}
-
-/*
- * gt64260_disable_window_32bit()
- *
- * On a GT64260, you disable a window by setting its top address to be less
- * than its base address.
- */
-static void __init
-gt64260_disable_window_32bit(struct mv64x60_handle *bh, u32 window)
-{
- pr_debug("disable 32bit window: %d, base_reg: 0x%x, size_reg: 0x%x\n",
- window, gt64260_32bit_windows[window].base_reg,
- gt64260_32bit_windows[window].size_reg);
-
- if ((gt64260_32bit_windows[window].base_reg != 0) &&
- (gt64260_32bit_windows[window].size_reg != 0)) {
-
- /* To disable, make bottom reg higher than top reg */
- mv64x60_write(bh, gt64260_32bit_windows[window].base_reg,0xfff);
- mv64x60_write(bh, gt64260_32bit_windows[window].size_reg, 0);
- }
-}
-
-/*
- * gt64260_enable_window_64bit()
- *
- * On the GT64260, a window is enabled iff the top address is >= to the base
- * address of the window. Since the window has already been configured by
- * the time this routine is called, we have nothing to do here.
- */
-static void __init
-gt64260_enable_window_64bit(struct mv64x60_handle *bh, u32 window)
-{
- pr_debug("enable 64bit window: %d\n", window);
-}
-
-/*
- * gt64260_disable_window_64bit()
- *
- * On a GT64260, you disable a window by setting its top address to be less
- * than its base address.
- */
-static void __init
-gt64260_disable_window_64bit(struct mv64x60_handle *bh, u32 window)
-{
- pr_debug("disable 64bit window: %d, base_reg: 0x%x, size_reg: 0x%x\n",
- window, gt64260_64bit_windows[window].base_lo_reg,
- gt64260_64bit_windows[window].size_reg);
-
- if ((gt64260_64bit_windows[window].base_lo_reg != 0) &&
- (gt64260_64bit_windows[window].size_reg != 0)) {
-
- /* To disable, make bottom reg higher than top reg */
- mv64x60_write(bh, gt64260_64bit_windows[window].base_lo_reg,
- 0xfff);
- mv64x60_write(bh, gt64260_64bit_windows[window].base_hi_reg, 0);
- mv64x60_write(bh, gt64260_64bit_windows[window].size_reg, 0);
- }
-}
-
-/*
- * gt64260_disable_all_windows()
- *
- * The GT64260 has several windows that aren't represented in the table of
- * windows at the top of this file. This routine turns all of them off
- * except for the memory controller windows, of course.
- */
-static void __init
-gt64260_disable_all_windows(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si)
-{
- u32 i, preserve;
-
- /* Disable 32bit windows (don't disable cpu->mem windows) */
- for (i=MV64x60_CPU2DEV_0_WIN; i<MV64x60_32BIT_WIN_COUNT; i++) {
- if (i < 32)
- preserve = si->window_preserve_mask_32_lo & (1 << i);
- else
- preserve = si->window_preserve_mask_32_hi & (1<<(i-32));
-
- if (!preserve)
- gt64260_disable_window_32bit(bh, i);
- }
-
- /* Disable 64bit windows */
- for (i=0; i<MV64x60_64BIT_WIN_COUNT; i++)
- if (!(si->window_preserve_mask_64 & (1<<i)))
- gt64260_disable_window_64bit(bh, i);
-
- /* Turn off cpu protection windows not in gt64260_32bit_windows[] */
- mv64x60_write(bh, GT64260_CPU_PROT_BASE_4, 0xfff);
- mv64x60_write(bh, GT64260_CPU_PROT_SIZE_4, 0);
- mv64x60_write(bh, GT64260_CPU_PROT_BASE_5, 0xfff);
- mv64x60_write(bh, GT64260_CPU_PROT_SIZE_5, 0);
- mv64x60_write(bh, GT64260_CPU_PROT_BASE_6, 0xfff);
- mv64x60_write(bh, GT64260_CPU_PROT_SIZE_6, 0);
- mv64x60_write(bh, GT64260_CPU_PROT_BASE_7, 0xfff);
- mv64x60_write(bh, GT64260_CPU_PROT_SIZE_7, 0);
-
- /* Turn off PCI->MEM access cntl wins not in gt64260_64bit_windows[] */
- mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_4_BASE_LO, 0xfff);
- mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_4_BASE_HI, 0);
- mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_4_SIZE, 0);
- mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_5_BASE_LO, 0xfff);
- mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_5_BASE_HI, 0);
- mv64x60_write(bh, MV64x60_PCI0_ACC_CNTL_5_SIZE, 0);
- mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_6_BASE_LO, 0xfff);
- mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_6_BASE_HI, 0);
- mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_6_SIZE, 0);
- mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_7_BASE_LO, 0xfff);
- mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_7_BASE_HI, 0);
- mv64x60_write(bh, GT64260_PCI0_ACC_CNTL_7_SIZE, 0);
-
- mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_4_BASE_LO, 0xfff);
- mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_4_BASE_HI, 0);
- mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_4_SIZE, 0);
- mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_5_BASE_LO, 0xfff);
- mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_5_BASE_HI, 0);
- mv64x60_write(bh, MV64x60_PCI1_ACC_CNTL_5_SIZE, 0);
- mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_6_BASE_LO, 0xfff);
- mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_6_BASE_HI, 0);
- mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_6_SIZE, 0);
- mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_7_BASE_LO, 0xfff);
- mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_7_BASE_HI, 0);
- mv64x60_write(bh, GT64260_PCI1_ACC_CNTL_7_SIZE, 0);
-
- /* Disable all PCI-><whatever> windows */
- mv64x60_set_bits(bh, MV64x60_PCI0_BAR_ENABLE, 0x07fffdff);
- mv64x60_set_bits(bh, MV64x60_PCI1_BAR_ENABLE, 0x07fffdff);
-
- /*
- * Some firmwares enable a bunch of intr sources
- * for the PCI INT output pins.
- */
- mv64x60_write(bh, GT64260_IC_CPU_INTR_MASK_LO, 0);
- mv64x60_write(bh, GT64260_IC_CPU_INTR_MASK_HI, 0);
- mv64x60_write(bh, GT64260_IC_PCI0_INTR_MASK_LO, 0);
- mv64x60_write(bh, GT64260_IC_PCI0_INTR_MASK_HI, 0);
- mv64x60_write(bh, GT64260_IC_PCI1_INTR_MASK_LO, 0);
- mv64x60_write(bh, GT64260_IC_PCI1_INTR_MASK_HI, 0);
- mv64x60_write(bh, GT64260_IC_CPU_INT_0_MASK, 0);
- mv64x60_write(bh, GT64260_IC_CPU_INT_1_MASK, 0);
- mv64x60_write(bh, GT64260_IC_CPU_INT_2_MASK, 0);
- mv64x60_write(bh, GT64260_IC_CPU_INT_3_MASK, 0);
-}
-
-/*
- * gt64260a_chip_specific_init()
- *
- * Implement errata workarounds for the GT64260A.
- */
-static void __init
-gt64260a_chip_specific_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si)
-{
-#ifdef CONFIG_SERIAL_MPSC
- struct resource *r;
-#endif
-#if !defined(CONFIG_NOT_COHERENT_CACHE)
- u32 val;
- u8 save_exclude;
-#endif
-
- if (si->pci_0.enable_bus)
- mv64x60_set_bits(bh, MV64x60_PCI0_CMD,
- ((1<<4) | (1<<5) | (1<<9) | (1<<13)));
-
- if (si->pci_1.enable_bus)
- mv64x60_set_bits(bh, MV64x60_PCI1_CMD,
- ((1<<4) | (1<<5) | (1<<9) | (1<<13)));
-
- /*
- * Dave Wilhardt found that bit 4 in the PCI Command registers must
- * be set if you are using cache coherency.
- */
-#if !defined(CONFIG_NOT_COHERENT_CACHE)
- /* Res #MEM-4 -- cpu read buffer to buffer 1 */
- if ((mv64x60_read(bh, MV64x60_CPU_MODE) & 0xf0) == 0x40)
- mv64x60_set_bits(bh, GT64260_SDRAM_CONFIG, (1<<26));
-
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- if (si->pci_0.enable_bus) {
- early_read_config_dword(bh->hose_a, 0, PCI_DEVFN(0,0),
- PCI_COMMAND, &val);
- val |= PCI_COMMAND_INVALIDATE;
- early_write_config_dword(bh->hose_a, 0, PCI_DEVFN(0,0),
- PCI_COMMAND, val);
- }
-
- if (si->pci_1.enable_bus) {
- early_read_config_dword(bh->hose_b, 0, PCI_DEVFN(0,0),
- PCI_COMMAND, &val);
- val |= PCI_COMMAND_INVALIDATE;
- early_write_config_dword(bh->hose_b, 0, PCI_DEVFN(0,0),
- PCI_COMMAND, val);
- }
- mv64x60_pci_exclude_bridge = save_exclude;
-#endif
-
- /* Disable buffer/descriptor snooping */
- mv64x60_clr_bits(bh, 0xf280, (1<< 6) | (1<<14) | (1<<22) | (1<<30));
- mv64x60_clr_bits(bh, 0xf2c0, (1<< 6) | (1<<14) | (1<<22) | (1<<30));
-
-#ifdef CONFIG_SERIAL_MPSC
- mv64x60_mpsc0_pdata.mirror_regs = 1;
- mv64x60_mpsc0_pdata.cache_mgmt = 1;
- mv64x60_mpsc1_pdata.mirror_regs = 1;
- mv64x60_mpsc1_pdata.cache_mgmt = 1;
-
- if ((r = platform_get_resource(&mpsc1_device, IORESOURCE_IRQ, 0))
- != NULL) {
- r->start = MV64x60_IRQ_SDMA_0;
- r->end = MV64x60_IRQ_SDMA_0;
- }
-#endif
-}
-
-/*
- * gt64260b_chip_specific_init()
- *
- * Implement errata workarounds for the GT64260B.
- */
-static void __init
-gt64260b_chip_specific_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si)
-{
-#ifdef CONFIG_SERIAL_MPSC
- struct resource *r;
-#endif
-#if !defined(CONFIG_NOT_COHERENT_CACHE)
- u32 val;
- u8 save_exclude;
-#endif
-
- if (si->pci_0.enable_bus)
- mv64x60_set_bits(bh, MV64x60_PCI0_CMD,
- ((1<<4) | (1<<5) | (1<<9) | (1<<13)));
-
- if (si->pci_1.enable_bus)
- mv64x60_set_bits(bh, MV64x60_PCI1_CMD,
- ((1<<4) | (1<<5) | (1<<9) | (1<<13)));
-
- /*
- * Dave Wilhardt found that bit 4 in the PCI Command registers must
- * be set if you are using cache coherency.
- */
-#if !defined(CONFIG_NOT_COHERENT_CACHE)
- mv64x60_set_bits(bh, GT64260_CPU_WB_PRIORITY_BUFFER_DEPTH, 0xf);
-
- /* Res #MEM-4 -- cpu read buffer to buffer 1 */
- if ((mv64x60_read(bh, MV64x60_CPU_MODE) & 0xf0) == 0x40)
- mv64x60_set_bits(bh, GT64260_SDRAM_CONFIG, (1<<26));
-
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- if (si->pci_0.enable_bus) {
- early_read_config_dword(bh->hose_a, 0, PCI_DEVFN(0,0),
- PCI_COMMAND, &val);
- val |= PCI_COMMAND_INVALIDATE;
- early_write_config_dword(bh->hose_a, 0, PCI_DEVFN(0,0),
- PCI_COMMAND, val);
- }
-
- if (si->pci_1.enable_bus) {
- early_read_config_dword(bh->hose_b, 0, PCI_DEVFN(0,0),
- PCI_COMMAND, &val);
- val |= PCI_COMMAND_INVALIDATE;
- early_write_config_dword(bh->hose_b, 0, PCI_DEVFN(0,0),
- PCI_COMMAND, val);
- }
- mv64x60_pci_exclude_bridge = save_exclude;
-#endif
-
- /* Disable buffer/descriptor snooping */
- mv64x60_clr_bits(bh, 0xf280, (1<< 6) | (1<<14) | (1<<22) | (1<<30));
- mv64x60_clr_bits(bh, 0xf2c0, (1<< 6) | (1<<14) | (1<<22) | (1<<30));
-
-#ifdef CONFIG_SERIAL_MPSC
- /*
- * The 64260B is not supposed to have the bug where the MPSC & ENET
- * can't access cache coherent regions. However, testing has shown
- * that the MPSC, at least, still has this bug.
- */
- mv64x60_mpsc0_pdata.cache_mgmt = 1;
- mv64x60_mpsc1_pdata.cache_mgmt = 1;
-
- if ((r = platform_get_resource(&mpsc1_device, IORESOURCE_IRQ, 0))
- != NULL) {
- r->start = MV64x60_IRQ_SDMA_0;
- r->end = MV64x60_IRQ_SDMA_0;
- }
-#endif
-}
-
-/*
- *****************************************************************************
- *
- * MV64360-Specific Routines
- *
- *****************************************************************************
- */
-/*
- * mv64360_translate_size()
- *
- * On the MV64360, the size register is set similar to the size you get
- * from a pci config space BAR register. That is, programmed from LSB to MSB
- * as a sequence of 1's followed by a sequence of 0's. IOW, "size -1" with the
- * assumption that the size is a power of 2.
- */
-static u32 __init
-mv64360_translate_size(u32 base_addr, u32 size, u32 num_bits)
-{
- return mv64x60_mask(size - 1, num_bits);
-}
-
-/*
- * mv64360_untranslate_size()
- *
- * Translate the size register value of a window into a window size.
- */
-static u32 __init
-mv64360_untranslate_size(u32 base_addr, u32 size, u32 num_bits)
-{
- if (size > 0) {
- size >>= (32 - num_bits);
- size++;
- size <<= (32 - num_bits);
- }
-
- return size;
-}
-
-/*
- * mv64360_set_pci2mem_window()
- *
- * The PCI->MEM window registers are actually in PCI config space so need
- * to set them by setting the correct config space BARs.
- */
-struct {
- u32 fcn;
- u32 base_hi_bar;
- u32 base_lo_bar;
-} static mv64360_reg_addrs[2][4] __initdata = {
- {{ 0, 0x14, 0x10 }, { 0, 0x1c, 0x18 },
- { 1, 0x14, 0x10 }, { 1, 0x1c, 0x18 }},
- {{ 0, 0x94, 0x90 }, { 0, 0x9c, 0x98 },
- { 1, 0x94, 0x90 }, { 1, 0x9c, 0x98 }}
-};
-
-static void __init
-mv64360_set_pci2mem_window(struct pci_controller *hose, u32 bus, u32 window,
- u32 base)
-{
- u8 save_exclude;
-
- pr_debug("set pci->mem window: %d, hose: %d, base: 0x%x\n", window,
- hose->index, base);
-
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- early_write_config_dword(hose, 0,
- PCI_DEVFN(0, mv64360_reg_addrs[bus][window].fcn),
- mv64360_reg_addrs[bus][window].base_hi_bar, 0);
- early_write_config_dword(hose, 0,
- PCI_DEVFN(0, mv64360_reg_addrs[bus][window].fcn),
- mv64360_reg_addrs[bus][window].base_lo_bar,
- mv64x60_mask(base,20) | 0xc);
- mv64x60_pci_exclude_bridge = save_exclude;
-}
-
-/*
- * mv64360_set_pci2regs_window()
- *
- * Set where the bridge's registers appear in PCI MEM space.
- */
-static u32 mv64360_offset[2][2] __initdata = {{0x20, 0x24}, {0xa0, 0xa4}};
-
-static void __init
-mv64360_set_pci2regs_window(struct mv64x60_handle *bh,
- struct pci_controller *hose, u32 bus, u32 base)
-{
- u8 save_exclude;
-
- pr_debug("set pci->internal regs hose: %d, base: 0x%x\n", hose->index,
- base);
-
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- early_write_config_dword(hose, 0, PCI_DEVFN(0,0),
- mv64360_offset[bus][0], (base << 16));
- early_write_config_dword(hose, 0, PCI_DEVFN(0,0),
- mv64360_offset[bus][1], 0);
- mv64x60_pci_exclude_bridge = save_exclude;
-}
-
-/*
- * mv64360_is_enabled_32bit()
- *
- * On a MV64360, a window is enabled by either clearing a bit in the
- * CPU BAR Enable reg or setting a bit in the window's base reg.
- * Note that this doesn't work for windows on the PCI slave side but we don't
- * check those so its okay.
- */
-static u32 __init
-mv64360_is_enabled_32bit(struct mv64x60_handle *bh, u32 window)
-{
- u32 extra, rc = 0;
-
- if (((mv64360_32bit_windows[window].base_reg != 0) &&
- (mv64360_32bit_windows[window].size_reg != 0)) ||
- (window == MV64x60_CPU2SRAM_WIN)) {
-
- extra = mv64360_32bit_windows[window].extra;
-
- switch (extra & MV64x60_EXTRA_MASK) {
- case MV64x60_EXTRA_CPUWIN_ENAB:
- rc = (mv64x60_read(bh, MV64360_CPU_BAR_ENABLE) &
- (1 << (extra & 0x1f))) == 0;
- break;
-
- case MV64x60_EXTRA_CPUPROT_ENAB:
- rc = (mv64x60_read(bh,
- mv64360_32bit_windows[window].base_reg) &
- (1 << (extra & 0x1f))) != 0;
- break;
-
- case MV64x60_EXTRA_ENET_ENAB:
- rc = (mv64x60_read(bh, MV64360_ENET2MEM_BAR_ENABLE) &
- (1 << (extra & 0x7))) == 0;
- break;
-
- case MV64x60_EXTRA_MPSC_ENAB:
- rc = (mv64x60_read(bh, MV64360_MPSC2MEM_BAR_ENABLE) &
- (1 << (extra & 0x3))) == 0;
- break;
-
- case MV64x60_EXTRA_IDMA_ENAB:
- rc = (mv64x60_read(bh, MV64360_IDMA2MEM_BAR_ENABLE) &
- (1 << (extra & 0x7))) == 0;
- break;
-
- default:
- printk(KERN_ERR "mv64360_is_enabled: %s\n",
- "32bit table corrupted");
- }
- }
-
- return rc;
-}
-
-/*
- * mv64360_enable_window_32bit()
- *
- * On a MV64360, a window is enabled by either clearing a bit in the
- * CPU BAR Enable reg or setting a bit in the window's base reg.
- */
-static void __init
-mv64360_enable_window_32bit(struct mv64x60_handle *bh, u32 window)
-{
- u32 extra;
-
- pr_debug("enable 32bit window: %d\n", window);
-
- if (((mv64360_32bit_windows[window].base_reg != 0) &&
- (mv64360_32bit_windows[window].size_reg != 0)) ||
- (window == MV64x60_CPU2SRAM_WIN)) {
-
- extra = mv64360_32bit_windows[window].extra;
-
- switch (extra & MV64x60_EXTRA_MASK) {
- case MV64x60_EXTRA_CPUWIN_ENAB:
- mv64x60_clr_bits(bh, MV64360_CPU_BAR_ENABLE,
- (1 << (extra & 0x1f)));
- break;
-
- case MV64x60_EXTRA_CPUPROT_ENAB:
- mv64x60_set_bits(bh,
- mv64360_32bit_windows[window].base_reg,
- (1 << (extra & 0x1f)));
- break;
-
- case MV64x60_EXTRA_ENET_ENAB:
- mv64x60_clr_bits(bh, MV64360_ENET2MEM_BAR_ENABLE,
- (1 << (extra & 0x7)));
- break;
-
- case MV64x60_EXTRA_MPSC_ENAB:
- mv64x60_clr_bits(bh, MV64360_MPSC2MEM_BAR_ENABLE,
- (1 << (extra & 0x3)));
- break;
-
- case MV64x60_EXTRA_IDMA_ENAB:
- mv64x60_clr_bits(bh, MV64360_IDMA2MEM_BAR_ENABLE,
- (1 << (extra & 0x7)));
- break;
-
- default:
- printk(KERN_ERR "mv64360_enable: %s\n",
- "32bit table corrupted");
- }
- }
-}
-
-/*
- * mv64360_disable_window_32bit()
- *
- * On a MV64360, a window is disabled by either setting a bit in the
- * CPU BAR Enable reg or clearing a bit in the window's base reg.
- */
-static void __init
-mv64360_disable_window_32bit(struct mv64x60_handle *bh, u32 window)
-{
- u32 extra;
-
- pr_debug("disable 32bit window: %d, base_reg: 0x%x, size_reg: 0x%x\n",
- window, mv64360_32bit_windows[window].base_reg,
- mv64360_32bit_windows[window].size_reg);
-
- if (((mv64360_32bit_windows[window].base_reg != 0) &&
- (mv64360_32bit_windows[window].size_reg != 0)) ||
- (window == MV64x60_CPU2SRAM_WIN)) {
-
- extra = mv64360_32bit_windows[window].extra;
-
- switch (extra & MV64x60_EXTRA_MASK) {
- case MV64x60_EXTRA_CPUWIN_ENAB:
- mv64x60_set_bits(bh, MV64360_CPU_BAR_ENABLE,
- (1 << (extra & 0x1f)));
- break;
-
- case MV64x60_EXTRA_CPUPROT_ENAB:
- mv64x60_clr_bits(bh,
- mv64360_32bit_windows[window].base_reg,
- (1 << (extra & 0x1f)));
- break;
-
- case MV64x60_EXTRA_ENET_ENAB:
- mv64x60_set_bits(bh, MV64360_ENET2MEM_BAR_ENABLE,
- (1 << (extra & 0x7)));
- break;
-
- case MV64x60_EXTRA_MPSC_ENAB:
- mv64x60_set_bits(bh, MV64360_MPSC2MEM_BAR_ENABLE,
- (1 << (extra & 0x3)));
- break;
-
- case MV64x60_EXTRA_IDMA_ENAB:
- mv64x60_set_bits(bh, MV64360_IDMA2MEM_BAR_ENABLE,
- (1 << (extra & 0x7)));
- break;
-
- default:
- printk(KERN_ERR "mv64360_disable: %s\n",
- "32bit table corrupted");
- }
- }
-}
-
-/*
- * mv64360_enable_window_64bit()
- *
- * On the MV64360, a 64-bit window is enabled by setting a bit in the window's
- * base reg.
- */
-static void __init
-mv64360_enable_window_64bit(struct mv64x60_handle *bh, u32 window)
-{
- pr_debug("enable 64bit window: %d\n", window);
-
- if ((mv64360_64bit_windows[window].base_lo_reg!= 0) &&
- (mv64360_64bit_windows[window].size_reg != 0)) {
-
- if ((mv64360_64bit_windows[window].extra & MV64x60_EXTRA_MASK)
- == MV64x60_EXTRA_PCIACC_ENAB)
- mv64x60_set_bits(bh,
- mv64360_64bit_windows[window].base_lo_reg,
- (1 << (mv64360_64bit_windows[window].extra &
- 0x1f)));
- else
- printk(KERN_ERR "mv64360_enable: %s\n",
- "64bit table corrupted");
- }
-}
-
-/*
- * mv64360_disable_window_64bit()
- *
- * On a MV64360, a 64-bit window is disabled by clearing a bit in the window's
- * base reg.
- */
-static void __init
-mv64360_disable_window_64bit(struct mv64x60_handle *bh, u32 window)
-{
- pr_debug("disable 64bit window: %d, base_reg: 0x%x, size_reg: 0x%x\n",
- window, mv64360_64bit_windows[window].base_lo_reg,
- mv64360_64bit_windows[window].size_reg);
-
- if ((mv64360_64bit_windows[window].base_lo_reg != 0) &&
- (mv64360_64bit_windows[window].size_reg != 0)) {
- if ((mv64360_64bit_windows[window].extra & MV64x60_EXTRA_MASK)
- == MV64x60_EXTRA_PCIACC_ENAB)
- mv64x60_clr_bits(bh,
- mv64360_64bit_windows[window].base_lo_reg,
- (1 << (mv64360_64bit_windows[window].extra &
- 0x1f)));
- else
- printk(KERN_ERR "mv64360_disable: %s\n",
- "64bit table corrupted");
- }
-}
-
-/*
- * mv64360_disable_all_windows()
- *
- * The MV64360 has a few windows that aren't represented in the table of
- * windows at the top of this file. This routine turns all of them off
- * except for the memory controller windows, of course.
- */
-static void __init
-mv64360_disable_all_windows(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si)
-{
- u32 preserve, i;
-
- /* Disable 32bit windows (don't disable cpu->mem windows) */
- for (i=MV64x60_CPU2DEV_0_WIN; i<MV64x60_32BIT_WIN_COUNT; i++) {
- if (i < 32)
- preserve = si->window_preserve_mask_32_lo & (1 << i);
- else
- preserve = si->window_preserve_mask_32_hi & (1<<(i-32));
-
- if (!preserve)
- mv64360_disable_window_32bit(bh, i);
- }
-
- /* Disable 64bit windows */
- for (i=0; i<MV64x60_64BIT_WIN_COUNT; i++)
- if (!(si->window_preserve_mask_64 & (1<<i)))
- mv64360_disable_window_64bit(bh, i);
-
- /* Turn off PCI->MEM access cntl wins not in mv64360_64bit_windows[] */
- mv64x60_clr_bits(bh, MV64x60_PCI0_ACC_CNTL_4_BASE_LO, 0);
- mv64x60_clr_bits(bh, MV64x60_PCI0_ACC_CNTL_5_BASE_LO, 0);
- mv64x60_clr_bits(bh, MV64x60_PCI1_ACC_CNTL_4_BASE_LO, 0);
- mv64x60_clr_bits(bh, MV64x60_PCI1_ACC_CNTL_5_BASE_LO, 0);
-
- /* Disable all PCI-><whatever> windows */
- mv64x60_set_bits(bh, MV64x60_PCI0_BAR_ENABLE, 0x0000f9ff);
- mv64x60_set_bits(bh, MV64x60_PCI1_BAR_ENABLE, 0x0000f9ff);
-}
-
-/*
- * mv64360_config_io2mem_windows()
- *
- * ENET, MPSC, and IDMA ctlrs on the MV64[34]60 have separate windows that
- * must be set up so that the respective ctlr can access system memory.
- */
-static u32 enet_tab[MV64x60_CPU2MEM_WINDOWS] __initdata = {
- MV64x60_ENET2MEM_0_WIN, MV64x60_ENET2MEM_1_WIN,
- MV64x60_ENET2MEM_2_WIN, MV64x60_ENET2MEM_3_WIN,
-};
-
-static u32 mpsc_tab[MV64x60_CPU2MEM_WINDOWS] __initdata = {
- MV64x60_MPSC2MEM_0_WIN, MV64x60_MPSC2MEM_1_WIN,
- MV64x60_MPSC2MEM_2_WIN, MV64x60_MPSC2MEM_3_WIN,
-};
-
-static u32 idma_tab[MV64x60_CPU2MEM_WINDOWS] __initdata = {
- MV64x60_IDMA2MEM_0_WIN, MV64x60_IDMA2MEM_1_WIN,
- MV64x60_IDMA2MEM_2_WIN, MV64x60_IDMA2MEM_3_WIN,
-};
-
-static u32 dram_selects[MV64x60_CPU2MEM_WINDOWS] __initdata =
- { 0xe, 0xd, 0xb, 0x7 };
-
-static void __init
-mv64360_config_io2mem_windows(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2])
-{
- u32 i, win;
-
- pr_debug("config_io2regs_windows: enet, mpsc, idma -> bridge regs\n");
-
- mv64x60_write(bh, MV64360_ENET2MEM_ACC_PROT_0, 0);
- mv64x60_write(bh, MV64360_ENET2MEM_ACC_PROT_1, 0);
- mv64x60_write(bh, MV64360_ENET2MEM_ACC_PROT_2, 0);
-
- mv64x60_write(bh, MV64360_MPSC2MEM_ACC_PROT_0, 0);
- mv64x60_write(bh, MV64360_MPSC2MEM_ACC_PROT_1, 0);
-
- mv64x60_write(bh, MV64360_IDMA2MEM_ACC_PROT_0, 0);
- mv64x60_write(bh, MV64360_IDMA2MEM_ACC_PROT_1, 0);
- mv64x60_write(bh, MV64360_IDMA2MEM_ACC_PROT_2, 0);
- mv64x60_write(bh, MV64360_IDMA2MEM_ACC_PROT_3, 0);
-
- /* Assume that mem ctlr has no more windows than embedded I/O ctlr */
- for (win=MV64x60_CPU2MEM_0_WIN,i=0;win<=MV64x60_CPU2MEM_3_WIN;win++,i++)
- if (bh->ci->is_enabled_32bit(bh, win)) {
- mv64x60_set_32bit_window(bh, enet_tab[i],
- mem_windows[i][0], mem_windows[i][1],
- (dram_selects[i] << 8) |
- (si->enet_options[i] & 0x3000));
- bh->ci->enable_window_32bit(bh, enet_tab[i]);
-
- /* Give enet r/w access to memory region */
- mv64x60_set_bits(bh, MV64360_ENET2MEM_ACC_PROT_0,
- (0x3 << (i << 1)));
- mv64x60_set_bits(bh, MV64360_ENET2MEM_ACC_PROT_1,
- (0x3 << (i << 1)));
- mv64x60_set_bits(bh, MV64360_ENET2MEM_ACC_PROT_2,
- (0x3 << (i << 1)));
-
- mv64x60_set_32bit_window(bh, mpsc_tab[i],
- mem_windows[i][0], mem_windows[i][1],
- (dram_selects[i] << 8) |
- (si->mpsc_options[i] & 0x3000));
- bh->ci->enable_window_32bit(bh, mpsc_tab[i]);
-
- /* Give mpsc r/w access to memory region */
- mv64x60_set_bits(bh, MV64360_MPSC2MEM_ACC_PROT_0,
- (0x3 << (i << 1)));
- mv64x60_set_bits(bh, MV64360_MPSC2MEM_ACC_PROT_1,
- (0x3 << (i << 1)));
-
- mv64x60_set_32bit_window(bh, idma_tab[i],
- mem_windows[i][0], mem_windows[i][1],
- (dram_selects[i] << 8) |
- (si->idma_options[i] & 0x3000));
- bh->ci->enable_window_32bit(bh, idma_tab[i]);
-
- /* Give idma r/w access to memory region */
- mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_0,
- (0x3 << (i << 1)));
- mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_1,
- (0x3 << (i << 1)));
- mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_2,
- (0x3 << (i << 1)));
- mv64x60_set_bits(bh, MV64360_IDMA2MEM_ACC_PROT_3,
- (0x3 << (i << 1)));
- }
-}
-
-/*
- * mv64360_set_mpsc2regs_window()
- *
- * MPSC has a window to the bridge's internal registers. Call this routine
- * to change that window so it doesn't conflict with the windows mapping the
- * mpsc to system memory.
- */
-static void __init
-mv64360_set_mpsc2regs_window(struct mv64x60_handle *bh, u32 base)
-{
- pr_debug("set mpsc->internal regs, base: 0x%x\n", base);
- mv64x60_write(bh, MV64360_MPSC2REGS_BASE, base & 0xffff0000);
-}
-
-/*
- * mv64360_chip_specific_init()
- *
- * Implement errata workarounds for the MV64360.
- */
-static void __init
-mv64360_chip_specific_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si)
-{
-#if !defined(CONFIG_NOT_COHERENT_CACHE)
- mv64x60_set_bits(bh, MV64360_D_UNIT_CONTROL_HIGH, (1<<24));
-#endif
-#ifdef CONFIG_SERIAL_MPSC
- mv64x60_mpsc0_pdata.brg_can_tune = 1;
- mv64x60_mpsc0_pdata.cache_mgmt = 1;
- mv64x60_mpsc1_pdata.brg_can_tune = 1;
- mv64x60_mpsc1_pdata.cache_mgmt = 1;
-#endif
-}
-
-/*
- * mv64460_chip_specific_init()
- *
- * Implement errata workarounds for the MV64460.
- */
-static void __init
-mv64460_chip_specific_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si)
-{
-#if !defined(CONFIG_NOT_COHERENT_CACHE)
- mv64x60_set_bits(bh, MV64360_D_UNIT_CONTROL_HIGH, (1<<24) | (1<<25));
- mv64x60_set_bits(bh, MV64460_D_UNIT_MMASK, (1<<1) | (1<<4));
-#endif
-#ifdef CONFIG_SERIAL_MPSC
- mv64x60_mpsc0_pdata.brg_can_tune = 1;
- mv64x60_mpsc0_pdata.cache_mgmt = 1;
- mv64x60_mpsc1_pdata.brg_can_tune = 1;
- mv64x60_mpsc1_pdata.cache_mgmt = 1;
-#endif
-}
-
-
-#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
-/* Export the hotswap register via sysfs for enum event monitoring */
-#define VAL_LEN_MAX 11 /* 32-bit hex or dec stringified number + '\n' */
-
-static DEFINE_MUTEX(mv64xxx_hs_lock);
-
-static ssize_t
-mv64xxx_hs_reg_read(struct kobject *kobj, char *buf, loff_t off, size_t count)
-{
- u32 v;
- u8 save_exclude;
-
- if (off > 0)
- return 0;
- if (count < VAL_LEN_MAX)
- return -EINVAL;
-
- if (mutex_lock_interruptible(&mv64xxx_hs_lock))
- return -ERESTARTSYS;
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- early_read_config_dword(&sysfs_hose_a, 0, PCI_DEVFN(0, 0),
- MV64360_PCICFG_CPCI_HOTSWAP, &v);
- mv64x60_pci_exclude_bridge = save_exclude;
- mutex_unlock(&mv64xxx_hs_lock);
-
- return sprintf(buf, "0x%08x\n", v);
-}
-
-static ssize_t
-mv64xxx_hs_reg_write(struct kobject *kobj, char *buf, loff_t off, size_t count)
-{
- u32 v;
- u8 save_exclude;
-
- if (off > 0)
- return 0;
- if (count <= 0)
- return -EINVAL;
-
- if (sscanf(buf, "%i", &v) == 1) {
- if (mutex_lock_interruptible(&mv64xxx_hs_lock))
- return -ERESTARTSYS;
- save_exclude = mv64x60_pci_exclude_bridge;
- mv64x60_pci_exclude_bridge = 0;
- early_write_config_dword(&sysfs_hose_a, 0, PCI_DEVFN(0, 0),
- MV64360_PCICFG_CPCI_HOTSWAP, v);
- mv64x60_pci_exclude_bridge = save_exclude;
- mutex_unlock(&mv64xxx_hs_lock);
- }
- else
- count = -EINVAL;
-
- return count;
-}
-
-static struct bin_attribute mv64xxx_hs_reg_attr = { /* Hotswap register */
- .attr = {
- .name = "hs_reg",
- .mode = S_IRUGO | S_IWUSR,
- },
- .size = VAL_LEN_MAX,
- .read = mv64xxx_hs_reg_read,
- .write = mv64xxx_hs_reg_write,
-};
-
-/* Provide sysfs file indicating if this platform supports the hs_reg */
-static ssize_t
-mv64xxx_hs_reg_valid_show(struct device *dev, struct device_attribute *attr,
- char *buf)
-{
- struct platform_device *pdev;
- struct mv64xxx_pdata *pdp;
- u32 v;
-
- pdev = container_of(dev, struct platform_device, dev);
- pdp = (struct mv64xxx_pdata *)pdev->dev.platform_data;
-
- if (mutex_lock_interruptible(&mv64xxx_hs_lock))
- return -ERESTARTSYS;
- v = pdp->hs_reg_valid;
- mutex_unlock(&mv64xxx_hs_lock);
-
- return sprintf(buf, "%i\n", v);
-}
-static DEVICE_ATTR(hs_reg_valid, S_IRUGO, mv64xxx_hs_reg_valid_show, NULL);
-
-static int __init
-mv64xxx_sysfs_init(void)
-{
- sysfs_create_bin_file(&mv64xxx_device.dev.kobj, &mv64xxx_hs_reg_attr);
- sysfs_create_file(&mv64xxx_device.dev.kobj,&dev_attr_hs_reg_valid.attr);
- return 0;
-}
-subsys_initcall(mv64xxx_sysfs_init);
-#endif
diff --git a/arch/ppc/syslib/mv64x60_dbg.c b/arch/ppc/syslib/mv64x60_dbg.c
deleted file mode 100644
index e187626..0000000
--- a/arch/ppc/syslib/mv64x60_dbg.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * KGDB and progress routines for the Marvell/Galileo MV64x60 (Discovery).
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- *****************************************************************************
- *
- * Low-level MPSC/UART I/O routines
- *
- *****************************************************************************
- */
-
-
-#include <linux/irq.h>
-#include <asm/delay.h>
-#include <asm/mv64x60.h>
-#include <asm/machdep.h>
-
-
-#if defined(CONFIG_SERIAL_TEXT_DEBUG)
-
-#define MPSC_CHR_1 0x000c
-#define MPSC_CHR_2 0x0010
-
-static struct mv64x60_handle mv64x60_dbg_bh;
-
-void
-mv64x60_progress_init(u32 base)
-{
- mv64x60_dbg_bh.v_base = base;
- return;
-}
-
-static void
-mv64x60_polled_putc(int chan, char c)
-{
- u32 offset;
-
- if (chan == 0)
- offset = 0x8000;
- else
- offset = 0x9000;
-
- mv64x60_write(&mv64x60_dbg_bh, offset + MPSC_CHR_1, (u32)c);
- mv64x60_write(&mv64x60_dbg_bh, offset + MPSC_CHR_2, 0x200);
- udelay(2000);
-}
-
-void
-mv64x60_mpsc_progress(char *s, unsigned short hex)
-{
- volatile char c;
-
- mv64x60_polled_putc(0, '\r');
-
- while ((c = *s++) != 0)
- mv64x60_polled_putc(0, c);
-
- mv64x60_polled_putc(0, '\n');
- mv64x60_polled_putc(0, '\r');
-
- return;
-}
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
-
-
-#if defined(CONFIG_KGDB)
-
-#if defined(CONFIG_KGDB_TTYS0)
-#define KGDB_PORT 0
-#elif defined(CONFIG_KGDB_TTYS1)
-#define KGDB_PORT 1
-#else
-#error "Invalid kgdb_tty port"
-#endif
-
-void
-putDebugChar(unsigned char c)
-{
- mv64x60_polled_putc(KGDB_PORT, (char)c);
-}
-
-int
-getDebugChar(void)
-{
- unsigned char c;
-
- while (!mv64x60_polled_getc(KGDB_PORT, &c));
- return (int)c;
-}
-
-void
-putDebugString(char* str)
-{
- while (*str != '\0') {
- putDebugChar(*str);
- str++;
- }
- putDebugChar('\r');
- return;
-}
-
-void
-kgdb_interruptible(int enable)
-{
-}
-
-void
-kgdb_map_scc(void)
-{
- if (ppc_md.early_serial_map)
- ppc_md.early_serial_map();
-}
-#endif /* CONFIG_KGDB */
diff --git a/arch/ppc/syslib/mv64x60_win.c b/arch/ppc/syslib/mv64x60_win.c
deleted file mode 100644
index 4bf1ad1..0000000
--- a/arch/ppc/syslib/mv64x60_win.c
+++ /dev/null
@@ -1,1165 +0,0 @@
-/*
- * Tables with info on how to manipulate the 32 & 64 bit windows on the
- * various types of Marvell bridge chips.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/mv643xx.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/delay.h>
-#include <asm/mv64x60.h>
-
-
-/*
- *****************************************************************************
- *
- * Tables describing how to set up windows on each type of bridge
- *
- *****************************************************************************
- */
-struct mv64x60_32bit_window
- gt64260_32bit_windows[MV64x60_32BIT_WIN_COUNT] __initdata = {
- /* CPU->MEM Windows */
- [MV64x60_CPU2MEM_0_WIN] = {
- .base_reg = MV64x60_CPU2MEM_0_BASE,
- .size_reg = MV64x60_CPU2MEM_0_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2MEM_1_WIN] = {
- .base_reg = MV64x60_CPU2MEM_1_BASE,
- .size_reg = MV64x60_CPU2MEM_1_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2MEM_2_WIN] = {
- .base_reg = MV64x60_CPU2MEM_2_BASE,
- .size_reg = MV64x60_CPU2MEM_2_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2MEM_3_WIN] = {
- .base_reg = MV64x60_CPU2MEM_3_BASE,
- .size_reg = MV64x60_CPU2MEM_3_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->Device Windows */
- [MV64x60_CPU2DEV_0_WIN] = {
- .base_reg = MV64x60_CPU2DEV_0_BASE,
- .size_reg = MV64x60_CPU2DEV_0_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2DEV_1_WIN] = {
- .base_reg = MV64x60_CPU2DEV_1_BASE,
- .size_reg = MV64x60_CPU2DEV_1_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2DEV_2_WIN] = {
- .base_reg = MV64x60_CPU2DEV_2_BASE,
- .size_reg = MV64x60_CPU2DEV_2_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2DEV_3_WIN] = {
- .base_reg = MV64x60_CPU2DEV_3_BASE,
- .size_reg = MV64x60_CPU2DEV_3_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->Boot Window */
- [MV64x60_CPU2BOOT_WIN] = {
- .base_reg = MV64x60_CPU2BOOT_0_BASE,
- .size_reg = MV64x60_CPU2BOOT_0_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->PCI 0 Windows */
- [MV64x60_CPU2PCI0_IO_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_IO_BASE,
- .size_reg = MV64x60_CPU2PCI0_IO_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_0_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_MEM_0_BASE,
- .size_reg = MV64x60_CPU2PCI0_MEM_0_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_1_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_MEM_1_BASE,
- .size_reg = MV64x60_CPU2PCI0_MEM_1_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_2_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_MEM_2_BASE,
- .size_reg = MV64x60_CPU2PCI0_MEM_2_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_3_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_MEM_3_BASE,
- .size_reg = MV64x60_CPU2PCI0_MEM_3_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->PCI 1 Windows */
- [MV64x60_CPU2PCI1_IO_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_IO_BASE,
- .size_reg = MV64x60_CPU2PCI1_IO_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_0_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_MEM_0_BASE,
- .size_reg = MV64x60_CPU2PCI1_MEM_0_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_1_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_MEM_1_BASE,
- .size_reg = MV64x60_CPU2PCI1_MEM_1_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_2_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_MEM_2_BASE,
- .size_reg = MV64x60_CPU2PCI1_MEM_2_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_3_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_MEM_3_BASE,
- .size_reg = MV64x60_CPU2PCI1_MEM_3_SIZE,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->SRAM Window (64260 has no integrated SRAM) */
- /* CPU->PCI 0 Remap I/O Window */
- [MV64x60_CPU2PCI0_IO_REMAP_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_IO_REMAP,
- .size_reg = 0,
- .base_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->PCI 1 Remap I/O Window */
- [MV64x60_CPU2PCI1_IO_REMAP_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_IO_REMAP,
- .size_reg = 0,
- .base_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU Memory Protection Windows */
- [MV64x60_CPU_PROT_0_WIN] = {
- .base_reg = MV64x60_CPU_PROT_BASE_0,
- .size_reg = MV64x60_CPU_PROT_SIZE_0,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU_PROT_1_WIN] = {
- .base_reg = MV64x60_CPU_PROT_BASE_1,
- .size_reg = MV64x60_CPU_PROT_SIZE_1,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU_PROT_2_WIN] = {
- .base_reg = MV64x60_CPU_PROT_BASE_2,
- .size_reg = MV64x60_CPU_PROT_SIZE_2,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU_PROT_3_WIN] = {
- .base_reg = MV64x60_CPU_PROT_BASE_3,
- .size_reg = MV64x60_CPU_PROT_SIZE_3,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU Snoop Windows */
- [MV64x60_CPU_SNOOP_0_WIN] = {
- .base_reg = GT64260_CPU_SNOOP_BASE_0,
- .size_reg = GT64260_CPU_SNOOP_SIZE_0,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU_SNOOP_1_WIN] = {
- .base_reg = GT64260_CPU_SNOOP_BASE_1,
- .size_reg = GT64260_CPU_SNOOP_SIZE_1,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU_SNOOP_2_WIN] = {
- .base_reg = GT64260_CPU_SNOOP_BASE_2,
- .size_reg = GT64260_CPU_SNOOP_SIZE_2,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU_SNOOP_3_WIN] = {
- .base_reg = GT64260_CPU_SNOOP_BASE_3,
- .size_reg = GT64260_CPU_SNOOP_SIZE_3,
- .base_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* PCI 0->System Memory Remap Windows */
- [MV64x60_PCI02MEM_REMAP_0_WIN] = {
- .base_reg = MV64x60_PCI0_SLAVE_MEM_0_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI02MEM_REMAP_1_WIN] = {
- .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI02MEM_REMAP_2_WIN] = {
- .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI02MEM_REMAP_3_WIN] = {
- .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- /* PCI 1->System Memory Remap Windows */
- [MV64x60_PCI12MEM_REMAP_0_WIN] = {
- .base_reg = MV64x60_PCI1_SLAVE_MEM_0_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI12MEM_REMAP_1_WIN] = {
- .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI12MEM_REMAP_2_WIN] = {
- .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI12MEM_REMAP_3_WIN] = {
- .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- /* ENET->SRAM Window (64260 doesn't have separate windows) */
- /* MPSC->SRAM Window (64260 doesn't have separate windows) */
- /* IDMA->SRAM Window (64260 doesn't have separate windows) */
-};
-
-struct mv64x60_64bit_window
- gt64260_64bit_windows[MV64x60_64BIT_WIN_COUNT] __initdata = {
- /* CPU->PCI 0 MEM Remap Windows */
- [MV64x60_CPU2PCI0_MEM_0_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI0_MEM_0_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI0_MEM_0_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_1_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI0_MEM_1_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI0_MEM_1_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_2_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI0_MEM_2_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI0_MEM_2_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_3_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI0_MEM_3_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI0_MEM_3_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->PCI 1 MEM Remap Windows */
- [MV64x60_CPU2PCI1_MEM_0_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI1_MEM_0_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI1_MEM_0_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_1_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI1_MEM_1_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI1_MEM_1_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_2_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI1_MEM_2_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI1_MEM_2_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_3_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI1_MEM_3_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI1_MEM_3_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 12,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* PCI 0->MEM Access Control Windows */
- [MV64x60_PCI02MEM_ACC_CNTL_0_WIN] = {
- .base_hi_reg = MV64x60_PCI0_ACC_CNTL_0_BASE_HI,
- .base_lo_reg = MV64x60_PCI0_ACC_CNTL_0_BASE_LO,
- .size_reg = MV64x60_PCI0_ACC_CNTL_0_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI02MEM_ACC_CNTL_1_WIN] = {
- .base_hi_reg = MV64x60_PCI0_ACC_CNTL_1_BASE_HI,
- .base_lo_reg = MV64x60_PCI0_ACC_CNTL_1_BASE_LO,
- .size_reg = MV64x60_PCI0_ACC_CNTL_1_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI02MEM_ACC_CNTL_2_WIN] = {
- .base_hi_reg = MV64x60_PCI0_ACC_CNTL_2_BASE_HI,
- .base_lo_reg = MV64x60_PCI0_ACC_CNTL_2_BASE_LO,
- .size_reg = MV64x60_PCI0_ACC_CNTL_2_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI02MEM_ACC_CNTL_3_WIN] = {
- .base_hi_reg = MV64x60_PCI0_ACC_CNTL_3_BASE_HI,
- .base_lo_reg = MV64x60_PCI0_ACC_CNTL_3_BASE_LO,
- .size_reg = MV64x60_PCI0_ACC_CNTL_3_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* PCI 1->MEM Access Control Windows */
- [MV64x60_PCI12MEM_ACC_CNTL_0_WIN] = {
- .base_hi_reg = MV64x60_PCI1_ACC_CNTL_0_BASE_HI,
- .base_lo_reg = MV64x60_PCI1_ACC_CNTL_0_BASE_LO,
- .size_reg = MV64x60_PCI1_ACC_CNTL_0_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI12MEM_ACC_CNTL_1_WIN] = {
- .base_hi_reg = MV64x60_PCI1_ACC_CNTL_1_BASE_HI,
- .base_lo_reg = MV64x60_PCI1_ACC_CNTL_1_BASE_LO,
- .size_reg = MV64x60_PCI1_ACC_CNTL_1_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI12MEM_ACC_CNTL_2_WIN] = {
- .base_hi_reg = MV64x60_PCI1_ACC_CNTL_2_BASE_HI,
- .base_lo_reg = MV64x60_PCI1_ACC_CNTL_2_BASE_LO,
- .size_reg = MV64x60_PCI1_ACC_CNTL_2_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI12MEM_ACC_CNTL_3_WIN] = {
- .base_hi_reg = MV64x60_PCI1_ACC_CNTL_3_BASE_HI,
- .base_lo_reg = MV64x60_PCI1_ACC_CNTL_3_BASE_LO,
- .size_reg = MV64x60_PCI1_ACC_CNTL_3_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* PCI 0->MEM Snoop Windows */
- [MV64x60_PCI02MEM_SNOOP_0_WIN] = {
- .base_hi_reg = GT64260_PCI0_SNOOP_0_BASE_HI,
- .base_lo_reg = GT64260_PCI0_SNOOP_0_BASE_LO,
- .size_reg = GT64260_PCI0_SNOOP_0_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI02MEM_SNOOP_1_WIN] = {
- .base_hi_reg = GT64260_PCI0_SNOOP_1_BASE_HI,
- .base_lo_reg = GT64260_PCI0_SNOOP_1_BASE_LO,
- .size_reg = GT64260_PCI0_SNOOP_1_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI02MEM_SNOOP_2_WIN] = {
- .base_hi_reg = GT64260_PCI0_SNOOP_2_BASE_HI,
- .base_lo_reg = GT64260_PCI0_SNOOP_2_BASE_LO,
- .size_reg = GT64260_PCI0_SNOOP_2_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI02MEM_SNOOP_3_WIN] = {
- .base_hi_reg = GT64260_PCI0_SNOOP_3_BASE_HI,
- .base_lo_reg = GT64260_PCI0_SNOOP_3_BASE_LO,
- .size_reg = GT64260_PCI0_SNOOP_3_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* PCI 1->MEM Snoop Windows */
- [MV64x60_PCI12MEM_SNOOP_0_WIN] = {
- .base_hi_reg = GT64260_PCI1_SNOOP_0_BASE_HI,
- .base_lo_reg = GT64260_PCI1_SNOOP_0_BASE_LO,
- .size_reg = GT64260_PCI1_SNOOP_0_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI12MEM_SNOOP_1_WIN] = {
- .base_hi_reg = GT64260_PCI1_SNOOP_1_BASE_HI,
- .base_lo_reg = GT64260_PCI1_SNOOP_1_BASE_LO,
- .size_reg = GT64260_PCI1_SNOOP_1_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI12MEM_SNOOP_2_WIN] = {
- .base_hi_reg = GT64260_PCI1_SNOOP_2_BASE_HI,
- .base_lo_reg = GT64260_PCI1_SNOOP_2_BASE_LO,
- .size_reg = GT64260_PCI1_SNOOP_2_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_PCI12MEM_SNOOP_3_WIN] = {
- .base_hi_reg = GT64260_PCI1_SNOOP_3_BASE_HI,
- .base_lo_reg = GT64260_PCI1_SNOOP_3_BASE_LO,
- .size_reg = GT64260_PCI1_SNOOP_3_SIZE,
- .base_lo_bits = 12,
- .size_bits = 12,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
-};
-
-struct mv64x60_32bit_window
- mv64360_32bit_windows[MV64x60_32BIT_WIN_COUNT] __initdata = {
- /* CPU->MEM Windows */
- [MV64x60_CPU2MEM_0_WIN] = {
- .base_reg = MV64x60_CPU2MEM_0_BASE,
- .size_reg = MV64x60_CPU2MEM_0_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 0 },
- [MV64x60_CPU2MEM_1_WIN] = {
- .base_reg = MV64x60_CPU2MEM_1_BASE,
- .size_reg = MV64x60_CPU2MEM_1_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 1 },
- [MV64x60_CPU2MEM_2_WIN] = {
- .base_reg = MV64x60_CPU2MEM_2_BASE,
- .size_reg = MV64x60_CPU2MEM_2_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 2 },
- [MV64x60_CPU2MEM_3_WIN] = {
- .base_reg = MV64x60_CPU2MEM_3_BASE,
- .size_reg = MV64x60_CPU2MEM_3_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 3 },
- /* CPU->Device Windows */
- [MV64x60_CPU2DEV_0_WIN] = {
- .base_reg = MV64x60_CPU2DEV_0_BASE,
- .size_reg = MV64x60_CPU2DEV_0_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 4 },
- [MV64x60_CPU2DEV_1_WIN] = {
- .base_reg = MV64x60_CPU2DEV_1_BASE,
- .size_reg = MV64x60_CPU2DEV_1_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 5 },
- [MV64x60_CPU2DEV_2_WIN] = {
- .base_reg = MV64x60_CPU2DEV_2_BASE,
- .size_reg = MV64x60_CPU2DEV_2_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 6 },
- [MV64x60_CPU2DEV_3_WIN] = {
- .base_reg = MV64x60_CPU2DEV_3_BASE,
- .size_reg = MV64x60_CPU2DEV_3_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 7 },
- /* CPU->Boot Window */
- [MV64x60_CPU2BOOT_WIN] = {
- .base_reg = MV64x60_CPU2BOOT_0_BASE,
- .size_reg = MV64x60_CPU2BOOT_0_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 8 },
- /* CPU->PCI 0 Windows */
- [MV64x60_CPU2PCI0_IO_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_IO_BASE,
- .size_reg = MV64x60_CPU2PCI0_IO_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 9 },
- [MV64x60_CPU2PCI0_MEM_0_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_MEM_0_BASE,
- .size_reg = MV64x60_CPU2PCI0_MEM_0_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 10 },
- [MV64x60_CPU2PCI0_MEM_1_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_MEM_1_BASE,
- .size_reg = MV64x60_CPU2PCI0_MEM_1_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 11 },
- [MV64x60_CPU2PCI0_MEM_2_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_MEM_2_BASE,
- .size_reg = MV64x60_CPU2PCI0_MEM_2_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 12 },
- [MV64x60_CPU2PCI0_MEM_3_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_MEM_3_BASE,
- .size_reg = MV64x60_CPU2PCI0_MEM_3_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 13 },
- /* CPU->PCI 1 Windows */
- [MV64x60_CPU2PCI1_IO_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_IO_BASE,
- .size_reg = MV64x60_CPU2PCI1_IO_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 14 },
- [MV64x60_CPU2PCI1_MEM_0_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_MEM_0_BASE,
- .size_reg = MV64x60_CPU2PCI1_MEM_0_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 15 },
- [MV64x60_CPU2PCI1_MEM_1_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_MEM_1_BASE,
- .size_reg = MV64x60_CPU2PCI1_MEM_1_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 16 },
- [MV64x60_CPU2PCI1_MEM_2_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_MEM_2_BASE,
- .size_reg = MV64x60_CPU2PCI1_MEM_2_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 17 },
- [MV64x60_CPU2PCI1_MEM_3_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_MEM_3_BASE,
- .size_reg = MV64x60_CPU2PCI1_MEM_3_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 18 },
- /* CPU->SRAM Window */
- [MV64x60_CPU2SRAM_WIN] = {
- .base_reg = MV64360_CPU2SRAM_BASE,
- .size_reg = 0,
- .base_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUWIN_ENAB | 19 },
- /* CPU->PCI 0 Remap I/O Window */
- [MV64x60_CPU2PCI0_IO_REMAP_WIN] = {
- .base_reg = MV64x60_CPU2PCI0_IO_REMAP,
- .size_reg = 0,
- .base_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->PCI 1 Remap I/O Window */
- [MV64x60_CPU2PCI1_IO_REMAP_WIN] = {
- .base_reg = MV64x60_CPU2PCI1_IO_REMAP,
- .size_reg = 0,
- .base_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU Memory Protection Windows */
- [MV64x60_CPU_PROT_0_WIN] = {
- .base_reg = MV64x60_CPU_PROT_BASE_0,
- .size_reg = MV64x60_CPU_PROT_SIZE_0,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUPROT_ENAB | 31 },
- [MV64x60_CPU_PROT_1_WIN] = {
- .base_reg = MV64x60_CPU_PROT_BASE_1,
- .size_reg = MV64x60_CPU_PROT_SIZE_1,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUPROT_ENAB | 31 },
- [MV64x60_CPU_PROT_2_WIN] = {
- .base_reg = MV64x60_CPU_PROT_BASE_2,
- .size_reg = MV64x60_CPU_PROT_SIZE_2,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUPROT_ENAB | 31 },
- [MV64x60_CPU_PROT_3_WIN] = {
- .base_reg = MV64x60_CPU_PROT_BASE_3,
- .size_reg = MV64x60_CPU_PROT_SIZE_3,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = MV64x60_EXTRA_CPUPROT_ENAB | 31 },
- /* CPU Snoop Windows -- don't exist on 64360 */
- /* PCI 0->System Memory Remap Windows */
- [MV64x60_PCI02MEM_REMAP_0_WIN] = {
- .base_reg = MV64x60_PCI0_SLAVE_MEM_0_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI02MEM_REMAP_1_WIN] = {
- .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI02MEM_REMAP_2_WIN] = {
- .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI02MEM_REMAP_3_WIN] = {
- .base_reg = MV64x60_PCI0_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- /* PCI 1->System Memory Remap Windows */
- [MV64x60_PCI12MEM_REMAP_0_WIN] = {
- .base_reg = MV64x60_PCI1_SLAVE_MEM_0_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI12MEM_REMAP_1_WIN] = {
- .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI12MEM_REMAP_2_WIN] = {
- .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- [MV64x60_PCI12MEM_REMAP_3_WIN] = {
- .base_reg = MV64x60_PCI1_SLAVE_MEM_1_REMAP,
- .size_reg = 0,
- .base_bits = 20,
- .size_bits = 0,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = 0 },
- /* ENET->System Memory Windows */
- [MV64x60_ENET2MEM_0_WIN] = {
- .base_reg = MV64360_ENET2MEM_0_BASE,
- .size_reg = MV64360_ENET2MEM_0_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_ENET_ENAB | 0 },
- [MV64x60_ENET2MEM_1_WIN] = {
- .base_reg = MV64360_ENET2MEM_1_BASE,
- .size_reg = MV64360_ENET2MEM_1_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_ENET_ENAB | 1 },
- [MV64x60_ENET2MEM_2_WIN] = {
- .base_reg = MV64360_ENET2MEM_2_BASE,
- .size_reg = MV64360_ENET2MEM_2_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_ENET_ENAB | 2 },
- [MV64x60_ENET2MEM_3_WIN] = {
- .base_reg = MV64360_ENET2MEM_3_BASE,
- .size_reg = MV64360_ENET2MEM_3_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_ENET_ENAB | 3 },
- [MV64x60_ENET2MEM_4_WIN] = {
- .base_reg = MV64360_ENET2MEM_4_BASE,
- .size_reg = MV64360_ENET2MEM_4_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_ENET_ENAB | 4 },
- [MV64x60_ENET2MEM_5_WIN] = {
- .base_reg = MV64360_ENET2MEM_5_BASE,
- .size_reg = MV64360_ENET2MEM_5_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_ENET_ENAB | 5 },
- /* MPSC->System Memory Windows */
- [MV64x60_MPSC2MEM_0_WIN] = {
- .base_reg = MV64360_MPSC2MEM_0_BASE,
- .size_reg = MV64360_MPSC2MEM_0_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_MPSC_ENAB | 0 },
- [MV64x60_MPSC2MEM_1_WIN] = {
- .base_reg = MV64360_MPSC2MEM_1_BASE,
- .size_reg = MV64360_MPSC2MEM_1_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_MPSC_ENAB | 1 },
- [MV64x60_MPSC2MEM_2_WIN] = {
- .base_reg = MV64360_MPSC2MEM_2_BASE,
- .size_reg = MV64360_MPSC2MEM_2_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_MPSC_ENAB | 2 },
- [MV64x60_MPSC2MEM_3_WIN] = {
- .base_reg = MV64360_MPSC2MEM_3_BASE,
- .size_reg = MV64360_MPSC2MEM_3_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_MPSC_ENAB | 3 },
- /* IDMA->System Memory Windows */
- [MV64x60_IDMA2MEM_0_WIN] = {
- .base_reg = MV64360_IDMA2MEM_0_BASE,
- .size_reg = MV64360_IDMA2MEM_0_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_IDMA_ENAB | 0 },
- [MV64x60_IDMA2MEM_1_WIN] = {
- .base_reg = MV64360_IDMA2MEM_1_BASE,
- .size_reg = MV64360_IDMA2MEM_1_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_IDMA_ENAB | 1 },
- [MV64x60_IDMA2MEM_2_WIN] = {
- .base_reg = MV64360_IDMA2MEM_2_BASE,
- .size_reg = MV64360_IDMA2MEM_2_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_IDMA_ENAB | 2 },
- [MV64x60_IDMA2MEM_3_WIN] = {
- .base_reg = MV64360_IDMA2MEM_3_BASE,
- .size_reg = MV64360_IDMA2MEM_3_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_IDMA_ENAB | 3 },
- [MV64x60_IDMA2MEM_4_WIN] = {
- .base_reg = MV64360_IDMA2MEM_4_BASE,
- .size_reg = MV64360_IDMA2MEM_4_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_IDMA_ENAB | 4 },
- [MV64x60_IDMA2MEM_5_WIN] = {
- .base_reg = MV64360_IDMA2MEM_5_BASE,
- .size_reg = MV64360_IDMA2MEM_5_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_IDMA_ENAB | 5 },
- [MV64x60_IDMA2MEM_6_WIN] = {
- .base_reg = MV64360_IDMA2MEM_6_BASE,
- .size_reg = MV64360_IDMA2MEM_6_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_IDMA_ENAB | 6 },
- [MV64x60_IDMA2MEM_7_WIN] = {
- .base_reg = MV64360_IDMA2MEM_7_BASE,
- .size_reg = MV64360_IDMA2MEM_7_SIZE,
- .base_bits = 16,
- .size_bits = 16,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_IDMA_ENAB | 7 },
-};
-
-struct mv64x60_64bit_window
- mv64360_64bit_windows[MV64x60_64BIT_WIN_COUNT] __initdata = {
- /* CPU->PCI 0 MEM Remap Windows */
- [MV64x60_CPU2PCI0_MEM_0_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI0_MEM_0_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI0_MEM_0_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_1_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI0_MEM_1_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI0_MEM_1_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_2_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI0_MEM_2_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI0_MEM_2_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI0_MEM_3_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI0_MEM_3_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI0_MEM_3_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* CPU->PCI 1 MEM Remap Windows */
- [MV64x60_CPU2PCI1_MEM_0_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI1_MEM_0_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI1_MEM_0_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_1_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI1_MEM_1_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI1_MEM_1_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_2_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI1_MEM_2_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI1_MEM_2_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- [MV64x60_CPU2PCI1_MEM_3_REMAP_WIN] = {
- .base_hi_reg = MV64x60_CPU2PCI1_MEM_3_REMAP_HI,
- .base_lo_reg = MV64x60_CPU2PCI1_MEM_3_REMAP_LO,
- .size_reg = 0,
- .base_lo_bits = 16,
- .size_bits = 0,
- .get_from_field = mv64x60_shift_left,
- .map_to_field = mv64x60_shift_right,
- .extra = 0 },
- /* PCI 0->MEM Access Control Windows */
- [MV64x60_PCI02MEM_ACC_CNTL_0_WIN] = {
- .base_hi_reg = MV64x60_PCI0_ACC_CNTL_0_BASE_HI,
- .base_lo_reg = MV64x60_PCI0_ACC_CNTL_0_BASE_LO,
- .size_reg = MV64x60_PCI0_ACC_CNTL_0_SIZE,
- .base_lo_bits = 20,
- .size_bits = 20,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 },
- [MV64x60_PCI02MEM_ACC_CNTL_1_WIN] = {
- .base_hi_reg = MV64x60_PCI0_ACC_CNTL_1_BASE_HI,
- .base_lo_reg = MV64x60_PCI0_ACC_CNTL_1_BASE_LO,
- .size_reg = MV64x60_PCI0_ACC_CNTL_1_SIZE,
- .base_lo_bits = 20,
- .size_bits = 20,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 },
- [MV64x60_PCI02MEM_ACC_CNTL_2_WIN] = {
- .base_hi_reg = MV64x60_PCI0_ACC_CNTL_2_BASE_HI,
- .base_lo_reg = MV64x60_PCI0_ACC_CNTL_2_BASE_LO,
- .size_reg = MV64x60_PCI0_ACC_CNTL_2_SIZE,
- .base_lo_bits = 20,
- .size_bits = 20,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 },
- [MV64x60_PCI02MEM_ACC_CNTL_3_WIN] = {
- .base_hi_reg = MV64x60_PCI0_ACC_CNTL_3_BASE_HI,
- .base_lo_reg = MV64x60_PCI0_ACC_CNTL_3_BASE_LO,
- .size_reg = MV64x60_PCI0_ACC_CNTL_3_SIZE,
- .base_lo_bits = 20,
- .size_bits = 20,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 },
- /* PCI 1->MEM Access Control Windows */
- [MV64x60_PCI12MEM_ACC_CNTL_0_WIN] = {
- .base_hi_reg = MV64x60_PCI1_ACC_CNTL_0_BASE_HI,
- .base_lo_reg = MV64x60_PCI1_ACC_CNTL_0_BASE_LO,
- .size_reg = MV64x60_PCI1_ACC_CNTL_0_SIZE,
- .base_lo_bits = 20,
- .size_bits = 20,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 },
- [MV64x60_PCI12MEM_ACC_CNTL_1_WIN] = {
- .base_hi_reg = MV64x60_PCI1_ACC_CNTL_1_BASE_HI,
- .base_lo_reg = MV64x60_PCI1_ACC_CNTL_1_BASE_LO,
- .size_reg = MV64x60_PCI1_ACC_CNTL_1_SIZE,
- .base_lo_bits = 20,
- .size_bits = 20,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 },
- [MV64x60_PCI12MEM_ACC_CNTL_2_WIN] = {
- .base_hi_reg = MV64x60_PCI1_ACC_CNTL_2_BASE_HI,
- .base_lo_reg = MV64x60_PCI1_ACC_CNTL_2_BASE_LO,
- .size_reg = MV64x60_PCI1_ACC_CNTL_2_SIZE,
- .base_lo_bits = 20,
- .size_bits = 20,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 },
- [MV64x60_PCI12MEM_ACC_CNTL_3_WIN] = {
- .base_hi_reg = MV64x60_PCI1_ACC_CNTL_3_BASE_HI,
- .base_lo_reg = MV64x60_PCI1_ACC_CNTL_3_BASE_LO,
- .size_reg = MV64x60_PCI1_ACC_CNTL_3_SIZE,
- .base_lo_bits = 20,
- .size_bits = 20,
- .get_from_field = mv64x60_mask,
- .map_to_field = mv64x60_mask,
- .extra = MV64x60_EXTRA_PCIACC_ENAB | 0 },
- /* PCI 0->MEM Snoop Windows -- don't exist on 64360 */
- /* PCI 1->MEM Snoop Windows -- don't exist on 64360 */
-};
diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c
deleted file mode 100644
index a6fb7dc..0000000
--- a/arch/ppc/syslib/ocp.c
+++ /dev/null
@@ -1,482 +0,0 @@
-/*
- * ocp.c
- *
- * (c) Benjamin Herrenschmidt (benh@kernel.crashing.org)
- * Mipsys - France
- *
- * Derived from work (c) Armin Kuster akuster@pacbell.net
- *
- * Additional support and port to 2.6 LDM/sysfs by
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2004 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * OCP (On Chip Peripheral) is a software emulated "bus" with a
- * pseudo discovery method for dumb peripherals. Usually these type
- * of peripherals are found on embedded SoC (System On a Chip)
- * processors or highly integrated system controllers that have
- * a host bridge and many peripherals. Common examples where
- * this is already used include the PPC4xx, MPC52xx,
- * and MV64xxx parts.
- *
- * This subsystem creates a standard OCP bus type within the
- * device model. The devices on the OCP bus are seeded by an
- * an initial OCP device array created by the arch-specific
- * Device entries can be added/removed/modified through OCP
- * helper functions to accommodate system and board-specific
- * parameters commonly found in embedded systems. OCP also
- * provides a standard method for devices to describe extended
- * attributes about themselves to the system. A standard access
- * method allows OCP drivers to obtain the information, both
- * SoC-specific and system/board-specific, needed for operation.
- */
-
-#include <linux/module.h>
-#include <linux/list.h>
-#include <linux/miscdevice.h>
-#include <linux/slab.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/pm.h>
-#include <linux/bootmem.h>
-#include <linux/device.h>
-#include <linux/rwsem.h>
-
-#include <asm/io.h>
-#include <asm/ocp.h>
-#include <asm/errno.h>
-
-//#define DBG(x) printk x
-#define DBG(x)
-
-extern int mem_init_done;
-
-extern struct ocp_def core_ocp[]; /* Static list of devices, provided by
- CPU core */
-
-LIST_HEAD(ocp_devices); /* List of all OCP devices */
-DECLARE_RWSEM(ocp_devices_sem); /* Global semaphores for those lists */
-
-static int ocp_inited;
-
-/* Sysfs support */
-#define OCP_DEF_ATTR(field, format_string) \
-static ssize_t \
-show_##field(struct device *dev, struct device_attribute *attr, char *buf) \
-{ \
- struct ocp_device *odev = to_ocp_dev(dev); \
- \
- return sprintf(buf, format_string, odev->def->field); \
-} \
-static DEVICE_ATTR(field, S_IRUGO, show_##field, NULL);
-
-OCP_DEF_ATTR(vendor, "0x%04x\n");
-OCP_DEF_ATTR(function, "0x%04x\n");
-OCP_DEF_ATTR(index, "0x%04x\n");
-#ifdef CONFIG_PTE_64BIT
-OCP_DEF_ATTR(paddr, "0x%016Lx\n");
-#else
-OCP_DEF_ATTR(paddr, "0x%08lx\n");
-#endif
-OCP_DEF_ATTR(irq, "%d\n");
-OCP_DEF_ATTR(pm, "%lu\n");
-
-void ocp_create_sysfs_dev_files(struct ocp_device *odev)
-{
- struct device *dev = &odev->dev;
-
- /* Current OCP device def attributes */
- device_create_file(dev, &dev_attr_vendor);
- device_create_file(dev, &dev_attr_function);
- device_create_file(dev, &dev_attr_index);
- device_create_file(dev, &dev_attr_paddr);
- device_create_file(dev, &dev_attr_irq);
- device_create_file(dev, &dev_attr_pm);
- /* Current OCP device additions attributes */
- if (odev->def->additions && odev->def->show)
- odev->def->show(dev);
-}
-
-/**
- * ocp_device_match - Match one driver to one device
- * @drv: driver to match
- * @dev: device to match
- *
- * This function returns 0 if the driver and device don't match
- */
-static int
-ocp_device_match(struct device *dev, struct device_driver *drv)
-{
- struct ocp_device *ocp_dev = to_ocp_dev(dev);
- struct ocp_driver *ocp_drv = to_ocp_drv(drv);
- const struct ocp_device_id *ids = ocp_drv->id_table;
-
- if (!ids)
- return 0;
-
- while (ids->vendor || ids->function) {
- if ((ids->vendor == OCP_ANY_ID
- || ids->vendor == ocp_dev->def->vendor)
- && (ids->function == OCP_ANY_ID
- || ids->function == ocp_dev->def->function))
- return 1;
- ids++;
- }
- return 0;
-}
-
-static int
-ocp_device_probe(struct device *dev)
-{
- int error = 0;
- struct ocp_driver *drv;
- struct ocp_device *ocp_dev;
-
- drv = to_ocp_drv(dev->driver);
- ocp_dev = to_ocp_dev(dev);
-
- if (drv->probe) {
- error = drv->probe(ocp_dev);
- if (error >= 0) {
- ocp_dev->driver = drv;
- error = 0;
- }
- }
- return error;
-}
-
-static int
-ocp_device_remove(struct device *dev)
-{
- struct ocp_device *ocp_dev = to_ocp_dev(dev);
-
- if (ocp_dev->driver) {
- if (ocp_dev->driver->remove)
- ocp_dev->driver->remove(ocp_dev);
- ocp_dev->driver = NULL;
- }
- return 0;
-}
-
-static int
-ocp_device_suspend(struct device *dev, pm_message_t state)
-{
- struct ocp_device *ocp_dev = to_ocp_dev(dev);
- struct ocp_driver *ocp_drv = to_ocp_drv(dev->driver);
-
- if (dev->driver && ocp_drv->suspend)
- return ocp_drv->suspend(ocp_dev, state);
- return 0;
-}
-
-static int
-ocp_device_resume(struct device *dev)
-{
- struct ocp_device *ocp_dev = to_ocp_dev(dev);
- struct ocp_driver *ocp_drv = to_ocp_drv(dev->driver);
-
- if (dev->driver && ocp_drv->resume)
- return ocp_drv->resume(ocp_dev);
- return 0;
-}
-
-struct bus_type ocp_bus_type = {
- .name = "ocp",
- .match = ocp_device_match,
- .probe = ocp_device_probe,
- .remove = ocp_device_remove,
- .suspend = ocp_device_suspend,
- .resume = ocp_device_resume,
-};
-
-/**
- * ocp_register_driver - Register an OCP driver
- * @drv: pointer to statically defined ocp_driver structure
- *
- * The driver's probe() callback is called either recursively
- * by this function or upon later call of ocp_driver_init
- *
- * NOTE: Detection of devices is a 2 pass step on this implementation,
- * hotswap isn't supported. First, all OCP devices are put in the device
- * list, _then_ all drivers are probed on each match.
- */
-int
-ocp_register_driver(struct ocp_driver *drv)
-{
- /* initialize common driver fields */
- drv->driver.name = drv->name;
- drv->driver.bus = &ocp_bus_type;
-
- /* register with core */
- return driver_register(&drv->driver);
-}
-
-/**
- * ocp_unregister_driver - Unregister an OCP driver
- * @drv: pointer to statically defined ocp_driver structure
- *
- * The driver's remove() callback is called recursively
- * by this function for any device already registered
- */
-void
-ocp_unregister_driver(struct ocp_driver *drv)
-{
- DBG(("ocp: ocp_unregister_driver(%s)...\n", drv->name));
-
- driver_unregister(&drv->driver);
-
- DBG(("ocp: ocp_unregister_driver(%s)... done.\n", drv->name));
-}
-
-/* Core of ocp_find_device(). Caller must hold ocp_devices_sem */
-static struct ocp_device *
-__ocp_find_device(unsigned int vendor, unsigned int function, int index)
-{
- struct list_head *entry;
- struct ocp_device *dev, *found = NULL;
-
- DBG(("ocp: __ocp_find_device(vendor: %x, function: %x, index: %d)...\n", vendor, function, index));
-
- list_for_each(entry, &ocp_devices) {
- dev = list_entry(entry, struct ocp_device, link);
- if (vendor != OCP_ANY_ID && vendor != dev->def->vendor)
- continue;
- if (function != OCP_ANY_ID && function != dev->def->function)
- continue;
- if (index != OCP_ANY_INDEX && index != dev->def->index)
- continue;
- found = dev;
- break;
- }
-
- DBG(("ocp: __ocp_find_device(vendor: %x, function: %x, index: %d)... done\n", vendor, function, index));
-
- return found;
-}
-
-/**
- * ocp_find_device - Find a device by function & index
- * @vendor: vendor ID of the device (or OCP_ANY_ID)
- * @function: function code of the device (or OCP_ANY_ID)
- * @idx: index of the device (or OCP_ANY_INDEX)
- *
- * This function allows a lookup of a given function by it's
- * index, it's typically used to find the MAL or ZMII associated
- * with an EMAC or similar horrors.
- * You can pass vendor, though you usually want OCP_ANY_ID there...
- */
-struct ocp_device *
-ocp_find_device(unsigned int vendor, unsigned int function, int index)
-{
- struct ocp_device *dev;
-
- down_read(&ocp_devices_sem);
- dev = __ocp_find_device(vendor, function, index);
- up_read(&ocp_devices_sem);
-
- return dev;
-}
-
-/**
- * ocp_get_one_device - Find a def by function & index
- * @vendor: vendor ID of the device (or OCP_ANY_ID)
- * @function: function code of the device (or OCP_ANY_ID)
- * @idx: index of the device (or OCP_ANY_INDEX)
- *
- * This function allows a lookup of a given ocp_def by it's
- * vendor, function, and index. The main purpose for is to
- * allow modification of the def before binding to the driver
- */
-struct ocp_def *
-ocp_get_one_device(unsigned int vendor, unsigned int function, int index)
-{
- struct ocp_device *dev;
- struct ocp_def *found = NULL;
-
- DBG(("ocp: ocp_get_one_device(vendor: %x, function: %x, index: %d)...\n",
- vendor, function, index));
-
- dev = ocp_find_device(vendor, function, index);
-
- if (dev)
- found = dev->def;
-
- DBG(("ocp: ocp_get_one_device(vendor: %x, function: %x, index: %d)... done.\n",
- vendor, function, index));
-
- return found;
-}
-
-/**
- * ocp_add_one_device - Add a device
- * @def: static device definition structure
- *
- * This function adds a device definition to the
- * device list. It may only be called before
- * ocp_driver_init() and will return an error
- * otherwise.
- */
-int
-ocp_add_one_device(struct ocp_def *def)
-{
- struct ocp_device *dev;
-
- DBG(("ocp: ocp_add_one_device()...\n"));
-
- /* Can't be called after ocp driver init */
- if (ocp_inited)
- return 1;
-
- if (mem_init_done)
- dev = kmalloc(sizeof(*dev), GFP_KERNEL);
- else
- dev = alloc_bootmem(sizeof(*dev));
-
- if (dev == NULL)
- return 1;
- memset(dev, 0, sizeof(*dev));
- dev->def = def;
- dev->current_state = 4;
- sprintf(dev->name, "OCP device %04x:%04x:%04x",
- dev->def->vendor, dev->def->function, dev->def->index);
- down_write(&ocp_devices_sem);
- list_add_tail(&dev->link, &ocp_devices);
- up_write(&ocp_devices_sem);
-
- DBG(("ocp: ocp_add_one_device()...done\n"));
-
- return 0;
-}
-
-/**
- * ocp_remove_one_device - Remove a device by function & index
- * @vendor: vendor ID of the device (or OCP_ANY_ID)
- * @function: function code of the device (or OCP_ANY_ID)
- * @idx: index of the device (or OCP_ANY_INDEX)
- *
- * This function allows removal of a given function by its
- * index. It may only be called before ocp_driver_init()
- * and will return an error otherwise.
- */
-int
-ocp_remove_one_device(unsigned int vendor, unsigned int function, int index)
-{
- struct ocp_device *dev;
-
- DBG(("ocp: ocp_remove_one_device(vendor: %x, function: %x, index: %d)...\n", vendor, function, index));
-
- /* Can't be called after ocp driver init */
- if (ocp_inited)
- return 1;
-
- down_write(&ocp_devices_sem);
- dev = __ocp_find_device(vendor, function, index);
- list_del(&dev->link);
- up_write(&ocp_devices_sem);
-
- DBG(("ocp: ocp_remove_one_device(vendor: %x, function: %x, index: %d)... done.\n", vendor, function, index));
-
- return 0;
-}
-
-/**
- * ocp_for_each_device - Iterate over OCP devices
- * @callback: routine to execute for each ocp device.
- * @arg: user data to be passed to callback routine.
- *
- * This routine holds the ocp_device semaphore, so the
- * callback routine cannot modify the ocp_device list.
- */
-void
-ocp_for_each_device(void(*callback)(struct ocp_device *, void *arg), void *arg)
-{
- struct list_head *entry;
-
- if (callback) {
- down_read(&ocp_devices_sem);
- list_for_each(entry, &ocp_devices)
- callback(list_entry(entry, struct ocp_device, link),
- arg);
- up_read(&ocp_devices_sem);
- }
-}
-
-/**
- * ocp_early_init - Init OCP device management
- *
- * This function builds the list of devices before setup_arch.
- * This allows platform code to modify the device lists before
- * they are bound to drivers (changes to paddr, removing devices
- * etc)
- */
-int __init
-ocp_early_init(void)
-{
- struct ocp_def *def;
-
- DBG(("ocp: ocp_early_init()...\n"));
-
- /* Fill the devices list */
- for (def = core_ocp; def->vendor != OCP_VENDOR_INVALID; def++)
- ocp_add_one_device(def);
-
- DBG(("ocp: ocp_early_init()... done.\n"));
-
- return 0;
-}
-
-/**
- * ocp_driver_init - Init OCP device management
- *
- * This function is meant to be called via OCP bus registration.
- */
-static int __init
-ocp_driver_init(void)
-{
- int ret = 0, index = 0;
- struct device *ocp_bus;
- struct list_head *entry;
- struct ocp_device *dev;
-
- if (ocp_inited)
- return ret;
- ocp_inited = 1;
-
- DBG(("ocp: ocp_driver_init()...\n"));
-
- /* Allocate/register primary OCP bus */
- ocp_bus = kzalloc(sizeof(struct device), GFP_KERNEL);
- if (ocp_bus == NULL)
- return 1;
- strcpy(ocp_bus->bus_id, "ocp");
-
- bus_register(&ocp_bus_type);
-
- device_register(ocp_bus);
-
- /* Put each OCP device into global device list */
- list_for_each(entry, &ocp_devices) {
- dev = list_entry(entry, struct ocp_device, link);
- sprintf(dev->dev.bus_id, "%2.2x", index);
- dev->dev.parent = ocp_bus;
- dev->dev.bus = &ocp_bus_type;
- device_register(&dev->dev);
- ocp_create_sysfs_dev_files(dev);
- index++;
- }
-
- DBG(("ocp: ocp_driver_init()... done.\n"));
-
- return 0;
-}
-
-postcore_initcall(ocp_driver_init);
-
-EXPORT_SYMBOL(ocp_bus_type);
-EXPORT_SYMBOL(ocp_find_device);
-EXPORT_SYMBOL(ocp_register_driver);
-EXPORT_SYMBOL(ocp_unregister_driver);
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
deleted file mode 100644
index 67dffe2..0000000
--- a/arch/ppc/syslib/open_pic.c
+++ /dev/null
@@ -1,1087 +0,0 @@
-/*
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/sysdev.h>
-#include <linux/errno.h>
-#include <asm/ptrace.h>
-#include <asm/signal.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/sections.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <asm/machdep.h>
-
-#include "open_pic_defs.h"
-
-#if defined(CONFIG_PRPMC800)
-#define OPENPIC_BIG_ENDIAN
-#endif
-
-void __iomem *OpenPIC_Addr;
-static volatile struct OpenPIC __iomem *OpenPIC = NULL;
-
-/*
- * We define OpenPIC_InitSenses table thusly:
- * bit 0x1: sense, 0 for edge and 1 for level.
- * bit 0x2: polarity, 0 for negative, 1 for positive.
- */
-u_int OpenPIC_NumInitSenses __initdata = 0;
-u_char *OpenPIC_InitSenses __initdata = NULL;
-extern int use_of_interrupt_tree;
-
-static u_int NumProcessors;
-static u_int NumSources;
-static int open_pic_irq_offset;
-static volatile OpenPIC_Source __iomem *ISR[NR_IRQS];
-static int openpic_cascade_irq = -1;
-static int (*openpic_cascade_fn)(void);
-
-/* Global Operations */
-static void openpic_disable_8259_pass_through(void);
-static void openpic_set_spurious(u_int vector);
-
-#ifdef CONFIG_SMP
-/* Interprocessor Interrupts */
-static void openpic_initipi(u_int ipi, u_int pri, u_int vector);
-static irqreturn_t openpic_ipi_action(int cpl, void *dev_id);
-#endif
-
-/* Timer Interrupts */
-static void openpic_inittimer(u_int timer, u_int pri, u_int vector);
-static void openpic_maptimer(u_int timer, cpumask_t cpumask);
-
-/* Interrupt Sources */
-static void openpic_enable_irq(u_int irq);
-static void openpic_disable_irq(u_int irq);
-static void openpic_initirq(u_int irq, u_int pri, u_int vector, int polarity,
- int is_level);
-static void openpic_mapirq(u_int irq, cpumask_t cpumask, cpumask_t keepmask);
-
-/*
- * These functions are not used but the code is kept here
- * for completeness and future reference.
- */
-#ifdef notused
-static void openpic_enable_8259_pass_through(void);
-static u_int openpic_get_spurious(void);
-static void openpic_set_sense(u_int irq, int sense);
-#endif /* notused */
-
-/*
- * Description of the openpic for the higher-level irq code
- */
-static void openpic_end_irq(unsigned int irq_nr);
-static void openpic_ack_irq(unsigned int irq_nr);
-static void openpic_set_affinity(unsigned int irq_nr, cpumask_t cpumask);
-
-struct hw_interrupt_type open_pic = {
- .typename = " OpenPIC ",
- .enable = openpic_enable_irq,
- .disable = openpic_disable_irq,
- .ack = openpic_ack_irq,
- .end = openpic_end_irq,
- .set_affinity = openpic_set_affinity,
-};
-
-#ifdef CONFIG_SMP
-static void openpic_end_ipi(unsigned int irq_nr);
-static void openpic_ack_ipi(unsigned int irq_nr);
-static void openpic_enable_ipi(unsigned int irq_nr);
-static void openpic_disable_ipi(unsigned int irq_nr);
-
-struct hw_interrupt_type open_pic_ipi = {
- .typename = " OpenPIC ",
- .enable = openpic_enable_ipi,
- .disable = openpic_disable_ipi,
- .ack = openpic_ack_ipi,
- .end = openpic_end_ipi,
-};
-#endif /* CONFIG_SMP */
-
-/*
- * Accesses to the current processor's openpic registers
- */
-#ifdef CONFIG_SMP
-#define THIS_CPU Processor[cpu]
-#define DECL_THIS_CPU int cpu = smp_hw_index[smp_processor_id()]
-#define CHECK_THIS_CPU check_arg_cpu(cpu)
-#else
-#define THIS_CPU Processor[0]
-#define DECL_THIS_CPU
-#define CHECK_THIS_CPU
-#endif /* CONFIG_SMP */
-
-#if 1
-#define check_arg_ipi(ipi) \
- if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
- printk("open_pic.c:%d: invalid ipi %d\n", __LINE__, ipi);
-#define check_arg_timer(timer) \
- if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
- printk("open_pic.c:%d: invalid timer %d\n", __LINE__, timer);
-#define check_arg_vec(vec) \
- if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
- printk("open_pic.c:%d: invalid vector %d\n", __LINE__, vec);
-#define check_arg_pri(pri) \
- if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
- printk("open_pic.c:%d: invalid priority %d\n", __LINE__, pri);
-/*
- * Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's
- * data has probably been corrupted and we're going to panic or deadlock later
- * anyway --Troy
- */
-#define check_arg_irq(irq) \
- if (irq < open_pic_irq_offset || irq >= NumSources+open_pic_irq_offset \
- || ISR[irq - open_pic_irq_offset] == 0) { \
- printk("open_pic.c:%d: invalid irq %d\n", __LINE__, irq); \
- dump_stack(); }
-#define check_arg_cpu(cpu) \
- if (cpu < 0 || cpu >= NumProcessors){ \
- printk("open_pic.c:%d: invalid cpu %d\n", __LINE__, cpu); \
- dump_stack(); }
-#else
-#define check_arg_ipi(ipi) do {} while (0)
-#define check_arg_timer(timer) do {} while (0)
-#define check_arg_vec(vec) do {} while (0)
-#define check_arg_pri(pri) do {} while (0)
-#define check_arg_irq(irq) do {} while (0)
-#define check_arg_cpu(cpu) do {} while (0)
-#endif
-
-u_int openpic_read(volatile u_int __iomem *addr)
-{
- u_int val;
-
-#ifdef OPENPIC_BIG_ENDIAN
- val = in_be32(addr);
-#else
- val = in_le32(addr);
-#endif
- return val;
-}
-
-static inline void openpic_write(volatile u_int __iomem *addr, u_int val)
-{
-#ifdef OPENPIC_BIG_ENDIAN
- out_be32(addr, val);
-#else
- out_le32(addr, val);
-#endif
-}
-
-static inline u_int openpic_readfield(volatile u_int __iomem *addr, u_int mask)
-{
- u_int val = openpic_read(addr);
- return val & mask;
-}
-
-inline void openpic_writefield(volatile u_int __iomem *addr, u_int mask,
- u_int field)
-{
- u_int val = openpic_read(addr);
- openpic_write(addr, (val & ~mask) | (field & mask));
-}
-
-static inline void openpic_clearfield(volatile u_int __iomem *addr, u_int mask)
-{
- openpic_writefield(addr, mask, 0);
-}
-
-static inline void openpic_setfield(volatile u_int __iomem *addr, u_int mask)
-{
- openpic_writefield(addr, mask, mask);
-}
-
-static void openpic_safe_writefield(volatile u_int __iomem *addr, u_int mask,
- u_int field)
-{
- openpic_setfield(addr, OPENPIC_MASK);
- while (openpic_read(addr) & OPENPIC_ACTIVITY);
- openpic_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
-}
-
-#ifdef CONFIG_SMP
-/* yes this is right ... bug, feature, you decide! -- tgall */
-u_int openpic_read_IPI(volatile u_int __iomem * addr)
-{
- u_int val = 0;
-#if defined(OPENPIC_BIG_ENDIAN)
- val = in_be32(addr);
-#else
- val = in_le32(addr);
-#endif
- return val;
-}
-
-/* because of the power3 be / le above, this is needed */
-inline void openpic_writefield_IPI(volatile u_int __iomem * addr, u_int mask, u_int field)
-{
- u_int val = openpic_read_IPI(addr);
- openpic_write(addr, (val & ~mask) | (field & mask));
-}
-
-static inline void openpic_clearfield_IPI(volatile u_int __iomem *addr, u_int mask)
-{
- openpic_writefield_IPI(addr, mask, 0);
-}
-
-static inline void openpic_setfield_IPI(volatile u_int __iomem *addr, u_int mask)
-{
- openpic_writefield_IPI(addr, mask, mask);
-}
-
-static void openpic_safe_writefield_IPI(volatile u_int __iomem *addr, u_int mask, u_int field)
-{
- openpic_setfield_IPI(addr, OPENPIC_MASK);
-
- /* wait until it's not in use */
- /* BenH: Is this code really enough ? I would rather check the result
- * and eventually retry ...
- */
- while(openpic_read_IPI(addr) & OPENPIC_ACTIVITY);
-
- openpic_writefield_IPI(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
-}
-#endif /* CONFIG_SMP */
-
-#ifdef CONFIG_EPIC_SERIAL_MODE
-/* On platforms that may use EPIC serial mode, the default is enabled. */
-int epic_serial_mode = 1;
-
-static void __init openpic_eicr_set_clk(u_int clkval)
-{
- openpic_writefield(&OpenPIC->Global.Global_Configuration1,
- OPENPIC_EICR_S_CLK_MASK, (clkval << 28));
-}
-
-static void __init openpic_enable_sie(void)
-{
- openpic_setfield(&OpenPIC->Global.Global_Configuration1,
- OPENPIC_EICR_SIE);
-}
-#endif
-
-#if defined(CONFIG_EPIC_SERIAL_MODE)
-static void openpic_reset(void)
-{
- openpic_setfield(&OpenPIC->Global.Global_Configuration0,
- OPENPIC_CONFIG_RESET);
- while (openpic_readfield(&OpenPIC->Global.Global_Configuration0,
- OPENPIC_CONFIG_RESET))
- mb();
-}
-#endif
-
-void __init openpic_set_sources(int first_irq, int num_irqs, void __iomem *first_ISR)
-{
- volatile OpenPIC_Source __iomem *src = first_ISR;
- int i, last_irq;
-
- last_irq = first_irq + num_irqs;
- if (last_irq > NumSources)
- NumSources = last_irq;
- if (src == 0)
- src = &((struct OpenPIC __iomem *)OpenPIC_Addr)->Source[first_irq];
- for (i = first_irq; i < last_irq; ++i, ++src)
- ISR[i] = src;
-}
-
-/*
- * The `offset' parameter defines where the interrupts handled by the
- * OpenPIC start in the space of interrupt numbers that the kernel knows
- * about. In other words, the OpenPIC's IRQ0 is numbered `offset' in the
- * kernel's interrupt numbering scheme.
- * We assume there is only one OpenPIC.
- */
-void __init openpic_init(int offset)
-{
- u_int t, i;
- u_int timerfreq;
- const char *version;
-
- if (!OpenPIC_Addr) {
- printk("No OpenPIC found !\n");
- return;
- }
- OpenPIC = (volatile struct OpenPIC __iomem *)OpenPIC_Addr;
-
-#ifdef CONFIG_EPIC_SERIAL_MODE
- /* Have to start from ground zero.
- */
- openpic_reset();
-#endif
-
- if (ppc_md.progress) ppc_md.progress("openpic: enter", 0x122);
-
- t = openpic_read(&OpenPIC->Global.Feature_Reporting0);
- switch (t & OPENPIC_FEATURE_VERSION_MASK) {
- case 1:
- version = "1.0";
- break;
- case 2:
- version = "1.2";
- break;
- case 3:
- version = "1.3";
- break;
- default:
- version = "?";
- break;
- }
- NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >>
- OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;
- if (NumSources == 0)
- openpic_set_sources(0,
- ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>
- OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1,
- NULL);
- printk("OpenPIC Version %s (%d CPUs and %d IRQ sources) at %p\n",
- version, NumProcessors, NumSources, OpenPIC);
- timerfreq = openpic_read(&OpenPIC->Global.Timer_Frequency);
- if (timerfreq)
- printk("OpenPIC timer frequency is %d.%06d MHz\n",
- timerfreq / 1000000, timerfreq % 1000000);
-
- open_pic_irq_offset = offset;
-
- /* Initialize timer interrupts */
- if ( ppc_md.progress ) ppc_md.progress("openpic: timer",0x3ba);
- for (i = 0; i < OPENPIC_NUM_TIMERS; i++) {
- /* Disabled, Priority 0 */
- openpic_inittimer(i, 0, OPENPIC_VEC_TIMER+i+offset);
- /* No processor */
- openpic_maptimer(i, CPU_MASK_NONE);
- }
-
-#ifdef CONFIG_SMP
- /* Initialize IPI interrupts */
- if ( ppc_md.progress ) ppc_md.progress("openpic: ipi",0x3bb);
- for (i = 0; i < OPENPIC_NUM_IPI; i++) {
- /* Disabled, increased priorities 10..13 */
- openpic_initipi(i, OPENPIC_PRIORITY_IPI_BASE+i,
- OPENPIC_VEC_IPI+i+offset);
- /* IPIs are per-CPU */
- irq_desc[OPENPIC_VEC_IPI+i+offset].status |= IRQ_PER_CPU;
- irq_desc[OPENPIC_VEC_IPI+i+offset].chip = &open_pic_ipi;
- }
-#endif
-
- /* Initialize external interrupts */
- if (ppc_md.progress) ppc_md.progress("openpic: external",0x3bc);
-
- openpic_set_priority(0xf);
-
- /* Init all external sources, including possibly the cascade. */
- for (i = 0; i < NumSources; i++) {
- int sense;
-
- if (ISR[i] == 0)
- continue;
-
- /* the bootloader may have left it enabled (bad !) */
- openpic_disable_irq(i+offset);
-
- sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: \
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE);
-
- if (sense & IRQ_SENSE_MASK)
- irq_desc[i+offset].status = IRQ_LEVEL;
-
- /* Enabled, Default priority */
- openpic_initirq(i, OPENPIC_PRIORITY_DEFAULT, i+offset,
- (sense & IRQ_POLARITY_MASK),
- (sense & IRQ_SENSE_MASK));
- /* Processor 0 */
- openpic_mapirq(i, CPU_MASK_CPU0, CPU_MASK_NONE);
- }
-
- /* Init descriptors */
- for (i = offset; i < NumSources + offset; i++)
- irq_desc[i].chip = &open_pic;
-
- /* Initialize the spurious interrupt */
- if (ppc_md.progress) ppc_md.progress("openpic: spurious",0x3bd);
- openpic_set_spurious(OPENPIC_VEC_SPURIOUS);
- openpic_disable_8259_pass_through();
-#ifdef CONFIG_EPIC_SERIAL_MODE
- if (epic_serial_mode) {
- openpic_eicr_set_clk(7); /* Slowest value until we know better */
- openpic_enable_sie();
- }
-#endif
- openpic_set_priority(0);
-
- if (ppc_md.progress) ppc_md.progress("openpic: exit",0x222);
-}
-
-#ifdef notused
-static void openpic_enable_8259_pass_through(void)
-{
- openpic_clearfield(&OpenPIC->Global.Global_Configuration0,
- OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
-}
-#endif /* notused */
-
-static void openpic_disable_8259_pass_through(void)
-{
- openpic_setfield(&OpenPIC->Global.Global_Configuration0,
- OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
-}
-
-/*
- * Find out the current interrupt
- */
-u_int openpic_irq(void)
-{
- u_int vec;
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- vec = openpic_readfield(&OpenPIC->THIS_CPU.Interrupt_Acknowledge,
- OPENPIC_VECTOR_MASK);
- return vec;
-}
-
-void openpic_eoi(void)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- openpic_write(&OpenPIC->THIS_CPU.EOI, 0);
- /* Handle PCI write posting */
- (void)openpic_read(&OpenPIC->THIS_CPU.EOI);
-}
-
-u_int openpic_get_priority(void)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- return openpic_readfield(&OpenPIC->THIS_CPU.Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK);
-}
-
-void openpic_set_priority(u_int pri)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- check_arg_pri(pri);
- openpic_writefield(&OpenPIC->THIS_CPU.Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri);
-}
-
-/*
- * Get/set the spurious vector
- */
-#ifdef notused
-static u_int openpic_get_spurious(void)
-{
- return openpic_readfield(&OpenPIC->Global.Spurious_Vector,
- OPENPIC_VECTOR_MASK);
-}
-#endif /* notused */
-
-static void openpic_set_spurious(u_int vec)
-{
- check_arg_vec(vec);
- openpic_writefield(&OpenPIC->Global.Spurious_Vector, OPENPIC_VECTOR_MASK,
- vec);
-}
-
-#ifdef CONFIG_SMP
-/*
- * Convert a cpu mask from logical to physical cpu numbers.
- */
-static inline cpumask_t physmask(cpumask_t cpumask)
-{
- int i;
- cpumask_t mask = CPU_MASK_NONE;
-
- cpus_and(cpumask, cpu_online_map, cpumask);
-
- for (i = 0; i < NR_CPUS; i++)
- if (cpu_isset(i, cpumask))
- cpu_set(smp_hw_index[i], mask);
-
- return mask;
-}
-#else
-#define physmask(cpumask) (cpumask)
-#endif
-
-void openpic_reset_processor_phys(u_int mask)
-{
- openpic_write(&OpenPIC->Global.Processor_Initialization, mask);
-}
-
-#if defined(CONFIG_SMP) || defined(CONFIG_PM)
-static DEFINE_SPINLOCK(openpic_setup_lock);
-#endif
-
-#ifdef CONFIG_SMP
-/*
- * Initialize an interprocessor interrupt (and disable it)
- *
- * ipi: OpenPIC interprocessor interrupt number
- * pri: interrupt source priority
- * vec: the vector it will produce
- */
-static void __init openpic_initipi(u_int ipi, u_int pri, u_int vec)
-{
- check_arg_ipi(ipi);
- check_arg_pri(pri);
- check_arg_vec(vec);
- openpic_safe_writefield_IPI(&OpenPIC->Global.IPI_Vector_Priority(ipi),
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec);
-}
-
-/*
- * Send an IPI to one or more CPUs
- *
- * Externally called, however, it takes an IPI number (0...OPENPIC_NUM_IPI)
- * and not a system-wide interrupt number
- */
-void openpic_cause_IPI(u_int ipi, cpumask_t cpumask)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- check_arg_ipi(ipi);
- openpic_write(&OpenPIC->THIS_CPU.IPI_Dispatch(ipi),
- cpus_addr(physmask(cpumask))[0]);
-}
-
-void openpic_request_IPIs(void)
-{
- int i;
-
- /*
- * Make sure this matches what is defined in smp.c for
- * smp_message_{pass|recv}() or what shows up in
- * /proc/interrupts will be wrong!!! --Troy */
-
- if (OpenPIC == NULL)
- return;
-
- /*
- * IPIs are marked IRQF_DISABLED as they must run with irqs
- * disabled
- */
- request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset,
- openpic_ipi_action, IRQF_DISABLED,
- "IPI0 (call function)", NULL);
- request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+1,
- openpic_ipi_action, IRQF_DISABLED,
- "IPI1 (reschedule)", NULL);
- request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+2,
- openpic_ipi_action, IRQF_DISABLED,
- "IPI2 (invalidate tlb)", NULL);
- request_irq(OPENPIC_VEC_IPI+open_pic_irq_offset+3,
- openpic_ipi_action, IRQF_DISABLED,
- "IPI3 (xmon break)", NULL);
-
- for ( i = 0; i < OPENPIC_NUM_IPI ; i++ )
- openpic_enable_ipi(OPENPIC_VEC_IPI+open_pic_irq_offset+i);
-}
-
-/*
- * Do per-cpu setup for SMP systems.
- *
- * Get IPI's working and start taking interrupts.
- * -- Cort
- */
-
-void __devinit do_openpic_setup_cpu(void)
-{
-#ifdef CONFIG_IRQ_ALL_CPUS
- int i;
- cpumask_t msk = CPU_MASK_NONE;
-#endif
- spin_lock(&openpic_setup_lock);
-
-#ifdef CONFIG_IRQ_ALL_CPUS
- cpu_set(smp_hw_index[smp_processor_id()], msk);
-
- /* let the openpic know we want intrs. default affinity
- * is 0xffffffff until changed via /proc
- * That's how it's done on x86. If we want it differently, then
- * we should make sure we also change the default values of
- * irq_desc[].affinity in irq.c.
- */
- for (i = 0; i < NumSources; i++)
- openpic_mapirq(i, msk, CPU_MASK_ALL);
-#endif /* CONFIG_IRQ_ALL_CPUS */
- openpic_set_priority(0);
-
- spin_unlock(&openpic_setup_lock);
-}
-#endif /* CONFIG_SMP */
-
-/*
- * Initialize a timer interrupt (and disable it)
- *
- * timer: OpenPIC timer number
- * pri: interrupt source priority
- * vec: the vector it will produce
- */
-static void __init openpic_inittimer(u_int timer, u_int pri, u_int vec)
-{
- check_arg_timer(timer);
- check_arg_pri(pri);
- check_arg_vec(vec);
- openpic_safe_writefield(&OpenPIC->Global.Timer[timer].Vector_Priority,
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec);
-}
-
-/*
- * Map a timer interrupt to one or more CPUs
- */
-static void __init openpic_maptimer(u_int timer, cpumask_t cpumask)
-{
- cpumask_t phys = physmask(cpumask);
- check_arg_timer(timer);
- openpic_write(&OpenPIC->Global.Timer[timer].Destination,
- cpus_addr(phys)[0]);
-}
-
-/*
- * Change the priority of an interrupt
- */
-void __init
-openpic_set_irq_priority(u_int irq, u_int pri)
-{
- check_arg_irq(irq);
- openpic_safe_writefield(&ISR[irq - open_pic_irq_offset]->Vector_Priority,
- OPENPIC_PRIORITY_MASK,
- pri << OPENPIC_PRIORITY_SHIFT);
-}
-
-/*
- * Initalize the interrupt source which will generate an NMI.
- * This raises the interrupt's priority from 8 to 9.
- *
- * irq: The logical IRQ which generates an NMI.
- */
-void __init
-openpic_init_nmi_irq(u_int irq)
-{
- check_arg_irq(irq);
- openpic_set_irq_priority(irq, OPENPIC_PRIORITY_NMI);
-}
-
-/*
- *
- * All functions below take an offset'ed irq argument
- *
- */
-
-/*
- * Hookup a cascade to the OpenPIC.
- */
-
-static struct irqaction openpic_cascade_irqaction = {
- .handler = no_action,
- .flags = IRQF_DISABLED,
- .mask = CPU_MASK_NONE,
-};
-
-void __init
-openpic_hookup_cascade(u_int irq, char *name,
- int (*cascade_fn)(void))
-{
- openpic_cascade_irq = irq;
- openpic_cascade_fn = cascade_fn;
-
- if (setup_irq(irq, &openpic_cascade_irqaction))
- printk("Unable to get OpenPIC IRQ %d for cascade\n",
- irq - open_pic_irq_offset);
-}
-
-/*
- * Enable/disable an external interrupt source
- *
- * Externally called, irq is an offseted system-wide interrupt number
- */
-static void openpic_enable_irq(u_int irq)
-{
- volatile u_int __iomem *vpp;
-
- check_arg_irq(irq);
- vpp = &ISR[irq - open_pic_irq_offset]->Vector_Priority;
- openpic_clearfield(vpp, OPENPIC_MASK);
- /* make sure mask gets to controller before we return to user */
- do {
- mb(); /* sync is probably useless here */
- } while (openpic_readfield(vpp, OPENPIC_MASK));
-}
-
-static void openpic_disable_irq(u_int irq)
-{
- volatile u_int __iomem *vpp;
- u32 vp;
-
- check_arg_irq(irq);
- vpp = &ISR[irq - open_pic_irq_offset]->Vector_Priority;
- openpic_setfield(vpp, OPENPIC_MASK);
- /* make sure mask gets to controller before we return to user */
- do {
- mb(); /* sync is probably useless here */
- vp = openpic_readfield(vpp, OPENPIC_MASK | OPENPIC_ACTIVITY);
- } while((vp & OPENPIC_ACTIVITY) && !(vp & OPENPIC_MASK));
-}
-
-#ifdef CONFIG_SMP
-/*
- * Enable/disable an IPI interrupt source
- *
- * Externally called, irq is an offseted system-wide interrupt number
- */
-void openpic_enable_ipi(u_int irq)
-{
- irq -= (OPENPIC_VEC_IPI+open_pic_irq_offset);
- check_arg_ipi(irq);
- openpic_clearfield_IPI(&OpenPIC->Global.IPI_Vector_Priority(irq), OPENPIC_MASK);
-
-}
-
-void openpic_disable_ipi(u_int irq)
-{
- irq -= (OPENPIC_VEC_IPI+open_pic_irq_offset);
- check_arg_ipi(irq);
- openpic_setfield_IPI(&OpenPIC->Global.IPI_Vector_Priority(irq), OPENPIC_MASK);
-}
-#endif
-
-/*
- * Initialize an interrupt source (and disable it!)
- *
- * irq: OpenPIC interrupt number
- * pri: interrupt source priority
- * vec: the vector it will produce
- * pol: polarity (1 for positive, 0 for negative)
- * sense: 1 for level, 0 for edge
- */
-static void __init
-openpic_initirq(u_int irq, u_int pri, u_int vec, int pol, int sense)
-{
- openpic_safe_writefield(&ISR[irq]->Vector_Priority,
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
- OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec |
- (pol ? OPENPIC_POLARITY_POSITIVE :
- OPENPIC_POLARITY_NEGATIVE) |
- (sense ? OPENPIC_SENSE_LEVEL : OPENPIC_SENSE_EDGE));
-}
-
-/*
- * Map an interrupt source to one or more CPUs
- */
-static void openpic_mapirq(u_int irq, cpumask_t physmask, cpumask_t keepmask)
-{
- if (ISR[irq] == 0)
- return;
- if (!cpus_empty(keepmask)) {
- cpumask_t irqdest = { .bits[0] = openpic_read(&ISR[irq]->Destination) };
- cpus_and(irqdest, irqdest, keepmask);
- cpus_or(physmask, physmask, irqdest);
- }
- openpic_write(&ISR[irq]->Destination, cpus_addr(physmask)[0]);
-}
-
-#ifdef notused
-/*
- * Set the sense for an interrupt source (and disable it!)
- *
- * sense: 1 for level, 0 for edge
- */
-static void openpic_set_sense(u_int irq, int sense)
-{
- if (ISR[irq] != 0)
- openpic_safe_writefield(&ISR[irq]->Vector_Priority,
- OPENPIC_SENSE_LEVEL,
- (sense ? OPENPIC_SENSE_LEVEL : 0));
-}
-#endif /* notused */
-
-/* No spinlocks, should not be necessary with the OpenPIC
- * (1 register = 1 interrupt and we have the desc lock).
- */
-static void openpic_ack_irq(unsigned int irq_nr)
-{
-#ifdef __SLOW_VERSION__
- openpic_disable_irq(irq_nr);
- openpic_eoi();
-#else
- if ((irq_desc[irq_nr].status & IRQ_LEVEL) == 0)
- openpic_eoi();
-#endif
-}
-
-static void openpic_end_irq(unsigned int irq_nr)
-{
-#ifdef __SLOW_VERSION__
- if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
- && irq_desc[irq_nr].action)
- openpic_enable_irq(irq_nr);
-#else
- if ((irq_desc[irq_nr].status & IRQ_LEVEL) != 0)
- openpic_eoi();
-#endif
-}
-
-static void openpic_set_affinity(unsigned int irq_nr, cpumask_t cpumask)
-{
- openpic_mapirq(irq_nr - open_pic_irq_offset, physmask(cpumask), CPU_MASK_NONE);
-}
-
-#ifdef CONFIG_SMP
-static void openpic_ack_ipi(unsigned int irq_nr)
-{
- openpic_eoi();
-}
-
-static void openpic_end_ipi(unsigned int irq_nr)
-{
-}
-
-static irqreturn_t openpic_ipi_action(int cpl, void *dev_id)
-{
- smp_message_recv(cpl-OPENPIC_VEC_IPI-open_pic_irq_offset);
- return IRQ_HANDLED;
-}
-
-#endif /* CONFIG_SMP */
-
-int
-openpic_get_irq(void)
-{
- int irq = openpic_irq();
-
- /*
- * Check for the cascade interrupt and call the cascaded
- * interrupt controller function (usually i8259_irq) if so.
- * This should move to irq.c eventually. -- paulus
- */
- if (irq == openpic_cascade_irq && openpic_cascade_fn != NULL) {
- int cirq = openpic_cascade_fn();
-
- /* Allow for the cascade being shared with other devices */
- if (cirq != -1) {
- irq = cirq;
- openpic_eoi();
- }
- } else if (irq == OPENPIC_VEC_SPURIOUS)
- irq = -1;
- return irq;
-}
-
-#ifdef CONFIG_SMP
-void
-smp_openpic_message_pass(int target, int msg)
-{
- cpumask_t mask = CPU_MASK_ALL;
- /* make sure we're sending something that translates to an IPI */
- if (msg > 0x3) {
- printk("SMP %d: smp_message_pass: unknown msg %d\n",
- smp_processor_id(), msg);
- return;
- }
- switch (target) {
- case MSG_ALL:
- openpic_cause_IPI(msg, mask);
- break;
- case MSG_ALL_BUT_SELF:
- cpu_clear(smp_processor_id(), mask);
- openpic_cause_IPI(msg, mask);
- break;
- default:
- openpic_cause_IPI(msg, cpumask_of_cpu(target));
- break;
- }
-}
-#endif /* CONFIG_SMP */
-
-#ifdef CONFIG_PM
-
-/*
- * We implement the IRQ controller as a sysdev and put it
- * to sleep at powerdown stage (the callback is named suspend,
- * but it's old semantics, for the Device Model, it's really
- * powerdown). The possible problem is that another sysdev that
- * happens to be suspend after this one will have interrupts off,
- * that may be an issue... For now, this isn't an issue on pmac
- * though...
- */
-
-static u32 save_ipi_vp[OPENPIC_NUM_IPI];
-static u32 save_irq_src_vp[OPENPIC_MAX_SOURCES];
-static u32 save_irq_src_dest[OPENPIC_MAX_SOURCES];
-static u32 save_cpu_task_pri[OPENPIC_MAX_PROCESSORS];
-static int openpic_suspend_count;
-
-static void openpic_cached_enable_irq(u_int irq)
-{
- check_arg_irq(irq);
- save_irq_src_vp[irq - open_pic_irq_offset] &= ~OPENPIC_MASK;
-}
-
-static void openpic_cached_disable_irq(u_int irq)
-{
- check_arg_irq(irq);
- save_irq_src_vp[irq - open_pic_irq_offset] |= OPENPIC_MASK;
-}
-
-/* WARNING: Can be called directly by the cpufreq code with NULL parameter,
- * we need something better to deal with that... Maybe switch to S1 for
- * cpufreq changes
- */
-int openpic_suspend(struct sys_device *sysdev, pm_message_t state)
-{
- int i;
- unsigned long flags;
-
- spin_lock_irqsave(&openpic_setup_lock, flags);
-
- if (openpic_suspend_count++ > 0) {
- spin_unlock_irqrestore(&openpic_setup_lock, flags);
- return 0;
- }
-
- openpic_set_priority(0xf);
-
- open_pic.enable = openpic_cached_enable_irq;
- open_pic.disable = openpic_cached_disable_irq;
-
- for (i=0; i<NumProcessors; i++) {
- save_cpu_task_pri[i] = openpic_read(&OpenPIC->Processor[i].Current_Task_Priority);
- openpic_writefield(&OpenPIC->Processor[i].Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK, 0xf);
- }
-
- for (i=0; i<OPENPIC_NUM_IPI; i++)
- save_ipi_vp[i] = openpic_read(&OpenPIC->Global.IPI_Vector_Priority(i));
- for (i=0; i<NumSources; i++) {
- if (ISR[i] == 0)
- continue;
- save_irq_src_vp[i] = openpic_read(&ISR[i]->Vector_Priority) & ~OPENPIC_ACTIVITY;
- save_irq_src_dest[i] = openpic_read(&ISR[i]->Destination);
- }
-
- spin_unlock_irqrestore(&openpic_setup_lock, flags);
-
- return 0;
-}
-
-/* WARNING: Can be called directly by the cpufreq code with NULL parameter,
- * we need something better to deal with that... Maybe switch to S1 for
- * cpufreq changes
- */
-int openpic_resume(struct sys_device *sysdev)
-{
- int i;
- unsigned long flags;
- u32 vppmask = OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
- OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK |
- OPENPIC_MASK;
-
- spin_lock_irqsave(&openpic_setup_lock, flags);
-
- if ((--openpic_suspend_count) > 0) {
- spin_unlock_irqrestore(&openpic_setup_lock, flags);
- return 0;
- }
-
- /* OpenPIC sometimes seem to need some time to be fully back up... */
- do {
- openpic_set_spurious(OPENPIC_VEC_SPURIOUS);
- } while(openpic_readfield(&OpenPIC->Global.Spurious_Vector, OPENPIC_VECTOR_MASK)
- != OPENPIC_VEC_SPURIOUS);
-
- openpic_disable_8259_pass_through();
-
- for (i=0; i<OPENPIC_NUM_IPI; i++)
- openpic_write(&OpenPIC->Global.IPI_Vector_Priority(i),
- save_ipi_vp[i]);
- for (i=0; i<NumSources; i++) {
- if (ISR[i] == 0)
- continue;
- openpic_write(&ISR[i]->Destination, save_irq_src_dest[i]);
- openpic_write(&ISR[i]->Vector_Priority, save_irq_src_vp[i]);
- /* make sure mask gets to controller before we return to user */
- do {
- openpic_write(&ISR[i]->Vector_Priority, save_irq_src_vp[i]);
- } while (openpic_readfield(&ISR[i]->Vector_Priority, vppmask)
- != (save_irq_src_vp[i] & vppmask));
- }
- for (i=0; i<NumProcessors; i++)
- openpic_write(&OpenPIC->Processor[i].Current_Task_Priority,
- save_cpu_task_pri[i]);
-
- open_pic.enable = openpic_enable_irq;
- open_pic.disable = openpic_disable_irq;
-
- openpic_set_priority(0);
-
- spin_unlock_irqrestore(&openpic_setup_lock, flags);
-
- return 0;
-}
-
-#endif /* CONFIG_PM */
-
-static struct sysdev_class openpic_sysclass = {
- .name = "openpic",
-};
-
-static struct sys_device device_openpic = {
- .id = 0,
- .cls = &openpic_sysclass,
-};
-
-static struct sysdev_driver driver_openpic = {
-#ifdef CONFIG_PM
- .suspend = &openpic_suspend,
- .resume = &openpic_resume,
-#endif /* CONFIG_PM */
-};
-
-static int __init init_openpic_sysfs(void)
-{
- int rc;
-
- if (!OpenPIC_Addr)
- return -ENODEV;
- printk(KERN_DEBUG "Registering openpic with sysfs...\n");
- rc = sysdev_class_register(&openpic_sysclass);
- if (rc) {
- printk(KERN_ERR "Failed registering openpic sys class\n");
- return -ENODEV;
- }
- rc = sysdev_register(&device_openpic);
- if (rc) {
- printk(KERN_ERR "Failed registering openpic sys device\n");
- return -ENODEV;
- }
- rc = sysdev_driver_register(&openpic_sysclass, &driver_openpic);
- if (rc) {
- printk(KERN_ERR "Failed registering openpic sys driver\n");
- return -ENODEV;
- }
- return 0;
-}
-
-subsys_initcall(init_openpic_sysfs);
-
diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c
deleted file mode 100644
index 449075a..0000000
--- a/arch/ppc/syslib/open_pic2.c
+++ /dev/null
@@ -1,710 +0,0 @@
-/*
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- *
- * This is a duplicate of open_pic.c that deals with U3s MPIC on
- * G5 PowerMacs. It's the same file except it's using big endian
- * register accesses
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/sysdev.h>
-#include <linux/errno.h>
-#include <asm/ptrace.h>
-#include <asm/signal.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/sections.h>
-#include <asm/open_pic.h>
-#include <asm/i8259.h>
-#include <asm/machdep.h>
-
-#include "open_pic_defs.h"
-
-void *OpenPIC2_Addr;
-static volatile struct OpenPIC *OpenPIC2 = NULL;
-/*
- * We define OpenPIC_InitSenses table thusly:
- * bit 0x1: sense, 0 for edge and 1 for level.
- * bit 0x2: polarity, 0 for negative, 1 for positive.
- */
-extern u_int OpenPIC_NumInitSenses;
-extern u_char *OpenPIC_InitSenses;
-extern int use_of_interrupt_tree;
-
-static u_int NumProcessors;
-static u_int NumSources;
-static int open_pic2_irq_offset;
-static volatile OpenPIC_Source *ISR[NR_IRQS];
-
-/* Global Operations */
-static void openpic2_disable_8259_pass_through(void);
-static void openpic2_set_priority(u_int pri);
-static void openpic2_set_spurious(u_int vector);
-
-/* Timer Interrupts */
-static void openpic2_inittimer(u_int timer, u_int pri, u_int vector);
-static void openpic2_maptimer(u_int timer, u_int cpumask);
-
-/* Interrupt Sources */
-static void openpic2_enable_irq(u_int irq);
-static void openpic2_disable_irq(u_int irq);
-static void openpic2_initirq(u_int irq, u_int pri, u_int vector, int polarity,
- int is_level);
-static void openpic2_mapirq(u_int irq, u_int cpumask, u_int keepmask);
-
-/*
- * These functions are not used but the code is kept here
- * for completeness and future reference.
- */
-static void openpic2_reset(void);
-#ifdef notused
-static void openpic2_enable_8259_pass_through(void);
-static u_int openpic2_get_priority(void);
-static u_int openpic2_get_spurious(void);
-static void openpic2_set_sense(u_int irq, int sense);
-#endif /* notused */
-
-/*
- * Description of the openpic for the higher-level irq code
- */
-static void openpic2_end_irq(unsigned int irq_nr);
-static void openpic2_ack_irq(unsigned int irq_nr);
-
-struct hw_interrupt_type open_pic2 = {
- .typename = " OpenPIC2 ",
- .enable = openpic2_enable_irq,
- .disable = openpic2_disable_irq,
- .ack = openpic2_ack_irq,
- .end = openpic2_end_irq,
-};
-
-/*
- * Accesses to the current processor's openpic registers
- * On cascaded controller, this is only CPU 0
- */
-#define THIS_CPU Processor[0]
-#define DECL_THIS_CPU
-#define CHECK_THIS_CPU
-
-#if 1
-#define check_arg_ipi(ipi) \
- if (ipi < 0 || ipi >= OPENPIC_NUM_IPI) \
- printk("open_pic.c:%d: illegal ipi %d\n", __LINE__, ipi);
-#define check_arg_timer(timer) \
- if (timer < 0 || timer >= OPENPIC_NUM_TIMERS) \
- printk("open_pic.c:%d: illegal timer %d\n", __LINE__, timer);
-#define check_arg_vec(vec) \
- if (vec < 0 || vec >= OPENPIC_NUM_VECTORS) \
- printk("open_pic.c:%d: illegal vector %d\n", __LINE__, vec);
-#define check_arg_pri(pri) \
- if (pri < 0 || pri >= OPENPIC_NUM_PRI) \
- printk("open_pic.c:%d: illegal priority %d\n", __LINE__, pri);
-/*
- * Print out a backtrace if it's out of range, since if it's larger than NR_IRQ's
- * data has probably been corrupted and we're going to panic or deadlock later
- * anyway --Troy
- */
-extern unsigned long* _get_SP(void);
-#define check_arg_irq(irq) \
- if (irq < open_pic2_irq_offset || irq >= NumSources+open_pic2_irq_offset \
- || ISR[irq - open_pic2_irq_offset] == 0) { \
- printk("open_pic.c:%d: illegal irq %d\n", __LINE__, irq); \
- /*print_backtrace(_get_SP());*/ }
-#define check_arg_cpu(cpu) \
- if (cpu < 0 || cpu >= NumProcessors){ \
- printk("open_pic2.c:%d: illegal cpu %d\n", __LINE__, cpu); \
- /*print_backtrace(_get_SP());*/ }
-#else
-#define check_arg_ipi(ipi) do {} while (0)
-#define check_arg_timer(timer) do {} while (0)
-#define check_arg_vec(vec) do {} while (0)
-#define check_arg_pri(pri) do {} while (0)
-#define check_arg_irq(irq) do {} while (0)
-#define check_arg_cpu(cpu) do {} while (0)
-#endif
-
-static u_int openpic2_read(volatile u_int *addr)
-{
- u_int val;
-
- val = in_be32(addr);
- return val;
-}
-
-static inline void openpic2_write(volatile u_int *addr, u_int val)
-{
- out_be32(addr, val);
-}
-
-static inline u_int openpic2_readfield(volatile u_int *addr, u_int mask)
-{
- u_int val = openpic2_read(addr);
- return val & mask;
-}
-
-inline void openpic2_writefield(volatile u_int *addr, u_int mask,
- u_int field)
-{
- u_int val = openpic2_read(addr);
- openpic2_write(addr, (val & ~mask) | (field & mask));
-}
-
-static inline void openpic2_clearfield(volatile u_int *addr, u_int mask)
-{
- openpic2_writefield(addr, mask, 0);
-}
-
-static inline void openpic2_setfield(volatile u_int *addr, u_int mask)
-{
- openpic2_writefield(addr, mask, mask);
-}
-
-static void openpic2_safe_writefield(volatile u_int *addr, u_int mask,
- u_int field)
-{
- openpic2_setfield(addr, OPENPIC_MASK);
- while (openpic2_read(addr) & OPENPIC_ACTIVITY);
- openpic2_writefield(addr, mask | OPENPIC_MASK, field | OPENPIC_MASK);
-}
-
-static void openpic2_reset(void)
-{
- openpic2_setfield(&OpenPIC2->Global.Global_Configuration0,
- OPENPIC_CONFIG_RESET);
- while (openpic2_readfield(&OpenPIC2->Global.Global_Configuration0,
- OPENPIC_CONFIG_RESET))
- mb();
-}
-
-void __init openpic2_set_sources(int first_irq, int num_irqs, void *first_ISR)
-{
- volatile OpenPIC_Source *src = first_ISR;
- int i, last_irq;
-
- last_irq = first_irq + num_irqs;
- if (last_irq > NumSources)
- NumSources = last_irq;
- if (src == 0)
- src = &((struct OpenPIC *)OpenPIC2_Addr)->Source[first_irq];
- for (i = first_irq; i < last_irq; ++i, ++src)
- ISR[i] = src;
-}
-
-/*
- * The `offset' parameter defines where the interrupts handled by the
- * OpenPIC start in the space of interrupt numbers that the kernel knows
- * about. In other words, the OpenPIC's IRQ0 is numbered `offset' in the
- * kernel's interrupt numbering scheme.
- * We assume there is only one OpenPIC.
- */
-void __init openpic2_init(int offset)
-{
- u_int t, i;
- u_int timerfreq;
- const char *version;
-
- if (!OpenPIC2_Addr) {
- printk("No OpenPIC2 found !\n");
- return;
- }
- OpenPIC2 = (volatile struct OpenPIC *)OpenPIC2_Addr;
-
- if (ppc_md.progress) ppc_md.progress("openpic: enter", 0x122);
-
- t = openpic2_read(&OpenPIC2->Global.Feature_Reporting0);
- switch (t & OPENPIC_FEATURE_VERSION_MASK) {
- case 1:
- version = "1.0";
- break;
- case 2:
- version = "1.2";
- break;
- case 3:
- version = "1.3";
- break;
- default:
- version = "?";
- break;
- }
- NumProcessors = ((t & OPENPIC_FEATURE_LAST_PROCESSOR_MASK) >>
- OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT) + 1;
- if (NumSources == 0)
- openpic2_set_sources(0,
- ((t & OPENPIC_FEATURE_LAST_SOURCE_MASK) >>
- OPENPIC_FEATURE_LAST_SOURCE_SHIFT) + 1,
- NULL);
- printk("OpenPIC (2) Version %s (%d CPUs and %d IRQ sources) at %p\n",
- version, NumProcessors, NumSources, OpenPIC2);
- timerfreq = openpic2_read(&OpenPIC2->Global.Timer_Frequency);
- if (timerfreq)
- printk("OpenPIC timer frequency is %d.%06d MHz\n",
- timerfreq / 1000000, timerfreq % 1000000);
-
- open_pic2_irq_offset = offset;
-
- /* Initialize timer interrupts */
- if ( ppc_md.progress ) ppc_md.progress("openpic2: timer",0x3ba);
- for (i = 0; i < OPENPIC_NUM_TIMERS; i++) {
- /* Disabled, Priority 0 */
- openpic2_inittimer(i, 0, OPENPIC2_VEC_TIMER+i+offset);
- /* No processor */
- openpic2_maptimer(i, 0);
- }
-
- /* Initialize external interrupts */
- if (ppc_md.progress) ppc_md.progress("openpic2: external",0x3bc);
-
- openpic2_set_priority(0xf);
-
- /* Init all external sources, including possibly the cascade. */
- for (i = 0; i < NumSources; i++) {
- int sense;
-
- if (ISR[i] == 0)
- continue;
-
- /* the bootloader may have left it enabled (bad !) */
- openpic2_disable_irq(i+offset);
-
- sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: \
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE);
-
- if (sense & IRQ_SENSE_MASK)
- irq_desc[i+offset].status = IRQ_LEVEL;
-
- /* Enabled, Priority 8 */
- openpic2_initirq(i, 8, i+offset, (sense & IRQ_POLARITY_MASK),
- (sense & IRQ_SENSE_MASK));
- /* Processor 0 */
- openpic2_mapirq(i, 1<<0, 0);
- }
-
- /* Init descriptors */
- for (i = offset; i < NumSources + offset; i++)
- irq_desc[i].chip = &open_pic2;
-
- /* Initialize the spurious interrupt */
- if (ppc_md.progress) ppc_md.progress("openpic2: spurious",0x3bd);
- openpic2_set_spurious(OPENPIC2_VEC_SPURIOUS+offset);
-
- openpic2_disable_8259_pass_through();
- openpic2_set_priority(0);
-
- if (ppc_md.progress) ppc_md.progress("openpic2: exit",0x222);
-}
-
-#ifdef notused
-static void openpic2_enable_8259_pass_through(void)
-{
- openpic2_clearfield(&OpenPIC2->Global.Global_Configuration0,
- OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
-}
-#endif /* notused */
-
-/* This can't be __init, it is used in openpic_sleep_restore_intrs */
-static void openpic2_disable_8259_pass_through(void)
-{
- openpic2_setfield(&OpenPIC2->Global.Global_Configuration0,
- OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE);
-}
-
-/*
- * Find out the current interrupt
- */
-u_int openpic2_irq(void)
-{
- u_int vec;
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- vec = openpic2_readfield(&OpenPIC2->THIS_CPU.Interrupt_Acknowledge,
- OPENPIC_VECTOR_MASK);
- return vec;
-}
-
-void openpic2_eoi(void)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- openpic2_write(&OpenPIC2->THIS_CPU.EOI, 0);
- /* Handle PCI write posting */
- (void)openpic2_read(&OpenPIC2->THIS_CPU.EOI);
-}
-
-#ifdef notused
-static u_int openpic2_get_priority(void)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- return openpic2_readfield(&OpenPIC2->THIS_CPU.Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK);
-}
-#endif /* notused */
-
-static void __init openpic2_set_priority(u_int pri)
-{
- DECL_THIS_CPU;
-
- CHECK_THIS_CPU;
- check_arg_pri(pri);
- openpic2_writefield(&OpenPIC2->THIS_CPU.Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK, pri);
-}
-
-/*
- * Get/set the spurious vector
- */
-#ifdef notused
-static u_int openpic2_get_spurious(void)
-{
- return openpic2_readfield(&OpenPIC2->Global.Spurious_Vector,
- OPENPIC_VECTOR_MASK);
-}
-#endif /* notused */
-
-/* This can't be __init, it is used in openpic_sleep_restore_intrs */
-static void openpic2_set_spurious(u_int vec)
-{
- check_arg_vec(vec);
- openpic2_writefield(&OpenPIC2->Global.Spurious_Vector, OPENPIC_VECTOR_MASK,
- vec);
-}
-
-static DEFINE_SPINLOCK(openpic2_setup_lock);
-
-/*
- * Initialize a timer interrupt (and disable it)
- *
- * timer: OpenPIC timer number
- * pri: interrupt source priority
- * vec: the vector it will produce
- */
-static void __init openpic2_inittimer(u_int timer, u_int pri, u_int vec)
-{
- check_arg_timer(timer);
- check_arg_pri(pri);
- check_arg_vec(vec);
- openpic2_safe_writefield(&OpenPIC2->Global.Timer[timer].Vector_Priority,
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec);
-}
-
-/*
- * Map a timer interrupt to one or more CPUs
- */
-static void __init openpic2_maptimer(u_int timer, u_int cpumask)
-{
- check_arg_timer(timer);
- openpic2_write(&OpenPIC2->Global.Timer[timer].Destination,
- cpumask);
-}
-
-/*
- * Initalize the interrupt source which will generate an NMI.
- * This raises the interrupt's priority from 8 to 9.
- *
- * irq: The logical IRQ which generates an NMI.
- */
-void __init
-openpic2_init_nmi_irq(u_int irq)
-{
- check_arg_irq(irq);
- openpic2_safe_writefield(&ISR[irq - open_pic2_irq_offset]->Vector_Priority,
- OPENPIC_PRIORITY_MASK,
- 9 << OPENPIC_PRIORITY_SHIFT);
-}
-
-/*
- *
- * All functions below take an offset'ed irq argument
- *
- */
-
-
-/*
- * Enable/disable an external interrupt source
- *
- * Externally called, irq is an offseted system-wide interrupt number
- */
-static void openpic2_enable_irq(u_int irq)
-{
- volatile u_int *vpp;
-
- check_arg_irq(irq);
- vpp = &ISR[irq - open_pic2_irq_offset]->Vector_Priority;
- openpic2_clearfield(vpp, OPENPIC_MASK);
- /* make sure mask gets to controller before we return to user */
- do {
- mb(); /* sync is probably useless here */
- } while (openpic2_readfield(vpp, OPENPIC_MASK));
-}
-
-static void openpic2_disable_irq(u_int irq)
-{
- volatile u_int *vpp;
- u32 vp;
-
- check_arg_irq(irq);
- vpp = &ISR[irq - open_pic2_irq_offset]->Vector_Priority;
- openpic2_setfield(vpp, OPENPIC_MASK);
- /* make sure mask gets to controller before we return to user */
- do {
- mb(); /* sync is probably useless here */
- vp = openpic2_readfield(vpp, OPENPIC_MASK | OPENPIC_ACTIVITY);
- } while((vp & OPENPIC_ACTIVITY) && !(vp & OPENPIC_MASK));
-}
-
-
-/*
- * Initialize an interrupt source (and disable it!)
- *
- * irq: OpenPIC interrupt number
- * pri: interrupt source priority
- * vec: the vector it will produce
- * pol: polarity (1 for positive, 0 for negative)
- * sense: 1 for level, 0 for edge
- */
-static void __init
-openpic2_initirq(u_int irq, u_int pri, u_int vec, int pol, int sense)
-{
- openpic2_safe_writefield(&ISR[irq]->Vector_Priority,
- OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
- OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK,
- (pri << OPENPIC_PRIORITY_SHIFT) | vec |
- (pol ? OPENPIC_POLARITY_POSITIVE :
- OPENPIC_POLARITY_NEGATIVE) |
- (sense ? OPENPIC_SENSE_LEVEL : OPENPIC_SENSE_EDGE));
-}
-
-/*
- * Map an interrupt source to one or more CPUs
- */
-static void openpic2_mapirq(u_int irq, u_int physmask, u_int keepmask)
-{
- if (ISR[irq] == 0)
- return;
- if (keepmask != 0)
- physmask |= openpic2_read(&ISR[irq]->Destination) & keepmask;
- openpic2_write(&ISR[irq]->Destination, physmask);
-}
-
-#ifdef notused
-/*
- * Set the sense for an interrupt source (and disable it!)
- *
- * sense: 1 for level, 0 for edge
- */
-static void openpic2_set_sense(u_int irq, int sense)
-{
- if (ISR[irq] != 0)
- openpic2_safe_writefield(&ISR[irq]->Vector_Priority,
- OPENPIC_SENSE_LEVEL,
- (sense ? OPENPIC_SENSE_LEVEL : 0));
-}
-#endif /* notused */
-
-/* No spinlocks, should not be necessary with the OpenPIC
- * (1 register = 1 interrupt and we have the desc lock).
- */
-static void openpic2_ack_irq(unsigned int irq_nr)
-{
- openpic2_disable_irq(irq_nr);
- openpic2_eoi();
-}
-
-static void openpic2_end_irq(unsigned int irq_nr)
-{
- if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
- openpic2_enable_irq(irq_nr);
-}
-
-int
-openpic2_get_irq(void)
-{
- int irq = openpic2_irq();
-
- if (irq == (OPENPIC2_VEC_SPURIOUS + open_pic2_irq_offset))
- irq = -1;
- return irq;
-}
-
-#ifdef CONFIG_PM
-
-/*
- * We implement the IRQ controller as a sysdev and put it
- * to sleep at powerdown stage (the callback is named suspend,
- * but it's old semantics, for the Device Model, it's really
- * powerdown). The possible problem is that another sysdev that
- * happens to be suspend after this one will have interrupts off,
- * that may be an issue... For now, this isn't an issue on pmac
- * though...
- */
-
-static u32 save_ipi_vp[OPENPIC_NUM_IPI];
-static u32 save_irq_src_vp[OPENPIC_MAX_SOURCES];
-static u32 save_irq_src_dest[OPENPIC_MAX_SOURCES];
-static u32 save_cpu_task_pri[OPENPIC_MAX_PROCESSORS];
-static int openpic_suspend_count;
-
-static void openpic2_cached_enable_irq(u_int irq)
-{
- check_arg_irq(irq);
- save_irq_src_vp[irq - open_pic2_irq_offset] &= ~OPENPIC_MASK;
-}
-
-static void openpic2_cached_disable_irq(u_int irq)
-{
- check_arg_irq(irq);
- save_irq_src_vp[irq - open_pic2_irq_offset] |= OPENPIC_MASK;
-}
-
-/* WARNING: Can be called directly by the cpufreq code with NULL parameter,
- * we need something better to deal with that... Maybe switch to S1 for
- * cpufreq changes
- */
-int openpic2_suspend(struct sys_device *sysdev, pm_message_t state)
-{
- int i;
- unsigned long flags;
-
- spin_lock_irqsave(&openpic2_setup_lock, flags);
-
- if (openpic_suspend_count++ > 0) {
- spin_unlock_irqrestore(&openpic2_setup_lock, flags);
- return 0;
- }
-
- open_pic2.enable = openpic2_cached_enable_irq;
- open_pic2.disable = openpic2_cached_disable_irq;
-
- for (i=0; i<NumProcessors; i++) {
- save_cpu_task_pri[i] = openpic2_read(&OpenPIC2->Processor[i].Current_Task_Priority);
- openpic2_writefield(&OpenPIC2->Processor[i].Current_Task_Priority,
- OPENPIC_CURRENT_TASK_PRIORITY_MASK, 0xf);
- }
-
- for (i=0; i<OPENPIC_NUM_IPI; i++)
- save_ipi_vp[i] = openpic2_read(&OpenPIC2->Global.IPI_Vector_Priority(i));
- for (i=0; i<NumSources; i++) {
- if (ISR[i] == 0)
- continue;
- save_irq_src_vp[i] = openpic2_read(&ISR[i]->Vector_Priority) & ~OPENPIC_ACTIVITY;
- save_irq_src_dest[i] = openpic2_read(&ISR[i]->Destination);
- }
-
- spin_unlock_irqrestore(&openpic2_setup_lock, flags);
-
- return 0;
-}
-
-/* WARNING: Can be called directly by the cpufreq code with NULL parameter,
- * we need something better to deal with that... Maybe switch to S1 for
- * cpufreq changes
- */
-int openpic2_resume(struct sys_device *sysdev)
-{
- int i;
- unsigned long flags;
- u32 vppmask = OPENPIC_PRIORITY_MASK | OPENPIC_VECTOR_MASK |
- OPENPIC_SENSE_MASK | OPENPIC_POLARITY_MASK |
- OPENPIC_MASK;
-
- spin_lock_irqsave(&openpic2_setup_lock, flags);
-
- if ((--openpic_suspend_count) > 0) {
- spin_unlock_irqrestore(&openpic2_setup_lock, flags);
- return 0;
- }
-
- openpic2_reset();
-
- /* OpenPIC sometimes seem to need some time to be fully back up... */
- do {
- openpic2_set_spurious(OPENPIC2_VEC_SPURIOUS+open_pic2_irq_offset);
- } while(openpic2_readfield(&OpenPIC2->Global.Spurious_Vector, OPENPIC_VECTOR_MASK)
- != (OPENPIC2_VEC_SPURIOUS + open_pic2_irq_offset));
-
- openpic2_disable_8259_pass_through();
-
- for (i=0; i<OPENPIC_NUM_IPI; i++)
- openpic2_write(&OpenPIC2->Global.IPI_Vector_Priority(i),
- save_ipi_vp[i]);
- for (i=0; i<NumSources; i++) {
- if (ISR[i] == 0)
- continue;
- openpic2_write(&ISR[i]->Destination, save_irq_src_dest[i]);
- openpic2_write(&ISR[i]->Vector_Priority, save_irq_src_vp[i]);
- /* make sure mask gets to controller before we return to user */
- do {
- openpic2_write(&ISR[i]->Vector_Priority, save_irq_src_vp[i]);
- } while (openpic2_readfield(&ISR[i]->Vector_Priority, vppmask)
- != (save_irq_src_vp[i] & vppmask));
- }
- for (i=0; i<NumProcessors; i++)
- openpic2_write(&OpenPIC2->Processor[i].Current_Task_Priority,
- save_cpu_task_pri[i]);
-
- open_pic2.enable = openpic2_enable_irq;
- open_pic2.disable = openpic2_disable_irq;
-
- spin_unlock_irqrestore(&openpic2_setup_lock, flags);
-
- return 0;
-}
-
-#endif /* CONFIG_PM */
-
-/* HACK ALERT */
-static struct sysdev_class openpic2_sysclass = {
- .name = "openpic2",
-};
-
-static struct sys_device device_openpic2 = {
- .id = 0,
- .cls = &openpic2_sysclass,
-};
-
-static struct sysdev_driver driver_openpic2 = {
-#ifdef CONFIG_PM
- .suspend = &openpic2_suspend,
- .resume = &openpic2_resume,
-#endif /* CONFIG_PM */
-};
-
-static int __init init_openpic2_sysfs(void)
-{
- int rc;
-
- if (!OpenPIC2_Addr)
- return -ENODEV;
- printk(KERN_DEBUG "Registering openpic2 with sysfs...\n");
- rc = sysdev_class_register(&openpic2_sysclass);
- if (rc) {
- printk(KERN_ERR "Failed registering openpic sys class\n");
- return -ENODEV;
- }
- rc = sysdev_register(&device_openpic2);
- if (rc) {
- printk(KERN_ERR "Failed registering openpic sys device\n");
- return -ENODEV;
- }
- rc = sysdev_driver_register(&openpic2_sysclass, &driver_openpic2);
- if (rc) {
- printk(KERN_ERR "Failed registering openpic sys driver\n");
- return -ENODEV;
- }
- return 0;
-}
-
-subsys_initcall(init_openpic2_sysfs);
-
diff --git a/arch/ppc/syslib/open_pic_defs.h b/arch/ppc/syslib/open_pic_defs.h
deleted file mode 100644
index 3a25de7..0000000
--- a/arch/ppc/syslib/open_pic_defs.h
+++ /dev/null
@@ -1,287 +0,0 @@
-/*
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is based on the following documentation:
- *
- * The Open Programmable Interrupt Controller (PIC)
- * Register Interface Specification Revision 1.2
- *
- * Issue Date: October 1995
- *
- * Issued jointly by Advanced Micro Devices and Cyrix Corporation
- *
- * AMD is a registered trademark of Advanced Micro Devices, Inc.
- * Copyright (C) 1995, Advanced Micro Devices, Inc. and Cyrix, Inc.
- * All Rights Reserved.
- *
- * To receive a copy of this documentation, send an email to openpic@amd.com.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#ifndef _LINUX_OPENPIC_H
-#define _LINUX_OPENPIC_H
-
-#ifdef __KERNEL__
-
- /*
- * OpenPIC supports up to 2048 interrupt sources and up to 32 processors
- */
-
-#define OPENPIC_MAX_SOURCES 2048
-#define OPENPIC_MAX_PROCESSORS 32
-#define OPENPIC_MAX_ISU 16
-
-#define OPENPIC_NUM_TIMERS 4
-#define OPENPIC_NUM_IPI 4
-#define OPENPIC_NUM_PRI 16
-#define OPENPIC_NUM_VECTORS 256
-
-
-
- /*
- * OpenPIC Registers are 32 bits and aligned on 128 bit boundaries
- */
-
-typedef struct _OpenPIC_Reg {
- u_int Reg; /* Little endian! */
- char Pad[0xc];
-} OpenPIC_Reg;
-
-
- /*
- * Per Processor Registers
- */
-
-typedef struct _OpenPIC_Processor {
- /*
- * Private Shadow Registers (for SLiC backwards compatibility)
- */
- u_int IPI0_Dispatch_Shadow; /* Write Only */
- char Pad1[0x4];
- u_int IPI0_Vector_Priority_Shadow; /* Read/Write */
- char Pad2[0x34];
- /*
- * Interprocessor Interrupt Command Ports
- */
- OpenPIC_Reg _IPI_Dispatch[OPENPIC_NUM_IPI]; /* Write Only */
- /*
- * Current Task Priority Register
- */
- OpenPIC_Reg _Current_Task_Priority; /* Read/Write */
- char Pad3[0x10];
- /*
- * Interrupt Acknowledge Register
- */
- OpenPIC_Reg _Interrupt_Acknowledge; /* Read Only */
- /*
- * End of Interrupt (EOI) Register
- */
- OpenPIC_Reg _EOI; /* Read/Write */
- char Pad5[0xf40];
-} OpenPIC_Processor;
-
-
- /*
- * Timer Registers
- */
-
-typedef struct _OpenPIC_Timer {
- OpenPIC_Reg _Current_Count; /* Read Only */
- OpenPIC_Reg _Base_Count; /* Read/Write */
- OpenPIC_Reg _Vector_Priority; /* Read/Write */
- OpenPIC_Reg _Destination; /* Read/Write */
-} OpenPIC_Timer;
-
-
- /*
- * Global Registers
- */
-
-typedef struct _OpenPIC_Global {
- /*
- * Feature Reporting Registers
- */
- OpenPIC_Reg _Feature_Reporting0; /* Read Only */
- OpenPIC_Reg _Feature_Reporting1; /* Future Expansion */
- /*
- * Global Configuration Registers
- */
- OpenPIC_Reg _Global_Configuration0; /* Read/Write */
- OpenPIC_Reg _Global_Configuration1; /* Future Expansion */
- /*
- * Vendor Specific Registers
- */
- OpenPIC_Reg _Vendor_Specific[4];
- /*
- * Vendor Identification Register
- */
- OpenPIC_Reg _Vendor_Identification; /* Read Only */
- /*
- * Processor Initialization Register
- */
- OpenPIC_Reg _Processor_Initialization; /* Read/Write */
- /*
- * IPI Vector/Priority Registers
- */
- OpenPIC_Reg _IPI_Vector_Priority[OPENPIC_NUM_IPI]; /* Read/Write */
- /*
- * Spurious Vector Register
- */
- OpenPIC_Reg _Spurious_Vector; /* Read/Write */
- /*
- * Global Timer Registers
- */
- OpenPIC_Reg _Timer_Frequency; /* Read/Write */
- OpenPIC_Timer Timer[OPENPIC_NUM_TIMERS];
- char Pad1[0xee00];
-} OpenPIC_Global;
-
-
- /*
- * Interrupt Source Registers
- */
-
-typedef struct _OpenPIC_Source {
- OpenPIC_Reg _Vector_Priority; /* Read/Write */
- OpenPIC_Reg _Destination; /* Read/Write */
-} OpenPIC_Source, *OpenPIC_SourcePtr;
-
-
- /*
- * OpenPIC Register Map
- */
-
-struct OpenPIC {
- char Pad1[0x1000];
- /*
- * Global Registers
- */
- OpenPIC_Global Global;
- /*
- * Interrupt Source Configuration Registers
- */
- OpenPIC_Source Source[OPENPIC_MAX_SOURCES];
- /*
- * Per Processor Registers
- */
- OpenPIC_Processor Processor[OPENPIC_MAX_PROCESSORS];
-};
-
- /*
- * Current Task Priority Register
- */
-
-#define OPENPIC_CURRENT_TASK_PRIORITY_MASK 0x0000000f
-
- /*
- * Who Am I Register
- */
-
-#define OPENPIC_WHO_AM_I_ID_MASK 0x0000001f
-
- /*
- * Feature Reporting Register 0
- */
-
-#define OPENPIC_FEATURE_LAST_SOURCE_MASK 0x07ff0000
-#define OPENPIC_FEATURE_LAST_SOURCE_SHIFT 16
-#define OPENPIC_FEATURE_LAST_PROCESSOR_MASK 0x00001f00
-#define OPENPIC_FEATURE_LAST_PROCESSOR_SHIFT 8
-#define OPENPIC_FEATURE_VERSION_MASK 0x000000ff
-
- /*
- * Global Configuration Register 0
- */
-
-#define OPENPIC_CONFIG_RESET 0x80000000
-#define OPENPIC_CONFIG_8259_PASSTHROUGH_DISABLE 0x20000000
-#define OPENPIC_CONFIG_BASE_MASK 0x000fffff
-
- /*
- * Global Configuration Register 1
- * This is the EICR on EPICs.
- */
-
-#define OPENPIC_EICR_S_CLK_MASK 0x70000000
-#define OPENPIC_EICR_SIE 0x08000000
-
- /*
- * Vendor Identification Register
- */
-
-#define OPENPIC_VENDOR_ID_STEPPING_MASK 0x00ff0000
-#define OPENPIC_VENDOR_ID_STEPPING_SHIFT 16
-#define OPENPIC_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00
-#define OPENPIC_VENDOR_ID_DEVICE_ID_SHIFT 8
-#define OPENPIC_VENDOR_ID_VENDOR_ID_MASK 0x000000ff
-
- /*
- * Vector/Priority Registers
- */
-
-#define OPENPIC_MASK 0x80000000
-#define OPENPIC_ACTIVITY 0x40000000 /* Read Only */
-#define OPENPIC_PRIORITY_MASK 0x000f0000
-#define OPENPIC_PRIORITY_SHIFT 16
-#define OPENPIC_VECTOR_MASK 0x000000ff
-
-
- /*
- * Interrupt Source Registers
- */
-
-#define OPENPIC_POLARITY_POSITIVE 0x00800000
-#define OPENPIC_POLARITY_NEGATIVE 0x00000000
-#define OPENPIC_POLARITY_MASK 0x00800000
-#define OPENPIC_SENSE_LEVEL 0x00400000
-#define OPENPIC_SENSE_EDGE 0x00000000
-#define OPENPIC_SENSE_MASK 0x00400000
-
-
- /*
- * Timer Registers
- */
-
-#define OPENPIC_COUNT_MASK 0x7fffffff
-#define OPENPIC_TIMER_TOGGLE 0x80000000
-#define OPENPIC_TIMER_COUNT_INHIBIT 0x80000000
-
-
- /*
- * Aliases to make life simpler
- */
-
-/* Per Processor Registers */
-#define IPI_Dispatch(i) _IPI_Dispatch[i].Reg
-#define Current_Task_Priority _Current_Task_Priority.Reg
-#define Interrupt_Acknowledge _Interrupt_Acknowledge.Reg
-#define EOI _EOI.Reg
-
-/* Global Registers */
-#define Feature_Reporting0 _Feature_Reporting0.Reg
-#define Feature_Reporting1 _Feature_Reporting1.Reg
-#define Global_Configuration0 _Global_Configuration0.Reg
-#define Global_Configuration1 _Global_Configuration1.Reg
-#define Vendor_Specific(i) _Vendor_Specific[i].Reg
-#define Vendor_Identification _Vendor_Identification.Reg
-#define Processor_Initialization _Processor_Initialization.Reg
-#define IPI_Vector_Priority(i) _IPI_Vector_Priority[i].Reg
-#define Spurious_Vector _Spurious_Vector.Reg
-#define Timer_Frequency _Timer_Frequency.Reg
-
-/* Timer Registers */
-#define Current_Count _Current_Count.Reg
-#define Base_Count _Base_Count.Reg
-#define Vector_Priority _Vector_Priority.Reg
-#define Destination _Destination.Reg
-
-/* Interrupt Source Registers */
-#define Vector_Priority _Vector_Priority.Reg
-#define Destination _Destination.Reg
-
-#endif /* __KERNEL__ */
-
-#endif /* _LINUX_OPENPIC_H */
diff --git a/arch/ppc/syslib/pci_auto.c b/arch/ppc/syslib/pci_auto.c
deleted file mode 100644
index ee20a86..0000000
--- a/arch/ppc/syslib/pci_auto.c
+++ /dev/null
@@ -1,515 +0,0 @@
-/*
- * PCI autoconfiguration library
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * The CardBus support is very preliminary. Preallocating space is
- * the way to go but will require some change in card services to
- * make it useful. Eventually this will ensure that we can put
- * multiple CB bridges behind multiple P2P bridges. For now, at
- * least it ensures that we place the CB bridge BAR and assigned
- * initial bus numbers. I definitely need to do something about
- * the lack of 16-bit I/O support. -MDP
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-
-#include <asm/pci-bridge.h>
-
-#define PCIAUTO_IDE_MODE_MASK 0x05
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif /* DEBUG */
-
-static int pciauto_upper_iospc;
-static int pciauto_upper_memspc;
-
-void __init pciauto_setup_bars(struct pci_controller *hose,
- int current_bus,
- int pci_devfn,
- int bar_limit)
-{
- int bar_response, bar_size, bar_value;
- int bar, addr_mask;
- int * upper_limit;
- int found_mem64 = 0;
-
- DBG("PCI Autoconfig: Found Bus %d, Device %d, Function %d\n",
- current_bus, PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn) );
-
- for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar+=4) {
- /* Tickle the BAR and get the response */
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- bar,
- 0xffffffff);
- early_read_config_dword(hose,
- current_bus,
- pci_devfn,
- bar,
- &bar_response);
-
- /* If BAR is not implemented go to the next BAR */
- if (!bar_response)
- continue;
-
- /* Check the BAR type and set our address mask */
- if (bar_response & PCI_BASE_ADDRESS_SPACE) {
- addr_mask = PCI_BASE_ADDRESS_IO_MASK;
- upper_limit = &pciauto_upper_iospc;
- DBG("PCI Autoconfig: BAR 0x%x, I/O, ", bar);
- } else {
- if ( (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
- PCI_BASE_ADDRESS_MEM_TYPE_64)
- found_mem64 = 1;
-
- addr_mask = PCI_BASE_ADDRESS_MEM_MASK;
- upper_limit = &pciauto_upper_memspc;
- DBG("PCI Autoconfig: BAR 0x%x, Mem ", bar);
- }
-
- /* Calculate requested size */
- bar_size = ~(bar_response & addr_mask) + 1;
-
- /* Allocate a base address */
- bar_value = (*upper_limit - bar_size) & ~(bar_size - 1);
-
- /* Write it out and update our limit */
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- bar,
- bar_value);
-
- *upper_limit = bar_value;
-
- /*
- * If we are a 64-bit decoder then increment to the
- * upper 32 bits of the bar and force it to locate
- * in the lower 4GB of memory.
- */
- if (found_mem64) {
- bar += 4;
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- bar,
- 0x00000000);
- found_mem64 = 0;
- }
-
- DBG("size=0x%x, address=0x%x\n",
- bar_size, bar_value);
- }
-
-}
-
-void __init pciauto_prescan_setup_bridge(struct pci_controller *hose,
- int current_bus,
- int pci_devfn,
- int sub_bus,
- int *iosave,
- int *memsave)
-{
- /* Configure bus number registers */
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_PRIMARY_BUS,
- current_bus);
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_SECONDARY_BUS,
- sub_bus + 1);
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_SUBORDINATE_BUS,
- 0xff);
-
- /* Round memory allocator to 1MB boundary */
- pciauto_upper_memspc &= ~(0x100000 - 1);
- *memsave = pciauto_upper_memspc;
-
- /* Round I/O allocator to 4KB boundary */
- pciauto_upper_iospc &= ~(0x1000 - 1);
- *iosave = pciauto_upper_iospc;
-
- /* Set up memory and I/O filter limits, assume 32-bit I/O space */
- early_write_config_word(hose,
- current_bus,
- pci_devfn,
- PCI_MEMORY_LIMIT,
- ((pciauto_upper_memspc - 1) & 0xfff00000) >> 16);
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_IO_LIMIT,
- ((pciauto_upper_iospc - 1) & 0x0000f000) >> 8);
- early_write_config_word(hose,
- current_bus,
- pci_devfn,
- PCI_IO_LIMIT_UPPER16,
- ((pciauto_upper_iospc - 1) & 0xffff0000) >> 16);
-
- /* Zero upper 32 bits of prefetchable base/limit */
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_PREF_BASE_UPPER32,
- 0);
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_PREF_LIMIT_UPPER32,
- 0);
-}
-
-void __init pciauto_postscan_setup_bridge(struct pci_controller *hose,
- int current_bus,
- int pci_devfn,
- int sub_bus,
- int *iosave,
- int *memsave)
-{
- int cmdstat;
-
- /* Configure bus number registers */
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_SUBORDINATE_BUS,
- sub_bus);
-
- /*
- * Round memory allocator to 1MB boundary.
- * If no space used, allocate minimum.
- */
- pciauto_upper_memspc &= ~(0x100000 - 1);
- if (*memsave == pciauto_upper_memspc)
- pciauto_upper_memspc -= 0x00100000;
-
- early_write_config_word(hose,
- current_bus,
- pci_devfn,
- PCI_MEMORY_BASE,
- pciauto_upper_memspc >> 16);
-
- /* Allocate 1MB for pre-fretch */
- early_write_config_word(hose,
- current_bus,
- pci_devfn,
- PCI_PREF_MEMORY_LIMIT,
- ((pciauto_upper_memspc - 1) & 0xfff00000) >> 16);
-
- pciauto_upper_memspc -= 0x100000;
-
- early_write_config_word(hose,
- current_bus,
- pci_devfn,
- PCI_PREF_MEMORY_BASE,
- pciauto_upper_memspc >> 16);
-
- /* Round I/O allocator to 4KB boundary */
- pciauto_upper_iospc &= ~(0x1000 - 1);
- if (*iosave == pciauto_upper_iospc)
- pciauto_upper_iospc -= 0x1000;
-
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_IO_BASE,
- (pciauto_upper_iospc & 0x0000f000) >> 8);
- early_write_config_word(hose,
- current_bus,
- pci_devfn,
- PCI_IO_BASE_UPPER16,
- pciauto_upper_iospc >> 16);
-
- /* Enable memory and I/O accesses, enable bus master */
- early_read_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_COMMAND,
- &cmdstat);
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_COMMAND,
- cmdstat |
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER);
-}
-
-void __init pciauto_prescan_setup_cardbus_bridge(struct pci_controller *hose,
- int current_bus,
- int pci_devfn,
- int sub_bus,
- int *iosave,
- int *memsave)
-{
- /* Configure bus number registers */
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_PRIMARY_BUS,
- current_bus);
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_SECONDARY_BUS,
- sub_bus + 1);
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_SUBORDINATE_BUS,
- 0xff);
-
- /* Round memory allocator to 4KB boundary */
- pciauto_upper_memspc &= ~(0x1000 - 1);
- *memsave = pciauto_upper_memspc;
-
- /* Round I/O allocator to 4 byte boundary */
- pciauto_upper_iospc &= ~(0x4 - 1);
- *iosave = pciauto_upper_iospc;
-
- /* Set up memory and I/O filter limits, assume 32-bit I/O space */
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- 0x20,
- pciauto_upper_memspc - 1);
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- 0x30,
- pciauto_upper_iospc - 1);
-}
-
-void __init pciauto_postscan_setup_cardbus_bridge(struct pci_controller *hose,
- int current_bus,
- int pci_devfn,
- int sub_bus,
- int *iosave,
- int *memsave)
-{
- int cmdstat;
-
- /*
- * Configure subordinate bus number. The PCI subsystem
- * bus scan will renumber buses (reserving three additional
- * for this PCI<->CardBus bridge for the case where a CardBus
- * adapter contains a P2P or CB2CB bridge.
- */
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_SUBORDINATE_BUS,
- sub_bus);
-
- /*
- * Reserve an additional 4MB for mem space and 16KB for
- * I/O space. This should cover any additional space
- * requirement of unusual CardBus devices with
- * additional bridges that can consume more address space.
- *
- * Although pcmcia-cs currently will reprogram bridge
- * windows, the goal is to add an option to leave them
- * alone and use the bridge window ranges as the regions
- * that are searched for free resources upon hot-insertion
- * of a device. This will allow a PCI<->CardBus bridge
- * configured by this routine to happily live behind a
- * P2P bridge in a system.
- */
- pciauto_upper_memspc -= 0x00400000;
- pciauto_upper_iospc -= 0x00004000;
-
- /* Round memory allocator to 4KB boundary */
- pciauto_upper_memspc &= ~(0x1000 - 1);
-
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- 0x1c,
- pciauto_upper_memspc);
-
- /* Round I/O allocator to 4 byte boundary */
- pciauto_upper_iospc &= ~(0x4 - 1);
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- 0x2c,
- pciauto_upper_iospc);
-
- /* Enable memory and I/O accesses, enable bus master */
- early_read_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_COMMAND,
- &cmdstat);
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_COMMAND,
- cmdstat |
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER);
-}
-
-int __init pciauto_bus_scan(struct pci_controller *hose, int current_bus)
-{
- int sub_bus, pci_devfn, pci_class, cmdstat, found_multi = 0;
- unsigned short vid;
- unsigned char header_type;
-
- /*
- * Fetch our I/O and memory space upper boundaries used
- * to allocated base addresses on this hose.
- */
- if (current_bus == hose->first_busno) {
- pciauto_upper_iospc = hose->io_space.end + 1;
- pciauto_upper_memspc = hose->mem_space.end + 1;
- }
-
- sub_bus = current_bus;
-
- for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
- /* Skip our host bridge */
- if ( (current_bus == hose->first_busno) && (pci_devfn == 0) )
- continue;
-
- if (PCI_FUNC(pci_devfn) && !found_multi)
- continue;
-
- /* If config space read fails from this device, move on */
- if (early_read_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_HEADER_TYPE,
- &header_type))
- continue;
-
- if (!PCI_FUNC(pci_devfn))
- found_multi = header_type & 0x80;
-
- early_read_config_word(hose,
- current_bus,
- pci_devfn,
- PCI_VENDOR_ID,
- &vid);
-
- if (vid != 0xffff) {
- early_read_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_CLASS_REVISION, &pci_class);
- if ( (pci_class >> 16) == PCI_CLASS_BRIDGE_PCI ) {
- int iosave, memsave;
-
- DBG("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_SLOT(pci_devfn));
- /* Allocate PCI I/O and/or memory space */
- pciauto_setup_bars(hose,
- current_bus,
- pci_devfn,
- PCI_BASE_ADDRESS_1);
-
- pciauto_prescan_setup_bridge(hose,
- current_bus,
- pci_devfn,
- sub_bus,
- &iosave,
- &memsave);
- sub_bus = pciauto_bus_scan(hose, sub_bus+1);
- pciauto_postscan_setup_bridge(hose,
- current_bus,
- pci_devfn,
- sub_bus,
- &iosave,
- &memsave);
- } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) {
- int iosave, memsave;
-
- DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn));
- /* Place CardBus Socket/ExCA registers */
- pciauto_setup_bars(hose,
- current_bus,
- pci_devfn,
- PCI_BASE_ADDRESS_0);
-
- pciauto_prescan_setup_cardbus_bridge(hose,
- current_bus,
- pci_devfn,
- sub_bus,
- &iosave,
- &memsave);
- sub_bus = pciauto_bus_scan(hose, sub_bus+1);
- pciauto_postscan_setup_cardbus_bridge(hose,
- current_bus,
- pci_devfn,
- sub_bus,
- &iosave,
- &memsave);
- } else {
- if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) {
- unsigned char prg_iface;
-
- early_read_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_CLASS_PROG,
- &prg_iface);
- if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
- DBG("PCI Autoconfig: Skipping legacy mode IDE controller\n");
- continue;
- }
- }
- /* Allocate PCI I/O and/or memory space */
- pciauto_setup_bars(hose,
- current_bus,
- pci_devfn,
- PCI_BASE_ADDRESS_5);
-
- /*
- * Enable some standard settings
- */
- early_read_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_COMMAND,
- &cmdstat);
- early_write_config_dword(hose,
- current_bus,
- pci_devfn,
- PCI_COMMAND,
- cmdstat |
- PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY |
- PCI_COMMAND_MASTER);
- early_write_config_byte(hose,
- current_bus,
- pci_devfn,
- PCI_LATENCY_TIMER,
- 0x80);
- }
- }
- }
- return sub_bus;
-}
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c
deleted file mode 100644
index c3b7b8b..0000000
--- a/arch/ppc/syslib/ppc403_pic.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- *
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- *
- * Module name: ppc403_pic.c
- *
- * Description:
- * Interrupt controller driver for PowerPC 403-based processors.
- */
-
-/*
- * The PowerPC 403 cores' Asynchronous Interrupt Controller (AIC) has
- * 32 possible interrupts, a majority of which are not implemented on
- * all cores. There are six configurable, external interrupt pins and
- * there are eight internal interrupts for the on-chip serial port
- * (SPU), DMA controller, and JTAG controller.
- *
- */
-
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/stddef.h>
-
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/machdep.h>
-
-/* Function Prototypes */
-
-static void ppc403_aic_enable(unsigned int irq);
-static void ppc403_aic_disable(unsigned int irq);
-static void ppc403_aic_disable_and_ack(unsigned int irq);
-
-static struct hw_interrupt_type ppc403_aic = {
- .typename = "403GC AIC",
- .enable = ppc403_aic_enable,
- .disable = ppc403_aic_disable,
- .ack = ppc403_aic_disable_and_ack,
-};
-
-int
-ppc403_pic_get_irq(void)
-{
- int irq;
- unsigned long bits;
-
- /*
- * Only report the status of those interrupts that are actually
- * enabled.
- */
-
- bits = mfdcr(DCRN_EXISR) & mfdcr(DCRN_EXIER);
-
- /*
- * Walk through the interrupts from highest priority to lowest, and
- * report the first pending interrupt found.
- * We want PPC, not C bit numbering, so just subtract the ffs()
- * result from 32.
- */
- irq = 32 - ffs(bits);
-
- if (irq == NR_AIC_IRQS)
- irq = -1;
-
- return (irq);
-}
-
-static void
-ppc403_aic_enable(unsigned int irq)
-{
- int bit, word;
-
- bit = irq & 0x1f;
- word = irq >> 5;
-
- ppc_cached_irq_mask[word] |= (1 << (31 - bit));
- mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
-}
-
-static void
-ppc403_aic_disable(unsigned int irq)
-{
- int bit, word;
-
- bit = irq & 0x1f;
- word = irq >> 5;
-
- ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
- mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
-}
-
-static void
-ppc403_aic_disable_and_ack(unsigned int irq)
-{
- int bit, word;
-
- bit = irq & 0x1f;
- word = irq >> 5;
-
- ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
- mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
- mtdcr(DCRN_EXISR, (1 << (31 - bit)));
-}
-
-void __init
-ppc4xx_pic_init(void)
-{
- int i;
-
- /*
- * Disable all external interrupts until they are
- * explicitly requested.
- */
- ppc_cached_irq_mask[0] = 0;
-
- mtdcr(DCRN_EXIER, ppc_cached_irq_mask[0]);
-
- ppc_md.get_irq = ppc403_pic_get_irq;
-
- for (i = 0; i < NR_IRQS; i++)
- irq_desc[i].chip = &ppc403_aic;
-}
diff --git a/arch/ppc/syslib/ppc405_pci.c b/arch/ppc/syslib/ppc405_pci.c
deleted file mode 100644
index 9e90356..0000000
--- a/arch/ppc/syslib/ppc405_pci.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * Authors: Frank Rowand <frank_rowand@mvista.com>,
- * Debbie Chu <debbie_chu@mvista.com>, or source@mvista.com
- * Further modifications by Armin Kuster <akuster@mvista.com>
- *
- * 2000 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Based on arch/ppc/kernel/indirect.c, Copyright (C) 1998 Gabriel Paubert.
- */
-
-#include <linux/pci.h>
-#include <asm/io.h>
-#include <asm/system.h>
-#include <asm/machdep.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <asm/ocp.h>
-#include <asm/ibm4xx.h>
-#include <asm/pci-bridge.h>
-#include <asm/ibm_ocp_pci.h>
-
-
-extern void bios_fixup(struct pci_controller *, struct pcil0_regs *);
-extern int ppc405_map_irq(struct pci_dev *dev, unsigned char idsel,
- unsigned char pin);
-
-void
-ppc405_pcibios_fixup_resources(struct pci_dev *dev)
-{
- int i;
- unsigned long max_host_addr;
- unsigned long min_host_addr;
- struct resource *res;
-
- /*
- * openbios puts some graphics cards in the same range as the host
- * controller uses to map to SDRAM. Fix it.
- */
-
- min_host_addr = 0;
- max_host_addr = PPC405_PCI_MEM_BASE - 1;
-
- for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
- res = dev->resource + i;
- if (!res->start)
- continue;
- if ((res->flags & IORESOURCE_MEM) &&
- (((res->start >= min_host_addr)
- && (res->start <= max_host_addr))
- || ((res->end >= min_host_addr)
- && (res->end <= max_host_addr))
- || ((res->start < min_host_addr)
- && (res->end > max_host_addr))
- )
- ) {
-
- /* force pcibios_assign_resources() to assign a new address */
- res->end -= res->start;
- res->start = 0;
- }
- }
-}
-
-static int
-ppc4xx_exclude_device(unsigned char bus, unsigned char devfn)
-{
- /* We prevent us from seeing ourselves to avoid having
- * the kernel try to remap our BAR #1 and fuck up bus
- * master from external PCI devices
- */
- return (bus == 0 && devfn == 0);
-}
-
-void
-ppc4xx_find_bridges(void)
-{
- struct pci_controller *hose_a;
- struct pcil0_regs *pcip;
- unsigned int tmp_addr;
- unsigned int tmp_size;
- unsigned int reg_index;
- unsigned int new_pmm_max = 0;
- unsigned int new_pmm_min = 0;
-
- isa_io_base = 0;
- isa_mem_base = 0;
- pci_dram_offset = 0;
-
- /* Setup PCI32 hose */
- hose_a = pcibios_alloc_controller();
- if (!hose_a)
- return;
- setup_indirect_pci(hose_a, PPC405_PCI_CONFIG_ADDR,
- PPC405_PCI_CONFIG_DATA);
-
- pcip = ioremap(PPC4xx_PCI_LCFG_PADDR, PAGE_SIZE);
- if (pcip != NULL) {
-
-#if defined(CONFIG_BIOS_FIXUP)
- bios_fixup(hose_a, pcip);
-#endif
- new_pmm_min = 0xffffffff;
- for (reg_index = 0; reg_index < 3; reg_index++) {
- tmp_size = in_le32(&pcip->pmm[reg_index].ma); // mask & attrs
- /* test the enable bit */
- if ((tmp_size & 0x1) == 0)
- continue;
- tmp_addr = in_le32(&pcip->pmm[reg_index].pcila); // PCI addr
- if (tmp_addr < PPC405_PCI_PHY_MEM_BASE) {
- printk(KERN_DEBUG
- "Disabling mapping to PCI mem addr 0x%8.8x\n",
- tmp_addr);
- out_le32(&pcip->pmm[reg_index].ma, tmp_size & ~1); // *_PMMOMA
- continue;
- }
- tmp_addr = in_le32(&pcip->pmm[reg_index].la); // *_PMMOLA
- if (tmp_addr < new_pmm_min)
- new_pmm_min = tmp_addr;
- tmp_addr = tmp_addr +
- (0xffffffff - (tmp_size & 0xffffc000));
- if (tmp_addr > PPC405_PCI_UPPER_MEM) {
- new_pmm_max = tmp_addr; // PPC405_PCI_UPPER_MEM
- } else {
- new_pmm_max = PPC405_PCI_UPPER_MEM;
- }
-
- } // for
-
- iounmap(pcip);
- }
-
- hose_a->first_busno = 0;
- hose_a->last_busno = 0xff;
- hose_a->pci_mem_offset = 0;
-
- /* Setup bridge memory/IO ranges & resources
- * TODO: Handle firmware setting up a legacy ISA mem base
- */
- hose_a->io_space.start = PPC405_PCI_LOWER_IO;
- hose_a->io_space.end = PPC405_PCI_UPPER_IO;
- hose_a->mem_space.start = new_pmm_min;
- hose_a->mem_space.end = new_pmm_max;
- hose_a->io_base_phys = PPC405_PCI_PHY_IO_BASE;
- hose_a->io_base_virt = ioremap(hose_a->io_base_phys, 0x10000);
- hose_a->io_resource.start = 0;
- hose_a->io_resource.end = PPC405_PCI_UPPER_IO - PPC405_PCI_LOWER_IO;
- hose_a->io_resource.flags = IORESOURCE_IO;
- hose_a->io_resource.name = "PCI I/O";
- hose_a->mem_resources[0].start = new_pmm_min;
- hose_a->mem_resources[0].end = new_pmm_max;
- hose_a->mem_resources[0].flags = IORESOURCE_MEM;
- hose_a->mem_resources[0].name = "PCI Memory";
- isa_io_base = (int) hose_a->io_base_virt;
- isa_mem_base = 0; /* ISA not implemented */
- ISA_DMA_THRESHOLD = 0x00ffffff; /* ??? ISA not implemented */
-
- /* Scan busses & initial setup by pci_auto */
- hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
- hose_a->last_busno = 0;
-
- /* Setup ppc_md */
- ppc_md.pcibios_fixup = NULL;
- ppc_md.pci_exclude_device = ppc4xx_exclude_device;
- ppc_md.pcibios_fixup_resources = ppc405_pcibios_fixup_resources;
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = ppc405_map_irq;
-}
diff --git a/arch/ppc/syslib/ppc440spe_pcie.c b/arch/ppc/syslib/ppc440spe_pcie.c
deleted file mode 100644
index dd5d4b9..0000000
--- a/arch/ppc/syslib/ppc440spe_pcie.c
+++ /dev/null
@@ -1,441 +0,0 @@
-/*
- * Copyright (c) 2005 Cisco Systems. All rights reserved.
- * Roland Dreier <rolandd@cisco.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-
-#include <asm/reg.h>
-#include <asm/io.h>
-#include <asm/ibm44x.h>
-
-#include "ppc440spe_pcie.h"
-
-static int
-pcie_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 *val)
-{
- struct pci_controller *hose = bus->sysdata;
-
- if (PCI_SLOT(devfn) != 1)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- offset += devfn << 12;
-
- /*
- * Note: the caller has already checked that offset is
- * suitably aligned and that len is 1, 2 or 4.
- */
- switch (len) {
- case 1:
- *val = in_8(hose->cfg_data + offset);
- break;
- case 2:
- *val = in_le16(hose->cfg_data + offset);
- break;
- default:
- *val = in_le32(hose->cfg_data + offset);
- break;
- }
-
- if (0) printk("%s: read %x(%d) @ %x\n", __func__, *val, len, offset);
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int
-pcie_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 val)
-{
- struct pci_controller *hose = bus->sysdata;
-
- if (PCI_SLOT(devfn) != 1)
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- offset += devfn << 12;
-
- switch (len) {
- case 1:
- out_8(hose->cfg_data + offset, val);
- break;
- case 2:
- out_le16(hose->cfg_data + offset, val);
- break;
- default:
- out_le32(hose->cfg_data + offset, val);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops pcie_pci_ops =
-{
- .read = pcie_read_config,
- .write = pcie_write_config
-};
-
-enum {
- PTYPE_ENDPOINT = 0x0,
- PTYPE_LEGACY_ENDPOINT = 0x1,
- PTYPE_ROOT_PORT = 0x4,
-
- LNKW_X1 = 0x1,
- LNKW_X4 = 0x4,
- LNKW_X8 = 0x8
-};
-
-static void check_error(void)
-{
- u32 valPE0, valPE1, valPE2;
-
- /* SDR0_PEGPLLLCT1 reset */
- if (!(valPE0 = SDR_READ(PESDR0_PLLLCT1) & 0x01000000)) {
- printk(KERN_INFO "PCIE: SDR0_PEGPLLLCT1 reset error 0x%8x\n", valPE0);
- }
-
- valPE0 = SDR_READ(PESDR0_RCSSET);
- valPE1 = SDR_READ(PESDR1_RCSSET);
- valPE2 = SDR_READ(PESDR2_RCSSET);
-
- /* SDR0_PExRCSSET rstgu */
- if ( !(valPE0 & 0x01000000) ||
- !(valPE1 & 0x01000000) ||
- !(valPE2 & 0x01000000)) {
- printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstgu error\n");
- }
-
- /* SDR0_PExRCSSET rstdl */
- if ( !(valPE0 & 0x00010000) ||
- !(valPE1 & 0x00010000) ||
- !(valPE2 & 0x00010000)) {
- printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstdl error\n");
- }
-
- /* SDR0_PExRCSSET rstpyn */
- if ( (valPE0 & 0x00001000) ||
- (valPE1 & 0x00001000) ||
- (valPE2 & 0x00001000)) {
- printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstpyn error\n");
- }
-
- /* SDR0_PExRCSSET hldplb */
- if ( (valPE0 & 0x10000000) ||
- (valPE1 & 0x10000000) ||
- (valPE2 & 0x10000000)) {
- printk(KERN_INFO "PCIE: SDR0_PExRCSSET hldplb error\n");
- }
-
- /* SDR0_PExRCSSET rdy */
- if ( (valPE0 & 0x00100000) ||
- (valPE1 & 0x00100000) ||
- (valPE2 & 0x00100000)) {
- printk(KERN_INFO "PCIE: SDR0_PExRCSSET rdy error\n");
- }
-
- /* SDR0_PExRCSSET shutdown */
- if ( (valPE0 & 0x00000100) ||
- (valPE1 & 0x00000100) ||
- (valPE2 & 0x00000100)) {
- printk(KERN_INFO "PCIE: SDR0_PExRCSSET shutdown error\n");
- }
-}
-
-/*
- * Initialize PCI Express core as described in User Manual section 27.12.1
- */
-int ppc440spe_init_pcie(void)
-{
- /* Set PLL clock receiver to LVPECL */
- SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) | 1 << 28);
-
- check_error();
-
- printk(KERN_INFO "PCIE initialization OK\n");
-
- if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000))
- printk(KERN_INFO "PESDR_PLLCT2 resistance calibration failed (0x%08x)\n",
- SDR_READ(PESDR0_PLLLCT2));
-
- /* De-assert reset of PCIe PLL, wait for lock */
- SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) & ~(1 << 24));
- udelay(3);
-
- return 0;
-}
-
-int ppc440spe_init_pcie_rootport(int port)
-{
- static int core_init;
- void __iomem *utl_base;
- u32 val = 0;
- int i;
-
- if (!core_init) {
- ++core_init;
- i = ppc440spe_init_pcie();
- if (i)
- return i;
- }
-
- /*
- * Initialize various parts of the PCI Express core for our port:
- *
- * - Set as a root port and enable max width
- * (PXIE0 -> X8, PCIE1 and PCIE2 -> X4).
- * - Set up UTL configuration.
- * - Increase SERDES drive strength to levels suggested by AMCC.
- * - De-assert RSTPYN, RSTDL and RSTGU.
- */
- switch (port) {
- case 0:
- SDR_WRITE(PESDR0_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X8 << 12);
-
- SDR_WRITE(PESDR0_UTLSET1, 0x21222222);
- SDR_WRITE(PESDR0_UTLSET2, 0x11000000);
-
- SDR_WRITE(PESDR0_HSSL0SET1, 0x35000000);
- SDR_WRITE(PESDR0_HSSL1SET1, 0x35000000);
- SDR_WRITE(PESDR0_HSSL2SET1, 0x35000000);
- SDR_WRITE(PESDR0_HSSL3SET1, 0x35000000);
- SDR_WRITE(PESDR0_HSSL4SET1, 0x35000000);
- SDR_WRITE(PESDR0_HSSL5SET1, 0x35000000);
- SDR_WRITE(PESDR0_HSSL6SET1, 0x35000000);
- SDR_WRITE(PESDR0_HSSL7SET1, 0x35000000);
-
- SDR_WRITE(PESDR0_RCSSET,
- (SDR_READ(PESDR0_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12);
- break;
-
- case 1:
- SDR_WRITE(PESDR1_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X4 << 12);
-
- SDR_WRITE(PESDR1_UTLSET1, 0x21222222);
- SDR_WRITE(PESDR1_UTLSET2, 0x11000000);
-
- SDR_WRITE(PESDR1_HSSL0SET1, 0x35000000);
- SDR_WRITE(PESDR1_HSSL1SET1, 0x35000000);
- SDR_WRITE(PESDR1_HSSL2SET1, 0x35000000);
- SDR_WRITE(PESDR1_HSSL3SET1, 0x35000000);
-
- SDR_WRITE(PESDR1_RCSSET,
- (SDR_READ(PESDR1_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12);
- break;
-
- case 2:
- SDR_WRITE(PESDR2_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X4 << 12);
-
- SDR_WRITE(PESDR2_UTLSET1, 0x21222222);
- SDR_WRITE(PESDR2_UTLSET2, 0x11000000);
-
- SDR_WRITE(PESDR2_HSSL0SET1, 0x35000000);
- SDR_WRITE(PESDR2_HSSL1SET1, 0x35000000);
- SDR_WRITE(PESDR2_HSSL2SET1, 0x35000000);
- SDR_WRITE(PESDR2_HSSL3SET1, 0x35000000);
-
- SDR_WRITE(PESDR2_RCSSET,
- (SDR_READ(PESDR2_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12);
- break;
- }
-
- mdelay(1000);
-
- switch (port) {
- case 0: val = SDR_READ(PESDR0_RCSSTS); break;
- case 1: val = SDR_READ(PESDR1_RCSSTS); break;
- case 2: val = SDR_READ(PESDR2_RCSSTS); break;
- }
-
- if (!(val & (1 << 20)))
- printk(KERN_INFO "PCIE%d: PGRST inactive\n", port);
- else
- printk(KERN_WARNING "PGRST for PCIE%d failed %08x\n", port, val);
-
- switch (port) {
- case 0: printk(KERN_INFO "PCIE0: LOOP %08x\n", SDR_READ(PESDR0_LOOP)); break;
- case 1: printk(KERN_INFO "PCIE1: LOOP %08x\n", SDR_READ(PESDR1_LOOP)); break;
- case 2: printk(KERN_INFO "PCIE2: LOOP %08x\n", SDR_READ(PESDR2_LOOP)); break;
- }
-
- /*
- * Map UTL registers at 0xc_1000_0n00
- */
- switch (port) {
- case 0:
- mtdcr(DCRN_PEGPL_REGBAH(PCIE0), 0x0000000c);
- mtdcr(DCRN_PEGPL_REGBAL(PCIE0), 0x10000000);
- mtdcr(DCRN_PEGPL_REGMSK(PCIE0), 0x00007001);
- mtdcr(DCRN_PEGPL_SPECIAL(PCIE0), 0x68782800);
- break;
-
- case 1:
- mtdcr(DCRN_PEGPL_REGBAH(PCIE1), 0x0000000c);
- mtdcr(DCRN_PEGPL_REGBAL(PCIE1), 0x10001000);
- mtdcr(DCRN_PEGPL_REGMSK(PCIE1), 0x00007001);
- mtdcr(DCRN_PEGPL_SPECIAL(PCIE1), 0x68782800);
- break;
-
- case 2:
- mtdcr(DCRN_PEGPL_REGBAH(PCIE2), 0x0000000c);
- mtdcr(DCRN_PEGPL_REGBAL(PCIE2), 0x10002000);
- mtdcr(DCRN_PEGPL_REGMSK(PCIE2), 0x00007001);
- mtdcr(DCRN_PEGPL_SPECIAL(PCIE2), 0x68782800);
- }
-
- utl_base = ioremap64(0xc10000000ull + 0x1000 * port, 0x100);
-
- /*
- * Set buffer allocations and then assert VRB and TXE.
- */
- out_be32(utl_base + PEUTL_OUTTR, 0x08000000);
- out_be32(utl_base + PEUTL_INTR, 0x02000000);
- out_be32(utl_base + PEUTL_OPDBSZ, 0x10000000);
- out_be32(utl_base + PEUTL_PBBSZ, 0x53000000);
- out_be32(utl_base + PEUTL_IPHBSZ, 0x08000000);
- out_be32(utl_base + PEUTL_IPDBSZ, 0x10000000);
- out_be32(utl_base + PEUTL_RCIRQEN, 0x00f00000);
- out_be32(utl_base + PEUTL_PCTL, 0x80800066);
-
- iounmap(utl_base);
-
- /*
- * We map PCI Express configuration access into the 512MB regions
- * PCIE0: 0xc_4000_0000
- * PCIE1: 0xc_8000_0000
- * PCIE2: 0xc_c000_0000
- */
- switch (port) {
- case 0:
- mtdcr(DCRN_PEGPL_CFGBAH(PCIE0), 0x0000000c);
- mtdcr(DCRN_PEGPL_CFGBAL(PCIE0), 0x40000000);
- mtdcr(DCRN_PEGPL_CFGMSK(PCIE0), 0xe0000001); /* 512MB region, valid */
- break;
-
- case 1:
- mtdcr(DCRN_PEGPL_CFGBAH(PCIE1), 0x0000000c);
- mtdcr(DCRN_PEGPL_CFGBAL(PCIE1), 0x80000000);
- mtdcr(DCRN_PEGPL_CFGMSK(PCIE1), 0xe0000001); /* 512MB region, valid */
- break;
-
- case 2:
- mtdcr(DCRN_PEGPL_CFGBAH(PCIE2), 0x0000000c);
- mtdcr(DCRN_PEGPL_CFGBAL(PCIE2), 0xc0000000);
- mtdcr(DCRN_PEGPL_CFGMSK(PCIE2), 0xe0000001); /* 512MB region, valid */
- break;
- }
-
- /*
- * Check for VC0 active and assert RDY.
- */
- switch (port) {
- case 0:
- if (!(SDR_READ(PESDR0_RCSSTS) & (1 << 16)))
- printk(KERN_WARNING "PCIE0: VC0 not active\n");
- SDR_WRITE(PESDR0_RCSSET, SDR_READ(PESDR0_RCSSET) | 1 << 20);
- break;
- case 1:
- if (!(SDR_READ(PESDR1_RCSSTS) & (1 << 16)))
- printk(KERN_WARNING "PCIE0: VC0 not active\n");
- SDR_WRITE(PESDR1_RCSSET, SDR_READ(PESDR1_RCSSET) | 1 << 20);
- break;
- case 2:
- if (!(SDR_READ(PESDR2_RCSSTS) & (1 << 16)))
- printk(KERN_WARNING "PCIE0: VC0 not active\n");
- SDR_WRITE(PESDR2_RCSSET, SDR_READ(PESDR2_RCSSET) | 1 << 20);
- break;
- }
-
-#if 0
- /* Dump all config regs */
- for (i = 0x300; i <= 0x320; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
- for (i = 0x340; i <= 0x353; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
- for (i = 0x370; i <= 0x383; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
- for (i = 0x3a0; i <= 0x3a2; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
- for (i = 0x3c0; i <= 0x3c3; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
-#endif
-
- mdelay(100);
-
- return 0;
-}
-
-void ppc440spe_setup_pcie(struct pci_controller *hose, int port)
-{
- void __iomem *mbase;
-
- /*
- * Map 16MB, which is enough for 4 bits of bus #
- */
- hose->cfg_data = ioremap64(0xc40000000ull + port * 0x40000000,
- 1 << 24);
- hose->ops = &pcie_pci_ops;
-
- /*
- * Set bus numbers on our root port
- */
- mbase = ioremap64(0xc50000000ull + port * 0x40000000, 4096);
- out_8(mbase + PCI_PRIMARY_BUS, 0);
- out_8(mbase + PCI_SECONDARY_BUS, 0);
-
- /*
- * Set up outbound translation to hose->mem_space from PLB
- * addresses at an offset of 0xd_0000_0000. We set the low
- * bits of the mask to 11 to turn off splitting into 8
- * subregions and to enable the outbound translation.
- */
- out_le32(mbase + PECFG_POM0LAH, 0);
- out_le32(mbase + PECFG_POM0LAL, hose->mem_space.start);
-
- switch (port) {
- case 0:
- mtdcr(DCRN_PEGPL_OMR1BAH(PCIE0), 0x0000000d);
- mtdcr(DCRN_PEGPL_OMR1BAL(PCIE0), hose->mem_space.start);
- mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE0), 0x7fffffff);
- mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE0),
- ~(hose->mem_space.end - hose->mem_space.start) | 3);
- break;
- case 1:
- mtdcr(DCRN_PEGPL_OMR1BAH(PCIE1), 0x0000000d);
- mtdcr(DCRN_PEGPL_OMR1BAL(PCIE1), hose->mem_space.start);
- mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE1), 0x7fffffff);
- mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE1),
- ~(hose->mem_space.end - hose->mem_space.start) | 3);
-
- break;
- case 2:
- mtdcr(DCRN_PEGPL_OMR1BAH(PCIE2), 0x0000000d);
- mtdcr(DCRN_PEGPL_OMR1BAL(PCIE2), hose->mem_space.start);
- mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE2), 0x7fffffff);
- mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE2),
- ~(hose->mem_space.end - hose->mem_space.start) | 3);
- break;
- }
-
- /* Set up 16GB inbound memory window at 0 */
- out_le32(mbase + PCI_BASE_ADDRESS_0, 0);
- out_le32(mbase + PCI_BASE_ADDRESS_1, 0);
- out_le32(mbase + PECFG_BAR0HMPA, 0x7fffffc);
- out_le32(mbase + PECFG_BAR0LMPA, 0);
- out_le32(mbase + PECFG_PIM0LAL, 0);
- out_le32(mbase + PECFG_PIM0LAH, 0);
- out_le32(mbase + PECFG_PIMEN, 0x1);
-
- /* Enable I/O, Mem, and Busmaster cycles */
- out_le16(mbase + PCI_COMMAND,
- in_le16(mbase + PCI_COMMAND) |
- PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-
- iounmap(mbase);
-}
diff --git a/arch/ppc/syslib/ppc440spe_pcie.h b/arch/ppc/syslib/ppc440spe_pcie.h
deleted file mode 100644
index 55b765a..0000000
--- a/arch/ppc/syslib/ppc440spe_pcie.h
+++ /dev/null
@@ -1,149 +0,0 @@
-/*
- * Copyright (c) 2005 Cisco Systems. All rights reserved.
- * Roland Dreier <rolandd@cisco.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __PPC_SYSLIB_PPC440SPE_PCIE_H
-#define __PPC_SYSLIB_PPC440SPE_PCIE_H
-
-#define DCRN_SDR0_CFGADDR 0x00e
-#define DCRN_SDR0_CFGDATA 0x00f
-
-#define DCRN_PCIE0_BASE 0x100
-#define DCRN_PCIE1_BASE 0x120
-#define DCRN_PCIE2_BASE 0x140
-#define PCIE0 DCRN_PCIE0_BASE
-#define PCIE1 DCRN_PCIE1_BASE
-#define PCIE2 DCRN_PCIE2_BASE
-
-#define DCRN_PEGPL_CFGBAH(base) (base + 0x00)
-#define DCRN_PEGPL_CFGBAL(base) (base + 0x01)
-#define DCRN_PEGPL_CFGMSK(base) (base + 0x02)
-#define DCRN_PEGPL_MSGBAH(base) (base + 0x03)
-#define DCRN_PEGPL_MSGBAL(base) (base + 0x04)
-#define DCRN_PEGPL_MSGMSK(base) (base + 0x05)
-#define DCRN_PEGPL_OMR1BAH(base) (base + 0x06)
-#define DCRN_PEGPL_OMR1BAL(base) (base + 0x07)
-#define DCRN_PEGPL_OMR1MSKH(base) (base + 0x08)
-#define DCRN_PEGPL_OMR1MSKL(base) (base + 0x09)
-#define DCRN_PEGPL_REGBAH(base) (base + 0x12)
-#define DCRN_PEGPL_REGBAL(base) (base + 0x13)
-#define DCRN_PEGPL_REGMSK(base) (base + 0x14)
-#define DCRN_PEGPL_SPECIAL(base) (base + 0x15)
-
-/*
- * System DCRs (SDRs)
- */
-#define PESDR0_PLLLCT1 0x03a0
-#define PESDR0_PLLLCT2 0x03a1
-#define PESDR0_PLLLCT3 0x03a2
-
-#define PESDR0_UTLSET1 0x0300
-#define PESDR0_UTLSET2 0x0301
-#define PESDR0_DLPSET 0x0302
-#define PESDR0_LOOP 0x0303
-#define PESDR0_RCSSET 0x0304
-#define PESDR0_RCSSTS 0x0305
-#define PESDR0_HSSL0SET1 0x0306
-#define PESDR0_HSSL0SET2 0x0307
-#define PESDR0_HSSL0STS 0x0308
-#define PESDR0_HSSL1SET1 0x0309
-#define PESDR0_HSSL1SET2 0x030a
-#define PESDR0_HSSL1STS 0x030b
-#define PESDR0_HSSL2SET1 0x030c
-#define PESDR0_HSSL2SET2 0x030d
-#define PESDR0_HSSL2STS 0x030e
-#define PESDR0_HSSL3SET1 0x030f
-#define PESDR0_HSSL3SET2 0x0310
-#define PESDR0_HSSL3STS 0x0311
-#define PESDR0_HSSL4SET1 0x0312
-#define PESDR0_HSSL4SET2 0x0313
-#define PESDR0_HSSL4STS 0x0314
-#define PESDR0_HSSL5SET1 0x0315
-#define PESDR0_HSSL5SET2 0x0316
-#define PESDR0_HSSL5STS 0x0317
-#define PESDR0_HSSL6SET1 0x0318
-#define PESDR0_HSSL6SET2 0x0319
-#define PESDR0_HSSL6STS 0x031a
-#define PESDR0_HSSL7SET1 0x031b
-#define PESDR0_HSSL7SET2 0x031c
-#define PESDR0_HSSL7STS 0x031d
-#define PESDR0_HSSCTLSET 0x031e
-#define PESDR0_LANE_ABCD 0x031f
-#define PESDR0_LANE_EFGH 0x0320
-
-#define PESDR1_UTLSET1 0x0340
-#define PESDR1_UTLSET2 0x0341
-#define PESDR1_DLPSET 0x0342
-#define PESDR1_LOOP 0x0343
-#define PESDR1_RCSSET 0x0344
-#define PESDR1_RCSSTS 0x0345
-#define PESDR1_HSSL0SET1 0x0346
-#define PESDR1_HSSL0SET2 0x0347
-#define PESDR1_HSSL0STS 0x0348
-#define PESDR1_HSSL1SET1 0x0349
-#define PESDR1_HSSL1SET2 0x034a
-#define PESDR1_HSSL1STS 0x034b
-#define PESDR1_HSSL2SET1 0x034c
-#define PESDR1_HSSL2SET2 0x034d
-#define PESDR1_HSSL2STS 0x034e
-#define PESDR1_HSSL3SET1 0x034f
-#define PESDR1_HSSL3SET2 0x0350
-#define PESDR1_HSSL3STS 0x0351
-#define PESDR1_HSSCTLSET 0x0352
-#define PESDR1_LANE_ABCD 0x0353
-
-#define PESDR2_UTLSET1 0x0370
-#define PESDR2_UTLSET2 0x0371
-#define PESDR2_DLPSET 0x0372
-#define PESDR2_LOOP 0x0373
-#define PESDR2_RCSSET 0x0374
-#define PESDR2_RCSSTS 0x0375
-#define PESDR2_HSSL0SET1 0x0376
-#define PESDR2_HSSL0SET2 0x0377
-#define PESDR2_HSSL0STS 0x0378
-#define PESDR2_HSSL1SET1 0x0379
-#define PESDR2_HSSL1SET2 0x037a
-#define PESDR2_HSSL1STS 0x037b
-#define PESDR2_HSSL2SET1 0x037c
-#define PESDR2_HSSL2SET2 0x037d
-#define PESDR2_HSSL2STS 0x037e
-#define PESDR2_HSSL3SET1 0x037f
-#define PESDR2_HSSL3SET2 0x0380
-#define PESDR2_HSSL3STS 0x0381
-#define PESDR2_HSSCTLSET 0x0382
-#define PESDR2_LANE_ABCD 0x0383
-
-/*
- * UTL register offsets
- */
-#define PEUTL_PBBSZ 0x20
-#define PEUTL_OPDBSZ 0x68
-#define PEUTL_IPHBSZ 0x70
-#define PEUTL_IPDBSZ 0x78
-#define PEUTL_OUTTR 0x90
-#define PEUTL_INTR 0x98
-#define PEUTL_PCTL 0xa0
-#define PEUTL_RCIRQEN 0xb8
-
-/*
- * Config space register offsets
- */
-#define PECFG_BAR0LMPA 0x210
-#define PECFG_BAR0HMPA 0x214
-#define PECFG_PIMEN 0x33c
-#define PECFG_PIM0LAL 0x340
-#define PECFG_PIM0LAH 0x344
-#define PECFG_POM0LAL 0x380
-#define PECFG_POM0LAH 0x384
-
-int ppc440spe_init_pcie(void);
-int ppc440spe_init_pcie_rootport(int port);
-void ppc440spe_setup_pcie(struct pci_controller *hose, int port);
-
-#endif /* __PPC_SYSLIB_PPC440SPE_PCIE_H */
diff --git a/arch/ppc/syslib/ppc4xx_dma.c b/arch/ppc/syslib/ppc4xx_dma.c
deleted file mode 100644
index bd30186..0000000
--- a/arch/ppc/syslib/ppc4xx_dma.c
+++ /dev/null
@@ -1,710 +0,0 @@
-/*
- * IBM PPC4xx DMA engine core library
- *
- * Copyright 2000-2004 MontaVista Software Inc.
- *
- * Cleaned up and converted to new DCR access
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * Original code by Armin Kuster <akuster@mvista.com>
- * and Pete Popov <ppopov@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/miscdevice.h>
-#include <linux/init.h>
-#include <linux/module.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/dma.h>
-#include <asm/ppc4xx_dma.h>
-
-ppc_dma_ch_t dma_channels[MAX_PPC4xx_DMA_CHANNELS];
-
-int
-ppc4xx_get_dma_status(void)
-{
- return (mfdcr(DCRN_DMASR));
-}
-
-void
-ppc4xx_set_src_addr(int dmanr, phys_addr_t src_addr)
-{
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("set_src_addr: bad channel: %d\n", dmanr);
- return;
- }
-
-#ifdef PPC4xx_DMA_64BIT
- mtdcr(DCRN_DMASAH0 + dmanr*2, (u32)(src_addr >> 32));
-#else
- mtdcr(DCRN_DMASA0 + dmanr*2, (u32)src_addr);
-#endif
-}
-
-void
-ppc4xx_set_dst_addr(int dmanr, phys_addr_t dst_addr)
-{
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("set_dst_addr: bad channel: %d\n", dmanr);
- return;
- }
-
-#ifdef PPC4xx_DMA_64BIT
- mtdcr(DCRN_DMADAH0 + dmanr*2, (u32)(dst_addr >> 32));
-#else
- mtdcr(DCRN_DMADA0 + dmanr*2, (u32)dst_addr);
-#endif
-}
-
-void
-ppc4xx_enable_dma(unsigned int dmanr)
-{
- unsigned int control;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
- unsigned int status_bits[] = { DMA_CS0 | DMA_TS0 | DMA_CH0_ERR,
- DMA_CS1 | DMA_TS1 | DMA_CH1_ERR,
- DMA_CS2 | DMA_TS2 | DMA_CH2_ERR,
- DMA_CS3 | DMA_TS3 | DMA_CH3_ERR};
-
- if (p_dma_ch->in_use) {
- printk("enable_dma: channel %d in use\n", dmanr);
- return;
- }
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("enable_dma: bad channel: %d\n", dmanr);
- return;
- }
-
- if (p_dma_ch->mode == DMA_MODE_READ) {
- /* peripheral to memory */
- ppc4xx_set_src_addr(dmanr, 0);
- ppc4xx_set_dst_addr(dmanr, p_dma_ch->addr);
- } else if (p_dma_ch->mode == DMA_MODE_WRITE) {
- /* memory to peripheral */
- ppc4xx_set_src_addr(dmanr, p_dma_ch->addr);
- ppc4xx_set_dst_addr(dmanr, 0);
- }
-
- /* for other xfer modes, the addresses are already set */
- control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8));
-
- control &= ~(DMA_TM_MASK | DMA_TD); /* clear all mode bits */
- if (p_dma_ch->mode == DMA_MODE_MM) {
- /* software initiated memory to memory */
- control |= DMA_ETD_OUTPUT | DMA_TCE_ENABLE;
- }
-
- mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control);
-
- /*
- * Clear the CS, TS, RI bits for the channel from DMASR. This
- * has been observed to happen correctly only after the mode and
- * ETD/DCE bits in DMACRx are set above. Must do this before
- * enabling the channel.
- */
-
- mtdcr(DCRN_DMASR, status_bits[dmanr]);
-
- /*
- * For device-paced transfers, Terminal Count Enable apparently
- * must be on, and this must be turned on after the mode, etc.
- * bits are cleared above (at least on Redwood-6).
- */
-
- if ((p_dma_ch->mode == DMA_MODE_MM_DEVATDST) ||
- (p_dma_ch->mode == DMA_MODE_MM_DEVATSRC))
- control |= DMA_TCE_ENABLE;
-
- /*
- * Now enable the channel.
- */
-
- control |= (p_dma_ch->mode | DMA_CE_ENABLE);
-
- mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control);
-
- p_dma_ch->in_use = 1;
-}
-
-void
-ppc4xx_disable_dma(unsigned int dmanr)
-{
- unsigned int control;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- if (!p_dma_ch->in_use) {
- printk("disable_dma: channel %d not in use\n", dmanr);
- return;
- }
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("disable_dma: bad channel: %d\n", dmanr);
- return;
- }
-
- control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8));
- control &= ~DMA_CE_ENABLE;
- mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control);
-
- p_dma_ch->in_use = 0;
-}
-
-/*
- * Sets the dma mode for single DMA transfers only.
- * For scatter/gather transfers, the mode is passed to the
- * alloc_dma_handle() function as one of the parameters.
- *
- * The mode is simply saved and used later. This allows
- * the driver to call set_dma_mode() and set_dma_addr() in
- * any order.
- *
- * Valid mode values are:
- *
- * DMA_MODE_READ peripheral to memory
- * DMA_MODE_WRITE memory to peripheral
- * DMA_MODE_MM memory to memory
- * DMA_MODE_MM_DEVATSRC device-paced memory to memory, device at src
- * DMA_MODE_MM_DEVATDST device-paced memory to memory, device at dst
- */
-int
-ppc4xx_set_dma_mode(unsigned int dmanr, unsigned int mode)
-{
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("set_dma_mode: bad channel 0x%x\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- p_dma_ch->mode = mode;
-
- return DMA_STATUS_GOOD;
-}
-
-/*
- * Sets the DMA Count register. Note that 'count' is in bytes.
- * However, the DMA Count register counts the number of "transfers",
- * where each transfer is equal to the bus width. Thus, count
- * MUST be a multiple of the bus width.
- */
-void
-ppc4xx_set_dma_count(unsigned int dmanr, unsigned int count)
-{
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
-#ifdef DEBUG_4xxDMA
- {
- int error = 0;
- switch (p_dma_ch->pwidth) {
- case PW_8:
- break;
- case PW_16:
- if (count & 0x1)
- error = 1;
- break;
- case PW_32:
- if (count & 0x3)
- error = 1;
- break;
- case PW_64:
- if (count & 0x7)
- error = 1;
- break;
- default:
- printk("set_dma_count: invalid bus width: 0x%x\n",
- p_dma_ch->pwidth);
- return;
- }
- if (error)
- printk
- ("Warning: set_dma_count count 0x%x bus width %d\n",
- count, p_dma_ch->pwidth);
- }
-#endif
-
- count = count >> p_dma_ch->shift;
-
- mtdcr(DCRN_DMACT0 + (dmanr * 0x8), count);
-}
-
-/*
- * Returns the number of bytes left to be transferred.
- * After a DMA transfer, this should return zero.
- * Reading this while a DMA transfer is still in progress will return
- * unpredictable results.
- */
-int
-ppc4xx_get_dma_residue(unsigned int dmanr)
-{
- unsigned int count;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_get_dma_residue: bad channel 0x%x\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- count = mfdcr(DCRN_DMACT0 + (dmanr * 0x8));
-
- return (count << p_dma_ch->shift);
-}
-
-/*
- * Sets the DMA address for a memory to peripheral or peripheral
- * to memory transfer. The address is just saved in the channel
- * structure for now and used later in enable_dma().
- */
-void
-ppc4xx_set_dma_addr(unsigned int dmanr, phys_addr_t addr)
-{
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_set_dma_addr: bad channel: %d\n", dmanr);
- return;
- }
-
-#ifdef DEBUG_4xxDMA
- {
- int error = 0;
- switch (p_dma_ch->pwidth) {
- case PW_8:
- break;
- case PW_16:
- if ((unsigned) addr & 0x1)
- error = 1;
- break;
- case PW_32:
- if ((unsigned) addr & 0x3)
- error = 1;
- break;
- case PW_64:
- if ((unsigned) addr & 0x7)
- error = 1;
- break;
- default:
- printk("ppc4xx_set_dma_addr: invalid bus width: 0x%x\n",
- p_dma_ch->pwidth);
- return;
- }
- if (error)
- printk("Warning: ppc4xx_set_dma_addr addr 0x%x bus width %d\n",
- addr, p_dma_ch->pwidth);
- }
-#endif
-
- /* save dma address and program it later after we know the xfer mode */
- p_dma_ch->addr = addr;
-}
-
-/*
- * Sets both DMA addresses for a memory to memory transfer.
- * For memory to peripheral or peripheral to memory transfers
- * the function set_dma_addr() should be used instead.
- */
-void
-ppc4xx_set_dma_addr2(unsigned int dmanr, phys_addr_t src_dma_addr,
- phys_addr_t dst_dma_addr)
-{
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_set_dma_addr2: bad channel: %d\n", dmanr);
- return;
- }
-
-#ifdef DEBUG_4xxDMA
- {
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
- int error = 0;
- switch (p_dma_ch->pwidth) {
- case PW_8:
- break;
- case PW_16:
- if (((unsigned) src_dma_addr & 0x1) ||
- ((unsigned) dst_dma_addr & 0x1)
- )
- error = 1;
- break;
- case PW_32:
- if (((unsigned) src_dma_addr & 0x3) ||
- ((unsigned) dst_dma_addr & 0x3)
- )
- error = 1;
- break;
- case PW_64:
- if (((unsigned) src_dma_addr & 0x7) ||
- ((unsigned) dst_dma_addr & 0x7)
- )
- error = 1;
- break;
- default:
- printk("ppc4xx_set_dma_addr2: invalid bus width: 0x%x\n",
- p_dma_ch->pwidth);
- return;
- }
- if (error)
- printk
- ("Warning: ppc4xx_set_dma_addr2 src 0x%x dst 0x%x bus width %d\n",
- src_dma_addr, dst_dma_addr, p_dma_ch->pwidth);
- }
-#endif
-
- ppc4xx_set_src_addr(dmanr, src_dma_addr);
- ppc4xx_set_dst_addr(dmanr, dst_dma_addr);
-}
-
-/*
- * Enables the channel interrupt.
- *
- * If performing a scatter/gatter transfer, this function
- * MUST be called before calling alloc_dma_handle() and building
- * the sgl list. Otherwise, interrupts will not be enabled, if
- * they were previously disabled.
- */
-int
-ppc4xx_enable_dma_interrupt(unsigned int dmanr)
-{
- unsigned int control;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_enable_dma_interrupt: bad channel: %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- p_dma_ch->int_enable = 1;
-
- control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8));
- control |= DMA_CIE_ENABLE; /* Channel Interrupt Enable */
- mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control);
-
- return DMA_STATUS_GOOD;
-}
-
-/*
- * Disables the channel interrupt.
- *
- * If performing a scatter/gatter transfer, this function
- * MUST be called before calling alloc_dma_handle() and building
- * the sgl list. Otherwise, interrupts will not be disabled, if
- * they were previously enabled.
- */
-int
-ppc4xx_disable_dma_interrupt(unsigned int dmanr)
-{
- unsigned int control;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_disable_dma_interrupt: bad channel: %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- p_dma_ch->int_enable = 0;
-
- control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8));
- control &= ~DMA_CIE_ENABLE; /* Channel Interrupt Enable */
- mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control);
-
- return DMA_STATUS_GOOD;
-}
-
-/*
- * Configures a DMA channel, including the peripheral bus width, if a
- * peripheral is attached to the channel, the polarity of the DMAReq and
- * DMAAck signals, etc. This information should really be setup by the boot
- * code, since most likely the configuration won't change dynamically.
- * If the kernel has to call this function, it's recommended that it's
- * called from platform specific init code. The driver should not need to
- * call this function.
- */
-int
-ppc4xx_init_dma_channel(unsigned int dmanr, ppc_dma_ch_t * p_init)
-{
- unsigned int polarity;
- uint32_t control = 0;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
-
- DMA_MODE_READ = (unsigned long) DMA_TD; /* Peripheral to Memory */
- DMA_MODE_WRITE = 0; /* Memory to Peripheral */
-
- if (!p_init) {
- printk("ppc4xx_init_dma_channel: NULL p_init\n");
- return DMA_STATUS_NULL_POINTER;
- }
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_init_dma_channel: bad channel %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
-#if DCRN_POL > 0
- polarity = mfdcr(DCRN_POL);
-#else
- polarity = 0;
-#endif
-
- /* Setup the control register based on the values passed to
- * us in p_init. Then, over-write the control register with this
- * new value.
- */
- control |= SET_DMA_CONTROL;
-
- /* clear all polarity signals and then "or" in new signal levels */
- polarity &= ~GET_DMA_POLARITY(dmanr);
- polarity |= p_init->polarity;
-#if DCRN_POL > 0
- mtdcr(DCRN_POL, polarity);
-#endif
- mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control);
-
- /* save these values in our dma channel structure */
- memcpy(p_dma_ch, p_init, sizeof (ppc_dma_ch_t));
-
- /*
- * The peripheral width values written in the control register are:
- * PW_8 0
- * PW_16 1
- * PW_32 2
- * PW_64 3
- *
- * Since the DMA count register takes the number of "transfers",
- * we need to divide the count sent to us in certain
- * functions by the appropriate number. It so happens that our
- * right shift value is equal to the peripheral width value.
- */
- p_dma_ch->shift = p_init->pwidth;
-
- /*
- * Save the control word for easy access.
- */
- p_dma_ch->control = control;
-
- mtdcr(DCRN_DMASR, 0xffffffff); /* clear status register */
- return DMA_STATUS_GOOD;
-}
-
-/*
- * This function returns the channel configuration.
- */
-int
-ppc4xx_get_channel_config(unsigned int dmanr, ppc_dma_ch_t * p_dma_ch)
-{
- unsigned int polarity;
- unsigned int control;
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_get_channel_config: bad channel %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- memcpy(p_dma_ch, &dma_channels[dmanr], sizeof (ppc_dma_ch_t));
-
-#if DCRN_POL > 0
- polarity = mfdcr(DCRN_POL);
-#else
- polarity = 0;
-#endif
-
- p_dma_ch->polarity = polarity & GET_DMA_POLARITY(dmanr);
- control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8));
-
- p_dma_ch->cp = GET_DMA_PRIORITY(control);
- p_dma_ch->pwidth = GET_DMA_PW(control);
- p_dma_ch->psc = GET_DMA_PSC(control);
- p_dma_ch->pwc = GET_DMA_PWC(control);
- p_dma_ch->phc = GET_DMA_PHC(control);
- p_dma_ch->ce = GET_DMA_CE_ENABLE(control);
- p_dma_ch->int_enable = GET_DMA_CIE_ENABLE(control);
- p_dma_ch->shift = GET_DMA_PW(control);
-
-#ifdef CONFIG_PPC4xx_EDMA
- p_dma_ch->pf = GET_DMA_PREFETCH(control);
-#else
- p_dma_ch->ch_enable = GET_DMA_CH(control);
- p_dma_ch->ece_enable = GET_DMA_ECE(control);
- p_dma_ch->tcd_disable = GET_DMA_TCD(control);
-#endif
- return DMA_STATUS_GOOD;
-}
-
-/*
- * Sets the priority for the DMA channel dmanr.
- * Since this is setup by the hardware init function, this function
- * can be used to dynamically change the priority of a channel.
- *
- * Acceptable priorities:
- *
- * PRIORITY_LOW
- * PRIORITY_MID_LOW
- * PRIORITY_MID_HIGH
- * PRIORITY_HIGH
- *
- */
-int
-ppc4xx_set_channel_priority(unsigned int dmanr, unsigned int priority)
-{
- unsigned int control;
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_set_channel_priority: bad channel %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- if ((priority != PRIORITY_LOW) &&
- (priority != PRIORITY_MID_LOW) &&
- (priority != PRIORITY_MID_HIGH) && (priority != PRIORITY_HIGH)) {
- printk("ppc4xx_set_channel_priority: bad priority: 0x%x\n", priority);
- }
-
- control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8));
- control |= SET_DMA_PRIORITY(priority);
- mtdcr(DCRN_DMACR0 + (dmanr * 0x8), control);
-
- return DMA_STATUS_GOOD;
-}
-
-/*
- * Returns the width of the peripheral attached to this channel. This assumes
- * that someone who knows the hardware configuration, boot code or some other
- * init code, already set the width.
- *
- * The return value is one of:
- * PW_8
- * PW_16
- * PW_32
- * PW_64
- *
- * The function returns 0 on error.
- */
-unsigned int
-ppc4xx_get_peripheral_width(unsigned int dmanr)
-{
- unsigned int control;
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_get_peripheral_width: bad channel %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8));
-
- return (GET_DMA_PW(control));
-}
-
-/*
- * Clears the channel status bits
- */
-int
-ppc4xx_clr_dma_status(unsigned int dmanr)
-{
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk(KERN_ERR "ppc4xx_clr_dma_status: bad channel: %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
- mtdcr(DCRN_DMASR, ((u32)DMA_CH0_ERR | (u32)DMA_CS0 | (u32)DMA_TS0) >> dmanr);
- return DMA_STATUS_GOOD;
-}
-
-#ifdef CONFIG_PPC4xx_EDMA
-/*
- * Enables the burst on the channel (BTEN bit in the control/count register)
- * Note:
- * For scatter/gather dma, this function MUST be called before the
- * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the
- * sgl list and used as each sgl element is added.
- */
-int
-ppc4xx_enable_burst(unsigned int dmanr)
-{
- unsigned int ctc;
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk(KERN_ERR "ppc4xx_enable_burst: bad channel: %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
- ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) | DMA_CTC_BTEN;
- mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc);
- return DMA_STATUS_GOOD;
-}
-/*
- * Disables the burst on the channel (BTEN bit in the control/count register)
- * Note:
- * For scatter/gather dma, this function MUST be called before the
- * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the
- * sgl list and used as each sgl element is added.
- */
-int
-ppc4xx_disable_burst(unsigned int dmanr)
-{
- unsigned int ctc;
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk(KERN_ERR "ppc4xx_disable_burst: bad channel: %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
- ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) &~ DMA_CTC_BTEN;
- mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc);
- return DMA_STATUS_GOOD;
-}
-/*
- * Sets the burst size (number of peripheral widths) for the channel
- * (BSIZ bits in the control/count register))
- * must be one of:
- * DMA_CTC_BSIZ_2
- * DMA_CTC_BSIZ_4
- * DMA_CTC_BSIZ_8
- * DMA_CTC_BSIZ_16
- * Note:
- * For scatter/gather dma, this function MUST be called before the
- * ppc4xx_alloc_dma_handle() func as the chan count register is copied into the
- * sgl list and used as each sgl element is added.
- */
-int
-ppc4xx_set_burst_size(unsigned int dmanr, unsigned int bsize)
-{
- unsigned int ctc;
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk(KERN_ERR "ppc4xx_set_burst_size: bad channel: %d\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
- ctc = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)) &~ DMA_CTC_BSIZ_MSK;
- ctc |= (bsize & DMA_CTC_BSIZ_MSK);
- mtdcr(DCRN_DMACT0 + (dmanr * 0x8), ctc);
- return DMA_STATUS_GOOD;
-}
-
-EXPORT_SYMBOL(ppc4xx_enable_burst);
-EXPORT_SYMBOL(ppc4xx_disable_burst);
-EXPORT_SYMBOL(ppc4xx_set_burst_size);
-#endif /* CONFIG_PPC4xx_EDMA */
-
-EXPORT_SYMBOL(ppc4xx_init_dma_channel);
-EXPORT_SYMBOL(ppc4xx_get_channel_config);
-EXPORT_SYMBOL(ppc4xx_set_channel_priority);
-EXPORT_SYMBOL(ppc4xx_get_peripheral_width);
-EXPORT_SYMBOL(dma_channels);
-EXPORT_SYMBOL(ppc4xx_set_src_addr);
-EXPORT_SYMBOL(ppc4xx_set_dst_addr);
-EXPORT_SYMBOL(ppc4xx_set_dma_addr);
-EXPORT_SYMBOL(ppc4xx_set_dma_addr2);
-EXPORT_SYMBOL(ppc4xx_enable_dma);
-EXPORT_SYMBOL(ppc4xx_disable_dma);
-EXPORT_SYMBOL(ppc4xx_set_dma_mode);
-EXPORT_SYMBOL(ppc4xx_set_dma_count);
-EXPORT_SYMBOL(ppc4xx_get_dma_residue);
-EXPORT_SYMBOL(ppc4xx_enable_dma_interrupt);
-EXPORT_SYMBOL(ppc4xx_disable_dma_interrupt);
-EXPORT_SYMBOL(ppc4xx_get_dma_status);
-EXPORT_SYMBOL(ppc4xx_clr_dma_status);
-
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c
deleted file mode 100644
index ee0da4b..0000000
--- a/arch/ppc/syslib/ppc4xx_pic.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/*
- * Interrupt controller driver for PowerPC 4xx-based processors.
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2004, 2005 Zultys Technologies
- *
- * Based on original code by
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- * Armin Custer <akuster@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
-*/
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/stddef.h>
-
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/irq.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/machdep.h>
-
-/* See comment in include/arch-ppc/ppc4xx_pic.h
- * for more info about these two variables
- */
-extern struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[NR_UICS]
- __attribute__ ((weak));
-extern unsigned char ppc4xx_uic_ext_irq_cfg[] __attribute__ ((weak));
-
-#define IRQ_MASK_UIC0(irq) (1 << (31 - (irq)))
-#define IRQ_MASK_UICx(irq) (1 << (31 - ((irq) & 0x1f)))
-#define IRQ_MASK_UIC1(irq) IRQ_MASK_UICx(irq)
-#define IRQ_MASK_UIC2(irq) IRQ_MASK_UICx(irq)
-#define IRQ_MASK_UIC3(irq) IRQ_MASK_UICx(irq)
-
-#define UIC_HANDLERS(n) \
-static void ppc4xx_uic##n##_enable(unsigned int irq) \
-{ \
- u32 mask = IRQ_MASK_UIC##n(irq); \
- if (irq_desc[irq].status & IRQ_LEVEL) \
- mtdcr(DCRN_UIC_SR(UIC##n), mask); \
- ppc_cached_irq_mask[n] |= mask; \
- mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \
-} \
- \
-static void ppc4xx_uic##n##_disable(unsigned int irq) \
-{ \
- ppc_cached_irq_mask[n] &= ~IRQ_MASK_UIC##n(irq); \
- mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \
- ACK_UIC##n##_PARENT \
-} \
- \
-static void ppc4xx_uic##n##_ack(unsigned int irq) \
-{ \
- u32 mask = IRQ_MASK_UIC##n(irq); \
- ppc_cached_irq_mask[n] &= ~mask; \
- mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \
- mtdcr(DCRN_UIC_SR(UIC##n), mask); \
- ACK_UIC##n##_PARENT \
-} \
- \
-static void ppc4xx_uic##n##_end(unsigned int irq) \
-{ \
- unsigned int status = irq_desc[irq].status; \
- u32 mask = IRQ_MASK_UIC##n(irq); \
- if (status & IRQ_LEVEL) { \
- mtdcr(DCRN_UIC_SR(UIC##n), mask); \
- ACK_UIC##n##_PARENT \
- } \
- if (!(status & (IRQ_DISABLED | IRQ_INPROGRESS))) { \
- ppc_cached_irq_mask[n] |= mask; \
- mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \
- } \
-}
-
-#define DECLARE_UIC(n) \
-{ \
- .typename = "UIC"#n, \
- .enable = ppc4xx_uic##n##_enable, \
- .disable = ppc4xx_uic##n##_disable, \
- .ack = ppc4xx_uic##n##_ack, \
- .end = ppc4xx_uic##n##_end, \
-} \
-
-#if NR_UICS == 4
-#define ACK_UIC0_PARENT
-#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC);
-#define ACK_UIC2_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC2NC);
-#define ACK_UIC3_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC3NC);
-UIC_HANDLERS(0);
-UIC_HANDLERS(1);
-UIC_HANDLERS(2);
-UIC_HANDLERS(3);
-
-static int ppc4xx_pic_get_irq(void)
-{
- u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0));
- if (uic0 & UIC0_UIC1NC)
- return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1)));
- else if (uic0 & UIC0_UIC2NC)
- return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2)));
- else if (uic0 & UIC0_UIC3NC)
- return 128 - ffs(mfdcr(DCRN_UIC_MSR(UIC3)));
- else
- return uic0 ? 32 - ffs(uic0) : -1;
-}
-
-static void __init ppc4xx_pic_impl_init(void)
-{
- /* Enable cascade interrupts in UIC0 */
- ppc_cached_irq_mask[0] |= UIC0_UIC1NC | UIC0_UIC2NC | UIC0_UIC3NC;
- mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC | UIC0_UIC2NC | UIC0_UIC3NC);
- mtdcr(DCRN_UIC_ER(UIC0), ppc_cached_irq_mask[0]);
-}
-
-#elif NR_UICS == 3
-#define ACK_UIC0_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC0NC);
-#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC1NC);
-#define ACK_UIC2_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC2NC);
-UIC_HANDLERS(0);
-UIC_HANDLERS(1);
-UIC_HANDLERS(2);
-
-static int ppc4xx_pic_get_irq(void)
-{
- u32 uicb = mfdcr(DCRN_UIC_MSR(UICB));
- if (uicb & UICB_UIC0NC)
- return 32 - ffs(mfdcr(DCRN_UIC_MSR(UIC0)));
- else if (uicb & UICB_UIC1NC)
- return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1)));
- else if (uicb & UICB_UIC2NC)
- return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2)));
- else
- return -1;
-}
-
-static void __init ppc4xx_pic_impl_init(void)
-{
-#if defined(CONFIG_440GX)
- /* Disable 440GP compatibility mode if it was enabled in firmware */
- SDR_WRITE(DCRN_SDR_MFR, SDR_READ(DCRN_SDR_MFR) & ~DCRN_SDR_MFR_PCM);
-#endif
- /* Configure Base UIC */
- mtdcr(DCRN_UIC_CR(UICB), 0);
- mtdcr(DCRN_UIC_TR(UICB), 0);
- mtdcr(DCRN_UIC_PR(UICB), 0xffffffff);
- mtdcr(DCRN_UIC_SR(UICB), 0xffffffff);
- mtdcr(DCRN_UIC_ER(UICB), UICB_UIC0NC | UICB_UIC1NC | UICB_UIC2NC);
-}
-
-#elif NR_UICS == 2
-#define ACK_UIC0_PARENT
-#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC);
-UIC_HANDLERS(0);
-UIC_HANDLERS(1);
-
-static int ppc4xx_pic_get_irq(void)
-{
- u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0));
- if (uic0 & UIC0_UIC1NC)
- return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1)));
- else
- return uic0 ? 32 - ffs(uic0) : -1;
-}
-
-static void __init ppc4xx_pic_impl_init(void)
-{
- /* Enable cascade interrupt in UIC0 */
- ppc_cached_irq_mask[0] |= UIC0_UIC1NC;
- mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC);
- mtdcr(DCRN_UIC_ER(UIC0), ppc_cached_irq_mask[0]);
-}
-
-#elif NR_UICS == 1
-#define ACK_UIC0_PARENT
-UIC_HANDLERS(0);
-
-static int ppc4xx_pic_get_irq(void)
-{
- u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0));
- return uic0 ? 32 - ffs(uic0) : -1;
-}
-
-static inline void ppc4xx_pic_impl_init(void)
-{
-}
-#endif
-
-static struct ppc4xx_uic_impl {
- struct hw_interrupt_type decl;
- int base; /* Base DCR number */
-} __uic[] = {
- { .decl = DECLARE_UIC(0), .base = UIC0 },
-#if NR_UICS > 1
- { .decl = DECLARE_UIC(1), .base = UIC1 },
-#if NR_UICS > 2
- { .decl = DECLARE_UIC(2), .base = UIC2 },
-#if NR_UICS > 3
- { .decl = DECLARE_UIC(3), .base = UIC3 },
-#endif
-#endif
-#endif
-};
-
-static inline int is_level_sensitive(int irq)
-{
- u32 tr = mfdcr(DCRN_UIC_TR(__uic[irq >> 5].base));
- return (tr & IRQ_MASK_UICx(irq)) == 0;
-}
-
-void __init ppc4xx_pic_init(void)
-{
- int i;
- unsigned char *eirqs = ppc4xx_uic_ext_irq_cfg;
-
- for (i = 0; i < NR_UICS; ++i) {
- int base = __uic[i].base;
-
- /* Disable everything by default */
- ppc_cached_irq_mask[i] = 0;
- mtdcr(DCRN_UIC_ER(base), 0);
-
- /* We don't use critical interrupts */
- mtdcr(DCRN_UIC_CR(base), 0);
-
- /* Configure polarity and triggering */
- if (ppc4xx_core_uic_cfg) {
- struct ppc4xx_uic_settings *p = ppc4xx_core_uic_cfg + i;
- u32 mask = p->ext_irq_mask;
- u32 pr = mfdcr(DCRN_UIC_PR(base)) & mask;
- u32 tr = mfdcr(DCRN_UIC_TR(base)) & mask;
-
- /* "Fixed" interrupts (on-chip devices) */
- pr |= p->polarity & ~mask;
- tr |= p->triggering & ~mask;
-
- /* Merge external IRQs settings if board port
- * provided them
- */
- if (eirqs && mask) {
- pr &= ~mask;
- tr &= ~mask;
- while (mask) {
- /* Extract current external IRQ mask */
- u32 eirq_mask = 1 << __ilog2(mask);
-
- if (!(*eirqs & IRQ_SENSE_LEVEL))
- tr |= eirq_mask;
-
- if (*eirqs & IRQ_POLARITY_POSITIVE)
- pr |= eirq_mask;
-
- mask &= ~eirq_mask;
- ++eirqs;
- }
- }
- mtdcr(DCRN_UIC_PR(base), pr);
- mtdcr(DCRN_UIC_TR(base), tr);
- }
-
- /* ACK any pending interrupts to prevent false
- * triggering after first enable
- */
- mtdcr(DCRN_UIC_SR(base), 0xffffffff);
- }
-
- /* Perform optional implementation specific setup
- * (e.g. enable cascade interrupts for multi-UIC configurations)
- */
- ppc4xx_pic_impl_init();
-
- /* Attach low-level handlers */
- for (i = 0; i < (NR_UICS << 5); ++i) {
- irq_desc[i].chip = &__uic[i >> 5].decl;
- if (is_level_sensitive(i))
- irq_desc[i].status |= IRQ_LEVEL;
- }
-
- ppc_md.get_irq = ppc4xx_pic_get_irq;
-}
diff --git a/arch/ppc/syslib/ppc4xx_setup.c b/arch/ppc/syslib/ppc4xx_setup.c
deleted file mode 100644
index 353d746..0000000
--- a/arch/ppc/syslib/ppc4xx_setup.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- *
- * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
- *
- * Copyright 2000-2001 MontaVista Software Inc.
- * Completed implementation.
- * Author: MontaVista Software, Inc. <source@mvista.com>
- * Frank Rowand <frank_rowand@mvista.com>
- * Debbie Chu <debbie_chu@mvista.com>
- * Further modifications by Armin Kuster
- *
- * Module name: ppc4xx_setup.c
- *
- */
-
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/threads.h>
-#include <linux/spinlock.h>
-#include <linux/reboot.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/initrd.h>
-#include <linux/pci.h>
-#include <linux/rtc.h>
-#include <linux/console.h>
-#include <linux/serial_reg.h>
-#include <linux/seq_file.h>
-
-#include <asm/system.h>
-#include <asm/processor.h>
-#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/kgdb.h>
-#include <asm/ibm4xx.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-#include <asm/ppc4xx_pic.h>
-#include <asm/pci-bridge.h>
-#include <asm/bootinfo.h>
-
-#include <syslib/gen550.h>
-
-/* Function Prototypes */
-extern void abort(void);
-extern void ppc4xx_find_bridges(void);
-
-/* Global Variables */
-bd_t __res;
-
-void __init
-ppc4xx_setup_arch(void)
-{
-#if !defined(CONFIG_BDI_SWITCH)
- /*
- * The Abatron BDI JTAG debugger does not tolerate others
- * mucking with the debug registers.
- */
- mtspr(SPRN_DBCR0, (DBCR0_IDM));
- mtspr(SPRN_DBSR, 0xffffffff);
-#endif
-
- /* Setup PCI host bridges */
-#ifdef CONFIG_PCI
- ppc4xx_find_bridges();
-#endif
-}
-
-/*
- * This routine pretty-prints the platform's internal CPU clock
- * frequencies into the buffer for usage in /proc/cpuinfo.
- */
-
-static int
-ppc4xx_show_percpuinfo(struct seq_file *m, int i)
-{
- seq_printf(m, "clock\t\t: %ldMHz\n", (long)__res.bi_intfreq / 1000000);
-
- return 0;
-}
-
-/*
- * This routine pretty-prints the platform's internal bus clock
- * frequencies into the buffer for usage in /proc/cpuinfo.
- */
-static int
-ppc4xx_show_cpuinfo(struct seq_file *m)
-{
- bd_t *bip = &__res;
-
- seq_printf(m, "machine\t\t: %s\n", PPC4xx_MACHINE_NAME);
- seq_printf(m, "plb bus clock\t: %ldMHz\n",
- (long) bip->bi_busfreq / 1000000);
-#ifdef CONFIG_PCI
- seq_printf(m, "pci bus clock\t: %dMHz\n",
- bip->bi_pci_busfreq / 1000000);
-#endif
-
- return 0;
-}
-
-/*
- * Return the virtual address representing the top of physical RAM.
- */
-static unsigned long __init
-ppc4xx_find_end_of_memory(void)
-{
- return ((unsigned long) __res.bi_memsize);
-}
-
-void __init
-ppc4xx_map_io(void)
-{
- io_block_mapping(PPC4xx_ONB_IO_VADDR,
- PPC4xx_ONB_IO_PADDR, PPC4xx_ONB_IO_SIZE, _PAGE_IO);
-#ifdef CONFIG_PCI
- io_block_mapping(PPC4xx_PCI_IO_VADDR,
- PPC4xx_PCI_IO_PADDR, PPC4xx_PCI_IO_SIZE, _PAGE_IO);
- io_block_mapping(PPC4xx_PCI_CFG_VADDR,
- PPC4xx_PCI_CFG_PADDR, PPC4xx_PCI_CFG_SIZE, _PAGE_IO);
- io_block_mapping(PPC4xx_PCI_LCFG_VADDR,
- PPC4xx_PCI_LCFG_PADDR, PPC4xx_PCI_LCFG_SIZE, _PAGE_IO);
-#endif
-}
-
-void __init
-ppc4xx_init_IRQ(void)
-{
- ppc4xx_pic_init();
-}
-
-static void
-ppc4xx_restart(char *cmd)
-{
- printk("%s\n", cmd);
- abort();
-}
-
-static void
-ppc4xx_power_off(void)
-{
- printk("System Halted\n");
- local_irq_disable();
- while (1) ;
-}
-
-static void
-ppc4xx_halt(void)
-{
- printk("System Halted\n");
- local_irq_disable();
- while (1) ;
-}
-
-/*
- * This routine retrieves the internal processor frequency from the board
- * information structure, sets up the kernel timer decrementer based on
- * that value, enables the 4xx programmable interval timer (PIT) and sets
- * it up for auto-reload.
- */
-static void __init
-ppc4xx_calibrate_decr(void)
-{
- unsigned int freq;
- bd_t *bip = &__res;
-
-#if defined(CONFIG_WALNUT) || defined(CONFIG_SYCAMORE)
- /* Walnut boot rom sets DCR CHCR1 (aka CPC0_CR1) bit CETE to 1 */
- mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE);
-#endif
- freq = bip->bi_tbfreq;
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-
- /* Set the time base to zero.
- ** At 200 Mhz, time base will rollover in ~2925 years.
- */
-
- mtspr(SPRN_TBWL, 0);
- mtspr(SPRN_TBWU, 0);
-
- /* Clear any pending timer interrupts */
-
- mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS);
- mtspr(SPRN_TCR, TCR_PIE | TCR_ARE);
-
- /* Set the PIT reload value and just let it run. */
- mtspr(SPRN_PIT, tb_ticks_per_jiffy);
-}
-
-TODC_ALLOC();
-
-/*
- * Input(s):
- * r3 - Optional pointer to a board information structure.
- * r4 - Optional pointer to the physical starting address of the init RAM
- * disk.
- * r5 - Optional pointer to the physical ending address of the init RAM
- * disk.
- * r6 - Optional pointer to the physical starting address of any kernel
- * command-line parameters.
- * r7 - Optional pointer to the physical ending address of any kernel
- * command-line parameters.
- */
-void __init
-ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- parse_bootinfo(find_bootinfo());
-
- /*
- * If we were passed in a board information, copy it into the
- * residual data area.
- */
- if (r3)
- __res = *(bd_t *)(r3 + KERNELBASE);
-
-#if defined(CONFIG_BLK_DEV_INITRD)
- /*
- * If the init RAM disk has been configured in, and there's a valid
- * starting address for it, set it up.
- */
- if (r4) {
- initrd_start = r4 + KERNELBASE;
- initrd_end = r5 + KERNELBASE;
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- /* Copy the kernel command line arguments to a safe place. */
-
- if (r6) {
- *(char *) (r7 + KERNELBASE) = 0;
- strcpy(cmd_line, (char *) (r6 + KERNELBASE));
- }
-
- /* Initialize machine-dependent vectors */
-
- ppc_md.setup_arch = ppc4xx_setup_arch;
- ppc_md.show_percpuinfo = ppc4xx_show_percpuinfo;
- ppc_md.show_cpuinfo = ppc4xx_show_cpuinfo;
- ppc_md.init_IRQ = ppc4xx_init_IRQ;
-
- ppc_md.restart = ppc4xx_restart;
- ppc_md.power_off = ppc4xx_power_off;
- ppc_md.halt = ppc4xx_halt;
-
- ppc_md.calibrate_decr = ppc4xx_calibrate_decr;
-
- ppc_md.find_end_of_memory = ppc4xx_find_end_of_memory;
- ppc_md.setup_io_mappings = ppc4xx_map_io;
-
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- ppc_md.progress = gen550_progress;
-#endif
-}
-
-/* Called from machine_check_exception */
-void platform_machine_check(struct pt_regs *regs)
-{
-#if defined(DCRN_PLB0_BEAR)
- printk("PLB0: BEAR= 0x%08x ACR= 0x%08x BESR= 0x%08x\n",
- mfdcr(DCRN_PLB0_BEAR), mfdcr(DCRN_PLB0_ACR),
- mfdcr(DCRN_PLB0_BESR));
-#endif
-#if defined(DCRN_POB0_BEAR)
- printk("PLB0 to OPB: BEAR= 0x%08x BESR0= 0x%08x BESR1= 0x%08x\n",
- mfdcr(DCRN_POB0_BEAR), mfdcr(DCRN_POB0_BESR0),
- mfdcr(DCRN_POB0_BESR1));
-#endif
-
-}
diff --git a/arch/ppc/syslib/ppc4xx_sgdma.c b/arch/ppc/syslib/ppc4xx_sgdma.c
deleted file mode 100644
index c4b369b..0000000
--- a/arch/ppc/syslib/ppc4xx_sgdma.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/*
- * IBM PPC4xx DMA engine scatter/gather library
- *
- * Copyright 2002-2003 MontaVista Software Inc.
- *
- * Cleaned up and converted to new DCR access
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * Original code by Armin Kuster <akuster@mvista.com>
- * and Pete Popov <ppopov@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/system.h>
-#include <asm/io.h>
-#include <asm/ppc4xx_dma.h>
-
-void
-ppc4xx_set_sg_addr(int dmanr, phys_addr_t sg_addr)
-{
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_set_sg_addr: bad channel: %d\n", dmanr);
- return;
- }
-
-#ifdef PPC4xx_DMA_64BIT
- mtdcr(DCRN_ASGH0 + (dmanr * 0x8), (u32)(sg_addr >> 32));
-#endif
- mtdcr(DCRN_ASG0 + (dmanr * 0x8), (u32)sg_addr);
-}
-
-/*
- * Add a new sgl descriptor to the end of a scatter/gather list
- * which was created by alloc_dma_handle().
- *
- * For a memory to memory transfer, both dma addresses must be
- * valid. For a peripheral to memory transfer, one of the addresses
- * must be set to NULL, depending on the direction of the transfer:
- * memory to peripheral: set dst_addr to NULL,
- * peripheral to memory: set src_addr to NULL.
- */
-int
-ppc4xx_add_dma_sgl(sgl_handle_t handle, phys_addr_t src_addr, phys_addr_t dst_addr,
- unsigned int count)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *) handle;
- ppc_dma_ch_t *p_dma_ch;
-
- if (!handle) {
- printk("ppc4xx_add_dma_sgl: null handle\n");
- return DMA_STATUS_BAD_HANDLE;
- }
-
- if (psgl->dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_add_dma_sgl: bad channel: %d\n", psgl->dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- p_dma_ch = &dma_channels[psgl->dmanr];
-
-#ifdef DEBUG_4xxDMA
- {
- int error = 0;
- unsigned int aligned =
- (unsigned) src_addr | (unsigned) dst_addr | count;
- switch (p_dma_ch->pwidth) {
- case PW_8:
- break;
- case PW_16:
- if (aligned & 0x1)
- error = 1;
- break;
- case PW_32:
- if (aligned & 0x3)
- error = 1;
- break;
- case PW_64:
- if (aligned & 0x7)
- error = 1;
- break;
- default:
- printk("ppc4xx_add_dma_sgl: invalid bus width: 0x%x\n",
- p_dma_ch->pwidth);
- return DMA_STATUS_GENERAL_ERROR;
- }
- if (error)
- printk
- ("Alignment warning: ppc4xx_add_dma_sgl src 0x%x dst 0x%x count 0x%x bus width var %d\n",
- src_addr, dst_addr, count, p_dma_ch->pwidth);
-
- }
-#endif
-
- if ((unsigned) (psgl->ptail + 1) >= ((unsigned) psgl + SGL_LIST_SIZE)) {
- printk("sgl handle out of memory \n");
- return DMA_STATUS_OUT_OF_MEMORY;
- }
-
- if (!psgl->ptail) {
- psgl->phead = (ppc_sgl_t *)
- ((unsigned) psgl + sizeof (sgl_list_info_t));
- psgl->phead_dma = psgl->dma_addr + sizeof(sgl_list_info_t);
- psgl->ptail = psgl->phead;
- psgl->ptail_dma = psgl->phead_dma;
- } else {
- if(p_dma_ch->int_on_final_sg) {
- /* mask out all dma interrupts, except error, on tail
- before adding new tail. */
- psgl->ptail->control_count &=
- ~(SG_TCI_ENABLE | SG_ETI_ENABLE);
- }
- psgl->ptail->next = psgl->ptail_dma + sizeof(ppc_sgl_t);
- psgl->ptail++;
- psgl->ptail_dma += sizeof(ppc_sgl_t);
- }
-
- psgl->ptail->control = psgl->control;
- psgl->ptail->src_addr = src_addr;
- psgl->ptail->dst_addr = dst_addr;
- psgl->ptail->control_count = (count >> p_dma_ch->shift) |
- psgl->sgl_control;
- psgl->ptail->next = (uint32_t) NULL;
-
- return DMA_STATUS_GOOD;
-}
-
-/*
- * Enable (start) the DMA described by the sgl handle.
- */
-void
-ppc4xx_enable_dma_sgl(sgl_handle_t handle)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *) handle;
- ppc_dma_ch_t *p_dma_ch;
- uint32_t sg_command;
-
- if (!handle) {
- printk("ppc4xx_enable_dma_sgl: null handle\n");
- return;
- } else if (psgl->dmanr > (MAX_PPC4xx_DMA_CHANNELS - 1)) {
- printk("ppc4xx_enable_dma_sgl: bad channel in handle %d\n",
- psgl->dmanr);
- return;
- } else if (!psgl->phead) {
- printk("ppc4xx_enable_dma_sgl: sg list empty\n");
- return;
- }
-
- p_dma_ch = &dma_channels[psgl->dmanr];
- psgl->ptail->control_count &= ~SG_LINK; /* make this the last dscrptr */
- sg_command = mfdcr(DCRN_ASGC);
-
- ppc4xx_set_sg_addr(psgl->dmanr, psgl->phead_dma);
-
- sg_command |= SSG_ENABLE(psgl->dmanr);
-
- mtdcr(DCRN_ASGC, sg_command); /* start transfer */
-}
-
-/*
- * Halt an active scatter/gather DMA operation.
- */
-void
-ppc4xx_disable_dma_sgl(sgl_handle_t handle)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *) handle;
- uint32_t sg_command;
-
- if (!handle) {
- printk("ppc4xx_enable_dma_sgl: null handle\n");
- return;
- } else if (psgl->dmanr > (MAX_PPC4xx_DMA_CHANNELS - 1)) {
- printk("ppc4xx_enable_dma_sgl: bad channel in handle %d\n",
- psgl->dmanr);
- return;
- }
-
- sg_command = mfdcr(DCRN_ASGC);
- sg_command &= ~SSG_ENABLE(psgl->dmanr);
- mtdcr(DCRN_ASGC, sg_command); /* stop transfer */
-}
-
-/*
- * Returns number of bytes left to be transferred from the entire sgl list.
- * *src_addr and *dst_addr get set to the source/destination address of
- * the sgl descriptor where the DMA stopped.
- *
- * An sgl transfer must NOT be active when this function is called.
- */
-int
-ppc4xx_get_dma_sgl_residue(sgl_handle_t handle, phys_addr_t * src_addr,
- phys_addr_t * dst_addr)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *) handle;
- ppc_dma_ch_t *p_dma_ch;
- ppc_sgl_t *pnext, *sgl_addr;
- uint32_t count_left;
-
- if (!handle) {
- printk("ppc4xx_get_dma_sgl_residue: null handle\n");
- return DMA_STATUS_BAD_HANDLE;
- } else if (psgl->dmanr > (MAX_PPC4xx_DMA_CHANNELS - 1)) {
- printk("ppc4xx_get_dma_sgl_residue: bad channel in handle %d\n",
- psgl->dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- sgl_addr = (ppc_sgl_t *) __va(mfdcr(DCRN_ASG0 + (psgl->dmanr * 0x8)));
- count_left = mfdcr(DCRN_DMACT0 + (psgl->dmanr * 0x8)) & SG_COUNT_MASK;
-
- if (!sgl_addr) {
- printk("ppc4xx_get_dma_sgl_residue: sgl addr register is null\n");
- goto error;
- }
-
- pnext = psgl->phead;
- while (pnext &&
- ((unsigned) pnext < ((unsigned) psgl + SGL_LIST_SIZE) &&
- (pnext != sgl_addr))
- ) {
- pnext++;
- }
-
- if (pnext == sgl_addr) { /* found the sgl descriptor */
-
- *src_addr = pnext->src_addr;
- *dst_addr = pnext->dst_addr;
-
- /*
- * Now search the remaining descriptors and add their count.
- * We already have the remaining count from this descriptor in
- * count_left.
- */
- pnext++;
-
- while ((pnext != psgl->ptail) &&
- ((unsigned) pnext < ((unsigned) psgl + SGL_LIST_SIZE))
- ) {
- count_left += pnext->control_count & SG_COUNT_MASK;
- }
-
- if (pnext != psgl->ptail) { /* should never happen */
- printk
- ("ppc4xx_get_dma_sgl_residue error (1) psgl->ptail 0x%x handle 0x%x\n",
- (unsigned int) psgl->ptail, (unsigned int) handle);
- goto error;
- }
-
- /* success */
- p_dma_ch = &dma_channels[psgl->dmanr];
- return (count_left << p_dma_ch->shift); /* count in bytes */
-
- } else {
- /* this shouldn't happen */
- printk
- ("get_dma_sgl_residue, unable to match current address 0x%x, handle 0x%x\n",
- (unsigned int) sgl_addr, (unsigned int) handle);
-
- }
-
- error:
- *src_addr = (phys_addr_t) NULL;
- *dst_addr = (phys_addr_t) NULL;
- return 0;
-}
-
-/*
- * Returns the address(es) of the buffer(s) contained in the head element of
- * the scatter/gather list. The element is removed from the scatter/gather
- * list and the next element becomes the head.
- *
- * This function should only be called when the DMA is not active.
- */
-int
-ppc4xx_delete_dma_sgl_element(sgl_handle_t handle, phys_addr_t * src_dma_addr,
- phys_addr_t * dst_dma_addr)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *) handle;
-
- if (!handle) {
- printk("ppc4xx_delete_sgl_element: null handle\n");
- return DMA_STATUS_BAD_HANDLE;
- } else if (psgl->dmanr > (MAX_PPC4xx_DMA_CHANNELS - 1)) {
- printk("ppc4xx_delete_sgl_element: bad channel in handle %d\n",
- psgl->dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- if (!psgl->phead) {
- printk("ppc4xx_delete_sgl_element: sgl list empty\n");
- *src_dma_addr = (phys_addr_t) NULL;
- *dst_dma_addr = (phys_addr_t) NULL;
- return DMA_STATUS_SGL_LIST_EMPTY;
- }
-
- *src_dma_addr = (phys_addr_t) psgl->phead->src_addr;
- *dst_dma_addr = (phys_addr_t) psgl->phead->dst_addr;
-
- if (psgl->phead == psgl->ptail) {
- /* last descriptor on the list */
- psgl->phead = NULL;
- psgl->ptail = NULL;
- } else {
- psgl->phead++;
- psgl->phead_dma += sizeof(ppc_sgl_t);
- }
-
- return DMA_STATUS_GOOD;
-}
-
-
-/*
- * Create a scatter/gather list handle. This is simply a structure which
- * describes a scatter/gather list.
- *
- * A handle is returned in "handle" which the driver should save in order to
- * be able to access this list later. A chunk of memory will be allocated
- * to be used by the API for internal management purposes, including managing
- * the sg list and allocating memory for the sgl descriptors. One page should
- * be more than enough for that purpose. Perhaps it's a bit wasteful to use
- * a whole page for a single sg list, but most likely there will be only one
- * sg list per channel.
- *
- * Interrupt notes:
- * Each sgl descriptor has a copy of the DMA control word which the DMA engine
- * loads in the control register. The control word has a "global" interrupt
- * enable bit for that channel. Interrupts are further qualified by a few bits
- * in the sgl descriptor count register. In order to setup an sgl, we have to
- * know ahead of time whether or not interrupts will be enabled at the completion
- * of the transfers. Thus, enable_dma_interrupt()/disable_dma_interrupt() MUST
- * be called before calling alloc_dma_handle(). If the interrupt mode will never
- * change after powerup, then enable_dma_interrupt()/disable_dma_interrupt()
- * do not have to be called -- interrupts will be enabled or disabled based
- * on how the channel was configured after powerup by the hw_init_dma_channel()
- * function. Each sgl descriptor will be setup to interrupt if an error occurs;
- * however, only the last descriptor will be setup to interrupt. Thus, an
- * interrupt will occur (if interrupts are enabled) only after the complete
- * sgl transfer is done.
- */
-int
-ppc4xx_alloc_dma_handle(sgl_handle_t * phandle, unsigned int mode, unsigned int dmanr)
-{
- sgl_list_info_t *psgl=NULL;
- dma_addr_t dma_addr;
- ppc_dma_ch_t *p_dma_ch = &dma_channels[dmanr];
- uint32_t sg_command;
- uint32_t ctc_settings;
- void *ret;
-
- if (dmanr >= MAX_PPC4xx_DMA_CHANNELS) {
- printk("ppc4xx_alloc_dma_handle: invalid channel 0x%x\n", dmanr);
- return DMA_STATUS_BAD_CHANNEL;
- }
-
- if (!phandle) {
- printk("ppc4xx_alloc_dma_handle: null handle pointer\n");
- return DMA_STATUS_NULL_POINTER;
- }
-
- /* Get a page of memory, which is zeroed out by consistent_alloc() */
- ret = dma_alloc_coherent(NULL, DMA_PPC4xx_SIZE, &dma_addr, GFP_KERNEL);
- if (ret != NULL) {
- memset(ret, 0, DMA_PPC4xx_SIZE);
- psgl = (sgl_list_info_t *) ret;
- }
-
- if (psgl == NULL) {
- *phandle = (sgl_handle_t) NULL;
- return DMA_STATUS_OUT_OF_MEMORY;
- }
-
- psgl->dma_addr = dma_addr;
- psgl->dmanr = dmanr;
-
- /*
- * Modify and save the control word. These words will be
- * written to each sgl descriptor. The DMA engine then
- * loads this control word into the control register
- * every time it reads a new descriptor.
- */
- psgl->control = p_dma_ch->control;
- /* Clear all mode bits */
- psgl->control &= ~(DMA_TM_MASK | DMA_TD);
- /* Save control word and mode */
- psgl->control |= (mode | DMA_CE_ENABLE);
-
- /* In MM mode, we must set ETD/TCE */
- if (mode == DMA_MODE_MM)
- psgl->control |= DMA_ETD_OUTPUT | DMA_TCE_ENABLE;
-
- if (p_dma_ch->int_enable) {
- /* Enable channel interrupt */
- psgl->control |= DMA_CIE_ENABLE;
- } else {
- psgl->control &= ~DMA_CIE_ENABLE;
- }
-
- sg_command = mfdcr(DCRN_ASGC);
- sg_command |= SSG_MASK_ENABLE(dmanr);
-
- /* Enable SGL control access */
- mtdcr(DCRN_ASGC, sg_command);
- psgl->sgl_control = SG_ERI_ENABLE | SG_LINK;
-
- /* keep control count register settings */
- ctc_settings = mfdcr(DCRN_DMACT0 + (dmanr * 0x8))
- & (DMA_CTC_BSIZ_MSK | DMA_CTC_BTEN); /*burst mode settings*/
- psgl->sgl_control |= ctc_settings;
-
- if (p_dma_ch->int_enable) {
- if (p_dma_ch->tce_enable)
- psgl->sgl_control |= SG_TCI_ENABLE;
- else
- psgl->sgl_control |= SG_ETI_ENABLE;
- }
-
- *phandle = (sgl_handle_t) psgl;
- return DMA_STATUS_GOOD;
-}
-
-/*
- * Destroy a scatter/gather list handle that was created by alloc_dma_handle().
- * The list must be empty (contain no elements).
- */
-void
-ppc4xx_free_dma_handle(sgl_handle_t handle)
-{
- sgl_list_info_t *psgl = (sgl_list_info_t *) handle;
-
- if (!handle) {
- printk("ppc4xx_free_dma_handle: got NULL\n");
- return;
- } else if (psgl->phead) {
- printk("ppc4xx_free_dma_handle: list not empty\n");
- return;
- } else if (!psgl->dma_addr) { /* should never happen */
- printk("ppc4xx_free_dma_handle: no dma address\n");
- return;
- }
-
- dma_free_coherent(NULL, DMA_PPC4xx_SIZE, (void *) psgl, 0);
-}
-
-EXPORT_SYMBOL(ppc4xx_alloc_dma_handle);
-EXPORT_SYMBOL(ppc4xx_free_dma_handle);
-EXPORT_SYMBOL(ppc4xx_add_dma_sgl);
-EXPORT_SYMBOL(ppc4xx_delete_dma_sgl_element);
-EXPORT_SYMBOL(ppc4xx_enable_dma_sgl);
-EXPORT_SYMBOL(ppc4xx_disable_dma_sgl);
-EXPORT_SYMBOL(ppc4xx_get_dma_sgl_residue);
diff --git a/arch/ppc/syslib/ppc8xx_pic.c b/arch/ppc/syslib/ppc8xx_pic.c
deleted file mode 100644
index bce9a75..0000000
--- a/arch/ppc/syslib/ppc8xx_pic.c
+++ /dev/null
@@ -1,126 +0,0 @@
-#include <linux/module.h>
-#include <linux/stddef.h>
-#include <linux/init.h>
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <linux/interrupt.h>
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/8xx_immap.h>
-#include <asm/mpc8xx.h>
-#include "ppc8xx_pic.h"
-
-extern int cpm_get_irq(void);
-
-/* The 8xx internal interrupt controller. It is usually
- * the only interrupt controller. Some boards, like the MBX and
- * Sandpoint have the 8259 as a secondary controller. Depending
- * upon the processor type, the internal controller can have as
- * few as 16 interrupts or as many as 64. We could use the
- * "clear_bit()" and "set_bit()" functions like other platforms,
- * but they are overkill for us.
- */
-
-static void m8xx_mask_irq(unsigned int irq_nr)
-{
- int bit, word;
-
- bit = irq_nr & 0x1f;
- word = irq_nr >> 5;
-
- ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
- out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
-}
-
-static void m8xx_unmask_irq(unsigned int irq_nr)
-{
- int bit, word;
-
- bit = irq_nr & 0x1f;
- word = irq_nr >> 5;
-
- ppc_cached_irq_mask[word] |= (1 << (31-bit));
- out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
-}
-
-static void m8xx_end_irq(unsigned int irq_nr)
-{
- if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
- && irq_desc[irq_nr].action) {
- int bit, word;
-
- bit = irq_nr & 0x1f;
- word = irq_nr >> 5;
-
- ppc_cached_irq_mask[word] |= (1 << (31-bit));
- out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
- }
-}
-
-
-static void m8xx_mask_and_ack(unsigned int irq_nr)
-{
- int bit, word;
-
- bit = irq_nr & 0x1f;
- word = irq_nr >> 5;
-
- ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
- out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
- out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend, 1 << (31-bit));
-}
-
-struct hw_interrupt_type ppc8xx_pic = {
- .typename = " 8xx SIU ",
- .enable = m8xx_unmask_irq,
- .disable = m8xx_mask_irq,
- .ack = m8xx_mask_and_ack,
- .end = m8xx_end_irq,
-};
-
-/*
- * We either return a valid interrupt or -1 if there is nothing pending
- */
-int
-m8xx_get_irq(struct pt_regs *regs)
-{
- int irq;
-
- /* For MPC8xx, read the SIVEC register and shift the bits down
- * to get the irq number.
- */
- irq = in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec) >> 26;
-
- /*
- * When we read the sivec without an interrupt to process, we will
- * get back SIU_LEVEL7. In this case, return -1
- */
- if (irq == CPM_INTERRUPT)
- irq = CPM_IRQ_OFFSET + cpm_get_irq();
-#if defined(CONFIG_PCI)
- else if (irq == ISA_BRIDGE_INT) {
- int isa_irq;
-
- if ((isa_irq = i8259_poll(regs)) >= 0)
- irq = I8259_IRQ_OFFSET + isa_irq;
- }
-#endif /* CONFIG_PCI */
- else if (irq == SIU_LEVEL7)
- irq = -1;
-
- return irq;
-}
-
-#if defined(CONFIG_MBX) && defined(CONFIG_PCI)
-/* Only the MBX uses the external 8259. This allows us to catch standard
- * drivers that may mess up the internal interrupt controllers, and also
- * allow them to run without modification on the MBX.
- */
-void mbx_i8259_action(int irq, void *dev_id, struct pt_regs *regs)
-{
- /* This interrupt handler never actually gets called. It is
- * installed only to unmask the 8259 cascade interrupt in the SIU
- * and to make the 8259 cascade interrupt visible in /proc/interrupts.
- */
-}
-#endif /* CONFIG_PCI */
diff --git a/arch/ppc/syslib/ppc8xx_pic.h b/arch/ppc/syslib/ppc8xx_pic.h
deleted file mode 100644
index 53bcd97..0000000
--- a/arch/ppc/syslib/ppc8xx_pic.h
+++ /dev/null
@@ -1,19 +0,0 @@
-#ifndef _PPC_KERNEL_PPC8xx_H
-#define _PPC_KERNEL_PPC8xx_H
-
-#include <linux/irq.h>
-#include <linux/interrupt.h>
-
-extern struct hw_interrupt_type ppc8xx_pic;
-
-void m8xx_do_IRQ(struct pt_regs *regs,
- int cpu);
-int m8xx_get_irq(struct pt_regs *regs);
-
-#ifdef CONFIG_MBX
-#include <asm/i8259.h>
-#include <asm/io.h>
-void mbx_i8259_action(int cpl, void *dev_id, struct pt_regs *regs);
-#endif
-
-#endif /* _PPC_KERNEL_PPC8xx_H */
diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
deleted file mode 100644
index 837183c..0000000
--- a/arch/ppc/syslib/ppc_sys.c
+++ /dev/null
@@ -1,329 +0,0 @@
-/*
- * PPC System library functions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2005 Freescale Semiconductor Inc.
- * Copyright 2005 MontaVista, Inc. by Vitaly Bordug <vbordug@ru.mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/string.h>
-#include <linux/bootmem.h>
-#include <asm/ppc_sys.h>
-
-int (*ppc_sys_device_fixup) (struct platform_device * pdev);
-
-static int ppc_sys_inited;
-static int ppc_sys_func_inited;
-
-static const char *ppc_sys_func_names[] = {
- [PPC_SYS_FUNC_DUMMY] = "dummy",
- [PPC_SYS_FUNC_ETH] = "eth",
- [PPC_SYS_FUNC_UART] = "uart",
- [PPC_SYS_FUNC_HLDC] = "hldc",
- [PPC_SYS_FUNC_USB] = "usb",
- [PPC_SYS_FUNC_IRDA] = "irda",
-};
-
-void __init identify_ppc_sys_by_id(u32 id)
-{
- unsigned int i = 0;
- while (1) {
- if ((ppc_sys_specs[i].mask & id) == ppc_sys_specs[i].value)
- break;
- i++;
- }
-
- cur_ppc_sys_spec = &ppc_sys_specs[i];
-
- return;
-}
-
-void __init identify_ppc_sys_by_name(char *name)
-{
- unsigned int i = 0;
- while (ppc_sys_specs[i].ppc_sys_name[0]) {
- if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name))
- break;
- i++;
- }
- cur_ppc_sys_spec = &ppc_sys_specs[i];
-
- return;
-}
-
-static int __init count_sys_specs(void)
-{
- int i = 0;
- while (ppc_sys_specs[i].ppc_sys_name[0])
- i++;
- return i;
-}
-
-static int __init find_chip_by_name_and_id(char *name, u32 id)
-{
- int ret = -1;
- unsigned int i = 0;
- unsigned int j = 0;
- unsigned int dups = 0;
-
- unsigned char matched[count_sys_specs()];
-
- while (ppc_sys_specs[i].ppc_sys_name[0]) {
- if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name))
- matched[j++] = i;
- i++;
- }
-
- ret = i;
-
- if (j != 0) {
- for (i = 0; i < j; i++) {
- if ((ppc_sys_specs[matched[i]].mask & id) ==
- ppc_sys_specs[matched[i]].value) {
- ret = matched[i];
- dups++;
- }
- }
- ret = (dups == 1) ? ret : (-1 * dups);
- }
- return ret;
-}
-
-void __init identify_ppc_sys_by_name_and_id(char *name, u32 id)
-{
- int i = find_chip_by_name_and_id(name, id);
- BUG_ON(i < 0);
- cur_ppc_sys_spec = &ppc_sys_specs[i];
-}
-
-/* Update all memory resources by paddr, call before platform_device_register */
-void __init
-ppc_sys_fixup_mem_resource(struct platform_device *pdev, phys_addr_t paddr)
-{
- int i;
- for (i = 0; i < pdev->num_resources; i++) {
- struct resource *r = &pdev->resource[i];
- if (((r->flags & IORESOURCE_MEM) == IORESOURCE_MEM) &&
- ((r->flags & PPC_SYS_IORESOURCE_FIXUPPED) != PPC_SYS_IORESOURCE_FIXUPPED)) {
- r->start += paddr;
- r->end += paddr;
- r->flags |= PPC_SYS_IORESOURCE_FIXUPPED;
- }
- }
-}
-
-/* Get platform_data pointer out of platform device, call before platform_device_register */
-void *__init ppc_sys_get_pdata(enum ppc_sys_devices dev)
-{
- return ppc_sys_platform_devices[dev].dev.platform_data;
-}
-
-void ppc_sys_device_remove(enum ppc_sys_devices dev)
-{
- unsigned int i;
-
- if (ppc_sys_inited) {
- platform_device_unregister(&ppc_sys_platform_devices[dev]);
- } else {
- if (cur_ppc_sys_spec == NULL)
- return;
- for (i = 0; i < cur_ppc_sys_spec->num_devices; i++)
- if (cur_ppc_sys_spec->device_list[i] == dev)
- cur_ppc_sys_spec->device_list[i] = -1;
- }
-}
-
-/* Platform-notify mapping
- * Helper function for BSP code to assign board-specific platfom-divice bits
- */
-
-void platform_notify_map(const struct platform_notify_dev_map *map,
- struct device *dev)
-{
- struct platform_device *pdev;
- int len, idx;
- const char *s;
-
- /* do nothing if no device or no bus_id */
- if (!dev || !dev->bus_id)
- return;
-
- /* call per device map */
- while (map->bus_id != NULL) {
- idx = -1;
- s = strrchr(dev->bus_id, '.');
- if (s != NULL) {
- idx = (int)simple_strtol(s + 1, NULL, 10);
- len = s - dev->bus_id;
- } else {
- s = dev->bus_id;
- len = strlen(dev->bus_id);
- }
-
- if (!strncmp(dev->bus_id, map->bus_id, len)) {
- pdev = container_of(dev, struct platform_device, dev);
- map->rtn(pdev, idx);
- }
- map++;
- }
-}
-
-/*
- Function assignment stuff.
- Intended to work as follows:
- the device name defined in foo_devices.c will be concatenated with :"func",
- where func is string map of respective function from platfom_device_func enum
-
- The PPC_SYS_FUNC_DUMMY function is intended to remove all assignments, making the device to appear
- in platform bus with unmodified name.
- */
-
-/*
- Here we'll replace .name pointers with fixed-length strings
- Hereby, this should be called *before* any func stuff triggeded.
- */
-void ppc_sys_device_initfunc(void)
-{
- int i;
- const char *name;
- static char new_names[NUM_PPC_SYS_DEVS][BUS_ID_SIZE];
- enum ppc_sys_devices cur_dev;
-
- /* If inited yet, do nothing */
- if (ppc_sys_func_inited)
- return;
-
- for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
- if ((cur_dev = cur_ppc_sys_spec->device_list[i]) < 0)
- continue;
-
- if (ppc_sys_platform_devices[cur_dev].name) {
- /*backup name */
- name = ppc_sys_platform_devices[cur_dev].name;
- strlcpy(new_names[i], name, BUS_ID_SIZE);
- ppc_sys_platform_devices[cur_dev].name = new_names[i];
- }
- }
-
- ppc_sys_func_inited = 1;
-}
-
-/*The "engine" of the func stuff. Here we either concat specified function string description
- to the name, or remove it if PPC_SYS_FUNC_DUMMY parameter is passed here*/
-void ppc_sys_device_setfunc(enum ppc_sys_devices dev,
- enum platform_device_func func)
-{
- char *s;
- char *name = (char *)ppc_sys_platform_devices[dev].name;
- char tmp[BUS_ID_SIZE];
-
- if (!ppc_sys_func_inited) {
- printk(KERN_ERR "Unable to alter function - not inited!\n");
- return;
- }
-
- if (ppc_sys_inited) {
- platform_device_unregister(&ppc_sys_platform_devices[dev]);
- }
-
- if ((s = (char *)strchr(name, ':')) != NULL) { /* reassign */
- /* Either change the name after ':' or remove func modifications */
- if (func != PPC_SYS_FUNC_DUMMY)
- strlcpy(s + 1, ppc_sys_func_names[func], BUS_ID_SIZE);
- else
- *s = 0;
- } else if (func != PPC_SYS_FUNC_DUMMY) {
- /* do assignment if it is not just "clear" request */
- sprintf(tmp, "%s:%s", name, ppc_sys_func_names[func]);
- strlcpy(name, tmp, BUS_ID_SIZE);
- }
-
- if (ppc_sys_inited) {
- platform_device_register(&ppc_sys_platform_devices[dev]);
- }
-}
-
-void ppc_sys_device_disable(enum ppc_sys_devices dev)
-{
- BUG_ON(cur_ppc_sys_spec == NULL);
-
- /*Check if it is enabled*/
- if(!(cur_ppc_sys_spec->config[dev] & PPC_SYS_CONFIG_DISABLED)) {
- if (ppc_sys_inited) {
- platform_device_unregister(&ppc_sys_platform_devices[dev]);
- }
- cur_ppc_sys_spec->config[dev] |= PPC_SYS_CONFIG_DISABLED;
- }
-}
-
-void ppc_sys_device_enable(enum ppc_sys_devices dev)
-{
- BUG_ON(cur_ppc_sys_spec == NULL);
-
- /*Check if it is disabled*/
- if(cur_ppc_sys_spec->config[dev] & PPC_SYS_CONFIG_DISABLED) {
- if (ppc_sys_inited) {
- platform_device_register(&ppc_sys_platform_devices[dev]);
- }
- cur_ppc_sys_spec->config[dev] &= ~PPC_SYS_CONFIG_DISABLED;
- }
-
-}
-
-void ppc_sys_device_enable_all(void)
-{
- enum ppc_sys_devices cur_dev;
- int i;
-
- for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
- cur_dev = cur_ppc_sys_spec->device_list[i];
- ppc_sys_device_enable(cur_dev);
- }
-}
-
-void ppc_sys_device_disable_all(void)
-{
- enum ppc_sys_devices cur_dev;
- int i;
-
- for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
- cur_dev = cur_ppc_sys_spec->device_list[i];
- ppc_sys_device_disable(cur_dev);
- }
-}
-
-
-static int __init ppc_sys_init(void)
-{
- unsigned int i, dev_id, ret = 0;
-
- BUG_ON(cur_ppc_sys_spec == NULL);
-
- for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
- dev_id = cur_ppc_sys_spec->device_list[i];
- if ((dev_id != -1) &&
- !(cur_ppc_sys_spec->config[dev_id] & PPC_SYS_CONFIG_DISABLED)) {
- if (ppc_sys_device_fixup != NULL)
- ppc_sys_device_fixup(&ppc_sys_platform_devices
- [dev_id]);
- if (platform_device_register
- (&ppc_sys_platform_devices[dev_id])) {
- ret = 1;
- printk(KERN_ERR
- "unable to register device %d\n",
- dev_id);
- }
- }
- }
-
- ppc_sys_inited = 1;
- return ret;
-}
-
-subsys_initcall(ppc_sys_init);
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
deleted file mode 100644
index fefbc21..0000000
--- a/arch/ppc/syslib/pq2_devices.c
+++ /dev/null
@@ -1,393 +0,0 @@
-/*
- * PQ2 Device descriptions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/ioport.h>
-#include <asm/cpm2.h>
-#include <asm/irq.h>
-#include <asm/ppc_sys.h>
-#include <asm/machdep.h>
-
-struct platform_device ppc_sys_platform_devices[] = {
- [MPC82xx_CPM_FCC1] = {
- .name = "fsl-cpm-fcc",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "fcc_regs",
- .start = 0x11300,
- .end = 0x1131f,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_pram",
- .start = 0x8400,
- .end = 0x84ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_FCC1,
- .end = SIU_INT_FCC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_FCC2] = {
- .name = "fsl-cpm-fcc",
- .id = 2,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "fcc_regs",
- .start = 0x11320,
- .end = 0x1133f,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_pram",
- .start = 0x8500,
- .end = 0x85ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_FCC2,
- .end = SIU_INT_FCC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_FCC3] = {
- .name = "fsl-cpm-fcc",
- .id = 3,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "fcc_regs",
- .start = 0x11340,
- .end = 0x1135f,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "fcc_pram",
- .start = 0x8600,
- .end = 0x86ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_FCC3,
- .end = SIU_INT_FCC3,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_I2C] = {
- .name = "fsl-cpm-i2c",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "i2c_mem",
- .start = 0x11860,
- .end = 0x118BF,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "i2c_pram",
- .start = 0x8afc,
- .end = 0x8afd,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_I2C,
- .end = SIU_INT_I2C,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_SCC1] = {
- .name = "fsl-cpm-scc",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0x11A00,
- .end = 0x11A1F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x8000,
- .end = 0x80ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SCC1,
- .end = SIU_INT_SCC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_SCC2] = {
- .name = "fsl-cpm-scc",
- .id = 2,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0x11A20,
- .end = 0x11A3F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x8100,
- .end = 0x81ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SCC2,
- .end = SIU_INT_SCC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_SCC3] = {
- .name = "fsl-cpm-scc",
- .id = 3,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0x11A40,
- .end = 0x11A5F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x8200,
- .end = 0x82ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SCC3,
- .end = SIU_INT_SCC3,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_SCC4] = {
- .name = "fsl-cpm-scc",
- .id = 4,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "regs",
- .start = 0x11A60,
- .end = 0x11A7F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "pram",
- .start = 0x8300,
- .end = 0x83ff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SCC4,
- .end = SIU_INT_SCC4,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_SPI] = {
- .name = "fsl-cpm-spi",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "spi_mem",
- .start = 0x11AA0,
- .end = 0x11AFF,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "spi_pram",
- .start = 0x89fc,
- .end = 0x89fd,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SPI,
- .end = SIU_INT_SPI,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_MCC1] = {
- .name = "fsl-cpm-mcc",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "mcc_mem",
- .start = 0x11B30,
- .end = 0x11B3F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "mcc_pram",
- .start = 0x8700,
- .end = 0x877f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_MCC1,
- .end = SIU_INT_MCC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_MCC2] = {
- .name = "fsl-cpm-mcc",
- .id = 2,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "mcc_mem",
- .start = 0x11B50,
- .end = 0x11B5F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "mcc_pram",
- .start = 0x8800,
- .end = 0x887f,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_MCC2,
- .end = SIU_INT_MCC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_SMC1] = {
- .name = "fsl-cpm-smc",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "smc_mem",
- .start = 0x11A80,
- .end = 0x11A8F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "smc_pram",
- .start = 0x87fc,
- .end = 0x87fd,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SMC1,
- .end = SIU_INT_SMC1,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_SMC2] = {
- .name = "fsl-cpm-smc",
- .id = 2,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "smc_mem",
- .start = 0x11A90,
- .end = 0x11A9F,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "smc_pram",
- .start = 0x88fc,
- .end = 0x88fd,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_SMC2,
- .end = SIU_INT_SMC2,
- .flags = IORESOURCE_IRQ,
- },
- },
- },
- [MPC82xx_CPM_USB] = {
- .name = "fsl-cpm-usb",
- .id = 1,
- .num_resources = 3,
- .resource = (struct resource[]) {
- {
- .name = "usb_mem",
- .start = 0x11b60,
- .end = 0x11b78,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "usb_pram",
- .start = 0x8b00,
- .end = 0x8bff,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = SIU_INT_USB,
- .end = SIU_INT_USB,
- .flags = IORESOURCE_IRQ,
- },
-
- },
- },
- [MPC82xx_SEC1] = {
- .name = "fsl-sec",
- .id = 1,
- .num_resources = 1,
- .resource = (struct resource[]) {
- {
- .name = "sec_mem",
- .start = 0x40000,
- .end = 0x52fff,
- .flags = IORESOURCE_MEM,
- },
- },
- },
- [MPC82xx_MDIO_BB] = {
- .name = "fsl-bb-mdio",
- .id = 0,
- .num_resources = 0,
- },
-};
-
-static int __init mach_mpc82xx_fixup(struct platform_device *pdev)
-{
- ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
- return 0;
-}
-
-static int __init mach_mpc82xx_init(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("mach_mpc82xx_init:enter", 0);
- ppc_sys_device_fixup = mach_mpc82xx_fixup;
- return 0;
-}
-
-postcore_initcall(mach_mpc82xx_init);
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c
deleted file mode 100644
index 9c85300..0000000
--- a/arch/ppc/syslib/pq2_sys.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * PQ2 System descriptions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-
-#include <asm/ppc_sys.h>
-
-struct ppc_sys_spec *cur_ppc_sys_spec;
-struct ppc_sys_spec ppc_sys_specs[] = {
- /* below is a list of the 8260 family of processors */
- {
- .ppc_sys_name = "8250",
- .mask = 0x0000ff00,
- .value = 0x00000000,
- .num_devices = 12,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
- MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
- }
- },
- {
- .ppc_sys_name = "8255",
- .mask = 0x0000ff00,
- .value = 0x00000000,
- .num_devices = 11,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
- MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
- MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2,
- MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
- }
- },
- {
- .ppc_sys_name = "8260",
- .mask = 0x0000ff00,
- .value = 0x00000000,
- .num_devices = 13,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
- MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
- MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
- MPC82xx_CPM_I2C,
- }
- },
- {
- .ppc_sys_name = "8264",
- .mask = 0x0000ff00,
- .value = 0x00000000,
- .num_devices = 13,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
- MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
- MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
- MPC82xx_CPM_I2C,
- }
- },
- {
- .ppc_sys_name = "8265",
- .mask = 0x0000ff00,
- .value = 0x00000000,
- .num_devices = 13,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
- MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
- MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
- MPC82xx_CPM_I2C,
- }
- },
- {
- .ppc_sys_name = "8266",
- .mask = 0x0000ff00,
- .value = 0x00000000,
- .num_devices = 13,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
- MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
- MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
- MPC82xx_CPM_I2C,
- }
- },
- /* below is a list of the 8272 family of processors */
- {
- .ppc_sys_name = "8247",
- .mask = 0x0000ff00,
- .value = 0x00000d00,
- .num_devices = 10,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
- MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
- MPC82xx_CPM_USB,
- },
- },
- {
- .ppc_sys_name = "8248",
- .mask = 0x0000ff00,
- .value = 0x00000c00,
- .num_devices = 12,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
- MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
- MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
- MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
- },
- },
- {
- .ppc_sys_name = "8271",
- .mask = 0x0000ff00,
- .value = 0x00000d00,
- .num_devices = 10,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
- MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
- MPC82xx_CPM_USB,
- },
- },
- {
- .ppc_sys_name = "8272",
- .mask = 0x0000ff00,
- .value = 0x00000c00,
- .num_devices = 13,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1,
- MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4,
- MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
- MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1,
- MPC82xx_MDIO_BB,
- },
- },
- /* below is a list of the 8280 family of processors */
- {
- .ppc_sys_name = "8270",
- .mask = 0x0000ff00,
- .value = 0x00000a00,
- .num_devices = 12,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
- MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
- },
- },
- {
- .ppc_sys_name = "8275",
- .mask = 0x0000ff00,
- .value = 0x00000a00,
- .num_devices = 12,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
- MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC2, MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, MPC82xx_CPM_I2C,
- },
- },
- {
- .ppc_sys_name = "8280",
- .mask = 0x0000ff00,
- .value = 0x00000a00,
- .num_devices = 13,
- .device_list = (enum ppc_sys_devices[])
- {
- MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_FCC3,
- MPC82xx_CPM_SCC1, MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4, MPC82xx_CPM_MCC1, MPC82xx_CPM_MCC2,
- MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI,
- MPC82xx_CPM_I2C,
- },
- },
- {
- /* default match */
- .ppc_sys_name = "",
- .mask = 0x00000000,
- .value = 0x00000000,
- },
-};
diff --git a/arch/ppc/syslib/prep_nvram.c b/arch/ppc/syslib/prep_nvram.c
deleted file mode 100644
index 474dccb..0000000
--- a/arch/ppc/syslib/prep_nvram.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Copyright (C) 1998 Corey Minyard
- *
- * This reads the NvRAM on PReP compliant machines (generally from IBM or
- * Motorola). Motorola kept the format of NvRAM in their ROM, PPCBUG, the
- * same, long after they had stopped producing PReP compliant machines. So
- * this code is useful in those cases as well.
- *
- */
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/slab.h>
-#include <linux/ioport.h>
-
-#include <asm/sections.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/prep_nvram.h>
-
-static char nvramData[MAX_PREP_NVRAM];
-static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0];
-
-unsigned char prep_nvram_read_val(int addr)
-{
- outb(addr, PREP_NVRAM_AS0);
- outb(addr>>8, PREP_NVRAM_AS1);
- return inb(PREP_NVRAM_DATA);
-}
-
-void prep_nvram_write_val(int addr,
- unsigned char val)
-{
- outb(addr, PREP_NVRAM_AS0);
- outb(addr>>8, PREP_NVRAM_AS1);
- outb(val, PREP_NVRAM_DATA);
-}
-
-void __init init_prep_nvram(void)
-{
- unsigned char *nvp;
- int i;
- int nvramSize;
-
- /*
- * The following could fail if the NvRAM were corrupt but
- * we expect the boot firmware to have checked its checksum
- * before boot
- */
- nvp = (char *) &nvram->Header;
- for (i=0; i<sizeof(HEADER); i++)
- {
- *nvp = ppc_md.nvram_read_val(i);
- nvp++;
- }
-
- /*
- * The PReP NvRAM may be any size so read in the header to
- * determine how much we must read in order to get the complete
- * GE area
- */
- nvramSize=(int)nvram->Header.GEAddress+nvram->Header.GELength;
- if(nvramSize>MAX_PREP_NVRAM)
- {
- /*
- * NvRAM is too large
- */
- nvram->Header.GELength=0;
- return;
- }
-
- /*
- * Read the remainder of the PReP NvRAM
- */
- nvp = (char *) &nvram->GEArea[0];
- for (i=sizeof(HEADER); i<nvramSize; i++)
- {
- *nvp = ppc_md.nvram_read_val(i);
- nvp++;
- }
-}
-
-char *prep_nvram_get_var(const char *name)
-{
- char *cp;
- int namelen;
-
- namelen = strlen(name);
- cp = prep_nvram_first_var();
- while (cp != NULL) {
- if ((strncmp(name, cp, namelen) == 0)
- && (cp[namelen] == '='))
- {
- return cp+namelen+1;
- }
- cp = prep_nvram_next_var(cp);
- }
-
- return NULL;
-}
-
-char *prep_nvram_first_var(void)
-{
- if (nvram->Header.GELength == 0) {
- return NULL;
- } else {
- return (((char *)nvram)
- + ((unsigned int) nvram->Header.GEAddress));
- }
-}
-
-char *prep_nvram_next_var(char *name)
-{
- char *cp;
-
-
- cp = name;
- while (((cp - ((char *) nvram->GEArea)) < nvram->Header.GELength)
- && (*cp != '\0'))
- {
- cp++;
- }
-
- /* Skip over any null characters. */
- while (((cp - ((char *) nvram->GEArea)) < nvram->Header.GELength)
- && (*cp == '\0'))
- {
- cp++;
- }
-
- if ((cp - ((char *) nvram->GEArea)) < nvram->Header.GELength) {
- return cp;
- } else {
- return NULL;
- }
-}
diff --git a/arch/ppc/syslib/qspan_pci.c b/arch/ppc/syslib/qspan_pci.c
deleted file mode 100644
index 7a97c74..0000000
--- a/arch/ppc/syslib/qspan_pci.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/*
- * QSpan pci routines.
- * Most 8xx boards use the QSpan PCI bridge. The config address register
- * is located 0x500 from the base of the bridge control/status registers.
- * The data register is located at 0x504.
- * This is a two step operation. First, the address register is written,
- * then the data register is read/written as required.
- * I don't know what to do about interrupts (yet).
- *
- * The RPX Classic implementation shares a chip select for normal
- * PCI access and QSpan control register addresses. The selection is
- * further selected by a bit setting in a board control register.
- * Although it should happen, we disable interrupts during this operation
- * to make sure some driver doesn't accidentally access the PCI while
- * we have switched the chip select.
- */
-
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/string.h>
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/mpc8xx.h>
-#include <asm/system.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-
-
-/*
- * This blows......
- * When reading the configuration space, if something does not respond
- * the bus times out and we get a machine check interrupt. So, the
- * good ol' exception tables come to mind to trap it and return some
- * value.
- *
- * On an error we just return a -1, since that is what the caller wants
- * returned if nothing is present. I copied this from __get_user_asm,
- * with the only difference of returning -1 instead of EFAULT.
- * There is an associated hack in the machine check trap code.
- *
- * The QSPAN is also a big endian device, that is it makes the PCI
- * look big endian to us. This presents a problem for the Linux PCI
- * functions, which assume little endian. For example, we see the
- * first 32-bit word like this:
- * ------------------------
- * | Device ID | Vendor ID |
- * ------------------------
- * If we read/write as a double word, that's OK. But in our world,
- * when read as a word, device ID is at location 0, not location 2 as
- * the little endian PCI would believe. We have to switch bits in
- * the PCI addresses given to us to get the data to/from the correct
- * byte lanes.
- *
- * The QSPAN only supports 4 bits of "slot" in the dev_fn instead of 5.
- * It always forces the MS bit to zero. Therefore, dev_fn values
- * greater than 128 are returned as "no device found" errors.
- *
- * The QSPAN can only perform long word (32-bit) configuration cycles.
- * The "offset" must have the two LS bits set to zero. Read operations
- * require we read the entire word and then sort out what should be
- * returned. Write operations other than long word require that we
- * read the long word, update the proper word or byte, then write the
- * entire long word back.
- *
- * PCI Bridge hack. We assume (correctly) that bus 0 is the primary
- * PCI bus from the QSPAN. If we are called with a bus number other
- * than zero, we create a Type 1 configuration access that a downstream
- * PCI bridge will interpret.
- */
-
-#define __get_qspan_pci_config(x, addr, op) \
- __asm__ __volatile__( \
- "1: "op" %0,0(%1)\n" \
- " eieio\n" \
- "2:\n" \
- ".section .fixup,\"ax\"\n" \
- "3: li %0,-1\n" \
- " b 2b\n" \
- ".section __ex_table,\"a\"\n" \
- " .align 2\n" \
- " .long 1b,3b\n" \
- ".text" \
- : "=r"(x) : "r"(addr) : " %0")
-
-#define QS_CONFIG_ADDR ((volatile uint *)(PCI_CSR_ADDR + 0x500))
-#define QS_CONFIG_DATA ((volatile uint *)(PCI_CSR_ADDR + 0x504))
-
-#define mk_config_addr(bus, dev, offset) \
- (((bus)<<16) | ((dev)<<8) | (offset & 0xfc))
-
-#define mk_config_type1(bus, dev, offset) \
- mk_config_addr(bus, dev, offset) | 1;
-
-static DEFINE_SPINLOCK(pcibios_lock);
-
-int qspan_pcibios_read_config_byte(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned char *val)
-{
- uint temp;
- u_char *cp;
-#ifdef CONFIG_RPXCLASSIC
- unsigned long flags;
-#endif
-
- if ((bus > 7) || (dev_fn > 127)) {
- *val = 0xff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
-
-#ifdef CONFIG_RPXCLASSIC
- /* disable interrupts */
- spin_lock_irqsave(&pcibios_lock, flags);
- *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL;
- eieio();
-#endif
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- __get_qspan_pci_config(temp, QS_CONFIG_DATA, "lwz");
-
-#ifdef CONFIG_RPXCLASSIC
- *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL;
- eieio();
- spin_unlock_irqrestore(&pcibios_lock, flags);
-#endif
-
- offset ^= 0x03;
- cp = ((u_char *)&temp) + (offset & 0x03);
- *val = *cp;
- return PCIBIOS_SUCCESSFUL;
-}
-
-int qspan_pcibios_read_config_word(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned short *val)
-{
- uint temp;
- ushort *sp;
-#ifdef CONFIG_RPXCLASSIC
- unsigned long flags;
-#endif
-
- if ((bus > 7) || (dev_fn > 127)) {
- *val = 0xffff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
-
-#ifdef CONFIG_RPXCLASSIC
- /* disable interrupts */
- spin_lock_irqsave(&pcibios_lock, flags);
- *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL;
- eieio();
-#endif
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- __get_qspan_pci_config(temp, QS_CONFIG_DATA, "lwz");
- offset ^= 0x02;
-
-#ifdef CONFIG_RPXCLASSIC
- *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL;
- eieio();
- spin_unlock_irqrestore(&pcibios_lock, flags);
-#endif
-
- sp = ((ushort *)&temp) + ((offset >> 1) & 1);
- *val = *sp;
- return PCIBIOS_SUCCESSFUL;
-}
-
-int qspan_pcibios_read_config_dword(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned int *val)
-{
-#ifdef CONFIG_RPXCLASSIC
- unsigned long flags;
-#endif
-
- if ((bus > 7) || (dev_fn > 127)) {
- *val = 0xffffffff;
- return PCIBIOS_DEVICE_NOT_FOUND;
- }
-
-#ifdef CONFIG_RPXCLASSIC
- /* disable interrupts */
- spin_lock_irqsave(&pcibios_lock, flags);
- *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL;
- eieio();
-#endif
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- __get_qspan_pci_config(*val, QS_CONFIG_DATA, "lwz");
-
-#ifdef CONFIG_RPXCLASSIC
- *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL;
- eieio();
- spin_unlock_irqrestore(&pcibios_lock, flags);
-#endif
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-int qspan_pcibios_write_config_byte(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned char val)
-{
- uint temp;
- u_char *cp;
-#ifdef CONFIG_RPXCLASSIC
- unsigned long flags;
-#endif
-
- if ((bus > 7) || (dev_fn > 127))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- qspan_pcibios_read_config_dword(bus, dev_fn, offset, &temp);
-
- offset ^= 0x03;
- cp = ((u_char *)&temp) + (offset & 0x03);
- *cp = val;
-
-#ifdef CONFIG_RPXCLASSIC
- /* disable interrupts */
- spin_lock_irqsave(&pcibios_lock, flags);
- *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL;
- eieio();
-#endif
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- *QS_CONFIG_DATA = temp;
-
-#ifdef CONFIG_RPXCLASSIC
- *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL;
- eieio();
- spin_unlock_irqrestore(&pcibios_lock, flags);
-#endif
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-int qspan_pcibios_write_config_word(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned short val)
-{
- uint temp;
- ushort *sp;
-#ifdef CONFIG_RPXCLASSIC
- unsigned long flags;
-#endif
-
- if ((bus > 7) || (dev_fn > 127))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
- qspan_pcibios_read_config_dword(bus, dev_fn, offset, &temp);
-
- offset ^= 0x02;
- sp = ((ushort *)&temp) + ((offset >> 1) & 1);
- *sp = val;
-
-#ifdef CONFIG_RPXCLASSIC
- /* disable interrupts */
- spin_lock_irqsave(&pcibios_lock, flags);
- *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL;
- eieio();
-#endif
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- *QS_CONFIG_DATA = temp;
-
-#ifdef CONFIG_RPXCLASSIC
- *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL;
- eieio();
- spin_unlock_irqrestore(&pcibios_lock, flags);
-#endif
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-int qspan_pcibios_write_config_dword(unsigned char bus, unsigned char dev_fn,
- unsigned char offset, unsigned int val)
-{
-#ifdef CONFIG_RPXCLASSIC
- unsigned long flags;
-#endif
-
- if ((bus > 7) || (dev_fn > 127))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
-#ifdef CONFIG_RPXCLASSIC
- /* disable interrupts */
- spin_lock_irqsave(&pcibios_lock, flags);
- *((uint *)RPX_CSR_ADDR) &= ~BCSR2_QSPACESEL;
- eieio();
-#endif
-
- if (bus == 0)
- *QS_CONFIG_ADDR = mk_config_addr(bus, dev_fn, offset);
- else
- *QS_CONFIG_ADDR = mk_config_type1(bus, dev_fn, offset);
- *(unsigned int *)QS_CONFIG_DATA = val;
-
-#ifdef CONFIG_RPXCLASSIC
- *((uint *)RPX_CSR_ADDR) |= BCSR2_QSPACESEL;
- eieio();
- spin_unlock_irqrestore(&pcibios_lock, flags);
-#endif
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-int qspan_pcibios_find_device(unsigned short vendor, unsigned short dev_id,
- unsigned short index, unsigned char *bus_ptr,
- unsigned char *dev_fn_ptr)
-{
- int num, devfn;
- unsigned int x, vendev;
-
- if (vendor == 0xffff)
- return PCIBIOS_BAD_VENDOR_ID;
- vendev = (dev_id << 16) + vendor;
- num = 0;
- for (devfn = 0; devfn < 32; devfn++) {
- qspan_pcibios_read_config_dword(0, devfn<<3, PCI_VENDOR_ID, &x);
- if (x == vendev) {
- if (index == num) {
- *bus_ptr = 0;
- *dev_fn_ptr = devfn<<3;
- return PCIBIOS_SUCCESSFUL;
- }
- ++num;
- }
- }
- return PCIBIOS_DEVICE_NOT_FOUND;
-}
-
-int qspan_pcibios_find_class(unsigned int class_code, unsigned short index,
- unsigned char *bus_ptr, unsigned char *dev_fn_ptr)
-{
- int devnr, x, num;
-
- num = 0;
- for (devnr = 0; devnr < 32; devnr++) {
- qspan_pcibios_read_config_dword(0, devnr<<3, PCI_CLASS_REVISION, &x);
- if ((x>>8) == class_code) {
- if (index == num) {
- *bus_ptr = 0;
- *dev_fn_ptr = devnr<<3;
- return PCIBIOS_SUCCESSFUL;
- }
- ++num;
- }
- }
- return PCIBIOS_DEVICE_NOT_FOUND;
-}
-
-void __init
-m8xx_pcibios_fixup(void)
-{
- /* Lots to do here, all board and configuration specific. */
-}
-
-void __init
-m8xx_setup_pci_ptrs(void)
-{
- set_config_access_method(qspan);
-
- ppc_md.pcibios_fixup = m8xx_pcibios_fixup;
-}
-
diff --git a/arch/ppc/syslib/todc_time.c b/arch/ppc/syslib/todc_time.c
deleted file mode 100644
index a8168b8..0000000
--- a/arch/ppc/syslib/todc_time.c
+++ /dev/null
@@ -1,511 +0,0 @@
-/*
- * Time of Day Clock support for the M48T35, M48T37, M48T59, and MC146818
- * Real Time Clocks/Timekeepers.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <linux/errno.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/bcd.h>
-#include <linux/mc146818rtc.h>
-
-#include <asm/machdep.h>
-#include <asm/io.h>
-#include <asm/time.h>
-#include <asm/todc.h>
-
-/*
- * Depending on the hardware on your board and your board design, the
- * RTC/NVRAM may be accessed either directly (like normal memory) or via
- * address/data registers. If your board uses the direct method, set
- * 'nvram_data' to the base address of your nvram and leave 'nvram_as0' and
- * 'nvram_as1' NULL. If your board uses address/data regs to access nvram,
- * set 'nvram_as0' to the address of the lower byte, set 'nvram_as1' to the
- * address of the upper byte (leave NULL if using mc146818), and set
- * 'nvram_data' to the address of the 8-bit data register.
- *
- * In order to break the assumption that the RTC and NVRAM are accessed by
- * the same mechanism, you need to explicitly set 'ppc_md.rtc_read_val' and
- * 'ppc_md.rtc_write_val', otherwise the values of 'ppc_md.rtc_read_val'
- * and 'ppc_md.rtc_write_val' will be used.
- *
- * Note: Even though the documentation for the various RTC chips say that it
- * take up to a second before it starts updating once the 'R' bit is
- * cleared, they always seem to update even though we bang on it many
- * times a second. This is true, except for the Dallas Semi 1746/1747
- * (possibly others). Those chips seem to have a real problem whenever
- * we set the 'R' bit before reading them, they basically stop counting.
- * --MAG
- */
-
-/*
- * 'todc_info' should be initialized in your *_setup.c file to
- * point to a fully initialized 'todc_info_t' structure.
- * This structure holds all the register offsets for your particular
- * TODC/RTC chip.
- * TODC_ALLOC()/TODC_INIT() will allocate and initialize this table for you.
- */
-
-#ifdef RTC_FREQ_SELECT
-#undef RTC_FREQ_SELECT
-#define RTC_FREQ_SELECT control_b /* Register A */
-#endif
-
-#ifdef RTC_CONTROL
-#undef RTC_CONTROL
-#define RTC_CONTROL control_a /* Register B */
-#endif
-
-#ifdef RTC_INTR_FLAGS
-#undef RTC_INTR_FLAGS
-#define RTC_INTR_FLAGS watchdog /* Register C */
-#endif
-
-#ifdef RTC_VALID
-#undef RTC_VALID
-#define RTC_VALID interrupts /* Register D */
-#endif
-
-/* Access routines when RTC accessed directly (like normal memory) */
-u_char
-todc_direct_read_val(int addr)
-{
- return readb((void __iomem *)(todc_info->nvram_data + addr));
-}
-
-void
-todc_direct_write_val(int addr, unsigned char val)
-{
- writeb(val, (void __iomem *)(todc_info->nvram_data + addr));
- return;
-}
-
-/* Access routines for accessing m48txx type chips via addr/data regs */
-u_char
-todc_m48txx_read_val(int addr)
-{
- outb(addr, todc_info->nvram_as0);
- outb(addr>>todc_info->as0_bits, todc_info->nvram_as1);
- return inb(todc_info->nvram_data);
-}
-
-void
-todc_m48txx_write_val(int addr, unsigned char val)
-{
- outb(addr, todc_info->nvram_as0);
- outb(addr>>todc_info->as0_bits, todc_info->nvram_as1);
- outb(val, todc_info->nvram_data);
- return;
-}
-
-/* Access routines for accessing mc146818 type chips via addr/data regs */
-u_char
-todc_mc146818_read_val(int addr)
-{
- outb_p(addr, todc_info->nvram_as0);
- return inb_p(todc_info->nvram_data);
-}
-
-void
-todc_mc146818_write_val(int addr, unsigned char val)
-{
- outb_p(addr, todc_info->nvram_as0);
- outb_p(val, todc_info->nvram_data);
-}
-
-
-/*
- * Routines to make RTC chips with NVRAM buried behind an addr/data pair
- * have the NVRAM and clock regs appear at the same level.
- * The NVRAM will appear to start at addr 0 and the clock regs will appear
- * to start immediately after the NVRAM (actually, start at offset
- * todc_info->nvram_size).
- */
-static inline u_char
-todc_read_val(int addr)
-{
- u_char val;
-
- if (todc_info->sw_flags & TODC_FLAG_2_LEVEL_NVRAM) {
- if (addr < todc_info->nvram_size) { /* NVRAM */
- ppc_md.rtc_write_val(todc_info->nvram_addr_reg, addr);
- val = ppc_md.rtc_read_val(todc_info->nvram_data_reg);
- }
- else { /* Clock Reg */
- addr -= todc_info->nvram_size;
- val = ppc_md.rtc_read_val(addr);
- }
- }
- else {
- val = ppc_md.rtc_read_val(addr);
- }
-
- return val;
-}
-
-static inline void
-todc_write_val(int addr, u_char val)
-{
- if (todc_info->sw_flags & TODC_FLAG_2_LEVEL_NVRAM) {
- if (addr < todc_info->nvram_size) { /* NVRAM */
- ppc_md.rtc_write_val(todc_info->nvram_addr_reg, addr);
- ppc_md.rtc_write_val(todc_info->nvram_data_reg, val);
- }
- else { /* Clock Reg */
- addr -= todc_info->nvram_size;
- ppc_md.rtc_write_val(addr, val);
- }
- }
- else {
- ppc_md.rtc_write_val(addr, val);
- }
-}
-
-/*
- * TODC routines
- *
- * There is some ugly stuff in that there are assumptions for the mc146818.
- *
- * Assumptions:
- * - todc_info->control_a has the offset as mc146818 Register B reg
- * - todc_info->control_b has the offset as mc146818 Register A reg
- * - m48txx control reg's write enable or 'W' bit is same as
- * mc146818 Register B 'SET' bit (i.e., 0x80)
- *
- * These assumptions were made to make the code simpler.
- */
-long __init
-todc_time_init(void)
-{
- u_char cntl_b;
-
- if (!ppc_md.rtc_read_val)
- ppc_md.rtc_read_val = ppc_md.nvram_read_val;
- if (!ppc_md.rtc_write_val)
- ppc_md.rtc_write_val = ppc_md.nvram_write_val;
-
- cntl_b = todc_read_val(todc_info->control_b);
-
- if (todc_info->rtc_type == TODC_TYPE_MC146818) {
- if ((cntl_b & 0x70) != 0x20) {
- printk(KERN_INFO "TODC %s %s\n",
- "real-time-clock was stopped.",
- "Now starting...");
- cntl_b &= ~0x70;
- cntl_b |= 0x20;
- }
-
- todc_write_val(todc_info->control_b, cntl_b);
- } else if (todc_info->rtc_type == TODC_TYPE_DS17285) {
- u_char mode;
-
- mode = todc_read_val(TODC_TYPE_DS17285_CNTL_A);
- /* Make sure countdown clear is not set */
- mode &= ~0x40;
- /* Enable oscillator, extended register set */
- mode |= 0x30;
- todc_write_val(TODC_TYPE_DS17285_CNTL_A, mode);
-
- } else if (todc_info->rtc_type == TODC_TYPE_DS1501) {
- u_char month;
-
- todc_info->enable_read = TODC_DS1501_CNTL_B_TE;
- todc_info->enable_write = TODC_DS1501_CNTL_B_TE;
-
- month = todc_read_val(todc_info->month);
-
- if ((month & 0x80) == 0x80) {
- printk(KERN_INFO "TODC %s %s\n",
- "real-time-clock was stopped.",
- "Now starting...");
- month &= ~0x80;
- todc_write_val(todc_info->month, month);
- }
-
- cntl_b &= ~TODC_DS1501_CNTL_B_TE;
- todc_write_val(todc_info->control_b, cntl_b);
- } else { /* must be a m48txx type */
- u_char cntl_a;
-
- todc_info->enable_read = TODC_MK48TXX_CNTL_A_R;
- todc_info->enable_write = TODC_MK48TXX_CNTL_A_W;
-
- cntl_a = todc_read_val(todc_info->control_a);
-
- /* Check & clear STOP bit in control B register */
- if (cntl_b & TODC_MK48TXX_DAY_CB) {
- printk(KERN_INFO "TODC %s %s\n",
- "real-time-clock was stopped.",
- "Now starting...");
-
- cntl_a |= todc_info->enable_write;
- cntl_b &= ~TODC_MK48TXX_DAY_CB;/* Start Oscil */
-
- todc_write_val(todc_info->control_a, cntl_a);
- todc_write_val(todc_info->control_b, cntl_b);
- }
-
- /* Make sure READ & WRITE bits are cleared. */
- cntl_a &= ~(todc_info->enable_write |
- todc_info->enable_read);
- todc_write_val(todc_info->control_a, cntl_a);
- }
-
- return 0;
-}
-
-/*
- * There is some ugly stuff in that there are assumptions that for a mc146818,
- * the todc_info->control_a has the offset of the mc146818 Register B reg and
- * that the register'ss 'SET' bit is the same as the m48txx's write enable
- * bit in the control register of the m48txx (i.e., 0x80).
- *
- * It was done to make the code look simpler.
- */
-ulong
-todc_get_rtc_time(void)
-{
- uint year = 0, mon = 0, day = 0, hour = 0, min = 0, sec = 0;
- uint limit, i;
- u_char save_control, uip = 0;
-
- spin_lock(&rtc_lock);
- save_control = todc_read_val(todc_info->control_a);
-
- if (todc_info->rtc_type != TODC_TYPE_MC146818) {
- limit = 1;
-
- switch (todc_info->rtc_type) {
- case TODC_TYPE_DS1553:
- case TODC_TYPE_DS1557:
- case TODC_TYPE_DS1743:
- case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
- case TODC_TYPE_DS1747:
- case TODC_TYPE_DS17285:
- break;
- default:
- todc_write_val(todc_info->control_a,
- (save_control | todc_info->enable_read));
- }
- }
- else {
- limit = 100000000;
- }
-
- for (i=0; i<limit; i++) {
- if (todc_info->rtc_type == TODC_TYPE_MC146818) {
- uip = todc_read_val(todc_info->RTC_FREQ_SELECT);
- }
-
- sec = todc_read_val(todc_info->seconds) & 0x7f;
- min = todc_read_val(todc_info->minutes) & 0x7f;
- hour = todc_read_val(todc_info->hours) & 0x3f;
- day = todc_read_val(todc_info->day_of_month) & 0x3f;
- mon = todc_read_val(todc_info->month) & 0x1f;
- year = todc_read_val(todc_info->year) & 0xff;
-
- if (todc_info->rtc_type == TODC_TYPE_MC146818) {
- uip |= todc_read_val(todc_info->RTC_FREQ_SELECT);
- if ((uip & RTC_UIP) == 0) break;
- }
- }
-
- if (todc_info->rtc_type != TODC_TYPE_MC146818) {
- switch (todc_info->rtc_type) {
- case TODC_TYPE_DS1553:
- case TODC_TYPE_DS1557:
- case TODC_TYPE_DS1743:
- case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
- case TODC_TYPE_DS1747:
- case TODC_TYPE_DS17285:
- break;
- default:
- save_control &= ~(todc_info->enable_read);
- todc_write_val(todc_info->control_a,
- save_control);
- }
- }
- spin_unlock(&rtc_lock);
-
- if ((todc_info->rtc_type != TODC_TYPE_MC146818) ||
- ((save_control & RTC_DM_BINARY) == 0) ||
- RTC_ALWAYS_BCD) {
-
- BCD_TO_BIN(sec);
- BCD_TO_BIN(min);
- BCD_TO_BIN(hour);
- BCD_TO_BIN(day);
- BCD_TO_BIN(mon);
- BCD_TO_BIN(year);
- }
-
- year = year + 1900;
- if (year < 1970) {
- year += 100;
- }
-
- return mktime(year, mon, day, hour, min, sec);
-}
-
-int
-todc_set_rtc_time(unsigned long nowtime)
-{
- struct rtc_time tm;
- u_char save_control, save_freq_select = 0;
-
- spin_lock(&rtc_lock);
- to_tm(nowtime, &tm);
-
- save_control = todc_read_val(todc_info->control_a);
-
- /* Assuming MK48T59_RTC_CA_WRITE & RTC_SET are equal */
- todc_write_val(todc_info->control_a,
- (save_control | todc_info->enable_write));
- save_control &= ~(todc_info->enable_write); /* in case it was set */
-
- if (todc_info->rtc_type == TODC_TYPE_MC146818) {
- save_freq_select = todc_read_val(todc_info->RTC_FREQ_SELECT);
- todc_write_val(todc_info->RTC_FREQ_SELECT,
- save_freq_select | RTC_DIV_RESET2);
- }
-
-
- tm.tm_year = (tm.tm_year - 1900) % 100;
-
- if ((todc_info->rtc_type != TODC_TYPE_MC146818) ||
- ((save_control & RTC_DM_BINARY) == 0) ||
- RTC_ALWAYS_BCD) {
-
- BIN_TO_BCD(tm.tm_sec);
- BIN_TO_BCD(tm.tm_min);
- BIN_TO_BCD(tm.tm_hour);
- BIN_TO_BCD(tm.tm_mon);
- BIN_TO_BCD(tm.tm_mday);
- BIN_TO_BCD(tm.tm_year);
- }
-
- todc_write_val(todc_info->seconds, tm.tm_sec);
- todc_write_val(todc_info->minutes, tm.tm_min);
- todc_write_val(todc_info->hours, tm.tm_hour);
- todc_write_val(todc_info->month, tm.tm_mon);
- todc_write_val(todc_info->day_of_month, tm.tm_mday);
- todc_write_val(todc_info->year, tm.tm_year);
-
- todc_write_val(todc_info->control_a, save_control);
-
- if (todc_info->rtc_type == TODC_TYPE_MC146818) {
- todc_write_val(todc_info->RTC_FREQ_SELECT, save_freq_select);
- }
- spin_unlock(&rtc_lock);
-
- return 0;
-}
-
-/*
- * Manipulates read bit to reliably read seconds at a high rate.
- */
-static unsigned char __init todc_read_timereg(int addr)
-{
- unsigned char save_control = 0, val;
-
- switch (todc_info->rtc_type) {
- case TODC_TYPE_DS1553:
- case TODC_TYPE_DS1557:
- case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
- case TODC_TYPE_DS1747:
- case TODC_TYPE_DS17285:
- case TODC_TYPE_MC146818:
- break;
- default:
- save_control = todc_read_val(todc_info->control_a);
- todc_write_val(todc_info->control_a,
- (save_control | todc_info->enable_read));
- }
- val = todc_read_val(addr);
-
- switch (todc_info->rtc_type) {
- case TODC_TYPE_DS1553:
- case TODC_TYPE_DS1557:
- case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
- case TODC_TYPE_DS1747:
- case TODC_TYPE_DS17285:
- case TODC_TYPE_MC146818:
- break;
- default:
- save_control &= ~(todc_info->enable_read);
- todc_write_val(todc_info->control_a, save_control);
- }
-
- return val;
-}
-
-/*
- * This was taken from prep_setup.c
- * Use the NVRAM RTC to time a second to calibrate the decrementer.
- */
-void __init
-todc_calibrate_decr(void)
-{
- ulong freq;
- ulong tbl, tbu;
- long i, loop_count;
- u_char sec;
-
- todc_time_init();
-
- /*
- * Actually this is bad for precision, we should have a loop in
- * which we only read the seconds counter. todc_read_val writes
- * the address bytes on every call and this takes a lot of time.
- * Perhaps an nvram_wait_change method returning a time
- * stamp with a loop count as parameter would be the solution.
- */
- /*
- * Need to make sure the tbl doesn't roll over so if tbu increments
- * during this test, we need to do it again.
- */
- loop_count = 0;
-
- sec = todc_read_timereg(todc_info->seconds) & 0x7f;
-
- do {
- tbu = get_tbu();
-
- for (i = 0 ; i < 10000000 ; i++) {/* may take up to 1 second */
- tbl = get_tbl();
-
- if ((todc_read_timereg(todc_info->seconds) & 0x7f) != sec) {
- break;
- }
- }
-
- sec = todc_read_timereg(todc_info->seconds) & 0x7f;
-
- for (i = 0 ; i < 10000000 ; i++) { /* Should take 1 second */
- freq = get_tbl();
-
- if ((todc_read_timereg(todc_info->seconds) & 0x7f) != sec) {
- break;
- }
- }
-
- freq -= tbl;
- } while ((get_tbu() != tbu) && (++loop_count < 2));
-
- printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
- freq/1000000, freq%1000000);
-
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-
- return;
-}
diff --git a/arch/ppc/syslib/virtex_devices.c b/arch/ppc/syslib/virtex_devices.c
deleted file mode 100644
index 7322781..0000000
--- a/arch/ppc/syslib/virtex_devices.c
+++ /dev/null
@@ -1,276 +0,0 @@
-/*
- * Virtex hard ppc405 core common device listing
- *
- * Copyright 2005-2007 Secret Lab Technologies Ltd.
- * Copyright 2005 Freescale Semiconductor Inc.
- * Copyright 2002-2004 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/serial_8250.h>
-#include <syslib/virtex_devices.h>
-#include <platforms/4xx/xparameters/xparameters.h>
-#include <asm/io.h>
-
-/*
- * UARTLITE: shortcut macro for single instance
- */
-#define XPAR_UARTLITE(num) { \
- .name = "uartlite", \
- .id = num, \
- .num_resources = 2, \
- .resource = (struct resource[]) { \
- { \
- .start = XPAR_UARTLITE_##num##_BASEADDR + 3, \
- .end = XPAR_UARTLITE_##num##_HIGHADDR, \
- .flags = IORESOURCE_MEM, \
- }, \
- { \
- .start = XPAR_INTC_0_UARTLITE_##num##_VEC_ID, \
- .flags = IORESOURCE_IRQ, \
- }, \
- }, \
-}
-
-/*
- * Full UART: shortcut macro for single instance + platform data structure
- */
-#define XPAR_UART(num) { \
- .mapbase = XPAR_UARTNS550_##num##_BASEADDR + 3, \
- .irq = XPAR_INTC_0_UARTNS550_##num##_VEC_ID, \
- .iotype = UPIO_MEM, \
- .uartclk = XPAR_UARTNS550_##num##_CLOCK_FREQ_HZ, \
- .flags = UPF_BOOT_AUTOCONF, \
- .regshift = 2, \
-}
-
-/*
- * SystemACE: shortcut macro for single instance
- */
-#define XPAR_SYSACE(num) { \
- .name = "xsysace", \
- .id = XPAR_SYSACE_##num##_DEVICE_ID, \
- .num_resources = 2, \
- .resource = (struct resource[]) { \
- { \
- .start = XPAR_SYSACE_##num##_BASEADDR, \
- .end = XPAR_SYSACE_##num##_HIGHADDR, \
- .flags = IORESOURCE_MEM, \
- }, \
- { \
- .start = XPAR_INTC_0_SYSACE_##num##_VEC_ID, \
- .flags = IORESOURCE_IRQ, \
- }, \
- }, \
-}
-
-/*
- * ML300/ML403 Video Device: shortcut macro for single instance
- */
-#define XPAR_TFT(num) { \
- .name = "xilinxfb", \
- .id = num, \
- .num_resources = 1, \
- .resource = (struct resource[]) { \
- { \
- .start = XPAR_TFT_##num##_BASEADDR, \
- .end = XPAR_TFT_##num##_BASEADDR+7, \
- .flags = IORESOURCE_IO, \
- }, \
- }, \
-}
-
-#define XPAR_AC97_CONTROLLER_REFERENCE(num) { \
- .name = "ml403_ac97cr", \
- .id = num, \
- .num_resources = 3, \
- .resource = (struct resource[]) { \
- { \
- .start = XPAR_OPB_AC97_CONTROLLER_REF_##num##_BASEADDR, \
- .end = XPAR_OPB_AC97_CONTROLLER_REF_##num##_HIGHADDR, \
- .flags = IORESOURCE_MEM, \
- }, \
- { \
- .start = XPAR_INTC_0_AC97_CONTROLLER_REF_##num##_PLAYBACK_VEC_ID, \
- .end = XPAR_INTC_0_AC97_CONTROLLER_REF_##num##_PLAYBACK_VEC_ID, \
- .flags = IORESOURCE_IRQ, \
- }, \
- { \
- .start = XPAR_INTC_0_AC97_CONTROLLER_REF_##num##_RECORD_VEC_ID, \
- .end = XPAR_INTC_0_AC97_CONTROLLER_REF_##num##_RECORD_VEC_ID, \
- .flags = IORESOURCE_IRQ, \
- }, \
- }, \
-}
-
-/* UART 8250 driver platform data table */
-struct plat_serial8250_port virtex_serial_platform_data[] = {
-#if defined(XPAR_UARTNS550_0_BASEADDR)
- XPAR_UART(0),
-#endif
-#if defined(XPAR_UARTNS550_1_BASEADDR)
- XPAR_UART(1),
-#endif
-#if defined(XPAR_UARTNS550_2_BASEADDR)
- XPAR_UART(2),
-#endif
-#if defined(XPAR_UARTNS550_3_BASEADDR)
- XPAR_UART(3),
-#endif
-#if defined(XPAR_UARTNS550_4_BASEADDR)
- XPAR_UART(4),
-#endif
-#if defined(XPAR_UARTNS550_5_BASEADDR)
- XPAR_UART(5),
-#endif
-#if defined(XPAR_UARTNS550_6_BASEADDR)
- XPAR_UART(6),
-#endif
-#if defined(XPAR_UARTNS550_7_BASEADDR)
- XPAR_UART(7),
-#endif
- { }, /* terminated by empty record */
-};
-
-
-struct platform_device virtex_platform_devices[] = {
- /* UARTLITE instances */
-#if defined(XPAR_UARTLITE_0_BASEADDR)
- XPAR_UARTLITE(0),
-#endif
-#if defined(XPAR_UARTLITE_1_BASEADDR)
- XPAR_UARTLITE(1),
-#endif
-#if defined(XPAR_UARTLITE_2_BASEADDR)
- XPAR_UARTLITE(2),
-#endif
-#if defined(XPAR_UARTLITE_3_BASEADDR)
- XPAR_UARTLITE(3),
-#endif
-#if defined(XPAR_UARTLITE_4_BASEADDR)
- XPAR_UARTLITE(4),
-#endif
-#if defined(XPAR_UARTLITE_5_BASEADDR)
- XPAR_UARTLITE(5),
-#endif
-#if defined(XPAR_UARTLITE_6_BASEADDR)
- XPAR_UARTLITE(6),
-#endif
-#if defined(XPAR_UARTLITE_7_BASEADDR)
- XPAR_UARTLITE(7),
-#endif
-
- /* Full UART instances */
-#if defined(XPAR_UARTNS550_0_BASEADDR)
- {
- .name = "serial8250",
- .id = 0,
- .dev.platform_data = virtex_serial_platform_data,
- },
-#endif
-
- /* SystemACE instances */
-#if defined(XPAR_SYSACE_0_BASEADDR)
- XPAR_SYSACE(0),
-#endif
-#if defined(XPAR_SYSACE_1_BASEADDR)
- XPAR_SYSACE(1),
-#endif
-
-#if defined(XPAR_TFT_0_BASEADDR)
- XPAR_TFT(0),
-#endif
-#if defined(XPAR_TFT_1_BASEADDR)
- XPAR_TFT(1),
-#endif
-#if defined(XPAR_TFT_2_BASEADDR)
- XPAR_TFT(2),
-#endif
-#if defined(XPAR_TFT_3_BASEADDR)
- XPAR_TFT(3),
-#endif
-
- /* AC97 Controller Reference instances */
-#if defined(XPAR_OPB_AC97_CONTROLLER_REF_0_BASEADDR)
- XPAR_AC97_CONTROLLER_REFERENCE(0),
-#endif
-#if defined(XPAR_OPB_AC97_CONTROLLER_REF_1_BASEADDR)
- XPAR_AC97_CONTROLLER_REFERENCE(1),
-#endif
-};
-
-/* Early serial support functions */
-static void __init
-virtex_early_serial_init(int num, struct plat_serial8250_port *pdata)
-{
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
- struct uart_port serial_req;
-
- memset(&serial_req, 0, sizeof(serial_req));
- serial_req.mapbase = pdata->mapbase;
- serial_req.membase = pdata->membase;
- serial_req.irq = pdata->irq;
- serial_req.uartclk = pdata->uartclk;
- serial_req.regshift = pdata->regshift;
- serial_req.iotype = pdata->iotype;
- serial_req.flags = pdata->flags;
- gen550_init(num, &serial_req);
-#endif
-}
-
-void __init
-virtex_early_serial_map(void)
-{
-#ifdef CONFIG_SERIAL_8250
- struct plat_serial8250_port *pdata;
- int i = 0;
-
- pdata = virtex_serial_platform_data;
- while(pdata && pdata->flags) {
- pdata->membase = ioremap(pdata->mapbase, 0x100);
- virtex_early_serial_init(i, pdata);
- pdata++;
- i++;
- }
-#endif /* CONFIG_SERIAL_8250 */
-}
-
-/*
- * default fixup routine; do nothing and return success.
- *
- * Reimplement this routine in your custom board support file to
- * override the default behaviour
- */
-int __attribute__ ((weak))
-virtex_device_fixup(struct platform_device *dev)
-{
- return 0;
-}
-
-static int __init virtex_init(void)
-{
- struct platform_device *index = virtex_platform_devices;
- unsigned int ret = 0;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(virtex_platform_devices); i++, index++) {
- if (virtex_device_fixup(index) != 0)
- continue;
-
- if (platform_device_register(index)) {
- ret = 1;
- printk(KERN_ERR "cannot register dev %s:%d\n",
- index->name, index->id);
- }
- }
- return ret;
-}
-
-subsys_initcall(virtex_init);
diff --git a/arch/ppc/syslib/virtex_devices.h b/arch/ppc/syslib/virtex_devices.h
deleted file mode 100644
index 6ebd9b4..0000000
--- a/arch/ppc/syslib/virtex_devices.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * Common support header for virtex ppc405 platforms
- *
- * Copyright 2007 Secret Lab Technologies Ltd.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifndef __ASM_VIRTEX_DEVICES_H__
-#define __ASM_VIRTEX_DEVICES_H__
-
-#include <linux/platform_device.h>
-#include <linux/xilinxfb.h>
-
-void __init virtex_early_serial_map(void);
-
-/* Prototype for device fixup routine. Implement this routine in the
- * board specific fixup code and the generic setup code will call it for
- * each device is the platform device list.
- *
- * If the hook returns a non-zero value, then the device will not get
- * registered with the platform bus
- */
-int virtex_device_fixup(struct platform_device *dev);
-
-/* SPI Controller IP */
-struct xspi_platform_data {
- s16 bus_num;
- u16 num_chipselect;
- u32 speed_hz;
-};
-
-#endif /* __ASM_VIRTEX_DEVICES_H__ */
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
deleted file mode 100644
index 3b82333..0000000
--- a/arch/ppc/syslib/xilinx_pic.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * Interrupt controller driver for Xilinx Virtex-II Pro.
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * 2002-2004 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <asm/io.h>
-#include <platforms/4xx/xparameters/xparameters.h>
-#include <asm/ibm4xx.h>
-#include <asm/machdep.h>
-
-/* No one else should require these constants, so define them locally here. */
-#define ISR 0 /* Interrupt Status Register */
-#define IPR 1 /* Interrupt Pending Register */
-#define IER 2 /* Interrupt Enable Register */
-#define IAR 3 /* Interrupt Acknowledge Register */
-#define SIE 4 /* Set Interrupt Enable bits */
-#define CIE 5 /* Clear Interrupt Enable bits */
-#define IVR 6 /* Interrupt Vector Register */
-#define MER 7 /* Master Enable Register */
-
-#if XPAR_XINTC_USE_DCR == 0
-static volatile u32 *intc;
-#define intc_out_be32(addr, mask) out_be32((addr), (mask))
-#define intc_in_be32(addr) in_be32((addr))
-#else
-#define intc XPAR_INTC_0_BASEADDR
-#define intc_out_be32(addr, mask) mtdcr((addr), (mask))
-#define intc_in_be32(addr) mfdcr((addr))
-#endif
-
-static void
-xilinx_intc_enable(unsigned int irq)
-{
- unsigned long mask = (0x00000001 << (irq & 31));
- pr_debug("enable: %d\n", irq);
- intc_out_be32(intc + SIE, mask);
-}
-
-static void
-xilinx_intc_disable(unsigned int irq)
-{
- unsigned long mask = (0x00000001 << (irq & 31));
- pr_debug("disable: %d\n", irq);
- intc_out_be32(intc + CIE, mask);
-}
-
-static void
-xilinx_intc_disable_and_ack(unsigned int irq)
-{
- unsigned long mask = (0x00000001 << (irq & 31));
- pr_debug("disable_and_ack: %d\n", irq);
- intc_out_be32(intc + CIE, mask);
- if (!(irq_desc[irq].status & IRQ_LEVEL))
- intc_out_be32(intc + IAR, mask); /* ack edge triggered intr */
-}
-
-static void
-xilinx_intc_end(unsigned int irq)
-{
- unsigned long mask = (0x00000001 << (irq & 31));
-
- pr_debug("end: %d\n", irq);
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
- intc_out_be32(intc + SIE, mask);
- /* ack level sensitive intr */
- if (irq_desc[irq].status & IRQ_LEVEL)
- intc_out_be32(intc + IAR, mask);
- }
-}
-
-static struct hw_interrupt_type xilinx_intc = {
- .typename = "Xilinx Interrupt Controller",
- .enable = xilinx_intc_enable,
- .disable = xilinx_intc_disable,
- .ack = xilinx_intc_disable_and_ack,
- .end = xilinx_intc_end,
-};
-
-int
-xilinx_pic_get_irq(void)
-{
- int irq;
-
- /*
- * NOTE: This function is the one that needs to be improved in
- * order to handle multiple interrupt controllers. It currently
- * is hardcoded to check for interrupts only on the first INTC.
- */
-
- irq = intc_in_be32(intc + IVR);
- if (irq != -1)
- irq = irq;
-
- pr_debug("get_irq: %d\n", irq);
-
- return (irq);
-}
-
-void __init
-ppc4xx_pic_init(void)
-{
- int i;
-
- /*
- * NOTE: The assumption here is that NR_IRQS is 32 or less
- * (NR_IRQS is 32 for PowerPC 405 cores by default).
- */
-#if (NR_IRQS > 32)
-#error NR_IRQS > 32 not supported
-#endif
-
-#if XPAR_XINTC_USE_DCR == 0
- intc = ioremap(XPAR_INTC_0_BASEADDR, 32);
-
- printk(KERN_INFO "Xilinx INTC #0 at 0x%08lX mapped to 0x%08lX\n",
- (unsigned long) XPAR_INTC_0_BASEADDR, (unsigned long) intc);
-#else
- printk(KERN_INFO "Xilinx INTC #0 at 0x%08lX (DCR)\n",
- (unsigned long) XPAR_INTC_0_BASEADDR);
-#endif
-
- /*
- * Disable all external interrupts until they are
- * explicitly requested.
- */
- intc_out_be32(intc + IER, 0);
-
- /* Acknowledge any pending interrupts just in case. */
- intc_out_be32(intc + IAR, ~(u32) 0);
-
- /* Turn on the Master Enable. */
- intc_out_be32(intc + MER, 0x3UL);
-
- ppc_md.get_irq = xilinx_pic_get_irq;
-
- for (i = 0; i < NR_IRQS; ++i) {
- irq_desc[i].chip = &xilinx_intc;
-
- if (XPAR_INTC_0_KIND_OF_INTR & (0x00000001 << i))
- irq_desc[i].status &= ~IRQ_LEVEL;
- else
- irq_desc[i].status |= IRQ_LEVEL;
- }
-}
diff --git a/arch/ppc/xmon/Makefile b/arch/ppc/xmon/Makefile
deleted file mode 100644
index 9aa260b..0000000
--- a/arch/ppc/xmon/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-# Makefile for xmon
-
-ifdef CONFIG_8xx
-obj-y := start_8xx.o
-else
-obj-y := start.o
-endif
-obj-y += xmon.o ppc-dis.o ppc-opc.o subr_prf.o setjmp.o
diff --git a/arch/ppc/xmon/ansidecl.h b/arch/ppc/xmon/ansidecl.h
deleted file mode 100644
index c9b9f09..0000000
--- a/arch/ppc/xmon/ansidecl.h
+++ /dev/null
@@ -1,141 +0,0 @@
-/* ANSI and traditional C compatibility macros
- Copyright 1991, 1992 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-/* ANSI and traditional C compatibility macros
-
- ANSI C is assumed if __STDC__ is #defined.
-
- Macro ANSI C definition Traditional C definition
- ----- ---- - ---------- ----------- - ----------
- PTR `void *' `char *'
- LONG_DOUBLE `long double' `double'
- VOLATILE `volatile' `'
- SIGNED `signed' `'
- PTRCONST `void *const' `char *'
- ANSI_PROTOTYPES 1 not defined
-
- CONST is also defined, but is obsolete. Just use const.
-
- DEFUN (name, arglist, args)
-
- Defines function NAME.
-
- ARGLIST lists the arguments, separated by commas and enclosed in
- parentheses. ARGLIST becomes the argument list in traditional C.
-
- ARGS list the arguments with their types. It becomes a prototype in
- ANSI C, and the type declarations in traditional C. Arguments should
- be separated with `AND'. For functions with a variable number of
- arguments, the last thing listed should be `DOTS'.
-
- DEFUN_VOID (name)
-
- Defines a function NAME, which takes no arguments.
-
- obsolete -- EXFUN (name, (prototype)) -- obsolete.
-
- Replaced by PARAMS. Do not use; will disappear someday soon.
- Was used in external function declarations.
- In ANSI C it is `NAME PROTOTYPE' (so PROTOTYPE should be enclosed in
- parentheses). In traditional C it is `NAME()'.
- For a function that takes no arguments, PROTOTYPE should be `(void)'.
-
- PARAMS ((args))
-
- We could use the EXFUN macro to handle prototype declarations, but
- the name is misleading and the result is ugly. So we just define a
- simple macro to handle the parameter lists, as in:
-
- static int foo PARAMS ((int, char));
-
- This produces: `static int foo();' or `static int foo (int, char);'
-
- EXFUN would have done it like this:
-
- static int EXFUN (foo, (int, char));
-
- but the function is not external...and it's hard to visually parse
- the function name out of the mess. EXFUN should be considered
- obsolete; new code should be written to use PARAMS.
-
- For example:
- extern int printf PARAMS ((CONST char *format DOTS));
- int DEFUN(fprintf, (stream, format),
- FILE *stream AND CONST char *format DOTS) { ... }
- void DEFUN_VOID(abort) { ... }
-*/
-
-#ifndef _ANSIDECL_H
-
-#define _ANSIDECL_H 1
-
-
-/* Every source file includes this file,
- so they will all get the switch for lint. */
-/* LINTLIBRARY */
-
-
-#if defined (__STDC__) || defined (_AIX) || (defined (__mips) && defined (_SYSTYPE_SVR4)) || defined(WIN32)
-/* All known AIX compilers implement these things (but don't always
- define __STDC__). The RISC/OS MIPS compiler defines these things
- in SVR4 mode, but does not define __STDC__. */
-
-#define PTR void *
-#define PTRCONST void *CONST
-#define LONG_DOUBLE long double
-
-#define AND ,
-#define NOARGS void
-#define CONST const
-#define VOLATILE volatile
-#define SIGNED signed
-#define DOTS , ...
-
-#define EXFUN(name, proto) name proto
-#define DEFUN(name, arglist, args) name(args)
-#define DEFUN_VOID(name) name(void)
-
-#define PROTO(type, name, arglist) type name arglist
-#define PARAMS(paramlist) paramlist
-#define ANSI_PROTOTYPES 1
-
-#else /* Not ANSI C. */
-
-#define PTR char *
-#define PTRCONST PTR
-#define LONG_DOUBLE double
-
-#define AND ;
-#define NOARGS
-#define CONST
-#ifndef const /* some systems define it in header files for non-ansi mode */
-#define const
-#endif
-#define VOLATILE
-#define SIGNED
-#define DOTS
-
-#define EXFUN(name, proto) name()
-#define DEFUN(name, arglist, args) name arglist args;
-#define DEFUN_VOID(name) name()
-#define PROTO(type, name, arglist) type name ()
-#define PARAMS(paramlist) ()
-
-#endif /* ANSI C. */
-
-#endif /* ansidecl.h */
diff --git a/arch/ppc/xmon/nonstdio.h b/arch/ppc/xmon/nonstdio.h
deleted file mode 100644
index 0240bc5..0000000
--- a/arch/ppc/xmon/nonstdio.h
+++ /dev/null
@@ -1,22 +0,0 @@
-typedef int FILE;
-extern FILE *xmon_stdin, *xmon_stdout;
-#define EOF (-1)
-#define stdin xmon_stdin
-#define stdout xmon_stdout
-#define printf xmon_printf
-#define fprintf xmon_fprintf
-#define fputs xmon_fputs
-#define fgets xmon_fgets
-#define putchar xmon_putchar
-#define getchar xmon_getchar
-#define putc xmon_putc
-#define getc xmon_getc
-#define fopen(n, m) NULL
-#define fflush(f) do {} while (0)
-#define fclose(f) do {} while (0)
-extern char *fgets(char *, int, void *);
-extern void xmon_fprintf(void *, const char *, ...);
-extern void xmon_sprintf(char *, const char *, ...);
-extern void xmon_puts(char*);
-
-#define perror(s) printf("%s: no files!\n", (s))
diff --git a/arch/ppc/xmon/ppc-dis.c b/arch/ppc/xmon/ppc-dis.c
deleted file mode 100644
index 798ac1a..0000000
--- a/arch/ppc/xmon/ppc-dis.c
+++ /dev/null
@@ -1,190 +0,0 @@
-/* ppc-dis.c -- Disassemble PowerPC instructions
- Copyright 1994 Free Software Foundation, Inc.
- Written by Ian Lance Taylor, Cygnus Support
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-2, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include "nonstdio.h"
-#include "ansidecl.h"
-#include "ppc.h"
-
-static int print_insn_powerpc PARAMS ((FILE *, unsigned long insn,
- unsigned memaddr, int dialect));
-
-extern void print_address PARAMS((unsigned memaddr));
-
-/* Print a big endian PowerPC instruction. For convenience, also
- disassemble instructions supported by the Motorola PowerPC 601. */
-
-int
-print_insn_big_powerpc (FILE *out, unsigned long insn, unsigned memaddr)
-{
- return print_insn_powerpc (out, insn, memaddr,
- PPC_OPCODE_PPC | PPC_OPCODE_601);
-}
-
-/* Print a PowerPC or POWER instruction. */
-
-static int
-print_insn_powerpc (FILE *out, unsigned long insn, unsigned memaddr,
- int dialect)
-{
- const struct powerpc_opcode *opcode;
- const struct powerpc_opcode *opcode_end;
- unsigned long op;
-
- /* Get the major opcode of the instruction. */
- op = PPC_OP (insn);
-
- /* Find the first match in the opcode table. We could speed this up
- a bit by doing a binary search on the major opcode. */
- opcode_end = powerpc_opcodes + powerpc_num_opcodes;
- for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++)
- {
- unsigned long table_op;
- const unsigned char *opindex;
- const struct powerpc_operand *operand;
- int invalid;
- int need_comma;
- int need_paren;
-
- table_op = PPC_OP (opcode->opcode);
- if (op < table_op)
- break;
- if (op > table_op)
- continue;
-
- if ((insn & opcode->mask) != opcode->opcode
- || (opcode->flags & dialect) == 0)
- continue;
-
- /* Make two passes over the operands. First see if any of them
- have extraction functions, and, if they do, make sure the
- instruction is valid. */
- invalid = 0;
- for (opindex = opcode->operands; *opindex != 0; opindex++)
- {
- operand = powerpc_operands + *opindex;
- if (operand->extract)
- (*operand->extract) (insn, &invalid);
- }
- if (invalid)
- continue;
-
- /* The instruction is valid. */
- fprintf(out, "%s", opcode->name);
- if (opcode->operands[0] != 0)
- fprintf(out, "\t");
-
- /* Now extract and print the operands. */
- need_comma = 0;
- need_paren = 0;
- for (opindex = opcode->operands; *opindex != 0; opindex++)
- {
- long value;
-
- operand = powerpc_operands + *opindex;
-
- /* Operands that are marked FAKE are simply ignored. We
- already made sure that the extract function considered
- the instruction to be valid. */
- if ((operand->flags & PPC_OPERAND_FAKE) != 0)
- continue;
-
- /* Extract the value from the instruction. */
- if (operand->extract)
- value = (*operand->extract) (insn, (int *) 0);
- else
- {
- value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
- if ((operand->flags & PPC_OPERAND_SIGNED) != 0
- && (value & (1 << (operand->bits - 1))) != 0)
- value -= 1 << operand->bits;
- }
-
- /* If the operand is optional, and the value is zero, don't
- print anything. */
- if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
- && (operand->flags & PPC_OPERAND_NEXT) == 0
- && value == 0)
- continue;
-
- if (need_comma)
- {
- fprintf(out, ",");
- need_comma = 0;
- }
-
- /* Print the operand as directed by the flags. */
- if ((operand->flags & PPC_OPERAND_GPR) != 0)
- fprintf(out, "r%ld", value);
- else if ((operand->flags & PPC_OPERAND_FPR) != 0)
- fprintf(out, "f%ld", value);
- else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
- print_address (memaddr + value);
- else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
- print_address (value & 0xffffffff);
- else if ((operand->flags & PPC_OPERAND_CR) == 0
- || (dialect & PPC_OPCODE_PPC) == 0)
- fprintf(out, "%ld", value);
- else
- {
- if (operand->bits == 3)
- fprintf(out, "cr%d", value);
- else
- {
- static const char *cbnames[4] = { "lt", "gt", "eq", "so" };
- int cr;
- int cc;
-
- cr = value >> 2;
- if (cr != 0)
- fprintf(out, "4*cr%d", cr);
- cc = value & 3;
- if (cc != 0)
- {
- if (cr != 0)
- fprintf(out, "+");
- fprintf(out, "%s", cbnames[cc]);
- }
- }
- }
-
- if (need_paren)
- {
- fprintf(out, ")");
- need_paren = 0;
- }
-
- if ((operand->flags & PPC_OPERAND_PARENS) == 0)
- need_comma = 1;
- else
- {
- fprintf(out, "(");
- need_paren = 1;
- }
- }
-
- /* We have found and printed an instruction; return. */
- return 4;
- }
-
- /* We could not find a match. */
- fprintf(out, ".long 0x%lx", insn);
-
- return 4;
-}
diff --git a/arch/ppc/xmon/ppc-opc.c b/arch/ppc/xmon/ppc-opc.c
deleted file mode 100644
index 034313c..0000000
--- a/arch/ppc/xmon/ppc-opc.c
+++ /dev/null
@@ -1,2720 +0,0 @@
-/* ppc-opc.c -- PowerPC opcode list
- Copyright 1994 Free Software Foundation, Inc.
- Written by Ian Lance Taylor, Cygnus Support
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-2, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#include <linux/posix_types.h>
-#include <linux/kernel.h>
-#include "ansidecl.h"
-#include "ppc.h"
-
-/* This file holds the PowerPC opcode table. The opcode table
- includes almost all of the extended instruction mnemonics. This
- permits the disassembler to use them, and simplifies the assembler
- logic, at the cost of increasing the table size. The table is
- strictly constant data, so the compiler should be able to put it in
- the .text section.
-
- This file also holds the operand table. All knowledge about
- inserting operands into instructions and vice-versa is kept in this
- file. */
-
-/* Local insertion and extraction functions. */
-
-static unsigned long insert_bat PARAMS ((unsigned long, long, const char **));
-static long extract_bat PARAMS ((unsigned long, int *));
-static unsigned long insert_bba PARAMS ((unsigned long, long, const char **));
-static long extract_bba PARAMS ((unsigned long, int *));
-static unsigned long insert_bd PARAMS ((unsigned long, long, const char **));
-static long extract_bd PARAMS ((unsigned long, int *));
-static unsigned long insert_bdm PARAMS ((unsigned long, long, const char **));
-static long extract_bdm PARAMS ((unsigned long, int *));
-static unsigned long insert_bdp PARAMS ((unsigned long, long, const char **));
-static long extract_bdp PARAMS ((unsigned long, int *));
-static unsigned long insert_bo PARAMS ((unsigned long, long, const char **));
-static long extract_bo PARAMS ((unsigned long, int *));
-static unsigned long insert_boe PARAMS ((unsigned long, long, const char **));
-static long extract_boe PARAMS ((unsigned long, int *));
-static unsigned long insert_ds PARAMS ((unsigned long, long, const char **));
-static long extract_ds PARAMS ((unsigned long, int *));
-static unsigned long insert_li PARAMS ((unsigned long, long, const char **));
-static long extract_li PARAMS ((unsigned long, int *));
-static unsigned long insert_mbe PARAMS ((unsigned long, long, const char **));
-static long extract_mbe PARAMS ((unsigned long, int *));
-static unsigned long insert_mb6 PARAMS ((unsigned long, long, const char **));
-static long extract_mb6 PARAMS ((unsigned long, int *));
-static unsigned long insert_nb PARAMS ((unsigned long, long, const char **));
-static long extract_nb PARAMS ((unsigned long, int *));
-static unsigned long insert_nsi PARAMS ((unsigned long, long, const char **));
-static long extract_nsi PARAMS ((unsigned long, int *));
-static unsigned long insert_ral PARAMS ((unsigned long, long, const char **));
-static unsigned long insert_ram PARAMS ((unsigned long, long, const char **));
-static unsigned long insert_ras PARAMS ((unsigned long, long, const char **));
-static unsigned long insert_rbs PARAMS ((unsigned long, long, const char **));
-static long extract_rbs PARAMS ((unsigned long, int *));
-static unsigned long insert_sh6 PARAMS ((unsigned long, long, const char **));
-static long extract_sh6 PARAMS ((unsigned long, int *));
-static unsigned long insert_spr PARAMS ((unsigned long, long, const char **));
-static long extract_spr PARAMS ((unsigned long, int *));
-static unsigned long insert_tbr PARAMS ((unsigned long, long, const char **));
-static long extract_tbr PARAMS ((unsigned long, int *));
-
-/* The operands table.
-
- The fields are bits, shift, signed, insert, extract, flags. */
-
-const struct powerpc_operand powerpc_operands[] =
-{
- /* The zero index is used to indicate the end of the list of
- operands. */
-#define UNUSED (0)
- { 0, 0, NULL, NULL, 0 },
-
- /* The BA field in an XL form instruction. */
-#define BA (1)
-#define BA_MASK (0x1f << 16)
- { 5, 16, NULL, NULL, PPC_OPERAND_CR },
-
- /* The BA field in an XL form instruction when it must be the same
- as the BT field in the same instruction. */
-#define BAT (2)
- { 5, 16, insert_bat, extract_bat, PPC_OPERAND_FAKE },
-
- /* The BB field in an XL form instruction. */
-#define BB (3)
-#define BB_MASK (0x1f << 11)
- { 5, 11, NULL, NULL, PPC_OPERAND_CR },
-
- /* The BB field in an XL form instruction when it must be the same
- as the BA field in the same instruction. */
-#define BBA (4)
- { 5, 11, insert_bba, extract_bba, PPC_OPERAND_FAKE },
-
- /* The BD field in a B form instruction. The lower two bits are
- forced to zero. */
-#define BD (5)
- { 16, 0, insert_bd, extract_bd, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
-
- /* The BD field in a B form instruction when absolute addressing is
- used. */
-#define BDA (6)
- { 16, 0, insert_bd, extract_bd, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
-
- /* The BD field in a B form instruction when the - modifier is used.
- This sets the y bit of the BO field appropriately. */
-#define BDM (7)
- { 16, 0, insert_bdm, extract_bdm,
- PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
-
- /* The BD field in a B form instruction when the - modifier is used
- and absolute address is used. */
-#define BDMA (8)
- { 16, 0, insert_bdm, extract_bdm,
- PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
-
- /* The BD field in a B form instruction when the + modifier is used.
- This sets the y bit of the BO field appropriately. */
-#define BDP (9)
- { 16, 0, insert_bdp, extract_bdp,
- PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
-
- /* The BD field in a B form instruction when the + modifier is used
- and absolute addressing is used. */
-#define BDPA (10)
- { 16, 0, insert_bdp, extract_bdp,
- PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
-
- /* The BF field in an X or XL form instruction. */
-#define BF (11)
- { 3, 23, NULL, NULL, PPC_OPERAND_CR },
-
- /* An optional BF field. This is used for comparison instructions,
- in which an omitted BF field is taken as zero. */
-#define OBF (12)
- { 3, 23, NULL, NULL, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
-
- /* The BFA field in an X or XL form instruction. */
-#define BFA (13)
- { 3, 18, NULL, NULL, PPC_OPERAND_CR },
-
- /* The BI field in a B form or XL form instruction. */
-#define BI (14)
-#define BI_MASK (0x1f << 16)
- { 5, 16, NULL, NULL, PPC_OPERAND_CR },
-
- /* The BO field in a B form instruction. Certain values are
- illegal. */
-#define BO (15)
-#define BO_MASK (0x1f << 21)
- { 5, 21, insert_bo, extract_bo, 0 },
-
- /* The BO field in a B form instruction when the + or - modifier is
- used. This is like the BO field, but it must be even. */
-#define BOE (16)
- { 5, 21, insert_boe, extract_boe, 0 },
-
- /* The BT field in an X or XL form instruction. */
-#define BT (17)
- { 5, 21, NULL, NULL, PPC_OPERAND_CR },
-
- /* The condition register number portion of the BI field in a B form
- or XL form instruction. This is used for the extended
- conditional branch mnemonics, which set the lower two bits of the
- BI field. This field is optional. */
-#define CR (18)
- { 3, 18, NULL, NULL, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
-
- /* The D field in a D form instruction. This is a displacement off
- a register, and implies that the next operand is a register in
- parentheses. */
-#define D (19)
- { 16, 0, NULL, NULL, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
-
- /* The DS field in a DS form instruction. This is like D, but the
- lower two bits are forced to zero. */
-#define DS (20)
- { 16, 0, insert_ds, extract_ds, PPC_OPERAND_PARENS | PPC_OPERAND_SIGNED },
-
- /* The FL1 field in a POWER SC form instruction. */
-#define FL1 (21)
- { 4, 12, NULL, NULL, 0 },
-
- /* The FL2 field in a POWER SC form instruction. */
-#define FL2 (22)
- { 3, 2, NULL, NULL, 0 },
-
- /* The FLM field in an XFL form instruction. */
-#define FLM (23)
- { 8, 17, NULL, NULL, 0 },
-
- /* The FRA field in an X or A form instruction. */
-#define FRA (24)
-#define FRA_MASK (0x1f << 16)
- { 5, 16, NULL, NULL, PPC_OPERAND_FPR },
-
- /* The FRB field in an X or A form instruction. */
-#define FRB (25)
-#define FRB_MASK (0x1f << 11)
- { 5, 11, NULL, NULL, PPC_OPERAND_FPR },
-
- /* The FRC field in an A form instruction. */
-#define FRC (26)
-#define FRC_MASK (0x1f << 6)
- { 5, 6, NULL, NULL, PPC_OPERAND_FPR },
-
- /* The FRS field in an X form instruction or the FRT field in a D, X
- or A form instruction. */
-#define FRS (27)
-#define FRT (FRS)
- { 5, 21, NULL, NULL, PPC_OPERAND_FPR },
-
- /* The FXM field in an XFX instruction. */
-#define FXM (28)
-#define FXM_MASK (0xff << 12)
- { 8, 12, NULL, NULL, 0 },
-
- /* The L field in a D or X form instruction. */
-#define L (29)
- { 1, 21, NULL, NULL, PPC_OPERAND_OPTIONAL },
-
- /* The LEV field in a POWER SC form instruction. */
-#define LEV (30)
- { 7, 5, NULL, NULL, 0 },
-
- /* The LI field in an I form instruction. The lower two bits are
- forced to zero. */
-#define LI (31)
- { 26, 0, insert_li, extract_li, PPC_OPERAND_RELATIVE | PPC_OPERAND_SIGNED },
-
- /* The LI field in an I form instruction when used as an absolute
- address. */
-#define LIA (32)
- { 26, 0, insert_li, extract_li, PPC_OPERAND_ABSOLUTE | PPC_OPERAND_SIGNED },
-
- /* The MB field in an M form instruction. */
-#define MB (33)
-#define MB_MASK (0x1f << 6)
- { 5, 6, NULL, NULL, 0 },
-
- /* The ME field in an M form instruction. */
-#define ME (34)
-#define ME_MASK (0x1f << 1)
- { 5, 1, NULL, NULL, 0 },
-
- /* The MB and ME fields in an M form instruction expressed a single
- operand which is a bitmask indicating which bits to select. This
- is a two operand form using PPC_OPERAND_NEXT. See the
- description in opcode/ppc.h for what this means. */
-#define MBE (35)
- { 5, 6, NULL, NULL, PPC_OPERAND_OPTIONAL | PPC_OPERAND_NEXT },
- { 32, 0, insert_mbe, extract_mbe, 0 },
-
- /* The MB or ME field in an MD or MDS form instruction. The high
- bit is wrapped to the low end. */
-#define MB6 (37)
-#define ME6 (MB6)
-#define MB6_MASK (0x3f << 5)
- { 6, 5, insert_mb6, extract_mb6, 0 },
-
- /* The NB field in an X form instruction. The value 32 is stored as
- 0. */
-#define NB (38)
- { 6, 11, insert_nb, extract_nb, 0 },
-
- /* The NSI field in a D form instruction. This is the same as the
- SI field, only negated. */
-#define NSI (39)
- { 16, 0, insert_nsi, extract_nsi,
- PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED },
-
- /* The RA field in an D, DS, X, XO, M, or MDS form instruction. */
-#define RA (40)
-#define RA_MASK (0x1f << 16)
- { 5, 16, NULL, NULL, PPC_OPERAND_GPR },
-
- /* The RA field in a D or X form instruction which is an updating
- load, which means that the RA field may not be zero and may not
- equal the RT field. */
-#define RAL (41)
- { 5, 16, insert_ral, NULL, PPC_OPERAND_GPR },
-
- /* The RA field in an lmw instruction, which has special value
- restrictions. */
-#define RAM (42)
- { 5, 16, insert_ram, NULL, PPC_OPERAND_GPR },
-
- /* The RA field in a D or X form instruction which is an updating
- store or an updating floating point load, which means that the RA
- field may not be zero. */
-#define RAS (43)
- { 5, 16, insert_ras, NULL, PPC_OPERAND_GPR },
-
- /* The RB field in an X, XO, M, or MDS form instruction. */
-#define RB (44)
-#define RB_MASK (0x1f << 11)
- { 5, 11, NULL, NULL, PPC_OPERAND_GPR },
-
- /* The RB field in an X form instruction when it must be the same as
- the RS field in the instruction. This is used for extended
- mnemonics like mr. */
-#define RBS (45)
- { 5, 1, insert_rbs, extract_rbs, PPC_OPERAND_FAKE },
-
- /* The RS field in a D, DS, X, XFX, XS, M, MD or MDS form
- instruction or the RT field in a D, DS, X, XFX or XO form
- instruction. */
-#define RS (46)
-#define RT (RS)
-#define RT_MASK (0x1f << 21)
- { 5, 21, NULL, NULL, PPC_OPERAND_GPR },
-
- /* The SH field in an X or M form instruction. */
-#define SH (47)
-#define SH_MASK (0x1f << 11)
- { 5, 11, NULL, NULL, 0 },
-
- /* The SH field in an MD form instruction. This is split. */
-#define SH6 (48)
-#define SH6_MASK ((0x1f << 11) | (1 << 1))
- { 6, 1, insert_sh6, extract_sh6, 0 },
-
- /* The SI field in a D form instruction. */
-#define SI (49)
- { 16, 0, NULL, NULL, PPC_OPERAND_SIGNED },
-
- /* The SI field in a D form instruction when we accept a wide range
- of positive values. */
-#define SISIGNOPT (50)
- { 16, 0, NULL, NULL, PPC_OPERAND_SIGNED | PPC_OPERAND_SIGNOPT },
-
- /* The SPR field in an XFX form instruction. This is flipped--the
- lower 5 bits are stored in the upper 5 and vice- versa. */
-#define SPR (51)
-#define SPR_MASK (0x3ff << 11)
- { 10, 11, insert_spr, extract_spr, 0 },
-
- /* The BAT index number in an XFX form m[ft]ibat[lu] instruction. */
-#define SPRBAT (52)
-#define SPRBAT_MASK (0x3 << 17)
- { 2, 17, NULL, NULL, 0 },
-
- /* The SPRG register number in an XFX form m[ft]sprg instruction. */
-#define SPRG (53)
-#define SPRG_MASK (0x3 << 16)
- { 2, 16, NULL, NULL, 0 },
-
- /* The SR field in an X form instruction. */
-#define SR (54)
- { 4, 16, NULL, NULL, 0 },
-
- /* The SV field in a POWER SC form instruction. */
-#define SV (55)
- { 14, 2, NULL, NULL, 0 },
-
- /* The TBR field in an XFX form instruction. This is like the SPR
- field, but it is optional. */
-#define TBR (56)
- { 10, 11, insert_tbr, extract_tbr, PPC_OPERAND_OPTIONAL },
-
- /* The TO field in a D or X form instruction. */
-#define TO (57)
-#define TO_MASK (0x1f << 21)
- { 5, 21, NULL, NULL, 0 },
-
- /* The U field in an X form instruction. */
-#define U (58)
- { 4, 12, NULL, NULL, 0 },
-
- /* The UI field in a D form instruction. */
-#define UI (59)
- { 16, 0, NULL, NULL, 0 },
-};
-
-/* The functions used to insert and extract complicated operands. */
-
-/* The BA field in an XL form instruction when it must be the same as
- the BT field in the same instruction. This operand is marked FAKE.
- The insertion function just copies the BT field into the BA field,
- and the extraction function just checks that the fields are the
- same. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_bat(unsigned long insn, long value, const char **errmsg)
-{
- return insn | (((insn >> 21) & 0x1f) << 16);
-}
-
-static long
-extract_bat(unsigned long insn, int *invalid)
-{
- if (invalid != (int *) NULL
- && ((insn >> 21) & 0x1f) != ((insn >> 16) & 0x1f))
- *invalid = 1;
- return 0;
-}
-
-/* The BB field in an XL form instruction when it must be the same as
- the BA field in the same instruction. This operand is marked FAKE.
- The insertion function just copies the BA field into the BB field,
- and the extraction function just checks that the fields are the
- same. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_bba(unsigned long insn, long value, const char **errmsg)
-{
- return insn | (((insn >> 16) & 0x1f) << 11);
-}
-
-static long
-extract_bba(unsigned long insn, int *invalid)
-{
- if (invalid != (int *) NULL
- && ((insn >> 16) & 0x1f) != ((insn >> 11) & 0x1f))
- *invalid = 1;
- return 0;
-}
-
-/* The BD field in a B form instruction. The lower two bits are
- forced to zero. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_bd(unsigned long insn, long value, const char **errmsg)
-{
- return insn | (value & 0xfffc);
-}
-
-/*ARGSUSED*/
-static long
-extract_bd(unsigned long insn, int *invalid)
-{
- if ((insn & 0x8000) != 0)
- return (insn & 0xfffc) - 0x10000;
- else
- return insn & 0xfffc;
-}
-
-/* The BD field in a B form instruction when the - modifier is used.
- This modifier means that the branch is not expected to be taken.
- We must set the y bit of the BO field to 1 if the offset is
- negative. When extracting, we require that the y bit be 1 and that
- the offset be positive, since if the y bit is 0 we just want to
- print the normal form of the instruction. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_bdm(unsigned long insn, long value, const char **errmsg)
-{
- if ((value & 0x8000) != 0)
- insn |= 1 << 21;
- return insn | (value & 0xfffc);
-}
-
-static long
-extract_bdm(unsigned long insn, int *invalid)
-{
- if (invalid != (int *) NULL
- && ((insn & (1 << 21)) == 0
- || (insn & (1 << 15)) == 0))
- *invalid = 1;
- if ((insn & 0x8000) != 0)
- return (insn & 0xfffc) - 0x10000;
- else
- return insn & 0xfffc;
-}
-
-/* The BD field in a B form instruction when the + modifier is used.
- This is like BDM, above, except that the branch is expected to be
- taken. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_bdp(unsigned long insn, long value, const char **errmsg)
-{
- if ((value & 0x8000) == 0)
- insn |= 1 << 21;
- return insn | (value & 0xfffc);
-}
-
-static long
-extract_bdp(unsigned long insn, int *invalid)
-{
- if (invalid != (int *) NULL
- && ((insn & (1 << 21)) == 0
- || (insn & (1 << 15)) != 0))
- *invalid = 1;
- if ((insn & 0x8000) != 0)
- return (insn & 0xfffc) - 0x10000;
- else
- return insn & 0xfffc;
-}
-
-/* Check for legal values of a BO field. */
-
-static int
-valid_bo (long value)
-{
- /* Certain encodings have bits that are required to be zero. These
- are (z must be zero, y may be anything):
- 001zy
- 011zy
- 1z00y
- 1z01y
- 1z1zz
- */
- switch (value & 0x14)
- {
- default:
- case 0:
- return 1;
- case 0x4:
- return (value & 0x2) == 0;
- case 0x10:
- return (value & 0x8) == 0;
- case 0x14:
- return value == 0x14;
- }
-}
-
-/* The BO field in a B form instruction. Warn about attempts to set
- the field to an illegal value. */
-
-static unsigned long
-insert_bo(unsigned long insn, long value, const char **errmsg)
-{
- if (errmsg != (const char **) NULL
- && ! valid_bo (value))
- *errmsg = "invalid conditional option";
- return insn | ((value & 0x1f) << 21);
-}
-
-static long
-extract_bo(unsigned long insn, int *invalid)
-{
- long value;
-
- value = (insn >> 21) & 0x1f;
- if (invalid != (int *) NULL
- && ! valid_bo (value))
- *invalid = 1;
- return value;
-}
-
-/* The BO field in a B form instruction when the + or - modifier is
- used. This is like the BO field, but it must be even. When
- extracting it, we force it to be even. */
-
-static unsigned long
-insert_boe(unsigned long insn, long value, const char **errmsg)
-{
- if (errmsg != (const char **) NULL)
- {
- if (! valid_bo (value))
- *errmsg = "invalid conditional option";
- else if ((value & 1) != 0)
- *errmsg = "attempt to set y bit when using + or - modifier";
- }
- return insn | ((value & 0x1f) << 21);
-}
-
-static long
-extract_boe(unsigned long insn, int *invalid)
-{
- long value;
-
- value = (insn >> 21) & 0x1f;
- if (invalid != (int *) NULL
- && ! valid_bo (value))
- *invalid = 1;
- return value & 0x1e;
-}
-
-/* The DS field in a DS form instruction. This is like D, but the
- lower two bits are forced to zero. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_ds(unsigned long insn, long value, const char **errmsg)
-{
- return insn | (value & 0xfffc);
-}
-
-/*ARGSUSED*/
-static long
-extract_ds(unsigned long insn, int *invalid)
-{
- if ((insn & 0x8000) != 0)
- return (insn & 0xfffc) - 0x10000;
- else
- return insn & 0xfffc;
-}
-
-/* The LI field in an I form instruction. The lower two bits are
- forced to zero. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_li(unsigned long insn, long value, const char **errmsg)
-{
- return insn | (value & 0x3fffffc);
-}
-
-/*ARGSUSED*/
-static long
-extract_li(unsigned long insn, int *invalid)
-{
- if ((insn & 0x2000000) != 0)
- return (insn & 0x3fffffc) - 0x4000000;
- else
- return insn & 0x3fffffc;
-}
-
-/* The MB and ME fields in an M form instruction expressed as a single
- operand which is itself a bitmask. The extraction function always
- marks it as invalid, since we never want to recognize an
- instruction which uses a field of this type. */
-
-static unsigned long
-insert_mbe(unsigned long insn, long value, const char **errmsg)
-{
- unsigned long uval;
- int mb, me;
-
- uval = value;
-
- if (uval == 0)
- {
- if (errmsg != (const char **) NULL)
- *errmsg = "illegal bitmask";
- return insn;
- }
-
- me = 31;
- while ((uval & 1) == 0)
- {
- uval >>= 1;
- --me;
- }
-
- mb = me;
- uval >>= 1;
- while ((uval & 1) != 0)
- {
- uval >>= 1;
- --mb;
- }
-
- if (uval != 0)
- {
- if (errmsg != (const char **) NULL)
- *errmsg = "illegal bitmask";
- }
-
- return insn | (mb << 6) | (me << 1);
-}
-
-static long
-extract_mbe(unsigned long insn, int *invalid)
-{
- long ret;
- int mb, me;
- int i;
-
- if (invalid != (int *) NULL)
- *invalid = 1;
-
- ret = 0;
- mb = (insn >> 6) & 0x1f;
- me = (insn >> 1) & 0x1f;
- for (i = mb; i < me; i++)
- ret |= 1 << (31 - i);
- return ret;
-}
-
-/* The MB or ME field in an MD or MDS form instruction. The high bit
- is wrapped to the low end. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_mb6(unsigned long insn, long value, const char **errmsg)
-{
- return insn | ((value & 0x1f) << 6) | (value & 0x20);
-}
-
-/*ARGSUSED*/
-static long
-extract_mb6(unsigned long insn, int *invalid)
-{
- return ((insn >> 6) & 0x1f) | (insn & 0x20);
-}
-
-/* The NB field in an X form instruction. The value 32 is stored as
- 0. */
-
-static unsigned long
-insert_nb(unsigned long insn, long value, const char **errmsg)
-{
- if (value < 0 || value > 32)
- *errmsg = "value out of range";
- if (value == 32)
- value = 0;
- return insn | ((value & 0x1f) << 11);
-}
-
-/*ARGSUSED*/
-static long
-extract_nb(unsigned long insn, int *invalid)
-{
- long ret;
-
- ret = (insn >> 11) & 0x1f;
- if (ret == 0)
- ret = 32;
- return ret;
-}
-
-/* The NSI field in a D form instruction. This is the same as the SI
- field, only negated. The extraction function always marks it as
- invalid, since we never want to recognize an instruction which uses
- a field of this type. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_nsi(unsigned long insn, long value, const char **errmsg)
-{
- return insn | ((- value) & 0xffff);
-}
-
-static long
-extract_nsi(unsigned long insn, int *invalid)
-{
- if (invalid != (int *) NULL)
- *invalid = 1;
- if ((insn & 0x8000) != 0)
- return - ((insn & 0xffff) - 0x10000);
- else
- return - (insn & 0xffff);
-}
-
-/* The RA field in a D or X form instruction which is an updating
- load, which means that the RA field may not be zero and may not
- equal the RT field. */
-
-static unsigned long
-insert_ral(unsigned long insn, long value, const char **errmsg)
-{
- if (value == 0
- || value == ((insn >> 21) & 0x1f))
- *errmsg = "invalid register operand when updating";
- return insn | ((value & 0x1f) << 16);
-}
-
-/* The RA field in an lmw instruction, which has special value
- restrictions. */
-
-static unsigned long
-insert_ram(unsigned long insn, long value, const char **errmsg)
-{
- if (value >= ((insn >> 21) & 0x1f))
- *errmsg = "index register in load range";
- return insn | ((value & 0x1f) << 16);
-}
-
-/* The RA field in a D or X form instruction which is an updating
- store or an updating floating point load, which means that the RA
- field may not be zero. */
-
-static unsigned long
-insert_ras(unsigned long insn, long value, const char **errmsg)
-{
- if (value == 0)
- *errmsg = "invalid register operand when updating";
- return insn | ((value & 0x1f) << 16);
-}
-
-/* The RB field in an X form instruction when it must be the same as
- the RS field in the instruction. This is used for extended
- mnemonics like mr. This operand is marked FAKE. The insertion
- function just copies the BT field into the BA field, and the
- extraction function just checks that the fields are the same. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_rbs(unsigned long insn, long value, const char **errmsg)
-{
- return insn | (((insn >> 21) & 0x1f) << 11);
-}
-
-static long
-extract_rbs(unsigned long insn, int *invalid)
-{
- if (invalid != (int *) NULL
- && ((insn >> 21) & 0x1f) != ((insn >> 11) & 0x1f))
- *invalid = 1;
- return 0;
-}
-
-/* The SH field in an MD form instruction. This is split. */
-
-/*ARGSUSED*/
-static unsigned long
-insert_sh6(unsigned long insn, long value, const char **errmsg)
-{
- return insn | ((value & 0x1f) << 11) | ((value & 0x20) >> 4);
-}
-
-/*ARGSUSED*/
-static long
-extract_sh6(unsigned long insn, int *invalid)
-{
- return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20);
-}
-
-/* The SPR field in an XFX form instruction. This is flipped--the
- lower 5 bits are stored in the upper 5 and vice- versa. */
-
-static unsigned long
-insert_spr(unsigned long insn, long value, const char **errmsg)
-{
- return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6);
-}
-
-static long
-extract_spr(unsigned long insn, int *invalid)
-{
- return ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0);
-}
-
-/* The TBR field in an XFX instruction. This is just like SPR, but it
- is optional. When TBR is omitted, it must be inserted as 268 (the
- magic number of the TB register). These functions treat 0
- (indicating an omitted optional operand) as 268. This means that
- ``mftb 4,0'' is not handled correctly. This does not matter very
- much, since the architecture manual does not define mftb as
- accepting any values other than 268 or 269. */
-
-#define TB (268)
-
-static unsigned long
-insert_tbr(unsigned long insn, long value, const char **errmsg)
-{
- if (value == 0)
- value = TB;
- return insn | ((value & 0x1f) << 16) | ((value & 0x3e0) << 6);
-}
-
-static long
-extract_tbr(unsigned long insn, int *invalid)
-{
- long ret;
-
- ret = ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0);
- if (ret == TB)
- ret = 0;
- return ret;
-}
-
-/* Macros used to form opcodes. */
-
-/* The main opcode. */
-#define OP(x) (((x) & 0x3f) << 26)
-#define OP_MASK OP (0x3f)
-
-/* The main opcode combined with a trap code in the TO field of a D
- form instruction. Used for extended mnemonics for the trap
- instructions. */
-#define OPTO(x,to) (OP (x) | (((to) & 0x1f) << 21))
-#define OPTO_MASK (OP_MASK | TO_MASK)
-
-/* The main opcode combined with a comparison size bit in the L field
- of a D form or X form instruction. Used for extended mnemonics for
- the comparison instructions. */
-#define OPL(x,l) (OP (x) | (((l) & 1) << 21))
-#define OPL_MASK OPL (0x3f,1)
-
-/* An A form instruction. */
-#define A(op, xop, rc) (OP (op) | (((xop) & 0x1f) << 1) | ((rc) & 1))
-#define A_MASK A (0x3f, 0x1f, 1)
-
-/* An A_MASK with the FRB field fixed. */
-#define AFRB_MASK (A_MASK | FRB_MASK)
-
-/* An A_MASK with the FRC field fixed. */
-#define AFRC_MASK (A_MASK | FRC_MASK)
-
-/* An A_MASK with the FRA and FRC fields fixed. */
-#define AFRAFRC_MASK (A_MASK | FRA_MASK | FRC_MASK)
-
-/* A B form instruction. */
-#define B(op, aa, lk) (OP (op) | (((aa) & 1) << 1) | ((lk) & 1))
-#define B_MASK B (0x3f, 1, 1)
-
-/* A B form instruction setting the BO field. */
-#define BBO(op, bo, aa, lk) (B ((op), (aa), (lk)) | (((bo) & 0x1f) << 21))
-#define BBO_MASK BBO (0x3f, 0x1f, 1, 1)
-
-/* A BBO_MASK with the y bit of the BO field removed. This permits
- matching a conditional branch regardless of the setting of the y
- bit. */
-#define Y_MASK (1 << 21)
-#define BBOY_MASK (BBO_MASK &~ Y_MASK)
-
-/* A B form instruction setting the BO field and the condition bits of
- the BI field. */
-#define BBOCB(op, bo, cb, aa, lk) \
- (BBO ((op), (bo), (aa), (lk)) | (((cb) & 0x3) << 16))
-#define BBOCB_MASK BBOCB (0x3f, 0x1f, 0x3, 1, 1)
-
-/* A BBOCB_MASK with the y bit of the BO field removed. */
-#define BBOYCB_MASK (BBOCB_MASK &~ Y_MASK)
-
-/* A BBOYCB_MASK in which the BI field is fixed. */
-#define BBOYBI_MASK (BBOYCB_MASK | BI_MASK)
-
-/* The main opcode mask with the RA field clear. */
-#define DRA_MASK (OP_MASK | RA_MASK)
-
-/* A DS form instruction. */
-#define DSO(op, xop) (OP (op) | ((xop) & 0x3))
-#define DS_MASK DSO (0x3f, 3)
-
-/* An M form instruction. */
-#define M(op, rc) (OP (op) | ((rc) & 1))
-#define M_MASK M (0x3f, 1)
-
-/* An M form instruction with the ME field specified. */
-#define MME(op, me, rc) (M ((op), (rc)) | (((me) & 0x1f) << 1))
-
-/* An M_MASK with the MB and ME fields fixed. */
-#define MMBME_MASK (M_MASK | MB_MASK | ME_MASK)
-
-/* An M_MASK with the SH and ME fields fixed. */
-#define MSHME_MASK (M_MASK | SH_MASK | ME_MASK)
-
-/* An MD form instruction. */
-#define MD(op, xop, rc) (OP (op) | (((xop) & 0x7) << 2) | ((rc) & 1))
-#define MD_MASK MD (0x3f, 0x7, 1)
-
-/* An MD_MASK with the MB field fixed. */
-#define MDMB_MASK (MD_MASK | MB6_MASK)
-
-/* An MD_MASK with the SH field fixed. */
-#define MDSH_MASK (MD_MASK | SH6_MASK)
-
-/* An MDS form instruction. */
-#define MDS(op, xop, rc) (OP (op) | (((xop) & 0xf) << 1) | ((rc) & 1))
-#define MDS_MASK MDS (0x3f, 0xf, 1)
-
-/* An MDS_MASK with the MB field fixed. */
-#define MDSMB_MASK (MDS_MASK | MB6_MASK)
-
-/* An SC form instruction. */
-#define SC(op, sa, lk) (OP (op) | (((sa) & 1) << 1) | ((lk) & 1))
-#define SC_MASK (OP_MASK | (0x3ff << 16) | (1 << 1) | 1)
-
-/* An X form instruction. */
-#define X(op, xop) (OP (op) | (((xop) & 0x3ff) << 1))
-
-/* An X form instruction with the RC bit specified. */
-#define XRC(op, xop, rc) (X ((op), (xop)) | ((rc) & 1))
-
-/* The mask for an X form instruction. */
-#define X_MASK XRC (0x3f, 0x3ff, 1)
-
-/* An X_MASK with the RA field fixed. */
-#define XRA_MASK (X_MASK | RA_MASK)
-
-/* An X_MASK with the RB field fixed. */
-#define XRB_MASK (X_MASK | RB_MASK)
-
-/* An X_MASK with the RT field fixed. */
-#define XRT_MASK (X_MASK | RT_MASK)
-
-/* An X_MASK with the RA and RB fields fixed. */
-#define XRARB_MASK (X_MASK | RA_MASK | RB_MASK)
-
-/* An X_MASK with the RT and RA fields fixed. */
-#define XRTRA_MASK (X_MASK | RT_MASK | RA_MASK)
-
-/* An X form comparison instruction. */
-#define XCMPL(op, xop, l) (X ((op), (xop)) | (((l) & 1) << 21))
-
-/* The mask for an X form comparison instruction. */
-#define XCMP_MASK (X_MASK | (1 << 22))
-
-/* The mask for an X form comparison instruction with the L field
- fixed. */
-#define XCMPL_MASK (XCMP_MASK | (1 << 21))
-
-/* An X form trap instruction with the TO field specified. */
-#define XTO(op, xop, to) (X ((op), (xop)) | (((to) & 0x1f) << 21))
-#define XTO_MASK (X_MASK | TO_MASK)
-
-/* An XFL form instruction. */
-#define XFL(op, xop, rc) (OP (op) | (((xop) & 0x3ff) << 1) | ((rc) & 1))
-#define XFL_MASK (XFL (0x3f, 0x3ff, 1) | (1 << 25) | (1 << 16))
-
-/* An XL form instruction with the LK field set to 0. */
-#define XL(op, xop) (OP (op) | (((xop) & 0x3ff) << 1))
-
-/* An XL form instruction which uses the LK field. */
-#define XLLK(op, xop, lk) (XL ((op), (xop)) | ((lk) & 1))
-
-/* The mask for an XL form instruction. */
-#define XL_MASK XLLK (0x3f, 0x3ff, 1)
-
-/* An XL form instruction which explicitly sets the BO field. */
-#define XLO(op, bo, xop, lk) \
- (XLLK ((op), (xop), (lk)) | (((bo) & 0x1f) << 21))
-#define XLO_MASK (XL_MASK | BO_MASK)
-
-/* An XL form instruction which explicitly sets the y bit of the BO
- field. */
-#define XLYLK(op, xop, y, lk) (XLLK ((op), (xop), (lk)) | (((y) & 1) << 21))
-#define XLYLK_MASK (XL_MASK | Y_MASK)
-
-/* An XL form instruction which sets the BO field and the condition
- bits of the BI field. */
-#define XLOCB(op, bo, cb, xop, lk) \
- (XLO ((op), (bo), (xop), (lk)) | (((cb) & 3) << 16))
-#define XLOCB_MASK XLOCB (0x3f, 0x1f, 0x3, 0x3ff, 1)
-
-/* An XL_MASK or XLYLK_MASK or XLOCB_MASK with the BB field fixed. */
-#define XLBB_MASK (XL_MASK | BB_MASK)
-#define XLYBB_MASK (XLYLK_MASK | BB_MASK)
-#define XLBOCBBB_MASK (XLOCB_MASK | BB_MASK)
-
-/* An XL_MASK with the BO and BB fields fixed. */
-#define XLBOBB_MASK (XL_MASK | BO_MASK | BB_MASK)
-
-/* An XL_MASK with the BO, BI and BB fields fixed. */
-#define XLBOBIBB_MASK (XL_MASK | BO_MASK | BI_MASK | BB_MASK)
-
-/* An XO form instruction. */
-#define XO(op, xop, oe, rc) \
- (OP (op) | (((xop) & 0x1ff) << 1) | (((oe) & 1) << 10) | ((rc) & 1))
-#define XO_MASK XO (0x3f, 0x1ff, 1, 1)
-
-/* An XO_MASK with the RB field fixed. */
-#define XORB_MASK (XO_MASK | RB_MASK)
-
-/* An XS form instruction. */
-#define XS(op, xop, rc) (OP (op) | (((xop) & 0x1ff) << 2) | ((rc) & 1))
-#define XS_MASK XS (0x3f, 0x1ff, 1)
-
-/* A mask for the FXM version of an XFX form instruction. */
-#define XFXFXM_MASK (X_MASK | (1 << 20) | (1 << 11))
-
-/* An XFX form instruction with the FXM field filled in. */
-#define XFXM(op, xop, fxm) \
- (X ((op), (xop)) | (((fxm) & 0xff) << 12))
-
-/* An XFX form instruction with the SPR field filled in. */
-#define XSPR(op, xop, spr) \
- (X ((op), (xop)) | (((spr) & 0x1f) << 16) | (((spr) & 0x3e0) << 6))
-#define XSPR_MASK (X_MASK | SPR_MASK)
-
-/* An XFX form instruction with the SPR field filled in except for the
- SPRBAT field. */
-#define XSPRBAT_MASK (XSPR_MASK &~ SPRBAT_MASK)
-
-/* An XFX form instruction with the SPR field filled in except for the
- SPRG field. */
-#define XSPRG_MASK (XSPR_MASK &~ SPRG_MASK)
-
-/* The BO encodings used in extended conditional branch mnemonics. */
-#define BODNZF (0x0)
-#define BODNZFP (0x1)
-#define BODZF (0x2)
-#define BODZFP (0x3)
-#define BOF (0x4)
-#define BOFP (0x5)
-#define BODNZT (0x8)
-#define BODNZTP (0x9)
-#define BODZT (0xa)
-#define BODZTP (0xb)
-#define BOT (0xc)
-#define BOTP (0xd)
-#define BODNZ (0x10)
-#define BODNZP (0x11)
-#define BODZ (0x12)
-#define BODZP (0x13)
-#define BOU (0x14)
-
-/* The BI condition bit encodings used in extended conditional branch
- mnemonics. */
-#define CBLT (0)
-#define CBGT (1)
-#define CBEQ (2)
-#define CBSO (3)
-
-/* The TO encodings used in extended trap mnemonics. */
-#define TOLGT (0x1)
-#define TOLLT (0x2)
-#define TOEQ (0x4)
-#define TOLGE (0x5)
-#define TOLNL (0x5)
-#define TOLLE (0x6)
-#define TOLNG (0x6)
-#define TOGT (0x8)
-#define TOGE (0xc)
-#define TONL (0xc)
-#define TOLT (0x10)
-#define TOLE (0x14)
-#define TONG (0x14)
-#define TONE (0x18)
-#define TOU (0x1f)
-
-/* Smaller names for the flags so each entry in the opcodes table will
- fit on a single line. */
-#undef PPC
-#define PPC PPC_OPCODE_PPC
-#define POWER PPC_OPCODE_POWER
-#define POWER2 PPC_OPCODE_POWER2
-#define B32 PPC_OPCODE_32
-#define B64 PPC_OPCODE_64
-#define M601 PPC_OPCODE_601
-
-/* The opcode table.
-
- The format of the opcode table is:
-
- NAME OPCODE MASK FLAGS { OPERANDS }
-
- NAME is the name of the instruction.
- OPCODE is the instruction opcode.
- MASK is the opcode mask; this is used to tell the disassembler
- which bits in the actual opcode must match OPCODE.
- FLAGS are flags indicated what processors support the instruction.
- OPERANDS is the list of operands.
-
- The disassembler reads the table in order and prints the first
- instruction which matches, so this table is sorted to put more
- specific instructions before more general instructions. It is also
- sorted by major opcode. */
-
-const struct powerpc_opcode powerpc_opcodes[] = {
-{ "tdlgti", OPTO(2,TOLGT), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdllti", OPTO(2,TOLLT), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdeqi", OPTO(2,TOEQ), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdlgei", OPTO(2,TOLGE), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdlnli", OPTO(2,TOLNL), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdllei", OPTO(2,TOLLE), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdlngi", OPTO(2,TOLNG), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdgti", OPTO(2,TOGT), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdgei", OPTO(2,TOGE), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdnli", OPTO(2,TONL), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdlti", OPTO(2,TOLT), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdlei", OPTO(2,TOLE), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdngi", OPTO(2,TONG), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdnei", OPTO(2,TONE), OPTO_MASK, PPC|B64, { RA, SI } },
-{ "tdi", OP(2), OP_MASK, PPC|B64, { TO, RA, SI } },
-
-{ "twlgti", OPTO(3,TOLGT), OPTO_MASK, PPC, { RA, SI } },
-{ "tlgti", OPTO(3,TOLGT), OPTO_MASK, POWER, { RA, SI } },
-{ "twllti", OPTO(3,TOLLT), OPTO_MASK, PPC, { RA, SI } },
-{ "tllti", OPTO(3,TOLLT), OPTO_MASK, POWER, { RA, SI } },
-{ "tweqi", OPTO(3,TOEQ), OPTO_MASK, PPC, { RA, SI } },
-{ "teqi", OPTO(3,TOEQ), OPTO_MASK, POWER, { RA, SI } },
-{ "twlgei", OPTO(3,TOLGE), OPTO_MASK, PPC, { RA, SI } },
-{ "tlgei", OPTO(3,TOLGE), OPTO_MASK, POWER, { RA, SI } },
-{ "twlnli", OPTO(3,TOLNL), OPTO_MASK, PPC, { RA, SI } },
-{ "tlnli", OPTO(3,TOLNL), OPTO_MASK, POWER, { RA, SI } },
-{ "twllei", OPTO(3,TOLLE), OPTO_MASK, PPC, { RA, SI } },
-{ "tllei", OPTO(3,TOLLE), OPTO_MASK, POWER, { RA, SI } },
-{ "twlngi", OPTO(3,TOLNG), OPTO_MASK, PPC, { RA, SI } },
-{ "tlngi", OPTO(3,TOLNG), OPTO_MASK, POWER, { RA, SI } },
-{ "twgti", OPTO(3,TOGT), OPTO_MASK, PPC, { RA, SI } },
-{ "tgti", OPTO(3,TOGT), OPTO_MASK, POWER, { RA, SI } },
-{ "twgei", OPTO(3,TOGE), OPTO_MASK, PPC, { RA, SI } },
-{ "tgei", OPTO(3,TOGE), OPTO_MASK, POWER, { RA, SI } },
-{ "twnli", OPTO(3,TONL), OPTO_MASK, PPC, { RA, SI } },
-{ "tnli", OPTO(3,TONL), OPTO_MASK, POWER, { RA, SI } },
-{ "twlti", OPTO(3,TOLT), OPTO_MASK, PPC, { RA, SI } },
-{ "tlti", OPTO(3,TOLT), OPTO_MASK, POWER, { RA, SI } },
-{ "twlei", OPTO(3,TOLE), OPTO_MASK, PPC, { RA, SI } },
-{ "tlei", OPTO(3,TOLE), OPTO_MASK, POWER, { RA, SI } },
-{ "twngi", OPTO(3,TONG), OPTO_MASK, PPC, { RA, SI } },
-{ "tngi", OPTO(3,TONG), OPTO_MASK, POWER, { RA, SI } },
-{ "twnei", OPTO(3,TONE), OPTO_MASK, PPC, { RA, SI } },
-{ "tnei", OPTO(3,TONE), OPTO_MASK, POWER, { RA, SI } },
-{ "twi", OP(3), OP_MASK, PPC, { TO, RA, SI } },
-{ "ti", OP(3), OP_MASK, POWER, { TO, RA, SI } },
-
-{ "mulli", OP(7), OP_MASK, PPC, { RT, RA, SI } },
-{ "muli", OP(7), OP_MASK, POWER, { RT, RA, SI } },
-
-{ "subfic", OP(8), OP_MASK, PPC, { RT, RA, SI } },
-{ "sfi", OP(8), OP_MASK, POWER, { RT, RA, SI } },
-
-{ "dozi", OP(9), OP_MASK, POWER|M601, { RT, RA, SI } },
-
-{ "cmplwi", OPL(10,0), OPL_MASK, PPC, { OBF, RA, UI } },
-{ "cmpldi", OPL(10,1), OPL_MASK, PPC|B64, { OBF, RA, UI } },
-{ "cmpli", OP(10), OP_MASK, PPC, { BF, L, RA, UI } },
-{ "cmpli", OP(10), OP_MASK, POWER, { BF, RA, UI } },
-
-{ "cmpwi", OPL(11,0), OPL_MASK, PPC, { OBF, RA, SI } },
-{ "cmpdi", OPL(11,1), OPL_MASK, PPC|B64, { OBF, RA, SI } },
-{ "cmpi", OP(11), OP_MASK, PPC, { BF, L, RA, SI } },
-{ "cmpi", OP(11), OP_MASK, POWER, { BF, RA, SI } },
-
-{ "addic", OP(12), OP_MASK, PPC, { RT, RA, SI } },
-{ "ai", OP(12), OP_MASK, POWER, { RT, RA, SI } },
-{ "subic", OP(12), OP_MASK, PPC, { RT, RA, NSI } },
-
-{ "addic.", OP(13), OP_MASK, PPC, { RT, RA, SI } },
-{ "ai.", OP(13), OP_MASK, POWER, { RT, RA, SI } },
-{ "subic.", OP(13), OP_MASK, PPC, { RT, RA, NSI } },
-
-{ "li", OP(14), DRA_MASK, PPC, { RT, SI } },
-{ "lil", OP(14), DRA_MASK, POWER, { RT, SI } },
-{ "addi", OP(14), OP_MASK, PPC, { RT, RA, SI } },
-{ "cal", OP(14), OP_MASK, POWER, { RT, D, RA } },
-{ "subi", OP(14), OP_MASK, PPC, { RT, RA, NSI } },
-{ "la", OP(14), OP_MASK, PPC, { RT, D, RA } },
-
-{ "lis", OP(15), DRA_MASK, PPC, { RT, SISIGNOPT } },
-{ "liu", OP(15), DRA_MASK, POWER, { RT, SISIGNOPT } },
-{ "addis", OP(15), OP_MASK, PPC, { RT,RA,SISIGNOPT } },
-{ "cau", OP(15), OP_MASK, POWER, { RT,RA,SISIGNOPT } },
-{ "subis", OP(15), OP_MASK, PPC, { RT, RA, NSI } },
-
-{ "bdnz-", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC, { BDM } },
-{ "bdnz+", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC, { BDP } },
-{ "bdnz", BBO(16,BODNZ,0,0), BBOYBI_MASK, PPC, { BD } },
-{ "bdn", BBO(16,BODNZ,0,0), BBOYBI_MASK, POWER, { BD } },
-{ "bdnzl-", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC, { BDM } },
-{ "bdnzl+", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC, { BDP } },
-{ "bdnzl", BBO(16,BODNZ,0,1), BBOYBI_MASK, PPC, { BD } },
-{ "bdnl", BBO(16,BODNZ,0,1), BBOYBI_MASK, POWER, { BD } },
-{ "bdnza-", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC, { BDMA } },
-{ "bdnza+", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC, { BDPA } },
-{ "bdnza", BBO(16,BODNZ,1,0), BBOYBI_MASK, PPC, { BDA } },
-{ "bdna", BBO(16,BODNZ,1,0), BBOYBI_MASK, POWER, { BDA } },
-{ "bdnzla-", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC, { BDMA } },
-{ "bdnzla+", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC, { BDPA } },
-{ "bdnzla", BBO(16,BODNZ,1,1), BBOYBI_MASK, PPC, { BDA } },
-{ "bdnla", BBO(16,BODNZ,1,1), BBOYBI_MASK, POWER, { BDA } },
-{ "bdz-", BBO(16,BODZ,0,0), BBOYBI_MASK, PPC, { BDM } },
-{ "bdz+", BBO(16,BODZ,0,0), BBOYBI_MASK, PPC, { BDP } },
-{ "bdz", BBO(16,BODZ,0,0), BBOYBI_MASK, PPC|POWER, { BD } },
-{ "bdzl-", BBO(16,BODZ,0,1), BBOYBI_MASK, PPC, { BDM } },
-{ "bdzl+", BBO(16,BODZ,0,1), BBOYBI_MASK, PPC, { BDP } },
-{ "bdzl", BBO(16,BODZ,0,1), BBOYBI_MASK, PPC|POWER, { BD } },
-{ "bdza-", BBO(16,BODZ,1,0), BBOYBI_MASK, PPC, { BDMA } },
-{ "bdza+", BBO(16,BODZ,1,0), BBOYBI_MASK, PPC, { BDPA } },
-{ "bdza", BBO(16,BODZ,1,0), BBOYBI_MASK, PPC|POWER, { BDA } },
-{ "bdzla-", BBO(16,BODZ,1,1), BBOYBI_MASK, PPC, { BDMA } },
-{ "bdzla+", BBO(16,BODZ,1,1), BBOYBI_MASK, PPC, { BDPA } },
-{ "bdzla", BBO(16,BODZ,1,1), BBOYBI_MASK, PPC|POWER, { BDA } },
-{ "blt-", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "blt+", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "blt", BBOCB(16,BOT,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bltl-", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bltl+", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bltl", BBOCB(16,BOT,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "blta-", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "blta+", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "blta", BBOCB(16,BOT,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bltla-", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bltla+", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bltla", BBOCB(16,BOT,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bgt-", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bgt+", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bgt", BBOCB(16,BOT,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bgtl-", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bgtl+", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bgtl", BBOCB(16,BOT,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bgta-", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bgta+", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bgta", BBOCB(16,BOT,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bgtla-", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bgtla+", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bgtla", BBOCB(16,BOT,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "beq-", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "beq+", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "beq", BBOCB(16,BOT,CBEQ,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "beql-", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "beql+", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "beql", BBOCB(16,BOT,CBEQ,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "beqa-", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "beqa+", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "beqa", BBOCB(16,BOT,CBEQ,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "beqla-", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "beqla+", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "beqla", BBOCB(16,BOT,CBEQ,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bso-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bso+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bso", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bsol-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bsol+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bsol", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bsoa-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bsoa+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bsoa", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bsola-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bsola+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bsola", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bun-", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bun+", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bun", BBOCB(16,BOT,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BD } },
-{ "bunl-", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bunl+", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bunl", BBOCB(16,BOT,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BD } },
-{ "buna-", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "buna+", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "buna", BBOCB(16,BOT,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDA } },
-{ "bunla-", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bunla+", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bunla", BBOCB(16,BOT,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDA } },
-{ "bge-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bge+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bge", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bgel-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bgel+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bgel", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bgea-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bgea+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bgea", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bgela-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bgela+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bgela", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bnl-", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bnl+", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bnl", BBOCB(16,BOF,CBLT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bnll-", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bnll+", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bnll", BBOCB(16,BOF,CBLT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bnla-", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnla+", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnla", BBOCB(16,BOF,CBLT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bnlla-", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnlla+", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnlla", BBOCB(16,BOF,CBLT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "ble-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "ble+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "ble", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "blel-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "blel+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "blel", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "blea-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "blea+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "blea", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "blela-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "blela+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "blela", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bng-", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bng+", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bng", BBOCB(16,BOF,CBGT,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bngl-", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bngl+", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bngl", BBOCB(16,BOF,CBGT,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bnga-", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnga+", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnga", BBOCB(16,BOF,CBGT,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bngla-", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bngla+", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bngla", BBOCB(16,BOF,CBGT,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bne-", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bne+", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bne", BBOCB(16,BOF,CBEQ,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bnel-", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bnel+", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bnel", BBOCB(16,BOF,CBEQ,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bnea-", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnea+", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnea", BBOCB(16,BOF,CBEQ,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bnela-", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnela+", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnela", BBOCB(16,BOF,CBEQ,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bns-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bns+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bns", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bnsl-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bnsl+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bnsl", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC|POWER, { CR, BD } },
-{ "bnsa-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnsa+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnsa", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bnsla-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnsla+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnsla", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC|POWER, { CR, BDA } },
-{ "bnu-", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bnu+", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bnu", BBOCB(16,BOF,CBSO,0,0), BBOYCB_MASK, PPC, { CR, BD } },
-{ "bnul-", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDM } },
-{ "bnul+", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BDP } },
-{ "bnul", BBOCB(16,BOF,CBSO,0,1), BBOYCB_MASK, PPC, { CR, BD } },
-{ "bnua-", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnua+", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnua", BBOCB(16,BOF,CBSO,1,0), BBOYCB_MASK, PPC, { CR, BDA } },
-{ "bnula-", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDMA } },
-{ "bnula+", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDPA } },
-{ "bnula", BBOCB(16,BOF,CBSO,1,1), BBOYCB_MASK, PPC, { CR, BDA } },
-{ "bdnzt-", BBO(16,BODNZT,0,0), BBOY_MASK, PPC, { BI, BDM } },
-{ "bdnzt+", BBO(16,BODNZT,0,0), BBOY_MASK, PPC, { BI, BDP } },
-{ "bdnzt", BBO(16,BODNZT,0,0), BBOY_MASK, PPC, { BI, BD } },
-{ "bdnztl-", BBO(16,BODNZT,0,1), BBOY_MASK, PPC, { BI, BDM } },
-{ "bdnztl+", BBO(16,BODNZT,0,1), BBOY_MASK, PPC, { BI, BDP } },
-{ "bdnztl", BBO(16,BODNZT,0,1), BBOY_MASK, PPC, { BI, BD } },
-{ "bdnzta-", BBO(16,BODNZT,1,0), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bdnzta+", BBO(16,BODNZT,1,0), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bdnzta", BBO(16,BODNZT,1,0), BBOY_MASK, PPC, { BI, BDA } },
-{ "bdnztla-",BBO(16,BODNZT,1,1), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bdnztla+",BBO(16,BODNZT,1,1), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bdnztla", BBO(16,BODNZT,1,1), BBOY_MASK, PPC, { BI, BDA } },
-{ "bdnzf-", BBO(16,BODNZF,0,0), BBOY_MASK, PPC, { BI, BDM } },
-{ "bdnzf+", BBO(16,BODNZF,0,0), BBOY_MASK, PPC, { BI, BDP } },
-{ "bdnzf", BBO(16,BODNZF,0,0), BBOY_MASK, PPC, { BI, BD } },
-{ "bdnzfl-", BBO(16,BODNZF,0,1), BBOY_MASK, PPC, { BI, BDM } },
-{ "bdnzfl+", BBO(16,BODNZF,0,1), BBOY_MASK, PPC, { BI, BDP } },
-{ "bdnzfl", BBO(16,BODNZF,0,1), BBOY_MASK, PPC, { BI, BD } },
-{ "bdnzfa-", BBO(16,BODNZF,1,0), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bdnzfa+", BBO(16,BODNZF,1,0), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bdnzfa", BBO(16,BODNZF,1,0), BBOY_MASK, PPC, { BI, BDA } },
-{ "bdnzfla-",BBO(16,BODNZF,1,1), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bdnzfla+",BBO(16,BODNZF,1,1), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bdnzfla", BBO(16,BODNZF,1,1), BBOY_MASK, PPC, { BI, BDA } },
-{ "bt-", BBO(16,BOT,0,0), BBOY_MASK, PPC, { BI, BDM } },
-{ "bt+", BBO(16,BOT,0,0), BBOY_MASK, PPC, { BI, BDP } },
-{ "bt", BBO(16,BOT,0,0), BBOY_MASK, PPC, { BI, BD } },
-{ "bbt", BBO(16,BOT,0,0), BBOY_MASK, POWER, { BI, BD } },
-{ "btl-", BBO(16,BOT,0,1), BBOY_MASK, PPC, { BI, BDM } },
-{ "btl+", BBO(16,BOT,0,1), BBOY_MASK, PPC, { BI, BDP } },
-{ "btl", BBO(16,BOT,0,1), BBOY_MASK, PPC, { BI, BD } },
-{ "bbtl", BBO(16,BOT,0,1), BBOY_MASK, POWER, { BI, BD } },
-{ "bta-", BBO(16,BOT,1,0), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bta+", BBO(16,BOT,1,0), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bta", BBO(16,BOT,1,0), BBOY_MASK, PPC, { BI, BDA } },
-{ "bbta", BBO(16,BOT,1,0), BBOY_MASK, POWER, { BI, BDA } },
-{ "btla-", BBO(16,BOT,1,1), BBOY_MASK, PPC, { BI, BDMA } },
-{ "btla+", BBO(16,BOT,1,1), BBOY_MASK, PPC, { BI, BDPA } },
-{ "btla", BBO(16,BOT,1,1), BBOY_MASK, PPC, { BI, BDA } },
-{ "bbtla", BBO(16,BOT,1,1), BBOY_MASK, POWER, { BI, BDA } },
-{ "bf-", BBO(16,BOF,0,0), BBOY_MASK, PPC, { BI, BDM } },
-{ "bf+", BBO(16,BOF,0,0), BBOY_MASK, PPC, { BI, BDP } },
-{ "bf", BBO(16,BOF,0,0), BBOY_MASK, PPC, { BI, BD } },
-{ "bbf", BBO(16,BOF,0,0), BBOY_MASK, POWER, { BI, BD } },
-{ "bfl-", BBO(16,BOF,0,1), BBOY_MASK, PPC, { BI, BDM } },
-{ "bfl+", BBO(16,BOF,0,1), BBOY_MASK, PPC, { BI, BDP } },
-{ "bfl", BBO(16,BOF,0,1), BBOY_MASK, PPC, { BI, BD } },
-{ "bbfl", BBO(16,BOF,0,1), BBOY_MASK, POWER, { BI, BD } },
-{ "bfa-", BBO(16,BOF,1,0), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bfa+", BBO(16,BOF,1,0), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bfa", BBO(16,BOF,1,0), BBOY_MASK, PPC, { BI, BDA } },
-{ "bbfa", BBO(16,BOF,1,0), BBOY_MASK, POWER, { BI, BDA } },
-{ "bfla-", BBO(16,BOF,1,1), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bfla+", BBO(16,BOF,1,1), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bfla", BBO(16,BOF,1,1), BBOY_MASK, PPC, { BI, BDA } },
-{ "bbfla", BBO(16,BOF,1,1), BBOY_MASK, POWER, { BI, BDA } },
-{ "bdzt-", BBO(16,BODZT,0,0), BBOY_MASK, PPC, { BI, BDM } },
-{ "bdzt+", BBO(16,BODZT,0,0), BBOY_MASK, PPC, { BI, BDP } },
-{ "bdzt", BBO(16,BODZT,0,0), BBOY_MASK, PPC, { BI, BD } },
-{ "bdztl-", BBO(16,BODZT,0,1), BBOY_MASK, PPC, { BI, BDM } },
-{ "bdztl+", BBO(16,BODZT,0,1), BBOY_MASK, PPC, { BI, BDP } },
-{ "bdztl", BBO(16,BODZT,0,1), BBOY_MASK, PPC, { BI, BD } },
-{ "bdzta-", BBO(16,BODZT,1,0), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bdzta+", BBO(16,BODZT,1,0), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bdzta", BBO(16,BODZT,1,0), BBOY_MASK, PPC, { BI, BDA } },
-{ "bdztla-", BBO(16,BODZT,1,1), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bdztla+", BBO(16,BODZT,1,1), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bdztla", BBO(16,BODZT,1,1), BBOY_MASK, PPC, { BI, BDA } },
-{ "bdzf-", BBO(16,BODZF,0,0), BBOY_MASK, PPC, { BI, BDM } },
-{ "bdzf+", BBO(16,BODZF,0,0), BBOY_MASK, PPC, { BI, BDP } },
-{ "bdzf", BBO(16,BODZF,0,0), BBOY_MASK, PPC, { BI, BD } },
-{ "bdzfl-", BBO(16,BODZF,0,1), BBOY_MASK, PPC, { BI, BDM } },
-{ "bdzfl+", BBO(16,BODZF,0,1), BBOY_MASK, PPC, { BI, BDP } },
-{ "bdzfl", BBO(16,BODZF,0,1), BBOY_MASK, PPC, { BI, BD } },
-{ "bdzfa-", BBO(16,BODZF,1,0), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bdzfa+", BBO(16,BODZF,1,0), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bdzfa", BBO(16,BODZF,1,0), BBOY_MASK, PPC, { BI, BDA } },
-{ "bdzfla-", BBO(16,BODZF,1,1), BBOY_MASK, PPC, { BI, BDMA } },
-{ "bdzfla+", BBO(16,BODZF,1,1), BBOY_MASK, PPC, { BI, BDPA } },
-{ "bdzfla", BBO(16,BODZF,1,1), BBOY_MASK, PPC, { BI, BDA } },
-{ "bc-", B(16,0,0), B_MASK, PPC, { BOE, BI, BDM } },
-{ "bc+", B(16,0,0), B_MASK, PPC, { BOE, BI, BDP } },
-{ "bc", B(16,0,0), B_MASK, PPC|POWER, { BO, BI, BD } },
-{ "bcl-", B(16,0,1), B_MASK, PPC, { BOE, BI, BDM } },
-{ "bcl+", B(16,0,1), B_MASK, PPC, { BOE, BI, BDP } },
-{ "bcl", B(16,0,1), B_MASK, PPC|POWER, { BO, BI, BD } },
-{ "bca-", B(16,1,0), B_MASK, PPC, { BOE, BI, BDMA } },
-{ "bca+", B(16,1,0), B_MASK, PPC, { BOE, BI, BDPA } },
-{ "bca", B(16,1,0), B_MASK, PPC|POWER, { BO, BI, BDA } },
-{ "bcla-", B(16,1,1), B_MASK, PPC, { BOE, BI, BDMA } },
-{ "bcla+", B(16,1,1), B_MASK, PPC, { BOE, BI, BDPA } },
-{ "bcla", B(16,1,1), B_MASK, PPC|POWER, { BO, BI, BDA } },
-
-{ "sc", SC(17,1,0), 0xffffffff, PPC, { 0 } },
-{ "svc", SC(17,0,0), SC_MASK, POWER, { LEV, FL1, FL2 } },
-{ "svcl", SC(17,0,1), SC_MASK, POWER, { LEV, FL1, FL2 } },
-{ "svca", SC(17,1,0), SC_MASK, POWER, { SV } },
-{ "svcla", SC(17,1,1), SC_MASK, POWER, { SV } },
-
-{ "b", B(18,0,0), B_MASK, PPC|POWER, { LI } },
-{ "bl", B(18,0,1), B_MASK, PPC|POWER, { LI } },
-{ "ba", B(18,1,0), B_MASK, PPC|POWER, { LIA } },
-{ "bla", B(18,1,1), B_MASK, PPC|POWER, { LIA } },
-
-{ "mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), PPC|POWER, { BF, BFA } },
-
-{ "blr", XLO(19,BOU,16,0), XLBOBIBB_MASK, PPC, { 0 } },
-{ "br", XLO(19,BOU,16,0), XLBOBIBB_MASK, POWER, { 0 } },
-{ "blrl", XLO(19,BOU,16,1), XLBOBIBB_MASK, PPC, { 0 } },
-{ "brl", XLO(19,BOU,16,1), XLBOBIBB_MASK, POWER, { 0 } },
-{ "bdnzlr", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdnzlr-", XLO(19,BODNZ,16,0), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdnzlr+", XLO(19,BODNZP,16,0), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdnzlrl", XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdnzlrl-",XLO(19,BODNZ,16,1), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdnzlrl+",XLO(19,BODNZP,16,1), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdzlr", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdzlr-", XLO(19,BODZ,16,0), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdzlr+", XLO(19,BODZP,16,0), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdzlrl", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdzlrl-", XLO(19,BODZ,16,1), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bdzlrl+", XLO(19,BODZP,16,1), XLBOBIBB_MASK, PPC, { 0 } },
-{ "bltlr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltlr-", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltlr+", XLOCB(19,BOTP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltr", XLOCB(19,BOT,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "bltlrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltlrl-", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltlrl+", XLOCB(19,BOTP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltrl", XLOCB(19,BOT,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "bgtlr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtlr-", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtlr+", XLOCB(19,BOTP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtr", XLOCB(19,BOT,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "bgtlrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtlrl-", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtlrl+", XLOCB(19,BOTP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtrl", XLOCB(19,BOT,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "beqlr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqlr-", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqlr+", XLOCB(19,BOTP,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqr", XLOCB(19,BOT,CBEQ,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "beqlrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqlrl-", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqlrl+", XLOCB(19,BOTP,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqrl", XLOCB(19,BOT,CBEQ,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "bsolr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsolr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsolr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsor", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "bsolrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsolrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsolrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsorl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "bunlr", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunlr-", XLOCB(19,BOT,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunlr+", XLOCB(19,BOTP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunlrl", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunlrl-", XLOCB(19,BOT,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunlrl+", XLOCB(19,BOTP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgelr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgelr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgelr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bger", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "bgelrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgelrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgelrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgerl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnllr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnllr-", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnllr+", XLOCB(19,BOFP,CBLT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnlr", XLOCB(19,BOF,CBLT,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnllrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnllrl-", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnllrl+", XLOCB(19,BOFP,CBLT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnlrl", XLOCB(19,BOF,CBLT,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "blelr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "blelr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "blelr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bler", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "blelrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "blelrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "blelrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "blerl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnglr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnglr-", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnglr+", XLOCB(19,BOFP,CBGT,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bngr", XLOCB(19,BOF,CBGT,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnglrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnglrl-", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnglrl+", XLOCB(19,BOFP,CBGT,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bngrl", XLOCB(19,BOF,CBGT,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnelr", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnelr-", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnelr+", XLOCB(19,BOFP,CBEQ,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bner", XLOCB(19,BOF,CBEQ,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnelrl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnelrl-", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnelrl+", XLOCB(19,BOFP,CBEQ,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnerl", XLOCB(19,BOF,CBEQ,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnslr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnslr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnslr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnsr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnslrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnslrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnslrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnsrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, POWER, { CR } },
-{ "bnulr", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnulr-", XLOCB(19,BOF,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnulr+", XLOCB(19,BOFP,CBSO,16,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnulrl", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnulrl-", XLOCB(19,BOF,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnulrl+", XLOCB(19,BOFP,CBSO,16,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "btlr", XLO(19,BOT,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "btlr-", XLO(19,BOT,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "btlr+", XLO(19,BOTP,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bbtr", XLO(19,BOT,16,0), XLBOBB_MASK, POWER, { BI } },
-{ "btlrl", XLO(19,BOT,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "btlrl-", XLO(19,BOT,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "btlrl+", XLO(19,BOTP,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bbtrl", XLO(19,BOT,16,1), XLBOBB_MASK, POWER, { BI } },
-{ "bflr", XLO(19,BOF,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bflr-", XLO(19,BOF,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bflr+", XLO(19,BOFP,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bbfr", XLO(19,BOF,16,0), XLBOBB_MASK, POWER, { BI } },
-{ "bflrl", XLO(19,BOF,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bflrl-", XLO(19,BOF,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bflrl+", XLO(19,BOFP,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bbfrl", XLO(19,BOF,16,1), XLBOBB_MASK, POWER, { BI } },
-{ "bdnztlr", XLO(19,BODNZT,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdnztlr-",XLO(19,BODNZT,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdnztlr+",XLO(19,BODNZTP,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdnztlrl",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdnztlrl-",XLO(19,BODNZT,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdnztlrl+",XLO(19,BODNZTP,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdnzflr", XLO(19,BODNZF,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdnzflr-",XLO(19,BODNZF,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdnzflr+",XLO(19,BODNZFP,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdnzflrl",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdnzflrl-",XLO(19,BODNZF,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdnzflrl+",XLO(19,BODNZFP,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdztlr", XLO(19,BODZT,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdztlr-", XLO(19,BODZT,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdztlr+", XLO(19,BODZTP,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdztlrl", XLO(19,BODZT,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdztlrl-",XLO(19,BODZT,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdztlrl+",XLO(19,BODZTP,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdzflr", XLO(19,BODZF,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdzflr-", XLO(19,BODZF,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdzflr+", XLO(19,BODZFP,16,0), XLBOBB_MASK, PPC, { BI } },
-{ "bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, PPC, { BI } },
-{ "bclr", XLLK(19,16,0), XLYBB_MASK, PPC, { BO, BI } },
-{ "bclrl", XLLK(19,16,1), XLYBB_MASK, PPC, { BO, BI } },
-{ "bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPC, { BOE, BI } },
-{ "bclrl+", XLYLK(19,16,1,1), XLYBB_MASK, PPC, { BOE, BI } },
-{ "bclr-", XLYLK(19,16,0,0), XLYBB_MASK, PPC, { BOE, BI } },
-{ "bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPC, { BOE, BI } },
-{ "bcr", XLLK(19,16,0), XLBB_MASK, POWER, { BO, BI } },
-{ "bcrl", XLLK(19,16,1), XLBB_MASK, POWER, { BO, BI } },
-
-{ "crnot", XL(19,33), XL_MASK, PPC, { BT, BA, BBA } },
-{ "crnor", XL(19,33), XL_MASK, PPC|POWER, { BT, BA, BB } },
-
-{ "rfi", XL(19,50), 0xffffffff, PPC|POWER, { 0 } },
-{ "rfci", XL(19,51), 0xffffffff, PPC, { 0 } },
-
-{ "rfsvc", XL(19,82), 0xffffffff, POWER, { 0 } },
-
-{ "crandc", XL(19,129), XL_MASK, PPC|POWER, { BT, BA, BB } },
-
-{ "isync", XL(19,150), 0xffffffff, PPC, { 0 } },
-{ "ics", XL(19,150), 0xffffffff, POWER, { 0 } },
-
-{ "crclr", XL(19,193), XL_MASK, PPC, { BT, BAT, BBA } },
-{ "crxor", XL(19,193), XL_MASK, PPC|POWER, { BT, BA, BB } },
-
-{ "crnand", XL(19,225), XL_MASK, PPC|POWER, { BT, BA, BB } },
-
-{ "crand", XL(19,257), XL_MASK, PPC|POWER, { BT, BA, BB } },
-
-{ "crset", XL(19,289), XL_MASK, PPC, { BT, BAT, BBA } },
-{ "creqv", XL(19,289), XL_MASK, PPC|POWER, { BT, BA, BB } },
-
-{ "crorc", XL(19,417), XL_MASK, PPC|POWER, { BT, BA, BB } },
-
-{ "crmove", XL(19,449), XL_MASK, PPC, { BT, BA, BBA } },
-{ "cror", XL(19,449), XL_MASK, PPC|POWER, { BT, BA, BB } },
-
-{ "bctr", XLO(19,BOU,528,0), XLBOBIBB_MASK, PPC|POWER, { 0 } },
-{ "bctrl", XLO(19,BOU,528,1), XLBOBIBB_MASK, PPC|POWER, { 0 } },
-{ "bltctr", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltctr-", XLOCB(19,BOT,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltctr+", XLOCB(19,BOTP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltctrl", XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltctrl-",XLOCB(19,BOT,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bltctrl+",XLOCB(19,BOTP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtctr", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtctr-", XLOCB(19,BOT,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtctr+", XLOCB(19,BOTP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtctrl", XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtctrl-",XLOCB(19,BOT,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgtctrl+",XLOCB(19,BOTP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqctr", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqctr-", XLOCB(19,BOT,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqctr+", XLOCB(19,BOTP,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqctrl", XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqctrl-",XLOCB(19,BOT,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "beqctrl+",XLOCB(19,BOTP,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsoctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsoctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsoctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsoctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsoctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bsoctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunctr", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunctr-", XLOCB(19,BOT,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunctr+", XLOCB(19,BOTP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunctrl", XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunctrl-",XLOCB(19,BOT,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bunctrl+",XLOCB(19,BOTP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgectr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgectr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgectr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgectrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgectrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bgectrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnlctr", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnlctr-", XLOCB(19,BOF,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnlctr+", XLOCB(19,BOFP,CBLT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnlctrl", XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnlctrl-",XLOCB(19,BOF,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnlctrl+",XLOCB(19,BOFP,CBLT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "blectr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "blectr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "blectr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "blectrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "blectrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "blectrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bngctr", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bngctr-", XLOCB(19,BOF,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bngctr+", XLOCB(19,BOFP,CBGT,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bngctrl", XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bngctrl-",XLOCB(19,BOF,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bngctrl+",XLOCB(19,BOFP,CBGT,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnectr", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnectr-", XLOCB(19,BOF,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnectr+", XLOCB(19,BOFP,CBEQ,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnectrl", XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnectrl-",XLOCB(19,BOF,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnectrl+",XLOCB(19,BOFP,CBEQ,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnsctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnsctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnsctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnsctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnsctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnsctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnuctr", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnuctr-", XLOCB(19,BOF,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnuctr+", XLOCB(19,BOFP,CBSO,528,0), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnuctrl", XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnuctrl-",XLOCB(19,BOF,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "bnuctrl+",XLOCB(19,BOFP,CBSO,528,1), XLBOCBBB_MASK, PPC, { CR } },
-{ "btctr", XLO(19,BOT,528,0), XLBOBB_MASK, PPC, { BI } },
-{ "btctr-", XLO(19,BOT,528,0), XLBOBB_MASK, PPC, { BI } },
-{ "btctr+", XLO(19,BOTP,528,0), XLBOBB_MASK, PPC, { BI } },
-{ "btctrl", XLO(19,BOT,528,1), XLBOBB_MASK, PPC, { BI } },
-{ "btctrl-", XLO(19,BOT,528,1), XLBOBB_MASK, PPC, { BI } },
-{ "btctrl+", XLO(19,BOTP,528,1), XLBOBB_MASK, PPC, { BI } },
-{ "bfctr", XLO(19,BOF,528,0), XLBOBB_MASK, PPC, { BI } },
-{ "bfctr-", XLO(19,BOF,528,0), XLBOBB_MASK, PPC, { BI } },
-{ "bfctr+", XLO(19,BOFP,528,0), XLBOBB_MASK, PPC, { BI } },
-{ "bfctrl", XLO(19,BOF,528,1), XLBOBB_MASK, PPC, { BI } },
-{ "bfctrl-", XLO(19,BOF,528,1), XLBOBB_MASK, PPC, { BI } },
-{ "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, PPC, { BI } },
-{ "bcctr", XLLK(19,528,0), XLYBB_MASK, PPC, { BO, BI } },
-{ "bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPC, { BOE, BI } },
-{ "bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPC, { BOE, BI } },
-{ "bcctrl", XLLK(19,528,1), XLYBB_MASK, PPC, { BO, BI } },
-{ "bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPC, { BOE, BI } },
-{ "bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPC, { BOE, BI } },
-{ "bcc", XLLK(19,528,0), XLBB_MASK, POWER, { BO, BI } },
-{ "bccl", XLLK(19,528,1), XLBB_MASK, POWER, { BO, BI } },
-
-{ "rlwimi", M(20,0), M_MASK, PPC, { RA,RS,SH,MBE,ME } },
-{ "rlimi", M(20,0), M_MASK, POWER, { RA,RS,SH,MBE,ME } },
-
-{ "rlwimi.", M(20,1), M_MASK, PPC, { RA,RS,SH,MBE,ME } },
-{ "rlimi.", M(20,1), M_MASK, POWER, { RA,RS,SH,MBE,ME } },
-
-{ "rotlwi", MME(21,31,0), MMBME_MASK, PPC, { RA, RS, SH } },
-{ "clrlwi", MME(21,31,0), MSHME_MASK, PPC, { RA, RS, MB } },
-{ "rlwinm", M(21,0), M_MASK, PPC, { RA,RS,SH,MBE,ME } },
-{ "rlinm", M(21,0), M_MASK, POWER, { RA,RS,SH,MBE,ME } },
-{ "rotlwi.", MME(21,31,1), MMBME_MASK, PPC, { RA,RS,SH } },
-{ "clrlwi.", MME(21,31,1), MSHME_MASK, PPC, { RA, RS, MB } },
-{ "rlwinm.", M(21,1), M_MASK, PPC, { RA,RS,SH,MBE,ME } },
-{ "rlinm.", M(21,1), M_MASK, POWER, { RA,RS,SH,MBE,ME } },
-
-{ "rlmi", M(22,0), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } },
-{ "rlmi.", M(22,1), M_MASK, POWER|M601, { RA,RS,RB,MBE,ME } },
-
-{ "rotlw", MME(23,31,0), MMBME_MASK, PPC, { RA, RS, RB } },
-{ "rlwnm", M(23,0), M_MASK, PPC, { RA,RS,RB,MBE,ME } },
-{ "rlnm", M(23,0), M_MASK, POWER, { RA,RS,RB,MBE,ME } },
-{ "rotlw.", MME(23,31,1), MMBME_MASK, PPC, { RA, RS, RB } },
-{ "rlwnm.", M(23,1), M_MASK, PPC, { RA,RS,RB,MBE,ME } },
-{ "rlnm.", M(23,1), M_MASK, POWER, { RA,RS,RB,MBE,ME } },
-
-{ "nop", OP(24), 0xffffffff, PPC, { 0 } },
-{ "ori", OP(24), OP_MASK, PPC, { RA, RS, UI } },
-{ "oril", OP(24), OP_MASK, POWER, { RA, RS, UI } },
-
-{ "oris", OP(25), OP_MASK, PPC, { RA, RS, UI } },
-{ "oriu", OP(25), OP_MASK, POWER, { RA, RS, UI } },
-
-{ "xori", OP(26), OP_MASK, PPC, { RA, RS, UI } },
-{ "xoril", OP(26), OP_MASK, POWER, { RA, RS, UI } },
-
-{ "xoris", OP(27), OP_MASK, PPC, { RA, RS, UI } },
-{ "xoriu", OP(27), OP_MASK, POWER, { RA, RS, UI } },
-
-{ "andi.", OP(28), OP_MASK, PPC, { RA, RS, UI } },
-{ "andil.", OP(28), OP_MASK, POWER, { RA, RS, UI } },
-
-{ "andis.", OP(29), OP_MASK, PPC, { RA, RS, UI } },
-{ "andiu.", OP(29), OP_MASK, POWER, { RA, RS, UI } },
-
-{ "rotldi", MD(30,0,0), MDMB_MASK, PPC|B64, { RA, RS, SH6 } },
-{ "clrldi", MD(30,0,0), MDSH_MASK, PPC|B64, { RA, RS, MB6 } },
-{ "rldicl", MD(30,0,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
-{ "rotldi.", MD(30,0,1), MDMB_MASK, PPC|B64, { RA, RS, SH6 } },
-{ "clrldi.", MD(30,0,1), MDSH_MASK, PPC|B64, { RA, RS, MB6 } },
-{ "rldicl.", MD(30,0,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
-
-{ "rldicr", MD(30,1,0), MD_MASK, PPC|B64, { RA, RS, SH6, ME6 } },
-{ "rldicr.", MD(30,1,1), MD_MASK, PPC|B64, { RA, RS, SH6, ME6 } },
-
-{ "rldic", MD(30,2,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
-{ "rldic.", MD(30,2,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
-
-{ "rldimi", MD(30,3,0), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
-{ "rldimi.", MD(30,3,1), MD_MASK, PPC|B64, { RA, RS, SH6, MB6 } },
-
-{ "rotld", MDS(30,8,0), MDSMB_MASK, PPC|B64, { RA, RS, RB } },
-{ "rldcl", MDS(30,8,0), MDS_MASK, PPC|B64, { RA, RS, RB, MB6 } },
-{ "rotld.", MDS(30,8,1), MDSMB_MASK, PPC|B64, { RA, RS, RB } },
-{ "rldcl.", MDS(30,8,1), MDS_MASK, PPC|B64, { RA, RS, RB, MB6 } },
-
-{ "rldcr", MDS(30,9,0), MDS_MASK, PPC|B64, { RA, RS, RB, ME6 } },
-{ "rldcr.", MDS(30,9,1), MDS_MASK, PPC|B64, { RA, RS, RB, ME6 } },
-
-{ "cmpw", XCMPL(31,0,0), XCMPL_MASK, PPC, { OBF, RA, RB } },
-{ "cmpd", XCMPL(31,0,1), XCMPL_MASK, PPC|B64, { OBF, RA, RB } },
-{ "cmp", X(31,0), XCMP_MASK, PPC, { BF, L, RA, RB } },
-{ "cmp", X(31,0), XCMPL_MASK, POWER, { BF, RA, RB } },
-
-{ "twlgt", XTO(31,4,TOLGT), XTO_MASK, PPC, { RA, RB } },
-{ "tlgt", XTO(31,4,TOLGT), XTO_MASK, POWER, { RA, RB } },
-{ "twllt", XTO(31,4,TOLLT), XTO_MASK, PPC, { RA, RB } },
-{ "tllt", XTO(31,4,TOLLT), XTO_MASK, POWER, { RA, RB } },
-{ "tweq", XTO(31,4,TOEQ), XTO_MASK, PPC, { RA, RB } },
-{ "teq", XTO(31,4,TOEQ), XTO_MASK, POWER, { RA, RB } },
-{ "twlge", XTO(31,4,TOLGE), XTO_MASK, PPC, { RA, RB } },
-{ "tlge", XTO(31,4,TOLGE), XTO_MASK, POWER, { RA, RB } },
-{ "twlnl", XTO(31,4,TOLNL), XTO_MASK, PPC, { RA, RB } },
-{ "tlnl", XTO(31,4,TOLNL), XTO_MASK, POWER, { RA, RB } },
-{ "twlle", XTO(31,4,TOLLE), XTO_MASK, PPC, { RA, RB } },
-{ "tlle", XTO(31,4,TOLLE), XTO_MASK, POWER, { RA, RB } },
-{ "twlng", XTO(31,4,TOLNG), XTO_MASK, PPC, { RA, RB } },
-{ "tlng", XTO(31,4,TOLNG), XTO_MASK, POWER, { RA, RB } },
-{ "twgt", XTO(31,4,TOGT), XTO_MASK, PPC, { RA, RB } },
-{ "tgt", XTO(31,4,TOGT), XTO_MASK, POWER, { RA, RB } },
-{ "twge", XTO(31,4,TOGE), XTO_MASK, PPC, { RA, RB } },
-{ "tge", XTO(31,4,TOGE), XTO_MASK, POWER, { RA, RB } },
-{ "twnl", XTO(31,4,TONL), XTO_MASK, PPC, { RA, RB } },
-{ "tnl", XTO(31,4,TONL), XTO_MASK, POWER, { RA, RB } },
-{ "twlt", XTO(31,4,TOLT), XTO_MASK, PPC, { RA, RB } },
-{ "tlt", XTO(31,4,TOLT), XTO_MASK, POWER, { RA, RB } },
-{ "twle", XTO(31,4,TOLE), XTO_MASK, PPC, { RA, RB } },
-{ "tle", XTO(31,4,TOLE), XTO_MASK, POWER, { RA, RB } },
-{ "twng", XTO(31,4,TONG), XTO_MASK, PPC, { RA, RB } },
-{ "tng", XTO(31,4,TONG), XTO_MASK, POWER, { RA, RB } },
-{ "twne", XTO(31,4,TONE), XTO_MASK, PPC, { RA, RB } },
-{ "tne", XTO(31,4,TONE), XTO_MASK, POWER, { RA, RB } },
-{ "trap", XTO(31,4,TOU), 0xffffffff, PPC, { 0 } },
-{ "tw", X(31,4), X_MASK, PPC, { TO, RA, RB } },
-{ "t", X(31,4), X_MASK, POWER, { TO, RA, RB } },
-
-{ "subfc", XO(31,8,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "sf", XO(31,8,0,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "subc", XO(31,8,0,0), XO_MASK, PPC, { RT, RB, RA } },
-{ "subfc.", XO(31,8,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "sf.", XO(31,8,0,1), XO_MASK, POWER, { RT, RA, RB } },
-{ "subc.", XO(31,8,0,1), XO_MASK, PPC, { RT, RB, RA } },
-{ "subfco", XO(31,8,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "sfo", XO(31,8,1,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "subco", XO(31,8,1,0), XO_MASK, PPC, { RT, RB, RA } },
-{ "subfco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "sfo.", XO(31,8,1,1), XO_MASK, POWER, { RT, RA, RB } },
-{ "subco.", XO(31,8,1,1), XO_MASK, PPC, { RT, RB, RA } },
-
-{ "mulhdu", XO(31,9,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "mulhdu.", XO(31,9,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
-
-{ "addc", XO(31,10,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "a", XO(31,10,0,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "addc.", XO(31,10,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "a.", XO(31,10,0,1), XO_MASK, POWER, { RT, RA, RB } },
-{ "addco", XO(31,10,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "ao", XO(31,10,1,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "addco.", XO(31,10,1,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "ao.", XO(31,10,1,1), XO_MASK, POWER, { RT, RA, RB } },
-
-{ "mulhwu", XO(31,11,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "mulhwu.", XO(31,11,0,1), XO_MASK, PPC, { RT, RA, RB } },
-
-{ "mfcr", X(31,19), XRARB_MASK, POWER|PPC, { RT } },
-
-{ "lwarx", X(31,20), X_MASK, PPC, { RT, RA, RB } },
-
-{ "ldx", X(31,21), X_MASK, PPC|B64, { RT, RA, RB } },
-
-{ "lwzx", X(31,23), X_MASK, PPC, { RT, RA, RB } },
-{ "lx", X(31,23), X_MASK, POWER, { RT, RA, RB } },
-
-{ "slw", XRC(31,24,0), X_MASK, PPC, { RA, RS, RB } },
-{ "sl", XRC(31,24,0), X_MASK, POWER, { RA, RS, RB } },
-{ "slw.", XRC(31,24,1), X_MASK, PPC, { RA, RS, RB } },
-{ "sl.", XRC(31,24,1), X_MASK, POWER, { RA, RS, RB } },
-
-{ "cntlzw", XRC(31,26,0), XRB_MASK, PPC, { RA, RS } },
-{ "cntlz", XRC(31,26,0), XRB_MASK, POWER, { RA, RS } },
-{ "cntlzw.", XRC(31,26,1), XRB_MASK, PPC, { RA, RS } },
-{ "cntlz.", XRC(31,26,1), XRB_MASK, POWER, { RA, RS } },
-
-{ "sld", XRC(31,27,0), X_MASK, PPC|B64, { RA, RS, RB } },
-{ "sld.", XRC(31,27,1), X_MASK, PPC|B64, { RA, RS, RB } },
-
-{ "and", XRC(31,28,0), X_MASK, PPC|POWER, { RA, RS, RB } },
-{ "and.", XRC(31,28,1), X_MASK, PPC|POWER, { RA, RS, RB } },
-
-{ "maskg", XRC(31,29,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "maskg.", XRC(31,29,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "cmplw", XCMPL(31,32,0), XCMPL_MASK, PPC, { OBF, RA, RB } },
-{ "cmpld", XCMPL(31,32,1), XCMPL_MASK, PPC|B64, { OBF, RA, RB } },
-{ "cmpl", X(31,32), XCMP_MASK, PPC, { BF, L, RA, RB } },
-{ "cmpl", X(31,32), XCMPL_MASK, POWER, { BF, RA, RB } },
-
-{ "subf", XO(31,40,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "sub", XO(31,40,0,0), XO_MASK, PPC, { RT, RB, RA } },
-{ "subf.", XO(31,40,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "sub.", XO(31,40,0,1), XO_MASK, PPC, { RT, RB, RA } },
-{ "subfo", XO(31,40,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "subo", XO(31,40,1,0), XO_MASK, PPC, { RT, RB, RA } },
-{ "subfo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "subo.", XO(31,40,1,1), XO_MASK, PPC, { RT, RB, RA } },
-
-{ "ldux", X(31,53), X_MASK, PPC|B64, { RT, RAL, RB } },
-
-{ "dcbst", X(31,54), XRT_MASK, PPC, { RA, RB } },
-
-{ "lwzux", X(31,55), X_MASK, PPC, { RT, RAL, RB } },
-{ "lux", X(31,55), X_MASK, POWER, { RT, RA, RB } },
-
-{ "cntlzd", XRC(31,58,0), XRB_MASK, PPC|B64, { RA, RS } },
-{ "cntlzd.", XRC(31,58,1), XRB_MASK, PPC|B64, { RA, RS } },
-
-{ "andc", XRC(31,60,0), X_MASK, PPC|POWER, { RA, RS, RB } },
-{ "andc.", XRC(31,60,1), X_MASK, PPC|POWER, { RA, RS, RB } },
-
-{ "tdlgt", XTO(31,68,TOLGT), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdllt", XTO(31,68,TOLLT), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdeq", XTO(31,68,TOEQ), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdlge", XTO(31,68,TOLGE), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdlnl", XTO(31,68,TOLNL), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdlle", XTO(31,68,TOLLE), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdlng", XTO(31,68,TOLNG), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdgt", XTO(31,68,TOGT), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdge", XTO(31,68,TOGE), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdnl", XTO(31,68,TONL), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdlt", XTO(31,68,TOLT), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdle", XTO(31,68,TOLE), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdng", XTO(31,68,TONG), XTO_MASK, PPC|B64, { RA, RB } },
-{ "tdne", XTO(31,68,TONE), XTO_MASK, PPC|B64, { RA, RB } },
-{ "td", X(31,68), X_MASK, PPC|B64, { TO, RA, RB } },
-
-{ "mulhd", XO(31,73,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "mulhd.", XO(31,73,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
-
-{ "mulhw", XO(31,75,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "mulhw.", XO(31,75,0,1), XO_MASK, PPC, { RT, RA, RB } },
-
-{ "mfmsr", X(31,83), XRARB_MASK, PPC|POWER, { RT } },
-
-{ "ldarx", X(31,84), X_MASK, PPC|B64, { RT, RA, RB } },
-
-{ "dcbf", X(31,86), XRT_MASK, PPC, { RA, RB } },
-
-{ "lbzx", X(31,87), X_MASK, PPC|POWER, { RT, RA, RB } },
-
-{ "neg", XO(31,104,0,0), XORB_MASK, PPC|POWER, { RT, RA } },
-{ "neg.", XO(31,104,0,1), XORB_MASK, PPC|POWER, { RT, RA } },
-{ "nego", XO(31,104,1,0), XORB_MASK, PPC|POWER, { RT, RA } },
-{ "nego.", XO(31,104,1,1), XORB_MASK, PPC|POWER, { RT, RA } },
-
-{ "mul", XO(31,107,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "mul.", XO(31,107,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "mulo", XO(31,107,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "mulo.", XO(31,107,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
-
-{ "clf", X(31,118), XRB_MASK, POWER, { RT, RA } },
-
-{ "lbzux", X(31,119), X_MASK, PPC|POWER, { RT, RAL, RB } },
-
-{ "not", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RBS } },
-{ "nor", XRC(31,124,0), X_MASK, PPC|POWER, { RA, RS, RB } },
-{ "not.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RBS } },
-{ "nor.", XRC(31,124,1), X_MASK, PPC|POWER, { RA, RS, RB } },
-
-{ "subfe", XO(31,136,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "sfe", XO(31,136,0,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "subfe.", XO(31,136,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "sfe.", XO(31,136,0,1), XO_MASK, POWER, { RT, RA, RB } },
-{ "subfeo", XO(31,136,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "sfeo", XO(31,136,1,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "subfeo.", XO(31,136,1,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "sfeo.", XO(31,136,1,1), XO_MASK, POWER, { RT, RA, RB } },
-
-{ "adde", XO(31,138,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "ae", XO(31,138,0,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "adde.", XO(31,138,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "ae.", XO(31,138,0,1), XO_MASK, POWER, { RT, RA, RB } },
-{ "addeo", XO(31,138,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "aeo", XO(31,138,1,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "addeo.", XO(31,138,1,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "aeo.", XO(31,138,1,1), XO_MASK, POWER, { RT, RA, RB } },
-
-{ "mtcr", XFXM(31,144,0xff), XFXFXM_MASK|FXM_MASK, PPC|POWER, { RS }},
-{ "mtcrf", X(31,144), XFXFXM_MASK, PPC|POWER, { FXM, RS } },
-
-{ "mtmsr", X(31,146), XRARB_MASK, PPC|POWER, { RS } },
-
-{ "stdx", X(31,149), X_MASK, PPC|B64, { RS, RA, RB } },
-
-{ "stwcx.", XRC(31,150,1), X_MASK, PPC, { RS, RA, RB } },
-
-{ "stwx", X(31,151), X_MASK, PPC, { RS, RA, RB } },
-{ "stx", X(31,151), X_MASK, POWER, { RS, RA, RB } },
-
-{ "slq", XRC(31,152,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "slq.", XRC(31,152,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "sle", XRC(31,153,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "sle.", XRC(31,153,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "stdux", X(31,181), X_MASK, PPC|B64, { RS, RAS, RB } },
-
-{ "stwux", X(31,183), X_MASK, PPC, { RS, RAS, RB } },
-{ "stux", X(31,183), X_MASK, POWER, { RS, RA, RB } },
-
-{ "sliq", XRC(31,184,0), X_MASK, POWER|M601, { RA, RS, SH } },
-{ "sliq.", XRC(31,184,1), X_MASK, POWER|M601, { RA, RS, SH } },
-
-{ "subfze", XO(31,200,0,0), XORB_MASK, PPC, { RT, RA } },
-{ "sfze", XO(31,200,0,0), XORB_MASK, POWER, { RT, RA } },
-{ "subfze.", XO(31,200,0,1), XORB_MASK, PPC, { RT, RA } },
-{ "sfze.", XO(31,200,0,1), XORB_MASK, POWER, { RT, RA } },
-{ "subfzeo", XO(31,200,1,0), XORB_MASK, PPC, { RT, RA } },
-{ "sfzeo", XO(31,200,1,0), XORB_MASK, POWER, { RT, RA } },
-{ "subfzeo.",XO(31,200,1,1), XORB_MASK, PPC, { RT, RA } },
-{ "sfzeo.", XO(31,200,1,1), XORB_MASK, POWER, { RT, RA } },
-
-{ "addze", XO(31,202,0,0), XORB_MASK, PPC, { RT, RA } },
-{ "aze", XO(31,202,0,0), XORB_MASK, POWER, { RT, RA } },
-{ "addze.", XO(31,202,0,1), XORB_MASK, PPC, { RT, RA } },
-{ "aze.", XO(31,202,0,1), XORB_MASK, POWER, { RT, RA } },
-{ "addzeo", XO(31,202,1,0), XORB_MASK, PPC, { RT, RA } },
-{ "azeo", XO(31,202,1,0), XORB_MASK, POWER, { RT, RA } },
-{ "addzeo.", XO(31,202,1,1), XORB_MASK, PPC, { RT, RA } },
-{ "azeo.", XO(31,202,1,1), XORB_MASK, POWER, { RT, RA } },
-
-{ "mtsr", X(31,210), XRB_MASK|(1<<20), PPC|POWER|B32, { SR, RS } },
-
-{ "stdcx.", XRC(31,214,1), X_MASK, PPC|B64, { RS, RA, RB } },
-
-{ "stbx", X(31,215), X_MASK, PPC|POWER, { RS, RA, RB } },
-
-{ "sllq", XRC(31,216,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "sllq.", XRC(31,216,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "sleq", XRC(31,217,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "sleq.", XRC(31,217,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "subfme", XO(31,232,0,0), XORB_MASK, PPC, { RT, RA } },
-{ "sfme", XO(31,232,0,0), XORB_MASK, POWER, { RT, RA } },
-{ "subfme.", XO(31,232,0,1), XORB_MASK, PPC, { RT, RA } },
-{ "sfme.", XO(31,232,0,1), XORB_MASK, POWER, { RT, RA } },
-{ "subfmeo", XO(31,232,1,0), XORB_MASK, PPC, { RT, RA } },
-{ "sfmeo", XO(31,232,1,0), XORB_MASK, POWER, { RT, RA } },
-{ "subfmeo.",XO(31,232,1,1), XORB_MASK, PPC, { RT, RA } },
-{ "sfmeo.", XO(31,232,1,1), XORB_MASK, POWER, { RT, RA } },
-
-{ "mulld", XO(31,233,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "mulld.", XO(31,233,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "mulldo", XO(31,233,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "mulldo.", XO(31,233,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
-
-{ "addme", XO(31,234,0,0), XORB_MASK, PPC, { RT, RA } },
-{ "ame", XO(31,234,0,0), XORB_MASK, POWER, { RT, RA } },
-{ "addme.", XO(31,234,0,1), XORB_MASK, PPC, { RT, RA } },
-{ "ame.", XO(31,234,0,1), XORB_MASK, POWER, { RT, RA } },
-{ "addmeo", XO(31,234,1,0), XORB_MASK, PPC, { RT, RA } },
-{ "ameo", XO(31,234,1,0), XORB_MASK, POWER, { RT, RA } },
-{ "addmeo.", XO(31,234,1,1), XORB_MASK, PPC, { RT, RA } },
-{ "ameo.", XO(31,234,1,1), XORB_MASK, POWER, { RT, RA } },
-
-{ "mullw", XO(31,235,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "muls", XO(31,235,0,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "mullw.", XO(31,235,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "muls.", XO(31,235,0,1), XO_MASK, POWER, { RT, RA, RB } },
-{ "mullwo", XO(31,235,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "mulso", XO(31,235,1,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "mullwo.", XO(31,235,1,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "mulso.", XO(31,235,1,1), XO_MASK, POWER, { RT, RA, RB } },
-
-{ "mtsrin", X(31,242), XRA_MASK, PPC|B32, { RS, RB } },
-{ "mtsri", X(31,242), XRA_MASK, POWER|B32, { RS, RB } },
-
-{ "dcbtst", X(31,246), XRT_MASK, PPC, { RA, RB } },
-
-{ "stbux", X(31,247), X_MASK, PPC|POWER, { RS, RAS, RB } },
-
-{ "slliq", XRC(31,248,0), X_MASK, POWER|M601, { RA, RS, SH } },
-{ "slliq.", XRC(31,248,1), X_MASK, POWER|M601, { RA, RS, SH } },
-
-{ "doz", XO(31,264,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "doz.", XO(31,264,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "dozo", XO(31,264,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "dozo.", XO(31,264,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
-
-{ "add", XO(31,266,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "cax", XO(31,266,0,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "add.", XO(31,266,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "cax.", XO(31,266,0,1), XO_MASK, POWER, { RT, RA, RB } },
-{ "addo", XO(31,266,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "caxo", XO(31,266,1,0), XO_MASK, POWER, { RT, RA, RB } },
-{ "addo.", XO(31,266,1,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "caxo.", XO(31,266,1,1), XO_MASK, POWER, { RT, RA, RB } },
-
-{ "lscbx", XRC(31,277,0), X_MASK, POWER|M601, { RT, RA, RB } },
-{ "lscbx.", XRC(31,277,1), X_MASK, POWER|M601, { RT, RA, RB } },
-
-{ "dcbt", X(31,278), XRT_MASK, PPC, { RA, RB } },
-
-{ "lhzx", X(31,279), X_MASK, PPC|POWER, { RT, RA, RB } },
-
-{ "icbt", X(31,262), XRT_MASK, PPC, { RA, RB } },
-
-{ "eqv", XRC(31,284,0), X_MASK, PPC|POWER, { RA, RS, RB } },
-{ "eqv.", XRC(31,284,1), X_MASK, PPC|POWER, { RA, RS, RB } },
-
-{ "tlbie", X(31,306), XRTRA_MASK, PPC, { RB } },
-{ "tlbi", X(31,306), XRTRA_MASK, POWER, { RB } },
-
-{ "eciwx", X(31,310), X_MASK, PPC, { RT, RA, RB } },
-
-{ "lhzux", X(31,311), X_MASK, PPC|POWER, { RT, RAL, RB } },
-
-{ "xor", XRC(31,316,0), X_MASK, PPC|POWER, { RA, RS, RB } },
-{ "xor.", XRC(31,316,1), X_MASK, PPC|POWER, { RA, RS, RB } },
-
-{ "mfdcr", X(31,323), X_MASK, PPC, { RT, SPR } },
-
-{ "div", XO(31,331,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "div.", XO(31,331,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "divo", XO(31,331,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "divo.", XO(31,331,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
-
-{ "mfmq", XSPR(31,339,0), XSPR_MASK, POWER|M601, { RT } },
-{ "mfxer", XSPR(31,339,1), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfrtcu", XSPR(31,339,4), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfrtcl", XSPR(31,339,5), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfdec", XSPR(31,339,6), XSPR_MASK, POWER|M601, { RT } },
-{ "mflr", XSPR(31,339,8), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfctr", XSPR(31,339,9), XSPR_MASK, PPC|POWER, { RT } },
-{ "mftid", XSPR(31,339,17), XSPR_MASK, POWER, { RT } },
-{ "mfdsisr", XSPR(31,339,18), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfdar", XSPR(31,339,19), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfdec", XSPR(31,339,22), XSPR_MASK, PPC, { RT } },
-{ "mfsdr0", XSPR(31,339,24), XSPR_MASK, POWER, { RT } },
-{ "mfsdr1", XSPR(31,339,25), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfsrr0", XSPR(31,339,26), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfsrr1", XSPR(31,339,27), XSPR_MASK, PPC|POWER, { RT } },
-{ "mfsprg", XSPR(31,339,272), XSPRG_MASK, PPC, { RT, SPRG } },
-{ "mfasr", XSPR(31,339,280), XSPR_MASK, PPC|B64, { RT } },
-{ "mfear", XSPR(31,339,282), XSPR_MASK, PPC, { RT } },
-{ "mfpvr", XSPR(31,339,287), XSPR_MASK, PPC, { RT } },
-{ "mfibatu", XSPR(31,339,528), XSPRBAT_MASK, PPC, { RT, SPRBAT } },
-{ "mfibatl", XSPR(31,339,529), XSPRBAT_MASK, PPC, { RT, SPRBAT } },
-{ "mfdbatu", XSPR(31,339,536), XSPRBAT_MASK, PPC, { RT, SPRBAT } },
-{ "mfdbatl", XSPR(31,339,537), XSPRBAT_MASK, PPC, { RT, SPRBAT } },
-{ "mfspr", X(31,339), X_MASK, PPC|POWER, { RT, SPR } },
-
-{ "lwax", X(31,341), X_MASK, PPC|B64, { RT, RA, RB } },
-
-{ "lhax", X(31,343), X_MASK, PPC|POWER, { RT, RA, RB } },
-
-{ "dccci", X(31,454), XRT_MASK, PPC, { RA, RB } },
-
-{ "abs", XO(31,360,0,0), XORB_MASK, POWER|M601, { RT, RA } },
-{ "abs.", XO(31,360,0,1), XORB_MASK, POWER|M601, { RT, RA } },
-{ "abso", XO(31,360,1,0), XORB_MASK, POWER|M601, { RT, RA } },
-{ "abso.", XO(31,360,1,1), XORB_MASK, POWER|M601, { RT, RA } },
-
-{ "divs", XO(31,363,0,0), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "divs.", XO(31,363,0,1), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "divso", XO(31,363,1,0), XO_MASK, POWER|M601, { RT, RA, RB } },
-{ "divso.", XO(31,363,1,1), XO_MASK, POWER|M601, { RT, RA, RB } },
-
-{ "tlbia", X(31,370), 0xffffffff, PPC, { 0 } },
-
-{ "mftbu", XSPR(31,371,269), XSPR_MASK, PPC, { RT } },
-{ "mftb", X(31,371), X_MASK, PPC, { RT, TBR } },
-
-{ "lwaux", X(31,373), X_MASK, PPC|B64, { RT, RAL, RB } },
-
-{ "lhaux", X(31,375), X_MASK, PPC|POWER, { RT, RAL, RB } },
-
-{ "sthx", X(31,407), X_MASK, PPC|POWER, { RS, RA, RB } },
-
-{ "lfqx", X(31,791), X_MASK, POWER2, { FRT, RA, RB } },
-
-{ "lfqux", X(31,823), X_MASK, POWER2, { FRT, RA, RB } },
-
-{ "stfqx", X(31,919), X_MASK, POWER2, { FRS, RA, RB } },
-
-{ "stfqux", X(31,951), X_MASK, POWER2, { FRS, RA, RB } },
-
-{ "orc", XRC(31,412,0), X_MASK, PPC|POWER, { RA, RS, RB } },
-{ "orc.", XRC(31,412,1), X_MASK, PPC|POWER, { RA, RS, RB } },
-
-{ "sradi", XS(31,413,0), XS_MASK, PPC|B64, { RA, RS, SH6 } },
-{ "sradi.", XS(31,413,1), XS_MASK, PPC|B64, { RA, RS, SH6 } },
-
-{ "slbie", X(31,434), XRTRA_MASK, PPC|B64, { RB } },
-
-{ "ecowx", X(31,438), X_MASK, PPC, { RT, RA, RB } },
-
-{ "sthux", X(31,439), X_MASK, PPC|POWER, { RS, RAS, RB } },
-
-{ "mr", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RBS } },
-{ "or", XRC(31,444,0), X_MASK, PPC|POWER, { RA, RS, RB } },
-{ "mr.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RBS } },
-{ "or.", XRC(31,444,1), X_MASK, PPC|POWER, { RA, RS, RB } },
-
-{ "mtdcr", X(31,451), X_MASK, PPC, { SPR, RS } },
-
-{ "divdu", XO(31,457,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "divdu.", XO(31,457,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "divduo", XO(31,457,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "divduo.", XO(31,457,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
-
-{ "divwu", XO(31,459,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "divwu.", XO(31,459,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "divwuo", XO(31,459,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "divwuo.", XO(31,459,1,1), XO_MASK, PPC, { RT, RA, RB } },
-
-{ "mtmq", XSPR(31,467,0), XSPR_MASK, POWER|M601, { RS } },
-{ "mtxer", XSPR(31,467,1), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtlr", XSPR(31,467,8), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtctr", XSPR(31,467,9), XSPR_MASK, PPC|POWER, { RS } },
-{ "mttid", XSPR(31,467,17), XSPR_MASK, POWER, { RS } },
-{ "mtdsisr", XSPR(31,467,18), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtdar", XSPR(31,467,19), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtrtcu", XSPR(31,467,20), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtrtcl", XSPR(31,467,21), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtdec", XSPR(31,467,22), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtsdr0", XSPR(31,467,24), XSPR_MASK, POWER, { RS } },
-{ "mtsdr1", XSPR(31,467,25), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtsrr0", XSPR(31,467,26), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtsrr1", XSPR(31,467,27), XSPR_MASK, PPC|POWER, { RS } },
-{ "mtsprg", XSPR(31,467,272), XSPRG_MASK, PPC, { SPRG, RS } },
-{ "mtasr", XSPR(31,467,280), XSPR_MASK, PPC|B64, { RS } },
-{ "mtear", XSPR(31,467,282), XSPR_MASK, PPC, { RS } },
-{ "mttbl", XSPR(31,467,284), XSPR_MASK, PPC, { RS } },
-{ "mttbu", XSPR(31,467,285), XSPR_MASK, PPC, { RS } },
-{ "mtibatu", XSPR(31,467,528), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
-{ "mtibatl", XSPR(31,467,529), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
-{ "mtdbatu", XSPR(31,467,536), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
-{ "mtdbatl", XSPR(31,467,537), XSPRBAT_MASK, PPC, { SPRBAT, RS } },
-{ "mtspr", X(31,467), X_MASK, PPC|POWER, { SPR, RS } },
-
-{ "dcbi", X(31,470), XRT_MASK, PPC, { RA, RB } },
-
-{ "nand", XRC(31,476,0), X_MASK, PPC|POWER, { RA, RS, RB } },
-{ "nand.", XRC(31,476,1), X_MASK, PPC|POWER, { RA, RS, RB } },
-
-{ "nabs", XO(31,488,0,0), XORB_MASK, POWER|M601, { RT, RA } },
-{ "nabs.", XO(31,488,0,1), XORB_MASK, POWER|M601, { RT, RA } },
-{ "nabso", XO(31,488,1,0), XORB_MASK, POWER|M601, { RT, RA } },
-{ "nabso.", XO(31,488,1,1), XORB_MASK, POWER|M601, { RT, RA } },
-
-{ "divd", XO(31,489,0,0), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "divd.", XO(31,489,0,1), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "divdo", XO(31,489,1,0), XO_MASK, PPC|B64, { RT, RA, RB } },
-{ "divdo.", XO(31,489,1,1), XO_MASK, PPC|B64, { RT, RA, RB } },
-
-{ "divw", XO(31,491,0,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "divw.", XO(31,491,0,1), XO_MASK, PPC, { RT, RA, RB } },
-{ "divwo", XO(31,491,1,0), XO_MASK, PPC, { RT, RA, RB } },
-{ "divwo.", XO(31,491,1,1), XO_MASK, PPC, { RT, RA, RB } },
-
-{ "slbia", X(31,498), 0xffffffff, PPC|B64, { 0 } },
-
-{ "cli", X(31,502), XRB_MASK, POWER, { RT, RA } },
-
-{ "mcrxr", X(31,512), XRARB_MASK|(3<<21), PPC|POWER, { BF } },
-
-{ "clcs", X(31,531), XRB_MASK, POWER|M601, { RT, RA } },
-
-{ "lswx", X(31,533), X_MASK, PPC, { RT, RA, RB } },
-{ "lsx", X(31,533), X_MASK, POWER, { RT, RA, RB } },
-
-{ "lwbrx", X(31,534), X_MASK, PPC, { RT, RA, RB } },
-{ "lbrx", X(31,534), X_MASK, POWER, { RT, RA, RB } },
-
-{ "lfsx", X(31,535), X_MASK, PPC|POWER, { FRT, RA, RB } },
-
-{ "srw", XRC(31,536,0), X_MASK, PPC, { RA, RS, RB } },
-{ "sr", XRC(31,536,0), X_MASK, POWER, { RA, RS, RB } },
-{ "srw.", XRC(31,536,1), X_MASK, PPC, { RA, RS, RB } },
-{ "sr.", XRC(31,536,1), X_MASK, POWER, { RA, RS, RB } },
-
-{ "rrib", XRC(31,537,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "rrib.", XRC(31,537,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "srd", XRC(31,539,0), X_MASK, PPC|B64, { RA, RS, RB } },
-{ "srd.", XRC(31,539,1), X_MASK, PPC|B64, { RA, RS, RB } },
-
-{ "maskir", XRC(31,541,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "maskir.", XRC(31,541,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "tlbsync", X(31,566), 0xffffffff, PPC, { 0 } },
-
-{ "lfsux", X(31,567), X_MASK, PPC|POWER, { FRT, RAS, RB } },
-
-{ "mfsr", X(31,595), XRB_MASK|(1<<20), PPC|POWER|B32, { RT, SR } },
-
-{ "lswi", X(31,597), X_MASK, PPC, { RT, RA, NB } },
-{ "lsi", X(31,597), X_MASK, POWER, { RT, RA, NB } },
-
-{ "sync", X(31,598), 0xffffffff, PPC, { 0 } },
-{ "dcs", X(31,598), 0xffffffff, POWER, { 0 } },
-
-{ "lfdx", X(31,599), X_MASK, PPC|POWER, { FRT, RA, RB } },
-
-{ "mfsri", X(31,627), X_MASK, POWER, { RT, RA, RB } },
-
-{ "dclst", X(31,630), XRB_MASK, POWER, { RS, RA } },
-
-{ "lfdux", X(31,631), X_MASK, PPC|POWER, { FRT, RAS, RB } },
-
-{ "mfsrin", X(31,659), XRA_MASK, PPC|B32, { RT, RB } },
-
-{ "stswx", X(31,661), X_MASK, PPC, { RS, RA, RB } },
-{ "stsx", X(31,661), X_MASK, POWER, { RS, RA, RB } },
-
-{ "stwbrx", X(31,662), X_MASK, PPC, { RS, RA, RB } },
-{ "stbrx", X(31,662), X_MASK, POWER, { RS, RA, RB } },
-
-{ "stfsx", X(31,663), X_MASK, PPC|POWER, { FRS, RA, RB } },
-
-{ "srq", XRC(31,664,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "srq.", XRC(31,664,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "sre", XRC(31,665,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "sre.", XRC(31,665,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "stfsux", X(31,695), X_MASK, PPC|POWER, { FRS, RAS, RB } },
-
-{ "sriq", XRC(31,696,0), X_MASK, POWER|M601, { RA, RS, SH } },
-{ "sriq.", XRC(31,696,1), X_MASK, POWER|M601, { RA, RS, SH } },
-
-{ "stswi", X(31,725), X_MASK, PPC, { RS, RA, NB } },
-{ "stsi", X(31,725), X_MASK, POWER, { RS, RA, NB } },
-
-{ "stfdx", X(31,727), X_MASK, PPC|POWER, { FRS, RA, RB } },
-
-{ "srlq", XRC(31,728,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "srlq.", XRC(31,728,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "sreq", XRC(31,729,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "sreq.", XRC(31,729,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "stfdux", X(31,759), X_MASK, PPC|POWER, { FRS, RAS, RB } },
-
-{ "srliq", XRC(31,760,0), X_MASK, POWER|M601, { RA, RS, SH } },
-{ "srliq.", XRC(31,760,1), X_MASK, POWER|M601, { RA, RS, SH } },
-
-{ "lhbrx", X(31,790), X_MASK, PPC|POWER, { RT, RA, RB } },
-
-{ "sraw", XRC(31,792,0), X_MASK, PPC, { RA, RS, RB } },
-{ "sra", XRC(31,792,0), X_MASK, POWER, { RA, RS, RB } },
-{ "sraw.", XRC(31,792,1), X_MASK, PPC, { RA, RS, RB } },
-{ "sra.", XRC(31,792,1), X_MASK, POWER, { RA, RS, RB } },
-
-{ "srad", XRC(31,794,0), X_MASK, PPC|B64, { RA, RS, RB } },
-{ "srad.", XRC(31,794,1), X_MASK, PPC|B64, { RA, RS, RB } },
-
-{ "rac", X(31,818), X_MASK, POWER, { RT, RA, RB } },
-
-{ "srawi", XRC(31,824,0), X_MASK, PPC, { RA, RS, SH } },
-{ "srai", XRC(31,824,0), X_MASK, POWER, { RA, RS, SH } },
-{ "srawi.", XRC(31,824,1), X_MASK, PPC, { RA, RS, SH } },
-{ "srai.", XRC(31,824,1), X_MASK, POWER, { RA, RS, SH } },
-
-{ "eieio", X(31,854), 0xffffffff, PPC, { 0 } },
-
-{ "sthbrx", X(31,918), X_MASK, PPC|POWER, { RS, RA, RB } },
-
-{ "sraq", XRC(31,920,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "sraq.", XRC(31,920,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "srea", XRC(31,921,0), X_MASK, POWER|M601, { RA, RS, RB } },
-{ "srea.", XRC(31,921,1), X_MASK, POWER|M601, { RA, RS, RB } },
-
-{ "extsh", XRC(31,922,0), XRB_MASK, PPC, { RA, RS } },
-{ "exts", XRC(31,922,0), XRB_MASK, POWER, { RA, RS } },
-{ "extsh.", XRC(31,922,1), XRB_MASK, PPC, { RA, RS } },
-{ "exts.", XRC(31,922,1), XRB_MASK, POWER, { RA, RS } },
-
-{ "sraiq", XRC(31,952,0), X_MASK, POWER|M601, { RA, RS, SH } },
-{ "sraiq.", XRC(31,952,1), X_MASK, POWER|M601, { RA, RS, SH } },
-
-{ "extsb", XRC(31,954,0), XRB_MASK, PPC, { RA, RS} },
-{ "extsb.", XRC(31,954,1), XRB_MASK, PPC, { RA, RS} },
-
-{ "iccci", X(31,966), XRT_MASK, PPC, { RA, RB } },
-
-{ "icbi", X(31,982), XRT_MASK, PPC, { RA, RB } },
-
-{ "stfiwx", X(31,983), X_MASK, PPC, { FRS, RA, RB } },
-
-{ "extsw", XRC(31,986,0), XRB_MASK, PPC, { RA, RS } },
-{ "extsw.", XRC(31,986,1), XRB_MASK, PPC, { RA, RS } },
-
-{ "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
-{ "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } },
-
-{ "lwz", OP(32), OP_MASK, PPC, { RT, D, RA } },
-{ "l", OP(32), OP_MASK, POWER, { RT, D, RA } },
-
-{ "lwzu", OP(33), OP_MASK, PPC, { RT, D, RAL } },
-{ "lu", OP(33), OP_MASK, POWER, { RT, D, RA } },
-
-{ "lbz", OP(34), OP_MASK, PPC|POWER, { RT, D, RA } },
-
-{ "lbzu", OP(35), OP_MASK, PPC|POWER, { RT, D, RAL } },
-
-{ "stw", OP(36), OP_MASK, PPC, { RS, D, RA } },
-{ "st", OP(36), OP_MASK, POWER, { RS, D, RA } },
-
-{ "stwu", OP(37), OP_MASK, PPC, { RS, D, RAS } },
-{ "stu", OP(37), OP_MASK, POWER, { RS, D, RA } },
-
-{ "stb", OP(38), OP_MASK, PPC|POWER, { RS, D, RA } },
-
-{ "stbu", OP(39), OP_MASK, PPC|POWER, { RS, D, RAS } },
-
-{ "lhz", OP(40), OP_MASK, PPC|POWER, { RT, D, RA } },
-
-{ "lhzu", OP(41), OP_MASK, PPC|POWER, { RT, D, RAL } },
-
-{ "lha", OP(42), OP_MASK, PPC|POWER, { RT, D, RA } },
-
-{ "lhau", OP(43), OP_MASK, PPC|POWER, { RT, D, RAL } },
-
-{ "sth", OP(44), OP_MASK, PPC|POWER, { RS, D, RA } },
-
-{ "sthu", OP(45), OP_MASK, PPC|POWER, { RS, D, RAS } },
-
-{ "lmw", OP(46), OP_MASK, PPC, { RT, D, RAM } },
-{ "lm", OP(46), OP_MASK, POWER, { RT, D, RA } },
-
-{ "stmw", OP(47), OP_MASK, PPC, { RS, D, RA } },
-{ "stm", OP(47), OP_MASK, POWER, { RS, D, RA } },
-
-{ "lfs", OP(48), OP_MASK, PPC|POWER, { FRT, D, RA } },
-
-{ "lfsu", OP(49), OP_MASK, PPC|POWER, { FRT, D, RAS } },
-
-{ "lfd", OP(50), OP_MASK, PPC|POWER, { FRT, D, RA } },
-
-{ "lfdu", OP(51), OP_MASK, PPC|POWER, { FRT, D, RAS } },
-
-{ "stfs", OP(52), OP_MASK, PPC|POWER, { FRS, D, RA } },
-
-{ "stfsu", OP(53), OP_MASK, PPC|POWER, { FRS, D, RAS } },
-
-{ "stfd", OP(54), OP_MASK, PPC|POWER, { FRS, D, RA } },
-
-{ "stfdu", OP(55), OP_MASK, PPC|POWER, { FRS, D, RAS } },
-
-{ "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA } },
-
-{ "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA } },
-
-{ "ld", DSO(58,0), DS_MASK, PPC|B64, { RT, DS, RA } },
-
-{ "ldu", DSO(58,1), DS_MASK, PPC|B64, { RT, DS, RAL } },
-
-{ "lwa", DSO(58,2), DS_MASK, PPC|B64, { RT, DS, RA } },
-
-{ "fdivs", A(59,18,0), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fdivs.", A(59,18,1), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-
-{ "fsubs", A(59,20,0), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fsubs.", A(59,20,1), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-
-{ "fadds", A(59,21,0), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fadds.", A(59,21,1), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-
-{ "fsqrts", A(59,22,0), AFRAFRC_MASK, PPC, { FRT, FRB } },
-{ "fsqrts.", A(59,22,1), AFRAFRC_MASK, PPC, { FRT, FRB } },
-
-{ "fres", A(59,24,0), AFRAFRC_MASK, PPC, { FRT, FRB } },
-{ "fres.", A(59,24,1), AFRAFRC_MASK, PPC, { FRT, FRB } },
-
-{ "fmuls", A(59,25,0), AFRB_MASK, PPC, { FRT, FRA, FRC } },
-{ "fmuls.", A(59,25,1), AFRB_MASK, PPC, { FRT, FRA, FRC } },
-
-{ "fmsubs", A(59,28,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fmsubs.", A(59,28,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-
-{ "fmadds", A(59,29,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fmadds.", A(59,29,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-
-{ "fnmsubs", A(59,30,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fnmsubs.",A(59,30,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-
-{ "fnmadds", A(59,31,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fnmadds.",A(59,31,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-
-{ "stfq", OP(60), OP_MASK, POWER2, { FRS, D, RA } },
-
-{ "stfqu", OP(61), OP_MASK, POWER2, { FRS, D, RA } },
-
-{ "std", DSO(62,0), DS_MASK, PPC|B64, { RS, DS, RA } },
-
-{ "stdu", DSO(62,1), DS_MASK, PPC|B64, { RS, DS, RAS } },
-
-{ "fcmpu", X(63,0), X_MASK|(3<<21), PPC|POWER, { BF, FRA, FRB } },
-
-{ "frsp", XRC(63,12,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
-{ "frsp.", XRC(63,12,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
-
-{ "fctiw", XRC(63,14,0), XRA_MASK, PPC, { FRT, FRB } },
-{ "fcir", XRC(63,14,0), XRA_MASK, POWER2, { FRT, FRB } },
-{ "fctiw.", XRC(63,14,1), XRA_MASK, PPC, { FRT, FRB } },
-{ "fcir.", XRC(63,14,1), XRA_MASK, POWER2, { FRT, FRB } },
-
-{ "fctiwz", XRC(63,15,0), XRA_MASK, PPC, { FRT, FRB } },
-{ "fcirz", XRC(63,15,0), XRA_MASK, POWER2, { FRT, FRB } },
-{ "fctiwz.", XRC(63,15,1), XRA_MASK, PPC, { FRT, FRB } },
-{ "fcirz.", XRC(63,15,1), XRA_MASK, POWER2, { FRT, FRB } },
-
-{ "fdiv", A(63,18,0), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fd", A(63,18,0), AFRC_MASK, POWER, { FRT, FRA, FRB } },
-{ "fdiv.", A(63,18,1), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fd.", A(63,18,1), AFRC_MASK, POWER, { FRT, FRA, FRB } },
-
-{ "fsub", A(63,20,0), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fs", A(63,20,0), AFRC_MASK, POWER, { FRT, FRA, FRB } },
-{ "fsub.", A(63,20,1), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fs.", A(63,20,1), AFRC_MASK, POWER, { FRT, FRA, FRB } },
-
-{ "fadd", A(63,21,0), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fa", A(63,21,0), AFRC_MASK, POWER, { FRT, FRA, FRB } },
-{ "fadd.", A(63,21,1), AFRC_MASK, PPC, { FRT, FRA, FRB } },
-{ "fa.", A(63,21,1), AFRC_MASK, POWER, { FRT, FRA, FRB } },
-
-{ "fsqrt", A(63,22,0), AFRAFRC_MASK, PPC|POWER2, { FRT, FRB } },
-{ "fsqrt.", A(63,22,1), AFRAFRC_MASK, PPC|POWER2, { FRT, FRB } },
-
-{ "fsel", A(63,23,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fsel.", A(63,23,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-
-{ "fmul", A(63,25,0), AFRB_MASK, PPC, { FRT, FRA, FRC } },
-{ "fm", A(63,25,0), AFRB_MASK, POWER, { FRT, FRA, FRC } },
-{ "fmul.", A(63,25,1), AFRB_MASK, PPC, { FRT, FRA, FRC } },
-{ "fm.", A(63,25,1), AFRB_MASK, POWER, { FRT, FRA, FRC } },
-
-{ "frsqrte", A(63,26,0), AFRAFRC_MASK, PPC, { FRT, FRB } },
-{ "frsqrte.",A(63,26,1), AFRAFRC_MASK, PPC, { FRT, FRB } },
-
-{ "fmsub", A(63,28,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fms", A(63,28,0), A_MASK, POWER, { FRT,FRA,FRC,FRB } },
-{ "fmsub.", A(63,28,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fms.", A(63,28,1), A_MASK, POWER, { FRT,FRA,FRC,FRB } },
-
-{ "fmadd", A(63,29,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fma", A(63,29,0), A_MASK, POWER, { FRT,FRA,FRC,FRB } },
-{ "fmadd.", A(63,29,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fma.", A(63,29,1), A_MASK, POWER, { FRT,FRA,FRC,FRB } },
-
-{ "fnmsub", A(63,30,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fnms", A(63,30,0), A_MASK, POWER, { FRT,FRA,FRC,FRB } },
-{ "fnmsub.", A(63,30,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fnms.", A(63,30,1), A_MASK, POWER, { FRT,FRA,FRC,FRB } },
-
-{ "fnmadd", A(63,31,0), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fnma", A(63,31,0), A_MASK, POWER, { FRT,FRA,FRC,FRB } },
-{ "fnmadd.", A(63,31,1), A_MASK, PPC, { FRT,FRA,FRC,FRB } },
-{ "fnma.", A(63,31,1), A_MASK, POWER, { FRT,FRA,FRC,FRB } },
-
-{ "fcmpo", X(63,30), X_MASK|(3<<21), PPC|POWER, { BF, FRA, FRB } },
-
-{ "mtfsb1", XRC(63,38,0), XRARB_MASK, PPC|POWER, { BT } },
-{ "mtfsb1.", XRC(63,38,1), XRARB_MASK, PPC|POWER, { BT } },
-
-{ "fneg", XRC(63,40,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
-{ "fneg.", XRC(63,40,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
-
-{ "mcrfs", X(63,64), XRB_MASK|(3<<21)|(3<<16), PPC|POWER, { BF, BFA } },
-
-{ "mtfsb0", XRC(63,70,0), XRARB_MASK, PPC|POWER, { BT } },
-{ "mtfsb0.", XRC(63,70,1), XRARB_MASK, PPC|POWER, { BT } },
-
-{ "fmr", XRC(63,72,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
-{ "fmr.", XRC(63,72,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
-
-{ "mtfsfi", XRC(63,134,0), XRA_MASK|(3<<21)|(1<<11), PPC|POWER, { BF, U } },
-{ "mtfsfi.", XRC(63,134,1), XRA_MASK|(3<<21)|(1<<11), PPC|POWER, { BF, U } },
-
-{ "fnabs", XRC(63,136,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
-{ "fnabs.", XRC(63,136,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
-
-{ "fabs", XRC(63,264,0), XRA_MASK, PPC|POWER, { FRT, FRB } },
-{ "fabs.", XRC(63,264,1), XRA_MASK, PPC|POWER, { FRT, FRB } },
-
-{ "mffs", XRC(63,583,0), XRARB_MASK, PPC|POWER, { FRT } },
-{ "mffs.", XRC(63,583,1), XRARB_MASK, PPC|POWER, { FRT } },
-
-{ "mtfsf", XFL(63,711,0), XFL_MASK, PPC|POWER, { FLM, FRB } },
-{ "mtfsf.", XFL(63,711,1), XFL_MASK, PPC|POWER, { FLM, FRB } },
-
-{ "fctid", XRC(63,814,0), XRA_MASK, PPC|B64, { FRT, FRB } },
-{ "fctid.", XRC(63,814,1), XRA_MASK, PPC|B64, { FRT, FRB } },
-
-{ "fctidz", XRC(63,815,0), XRA_MASK, PPC|B64, { FRT, FRB } },
-{ "fctidz.", XRC(63,815,1), XRA_MASK, PPC|B64, { FRT, FRB } },
-
-{ "fcfid", XRC(63,846,0), XRA_MASK, PPC|B64, { FRT, FRB } },
-{ "fcfid.", XRC(63,846,1), XRA_MASK, PPC|B64, { FRT, FRB } },
-
-};
-
-const int powerpc_num_opcodes = ARRAY_SIZE(powerpc_opcodes);
-
-/* The macro table. This is only used by the assembler. */
-
-const struct powerpc_macro powerpc_macros[] = {
-{ "extldi", 4, PPC|B64, "rldicr %0,%1,%3,(%2)-1" },
-{ "extldi.", 4, PPC|B64, "rldicr. %0,%1,%3,(%2)-1" },
-{ "extrdi", 4, PPC|B64, "rldicl %0,%1,(%2)+(%3),64-(%2)" },
-{ "extrdi.", 4, PPC|B64, "rldicl. %0,%1,(%2)+(%3),64-(%2)" },
-{ "insrdi", 4, PPC|B64, "rldimi %0,%1,64-((%2)+(%3)),%3" },
-{ "insrdi.", 4, PPC|B64, "rldimi. %0,%1,64-((%2)+(%3)),%3" },
-{ "rotrdi", 3, PPC|B64, "rldicl %0,%1,64-(%2),0" },
-{ "rotrdi.", 3, PPC|B64, "rldicl. %0,%1,64-(%2),0" },
-{ "sldi", 3, PPC|B64, "rldicr %0,%1,%2,63-(%2)" },
-{ "sldi.", 3, PPC|B64, "rldicr. %0,%1,%2,63-(%2)" },
-{ "srdi", 3, PPC|B64, "rldicl %0,%1,64-(%2),%2" },
-{ "srdi.", 3, PPC|B64, "rldicl. %0,%1,64-(%2),%2" },
-{ "clrrdi", 3, PPC|B64, "rldicr %0,%1,0,63-(%2)" },
-{ "clrrdi.", 3, PPC|B64, "rldicr. %0,%1,0,63-(%2)" },
-{ "clrlsldi",4, PPC|B64, "rldic %0,%1,%3,(%2)-(%3)" },
-{ "clrlsldi.",4, PPC|B64, "rldic. %0,%1,%3,(%2)-(%3)" },
-
-{ "extlwi", 4, PPC, "rlwinm %0,%1,%3,0,(%2)-1" },
-{ "extlwi.", 4, PPC, "rlwinm. %0,%1,%3,0,(%2)-1" },
-{ "extrwi", 4, PPC, "rlwinm %0,%1,(%2)+(%3),32-(%2),31" },
-{ "extrwi.", 4, PPC, "rlwinm. %0,%1,(%2)+(%3),32-(%2),31" },
-{ "inslwi", 4, PPC, "rlwimi %0,%1,32-(%3),%3,(%2)+(%3)-1" },
-{ "inslwi.", 4, PPC, "rlwimi. %0,%1,32-(%3),%3,(%2)+(%3)-1" },
-{ "insrwi", 4, PPC, "rlwimi %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1" },
-{ "insrwi.", 4, PPC, "rlwimi. %0,%1,32-((%2)+(%3)),%3,(%2)+(%3)-1"},
-{ "rotrwi", 3, PPC, "rlwinm %0,%1,32-(%2),0,31" },
-{ "rotrwi.", 3, PPC, "rlwinm. %0,%1,32-(%2),0,31" },
-{ "slwi", 3, PPC, "rlwinm %0,%1,%2,0,31-(%2)" },
-{ "sli", 3, POWER, "rlinm %0,%1,%2,0,31-(%2)" },
-{ "slwi.", 3, PPC, "rlwinm. %0,%1,%2,0,31-(%2)" },
-{ "sli.", 3, POWER, "rlinm. %0,%1,%2,0,31-(%2)" },
-{ "srwi", 3, PPC, "rlwinm %0,%1,32-(%2),%2,31" },
-{ "sri", 3, POWER, "rlinm %0,%1,32-(%2),%2,31" },
-{ "srwi.", 3, PPC, "rlwinm. %0,%1,32-(%2),%2,31" },
-{ "sri.", 3, POWER, "rlinm. %0,%1,32-(%2),%2,31" },
-{ "clrrwi", 3, PPC, "rlwinm %0,%1,0,0,31-(%2)" },
-{ "clrrwi.", 3, PPC, "rlwinm. %0,%1,0,0,31-(%2)" },
-{ "clrlslwi",4, PPC, "rlwinm %0,%1,%3,(%2)-(%3),31-(%3)" },
-{ "clrlslwi.",4, PPC, "rlwinm. %0,%1,%3,(%2)-(%3),31-(%3)" },
-
-};
-
-const int powerpc_num_macros = ARRAY_SIZE(powerpc_macros);
diff --git a/arch/ppc/xmon/ppc.h b/arch/ppc/xmon/ppc.h
deleted file mode 100644
index 2345ecb..0000000
--- a/arch/ppc/xmon/ppc.h
+++ /dev/null
@@ -1,240 +0,0 @@
-/* ppc.h -- Header file for PowerPC opcode table
- Copyright 1994 Free Software Foundation, Inc.
- Written by Ian Lance Taylor, Cygnus Support
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef PPC_H
-#define PPC_H
-
-/* The opcode table is an array of struct powerpc_opcode. */
-
-struct powerpc_opcode
-{
- /* The opcode name. */
- const char *name;
-
- /* The opcode itself. Those bits which will be filled in with
- operands are zeroes. */
- unsigned long opcode;
-
- /* The opcode mask. This is used by the disassembler. This is a
- mask containing ones indicating those bits which must match the
- opcode field, and zeroes indicating those bits which need not
- match (and are presumably filled in by operands). */
- unsigned long mask;
-
- /* One bit flags for the opcode. These are used to indicate which
- specific processors support the instructions. The defined values
- are listed below. */
- unsigned long flags;
-
- /* An array of operand codes. Each code is an index into the
- operand table. They appear in the order which the operands must
- appear in assembly code, and are terminated by a zero. */
- unsigned char operands[8];
-};
-
-/* The table itself is sorted by major opcode number, and is otherwise
- in the order in which the disassembler should consider
- instructions. */
-extern const struct powerpc_opcode powerpc_opcodes[];
-extern const int powerpc_num_opcodes;
-
-/* Values defined for the flags field of a struct powerpc_opcode. */
-
-/* Opcode is defined for the PowerPC architecture. */
-#define PPC_OPCODE_PPC (01)
-
-/* Opcode is defined for the POWER (RS/6000) architecture. */
-#define PPC_OPCODE_POWER (02)
-
-/* Opcode is defined for the POWER2 (Rios 2) architecture. */
-#define PPC_OPCODE_POWER2 (04)
-
-/* Opcode is only defined on 32 bit architectures. */
-#define PPC_OPCODE_32 (010)
-
-/* Opcode is only defined on 64 bit architectures. */
-#define PPC_OPCODE_64 (020)
-
-/* Opcode is supported by the Motorola PowerPC 601 processor. The 601
- is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions,
- but it also supports many additional POWER instructions. */
-#define PPC_OPCODE_601 (040)
-
-/* A macro to extract the major opcode from an instruction. */
-#define PPC_OP(i) (((i) >> 26) & 0x3f)
-
-/* The operands table is an array of struct powerpc_operand. */
-
-struct powerpc_operand
-{
- /* The number of bits in the operand. */
- int bits;
-
- /* How far the operand is left shifted in the instruction. */
- int shift;
-
- /* Insertion function. This is used by the assembler. To insert an
- operand value into an instruction, check this field.
-
- If it is NULL, execute
- i |= (op & ((1 << o->bits) - 1)) << o->shift;
- (i is the instruction which we are filling in, o is a pointer to
- this structure, and op is the opcode value; this assumes twos
- complement arithmetic).
-
- If this field is not NULL, then simply call it with the
- instruction and the operand value. It will return the new value
- of the instruction. If the ERRMSG argument is not NULL, then if
- the operand value is illegal, *ERRMSG will be set to a warning
- string (the operand will be inserted in any case). If the
- operand value is legal, *ERRMSG will be unchanged (most operands
- can accept any value). */
- unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
- const char **errmsg));
-
- /* Extraction function. This is used by the disassembler. To
- extract this operand type from an instruction, check this field.
-
- If it is NULL, compute
- op = ((i) >> o->shift) & ((1 << o->bits) - 1);
- if ((o->flags & PPC_OPERAND_SIGNED) != 0
- && (op & (1 << (o->bits - 1))) != 0)
- op -= 1 << o->bits;
- (i is the instruction, o is a pointer to this structure, and op
- is the result; this assumes twos complement arithmetic).
-
- If this field is not NULL, then simply call it with the
- instruction value. It will return the value of the operand. If
- the INVALID argument is not NULL, *INVALID will be set to
- non-zero if this operand type can not actually be extracted from
- this operand (i.e., the instruction does not match). If the
- operand is valid, *INVALID will not be changed. */
- long (*extract) PARAMS ((unsigned long instruction, int *invalid));
-
- /* One bit syntax flags. */
- unsigned long flags;
-};
-
-/* Elements in the table are retrieved by indexing with values from
- the operands field of the powerpc_opcodes table. */
-
-extern const struct powerpc_operand powerpc_operands[];
-
-/* Values defined for the flags field of a struct powerpc_operand. */
-
-/* This operand takes signed values. */
-#define PPC_OPERAND_SIGNED (01)
-
-/* This operand takes signed values, but also accepts a full positive
- range of values when running in 32 bit mode. That is, if bits is
- 16, it takes any value from -0x8000 to 0xffff. In 64 bit mode,
- this flag is ignored. */
-#define PPC_OPERAND_SIGNOPT (02)
-
-/* This operand does not actually exist in the assembler input. This
- is used to support extended mnemonics such as mr, for which two
- operands fields are identical. The assembler should call the
- insert function with any op value. The disassembler should call
- the extract function, ignore the return value, and check the value
- placed in the valid argument. */
-#define PPC_OPERAND_FAKE (04)
-
-/* The next operand should be wrapped in parentheses rather than
- separated from this one by a comma. This is used for the load and
- store instructions which want their operands to look like
- reg,displacement(reg)
- */
-#define PPC_OPERAND_PARENS (010)
-
-/* This operand may use the symbolic names for the CR fields, which
- are
- lt 0 gt 1 eq 2 so 3 un 3
- cr0 0 cr1 1 cr2 2 cr3 3
- cr4 4 cr5 5 cr6 6 cr7 7
- These may be combined arithmetically, as in cr2*4+gt. These are
- only supported on the PowerPC, not the POWER. */
-#define PPC_OPERAND_CR (020)
-
-/* This operand names a register. The disassembler uses this to print
- register names with a leading 'r'. */
-#define PPC_OPERAND_GPR (040)
-
-/* This operand names a floating point register. The disassembler
- prints these with a leading 'f'. */
-#define PPC_OPERAND_FPR (0100)
-
-/* This operand is a relative branch displacement. The disassembler
- prints these symbolically if possible. */
-#define PPC_OPERAND_RELATIVE (0200)
-
-/* This operand is an absolute branch address. The disassembler
- prints these symbolically if possible. */
-#define PPC_OPERAND_ABSOLUTE (0400)
-
-/* This operand is optional, and is zero if omitted. This is used for
- the optional BF and L fields in the comparison instructions. The
- assembler must count the number of operands remaining on the line,
- and the number of operands remaining for the opcode, and decide
- whether this operand is present or not. The disassembler should
- print this operand out only if it is not zero. */
-#define PPC_OPERAND_OPTIONAL (01000)
-
-/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
- is omitted, then for the next operand use this operand value plus
- 1, ignoring the next operand field for the opcode. This wretched
- hack is needed because the Power rotate instructions can take
- either 4 or 5 operands. The disassembler should print this operand
- out regardless of the PPC_OPERAND_OPTIONAL field. */
-#define PPC_OPERAND_NEXT (02000)
-
-/* This operand should be regarded as a negative number for the
- purposes of overflow checking (i.e., the normal most negative
- number is disallowed and one more than the normal most positive
- number is allowed). This flag will only be set for a signed
- operand. */
-#define PPC_OPERAND_NEGATIVE (04000)
-
-/* The POWER and PowerPC assemblers use a few macros. We keep them
- with the operands table for simplicity. The macro table is an
- array of struct powerpc_macro. */
-
-struct powerpc_macro
-{
- /* The macro name. */
- const char *name;
-
- /* The number of operands the macro takes. */
- unsigned int operands;
-
- /* One bit flags for the opcode. These are used to indicate which
- specific processors support the instructions. The values are the
- same as those for the struct powerpc_opcode flags field. */
- unsigned long flags;
-
- /* A format string to turn the macro into a normal instruction.
- Each %N in the string is replaced with operand number N (zero
- based). */
- const char *format;
-};
-
-extern const struct powerpc_macro powerpc_macros[];
-extern const int powerpc_num_macros;
-
-#endif /* PPC_H */
diff --git a/arch/ppc/xmon/privinst.h b/arch/ppc/xmon/privinst.h
deleted file mode 100644
index c492a35..0000000
--- a/arch/ppc/xmon/privinst.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (C) 1996 Paul Mackerras.
- */
-
-#define GETREG(reg) \
- static inline int get_ ## reg (void) \
- { int ret; asm volatile ("mf" #reg " %0" : "=r" (ret) :); return ret; }
-
-#define SETREG(reg) \
- static inline void set_ ## reg (int val) \
- { asm volatile ("mt" #reg " %0" : : "r" (val)); }
-
-GETREG(msr)
-SETREG(msr)
-GETREG(cr)
-
-#define GSETSPR(n, name) \
- static inline int get_ ## name (void) \
- { int ret; asm volatile ("mfspr %0," #n : "=r" (ret) : ); return ret; } \
- static inline void set_ ## name (int val) \
- { asm volatile ("mtspr " #n ",%0" : : "r" (val)); }
-
-GSETSPR(0, mq)
-GSETSPR(1, xer)
-GSETSPR(4, rtcu)
-GSETSPR(5, rtcl)
-GSETSPR(8, lr)
-GSETSPR(9, ctr)
-GSETSPR(18, dsisr)
-GSETSPR(19, dar)
-GSETSPR(22, dec)
-GSETSPR(25, sdr1)
-GSETSPR(26, srr0)
-GSETSPR(27, srr1)
-GSETSPR(272, sprg0)
-GSETSPR(273, sprg1)
-GSETSPR(274, sprg2)
-GSETSPR(275, sprg3)
-GSETSPR(282, ear)
-GSETSPR(287, pvr)
-#ifndef CONFIG_8xx
-GSETSPR(528, bat0u)
-GSETSPR(529, bat0l)
-GSETSPR(530, bat1u)
-GSETSPR(531, bat1l)
-GSETSPR(532, bat2u)
-GSETSPR(533, bat2l)
-GSETSPR(534, bat3u)
-GSETSPR(535, bat3l)
-GSETSPR(1008, hid0)
-GSETSPR(1009, hid1)
-GSETSPR(1010, iabr)
-GSETSPR(1013, dabr)
-GSETSPR(1023, pir)
-#else
-GSETSPR(144, cmpa)
-GSETSPR(145, cmpb)
-GSETSPR(146, cmpc)
-GSETSPR(147, cmpd)
-GSETSPR(158, ictrl)
-#endif
-
-static inline int get_sr(int n)
-{
- int ret;
-
- asm (" mfsrin %0,%1" : "=r" (ret) : "r" (n << 28));
- return ret;
-}
-
-static inline void set_sr(int n, int val)
-{
- asm ("mtsrin %0,%1" : : "r" (val), "r" (n << 28));
-}
-
-static inline void store_inst(void *p)
-{
- asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
-}
-
-static inline void cflush(void *p)
-{
- asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
-}
-
-static inline void cinval(void *p)
-{
- asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
-}
-
diff --git a/arch/ppc/xmon/setjmp.c b/arch/ppc/xmon/setjmp.c
deleted file mode 100644
index 28352ba..0000000
--- a/arch/ppc/xmon/setjmp.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Copyright (C) 1996 Paul Mackerras.
- *
- * NB this file must be compiled with -O2.
- */
-
-int
-xmon_setjmp(long *buf)
-{
- asm ("mflr 0; stw 0,0(%0);"
- "stw 1,4(%0); stw 2,8(%0);"
- "mfcr 0; stw 0,12(%0);"
- "stmw 13,16(%0)"
- : : "r" (buf));
- /* XXX should save fp regs as well */
- return 0;
-}
-
-void
-xmon_longjmp(long *buf, int val)
-{
- if (val == 0)
- val = 1;
- asm ("lmw 13,16(%0);"
- "lwz 0,12(%0); mtcrf 0x38,0;"
- "lwz 0,0(%0); lwz 1,4(%0); lwz 2,8(%0);"
- "mtlr 0; mr 3,%1"
- : : "r" (buf), "r" (val));
-}
diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c
deleted file mode 100644
index 9056fe5..0000000
--- a/arch/ppc/xmon/start.c
+++ /dev/null
@@ -1,342 +0,0 @@
-/*
- * Copyright (C) 1996 Paul Mackerras.
- */
-#include <linux/string.h>
-#include <asm/machdep.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/sysrq.h>
-#include <linux/bitops.h>
-#include <asm/xmon.h>
-#include <asm/errno.h>
-#include <asm/processor.h>
-#include <asm/delay.h>
-#include <asm/btext.h>
-#include <asm/ibm4xx.h>
-
-static volatile unsigned char *sccc, *sccd;
-unsigned int TXRDY, RXRDY, DLAB;
-static int xmon_expect(const char *str, unsigned int timeout);
-
-static int via_modem;
-
-#define TB_SPEED 25000000
-
-static inline unsigned int readtb(void)
-{
- unsigned int ret;
-
- asm volatile("mftb %0" : "=r" (ret) :);
- return ret;
-}
-
-void buf_access(void)
-{
- if (DLAB)
- sccd[3] &= ~DLAB; /* reset DLAB */
-}
-
-
-#ifdef CONFIG_MAGIC_SYSRQ
-static void sysrq_handle_xmon(int key, struct pt_regs *regs,
- struct tty_struct *tty)
-{
- xmon(regs);
-}
-
-static struct sysrq_key_op sysrq_xmon_op =
-{
- .handler = sysrq_handle_xmon,
- .help_msg = "Xmon",
- .action_msg = "Entering xmon",
-};
-#endif
-
-void
-xmon_map_scc(void)
-{
-#if defined(CONFIG_405GP)
- sccd = (volatile unsigned char *)0xef600300;
-#elif defined(CONFIG_440EP)
- sccd = (volatile unsigned char *) ioremap(PPC440EP_UART0_ADDR, 8);
-#elif defined(CONFIG_440SP)
- sccd = (volatile unsigned char *) ioremap64(PPC440SP_UART0_ADDR, 8);
-#elif defined(CONFIG_440SPE)
- sccd = (volatile unsigned char *) ioremap64(PPC440SPE_UART0_ADDR, 8);
-#elif defined(CONFIG_44x)
- /* This is the default for 44x platforms. Any boards that have a
- different UART address need to be put in cases before this or the
- port will be mapped incorrectly */
- sccd = (volatile unsigned char *) ioremap64(PPC440GP_UART0_ADDR, 8);
-#endif /* platform */
-
-#ifndef CONFIG_PPC_PREP
- sccc = sccd + 5;
- TXRDY = 0x20;
- RXRDY = 1;
- DLAB = 0x80;
-#endif
-
- register_sysrq_key('x', &sysrq_xmon_op);
-}
-
-static int scc_initialized;
-
-void xmon_init_scc(void);
-
-int
-xmon_write(void *handle, void *ptr, int nb)
-{
- char *p = ptr;
- int i, c, ct;
-
-#ifdef CONFIG_SMP
- static unsigned long xmon_write_lock;
- int lock_wait = 1000000;
- int locked;
-
- while ((locked = test_and_set_bit(0, &xmon_write_lock)) != 0)
- if (--lock_wait == 0)
- break;
-#endif
-
- if (!scc_initialized)
- xmon_init_scc();
- ct = 0;
- for (i = 0; i < nb; ++i) {
- while ((*sccc & TXRDY) == 0)
- ;
- c = p[i];
- if (c == '\n' && !ct) {
- c = '\r';
- ct = 1;
- --i;
- } else {
- ct = 0;
- }
- buf_access();
- *sccd = c;
- eieio();
- }
-
-#ifdef CONFIG_SMP
- if (!locked)
- clear_bit(0, &xmon_write_lock);
-#endif
- return nb;
-}
-
-int xmon_wants_key;
-
-
-int
-xmon_read(void *handle, void *ptr, int nb)
-{
- char *p = ptr;
- int i;
-
- if (!scc_initialized)
- xmon_init_scc();
- for (i = 0; i < nb; ++i) {
- while ((*sccc & RXRDY) == 0)
- ;
- buf_access();
- *p++ = *sccd;
- }
- return i;
-}
-
-int
-xmon_read_poll(void)
-{
- if ((*sccc & RXRDY) == 0) {
- ;
- return -1;
- }
- buf_access();
- return *sccd;
-}
-
-void
-xmon_init_scc(void)
-{
- scc_initialized = 1;
- if (via_modem) {
- for (;;) {
- xmon_write(NULL, "ATE1V1\r", 7);
- if (xmon_expect("OK", 5)) {
- xmon_write(NULL, "ATA\r", 4);
- if (xmon_expect("CONNECT", 40))
- break;
- }
- xmon_write(NULL, "+++", 3);
- xmon_expect("OK", 3);
- }
- }
-}
-
-
-void *xmon_stdin;
-void *xmon_stdout;
-void *xmon_stderr;
-
-void
-xmon_init(int arg)
-{
- xmon_map_scc();
-}
-
-int
-xmon_putc(int c, void *f)
-{
- char ch = c;
-
- if (c == '\n')
- xmon_putc('\r', f);
- return xmon_write(f, &ch, 1) == 1? c: -1;
-}
-
-int
-xmon_putchar(int c)
-{
- return xmon_putc(c, xmon_stdout);
-}
-
-int
-xmon_fputs(char *str, void *f)
-{
- int n = strlen(str);
-
- return xmon_write(f, str, n) == n? 0: -1;
-}
-
-int
-xmon_readchar(void)
-{
- char ch;
-
- for (;;) {
- switch (xmon_read(xmon_stdin, &ch, 1)) {
- case 1:
- return ch;
- case -1:
- xmon_printf("read(stdin) returned -1\r\n", 0, 0);
- return -1;
- }
- }
-}
-
-static char line[256];
-static char *lineptr;
-static int lineleft;
-
-int xmon_expect(const char *str, unsigned int timeout)
-{
- int c;
- unsigned int t0;
-
- timeout *= TB_SPEED;
- t0 = readtb();
- do {
- lineptr = line;
- for (;;) {
- c = xmon_read_poll();
- if (c == -1) {
- if (readtb() - t0 > timeout)
- return 0;
- continue;
- }
- if (c == '\n')
- break;
- if (c != '\r' && lineptr < &line[sizeof(line) - 1])
- *lineptr++ = c;
- }
- *lineptr = 0;
- } while (strstr(line, str) == NULL);
- return 1;
-}
-
-int
-xmon_getchar(void)
-{
- int c;
-
- if (lineleft == 0) {
- lineptr = line;
- for (;;) {
- c = xmon_readchar();
- if (c == -1 || c == 4)
- break;
- if (c == '\r' || c == '\n') {
- *lineptr++ = '\n';
- xmon_putchar('\n');
- break;
- }
- switch (c) {
- case 0177:
- case '\b':
- if (lineptr > line) {
- xmon_putchar('\b');
- xmon_putchar(' ');
- xmon_putchar('\b');
- --lineptr;
- }
- break;
- case 'U' & 0x1F:
- while (lineptr > line) {
- xmon_putchar('\b');
- xmon_putchar(' ');
- xmon_putchar('\b');
- --lineptr;
- }
- break;
- default:
- if (lineptr >= &line[sizeof(line) - 1])
- xmon_putchar('\a');
- else {
- xmon_putchar(c);
- *lineptr++ = c;
- }
- }
- }
- lineleft = lineptr - line;
- lineptr = line;
- }
- if (lineleft == 0)
- return -1;
- --lineleft;
- return *lineptr++;
-}
-
-char *
-xmon_fgets(char *str, int nb, void *f)
-{
- char *p;
- int c;
-
- for (p = str; p < str + nb - 1; ) {
- c = xmon_getchar();
- if (c == -1) {
- if (p == str)
- return NULL;
- break;
- }
- *p++ = c;
- if (c == '\n')
- break;
- }
- *p = 0;
- return str;
-}
-
-void
-xmon_enter(void)
-{
-}
-
-void
-xmon_leave(void)
-{
-}
diff --git a/arch/ppc/xmon/start_8xx.c b/arch/ppc/xmon/start_8xx.c
deleted file mode 100644
index 3097406..0000000
--- a/arch/ppc/xmon/start_8xx.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/*
- * Copyright (C) 1996 Paul Mackerras.
- * Copyright (C) 2000 Dan Malek.
- * Quick hack of Paul's code to make XMON work on 8xx processors. Lots
- * of assumptions, like the SMC1 is used, it has been initialized by the
- * loader at some point, and we can just stuff and suck bytes.
- * We rely upon the 8xx uart driver to support us, as the interface
- * changes between boot up and operational phases of the kernel.
- */
-#include <linux/string.h>
-#include <asm/machdep.h>
-#include <asm/io.h>
-#include <asm/page.h>
-#include <linux/kernel.h>
-#include <asm/8xx_immap.h>
-#include <asm/mpc8xx.h>
-#include <asm/cpm1.h>
-
-extern void xmon_printf(const char *fmt, ...);
-extern int xmon_8xx_write(char *str, int nb);
-extern int xmon_8xx_read_poll(void);
-extern int xmon_8xx_read_char(void);
-void prom_drawhex(uint);
-void prom_drawstring(const char *str);
-
-static int use_screen = 1; /* default */
-
-#define TB_SPEED 25000000
-
-static inline unsigned int readtb(void)
-{
- unsigned int ret;
-
- asm volatile("mftb %0" : "=r" (ret) :);
- return ret;
-}
-
-void buf_access(void)
-{
-}
-
-void
-xmon_map_scc(void)
-{
-
- cpmp = (cpm8xx_t *)&(((immap_t *)IMAP_ADDR)->im_cpm);
- use_screen = 0;
-
- prom_drawstring("xmon uses serial port\n");
-}
-
-static int scc_initialized = 0;
-
-void xmon_init_scc(void);
-
-int
-xmon_write(void *handle, void *ptr, int nb)
-{
- char *p = ptr;
- int i, c, ct;
-
- if (!scc_initialized)
- xmon_init_scc();
-
- return(xmon_8xx_write(ptr, nb));
-}
-
-int xmon_wants_key;
-
-int
-xmon_read(void *handle, void *ptr, int nb)
-{
- char *p = ptr;
- int i;
-
- if (!scc_initialized)
- xmon_init_scc();
-
- for (i = 0; i < nb; ++i) {
- *p++ = xmon_8xx_read_char();
- }
- return i;
-}
-
-int
-xmon_read_poll(void)
-{
- return(xmon_8xx_read_poll());
-}
-
-void
-xmon_init_scc()
-{
- scc_initialized = 1;
-}
-
-#if 0
-extern int (*prom_entry)(void *);
-
-int
-xmon_exit(void)
-{
- struct prom_args {
- char *service;
- } args;
-
- for (;;) {
- args.service = "exit";
- (*prom_entry)(&args);
- }
-}
-#endif
-
-void *xmon_stdin;
-void *xmon_stdout;
-void *xmon_stderr;
-
-void
-xmon_init(void)
-{
-}
-
-int
-xmon_putc(int c, void *f)
-{
- char ch = c;
-
- if (c == '\n')
- xmon_putc('\r', f);
- return xmon_write(f, &ch, 1) == 1? c: -1;
-}
-
-int
-xmon_putchar(int c)
-{
- return xmon_putc(c, xmon_stdout);
-}
-
-int
-xmon_fputs(char *str, void *f)
-{
- int n = strlen(str);
-
- return xmon_write(f, str, n) == n? 0: -1;
-}
-
-int
-xmon_readchar(void)
-{
- char ch;
-
- for (;;) {
- switch (xmon_read(xmon_stdin, &ch, 1)) {
- case 1:
- return ch;
- case -1:
- xmon_printf("read(stdin) returned -1\r\n", 0, 0);
- return -1;
- }
- }
-}
-
-static char line[256];
-static char *lineptr;
-static int lineleft;
-
-#if 0
-int xmon_expect(const char *str, unsigned int timeout)
-{
- int c;
- unsigned int t0;
-
- timeout *= TB_SPEED;
- t0 = readtb();
- do {
- lineptr = line;
- for (;;) {
- c = xmon_read_poll();
- if (c == -1) {
- if (readtb() - t0 > timeout)
- return 0;
- continue;
- }
- if (c == '\n')
- break;
- if (c != '\r' && lineptr < &line[sizeof(line) - 1])
- *lineptr++ = c;
- }
- *lineptr = 0;
- } while (strstr(line, str) == NULL);
- return 1;
-}
-#endif
-
-int
-xmon_getchar(void)
-{
- int c;
-
- if (lineleft == 0) {
- lineptr = line;
- for (;;) {
- c = xmon_readchar();
- if (c == -1 || c == 4)
- break;
- if (c == '\r' || c == '\n') {
- *lineptr++ = '\n';
- xmon_putchar('\n');
- break;
- }
- switch (c) {
- case 0177:
- case '\b':
- if (lineptr > line) {
- xmon_putchar('\b');
- xmon_putchar(' ');
- xmon_putchar('\b');
- --lineptr;
- }
- break;
- case 'U' & 0x1F:
- while (lineptr > line) {
- xmon_putchar('\b');
- xmon_putchar(' ');
- xmon_putchar('\b');
- --lineptr;
- }
- break;
- default:
- if (lineptr >= &line[sizeof(line) - 1])
- xmon_putchar('\a');
- else {
- xmon_putchar(c);
- *lineptr++ = c;
- }
- }
- }
- lineleft = lineptr - line;
- lineptr = line;
- }
- if (lineleft == 0)
- return -1;
- --lineleft;
- return *lineptr++;
-}
-
-char *
-xmon_fgets(char *str, int nb, void *f)
-{
- char *p;
- int c;
-
- for (p = str; p < str + nb - 1; ) {
- c = xmon_getchar();
- if (c == -1) {
- if (p == str)
- return 0;
- break;
- }
- *p++ = c;
- if (c == '\n')
- break;
- }
- *p = 0;
- return str;
-}
-
-void
-prom_drawhex(uint val)
-{
- unsigned char buf[10];
-
- int i;
- for (i = 7; i >= 0; i--)
- {
- buf[i] = "0123456789abcdef"[val & 0x0f];
- val >>= 4;
- }
- buf[8] = '\0';
- xmon_fputs(buf, xmon_stdout);
-}
-
-void
-prom_drawstring(const char *str)
-{
- xmon_fputs(str, xmon_stdout);
-}
diff --git a/arch/ppc/xmon/subr_prf.c b/arch/ppc/xmon/subr_prf.c
deleted file mode 100644
index 126624f..0000000
--- a/arch/ppc/xmon/subr_prf.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * Written by Cort Dougan to replace the version originally used
- * by Paul Mackerras, which came from NetBSD and thus had copyright
- * conflicts with Linux.
- *
- * This file makes liberal use of the standard linux utility
- * routines to reduce the size of the binary. We assume we can
- * trust some parts of Linux inside the debugger.
- * -- Cort (cort@cs.nmt.edu)
- *
- * Copyright (C) 1999 Cort Dougan.
- */
-
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <stdarg.h>
-#include "nonstdio.h"
-
-extern int xmon_write(void *, void *, int);
-
-void
-xmon_vfprintf(void *f, const char *fmt, va_list ap)
-{
- static char xmon_buf[2048];
- int n;
-
- n = vsprintf(xmon_buf, fmt, ap);
- xmon_write(f, xmon_buf, n);
-}
-
-void
-xmon_printf(const char *fmt, ...)
-{
- va_list ap;
-
- va_start(ap, fmt);
- xmon_vfprintf(stdout, fmt, ap);
- va_end(ap);
-}
-
-void
-xmon_fprintf(void *f, const char *fmt, ...)
-{
- va_list ap;
-
- va_start(ap, fmt);
- xmon_vfprintf(f, fmt, ap);
- va_end(ap);
-}
-
-void
-xmon_puts(char *s)
-{
- xmon_write(stdout, s, strlen(s));
-}
diff --git a/arch/ppc/xmon/xmon.c b/arch/ppc/xmon/xmon.c
deleted file mode 100644
index b1a9174..0000000
--- a/arch/ppc/xmon/xmon.c
+++ /dev/null
@@ -1,1780 +0,0 @@
-/*
- * Routines providing a simple monitor for use on the PowerMac.
- *
- * Copyright (C) 1996 Paul Mackerras.
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <linux/bitops.h>
-#include <linux/kallsyms.h>
-#include <asm/ptrace.h>
-#include <asm/string.h>
-#include <asm/machdep.h>
-#include <asm/xmon.h>
-#include "nonstdio.h"
-#include "privinst.h"
-
-#define scanhex xmon_scanhex
-#define skipbl xmon_skipbl
-
-#ifdef CONFIG_SMP
-static unsigned long cpus_in_xmon = 0;
-static unsigned long got_xmon = 0;
-static volatile int take_xmon = -1;
-#endif /* CONFIG_SMP */
-
-static unsigned adrs;
-static int size = 1;
-static unsigned ndump = 64;
-static unsigned nidump = 16;
-static unsigned ncsum = 4096;
-static int termch;
-
-static u_int bus_error_jmp[100];
-#define setjmp xmon_setjmp
-#define longjmp xmon_longjmp
-
-/* Breakpoint stuff */
-struct bpt {
- unsigned address;
- unsigned instr;
- unsigned count;
- unsigned char enabled;
-};
-
-#define NBPTS 16
-static struct bpt bpts[NBPTS];
-static struct bpt dabr;
-static struct bpt iabr;
-static unsigned bpinstr = 0x7fe00008; /* trap */
-
-/* Prototypes */
-extern void (*debugger_fault_handler)(struct pt_regs *);
-static int cmds(struct pt_regs *);
-static int mread(unsigned, void *, int);
-static int mwrite(unsigned, void *, int);
-static void handle_fault(struct pt_regs *);
-static void byterev(unsigned char *, int);
-static void memex(void);
-static int bsesc(void);
-static void dump(void);
-static void prdump(unsigned, int);
-#ifdef __MWERKS__
-static void prndump(unsigned, int);
-static int nvreadb(unsigned);
-#endif
-static int ppc_inst_dump(unsigned, int);
-void print_address(unsigned);
-static int getsp(void);
-static void dump_hash_table(void);
-static void backtrace(struct pt_regs *);
-static void excprint(struct pt_regs *);
-static void prregs(struct pt_regs *);
-static void memops(int);
-static void memlocate(void);
-static void memzcan(void);
-static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
-int skipbl(void);
-int scanhex(unsigned *valp);
-static void scannl(void);
-static int hexdigit(int);
-void getstring(char *, int);
-static void flush_input(void);
-static int inchar(void);
-static void take_input(char *);
-/* static void openforth(void); */
-static unsigned read_spr(int);
-static void write_spr(int, unsigned);
-static void super_regs(void);
-static void symbol_lookup(void);
-static void remove_bpts(void);
-static void insert_bpts(void);
-static struct bpt *at_breakpoint(unsigned pc);
-static void bpt_cmds(void);
-void cacheflush(void);
-#ifdef CONFIG_SMP
-static void cpu_cmd(void);
-#endif /* CONFIG_SMP */
-static void csum(void);
-static void bootcmds(void);
-static void proccall(void);
-static void printtime(void);
-
-extern int print_insn_big_powerpc(FILE *, unsigned long, unsigned);
-extern void printf(const char *fmt, ...);
-extern int putchar(int ch);
-extern int setjmp(u_int *);
-extern void longjmp(u_int *, int);
-
-extern void xmon_enter(void);
-extern void xmon_leave(void);
-
-static unsigned start_tb[NR_CPUS][2];
-static unsigned stop_tb[NR_CPUS][2];
-
-#define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
-
-#define isxdigit(c) (('0' <= (c) && (c) <= '9') \
- || ('a' <= (c) && (c) <= 'f') \
- || ('A' <= (c) && (c) <= 'F'))
-#define isalnum(c) (('0' <= (c) && (c) <= '9') \
- || ('a' <= (c) && (c) <= 'z') \
- || ('A' <= (c) && (c) <= 'Z'))
-#define isspace(c) (c == ' ' || c == '\t' || c == 10 || c == 13 || c == 0)
-
-static char *help_string = "\
-Commands:\n\
- d dump bytes\n\
- di dump instructions\n\
- df dump float values\n\
- dd dump double values\n\
- e print exception information\n\
- h dump hash table\n\
- m examine/change memory\n\
- mm move a block of memory\n\
- ms set a block of memory\n\
- md compare two blocks of memory\n\
- r print registers\n\
- S print special registers\n\
- t print backtrace\n\
- la lookup address\n\
- ls lookup symbol\n\
- C checksum\n\
- p call function with arguments\n\
- T print time\n\
- x exit monitor\n\
- zr reboot\n\
- zh halt\n\
-";
-
-static int xmon_trace[NR_CPUS];
-#define SSTEP 1 /* stepping because of 's' command */
-#define BRSTEP 2 /* stepping over breakpoint */
-
-#ifdef CONFIG_4xx
-#define MSR_SSTEP_ENABLE 0x200
-#else
-#define MSR_SSTEP_ENABLE 0x400
-#endif
-
-static struct pt_regs *xmon_regs[NR_CPUS];
-
-extern inline void sync(void)
-{
- asm volatile("sync; isync");
-}
-
-extern inline void __delay(unsigned int loops)
-{
- if (loops != 0)
- __asm__ __volatile__("mtctr %0; 1: bdnz 1b" : :
- "r" (loops) : "ctr");
-}
-
-/* Print an address in numeric and symbolic form (if possible) */
-static void xmon_print_symbol(unsigned long address, const char *mid,
- const char *after)
-{
- char *modname;
- const char *name = NULL;
- unsigned long offset, size;
- static char tmpstr[128];
-
- printf("%.8lx", address);
- if (setjmp(bus_error_jmp) == 0) {
- debugger_fault_handler = handle_fault;
- sync();
- name = kallsyms_lookup(address, &size, &offset, &modname,
- tmpstr);
- sync();
- /* wait a little while to see if we get a machine check */
- __delay(200);
- }
- debugger_fault_handler = NULL;
-
- if (name) {
- printf("%s%s+%#lx/%#lx", mid, name, offset, size);
- if (modname)
- printf(" [%s]", modname);
- }
- printf("%s", after);
-}
-
-static void get_tb(unsigned *p)
-{
- unsigned hi, lo, hiagain;
-
- if ((get_pvr() >> 16) == 1)
- return;
-
- do {
- asm volatile("mftbu %0; mftb %1; mftbu %2"
- : "=r" (hi), "=r" (lo), "=r" (hiagain));
- } while (hi != hiagain);
- p[0] = hi;
- p[1] = lo;
-}
-
-static inline void xmon_enable_sstep(struct pt_regs *regs)
-{
- regs->msr |= MSR_SSTEP_ENABLE;
-#ifdef CONFIG_4xx
- mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
-#endif
-}
-
-int xmon(struct pt_regs *excp)
-{
- struct pt_regs regs;
- int msr, cmd;
-
- get_tb(stop_tb[smp_processor_id()]);
- if (excp == NULL) {
- asm volatile ("stw 0,0(%0)\n\
- lwz 0,0(1)\n\
- stw 0,4(%0)\n\
- stmw 2,8(%0)" : : "b" (®s));
- regs.nip = regs.link = ((unsigned long *)regs.gpr[1])[1];
- regs.msr = get_msr();
- regs.ctr = get_ctr();
- regs.xer = get_xer();
- regs.ccr = get_cr();
- regs.trap = 0;
- excp = ®s;
- }
-
- msr = get_msr();
- set_msr(msr & ~0x8000); /* disable interrupts */
- xmon_regs[smp_processor_id()] = excp;
- xmon_enter();
- excprint(excp);
-#ifdef CONFIG_SMP
- if (test_and_set_bit(smp_processor_id(), &cpus_in_xmon))
- for (;;)
- ;
- while (test_and_set_bit(0, &got_xmon)) {
- if (take_xmon == smp_processor_id()) {
- take_xmon = -1;
- break;
- }
- }
- /*
- * XXX: breakpoints are removed while any cpu is in xmon
- */
-#endif /* CONFIG_SMP */
- remove_bpts();
- cmd = cmds(excp);
- if (cmd == 's') {
- xmon_trace[smp_processor_id()] = SSTEP;
- xmon_enable_sstep(excp);
- } else if (at_breakpoint(excp->nip)) {
- xmon_trace[smp_processor_id()] = BRSTEP;
- xmon_enable_sstep(excp);
- } else {
- xmon_trace[smp_processor_id()] = 0;
- insert_bpts();
- }
- xmon_leave();
- xmon_regs[smp_processor_id()] = NULL;
-#ifdef CONFIG_SMP
- clear_bit(0, &got_xmon);
- clear_bit(smp_processor_id(), &cpus_in_xmon);
-#endif /* CONFIG_SMP */
- set_msr(msr); /* restore interrupt enable */
- get_tb(start_tb[smp_processor_id()]);
-
- return cmd != 'X';
-}
-
-irqreturn_t
-xmon_irq(int irq, void *d, struct pt_regs *regs)
-{
- unsigned long flags;
- local_irq_save(flags);
- printf("Keyboard interrupt\n");
- xmon(regs);
- local_irq_restore(flags);
- return IRQ_HANDLED;
-}
-
-int
-xmon_bpt(struct pt_regs *regs)
-{
- struct bpt *bp;
-
- bp = at_breakpoint(regs->nip);
- if (!bp)
- return 0;
- if (bp->count) {
- --bp->count;
- remove_bpts();
- excprint(regs);
- xmon_trace[smp_processor_id()] = BRSTEP;
- xmon_enable_sstep(regs);
- } else {
- xmon(regs);
- }
- return 1;
-}
-
-int
-xmon_sstep(struct pt_regs *regs)
-{
- if (!xmon_trace[smp_processor_id()])
- return 0;
- if (xmon_trace[smp_processor_id()] == BRSTEP) {
- xmon_trace[smp_processor_id()] = 0;
- insert_bpts();
- } else {
- xmon(regs);
- }
- return 1;
-}
-
-int
-xmon_dabr_match(struct pt_regs *regs)
-{
- if (dabr.enabled && dabr.count) {
- --dabr.count;
- remove_bpts();
- excprint(regs);
- xmon_trace[smp_processor_id()] = BRSTEP;
- regs->msr |= 0x400;
- } else {
- dabr.instr = regs->nip;
- xmon(regs);
- }
- return 1;
-}
-
-int
-xmon_iabr_match(struct pt_regs *regs)
-{
- if (iabr.enabled && iabr.count) {
- --iabr.count;
- remove_bpts();
- excprint(regs);
- xmon_trace[smp_processor_id()] = BRSTEP;
- regs->msr |= 0x400;
- } else {
- xmon(regs);
- }
- return 1;
-}
-
-static struct bpt *
-at_breakpoint(unsigned pc)
-{
- int i;
- struct bpt *bp;
-
- if (dabr.enabled && pc == dabr.instr)
- return &dabr;
- if (iabr.enabled && pc == iabr.address)
- return &iabr;
- bp = bpts;
- for (i = 0; i < NBPTS; ++i, ++bp)
- if (bp->enabled && pc == bp->address)
- return bp;
- return NULL;
-}
-
-static void
-insert_bpts(void)
-{
- int i;
- struct bpt *bp;
-
- bp = bpts;
- for (i = 0; i < NBPTS; ++i, ++bp) {
- if (!bp->enabled)
- continue;
- if (mread(bp->address, &bp->instr, 4) != 4
- || mwrite(bp->address, &bpinstr, 4) != 4) {
- printf("Couldn't insert breakpoint at %x, disabling\n",
- bp->address);
- bp->enabled = 0;
- }
- store_inst((void *) bp->address);
- }
-#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx))
- if (dabr.enabled)
- set_dabr(dabr.address);
- if (iabr.enabled)
- set_iabr(iabr.address);
-#endif
-}
-
-static void
-remove_bpts(void)
-{
- int i;
- struct bpt *bp;
- unsigned instr;
-
-#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx))
- set_dabr(0);
- set_iabr(0);
-#endif
- bp = bpts;
- for (i = 0; i < NBPTS; ++i, ++bp) {
- if (!bp->enabled)
- continue;
- if (mread(bp->address, &instr, 4) == 4
- && instr == bpinstr
- && mwrite(bp->address, &bp->instr, 4) != 4)
- printf("Couldn't remove breakpoint at %x\n",
- bp->address);
- store_inst((void *) bp->address);
- }
-}
-
-static char *last_cmd;
-
-/* Command interpreting routine */
-static int
-cmds(struct pt_regs *excp)
-{
- int cmd;
-
- last_cmd = NULL;
- for(;;) {
-#ifdef CONFIG_SMP
- printf("%d:", smp_processor_id());
-#endif /* CONFIG_SMP */
- printf("mon> ");
- fflush(stdout);
- flush_input();
- termch = 0;
- cmd = skipbl();
- if( cmd == '\n' ) {
- if (last_cmd == NULL)
- continue;
- take_input(last_cmd);
- last_cmd = NULL;
- cmd = inchar();
- }
- switch (cmd) {
- case 'm':
- cmd = inchar();
- switch (cmd) {
- case 'm':
- case 's':
- case 'd':
- memops(cmd);
- break;
- case 'l':
- memlocate();
- break;
- case 'z':
- memzcan();
- break;
- default:
- termch = cmd;
- memex();
- }
- break;
- case 'd':
- dump();
- break;
- case 'l':
- symbol_lookup();
- break;
- case 'r':
- if (excp != NULL)
- prregs(excp); /* print regs */
- break;
- case 'e':
- if (excp == NULL)
- printf("No exception information\n");
- else
- excprint(excp);
- break;
- case 'S':
- super_regs();
- break;
- case 't':
- backtrace(excp);
- break;
- case 'f':
- cacheflush();
- break;
- case 'h':
- dump_hash_table();
- break;
- case 's':
- case 'x':
- case EOF:
- return cmd;
- case '?':
- printf(help_string);
- break;
- default:
- printf("Unrecognized command: ");
- if( ' ' < cmd && cmd <= '~' )
- putchar(cmd);
- else
- printf("\\x%x", cmd);
- printf(" (type ? for help)\n");
- break;
- case 'b':
- bpt_cmds();
- break;
- case 'C':
- csum();
- break;
-#ifdef CONFIG_SMP
- case 'c':
- cpu_cmd();
- break;
-#endif /* CONFIG_SMP */
- case 'z':
- bootcmds();
- break;
- case 'p':
- proccall();
- break;
- case 'T':
- printtime();
- break;
- }
- }
-}
-
-extern unsigned tb_to_us;
-
-#define mulhwu(x,y) \
-({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
-
-static void printtime(void)
-{
- unsigned int delta;
-
- delta = stop_tb[smp_processor_id()][1]
- - start_tb[smp_processor_id()][1];
- delta = mulhwu(tb_to_us, delta);
- printf("%u.%06u seconds\n", delta / 1000000, delta % 1000000);
-}
-
-static void bootcmds(void)
-{
- int cmd;
-
- cmd = inchar();
- if (cmd == 'r')
- ppc_md.restart(NULL);
- else if (cmd == 'h')
- ppc_md.halt();
- else if (cmd == 'p')
- ppc_md.power_off();
-}
-
-#ifdef CONFIG_SMP
-static void cpu_cmd(void)
-{
- unsigned cpu;
- int timeout;
- int cmd;
-
- cmd = inchar();
- if (cmd == 'i') {
- /* interrupt other cpu(s) */
- cpu = MSG_ALL_BUT_SELF;
- if (scanhex(&cpu))
- smp_send_xmon_break(cpu);
- return;
- }
- termch = cmd;
- if (!scanhex(&cpu)) {
- /* print cpus waiting or in xmon */
- printf("cpus stopped:");
- for (cpu = 0; cpu < NR_CPUS; ++cpu) {
- if (test_bit(cpu, &cpus_in_xmon)) {
- printf(" %d", cpu);
- if (cpu == smp_processor_id())
- printf("*", cpu);
- }
- }
- printf("\n");
- return;
- }
- /* try to switch to cpu specified */
- take_xmon = cpu;
- timeout = 10000000;
- while (take_xmon >= 0) {
- if (--timeout == 0) {
- /* yes there's a race here */
- take_xmon = -1;
- printf("cpu %u didn't take control\n", cpu);
- return;
- }
- }
- /* now have to wait to be given control back */
- while (test_and_set_bit(0, &got_xmon)) {
- if (take_xmon == smp_processor_id()) {
- take_xmon = -1;
- break;
- }
- }
-}
-#endif /* CONFIG_SMP */
-
-
-static unsigned short fcstab[256] = {
- 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
- 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
- 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
- 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
- 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
- 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
- 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
- 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
- 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
- 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
- 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
- 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
- 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
- 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
- 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
- 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
- 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
- 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
- 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
- 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
- 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
- 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
- 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
- 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
- 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
- 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
- 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
- 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
- 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
- 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
- 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
- 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
-};
-
-#define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
-
-static void
-csum(void)
-{
- unsigned int i;
- unsigned short fcs;
- unsigned char v;
-
- if (!scanhex(&adrs))
- return;
- if (!scanhex(&ncsum))
- return;
- fcs = 0xffff;
- for (i = 0; i < ncsum; ++i) {
- if (mread(adrs+i, &v, 1) == 0) {
- printf("csum stopped at %x\n", adrs+i);
- break;
- }
- fcs = FCS(fcs, v);
- }
- printf("%x\n", fcs);
-}
-
-static void
-bpt_cmds(void)
-{
- int cmd;
- unsigned a;
- int mode, i;
- struct bpt *bp;
-
- cmd = inchar();
- switch (cmd) {
-#if ! (defined(CONFIG_8xx) || defined(CONFIG_4xx))
- case 'd':
- mode = 7;
- cmd = inchar();
- if (cmd == 'r')
- mode = 5;
- else if (cmd == 'w')
- mode = 6;
- else
- termch = cmd;
- cmd = inchar();
- if (cmd == 'p')
- mode &= ~4;
- else
- termch = cmd;
- dabr.address = 0;
- dabr.count = 0;
- dabr.enabled = scanhex(&dabr.address);
- scanhex(&dabr.count);
- if (dabr.enabled)
- dabr.address = (dabr.address & ~7) | mode;
- break;
- case 'i':
- cmd = inchar();
- if (cmd == 'p')
- mode = 2;
- else
- mode = 3;
- iabr.address = 0;
- iabr.count = 0;
- iabr.enabled = scanhex(&iabr.address);
- if (iabr.enabled)
- iabr.address |= mode;
- scanhex(&iabr.count);
- break;
-#endif
- case 'c':
- if (!scanhex(&a)) {
- /* clear all breakpoints */
- for (i = 0; i < NBPTS; ++i)
- bpts[i].enabled = 0;
- iabr.enabled = 0;
- dabr.enabled = 0;
- printf("All breakpoints cleared\n");
- } else {
- bp = at_breakpoint(a);
- if (bp == 0) {
- printf("No breakpoint at %x\n", a);
- } else {
- bp->enabled = 0;
- }
- }
- break;
- default:
- termch = cmd;
- if (!scanhex(&a)) {
- /* print all breakpoints */
- printf("type address count\n");
- if (dabr.enabled) {
- printf("data %.8x %8x [", dabr.address & ~7,
- dabr.count);
- if (dabr.address & 1)
- printf("r");
- if (dabr.address & 2)
- printf("w");
- if (!(dabr.address & 4))
- printf("p");
- printf("]\n");
- }
- if (iabr.enabled)
- printf("inst %.8x %8x\n", iabr.address & ~3,
- iabr.count);
- for (bp = bpts; bp < &bpts[NBPTS]; ++bp)
- if (bp->enabled)
- printf("trap %.8x %8x\n", bp->address,
- bp->count);
- break;
- }
- bp = at_breakpoint(a);
- if (bp == 0) {
- for (bp = bpts; bp < &bpts[NBPTS]; ++bp)
- if (!bp->enabled)
- break;
- if (bp >= &bpts[NBPTS]) {
- printf("Sorry, no free breakpoints\n");
- break;
- }
- }
- bp->enabled = 1;
- bp->address = a;
- bp->count = 0;
- scanhex(&bp->count);
- break;
- }
-}
-
-static void
-backtrace(struct pt_regs *excp)
-{
- unsigned sp;
- unsigned stack[2];
- struct pt_regs regs;
- extern char ret_from_except, ret_from_except_full, ret_from_syscall;
-
- printf("backtrace:\n");
-
- if (excp != NULL)
- sp = excp->gpr[1];
- else
- sp = getsp();
- scanhex(&sp);
- scannl();
- for (; sp != 0; sp = stack[0]) {
- if (mread(sp, stack, sizeof(stack)) != sizeof(stack))
- break;
- printf("[%.8lx] ", stack[0]);
- xmon_print_symbol(stack[1], " ", "\n");
- if (stack[1] == (unsigned) &ret_from_except
- || stack[1] == (unsigned) &ret_from_except_full
- || stack[1] == (unsigned) &ret_from_syscall) {
- if (mread(sp+16, ®s, sizeof(regs)) != sizeof(regs))
- break;
- printf("exception:%x [%x] %x\n", regs.trap, sp+16,
- regs.nip);
- sp = regs.gpr[1];
- if (mread(sp, stack, sizeof(stack)) != sizeof(stack))
- break;
- }
- }
-}
-
-int
-getsp(void)
-{
- int x;
-
- asm("mr %0,1" : "=r" (x) :);
- return x;
-}
-
-void
-excprint(struct pt_regs *fp)
-{
- int trap;
-
-#ifdef CONFIG_SMP
- printf("cpu %d: ", smp_processor_id());
-#endif /* CONFIG_SMP */
- printf("vector: %x at pc=", fp->trap);
- xmon_print_symbol(fp->nip, ": ", ", lr=");
- xmon_print_symbol(fp->link, ": ", "\n");
- printf("msr = %x, sp = %x [%x]\n", fp->msr, fp->gpr[1], fp);
- trap = TRAP(fp);
- if (trap == 0x300 || trap == 0x600)
- printf("dar = %x, dsisr = %x\n", fp->dar, fp->dsisr);
- if (current)
- printf("current = %x, pid = %d, comm = %s\n",
- current, current->pid, current->comm);
-}
-
-void
-prregs(struct pt_regs *fp)
-{
- int n;
- unsigned base;
-
- if (scanhex(&base))
- fp = (struct pt_regs *) base;
- for (n = 0; n < 32; ++n) {
- printf("R%.2d = %.8x%s", n, fp->gpr[n],
- (n & 3) == 3? "\n": " ");
- if (n == 12 && !FULL_REGS(fp)) {
- printf("\n");
- break;
- }
- }
- printf("pc = %.8x msr = %.8x lr = %.8x cr = %.8x\n",
- fp->nip, fp->msr, fp->link, fp->ccr);
- printf("ctr = %.8x xer = %.8x trap = %4x\n",
- fp->ctr, fp->xer, fp->trap);
-}
-
-void
-cacheflush(void)
-{
- int cmd;
- unsigned nflush;
-
- cmd = inchar();
- if (cmd != 'i')
- termch = cmd;
- scanhex(&adrs);
- if (termch != '\n')
- termch = 0;
- nflush = 1;
- scanhex(&nflush);
- nflush = (nflush + 31) / 32;
- if (cmd != 'i') {
- for (; nflush > 0; --nflush, adrs += 0x20)
- cflush((void *) adrs);
- } else {
- for (; nflush > 0; --nflush, adrs += 0x20)
- cinval((void *) adrs);
- }
-}
-
-unsigned int
-read_spr(int n)
-{
- unsigned int instrs[2];
- int (*code)(void);
-
- instrs[0] = 0x7c6002a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
- instrs[1] = 0x4e800020;
- store_inst(instrs);
- store_inst(instrs+1);
- code = (int (*)(void)) instrs;
- return code();
-}
-
-void
-write_spr(int n, unsigned int val)
-{
- unsigned int instrs[2];
- int (*code)(unsigned int);
-
- instrs[0] = 0x7c6003a6 + ((n & 0x1F) << 16) + ((n & 0x3e0) << 6);
- instrs[1] = 0x4e800020;
- store_inst(instrs);
- store_inst(instrs+1);
- code = (int (*)(unsigned int)) instrs;
- code(val);
-}
-
-static unsigned int regno;
-extern char exc_prolog;
-extern char dec_exc;
-
-void
-super_regs(void)
-{
- int i, cmd;
- unsigned val;
-
- cmd = skipbl();
- if (cmd == '\n') {
- printf("msr = %x, pvr = %x\n", get_msr(), get_pvr());
- printf("sprg0-3 = %x %x %x %x\n", get_sprg0(), get_sprg1(),
- get_sprg2(), get_sprg3());
- printf("srr0 = %x, srr1 = %x\n", get_srr0(), get_srr1());
-#ifdef CONFIG_PPC_STD_MMU
- printf("sr0-15 =");
- for (i = 0; i < 16; ++i)
- printf(" %x", get_sr(i));
- printf("\n");
-#endif
- asm("mr %0,1" : "=r" (i) :);
- printf("sp = %x ", i);
- asm("mr %0,2" : "=r" (i) :);
- printf("toc = %x\n", i);
- return;
- }
-
- scanhex(®no);
- switch (cmd) {
- case 'w':
- val = read_spr(regno);
- scanhex(&val);
- write_spr(regno, val);
- /* fall through */
- case 'r':
- printf("spr %x = %x\n", regno, read_spr(regno));
- break;
- case 's':
- val = get_sr(regno);
- scanhex(&val);
- set_sr(regno, val);
- break;
- case 'm':
- val = get_msr();
- scanhex(&val);
- set_msr(val);
- break;
- }
- scannl();
-}
-
-#ifndef CONFIG_PPC_STD_MMU
-static void
-dump_hash_table(void)
-{
- printf("This CPU doesn't have a hash table.\n");
-}
-#else
-
-static void
-dump_hash_table_seg(unsigned seg, unsigned start, unsigned end)
-{
- extern void *Hash;
- extern unsigned long Hash_size;
- unsigned *htab = Hash;
- unsigned hsize = Hash_size;
- unsigned v, hmask, va, last_va = 0;
- int found, last_found, i;
- unsigned *hg, w1, last_w2 = 0, last_va0 = 0;
-
- last_found = 0;
- hmask = hsize / 64 - 1;
- va = start;
- start = (start >> 12) & 0xffff;
- end = (end >> 12) & 0xffff;
- for (v = start; v < end; ++v) {
- found = 0;
- hg = htab + (((v ^ seg) & hmask) * 16);
- w1 = 0x80000000 | (seg << 7) | (v >> 10);
- for (i = 0; i < 8; ++i, hg += 2) {
- if (*hg == w1) {
- found = 1;
- break;
- }
- }
- if (!found) {
- w1 ^= 0x40;
- hg = htab + ((~(v ^ seg) & hmask) * 16);
- for (i = 0; i < 8; ++i, hg += 2) {
- if (*hg == w1) {
- found = 1;
- break;
- }
- }
- }
- if (!(last_found && found && (hg[1] & ~0x180) == last_w2 + 4096)) {
- if (last_found) {
- if (last_va != last_va0)
- printf(" ... %x", last_va);
- printf("\n");
- }
- if (found) {
- printf("%x to %x", va, hg[1]);
- last_va0 = va;
- }
- last_found = found;
- }
- if (found) {
- last_w2 = hg[1] & ~0x180;
- last_va = va;
- }
- va += 4096;
- }
- if (last_found)
- printf(" ... %x\n", last_va);
-}
-
-static unsigned hash_ctx;
-static unsigned hash_start;
-static unsigned hash_end;
-
-static void
-dump_hash_table(void)
-{
- int seg;
- unsigned seg_start, seg_end;
-
- hash_ctx = 0;
- hash_start = 0;
- hash_end = 0xfffff000;
- scanhex(&hash_ctx);
- scanhex(&hash_start);
- scanhex(&hash_end);
- printf("Mappings for context %x\n", hash_ctx);
- seg_start = hash_start;
- for (seg = hash_start >> 28; seg <= hash_end >> 28; ++seg) {
- seg_end = (seg << 28) | 0x0ffff000;
- if (seg_end > hash_end)
- seg_end = hash_end;
- dump_hash_table_seg((hash_ctx << 4) + (seg * 0x111),
- seg_start, seg_end);
- seg_start = seg_end + 0x1000;
- }
-}
-#endif /* CONFIG_PPC_STD_MMU */
-
-/*
- * Stuff for reading and writing memory safely
- */
-
-int
-mread(unsigned adrs, void *buf, int size)
-{
- volatile int n;
- char *p, *q;
-
- n = 0;
- if( setjmp(bus_error_jmp) == 0 ){
- debugger_fault_handler = handle_fault;
- sync();
- p = (char *) adrs;
- q = (char *) buf;
- switch (size) {
- case 2: *(short *)q = *(short *)p; break;
- case 4: *(int *)q = *(int *)p; break;
- default:
- for( ; n < size; ++n ) {
- *q++ = *p++;
- sync();
- }
- }
- sync();
- /* wait a little while to see if we get a machine check */
- __delay(200);
- n = size;
- }
- debugger_fault_handler = NULL;
- return n;
-}
-
-int
-mwrite(unsigned adrs, void *buf, int size)
-{
- volatile int n;
- char *p, *q;
-
- n = 0;
- if( setjmp(bus_error_jmp) == 0 ){
- debugger_fault_handler = handle_fault;
- sync();
- p = (char *) adrs;
- q = (char *) buf;
- switch (size) {
- case 2: *(short *)p = *(short *)q; break;
- case 4: *(int *)p = *(int *)q; break;
- default:
- for( ; n < size; ++n ) {
- *p++ = *q++;
- sync();
- }
- }
- sync();
- n = size;
- } else {
- printf("*** Error writing address %x\n", adrs + n);
- }
- debugger_fault_handler = NULL;
- return n;
-}
-
-static int fault_type;
-static int fault_except;
-static char *fault_chars[] = { "--", "**", "##" };
-
-static void
-handle_fault(struct pt_regs *regs)
-{
- fault_except = TRAP(regs);
- fault_type = TRAP(regs) == 0x200? 0: TRAP(regs) == 0x300? 1: 2;
- longjmp(bus_error_jmp, 1);
-}
-
-#define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
-
-void
-byterev(unsigned char *val, int size)
-{
- int t;
-
- switch (size) {
- case 2:
- SWAP(val[0], val[1], t);
- break;
- case 4:
- SWAP(val[0], val[3], t);
- SWAP(val[1], val[2], t);
- break;
- }
-}
-
-static int brev;
-static int mnoread;
-
-void
-memex(void)
-{
- int cmd, inc, i, nslash;
- unsigned n;
- unsigned char val[4];
-
- last_cmd = "m\n";
- scanhex(&adrs);
- while ((cmd = skipbl()) != '\n') {
- switch( cmd ){
- case 'b': size = 1; break;
- case 'w': size = 2; break;
- case 'l': size = 4; break;
- case 'r': brev = !brev; break;
- case 'n': mnoread = 1; break;
- case '.': mnoread = 0; break;
- }
- }
- if( size <= 0 )
- size = 1;
- else if( size > 4 )
- size = 4;
- for(;;){
- if (!mnoread)
- n = mread(adrs, val, size);
- printf("%.8x%c", adrs, brev? 'r': ' ');
- if (!mnoread) {
- if (brev)
- byterev(val, size);
- putchar(' ');
- for (i = 0; i < n; ++i)
- printf("%.2x", val[i]);
- for (; i < size; ++i)
- printf("%s", fault_chars[fault_type]);
- }
- putchar(' ');
- inc = size;
- nslash = 0;
- for(;;){
- if( scanhex(&n) ){
- for (i = 0; i < size; ++i)
- val[i] = n >> (i * 8);
- if (!brev)
- byterev(val, size);
- mwrite(adrs, val, size);
- inc = size;
- }
- cmd = skipbl();
- if (cmd == '\n')
- break;
- inc = 0;
- switch (cmd) {
- case '\'':
- for(;;){
- n = inchar();
- if( n == '\\' )
- n = bsesc();
- else if( n == '\'' )
- break;
- for (i = 0; i < size; ++i)
- val[i] = n >> (i * 8);
- if (!brev)
- byterev(val, size);
- mwrite(adrs, val, size);
- adrs += size;
- }
- adrs -= size;
- inc = size;
- break;
- case ',':
- adrs += size;
- break;
- case '.':
- mnoread = 0;
- break;
- case ';':
- break;
- case 'x':
- case EOF:
- scannl();
- return;
- case 'b':
- case 'v':
- size = 1;
- break;
- case 'w':
- size = 2;
- break;
- case 'l':
- size = 4;
- break;
- case '^':
- adrs -= size;
- break;
- break;
- case '/':
- if (nslash > 0)
- adrs -= 1 << nslash;
- else
- nslash = 0;
- nslash += 4;
- adrs += 1 << nslash;
- break;
- case '\\':
- if (nslash < 0)
- adrs += 1 << -nslash;
- else
- nslash = 0;
- nslash -= 4;
- adrs -= 1 << -nslash;
- break;
- case 'm':
- scanhex(&adrs);
- break;
- case 'n':
- mnoread = 1;
- break;
- case 'r':
- brev = !brev;
- break;
- case '<':
- n = size;
- scanhex(&n);
- adrs -= n;
- break;
- case '>':
- n = size;
- scanhex(&n);
- adrs += n;
- break;
- }
- }
- adrs += inc;
- }
-}
-
-int
-bsesc(void)
-{
- int c;
-
- c = inchar();
- switch( c ){
- case 'n': c = '\n'; break;
- case 'r': c = '\r'; break;
- case 'b': c = '\b'; break;
- case 't': c = '\t'; break;
- }
- return c;
-}
-
-void
-dump(void)
-{
- int c;
-
- c = inchar();
- if ((isxdigit(c) && c != 'f' && c != 'd') || c == '\n')
- termch = c;
- scanhex(&adrs);
- if( termch != '\n')
- termch = 0;
- if( c == 'i' ){
- scanhex(&nidump);
- if( nidump == 0 )
- nidump = 16;
- adrs += ppc_inst_dump(adrs, nidump);
- last_cmd = "di\n";
- } else {
- scanhex(&ndump);
- if( ndump == 0 )
- ndump = 64;
- prdump(adrs, ndump);
- adrs += ndump;
- last_cmd = "d\n";
- }
-}
-
-void
-prdump(unsigned adrs, int ndump)
-{
- register int n, m, c, r, nr;
- unsigned char temp[16];
-
- for( n = ndump; n > 0; ){
- printf("%.8x", adrs);
- putchar(' ');
- r = n < 16? n: 16;
- nr = mread(adrs, temp, r);
- adrs += nr;
- for( m = 0; m < r; ++m ){
- putchar((m & 3) == 0 && m > 0? '.': ' ');
- if( m < nr )
- printf("%.2x", temp[m]);
- else
- printf("%s", fault_chars[fault_type]);
- }
- for(; m < 16; ++m )
- printf(" ");
- printf(" |");
- for( m = 0; m < r; ++m ){
- if( m < nr ){
- c = temp[m];
- putchar(' ' <= c && c <= '~'? c: '.');
- } else
- putchar(' ');
- }
- n -= r;
- for(; m < 16; ++m )
- putchar(' ');
- printf("|\n");
- if( nr < r )
- break;
- }
-}
-
-int
-ppc_inst_dump(unsigned adr, int count)
-{
- int nr, dotted;
- unsigned first_adr;
- unsigned long inst, last_inst = 0;
- unsigned char val[4];
-
- dotted = 0;
- for (first_adr = adr; count > 0; --count, adr += 4){
- nr = mread(adr, val, 4);
- if( nr == 0 ){
- const char *x = fault_chars[fault_type];
- printf("%.8x %s%s%s%s\n", adr, x, x, x, x);
- break;
- }
- inst = GETWORD(val);
- if (adr > first_adr && inst == last_inst) {
- if (!dotted) {
- printf(" ...\n");
- dotted = 1;
- }
- continue;
- }
- dotted = 0;
- last_inst = inst;
- printf("%.8x ", adr);
- printf("%.8x\t", inst);
- print_insn_big_powerpc(stdout, inst, adr); /* always returns 4 */
- printf("\n");
- }
- return adr - first_adr;
-}
-
-void
-print_address(unsigned addr)
-{
- printf("0x%x", addr);
-}
-
-/*
- * Memory operations - move, set, print differences
- */
-static unsigned mdest; /* destination address */
-static unsigned msrc; /* source address */
-static unsigned mval; /* byte value to set memory to */
-static unsigned mcount; /* # bytes to affect */
-static unsigned mdiffs; /* max # differences to print */
-
-void
-memops(int cmd)
-{
- scanhex(&mdest);
- if( termch != '\n' )
- termch = 0;
- scanhex(cmd == 's'? &mval: &msrc);
- if( termch != '\n' )
- termch = 0;
- scanhex(&mcount);
- switch( cmd ){
- case 'm':
- memmove((void *)mdest, (void *)msrc, mcount);
- break;
- case 's':
- memset((void *)mdest, mval, mcount);
- break;
- case 'd':
- if( termch != '\n' )
- termch = 0;
- scanhex(&mdiffs);
- memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
- break;
- }
-}
-
-void
-memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
-{
- unsigned n, prt;
-
- prt = 0;
- for( n = nb; n > 0; --n )
- if( *p1++ != *p2++ )
- if( ++prt <= maxpr )
- printf("%.8x %.2x # %.8x %.2x\n", (unsigned)p1 - 1,
- p1[-1], (unsigned)p2 - 1, p2[-1]);
- if( prt > maxpr )
- printf("Total of %d differences\n", prt);
-}
-
-static unsigned mend;
-static unsigned mask;
-
-void
-memlocate(void)
-{
- unsigned a, n;
- unsigned char val[4];
-
- last_cmd = "ml";
- scanhex(&mdest);
- if (termch != '\n') {
- termch = 0;
- scanhex(&mend);
- if (termch != '\n') {
- termch = 0;
- scanhex(&mval);
- mask = ~0;
- if (termch != '\n') termch = 0;
- scanhex(&mask);
- }
- }
- n = 0;
- for (a = mdest; a < mend; a += 4) {
- if (mread(a, val, 4) == 4
- && ((GETWORD(val) ^ mval) & mask) == 0) {
- printf("%.8x: %.8x\n", a, GETWORD(val));
- if (++n >= 10)
- break;
- }
- }
-}
-
-static unsigned mskip = 0x1000;
-static unsigned mlim = 0xffffffff;
-
-void
-memzcan(void)
-{
- unsigned char v;
- unsigned a;
- int ok, ook;
-
- scanhex(&mdest);
- if (termch != '\n') termch = 0;
- scanhex(&mskip);
- if (termch != '\n') termch = 0;
- scanhex(&mlim);
- ook = 0;
- for (a = mdest; a < mlim; a += mskip) {
- ok = mread(a, &v, 1);
- if (ok && !ook) {
- printf("%.8x .. ", a);
- fflush(stdout);
- } else if (!ok && ook)
- printf("%.8x\n", a - mskip);
- ook = ok;
- if (a + mskip < a)
- break;
- }
- if (ook)
- printf("%.8x\n", a - mskip);
-}
-
-void proccall(void)
-{
- unsigned int args[8];
- unsigned int ret;
- int i;
- typedef unsigned int (*callfunc_t)(unsigned int, unsigned int,
- unsigned int, unsigned int, unsigned int,
- unsigned int, unsigned int, unsigned int);
- callfunc_t func;
-
- scanhex(&adrs);
- if (termch != '\n')
- termch = 0;
- for (i = 0; i < 8; ++i)
- args[i] = 0;
- for (i = 0; i < 8; ++i) {
- if (!scanhex(&args[i]) || termch == '\n')
- break;
- termch = 0;
- }
- func = (callfunc_t) adrs;
- ret = 0;
- if (setjmp(bus_error_jmp) == 0) {
- debugger_fault_handler = handle_fault;
- sync();
- ret = func(args[0], args[1], args[2], args[3],
- args[4], args[5], args[6], args[7]);
- sync();
- printf("return value is %x\n", ret);
- } else {
- printf("*** %x exception occurred\n", fault_except);
- }
- debugger_fault_handler = NULL;
-}
-
-/* Input scanning routines */
-int
-skipbl(void)
-{
- int c;
-
- if( termch != 0 ){
- c = termch;
- termch = 0;
- } else
- c = inchar();
- while( c == ' ' || c == '\t' )
- c = inchar();
- return c;
-}
-
-#define N_PTREGS 44
-static char *regnames[N_PTREGS] = {
- "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
- "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
- "pc", "msr", "or3", "ctr", "lr", "xer", "ccr", "mq",
- "trap", "dar", "dsisr", "res"
-};
-
-int
-scanhex(unsigned *vp)
-{
- int c, d;
- unsigned v;
-
- c = skipbl();
- if (c == '%') {
- /* parse register name */
- char regname[8];
- int i;
-
- for (i = 0; i < sizeof(regname) - 1; ++i) {
- c = inchar();
- if (!isalnum(c)) {
- termch = c;
- break;
- }
- regname[i] = c;
- }
- regname[i] = 0;
- for (i = 0; i < N_PTREGS; ++i) {
- if (strcmp(regnames[i], regname) == 0) {
- unsigned *rp = (unsigned *)
- xmon_regs[smp_processor_id()];
- if (rp == NULL) {
- printf("regs not available\n");
- return 0;
- }
- *vp = rp[i];
- return 1;
- }
- }
- printf("invalid register name '%%%s'\n", regname);
- return 0;
- } else if (c == '$') {
- static char symname[128];
- int i;
- for (i=0; i<63; i++) {
- c = inchar();
- if (isspace(c)) {
- termch = c;
- break;
- }
- symname[i] = c;
- }
- symname[i++] = 0;
- *vp = 0;
- if (setjmp(bus_error_jmp) == 0) {
- debugger_fault_handler = handle_fault;
- sync();
- *vp = kallsyms_lookup_name(symname);
- sync();
- }
- debugger_fault_handler = NULL;
- if (!(*vp)) {
- printf("unknown symbol\n");
- return 0;
- }
- return 1;
- }
-
- d = hexdigit(c);
- if( d == EOF ){
- termch = c;
- return 0;
- }
- v = 0;
- do {
- v = (v << 4) + d;
- c = inchar();
- d = hexdigit(c);
- } while( d != EOF );
- termch = c;
- *vp = v;
- return 1;
-}
-
-void
-scannl(void)
-{
- int c;
-
- c = termch;
- termch = 0;
- while( c != '\n' )
- c = inchar();
-}
-
-int hexdigit(int c)
-{
- if( '0' <= c && c <= '9' )
- return c - '0';
- if( 'A' <= c && c <= 'F' )
- return c - ('A' - 10);
- if( 'a' <= c && c <= 'f' )
- return c - ('a' - 10);
- return EOF;
-}
-
-void
-getstring(char *s, int size)
-{
- int c;
-
- c = skipbl();
- do {
- if( size > 1 ){
- *s++ = c;
- --size;
- }
- c = inchar();
- } while( c != ' ' && c != '\t' && c != '\n' );
- termch = c;
- *s = 0;
-}
-
-static char line[256];
-static char *lineptr;
-
-void
-flush_input(void)
-{
- lineptr = NULL;
-}
-
-int
-inchar(void)
-{
- if (lineptr == NULL || *lineptr == 0) {
- if (fgets(line, sizeof(line), stdin) == NULL) {
- lineptr = NULL;
- return EOF;
- }
- lineptr = line;
- }
- return *lineptr++;
-}
-
-void
-take_input(char *str)
-{
- lineptr = str;
-}
-
-static void
-symbol_lookup(void)
-{
- int type = inchar();
- unsigned addr;
- static char tmp[128];
-
- switch (type) {
- case 'a':
- if (scanhex(&addr))
- xmon_print_symbol(addr, ": ", "\n");
- termch = 0;
- break;
- case 's':
- getstring(tmp, 64);
- if (setjmp(bus_error_jmp) == 0) {
- debugger_fault_handler = handle_fault;
- sync();
- addr = kallsyms_lookup_name(tmp);
- if (addr)
- printf("%s: %lx\n", tmp, addr);
- else
- printf("Symbol '%s' not found.\n", tmp);
- sync();
- }
- debugger_fault_handler = NULL;
- termch = 0;
- break;
- }
-}
-
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 3c36f92..7603c05 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -358,6 +358,7 @@
ret : clocksource_tsc.cycle_last;
}
+#ifdef CONFIG_X86_64
static cycle_t __vsyscall_fn vread_tsc(void)
{
cycle_t ret = (cycle_t)vget_cycles();
@@ -365,6 +366,7 @@
return ret >= __vsyscall_gtod_data.clock.cycle_last ?
ret : __vsyscall_gtod_data.clock.cycle_last;
}
+#endif
static struct clocksource clocksource_tsc = {
.name = "tsc",
diff --git a/block/bsg.c b/block/bsg.c
index 0b3b282..5fb9b0b 100644
--- a/block/bsg.c
+++ b/block/bsg.c
@@ -740,8 +740,13 @@
mutex_lock(&bsg_mutex);
do_free = atomic_dec_and_test(&bd->ref_count);
- if (!do_free)
+ if (!do_free) {
+ mutex_unlock(&bsg_mutex);
goto out;
+ }
+
+ hlist_del(&bd->dev_list);
+ mutex_unlock(&bsg_mutex);
dprintk("%s: tearing down\n", bd->name);
@@ -757,10 +762,8 @@
*/
ret = bsg_complete_all_commands(bd);
- hlist_del(&bd->dev_list);
kfree(bd);
out:
- mutex_unlock(&bsg_mutex);
kref_put(&q->bsg_dev.ref, bsg_kref_release_function);
if (do_free)
blk_put_queue(q);
diff --git a/crypto/Kconfig b/crypto/Kconfig
index ea50357..d831859 100644
--- a/crypto/Kconfig
+++ b/crypto/Kconfig
@@ -666,15 +666,6 @@
help
This is the LZO algorithm.
-comment "Random Number Generation"
-
-config CRYPTO_PRNG
- tristate "Pseudo Random Number Generation for Cryptographic modules"
- help
- This option enables the generic pseudo random number generator
- for cryptographic modules. Uses the Algorithm specified in
- ANSI X9.31 A.2.4
-
source "drivers/crypto/Kconfig"
endif # if CRYPTO
diff --git a/crypto/Makefile b/crypto/Makefile
index ef61b3b..d4f3ed8 100644
--- a/crypto/Makefile
+++ b/crypto/Makefile
@@ -69,7 +69,7 @@
obj-$(CONFIG_CRYPTO_CRC32C) += crc32c.o
obj-$(CONFIG_CRYPTO_AUTHENC) += authenc.o
obj-$(CONFIG_CRYPTO_LZO) += lzo.o
-obj-$(CONFIG_CRYPTO_PRNG) += prng.o
+
obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o
#
diff --git a/crypto/prng.c b/crypto/prng.c
deleted file mode 100644
index 24e4f32..0000000
--- a/crypto/prng.c
+++ /dev/null
@@ -1,410 +0,0 @@
-/*
- * PRNG: Pseudo Random Number Generator
- * Based on NIST Recommended PRNG From ANSI X9.31 Appendix A.2.4 using
- * AES 128 cipher in RFC3686 ctr mode
- *
- * (C) Neil Horman <nhorman@tuxdriver.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * any later version.
- *
- *
- */
-
-#include <linux/err.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <linux/scatterlist.h>
-#include <linux/string.h>
-#include <linux/crypto.h>
-#include <linux/highmem.h>
-#include <linux/moduleparam.h>
-#include <linux/jiffies.h>
-#include <linux/timex.h>
-#include <linux/interrupt.h>
-#include <linux/miscdevice.h>
-#include "prng.h"
-
-#define TEST_PRNG_ON_START 0
-
-#define DEFAULT_PRNG_KEY "0123456789abcdef1011"
-#define DEFAULT_PRNG_KSZ 20
-#define DEFAULT_PRNG_IV "defaultv"
-#define DEFAULT_PRNG_IVSZ 8
-#define DEFAULT_BLK_SZ 16
-#define DEFAULT_V_SEED "zaybxcwdveuftgsh"
-
-/*
- * Flags for the prng_context flags field
- */
-
-#define PRNG_FIXED_SIZE 0x1
-#define PRNG_NEED_RESET 0x2
-
-/*
- * Note: DT is our counter value
- * I is our intermediate value
- * V is our seed vector
- * See http://csrc.nist.gov/groups/STM/cavp/documents/rng/931rngext.pdf
- * for implementation details
- */
-
-
-struct prng_context {
- char *prng_key;
- char *prng_iv;
- spinlock_t prng_lock;
- unsigned char rand_data[DEFAULT_BLK_SZ];
- unsigned char last_rand_data[DEFAULT_BLK_SZ];
- unsigned char DT[DEFAULT_BLK_SZ];
- unsigned char I[DEFAULT_BLK_SZ];
- unsigned char V[DEFAULT_BLK_SZ];
- u32 rand_data_valid;
- struct crypto_blkcipher *tfm;
- u32 flags;
-};
-
-static int dbg;
-
-static void hexdump(char *note, unsigned char *buf, unsigned int len)
-{
- if (dbg) {
- printk(KERN_CRIT "%s", note);
- print_hex_dump(KERN_CONT, "", DUMP_PREFIX_OFFSET,
- 16, 1,
- buf, len, false);
- }
-}
-
-#define dbgprint(format, args...) do {if(dbg) printk(format, ##args);} while(0)
-
-static void xor_vectors(unsigned char *in1, unsigned char *in2,
- unsigned char *out, unsigned int size)
-{
- int i;
-
- for (i=0;i<size;i++)
- out[i] = in1[i] ^ in2[i];
-
-}
-/*
- * Returns DEFAULT_BLK_SZ bytes of random data per call
- * returns 0 if generation succeded, <0 if something went wrong
- */
-static int _get_more_prng_bytes(struct prng_context *ctx)
-{
- int i;
- struct blkcipher_desc desc;
- struct scatterlist sg_in, sg_out;
- int ret;
- unsigned char tmp[DEFAULT_BLK_SZ];
-
- desc.tfm = ctx->tfm;
- desc.flags = 0;
-
-
- dbgprint(KERN_CRIT "Calling _get_more_prng_bytes for context %p\n",ctx);
-
- hexdump("Input DT: ", ctx->DT, DEFAULT_BLK_SZ);
- hexdump("Input I: ", ctx->I, DEFAULT_BLK_SZ);
- hexdump("Input V: ", ctx->V, DEFAULT_BLK_SZ);
-
- /*
- * This algorithm is a 3 stage state machine
- */
- for (i=0;i<3;i++) {
-
- desc.tfm = ctx->tfm;
- desc.flags = 0;
- switch (i) {
- case 0:
- /*
- * Start by encrypting the counter value
- * This gives us an intermediate value I
- */
- memcpy(tmp, ctx->DT, DEFAULT_BLK_SZ);
- sg_init_one(&sg_out, &ctx->I[0], DEFAULT_BLK_SZ);
- hexdump("tmp stage 0: ", tmp, DEFAULT_BLK_SZ);
- break;
- case 1:
-
- /*
- * Next xor I with our secret vector V
- * encrypt that result to obtain our
- * pseudo random data which we output
- */
- xor_vectors(ctx->I, ctx->V, tmp, DEFAULT_BLK_SZ);
- sg_init_one(&sg_out, &ctx->rand_data[0], DEFAULT_BLK_SZ);
- hexdump("tmp stage 1: ", tmp, DEFAULT_BLK_SZ);
- break;
- case 2:
- /*
- * First check that we didn't produce the same random data
- * that we did last time around through this
- */
- if (!memcmp(ctx->rand_data, ctx->last_rand_data, DEFAULT_BLK_SZ)) {
- printk(KERN_ERR "ctx %p Failed repetition check!\n",
- ctx);
- ctx->flags |= PRNG_NEED_RESET;
- return -1;
- }
- memcpy(ctx->last_rand_data, ctx->rand_data, DEFAULT_BLK_SZ);
-
- /*
- * Lastly xor the random data with I
- * and encrypt that to obtain a new secret vector V
- */
- xor_vectors(ctx->rand_data, ctx->I, tmp, DEFAULT_BLK_SZ);
- sg_init_one(&sg_out, &ctx->V[0], DEFAULT_BLK_SZ);
- hexdump("tmp stage 2: ", tmp, DEFAULT_BLK_SZ);
- break;
- }
-
- /* Initialize our input buffer */
- sg_init_one(&sg_in, &tmp[0], DEFAULT_BLK_SZ);
-
- /* do the encryption */
- ret = crypto_blkcipher_encrypt(&desc, &sg_out, &sg_in, DEFAULT_BLK_SZ);
-
- /* And check the result */
- if (ret) {
- dbgprint(KERN_CRIT "Encryption of new block failed for context %p\n",ctx);
- ctx->rand_data_valid = DEFAULT_BLK_SZ;
- return -1;
- }
-
- }
-
- /*
- * Now update our DT value
- */
- for (i=DEFAULT_BLK_SZ-1;i>0;i--) {
- ctx->DT[i] = ctx->DT[i-1];
- }
- ctx->DT[0] += 1;
-
- dbgprint("Returning new block for context %p\n",ctx);
- ctx->rand_data_valid = 0;
-
- hexdump("Output DT: ", ctx->DT, DEFAULT_BLK_SZ);
- hexdump("Output I: ", ctx->I, DEFAULT_BLK_SZ);
- hexdump("Output V: ", ctx->V, DEFAULT_BLK_SZ);
- hexdump("New Random Data: ", ctx->rand_data, DEFAULT_BLK_SZ);
-
- return 0;
-}
-
-/* Our exported functions */
-int get_prng_bytes(char *buf, int nbytes, struct prng_context *ctx)
-{
- unsigned long flags;
- unsigned char *ptr = buf;
- unsigned int byte_count = (unsigned int)nbytes;
- int err;
-
-
- if (nbytes < 0)
- return -EINVAL;
-
- spin_lock_irqsave(&ctx->prng_lock, flags);
-
- err = -EFAULT;
- if (ctx->flags & PRNG_NEED_RESET)
- goto done;
-
- /*
- * If the FIXED_SIZE flag is on, only return whole blocks of
- * pseudo random data
- */
- err = -EINVAL;
- if (ctx->flags & PRNG_FIXED_SIZE) {
- if (nbytes < DEFAULT_BLK_SZ)
- goto done;
- byte_count = DEFAULT_BLK_SZ;
- }
-
- err = byte_count;
-
- dbgprint(KERN_CRIT "getting %d random bytes for context %p\n",byte_count, ctx);
-
-
-remainder:
- if (ctx->rand_data_valid == DEFAULT_BLK_SZ) {
- if (_get_more_prng_bytes(ctx) < 0) {
- memset(buf, 0, nbytes);
- err = -EFAULT;
- goto done;
- }
- }
-
- /*
- * Copy up to the next whole block size
- */
- if (byte_count < DEFAULT_BLK_SZ) {
- for (;ctx->rand_data_valid < DEFAULT_BLK_SZ; ctx->rand_data_valid++) {
- *ptr = ctx->rand_data[ctx->rand_data_valid];
- ptr++;
- byte_count--;
- if (byte_count == 0)
- goto done;
- }
- }
-
- /*
- * Now copy whole blocks
- */
- for(;byte_count >= DEFAULT_BLK_SZ; byte_count -= DEFAULT_BLK_SZ) {
- if (_get_more_prng_bytes(ctx) < 0) {
- memset(buf, 0, nbytes);
- err = -1;
- goto done;
- }
- memcpy(ptr, ctx->rand_data, DEFAULT_BLK_SZ);
- ctx->rand_data_valid += DEFAULT_BLK_SZ;
- ptr += DEFAULT_BLK_SZ;
- }
-
- /*
- * Now copy any extra partial data
- */
- if (byte_count)
- goto remainder;
-
-done:
- spin_unlock_irqrestore(&ctx->prng_lock, flags);
- dbgprint(KERN_CRIT "returning %d from get_prng_bytes in context %p\n",err, ctx);
- return err;
-}
-EXPORT_SYMBOL_GPL(get_prng_bytes);
-
-struct prng_context *alloc_prng_context(void)
-{
- struct prng_context *ctx=kzalloc(sizeof(struct prng_context), GFP_KERNEL);
-
- spin_lock_init(&ctx->prng_lock);
-
- if (reset_prng_context(ctx, NULL, NULL, NULL, NULL)) {
- kfree(ctx);
- ctx = NULL;
- }
-
- dbgprint(KERN_CRIT "returning context %p\n",ctx);
- return ctx;
-}
-
-EXPORT_SYMBOL_GPL(alloc_prng_context);
-
-void free_prng_context(struct prng_context *ctx)
-{
- crypto_free_blkcipher(ctx->tfm);
- kfree(ctx);
-}
-EXPORT_SYMBOL_GPL(free_prng_context);
-
-int reset_prng_context(struct prng_context *ctx,
- unsigned char *key, unsigned char *iv,
- unsigned char *V, unsigned char *DT)
-{
- int ret;
- int iv_len;
- int rc = -EFAULT;
-
- spin_lock(&ctx->prng_lock);
- ctx->flags |= PRNG_NEED_RESET;
-
- if (key)
- memcpy(ctx->prng_key,key,strlen(ctx->prng_key));
- else
- ctx->prng_key = DEFAULT_PRNG_KEY;
-
- if (iv)
- memcpy(ctx->prng_iv,iv, strlen(ctx->prng_iv));
- else
- ctx->prng_iv = DEFAULT_PRNG_IV;
-
- if (V)
- memcpy(ctx->V,V,DEFAULT_BLK_SZ);
- else
- memcpy(ctx->V,DEFAULT_V_SEED,DEFAULT_BLK_SZ);
-
- if (DT)
- memcpy(ctx->DT, DT, DEFAULT_BLK_SZ);
- else
- memset(ctx->DT, 0, DEFAULT_BLK_SZ);
-
- memset(ctx->rand_data,0,DEFAULT_BLK_SZ);
- memset(ctx->last_rand_data,0,DEFAULT_BLK_SZ);
-
- if (ctx->tfm)
- crypto_free_blkcipher(ctx->tfm);
-
- ctx->tfm = crypto_alloc_blkcipher("rfc3686(ctr(aes))",0,0);
- if (!ctx->tfm) {
- dbgprint(KERN_CRIT "Failed to alloc crypto tfm for context %p\n",ctx->tfm);
- goto out;
- }
-
- ctx->rand_data_valid = DEFAULT_BLK_SZ;
-
- ret = crypto_blkcipher_setkey(ctx->tfm, ctx->prng_key, strlen(ctx->prng_key));
- if (ret) {
- dbgprint(KERN_CRIT "PRNG: setkey() failed flags=%x\n",
- crypto_blkcipher_get_flags(ctx->tfm));
- crypto_free_blkcipher(ctx->tfm);
- goto out;
- }
-
- iv_len = crypto_blkcipher_ivsize(ctx->tfm);
- if (iv_len) {
- crypto_blkcipher_set_iv(ctx->tfm, ctx->prng_iv, iv_len);
- }
- rc = 0;
- ctx->flags &= ~PRNG_NEED_RESET;
-out:
- spin_unlock(&ctx->prng_lock);
-
- return rc;
-
-}
-EXPORT_SYMBOL_GPL(reset_prng_context);
-
-/* Module initalization */
-static int __init prng_mod_init(void)
-{
-
-#ifdef TEST_PRNG_ON_START
- int i;
- unsigned char tmpbuf[DEFAULT_BLK_SZ];
-
- struct prng_context *ctx = alloc_prng_context();
- if (ctx == NULL)
- return -EFAULT;
- for (i=0;i<16;i++) {
- if (get_prng_bytes(tmpbuf, DEFAULT_BLK_SZ, ctx) < 0) {
- free_prng_context(ctx);
- return -EFAULT;
- }
- }
- free_prng_context(ctx);
-#endif
-
- return 0;
-}
-
-static void __exit prng_mod_fini(void)
-{
- return;
-}
-
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("Software Pseudo Random Number Generator");
-MODULE_AUTHOR("Neil Horman <nhorman@tuxdriver.com>");
-module_param(dbg, int, 0);
-MODULE_PARM_DESC(dbg, "Boolean to enable debugging (0/1 == off/on)");
-module_init(prng_mod_init);
-module_exit(prng_mod_fini);
diff --git a/crypto/prng.h b/crypto/prng.h
deleted file mode 100644
index 1ac9be5..0000000
--- a/crypto/prng.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * PRNG: Pseudo Random Number Generator
- *
- * (C) Neil Horman <nhorman@tuxdriver.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * any later version.
- *
- *
- */
-
-#ifndef _PRNG_H_
-#define _PRNG_H_
-struct prng_context;
-
-int get_prng_bytes(char *buf, int nbytes, struct prng_context *ctx);
-struct prng_context *alloc_prng_context(void);
-int reset_prng_context(struct prng_context *ctx,
- unsigned char *key, unsigned char *iv,
- unsigned char *V,
- unsigned char *DT);
-void free_prng_context(struct prng_context *ctx);
-
-#endif
-
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index bc79df6..a9e8273 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c
@@ -16,10 +16,10 @@
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/libata.h>
+#include <linux/of_platform.h>
#include <asm/types.h>
#include <asm/prom.h>
-#include <asm/of_platform.h>
#include <asm/mpc52xx.h>
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 2d854bb..650e6b4 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -649,6 +649,14 @@
which will also be compiled when this driver is built as a
module.
+config IBM_BSR
+ tristate "IBM POWER Barrier Synchronization Register support"
+ depends on PPC_PSERIES
+ help
+ This devices exposes a hardware mechanism for fast synchronization
+ of threads across a large system which avoids bouncing a cacheline
+ between several cores on a system
+
source "drivers/char/ipmi/Kconfig"
config DS1620
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 81630a6..0e0d12a 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -57,6 +57,7 @@
obj-$(CONFIG_VIOCONS) += viocons.o
obj-$(CONFIG_VIOTAPE) += viotape.o
obj-$(CONFIG_HVCS) += hvcs.o
+obj-$(CONFIG_IBM_BSR) += bsr.o
obj-$(CONFIG_SGI_MBCS) += mbcs.o
obj-$(CONFIG_BRIQ_PANEL) += briq_panel.o
obj-$(CONFIG_BFIN_OTP) += bfin-otp.o
diff --git a/drivers/char/bsr.c b/drivers/char/bsr.c
new file mode 100644
index 0000000..b650b4e
--- /dev/null
+++ b/drivers/char/bsr.c
@@ -0,0 +1,312 @@
+/* IBM POWER Barrier Synchronization Register Driver
+ *
+ * Copyright IBM Corporation 2008
+ *
+ * Author: Sonny Rao <sonnyrao@us.ibm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+#include <linux/module.h>
+#include <linux/cdev.h>
+#include <linux/list.h>
+#include <linux/mm.h>
+#include <asm/io.h>
+
+/*
+ This driver exposes a special register which can be used for fast
+ synchronization across a large SMP machine. The hardware is exposed
+ as an array of bytes where each process will write to one of the bytes to
+ indicate it has finished the current stage and this update is broadcast to
+ all processors without having to bounce a cacheline between them. In
+ POWER5 and POWER6 there is one of these registers per SMP, but it is
+ presented in two forms; first, it is given as a whole and then as a number
+ of smaller registers which alias to parts of the single whole register.
+ This can potentially allow multiple groups of processes to each have their
+ own private synchronization device.
+
+ Note that this hardware *must* be written to using *only* single byte writes.
+ It may be read using 1, 2, 4, or 8 byte loads which must be aligned since
+ this region is treated as cache-inhibited processes should also use a
+ full sync before and after writing to the BSR to ensure all stores and
+ the BSR update have made it to all chips in the system
+*/
+
+/* This is arbitrary number, up to Power6 it's been 17 or fewer */
+#define BSR_MAX_DEVS (32)
+
+struct bsr_dev {
+ u64 bsr_addr; /* Real address */
+ u64 bsr_len; /* length of mem region we can map */
+ unsigned bsr_bytes; /* size of the BSR reg itself */
+ unsigned bsr_stride; /* interval at which BSR repeats in the page */
+ unsigned bsr_type; /* maps to enum below */
+ unsigned bsr_num; /* bsr id number for its type */
+ int bsr_minor;
+
+ dev_t bsr_dev;
+ struct cdev bsr_cdev;
+ struct device *bsr_device;
+ char bsr_name[32];
+
+};
+
+static unsigned num_bsr_devs;
+static struct bsr_dev *bsr_devs;
+static struct class *bsr_class;
+static int bsr_major;
+
+enum {
+ BSR_8 = 0,
+ BSR_16 = 1,
+ BSR_64 = 2,
+ BSR_128 = 3,
+ BSR_UNKNOWN = 4,
+ BSR_MAX = 5,
+};
+
+static unsigned bsr_types[BSR_MAX];
+
+static ssize_t
+bsr_size_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct bsr_dev *bsr_dev = dev_get_drvdata(dev);
+ return sprintf(buf, "%u\n", bsr_dev->bsr_bytes);
+}
+
+static ssize_t
+bsr_stride_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct bsr_dev *bsr_dev = dev_get_drvdata(dev);
+ return sprintf(buf, "%u\n", bsr_dev->bsr_stride);
+}
+
+static ssize_t
+bsr_len_show(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct bsr_dev *bsr_dev = dev_get_drvdata(dev);
+ return sprintf(buf, "%lu\n", bsr_dev->bsr_len);
+}
+
+static struct device_attribute bsr_dev_attrs[] = {
+ __ATTR(bsr_size, S_IRUGO, bsr_size_show, NULL),
+ __ATTR(bsr_stride, S_IRUGO, bsr_stride_show, NULL),
+ __ATTR(bsr_length, S_IRUGO, bsr_len_show, NULL),
+ __ATTR_NULL
+};
+
+static int bsr_mmap(struct file *filp, struct vm_area_struct *vma)
+{
+ unsigned long size = vma->vm_end - vma->vm_start;
+ struct bsr_dev *dev = filp->private_data;
+
+ if (size > dev->bsr_len || (size & (PAGE_SIZE-1)))
+ return -EINVAL;
+
+ vma->vm_flags |= (VM_IO | VM_DONTEXPAND);
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ if (io_remap_pfn_range(vma, vma->vm_start, dev->bsr_addr >> PAGE_SHIFT,
+ size, vma->vm_page_prot))
+ return -EAGAIN;
+
+ return 0;
+}
+
+static int bsr_open(struct inode * inode, struct file * filp)
+{
+ struct cdev *cdev = inode->i_cdev;
+ struct bsr_dev *dev = container_of(cdev, struct bsr_dev, bsr_cdev);
+
+ filp->private_data = dev;
+ return 0;
+}
+
+const static struct file_operations bsr_fops = {
+ .owner = THIS_MODULE,
+ .mmap = bsr_mmap,
+ .open = bsr_open,
+};
+
+static void bsr_cleanup_devs(void)
+{
+ int i;
+ for (i=0 ; i < num_bsr_devs; i++) {
+ struct bsr_dev *cur = bsr_devs + i;
+ if (cur->bsr_device) {
+ cdev_del(&cur->bsr_cdev);
+ device_del(cur->bsr_device);
+ }
+ }
+
+ kfree(bsr_devs);
+}
+
+static int bsr_create_devs(struct device_node *bn)
+{
+ int bsr_stride_len, bsr_bytes_len;
+ const u32 *bsr_stride;
+ const u32 *bsr_bytes;
+ unsigned i;
+
+ bsr_stride = of_get_property(bn, "ibm,lock-stride", &bsr_stride_len);
+ bsr_bytes = of_get_property(bn, "ibm,#lock-bytes", &bsr_bytes_len);
+
+ if (!bsr_stride || !bsr_bytes ||
+ (bsr_stride_len != bsr_bytes_len)) {
+ printk(KERN_ERR "bsr of-node has missing/incorrect property\n");
+ return -ENODEV;
+ }
+
+ num_bsr_devs = bsr_bytes_len / sizeof(u32);
+
+ /* only a warning, its informational since we'll fail and exit */
+ WARN_ON(num_bsr_devs > BSR_MAX_DEVS);
+
+ bsr_devs = kzalloc(sizeof(struct bsr_dev) * num_bsr_devs, GFP_KERNEL);
+ if (!bsr_devs)
+ return -ENOMEM;
+
+ for (i = 0 ; i < num_bsr_devs; i++) {
+ struct bsr_dev *cur = bsr_devs + i;
+ struct resource res;
+ int result;
+
+ result = of_address_to_resource(bn, i, &res);
+ if (result < 0) {
+ printk(KERN_ERR "bsr of-node has invalid reg property\n");
+ goto out_err;
+ }
+
+ cur->bsr_minor = i;
+ cur->bsr_addr = res.start;
+ cur->bsr_len = res.end - res.start + 1;
+ cur->bsr_bytes = bsr_bytes[i];
+ cur->bsr_stride = bsr_stride[i];
+ cur->bsr_dev = MKDEV(bsr_major, i);
+
+ switch(cur->bsr_bytes) {
+ case 8:
+ cur->bsr_type = BSR_8;
+ break;
+ case 16:
+ cur->bsr_type = BSR_16;
+ break;
+ case 64:
+ cur->bsr_type = BSR_64;
+ break;
+ case 128:
+ cur->bsr_type = BSR_128;
+ break;
+ default:
+ cur->bsr_type = BSR_UNKNOWN;
+ printk(KERN_INFO "unknown BSR size %d\n",cur->bsr_bytes);
+ }
+
+ cur->bsr_num = bsr_types[cur->bsr_type];
+ bsr_types[cur->bsr_type] = cur->bsr_num + 1;
+ snprintf(cur->bsr_name, 32, "bsr%d_%d",
+ cur->bsr_bytes, cur->bsr_num);
+
+ cdev_init(&cur->bsr_cdev, &bsr_fops);
+ result = cdev_add(&cur->bsr_cdev, cur->bsr_dev, 1);
+ if (result)
+ goto out_err;
+
+ cur->bsr_device = device_create_drvdata(bsr_class, NULL,
+ cur->bsr_dev,
+ cur, cur->bsr_name);
+ if (!cur->bsr_device) {
+ printk(KERN_ERR "device_create failed for %s\n",
+ cur->bsr_name);
+ cdev_del(&cur->bsr_cdev);
+ goto out_err;
+ }
+ }
+
+ return 0;
+
+ out_err:
+
+ bsr_cleanup_devs();
+ return -ENODEV;
+}
+
+static int __init bsr_init(void)
+{
+ struct device_node *np;
+ dev_t bsr_dev = MKDEV(bsr_major, 0);
+ int ret = -ENODEV;
+ int result;
+
+ np = of_find_compatible_node(NULL, "ibm,bsr", "ibm,bsr");
+ if (!np)
+ goto out_err;
+
+ bsr_class = class_create(THIS_MODULE, "bsr");
+ if (IS_ERR(bsr_class)) {
+ printk(KERN_ERR "class_create() failed for bsr_class\n");
+ goto out_err_1;
+ }
+ bsr_class->dev_attrs = bsr_dev_attrs;
+
+ result = alloc_chrdev_region(&bsr_dev, 0, BSR_MAX_DEVS, "bsr");
+ bsr_major = MAJOR(bsr_dev);
+ if (result < 0) {
+ printk(KERN_ERR "alloc_chrdev_region() failed for bsr\n");
+ goto out_err_2;
+ }
+
+ if ((ret = bsr_create_devs(np)) < 0)
+ goto out_err_3;
+
+ of_node_put(np);
+
+ return 0;
+
+ out_err_3:
+ unregister_chrdev_region(bsr_dev, BSR_MAX_DEVS);
+
+ out_err_2:
+ class_destroy(bsr_class);
+
+ out_err_1:
+ of_node_put(np);
+
+ out_err:
+
+ return ret;
+}
+
+static void __exit bsr_exit(void)
+{
+
+ bsr_cleanup_devs();
+
+ if (bsr_class)
+ class_destroy(bsr_class);
+
+ if (bsr_major)
+ unregister_chrdev_region(MKDEV(bsr_major, 0), BSR_MAX_DEVS);
+}
+
+module_init(bsr_init);
+module_exit(bsr_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Sonny Rao <sonnyrao@us.ibm.com>");
diff --git a/drivers/char/hvc_console.c b/drivers/char/hvc_console.c
index 44160d5..2f9759d 100644
--- a/drivers/char/hvc_console.c
+++ b/drivers/char/hvc_console.c
@@ -675,12 +675,6 @@
return poll_mask;
}
-#if defined(CONFIG_XMON) && defined(CONFIG_SMP)
-extern cpumask_t cpus_in_xmon;
-#else
-static const cpumask_t cpus_in_xmon = CPU_MASK_NONE;
-#endif
-
/*
* This kthread is either polling or interrupt driven. This is determined by
* calling hvc_poll() who determines whether a console adapter support
@@ -698,7 +692,7 @@
hvc_kicked = 0;
try_to_freeze();
wmb();
- if (cpus_empty(cpus_in_xmon)) {
+ if (!cpus_are_in_xmon()) {
spin_lock(&hvc_structs_lock);
list_for_each_entry(hp, &hvc_structs, next) {
poll_mask |= hvc_poll(hp);
diff --git a/drivers/char/hvc_console.h b/drivers/char/hvc_console.h
index 8c59818..42ffb17 100644
--- a/drivers/char/hvc_console.h
+++ b/drivers/char/hvc_console.h
@@ -60,4 +60,14 @@
/* remove a vterm from hvc tty operation (modele_exit or hotplug remove) */
extern int __devexit hvc_remove(struct hvc_struct *hp);
+
+#if defined(CONFIG_XMON) && defined(CONFIG_SMP)
+#include <asm/xmon.h>
+#else
+static inline int cpus_are_in_xmon(void)
+{
+ return 0;
+}
+#endif
+
#endif // HVC_CONSOLE_H
diff --git a/drivers/char/hw_random/pasemi-rng.c b/drivers/char/hw_random/pasemi-rng.c
index 6d50e9bc..7fa61dd 100644
--- a/drivers/char/hw_random/pasemi-rng.c
+++ b/drivers/char/hw_random/pasemi-rng.c
@@ -24,7 +24,7 @@
#include <linux/platform_device.h>
#include <linux/hw_random.h>
#include <linux/delay.h>
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
#include <asm/io.h>
#define SDCRNG_CTL_REG 0x00
diff --git a/drivers/char/viotape.c b/drivers/char/viotape.c
index 977f7d3..e5da98d 100644
--- a/drivers/char/viotape.c
+++ b/drivers/char/viotape.c
@@ -678,6 +678,17 @@
return ret;
}
+static long viotap_unlocked_ioctl(struct file *file,
+ unsigned int cmd, unsigned long arg)
+{
+ long rc;
+
+ lock_kernel();
+ rc = viotap_ioctl(file->f_path.dentry->d_inode, file, cmd, arg);
+ unlock_kernel();
+ return rc;
+}
+
static int viotap_open(struct inode *inode, struct file *file)
{
HvLpEvent_Rc hvrc;
@@ -786,12 +797,12 @@
}
const struct file_operations viotap_fops = {
- .owner = THIS_MODULE,
- .read = viotap_read,
- .write = viotap_write,
- .ioctl = viotap_ioctl,
- .open = viotap_open,
- .release = viotap_release,
+ .owner = THIS_MODULE,
+ .read = viotap_read,
+ .write = viotap_write,
+ .unlocked_ioctl = viotap_unlocked_ioctl,
+ .open = viotap_open,
+ .release = viotap_release,
};
/* Handle interrupt events for tape */
diff --git a/drivers/hwmon/ad7418.c b/drivers/hwmon/ad7418.c
index 466b9ee..f97b5b3 100644
--- a/drivers/hwmon/ad7418.c
+++ b/drivers/hwmon/ad7418.c
@@ -23,12 +23,9 @@
#include "lm75.h"
-#define DRV_VERSION "0.3"
+#define DRV_VERSION "0.4"
-/* Addresses to scan */
-static const unsigned short normal_i2c[] = { 0x28, I2C_CLIENT_END };
-/* Insmod parameters */
-I2C_CLIENT_INSMOD_3(ad7416, ad7417, ad7418);
+enum chips { ad7416, ad7417, ad7418 };
/* AD7418 registers */
#define AD7418_REG_TEMP_IN 0x00
@@ -46,7 +43,6 @@
AD7418_REG_TEMP_OS };
struct ad7418_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct attribute_group attrs;
enum chips type;
@@ -58,16 +54,25 @@
u16 in[4];
};
-static int ad7418_attach_adapter(struct i2c_adapter *adapter);
-static int ad7418_detect(struct i2c_adapter *adapter, int address, int kind);
-static int ad7418_detach_client(struct i2c_client *client);
+static int ad7418_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int ad7418_remove(struct i2c_client *client);
+
+static const struct i2c_device_id ad7418_id[] = {
+ { "ad7416", ad7416 },
+ { "ad7417", ad7417 },
+ { "ad7418", ad7418 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ad7418_id);
static struct i2c_driver ad7418_driver = {
.driver = {
.name = "ad7418",
},
- .attach_adapter = ad7418_attach_adapter,
- .detach_client = ad7418_detach_client,
+ .probe = ad7418_probe,
+ .remove = ad7418_remove,
+ .id_table = ad7418_id,
};
/* All registers are word-sized, except for the configuration registers.
@@ -192,13 +197,6 @@
static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_adc, NULL, 2);
static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_adc, NULL, 3);
-static int ad7418_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, ad7418_detect);
-}
-
static struct attribute *ad7416_attributes[] = {
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
@@ -225,98 +223,46 @@
NULL
};
-static int ad7418_detect(struct i2c_adapter *adapter, int address, int kind)
+static int ad7418_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
{
- struct i2c_client *client;
+ struct i2c_adapter *adapter = client->adapter;
struct ad7418_data *data;
- int err = 0;
+ int err;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
- I2C_FUNC_SMBUS_WORD_DATA))
+ I2C_FUNC_SMBUS_WORD_DATA)) {
+ err = -EOPNOTSUPP;
goto exit;
+ }
if (!(data = kzalloc(sizeof(struct ad7418_data), GFP_KERNEL))) {
err = -ENOMEM;
goto exit;
}
- client = &data->client;
- client->addr = address;
- client->adapter = adapter;
- client->driver = &ad7418_driver;
-
i2c_set_clientdata(client, data);
mutex_init(&data->lock);
-
- /* AD7418 has a curious behaviour on registers 6 and 7. They
- * both always read 0xC071 and are not documented on the datasheet.
- * We use them to detect the chip.
- */
- if (kind <= 0) {
- int reg, reg6, reg7;
-
- /* the AD7416 lies within this address range, but I have
- * no means to check.
- */
- if (address >= 0x48 && address <= 0x4f) {
- /* XXX add tests for AD7416 here */
- /* data->type = ad7416; */
- }
- /* here we might have AD7417 or AD7418 */
- else if (address >= 0x28 && address <= 0x2f) {
- reg6 = i2c_smbus_read_word_data(client, 0x06);
- reg7 = i2c_smbus_read_word_data(client, 0x07);
-
- if (address == 0x28 && reg6 == 0xC071 && reg7 == 0xC071)
- data->type = ad7418;
-
- /* XXX add tests for AD7417 here */
-
-
- /* both AD7417 and AD7418 have bits 0-5 of
- * the CONF2 register at 0
- */
- reg = i2c_smbus_read_byte_data(client,
- AD7418_REG_CONF2);
- if (reg & 0x3F)
- data->type = any_chip; /* detection failed */
- }
- } else {
- dev_dbg(&adapter->dev, "detection forced\n");
- }
-
- if (kind > 0)
- data->type = kind;
- else if (kind < 0 && data->type == any_chip) {
- err = -ENODEV;
- goto exit_free;
- }
+ data->type = id->driver_data;
switch (data->type) {
- case any_chip:
case ad7416:
data->adc_max = 0;
data->attrs.attrs = ad7416_attributes;
- strlcpy(client->name, "ad7416", I2C_NAME_SIZE);
break;
case ad7417:
data->adc_max = 4;
data->attrs.attrs = ad7417_attributes;
- strlcpy(client->name, "ad7417", I2C_NAME_SIZE);
break;
case ad7418:
data->adc_max = 1;
data->attrs.attrs = ad7418_attributes;
- strlcpy(client->name, "ad7418", I2C_NAME_SIZE);
break;
}
- if ((err = i2c_attach_client(client)))
- goto exit_free;
-
dev_info(&client->dev, "%s chip found\n", client->name);
/* Initialize the AD7418 chip */
@@ -324,7 +270,7 @@
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &data->attrs)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -336,20 +282,17 @@
exit_remove:
sysfs_remove_group(&client->dev.kobj, &data->attrs);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int ad7418_detach_client(struct i2c_client *client)
+static int ad7418_remove(struct i2c_client *client)
{
struct ad7418_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &data->attrs);
- i2c_detach_client(client);
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/adm1021.c b/drivers/hwmon/adm1021.c
index ecbf694..b11e06f 100644
--- a/drivers/hwmon/adm1021.c
+++ b/drivers/hwmon/adm1021.c
@@ -78,7 +78,6 @@
/* Each client has this additional data */
struct adm1021_data {
- struct i2c_client client;
struct device *hwmon_dev;
enum chips type;
@@ -98,23 +97,42 @@
u8 remote_temp_offset_prec;
};
-static int adm1021_attach_adapter(struct i2c_adapter *adapter);
-static int adm1021_detect(struct i2c_adapter *adapter, int address, int kind);
+static int adm1021_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int adm1021_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void adm1021_init_client(struct i2c_client *client);
-static int adm1021_detach_client(struct i2c_client *client);
+static int adm1021_remove(struct i2c_client *client);
static struct adm1021_data *adm1021_update_device(struct device *dev);
/* (amalysh) read only mode, otherwise any limit's writing confuse BIOS */
static int read_only;
+static const struct i2c_device_id adm1021_id[] = {
+ { "adm1021", adm1021 },
+ { "adm1023", adm1023 },
+ { "max1617", max1617 },
+ { "max1617a", max1617a },
+ { "thmc10", thmc10 },
+ { "lm84", lm84 },
+ { "gl523sm", gl523sm },
+ { "mc1066", mc1066 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adm1021_id);
+
/* This is the driver that will be inserted */
static struct i2c_driver adm1021_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "adm1021",
},
- .attach_adapter = adm1021_attach_adapter,
- .detach_client = adm1021_detach_client,
+ .probe = adm1021_probe,
+ .remove = adm1021_remove,
+ .id_table = adm1021_id,
+ .detect = adm1021_detect,
+ .address_data = &addr_data,
};
static ssize_t show_temp(struct device *dev,
@@ -216,13 +234,6 @@
static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
-static int adm1021_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, adm1021_detect);
-}
-
static struct attribute *adm1021_attributes[] = {
&sensor_dev_attr_temp1_max.dev_attr.attr,
&sensor_dev_attr_temp1_min.dev_attr.attr,
@@ -243,36 +254,21 @@
.attrs = adm1021_attributes,
};
-static int adm1021_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int adm1021_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
+ struct i2c_adapter *adapter = client->adapter;
int i;
- struct i2c_client *client;
- struct adm1021_data *data;
- int err = 0;
const char *type_name = "";
int conv_rate, status, config;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
pr_debug("adm1021: detect failed, "
"smbus byte data not supported!\n");
- goto error0;
+ return -ENODEV;
}
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access adm1021 register values. */
-
- if (!(data = kzalloc(sizeof(struct adm1021_data), GFP_KERNEL))) {
- pr_debug("adm1021: detect failed, kzalloc failed!\n");
- err = -ENOMEM;
- goto error0;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &adm1021_driver;
status = i2c_smbus_read_byte_data(client, ADM1021_REG_STATUS);
conv_rate = i2c_smbus_read_byte_data(client,
ADM1021_REG_CONV_RATE_R);
@@ -284,8 +280,7 @@
|| (conv_rate & 0xF8) != 0x00) {
pr_debug("adm1021: detect failed, "
"chip not detected!\n");
- err = -ENODEV;
- goto error1;
+ return -ENODEV;
}
}
@@ -336,24 +331,36 @@
type_name = "mc1066";
}
pr_debug("adm1021: Detected chip %s at adapter %d, address 0x%02x.\n",
- type_name, i2c_adapter_id(adapter), address);
+ type_name, i2c_adapter_id(adapter), client->addr);
+ strlcpy(info->type, type_name, I2C_NAME_SIZE);
- /* Fill in the remaining client fields */
- strlcpy(client->name, type_name, I2C_NAME_SIZE);
- data->type = kind;
+ return 0;
+}
+
+static int adm1021_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct adm1021_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct adm1021_data), GFP_KERNEL);
+ if (!data) {
+ pr_debug("adm1021: detect failed, kzalloc failed!\n");
+ err = -ENOMEM;
+ goto error0;
+ }
+
+ i2c_set_clientdata(client, data);
+ data->type = id->driver_data;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto error1;
-
/* Initialize the ADM1021 chip */
- if (kind != lm84 && !read_only)
+ if (data->type != lm84 && !read_only)
adm1021_init_client(client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &adm1021_group)))
- goto error2;
+ goto error1;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -365,8 +372,6 @@
error3:
sysfs_remove_group(&client->dev.kobj, &adm1021_group);
-error2:
- i2c_detach_client(client);
error1:
kfree(data);
error0:
@@ -382,17 +387,13 @@
i2c_smbus_write_byte_data(client, ADM1021_REG_CONV_RATE_W, 0x04);
}
-static int adm1021_detach_client(struct i2c_client *client)
+static int adm1021_remove(struct i2c_client *client)
{
struct adm1021_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &adm1021_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/adm1025.c b/drivers/hwmon/adm1025.c
index 1d76de7..4db04d6 100644
--- a/drivers/hwmon/adm1025.c
+++ b/drivers/hwmon/adm1025.c
@@ -2,7 +2,7 @@
* adm1025.c
*
* Copyright (C) 2000 Chen-Yuan Wu <gwu@esoft.com>
- * Copyright (C) 2003-2004 Jean Delvare <khali@linux-fr.org>
+ * Copyright (C) 2003-2008 Jean Delvare <khali@linux-fr.org>
*
* The ADM1025 is a sensor chip made by Analog Devices. It reports up to 6
* voltages (including its own power source) and up to two temperatures
@@ -109,22 +109,35 @@
* Functions declaration
*/
-static int adm1025_attach_adapter(struct i2c_adapter *adapter);
-static int adm1025_detect(struct i2c_adapter *adapter, int address, int kind);
+static int adm1025_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int adm1025_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void adm1025_init_client(struct i2c_client *client);
-static int adm1025_detach_client(struct i2c_client *client);
+static int adm1025_remove(struct i2c_client *client);
static struct adm1025_data *adm1025_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id adm1025_id[] = {
+ { "adm1025", adm1025 },
+ { "ne1619", ne1619 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adm1025_id);
+
static struct i2c_driver adm1025_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "adm1025",
},
- .attach_adapter = adm1025_attach_adapter,
- .detach_client = adm1025_detach_client,
+ .probe = adm1025_probe,
+ .remove = adm1025_remove,
+ .id_table = adm1025_id,
+ .detect = adm1025_detect,
+ .address_data = &addr_data,
};
/*
@@ -132,7 +145,6 @@
*/
struct adm1025_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -344,13 +356,6 @@
* Real code
*/
-static int adm1025_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, adm1025_detect);
-}
-
static struct attribute *adm1025_attributes[] = {
&sensor_dev_attr_in0_input.dev_attr.attr,
&sensor_dev_attr_in1_input.dev_attr.attr,
@@ -403,31 +408,16 @@
.attrs = adm1025_attributes_in4,
};
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-static int adm1025_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int adm1025_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *client;
- struct adm1025_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
const char *name = "";
u8 config;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct adm1025_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &adm1025_driver;
+ return -ENODEV;
/*
* Now we do the remaining detection. A negative kind means that
@@ -448,8 +438,8 @@
ADM1025_REG_STATUS2) & 0xBC) != 0x00) {
dev_dbg(&adapter->dev,
"ADM1025 detection failed at 0x%02x.\n",
- address);
- goto exit_free;
+ client->addr);
+ return -ENODEV;
}
}
@@ -465,7 +455,7 @@
}
} else
if (man_id == 0xA1) { /* Philips */
- if (address != 0x2E
+ if (client->addr != 0x2E
&& (chip_id & 0xF0) == 0x20) { /* NE1619 */
kind = ne1619;
}
@@ -475,7 +465,7 @@
dev_info(&adapter->dev,
"Unsupported chip (man_id=0x%02X, "
"chip_id=0x%02X).\n", man_id, chip_id);
- goto exit_free;
+ return -ENODEV;
}
}
@@ -484,23 +474,36 @@
} else if (kind == ne1619) {
name = "ne1619";
}
+ strlcpy(info->type, name, I2C_NAME_SIZE);
- /* We can fill in the remaining client fields */
- strlcpy(client->name, name, I2C_NAME_SIZE);
+ return 0;
+}
+
+static int adm1025_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct adm1025_data *data;
+ int err;
+ u8 config;
+
+ data = kzalloc(sizeof(struct adm1025_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
-
/* Initialize the ADM1025 chip */
adm1025_init_client(client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &adm1025_group)))
- goto exit_detach;
+ goto exit_free;
/* Pin 11 is either in4 (+12V) or VID4 */
+ config = i2c_smbus_read_byte_data(client, ADM1025_REG_CONFIG);
if (!(config & 0x20)) {
if ((err = sysfs_create_group(&client->dev.kobj,
&adm1025_group_in4)))
@@ -518,8 +521,6 @@
exit_remove:
sysfs_remove_group(&client->dev.kobj, &adm1025_group);
sysfs_remove_group(&client->dev.kobj, &adm1025_group_in4);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
@@ -568,18 +569,14 @@
(reg&0x7E)|0x01);
}
-static int adm1025_detach_client(struct i2c_client *client)
+static int adm1025_remove(struct i2c_client *client)
{
struct adm1025_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &adm1025_group);
sysfs_remove_group(&client->dev.kobj, &adm1025_group_in4);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/adm1026.c b/drivers/hwmon/adm1026.c
index 904c6ce..7fe2441 100644
--- a/drivers/hwmon/adm1026.c
+++ b/drivers/hwmon/adm1026.c
@@ -259,7 +259,6 @@
};
struct adm1026_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
@@ -293,10 +292,11 @@
u8 config3; /* Register value */
};
-static int adm1026_attach_adapter(struct i2c_adapter *adapter);
-static int adm1026_detect(struct i2c_adapter *adapter, int address,
- int kind);
-static int adm1026_detach_client(struct i2c_client *client);
+static int adm1026_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int adm1026_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int adm1026_remove(struct i2c_client *client);
static int adm1026_read_value(struct i2c_client *client, u8 reg);
static int adm1026_write_value(struct i2c_client *client, u8 reg, int value);
static void adm1026_print_gpio(struct i2c_client *client);
@@ -305,22 +305,24 @@
static void adm1026_init_client(struct i2c_client *client);
+static const struct i2c_device_id adm1026_id[] = {
+ { "adm1026", adm1026 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adm1026_id);
+
static struct i2c_driver adm1026_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "adm1026",
},
- .attach_adapter = adm1026_attach_adapter,
- .detach_client = adm1026_detach_client,
+ .probe = adm1026_probe,
+ .remove = adm1026_remove,
+ .id_table = adm1026_id,
+ .detect = adm1026_detect,
+ .address_data = &addr_data,
};
-static int adm1026_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON)) {
- return 0;
- }
- return i2c_probe(adapter, &addr_data, adm1026_detect);
-}
-
static int adm1026_read_value(struct i2c_client *client, u8 reg)
{
int res;
@@ -1647,48 +1649,32 @@
.attrs = adm1026_attributes_in8_9,
};
-static int adm1026_detect(struct i2c_adapter *adapter, int address,
- int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int adm1026_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
+ struct i2c_adapter *adapter = client->adapter;
+ int address = client->addr;
int company, verstep;
- struct i2c_client *client;
- struct adm1026_data *data;
- int err = 0;
- const char *type_name = "";
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
/* We need to be able to do byte I/O */
- goto exit;
+ return -ENODEV;
};
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access adm1026_{read,write}_value. */
-
- if (!(data = kzalloc(sizeof(struct adm1026_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &adm1026_driver;
-
/* Now, we do the remaining detection. */
company = adm1026_read_value(client, ADM1026_REG_COMPANY);
verstep = adm1026_read_value(client, ADM1026_REG_VERSTEP);
- dev_dbg(&client->dev, "Detecting device at %d,0x%02x with"
+ dev_dbg(&adapter->dev, "Detecting device at %d,0x%02x with"
" COMPANY: 0x%02x and VERSTEP: 0x%02x\n",
i2c_adapter_id(client->adapter), client->addr,
company, verstep);
/* If auto-detecting, Determine the chip type. */
if (kind <= 0) {
- dev_dbg(&client->dev, "Autodetecting device at %d,0x%02x "
+ dev_dbg(&adapter->dev, "Autodetecting device at %d,0x%02x "
"...\n", i2c_adapter_id(adapter), address);
if (company == ADM1026_COMPANY_ANALOG_DEV
&& verstep == ADM1026_VERSTEP_ADM1026) {
@@ -1704,7 +1690,7 @@
verstep);
kind = any_chip;
} else {
- dev_dbg(&client->dev, ": Autodetection "
+ dev_dbg(&adapter->dev, ": Autodetection "
"failed\n");
/* Not an ADM1026 ... */
if (kind == 0) { /* User used force=x,y */
@@ -1713,33 +1699,29 @@
"force_adm1026.\n",
i2c_adapter_id(adapter), address);
}
- goto exitfree;
+ return -ENODEV;
}
}
+ strlcpy(info->type, "adm1026", I2C_NAME_SIZE);
- /* Fill in the chip specific driver values */
- switch (kind) {
- case any_chip :
- type_name = "adm1026";
- break;
- case adm1026 :
- type_name = "adm1026";
- break;
- default :
- dev_err(&adapter->dev, ": Internal error, invalid "
- "kind (%d)!\n", kind);
- err = -EFAULT;
- goto exitfree;
+ return 0;
+}
+
+static int adm1026_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct adm1026_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct adm1026_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
}
- strlcpy(client->name, type_name, I2C_NAME_SIZE);
- /* Fill in the remaining client fields */
+ i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exitfree;
-
/* Set the VRM version */
data->vrm = vid_which_vrm();
@@ -1748,7 +1730,7 @@
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &adm1026_group)))
- goto exitdetach;
+ goto exitfree;
if (data->config1 & CFG1_AIN8_9)
err = sysfs_create_group(&client->dev.kobj,
&adm1026_group_in8_9);
@@ -1773,15 +1755,13 @@
sysfs_remove_group(&client->dev.kobj, &adm1026_group_in8_9);
else
sysfs_remove_group(&client->dev.kobj, &adm1026_group_temp3);
-exitdetach:
- i2c_detach_client(client);
exitfree:
kfree(data);
exit:
return err;
}
-static int adm1026_detach_client(struct i2c_client *client)
+static int adm1026_remove(struct i2c_client *client)
{
struct adm1026_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
@@ -1790,7 +1770,6 @@
sysfs_remove_group(&client->dev.kobj, &adm1026_group_in8_9);
else
sysfs_remove_group(&client->dev.kobj, &adm1026_group_temp3);
- i2c_detach_client(client);
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/adm1029.c b/drivers/hwmon/adm1029.c
index 2c6608d..ba84ca5 100644
--- a/drivers/hwmon/adm1029.c
+++ b/drivers/hwmon/adm1029.c
@@ -115,9 +115,11 @@
* Functions declaration
*/
-static int adm1029_attach_adapter(struct i2c_adapter *adapter);
-static int adm1029_detect(struct i2c_adapter *adapter, int address, int kind);
-static int adm1029_detach_client(struct i2c_client *client);
+static int adm1029_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int adm1029_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int adm1029_remove(struct i2c_client *client);
static struct adm1029_data *adm1029_update_device(struct device *dev);
static int adm1029_init_client(struct i2c_client *client);
@@ -125,12 +127,22 @@
* Driver data (common to all clients)
*/
+static const struct i2c_device_id adm1029_id[] = {
+ { "adm1029", adm1029 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adm1029_id);
+
static struct i2c_driver adm1029_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "adm1029",
},
- .attach_adapter = adm1029_attach_adapter,
- .detach_client = adm1029_detach_client,
+ .probe = adm1029_probe,
+ .remove = adm1029_remove,
+ .id_table = adm1029_id,
+ .detect = adm1029_detect,
+ .address_data = &addr_data,
};
/*
@@ -138,7 +150,6 @@
*/
struct adm1029_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -284,37 +295,14 @@
* Real code
*/
-static int adm1029_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int adm1029_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, adm1029_detect);
-}
+ struct i2c_adapter *adapter = client->adapter;
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-
-static int adm1029_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct adm1029_data *data;
- int err = 0;
- const char *name = "";
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct adm1029_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &adm1029_driver;
+ return -ENODEV;
/* Now we do the detection and identification. A negative kind
* means that the driver was loaded with no force parameter
@@ -362,32 +350,41 @@
if (kind <= 0) { /* identification failed */
pr_debug("adm1029: Unsupported chip (man_id=0x%02X, "
"chip_id=0x%02X)\n", man_id, chip_id);
- goto exit_free;
+ return -ENODEV;
}
}
+ strlcpy(info->type, "adm1029", I2C_NAME_SIZE);
- if (kind == adm1029) {
- name = "adm1029";
+ return 0;
+}
+
+static int adm1029_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct adm1029_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct adm1029_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
}
- /* We can fill in the remaining client fields */
- strlcpy(client->name, name, I2C_NAME_SIZE);
+ i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
-
/*
* Initialize the ADM1029 chip
* Check config register
*/
- if (adm1029_init_client(client) == 0)
- goto exit_detach;
+ if (adm1029_init_client(client) == 0) {
+ err = -ENODEV;
+ goto exit_free;
+ }
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &adm1029_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -399,8 +396,6 @@
exit_remove_files:
sysfs_remove_group(&client->dev.kobj, &adm1029_group);
- exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
@@ -424,17 +419,13 @@
return 1;
}
-static int adm1029_detach_client(struct i2c_client *client)
+static int adm1029_remove(struct i2c_client *client)
{
struct adm1029_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &adm1029_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/adm1031.c b/drivers/hwmon/adm1031.c
index 2bffcab..7894418 100644
--- a/drivers/hwmon/adm1031.c
+++ b/drivers/hwmon/adm1031.c
@@ -70,7 +70,6 @@
/* Each client has this additional data */
struct adm1031_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
int chip_type;
@@ -99,19 +98,32 @@
s8 temp_crit[3];
};
-static int adm1031_attach_adapter(struct i2c_adapter *adapter);
-static int adm1031_detect(struct i2c_adapter *adapter, int address, int kind);
+static int adm1031_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int adm1031_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void adm1031_init_client(struct i2c_client *client);
-static int adm1031_detach_client(struct i2c_client *client);
+static int adm1031_remove(struct i2c_client *client);
static struct adm1031_data *adm1031_update_device(struct device *dev);
+static const struct i2c_device_id adm1031_id[] = {
+ { "adm1030", adm1030 },
+ { "adm1031", adm1031 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adm1031_id);
+
/* This is the driver that will be inserted */
static struct i2c_driver adm1031_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "adm1031",
},
- .attach_adapter = adm1031_attach_adapter,
- .detach_client = adm1031_detach_client,
+ .probe = adm1031_probe,
+ .remove = adm1031_remove,
+ .id_table = adm1031_id,
+ .detect = adm1031_detect,
+ .address_data = &addr_data,
};
static inline u8 adm1031_read_value(struct i2c_client *client, u8 reg)
@@ -693,13 +705,6 @@
static SENSOR_DEVICE_ATTR(temp3_fault, S_IRUGO, show_alarm, NULL, 13);
static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL, 14);
-static int adm1031_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, adm1031_detect);
-}
-
static struct attribute *adm1031_attributes[] = {
&sensor_dev_attr_fan1_input.dev_attr.attr,
&sensor_dev_attr_fan1_div.dev_attr.attr,
@@ -770,27 +775,15 @@
.attrs = adm1031_attributes_opt,
};
-/* This function is called by i2c_probe */
-static int adm1031_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int adm1031_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *client;
- struct adm1031_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
const char *name = "";
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct adm1031_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &adm1031_driver;
+ return -ENODEV;
if (kind < 0) {
int id, co;
@@ -798,7 +791,7 @@
co = i2c_smbus_read_byte_data(client, 0x3e);
if (!((id == 0x31 || id == 0x30) && co == 0x41))
- goto exit_free;
+ return -ENODEV;
kind = (id == 0x30) ? adm1030 : adm1031;
}
@@ -809,28 +802,43 @@
* auto fan control helper table. */
if (kind == adm1030) {
name = "adm1030";
- data->chan_select_table = &auto_channel_select_table_adm1030;
} else if (kind == adm1031) {
name = "adm1031";
- data->chan_select_table = &auto_channel_select_table_adm1031;
}
- data->chip_type = kind;
+ strlcpy(info->type, name, I2C_NAME_SIZE);
- strlcpy(client->name, name, I2C_NAME_SIZE);
+ return 0;
+}
+
+static int adm1031_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct adm1031_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct adm1031_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ data->chip_type = id->driver_data;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
+ if (data->chip_type == adm1030)
+ data->chan_select_table = &auto_channel_select_table_adm1030;
+ else
+ data->chan_select_table = &auto_channel_select_table_adm1031;
/* Initialize the ADM1031 chip */
adm1031_init_client(client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &adm1031_group)))
- goto exit_detach;
+ goto exit_free;
- if (kind == adm1031) {
+ if (data->chip_type == adm1031) {
if ((err = sysfs_create_group(&client->dev.kobj,
&adm1031_group_opt)))
goto exit_remove;
@@ -847,25 +855,19 @@
exit_remove:
sysfs_remove_group(&client->dev.kobj, &adm1031_group);
sysfs_remove_group(&client->dev.kobj, &adm1031_group_opt);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int adm1031_detach_client(struct i2c_client *client)
+static int adm1031_remove(struct i2c_client *client)
{
struct adm1031_data *data = i2c_get_clientdata(client);
- int ret;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &adm1031_group);
sysfs_remove_group(&client->dev.kobj, &adm1031_group_opt);
- if ((ret = i2c_detach_client(client)) != 0) {
- return ret;
- }
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/adm9240.c b/drivers/hwmon/adm9240.c
index 149ef25..2444b15 100644
--- a/drivers/hwmon/adm9240.c
+++ b/drivers/hwmon/adm9240.c
@@ -130,25 +130,37 @@
return SCALE(reg, 1250, 255);
}
-static int adm9240_attach_adapter(struct i2c_adapter *adapter);
-static int adm9240_detect(struct i2c_adapter *adapter, int address, int kind);
+static int adm9240_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int adm9240_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void adm9240_init_client(struct i2c_client *client);
-static int adm9240_detach_client(struct i2c_client *client);
+static int adm9240_remove(struct i2c_client *client);
static struct adm9240_data *adm9240_update_device(struct device *dev);
/* driver data */
+static const struct i2c_device_id adm9240_id[] = {
+ { "adm9240", adm9240 },
+ { "ds1780", ds1780 },
+ { "lm81", lm81 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adm9240_id);
+
static struct i2c_driver adm9240_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "adm9240",
},
- .attach_adapter = adm9240_attach_adapter,
- .detach_client = adm9240_detach_client,
+ .probe = adm9240_probe,
+ .remove = adm9240_remove,
+ .id_table = adm9240_id,
+ .detect = adm9240_detect,
+ .address_data = &addr_data,
};
/* per client data */
struct adm9240_data {
- enum chips type;
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid;
@@ -532,28 +544,17 @@
/*** sensor chip detect and driver install ***/
-static int adm9240_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int adm9240_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *new_client;
- struct adm9240_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = new_client->adapter;
const char *name = "";
+ int address = new_client->addr;
u8 man_id, die_rev;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(*data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &adm9240_driver;
- new_client->flags = 0;
+ return -ENODEV;
if (kind == 0) {
kind = adm9240;
@@ -566,7 +567,7 @@
!= address) {
dev_err(&adapter->dev, "detect fail: address match, "
"0x%02x\n", address);
- goto exit_free;
+ return -ENODEV;
}
/* check known chip manufacturer */
@@ -581,7 +582,7 @@
} else {
dev_err(&adapter->dev, "detect fail: unknown manuf, "
"0x%02x\n", man_id);
- goto exit_free;
+ return -ENODEV;
}
/* successful detect, print chip info */
@@ -600,20 +601,31 @@
} else if (kind == lm81) {
name = "lm81";
}
+ strlcpy(info->type, name, I2C_NAME_SIZE);
- /* fill in the remaining client fields and attach */
- strlcpy(new_client->name, name, I2C_NAME_SIZE);
- data->type = kind;
+ return 0;
+}
+
+static int adm9240_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct adm9240_data *data;
+ int err;
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
mutex_init(&data->update_lock);
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
adm9240_init_client(new_client);
/* populate sysfs filesystem */
if ((err = sysfs_create_group(&new_client->dev.kobj, &adm9240_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&new_client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -625,32 +637,19 @@
exit_remove:
sysfs_remove_group(&new_client->dev.kobj, &adm9240_group);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
return err;
}
-static int adm9240_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, adm9240_detect);
-}
-
-static int adm9240_detach_client(struct i2c_client *client)
+static int adm9240_remove(struct i2c_client *client)
{
struct adm9240_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &adm9240_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/ads7828.c b/drivers/hwmon/ads7828.c
index 5c8b6e0..5c39b4a 100644
--- a/drivers/hwmon/ads7828.c
+++ b/drivers/hwmon/ads7828.c
@@ -64,7 +64,6 @@
/* Each client has this additional data */
struct ads7828_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock; /* mutex protect updates */
char valid; /* !=0 if following fields are valid */
@@ -73,7 +72,10 @@
};
/* Function declaration - necessary due to function dependencies */
-static int ads7828_detect(struct i2c_adapter *adapter, int address, int kind);
+static int ads7828_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int ads7828_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
/* The ADS7828 returns the 12-bit sample in two bytes,
these are read as a word then byte-swapped */
@@ -156,58 +158,43 @@
.attrs = ads7828_attributes,
};
-static int ads7828_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, ads7828_detect);
-}
-
-static int ads7828_detach_client(struct i2c_client *client)
+static int ads7828_remove(struct i2c_client *client)
{
struct ads7828_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &ads7828_group);
- i2c_detach_client(client);
kfree(i2c_get_clientdata(client));
return 0;
}
+static const struct i2c_device_id ads7828_id[] = {
+ { "ads7828", ads7828 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ads7828_id);
+
/* This is the driver that will be inserted */
static struct i2c_driver ads7828_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "ads7828",
},
- .attach_adapter = ads7828_attach_adapter,
- .detach_client = ads7828_detach_client,
+ .probe = ads7828_probe,
+ .remove = ads7828_remove,
+ .id_table = ads7828_id,
+ .detect = ads7828_detect,
+ .address_data = &addr_data,
};
-/* This function is called by i2c_probe */
-static int ads7828_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int ads7828_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *client;
- struct ads7828_data *data;
- int err = 0;
- const char *name = "";
+ struct i2c_adapter *adapter = client->adapter;
/* Check we have a valid client */
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_WORD_DATA))
- goto exit;
-
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access ads7828_read_value. */
- data = kzalloc(sizeof(struct ads7828_data), GFP_KERNEL);
- if (!data) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &ads7828_driver;
+ return -ENODEV;
/* Now, we do the remaining detection. There is no identification
dedicated register so attempt to sanity check using knowledge of
@@ -225,32 +212,34 @@
printk(KERN_DEBUG
"%s : Doesn't look like an ads7828 device\n",
__func__);
- goto exit_free;
+ return -ENODEV;
}
}
}
+ strlcpy(info->type, "ads7828", I2C_NAME_SIZE);
- /* Determine the chip type - only one kind supported! */
- if (kind <= 0)
- kind = ads7828;
+ return 0;
+}
- if (kind == ads7828)
- name = "ads7828";
+static int ads7828_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct ads7828_data *data;
+ int err;
- /* Fill in the remaining client fields, put it into the global list */
- strlcpy(client->name, name, I2C_NAME_SIZE);
+ data = kzalloc(sizeof(struct ads7828_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+ i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- err = i2c_attach_client(client);
- if (err)
- goto exit_free;
-
/* Register sysfs hooks */
err = sysfs_create_group(&client->dev.kobj, &ads7828_group);
if (err)
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -262,8 +251,6 @@
exit_remove:
sysfs_remove_group(&client->dev.kobj, &ads7828_group);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
diff --git a/drivers/hwmon/adt7470.c b/drivers/hwmon/adt7470.c
index 6b5325f..d368d8f 100644
--- a/drivers/hwmon/adt7470.c
+++ b/drivers/hwmon/adt7470.c
@@ -138,7 +138,6 @@
#define FAN_DATA_VALID(x) ((x) && (x) != FAN_PERIOD_INVALID)
struct adt7470_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct attribute_group attrs;
struct mutex lock;
@@ -164,16 +163,28 @@
u8 pwm_auto_temp[ADT7470_PWM_COUNT];
};
-static int adt7470_attach_adapter(struct i2c_adapter *adapter);
-static int adt7470_detect(struct i2c_adapter *adapter, int address, int kind);
-static int adt7470_detach_client(struct i2c_client *client);
+static int adt7470_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int adt7470_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int adt7470_remove(struct i2c_client *client);
+
+static const struct i2c_device_id adt7470_id[] = {
+ { "adt7470", adt7470 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adt7470_id);
static struct i2c_driver adt7470_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "adt7470",
},
- .attach_adapter = adt7470_attach_adapter,
- .detach_client = adt7470_detach_client,
+ .probe = adt7470_probe,
+ .remove = adt7470_remove,
+ .id_table = adt7470_id,
+ .detect = adt7470_detect,
+ .address_data = &addr_data,
};
/*
@@ -1004,64 +1015,52 @@
NULL
};
-static int adt7470_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int adt7470_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, adt7470_detect);
-}
-
-static int adt7470_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct adt7470_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct adt7470_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- client->addr = address;
- client->adapter = adapter;
- client->driver = &adt7470_driver;
-
- i2c_set_clientdata(client, data);
-
- mutex_init(&data->lock);
+ return -ENODEV;
if (kind <= 0) {
int vendor, device, revision;
vendor = i2c_smbus_read_byte_data(client, ADT7470_REG_VENDOR);
- if (vendor != ADT7470_VENDOR) {
- err = -ENODEV;
- goto exit_free;
- }
+ if (vendor != ADT7470_VENDOR)
+ return -ENODEV;
device = i2c_smbus_read_byte_data(client, ADT7470_REG_DEVICE);
- if (device != ADT7470_DEVICE) {
- err = -ENODEV;
- goto exit_free;
- }
+ if (device != ADT7470_DEVICE)
+ return -ENODEV;
revision = i2c_smbus_read_byte_data(client,
ADT7470_REG_REVISION);
- if (revision != ADT7470_REVISION) {
- err = -ENODEV;
- goto exit_free;
- }
+ if (revision != ADT7470_REVISION)
+ return -ENODEV;
} else
dev_dbg(&adapter->dev, "detection forced\n");
- strlcpy(client->name, "adt7470", I2C_NAME_SIZE);
+ strlcpy(info->type, "adt7470", I2C_NAME_SIZE);
- if ((err = i2c_attach_client(client)))
- goto exit_free;
+ return 0;
+}
+
+static int adt7470_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct adt7470_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct adt7470_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->lock);
dev_info(&client->dev, "%s chip found\n", client->name);
@@ -1071,7 +1070,7 @@
/* Register sysfs hooks */
data->attrs.attrs = adt7470_attr;
if ((err = sysfs_create_group(&client->dev.kobj, &data->attrs)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -1083,21 +1082,18 @@
exit_remove:
sysfs_remove_group(&client->dev.kobj, &data->attrs);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int adt7470_detach_client(struct i2c_client *client)
+static int adt7470_remove(struct i2c_client *client)
{
struct adt7470_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &data->attrs);
- i2c_detach_client(client);
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/adt7473.c b/drivers/hwmon/adt7473.c
index 93dbf5e..ce4a7cb 100644
--- a/drivers/hwmon/adt7473.c
+++ b/drivers/hwmon/adt7473.c
@@ -143,7 +143,6 @@
#define FAN_DATA_VALID(x) ((x) && (x) != FAN_PERIOD_INVALID)
struct adt7473_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct attribute_group attrs;
struct mutex lock;
@@ -178,16 +177,28 @@
u8 max_duty_at_overheat;
};
-static int adt7473_attach_adapter(struct i2c_adapter *adapter);
-static int adt7473_detect(struct i2c_adapter *adapter, int address, int kind);
-static int adt7473_detach_client(struct i2c_client *client);
+static int adt7473_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int adt7473_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int adt7473_remove(struct i2c_client *client);
+
+static const struct i2c_device_id adt7473_id[] = {
+ { "adt7473", adt7473 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, adt7473_id);
static struct i2c_driver adt7473_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "adt7473",
},
- .attach_adapter = adt7473_attach_adapter,
- .detach_client = adt7473_detach_client,
+ .probe = adt7473_probe,
+ .remove = adt7473_remove,
+ .id_table = adt7473_id,
+ .detect = adt7473_detect,
+ .address_data = &addr_data,
};
/*
@@ -1042,21 +1053,43 @@
NULL
};
-static int adt7473_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int adt7473_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, adt7473_detect);
-}
-
-static int adt7473_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct adt7473_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
+ return -ENODEV;
+
+ if (kind <= 0) {
+ int vendor, device, revision;
+
+ vendor = i2c_smbus_read_byte_data(client, ADT7473_REG_VENDOR);
+ if (vendor != ADT7473_VENDOR)
+ return -ENODEV;
+
+ device = i2c_smbus_read_byte_data(client, ADT7473_REG_DEVICE);
+ if (device != ADT7473_DEVICE)
+ return -ENODEV;
+
+ revision = i2c_smbus_read_byte_data(client,
+ ADT7473_REG_REVISION);
+ if (revision != ADT7473_REV_68 && revision != ADT7473_REV_69)
+ return -ENODEV;
+ } else
+ dev_dbg(&adapter->dev, "detection forced\n");
+
+ strlcpy(info->type, "adt7473", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int adt7473_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct adt7473_data *data;
+ int err;
data = kzalloc(sizeof(struct adt7473_data), GFP_KERNEL);
if (!data) {
@@ -1064,45 +1097,9 @@
goto exit;
}
- client = &data->client;
- client->addr = address;
- client->adapter = adapter;
- client->driver = &adt7473_driver;
-
i2c_set_clientdata(client, data);
-
mutex_init(&data->lock);
- if (kind <= 0) {
- int vendor, device, revision;
-
- vendor = i2c_smbus_read_byte_data(client, ADT7473_REG_VENDOR);
- if (vendor != ADT7473_VENDOR) {
- err = -ENODEV;
- goto exit_free;
- }
-
- device = i2c_smbus_read_byte_data(client, ADT7473_REG_DEVICE);
- if (device != ADT7473_DEVICE) {
- err = -ENODEV;
- goto exit_free;
- }
-
- revision = i2c_smbus_read_byte_data(client,
- ADT7473_REG_REVISION);
- if (revision != ADT7473_REV_68 && revision != ADT7473_REV_69) {
- err = -ENODEV;
- goto exit_free;
- }
- } else
- dev_dbg(&adapter->dev, "detection forced\n");
-
- strlcpy(client->name, "adt7473", I2C_NAME_SIZE);
-
- err = i2c_attach_client(client);
- if (err)
- goto exit_free;
-
dev_info(&client->dev, "%s chip found\n", client->name);
/* Initialize the ADT7473 chip */
@@ -1112,7 +1109,7 @@
data->attrs.attrs = adt7473_attr;
err = sysfs_create_group(&client->dev.kobj, &data->attrs);
if (err)
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -1124,21 +1121,18 @@
exit_remove:
sysfs_remove_group(&client->dev.kobj, &data->attrs);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int adt7473_detach_client(struct i2c_client *client)
+static int adt7473_remove(struct i2c_client *client)
{
struct adt7473_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &data->attrs);
- i2c_detach_client(client);
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/ams/ams-core.c b/drivers/hwmon/ams/ams-core.c
index a112a03..fbefa82 100644
--- a/drivers/hwmon/ams/ams-core.c
+++ b/drivers/hwmon/ams/ams-core.c
@@ -23,8 +23,8 @@
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/init.h>
+#include <linux/of_platform.h>
#include <asm/pmac_pfunc.h>
-#include <asm/of_platform.h>
#include "ams.h"
diff --git a/drivers/hwmon/asb100.c b/drivers/hwmon/asb100.c
index fe2eea4..8a45a2e 100644
--- a/drivers/hwmon/asb100.c
+++ b/drivers/hwmon/asb100.c
@@ -176,10 +176,8 @@
data is pointed to by client->data. The structure itself is
dynamically allocated, at the same time the client itself is allocated. */
struct asb100_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex lock;
- enum chips type;
struct mutex update_lock;
unsigned long last_updated; /* In jiffies */
@@ -206,18 +204,30 @@
static int asb100_read_value(struct i2c_client *client, u16 reg);
static void asb100_write_value(struct i2c_client *client, u16 reg, u16 val);
-static int asb100_attach_adapter(struct i2c_adapter *adapter);
-static int asb100_detect(struct i2c_adapter *adapter, int address, int kind);
-static int asb100_detach_client(struct i2c_client *client);
+static int asb100_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int asb100_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int asb100_remove(struct i2c_client *client);
static struct asb100_data *asb100_update_device(struct device *dev);
static void asb100_init_client(struct i2c_client *client);
+static const struct i2c_device_id asb100_id[] = {
+ { "asb100", asb100 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, asb100_id);
+
static struct i2c_driver asb100_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "asb100",
},
- .attach_adapter = asb100_attach_adapter,
- .detach_client = asb100_detach_client,
+ .probe = asb100_probe,
+ .remove = asb100_remove,
+ .id_table = asb100_id,
+ .detect = asb100_detect,
+ .address_data = &addr_data,
};
/* 7 Voltages */
@@ -619,35 +629,13 @@
.attrs = asb100_attributes,
};
-/* This function is called when:
- asb100_driver is inserted (when this module is loaded), for each
- available adapter
- when a new adapter is inserted (and asb100_driver is still present)
- */
-static int asb100_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, asb100_detect);
-}
-
-static int asb100_detect_subclients(struct i2c_adapter *adapter, int address,
- int kind, struct i2c_client *client)
+static int asb100_detect_subclients(struct i2c_client *client)
{
int i, id, err;
+ int address = client->addr;
+ unsigned short sc_addr[2];
struct asb100_data *data = i2c_get_clientdata(client);
-
- data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
- if (!(data->lm75[0])) {
- err = -ENOMEM;
- goto ERROR_SC_0;
- }
-
- data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
- if (!(data->lm75[1])) {
- err = -ENOMEM;
- goto ERROR_SC_1;
- }
+ struct i2c_adapter *adapter = client->adapter;
id = i2c_adapter_id(adapter);
@@ -665,37 +653,34 @@
asb100_write_value(client, ASB100_REG_I2C_SUBADDR,
(force_subclients[2] & 0x07) |
((force_subclients[3] & 0x07) << 4));
- data->lm75[0]->addr = force_subclients[2];
- data->lm75[1]->addr = force_subclients[3];
+ sc_addr[0] = force_subclients[2];
+ sc_addr[1] = force_subclients[3];
} else {
int val = asb100_read_value(client, ASB100_REG_I2C_SUBADDR);
- data->lm75[0]->addr = 0x48 + (val & 0x07);
- data->lm75[1]->addr = 0x48 + ((val >> 4) & 0x07);
+ sc_addr[0] = 0x48 + (val & 0x07);
+ sc_addr[1] = 0x48 + ((val >> 4) & 0x07);
}
- if (data->lm75[0]->addr == data->lm75[1]->addr) {
+ if (sc_addr[0] == sc_addr[1]) {
dev_err(&client->dev, "duplicate addresses 0x%x "
- "for subclients\n", data->lm75[0]->addr);
+ "for subclients\n", sc_addr[0]);
err = -ENODEV;
goto ERROR_SC_2;
}
- for (i = 0; i <= 1; i++) {
- i2c_set_clientdata(data->lm75[i], NULL);
- data->lm75[i]->adapter = adapter;
- data->lm75[i]->driver = &asb100_driver;
- strlcpy(data->lm75[i]->name, "asb100 subclient", I2C_NAME_SIZE);
- }
-
- if ((err = i2c_attach_client(data->lm75[0]))) {
+ data->lm75[0] = i2c_new_dummy(adapter, sc_addr[0]);
+ if (!data->lm75[0]) {
dev_err(&client->dev, "subclient %d registration "
- "at address 0x%x failed.\n", i, data->lm75[0]->addr);
+ "at address 0x%x failed.\n", 1, sc_addr[0]);
+ err = -ENOMEM;
goto ERROR_SC_2;
}
- if ((err = i2c_attach_client(data->lm75[1]))) {
+ data->lm75[1] = i2c_new_dummy(adapter, sc_addr[1]);
+ if (!data->lm75[1]) {
dev_err(&client->dev, "subclient %d registration "
- "at address 0x%x failed.\n", i, data->lm75[1]->addr);
+ "at address 0x%x failed.\n", 2, sc_addr[1]);
+ err = -ENOMEM;
goto ERROR_SC_3;
}
@@ -703,55 +688,31 @@
/* Undo inits in case of errors */
ERROR_SC_3:
- i2c_detach_client(data->lm75[0]);
+ i2c_unregister_device(data->lm75[0]);
ERROR_SC_2:
- kfree(data->lm75[1]);
-ERROR_SC_1:
- kfree(data->lm75[0]);
-ERROR_SC_0:
return err;
}
-static int asb100_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int asb100_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- int err;
- struct i2c_client *client;
- struct asb100_data *data;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
pr_debug("asb100.o: detect failed, "
"smbus byte data not supported!\n");
- err = -ENODEV;
- goto ERROR0;
+ return -ENODEV;
}
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access asb100_{read,write}_value. */
-
- if (!(data = kzalloc(sizeof(struct asb100_data), GFP_KERNEL))) {
- pr_debug("asb100.o: detect failed, kzalloc failed!\n");
- err = -ENOMEM;
- goto ERROR0;
- }
-
- client = &data->client;
- mutex_init(&data->lock);
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &asb100_driver;
-
- /* Now, we do the remaining detection. */
-
/* The chip may be stuck in some other bank than bank 0. This may
make reading other information impossible. Specify a force=... or
force_*=... parameter, and the chip will be reset to the right
bank. */
if (kind < 0) {
- int val1 = asb100_read_value(client, ASB100_REG_BANK);
- int val2 = asb100_read_value(client, ASB100_REG_CHIPMAN);
+ int val1 = i2c_smbus_read_byte_data(client, ASB100_REG_BANK);
+ int val2 = i2c_smbus_read_byte_data(client, ASB100_REG_CHIPMAN);
/* If we're in bank 0 */
if ((!(val1 & 0x07)) &&
@@ -761,48 +722,60 @@
((val1 & 0x80) && (val2 != 0x06)))) {
pr_debug("asb100.o: detect failed, "
"bad chip id 0x%02x!\n", val2);
- err = -ENODEV;
- goto ERROR1;
+ return -ENODEV;
}
} /* kind < 0 */
/* We have either had a force parameter, or we have already detected
Winbond. Put it now into bank 0 and Vendor ID High Byte */
- asb100_write_value(client, ASB100_REG_BANK,
- (asb100_read_value(client, ASB100_REG_BANK) & 0x78) | 0x80);
+ i2c_smbus_write_byte_data(client, ASB100_REG_BANK,
+ (i2c_smbus_read_byte_data(client, ASB100_REG_BANK) & 0x78)
+ | 0x80);
/* Determine the chip type. */
if (kind <= 0) {
- int val1 = asb100_read_value(client, ASB100_REG_WCHIPID);
- int val2 = asb100_read_value(client, ASB100_REG_CHIPMAN);
+ int val1 = i2c_smbus_read_byte_data(client, ASB100_REG_WCHIPID);
+ int val2 = i2c_smbus_read_byte_data(client, ASB100_REG_CHIPMAN);
if ((val1 == 0x31) && (val2 == 0x06))
kind = asb100;
else {
if (kind == 0)
- dev_warn(&client->dev, "ignoring "
+ dev_warn(&adapter->dev, "ignoring "
"'force' parameter for unknown chip "
"at adapter %d, address 0x%02x.\n",
- i2c_adapter_id(adapter), address);
- err = -ENODEV;
- goto ERROR1;
+ i2c_adapter_id(adapter), client->addr);
+ return -ENODEV;
}
}
- /* Fill in remaining client fields and put it into the global list */
- strlcpy(client->name, "asb100", I2C_NAME_SIZE);
- data->type = kind;
+ strlcpy(info->type, "asb100", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int asb100_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ int err;
+ struct asb100_data *data;
+
+ data = kzalloc(sizeof(struct asb100_data), GFP_KERNEL);
+ if (!data) {
+ pr_debug("asb100.o: probe failed, kzalloc failed!\n");
+ err = -ENOMEM;
+ goto ERROR0;
+ }
+
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->lock);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto ERROR1;
-
/* Attach secondary lm75 clients */
- if ((err = asb100_detect_subclients(adapter, address, kind,
- client)))
- goto ERROR2;
+ err = asb100_detect_subclients(client);
+ if (err)
+ goto ERROR1;
/* Initialize the chip */
asb100_init_client(client);
@@ -827,39 +800,25 @@
ERROR4:
sysfs_remove_group(&client->dev.kobj, &asb100_group);
ERROR3:
- i2c_detach_client(data->lm75[1]);
- i2c_detach_client(data->lm75[0]);
- kfree(data->lm75[1]);
- kfree(data->lm75[0]);
-ERROR2:
- i2c_detach_client(client);
+ i2c_unregister_device(data->lm75[1]);
+ i2c_unregister_device(data->lm75[0]);
ERROR1:
kfree(data);
ERROR0:
return err;
}
-static int asb100_detach_client(struct i2c_client *client)
+static int asb100_remove(struct i2c_client *client)
{
struct asb100_data *data = i2c_get_clientdata(client);
- int err;
- /* main client */
- if (data) {
- hwmon_device_unregister(data->hwmon_dev);
- sysfs_remove_group(&client->dev.kobj, &asb100_group);
- }
+ hwmon_device_unregister(data->hwmon_dev);
+ sysfs_remove_group(&client->dev.kobj, &asb100_group);
- if ((err = i2c_detach_client(client)))
- return err;
+ i2c_unregister_device(data->lm75[1]);
+ i2c_unregister_device(data->lm75[0]);
- /* main client */
- if (data)
- kfree(data);
-
- /* subclient */
- else
- kfree(client);
+ kfree(data);
return 0;
}
diff --git a/drivers/hwmon/atxp1.c b/drivers/hwmon/atxp1.c
index 01c17e3..d191118 100644
--- a/drivers/hwmon/atxp1.c
+++ b/drivers/hwmon/atxp1.c
@@ -46,21 +46,32 @@
I2C_CLIENT_INSMOD_1(atxp1);
-static int atxp1_attach_adapter(struct i2c_adapter * adapter);
-static int atxp1_detach_client(struct i2c_client * client);
+static int atxp1_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int atxp1_remove(struct i2c_client *client);
static struct atxp1_data * atxp1_update_device(struct device *dev);
-static int atxp1_detect(struct i2c_adapter *adapter, int address, int kind);
+static int atxp1_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+
+static const struct i2c_device_id atxp1_id[] = {
+ { "atxp1", atxp1 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, atxp1_id);
static struct i2c_driver atxp1_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "atxp1",
},
- .attach_adapter = atxp1_attach_adapter,
- .detach_client = atxp1_detach_client,
+ .probe = atxp1_probe,
+ .remove = atxp1_remove,
+ .id_table = atxp1_id,
+ .detect = atxp1_detect,
+ .address_data = &addr_data,
};
struct atxp1_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
unsigned long last_updated;
@@ -263,35 +274,16 @@
};
-static int atxp1_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int atxp1_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, &atxp1_detect);
-};
+ struct i2c_adapter *adapter = new_client->adapter;
-static int atxp1_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client * new_client;
- struct atxp1_data * data;
- int err = 0;
u8 temp;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct atxp1_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
-
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &atxp1_driver;
- new_client->flags = 0;
+ return -ENODEV;
/* Detect ATXP1, checking if vendor ID registers are all zero */
if (!((i2c_smbus_read_byte_data(new_client, 0x3e) == 0) &&
@@ -305,35 +297,46 @@
if (!((i2c_smbus_read_byte_data(new_client, 0x10) == temp) &&
(i2c_smbus_read_byte_data(new_client, 0x11) == temp) ))
- goto exit_free;
+ return -ENODEV;
+ }
+
+ /* Get VRM */
+ temp = vid_which_vrm();
+
+ if ((temp != 90) && (temp != 91)) {
+ dev_err(&adapter->dev, "atxp1: Not supporting VRM %d.%d\n",
+ temp / 10, temp % 10);
+ return -ENODEV;
+ }
+
+ strlcpy(info->type, "atxp1", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int atxp1_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct atxp1_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct atxp1_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
}
/* Get VRM */
data->vrm = vid_which_vrm();
- if ((data->vrm != 90) && (data->vrm != 91)) {
- dev_err(&new_client->dev, "Not supporting VRM %d.%d\n",
- data->vrm / 10, data->vrm % 10);
- goto exit_free;
- }
-
- strncpy(new_client->name, "atxp1", I2C_NAME_SIZE);
-
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- err = i2c_attach_client(new_client);
-
- if (err)
- {
- dev_err(&new_client->dev, "Attach client error.\n");
- goto exit_free;
- }
-
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj, &atxp1_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&new_client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -348,30 +351,22 @@
exit_remove_files:
sysfs_remove_group(&new_client->dev.kobj, &atxp1_group);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
return err;
};
-static int atxp1_detach_client(struct i2c_client * client)
+static int atxp1_remove(struct i2c_client *client)
{
struct atxp1_data * data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &atxp1_group);
- err = i2c_detach_client(client);
+ kfree(data);
- if (err)
- dev_err(&client->dev, "Failed to detach client.\n");
- else
- kfree(data);
-
- return err;
+ return 0;
};
static int __init atxp1_init(void)
diff --git a/drivers/hwmon/ds1621.c b/drivers/hwmon/ds1621.c
index 5f300ff..7415381 100644
--- a/drivers/hwmon/ds1621.c
+++ b/drivers/hwmon/ds1621.c
@@ -72,7 +72,6 @@
/* Each client has this additional data */
struct ds1621_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* !=0 if following fields are valid */
@@ -82,20 +81,32 @@
u8 conf; /* Register encoding, combined */
};
-static int ds1621_attach_adapter(struct i2c_adapter *adapter);
-static int ds1621_detect(struct i2c_adapter *adapter, int address,
- int kind);
+static int ds1621_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int ds1621_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void ds1621_init_client(struct i2c_client *client);
-static int ds1621_detach_client(struct i2c_client *client);
+static int ds1621_remove(struct i2c_client *client);
static struct ds1621_data *ds1621_update_client(struct device *dev);
+static const struct i2c_device_id ds1621_id[] = {
+ { "ds1621", ds1621 },
+ { "ds1625", ds1621 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, ds1621_id);
+
/* This is the driver that will be inserted */
static struct i2c_driver ds1621_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "ds1621",
},
- .attach_adapter = ds1621_attach_adapter,
- .detach_client = ds1621_detach_client,
+ .probe = ds1621_probe,
+ .remove = ds1621_remove,
+ .id_table = ds1621_id,
+ .detect = ds1621_detect,
+ .address_data = &addr_data,
};
/* All registers are word-sized, except for the configuration register.
@@ -199,40 +210,18 @@
};
-static int ds1621_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int ds1621_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, ds1621_detect);
-}
-
-/* This function is called by i2c_probe */
-static int ds1621_detect(struct i2c_adapter *adapter, int address,
- int kind)
-{
+ struct i2c_adapter *adapter = client->adapter;
int conf, temp;
- struct i2c_client *client;
- struct ds1621_data *data;
- int i, err = 0;
+ int i;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
| I2C_FUNC_SMBUS_WORD_DATA
| I2C_FUNC_SMBUS_WRITE_BYTE))
- goto exit;
-
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access ds1621_{read,write}_value. */
- if (!(data = kzalloc(sizeof(struct ds1621_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &ds1621_driver;
+ return -ENODEV;
/* Now, we do the remaining detection. It is lousy. */
if (kind < 0) {
@@ -241,29 +230,41 @@
improbable in our case. */
conf = ds1621_read_value(client, DS1621_REG_CONF);
if (conf & DS1621_REG_CONFIG_NVB)
- goto exit_free;
+ return -ENODEV;
/* The 7 lowest bits of a temperature should always be 0. */
- for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
+ for (i = 0; i < ARRAY_SIZE(DS1621_REG_TEMP); i++) {
temp = ds1621_read_value(client, DS1621_REG_TEMP[i]);
if (temp & 0x007f)
- goto exit_free;
+ return -ENODEV;
}
}
- /* Fill in remaining client fields and put it into the global list */
- strlcpy(client->name, "ds1621", I2C_NAME_SIZE);
- mutex_init(&data->update_lock);
+ strlcpy(info->type, "ds1621", I2C_NAME_SIZE);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
+ return 0;
+}
+
+static int ds1621_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct ds1621_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct ds1621_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->update_lock);
/* Initialize the DS1621 chip */
ds1621_init_client(client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &ds1621_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -275,25 +276,19 @@
exit_remove_files:
sysfs_remove_group(&client->dev.kobj, &ds1621_group);
- exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int ds1621_detach_client(struct i2c_client *client)
+static int ds1621_remove(struct i2c_client *client)
{
struct ds1621_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &ds1621_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
diff --git a/drivers/hwmon/f75375s.c b/drivers/hwmon/f75375s.c
index dc1f30e..1692de3 100644
--- a/drivers/hwmon/f75375s.c
+++ b/drivers/hwmon/f75375s.c
@@ -87,7 +87,6 @@
struct f75375_data {
unsigned short addr;
- struct i2c_client *client;
struct device *hwmon_dev;
const char *name;
@@ -114,21 +113,12 @@
s8 temp_max_hyst[2];
};
-static int f75375_attach_adapter(struct i2c_adapter *adapter);
-static int f75375_detect(struct i2c_adapter *adapter, int address, int kind);
-static int f75375_detach_client(struct i2c_client *client);
+static int f75375_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static int f75375_probe(struct i2c_client *client,
const struct i2c_device_id *id);
static int f75375_remove(struct i2c_client *client);
-static struct i2c_driver f75375_legacy_driver = {
- .driver = {
- .name = "f75375_legacy",
- },
- .attach_adapter = f75375_attach_adapter,
- .detach_client = f75375_detach_client,
-};
-
static const struct i2c_device_id f75375_id[] = {
{ "f75373", f75373 },
{ "f75375", f75375 },
@@ -137,12 +127,15 @@
MODULE_DEVICE_TABLE(i2c, f75375_id);
static struct i2c_driver f75375_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "f75375",
},
.probe = f75375_probe,
.remove = f75375_remove,
.id_table = f75375_id,
+ .detect = f75375_detect,
+ .address_data = &addr_data,
};
static inline int f75375_read8(struct i2c_client *client, u8 reg)
@@ -607,22 +600,6 @@
.attrs = f75375_attributes,
};
-static int f75375_detach_client(struct i2c_client *client)
-{
- int err;
-
- f75375_remove(client);
- err = i2c_detach_client(client);
- if (err) {
- dev_err(&client->dev,
- "Client deregistration failed, "
- "client not detached.\n");
- return err;
- }
- kfree(client);
- return 0;
-}
-
static void f75375_init(struct i2c_client *client, struct f75375_data *data,
struct f75375s_platform_data *f75375s_pdata)
{
@@ -651,7 +628,6 @@
return -ENOMEM;
i2c_set_clientdata(client, data);
- data->client = client;
mutex_init(&data->update_lock);
data->kind = id->driver_data;
@@ -700,29 +676,13 @@
return 0;
}
-static int f75375_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int f75375_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, f75375_detect);
-}
-
-/* This function is called by i2c_probe */
-static int f75375_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
+ struct i2c_adapter *adapter = client->adapter;
u8 version = 0;
- int err = 0;
const char *name = "";
- struct i2c_device_id id;
-
- if (!(client = kzalloc(sizeof(*client), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
- client->addr = address;
- client->adapter = adapter;
- client->driver = &f75375_legacy_driver;
if (kind < 0) {
u16 vendid = f75375_read16(client, F75375_REG_VENDOR);
@@ -736,7 +696,7 @@
dev_err(&adapter->dev,
"failed,%02X,%02X,%02X\n",
chipid, version, vendid);
- goto exit_free;
+ return -ENODEV;
}
}
@@ -746,43 +706,18 @@
name = "f75373";
}
dev_info(&adapter->dev, "found %s version: %02X\n", name, version);
- strlcpy(client->name, name, I2C_NAME_SIZE);
-
- if ((err = i2c_attach_client(client)))
- goto exit_free;
-
- strlcpy(id.name, name, I2C_NAME_SIZE);
- id.driver_data = kind;
- if ((err = f75375_probe(client, &id)) < 0)
- goto exit_detach;
+ strlcpy(info->type, name, I2C_NAME_SIZE);
return 0;
-
-exit_detach:
- i2c_detach_client(client);
-exit_free:
- kfree(client);
-exit:
- return err;
}
static int __init sensors_f75375_init(void)
{
- int status;
- status = i2c_add_driver(&f75375_driver);
- if (status)
- return status;
-
- status = i2c_add_driver(&f75375_legacy_driver);
- if (status)
- i2c_del_driver(&f75375_driver);
-
- return status;
+ return i2c_add_driver(&f75375_driver);
}
static void __exit sensors_f75375_exit(void)
{
- i2c_del_driver(&f75375_legacy_driver);
i2c_del_driver(&f75375_driver);
}
diff --git a/drivers/hwmon/fscher.c b/drivers/hwmon/fscher.c
index ed26b66..12c70e4 100644
--- a/drivers/hwmon/fscher.c
+++ b/drivers/hwmon/fscher.c
@@ -106,9 +106,11 @@
* Functions declaration
*/
-static int fscher_attach_adapter(struct i2c_adapter *adapter);
-static int fscher_detect(struct i2c_adapter *adapter, int address, int kind);
-static int fscher_detach_client(struct i2c_client *client);
+static int fscher_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int fscher_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int fscher_remove(struct i2c_client *client);
static struct fscher_data *fscher_update_device(struct device *dev);
static void fscher_init_client(struct i2c_client *client);
@@ -119,12 +121,21 @@
* Driver data (common to all clients)
*/
+static const struct i2c_device_id fscher_id[] = {
+ { "fscher", fscher },
+ { }
+};
+
static struct i2c_driver fscher_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "fscher",
},
- .attach_adapter = fscher_attach_adapter,
- .detach_client = fscher_detach_client,
+ .probe = fscher_probe,
+ .remove = fscher_remove,
+ .id_table = fscher_id,
+ .detect = fscher_detect,
+ .address_data = &addr_data,
};
/*
@@ -132,7 +143,6 @@
*/
struct fscher_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -283,38 +293,14 @@
* Real code
*/
-static int fscher_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int fscher_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, fscher_detect);
-}
-
-static int fscher_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *new_client;
- struct fscher_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = new_client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- /* OK. For now, we presume we have a valid client. We now create the
- * client structure, even though we cannot fill it completely yet.
- * But it allows us to access i2c_smbus_read_byte_data. */
- if (!(data = kzalloc(sizeof(struct fscher_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- /* The common I2C client data is placed right before the
- * Hermes-specific data. */
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &fscher_driver;
- new_client->flags = 0;
+ return -ENODEV;
/* Do the remaining detection unless force or force_fscher parameter */
if (kind < 0) {
@@ -324,24 +310,35 @@
FSCHER_REG_IDENT_1) != 0x45) /* 'E' */
|| (i2c_smbus_read_byte_data(new_client,
FSCHER_REG_IDENT_2) != 0x52)) /* 'R' */
- goto exit_free;
+ return -ENODEV;
}
- /* Fill in the remaining client fields and put it into the
- * global list */
- strlcpy(new_client->name, "fscher", I2C_NAME_SIZE);
+ strlcpy(info->type, "fscher", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int fscher_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct fscher_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct fscher_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
fscher_init_client(new_client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj, &fscher_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&new_client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -353,25 +350,19 @@
exit_remove_files:
sysfs_remove_group(&new_client->dev.kobj, &fscher_group);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
return err;
}
-static int fscher_detach_client(struct i2c_client *client)
+static int fscher_remove(struct i2c_client *client)
{
struct fscher_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &fscher_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/fschmd.c b/drivers/hwmon/fschmd.c
index bd89d27..9671703 100644
--- a/drivers/hwmon/fschmd.c
+++ b/drivers/hwmon/fschmd.c
@@ -171,20 +171,37 @@
* Functions declarations
*/
-static int fschmd_attach_adapter(struct i2c_adapter *adapter);
-static int fschmd_detach_client(struct i2c_client *client);
+static int fschmd_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int fschmd_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int fschmd_remove(struct i2c_client *client);
static struct fschmd_data *fschmd_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id fschmd_id[] = {
+ { "fscpos", fscpos },
+ { "fscher", fscher },
+ { "fscscy", fscscy },
+ { "fschrc", fschrc },
+ { "fschmd", fschmd },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, fschmd_id);
+
static struct i2c_driver fschmd_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = FSCHMD_NAME,
},
- .attach_adapter = fschmd_attach_adapter,
- .detach_client = fschmd_detach_client,
+ .probe = fschmd_probe,
+ .remove = fschmd_remove,
+ .id_table = fschmd_id,
+ .detect = fschmd_detect,
+ .address_data = &addr_data,
};
/*
@@ -192,7 +209,6 @@
*/
struct fschmd_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
int kind;
@@ -269,7 +285,7 @@
v = SENSORS_LIMIT(v, -128, 127) + 128;
mutex_lock(&data->update_lock);
- i2c_smbus_write_byte_data(&data->client,
+ i2c_smbus_write_byte_data(to_i2c_client(dev),
FSCHMD_REG_TEMP_LIMIT[data->kind][index], v);
data->temp_max[index] = v;
mutex_unlock(&data->update_lock);
@@ -346,14 +362,14 @@
mutex_lock(&data->update_lock);
- reg = i2c_smbus_read_byte_data(&data->client,
+ reg = i2c_smbus_read_byte_data(to_i2c_client(dev),
FSCHMD_REG_FAN_RIPPLE[data->kind][index]);
/* bits 2..7 reserved => mask with 0x03 */
reg &= ~0x03;
reg |= v;
- i2c_smbus_write_byte_data(&data->client,
+ i2c_smbus_write_byte_data(to_i2c_client(dev),
FSCHMD_REG_FAN_RIPPLE[data->kind][index], reg);
data->fan_ripple[index] = reg;
@@ -416,7 +432,7 @@
mutex_lock(&data->update_lock);
- i2c_smbus_write_byte_data(&data->client,
+ i2c_smbus_write_byte_data(to_i2c_client(dev),
FSCHMD_REG_FAN_MIN[data->kind][index], v);
data->fan_min[index] = v;
@@ -448,14 +464,14 @@
mutex_lock(&data->update_lock);
- reg = i2c_smbus_read_byte_data(&data->client, FSCHMD_REG_CONTROL);
+ reg = i2c_smbus_read_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL);
if (v)
reg |= FSCHMD_CONTROL_ALERT_LED_MASK;
else
reg &= ~FSCHMD_CONTROL_ALERT_LED_MASK;
- i2c_smbus_write_byte_data(&data->client, FSCHMD_REG_CONTROL, reg);
+ i2c_smbus_write_byte_data(to_i2c_client(dev), FSCHMD_REG_CONTROL, reg);
data->global_control = reg;
@@ -600,32 +616,15 @@
}
}
-static int fschmd_detect(struct i2c_adapter *adapter, int address, int kind)
+static int fschmd_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *client;
- struct fschmd_data *data;
- u8 revision;
- const char * const names[5] = { "Poseidon", "Hermes", "Scylla",
- "Heracles", "Heimdall" };
+ struct i2c_adapter *adapter = client->adapter;
const char * const client_names[5] = { "fscpos", "fscher", "fscscy",
"fschrc", "fschmd" };
- int i, err = 0;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- return 0;
-
- /* OK. For now, we presume we have a valid client. We now create the
- * client structure, even though we cannot fill it completely yet.
- * But it allows us to access i2c_smbus_read_byte_data. */
- if (!(data = kzalloc(sizeof(struct fschmd_data), GFP_KERNEL)))
- return -ENOMEM;
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &fschmd_driver;
- mutex_init(&data->update_lock);
+ return -ENODEV;
/* Detect & Identify the chip */
if (kind <= 0) {
@@ -650,9 +649,31 @@
else if (!strcmp(id, "HMD"))
kind = fschmd;
else
- goto exit_free;
+ return -ENODEV;
}
+ strlcpy(info->type, client_names[kind - 1], I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int fschmd_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct fschmd_data *data;
+ u8 revision;
+ const char * const names[5] = { "Poseidon", "Hermes", "Scylla",
+ "Heracles", "Heimdall" };
+ int i, err;
+ enum chips kind = id->driver_data;
+
+ data = kzalloc(sizeof(struct fschmd_data), GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->update_lock);
+
if (kind == fscpos) {
/* The Poseidon has hardwired temp limits, fill these
in for the alarm resetting code */
@@ -674,11 +695,6 @@
/* i2c kind goes from 1-5, we want from 0-4 to address arrays */
data->kind = kind - 1;
- strlcpy(client->name, client_names[data->kind], I2C_NAME_SIZE);
-
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
for (i = 0; i < ARRAY_SIZE(fschmd_attr); i++) {
err = device_create_file(&client->dev,
@@ -726,25 +742,14 @@
return 0;
exit_detach:
- fschmd_detach_client(client); /* will also free data for us */
- return err;
-
-exit_free:
- kfree(data);
+ fschmd_remove(client); /* will also free data for us */
return err;
}
-static int fschmd_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, fschmd_detect);
-}
-
-static int fschmd_detach_client(struct i2c_client *client)
+static int fschmd_remove(struct i2c_client *client)
{
struct fschmd_data *data = i2c_get_clientdata(client);
- int i, err;
+ int i;
/* Check if registered in case we're called from fschmd_detect
to cleanup after an error */
@@ -760,9 +765,6 @@
device_remove_file(&client->dev,
&fschmd_fan_attr[i].dev_attr);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/fscpos.c b/drivers/hwmon/fscpos.c
index 00f4848..8a7bcf5 100644
--- a/drivers/hwmon/fscpos.c
+++ b/drivers/hwmon/fscpos.c
@@ -87,9 +87,11 @@
/*
* Functions declaration
*/
-static int fscpos_attach_adapter(struct i2c_adapter *adapter);
-static int fscpos_detect(struct i2c_adapter *adapter, int address, int kind);
-static int fscpos_detach_client(struct i2c_client *client);
+static int fscpos_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int fscpos_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int fscpos_remove(struct i2c_client *client);
static int fscpos_read_value(struct i2c_client *client, u8 reg);
static int fscpos_write_value(struct i2c_client *client, u8 reg, u8 value);
@@ -101,19 +103,27 @@
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id fscpos_id[] = {
+ { "fscpos", fscpos },
+ { }
+};
+
static struct i2c_driver fscpos_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "fscpos",
},
- .attach_adapter = fscpos_attach_adapter,
- .detach_client = fscpos_detach_client,
+ .probe = fscpos_probe,
+ .remove = fscpos_remove,
+ .id_table = fscpos_id,
+ .detect = fscpos_detect,
+ .address_data = &addr_data,
};
/*
* Client data (each client gets its own)
*/
struct fscpos_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* 0 until following fields are valid */
@@ -470,39 +480,14 @@
.attrs = fscpos_attributes,
};
-static int fscpos_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int fscpos_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, fscpos_detect);
-}
-
-static int fscpos_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *new_client;
- struct fscpos_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = new_client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- /*
- * OK. For now, we presume we have a valid client. We now create the
- * client structure, even though we cannot fill it completely yet.
- * But it allows us to access fscpos_{read,write}_value.
- */
-
- if (!(data = kzalloc(sizeof(struct fscpos_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &fscpos_driver;
- new_client->flags = 0;
+ return -ENODEV;
/* Do the remaining detection unless force or force_fscpos parameter */
if (kind < 0) {
@@ -512,22 +497,30 @@
!= 0x45) /* 'E' */
|| (fscpos_read_value(new_client, FSCPOS_REG_IDENT_2)
!= 0x47))/* 'G' */
- {
- dev_dbg(&new_client->dev, "fscpos detection failed\n");
- goto exit_free;
- }
+ return -ENODEV;
}
- /* Fill in the remaining client fields and put it in the global list */
- strlcpy(new_client->name, "fscpos", I2C_NAME_SIZE);
+ strlcpy(info->type, "fscpos", I2C_NAME_SIZE);
+ return 0;
+}
+
+static int fscpos_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct fscpos_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct fscpos_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/* Inizialize the fscpos chip */
fscpos_init_client(new_client);
@@ -536,7 +529,7 @@
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj, &fscpos_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&new_client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -548,24 +541,19 @@
exit_remove_files:
sysfs_remove_group(&new_client->dev.kobj, &fscpos_group);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
return err;
}
-static int fscpos_detach_client(struct i2c_client *client)
+static int fscpos_remove(struct i2c_client *client)
{
struct fscpos_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &fscpos_group);
- if ((err = i2c_detach_client(client)))
- return err;
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/gl518sm.c b/drivers/hwmon/gl518sm.c
index 33e9e8a..7820df4 100644
--- a/drivers/hwmon/gl518sm.c
+++ b/drivers/hwmon/gl518sm.c
@@ -114,7 +114,6 @@
/* Each client has this additional data */
struct gl518_data {
- struct i2c_client client;
struct device *hwmon_dev;
enum chips type;
@@ -138,21 +137,33 @@
u8 beep_enable; /* Boolean */
};
-static int gl518_attach_adapter(struct i2c_adapter *adapter);
-static int gl518_detect(struct i2c_adapter *adapter, int address, int kind);
+static int gl518_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int gl518_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void gl518_init_client(struct i2c_client *client);
-static int gl518_detach_client(struct i2c_client *client);
+static int gl518_remove(struct i2c_client *client);
static int gl518_read_value(struct i2c_client *client, u8 reg);
static int gl518_write_value(struct i2c_client *client, u8 reg, u16 value);
static struct gl518_data *gl518_update_device(struct device *dev);
+static const struct i2c_device_id gl518_id[] = {
+ { "gl518sm", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, gl518_id);
+
/* This is the driver that will be inserted */
static struct i2c_driver gl518_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "gl518sm",
},
- .attach_adapter = gl518_attach_adapter,
- .detach_client = gl518_detach_client,
+ .probe = gl518_probe,
+ .remove = gl518_remove,
+ .id_table = gl518_id,
+ .detect = gl518_detect,
+ .address_data = &addr_data,
};
/*
@@ -472,46 +483,23 @@
* Real code
*/
-static int gl518_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int gl518_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, gl518_detect);
-}
-
-static int gl518_detect(struct i2c_adapter *adapter, int address, int kind)
-{
+ struct i2c_adapter *adapter = client->adapter;
int i;
- struct i2c_client *client;
- struct gl518_data *data;
- int err = 0;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
- goto exit;
-
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access gl518_{read,write}_value. */
-
- if (!(data = kzalloc(sizeof(struct gl518_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
-
- client->addr = address;
- client->adapter = adapter;
- client->driver = &gl518_driver;
+ return -ENODEV;
/* Now, we do the remaining detection. */
if (kind < 0) {
if ((gl518_read_value(client, GL518_REG_CHIP_ID) != 0x80)
|| (gl518_read_value(client, GL518_REG_CONF) & 0x80))
- goto exit_free;
+ return -ENODEV;
}
/* Determine the chip type. */
@@ -526,19 +514,32 @@
dev_info(&adapter->dev,
"Ignoring 'force' parameter for unknown "
"chip at adapter %d, address 0x%02x\n",
- i2c_adapter_id(adapter), address);
- goto exit_free;
+ i2c_adapter_id(adapter), client->addr);
+ return -ENODEV;
}
}
- /* Fill in the remaining client fields */
- strlcpy(client->name, "gl518sm", I2C_NAME_SIZE);
- data->type = kind;
- mutex_init(&data->update_lock);
+ strlcpy(info->type, "gl518sm", I2C_NAME_SIZE);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
+ return 0;
+}
+
+static int gl518_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct gl518_data *data;
+ int err, revision;
+
+ data = kzalloc(sizeof(struct gl518_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ revision = gl518_read_value(client, GL518_REG_REVISION);
+ data->type = revision == 0x80 ? gl518sm_r80 : gl518sm_r00;
+ mutex_init(&data->update_lock);
/* Initialize the GL518SM chip */
data->alarm_mask = 0xff;
@@ -546,7 +547,7 @@
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &gl518_group)))
- goto exit_detach;
+ goto exit_free;
if (data->type == gl518sm_r80)
if ((err = sysfs_create_group(&client->dev.kobj,
&gl518_group_r80)))
@@ -564,8 +565,6 @@
sysfs_remove_group(&client->dev.kobj, &gl518_group);
if (data->type == gl518sm_r80)
sysfs_remove_group(&client->dev.kobj, &gl518_group_r80);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
@@ -591,19 +590,15 @@
gl518_write_value(client, GL518_REG_CONF, 0x40 | regvalue);
}
-static int gl518_detach_client(struct i2c_client *client)
+static int gl518_remove(struct i2c_client *client)
{
struct gl518_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &gl518_group);
if (data->type == gl518sm_r80)
sysfs_remove_group(&client->dev.kobj, &gl518_group_r80);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/gl520sm.c b/drivers/hwmon/gl520sm.c
index 8984ef1..19616f2 100644
--- a/drivers/hwmon/gl520sm.c
+++ b/drivers/hwmon/gl520sm.c
@@ -79,26 +79,37 @@
* Function declarations
*/
-static int gl520_attach_adapter(struct i2c_adapter *adapter);
-static int gl520_detect(struct i2c_adapter *adapter, int address, int kind);
+static int gl520_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int gl520_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void gl520_init_client(struct i2c_client *client);
-static int gl520_detach_client(struct i2c_client *client);
+static int gl520_remove(struct i2c_client *client);
static int gl520_read_value(struct i2c_client *client, u8 reg);
static int gl520_write_value(struct i2c_client *client, u8 reg, u16 value);
static struct gl520_data *gl520_update_device(struct device *dev);
/* Driver data */
+static const struct i2c_device_id gl520_id[] = {
+ { "gl520sm", gl520sm },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, gl520_id);
+
static struct i2c_driver gl520_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "gl520sm",
},
- .attach_adapter = gl520_attach_adapter,
- .detach_client = gl520_detach_client,
+ .probe = gl520_probe,
+ .remove = gl520_remove,
+ .id_table = gl520_id,
+ .detect = gl520_detect,
+ .address_data = &addr_data,
};
/* Client data */
struct gl520_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until the following fields are valid */
@@ -669,37 +680,15 @@
* Real code
*/
-static int gl520_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int gl520_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, gl520_detect);
-}
-
-static int gl520_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct gl520_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
- goto exit;
-
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access gl520_{read,write}_value. */
-
- if (!(data = kzalloc(sizeof(struct gl520_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &gl520_driver;
+ return -ENODEV;
/* Determine the chip type. */
if (kind < 0) {
@@ -707,24 +696,36 @@
((gl520_read_value(client, GL520_REG_REVISION) & 0x7f) != 0x00) ||
((gl520_read_value(client, GL520_REG_CONF) & 0x80) != 0x00)) {
dev_dbg(&client->dev, "Unknown chip type, skipping\n");
- goto exit_free;
+ return -ENODEV;
}
}
- /* Fill in the remaining client fields */
- strlcpy(client->name, "gl520sm", I2C_NAME_SIZE);
- mutex_init(&data->update_lock);
+ strlcpy(info->type, "gl520sm", I2C_NAME_SIZE);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
+ return 0;
+}
+
+static int gl520_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct gl520_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct gl520_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->update_lock);
/* Initialize the GL520SM chip */
gl520_init_client(client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &gl520_group)))
- goto exit_detach;
+ goto exit_free;
if (data->two_temps) {
if ((err = device_create_file(&client->dev,
@@ -764,8 +765,6 @@
exit_remove_files:
sysfs_remove_group(&client->dev.kobj, &gl520_group);
sysfs_remove_group(&client->dev.kobj, &gl520_group_opt);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
@@ -811,18 +810,14 @@
gl520_write_value(client, GL520_REG_BEEP_MASK, data->beep_mask);
}
-static int gl520_detach_client(struct i2c_client *client)
+static int gl520_remove(struct i2c_client *client)
{
struct gl520_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &gl520_group);
sysfs_remove_group(&client->dev.kobj, &gl520_group_opt);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/lm63.c b/drivers/hwmon/lm63.c
index 1162870..3195a26 100644
--- a/drivers/hwmon/lm63.c
+++ b/drivers/hwmon/lm63.c
@@ -1,7 +1,7 @@
/*
* lm63.c - driver for the National Semiconductor LM63 temperature sensor
* with integrated fan control
- * Copyright (C) 2004-2006 Jean Delvare <khali@linux-fr.org>
+ * Copyright (C) 2004-2008 Jean Delvare <khali@linux-fr.org>
* Based on the lm90 driver.
*
* The LM63 is a sensor chip made by National Semiconductor. It measures
@@ -128,24 +128,36 @@
* Functions declaration
*/
-static int lm63_attach_adapter(struct i2c_adapter *adapter);
-static int lm63_detach_client(struct i2c_client *client);
+static int lm63_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int lm63_remove(struct i2c_client *client);
static struct lm63_data *lm63_update_device(struct device *dev);
-static int lm63_detect(struct i2c_adapter *adapter, int address, int kind);
+static int lm63_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void lm63_init_client(struct i2c_client *client);
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id lm63_id[] = {
+ { "lm63", lm63 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lm63_id);
+
static struct i2c_driver lm63_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "lm63",
},
- .attach_adapter = lm63_attach_adapter,
- .detach_client = lm63_detach_client,
+ .probe = lm63_probe,
+ .remove = lm63_remove,
+ .id_table = lm63_id,
+ .detect = lm63_detect,
+ .address_data = &addr_data,
};
/*
@@ -153,7 +165,6 @@
*/
struct lm63_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -411,43 +422,14 @@
* Real code
*/
-static int lm63_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm63_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, lm63_detect);
-}
-
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-static int lm63_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *new_client;
- struct lm63_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = new_client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct lm63_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- /* The common I2C client data is placed right before the
- LM63-specific data. */
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &lm63_driver;
- new_client->flags = 0;
-
- /* Default to an LM63 if forced */
- if (kind == 0)
- kind = lm63;
+ return -ENODEV;
if (kind < 0) { /* must identify */
u8 man_id, chip_id, reg_config1, reg_config2;
@@ -477,25 +459,38 @@
dev_dbg(&adapter->dev, "Unsupported chip "
"(man_id=0x%02X, chip_id=0x%02X).\n",
man_id, chip_id);
- goto exit_free;
+ return -ENODEV;
}
}
- strlcpy(new_client->name, "lm63", I2C_NAME_SIZE);
+ strlcpy(info->type, "lm63", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int lm63_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct lm63_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct lm63_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/* Initialize the LM63 chip */
lm63_init_client(new_client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj,
&lm63_group)))
- goto exit_detach;
+ goto exit_free;
if (data->config & 0x04) { /* tachometer enabled */
if ((err = sysfs_create_group(&new_client->dev.kobj,
&lm63_group_fan1)))
@@ -513,8 +508,6 @@
exit_remove_files:
sysfs_remove_group(&new_client->dev.kobj, &lm63_group);
sysfs_remove_group(&new_client->dev.kobj, &lm63_group_fan1);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
@@ -556,18 +549,14 @@
(data->config_fan & 0x20) ? "manual" : "auto");
}
-static int lm63_detach_client(struct i2c_client *client)
+static int lm63_remove(struct i2c_client *client)
{
struct lm63_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &lm63_group);
sysfs_remove_group(&client->dev.kobj, &lm63_group_fan1);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/lm77.c b/drivers/hwmon/lm77.c
index 36d5a8c..866b401 100644
--- a/drivers/hwmon/lm77.c
+++ b/drivers/hwmon/lm77.c
@@ -52,7 +52,6 @@
/* Each client has this additional data */
struct lm77_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid;
@@ -65,23 +64,35 @@
u8 alarms;
};
-static int lm77_attach_adapter(struct i2c_adapter *adapter);
-static int lm77_detect(struct i2c_adapter *adapter, int address, int kind);
+static int lm77_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int lm77_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void lm77_init_client(struct i2c_client *client);
-static int lm77_detach_client(struct i2c_client *client);
+static int lm77_remove(struct i2c_client *client);
static u16 lm77_read_value(struct i2c_client *client, u8 reg);
static int lm77_write_value(struct i2c_client *client, u8 reg, u16 value);
static struct lm77_data *lm77_update_device(struct device *dev);
+static const struct i2c_device_id lm77_id[] = {
+ { "lm77", lm77 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lm77_id);
+
/* This is the driver that will be inserted */
static struct i2c_driver lm77_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "lm77",
},
- .attach_adapter = lm77_attach_adapter,
- .detach_client = lm77_detach_client,
+ .probe = lm77_probe,
+ .remove = lm77_remove,
+ .id_table = lm77_id,
+ .detect = lm77_detect,
+ .address_data = &addr_data,
};
/* straight from the datasheet */
@@ -215,13 +226,6 @@
static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL, 0);
static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, 1);
-static int lm77_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, lm77_detect);
-}
-
static struct attribute *lm77_attributes[] = {
&dev_attr_temp1_input.attr,
&dev_attr_temp1_crit.attr,
@@ -240,32 +244,15 @@
.attrs = lm77_attributes,
};
-/* This function is called by i2c_probe */
-static int lm77_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm77_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *new_client;
- struct lm77_data *data;
- int err = 0;
- const char *name = "";
+ struct i2c_adapter *adapter = new_client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
I2C_FUNC_SMBUS_WORD_DATA))
- goto exit;
-
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access lm77_{read,write}_value. */
- if (!(data = kzalloc(sizeof(struct lm77_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &lm77_driver;
- new_client->flags = 0;
+ return -ENODEV;
/* Here comes the remaining detection. Since the LM77 has no
register dedicated to identification, we have to rely on the
@@ -294,7 +281,7 @@
|| i2c_smbus_read_word_data(new_client, i + 3) != crit
|| i2c_smbus_read_word_data(new_client, i + 4) != min
|| i2c_smbus_read_word_data(new_client, i + 5) != max)
- goto exit_free;
+ return -ENODEV;
/* sign bits */
if (((cur & 0x00f0) != 0xf0 && (cur & 0x00f0) != 0x0)
@@ -302,51 +289,55 @@
|| ((crit & 0x00f0) != 0xf0 && (crit & 0x00f0) != 0x0)
|| ((min & 0x00f0) != 0xf0 && (min & 0x00f0) != 0x0)
|| ((max & 0x00f0) != 0xf0 && (max & 0x00f0) != 0x0))
- goto exit_free;
+ return -ENODEV;
/* unused bits */
if (conf & 0xe0)
- goto exit_free;
+ return -ENODEV;
/* 0x06 and 0x07 return the last read value */
cur = i2c_smbus_read_word_data(new_client, 0);
if (i2c_smbus_read_word_data(new_client, 6) != cur
|| i2c_smbus_read_word_data(new_client, 7) != cur)
- goto exit_free;
+ return -ENODEV;
hyst = i2c_smbus_read_word_data(new_client, 2);
if (i2c_smbus_read_word_data(new_client, 6) != hyst
|| i2c_smbus_read_word_data(new_client, 7) != hyst)
- goto exit_free;
+ return -ENODEV;
min = i2c_smbus_read_word_data(new_client, 4);
if (i2c_smbus_read_word_data(new_client, 6) != min
|| i2c_smbus_read_word_data(new_client, 7) != min)
- goto exit_free;
+ return -ENODEV;
}
- /* Determine the chip type - only one kind supported! */
- if (kind <= 0)
- kind = lm77;
+ strlcpy(info->type, "lm77", I2C_NAME_SIZE);
- if (kind == lm77) {
- name = "lm77";
+ return 0;
+}
+
+static int lm77_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct lm77_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct lm77_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
}
- /* Fill in the remaining client fields and put it into the global list */
- strlcpy(new_client->name, name, I2C_NAME_SIZE);
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/* Initialize the LM77 chip */
lm77_init_client(new_client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj, &lm77_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&new_client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -358,20 +349,17 @@
exit_remove:
sysfs_remove_group(&new_client->dev.kobj, &lm77_group);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
return err;
}
-static int lm77_detach_client(struct i2c_client *client)
+static int lm77_remove(struct i2c_client *client)
{
struct lm77_data *data = i2c_get_clientdata(client);
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &lm77_group);
- i2c_detach_client(client);
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/lm80.c b/drivers/hwmon/lm80.c
index 26c91c9..bcffc18 100644
--- a/drivers/hwmon/lm80.c
+++ b/drivers/hwmon/lm80.c
@@ -108,7 +108,6 @@
*/
struct lm80_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* !=0 if following fields are valid */
@@ -132,10 +131,12 @@
* Functions declaration
*/
-static int lm80_attach_adapter(struct i2c_adapter *adapter);
-static int lm80_detect(struct i2c_adapter *adapter, int address, int kind);
+static int lm80_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int lm80_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void lm80_init_client(struct i2c_client *client);
-static int lm80_detach_client(struct i2c_client *client);
+static int lm80_remove(struct i2c_client *client);
static struct lm80_data *lm80_update_device(struct device *dev);
static int lm80_read_value(struct i2c_client *client, u8 reg);
static int lm80_write_value(struct i2c_client *client, u8 reg, u8 value);
@@ -144,12 +145,22 @@
* Driver data (common to all clients)
*/
+static const struct i2c_device_id lm80_id[] = {
+ { "lm80", lm80 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lm80_id);
+
static struct i2c_driver lm80_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "lm80",
},
- .attach_adapter = lm80_attach_adapter,
- .detach_client = lm80_detach_client,
+ .probe = lm80_probe,
+ .remove = lm80_remove,
+ .id_table = lm80_id,
+ .detect = lm80_detect,
+ .address_data = &addr_data,
};
/*
@@ -383,13 +394,6 @@
* Real code
*/
-static int lm80_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, lm80_detect);
-}
-
static struct attribute *lm80_attributes[] = {
&sensor_dev_attr_in0_min.dev_attr.attr,
&sensor_dev_attr_in1_min.dev_attr.attr,
@@ -442,54 +446,47 @@
.attrs = lm80_attributes,
};
-static int lm80_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm80_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
+ struct i2c_adapter *adapter = client->adapter;
int i, cur;
- struct i2c_client *client;
- struct lm80_data *data;
- int err = 0;
- const char *name;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access lm80_{read,write}_value. */
- if (!(data = kzalloc(sizeof(struct lm80_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &lm80_driver;
+ return -ENODEV;
/* Now, we do the remaining detection. It is lousy. */
if (lm80_read_value(client, LM80_REG_ALARM2) & 0xc0)
- goto error_free;
+ return -ENODEV;
for (i = 0x2a; i <= 0x3d; i++) {
cur = i2c_smbus_read_byte_data(client, i);
if ((i2c_smbus_read_byte_data(client, i + 0x40) != cur)
|| (i2c_smbus_read_byte_data(client, i + 0x80) != cur)
|| (i2c_smbus_read_byte_data(client, i + 0xc0) != cur))
- goto error_free;
+ return -ENODEV;
}
- /* Determine the chip type - only one kind supported! */
- kind = lm80;
- name = "lm80";
+ strlcpy(info->type, "lm80", I2C_NAME_SIZE);
- /* Fill in the remaining client fields */
- strlcpy(client->name, name, I2C_NAME_SIZE);
+ return 0;
+}
+
+static int lm80_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct lm80_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct lm80_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto error_free;
-
/* Initialize the LM80 chip */
lm80_init_client(client);
@@ -499,7 +496,7 @@
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &lm80_group)))
- goto error_detach;
+ goto error_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -511,23 +508,18 @@
error_remove:
sysfs_remove_group(&client->dev.kobj, &lm80_group);
-error_detach:
- i2c_detach_client(client);
error_free:
kfree(data);
exit:
return err;
}
-static int lm80_detach_client(struct i2c_client *client)
+static int lm80_remove(struct i2c_client *client)
{
struct lm80_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &lm80_group);
- if ((err = i2c_detach_client(client)))
- return err;
kfree(data);
return 0;
diff --git a/drivers/hwmon/lm83.c b/drivers/hwmon/lm83.c
index 6a8642f..e59e2d1 100644
--- a/drivers/hwmon/lm83.c
+++ b/drivers/hwmon/lm83.c
@@ -1,7 +1,7 @@
/*
* lm83.c - Part of lm_sensors, Linux kernel modules for hardware
* monitoring
- * Copyright (C) 2003-2006 Jean Delvare <khali@linux-fr.org>
+ * Copyright (C) 2003-2008 Jean Delvare <khali@linux-fr.org>
*
* Heavily inspired from the lm78, lm75 and adm1021 drivers. The LM83 is
* a sensor chip made by National Semiconductor. It reports up to four
@@ -118,21 +118,34 @@
* Functions declaration
*/
-static int lm83_attach_adapter(struct i2c_adapter *adapter);
-static int lm83_detect(struct i2c_adapter *adapter, int address, int kind);
-static int lm83_detach_client(struct i2c_client *client);
+static int lm83_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info);
+static int lm83_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int lm83_remove(struct i2c_client *client);
static struct lm83_data *lm83_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id lm83_id[] = {
+ { "lm83", lm83 },
+ { "lm82", lm82 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lm83_id);
+
static struct i2c_driver lm83_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "lm83",
},
- .attach_adapter = lm83_attach_adapter,
- .detach_client = lm83_detach_client,
+ .probe = lm83_probe,
+ .remove = lm83_remove,
+ .id_table = lm83_id,
+ .detect = lm83_detect,
+ .address_data = &addr_data,
};
/*
@@ -140,7 +153,6 @@
*/
struct lm83_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -278,40 +290,15 @@
* Real code
*/
-static int lm83_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm83_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, lm83_detect);
-}
-
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-static int lm83_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *new_client;
- struct lm83_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = new_client->adapter;
const char *name = "";
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct lm83_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- /* The common I2C client data is placed right after the
- * LM83-specific data. */
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &lm83_driver;
- new_client->flags = 0;
+ return -ENODEV;
/* Now we do the detection and identification. A negative kind
* means that the driver was loaded with no force parameter
@@ -335,8 +322,9 @@
((i2c_smbus_read_byte_data(new_client, LM83_REG_R_CONFIG)
& 0x41) != 0x00)) {
dev_dbg(&adapter->dev,
- "LM83 detection failed at 0x%02x.\n", address);
- goto exit_free;
+ "LM83 detection failed at 0x%02x.\n",
+ new_client->addr);
+ return -ENODEV;
}
}
@@ -361,7 +349,7 @@
dev_info(&adapter->dev,
"Unsupported chip (man_id=0x%02X, "
"chip_id=0x%02X).\n", man_id, chip_id);
- goto exit_free;
+ return -ENODEV;
}
}
@@ -372,15 +360,27 @@
name = "lm82";
}
- /* We can fill in the remaining client fields */
- strlcpy(new_client->name, name, I2C_NAME_SIZE);
+ strlcpy(info->type, name, I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int lm83_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct lm83_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct lm83_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/*
* Register sysfs hooks
* The LM82 can only monitor one external diode which is
@@ -389,9 +389,9 @@
*/
if ((err = sysfs_create_group(&new_client->dev.kobj, &lm83_group)))
- goto exit_detach;
+ goto exit_free;
- if (kind == lm83) {
+ if (id->driver_data == lm83) {
if ((err = sysfs_create_group(&new_client->dev.kobj,
&lm83_group_opt)))
goto exit_remove_files;
@@ -408,26 +408,20 @@
exit_remove_files:
sysfs_remove_group(&new_client->dev.kobj, &lm83_group);
sysfs_remove_group(&new_client->dev.kobj, &lm83_group_opt);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
return err;
}
-static int lm83_detach_client(struct i2c_client *client)
+static int lm83_remove(struct i2c_client *client)
{
struct lm83_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &lm83_group);
sysfs_remove_group(&client->dev.kobj, &lm83_group_opt);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/lm87.c b/drivers/hwmon/lm87.c
index e1c183f..21970f0 100644
--- a/drivers/hwmon/lm87.c
+++ b/drivers/hwmon/lm87.c
@@ -5,7 +5,7 @@
* Philip Edelbrock <phil@netroedge.com>
* Stephen Rousset <stephen.rousset@rocketlogix.com>
* Dan Eaton <dan.eaton@rocketlogix.com>
- * Copyright (C) 2004,2007 Jean Delvare <khali@linux-fr.org>
+ * Copyright (C) 2004-2008 Jean Delvare <khali@linux-fr.org>
*
* Original port to Linux 2.6 by Jeff Oliver.
*
@@ -157,22 +157,35 @@
* Functions declaration
*/
-static int lm87_attach_adapter(struct i2c_adapter *adapter);
-static int lm87_detect(struct i2c_adapter *adapter, int address, int kind);
+static int lm87_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int lm87_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info);
static void lm87_init_client(struct i2c_client *client);
-static int lm87_detach_client(struct i2c_client *client);
+static int lm87_remove(struct i2c_client *client);
static struct lm87_data *lm87_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id lm87_id[] = {
+ { "lm87", lm87 },
+ { "adm1024", adm1024 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lm87_id);
+
static struct i2c_driver lm87_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "lm87",
},
- .attach_adapter = lm87_attach_adapter,
- .detach_client = lm87_detach_client,
+ .probe = lm87_probe,
+ .remove = lm87_remove,
+ .id_table = lm87_id,
+ .detect = lm87_detect,
+ .address_data = &addr_data,
};
/*
@@ -180,7 +193,6 @@
*/
struct lm87_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -562,13 +574,6 @@
* Real code
*/
-static int lm87_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, lm87_detect);
-}
-
static struct attribute *lm87_attributes[] = {
&dev_attr_in1_input.attr,
&dev_attr_in1_min.attr,
@@ -656,33 +661,15 @@
.attrs = lm87_attributes_opt,
};
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-static int lm87_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm87_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *new_client;
- struct lm87_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = new_client->adapter;
static const char *names[] = { "lm87", "adm1024" };
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct lm87_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- /* The common I2C client data is placed right before the
- LM87-specific data. */
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &lm87_driver;
- new_client->flags = 0;
+ return -ENODEV;
/* Default to an LM87 if forced */
if (kind == 0)
@@ -704,20 +691,32 @@
|| (lm87_read_value(new_client, LM87_REG_CONFIG) & 0x80)) {
dev_dbg(&adapter->dev,
"LM87 detection failed at 0x%02x.\n",
- address);
- goto exit_free;
+ new_client->addr);
+ return -ENODEV;
}
}
- /* We can fill in the remaining client fields */
- strlcpy(new_client->name, names[kind - 1], I2C_NAME_SIZE);
+ strlcpy(info->type, names[kind - 1], I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int lm87_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct lm87_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct lm87_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/* Initialize the LM87 chip */
lm87_init_client(new_client);
@@ -732,7 +731,7 @@
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj, &lm87_group)))
- goto exit_detach;
+ goto exit_free;
if (data->channel & CHAN_NO_FAN(0)) {
if ((err = device_create_file(&new_client->dev,
@@ -832,8 +831,6 @@
exit_remove:
sysfs_remove_group(&new_client->dev.kobj, &lm87_group);
sysfs_remove_group(&new_client->dev.kobj, &lm87_group_opt);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
@@ -877,18 +874,14 @@
}
}
-static int lm87_detach_client(struct i2c_client *client)
+static int lm87_remove(struct i2c_client *client)
{
struct lm87_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &lm87_group);
sysfs_remove_group(&client->dev.kobj, &lm87_group_opt);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index d1a3da3..c24fe36 100644
--- a/drivers/hwmon/lm90.c
+++ b/drivers/hwmon/lm90.c
@@ -187,23 +187,44 @@
* Functions declaration
*/
-static int lm90_attach_adapter(struct i2c_adapter *adapter);
-static int lm90_detect(struct i2c_adapter *adapter, int address,
- int kind);
+static int lm90_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int lm90_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
static void lm90_init_client(struct i2c_client *client);
-static int lm90_detach_client(struct i2c_client *client);
+static int lm90_remove(struct i2c_client *client);
static struct lm90_data *lm90_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id lm90_id[] = {
+ { "adm1032", adm1032 },
+ { "adt7461", adt7461 },
+ { "lm90", lm90 },
+ { "lm86", lm86 },
+ { "lm89", lm99 },
+ { "lm99", lm99 }, /* Missing temperature offset */
+ { "max6657", max6657 },
+ { "max6658", max6657 },
+ { "max6659", max6657 },
+ { "max6680", max6680 },
+ { "max6681", max6680 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lm90_id);
+
static struct i2c_driver lm90_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "lm90",
},
- .attach_adapter = lm90_attach_adapter,
- .detach_client = lm90_detach_client,
+ .probe = lm90_probe,
+ .remove = lm90_remove,
+ .id_table = lm90_id,
+ .detect = lm90_detect,
+ .address_data = &addr_data,
};
/*
@@ -211,7 +232,6 @@
*/
struct lm90_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -477,40 +497,16 @@
return 0;
}
-static int lm90_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm90_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, lm90_detect);
-}
-
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-static int lm90_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *new_client;
- struct lm90_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = new_client->adapter;
+ int address = new_client->addr;
const char *name = "";
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct lm90_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- /* The common I2C client data is placed right before the
- LM90-specific data. */
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &lm90_driver;
- new_client->flags = 0;
+ return -ENODEV;
/*
* Now we do the remaining detection. A negative kind means that
@@ -538,7 +534,7 @@
LM90_REG_R_CONFIG1)) < 0
|| (reg_convrate = i2c_smbus_read_byte_data(new_client,
LM90_REG_R_CONVRATE)) < 0)
- goto exit_free;
+ return -ENODEV;
if ((address == 0x4C || address == 0x4D)
&& man_id == 0x01) { /* National Semiconductor */
@@ -546,7 +542,7 @@
if ((reg_config2 = i2c_smbus_read_byte_data(new_client,
LM90_REG_R_CONFIG2)) < 0)
- goto exit_free;
+ return -ENODEV;
if ((reg_config1 & 0x2A) == 0x00
&& (reg_config2 & 0xF8) == 0x00
@@ -610,10 +606,11 @@
dev_info(&adapter->dev,
"Unsupported chip (man_id=0x%02X, "
"chip_id=0x%02X).\n", man_id, chip_id);
- goto exit_free;
+ return -ENODEV;
}
}
+ /* Fill the i2c board info */
if (kind == lm90) {
name = "lm90";
} else if (kind == adm1032) {
@@ -621,7 +618,7 @@
/* The ADM1032 supports PEC, but only if combined
transactions are not used. */
if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
- new_client->flags |= I2C_CLIENT_PEC;
+ info->flags |= I2C_CLIENT_PEC;
} else if (kind == lm99) {
name = "lm99";
} else if (kind == lm86) {
@@ -633,23 +630,39 @@
} else if (kind == adt7461) {
name = "adt7461";
}
+ strlcpy(info->type, name, I2C_NAME_SIZE);
- /* We can fill in the remaining client fields */
- strlcpy(new_client->name, name, I2C_NAME_SIZE);
- data->valid = 0;
- data->kind = kind;
+ return 0;
+}
+
+static int lm90_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct i2c_adapter *adapter = to_i2c_adapter(new_client->dev.parent);
+ struct lm90_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct lm90_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+ i2c_set_clientdata(new_client, data);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
+ /* Set the device type */
+ data->kind = id->driver_data;
+ if (data->kind == adm1032) {
+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
+ new_client->flags &= ~I2C_CLIENT_PEC;
+ }
/* Initialize the LM90 chip */
lm90_init_client(new_client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj, &lm90_group)))
- goto exit_detach;
+ goto exit_free;
if (new_client->flags & I2C_CLIENT_PEC) {
if ((err = device_create_file(&new_client->dev,
&dev_attr_pec)))
@@ -672,8 +685,6 @@
exit_remove_files:
sysfs_remove_group(&new_client->dev.kobj, &lm90_group);
device_remove_file(&new_client->dev, &dev_attr_pec);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
@@ -710,10 +721,9 @@
i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, config);
}
-static int lm90_detach_client(struct i2c_client *client)
+static int lm90_remove(struct i2c_client *client)
{
struct lm90_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &lm90_group);
@@ -722,9 +732,6 @@
device_remove_file(&client->dev,
&sensor_dev_attr_temp2_offset.dev_attr);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/lm92.c b/drivers/hwmon/lm92.c
index c31942e..b2e00c5 100644
--- a/drivers/hwmon/lm92.c
+++ b/drivers/hwmon/lm92.c
@@ -1,6 +1,6 @@
/*
* lm92 - Hardware monitoring driver
- * Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
+ * Copyright (C) 2005-2008 Jean Delvare <khali@linux-fr.org>
*
* Based on the lm90 driver, with some ideas taken from the lm_sensors
* lm92 driver as well.
@@ -96,7 +96,6 @@
/* Client data (each client gets its own) */
struct lm92_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -319,32 +318,15 @@
.attrs = lm92_attributes,
};
-/* The following function does more than just detection. If detection
- succeeds, it also registers the new chip. */
-static int lm92_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm92_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *new_client;
- struct lm92_data *data;
- int err = 0;
- char *name;
+ struct i2c_adapter *adapter = new_client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
| I2C_FUNC_SMBUS_WORD_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct lm92_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- /* Fill in enough client fields so that we can read from the chip,
- which is required for identication */
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &lm92_driver;
- new_client->flags = 0;
+ return -ENODEV;
/* A negative kind means that the driver was loaded with no force
parameter (default), so we must identify the chip. */
@@ -364,34 +346,36 @@
kind = lm92; /* No separate prefix */
}
else
- goto exit_free;
- } else
- if (kind == 0) /* Default to an LM92 if forced */
- kind = lm92;
-
- /* Give it the proper name */
- if (kind == lm92) {
- name = "lm92";
- } else { /* Supposedly cannot happen */
- dev_dbg(&new_client->dev, "Kind out of range?\n");
- goto exit_free;
+ return -ENODEV;
}
- /* Fill in the remaining client fields */
- strlcpy(new_client->name, name, I2C_NAME_SIZE);
+ strlcpy(info->type, "lm92", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int lm92_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct lm92_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct lm92_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the i2c subsystem a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/* Initialize the chipset */
lm92_init_client(new_client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj, &lm92_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&new_client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -403,32 +387,19 @@
exit_remove:
sysfs_remove_group(&new_client->dev.kobj, &lm92_group);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
return err;
}
-static int lm92_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, lm92_detect);
-}
-
-static int lm92_detach_client(struct i2c_client *client)
+static int lm92_remove(struct i2c_client *client)
{
struct lm92_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &lm92_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
@@ -438,12 +409,23 @@
* Module and driver stuff
*/
+static const struct i2c_device_id lm92_id[] = {
+ { "lm92", lm92 },
+ /* max6635 could be added here */
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lm92_id);
+
static struct i2c_driver lm92_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "lm92",
},
- .attach_adapter = lm92_attach_adapter,
- .detach_client = lm92_detach_client,
+ .probe = lm92_probe,
+ .remove = lm92_remove,
+ .id_table = lm92_id,
+ .detect = lm92_detect,
+ .address_data = &addr_data,
};
static int __init sensors_lm92_init(void)
diff --git a/drivers/hwmon/lm93.c b/drivers/hwmon/lm93.c
index 5e678f5..fc36cad 100644
--- a/drivers/hwmon/lm93.c
+++ b/drivers/hwmon/lm93.c
@@ -200,7 +200,6 @@
* Client-specific data
*/
struct lm93_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
@@ -2501,45 +2500,14 @@
"chip to signal ready!\n");
}
-static int lm93_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm93_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- struct lm93_data *data;
- struct i2c_client *client;
+ struct i2c_adapter *adapter = client->adapter;
- int err = -ENODEV, func;
- void (*update)(struct lm93_data *, struct i2c_client *);
-
- /* choose update routine based on bus capabilities */
- func = i2c_get_functionality(adapter);
- if ( ((LM93_SMBUS_FUNC_FULL & func) == LM93_SMBUS_FUNC_FULL) &&
- (!disable_block) ) {
- dev_dbg(&adapter->dev,"using SMBus block data transactions\n");
- update = lm93_update_client_full;
- } else if ((LM93_SMBUS_FUNC_MIN & func) == LM93_SMBUS_FUNC_MIN) {
- dev_dbg(&adapter->dev,"disabled SMBus block data "
- "transactions\n");
- update = lm93_update_client_min;
- } else {
- dev_dbg(&adapter->dev,"detect failed, "
- "smbus byte and/or word data not supported!\n");
- goto err_out;
- }
-
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access lm78_{read,write}_value. */
-
- if ( !(data = kzalloc(sizeof(struct lm93_data), GFP_KERNEL))) {
- dev_dbg(&adapter->dev,"out of memory!\n");
- err = -ENOMEM;
- goto err_out;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &lm93_driver;
+ if (!i2c_check_functionality(adapter, LM93_SMBUS_FUNC_MIN))
+ return -ENODEV;
/* detection */
if (kind < 0) {
@@ -2548,7 +2516,7 @@
if (mfr != 0x01) {
dev_dbg(&adapter->dev,"detect failed, "
"bad manufacturer id 0x%02x!\n", mfr);
- goto err_free;
+ return -ENODEV;
}
}
@@ -2563,31 +2531,61 @@
if (kind == 0)
dev_dbg(&adapter->dev,
"(ignored 'force' parameter)\n");
- goto err_free;
+ return -ENODEV;
}
}
- /* fill in remaining client fields */
- strlcpy(client->name, "lm93", I2C_NAME_SIZE);
+ strlcpy(info->type, "lm93", I2C_NAME_SIZE);
dev_dbg(&adapter->dev,"loading %s at %d,0x%02x\n",
client->name, i2c_adapter_id(client->adapter),
client->addr);
+ return 0;
+}
+
+static int lm93_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct lm93_data *data;
+ int err, func;
+ void (*update)(struct lm93_data *, struct i2c_client *);
+
+ /* choose update routine based on bus capabilities */
+ func = i2c_get_functionality(client->adapter);
+ if (((LM93_SMBUS_FUNC_FULL & func) == LM93_SMBUS_FUNC_FULL) &&
+ (!disable_block)) {
+ dev_dbg(&client->dev, "using SMBus block data transactions\n");
+ update = lm93_update_client_full;
+ } else if ((LM93_SMBUS_FUNC_MIN & func) == LM93_SMBUS_FUNC_MIN) {
+ dev_dbg(&client->dev, "disabled SMBus block data "
+ "transactions\n");
+ update = lm93_update_client_min;
+ } else {
+ dev_dbg(&client->dev, "detect failed, "
+ "smbus byte and/or word data not supported!\n");
+ err = -ENODEV;
+ goto err_out;
+ }
+
+ data = kzalloc(sizeof(struct lm93_data), GFP_KERNEL);
+ if (!data) {
+ dev_dbg(&client->dev, "out of memory!\n");
+ err = -ENOMEM;
+ goto err_out;
+ }
+ i2c_set_clientdata(client, data);
+
/* housekeeping */
data->valid = 0;
data->update = update;
mutex_init(&data->update_lock);
- /* tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto err_free;
-
/* initialize the chip */
lm93_init_client(client);
err = sysfs_create_group(&client->dev.kobj, &lm93_attr_grp);
if (err)
- goto err_detach;
+ goto err_free;
/* Register hwmon driver class */
data->hwmon_dev = hwmon_device_register(&client->dev);
@@ -2597,43 +2595,39 @@
err = PTR_ERR(data->hwmon_dev);
dev_err(&client->dev, "error registering hwmon device.\n");
sysfs_remove_group(&client->dev.kobj, &lm93_attr_grp);
-err_detach:
- i2c_detach_client(client);
err_free:
kfree(data);
err_out:
return err;
}
-/* This function is called when:
- * lm93_driver is inserted (when this module is loaded), for each
- available adapter
- * when a new adapter is inserted (and lm93_driver is still present) */
-static int lm93_attach_adapter(struct i2c_adapter *adapter)
-{
- return i2c_probe(adapter, &addr_data, lm93_detect);
-}
-
-static int lm93_detach_client(struct i2c_client *client)
+static int lm93_remove(struct i2c_client *client)
{
struct lm93_data *data = i2c_get_clientdata(client);
- int err = 0;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &lm93_attr_grp);
- err = i2c_detach_client(client);
- if (!err)
- kfree(data);
- return err;
+ kfree(data);
+ return 0;
}
+static const struct i2c_device_id lm93_id[] = {
+ { "lm93", lm93 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, lm93_id);
+
static struct i2c_driver lm93_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "lm93",
},
- .attach_adapter = lm93_attach_adapter,
- .detach_client = lm93_detach_client,
+ .probe = lm93_probe,
+ .remove = lm93_remove,
+ .id_table = lm93_id,
+ .detect = lm93_detect,
+ .address_data = &addr_data,
};
static int __init lm93_init(void)
diff --git a/drivers/hwmon/max1619.c b/drivers/hwmon/max1619.c
index 7e7267a..1ab1cac 100644
--- a/drivers/hwmon/max1619.c
+++ b/drivers/hwmon/max1619.c
@@ -79,23 +79,34 @@
* Functions declaration
*/
-static int max1619_attach_adapter(struct i2c_adapter *adapter);
-static int max1619_detect(struct i2c_adapter *adapter, int address,
- int kind);
+static int max1619_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int max1619_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static void max1619_init_client(struct i2c_client *client);
-static int max1619_detach_client(struct i2c_client *client);
+static int max1619_remove(struct i2c_client *client);
static struct max1619_data *max1619_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id max1619_id[] = {
+ { "max1619", max1619 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, max1619_id);
+
static struct i2c_driver max1619_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "max1619",
},
- .attach_adapter = max1619_attach_adapter,
- .detach_client = max1619_detach_client,
+ .probe = max1619_probe,
+ .remove = max1619_remove,
+ .id_table = max1619_id,
+ .detect = max1619_detect,
+ .address_data = &addr_data,
};
/*
@@ -103,7 +114,6 @@
*/
struct max1619_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -208,41 +218,15 @@
* Real code
*/
-static int max1619_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int max1619_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, max1619_detect);
-}
-
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-static int max1619_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *new_client;
- struct max1619_data *data;
- int err = 0;
- const char *name = "";
+ struct i2c_adapter *adapter = new_client->adapter;
u8 reg_config=0, reg_convrate=0, reg_status=0;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct max1619_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- /* The common I2C client data is placed right before the
- MAX1619-specific data. */
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &max1619_driver;
- new_client->flags = 0;
+ return -ENODEV;
/*
* Now we do the remaining detection. A negative kind means that
@@ -265,8 +249,8 @@
|| reg_convrate > 0x07 || (reg_status & 0x61 ) !=0x00) {
dev_dbg(&adapter->dev,
"MAX1619 detection failed at 0x%02x.\n",
- address);
- goto exit_free;
+ new_client->addr);
+ return -ENODEV;
}
}
@@ -285,28 +269,37 @@
dev_info(&adapter->dev,
"Unsupported chip (man_id=0x%02X, "
"chip_id=0x%02X).\n", man_id, chip_id);
- goto exit_free;
+ return -ENODEV;
}
}
- if (kind == max1619)
- name = "max1619";
+ strlcpy(info->type, "max1619", I2C_NAME_SIZE);
- /* We can fill in the remaining client fields */
- strlcpy(new_client->name, name, I2C_NAME_SIZE);
+ return 0;
+}
+
+static int max1619_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct max1619_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct max1619_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/* Initialize the MAX1619 chip */
max1619_init_client(new_client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&new_client->dev.kobj, &max1619_group)))
- goto exit_detach;
+ goto exit_free;
data->hwmon_dev = hwmon_device_register(&new_client->dev);
if (IS_ERR(data->hwmon_dev)) {
@@ -318,8 +311,6 @@
exit_remove_files:
sysfs_remove_group(&new_client->dev.kobj, &max1619_group);
-exit_detach:
- i2c_detach_client(new_client);
exit_free:
kfree(data);
exit:
@@ -341,17 +332,13 @@
config & 0xBF); /* run */
}
-static int max1619_detach_client(struct i2c_client *client)
+static int max1619_remove(struct i2c_client *client)
{
struct max1619_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &max1619_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
}
diff --git a/drivers/hwmon/max6650.c b/drivers/hwmon/max6650.c
index 52d528b..f27af6a 100644
--- a/drivers/hwmon/max6650.c
+++ b/drivers/hwmon/max6650.c
@@ -104,22 +104,34 @@
#define DIV_FROM_REG(reg) (1 << (reg & 7))
-static int max6650_attach_adapter(struct i2c_adapter *adapter);
-static int max6650_detect(struct i2c_adapter *adapter, int address, int kind);
+static int max6650_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int max6650_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
static int max6650_init_client(struct i2c_client *client);
-static int max6650_detach_client(struct i2c_client *client);
+static int max6650_remove(struct i2c_client *client);
static struct max6650_data *max6650_update_device(struct device *dev);
/*
* Driver data (common to all clients)
*/
+static const struct i2c_device_id max6650_id[] = {
+ { "max6650", max6650 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, max6650_id);
+
static struct i2c_driver max6650_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "max6650",
},
- .attach_adapter = max6650_attach_adapter,
- .detach_client = max6650_detach_client,
+ .probe = max6650_probe,
+ .remove = max6650_remove,
+ .id_table = max6650_id,
+ .detect = max6650_detect,
+ .address_data = &addr_data,
};
/*
@@ -128,7 +140,6 @@
struct max6650_data
{
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -437,47 +448,21 @@
* Real code
*/
-static int max6650_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int max6650_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON)) {
- dev_dbg(&adapter->dev,
- "FATAL: max6650_attach_adapter class HWMON not set\n");
- return 0;
- }
-
- return i2c_probe(adapter, &addr_data, max6650_detect);
-}
-
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-
-static int max6650_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct max6650_data *data;
- int err = -ENODEV;
+ struct i2c_adapter *adapter = client->adapter;
+ int address = client->addr;
dev_dbg(&adapter->dev, "max6650_detect called, kind = %d\n", kind);
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
dev_dbg(&adapter->dev, "max6650: I2C bus doesn't support "
"byte read mode, skipping.\n");
- return 0;
+ return -ENODEV;
}
- if (!(data = kzalloc(sizeof(struct max6650_data), GFP_KERNEL))) {
- dev_err(&adapter->dev, "max6650: out of memory.\n");
- return -ENOMEM;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &max6650_driver;
-
/*
* Now we do the remaining detection. A negative kind means that
* the driver was loaded with no force parameter (default), so we
@@ -501,28 +486,40 @@
||(i2c_smbus_read_byte_data(client, MAX6650_REG_COUNT) & 0xFC))) {
dev_dbg(&adapter->dev,
"max6650: detection failed at 0x%02x.\n", address);
- goto err_free;
+ return -ENODEV;
}
dev_info(&adapter->dev, "max6650: chip found at 0x%02x.\n", address);
- strlcpy(client->name, "max6650", I2C_NAME_SIZE);
- mutex_init(&data->update_lock);
+ strlcpy(info->type, "max6650", I2C_NAME_SIZE);
- if ((err = i2c_attach_client(client))) {
- dev_err(&adapter->dev, "max6650: failed to attach client.\n");
- goto err_free;
+ return 0;
+}
+
+static int max6650_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct max6650_data *data;
+ int err;
+
+ if (!(data = kzalloc(sizeof(struct max6650_data), GFP_KERNEL))) {
+ dev_err(&client->dev, "out of memory.\n");
+ return -ENOMEM;
}
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->update_lock);
+
/*
* Initialize the max6650 chip
*/
- if (max6650_init_client(client))
- goto err_detach;
+ err = max6650_init_client(client);
+ if (err)
+ goto err_free;
err = sysfs_create_group(&client->dev.kobj, &max6650_attr_grp);
if (err)
- goto err_detach;
+ goto err_free;
data->hwmon_dev = hwmon_device_register(&client->dev);
if (!IS_ERR(data->hwmon_dev))
@@ -531,24 +528,19 @@
err = PTR_ERR(data->hwmon_dev);
dev_err(&client->dev, "error registering hwmon device.\n");
sysfs_remove_group(&client->dev.kobj, &max6650_attr_grp);
-err_detach:
- i2c_detach_client(client);
err_free:
kfree(data);
return err;
}
-static int max6650_detach_client(struct i2c_client *client)
+static int max6650_remove(struct i2c_client *client)
{
struct max6650_data *data = i2c_get_clientdata(client);
- int err;
sysfs_remove_group(&client->dev.kobj, &max6650_attr_grp);
hwmon_device_unregister(data->hwmon_dev);
- err = i2c_detach_client(client);
- if (!err)
- kfree(data);
- return err;
+ kfree(data);
+ return 0;
}
static int max6650_init_client(struct i2c_client *client)
diff --git a/drivers/hwmon/smsc47m192.c b/drivers/hwmon/smsc47m192.c
index 3c9db65..8bb5cb5 100644
--- a/drivers/hwmon/smsc47m192.c
+++ b/drivers/hwmon/smsc47m192.c
@@ -96,7 +96,6 @@
}
struct smsc47m192_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* !=0 if following fields are valid */
@@ -114,18 +113,29 @@
u8 vrm;
};
-static int smsc47m192_attach_adapter(struct i2c_adapter *adapter);
-static int smsc47m192_detect(struct i2c_adapter *adapter, int address,
- int kind);
-static int smsc47m192_detach_client(struct i2c_client *client);
+static int smsc47m192_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int smsc47m192_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int smsc47m192_remove(struct i2c_client *client);
static struct smsc47m192_data *smsc47m192_update_device(struct device *dev);
+static const struct i2c_device_id smsc47m192_id[] = {
+ { "smsc47m192", smsc47m192 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, smsc47m192_id);
+
static struct i2c_driver smsc47m192_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "smsc47m192",
},
- .attach_adapter = smsc47m192_attach_adapter,
- .detach_client = smsc47m192_detach_client,
+ .probe = smsc47m192_probe,
+ .remove = smsc47m192_remove,
+ .id_table = smsc47m192_id,
+ .detect = smsc47m192_detect,
+ .address_data = &addr_data,
};
/* Voltages */
@@ -440,17 +450,6 @@
.attrs = smsc47m192_attributes_in4,
};
-/* This function is called when:
- * smsc47m192_driver is inserted (when this module is loaded), for each
- available adapter
- * when a new adapter is inserted (and smsc47m192_driver is still present) */
-static int smsc47m192_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, smsc47m192_detect);
-}
-
static void smsc47m192_init_client(struct i2c_client *client)
{
int i;
@@ -481,31 +480,15 @@
}
}
-/* This function is called by i2c_probe */
-static int smsc47m192_detect(struct i2c_adapter *adapter, int address,
- int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int smsc47m192_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *client;
- struct smsc47m192_data *data;
- int err = 0;
- int version, config;
+ struct i2c_adapter *adapter = client->adapter;
+ int version;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct smsc47m192_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &smsc47m192_driver;
-
- if (kind == 0)
- kind = smsc47m192;
+ return -ENODEV;
/* Detection criteria from sensors_detect script */
if (kind < 0) {
@@ -523,26 +506,39 @@
} else {
dev_dbg(&adapter->dev,
"SMSC47M192 detection failed at 0x%02x\n",
- address);
- goto exit_free;
+ client->addr);
+ return -ENODEV;
}
}
- /* Fill in the remaining client fields and put into the global list */
- strlcpy(client->name, "smsc47m192", I2C_NAME_SIZE);
+ strlcpy(info->type, "smsc47m192", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int smsc47m192_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct smsc47m192_data *data;
+ int config;
+ int err;
+
+ data = kzalloc(sizeof(struct smsc47m192_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
data->vrm = vid_which_vrm();
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
-
/* Initialize the SMSC47M192 chip */
smsc47m192_init_client(client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &smsc47m192_group)))
- goto exit_detach;
+ goto exit_free;
/* Pin 110 is either in4 (+12V) or VID4 */
config = i2c_smbus_read_byte_data(client, SMSC47M192_REG_CONFIG);
@@ -563,26 +559,20 @@
exit_remove_files:
sysfs_remove_group(&client->dev.kobj, &smsc47m192_group);
sysfs_remove_group(&client->dev.kobj, &smsc47m192_group_in4);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int smsc47m192_detach_client(struct i2c_client *client)
+static int smsc47m192_remove(struct i2c_client *client)
{
struct smsc47m192_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &smsc47m192_group);
sysfs_remove_group(&client->dev.kobj, &smsc47m192_group_in4);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
diff --git a/drivers/hwmon/thmc50.c b/drivers/hwmon/thmc50.c
index 76a3859..3b01001 100644
--- a/drivers/hwmon/thmc50.c
+++ b/drivers/hwmon/thmc50.c
@@ -60,7 +60,6 @@
/* Each client has this additional data */
struct thmc50_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
@@ -77,17 +76,31 @@
u8 alarms;
};
-static int thmc50_attach_adapter(struct i2c_adapter *adapter);
-static int thmc50_detach_client(struct i2c_client *client);
+static int thmc50_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int thmc50_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int thmc50_remove(struct i2c_client *client);
static void thmc50_init_client(struct i2c_client *client);
static struct thmc50_data *thmc50_update_device(struct device *dev);
+static const struct i2c_device_id thmc50_id[] = {
+ { "adm1022", adm1022 },
+ { "thmc50", thmc50 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, thmc50_id);
+
static struct i2c_driver thmc50_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "thmc50",
},
- .attach_adapter = thmc50_attach_adapter,
- .detach_client = thmc50_detach_client,
+ .probe = thmc50_probe,
+ .remove = thmc50_remove,
+ .id_table = thmc50_id,
+ .detect = thmc50_detect,
+ .address_data = &addr_data,
};
static ssize_t show_analog_out(struct device *dev,
@@ -250,39 +263,23 @@
.attrs = temp3_attributes,
};
-static int thmc50_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int thmc50_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
unsigned company;
unsigned revision;
unsigned config;
- struct i2c_client *client;
- struct thmc50_data *data;
- struct device *dev;
+ struct i2c_adapter *adapter = client->adapter;
int err = 0;
const char *type_name;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
pr_debug("thmc50: detect failed, "
"smbus byte data not supported!\n");
- goto exit;
+ return -ENODEV;
}
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access thmc50 registers. */
- if (!(data = kzalloc(sizeof(struct thmc50_data), GFP_KERNEL))) {
- pr_debug("thmc50: detect failed, kzalloc failed!\n");
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &thmc50_driver;
- dev = &client->dev;
-
pr_debug("thmc50: Probing for THMC50 at 0x%2X on bus %d\n",
client->addr, i2c_adapter_id(client->adapter));
@@ -307,21 +304,22 @@
}
if (err == -ENODEV) {
pr_debug("thmc50: Detection of THMC50/ADM1022 failed\n");
- goto exit_free;
+ return err;
}
- data->type = kind;
if (kind == adm1022) {
int id = i2c_adapter_id(client->adapter);
int i;
type_name = "adm1022";
- data->has_temp3 = (config >> 7) & 1; /* config MSB */
for (i = 0; i + 1 < adm1022_temp3_num; i += 2)
if (adm1022_temp3[i] == id &&
- adm1022_temp3[i + 1] == address) {
+ adm1022_temp3[i + 1] == client->addr) {
/* enable 2nd remote temp */
- data->has_temp3 = 1;
+ config |= (1 << 7);
+ i2c_smbus_write_byte_data(client,
+ THMC50_REG_CONF,
+ config);
break;
}
} else {
@@ -330,19 +328,33 @@
pr_debug("thmc50: Detected %s (version %x, revision %x)\n",
type_name, (revision >> 4) - 0xc, revision & 0xf);
- /* Fill in the remaining client fields & put it into the global list */
- strlcpy(client->name, type_name, I2C_NAME_SIZE);
- mutex_init(&data->update_lock);
+ strlcpy(info->type, type_name, I2C_NAME_SIZE);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
+ return 0;
+}
+
+static int thmc50_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct thmc50_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct thmc50_data), GFP_KERNEL);
+ if (!data) {
+ pr_debug("thmc50: detect failed, kzalloc failed!\n");
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ data->type = id->driver_data;
+ mutex_init(&data->update_lock);
thmc50_init_client(client);
/* Register sysfs hooks */
if ((err = sysfs_create_group(&client->dev.kobj, &thmc50_group)))
- goto exit_detach;
+ goto exit_free;
/* Register ADM1022 sysfs hooks */
if (data->has_temp3)
@@ -364,34 +376,21 @@
sysfs_remove_group(&client->dev.kobj, &temp3_group);
exit_remove_sysfs_thmc50:
sysfs_remove_group(&client->dev.kobj, &thmc50_group);
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int thmc50_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, thmc50_detect);
-}
-
-static int thmc50_detach_client(struct i2c_client *client)
+static int thmc50_remove(struct i2c_client *client)
{
struct thmc50_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &thmc50_group);
if (data->has_temp3)
sysfs_remove_group(&client->dev.kobj, &temp3_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
@@ -412,8 +411,8 @@
}
config = i2c_smbus_read_byte_data(client, THMC50_REG_CONF);
config |= 0x1; /* start the chip if it is in standby mode */
- if (data->has_temp3)
- config |= 0x80; /* enable 2nd remote temp */
+ if (data->type == adm1022 && (config & (1 << 7)))
+ data->has_temp3 = 1;
i2c_smbus_write_byte_data(client, THMC50_REG_CONF, config);
}
diff --git a/drivers/hwmon/w83791d.c b/drivers/hwmon/w83791d.c
index 85077c4..e4e91c9 100644
--- a/drivers/hwmon/w83791d.c
+++ b/drivers/hwmon/w83791d.c
@@ -247,7 +247,6 @@
}
struct w83791d_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
@@ -286,9 +285,11 @@
u8 vrm; /* hwmon-vid */
};
-static int w83791d_attach_adapter(struct i2c_adapter *adapter);
-static int w83791d_detect(struct i2c_adapter *adapter, int address, int kind);
-static int w83791d_detach_client(struct i2c_client *client);
+static int w83791d_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int w83791d_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int w83791d_remove(struct i2c_client *client);
static int w83791d_read(struct i2c_client *client, u8 register);
static int w83791d_write(struct i2c_client *client, u8 register, u8 value);
@@ -300,12 +301,22 @@
static void w83791d_init_client(struct i2c_client *client);
+static const struct i2c_device_id w83791d_id[] = {
+ { "w83791d", w83791d },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, w83791d_id);
+
static struct i2c_driver w83791d_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "w83791d",
},
- .attach_adapter = w83791d_attach_adapter,
- .detach_client = w83791d_detach_client,
+ .probe = w83791d_probe,
+ .remove = w83791d_remove,
+ .id_table = w83791d_id,
+ .detect = w83791d_detect,
+ .address_data = &addr_data,
};
/* following are the sysfs callback functions */
@@ -905,49 +916,12 @@
.attrs = w83791d_attributes,
};
-/* This function is called when:
- * w83791d_driver is inserted (when this module is loaded), for each
- available adapter
- * when a new adapter is inserted (and w83791d_driver is still present) */
-static int w83791d_attach_adapter(struct i2c_adapter *adapter)
+
+static int w83791d_detect_subclients(struct i2c_client *client)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, w83791d_detect);
-}
-
-
-static int w83791d_create_subclient(struct i2c_adapter *adapter,
- struct i2c_client *client, int addr,
- struct i2c_client **sub_cli)
-{
- int err;
- struct i2c_client *sub_client;
-
- (*sub_cli) = sub_client =
- kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
- if (!(sub_client)) {
- return -ENOMEM;
- }
- sub_client->addr = 0x48 + addr;
- i2c_set_clientdata(sub_client, NULL);
- sub_client->adapter = adapter;
- sub_client->driver = &w83791d_driver;
- strlcpy(sub_client->name, "w83791d subclient", I2C_NAME_SIZE);
- if ((err = i2c_attach_client(sub_client))) {
- dev_err(&client->dev, "subclient registration "
- "at address 0x%x failed\n", sub_client->addr);
- kfree(sub_client);
- return err;
- }
- return 0;
-}
-
-
-static int w83791d_detect_subclients(struct i2c_adapter *adapter, int address,
- int kind, struct i2c_client *client)
-{
+ struct i2c_adapter *adapter = client->adapter;
struct w83791d_data *data = i2c_get_clientdata(client);
+ int address = client->addr;
int i, id, err;
u8 val;
@@ -971,10 +945,7 @@
val = w83791d_read(client, W83791D_REG_I2C_SUBADDR);
if (!(val & 0x08)) {
- err = w83791d_create_subclient(adapter, client,
- val & 0x7, &data->lm75[0]);
- if (err < 0)
- goto error_sc_0;
+ data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (val & 0x7));
}
if (!(val & 0x80)) {
if ((data->lm75[0] != NULL) &&
@@ -986,10 +957,8 @@
err = -ENODEV;
goto error_sc_1;
}
- err = w83791d_create_subclient(adapter, client,
- (val >> 4) & 0x7, &data->lm75[1]);
- if (err < 0)
- goto error_sc_1;
+ data->lm75[1] = i2c_new_dummy(adapter,
+ 0x48 + ((val >> 4) & 0x7));
}
return 0;
@@ -997,53 +966,31 @@
/* Undo inits in case of errors */
error_sc_1:
- if (data->lm75[0] != NULL) {
- i2c_detach_client(data->lm75[0]);
- kfree(data->lm75[0]);
- }
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
error_sc_0:
return err;
}
-static int w83791d_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int w83791d_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *client;
- struct device *dev;
- struct w83791d_data *data;
- int i, val1, val2;
- int err = 0;
- const char *client_name = "";
+ struct i2c_adapter *adapter = client->adapter;
+ int val1, val2;
+ unsigned short address = client->addr;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
- goto error0;
+ return -ENODEV;
}
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access w83791d_{read,write}_value. */
- if (!(data = kzalloc(sizeof(struct w83791d_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto error0;
- }
-
- client = &data->client;
- dev = &client->dev;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &w83791d_driver;
- mutex_init(&data->update_lock);
-
- /* Now, we do the remaining detection. */
-
/* The w83791d may be stuck in some other bank than bank 0. This may
make reading other information impossible. Specify a force=...
parameter, and the Winbond will be reset to the right bank. */
if (kind < 0) {
if (w83791d_read(client, W83791D_REG_CONFIG) & 0x80) {
- dev_dbg(dev, "Detection failed at step 1\n");
- goto error1;
+ return -ENODEV;
}
val1 = w83791d_read(client, W83791D_REG_BANK);
val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
@@ -1052,15 +999,13 @@
/* yes it is Bank0 */
if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
((val1 & 0x80) && (val2 != 0x5c))) {
- dev_dbg(dev, "Detection failed at step 2\n");
- goto error1;
+ return -ENODEV;
}
}
/* If Winbond chip, address of chip and W83791D_REG_I2C_ADDR
should match */
if (w83791d_read(client, W83791D_REG_I2C_ADDR) != address) {
- dev_dbg(dev, "Detection failed at step 3\n");
- goto error1;
+ return -ENODEV;
}
}
@@ -1075,30 +1020,33 @@
/* get vendor ID */
val2 = w83791d_read(client, W83791D_REG_CHIPMAN);
if (val2 != 0x5c) { /* the vendor is NOT Winbond */
- dev_dbg(dev, "Detection failed at step 4\n");
- goto error1;
+ return -ENODEV;
}
val1 = w83791d_read(client, W83791D_REG_WCHIPID);
if (val1 == 0x71) {
kind = w83791d;
} else {
if (kind == 0)
- dev_warn(dev,
+ dev_warn(&adapter->dev,
"w83791d: Ignoring 'force' parameter "
"for unknown chip at adapter %d, "
"address 0x%02x\n",
i2c_adapter_id(adapter), address);
- goto error1;
+ return -ENODEV;
}
}
- if (kind == w83791d) {
- client_name = "w83791d";
- } else {
- dev_err(dev, "w83791d: Internal error: unknown kind (%d)?!?\n",
- kind);
- goto error1;
- }
+ strlcpy(info->type, "w83791d", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int w83791d_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct w83791d_data *data;
+ struct device *dev = &client->dev;
+ int i, val1, err;
#ifdef DEBUG
val1 = w83791d_read(client, W83791D_REG_DID_VID4);
@@ -1106,16 +1054,19 @@
(val1 >> 5) & 0x07, (val1 >> 1) & 0x0f, val1);
#endif
- /* Fill in the remaining client fields and put into the global list */
- strlcpy(client->name, client_name, I2C_NAME_SIZE);
+ data = kzalloc(sizeof(struct w83791d_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto error0;
+ }
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->update_lock);
+
+ err = w83791d_detect_subclients(client);
+ if (err)
goto error1;
- if ((err = w83791d_detect_subclients(adapter, address, kind, client)))
- goto error2;
-
/* Initialize the chip */
w83791d_init_client(client);
@@ -1141,43 +1092,29 @@
error4:
sysfs_remove_group(&client->dev.kobj, &w83791d_group);
error3:
- if (data->lm75[0] != NULL) {
- i2c_detach_client(data->lm75[0]);
- kfree(data->lm75[0]);
- }
- if (data->lm75[1] != NULL) {
- i2c_detach_client(data->lm75[1]);
- kfree(data->lm75[1]);
- }
-error2:
- i2c_detach_client(client);
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
+ if (data->lm75[1] != NULL)
+ i2c_unregister_device(data->lm75[1]);
error1:
kfree(data);
error0:
return err;
}
-static int w83791d_detach_client(struct i2c_client *client)
+static int w83791d_remove(struct i2c_client *client)
{
struct w83791d_data *data = i2c_get_clientdata(client);
- int err;
- /* main client */
- if (data) {
- hwmon_device_unregister(data->hwmon_dev);
- sysfs_remove_group(&client->dev.kobj, &w83791d_group);
- }
+ hwmon_device_unregister(data->hwmon_dev);
+ sysfs_remove_group(&client->dev.kobj, &w83791d_group);
- if ((err = i2c_detach_client(client)))
- return err;
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
+ if (data->lm75[1] != NULL)
+ i2c_unregister_device(data->lm75[1]);
- /* main client */
- if (data)
- kfree(data);
- /* subclient */
- else
- kfree(client);
-
+ kfree(data);
return 0;
}
diff --git a/drivers/hwmon/w83792d.c b/drivers/hwmon/w83792d.c
index 299629d..cf94c5b 100644
--- a/drivers/hwmon/w83792d.c
+++ b/drivers/hwmon/w83792d.c
@@ -267,9 +267,7 @@
}
struct w83792d_data {
- struct i2c_client client;
struct device *hwmon_dev;
- enum chips type;
struct mutex update_lock;
char valid; /* !=0 if following fields are valid */
@@ -299,9 +297,11 @@
u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
};
-static int w83792d_attach_adapter(struct i2c_adapter *adapter);
-static int w83792d_detect(struct i2c_adapter *adapter, int address, int kind);
-static int w83792d_detach_client(struct i2c_client *client);
+static int w83792d_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int w83792d_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int w83792d_remove(struct i2c_client *client);
static struct w83792d_data *w83792d_update_device(struct device *dev);
#ifdef DEBUG
@@ -310,12 +310,22 @@
static void w83792d_init_client(struct i2c_client *client);
+static const struct i2c_device_id w83792d_id[] = {
+ { "w83792d", w83792d },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, w83792d_id);
+
static struct i2c_driver w83792d_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "w83792d",
},
- .attach_adapter = w83792d_attach_adapter,
- .detach_client = w83792d_detach_client,
+ .probe = w83792d_probe,
+ .remove = w83792d_remove,
+ .id_table = w83792d_id,
+ .detect = w83792d_detect,
+ .address_data = &addr_data,
};
static inline long in_count_from_reg(int nr, struct w83792d_data *data)
@@ -864,53 +874,14 @@
return count;
}
-/* This function is called when:
- * w83792d_driver is inserted (when this module is loaded), for each
- available adapter
- * when a new adapter is inserted (and w83792d_driver is still present) */
-static int
-w83792d_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, w83792d_detect);
-}
-
static int
-w83792d_create_subclient(struct i2c_adapter *adapter,
- struct i2c_client *new_client, int addr,
- struct i2c_client **sub_cli)
-{
- int err;
- struct i2c_client *sub_client;
-
- (*sub_cli) = sub_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
- if (!(sub_client)) {
- return -ENOMEM;
- }
- sub_client->addr = 0x48 + addr;
- i2c_set_clientdata(sub_client, NULL);
- sub_client->adapter = adapter;
- sub_client->driver = &w83792d_driver;
- sub_client->flags = 0;
- strlcpy(sub_client->name, "w83792d subclient", I2C_NAME_SIZE);
- if ((err = i2c_attach_client(sub_client))) {
- dev_err(&new_client->dev, "subclient registration "
- "at address 0x%x failed\n", sub_client->addr);
- kfree(sub_client);
- return err;
- }
- return 0;
-}
-
-
-static int
-w83792d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
- struct i2c_client *new_client)
+w83792d_detect_subclients(struct i2c_client *new_client)
{
int i, id, err;
+ int address = new_client->addr;
u8 val;
+ struct i2c_adapter *adapter = new_client->adapter;
struct w83792d_data *data = i2c_get_clientdata(new_client);
id = i2c_adapter_id(adapter);
@@ -932,10 +903,7 @@
val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
if (!(val & 0x08)) {
- err = w83792d_create_subclient(adapter, new_client, val & 0x7,
- &data->lm75[0]);
- if (err < 0)
- goto ERROR_SC_0;
+ data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (val & 0x7));
}
if (!(val & 0x80)) {
if ((data->lm75[0] != NULL) &&
@@ -945,10 +913,8 @@
err = -ENODEV;
goto ERROR_SC_1;
}
- err = w83792d_create_subclient(adapter, new_client,
- (val >> 4) & 0x7, &data->lm75[1]);
- if (err < 0)
- goto ERROR_SC_1;
+ data->lm75[1] = i2c_new_dummy(adapter,
+ 0x48 + ((val >> 4) & 0x7));
}
return 0;
@@ -956,10 +922,8 @@
/* Undo inits in case of errors */
ERROR_SC_1:
- if (data->lm75[0] != NULL) {
- i2c_detach_client(data->lm75[0]);
- kfree(data->lm75[0]);
- }
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
ERROR_SC_0:
return err;
}
@@ -1294,47 +1258,25 @@
.attrs = w83792d_attributes,
};
+/* Return 0 if detection is successful, -ENODEV otherwise */
static int
-w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
+w83792d_detect(struct i2c_client *client, int kind, struct i2c_board_info *info)
{
- int i = 0, val1 = 0, val2;
- struct i2c_client *client;
- struct device *dev;
- struct w83792d_data *data;
- int err = 0;
- const char *client_name = "";
+ struct i2c_adapter *adapter = client->adapter;
+ int val1, val2;
+ unsigned short address = client->addr;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
- goto ERROR0;
+ return -ENODEV;
}
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access w83792d_{read,write}_value. */
-
- if (!(data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto ERROR0;
- }
-
- client = &data->client;
- dev = &client->dev;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &w83792d_driver;
- client->flags = 0;
-
- /* Now, we do the remaining detection. */
-
/* The w83792d may be stuck in some other bank than bank 0. This may
make reading other information impossible. Specify a force=... or
force_*=... parameter, and the Winbond will be reset to the right
bank. */
if (kind < 0) {
if (w83792d_read_value(client, W83792D_REG_CONFIG) & 0x80) {
- dev_dbg(dev, "Detection failed at step 1\n");
- goto ERROR1;
+ return -ENODEV;
}
val1 = w83792d_read_value(client, W83792D_REG_BANK);
val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
@@ -1342,16 +1284,14 @@
if (!(val1 & 0x07)) { /* is Bank0 */
if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
((val1 & 0x80) && (val2 != 0x5c))) {
- dev_dbg(dev, "Detection failed at step 2\n");
- goto ERROR1;
+ return -ENODEV;
}
}
/* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
should match */
if (w83792d_read_value(client,
W83792D_REG_I2C_ADDR) != address) {
- dev_dbg(dev, "Detection failed at step 3\n");
- goto ERROR1;
+ return -ENODEV;
}
}
@@ -1367,45 +1307,48 @@
/* get vendor ID */
val2 = w83792d_read_value(client, W83792D_REG_CHIPMAN);
if (val2 != 0x5c) { /* the vendor is NOT Winbond */
- goto ERROR1;
+ return -ENODEV;
}
val1 = w83792d_read_value(client, W83792D_REG_WCHIPID);
if (val1 == 0x7a) {
kind = w83792d;
} else {
if (kind == 0)
- dev_warn(dev,
+ dev_warn(&adapter->dev,
"w83792d: Ignoring 'force' parameter for"
" unknown chip at adapter %d, address"
" 0x%02x\n", i2c_adapter_id(adapter),
address);
- goto ERROR1;
+ return -ENODEV;
}
}
- if (kind == w83792d) {
- client_name = "w83792d";
- } else {
- dev_err(dev, "w83792d: Internal error: unknown kind (%d)?!?\n",
- kind);
- goto ERROR1;
+ strlcpy(info->type, "w83792d", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int
+w83792d_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+ struct w83792d_data *data;
+ struct device *dev = &client->dev;
+ int i, val1, err;
+
+ data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto ERROR0;
}
- /* Fill in the remaining client fields and put into the global list */
- strlcpy(client->name, client_name, I2C_NAME_SIZE);
- data->type = kind;
-
+ i2c_set_clientdata(client, data);
data->valid = 0;
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
+ err = w83792d_detect_subclients(client);
+ if (err)
goto ERROR1;
- if ((err = w83792d_detect_subclients(adapter, address,
- kind, client)))
- goto ERROR2;
-
/* Initialize the chip */
w83792d_init_client(client);
@@ -1457,16 +1400,10 @@
for (i = 0; i < ARRAY_SIZE(w83792d_group_fan); i++)
sysfs_remove_group(&dev->kobj, &w83792d_group_fan[i]);
ERROR3:
- if (data->lm75[0] != NULL) {
- i2c_detach_client(data->lm75[0]);
- kfree(data->lm75[0]);
- }
- if (data->lm75[1] != NULL) {
- i2c_detach_client(data->lm75[1]);
- kfree(data->lm75[1]);
- }
-ERROR2:
- i2c_detach_client(client);
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
+ if (data->lm75[1] != NULL)
+ i2c_unregister_device(data->lm75[1]);
ERROR1:
kfree(data);
ERROR0:
@@ -1474,30 +1411,23 @@
}
static int
-w83792d_detach_client(struct i2c_client *client)
+w83792d_remove(struct i2c_client *client)
{
struct w83792d_data *data = i2c_get_clientdata(client);
- int err, i;
+ int i;
- /* main client */
- if (data) {
- hwmon_device_unregister(data->hwmon_dev);
- sysfs_remove_group(&client->dev.kobj, &w83792d_group);
- for (i = 0; i < ARRAY_SIZE(w83792d_group_fan); i++)
- sysfs_remove_group(&client->dev.kobj,
- &w83792d_group_fan[i]);
- }
+ hwmon_device_unregister(data->hwmon_dev);
+ sysfs_remove_group(&client->dev.kobj, &w83792d_group);
+ for (i = 0; i < ARRAY_SIZE(w83792d_group_fan); i++)
+ sysfs_remove_group(&client->dev.kobj,
+ &w83792d_group_fan[i]);
- if ((err = i2c_detach_client(client)))
- return err;
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
+ if (data->lm75[1] != NULL)
+ i2c_unregister_device(data->lm75[1]);
- /* main client */
- if (data)
- kfree(data);
- /* subclient */
- else
- kfree(client);
-
+ kfree(data);
return 0;
}
diff --git a/drivers/hwmon/w83793.c b/drivers/hwmon/w83793.c
index ed3c019..0a739f1 100644
--- a/drivers/hwmon/w83793.c
+++ b/drivers/hwmon/w83793.c
@@ -179,7 +179,6 @@
}
struct w83793_data {
- struct i2c_client client;
struct i2c_client *lm75[2];
struct device *hwmon_dev;
struct mutex update_lock;
@@ -226,19 +225,31 @@
static u8 w83793_read_value(struct i2c_client *client, u16 reg);
static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
-static int w83793_attach_adapter(struct i2c_adapter *adapter);
-static int w83793_detect(struct i2c_adapter *adapter, int address, int kind);
-static int w83793_detach_client(struct i2c_client *client);
+static int w83793_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int w83793_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int w83793_remove(struct i2c_client *client);
static void w83793_init_client(struct i2c_client *client);
static void w83793_update_nonvolatile(struct device *dev);
static struct w83793_data *w83793_update_device(struct device *dev);
+static const struct i2c_device_id w83793_id[] = {
+ { "w83793", w83793 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, w83793_id);
+
static struct i2c_driver w83793_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "w83793",
},
- .attach_adapter = w83793_attach_adapter,
- .detach_client = w83793_detach_client,
+ .probe = w83793_probe,
+ .remove = w83793_remove,
+ .id_table = w83793_id,
+ .detect = w83793_detect,
+ .address_data = &addr_data,
};
static ssize_t
@@ -1053,89 +1064,51 @@
}
-static int w83793_attach_adapter(struct i2c_adapter *adapter)
-{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, w83793_detect);
-}
-
-static int w83793_detach_client(struct i2c_client *client)
+static int w83793_remove(struct i2c_client *client)
{
struct w83793_data *data = i2c_get_clientdata(client);
struct device *dev = &client->dev;
- int err, i;
+ int i;
- /* main client */
- if (data) {
- hwmon_device_unregister(data->hwmon_dev);
+ hwmon_device_unregister(data->hwmon_dev);
- for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
- device_remove_file(dev,
- &w83793_sensor_attr_2[i].dev_attr);
+ for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
+ device_remove_file(dev,
+ &w83793_sensor_attr_2[i].dev_attr);
- for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
- device_remove_file(dev, &sda_single_files[i].dev_attr);
+ for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
+ device_remove_file(dev, &sda_single_files[i].dev_attr);
- for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
- device_remove_file(dev, &w83793_vid[i].dev_attr);
- device_remove_file(dev, &dev_attr_vrm);
+ for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
+ device_remove_file(dev, &w83793_vid[i].dev_attr);
+ device_remove_file(dev, &dev_attr_vrm);
- for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
- device_remove_file(dev, &w83793_left_fan[i].dev_attr);
+ for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
+ device_remove_file(dev, &w83793_left_fan[i].dev_attr);
- for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
- device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
+ for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
+ device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
- for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
- device_remove_file(dev, &w83793_temp[i].dev_attr);
- }
+ for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
+ device_remove_file(dev, &w83793_temp[i].dev_attr);
- if ((err = i2c_detach_client(client)))
- return err;
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
+ if (data->lm75[1] != NULL)
+ i2c_unregister_device(data->lm75[1]);
- /* main client */
- if (data)
- kfree(data);
- /* subclient */
- else
- kfree(client);
+ kfree(data);
return 0;
}
static int
-w83793_create_subclient(struct i2c_adapter *adapter,
- struct i2c_client *client, int addr,
- struct i2c_client **sub_cli)
-{
- int err = 0;
- struct i2c_client *sub_client;
-
- (*sub_cli) = sub_client =
- kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
- if (!(sub_client)) {
- return -ENOMEM;
- }
- sub_client->addr = 0x48 + addr;
- i2c_set_clientdata(sub_client, NULL);
- sub_client->adapter = adapter;
- sub_client->driver = &w83793_driver;
- strlcpy(sub_client->name, "w83793 subclient", I2C_NAME_SIZE);
- if ((err = i2c_attach_client(sub_client))) {
- dev_err(&client->dev, "subclient registration "
- "at address 0x%x failed\n", sub_client->addr);
- kfree(sub_client);
- }
- return err;
-}
-
-static int
-w83793_detect_subclients(struct i2c_adapter *adapter, int address,
- int kind, struct i2c_client *client)
+w83793_detect_subclients(struct i2c_client *client)
{
int i, id, err;
+ int address = client->addr;
u8 tmp;
+ struct i2c_adapter *adapter = client->adapter;
struct w83793_data *data = i2c_get_clientdata(client);
id = i2c_adapter_id(adapter);
@@ -1158,11 +1131,7 @@
tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
if (!(tmp & 0x08)) {
- err =
- w83793_create_subclient(adapter, client, tmp & 0x7,
- &data->lm75[0]);
- if (err < 0)
- goto ERROR_SC_0;
+ data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
}
if (!(tmp & 0x80)) {
if ((data->lm75[0] != NULL)
@@ -1173,10 +1142,8 @@
err = -ENODEV;
goto ERROR_SC_1;
}
- err = w83793_create_subclient(adapter, client,
- (tmp >> 4) & 0x7, &data->lm75[1]);
- if (err < 0)
- goto ERROR_SC_1;
+ data->lm75[1] = i2c_new_dummy(adapter,
+ 0x48 + ((tmp >> 4) & 0x7));
}
return 0;
@@ -1184,69 +1151,44 @@
/* Undo inits in case of errors */
ERROR_SC_1:
- if (data->lm75[0] != NULL) {
- i2c_detach_client(data->lm75[0]);
- kfree(data->lm75[0]);
- }
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
ERROR_SC_0:
return err;
}
-static int w83793_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int w83793_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- int i;
- u8 tmp, val;
- struct i2c_client *client;
- struct device *dev;
- struct w83793_data *data;
- int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
- int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
- int files_temp = ARRAY_SIZE(w83793_temp) / 6;
- int err = 0;
+ u8 tmp, bank;
+ struct i2c_adapter *adapter = client->adapter;
+ unsigned short address = client->addr;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
- goto exit;
+ return -ENODEV;
}
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access w83793_{read,write}_value. */
+ bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
- if (!(data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- dev = &client->dev;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &w83793_driver;
-
- data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
-
- /* Now, we do the remaining detection. */
if (kind < 0) {
- tmp = data->bank & 0x80 ? 0x5c : 0xa3;
+ tmp = bank & 0x80 ? 0x5c : 0xa3;
/* Check Winbond vendor ID */
if (tmp != i2c_smbus_read_byte_data(client,
W83793_REG_VENDORID)) {
pr_debug("w83793: Detection failed at check "
"vendor id\n");
- err = -ENODEV;
- goto free_mem;
+ return -ENODEV;
}
/* If Winbond chip, address of chip and W83793_REG_I2C_ADDR
should match */
- if ((data->bank & 0x07) == 0
+ if ((bank & 0x07) == 0
&& i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
(address << 1)) {
pr_debug("w83793: Detection failed at check "
"i2c addr\n");
- err = -ENODEV;
- goto free_mem;
+ return -ENODEV;
}
}
@@ -1255,30 +1197,47 @@
Winbond. Determine the chip type now */
if (kind <= 0) {
- if (0x7b == w83793_read_value(client, W83793_REG_CHIPID)) {
+ if (0x7b == i2c_smbus_read_byte_data(client,
+ W83793_REG_CHIPID)) {
kind = w83793;
} else {
if (kind == 0)
dev_warn(&adapter->dev, "w83793: Ignoring "
"'force' parameter for unknown chip "
"at address 0x%02x\n", address);
- err = -ENODEV;
- goto free_mem;
+ return -ENODEV;
}
}
- /* Fill in the remaining client fields and put into the global list */
- strlcpy(client->name, "w83793", I2C_NAME_SIZE);
+ strlcpy(info->type, "w83793", I2C_NAME_SIZE);
+ return 0;
+}
+
+static int w83793_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct device *dev = &client->dev;
+ struct w83793_data *data;
+ int i, tmp, val, err;
+ int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
+ int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
+ int files_temp = ARRAY_SIZE(w83793_temp) / 6;
+
+ data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
+ err = w83793_detect_subclients(client);
+ if (err)
goto free_mem;
- if ((err = w83793_detect_subclients(adapter, address, kind, client)))
- goto detach_client;
-
/* Initialize the chip */
w83793_init_client(client);
@@ -1459,16 +1418,10 @@
for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
device_remove_file(dev, &w83793_temp[i].dev_attr);
- if (data->lm75[0] != NULL) {
- i2c_detach_client(data->lm75[0]);
- kfree(data->lm75[0]);
- }
- if (data->lm75[1] != NULL) {
- i2c_detach_client(data->lm75[1]);
- kfree(data->lm75[1]);
- }
-detach_client:
- i2c_detach_client(client);
+ if (data->lm75[0] != NULL)
+ i2c_unregister_device(data->lm75[0]);
+ if (data->lm75[1] != NULL)
+ i2c_unregister_device(data->lm75[1]);
free_mem:
kfree(data);
exit:
diff --git a/drivers/hwmon/w83l785ts.c b/drivers/hwmon/w83l785ts.c
index 52e268e..ea295b9 100644
--- a/drivers/hwmon/w83l785ts.c
+++ b/drivers/hwmon/w83l785ts.c
@@ -81,10 +81,11 @@
* Functions declaration
*/
-static int w83l785ts_attach_adapter(struct i2c_adapter *adapter);
-static int w83l785ts_detect(struct i2c_adapter *adapter, int address,
- int kind);
-static int w83l785ts_detach_client(struct i2c_client *client);
+static int w83l785ts_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int w83l785ts_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int w83l785ts_remove(struct i2c_client *client);
static u8 w83l785ts_read_value(struct i2c_client *client, u8 reg, u8 defval);
static struct w83l785ts_data *w83l785ts_update_device(struct device *dev);
@@ -92,12 +93,22 @@
* Driver data (common to all clients)
*/
+static const struct i2c_device_id w83l785ts_id[] = {
+ { "w83l785ts", w83l785ts },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, w83l785ts_id);
+
static struct i2c_driver w83l785ts_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "w83l785ts",
},
- .attach_adapter = w83l785ts_attach_adapter,
- .detach_client = w83l785ts_detach_client,
+ .probe = w83l785ts_probe,
+ .remove = w83l785ts_remove,
+ .id_table = w83l785ts_id,
+ .detect = w83l785ts_detect,
+ .address_data = &addr_data,
};
/*
@@ -105,7 +116,6 @@
*/
struct w83l785ts_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* zero until following fields are valid */
@@ -135,40 +145,14 @@
* Real code
*/
-static int w83l785ts_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int w83l785ts_detect(struct i2c_client *new_client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, w83l785ts_detect);
-}
-
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-static int w83l785ts_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *new_client;
- struct w83l785ts_data *data;
- int err = 0;
-
+ struct i2c_adapter *adapter = new_client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
-
- if (!(data = kzalloc(sizeof(struct w83l785ts_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- /* The common I2C client data is placed right before the
- * W83L785TS-specific data. */
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->adapter = adapter;
- new_client->driver = &w83l785ts_driver;
- new_client->flags = 0;
+ return -ENODEV;
/*
* Now we do the remaining detection. A negative kind means that
@@ -188,8 +172,8 @@
W83L785TS_REG_TYPE, 0) & 0xFC) != 0x00)) {
dev_dbg(&adapter->dev,
"W83L785TS-S detection failed at 0x%02x.\n",
- address);
- goto exit_free;
+ new_client->addr);
+ return -ENODEV;
}
}
@@ -214,22 +198,34 @@
dev_info(&adapter->dev,
"Unsupported chip (man_id=0x%04X, "
"chip_id=0x%02X).\n", man_id, chip_id);
- goto exit_free;
+ return -ENODEV;
}
}
- /* We can fill in the remaining client fields. */
- strlcpy(new_client->name, "w83l785ts", I2C_NAME_SIZE);
+ strlcpy(info->type, "w83l785ts", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int w83l785ts_probe(struct i2c_client *new_client,
+ const struct i2c_device_id *id)
+{
+ struct w83l785ts_data *data;
+ int err = 0;
+
+ data = kzalloc(sizeof(struct w83l785ts_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(new_client, data);
data->valid = 0;
mutex_init(&data->update_lock);
/* Default values in case the first read fails (unlikely). */
data->temp[1] = data->temp[0] = 0;
- /* Tell the I2C layer a new client has arrived. */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/*
* Initialize the W83L785TS chip
* Nothing yet, assume it is already started.
@@ -259,25 +255,20 @@
&sensor_dev_attr_temp1_input.dev_attr);
device_remove_file(&new_client->dev,
&sensor_dev_attr_temp1_max.dev_attr);
- i2c_detach_client(new_client);
-exit_free:
kfree(data);
exit:
return err;
}
-static int w83l785ts_detach_client(struct i2c_client *client)
+static int w83l785ts_remove(struct i2c_client *client)
{
struct w83l785ts_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
device_remove_file(&client->dev,
&sensor_dev_attr_temp1_input.dev_attr);
device_remove_file(&client->dev,
&sensor_dev_attr_temp1_max.dev_attr);
- if ((err = i2c_detach_client(client)))
- return err;
kfree(data);
return 0;
@@ -286,6 +277,18 @@
static u8 w83l785ts_read_value(struct i2c_client *client, u8 reg, u8 defval)
{
int value, i;
+ struct device *dev;
+ const char *prefix;
+
+ /* We might be called during detection, at which point the client
+ isn't yet fully initialized, so we can't use dev_dbg on it */
+ if (i2c_get_clientdata(client)) {
+ dev = &client->dev;
+ prefix = "";
+ } else {
+ dev = &client->adapter->dev;
+ prefix = "w83l785ts: ";
+ }
/* Frequent read errors have been reported on Asus boards, so we
* retry on read errors. If it still fails (unlikely), return the
@@ -293,15 +296,15 @@
for (i = 1; i <= MAX_RETRIES; i++) {
value = i2c_smbus_read_byte_data(client, reg);
if (value >= 0) {
- dev_dbg(&client->dev, "Read 0x%02x from register "
- "0x%02x.\n", value, reg);
+ dev_dbg(dev, "%sRead 0x%02x from register 0x%02x.\n",
+ prefix, value, reg);
return value;
}
- dev_dbg(&client->dev, "Read failed, will retry in %d.\n", i);
+ dev_dbg(dev, "%sRead failed, will retry in %d.\n", prefix, i);
msleep(i);
}
- dev_err(&client->dev, "Couldn't read value from register 0x%02x.\n",
+ dev_err(dev, "%sCouldn't read value from register 0x%02x.\n", prefix,
reg);
return defval;
}
diff --git a/drivers/hwmon/w83l786ng.c b/drivers/hwmon/w83l786ng.c
index 41e22dd..badca76 100644
--- a/drivers/hwmon/w83l786ng.c
+++ b/drivers/hwmon/w83l786ng.c
@@ -121,7 +121,6 @@
}
struct w83l786ng_data {
- struct i2c_client client;
struct device *hwmon_dev;
struct mutex update_lock;
char valid; /* !=0 if following fields are valid */
@@ -146,18 +145,30 @@
u8 tolerance[2];
};
-static int w83l786ng_attach_adapter(struct i2c_adapter *adapter);
-static int w83l786ng_detect(struct i2c_adapter *adapter, int address, int kind);
-static int w83l786ng_detach_client(struct i2c_client *client);
+static int w83l786ng_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int w83l786ng_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int w83l786ng_remove(struct i2c_client *client);
static void w83l786ng_init_client(struct i2c_client *client);
static struct w83l786ng_data *w83l786ng_update_device(struct device *dev);
+static const struct i2c_device_id w83l786ng_id[] = {
+ { "w83l786ng", w83l786ng },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, w83l786ng_id);
+
static struct i2c_driver w83l786ng_driver = {
+ .class = I2C_CLASS_HWMON,
.driver = {
.name = "w83l786ng",
},
- .attach_adapter = w83l786ng_attach_adapter,
- .detach_client = w83l786ng_detach_client,
+ .probe = w83l786ng_probe,
+ .remove = w83l786ng_remove,
+ .id_table = w83l786ng_id,
+ .detect = w83l786ng_detect,
+ .address_data = &addr_data,
};
static u8
@@ -575,42 +586,15 @@
};
static int
-w83l786ng_attach_adapter(struct i2c_adapter *adapter)
+w83l786ng_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & I2C_CLASS_HWMON))
- return 0;
- return i2c_probe(adapter, &addr_data, w83l786ng_detect);
-}
-
-static int
-w83l786ng_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct device *dev;
- struct w83l786ng_data *data;
- int i, err = 0;
- u8 reg_tmp;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
- goto exit;
+ return -ENODEV;
}
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet.
- But it allows us to access w83l786ng_{read,write}_value. */
-
- if (!(data = kzalloc(sizeof(struct w83l786ng_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- dev = &client->dev;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &w83l786ng_driver;
-
/*
* Now we do the remaining detection. A negative kind means that
* the driver was loaded with no force parameter (default), so we
@@ -627,8 +611,8 @@
W83L786NG_REG_CONFIG) & 0x80) != 0x00)) {
dev_dbg(&adapter->dev,
"W83L786NG detection failed at 0x%02x.\n",
- address);
- goto exit_free;
+ client->addr);
+ return -ENODEV;
}
}
@@ -651,17 +635,31 @@
dev_info(&adapter->dev,
"Unsupported chip (man_id=0x%04X, "
"chip_id=0x%02X).\n", man_id, chip_id);
- goto exit_free;
+ return -ENODEV;
}
}
- /* Fill in the remaining client fields and put into the global list */
- strlcpy(client->name, "w83l786ng", I2C_NAME_SIZE);
- mutex_init(&data->update_lock);
+ strlcpy(info->type, "w83l786ng", I2C_NAME_SIZE);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
+ return 0;
+}
+
+static int
+w83l786ng_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+ struct device *dev = &client->dev;
+ struct w83l786ng_data *data;
+ int i, err = 0;
+ u8 reg_tmp;
+
+ data = kzalloc(sizeof(struct w83l786ng_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+ mutex_init(&data->update_lock);
/* Initialize the chip */
w83l786ng_init_client(client);
@@ -693,25 +691,19 @@
exit_remove:
sysfs_remove_group(&client->dev.kobj, &w83l786ng_group);
- i2c_detach_client(client);
-exit_free:
kfree(data);
exit:
return err;
}
static int
-w83l786ng_detach_client(struct i2c_client *client)
+w83l786ng_remove(struct i2c_client *client)
{
struct w83l786ng_data *data = i2c_get_clientdata(client);
- int err;
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&client->dev.kobj, &w83l786ng_group);
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(data);
return 0;
diff --git a/drivers/i2c/busses/i2c-amd756-s4882.c b/drivers/i2c/busses/i2c-amd756-s4882.c
index 2f150e3..72872d1 100644
--- a/drivers/i2c/busses/i2c-amd756-s4882.c
+++ b/drivers/i2c/busses/i2c-amd756-s4882.c
@@ -155,6 +155,16 @@
int i, error;
union i2c_smbus_data ioconfig;
+ /* Configure the PCA9556 multiplexer */
+ ioconfig.byte = 0x00; /* All I/O to output mode */
+ error = i2c_smbus_xfer(&amd756_smbus, 0x18, 0, I2C_SMBUS_WRITE, 0x03,
+ I2C_SMBUS_BYTE_DATA, &ioconfig);
+ if (error) {
+ dev_err(&amd756_smbus.dev, "PCA9556 configuration failed\n");
+ error = -EIO;
+ goto ERROR0;
+ }
+
/* Unregister physical bus */
error = i2c_del_adapter(&amd756_smbus);
if (error) {
@@ -198,22 +208,11 @@
s4882_algo[3].smbus_xfer = amd756_access_virt3;
s4882_algo[4].smbus_xfer = amd756_access_virt4;
- /* Configure the PCA9556 multiplexer */
- ioconfig.byte = 0x00; /* All I/O to output mode */
- error = amd756_smbus.algo->smbus_xfer(&amd756_smbus, 0x18, 0,
- I2C_SMBUS_WRITE, 0x03,
- I2C_SMBUS_BYTE_DATA, &ioconfig);
- if (error) {
- dev_err(&amd756_smbus.dev, "PCA9556 configuration failed\n");
- error = -EIO;
- goto ERROR3;
- }
-
/* Register virtual adapters */
for (i = 0; i < 5; i++) {
error = i2c_add_adapter(s4882_adapter+i);
if (error) {
- dev_err(&amd756_smbus.dev,
+ printk(KERN_ERR "i2c-amd756-s4882: "
"Virtual adapter %d registration "
"failed, module not inserted\n", i);
for (i--; i >= 0; i--)
@@ -252,8 +251,8 @@
/* Restore physical bus */
if (i2c_add_adapter(&amd756_smbus))
- dev_err(&amd756_smbus.dev, "Physical bus restoration "
- "failed\n");
+ printk(KERN_ERR "i2c-amd756-s4882: "
+ "Physical bus restoration failed\n");
}
MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 10b9342..27443f0 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -17,7 +17,8 @@
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/init.h>
-#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/of_i2c.h>
#include <asm/io.h>
#include <linux/fsl_devices.h>
@@ -25,13 +26,13 @@
#include <linux/interrupt.h>
#include <linux/delay.h>
-#define MPC_I2C_ADDR 0x00
+#define DRV_NAME "mpc-i2c"
+
#define MPC_I2C_FDR 0x04
#define MPC_I2C_CR 0x08
#define MPC_I2C_SR 0x0c
#define MPC_I2C_DR 0x10
#define MPC_I2C_DFSRR 0x14
-#define MPC_I2C_REGION 0x20
#define CCR_MEN 0x80
#define CCR_MIEN 0x40
@@ -315,102 +316,117 @@
.timeout = 1,
};
-static int fsl_i2c_probe(struct platform_device *pdev)
+static int __devinit fsl_i2c_probe(struct of_device *op, const struct of_device_id *match)
{
int result = 0;
struct mpc_i2c *i2c;
- struct fsl_i2c_platform_data *pdata;
- struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-
- pdata = (struct fsl_i2c_platform_data *) pdev->dev.platform_data;
i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
if (!i2c)
return -ENOMEM;
- i2c->irq = platform_get_irq(pdev, 0);
- if (i2c->irq < 0)
- i2c->irq = NO_IRQ; /* Use polling */
+ if (of_get_property(op->node, "dfsrr", NULL))
+ i2c->flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
- i2c->flags = pdata->device_flags;
+ if (of_device_is_compatible(op->node, "fsl,mpc5200-i2c") ||
+ of_device_is_compatible(op->node, "mpc5200-i2c"))
+ i2c->flags |= FSL_I2C_DEV_CLOCK_5200;
+
init_waitqueue_head(&i2c->queue);
- i2c->base = ioremap((phys_addr_t)r->start, MPC_I2C_REGION);
-
+ i2c->base = of_iomap(op->node, 0);
if (!i2c->base) {
printk(KERN_ERR "i2c-mpc - failed to map controller\n");
result = -ENOMEM;
goto fail_map;
}
- if (i2c->irq != NO_IRQ)
- if ((result = request_irq(i2c->irq, mpc_i2c_isr,
- IRQF_SHARED, "i2c-mpc", i2c)) < 0) {
- printk(KERN_ERR
- "i2c-mpc - failed to attach interrupt\n");
- goto fail_irq;
+ i2c->irq = irq_of_parse_and_map(op->node, 0);
+ if (i2c->irq != NO_IRQ) { /* i2c->irq = NO_IRQ implies polling */
+ result = request_irq(i2c->irq, mpc_i2c_isr,
+ IRQF_SHARED, "i2c-mpc", i2c);
+ if (result < 0) {
+ printk(KERN_ERR "i2c-mpc - failed to attach interrupt\n");
+ goto fail_request;
}
-
+ }
+
mpc_i2c_setclock(i2c);
- platform_set_drvdata(pdev, i2c);
+
+ dev_set_drvdata(&op->dev, i2c);
i2c->adap = mpc_ops;
- i2c->adap.nr = pdev->id;
i2c_set_adapdata(&i2c->adap, i2c);
- i2c->adap.dev.parent = &pdev->dev;
- if ((result = i2c_add_numbered_adapter(&i2c->adap)) < 0) {
+ i2c->adap.dev.parent = &op->dev;
+
+ result = i2c_add_adapter(&i2c->adap);
+ if (result < 0) {
printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
goto fail_add;
}
+ of_register_i2c_devices(&i2c->adap, op->node);
return result;
- fail_add:
- if (i2c->irq != NO_IRQ)
- free_irq(i2c->irq, i2c);
- fail_irq:
- iounmap(i2c->base);
- fail_map:
+ fail_add:
+ dev_set_drvdata(&op->dev, NULL);
+ free_irq(i2c->irq, i2c);
+ fail_request:
+ irq_dispose_mapping(i2c->irq);
+ iounmap(i2c->base);
+ fail_map:
kfree(i2c);
return result;
};
-static int fsl_i2c_remove(struct platform_device *pdev)
+static int __devexit fsl_i2c_remove(struct of_device *op)
{
- struct mpc_i2c *i2c = platform_get_drvdata(pdev);
+ struct mpc_i2c *i2c = dev_get_drvdata(&op->dev);
i2c_del_adapter(&i2c->adap);
- platform_set_drvdata(pdev, NULL);
+ dev_set_drvdata(&op->dev, NULL);
if (i2c->irq != NO_IRQ)
free_irq(i2c->irq, i2c);
+ irq_dispose_mapping(i2c->irq);
iounmap(i2c->base);
kfree(i2c);
return 0;
};
-/* work with hotplug and coldplug */
-MODULE_ALIAS("platform:fsl-i2c");
+static const struct of_device_id mpc_i2c_of_match[] = {
+ {.compatible = "fsl-i2c",},
+ {},
+};
+MODULE_DEVICE_TABLE(of, mpc_i2c_of_match);
+
/* Structure for a device driver */
-static struct platform_driver fsl_i2c_driver = {
- .probe = fsl_i2c_probe,
- .remove = fsl_i2c_remove,
- .driver = {
- .owner = THIS_MODULE,
- .name = "fsl-i2c",
+static struct of_platform_driver mpc_i2c_driver = {
+ .match_table = mpc_i2c_of_match,
+ .probe = fsl_i2c_probe,
+ .remove = __devexit_p(fsl_i2c_remove),
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = DRV_NAME,
},
};
static int __init fsl_i2c_init(void)
{
- return platform_driver_register(&fsl_i2c_driver);
+ int rv;
+
+ rv = of_register_platform_driver(&mpc_i2c_driver);
+ if (rv)
+ printk(KERN_ERR DRV_NAME
+ " of_register_platform_driver failed (%i)\n", rv);
+ return rv;
}
static void __exit fsl_i2c_exit(void)
{
- platform_driver_unregister(&fsl_i2c_driver);
+ of_unregister_platform_driver(&mpc_i2c_driver);
}
module_init(fsl_i2c_init);
diff --git a/drivers/i2c/busses/i2c-nforce2-s4985.c b/drivers/i2c/busses/i2c-nforce2-s4985.c
index 6a8995d..d1a4cbc 100644
--- a/drivers/i2c/busses/i2c-nforce2-s4985.c
+++ b/drivers/i2c/busses/i2c-nforce2-s4985.c
@@ -150,6 +150,16 @@
int i, error;
union i2c_smbus_data ioconfig;
+ /* Configure the PCA9556 multiplexer */
+ ioconfig.byte = 0x00; /* All I/O to output mode */
+ error = i2c_smbus_xfer(nforce2_smbus, 0x18, 0, I2C_SMBUS_WRITE, 0x03,
+ I2C_SMBUS_BYTE_DATA, &ioconfig);
+ if (error) {
+ dev_err(&nforce2_smbus->dev, "PCA9556 configuration failed\n");
+ error = -EIO;
+ goto ERROR0;
+ }
+
/* Unregister physical bus */
if (!nforce2_smbus)
return -ENODEV;
@@ -191,24 +201,13 @@
s4985_algo[3].smbus_xfer = nforce2_access_virt3;
s4985_algo[4].smbus_xfer = nforce2_access_virt4;
- /* Configure the PCA9556 multiplexer */
- ioconfig.byte = 0x00; /* All I/O to output mode */
- error = nforce2_smbus->algo->smbus_xfer(nforce2_smbus, 0x18, 0,
- I2C_SMBUS_WRITE, 0x03,
- I2C_SMBUS_BYTE_DATA, &ioconfig);
- if (error) {
- dev_err(&nforce2_smbus->dev, "PCA9556 configuration failed\n");
- error = -EIO;
- goto ERROR3;
- }
-
/* Register virtual adapters */
for (i = 0; i < 5; i++) {
error = i2c_add_adapter(s4985_adapter + i);
if (error) {
- dev_err(&nforce2_smbus->dev,
- "Virtual adapter %d registration "
- "failed, module not inserted\n", i);
+ printk(KERN_ERR "i2c-nforce2-s4985: "
+ "Virtual adapter %d registration "
+ "failed, module not inserted\n", i);
for (i--; i >= 0; i--)
i2c_del_adapter(s4985_adapter + i);
goto ERROR3;
@@ -245,8 +244,8 @@
/* Restore physical bus */
if (i2c_add_adapter(nforce2_smbus))
- dev_err(&nforce2_smbus->dev, "Physical bus restoration "
- "failed\n");
+ printk(KERN_ERR "i2c-nforce2-s4985: "
+ "Physical bus restoration failed\n");
}
MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
diff --git a/drivers/i2c/chips/eeprom.c b/drivers/i2c/chips/eeprom.c
index 373ea8d..2c27193 100644
--- a/drivers/i2c/chips/eeprom.c
+++ b/drivers/i2c/chips/eeprom.c
@@ -47,7 +47,6 @@
/* Each client has this additional data */
struct eeprom_data {
- struct i2c_client client;
struct mutex update_lock;
u8 valid; /* bitfield, bit!=0 if slice is valid */
unsigned long last_updated[8]; /* In jiffies, 8 slices */
@@ -56,19 +55,6 @@
};
-static int eeprom_attach_adapter(struct i2c_adapter *adapter);
-static int eeprom_detect(struct i2c_adapter *adapter, int address, int kind);
-static int eeprom_detach_client(struct i2c_client *client);
-
-/* This is the driver that will be inserted */
-static struct i2c_driver eeprom_driver = {
- .driver = {
- .name = "eeprom",
- },
- .attach_adapter = eeprom_attach_adapter,
- .detach_client = eeprom_detach_client,
-};
-
static void eeprom_update_client(struct i2c_client *client, u8 slice)
{
struct eeprom_data *data = i2c_get_clientdata(client);
@@ -148,25 +134,17 @@
.read = eeprom_read,
};
-static int eeprom_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int eeprom_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- if (!(adapter->class & (I2C_CLASS_DDC | I2C_CLASS_SPD)))
- return 0;
- return i2c_probe(adapter, &addr_data, eeprom_detect);
-}
-
-/* This function is called by i2c_probe */
-static int eeprom_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct eeprom_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
/* EDID EEPROMs are often 24C00 EEPROMs, which answer to all
addresses 0x50-0x57, but we only care about 0x50. So decline
attaching to addresses >= 0x51 on DDC buses */
- if (!(adapter->class & I2C_CLASS_SPD) && address >= 0x51)
- goto exit;
+ if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x51)
+ return -ENODEV;
/* There are four ways we can read the EEPROM data:
(1) I2C block reads (faster, but unsupported by most adapters)
@@ -177,32 +155,33 @@
because all known adapters support one of the first two. */
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_WORD_DATA)
&& !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_I2C_BLOCK))
- goto exit;
+ return -ENODEV;
+
+ strlcpy(info->type, "eeprom", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int eeprom_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct i2c_adapter *adapter = client->adapter;
+ struct eeprom_data *data;
+ int err;
if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) {
err = -ENOMEM;
goto exit;
}
- client = &data->client;
memset(data->data, 0xff, EEPROM_SIZE);
i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &eeprom_driver;
-
- /* Fill in the remaining client fields */
- strlcpy(client->name, "eeprom", I2C_NAME_SIZE);
mutex_init(&data->update_lock);
data->nature = UNKNOWN;
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_kfree;
-
/* Detect the Vaio nature of EEPROMs.
We use the "PCG-" or "VGN-" prefix as the signature. */
- if (address == 0x57
+ if (client->addr == 0x57
&& i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
char name[4];
@@ -221,33 +200,42 @@
/* create the sysfs eeprom file */
err = sysfs_create_bin_file(&client->dev.kobj, &eeprom_attr);
if (err)
- goto exit_detach;
+ goto exit_kfree;
return 0;
-exit_detach:
- i2c_detach_client(client);
exit_kfree:
kfree(data);
exit:
return err;
}
-static int eeprom_detach_client(struct i2c_client *client)
+static int eeprom_remove(struct i2c_client *client)
{
- int err;
-
sysfs_remove_bin_file(&client->dev.kobj, &eeprom_attr);
-
- err = i2c_detach_client(client);
- if (err)
- return err;
-
kfree(i2c_get_clientdata(client));
return 0;
}
+static const struct i2c_device_id eeprom_id[] = {
+ { "eeprom", 0 },
+ { }
+};
+
+static struct i2c_driver eeprom_driver = {
+ .driver = {
+ .name = "eeprom",
+ },
+ .probe = eeprom_probe,
+ .remove = eeprom_remove,
+ .id_table = eeprom_id,
+
+ .class = I2C_CLASS_DDC | I2C_CLASS_SPD,
+ .detect = eeprom_detect,
+ .address_data = &addr_data,
+};
+
static int __init eeprom_init(void)
{
return i2c_add_driver(&eeprom_driver);
diff --git a/drivers/i2c/chips/max6875.c b/drivers/i2c/chips/max6875.c
index 5a0285d..033d9d8 100644
--- a/drivers/i2c/chips/max6875.c
+++ b/drivers/i2c/chips/max6875.c
@@ -53,7 +53,7 @@
/* Each client has this additional data */
struct max6875_data {
- struct i2c_client client;
+ struct i2c_client *fake_client;
struct mutex update_lock;
u32 valid;
@@ -61,19 +61,6 @@
unsigned long last_updated[USER_EEPROM_SLICES];
};
-static int max6875_attach_adapter(struct i2c_adapter *adapter);
-static int max6875_detect(struct i2c_adapter *adapter, int address, int kind);
-static int max6875_detach_client(struct i2c_client *client);
-
-/* This is the driver that will be inserted */
-static struct i2c_driver max6875_driver = {
- .driver = {
- .name = "max6875",
- },
- .attach_adapter = max6875_attach_adapter,
- .detach_client = max6875_detach_client,
-};
-
static void max6875_update_slice(struct i2c_client *client, int slice)
{
struct max6875_data *data = i2c_get_clientdata(client);
@@ -159,96 +146,87 @@
.read = max6875_read,
};
-static int max6875_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int max6875_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- return i2c_probe(adapter, &addr_data, max6875_detect);
-}
-
-/* This function is called by i2c_probe */
-static int max6875_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *real_client;
- struct i2c_client *fake_client;
- struct max6875_data *data;
- int err;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA
| I2C_FUNC_SMBUS_READ_BYTE))
- return 0;
+ return -ENODEV;
/* Only check even addresses */
- if (address & 1)
- return 0;
+ if (client->addr & 1)
+ return -ENODEV;
+
+ strlcpy(info->type, "max6875", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int max6875_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct max6875_data *data;
+ int err;
if (!(data = kzalloc(sizeof(struct max6875_data), GFP_KERNEL)))
return -ENOMEM;
/* A fake client is created on the odd address */
- if (!(fake_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
+ data->fake_client = i2c_new_dummy(client->adapter, client->addr + 1);
+ if (!data->fake_client) {
err = -ENOMEM;
- goto exit_kfree1;
+ goto exit_kfree;
}
/* Init real i2c_client */
- real_client = &data->client;
- i2c_set_clientdata(real_client, data);
- real_client->addr = address;
- real_client->adapter = adapter;
- real_client->driver = &max6875_driver;
- strlcpy(real_client->name, "max6875", I2C_NAME_SIZE);
+ i2c_set_clientdata(client, data);
mutex_init(&data->update_lock);
- /* Init fake client data */
- i2c_set_clientdata(fake_client, NULL);
- fake_client->addr = address | 1;
- fake_client->adapter = adapter;
- fake_client->driver = &max6875_driver;
- strlcpy(fake_client->name, "max6875 subclient", I2C_NAME_SIZE);
-
- if ((err = i2c_attach_client(real_client)) != 0)
- goto exit_kfree2;
-
- if ((err = i2c_attach_client(fake_client)) != 0)
- goto exit_detach1;
-
- err = sysfs_create_bin_file(&real_client->dev.kobj, &user_eeprom_attr);
+ err = sysfs_create_bin_file(&client->dev.kobj, &user_eeprom_attr);
if (err)
- goto exit_detach2;
+ goto exit_remove_fake;
return 0;
-exit_detach2:
- i2c_detach_client(fake_client);
-exit_detach1:
- i2c_detach_client(real_client);
-exit_kfree2:
- kfree(fake_client);
-exit_kfree1:
+exit_remove_fake:
+ i2c_unregister_device(data->fake_client);
+exit_kfree:
kfree(data);
return err;
}
-/* Will be called for both the real client and the fake client */
-static int max6875_detach_client(struct i2c_client *client)
+static int max6875_remove(struct i2c_client *client)
{
- int err;
struct max6875_data *data = i2c_get_clientdata(client);
- /* data is NULL for the fake client */
- if (data)
- sysfs_remove_bin_file(&client->dev.kobj, &user_eeprom_attr);
+ i2c_unregister_device(data->fake_client);
- err = i2c_detach_client(client);
- if (err)
- return err;
+ sysfs_remove_bin_file(&client->dev.kobj, &user_eeprom_attr);
+ kfree(data);
- if (data) /* real client */
- kfree(data);
- else /* fake client */
- kfree(client);
return 0;
}
+static const struct i2c_device_id max6875_id[] = {
+ { "max6875", 0 },
+ { }
+};
+
+static struct i2c_driver max6875_driver = {
+ .driver = {
+ .name = "max6875",
+ },
+ .probe = max6875_probe,
+ .remove = max6875_remove,
+ .id_table = max6875_id,
+
+ .detect = max6875_detect,
+ .address_data = &addr_data,
+};
+
static int __init max6875_init(void)
{
return i2c_add_driver(&max6875_driver);
diff --git a/drivers/i2c/chips/pca9539.c b/drivers/i2c/chips/pca9539.c
index 58ab7f2..270de4e 100644
--- a/drivers/i2c/chips/pca9539.c
+++ b/drivers/i2c/chips/pca9539.c
@@ -14,8 +14,8 @@
#include <linux/i2c.h>
#include <linux/hwmon-sysfs.h>
-/* Addresses to scan */
-static unsigned short normal_i2c[] = {0x74, 0x75, 0x76, 0x77, I2C_CLIENT_END};
+/* Addresses to scan: none, device is not autodetected */
+static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
/* Insmod parameters */
I2C_CLIENT_INSMOD_1(pca9539);
@@ -32,23 +32,6 @@
PCA9539_DIRECTION_1 = 7,
};
-static int pca9539_attach_adapter(struct i2c_adapter *adapter);
-static int pca9539_detect(struct i2c_adapter *adapter, int address, int kind);
-static int pca9539_detach_client(struct i2c_client *client);
-
-/* This is the driver that will be inserted */
-static struct i2c_driver pca9539_driver = {
- .driver = {
- .name = "pca9539",
- },
- .attach_adapter = pca9539_attach_adapter,
- .detach_client = pca9539_detach_client,
-};
-
-struct pca9539_data {
- struct i2c_client client;
-};
-
/* following are the sysfs callback functions */
static ssize_t pca9539_show(struct device *dev, struct device_attribute *attr,
char *buf)
@@ -105,77 +88,51 @@
.attrs = pca9539_attributes,
};
-static int pca9539_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int pca9539_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- return i2c_probe(adapter, &addr_data, pca9539_detect);
-}
-
-/* This function is called by i2c_probe */
-static int pca9539_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct pca9539_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
- goto exit;
+ return -ENODEV;
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet. */
- if (!(data = kzalloc(sizeof(struct pca9539_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &pca9539_driver;
-
- if (kind < 0) {
- /* Detection: the pca9539 only has 8 registers (0-7).
- A read of 7 should succeed, but a read of 8 should fail. */
- if ((i2c_smbus_read_byte_data(client, 7) < 0) ||
- (i2c_smbus_read_byte_data(client, 8) >= 0))
- goto exit_kfree;
- }
-
- strlcpy(client->name, "pca9539", I2C_NAME_SIZE);
-
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_kfree;
-
- /* Register sysfs hooks */
- err = sysfs_create_group(&client->dev.kobj,
- &pca9539_defattr_group);
- if (err)
- goto exit_detach;
+ strlcpy(info->type, "pca9539", I2C_NAME_SIZE);
return 0;
-
-exit_detach:
- i2c_detach_client(client);
-exit_kfree:
- kfree(data);
-exit:
- return err;
}
-static int pca9539_detach_client(struct i2c_client *client)
+static int pca9539_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
{
- int err;
+ /* Register sysfs hooks */
+ return sysfs_create_group(&client->dev.kobj,
+ &pca9539_defattr_group);
+}
+static int pca9539_remove(struct i2c_client *client)
+{
sysfs_remove_group(&client->dev.kobj, &pca9539_defattr_group);
-
- if ((err = i2c_detach_client(client)))
- return err;
-
- kfree(i2c_get_clientdata(client));
return 0;
}
+static const struct i2c_device_id pca9539_id[] = {
+ { "pca9539", 0 },
+ { }
+};
+
+static struct i2c_driver pca9539_driver = {
+ .driver = {
+ .name = "pca9539",
+ },
+ .probe = pca9539_probe,
+ .remove = pca9539_remove,
+ .id_table = pca9539_id,
+
+ .detect = pca9539_detect,
+ .address_data = &addr_data,
+};
+
static int __init pca9539_init(void)
{
return i2c_add_driver(&pca9539_driver);
diff --git a/drivers/i2c/chips/pcf8574.c b/drivers/i2c/chips/pcf8574.c
index 1b3db2b..6ec3098 100644
--- a/drivers/i2c/chips/pcf8574.c
+++ b/drivers/i2c/chips/pcf8574.c
@@ -38,37 +38,19 @@
#include <linux/slab.h>
#include <linux/i2c.h>
-/* Addresses to scan */
-static const unsigned short normal_i2c[] = {
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
- 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
- I2C_CLIENT_END
-};
+/* Addresses to scan: none, device can't be detected */
+static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
/* Insmod parameters */
I2C_CLIENT_INSMOD_2(pcf8574, pcf8574a);
/* Each client has this additional data */
struct pcf8574_data {
- struct i2c_client client;
-
int write; /* Remember last written value */
};
-static int pcf8574_attach_adapter(struct i2c_adapter *adapter);
-static int pcf8574_detect(struct i2c_adapter *adapter, int address, int kind);
-static int pcf8574_detach_client(struct i2c_client *client);
static void pcf8574_init_client(struct i2c_client *client);
-/* This is the driver that will be inserted */
-static struct i2c_driver pcf8574_driver = {
- .driver = {
- .name = "pcf8574",
- },
- .attach_adapter = pcf8574_attach_adapter,
- .detach_client = pcf8574_detach_client,
-};
-
/* following are the sysfs callback functions */
static ssize_t show_read(struct device *dev, struct device_attribute *attr, char *buf)
{
@@ -119,41 +101,22 @@
* Real code
*/
-static int pcf8574_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int pcf8574_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- return i2c_probe(adapter, &addr_data, pcf8574_detect);
-}
-
-/* This function is called by i2c_probe */
-static int pcf8574_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct pcf8574_data *data;
- int err = 0;
- const char *client_name = "";
+ struct i2c_adapter *adapter = client->adapter;
+ const char *client_name;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
- goto exit;
-
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet. */
- if (!(data = kzalloc(sizeof(struct pcf8574_data), GFP_KERNEL))) {
- err = -ENOMEM;
- goto exit;
- }
-
- client = &data->client;
- i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &pcf8574_driver;
+ return -ENODEV;
/* Now, we would do the remaining detection. But the PCF8574 is plainly
impossible to detect! Stupid chip. */
/* Determine the chip type */
if (kind <= 0) {
- if (address >= 0x38 && address <= 0x3f)
+ if (client->addr >= 0x38 && client->addr <= 0x3f)
kind = pcf8574a;
else
kind = pcf8574;
@@ -163,40 +126,43 @@
client_name = "pcf8574a";
else
client_name = "pcf8574";
+ strlcpy(info->type, client_name, I2C_NAME_SIZE);
- /* Fill in the remaining client fields and put it into the global list */
- strlcpy(client->name, client_name, I2C_NAME_SIZE);
+ return 0;
+}
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_free;
-
+static int pcf8574_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct pcf8574_data *data;
+ int err;
+
+ data = kzalloc(sizeof(struct pcf8574_data), GFP_KERNEL);
+ if (!data) {
+ err = -ENOMEM;
+ goto exit;
+ }
+
+ i2c_set_clientdata(client, data);
+
/* Initialize the PCF8574 chip */
pcf8574_init_client(client);
/* Register sysfs hooks */
err = sysfs_create_group(&client->dev.kobj, &pcf8574_attr_group);
if (err)
- goto exit_detach;
+ goto exit_free;
return 0;
- exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int pcf8574_detach_client(struct i2c_client *client)
+static int pcf8574_remove(struct i2c_client *client)
{
- int err;
-
sysfs_remove_group(&client->dev.kobj, &pcf8574_attr_group);
-
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(i2c_get_clientdata(client));
return 0;
}
@@ -208,6 +174,24 @@
data->write = -EAGAIN;
}
+static const struct i2c_device_id pcf8574_id[] = {
+ { "pcf8574", 0 },
+ { "pcf8574a", 0 },
+ { }
+};
+
+static struct i2c_driver pcf8574_driver = {
+ .driver = {
+ .name = "pcf8574",
+ },
+ .probe = pcf8574_probe,
+ .remove = pcf8574_remove,
+ .id_table = pcf8574_id,
+
+ .detect = pcf8574_detect,
+ .address_data = &addr_data,
+};
+
static int __init pcf8574_init(void)
{
return i2c_add_driver(&pcf8574_driver);
diff --git a/drivers/i2c/chips/pcf8575.c b/drivers/i2c/chips/pcf8575.c
index 3ea08ac..07fd7cb 100644
--- a/drivers/i2c/chips/pcf8575.c
+++ b/drivers/i2c/chips/pcf8575.c
@@ -32,11 +32,8 @@
#include <linux/slab.h> /* kzalloc() */
#include <linux/sysfs.h> /* sysfs_create_group() */
-/* Addresses to scan */
-static const unsigned short normal_i2c[] = {
- 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
- I2C_CLIENT_END
-};
+/* Addresses to scan: none, device can't be detected */
+static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
/* Insmod parameters */
I2C_CLIENT_INSMOD;
@@ -44,24 +41,9 @@
/* Each client has this additional data */
struct pcf8575_data {
- struct i2c_client client;
int write; /* last written value, or error code */
};
-static int pcf8575_attach_adapter(struct i2c_adapter *adapter);
-static int pcf8575_detect(struct i2c_adapter *adapter, int address, int kind);
-static int pcf8575_detach_client(struct i2c_client *client);
-
-/* This is the driver that will be inserted */
-static struct i2c_driver pcf8575_driver = {
- .driver = {
- .owner = THIS_MODULE,
- .name = "pcf8575",
- },
- .attach_adapter = pcf8575_attach_adapter,
- .detach_client = pcf8575_detach_client,
-};
-
/* following are the sysfs callback functions */
static ssize_t show_read(struct device *dev, struct device_attribute *attr,
char *buf)
@@ -126,75 +108,77 @@
* Real code
*/
-static int pcf8575_attach_adapter(struct i2c_adapter *adapter)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int pcf8575_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- return i2c_probe(adapter, &addr_data, pcf8575_detect);
-}
-
-/* This function is called by i2c_probe */
-static int pcf8575_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct i2c_client *client;
- struct pcf8575_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_I2C))
- goto exit;
+ return -ENODEV;
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet. */
+ /* This is the place to detect whether the chip at the specified
+ address really is a PCF8575 chip. However, there is no method known
+ to detect whether an I2C chip is a PCF8575 or any other I2C chip. */
+
+ strlcpy(info->type, "pcf8575", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int pcf8575_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct pcf8575_data *data;
+ int err;
+
data = kzalloc(sizeof(struct pcf8575_data), GFP_KERNEL);
if (!data) {
err = -ENOMEM;
goto exit;
}
- client = &data->client;
i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &pcf8575_driver;
- strlcpy(client->name, "pcf8575", I2C_NAME_SIZE);
data->write = -EAGAIN;
- /* This is the place to detect whether the chip at the specified
- address really is a PCF8575 chip. However, there is no method known
- to detect whether an I2C chip is a PCF8575 or any other I2C chip. */
-
- /* Tell the I2C layer a new client has arrived */
- err = i2c_attach_client(client);
- if (err)
- goto exit_free;
-
/* Register sysfs hooks */
err = sysfs_create_group(&client->dev.kobj, &pcf8575_attr_group);
if (err)
- goto exit_detach;
+ goto exit_free;
return 0;
-exit_detach:
- i2c_detach_client(client);
exit_free:
kfree(data);
exit:
return err;
}
-static int pcf8575_detach_client(struct i2c_client *client)
+static int pcf8575_remove(struct i2c_client *client)
{
- int err;
-
sysfs_remove_group(&client->dev.kobj, &pcf8575_attr_group);
-
- err = i2c_detach_client(client);
- if (err)
- return err;
-
kfree(i2c_get_clientdata(client));
return 0;
}
+static const struct i2c_device_id pcf8575_id[] = {
+ { "pcf8575", 0 },
+ { }
+};
+
+static struct i2c_driver pcf8575_driver = {
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "pcf8575",
+ },
+ .probe = pcf8575_probe,
+ .remove = pcf8575_remove,
+ .id_table = pcf8575_id,
+
+ .detect = pcf8575_detect,
+ .address_data = &addr_data,
+};
+
static int __init pcf8575_init(void)
{
return i2c_add_driver(&pcf8575_driver);
diff --git a/drivers/i2c/chips/pcf8591.c b/drivers/i2c/chips/pcf8591.c
index db73537..16ce3e1 100644
--- a/drivers/i2c/chips/pcf8591.c
+++ b/drivers/i2c/chips/pcf8591.c
@@ -72,28 +72,15 @@
#define REG_TO_SIGNED(reg) (((reg) & 0x80)?((reg) - 256):(reg))
struct pcf8591_data {
- struct i2c_client client;
struct mutex update_lock;
u8 control;
u8 aout;
};
-static int pcf8591_attach_adapter(struct i2c_adapter *adapter);
-static int pcf8591_detect(struct i2c_adapter *adapter, int address, int kind);
-static int pcf8591_detach_client(struct i2c_client *client);
static void pcf8591_init_client(struct i2c_client *client);
static int pcf8591_read_channel(struct device *dev, int channel);
-/* This is the driver that will be inserted */
-static struct i2c_driver pcf8591_driver = {
- .driver = {
- .name = "pcf8591",
- },
- .attach_adapter = pcf8591_attach_adapter,
- .detach_client = pcf8591_detach_client,
-};
-
/* following are the sysfs callback functions */
#define show_in_channel(channel) \
static ssize_t show_in##channel##_input(struct device *dev, struct device_attribute *attr, char *buf) \
@@ -180,58 +167,46 @@
/*
* Real code
*/
-static int pcf8591_attach_adapter(struct i2c_adapter *adapter)
-{
- return i2c_probe(adapter, &addr_data, pcf8591_detect);
-}
-/* This function is called by i2c_probe */
-static int pcf8591_detect(struct i2c_adapter *adapter, int address, int kind)
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int pcf8591_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- struct i2c_client *client;
- struct pcf8591_data *data;
- int err = 0;
+ struct i2c_adapter *adapter = client->adapter;
if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE
| I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
- goto exit;
+ return -ENODEV;
- /* OK. For now, we presume we have a valid client. We now create the
- client structure, even though we cannot fill it completely yet. */
+ /* Now, we would do the remaining detection. But the PCF8591 is plainly
+ impossible to detect! Stupid chip. */
+
+ strlcpy(info->type, "pcf8591", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int pcf8591_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct pcf8591_data *data;
+ int err;
+
if (!(data = kzalloc(sizeof(struct pcf8591_data), GFP_KERNEL))) {
err = -ENOMEM;
goto exit;
}
- client = &data->client;
i2c_set_clientdata(client, data);
- client->addr = address;
- client->adapter = adapter;
- client->driver = &pcf8591_driver;
-
- /* Now, we would do the remaining detection. But the PCF8591 is plainly
- impossible to detect! Stupid chip. */
-
- /* Determine the chip type - only one kind supported! */
- if (kind <= 0)
- kind = pcf8591;
-
- /* Fill in the remaining client fields and put it into the global
- list */
- strlcpy(client->name, "pcf8591", I2C_NAME_SIZE);
mutex_init(&data->update_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(client)))
- goto exit_kfree;
-
/* Initialize the PCF8591 chip */
pcf8591_init_client(client);
/* Register sysfs hooks */
err = sysfs_create_group(&client->dev.kobj, &pcf8591_attr_group);
if (err)
- goto exit_detach;
+ goto exit_kfree;
/* Register input2 if not in "two differential inputs" mode */
if (input_mode != 3) {
@@ -252,24 +227,16 @@
exit_sysfs_remove:
sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group_opt);
sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group);
-exit_detach:
- i2c_detach_client(client);
exit_kfree:
kfree(data);
exit:
return err;
}
-static int pcf8591_detach_client(struct i2c_client *client)
+static int pcf8591_remove(struct i2c_client *client)
{
- int err;
-
sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group_opt);
sysfs_remove_group(&client->dev.kobj, &pcf8591_attr_group);
-
- if ((err = i2c_detach_client(client)))
- return err;
-
kfree(i2c_get_clientdata(client));
return 0;
}
@@ -316,6 +283,25 @@
return (10 * value);
}
+static const struct i2c_device_id pcf8591_id[] = {
+ { "pcf8591", 0 },
+ { }
+};
+MODULE_DEVICE_TABLE(i2c, pcf8591_id);
+
+static struct i2c_driver pcf8591_driver = {
+ .driver = {
+ .name = "pcf8591",
+ },
+ .probe = pcf8591_probe,
+ .remove = pcf8591_remove,
+ .id_table = pcf8591_id,
+
+ .class = I2C_CLASS_HWMON, /* Nearest choice */
+ .detect = pcf8591_detect,
+ .address_data = &addr_data,
+};
+
static int __init pcf8591_init(void)
{
if (input_mode < 0 || input_mode > 3) {
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 0a79f76..7608df8 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -654,6 +654,10 @@
dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name);
+ /* Clear the device structure in case this adapter is ever going to be
+ added again */
+ memset(&adap->dev, 0, sizeof(adap->dev));
+
out_unlock:
mutex_unlock(&core_lock);
return res;
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.c b/drivers/infiniband/ulp/iser/iscsi_iser.c
index 356fac6..5a1cf25 100644
--- a/drivers/infiniband/ulp/iser/iscsi_iser.c
+++ b/drivers/infiniband/ulp/iser/iscsi_iser.c
@@ -71,6 +71,10 @@
#include "iscsi_iser.h"
+static struct scsi_host_template iscsi_iser_sht;
+static struct iscsi_transport iscsi_iser_transport;
+static struct scsi_transport_template *iscsi_iser_scsi_transport;
+
static unsigned int iscsi_max_lun = 512;
module_param_named(max_lun, iscsi_max_lun, uint, S_IRUGO);
@@ -91,7 +95,6 @@
struct iscsi_hdr *hdr, char *rx_data, int rx_data_len)
{
int rc = 0;
- uint32_t ret_itt;
int datalen;
int ahslen;
@@ -107,12 +110,7 @@
/* read AHS */
ahslen = hdr->hlength * 4;
- /* verify itt (itt encoding: age+cid+itt) */
- rc = iscsi_verify_itt(conn, hdr, &ret_itt);
-
- if (!rc)
- rc = iscsi_complete_pdu(conn, hdr, rx_data, rx_data_len);
-
+ rc = iscsi_complete_pdu(conn, hdr, rx_data, rx_data_len);
if (rc && rc != ISCSI_ERR_NO_SCSI_CMD)
goto error;
@@ -123,25 +121,33 @@
/**
- * iscsi_iser_cmd_init - Initialize iSCSI SCSI_READ or SCSI_WRITE commands
+ * iscsi_iser_task_init - Initialize task
+ * @task: iscsi task
*
- **/
+ * Initialize the task for the scsi command or mgmt command.
+ */
static int
-iscsi_iser_cmd_init(struct iscsi_cmd_task *ctask)
+iscsi_iser_task_init(struct iscsi_task *task)
{
- struct iscsi_iser_conn *iser_conn = ctask->conn->dd_data;
- struct iscsi_iser_cmd_task *iser_ctask = ctask->dd_data;
+ struct iscsi_iser_conn *iser_conn = task->conn->dd_data;
+ struct iscsi_iser_task *iser_task = task->dd_data;
- iser_ctask->command_sent = 0;
- iser_ctask->iser_conn = iser_conn;
- iser_ctask_rdma_init(iser_ctask);
+ /* mgmt task */
+ if (!task->sc) {
+ iser_task->desc.data = task->data;
+ return 0;
+ }
+
+ iser_task->command_sent = 0;
+ iser_task->iser_conn = iser_conn;
+ iser_task_rdma_init(iser_task);
return 0;
}
/**
- * iscsi_mtask_xmit - xmit management(immediate) task
+ * iscsi_iser_mtask_xmit - xmit management(immediate) task
* @conn: iscsi connection
- * @mtask: task management task
+ * @task: task management task
*
* Notes:
* The function can return -EAGAIN in which case caller must
@@ -150,20 +156,19 @@
*
**/
static int
-iscsi_iser_mtask_xmit(struct iscsi_conn *conn,
- struct iscsi_mgmt_task *mtask)
+iscsi_iser_mtask_xmit(struct iscsi_conn *conn, struct iscsi_task *task)
{
int error = 0;
- debug_scsi("mtask deq [cid %d itt 0x%x]\n", conn->id, mtask->itt);
+ debug_scsi("task deq [cid %d itt 0x%x]\n", conn->id, task->itt);
- error = iser_send_control(conn, mtask);
+ error = iser_send_control(conn, task);
- /* since iser xmits control with zero copy, mtasks can not be recycled
+ /* since iser xmits control with zero copy, tasks can not be recycled
* right after sending them.
* The recycling scheme is based on whether a response is expected
- * - if yes, the mtask is recycled at iscsi_complete_pdu
- * - if no, the mtask is recycled at iser_snd_completion
+ * - if yes, the task is recycled at iscsi_complete_pdu
+ * - if no, the task is recycled at iser_snd_completion
*/
if (error && error != -ENOBUFS)
iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED);
@@ -172,99 +177,88 @@
}
static int
-iscsi_iser_ctask_xmit_unsol_data(struct iscsi_conn *conn,
- struct iscsi_cmd_task *ctask)
+iscsi_iser_task_xmit_unsol_data(struct iscsi_conn *conn,
+ struct iscsi_task *task)
{
struct iscsi_data hdr;
int error = 0;
/* Send data-out PDUs while there's still unsolicited data to send */
- while (ctask->unsol_count > 0) {
- iscsi_prep_unsolicit_data_pdu(ctask, &hdr);
+ while (task->unsol_count > 0) {
+ iscsi_prep_unsolicit_data_pdu(task, &hdr);
debug_scsi("Sending data-out: itt 0x%x, data count %d\n",
- hdr.itt, ctask->data_count);
+ hdr.itt, task->data_count);
/* the buffer description has been passed with the command */
/* Send the command */
- error = iser_send_data_out(conn, ctask, &hdr);
+ error = iser_send_data_out(conn, task, &hdr);
if (error) {
- ctask->unsol_datasn--;
- goto iscsi_iser_ctask_xmit_unsol_data_exit;
+ task->unsol_datasn--;
+ goto iscsi_iser_task_xmit_unsol_data_exit;
}
- ctask->unsol_count -= ctask->data_count;
+ task->unsol_count -= task->data_count;
debug_scsi("Need to send %d more as data-out PDUs\n",
- ctask->unsol_count);
+ task->unsol_count);
}
-iscsi_iser_ctask_xmit_unsol_data_exit:
+iscsi_iser_task_xmit_unsol_data_exit:
return error;
}
static int
-iscsi_iser_ctask_xmit(struct iscsi_conn *conn,
- struct iscsi_cmd_task *ctask)
+iscsi_iser_task_xmit(struct iscsi_task *task)
{
- struct iscsi_iser_cmd_task *iser_ctask = ctask->dd_data;
+ struct iscsi_conn *conn = task->conn;
+ struct iscsi_iser_task *iser_task = task->dd_data;
int error = 0;
- if (ctask->sc->sc_data_direction == DMA_TO_DEVICE) {
- BUG_ON(scsi_bufflen(ctask->sc) == 0);
+ if (!task->sc)
+ return iscsi_iser_mtask_xmit(conn, task);
+
+ if (task->sc->sc_data_direction == DMA_TO_DEVICE) {
+ BUG_ON(scsi_bufflen(task->sc) == 0);
debug_scsi("cmd [itt %x total %d imm %d unsol_data %d\n",
- ctask->itt, scsi_bufflen(ctask->sc),
- ctask->imm_count, ctask->unsol_count);
+ task->itt, scsi_bufflen(task->sc),
+ task->imm_count, task->unsol_count);
}
- debug_scsi("ctask deq [cid %d itt 0x%x]\n",
- conn->id, ctask->itt);
+ debug_scsi("task deq [cid %d itt 0x%x]\n",
+ conn->id, task->itt);
/* Send the cmd PDU */
- if (!iser_ctask->command_sent) {
- error = iser_send_command(conn, ctask);
+ if (!iser_task->command_sent) {
+ error = iser_send_command(conn, task);
if (error)
- goto iscsi_iser_ctask_xmit_exit;
- iser_ctask->command_sent = 1;
+ goto iscsi_iser_task_xmit_exit;
+ iser_task->command_sent = 1;
}
/* Send unsolicited data-out PDU(s) if necessary */
- if (ctask->unsol_count)
- error = iscsi_iser_ctask_xmit_unsol_data(conn, ctask);
+ if (task->unsol_count)
+ error = iscsi_iser_task_xmit_unsol_data(conn, task);
- iscsi_iser_ctask_xmit_exit:
+ iscsi_iser_task_xmit_exit:
if (error && error != -ENOBUFS)
iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED);
return error;
}
static void
-iscsi_iser_cleanup_ctask(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask)
+iscsi_iser_cleanup_task(struct iscsi_conn *conn, struct iscsi_task *task)
{
- struct iscsi_iser_cmd_task *iser_ctask = ctask->dd_data;
+ struct iscsi_iser_task *iser_task = task->dd_data;
- if (iser_ctask->status == ISER_TASK_STATUS_STARTED) {
- iser_ctask->status = ISER_TASK_STATUS_COMPLETED;
- iser_ctask_rdma_finalize(iser_ctask);
+ /* mgmt tasks do not need special cleanup */
+ if (!task->sc)
+ return;
+
+ if (iser_task->status == ISER_TASK_STATUS_STARTED) {
+ iser_task->status = ISER_TASK_STATUS_COMPLETED;
+ iser_task_rdma_finalize(iser_task);
}
}
-static struct iser_conn *
-iscsi_iser_ib_conn_lookup(__u64 ep_handle)
-{
- struct iser_conn *ib_conn;
- struct iser_conn *uib_conn = (struct iser_conn *)(unsigned long)ep_handle;
-
- mutex_lock(&ig.connlist_mutex);
- list_for_each_entry(ib_conn, &ig.connlist, conn_list) {
- if (ib_conn == uib_conn) {
- mutex_unlock(&ig.connlist_mutex);
- return ib_conn;
- }
- }
- mutex_unlock(&ig.connlist_mutex);
- iser_err("no conn exists for eph %llx\n",(unsigned long long)ep_handle);
- return NULL;
-}
-
static struct iscsi_cls_conn *
iscsi_iser_conn_create(struct iscsi_cls_session *cls_session, uint32_t conn_idx)
{
@@ -272,7 +266,7 @@
struct iscsi_cls_conn *cls_conn;
struct iscsi_iser_conn *iser_conn;
- cls_conn = iscsi_conn_setup(cls_session, conn_idx);
+ cls_conn = iscsi_conn_setup(cls_session, sizeof(*iser_conn), conn_idx);
if (!cls_conn)
return NULL;
conn = cls_conn->dd_data;
@@ -283,21 +277,11 @@
*/
conn->max_recv_dlength = 128;
- iser_conn = kzalloc(sizeof(*iser_conn), GFP_KERNEL);
- if (!iser_conn)
- goto conn_alloc_fail;
-
- /* currently this is the only field which need to be initiated */
- rwlock_init(&iser_conn->lock);
-
+ iser_conn = conn->dd_data;
conn->dd_data = iser_conn;
iser_conn->iscsi_conn = conn;
return cls_conn;
-
-conn_alloc_fail:
- iscsi_conn_teardown(cls_conn);
- return NULL;
}
static void
@@ -305,11 +289,18 @@
{
struct iscsi_conn *conn = cls_conn->dd_data;
struct iscsi_iser_conn *iser_conn = conn->dd_data;
+ struct iser_conn *ib_conn = iser_conn->ib_conn;
iscsi_conn_teardown(cls_conn);
- if (iser_conn->ib_conn)
- iser_conn->ib_conn->iser_conn = NULL;
- kfree(iser_conn);
+ /*
+ * Userspace will normally call the stop callback and
+ * already have freed the ib_conn, but if it goofed up then
+ * we free it here.
+ */
+ if (ib_conn) {
+ ib_conn->iser_conn = NULL;
+ iser_conn_put(ib_conn);
+ }
}
static int
@@ -320,6 +311,7 @@
struct iscsi_conn *conn = cls_conn->dd_data;
struct iscsi_iser_conn *iser_conn;
struct iser_conn *ib_conn;
+ struct iscsi_endpoint *ep;
int error;
error = iscsi_conn_bind(cls_session, cls_conn, is_leading);
@@ -328,12 +320,14 @@
/* the transport ep handle comes from user space so it must be
* verified against the global ib connections list */
- ib_conn = iscsi_iser_ib_conn_lookup(transport_eph);
- if (!ib_conn) {
+ ep = iscsi_lookup_endpoint(transport_eph);
+ if (!ep) {
iser_err("can't bind eph %llx\n",
(unsigned long long)transport_eph);
return -EINVAL;
}
+ ib_conn = ep->dd_data;
+
/* binds the iSER connection retrieved from the previously
* connected ep_handle to the iSCSI layer connection. exchanges
* connection pointers */
@@ -341,12 +335,32 @@
iser_conn = conn->dd_data;
ib_conn->iser_conn = iser_conn;
iser_conn->ib_conn = ib_conn;
-
- conn->recv_lock = &iser_conn->lock;
-
+ iser_conn_get(ib_conn);
return 0;
}
+static void
+iscsi_iser_conn_stop(struct iscsi_cls_conn *cls_conn, int flag)
+{
+ struct iscsi_conn *conn = cls_conn->dd_data;
+ struct iscsi_iser_conn *iser_conn = conn->dd_data;
+ struct iser_conn *ib_conn = iser_conn->ib_conn;
+
+ /*
+ * Userspace may have goofed up and not bound the connection or
+ * might have only partially setup the connection.
+ */
+ if (ib_conn) {
+ iscsi_conn_stop(cls_conn, flag);
+ /*
+ * There is no unbind event so the stop callback
+ * must release the ref from the bind.
+ */
+ iser_conn_put(ib_conn);
+ }
+ iser_conn->ib_conn = NULL;
+}
+
static int
iscsi_iser_conn_start(struct iscsi_cls_conn *cls_conn)
{
@@ -360,55 +374,75 @@
return iscsi_conn_start(cls_conn);
}
-static struct iscsi_transport iscsi_iser_transport;
+static void iscsi_iser_session_destroy(struct iscsi_cls_session *cls_session)
+{
+ struct Scsi_Host *shost = iscsi_session_to_shost(cls_session);
+
+ iscsi_host_remove(shost);
+ iscsi_host_free(shost);
+}
static struct iscsi_cls_session *
-iscsi_iser_session_create(struct iscsi_transport *iscsit,
- struct scsi_transport_template *scsit,
- uint16_t cmds_max, uint16_t qdepth,
- uint32_t initial_cmdsn, uint32_t *hostno)
+iscsi_iser_session_create(struct iscsi_endpoint *ep,
+ uint16_t cmds_max, uint16_t qdepth,
+ uint32_t initial_cmdsn, uint32_t *hostno)
{
struct iscsi_cls_session *cls_session;
struct iscsi_session *session;
+ struct Scsi_Host *shost;
int i;
- uint32_t hn;
- struct iscsi_cmd_task *ctask;
- struct iscsi_mgmt_task *mtask;
- struct iscsi_iser_cmd_task *iser_ctask;
- struct iser_desc *desc;
+ struct iscsi_task *task;
+ struct iscsi_iser_task *iser_task;
+ struct iser_conn *ib_conn;
+
+ shost = iscsi_host_alloc(&iscsi_iser_sht, 0, ISCSI_MAX_CMD_PER_LUN);
+ if (!shost)
+ return NULL;
+ shost->transportt = iscsi_iser_scsi_transport;
+ shost->max_lun = iscsi_max_lun;
+ shost->max_id = 0;
+ shost->max_channel = 0;
+ shost->max_cmd_len = 16;
+
+ /*
+ * older userspace tools (before 2.0-870) did not pass us
+ * the leading conn's ep so this will be NULL;
+ */
+ if (ep)
+ ib_conn = ep->dd_data;
+
+ if (iscsi_host_add(shost,
+ ep ? ib_conn->device->ib_device->dma_device : NULL))
+ goto free_host;
+ *hostno = shost->host_no;
/*
* we do not support setting can_queue cmd_per_lun from userspace yet
* because we preallocate so many resources
*/
- cls_session = iscsi_session_setup(iscsit, scsit,
+ cls_session = iscsi_session_setup(&iscsi_iser_transport, shost,
ISCSI_DEF_XMIT_CMDS_MAX,
- ISCSI_MAX_CMD_PER_LUN,
- sizeof(struct iscsi_iser_cmd_task),
- sizeof(struct iser_desc),
- initial_cmdsn, &hn);
+ sizeof(struct iscsi_iser_task),
+ initial_cmdsn, 0);
if (!cls_session)
- return NULL;
+ goto remove_host;
+ session = cls_session->dd_data;
- *hostno = hn;
- session = class_to_transport_session(cls_session);
-
+ shost->can_queue = session->scsi_cmds_max;
/* libiscsi setup itts, data and pool so just set desc fields */
for (i = 0; i < session->cmds_max; i++) {
- ctask = session->cmds[i];
- iser_ctask = ctask->dd_data;
- ctask->hdr = (struct iscsi_cmd *)&iser_ctask->desc.iscsi_header;
- ctask->hdr_max = sizeof(iser_ctask->desc.iscsi_header);
+ task = session->cmds[i];
+ iser_task = task->dd_data;
+ task->hdr = (struct iscsi_cmd *)&iser_task->desc.iscsi_header;
+ task->hdr_max = sizeof(iser_task->desc.iscsi_header);
}
-
- for (i = 0; i < session->mgmtpool_max; i++) {
- mtask = session->mgmt_cmds[i];
- desc = mtask->dd_data;
- mtask->hdr = &desc->iscsi_header;
- desc->data = mtask->data;
- }
-
return cls_session;
+
+remove_host:
+ iscsi_host_remove(shost);
+free_host:
+ iscsi_host_free(shost);
+ return NULL;
}
static int
@@ -481,34 +515,37 @@
stats->custom[3].value = conn->fmr_unalign_cnt;
}
-static int
-iscsi_iser_ep_connect(struct sockaddr *dst_addr, int non_blocking,
- __u64 *ep_handle)
+static struct iscsi_endpoint *
+iscsi_iser_ep_connect(struct sockaddr *dst_addr, int non_blocking)
{
int err;
struct iser_conn *ib_conn;
+ struct iscsi_endpoint *ep;
- err = iser_conn_init(&ib_conn);
- if (err)
- goto out;
+ ep = iscsi_create_endpoint(sizeof(*ib_conn));
+ if (!ep)
+ return ERR_PTR(-ENOMEM);
- err = iser_connect(ib_conn, NULL, (struct sockaddr_in *)dst_addr, non_blocking);
- if (!err)
- *ep_handle = (__u64)(unsigned long)ib_conn;
+ ib_conn = ep->dd_data;
+ ib_conn->ep = ep;
+ iser_conn_init(ib_conn);
-out:
- return err;
+ err = iser_connect(ib_conn, NULL, (struct sockaddr_in *)dst_addr,
+ non_blocking);
+ if (err) {
+ iscsi_destroy_endpoint(ep);
+ return ERR_PTR(err);
+ }
+ return ep;
}
static int
-iscsi_iser_ep_poll(__u64 ep_handle, int timeout_ms)
+iscsi_iser_ep_poll(struct iscsi_endpoint *ep, int timeout_ms)
{
- struct iser_conn *ib_conn = iscsi_iser_ib_conn_lookup(ep_handle);
+ struct iser_conn *ib_conn;
int rc;
- if (!ib_conn)
- return -EINVAL;
-
+ ib_conn = ep->dd_data;
rc = wait_event_interruptible_timeout(ib_conn->wait,
ib_conn->state == ISER_CONN_UP,
msecs_to_jiffies(timeout_ms));
@@ -530,13 +567,21 @@
}
static void
-iscsi_iser_ep_disconnect(__u64 ep_handle)
+iscsi_iser_ep_disconnect(struct iscsi_endpoint *ep)
{
struct iser_conn *ib_conn;
- ib_conn = iscsi_iser_ib_conn_lookup(ep_handle);
- if (!ib_conn)
- return;
+ ib_conn = ep->dd_data;
+ if (ib_conn->iser_conn)
+ /*
+ * Must suspend xmit path if the ep is bound to the
+ * iscsi_conn, so we know we are not accessing the ib_conn
+ * when we free it.
+ *
+ * This may not be bound if the ep poll failed.
+ */
+ iscsi_suspend_tx(ib_conn->iser_conn->iscsi_conn);
+
iser_err("ib conn %p state %d\n",ib_conn, ib_conn->state);
iser_conn_terminate(ib_conn);
@@ -547,7 +592,6 @@
.name = "iSCSI Initiator over iSER, v." DRV_VER,
.queuecommand = iscsi_queuecommand,
.change_queue_depth = iscsi_change_queue_depth,
- .can_queue = ISCSI_DEF_XMIT_CMDS_MAX - 1,
.sg_tablesize = ISCSI_ISER_SG_TABLESIZE,
.max_sectors = 1024,
.cmd_per_lun = ISCSI_MAX_CMD_PER_LUN,
@@ -581,17 +625,14 @@
ISCSI_USERNAME | ISCSI_PASSWORD |
ISCSI_USERNAME_IN | ISCSI_PASSWORD_IN |
ISCSI_FAST_ABORT | ISCSI_ABORT_TMO |
- ISCSI_PING_TMO | ISCSI_RECV_TMO,
+ ISCSI_PING_TMO | ISCSI_RECV_TMO |
+ ISCSI_IFACE_NAME | ISCSI_INITIATOR_NAME,
.host_param_mask = ISCSI_HOST_HWADDRESS |
ISCSI_HOST_NETDEV_NAME |
ISCSI_HOST_INITIATOR_NAME,
- .host_template = &iscsi_iser_sht,
- .conndata_size = sizeof(struct iscsi_conn),
- .max_lun = ISCSI_ISER_MAX_LUN,
- .max_cmd_len = ISCSI_ISER_MAX_CMD_LEN,
/* session management */
.create_session = iscsi_iser_session_create,
- .destroy_session = iscsi_session_teardown,
+ .destroy_session = iscsi_iser_session_destroy,
/* connection management */
.create_conn = iscsi_iser_conn_create,
.bind_conn = iscsi_iser_conn_bind,
@@ -600,17 +641,16 @@
.get_conn_param = iscsi_conn_get_param,
.get_session_param = iscsi_session_get_param,
.start_conn = iscsi_iser_conn_start,
- .stop_conn = iscsi_conn_stop,
+ .stop_conn = iscsi_iser_conn_stop,
/* iscsi host params */
.get_host_param = iscsi_host_get_param,
.set_host_param = iscsi_host_set_param,
/* IO */
.send_pdu = iscsi_conn_send_pdu,
.get_stats = iscsi_iser_conn_get_stats,
- .init_cmd_task = iscsi_iser_cmd_init,
- .xmit_cmd_task = iscsi_iser_ctask_xmit,
- .xmit_mgmt_task = iscsi_iser_mtask_xmit,
- .cleanup_cmd_task = iscsi_iser_cleanup_ctask,
+ .init_task = iscsi_iser_task_init,
+ .xmit_task = iscsi_iser_task_xmit,
+ .cleanup_task = iscsi_iser_cleanup_task,
/* recovery */
.session_recovery_timedout = iscsi_session_recovery_timedout,
@@ -630,8 +670,6 @@
return -EINVAL;
}
- iscsi_iser_transport.max_lun = iscsi_max_lun;
-
memset(&ig, 0, sizeof(struct iser_global));
ig.desc_cache = kmem_cache_create("iser_descriptors",
@@ -647,7 +685,9 @@
mutex_init(&ig.connlist_mutex);
INIT_LIST_HEAD(&ig.connlist);
- if (!iscsi_register_transport(&iscsi_iser_transport)) {
+ iscsi_iser_scsi_transport = iscsi_register_transport(
+ &iscsi_iser_transport);
+ if (!iscsi_iser_scsi_transport) {
iser_err("iscsi_register_transport failed\n");
err = -EINVAL;
goto register_transport_failure;
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.h b/drivers/infiniband/ulp/iser/iscsi_iser.h
index 0e10703..81a8262 100644
--- a/drivers/infiniband/ulp/iser/iscsi_iser.h
+++ b/drivers/infiniband/ulp/iser/iscsi_iser.h
@@ -94,7 +94,6 @@
/* support upto 512KB in one RDMA */
#define ISCSI_ISER_SG_TABLESIZE (0x80000 >> SHIFT_4K)
#define ISCSI_ISER_MAX_LUN 256
-#define ISCSI_ISER_MAX_CMD_LEN 16
/* QP settings */
/* Maximal bounds on received asynchronous PDUs */
@@ -172,7 +171,8 @@
/* fwd declarations */
struct iser_device;
struct iscsi_iser_conn;
-struct iscsi_iser_cmd_task;
+struct iscsi_iser_task;
+struct iscsi_endpoint;
struct iser_mem_reg {
u32 lkey;
@@ -196,7 +196,7 @@
#define MAX_REGD_BUF_VECTOR_LEN 2
struct iser_dto {
- struct iscsi_iser_cmd_task *ctask;
+ struct iscsi_iser_task *task;
struct iser_conn *ib_conn;
int notify_enable;
@@ -240,7 +240,9 @@
struct iser_conn {
struct iscsi_iser_conn *iser_conn; /* iser conn for upcalls */
+ struct iscsi_endpoint *ep;
enum iser_ib_conn_state state; /* rdma connection state */
+ atomic_t refcount;
spinlock_t lock; /* used for state changes */
struct iser_device *device; /* device context */
struct rdma_cm_id *cma_id; /* CMA ID */
@@ -259,11 +261,9 @@
struct iscsi_iser_conn {
struct iscsi_conn *iscsi_conn;/* ptr to iscsi conn */
struct iser_conn *ib_conn; /* iSER IB conn */
-
- rwlock_t lock;
};
-struct iscsi_iser_cmd_task {
+struct iscsi_iser_task {
struct iser_desc desc;
struct iscsi_iser_conn *iser_conn;
enum iser_task_status status;
@@ -296,22 +296,26 @@
/* allocate connection resources needed for rdma functionality */
int iser_conn_set_full_featured_mode(struct iscsi_conn *conn);
-int iser_send_control(struct iscsi_conn *conn,
- struct iscsi_mgmt_task *mtask);
+int iser_send_control(struct iscsi_conn *conn,
+ struct iscsi_task *task);
-int iser_send_command(struct iscsi_conn *conn,
- struct iscsi_cmd_task *ctask);
+int iser_send_command(struct iscsi_conn *conn,
+ struct iscsi_task *task);
-int iser_send_data_out(struct iscsi_conn *conn,
- struct iscsi_cmd_task *ctask,
- struct iscsi_data *hdr);
+int iser_send_data_out(struct iscsi_conn *conn,
+ struct iscsi_task *task,
+ struct iscsi_data *hdr);
void iscsi_iser_recv(struct iscsi_conn *conn,
struct iscsi_hdr *hdr,
char *rx_data,
int rx_data_len);
-int iser_conn_init(struct iser_conn **ib_conn);
+void iser_conn_init(struct iser_conn *ib_conn);
+
+void iser_conn_get(struct iser_conn *ib_conn);
+
+void iser_conn_put(struct iser_conn *ib_conn);
void iser_conn_terminate(struct iser_conn *ib_conn);
@@ -320,9 +324,9 @@
void iser_snd_completion(struct iser_desc *desc);
-void iser_ctask_rdma_init(struct iscsi_iser_cmd_task *ctask);
+void iser_task_rdma_init(struct iscsi_iser_task *task);
-void iser_ctask_rdma_finalize(struct iscsi_iser_cmd_task *ctask);
+void iser_task_rdma_finalize(struct iscsi_iser_task *task);
void iser_dto_buffs_release(struct iser_dto *dto);
@@ -332,10 +336,10 @@
struct iser_regd_buf *regd_buf,
enum dma_data_direction direction);
-void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_cmd_task *ctask,
+void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_task *task,
enum iser_data_dir cmd_dir);
-int iser_reg_rdma_mem(struct iscsi_iser_cmd_task *ctask,
+int iser_reg_rdma_mem(struct iscsi_iser_task *task,
enum iser_data_dir cmd_dir);
int iser_connect(struct iser_conn *ib_conn,
@@ -355,10 +359,10 @@
int iser_conn_state_comp(struct iser_conn *ib_conn,
enum iser_ib_conn_state comp);
-int iser_dma_map_task_data(struct iscsi_iser_cmd_task *iser_ctask,
+int iser_dma_map_task_data(struct iscsi_iser_task *iser_task,
struct iser_data_buf *data,
enum iser_data_dir iser_dir,
enum dma_data_direction dma_dir);
-void iser_dma_unmap_task_data(struct iscsi_iser_cmd_task *iser_ctask);
+void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task);
#endif
diff --git a/drivers/infiniband/ulp/iser/iser_initiator.c b/drivers/infiniband/ulp/iser/iser_initiator.c
index 31ad498..cdd2831 100644
--- a/drivers/infiniband/ulp/iser/iser_initiator.c
+++ b/drivers/infiniband/ulp/iser/iser_initiator.c
@@ -64,46 +64,46 @@
/* Register user buffer memory and initialize passive rdma
* dto descriptor. Total data size is stored in
- * iser_ctask->data[ISER_DIR_IN].data_len
+ * iser_task->data[ISER_DIR_IN].data_len
*/
-static int iser_prepare_read_cmd(struct iscsi_cmd_task *ctask,
+static int iser_prepare_read_cmd(struct iscsi_task *task,
unsigned int edtl)
{
- struct iscsi_iser_cmd_task *iser_ctask = ctask->dd_data;
+ struct iscsi_iser_task *iser_task = task->dd_data;
struct iser_regd_buf *regd_buf;
int err;
- struct iser_hdr *hdr = &iser_ctask->desc.iser_header;
- struct iser_data_buf *buf_in = &iser_ctask->data[ISER_DIR_IN];
+ struct iser_hdr *hdr = &iser_task->desc.iser_header;
+ struct iser_data_buf *buf_in = &iser_task->data[ISER_DIR_IN];
- err = iser_dma_map_task_data(iser_ctask,
+ err = iser_dma_map_task_data(iser_task,
buf_in,
ISER_DIR_IN,
DMA_FROM_DEVICE);
if (err)
return err;
- if (edtl > iser_ctask->data[ISER_DIR_IN].data_len) {
+ if (edtl > iser_task->data[ISER_DIR_IN].data_len) {
iser_err("Total data length: %ld, less than EDTL: "
"%d, in READ cmd BHS itt: %d, conn: 0x%p\n",
- iser_ctask->data[ISER_DIR_IN].data_len, edtl,
- ctask->itt, iser_ctask->iser_conn);
+ iser_task->data[ISER_DIR_IN].data_len, edtl,
+ task->itt, iser_task->iser_conn);
return -EINVAL;
}
- err = iser_reg_rdma_mem(iser_ctask,ISER_DIR_IN);
+ err = iser_reg_rdma_mem(iser_task,ISER_DIR_IN);
if (err) {
iser_err("Failed to set up Data-IN RDMA\n");
return err;
}
- regd_buf = &iser_ctask->rdma_regd[ISER_DIR_IN];
+ regd_buf = &iser_task->rdma_regd[ISER_DIR_IN];
hdr->flags |= ISER_RSV;
hdr->read_stag = cpu_to_be32(regd_buf->reg.rkey);
hdr->read_va = cpu_to_be64(regd_buf->reg.va);
iser_dbg("Cmd itt:%d READ tags RKEY:%#.4X VA:%#llX\n",
- ctask->itt, regd_buf->reg.rkey,
+ task->itt, regd_buf->reg.rkey,
(unsigned long long)regd_buf->reg.va);
return 0;
@@ -111,43 +111,43 @@
/* Register user buffer memory and initialize passive rdma
* dto descriptor. Total data size is stored in
- * ctask->data[ISER_DIR_OUT].data_len
+ * task->data[ISER_DIR_OUT].data_len
*/
static int
-iser_prepare_write_cmd(struct iscsi_cmd_task *ctask,
+iser_prepare_write_cmd(struct iscsi_task *task,
unsigned int imm_sz,
unsigned int unsol_sz,
unsigned int edtl)
{
- struct iscsi_iser_cmd_task *iser_ctask = ctask->dd_data;
+ struct iscsi_iser_task *iser_task = task->dd_data;
struct iser_regd_buf *regd_buf;
int err;
- struct iser_dto *send_dto = &iser_ctask->desc.dto;
- struct iser_hdr *hdr = &iser_ctask->desc.iser_header;
- struct iser_data_buf *buf_out = &iser_ctask->data[ISER_DIR_OUT];
+ struct iser_dto *send_dto = &iser_task->desc.dto;
+ struct iser_hdr *hdr = &iser_task->desc.iser_header;
+ struct iser_data_buf *buf_out = &iser_task->data[ISER_DIR_OUT];
- err = iser_dma_map_task_data(iser_ctask,
+ err = iser_dma_map_task_data(iser_task,
buf_out,
ISER_DIR_OUT,
DMA_TO_DEVICE);
if (err)
return err;
- if (edtl > iser_ctask->data[ISER_DIR_OUT].data_len) {
+ if (edtl > iser_task->data[ISER_DIR_OUT].data_len) {
iser_err("Total data length: %ld, less than EDTL: %d, "
"in WRITE cmd BHS itt: %d, conn: 0x%p\n",
- iser_ctask->data[ISER_DIR_OUT].data_len,
- edtl, ctask->itt, ctask->conn);
+ iser_task->data[ISER_DIR_OUT].data_len,
+ edtl, task->itt, task->conn);
return -EINVAL;
}
- err = iser_reg_rdma_mem(iser_ctask,ISER_DIR_OUT);
+ err = iser_reg_rdma_mem(iser_task,ISER_DIR_OUT);
if (err != 0) {
iser_err("Failed to register write cmd RDMA mem\n");
return err;
}
- regd_buf = &iser_ctask->rdma_regd[ISER_DIR_OUT];
+ regd_buf = &iser_task->rdma_regd[ISER_DIR_OUT];
if (unsol_sz < edtl) {
hdr->flags |= ISER_WSV;
@@ -156,13 +156,13 @@
iser_dbg("Cmd itt:%d, WRITE tags, RKEY:%#.4X "
"VA:%#llX + unsol:%d\n",
- ctask->itt, regd_buf->reg.rkey,
+ task->itt, regd_buf->reg.rkey,
(unsigned long long)regd_buf->reg.va, unsol_sz);
}
if (imm_sz > 0) {
iser_dbg("Cmd itt:%d, WRITE, adding imm.data sz: %d\n",
- ctask->itt, imm_sz);
+ task->itt, imm_sz);
iser_dto_add_regd_buff(send_dto,
regd_buf,
0,
@@ -314,38 +314,38 @@
/**
* iser_send_command - send command PDU
*/
-int iser_send_command(struct iscsi_conn *conn,
- struct iscsi_cmd_task *ctask)
+int iser_send_command(struct iscsi_conn *conn,
+ struct iscsi_task *task)
{
struct iscsi_iser_conn *iser_conn = conn->dd_data;
- struct iscsi_iser_cmd_task *iser_ctask = ctask->dd_data;
+ struct iscsi_iser_task *iser_task = task->dd_data;
struct iser_dto *send_dto = NULL;
unsigned long edtl;
int err = 0;
struct iser_data_buf *data_buf;
- struct iscsi_cmd *hdr = ctask->hdr;
- struct scsi_cmnd *sc = ctask->sc;
+ struct iscsi_cmd *hdr = task->hdr;
+ struct scsi_cmnd *sc = task->sc;
if (!iser_conn_state_comp(iser_conn->ib_conn, ISER_CONN_UP)) {
iser_err("Failed to send, conn: 0x%p is not up\n", iser_conn->ib_conn);
return -EPERM;
}
- if (iser_check_xmit(conn, ctask))
+ if (iser_check_xmit(conn, task))
return -ENOBUFS;
edtl = ntohl(hdr->data_length);
/* build the tx desc regd header and add it to the tx desc dto */
- iser_ctask->desc.type = ISCSI_TX_SCSI_COMMAND;
- send_dto = &iser_ctask->desc.dto;
- send_dto->ctask = iser_ctask;
- iser_create_send_desc(iser_conn, &iser_ctask->desc);
+ iser_task->desc.type = ISCSI_TX_SCSI_COMMAND;
+ send_dto = &iser_task->desc.dto;
+ send_dto->task = iser_task;
+ iser_create_send_desc(iser_conn, &iser_task->desc);
if (hdr->flags & ISCSI_FLAG_CMD_READ)
- data_buf = &iser_ctask->data[ISER_DIR_IN];
+ data_buf = &iser_task->data[ISER_DIR_IN];
else
- data_buf = &iser_ctask->data[ISER_DIR_OUT];
+ data_buf = &iser_task->data[ISER_DIR_OUT];
if (scsi_sg_count(sc)) { /* using a scatter list */
data_buf->buf = scsi_sglist(sc);
@@ -355,15 +355,15 @@
data_buf->data_len = scsi_bufflen(sc);
if (hdr->flags & ISCSI_FLAG_CMD_READ) {
- err = iser_prepare_read_cmd(ctask, edtl);
+ err = iser_prepare_read_cmd(task, edtl);
if (err)
goto send_command_error;
}
if (hdr->flags & ISCSI_FLAG_CMD_WRITE) {
- err = iser_prepare_write_cmd(ctask,
- ctask->imm_count,
- ctask->imm_count +
- ctask->unsol_count,
+ err = iser_prepare_write_cmd(task,
+ task->imm_count,
+ task->imm_count +
+ task->unsol_count,
edtl);
if (err)
goto send_command_error;
@@ -378,27 +378,27 @@
goto send_command_error;
}
- iser_ctask->status = ISER_TASK_STATUS_STARTED;
+ iser_task->status = ISER_TASK_STATUS_STARTED;
- err = iser_post_send(&iser_ctask->desc);
+ err = iser_post_send(&iser_task->desc);
if (!err)
return 0;
send_command_error:
iser_dto_buffs_release(send_dto);
- iser_err("conn %p failed ctask->itt %d err %d\n",conn, ctask->itt, err);
+ iser_err("conn %p failed task->itt %d err %d\n",conn, task->itt, err);
return err;
}
/**
* iser_send_data_out - send data out PDU
*/
-int iser_send_data_out(struct iscsi_conn *conn,
- struct iscsi_cmd_task *ctask,
+int iser_send_data_out(struct iscsi_conn *conn,
+ struct iscsi_task *task,
struct iscsi_data *hdr)
{
struct iscsi_iser_conn *iser_conn = conn->dd_data;
- struct iscsi_iser_cmd_task *iser_ctask = ctask->dd_data;
+ struct iscsi_iser_task *iser_task = task->dd_data;
struct iser_desc *tx_desc = NULL;
struct iser_dto *send_dto = NULL;
unsigned long buf_offset;
@@ -411,7 +411,7 @@
return -EPERM;
}
- if (iser_check_xmit(conn, ctask))
+ if (iser_check_xmit(conn, task))
return -ENOBUFS;
itt = (__force uint32_t)hdr->itt;
@@ -432,7 +432,7 @@
/* build the tx desc regd header and add it to the tx desc dto */
send_dto = &tx_desc->dto;
- send_dto->ctask = iser_ctask;
+ send_dto->task = iser_task;
iser_create_send_desc(iser_conn, tx_desc);
iser_reg_single(iser_conn->ib_conn->device,
@@ -440,15 +440,15 @@
/* all data was registered for RDMA, we can use the lkey */
iser_dto_add_regd_buff(send_dto,
- &iser_ctask->rdma_regd[ISER_DIR_OUT],
+ &iser_task->rdma_regd[ISER_DIR_OUT],
buf_offset,
data_seg_len);
- if (buf_offset + data_seg_len > iser_ctask->data[ISER_DIR_OUT].data_len) {
+ if (buf_offset + data_seg_len > iser_task->data[ISER_DIR_OUT].data_len) {
iser_err("Offset:%ld & DSL:%ld in Data-Out "
"inconsistent with total len:%ld, itt:%d\n",
buf_offset, data_seg_len,
- iser_ctask->data[ISER_DIR_OUT].data_len, itt);
+ iser_task->data[ISER_DIR_OUT].data_len, itt);
err = -EINVAL;
goto send_data_out_error;
}
@@ -468,10 +468,11 @@
}
int iser_send_control(struct iscsi_conn *conn,
- struct iscsi_mgmt_task *mtask)
+ struct iscsi_task *task)
{
struct iscsi_iser_conn *iser_conn = conn->dd_data;
- struct iser_desc *mdesc = mtask->dd_data;
+ struct iscsi_iser_task *iser_task = task->dd_data;
+ struct iser_desc *mdesc = &iser_task->desc;
struct iser_dto *send_dto = NULL;
unsigned long data_seg_len;
int err = 0;
@@ -483,27 +484,27 @@
return -EPERM;
}
- if (iser_check_xmit(conn,mtask))
+ if (iser_check_xmit(conn, task))
return -ENOBUFS;
/* build the tx desc regd header and add it to the tx desc dto */
mdesc->type = ISCSI_TX_CONTROL;
send_dto = &mdesc->dto;
- send_dto->ctask = NULL;
+ send_dto->task = NULL;
iser_create_send_desc(iser_conn, mdesc);
device = iser_conn->ib_conn->device;
iser_reg_single(device, send_dto->regd[0], DMA_TO_DEVICE);
- data_seg_len = ntoh24(mtask->hdr->dlength);
+ data_seg_len = ntoh24(task->hdr->dlength);
if (data_seg_len > 0) {
regd_buf = &mdesc->data_regd_buf;
memset(regd_buf, 0, sizeof(struct iser_regd_buf));
regd_buf->device = device;
- regd_buf->virt_addr = mtask->data;
- regd_buf->data_size = mtask->data_count;
+ regd_buf->virt_addr = task->data;
+ regd_buf->data_size = task->data_count;
iser_reg_single(device, regd_buf,
DMA_TO_DEVICE);
iser_dto_add_regd_buff(send_dto, regd_buf,
@@ -533,15 +534,13 @@
void iser_rcv_completion(struct iser_desc *rx_desc,
unsigned long dto_xfer_len)
{
- struct iser_dto *dto = &rx_desc->dto;
+ struct iser_dto *dto = &rx_desc->dto;
struct iscsi_iser_conn *conn = dto->ib_conn->iser_conn;
- struct iscsi_session *session = conn->iscsi_conn->session;
- struct iscsi_cmd_task *ctask;
- struct iscsi_iser_cmd_task *iser_ctask;
+ struct iscsi_task *task;
+ struct iscsi_iser_task *iser_task;
struct iscsi_hdr *hdr;
char *rx_data = NULL;
int rx_data_len = 0;
- unsigned int itt;
unsigned char opcode;
hdr = &rx_desc->iscsi_header;
@@ -557,19 +556,24 @@
opcode = hdr->opcode & ISCSI_OPCODE_MASK;
if (opcode == ISCSI_OP_SCSI_CMD_RSP) {
- itt = get_itt(hdr->itt); /* mask out cid and age bits */
- if (!(itt < session->cmds_max))
- iser_err("itt can't be matched to task!!! "
- "conn %p opcode %d cmds_max %d itt %d\n",
- conn->iscsi_conn,opcode,session->cmds_max,itt);
- /* use the mapping given with the cmds array indexed by itt */
- ctask = (struct iscsi_cmd_task *)session->cmds[itt];
- iser_ctask = ctask->dd_data;
- iser_dbg("itt %d ctask %p\n",itt,ctask);
- iser_ctask->status = ISER_TASK_STATUS_COMPLETED;
- iser_ctask_rdma_finalize(iser_ctask);
- }
+ spin_lock(&conn->iscsi_conn->session->lock);
+ task = iscsi_itt_to_ctask(conn->iscsi_conn, hdr->itt);
+ if (task)
+ __iscsi_get_task(task);
+ spin_unlock(&conn->iscsi_conn->session->lock);
+ if (!task)
+ iser_err("itt can't be matched to task!!! "
+ "conn %p opcode %d itt %d\n",
+ conn->iscsi_conn, opcode, hdr->itt);
+ else {
+ iser_task = task->dd_data;
+ iser_dbg("itt %d task %p\n",hdr->itt, task);
+ iser_task->status = ISER_TASK_STATUS_COMPLETED;
+ iser_task_rdma_finalize(iser_task);
+ iscsi_put_task(task);
+ }
+ }
iser_dto_buffs_release(dto);
iscsi_iser_recv(conn->iscsi_conn, hdr, rx_data, rx_data_len);
@@ -590,7 +594,7 @@
struct iser_conn *ib_conn = dto->ib_conn;
struct iscsi_iser_conn *iser_conn = ib_conn->iser_conn;
struct iscsi_conn *conn = iser_conn->iscsi_conn;
- struct iscsi_mgmt_task *mtask;
+ struct iscsi_task *task;
int resume_tx = 0;
iser_dbg("Initiator, Data sent dto=0x%p\n", dto);
@@ -613,36 +617,31 @@
if (tx_desc->type == ISCSI_TX_CONTROL) {
/* this arithmetic is legal by libiscsi dd_data allocation */
- mtask = (void *) ((long)(void *)tx_desc -
- sizeof(struct iscsi_mgmt_task));
- if (mtask->hdr->itt == RESERVED_ITT) {
- struct iscsi_session *session = conn->session;
-
- spin_lock(&conn->session->lock);
- iscsi_free_mgmt_task(conn, mtask);
- spin_unlock(&session->lock);
- }
+ task = (void *) ((long)(void *)tx_desc -
+ sizeof(struct iscsi_task));
+ if (task->hdr->itt == RESERVED_ITT)
+ iscsi_put_task(task);
}
}
-void iser_ctask_rdma_init(struct iscsi_iser_cmd_task *iser_ctask)
+void iser_task_rdma_init(struct iscsi_iser_task *iser_task)
{
- iser_ctask->status = ISER_TASK_STATUS_INIT;
+ iser_task->status = ISER_TASK_STATUS_INIT;
- iser_ctask->dir[ISER_DIR_IN] = 0;
- iser_ctask->dir[ISER_DIR_OUT] = 0;
+ iser_task->dir[ISER_DIR_IN] = 0;
+ iser_task->dir[ISER_DIR_OUT] = 0;
- iser_ctask->data[ISER_DIR_IN].data_len = 0;
- iser_ctask->data[ISER_DIR_OUT].data_len = 0;
+ iser_task->data[ISER_DIR_IN].data_len = 0;
+ iser_task->data[ISER_DIR_OUT].data_len = 0;
- memset(&iser_ctask->rdma_regd[ISER_DIR_IN], 0,
+ memset(&iser_task->rdma_regd[ISER_DIR_IN], 0,
sizeof(struct iser_regd_buf));
- memset(&iser_ctask->rdma_regd[ISER_DIR_OUT], 0,
+ memset(&iser_task->rdma_regd[ISER_DIR_OUT], 0,
sizeof(struct iser_regd_buf));
}
-void iser_ctask_rdma_finalize(struct iscsi_iser_cmd_task *iser_ctask)
+void iser_task_rdma_finalize(struct iscsi_iser_task *iser_task)
{
int deferred;
int is_rdma_aligned = 1;
@@ -651,17 +650,17 @@
/* if we were reading, copy back to unaligned sglist,
* anyway dma_unmap and free the copy
*/
- if (iser_ctask->data_copy[ISER_DIR_IN].copy_buf != NULL) {
+ if (iser_task->data_copy[ISER_DIR_IN].copy_buf != NULL) {
is_rdma_aligned = 0;
- iser_finalize_rdma_unaligned_sg(iser_ctask, ISER_DIR_IN);
+ iser_finalize_rdma_unaligned_sg(iser_task, ISER_DIR_IN);
}
- if (iser_ctask->data_copy[ISER_DIR_OUT].copy_buf != NULL) {
+ if (iser_task->data_copy[ISER_DIR_OUT].copy_buf != NULL) {
is_rdma_aligned = 0;
- iser_finalize_rdma_unaligned_sg(iser_ctask, ISER_DIR_OUT);
+ iser_finalize_rdma_unaligned_sg(iser_task, ISER_DIR_OUT);
}
- if (iser_ctask->dir[ISER_DIR_IN]) {
- regd = &iser_ctask->rdma_regd[ISER_DIR_IN];
+ if (iser_task->dir[ISER_DIR_IN]) {
+ regd = &iser_task->rdma_regd[ISER_DIR_IN];
deferred = iser_regd_buff_release(regd);
if (deferred) {
iser_err("%d references remain for BUF-IN rdma reg\n",
@@ -669,8 +668,8 @@
}
}
- if (iser_ctask->dir[ISER_DIR_OUT]) {
- regd = &iser_ctask->rdma_regd[ISER_DIR_OUT];
+ if (iser_task->dir[ISER_DIR_OUT]) {
+ regd = &iser_task->rdma_regd[ISER_DIR_OUT];
deferred = iser_regd_buff_release(regd);
if (deferred) {
iser_err("%d references remain for BUF-OUT rdma reg\n",
@@ -680,7 +679,7 @@
/* if the data was unaligned, it was already unmapped and then copied */
if (is_rdma_aligned)
- iser_dma_unmap_task_data(iser_ctask);
+ iser_dma_unmap_task_data(iser_task);
}
void iser_dto_buffs_release(struct iser_dto *dto)
diff --git a/drivers/infiniband/ulp/iser/iser_memory.c b/drivers/infiniband/ulp/iser/iser_memory.c
index 81e49cb..b9453d0 100644
--- a/drivers/infiniband/ulp/iser/iser_memory.c
+++ b/drivers/infiniband/ulp/iser/iser_memory.c
@@ -99,13 +99,13 @@
/**
* iser_start_rdma_unaligned_sg
*/
-static int iser_start_rdma_unaligned_sg(struct iscsi_iser_cmd_task *iser_ctask,
+static int iser_start_rdma_unaligned_sg(struct iscsi_iser_task *iser_task,
enum iser_data_dir cmd_dir)
{
int dma_nents;
struct ib_device *dev;
char *mem = NULL;
- struct iser_data_buf *data = &iser_ctask->data[cmd_dir];
+ struct iser_data_buf *data = &iser_task->data[cmd_dir];
unsigned long cmd_data_len = data->data_len;
if (cmd_data_len > ISER_KMALLOC_THRESHOLD)
@@ -138,37 +138,37 @@
}
}
- sg_init_one(&iser_ctask->data_copy[cmd_dir].sg_single, mem, cmd_data_len);
- iser_ctask->data_copy[cmd_dir].buf =
- &iser_ctask->data_copy[cmd_dir].sg_single;
- iser_ctask->data_copy[cmd_dir].size = 1;
+ sg_init_one(&iser_task->data_copy[cmd_dir].sg_single, mem, cmd_data_len);
+ iser_task->data_copy[cmd_dir].buf =
+ &iser_task->data_copy[cmd_dir].sg_single;
+ iser_task->data_copy[cmd_dir].size = 1;
- iser_ctask->data_copy[cmd_dir].copy_buf = mem;
+ iser_task->data_copy[cmd_dir].copy_buf = mem;
- dev = iser_ctask->iser_conn->ib_conn->device->ib_device;
+ dev = iser_task->iser_conn->ib_conn->device->ib_device;
dma_nents = ib_dma_map_sg(dev,
- &iser_ctask->data_copy[cmd_dir].sg_single,
+ &iser_task->data_copy[cmd_dir].sg_single,
1,
(cmd_dir == ISER_DIR_OUT) ?
DMA_TO_DEVICE : DMA_FROM_DEVICE);
BUG_ON(dma_nents == 0);
- iser_ctask->data_copy[cmd_dir].dma_nents = dma_nents;
+ iser_task->data_copy[cmd_dir].dma_nents = dma_nents;
return 0;
}
/**
* iser_finalize_rdma_unaligned_sg
*/
-void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_cmd_task *iser_ctask,
+void iser_finalize_rdma_unaligned_sg(struct iscsi_iser_task *iser_task,
enum iser_data_dir cmd_dir)
{
struct ib_device *dev;
struct iser_data_buf *mem_copy;
unsigned long cmd_data_len;
- dev = iser_ctask->iser_conn->ib_conn->device->ib_device;
- mem_copy = &iser_ctask->data_copy[cmd_dir];
+ dev = iser_task->iser_conn->ib_conn->device->ib_device;
+ mem_copy = &iser_task->data_copy[cmd_dir];
ib_dma_unmap_sg(dev, &mem_copy->sg_single, 1,
(cmd_dir == ISER_DIR_OUT) ?
@@ -184,8 +184,8 @@
/* copy back read RDMA to unaligned sg */
mem = mem_copy->copy_buf;
- sgl = (struct scatterlist *)iser_ctask->data[ISER_DIR_IN].buf;
- sg_size = iser_ctask->data[ISER_DIR_IN].size;
+ sgl = (struct scatterlist *)iser_task->data[ISER_DIR_IN].buf;
+ sg_size = iser_task->data[ISER_DIR_IN].size;
p = mem;
for_each_sg(sgl, sg, sg_size, i) {
@@ -198,7 +198,7 @@
}
}
- cmd_data_len = iser_ctask->data[cmd_dir].data_len;
+ cmd_data_len = iser_task->data[cmd_dir].data_len;
if (cmd_data_len > ISER_KMALLOC_THRESHOLD)
free_pages((unsigned long)mem_copy->copy_buf,
@@ -376,15 +376,15 @@
}
}
-int iser_dma_map_task_data(struct iscsi_iser_cmd_task *iser_ctask,
- struct iser_data_buf *data,
- enum iser_data_dir iser_dir,
- enum dma_data_direction dma_dir)
+int iser_dma_map_task_data(struct iscsi_iser_task *iser_task,
+ struct iser_data_buf *data,
+ enum iser_data_dir iser_dir,
+ enum dma_data_direction dma_dir)
{
struct ib_device *dev;
- iser_ctask->dir[iser_dir] = 1;
- dev = iser_ctask->iser_conn->ib_conn->device->ib_device;
+ iser_task->dir[iser_dir] = 1;
+ dev = iser_task->iser_conn->ib_conn->device->ib_device;
data->dma_nents = ib_dma_map_sg(dev, data->buf, data->size, dma_dir);
if (data->dma_nents == 0) {
@@ -394,20 +394,20 @@
return 0;
}
-void iser_dma_unmap_task_data(struct iscsi_iser_cmd_task *iser_ctask)
+void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task)
{
struct ib_device *dev;
struct iser_data_buf *data;
- dev = iser_ctask->iser_conn->ib_conn->device->ib_device;
+ dev = iser_task->iser_conn->ib_conn->device->ib_device;
- if (iser_ctask->dir[ISER_DIR_IN]) {
- data = &iser_ctask->data[ISER_DIR_IN];
+ if (iser_task->dir[ISER_DIR_IN]) {
+ data = &iser_task->data[ISER_DIR_IN];
ib_dma_unmap_sg(dev, data->buf, data->size, DMA_FROM_DEVICE);
}
- if (iser_ctask->dir[ISER_DIR_OUT]) {
- data = &iser_ctask->data[ISER_DIR_OUT];
+ if (iser_task->dir[ISER_DIR_OUT]) {
+ data = &iser_task->data[ISER_DIR_OUT];
ib_dma_unmap_sg(dev, data->buf, data->size, DMA_TO_DEVICE);
}
}
@@ -418,21 +418,21 @@
*
* returns 0 on success, errno code on failure
*/
-int iser_reg_rdma_mem(struct iscsi_iser_cmd_task *iser_ctask,
+int iser_reg_rdma_mem(struct iscsi_iser_task *iser_task,
enum iser_data_dir cmd_dir)
{
- struct iscsi_conn *iscsi_conn = iser_ctask->iser_conn->iscsi_conn;
- struct iser_conn *ib_conn = iser_ctask->iser_conn->ib_conn;
+ struct iscsi_conn *iscsi_conn = iser_task->iser_conn->iscsi_conn;
+ struct iser_conn *ib_conn = iser_task->iser_conn->ib_conn;
struct iser_device *device = ib_conn->device;
struct ib_device *ibdev = device->ib_device;
- struct iser_data_buf *mem = &iser_ctask->data[cmd_dir];
+ struct iser_data_buf *mem = &iser_task->data[cmd_dir];
struct iser_regd_buf *regd_buf;
int aligned_len;
int err;
int i;
struct scatterlist *sg;
- regd_buf = &iser_ctask->rdma_regd[cmd_dir];
+ regd_buf = &iser_task->rdma_regd[cmd_dir];
aligned_len = iser_data_buf_aligned_len(mem, ibdev);
if (aligned_len != mem->dma_nents) {
@@ -442,13 +442,13 @@
iser_data_buf_dump(mem, ibdev);
/* unmap the command data before accessing it */
- iser_dma_unmap_task_data(iser_ctask);
+ iser_dma_unmap_task_data(iser_task);
/* allocate copy buf, if we are writing, copy the */
/* unaligned scatterlist, dma map the copy */
- if (iser_start_rdma_unaligned_sg(iser_ctask, cmd_dir) != 0)
+ if (iser_start_rdma_unaligned_sg(iser_task, cmd_dir) != 0)
return -ENOMEM;
- mem = &iser_ctask->data_copy[cmd_dir];
+ mem = &iser_task->data_copy[cmd_dir];
}
/* if there a single dma entry, FMR is not needed */
@@ -472,8 +472,9 @@
err = iser_reg_page_vec(ib_conn, ib_conn->page_vec, ®d_buf->reg);
if (err) {
iser_data_buf_dump(mem, ibdev);
- iser_err("mem->dma_nents = %d (dlength = 0x%x)\n", mem->dma_nents,
- ntoh24(iser_ctask->desc.iscsi_header.dlength));
+ iser_err("mem->dma_nents = %d (dlength = 0x%x)\n",
+ mem->dma_nents,
+ ntoh24(iser_task->desc.iscsi_header.dlength));
iser_err("page_vec: data_size = 0x%x, length = %d, offset = 0x%x\n",
ib_conn->page_vec->data_size, ib_conn->page_vec->length,
ib_conn->page_vec->offset);
diff --git a/drivers/infiniband/ulp/iser/iser_verbs.c b/drivers/infiniband/ulp/iser/iser_verbs.c
index 77cabee..3a917c1 100644
--- a/drivers/infiniband/ulp/iser/iser_verbs.c
+++ b/drivers/infiniband/ulp/iser/iser_verbs.c
@@ -323,7 +323,18 @@
iser_device_try_release(device);
if (ib_conn->iser_conn)
ib_conn->iser_conn->ib_conn = NULL;
- kfree(ib_conn);
+ iscsi_destroy_endpoint(ib_conn->ep);
+}
+
+void iser_conn_get(struct iser_conn *ib_conn)
+{
+ atomic_inc(&ib_conn->refcount);
+}
+
+void iser_conn_put(struct iser_conn *ib_conn)
+{
+ if (atomic_dec_and_test(&ib_conn->refcount))
+ iser_conn_release(ib_conn);
}
/**
@@ -347,7 +358,7 @@
wait_event_interruptible(ib_conn->wait,
ib_conn->state == ISER_CONN_DOWN);
- iser_conn_release(ib_conn);
+ iser_conn_put(ib_conn);
}
static void iser_connect_error(struct rdma_cm_id *cma_id)
@@ -481,24 +492,15 @@
return ret;
}
-int iser_conn_init(struct iser_conn **ibconn)
+void iser_conn_init(struct iser_conn *ib_conn)
{
- struct iser_conn *ib_conn;
-
- ib_conn = kzalloc(sizeof *ib_conn, GFP_KERNEL);
- if (!ib_conn) {
- iser_err("can't alloc memory for struct iser_conn\n");
- return -ENOMEM;
- }
ib_conn->state = ISER_CONN_INIT;
init_waitqueue_head(&ib_conn->wait);
atomic_set(&ib_conn->post_recv_buf_count, 0);
atomic_set(&ib_conn->post_send_buf_count, 0);
+ atomic_set(&ib_conn->refcount, 1);
INIT_LIST_HEAD(&ib_conn->conn_list);
spin_lock_init(&ib_conn->lock);
-
- *ibconn = ib_conn;
- return 0;
}
/**
diff --git a/drivers/macintosh/adb.c b/drivers/macintosh/adb.c
index 40c70ba..e5d4468 100644
--- a/drivers/macintosh/adb.c
+++ b/drivers/macintosh/adb.c
@@ -46,7 +46,6 @@
#endif
-EXPORT_SYMBOL(adb_controller);
EXPORT_SYMBOL(adb_client_list);
extern struct adb_driver via_macii_driver;
@@ -80,7 +79,7 @@
static struct class *adb_dev_class;
-struct adb_driver *adb_controller;
+static struct adb_driver *adb_controller;
BLOCKING_NOTIFIER_HEAD(adb_client_list);
static int adb_got_sleep;
static int adb_inited;
@@ -290,7 +289,7 @@
}
#endif /* CONFIG_PM */
-int __init adb_init(void)
+static int __init adb_init(void)
{
struct adb_driver *driver;
int i;
diff --git a/drivers/macintosh/adbhid.c b/drivers/macintosh/adbhid.c
index ef4c117..59ea520 100644
--- a/drivers/macintosh/adbhid.c
+++ b/drivers/macintosh/adbhid.c
@@ -75,7 +75,7 @@
#define ADB_KEY_POWER_OLD 0x7e
#define ADB_KEY_POWER 0x7f
-u16 adb_to_linux_keycodes[128] = {
+static const u16 adb_to_linux_keycodes[128] = {
/* 0x00 */ KEY_A, /* 30 */
/* 0x01 */ KEY_S, /* 31 */
/* 0x02 */ KEY_D, /* 32 */
diff --git a/drivers/macintosh/macio_sysfs.c b/drivers/macintosh/macio_sysfs.c
index 112e5ef..9e9453b 100644
--- a/drivers/macintosh/macio_sysfs.c
+++ b/drivers/macintosh/macio_sysfs.c
@@ -44,7 +44,7 @@
struct of_device *ofdev = to_of_device(dev);
int len;
- len = of_device_get_modalias(ofdev, buf, PAGE_SIZE);
+ len = of_device_get_modalias(ofdev, buf, PAGE_SIZE - 2);
buf[len] = '\n';
buf[len+1] = 0;
@@ -52,6 +52,15 @@
return len+1;
}
+static ssize_t devspec_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct of_device *ofdev;
+
+ ofdev = to_of_device(dev);
+ return sprintf(buf, "%s\n", ofdev->node->full_name);
+}
+
macio_config_of_attr (name, "%s\n");
macio_config_of_attr (type, "%s\n");
@@ -60,5 +69,6 @@
__ATTR_RO(type),
__ATTR_RO(compatible),
__ATTR_RO(modalias),
+ __ATTR_RO(devspec),
__ATTR_NULL
};
diff --git a/drivers/macintosh/mediabay.c b/drivers/macintosh/mediabay.c
index 818aba36..b1e5b47 100644
--- a/drivers/macintosh/mediabay.c
+++ b/drivers/macintosh/mediabay.c
@@ -21,6 +21,7 @@
#include <linux/init.h>
#include <linux/ide.h>
#include <linux/kthread.h>
+#include <linux/mutex.h>
#include <asm/prom.h>
#include <asm/pgtable.h>
#include <asm/io.h>
@@ -77,7 +78,7 @@
int index;
int cached_gpio;
int sleeping;
- struct semaphore lock;
+ struct mutex lock;
#ifdef CONFIG_BLK_DEV_IDE_PMAC
ide_hwif_t *cd_port;
void __iomem *cd_base;
@@ -459,27 +460,27 @@
if (bay->mdev && which_bay == bay->mdev->ofdev.node) {
int timeout = 5000, index = hwif->index;
- down(&bay->lock);
+ mutex_lock(&bay->lock);
bay->cd_port = hwif;
bay->cd_base = (void __iomem *) base;
bay->cd_irq = irq;
if ((MB_CD != bay->content_id) || bay->state != mb_up) {
- up(&bay->lock);
+ mutex_unlock(&bay->lock);
return 0;
}
printk(KERN_DEBUG "Registered ide%d for media bay %d\n", index, i);
do {
if (MB_IDE_READY(i)) {
bay->cd_index = index;
- up(&bay->lock);
+ mutex_unlock(&bay->lock);
return 0;
}
mdelay(1);
} while(--timeout);
printk(KERN_DEBUG "Timeount waiting IDE in bay %d\n", i);
- up(&bay->lock);
+ mutex_unlock(&bay->lock);
return -ENODEV;
}
}
@@ -617,10 +618,10 @@
while (!kthread_should_stop()) {
for (i = 0; i < media_bay_count; ++i) {
- down(&media_bays[i].lock);
+ mutex_lock(&media_bays[i].lock);
if (!media_bays[i].sleeping)
media_bay_step(i);
- up(&media_bays[i].lock);
+ mutex_unlock(&media_bays[i].lock);
}
msleep_interruptible(MB_POLL_DELAY);
@@ -660,7 +661,7 @@
bay->index = i;
bay->ops = match->data;
bay->sleeping = 0;
- init_MUTEX(&bay->lock);
+ mutex_init(&bay->lock);
/* Init HW probing */
if (bay->ops->init)
@@ -698,10 +699,10 @@
if (state.event != mdev->ofdev.dev.power.power_state.event
&& (state.event & PM_EVENT_SLEEP)) {
- down(&bay->lock);
+ mutex_lock(&bay->lock);
bay->sleeping = 1;
set_mb_power(bay, 0);
- up(&bay->lock);
+ mutex_unlock(&bay->lock);
msleep(MB_POLL_DELAY);
mdev->ofdev.dev.power.power_state = state;
}
@@ -720,12 +721,12 @@
they seem to help the 3400 get it right.
*/
/* Force MB power to 0 */
- down(&bay->lock);
+ mutex_lock(&bay->lock);
set_mb_power(bay, 0);
msleep(MB_POWER_DELAY);
if (bay->ops->content(bay) != bay->content_id) {
printk("mediabay%d: content changed during sleep...\n", bay->index);
- up(&bay->lock);
+ mutex_unlock(&bay->lock);
return 0;
}
set_mb_power(bay, 1);
@@ -741,7 +742,7 @@
} while((bay->state != mb_empty) &&
(bay->state != mb_up));
bay->sleeping = 0;
- up(&bay->lock);
+ mutex_unlock(&bay->lock);
}
return 0;
}
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index 32cb029..96faa79 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -36,6 +36,8 @@
#include <linux/sysdev.h>
#include <linux/poll.h>
#include <linux/mutex.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
#include <asm/byteorder.h>
#include <asm/io.h>
@@ -46,8 +48,6 @@
#include <asm/sections.h>
#include <asm/abs_addr.h>
#include <asm/uaccess.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#define VERSION "0.7"
#define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
@@ -475,6 +475,7 @@
{
struct device_node *np;
const u32 *data;
+ int ret = 0;
np = of_find_node_by_type(NULL, "smu");
if (np == NULL)
@@ -484,16 +485,11 @@
if (smu_cmdbuf_abs == 0) {
printk(KERN_ERR "SMU: Command buffer not allocated !\n");
- of_node_put(np);
- return -EINVAL;
+ ret = -EINVAL;
+ goto fail_np;
}
smu = alloc_bootmem(sizeof(struct smu_device));
- if (smu == NULL) {
- of_node_put(np);
- return -ENOMEM;
- }
- memset(smu, 0, sizeof(*smu));
spin_lock_init(&smu->lock);
INIT_LIST_HEAD(&smu->cmd_list);
@@ -511,14 +507,14 @@
smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
if (smu->db_node == NULL) {
printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
- goto fail;
+ ret = -ENXIO;
+ goto fail_bootmem;
}
data = of_get_property(smu->db_node, "reg", NULL);
if (data == NULL) {
- of_node_put(smu->db_node);
- smu->db_node = NULL;
printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
- goto fail;
+ ret = -ENXIO;
+ goto fail_db_node;
}
/* Current setup has one doorbell GPIO that does both doorbell
@@ -552,7 +548,8 @@
smu->db_buf = ioremap(0x8000860c, 0x1000);
if (smu->db_buf == NULL) {
printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
- goto fail;
+ ret = -ENXIO;
+ goto fail_msg_node;
}
/* U3 has an issue with NAP mode when issuing SMU commands */
@@ -563,10 +560,17 @@
sys_ctrler = SYS_CTRLER_SMU;
return 0;
- fail:
+fail_msg_node:
+ if (smu->msg_node)
+ of_node_put(smu->msg_node);
+fail_db_node:
+ of_node_put(smu->db_node);
+fail_bootmem:
+ free_bootmem((unsigned long)smu, sizeof(struct smu_device));
smu = NULL;
- return -ENXIO;
-
+fail_np:
+ of_node_put(np);
+ return ret;
}
diff --git a/drivers/macintosh/therm_adt746x.c b/drivers/macintosh/therm_adt746x.c
index 5366dc93..22bf981 100644
--- a/drivers/macintosh/therm_adt746x.c
+++ b/drivers/macintosh/therm_adt746x.c
@@ -24,13 +24,13 @@
#include <linux/kthread.h>
#include <linux/moduleparam.h>
#include <linux/freezer.h>
+#include <linux/of_platform.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/sections.h>
-#include <asm/of_platform.h>
#undef DEBUG
diff --git a/drivers/macintosh/therm_pm72.c b/drivers/macintosh/therm_pm72.c
index ddfb426..817607e 100644
--- a/drivers/macintosh/therm_pm72.c
+++ b/drivers/macintosh/therm_pm72.c
@@ -123,14 +123,14 @@
#include <linux/i2c.h>
#include <linux/kthread.h>
#include <linux/mutex.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/sections.h>
-#include <asm/of_device.h>
#include <asm/macio.h>
-#include <asm/of_platform.h>
#include "therm_pm72.h"
diff --git a/drivers/macintosh/therm_windtunnel.c b/drivers/macintosh/therm_windtunnel.c
index d11821a..3da0a02 100644
--- a/drivers/macintosh/therm_windtunnel.c
+++ b/drivers/macintosh/therm_windtunnel.c
@@ -37,13 +37,13 @@
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/kthread.h>
+#include <linux/of_platform.h>
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/sections.h>
-#include <asm/of_platform.h>
#include <asm/macio.h>
#define LOG_TEMP 0 /* continously log temperature */
@@ -62,7 +62,7 @@
volatile int running;
struct task_struct *poll_task;
- struct semaphore lock;
+ struct mutex lock;
struct of_device *of_dev;
struct i2c_client *thermostat;
@@ -286,23 +286,23 @@
static int control_loop(void *dummy)
{
- down(&x.lock);
+ mutex_lock(&x.lock);
setup_hardware();
- up(&x.lock);
+ mutex_unlock(&x.lock);
for (;;) {
msleep_interruptible(8000);
if (kthread_should_stop())
break;
- down(&x.lock);
+ mutex_lock(&x.lock);
poll_temp();
- up(&x.lock);
+ mutex_unlock(&x.lock);
}
- down(&x.lock);
+ mutex_lock(&x.lock);
restore_regs();
- up(&x.lock);
+ mutex_unlock(&x.lock);
return 0;
}
@@ -489,7 +489,7 @@
const struct apple_thermal_info *info;
struct device_node *np;
- init_MUTEX( &x.lock );
+ mutex_init(&x.lock);
if( !(np=of_find_node_by_name(NULL, "power-mgt")) )
return -ENODEV;
diff --git a/drivers/macintosh/via-pmu68k.c b/drivers/macintosh/via-pmu68k.c
index e2f84da..b64741c 100644
--- a/drivers/macintosh/via-pmu68k.c
+++ b/drivers/macintosh/via-pmu68k.c
@@ -101,7 +101,6 @@
static int pmu_fully_inited;
int asleep;
-BLOCKING_NOTIFIER_HEAD(sleep_notifier_list);
static int pmu_probe(void);
static int pmu_init(void);
@@ -741,8 +740,8 @@
}
}
-int backlight_level = -1;
-int backlight_enabled = 0;
+static int backlight_level = -1;
+static int backlight_enabled = 0;
#define LEVEL_TO_BRIGHT(lev) ((lev) < 1? 0x7f: 0x4a - ((lev) << 1))
diff --git a/drivers/md/Kconfig b/drivers/md/Kconfig
index 610af91..07d92c1 100644
--- a/drivers/md/Kconfig
+++ b/drivers/md/Kconfig
@@ -252,27 +252,14 @@
config DM_MULTIPATH
tristate "Multipath target"
depends on BLK_DEV_DM
+ # nasty syntax but means make DM_MULTIPATH independent
+ # of SCSI_DH if the latter isn't defined but if
+ # it is, DM_MULTIPATH must depend on it. We get a build
+ # error if SCSI_DH=m and DM_MULTIPATH=y
+ depends on SCSI_DH || !SCSI_DH
---help---
Allow volume managers to support multipath hardware.
-config DM_MULTIPATH_EMC
- tristate "EMC CX/AX multipath support"
- depends on DM_MULTIPATH && BLK_DEV_DM
- ---help---
- Multipath support for EMC CX/AX series hardware.
-
-config DM_MULTIPATH_RDAC
- tristate "LSI/Engenio RDAC multipath support (EXPERIMENTAL)"
- depends on DM_MULTIPATH && BLK_DEV_DM && SCSI && EXPERIMENTAL
- ---help---
- Multipath support for LSI/Engenio RDAC.
-
-config DM_MULTIPATH_HP
- tristate "HP MSA multipath support (EXPERIMENTAL)"
- depends on DM_MULTIPATH && BLK_DEV_DM && SCSI && EXPERIMENTAL
- ---help---
- Multipath support for HP MSA (Active/Passive) series hardware.
-
config DM_DELAY
tristate "I/O delaying target (EXPERIMENTAL)"
depends on BLK_DEV_DM && EXPERIMENTAL
diff --git a/drivers/md/Makefile b/drivers/md/Makefile
index 7be09ee..f1ef33d 100644
--- a/drivers/md/Makefile
+++ b/drivers/md/Makefile
@@ -4,11 +4,9 @@
dm-mod-objs := dm.o dm-table.o dm-target.o dm-linear.o dm-stripe.o \
dm-ioctl.o dm-io.o dm-kcopyd.o
-dm-multipath-objs := dm-hw-handler.o dm-path-selector.o dm-mpath.o
+dm-multipath-objs := dm-path-selector.o dm-mpath.o
dm-snapshot-objs := dm-snap.o dm-exception-store.o
dm-mirror-objs := dm-raid1.o
-dm-rdac-objs := dm-mpath-rdac.o
-dm-hp-sw-objs := dm-mpath-hp-sw.o
md-mod-objs := md.o bitmap.o
raid456-objs := raid5.o raid6algos.o raid6recov.o raid6tables.o \
raid6int1.o raid6int2.o raid6int4.o \
@@ -35,9 +33,6 @@
obj-$(CONFIG_DM_CRYPT) += dm-crypt.o
obj-$(CONFIG_DM_DELAY) += dm-delay.o
obj-$(CONFIG_DM_MULTIPATH) += dm-multipath.o dm-round-robin.o
-obj-$(CONFIG_DM_MULTIPATH_EMC) += dm-emc.o
-obj-$(CONFIG_DM_MULTIPATH_HP) += dm-hp-sw.o
-obj-$(CONFIG_DM_MULTIPATH_RDAC) += dm-rdac.o
obj-$(CONFIG_DM_SNAPSHOT) += dm-snapshot.o
obj-$(CONFIG_DM_MIRROR) += dm-mirror.o dm-log.o
obj-$(CONFIG_DM_ZERO) += dm-zero.o
diff --git a/drivers/md/dm-emc.c b/drivers/md/dm-emc.c
deleted file mode 100644
index 3ea5ad4..0000000
--- a/drivers/md/dm-emc.c
+++ /dev/null
@@ -1,345 +0,0 @@
-/*
- * Copyright (C) 2004 SUSE LINUX Products GmbH. All rights reserved.
- * Copyright (C) 2004 Red Hat, Inc. All rights reserved.
- *
- * This file is released under the GPL.
- *
- * Multipath support for EMC CLARiiON AX/CX-series hardware.
- */
-
-#include "dm.h"
-#include "dm-hw-handler.h"
-#include <scsi/scsi.h>
-#include <scsi/scsi_cmnd.h>
-
-#define DM_MSG_PREFIX "multipath emc"
-
-struct emc_handler {
- spinlock_t lock;
-
- /* Whether we should send the short trespass command (FC-series)
- * or the long version (default for AX/CX CLARiiON arrays). */
- unsigned short_trespass;
- /* Whether or not to honor SCSI reservations when initiating a
- * switch-over. Default: Don't. */
- unsigned hr;
-
- unsigned char sense[SCSI_SENSE_BUFFERSIZE];
-};
-
-#define TRESPASS_PAGE 0x22
-#define EMC_FAILOVER_TIMEOUT (60 * HZ)
-
-/* Code borrowed from dm-lsi-rdac by Mike Christie */
-
-static inline void free_bio(struct bio *bio)
-{
- __free_page(bio->bi_io_vec[0].bv_page);
- bio_put(bio);
-}
-
-static void emc_endio(struct bio *bio, int error)
-{
- struct dm_path *path = bio->bi_private;
-
- /* We also need to look at the sense keys here whether or not to
- * switch to the next PG etc.
- *
- * For now simple logic: either it works or it doesn't.
- */
- if (error)
- dm_pg_init_complete(path, MP_FAIL_PATH);
- else
- dm_pg_init_complete(path, 0);
-
- /* request is freed in block layer */
- free_bio(bio);
-}
-
-static struct bio *get_failover_bio(struct dm_path *path, unsigned data_size)
-{
- struct bio *bio;
- struct page *page;
-
- bio = bio_alloc(GFP_ATOMIC, 1);
- if (!bio) {
- DMERR("get_failover_bio: bio_alloc() failed.");
- return NULL;
- }
-
- bio->bi_rw |= (1 << BIO_RW);
- bio->bi_bdev = path->dev->bdev;
- bio->bi_sector = 0;
- bio->bi_private = path;
- bio->bi_end_io = emc_endio;
-
- page = alloc_page(GFP_ATOMIC);
- if (!page) {
- DMERR("get_failover_bio: alloc_page() failed.");
- bio_put(bio);
- return NULL;
- }
-
- if (bio_add_page(bio, page, data_size, 0) != data_size) {
- DMERR("get_failover_bio: bio_add_page() failed.");
- __free_page(page);
- bio_put(bio);
- return NULL;
- }
-
- return bio;
-}
-
-static struct request *get_failover_req(struct emc_handler *h,
- struct bio *bio, struct dm_path *path)
-{
- struct request *rq;
- struct block_device *bdev = bio->bi_bdev;
- struct request_queue *q = bdev_get_queue(bdev);
-
- /* FIXME: Figure out why it fails with GFP_ATOMIC. */
- rq = blk_get_request(q, WRITE, __GFP_WAIT);
- if (!rq) {
- DMERR("get_failover_req: blk_get_request failed");
- return NULL;
- }
-
- blk_rq_append_bio(q, rq, bio);
-
- rq->sense = h->sense;
- memset(rq->sense, 0, SCSI_SENSE_BUFFERSIZE);
- rq->sense_len = 0;
-
- rq->timeout = EMC_FAILOVER_TIMEOUT;
- rq->cmd_type = REQ_TYPE_BLOCK_PC;
- rq->cmd_flags |= REQ_FAILFAST | REQ_NOMERGE;
-
- return rq;
-}
-
-static struct request *emc_trespass_get(struct emc_handler *h,
- struct dm_path *path)
-{
- struct bio *bio;
- struct request *rq;
- unsigned char *page22;
- unsigned char long_trespass_pg[] = {
- 0, 0, 0, 0,
- TRESPASS_PAGE, /* Page code */
- 0x09, /* Page length - 2 */
- h->hr ? 0x01 : 0x81, /* Trespass code + Honor reservation bit */
- 0xff, 0xff, /* Trespass target */
- 0, 0, 0, 0, 0, 0 /* Reserved bytes / unknown */
- };
- unsigned char short_trespass_pg[] = {
- 0, 0, 0, 0,
- TRESPASS_PAGE, /* Page code */
- 0x02, /* Page length - 2 */
- h->hr ? 0x01 : 0x81, /* Trespass code + Honor reservation bit */
- 0xff, /* Trespass target */
- };
- unsigned data_size = h->short_trespass ? sizeof(short_trespass_pg) :
- sizeof(long_trespass_pg);
-
- /* get bio backing */
- if (data_size > PAGE_SIZE)
- /* this should never happen */
- return NULL;
-
- bio = get_failover_bio(path, data_size);
- if (!bio) {
- DMERR("emc_trespass_get: no bio");
- return NULL;
- }
-
- page22 = (unsigned char *)bio_data(bio);
- memset(page22, 0, data_size);
-
- memcpy(page22, h->short_trespass ?
- short_trespass_pg : long_trespass_pg, data_size);
-
- /* get request for block layer packet command */
- rq = get_failover_req(h, bio, path);
- if (!rq) {
- DMERR("emc_trespass_get: no rq");
- free_bio(bio);
- return NULL;
- }
-
- /* Prepare the command. */
- rq->cmd[0] = MODE_SELECT;
- rq->cmd[1] = 0x10;
- rq->cmd[4] = data_size;
- rq->cmd_len = COMMAND_SIZE(rq->cmd[0]);
-
- return rq;
-}
-
-static void emc_pg_init(struct hw_handler *hwh, unsigned bypassed,
- struct dm_path *path)
-{
- struct request *rq;
- struct request_queue *q = bdev_get_queue(path->dev->bdev);
-
- /*
- * We can either blindly init the pg (then look at the sense),
- * or we can send some commands to get the state here (then
- * possibly send the fo cmnd), or we can also have the
- * initial state passed into us and then get an update here.
- */
- if (!q) {
- DMINFO("emc_pg_init: no queue");
- goto fail_path;
- }
-
- /* FIXME: The request should be pre-allocated. */
- rq = emc_trespass_get(hwh->context, path);
- if (!rq) {
- DMERR("emc_pg_init: no rq");
- goto fail_path;
- }
-
- DMINFO("emc_pg_init: sending switch-over command");
- elv_add_request(q, rq, ELEVATOR_INSERT_FRONT, 1);
- return;
-
-fail_path:
- dm_pg_init_complete(path, MP_FAIL_PATH);
-}
-
-static struct emc_handler *alloc_emc_handler(void)
-{
- struct emc_handler *h = kzalloc(sizeof(*h), GFP_KERNEL);
-
- if (h)
- spin_lock_init(&h->lock);
-
- return h;
-}
-
-static int emc_create(struct hw_handler *hwh, unsigned argc, char **argv)
-{
- struct emc_handler *h;
- unsigned hr, short_trespass;
-
- if (argc == 0) {
- /* No arguments: use defaults */
- hr = 0;
- short_trespass = 0;
- } else if (argc != 2) {
- DMWARN("incorrect number of arguments");
- return -EINVAL;
- } else {
- if ((sscanf(argv[0], "%u", &short_trespass) != 1)
- || (short_trespass > 1)) {
- DMWARN("invalid trespass mode selected");
- return -EINVAL;
- }
-
- if ((sscanf(argv[1], "%u", &hr) != 1)
- || (hr > 1)) {
- DMWARN("invalid honor reservation flag selected");
- return -EINVAL;
- }
- }
-
- h = alloc_emc_handler();
- if (!h)
- return -ENOMEM;
-
- hwh->context = h;
-
- if ((h->short_trespass = short_trespass))
- DMWARN("short trespass command will be send");
- else
- DMWARN("long trespass command will be send");
-
- if ((h->hr = hr))
- DMWARN("honor reservation bit will be set");
- else
- DMWARN("honor reservation bit will not be set (default)");
-
- return 0;
-}
-
-static void emc_destroy(struct hw_handler *hwh)
-{
- struct emc_handler *h = (struct emc_handler *) hwh->context;
-
- kfree(h);
- hwh->context = NULL;
-}
-
-static unsigned emc_error(struct hw_handler *hwh, struct bio *bio)
-{
- /* FIXME: Patch from axboe still missing */
-#if 0
- int sense;
-
- if (bio->bi_error & BIO_SENSE) {
- sense = bio->bi_error & 0xffffff; /* sense key / asc / ascq */
-
- if (sense == 0x020403) {
- /* LUN Not Ready - Manual Intervention Required
- * indicates this is a passive path.
- *
- * FIXME: However, if this is seen and EVPD C0
- * indicates that this is due to a NDU in
- * progress, we should set FAIL_PATH too.
- * This indicates we might have to do a SCSI
- * inquiry in the end_io path. Ugh. */
- return MP_BYPASS_PG | MP_RETRY_IO;
- } else if (sense == 0x052501) {
- /* An array based copy is in progress. Do not
- * fail the path, do not bypass to another PG,
- * do not retry. Fail the IO immediately.
- * (Actually this is the same conclusion as in
- * the default handler, but lets make sure.) */
- return 0;
- } else if (sense == 0x062900) {
- /* Unit Attention Code. This is the first IO
- * to the new path, so just retry. */
- return MP_RETRY_IO;
- }
- }
-#endif
-
- /* Try default handler */
- return dm_scsi_err_handler(hwh, bio);
-}
-
-static struct hw_handler_type emc_hwh = {
- .name = "emc",
- .module = THIS_MODULE,
- .create = emc_create,
- .destroy = emc_destroy,
- .pg_init = emc_pg_init,
- .error = emc_error,
-};
-
-static int __init dm_emc_init(void)
-{
- int r = dm_register_hw_handler(&emc_hwh);
-
- if (r < 0)
- DMERR("register failed %d", r);
-
- DMINFO("version 0.0.3 loaded");
-
- return r;
-}
-
-static void __exit dm_emc_exit(void)
-{
- int r = dm_unregister_hw_handler(&emc_hwh);
-
- if (r < 0)
- DMERR("unregister failed %d", r);
-}
-
-module_init(dm_emc_init);
-module_exit(dm_emc_exit);
-
-MODULE_DESCRIPTION(DM_NAME " EMC CX/AX/FC-family multipath");
-MODULE_AUTHOR("Lars Marowsky-Bree <lmb@suse.de>");
-MODULE_LICENSE("GPL");
diff --git a/drivers/md/dm-hw-handler.c b/drivers/md/dm-hw-handler.c
deleted file mode 100644
index 2ee84d8..0000000
--- a/drivers/md/dm-hw-handler.c
+++ /dev/null
@@ -1,213 +0,0 @@
-/*
- * Copyright (C) 2004 Red Hat, Inc. All rights reserved.
- *
- * This file is released under the GPL.
- *
- * Multipath hardware handler registration.
- */
-
-#include "dm.h"
-#include "dm-hw-handler.h"
-
-#include <linux/slab.h>
-
-struct hwh_internal {
- struct hw_handler_type hwht;
-
- struct list_head list;
- long use;
-};
-
-#define hwht_to_hwhi(__hwht) container_of((__hwht), struct hwh_internal, hwht)
-
-static LIST_HEAD(_hw_handlers);
-static DECLARE_RWSEM(_hwh_lock);
-
-static struct hwh_internal *__find_hw_handler_type(const char *name)
-{
- struct hwh_internal *hwhi;
-
- list_for_each_entry(hwhi, &_hw_handlers, list) {
- if (!strcmp(name, hwhi->hwht.name))
- return hwhi;
- }
-
- return NULL;
-}
-
-static struct hwh_internal *get_hw_handler(const char *name)
-{
- struct hwh_internal *hwhi;
-
- down_read(&_hwh_lock);
- hwhi = __find_hw_handler_type(name);
- if (hwhi) {
- if ((hwhi->use == 0) && !try_module_get(hwhi->hwht.module))
- hwhi = NULL;
- else
- hwhi->use++;
- }
- up_read(&_hwh_lock);
-
- return hwhi;
-}
-
-struct hw_handler_type *dm_get_hw_handler(const char *name)
-{
- struct hwh_internal *hwhi;
-
- if (!name)
- return NULL;
-
- hwhi = get_hw_handler(name);
- if (!hwhi) {
- request_module("dm-%s", name);
- hwhi = get_hw_handler(name);
- }
-
- return hwhi ? &hwhi->hwht : NULL;
-}
-
-void dm_put_hw_handler(struct hw_handler_type *hwht)
-{
- struct hwh_internal *hwhi;
-
- if (!hwht)
- return;
-
- down_read(&_hwh_lock);
- hwhi = __find_hw_handler_type(hwht->name);
- if (!hwhi)
- goto out;
-
- if (--hwhi->use == 0)
- module_put(hwhi->hwht.module);
-
- BUG_ON(hwhi->use < 0);
-
- out:
- up_read(&_hwh_lock);
-}
-
-static struct hwh_internal *_alloc_hw_handler(struct hw_handler_type *hwht)
-{
- struct hwh_internal *hwhi = kzalloc(sizeof(*hwhi), GFP_KERNEL);
-
- if (hwhi)
- hwhi->hwht = *hwht;
-
- return hwhi;
-}
-
-int dm_register_hw_handler(struct hw_handler_type *hwht)
-{
- int r = 0;
- struct hwh_internal *hwhi = _alloc_hw_handler(hwht);
-
- if (!hwhi)
- return -ENOMEM;
-
- down_write(&_hwh_lock);
-
- if (__find_hw_handler_type(hwht->name)) {
- kfree(hwhi);
- r = -EEXIST;
- } else
- list_add(&hwhi->list, &_hw_handlers);
-
- up_write(&_hwh_lock);
-
- return r;
-}
-
-int dm_unregister_hw_handler(struct hw_handler_type *hwht)
-{
- struct hwh_internal *hwhi;
-
- down_write(&_hwh_lock);
-
- hwhi = __find_hw_handler_type(hwht->name);
- if (!hwhi) {
- up_write(&_hwh_lock);
- return -EINVAL;
- }
-
- if (hwhi->use) {
- up_write(&_hwh_lock);
- return -ETXTBSY;
- }
-
- list_del(&hwhi->list);
-
- up_write(&_hwh_lock);
-
- kfree(hwhi);
-
- return 0;
-}
-
-unsigned dm_scsi_err_handler(struct hw_handler *hwh, struct bio *bio)
-{
-#if 0
- int sense_key, asc, ascq;
-
- if (bio->bi_error & BIO_SENSE) {
- /* FIXME: This is just an initial guess. */
- /* key / asc / ascq */
- sense_key = (bio->bi_error >> 16) & 0xff;
- asc = (bio->bi_error >> 8) & 0xff;
- ascq = bio->bi_error & 0xff;
-
- switch (sense_key) {
- /* This block as a whole comes from the device.
- * So no point retrying on another path. */
- case 0x03: /* Medium error */
- case 0x05: /* Illegal request */
- case 0x07: /* Data protect */
- case 0x08: /* Blank check */
- case 0x0a: /* copy aborted */
- case 0x0c: /* obsolete - no clue ;-) */
- case 0x0d: /* volume overflow */
- case 0x0e: /* data miscompare */
- case 0x0f: /* reserved - no idea either. */
- return MP_ERROR_IO;
-
- /* For these errors it's unclear whether they
- * come from the device or the controller.
- * So just lets try a different path, and if
- * it eventually succeeds, user-space will clear
- * the paths again... */
- case 0x02: /* Not ready */
- case 0x04: /* Hardware error */
- case 0x09: /* vendor specific */
- case 0x0b: /* Aborted command */
- return MP_FAIL_PATH;
-
- case 0x06: /* Unit attention - might want to decode */
- if (asc == 0x04 && ascq == 0x01)
- /* "Unit in the process of
- * becoming ready" */
- return 0;
- return MP_FAIL_PATH;
-
- /* FIXME: For Unit Not Ready we may want
- * to have a generic pg activation
- * feature (START_UNIT). */
-
- /* Should these two ever end up in the
- * error path? I don't think so. */
- case 0x00: /* No sense */
- case 0x01: /* Recovered error */
- return 0;
- }
- }
-#endif
-
- /* We got no idea how to decode the other kinds of errors ->
- * assume generic error condition. */
- return MP_FAIL_PATH;
-}
-
-EXPORT_SYMBOL_GPL(dm_register_hw_handler);
-EXPORT_SYMBOL_GPL(dm_unregister_hw_handler);
-EXPORT_SYMBOL_GPL(dm_scsi_err_handler);
diff --git a/drivers/md/dm-hw-handler.h b/drivers/md/dm-hw-handler.h
deleted file mode 100644
index 46809dc..0000000
--- a/drivers/md/dm-hw-handler.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Copyright (C) 2004 Red Hat, Inc. All rights reserved.
- *
- * This file is released under the GPL.
- *
- * Multipath hardware handler registration.
- */
-
-#ifndef DM_HW_HANDLER_H
-#define DM_HW_HANDLER_H
-
-#include <linux/device-mapper.h>
-
-#include "dm-mpath.h"
-
-struct hw_handler_type;
-struct hw_handler {
- struct hw_handler_type *type;
- struct mapped_device *md;
- void *context;
-};
-
-/*
- * Constructs a hardware handler object, takes custom arguments
- */
-/* Information about a hardware handler type */
-struct hw_handler_type {
- char *name;
- struct module *module;
-
- int (*create) (struct hw_handler *handler, unsigned int argc,
- char **argv);
- void (*destroy) (struct hw_handler *hwh);
-
- void (*pg_init) (struct hw_handler *hwh, unsigned bypassed,
- struct dm_path *path);
- unsigned (*error) (struct hw_handler *hwh, struct bio *bio);
- int (*status) (struct hw_handler *hwh, status_type_t type,
- char *result, unsigned int maxlen);
-};
-
-/* Register a hardware handler */
-int dm_register_hw_handler(struct hw_handler_type *type);
-
-/* Unregister a hardware handler */
-int dm_unregister_hw_handler(struct hw_handler_type *type);
-
-/* Returns a registered hardware handler type */
-struct hw_handler_type *dm_get_hw_handler(const char *name);
-
-/* Releases a hardware handler */
-void dm_put_hw_handler(struct hw_handler_type *hwht);
-
-/* Default err function */
-unsigned dm_scsi_err_handler(struct hw_handler *hwh, struct bio *bio);
-
-/* Error flags for err and dm_pg_init_complete */
-#define MP_FAIL_PATH 1
-#define MP_BYPASS_PG 2
-#define MP_ERROR_IO 4 /* Don't retry this I/O */
-#define MP_RETRY 8
-
-#endif
diff --git a/drivers/md/dm-mpath-hp-sw.c b/drivers/md/dm-mpath-hp-sw.c
deleted file mode 100644
index b63a0ab..0000000
--- a/drivers/md/dm-mpath-hp-sw.c
+++ /dev/null
@@ -1,247 +0,0 @@
-/*
- * Copyright (C) 2005 Mike Christie, All rights reserved.
- * Copyright (C) 2007 Red Hat, Inc. All rights reserved.
- * Authors: Mike Christie
- * Dave Wysochanski
- *
- * This file is released under the GPL.
- *
- * This module implements the specific path activation code for
- * HP StorageWorks and FSC FibreCat Asymmetric (Active/Passive)
- * storage arrays.
- * These storage arrays have controller-based failover, not
- * LUN-based failover. However, LUN-based failover is the design
- * of dm-multipath. Thus, this module is written for LUN-based failover.
- */
-#include <linux/blkdev.h>
-#include <linux/list.h>
-#include <linux/types.h>
-#include <scsi/scsi.h>
-#include <scsi/scsi_cmnd.h>
-#include <scsi/scsi_dbg.h>
-
-#include "dm.h"
-#include "dm-hw-handler.h"
-
-#define DM_MSG_PREFIX "multipath hp-sw"
-#define DM_HP_HWH_NAME "hp-sw"
-#define DM_HP_HWH_VER "1.0.0"
-
-struct hp_sw_context {
- unsigned char sense[SCSI_SENSE_BUFFERSIZE];
-};
-
-/*
- * hp_sw_error_is_retryable - Is an HP-specific check condition retryable?
- * @req: path activation request
- *
- * Examine error codes of request and determine whether the error is retryable.
- * Some error codes are already retried by scsi-ml (see
- * scsi_decide_disposition), but some HP specific codes are not.
- * The intent of this routine is to supply the logic for the HP specific
- * check conditions.
- *
- * Returns:
- * 1 - command completed with retryable error
- * 0 - command completed with non-retryable error
- *
- * Possible optimizations
- * 1. More hardware-specific error codes
- */
-static int hp_sw_error_is_retryable(struct request *req)
-{
- /*
- * NOT_READY is known to be retryable
- * For now we just dump out the sense data and call it retryable
- */
- if (status_byte(req->errors) == CHECK_CONDITION)
- __scsi_print_sense(DM_HP_HWH_NAME, req->sense, req->sense_len);
-
- /*
- * At this point we don't have complete information about all the error
- * codes from this hardware, so we are just conservative and retry
- * when in doubt.
- */
- return 1;
-}
-
-/*
- * hp_sw_end_io - Completion handler for HP path activation.
- * @req: path activation request
- * @error: scsi-ml error
- *
- * Check sense data, free request structure, and notify dm that
- * pg initialization has completed.
- *
- * Context: scsi-ml softirq
- *
- */
-static void hp_sw_end_io(struct request *req, int error)
-{
- struct dm_path *path = req->end_io_data;
- unsigned err_flags = 0;
-
- if (!error) {
- DMDEBUG("%s path activation command - success",
- path->dev->name);
- goto out;
- }
-
- if (hp_sw_error_is_retryable(req)) {
- DMDEBUG("%s path activation command - retry",
- path->dev->name);
- err_flags = MP_RETRY;
- goto out;
- }
-
- DMWARN("%s path activation fail - error=0x%x",
- path->dev->name, error);
- err_flags = MP_FAIL_PATH;
-
-out:
- req->end_io_data = NULL;
- __blk_put_request(req->q, req);
- dm_pg_init_complete(path, err_flags);
-}
-
-/*
- * hp_sw_get_request - Allocate an HP specific path activation request
- * @path: path on which request will be sent (needed for request queue)
- *
- * The START command is used for path activation request.
- * These arrays are controller-based failover, not LUN based.
- * One START command issued to a single path will fail over all
- * LUNs for the same controller.
- *
- * Possible optimizations
- * 1. Make timeout configurable
- * 2. Preallocate request
- */
-static struct request *hp_sw_get_request(struct dm_path *path)
-{
- struct request *req;
- struct block_device *bdev = path->dev->bdev;
- struct request_queue *q = bdev_get_queue(bdev);
- struct hp_sw_context *h = path->hwhcontext;
-
- req = blk_get_request(q, WRITE, GFP_NOIO);
- if (!req)
- goto out;
-
- req->timeout = 60 * HZ;
-
- req->errors = 0;
- req->cmd_type = REQ_TYPE_BLOCK_PC;
- req->cmd_flags |= REQ_FAILFAST | REQ_NOMERGE;
- req->end_io_data = path;
- req->sense = h->sense;
- memset(req->sense, 0, SCSI_SENSE_BUFFERSIZE);
-
- req->cmd[0] = START_STOP;
- req->cmd[4] = 1;
- req->cmd_len = COMMAND_SIZE(req->cmd[0]);
-
-out:
- return req;
-}
-
-/*
- * hp_sw_pg_init - HP path activation implementation.
- * @hwh: hardware handler specific data
- * @bypassed: unused; is the path group bypassed? (see dm-mpath.c)
- * @path: path to send initialization command
- *
- * Send an HP-specific path activation command on 'path'.
- * Do not try to optimize in any way, just send the activation command.
- * More than one path activation command may be sent to the same controller.
- * This seems to work fine for basic failover support.
- *
- * Possible optimizations
- * 1. Detect an in-progress activation request and avoid submitting another one
- * 2. Model the controller and only send a single activation request at a time
- * 3. Determine the state of a path before sending an activation request
- *
- * Context: kmpathd (see process_queued_ios() in dm-mpath.c)
- */
-static void hp_sw_pg_init(struct hw_handler *hwh, unsigned bypassed,
- struct dm_path *path)
-{
- struct request *req;
- struct hp_sw_context *h;
-
- path->hwhcontext = hwh->context;
- h = hwh->context;
-
- req = hp_sw_get_request(path);
- if (!req) {
- DMERR("%s path activation command - allocation fail",
- path->dev->name);
- goto retry;
- }
-
- DMDEBUG("%s path activation command - sent", path->dev->name);
-
- blk_execute_rq_nowait(req->q, NULL, req, 1, hp_sw_end_io);
- return;
-
-retry:
- dm_pg_init_complete(path, MP_RETRY);
-}
-
-static int hp_sw_create(struct hw_handler *hwh, unsigned argc, char **argv)
-{
- struct hp_sw_context *h;
-
- h = kmalloc(sizeof(*h), GFP_KERNEL);
- if (!h)
- return -ENOMEM;
-
- hwh->context = h;
-
- return 0;
-}
-
-static void hp_sw_destroy(struct hw_handler *hwh)
-{
- struct hp_sw_context *h = hwh->context;
-
- kfree(h);
-}
-
-static struct hw_handler_type hp_sw_hwh = {
- .name = DM_HP_HWH_NAME,
- .module = THIS_MODULE,
- .create = hp_sw_create,
- .destroy = hp_sw_destroy,
- .pg_init = hp_sw_pg_init,
-};
-
-static int __init hp_sw_init(void)
-{
- int r;
-
- r = dm_register_hw_handler(&hp_sw_hwh);
- if (r < 0)
- DMERR("register failed %d", r);
- else
- DMINFO("version " DM_HP_HWH_VER " loaded");
-
- return r;
-}
-
-static void __exit hp_sw_exit(void)
-{
- int r;
-
- r = dm_unregister_hw_handler(&hp_sw_hwh);
- if (r < 0)
- DMERR("unregister failed %d", r);
-}
-
-module_init(hp_sw_init);
-module_exit(hp_sw_exit);
-
-MODULE_DESCRIPTION("DM Multipath HP StorageWorks / FSC FibreCat (A/P) support");
-MODULE_AUTHOR("Mike Christie, Dave Wysochanski <dm-devel@redhat.com>");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(DM_HP_HWH_VER);
diff --git a/drivers/md/dm-mpath-rdac.c b/drivers/md/dm-mpath-rdac.c
deleted file mode 100644
index 95e7773..0000000
--- a/drivers/md/dm-mpath-rdac.c
+++ /dev/null
@@ -1,700 +0,0 @@
-/*
- * Engenio/LSI RDAC DM HW handler
- *
- * Copyright (C) 2005 Mike Christie. All rights reserved.
- * Copyright (C) Chandra Seetharaman, IBM Corp. 2007
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- *
- */
-#include <scsi/scsi.h>
-#include <scsi/scsi_cmnd.h>
-#include <scsi/scsi_eh.h>
-
-#define DM_MSG_PREFIX "multipath rdac"
-
-#include "dm.h"
-#include "dm-hw-handler.h"
-
-#define RDAC_DM_HWH_NAME "rdac"
-#define RDAC_DM_HWH_VER "0.4"
-
-/*
- * LSI mode page stuff
- *
- * These struct definitions and the forming of the
- * mode page were taken from the LSI RDAC 2.4 GPL'd
- * driver, and then converted to Linux conventions.
- */
-#define RDAC_QUIESCENCE_TIME 20;
-/*
- * Page Codes
- */
-#define RDAC_PAGE_CODE_REDUNDANT_CONTROLLER 0x2c
-
-/*
- * Controller modes definitions
- */
-#define RDAC_MODE_TRANSFER_ALL_LUNS 0x01
-#define RDAC_MODE_TRANSFER_SPECIFIED_LUNS 0x02
-
-/*
- * RDAC Options field
- */
-#define RDAC_FORCED_QUIESENCE 0x02
-
-#define RDAC_FAILOVER_TIMEOUT (60 * HZ)
-
-struct rdac_mode_6_hdr {
- u8 data_len;
- u8 medium_type;
- u8 device_params;
- u8 block_desc_len;
-};
-
-struct rdac_mode_10_hdr {
- u16 data_len;
- u8 medium_type;
- u8 device_params;
- u16 reserved;
- u16 block_desc_len;
-};
-
-struct rdac_mode_common {
- u8 controller_serial[16];
- u8 alt_controller_serial[16];
- u8 rdac_mode[2];
- u8 alt_rdac_mode[2];
- u8 quiescence_timeout;
- u8 rdac_options;
-};
-
-struct rdac_pg_legacy {
- struct rdac_mode_6_hdr hdr;
- u8 page_code;
- u8 page_len;
- struct rdac_mode_common common;
-#define MODE6_MAX_LUN 32
- u8 lun_table[MODE6_MAX_LUN];
- u8 reserved2[32];
- u8 reserved3;
- u8 reserved4;
-};
-
-struct rdac_pg_expanded {
- struct rdac_mode_10_hdr hdr;
- u8 page_code;
- u8 subpage_code;
- u8 page_len[2];
- struct rdac_mode_common common;
- u8 lun_table[256];
- u8 reserved3;
- u8 reserved4;
-};
-
-struct c9_inquiry {
- u8 peripheral_info;
- u8 page_code; /* 0xC9 */
- u8 reserved1;
- u8 page_len;
- u8 page_id[4]; /* "vace" */
- u8 avte_cvp;
- u8 path_prio;
- u8 reserved2[38];
-};
-
-#define SUBSYS_ID_LEN 16
-#define SLOT_ID_LEN 2
-
-struct c4_inquiry {
- u8 peripheral_info;
- u8 page_code; /* 0xC4 */
- u8 reserved1;
- u8 page_len;
- u8 page_id[4]; /* "subs" */
- u8 subsys_id[SUBSYS_ID_LEN];
- u8 revision[4];
- u8 slot_id[SLOT_ID_LEN];
- u8 reserved[2];
-};
-
-struct rdac_controller {
- u8 subsys_id[SUBSYS_ID_LEN];
- u8 slot_id[SLOT_ID_LEN];
- int use_10_ms;
- struct kref kref;
- struct list_head node; /* list of all controllers */
- spinlock_t lock;
- int submitted;
- struct list_head cmd_list; /* list of commands to be submitted */
- union {
- struct rdac_pg_legacy legacy;
- struct rdac_pg_expanded expanded;
- } mode_select;
-};
-struct c8_inquiry {
- u8 peripheral_info;
- u8 page_code; /* 0xC8 */
- u8 reserved1;
- u8 page_len;
- u8 page_id[4]; /* "edid" */
- u8 reserved2[3];
- u8 vol_uniq_id_len;
- u8 vol_uniq_id[16];
- u8 vol_user_label_len;
- u8 vol_user_label[60];
- u8 array_uniq_id_len;
- u8 array_unique_id[16];
- u8 array_user_label_len;
- u8 array_user_label[60];
- u8 lun[8];
-};
-
-struct c2_inquiry {
- u8 peripheral_info;
- u8 page_code; /* 0xC2 */
- u8 reserved1;
- u8 page_len;
- u8 page_id[4]; /* "swr4" */
- u8 sw_version[3];
- u8 sw_date[3];
- u8 features_enabled;
- u8 max_lun_supported;
- u8 partitions[239]; /* Total allocation length should be 0xFF */
-};
-
-struct rdac_handler {
- struct list_head entry; /* list waiting to submit MODE SELECT */
- unsigned timeout;
- struct rdac_controller *ctlr;
-#define UNINITIALIZED_LUN (1 << 8)
- unsigned lun;
- unsigned char sense[SCSI_SENSE_BUFFERSIZE];
- struct dm_path *path;
- struct work_struct work;
-#define SEND_C2_INQUIRY 1
-#define SEND_C4_INQUIRY 2
-#define SEND_C8_INQUIRY 3
-#define SEND_C9_INQUIRY 4
-#define SEND_MODE_SELECT 5
- int cmd_to_send;
- union {
- struct c2_inquiry c2;
- struct c4_inquiry c4;
- struct c8_inquiry c8;
- struct c9_inquiry c9;
- } inq;
-};
-
-static LIST_HEAD(ctlr_list);
-static DEFINE_SPINLOCK(list_lock);
-static struct workqueue_struct *rdac_wkqd;
-
-static inline int had_failures(struct request *req, int error)
-{
- return (error || host_byte(req->errors) != DID_OK ||
- msg_byte(req->errors) != COMMAND_COMPLETE);
-}
-
-static void rdac_resubmit_all(struct rdac_handler *h)
-{
- struct rdac_controller *ctlr = h->ctlr;
- struct rdac_handler *tmp, *h1;
-
- spin_lock(&ctlr->lock);
- list_for_each_entry_safe(h1, tmp, &ctlr->cmd_list, entry) {
- h1->cmd_to_send = SEND_C9_INQUIRY;
- queue_work(rdac_wkqd, &h1->work);
- list_del(&h1->entry);
- }
- ctlr->submitted = 0;
- spin_unlock(&ctlr->lock);
-}
-
-static void mode_select_endio(struct request *req, int error)
-{
- struct rdac_handler *h = req->end_io_data;
- struct scsi_sense_hdr sense_hdr;
- int sense = 0, fail = 0;
-
- if (had_failures(req, error)) {
- fail = 1;
- goto failed;
- }
-
- if (status_byte(req->errors) == CHECK_CONDITION) {
- scsi_normalize_sense(req->sense, SCSI_SENSE_BUFFERSIZE,
- &sense_hdr);
- sense = (sense_hdr.sense_key << 16) | (sense_hdr.asc << 8) |
- sense_hdr.ascq;
- /* If it is retryable failure, submit the c9 inquiry again */
- if (sense == 0x59136 || sense == 0x68b02 || sense == 0xb8b02 ||
- sense == 0x62900) {
- /* 0x59136 - Command lock contention
- * 0x[6b]8b02 - Quiesense in progress or achieved
- * 0x62900 - Power On, Reset, or Bus Device Reset
- */
- h->cmd_to_send = SEND_C9_INQUIRY;
- queue_work(rdac_wkqd, &h->work);
- goto done;
- }
- if (sense)
- DMINFO("MODE_SELECT failed on %s with sense 0x%x",
- h->path->dev->name, sense);
- }
-failed:
- if (fail || sense)
- dm_pg_init_complete(h->path, MP_FAIL_PATH);
- else
- dm_pg_init_complete(h->path, 0);
-
-done:
- rdac_resubmit_all(h);
- __blk_put_request(req->q, req);
-}
-
-static struct request *get_rdac_req(struct rdac_handler *h,
- void *buffer, unsigned buflen, int rw)
-{
- struct request *rq;
- struct request_queue *q = bdev_get_queue(h->path->dev->bdev);
-
- rq = blk_get_request(q, rw, GFP_KERNEL);
-
- if (!rq) {
- DMINFO("get_rdac_req: blk_get_request failed");
- return NULL;
- }
-
- if (buflen && blk_rq_map_kern(q, rq, buffer, buflen, GFP_KERNEL)) {
- blk_put_request(rq);
- DMINFO("get_rdac_req: blk_rq_map_kern failed");
- return NULL;
- }
-
- rq->sense = h->sense;
- memset(rq->sense, 0, SCSI_SENSE_BUFFERSIZE);
- rq->sense_len = 0;
-
- rq->end_io_data = h;
- rq->timeout = h->timeout;
- rq->cmd_type = REQ_TYPE_BLOCK_PC;
- rq->cmd_flags |= REQ_FAILFAST | REQ_NOMERGE;
- return rq;
-}
-
-static struct request *rdac_failover_get(struct rdac_handler *h)
-{
- struct request *rq;
- struct rdac_mode_common *common;
- unsigned data_size;
-
- if (h->ctlr->use_10_ms) {
- struct rdac_pg_expanded *rdac_pg;
-
- data_size = sizeof(struct rdac_pg_expanded);
- rdac_pg = &h->ctlr->mode_select.expanded;
- memset(rdac_pg, 0, data_size);
- common = &rdac_pg->common;
- rdac_pg->page_code = RDAC_PAGE_CODE_REDUNDANT_CONTROLLER + 0x40;
- rdac_pg->subpage_code = 0x1;
- rdac_pg->page_len[0] = 0x01;
- rdac_pg->page_len[1] = 0x28;
- rdac_pg->lun_table[h->lun] = 0x81;
- } else {
- struct rdac_pg_legacy *rdac_pg;
-
- data_size = sizeof(struct rdac_pg_legacy);
- rdac_pg = &h->ctlr->mode_select.legacy;
- memset(rdac_pg, 0, data_size);
- common = &rdac_pg->common;
- rdac_pg->page_code = RDAC_PAGE_CODE_REDUNDANT_CONTROLLER;
- rdac_pg->page_len = 0x68;
- rdac_pg->lun_table[h->lun] = 0x81;
- }
- common->rdac_mode[1] = RDAC_MODE_TRANSFER_SPECIFIED_LUNS;
- common->quiescence_timeout = RDAC_QUIESCENCE_TIME;
- common->rdac_options = RDAC_FORCED_QUIESENCE;
-
- /* get request for block layer packet command */
- rq = get_rdac_req(h, &h->ctlr->mode_select, data_size, WRITE);
- if (!rq) {
- DMERR("rdac_failover_get: no rq");
- return NULL;
- }
-
- /* Prepare the command. */
- if (h->ctlr->use_10_ms) {
- rq->cmd[0] = MODE_SELECT_10;
- rq->cmd[7] = data_size >> 8;
- rq->cmd[8] = data_size & 0xff;
- } else {
- rq->cmd[0] = MODE_SELECT;
- rq->cmd[4] = data_size;
- }
- rq->cmd_len = COMMAND_SIZE(rq->cmd[0]);
-
- return rq;
-}
-
-/* Acquires h->ctlr->lock */
-static void submit_mode_select(struct rdac_handler *h)
-{
- struct request *rq;
- struct request_queue *q = bdev_get_queue(h->path->dev->bdev);
-
- spin_lock(&h->ctlr->lock);
- if (h->ctlr->submitted) {
- list_add(&h->entry, &h->ctlr->cmd_list);
- goto drop_lock;
- }
-
- if (!q) {
- DMINFO("submit_mode_select: no queue");
- goto fail_path;
- }
-
- rq = rdac_failover_get(h);
- if (!rq) {
- DMERR("submit_mode_select: no rq");
- goto fail_path;
- }
-
- DMINFO("queueing MODE_SELECT command on %s", h->path->dev->name);
-
- blk_execute_rq_nowait(q, NULL, rq, 1, mode_select_endio);
- h->ctlr->submitted = 1;
- goto drop_lock;
-fail_path:
- dm_pg_init_complete(h->path, MP_FAIL_PATH);
-drop_lock:
- spin_unlock(&h->ctlr->lock);
-}
-
-static void release_ctlr(struct kref *kref)
-{
- struct rdac_controller *ctlr;
- ctlr = container_of(kref, struct rdac_controller, kref);
-
- spin_lock(&list_lock);
- list_del(&ctlr->node);
- spin_unlock(&list_lock);
- kfree(ctlr);
-}
-
-static struct rdac_controller *get_controller(u8 *subsys_id, u8 *slot_id)
-{
- struct rdac_controller *ctlr, *tmp;
-
- spin_lock(&list_lock);
-
- list_for_each_entry(tmp, &ctlr_list, node) {
- if ((memcmp(tmp->subsys_id, subsys_id, SUBSYS_ID_LEN) == 0) &&
- (memcmp(tmp->slot_id, slot_id, SLOT_ID_LEN) == 0)) {
- kref_get(&tmp->kref);
- spin_unlock(&list_lock);
- return tmp;
- }
- }
- ctlr = kmalloc(sizeof(*ctlr), GFP_ATOMIC);
- if (!ctlr)
- goto done;
-
- /* initialize fields of controller */
- memcpy(ctlr->subsys_id, subsys_id, SUBSYS_ID_LEN);
- memcpy(ctlr->slot_id, slot_id, SLOT_ID_LEN);
- kref_init(&ctlr->kref);
- spin_lock_init(&ctlr->lock);
- ctlr->submitted = 0;
- ctlr->use_10_ms = -1;
- INIT_LIST_HEAD(&ctlr->cmd_list);
- list_add(&ctlr->node, &ctlr_list);
-done:
- spin_unlock(&list_lock);
- return ctlr;
-}
-
-static void c4_endio(struct request *req, int error)
-{
- struct rdac_handler *h = req->end_io_data;
- struct c4_inquiry *sp;
-
- if (had_failures(req, error)) {
- dm_pg_init_complete(h->path, MP_FAIL_PATH);
- goto done;
- }
-
- sp = &h->inq.c4;
-
- h->ctlr = get_controller(sp->subsys_id, sp->slot_id);
-
- if (h->ctlr) {
- h->cmd_to_send = SEND_C9_INQUIRY;
- queue_work(rdac_wkqd, &h->work);
- } else
- dm_pg_init_complete(h->path, MP_FAIL_PATH);
-done:
- __blk_put_request(req->q, req);
-}
-
-static void c2_endio(struct request *req, int error)
-{
- struct rdac_handler *h = req->end_io_data;
- struct c2_inquiry *sp;
-
- if (had_failures(req, error)) {
- dm_pg_init_complete(h->path, MP_FAIL_PATH);
- goto done;
- }
-
- sp = &h->inq.c2;
-
- /* If more than MODE6_MAX_LUN luns are supported, use mode select 10 */
- if (sp->max_lun_supported >= MODE6_MAX_LUN)
- h->ctlr->use_10_ms = 1;
- else
- h->ctlr->use_10_ms = 0;
-
- h->cmd_to_send = SEND_MODE_SELECT;
- queue_work(rdac_wkqd, &h->work);
-done:
- __blk_put_request(req->q, req);
-}
-
-static void c9_endio(struct request *req, int error)
-{
- struct rdac_handler *h = req->end_io_data;
- struct c9_inquiry *sp;
-
- if (had_failures(req, error)) {
- dm_pg_init_complete(h->path, MP_FAIL_PATH);
- goto done;
- }
-
- /* We need to look at the sense keys here to take clear action.
- * For now simple logic: If the host is in AVT mode or if controller
- * owns the lun, return dm_pg_init_complete(), otherwise submit
- * MODE SELECT.
- */
- sp = &h->inq.c9;
-
- /* If in AVT mode, return success */
- if ((sp->avte_cvp >> 7) == 0x1) {
- dm_pg_init_complete(h->path, 0);
- goto done;
- }
-
- /* If the controller on this path owns the LUN, return success */
- if (sp->avte_cvp & 0x1) {
- dm_pg_init_complete(h->path, 0);
- goto done;
- }
-
- if (h->ctlr) {
- if (h->ctlr->use_10_ms == -1)
- h->cmd_to_send = SEND_C2_INQUIRY;
- else
- h->cmd_to_send = SEND_MODE_SELECT;
- } else
- h->cmd_to_send = SEND_C4_INQUIRY;
- queue_work(rdac_wkqd, &h->work);
-done:
- __blk_put_request(req->q, req);
-}
-
-static void c8_endio(struct request *req, int error)
-{
- struct rdac_handler *h = req->end_io_data;
- struct c8_inquiry *sp;
-
- if (had_failures(req, error)) {
- dm_pg_init_complete(h->path, MP_FAIL_PATH);
- goto done;
- }
-
- /* We need to look at the sense keys here to take clear action.
- * For now simple logic: Get the lun from the inquiry page.
- */
- sp = &h->inq.c8;
- h->lun = sp->lun[7]; /* currently it uses only one byte */
- h->cmd_to_send = SEND_C9_INQUIRY;
- queue_work(rdac_wkqd, &h->work);
-done:
- __blk_put_request(req->q, req);
-}
-
-static void submit_inquiry(struct rdac_handler *h, int page_code,
- unsigned int len, rq_end_io_fn endio)
-{
- struct request *rq;
- struct request_queue *q = bdev_get_queue(h->path->dev->bdev);
-
- if (!q)
- goto fail_path;
-
- rq = get_rdac_req(h, &h->inq, len, READ);
- if (!rq)
- goto fail_path;
-
- /* Prepare the command. */
- rq->cmd[0] = INQUIRY;
- rq->cmd[1] = 1;
- rq->cmd[2] = page_code;
- rq->cmd[4] = len;
- rq->cmd_len = COMMAND_SIZE(INQUIRY);
- blk_execute_rq_nowait(q, NULL, rq, 1, endio);
- return;
-
-fail_path:
- dm_pg_init_complete(h->path, MP_FAIL_PATH);
-}
-
-static void service_wkq(struct work_struct *work)
-{
- struct rdac_handler *h = container_of(work, struct rdac_handler, work);
-
- switch (h->cmd_to_send) {
- case SEND_C2_INQUIRY:
- submit_inquiry(h, 0xC2, sizeof(struct c2_inquiry), c2_endio);
- break;
- case SEND_C4_INQUIRY:
- submit_inquiry(h, 0xC4, sizeof(struct c4_inquiry), c4_endio);
- break;
- case SEND_C8_INQUIRY:
- submit_inquiry(h, 0xC8, sizeof(struct c8_inquiry), c8_endio);
- break;
- case SEND_C9_INQUIRY:
- submit_inquiry(h, 0xC9, sizeof(struct c9_inquiry), c9_endio);
- break;
- case SEND_MODE_SELECT:
- submit_mode_select(h);
- break;
- default:
- BUG();
- }
-}
-/*
- * only support subpage2c until we confirm that this is just a matter of
- * of updating firmware or not, and RDAC (basic AVT works already) for now
- * but we can add these in in when we get time and testers
- */
-static int rdac_create(struct hw_handler *hwh, unsigned argc, char **argv)
-{
- struct rdac_handler *h;
- unsigned timeout;
-
- if (argc == 0) {
- /* No arguments: use defaults */
- timeout = RDAC_FAILOVER_TIMEOUT;
- } else if (argc != 1) {
- DMWARN("incorrect number of arguments");
- return -EINVAL;
- } else {
- if (sscanf(argv[1], "%u", &timeout) != 1) {
- DMWARN("invalid timeout value");
- return -EINVAL;
- }
- }
-
- h = kzalloc(sizeof(*h), GFP_KERNEL);
- if (!h)
- return -ENOMEM;
-
- hwh->context = h;
- h->timeout = timeout;
- h->lun = UNINITIALIZED_LUN;
- INIT_WORK(&h->work, service_wkq);
- DMWARN("using RDAC command with timeout %u", h->timeout);
-
- return 0;
-}
-
-static void rdac_destroy(struct hw_handler *hwh)
-{
- struct rdac_handler *h = hwh->context;
-
- if (h->ctlr)
- kref_put(&h->ctlr->kref, release_ctlr);
- kfree(h);
- hwh->context = NULL;
-}
-
-static unsigned rdac_error(struct hw_handler *hwh, struct bio *bio)
-{
- /* Try default handler */
- return dm_scsi_err_handler(hwh, bio);
-}
-
-static void rdac_pg_init(struct hw_handler *hwh, unsigned bypassed,
- struct dm_path *path)
-{
- struct rdac_handler *h = hwh->context;
-
- h->path = path;
- switch (h->lun) {
- case UNINITIALIZED_LUN:
- submit_inquiry(h, 0xC8, sizeof(struct c8_inquiry), c8_endio);
- break;
- default:
- submit_inquiry(h, 0xC9, sizeof(struct c9_inquiry), c9_endio);
- }
-}
-
-static struct hw_handler_type rdac_handler = {
- .name = RDAC_DM_HWH_NAME,
- .module = THIS_MODULE,
- .create = rdac_create,
- .destroy = rdac_destroy,
- .pg_init = rdac_pg_init,
- .error = rdac_error,
-};
-
-static int __init rdac_init(void)
-{
- int r;
-
- rdac_wkqd = create_singlethread_workqueue("rdac_wkqd");
- if (!rdac_wkqd) {
- DMERR("Failed to create workqueue rdac_wkqd.");
- return -ENOMEM;
- }
-
- r = dm_register_hw_handler(&rdac_handler);
- if (r < 0) {
- DMERR("%s: register failed %d", RDAC_DM_HWH_NAME, r);
- destroy_workqueue(rdac_wkqd);
- return r;
- }
-
- DMINFO("%s: version %s loaded", RDAC_DM_HWH_NAME, RDAC_DM_HWH_VER);
- return 0;
-}
-
-static void __exit rdac_exit(void)
-{
- int r = dm_unregister_hw_handler(&rdac_handler);
-
- destroy_workqueue(rdac_wkqd);
- if (r < 0)
- DMERR("%s: unregister failed %d", RDAC_DM_HWH_NAME, r);
-}
-
-module_init(rdac_init);
-module_exit(rdac_exit);
-
-MODULE_DESCRIPTION("DM Multipath LSI/Engenio RDAC support");
-MODULE_AUTHOR("Mike Christie, Chandra Seetharaman");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(RDAC_DM_HWH_VER);
diff --git a/drivers/md/dm-mpath.c b/drivers/md/dm-mpath.c
index e7ee59e..9f7302d 100644
--- a/drivers/md/dm-mpath.c
+++ b/drivers/md/dm-mpath.c
@@ -7,7 +7,6 @@
#include "dm.h"
#include "dm-path-selector.h"
-#include "dm-hw-handler.h"
#include "dm-bio-list.h"
#include "dm-bio-record.h"
#include "dm-uevent.h"
@@ -20,6 +19,7 @@
#include <linux/slab.h>
#include <linux/time.h>
#include <linux/workqueue.h>
+#include <scsi/scsi_dh.h>
#include <asm/atomic.h>
#define DM_MSG_PREFIX "multipath"
@@ -61,7 +61,8 @@
spinlock_t lock;
- struct hw_handler hw_handler;
+ const char *hw_handler_name;
+ struct work_struct activate_path;
unsigned nr_priority_groups;
struct list_head priority_groups;
unsigned pg_init_required; /* pg_init needs calling? */
@@ -106,9 +107,10 @@
static struct kmem_cache *_mpio_cache;
-static struct workqueue_struct *kmultipathd;
+static struct workqueue_struct *kmultipathd, *kmpath_handlerd;
static void process_queued_ios(struct work_struct *work);
static void trigger_event(struct work_struct *work);
+static void activate_path(struct work_struct *work);
/*-----------------------------------------------
@@ -178,6 +180,7 @@
m->queue_io = 1;
INIT_WORK(&m->process_queued_ios, process_queued_ios);
INIT_WORK(&m->trigger_event, trigger_event);
+ INIT_WORK(&m->activate_path, activate_path);
m->mpio_pool = mempool_create_slab_pool(MIN_IOS, _mpio_cache);
if (!m->mpio_pool) {
kfree(m);
@@ -193,18 +196,13 @@
static void free_multipath(struct multipath *m)
{
struct priority_group *pg, *tmp;
- struct hw_handler *hwh = &m->hw_handler;
list_for_each_entry_safe(pg, tmp, &m->priority_groups, list) {
list_del(&pg->list);
free_priority_group(pg, m->ti);
}
- if (hwh->type) {
- hwh->type->destroy(hwh);
- dm_put_hw_handler(hwh->type);
- }
-
+ kfree(m->hw_handler_name);
mempool_destroy(m->mpio_pool);
kfree(m);
}
@@ -216,12 +214,10 @@
static void __switch_pg(struct multipath *m, struct pgpath *pgpath)
{
- struct hw_handler *hwh = &m->hw_handler;
-
m->current_pg = pgpath->pg;
/* Must we initialise the PG first, and queue I/O till it's ready? */
- if (hwh->type && hwh->type->pg_init) {
+ if (m->hw_handler_name) {
m->pg_init_required = 1;
m->queue_io = 1;
} else {
@@ -409,7 +405,6 @@
{
struct multipath *m =
container_of(work, struct multipath, process_queued_ios);
- struct hw_handler *hwh = &m->hw_handler;
struct pgpath *pgpath = NULL;
unsigned init_required = 0, must_queue = 1;
unsigned long flags;
@@ -439,7 +434,7 @@
spin_unlock_irqrestore(&m->lock, flags);
if (init_required)
- hwh->type->pg_init(hwh, pgpath->pg->bypassed, &pgpath->path);
+ queue_work(kmpath_handlerd, &m->activate_path);
if (!must_queue)
dispatch_queued_ios(m);
@@ -652,8 +647,6 @@
static int parse_hw_handler(struct arg_set *as, struct multipath *m)
{
- int r;
- struct hw_handler_type *hwht;
unsigned hw_argc;
struct dm_target *ti = m->ti;
@@ -661,30 +654,20 @@
{0, 1024, "invalid number of hardware handler args"},
};
- r = read_param(_params, shift(as), &hw_argc, &ti->error);
- if (r)
+ if (read_param(_params, shift(as), &hw_argc, &ti->error))
return -EINVAL;
if (!hw_argc)
return 0;
- hwht = dm_get_hw_handler(shift(as));
- if (!hwht) {
+ m->hw_handler_name = kstrdup(shift(as), GFP_KERNEL);
+ request_module("scsi_dh_%s", m->hw_handler_name);
+ if (scsi_dh_handler_exist(m->hw_handler_name) == 0) {
ti->error = "unknown hardware handler type";
+ kfree(m->hw_handler_name);
+ m->hw_handler_name = NULL;
return -EINVAL;
}
-
- m->hw_handler.md = dm_table_get_md(ti->table);
- dm_put(m->hw_handler.md);
-
- r = hwht->create(&m->hw_handler, hw_argc - 1, as->argv);
- if (r) {
- dm_put_hw_handler(hwht);
- ti->error = "hardware handler constructor failed";
- return r;
- }
-
- m->hw_handler.type = hwht;
consume(as, hw_argc - 1);
return 0;
@@ -808,6 +791,7 @@
{
struct multipath *m = (struct multipath *) ti->private;
+ flush_workqueue(kmpath_handlerd);
flush_workqueue(kmultipathd);
free_multipath(m);
}
@@ -1025,52 +1009,85 @@
return limit_reached;
}
-/*
- * pg_init must call this when it has completed its initialisation
- */
-void dm_pg_init_complete(struct dm_path *path, unsigned err_flags)
+static void pg_init_done(struct dm_path *path, int errors)
{
struct pgpath *pgpath = path_to_pgpath(path);
struct priority_group *pg = pgpath->pg;
struct multipath *m = pg->m;
unsigned long flags;
- /*
- * If requested, retry pg_init until maximum number of retries exceeded.
- * If retry not requested and PG already bypassed, always fail the path.
- */
- if (err_flags & MP_RETRY) {
- if (pg_init_limit_reached(m, pgpath))
- err_flags |= MP_FAIL_PATH;
- } else if (err_flags && pg->bypassed)
- err_flags |= MP_FAIL_PATH;
-
- if (err_flags & MP_FAIL_PATH)
+ /* device or driver problems */
+ switch (errors) {
+ case SCSI_DH_OK:
+ break;
+ case SCSI_DH_NOSYS:
+ if (!m->hw_handler_name) {
+ errors = 0;
+ break;
+ }
+ DMERR("Cannot failover device because scsi_dh_%s was not "
+ "loaded.", m->hw_handler_name);
+ /*
+ * Fail path for now, so we do not ping pong
+ */
fail_path(pgpath);
-
- if (err_flags & MP_BYPASS_PG)
+ break;
+ case SCSI_DH_DEV_TEMP_BUSY:
+ /*
+ * Probably doing something like FW upgrade on the
+ * controller so try the other pg.
+ */
bypass_pg(m, pg, 1);
+ break;
+ /* TODO: For SCSI_DH_RETRY we should wait a couple seconds */
+ case SCSI_DH_RETRY:
+ case SCSI_DH_IMM_RETRY:
+ case SCSI_DH_RES_TEMP_UNAVAIL:
+ if (pg_init_limit_reached(m, pgpath))
+ fail_path(pgpath);
+ errors = 0;
+ break;
+ default:
+ /*
+ * We probably do not want to fail the path for a device
+ * error, but this is what the old dm did. In future
+ * patches we can do more advanced handling.
+ */
+ fail_path(pgpath);
+ }
spin_lock_irqsave(&m->lock, flags);
- if (err_flags & ~MP_RETRY) {
+ if (errors) {
+ DMERR("Could not failover device. Error %d.", errors);
m->current_pgpath = NULL;
m->current_pg = NULL;
- } else if (!m->pg_init_required)
+ } else if (!m->pg_init_required) {
m->queue_io = 0;
+ pg->bypassed = 0;
+ }
m->pg_init_in_progress = 0;
queue_work(kmultipathd, &m->process_queued_ios);
spin_unlock_irqrestore(&m->lock, flags);
}
+static void activate_path(struct work_struct *work)
+{
+ int ret;
+ struct multipath *m =
+ container_of(work, struct multipath, activate_path);
+ struct dm_path *path = &m->current_pgpath->path;
+
+ ret = scsi_dh_activate(bdev_get_queue(path->dev->bdev));
+ pg_init_done(path, ret);
+}
+
/*
* end_io handling
*/
static int do_end_io(struct multipath *m, struct bio *bio,
int error, struct dm_mpath_io *mpio)
{
- struct hw_handler *hwh = &m->hw_handler;
- unsigned err_flags = MP_FAIL_PATH; /* Default behavior */
unsigned long flags;
if (!error)
@@ -1097,19 +1114,8 @@
}
spin_unlock_irqrestore(&m->lock, flags);
- if (hwh->type && hwh->type->error)
- err_flags = hwh->type->error(hwh, bio);
-
- if (mpio->pgpath) {
- if (err_flags & MP_FAIL_PATH)
- fail_path(mpio->pgpath);
-
- if (err_flags & MP_BYPASS_PG)
- bypass_pg(m, mpio->pgpath->pg, 1);
- }
-
- if (err_flags & MP_ERROR_IO)
- return -EIO;
+ if (mpio->pgpath)
+ fail_path(mpio->pgpath);
requeue:
dm_bio_restore(&mpio->details, bio);
@@ -1194,7 +1200,6 @@
int sz = 0;
unsigned long flags;
struct multipath *m = (struct multipath *) ti->private;
- struct hw_handler *hwh = &m->hw_handler;
struct priority_group *pg;
struct pgpath *p;
unsigned pg_num;
@@ -1214,12 +1219,10 @@
DMEMIT("pg_init_retries %u ", m->pg_init_retries);
}
- if (hwh->type && hwh->type->status)
- sz += hwh->type->status(hwh, type, result + sz, maxlen - sz);
- else if (!hwh->type || type == STATUSTYPE_INFO)
+ if (!m->hw_handler_name || type == STATUSTYPE_INFO)
DMEMIT("0 ");
else
- DMEMIT("1 %s ", hwh->type->name);
+ DMEMIT("1 %s ", m->hw_handler_name);
DMEMIT("%u ", m->nr_priority_groups);
@@ -1422,6 +1425,21 @@
return -ENOMEM;
}
+ /*
+ * A separate workqueue is used to handle the device handlers
+ * to avoid overloading existing workqueue. Overloading the
+ * old workqueue would also create a bottleneck in the
+ * path of the storage hardware device activation.
+ */
+ kmpath_handlerd = create_singlethread_workqueue("kmpath_handlerd");
+ if (!kmpath_handlerd) {
+ DMERR("failed to create workqueue kmpath_handlerd");
+ destroy_workqueue(kmultipathd);
+ dm_unregister_target(&multipath_target);
+ kmem_cache_destroy(_mpio_cache);
+ return -ENOMEM;
+ }
+
DMINFO("version %u.%u.%u loaded",
multipath_target.version[0], multipath_target.version[1],
multipath_target.version[2]);
@@ -1433,6 +1451,7 @@
{
int r;
+ destroy_workqueue(kmpath_handlerd);
destroy_workqueue(kmultipathd);
r = dm_unregister_target(&multipath_target);
@@ -1441,8 +1460,6 @@
kmem_cache_destroy(_mpio_cache);
}
-EXPORT_SYMBOL_GPL(dm_pg_init_complete);
-
module_init(dm_multipath_init);
module_exit(dm_multipath_exit);
diff --git a/drivers/md/dm-mpath.h b/drivers/md/dm-mpath.h
index b9cdcbb..c198b85 100644
--- a/drivers/md/dm-mpath.h
+++ b/drivers/md/dm-mpath.h
@@ -16,7 +16,6 @@
unsigned is_active; /* Read-only */
void *pscontext; /* For path-selector use */
- void *hwhcontext; /* For hw-handler use */
};
/* Callback for hwh_pg_init_fn to use when complete */
diff --git a/drivers/message/fusion/lsi/mpi.h b/drivers/message/fusion/lsi/mpi.h
index 1acbdd61..10b6ef7 100644
--- a/drivers/message/fusion/lsi/mpi.h
+++ b/drivers/message/fusion/lsi/mpi.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2007 LSI Corporation.
+ * Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi.h
diff --git a/drivers/message/fusion/lsi/mpi_cnfg.h b/drivers/message/fusion/lsi/mpi_cnfg.h
index 2bd8ada..b2db333 100644
--- a/drivers/message/fusion/lsi/mpi_cnfg.h
+++ b/drivers/message/fusion/lsi/mpi_cnfg.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2000-2007 LSI Corporation.
+ * Copyright (c) 2000-2008 LSI Corporation.
*
*
* Name: mpi_cnfg.h
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c
index d40d6d1..75e599b 100644
--- a/drivers/message/fusion/mptbase.c
+++ b/drivers/message/fusion/mptbase.c
@@ -5,7 +5,7 @@
* For use with LSI PCI chip/adapter(s)
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
@@ -103,7 +103,7 @@
* Public data...
*/
-struct proc_dir_entry *mpt_proc_root_dir;
+static struct proc_dir_entry *mpt_proc_root_dir;
#define WHOINIT_UNKNOWN 0xAA
@@ -253,6 +253,55 @@
return 0;
}
+/**
+ * mpt_fault_reset_work - work performed on workq after ioc fault
+ * @work: input argument, used to derive ioc
+ *
+**/
+static void
+mpt_fault_reset_work(struct work_struct *work)
+{
+ MPT_ADAPTER *ioc =
+ container_of(work, MPT_ADAPTER, fault_reset_work.work);
+ u32 ioc_raw_state;
+ int rc;
+ unsigned long flags;
+
+ if (ioc->diagPending || !ioc->active)
+ goto out;
+
+ ioc_raw_state = mpt_GetIocState(ioc, 0);
+ if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT) {
+ printk(MYIOC_s_WARN_FMT "IOC is in FAULT state (%04xh)!!!\n",
+ ioc->name, ioc_raw_state & MPI_DOORBELL_DATA_MASK);
+ printk(MYIOC_s_WARN_FMT "Issuing HardReset from %s!!\n",
+ ioc->name, __FUNCTION__);
+ rc = mpt_HardResetHandler(ioc, CAN_SLEEP);
+ printk(MYIOC_s_WARN_FMT "%s: HardReset: %s\n", ioc->name,
+ __FUNCTION__, (rc == 0) ? "success" : "failed");
+ ioc_raw_state = mpt_GetIocState(ioc, 0);
+ if ((ioc_raw_state & MPI_IOC_STATE_MASK) == MPI_IOC_STATE_FAULT)
+ printk(MYIOC_s_WARN_FMT "IOC is in FAULT state after "
+ "reset (%04xh)\n", ioc->name, ioc_raw_state &
+ MPI_DOORBELL_DATA_MASK);
+ }
+
+ out:
+ /*
+ * Take turns polling alternate controller
+ */
+ if (ioc->alt_ioc)
+ ioc = ioc->alt_ioc;
+
+ /* rearm the timer */
+ spin_lock_irqsave(&ioc->fault_reset_work_lock, flags);
+ if (ioc->reset_work_q)
+ queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
+ msecs_to_jiffies(MPT_POLLING_INTERVAL));
+ spin_unlock_irqrestore(&ioc->fault_reset_work_lock, flags);
+}
+
+
/*
* Process turbo (context) reply...
*/
@@ -1616,6 +1665,22 @@
/* Find lookup slot. */
INIT_LIST_HEAD(&ioc->list);
+
+ /* Initialize workqueue */
+ INIT_DELAYED_WORK(&ioc->fault_reset_work, mpt_fault_reset_work);
+ spin_lock_init(&ioc->fault_reset_work_lock);
+
+ snprintf(ioc->reset_work_q_name, KOBJ_NAME_LEN, "mpt_poll_%d", ioc->id);
+ ioc->reset_work_q =
+ create_singlethread_workqueue(ioc->reset_work_q_name);
+ if (!ioc->reset_work_q) {
+ printk(MYIOC_s_ERR_FMT "Insufficient memory to add adapter!\n",
+ ioc->name);
+ pci_release_selected_regions(pdev, ioc->bars);
+ kfree(ioc);
+ return -ENOMEM;
+ }
+
dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "facts @ %p, pfacts[0] @ %p\n",
ioc->name, &ioc->facts, &ioc->pfacts[0]));
@@ -1727,6 +1792,10 @@
iounmap(ioc->memmap);
if (r != -5)
pci_release_selected_regions(pdev, ioc->bars);
+
+ destroy_workqueue(ioc->reset_work_q);
+ ioc->reset_work_q = NULL;
+
kfree(ioc);
pci_set_drvdata(pdev, NULL);
return r;
@@ -1759,6 +1828,10 @@
}
#endif
+ if (!ioc->alt_ioc)
+ queue_delayed_work(ioc->reset_work_q, &ioc->fault_reset_work,
+ msecs_to_jiffies(MPT_POLLING_INTERVAL));
+
return 0;
}
@@ -1774,6 +1847,19 @@
MPT_ADAPTER *ioc = pci_get_drvdata(pdev);
char pname[32];
u8 cb_idx;
+ unsigned long flags;
+ struct workqueue_struct *wq;
+
+ /*
+ * Stop polling ioc for fault condition
+ */
+ spin_lock_irqsave(&ioc->fault_reset_work_lock, flags);
+ wq = ioc->reset_work_q;
+ ioc->reset_work_q = NULL;
+ spin_unlock_irqrestore(&ioc->fault_reset_work_lock, flags);
+ cancel_delayed_work(&ioc->fault_reset_work);
+ destroy_workqueue(wq);
+
sprintf(pname, MPT_PROCFS_MPTBASEDIR "/%s/summary", ioc->name);
remove_proc_entry(pname, NULL);
@@ -7456,7 +7542,6 @@
EXPORT_SYMBOL(mpt_suspend);
#endif
EXPORT_SYMBOL(ioc_list);
-EXPORT_SYMBOL(mpt_proc_root_dir);
EXPORT_SYMBOL(mpt_register);
EXPORT_SYMBOL(mpt_deregister);
EXPORT_SYMBOL(mpt_event_register);
diff --git a/drivers/message/fusion/mptbase.h b/drivers/message/fusion/mptbase.h
index a8f6174..6adab64 100644
--- a/drivers/message/fusion/mptbase.h
+++ b/drivers/message/fusion/mptbase.h
@@ -5,7 +5,7 @@
* LSIFC9xx/LSI409xx Fibre Channel
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
@@ -73,11 +73,11 @@
#endif
#ifndef COPYRIGHT
-#define COPYRIGHT "Copyright (c) 1999-2007 " MODULEAUTHOR
+#define COPYRIGHT "Copyright (c) 1999-2008 " MODULEAUTHOR
#endif
-#define MPT_LINUX_VERSION_COMMON "3.04.06"
-#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.06"
+#define MPT_LINUX_VERSION_COMMON "3.04.07"
+#define MPT_LINUX_PACKAGE_NAME "@(#)mptlinux-3.04.07"
#define WHAT_MAGIC_STRING "@" "(" "#" ")"
#define show_mptmod_ver(s,ver) \
@@ -176,6 +176,8 @@
/* debug print string length used for events and iocstatus */
# define EVENT_DESCR_STR_SZ 100
+#define MPT_POLLING_INTERVAL 1000 /* in milliseconds */
+
#ifdef __KERNEL__ /* { */
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
@@ -709,6 +711,12 @@
struct workqueue_struct *fc_rescan_work_q;
struct scsi_cmnd **ScsiLookup;
spinlock_t scsi_lookup_lock;
+
+ char reset_work_q_name[KOBJ_NAME_LEN];
+ struct workqueue_struct *reset_work_q;
+ struct delayed_work fault_reset_work;
+ spinlock_t fault_reset_work_lock;
+
} MPT_ADAPTER;
/*
@@ -919,7 +927,6 @@
* Public data decl's...
*/
extern struct list_head ioc_list;
-extern struct proc_dir_entry *mpt_proc_root_dir;
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
#endif /* } __KERNEL__ */
diff --git a/drivers/message/fusion/mptctl.c b/drivers/message/fusion/mptctl.c
index c594656..a592042 100644
--- a/drivers/message/fusion/mptctl.c
+++ b/drivers/message/fusion/mptctl.c
@@ -4,7 +4,7 @@
* For use with LSI PCI chip/adapters
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
@@ -66,7 +66,7 @@
#include <scsi/scsi_host.h>
#include <scsi/scsi_tcq.h>
-#define COPYRIGHT "Copyright (c) 1999-2007 LSI Corporation"
+#define COPYRIGHT "Copyright (c) 1999-2008 LSI Corporation"
#define MODULEAUTHOR "LSI Corporation"
#include "mptbase.h"
#include "mptctl.h"
diff --git a/drivers/message/fusion/mptctl.h b/drivers/message/fusion/mptctl.h
index 2c18901..d564cc9 100644
--- a/drivers/message/fusion/mptctl.h
+++ b/drivers/message/fusion/mptctl.h
@@ -5,7 +5,7 @@
* LSIFC9xx/LSI409xx Fibre Channel
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
diff --git a/drivers/message/fusion/mptdebug.h b/drivers/message/fusion/mptdebug.h
index ffdb0a6..510b9f4 100644
--- a/drivers/message/fusion/mptdebug.h
+++ b/drivers/message/fusion/mptdebug.h
@@ -3,7 +3,7 @@
* For use with LSI PCI chip/adapter(s)
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
diff --git a/drivers/message/fusion/mptfc.c b/drivers/message/fusion/mptfc.c
index 1e24ab4..fc31ca6 100644
--- a/drivers/message/fusion/mptfc.c
+++ b/drivers/message/fusion/mptfc.c
@@ -3,7 +3,7 @@
* For use with LSI PCI chip/adapter(s)
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
diff --git a/drivers/message/fusion/mptlan.c b/drivers/message/fusion/mptlan.c
index 7950fc67..d709d92 100644
--- a/drivers/message/fusion/mptlan.c
+++ b/drivers/message/fusion/mptlan.c
@@ -4,7 +4,7 @@
* For use with LSI Fibre Channel PCI chip/adapters
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 2000-2007 LSI Corporation
+ * Copyright (c) 2000-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
diff --git a/drivers/message/fusion/mptlan.h b/drivers/message/fusion/mptlan.h
index bafb67f..33927ee 100644
--- a/drivers/message/fusion/mptlan.h
+++ b/drivers/message/fusion/mptlan.h
@@ -4,7 +4,7 @@
* For use with LSI Fibre Channel PCI chip/adapters
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 2000-2007 LSI Corporation
+ * Copyright (c) 2000-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
diff --git a/drivers/message/fusion/mptsas.c b/drivers/message/fusion/mptsas.c
index 4d492ba..b1147aa 100644
--- a/drivers/message/fusion/mptsas.c
+++ b/drivers/message/fusion/mptsas.c
@@ -3,7 +3,7 @@
* For use with LSI PCI chip/adapter(s)
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*/
/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
diff --git a/drivers/message/fusion/mptsas.h b/drivers/message/fusion/mptsas.h
index 7c150f5..2b544e0 100644
--- a/drivers/message/fusion/mptsas.h
+++ b/drivers/message/fusion/mptsas.h
@@ -5,7 +5,7 @@
* LSIFC9xx/LSI409xx Fibre Channel
* running LSI MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
diff --git a/drivers/message/fusion/mptscsih.c b/drivers/message/fusion/mptscsih.c
index c68ef00..d142b6b 100644
--- a/drivers/message/fusion/mptscsih.c
+++ b/drivers/message/fusion/mptscsih.c
@@ -3,7 +3,7 @@
* For use with LSI PCI chip/adapter(s)
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
diff --git a/drivers/message/fusion/mptscsih.h b/drivers/message/fusion/mptscsih.h
index 7ea7da0..319aa30 100644
--- a/drivers/message/fusion/mptscsih.h
+++ b/drivers/message/fusion/mptscsih.h
@@ -5,7 +5,7 @@
* LSIFC9xx/LSI409xx Fibre Channel
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
diff --git a/drivers/message/fusion/mptspi.c b/drivers/message/fusion/mptspi.c
index 1effca4..6162014 100644
--- a/drivers/message/fusion/mptspi.c
+++ b/drivers/message/fusion/mptspi.c
@@ -3,7 +3,7 @@
* For use with LSI PCI chip/adapter(s)
* running LSI Fusion MPT (Message Passing Technology) firmware.
*
- * Copyright (c) 1999-2007 LSI Corporation
+ * Copyright (c) 1999-2008 LSI Corporation
* (mailto:DL-MPTFusionLinux@lsi.com)
*
*/
@@ -447,6 +447,7 @@
spi_max_offset(starget) = ioc->spi_data.maxSyncOffset;
spi_offset(starget) = 0;
+ spi_period(starget) = 0xFF;
mptspi_write_width(starget, 0);
return 0;
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 17bc87a..d2fbc29 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -258,13 +258,6 @@
help
Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
-config MTD_MTX1
- tristate "4G Systems MTX-1 Flash device"
- depends on MIPS_MTX1 && MTD_CFI
- help
- Flash memory access on 4G Systems MTX-1 Board. If you have one of
- these boards and would like to use the flash chips on it, say 'Y'.
-
config MTD_DILNETPC
tristate "CFI Flash device mapped on DIL/Net PC"
depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 957fb5f..c6ce867 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -65,5 +65,4 @@
obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
-obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o
diff --git a/drivers/mtd/maps/mtx-1_flash.c b/drivers/mtd/maps/mtx-1_flash.c
deleted file mode 100644
index 2a8fde9..0000000
--- a/drivers/mtd/maps/mtx-1_flash.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Flash memory access on 4G Systems MTX-1 boards
- *
- * $Id: mtx-1_flash.c,v 1.2 2005/11/07 11:14:27 gleixner Exp $
- *
- * (C) 2005 Bruno Randolf <bruno.randolf@4g-systems.biz>
- * (C) 2005 Joern Engel <joern@wohnheim.fh-wedel.de>
- *
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/map.h>
-#include <linux/mtd/partitions.h>
-
-#include <asm/io.h>
-
-static struct map_info mtx1_map = {
- .name = "MTX-1 flash",
- .bankwidth = 4,
- .size = 0x2000000,
- .phys = 0x1E000000,
-};
-
-static struct mtd_partition mtx1_partitions[] = {
- {
- .name = "filesystem",
- .size = 0x01C00000,
- .offset = 0,
- },{
- .name = "yamon",
- .size = 0x00100000,
- .offset = MTDPART_OFS_APPEND,
- .mask_flags = MTD_WRITEABLE,
- },{
- .name = "kernel",
- .size = 0x002c0000,
- .offset = MTDPART_OFS_APPEND,
- },{
- .name = "yamon env",
- .size = 0x00040000,
- .offset = MTDPART_OFS_APPEND,
- }
-};
-
-static struct mtd_info *mtx1_mtd;
-
-int __init mtx1_mtd_init(void)
-{
- int ret = -ENXIO;
-
- simple_map_init(&mtx1_map);
-
- mtx1_map.virt = ioremap(mtx1_map.phys, mtx1_map.size);
- if (!mtx1_map.virt)
- return -EIO;
-
- mtx1_mtd = do_map_probe("cfi_probe", &mtx1_map);
- if (!mtx1_mtd)
- goto err;
-
- mtx1_mtd->owner = THIS_MODULE;
-
- ret = add_mtd_partitions(mtx1_mtd, mtx1_partitions,
- ARRAY_SIZE(mtx1_partitions));
- if (ret)
- goto err;
-
- return 0;
-
-err:
- iounmap(mtx1_map.virt);
- return ret;
-}
-
-static void __exit mtx1_mtd_cleanup(void)
-{
- if (mtx1_mtd) {
- del_mtd_partitions(mtx1_mtd);
- map_destroy(mtx1_mtd);
- }
- if (mtx1_map.virt)
- iounmap(mtx1_map.virt);
-}
-
-module_init(mtx1_mtd_init);
-module_exit(mtx1_mtd_cleanup);
-
-MODULE_AUTHOR("Bruno Randolf <bruno.randolf@4g-systems.biz>");
-MODULE_DESCRIPTION("MTX-1 flash map");
-MODULE_LICENSE("GPL");
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 45a41b5..2683ee3 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1884,7 +1884,6 @@
Say Y here if you want to use the NE2000 compatible
controller on the Renesas H8/300 processor.
-source "drivers/net/fec_8xx/Kconfig"
source "drivers/net/fs_enet/Kconfig"
endif # NET_ETHERNET
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index dcbfe84..9010e58 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -217,7 +217,6 @@
obj-$(CONFIG_SMC911X) += smc911x.o
obj-$(CONFIG_BFIN_MAC) += bfin_mac.o
obj-$(CONFIG_DM9000) += dm9000.o
-obj-$(CONFIG_FEC_8XX) += fec_8xx/
obj-$(CONFIG_PASEMI_MAC) += pasemi_mac_driver.o
pasemi_mac_driver-objs := pasemi_mac.o pasemi_mac_ethtool.o
obj-$(CONFIG_MLX4_CORE) += mlx4/
diff --git a/drivers/net/fec_8xx/Kconfig b/drivers/net/fec_8xx/Kconfig
deleted file mode 100644
index afb34de..0000000
--- a/drivers/net/fec_8xx/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
-config FEC_8XX
- tristate "Motorola 8xx FEC driver"
- depends on 8XX
- select MII
-
-config FEC_8XX_GENERIC_PHY
- bool "Support any generic PHY"
- depends on FEC_8XX
- default y
-
-config FEC_8XX_DM9161_PHY
- bool "Support DM9161 PHY"
- depends on FEC_8XX
- default n
-
-config FEC_8XX_LXT971_PHY
- bool "Support LXT971/LXT972 PHY"
- depends on FEC_8XX
- default n
-
diff --git a/drivers/net/fec_8xx/Makefile b/drivers/net/fec_8xx/Makefile
deleted file mode 100644
index 70c54f8..0000000
--- a/drivers/net/fec_8xx/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
-#
-# Makefile for the Motorola 8xx FEC ethernet controller
-#
-
-obj-$(CONFIG_FEC_8XX) += fec_8xx.o
-
-fec_8xx-objs := fec_main.o fec_mii.o
-
-# the platform instantatiation objects
-ifeq ($(CONFIG_NETTA),y)
-fec_8xx-objs += fec_8xx-netta.o
-endif
diff --git a/drivers/net/fec_8xx/fec_8xx-netta.c b/drivers/net/fec_8xx/fec_8xx-netta.c
deleted file mode 100644
index 79deee2..0000000
--- a/drivers/net/fec_8xx/fec_8xx-netta.c
+++ /dev/null
@@ -1,151 +0,0 @@
-/*
- * FEC instantatiation file for NETTA
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/mii.h>
-#include <linux/ethtool.h>
-#include <linux/bitops.h>
-
-#include <asm/8xx_immap.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/cpm1.h>
-
-#include "fec_8xx.h"
-
-/*************************************************/
-
-static struct fec_platform_info fec1_info = {
- .fec_no = 0,
- .use_mdio = 1,
- .phy_addr = 8,
- .fec_irq = SIU_LEVEL1,
- .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC6,
- .rx_ring = 128,
- .tx_ring = 16,
- .rx_copybreak = 240,
- .use_napi = 1,
- .napi_weight = 17,
-};
-
-static struct fec_platform_info fec2_info = {
- .fec_no = 1,
- .use_mdio = 1,
- .phy_addr = 2,
- .fec_irq = SIU_LEVEL3,
- .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC7,
- .rx_ring = 128,
- .tx_ring = 16,
- .rx_copybreak = 240,
- .use_napi = 1,
- .napi_weight = 17,
-};
-
-static struct net_device *fec1_dev;
-static struct net_device *fec2_dev;
-
-/* XXX custom u-boot & Linux startup needed */
-extern const char *__fw_getenv(const char *var);
-
-/* access ports */
-#define setbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) | (_v))
-#define clrbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) & ~(_v))
-
-#define setbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) | (_v))
-#define clrbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) & ~(_v))
-
-int fec_8xx_platform_init(void)
-{
- immap_t *immap = (immap_t *)IMAP_ADDR;
- bd_t *bd = (bd_t *) __res;
- const char *s;
- char *e;
- int i;
-
- /* use MDC for MII */
- setbits16(immap->im_ioport.iop_pdpar, 0x0080);
- clrbits16(immap->im_ioport.iop_pddir, 0x0080);
-
- /* configure FEC1 pins */
- setbits16(immap->im_ioport.iop_papar, 0xe810);
- setbits16(immap->im_ioport.iop_padir, 0x0810);
- clrbits16(immap->im_ioport.iop_padir, 0xe000);
-
- setbits32(immap->im_cpm.cp_pbpar, 0x00000001);
- clrbits32(immap->im_cpm.cp_pbdir, 0x00000001);
-
- setbits32(immap->im_cpm.cp_cptr, 0x00000100);
- clrbits32(immap->im_cpm.cp_cptr, 0x00000050);
-
- clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
- clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
- clrbits16(immap->im_ioport.iop_pcso, 0x0200);
- setbits16(immap->im_ioport.iop_pcint, 0x0200);
-
- /* configure FEC2 pins */
- setbits32(immap->im_cpm.cp_pepar, 0x00039620);
- setbits32(immap->im_cpm.cp_pedir, 0x00039620);
- setbits32(immap->im_cpm.cp_peso, 0x00031000);
- clrbits32(immap->im_cpm.cp_peso, 0x00008620);
-
- setbits32(immap->im_cpm.cp_cptr, 0x00000080);
- clrbits32(immap->im_cpm.cp_cptr, 0x00000028);
-
- clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
- clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
- clrbits16(immap->im_ioport.iop_pcso, 0x0200);
- setbits16(immap->im_ioport.iop_pcint, 0x0200);
-
- /* fill up */
- fec1_info.sys_clk = bd->bi_intfreq;
- fec2_info.sys_clk = bd->bi_intfreq;
-
- s = __fw_getenv("ethaddr");
- if (s != NULL) {
- for (i = 0; i < 6; i++) {
- fec1_info.macaddr[i] = simple_strtoul(s, &e, 16);
- if (*e)
- s = e + 1;
- }
- }
-
- s = __fw_getenv("eth1addr");
- if (s != NULL) {
- for (i = 0; i < 6; i++) {
- fec2_info.macaddr[i] = simple_strtoul(s, &e, 16);
- if (*e)
- s = e + 1;
- }
- }
-
- fec_8xx_init_one(&fec1_info, &fec1_dev);
- fec_8xx_init_one(&fec2_info, &fec2_dev);
-
- return fec1_dev != NULL && fec2_dev != NULL ? 0 : -1;
-}
-
-void fec_8xx_platform_cleanup(void)
-{
- if (fec2_dev != NULL)
- fec_8xx_cleanup_one(fec2_dev);
-
- if (fec1_dev != NULL)
- fec_8xx_cleanup_one(fec1_dev);
-}
diff --git a/drivers/net/fec_8xx/fec_8xx.h b/drivers/net/fec_8xx/fec_8xx.h
deleted file mode 100644
index f3b1c6f..0000000
--- a/drivers/net/fec_8xx/fec_8xx.h
+++ /dev/null
@@ -1,220 +0,0 @@
-#ifndef FEC_8XX_H
-#define FEC_8XX_H
-
-#include <linux/mii.h>
-#include <linux/netdevice.h>
-
-#include <linux/types.h>
-
-/* HW info */
-
-/* CRC polynomium used by the FEC for the multicast group filtering */
-#define FEC_CRC_POLY 0x04C11DB7
-
-#define MII_ADVERTISE_HALF (ADVERTISE_100HALF | \
- ADVERTISE_10HALF | ADVERTISE_CSMA)
-#define MII_ADVERTISE_ALL (ADVERTISE_100FULL | \
- ADVERTISE_10FULL | MII_ADVERTISE_HALF)
-
-/* Interrupt events/masks.
-*/
-#define FEC_ENET_HBERR 0x80000000U /* Heartbeat error */
-#define FEC_ENET_BABR 0x40000000U /* Babbling receiver */
-#define FEC_ENET_BABT 0x20000000U /* Babbling transmitter */
-#define FEC_ENET_GRA 0x10000000U /* Graceful stop complete */
-#define FEC_ENET_TXF 0x08000000U /* Full frame transmitted */
-#define FEC_ENET_TXB 0x04000000U /* A buffer was transmitted */
-#define FEC_ENET_RXF 0x02000000U /* Full frame received */
-#define FEC_ENET_RXB 0x01000000U /* A buffer was received */
-#define FEC_ENET_MII 0x00800000U /* MII interrupt */
-#define FEC_ENET_EBERR 0x00400000U /* SDMA bus error */
-
-#define FEC_ECNTRL_PINMUX 0x00000004
-#define FEC_ECNTRL_ETHER_EN 0x00000002
-#define FEC_ECNTRL_RESET 0x00000001
-
-#define FEC_RCNTRL_BC_REJ 0x00000010
-#define FEC_RCNTRL_PROM 0x00000008
-#define FEC_RCNTRL_MII_MODE 0x00000004
-#define FEC_RCNTRL_DRT 0x00000002
-#define FEC_RCNTRL_LOOP 0x00000001
-
-#define FEC_TCNTRL_FDEN 0x00000004
-#define FEC_TCNTRL_HBC 0x00000002
-#define FEC_TCNTRL_GTS 0x00000001
-
-/* values for MII phy_status */
-
-#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
-#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
-#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
-#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
-#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
-#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
-#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
-
-#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
-#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
-#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
-#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
-#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
-#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
-#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
-#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
-
-typedef struct phy_info {
- unsigned int id;
- const char *name;
- void (*startup) (struct net_device * dev);
- void (*shutdown) (struct net_device * dev);
- void (*ack_int) (struct net_device * dev);
-} phy_info_t;
-
-/* The FEC stores dest/src/type, data, and checksum for receive packets.
- */
-#define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */
-#define MIN_MTU 46 /* this is data size */
-#define CRC_LEN 4
-
-#define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN)
-#define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN)
-
-/* Must be a multiple of 4 */
-#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE+3) & ~3)
-/* This is needed so that invalidate_xxx wont invalidate too much */
-#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE)
-
-/* platform interface */
-
-struct fec_platform_info {
- int fec_no; /* FEC index */
- int use_mdio; /* use external MII */
- int phy_addr; /* the phy address */
- int fec_irq, phy_irq; /* the irq for the controller */
- int rx_ring, tx_ring; /* number of buffers on rx */
- int sys_clk; /* system clock */
- __u8 macaddr[6]; /* mac address */
- int rx_copybreak; /* limit we copy small frames */
- int use_napi; /* use NAPI */
- int napi_weight; /* NAPI weight */
-};
-
-/* forward declaration */
-struct fec;
-
-struct fec_enet_private {
- spinlock_t lock; /* during all ops except TX pckt processing */
- spinlock_t tx_lock; /* during fec_start_xmit and fec_tx */
- struct net_device *dev;
- struct napi_struct napi;
- int fecno;
- struct fec *fecp;
- const struct fec_platform_info *fpi;
- int rx_ring, tx_ring;
- dma_addr_t ring_mem_addr;
- void *ring_base;
- struct sk_buff **rx_skbuff;
- struct sk_buff **tx_skbuff;
- cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
- cbd_t *tx_bd_base;
- cbd_t *dirty_tx; /* ring entries to be free()ed. */
- cbd_t *cur_rx;
- cbd_t *cur_tx;
- int tx_free;
- struct net_device_stats stats;
- struct timer_list phy_timer_list;
- const struct phy_info *phy;
- unsigned int fec_phy_speed;
- __u32 msg_enable;
- struct mii_if_info mii_if;
-};
-
-/***************************************************************************/
-
-void fec_restart(struct net_device *dev, int duplex, int speed);
-void fec_stop(struct net_device *dev);
-
-/***************************************************************************/
-
-int fec_mii_read(struct net_device *dev, int phy_id, int location);
-void fec_mii_write(struct net_device *dev, int phy_id, int location, int value);
-
-int fec_mii_phy_id_detect(struct net_device *dev);
-void fec_mii_startup(struct net_device *dev);
-void fec_mii_shutdown(struct net_device *dev);
-void fec_mii_ack_int(struct net_device *dev);
-
-void fec_mii_link_status_change_check(struct net_device *dev, int init_media);
-
-/***************************************************************************/
-
-#define FEC1_NO 0x00
-#define FEC2_NO 0x01
-#define FEC3_NO 0x02
-
-int fec_8xx_init_one(const struct fec_platform_info *fpi,
- struct net_device **devp);
-int fec_8xx_cleanup_one(struct net_device *dev);
-
-/***************************************************************************/
-
-#define DRV_MODULE_NAME "fec_8xx"
-#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "0.1"
-#define DRV_MODULE_RELDATE "May 6, 2004"
-
-/***************************************************************************/
-
-int fec_8xx_platform_init(void);
-void fec_8xx_platform_cleanup(void);
-
-/***************************************************************************/
-
-/* FEC access macros */
-#if defined(CONFIG_8xx)
-/* for a 8xx __raw_xxx's are sufficient */
-#define __fec_out32(addr, x) __raw_writel(x, addr)
-#define __fec_out16(addr, x) __raw_writew(x, addr)
-#define __fec_in32(addr) __raw_readl(addr)
-#define __fec_in16(addr) __raw_readw(addr)
-#else
-/* for others play it safe */
-#define __fec_out32(addr, x) out_be32(addr, x)
-#define __fec_out16(addr, x) out_be16(addr, x)
-#define __fec_in32(addr) in_be32(addr)
-#define __fec_in16(addr) in_be16(addr)
-#endif
-
-/* write */
-#define FW(_fecp, _reg, _v) __fec_out32(&(_fecp)->fec_ ## _reg, (_v))
-
-/* read */
-#define FR(_fecp, _reg) __fec_in32(&(_fecp)->fec_ ## _reg)
-
-/* set bits */
-#define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
-
-/* clear bits */
-#define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
-
-/* buffer descriptor access macros */
-
-/* write */
-#define CBDW_SC(_cbd, _sc) __fec_out16(&(_cbd)->cbd_sc, (_sc))
-#define CBDW_DATLEN(_cbd, _datlen) __fec_out16(&(_cbd)->cbd_datlen, (_datlen))
-#define CBDW_BUFADDR(_cbd, _bufaddr) __fec_out32(&(_cbd)->cbd_bufaddr, (_bufaddr))
-
-/* read */
-#define CBDR_SC(_cbd) __fec_in16(&(_cbd)->cbd_sc)
-#define CBDR_DATLEN(_cbd) __fec_in16(&(_cbd)->cbd_datlen)
-#define CBDR_BUFADDR(_cbd) __fec_in32(&(_cbd)->cbd_bufaddr)
-
-/* set bits */
-#define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc))
-
-/* clear bits */
-#define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc))
-
-/***************************************************************************/
-
-#endif
diff --git a/drivers/net/fec_8xx/fec_main.c b/drivers/net/fec_8xx/fec_main.c
deleted file mode 100644
index ca8d2e8..0000000
--- a/drivers/net/fec_8xx/fec_main.c
+++ /dev/null
@@ -1,1264 +0,0 @@
-/*
- * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
- *
- * Copyright (c) 2003 Intracom S.A.
- * by Pantelis Antoniou <panto@intracom.gr>
- *
- * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
- * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
- *
- * Released under the GPL
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/mii.h>
-#include <linux/ethtool.h>
-#include <linux/bitops.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/8xx_immap.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/cpm1.h>
-
-#include "fec_8xx.h"
-
-/*************************************************/
-
-#define FEC_MAX_MULTICAST_ADDRS 64
-
-/*************************************************/
-
-static char version[] __devinitdata =
- DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
-
-MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>");
-MODULE_DESCRIPTION("Motorola 8xx FEC ethernet driver");
-MODULE_LICENSE("GPL");
-
-int fec_8xx_debug = -1; /* -1 == use FEC_8XX_DEF_MSG_ENABLE as value */
-module_param(fec_8xx_debug, int, 0);
-MODULE_PARM_DESC(fec_8xx_debug,
- "FEC 8xx bitmapped debugging message enable value");
-
-
-/*************************************************/
-
-/*
- * Delay to wait for FEC reset command to complete (in us)
- */
-#define FEC_RESET_DELAY 50
-
-/*****************************************************************************************/
-
-static void fec_whack_reset(fec_t * fecp)
-{
- int i;
-
- /*
- * Whack a reset. We should wait for this.
- */
- FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
- for (i = 0;
- (FR(fecp, ecntrl) & FEC_ECNTRL_RESET) != 0 && i < FEC_RESET_DELAY;
- i++)
- udelay(1);
-
- if (i == FEC_RESET_DELAY)
- printk(KERN_WARNING "FEC Reset timeout!\n");
-
-}
-
-/****************************************************************************/
-
-/*
- * Transmitter timeout.
- */
-#define TX_TIMEOUT (2*HZ)
-
-/****************************************************************************/
-
-/*
- * Returns the CRC needed when filling in the hash table for
- * multicast group filtering
- * pAddr must point to a MAC address (6 bytes)
- */
-static __u32 fec_mulicast_calc_crc(char *pAddr)
-{
- u8 byte;
- int byte_count;
- int bit_count;
- __u32 crc = 0xffffffff;
- u8 msb;
-
- for (byte_count = 0; byte_count < 6; byte_count++) {
- byte = pAddr[byte_count];
- for (bit_count = 0; bit_count < 8; bit_count++) {
- msb = crc >> 31;
- crc <<= 1;
- if (msb ^ (byte & 0x1)) {
- crc ^= FEC_CRC_POLY;
- }
- byte >>= 1;
- }
- }
- return (crc);
-}
-
-/*
- * Set or clear the multicast filter for this adaptor.
- * Skeleton taken from sunlance driver.
- * The CPM Ethernet implementation allows Multicast as well as individual
- * MAC address filtering. Some of the drivers check to make sure it is
- * a group multicast address, and discard those that are not. I guess I
- * will do the same for now, but just remove the test if you want
- * individual filtering as well (do the upper net layers want or support
- * this kind of feature?).
- */
-static void fec_set_multicast_list(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- fec_t *fecp = fep->fecp;
- struct dev_mc_list *pmc;
- __u32 crc;
- int temp;
- __u32 csrVal;
- int hash_index;
- __u32 hthi, htlo;
- unsigned long flags;
-
-
- if ((dev->flags & IFF_PROMISC) != 0) {
-
- spin_lock_irqsave(&fep->lock, flags);
- FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
- spin_unlock_irqrestore(&fep->lock, flags);
-
- /*
- * Log any net taps.
- */
- printk(KERN_WARNING DRV_MODULE_NAME
- ": %s: Promiscuous mode enabled.\n", dev->name);
- return;
-
- }
-
- if ((dev->flags & IFF_ALLMULTI) != 0 ||
- dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
- /*
- * Catch all multicast addresses, set the filter to all 1's.
- */
- hthi = 0xffffffffU;
- htlo = 0xffffffffU;
- } else {
- hthi = 0;
- htlo = 0;
-
- /*
- * Now populate the hash table
- */
- for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) {
- crc = fec_mulicast_calc_crc(pmc->dmi_addr);
- temp = (crc & 0x3f) >> 1;
- hash_index = ((temp & 0x01) << 4) |
- ((temp & 0x02) << 2) |
- ((temp & 0x04)) |
- ((temp & 0x08) >> 2) |
- ((temp & 0x10) >> 4);
- csrVal = (1 << hash_index);
- if (crc & 1)
- hthi |= csrVal;
- else
- htlo |= csrVal;
- }
- }
-
- spin_lock_irqsave(&fep->lock, flags);
- FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
- FW(fecp, hash_table_high, hthi);
- FW(fecp, hash_table_low, htlo);
- spin_unlock_irqrestore(&fep->lock, flags);
-}
-
-static int fec_set_mac_address(struct net_device *dev, void *addr)
-{
- struct sockaddr *mac = addr;
- struct fec_enet_private *fep = netdev_priv(dev);
- struct fec *fecp = fep->fecp;
- int i;
- __u32 addrhi, addrlo;
- unsigned long flags;
-
- /* Get pointer to SCC area in parameter RAM. */
- for (i = 0; i < 6; i++)
- dev->dev_addr[i] = mac->sa_data[i];
-
- /*
- * Set station address.
- */
- addrhi = ((__u32) dev->dev_addr[0] << 24) |
- ((__u32) dev->dev_addr[1] << 16) |
- ((__u32) dev->dev_addr[2] << 8) |
- (__u32) dev->dev_addr[3];
- addrlo = ((__u32) dev->dev_addr[4] << 24) |
- ((__u32) dev->dev_addr[5] << 16);
-
- spin_lock_irqsave(&fep->lock, flags);
- FW(fecp, addr_low, addrhi);
- FW(fecp, addr_high, addrlo);
- spin_unlock_irqrestore(&fep->lock, flags);
-
- return 0;
-}
-
-/*
- * This function is called to start or restart the FEC during a link
- * change. This only happens when switching between half and full
- * duplex.
- */
-void fec_restart(struct net_device *dev, int duplex, int speed)
-{
-#ifdef CONFIG_DUET
- immap_t *immap = (immap_t *) IMAP_ADDR;
- __u32 cptr;
-#endif
- struct fec_enet_private *fep = netdev_priv(dev);
- struct fec *fecp = fep->fecp;
- const struct fec_platform_info *fpi = fep->fpi;
- cbd_t *bdp;
- struct sk_buff *skb;
- int i;
- __u32 addrhi, addrlo;
-
- fec_whack_reset(fep->fecp);
-
- /*
- * Set station address.
- */
- addrhi = ((__u32) dev->dev_addr[0] << 24) |
- ((__u32) dev->dev_addr[1] << 16) |
- ((__u32) dev->dev_addr[2] << 8) |
- (__u32) dev->dev_addr[3];
- addrlo = ((__u32) dev->dev_addr[4] << 24) |
- ((__u32) dev->dev_addr[5] << 16);
- FW(fecp, addr_low, addrhi);
- FW(fecp, addr_high, addrlo);
-
- /*
- * Reset all multicast.
- */
- FW(fecp, hash_table_high, 0);
- FW(fecp, hash_table_low, 0);
-
- /*
- * Set maximum receive buffer size.
- */
- FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
- FW(fecp, r_hash, PKT_MAXBUF_SIZE);
-
- /*
- * Set receive and transmit descriptor base.
- */
- FW(fecp, r_des_start, iopa((__u32) (fep->rx_bd_base)));
- FW(fecp, x_des_start, iopa((__u32) (fep->tx_bd_base)));
-
- fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
- fep->tx_free = fep->tx_ring;
- fep->cur_rx = fep->rx_bd_base;
-
- /*
- * Reset SKB receive buffers
- */
- for (i = 0; i < fep->rx_ring; i++) {
- if ((skb = fep->rx_skbuff[i]) == NULL)
- continue;
- fep->rx_skbuff[i] = NULL;
- dev_kfree_skb(skb);
- }
-
- /*
- * Initialize the receive buffer descriptors.
- */
- for (i = 0, bdp = fep->rx_bd_base; i < fep->rx_ring; i++, bdp++) {
- skb = dev_alloc_skb(ENET_RX_FRSIZE);
- if (skb == NULL) {
- printk(KERN_WARNING DRV_MODULE_NAME
- ": %s Memory squeeze, unable to allocate skb\n",
- dev->name);
- fep->stats.rx_dropped++;
- break;
- }
- fep->rx_skbuff[i] = skb;
- skb->dev = dev;
- CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
- L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
- DMA_FROM_DEVICE));
- CBDW_DATLEN(bdp, 0); /* zero */
- CBDW_SC(bdp, BD_ENET_RX_EMPTY |
- ((i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP));
- }
- /*
- * if we failed, fillup remainder
- */
- for (; i < fep->rx_ring; i++, bdp++) {
- fep->rx_skbuff[i] = NULL;
- CBDW_SC(bdp, (i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP);
- }
-
- /*
- * Reset SKB transmit buffers.
- */
- for (i = 0; i < fep->tx_ring; i++) {
- if ((skb = fep->tx_skbuff[i]) == NULL)
- continue;
- fep->tx_skbuff[i] = NULL;
- dev_kfree_skb(skb);
- }
-
- /*
- * ...and the same for transmit.
- */
- for (i = 0, bdp = fep->tx_bd_base; i < fep->tx_ring; i++, bdp++) {
- fep->tx_skbuff[i] = NULL;
- CBDW_BUFADDR(bdp, virt_to_bus(NULL));
- CBDW_DATLEN(bdp, 0);
- CBDW_SC(bdp, (i < fep->tx_ring - 1) ? 0 : BD_SC_WRAP);
- }
-
- /*
- * Enable big endian and don't care about SDMA FC.
- */
- FW(fecp, fun_code, 0x78000000);
-
- /*
- * Set MII speed.
- */
- FW(fecp, mii_speed, fep->fec_phy_speed);
-
- /*
- * Clear any outstanding interrupt.
- */
- FW(fecp, ievent, 0xffc0);
- FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
-
- /*
- * adjust to speed (only for DUET & RMII)
- */
-#ifdef CONFIG_DUET
- cptr = in_be32(&immap->im_cpm.cp_cptr);
- switch (fpi->fec_no) {
- case 0:
- /*
- * check if in RMII mode
- */
- if ((cptr & 0x100) == 0)
- break;
-
- if (speed == 10)
- cptr |= 0x0000010;
- else if (speed == 100)
- cptr &= ~0x0000010;
- break;
- case 1:
- /*
- * check if in RMII mode
- */
- if ((cptr & 0x80) == 0)
- break;
-
- if (speed == 10)
- cptr |= 0x0000008;
- else if (speed == 100)
- cptr &= ~0x0000008;
- break;
- default:
- break;
- }
- out_be32(&immap->im_cpm.cp_cptr, cptr);
-#endif
-
- FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
- /*
- * adjust to duplex mode
- */
- if (duplex) {
- FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
- FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
- } else {
- FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
- FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
- }
-
- /*
- * Enable interrupts we wish to service.
- */
- FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
- FEC_ENET_RXF | FEC_ENET_RXB);
-
- /*
- * And last, enable the transmit and receive processing.
- */
- FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
- FW(fecp, r_des_active, 0x01000000);
-}
-
-void fec_stop(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- fec_t *fecp = fep->fecp;
- struct sk_buff *skb;
- int i;
-
- if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
- return; /* already down */
-
- FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
- for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
- i < FEC_RESET_DELAY; i++)
- udelay(1);
-
- if (i == FEC_RESET_DELAY)
- printk(KERN_WARNING DRV_MODULE_NAME
- ": %s FEC timeout on graceful transmit stop\n",
- dev->name);
- /*
- * Disable FEC. Let only MII interrupts.
- */
- FW(fecp, imask, 0);
- FW(fecp, ecntrl, ~FEC_ECNTRL_ETHER_EN);
-
- /*
- * Reset SKB transmit buffers.
- */
- for (i = 0; i < fep->tx_ring; i++) {
- if ((skb = fep->tx_skbuff[i]) == NULL)
- continue;
- fep->tx_skbuff[i] = NULL;
- dev_kfree_skb(skb);
- }
-
- /*
- * Reset SKB receive buffers
- */
- for (i = 0; i < fep->rx_ring; i++) {
- if ((skb = fep->rx_skbuff[i]) == NULL)
- continue;
- fep->rx_skbuff[i] = NULL;
- dev_kfree_skb(skb);
- }
-}
-
-/* common receive function */
-static int fec_enet_rx_common(struct fec_enet_private *ep,
- struct net_device *dev, int budget)
-{
- fec_t *fecp = fep->fecp;
- const struct fec_platform_info *fpi = fep->fpi;
- cbd_t *bdp;
- struct sk_buff *skb, *skbn, *skbt;
- int received = 0;
- __u16 pkt_len, sc;
- int curidx;
-
- /*
- * First, grab all of the stats for the incoming packet.
- * These get messed up if we get called due to a busy condition.
- */
- bdp = fep->cur_rx;
-
- /* clear RX status bits for napi*/
- if (fpi->use_napi)
- FW(fecp, ievent, FEC_ENET_RXF | FEC_ENET_RXB);
-
- while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) {
-
- curidx = bdp - fep->rx_bd_base;
-
- /*
- * Since we have allocated space to hold a complete frame,
- * the last indicator should be set.
- */
- if ((sc & BD_ENET_RX_LAST) == 0)
- printk(KERN_WARNING DRV_MODULE_NAME
- ": %s rcv is not +last\n",
- dev->name);
-
- /*
- * Check for errors.
- */
- if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL |
- BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) {
- fep->stats.rx_errors++;
- /* Frame too long or too short. */
- if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
- fep->stats.rx_length_errors++;
- /* Frame alignment */
- if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL))
- fep->stats.rx_frame_errors++;
- /* CRC Error */
- if (sc & BD_ENET_RX_CR)
- fep->stats.rx_crc_errors++;
- /* FIFO overrun */
- if (sc & BD_ENET_RX_OV)
- fep->stats.rx_crc_errors++;
-
- skbn = fep->rx_skbuff[curidx];
- BUG_ON(skbn == NULL);
-
- } else {
- skb = fep->rx_skbuff[curidx];
- BUG_ON(skb == NULL);
-
- /*
- * Process the incoming frame.
- */
- fep->stats.rx_packets++;
- pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */
- fep->stats.rx_bytes += pkt_len + 4;
-
- if (pkt_len <= fpi->rx_copybreak) {
- /* +2 to make IP header L1 cache aligned */
- skbn = dev_alloc_skb(pkt_len + 2);
- if (skbn != NULL) {
- skb_reserve(skbn, 2); /* align IP header */
- skb_copy_from_linear_data(skb,
- skbn->data,
- pkt_len);
- /* swap */
- skbt = skb;
- skb = skbn;
- skbn = skbt;
- }
- } else
- skbn = dev_alloc_skb(ENET_RX_FRSIZE);
-
- if (skbn != NULL) {
- skb_put(skb, pkt_len); /* Make room */
- skb->protocol = eth_type_trans(skb, dev);
- received++;
- if (!fpi->use_napi)
- netif_rx(skb);
- else
- netif_receive_skb(skb);
- } else {
- printk(KERN_WARNING DRV_MODULE_NAME
- ": %s Memory squeeze, dropping packet.\n",
- dev->name);
- fep->stats.rx_dropped++;
- skbn = skb;
- }
- }
-
- fep->rx_skbuff[curidx] = skbn;
- CBDW_BUFADDR(bdp, dma_map_single(NULL, skbn->data,
- L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
- DMA_FROM_DEVICE));
- CBDW_DATLEN(bdp, 0);
- CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY);
-
- /*
- * Update BD pointer to next entry.
- */
- if ((sc & BD_ENET_RX_WRAP) == 0)
- bdp++;
- else
- bdp = fep->rx_bd_base;
-
- /*
- * Doing this here will keep the FEC running while we process
- * incoming frames. On a heavily loaded network, we should be
- * able to keep up at the expense of system resources.
- */
- FW(fecp, r_des_active, 0x01000000);
-
- if (received >= budget)
- break;
-
- }
-
- fep->cur_rx = bdp;
-
- if (fpi->use_napi) {
- if (received < budget) {
- netif_rx_complete(dev, &fep->napi);
-
- /* enable RX interrupt bits */
- FS(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
- }
- }
-
- return received;
-}
-
-static void fec_enet_tx(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- cbd_t *bdp;
- struct sk_buff *skb;
- int dirtyidx, do_wake;
- __u16 sc;
-
- spin_lock(&fep->lock);
- bdp = fep->dirty_tx;
-
- do_wake = 0;
- while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
-
- dirtyidx = bdp - fep->tx_bd_base;
-
- if (fep->tx_free == fep->tx_ring)
- break;
-
- skb = fep->tx_skbuff[dirtyidx];
-
- /*
- * Check for errors.
- */
- if (sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
- BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) {
- fep->stats.tx_errors++;
- if (sc & BD_ENET_TX_HB) /* No heartbeat */
- fep->stats.tx_heartbeat_errors++;
- if (sc & BD_ENET_TX_LC) /* Late collision */
- fep->stats.tx_window_errors++;
- if (sc & BD_ENET_TX_RL) /* Retrans limit */
- fep->stats.tx_aborted_errors++;
- if (sc & BD_ENET_TX_UN) /* Underrun */
- fep->stats.tx_fifo_errors++;
- if (sc & BD_ENET_TX_CSL) /* Carrier lost */
- fep->stats.tx_carrier_errors++;
- } else
- fep->stats.tx_packets++;
-
- if (sc & BD_ENET_TX_READY)
- printk(KERN_WARNING DRV_MODULE_NAME
- ": %s HEY! Enet xmit interrupt and TX_READY.\n",
- dev->name);
-
- /*
- * Deferred means some collisions occurred during transmit,
- * but we eventually sent the packet OK.
- */
- if (sc & BD_ENET_TX_DEF)
- fep->stats.collisions++;
-
- /*
- * Free the sk buffer associated with this last transmit.
- */
- dev_kfree_skb_irq(skb);
- fep->tx_skbuff[dirtyidx] = NULL;
-
- /*
- * Update pointer to next buffer descriptor to be transmitted.
- */
- if ((sc & BD_ENET_TX_WRAP) == 0)
- bdp++;
- else
- bdp = fep->tx_bd_base;
-
- /*
- * Since we have freed up a buffer, the ring is no longer
- * full.
- */
- if (!fep->tx_free++)
- do_wake = 1;
- }
-
- fep->dirty_tx = bdp;
-
- spin_unlock(&fep->lock);
-
- if (do_wake && netif_queue_stopped(dev))
- netif_wake_queue(dev);
-}
-
-/*
- * The interrupt handler.
- * This is called from the MPC core interrupt.
- */
-static irqreturn_t
-fec_enet_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- struct fec_enet_private *fep;
- const struct fec_platform_info *fpi;
- fec_t *fecp;
- __u32 int_events;
- __u32 int_events_napi;
-
- if (unlikely(dev == NULL))
- return IRQ_NONE;
-
- fep = netdev_priv(dev);
- fecp = fep->fecp;
- fpi = fep->fpi;
-
- /*
- * Get the interrupt events that caused us to be here.
- */
- while ((int_events = FR(fecp, ievent) & FR(fecp, imask)) != 0) {
-
- if (!fpi->use_napi)
- FW(fecp, ievent, int_events);
- else {
- int_events_napi = int_events & ~(FEC_ENET_RXF | FEC_ENET_RXB);
- FW(fecp, ievent, int_events_napi);
- }
-
- if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
- FEC_ENET_BABT | FEC_ENET_EBERR)) != 0)
- printk(KERN_WARNING DRV_MODULE_NAME
- ": %s FEC ERROR(s) 0x%x\n",
- dev->name, int_events);
-
- if ((int_events & FEC_ENET_RXF) != 0) {
- if (!fpi->use_napi)
- fec_enet_rx_common(fep, dev, ~0);
- else {
- if (netif_rx_schedule_prep(dev, &fep->napi)) {
- /* disable rx interrupts */
- FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
- __netif_rx_schedule(dev, &fep->napi);
- } else {
- printk(KERN_ERR DRV_MODULE_NAME
- ": %s driver bug! interrupt while in poll!\n",
- dev->name);
- FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
- }
- }
- }
-
- if ((int_events & FEC_ENET_TXF) != 0)
- fec_enet_tx(dev);
- }
-
- return IRQ_HANDLED;
-}
-
-/* This interrupt occurs when the PHY detects a link change. */
-static irqreturn_t
-fec_mii_link_interrupt(int irq, void *dev_id)
-{
- struct net_device *dev = dev_id;
- struct fec_enet_private *fep;
- const struct fec_platform_info *fpi;
-
- if (unlikely(dev == NULL))
- return IRQ_NONE;
-
- fep = netdev_priv(dev);
- fpi = fep->fpi;
-
- if (!fpi->use_mdio)
- return IRQ_NONE;
-
- /*
- * Acknowledge the interrupt if possible. If we have not
- * found the PHY yet we can't process or acknowledge the
- * interrupt now. Instead we ignore this interrupt for now,
- * which we can do since it is edge triggered. It will be
- * acknowledged later by fec_enet_open().
- */
- if (!fep->phy)
- return IRQ_NONE;
-
- fec_mii_ack_int(dev);
- fec_mii_link_status_change_check(dev, 0);
-
- return IRQ_HANDLED;
-}
-
-
-/**********************************************************************************/
-
-static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- fec_t *fecp = fep->fecp;
- cbd_t *bdp;
- int curidx;
- unsigned long flags;
-
- spin_lock_irqsave(&fep->tx_lock, flags);
-
- /*
- * Fill in a Tx ring entry
- */
- bdp = fep->cur_tx;
-
- if (!fep->tx_free || (CBDR_SC(bdp) & BD_ENET_TX_READY)) {
- netif_stop_queue(dev);
- spin_unlock_irqrestore(&fep->tx_lock, flags);
-
- /*
- * Ooops. All transmit buffers are full. Bail out.
- * This should not happen, since the tx queue should be stopped.
- */
- printk(KERN_WARNING DRV_MODULE_NAME
- ": %s tx queue full!.\n", dev->name);
- return 1;
- }
-
- curidx = bdp - fep->tx_bd_base;
- /*
- * Clear all of the status flags.
- */
- CBDC_SC(bdp, BD_ENET_TX_STATS);
-
- /*
- * Save skb pointer.
- */
- fep->tx_skbuff[curidx] = skb;
-
- fep->stats.tx_bytes += skb->len;
-
- /*
- * Push the data cache so the CPM does not get stale memory data.
- */
- CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
- skb->len, DMA_TO_DEVICE));
- CBDW_DATLEN(bdp, skb->len);
-
- dev->trans_start = jiffies;
-
- /*
- * If this was the last BD in the ring, start at the beginning again.
- */
- if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)
- fep->cur_tx++;
- else
- fep->cur_tx = fep->tx_bd_base;
-
- if (!--fep->tx_free)
- netif_stop_queue(dev);
-
- /*
- * Trigger transmission start
- */
- CBDS_SC(bdp, BD_ENET_TX_READY | BD_ENET_TX_INTR |
- BD_ENET_TX_LAST | BD_ENET_TX_TC);
- FW(fecp, x_des_active, 0x01000000);
-
- spin_unlock_irqrestore(&fep->tx_lock, flags);
-
- return 0;
-}
-
-static void fec_timeout(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fep->stats.tx_errors++;
-
- if (fep->tx_free)
- netif_wake_queue(dev);
-
- /* check link status again */
- fec_mii_link_status_change_check(dev, 0);
-}
-
-static int fec_enet_open(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- const struct fec_platform_info *fpi = fep->fpi;
- unsigned long flags;
-
- napi_enable(&fep->napi);
-
- /* Install our interrupt handler. */
- if (request_irq(fpi->fec_irq, fec_enet_interrupt, 0, "fec", dev) != 0) {
- printk(KERN_ERR DRV_MODULE_NAME
- ": %s Could not allocate FEC IRQ!", dev->name);
- napi_disable(&fep->napi);
- return -EINVAL;
- }
-
- /* Install our phy interrupt handler */
- if (fpi->phy_irq != -1 &&
- request_irq(fpi->phy_irq, fec_mii_link_interrupt, 0, "fec-phy",
- dev) != 0) {
- printk(KERN_ERR DRV_MODULE_NAME
- ": %s Could not allocate PHY IRQ!", dev->name);
- free_irq(fpi->fec_irq, dev);
- napi_disable(&fep->napi);
- return -EINVAL;
- }
-
- if (fpi->use_mdio) {
- fec_mii_startup(dev);
- netif_carrier_off(dev);
- fec_mii_link_status_change_check(dev, 1);
- } else {
- spin_lock_irqsave(&fep->lock, flags);
- fec_restart(dev, 1, 100); /* XXX this sucks */
- spin_unlock_irqrestore(&fep->lock, flags);
-
- netif_carrier_on(dev);
- netif_start_queue(dev);
- }
- return 0;
-}
-
-static int fec_enet_close(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- const struct fec_platform_info *fpi = fep->fpi;
- unsigned long flags;
-
- netif_stop_queue(dev);
- napi_disable(&fep->napi);
- netif_carrier_off(dev);
-
- if (fpi->use_mdio)
- fec_mii_shutdown(dev);
-
- spin_lock_irqsave(&fep->lock, flags);
- fec_stop(dev);
- spin_unlock_irqrestore(&fep->lock, flags);
-
- /* release any irqs */
- if (fpi->phy_irq != -1)
- free_irq(fpi->phy_irq, dev);
- free_irq(fpi->fec_irq, dev);
-
- return 0;
-}
-
-static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- return &fep->stats;
-}
-
-static int fec_enet_poll(struct napi_struct *napi, int budget)
-{
- struct fec_enet_private *fep = container_of(napi, struct fec_enet_private, napi);
- struct net_device *dev = fep->dev;
-
- return fec_enet_rx_common(fep, dev, budget);
-}
-
-/*************************************************************************/
-
-static void fec_get_drvinfo(struct net_device *dev,
- struct ethtool_drvinfo *info)
-{
- strcpy(info->driver, DRV_MODULE_NAME);
- strcpy(info->version, DRV_MODULE_VERSION);
-}
-
-static int fec_get_regs_len(struct net_device *dev)
-{
- return sizeof(fec_t);
-}
-
-static void fec_get_regs(struct net_device *dev, struct ethtool_regs *regs,
- void *p)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- unsigned long flags;
-
- if (regs->len < sizeof(fec_t))
- return;
-
- regs->version = 0;
- spin_lock_irqsave(&fep->lock, flags);
- memcpy_fromio(p, fep->fecp, sizeof(fec_t));
- spin_unlock_irqrestore(&fep->lock, flags);
-}
-
-static int fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- unsigned long flags;
- int rc;
-
- spin_lock_irqsave(&fep->lock, flags);
- rc = mii_ethtool_gset(&fep->mii_if, cmd);
- spin_unlock_irqrestore(&fep->lock, flags);
-
- return rc;
-}
-
-static int fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- unsigned long flags;
- int rc;
-
- spin_lock_irqsave(&fep->lock, flags);
- rc = mii_ethtool_sset(&fep->mii_if, cmd);
- spin_unlock_irqrestore(&fep->lock, flags);
-
- return rc;
-}
-
-static int fec_nway_reset(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- return mii_nway_restart(&fep->mii_if);
-}
-
-static __u32 fec_get_msglevel(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- return fep->msg_enable;
-}
-
-static void fec_set_msglevel(struct net_device *dev, __u32 value)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- fep->msg_enable = value;
-}
-
-static const struct ethtool_ops fec_ethtool_ops = {
- .get_drvinfo = fec_get_drvinfo,
- .get_regs_len = fec_get_regs_len,
- .get_settings = fec_get_settings,
- .set_settings = fec_set_settings,
- .nway_reset = fec_nway_reset,
- .get_link = ethtool_op_get_link,
- .get_msglevel = fec_get_msglevel,
- .set_msglevel = fec_set_msglevel,
- .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
- .set_sg = ethtool_op_set_sg,
- .get_regs = fec_get_regs,
-};
-
-static int fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data;
- unsigned long flags;
- int rc;
-
- if (!netif_running(dev))
- return -EINVAL;
-
- spin_lock_irqsave(&fep->lock, flags);
- rc = generic_mii_ioctl(&fep->mii_if, mii, cmd, NULL);
- spin_unlock_irqrestore(&fep->lock, flags);
- return rc;
-}
-
-int fec_8xx_init_one(const struct fec_platform_info *fpi,
- struct net_device **devp)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
- static int fec_8xx_version_printed = 0;
- struct net_device *dev = NULL;
- struct fec_enet_private *fep = NULL;
- fec_t *fecp = NULL;
- int i;
- int err = 0;
- int registered = 0;
- __u32 siel;
-
- *devp = NULL;
-
- switch (fpi->fec_no) {
- case 0:
- fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
- break;
-#ifdef CONFIG_DUET
- case 1:
- fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec2;
- break;
-#endif
- default:
- return -EINVAL;
- }
-
- if (fec_8xx_version_printed++ == 0)
- printk(KERN_INFO "%s", version);
-
- i = sizeof(*fep) + (sizeof(struct sk_buff **) *
- (fpi->rx_ring + fpi->tx_ring));
-
- dev = alloc_etherdev(i);
- if (!dev) {
- err = -ENOMEM;
- goto err;
- }
-
- fep = netdev_priv(dev);
- fep->dev = dev;
-
- /* partial reset of FEC */
- fec_whack_reset(fecp);
-
- /* point rx_skbuff, tx_skbuff */
- fep->rx_skbuff = (struct sk_buff **)&fep[1];
- fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring;
-
- fep->fecp = fecp;
- fep->fpi = fpi;
-
- /* init locks */
- spin_lock_init(&fep->lock);
- spin_lock_init(&fep->tx_lock);
-
- /*
- * Set the Ethernet address.
- */
- for (i = 0; i < 6; i++)
- dev->dev_addr[i] = fpi->macaddr[i];
-
- fep->ring_base = dma_alloc_coherent(NULL,
- (fpi->tx_ring + fpi->rx_ring) *
- sizeof(cbd_t), &fep->ring_mem_addr,
- GFP_KERNEL);
- if (fep->ring_base == NULL) {
- printk(KERN_ERR DRV_MODULE_NAME
- ": %s dma alloc failed.\n", dev->name);
- err = -ENOMEM;
- goto err;
- }
-
- /*
- * Set receive and transmit descriptor base.
- */
- fep->rx_bd_base = fep->ring_base;
- fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring;
-
- /* initialize ring size variables */
- fep->tx_ring = fpi->tx_ring;
- fep->rx_ring = fpi->rx_ring;
-
- /* SIU interrupt */
- if (fpi->phy_irq != -1 &&
- (fpi->phy_irq >= SIU_IRQ0 && fpi->phy_irq < SIU_LEVEL7)) {
-
- siel = in_be32(&immap->im_siu_conf.sc_siel);
- if ((fpi->phy_irq & 1) == 0)
- siel |= (0x80000000 >> fpi->phy_irq);
- else
- siel &= ~(0x80000000 >> (fpi->phy_irq & ~1));
- out_be32(&immap->im_siu_conf.sc_siel, siel);
- }
-
- /*
- * The FEC Ethernet specific entries in the device structure.
- */
- dev->open = fec_enet_open;
- dev->hard_start_xmit = fec_enet_start_xmit;
- dev->tx_timeout = fec_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = fec_enet_close;
- dev->get_stats = fec_enet_get_stats;
- dev->set_multicast_list = fec_set_multicast_list;
- dev->set_mac_address = fec_set_mac_address;
- netif_napi_add(dev, &fec->napi,
- fec_enet_poll, fpi->napi_weight);
-
- dev->ethtool_ops = &fec_ethtool_ops;
- dev->do_ioctl = fec_ioctl;
-
- fep->fec_phy_speed =
- ((((fpi->sys_clk + 4999999) / 2500000) / 2) & 0x3F) << 1;
-
- init_timer(&fep->phy_timer_list);
-
- /* partial reset of FEC so that only MII works */
- FW(fecp, mii_speed, fep->fec_phy_speed);
- FW(fecp, ievent, 0xffc0);
- FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
- FW(fecp, imask, 0);
- FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
- FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
-
- netif_carrier_off(dev);
-
- err = register_netdev(dev);
- if (err != 0)
- goto err;
- registered = 1;
-
- if (fpi->use_mdio) {
- fep->mii_if.dev = dev;
- fep->mii_if.mdio_read = fec_mii_read;
- fep->mii_if.mdio_write = fec_mii_write;
- fep->mii_if.phy_id_mask = 0x1f;
- fep->mii_if.reg_num_mask = 0x1f;
- fep->mii_if.phy_id = fec_mii_phy_id_detect(dev);
- }
-
- *devp = dev;
-
- return 0;
-
- err:
- if (dev != NULL) {
- if (fecp != NULL)
- fec_whack_reset(fecp);
-
- if (registered)
- unregister_netdev(dev);
-
- if (fep != NULL) {
- if (fep->ring_base)
- dma_free_coherent(NULL,
- (fpi->tx_ring +
- fpi->rx_ring) *
- sizeof(cbd_t), fep->ring_base,
- fep->ring_mem_addr);
- }
- free_netdev(dev);
- }
- return err;
-}
-
-int fec_8xx_cleanup_one(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- fec_t *fecp = fep->fecp;
- const struct fec_platform_info *fpi = fep->fpi;
-
- fec_whack_reset(fecp);
-
- unregister_netdev(dev);
-
- dma_free_coherent(NULL, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
- fep->ring_base, fep->ring_mem_addr);
-
- free_netdev(dev);
-
- return 0;
-}
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**************************************************************************************/
-
-static int __init fec_8xx_init(void)
-{
- return fec_8xx_platform_init();
-}
-
-static void __exit fec_8xx_cleanup(void)
-{
- fec_8xx_platform_cleanup();
-}
-
-/**************************************************************************************/
-/**************************************************************************************/
-/**************************************************************************************/
-
-module_init(fec_8xx_init);
-module_exit(fec_8xx_cleanup);
diff --git a/drivers/net/fec_8xx/fec_mii.c b/drivers/net/fec_8xx/fec_mii.c
deleted file mode 100644
index 3b6ca29..0000000
--- a/drivers/net/fec_8xx/fec_mii.c
+++ /dev/null
@@ -1,418 +0,0 @@
-/*
- * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
- *
- * Copyright (c) 2003 Intracom S.A.
- * by Pantelis Antoniou <panto@intracom.gr>
- *
- * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
- * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
- *
- * Released under the GPL
- */
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/mii.h>
-#include <linux/ethtool.h>
-#include <linux/bitops.h>
-
-#include <asm/8xx_immap.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/cpm1.h>
-
-/*************************************************/
-
-#include "fec_8xx.h"
-
-/*************************************************/
-
-/* Make MII read/write commands for the FEC.
-*/
-#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
-#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
-#define mk_mii_end 0
-
-/*************************************************/
-
-/* XXX both FECs use the MII interface of FEC1 */
-static DEFINE_SPINLOCK(fec_mii_lock);
-
-#define FEC_MII_LOOPS 10000
-
-int fec_mii_read(struct net_device *dev, int phy_id, int location)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- fec_t *fecp;
- int i, ret = -1;
- unsigned long flags;
-
- /* XXX MII interface is only connected to FEC1 */
- fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
-
- spin_lock_irqsave(&fec_mii_lock, flags);
-
- if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) {
- FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
- FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
- FW(fecp, ievent, FEC_ENET_MII);
- }
-
- /* Add PHY address to register command. */
- FW(fecp, mii_speed, fep->fec_phy_speed);
- FW(fecp, mii_data, (phy_id << 23) | mk_mii_read(location));
-
- for (i = 0; i < FEC_MII_LOOPS; i++)
- if ((FR(fecp, ievent) & FEC_ENET_MII) != 0)
- break;
-
- if (i < FEC_MII_LOOPS) {
- FW(fecp, ievent, FEC_ENET_MII);
- ret = FR(fecp, mii_data) & 0xffff;
- }
-
- spin_unlock_irqrestore(&fec_mii_lock, flags);
-
- return ret;
-}
-
-void fec_mii_write(struct net_device *dev, int phy_id, int location, int value)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- fec_t *fecp;
- unsigned long flags;
- int i;
-
- /* XXX MII interface is only connected to FEC1 */
- fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
-
- spin_lock_irqsave(&fec_mii_lock, flags);
-
- if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) {
- FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
- FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
- FW(fecp, ievent, FEC_ENET_MII);
- }
-
- /* Add PHY address to register command. */
- FW(fecp, mii_speed, fep->fec_phy_speed); /* always adapt mii speed */
- FW(fecp, mii_data, (phy_id << 23) | mk_mii_write(location, value));
-
- for (i = 0; i < FEC_MII_LOOPS; i++)
- if ((FR(fecp, ievent) & FEC_ENET_MII) != 0)
- break;
-
- if (i < FEC_MII_LOOPS)
- FW(fecp, ievent, FEC_ENET_MII);
-
- spin_unlock_irqrestore(&fec_mii_lock, flags);
-}
-
-/*************************************************/
-
-#ifdef CONFIG_FEC_8XX_GENERIC_PHY
-
-/*
- * Generic PHY support.
- * Should work for all PHYs, but link change is detected by polling
- */
-
-static void generic_timer_callback(unsigned long data)
-{
- struct net_device *dev = (struct net_device *)data;
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fep->phy_timer_list.expires = jiffies + HZ / 2;
-
- add_timer(&fep->phy_timer_list);
-
- fec_mii_link_status_change_check(dev, 0);
-}
-
-static void generic_startup(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fep->phy_timer_list.expires = jiffies + HZ / 2; /* every 500ms */
- fep->phy_timer_list.data = (unsigned long)dev;
- fep->phy_timer_list.function = generic_timer_callback;
- add_timer(&fep->phy_timer_list);
-}
-
-static void generic_shutdown(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- del_timer_sync(&fep->phy_timer_list);
-}
-
-#endif
-
-#ifdef CONFIG_FEC_8XX_DM9161_PHY
-
-/* ------------------------------------------------------------------------- */
-/* The Davicom DM9161 is used on the NETTA board */
-
-/* register definitions */
-
-#define MII_DM9161_ACR 16 /* Aux. Config Register */
-#define MII_DM9161_ACSR 17 /* Aux. Config/Status Register */
-#define MII_DM9161_10TCSR 18 /* 10BaseT Config/Status Reg. */
-#define MII_DM9161_INTR 21 /* Interrupt Register */
-#define MII_DM9161_RECR 22 /* Receive Error Counter Reg. */
-#define MII_DM9161_DISCR 23 /* Disconnect Counter Register */
-
-static void dm9161_startup(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fec_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0000);
-}
-
-static void dm9161_ack_int(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fec_mii_read(dev, fep->mii_if.phy_id, MII_DM9161_INTR);
-}
-
-static void dm9161_shutdown(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fec_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0f00);
-}
-
-#endif
-
-#ifdef CONFIG_FEC_8XX_LXT971_PHY
-
-/* Support for LXT971/972 PHY */
-
-#define MII_LXT971_PCR 16 /* Port Control Register */
-#define MII_LXT971_SR2 17 /* Status Register 2 */
-#define MII_LXT971_IER 18 /* Interrupt Enable Register */
-#define MII_LXT971_ISR 19 /* Interrupt Status Register */
-#define MII_LXT971_LCR 20 /* LED Control Register */
-#define MII_LXT971_TCR 30 /* Transmit Control Register */
-
-static void lxt971_startup(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fec_mii_write(dev, fep->mii_if.phy_id, MII_LXT971_IER, 0x00F2);
-}
-
-static void lxt971_ack_int(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fec_mii_read(dev, fep->mii_if.phy_id, MII_LXT971_ISR);
-}
-
-static void lxt971_shutdown(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
-
- fec_mii_write(dev, fep->mii_if.phy_id, MII_LXT971_IER, 0x0000);
-}
-#endif
-
-/**********************************************************************************/
-
-static const struct phy_info phy_info[] = {
-#ifdef CONFIG_FEC_8XX_DM9161_PHY
- {
- .id = 0x00181b88,
- .name = "DM9161",
- .startup = dm9161_startup,
- .ack_int = dm9161_ack_int,
- .shutdown = dm9161_shutdown,
- },
-#endif
-#ifdef CONFIG_FEC_8XX_LXT971_PHY
- {
- .id = 0x0001378e,
- .name = "LXT971/972",
- .startup = lxt971_startup,
- .ack_int = lxt971_ack_int,
- .shutdown = lxt971_shutdown,
- },
-#endif
-#ifdef CONFIG_FEC_8XX_GENERIC_PHY
- {
- .id = 0,
- .name = "GENERIC",
- .startup = generic_startup,
- .shutdown = generic_shutdown,
- },
-#endif
-};
-
-/**********************************************************************************/
-
-int fec_mii_phy_id_detect(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- const struct fec_platform_info *fpi = fep->fpi;
- int i, r, start, end, phytype, physubtype;
- const struct phy_info *phy;
- int phy_hwid, phy_id;
-
- /* if no MDIO */
- if (fpi->use_mdio == 0)
- return -1;
-
- phy_hwid = -1;
- fep->phy = NULL;
-
- /* auto-detect? */
- if (fpi->phy_addr == -1) {
- start = 0;
- end = 32;
- } else { /* direct */
- start = fpi->phy_addr;
- end = start + 1;
- }
-
- for (phy_id = start; phy_id < end; phy_id++) {
- r = fec_mii_read(dev, phy_id, MII_PHYSID1);
- if (r == -1 || (phytype = (r & 0xffff)) == 0xffff)
- continue;
- r = fec_mii_read(dev, phy_id, MII_PHYSID2);
- if (r == -1 || (physubtype = (r & 0xffff)) == 0xffff)
- continue;
- phy_hwid = (phytype << 16) | physubtype;
- if (phy_hwid != -1)
- break;
- }
-
- if (phy_hwid == -1) {
- printk(KERN_ERR DRV_MODULE_NAME
- ": %s No PHY detected!\n", dev->name);
- return -1;
- }
-
- for (i = 0, phy = phy_info; i < ARRAY_SIZE(phy_info); i++, phy++)
- if (phy->id == (phy_hwid >> 4) || phy->id == 0)
- break;
-
- if (i >= ARRAY_SIZE(phy_info)) {
- printk(KERN_ERR DRV_MODULE_NAME
- ": %s PHY id 0x%08x is not supported!\n",
- dev->name, phy_hwid);
- return -1;
- }
-
- fep->phy = phy;
-
- printk(KERN_INFO DRV_MODULE_NAME
- ": %s Phy @ 0x%x, type %s (0x%08x)\n",
- dev->name, phy_id, fep->phy->name, phy_hwid);
-
- return phy_id;
-}
-
-void fec_mii_startup(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- const struct fec_platform_info *fpi = fep->fpi;
-
- if (!fpi->use_mdio || fep->phy == NULL)
- return;
-
- if (fep->phy->startup == NULL)
- return;
-
- (*fep->phy->startup) (dev);
-}
-
-void fec_mii_shutdown(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- const struct fec_platform_info *fpi = fep->fpi;
-
- if (!fpi->use_mdio || fep->phy == NULL)
- return;
-
- if (fep->phy->shutdown == NULL)
- return;
-
- (*fep->phy->shutdown) (dev);
-}
-
-void fec_mii_ack_int(struct net_device *dev)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- const struct fec_platform_info *fpi = fep->fpi;
-
- if (!fpi->use_mdio || fep->phy == NULL)
- return;
-
- if (fep->phy->ack_int == NULL)
- return;
-
- (*fep->phy->ack_int) (dev);
-}
-
-/* helper function */
-static int mii_negotiated(struct mii_if_info *mii)
-{
- int advert, lpa, val;
-
- if (!mii_link_ok(mii))
- return 0;
-
- val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
- if ((val & BMSR_ANEGCOMPLETE) == 0)
- return 0;
-
- advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
- lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
-
- return mii_nway_result(advert & lpa);
-}
-
-void fec_mii_link_status_change_check(struct net_device *dev, int init_media)
-{
- struct fec_enet_private *fep = netdev_priv(dev);
- unsigned int media;
- unsigned long flags;
-
- if (mii_check_media(&fep->mii_if, netif_msg_link(fep), init_media) == 0)
- return;
-
- media = mii_negotiated(&fep->mii_if);
-
- if (netif_carrier_ok(dev)) {
- spin_lock_irqsave(&fep->lock, flags);
- fec_restart(dev, !!(media & ADVERTISE_FULL),
- (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)) ?
- 100 : 10);
- spin_unlock_irqrestore(&fep->lock, flags);
-
- netif_start_queue(dev);
- } else {
- netif_stop_queue(dev);
-
- spin_lock_irqsave(&fep->lock, flags);
- fec_stop(dev);
- spin_unlock_irqrestore(&fep->lock, flags);
-
- }
-}
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index a5baaf5..352574a 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -43,7 +43,7 @@
#include <asm/uaccess.h>
#ifdef CONFIG_PPC_CPM_NEW_BINDING
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
#endif
#include "fs_enet.h"
diff --git a/drivers/net/fs_enet/mac-scc.c b/drivers/net/fs_enet/mac-scc.c
index d7ca319..e3557ec 100644
--- a/drivers/net/fs_enet/mac-scc.c
+++ b/drivers/net/fs_enet/mac-scc.c
@@ -44,7 +44,7 @@
#endif
#ifdef CONFIG_PPC_CPM_NEW_BINDING
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
#endif
#include "fs_enet.h"
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c
index f0014cf..8f6a43b 100644
--- a/drivers/net/fs_enet/mii-fec.c
+++ b/drivers/net/fs_enet/mii-fec.c
@@ -37,7 +37,7 @@
#include <asm/uaccess.h>
#ifdef CONFIG_PPC_CPM_NEW_BINDING
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
#endif
#include "fs_enet.h"
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
index babc79a..61af02b 100644
--- a/drivers/net/ibm_newemac/core.c
+++ b/drivers/net/ibm_newemac/core.c
@@ -363,25 +363,31 @@
static void emac_hash_mc(struct emac_instance *dev)
{
- struct emac_regs __iomem *p = dev->emacp;
- u16 gaht[4] = { 0 };
+ const int regs = EMAC_XAHT_REGS(dev);
+ u32 *gaht_base = emac_gaht_base(dev);
+ u32 gaht_temp[regs];
struct dev_mc_list *dmi;
+ int i;
DBG(dev, "hash_mc %d" NL, dev->ndev->mc_count);
+ memset(gaht_temp, 0, sizeof (gaht_temp));
+
for (dmi = dev->ndev->mc_list; dmi; dmi = dmi->next) {
- int bit;
+ int slot, reg, mask;
DBG2(dev, "mc %02x:%02x:%02x:%02x:%02x:%02x" NL,
dmi->dmi_addr[0], dmi->dmi_addr[1], dmi->dmi_addr[2],
dmi->dmi_addr[3], dmi->dmi_addr[4], dmi->dmi_addr[5]);
- bit = 63 - (ether_crc(ETH_ALEN, dmi->dmi_addr) >> 26);
- gaht[bit >> 4] |= 0x8000 >> (bit & 0x0f);
+ slot = EMAC_XAHT_CRC_TO_SLOT(dev, ether_crc(ETH_ALEN, dmi->dmi_addr));
+ reg = EMAC_XAHT_SLOT_TO_REG(dev, slot);
+ mask = EMAC_XAHT_SLOT_TO_MASK(dev, slot);
+
+ gaht_temp[reg] |= mask;
}
- out_be32(&p->gaht1, gaht[0]);
- out_be32(&p->gaht2, gaht[1]);
- out_be32(&p->gaht3, gaht[2]);
- out_be32(&p->gaht4, gaht[3]);
+
+ for (i = 0; i < regs; i++)
+ out_be32(gaht_base + i, gaht_temp[i]);
}
static inline u32 emac_iff2rmr(struct net_device *ndev)
@@ -398,7 +404,8 @@
if (ndev->flags & IFF_PROMISC)
r |= EMAC_RMR_PME;
- else if (ndev->flags & IFF_ALLMULTI || ndev->mc_count > 32)
+ else if (ndev->flags & IFF_ALLMULTI ||
+ (ndev->mc_count > EMAC_XAHT_SLOTS(dev)))
r |= EMAC_RMR_PMME;
else if (ndev->mc_count > 0)
r |= EMAC_RMR_MAE;
@@ -542,7 +549,7 @@
/* Put some arbitrary OUI, Manuf & Rev IDs so we can
* identify this GPCS PHY later.
*/
- out_be32(&p->ipcr, 0xdeadbeef);
+ out_be32(&p->u1.emac4.ipcr, 0xdeadbeef);
} else
mr1 |= EMAC_MR1_MF_1000;
@@ -2021,10 +2028,10 @@
{
if (emac_has_feature(dev, EMAC_FTR_EMAC4))
return sizeof(struct emac_ethtool_regs_subhdr) +
- EMAC4_ETHTOOL_REGS_SIZE;
+ EMAC4_ETHTOOL_REGS_SIZE(dev);
else
return sizeof(struct emac_ethtool_regs_subhdr) +
- EMAC_ETHTOOL_REGS_SIZE;
+ EMAC_ETHTOOL_REGS_SIZE(dev);
}
static int emac_ethtool_get_regs_len(struct net_device *ndev)
@@ -2051,12 +2058,12 @@
hdr->index = dev->cell_index;
if (emac_has_feature(dev, EMAC_FTR_EMAC4)) {
hdr->version = EMAC4_ETHTOOL_REGS_VER;
- memcpy_fromio(hdr + 1, dev->emacp, EMAC4_ETHTOOL_REGS_SIZE);
- return ((void *)(hdr + 1) + EMAC4_ETHTOOL_REGS_SIZE);
+ memcpy_fromio(hdr + 1, dev->emacp, EMAC4_ETHTOOL_REGS_SIZE(dev));
+ return ((void *)(hdr + 1) + EMAC4_ETHTOOL_REGS_SIZE(dev));
} else {
hdr->version = EMAC_ETHTOOL_REGS_VER;
- memcpy_fromio(hdr + 1, dev->emacp, EMAC_ETHTOOL_REGS_SIZE);
- return ((void *)(hdr + 1) + EMAC_ETHTOOL_REGS_SIZE);
+ memcpy_fromio(hdr + 1, dev->emacp, EMAC_ETHTOOL_REGS_SIZE(dev));
+ return ((void *)(hdr + 1) + EMAC_ETHTOOL_REGS_SIZE(dev));
}
}
@@ -2546,7 +2553,9 @@
}
/* Check EMAC version */
- if (of_device_is_compatible(np, "ibm,emac4")) {
+ if (of_device_is_compatible(np, "ibm,emac4sync")) {
+ dev->features |= (EMAC_FTR_EMAC4 | EMAC_FTR_EMAC4SYNC);
+ } else if (of_device_is_compatible(np, "ibm,emac4")) {
dev->features |= EMAC_FTR_EMAC4;
if (of_device_is_compatible(np, "ibm,emac-440gx"))
dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX;
@@ -2607,6 +2616,15 @@
}
memcpy(dev->ndev->dev_addr, p, 6);
+ /* IAHT and GAHT filter parameterization */
+ if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC)) {
+ dev->xaht_slots_shift = EMAC4SYNC_XAHT_SLOTS_SHIFT;
+ dev->xaht_width_shift = EMAC4SYNC_XAHT_WIDTH_SHIFT;
+ } else {
+ dev->xaht_slots_shift = EMAC4_XAHT_SLOTS_SHIFT;
+ dev->xaht_width_shift = EMAC4_XAHT_WIDTH_SHIFT;
+ }
+
DBG(dev, "features : 0x%08x / 0x%08x\n", dev->features, EMAC_FTRS_POSSIBLE);
DBG(dev, "tx_fifo_size : %d (%d gige)\n", dev->tx_fifo_size, dev->tx_fifo_size_gige);
DBG(dev, "rx_fifo_size : %d (%d gige)\n", dev->rx_fifo_size, dev->rx_fifo_size_gige);
@@ -2678,7 +2696,8 @@
goto err_irq_unmap;
}
// TODO : request_mem_region
- dev->emacp = ioremap(dev->rsrc_regs.start, sizeof(struct emac_regs));
+ dev->emacp = ioremap(dev->rsrc_regs.start,
+ dev->rsrc_regs.end - dev->rsrc_regs.start + 1);
if (dev->emacp == NULL) {
printk(KERN_ERR "%s: Can't map device registers!\n",
np->full_name);
@@ -2892,6 +2911,10 @@
.type = "network",
.compatible = "ibm,emac4",
},
+ {
+ .type = "network",
+ .compatible = "ibm,emac4sync",
+ },
{},
};
diff --git a/drivers/net/ibm_newemac/core.h b/drivers/net/ibm_newemac/core.h
index 1683db9..6545e69 100644
--- a/drivers/net/ibm_newemac/core.h
+++ b/drivers/net/ibm_newemac/core.h
@@ -33,8 +33,8 @@
#include <linux/netdevice.h>
#include <linux/dma-mapping.h>
#include <linux/spinlock.h>
+#include <linux/of_platform.h>
-#include <asm/of_platform.h>
#include <asm/io.h>
#include <asm/dcr.h>
@@ -235,6 +235,10 @@
u32 fifo_entry_size;
u32 mal_burst_size; /* move to MAL ? */
+ /* IAHT and GAHT filter parameterization */
+ u32 xaht_slots_shift;
+ u32 xaht_width_shift;
+
/* Descriptor management
*/
struct mal_descriptor *tx_desc;
@@ -309,6 +313,10 @@
* Set if we need phy clock workaround for 440ep or 440gr
*/
#define EMAC_FTR_440EP_PHY_CLK_FIX 0x00000100
+/*
+ * The 405EX and 460EX contain the EMAC4SYNC core
+ */
+#define EMAC_FTR_EMAC4SYNC 0x00000200
/* Right now, we don't quite handle the always/possible masks on the
@@ -320,7 +328,8 @@
EMAC_FTRS_POSSIBLE =
#ifdef CONFIG_IBM_NEW_EMAC_EMAC4
- EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR |
+ EMAC_FTR_EMAC4 | EMAC_FTR_EMAC4SYNC |
+ EMAC_FTR_HAS_NEW_STACR |
EMAC_FTR_STACR_OC_INVERT | EMAC_FTR_440GX_PHY_CLK_FIX |
#endif
#ifdef CONFIG_IBM_NEW_EMAC_TAH
@@ -342,6 +351,71 @@
(EMAC_FTRS_POSSIBLE & dev->features & feature);
}
+/*
+ * Various instances of the EMAC core have varying 1) number of
+ * address match slots, 2) width of the registers for handling address
+ * match slots, 3) number of registers for handling address match
+ * slots and 4) base offset for those registers.
+ *
+ * These macros and inlines handle these differences based on
+ * parameters supplied by the device structure which are, in turn,
+ * initialized based on the "compatible" entry in the device tree.
+ */
+
+#define EMAC4_XAHT_SLOTS_SHIFT 6
+#define EMAC4_XAHT_WIDTH_SHIFT 4
+
+#define EMAC4SYNC_XAHT_SLOTS_SHIFT 8
+#define EMAC4SYNC_XAHT_WIDTH_SHIFT 5
+
+#define EMAC_XAHT_SLOTS(dev) (1 << (dev)->xaht_slots_shift)
+#define EMAC_XAHT_WIDTH(dev) (1 << (dev)->xaht_width_shift)
+#define EMAC_XAHT_REGS(dev) (1 << ((dev)->xaht_slots_shift - \
+ (dev)->xaht_width_shift))
+
+#define EMAC_XAHT_CRC_TO_SLOT(dev, crc) \
+ ((EMAC_XAHT_SLOTS(dev) - 1) - \
+ ((crc) >> ((sizeof (u32) * BITS_PER_BYTE) - \
+ (dev)->xaht_slots_shift)))
+
+#define EMAC_XAHT_SLOT_TO_REG(dev, slot) \
+ ((slot) >> (dev)->xaht_width_shift)
+
+#define EMAC_XAHT_SLOT_TO_MASK(dev, slot) \
+ ((u32)(1 << (EMAC_XAHT_WIDTH(dev) - 1)) >> \
+ ((slot) & (u32)(EMAC_XAHT_WIDTH(dev) - 1)))
+
+static inline u32 *emac_xaht_base(struct emac_instance *dev)
+{
+ struct emac_regs __iomem *p = dev->emacp;
+ int offset;
+
+ /* The first IAHT entry always is the base of the block of
+ * IAHT and GAHT registers.
+ */
+ if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC))
+ offset = offsetof(struct emac_regs, u1.emac4sync.iaht1);
+ else
+ offset = offsetof(struct emac_regs, u0.emac4.iaht1);
+
+ return ((u32 *)((ptrdiff_t)p + offset));
+}
+
+static inline u32 *emac_gaht_base(struct emac_instance *dev)
+{
+ /* GAHT registers always come after an identical number of
+ * IAHT registers.
+ */
+ return (emac_xaht_base(dev) + EMAC_XAHT_REGS(dev));
+}
+
+static inline u32 *emac_iaht_base(struct emac_instance *dev)
+{
+ /* IAHT registers always come before an identical number of
+ * GAHT registers.
+ */
+ return (emac_xaht_base(dev));
+}
/* Ethtool get_regs complex data.
* We want to get not just EMAC registers, but also MAL, ZMII, RGMII, TAH
@@ -366,4 +440,11 @@
u32 index;
};
+#define EMAC_ETHTOOL_REGS_VER 0
+#define EMAC_ETHTOOL_REGS_SIZE(dev) ((dev)->rsrc_regs.end - \
+ (dev)->rsrc_regs.start + 1)
+#define EMAC4_ETHTOOL_REGS_VER 1
+#define EMAC4_ETHTOOL_REGS_SIZE(dev) ((dev)->rsrc_regs.end - \
+ (dev)->rsrc_regs.start + 1)
+
#endif /* __IBM_NEWEMAC_CORE_H */
diff --git a/drivers/net/ibm_newemac/debug.c b/drivers/net/ibm_newemac/debug.c
index 86b756a..775c850 100644
--- a/drivers/net/ibm_newemac/debug.c
+++ b/drivers/net/ibm_newemac/debug.c
@@ -67,29 +67,55 @@
static void emac_mac_dump(struct emac_instance *dev)
{
struct emac_regs __iomem *p = dev->emacp;
+ const int xaht_regs = EMAC_XAHT_REGS(dev);
+ u32 *gaht_base = emac_gaht_base(dev);
+ u32 *iaht_base = emac_iaht_base(dev);
+ int emac4sync = emac_has_feature(dev, EMAC_FTR_EMAC4SYNC);
+ int n;
printk("** EMAC %s registers **\n"
"MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
"RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n"
- "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n"
- "IAHT: 0x%04x 0x%04x 0x%04x 0x%04x "
- "GAHT: 0x%04x 0x%04x 0x%04x 0x%04x\n"
- "LSA = %04x%08x IPGVR = 0x%04x\n"
- "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
- "OCTX = 0x%08x OCRX = 0x%08x IPCR = 0x%08x\n",
+ "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n",
dev->ofdev->node->full_name, in_be32(&p->mr0), in_be32(&p->mr1),
in_be32(&p->tmr0), in_be32(&p->tmr1),
in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser),
in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid),
- in_be32(&p->vtci),
- in_be32(&p->iaht1), in_be32(&p->iaht2), in_be32(&p->iaht3),
- in_be32(&p->iaht4),
- in_be32(&p->gaht1), in_be32(&p->gaht2), in_be32(&p->gaht3),
- in_be32(&p->gaht4),
+ in_be32(&p->vtci)
+ );
+
+ if (emac4sync)
+ printk("MAR = %04x%08x MMAR = %04x%08x\n",
+ in_be32(&p->u0.emac4sync.mahr),
+ in_be32(&p->u0.emac4sync.malr),
+ in_be32(&p->u0.emac4sync.mmahr),
+ in_be32(&p->u0.emac4sync.mmalr)
+ );
+
+ for (n = 0; n < xaht_regs; n++)
+ printk("IAHT%02d = 0x%08x\n", n + 1, in_be32(iaht_base + n));
+
+ for (n = 0; n < xaht_regs; n++)
+ printk("GAHT%02d = 0x%08x\n", n + 1, in_be32(gaht_base + n));
+
+ printk("LSA = %04x%08x IPGVR = 0x%04x\n"
+ "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
+ "OCTX = 0x%08x OCRX = 0x%08x\n",
in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr),
in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr),
- in_be32(&p->octx), in_be32(&p->ocrx), in_be32(&p->ipcr)
- );
+ in_be32(&p->octx), in_be32(&p->ocrx)
+ );
+
+ if (!emac4sync) {
+ printk("IPCR = 0x%08x\n",
+ in_be32(&p->u1.emac4.ipcr)
+ );
+ } else {
+ printk("REVID = 0x%08x TPC = 0x%08x\n",
+ in_be32(&p->u1.emac4sync.revid),
+ in_be32(&p->u1.emac4sync.tpc)
+ );
+ }
emac_desc_dump(dev);
}
diff --git a/drivers/net/ibm_newemac/emac.h b/drivers/net/ibm_newemac/emac.h
index 91cb096..0afc2cf 100644
--- a/drivers/net/ibm_newemac/emac.h
+++ b/drivers/net/ibm_newemac/emac.h
@@ -27,37 +27,80 @@
#include <linux/types.h>
-/* EMAC registers Write Access rules */
+/* EMAC registers Write Access rules */
struct emac_regs {
- u32 mr0; /* special */
- u32 mr1; /* Reset */
- u32 tmr0; /* special */
- u32 tmr1; /* special */
- u32 rmr; /* Reset */
- u32 isr; /* Always */
- u32 iser; /* Reset */
- u32 iahr; /* Reset, R, T */
- u32 ialr; /* Reset, R, T */
- u32 vtpid; /* Reset, R, T */
- u32 vtci; /* Reset, R, T */
- u32 ptr; /* Reset, T */
- u32 iaht1; /* Reset, R */
- u32 iaht2; /* Reset, R */
- u32 iaht3; /* Reset, R */
- u32 iaht4; /* Reset, R */
- u32 gaht1; /* Reset, R */
- u32 gaht2; /* Reset, R */
- u32 gaht3; /* Reset, R */
- u32 gaht4; /* Reset, R */
+ /* Common registers across all EMAC implementations. */
+ u32 mr0; /* Special */
+ u32 mr1; /* Reset */
+ u32 tmr0; /* Special */
+ u32 tmr1; /* Special */
+ u32 rmr; /* Reset */
+ u32 isr; /* Always */
+ u32 iser; /* Reset */
+ u32 iahr; /* Reset, R, T */
+ u32 ialr; /* Reset, R, T */
+ u32 vtpid; /* Reset, R, T */
+ u32 vtci; /* Reset, R, T */
+ u32 ptr; /* Reset, T */
+ union {
+ /* Registers unique to EMAC4 implementations */
+ struct {
+ u32 iaht1; /* Reset, R */
+ u32 iaht2; /* Reset, R */
+ u32 iaht3; /* Reset, R */
+ u32 iaht4; /* Reset, R */
+ u32 gaht1; /* Reset, R */
+ u32 gaht2; /* Reset, R */
+ u32 gaht3; /* Reset, R */
+ u32 gaht4; /* Reset, R */
+ } emac4;
+ /* Registers unique to EMAC4SYNC implementations */
+ struct {
+ u32 mahr; /* Reset, R, T */
+ u32 malr; /* Reset, R, T */
+ u32 mmahr; /* Reset, R, T */
+ u32 mmalr; /* Reset, R, T */
+ u32 rsvd0[4];
+ } emac4sync;
+ } u0;
+ /* Common registers across all EMAC implementations. */
u32 lsah;
u32 lsal;
- u32 ipgvr; /* Reset, T */
- u32 stacr; /* special */
- u32 trtr; /* special */
- u32 rwmr; /* Reset */
+ u32 ipgvr; /* Reset, T */
+ u32 stacr; /* Special */
+ u32 trtr; /* Special */
+ u32 rwmr; /* Reset */
u32 octx;
u32 ocrx;
- u32 ipcr;
+ union {
+ /* Registers unique to EMAC4 implementations */
+ struct {
+ u32 ipcr;
+ } emac4;
+ /* Registers unique to EMAC4SYNC implementations */
+ struct {
+ u32 rsvd1;
+ u32 revid;
+ u32 rsvd2[2];
+ u32 iaht1; /* Reset, R */
+ u32 iaht2; /* Reset, R */
+ u32 iaht3; /* Reset, R */
+ u32 iaht4; /* Reset, R */
+ u32 iaht5; /* Reset, R */
+ u32 iaht6; /* Reset, R */
+ u32 iaht7; /* Reset, R */
+ u32 iaht8; /* Reset, R */
+ u32 gaht1; /* Reset, R */
+ u32 gaht2; /* Reset, R */
+ u32 gaht3; /* Reset, R */
+ u32 gaht4; /* Reset, R */
+ u32 gaht5; /* Reset, R */
+ u32 gaht6; /* Reset, R */
+ u32 gaht7; /* Reset, R */
+ u32 gaht8; /* Reset, R */
+ u32 tpc; /* Reset, T */
+ } emac4sync;
+ } u1;
};
/*
@@ -73,12 +116,6 @@
#define PHY_MODE_RTBI 7
#define PHY_MODE_SGMII 8
-
-#define EMAC_ETHTOOL_REGS_VER 0
-#define EMAC_ETHTOOL_REGS_SIZE (sizeof(struct emac_regs) - sizeof(u32))
-#define EMAC4_ETHTOOL_REGS_VER 1
-#define EMAC4_ETHTOOL_REGS_SIZE sizeof(struct emac_regs)
-
/* EMACx_MR0 */
#define EMAC_MR0_RXI 0x80000000
#define EMAC_MR0_TXI 0x40000000
diff --git a/drivers/net/ibm_newemac/rgmii.c b/drivers/net/ibm_newemac/rgmii.c
index e32da3d..1d5379d 100644
--- a/drivers/net/ibm_newemac/rgmii.c
+++ b/drivers/net/ibm_newemac/rgmii.c
@@ -39,6 +39,7 @@
#define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4))
#define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4))
#define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4))
+#define RGMII_FER_MII(idx) RGMII_FER_GMII(idx)
/* RGMIIx_SSR */
#define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8))
@@ -49,6 +50,7 @@
static inline int rgmii_valid_mode(int phy_mode)
{
return phy_mode == PHY_MODE_GMII ||
+ phy_mode == PHY_MODE_MII ||
phy_mode == PHY_MODE_RGMII ||
phy_mode == PHY_MODE_TBI ||
phy_mode == PHY_MODE_RTBI;
@@ -63,6 +65,8 @@
return "TBI";
case PHY_MODE_GMII:
return "GMII";
+ case PHY_MODE_MII:
+ return "MII";
case PHY_MODE_RTBI:
return "RTBI";
default:
@@ -79,6 +83,8 @@
return RGMII_FER_TBI(input);
case PHY_MODE_GMII:
return RGMII_FER_GMII(input);
+ case PHY_MODE_MII:
+ return RGMII_FER_MII(input);
case PHY_MODE_RTBI:
return RGMII_FER_RTBI(input);
default:
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index fb0b918..402e810 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -28,8 +28,8 @@
#include <linux/mii.h>
#include <linux/phy.h>
#include <linux/workqueue.h>
+#include <linux/of_platform.h>
-#include <asm/of_platform.h>
#include <asm/uaccess.h>
#include <asm/irq.h>
#include <asm/io.h>
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
index 9404747..6d9e7ad 100644
--- a/drivers/net/ucc_geth_mii.c
+++ b/drivers/net/ucc_geth_mii.c
@@ -36,8 +36,8 @@
#include <linux/mii.h>
#include <linux/phy.h>
#include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
-#include <asm/of_platform.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
diff --git a/drivers/of/device.c b/drivers/of/device.c
index 29681c4..8a1d93a 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -48,16 +48,32 @@
}
EXPORT_SYMBOL(of_dev_put);
-static ssize_t dev_show_devspec(struct device *dev,
+static ssize_t devspec_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct of_device *ofdev;
ofdev = to_of_device(dev);
- return sprintf(buf, "%s", ofdev->node->full_name);
+ return sprintf(buf, "%s\n", ofdev->node->full_name);
}
-static DEVICE_ATTR(devspec, S_IRUGO, dev_show_devspec, NULL);
+static ssize_t modalias_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct of_device *ofdev = to_of_device(dev);
+ ssize_t len = 0;
+
+ len = of_device_get_modalias(ofdev, buf, PAGE_SIZE - 2);
+ buf[len] = '\n';
+ buf[len+1] = 0;
+ return len+1;
+}
+
+struct device_attribute of_platform_device_attrs[] = {
+ __ATTR_RO(devspec),
+ __ATTR_RO(modalias),
+ __ATTR_NULL
+};
/**
* of_release_dev - free an of device structure when all users of it are finished.
@@ -78,25 +94,61 @@
int of_device_register(struct of_device *ofdev)
{
- int rc;
-
BUG_ON(ofdev->node == NULL);
-
- rc = device_register(&ofdev->dev);
- if (rc)
- return rc;
-
- rc = device_create_file(&ofdev->dev, &dev_attr_devspec);
- if (rc)
- device_unregister(&ofdev->dev);
-
- return rc;
+ return device_register(&ofdev->dev);
}
EXPORT_SYMBOL(of_device_register);
void of_device_unregister(struct of_device *ofdev)
{
- device_remove_file(&ofdev->dev, &dev_attr_devspec);
device_unregister(&ofdev->dev);
}
EXPORT_SYMBOL(of_device_unregister);
+
+ssize_t of_device_get_modalias(struct of_device *ofdev,
+ char *str, ssize_t len)
+{
+ const char *compat;
+ int cplen, i;
+ ssize_t tsize, csize, repend;
+
+ /* Name & Type */
+ csize = snprintf(str, len, "of:N%sT%s",
+ ofdev->node->name, ofdev->node->type);
+
+ /* Get compatible property if any */
+ compat = of_get_property(ofdev->node, "compatible", &cplen);
+ if (!compat)
+ return csize;
+
+ /* Find true end (we tolerate multiple \0 at the end */
+ for (i = (cplen - 1); i >= 0 && !compat[i]; i--)
+ cplen--;
+ if (!cplen)
+ return csize;
+ cplen++;
+
+ /* Check space (need cplen+1 chars including final \0) */
+ tsize = csize + cplen;
+ repend = tsize;
+
+ if (csize >= len) /* @ the limit, all is already filled */
+ return tsize;
+
+ if (tsize >= len) { /* limit compat list */
+ cplen = len - csize - 1;
+ repend = len;
+ }
+
+ /* Copy and do char replacement */
+ memcpy(&str[csize + 1], compat, cplen);
+ for (i = csize; i < repend; i++) {
+ char c = str[i];
+ if (c == '\0')
+ str[i] = 'C';
+ else if (c == ' ')
+ str[i] = '_';
+ }
+
+ return tsize;
+}
diff --git a/drivers/of/gpio.c b/drivers/of/gpio.c
index 000681e..1c9cab8 100644
--- a/drivers/of/gpio.c
+++ b/drivers/of/gpio.c
@@ -137,38 +137,6 @@
}
EXPORT_SYMBOL(of_gpio_simple_xlate);
-/* Should be sufficient for now, later we'll use dynamic bases. */
-#if defined(CONFIG_PPC32) || defined(CONFIG_SPARC32)
-#define GPIOS_PER_CHIP 32
-#else
-#define GPIOS_PER_CHIP 64
-#endif
-
-static int of_get_gpiochip_base(struct device_node *np)
-{
- struct device_node *gc = NULL;
- int gpiochip_base = 0;
-
- while ((gc = of_find_all_nodes(gc))) {
- if (!of_get_property(gc, "gpio-controller", NULL))
- continue;
-
- if (gc != np) {
- gpiochip_base += GPIOS_PER_CHIP;
- continue;
- }
-
- of_node_put(gc);
-
- if (gpiochip_base >= ARCH_NR_GPIOS)
- return -ENOSPC;
-
- return gpiochip_base;
- }
-
- return -ENOENT;
-}
-
/**
* of_mm_gpiochip_add - Add memory mapped GPIO chip (bank)
* @np: device node of the GPIO chip
@@ -205,11 +173,7 @@
if (!mm_gc->regs)
goto err1;
- gc->base = of_get_gpiochip_base(np);
- if (gc->base < 0) {
- ret = gc->base;
- goto err1;
- }
+ gc->base = -1;
if (!of_gc->xlate)
of_gc->xlate = of_gpio_simple_xlate;
diff --git a/drivers/of/of_i2c.c b/drivers/of/of_i2c.c
index b2ccdcb..5c015d3 100644
--- a/drivers/of/of_i2c.c
+++ b/drivers/of/of_i2c.c
@@ -13,6 +13,7 @@
#include <linux/i2c.h>
#include <linux/of.h>
+#include <linux/of_i2c.h>
#include <linux/module.h>
struct i2c_driver_device {
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index ca09a63..298de0f 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -17,6 +17,8 @@
#include <linux/of_device.h>
#include <linux/of_platform.h>
+extern struct device_attribute of_platform_device_attrs[];
+
static int of_platform_bus_match(struct device *dev, struct device_driver *drv)
{
struct of_device *of_dev = to_of_device(dev);
@@ -103,6 +105,7 @@
bus->suspend = of_platform_device_suspend;
bus->resume = of_platform_device_resume;
bus->shutdown = of_platform_device_shutdown;
+ bus->dev_attrs = of_platform_device_attrs;
return bus_register(bus);
}
diff --git a/drivers/pcmcia/electra_cf.c b/drivers/pcmcia/electra_cf.c
index 52d0aa8..c21f9a9 100644
--- a/drivers/pcmcia/electra_cf.c
+++ b/drivers/pcmcia/electra_cf.c
@@ -29,9 +29,9 @@
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/vmalloc.h>
+#include <linux/of_platform.h>
#include <pcmcia/ss.h>
-#include <asm/of_platform.h>
static const char driver_name[] = "electra-cf";
diff --git a/drivers/pcmcia/m8xx_pcmcia.c b/drivers/pcmcia/m8xx_pcmcia.c
index 13a5fbd..ff66604 100644
--- a/drivers/pcmcia/m8xx_pcmcia.c
+++ b/drivers/pcmcia/m8xx_pcmcia.c
@@ -49,6 +49,8 @@
#include <linux/interrupt.h>
#include <linux/fsl_devices.h>
#include <linux/bitops.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/system.h>
@@ -57,8 +59,6 @@
#include <asm/8xx_immap.h>
#include <asm/irq.h>
#include <asm/fs_pd.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
diff --git a/drivers/s390/scsi/Makefile b/drivers/s390/scsi/Makefile
index d6a78f1..cb301cc 100644
--- a/drivers/s390/scsi/Makefile
+++ b/drivers/s390/scsi/Makefile
@@ -3,7 +3,6 @@
#
zfcp-objs := zfcp_aux.o zfcp_ccw.o zfcp_scsi.o zfcp_erp.o zfcp_qdio.o \
- zfcp_fsf.o zfcp_dbf.o zfcp_sysfs_adapter.o zfcp_sysfs_port.o \
- zfcp_sysfs_unit.o zfcp_sysfs_driver.o
+ zfcp_fsf.o zfcp_dbf.o zfcp_sysfs.o zfcp_fc.o zfcp_cfdc.o
obj-$(CONFIG_ZFCP) += zfcp.o
diff --git a/drivers/s390/scsi/zfcp_aux.c b/drivers/s390/scsi/zfcp_aux.c
index 8c7e2b7..90abfd0 100644
--- a/drivers/s390/scsi/zfcp_aux.c
+++ b/drivers/s390/scsi/zfcp_aux.c
@@ -1,22 +1,9 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Module interface and handling of zfcp data structures.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
/*
@@ -31,93 +18,25 @@
* Maxim Shchetynin
* Volker Sameske
* Ralph Wuerthner
+ * Michael Loehr
+ * Swen Schillig
+ * Christof Schmitt
+ * Martin Petermann
+ * Sven Schuetz
*/
+#include <linux/miscdevice.h>
#include "zfcp_ext.h"
-/* accumulated log level (module parameter) */
-static u32 loglevel = ZFCP_LOG_LEVEL_DEFAULTS;
static char *device;
-/*********************** FUNCTION PROTOTYPES *********************************/
-
-/* written against the module interface */
-static int __init zfcp_module_init(void);
-
-/* FCP related */
-static void zfcp_ns_gid_pn_handler(unsigned long);
-
-/* miscellaneous */
-static int zfcp_sg_list_alloc(struct zfcp_sg_list *, size_t);
-static void zfcp_sg_list_free(struct zfcp_sg_list *);
-static int zfcp_sg_list_copy_from_user(struct zfcp_sg_list *,
- void __user *, size_t);
-static int zfcp_sg_list_copy_to_user(void __user *,
- struct zfcp_sg_list *, size_t);
-static long zfcp_cfdc_dev_ioctl(struct file *, unsigned int, unsigned long);
-
-#define ZFCP_CFDC_IOC_MAGIC 0xDD
-#define ZFCP_CFDC_IOC \
- _IOWR(ZFCP_CFDC_IOC_MAGIC, 0, struct zfcp_cfdc_sense_data)
-
-
-static const struct file_operations zfcp_cfdc_fops = {
- .unlocked_ioctl = zfcp_cfdc_dev_ioctl,
-#ifdef CONFIG_COMPAT
- .compat_ioctl = zfcp_cfdc_dev_ioctl
-#endif
-};
-
-static struct miscdevice zfcp_cfdc_misc = {
- .minor = ZFCP_CFDC_DEV_MINOR,
- .name = ZFCP_CFDC_DEV_NAME,
- .fops = &zfcp_cfdc_fops
-};
-
-/*********************** KERNEL/MODULE PARAMETERS ***************************/
-
-/* declare driver module init/cleanup functions */
-module_init(zfcp_module_init);
MODULE_AUTHOR("IBM Deutschland Entwicklung GmbH - linux390@de.ibm.com");
-MODULE_DESCRIPTION
- ("FCP (SCSI over Fibre Channel) HBA driver for IBM System z9 and zSeries");
+MODULE_DESCRIPTION("FCP HBA driver");
MODULE_LICENSE("GPL");
module_param(device, charp, 0400);
MODULE_PARM_DESC(device, "specify initial device");
-module_param(loglevel, uint, 0400);
-MODULE_PARM_DESC(loglevel,
- "log levels, 8 nibbles: "
- "FC ERP QDIO CIO Config FSF SCSI Other, "
- "levels: 0=none 1=normal 2=devel 3=trace");
-
-/****************************************************************/
-/************** Functions without logging ***********************/
-/****************************************************************/
-
-void
-_zfcp_hex_dump(char *addr, int count)
-{
- int i;
- for (i = 0; i < count; i++) {
- printk("%02x", addr[i]);
- if ((i % 4) == 3)
- printk(" ");
- if ((i % 32) == 31)
- printk("\n");
- }
- if (((i-1) % 32) != 31)
- printk("\n");
-}
-
-
-/****************************************************************/
-/****** Functions to handle the request ID hash table ********/
-/****************************************************************/
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_FSF
-
static int zfcp_reqlist_alloc(struct zfcp_adapter *adapter)
{
int idx;
@@ -132,11 +51,12 @@
return 0;
}
-static void zfcp_reqlist_free(struct zfcp_adapter *adapter)
-{
- kfree(adapter->req_list);
-}
-
+/**
+ * zfcp_reqlist_isempty - is the request list empty
+ * @adapter: pointer to struct zfcp_adapter
+ *
+ * Returns: true if list is empty, false otherwise
+ */
int zfcp_reqlist_isempty(struct zfcp_adapter *adapter)
{
unsigned int idx;
@@ -147,62 +67,58 @@
return 1;
}
-#undef ZFCP_LOG_AREA
-
-/****************************************************************/
-/************** Uncategorised Functions *************************/
-/****************************************************************/
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_OTHER
-
-/**
- * zfcp_device_setup - setup function
- * @str: pointer to parameter string
- *
- * Parse "device=..." parameter string.
- */
-static int __init
-zfcp_device_setup(char *devstr)
+static int __init zfcp_device_setup(char *devstr)
{
- char *tmp, *str;
- size_t len;
+ char *token;
+ char *str;
if (!devstr)
return 0;
- len = strlen(devstr) + 1;
- str = kmalloc(len, GFP_KERNEL);
+ /* duplicate devstr and keep the original for sysfs presentation*/
+ str = kmalloc(strlen(devstr) + 1, GFP_KERNEL);
if (!str)
- goto err_out;
- memcpy(str, devstr, len);
+ return 0;
- tmp = strchr(str, ',');
- if (!tmp)
- goto err_out;
- *tmp++ = '\0';
- strncpy(zfcp_data.init_busid, str, BUS_ID_SIZE);
- zfcp_data.init_busid[BUS_ID_SIZE-1] = '\0';
+ strcpy(str, devstr);
- zfcp_data.init_wwpn = simple_strtoull(tmp, &tmp, 0);
- if (*tmp++ != ',')
+ token = strsep(&str, ",");
+ if (!token || strlen(token) >= BUS_ID_SIZE)
goto err_out;
- if (*tmp == '\0')
+ strncpy(zfcp_data.init_busid, token, BUS_ID_SIZE);
+
+ token = strsep(&str, ",");
+ if (!token || strict_strtoull(token, 0, &zfcp_data.init_wwpn))
goto err_out;
- zfcp_data.init_fcp_lun = simple_strtoull(tmp, &tmp, 0);
- if (*tmp != '\0')
+ token = strsep(&str, ",");
+ if (!token || strict_strtoull(token, 0, &zfcp_data.init_fcp_lun))
goto err_out;
+
kfree(str);
return 1;
err_out:
- ZFCP_LOG_NORMAL("Parse error for device parameter string %s\n", str);
kfree(str);
+ pr_err("zfcp: Parse error for device parameter string %s, "
+ "device not attached.\n", devstr);
return 0;
}
-static void __init
-zfcp_init_device_configure(void)
+static struct zfcp_adapter *zfcp_get_adapter_by_busid(char *bus_id)
+{
+ struct zfcp_adapter *adapter;
+
+ list_for_each_entry(adapter, &zfcp_data.adapter_list_head, list)
+ if ((strncmp(bus_id, adapter->ccw_device->dev.bus_id,
+ BUS_ID_SIZE) == 0) &&
+ !(atomic_read(&adapter->status) &
+ ZFCP_STATUS_COMMON_REMOVE))
+ return adapter;
+ return NULL;
+}
+
+static void __init zfcp_init_device_configure(void)
{
struct zfcp_adapter *adapter;
struct zfcp_port *port;
@@ -215,101 +131,75 @@
zfcp_adapter_get(adapter);
read_unlock_irq(&zfcp_data.config_lock);
- if (adapter == NULL)
+ if (!adapter)
goto out_adapter;
port = zfcp_port_enqueue(adapter, zfcp_data.init_wwpn, 0, 0);
- if (!port)
+ if (IS_ERR(port))
goto out_port;
unit = zfcp_unit_enqueue(port, zfcp_data.init_fcp_lun);
- if (!unit)
+ if (IS_ERR(unit))
goto out_unit;
up(&zfcp_data.config_sema);
ccw_device_set_online(adapter->ccw_device);
zfcp_erp_wait(adapter);
down(&zfcp_data.config_sema);
zfcp_unit_put(unit);
- out_unit:
+out_unit:
zfcp_port_put(port);
- out_port:
+out_port:
zfcp_adapter_put(adapter);
- out_adapter:
+out_adapter:
up(&zfcp_data.config_sema);
return;
}
-static int calc_alignment(int size)
+static struct kmem_cache *zfcp_cache_create(int size, char *name)
{
int align = 1;
-
- if (!size)
- return 0;
-
while ((size - align) > 0)
align <<= 1;
-
- return align;
+ return kmem_cache_create(name , size, align, 0, NULL);
}
-static int __init
-zfcp_module_init(void)
+static int __init zfcp_module_init(void)
{
int retval = -ENOMEM;
- int size, align;
- size = sizeof(struct zfcp_fsf_req_qtcb);
- align = calc_alignment(size);
- zfcp_data.fsf_req_qtcb_cache =
- kmem_cache_create("zfcp_fsf", size, align, 0, NULL);
+ zfcp_data.fsf_req_qtcb_cache = zfcp_cache_create(
+ sizeof(struct zfcp_fsf_req_qtcb), "zfcp_fsf");
if (!zfcp_data.fsf_req_qtcb_cache)
goto out;
- size = sizeof(struct fsf_status_read_buffer);
- align = calc_alignment(size);
- zfcp_data.sr_buffer_cache =
- kmem_cache_create("zfcp_sr", size, align, 0, NULL);
+ zfcp_data.sr_buffer_cache = zfcp_cache_create(
+ sizeof(struct fsf_status_read_buffer), "zfcp_sr");
if (!zfcp_data.sr_buffer_cache)
goto out_sr_cache;
- size = sizeof(struct zfcp_gid_pn_data);
- align = calc_alignment(size);
- zfcp_data.gid_pn_cache =
- kmem_cache_create("zfcp_gid", size, align, 0, NULL);
+ zfcp_data.gid_pn_cache = zfcp_cache_create(
+ sizeof(struct zfcp_gid_pn_data), "zfcp_gid");
if (!zfcp_data.gid_pn_cache)
goto out_gid_cache;
- atomic_set(&zfcp_data.loglevel, loglevel);
-
- /* initialize adapter list */
INIT_LIST_HEAD(&zfcp_data.adapter_list_head);
-
- /* initialize adapters to be removed list head */
INIT_LIST_HEAD(&zfcp_data.adapter_remove_lh);
+ sema_init(&zfcp_data.config_sema, 1);
+ rwlock_init(&zfcp_data.config_lock);
+
zfcp_data.scsi_transport_template =
fc_attach_transport(&zfcp_transport_functions);
if (!zfcp_data.scsi_transport_template)
goto out_transport;
retval = misc_register(&zfcp_cfdc_misc);
- if (retval != 0) {
- ZFCP_LOG_INFO("registration of misc device "
- "zfcp_cfdc failed\n");
+ if (retval) {
+ pr_err("zfcp: registration of misc device zfcp_cfdc failed\n");
goto out_misc;
}
- ZFCP_LOG_TRACE("major/minor for zfcp_cfdc: %d/%d\n",
- ZFCP_CFDC_DEV_MAJOR, zfcp_cfdc_misc.minor);
-
- /* Initialise proc semaphores */
- sema_init(&zfcp_data.config_sema, 1);
-
- /* initialise configuration rw lock */
- rwlock_init(&zfcp_data.config_lock);
-
- /* setup dynamic I/O */
retval = zfcp_ccw_register();
if (retval) {
- ZFCP_LOG_NORMAL("registration with common I/O layer failed\n");
+ pr_err("zfcp: Registration with common I/O layer failed.\n");
goto out_ccw_register;
}
@@ -318,527 +208,88 @@
goto out;
- out_ccw_register:
+out_ccw_register:
misc_deregister(&zfcp_cfdc_misc);
- out_misc:
+out_misc:
fc_release_transport(zfcp_data.scsi_transport_template);
- out_transport:
+out_transport:
kmem_cache_destroy(zfcp_data.gid_pn_cache);
- out_gid_cache:
+out_gid_cache:
kmem_cache_destroy(zfcp_data.sr_buffer_cache);
- out_sr_cache:
+out_sr_cache:
kmem_cache_destroy(zfcp_data.fsf_req_qtcb_cache);
- out:
+out:
return retval;
}
-/*
- * function: zfcp_cfdc_dev_ioctl
- *
- * purpose: Handle control file upload/download transaction via IOCTL
- * interface
- *
- * returns: 0 - Operation completed successfuly
- * -ENOTTY - Unknown IOCTL command
- * -EINVAL - Invalid sense data record
- * -ENXIO - The FCP adapter is not available
- * -EOPNOTSUPP - The FCP adapter does not have CFDC support
- * -ENOMEM - Insufficient memory
- * -EFAULT - User space memory I/O operation fault
- * -EPERM - Cannot create or queue FSF request or create SBALs
- * -ERESTARTSYS- Received signal (is mapped to EAGAIN by VFS)
- */
-static long
-zfcp_cfdc_dev_ioctl(struct file *file, unsigned int command,
- unsigned long buffer)
-{
- struct zfcp_cfdc_sense_data *sense_data, __user *sense_data_user;
- struct zfcp_adapter *adapter = NULL;
- struct zfcp_fsf_req *fsf_req = NULL;
- struct zfcp_sg_list *sg_list = NULL;
- u32 fsf_command, option;
- char *bus_id = NULL;
- int retval = 0;
-
- sense_data = kmalloc(sizeof(struct zfcp_cfdc_sense_data), GFP_KERNEL);
- if (sense_data == NULL) {
- retval = -ENOMEM;
- goto out;
- }
-
- sg_list = kzalloc(sizeof(struct zfcp_sg_list), GFP_KERNEL);
- if (sg_list == NULL) {
- retval = -ENOMEM;
- goto out;
- }
-
- if (command != ZFCP_CFDC_IOC) {
- ZFCP_LOG_INFO("IOC request code 0x%x invalid\n", command);
- retval = -ENOTTY;
- goto out;
- }
-
- if ((sense_data_user = (void __user *) buffer) == NULL) {
- ZFCP_LOG_INFO("sense data record is required\n");
- retval = -EINVAL;
- goto out;
- }
-
- retval = copy_from_user(sense_data, sense_data_user,
- sizeof(struct zfcp_cfdc_sense_data));
- if (retval) {
- retval = -EFAULT;
- goto out;
- }
-
- if (sense_data->signature != ZFCP_CFDC_SIGNATURE) {
- ZFCP_LOG_INFO("invalid sense data request signature 0x%08x\n",
- ZFCP_CFDC_SIGNATURE);
- retval = -EINVAL;
- goto out;
- }
-
- switch (sense_data->command) {
-
- case ZFCP_CFDC_CMND_DOWNLOAD_NORMAL:
- fsf_command = FSF_QTCB_DOWNLOAD_CONTROL_FILE;
- option = FSF_CFDC_OPTION_NORMAL_MODE;
- break;
-
- case ZFCP_CFDC_CMND_DOWNLOAD_FORCE:
- fsf_command = FSF_QTCB_DOWNLOAD_CONTROL_FILE;
- option = FSF_CFDC_OPTION_FORCE;
- break;
-
- case ZFCP_CFDC_CMND_FULL_ACCESS:
- fsf_command = FSF_QTCB_DOWNLOAD_CONTROL_FILE;
- option = FSF_CFDC_OPTION_FULL_ACCESS;
- break;
-
- case ZFCP_CFDC_CMND_RESTRICTED_ACCESS:
- fsf_command = FSF_QTCB_DOWNLOAD_CONTROL_FILE;
- option = FSF_CFDC_OPTION_RESTRICTED_ACCESS;
- break;
-
- case ZFCP_CFDC_CMND_UPLOAD:
- fsf_command = FSF_QTCB_UPLOAD_CONTROL_FILE;
- option = 0;
- break;
-
- default:
- ZFCP_LOG_INFO("invalid command code 0x%08x\n",
- sense_data->command);
- retval = -EINVAL;
- goto out;
- }
-
- bus_id = kmalloc(BUS_ID_SIZE, GFP_KERNEL);
- if (bus_id == NULL) {
- retval = -ENOMEM;
- goto out;
- }
- snprintf(bus_id, BUS_ID_SIZE, "%d.%d.%04x",
- (sense_data->devno >> 24),
- (sense_data->devno >> 16) & 0xFF,
- (sense_data->devno & 0xFFFF));
-
- read_lock_irq(&zfcp_data.config_lock);
- adapter = zfcp_get_adapter_by_busid(bus_id);
- if (adapter)
- zfcp_adapter_get(adapter);
- read_unlock_irq(&zfcp_data.config_lock);
-
- kfree(bus_id);
-
- if (adapter == NULL) {
- ZFCP_LOG_INFO("invalid adapter\n");
- retval = -ENXIO;
- goto out;
- }
-
- if (sense_data->command & ZFCP_CFDC_WITH_CONTROL_FILE) {
- retval = zfcp_sg_list_alloc(sg_list,
- ZFCP_CFDC_MAX_CONTROL_FILE_SIZE);
- if (retval) {
- retval = -ENOMEM;
- goto out;
- }
- }
-
- if ((sense_data->command & ZFCP_CFDC_DOWNLOAD) &&
- (sense_data->command & ZFCP_CFDC_WITH_CONTROL_FILE)) {
- retval = zfcp_sg_list_copy_from_user(
- sg_list, &sense_data_user->control_file,
- ZFCP_CFDC_MAX_CONTROL_FILE_SIZE);
- if (retval) {
- retval = -EFAULT;
- goto out;
- }
- }
-
- retval = zfcp_fsf_control_file(adapter, &fsf_req, fsf_command,
- option, sg_list);
- if (retval)
- goto out;
-
- if ((fsf_req->qtcb->prefix.prot_status != FSF_PROT_GOOD) &&
- (fsf_req->qtcb->prefix.prot_status != FSF_PROT_FSF_STATUS_PRESENTED)) {
- retval = -ENXIO;
- goto out;
- }
-
- sense_data->fsf_status = fsf_req->qtcb->header.fsf_status;
- memcpy(&sense_data->fsf_status_qual,
- &fsf_req->qtcb->header.fsf_status_qual,
- sizeof(union fsf_status_qual));
- memcpy(&sense_data->payloads, &fsf_req->qtcb->bottom.support.els, 256);
-
- retval = copy_to_user(sense_data_user, sense_data,
- sizeof(struct zfcp_cfdc_sense_data));
- if (retval) {
- retval = -EFAULT;
- goto out;
- }
-
- if (sense_data->command & ZFCP_CFDC_UPLOAD) {
- retval = zfcp_sg_list_copy_to_user(
- &sense_data_user->control_file, sg_list,
- ZFCP_CFDC_MAX_CONTROL_FILE_SIZE);
- if (retval) {
- retval = -EFAULT;
- goto out;
- }
- }
-
- out:
- if (fsf_req != NULL)
- zfcp_fsf_req_free(fsf_req);
-
- if ((adapter != NULL) && (retval != -ENXIO))
- zfcp_adapter_put(adapter);
-
- if (sg_list != NULL) {
- zfcp_sg_list_free(sg_list);
- kfree(sg_list);
- }
-
- kfree(sense_data);
-
- return retval;
-}
-
-
-/**
- * zfcp_sg_list_alloc - create a scatter-gather list of the specified size
- * @sg_list: structure describing a scatter gather list
- * @size: size of scatter-gather list
- * Return: 0 on success, else -ENOMEM
- *
- * In sg_list->sg a pointer to the created scatter-gather list is returned,
- * or NULL if we run out of memory. sg_list->count specifies the number of
- * elements of the scatter-gather list. The maximum size of a single element
- * in the scatter-gather list is PAGE_SIZE.
- */
-static int
-zfcp_sg_list_alloc(struct zfcp_sg_list *sg_list, size_t size)
-{
- struct scatterlist *sg;
- unsigned int i;
- int retval = 0;
- void *address;
-
- BUG_ON(sg_list == NULL);
-
- sg_list->count = size >> PAGE_SHIFT;
- if (size & ~PAGE_MASK)
- sg_list->count++;
- sg_list->sg = kcalloc(sg_list->count, sizeof(struct scatterlist),
- GFP_KERNEL);
- if (sg_list->sg == NULL) {
- sg_list->count = 0;
- retval = -ENOMEM;
- goto out;
- }
- sg_init_table(sg_list->sg, sg_list->count);
-
- for (i = 0, sg = sg_list->sg; i < sg_list->count; i++, sg++) {
- address = (void *) get_zeroed_page(GFP_KERNEL);
- if (address == NULL) {
- sg_list->count = i;
- zfcp_sg_list_free(sg_list);
- retval = -ENOMEM;
- goto out;
- }
- zfcp_address_to_sg(address, sg, min(size, PAGE_SIZE));
- size -= sg->length;
- }
-
- out:
- return retval;
-}
-
-
-/**
- * zfcp_sg_list_free - free memory of a scatter-gather list
- * @sg_list: structure describing a scatter-gather list
- *
- * Memory for each element in the scatter-gather list is freed.
- * Finally sg_list->sg is freed itself and sg_list->count is reset.
- */
-static void
-zfcp_sg_list_free(struct zfcp_sg_list *sg_list)
-{
- struct scatterlist *sg;
- unsigned int i;
-
- BUG_ON(sg_list == NULL);
-
- for (i = 0, sg = sg_list->sg; i < sg_list->count; i++, sg++)
- free_page((unsigned long) zfcp_sg_to_address(sg));
-
- sg_list->count = 0;
- kfree(sg_list->sg);
-}
-
-/**
- * zfcp_sg_size - determine size of a scatter-gather list
- * @sg: array of (struct scatterlist)
- * @sg_count: elements in array
- * Return: size of entire scatter-gather list
- */
-static size_t zfcp_sg_size(struct scatterlist *sg, unsigned int sg_count)
-{
- unsigned int i;
- struct scatterlist *p;
- size_t size;
-
- size = 0;
- for (i = 0, p = sg; i < sg_count; i++, p++) {
- BUG_ON(p == NULL);
- size += p->length;
- }
-
- return size;
-}
-
-
-/**
- * zfcp_sg_list_copy_from_user -copy data from user space to scatter-gather list
- * @sg_list: structure describing a scatter-gather list
- * @user_buffer: pointer to buffer in user space
- * @size: number of bytes to be copied
- * Return: 0 on success, -EFAULT if copy_from_user fails.
- */
-static int
-zfcp_sg_list_copy_from_user(struct zfcp_sg_list *sg_list,
- void __user *user_buffer,
- size_t size)
-{
- struct scatterlist *sg;
- unsigned int length;
- void *zfcp_buffer;
- int retval = 0;
-
- BUG_ON(sg_list == NULL);
-
- if (zfcp_sg_size(sg_list->sg, sg_list->count) < size)
- return -EFAULT;
-
- for (sg = sg_list->sg; size > 0; sg++) {
- length = min((unsigned int)size, sg->length);
- zfcp_buffer = zfcp_sg_to_address(sg);
- if (copy_from_user(zfcp_buffer, user_buffer, length)) {
- retval = -EFAULT;
- goto out;
- }
- user_buffer += length;
- size -= length;
- }
-
- out:
- return retval;
-}
-
-
-/**
- * zfcp_sg_list_copy_to_user - copy data from scatter-gather list to user space
- * @user_buffer: pointer to buffer in user space
- * @sg_list: structure describing a scatter-gather list
- * @size: number of bytes to be copied
- * Return: 0 on success, -EFAULT if copy_to_user fails
- */
-static int
-zfcp_sg_list_copy_to_user(void __user *user_buffer,
- struct zfcp_sg_list *sg_list,
- size_t size)
-{
- struct scatterlist *sg;
- unsigned int length;
- void *zfcp_buffer;
- int retval = 0;
-
- BUG_ON(sg_list == NULL);
-
- if (zfcp_sg_size(sg_list->sg, sg_list->count) < size)
- return -EFAULT;
-
- for (sg = sg_list->sg; size > 0; sg++) {
- length = min((unsigned int) size, sg->length);
- zfcp_buffer = zfcp_sg_to_address(sg);
- if (copy_to_user(user_buffer, zfcp_buffer, length)) {
- retval = -EFAULT;
- goto out;
- }
- user_buffer += length;
- size -= length;
- }
-
- out:
- return retval;
-}
-
-
-#undef ZFCP_LOG_AREA
-
-/****************************************************************/
-/****** Functions for configuration/set-up of structures ********/
-/****************************************************************/
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_CONFIG
+module_init(zfcp_module_init);
/**
* zfcp_get_unit_by_lun - find unit in unit list of port by FCP LUN
* @port: pointer to port to search for unit
* @fcp_lun: FCP LUN to search for
- * Traverse list of all units of a port and return pointer to a unit
- * with the given FCP LUN.
+ *
+ * Returns: pointer to zfcp_unit or NULL
*/
-struct zfcp_unit *
-zfcp_get_unit_by_lun(struct zfcp_port *port, fcp_lun_t fcp_lun)
+struct zfcp_unit *zfcp_get_unit_by_lun(struct zfcp_port *port,
+ fcp_lun_t fcp_lun)
{
struct zfcp_unit *unit;
- int found = 0;
- list_for_each_entry(unit, &port->unit_list_head, list) {
+ list_for_each_entry(unit, &port->unit_list_head, list)
if ((unit->fcp_lun == fcp_lun) &&
- !atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &unit->status))
- {
- found = 1;
- break;
- }
- }
- return found ? unit : NULL;
+ !(atomic_read(&unit->status) & ZFCP_STATUS_COMMON_REMOVE))
+ return unit;
+ return NULL;
}
/**
* zfcp_get_port_by_wwpn - find port in port list of adapter by wwpn
* @adapter: pointer to adapter to search for port
* @wwpn: wwpn to search for
- * Traverse list of all ports of an adapter and return pointer to a port
- * with the given wwpn.
+ *
+ * Returns: pointer to zfcp_port or NULL
*/
-struct zfcp_port *
-zfcp_get_port_by_wwpn(struct zfcp_adapter *adapter, wwn_t wwpn)
+struct zfcp_port *zfcp_get_port_by_wwpn(struct zfcp_adapter *adapter,
+ wwn_t wwpn)
{
struct zfcp_port *port;
- int found = 0;
- list_for_each_entry(port, &adapter->port_list_head, list) {
- if ((port->wwpn == wwpn) &&
- !(atomic_read(&port->status) &
- (ZFCP_STATUS_PORT_NO_WWPN | ZFCP_STATUS_COMMON_REMOVE))) {
- found = 1;
- break;
- }
- }
- return found ? port : NULL;
+ list_for_each_entry(port, &adapter->port_list_head, list)
+ if ((port->wwpn == wwpn) && !(atomic_read(&port->status) &
+ (ZFCP_STATUS_PORT_NO_WWPN | ZFCP_STATUS_COMMON_REMOVE)))
+ return port;
+ return NULL;
}
-/**
- * zfcp_get_port_by_did - find port in port list of adapter by d_id
- * @adapter: pointer to adapter to search for port
- * @d_id: d_id to search for
- * Traverse list of all ports of an adapter and return pointer to a port
- * with the given d_id.
- */
-struct zfcp_port *
-zfcp_get_port_by_did(struct zfcp_adapter *adapter, u32 d_id)
+static void zfcp_sysfs_unit_release(struct device *dev)
{
- struct zfcp_port *port;
- int found = 0;
-
- list_for_each_entry(port, &adapter->port_list_head, list) {
- if ((port->d_id == d_id) &&
- !atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &port->status))
- {
- found = 1;
- break;
- }
- }
- return found ? port : NULL;
-}
-
-/**
- * zfcp_get_adapter_by_busid - find adpater in adapter list by bus_id
- * @bus_id: bus_id to search for
- * Traverse list of all adapters and return pointer to an adapter
- * with the given bus_id.
- */
-struct zfcp_adapter *
-zfcp_get_adapter_by_busid(char *bus_id)
-{
- struct zfcp_adapter *adapter;
- int found = 0;
-
- list_for_each_entry(adapter, &zfcp_data.adapter_list_head, list) {
- if ((strncmp(bus_id, zfcp_get_busid_by_adapter(adapter),
- BUS_ID_SIZE) == 0) &&
- !atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE,
- &adapter->status)){
- found = 1;
- break;
- }
- }
- return found ? adapter : NULL;
+ kfree(container_of(dev, struct zfcp_unit, sysfs_device));
}
/**
* zfcp_unit_enqueue - enqueue unit to unit list of a port.
* @port: pointer to port where unit is added
* @fcp_lun: FCP LUN of unit to be enqueued
- * Return: pointer to enqueued unit on success, NULL on error
+ * Returns: pointer to enqueued unit on success, ERR_PTR on error
* Locks: config_sema must be held to serialize changes to the unit list
*
* Sets up some unit internal structures and creates sysfs entry.
*/
-struct zfcp_unit *
-zfcp_unit_enqueue(struct zfcp_port *port, fcp_lun_t fcp_lun)
+struct zfcp_unit *zfcp_unit_enqueue(struct zfcp_port *port, fcp_lun_t fcp_lun)
{
struct zfcp_unit *unit;
- /*
- * check that there is no unit with this FCP_LUN already in list
- * and enqueue it.
- * Note: Unlike for the adapter and the port, this is an error
- */
- read_lock_irq(&zfcp_data.config_lock);
- unit = zfcp_get_unit_by_lun(port, fcp_lun);
- read_unlock_irq(&zfcp_data.config_lock);
- if (unit)
- return NULL;
-
- unit = kzalloc(sizeof (struct zfcp_unit), GFP_KERNEL);
+ unit = kzalloc(sizeof(struct zfcp_unit), GFP_KERNEL);
if (!unit)
- return NULL;
+ return ERR_PTR(-ENOMEM);
- /* initialise reference count stuff */
atomic_set(&unit->refcount, 0);
init_waitqueue_head(&unit->remove_wq);
unit->port = port;
unit->fcp_lun = fcp_lun;
- /* setup for sysfs registration */
snprintf(unit->sysfs_device.bus_id, BUS_ID_SIZE, "0x%016llx", fcp_lun);
unit->sysfs_device.parent = &port->sysfs_device;
unit->sysfs_device.release = zfcp_sysfs_unit_release;
@@ -847,14 +298,28 @@
/* mark unit unusable as long as sysfs registration is not complete */
atomic_set_mask(ZFCP_STATUS_COMMON_REMOVE, &unit->status);
- if (device_register(&unit->sysfs_device)) {
- kfree(unit);
- return NULL;
- }
+ spin_lock_init(&unit->latencies.lock);
+ unit->latencies.write.channel.min = 0xFFFFFFFF;
+ unit->latencies.write.fabric.min = 0xFFFFFFFF;
+ unit->latencies.read.channel.min = 0xFFFFFFFF;
+ unit->latencies.read.fabric.min = 0xFFFFFFFF;
+ unit->latencies.cmd.channel.min = 0xFFFFFFFF;
+ unit->latencies.cmd.fabric.min = 0xFFFFFFFF;
- if (zfcp_sysfs_unit_create_files(&unit->sysfs_device)) {
+ read_lock_irq(&zfcp_data.config_lock);
+ if (zfcp_get_unit_by_lun(port, fcp_lun)) {
+ read_unlock_irq(&zfcp_data.config_lock);
+ goto err_out_free;
+ }
+ read_unlock_irq(&zfcp_data.config_lock);
+
+ if (device_register(&unit->sysfs_device))
+ goto err_out_free;
+
+ if (sysfs_create_group(&unit->sysfs_device.kobj,
+ &zfcp_sysfs_unit_attrs)) {
device_unregister(&unit->sysfs_device);
- return NULL;
+ return ERR_PTR(-EIO);
}
zfcp_unit_get(unit);
@@ -864,16 +329,27 @@
list_add_tail(&unit->list, &port->unit_list_head);
atomic_clear_mask(ZFCP_STATUS_COMMON_REMOVE, &unit->status);
atomic_set_mask(ZFCP_STATUS_COMMON_RUNNING, &unit->status);
+
write_unlock_irq(&zfcp_data.config_lock);
port->units++;
zfcp_port_get(port);
return unit;
+
+err_out_free:
+ kfree(unit);
+ return ERR_PTR(-EINVAL);
}
-void
-zfcp_unit_dequeue(struct zfcp_unit *unit)
+/**
+ * zfcp_unit_dequeue - dequeue unit
+ * @unit: pointer to zfcp_unit
+ *
+ * waits until all work is done on unit and removes it then from the unit->list
+ * of the associated port.
+ */
+void zfcp_unit_dequeue(struct zfcp_unit *unit)
{
zfcp_unit_wait(unit);
write_lock_irq(&zfcp_data.config_lock);
@@ -881,68 +357,51 @@
write_unlock_irq(&zfcp_data.config_lock);
unit->port->units--;
zfcp_port_put(unit->port);
- zfcp_sysfs_unit_remove_files(&unit->sysfs_device);
+ sysfs_remove_group(&unit->sysfs_device.kobj, &zfcp_sysfs_unit_attrs);
device_unregister(&unit->sysfs_device);
}
-/*
- * Allocates a combined QTCB/fsf_req buffer for erp actions and fcp/SCSI
- * commands.
- * It also genrates fcp-nameserver request/response buffer and unsolicited
- * status read fsf_req buffers.
- *
- * locks: must only be called with zfcp_data.config_sema taken
- */
-static int
-zfcp_allocate_low_mem_buffers(struct zfcp_adapter *adapter)
+static int zfcp_allocate_low_mem_buffers(struct zfcp_adapter *adapter)
{
+ /* must only be called with zfcp_data.config_sema taken */
adapter->pool.fsf_req_erp =
- mempool_create_slab_pool(ZFCP_POOL_FSF_REQ_ERP_NR,
- zfcp_data.fsf_req_qtcb_cache);
+ mempool_create_slab_pool(1, zfcp_data.fsf_req_qtcb_cache);
if (!adapter->pool.fsf_req_erp)
return -ENOMEM;
adapter->pool.fsf_req_scsi =
- mempool_create_slab_pool(ZFCP_POOL_FSF_REQ_SCSI_NR,
- zfcp_data.fsf_req_qtcb_cache);
+ mempool_create_slab_pool(1, zfcp_data.fsf_req_qtcb_cache);
if (!adapter->pool.fsf_req_scsi)
return -ENOMEM;
adapter->pool.fsf_req_abort =
- mempool_create_slab_pool(ZFCP_POOL_FSF_REQ_ABORT_NR,
- zfcp_data.fsf_req_qtcb_cache);
+ mempool_create_slab_pool(1, zfcp_data.fsf_req_qtcb_cache);
if (!adapter->pool.fsf_req_abort)
return -ENOMEM;
adapter->pool.fsf_req_status_read =
- mempool_create_kmalloc_pool(ZFCP_POOL_STATUS_READ_NR,
+ mempool_create_kmalloc_pool(FSF_STATUS_READS_RECOM,
sizeof(struct zfcp_fsf_req));
if (!adapter->pool.fsf_req_status_read)
return -ENOMEM;
adapter->pool.data_status_read =
- mempool_create_slab_pool(ZFCP_POOL_STATUS_READ_NR,
+ mempool_create_slab_pool(FSF_STATUS_READS_RECOM,
zfcp_data.sr_buffer_cache);
if (!adapter->pool.data_status_read)
return -ENOMEM;
adapter->pool.data_gid_pn =
- mempool_create_slab_pool(ZFCP_POOL_DATA_GID_PN_NR,
- zfcp_data.gid_pn_cache);
+ mempool_create_slab_pool(1, zfcp_data.gid_pn_cache);
if (!adapter->pool.data_gid_pn)
return -ENOMEM;
return 0;
}
-/**
- * zfcp_free_low_mem_buffers - free memory pools of an adapter
- * @adapter: pointer to zfcp_adapter for which memory pools should be freed
- * locking: zfcp_data.config_sema must be held
- */
-static void
-zfcp_free_low_mem_buffers(struct zfcp_adapter *adapter)
+static void zfcp_free_low_mem_buffers(struct zfcp_adapter *adapter)
{
+ /* zfcp_data.config_sema must be held */
if (adapter->pool.fsf_req_erp)
mempool_destroy(adapter->pool.fsf_req_erp);
if (adapter->pool.fsf_req_scsi)
@@ -962,20 +421,61 @@
return;
}
-/*
+/**
+ * zfcp_status_read_refill - refill the long running status_read_requests
+ * @adapter: ptr to struct zfcp_adapter for which the buffers should be refilled
+ *
+ * Returns: 0 on success, 1 otherwise
+ *
+ * if there are 16 or more status_read requests missing an adapter_reopen
+ * is triggered
+ */
+int zfcp_status_read_refill(struct zfcp_adapter *adapter)
+{
+ while (atomic_read(&adapter->stat_miss) > 0)
+ if (zfcp_fsf_status_read(adapter)) {
+ if (atomic_read(&adapter->stat_miss) >= 16) {
+ zfcp_erp_adapter_reopen(adapter, 0, 103, NULL);
+ return 1;
+ }
+ break;
+ } else
+ atomic_dec(&adapter->stat_miss);
+ return 0;
+}
+
+static void _zfcp_status_read_scheduler(struct work_struct *work)
+{
+ zfcp_status_read_refill(container_of(work, struct zfcp_adapter,
+ stat_work));
+}
+
+static int zfcp_nameserver_enqueue(struct zfcp_adapter *adapter)
+{
+ struct zfcp_port *port;
+
+ port = zfcp_port_enqueue(adapter, 0, ZFCP_STATUS_PORT_WKA,
+ ZFCP_DID_DIRECTORY_SERVICE);
+ if (IS_ERR(port))
+ return PTR_ERR(port);
+ zfcp_port_put(port);
+
+ return 0;
+}
+
+/**
+ * zfcp_adapter_enqueue - enqueue a new adapter to the list
+ * @ccw_device: pointer to the struct cc_device
+ *
+ * Returns: 0 if a new adapter was successfully enqueued
+ * -ENOMEM if alloc failed
* Enqueues an adapter at the end of the adapter list in the driver data.
* All adapter internal structures are set up.
* Proc-fs entries are also created.
- *
- * returns: 0 if a new adapter was successfully enqueued
- * ZFCP_KNOWN if an adapter with this devno was already present
- * -ENOMEM if alloc failed
* locks: config_sema must be held to serialise changes to the adapter list
*/
-struct zfcp_adapter *
-zfcp_adapter_enqueue(struct ccw_device *ccw_device)
+int zfcp_adapter_enqueue(struct ccw_device *ccw_device)
{
- int retval = 0;
struct zfcp_adapter *adapter;
/*
@@ -983,85 +483,58 @@
* are protected by the config_sema, which must be held to get here
*/
- /* try to allocate new adapter data structure (zeroed) */
- adapter = kzalloc(sizeof (struct zfcp_adapter), GFP_KERNEL);
- if (!adapter) {
- ZFCP_LOG_INFO("error: allocation of base adapter "
- "structure failed\n");
- goto out;
- }
+ adapter = kzalloc(sizeof(struct zfcp_adapter), GFP_KERNEL);
+ if (!adapter)
+ return -ENOMEM;
ccw_device->handler = NULL;
-
- /* save ccw_device pointer */
adapter->ccw_device = ccw_device;
+ atomic_set(&adapter->refcount, 0);
- retval = zfcp_qdio_allocate_queues(adapter);
- if (retval)
- goto queues_alloc_failed;
-
- retval = zfcp_qdio_allocate(adapter);
- if (retval)
+ if (zfcp_qdio_allocate(adapter))
goto qdio_allocate_failed;
- retval = zfcp_allocate_low_mem_buffers(adapter);
- if (retval) {
- ZFCP_LOG_INFO("error: pool allocation failed\n");
+ if (zfcp_allocate_low_mem_buffers(adapter))
goto failed_low_mem_buffers;
- }
- /* initialise reference count stuff */
- atomic_set(&adapter->refcount, 0);
+ if (zfcp_reqlist_alloc(adapter))
+ goto failed_low_mem_buffers;
+
+ if (zfcp_adapter_debug_register(adapter))
+ goto debug_register_failed;
+
init_waitqueue_head(&adapter->remove_wq);
+ init_waitqueue_head(&adapter->erp_thread_wqh);
+ init_waitqueue_head(&adapter->erp_done_wqh);
- /* initialise list of ports */
INIT_LIST_HEAD(&adapter->port_list_head);
-
- /* initialise list of ports to be removed */
INIT_LIST_HEAD(&adapter->port_remove_lh);
+ INIT_LIST_HEAD(&adapter->erp_ready_head);
+ INIT_LIST_HEAD(&adapter->erp_running_head);
- /* initialize list of fsf requests */
spin_lock_init(&adapter->req_list_lock);
- retval = zfcp_reqlist_alloc(adapter);
- if (retval) {
- ZFCP_LOG_INFO("request list initialization failed\n");
- goto failed_low_mem_buffers;
- }
-
- /* initialize debug locks */
spin_lock_init(&adapter->hba_dbf_lock);
spin_lock_init(&adapter->san_dbf_lock);
spin_lock_init(&adapter->scsi_dbf_lock);
spin_lock_init(&adapter->rec_dbf_lock);
-
- retval = zfcp_adapter_debug_register(adapter);
- if (retval)
- goto debug_register_failed;
-
- /* initialize error recovery stuff */
+ spin_lock_init(&adapter->req_q.lock);
rwlock_init(&adapter->erp_lock);
- sema_init(&adapter->erp_ready_sem, 0);
- INIT_LIST_HEAD(&adapter->erp_ready_head);
- INIT_LIST_HEAD(&adapter->erp_running_head);
-
- /* initialize abort lock */
rwlock_init(&adapter->abort_lock);
- /* initialise some erp stuff */
- init_waitqueue_head(&adapter->erp_thread_wqh);
- init_waitqueue_head(&adapter->erp_done_wqh);
+ sema_init(&adapter->erp_ready_sem, 0);
- /* initialize lock of associated request queue */
- rwlock_init(&adapter->request_queue.queue_lock);
+ INIT_WORK(&adapter->stat_work, _zfcp_status_read_scheduler);
+ INIT_WORK(&adapter->scan_work, _zfcp_scan_ports_later);
/* mark adapter unusable as long as sysfs registration is not complete */
atomic_set_mask(ZFCP_STATUS_COMMON_REMOVE, &adapter->status);
dev_set_drvdata(&ccw_device->dev, adapter);
- if (zfcp_sysfs_adapter_create_files(&ccw_device->dev))
+ if (sysfs_create_group(&ccw_device->dev.kobj,
+ &zfcp_sysfs_adapter_attrs))
goto sysfs_failed;
adapter->generic_services.parent = &adapter->ccw_device->dev;
@@ -1072,7 +545,6 @@
if (device_register(&adapter->generic_services))
goto generic_services_failed;
- /* put allocated adapter at list tail */
write_lock_irq(&zfcp_data.config_lock);
atomic_clear_mask(ZFCP_STATUS_COMMON_REMOVE, &adapter->status);
list_add_tail(&adapter->list, &zfcp_data.adapter_list_head);
@@ -1080,57 +552,49 @@
zfcp_data.adapters++;
- goto out;
+ zfcp_nameserver_enqueue(adapter);
- generic_services_failed:
- zfcp_sysfs_adapter_remove_files(&adapter->ccw_device->dev);
- sysfs_failed:
+ return 0;
+
+generic_services_failed:
+ sysfs_remove_group(&ccw_device->dev.kobj,
+ &zfcp_sysfs_adapter_attrs);
+sysfs_failed:
zfcp_adapter_debug_unregister(adapter);
- debug_register_failed:
+debug_register_failed:
dev_set_drvdata(&ccw_device->dev, NULL);
- zfcp_reqlist_free(adapter);
- failed_low_mem_buffers:
+ kfree(adapter->req_list);
+failed_low_mem_buffers:
zfcp_free_low_mem_buffers(adapter);
- if (qdio_free(ccw_device) != 0)
- ZFCP_LOG_NORMAL("bug: qdio_free for adapter %s failed\n",
- zfcp_get_busid_by_adapter(adapter));
- qdio_allocate_failed:
- zfcp_qdio_free_queues(adapter);
- queues_alloc_failed:
+qdio_allocate_failed:
+ zfcp_qdio_free(adapter);
kfree(adapter);
- adapter = NULL;
- out:
- return adapter;
+ return -ENOMEM;
}
-/*
- * returns: 0 - struct zfcp_adapter data structure successfully removed
- * !0 - struct zfcp_adapter data structure could not be removed
- * (e.g. still used)
+/**
+ * zfcp_adapter_dequeue - remove the adapter from the resource list
+ * @adapter: pointer to struct zfcp_adapter which should be removed
* locks: adapter list write lock is assumed to be held by caller
*/
-void
-zfcp_adapter_dequeue(struct zfcp_adapter *adapter)
+void zfcp_adapter_dequeue(struct zfcp_adapter *adapter)
{
int retval = 0;
unsigned long flags;
+ cancel_work_sync(&adapter->scan_work);
+ cancel_work_sync(&adapter->stat_work);
zfcp_adapter_scsi_unregister(adapter);
device_unregister(&adapter->generic_services);
- zfcp_sysfs_adapter_remove_files(&adapter->ccw_device->dev);
+ sysfs_remove_group(&adapter->ccw_device->dev.kobj,
+ &zfcp_sysfs_adapter_attrs);
dev_set_drvdata(&adapter->ccw_device->dev, NULL);
/* sanity check: no pending FSF requests */
spin_lock_irqsave(&adapter->req_list_lock, flags);
retval = zfcp_reqlist_isempty(adapter);
spin_unlock_irqrestore(&adapter->req_list_lock, flags);
- if (!retval) {
- ZFCP_LOG_NORMAL("bug: adapter %s (%p) still in use, "
- "%i requests outstanding\n",
- zfcp_get_busid_by_adapter(adapter), adapter,
- atomic_read(&adapter->reqs_active));
- retval = -EBUSY;
- goto out;
- }
+ if (!retval)
+ return;
zfcp_adapter_debug_unregister(adapter);
@@ -1142,26 +606,18 @@
/* decrease number of adapters in list */
zfcp_data.adapters--;
- ZFCP_LOG_TRACE("adapter %s (%p) removed from list, "
- "%i adapters still in list\n",
- zfcp_get_busid_by_adapter(adapter),
- adapter, zfcp_data.adapters);
-
- retval = qdio_free(adapter->ccw_device);
- if (retval)
- ZFCP_LOG_NORMAL("bug: qdio_free for adapter %s failed\n",
- zfcp_get_busid_by_adapter(adapter));
+ zfcp_qdio_free(adapter);
zfcp_free_low_mem_buffers(adapter);
- /* free memory of adapter data structure and queues */
- zfcp_qdio_free_queues(adapter);
- zfcp_reqlist_free(adapter);
+ kfree(adapter->req_list);
kfree(adapter->fc_stats);
kfree(adapter->stats_reset_data);
- ZFCP_LOG_TRACE("freeing adapter structure\n");
kfree(adapter);
- out:
- return;
+}
+
+static void zfcp_sysfs_port_release(struct device *dev)
+{
+ kfree(container_of(dev, struct zfcp_port, sysfs_device));
}
/**
@@ -1170,98 +626,90 @@
* @wwpn: WWPN of the remote port to be enqueued
* @status: initial status for the port
* @d_id: destination id of the remote port to be enqueued
- * Return: pointer to enqueued port on success, NULL on error
+ * Returns: pointer to enqueued port on success, ERR_PTR on error
* Locks: config_sema must be held to serialize changes to the port list
*
* All port internal structures are set up and the sysfs entry is generated.
* d_id is used to enqueue ports with a well known address like the Directory
* Service for nameserver lookup.
*/
-struct zfcp_port *
-zfcp_port_enqueue(struct zfcp_adapter *adapter, wwn_t wwpn, u32 status,
- u32 d_id)
+struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *adapter, wwn_t wwpn,
+ u32 status, u32 d_id)
{
struct zfcp_port *port;
- int check_wwpn;
+ int retval;
+ char *bus_id;
- check_wwpn = !(status & ZFCP_STATUS_PORT_NO_WWPN);
- /*
- * check that there is no port with this WWPN already in list
- */
- if (check_wwpn) {
- read_lock_irq(&zfcp_data.config_lock);
- port = zfcp_get_port_by_wwpn(adapter, wwpn);
- read_unlock_irq(&zfcp_data.config_lock);
- if (port)
- return NULL;
- }
-
- port = kzalloc(sizeof (struct zfcp_port), GFP_KERNEL);
+ port = kzalloc(sizeof(struct zfcp_port), GFP_KERNEL);
if (!port)
- return NULL;
+ return ERR_PTR(-ENOMEM);
- /* initialise reference count stuff */
- atomic_set(&port->refcount, 0);
init_waitqueue_head(&port->remove_wq);
INIT_LIST_HEAD(&port->unit_list_head);
INIT_LIST_HEAD(&port->unit_remove_lh);
port->adapter = adapter;
+ port->d_id = d_id;
+ port->wwpn = wwpn;
- if (check_wwpn)
- port->wwpn = wwpn;
+ /* mark port unusable as long as sysfs registration is not complete */
+ atomic_set_mask(status | ZFCP_STATUS_COMMON_REMOVE, &port->status);
+ atomic_set(&port->refcount, 0);
- atomic_set_mask(status, &port->status);
-
- /* setup for sysfs registration */
if (status & ZFCP_STATUS_PORT_WKA) {
switch (d_id) {
case ZFCP_DID_DIRECTORY_SERVICE:
- snprintf(port->sysfs_device.bus_id, BUS_ID_SIZE,
- "directory");
+ bus_id = "directory";
break;
case ZFCP_DID_MANAGEMENT_SERVICE:
- snprintf(port->sysfs_device.bus_id, BUS_ID_SIZE,
- "management");
+ bus_id = "management";
break;
case ZFCP_DID_KEY_DISTRIBUTION_SERVICE:
- snprintf(port->sysfs_device.bus_id, BUS_ID_SIZE,
- "key_distribution");
+ bus_id = "key_distribution";
break;
case ZFCP_DID_ALIAS_SERVICE:
- snprintf(port->sysfs_device.bus_id, BUS_ID_SIZE,
- "alias");
+ bus_id = "alias";
break;
case ZFCP_DID_TIME_SERVICE:
- snprintf(port->sysfs_device.bus_id, BUS_ID_SIZE,
- "time");
+ bus_id = "time";
break;
default:
kfree(port);
- return NULL;
+ return ERR_PTR(-EINVAL);
}
- port->d_id = d_id;
+ snprintf(port->sysfs_device.bus_id, BUS_ID_SIZE, "%s", bus_id);
port->sysfs_device.parent = &adapter->generic_services;
} else {
snprintf(port->sysfs_device.bus_id,
BUS_ID_SIZE, "0x%016llx", wwpn);
port->sysfs_device.parent = &adapter->ccw_device->dev;
}
+
port->sysfs_device.release = zfcp_sysfs_port_release;
dev_set_drvdata(&port->sysfs_device, port);
- /* mark port unusable as long as sysfs registration is not complete */
- atomic_set_mask(ZFCP_STATUS_COMMON_REMOVE, &port->status);
+ read_lock_irq(&zfcp_data.config_lock);
+ if (!(status & ZFCP_STATUS_PORT_NO_WWPN))
+ if (zfcp_get_port_by_wwpn(adapter, wwpn)) {
+ read_unlock_irq(&zfcp_data.config_lock);
+ goto err_out_free;
+ }
+ read_unlock_irq(&zfcp_data.config_lock);
- if (device_register(&port->sysfs_device)) {
- kfree(port);
- return NULL;
- }
+ if (device_register(&port->sysfs_device))
+ goto err_out_free;
- if (zfcp_sysfs_port_create_files(&port->sysfs_device, status)) {
+ if (status & ZFCP_STATUS_PORT_WKA)
+ retval = sysfs_create_group(&port->sysfs_device.kobj,
+ &zfcp_sysfs_ns_port_attrs);
+ else
+ retval = sysfs_create_group(&port->sysfs_device.kobj,
+ &zfcp_sysfs_port_attrs);
+
+ if (retval) {
device_unregister(&port->sysfs_device);
- return NULL;
+ goto err_out;
}
zfcp_port_get(port);
@@ -1274,15 +722,23 @@
if (!adapter->nameserver_port)
adapter->nameserver_port = port;
adapter->ports++;
+
write_unlock_irq(&zfcp_data.config_lock);
zfcp_adapter_get(adapter);
-
return port;
+
+err_out_free:
+ kfree(port);
+err_out:
+ return ERR_PTR(-EINVAL);
}
-void
-zfcp_port_dequeue(struct zfcp_port *port)
+/**
+ * zfcp_port_dequeue - dequeues a port from the port list of the adapter
+ * @port: pointer to struct zfcp_port which should be removed
+ */
+void zfcp_port_dequeue(struct zfcp_port *port)
{
zfcp_port_wait(port);
write_lock_irq(&zfcp_data.config_lock);
@@ -1293,546 +749,53 @@
fc_remote_port_delete(port->rport);
port->rport = NULL;
zfcp_adapter_put(port->adapter);
- zfcp_sysfs_port_remove_files(&port->sysfs_device,
- atomic_read(&port->status));
+ if (atomic_read(&port->status) & ZFCP_STATUS_PORT_WKA)
+ sysfs_remove_group(&port->sysfs_device.kobj,
+ &zfcp_sysfs_ns_port_attrs);
+ else
+ sysfs_remove_group(&port->sysfs_device.kobj,
+ &zfcp_sysfs_port_attrs);
device_unregister(&port->sysfs_device);
}
-/* Enqueues a nameserver port */
-int
-zfcp_nameserver_enqueue(struct zfcp_adapter *adapter)
+/**
+ * zfcp_sg_free_table - free memory used by scatterlists
+ * @sg: pointer to scatterlist
+ * @count: number of scatterlist which are to be free'ed
+ * the scatterlist are expected to reference pages always
+ */
+void zfcp_sg_free_table(struct scatterlist *sg, int count)
{
- struct zfcp_port *port;
+ int i;
- port = zfcp_port_enqueue(adapter, 0, ZFCP_STATUS_PORT_WKA,
- ZFCP_DID_DIRECTORY_SERVICE);
- if (!port) {
- ZFCP_LOG_INFO("error: enqueue of nameserver port for "
- "adapter %s failed\n",
- zfcp_get_busid_by_adapter(adapter));
- return -ENXIO;
+ for (i = 0; i < count; i++, sg++)
+ if (sg)
+ free_page((unsigned long) sg_virt(sg));
+ else
+ break;
+}
+
+/**
+ * zfcp_sg_setup_table - init scatterlist and allocate, assign buffers
+ * @sg: pointer to struct scatterlist
+ * @count: number of scatterlists which should be assigned with buffers
+ * of size page
+ *
+ * Returns: 0 on success, -ENOMEM otherwise
+ */
+int zfcp_sg_setup_table(struct scatterlist *sg, int count)
+{
+ void *addr;
+ int i;
+
+ sg_init_table(sg, count);
+ for (i = 0; i < count; i++, sg++) {
+ addr = (void *) get_zeroed_page(GFP_KERNEL);
+ if (!addr) {
+ zfcp_sg_free_table(sg, i);
+ return -ENOMEM;
+ }
+ sg_set_buf(sg, addr, PAGE_SIZE);
}
- zfcp_port_put(port);
-
return 0;
}
-
-#undef ZFCP_LOG_AREA
-
-/****************************************************************/
-/******* Fibre Channel Standard related Functions **************/
-/****************************************************************/
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_FC
-
-static void zfcp_fsf_incoming_els_rscn(struct zfcp_fsf_req *fsf_req)
-{
- struct fsf_status_read_buffer *status_buffer = (void*)fsf_req->data;
- struct zfcp_adapter *adapter = fsf_req->adapter;
- struct fcp_rscn_head *fcp_rscn_head;
- struct fcp_rscn_element *fcp_rscn_element;
- struct zfcp_port *port;
- u16 i;
- u16 no_entries;
- u32 range_mask;
- unsigned long flags;
-
- fcp_rscn_head = (struct fcp_rscn_head *) status_buffer->payload;
- fcp_rscn_element = (struct fcp_rscn_element *) status_buffer->payload;
-
- /* see FC-FS */
- no_entries = (fcp_rscn_head->payload_len / 4);
-
- for (i = 1; i < no_entries; i++) {
- /* skip head and start with 1st element */
- fcp_rscn_element++;
- switch (fcp_rscn_element->addr_format) {
- case ZFCP_PORT_ADDRESS:
- range_mask = ZFCP_PORTS_RANGE_PORT;
- break;
- case ZFCP_AREA_ADDRESS:
- range_mask = ZFCP_PORTS_RANGE_AREA;
- break;
- case ZFCP_DOMAIN_ADDRESS:
- range_mask = ZFCP_PORTS_RANGE_DOMAIN;
- break;
- case ZFCP_FABRIC_ADDRESS:
- range_mask = ZFCP_PORTS_RANGE_FABRIC;
- break;
- default:
- ZFCP_LOG_INFO("incoming RSCN with unknown "
- "address format\n");
- continue;
- }
- read_lock_irqsave(&zfcp_data.config_lock, flags);
- list_for_each_entry(port, &adapter->port_list_head, list) {
- if (atomic_test_mask
- (ZFCP_STATUS_PORT_WKA, &port->status))
- continue;
- /* Do we know this port? If not skip it. */
- if (!atomic_test_mask
- (ZFCP_STATUS_PORT_DID_DID, &port->status)) {
- ZFCP_LOG_INFO("incoming RSCN, trying to open "
- "port 0x%016Lx\n", port->wwpn);
- zfcp_erp_port_reopen(port,
- ZFCP_STATUS_COMMON_ERP_FAILED,
- 82, fsf_req);
- continue;
- }
-
- /*
- * FIXME: race: d_id might being invalidated
- * (...DID_DID reset)
- */
- if ((port->d_id & range_mask)
- == (fcp_rscn_element->nport_did & range_mask)) {
- ZFCP_LOG_TRACE("reopen did 0x%08x\n",
- fcp_rscn_element->nport_did);
- /*
- * Unfortunately, an RSCN does not specify the
- * type of change a target underwent. We assume
- * that it makes sense to reopen the link.
- * FIXME: Shall we try to find out more about
- * the target and link state before closing it?
- * How to accomplish this? (nameserver?)
- * Where would such code be put in?
- * (inside or outside erp)
- */
- ZFCP_LOG_INFO("incoming RSCN, trying to open "
- "port 0x%016Lx\n", port->wwpn);
- zfcp_test_link(port);
- }
- }
- read_unlock_irqrestore(&zfcp_data.config_lock, flags);
- }
-}
-
-static void zfcp_fsf_incoming_els_plogi(struct zfcp_fsf_req *fsf_req)
-{
- struct fsf_status_read_buffer *status_buffer = (void*)fsf_req->data;
- struct zfcp_adapter *adapter = fsf_req->adapter;
- struct fsf_plogi *els_plogi;
- struct zfcp_port *port;
- unsigned long flags;
-
- els_plogi = (struct fsf_plogi *) status_buffer->payload;
- read_lock_irqsave(&zfcp_data.config_lock, flags);
- list_for_each_entry(port, &adapter->port_list_head, list) {
- if (port->wwpn == (*(wwn_t *) &els_plogi->serv_param.wwpn))
- break;
- }
- read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- if (!port || (port->wwpn != (*(wwn_t *) &els_plogi->serv_param.wwpn))) {
- ZFCP_LOG_DEBUG("ignored incoming PLOGI for nonexisting port "
- "with d_id 0x%06x on adapter %s\n",
- status_buffer->d_id,
- zfcp_get_busid_by_adapter(adapter));
- } else {
- zfcp_erp_port_forced_reopen(port, 0, 83, fsf_req);
- }
-}
-
-static void zfcp_fsf_incoming_els_logo(struct zfcp_fsf_req *fsf_req)
-{
- struct fsf_status_read_buffer *status_buffer = (void*)fsf_req->data;
- struct zfcp_adapter *adapter = fsf_req->adapter;
- struct fcp_logo *els_logo = (struct fcp_logo *) status_buffer->payload;
- struct zfcp_port *port;
- unsigned long flags;
-
- read_lock_irqsave(&zfcp_data.config_lock, flags);
- list_for_each_entry(port, &adapter->port_list_head, list) {
- if (port->wwpn == els_logo->nport_wwpn)
- break;
- }
- read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- if (!port || (port->wwpn != els_logo->nport_wwpn)) {
- ZFCP_LOG_DEBUG("ignored incoming LOGO for nonexisting port "
- "with d_id 0x%06x on adapter %s\n",
- status_buffer->d_id,
- zfcp_get_busid_by_adapter(adapter));
- } else {
- zfcp_erp_port_forced_reopen(port, 0, 84, fsf_req);
- }
-}
-
-static void
-zfcp_fsf_incoming_els_unknown(struct zfcp_adapter *adapter,
- struct fsf_status_read_buffer *status_buffer)
-{
- ZFCP_LOG_NORMAL("warning: unknown incoming ELS 0x%08x "
- "for adapter %s\n", *(u32 *) (status_buffer->payload),
- zfcp_get_busid_by_adapter(adapter));
-
-}
-
-void
-zfcp_fsf_incoming_els(struct zfcp_fsf_req *fsf_req)
-{
- struct fsf_status_read_buffer *status_buffer;
- u32 els_type;
- struct zfcp_adapter *adapter;
-
- status_buffer = (struct fsf_status_read_buffer *) fsf_req->data;
- els_type = *(u32 *) (status_buffer->payload);
- adapter = fsf_req->adapter;
-
- zfcp_san_dbf_event_incoming_els(fsf_req);
- if (els_type == LS_PLOGI)
- zfcp_fsf_incoming_els_plogi(fsf_req);
- else if (els_type == LS_LOGO)
- zfcp_fsf_incoming_els_logo(fsf_req);
- else if ((els_type & 0xffff0000) == LS_RSCN)
- /* we are only concerned with the command, not the length */
- zfcp_fsf_incoming_els_rscn(fsf_req);
- else
- zfcp_fsf_incoming_els_unknown(adapter, status_buffer);
-}
-
-
-/**
- * zfcp_gid_pn_buffers_alloc - allocate buffers for GID_PN nameserver request
- * @gid_pn: pointer to return pointer to struct zfcp_gid_pn_data
- * @pool: pointer to mempool_t if non-null memory pool is used for allocation
- */
-static int
-zfcp_gid_pn_buffers_alloc(struct zfcp_gid_pn_data **gid_pn, mempool_t *pool)
-{
- struct zfcp_gid_pn_data *data;
-
- if (pool != NULL) {
- data = mempool_alloc(pool, GFP_ATOMIC);
- if (likely(data != NULL)) {
- data->ct.pool = pool;
- }
- } else {
- data = kmem_cache_alloc(zfcp_data.gid_pn_cache, GFP_ATOMIC);
- }
-
- if (NULL == data)
- return -ENOMEM;
-
- memset(data, 0, sizeof(*data));
- sg_init_table(&data->req , 1);
- sg_init_table(&data->resp , 1);
- data->ct.req = &data->req;
- data->ct.resp = &data->resp;
- data->ct.req_count = data->ct.resp_count = 1;
- zfcp_address_to_sg(&data->ct_iu_req, &data->req, sizeof(struct ct_iu_gid_pn_req));
- zfcp_address_to_sg(&data->ct_iu_resp, &data->resp, sizeof(struct ct_iu_gid_pn_resp));
-
- *gid_pn = data;
- return 0;
-}
-
-/**
- * zfcp_gid_pn_buffers_free - free buffers for GID_PN nameserver request
- * @gid_pn: pointer to struct zfcp_gid_pn_data which has to be freed
- */
-static void zfcp_gid_pn_buffers_free(struct zfcp_gid_pn_data *gid_pn)
-{
- if (gid_pn->ct.pool)
- mempool_free(gid_pn, gid_pn->ct.pool);
- else
- kmem_cache_free(zfcp_data.gid_pn_cache, gid_pn);
-}
-
-/**
- * zfcp_ns_gid_pn_request - initiate GID_PN nameserver request
- * @erp_action: pointer to zfcp_erp_action where GID_PN request is needed
- */
-int
-zfcp_ns_gid_pn_request(struct zfcp_erp_action *erp_action)
-{
- int ret;
- struct ct_iu_gid_pn_req *ct_iu_req;
- struct zfcp_gid_pn_data *gid_pn;
- struct zfcp_adapter *adapter = erp_action->adapter;
-
- ret = zfcp_gid_pn_buffers_alloc(&gid_pn, adapter->pool.data_gid_pn);
- if (ret < 0) {
- ZFCP_LOG_INFO("error: buffer allocation for gid_pn nameserver "
- "request failed for adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- goto out;
- }
-
- /* setup nameserver request */
- ct_iu_req = zfcp_sg_to_address(gid_pn->ct.req);
- ct_iu_req->header.revision = ZFCP_CT_REVISION;
- ct_iu_req->header.gs_type = ZFCP_CT_DIRECTORY_SERVICE;
- ct_iu_req->header.gs_subtype = ZFCP_CT_NAME_SERVER;
- ct_iu_req->header.options = ZFCP_CT_SYNCHRONOUS;
- ct_iu_req->header.cmd_rsp_code = ZFCP_CT_GID_PN;
- ct_iu_req->header.max_res_size = ZFCP_CT_MAX_SIZE;
- ct_iu_req->wwpn = erp_action->port->wwpn;
-
- /* setup parameters for send generic command */
- gid_pn->ct.port = adapter->nameserver_port;
- gid_pn->ct.handler = zfcp_ns_gid_pn_handler;
- gid_pn->ct.handler_data = (unsigned long) gid_pn;
- gid_pn->ct.timeout = ZFCP_NS_GID_PN_TIMEOUT;
- gid_pn->port = erp_action->port;
-
- ret = zfcp_fsf_send_ct(&gid_pn->ct, adapter->pool.fsf_req_erp,
- erp_action);
- if (ret) {
- ZFCP_LOG_INFO("error: initiation of gid_pn nameserver request "
- "failed for adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
-
- zfcp_gid_pn_buffers_free(gid_pn);
- }
-
- out:
- return ret;
-}
-
-/**
- * zfcp_ns_gid_pn_handler - handler for GID_PN nameserver request
- * @data: unsigned long, contains pointer to struct zfcp_gid_pn_data
- */
-static void zfcp_ns_gid_pn_handler(unsigned long data)
-{
- struct zfcp_port *port;
- struct zfcp_send_ct *ct;
- struct ct_iu_gid_pn_req *ct_iu_req;
- struct ct_iu_gid_pn_resp *ct_iu_resp;
- struct zfcp_gid_pn_data *gid_pn;
-
-
- gid_pn = (struct zfcp_gid_pn_data *) data;
- port = gid_pn->port;
- ct = &gid_pn->ct;
- ct_iu_req = zfcp_sg_to_address(ct->req);
- ct_iu_resp = zfcp_sg_to_address(ct->resp);
-
- if (ct->status != 0)
- goto failed;
-
- if (zfcp_check_ct_response(&ct_iu_resp->header)) {
- /* FIXME: do we need some specific erp entry points */
- atomic_set_mask(ZFCP_STATUS_PORT_INVALID_WWPN, &port->status);
- goto failed;
- }
- /* paranoia */
- if (ct_iu_req->wwpn != port->wwpn) {
- ZFCP_LOG_NORMAL("bug: wwpn 0x%016Lx returned by nameserver "
- "lookup does not match expected wwpn 0x%016Lx "
- "for adapter %s\n", ct_iu_req->wwpn, port->wwpn,
- zfcp_get_busid_by_port(port));
- goto mismatch;
- }
-
- /* looks like a valid d_id */
- port->d_id = ct_iu_resp->d_id & ZFCP_DID_MASK;
- atomic_set_mask(ZFCP_STATUS_PORT_DID_DID, &port->status);
- ZFCP_LOG_DEBUG("adapter %s: wwpn=0x%016Lx ---> d_id=0x%06x\n",
- zfcp_get_busid_by_port(port), port->wwpn, port->d_id);
- goto out;
-
- mismatch:
- ZFCP_LOG_DEBUG("CT IUs do not match:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG, (char *) ct_iu_req,
- sizeof(struct ct_iu_gid_pn_req));
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG, (char *) ct_iu_resp,
- sizeof(struct ct_iu_gid_pn_resp));
-
- failed:
- ZFCP_LOG_NORMAL("warning: failed gid_pn nameserver request for wwpn "
- "0x%016Lx for adapter %s\n",
- port->wwpn, zfcp_get_busid_by_port(port));
- out:
- zfcp_gid_pn_buffers_free(gid_pn);
- return;
-}
-
-/* reject CT_IU reason codes acc. to FC-GS-4 */
-static const struct zfcp_rc_entry zfcp_ct_rc[] = {
- {0x01, "invalid command code"},
- {0x02, "invalid version level"},
- {0x03, "logical error"},
- {0x04, "invalid CT_IU size"},
- {0x05, "logical busy"},
- {0x07, "protocol error"},
- {0x09, "unable to perform command request"},
- {0x0b, "command not supported"},
- {0x0d, "server not available"},
- {0x0e, "session could not be established"},
- {0xff, "vendor specific error"},
- {0, NULL},
-};
-
-/* LS_RJT reason codes acc. to FC-FS */
-static const struct zfcp_rc_entry zfcp_ls_rjt_rc[] = {
- {0x01, "invalid LS_Command code"},
- {0x03, "logical error"},
- {0x05, "logical busy"},
- {0x07, "protocol error"},
- {0x09, "unable to perform command request"},
- {0x0b, "command not supported"},
- {0x0e, "command already in progress"},
- {0xff, "vendor specific error"},
- {0, NULL},
-};
-
-/* reject reason codes according to FC-PH/FC-FS */
-static const struct zfcp_rc_entry zfcp_p_rjt_rc[] = {
- {0x01, "invalid D_ID"},
- {0x02, "invalid S_ID"},
- {0x03, "Nx_Port not available, temporary"},
- {0x04, "Nx_Port not available, permament"},
- {0x05, "class not supported"},
- {0x06, "delimiter usage error"},
- {0x07, "TYPE not supported"},
- {0x08, "invalid Link_Control"},
- {0x09, "invalid R_CTL field"},
- {0x0a, "invalid F_CTL field"},
- {0x0b, "invalid OX_ID"},
- {0x0c, "invalid RX_ID"},
- {0x0d, "invalid SEQ_ID"},
- {0x0e, "invalid DF_CTL"},
- {0x0f, "invalid SEQ_CNT"},
- {0x10, "invalid parameter field"},
- {0x11, "exchange error"},
- {0x12, "protocol error"},
- {0x13, "incorrect length"},
- {0x14, "unsupported ACK"},
- {0x15, "class of service not supported by entity at FFFFFE"},
- {0x16, "login required"},
- {0x17, "excessive sequences attempted"},
- {0x18, "unable to establish exchange"},
- {0x1a, "fabric path not available"},
- {0x1b, "invalid VC_ID (class 4)"},
- {0x1c, "invalid CS_CTL field"},
- {0x1d, "insufficient resources for VC (class 4)"},
- {0x1f, "invalid class of service"},
- {0x20, "preemption request rejected"},
- {0x21, "preemption not enabled"},
- {0x22, "multicast error"},
- {0x23, "multicast error terminate"},
- {0x24, "process login required"},
- {0xff, "vendor specific reject"},
- {0, NULL},
-};
-
-/**
- * zfcp_rc_description - return description for given reaon code
- * @code: reason code
- * @rc_table: table of reason codes and descriptions
- */
-static const char *
-zfcp_rc_description(u8 code, const struct zfcp_rc_entry *rc_table)
-{
- const char *descr = "unknown reason code";
-
- do {
- if (code == rc_table->code) {
- descr = rc_table->description;
- break;
- }
- rc_table++;
- } while (rc_table->code && rc_table->description);
-
- return descr;
-}
-
-/**
- * zfcp_check_ct_response - evaluate reason code for CT_IU
- * @rjt: response payload to an CT_IU request
- * Return: 0 for accept CT_IU, 1 for reject CT_IU or invlid response code
- */
-int
-zfcp_check_ct_response(struct ct_hdr *rjt)
-{
- if (rjt->cmd_rsp_code == ZFCP_CT_ACCEPT)
- return 0;
-
- if (rjt->cmd_rsp_code != ZFCP_CT_REJECT) {
- ZFCP_LOG_NORMAL("error: invalid Generic Service command/"
- "response code (0x%04hx)\n",
- rjt->cmd_rsp_code);
- return 1;
- }
-
- ZFCP_LOG_INFO("Generic Service command rejected\n");
- ZFCP_LOG_INFO("%s (0x%02x, 0x%02x, 0x%02x)\n",
- zfcp_rc_description(rjt->reason_code, zfcp_ct_rc),
- (u32) rjt->reason_code, (u32) rjt->reason_code_expl,
- (u32) rjt->vendor_unique);
-
- return 1;
-}
-
-/**
- * zfcp_print_els_rjt - print reject parameter and description for ELS reject
- * @rjt_par: reject parameter acc. to FC-PH/FC-FS
- * @rc_table: table of reason codes and descriptions
- */
-static void
-zfcp_print_els_rjt(struct zfcp_ls_rjt_par *rjt_par,
- const struct zfcp_rc_entry *rc_table)
-{
- ZFCP_LOG_INFO("%s (%02x %02x %02x %02x)\n",
- zfcp_rc_description(rjt_par->reason_code, rc_table),
- (u32) rjt_par->action, (u32) rjt_par->reason_code,
- (u32) rjt_par->reason_expl, (u32) rjt_par->vendor_unique);
-}
-
-/**
- * zfcp_fsf_handle_els_rjt - evaluate status qualifier/reason code on ELS reject
- * @sq: status qualifier word
- * @rjt_par: reject parameter as described in FC-PH and FC-FS
- * Return: -EROMTEIO for LS_RJT, -EREMCHG for invalid D_ID, -EIO else
- */
-int
-zfcp_handle_els_rjt(u32 sq, struct zfcp_ls_rjt_par *rjt_par)
-{
- int ret = -EIO;
-
- if (sq == FSF_IOSTAT_NPORT_RJT) {
- ZFCP_LOG_INFO("ELS rejected (P_RJT)\n");
- zfcp_print_els_rjt(rjt_par, zfcp_p_rjt_rc);
- /* invalid d_id */
- if (rjt_par->reason_code == 0x01)
- ret = -EREMCHG;
- } else if (sq == FSF_IOSTAT_FABRIC_RJT) {
- ZFCP_LOG_INFO("ELS rejected (F_RJT)\n");
- zfcp_print_els_rjt(rjt_par, zfcp_p_rjt_rc);
- /* invalid d_id */
- if (rjt_par->reason_code == 0x01)
- ret = -EREMCHG;
- } else if (sq == FSF_IOSTAT_LS_RJT) {
- ZFCP_LOG_INFO("ELS rejected (LS_RJT)\n");
- zfcp_print_els_rjt(rjt_par, zfcp_ls_rjt_rc);
- ret = -EREMOTEIO;
- } else
- ZFCP_LOG_INFO("unexpected SQ: 0x%02x\n", sq);
-
- return ret;
-}
-
-/**
- * zfcp_plogi_evaluate - evaluate PLOGI playload and copy important fields
- * into zfcp_port structure
- * @port: zfcp_port structure
- * @plogi: plogi payload
- */
-void
-zfcp_plogi_evaluate(struct zfcp_port *port, struct fsf_plogi *plogi)
-{
- port->maxframe_size = plogi->serv_param.common_serv_param[7] |
- ((plogi->serv_param.common_serv_param[6] & 0x0F) << 8);
- if (plogi->serv_param.class1_serv_param[0] & 0x80)
- port->supported_classes |= FC_COS_CLASS1;
- if (plogi->serv_param.class2_serv_param[0] & 0x80)
- port->supported_classes |= FC_COS_CLASS2;
- if (plogi->serv_param.class3_serv_param[0] & 0x80)
- port->supported_classes |= FC_COS_CLASS3;
- if (plogi->serv_param.class4_serv_param[0] & 0x80)
- port->supported_classes |= FC_COS_CLASS4;
-}
-
-#undef ZFCP_LOG_AREA
diff --git a/drivers/s390/scsi/zfcp_ccw.c b/drivers/s390/scsi/zfcp_ccw.c
index 66d3b88..391dd29 100644
--- a/drivers/s390/scsi/zfcp_ccw.c
+++ b/drivers/s390/scsi/zfcp_ccw.c
@@ -1,64 +1,13 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Registration and callback for the s390 common I/O layer.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
#include "zfcp_ext.h"
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_CONFIG
-
-static int zfcp_ccw_probe(struct ccw_device *);
-static void zfcp_ccw_remove(struct ccw_device *);
-static int zfcp_ccw_set_online(struct ccw_device *);
-static int zfcp_ccw_set_offline(struct ccw_device *);
-static int zfcp_ccw_notify(struct ccw_device *, int);
-static void zfcp_ccw_shutdown(struct ccw_device *);
-
-static struct ccw_device_id zfcp_ccw_device_id[] = {
- {CCW_DEVICE_DEVTYPE(ZFCP_CONTROL_UNIT_TYPE,
- ZFCP_CONTROL_UNIT_MODEL,
- ZFCP_DEVICE_TYPE,
- ZFCP_DEVICE_MODEL)},
- {CCW_DEVICE_DEVTYPE(ZFCP_CONTROL_UNIT_TYPE,
- ZFCP_CONTROL_UNIT_MODEL,
- ZFCP_DEVICE_TYPE,
- ZFCP_DEVICE_MODEL_PRIV)},
- {},
-};
-
-static struct ccw_driver zfcp_ccw_driver = {
- .owner = THIS_MODULE,
- .name = ZFCP_NAME,
- .ids = zfcp_ccw_device_id,
- .probe = zfcp_ccw_probe,
- .remove = zfcp_ccw_remove,
- .set_online = zfcp_ccw_set_online,
- .set_offline = zfcp_ccw_set_offline,
- .notify = zfcp_ccw_notify,
- .shutdown = zfcp_ccw_shutdown,
- .driver = {
- .groups = zfcp_driver_attr_groups,
- },
-};
-
-MODULE_DEVICE_TABLE(ccw, zfcp_ccw_device_id);
-
/**
* zfcp_ccw_probe - probe function of zfcp driver
* @ccw_device: pointer to belonging ccw device
@@ -69,19 +18,16 @@
* In addition the nameserver port will be added to the ports of the adapter
* and its sysfs representation will be created too.
*/
-static int
-zfcp_ccw_probe(struct ccw_device *ccw_device)
+static int zfcp_ccw_probe(struct ccw_device *ccw_device)
{
- struct zfcp_adapter *adapter;
int retval = 0;
down(&zfcp_data.config_sema);
- adapter = zfcp_adapter_enqueue(ccw_device);
- if (!adapter)
+ if (zfcp_adapter_enqueue(ccw_device)) {
+ dev_err(&ccw_device->dev,
+ "Setup of data structures failed.\n");
retval = -EINVAL;
- else
- ZFCP_LOG_DEBUG("Probed adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
+ }
up(&zfcp_data.config_sema);
return retval;
}
@@ -95,8 +41,7 @@
* ports that belong to this adapter. And in addition all resources of this
* adapter will be freed too.
*/
-static void
-zfcp_ccw_remove(struct ccw_device *ccw_device)
+static void zfcp_ccw_remove(struct ccw_device *ccw_device)
{
struct zfcp_adapter *adapter;
struct zfcp_port *port, *p;
@@ -106,8 +51,6 @@
down(&zfcp_data.config_sema);
adapter = dev_get_drvdata(&ccw_device->dev);
- ZFCP_LOG_DEBUG("Removing adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
write_lock_irq(&zfcp_data.config_lock);
list_for_each_entry_safe(port, p, &adapter->port_list_head, list) {
list_for_each_entry_safe(unit, u, &port->unit_list_head, list) {
@@ -145,8 +88,7 @@
* registered with the SCSI stack, that the QDIO queues will be set up
* and that the adapter will be opened (asynchronously).
*/
-static int
-zfcp_ccw_set_online(struct ccw_device *ccw_device)
+static int zfcp_ccw_set_online(struct ccw_device *ccw_device)
{
struct zfcp_adapter *adapter;
int retval;
@@ -155,12 +97,8 @@
adapter = dev_get_drvdata(&ccw_device->dev);
retval = zfcp_erp_thread_setup(adapter);
- if (retval) {
- ZFCP_LOG_INFO("error: start of error recovery thread for "
- "adapter %s failed\n",
- zfcp_get_busid_by_adapter(adapter));
+ if (retval)
goto out;
- }
retval = zfcp_adapter_scsi_register(adapter);
if (retval)
@@ -191,8 +129,7 @@
* This function gets called by the common i/o layer and sets an adapter
* into state offline.
*/
-static int
-zfcp_ccw_set_offline(struct ccw_device *ccw_device)
+static int zfcp_ccw_set_offline(struct ccw_device *ccw_device)
{
struct zfcp_adapter *adapter;
@@ -206,15 +143,14 @@
}
/**
- * zfcp_ccw_notify
+ * zfcp_ccw_notify - ccw notify function
* @ccw_device: pointer to belonging ccw device
* @event: indicates if adapter was detached or attached
*
* This function gets called by the common i/o layer if an adapter has gone
* or reappeared.
*/
-static int
-zfcp_ccw_notify(struct ccw_device *ccw_device, int event)
+static int zfcp_ccw_notify(struct ccw_device *ccw_device, int event)
{
struct zfcp_adapter *adapter;
@@ -222,18 +158,15 @@
adapter = dev_get_drvdata(&ccw_device->dev);
switch (event) {
case CIO_GONE:
- ZFCP_LOG_NORMAL("adapter %s: device gone\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&adapter->ccw_device->dev, "device gone\n");
zfcp_erp_adapter_shutdown(adapter, 0, 87, NULL);
break;
case CIO_NO_PATH:
- ZFCP_LOG_NORMAL("adapter %s: no path\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&adapter->ccw_device->dev, "no path\n");
zfcp_erp_adapter_shutdown(adapter, 0, 88, NULL);
break;
case CIO_OPER:
- ZFCP_LOG_NORMAL("adapter %s: operational again\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_info(&adapter->ccw_device->dev, "operational again\n");
zfcp_erp_modify_adapter_status(adapter, 11, NULL,
ZFCP_STATUS_COMMON_RUNNING,
ZFCP_SET);
@@ -247,24 +180,10 @@
}
/**
- * zfcp_ccw_register - ccw register function
- *
- * Registers the driver at the common i/o layer. This function will be called
- * at module load time/system start.
+ * zfcp_ccw_shutdown - handle shutdown from cio
+ * @cdev: device for adapter to shutdown.
*/
-int __init
-zfcp_ccw_register(void)
-{
- return ccw_driver_register(&zfcp_ccw_driver);
-}
-
-/**
- * zfcp_ccw_shutdown - gets called on reboot/shutdown
- *
- * Makes sure that QDIO queues are down when the system gets stopped.
- */
-static void
-zfcp_ccw_shutdown(struct ccw_device *cdev)
+static void zfcp_ccw_shutdown(struct ccw_device *cdev)
{
struct zfcp_adapter *adapter;
@@ -275,4 +194,33 @@
up(&zfcp_data.config_sema);
}
-#undef ZFCP_LOG_AREA
+static struct ccw_device_id zfcp_ccw_device_id[] = {
+ { CCW_DEVICE_DEVTYPE(0x1731, 0x3, 0x1732, 0x3) },
+ { CCW_DEVICE_DEVTYPE(0x1731, 0x3, 0x1732, 0x4) }, /* priv. */
+ {},
+};
+
+MODULE_DEVICE_TABLE(ccw, zfcp_ccw_device_id);
+
+static struct ccw_driver zfcp_ccw_driver = {
+ .owner = THIS_MODULE,
+ .name = "zfcp",
+ .ids = zfcp_ccw_device_id,
+ .probe = zfcp_ccw_probe,
+ .remove = zfcp_ccw_remove,
+ .set_online = zfcp_ccw_set_online,
+ .set_offline = zfcp_ccw_set_offline,
+ .notify = zfcp_ccw_notify,
+ .shutdown = zfcp_ccw_shutdown,
+};
+
+/**
+ * zfcp_ccw_register - ccw register function
+ *
+ * Registers the driver at the common i/o layer. This function will be called
+ * at module load time/system start.
+ */
+int __init zfcp_ccw_register(void)
+{
+ return ccw_driver_register(&zfcp_ccw_driver);
+}
diff --git a/drivers/s390/scsi/zfcp_cfdc.c b/drivers/s390/scsi/zfcp_cfdc.c
new file mode 100644
index 0000000..ec2abce
--- /dev/null
+++ b/drivers/s390/scsi/zfcp_cfdc.c
@@ -0,0 +1,259 @@
+/*
+ * zfcp device driver
+ *
+ * Userspace interface for accessing the
+ * Access Control Lists / Control File Data Channel
+ *
+ * Copyright IBM Corporation 2008
+ */
+
+#include <linux/types.h>
+#include <linux/miscdevice.h>
+#include <asm/ccwdev.h>
+#include "zfcp_def.h"
+#include "zfcp_ext.h"
+#include "zfcp_fsf.h"
+
+#define ZFCP_CFDC_CMND_DOWNLOAD_NORMAL 0x00010001
+#define ZFCP_CFDC_CMND_DOWNLOAD_FORCE 0x00010101
+#define ZFCP_CFDC_CMND_FULL_ACCESS 0x00000201
+#define ZFCP_CFDC_CMND_RESTRICTED_ACCESS 0x00000401
+#define ZFCP_CFDC_CMND_UPLOAD 0x00010002
+
+#define ZFCP_CFDC_DOWNLOAD 0x00000001
+#define ZFCP_CFDC_UPLOAD 0x00000002
+#define ZFCP_CFDC_WITH_CONTROL_FILE 0x00010000
+
+#define ZFCP_CFDC_IOC_MAGIC 0xDD
+#define ZFCP_CFDC_IOC \
+ _IOWR(ZFCP_CFDC_IOC_MAGIC, 0, struct zfcp_cfdc_data)
+
+/**
+ * struct zfcp_cfdc_data - data for ioctl cfdc interface
+ * @signature: request signature
+ * @devno: FCP adapter device number
+ * @command: command code
+ * @fsf_status: returns status of FSF command to userspace
+ * @fsf_status_qual: returned to userspace
+ * @payloads: access conflicts list
+ * @control_file: access control table
+ */
+struct zfcp_cfdc_data {
+ u32 signature;
+ u32 devno;
+ u32 command;
+ u32 fsf_status;
+ u8 fsf_status_qual[FSF_STATUS_QUALIFIER_SIZE];
+ u8 payloads[256];
+ u8 control_file[0];
+};
+
+static int zfcp_cfdc_copy_from_user(struct scatterlist *sg,
+ void __user *user_buffer)
+{
+ unsigned int length;
+ unsigned int size = ZFCP_CFDC_MAX_SIZE;
+
+ while (size) {
+ length = min((unsigned int)size, sg->length);
+ if (copy_from_user(sg_virt(sg++), user_buffer, length))
+ return -EFAULT;
+ user_buffer += length;
+ size -= length;
+ }
+ return 0;
+}
+
+static int zfcp_cfdc_copy_to_user(void __user *user_buffer,
+ struct scatterlist *sg)
+{
+ unsigned int length;
+ unsigned int size = ZFCP_CFDC_MAX_SIZE;
+
+ while (size) {
+ length = min((unsigned int) size, sg->length);
+ if (copy_to_user(user_buffer, sg_virt(sg++), length))
+ return -EFAULT;
+ user_buffer += length;
+ size -= length;
+ }
+ return 0;
+}
+
+static struct zfcp_adapter *zfcp_cfdc_get_adapter(u32 devno)
+{
+ struct zfcp_adapter *adapter = NULL, *cur_adapter;
+ struct ccw_dev_id dev_id;
+
+ read_lock_irq(&zfcp_data.config_lock);
+ list_for_each_entry(cur_adapter, &zfcp_data.adapter_list_head, list) {
+ ccw_device_get_id(cur_adapter->ccw_device, &dev_id);
+ if (dev_id.devno == devno) {
+ adapter = cur_adapter;
+ zfcp_adapter_get(adapter);
+ break;
+ }
+ }
+ read_unlock_irq(&zfcp_data.config_lock);
+ return adapter;
+}
+
+static int zfcp_cfdc_set_fsf(struct zfcp_fsf_cfdc *fsf_cfdc, int command)
+{
+ switch (command) {
+ case ZFCP_CFDC_CMND_DOWNLOAD_NORMAL:
+ fsf_cfdc->command = FSF_QTCB_DOWNLOAD_CONTROL_FILE;
+ fsf_cfdc->option = FSF_CFDC_OPTION_NORMAL_MODE;
+ break;
+ case ZFCP_CFDC_CMND_DOWNLOAD_FORCE:
+ fsf_cfdc->command = FSF_QTCB_DOWNLOAD_CONTROL_FILE;
+ fsf_cfdc->option = FSF_CFDC_OPTION_FORCE;
+ break;
+ case ZFCP_CFDC_CMND_FULL_ACCESS:
+ fsf_cfdc->command = FSF_QTCB_DOWNLOAD_CONTROL_FILE;
+ fsf_cfdc->option = FSF_CFDC_OPTION_FULL_ACCESS;
+ break;
+ case ZFCP_CFDC_CMND_RESTRICTED_ACCESS:
+ fsf_cfdc->command = FSF_QTCB_DOWNLOAD_CONTROL_FILE;
+ fsf_cfdc->option = FSF_CFDC_OPTION_RESTRICTED_ACCESS;
+ break;
+ case ZFCP_CFDC_CMND_UPLOAD:
+ fsf_cfdc->command = FSF_QTCB_UPLOAD_CONTROL_FILE;
+ fsf_cfdc->option = 0;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int zfcp_cfdc_sg_setup(int command, struct scatterlist *sg,
+ u8 __user *control_file)
+{
+ int retval;
+ retval = zfcp_sg_setup_table(sg, ZFCP_CFDC_PAGES);
+ if (retval)
+ return retval;
+
+ sg[ZFCP_CFDC_PAGES - 1].length = ZFCP_CFDC_MAX_SIZE % PAGE_SIZE;
+
+ if (command & ZFCP_CFDC_WITH_CONTROL_FILE &&
+ command & ZFCP_CFDC_DOWNLOAD) {
+ retval = zfcp_cfdc_copy_from_user(sg, control_file);
+ if (retval) {
+ zfcp_sg_free_table(sg, ZFCP_CFDC_PAGES);
+ return -EFAULT;
+ }
+ }
+
+ return 0;
+}
+
+static void zfcp_cfdc_req_to_sense(struct zfcp_cfdc_data *data,
+ struct zfcp_fsf_req *req)
+{
+ data->fsf_status = req->qtcb->header.fsf_status;
+ memcpy(&data->fsf_status_qual, &req->qtcb->header.fsf_status_qual,
+ sizeof(union fsf_status_qual));
+ memcpy(&data->payloads, &req->qtcb->bottom.support.els,
+ sizeof(req->qtcb->bottom.support.els));
+}
+
+static long zfcp_cfdc_dev_ioctl(struct file *file, unsigned int command,
+ unsigned long buffer)
+{
+ struct zfcp_cfdc_data *data;
+ struct zfcp_cfdc_data __user *data_user;
+ struct zfcp_adapter *adapter;
+ struct zfcp_fsf_req *req;
+ struct zfcp_fsf_cfdc *fsf_cfdc;
+ int retval;
+
+ if (command != ZFCP_CFDC_IOC)
+ return -ENOTTY;
+
+ data_user = (void __user *) buffer;
+ if (!data_user)
+ return -EINVAL;
+
+ fsf_cfdc = kmalloc(sizeof(struct zfcp_fsf_cfdc), GFP_KERNEL);
+ if (!fsf_cfdc)
+ return -ENOMEM;
+
+ data = kmalloc(sizeof(struct zfcp_cfdc_data), GFP_KERNEL);
+ if (!data) {
+ retval = -ENOMEM;
+ goto no_mem_sense;
+ }
+
+ retval = copy_from_user(data, data_user, sizeof(*data));
+ if (retval) {
+ retval = -EFAULT;
+ goto free_buffer;
+ }
+
+ if (data->signature != 0xCFDCACDF) {
+ retval = -EINVAL;
+ goto free_buffer;
+ }
+
+ retval = zfcp_cfdc_set_fsf(fsf_cfdc, data->command);
+
+ adapter = zfcp_cfdc_get_adapter(data->devno);
+ if (!adapter) {
+ retval = -ENXIO;
+ goto free_buffer;
+ }
+
+ retval = zfcp_cfdc_sg_setup(data->command, fsf_cfdc->sg,
+ data_user->control_file);
+ if (retval)
+ goto adapter_put;
+ req = zfcp_fsf_control_file(adapter, fsf_cfdc);
+ if (IS_ERR(req)) {
+ retval = PTR_ERR(req);
+ goto free_sg;
+ }
+
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR) {
+ retval = -ENXIO;
+ goto free_fsf;
+ }
+
+ zfcp_cfdc_req_to_sense(data, req);
+ retval = copy_to_user(data_user, data, sizeof(*data_user));
+ if (retval) {
+ retval = -EFAULT;
+ goto free_fsf;
+ }
+
+ if (data->command & ZFCP_CFDC_UPLOAD)
+ retval = zfcp_cfdc_copy_to_user(&data_user->control_file,
+ fsf_cfdc->sg);
+
+ free_fsf:
+ zfcp_fsf_req_free(req);
+ free_sg:
+ zfcp_sg_free_table(fsf_cfdc->sg, ZFCP_CFDC_PAGES);
+ adapter_put:
+ zfcp_adapter_put(adapter);
+ free_buffer:
+ kfree(data);
+ no_mem_sense:
+ kfree(fsf_cfdc);
+ return retval;
+}
+
+static const struct file_operations zfcp_cfdc_fops = {
+ .unlocked_ioctl = zfcp_cfdc_dev_ioctl,
+#ifdef CONFIG_COMPAT
+ .compat_ioctl = zfcp_cfdc_dev_ioctl
+#endif
+};
+
+struct miscdevice zfcp_cfdc_misc = {
+ .minor = MISC_DYNAMIC_MINOR,
+ .name = "zfcp_cfdc",
+ .fops = &zfcp_cfdc_fops,
+};
diff --git a/drivers/s390/scsi/zfcp_dbf.c b/drivers/s390/scsi/zfcp_dbf.c
index c8bad67..36169c6 100644
--- a/drivers/s390/scsi/zfcp_dbf.c
+++ b/drivers/s390/scsi/zfcp_dbf.c
@@ -1,22 +1,9 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Debug traces for zfcp.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
#include <linux/ctype.h>
@@ -29,8 +16,6 @@
MODULE_PARM_DESC(dbfsize,
"number of pages for each debug feature area (default 4)");
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_OTHER
-
static void zfcp_dbf_hexdump(debug_info_t *dbf, void *to, int to_len,
int level, char *from, int from_len)
{
@@ -186,8 +171,8 @@
fsf_status_qual, FSF_STATUS_QUALIFIER_SIZE);
response->fsf_req_status = fsf_req->status;
response->sbal_first = fsf_req->sbal_first;
- response->sbal_curr = fsf_req->sbal_curr;
response->sbal_last = fsf_req->sbal_last;
+ response->sbal_response = fsf_req->sbal_response;
response->pool = fsf_req->pool != NULL;
response->erp_action = (unsigned long)fsf_req->erp_action;
@@ -268,7 +253,7 @@
strncpy(rec->tag, "stat", ZFCP_DBF_TAG_SIZE);
strncpy(rec->tag2, tag, ZFCP_DBF_TAG_SIZE);
- rec->u.status.failed = adapter->status_read_failed;
+ rec->u.status.failed = atomic_read(&adapter->stat_miss);
if (status_buffer != NULL) {
rec->u.status.status_type = status_buffer->status_type;
rec->u.status.status_subtype = status_buffer->status_subtype;
@@ -355,8 +340,8 @@
FSF_STATUS_QUALIFIER_SIZE, 0, FSF_STATUS_QUALIFIER_SIZE);
zfcp_dbf_out(p, "fsf_req_status", "0x%08x", r->fsf_req_status);
zfcp_dbf_out(p, "sbal_first", "0x%02x", r->sbal_first);
- zfcp_dbf_out(p, "sbal_curr", "0x%02x", r->sbal_curr);
zfcp_dbf_out(p, "sbal_last", "0x%02x", r->sbal_last);
+ zfcp_dbf_out(p, "sbal_response", "0x%02x", r->sbal_response);
zfcp_dbf_out(p, "pool", "0x%02x", r->pool);
switch (r->fsf_command) {
@@ -515,13 +500,13 @@
[52] = "port boxed close unit",
[53] = "port boxed fcp",
[54] = "unit boxed fcp",
- [55] = "port access denied ct",
- [56] = "port access denied els",
- [57] = "port access denied open port",
- [58] = "port access denied close physical",
- [59] = "unit access denied open unit",
+ [55] = "port access denied",
+ [56] = "",
+ [57] = "",
+ [58] = "",
+ [59] = "unit access denied",
[60] = "shared unit access denied open unit",
- [61] = "unit access denied fcp",
+ [61] = "",
[62] = "request timeout",
[63] = "adisc link test reject or timeout",
[64] = "adisc link test d_id changed",
@@ -546,8 +531,8 @@
[80] = "exclusive read-only unit access unsupported",
[81] = "shared read-write unit access unsupported",
[82] = "incoming rscn",
- [83] = "incoming plogi",
- [84] = "incoming logo",
+ [83] = "incoming wwpn",
+ [84] = "",
[85] = "online",
[86] = "offline",
[87] = "ccw device gone",
@@ -586,8 +571,8 @@
[120] = "unknown fsf command",
[121] = "no recommendation for status qualifier",
[122] = "status read physical port closed in error",
- [123] = "fc service class not supported ct",
- [124] = "fc service class not supported els",
+ [123] = "fc service class not supported",
+ [124] = "",
[125] = "need newer zfcp",
[126] = "need newer microcode",
[127] = "arbitrated loop not supported",
@@ -595,7 +580,7 @@
[129] = "qtcb size mismatch",
[130] = "unknown fsf status ecd",
[131] = "fcp request too big",
- [132] = "fc service class not supported fcp",
+ [132] = "",
[133] = "data direction not valid fcp",
[134] = "command length not valid fcp",
[135] = "status read act update",
@@ -603,13 +588,18 @@
[137] = "hbaapi port open",
[138] = "hbaapi unit open",
[139] = "hbaapi unit shutdown",
- [140] = "qdio error",
+ [140] = "qdio error outbound",
[141] = "scsi host reset",
[142] = "dismissing fsf request for recovery action",
[143] = "recovery action timed out",
[144] = "recovery action gone",
[145] = "recovery action being processed",
[146] = "recovery action ready for next step",
+ [147] = "qdio error inbound",
+ [148] = "nameserver needed for port scan",
+ [149] = "port scan",
+ [150] = "ptp attach",
+ [151] = "port validation failed",
};
static int zfcp_rec_dbf_view_format(debug_info_t *id, struct debug_view *view,
@@ -670,24 +660,20 @@
* zfcp_rec_dbf_event_thread - trace event related to recovery thread operation
* @id2: identifier for event
* @adapter: adapter
- * @lock: non-zero value indicates that erp_lock has not yet been acquired
+ * This function assumes that the caller is holding erp_lock.
*/
-void zfcp_rec_dbf_event_thread(u8 id2, struct zfcp_adapter *adapter, int lock)
+void zfcp_rec_dbf_event_thread(u8 id2, struct zfcp_adapter *adapter)
{
struct zfcp_rec_dbf_record *r = &adapter->rec_dbf_buf;
unsigned long flags = 0;
struct list_head *entry;
unsigned ready = 0, running = 0, total;
- if (lock)
- read_lock_irqsave(&adapter->erp_lock, flags);
list_for_each(entry, &adapter->erp_ready_head)
ready++;
list_for_each(entry, &adapter->erp_running_head)
running++;
total = adapter->erp_total_count;
- if (lock)
- read_unlock_irqrestore(&adapter->erp_lock, flags);
spin_lock_irqsave(&adapter->rec_dbf_lock, flags);
memset(r, 0, sizeof(*r));
@@ -696,10 +682,25 @@
r->u.thread.total = total;
r->u.thread.ready = ready;
r->u.thread.running = running;
- debug_event(adapter->rec_dbf, 5, r, sizeof(*r));
+ debug_event(adapter->rec_dbf, 6, r, sizeof(*r));
spin_unlock_irqrestore(&adapter->rec_dbf_lock, flags);
}
+/**
+ * zfcp_rec_dbf_event_thread - trace event related to recovery thread operation
+ * @id2: identifier for event
+ * @adapter: adapter
+ * This function assumes that the caller does not hold erp_lock.
+ */
+void zfcp_rec_dbf_event_thread_lock(u8 id2, struct zfcp_adapter *adapter)
+{
+ unsigned long flags;
+
+ read_lock_irqsave(&adapter->erp_lock, flags);
+ zfcp_rec_dbf_event_thread(id2, adapter);
+ read_unlock_irqrestore(&adapter->erp_lock, flags);
+}
+
static void zfcp_rec_dbf_event_target(u8 id2, void *ref,
struct zfcp_adapter *adapter,
atomic_t *status, atomic_t *erp_count,
@@ -823,7 +824,7 @@
r->u.action.status = erp_action->status;
r->u.action.step = erp_action->step;
r->u.action.fsf_req = (unsigned long)erp_action->fsf_req;
- debug_event(adapter->rec_dbf, 4, r, sizeof(*r));
+ debug_event(adapter->rec_dbf, 5, r, sizeof(*r));
spin_unlock_irqrestore(&adapter->rec_dbf_lock, flags);
}
@@ -960,7 +961,7 @@
zfcp_san_dbf_event_els("iels", 1, fsf_req, buf->d_id,
fc_host_port_id(adapter->scsi_host),
- *(u8 *)buf->payload, (void *)buf->payload,
+ buf->payload.data[0], (void *)buf->payload.data,
length);
}
@@ -1064,8 +1065,7 @@
if (fsf_req != NULL) {
fcp_rsp = (struct fcp_rsp_iu *)
&(fsf_req->qtcb->bottom.io.fcp_rsp);
- fcp_rsp_info =
- zfcp_get_fcp_rsp_info_ptr(fcp_rsp);
+ fcp_rsp_info = (unsigned char *) &fcp_rsp[1];
fcp_sns_info =
zfcp_get_fcp_sns_info_ptr(fcp_rsp);
@@ -1279,5 +1279,3 @@
adapter->hba_dbf = NULL;
adapter->rec_dbf = NULL;
}
-
-#undef ZFCP_LOG_AREA
diff --git a/drivers/s390/scsi/zfcp_dbf.h b/drivers/s390/scsi/zfcp_dbf.h
index 54c34e4..d04aea6 100644
--- a/drivers/s390/scsi/zfcp_dbf.h
+++ b/drivers/s390/scsi/zfcp_dbf.h
@@ -38,7 +38,7 @@
u32 total;
u32 ready;
u32 running;
-} __attribute__ ((packed));
+};
struct zfcp_rec_dbf_record_target {
u64 ref;
@@ -47,7 +47,7 @@
u64 wwpn;
u64 fcp_lun;
u32 erp_count;
-} __attribute__ ((packed));
+};
struct zfcp_rec_dbf_record_trigger {
u8 want;
@@ -59,14 +59,14 @@
u64 action;
u64 wwpn;
u64 fcp_lun;
-} __attribute__ ((packed));
+};
struct zfcp_rec_dbf_record_action {
u32 status;
u32 step;
u64 action;
u64 fsf_req;
-} __attribute__ ((packed));
+};
struct zfcp_rec_dbf_record {
u8 id;
@@ -77,7 +77,7 @@
struct zfcp_rec_dbf_record_target target;
struct zfcp_rec_dbf_record_trigger trigger;
} u;
-} __attribute__ ((packed));
+};
enum {
ZFCP_REC_DBF_ID_ACTION,
@@ -97,8 +97,8 @@
u8 fsf_status_qual[FSF_STATUS_QUALIFIER_SIZE];
u32 fsf_req_status;
u8 sbal_first;
- u8 sbal_curr;
u8 sbal_last;
+ u8 sbal_response;
u8 pool;
u64 erp_action;
union {
diff --git a/drivers/s390/scsi/zfcp_def.h b/drivers/s390/scsi/zfcp_def.h
index bda8c77..67f45fc 100644
--- a/drivers/s390/scsi/zfcp_def.h
+++ b/drivers/s390/scsi/zfcp_def.h
@@ -1,22 +1,9 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Global definitions for the zfcp device driver.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
#ifndef ZFCP_DEF_H
@@ -26,7 +13,6 @@
#include <linux/init.h>
#include <linux/moduleparam.h>
-#include <linux/miscdevice.h>
#include <linux/major.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
@@ -53,9 +39,6 @@
/********************* GENERAL DEFINES *********************************/
-/* zfcp version number, it consists of major, minor, and patch-level number */
-#define ZFCP_VERSION "4.8.0"
-
/**
* zfcp_sg_to_address - determine kernel address from struct scatterlist
* @list: struct scatterlist
@@ -93,11 +76,6 @@
#define ZFCP_DEVICE_MODEL 0x03
#define ZFCP_DEVICE_MODEL_PRIV 0x04
-/* allow as many chained SBALs as are supported by hardware */
-#define ZFCP_MAX_SBALS_PER_REQ FSF_MAX_SBALS_PER_REQ
-#define ZFCP_MAX_SBALS_PER_CT_REQ FSF_MAX_SBALS_PER_REQ
-#define ZFCP_MAX_SBALS_PER_ELS_REQ FSF_MAX_SBALS_PER_ELS_REQ
-
/* DMQ bug workaround: don't use last SBALE */
#define ZFCP_MAX_SBALES_PER_SBAL (QDIO_MAX_ELEMENTS_PER_BUFFER - 1)
@@ -106,42 +84,17 @@
/* max. number of (data buffer) SBALEs in largest SBAL chain */
#define ZFCP_MAX_SBALES_PER_REQ \
- (ZFCP_MAX_SBALS_PER_REQ * ZFCP_MAX_SBALES_PER_SBAL - 2)
+ (FSF_MAX_SBALS_PER_REQ * ZFCP_MAX_SBALES_PER_SBAL - 2)
/* request ID + QTCB in SBALE 0 + 1 of first SBAL in chain */
#define ZFCP_MAX_SECTORS (ZFCP_MAX_SBALES_PER_REQ * 8)
/* max. number of (data buffer) SBALEs in largest SBAL chain
multiplied with number of sectors per 4k block */
-/* FIXME(tune): free space should be one max. SBAL chain plus what? */
-#define ZFCP_QDIO_PCI_INTERVAL (QDIO_MAX_BUFFERS_PER_Q \
- - (ZFCP_MAX_SBALS_PER_REQ + 4))
-
-#define ZFCP_SBAL_TIMEOUT (5*HZ)
-
-#define ZFCP_TYPE2_RECOVERY_TIME 8 /* seconds */
-
-/* queue polling (values in microseconds) */
-#define ZFCP_MAX_INPUT_THRESHOLD 5000 /* FIXME: tune */
-#define ZFCP_MAX_OUTPUT_THRESHOLD 1000 /* FIXME: tune */
-#define ZFCP_MIN_INPUT_THRESHOLD 1 /* ignored by QDIO layer */
-#define ZFCP_MIN_OUTPUT_THRESHOLD 1 /* ignored by QDIO layer */
-
-#define QDIO_SCSI_QFMT 1 /* 1 for FSF */
-#define QBUFF_PER_PAGE (PAGE_SIZE / sizeof(struct qdio_buffer))
-
/********************* FSF SPECIFIC DEFINES *********************************/
-#define ZFCP_ULP_INFO_VERSION 26
-#define ZFCP_QTCB_VERSION FSF_QTCB_CURRENT_VERSION
/* ATTENTION: value must not be used by hardware */
#define FSF_QTCB_UNSOLICITED_STATUS 0x6305
-#define ZFCP_STATUS_READ_FAILED_THRESHOLD 3
-#define ZFCP_STATUS_READS_RECOM FSF_STATUS_READS_RECOM
-
-/* Do 1st retry in 1 second, then double the timeout for each following retry */
-#define ZFCP_EXCHANGE_CONFIG_DATA_FIRST_SLEEP 1
-#define ZFCP_EXCHANGE_CONFIG_DATA_RETRIES 7
/* timeout value for "default timer" for fsf requests */
#define ZFCP_FSF_REQUEST_TIMEOUT (60*HZ)
@@ -153,17 +106,9 @@
/* data length field may be at variable position in FCP-2 FCP_CMND IU */
typedef unsigned int fcp_dl_t;
-#define ZFCP_FC_SERVICE_CLASS_DEFAULT FSF_CLASS_3
-
/* timeout for name-server lookup (in seconds) */
#define ZFCP_NS_GID_PN_TIMEOUT 10
-/* largest SCSI command we can process */
-/* FCP-2 (FCP_CMND IU) allows up to (255-3+16) */
-#define ZFCP_MAX_SCSI_CMND_LENGTH 255
-/* maximum number of commands in LUN queue (tagged queueing) */
-#define ZFCP_CMND_PER_LUN 32
-
/* task attribute values in FCP-2 FCP_CMND IU */
#define SIMPLE_Q 0
#define HEAD_OF_Q 1
@@ -224,9 +169,9 @@
#define RSP_CODE_TASKMAN_FAILED 5
/* see fc-fs */
-#define LS_RSCN 0x61040000
-#define LS_LOGO 0x05000000
-#define LS_PLOGI 0x03000000
+#define LS_RSCN 0x61
+#define LS_LOGO 0x05
+#define LS_PLOGI 0x03
struct fcp_rscn_head {
u8 command;
@@ -266,7 +211,6 @@
* FC-FS stuff
*/
#define R_A_TOV 10 /* seconds */
-#define ZFCP_ELS_TIMEOUT (2 * R_A_TOV)
#define ZFCP_LS_RLS 0x0f
#define ZFCP_LS_ADISC 0x52
@@ -311,7 +255,10 @@
#define ZFCP_CT_DIRECTORY_SERVICE 0xFC
#define ZFCP_CT_NAME_SERVER 0x02
#define ZFCP_CT_SYNCHRONOUS 0x00
+#define ZFCP_CT_SCSI_FCP 0x08
+#define ZFCP_CT_UNABLE_TO_PERFORM_CMD 0x09
#define ZFCP_CT_GID_PN 0x0121
+#define ZFCP_CT_GPN_FT 0x0172
#define ZFCP_CT_MAX_SIZE 0x1020
#define ZFCP_CT_ACCEPT 0x8002
#define ZFCP_CT_REJECT 0x8001
@@ -321,107 +268,6 @@
*/
#define ZFCP_CT_TIMEOUT (3 * R_A_TOV)
-/******************** LOGGING MACROS AND DEFINES *****************************/
-
-/*
- * Logging may be applied on certain kinds of driver operations
- * independently. Additionally, different log-levels are supported for
- * each of these areas.
- */
-
-#define ZFCP_NAME "zfcp"
-
-/* independent log areas */
-#define ZFCP_LOG_AREA_OTHER 0
-#define ZFCP_LOG_AREA_SCSI 1
-#define ZFCP_LOG_AREA_FSF 2
-#define ZFCP_LOG_AREA_CONFIG 3
-#define ZFCP_LOG_AREA_CIO 4
-#define ZFCP_LOG_AREA_QDIO 5
-#define ZFCP_LOG_AREA_ERP 6
-#define ZFCP_LOG_AREA_FC 7
-
-/* log level values*/
-#define ZFCP_LOG_LEVEL_NORMAL 0
-#define ZFCP_LOG_LEVEL_INFO 1
-#define ZFCP_LOG_LEVEL_DEBUG 2
-#define ZFCP_LOG_LEVEL_TRACE 3
-
-/*
- * this allows removal of logging code by the preprocessor
- * (the most detailed log level still to be compiled in is specified,
- * higher log levels are removed)
- */
-#define ZFCP_LOG_LEVEL_LIMIT ZFCP_LOG_LEVEL_TRACE
-
-/* get "loglevel" nibble assignment */
-#define ZFCP_GET_LOG_VALUE(zfcp_lognibble) \
- ((atomic_read(&zfcp_data.loglevel) >> (zfcp_lognibble<<2)) & 0xF)
-
-/* set "loglevel" nibble */
-#define ZFCP_SET_LOG_NIBBLE(value, zfcp_lognibble) \
- (value << (zfcp_lognibble << 2))
-
-/* all log-level defaults are combined to generate initial log-level */
-#define ZFCP_LOG_LEVEL_DEFAULTS \
- (ZFCP_SET_LOG_NIBBLE(ZFCP_LOG_LEVEL_NORMAL, ZFCP_LOG_AREA_OTHER) | \
- ZFCP_SET_LOG_NIBBLE(ZFCP_LOG_LEVEL_NORMAL, ZFCP_LOG_AREA_SCSI) | \
- ZFCP_SET_LOG_NIBBLE(ZFCP_LOG_LEVEL_NORMAL, ZFCP_LOG_AREA_FSF) | \
- ZFCP_SET_LOG_NIBBLE(ZFCP_LOG_LEVEL_NORMAL, ZFCP_LOG_AREA_CONFIG) | \
- ZFCP_SET_LOG_NIBBLE(ZFCP_LOG_LEVEL_NORMAL, ZFCP_LOG_AREA_CIO) | \
- ZFCP_SET_LOG_NIBBLE(ZFCP_LOG_LEVEL_NORMAL, ZFCP_LOG_AREA_QDIO) | \
- ZFCP_SET_LOG_NIBBLE(ZFCP_LOG_LEVEL_NORMAL, ZFCP_LOG_AREA_ERP) | \
- ZFCP_SET_LOG_NIBBLE(ZFCP_LOG_LEVEL_NORMAL, ZFCP_LOG_AREA_FC))
-
-/* check whether we have the right level for logging */
-#define ZFCP_LOG_CHECK(level) \
- ((ZFCP_GET_LOG_VALUE(ZFCP_LOG_AREA)) >= level)
-
-/* logging routine for zfcp */
-#define _ZFCP_LOG(fmt, args...) \
- printk(KERN_ERR ZFCP_NAME": %s(%d): " fmt, __func__, \
- __LINE__ , ##args)
-
-#define ZFCP_LOG(level, fmt, args...) \
-do { \
- if (ZFCP_LOG_CHECK(level)) \
- _ZFCP_LOG(fmt, ##args); \
-} while (0)
-
-#if ZFCP_LOG_LEVEL_LIMIT < ZFCP_LOG_LEVEL_NORMAL
-# define ZFCP_LOG_NORMAL(fmt, args...) do { } while (0)
-#else
-# define ZFCP_LOG_NORMAL(fmt, args...) \
-do { \
- if (ZFCP_LOG_CHECK(ZFCP_LOG_LEVEL_NORMAL)) \
- printk(KERN_ERR ZFCP_NAME": " fmt, ##args); \
-} while (0)
-#endif
-
-#if ZFCP_LOG_LEVEL_LIMIT < ZFCP_LOG_LEVEL_INFO
-# define ZFCP_LOG_INFO(fmt, args...) do { } while (0)
-#else
-# define ZFCP_LOG_INFO(fmt, args...) \
-do { \
- if (ZFCP_LOG_CHECK(ZFCP_LOG_LEVEL_INFO)) \
- printk(KERN_ERR ZFCP_NAME": " fmt, ##args); \
-} while (0)
-#endif
-
-#if ZFCP_LOG_LEVEL_LIMIT < ZFCP_LOG_LEVEL_DEBUG
-# define ZFCP_LOG_DEBUG(fmt, args...) do { } while (0)
-#else
-# define ZFCP_LOG_DEBUG(fmt, args...) \
- ZFCP_LOG(ZFCP_LOG_LEVEL_DEBUG, fmt , ##args)
-#endif
-
-#if ZFCP_LOG_LEVEL_LIMIT < ZFCP_LOG_LEVEL_TRACE
-# define ZFCP_LOG_TRACE(fmt, args...) do { } while (0)
-#else
-# define ZFCP_LOG_TRACE(fmt, args...) \
- ZFCP_LOG(ZFCP_LOG_LEVEL_TRACE, fmt , ##args)
-#endif
-
/*************** ADAPTER/PORT/UNIT AND FSF_REQ STATUS FLAGS ******************/
/*
@@ -441,6 +287,7 @@
#define ZFCP_STATUS_COMMON_ERP_INUSE 0x01000000
#define ZFCP_STATUS_COMMON_ACCESS_DENIED 0x00800000
#define ZFCP_STATUS_COMMON_ACCESS_BOXED 0x00400000
+#define ZFCP_STATUS_COMMON_NOESC 0x00200000
/* adapter status */
#define ZFCP_STATUS_ADAPTER_QDIOUP 0x00000002
@@ -496,77 +343,6 @@
#define ZFCP_STATUS_FSFREQ_RETRY 0x00000800
#define ZFCP_STATUS_FSFREQ_DISMISSED 0x00001000
-/*********************** ERROR RECOVERY PROCEDURE DEFINES ********************/
-
-#define ZFCP_MAX_ERPS 3
-
-#define ZFCP_ERP_FSFREQ_TIMEOUT (30 * HZ)
-#define ZFCP_ERP_MEMWAIT_TIMEOUT HZ
-
-#define ZFCP_STATUS_ERP_TIMEDOUT 0x10000000
-#define ZFCP_STATUS_ERP_CLOSE_ONLY 0x01000000
-#define ZFCP_STATUS_ERP_DISMISSING 0x00100000
-#define ZFCP_STATUS_ERP_DISMISSED 0x00200000
-#define ZFCP_STATUS_ERP_LOWMEM 0x00400000
-
-#define ZFCP_ERP_STEP_UNINITIALIZED 0x00000000
-#define ZFCP_ERP_STEP_FSF_XCONFIG 0x00000001
-#define ZFCP_ERP_STEP_PHYS_PORT_CLOSING 0x00000010
-#define ZFCP_ERP_STEP_PORT_CLOSING 0x00000100
-#define ZFCP_ERP_STEP_NAMESERVER_OPEN 0x00000200
-#define ZFCP_ERP_STEP_NAMESERVER_LOOKUP 0x00000400
-#define ZFCP_ERP_STEP_PORT_OPENING 0x00000800
-#define ZFCP_ERP_STEP_UNIT_CLOSING 0x00001000
-#define ZFCP_ERP_STEP_UNIT_OPENING 0x00002000
-
-/* Ordered by escalation level (necessary for proper erp-code operation) */
-#define ZFCP_ERP_ACTION_REOPEN_ADAPTER 0x4
-#define ZFCP_ERP_ACTION_REOPEN_PORT_FORCED 0x3
-#define ZFCP_ERP_ACTION_REOPEN_PORT 0x2
-#define ZFCP_ERP_ACTION_REOPEN_UNIT 0x1
-
-#define ZFCP_ERP_ACTION_RUNNING 0x1
-#define ZFCP_ERP_ACTION_READY 0x2
-
-#define ZFCP_ERP_SUCCEEDED 0x0
-#define ZFCP_ERP_FAILED 0x1
-#define ZFCP_ERP_CONTINUES 0x2
-#define ZFCP_ERP_EXIT 0x3
-#define ZFCP_ERP_DISMISSED 0x4
-#define ZFCP_ERP_NOMEM 0x5
-
-
-/******************** CFDC SPECIFIC STUFF *****************************/
-
-/* Firewall data channel sense data record */
-struct zfcp_cfdc_sense_data {
- u32 signature; /* Request signature */
- u32 devno; /* FCP adapter device number */
- u32 command; /* Command code */
- u32 fsf_status; /* FSF request status and status qualifier */
- u8 fsf_status_qual[FSF_STATUS_QUALIFIER_SIZE];
- u8 payloads[256]; /* Access conflicts list */
- u8 control_file[0]; /* Access control table */
-};
-
-#define ZFCP_CFDC_SIGNATURE 0xCFDCACDF
-
-#define ZFCP_CFDC_CMND_DOWNLOAD_NORMAL 0x00010001
-#define ZFCP_CFDC_CMND_DOWNLOAD_FORCE 0x00010101
-#define ZFCP_CFDC_CMND_FULL_ACCESS 0x00000201
-#define ZFCP_CFDC_CMND_RESTRICTED_ACCESS 0x00000401
-#define ZFCP_CFDC_CMND_UPLOAD 0x00010002
-
-#define ZFCP_CFDC_DOWNLOAD 0x00000001
-#define ZFCP_CFDC_UPLOAD 0x00000002
-#define ZFCP_CFDC_WITH_CONTROL_FILE 0x00010000
-
-#define ZFCP_CFDC_DEV_NAME "zfcp_cfdc"
-#define ZFCP_CFDC_DEV_MAJOR MISC_MAJOR
-#define ZFCP_CFDC_DEV_MINOR MISC_DYNAMIC_MINOR
-
-#define ZFCP_CFDC_MAX_CONTROL_FILE_SIZE 127 * 1024
-
/************************* STRUCTURE DEFINITIONS *****************************/
struct zfcp_fsf_req;
@@ -623,7 +399,6 @@
* @resp_count: number of elements in response scatter-gather list
* @handler: handler function (called for response to the request)
* @handler_data: data passed to handler function
- * @pool: pointer to memory pool for ct request structure
* @timeout: FSF timeout for this request
* @completion: completion for synchronization purposes
* @status: used to pass error status to calling function
@@ -636,7 +411,6 @@
unsigned int resp_count;
zfcp_send_ct_handler_t handler;
unsigned long handler_data;
- mempool_t *pool;
int timeout;
struct completion *completion;
int status;
@@ -685,13 +459,13 @@
};
struct zfcp_qdio_queue {
- struct qdio_buffer *buffer[QDIO_MAX_BUFFERS_PER_Q]; /* SBALs */
- u8 free_index; /* index of next free bfr
+ struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q]; /* SBALs */
+ u8 first; /* index of next free bfr
in queue (free_count>0) */
- atomic_t free_count; /* number of free buffers
+ atomic_t count; /* number of free buffers
in queue */
- rwlock_t queue_lock; /* lock for operations on queue */
- int distance_from_int; /* SBALs used since PCI indication
+ spinlock_t lock; /* lock for operations on queue */
+ int pci_batch; /* SBALs since PCI indication
was last set */
};
@@ -708,6 +482,24 @@
struct timer_list timer;
};
+struct fsf_latency_record {
+ u32 min;
+ u32 max;
+ u64 sum;
+};
+
+struct latency_cont {
+ struct fsf_latency_record channel;
+ struct fsf_latency_record fabric;
+ u64 counter;
+};
+
+struct zfcp_latencies {
+ struct latency_cont read;
+ struct latency_cont write;
+ struct latency_cont cmd;
+ spinlock_t lock;
+};
struct zfcp_adapter {
struct list_head list; /* list of adapters */
@@ -723,24 +515,25 @@
u32 adapter_features; /* FCP channel features */
u32 connection_features; /* host connection features */
u32 hardware_version; /* of FCP channel */
+ u16 timer_ticks; /* time int for a tick */
struct Scsi_Host *scsi_host; /* Pointer to mid-layer */
struct list_head port_list_head; /* remote port list */
struct list_head port_remove_lh; /* head of ports to be
removed */
u32 ports; /* number of remote ports */
- atomic_t reqs_active; /* # active FSF reqs */
unsigned long req_no; /* unique FSF req number */
struct list_head *req_list; /* list of pending reqs */
spinlock_t req_list_lock; /* request list lock */
- struct zfcp_qdio_queue request_queue; /* request queue */
+ struct zfcp_qdio_queue req_q; /* request queue */
u32 fsf_req_seq_no; /* FSF cmnd seq number */
wait_queue_head_t request_wq; /* can be used to wait for
more avaliable SBALs */
- struct zfcp_qdio_queue response_queue; /* response queue */
+ struct zfcp_qdio_queue resp_q; /* response queue */
rwlock_t abort_lock; /* Protects against SCSI
stack abort/command
completion races */
- u16 status_read_failed; /* # failed status reads */
+ atomic_t stat_miss; /* # missing status reads*/
+ struct work_struct stat_work;
atomic_t status; /* status of this adapter */
struct list_head erp_ready_head; /* error recovery for this
adapter/devices */
@@ -774,13 +567,9 @@
struct fc_host_statistics *fc_stats;
struct fsf_qtcb_bottom_port *stats_reset_data;
unsigned long stats_reset;
+ struct work_struct scan_work;
};
-/*
- * the struct device sysfs_device must be at the beginning of this structure.
- * pointer to struct device is used to free port structure in release function
- * of the device. don't change!
- */
struct zfcp_port {
struct device sysfs_device; /* sysfs device */
struct fc_rport *rport; /* rport of fc transport class */
@@ -804,10 +593,6 @@
u32 supported_classes;
};
-/* the struct device sysfs_device must be at the beginning of this structure.
- * pointer to struct device is used to free unit structure in release function
- * of the device. don't change!
- */
struct zfcp_unit {
struct device sysfs_device; /* sysfs device */
struct list_head list; /* list of logical units */
@@ -822,6 +607,7 @@
struct scsi_device *device; /* scsi device struct pointer */
struct zfcp_erp_action erp_action; /* pending error recovery */
atomic_t erp_counter;
+ struct zfcp_latencies latencies;
};
/* FSF request */
@@ -831,19 +617,19 @@
struct zfcp_adapter *adapter; /* adapter request belongs to */
u8 sbal_number; /* nr of SBALs free for use */
u8 sbal_first; /* first SBAL for this request */
- u8 sbal_last; /* last possible SBAL for
+ u8 sbal_last; /* last SBAL for this request */
+ u8 sbal_limit; /* last possible SBAL for
this reuest */
- u8 sbal_curr; /* current SBAL during creation
- of request */
u8 sbale_curr; /* current SBALE during creation
of request */
+ u8 sbal_response; /* SBAL used in interrupt */
wait_queue_head_t completion_wq; /* can be used by a routine
to wait for completion */
volatile u32 status; /* status of this request */
u32 fsf_command; /* FSF Command copy */
struct fsf_qtcb *qtcb; /* address of associated QTCB */
u32 seq_no; /* Sequence number of request */
- unsigned long data; /* private data of request */
+ void *data; /* private data of request */
struct timer_list timer; /* used for erp or scsi er */
struct zfcp_erp_action *erp_action; /* used if this request is
issued on behalf of erp */
@@ -851,10 +637,9 @@
from emergency pool */
unsigned long long issued; /* request sent time (STCK) */
struct zfcp_unit *unit;
+ void (*handler)(struct zfcp_fsf_req *);
};
-typedef void zfcp_fsf_req_handler_t(struct zfcp_fsf_req*);
-
/* driver data */
struct zfcp_data {
struct scsi_host_template scsi_host_template;
@@ -873,29 +658,11 @@
char init_busid[BUS_ID_SIZE];
wwn_t init_wwpn;
fcp_lun_t init_fcp_lun;
- char *driver_version;
struct kmem_cache *fsf_req_qtcb_cache;
struct kmem_cache *sr_buffer_cache;
struct kmem_cache *gid_pn_cache;
};
-/**
- * struct zfcp_sg_list - struct describing a scatter-gather list
- * @sg: pointer to array of (struct scatterlist)
- * @count: number of elements in scatter-gather list
- */
-struct zfcp_sg_list {
- struct scatterlist *sg;
- unsigned int count;
-};
-
-/* number of elements for various memory pools */
-#define ZFCP_POOL_FSF_REQ_ERP_NR 1
-#define ZFCP_POOL_FSF_REQ_SCSI_NR 1
-#define ZFCP_POOL_FSF_REQ_ABORT_NR 1
-#define ZFCP_POOL_STATUS_READ_NR ZFCP_STATUS_READS_RECOM
-#define ZFCP_POOL_DATA_GID_PN_NR 1
-
/* struct used by memory pools for fsf_requests */
struct zfcp_fsf_req_qtcb {
struct zfcp_fsf_req fsf_req;
@@ -905,7 +672,6 @@
/********************** ZFCP SPECIFIC DEFINES ********************************/
#define ZFCP_REQ_AUTO_CLEANUP 0x00000002
-#define ZFCP_WAIT_FOR_SBAL 0x00000004
#define ZFCP_REQ_NO_QTCB 0x00000008
#define ZFCP_SET 0x00000100
@@ -916,12 +682,6 @@
((atomic_read(target) & mask) == mask)
#endif
-extern void _zfcp_hex_dump(char *, int);
-#define ZFCP_HEX_DUMP(level, addr, count) \
- if (ZFCP_LOG_CHECK(level)) { \
- _zfcp_hex_dump(addr, count); \
- }
-
#define zfcp_get_busid_by_adapter(adapter) (adapter->ccw_device->dev.bus_id)
#define zfcp_get_busid_by_port(port) (zfcp_get_busid_by_adapter(port->adapter))
#define zfcp_get_busid_by_unit(unit) (zfcp_get_busid_by_port(unit->port))
@@ -934,15 +694,6 @@
return req_id % REQUEST_LIST_SIZE;
}
-static inline void zfcp_reqlist_add(struct zfcp_adapter *adapter,
- struct zfcp_fsf_req *fsf_req)
-{
- unsigned int idx;
-
- idx = zfcp_reqlist_hash(fsf_req->req_id);
- list_add_tail(&fsf_req->list, &adapter->req_list[idx]);
-}
-
static inline void zfcp_reqlist_remove(struct zfcp_adapter *adapter,
struct zfcp_fsf_req *fsf_req)
{
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index 8054846..643ac4b 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -1,641 +1,406 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Error Recovery Procedures (ERP).
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_ERP
-
#include "zfcp_ext.h"
-static int zfcp_erp_adisc(struct zfcp_port *);
-static void zfcp_erp_adisc_handler(unsigned long);
+#define ZFCP_MAX_ERPS 3
-static int zfcp_erp_adapter_reopen_internal(struct zfcp_adapter *, int, u8,
- void *);
-static int zfcp_erp_port_forced_reopen_internal(struct zfcp_port *, int, u8,
- void *);
-static int zfcp_erp_port_reopen_internal(struct zfcp_port *, int, u8, void *);
-static int zfcp_erp_unit_reopen_internal(struct zfcp_unit *, int, u8, void *);
+enum zfcp_erp_act_flags {
+ ZFCP_STATUS_ERP_TIMEDOUT = 0x10000000,
+ ZFCP_STATUS_ERP_CLOSE_ONLY = 0x01000000,
+ ZFCP_STATUS_ERP_DISMISSING = 0x00100000,
+ ZFCP_STATUS_ERP_DISMISSED = 0x00200000,
+ ZFCP_STATUS_ERP_LOWMEM = 0x00400000,
+};
-static int zfcp_erp_port_reopen_all_internal(struct zfcp_adapter *, int, u8,
- void *);
-static int zfcp_erp_unit_reopen_all_internal(struct zfcp_port *, int, u8,
- void *);
+enum zfcp_erp_steps {
+ ZFCP_ERP_STEP_UNINITIALIZED = 0x0000,
+ ZFCP_ERP_STEP_FSF_XCONFIG = 0x0001,
+ ZFCP_ERP_STEP_PHYS_PORT_CLOSING = 0x0010,
+ ZFCP_ERP_STEP_PORT_CLOSING = 0x0100,
+ ZFCP_ERP_STEP_NAMESERVER_OPEN = 0x0200,
+ ZFCP_ERP_STEP_NAMESERVER_LOOKUP = 0x0400,
+ ZFCP_ERP_STEP_PORT_OPENING = 0x0800,
+ ZFCP_ERP_STEP_UNIT_CLOSING = 0x1000,
+ ZFCP_ERP_STEP_UNIT_OPENING = 0x2000,
+};
-static void zfcp_erp_adapter_block(struct zfcp_adapter *, int);
-static void zfcp_erp_adapter_unblock(struct zfcp_adapter *);
-static void zfcp_erp_port_block(struct zfcp_port *, int);
-static void zfcp_erp_port_unblock(struct zfcp_port *);
-static void zfcp_erp_unit_block(struct zfcp_unit *, int);
-static void zfcp_erp_unit_unblock(struct zfcp_unit *);
+enum zfcp_erp_act_type {
+ ZFCP_ERP_ACTION_REOPEN_UNIT = 1,
+ ZFCP_ERP_ACTION_REOPEN_PORT = 2,
+ ZFCP_ERP_ACTION_REOPEN_PORT_FORCED = 3,
+ ZFCP_ERP_ACTION_REOPEN_ADAPTER = 4,
+};
-static int zfcp_erp_thread(void *);
+enum zfcp_erp_act_state {
+ ZFCP_ERP_ACTION_RUNNING = 1,
+ ZFCP_ERP_ACTION_READY = 2,
+};
-static int zfcp_erp_strategy(struct zfcp_erp_action *);
+enum zfcp_erp_act_result {
+ ZFCP_ERP_SUCCEEDED = 0,
+ ZFCP_ERP_FAILED = 1,
+ ZFCP_ERP_CONTINUES = 2,
+ ZFCP_ERP_EXIT = 3,
+ ZFCP_ERP_DISMISSED = 4,
+ ZFCP_ERP_NOMEM = 5,
+};
-static int zfcp_erp_strategy_do_action(struct zfcp_erp_action *);
-static int zfcp_erp_strategy_memwait(struct zfcp_erp_action *);
-static int zfcp_erp_strategy_check_target(struct zfcp_erp_action *, int);
-static int zfcp_erp_strategy_check_unit(struct zfcp_unit *, int);
-static int zfcp_erp_strategy_check_port(struct zfcp_port *, int);
-static int zfcp_erp_strategy_check_adapter(struct zfcp_adapter *, int);
-static int zfcp_erp_strategy_statechange(int, u32, struct zfcp_adapter *,
- struct zfcp_port *,
- struct zfcp_unit *, int);
-static int zfcp_erp_strategy_statechange_detected(atomic_t *, u32);
-static int zfcp_erp_strategy_followup_actions(int, struct zfcp_adapter *,
- struct zfcp_port *,
- struct zfcp_unit *, int);
-static int zfcp_erp_strategy_check_queues(struct zfcp_adapter *);
-static int zfcp_erp_strategy_check_action(struct zfcp_erp_action *, int);
-
-static int zfcp_erp_adapter_strategy(struct zfcp_erp_action *);
-static int zfcp_erp_adapter_strategy_generic(struct zfcp_erp_action *, int);
-static int zfcp_erp_adapter_strategy_close(struct zfcp_erp_action *);
-static int zfcp_erp_adapter_strategy_open(struct zfcp_erp_action *);
-static int zfcp_erp_adapter_strategy_open_qdio(struct zfcp_erp_action *);
-static int zfcp_erp_adapter_strategy_open_fsf(struct zfcp_erp_action *);
-static int zfcp_erp_adapter_strategy_open_fsf_xconfig(struct zfcp_erp_action *);
-static int zfcp_erp_adapter_strategy_open_fsf_xport(struct zfcp_erp_action *);
-static int zfcp_erp_adapter_strategy_open_fsf_statusread(
- struct zfcp_erp_action *);
-
-static int zfcp_erp_port_forced_strategy(struct zfcp_erp_action *);
-static int zfcp_erp_port_forced_strategy_close(struct zfcp_erp_action *);
-
-static int zfcp_erp_port_strategy(struct zfcp_erp_action *);
-static int zfcp_erp_port_strategy_clearstati(struct zfcp_port *);
-static int zfcp_erp_port_strategy_close(struct zfcp_erp_action *);
-static int zfcp_erp_port_strategy_open(struct zfcp_erp_action *);
-static int zfcp_erp_port_strategy_open_nameserver(struct zfcp_erp_action *);
-static int zfcp_erp_port_strategy_open_nameserver_wakeup(
- struct zfcp_erp_action *);
-static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *);
-static int zfcp_erp_port_strategy_open_common_lookup(struct zfcp_erp_action *);
-static int zfcp_erp_port_strategy_open_port(struct zfcp_erp_action *);
-
-static int zfcp_erp_unit_strategy(struct zfcp_erp_action *);
-static int zfcp_erp_unit_strategy_clearstati(struct zfcp_unit *);
-static int zfcp_erp_unit_strategy_close(struct zfcp_erp_action *);
-static int zfcp_erp_unit_strategy_open(struct zfcp_erp_action *);
-
-static void zfcp_erp_action_dismiss_adapter(struct zfcp_adapter *);
-static void zfcp_erp_action_dismiss_port(struct zfcp_port *);
-static void zfcp_erp_action_dismiss_unit(struct zfcp_unit *);
-static void zfcp_erp_action_dismiss(struct zfcp_erp_action *);
-
-static int zfcp_erp_action_enqueue(int, struct zfcp_adapter *,
- struct zfcp_port *, struct zfcp_unit *,
- u8 id, void *ref);
-static int zfcp_erp_action_dequeue(struct zfcp_erp_action *);
-static void zfcp_erp_action_cleanup(int, struct zfcp_adapter *,
- struct zfcp_port *, struct zfcp_unit *,
- int);
-
-static void zfcp_erp_action_ready(struct zfcp_erp_action *);
-static int zfcp_erp_action_exists(struct zfcp_erp_action *);
-
-static void zfcp_erp_action_to_ready(struct zfcp_erp_action *);
-static void zfcp_erp_action_to_running(struct zfcp_erp_action *);
-
-static void zfcp_erp_memwait_handler(unsigned long);
-
-/**
- * zfcp_close_qdio - close qdio queues for an adapter
- */
-static void zfcp_close_qdio(struct zfcp_adapter *adapter)
+static void zfcp_erp_adapter_block(struct zfcp_adapter *adapter, int mask)
{
- struct zfcp_qdio_queue *req_queue;
- int first, count;
+ zfcp_erp_modify_adapter_status(adapter, 15, NULL,
+ ZFCP_STATUS_COMMON_UNBLOCKED | mask,
+ ZFCP_CLEAR);
+}
- if (!atomic_test_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status))
- return;
+static int zfcp_erp_action_exists(struct zfcp_erp_action *act)
+{
+ struct zfcp_erp_action *curr_act;
- /* clear QDIOUP flag, thus do_QDIO is not called during qdio_shutdown */
- req_queue = &adapter->request_queue;
- write_lock_irq(&req_queue->queue_lock);
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status);
- write_unlock_irq(&req_queue->queue_lock);
+ list_for_each_entry(curr_act, &act->adapter->erp_running_head, list)
+ if (act == curr_act)
+ return ZFCP_ERP_ACTION_RUNNING;
+ return 0;
+}
- while (qdio_shutdown(adapter->ccw_device,
- QDIO_FLAG_CLEANUP_USING_CLEAR) == -EINPROGRESS)
- ssleep(1);
+static void zfcp_erp_action_ready(struct zfcp_erp_action *act)
+{
+ struct zfcp_adapter *adapter = act->adapter;
- /* cleanup used outbound sbals */
- count = atomic_read(&req_queue->free_count);
- if (count < QDIO_MAX_BUFFERS_PER_Q) {
- first = (req_queue->free_index+count) % QDIO_MAX_BUFFERS_PER_Q;
- count = QDIO_MAX_BUFFERS_PER_Q - count;
- zfcp_qdio_zero_sbals(req_queue->buffer, first, count);
+ list_move(&act->list, &act->adapter->erp_ready_head);
+ zfcp_rec_dbf_event_action(146, act);
+ up(&adapter->erp_ready_sem);
+ zfcp_rec_dbf_event_thread(2, adapter);
+}
+
+static void zfcp_erp_action_dismiss(struct zfcp_erp_action *act)
+{
+ act->status |= ZFCP_STATUS_ERP_DISMISSED;
+ if (zfcp_erp_action_exists(act) == ZFCP_ERP_ACTION_RUNNING)
+ zfcp_erp_action_ready(act);
+}
+
+static void zfcp_erp_action_dismiss_unit(struct zfcp_unit *unit)
+{
+ if (atomic_read(&unit->status) & ZFCP_STATUS_COMMON_ERP_INUSE)
+ zfcp_erp_action_dismiss(&unit->erp_action);
+}
+
+static void zfcp_erp_action_dismiss_port(struct zfcp_port *port)
+{
+ struct zfcp_unit *unit;
+
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_INUSE)
+ zfcp_erp_action_dismiss(&port->erp_action);
+ else
+ list_for_each_entry(unit, &port->unit_list_head, list)
+ zfcp_erp_action_dismiss_unit(unit);
+}
+
+static void zfcp_erp_action_dismiss_adapter(struct zfcp_adapter *adapter)
+{
+ struct zfcp_port *port;
+
+ if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_ERP_INUSE)
+ zfcp_erp_action_dismiss(&adapter->erp_action);
+ else
+ list_for_each_entry(port, &adapter->port_list_head, list)
+ zfcp_erp_action_dismiss_port(port);
+}
+
+static int zfcp_erp_required_act(int want, struct zfcp_adapter *adapter,
+ struct zfcp_port *port,
+ struct zfcp_unit *unit)
+{
+ int need = want;
+ int u_status, p_status, a_status;
+
+ switch (want) {
+ case ZFCP_ERP_ACTION_REOPEN_UNIT:
+ u_status = atomic_read(&unit->status);
+ if (u_status & ZFCP_STATUS_COMMON_ERP_INUSE)
+ return 0;
+ p_status = atomic_read(&port->status);
+ if (!(p_status & ZFCP_STATUS_COMMON_RUNNING) ||
+ p_status & ZFCP_STATUS_COMMON_ERP_FAILED)
+ return 0;
+ if (!(p_status & ZFCP_STATUS_COMMON_UNBLOCKED))
+ need = ZFCP_ERP_ACTION_REOPEN_PORT;
+ /* fall through */
+ case ZFCP_ERP_ACTION_REOPEN_PORT:
+ case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
+ p_status = atomic_read(&port->status);
+ if (p_status & ZFCP_STATUS_COMMON_ERP_INUSE)
+ return 0;
+ a_status = atomic_read(&adapter->status);
+ if (!(a_status & ZFCP_STATUS_COMMON_RUNNING) ||
+ a_status & ZFCP_STATUS_COMMON_ERP_FAILED)
+ return 0;
+ if (!(a_status & ZFCP_STATUS_COMMON_UNBLOCKED))
+ need = ZFCP_ERP_ACTION_REOPEN_ADAPTER;
+ /* fall through */
+ case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
+ a_status = atomic_read(&adapter->status);
+ if (a_status & ZFCP_STATUS_COMMON_ERP_INUSE)
+ return 0;
}
- req_queue->free_index = 0;
- atomic_set(&req_queue->free_count, 0);
- req_queue->distance_from_int = 0;
- adapter->response_queue.free_index = 0;
- atomic_set(&adapter->response_queue.free_count, 0);
+
+ return need;
}
-/**
- * zfcp_close_fsf - stop FSF operations for an adapter
- *
- * Dismiss and cleanup all pending fsf_reqs (this wakes up all initiators of
- * requests waiting for completion; especially this returns SCSI commands
- * with error state).
- */
-static void zfcp_close_fsf(struct zfcp_adapter *adapter)
+static struct zfcp_erp_action *zfcp_erp_setup_act(int need,
+ struct zfcp_adapter *adapter,
+ struct zfcp_port *port,
+ struct zfcp_unit *unit)
{
- /* close queues to ensure that buffers are not accessed by adapter */
- zfcp_close_qdio(adapter);
- zfcp_fsf_req_dismiss_all(adapter);
- /* reset FSF request sequence number */
- adapter->fsf_req_seq_no = 0;
- /* all ports and units are closed */
- zfcp_erp_modify_adapter_status(adapter, 24, NULL,
- ZFCP_STATUS_COMMON_OPEN, ZFCP_CLEAR);
+ struct zfcp_erp_action *erp_action;
+ u32 status = 0;
+
+ switch (need) {
+ case ZFCP_ERP_ACTION_REOPEN_UNIT:
+ zfcp_unit_get(unit);
+ atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &unit->status);
+ erp_action = &unit->erp_action;
+ if (!(atomic_read(&unit->status) & ZFCP_STATUS_COMMON_RUNNING))
+ status = ZFCP_STATUS_ERP_CLOSE_ONLY;
+ break;
+
+ case ZFCP_ERP_ACTION_REOPEN_PORT:
+ case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
+ zfcp_port_get(port);
+ zfcp_erp_action_dismiss_port(port);
+ atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &port->status);
+ erp_action = &port->erp_action;
+ if (!(atomic_read(&port->status) & ZFCP_STATUS_COMMON_RUNNING))
+ status = ZFCP_STATUS_ERP_CLOSE_ONLY;
+ break;
+
+ case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
+ zfcp_adapter_get(adapter);
+ zfcp_erp_action_dismiss_adapter(adapter);
+ atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &adapter->status);
+ erp_action = &adapter->erp_action;
+ if (!(atomic_read(&adapter->status) &
+ ZFCP_STATUS_COMMON_RUNNING))
+ status = ZFCP_STATUS_ERP_CLOSE_ONLY;
+ break;
+
+ default:
+ return NULL;
+ }
+
+ memset(erp_action, 0, sizeof(struct zfcp_erp_action));
+ erp_action->adapter = adapter;
+ erp_action->port = port;
+ erp_action->unit = unit;
+ erp_action->action = need;
+ erp_action->status = status;
+
+ return erp_action;
}
-/**
- * zfcp_fsf_request_timeout_handler - called if a request timed out
- * @data: pointer to adapter for handler function
- *
- * This function needs to be called if requests (ELS, Generic Service,
- * or SCSI commands) exceed a certain time limit. The assumption is
- * that after the time limit the adapter get stuck. So we trigger a reopen of
- * the adapter.
- */
-static void zfcp_fsf_request_timeout_handler(unsigned long data)
+static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
+ struct zfcp_port *port,
+ struct zfcp_unit *unit, u8 id, void *ref)
{
- struct zfcp_adapter *adapter = (struct zfcp_adapter *) data;
- zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED, 62,
- NULL);
+ int retval = 1, need;
+ struct zfcp_erp_action *act = NULL;
+
+ if (!(atomic_read(&adapter->status) &
+ ZFCP_STATUS_ADAPTER_ERP_THREAD_UP))
+ return -EIO;
+
+ need = zfcp_erp_required_act(want, adapter, port, unit);
+ if (!need)
+ goto out;
+
+ atomic_set_mask(ZFCP_STATUS_ADAPTER_ERP_PENDING, &adapter->status);
+ act = zfcp_erp_setup_act(need, adapter, port, unit);
+ if (!act)
+ goto out;
+ ++adapter->erp_total_count;
+ list_add_tail(&act->list, &adapter->erp_ready_head);
+ up(&adapter->erp_ready_sem);
+ zfcp_rec_dbf_event_thread(1, adapter);
+ retval = 0;
+ out:
+ zfcp_rec_dbf_event_trigger(id, ref, want, need, act,
+ adapter, port, unit);
+ return retval;
}
-void zfcp_fsf_start_timer(struct zfcp_fsf_req *fsf_req, unsigned long timeout)
+static int _zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter,
+ int clear_mask, u8 id, void *ref)
{
- fsf_req->timer.function = zfcp_fsf_request_timeout_handler;
- fsf_req->timer.data = (unsigned long) fsf_req->adapter;
- fsf_req->timer.expires = jiffies + timeout;
- add_timer(&fsf_req->timer);
-}
-
-/*
- * function:
- *
- * purpose: called if an adapter failed,
- * initiates adapter recovery which is done
- * asynchronously
- *
- * returns: 0 - initiated action successfully
- * <0 - failed to initiate action
- */
-static int zfcp_erp_adapter_reopen_internal(struct zfcp_adapter *adapter,
- int clear_mask, u8 id, void *ref)
-{
- int retval;
-
- ZFCP_LOG_DEBUG("reopen adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
-
zfcp_erp_adapter_block(adapter, clear_mask);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &adapter->status)) {
- ZFCP_LOG_DEBUG("skipped reopen of failed adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- /* ensure propagation of failed status to new devices */
+ /* ensure propagation of failed status to new devices */
+ if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
zfcp_erp_adapter_failed(adapter, 13, NULL);
- retval = -EIO;
- goto out;
+ return -EIO;
}
- retval = zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_ADAPTER,
- adapter, NULL, NULL, id, ref);
-
- out:
- return retval;
+ return zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_ADAPTER,
+ adapter, NULL, NULL, id, ref);
}
-/*
- * function:
- *
- * purpose: Wrappper for zfcp_erp_adapter_reopen_internal
- * used to ensure the correct locking
- *
- * returns: 0 - initiated action successfully
- * <0 - failed to initiate action
+/**
+ * zfcp_erp_adapter_reopen - Reopen adapter.
+ * @adapter: Adapter to reopen.
+ * @clear: Status flags to clear.
+ * @id: Id for debug trace event.
+ * @ref: Reference for debug trace event.
*/
-int zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter, int clear_mask,
- u8 id, void *ref)
+void zfcp_erp_adapter_reopen(struct zfcp_adapter *adapter, int clear,
+ u8 id, void *ref)
{
- int retval;
unsigned long flags;
read_lock_irqsave(&zfcp_data.config_lock, flags);
write_lock(&adapter->erp_lock);
- retval = zfcp_erp_adapter_reopen_internal(adapter, clear_mask, id, ref);
+ _zfcp_erp_adapter_reopen(adapter, clear, id, ref);
write_unlock(&adapter->erp_lock);
read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- return retval;
}
-int zfcp_erp_adapter_shutdown(struct zfcp_adapter *adapter, int clear_mask,
- u8 id, void *ref)
-{
- int retval;
-
- retval = zfcp_erp_adapter_reopen(adapter,
- ZFCP_STATUS_COMMON_RUNNING |
- ZFCP_STATUS_COMMON_ERP_FAILED |
- clear_mask, id, ref);
-
- return retval;
-}
-
-int zfcp_erp_port_shutdown(struct zfcp_port *port, int clear_mask, u8 id,
- void *ref)
-{
- int retval;
-
- retval = zfcp_erp_port_reopen(port,
- ZFCP_STATUS_COMMON_RUNNING |
- ZFCP_STATUS_COMMON_ERP_FAILED |
- clear_mask, id, ref);
-
- return retval;
-}
-
-int zfcp_erp_unit_shutdown(struct zfcp_unit *unit, int clear_mask, u8 id,
- void *ref)
-{
- int retval;
-
- retval = zfcp_erp_unit_reopen(unit,
- ZFCP_STATUS_COMMON_RUNNING |
- ZFCP_STATUS_COMMON_ERP_FAILED |
- clear_mask, id, ref);
-
- return retval;
-}
-
-
/**
- * zfcp_erp_adisc - send ADISC ELS command
- * @port: port structure
+ * zfcp_erp_adapter_shutdown - Shutdown adapter.
+ * @adapter: Adapter to shut down.
+ * @clear: Status flags to clear.
+ * @id: Id for debug trace event.
+ * @ref: Reference for debug trace event.
*/
-static int
-zfcp_erp_adisc(struct zfcp_port *port)
+void zfcp_erp_adapter_shutdown(struct zfcp_adapter *adapter, int clear,
+ u8 id, void *ref)
{
+ int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED;
+ zfcp_erp_adapter_reopen(adapter, clear | flags, id, ref);
+}
+
+/**
+ * zfcp_erp_port_shutdown - Shutdown port
+ * @port: Port to shut down.
+ * @clear: Status flags to clear.
+ * @id: Id for debug trace event.
+ * @ref: Reference for debug trace event.
+ */
+void zfcp_erp_port_shutdown(struct zfcp_port *port, int clear, u8 id, void *ref)
+{
+ int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED;
+ zfcp_erp_port_reopen(port, clear | flags, id, ref);
+}
+
+/**
+ * zfcp_erp_unit_shutdown - Shutdown unit
+ * @unit: Unit to shut down.
+ * @clear: Status flags to clear.
+ * @id: Id for debug trace event.
+ * @ref: Reference for debug trace event.
+ */
+void zfcp_erp_unit_shutdown(struct zfcp_unit *unit, int clear, u8 id, void *ref)
+{
+ int flags = ZFCP_STATUS_COMMON_RUNNING | ZFCP_STATUS_COMMON_ERP_FAILED;
+ zfcp_erp_unit_reopen(unit, clear | flags, id, ref);
+}
+
+static void zfcp_erp_port_block(struct zfcp_port *port, int clear)
+{
+ zfcp_erp_modify_port_status(port, 17, NULL,
+ ZFCP_STATUS_COMMON_UNBLOCKED | clear,
+ ZFCP_CLEAR);
+}
+
+static void _zfcp_erp_port_forced_reopen(struct zfcp_port *port,
+ int clear, u8 id, void *ref)
+{
+ zfcp_erp_port_block(port, clear);
+
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED)
+ return;
+
+ zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_PORT_FORCED,
+ port->adapter, port, NULL, id, ref);
+}
+
+/**
+ * zfcp_erp_port_forced_reopen - Forced close of port and open again
+ * @port: Port to force close and to reopen.
+ * @id: Id for debug trace event.
+ * @ref: Reference for debug trace event.
+ */
+void zfcp_erp_port_forced_reopen(struct zfcp_port *port, int clear, u8 id,
+ void *ref)
+{
+ unsigned long flags;
struct zfcp_adapter *adapter = port->adapter;
- struct zfcp_send_els *send_els;
- struct zfcp_ls_adisc *adisc;
- void *address = NULL;
- int retval = 0;
- send_els = kzalloc(sizeof(struct zfcp_send_els), GFP_ATOMIC);
- if (send_els == NULL)
- goto nomem;
-
- send_els->req = kmalloc(sizeof(struct scatterlist), GFP_ATOMIC);
- if (send_els->req == NULL)
- goto nomem;
- sg_init_table(send_els->req, 1);
-
- send_els->resp = kmalloc(sizeof(struct scatterlist), GFP_ATOMIC);
- if (send_els->resp == NULL)
- goto nomem;
- sg_init_table(send_els->resp, 1);
-
- address = (void *) get_zeroed_page(GFP_ATOMIC);
- if (address == NULL)
- goto nomem;
-
- zfcp_address_to_sg(address, send_els->req, sizeof(struct zfcp_ls_adisc));
- address += PAGE_SIZE >> 1;
- zfcp_address_to_sg(address, send_els->resp, sizeof(struct zfcp_ls_adisc_acc));
- send_els->req_count = send_els->resp_count = 1;
-
- send_els->adapter = adapter;
- send_els->port = port;
- send_els->d_id = port->d_id;
- send_els->handler = zfcp_erp_adisc_handler;
- send_els->handler_data = (unsigned long) send_els;
-
- adisc = zfcp_sg_to_address(send_els->req);
- send_els->ls_code = adisc->code = ZFCP_LS_ADISC;
-
- /* acc. to FC-FS, hard_nport_id in ADISC should not be set for ports
- without FC-AL-2 capability, so we don't set it */
- adisc->wwpn = fc_host_port_name(adapter->scsi_host);
- adisc->wwnn = fc_host_node_name(adapter->scsi_host);
- adisc->nport_id = fc_host_port_id(adapter->scsi_host);
- ZFCP_LOG_INFO("ADISC request from s_id 0x%06x to d_id 0x%06x "
- "(wwpn=0x%016Lx, wwnn=0x%016Lx, "
- "hard_nport_id=0x%06x, nport_id=0x%06x)\n",
- adisc->nport_id, send_els->d_id, (wwn_t) adisc->wwpn,
- (wwn_t) adisc->wwnn, adisc->hard_nport_id,
- adisc->nport_id);
-
- retval = zfcp_fsf_send_els(send_els);
- if (retval != 0) {
- ZFCP_LOG_NORMAL("error: initiation of Send ELS failed for port "
- "0x%06x on adapter %s\n", send_els->d_id,
- zfcp_get_busid_by_adapter(adapter));
- goto freemem;
- }
-
- goto out;
-
- nomem:
- retval = -ENOMEM;
- freemem:
- if (address != NULL)
- __free_pages(sg_page(send_els->req), 0);
- if (send_els != NULL) {
- kfree(send_els->req);
- kfree(send_els->resp);
- kfree(send_els);
- }
- out:
- return retval;
-}
-
-
-/**
- * zfcp_erp_adisc_handler - handler for ADISC ELS command
- * @data: pointer to struct zfcp_send_els
- *
- * If ADISC failed (LS_RJT or timed out) forced reopen of the port is triggered.
- */
-static void
-zfcp_erp_adisc_handler(unsigned long data)
-{
- struct zfcp_send_els *send_els;
- struct zfcp_port *port;
- struct zfcp_adapter *adapter;
- u32 d_id;
- struct zfcp_ls_adisc_acc *adisc;
-
- send_els = (struct zfcp_send_els *) data;
- adapter = send_els->adapter;
- port = send_els->port;
- d_id = send_els->d_id;
-
- /* request rejected or timed out */
- if (send_els->status != 0) {
- ZFCP_LOG_NORMAL("ELS request rejected/timed out, "
- "force physical port reopen "
- "(adapter %s, port d_id=0x%06x)\n",
- zfcp_get_busid_by_adapter(adapter), d_id);
- if (zfcp_erp_port_forced_reopen(port, 0, 63, NULL))
- ZFCP_LOG_NORMAL("failed reopen of port "
- "(adapter %s, wwpn=0x%016Lx)\n",
- zfcp_get_busid_by_port(port),
- port->wwpn);
- goto out;
- }
-
- adisc = zfcp_sg_to_address(send_els->resp);
-
- ZFCP_LOG_INFO("ADISC response from d_id 0x%06x to s_id "
- "0x%06x (wwpn=0x%016Lx, wwnn=0x%016Lx, "
- "hard_nport_id=0x%06x, nport_id=0x%06x)\n",
- d_id, fc_host_port_id(adapter->scsi_host),
- (wwn_t) adisc->wwpn, (wwn_t) adisc->wwnn,
- adisc->hard_nport_id, adisc->nport_id);
-
- /* set wwnn for port */
- if (port->wwnn == 0)
- port->wwnn = adisc->wwnn;
-
- if (port->wwpn != adisc->wwpn) {
- ZFCP_LOG_NORMAL("d_id assignment changed, reopening "
- "port (adapter %s, wwpn=0x%016Lx, "
- "adisc_resp_wwpn=0x%016Lx)\n",
- zfcp_get_busid_by_port(port),
- port->wwpn, (wwn_t) adisc->wwpn);
- if (zfcp_erp_port_reopen(port, 0, 64, NULL))
- ZFCP_LOG_NORMAL("failed reopen of port "
- "(adapter %s, wwpn=0x%016Lx)\n",
- zfcp_get_busid_by_port(port),
- port->wwpn);
- }
-
- out:
- zfcp_port_put(port);
- __free_pages(sg_page(send_els->req), 0);
- kfree(send_els->req);
- kfree(send_els->resp);
- kfree(send_els);
-}
-
-
-/**
- * zfcp_test_link - lightweight link test procedure
- * @port: port to be tested
- *
- * Test status of a link to a remote port using the ELS command ADISC.
- */
-int
-zfcp_test_link(struct zfcp_port *port)
-{
- int retval;
-
- zfcp_port_get(port);
- retval = zfcp_erp_adisc(port);
- if (retval != 0 && retval != -EBUSY) {
- zfcp_port_put(port);
- ZFCP_LOG_NORMAL("reopen needed for port 0x%016Lx "
- "on adapter %s\n ", port->wwpn,
- zfcp_get_busid_by_port(port));
- retval = zfcp_erp_port_forced_reopen(port, 0, 65, NULL);
- if (retval != 0) {
- ZFCP_LOG_NORMAL("reopen of remote port 0x%016Lx "
- "on adapter %s failed\n", port->wwpn,
- zfcp_get_busid_by_port(port));
- retval = -EPERM;
- }
- }
-
- return retval;
-}
-
-
-/*
- * function:
- *
- * purpose: called if a port failed to be opened normally
- * initiates Forced Reopen recovery which is done
- * asynchronously
- *
- * returns: 0 - initiated action successfully
- * <0 - failed to initiate action
- */
-static int zfcp_erp_port_forced_reopen_internal(struct zfcp_port *port,
- int clear_mask, u8 id,
- void *ref)
-{
- int retval;
-
- ZFCP_LOG_DEBUG("forced reopen of port 0x%016Lx on adapter %s\n",
- port->wwpn, zfcp_get_busid_by_port(port));
-
- zfcp_erp_port_block(port, clear_mask);
-
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &port->status)) {
- ZFCP_LOG_DEBUG("skipped forced reopen of failed port 0x%016Lx "
- "on adapter %s\n", port->wwpn,
- zfcp_get_busid_by_port(port));
- retval = -EIO;
- goto out;
- }
-
- retval = zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_PORT_FORCED,
- port->adapter, port, NULL, id, ref);
-
- out:
- return retval;
-}
-
-/*
- * function:
- *
- * purpose: Wrappper for zfcp_erp_port_forced_reopen_internal
- * used to ensure the correct locking
- *
- * returns: 0 - initiated action successfully
- * <0 - failed to initiate action
- */
-int zfcp_erp_port_forced_reopen(struct zfcp_port *port, int clear_mask, u8 id,
- void *ref)
-{
- int retval;
- unsigned long flags;
- struct zfcp_adapter *adapter;
-
- adapter = port->adapter;
read_lock_irqsave(&zfcp_data.config_lock, flags);
write_lock(&adapter->erp_lock);
- retval = zfcp_erp_port_forced_reopen_internal(port, clear_mask, id,
- ref);
+ _zfcp_erp_port_forced_reopen(port, clear, id, ref);
write_unlock(&adapter->erp_lock);
read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- return retval;
}
-/*
- * function:
- *
- * purpose: called if a port is to be opened
- * initiates Reopen recovery which is done
- * asynchronously
- *
- * returns: 0 - initiated action successfully
- * <0 - failed to initiate action
- */
-static int zfcp_erp_port_reopen_internal(struct zfcp_port *port, int clear_mask,
- u8 id, void *ref)
+static int _zfcp_erp_port_reopen(struct zfcp_port *port, int clear, u8 id,
+ void *ref)
{
- int retval;
+ zfcp_erp_port_block(port, clear);
- ZFCP_LOG_DEBUG("reopen of port 0x%016Lx on adapter %s\n",
- port->wwpn, zfcp_get_busid_by_port(port));
-
- zfcp_erp_port_block(port, clear_mask);
-
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &port->status)) {
- ZFCP_LOG_DEBUG("skipped reopen of failed port 0x%016Lx "
- "on adapter %s\n", port->wwpn,
- zfcp_get_busid_by_port(port));
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
/* ensure propagation of failed status to new devices */
zfcp_erp_port_failed(port, 14, NULL);
- retval = -EIO;
- goto out;
+ return -EIO;
}
- retval = zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_PORT,
- port->adapter, port, NULL, id, ref);
-
- out:
- return retval;
+ return zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_PORT,
+ port->adapter, port, NULL, id, ref);
}
/**
- * zfcp_erp_port_reopen - initiate reopen of a remote port
- * @port: port to be reopened
- * @clear_mask: specifies flags in port status to be cleared
- * Return: 0 on success, < 0 on error
+ * zfcp_erp_port_reopen - trigger remote port recovery
+ * @port: port to recover
+ * @clear_mask: flags in port status to be cleared
*
- * This is a wrappper function for zfcp_erp_port_reopen_internal. It ensures
- * correct locking. An error recovery task is initiated to do the reopen.
- * To wait for the completion of the reopen zfcp_erp_wait should be used.
+ * Returns 0 if recovery has been triggered, < 0 if not.
*/
-int zfcp_erp_port_reopen(struct zfcp_port *port, int clear_mask, u8 id,
- void *ref)
+int zfcp_erp_port_reopen(struct zfcp_port *port, int clear, u8 id, void *ref)
{
- int retval;
unsigned long flags;
+ int retval;
struct zfcp_adapter *adapter = port->adapter;
read_lock_irqsave(&zfcp_data.config_lock, flags);
write_lock(&adapter->erp_lock);
- retval = zfcp_erp_port_reopen_internal(port, clear_mask, id, ref);
+ retval = _zfcp_erp_port_reopen(port, clear, id, ref);
write_unlock(&adapter->erp_lock);
read_unlock_irqrestore(&zfcp_data.config_lock, flags);
return retval;
}
-/*
- * function:
- *
- * purpose: called if a unit is to be opened
- * initiates Reopen recovery which is done
- * asynchronously
- *
- * returns: 0 - initiated action successfully
- * <0 - failed to initiate action
- */
-static int zfcp_erp_unit_reopen_internal(struct zfcp_unit *unit, int clear_mask,
- u8 id, void *ref)
+static void zfcp_erp_unit_block(struct zfcp_unit *unit, int clear_mask)
{
- int retval;
+ zfcp_erp_modify_unit_status(unit, 19, NULL,
+ ZFCP_STATUS_COMMON_UNBLOCKED | clear_mask,
+ ZFCP_CLEAR);
+}
+
+static void _zfcp_erp_unit_reopen(struct zfcp_unit *unit, int clear, u8 id,
+ void *ref)
+{
struct zfcp_adapter *adapter = unit->port->adapter;
- ZFCP_LOG_DEBUG("reopen of unit 0x%016Lx on port 0x%016Lx "
- "on adapter %s\n", unit->fcp_lun,
- unit->port->wwpn, zfcp_get_busid_by_unit(unit));
+ zfcp_erp_unit_block(unit, clear);
- zfcp_erp_unit_block(unit, clear_mask);
+ if (atomic_read(&unit->status) & ZFCP_STATUS_COMMON_ERP_FAILED)
+ return;
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &unit->status)) {
- ZFCP_LOG_DEBUG("skipped reopen of failed unit 0x%016Lx "
- "on port 0x%016Lx on adapter %s\n",
- unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- retval = -EIO;
- goto out;
- }
-
- retval = zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_UNIT,
- adapter, unit->port, unit, id, ref);
- out:
- return retval;
+ zfcp_erp_action_enqueue(ZFCP_ERP_ACTION_REOPEN_UNIT,
+ adapter, unit->port, unit, id, ref);
}
/**
@@ -643,725 +408,726 @@
* @unit: unit to be reopened
* @clear_mask: specifies flags in unit status to be cleared
* Return: 0 on success, < 0 on error
- *
- * This is a wrappper for zfcp_erp_unit_reopen_internal. It ensures correct
- * locking. An error recovery task is initiated to do the reopen.
- * To wait for the completion of the reopen zfcp_erp_wait should be used.
*/
-int zfcp_erp_unit_reopen(struct zfcp_unit *unit, int clear_mask, u8 id,
- void *ref)
+void zfcp_erp_unit_reopen(struct zfcp_unit *unit, int clear, u8 id, void *ref)
{
- int retval;
unsigned long flags;
- struct zfcp_adapter *adapter;
- struct zfcp_port *port;
-
- port = unit->port;
- adapter = port->adapter;
+ struct zfcp_port *port = unit->port;
+ struct zfcp_adapter *adapter = port->adapter;
read_lock_irqsave(&zfcp_data.config_lock, flags);
write_lock(&adapter->erp_lock);
- retval = zfcp_erp_unit_reopen_internal(unit, clear_mask, id, ref);
+ _zfcp_erp_unit_reopen(unit, clear, id, ref);
write_unlock(&adapter->erp_lock);
read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- return retval;
}
-/**
- * zfcp_erp_adapter_block - mark adapter as blocked, block scsi requests
- */
-static void zfcp_erp_adapter_block(struct zfcp_adapter *adapter, int clear_mask)
+static int status_change_set(unsigned long mask, atomic_t *status)
{
- zfcp_erp_modify_adapter_status(adapter, 15, NULL,
- ZFCP_STATUS_COMMON_UNBLOCKED |
- clear_mask, ZFCP_CLEAR);
+ return (atomic_read(status) ^ mask) & mask;
}
-/* FIXME: isn't really atomic */
-/*
- * returns the mask which has not been set so far, i.e.
- * 0 if no bit has been changed, !0 if some bit has been changed
- */
-static int atomic_test_and_set_mask(unsigned long mask, atomic_t *v)
+static int status_change_clear(unsigned long mask, atomic_t *status)
{
- int changed_bits = (atomic_read(v) /*XOR*/^ mask) & mask;
- atomic_set_mask(mask, v);
- return changed_bits;
+ return atomic_read(status) & mask;
}
-/* FIXME: isn't really atomic */
-/*
- * returns the mask which has not been cleared so far, i.e.
- * 0 if no bit has been changed, !0 if some bit has been changed
- */
-static int atomic_test_and_clear_mask(unsigned long mask, atomic_t *v)
-{
- int changed_bits = atomic_read(v) & mask;
- atomic_clear_mask(mask, v);
- return changed_bits;
-}
-
-/**
- * zfcp_erp_adapter_unblock - mark adapter as unblocked, allow scsi requests
- */
static void zfcp_erp_adapter_unblock(struct zfcp_adapter *adapter)
{
- if (atomic_test_and_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
- &adapter->status))
+ if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &adapter->status))
zfcp_rec_dbf_event_adapter(16, NULL, adapter);
+ atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &adapter->status);
}
-/*
- * function:
- *
- * purpose: disable I/O,
- * return any open requests and clean them up,
- * aim: no pending and incoming I/O
- *
- * returns:
- */
-static void
-zfcp_erp_port_block(struct zfcp_port *port, int clear_mask)
+static void zfcp_erp_port_unblock(struct zfcp_port *port)
{
- zfcp_erp_modify_port_status(port, 17, NULL,
- ZFCP_STATUS_COMMON_UNBLOCKED | clear_mask,
- ZFCP_CLEAR);
-}
-
-/*
- * function:
- *
- * purpose: enable I/O
- *
- * returns:
- */
-static void
-zfcp_erp_port_unblock(struct zfcp_port *port)
-{
- if (atomic_test_and_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
- &port->status))
+ if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &port->status))
zfcp_rec_dbf_event_port(18, NULL, port);
+ atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &port->status);
}
-/*
- * function:
- *
- * purpose: disable I/O,
- * return any open requests and clean them up,
- * aim: no pending and incoming I/O
- *
- * returns:
- */
-static void
-zfcp_erp_unit_block(struct zfcp_unit *unit, int clear_mask)
+static void zfcp_erp_unit_unblock(struct zfcp_unit *unit)
{
- zfcp_erp_modify_unit_status(unit, 19, NULL,
- ZFCP_STATUS_COMMON_UNBLOCKED | clear_mask,
- ZFCP_CLEAR);
-}
-
-/*
- * function:
- *
- * purpose: enable I/O
- *
- * returns:
- */
-static void
-zfcp_erp_unit_unblock(struct zfcp_unit *unit)
-{
- if (atomic_test_and_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
- &unit->status))
+ if (status_change_set(ZFCP_STATUS_COMMON_UNBLOCKED, &unit->status))
zfcp_rec_dbf_event_unit(20, NULL, unit);
+ atomic_set_mask(ZFCP_STATUS_COMMON_UNBLOCKED, &unit->status);
}
-static void
-zfcp_erp_action_ready(struct zfcp_erp_action *erp_action)
+static void zfcp_erp_action_to_running(struct zfcp_erp_action *erp_action)
{
- struct zfcp_adapter *adapter = erp_action->adapter;
-
- zfcp_erp_action_to_ready(erp_action);
- up(&adapter->erp_ready_sem);
- zfcp_rec_dbf_event_thread(2, adapter, 0);
+ list_move(&erp_action->list, &erp_action->adapter->erp_running_head);
+ zfcp_rec_dbf_event_action(145, erp_action);
}
-/*
- * function:
- *
- * purpose:
- *
- * returns: <0 erp_action not found in any list
- * ZFCP_ERP_ACTION_READY erp_action is in ready list
- * ZFCP_ERP_ACTION_RUNNING erp_action is in running list
- *
- * locks: erp_lock must be held
- */
-static int
-zfcp_erp_action_exists(struct zfcp_erp_action *erp_action)
+static void zfcp_erp_strategy_check_fsfreq(struct zfcp_erp_action *act)
{
- int retval = -EINVAL;
- struct list_head *entry;
- struct zfcp_erp_action *entry_erp_action;
- struct zfcp_adapter *adapter = erp_action->adapter;
+ struct zfcp_adapter *adapter = act->adapter;
- /* search in running list */
- list_for_each(entry, &adapter->erp_running_head) {
- entry_erp_action =
- list_entry(entry, struct zfcp_erp_action, list);
- if (entry_erp_action == erp_action) {
- retval = ZFCP_ERP_ACTION_RUNNING;
- goto out;
+ if (!act->fsf_req)
+ return;
+
+ spin_lock(&adapter->req_list_lock);
+ if (zfcp_reqlist_find_safe(adapter, act->fsf_req) &&
+ act->fsf_req->erp_action == act) {
+ if (act->status & (ZFCP_STATUS_ERP_DISMISSED |
+ ZFCP_STATUS_ERP_TIMEDOUT)) {
+ act->fsf_req->status |= ZFCP_STATUS_FSFREQ_DISMISSED;
+ zfcp_rec_dbf_event_action(142, act);
}
- }
- /* search in ready list */
- list_for_each(entry, &adapter->erp_ready_head) {
- entry_erp_action =
- list_entry(entry, struct zfcp_erp_action, list);
- if (entry_erp_action == erp_action) {
- retval = ZFCP_ERP_ACTION_READY;
- goto out;
- }
- }
-
- out:
- return retval;
-}
-
-/*
- * purpose: checks current status of action (timed out, dismissed, ...)
- * and does appropriate preparations (dismiss fsf request, ...)
- *
- * locks: called under erp_lock (disabled interrupts)
- */
-static void
-zfcp_erp_strategy_check_fsfreq(struct zfcp_erp_action *erp_action)
-{
- struct zfcp_adapter *adapter = erp_action->adapter;
-
- if (erp_action->fsf_req) {
- /* take lock to ensure that request is not deleted meanwhile */
- spin_lock(&adapter->req_list_lock);
- if (zfcp_reqlist_find_safe(adapter, erp_action->fsf_req) &&
- erp_action->fsf_req->erp_action == erp_action) {
- /* fsf_req still exists */
- /* dismiss fsf_req of timed out/dismissed erp_action */
- if (erp_action->status & (ZFCP_STATUS_ERP_DISMISSED |
- ZFCP_STATUS_ERP_TIMEDOUT)) {
- erp_action->fsf_req->status |=
- ZFCP_STATUS_FSFREQ_DISMISSED;
- zfcp_rec_dbf_event_action(142, erp_action);
- }
- if (erp_action->status & ZFCP_STATUS_ERP_TIMEDOUT) {
- zfcp_rec_dbf_event_action(143, erp_action);
- ZFCP_LOG_NORMAL("error: erp step timed out "
- "(action=%d, fsf_req=%p)\n ",
- erp_action->action,
- erp_action->fsf_req);
- }
- /*
- * If fsf_req is neither dismissed nor completed
- * then keep it running asynchronously and don't mess
- * with the association of erp_action and fsf_req.
- */
- if (erp_action->fsf_req->status &
- (ZFCP_STATUS_FSFREQ_COMPLETED |
- ZFCP_STATUS_FSFREQ_DISMISSED)) {
- /* forget about association between fsf_req
- and erp_action */
- erp_action->fsf_req = NULL;
- }
- } else {
- /*
- * even if this fsf_req has gone, forget about
- * association between erp_action and fsf_req
- */
- erp_action->fsf_req = NULL;
- }
- spin_unlock(&adapter->req_list_lock);
- }
+ if (act->status & ZFCP_STATUS_ERP_TIMEDOUT)
+ zfcp_rec_dbf_event_action(143, act);
+ if (act->fsf_req->status & (ZFCP_STATUS_FSFREQ_COMPLETED |
+ ZFCP_STATUS_FSFREQ_DISMISSED))
+ act->fsf_req = NULL;
+ } else
+ act->fsf_req = NULL;
+ spin_unlock(&adapter->req_list_lock);
}
/**
- * zfcp_erp_async_handler_nolock - complete erp_action
- *
- * Used for normal completion, time-out, dismissal and failure after
- * low memory condition.
+ * zfcp_erp_notify - Trigger ERP action.
+ * @erp_action: ERP action to continue.
+ * @set_mask: ERP action status flags to set.
*/
-static void zfcp_erp_async_handler_nolock(struct zfcp_erp_action *erp_action,
- unsigned long set_mask)
-{
- if (zfcp_erp_action_exists(erp_action) == ZFCP_ERP_ACTION_RUNNING) {
- erp_action->status |= set_mask;
- zfcp_erp_action_ready(erp_action);
- } else {
- /* action is ready or gone - nothing to do */
- }
-}
-
-/**
- * zfcp_erp_async_handler - wrapper for erp_async_handler_nolock w/ locking
- */
-void zfcp_erp_async_handler(struct zfcp_erp_action *erp_action,
- unsigned long set_mask)
+void zfcp_erp_notify(struct zfcp_erp_action *erp_action, unsigned long set_mask)
{
struct zfcp_adapter *adapter = erp_action->adapter;
unsigned long flags;
write_lock_irqsave(&adapter->erp_lock, flags);
- zfcp_erp_async_handler_nolock(erp_action, set_mask);
+ if (zfcp_erp_action_exists(erp_action) == ZFCP_ERP_ACTION_RUNNING) {
+ erp_action->status |= set_mask;
+ zfcp_erp_action_ready(erp_action);
+ }
write_unlock_irqrestore(&adapter->erp_lock, flags);
}
-/*
- * purpose: is called for erp_action which was slept waiting for
- * memory becoming avaliable,
- * will trigger that this action will be continued
- */
-static void
-zfcp_erp_memwait_handler(unsigned long data)
-{
- struct zfcp_erp_action *erp_action = (struct zfcp_erp_action *) data;
-
- zfcp_erp_async_handler(erp_action, 0);
-}
-
-/*
- * purpose: is called if an asynchronous erp step timed out,
- * action gets an appropriate flag and will be processed
- * accordingly
- */
-static void zfcp_erp_timeout_handler(unsigned long data)
-{
- struct zfcp_erp_action *erp_action = (struct zfcp_erp_action *) data;
-
- zfcp_erp_async_handler(erp_action, ZFCP_STATUS_ERP_TIMEDOUT);
-}
-
/**
- * zfcp_erp_action_dismiss - dismiss an erp_action
- *
- * adapter->erp_lock must be held
- *
- * Dismissal of an erp_action is usually required if an erp_action of
- * higher priority is generated.
+ * zfcp_erp_timeout_handler - Trigger ERP action from timed out ERP request
+ * @data: ERP action (from timer data)
*/
-static void zfcp_erp_action_dismiss(struct zfcp_erp_action *erp_action)
+void zfcp_erp_timeout_handler(unsigned long data)
{
- erp_action->status |= ZFCP_STATUS_ERP_DISMISSED;
- if (zfcp_erp_action_exists(erp_action) == ZFCP_ERP_ACTION_RUNNING)
- zfcp_erp_action_ready(erp_action);
+ struct zfcp_erp_action *act = (struct zfcp_erp_action *) data;
+ zfcp_erp_notify(act, ZFCP_STATUS_ERP_TIMEDOUT);
}
-int
-zfcp_erp_thread_setup(struct zfcp_adapter *adapter)
+static void zfcp_erp_memwait_handler(unsigned long data)
{
- int retval = 0;
-
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP, &adapter->status);
-
- retval = kernel_thread(zfcp_erp_thread, adapter, SIGCHLD);
- if (retval < 0) {
- ZFCP_LOG_NORMAL("error: creation of erp thread failed for "
- "adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- } else {
- wait_event(adapter->erp_thread_wqh,
- atomic_test_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP,
- &adapter->status));
- }
-
- return (retval < 0);
+ zfcp_erp_notify((struct zfcp_erp_action *)data, 0);
}
-/*
- * function:
- *
- * purpose:
- *
- * returns:
- *
- * context: process (i.e. proc-fs or rmmod/insmod)
- *
- * note: The caller of this routine ensures that the specified
- * adapter has been shut down and that this operation
- * has been completed. Thus, there are no pending erp_actions
- * which would need to be handled here.
- */
-int
-zfcp_erp_thread_kill(struct zfcp_adapter *adapter)
+static void zfcp_erp_strategy_memwait(struct zfcp_erp_action *erp_action)
{
- int retval = 0;
-
- atomic_set_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_KILL, &adapter->status);
- up(&adapter->erp_ready_sem);
- zfcp_rec_dbf_event_thread(2, adapter, 1);
-
- wait_event(adapter->erp_thread_wqh,
- !atomic_test_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP,
- &adapter->status));
-
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_KILL,
- &adapter->status);
-
- return retval;
-}
-
-/*
- * purpose: is run as a kernel thread,
- * goes through list of error recovery actions of associated adapter
- * and delegates single action to execution
- *
- * returns: 0
- */
-static int
-zfcp_erp_thread(void *data)
-{
- struct zfcp_adapter *adapter = (struct zfcp_adapter *) data;
- struct list_head *next;
- struct zfcp_erp_action *erp_action;
- unsigned long flags;
-
- daemonize("zfcperp%s", zfcp_get_busid_by_adapter(adapter));
- /* Block all signals */
- siginitsetinv(¤t->blocked, 0);
- atomic_set_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP, &adapter->status);
- wake_up(&adapter->erp_thread_wqh);
-
- while (!atomic_test_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_KILL,
- &adapter->status)) {
-
- write_lock_irqsave(&adapter->erp_lock, flags);
- next = adapter->erp_ready_head.next;
- write_unlock_irqrestore(&adapter->erp_lock, flags);
-
- if (next != &adapter->erp_ready_head) {
- erp_action =
- list_entry(next, struct zfcp_erp_action, list);
- /*
- * process action (incl. [re]moving it
- * from 'ready' queue)
- */
- zfcp_erp_strategy(erp_action);
- }
-
- /*
- * sleep as long as there is nothing to do, i.e.
- * no action in 'ready' queue to be processed and
- * thread is not to be killed
- */
- zfcp_rec_dbf_event_thread(4, adapter, 1);
- down_interruptible(&adapter->erp_ready_sem);
- zfcp_rec_dbf_event_thread(5, adapter, 1);
- }
-
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP, &adapter->status);
- wake_up(&adapter->erp_thread_wqh);
-
- return 0;
-}
-
-/*
- * function:
- *
- * purpose: drives single error recovery action and schedules higher and
- * subordinate actions, if necessary
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_SUCCEEDED - action finished successfully (deqd)
- * ZFCP_ERP_FAILED - action finished unsuccessfully (deqd)
- * ZFCP_ERP_EXIT - action finished (dequeued), offline
- * ZFCP_ERP_DISMISSED - action canceled (dequeued)
- */
-static int
-zfcp_erp_strategy(struct zfcp_erp_action *erp_action)
-{
- int retval = 0;
- struct zfcp_adapter *adapter = erp_action->adapter;
- struct zfcp_port *port = erp_action->port;
- struct zfcp_unit *unit = erp_action->unit;
- int action = erp_action->action;
- u32 status = erp_action->status;
- unsigned long flags;
-
- /* serialise dismissing, timing out, moving, enqueueing */
- read_lock_irqsave(&zfcp_data.config_lock, flags);
- write_lock(&adapter->erp_lock);
-
- /* dequeue dismissed action and leave, if required */
- retval = zfcp_erp_strategy_check_action(erp_action, retval);
- if (retval == ZFCP_ERP_DISMISSED) {
- goto unlock;
- }
-
- /*
- * move action to 'running' queue before processing it
- * (to avoid a race condition regarding moving the
- * action to the 'running' queue and back)
- */
- zfcp_erp_action_to_running(erp_action);
-
- /*
- * try to process action as far as possible,
- * no lock to allow for blocking operations (kmalloc, qdio, ...),
- * afterwards the lock is required again for the following reasons:
- * - dequeueing of finished action and enqueueing of
- * follow-up actions must be atomic so that any other
- * reopen-routine does not believe there is nothing to do
- * and that it is safe to enqueue something else,
- * - we want to force any control thread which is dismissing
- * actions to finish this before we decide about
- * necessary steps to be taken here further
- */
- write_unlock(&adapter->erp_lock);
- read_unlock_irqrestore(&zfcp_data.config_lock, flags);
- retval = zfcp_erp_strategy_do_action(erp_action);
- read_lock_irqsave(&zfcp_data.config_lock, flags);
- write_lock(&adapter->erp_lock);
-
- /*
- * check for dismissed status again to avoid follow-up actions,
- * failing of targets and so on for dismissed actions,
- * we go through down() here because there has been an up()
- */
- if (erp_action->status & ZFCP_STATUS_ERP_DISMISSED)
- retval = ZFCP_ERP_CONTINUES;
-
- switch (retval) {
- case ZFCP_ERP_NOMEM:
- /* no memory to continue immediately, let it sleep */
- if (!(erp_action->status & ZFCP_STATUS_ERP_LOWMEM)) {
- ++adapter->erp_low_mem_count;
- erp_action->status |= ZFCP_STATUS_ERP_LOWMEM;
- }
- /* This condition is true if there is no memory available
- for any erp_action on this adapter. This implies that there
- are no elements in the memory pool(s) left for erp_actions.
- This might happen if an erp_action that used a memory pool
- element was timed out.
- */
- if (adapter->erp_total_count == adapter->erp_low_mem_count) {
- ZFCP_LOG_NORMAL("error: no mempool elements available, "
- "restarting I/O on adapter %s "
- "to free mempool\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_reopen_internal(adapter, 0, 66, NULL);
- } else {
- retval = zfcp_erp_strategy_memwait(erp_action);
- }
- goto unlock;
- case ZFCP_ERP_CONTINUES:
- /* leave since this action runs asynchronously */
- if (erp_action->status & ZFCP_STATUS_ERP_LOWMEM) {
- --adapter->erp_low_mem_count;
- erp_action->status &= ~ZFCP_STATUS_ERP_LOWMEM;
- }
- goto unlock;
- }
- /* ok, finished action (whatever its result is) */
-
- /* check for unrecoverable targets */
- retval = zfcp_erp_strategy_check_target(erp_action, retval);
-
- /* action must be dequeued (here to allow for further ones) */
- zfcp_erp_action_dequeue(erp_action);
-
- /*
- * put this target through the erp mill again if someone has
- * requested to change the status of a target being online
- * to offline or the other way around
- * (old retval is preserved if nothing has to be done here)
- */
- retval = zfcp_erp_strategy_statechange(action, status, adapter,
- port, unit, retval);
-
- /*
- * leave if target is in permanent error state or if
- * action is repeated in order to process state change
- */
- if (retval == ZFCP_ERP_EXIT) {
- goto unlock;
- }
-
- /* trigger follow up actions */
- zfcp_erp_strategy_followup_actions(action, adapter, port, unit, retval);
-
- unlock:
- write_unlock(&adapter->erp_lock);
- read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- if (retval != ZFCP_ERP_CONTINUES)
- zfcp_erp_action_cleanup(action, adapter, port, unit, retval);
-
- /*
- * a few tasks remain when the erp queues are empty
- * (don't do that if the last action evaluated was dismissed
- * since this clearly indicates that there is more to come) :
- * - close the name server port if it is open yet
- * (enqueues another [probably] final action)
- * - otherwise, wake up whoever wants to be woken when we are
- * done with erp
- */
- if (retval != ZFCP_ERP_DISMISSED)
- zfcp_erp_strategy_check_queues(adapter);
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_DISMISSED - if action has been dismissed
- * retval - otherwise
- */
-static int
-zfcp_erp_strategy_check_action(struct zfcp_erp_action *erp_action, int retval)
-{
- zfcp_erp_strategy_check_fsfreq(erp_action);
-
- if (erp_action->status & ZFCP_STATUS_ERP_DISMISSED) {
- zfcp_erp_action_dequeue(erp_action);
- retval = ZFCP_ERP_DISMISSED;
- }
-
- return retval;
-}
-
-static int
-zfcp_erp_strategy_do_action(struct zfcp_erp_action *erp_action)
-{
- int retval = ZFCP_ERP_FAILED;
-
- /*
- * try to execute/continue action as far as possible,
- * note: no lock in subsequent strategy routines
- * (this allows these routine to call schedule, e.g.
- * kmalloc with such flags or qdio_initialize & friends)
- * Note: in case of timeout, the separate strategies will fail
- * anyhow. No need for a special action. Even worse, a nameserver
- * failure would not wake up waiting ports without the call.
- */
- switch (erp_action->action) {
-
- case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
- retval = zfcp_erp_adapter_strategy(erp_action);
- break;
-
- case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
- retval = zfcp_erp_port_forced_strategy(erp_action);
- break;
-
- case ZFCP_ERP_ACTION_REOPEN_PORT:
- retval = zfcp_erp_port_strategy(erp_action);
- break;
-
- case ZFCP_ERP_ACTION_REOPEN_UNIT:
- retval = zfcp_erp_unit_strategy(erp_action);
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: unknown erp action requested on "
- "adapter %s (action=%d)\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->action);
- }
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose: triggers retry of this action after a certain amount of time
- * by means of timer provided by erp_action
- *
- * returns: ZFCP_ERP_CONTINUES - erp_action sleeps in erp running queue
- */
-static int
-zfcp_erp_strategy_memwait(struct zfcp_erp_action *erp_action)
-{
- int retval = ZFCP_ERP_CONTINUES;
-
init_timer(&erp_action->timer);
erp_action->timer.function = zfcp_erp_memwait_handler;
erp_action->timer.data = (unsigned long) erp_action;
- erp_action->timer.expires = jiffies + ZFCP_ERP_MEMWAIT_TIMEOUT;
+ erp_action->timer.expires = jiffies + HZ;
add_timer(&erp_action->timer);
+}
+
+static void _zfcp_erp_port_reopen_all(struct zfcp_adapter *adapter,
+ int clear, u8 id, void *ref)
+{
+ struct zfcp_port *port;
+
+ list_for_each_entry(port, &adapter->port_list_head, list)
+ if (!(atomic_read(&port->status) & ZFCP_STATUS_PORT_WKA))
+ _zfcp_erp_port_reopen(port, clear, id, ref);
+}
+
+static void _zfcp_erp_unit_reopen_all(struct zfcp_port *port, int clear, u8 id,
+ void *ref)
+{
+ struct zfcp_unit *unit;
+
+ list_for_each_entry(unit, &port->unit_list_head, list)
+ _zfcp_erp_unit_reopen(unit, clear, id, ref);
+}
+
+static void zfcp_erp_strategy_followup_actions(struct zfcp_erp_action *act)
+{
+ struct zfcp_adapter *adapter = act->adapter;
+ struct zfcp_port *port = act->port;
+ struct zfcp_unit *unit = act->unit;
+ u32 status = act->status;
+
+ /* initiate follow-up actions depending on success of finished action */
+ switch (act->action) {
+
+ case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
+ if (status == ZFCP_ERP_SUCCEEDED)
+ _zfcp_erp_port_reopen_all(adapter, 0, 70, NULL);
+ else
+ _zfcp_erp_adapter_reopen(adapter, 0, 71, NULL);
+ break;
+
+ case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
+ if (status == ZFCP_ERP_SUCCEEDED)
+ _zfcp_erp_port_reopen(port, 0, 72, NULL);
+ else
+ _zfcp_erp_adapter_reopen(adapter, 0, 73, NULL);
+ break;
+
+ case ZFCP_ERP_ACTION_REOPEN_PORT:
+ if (status == ZFCP_ERP_SUCCEEDED)
+ _zfcp_erp_unit_reopen_all(port, 0, 74, NULL);
+ else
+ _zfcp_erp_port_forced_reopen(port, 0, 75, NULL);
+ break;
+
+ case ZFCP_ERP_ACTION_REOPEN_UNIT:
+ if (status != ZFCP_ERP_SUCCEEDED)
+ _zfcp_erp_port_reopen(unit->port, 0, 76, NULL);
+ break;
+ }
+}
+
+static void zfcp_erp_wakeup(struct zfcp_adapter *adapter)
+{
+ unsigned long flags;
+
+ read_lock_irqsave(&zfcp_data.config_lock, flags);
+ read_lock(&adapter->erp_lock);
+ if (list_empty(&adapter->erp_ready_head) &&
+ list_empty(&adapter->erp_running_head)) {
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_PENDING,
+ &adapter->status);
+ wake_up(&adapter->erp_done_wqh);
+ }
+ read_unlock(&adapter->erp_lock);
+ read_unlock_irqrestore(&zfcp_data.config_lock, flags);
+}
+
+static int zfcp_erp_adapter_strategy_open_qdio(struct zfcp_erp_action *act)
+{
+ if (zfcp_qdio_open(act->adapter))
+ return ZFCP_ERP_FAILED;
+ init_waitqueue_head(&act->adapter->request_wq);
+ atomic_set_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &act->adapter->status);
+ return ZFCP_ERP_SUCCEEDED;
+}
+
+static void zfcp_erp_enqueue_ptp_port(struct zfcp_adapter *adapter)
+{
+ struct zfcp_port *port;
+ port = zfcp_port_enqueue(adapter, adapter->peer_wwpn, 0,
+ adapter->peer_d_id);
+ if (IS_ERR(port)) /* error or port already attached */
+ return;
+ _zfcp_erp_port_reopen(port, 0, 150, NULL);
+}
+
+static int zfcp_erp_adapter_strat_fsf_xconf(struct zfcp_erp_action *erp_action)
+{
+ int retries;
+ int sleep = 1;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK, &adapter->status);
+
+ for (retries = 7; retries; retries--) {
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
+ &adapter->status);
+ write_lock_irq(&adapter->erp_lock);
+ zfcp_erp_action_to_running(erp_action);
+ write_unlock_irq(&adapter->erp_lock);
+ if (zfcp_fsf_exchange_config_data(erp_action)) {
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
+ &adapter->status);
+ return ZFCP_ERP_FAILED;
+ }
+
+ zfcp_rec_dbf_event_thread_lock(6, adapter);
+ down(&adapter->erp_ready_sem);
+ zfcp_rec_dbf_event_thread_lock(7, adapter);
+ if (erp_action->status & ZFCP_STATUS_ERP_TIMEDOUT)
+ break;
+
+ if (!(atomic_read(&adapter->status) &
+ ZFCP_STATUS_ADAPTER_HOST_CON_INIT))
+ break;
+
+ ssleep(sleep);
+ sleep *= 2;
+ }
+
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
+ &adapter->status);
+
+ if (!(atomic_read(&adapter->status) & ZFCP_STATUS_ADAPTER_XCONFIG_OK))
+ return ZFCP_ERP_FAILED;
+
+ if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP)
+ zfcp_erp_enqueue_ptp_port(adapter);
+
+ return ZFCP_ERP_SUCCEEDED;
+}
+
+static int zfcp_erp_adapter_strategy_open_fsf_xport(struct zfcp_erp_action *act)
+{
+ int ret;
+ struct zfcp_adapter *adapter = act->adapter;
+
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_XPORT_OK, &adapter->status);
+
+ write_lock_irq(&adapter->erp_lock);
+ zfcp_erp_action_to_running(act);
+ write_unlock_irq(&adapter->erp_lock);
+
+ ret = zfcp_fsf_exchange_port_data(act);
+ if (ret == -EOPNOTSUPP)
+ return ZFCP_ERP_SUCCEEDED;
+ if (ret)
+ return ZFCP_ERP_FAILED;
+
+ zfcp_rec_dbf_event_thread_lock(8, adapter);
+ down(&adapter->erp_ready_sem);
+ zfcp_rec_dbf_event_thread_lock(9, adapter);
+ if (act->status & ZFCP_STATUS_ERP_TIMEDOUT)
+ return ZFCP_ERP_FAILED;
+
+ return ZFCP_ERP_SUCCEEDED;
+}
+
+static int zfcp_erp_adapter_strategy_open_fsf(struct zfcp_erp_action *act)
+{
+ if (zfcp_erp_adapter_strat_fsf_xconf(act) == ZFCP_ERP_FAILED)
+ return ZFCP_ERP_FAILED;
+
+ if (zfcp_erp_adapter_strategy_open_fsf_xport(act) == ZFCP_ERP_FAILED)
+ return ZFCP_ERP_FAILED;
+
+ atomic_set(&act->adapter->stat_miss, 16);
+ if (zfcp_status_read_refill(act->adapter))
+ return ZFCP_ERP_FAILED;
+
+ return ZFCP_ERP_SUCCEEDED;
+}
+
+static int zfcp_erp_adapter_strategy_generic(struct zfcp_erp_action *act,
+ int close)
+{
+ int retval = ZFCP_ERP_SUCCEEDED;
+ struct zfcp_adapter *adapter = act->adapter;
+
+ if (close)
+ goto close_only;
+
+ retval = zfcp_erp_adapter_strategy_open_qdio(act);
+ if (retval != ZFCP_ERP_SUCCEEDED)
+ goto failed_qdio;
+
+ retval = zfcp_erp_adapter_strategy_open_fsf(act);
+ if (retval != ZFCP_ERP_SUCCEEDED)
+ goto failed_openfcp;
+
+ atomic_set_mask(ZFCP_STATUS_COMMON_OPEN, &act->adapter->status);
+ schedule_work(&act->adapter->scan_work);
+
+ return ZFCP_ERP_SUCCEEDED;
+
+ close_only:
+ atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN,
+ &act->adapter->status);
+
+ failed_openfcp:
+ /* close queues to ensure that buffers are not accessed by adapter */
+ zfcp_qdio_close(adapter);
+ zfcp_fsf_req_dismiss_all(adapter);
+ adapter->fsf_req_seq_no = 0;
+ /* all ports and units are closed */
+ zfcp_erp_modify_adapter_status(adapter, 24, NULL,
+ ZFCP_STATUS_COMMON_OPEN, ZFCP_CLEAR);
+ failed_qdio:
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK |
+ ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED |
+ ZFCP_STATUS_ADAPTER_XPORT_OK,
+ &act->adapter->status);
+ return retval;
+}
+
+static int zfcp_erp_adapter_strategy(struct zfcp_erp_action *act)
+{
+ int retval;
+
+ atomic_set_mask(ZFCP_STATUS_COMMON_CLOSING, &act->adapter->status);
+ zfcp_erp_adapter_strategy_generic(act, 1); /* close */
+ atomic_clear_mask(ZFCP_STATUS_COMMON_CLOSING, &act->adapter->status);
+ if (act->status & ZFCP_STATUS_ERP_CLOSE_ONLY)
+ return ZFCP_ERP_EXIT;
+
+ atomic_set_mask(ZFCP_STATUS_COMMON_OPENING, &act->adapter->status);
+ retval = zfcp_erp_adapter_strategy_generic(act, 0); /* open */
+ atomic_clear_mask(ZFCP_STATUS_COMMON_OPENING, &act->adapter->status);
+
+ if (retval == ZFCP_ERP_FAILED)
+ ssleep(8);
return retval;
}
-/*
- * function: zfcp_erp_adapter_failed
- *
- * purpose: sets the adapter and all underlying devices to ERP_FAILED
- *
- */
-void
-zfcp_erp_adapter_failed(struct zfcp_adapter *adapter, u8 id, void *ref)
+static int zfcp_erp_port_forced_strategy_close(struct zfcp_erp_action *act)
{
- zfcp_erp_modify_adapter_status(adapter, id, ref,
- ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
- ZFCP_LOG_NORMAL("adapter erp failed on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
+ int retval;
+
+ retval = zfcp_fsf_close_physical_port(act);
+ if (retval == -ENOMEM)
+ return ZFCP_ERP_NOMEM;
+ act->step = ZFCP_ERP_STEP_PHYS_PORT_CLOSING;
+ if (retval)
+ return ZFCP_ERP_FAILED;
+
+ return ZFCP_ERP_CONTINUES;
}
-/*
- * function: zfcp_erp_port_failed
- *
- * purpose: sets the port and all underlying devices to ERP_FAILED
- *
- */
-void
-zfcp_erp_port_failed(struct zfcp_port *port, u8 id, void *ref)
+static void zfcp_erp_port_strategy_clearstati(struct zfcp_port *port)
{
- zfcp_erp_modify_port_status(port, id, ref,
- ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
+ atomic_clear_mask(ZFCP_STATUS_COMMON_OPENING |
+ ZFCP_STATUS_COMMON_CLOSING |
+ ZFCP_STATUS_COMMON_ACCESS_DENIED |
+ ZFCP_STATUS_PORT_DID_DID |
+ ZFCP_STATUS_PORT_PHYS_CLOSING |
+ ZFCP_STATUS_PORT_INVALID_WWPN,
+ &port->status);
+}
- if (atomic_test_mask(ZFCP_STATUS_PORT_WKA, &port->status))
- ZFCP_LOG_NORMAL("port erp failed (adapter %s, "
- "port d_id=0x%06x)\n",
- zfcp_get_busid_by_port(port), port->d_id);
+static int zfcp_erp_port_forced_strategy(struct zfcp_erp_action *erp_action)
+{
+ struct zfcp_port *port = erp_action->port;
+ int status = atomic_read(&port->status);
+
+ switch (erp_action->step) {
+ case ZFCP_ERP_STEP_UNINITIALIZED:
+ zfcp_erp_port_strategy_clearstati(port);
+ if ((status & ZFCP_STATUS_PORT_PHYS_OPEN) &&
+ (status & ZFCP_STATUS_COMMON_OPEN))
+ return zfcp_erp_port_forced_strategy_close(erp_action);
+ else
+ return ZFCP_ERP_FAILED;
+
+ case ZFCP_ERP_STEP_PHYS_PORT_CLOSING:
+ if (status & ZFCP_STATUS_PORT_PHYS_OPEN)
+ return ZFCP_ERP_SUCCEEDED;
+ }
+ return ZFCP_ERP_FAILED;
+}
+
+static int zfcp_erp_port_strategy_close(struct zfcp_erp_action *erp_action)
+{
+ int retval;
+
+ retval = zfcp_fsf_close_port(erp_action);
+ if (retval == -ENOMEM)
+ return ZFCP_ERP_NOMEM;
+ erp_action->step = ZFCP_ERP_STEP_PORT_CLOSING;
+ if (retval)
+ return ZFCP_ERP_FAILED;
+ return ZFCP_ERP_CONTINUES;
+}
+
+static int zfcp_erp_port_strategy_open_port(struct zfcp_erp_action *erp_action)
+{
+ int retval;
+
+ retval = zfcp_fsf_open_port(erp_action);
+ if (retval == -ENOMEM)
+ return ZFCP_ERP_NOMEM;
+ erp_action->step = ZFCP_ERP_STEP_PORT_OPENING;
+ if (retval)
+ return ZFCP_ERP_FAILED;
+ return ZFCP_ERP_CONTINUES;
+}
+
+static void zfcp_erp_port_strategy_open_ns_wake(struct zfcp_erp_action *ns_act)
+{
+ unsigned long flags;
+ struct zfcp_adapter *adapter = ns_act->adapter;
+ struct zfcp_erp_action *act, *tmp;
+ int status;
+
+ read_lock_irqsave(&adapter->erp_lock, flags);
+ list_for_each_entry_safe(act, tmp, &adapter->erp_running_head, list) {
+ if (act->step == ZFCP_ERP_STEP_NAMESERVER_OPEN) {
+ status = atomic_read(&adapter->nameserver_port->status);
+ if (status & ZFCP_STATUS_COMMON_ERP_FAILED)
+ zfcp_erp_port_failed(act->port, 27, NULL);
+ zfcp_erp_action_ready(act);
+ }
+ }
+ read_unlock_irqrestore(&adapter->erp_lock, flags);
+}
+
+static int zfcp_erp_port_strategy_open_nameserver(struct zfcp_erp_action *act)
+{
+ int retval;
+
+ switch (act->step) {
+ case ZFCP_ERP_STEP_UNINITIALIZED:
+ case ZFCP_ERP_STEP_PHYS_PORT_CLOSING:
+ case ZFCP_ERP_STEP_PORT_CLOSING:
+ return zfcp_erp_port_strategy_open_port(act);
+
+ case ZFCP_ERP_STEP_PORT_OPENING:
+ if (atomic_read(&act->port->status) & ZFCP_STATUS_COMMON_OPEN)
+ retval = ZFCP_ERP_SUCCEEDED;
+ else
+ retval = ZFCP_ERP_FAILED;
+ /* this is needed anyway */
+ zfcp_erp_port_strategy_open_ns_wake(act);
+ return retval;
+
+ default:
+ return ZFCP_ERP_FAILED;
+ }
+}
+
+static int zfcp_erp_port_strategy_open_lookup(struct zfcp_erp_action *act)
+{
+ int retval;
+
+ retval = zfcp_fc_ns_gid_pn_request(act);
+ if (retval == -ENOMEM)
+ return ZFCP_ERP_NOMEM;
+ act->step = ZFCP_ERP_STEP_NAMESERVER_LOOKUP;
+ if (retval)
+ return ZFCP_ERP_FAILED;
+ return ZFCP_ERP_CONTINUES;
+}
+
+static int zfcp_erp_open_ptp_port(struct zfcp_erp_action *act)
+{
+ struct zfcp_adapter *adapter = act->adapter;
+ struct zfcp_port *port = act->port;
+
+ if (port->wwpn != adapter->peer_wwpn) {
+ dev_err(&adapter->ccw_device->dev,
+ "Failed to open port 0x%016Lx, "
+ "Peer WWPN 0x%016Lx does not "
+ "match.\n", port->wwpn,
+ adapter->peer_wwpn);
+ zfcp_erp_port_failed(port, 25, NULL);
+ return ZFCP_ERP_FAILED;
+ }
+ port->d_id = adapter->peer_d_id;
+ atomic_set_mask(ZFCP_STATUS_PORT_DID_DID, &port->status);
+ return zfcp_erp_port_strategy_open_port(act);
+}
+
+static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act)
+{
+ struct zfcp_adapter *adapter = act->adapter;
+ struct zfcp_port *port = act->port;
+ struct zfcp_port *ns_port = adapter->nameserver_port;
+ int p_status = atomic_read(&port->status);
+
+ switch (act->step) {
+ case ZFCP_ERP_STEP_UNINITIALIZED:
+ case ZFCP_ERP_STEP_PHYS_PORT_CLOSING:
+ case ZFCP_ERP_STEP_PORT_CLOSING:
+ if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP)
+ return zfcp_erp_open_ptp_port(act);
+ if (!ns_port) {
+ dev_err(&adapter->ccw_device->dev,
+ "Nameserver port unavailable.\n");
+ return ZFCP_ERP_FAILED;
+ }
+ if (!(atomic_read(&ns_port->status) &
+ ZFCP_STATUS_COMMON_UNBLOCKED)) {
+ /* nameserver port may live again */
+ atomic_set_mask(ZFCP_STATUS_COMMON_RUNNING,
+ &ns_port->status);
+ if (zfcp_erp_port_reopen(ns_port, 0, 77, act) >= 0) {
+ act->step = ZFCP_ERP_STEP_NAMESERVER_OPEN;
+ return ZFCP_ERP_CONTINUES;
+ }
+ return ZFCP_ERP_FAILED;
+ }
+ /* else nameserver port is already open, fall through */
+ case ZFCP_ERP_STEP_NAMESERVER_OPEN:
+ if (!(atomic_read(&ns_port->status) & ZFCP_STATUS_COMMON_OPEN))
+ return ZFCP_ERP_FAILED;
+ return zfcp_erp_port_strategy_open_lookup(act);
+
+ case ZFCP_ERP_STEP_NAMESERVER_LOOKUP:
+ if (!(p_status & ZFCP_STATUS_PORT_DID_DID)) {
+ if (p_status & (ZFCP_STATUS_PORT_INVALID_WWPN)) {
+ zfcp_erp_port_failed(port, 26, NULL);
+ return ZFCP_ERP_EXIT;
+ }
+ return ZFCP_ERP_FAILED;
+ }
+ return zfcp_erp_port_strategy_open_port(act);
+
+ case ZFCP_ERP_STEP_PORT_OPENING:
+ /* D_ID might have changed during open */
+ if ((p_status & ZFCP_STATUS_COMMON_OPEN) &&
+ (p_status & ZFCP_STATUS_PORT_DID_DID))
+ return ZFCP_ERP_SUCCEEDED;
+ /* fall through otherwise */
+ }
+ return ZFCP_ERP_FAILED;
+}
+
+static int zfcp_erp_port_strategy_open(struct zfcp_erp_action *act)
+{
+ if (atomic_read(&act->port->status) & (ZFCP_STATUS_PORT_WKA))
+ return zfcp_erp_port_strategy_open_nameserver(act);
+ return zfcp_erp_port_strategy_open_common(act);
+}
+
+static int zfcp_erp_port_strategy(struct zfcp_erp_action *erp_action)
+{
+ struct zfcp_port *port = erp_action->port;
+
+ switch (erp_action->step) {
+ case ZFCP_ERP_STEP_UNINITIALIZED:
+ zfcp_erp_port_strategy_clearstati(port);
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_OPEN)
+ return zfcp_erp_port_strategy_close(erp_action);
+ break;
+
+ case ZFCP_ERP_STEP_PORT_CLOSING:
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_OPEN)
+ return ZFCP_ERP_FAILED;
+ break;
+ }
+ if (erp_action->status & ZFCP_STATUS_ERP_CLOSE_ONLY)
+ return ZFCP_ERP_EXIT;
else
- ZFCP_LOG_NORMAL("port erp failed (adapter %s, wwpn=0x%016Lx)\n",
- zfcp_get_busid_by_port(port), port->wwpn);
+ return zfcp_erp_port_strategy_open(erp_action);
+
+ return ZFCP_ERP_FAILED;
}
-/*
- * function: zfcp_erp_unit_failed
- *
- * purpose: sets the unit to ERP_FAILED
- *
- */
-void
-zfcp_erp_unit_failed(struct zfcp_unit *unit, u8 id, void *ref)
+static void zfcp_erp_unit_strategy_clearstati(struct zfcp_unit *unit)
{
- zfcp_erp_modify_unit_status(unit, id, ref,
- ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
-
- ZFCP_LOG_NORMAL("unit erp failed on unit 0x%016Lx on port 0x%016Lx "
- " on adapter %s\n", unit->fcp_lun,
- unit->port->wwpn, zfcp_get_busid_by_unit(unit));
+ atomic_clear_mask(ZFCP_STATUS_COMMON_OPENING |
+ ZFCP_STATUS_COMMON_CLOSING |
+ ZFCP_STATUS_COMMON_ACCESS_DENIED |
+ ZFCP_STATUS_UNIT_SHARED |
+ ZFCP_STATUS_UNIT_READONLY,
+ &unit->status);
}
-/*
- * function: zfcp_erp_strategy_check_target
- *
- * purpose: increments the erp action count on the device currently in
- * recovery if the action failed or resets the count in case of
- * success. If a maximum count is exceeded the device is marked
- * as ERP_FAILED.
- * The 'blocked' state of a target which has been recovered
- * successfully is reset.
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (not considered)
- * ZFCP_ERP_SUCCEEDED - action finished successfully
- * ZFCP_ERP_EXIT - action failed and will not continue
- */
-static int
-zfcp_erp_strategy_check_target(struct zfcp_erp_action *erp_action, int result)
+static int zfcp_erp_unit_strategy_close(struct zfcp_erp_action *erp_action)
+{
+ int retval = zfcp_fsf_close_unit(erp_action);
+ if (retval == -ENOMEM)
+ return ZFCP_ERP_NOMEM;
+ erp_action->step = ZFCP_ERP_STEP_UNIT_CLOSING;
+ if (retval)
+ return ZFCP_ERP_FAILED;
+ return ZFCP_ERP_CONTINUES;
+}
+
+static int zfcp_erp_unit_strategy_open(struct zfcp_erp_action *erp_action)
+{
+ int retval = zfcp_fsf_open_unit(erp_action);
+ if (retval == -ENOMEM)
+ return ZFCP_ERP_NOMEM;
+ erp_action->step = ZFCP_ERP_STEP_UNIT_OPENING;
+ if (retval)
+ return ZFCP_ERP_FAILED;
+ return ZFCP_ERP_CONTINUES;
+}
+
+static int zfcp_erp_unit_strategy(struct zfcp_erp_action *erp_action)
+{
+ struct zfcp_unit *unit = erp_action->unit;
+
+ switch (erp_action->step) {
+ case ZFCP_ERP_STEP_UNINITIALIZED:
+ zfcp_erp_unit_strategy_clearstati(unit);
+ if (atomic_read(&unit->status) & ZFCP_STATUS_COMMON_OPEN)
+ return zfcp_erp_unit_strategy_close(erp_action);
+ /* already closed, fall through */
+ case ZFCP_ERP_STEP_UNIT_CLOSING:
+ if (atomic_read(&unit->status) & ZFCP_STATUS_COMMON_OPEN)
+ return ZFCP_ERP_FAILED;
+ if (erp_action->status & ZFCP_STATUS_ERP_CLOSE_ONLY)
+ return ZFCP_ERP_EXIT;
+ return zfcp_erp_unit_strategy_open(erp_action);
+
+ case ZFCP_ERP_STEP_UNIT_OPENING:
+ if (atomic_read(&unit->status) & ZFCP_STATUS_COMMON_OPEN)
+ return ZFCP_ERP_SUCCEEDED;
+ }
+ return ZFCP_ERP_FAILED;
+}
+
+static int zfcp_erp_strategy_check_unit(struct zfcp_unit *unit, int result)
+{
+ switch (result) {
+ case ZFCP_ERP_SUCCEEDED :
+ atomic_set(&unit->erp_counter, 0);
+ zfcp_erp_unit_unblock(unit);
+ break;
+ case ZFCP_ERP_FAILED :
+ atomic_inc(&unit->erp_counter);
+ if (atomic_read(&unit->erp_counter) > ZFCP_MAX_ERPS)
+ zfcp_erp_unit_failed(unit, 21, NULL);
+ break;
+ }
+
+ if (atomic_read(&unit->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
+ zfcp_erp_unit_block(unit, 0);
+ result = ZFCP_ERP_EXIT;
+ }
+ return result;
+}
+
+static int zfcp_erp_strategy_check_port(struct zfcp_port *port, int result)
+{
+ switch (result) {
+ case ZFCP_ERP_SUCCEEDED :
+ atomic_set(&port->erp_counter, 0);
+ zfcp_erp_port_unblock(port);
+ break;
+
+ case ZFCP_ERP_FAILED :
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_NOESC) {
+ zfcp_erp_port_block(port, 0);
+ result = ZFCP_ERP_EXIT;
+ }
+ atomic_inc(&port->erp_counter);
+ if (atomic_read(&port->erp_counter) > ZFCP_MAX_ERPS)
+ zfcp_erp_port_failed(port, 22, NULL);
+ break;
+ }
+
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
+ zfcp_erp_port_block(port, 0);
+ result = ZFCP_ERP_EXIT;
+ }
+ return result;
+}
+
+static int zfcp_erp_strategy_check_adapter(struct zfcp_adapter *adapter,
+ int result)
+{
+ switch (result) {
+ case ZFCP_ERP_SUCCEEDED :
+ atomic_set(&adapter->erp_counter, 0);
+ zfcp_erp_adapter_unblock(adapter);
+ break;
+
+ case ZFCP_ERP_FAILED :
+ atomic_inc(&adapter->erp_counter);
+ if (atomic_read(&adapter->erp_counter) > ZFCP_MAX_ERPS)
+ zfcp_erp_adapter_failed(adapter, 23, NULL);
+ break;
+ }
+
+ if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_ERP_FAILED) {
+ zfcp_erp_adapter_block(adapter, 0);
+ result = ZFCP_ERP_EXIT;
+ }
+ return result;
+}
+
+static int zfcp_erp_strategy_check_target(struct zfcp_erp_action *erp_action,
+ int result)
{
struct zfcp_adapter *adapter = erp_action->adapter;
struct zfcp_port *port = erp_action->port;
@@ -1382,142 +1148,94 @@
result = zfcp_erp_strategy_check_adapter(adapter, result);
break;
}
-
return result;
}
-static int
-zfcp_erp_strategy_statechange(int action,
- u32 status,
- struct zfcp_adapter *adapter,
- struct zfcp_port *port,
- struct zfcp_unit *unit, int retval)
+static int zfcp_erp_strat_change_det(atomic_t *target_status, u32 erp_status)
{
- switch (action) {
+ int status = atomic_read(target_status);
+ if ((status & ZFCP_STATUS_COMMON_RUNNING) &&
+ (erp_status & ZFCP_STATUS_ERP_CLOSE_ONLY))
+ return 1; /* take it online */
+
+ if (!(status & ZFCP_STATUS_COMMON_RUNNING) &&
+ !(erp_status & ZFCP_STATUS_ERP_CLOSE_ONLY))
+ return 1; /* take it offline */
+
+ return 0;
+}
+
+static int zfcp_erp_strategy_statechange(struct zfcp_erp_action *act, int ret)
+{
+ int action = act->action;
+ struct zfcp_adapter *adapter = act->adapter;
+ struct zfcp_port *port = act->port;
+ struct zfcp_unit *unit = act->unit;
+ u32 erp_status = act->status;
+
+ switch (action) {
case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
- if (zfcp_erp_strategy_statechange_detected(&adapter->status,
- status)) {
- zfcp_erp_adapter_reopen_internal(adapter,
- ZFCP_STATUS_COMMON_ERP_FAILED,
- 67, NULL);
- retval = ZFCP_ERP_EXIT;
+ if (zfcp_erp_strat_change_det(&adapter->status, erp_status)) {
+ _zfcp_erp_adapter_reopen(adapter,
+ ZFCP_STATUS_COMMON_ERP_FAILED,
+ 67, NULL);
+ return ZFCP_ERP_EXIT;
}
break;
case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
case ZFCP_ERP_ACTION_REOPEN_PORT:
- if (zfcp_erp_strategy_statechange_detected(&port->status,
- status)) {
- zfcp_erp_port_reopen_internal(port,
- ZFCP_STATUS_COMMON_ERP_FAILED,
- 68, NULL);
- retval = ZFCP_ERP_EXIT;
+ if (zfcp_erp_strat_change_det(&port->status, erp_status)) {
+ _zfcp_erp_port_reopen(port,
+ ZFCP_STATUS_COMMON_ERP_FAILED,
+ 68, NULL);
+ return ZFCP_ERP_EXIT;
}
break;
case ZFCP_ERP_ACTION_REOPEN_UNIT:
- if (zfcp_erp_strategy_statechange_detected(&unit->status,
- status)) {
- zfcp_erp_unit_reopen_internal(unit,
- ZFCP_STATUS_COMMON_ERP_FAILED,
- 69, NULL);
- retval = ZFCP_ERP_EXIT;
+ if (zfcp_erp_strat_change_det(&unit->status, erp_status)) {
+ _zfcp_erp_unit_reopen(unit,
+ ZFCP_STATUS_COMMON_ERP_FAILED,
+ 69, NULL);
+ return ZFCP_ERP_EXIT;
}
break;
}
-
- return retval;
+ return ret;
}
-static int
-zfcp_erp_strategy_statechange_detected(atomic_t * target_status, u32 erp_status)
+static void zfcp_erp_action_dequeue(struct zfcp_erp_action *erp_action)
{
- return
- /* take it online */
- (atomic_test_mask(ZFCP_STATUS_COMMON_RUNNING, target_status) &&
- (ZFCP_STATUS_ERP_CLOSE_ONLY & erp_status)) ||
- /* take it offline */
- (!atomic_test_mask(ZFCP_STATUS_COMMON_RUNNING, target_status) &&
- !(ZFCP_STATUS_ERP_CLOSE_ONLY & erp_status));
-}
+ struct zfcp_adapter *adapter = erp_action->adapter;
-static int
-zfcp_erp_strategy_check_unit(struct zfcp_unit *unit, int result)
-{
- switch (result) {
- case ZFCP_ERP_SUCCEEDED :
- atomic_set(&unit->erp_counter, 0);
- zfcp_erp_unit_unblock(unit);
- break;
- case ZFCP_ERP_FAILED :
- atomic_inc(&unit->erp_counter);
- if (atomic_read(&unit->erp_counter) > ZFCP_MAX_ERPS)
- zfcp_erp_unit_failed(unit, 21, NULL);
- break;
- case ZFCP_ERP_EXIT :
- /* nothing */
- break;
+ adapter->erp_total_count--;
+ if (erp_action->status & ZFCP_STATUS_ERP_LOWMEM) {
+ adapter->erp_low_mem_count--;
+ erp_action->status &= ~ZFCP_STATUS_ERP_LOWMEM;
}
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &unit->status)) {
- zfcp_erp_unit_block(unit, 0); /* for ZFCP_ERP_SUCCEEDED */
- result = ZFCP_ERP_EXIT;
- }
+ list_del(&erp_action->list);
+ zfcp_rec_dbf_event_action(144, erp_action);
- return result;
-}
+ switch (erp_action->action) {
+ case ZFCP_ERP_ACTION_REOPEN_UNIT:
+ atomic_clear_mask(ZFCP_STATUS_COMMON_ERP_INUSE,
+ &erp_action->unit->status);
+ break;
-static int
-zfcp_erp_strategy_check_port(struct zfcp_port *port, int result)
-{
- switch (result) {
- case ZFCP_ERP_SUCCEEDED :
- atomic_set(&port->erp_counter, 0);
- zfcp_erp_port_unblock(port);
+ case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
+ case ZFCP_ERP_ACTION_REOPEN_PORT:
+ atomic_clear_mask(ZFCP_STATUS_COMMON_ERP_INUSE,
+ &erp_action->port->status);
break;
- case ZFCP_ERP_FAILED :
- atomic_inc(&port->erp_counter);
- if (atomic_read(&port->erp_counter) > ZFCP_MAX_ERPS)
- zfcp_erp_port_failed(port, 22, NULL);
- break;
- case ZFCP_ERP_EXIT :
- /* nothing */
+
+ case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
+ atomic_clear_mask(ZFCP_STATUS_COMMON_ERP_INUSE,
+ &erp_action->adapter->status);
break;
}
-
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &port->status)) {
- zfcp_erp_port_block(port, 0); /* for ZFCP_ERP_SUCCEEDED */
- result = ZFCP_ERP_EXIT;
- }
-
- return result;
-}
-
-static int
-zfcp_erp_strategy_check_adapter(struct zfcp_adapter *adapter, int result)
-{
- switch (result) {
- case ZFCP_ERP_SUCCEEDED :
- atomic_set(&adapter->erp_counter, 0);
- zfcp_erp_adapter_unblock(adapter);
- break;
- case ZFCP_ERP_FAILED :
- atomic_inc(&adapter->erp_counter);
- if (atomic_read(&adapter->erp_counter) > ZFCP_MAX_ERPS)
- zfcp_erp_adapter_failed(adapter, 23, NULL);
- break;
- case ZFCP_ERP_EXIT :
- /* nothing */
- break;
- }
-
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &adapter->status)) {
- zfcp_erp_adapter_block(adapter, 0); /* for ZFCP_ERP_SUCCEEDED */
- result = ZFCP_ERP_EXIT;
- }
-
- return result;
}
struct zfcp_erp_add_work {
@@ -1525,12 +1243,6 @@
struct work_struct work;
};
-/**
- * zfcp_erp_scsi_scan
- * @data: pointer to a struct zfcp_erp_add_work
- *
- * Registers a logical unit with the SCSI stack.
- */
static void zfcp_erp_scsi_scan(struct work_struct *work)
{
struct zfcp_erp_add_work *p =
@@ -1544,26 +1256,16 @@
kfree(p);
}
-/**
- * zfcp_erp_schedule_work
- * @unit: pointer to unit which should be registered with SCSI stack
- *
- * Schedules work which registers a unit with the SCSI stack
- */
-static void
-zfcp_erp_schedule_work(struct zfcp_unit *unit)
+static void zfcp_erp_schedule_work(struct zfcp_unit *unit)
{
struct zfcp_erp_add_work *p;
p = kzalloc(sizeof(*p), GFP_KERNEL);
if (!p) {
- ZFCP_LOG_NORMAL("error: Out of resources. Could not register "
- "the FCP-LUN 0x%Lx connected to "
- "the port with WWPN 0x%Lx connected to "
- "the adapter %s with the SCSI stack.\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
+ dev_err(&unit->port->adapter->ccw_device->dev,
+ "Out of resources. Could not register unit "
+ "0x%016Lx on port 0x%016Lx with SCSI stack.\n",
+ unit->fcp_lun, unit->port->wwpn);
return;
}
@@ -1574,1486 +1276,406 @@
schedule_work(&p->work);
}
-/*
- * function:
- *
- * purpose: remaining things in good cases,
- * escalation in bad cases
- *
- * returns:
- */
-static int
-zfcp_erp_strategy_followup_actions(int action,
- struct zfcp_adapter *adapter,
- struct zfcp_port *port,
- struct zfcp_unit *unit, int status)
+static void zfcp_erp_rport_register(struct zfcp_port *port)
{
- /* initiate follow-up actions depending on success of finished action */
- switch (action) {
-
- case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
- if (status == ZFCP_ERP_SUCCEEDED)
- zfcp_erp_port_reopen_all_internal(adapter, 0, 70, NULL);
- else
- zfcp_erp_adapter_reopen_internal(adapter, 0, 71, NULL);
- break;
-
- case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
- if (status == ZFCP_ERP_SUCCEEDED)
- zfcp_erp_port_reopen_internal(port, 0, 72, NULL);
- else
- zfcp_erp_adapter_reopen_internal(adapter, 0, 73, NULL);
- break;
-
- case ZFCP_ERP_ACTION_REOPEN_PORT:
- if (status == ZFCP_ERP_SUCCEEDED)
- zfcp_erp_unit_reopen_all_internal(port, 0, 74, NULL);
- else
- zfcp_erp_port_forced_reopen_internal(port, 0, 75, NULL);
- break;
-
- case ZFCP_ERP_ACTION_REOPEN_UNIT:
- /* Nothing to do if status == ZFCP_ERP_SUCCEEDED */
- if (status != ZFCP_ERP_SUCCEEDED)
- zfcp_erp_port_reopen_internal(unit->port, 0, 76, NULL);
- break;
+ struct fc_rport_identifiers ids;
+ ids.node_name = port->wwnn;
+ ids.port_name = port->wwpn;
+ ids.port_id = port->d_id;
+ ids.roles = FC_RPORT_ROLE_FCP_TARGET;
+ port->rport = fc_remote_port_add(port->adapter->scsi_host, 0, &ids);
+ if (!port->rport) {
+ dev_err(&port->adapter->ccw_device->dev,
+ "Failed registration of rport "
+ "0x%016Lx.\n", port->wwpn);
+ return;
}
- return 0;
+ scsi_target_unblock(&port->rport->dev);
+ port->rport->maxframe_size = port->maxframe_size;
+ port->rport->supported_classes = port->supported_classes;
}
-static int
-zfcp_erp_strategy_check_queues(struct zfcp_adapter *adapter)
-{
- unsigned long flags;
-
- read_lock_irqsave(&zfcp_data.config_lock, flags);
- read_lock(&adapter->erp_lock);
- if (list_empty(&adapter->erp_ready_head) &&
- list_empty(&adapter->erp_running_head)) {
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_PENDING,
- &adapter->status);
- wake_up(&adapter->erp_done_wqh);
- }
- read_unlock(&adapter->erp_lock);
- read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- return 0;
-}
-
-/**
- * zfcp_erp_wait - wait for completion of error recovery on an adapter
- * @adapter: adapter for which to wait for completion of its error recovery
- * Return: 0
- */
-int
-zfcp_erp_wait(struct zfcp_adapter *adapter)
-{
- int retval = 0;
-
- wait_event(adapter->erp_done_wqh,
- !atomic_test_mask(ZFCP_STATUS_ADAPTER_ERP_PENDING,
- &adapter->status));
-
- return retval;
-}
-
-void zfcp_erp_modify_adapter_status(struct zfcp_adapter *adapter, u8 id,
- void *ref, u32 mask, int set_or_clear)
+static void zfcp_erp_rports_del(struct zfcp_adapter *adapter)
{
struct zfcp_port *port;
- u32 changed, common_mask = mask & ZFCP_COMMON_FLAGS;
-
- if (set_or_clear == ZFCP_SET) {
- changed = atomic_test_and_set_mask(mask, &adapter->status);
- } else {
- changed = atomic_test_and_clear_mask(mask, &adapter->status);
- if (mask & ZFCP_STATUS_COMMON_ERP_FAILED)
- atomic_set(&adapter->erp_counter, 0);
- }
- if (changed)
- zfcp_rec_dbf_event_adapter(id, ref, adapter);
-
- /* Deal with all underlying devices, only pass common_mask */
- if (common_mask)
- list_for_each_entry(port, &adapter->port_list_head, list)
- zfcp_erp_modify_port_status(port, id, ref, common_mask,
- set_or_clear);
-}
-
-/*
- * function: zfcp_erp_modify_port_status
- *
- * purpose: sets the port and all underlying devices to ERP_FAILED
- *
- */
-void zfcp_erp_modify_port_status(struct zfcp_port *port, u8 id, void *ref,
- u32 mask, int set_or_clear)
-{
- struct zfcp_unit *unit;
- u32 changed, common_mask = mask & ZFCP_COMMON_FLAGS;
-
- if (set_or_clear == ZFCP_SET) {
- changed = atomic_test_and_set_mask(mask, &port->status);
- } else {
- changed = atomic_test_and_clear_mask(mask, &port->status);
- if (mask & ZFCP_STATUS_COMMON_ERP_FAILED)
- atomic_set(&port->erp_counter, 0);
- }
- if (changed)
- zfcp_rec_dbf_event_port(id, ref, port);
-
- /* Modify status of all underlying devices, only pass common mask */
- if (common_mask)
- list_for_each_entry(unit, &port->unit_list_head, list)
- zfcp_erp_modify_unit_status(unit, id, ref, common_mask,
- set_or_clear);
-}
-
-/*
- * function: zfcp_erp_modify_unit_status
- *
- * purpose: sets the unit to ERP_FAILED
- *
- */
-void zfcp_erp_modify_unit_status(struct zfcp_unit *unit, u8 id, void *ref,
- u32 mask, int set_or_clear)
-{
- u32 changed;
-
- if (set_or_clear == ZFCP_SET) {
- changed = atomic_test_and_set_mask(mask, &unit->status);
- } else {
- changed = atomic_test_and_clear_mask(mask, &unit->status);
- if (mask & ZFCP_STATUS_COMMON_ERP_FAILED) {
- atomic_set(&unit->erp_counter, 0);
- }
- }
- if (changed)
- zfcp_rec_dbf_event_unit(id, ref, unit);
-}
-
-/*
- * function:
- *
- * purpose: Wrappper for zfcp_erp_port_reopen_all_internal
- * used to ensure the correct locking
- *
- * returns: 0 - initiated action successfully
- * <0 - failed to initiate action
- */
-int zfcp_erp_port_reopen_all(struct zfcp_adapter *adapter, int clear_mask,
- u8 id, void *ref)
-{
- int retval;
- unsigned long flags;
-
- read_lock_irqsave(&zfcp_data.config_lock, flags);
- write_lock(&adapter->erp_lock);
- retval = zfcp_erp_port_reopen_all_internal(adapter, clear_mask, id,
- ref);
- write_unlock(&adapter->erp_lock);
- read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- return retval;
-}
-
-static int zfcp_erp_port_reopen_all_internal(struct zfcp_adapter *adapter,
- int clear_mask, u8 id, void *ref)
-{
- int retval = 0;
- struct zfcp_port *port;
-
list_for_each_entry(port, &adapter->port_list_head, list)
- if (!atomic_test_mask(ZFCP_STATUS_PORT_WKA, &port->status))
- zfcp_erp_port_reopen_internal(port, clear_mask, id,
- ref);
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: FIXME
- */
-static int zfcp_erp_unit_reopen_all_internal(struct zfcp_port *port,
- int clear_mask, u8 id, void *ref)
-{
- int retval = 0;
- struct zfcp_unit *unit;
-
- list_for_each_entry(unit, &port->unit_list_head, list)
- zfcp_erp_unit_reopen_internal(unit, clear_mask, id, ref);
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose: this routine executes the 'Reopen Adapter' action
- * (the entire action is processed synchronously, since
- * there are no actions which might be run concurrently
- * per definition)
- *
- * returns: ZFCP_ERP_SUCCEEDED - action finished successfully
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_adapter_strategy(struct zfcp_erp_action *erp_action)
-{
- int retval;
- struct zfcp_adapter *adapter = erp_action->adapter;
-
- retval = zfcp_erp_adapter_strategy_close(erp_action);
- if (erp_action->status & ZFCP_STATUS_ERP_CLOSE_ONLY)
- retval = ZFCP_ERP_EXIT;
- else
- retval = zfcp_erp_adapter_strategy_open(erp_action);
-
- if (retval == ZFCP_ERP_FAILED) {
- ZFCP_LOG_INFO("Waiting to allow the adapter %s "
- "to recover itself\n",
- zfcp_get_busid_by_adapter(adapter));
- ssleep(ZFCP_TYPE2_RECOVERY_TIME);
- }
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_SUCCEEDED - action finished successfully
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_adapter_strategy_close(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- atomic_set_mask(ZFCP_STATUS_COMMON_CLOSING,
- &erp_action->adapter->status);
- retval = zfcp_erp_adapter_strategy_generic(erp_action, 1);
- atomic_clear_mask(ZFCP_STATUS_COMMON_CLOSING,
- &erp_action->adapter->status);
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_SUCCEEDED - action finished successfully
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_adapter_strategy_open(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- atomic_set_mask(ZFCP_STATUS_COMMON_OPENING,
- &erp_action->adapter->status);
- retval = zfcp_erp_adapter_strategy_generic(erp_action, 0);
- atomic_clear_mask(ZFCP_STATUS_COMMON_OPENING,
- &erp_action->adapter->status);
-
- return retval;
-}
-
-/*
- * function: zfcp_register_adapter
- *
- * purpose: allocate the irq associated with this devno and register
- * the FSF adapter with the SCSI stack
- *
- * returns:
- */
-static int
-zfcp_erp_adapter_strategy_generic(struct zfcp_erp_action *erp_action, int close)
-{
- int retval = ZFCP_ERP_SUCCEEDED;
-
- if (close)
- goto close_only;
-
- retval = zfcp_erp_adapter_strategy_open_qdio(erp_action);
- if (retval != ZFCP_ERP_SUCCEEDED)
- goto failed_qdio;
-
- retval = zfcp_erp_adapter_strategy_open_fsf(erp_action);
- if (retval != ZFCP_ERP_SUCCEEDED)
- goto failed_openfcp;
-
- atomic_set_mask(ZFCP_STATUS_COMMON_OPEN, &erp_action->adapter->status);
- goto out;
-
- close_only:
- atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN,
- &erp_action->adapter->status);
-
- failed_openfcp:
- zfcp_close_fsf(erp_action->adapter);
- failed_qdio:
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK |
- ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED |
- ZFCP_STATUS_ADAPTER_XPORT_OK,
- &erp_action->adapter->status);
- out:
- return retval;
-}
-
-/*
- * function: zfcp_qdio_init
- *
- * purpose: setup QDIO operation for specified adapter
- *
- * returns: 0 - successful setup
- * !0 - failed setup
- */
-static int
-zfcp_erp_adapter_strategy_open_qdio(struct zfcp_erp_action *erp_action)
-{
- int retval;
- int i;
- volatile struct qdio_buffer_element *sbale;
- struct zfcp_adapter *adapter = erp_action->adapter;
-
- if (atomic_test_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status)) {
- ZFCP_LOG_NORMAL("bug: second attempt to set up QDIO on "
- "adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- goto failed_sanity;
- }
-
- if (qdio_establish(&adapter->qdio_init_data) != 0) {
- ZFCP_LOG_INFO("error: establishment of QDIO queues failed "
- "on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- goto failed_qdio_establish;
- }
-
- if (qdio_activate(adapter->ccw_device, 0) != 0) {
- ZFCP_LOG_INFO("error: activation of QDIO queues failed "
- "on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- goto failed_qdio_activate;
- }
-
- /*
- * put buffers into response queue,
- */
- for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; i++) {
- sbale = &(adapter->response_queue.buffer[i]->element[0]);
- sbale->length = 0;
- sbale->flags = SBAL_FLAGS_LAST_ENTRY;
- sbale->addr = NULL;
- }
-
- ZFCP_LOG_TRACE("calling do_QDIO on adapter %s (flags=0x%x, "
- "queue_no=%i, index_in_queue=%i, count=%i)\n",
- zfcp_get_busid_by_adapter(adapter),
- QDIO_FLAG_SYNC_INPUT, 0, 0, QDIO_MAX_BUFFERS_PER_Q);
-
- retval = do_QDIO(adapter->ccw_device,
- QDIO_FLAG_SYNC_INPUT,
- 0, 0, QDIO_MAX_BUFFERS_PER_Q, NULL);
-
- if (retval) {
- ZFCP_LOG_NORMAL("bug: setup of QDIO failed (retval=%d)\n",
- retval);
- goto failed_do_qdio;
- } else {
- adapter->response_queue.free_index = 0;
- atomic_set(&adapter->response_queue.free_count, 0);
- ZFCP_LOG_DEBUG("%i buffers successfully enqueued to "
- "response queue\n", QDIO_MAX_BUFFERS_PER_Q);
- }
- /* set index of first avalable SBALS / number of available SBALS */
- adapter->request_queue.free_index = 0;
- atomic_set(&adapter->request_queue.free_count, QDIO_MAX_BUFFERS_PER_Q);
- adapter->request_queue.distance_from_int = 0;
-
- /* initialize waitqueue used to wait for free SBALs in requests queue */
- init_waitqueue_head(&adapter->request_wq);
-
- /* ok, we did it - skip all cleanups for different failures */
- atomic_set_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status);
- retval = ZFCP_ERP_SUCCEEDED;
- goto out;
-
- failed_do_qdio:
- /* NOP */
-
- failed_qdio_activate:
- while (qdio_shutdown(adapter->ccw_device,
- QDIO_FLAG_CLEANUP_USING_CLEAR) == -EINPROGRESS)
- ssleep(1);
-
- failed_qdio_establish:
- failed_sanity:
- retval = ZFCP_ERP_FAILED;
-
- out:
- return retval;
-}
-
-
-static int
-zfcp_erp_adapter_strategy_open_fsf(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- retval = zfcp_erp_adapter_strategy_open_fsf_xconfig(erp_action);
- if (retval == ZFCP_ERP_FAILED)
- return ZFCP_ERP_FAILED;
-
- retval = zfcp_erp_adapter_strategy_open_fsf_xport(erp_action);
- if (retval == ZFCP_ERP_FAILED)
- return ZFCP_ERP_FAILED;
-
- return zfcp_erp_adapter_strategy_open_fsf_statusread(erp_action);
-}
-
-static int
-zfcp_erp_adapter_strategy_open_fsf_xconfig(struct zfcp_erp_action *erp_action)
-{
- int retval = ZFCP_ERP_SUCCEEDED;
- int retries;
- int sleep = ZFCP_EXCHANGE_CONFIG_DATA_FIRST_SLEEP;
- struct zfcp_adapter *adapter = erp_action->adapter;
-
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK, &adapter->status);
-
- for (retries = ZFCP_EXCHANGE_CONFIG_DATA_RETRIES; retries; retries--) {
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
- &adapter->status);
- ZFCP_LOG_DEBUG("Doing exchange config data\n");
- write_lock_irq(&adapter->erp_lock);
- zfcp_erp_action_to_running(erp_action);
- write_unlock_irq(&adapter->erp_lock);
- if (zfcp_fsf_exchange_config_data(erp_action)) {
- retval = ZFCP_ERP_FAILED;
- ZFCP_LOG_INFO("error: initiation of exchange of "
- "configuration data failed for "
- "adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
+ if (port->rport && !(atomic_read(&port->status) &
+ ZFCP_STATUS_PORT_WKA)) {
+ fc_remote_port_delete(port->rport);
+ port->rport = NULL;
}
- ZFCP_LOG_DEBUG("Xchange underway\n");
-
- /*
- * Why this works:
- * Both the normal completion handler as well as the timeout
- * handler will do an 'up' when the 'exchange config data'
- * request completes or times out. Thus, the signal to go on
- * won't be lost utilizing this semaphore.
- * Furthermore, this 'adapter_reopen' action is
- * guaranteed to be the only action being there (highest action
- * which prevents other actions from being created).
- * Resulting from that, the wake signal recognized here
- * _must_ be the one belonging to the 'exchange config
- * data' request.
- */
- zfcp_rec_dbf_event_thread(6, adapter, 1);
- down(&adapter->erp_ready_sem);
- zfcp_rec_dbf_event_thread(7, adapter, 1);
- if (erp_action->status & ZFCP_STATUS_ERP_TIMEDOUT) {
- ZFCP_LOG_INFO("error: exchange of configuration data "
- "for adapter %s timed out\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
- }
-
- if (!atomic_test_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
- &adapter->status))
- break;
-
- ZFCP_LOG_DEBUG("host connection still initialising... "
- "waiting and retrying...\n");
- /* sleep a little bit before retry */
- ssleep(sleep);
- sleep *= 2;
- }
-
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
- &adapter->status);
-
- if (!atomic_test_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK,
- &adapter->status)) {
- ZFCP_LOG_INFO("error: exchange of configuration data for "
- "adapter %s failed\n",
- zfcp_get_busid_by_adapter(adapter));
- retval = ZFCP_ERP_FAILED;
- }
-
- return retval;
}
-static int
-zfcp_erp_adapter_strategy_open_fsf_xport(struct zfcp_erp_action *erp_action)
+static void zfcp_erp_action_cleanup(struct zfcp_erp_action *act, int result)
{
- int ret;
- struct zfcp_adapter *adapter;
+ struct zfcp_adapter *adapter = act->adapter;
+ struct zfcp_port *port = act->port;
+ struct zfcp_unit *unit = act->unit;
- adapter = erp_action->adapter;
- atomic_clear_mask(ZFCP_STATUS_ADAPTER_XPORT_OK, &adapter->status);
-
- write_lock_irq(&adapter->erp_lock);
- zfcp_erp_action_to_running(erp_action);
- write_unlock_irq(&adapter->erp_lock);
-
- ret = zfcp_fsf_exchange_port_data(erp_action);
- if (ret == -EOPNOTSUPP) {
- return ZFCP_ERP_SUCCEEDED;
- } else if (ret) {
- return ZFCP_ERP_FAILED;
- }
-
- ret = ZFCP_ERP_SUCCEEDED;
- zfcp_rec_dbf_event_thread(8, adapter, 1);
- down(&adapter->erp_ready_sem);
- zfcp_rec_dbf_event_thread(9, adapter, 1);
- if (erp_action->status & ZFCP_STATUS_ERP_TIMEDOUT) {
- ZFCP_LOG_INFO("error: exchange port data timed out (adapter "
- "%s)\n", zfcp_get_busid_by_adapter(adapter));
- ret = ZFCP_ERP_FAILED;
- }
-
- /* don't treat as error for the sake of compatibility */
- if (!atomic_test_mask(ZFCP_STATUS_ADAPTER_XPORT_OK, &adapter->status))
- ZFCP_LOG_INFO("warning: exchange port data failed (adapter "
- "%s\n", zfcp_get_busid_by_adapter(adapter));
-
- return ret;
-}
-
-static int
-zfcp_erp_adapter_strategy_open_fsf_statusread(struct zfcp_erp_action
- *erp_action)
-{
- int retval = ZFCP_ERP_SUCCEEDED;
- int temp_ret;
- struct zfcp_adapter *adapter = erp_action->adapter;
- int i;
-
- adapter->status_read_failed = 0;
- for (i = 0; i < ZFCP_STATUS_READS_RECOM; i++) {
- temp_ret = zfcp_fsf_status_read(adapter, ZFCP_WAIT_FOR_SBAL);
- if (temp_ret < 0) {
- ZFCP_LOG_INFO("error: set-up of unsolicited status "
- "notification failed on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- retval = ZFCP_ERP_FAILED;
- i--;
- break;
- }
- }
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose: this routine executes the 'Reopen Physical Port' action
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_SUCCEEDED - action finished successfully
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_port_forced_strategy(struct zfcp_erp_action *erp_action)
-{
- int retval = ZFCP_ERP_FAILED;
- struct zfcp_port *port = erp_action->port;
-
- switch (erp_action->step) {
-
- /*
- * FIXME:
- * the ULP spec. begs for waiting for oustanding commands
- */
- case ZFCP_ERP_STEP_UNINITIALIZED:
- zfcp_erp_port_strategy_clearstati(port);
- /*
- * it would be sufficient to test only the normal open flag
- * since the phys. open flag cannot be set if the normal
- * open flag is unset - however, this is for readabilty ...
- */
- if (atomic_test_mask((ZFCP_STATUS_PORT_PHYS_OPEN |
- ZFCP_STATUS_COMMON_OPEN),
- &port->status)) {
- ZFCP_LOG_DEBUG("port 0x%016Lx is open -> trying "
- "close physical\n", port->wwpn);
- retval =
- zfcp_erp_port_forced_strategy_close(erp_action);
- } else
- retval = ZFCP_ERP_FAILED;
- break;
-
- case ZFCP_ERP_STEP_PHYS_PORT_CLOSING:
- if (atomic_test_mask(ZFCP_STATUS_PORT_PHYS_OPEN,
- &port->status)) {
- ZFCP_LOG_DEBUG("close physical failed for port "
- "0x%016Lx\n", port->wwpn);
- retval = ZFCP_ERP_FAILED;
- } else
- retval = ZFCP_ERP_SUCCEEDED;
- break;
- }
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose: this routine executes the 'Reopen Port' action
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_SUCCEEDED - action finished successfully
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_port_strategy(struct zfcp_erp_action *erp_action)
-{
- int retval = ZFCP_ERP_FAILED;
- struct zfcp_port *port = erp_action->port;
-
- switch (erp_action->step) {
-
- /*
- * FIXME:
- * the ULP spec. begs for waiting for oustanding commands
- */
- case ZFCP_ERP_STEP_UNINITIALIZED:
- zfcp_erp_port_strategy_clearstati(port);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_OPEN, &port->status)) {
- ZFCP_LOG_DEBUG("port 0x%016Lx is open -> trying "
- "close\n", port->wwpn);
- retval = zfcp_erp_port_strategy_close(erp_action);
- goto out;
- } /* else it's already closed, open it */
- break;
-
- case ZFCP_ERP_STEP_PORT_CLOSING:
- if (atomic_test_mask(ZFCP_STATUS_COMMON_OPEN, &port->status)) {
- ZFCP_LOG_DEBUG("close failed for port 0x%016Lx\n",
- port->wwpn);
- retval = ZFCP_ERP_FAILED;
- goto out;
- } /* else it's closed now, open it */
- break;
- }
- if (erp_action->status & ZFCP_STATUS_ERP_CLOSE_ONLY)
- retval = ZFCP_ERP_EXIT;
- else
- retval = zfcp_erp_port_strategy_open(erp_action);
-
- out:
- return retval;
-}
-
-static int
-zfcp_erp_port_strategy_open(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- if (atomic_test_mask(ZFCP_STATUS_PORT_WKA,
- &erp_action->port->status))
- retval = zfcp_erp_port_strategy_open_nameserver(erp_action);
- else
- retval = zfcp_erp_port_strategy_open_common(erp_action);
-
- return retval;
-}
-
-static int
-zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *erp_action)
-{
- int retval = 0;
- struct zfcp_adapter *adapter = erp_action->adapter;
- struct zfcp_port *port = erp_action->port;
-
- switch (erp_action->step) {
-
- case ZFCP_ERP_STEP_UNINITIALIZED:
- case ZFCP_ERP_STEP_PHYS_PORT_CLOSING:
- case ZFCP_ERP_STEP_PORT_CLOSING:
- if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP) {
- if (port->wwpn != adapter->peer_wwpn) {
- ZFCP_LOG_NORMAL("Failed to open port 0x%016Lx "
- "on adapter %s.\nPeer WWPN "
- "0x%016Lx does not match\n",
- port->wwpn,
- zfcp_get_busid_by_adapter(adapter),
- adapter->peer_wwpn);
- zfcp_erp_port_failed(port, 25, NULL);
- retval = ZFCP_ERP_FAILED;
- break;
- }
- port->d_id = adapter->peer_d_id;
- atomic_set_mask(ZFCP_STATUS_PORT_DID_DID, &port->status);
- retval = zfcp_erp_port_strategy_open_port(erp_action);
- break;
- }
- if (!(adapter->nameserver_port)) {
- retval = zfcp_nameserver_enqueue(adapter);
- if (retval != 0) {
- ZFCP_LOG_NORMAL("error: nameserver port "
- "unavailable for adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- retval = ZFCP_ERP_FAILED;
- break;
- }
- }
- if (!atomic_test_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
- &adapter->nameserver_port->status)) {
- ZFCP_LOG_DEBUG("nameserver port is not open -> open "
- "nameserver port\n");
- /* nameserver port may live again */
- atomic_set_mask(ZFCP_STATUS_COMMON_RUNNING,
- &adapter->nameserver_port->status);
- if (zfcp_erp_port_reopen(adapter->nameserver_port, 0,
- 77, erp_action) >= 0) {
- erp_action->step =
- ZFCP_ERP_STEP_NAMESERVER_OPEN;
- retval = ZFCP_ERP_CONTINUES;
- } else
- retval = ZFCP_ERP_FAILED;
- break;
- }
- /* else nameserver port is already open, fall through */
- case ZFCP_ERP_STEP_NAMESERVER_OPEN:
- if (!atomic_test_mask(ZFCP_STATUS_COMMON_OPEN,
- &adapter->nameserver_port->status)) {
- ZFCP_LOG_DEBUG("open failed for nameserver port\n");
- retval = ZFCP_ERP_FAILED;
- } else {
- ZFCP_LOG_DEBUG("nameserver port is open -> "
- "nameserver look-up for port 0x%016Lx\n",
- port->wwpn);
- retval = zfcp_erp_port_strategy_open_common_lookup
- (erp_action);
- }
- break;
-
- case ZFCP_ERP_STEP_NAMESERVER_LOOKUP:
- if (!atomic_test_mask(ZFCP_STATUS_PORT_DID_DID, &port->status)) {
- if (atomic_test_mask
- (ZFCP_STATUS_PORT_INVALID_WWPN, &port->status)) {
- ZFCP_LOG_DEBUG("nameserver look-up failed "
- "for port 0x%016Lx "
- "(misconfigured WWPN?)\n",
- port->wwpn);
- zfcp_erp_port_failed(port, 26, NULL);
- retval = ZFCP_ERP_EXIT;
- } else {
- ZFCP_LOG_DEBUG("nameserver look-up failed for "
- "port 0x%016Lx\n", port->wwpn);
- retval = ZFCP_ERP_FAILED;
- }
- } else {
- ZFCP_LOG_DEBUG("port 0x%016Lx has d_id=0x%06x -> "
- "trying open\n", port->wwpn, port->d_id);
- retval = zfcp_erp_port_strategy_open_port(erp_action);
- }
- break;
-
- case ZFCP_ERP_STEP_PORT_OPENING:
- /* D_ID might have changed during open */
- if (atomic_test_mask((ZFCP_STATUS_COMMON_OPEN |
- ZFCP_STATUS_PORT_DID_DID),
- &port->status)) {
- ZFCP_LOG_DEBUG("port 0x%016Lx is open\n", port->wwpn);
- retval = ZFCP_ERP_SUCCEEDED;
- } else {
- ZFCP_LOG_DEBUG("open failed for port 0x%016Lx\n",
- port->wwpn);
- retval = ZFCP_ERP_FAILED;
- }
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: unknown erp step 0x%08x\n",
- erp_action->step);
- retval = ZFCP_ERP_FAILED;
- }
-
- return retval;
-}
-
-static int
-zfcp_erp_port_strategy_open_nameserver(struct zfcp_erp_action *erp_action)
-{
- int retval;
- struct zfcp_port *port = erp_action->port;
-
- switch (erp_action->step) {
-
- case ZFCP_ERP_STEP_UNINITIALIZED:
- case ZFCP_ERP_STEP_PHYS_PORT_CLOSING:
- case ZFCP_ERP_STEP_PORT_CLOSING:
- ZFCP_LOG_DEBUG("port 0x%016Lx has d_id=0x%06x -> trying open\n",
- port->wwpn, port->d_id);
- retval = zfcp_erp_port_strategy_open_port(erp_action);
- break;
-
- case ZFCP_ERP_STEP_PORT_OPENING:
- if (atomic_test_mask(ZFCP_STATUS_COMMON_OPEN, &port->status)) {
- ZFCP_LOG_DEBUG("WKA port is open\n");
- retval = ZFCP_ERP_SUCCEEDED;
- } else {
- ZFCP_LOG_DEBUG("open failed for WKA port\n");
- retval = ZFCP_ERP_FAILED;
- }
- /* this is needed anyway (dont care for retval of wakeup) */
- ZFCP_LOG_DEBUG("continue other open port operations\n");
- zfcp_erp_port_strategy_open_nameserver_wakeup(erp_action);
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: unknown erp step 0x%08x\n",
- erp_action->step);
- retval = ZFCP_ERP_FAILED;
- }
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose: makes the erp thread continue with reopen (physical) port
- * actions which have been paused until the name server port
- * is opened (or failed)
- *
- * returns: 0 (a kind of void retval, its not used)
- */
-static int
-zfcp_erp_port_strategy_open_nameserver_wakeup(struct zfcp_erp_action
- *ns_erp_action)
-{
- int retval = 0;
- unsigned long flags;
- struct zfcp_adapter *adapter = ns_erp_action->adapter;
- struct zfcp_erp_action *erp_action, *tmp;
-
- read_lock_irqsave(&adapter->erp_lock, flags);
- list_for_each_entry_safe(erp_action, tmp, &adapter->erp_running_head,
- list) {
- if (erp_action->step == ZFCP_ERP_STEP_NAMESERVER_OPEN) {
- if (atomic_test_mask(
- ZFCP_STATUS_COMMON_ERP_FAILED,
- &adapter->nameserver_port->status))
- zfcp_erp_port_failed(erp_action->port, 27,
- NULL);
- zfcp_erp_action_ready(erp_action);
- }
- }
- read_unlock_irqrestore(&adapter->erp_lock, flags);
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_port_forced_strategy_close(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- retval = zfcp_fsf_close_physical_port(erp_action);
- if (retval == -ENOMEM) {
- retval = ZFCP_ERP_NOMEM;
- goto out;
- }
- erp_action->step = ZFCP_ERP_STEP_PHYS_PORT_CLOSING;
- if (retval != 0) {
- /* could not send 'open', fail */
- retval = ZFCP_ERP_FAILED;
- goto out;
- }
- retval = ZFCP_ERP_CONTINUES;
- out:
- return retval;
-}
-
-static int
-zfcp_erp_port_strategy_clearstati(struct zfcp_port *port)
-{
- int retval = 0;
-
- atomic_clear_mask(ZFCP_STATUS_COMMON_OPENING |
- ZFCP_STATUS_COMMON_CLOSING |
- ZFCP_STATUS_COMMON_ACCESS_DENIED |
- ZFCP_STATUS_PORT_DID_DID |
- ZFCP_STATUS_PORT_PHYS_CLOSING |
- ZFCP_STATUS_PORT_INVALID_WWPN,
- &port->status);
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_port_strategy_close(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- retval = zfcp_fsf_close_port(erp_action);
- if (retval == -ENOMEM) {
- retval = ZFCP_ERP_NOMEM;
- goto out;
- }
- erp_action->step = ZFCP_ERP_STEP_PORT_CLOSING;
- if (retval != 0) {
- /* could not send 'close', fail */
- retval = ZFCP_ERP_FAILED;
- goto out;
- }
- retval = ZFCP_ERP_CONTINUES;
- out:
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_port_strategy_open_port(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- retval = zfcp_fsf_open_port(erp_action);
- if (retval == -ENOMEM) {
- retval = ZFCP_ERP_NOMEM;
- goto out;
- }
- erp_action->step = ZFCP_ERP_STEP_PORT_OPENING;
- if (retval != 0) {
- /* could not send 'open', fail */
- retval = ZFCP_ERP_FAILED;
- goto out;
- }
- retval = ZFCP_ERP_CONTINUES;
- out:
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_port_strategy_open_common_lookup(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- retval = zfcp_ns_gid_pn_request(erp_action);
- if (retval == -ENOMEM) {
- retval = ZFCP_ERP_NOMEM;
- goto out;
- }
- erp_action->step = ZFCP_ERP_STEP_NAMESERVER_LOOKUP;
- if (retval != 0) {
- /* could not send nameserver request, fail */
- retval = ZFCP_ERP_FAILED;
- goto out;
- }
- retval = ZFCP_ERP_CONTINUES;
- out:
- return retval;
-}
-
-/*
- * function:
- *
- * purpose: this routine executes the 'Reopen Unit' action
- * currently no retries
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_SUCCEEDED - action finished successfully
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_unit_strategy(struct zfcp_erp_action *erp_action)
-{
- int retval = ZFCP_ERP_FAILED;
- struct zfcp_unit *unit = erp_action->unit;
-
- switch (erp_action->step) {
-
- /*
- * FIXME:
- * the ULP spec. begs for waiting for oustanding commands
- */
- case ZFCP_ERP_STEP_UNINITIALIZED:
- zfcp_erp_unit_strategy_clearstati(unit);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_OPEN, &unit->status)) {
- ZFCP_LOG_DEBUG("unit 0x%016Lx is open -> "
- "trying close\n", unit->fcp_lun);
- retval = zfcp_erp_unit_strategy_close(erp_action);
- break;
- }
- /* else it's already closed, fall through */
- case ZFCP_ERP_STEP_UNIT_CLOSING:
- if (atomic_test_mask(ZFCP_STATUS_COMMON_OPEN, &unit->status)) {
- ZFCP_LOG_DEBUG("close failed for unit 0x%016Lx\n",
- unit->fcp_lun);
- retval = ZFCP_ERP_FAILED;
- } else {
- if (erp_action->status & ZFCP_STATUS_ERP_CLOSE_ONLY)
- retval = ZFCP_ERP_EXIT;
- else {
- ZFCP_LOG_DEBUG("unit 0x%016Lx is not open -> "
- "trying open\n", unit->fcp_lun);
- retval =
- zfcp_erp_unit_strategy_open(erp_action);
- }
- }
- break;
-
- case ZFCP_ERP_STEP_UNIT_OPENING:
- if (atomic_test_mask(ZFCP_STATUS_COMMON_OPEN, &unit->status)) {
- ZFCP_LOG_DEBUG("unit 0x%016Lx is open\n",
- unit->fcp_lun);
- retval = ZFCP_ERP_SUCCEEDED;
- } else {
- ZFCP_LOG_DEBUG("open failed for unit 0x%016Lx\n",
- unit->fcp_lun);
- retval = ZFCP_ERP_FAILED;
- }
- break;
- }
-
- return retval;
-}
-
-static int
-zfcp_erp_unit_strategy_clearstati(struct zfcp_unit *unit)
-{
- int retval = 0;
-
- atomic_clear_mask(ZFCP_STATUS_COMMON_OPENING |
- ZFCP_STATUS_COMMON_CLOSING |
- ZFCP_STATUS_COMMON_ACCESS_DENIED |
- ZFCP_STATUS_UNIT_SHARED |
- ZFCP_STATUS_UNIT_READONLY,
- &unit->status);
-
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_unit_strategy_close(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- retval = zfcp_fsf_close_unit(erp_action);
- if (retval == -ENOMEM) {
- retval = ZFCP_ERP_NOMEM;
- goto out;
- }
- erp_action->step = ZFCP_ERP_STEP_UNIT_CLOSING;
- if (retval != 0) {
- /* could not send 'close', fail */
- retval = ZFCP_ERP_FAILED;
- goto out;
- }
- retval = ZFCP_ERP_CONTINUES;
-
- out:
- return retval;
-}
-
-/*
- * function:
- *
- * purpose:
- *
- * returns: ZFCP_ERP_CONTINUES - action continues (asynchronously)
- * ZFCP_ERP_FAILED - action finished unsuccessfully
- */
-static int
-zfcp_erp_unit_strategy_open(struct zfcp_erp_action *erp_action)
-{
- int retval;
-
- retval = zfcp_fsf_open_unit(erp_action);
- if (retval == -ENOMEM) {
- retval = ZFCP_ERP_NOMEM;
- goto out;
- }
- erp_action->step = ZFCP_ERP_STEP_UNIT_OPENING;
- if (retval != 0) {
- /* could not send 'open', fail */
- retval = ZFCP_ERP_FAILED;
- goto out;
- }
- retval = ZFCP_ERP_CONTINUES;
- out:
- return retval;
-}
-
-void zfcp_erp_start_timer(struct zfcp_fsf_req *fsf_req)
-{
- BUG_ON(!fsf_req->erp_action);
- fsf_req->timer.function = zfcp_erp_timeout_handler;
- fsf_req->timer.data = (unsigned long) fsf_req->erp_action;
- fsf_req->timer.expires = jiffies + ZFCP_ERP_FSFREQ_TIMEOUT;
- add_timer(&fsf_req->timer);
-}
-
-/*
- * function:
- *
- * purpose: enqueue the specified error recovery action, if needed
- *
- * returns:
- */
-static int zfcp_erp_action_enqueue(int want, struct zfcp_adapter *adapter,
- struct zfcp_port *port,
- struct zfcp_unit *unit, u8 id, void *ref)
-{
- int retval = 1, need = want;
- struct zfcp_erp_action *erp_action = NULL;
- u32 status = 0;
-
- /*
- * We need some rules here which check whether we really need
- * this action or whether we should just drop it.
- * E.g. if there is a unfinished 'Reopen Port' request then we drop a
- * 'Reopen Unit' request for an associated unit since we can't
- * satisfy this request now. A 'Reopen Port' action will trigger
- * 'Reopen Unit' actions when it completes.
- * Thus, there are only actions in the queue which can immediately be
- * executed. This makes the processing of the action queue more
- * efficient.
- */
-
- if (!atomic_test_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP,
- &adapter->status))
- return -EIO;
-
- /* check whether we really need this */
- switch (want) {
+ switch (act->action) {
case ZFCP_ERP_ACTION_REOPEN_UNIT:
- if (atomic_test_mask
- (ZFCP_STATUS_COMMON_ERP_INUSE, &unit->status)) {
- goto out;
- }
- if (!atomic_test_mask
- (ZFCP_STATUS_COMMON_RUNNING, &port->status) ||
- atomic_test_mask
- (ZFCP_STATUS_COMMON_ERP_FAILED, &port->status)) {
- goto out;
- }
- if (!atomic_test_mask
- (ZFCP_STATUS_COMMON_UNBLOCKED, &port->status))
- need = ZFCP_ERP_ACTION_REOPEN_PORT;
- /* fall through !!! */
-
- case ZFCP_ERP_ACTION_REOPEN_PORT:
- if (atomic_test_mask
- (ZFCP_STATUS_COMMON_ERP_INUSE, &port->status)) {
- goto out;
- }
- /* fall through !!! */
-
- case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_INUSE,
- &port->status)) {
- if (port->erp_action.action !=
- ZFCP_ERP_ACTION_REOPEN_PORT_FORCED) {
- ZFCP_LOG_INFO("dropped erp action %i (port "
- "0x%016Lx, action in use: %i)\n",
- want, port->wwpn,
- port->erp_action.action);
- }
- goto out;
- }
- if (!atomic_test_mask
- (ZFCP_STATUS_COMMON_RUNNING, &adapter->status) ||
- atomic_test_mask
- (ZFCP_STATUS_COMMON_ERP_FAILED, &adapter->status)) {
- goto out;
- }
- if (!atomic_test_mask
- (ZFCP_STATUS_COMMON_UNBLOCKED, &adapter->status))
- need = ZFCP_ERP_ACTION_REOPEN_ADAPTER;
- /* fall through !!! */
-
- case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
- if (atomic_test_mask
- (ZFCP_STATUS_COMMON_ERP_INUSE, &adapter->status)) {
- goto out;
- }
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: unknown erp action requested "
- "on adapter %s (action=%d)\n",
- zfcp_get_busid_by_adapter(adapter), want);
- goto out;
- }
-
- /* check whether we need something stronger first */
- if (need) {
- ZFCP_LOG_DEBUG("stronger erp action %d needed before "
- "erp action %d on adapter %s\n",
- need, want, zfcp_get_busid_by_adapter(adapter));
- }
-
- /* mark adapter to have some error recovery pending */
- atomic_set_mask(ZFCP_STATUS_ADAPTER_ERP_PENDING, &adapter->status);
-
- /* setup error recovery action */
- switch (need) {
-
- case ZFCP_ERP_ACTION_REOPEN_UNIT:
- zfcp_unit_get(unit);
- atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &unit->status);
- erp_action = &unit->erp_action;
- if (!atomic_test_mask
- (ZFCP_STATUS_COMMON_RUNNING, &unit->status))
- status = ZFCP_STATUS_ERP_CLOSE_ONLY;
- break;
-
- case ZFCP_ERP_ACTION_REOPEN_PORT:
- case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
- zfcp_port_get(port);
- zfcp_erp_action_dismiss_port(port);
- atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &port->status);
- erp_action = &port->erp_action;
- if (!atomic_test_mask
- (ZFCP_STATUS_COMMON_RUNNING, &port->status))
- status = ZFCP_STATUS_ERP_CLOSE_ONLY;
- break;
-
- case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
- zfcp_adapter_get(adapter);
- zfcp_erp_action_dismiss_adapter(adapter);
- atomic_set_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &adapter->status);
- erp_action = &adapter->erp_action;
- if (!atomic_test_mask
- (ZFCP_STATUS_COMMON_RUNNING, &adapter->status))
- status = ZFCP_STATUS_ERP_CLOSE_ONLY;
- break;
- }
-
- memset(erp_action, 0, sizeof (struct zfcp_erp_action));
- erp_action->adapter = adapter;
- erp_action->port = port;
- erp_action->unit = unit;
- erp_action->action = need;
- erp_action->status = status;
-
- ++adapter->erp_total_count;
-
- /* finally put it into 'ready' queue and kick erp thread */
- list_add_tail(&erp_action->list, &adapter->erp_ready_head);
- up(&adapter->erp_ready_sem);
- zfcp_rec_dbf_event_thread(1, adapter, 0);
- retval = 0;
- out:
- zfcp_rec_dbf_event_trigger(id, ref, want, need, erp_action,
- adapter, port, unit);
- return retval;
-}
-
-static int
-zfcp_erp_action_dequeue(struct zfcp_erp_action *erp_action)
-{
- int retval = 0;
- struct zfcp_adapter *adapter = erp_action->adapter;
-
- --adapter->erp_total_count;
- if (erp_action->status & ZFCP_STATUS_ERP_LOWMEM) {
- --adapter->erp_low_mem_count;
- erp_action->status &= ~ZFCP_STATUS_ERP_LOWMEM;
- }
-
- list_del(&erp_action->list);
- zfcp_rec_dbf_event_action(144, erp_action);
-
- switch (erp_action->action) {
- case ZFCP_ERP_ACTION_REOPEN_UNIT:
- atomic_clear_mask(ZFCP_STATUS_COMMON_ERP_INUSE,
- &erp_action->unit->status);
- break;
- case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
- case ZFCP_ERP_ACTION_REOPEN_PORT:
- atomic_clear_mask(ZFCP_STATUS_COMMON_ERP_INUSE,
- &erp_action->port->status);
- break;
- case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
- atomic_clear_mask(ZFCP_STATUS_COMMON_ERP_INUSE,
- &erp_action->adapter->status);
- break;
- default:
- /* bug */
- break;
- }
- return retval;
-}
-
-/**
- * zfcp_erp_action_cleanup
- *
- * Register unit with scsi stack if appropriate and fix reference counts.
- * Note: Temporary units are not registered with scsi stack.
- */
-static void
-zfcp_erp_action_cleanup(int action, struct zfcp_adapter *adapter,
- struct zfcp_port *port, struct zfcp_unit *unit,
- int result)
-{
- switch (action) {
- case ZFCP_ERP_ACTION_REOPEN_UNIT:
- if ((result == ZFCP_ERP_SUCCEEDED)
- && (!atomic_test_mask(ZFCP_STATUS_UNIT_TEMPORARY,
- &unit->status))
- && !unit->device
- && port->rport) {
+ if ((result == ZFCP_ERP_SUCCEEDED) &&
+ !unit->device && port->rport) {
atomic_set_mask(ZFCP_STATUS_UNIT_REGISTERED,
&unit->status);
- if (atomic_test_mask(ZFCP_STATUS_UNIT_SCSI_WORK_PENDING,
- &unit->status) == 0)
+ if (!(atomic_read(&unit->status) &
+ ZFCP_STATUS_UNIT_SCSI_WORK_PENDING))
zfcp_erp_schedule_work(unit);
}
zfcp_unit_put(unit);
break;
+
case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
case ZFCP_ERP_ACTION_REOPEN_PORT:
- if (atomic_test_mask(ZFCP_STATUS_PORT_NO_WWPN,
- &port->status)) {
+ if (atomic_read(&port->status) & ZFCP_STATUS_PORT_NO_WWPN) {
zfcp_port_put(port);
- break;
+ return;
}
-
- if ((result == ZFCP_ERP_SUCCEEDED)
- && !port->rport) {
- struct fc_rport_identifiers ids;
- ids.node_name = port->wwnn;
- ids.port_name = port->wwpn;
- ids.port_id = port->d_id;
- ids.roles = FC_RPORT_ROLE_FCP_TARGET;
- port->rport =
- fc_remote_port_add(adapter->scsi_host, 0, &ids);
- if (!port->rport)
- ZFCP_LOG_NORMAL("failed registration of rport"
- "(adapter %s, wwpn=0x%016Lx)\n",
- zfcp_get_busid_by_port(port),
- port->wwpn);
- else {
- scsi_target_unblock(&port->rport->dev);
- port->rport->maxframe_size = port->maxframe_size;
- port->rport->supported_classes =
- port->supported_classes;
- }
- }
+ if ((result == ZFCP_ERP_SUCCEEDED) && !port->rport)
+ zfcp_erp_rport_register(port);
if ((result != ZFCP_ERP_SUCCEEDED) && port->rport) {
fc_remote_port_delete(port->rport);
port->rport = NULL;
}
zfcp_port_put(port);
break;
+
case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
- if (result != ZFCP_ERP_SUCCEEDED) {
- list_for_each_entry(port, &adapter->port_list_head, list)
- if (port->rport &&
- !atomic_test_mask(ZFCP_STATUS_PORT_WKA,
- &port->status)) {
- fc_remote_port_delete(port->rport);
- port->rport = NULL;
- }
- }
+ if (result != ZFCP_ERP_SUCCEEDED)
+ zfcp_erp_rports_del(adapter);
zfcp_adapter_put(adapter);
break;
- default:
- break;
}
}
+static int zfcp_erp_strategy_do_action(struct zfcp_erp_action *erp_action)
+{
+ switch (erp_action->action) {
+ case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
+ return zfcp_erp_adapter_strategy(erp_action);
+ case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
+ return zfcp_erp_port_forced_strategy(erp_action);
+ case ZFCP_ERP_ACTION_REOPEN_PORT:
+ return zfcp_erp_port_strategy(erp_action);
+ case ZFCP_ERP_ACTION_REOPEN_UNIT:
+ return zfcp_erp_unit_strategy(erp_action);
+ }
+ return ZFCP_ERP_FAILED;
+}
-static void zfcp_erp_action_dismiss_adapter(struct zfcp_adapter *adapter)
+static int zfcp_erp_strategy(struct zfcp_erp_action *erp_action)
+{
+ int retval;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+ unsigned long flags;
+
+ read_lock_irqsave(&zfcp_data.config_lock, flags);
+ write_lock(&adapter->erp_lock);
+
+ zfcp_erp_strategy_check_fsfreq(erp_action);
+
+ if (erp_action->status & ZFCP_STATUS_ERP_DISMISSED) {
+ zfcp_erp_action_dequeue(erp_action);
+ retval = ZFCP_ERP_DISMISSED;
+ goto unlock;
+ }
+
+ zfcp_erp_action_to_running(erp_action);
+
+ /* no lock to allow for blocking operations */
+ write_unlock(&adapter->erp_lock);
+ read_unlock_irqrestore(&zfcp_data.config_lock, flags);
+ retval = zfcp_erp_strategy_do_action(erp_action);
+ read_lock_irqsave(&zfcp_data.config_lock, flags);
+ write_lock(&adapter->erp_lock);
+
+ if (erp_action->status & ZFCP_STATUS_ERP_DISMISSED)
+ retval = ZFCP_ERP_CONTINUES;
+
+ switch (retval) {
+ case ZFCP_ERP_NOMEM:
+ if (!(erp_action->status & ZFCP_STATUS_ERP_LOWMEM)) {
+ ++adapter->erp_low_mem_count;
+ erp_action->status |= ZFCP_STATUS_ERP_LOWMEM;
+ }
+ if (adapter->erp_total_count == adapter->erp_low_mem_count)
+ _zfcp_erp_adapter_reopen(adapter, 0, 66, NULL);
+ else {
+ zfcp_erp_strategy_memwait(erp_action);
+ retval = ZFCP_ERP_CONTINUES;
+ }
+ goto unlock;
+
+ case ZFCP_ERP_CONTINUES:
+ if (erp_action->status & ZFCP_STATUS_ERP_LOWMEM) {
+ --adapter->erp_low_mem_count;
+ erp_action->status &= ~ZFCP_STATUS_ERP_LOWMEM;
+ }
+ goto unlock;
+ }
+
+ retval = zfcp_erp_strategy_check_target(erp_action, retval);
+ zfcp_erp_action_dequeue(erp_action);
+ retval = zfcp_erp_strategy_statechange(erp_action, retval);
+ if (retval == ZFCP_ERP_EXIT)
+ goto unlock;
+ zfcp_erp_strategy_followup_actions(erp_action);
+
+ unlock:
+ write_unlock(&adapter->erp_lock);
+ read_unlock_irqrestore(&zfcp_data.config_lock, flags);
+
+ if (retval != ZFCP_ERP_CONTINUES)
+ zfcp_erp_action_cleanup(erp_action, retval);
+
+ return retval;
+}
+
+static int zfcp_erp_thread(void *data)
+{
+ struct zfcp_adapter *adapter = (struct zfcp_adapter *) data;
+ struct list_head *next;
+ struct zfcp_erp_action *act;
+ unsigned long flags;
+
+ daemonize("zfcperp%s", adapter->ccw_device->dev.bus_id);
+ /* Block all signals */
+ siginitsetinv(¤t->blocked, 0);
+ atomic_set_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP, &adapter->status);
+ wake_up(&adapter->erp_thread_wqh);
+
+ while (!(atomic_read(&adapter->status) &
+ ZFCP_STATUS_ADAPTER_ERP_THREAD_KILL)) {
+ write_lock_irqsave(&adapter->erp_lock, flags);
+ next = adapter->erp_ready_head.next;
+ write_unlock_irqrestore(&adapter->erp_lock, flags);
+
+ if (next != &adapter->erp_ready_head) {
+ act = list_entry(next, struct zfcp_erp_action, list);
+
+ /* there is more to come after dismission, no notify */
+ if (zfcp_erp_strategy(act) != ZFCP_ERP_DISMISSED)
+ zfcp_erp_wakeup(adapter);
+ }
+
+ zfcp_rec_dbf_event_thread(4, adapter);
+ down_interruptible(&adapter->erp_ready_sem);
+ zfcp_rec_dbf_event_thread(5, adapter);
+ }
+
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP, &adapter->status);
+ wake_up(&adapter->erp_thread_wqh);
+
+ return 0;
+}
+
+/**
+ * zfcp_erp_thread_setup - Start ERP thread for adapter
+ * @adapter: Adapter to start the ERP thread for
+ *
+ * Returns 0 on success or error code from kernel_thread()
+ */
+int zfcp_erp_thread_setup(struct zfcp_adapter *adapter)
+{
+ int retval;
+
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_UP, &adapter->status);
+ retval = kernel_thread(zfcp_erp_thread, adapter, SIGCHLD);
+ if (retval < 0) {
+ dev_err(&adapter->ccw_device->dev,
+ "Creation of ERP thread failed.\n");
+ return retval;
+ }
+ wait_event(adapter->erp_thread_wqh,
+ atomic_read(&adapter->status) &
+ ZFCP_STATUS_ADAPTER_ERP_THREAD_UP);
+ return 0;
+}
+
+/**
+ * zfcp_erp_thread_kill - Stop ERP thread.
+ * @adapter: Adapter where the ERP thread should be stopped.
+ *
+ * The caller of this routine ensures that the specified adapter has
+ * been shut down and that this operation has been completed. Thus,
+ * there are no pending erp_actions which would need to be handled
+ * here.
+ */
+void zfcp_erp_thread_kill(struct zfcp_adapter *adapter)
+{
+ atomic_set_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_KILL, &adapter->status);
+ up(&adapter->erp_ready_sem);
+ zfcp_rec_dbf_event_thread_lock(2, adapter);
+
+ wait_event(adapter->erp_thread_wqh,
+ !(atomic_read(&adapter->status) &
+ ZFCP_STATUS_ADAPTER_ERP_THREAD_UP));
+
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_ERP_THREAD_KILL,
+ &adapter->status);
+}
+
+/**
+ * zfcp_erp_adapter_failed - Set adapter status to failed.
+ * @adapter: Failed adapter.
+ * @id: Event id for debug trace.
+ * @ref: Reference for debug trace.
+ */
+void zfcp_erp_adapter_failed(struct zfcp_adapter *adapter, u8 id, void *ref)
+{
+ zfcp_erp_modify_adapter_status(adapter, id, ref,
+ ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
+ dev_err(&adapter->ccw_device->dev, "Adapter ERP failed.\n");
+}
+
+/**
+ * zfcp_erp_port_failed - Set port status to failed.
+ * @port: Failed port.
+ * @id: Event id for debug trace.
+ * @ref: Reference for debug trace.
+ */
+void zfcp_erp_port_failed(struct zfcp_port *port, u8 id, void *ref)
+{
+ zfcp_erp_modify_port_status(port, id, ref,
+ ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
+
+ if (atomic_read(&port->status) & ZFCP_STATUS_PORT_WKA)
+ dev_err(&port->adapter->ccw_device->dev,
+ "Port ERP failed for WKA port d_id=0x%06x.\n",
+ port->d_id);
+ else
+ dev_err(&port->adapter->ccw_device->dev,
+ "Port ERP failed for port wwpn=0x%016Lx.\n",
+ port->wwpn);
+}
+
+/**
+ * zfcp_erp_unit_failed - Set unit status to failed.
+ * @unit: Failed unit.
+ * @id: Event id for debug trace.
+ * @ref: Reference for debug trace.
+ */
+void zfcp_erp_unit_failed(struct zfcp_unit *unit, u8 id, void *ref)
+{
+ zfcp_erp_modify_unit_status(unit, id, ref,
+ ZFCP_STATUS_COMMON_ERP_FAILED, ZFCP_SET);
+
+ dev_err(&unit->port->adapter->ccw_device->dev,
+ "Unit ERP failed for unit 0x%016Lx on port 0x%016Lx.\n",
+ unit->fcp_lun, unit->port->wwpn);
+}
+
+/**
+ * zfcp_erp_wait - wait for completion of error recovery on an adapter
+ * @adapter: adapter for which to wait for completion of its error recovery
+ */
+void zfcp_erp_wait(struct zfcp_adapter *adapter)
+{
+ wait_event(adapter->erp_done_wqh,
+ !(atomic_read(&adapter->status) &
+ ZFCP_STATUS_ADAPTER_ERP_PENDING));
+}
+
+/**
+ * zfcp_erp_modify_adapter_status - change adapter status bits
+ * @adapter: adapter to change the status
+ * @id: id for the debug trace
+ * @ref: reference for the debug trace
+ * @mask: status bits to change
+ * @set_or_clear: ZFCP_SET or ZFCP_CLEAR
+ *
+ * Changes in common status bits are propagated to attached ports and units.
+ */
+void zfcp_erp_modify_adapter_status(struct zfcp_adapter *adapter, u8 id,
+ void *ref, u32 mask, int set_or_clear)
{
struct zfcp_port *port;
+ u32 common_mask = mask & ZFCP_COMMON_FLAGS;
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &adapter->status))
- zfcp_erp_action_dismiss(&adapter->erp_action);
- else
+ if (set_or_clear == ZFCP_SET) {
+ if (status_change_set(mask, &adapter->status))
+ zfcp_rec_dbf_event_adapter(id, ref, adapter);
+ atomic_set_mask(mask, &adapter->status);
+ } else {
+ if (status_change_clear(mask, &adapter->status))
+ zfcp_rec_dbf_event_adapter(id, ref, adapter);
+ atomic_clear_mask(mask, &adapter->status);
+ if (mask & ZFCP_STATUS_COMMON_ERP_FAILED)
+ atomic_set(&adapter->erp_counter, 0);
+ }
+
+ if (common_mask)
list_for_each_entry(port, &adapter->port_list_head, list)
- zfcp_erp_action_dismiss_port(port);
+ zfcp_erp_modify_port_status(port, id, ref, common_mask,
+ set_or_clear);
}
-static void zfcp_erp_action_dismiss_port(struct zfcp_port *port)
+/**
+ * zfcp_erp_modify_port_status - change port status bits
+ * @port: port to change the status bits
+ * @id: id for the debug trace
+ * @ref: reference for the debug trace
+ * @mask: status bits to change
+ * @set_or_clear: ZFCP_SET or ZFCP_CLEAR
+ *
+ * Changes in common status bits are propagated to attached units.
+ */
+void zfcp_erp_modify_port_status(struct zfcp_port *port, u8 id, void *ref,
+ u32 mask, int set_or_clear)
{
struct zfcp_unit *unit;
+ u32 common_mask = mask & ZFCP_COMMON_FLAGS;
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &port->status))
- zfcp_erp_action_dismiss(&port->erp_action);
- else
+ if (set_or_clear == ZFCP_SET) {
+ if (status_change_set(mask, &port->status))
+ zfcp_rec_dbf_event_port(id, ref, port);
+ atomic_set_mask(mask, &port->status);
+ } else {
+ if (status_change_clear(mask, &port->status))
+ zfcp_rec_dbf_event_port(id, ref, port);
+ atomic_clear_mask(mask, &port->status);
+ if (mask & ZFCP_STATUS_COMMON_ERP_FAILED)
+ atomic_set(&port->erp_counter, 0);
+ }
+
+ if (common_mask)
list_for_each_entry(unit, &port->unit_list_head, list)
- zfcp_erp_action_dismiss_unit(unit);
+ zfcp_erp_modify_unit_status(unit, id, ref, common_mask,
+ set_or_clear);
}
-static void zfcp_erp_action_dismiss_unit(struct zfcp_unit *unit)
+/**
+ * zfcp_erp_modify_unit_status - change unit status bits
+ * @unit: unit to change the status bits
+ * @id: id for the debug trace
+ * @ref: reference for the debug trace
+ * @mask: status bits to change
+ * @set_or_clear: ZFCP_SET or ZFCP_CLEAR
+ */
+void zfcp_erp_modify_unit_status(struct zfcp_unit *unit, u8 id, void *ref,
+ u32 mask, int set_or_clear)
{
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_INUSE, &unit->status))
- zfcp_erp_action_dismiss(&unit->erp_action);
+ if (set_or_clear == ZFCP_SET) {
+ if (status_change_set(mask, &unit->status))
+ zfcp_rec_dbf_event_unit(id, ref, unit);
+ atomic_set_mask(mask, &unit->status);
+ } else {
+ if (status_change_clear(mask, &unit->status))
+ zfcp_rec_dbf_event_unit(id, ref, unit);
+ atomic_clear_mask(mask, &unit->status);
+ if (mask & ZFCP_STATUS_COMMON_ERP_FAILED) {
+ atomic_set(&unit->erp_counter, 0);
+ }
+ }
}
-static void zfcp_erp_action_to_running(struct zfcp_erp_action *erp_action)
-{
- list_move(&erp_action->list, &erp_action->adapter->erp_running_head);
- zfcp_rec_dbf_event_action(145, erp_action);
-}
-
-static void zfcp_erp_action_to_ready(struct zfcp_erp_action *erp_action)
-{
- list_move(&erp_action->list, &erp_action->adapter->erp_ready_head);
- zfcp_rec_dbf_event_action(146, erp_action);
-}
-
+/**
+ * zfcp_erp_port_boxed - Mark port as "boxed" and start ERP
+ * @port: The "boxed" port.
+ * @id: The debug trace id.
+ * @id: Reference for the debug trace.
+ */
void zfcp_erp_port_boxed(struct zfcp_port *port, u8 id, void *ref)
{
unsigned long flags;
@@ -3065,6 +1687,12 @@
zfcp_erp_port_reopen(port, ZFCP_STATUS_COMMON_ERP_FAILED, id, ref);
}
+/**
+ * zfcp_erp_unit_boxed - Mark unit as "boxed" and start ERP
+ * @port: The "boxed" unit.
+ * @id: The debug trace id.
+ * @id: Reference for the debug trace.
+ */
void zfcp_erp_unit_boxed(struct zfcp_unit *unit, u8 id, void *ref)
{
zfcp_erp_modify_unit_status(unit, id, ref,
@@ -3072,6 +1700,15 @@
zfcp_erp_unit_reopen(unit, ZFCP_STATUS_COMMON_ERP_FAILED, id, ref);
}
+/**
+ * zfcp_erp_port_access_denied - Adapter denied access to port.
+ * @port: port where access has been denied
+ * @id: id for debug trace
+ * @ref: reference for debug trace
+ *
+ * Since the adapter has denied access, stop using the port and the
+ * attached units.
+ */
void zfcp_erp_port_access_denied(struct zfcp_port *port, u8 id, void *ref)
{
unsigned long flags;
@@ -3083,6 +1720,14 @@
read_unlock_irqrestore(&zfcp_data.config_lock, flags);
}
+/**
+ * zfcp_erp_unit_access_denied - Adapter denied access to unit.
+ * @unit: unit where access has been denied
+ * @id: id for debug trace
+ * @ref: reference for debug trace
+ *
+ * Since the adapter has denied access, stop using the unit.
+ */
void zfcp_erp_unit_access_denied(struct zfcp_unit *unit, u8 id, void *ref)
{
zfcp_erp_modify_unit_status(unit, id, ref,
@@ -3090,6 +1735,40 @@
ZFCP_STATUS_COMMON_ACCESS_DENIED, ZFCP_SET);
}
+static void zfcp_erp_unit_access_changed(struct zfcp_unit *unit, u8 id,
+ void *ref)
+{
+ int status = atomic_read(&unit->status);
+ if (!(status & (ZFCP_STATUS_COMMON_ACCESS_DENIED |
+ ZFCP_STATUS_COMMON_ACCESS_BOXED)))
+ return;
+
+ zfcp_erp_unit_reopen(unit, ZFCP_STATUS_COMMON_ERP_FAILED, id, ref);
+}
+
+static void zfcp_erp_port_access_changed(struct zfcp_port *port, u8 id,
+ void *ref)
+{
+ struct zfcp_unit *unit;
+ int status = atomic_read(&port->status);
+
+ if (!(status & (ZFCP_STATUS_COMMON_ACCESS_DENIED |
+ ZFCP_STATUS_COMMON_ACCESS_BOXED))) {
+ if (!(status & ZFCP_STATUS_PORT_WKA))
+ list_for_each_entry(unit, &port->unit_list_head, list)
+ zfcp_erp_unit_access_changed(unit, id, ref);
+ return;
+ }
+
+ zfcp_erp_port_reopen(port, ZFCP_STATUS_COMMON_ERP_FAILED, id, ref);
+}
+
+/**
+ * zfcp_erp_adapter_access_changed - Process change in adapter ACT
+ * @adapter: Adapter where the Access Control Table (ACT) changed
+ * @id: Id for debug trace
+ * @ref: Reference for debug trace
+ */
void zfcp_erp_adapter_access_changed(struct zfcp_adapter *adapter, u8 id,
void *ref)
{
@@ -3107,50 +1786,3 @@
zfcp_erp_port_access_changed(port, id, ref);
read_unlock_irqrestore(&zfcp_data.config_lock, flags);
}
-
-void zfcp_erp_port_access_changed(struct zfcp_port *port, u8 id, void *ref)
-{
- struct zfcp_adapter *adapter = port->adapter;
- struct zfcp_unit *unit;
-
- if (!atomic_test_mask(ZFCP_STATUS_COMMON_ACCESS_DENIED,
- &port->status) &&
- !atomic_test_mask(ZFCP_STATUS_COMMON_ACCESS_BOXED,
- &port->status)) {
- if (!atomic_test_mask(ZFCP_STATUS_PORT_WKA, &port->status))
- list_for_each_entry(unit, &port->unit_list_head, list)
- zfcp_erp_unit_access_changed(unit, id, ref);
- return;
- }
-
- ZFCP_LOG_NORMAL("reopen of port 0x%016Lx on adapter %s "
- "(due to ACT update)\n",
- port->wwpn, zfcp_get_busid_by_adapter(adapter));
- if (zfcp_erp_port_reopen(port, ZFCP_STATUS_COMMON_ERP_FAILED, id, ref))
- ZFCP_LOG_NORMAL("failed reopen of port"
- "(adapter %s, wwpn=0x%016Lx)\n",
- zfcp_get_busid_by_adapter(adapter), port->wwpn);
-}
-
-void zfcp_erp_unit_access_changed(struct zfcp_unit *unit, u8 id, void *ref)
-{
- struct zfcp_adapter *adapter = unit->port->adapter;
-
- if (!atomic_test_mask(ZFCP_STATUS_COMMON_ACCESS_DENIED,
- &unit->status) &&
- !atomic_test_mask(ZFCP_STATUS_COMMON_ACCESS_BOXED,
- &unit->status))
- return;
-
- ZFCP_LOG_NORMAL("reopen of unit 0x%016Lx on port 0x%016Lx "
- " on adapter %s (due to ACT update)\n",
- unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_adapter(adapter));
- if (zfcp_erp_unit_reopen(unit, ZFCP_STATUS_COMMON_ERP_FAILED, id, ref))
- ZFCP_LOG_NORMAL("failed reopen of unit (adapter %s, "
- "wwpn=0x%016Lx, fcp_lun=0x%016Lx)\n",
- zfcp_get_busid_by_adapter(adapter),
- unit->port->wwpn, unit->fcp_lun);
-}
-
-#undef ZFCP_LOG_AREA
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h
index 6abf178..8065b2b 100644
--- a/drivers/s390/scsi/zfcp_ext.h
+++ b/drivers/s390/scsi/zfcp_ext.h
@@ -1,22 +1,9 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * External function declarations.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
#ifndef ZFCP_EXT_H
@@ -24,172 +11,51 @@
#include "zfcp_def.h"
-extern struct zfcp_data zfcp_data;
-
-/******************************** SYSFS *************************************/
-extern struct attribute_group *zfcp_driver_attr_groups[];
-extern int zfcp_sysfs_adapter_create_files(struct device *);
-extern void zfcp_sysfs_adapter_remove_files(struct device *);
-extern int zfcp_sysfs_port_create_files(struct device *, u32);
-extern void zfcp_sysfs_port_remove_files(struct device *, u32);
-extern int zfcp_sysfs_unit_create_files(struct device *);
-extern void zfcp_sysfs_unit_remove_files(struct device *);
-extern void zfcp_sysfs_port_release(struct device *);
-extern void zfcp_sysfs_unit_release(struct device *);
-
-/**************************** CONFIGURATION *********************************/
-extern struct zfcp_unit *zfcp_get_unit_by_lun(struct zfcp_port *, fcp_lun_t);
-extern struct zfcp_port *zfcp_get_port_by_wwpn(struct zfcp_adapter *, wwn_t);
-extern struct zfcp_port *zfcp_get_port_by_did(struct zfcp_adapter *, u32);
-struct zfcp_adapter *zfcp_get_adapter_by_busid(char *);
-extern struct zfcp_adapter *zfcp_adapter_enqueue(struct ccw_device *);
-extern int zfcp_adapter_debug_register(struct zfcp_adapter *);
-extern void zfcp_adapter_dequeue(struct zfcp_adapter *);
-extern void zfcp_adapter_debug_unregister(struct zfcp_adapter *);
-extern struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *, wwn_t,
- u32, u32);
-extern void zfcp_port_dequeue(struct zfcp_port *);
+/* zfcp_aux.c */
+extern struct zfcp_unit *zfcp_get_unit_by_lun(struct zfcp_port *,
+ fcp_lun_t);
+extern struct zfcp_port *zfcp_get_port_by_wwpn(struct zfcp_adapter *,
+ wwn_t);
+extern int zfcp_adapter_enqueue(struct ccw_device *);
+extern void zfcp_adapter_dequeue(struct zfcp_adapter *);
+extern struct zfcp_port *zfcp_port_enqueue(struct zfcp_adapter *, wwn_t, u32,
+ u32);
+extern void zfcp_port_dequeue(struct zfcp_port *);
extern struct zfcp_unit *zfcp_unit_enqueue(struct zfcp_port *, fcp_lun_t);
-extern void zfcp_unit_dequeue(struct zfcp_unit *);
+extern void zfcp_unit_dequeue(struct zfcp_unit *);
+extern int zfcp_reqlist_isempty(struct zfcp_adapter *);
+extern void zfcp_sg_free_table(struct scatterlist *, int);
+extern int zfcp_sg_setup_table(struct scatterlist *, int);
-/******************************* S/390 IO ************************************/
-extern int zfcp_ccw_register(void);
+/* zfcp_ccw.c */
+extern int zfcp_ccw_register(void);
-extern void zfcp_qdio_zero_sbals(struct qdio_buffer **, int, int);
-extern int zfcp_qdio_allocate(struct zfcp_adapter *);
-extern int zfcp_qdio_allocate_queues(struct zfcp_adapter *);
-extern void zfcp_qdio_free_queues(struct zfcp_adapter *);
-extern int zfcp_qdio_determine_pci(struct zfcp_qdio_queue *,
- struct zfcp_fsf_req *);
+/* zfcp_cfdc.c */
+extern struct miscdevice zfcp_cfdc_misc;
-extern volatile struct qdio_buffer_element *zfcp_qdio_sbale_req
- (struct zfcp_fsf_req *, int, int);
-extern volatile struct qdio_buffer_element *zfcp_qdio_sbale_curr
- (struct zfcp_fsf_req *);
-extern int zfcp_qdio_sbals_from_sg
- (struct zfcp_fsf_req *, unsigned long, struct scatterlist *, int, int);
-extern int zfcp_qdio_sbals_from_scsicmnd
- (struct zfcp_fsf_req *, unsigned long, struct scsi_cmnd *);
-
-
-/******************************** FSF ****************************************/
-extern int zfcp_fsf_open_port(struct zfcp_erp_action *);
-extern int zfcp_fsf_close_port(struct zfcp_erp_action *);
-extern int zfcp_fsf_close_physical_port(struct zfcp_erp_action *);
-
-extern int zfcp_fsf_open_unit(struct zfcp_erp_action *);
-extern int zfcp_fsf_close_unit(struct zfcp_erp_action *);
-
-extern int zfcp_fsf_exchange_config_data(struct zfcp_erp_action *);
-extern int zfcp_fsf_exchange_config_data_sync(struct zfcp_adapter *,
- struct fsf_qtcb_bottom_config *);
-extern int zfcp_fsf_exchange_port_data(struct zfcp_erp_action *);
-extern int zfcp_fsf_exchange_port_data_sync(struct zfcp_adapter *,
- struct fsf_qtcb_bottom_port *);
-extern int zfcp_fsf_control_file(struct zfcp_adapter *, struct zfcp_fsf_req **,
- u32, u32, struct zfcp_sg_list *);
-extern void zfcp_fsf_start_timer(struct zfcp_fsf_req *, unsigned long);
-extern void zfcp_erp_start_timer(struct zfcp_fsf_req *);
-extern void zfcp_fsf_req_dismiss_all(struct zfcp_adapter *);
-extern int zfcp_fsf_status_read(struct zfcp_adapter *, int);
-extern int zfcp_fsf_req_create(struct zfcp_adapter *, u32, int, mempool_t *,
- unsigned long *, struct zfcp_fsf_req **);
-extern int zfcp_fsf_send_ct(struct zfcp_send_ct *, mempool_t *,
- struct zfcp_erp_action *);
-extern int zfcp_fsf_send_els(struct zfcp_send_els *);
-extern int zfcp_fsf_send_fcp_command_task(struct zfcp_adapter *,
- struct zfcp_unit *,
- struct scsi_cmnd *, int, int);
-extern int zfcp_fsf_req_complete(struct zfcp_fsf_req *);
-extern void zfcp_fsf_incoming_els(struct zfcp_fsf_req *);
-extern void zfcp_fsf_req_free(struct zfcp_fsf_req *);
-extern struct zfcp_fsf_req *zfcp_fsf_send_fcp_command_task_management(
- struct zfcp_adapter *, struct zfcp_unit *, u8, int);
-extern struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(
- unsigned long, struct zfcp_adapter *, struct zfcp_unit *, int);
-
-/******************************* FC/FCP **************************************/
-extern int zfcp_nameserver_enqueue(struct zfcp_adapter *);
-extern int zfcp_ns_gid_pn_request(struct zfcp_erp_action *);
-extern int zfcp_check_ct_response(struct ct_hdr *);
-extern int zfcp_handle_els_rjt(u32, struct zfcp_ls_rjt_par *);
-extern void zfcp_plogi_evaluate(struct zfcp_port *, struct fsf_plogi *);
-
-/******************************* SCSI ****************************************/
-extern int zfcp_adapter_scsi_register(struct zfcp_adapter *);
-extern void zfcp_adapter_scsi_unregister(struct zfcp_adapter *);
-extern void zfcp_set_fcp_dl(struct fcp_cmnd_iu *, fcp_dl_t);
-extern char *zfcp_get_fcp_rsp_info_ptr(struct fcp_rsp_iu *);
-extern void set_host_byte(int *, char);
-extern void set_driver_byte(int *, char);
-extern char *zfcp_get_fcp_sns_info_ptr(struct fcp_rsp_iu *);
-extern fcp_dl_t zfcp_get_fcp_dl(struct fcp_cmnd_iu *);
-
-extern int zfcp_scsi_command_async(struct zfcp_adapter *,struct zfcp_unit *,
- struct scsi_cmnd *, int);
-extern int zfcp_scsi_command_sync(struct zfcp_unit *, struct scsi_cmnd *, int);
-extern struct fc_function_template zfcp_transport_functions;
-
-/******************************** ERP ****************************************/
-extern void zfcp_erp_modify_adapter_status(struct zfcp_adapter *, u8, void *,
- u32, int);
-extern int zfcp_erp_adapter_reopen(struct zfcp_adapter *, int, u8, void *);
-extern int zfcp_erp_adapter_shutdown(struct zfcp_adapter *, int, u8, void *);
-extern void zfcp_erp_adapter_failed(struct zfcp_adapter *, u8, void *);
-
-extern void zfcp_erp_modify_port_status(struct zfcp_port *, u8, void *, u32,
- int);
-extern int zfcp_erp_port_reopen(struct zfcp_port *, int, u8, void *);
-extern int zfcp_erp_port_shutdown(struct zfcp_port *, int, u8, void *);
-extern int zfcp_erp_port_forced_reopen(struct zfcp_port *, int, u8, void *);
-extern void zfcp_erp_port_failed(struct zfcp_port *, u8, void *);
-extern int zfcp_erp_port_reopen_all(struct zfcp_adapter *, int, u8, void *);
-
-extern void zfcp_erp_modify_unit_status(struct zfcp_unit *, u8, void *, u32,
- int);
-extern int zfcp_erp_unit_reopen(struct zfcp_unit *, int, u8, void *);
-extern int zfcp_erp_unit_shutdown(struct zfcp_unit *, int, u8, void *);
-extern void zfcp_erp_unit_failed(struct zfcp_unit *, u8, void *);
-
-extern int zfcp_erp_thread_setup(struct zfcp_adapter *);
-extern int zfcp_erp_thread_kill(struct zfcp_adapter *);
-extern int zfcp_erp_wait(struct zfcp_adapter *);
-extern void zfcp_erp_async_handler(struct zfcp_erp_action *, unsigned long);
-
-extern int zfcp_test_link(struct zfcp_port *);
-
-extern void zfcp_erp_port_boxed(struct zfcp_port *, u8 id, void *ref);
-extern void zfcp_erp_unit_boxed(struct zfcp_unit *, u8 id, void *ref);
-extern void zfcp_erp_port_access_denied(struct zfcp_port *, u8 id, void *ref);
-extern void zfcp_erp_unit_access_denied(struct zfcp_unit *, u8 id, void *ref);
-extern void zfcp_erp_adapter_access_changed(struct zfcp_adapter *, u8, void *);
-extern void zfcp_erp_port_access_changed(struct zfcp_port *, u8, void *);
-extern void zfcp_erp_unit_access_changed(struct zfcp_unit *, u8, void *);
-
-/******************************** AUX ****************************************/
-extern void zfcp_rec_dbf_event_thread(u8 id, struct zfcp_adapter *adapter,
- int lock);
-extern void zfcp_rec_dbf_event_adapter(u8 id, void *ref, struct zfcp_adapter *);
-extern void zfcp_rec_dbf_event_port(u8 id, void *ref, struct zfcp_port *port);
-extern void zfcp_rec_dbf_event_unit(u8 id, void *ref, struct zfcp_unit *unit);
-extern void zfcp_rec_dbf_event_trigger(u8 id, void *ref, u8 want, u8 need,
- void *action, struct zfcp_adapter *,
+/* zfcp_dbf.c */
+extern int zfcp_adapter_debug_register(struct zfcp_adapter *);
+extern void zfcp_adapter_debug_unregister(struct zfcp_adapter *);
+extern void zfcp_rec_dbf_event_thread(u8, struct zfcp_adapter *);
+extern void zfcp_rec_dbf_event_thread_lock(u8, struct zfcp_adapter *);
+extern void zfcp_rec_dbf_event_adapter(u8, void *, struct zfcp_adapter *);
+extern void zfcp_rec_dbf_event_port(u8, void *, struct zfcp_port *);
+extern void zfcp_rec_dbf_event_unit(u8, void *, struct zfcp_unit *);
+extern void zfcp_rec_dbf_event_trigger(u8, void *, u8, u8, void *,
+ struct zfcp_adapter *,
struct zfcp_port *, struct zfcp_unit *);
-extern void zfcp_rec_dbf_event_action(u8 id, struct zfcp_erp_action *);
-
+extern void zfcp_rec_dbf_event_action(u8, struct zfcp_erp_action *);
extern void zfcp_hba_dbf_event_fsf_response(struct zfcp_fsf_req *);
extern void zfcp_hba_dbf_event_fsf_unsol(const char *, struct zfcp_adapter *,
struct fsf_status_read_buffer *);
extern void zfcp_hba_dbf_event_qdio(struct zfcp_adapter *,
unsigned int, unsigned int, unsigned int,
int, int);
-
extern void zfcp_san_dbf_event_ct_request(struct zfcp_fsf_req *);
extern void zfcp_san_dbf_event_ct_response(struct zfcp_fsf_req *);
extern void zfcp_san_dbf_event_els_request(struct zfcp_fsf_req *);
extern void zfcp_san_dbf_event_els_response(struct zfcp_fsf_req *);
extern void zfcp_san_dbf_event_incoming_els(struct zfcp_fsf_req *);
-
extern void zfcp_scsi_dbf_event_result(const char *, int, struct zfcp_adapter *,
struct scsi_cmnd *,
struct zfcp_fsf_req *);
@@ -198,6 +64,101 @@
unsigned long);
extern void zfcp_scsi_dbf_event_devreset(const char *, u8, struct zfcp_unit *,
struct scsi_cmnd *);
-extern int zfcp_reqlist_isempty(struct zfcp_adapter *);
+
+/* zfcp_erp.c */
+extern void zfcp_erp_modify_adapter_status(struct zfcp_adapter *, u8, void *,
+ u32, int);
+extern void zfcp_erp_adapter_reopen(struct zfcp_adapter *, int, u8, void *);
+extern void zfcp_erp_adapter_shutdown(struct zfcp_adapter *, int, u8, void *);
+extern void zfcp_erp_adapter_failed(struct zfcp_adapter *, u8, void *);
+extern void zfcp_erp_modify_port_status(struct zfcp_port *, u8, void *, u32,
+ int);
+extern int zfcp_erp_port_reopen(struct zfcp_port *, int, u8, void *);
+extern void zfcp_erp_port_shutdown(struct zfcp_port *, int, u8, void *);
+extern void zfcp_erp_port_forced_reopen(struct zfcp_port *, int, u8, void *);
+extern void zfcp_erp_port_failed(struct zfcp_port *, u8, void *);
+extern void zfcp_erp_modify_unit_status(struct zfcp_unit *, u8, void *, u32,
+ int);
+extern void zfcp_erp_unit_reopen(struct zfcp_unit *, int, u8, void *);
+extern void zfcp_erp_unit_shutdown(struct zfcp_unit *, int, u8, void *);
+extern void zfcp_erp_unit_failed(struct zfcp_unit *, u8, void *);
+extern int zfcp_erp_thread_setup(struct zfcp_adapter *);
+extern void zfcp_erp_thread_kill(struct zfcp_adapter *);
+extern void zfcp_erp_wait(struct zfcp_adapter *);
+extern void zfcp_erp_notify(struct zfcp_erp_action *, unsigned long);
+extern void zfcp_erp_port_boxed(struct zfcp_port *, u8, void *);
+extern void zfcp_erp_unit_boxed(struct zfcp_unit *, u8, void *);
+extern void zfcp_erp_port_access_denied(struct zfcp_port *, u8, void *);
+extern void zfcp_erp_unit_access_denied(struct zfcp_unit *, u8, void *);
+extern void zfcp_erp_adapter_access_changed(struct zfcp_adapter *, u8, void *);
+extern void zfcp_erp_timeout_handler(unsigned long);
+
+/* zfcp_fc.c */
+extern int zfcp_scan_ports(struct zfcp_adapter *);
+extern void _zfcp_scan_ports_later(struct work_struct *);
+extern void zfcp_fc_incoming_els(struct zfcp_fsf_req *);
+extern int zfcp_fc_ns_gid_pn_request(struct zfcp_erp_action *);
+extern void zfcp_fc_plogi_evaluate(struct zfcp_port *, struct fsf_plogi *);
+extern void zfcp_test_link(struct zfcp_port *);
+
+/* zfcp_fsf.c */
+extern int zfcp_fsf_open_port(struct zfcp_erp_action *);
+extern int zfcp_fsf_close_port(struct zfcp_erp_action *);
+extern int zfcp_fsf_close_physical_port(struct zfcp_erp_action *);
+extern int zfcp_fsf_open_unit(struct zfcp_erp_action *);
+extern int zfcp_fsf_close_unit(struct zfcp_erp_action *);
+extern int zfcp_fsf_exchange_config_data(struct zfcp_erp_action *);
+extern int zfcp_fsf_exchange_config_data_sync(struct zfcp_adapter *,
+ struct fsf_qtcb_bottom_config *);
+extern int zfcp_fsf_exchange_port_data(struct zfcp_erp_action *);
+extern int zfcp_fsf_exchange_port_data_sync(struct zfcp_adapter *,
+ struct fsf_qtcb_bottom_port *);
+extern struct zfcp_fsf_req *zfcp_fsf_control_file(struct zfcp_adapter *,
+ struct zfcp_fsf_cfdc *);
+extern void zfcp_fsf_req_dismiss_all(struct zfcp_adapter *);
+extern int zfcp_fsf_status_read(struct zfcp_adapter *);
+extern int zfcp_status_read_refill(struct zfcp_adapter *adapter);
+extern int zfcp_fsf_send_ct(struct zfcp_send_ct *, mempool_t *,
+ struct zfcp_erp_action *);
+extern int zfcp_fsf_send_els(struct zfcp_send_els *);
+extern int zfcp_fsf_send_fcp_command_task(struct zfcp_adapter *,
+ struct zfcp_unit *,
+ struct scsi_cmnd *, int, int);
+extern void zfcp_fsf_req_complete(struct zfcp_fsf_req *);
+extern void zfcp_fsf_req_free(struct zfcp_fsf_req *);
+extern struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_adapter *,
+ struct zfcp_unit *, u8, int);
+extern struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(unsigned long,
+ struct zfcp_adapter *,
+ struct zfcp_unit *, int);
+
+/* zfcp_qdio.c */
+extern int zfcp_qdio_allocate(struct zfcp_adapter *);
+extern void zfcp_qdio_free(struct zfcp_adapter *);
+extern int zfcp_qdio_send(struct zfcp_fsf_req *);
+extern volatile struct qdio_buffer_element *zfcp_qdio_sbale_req(
+ struct zfcp_fsf_req *);
+extern volatile struct qdio_buffer_element *zfcp_qdio_sbale_curr(
+ struct zfcp_fsf_req *);
+extern int zfcp_qdio_sbals_from_sg(struct zfcp_fsf_req *, unsigned long,
+ struct scatterlist *, int);
+extern int zfcp_qdio_open(struct zfcp_adapter *);
+extern void zfcp_qdio_close(struct zfcp_adapter *);
+
+/* zfcp_scsi.c */
+extern struct zfcp_data zfcp_data;
+extern int zfcp_adapter_scsi_register(struct zfcp_adapter *);
+extern void zfcp_adapter_scsi_unregister(struct zfcp_adapter *);
+extern void zfcp_set_fcp_dl(struct fcp_cmnd_iu *, fcp_dl_t);
+extern char *zfcp_get_fcp_sns_info_ptr(struct fcp_rsp_iu *);
+extern struct fc_function_template zfcp_transport_functions;
+
+/* zfcp_sysfs.c */
+extern struct attribute_group zfcp_sysfs_unit_attrs;
+extern struct attribute_group zfcp_sysfs_adapter_attrs;
+extern struct attribute_group zfcp_sysfs_ns_port_attrs;
+extern struct attribute_group zfcp_sysfs_port_attrs;
+extern struct device_attribute *zfcp_sysfs_sdev_attrs[];
+extern struct device_attribute *zfcp_sysfs_shost_attrs[];
#endif /* ZFCP_EXT_H */
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c
new file mode 100644
index 0000000..e984469
--- /dev/null
+++ b/drivers/s390/scsi/zfcp_fc.c
@@ -0,0 +1,567 @@
+/*
+ * zfcp device driver
+ *
+ * Fibre Channel related functions for the zfcp device driver.
+ *
+ * Copyright IBM Corporation 2008
+ */
+
+#include "zfcp_ext.h"
+
+struct ct_iu_gpn_ft_req {
+ struct ct_hdr header;
+ u8 flags;
+ u8 domain_id_scope;
+ u8 area_id_scope;
+ u8 fc4_type;
+} __attribute__ ((packed));
+
+struct gpn_ft_resp_acc {
+ u8 control;
+ u8 port_id[3];
+ u8 reserved[4];
+ u64 wwpn;
+} __attribute__ ((packed));
+
+#define ZFCP_GPN_FT_ENTRIES ((PAGE_SIZE - sizeof(struct ct_hdr)) \
+ / sizeof(struct gpn_ft_resp_acc))
+#define ZFCP_GPN_FT_BUFFERS 4
+#define ZFCP_GPN_FT_MAX_ENTRIES ZFCP_GPN_FT_BUFFERS * (ZFCP_GPN_FT_ENTRIES + 1)
+
+struct ct_iu_gpn_ft_resp {
+ struct ct_hdr header;
+ struct gpn_ft_resp_acc accept[ZFCP_GPN_FT_ENTRIES];
+} __attribute__ ((packed));
+
+struct zfcp_gpn_ft {
+ struct zfcp_send_ct ct;
+ struct scatterlist sg_req;
+ struct scatterlist sg_resp[ZFCP_GPN_FT_BUFFERS];
+};
+
+static struct zfcp_port *zfcp_get_port_by_did(struct zfcp_adapter *adapter,
+ u32 d_id)
+{
+ struct zfcp_port *port;
+
+ list_for_each_entry(port, &adapter->port_list_head, list)
+ if ((port->d_id == d_id) &&
+ !atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &port->status))
+ return port;
+ return NULL;
+}
+
+static void _zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req, u32 range,
+ struct fcp_rscn_element *elem)
+{
+ unsigned long flags;
+ struct zfcp_port *port;
+
+ read_lock_irqsave(&zfcp_data.config_lock, flags);
+ list_for_each_entry(port, &fsf_req->adapter->port_list_head, list) {
+ if (atomic_test_mask(ZFCP_STATUS_PORT_WKA, &port->status))
+ continue;
+ /* FIXME: ZFCP_STATUS_PORT_DID_DID check is racy */
+ if (!atomic_test_mask(ZFCP_STATUS_PORT_DID_DID, &port->status))
+ /* Try to connect to unused ports anyway. */
+ zfcp_erp_port_reopen(port,
+ ZFCP_STATUS_COMMON_ERP_FAILED,
+ 82, fsf_req);
+ else if ((port->d_id & range) == (elem->nport_did & range))
+ /* Check connection status for connected ports */
+ zfcp_test_link(port);
+ }
+ read_unlock_irqrestore(&zfcp_data.config_lock, flags);
+}
+
+static void zfcp_fc_incoming_rscn(struct zfcp_fsf_req *fsf_req)
+{
+ struct fsf_status_read_buffer *status_buffer = (void *)fsf_req->data;
+ struct fcp_rscn_head *fcp_rscn_head;
+ struct fcp_rscn_element *fcp_rscn_element;
+ u16 i;
+ u16 no_entries;
+ u32 range_mask;
+
+ fcp_rscn_head = (struct fcp_rscn_head *) status_buffer->payload.data;
+ fcp_rscn_element = (struct fcp_rscn_element *) fcp_rscn_head;
+
+ /* see FC-FS */
+ no_entries = fcp_rscn_head->payload_len /
+ sizeof(struct fcp_rscn_element);
+
+ for (i = 1; i < no_entries; i++) {
+ /* skip head and start with 1st element */
+ fcp_rscn_element++;
+ switch (fcp_rscn_element->addr_format) {
+ case ZFCP_PORT_ADDRESS:
+ range_mask = ZFCP_PORTS_RANGE_PORT;
+ break;
+ case ZFCP_AREA_ADDRESS:
+ range_mask = ZFCP_PORTS_RANGE_AREA;
+ break;
+ case ZFCP_DOMAIN_ADDRESS:
+ range_mask = ZFCP_PORTS_RANGE_DOMAIN;
+ break;
+ case ZFCP_FABRIC_ADDRESS:
+ range_mask = ZFCP_PORTS_RANGE_FABRIC;
+ break;
+ default:
+ continue;
+ }
+ _zfcp_fc_incoming_rscn(fsf_req, range_mask, fcp_rscn_element);
+ }
+ schedule_work(&fsf_req->adapter->scan_work);
+}
+
+static void zfcp_fc_incoming_wwpn(struct zfcp_fsf_req *req, wwn_t wwpn)
+{
+ struct zfcp_adapter *adapter = req->adapter;
+ struct zfcp_port *port;
+ unsigned long flags;
+
+ read_lock_irqsave(&zfcp_data.config_lock, flags);
+ list_for_each_entry(port, &adapter->port_list_head, list)
+ if (port->wwpn == wwpn)
+ break;
+ read_unlock_irqrestore(&zfcp_data.config_lock, flags);
+
+ if (port && (port->wwpn == wwpn))
+ zfcp_erp_port_forced_reopen(port, 0, 83, req);
+}
+
+static void zfcp_fc_incoming_plogi(struct zfcp_fsf_req *req)
+{
+ struct fsf_status_read_buffer *status_buffer =
+ (struct fsf_status_read_buffer *)req->data;
+ struct fsf_plogi *els_plogi =
+ (struct fsf_plogi *) status_buffer->payload.data;
+
+ zfcp_fc_incoming_wwpn(req, els_plogi->serv_param.wwpn);
+}
+
+static void zfcp_fc_incoming_logo(struct zfcp_fsf_req *req)
+{
+ struct fsf_status_read_buffer *status_buffer =
+ (struct fsf_status_read_buffer *)req->data;
+ struct fcp_logo *els_logo =
+ (struct fcp_logo *) status_buffer->payload.data;
+
+ zfcp_fc_incoming_wwpn(req, els_logo->nport_wwpn);
+}
+
+/**
+ * zfcp_fc_incoming_els - handle incoming ELS
+ * @fsf_req - request which contains incoming ELS
+ */
+void zfcp_fc_incoming_els(struct zfcp_fsf_req *fsf_req)
+{
+ struct fsf_status_read_buffer *status_buffer =
+ (struct fsf_status_read_buffer *) fsf_req->data;
+ unsigned int els_type = status_buffer->payload.data[0];
+
+ zfcp_san_dbf_event_incoming_els(fsf_req);
+ if (els_type == LS_PLOGI)
+ zfcp_fc_incoming_plogi(fsf_req);
+ else if (els_type == LS_LOGO)
+ zfcp_fc_incoming_logo(fsf_req);
+ else if (els_type == LS_RSCN)
+ zfcp_fc_incoming_rscn(fsf_req);
+}
+
+static void zfcp_ns_gid_pn_handler(unsigned long data)
+{
+ struct zfcp_gid_pn_data *gid_pn = (struct zfcp_gid_pn_data *) data;
+ struct zfcp_send_ct *ct = &gid_pn->ct;
+ struct ct_iu_gid_pn_req *ct_iu_req = sg_virt(ct->req);
+ struct ct_iu_gid_pn_resp *ct_iu_resp = sg_virt(ct->resp);
+ struct zfcp_port *port = gid_pn->port;
+
+ if (ct->status)
+ goto out;
+ if (ct_iu_resp->header.cmd_rsp_code != ZFCP_CT_ACCEPT) {
+ atomic_set_mask(ZFCP_STATUS_PORT_INVALID_WWPN, &port->status);
+ goto out;
+ }
+ /* paranoia */
+ if (ct_iu_req->wwpn != port->wwpn)
+ goto out;
+ /* looks like a valid d_id */
+ port->d_id = ct_iu_resp->d_id & ZFCP_DID_MASK;
+ atomic_set_mask(ZFCP_STATUS_PORT_DID_DID, &port->status);
+out:
+ mempool_free(gid_pn, port->adapter->pool.data_gid_pn);
+}
+
+/**
+ * zfcp_fc_ns_gid_pn_request - initiate GID_PN nameserver request
+ * @erp_action: pointer to zfcp_erp_action where GID_PN request is needed
+ * return: -ENOMEM on error, 0 otherwise
+ */
+int zfcp_fc_ns_gid_pn_request(struct zfcp_erp_action *erp_action)
+{
+ int ret;
+ struct zfcp_gid_pn_data *gid_pn;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+
+ gid_pn = mempool_alloc(adapter->pool.data_gid_pn, GFP_ATOMIC);
+ if (!gid_pn)
+ return -ENOMEM;
+
+ memset(gid_pn, 0, sizeof(*gid_pn));
+
+ /* setup parameters for send generic command */
+ gid_pn->port = erp_action->port;
+ gid_pn->ct.port = adapter->nameserver_port;
+ gid_pn->ct.handler = zfcp_ns_gid_pn_handler;
+ gid_pn->ct.handler_data = (unsigned long) gid_pn;
+ gid_pn->ct.timeout = ZFCP_NS_GID_PN_TIMEOUT;
+ gid_pn->ct.req = &gid_pn->req;
+ gid_pn->ct.resp = &gid_pn->resp;
+ gid_pn->ct.req_count = 1;
+ gid_pn->ct.resp_count = 1;
+ sg_init_one(&gid_pn->req, &gid_pn->ct_iu_req,
+ sizeof(struct ct_iu_gid_pn_req));
+ sg_init_one(&gid_pn->resp, &gid_pn->ct_iu_resp,
+ sizeof(struct ct_iu_gid_pn_resp));
+
+ /* setup nameserver request */
+ gid_pn->ct_iu_req.header.revision = ZFCP_CT_REVISION;
+ gid_pn->ct_iu_req.header.gs_type = ZFCP_CT_DIRECTORY_SERVICE;
+ gid_pn->ct_iu_req.header.gs_subtype = ZFCP_CT_NAME_SERVER;
+ gid_pn->ct_iu_req.header.options = ZFCP_CT_SYNCHRONOUS;
+ gid_pn->ct_iu_req.header.cmd_rsp_code = ZFCP_CT_GID_PN;
+ gid_pn->ct_iu_req.header.max_res_size = ZFCP_CT_MAX_SIZE;
+ gid_pn->ct_iu_req.wwpn = erp_action->port->wwpn;
+
+ ret = zfcp_fsf_send_ct(&gid_pn->ct, adapter->pool.fsf_req_erp,
+ erp_action);
+ if (ret)
+ mempool_free(gid_pn, adapter->pool.data_gid_pn);
+ return ret;
+}
+
+/**
+ * zfcp_fc_plogi_evaluate - evaluate PLOGI playload
+ * @port: zfcp_port structure
+ * @plogi: plogi payload
+ *
+ * Evaluate PLOGI playload and copy important fields into zfcp_port structure
+ */
+void zfcp_fc_plogi_evaluate(struct zfcp_port *port, struct fsf_plogi *plogi)
+{
+ port->maxframe_size = plogi->serv_param.common_serv_param[7] |
+ ((plogi->serv_param.common_serv_param[6] & 0x0F) << 8);
+ if (plogi->serv_param.class1_serv_param[0] & 0x80)
+ port->supported_classes |= FC_COS_CLASS1;
+ if (plogi->serv_param.class2_serv_param[0] & 0x80)
+ port->supported_classes |= FC_COS_CLASS2;
+ if (plogi->serv_param.class3_serv_param[0] & 0x80)
+ port->supported_classes |= FC_COS_CLASS3;
+ if (plogi->serv_param.class4_serv_param[0] & 0x80)
+ port->supported_classes |= FC_COS_CLASS4;
+}
+
+struct zfcp_els_adisc {
+ struct zfcp_send_els els;
+ struct scatterlist req;
+ struct scatterlist resp;
+ struct zfcp_ls_adisc ls_adisc;
+ struct zfcp_ls_adisc_acc ls_adisc_acc;
+};
+
+static void zfcp_fc_adisc_handler(unsigned long data)
+{
+ struct zfcp_els_adisc *adisc = (struct zfcp_els_adisc *) data;
+ struct zfcp_port *port = adisc->els.port;
+ struct zfcp_ls_adisc_acc *ls_adisc = &adisc->ls_adisc_acc;
+
+ if (adisc->els.status) {
+ /* request rejected or timed out */
+ zfcp_erp_port_forced_reopen(port, 0, 63, NULL);
+ goto out;
+ }
+
+ if (!port->wwnn)
+ port->wwnn = ls_adisc->wwnn;
+
+ if (port->wwpn != ls_adisc->wwpn)
+ zfcp_erp_port_reopen(port, 0, 64, NULL);
+
+ out:
+ zfcp_port_put(port);
+ kfree(adisc);
+}
+
+static int zfcp_fc_adisc(struct zfcp_port *port)
+{
+ struct zfcp_els_adisc *adisc;
+ struct zfcp_adapter *adapter = port->adapter;
+
+ adisc = kzalloc(sizeof(struct zfcp_els_adisc), GFP_ATOMIC);
+ if (!adisc)
+ return -ENOMEM;
+
+ adisc->els.req = &adisc->req;
+ adisc->els.resp = &adisc->resp;
+ sg_init_one(adisc->els.req, &adisc->ls_adisc,
+ sizeof(struct zfcp_ls_adisc));
+ sg_init_one(adisc->els.resp, &adisc->ls_adisc_acc,
+ sizeof(struct zfcp_ls_adisc_acc));
+
+ adisc->els.req_count = 1;
+ adisc->els.resp_count = 1;
+ adisc->els.adapter = adapter;
+ adisc->els.port = port;
+ adisc->els.d_id = port->d_id;
+ adisc->els.handler = zfcp_fc_adisc_handler;
+ adisc->els.handler_data = (unsigned long) adisc;
+ adisc->els.ls_code = adisc->ls_adisc.code = ZFCP_LS_ADISC;
+
+ /* acc. to FC-FS, hard_nport_id in ADISC should not be set for ports
+ without FC-AL-2 capability, so we don't set it */
+ adisc->ls_adisc.wwpn = fc_host_port_name(adapter->scsi_host);
+ adisc->ls_adisc.wwnn = fc_host_node_name(adapter->scsi_host);
+ adisc->ls_adisc.nport_id = fc_host_port_id(adapter->scsi_host);
+
+ return zfcp_fsf_send_els(&adisc->els);
+}
+
+/**
+ * zfcp_test_link - lightweight link test procedure
+ * @port: port to be tested
+ *
+ * Test status of a link to a remote port using the ELS command ADISC.
+ * If there is a problem with the remote port, error recovery steps
+ * will be triggered.
+ */
+void zfcp_test_link(struct zfcp_port *port)
+{
+ int retval;
+
+ zfcp_port_get(port);
+ retval = zfcp_fc_adisc(port);
+ if (retval == 0 || retval == -EBUSY)
+ return;
+
+ /* send of ADISC was not possible */
+ zfcp_port_put(port);
+ zfcp_erp_port_forced_reopen(port, 0, 65, NULL);
+}
+
+static int zfcp_scan_get_nameserver(struct zfcp_adapter *adapter)
+{
+ int ret;
+
+ if (!adapter->nameserver_port)
+ return -EINTR;
+
+ if (!atomic_test_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
+ &adapter->nameserver_port->status)) {
+ ret = zfcp_erp_port_reopen(adapter->nameserver_port, 0, 148,
+ NULL);
+ if (ret)
+ return ret;
+ zfcp_erp_wait(adapter);
+ zfcp_port_put(adapter->nameserver_port);
+ }
+ return !atomic_test_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
+ &adapter->nameserver_port->status);
+}
+
+static void zfcp_gpn_ft_handler(unsigned long _done)
+{
+ complete((struct completion *)_done);
+}
+
+static void zfcp_free_sg_env(struct zfcp_gpn_ft *gpn_ft)
+{
+ struct scatterlist *sg = &gpn_ft->sg_req;
+
+ kfree(sg_virt(sg)); /* free request buffer */
+ zfcp_sg_free_table(gpn_ft->sg_resp, ZFCP_GPN_FT_BUFFERS);
+
+ kfree(gpn_ft);
+}
+
+static struct zfcp_gpn_ft *zfcp_alloc_sg_env(void)
+{
+ struct zfcp_gpn_ft *gpn_ft;
+ struct ct_iu_gpn_ft_req *req;
+
+ gpn_ft = kzalloc(sizeof(*gpn_ft), GFP_KERNEL);
+ if (!gpn_ft)
+ return NULL;
+
+ req = kzalloc(sizeof(struct ct_iu_gpn_ft_req), GFP_KERNEL);
+ if (!req) {
+ kfree(gpn_ft);
+ gpn_ft = NULL;
+ goto out;
+ }
+ sg_init_one(&gpn_ft->sg_req, req, sizeof(*req));
+
+ if (zfcp_sg_setup_table(gpn_ft->sg_resp, ZFCP_GPN_FT_BUFFERS)) {
+ zfcp_free_sg_env(gpn_ft);
+ gpn_ft = NULL;
+ }
+out:
+ return gpn_ft;
+}
+
+
+static int zfcp_scan_issue_gpn_ft(struct zfcp_gpn_ft *gpn_ft,
+ struct zfcp_adapter *adapter)
+{
+ struct zfcp_send_ct *ct = &gpn_ft->ct;
+ struct ct_iu_gpn_ft_req *req = sg_virt(&gpn_ft->sg_req);
+ struct completion done;
+ int ret;
+
+ /* prepare CT IU for GPN_FT */
+ req->header.revision = ZFCP_CT_REVISION;
+ req->header.gs_type = ZFCP_CT_DIRECTORY_SERVICE;
+ req->header.gs_subtype = ZFCP_CT_NAME_SERVER;
+ req->header.options = ZFCP_CT_SYNCHRONOUS;
+ req->header.cmd_rsp_code = ZFCP_CT_GPN_FT;
+ req->header.max_res_size = (sizeof(struct gpn_ft_resp_acc) *
+ (ZFCP_GPN_FT_MAX_ENTRIES - 1)) >> 2;
+ req->flags = 0;
+ req->domain_id_scope = 0;
+ req->area_id_scope = 0;
+ req->fc4_type = ZFCP_CT_SCSI_FCP;
+
+ /* prepare zfcp_send_ct */
+ ct->port = adapter->nameserver_port;
+ ct->handler = zfcp_gpn_ft_handler;
+ ct->handler_data = (unsigned long)&done;
+ ct->timeout = 10;
+ ct->req = &gpn_ft->sg_req;
+ ct->resp = gpn_ft->sg_resp;
+ ct->req_count = 1;
+ ct->resp_count = ZFCP_GPN_FT_BUFFERS;
+
+ init_completion(&done);
+ ret = zfcp_fsf_send_ct(ct, NULL, NULL);
+ if (!ret)
+ wait_for_completion(&done);
+ return ret;
+}
+
+static void zfcp_validate_port(struct zfcp_port *port)
+{
+ struct zfcp_adapter *adapter = port->adapter;
+
+ atomic_clear_mask(ZFCP_STATUS_COMMON_NOESC, &port->status);
+
+ if (port == adapter->nameserver_port)
+ return;
+ if ((port->supported_classes != 0) || (port->units != 0)) {
+ zfcp_port_put(port);
+ return;
+ }
+ zfcp_erp_port_shutdown(port, 0, 151, NULL);
+ zfcp_erp_wait(adapter);
+ zfcp_port_put(port);
+ zfcp_port_dequeue(port);
+}
+
+static int zfcp_scan_eval_gpn_ft(struct zfcp_gpn_ft *gpn_ft)
+{
+ struct zfcp_send_ct *ct = &gpn_ft->ct;
+ struct scatterlist *sg = gpn_ft->sg_resp;
+ struct ct_hdr *hdr = sg_virt(sg);
+ struct gpn_ft_resp_acc *acc = sg_virt(sg);
+ struct zfcp_adapter *adapter = ct->port->adapter;
+ struct zfcp_port *port, *tmp;
+ u32 d_id;
+ int ret = 0, x;
+
+ if (ct->status)
+ return -EIO;
+
+ if (hdr->cmd_rsp_code != ZFCP_CT_ACCEPT) {
+ if (hdr->reason_code == ZFCP_CT_UNABLE_TO_PERFORM_CMD)
+ return -EAGAIN; /* might be a temporary condition */
+ return -EIO;
+ }
+
+ if (hdr->max_res_size)
+ return -E2BIG;
+
+ down(&zfcp_data.config_sema);
+
+ /* first entry is the header */
+ for (x = 1; x < ZFCP_GPN_FT_MAX_ENTRIES; x++) {
+ if (x % (ZFCP_GPN_FT_ENTRIES + 1))
+ acc++;
+ else
+ acc = sg_virt(++sg);
+
+ d_id = acc->port_id[0] << 16 | acc->port_id[1] << 8 |
+ acc->port_id[2];
+
+ /* skip the adapter's port and known remote ports */
+ if (acc->wwpn == fc_host_port_name(adapter->scsi_host) ||
+ zfcp_get_port_by_did(adapter, d_id))
+ continue;
+
+ port = zfcp_port_enqueue(adapter, acc->wwpn,
+ ZFCP_STATUS_PORT_DID_DID |
+ ZFCP_STATUS_COMMON_NOESC, d_id);
+ if (IS_ERR(port))
+ ret = PTR_ERR(port);
+ else
+ zfcp_erp_port_reopen(port, 0, 149, NULL);
+ if (acc->control & 0x80) /* last entry */
+ break;
+ }
+
+ zfcp_erp_wait(adapter);
+ list_for_each_entry_safe(port, tmp, &adapter->port_list_head, list)
+ zfcp_validate_port(port);
+ up(&zfcp_data.config_sema);
+ return ret;
+}
+
+/**
+ * zfcp_scan_ports - scan remote ports and attach new ports
+ * @adapter: pointer to struct zfcp_adapter
+ */
+int zfcp_scan_ports(struct zfcp_adapter *adapter)
+{
+ int ret, i;
+ struct zfcp_gpn_ft *gpn_ft;
+
+ zfcp_erp_wait(adapter); /* wait until adapter is finished with ERP */
+ if (fc_host_port_type(adapter->scsi_host) != FC_PORTTYPE_NPORT)
+ return 0;
+
+ ret = zfcp_scan_get_nameserver(adapter);
+ if (ret)
+ return ret;
+
+ gpn_ft = zfcp_alloc_sg_env();
+ if (!gpn_ft)
+ return -ENOMEM;
+
+ for (i = 0; i < 3; i++) {
+ ret = zfcp_scan_issue_gpn_ft(gpn_ft, adapter);
+ if (!ret) {
+ ret = zfcp_scan_eval_gpn_ft(gpn_ft);
+ if (ret == -EAGAIN)
+ ssleep(1);
+ else
+ break;
+ }
+ }
+ zfcp_free_sg_env(gpn_ft);
+
+ return ret;
+}
+
+
+void _zfcp_scan_ports_later(struct work_struct *work)
+{
+ zfcp_scan_ports(container_of(work, struct zfcp_adapter, scan_work));
+}
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index b2ea4ea..19c1ca9 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -1,54 +1,37 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Implementation of FSF commands.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
#include "zfcp_ext.h"
-static int zfcp_fsf_exchange_config_data_handler(struct zfcp_fsf_req *);
-static void zfcp_fsf_exchange_port_data_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_open_port_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_close_port_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_close_physical_port_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_close_unit_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_send_fcp_command_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_send_fcp_command_task_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_send_fcp_command_task_management_handler(
- struct zfcp_fsf_req *);
-static int zfcp_fsf_abort_fcp_command_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_status_read_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_send_ct_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_send_els_handler(struct zfcp_fsf_req *);
-static int zfcp_fsf_control_file_handler(struct zfcp_fsf_req *);
-static inline int zfcp_fsf_req_sbal_check(
- unsigned long *, struct zfcp_qdio_queue *, int);
-static inline int zfcp_use_one_sbal(
- struct scatterlist *, int, struct scatterlist *, int);
-static struct zfcp_fsf_req *zfcp_fsf_req_alloc(mempool_t *, int);
-static int zfcp_fsf_req_send(struct zfcp_fsf_req *);
-static int zfcp_fsf_protstatus_eval(struct zfcp_fsf_req *);
-static int zfcp_fsf_fsfstatus_eval(struct zfcp_fsf_req *);
-static int zfcp_fsf_fsfstatus_qual_eval(struct zfcp_fsf_req *);
-static void zfcp_fsf_link_down_info_eval(struct zfcp_fsf_req *, u8,
- struct fsf_link_down_info *);
-static int zfcp_fsf_req_dispatch(struct zfcp_fsf_req *);
+static void zfcp_fsf_request_timeout_handler(unsigned long data)
+{
+ struct zfcp_adapter *adapter = (struct zfcp_adapter *) data;
+ zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED, 62,
+ NULL);
+}
+
+static void zfcp_fsf_start_timer(struct zfcp_fsf_req *fsf_req,
+ unsigned long timeout)
+{
+ fsf_req->timer.function = zfcp_fsf_request_timeout_handler;
+ fsf_req->timer.data = (unsigned long) fsf_req->adapter;
+ fsf_req->timer.expires = jiffies + timeout;
+ add_timer(&fsf_req->timer);
+}
+
+static void zfcp_fsf_start_erp_timer(struct zfcp_fsf_req *fsf_req)
+{
+ BUG_ON(!fsf_req->erp_action);
+ fsf_req->timer.function = zfcp_erp_timeout_handler;
+ fsf_req->timer.data = (unsigned long) fsf_req->erp_action;
+ fsf_req->timer.expires = jiffies + 30 * HZ;
+ add_timer(&fsf_req->timer);
+}
/* association between FSF command and FSF QTCB type */
static u32 fsf_qtcb_type[] = {
@@ -67,96 +50,77 @@
[FSF_QTCB_UPLOAD_CONTROL_FILE] = FSF_SUPPORT_COMMAND
};
-static const char zfcp_act_subtable_type[5][8] = {
+static const char *zfcp_act_subtable_type[] = {
"unknown", "OS", "WWPN", "DID", "LUN"
};
-/****************************************************************/
-/*************** FSF related Functions *************************/
-/****************************************************************/
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_FSF
-
-/*
- * function: zfcp_fsf_req_alloc
- *
- * purpose: Obtains an fsf_req and potentially a qtcb (for all but
- * unsolicited requests) via helper functions
- * Does some initial fsf request set-up.
- *
- * returns: pointer to allocated fsf_req if successfull
- * NULL otherwise
- *
- * locks: none
- *
- */
-static struct zfcp_fsf_req *
-zfcp_fsf_req_alloc(mempool_t *pool, int req_flags)
+static void zfcp_act_eval_err(struct zfcp_adapter *adapter, u32 table)
{
- size_t size;
- void *ptr;
- struct zfcp_fsf_req *fsf_req = NULL;
+ u16 subtable = table >> 16;
+ u16 rule = table & 0xffff;
- if (req_flags & ZFCP_REQ_NO_QTCB)
- size = sizeof(struct zfcp_fsf_req);
- else
- size = sizeof(struct zfcp_fsf_req_qtcb);
-
- if (likely(pool))
- ptr = mempool_alloc(pool, GFP_ATOMIC);
- else {
- if (req_flags & ZFCP_REQ_NO_QTCB)
- ptr = kmalloc(size, GFP_ATOMIC);
- else
- ptr = kmem_cache_alloc(zfcp_data.fsf_req_qtcb_cache,
- GFP_ATOMIC);
- }
-
- if (unlikely(!ptr))
- goto out;
-
- memset(ptr, 0, size);
-
- if (req_flags & ZFCP_REQ_NO_QTCB) {
- fsf_req = (struct zfcp_fsf_req *) ptr;
- } else {
- fsf_req = &((struct zfcp_fsf_req_qtcb *) ptr)->fsf_req;
- fsf_req->qtcb = &((struct zfcp_fsf_req_qtcb *) ptr)->qtcb;
- }
-
- fsf_req->pool = pool;
-
- out:
- return fsf_req;
+ if (subtable && subtable < ARRAY_SIZE(zfcp_act_subtable_type))
+ dev_warn(&adapter->ccw_device->dev,
+ "Access denied in subtable %s, rule %d.\n",
+ zfcp_act_subtable_type[subtable], rule);
}
-/*
- * function: zfcp_fsf_req_free
- *
- * purpose: Frees the memory of an fsf_req (and potentially a qtcb) or
- * returns it into the pool via helper functions.
- *
- * returns: sod all
- *
- * locks: none
- */
-void
-zfcp_fsf_req_free(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_access_denied_port(struct zfcp_fsf_req *req,
+ struct zfcp_port *port)
{
- if (likely(fsf_req->pool)) {
- mempool_free(fsf_req, fsf_req->pool);
+ struct fsf_qtcb_header *header = &req->qtcb->header;
+ dev_warn(&req->adapter->ccw_device->dev,
+ "Access denied, cannot send command to port 0x%016Lx.\n",
+ port->wwpn);
+ zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[0]);
+ zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[1]);
+ zfcp_erp_port_access_denied(port, 55, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+}
+
+static void zfcp_fsf_access_denied_unit(struct zfcp_fsf_req *req,
+ struct zfcp_unit *unit)
+{
+ struct fsf_qtcb_header *header = &req->qtcb->header;
+ dev_warn(&req->adapter->ccw_device->dev,
+ "Access denied for unit 0x%016Lx on port 0x%016Lx.\n",
+ unit->fcp_lun, unit->port->wwpn);
+ zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[0]);
+ zfcp_act_eval_err(req->adapter, header->fsf_status_qual.halfword[1]);
+ zfcp_erp_unit_access_denied(unit, 59, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+}
+
+static void zfcp_fsf_class_not_supp(struct zfcp_fsf_req *req)
+{
+ dev_err(&req->adapter->ccw_device->dev,
+ "Required FC class not supported by adapter, "
+ "shutting down adapter.\n");
+ zfcp_erp_adapter_shutdown(req->adapter, 0, 123, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+}
+
+/**
+ * zfcp_fsf_req_free - free memory used by fsf request
+ * @fsf_req: pointer to struct zfcp_fsf_req
+ */
+void zfcp_fsf_req_free(struct zfcp_fsf_req *req)
+{
+ if (likely(req->pool)) {
+ mempool_free(req, req->pool);
return;
}
- if (fsf_req->qtcb) {
- kmem_cache_free(zfcp_data.fsf_req_qtcb_cache, fsf_req);
+ if (req->qtcb) {
+ kmem_cache_free(zfcp_data.fsf_req_qtcb_cache, req);
return;
}
-
- kfree(fsf_req);
}
-/*
+/**
+ * zfcp_fsf_req_dismiss_all - dismiss all fsf requests
+ * @adapter: pointer to struct zfcp_adapter
+ *
* Never ever call this without shutting down the adapter first.
* Otherwise the adapter would continue using and corrupting s390 storage.
* Included BUG_ON() call to ensure this is done.
@@ -164,1827 +128,480 @@
*/
void zfcp_fsf_req_dismiss_all(struct zfcp_adapter *adapter)
{
- struct zfcp_fsf_req *fsf_req, *tmp;
+ struct zfcp_fsf_req *req, *tmp;
unsigned long flags;
LIST_HEAD(remove_queue);
unsigned int i;
- BUG_ON(atomic_test_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status));
+ BUG_ON(atomic_read(&adapter->status) & ZFCP_STATUS_ADAPTER_QDIOUP);
spin_lock_irqsave(&adapter->req_list_lock, flags);
- atomic_set(&adapter->reqs_active, 0);
for (i = 0; i < REQUEST_LIST_SIZE; i++)
list_splice_init(&adapter->req_list[i], &remove_queue);
spin_unlock_irqrestore(&adapter->req_list_lock, flags);
- list_for_each_entry_safe(fsf_req, tmp, &remove_queue, list) {
- list_del(&fsf_req->list);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_DISMISSED;
- zfcp_fsf_req_complete(fsf_req);
+ list_for_each_entry_safe(req, tmp, &remove_queue, list) {
+ list_del(&req->list);
+ req->status |= ZFCP_STATUS_FSFREQ_DISMISSED;
+ zfcp_fsf_req_complete(req);
}
}
-/*
- * function: zfcp_fsf_req_complete
- *
- * purpose: Updates active counts and timers for openfcp-reqs
- * May cleanup request after req_eval returns
- *
- * returns: 0 - success
- * !0 - failure
- *
- * context:
- */
-int
-zfcp_fsf_req_complete(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_status_read_port_closed(struct zfcp_fsf_req *req)
{
- int retval = 0;
- int cleanup;
+ struct fsf_status_read_buffer *sr_buf = req->data;
+ struct zfcp_adapter *adapter = req->adapter;
+ struct zfcp_port *port;
+ int d_id = sr_buf->d_id & ZFCP_DID_MASK;
+ unsigned long flags;
- if (unlikely(fsf_req->fsf_command == FSF_QTCB_UNSOLICITED_STATUS)) {
- ZFCP_LOG_DEBUG("Status read response received\n");
- /*
- * Note: all cleanup handling is done in the callchain of
- * the function call-chain below.
- */
- zfcp_fsf_status_read_handler(fsf_req);
- goto out;
- } else {
- del_timer(&fsf_req->timer);
- zfcp_fsf_protstatus_eval(fsf_req);
- }
-
- /*
- * fsf_req may be deleted due to waking up functions, so
- * cleanup is saved here and used later
- */
- if (likely(fsf_req->status & ZFCP_STATUS_FSFREQ_CLEANUP))
- cleanup = 1;
- else
- cleanup = 0;
-
- fsf_req->status |= ZFCP_STATUS_FSFREQ_COMPLETED;
-
- /* cleanup request if requested by initiator */
- if (likely(cleanup)) {
- ZFCP_LOG_TRACE("removing FSF request %p\n", fsf_req);
- /*
- * lock must not be held here since it will be
- * grabed by the called routine, too
- */
- zfcp_fsf_req_free(fsf_req);
- } else {
- /* notify initiator waiting for the requests completion */
- ZFCP_LOG_TRACE("waking initiator of FSF request %p\n",fsf_req);
- /*
- * FIXME: Race! We must not access fsf_req here as it might have been
- * cleaned up already due to the set ZFCP_STATUS_FSFREQ_COMPLETED
- * flag. It's an improbable case. But, we have the same paranoia for
- * the cleanup flag already.
- * Might better be handled using complete()?
- * (setting the flag and doing wakeup ought to be atomic
- * with regard to checking the flag as long as waitqueue is
- * part of the to be released structure)
- */
- wake_up(&fsf_req->completion_wq);
- }
-
- out:
- return retval;
+ read_lock_irqsave(&zfcp_data.config_lock, flags);
+ list_for_each_entry(port, &adapter->port_list_head, list)
+ if (port->d_id == d_id) {
+ read_unlock_irqrestore(&zfcp_data.config_lock, flags);
+ switch (sr_buf->status_subtype) {
+ case FSF_STATUS_READ_SUB_CLOSE_PHYS_PORT:
+ zfcp_erp_port_reopen(port, 0, 101, req);
+ break;
+ case FSF_STATUS_READ_SUB_ERROR_PORT:
+ zfcp_erp_port_shutdown(port, 0, 122, req);
+ break;
+ }
+ return;
+ }
+ read_unlock_irqrestore(&zfcp_data.config_lock, flags);
}
-/*
- * function: zfcp_fsf_protstatus_eval
- *
- * purpose: evaluates the QTCB of the finished FSF request
- * and initiates appropriate actions
- * (usually calling FSF command specific handlers)
- *
- * returns:
- *
- * context:
- *
- * locks:
- */
-static int
-zfcp_fsf_protstatus_eval(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_bit_error_threshold(struct zfcp_fsf_req *req)
{
- int retval = 0;
- struct zfcp_adapter *adapter = fsf_req->adapter;
- struct fsf_qtcb *qtcb = fsf_req->qtcb;
- union fsf_prot_status_qual *prot_status_qual =
- &qtcb->prefix.prot_status_qual;
+ struct zfcp_adapter *adapter = req->adapter;
+ struct fsf_status_read_buffer *sr_buf = req->data;
+ struct fsf_bit_error_payload *err = &sr_buf->payload.bit_error;
- zfcp_hba_dbf_event_fsf_response(fsf_req);
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_DISMISSED) {
- ZFCP_LOG_DEBUG("fsf_req 0x%lx has been dismissed\n",
- (unsigned long) fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR |
- ZFCP_STATUS_FSFREQ_RETRY; /* only for SCSI cmnds. */
- goto skip_protstatus;
- }
-
- /* evaluate FSF Protocol Status */
- switch (qtcb->prefix.prot_status) {
-
- case FSF_PROT_GOOD:
- case FSF_PROT_FSF_STATUS_PRESENTED:
- break;
-
- case FSF_PROT_QTCB_VERSION_ERROR:
- ZFCP_LOG_NORMAL("error: The adapter %s contains "
- "microcode of version 0x%x, the device driver "
- "only supports 0x%x. Aborting.\n",
- zfcp_get_busid_by_adapter(adapter),
- prot_status_qual->version_error.fsf_version,
- ZFCP_QTCB_VERSION);
- zfcp_erp_adapter_shutdown(adapter, 0, 117, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PROT_SEQ_NUMB_ERROR:
- ZFCP_LOG_NORMAL("bug: Sequence number mismatch between "
- "driver (0x%x) and adapter %s (0x%x). "
- "Restarting all operations on this adapter.\n",
- qtcb->prefix.req_seq_no,
- zfcp_get_busid_by_adapter(adapter),
- prot_status_qual->sequence_error.exp_req_seq_no);
- zfcp_erp_adapter_reopen(adapter, 0, 98, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_RETRY;
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PROT_UNSUPP_QTCB_TYPE:
- ZFCP_LOG_NORMAL("error: Packet header type used by the "
- "device driver is incompatible with "
- "that used on adapter %s. "
- "Stopping all operations on this adapter.\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_shutdown(adapter, 0, 118, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PROT_HOST_CONNECTION_INITIALIZING:
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- atomic_set_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
- &(adapter->status));
- break;
-
- case FSF_PROT_DUPLICATE_REQUEST_ID:
- ZFCP_LOG_NORMAL("bug: The request identifier 0x%Lx "
- "to the adapter %s is ambiguous. "
- "Stopping all operations on this adapter.\n",
- *(unsigned long long*)
- (&qtcb->bottom.support.req_handle),
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_shutdown(adapter, 0, 78, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PROT_LINK_DOWN:
- zfcp_fsf_link_down_info_eval(fsf_req, 37,
- &prot_status_qual->link_down_info);
- /* FIXME: reopening adapter now? better wait for link up */
- zfcp_erp_adapter_reopen(adapter, 0, 79, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PROT_REEST_QUEUE:
- ZFCP_LOG_NORMAL("The local link to adapter with "
- "%s was re-plugged. "
- "Re-starting operations on this adapter.\n",
- zfcp_get_busid_by_adapter(adapter));
- /* All ports should be marked as ready to run again */
- zfcp_erp_modify_adapter_status(adapter, 28, NULL,
- ZFCP_STATUS_COMMON_RUNNING,
- ZFCP_SET);
- zfcp_erp_adapter_reopen(adapter,
- ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED
- | ZFCP_STATUS_COMMON_ERP_FAILED,
- 99, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PROT_ERROR_STATE:
- ZFCP_LOG_NORMAL("error: The adapter %s "
- "has entered the error state. "
- "Restarting all operations on this "
- "adapter.\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_reopen(adapter, 0, 100, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_RETRY;
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: Transfer protocol status information "
- "provided by the adapter %s "
- "is not compatible with the device driver. "
- "Stopping all operations on this adapter. "
- "(debug info 0x%x).\n",
- zfcp_get_busid_by_adapter(adapter),
- qtcb->prefix.prot_status);
- zfcp_erp_adapter_shutdown(adapter, 0, 119, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- }
-
- skip_protstatus:
- /*
- * always call specific handlers to give them a chance to do
- * something meaningful even in error cases
- */
- zfcp_fsf_fsfstatus_eval(fsf_req);
- return retval;
+ dev_warn(&adapter->ccw_device->dev,
+ "Warning: bit error threshold data "
+ "received for the adapter: "
+ "link failures = %i, loss of sync errors = %i, "
+ "loss of signal errors = %i, "
+ "primitive sequence errors = %i, "
+ "invalid transmission word errors = %i, "
+ "CRC errors = %i).\n",
+ err->link_failure_error_count,
+ err->loss_of_sync_error_count,
+ err->loss_of_signal_error_count,
+ err->primitive_sequence_error_count,
+ err->invalid_transmission_word_error_count,
+ err->crc_error_count);
+ dev_warn(&adapter->ccw_device->dev,
+ "Additional bit error threshold data of the adapter: "
+ "primitive sequence event time-outs = %i, "
+ "elastic buffer overrun errors = %i, "
+ "advertised receive buffer-to-buffer credit = %i, "
+ "current receice buffer-to-buffer credit = %i, "
+ "advertised transmit buffer-to-buffer credit = %i, "
+ "current transmit buffer-to-buffer credit = %i).\n",
+ err->primitive_sequence_event_timeout_count,
+ err->elastic_buffer_overrun_error_count,
+ err->advertised_receive_b2b_credit,
+ err->current_receive_b2b_credit,
+ err->advertised_transmit_b2b_credit,
+ err->current_transmit_b2b_credit);
}
-/*
- * function: zfcp_fsf_fsfstatus_eval
- *
- * purpose: evaluates FSF status of completed FSF request
- * and acts accordingly
- *
- * returns:
- */
-static int
-zfcp_fsf_fsfstatus_eval(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_link_down_info_eval(struct zfcp_fsf_req *req, u8 id,
+ struct fsf_link_down_info *link_down)
{
- int retval = 0;
+ struct zfcp_adapter *adapter = req->adapter;
- if (unlikely(fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR)) {
- goto skip_fsfstatus;
- }
-
- /* evaluate FSF Status */
- switch (fsf_req->qtcb->header.fsf_status) {
- case FSF_UNKNOWN_COMMAND:
- ZFCP_LOG_NORMAL("bug: Command issued by the device driver is "
- "not known by the adapter %s "
- "Stopping all operations on this adapter. "
- "(debug info 0x%x).\n",
- zfcp_get_busid_by_adapter(fsf_req->adapter),
- fsf_req->qtcb->header.fsf_command);
- zfcp_erp_adapter_shutdown(fsf_req->adapter, 0, 120, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_FCP_RSP_AVAILABLE:
- ZFCP_LOG_DEBUG("FCP Sense data will be presented to the "
- "SCSI stack.\n");
- break;
-
- case FSF_ADAPTER_STATUS_AVAILABLE:
- zfcp_fsf_fsfstatus_qual_eval(fsf_req);
- break;
- }
-
- skip_fsfstatus:
- /*
- * always call specific handlers to give them a chance to do
- * something meaningful even in error cases
- */
- zfcp_fsf_req_dispatch(fsf_req);
-
- return retval;
-}
-
-/*
- * function: zfcp_fsf_fsfstatus_qual_eval
- *
- * purpose: evaluates FSF status-qualifier of completed FSF request
- * and acts accordingly
- *
- * returns:
- */
-static int
-zfcp_fsf_fsfstatus_qual_eval(struct zfcp_fsf_req *fsf_req)
-{
- int retval = 0;
-
- switch (fsf_req->qtcb->header.fsf_status_qual.word[0]) {
- case FSF_SQ_FCP_RSP_AVAILABLE:
- break;
- case FSF_SQ_RETRY_IF_POSSIBLE:
- /* The SCSI-stack may now issue retries or escalate */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_SQ_COMMAND_ABORTED:
- /* Carry the aborted state on to upper layer */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ABORTED;
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_SQ_NO_RECOM:
- ZFCP_LOG_NORMAL("bug: No recommendation could be given for a "
- "problem on the adapter %s "
- "Stopping all operations on this adapter. ",
- zfcp_get_busid_by_adapter(fsf_req->adapter));
- zfcp_erp_adapter_shutdown(fsf_req->adapter, 0, 121, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_SQ_ULP_PROGRAMMING_ERROR:
- ZFCP_LOG_NORMAL("error: not enough SBALs for data transfer "
- "(adapter %s)\n",
- zfcp_get_busid_by_adapter(fsf_req->adapter));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- case FSF_SQ_NO_RETRY_POSSIBLE:
- case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- /* dealt with in the respective functions */
- break;
- default:
- ZFCP_LOG_NORMAL("bug: Additional status info could "
- "not be interpreted properly.\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_NORMAL,
- (char *) &fsf_req->qtcb->header.fsf_status_qual,
- sizeof (union fsf_status_qual));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- }
-
- return retval;
-}
-
-/**
- * zfcp_fsf_link_down_info_eval - evaluate link down information block
- */
-static void
-zfcp_fsf_link_down_info_eval(struct zfcp_fsf_req *fsf_req, u8 id,
- struct fsf_link_down_info *link_down)
-{
- struct zfcp_adapter *adapter = fsf_req->adapter;
-
- if (atomic_test_mask(ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED,
- &adapter->status))
+ if (atomic_read(&adapter->status) & ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED)
return;
atomic_set_mask(ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED, &adapter->status);
- if (link_down == NULL)
+ if (!link_down)
goto out;
switch (link_down->error_code) {
case FSF_PSQ_LINK_NO_LIGHT:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(no light detected)\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: no light detected.\n");
break;
case FSF_PSQ_LINK_WRAP_PLUG:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(wrap plug detected)\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: wrap plug detected.\n");
break;
case FSF_PSQ_LINK_NO_FCP:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(adjacent node on link does not support FCP)\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: "
+ "adjacent node on link does not support FCP.\n");
break;
case FSF_PSQ_LINK_FIRMWARE_UPDATE:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(firmware update in progress)\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: "
+ "firmware update in progress.\n");
+ break;
case FSF_PSQ_LINK_INVALID_WWPN:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(duplicate or invalid WWPN detected)\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: "
+ "duplicate or invalid WWPN detected.\n");
break;
case FSF_PSQ_LINK_NO_NPIV_SUPPORT:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(no support for NPIV by Fabric)\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: "
+ "no support for NPIV by Fabric.\n");
break;
case FSF_PSQ_LINK_NO_FCP_RESOURCES:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(out of resource in FCP daughtercard)\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: "
+ "out of resource in FCP daughtercard.\n");
break;
case FSF_PSQ_LINK_NO_FABRIC_RESOURCES:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(out of resource in Fabric)\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: "
+ "out of resource in Fabric.\n");
break;
case FSF_PSQ_LINK_FABRIC_LOGIN_UNABLE:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(unable to Fabric login)\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link is down: "
+ "unable to login to Fabric.\n");
break;
case FSF_PSQ_LINK_WWPN_ASSIGNMENT_CORRUPTED:
- ZFCP_LOG_NORMAL("WWPN assignment file corrupted on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "WWPN assignment file corrupted on adapter.\n");
break;
case FSF_PSQ_LINK_MODE_TABLE_CURRUPTED:
- ZFCP_LOG_NORMAL("Mode table corrupted on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "Mode table corrupted on adapter.\n");
break;
case FSF_PSQ_LINK_NO_WWPN_ASSIGNMENT:
- ZFCP_LOG_NORMAL("No WWPN for assignment table on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_warn(&req->adapter->ccw_device->dev,
+ "No WWPN for assignment table on adapter.\n");
break;
default:
- ZFCP_LOG_NORMAL("The local link to adapter %s is down "
- "(warning: unknown reason code %d)\n",
- zfcp_get_busid_by_adapter(adapter),
- link_down->error_code);
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The local link to adapter is down.\n");
}
-
- if (adapter->connection_features & FSF_FEATURE_NPIV_MODE)
- ZFCP_LOG_DEBUG("Debug information to link down: "
- "primary_status=0x%02x "
- "ioerr_code=0x%02x "
- "action_code=0x%02x "
- "reason_code=0x%02x "
- "explanation_code=0x%02x "
- "vendor_specific_code=0x%02x\n",
- link_down->primary_status,
- link_down->ioerr_code,
- link_down->action_code,
- link_down->reason_code,
- link_down->explanation_code,
- link_down->vendor_specific_code);
-
- out:
- zfcp_erp_adapter_failed(adapter, id, fsf_req);
+out:
+ zfcp_erp_adapter_failed(adapter, id, req);
}
-/*
- * function: zfcp_fsf_req_dispatch
- *
- * purpose: calls the appropriate command specific handler
- *
- * returns:
- */
-static int
-zfcp_fsf_req_dispatch(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_status_read_link_down(struct zfcp_fsf_req *req)
{
- struct zfcp_erp_action *erp_action = fsf_req->erp_action;
- struct zfcp_adapter *adapter = fsf_req->adapter;
- int retval = 0;
+ struct zfcp_adapter *adapter = req->adapter;
+ struct fsf_status_read_buffer *sr_buf = req->data;
+ struct fsf_link_down_info *ldi =
+ (struct fsf_link_down_info *) &sr_buf->payload;
-
- switch (fsf_req->fsf_command) {
-
- case FSF_QTCB_FCP_CMND:
- zfcp_fsf_send_fcp_command_handler(fsf_req);
+ switch (sr_buf->status_subtype) {
+ case FSF_STATUS_READ_SUB_NO_PHYSICAL_LINK:
+ dev_warn(&adapter->ccw_device->dev,
+ "Physical link is down.\n");
+ zfcp_fsf_link_down_info_eval(req, 38, ldi);
break;
-
- case FSF_QTCB_ABORT_FCP_CMND:
- zfcp_fsf_abort_fcp_command_handler(fsf_req);
+ case FSF_STATUS_READ_SUB_FDISC_FAILED:
+ dev_warn(&adapter->ccw_device->dev,
+ "Local link is down "
+ "due to failed FDISC login.\n");
+ zfcp_fsf_link_down_info_eval(req, 39, ldi);
break;
-
- case FSF_QTCB_SEND_GENERIC:
- zfcp_fsf_send_ct_handler(fsf_req);
- break;
-
- case FSF_QTCB_OPEN_PORT_WITH_DID:
- zfcp_fsf_open_port_handler(fsf_req);
- break;
-
- case FSF_QTCB_OPEN_LUN:
- zfcp_fsf_open_unit_handler(fsf_req);
- break;
-
- case FSF_QTCB_CLOSE_LUN:
- zfcp_fsf_close_unit_handler(fsf_req);
- break;
-
- case FSF_QTCB_CLOSE_PORT:
- zfcp_fsf_close_port_handler(fsf_req);
- break;
-
- case FSF_QTCB_CLOSE_PHYSICAL_PORT:
- zfcp_fsf_close_physical_port_handler(fsf_req);
- break;
-
- case FSF_QTCB_EXCHANGE_CONFIG_DATA:
- zfcp_fsf_exchange_config_data_handler(fsf_req);
- break;
-
- case FSF_QTCB_EXCHANGE_PORT_DATA:
- zfcp_fsf_exchange_port_data_handler(fsf_req);
- break;
-
- case FSF_QTCB_SEND_ELS:
- zfcp_fsf_send_els_handler(fsf_req);
- break;
-
- case FSF_QTCB_DOWNLOAD_CONTROL_FILE:
- zfcp_fsf_control_file_handler(fsf_req);
- break;
-
- case FSF_QTCB_UPLOAD_CONTROL_FILE:
- zfcp_fsf_control_file_handler(fsf_req);
- break;
-
- default:
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- ZFCP_LOG_NORMAL("bug: Command issued by the device driver is "
- "not supported by the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- if (fsf_req->fsf_command != fsf_req->qtcb->header.fsf_command)
- ZFCP_LOG_NORMAL
- ("bug: Command issued by the device driver differs "
- "from the command returned by the adapter %s "
- "(debug info 0x%x, 0x%x).\n",
- zfcp_get_busid_by_adapter(adapter),
- fsf_req->fsf_command,
- fsf_req->qtcb->header.fsf_command);
- }
-
- if (!erp_action)
- return retval;
-
- zfcp_erp_async_handler(erp_action, 0);
-
- return retval;
+ case FSF_STATUS_READ_SUB_FIRMWARE_UPDATE:
+ dev_warn(&adapter->ccw_device->dev,
+ "Local link is down "
+ "due to firmware update on adapter.\n");
+ zfcp_fsf_link_down_info_eval(req, 40, NULL);
+ };
}
-/*
- * function: zfcp_fsf_status_read
- *
- * purpose: initiates a Status Read command at the specified adapter
- *
- * returns:
- */
-int
-zfcp_fsf_status_read(struct zfcp_adapter *adapter, int req_flags)
+static void zfcp_fsf_status_read_handler(struct zfcp_fsf_req *req)
{
- struct zfcp_fsf_req *fsf_req;
- struct fsf_status_read_buffer *status_buffer;
- unsigned long lock_flags;
- volatile struct qdio_buffer_element *sbale;
- int retval = 0;
+ struct zfcp_adapter *adapter = req->adapter;
+ struct fsf_status_read_buffer *sr_buf = req->data;
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(adapter, FSF_QTCB_UNSOLICITED_STATUS,
- req_flags | ZFCP_REQ_NO_QTCB,
- adapter->pool.fsf_req_status_read,
- &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Could not create unsolicited status "
- "buffer for adapter %s.\n",
- zfcp_get_busid_by_adapter(adapter));
- goto failed_req_create;
+ if (req->status & ZFCP_STATUS_FSFREQ_DISMISSED) {
+ zfcp_hba_dbf_event_fsf_unsol("dism", adapter, sr_buf);
+ mempool_free(sr_buf, adapter->pool.data_status_read);
+ zfcp_fsf_req_free(req);
+ return;
}
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_STATUS;
- sbale[2].flags |= SBAL_FLAGS_LAST_ENTRY;
- fsf_req->sbale_curr = 2;
+ zfcp_hba_dbf_event_fsf_unsol("read", adapter, sr_buf);
- status_buffer =
- mempool_alloc(adapter->pool.data_status_read, GFP_ATOMIC);
- if (!status_buffer) {
- ZFCP_LOG_NORMAL("bug: could not get some buffer\n");
- goto failed_buf;
- }
- memset(status_buffer, 0, sizeof (struct fsf_status_read_buffer));
- fsf_req->data = (unsigned long) status_buffer;
-
- /* insert pointer to respective buffer */
- sbale = zfcp_qdio_sbale_curr(fsf_req);
- sbale->addr = (void *) status_buffer;
- sbale->length = sizeof(struct fsf_status_read_buffer);
-
- retval = zfcp_fsf_req_send(fsf_req);
- if (retval) {
- ZFCP_LOG_DEBUG("error: Could not set-up unsolicited status "
- "environment.\n");
- goto failed_req_send;
- }
-
- ZFCP_LOG_TRACE("Status Read request initiated (adapter%s)\n",
- zfcp_get_busid_by_adapter(adapter));
- goto out;
-
- failed_req_send:
- mempool_free(status_buffer, adapter->pool.data_status_read);
-
- failed_buf:
- zfcp_fsf_req_free(fsf_req);
- failed_req_create:
- zfcp_hba_dbf_event_fsf_unsol("fail", adapter, NULL);
- out:
- write_unlock_irqrestore(&adapter->request_queue.queue_lock, lock_flags);
- return retval;
-}
-
-static int
-zfcp_fsf_status_read_port_closed(struct zfcp_fsf_req *fsf_req)
-{
- struct fsf_status_read_buffer *status_buffer;
- struct zfcp_adapter *adapter;
- struct zfcp_port *port;
- unsigned long flags;
-
- status_buffer = (struct fsf_status_read_buffer *) fsf_req->data;
- adapter = fsf_req->adapter;
-
- read_lock_irqsave(&zfcp_data.config_lock, flags);
- list_for_each_entry(port, &adapter->port_list_head, list)
- if (port->d_id == (status_buffer->d_id & ZFCP_DID_MASK))
- break;
- read_unlock_irqrestore(&zfcp_data.config_lock, flags);
-
- if (!port || (port->d_id != (status_buffer->d_id & ZFCP_DID_MASK))) {
- ZFCP_LOG_NORMAL("bug: Reopen port indication received for "
- "nonexisting port with d_id 0x%06x on "
- "adapter %s. Ignored.\n",
- status_buffer->d_id & ZFCP_DID_MASK,
- zfcp_get_busid_by_adapter(adapter));
- goto out;
- }
-
- switch (status_buffer->status_subtype) {
-
- case FSF_STATUS_READ_SUB_CLOSE_PHYS_PORT:
- zfcp_erp_port_reopen(port, 0, 101, fsf_req);
- break;
-
- case FSF_STATUS_READ_SUB_ERROR_PORT:
- zfcp_erp_port_shutdown(port, 0, 122, fsf_req);
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: Undefined status subtype received "
- "for a reopen indication on port with "
- "d_id 0x%06x on the adapter %s. "
- "Ignored. (debug info 0x%x)\n",
- status_buffer->d_id,
- zfcp_get_busid_by_adapter(adapter),
- status_buffer->status_subtype);
- }
- out:
- return 0;
-}
-
-/*
- * function: zfcp_fsf_status_read_handler
- *
- * purpose: is called for finished Open Port command
- *
- * returns:
- */
-static int
-zfcp_fsf_status_read_handler(struct zfcp_fsf_req *fsf_req)
-{
- int retval = 0;
- struct zfcp_adapter *adapter = fsf_req->adapter;
- struct fsf_status_read_buffer *status_buffer =
- (struct fsf_status_read_buffer *) fsf_req->data;
- struct fsf_bit_error_payload *fsf_bit_error;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_DISMISSED) {
- zfcp_hba_dbf_event_fsf_unsol("dism", adapter, status_buffer);
- mempool_free(status_buffer, adapter->pool.data_status_read);
- zfcp_fsf_req_free(fsf_req);
- goto out;
- }
-
- zfcp_hba_dbf_event_fsf_unsol("read", adapter, status_buffer);
-
- switch (status_buffer->status_type) {
-
+ switch (sr_buf->status_type) {
case FSF_STATUS_READ_PORT_CLOSED:
- zfcp_fsf_status_read_port_closed(fsf_req);
+ zfcp_fsf_status_read_port_closed(req);
break;
-
case FSF_STATUS_READ_INCOMING_ELS:
- zfcp_fsf_incoming_els(fsf_req);
+ zfcp_fc_incoming_els(req);
break;
-
case FSF_STATUS_READ_SENSE_DATA_AVAIL:
- ZFCP_LOG_INFO("unsolicited sense data received (adapter %s)\n",
- zfcp_get_busid_by_adapter(adapter));
break;
-
case FSF_STATUS_READ_BIT_ERROR_THRESHOLD:
- fsf_bit_error = (struct fsf_bit_error_payload *)
- status_buffer->payload;
- ZFCP_LOG_NORMAL("Warning: bit error threshold data "
- "received (adapter %s, "
- "link failures = %i, loss of sync errors = %i, "
- "loss of signal errors = %i, "
- "primitive sequence errors = %i, "
- "invalid transmission word errors = %i, "
- "CRC errors = %i)\n",
- zfcp_get_busid_by_adapter(adapter),
- fsf_bit_error->link_failure_error_count,
- fsf_bit_error->loss_of_sync_error_count,
- fsf_bit_error->loss_of_signal_error_count,
- fsf_bit_error->primitive_sequence_error_count,
- fsf_bit_error->invalid_transmission_word_error_count,
- fsf_bit_error->crc_error_count);
- ZFCP_LOG_INFO("Additional bit error threshold data "
- "(adapter %s, "
- "primitive sequence event time-outs = %i, "
- "elastic buffer overrun errors = %i, "
- "advertised receive buffer-to-buffer credit = %i, "
- "current receice buffer-to-buffer credit = %i, "
- "advertised transmit buffer-to-buffer credit = %i, "
- "current transmit buffer-to-buffer credit = %i)\n",
- zfcp_get_busid_by_adapter(adapter),
- fsf_bit_error->primitive_sequence_event_timeout_count,
- fsf_bit_error->elastic_buffer_overrun_error_count,
- fsf_bit_error->advertised_receive_b2b_credit,
- fsf_bit_error->current_receive_b2b_credit,
- fsf_bit_error->advertised_transmit_b2b_credit,
- fsf_bit_error->current_transmit_b2b_credit);
+ zfcp_fsf_bit_error_threshold(req);
break;
-
case FSF_STATUS_READ_LINK_DOWN:
- switch (status_buffer->status_subtype) {
- case FSF_STATUS_READ_SUB_NO_PHYSICAL_LINK:
- ZFCP_LOG_INFO("Physical link to adapter %s is down\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_fsf_link_down_info_eval(fsf_req, 38,
- (struct fsf_link_down_info *)
- &status_buffer->payload);
- break;
- case FSF_STATUS_READ_SUB_FDISC_FAILED:
- ZFCP_LOG_INFO("Local link to adapter %s is down "
- "due to failed FDISC login\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_fsf_link_down_info_eval(fsf_req, 39,
- (struct fsf_link_down_info *)
- &status_buffer->payload);
- break;
- case FSF_STATUS_READ_SUB_FIRMWARE_UPDATE:
- ZFCP_LOG_INFO("Local link to adapter %s is down "
- "due to firmware update on adapter\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_fsf_link_down_info_eval(fsf_req, 40, NULL);
- break;
- default:
- ZFCP_LOG_INFO("Local link to adapter %s is down "
- "due to unknown reason\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_fsf_link_down_info_eval(fsf_req, 41, NULL);
- };
+ zfcp_fsf_status_read_link_down(req);
break;
-
case FSF_STATUS_READ_LINK_UP:
- ZFCP_LOG_NORMAL("Local link to adapter %s was replugged. "
- "Restarting operations on this adapter\n",
- zfcp_get_busid_by_adapter(adapter));
+ dev_info(&adapter->ccw_device->dev,
+ "Local link was replugged.\n");
/* All ports should be marked as ready to run again */
zfcp_erp_modify_adapter_status(adapter, 30, NULL,
ZFCP_STATUS_COMMON_RUNNING,
ZFCP_SET);
zfcp_erp_adapter_reopen(adapter,
- ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED
- | ZFCP_STATUS_COMMON_ERP_FAILED,
- 102, fsf_req);
+ ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED |
+ ZFCP_STATUS_COMMON_ERP_FAILED,
+ 102, req);
break;
-
case FSF_STATUS_READ_NOTIFICATION_LOST:
- ZFCP_LOG_NORMAL("Unsolicited status notification(s) lost: "
- "adapter %s%s%s%s%s%s%s%s%s\n",
- zfcp_get_busid_by_adapter(adapter),
- (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_INCOMING_ELS) ?
- ", incoming ELS" : "",
- (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_SENSE_DATA) ?
- ", sense data" : "",
- (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_LINK_STATUS) ?
- ", link status change" : "",
- (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_PORT_CLOSED) ?
- ", port close" : "",
- (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_BIT_ERROR_THRESHOLD) ?
- ", bit error exception" : "",
- (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_ACT_UPDATED) ?
- ", ACT update" : "",
- (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_ACT_HARDENED) ?
- ", ACT hardening" : "",
- (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_FEATURE_UPDATE_ALERT) ?
- ", adapter feature change" : "");
-
- if (status_buffer->status_subtype &
- FSF_STATUS_READ_SUB_ACT_UPDATED)
- zfcp_erp_adapter_access_changed(adapter, 135, fsf_req);
+ if (sr_buf->status_subtype & FSF_STATUS_READ_SUB_ACT_UPDATED)
+ zfcp_erp_adapter_access_changed(adapter, 135, req);
+ if (sr_buf->status_subtype & FSF_STATUS_READ_SUB_INCOMING_ELS)
+ schedule_work(&adapter->scan_work);
break;
-
case FSF_STATUS_READ_CFDC_UPDATED:
- ZFCP_LOG_NORMAL("CFDC has been updated on the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_access_changed(adapter, 136, fsf_req);
+ zfcp_erp_adapter_access_changed(adapter, 136, req);
break;
-
- case FSF_STATUS_READ_CFDC_HARDENED:
- switch (status_buffer->status_subtype) {
- case FSF_STATUS_READ_SUB_CFDC_HARDENED_ON_SE:
- ZFCP_LOG_NORMAL("CFDC of adapter %s saved on SE\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
- case FSF_STATUS_READ_SUB_CFDC_HARDENED_ON_SE2:
- ZFCP_LOG_NORMAL("CFDC of adapter %s has been copied "
- "to the secondary SE\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
- default:
- ZFCP_LOG_NORMAL("CFDC of adapter %s has been hardened\n",
- zfcp_get_busid_by_adapter(adapter));
- }
- break;
-
case FSF_STATUS_READ_FEATURE_UPDATE_ALERT:
- ZFCP_LOG_INFO("List of supported features on adapter %s has "
- "been changed from 0x%08X to 0x%08X\n",
- zfcp_get_busid_by_adapter(adapter),
- *(u32*) (status_buffer->payload + 4),
- *(u32*) (status_buffer->payload));
- adapter->adapter_features = *(u32*) status_buffer->payload;
+ adapter->adapter_features = sr_buf->payload.word[0];
break;
+ }
- default:
- ZFCP_LOG_NORMAL("warning: An unsolicited status packet of unknown "
- "type was received (debug info 0x%x)\n",
- status_buffer->status_type);
- ZFCP_LOG_DEBUG("Dump of status_read_buffer %p:\n",
- status_buffer);
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) status_buffer,
- sizeof (struct fsf_status_read_buffer));
- break;
- }
- mempool_free(status_buffer, adapter->pool.data_status_read);
- zfcp_fsf_req_free(fsf_req);
- /*
- * recycle buffer and start new request repeat until outbound
- * queue is empty or adapter shutdown is requested
- */
- /*
- * FIXME(qdio):
- * we may wait in the req_create for 5s during shutdown, so
- * qdio_cleanup will have to wait at least that long before returning
- * with failure to allow us a proper cleanup under all circumstances
- */
- /*
- * FIXME:
- * allocation failure possible? (Is this code needed?)
- */
- retval = zfcp_fsf_status_read(adapter, 0);
- if (retval < 0) {
- ZFCP_LOG_INFO("Failed to create unsolicited status read "
- "request for the adapter %s.\n",
- zfcp_get_busid_by_adapter(adapter));
- /* temporary fix to avoid status read buffer shortage */
- adapter->status_read_failed++;
- if ((ZFCP_STATUS_READS_RECOM - adapter->status_read_failed)
- < ZFCP_STATUS_READ_FAILED_THRESHOLD) {
- ZFCP_LOG_INFO("restart adapter %s due to status read "
- "buffer shortage\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_reopen(adapter, 0, 103, fsf_req);
- }
- }
- out:
- return retval;
+ mempool_free(sr_buf, adapter->pool.data_status_read);
+ zfcp_fsf_req_free(req);
+
+ atomic_inc(&adapter->stat_miss);
+ schedule_work(&adapter->stat_work);
}
-/*
- * function: zfcp_fsf_abort_fcp_command
- *
- * purpose: tells FSF to abort a running SCSI command
- *
- * returns: address of initiated FSF request
- * NULL - request could not be initiated
- *
- * FIXME(design): should be watched by a timeout !!!
- * FIXME(design) shouldn't this be modified to return an int
- * also...don't know how though
- */
-struct zfcp_fsf_req *
-zfcp_fsf_abort_fcp_command(unsigned long old_req_id,
- struct zfcp_adapter *adapter,
- struct zfcp_unit *unit, int req_flags)
+static void zfcp_fsf_fsfstatus_qual_eval(struct zfcp_fsf_req *req)
{
- volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req = NULL;
- unsigned long lock_flags;
- int retval = 0;
-
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(adapter, FSF_QTCB_ABORT_FCP_CMND,
- req_flags, adapter->pool.fsf_req_abort,
- &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Failed to create an abort command "
- "request for lun 0x%016Lx on port 0x%016Lx "
- "on adapter %s.\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_adapter(adapter));
- goto out;
+ switch (req->qtcb->header.fsf_status_qual.word[0]) {
+ case FSF_SQ_FCP_RSP_AVAILABLE:
+ case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
+ case FSF_SQ_NO_RETRY_POSSIBLE:
+ case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
+ return;
+ case FSF_SQ_COMMAND_ABORTED:
+ req->status |= ZFCP_STATUS_FSFREQ_ABORTED;
+ break;
+ case FSF_SQ_NO_RECOM:
+ dev_err(&req->adapter->ccw_device->dev,
+ "No recommendation could be given for a "
+ "problem on the adapter.\n");
+ zfcp_erp_adapter_shutdown(req->adapter, 0, 121, req);
+ break;
}
-
- if (unlikely(!atomic_test_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
- &unit->status)))
- goto unit_blocked;
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
-
- fsf_req->data = (unsigned long) unit;
-
- /* set handles of unit and its parent port in QTCB */
- fsf_req->qtcb->header.lun_handle = unit->handle;
- fsf_req->qtcb->header.port_handle = unit->port->handle;
-
- /* set handle of request which should be aborted */
- fsf_req->qtcb->bottom.support.req_handle = (u64) old_req_id;
-
- zfcp_fsf_start_timer(fsf_req, ZFCP_SCSI_ER_TIMEOUT);
- retval = zfcp_fsf_req_send(fsf_req);
- if (!retval)
- goto out;
-
- unit_blocked:
- zfcp_fsf_req_free(fsf_req);
- fsf_req = NULL;
-
- out:
- write_unlock_irqrestore(&adapter->request_queue.queue_lock, lock_flags);
- return fsf_req;
+ /* all non-return stats set FSFREQ_ERROR*/
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
}
-/*
- * function: zfcp_fsf_abort_fcp_command_handler
- *
- * purpose: is called for finished Abort FCP Command request
- *
- * returns:
- */
-static int
-zfcp_fsf_abort_fcp_command_handler(struct zfcp_fsf_req *new_fsf_req)
+static void zfcp_fsf_fsfstatus_eval(struct zfcp_fsf_req *req)
{
- int retval = -EINVAL;
- struct zfcp_unit *unit;
- union fsf_status_qual *fsf_stat_qual =
- &new_fsf_req->qtcb->header.fsf_status_qual;
+ if (unlikely(req->status & ZFCP_STATUS_FSFREQ_ERROR))
+ return;
- if (new_fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR) {
- /* do not set ZFCP_STATUS_FSFREQ_ABORTSUCCEEDED */
- goto skip_fsfstatus;
- }
-
- unit = (struct zfcp_unit *) new_fsf_req->data;
-
- /* evaluate FSF status in QTCB */
- switch (new_fsf_req->qtcb->header.fsf_status) {
-
- case FSF_PORT_HANDLE_NOT_VALID:
- if (fsf_stat_qual->word[0] != fsf_stat_qual->word[1]) {
- /*
- * In this case a command that was sent prior to a port
- * reopen was aborted (handles are different). This is
- * fine.
- */
- } else {
- ZFCP_LOG_INFO("Temporary port identifier 0x%x for "
- "port 0x%016Lx on adapter %s invalid. "
- "This may happen occasionally.\n",
- unit->port->handle,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- ZFCP_LOG_INFO("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_INFO,
- (char *) &new_fsf_req->qtcb->header.
- fsf_status_qual,
- sizeof (union fsf_status_qual));
- /* Let's hope this sorts out the mess */
- zfcp_erp_adapter_reopen(unit->port->adapter, 0, 104,
- new_fsf_req);
- new_fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- }
+ switch (req->qtcb->header.fsf_status) {
+ case FSF_UNKNOWN_COMMAND:
+ dev_err(&req->adapter->ccw_device->dev,
+ "Command issued by the device driver (0x%x) is "
+ "not known by the adapter.\n",
+ req->qtcb->header.fsf_command);
+ zfcp_erp_adapter_shutdown(req->adapter, 0, 120, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
- case FSF_LUN_HANDLE_NOT_VALID:
- if (fsf_stat_qual->word[0] != fsf_stat_qual->word[1]) {
- /*
- * In this case a command that was sent prior to a unit
- * reopen was aborted (handles are different).
- * This is fine.
- */
- } else {
- ZFCP_LOG_INFO
- ("Warning: Temporary LUN identifier 0x%x of LUN "
- "0x%016Lx on port 0x%016Lx on adapter %s is "
- "invalid. This may happen in rare cases. "
- "Trying to re-establish link.\n",
- unit->handle,
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- ZFCP_LOG_DEBUG("Status qualifier data:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &new_fsf_req->qtcb->header.
- fsf_status_qual,
- sizeof (union fsf_status_qual));
- /* Let's hope this sorts out the mess */
- zfcp_erp_port_reopen(unit->port, 0, 105, new_fsf_req);
- new_fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- }
- break;
-
- case FSF_FCP_COMMAND_DOES_NOT_EXIST:
- retval = 0;
- new_fsf_req->status |= ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED;
- break;
-
- case FSF_PORT_BOXED:
- ZFCP_LOG_INFO("Remote port 0x%016Lx on adapter %s needs to "
- "be reopened\n", unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- zfcp_erp_port_boxed(unit->port, 47, new_fsf_req);
- new_fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR
- | ZFCP_STATUS_FSFREQ_RETRY;
- break;
-
- case FSF_LUN_BOXED:
- ZFCP_LOG_INFO(
- "unit 0x%016Lx on port 0x%016Lx on adapter %s needs "
- "to be reopened\n",
- unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- zfcp_erp_unit_boxed(unit, 48, new_fsf_req);
- new_fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR
- | ZFCP_STATUS_FSFREQ_RETRY;
- break;
-
case FSF_ADAPTER_STATUS_AVAILABLE:
- switch (new_fsf_req->qtcb->header.fsf_status_qual.word[0]) {
- case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- zfcp_test_link(unit->port);
- new_fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- /* SCSI stack will escalate */
- new_fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- default:
- ZFCP_LOG_NORMAL
- ("bug: Wrong status qualifier 0x%x arrived.\n",
- new_fsf_req->qtcb->header.fsf_status_qual.word[0]);
- break;
- }
+ zfcp_fsf_fsfstatus_qual_eval(req);
break;
+ }
+}
- case FSF_GOOD:
- retval = 0;
- new_fsf_req->status |= ZFCP_STATUS_FSFREQ_ABORTSUCCEEDED;
+static void zfcp_fsf_protstatus_eval(struct zfcp_fsf_req *req)
+{
+ struct zfcp_adapter *adapter = req->adapter;
+ struct fsf_qtcb *qtcb = req->qtcb;
+ union fsf_prot_status_qual *psq = &qtcb->prefix.prot_status_qual;
+
+ zfcp_hba_dbf_event_fsf_response(req);
+
+ if (req->status & ZFCP_STATUS_FSFREQ_DISMISSED) {
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY; /* only for SCSI cmnds. */
+ return;
+ }
+
+ switch (qtcb->prefix.prot_status) {
+ case FSF_PROT_GOOD:
+ case FSF_PROT_FSF_STATUS_PRESENTED:
+ return;
+ case FSF_PROT_QTCB_VERSION_ERROR:
+ dev_err(&adapter->ccw_device->dev,
+ "The QTCB version requested by zfcp (0x%x) is not "
+ "supported by the FCP adapter (lowest supported "
+ "0x%x, highest supported 0x%x).\n",
+ FSF_QTCB_CURRENT_VERSION, psq->word[0],
+ psq->word[1]);
+ zfcp_erp_adapter_shutdown(adapter, 0, 117, req);
break;
-
+ case FSF_PROT_ERROR_STATE:
+ case FSF_PROT_SEQ_NUMB_ERROR:
+ zfcp_erp_adapter_reopen(adapter, 0, 98, req);
+ req->status |= ZFCP_STATUS_FSFREQ_RETRY;
+ break;
+ case FSF_PROT_UNSUPP_QTCB_TYPE:
+ dev_err(&adapter->ccw_device->dev,
+ "Packet header type used by the device driver is "
+ "incompatible with that used on the adapter.\n");
+ zfcp_erp_adapter_shutdown(adapter, 0, 118, req);
+ break;
+ case FSF_PROT_HOST_CONNECTION_INITIALIZING:
+ atomic_set_mask(ZFCP_STATUS_ADAPTER_HOST_CON_INIT,
+ &adapter->status);
+ break;
+ case FSF_PROT_DUPLICATE_REQUEST_ID:
+ dev_err(&adapter->ccw_device->dev,
+ "The request identifier 0x%Lx is ambiguous.\n",
+ (unsigned long long)qtcb->bottom.support.req_handle);
+ zfcp_erp_adapter_shutdown(adapter, 0, 78, req);
+ break;
+ case FSF_PROT_LINK_DOWN:
+ zfcp_fsf_link_down_info_eval(req, 37, &psq->link_down_info);
+ /* FIXME: reopening adapter now? better wait for link up */
+ zfcp_erp_adapter_reopen(adapter, 0, 79, req);
+ break;
+ case FSF_PROT_REEST_QUEUE:
+ /* All ports should be marked as ready to run again */
+ zfcp_erp_modify_adapter_status(adapter, 28, NULL,
+ ZFCP_STATUS_COMMON_RUNNING,
+ ZFCP_SET);
+ zfcp_erp_adapter_reopen(adapter,
+ ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED |
+ ZFCP_STATUS_COMMON_ERP_FAILED, 99, req);
+ break;
default:
- ZFCP_LOG_NORMAL("bug: An unknown FSF Status was presented "
- "(debug info 0x%x)\n",
- new_fsf_req->qtcb->header.fsf_status);
- break;
+ dev_err(&adapter->ccw_device->dev,
+ "Transfer protocol status information"
+ "provided by the adapter (0x%x) "
+ "is not compatible with the device driver.\n",
+ qtcb->prefix.prot_status);
+ zfcp_erp_adapter_shutdown(adapter, 0, 119, req);
}
- skip_fsfstatus:
- return retval;
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
}
/**
- * zfcp_use_one_sbal - checks whether req buffer and resp bother each fit into
- * one SBALE
- * Two scatter-gather lists are passed, one for the reqeust and one for the
- * response.
- */
-static inline int
-zfcp_use_one_sbal(struct scatterlist *req, int req_count,
- struct scatterlist *resp, int resp_count)
-{
- return ((req_count == 1) &&
- (resp_count == 1) &&
- (((unsigned long) zfcp_sg_to_address(&req[0]) &
- PAGE_MASK) ==
- ((unsigned long) (zfcp_sg_to_address(&req[0]) +
- req[0].length - 1) & PAGE_MASK)) &&
- (((unsigned long) zfcp_sg_to_address(&resp[0]) &
- PAGE_MASK) ==
- ((unsigned long) (zfcp_sg_to_address(&resp[0]) +
- resp[0].length - 1) & PAGE_MASK)));
-}
-
-/**
- * zfcp_fsf_send_ct - initiate a Generic Service request (FC-GS)
- * @ct: pointer to struct zfcp_send_ct which conatins all needed data for
- * the request
- * @pool: pointer to memory pool, if non-null this pool is used to allocate
- * a struct zfcp_fsf_req
- * @erp_action: pointer to erp_action, if non-null the Generic Service request
- * is sent within error recovery
- */
-int
-zfcp_fsf_send_ct(struct zfcp_send_ct *ct, mempool_t *pool,
- struct zfcp_erp_action *erp_action)
-{
- volatile struct qdio_buffer_element *sbale;
- struct zfcp_port *port;
- struct zfcp_adapter *adapter;
- struct zfcp_fsf_req *fsf_req;
- unsigned long lock_flags;
- int bytes;
- int ret = 0;
-
- port = ct->port;
- adapter = port->adapter;
-
- ret = zfcp_fsf_req_create(adapter, FSF_QTCB_SEND_GENERIC,
- ZFCP_WAIT_FOR_SBAL | ZFCP_REQ_AUTO_CLEANUP,
- pool, &lock_flags, &fsf_req);
- if (ret < 0) {
- ZFCP_LOG_INFO("error: Could not create CT request (FC-GS) for "
- "adapter: %s\n",
- zfcp_get_busid_by_adapter(adapter));
- goto failed_req;
- }
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- if (zfcp_use_one_sbal(ct->req, ct->req_count,
- ct->resp, ct->resp_count)){
- /* both request buffer and response buffer
- fit into one sbale each */
- sbale[0].flags |= SBAL_FLAGS0_TYPE_WRITE_READ;
- sbale[2].addr = zfcp_sg_to_address(&ct->req[0]);
- sbale[2].length = ct->req[0].length;
- sbale[3].addr = zfcp_sg_to_address(&ct->resp[0]);
- sbale[3].length = ct->resp[0].length;
- sbale[3].flags |= SBAL_FLAGS_LAST_ENTRY;
- } else if (adapter->adapter_features &
- FSF_FEATURE_ELS_CT_CHAINED_SBALS) {
- /* try to use chained SBALs */
- bytes = zfcp_qdio_sbals_from_sg(fsf_req,
- SBAL_FLAGS0_TYPE_WRITE_READ,
- ct->req, ct->req_count,
- ZFCP_MAX_SBALS_PER_CT_REQ);
- if (bytes <= 0) {
- ZFCP_LOG_INFO("error: creation of CT request failed "
- "on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- if (bytes == 0)
- ret = -ENOMEM;
- else
- ret = bytes;
-
- goto failed_send;
- }
- fsf_req->qtcb->bottom.support.req_buf_length = bytes;
- fsf_req->sbale_curr = ZFCP_LAST_SBALE_PER_SBAL;
- bytes = zfcp_qdio_sbals_from_sg(fsf_req,
- SBAL_FLAGS0_TYPE_WRITE_READ,
- ct->resp, ct->resp_count,
- ZFCP_MAX_SBALS_PER_CT_REQ);
- if (bytes <= 0) {
- ZFCP_LOG_INFO("error: creation of CT request failed "
- "on adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- if (bytes == 0)
- ret = -ENOMEM;
- else
- ret = bytes;
-
- goto failed_send;
- }
- fsf_req->qtcb->bottom.support.resp_buf_length = bytes;
- } else {
- /* reject send generic request */
- ZFCP_LOG_INFO(
- "error: microcode does not support chained SBALs,"
- "CT request too big (adapter %s)\n",
- zfcp_get_busid_by_adapter(adapter));
- ret = -EOPNOTSUPP;
- goto failed_send;
- }
-
- /* settings in QTCB */
- fsf_req->qtcb->header.port_handle = port->handle;
- fsf_req->qtcb->bottom.support.service_class =
- ZFCP_FC_SERVICE_CLASS_DEFAULT;
- fsf_req->qtcb->bottom.support.timeout = ct->timeout;
- fsf_req->data = (unsigned long) ct;
-
- zfcp_san_dbf_event_ct_request(fsf_req);
-
- if (erp_action) {
- erp_action->fsf_req = fsf_req;
- fsf_req->erp_action = erp_action;
- zfcp_erp_start_timer(fsf_req);
- } else
- zfcp_fsf_start_timer(fsf_req, ZFCP_FSF_REQUEST_TIMEOUT);
-
- ret = zfcp_fsf_req_send(fsf_req);
- if (ret) {
- ZFCP_LOG_DEBUG("error: initiation of CT request failed "
- "(adapter %s, port 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(adapter), port->wwpn);
- goto failed_send;
- }
-
- ZFCP_LOG_DEBUG("CT request initiated (adapter %s, port 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(adapter), port->wwpn);
- goto out;
-
- failed_send:
- zfcp_fsf_req_free(fsf_req);
- if (erp_action != NULL) {
- erp_action->fsf_req = NULL;
- }
- failed_req:
- out:
- write_unlock_irqrestore(&adapter->request_queue.queue_lock,
- lock_flags);
- return ret;
-}
-
-/**
- * zfcp_fsf_send_ct_handler - handler for Generic Service requests
- * @fsf_req: pointer to struct zfcp_fsf_req
+ * zfcp_fsf_req_complete - process completion of a FSF request
+ * @fsf_req: The FSF request that has been completed.
*
- * Data specific for the Generic Service request is passed using
- * fsf_req->data. There we find the pointer to struct zfcp_send_ct.
- * Usually a specific handler for the CT request is called which is
- * found in this structure.
+ * When a request has been completed either from the FCP adapter,
+ * or it has been dismissed due to a queue shutdown, this function
+ * is called to process the completion status and trigger further
+ * events related to the FSF request.
*/
-static int
-zfcp_fsf_send_ct_handler(struct zfcp_fsf_req *fsf_req)
+void zfcp_fsf_req_complete(struct zfcp_fsf_req *req)
{
- struct zfcp_port *port;
- struct zfcp_adapter *adapter;
- struct zfcp_send_ct *send_ct;
- struct fsf_qtcb_header *header;
- struct fsf_qtcb_bottom_support *bottom;
- int retval = -EINVAL;
- u16 subtable, rule, counter;
-
- adapter = fsf_req->adapter;
- send_ct = (struct zfcp_send_ct *) fsf_req->data;
- port = send_ct->port;
- header = &fsf_req->qtcb->header;
- bottom = &fsf_req->qtcb->bottom.support;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR)
- goto skip_fsfstatus;
-
- /* evaluate FSF status in QTCB */
- switch (header->fsf_status) {
-
- case FSF_GOOD:
- zfcp_san_dbf_event_ct_response(fsf_req);
- retval = 0;
- break;
-
- case FSF_SERVICE_CLASS_NOT_SUPPORTED:
- ZFCP_LOG_INFO("error: adapter %s does not support fc "
- "class %d.\n",
- zfcp_get_busid_by_port(port),
- ZFCP_FC_SERVICE_CLASS_DEFAULT);
- /* stop operation for this adapter */
- zfcp_erp_adapter_shutdown(adapter, 0, 123, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_ADAPTER_STATUS_AVAILABLE:
- switch (header->fsf_status_qual.word[0]){
- case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- /* reopening link to port */
- zfcp_test_link(port);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- /* ERP strategy will escalate */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- default:
- ZFCP_LOG_INFO("bug: Wrong status qualifier 0x%x "
- "arrived.\n",
- header->fsf_status_qual.word[0]);
- break;
- }
- break;
-
- case FSF_ACCESS_DENIED:
- ZFCP_LOG_NORMAL("access denied, cannot send generic service "
- "command (adapter %s, port d_id=0x%06x)\n",
- zfcp_get_busid_by_port(port), port->d_id);
- for (counter = 0; counter < 2; counter++) {
- subtable = header->fsf_status_qual.halfword[counter * 2];
- rule = header->fsf_status_qual.halfword[counter * 2 + 1];
- switch (subtable) {
- case FSF_SQ_CFDC_SUBTABLE_OS:
- case FSF_SQ_CFDC_SUBTABLE_PORT_WWPN:
- case FSF_SQ_CFDC_SUBTABLE_PORT_DID:
- case FSF_SQ_CFDC_SUBTABLE_LUN:
- ZFCP_LOG_INFO("Access denied (%s rule %d)\n",
- zfcp_act_subtable_type[subtable], rule);
- break;
- }
- }
- zfcp_erp_port_access_denied(port, 55, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_GENERIC_COMMAND_REJECTED:
- ZFCP_LOG_INFO("generic service command rejected "
- "(adapter %s, port d_id=0x%06x)\n",
- zfcp_get_busid_by_port(port), port->d_id);
- ZFCP_LOG_INFO("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_INFO,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PORT_HANDLE_NOT_VALID:
- ZFCP_LOG_DEBUG("Temporary port identifier 0x%x for port "
- "0x%016Lx on adapter %s invalid. This may "
- "happen occasionally.\n", port->handle,
- port->wwpn, zfcp_get_busid_by_port(port));
- ZFCP_LOG_INFO("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_INFO,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_adapter_reopen(adapter, 0, 106, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PORT_BOXED:
- ZFCP_LOG_INFO("port needs to be reopened "
- "(adapter %s, port d_id=0x%06x)\n",
- zfcp_get_busid_by_port(port), port->d_id);
- zfcp_erp_port_boxed(port, 49, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR
- | ZFCP_STATUS_FSFREQ_RETRY;
- break;
-
- /* following states should never occure, all cases avoided
- in zfcp_fsf_send_ct - but who knows ... */
- case FSF_PAYLOAD_SIZE_MISMATCH:
- ZFCP_LOG_INFO("payload size mismatch (adapter: %s, "
- "req_buf_length=%d, resp_buf_length=%d)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->req_buf_length, bottom->resp_buf_length);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_REQUEST_SIZE_TOO_LARGE:
- ZFCP_LOG_INFO("request size too large (adapter: %s, "
- "req_buf_length=%d)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->req_buf_length);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_RESPONSE_SIZE_TOO_LARGE:
- ZFCP_LOG_INFO("response size too large (adapter: %s, "
- "resp_buf_length=%d)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->resp_buf_length);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_SBAL_MISMATCH:
- ZFCP_LOG_INFO("SBAL mismatch (adapter: %s, req_buf_length=%d, "
- "resp_buf_length=%d)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->req_buf_length, bottom->resp_buf_length);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: An unknown FSF Status was presented "
- "(debug info 0x%x)\n", header->fsf_status);
- break;
+ if (unlikely(req->fsf_command == FSF_QTCB_UNSOLICITED_STATUS)) {
+ zfcp_fsf_status_read_handler(req);
+ return;
}
-skip_fsfstatus:
- send_ct->status = retval;
+ del_timer(&req->timer);
+ zfcp_fsf_protstatus_eval(req);
+ zfcp_fsf_fsfstatus_eval(req);
+ req->handler(req);
- if (send_ct->handler != NULL)
- send_ct->handler(send_ct->handler_data);
+ if (req->erp_action)
+ zfcp_erp_notify(req->erp_action, 0);
+ req->status |= ZFCP_STATUS_FSFREQ_COMPLETED;
- return retval;
-}
-
-/**
- * zfcp_fsf_send_els - initiate an ELS command (FC-FS)
- * @els: pointer to struct zfcp_send_els which contains all needed data for
- * the command.
- */
-int
-zfcp_fsf_send_els(struct zfcp_send_els *els)
-{
- volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- u32 d_id;
- struct zfcp_adapter *adapter;
- unsigned long lock_flags;
- int bytes;
- int ret = 0;
-
- d_id = els->d_id;
- adapter = els->adapter;
-
- ret = zfcp_fsf_req_create(adapter, FSF_QTCB_SEND_ELS,
- ZFCP_REQ_AUTO_CLEANUP,
- NULL, &lock_flags, &fsf_req);
- if (ret < 0) {
- ZFCP_LOG_INFO("error: creation of ELS request failed "
- "(adapter %s, port d_id: 0x%06x)\n",
- zfcp_get_busid_by_adapter(adapter), d_id);
- goto failed_req;
- }
-
- if (unlikely(!atomic_test_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
- &els->port->status))) {
- ret = -EBUSY;
- goto port_blocked;
- }
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- if (zfcp_use_one_sbal(els->req, els->req_count,
- els->resp, els->resp_count)){
- /* both request buffer and response buffer
- fit into one sbale each */
- sbale[0].flags |= SBAL_FLAGS0_TYPE_WRITE_READ;
- sbale[2].addr = zfcp_sg_to_address(&els->req[0]);
- sbale[2].length = els->req[0].length;
- sbale[3].addr = zfcp_sg_to_address(&els->resp[0]);
- sbale[3].length = els->resp[0].length;
- sbale[3].flags |= SBAL_FLAGS_LAST_ENTRY;
- } else if (adapter->adapter_features &
- FSF_FEATURE_ELS_CT_CHAINED_SBALS) {
- /* try to use chained SBALs */
- bytes = zfcp_qdio_sbals_from_sg(fsf_req,
- SBAL_FLAGS0_TYPE_WRITE_READ,
- els->req, els->req_count,
- ZFCP_MAX_SBALS_PER_ELS_REQ);
- if (bytes <= 0) {
- ZFCP_LOG_INFO("error: creation of ELS request failed "
- "(adapter %s, port d_id: 0x%06x)\n",
- zfcp_get_busid_by_adapter(adapter), d_id);
- if (bytes == 0) {
- ret = -ENOMEM;
- } else {
- ret = bytes;
- }
- goto failed_send;
- }
- fsf_req->qtcb->bottom.support.req_buf_length = bytes;
- fsf_req->sbale_curr = ZFCP_LAST_SBALE_PER_SBAL;
- bytes = zfcp_qdio_sbals_from_sg(fsf_req,
- SBAL_FLAGS0_TYPE_WRITE_READ,
- els->resp, els->resp_count,
- ZFCP_MAX_SBALS_PER_ELS_REQ);
- if (bytes <= 0) {
- ZFCP_LOG_INFO("error: creation of ELS request failed "
- "(adapter %s, port d_id: 0x%06x)\n",
- zfcp_get_busid_by_adapter(adapter), d_id);
- if (bytes == 0) {
- ret = -ENOMEM;
- } else {
- ret = bytes;
- }
- goto failed_send;
- }
- fsf_req->qtcb->bottom.support.resp_buf_length = bytes;
- } else {
- /* reject request */
- ZFCP_LOG_INFO("error: microcode does not support chained SBALs"
- ", ELS request too big (adapter %s, "
- "port d_id: 0x%06x)\n",
- zfcp_get_busid_by_adapter(adapter), d_id);
- ret = -EOPNOTSUPP;
- goto failed_send;
- }
-
- /* settings in QTCB */
- fsf_req->qtcb->bottom.support.d_id = d_id;
- fsf_req->qtcb->bottom.support.service_class =
- ZFCP_FC_SERVICE_CLASS_DEFAULT;
- fsf_req->qtcb->bottom.support.timeout = ZFCP_ELS_TIMEOUT;
- fsf_req->data = (unsigned long) els;
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
-
- zfcp_san_dbf_event_els_request(fsf_req);
-
- zfcp_fsf_start_timer(fsf_req, ZFCP_FSF_REQUEST_TIMEOUT);
- ret = zfcp_fsf_req_send(fsf_req);
- if (ret) {
- ZFCP_LOG_DEBUG("error: initiation of ELS request failed "
- "(adapter %s, port d_id: 0x%06x)\n",
- zfcp_get_busid_by_adapter(adapter), d_id);
- goto failed_send;
- }
-
- ZFCP_LOG_DEBUG("ELS request initiated (adapter %s, port d_id: "
- "0x%06x)\n", zfcp_get_busid_by_adapter(adapter), d_id);
- goto out;
-
- port_blocked:
- failed_send:
- zfcp_fsf_req_free(fsf_req);
-
- failed_req:
- out:
- write_unlock_irqrestore(&adapter->request_queue.queue_lock,
- lock_flags);
-
- return ret;
-}
-
-/**
- * zfcp_fsf_send_els_handler - handler for ELS commands
- * @fsf_req: pointer to struct zfcp_fsf_req
- *
- * Data specific for the ELS command is passed using
- * fsf_req->data. There we find the pointer to struct zfcp_send_els.
- * Usually a specific handler for the ELS command is called which is
- * found in this structure.
- */
-static int zfcp_fsf_send_els_handler(struct zfcp_fsf_req *fsf_req)
-{
- struct zfcp_adapter *adapter;
- struct zfcp_port *port;
- u32 d_id;
- struct fsf_qtcb_header *header;
- struct fsf_qtcb_bottom_support *bottom;
- struct zfcp_send_els *send_els;
- int retval = -EINVAL;
- u16 subtable, rule, counter;
-
- send_els = (struct zfcp_send_els *) fsf_req->data;
- adapter = send_els->adapter;
- port = send_els->port;
- d_id = send_els->d_id;
- header = &fsf_req->qtcb->header;
- bottom = &fsf_req->qtcb->bottom.support;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR)
- goto skip_fsfstatus;
-
- switch (header->fsf_status) {
-
- case FSF_GOOD:
- zfcp_san_dbf_event_els_response(fsf_req);
- retval = 0;
- break;
-
- case FSF_SERVICE_CLASS_NOT_SUPPORTED:
- ZFCP_LOG_INFO("error: adapter %s does not support fc "
- "class %d.\n",
- zfcp_get_busid_by_adapter(adapter),
- ZFCP_FC_SERVICE_CLASS_DEFAULT);
- /* stop operation for this adapter */
- zfcp_erp_adapter_shutdown(adapter, 0, 124, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_ADAPTER_STATUS_AVAILABLE:
- switch (header->fsf_status_qual.word[0]){
- case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- if (port && (send_els->ls_code != ZFCP_LS_ADISC))
- zfcp_test_link(port);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval =
- zfcp_handle_els_rjt(header->fsf_status_qual.word[1],
- (struct zfcp_ls_rjt_par *)
- &header->fsf_status_qual.word[2]);
- break;
- case FSF_SQ_RETRY_IF_POSSIBLE:
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- default:
- ZFCP_LOG_INFO("bug: Wrong status qualifier 0x%x\n",
- header->fsf_status_qual.word[0]);
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_INFO,
- (char*)header->fsf_status_qual.word, 16);
- }
- break;
-
- case FSF_ELS_COMMAND_REJECTED:
- ZFCP_LOG_INFO("ELS has been rejected because command filter "
- "prohibited sending "
- "(adapter: %s, port d_id: 0x%06x)\n",
- zfcp_get_busid_by_adapter(adapter), d_id);
-
- break;
-
- case FSF_PAYLOAD_SIZE_MISMATCH:
- ZFCP_LOG_INFO(
- "ELS request size and ELS response size must be either "
- "both 0, or both greater than 0 "
- "(adapter: %s, req_buf_length=%d resp_buf_length=%d)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->req_buf_length,
- bottom->resp_buf_length);
- break;
-
- case FSF_REQUEST_SIZE_TOO_LARGE:
- ZFCP_LOG_INFO(
- "Length of the ELS request buffer, "
- "specified in QTCB bottom, "
- "exceeds the size of the buffers "
- "that have been allocated for ELS request data "
- "(adapter: %s, req_buf_length=%d)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->req_buf_length);
- break;
-
- case FSF_RESPONSE_SIZE_TOO_LARGE:
- ZFCP_LOG_INFO(
- "Length of the ELS response buffer, "
- "specified in QTCB bottom, "
- "exceeds the size of the buffers "
- "that have been allocated for ELS response data "
- "(adapter: %s, resp_buf_length=%d)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->resp_buf_length);
- break;
-
- case FSF_SBAL_MISMATCH:
- /* should never occure, avoided in zfcp_fsf_send_els */
- ZFCP_LOG_INFO("SBAL mismatch (adapter: %s, req_buf_length=%d, "
- "resp_buf_length=%d)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->req_buf_length, bottom->resp_buf_length);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_ACCESS_DENIED:
- ZFCP_LOG_NORMAL("access denied, cannot send ELS command "
- "(adapter %s, port d_id=0x%06x)\n",
- zfcp_get_busid_by_adapter(adapter), d_id);
- for (counter = 0; counter < 2; counter++) {
- subtable = header->fsf_status_qual.halfword[counter * 2];
- rule = header->fsf_status_qual.halfword[counter * 2 + 1];
- switch (subtable) {
- case FSF_SQ_CFDC_SUBTABLE_OS:
- case FSF_SQ_CFDC_SUBTABLE_PORT_WWPN:
- case FSF_SQ_CFDC_SUBTABLE_PORT_DID:
- case FSF_SQ_CFDC_SUBTABLE_LUN:
- ZFCP_LOG_INFO("Access denied (%s rule %d)\n",
- zfcp_act_subtable_type[subtable], rule);
- break;
- }
- }
- if (port != NULL)
- zfcp_erp_port_access_denied(port, 56, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- default:
- ZFCP_LOG_NORMAL(
- "bug: An unknown FSF Status was presented "
- "(adapter: %s, fsf_status=0x%08x)\n",
- zfcp_get_busid_by_adapter(adapter),
- header->fsf_status);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- }
-
-skip_fsfstatus:
- send_els->status = retval;
-
- if (send_els->handler)
- send_els->handler(send_els->handler_data);
-
- return retval;
-}
-
-int
-zfcp_fsf_exchange_config_data(struct zfcp_erp_action *erp_action)
-{
- volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- struct zfcp_adapter *adapter = erp_action->adapter;
- unsigned long lock_flags;
- int retval;
-
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(adapter,
- FSF_QTCB_EXCHANGE_CONFIG_DATA,
- ZFCP_REQ_AUTO_CLEANUP,
- adapter->pool.fsf_req_erp,
- &lock_flags, &fsf_req);
- if (retval) {
- ZFCP_LOG_INFO("error: Could not create exchange configuration "
- "data request for adapter %s.\n",
- zfcp_get_busid_by_adapter(adapter));
- write_unlock_irqrestore(&adapter->request_queue.queue_lock,
- lock_flags);
- return retval;
- }
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
-
- fsf_req->qtcb->bottom.config.feature_selection =
- FSF_FEATURE_CFDC |
- FSF_FEATURE_LUN_SHARING |
- FSF_FEATURE_NOTIFICATION_LOST |
- FSF_FEATURE_UPDATE_ALERT;
- fsf_req->erp_action = erp_action;
- erp_action->fsf_req = fsf_req;
-
- zfcp_erp_start_timer(fsf_req);
- retval = zfcp_fsf_req_send(fsf_req);
- write_unlock_irqrestore(&adapter->request_queue.queue_lock,
- lock_flags);
- if (retval) {
- ZFCP_LOG_INFO("error: Could not send exchange configuration "
- "data command on the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_fsf_req_free(fsf_req);
- erp_action->fsf_req = NULL;
- }
+ if (likely(req->status & ZFCP_STATUS_FSFREQ_CLEANUP))
+ zfcp_fsf_req_free(req);
else
- ZFCP_LOG_DEBUG("exchange configuration data request initiated "
- "(adapter %s)\n",
- zfcp_get_busid_by_adapter(adapter));
-
- return retval;
+ /* notify initiator waiting for the requests completion */
+ /*
+ * FIXME: Race! We must not access fsf_req here as it might have been
+ * cleaned up already due to the set ZFCP_STATUS_FSFREQ_COMPLETED
+ * flag. It's an improbable case. But, we have the same paranoia for
+ * the cleanup flag already.
+ * Might better be handled using complete()?
+ * (setting the flag and doing wakeup ought to be atomic
+ * with regard to checking the flag as long as waitqueue is
+ * part of the to be released structure)
+ */
+ wake_up(&req->completion_wq);
}
-int
-zfcp_fsf_exchange_config_data_sync(struct zfcp_adapter *adapter,
- struct fsf_qtcb_bottom_config *data)
-{
- volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- unsigned long lock_flags;
- int retval;
-
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_CONFIG_DATA,
- ZFCP_WAIT_FOR_SBAL, NULL, &lock_flags,
- &fsf_req);
- if (retval) {
- ZFCP_LOG_INFO("error: Could not create exchange configuration "
- "data request for adapter %s.\n",
- zfcp_get_busid_by_adapter(adapter));
- write_unlock_irqrestore(&adapter->request_queue.queue_lock,
- lock_flags);
- return retval;
- }
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
-
- fsf_req->qtcb->bottom.config.feature_selection =
- FSF_FEATURE_CFDC |
- FSF_FEATURE_LUN_SHARING |
- FSF_FEATURE_NOTIFICATION_LOST |
- FSF_FEATURE_UPDATE_ALERT;
-
- if (data)
- fsf_req->data = (unsigned long) data;
-
- zfcp_fsf_start_timer(fsf_req, ZFCP_FSF_REQUEST_TIMEOUT);
- retval = zfcp_fsf_req_send(fsf_req);
- write_unlock_irqrestore(&adapter->request_queue.queue_lock,
- lock_flags);
- if (retval)
- ZFCP_LOG_INFO("error: Could not send exchange configuration "
- "data command on the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- else
- wait_event(fsf_req->completion_wq,
- fsf_req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
-
- zfcp_fsf_req_free(fsf_req);
-
- return retval;
-}
-
-/**
- * zfcp_fsf_exchange_config_evaluate
- * @fsf_req: fsf_req which belongs to xchg config data request
- * @xchg_ok: specifies if xchg config data was incomplete or complete (0/1)
- *
- * returns: -EIO on error, 0 otherwise
- */
-static int
-zfcp_fsf_exchange_config_evaluate(struct zfcp_fsf_req *fsf_req, int xchg_ok)
+static int zfcp_fsf_exchange_config_evaluate(struct zfcp_fsf_req *req)
{
struct fsf_qtcb_bottom_config *bottom;
- struct zfcp_adapter *adapter = fsf_req->adapter;
+ struct zfcp_adapter *adapter = req->adapter;
struct Scsi_Host *shost = adapter->scsi_host;
- bottom = &fsf_req->qtcb->bottom.config;
- ZFCP_LOG_DEBUG("low/high QTCB version 0x%x/0x%x of FSF\n",
- bottom->low_qtcb_version, bottom->high_qtcb_version);
+ bottom = &req->qtcb->bottom.config;
+
+ if (req->data)
+ memcpy(req->data, bottom, sizeof(*bottom));
+
+ fc_host_node_name(shost) = bottom->nport_serv_param.wwnn;
+ fc_host_port_name(shost) = bottom->nport_serv_param.wwpn;
+ fc_host_port_id(shost) = bottom->s_id & ZFCP_DID_MASK;
+ fc_host_speed(shost) = bottom->fc_link_speed;
+ fc_host_supported_classes(shost) = FC_COS_CLASS2 | FC_COS_CLASS3;
+
+ adapter->hydra_version = bottom->adapter_type;
+ adapter->timer_ticks = bottom->timer_interval;
+
+ if (fc_host_permanent_port_name(shost) == -1)
+ fc_host_permanent_port_name(shost) = fc_host_port_name(shost);
+
+ switch (bottom->fc_topology) {
+ case FSF_TOPO_P2P:
+ adapter->peer_d_id = bottom->peer_d_id & ZFCP_DID_MASK;
+ adapter->peer_wwpn = bottom->plogi_payload.wwpn;
+ adapter->peer_wwnn = bottom->plogi_payload.wwnn;
+ fc_host_port_type(shost) = FC_PORTTYPE_PTP;
+ if (req->erp_action)
+ dev_info(&adapter->ccw_device->dev,
+ "Point-to-Point fibrechannel "
+ "configuration detected.\n");
+ break;
+ case FSF_TOPO_FABRIC:
+ fc_host_port_type(shost) = FC_PORTTYPE_NPORT;
+ if (req->erp_action)
+ dev_info(&adapter->ccw_device->dev,
+ "Switched fabric fibrechannel "
+ "network detected.\n");
+ break;
+ case FSF_TOPO_AL:
+ fc_host_port_type(shost) = FC_PORTTYPE_NLPORT;
+ dev_err(&adapter->ccw_device->dev,
+ "Unsupported arbitrated loop fibrechannel "
+ "topology detected, shutting down "
+ "adapter.\n");
+ zfcp_erp_adapter_shutdown(adapter, 0, 127, req);
+ return -EIO;
+ default:
+ fc_host_port_type(shost) = FC_PORTTYPE_UNKNOWN;
+ dev_err(&adapter->ccw_device->dev,
+ "The fibrechannel topology reported by the"
+ " adapter is not known by the zfcp driver,"
+ " shutting down adapter.\n");
+ zfcp_erp_adapter_shutdown(adapter, 0, 128, req);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static void zfcp_fsf_exchange_config_data_handler(struct zfcp_fsf_req *req)
+{
+ struct zfcp_adapter *adapter = req->adapter;
+ struct fsf_qtcb *qtcb = req->qtcb;
+ struct fsf_qtcb_bottom_config *bottom = &qtcb->bottom.config;
+ struct Scsi_Host *shost = adapter->scsi_host;
+
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
+ return;
+
adapter->fsf_lic_version = bottom->lic_version;
adapter->adapter_features = bottom->adapter_features;
adapter->connection_features = bottom->connection_features;
@@ -1992,40 +609,41 @@
adapter->peer_wwnn = 0;
adapter->peer_d_id = 0;
- if (xchg_ok) {
+ switch (qtcb->header.fsf_status) {
+ case FSF_GOOD:
+ if (zfcp_fsf_exchange_config_evaluate(req))
+ return;
- if (fsf_req->data)
- memcpy((struct fsf_qtcb_bottom_config *) fsf_req->data,
- bottom, sizeof (struct fsf_qtcb_bottom_config));
-
- fc_host_node_name(shost) = bottom->nport_serv_param.wwnn;
- fc_host_port_name(shost) = bottom->nport_serv_param.wwpn;
- fc_host_port_id(shost) = bottom->s_id & ZFCP_DID_MASK;
- fc_host_speed(shost) = bottom->fc_link_speed;
- fc_host_supported_classes(shost) =
- FC_COS_CLASS2 | FC_COS_CLASS3;
- adapter->hydra_version = bottom->adapter_type;
- if (fc_host_permanent_port_name(shost) == -1)
- fc_host_permanent_port_name(shost) =
- fc_host_port_name(shost);
- if (bottom->fc_topology == FSF_TOPO_P2P) {
- adapter->peer_d_id = bottom->peer_d_id & ZFCP_DID_MASK;
- adapter->peer_wwpn = bottom->plogi_payload.wwpn;
- adapter->peer_wwnn = bottom->plogi_payload.wwnn;
- fc_host_port_type(shost) = FC_PORTTYPE_PTP;
- } else if (bottom->fc_topology == FSF_TOPO_FABRIC)
- fc_host_port_type(shost) = FC_PORTTYPE_NPORT;
- else if (bottom->fc_topology == FSF_TOPO_AL)
- fc_host_port_type(shost) = FC_PORTTYPE_NLPORT;
- else
- fc_host_port_type(shost) = FC_PORTTYPE_UNKNOWN;
- } else {
+ if (bottom->max_qtcb_size < sizeof(struct fsf_qtcb)) {
+ dev_err(&adapter->ccw_device->dev,
+ "Maximum QTCB size (%d bytes) allowed by "
+ "the adapter is lower than the minimum "
+ "required by the driver (%ld bytes).\n",
+ bottom->max_qtcb_size,
+ sizeof(struct fsf_qtcb));
+ zfcp_erp_adapter_shutdown(adapter, 0, 129, req);
+ return;
+ }
+ atomic_set_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK,
+ &adapter->status);
+ break;
+ case FSF_EXCHANGE_CONFIG_DATA_INCOMPLETE:
fc_host_node_name(shost) = 0;
fc_host_port_name(shost) = 0;
fc_host_port_id(shost) = 0;
fc_host_speed(shost) = FC_PORTSPEED_UNKNOWN;
fc_host_port_type(shost) = FC_PORTTYPE_UNKNOWN;
adapter->hydra_version = 0;
+
+ atomic_set_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK,
+ &adapter->status);
+
+ zfcp_fsf_link_down_info_eval(req, 42,
+ &qtcb->header.fsf_status_qual.link_down_info);
+ break;
+ default:
+ zfcp_erp_adapter_shutdown(adapter, 0, 130, req);
+ return;
}
if (adapter->adapter_features & FSF_FEATURE_HBAAPI_MANAGEMENT) {
@@ -2036,271 +654,29 @@
min(FC_SERIAL_NUMBER_SIZE, 17));
}
- if (fsf_req->erp_action)
- ZFCP_LOG_NORMAL("The adapter %s reported the following "
- "characteristics:\n"
- "WWNN 0x%016Lx, WWPN 0x%016Lx, "
- "S_ID 0x%06x,\n"
- "adapter version 0x%x, "
- "LIC version 0x%x, "
- "FC link speed %d Gb/s\n",
- zfcp_get_busid_by_adapter(adapter),
- (wwn_t) fc_host_node_name(shost),
- (wwn_t) fc_host_port_name(shost),
- fc_host_port_id(shost),
- adapter->hydra_version,
- adapter->fsf_lic_version,
- fc_host_speed(shost));
- if (ZFCP_QTCB_VERSION < bottom->low_qtcb_version) {
- ZFCP_LOG_NORMAL("error: the adapter %s "
- "only supports newer control block "
- "versions in comparison to this device "
- "driver (try updated device driver)\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_shutdown(adapter, 0, 125, fsf_req);
- return -EIO;
+ if (FSF_QTCB_CURRENT_VERSION < bottom->low_qtcb_version) {
+ dev_err(&adapter->ccw_device->dev,
+ "The adapter only supports newer control block "
+ "versions, try updated device driver.\n");
+ zfcp_erp_adapter_shutdown(adapter, 0, 125, req);
+ return;
}
- if (ZFCP_QTCB_VERSION > bottom->high_qtcb_version) {
- ZFCP_LOG_NORMAL("error: the adapter %s "
- "only supports older control block "
- "versions than this device driver uses"
- "(consider a microcode upgrade)\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_shutdown(adapter, 0, 126, fsf_req);
- return -EIO;
+ if (FSF_QTCB_CURRENT_VERSION > bottom->high_qtcb_version) {
+ dev_err(&adapter->ccw_device->dev,
+ "The adapter only supports older control block "
+ "versions, consider a microcode upgrade.\n");
+ zfcp_erp_adapter_shutdown(adapter, 0, 126, req);
}
- return 0;
}
-/**
- * function: zfcp_fsf_exchange_config_data_handler
- *
- * purpose: is called for finished Exchange Configuration Data command
- *
- * returns:
- */
-static int
-zfcp_fsf_exchange_config_data_handler(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_exchange_port_evaluate(struct zfcp_fsf_req *req)
{
- struct fsf_qtcb_bottom_config *bottom;
- struct zfcp_adapter *adapter = fsf_req->adapter;
- struct fsf_qtcb *qtcb = fsf_req->qtcb;
+ struct zfcp_adapter *adapter = req->adapter;
+ struct fsf_qtcb_bottom_port *bottom = &req->qtcb->bottom.port;
+ struct Scsi_Host *shost = adapter->scsi_host;
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR)
- return -EIO;
-
- switch (qtcb->header.fsf_status) {
-
- case FSF_GOOD:
- if (zfcp_fsf_exchange_config_evaluate(fsf_req, 1))
- return -EIO;
-
- switch (fc_host_port_type(adapter->scsi_host)) {
- case FC_PORTTYPE_PTP:
- ZFCP_LOG_NORMAL("Point-to-Point fibrechannel "
- "configuration detected at adapter %s\n"
- "Peer WWNN 0x%016llx, "
- "peer WWPN 0x%016llx, "
- "peer d_id 0x%06x\n",
- zfcp_get_busid_by_adapter(adapter),
- adapter->peer_wwnn,
- adapter->peer_wwpn,
- adapter->peer_d_id);
- break;
- case FC_PORTTYPE_NLPORT:
- ZFCP_LOG_NORMAL("error: Arbitrated loop fibrechannel "
- "topology detected at adapter %s "
- "unsupported, shutting down adapter\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_shutdown(adapter, 0, 127, fsf_req);
- return -EIO;
- case FC_PORTTYPE_NPORT:
- if (fsf_req->erp_action)
- ZFCP_LOG_NORMAL("Switched fabric fibrechannel "
- "network detected at adapter "
- "%s.\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
- default:
- ZFCP_LOG_NORMAL("bug: The fibrechannel topology "
- "reported by the exchange "
- "configuration command for "
- "the adapter %s is not "
- "of a type known to the zfcp "
- "driver, shutting down adapter\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_erp_adapter_shutdown(adapter, 0, 128, fsf_req);
- return -EIO;
- }
- bottom = &qtcb->bottom.config;
- if (bottom->max_qtcb_size < sizeof(struct fsf_qtcb)) {
- ZFCP_LOG_NORMAL("bug: Maximum QTCB size (%d bytes) "
- "allowed by the adapter %s "
- "is lower than the minimum "
- "required by the driver (%ld bytes).\n",
- bottom->max_qtcb_size,
- zfcp_get_busid_by_adapter(adapter),
- sizeof(struct fsf_qtcb));
- zfcp_erp_adapter_shutdown(adapter, 0, 129, fsf_req);
- return -EIO;
- }
- atomic_set_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK,
- &adapter->status);
- break;
- case FSF_EXCHANGE_CONFIG_DATA_INCOMPLETE:
- if (zfcp_fsf_exchange_config_evaluate(fsf_req, 0))
- return -EIO;
-
- atomic_set_mask(ZFCP_STATUS_ADAPTER_XCONFIG_OK,
- &adapter->status);
-
- zfcp_fsf_link_down_info_eval(fsf_req, 42,
- &qtcb->header.fsf_status_qual.link_down_info);
- break;
- default:
- zfcp_erp_adapter_shutdown(adapter, 0, 130, fsf_req);
- return -EIO;
- }
- return 0;
-}
-
-/**
- * zfcp_fsf_exchange_port_data - request information about local port
- * @erp_action: ERP action for the adapter for which port data is requested
- */
-int
-zfcp_fsf_exchange_port_data(struct zfcp_erp_action *erp_action)
-{
- volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- struct zfcp_adapter *adapter = erp_action->adapter;
- unsigned long lock_flags;
- int retval;
-
- if (!(adapter->adapter_features & FSF_FEATURE_HBAAPI_MANAGEMENT)) {
- ZFCP_LOG_INFO("error: exchange port data "
- "command not supported by adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- return -EOPNOTSUPP;
- }
-
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_PORT_DATA,
- ZFCP_REQ_AUTO_CLEANUP,
- adapter->pool.fsf_req_erp,
- &lock_flags, &fsf_req);
- if (retval) {
- ZFCP_LOG_INFO("error: Out of resources. Could not create an "
- "exchange port data request for "
- "the adapter %s.\n",
- zfcp_get_busid_by_adapter(adapter));
- write_unlock_irqrestore(&adapter->request_queue.queue_lock,
- lock_flags);
- return retval;
- }
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
-
- erp_action->fsf_req = fsf_req;
- fsf_req->erp_action = erp_action;
- zfcp_erp_start_timer(fsf_req);
-
- retval = zfcp_fsf_req_send(fsf_req);
- write_unlock_irqrestore(&adapter->request_queue.queue_lock, lock_flags);
-
- if (retval) {
- ZFCP_LOG_INFO("error: Could not send an exchange port data "
- "command on the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- zfcp_fsf_req_free(fsf_req);
- erp_action->fsf_req = NULL;
- }
- else
- ZFCP_LOG_DEBUG("exchange port data request initiated "
- "(adapter %s)\n",
- zfcp_get_busid_by_adapter(adapter));
- return retval;
-}
-
-
-/**
- * zfcp_fsf_exchange_port_data_sync - request information about local port
- * and wait until information is ready
- */
-int
-zfcp_fsf_exchange_port_data_sync(struct zfcp_adapter *adapter,
- struct fsf_qtcb_bottom_port *data)
-{
- volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- unsigned long lock_flags;
- int retval;
-
- if (!(adapter->adapter_features & FSF_FEATURE_HBAAPI_MANAGEMENT)) {
- ZFCP_LOG_INFO("error: exchange port data "
- "command not supported by adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- return -EOPNOTSUPP;
- }
-
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_PORT_DATA,
- 0, NULL, &lock_flags, &fsf_req);
- if (retval) {
- ZFCP_LOG_INFO("error: Out of resources. Could not create an "
- "exchange port data request for "
- "the adapter %s.\n",
- zfcp_get_busid_by_adapter(adapter));
- write_unlock_irqrestore(&adapter->request_queue.queue_lock,
- lock_flags);
- return retval;
- }
-
- if (data)
- fsf_req->data = (unsigned long) data;
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
-
- zfcp_fsf_start_timer(fsf_req, ZFCP_FSF_REQUEST_TIMEOUT);
- retval = zfcp_fsf_req_send(fsf_req);
- write_unlock_irqrestore(&adapter->request_queue.queue_lock, lock_flags);
-
- if (retval)
- ZFCP_LOG_INFO("error: Could not send an exchange port data "
- "command on the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- else
- wait_event(fsf_req->completion_wq,
- fsf_req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
-
- zfcp_fsf_req_free(fsf_req);
-
- return retval;
-}
-
-/**
- * zfcp_fsf_exchange_port_evaluate
- * @fsf_req: fsf_req which belongs to xchg port data request
- * @xchg_ok: specifies if xchg port data was incomplete or complete (0/1)
- */
-static void
-zfcp_fsf_exchange_port_evaluate(struct zfcp_fsf_req *fsf_req, int xchg_ok)
-{
- struct zfcp_adapter *adapter;
- struct fsf_qtcb_bottom_port *bottom;
- struct Scsi_Host *shost;
-
- adapter = fsf_req->adapter;
- bottom = &fsf_req->qtcb->bottom.port;
- shost = adapter->scsi_host;
-
- if (fsf_req->data)
- memcpy((struct fsf_qtcb_bottom_port*) fsf_req->data, bottom,
- sizeof(struct fsf_qtcb_bottom_port));
+ if (req->data)
+ memcpy(req->data, bottom, sizeof(*bottom));
if (adapter->connection_features & FSF_FEATURE_NPIV_MODE)
fc_host_permanent_port_name(shost) = bottom->wwpn;
@@ -2310,207 +686,801 @@
fc_host_supported_speeds(shost) = bottom->supported_speed;
}
-/**
- * zfcp_fsf_exchange_port_data_handler - handler for exchange_port_data request
- * @fsf_req: pointer to struct zfcp_fsf_req
- */
-static void
-zfcp_fsf_exchange_port_data_handler(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_exchange_port_data_handler(struct zfcp_fsf_req *req)
{
- struct zfcp_adapter *adapter;
- struct fsf_qtcb *qtcb;
+ struct zfcp_adapter *adapter = req->adapter;
+ struct fsf_qtcb *qtcb = req->qtcb;
- adapter = fsf_req->adapter;
- qtcb = fsf_req->qtcb;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR)
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
return;
switch (qtcb->header.fsf_status) {
- case FSF_GOOD:
- zfcp_fsf_exchange_port_evaluate(fsf_req, 1);
+ case FSF_GOOD:
+ zfcp_fsf_exchange_port_evaluate(req);
atomic_set_mask(ZFCP_STATUS_ADAPTER_XPORT_OK, &adapter->status);
break;
case FSF_EXCHANGE_CONFIG_DATA_INCOMPLETE:
- zfcp_fsf_exchange_port_evaluate(fsf_req, 0);
+ zfcp_fsf_exchange_port_evaluate(req);
atomic_set_mask(ZFCP_STATUS_ADAPTER_XPORT_OK, &adapter->status);
- zfcp_fsf_link_down_info_eval(fsf_req, 43,
+ zfcp_fsf_link_down_info_eval(req, 43,
&qtcb->header.fsf_status_qual.link_down_info);
- break;
+ break;
}
}
+static int zfcp_fsf_sbal_check(struct zfcp_qdio_queue *queue)
+{
+ spin_lock(&queue->lock);
+ if (atomic_read(&queue->count))
+ return 1;
+ spin_unlock(&queue->lock);
+ return 0;
+}
-/*
- * function: zfcp_fsf_open_port
- *
- * purpose:
- *
- * returns: address of initiated FSF request
- * NULL - request could not be initiated
- */
-int
-zfcp_fsf_open_port(struct zfcp_erp_action *erp_action)
+static int zfcp_fsf_req_sbal_get(struct zfcp_adapter *adapter)
+{
+ long ret;
+ struct zfcp_qdio_queue *req_q = &adapter->req_q;
+
+ spin_unlock(&req_q->lock);
+ ret = wait_event_interruptible_timeout(adapter->request_wq,
+ zfcp_fsf_sbal_check(req_q), 5 * HZ);
+ if (ret > 0)
+ return 0;
+
+ spin_lock(&req_q->lock);
+ return -EIO;
+}
+
+static struct zfcp_fsf_req *zfcp_fsf_alloc_noqtcb(mempool_t *pool)
+{
+ struct zfcp_fsf_req *req;
+ req = mempool_alloc(pool, GFP_ATOMIC);
+ if (!req)
+ return NULL;
+ memset(req, 0, sizeof(*req));
+ return req;
+}
+
+static struct zfcp_fsf_req *zfcp_fsf_alloc_qtcb(mempool_t *pool)
+{
+ struct zfcp_fsf_req_qtcb *qtcb;
+
+ if (likely(pool))
+ qtcb = mempool_alloc(pool, GFP_ATOMIC);
+ else
+ qtcb = kmem_cache_alloc(zfcp_data.fsf_req_qtcb_cache,
+ GFP_ATOMIC);
+ if (unlikely(!qtcb))
+ return NULL;
+
+ memset(qtcb, 0, sizeof(*qtcb));
+ qtcb->fsf_req.qtcb = &qtcb->qtcb;
+ qtcb->fsf_req.pool = pool;
+
+ return &qtcb->fsf_req;
+}
+
+static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_adapter *adapter,
+ u32 fsf_cmd, int req_flags,
+ mempool_t *pool)
{
volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- unsigned long lock_flags;
- int retval = 0;
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(erp_action->adapter,
- FSF_QTCB_OPEN_PORT_WITH_DID,
- ZFCP_WAIT_FOR_SBAL | ZFCP_REQ_AUTO_CLEANUP,
- erp_action->adapter->pool.fsf_req_erp,
- &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Could not create open port request "
- "for port 0x%016Lx on adapter %s.\n",
- erp_action->port->wwpn,
- zfcp_get_busid_by_adapter(erp_action->adapter));
+ struct zfcp_fsf_req *req;
+ struct zfcp_qdio_queue *req_q = &adapter->req_q;
+
+ if (req_flags & ZFCP_REQ_NO_QTCB)
+ req = zfcp_fsf_alloc_noqtcb(pool);
+ else
+ req = zfcp_fsf_alloc_qtcb(pool);
+
+ if (unlikely(!req))
+ return ERR_PTR(-EIO);
+
+ if (adapter->req_no == 0)
+ adapter->req_no++;
+
+ INIT_LIST_HEAD(&req->list);
+ init_timer(&req->timer);
+ init_waitqueue_head(&req->completion_wq);
+
+ req->adapter = adapter;
+ req->fsf_command = fsf_cmd;
+ req->req_id = adapter->req_no++;
+ req->sbal_number = 1;
+ req->sbal_first = req_q->first;
+ req->sbal_last = req_q->first;
+ req->sbale_curr = 1;
+
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].addr = (void *) req->req_id;
+ sbale[0].flags |= SBAL_FLAGS0_COMMAND;
+
+ if (likely(req->qtcb)) {
+ req->qtcb->prefix.req_seq_no = req->adapter->fsf_req_seq_no;
+ req->qtcb->prefix.req_id = req->req_id;
+ req->qtcb->prefix.ulp_info = 26;
+ req->qtcb->prefix.qtcb_type = fsf_qtcb_type[req->fsf_command];
+ req->qtcb->prefix.qtcb_version = FSF_QTCB_CURRENT_VERSION;
+ req->qtcb->header.req_handle = req->req_id;
+ req->qtcb->header.fsf_command = req->fsf_command;
+ req->seq_no = adapter->fsf_req_seq_no;
+ req->qtcb->prefix.req_seq_no = adapter->fsf_req_seq_no;
+ sbale[1].addr = (void *) req->qtcb;
+ sbale[1].length = sizeof(struct fsf_qtcb);
+ }
+
+ if (!(atomic_read(&adapter->status) & ZFCP_STATUS_ADAPTER_QDIOUP)) {
+ zfcp_fsf_req_free(req);
+ return ERR_PTR(-EIO);
+ }
+
+ if (likely(req_flags & ZFCP_REQ_AUTO_CLEANUP))
+ req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
+
+ return req;
+}
+
+static int zfcp_fsf_req_send(struct zfcp_fsf_req *req)
+{
+ struct zfcp_adapter *adapter = req->adapter;
+ struct zfcp_qdio_queue *req_q = &adapter->req_q;
+ int idx;
+
+ /* put allocated FSF request into hash table */
+ spin_lock(&adapter->req_list_lock);
+ idx = zfcp_reqlist_hash(req->req_id);
+ list_add_tail(&req->list, &adapter->req_list[idx]);
+ spin_unlock(&adapter->req_list_lock);
+
+ req->issued = get_clock();
+ if (zfcp_qdio_send(req)) {
+ /* Queues are down..... */
+ del_timer(&req->timer);
+ spin_lock(&adapter->req_list_lock);
+ zfcp_reqlist_remove(adapter, req);
+ spin_unlock(&adapter->req_list_lock);
+ /* undo changes in request queue made for this request */
+ atomic_add(req->sbal_number, &req_q->count);
+ req_q->first -= req->sbal_number;
+ req_q->first += QDIO_MAX_BUFFERS_PER_Q;
+ req_q->first %= QDIO_MAX_BUFFERS_PER_Q; /* wrap */
+ zfcp_erp_adapter_reopen(adapter, 0, 116, req);
+ return -EIO;
+ }
+
+ /* Don't increase for unsolicited status */
+ if (req->qtcb)
+ adapter->fsf_req_seq_no++;
+
+ return 0;
+}
+
+/**
+ * zfcp_fsf_status_read - send status read request
+ * @adapter: pointer to struct zfcp_adapter
+ * @req_flags: request flags
+ * Returns: 0 on success, ERROR otherwise
+ */
+int zfcp_fsf_status_read(struct zfcp_adapter *adapter)
+{
+ struct zfcp_fsf_req *req;
+ struct fsf_status_read_buffer *sr_buf;
+ volatile struct qdio_buffer_element *sbale;
+ int retval = -EIO;
+
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_UNSOLICITED_STATUS,
+ ZFCP_REQ_NO_QTCB,
+ adapter->pool.fsf_req_status_read);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
goto out;
}
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_STATUS;
+ sbale[2].flags |= SBAL_FLAGS_LAST_ENTRY;
+ req->sbale_curr = 2;
- fsf_req->qtcb->bottom.support.d_id = erp_action->port->d_id;
- atomic_set_mask(ZFCP_STATUS_COMMON_OPENING, &erp_action->port->status);
- fsf_req->data = (unsigned long) erp_action->port;
- fsf_req->erp_action = erp_action;
- erp_action->fsf_req = fsf_req;
-
- zfcp_erp_start_timer(fsf_req);
- retval = zfcp_fsf_req_send(fsf_req);
- if (retval) {
- ZFCP_LOG_INFO("error: Could not send open port request for "
- "port 0x%016Lx on adapter %s.\n",
- erp_action->port->wwpn,
- zfcp_get_busid_by_adapter(erp_action->adapter));
- zfcp_fsf_req_free(fsf_req);
- erp_action->fsf_req = NULL;
- goto out;
+ sr_buf = mempool_alloc(adapter->pool.data_status_read, GFP_ATOMIC);
+ if (!sr_buf) {
+ retval = -ENOMEM;
+ goto failed_buf;
}
+ memset(sr_buf, 0, sizeof(*sr_buf));
+ req->data = sr_buf;
+ sbale = zfcp_qdio_sbale_curr(req);
+ sbale->addr = (void *) sr_buf;
+ sbale->length = sizeof(*sr_buf);
- ZFCP_LOG_DEBUG("open port request initiated "
- "(adapter %s, port 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->port->wwpn);
- out:
- write_unlock_irqrestore(&erp_action->adapter->request_queue.queue_lock,
- lock_flags);
+ retval = zfcp_fsf_req_send(req);
+ if (retval)
+ goto failed_req_send;
+
+ goto out;
+
+failed_req_send:
+ mempool_free(sr_buf, adapter->pool.data_status_read);
+failed_buf:
+ zfcp_fsf_req_free(req);
+ zfcp_hba_dbf_event_fsf_unsol("fail", adapter, NULL);
+out:
+ spin_unlock(&adapter->req_q.lock);
return retval;
}
-/*
- * function: zfcp_fsf_open_port_handler
- *
- * purpose: is called for finished Open Port command
- *
- * returns:
- */
-static int
-zfcp_fsf_open_port_handler(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_abort_fcp_command_handler(struct zfcp_fsf_req *req)
{
- int retval = -EINVAL;
- struct zfcp_port *port;
- struct fsf_plogi *plogi;
- struct fsf_qtcb_header *header;
- u16 subtable, rule, counter;
+ struct zfcp_unit *unit = req->data;
+ union fsf_status_qual *fsq = &req->qtcb->header.fsf_status_qual;
- port = (struct zfcp_port *) fsf_req->data;
- header = &fsf_req->qtcb->header;
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
+ return;
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR) {
- /* don't change port status in our bookkeeping */
+ switch (req->qtcb->header.fsf_status) {
+ case FSF_PORT_HANDLE_NOT_VALID:
+ if (fsq->word[0] == fsq->word[1]) {
+ zfcp_erp_adapter_reopen(unit->port->adapter, 0, 104,
+ req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ }
+ break;
+ case FSF_LUN_HANDLE_NOT_VALID:
+ if (fsq->word[0] == fsq->word[1]) {
+ zfcp_erp_port_reopen(unit->port, 0, 105, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ }
+ break;
+ case FSF_FCP_COMMAND_DOES_NOT_EXIST:
+ req->status |= ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED;
+ break;
+ case FSF_PORT_BOXED:
+ zfcp_erp_port_boxed(unit->port, 47, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY;
+ break;
+ case FSF_LUN_BOXED:
+ zfcp_erp_unit_boxed(unit, 48, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY;
+ break;
+ case FSF_ADAPTER_STATUS_AVAILABLE:
+ switch (fsq->word[0]) {
+ case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
+ zfcp_test_link(unit->port);
+ case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
+ }
+ break;
+ case FSF_GOOD:
+ req->status |= ZFCP_STATUS_FSFREQ_ABORTSUCCEEDED;
+ break;
+ }
+}
+
+/**
+ * zfcp_fsf_abort_fcp_command - abort running SCSI command
+ * @old_req_id: unsigned long
+ * @adapter: pointer to struct zfcp_adapter
+ * @unit: pointer to struct zfcp_unit
+ * @req_flags: integer specifying the request flags
+ * Returns: pointer to struct zfcp_fsf_req
+ *
+ * FIXME(design): should be watched by a timeout !!!
+ */
+
+struct zfcp_fsf_req *zfcp_fsf_abort_fcp_command(unsigned long old_req_id,
+ struct zfcp_adapter *adapter,
+ struct zfcp_unit *unit,
+ int req_flags)
+{
+ volatile struct qdio_buffer_element *sbale;
+ struct zfcp_fsf_req *req = NULL;
+
+ spin_lock(&adapter->req_q.lock);
+ if (!atomic_read(&adapter->req_q.count))
+ goto out;
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_ABORT_FCP_CMND,
+ req_flags, adapter->pool.fsf_req_abort);
+ if (unlikely(IS_ERR(req)))
+ goto out;
+
+ if (unlikely(!(atomic_read(&unit->status) &
+ ZFCP_STATUS_COMMON_UNBLOCKED)))
+ goto out_error_free;
+
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
+ sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
+
+ req->data = unit;
+ req->handler = zfcp_fsf_abort_fcp_command_handler;
+ req->qtcb->header.lun_handle = unit->handle;
+ req->qtcb->header.port_handle = unit->port->handle;
+ req->qtcb->bottom.support.req_handle = (u64) old_req_id;
+
+ zfcp_fsf_start_timer(req, ZFCP_SCSI_ER_TIMEOUT);
+ if (!zfcp_fsf_req_send(req))
+ goto out;
+
+out_error_free:
+ zfcp_fsf_req_free(req);
+ req = NULL;
+out:
+ spin_unlock(&adapter->req_q.lock);
+ return req;
+}
+
+static void zfcp_fsf_send_ct_handler(struct zfcp_fsf_req *req)
+{
+ struct zfcp_adapter *adapter = req->adapter;
+ struct zfcp_send_ct *send_ct = req->data;
+ struct zfcp_port *port = send_ct->port;
+ struct fsf_qtcb_header *header = &req->qtcb->header;
+
+ send_ct->status = -EINVAL;
+
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
goto skip_fsfstatus;
+
+ switch (header->fsf_status) {
+ case FSF_GOOD:
+ zfcp_san_dbf_event_ct_response(req);
+ send_ct->status = 0;
+ break;
+ case FSF_SERVICE_CLASS_NOT_SUPPORTED:
+ zfcp_fsf_class_not_supp(req);
+ break;
+ case FSF_ADAPTER_STATUS_AVAILABLE:
+ switch (header->fsf_status_qual.word[0]){
+ case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
+ zfcp_test_link(port);
+ case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
+ }
+ break;
+ case FSF_ACCESS_DENIED:
+ zfcp_fsf_access_denied_port(req, port);
+ break;
+ case FSF_PORT_BOXED:
+ zfcp_erp_port_boxed(port, 49, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY;
+ break;
+ case FSF_PORT_HANDLE_NOT_VALID:
+ zfcp_erp_adapter_reopen(adapter, 0, 106, req);
+ case FSF_GENERIC_COMMAND_REJECTED:
+ case FSF_PAYLOAD_SIZE_MISMATCH:
+ case FSF_REQUEST_SIZE_TOO_LARGE:
+ case FSF_RESPONSE_SIZE_TOO_LARGE:
+ case FSF_SBAL_MISMATCH:
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
}
- /* evaluate FSF status in QTCB */
+skip_fsfstatus:
+ if (send_ct->handler)
+ send_ct->handler(send_ct->handler_data);
+}
+
+static int zfcp_fsf_setup_sbals(struct zfcp_fsf_req *req,
+ struct scatterlist *sg_req,
+ struct scatterlist *sg_resp, int max_sbals)
+{
+ int bytes;
+
+ bytes = zfcp_qdio_sbals_from_sg(req, SBAL_FLAGS0_TYPE_WRITE_READ,
+ sg_req, max_sbals);
+ if (bytes <= 0)
+ return -ENOMEM;
+ req->qtcb->bottom.support.req_buf_length = bytes;
+ req->sbale_curr = ZFCP_LAST_SBALE_PER_SBAL;
+
+ bytes = zfcp_qdio_sbals_from_sg(req, SBAL_FLAGS0_TYPE_WRITE_READ,
+ sg_resp, max_sbals);
+ if (bytes <= 0)
+ return -ENOMEM;
+ req->qtcb->bottom.support.resp_buf_length = bytes;
+
+ return 0;
+}
+
+/**
+ * zfcp_fsf_send_ct - initiate a Generic Service request (FC-GS)
+ * @ct: pointer to struct zfcp_send_ct with data for request
+ * @pool: if non-null this mempool is used to allocate struct zfcp_fsf_req
+ * @erp_action: if non-null the Generic Service request sent within ERP
+ */
+int zfcp_fsf_send_ct(struct zfcp_send_ct *ct, mempool_t *pool,
+ struct zfcp_erp_action *erp_action)
+{
+ struct zfcp_port *port = ct->port;
+ struct zfcp_adapter *adapter = port->adapter;
+ struct zfcp_fsf_req *req;
+ int ret = -EIO;
+
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_SEND_GENERIC,
+ ZFCP_REQ_AUTO_CLEANUP, pool);
+ if (unlikely(IS_ERR(req))) {
+ ret = PTR_ERR(req);
+ goto out;
+ }
+
+ ret = zfcp_fsf_setup_sbals(req, ct->req, ct->resp,
+ FSF_MAX_SBALS_PER_REQ);
+ if (ret)
+ goto failed_send;
+
+ req->handler = zfcp_fsf_send_ct_handler;
+ req->qtcb->header.port_handle = port->handle;
+ req->qtcb->bottom.support.service_class = FSF_CLASS_3;
+ req->qtcb->bottom.support.timeout = ct->timeout;
+ req->data = ct;
+
+ zfcp_san_dbf_event_ct_request(req);
+
+ if (erp_action) {
+ erp_action->fsf_req = req;
+ req->erp_action = erp_action;
+ zfcp_fsf_start_erp_timer(req);
+ } else
+ zfcp_fsf_start_timer(req, ZFCP_FSF_REQUEST_TIMEOUT);
+
+ ret = zfcp_fsf_req_send(req);
+ if (ret)
+ goto failed_send;
+
+ goto out;
+
+failed_send:
+ zfcp_fsf_req_free(req);
+ if (erp_action)
+ erp_action->fsf_req = NULL;
+out:
+ spin_unlock(&adapter->req_q.lock);
+ return ret;
+}
+
+static void zfcp_fsf_send_els_handler(struct zfcp_fsf_req *req)
+{
+ struct zfcp_send_els *send_els = req->data;
+ struct zfcp_port *port = send_els->port;
+ struct fsf_qtcb_header *header = &req->qtcb->header;
+
+ send_els->status = -EINVAL;
+
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
+ goto skip_fsfstatus;
+
switch (header->fsf_status) {
-
- case FSF_PORT_ALREADY_OPEN:
- ZFCP_LOG_NORMAL("bug: remote port 0x%016Lx on adapter %s "
- "is already open.\n",
- port->wwpn, zfcp_get_busid_by_port(port));
- /*
- * This is a bug, however operation should continue normally
- * if it is simply ignored
- */
+ case FSF_GOOD:
+ zfcp_san_dbf_event_els_response(req);
+ send_els->status = 0;
break;
-
- case FSF_ACCESS_DENIED:
- ZFCP_LOG_NORMAL("Access denied, cannot open port 0x%016Lx "
- "on adapter %s\n",
- port->wwpn, zfcp_get_busid_by_port(port));
- for (counter = 0; counter < 2; counter++) {
- subtable = header->fsf_status_qual.halfword[counter * 2];
- rule = header->fsf_status_qual.halfword[counter * 2 + 1];
- switch (subtable) {
- case FSF_SQ_CFDC_SUBTABLE_OS:
- case FSF_SQ_CFDC_SUBTABLE_PORT_WWPN:
- case FSF_SQ_CFDC_SUBTABLE_PORT_DID:
- case FSF_SQ_CFDC_SUBTABLE_LUN:
- ZFCP_LOG_INFO("Access denied (%s rule %d)\n",
- zfcp_act_subtable_type[subtable], rule);
- break;
- }
+ case FSF_SERVICE_CLASS_NOT_SUPPORTED:
+ zfcp_fsf_class_not_supp(req);
+ break;
+ case FSF_ADAPTER_STATUS_AVAILABLE:
+ switch (header->fsf_status_qual.word[0]){
+ case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
+ if (port && (send_els->ls_code != ZFCP_LS_ADISC))
+ zfcp_test_link(port);
+ /*fall through */
+ case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
+ case FSF_SQ_RETRY_IF_POSSIBLE:
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
}
- zfcp_erp_port_access_denied(port, 57, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
+ case FSF_ELS_COMMAND_REJECTED:
+ case FSF_PAYLOAD_SIZE_MISMATCH:
+ case FSF_REQUEST_SIZE_TOO_LARGE:
+ case FSF_RESPONSE_SIZE_TOO_LARGE:
+ break;
+ case FSF_ACCESS_DENIED:
+ zfcp_fsf_access_denied_port(req, port);
+ break;
+ case FSF_SBAL_MISMATCH:
+ /* should never occure, avoided in zfcp_fsf_send_els */
+ /* fall through */
+ default:
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
+ }
+skip_fsfstatus:
+ if (send_els->handler)
+ send_els->handler(send_els->handler_data);
+}
+/**
+ * zfcp_fsf_send_els - initiate an ELS command (FC-FS)
+ * @els: pointer to struct zfcp_send_els with data for the command
+ */
+int zfcp_fsf_send_els(struct zfcp_send_els *els)
+{
+ struct zfcp_fsf_req *req;
+ struct zfcp_adapter *adapter = els->adapter;
+ struct fsf_qtcb_bottom_support *bottom;
+ int ret = -EIO;
+
+ if (unlikely(!(atomic_read(&els->port->status) &
+ ZFCP_STATUS_COMMON_UNBLOCKED)))
+ return -EBUSY;
+
+ spin_lock(&adapter->req_q.lock);
+ if (!atomic_read(&adapter->req_q.count))
+ goto out;
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_SEND_ELS,
+ ZFCP_REQ_AUTO_CLEANUP, NULL);
+ if (unlikely(IS_ERR(req))) {
+ ret = PTR_ERR(req);
+ goto out;
+ }
+
+ ret = zfcp_fsf_setup_sbals(req, els->req, els->resp,
+ FSF_MAX_SBALS_PER_ELS_REQ);
+ if (ret)
+ goto failed_send;
+
+ bottom = &req->qtcb->bottom.support;
+ req->handler = zfcp_fsf_send_els_handler;
+ bottom->d_id = els->d_id;
+ bottom->service_class = FSF_CLASS_3;
+ bottom->timeout = 2 * R_A_TOV;
+ req->data = els;
+
+ zfcp_san_dbf_event_els_request(req);
+
+ zfcp_fsf_start_timer(req, ZFCP_FSF_REQUEST_TIMEOUT);
+ ret = zfcp_fsf_req_send(req);
+ if (ret)
+ goto failed_send;
+
+ goto out;
+
+failed_send:
+ zfcp_fsf_req_free(req);
+out:
+ spin_unlock(&adapter->req_q.lock);
+ return ret;
+}
+
+int zfcp_fsf_exchange_config_data(struct zfcp_erp_action *erp_action)
+{
+ volatile struct qdio_buffer_element *sbale;
+ struct zfcp_fsf_req *req;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+ int retval = -EIO;
+
+ spin_lock(&adapter->req_q.lock);
+ if (!atomic_read(&adapter->req_q.count))
+ goto out;
+ req = zfcp_fsf_req_create(adapter,
+ FSF_QTCB_EXCHANGE_CONFIG_DATA,
+ ZFCP_REQ_AUTO_CLEANUP,
+ adapter->pool.fsf_req_erp);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
+ goto out;
+ }
+
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
+ sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
+
+ req->qtcb->bottom.config.feature_selection =
+ FSF_FEATURE_CFDC |
+ FSF_FEATURE_LUN_SHARING |
+ FSF_FEATURE_NOTIFICATION_LOST |
+ FSF_FEATURE_UPDATE_ALERT;
+ req->erp_action = erp_action;
+ req->handler = zfcp_fsf_exchange_config_data_handler;
+ erp_action->fsf_req = req;
+
+ zfcp_fsf_start_erp_timer(req);
+ retval = zfcp_fsf_req_send(req);
+ if (retval) {
+ zfcp_fsf_req_free(req);
+ erp_action->fsf_req = NULL;
+ }
+out:
+ spin_unlock(&adapter->req_q.lock);
+ return retval;
+}
+
+int zfcp_fsf_exchange_config_data_sync(struct zfcp_adapter *adapter,
+ struct fsf_qtcb_bottom_config *data)
+{
+ volatile struct qdio_buffer_element *sbale;
+ struct zfcp_fsf_req *req = NULL;
+ int retval = -EIO;
+
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_CONFIG_DATA,
+ 0, NULL);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
+ goto out;
+ }
+
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
+ sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
+ req->handler = zfcp_fsf_exchange_config_data_handler;
+
+ req->qtcb->bottom.config.feature_selection =
+ FSF_FEATURE_CFDC |
+ FSF_FEATURE_LUN_SHARING |
+ FSF_FEATURE_NOTIFICATION_LOST |
+ FSF_FEATURE_UPDATE_ALERT;
+
+ if (data)
+ req->data = data;
+
+ zfcp_fsf_start_timer(req, ZFCP_FSF_REQUEST_TIMEOUT);
+ retval = zfcp_fsf_req_send(req);
+out:
+ spin_unlock(&adapter->req_q.lock);
+ if (!retval)
+ wait_event(req->completion_wq,
+ req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
+
+ zfcp_fsf_req_free(req);
+
+ return retval;
+}
+
+/**
+ * zfcp_fsf_exchange_port_data - request information about local port
+ * @erp_action: ERP action for the adapter for which port data is requested
+ * Returns: 0 on success, error otherwise
+ */
+int zfcp_fsf_exchange_port_data(struct zfcp_erp_action *erp_action)
+{
+ volatile struct qdio_buffer_element *sbale;
+ struct zfcp_fsf_req *req;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+ int retval = -EIO;
+
+ if (!(adapter->adapter_features & FSF_FEATURE_HBAAPI_MANAGEMENT))
+ return -EOPNOTSUPP;
+
+ spin_lock(&adapter->req_q.lock);
+ if (!atomic_read(&adapter->req_q.count))
+ goto out;
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_PORT_DATA,
+ ZFCP_REQ_AUTO_CLEANUP,
+ adapter->pool.fsf_req_erp);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
+ goto out;
+ }
+
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
+ sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
+
+ req->handler = zfcp_fsf_exchange_port_data_handler;
+ req->erp_action = erp_action;
+ erp_action->fsf_req = req;
+
+ zfcp_fsf_start_erp_timer(req);
+ retval = zfcp_fsf_req_send(req);
+ if (retval) {
+ zfcp_fsf_req_free(req);
+ erp_action->fsf_req = NULL;
+ }
+out:
+ spin_unlock(&adapter->req_q.lock);
+ return retval;
+}
+
+/**
+ * zfcp_fsf_exchange_port_data_sync - request information about local port
+ * @adapter: pointer to struct zfcp_adapter
+ * @data: pointer to struct fsf_qtcb_bottom_port
+ * Returns: 0 on success, error otherwise
+ */
+int zfcp_fsf_exchange_port_data_sync(struct zfcp_adapter *adapter,
+ struct fsf_qtcb_bottom_port *data)
+{
+ volatile struct qdio_buffer_element *sbale;
+ struct zfcp_fsf_req *req = NULL;
+ int retval = -EIO;
+
+ if (!(adapter->adapter_features & FSF_FEATURE_HBAAPI_MANAGEMENT))
+ return -EOPNOTSUPP;
+
+ spin_lock(&adapter->req_q.lock);
+ if (!atomic_read(&adapter->req_q.count))
+ goto out;
+
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_EXCHANGE_PORT_DATA, 0,
+ NULL);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
+ goto out;
+ }
+
+ if (data)
+ req->data = data;
+
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
+ sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
+
+ req->handler = zfcp_fsf_exchange_port_data_handler;
+ zfcp_fsf_start_timer(req, ZFCP_FSF_REQUEST_TIMEOUT);
+ retval = zfcp_fsf_req_send(req);
+out:
+ spin_unlock(&adapter->req_q.lock);
+ if (!retval)
+ wait_event(req->completion_wq,
+ req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
+ zfcp_fsf_req_free(req);
+
+ return retval;
+}
+
+static void zfcp_fsf_open_port_handler(struct zfcp_fsf_req *req)
+{
+ struct zfcp_port *port = req->data;
+ struct fsf_qtcb_header *header = &req->qtcb->header;
+ struct fsf_plogi *plogi;
+
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
+ goto skip_fsfstatus;
+
+ switch (header->fsf_status) {
+ case FSF_PORT_ALREADY_OPEN:
+ break;
+ case FSF_ACCESS_DENIED:
+ zfcp_fsf_access_denied_port(req, port);
+ break;
case FSF_MAXIMUM_NUMBER_OF_PORTS_EXCEEDED:
- ZFCP_LOG_INFO("error: The FSF adapter is out of resources. "
- "The remote port 0x%016Lx on adapter %s "
- "could not be opened. Disabling it.\n",
- port->wwpn, zfcp_get_busid_by_port(port));
- zfcp_erp_port_failed(port, 31, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The adapter is out of resources. The remote port "
+ "0x%016Lx could not be opened, disabling it.\n",
+ port->wwpn);
+ zfcp_erp_port_failed(port, 31, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
case FSF_ADAPTER_STATUS_AVAILABLE:
switch (header->fsf_status_qual.word[0]) {
case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- /* ERP strategy will escalate */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- /* ERP strategy will escalate */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
case FSF_SQ_NO_RETRY_POSSIBLE:
- ZFCP_LOG_NORMAL("The remote port 0x%016Lx on "
- "adapter %s could not be opened. "
- "Disabling it.\n",
- port->wwpn,
- zfcp_get_busid_by_port(port));
- zfcp_erp_port_failed(port, 32, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- default:
- ZFCP_LOG_NORMAL
- ("bug: Wrong status qualifier 0x%x arrived.\n",
- header->fsf_status_qual.word[0]);
+ dev_warn(&req->adapter->ccw_device->dev,
+ "The remote port 0x%016Lx could not be "
+ "opened. Disabling it.\n", port->wwpn);
+ zfcp_erp_port_failed(port, 32, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
}
break;
-
case FSF_GOOD:
- /* save port handle assigned by FSF */
port->handle = header->port_handle;
- ZFCP_LOG_INFO("The remote port 0x%016Lx via adapter %s "
- "was opened, it's port handle is 0x%x\n",
- port->wwpn, zfcp_get_busid_by_port(port),
- port->handle);
- /* mark port as open */
atomic_set_mask(ZFCP_STATUS_COMMON_OPEN |
ZFCP_STATUS_PORT_PHYS_OPEN, &port->status);
atomic_clear_mask(ZFCP_STATUS_COMMON_ACCESS_DENIED |
ZFCP_STATUS_COMMON_ACCESS_BOXED,
&port->status);
- retval = 0;
/* check whether D_ID has changed during open */
/*
* FIXME: This check is not airtight, as the FCP channel does
@@ -2526,320 +1496,168 @@
* another GID_PN straight after a port has been opened.
* Alternately, an ADISC/PDISC ELS should suffice, as well.
*/
- plogi = (struct fsf_plogi *) fsf_req->qtcb->bottom.support.els;
- if (!atomic_test_mask(ZFCP_STATUS_PORT_NO_WWPN, &port->status))
- {
- if (fsf_req->qtcb->bottom.support.els1_length <
- sizeof (struct fsf_plogi)) {
- ZFCP_LOG_INFO(
- "warning: insufficient length of "
- "PLOGI payload (%i)\n",
- fsf_req->qtcb->bottom.support.els1_length);
- /* skip sanity check and assume wwpn is ok */
- } else {
- if (plogi->serv_param.wwpn != port->wwpn) {
- ZFCP_LOG_INFO("warning: d_id of port "
- "0x%016Lx changed during "
- "open\n", port->wwpn);
- atomic_clear_mask(
- ZFCP_STATUS_PORT_DID_DID,
- &port->status);
- } else {
- port->wwnn = plogi->serv_param.wwnn;
- zfcp_plogi_evaluate(port, plogi);
- }
+ if (atomic_read(&port->status) & ZFCP_STATUS_PORT_NO_WWPN)
+ break;
+
+ plogi = (struct fsf_plogi *) req->qtcb->bottom.support.els;
+ if (req->qtcb->bottom.support.els1_length >= sizeof(*plogi)) {
+ if (plogi->serv_param.wwpn != port->wwpn)
+ atomic_clear_mask(ZFCP_STATUS_PORT_DID_DID,
+ &port->status);
+ else {
+ port->wwnn = plogi->serv_param.wwnn;
+ zfcp_fc_plogi_evaluate(port, plogi);
}
}
break;
-
case FSF_UNKNOWN_OP_SUBTYPE:
- /* should never occure, subtype not set in zfcp_fsf_open_port */
- ZFCP_LOG_INFO("unknown operation subtype (adapter: %s, "
- "op_subtype=0x%x)\n",
- zfcp_get_busid_by_port(port),
- fsf_req->qtcb->bottom.support.operation_subtype);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: An unknown FSF Status was presented "
- "(debug info 0x%x)\n",
- header->fsf_status);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
}
- skip_fsfstatus:
+skip_fsfstatus:
atomic_clear_mask(ZFCP_STATUS_COMMON_OPENING, &port->status);
- return retval;
}
-/*
- * function: zfcp_fsf_close_port
- *
- * purpose: submit FSF command "close port"
- *
- * returns: address of initiated FSF request
- * NULL - request could not be initiated
+/**
+ * zfcp_fsf_open_port - create and send open port request
+ * @erp_action: pointer to struct zfcp_erp_action
+ * Returns: 0 on success, error otherwise
*/
-int
-zfcp_fsf_close_port(struct zfcp_erp_action *erp_action)
+int zfcp_fsf_open_port(struct zfcp_erp_action *erp_action)
{
volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- unsigned long lock_flags;
- int retval = 0;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+ struct zfcp_fsf_req *req;
+ int retval = -EIO;
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(erp_action->adapter,
- FSF_QTCB_CLOSE_PORT,
- ZFCP_WAIT_FOR_SBAL | ZFCP_REQ_AUTO_CLEANUP,
- erp_action->adapter->pool.fsf_req_erp,
- &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Could not create a close port request "
- "for port 0x%016Lx on adapter %s.\n",
- erp_action->port->wwpn,
- zfcp_get_busid_by_adapter(erp_action->adapter));
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+
+ req = zfcp_fsf_req_create(adapter,
+ FSF_QTCB_OPEN_PORT_WITH_DID,
+ ZFCP_REQ_AUTO_CLEANUP,
+ adapter->pool.fsf_req_erp);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
goto out;
}
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
+ sbale = zfcp_qdio_sbale_req(req);
sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
- atomic_set_mask(ZFCP_STATUS_COMMON_CLOSING, &erp_action->port->status);
- fsf_req->data = (unsigned long) erp_action->port;
- fsf_req->erp_action = erp_action;
- fsf_req->qtcb->header.port_handle = erp_action->port->handle;
- fsf_req->erp_action = erp_action;
- erp_action->fsf_req = fsf_req;
+ req->handler = zfcp_fsf_open_port_handler;
+ req->qtcb->bottom.support.d_id = erp_action->port->d_id;
+ req->data = erp_action->port;
+ req->erp_action = erp_action;
+ erp_action->fsf_req = req;
+ atomic_set_mask(ZFCP_STATUS_COMMON_OPENING, &erp_action->port->status);
- zfcp_erp_start_timer(fsf_req);
- retval = zfcp_fsf_req_send(fsf_req);
+ zfcp_fsf_start_erp_timer(req);
+ retval = zfcp_fsf_req_send(req);
if (retval) {
- ZFCP_LOG_INFO("error: Could not send a close port request for "
- "port 0x%016Lx on adapter %s.\n",
- erp_action->port->wwpn,
- zfcp_get_busid_by_adapter(erp_action->adapter));
- zfcp_fsf_req_free(fsf_req);
+ zfcp_fsf_req_free(req);
erp_action->fsf_req = NULL;
- goto out;
}
-
- ZFCP_LOG_TRACE("close port request initiated "
- "(adapter %s, port 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->port->wwpn);
- out:
- write_unlock_irqrestore(&erp_action->adapter->request_queue.queue_lock,
- lock_flags);
+out:
+ spin_unlock(&adapter->req_q.lock);
return retval;
}
-/*
- * function: zfcp_fsf_close_port_handler
- *
- * purpose: is called for finished Close Port FSF command
- *
- * returns:
- */
-static int
-zfcp_fsf_close_port_handler(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_close_port_handler(struct zfcp_fsf_req *req)
{
- int retval = -EINVAL;
- struct zfcp_port *port;
+ struct zfcp_port *port = req->data;
- port = (struct zfcp_port *) fsf_req->data;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR) {
- /* don't change port status in our bookkeeping */
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
goto skip_fsfstatus;
- }
- /* evaluate FSF status in QTCB */
- switch (fsf_req->qtcb->header.fsf_status) {
-
+ switch (req->qtcb->header.fsf_status) {
case FSF_PORT_HANDLE_NOT_VALID:
- ZFCP_LOG_INFO("Temporary port identifier 0x%x for port "
- "0x%016Lx on adapter %s invalid. This may happen "
- "occasionally.\n", port->handle,
- port->wwpn, zfcp_get_busid_by_port(port));
- ZFCP_LOG_DEBUG("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &fsf_req->qtcb->header.fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_adapter_reopen(port->adapter, 0, 107, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ zfcp_erp_adapter_reopen(port->adapter, 0, 107, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
case FSF_ADAPTER_STATUS_AVAILABLE:
- /* Note: FSF has actually closed the port in this case.
- * The status code is just daft. Fingers crossed for a change
- */
- retval = 0;
break;
-
case FSF_GOOD:
- ZFCP_LOG_TRACE("remote port 0x016%Lx on adapter %s closed, "
- "port handle 0x%x\n", port->wwpn,
- zfcp_get_busid_by_port(port), port->handle);
- zfcp_erp_modify_port_status(port, 33, fsf_req,
+ zfcp_erp_modify_port_status(port, 33, req,
ZFCP_STATUS_COMMON_OPEN,
ZFCP_CLEAR);
- retval = 0;
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: An unknown FSF Status was presented "
- "(debug info 0x%x)\n",
- fsf_req->qtcb->header.fsf_status);
break;
}
- skip_fsfstatus:
+skip_fsfstatus:
atomic_clear_mask(ZFCP_STATUS_COMMON_CLOSING, &port->status);
- return retval;
}
-/*
- * function: zfcp_fsf_close_physical_port
- *
- * purpose: submit FSF command "close physical port"
- *
- * returns: address of initiated FSF request
- * NULL - request could not be initiated
+/**
+ * zfcp_fsf_close_port - create and send close port request
+ * @erp_action: pointer to struct zfcp_erp_action
+ * Returns: 0 on success, error otherwise
*/
-int
-zfcp_fsf_close_physical_port(struct zfcp_erp_action *erp_action)
+int zfcp_fsf_close_port(struct zfcp_erp_action *erp_action)
{
volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- unsigned long lock_flags;
- int retval = 0;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+ struct zfcp_fsf_req *req;
+ int retval = -EIO;
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(erp_action->adapter,
- FSF_QTCB_CLOSE_PHYSICAL_PORT,
- ZFCP_WAIT_FOR_SBAL | ZFCP_REQ_AUTO_CLEANUP,
- erp_action->adapter->pool.fsf_req_erp,
- &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Could not create close physical port "
- "request (adapter %s, port 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->port->wwpn);
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_CLOSE_PORT,
+ ZFCP_REQ_AUTO_CLEANUP,
+ adapter->pool.fsf_req_erp);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
goto out;
}
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
+ sbale = zfcp_qdio_sbale_req(req);
sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
- /* mark port as being closed */
- atomic_set_mask(ZFCP_STATUS_PORT_PHYS_CLOSING,
- &erp_action->port->status);
- /* save a pointer to this port */
- fsf_req->data = (unsigned long) erp_action->port;
- fsf_req->qtcb->header.port_handle = erp_action->port->handle;
- fsf_req->erp_action = erp_action;
- erp_action->fsf_req = fsf_req;
+ req->handler = zfcp_fsf_close_port_handler;
+ req->data = erp_action->port;
+ req->erp_action = erp_action;
+ req->qtcb->header.port_handle = erp_action->port->handle;
+ erp_action->fsf_req = req;
+ atomic_set_mask(ZFCP_STATUS_COMMON_CLOSING, &erp_action->port->status);
- zfcp_erp_start_timer(fsf_req);
- retval = zfcp_fsf_req_send(fsf_req);
+ zfcp_fsf_start_erp_timer(req);
+ retval = zfcp_fsf_req_send(req);
if (retval) {
- ZFCP_LOG_INFO("error: Could not send close physical port "
- "request (adapter %s, port 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->port->wwpn);
- zfcp_fsf_req_free(fsf_req);
+ zfcp_fsf_req_free(req);
erp_action->fsf_req = NULL;
- goto out;
}
-
- ZFCP_LOG_TRACE("close physical port request initiated "
- "(adapter %s, port 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->port->wwpn);
- out:
- write_unlock_irqrestore(&erp_action->adapter->request_queue.queue_lock,
- lock_flags);
+out:
+ spin_unlock(&adapter->req_q.lock);
return retval;
}
-/*
- * function: zfcp_fsf_close_physical_port_handler
- *
- * purpose: is called for finished Close Physical Port FSF command
- *
- * returns:
- */
-static int
-zfcp_fsf_close_physical_port_handler(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_close_physical_port_handler(struct zfcp_fsf_req *req)
{
- int retval = -EINVAL;
- struct zfcp_port *port;
+ struct zfcp_port *port = req->data;
+ struct fsf_qtcb_header *header = &req->qtcb->header;
struct zfcp_unit *unit;
- struct fsf_qtcb_header *header;
- u16 subtable, rule, counter;
- port = (struct zfcp_port *) fsf_req->data;
- header = &fsf_req->qtcb->header;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR) {
- /* don't change port status in our bookkeeping */
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
goto skip_fsfstatus;
- }
- /* evaluate FSF status in QTCB */
switch (header->fsf_status) {
-
case FSF_PORT_HANDLE_NOT_VALID:
- ZFCP_LOG_INFO("Temporary port identifier 0x%x invalid"
- "(adapter %s, port 0x%016Lx). "
- "This may happen occasionally.\n",
- port->handle,
- zfcp_get_busid_by_port(port),
- port->wwpn);
- ZFCP_LOG_DEBUG("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_adapter_reopen(port->adapter, 0, 108, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ zfcp_erp_adapter_reopen(port->adapter, 0, 108, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
case FSF_ACCESS_DENIED:
- ZFCP_LOG_NORMAL("Access denied, cannot close "
- "physical port 0x%016Lx on adapter %s\n",
- port->wwpn, zfcp_get_busid_by_port(port));
- for (counter = 0; counter < 2; counter++) {
- subtable = header->fsf_status_qual.halfword[counter * 2];
- rule = header->fsf_status_qual.halfword[counter * 2 + 1];
- switch (subtable) {
- case FSF_SQ_CFDC_SUBTABLE_OS:
- case FSF_SQ_CFDC_SUBTABLE_PORT_WWPN:
- case FSF_SQ_CFDC_SUBTABLE_PORT_DID:
- case FSF_SQ_CFDC_SUBTABLE_LUN:
- ZFCP_LOG_INFO("Access denied (%s rule %d)\n",
- zfcp_act_subtable_type[subtable], rule);
- break;
- }
- }
- zfcp_erp_port_access_denied(port, 58, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ zfcp_fsf_access_denied_port(req, port);
break;
-
case FSF_PORT_BOXED:
- ZFCP_LOG_DEBUG("The remote port 0x%016Lx on adapter "
- "%s needs to be reopened but it was attempted "
- "to close it physically.\n",
- port->wwpn,
- zfcp_get_busid_by_port(port));
- zfcp_erp_port_boxed(port, 50, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR |
- ZFCP_STATUS_FSFREQ_RETRY;
-
+ zfcp_erp_port_boxed(port, 50, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY;
/* can't use generic zfcp_erp_modify_port_status because
* ZFCP_STATUS_COMMON_OPEN must not be reset for the port */
atomic_clear_mask(ZFCP_STATUS_PORT_PHYS_OPEN, &port->status);
@@ -2847,154 +1665,88 @@
atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN,
&unit->status);
break;
-
case FSF_ADAPTER_STATUS_AVAILABLE:
switch (header->fsf_status_qual.word[0]) {
case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- /* This will now be escalated by ERP */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
+ /* fall through */
case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- /* ERP strategy will escalate */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- default:
- ZFCP_LOG_NORMAL
- ("bug: Wrong status qualifier 0x%x arrived.\n",
- header->fsf_status_qual.word[0]);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
}
break;
-
case FSF_GOOD:
- ZFCP_LOG_DEBUG("Remote port 0x%016Lx via adapter %s "
- "physically closed, port handle 0x%x\n",
- port->wwpn,
- zfcp_get_busid_by_port(port), port->handle);
/* can't use generic zfcp_erp_modify_port_status because
* ZFCP_STATUS_COMMON_OPEN must not be reset for the port
*/
atomic_clear_mask(ZFCP_STATUS_PORT_PHYS_OPEN, &port->status);
list_for_each_entry(unit, &port->unit_list_head, list)
- atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN, &unit->status);
- retval = 0;
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: An unknown FSF Status was presented "
- "(debug info 0x%x)\n",
- header->fsf_status);
+ atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN,
+ &unit->status);
break;
}
-
- skip_fsfstatus:
+skip_fsfstatus:
atomic_clear_mask(ZFCP_STATUS_PORT_PHYS_CLOSING, &port->status);
- return retval;
}
-/*
- * function: zfcp_fsf_open_unit
- *
- * purpose:
- *
- * returns:
- *
- * assumptions: This routine does not check whether the associated
- * remote port has already been opened. This should be
- * done by calling routines. Otherwise some status
- * may be presented by FSF
+/**
+ * zfcp_fsf_close_physical_port - close physical port
+ * @erp_action: pointer to struct zfcp_erp_action
+ * Returns: 0 on success
*/
-int
-zfcp_fsf_open_unit(struct zfcp_erp_action *erp_action)
+int zfcp_fsf_close_physical_port(struct zfcp_erp_action *erp_action)
{
volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- unsigned long lock_flags;
- int retval = 0;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+ struct zfcp_fsf_req *req;
+ int retval = -EIO;
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(erp_action->adapter,
- FSF_QTCB_OPEN_LUN,
- ZFCP_WAIT_FOR_SBAL | ZFCP_REQ_AUTO_CLEANUP,
- erp_action->adapter->pool.fsf_req_erp,
- &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Could not create open unit request for "
- "unit 0x%016Lx on port 0x%016Lx on adapter %s.\n",
- erp_action->unit->fcp_lun,
- erp_action->unit->port->wwpn,
- zfcp_get_busid_by_adapter(erp_action->adapter));
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_CLOSE_PHYSICAL_PORT,
+ ZFCP_REQ_AUTO_CLEANUP,
+ adapter->pool.fsf_req_erp);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
goto out;
}
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
+ sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
- fsf_req->qtcb->header.port_handle = erp_action->port->handle;
- fsf_req->qtcb->bottom.support.fcp_lun = erp_action->unit->fcp_lun;
- if (!(erp_action->adapter->connection_features & FSF_FEATURE_NPIV_MODE))
- fsf_req->qtcb->bottom.support.option =
- FSF_OPEN_LUN_SUPPRESS_BOXING;
- atomic_set_mask(ZFCP_STATUS_COMMON_OPENING, &erp_action->unit->status);
- fsf_req->data = (unsigned long) erp_action->unit;
- fsf_req->erp_action = erp_action;
- erp_action->fsf_req = fsf_req;
+ req->data = erp_action->port;
+ req->qtcb->header.port_handle = erp_action->port->handle;
+ req->erp_action = erp_action;
+ req->handler = zfcp_fsf_close_physical_port_handler;
+ erp_action->fsf_req = req;
+ atomic_set_mask(ZFCP_STATUS_PORT_PHYS_CLOSING,
+ &erp_action->port->status);
- zfcp_erp_start_timer(fsf_req);
- retval = zfcp_fsf_req_send(erp_action->fsf_req);
+ zfcp_fsf_start_erp_timer(req);
+ retval = zfcp_fsf_req_send(req);
if (retval) {
- ZFCP_LOG_INFO("error: Could not send an open unit request "
- "on the adapter %s, port 0x%016Lx for "
- "unit 0x%016Lx\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->port->wwpn,
- erp_action->unit->fcp_lun);
- zfcp_fsf_req_free(fsf_req);
+ zfcp_fsf_req_free(req);
erp_action->fsf_req = NULL;
- goto out;
}
-
- ZFCP_LOG_TRACE("Open LUN request initiated (adapter %s, "
- "port 0x%016Lx, unit 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->port->wwpn, erp_action->unit->fcp_lun);
- out:
- write_unlock_irqrestore(&erp_action->adapter->request_queue.queue_lock,
- lock_flags);
+out:
+ spin_unlock(&adapter->req_q.lock);
return retval;
}
-/*
- * function: zfcp_fsf_open_unit_handler
- *
- * purpose: is called for finished Open LUN command
- *
- * returns:
- */
-static int
-zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_open_unit_handler(struct zfcp_fsf_req *req)
{
- int retval = -EINVAL;
- struct zfcp_adapter *adapter;
- struct zfcp_unit *unit;
- struct fsf_qtcb_header *header;
- struct fsf_qtcb_bottom_support *bottom;
- struct fsf_queue_designator *queue_designator;
- u16 subtable, rule, counter;
+ struct zfcp_adapter *adapter = req->adapter;
+ struct zfcp_unit *unit = req->data;
+ struct fsf_qtcb_header *header = &req->qtcb->header;
+ struct fsf_qtcb_bottom_support *bottom = &req->qtcb->bottom.support;
+ struct fsf_queue_designator *queue_designator =
+ &header->fsf_status_qual.fsf_queue_designator;
int exclusive, readwrite;
- unit = (struct zfcp_unit *) fsf_req->data;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR) {
- /* don't change unit status in our bookkeeping */
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
goto skip_fsfstatus;
- }
-
- adapter = fsf_req->adapter;
- header = &fsf_req->qtcb->header;
- bottom = &fsf_req->qtcb->bottom.support;
- queue_designator = &header->fsf_status_qual.fsf_queue_designator;
atomic_clear_mask(ZFCP_STATUS_COMMON_ACCESS_DENIED |
ZFCP_STATUS_COMMON_ACCESS_BOXED |
@@ -3002,155 +1754,65 @@
ZFCP_STATUS_UNIT_READONLY,
&unit->status);
- /* evaluate FSF status in QTCB */
switch (header->fsf_status) {
case FSF_PORT_HANDLE_NOT_VALID:
- ZFCP_LOG_INFO("Temporary port identifier 0x%x "
- "for port 0x%016Lx on adapter %s invalid "
- "This may happen occasionally\n",
- unit->port->handle,
- unit->port->wwpn, zfcp_get_busid_by_unit(unit));
- ZFCP_LOG_DEBUG("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_adapter_reopen(unit->port->adapter, 0, 109, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
+ zfcp_erp_adapter_reopen(unit->port->adapter, 0, 109, req);
+ /* fall through */
case FSF_LUN_ALREADY_OPEN:
- ZFCP_LOG_NORMAL("bug: Attempted to open unit 0x%016Lx on "
- "remote port 0x%016Lx on adapter %s twice.\n",
- unit->fcp_lun,
- unit->port->wwpn, zfcp_get_busid_by_unit(unit));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
case FSF_ACCESS_DENIED:
- ZFCP_LOG_NORMAL("Access denied, cannot open unit 0x%016Lx on "
- "remote port 0x%016Lx on adapter %s\n",
- unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- for (counter = 0; counter < 2; counter++) {
- subtable = header->fsf_status_qual.halfword[counter * 2];
- rule = header->fsf_status_qual.halfword[counter * 2 + 1];
- switch (subtable) {
- case FSF_SQ_CFDC_SUBTABLE_OS:
- case FSF_SQ_CFDC_SUBTABLE_PORT_WWPN:
- case FSF_SQ_CFDC_SUBTABLE_PORT_DID:
- case FSF_SQ_CFDC_SUBTABLE_LUN:
- ZFCP_LOG_INFO("Access denied (%s rule %d)\n",
- zfcp_act_subtable_type[subtable], rule);
- break;
- }
- }
- zfcp_erp_unit_access_denied(unit, 59, fsf_req);
- atomic_clear_mask(ZFCP_STATUS_UNIT_SHARED, &unit->status);
- atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PORT_BOXED:
- ZFCP_LOG_DEBUG("The remote port 0x%016Lx on adapter %s "
- "needs to be reopened\n",
- unit->port->wwpn, zfcp_get_busid_by_unit(unit));
- zfcp_erp_port_boxed(unit->port, 51, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR |
- ZFCP_STATUS_FSFREQ_RETRY;
- break;
-
- case FSF_LUN_SHARING_VIOLATION:
- if (header->fsf_status_qual.word[0] != 0) {
- ZFCP_LOG_NORMAL("FCP-LUN 0x%Lx at the remote port "
- "with WWPN 0x%Lx "
- "connected to the adapter %s "
- "is already in use in LPAR%d, CSS%d\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- queue_designator->hla,
- queue_designator->cssid);
- } else {
- subtable = header->fsf_status_qual.halfword[4];
- rule = header->fsf_status_qual.halfword[5];
- switch (subtable) {
- case FSF_SQ_CFDC_SUBTABLE_OS:
- case FSF_SQ_CFDC_SUBTABLE_PORT_WWPN:
- case FSF_SQ_CFDC_SUBTABLE_PORT_DID:
- case FSF_SQ_CFDC_SUBTABLE_LUN:
- ZFCP_LOG_NORMAL("Access to FCP-LUN 0x%Lx at the "
- "remote port with WWPN 0x%Lx "
- "connected to the adapter %s "
- "is denied (%s rule %d)\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- zfcp_act_subtable_type[subtable],
- rule);
- break;
- }
- }
- ZFCP_LOG_DEBUG("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_unit_access_denied(unit, 60, fsf_req);
+ zfcp_fsf_access_denied_unit(req, unit);
atomic_clear_mask(ZFCP_STATUS_UNIT_SHARED, &unit->status);
atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
+ case FSF_PORT_BOXED:
+ zfcp_erp_port_boxed(unit->port, 51, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY;
+ break;
+ case FSF_LUN_SHARING_VIOLATION:
+ if (header->fsf_status_qual.word[0])
+ dev_warn(&adapter->ccw_device->dev,
+ "FCP-LUN 0x%Lx at the remote port "
+ "with WWPN 0x%Lx "
+ "connected to the adapter "
+ "is already in use in LPAR%d, CSS%d.\n",
+ unit->fcp_lun,
+ unit->port->wwpn,
+ queue_designator->hla,
+ queue_designator->cssid);
+ else
+ zfcp_act_eval_err(adapter,
+ header->fsf_status_qual.word[2]);
+ zfcp_erp_unit_access_denied(unit, 60, req);
+ atomic_clear_mask(ZFCP_STATUS_UNIT_SHARED, &unit->status);
+ atomic_clear_mask(ZFCP_STATUS_UNIT_READONLY, &unit->status);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
case FSF_MAXIMUM_NUMBER_OF_LUNS_EXCEEDED:
- ZFCP_LOG_INFO("error: The adapter ran out of resources. "
- "There is no handle (temporary port identifier) "
- "available for unit 0x%016Lx on port 0x%016Lx "
- "on adapter %s\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- zfcp_erp_unit_failed(unit, 34, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ dev_warn(&adapter->ccw_device->dev,
+ "The adapter ran out of resources. There is no "
+ "handle available for unit 0x%016Lx on port 0x%016Lx.",
+ unit->fcp_lun, unit->port->wwpn);
+ zfcp_erp_unit_failed(unit, 34, req);
+ /* fall through */
+ case FSF_INVALID_COMMAND_OPTION:
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
case FSF_ADAPTER_STATUS_AVAILABLE:
switch (header->fsf_status_qual.word[0]) {
case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- /* Re-establish link to port */
zfcp_test_link(unit->port);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
+ /* fall through */
case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- /* ERP strategy will escalate */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
- default:
- ZFCP_LOG_NORMAL
- ("bug: Wrong status qualifier 0x%x arrived.\n",
- header->fsf_status_qual.word[0]);
}
break;
- case FSF_INVALID_COMMAND_OPTION:
- ZFCP_LOG_NORMAL(
- "Invalid option 0x%x has been specified "
- "in QTCB bottom sent to the adapter %s\n",
- bottom->option,
- zfcp_get_busid_by_adapter(adapter));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EINVAL;
- break;
-
case FSF_GOOD:
- /* save LUN handle assigned by FSF */
unit->handle = header->lun_handle;
- ZFCP_LOG_TRACE("unit 0x%016Lx on remote port 0x%016Lx on "
- "adapter %s opened, port handle 0x%x\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- unit->handle);
- /* mark unit as open */
atomic_set_mask(ZFCP_STATUS_COMMON_OPEN, &unit->status);
if (!(adapter->connection_features & FSF_FEATURE_NPIV_MODE) &&
@@ -3168,221 +1830,377 @@
if (!readwrite) {
atomic_set_mask(ZFCP_STATUS_UNIT_READONLY,
&unit->status);
- ZFCP_LOG_NORMAL("read-only access for unit "
- "(adapter %s, wwpn=0x%016Lx, "
- "fcp_lun=0x%016Lx)\n",
- zfcp_get_busid_by_unit(unit),
- unit->port->wwpn,
- unit->fcp_lun);
+ dev_info(&adapter->ccw_device->dev,
+ "Read-only access for unit 0x%016Lx "
+ "on port 0x%016Lx.\n",
+ unit->fcp_lun, unit->port->wwpn);
}
if (exclusive && !readwrite) {
- ZFCP_LOG_NORMAL("exclusive access of read-only "
- "unit not supported\n");
- zfcp_erp_unit_failed(unit, 35, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- zfcp_erp_unit_shutdown(unit, 0, 80, fsf_req);
+ dev_err(&adapter->ccw_device->dev,
+ "Exclusive access of read-only unit "
+ "0x%016Lx on port 0x%016Lx not "
+ "supported, disabling unit.\n",
+ unit->fcp_lun, unit->port->wwpn);
+ zfcp_erp_unit_failed(unit, 35, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ zfcp_erp_unit_shutdown(unit, 0, 80, req);
} else if (!exclusive && readwrite) {
- ZFCP_LOG_NORMAL("shared access of read-write "
- "unit not supported\n");
- zfcp_erp_unit_failed(unit, 36, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- zfcp_erp_unit_shutdown(unit, 0, 81, fsf_req);
+ dev_err(&adapter->ccw_device->dev,
+ "Shared access of read-write unit "
+ "0x%016Lx on port 0x%016Lx not "
+ "supported, disabling unit.\n",
+ unit->fcp_lun, unit->port->wwpn);
+ zfcp_erp_unit_failed(unit, 36, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ zfcp_erp_unit_shutdown(unit, 0, 81, req);
}
}
-
- retval = 0;
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: An unknown FSF Status was presented "
- "(debug info 0x%x)\n",
- header->fsf_status);
break;
}
- skip_fsfstatus:
+skip_fsfstatus:
atomic_clear_mask(ZFCP_STATUS_COMMON_OPENING, &unit->status);
- return retval;
}
-/*
- * function: zfcp_fsf_close_unit
- *
- * purpose:
- *
- * returns: address of fsf_req - request successfully initiated
- * NULL -
- *
- * assumptions: This routine does not check whether the associated
- * remote port/lun has already been opened. This should be
- * done by calling routines. Otherwise some status
- * may be presented by FSF
+/**
+ * zfcp_fsf_open_unit - open unit
+ * @erp_action: pointer to struct zfcp_erp_action
+ * Returns: 0 on success, error otherwise
*/
-int
-zfcp_fsf_close_unit(struct zfcp_erp_action *erp_action)
+int zfcp_fsf_open_unit(struct zfcp_erp_action *erp_action)
{
volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req;
- unsigned long lock_flags;
- int retval = 0;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+ struct zfcp_fsf_req *req;
+ int retval = -EIO;
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(erp_action->adapter,
- FSF_QTCB_CLOSE_LUN,
- ZFCP_WAIT_FOR_SBAL | ZFCP_REQ_AUTO_CLEANUP,
- erp_action->adapter->pool.fsf_req_erp,
- &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Could not create close unit request for "
- "unit 0x%016Lx on port 0x%016Lx on adapter %s.\n",
- erp_action->unit->fcp_lun,
- erp_action->port->wwpn,
- zfcp_get_busid_by_adapter(erp_action->adapter));
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_OPEN_LUN,
+ ZFCP_REQ_AUTO_CLEANUP,
+ adapter->pool.fsf_req_erp);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
goto out;
}
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
+ sbale = zfcp_qdio_sbale_req(req);
sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
- fsf_req->qtcb->header.port_handle = erp_action->port->handle;
- fsf_req->qtcb->header.lun_handle = erp_action->unit->handle;
- atomic_set_mask(ZFCP_STATUS_COMMON_CLOSING, &erp_action->unit->status);
- fsf_req->data = (unsigned long) erp_action->unit;
- fsf_req->erp_action = erp_action;
- erp_action->fsf_req = fsf_req;
+ req->qtcb->header.port_handle = erp_action->port->handle;
+ req->qtcb->bottom.support.fcp_lun = erp_action->unit->fcp_lun;
+ req->handler = zfcp_fsf_open_unit_handler;
+ req->data = erp_action->unit;
+ req->erp_action = erp_action;
+ erp_action->fsf_req = req;
- zfcp_erp_start_timer(fsf_req);
- retval = zfcp_fsf_req_send(erp_action->fsf_req);
+ if (!(adapter->connection_features & FSF_FEATURE_NPIV_MODE))
+ req->qtcb->bottom.support.option = FSF_OPEN_LUN_SUPPRESS_BOXING;
+
+ atomic_set_mask(ZFCP_STATUS_COMMON_OPENING, &erp_action->unit->status);
+
+ zfcp_fsf_start_erp_timer(req);
+ retval = zfcp_fsf_req_send(req);
if (retval) {
- ZFCP_LOG_INFO("error: Could not send a close unit request for "
- "unit 0x%016Lx on port 0x%016Lx onadapter %s.\n",
- erp_action->unit->fcp_lun,
- erp_action->port->wwpn,
- zfcp_get_busid_by_adapter(erp_action->adapter));
- zfcp_fsf_req_free(fsf_req);
+ zfcp_fsf_req_free(req);
erp_action->fsf_req = NULL;
- goto out;
}
-
- ZFCP_LOG_TRACE("Close LUN request initiated (adapter %s, "
- "port 0x%016Lx, unit 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(erp_action->adapter),
- erp_action->port->wwpn, erp_action->unit->fcp_lun);
- out:
- write_unlock_irqrestore(&erp_action->adapter->request_queue.queue_lock,
- lock_flags);
+out:
+ spin_unlock(&adapter->req_q.lock);
return retval;
}
-/*
- * function: zfcp_fsf_close_unit_handler
- *
- * purpose: is called for finished Close LUN FSF command
- *
- * returns:
- */
-static int
-zfcp_fsf_close_unit_handler(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_close_unit_handler(struct zfcp_fsf_req *req)
{
- int retval = -EINVAL;
- struct zfcp_unit *unit;
+ struct zfcp_unit *unit = req->data;
- unit = (struct zfcp_unit *) fsf_req->data;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR) {
- /* don't change unit status in our bookkeeping */
+ if (req->status & ZFCP_STATUS_FSFREQ_ERROR)
goto skip_fsfstatus;
- }
- /* evaluate FSF status in QTCB */
- switch (fsf_req->qtcb->header.fsf_status) {
-
+ switch (req->qtcb->header.fsf_status) {
case FSF_PORT_HANDLE_NOT_VALID:
- ZFCP_LOG_INFO("Temporary port identifier 0x%x for port "
- "0x%016Lx on adapter %s invalid. This may "
- "happen in rare circumstances\n",
- unit->port->handle,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- ZFCP_LOG_DEBUG("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &fsf_req->qtcb->header.fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_adapter_reopen(unit->port->adapter, 0, 110, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ zfcp_erp_adapter_reopen(unit->port->adapter, 0, 110, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
case FSF_LUN_HANDLE_NOT_VALID:
- ZFCP_LOG_INFO("Temporary LUN identifier 0x%x of unit "
- "0x%016Lx on port 0x%016Lx on adapter %s is "
- "invalid. This may happen occasionally.\n",
- unit->handle,
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- ZFCP_LOG_DEBUG("Status qualifier data:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &fsf_req->qtcb->header.fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_port_reopen(unit->port, 0, 111, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ zfcp_erp_port_reopen(unit->port, 0, 111, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
-
case FSF_PORT_BOXED:
- ZFCP_LOG_DEBUG("The remote port 0x%016Lx on adapter %s "
- "needs to be reopened\n",
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- zfcp_erp_port_boxed(unit->port, 52, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR |
- ZFCP_STATUS_FSFREQ_RETRY;
+ zfcp_erp_port_boxed(unit->port, 52, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY;
break;
-
case FSF_ADAPTER_STATUS_AVAILABLE:
- switch (fsf_req->qtcb->header.fsf_status_qual.word[0]) {
+ switch (req->qtcb->header.fsf_status_qual.word[0]) {
case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- /* re-establish link to port */
zfcp_test_link(unit->port);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
+ /* fall through */
case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- /* ERP strategy will escalate */
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
- default:
- ZFCP_LOG_NORMAL
- ("bug: Wrong status qualifier 0x%x arrived.\n",
- fsf_req->qtcb->header.fsf_status_qual.word[0]);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
break;
}
break;
-
case FSF_GOOD:
- ZFCP_LOG_TRACE("unit 0x%016Lx on port 0x%016Lx on adapter %s "
- "closed, port handle 0x%x\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- unit->handle);
- /* mark unit as closed */
atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN, &unit->status);
- retval = 0;
- break;
-
- default:
- ZFCP_LOG_NORMAL("bug: An unknown FSF Status was presented "
- "(debug info 0x%x)\n",
- fsf_req->qtcb->header.fsf_status);
break;
}
-
- skip_fsfstatus:
+skip_fsfstatus:
atomic_clear_mask(ZFCP_STATUS_COMMON_CLOSING, &unit->status);
+}
+
+/**
+ * zfcp_fsf_close_unit - close zfcp unit
+ * @erp_action: pointer to struct zfcp_unit
+ * Returns: 0 on success, error otherwise
+ */
+int zfcp_fsf_close_unit(struct zfcp_erp_action *erp_action)
+{
+ volatile struct qdio_buffer_element *sbale;
+ struct zfcp_adapter *adapter = erp_action->adapter;
+ struct zfcp_fsf_req *req;
+ int retval = -EIO;
+
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_CLOSE_LUN,
+ ZFCP_REQ_AUTO_CLEANUP,
+ adapter->pool.fsf_req_erp);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
+ goto out;
+ }
+
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_READ;
+ sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
+
+ req->qtcb->header.port_handle = erp_action->port->handle;
+ req->qtcb->header.lun_handle = erp_action->unit->handle;
+ req->handler = zfcp_fsf_close_unit_handler;
+ req->data = erp_action->unit;
+ req->erp_action = erp_action;
+ erp_action->fsf_req = req;
+ atomic_set_mask(ZFCP_STATUS_COMMON_CLOSING, &erp_action->unit->status);
+
+ zfcp_fsf_start_erp_timer(req);
+ retval = zfcp_fsf_req_send(req);
+ if (retval) {
+ zfcp_fsf_req_free(req);
+ erp_action->fsf_req = NULL;
+ }
+out:
+ spin_unlock(&adapter->req_q.lock);
return retval;
}
+static void zfcp_fsf_update_lat(struct fsf_latency_record *lat_rec, u32 lat)
+{
+ lat_rec->sum += lat;
+ lat_rec->min = min(lat_rec->min, lat);
+ lat_rec->max = max(lat_rec->max, lat);
+}
+
+static void zfcp_fsf_req_latency(struct zfcp_fsf_req *req)
+{
+ struct fsf_qual_latency_info *lat_inf;
+ struct latency_cont *lat;
+ struct zfcp_unit *unit = req->unit;
+ unsigned long flags;
+
+ lat_inf = &req->qtcb->prefix.prot_status_qual.latency_info;
+
+ switch (req->qtcb->bottom.io.data_direction) {
+ case FSF_DATADIR_READ:
+ lat = &unit->latencies.read;
+ break;
+ case FSF_DATADIR_WRITE:
+ lat = &unit->latencies.write;
+ break;
+ case FSF_DATADIR_CMND:
+ lat = &unit->latencies.cmd;
+ break;
+ default:
+ return;
+ }
+
+ spin_lock_irqsave(&unit->latencies.lock, flags);
+ zfcp_fsf_update_lat(&lat->channel, lat_inf->channel_lat);
+ zfcp_fsf_update_lat(&lat->fabric, lat_inf->fabric_lat);
+ lat->counter++;
+ spin_unlock_irqrestore(&unit->latencies.lock, flags);
+}
+
+static void zfcp_fsf_send_fcp_command_task_handler(struct zfcp_fsf_req *req)
+{
+ struct scsi_cmnd *scpnt = req->data;
+ struct fcp_rsp_iu *fcp_rsp_iu = (struct fcp_rsp_iu *)
+ &(req->qtcb->bottom.io.fcp_rsp);
+ u32 sns_len;
+ char *fcp_rsp_info = (unsigned char *) &fcp_rsp_iu[1];
+ unsigned long flags;
+
+ if (unlikely(!scpnt))
+ return;
+
+ read_lock_irqsave(&req->adapter->abort_lock, flags);
+
+ if (unlikely(req->status & ZFCP_STATUS_FSFREQ_ABORTED)) {
+ set_host_byte(scpnt, DID_SOFT_ERROR);
+ set_driver_byte(scpnt, SUGGEST_RETRY);
+ goto skip_fsfstatus;
+ }
+
+ if (unlikely(req->status & ZFCP_STATUS_FSFREQ_ERROR)) {
+ set_host_byte(scpnt, DID_ERROR);
+ goto skip_fsfstatus;
+ }
+
+ set_msg_byte(scpnt, COMMAND_COMPLETE);
+
+ scpnt->result |= fcp_rsp_iu->scsi_status;
+
+ if (req->adapter->adapter_features & FSF_FEATURE_MEASUREMENT_DATA)
+ zfcp_fsf_req_latency(req);
+
+ if (unlikely(fcp_rsp_iu->validity.bits.fcp_rsp_len_valid)) {
+ if (fcp_rsp_info[3] == RSP_CODE_GOOD)
+ set_host_byte(scpnt, DID_OK);
+ else {
+ set_host_byte(scpnt, DID_ERROR);
+ goto skip_fsfstatus;
+ }
+ }
+
+ if (unlikely(fcp_rsp_iu->validity.bits.fcp_sns_len_valid)) {
+ sns_len = FSF_FCP_RSP_SIZE - sizeof(struct fcp_rsp_iu) +
+ fcp_rsp_iu->fcp_rsp_len;
+ sns_len = min(sns_len, (u32) SCSI_SENSE_BUFFERSIZE);
+ sns_len = min(sns_len, fcp_rsp_iu->fcp_sns_len);
+
+ memcpy(scpnt->sense_buffer,
+ zfcp_get_fcp_sns_info_ptr(fcp_rsp_iu), sns_len);
+ }
+
+ if (unlikely(fcp_rsp_iu->validity.bits.fcp_resid_under)) {
+ scsi_set_resid(scpnt, fcp_rsp_iu->fcp_resid);
+ if (scsi_bufflen(scpnt) - scsi_get_resid(scpnt) <
+ scpnt->underflow)
+ set_host_byte(scpnt, DID_ERROR);
+ }
+skip_fsfstatus:
+ if (scpnt->result != 0)
+ zfcp_scsi_dbf_event_result("erro", 3, req->adapter, scpnt, req);
+ else if (scpnt->retries > 0)
+ zfcp_scsi_dbf_event_result("retr", 4, req->adapter, scpnt, req);
+ else
+ zfcp_scsi_dbf_event_result("norm", 6, req->adapter, scpnt, req);
+
+ scpnt->host_scribble = NULL;
+ (scpnt->scsi_done) (scpnt);
+ /*
+ * We must hold this lock until scsi_done has been called.
+ * Otherwise we may call scsi_done after abort regarding this
+ * command has completed.
+ * Note: scsi_done must not block!
+ */
+ read_unlock_irqrestore(&req->adapter->abort_lock, flags);
+}
+
+static void zfcp_fsf_send_fcp_ctm_handler(struct zfcp_fsf_req *req)
+{
+ struct fcp_rsp_iu *fcp_rsp_iu = (struct fcp_rsp_iu *)
+ &(req->qtcb->bottom.io.fcp_rsp);
+ char *fcp_rsp_info = (unsigned char *) &fcp_rsp_iu[1];
+
+ if ((fcp_rsp_info[3] != RSP_CODE_GOOD) ||
+ (req->status & ZFCP_STATUS_FSFREQ_ERROR))
+ req->status |= ZFCP_STATUS_FSFREQ_TMFUNCFAILED;
+}
+
+
+static void zfcp_fsf_send_fcp_command_handler(struct zfcp_fsf_req *req)
+{
+ struct zfcp_unit *unit;
+ struct fsf_qtcb_header *header = &req->qtcb->header;
+
+ if (unlikely(req->status & ZFCP_STATUS_FSFREQ_TASK_MANAGEMENT))
+ unit = req->data;
+ else
+ unit = req->unit;
+
+ if (unlikely(req->status & ZFCP_STATUS_FSFREQ_ERROR))
+ goto skip_fsfstatus;
+
+ switch (header->fsf_status) {
+ case FSF_HANDLE_MISMATCH:
+ case FSF_PORT_HANDLE_NOT_VALID:
+ zfcp_erp_adapter_reopen(unit->port->adapter, 0, 112, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
+ case FSF_FCPLUN_NOT_VALID:
+ case FSF_LUN_HANDLE_NOT_VALID:
+ zfcp_erp_port_reopen(unit->port, 0, 113, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
+ case FSF_SERVICE_CLASS_NOT_SUPPORTED:
+ zfcp_fsf_class_not_supp(req);
+ break;
+ case FSF_ACCESS_DENIED:
+ zfcp_fsf_access_denied_unit(req, unit);
+ break;
+ case FSF_DIRECTION_INDICATOR_NOT_VALID:
+ dev_err(&req->adapter->ccw_device->dev,
+ "Invalid data direction (%d) given for unit "
+ "0x%016Lx on port 0x%016Lx, shutting down "
+ "adapter.\n",
+ req->qtcb->bottom.io.data_direction,
+ unit->fcp_lun, unit->port->wwpn);
+ zfcp_erp_adapter_shutdown(unit->port->adapter, 0, 133, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
+ case FSF_CMND_LENGTH_NOT_VALID:
+ dev_err(&req->adapter->ccw_device->dev,
+ "An invalid control-data-block length field (%d) "
+ "was found in a command for unit 0x%016Lx on port "
+ "0x%016Lx. Shutting down adapter.\n",
+ req->qtcb->bottom.io.fcp_cmnd_length,
+ unit->fcp_lun, unit->port->wwpn);
+ zfcp_erp_adapter_shutdown(unit->port->adapter, 0, 134, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
+ case FSF_PORT_BOXED:
+ zfcp_erp_port_boxed(unit->port, 53, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY;
+ break;
+ case FSF_LUN_BOXED:
+ zfcp_erp_unit_boxed(unit, 54, req);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR |
+ ZFCP_STATUS_FSFREQ_RETRY;
+ break;
+ case FSF_ADAPTER_STATUS_AVAILABLE:
+ if (header->fsf_status_qual.word[0] ==
+ FSF_SQ_INVOKE_LINK_TEST_PROCEDURE)
+ zfcp_test_link(unit->port);
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
+ break;
+ }
+skip_fsfstatus:
+ if (req->status & ZFCP_STATUS_FSFREQ_TASK_MANAGEMENT)
+ zfcp_fsf_send_fcp_ctm_handler(req);
+ else {
+ zfcp_fsf_send_fcp_command_task_handler(req);
+ req->unit = NULL;
+ zfcp_unit_put(unit);
+ }
+}
+
/**
* zfcp_fsf_send_fcp_command_task - initiate an FCP command (for a SCSI command)
* @adapter: adapter where scsi command is issued
@@ -3391,57 +2209,42 @@
* @timer: timer to be started when request is initiated
* @req_flags: flags for fsf_request
*/
-int
-zfcp_fsf_send_fcp_command_task(struct zfcp_adapter *adapter,
- struct zfcp_unit *unit,
- struct scsi_cmnd * scsi_cmnd,
- int use_timer, int req_flags)
+int zfcp_fsf_send_fcp_command_task(struct zfcp_adapter *adapter,
+ struct zfcp_unit *unit,
+ struct scsi_cmnd *scsi_cmnd,
+ int use_timer, int req_flags)
{
- struct zfcp_fsf_req *fsf_req = NULL;
+ struct zfcp_fsf_req *req;
struct fcp_cmnd_iu *fcp_cmnd_iu;
unsigned int sbtype;
- unsigned long lock_flags;
- int real_bytes = 0;
- int retval = 0;
- int mask;
+ int real_bytes, retval = -EIO;
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND, req_flags,
- adapter->pool.fsf_req_scsi,
- &lock_flags, &fsf_req);
- if (unlikely(retval < 0)) {
- ZFCP_LOG_DEBUG("error: Could not create FCP command request "
- "for unit 0x%016Lx on port 0x%016Lx on "
- "adapter %s\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_adapter(adapter));
- goto failed_req_create;
- }
+ if (unlikely(!(atomic_read(&unit->status) &
+ ZFCP_STATUS_COMMON_UNBLOCKED)))
+ return -EBUSY;
- if (unlikely(!atomic_test_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
- &unit->status))) {
- retval = -EBUSY;
- goto unit_blocked;
+ spin_lock(&adapter->req_q.lock);
+ if (!atomic_read(&adapter->req_q.count))
+ goto out;
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND, req_flags,
+ adapter->pool.fsf_req_scsi);
+ if (unlikely(IS_ERR(req))) {
+ retval = PTR_ERR(req);
+ goto out;
}
zfcp_unit_get(unit);
- fsf_req->unit = unit;
+ req->unit = unit;
+ req->data = scsi_cmnd;
+ req->handler = zfcp_fsf_send_fcp_command_handler;
+ req->qtcb->header.lun_handle = unit->handle;
+ req->qtcb->header.port_handle = unit->port->handle;
+ req->qtcb->bottom.io.service_class = FSF_CLASS_3;
- /* associate FSF request with SCSI request (for look up on abort) */
- scsi_cmnd->host_scribble = (unsigned char *) fsf_req->req_id;
+ scsi_cmnd->host_scribble = (unsigned char *) req->req_id;
- /* associate SCSI command with FSF request */
- fsf_req->data = (unsigned long) scsi_cmnd;
-
- /* set handles of unit and its parent port in QTCB */
- fsf_req->qtcb->header.lun_handle = unit->handle;
- fsf_req->qtcb->header.port_handle = unit->port->handle;
-
- /* FSF does not define the structure of the FCP_CMND IU */
- fcp_cmnd_iu = (struct fcp_cmnd_iu *)
- &(fsf_req->qtcb->bottom.io.fcp_cmnd);
-
+ fcp_cmnd_iu = (struct fcp_cmnd_iu *) &(req->qtcb->bottom.io.fcp_cmnd);
+ fcp_cmnd_iu->fcp_lun = unit->fcp_lun;
/*
* set depending on data direction:
* data direction bits in SBALE (SB Type)
@@ -3450,1246 +2253,206 @@
*/
switch (scsi_cmnd->sc_data_direction) {
case DMA_NONE:
- fsf_req->qtcb->bottom.io.data_direction = FSF_DATADIR_CMND;
- /*
- * FIXME(qdio):
- * what is the correct type for commands
- * without 'real' data buffers?
- */
+ req->qtcb->bottom.io.data_direction = FSF_DATADIR_CMND;
sbtype = SBAL_FLAGS0_TYPE_READ;
break;
case DMA_FROM_DEVICE:
- fsf_req->qtcb->bottom.io.data_direction = FSF_DATADIR_READ;
+ req->qtcb->bottom.io.data_direction = FSF_DATADIR_READ;
sbtype = SBAL_FLAGS0_TYPE_READ;
fcp_cmnd_iu->rddata = 1;
break;
case DMA_TO_DEVICE:
- fsf_req->qtcb->bottom.io.data_direction = FSF_DATADIR_WRITE;
+ req->qtcb->bottom.io.data_direction = FSF_DATADIR_WRITE;
sbtype = SBAL_FLAGS0_TYPE_WRITE;
fcp_cmnd_iu->wddata = 1;
break;
case DMA_BIDIRECTIONAL:
default:
- /*
- * dummy, catch this condition earlier
- * in zfcp_scsi_queuecommand
- */
+ retval = -EIO;
goto failed_scsi_cmnd;
}
- /* set FC service class in QTCB (3 per default) */
- fsf_req->qtcb->bottom.io.service_class = ZFCP_FC_SERVICE_CLASS_DEFAULT;
-
- /* set FCP_LUN in FCP_CMND IU in QTCB */
- fcp_cmnd_iu->fcp_lun = unit->fcp_lun;
-
- mask = ZFCP_STATUS_UNIT_READONLY | ZFCP_STATUS_UNIT_SHARED;
-
- /* set task attributes in FCP_CMND IU in QTCB */
if (likely((scsi_cmnd->device->simple_tags) ||
- (atomic_test_mask(mask, &unit->status))))
+ ((atomic_read(&unit->status) & ZFCP_STATUS_UNIT_READONLY) &&
+ (atomic_read(&unit->status) & ZFCP_STATUS_UNIT_SHARED))))
fcp_cmnd_iu->task_attribute = SIMPLE_Q;
else
fcp_cmnd_iu->task_attribute = UNTAGGED;
- /* set additional length of FCP_CDB in FCP_CMND IU in QTCB, if needed */
- if (unlikely(scsi_cmnd->cmd_len > FCP_CDB_LENGTH)) {
- fcp_cmnd_iu->add_fcp_cdb_length
- = (scsi_cmnd->cmd_len - FCP_CDB_LENGTH) >> 2;
- ZFCP_LOG_TRACE("SCSI CDB length is 0x%x, "
- "additional FCP_CDB length is 0x%x "
- "(shifted right 2 bits)\n",
- scsi_cmnd->cmd_len,
- fcp_cmnd_iu->add_fcp_cdb_length);
- }
- /*
- * copy SCSI CDB (including additional length, if any) to
- * FCP_CDB in FCP_CMND IU in QTCB
- */
+ if (unlikely(scsi_cmnd->cmd_len > FCP_CDB_LENGTH))
+ fcp_cmnd_iu->add_fcp_cdb_length =
+ (scsi_cmnd->cmd_len - FCP_CDB_LENGTH) >> 2;
+
memcpy(fcp_cmnd_iu->fcp_cdb, scsi_cmnd->cmnd, scsi_cmnd->cmd_len);
- /* FCP CMND IU length in QTCB */
- fsf_req->qtcb->bottom.io.fcp_cmnd_length =
- sizeof (struct fcp_cmnd_iu) +
- fcp_cmnd_iu->add_fcp_cdb_length + sizeof (fcp_dl_t);
+ req->qtcb->bottom.io.fcp_cmnd_length = sizeof(struct fcp_cmnd_iu) +
+ fcp_cmnd_iu->add_fcp_cdb_length + sizeof(fcp_dl_t);
- /* generate SBALEs from data buffer */
- real_bytes = zfcp_qdio_sbals_from_scsicmnd(fsf_req, sbtype, scsi_cmnd);
+ real_bytes = zfcp_qdio_sbals_from_sg(req, sbtype,
+ scsi_sglist(scsi_cmnd),
+ FSF_MAX_SBALS_PER_REQ);
if (unlikely(real_bytes < 0)) {
- if (fsf_req->sbal_number < ZFCP_MAX_SBALS_PER_REQ) {
- ZFCP_LOG_DEBUG(
- "Data did not fit into available buffer(s), "
- "waiting for more...\n");
+ if (req->sbal_number < FSF_MAX_SBALS_PER_REQ)
retval = -EIO;
- } else {
- ZFCP_LOG_NORMAL("error: No truncation implemented but "
- "required. Shutting down unit "
- "(adapter %s, port 0x%016Lx, "
- "unit 0x%016Lx)\n",
- zfcp_get_busid_by_unit(unit),
- unit->port->wwpn,
- unit->fcp_lun);
- zfcp_erp_unit_shutdown(unit, 0, 131, fsf_req);
+ else {
+ dev_err(&adapter->ccw_device->dev,
+ "SCSI request too large. "
+ "Shutting down unit 0x%016Lx on port "
+ "0x%016Lx.\n", unit->fcp_lun,
+ unit->port->wwpn);
+ zfcp_erp_unit_shutdown(unit, 0, 131, req);
retval = -EINVAL;
}
- goto no_fit;
+ goto failed_scsi_cmnd;
}
- /* set length of FCP data length in FCP_CMND IU in QTCB */
zfcp_set_fcp_dl(fcp_cmnd_iu, real_bytes);
- ZFCP_LOG_DEBUG("Sending SCSI command:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) scsi_cmnd->cmnd, scsi_cmnd->cmd_len);
-
if (use_timer)
- zfcp_fsf_start_timer(fsf_req, ZFCP_FSF_REQUEST_TIMEOUT);
+ zfcp_fsf_start_timer(req, ZFCP_FSF_REQUEST_TIMEOUT);
- retval = zfcp_fsf_req_send(fsf_req);
- if (unlikely(retval < 0)) {
- ZFCP_LOG_INFO("error: Could not send FCP command request "
- "on adapter %s, port 0x%016Lx, unit 0x%016Lx\n",
- zfcp_get_busid_by_adapter(adapter),
- unit->port->wwpn,
- unit->fcp_lun);
- goto send_failed;
- }
-
- ZFCP_LOG_TRACE("Send FCP Command initiated (adapter %s, "
- "port 0x%016Lx, unit 0x%016Lx)\n",
- zfcp_get_busid_by_adapter(adapter),
- unit->port->wwpn,
- unit->fcp_lun);
- goto success;
-
- send_failed:
- no_fit:
- failed_scsi_cmnd:
- zfcp_unit_put(unit);
- unit_blocked:
- zfcp_fsf_req_free(fsf_req);
- fsf_req = NULL;
- scsi_cmnd->host_scribble = NULL;
- success:
- failed_req_create:
- write_unlock_irqrestore(&adapter->request_queue.queue_lock, lock_flags);
- return retval;
-}
-
-struct zfcp_fsf_req *
-zfcp_fsf_send_fcp_command_task_management(struct zfcp_adapter *adapter,
- struct zfcp_unit *unit,
- u8 tm_flags, int req_flags)
-{
- struct zfcp_fsf_req *fsf_req = NULL;
- int retval = 0;
- struct fcp_cmnd_iu *fcp_cmnd_iu;
- unsigned long lock_flags;
- volatile struct qdio_buffer_element *sbale;
-
- /* setup new FSF request */
- retval = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND, req_flags,
- adapter->pool.fsf_req_scsi,
- &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Could not create FCP command (task "
- "management) request for adapter %s, port "
- " 0x%016Lx, unit 0x%016Lx.\n",
- zfcp_get_busid_by_adapter(adapter),
- unit->port->wwpn, unit->fcp_lun);
- goto out;
- }
-
- if (unlikely(!atomic_test_mask(ZFCP_STATUS_COMMON_UNBLOCKED,
- &unit->status)))
- goto unit_blocked;
-
- /*
- * Used to decide on proper handler in the return path,
- * could be either zfcp_fsf_send_fcp_command_task_handler or
- * zfcp_fsf_send_fcp_command_task_management_handler */
-
- fsf_req->status |= ZFCP_STATUS_FSFREQ_TASK_MANAGEMENT;
-
- /*
- * hold a pointer to the unit being target of this
- * task management request
- */
- fsf_req->data = (unsigned long) unit;
-
- /* set FSF related fields in QTCB */
- fsf_req->qtcb->header.lun_handle = unit->handle;
- fsf_req->qtcb->header.port_handle = unit->port->handle;
- fsf_req->qtcb->bottom.io.data_direction = FSF_DATADIR_CMND;
- fsf_req->qtcb->bottom.io.service_class = ZFCP_FC_SERVICE_CLASS_DEFAULT;
- fsf_req->qtcb->bottom.io.fcp_cmnd_length =
- sizeof (struct fcp_cmnd_iu) + sizeof (fcp_dl_t);
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= SBAL_FLAGS0_TYPE_WRITE;
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
-
- /* set FCP related fields in FCP_CMND IU in QTCB */
- fcp_cmnd_iu = (struct fcp_cmnd_iu *)
- &(fsf_req->qtcb->bottom.io.fcp_cmnd);
- fcp_cmnd_iu->fcp_lun = unit->fcp_lun;
- fcp_cmnd_iu->task_management_flags = tm_flags;
-
- zfcp_fsf_start_timer(fsf_req, ZFCP_SCSI_ER_TIMEOUT);
- retval = zfcp_fsf_req_send(fsf_req);
- if (!retval)
- goto out;
-
- unit_blocked:
- zfcp_fsf_req_free(fsf_req);
- fsf_req = NULL;
-
- out:
- write_unlock_irqrestore(&adapter->request_queue.queue_lock, lock_flags);
- return fsf_req;
-}
-
-/*
- * function: zfcp_fsf_send_fcp_command_handler
- *
- * purpose: is called for finished Send FCP Command
- *
- * returns:
- */
-static int
-zfcp_fsf_send_fcp_command_handler(struct zfcp_fsf_req *fsf_req)
-{
- int retval = -EINVAL;
- struct zfcp_unit *unit;
- struct fsf_qtcb_header *header;
- u16 subtable, rule, counter;
-
- header = &fsf_req->qtcb->header;
-
- if (unlikely(fsf_req->status & ZFCP_STATUS_FSFREQ_TASK_MANAGEMENT))
- unit = (struct zfcp_unit *) fsf_req->data;
- else
- unit = fsf_req->unit;
-
- if (unlikely(fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR)) {
- /* go directly to calls of special handlers */
- goto skip_fsfstatus;
- }
-
- /* evaluate FSF status in QTCB */
- switch (header->fsf_status) {
-
- case FSF_PORT_HANDLE_NOT_VALID:
- ZFCP_LOG_INFO("Temporary port identifier 0x%x for port "
- "0x%016Lx on adapter %s invalid\n",
- unit->port->handle,
- unit->port->wwpn, zfcp_get_busid_by_unit(unit));
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_adapter_reopen(unit->port->adapter, 0, 112, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_LUN_HANDLE_NOT_VALID:
- ZFCP_LOG_INFO("Temporary LUN identifier 0x%x for unit "
- "0x%016Lx on port 0x%016Lx on adapter %s is "
- "invalid. This may happen occasionally.\n",
- unit->handle,
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- ZFCP_LOG_NORMAL("Status qualifier data:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_NORMAL,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_port_reopen(unit->port, 0, 113, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_HANDLE_MISMATCH:
- ZFCP_LOG_NORMAL("bug: The port handle 0x%x has changed "
- "unexpectedly. (adapter %s, port 0x%016Lx, "
- "unit 0x%016Lx)\n",
- unit->port->handle,
- zfcp_get_busid_by_unit(unit),
- unit->port->wwpn,
- unit->fcp_lun);
- ZFCP_LOG_NORMAL("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_NORMAL,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_adapter_reopen(unit->port->adapter, 0, 114, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_SERVICE_CLASS_NOT_SUPPORTED:
- ZFCP_LOG_INFO("error: adapter %s does not support fc "
- "class %d.\n",
- zfcp_get_busid_by_unit(unit),
- ZFCP_FC_SERVICE_CLASS_DEFAULT);
- /* stop operation for this adapter */
- zfcp_erp_adapter_shutdown(unit->port->adapter, 0, 132, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_FCPLUN_NOT_VALID:
- ZFCP_LOG_NORMAL("bug: unit 0x%016Lx on port 0x%016Lx on "
- "adapter %s does not have correct unit "
- "handle 0x%x\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- unit->handle);
- ZFCP_LOG_DEBUG("status qualifier:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &header->fsf_status_qual,
- sizeof (union fsf_status_qual));
- zfcp_erp_port_reopen(unit->port, 0, 115, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_ACCESS_DENIED:
- ZFCP_LOG_NORMAL("Access denied, cannot send FCP command to "
- "unit 0x%016Lx on port 0x%016Lx on "
- "adapter %s\n", unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- for (counter = 0; counter < 2; counter++) {
- subtable = header->fsf_status_qual.halfword[counter * 2];
- rule = header->fsf_status_qual.halfword[counter * 2 + 1];
- switch (subtable) {
- case FSF_SQ_CFDC_SUBTABLE_OS:
- case FSF_SQ_CFDC_SUBTABLE_PORT_WWPN:
- case FSF_SQ_CFDC_SUBTABLE_PORT_DID:
- case FSF_SQ_CFDC_SUBTABLE_LUN:
- ZFCP_LOG_INFO("Access denied (%s rule %d)\n",
- zfcp_act_subtable_type[subtable], rule);
- break;
- }
- }
- zfcp_erp_unit_access_denied(unit, 61, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_DIRECTION_INDICATOR_NOT_VALID:
- ZFCP_LOG_INFO("bug: Invalid data direction given for unit "
- "0x%016Lx on port 0x%016Lx on adapter %s "
- "(debug info %d)\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- fsf_req->qtcb->bottom.io.data_direction);
- /* stop operation for this adapter */
- zfcp_erp_adapter_shutdown(unit->port->adapter, 0, 133, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_CMND_LENGTH_NOT_VALID:
- ZFCP_LOG_NORMAL
- ("bug: An invalid control-data-block length field "
- "was found in a command for unit 0x%016Lx on port "
- "0x%016Lx on adapter %s " "(debug info %d)\n",
- unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- fsf_req->qtcb->bottom.io.fcp_cmnd_length);
- /* stop operation for this adapter */
- zfcp_erp_adapter_shutdown(unit->port->adapter, 0, 134, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_PORT_BOXED:
- ZFCP_LOG_DEBUG("The remote port 0x%016Lx on adapter %s "
- "needs to be reopened\n",
- unit->port->wwpn, zfcp_get_busid_by_unit(unit));
- zfcp_erp_port_boxed(unit->port, 53, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR |
- ZFCP_STATUS_FSFREQ_RETRY;
- break;
-
- case FSF_LUN_BOXED:
- ZFCP_LOG_NORMAL("unit needs to be reopened (adapter %s, "
- "wwpn=0x%016Lx, fcp_lun=0x%016Lx)\n",
- zfcp_get_busid_by_unit(unit),
- unit->port->wwpn, unit->fcp_lun);
- zfcp_erp_unit_boxed(unit, 54, fsf_req);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR
- | ZFCP_STATUS_FSFREQ_RETRY;
- break;
-
- case FSF_ADAPTER_STATUS_AVAILABLE:
- switch (header->fsf_status_qual.word[0]) {
- case FSF_SQ_INVOKE_LINK_TEST_PROCEDURE:
- /* re-establish link to port */
- zfcp_test_link(unit->port);
- break;
- case FSF_SQ_ULP_DEPENDENT_ERP_REQUIRED:
- /* FIXME(hw) need proper specs for proper action */
- /* let scsi stack deal with retries and escalation */
- break;
- default:
- ZFCP_LOG_NORMAL
- ("Unknown status qualifier 0x%x arrived.\n",
- header->fsf_status_qual.word[0]);
- break;
- }
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- break;
-
- case FSF_GOOD:
- break;
-
- case FSF_FCP_RSP_AVAILABLE:
- break;
- }
-
- skip_fsfstatus:
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_TASK_MANAGEMENT) {
- retval =
- zfcp_fsf_send_fcp_command_task_management_handler(fsf_req);
- } else {
- retval = zfcp_fsf_send_fcp_command_task_handler(fsf_req);
- fsf_req->unit = NULL;
- zfcp_unit_put(unit);
- }
- return retval;
-}
-
-/*
- * function: zfcp_fsf_send_fcp_command_task_handler
- *
- * purpose: evaluates FCP_RSP IU
- *
- * returns:
- */
-static int
-zfcp_fsf_send_fcp_command_task_handler(struct zfcp_fsf_req *fsf_req)
-{
- int retval = 0;
- struct scsi_cmnd *scpnt;
- struct fcp_rsp_iu *fcp_rsp_iu = (struct fcp_rsp_iu *)
- &(fsf_req->qtcb->bottom.io.fcp_rsp);
- struct fcp_cmnd_iu *fcp_cmnd_iu = (struct fcp_cmnd_iu *)
- &(fsf_req->qtcb->bottom.io.fcp_cmnd);
- u32 sns_len;
- char *fcp_rsp_info = zfcp_get_fcp_rsp_info_ptr(fcp_rsp_iu);
- unsigned long flags;
- struct zfcp_unit *unit = fsf_req->unit;
-
- read_lock_irqsave(&fsf_req->adapter->abort_lock, flags);
- scpnt = (struct scsi_cmnd *) fsf_req->data;
- if (unlikely(!scpnt)) {
- ZFCP_LOG_DEBUG
- ("Command with fsf_req %p is not associated to "
- "a scsi command anymore. Aborted?\n", fsf_req);
- goto out;
- }
- if (unlikely(fsf_req->status & ZFCP_STATUS_FSFREQ_ABORTED)) {
- /* FIXME: (design) mid-layer should handle DID_ABORT like
- * DID_SOFT_ERROR by retrying the request for devices
- * that allow retries.
- */
- ZFCP_LOG_DEBUG("Setting DID_SOFT_ERROR and SUGGEST_RETRY\n");
- set_host_byte(&scpnt->result, DID_SOFT_ERROR);
- set_driver_byte(&scpnt->result, SUGGEST_RETRY);
- goto skip_fsfstatus;
- }
-
- if (unlikely(fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR)) {
- ZFCP_LOG_DEBUG("Setting DID_ERROR\n");
- set_host_byte(&scpnt->result, DID_ERROR);
- goto skip_fsfstatus;
- }
-
- /* set message byte of result in SCSI command */
- scpnt->result |= COMMAND_COMPLETE << 8;
-
- /*
- * copy SCSI status code of FCP_STATUS of FCP_RSP IU to status byte
- * of result in SCSI command
- */
- scpnt->result |= fcp_rsp_iu->scsi_status;
- if (unlikely(fcp_rsp_iu->scsi_status)) {
- /* DEBUG */
- ZFCP_LOG_DEBUG("status for SCSI Command:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- scpnt->cmnd, scpnt->cmd_len);
- ZFCP_LOG_DEBUG("SCSI status code 0x%x\n",
- fcp_rsp_iu->scsi_status);
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (void *) fcp_rsp_iu, sizeof (struct fcp_rsp_iu));
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- zfcp_get_fcp_sns_info_ptr(fcp_rsp_iu),
- fcp_rsp_iu->fcp_sns_len);
- }
-
- /* check FCP_RSP_INFO */
- if (unlikely(fcp_rsp_iu->validity.bits.fcp_rsp_len_valid)) {
- ZFCP_LOG_DEBUG("rsp_len is valid\n");
- switch (fcp_rsp_info[3]) {
- case RSP_CODE_GOOD:
- /* ok, continue */
- ZFCP_LOG_TRACE("no failure or Task Management "
- "Function complete\n");
- set_host_byte(&scpnt->result, DID_OK);
- break;
- case RSP_CODE_LENGTH_MISMATCH:
- /* hardware bug */
- ZFCP_LOG_NORMAL("bug: FCP response code indictates "
- "that the fibrechannel protocol data "
- "length differs from the burst length. "
- "The problem occured on unit 0x%016Lx "
- "on port 0x%016Lx on adapter %s",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- /* dump SCSI CDB as prepared by zfcp */
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &fsf_req->qtcb->
- bottom.io.fcp_cmnd, FSF_FCP_CMND_SIZE);
- set_host_byte(&scpnt->result, DID_ERROR);
- goto skip_fsfstatus;
- case RSP_CODE_FIELD_INVALID:
- /* driver or hardware bug */
- ZFCP_LOG_NORMAL("bug: FCP response code indictates "
- "that the fibrechannel protocol data "
- "fields were incorrectly set up. "
- "The problem occured on the unit "
- "0x%016Lx on port 0x%016Lx on "
- "adapter %s",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- /* dump SCSI CDB as prepared by zfcp */
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &fsf_req->qtcb->
- bottom.io.fcp_cmnd, FSF_FCP_CMND_SIZE);
- set_host_byte(&scpnt->result, DID_ERROR);
- goto skip_fsfstatus;
- case RSP_CODE_RO_MISMATCH:
- /* hardware bug */
- ZFCP_LOG_NORMAL("bug: The FCP response code indicates "
- "that conflicting values for the "
- "fibrechannel payload offset from the "
- "header were found. "
- "The problem occured on unit 0x%016Lx "
- "on port 0x%016Lx on adapter %s.\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- /* dump SCSI CDB as prepared by zfcp */
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &fsf_req->qtcb->
- bottom.io.fcp_cmnd, FSF_FCP_CMND_SIZE);
- set_host_byte(&scpnt->result, DID_ERROR);
- goto skip_fsfstatus;
- default:
- ZFCP_LOG_NORMAL("bug: An invalid FCP response "
- "code was detected for a command. "
- "The problem occured on the unit "
- "0x%016Lx on port 0x%016Lx on "
- "adapter %s (debug info 0x%x)\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- fcp_rsp_info[3]);
- /* dump SCSI CDB as prepared by zfcp */
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_DEBUG,
- (char *) &fsf_req->qtcb->
- bottom.io.fcp_cmnd, FSF_FCP_CMND_SIZE);
- set_host_byte(&scpnt->result, DID_ERROR);
- goto skip_fsfstatus;
- }
- }
-
- /* check for sense data */
- if (unlikely(fcp_rsp_iu->validity.bits.fcp_sns_len_valid)) {
- sns_len = FSF_FCP_RSP_SIZE -
- sizeof (struct fcp_rsp_iu) + fcp_rsp_iu->fcp_rsp_len;
- ZFCP_LOG_TRACE("room for %i bytes sense data in QTCB\n",
- sns_len);
- sns_len = min(sns_len, (u32) SCSI_SENSE_BUFFERSIZE);
- ZFCP_LOG_TRACE("room for %i bytes sense data in SCSI command\n",
- SCSI_SENSE_BUFFERSIZE);
- sns_len = min(sns_len, fcp_rsp_iu->fcp_sns_len);
- ZFCP_LOG_TRACE("scpnt->result =0x%x, command was:\n",
- scpnt->result);
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_TRACE,
- scpnt->cmnd, scpnt->cmd_len);
-
- ZFCP_LOG_TRACE("%i bytes sense data provided by FCP\n",
- fcp_rsp_iu->fcp_sns_len);
- memcpy(scpnt->sense_buffer,
- zfcp_get_fcp_sns_info_ptr(fcp_rsp_iu), sns_len);
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_TRACE,
- (void *)scpnt->sense_buffer, sns_len);
- }
-
- /* check for overrun */
- if (unlikely(fcp_rsp_iu->validity.bits.fcp_resid_over)) {
- ZFCP_LOG_INFO("A data overrun was detected for a command. "
- "unit 0x%016Lx, port 0x%016Lx, adapter %s. "
- "The response data length is "
- "%d, the original length was %d.\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- fcp_rsp_iu->fcp_resid,
- (int) zfcp_get_fcp_dl(fcp_cmnd_iu));
- }
-
- /* check for underrun */
- if (unlikely(fcp_rsp_iu->validity.bits.fcp_resid_under)) {
- ZFCP_LOG_INFO("A data underrun was detected for a command. "
- "unit 0x%016Lx, port 0x%016Lx, adapter %s. "
- "The response data length is "
- "%d, the original length was %d.\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- fcp_rsp_iu->fcp_resid,
- (int) zfcp_get_fcp_dl(fcp_cmnd_iu));
-
- scsi_set_resid(scpnt, fcp_rsp_iu->fcp_resid);
- if (scsi_bufflen(scpnt) - scsi_get_resid(scpnt) <
- scpnt->underflow)
- set_host_byte(&scpnt->result, DID_ERROR);
- }
-
- skip_fsfstatus:
- ZFCP_LOG_DEBUG("scpnt->result =0x%x\n", scpnt->result);
-
- if (scpnt->result != 0)
- zfcp_scsi_dbf_event_result("erro", 3, fsf_req->adapter, scpnt, fsf_req);
- else if (scpnt->retries > 0)
- zfcp_scsi_dbf_event_result("retr", 4, fsf_req->adapter, scpnt, fsf_req);
- else
- zfcp_scsi_dbf_event_result("norm", 6, fsf_req->adapter, scpnt, fsf_req);
-
- /* cleanup pointer (need this especially for abort) */
- scpnt->host_scribble = NULL;
-
- /* always call back */
- (scpnt->scsi_done) (scpnt);
-
- /*
- * We must hold this lock until scsi_done has been called.
- * Otherwise we may call scsi_done after abort regarding this
- * command has completed.
- * Note: scsi_done must not block!
- */
- out:
- read_unlock_irqrestore(&fsf_req->adapter->abort_lock, flags);
- return retval;
-}
-
-/*
- * function: zfcp_fsf_send_fcp_command_task_management_handler
- *
- * purpose: evaluates FCP_RSP IU
- *
- * returns:
- */
-static int
-zfcp_fsf_send_fcp_command_task_management_handler(struct zfcp_fsf_req *fsf_req)
-{
- int retval = 0;
- struct fcp_rsp_iu *fcp_rsp_iu = (struct fcp_rsp_iu *)
- &(fsf_req->qtcb->bottom.io.fcp_rsp);
- char *fcp_rsp_info = zfcp_get_fcp_rsp_info_ptr(fcp_rsp_iu);
- struct zfcp_unit *unit = (struct zfcp_unit *) fsf_req->data;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR) {
- fsf_req->status |= ZFCP_STATUS_FSFREQ_TMFUNCFAILED;
- goto skip_fsfstatus;
- }
-
- /* check FCP_RSP_INFO */
- switch (fcp_rsp_info[3]) {
- case RSP_CODE_GOOD:
- /* ok, continue */
- ZFCP_LOG_DEBUG("no failure or Task Management "
- "Function complete\n");
- break;
- case RSP_CODE_TASKMAN_UNSUPP:
- ZFCP_LOG_NORMAL("bug: A reuested task management function "
- "is not supported on the target device "
- "unit 0x%016Lx, port 0x%016Lx, adapter %s\n ",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_TMFUNCNOTSUPP;
- break;
- case RSP_CODE_TASKMAN_FAILED:
- ZFCP_LOG_NORMAL("bug: A reuested task management function "
- "failed to complete successfully. "
- "unit 0x%016Lx, port 0x%016Lx, adapter %s.\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_TMFUNCFAILED;
- break;
- default:
- ZFCP_LOG_NORMAL("bug: An invalid FCP response "
- "code was detected for a command. "
- "unit 0x%016Lx, port 0x%016Lx, adapter %s "
- "(debug info 0x%x)\n",
- unit->fcp_lun,
- unit->port->wwpn,
- zfcp_get_busid_by_unit(unit),
- fcp_rsp_info[3]);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_TMFUNCFAILED;
- }
-
- skip_fsfstatus:
- return retval;
-}
-
-
-/*
- * function: zfcp_fsf_control_file
- *
- * purpose: Initiator of the control file upload/download FSF requests
- *
- * returns: 0 - FSF request is successfuly created and queued
- * -EOPNOTSUPP - The FCP adapter does not have Control File support
- * -EINVAL - Invalid direction specified
- * -ENOMEM - Insufficient memory
- * -EPERM - Cannot create FSF request or place it in QDIO queue
- */
-int
-zfcp_fsf_control_file(struct zfcp_adapter *adapter,
- struct zfcp_fsf_req **fsf_req_ptr,
- u32 fsf_command,
- u32 option,
- struct zfcp_sg_list *sg_list)
-{
- struct zfcp_fsf_req *fsf_req;
- struct fsf_qtcb_bottom_support *bottom;
- volatile struct qdio_buffer_element *sbale;
- unsigned long lock_flags;
- int req_flags = 0;
- int direction;
- int retval = 0;
-
- if (!(adapter->adapter_features & FSF_FEATURE_CFDC)) {
- ZFCP_LOG_INFO("cfdc not supported (adapter %s)\n",
- zfcp_get_busid_by_adapter(adapter));
- retval = -EOPNOTSUPP;
- goto out;
- }
-
- switch (fsf_command) {
-
- case FSF_QTCB_DOWNLOAD_CONTROL_FILE:
- direction = SBAL_FLAGS0_TYPE_WRITE;
- if ((option != FSF_CFDC_OPTION_FULL_ACCESS) &&
- (option != FSF_CFDC_OPTION_RESTRICTED_ACCESS))
- req_flags = ZFCP_WAIT_FOR_SBAL;
- break;
-
- case FSF_QTCB_UPLOAD_CONTROL_FILE:
- direction = SBAL_FLAGS0_TYPE_READ;
- break;
-
- default:
- ZFCP_LOG_INFO("Invalid FSF command code 0x%08x\n", fsf_command);
- retval = -EINVAL;
- goto out;
- }
-
- retval = zfcp_fsf_req_create(adapter, fsf_command, req_flags,
- NULL, &lock_flags, &fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("error: Could not create FSF request for the "
- "adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- retval = -EPERM;
- goto unlock_queue_lock;
- }
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
- sbale[0].flags |= direction;
-
- bottom = &fsf_req->qtcb->bottom.support;
- bottom->operation_subtype = FSF_CFDC_OPERATION_SUBTYPE;
- bottom->option = option;
-
- if (sg_list->count > 0) {
- int bytes;
-
- bytes = zfcp_qdio_sbals_from_sg(fsf_req, direction,
- sg_list->sg, sg_list->count,
- ZFCP_MAX_SBALS_PER_REQ);
- if (bytes != ZFCP_CFDC_MAX_CONTROL_FILE_SIZE) {
- ZFCP_LOG_INFO(
- "error: Could not create sufficient number of "
- "SBALS for an FSF request to the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- retval = -ENOMEM;
- goto free_fsf_req;
- }
- } else
- sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
-
- zfcp_fsf_start_timer(fsf_req, ZFCP_FSF_REQUEST_TIMEOUT);
- retval = zfcp_fsf_req_send(fsf_req);
- if (retval < 0) {
- ZFCP_LOG_INFO("initiation of cfdc up/download failed"
- "(adapter %s)\n",
- zfcp_get_busid_by_adapter(adapter));
- retval = -EPERM;
- goto free_fsf_req;
- }
- write_unlock_irqrestore(&adapter->request_queue.queue_lock, lock_flags);
-
- ZFCP_LOG_NORMAL("Control file %s FSF request has been sent to the "
- "adapter %s\n",
- fsf_command == FSF_QTCB_DOWNLOAD_CONTROL_FILE ?
- "download" : "upload",
- zfcp_get_busid_by_adapter(adapter));
-
- wait_event(fsf_req->completion_wq,
- fsf_req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
+ retval = zfcp_fsf_req_send(req);
+ if (unlikely(retval))
+ goto failed_scsi_cmnd;
- *fsf_req_ptr = fsf_req;
goto out;
- free_fsf_req:
- zfcp_fsf_req_free(fsf_req);
- unlock_queue_lock:
- write_unlock_irqrestore(&adapter->request_queue.queue_lock, lock_flags);
- out:
+failed_scsi_cmnd:
+ zfcp_unit_put(unit);
+ zfcp_fsf_req_free(req);
+ scsi_cmnd->host_scribble = NULL;
+out:
+ spin_unlock(&adapter->req_q.lock);
return retval;
}
-
-/*
- * function: zfcp_fsf_control_file_handler
- *
- * purpose: Handler of the control file upload/download FSF requests
- *
- * returns: 0 - FSF request successfuly processed
- * -EAGAIN - Operation has to be repeated because of a temporary problem
- * -EACCES - There is no permission to execute an operation
- * -EPERM - The control file is not in a right format
- * -EIO - There is a problem with the FCP adapter
- * -EINVAL - Invalid operation
- * -EFAULT - User space memory I/O operation fault
- */
-static int
-zfcp_fsf_control_file_handler(struct zfcp_fsf_req *fsf_req)
-{
- struct zfcp_adapter *adapter = fsf_req->adapter;
- struct fsf_qtcb_header *header = &fsf_req->qtcb->header;
- struct fsf_qtcb_bottom_support *bottom = &fsf_req->qtcb->bottom.support;
- int retval = 0;
-
- if (fsf_req->status & ZFCP_STATUS_FSFREQ_ERROR) {
- retval = -EINVAL;
- goto skip_fsfstatus;
- }
-
- switch (header->fsf_status) {
-
- case FSF_GOOD:
- ZFCP_LOG_NORMAL(
- "The FSF request has been successfully completed "
- "on the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
-
- case FSF_OPERATION_PARTIALLY_SUCCESSFUL:
- if (bottom->operation_subtype == FSF_CFDC_OPERATION_SUBTYPE) {
- switch (header->fsf_status_qual.word[0]) {
-
- case FSF_SQ_CFDC_HARDENED_ON_SE:
- ZFCP_LOG_NORMAL(
- "CFDC on the adapter %s has being "
- "hardened on primary and secondary SE\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
-
- case FSF_SQ_CFDC_COULD_NOT_HARDEN_ON_SE:
- ZFCP_LOG_NORMAL(
- "CFDC of the adapter %s could not "
- "be saved on the SE\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
-
- case FSF_SQ_CFDC_COULD_NOT_HARDEN_ON_SE2:
- ZFCP_LOG_NORMAL(
- "CFDC of the adapter %s could not "
- "be copied to the secondary SE\n",
- zfcp_get_busid_by_adapter(adapter));
- break;
-
- default:
- ZFCP_LOG_NORMAL(
- "CFDC could not be hardened "
- "on the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- }
- }
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EAGAIN;
- break;
-
- case FSF_AUTHORIZATION_FAILURE:
- ZFCP_LOG_NORMAL(
- "Adapter %s does not accept privileged commands\n",
- zfcp_get_busid_by_adapter(adapter));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EACCES;
- break;
-
- case FSF_CFDC_ERROR_DETECTED:
- ZFCP_LOG_NORMAL(
- "Error at position %d in the CFDC, "
- "CFDC is discarded by the adapter %s\n",
- header->fsf_status_qual.word[0],
- zfcp_get_busid_by_adapter(adapter));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EPERM;
- break;
-
- case FSF_CONTROL_FILE_UPDATE_ERROR:
- ZFCP_LOG_NORMAL(
- "Adapter %s cannot harden the control file, "
- "file is discarded\n",
- zfcp_get_busid_by_adapter(adapter));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EIO;
- break;
-
- case FSF_CONTROL_FILE_TOO_LARGE:
- ZFCP_LOG_NORMAL(
- "Control file is too large, file is discarded "
- "by the adapter %s\n",
- zfcp_get_busid_by_adapter(adapter));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EIO;
- break;
-
- case FSF_ACCESS_CONFLICT_DETECTED:
- if (bottom->operation_subtype == FSF_CFDC_OPERATION_SUBTYPE)
- ZFCP_LOG_NORMAL(
- "CFDC has been discarded by the adapter %s, "
- "because activation would impact "
- "%d active connection(s)\n",
- zfcp_get_busid_by_adapter(adapter),
- header->fsf_status_qual.word[0]);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EIO;
- break;
-
- case FSF_CONFLICTS_OVERRULED:
- if (bottom->operation_subtype == FSF_CFDC_OPERATION_SUBTYPE)
- ZFCP_LOG_NORMAL(
- "CFDC has been activated on the adapter %s, "
- "but activation has impacted "
- "%d active connection(s)\n",
- zfcp_get_busid_by_adapter(adapter),
- header->fsf_status_qual.word[0]);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EIO;
- break;
-
- case FSF_UNKNOWN_OP_SUBTYPE:
- ZFCP_LOG_NORMAL("unknown operation subtype (adapter: %s, "
- "op_subtype=0x%x)\n",
- zfcp_get_busid_by_adapter(adapter),
- bottom->operation_subtype);
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EINVAL;
- break;
-
- case FSF_INVALID_COMMAND_OPTION:
- ZFCP_LOG_NORMAL(
- "Invalid option 0x%x has been specified "
- "in QTCB bottom sent to the adapter %s\n",
- bottom->option,
- zfcp_get_busid_by_adapter(adapter));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EINVAL;
- break;
-
- default:
- ZFCP_LOG_NORMAL(
- "bug: An unknown/unexpected FSF status 0x%08x "
- "was presented on the adapter %s\n",
- header->fsf_status,
- zfcp_get_busid_by_adapter(adapter));
- fsf_req->status |= ZFCP_STATUS_FSFREQ_ERROR;
- retval = -EINVAL;
- break;
- }
-
-skip_fsfstatus:
- return retval;
-}
-
-static inline int
-zfcp_fsf_req_sbal_check(unsigned long *flags,
- struct zfcp_qdio_queue *queue, int needed)
-{
- write_lock_irqsave(&queue->queue_lock, *flags);
- if (likely(atomic_read(&queue->free_count) >= needed))
- return 1;
- write_unlock_irqrestore(&queue->queue_lock, *flags);
- return 0;
-}
-
-/*
- * set qtcb pointer in fsf_req and initialize QTCB
- */
-static void
-zfcp_fsf_req_qtcb_init(struct zfcp_fsf_req *fsf_req)
-{
- if (likely(fsf_req->qtcb != NULL)) {
- fsf_req->qtcb->prefix.req_seq_no =
- fsf_req->adapter->fsf_req_seq_no;
- fsf_req->qtcb->prefix.req_id = fsf_req->req_id;
- fsf_req->qtcb->prefix.ulp_info = ZFCP_ULP_INFO_VERSION;
- fsf_req->qtcb->prefix.qtcb_type =
- fsf_qtcb_type[fsf_req->fsf_command];
- fsf_req->qtcb->prefix.qtcb_version = ZFCP_QTCB_VERSION;
- fsf_req->qtcb->header.req_handle = fsf_req->req_id;
- fsf_req->qtcb->header.fsf_command = fsf_req->fsf_command;
- }
-}
-
/**
- * zfcp_fsf_req_sbal_get - try to get one SBAL in the request queue
- * @adapter: adapter for which request queue is examined
- * @req_flags: flags indicating whether to wait for needed SBAL or not
- * @lock_flags: lock_flags if queue_lock is taken
- * Return: 0 on success, otherwise -EIO, or -ERESTARTSYS
- * Locks: lock adapter->request_queue->queue_lock on success
+ * zfcp_fsf_send_fcp_ctm - send SCSI task management command
+ * @adapter: pointer to struct zfcp-adapter
+ * @unit: pointer to struct zfcp_unit
+ * @tm_flags: unsigned byte for task management flags
+ * @req_flags: int request flags
+ * Returns: on success pointer to struct fsf_req, NULL otherwise
*/
-static int
-zfcp_fsf_req_sbal_get(struct zfcp_adapter *adapter, int req_flags,
- unsigned long *lock_flags)
-{
- long ret;
- struct zfcp_qdio_queue *req_queue = &adapter->request_queue;
-
- if (unlikely(req_flags & ZFCP_WAIT_FOR_SBAL)) {
- ret = wait_event_interruptible_timeout(adapter->request_wq,
- zfcp_fsf_req_sbal_check(lock_flags, req_queue, 1),
- ZFCP_SBAL_TIMEOUT);
- if (ret < 0)
- return ret;
- if (!ret)
- return -EIO;
- } else if (!zfcp_fsf_req_sbal_check(lock_flags, req_queue, 1))
- return -EIO;
-
- return 0;
-}
-
-/*
- * function: zfcp_fsf_req_create
- *
- * purpose: create an FSF request at the specified adapter and
- * setup common fields
- *
- * returns: -ENOMEM if there was insufficient memory for a request
- * -EIO if no qdio buffers could be allocate to the request
- * -EINVAL/-EPERM on bug conditions in req_dequeue
- * 0 in success
- *
- * note: The created request is returned by reference.
- *
- * locks: lock of concerned request queue must not be held,
- * but is held on completion (write, irqsave)
- */
-int
-zfcp_fsf_req_create(struct zfcp_adapter *adapter, u32 fsf_cmd, int req_flags,
- mempool_t *pool, unsigned long *lock_flags,
- struct zfcp_fsf_req **fsf_req_p)
+struct zfcp_fsf_req *zfcp_fsf_send_fcp_ctm(struct zfcp_adapter *adapter,
+ struct zfcp_unit *unit,
+ u8 tm_flags, int req_flags)
{
volatile struct qdio_buffer_element *sbale;
- struct zfcp_fsf_req *fsf_req = NULL;
- int ret = 0;
- struct zfcp_qdio_queue *req_queue = &adapter->request_queue;
+ struct zfcp_fsf_req *req = NULL;
+ struct fcp_cmnd_iu *fcp_cmnd_iu;
- /* allocate new FSF request */
- fsf_req = zfcp_fsf_req_alloc(pool, req_flags);
- if (unlikely(NULL == fsf_req)) {
- ZFCP_LOG_DEBUG("error: Could not put an FSF request into "
- "the outbound (send) queue.\n");
- ret = -ENOMEM;
- goto failed_fsf_req;
- }
+ if (unlikely(!(atomic_read(&unit->status) &
+ ZFCP_STATUS_COMMON_UNBLOCKED)))
+ return NULL;
- fsf_req->adapter = adapter;
- fsf_req->fsf_command = fsf_cmd;
- INIT_LIST_HEAD(&fsf_req->list);
- init_timer(&fsf_req->timer);
+ spin_lock(&adapter->req_q.lock);
+ if (!atomic_read(&adapter->req_q.count))
+ goto out;
+ req = zfcp_fsf_req_create(adapter, FSF_QTCB_FCP_CMND, req_flags,
+ adapter->pool.fsf_req_scsi);
+ if (unlikely(IS_ERR(req)))
+ goto out;
- /* initialize waitqueue which may be used to wait on
- this request completion */
- init_waitqueue_head(&fsf_req->completion_wq);
+ req->status |= ZFCP_STATUS_FSFREQ_TASK_MANAGEMENT;
+ req->data = unit;
+ req->handler = zfcp_fsf_send_fcp_command_handler;
+ req->qtcb->header.lun_handle = unit->handle;
+ req->qtcb->header.port_handle = unit->port->handle;
+ req->qtcb->bottom.io.data_direction = FSF_DATADIR_CMND;
+ req->qtcb->bottom.io.service_class = FSF_CLASS_3;
+ req->qtcb->bottom.io.fcp_cmnd_length = sizeof(struct fcp_cmnd_iu) +
+ sizeof(fcp_dl_t);
- ret = zfcp_fsf_req_sbal_get(adapter, req_flags, lock_flags);
- if (ret < 0)
- goto failed_sbals;
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= SBAL_FLAGS0_TYPE_WRITE;
+ sbale[1].flags |= SBAL_FLAGS_LAST_ENTRY;
- /* this is serialized (we are holding req_queue-lock of adapter) */
- if (adapter->req_no == 0)
- adapter->req_no++;
- fsf_req->req_id = adapter->req_no++;
+ fcp_cmnd_iu = (struct fcp_cmnd_iu *) &req->qtcb->bottom.io.fcp_cmnd;
+ fcp_cmnd_iu->fcp_lun = unit->fcp_lun;
+ fcp_cmnd_iu->task_management_flags = tm_flags;
- zfcp_fsf_req_qtcb_init(fsf_req);
+ zfcp_fsf_start_timer(req, ZFCP_SCSI_ER_TIMEOUT);
+ if (!zfcp_fsf_req_send(req))
+ goto out;
- /*
- * We hold queue_lock here. Check if QDIOUP is set and let request fail
- * if it is not set (see also *_open_qdio and *_close_qdio).
- */
-
- if (!atomic_test_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status)) {
- write_unlock_irqrestore(&req_queue->queue_lock, *lock_flags);
- ret = -EIO;
- goto failed_sbals;
- }
-
- if (fsf_req->qtcb) {
- fsf_req->seq_no = adapter->fsf_req_seq_no;
- fsf_req->qtcb->prefix.req_seq_no = adapter->fsf_req_seq_no;
- }
- fsf_req->sbal_number = 1;
- fsf_req->sbal_first = req_queue->free_index;
- fsf_req->sbal_curr = req_queue->free_index;
- fsf_req->sbale_curr = 1;
-
- if (likely(req_flags & ZFCP_REQ_AUTO_CLEANUP)) {
- fsf_req->status |= ZFCP_STATUS_FSFREQ_CLEANUP;
- }
-
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
-
- /* setup common SBALE fields */
- sbale[0].addr = (void *) fsf_req->req_id;
- sbale[0].flags |= SBAL_FLAGS0_COMMAND;
- if (likely(fsf_req->qtcb != NULL)) {
- sbale[1].addr = (void *) fsf_req->qtcb;
- sbale[1].length = sizeof(struct fsf_qtcb);
- }
-
- ZFCP_LOG_TRACE("got %i free BUFFERs starting at index %i\n",
- fsf_req->sbal_number, fsf_req->sbal_first);
-
- goto success;
-
- failed_sbals:
-/* dequeue new FSF request previously enqueued */
- zfcp_fsf_req_free(fsf_req);
- fsf_req = NULL;
-
- failed_fsf_req:
- write_lock_irqsave(&req_queue->queue_lock, *lock_flags);
- success:
- *fsf_req_p = fsf_req;
- return ret;
+ zfcp_fsf_req_free(req);
+ req = NULL;
+out:
+ spin_unlock(&adapter->req_q.lock);
+ return req;
}
-/*
- * function: zfcp_fsf_req_send
- *
- * purpose: start transfer of FSF request via QDIO
- *
- * returns: 0 - request transfer succesfully started
- * !0 - start of request transfer failed
- */
-static int zfcp_fsf_req_send(struct zfcp_fsf_req *fsf_req)
+static void zfcp_fsf_control_file_handler(struct zfcp_fsf_req *req)
{
- struct zfcp_adapter *adapter;
- struct zfcp_qdio_queue *req_queue;
- volatile struct qdio_buffer_element *sbale;
- int inc_seq_no;
- int new_distance_from_int;
- int retval = 0;
-
- adapter = fsf_req->adapter;
- req_queue = &adapter->request_queue,
-
-
- /* FIXME(debug): remove it later */
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_first, 0);
- ZFCP_LOG_DEBUG("SBALE0 flags=0x%x\n", sbale[0].flags);
- ZFCP_LOG_TRACE("HEX DUMP OF SBALE1 PAYLOAD:\n");
- ZFCP_HEX_DUMP(ZFCP_LOG_LEVEL_TRACE, (char *) sbale[1].addr,
- sbale[1].length);
-
- /* put allocated FSF request into hash table */
- spin_lock(&adapter->req_list_lock);
- zfcp_reqlist_add(adapter, fsf_req);
- spin_unlock(&adapter->req_list_lock);
-
- inc_seq_no = (fsf_req->qtcb != NULL);
-
- ZFCP_LOG_TRACE("request queue of adapter %s: "
- "next free SBAL is %i, %i free SBALs\n",
- zfcp_get_busid_by_adapter(adapter),
- req_queue->free_index,
- atomic_read(&req_queue->free_count));
-
- ZFCP_LOG_DEBUG("calling do_QDIO adapter %s, flags=0x%x, queue_no=%i, "
- "index_in_queue=%i, count=%i, buffers=%p\n",
- zfcp_get_busid_by_adapter(adapter),
- QDIO_FLAG_SYNC_OUTPUT,
- 0, fsf_req->sbal_first, fsf_req->sbal_number,
- &req_queue->buffer[fsf_req->sbal_first]);
-
- /*
- * adjust the number of free SBALs in request queue as well as
- * position of first one
- */
- atomic_sub(fsf_req->sbal_number, &req_queue->free_count);
- ZFCP_LOG_TRACE("free_count=%d\n", atomic_read(&req_queue->free_count));
- req_queue->free_index += fsf_req->sbal_number; /* increase */
- req_queue->free_index %= QDIO_MAX_BUFFERS_PER_Q; /* wrap if needed */
- new_distance_from_int = zfcp_qdio_determine_pci(req_queue, fsf_req);
-
- fsf_req->issued = get_clock();
-
- retval = do_QDIO(adapter->ccw_device,
- QDIO_FLAG_SYNC_OUTPUT,
- 0, fsf_req->sbal_first, fsf_req->sbal_number, NULL);
-
- if (unlikely(retval)) {
- /* Queues are down..... */
- retval = -EIO;
- del_timer(&fsf_req->timer);
- spin_lock(&adapter->req_list_lock);
- zfcp_reqlist_remove(adapter, fsf_req);
- spin_unlock(&adapter->req_list_lock);
- /* undo changes in request queue made for this request */
- zfcp_qdio_zero_sbals(req_queue->buffer,
- fsf_req->sbal_first, fsf_req->sbal_number);
- atomic_add(fsf_req->sbal_number, &req_queue->free_count);
- req_queue->free_index -= fsf_req->sbal_number;
- req_queue->free_index += QDIO_MAX_BUFFERS_PER_Q;
- req_queue->free_index %= QDIO_MAX_BUFFERS_PER_Q; /* wrap */
- zfcp_erp_adapter_reopen(adapter, 0, 116, fsf_req);
- } else {
- req_queue->distance_from_int = new_distance_from_int;
- /*
- * increase FSF sequence counter -
- * this must only be done for request successfully enqueued to
- * QDIO this rejected requests may be cleaned up by calling
- * routines resulting in missing sequence counter values
- * otherwise,
- */
-
- /* Don't increase for unsolicited status */
- if (inc_seq_no)
- adapter->fsf_req_seq_no++;
-
- /* count FSF requests pending */
- atomic_inc(&adapter->reqs_active);
- }
- return retval;
+ if (req->qtcb->header.fsf_status != FSF_GOOD)
+ req->status |= ZFCP_STATUS_FSFREQ_ERROR;
}
-#undef ZFCP_LOG_AREA
+/**
+ * zfcp_fsf_control_file - control file upload/download
+ * @adapter: pointer to struct zfcp_adapter
+ * @fsf_cfdc: pointer to struct zfcp_fsf_cfdc
+ * Returns: on success pointer to struct zfcp_fsf_req, NULL otherwise
+ */
+struct zfcp_fsf_req *zfcp_fsf_control_file(struct zfcp_adapter *adapter,
+ struct zfcp_fsf_cfdc *fsf_cfdc)
+{
+ volatile struct qdio_buffer_element *sbale;
+ struct zfcp_fsf_req *req = NULL;
+ struct fsf_qtcb_bottom_support *bottom;
+ int direction, retval = -EIO, bytes;
+
+ if (!(adapter->adapter_features & FSF_FEATURE_CFDC))
+ return ERR_PTR(-EOPNOTSUPP);
+
+ switch (fsf_cfdc->command) {
+ case FSF_QTCB_DOWNLOAD_CONTROL_FILE:
+ direction = SBAL_FLAGS0_TYPE_WRITE;
+ break;
+ case FSF_QTCB_UPLOAD_CONTROL_FILE:
+ direction = SBAL_FLAGS0_TYPE_READ;
+ break;
+ default:
+ return ERR_PTR(-EINVAL);
+ }
+
+ spin_lock(&adapter->req_q.lock);
+ if (zfcp_fsf_req_sbal_get(adapter))
+ goto out;
+
+ req = zfcp_fsf_req_create(adapter, fsf_cfdc->command, 0, NULL);
+ if (unlikely(IS_ERR(req))) {
+ retval = -EPERM;
+ goto out;
+ }
+
+ req->handler = zfcp_fsf_control_file_handler;
+
+ sbale = zfcp_qdio_sbale_req(req);
+ sbale[0].flags |= direction;
+
+ bottom = &req->qtcb->bottom.support;
+ bottom->operation_subtype = FSF_CFDC_OPERATION_SUBTYPE;
+ bottom->option = fsf_cfdc->option;
+
+ bytes = zfcp_qdio_sbals_from_sg(req, direction, fsf_cfdc->sg,
+ FSF_MAX_SBALS_PER_REQ);
+ if (bytes != ZFCP_CFDC_MAX_SIZE) {
+ retval = -ENOMEM;
+ zfcp_fsf_req_free(req);
+ goto out;
+ }
+
+ zfcp_fsf_start_timer(req, ZFCP_FSF_REQUEST_TIMEOUT);
+ retval = zfcp_fsf_req_send(req);
+out:
+ spin_unlock(&adapter->req_q.lock);
+
+ if (!retval) {
+ wait_event(req->completion_wq,
+ req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
+ return req;
+ }
+ return ERR_PTR(retval);
+}
diff --git a/drivers/s390/scsi/zfcp_fsf.h b/drivers/s390/scsi/zfcp_fsf.h
index 099970b..bf94b4d 100644
--- a/drivers/s390/scsi/zfcp_fsf.h
+++ b/drivers/s390/scsi/zfcp_fsf.h
@@ -1,27 +1,16 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Interface to the FSF support functions.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
#ifndef FSF_H
#define FSF_H
+#include <linux/pfn.h>
+
#define FSF_QTCB_CURRENT_VERSION 0x00000001
/* FSF commands */
@@ -258,6 +247,16 @@
#define FSF_UNIT_ACCESS_EXCLUSIVE 0x02000000
#define FSF_UNIT_ACCESS_OUTBOUND_TRANSFER 0x10000000
+/* FSF interface for CFDC */
+#define ZFCP_CFDC_MAX_SIZE 127 * 1024
+#define ZFCP_CFDC_PAGES PFN_UP(ZFCP_CFDC_MAX_SIZE)
+
+struct zfcp_fsf_cfdc {
+ struct scatterlist sg[ZFCP_CFDC_PAGES];
+ u32 command;
+ u32 option;
+};
+
struct fsf_queue_designator {
u8 cssid;
u8 chpid;
@@ -288,29 +287,6 @@
u32 current_transmit_b2b_credit;
} __attribute__ ((packed));
-struct fsf_status_read_buffer {
- u32 status_type;
- u32 status_subtype;
- u32 length;
- u32 res1;
- struct fsf_queue_designator queue_designator;
- u32 d_id;
- u32 class;
- u64 fcp_lun;
- u8 res3[24];
- u8 payload[FSF_STATUS_READ_PAYLOAD_SIZE];
-} __attribute__ ((packed));
-
-struct fsf_qual_version_error {
- u32 fsf_version;
- u32 res1[3];
-} __attribute__ ((packed));
-
-struct fsf_qual_sequence_error {
- u32 exp_req_seq_no;
- u32 res1[3];
-} __attribute__ ((packed));
-
struct fsf_link_down_info {
u32 error_code;
u32 res1;
@@ -323,11 +299,47 @@
u8 vendor_specific_code;
} __attribute__ ((packed));
+struct fsf_status_read_buffer {
+ u32 status_type;
+ u32 status_subtype;
+ u32 length;
+ u32 res1;
+ struct fsf_queue_designator queue_designator;
+ u32 d_id;
+ u32 class;
+ u64 fcp_lun;
+ u8 res3[24];
+ union {
+ u8 data[FSF_STATUS_READ_PAYLOAD_SIZE];
+ u32 word[FSF_STATUS_READ_PAYLOAD_SIZE/sizeof(u32)];
+ struct fsf_link_down_info link_down_info;
+ struct fsf_bit_error_payload bit_error;
+ } payload;
+} __attribute__ ((packed));
+
+struct fsf_qual_version_error {
+ u32 fsf_version;
+ u32 res1[3];
+} __attribute__ ((packed));
+
+struct fsf_qual_sequence_error {
+ u32 exp_req_seq_no;
+ u32 res1[3];
+} __attribute__ ((packed));
+
+struct fsf_qual_latency_info {
+ u32 channel_lat;
+ u32 fabric_lat;
+ u8 res1[8];
+} __attribute__ ((packed));
+
union fsf_prot_status_qual {
+ u32 word[FSF_PROT_STATUS_QUAL_SIZE / sizeof(u32)];
u64 doubleword[FSF_PROT_STATUS_QUAL_SIZE / sizeof(u64)];
struct fsf_qual_version_error version_error;
struct fsf_qual_sequence_error sequence_error;
struct fsf_link_down_info link_down_info;
+ struct fsf_qual_latency_info latency_info;
} __attribute__ ((packed));
struct fsf_qtcb_prefix {
@@ -437,7 +449,9 @@
u32 fc_link_speed;
u32 adapter_type;
u32 peer_d_id;
- u8 res2[12];
+ u8 res1[2];
+ u16 timer_interval;
+ u8 res2[8];
u32 s_id;
struct fsf_nport_serv_param nport_serv_param;
u8 reserved_nport_serv_param[16];
diff --git a/drivers/s390/scsi/zfcp_qdio.c b/drivers/s390/scsi/zfcp_qdio.c
index 8ca5f07..72e3094 100644
--- a/drivers/s390/scsi/zfcp_qdio.c
+++ b/drivers/s390/scsi/zfcp_qdio.c
@@ -1,241 +1,103 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Setup and helper functions to access QDIO.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
#include "zfcp_ext.h"
-static void zfcp_qdio_sbal_limit(struct zfcp_fsf_req *, int);
-static inline volatile struct qdio_buffer_element *zfcp_qdio_sbale_get
- (struct zfcp_qdio_queue *, int, int);
-static inline volatile struct qdio_buffer_element *zfcp_qdio_sbale_resp
- (struct zfcp_fsf_req *, int, int);
-static volatile struct qdio_buffer_element *zfcp_qdio_sbal_chain
- (struct zfcp_fsf_req *, unsigned long);
-static volatile struct qdio_buffer_element *zfcp_qdio_sbale_next
- (struct zfcp_fsf_req *, unsigned long);
-static int zfcp_qdio_sbals_zero(struct zfcp_qdio_queue *, int, int);
-static inline int zfcp_qdio_sbals_wipe(struct zfcp_fsf_req *);
-static void zfcp_qdio_sbale_fill
- (struct zfcp_fsf_req *, unsigned long, void *, int);
-static int zfcp_qdio_sbals_from_segment
- (struct zfcp_fsf_req *, unsigned long, void *, unsigned long);
+/* FIXME(tune): free space should be one max. SBAL chain plus what? */
+#define ZFCP_QDIO_PCI_INTERVAL (QDIO_MAX_BUFFERS_PER_Q \
+ - (FSF_MAX_SBALS_PER_REQ + 4))
+#define QBUFF_PER_PAGE (PAGE_SIZE / sizeof(struct qdio_buffer))
-static qdio_handler_t zfcp_qdio_request_handler;
-static qdio_handler_t zfcp_qdio_response_handler;
-static int zfcp_qdio_handler_error_check(struct zfcp_adapter *,
- unsigned int, unsigned int, unsigned int, int, int);
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_QDIO
-
-/*
- * Frees BUFFER memory for each of the pointers of the struct qdio_buffer array
- * in the adapter struct sbuf is the pointer array.
- *
- * locks: must only be called with zfcp_data.config_sema taken
- */
-static void
-zfcp_qdio_buffers_dequeue(struct qdio_buffer **sbuf)
-{
- int pos;
-
- for (pos = 0; pos < QDIO_MAX_BUFFERS_PER_Q; pos += QBUFF_PER_PAGE)
- free_page((unsigned long) sbuf[pos]);
-}
-
-/*
- * Allocates BUFFER memory to each of the pointers of the qdio_buffer_t
- * array in the adapter struct.
- * Cur_buf is the pointer array
- *
- * returns: zero on success else -ENOMEM
- * locks: must only be called with zfcp_data.config_sema taken
- */
-static int
-zfcp_qdio_buffers_enqueue(struct qdio_buffer **sbuf)
+static int zfcp_qdio_buffers_enqueue(struct qdio_buffer **sbal)
{
int pos;
for (pos = 0; pos < QDIO_MAX_BUFFERS_PER_Q; pos += QBUFF_PER_PAGE) {
- sbuf[pos] = (struct qdio_buffer *) get_zeroed_page(GFP_KERNEL);
- if (!sbuf[pos]) {
- zfcp_qdio_buffers_dequeue(sbuf);
+ sbal[pos] = (struct qdio_buffer *) get_zeroed_page(GFP_KERNEL);
+ if (!sbal[pos])
return -ENOMEM;
- }
}
for (pos = 0; pos < QDIO_MAX_BUFFERS_PER_Q; pos++)
if (pos % QBUFF_PER_PAGE)
- sbuf[pos] = sbuf[pos - 1] + 1;
+ sbal[pos] = sbal[pos - 1] + 1;
return 0;
}
-/* locks: must only be called with zfcp_data.config_sema taken */
-int
-zfcp_qdio_allocate_queues(struct zfcp_adapter *adapter)
+static volatile struct qdio_buffer_element *
+zfcp_qdio_sbale(struct zfcp_qdio_queue *q, int sbal_idx, int sbale_idx)
{
- int ret;
-
- ret = zfcp_qdio_buffers_enqueue(adapter->request_queue.buffer);
- if (ret)
- return ret;
- return zfcp_qdio_buffers_enqueue(adapter->response_queue.buffer);
-}
-
-/* locks: must only be called with zfcp_data.config_sema taken */
-void
-zfcp_qdio_free_queues(struct zfcp_adapter *adapter)
-{
- ZFCP_LOG_TRACE("freeing request_queue buffers\n");
- zfcp_qdio_buffers_dequeue(adapter->request_queue.buffer);
-
- ZFCP_LOG_TRACE("freeing response_queue buffers\n");
- zfcp_qdio_buffers_dequeue(adapter->response_queue.buffer);
-}
-
-int
-zfcp_qdio_allocate(struct zfcp_adapter *adapter)
-{
- struct qdio_initialize *init_data;
-
- init_data = &adapter->qdio_init_data;
-
- init_data->cdev = adapter->ccw_device;
- init_data->q_format = QDIO_SCSI_QFMT;
- memcpy(init_data->adapter_name, zfcp_get_busid_by_adapter(adapter), 8);
- ASCEBC(init_data->adapter_name, 8);
- init_data->qib_param_field_format = 0;
- init_data->qib_param_field = NULL;
- init_data->input_slib_elements = NULL;
- init_data->output_slib_elements = NULL;
- init_data->min_input_threshold = ZFCP_MIN_INPUT_THRESHOLD;
- init_data->max_input_threshold = ZFCP_MAX_INPUT_THRESHOLD;
- init_data->min_output_threshold = ZFCP_MIN_OUTPUT_THRESHOLD;
- init_data->max_output_threshold = ZFCP_MAX_OUTPUT_THRESHOLD;
- init_data->no_input_qs = 1;
- init_data->no_output_qs = 1;
- init_data->input_handler = zfcp_qdio_response_handler;
- init_data->output_handler = zfcp_qdio_request_handler;
- init_data->int_parm = (unsigned long) adapter;
- init_data->flags = QDIO_INBOUND_0COPY_SBALS |
- QDIO_OUTBOUND_0COPY_SBALS | QDIO_USE_OUTBOUND_PCIS;
- init_data->input_sbal_addr_array =
- (void **) (adapter->response_queue.buffer);
- init_data->output_sbal_addr_array =
- (void **) (adapter->request_queue.buffer);
-
- return qdio_allocate(init_data);
-}
-
-/*
- * function: zfcp_qdio_handler_error_check
- *
- * purpose: called by the response handler to determine error condition
- *
- * returns: error flag
- *
- */
-static int
-zfcp_qdio_handler_error_check(struct zfcp_adapter *adapter, unsigned int status,
- unsigned int qdio_error, unsigned int siga_error,
- int first_element, int elements_processed)
-{
- int retval = 0;
-
- if (unlikely(status & QDIO_STATUS_LOOK_FOR_ERROR)) {
- retval = -EIO;
-
- ZFCP_LOG_INFO("QDIO problem occurred (status=0x%x, "
- "qdio_error=0x%x, siga_error=0x%x)\n",
- status, qdio_error, siga_error);
-
- zfcp_hba_dbf_event_qdio(adapter, status, qdio_error, siga_error,
- first_element, elements_processed);
- /*
- * Restarting IO on the failed adapter from scratch.
- * Since we have been using this adapter, it is save to assume
- * that it is not failed but recoverable. The card seems to
- * report link-up events by self-initiated queue shutdown.
- * That is why we need to clear the link-down flag
- * which is set again in case we have missed by a mile.
- */
- zfcp_erp_adapter_reopen(adapter,
- ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED |
- ZFCP_STATUS_COMMON_ERP_FAILED, 140,
- NULL);
- }
- return retval;
-}
-
-/*
- * function: zfcp_qdio_request_handler
- *
- * purpose: is called by QDIO layer for completed SBALs in request queue
- *
- * returns: (void)
- */
-static void
-zfcp_qdio_request_handler(struct ccw_device *ccw_device,
- unsigned int status,
- unsigned int qdio_error,
- unsigned int siga_error,
- unsigned int queue_number,
- int first_element,
- int elements_processed,
- unsigned long int_parm)
-{
- struct zfcp_adapter *adapter;
- struct zfcp_qdio_queue *queue;
-
- adapter = (struct zfcp_adapter *) int_parm;
- queue = &adapter->request_queue;
-
- ZFCP_LOG_DEBUG("adapter %s, first=%d, elements_processed=%d\n",
- zfcp_get_busid_by_adapter(adapter),
- first_element, elements_processed);
-
- if (unlikely(zfcp_qdio_handler_error_check(adapter, status, qdio_error,
- siga_error, first_element,
- elements_processed)))
- goto out;
- /*
- * we stored address of struct zfcp_adapter data structure
- * associated with irq in int_parm
- */
-
- /* cleanup all SBALs being program-owned now */
- zfcp_qdio_zero_sbals(queue->buffer, first_element, elements_processed);
-
- /* increase free space in outbound queue */
- atomic_add(elements_processed, &queue->free_count);
- ZFCP_LOG_DEBUG("free_count=%d\n", atomic_read(&queue->free_count));
- wake_up(&adapter->request_wq);
- ZFCP_LOG_DEBUG("elements_processed=%d, free count=%d\n",
- elements_processed, atomic_read(&queue->free_count));
- out:
- return;
+ return &q->sbal[sbal_idx]->element[sbale_idx];
}
/**
- * zfcp_qdio_reqid_check - checks for valid reqids.
+ * zfcp_qdio_free - free memory used by request- and resposne queue
+ * @adapter: pointer to the zfcp_adapter structure
*/
+void zfcp_qdio_free(struct zfcp_adapter *adapter)
+{
+ struct qdio_buffer **sbal_req, **sbal_resp;
+ int p;
+
+ if (adapter->ccw_device)
+ qdio_free(adapter->ccw_device);
+
+ sbal_req = adapter->req_q.sbal;
+ sbal_resp = adapter->resp_q.sbal;
+
+ for (p = 0; p < QDIO_MAX_BUFFERS_PER_Q; p += QBUFF_PER_PAGE) {
+ free_page((unsigned long) sbal_req[p]);
+ free_page((unsigned long) sbal_resp[p]);
+ }
+}
+
+static void zfcp_qdio_handler_error(struct zfcp_adapter *adapter, u8 id)
+{
+ dev_warn(&adapter->ccw_device->dev, "QDIO problem occurred.\n");
+
+ zfcp_erp_adapter_reopen(adapter,
+ ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED |
+ ZFCP_STATUS_COMMON_ERP_FAILED, id, NULL);
+}
+
+static void zfcp_qdio_zero_sbals(struct qdio_buffer *sbal[], int first, int cnt)
+{
+ int i, sbal_idx;
+
+ for (i = first; i < first + cnt; i++) {
+ sbal_idx = i % QDIO_MAX_BUFFERS_PER_Q;
+ memset(sbal[sbal_idx], 0, sizeof(struct qdio_buffer));
+ }
+}
+
+static void zfcp_qdio_int_req(struct ccw_device *cdev, unsigned int status,
+ unsigned int qdio_err, unsigned int siga_err,
+ unsigned int queue_no, int first, int count,
+ unsigned long parm)
+{
+ struct zfcp_adapter *adapter = (struct zfcp_adapter *) parm;
+ struct zfcp_qdio_queue *queue = &adapter->req_q;
+
+ if (unlikely(status & QDIO_STATUS_LOOK_FOR_ERROR)) {
+ zfcp_hba_dbf_event_qdio(adapter, status, qdio_err, siga_err,
+ first, count);
+ zfcp_qdio_handler_error(adapter, 140);
+ return;
+ }
+
+ /* cleanup all SBALs being program-owned now */
+ zfcp_qdio_zero_sbals(queue->sbal, first, count);
+
+ atomic_add(count, &queue->count);
+ wake_up(&adapter->request_wq);
+}
+
static void zfcp_qdio_reqid_check(struct zfcp_adapter *adapter,
- unsigned long req_id)
+ unsigned long req_id, int sbal_idx)
{
struct zfcp_fsf_req *fsf_req;
unsigned long flags;
@@ -248,203 +110,117 @@
* Unknown request means that we have potentially memory
* corruption and must stop the machine immediatly.
*/
- panic("error: unknown request id (%ld) on adapter %s.\n",
+ panic("error: unknown request id (%lx) on adapter %s.\n",
req_id, zfcp_get_busid_by_adapter(adapter));
zfcp_reqlist_remove(adapter, fsf_req);
- atomic_dec(&adapter->reqs_active);
spin_unlock_irqrestore(&adapter->req_list_lock, flags);
- /* finish the FSF request */
+ fsf_req->sbal_response = sbal_idx;
zfcp_fsf_req_complete(fsf_req);
}
-/*
- * function: zfcp_qdio_response_handler
- *
- * purpose: is called by QDIO layer for completed SBALs in response queue
- *
- * returns: (void)
- */
-static void
-zfcp_qdio_response_handler(struct ccw_device *ccw_device,
- unsigned int status,
- unsigned int qdio_error,
- unsigned int siga_error,
- unsigned int queue_number,
- int first_element,
- int elements_processed,
- unsigned long int_parm)
+static void zfcp_qdio_resp_put_back(struct zfcp_adapter *adapter, int processed)
{
- struct zfcp_adapter *adapter;
- struct zfcp_qdio_queue *queue;
- int buffer_index;
- int i;
- struct qdio_buffer *buffer;
- int retval = 0;
- u8 count;
- u8 start;
- volatile struct qdio_buffer_element *buffere = NULL;
- int buffere_index;
+ struct zfcp_qdio_queue *queue = &adapter->resp_q;
+ struct ccw_device *cdev = adapter->ccw_device;
+ u8 count, start = queue->first;
+ unsigned int retval;
- adapter = (struct zfcp_adapter *) int_parm;
- queue = &adapter->response_queue;
+ count = atomic_read(&queue->count) + processed;
- if (unlikely(zfcp_qdio_handler_error_check(adapter, status, qdio_error,
- siga_error, first_element,
- elements_processed)))
- goto out;
+ retval = do_QDIO(cdev, QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
+ 0, start, count, NULL);
- /*
- * we stored address of struct zfcp_adapter data structure
- * associated with irq in int_parm
- */
+ if (unlikely(retval)) {
+ atomic_set(&queue->count, count);
+ /* FIXME: Recover this with an adapter reopen? */
+ } else {
+ queue->first += count;
+ queue->first %= QDIO_MAX_BUFFERS_PER_Q;
+ atomic_set(&queue->count, 0);
+ }
+}
- buffere = &(queue->buffer[first_element]->element[0]);
- ZFCP_LOG_DEBUG("first BUFFERE flags=0x%x\n", buffere->flags);
+static void zfcp_qdio_int_resp(struct ccw_device *cdev, unsigned int status,
+ unsigned int qdio_err, unsigned int siga_err,
+ unsigned int queue_no, int first, int count,
+ unsigned long parm)
+{
+ struct zfcp_adapter *adapter = (struct zfcp_adapter *) parm;
+ struct zfcp_qdio_queue *queue = &adapter->resp_q;
+ volatile struct qdio_buffer_element *sbale;
+ int sbal_idx, sbale_idx, sbal_no;
+
+ if (unlikely(status & QDIO_STATUS_LOOK_FOR_ERROR)) {
+ zfcp_hba_dbf_event_qdio(adapter, status, qdio_err, siga_err,
+ first, count);
+ zfcp_qdio_handler_error(adapter, 147);
+ return;
+ }
+
/*
* go through all SBALs from input queue currently
* returned by QDIO layer
*/
-
- for (i = 0; i < elements_processed; i++) {
-
- buffer_index = first_element + i;
- buffer_index %= QDIO_MAX_BUFFERS_PER_Q;
- buffer = queue->buffer[buffer_index];
+ for (sbal_no = 0; sbal_no < count; sbal_no++) {
+ sbal_idx = (first + sbal_no) % QDIO_MAX_BUFFERS_PER_Q;
/* go through all SBALEs of SBAL */
- for (buffere_index = 0;
- buffere_index < QDIO_MAX_ELEMENTS_PER_BUFFER;
- buffere_index++) {
-
- /* look for QDIO request identifiers in SB */
- buffere = &buffer->element[buffere_index];
+ for (sbale_idx = 0; sbale_idx < QDIO_MAX_ELEMENTS_PER_BUFFER;
+ sbale_idx++) {
+ sbale = zfcp_qdio_sbale(queue, sbal_idx, sbale_idx);
zfcp_qdio_reqid_check(adapter,
- (unsigned long) buffere->addr);
-
- /*
- * A single used SBALE per inbound SBALE has been
- * implemented by QDIO so far. Hope they will
- * do some optimisation. Will need to change to
- * unlikely() then.
- */
- if (likely(buffere->flags & SBAL_FLAGS_LAST_ENTRY))
+ (unsigned long) sbale->addr,
+ sbal_idx);
+ if (likely(sbale->flags & SBAL_FLAGS_LAST_ENTRY))
break;
};
- if (unlikely(!(buffere->flags & SBAL_FLAGS_LAST_ENTRY))) {
- ZFCP_LOG_NORMAL("bug: End of inbound data "
- "not marked!\n");
- }
+ if (unlikely(!(sbale->flags & SBAL_FLAGS_LAST_ENTRY)))
+ dev_warn(&adapter->ccw_device->dev,
+ "Protocol violation by adapter. "
+ "Continuing operations.\n");
}
/*
* put range of SBALs back to response queue
* (including SBALs which have already been free before)
*/
- count = atomic_read(&queue->free_count) + elements_processed;
- start = queue->free_index;
-
- ZFCP_LOG_TRACE("calling do_QDIO on adapter %s (flags=0x%x, "
- "queue_no=%i, index_in_queue=%i, count=%i, "
- "buffers=0x%lx\n",
- zfcp_get_busid_by_adapter(adapter),
- QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
- 0, start, count, (unsigned long) &queue->buffer[start]);
-
- retval = do_QDIO(ccw_device,
- QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
- 0, start, count, NULL);
-
- if (unlikely(retval)) {
- atomic_set(&queue->free_count, count);
- ZFCP_LOG_DEBUG("clearing of inbound data regions failed, "
- "queues may be down "
- "(count=%d, start=%d, retval=%d)\n",
- count, start, retval);
- } else {
- queue->free_index += count;
- queue->free_index %= QDIO_MAX_BUFFERS_PER_Q;
- atomic_set(&queue->free_count, 0);
- ZFCP_LOG_TRACE("%i buffers enqueued to response "
- "queue at position %i\n", count, start);
- }
- out:
- return;
+ zfcp_qdio_resp_put_back(adapter, count);
}
/**
- * zfcp_qdio_sbale_get - return pointer to SBALE of qdio_queue
- * @queue: queue from which SBALE should be returned
- * @sbal: specifies number of SBAL in queue
- * @sbale: specifes number of SBALE in SBAL
- */
-static inline volatile struct qdio_buffer_element *
-zfcp_qdio_sbale_get(struct zfcp_qdio_queue *queue, int sbal, int sbale)
-{
- return &queue->buffer[sbal]->element[sbale];
-}
-
-/**
- * zfcp_qdio_sbale_req - return pointer to SBALE of request_queue for
- * a struct zfcp_fsf_req
+ * zfcp_qdio_sbale_req - return ptr to SBALE of req_q for a struct zfcp_fsf_req
+ * @fsf_req: pointer to struct fsf_req
+ * Returns: pointer to qdio_buffer_element (SBALE) structure
*/
volatile struct qdio_buffer_element *
-zfcp_qdio_sbale_req(struct zfcp_fsf_req *fsf_req, int sbal, int sbale)
+zfcp_qdio_sbale_req(struct zfcp_fsf_req *req)
{
- return zfcp_qdio_sbale_get(&fsf_req->adapter->request_queue,
- sbal, sbale);
+ return zfcp_qdio_sbale(&req->adapter->req_q, req->sbal_last, 0);
}
/**
- * zfcp_qdio_sbale_resp - return pointer to SBALE of response_queue for
- * a struct zfcp_fsf_req
- */
-static inline volatile struct qdio_buffer_element *
-zfcp_qdio_sbale_resp(struct zfcp_fsf_req *fsf_req, int sbal, int sbale)
-{
- return zfcp_qdio_sbale_get(&fsf_req->adapter->response_queue,
- sbal, sbale);
-}
-
-/**
- * zfcp_qdio_sbale_curr - return current SBALE on request_queue for
- * a struct zfcp_fsf_req
+ * zfcp_qdio_sbale_curr - return curr SBALE on req_q for a struct zfcp_fsf_req
+ * @fsf_req: pointer to struct fsf_req
+ * Returns: pointer to qdio_buffer_element (SBALE) structure
*/
volatile struct qdio_buffer_element *
-zfcp_qdio_sbale_curr(struct zfcp_fsf_req *fsf_req)
+zfcp_qdio_sbale_curr(struct zfcp_fsf_req *req)
{
- return zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr,
- fsf_req->sbale_curr);
+ return zfcp_qdio_sbale(&req->adapter->req_q, req->sbal_last,
+ req->sbale_curr);
}
-/**
- * zfcp_qdio_sbal_limit - determine maximum number of SBALs that can be used
- * on the request_queue for a struct zfcp_fsf_req
- * @fsf_req: the number of the last SBAL that can be used is stored herein
- * @max_sbals: used to pass an upper limit for the number of SBALs
- *
- * Note: We can assume at least one free SBAL in the request_queue when called.
- */
-static void
-zfcp_qdio_sbal_limit(struct zfcp_fsf_req *fsf_req, int max_sbals)
+static void zfcp_qdio_sbal_limit(struct zfcp_fsf_req *fsf_req, int max_sbals)
{
- int count = atomic_read(&fsf_req->adapter->request_queue.free_count);
+ int count = atomic_read(&fsf_req->adapter->req_q.count);
count = min(count, max_sbals);
- fsf_req->sbal_last = fsf_req->sbal_first;
- fsf_req->sbal_last += (count - 1);
- fsf_req->sbal_last %= QDIO_MAX_BUFFERS_PER_Q;
+ fsf_req->sbal_limit = (fsf_req->sbal_first + count - 1)
+ % QDIO_MAX_BUFFERS_PER_Q;
}
-/**
- * zfcp_qdio_sbal_chain - chain SBALs if more than one SBAL is needed for a
- * request
- * @fsf_req: zfcp_fsf_req to be processed
- * @sbtype: SBAL flags which have to be set in first SBALE of new SBAL
- *
- * This function changes sbal_curr, sbale_curr, sbal_number of fsf_req.
- */
static volatile struct qdio_buffer_element *
zfcp_qdio_sbal_chain(struct zfcp_fsf_req *fsf_req, unsigned long sbtype)
{
@@ -455,16 +231,16 @@
sbale->flags |= SBAL_FLAGS_LAST_ENTRY;
/* don't exceed last allowed SBAL */
- if (fsf_req->sbal_curr == fsf_req->sbal_last)
+ if (fsf_req->sbal_last == fsf_req->sbal_limit)
return NULL;
/* set chaining flag in first SBALE of current SBAL */
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
+ sbale = zfcp_qdio_sbale_req(fsf_req);
sbale->flags |= SBAL_FLAGS0_MORE_SBALS;
/* calculate index of next SBAL */
- fsf_req->sbal_curr++;
- fsf_req->sbal_curr %= QDIO_MAX_BUFFERS_PER_Q;
+ fsf_req->sbal_last++;
+ fsf_req->sbal_last %= QDIO_MAX_BUFFERS_PER_Q;
/* keep this requests number of SBALs up-to-date */
fsf_req->sbal_number++;
@@ -479,214 +255,255 @@
return sbale;
}
-/**
- * zfcp_qdio_sbale_next - switch to next SBALE, chain SBALs if needed
- */
static volatile struct qdio_buffer_element *
zfcp_qdio_sbale_next(struct zfcp_fsf_req *fsf_req, unsigned long sbtype)
{
if (fsf_req->sbale_curr == ZFCP_LAST_SBALE_PER_SBAL)
return zfcp_qdio_sbal_chain(fsf_req, sbtype);
-
fsf_req->sbale_curr++;
-
return zfcp_qdio_sbale_curr(fsf_req);
}
-/**
- * zfcp_qdio_sbals_zero - initialize SBALs between first and last in queue
- * with zero from
- */
-static int
-zfcp_qdio_sbals_zero(struct zfcp_qdio_queue *queue, int first, int last)
+static void zfcp_qdio_undo_sbals(struct zfcp_fsf_req *fsf_req)
{
- struct qdio_buffer **buf = queue->buffer;
- int curr = first;
- int count = 0;
-
- for(;;) {
- curr %= QDIO_MAX_BUFFERS_PER_Q;
- count++;
- memset(buf[curr], 0, sizeof(struct qdio_buffer));
- if (curr == last)
- break;
- curr++;
- }
- return count;
+ struct qdio_buffer **sbal = fsf_req->adapter->req_q.sbal;
+ int first = fsf_req->sbal_first;
+ int last = fsf_req->sbal_last;
+ int count = (last - first + QDIO_MAX_BUFFERS_PER_Q) %
+ QDIO_MAX_BUFFERS_PER_Q + 1;
+ zfcp_qdio_zero_sbals(sbal, first, count);
}
-
-/**
- * zfcp_qdio_sbals_wipe - reset all changes in SBALs for an fsf_req
- */
-static inline int
-zfcp_qdio_sbals_wipe(struct zfcp_fsf_req *fsf_req)
-{
- return zfcp_qdio_sbals_zero(&fsf_req->adapter->request_queue,
- fsf_req->sbal_first, fsf_req->sbal_curr);
-}
-
-
-/**
- * zfcp_qdio_sbale_fill - set address and length in current SBALE
- * on request_queue
- */
-static void
-zfcp_qdio_sbale_fill(struct zfcp_fsf_req *fsf_req, unsigned long sbtype,
- void *addr, int length)
+static int zfcp_qdio_fill_sbals(struct zfcp_fsf_req *fsf_req,
+ unsigned int sbtype, void *start_addr,
+ unsigned int total_length)
{
volatile struct qdio_buffer_element *sbale;
-
- sbale = zfcp_qdio_sbale_curr(fsf_req);
- sbale->addr = addr;
- sbale->length = length;
-}
-
-/**
- * zfcp_qdio_sbals_from_segment - map memory segment to SBALE(s)
- * @fsf_req: request to be processed
- * @sbtype: SBALE flags
- * @start_addr: address of memory segment
- * @total_length: length of memory segment
- *
- * Alignment and length of the segment determine how many SBALEs are needed
- * for the memory segment.
- */
-static int
-zfcp_qdio_sbals_from_segment(struct zfcp_fsf_req *fsf_req, unsigned long sbtype,
- void *start_addr, unsigned long total_length)
-{
unsigned long remaining, length;
void *addr;
- /* split segment up heeding page boundaries */
+ /* split segment up */
for (addr = start_addr, remaining = total_length; remaining > 0;
addr += length, remaining -= length) {
- /* get next free SBALE for new piece */
- if (NULL == zfcp_qdio_sbale_next(fsf_req, sbtype)) {
- /* no SBALE left, clean up and leave */
- zfcp_qdio_sbals_wipe(fsf_req);
+ sbale = zfcp_qdio_sbale_next(fsf_req, sbtype);
+ if (!sbale) {
+ zfcp_qdio_undo_sbals(fsf_req);
return -EINVAL;
}
- /* calculate length of new piece */
- length = min(remaining,
- (PAGE_SIZE - ((unsigned long) addr &
- (PAGE_SIZE - 1))));
- /* fill current SBALE with calculated piece */
- zfcp_qdio_sbale_fill(fsf_req, sbtype, addr, length);
- }
- return total_length;
-}
+ /* new piece must not exceed next page boundary */
+ length = min(remaining,
+ (PAGE_SIZE - ((unsigned long)addr &
+ (PAGE_SIZE - 1))));
+ sbale->addr = addr;
+ sbale->length = length;
+ }
+ return 0;
+}
/**
* zfcp_qdio_sbals_from_sg - fill SBALs from scatter-gather list
* @fsf_req: request to be processed
* @sbtype: SBALE flags
* @sg: scatter-gather list
- * @sg_count: number of elements in scatter-gather list
* @max_sbals: upper bound for number of SBALs to be used
+ * Returns: number of bytes, or error (negativ)
*/
-int
-zfcp_qdio_sbals_from_sg(struct zfcp_fsf_req *fsf_req, unsigned long sbtype,
- struct scatterlist *sgl, int sg_count, int max_sbals)
+int zfcp_qdio_sbals_from_sg(struct zfcp_fsf_req *fsf_req, unsigned long sbtype,
+ struct scatterlist *sg, int max_sbals)
{
- int sg_index;
- struct scatterlist *sg_segment;
- int retval;
volatile struct qdio_buffer_element *sbale;
- int bytes = 0;
+ int retval, bytes = 0;
/* figure out last allowed SBAL */
zfcp_qdio_sbal_limit(fsf_req, max_sbals);
- /* set storage-block type for current SBAL */
- sbale = zfcp_qdio_sbale_req(fsf_req, fsf_req->sbal_curr, 0);
+ /* set storage-block type for this request */
+ sbale = zfcp_qdio_sbale_req(fsf_req);
sbale->flags |= sbtype;
- /* process all segements of scatter-gather list */
- for_each_sg(sgl, sg_segment, sg_count, sg_index) {
- retval = zfcp_qdio_sbals_from_segment(
- fsf_req,
- sbtype,
- zfcp_sg_to_address(sg_segment),
- sg_segment->length);
- if (retval < 0) {
- bytes = retval;
- goto out;
- } else
- bytes += retval;
+ for (; sg; sg = sg_next(sg)) {
+ retval = zfcp_qdio_fill_sbals(fsf_req, sbtype, sg_virt(sg),
+ sg->length);
+ if (retval < 0)
+ return retval;
+ bytes += sg->length;
}
+
/* assume that no other SBALEs are to follow in the same SBAL */
sbale = zfcp_qdio_sbale_curr(fsf_req);
sbale->flags |= SBAL_FLAGS_LAST_ENTRY;
-out:
+
return bytes;
}
-
/**
- * zfcp_qdio_sbals_from_scsicmnd - fill SBALs from scsi command
- * @fsf_req: request to be processed
- * @sbtype: SBALE flags
- * @scsi_cmnd: either scatter-gather list or buffer contained herein is used
- * to fill SBALs
+ * zfcp_qdio_send - set PCI flag in first SBALE and send req to QDIO
+ * @fsf_req: pointer to struct zfcp_fsf_req
+ * Returns: 0 on success, error otherwise
*/
-int
-zfcp_qdio_sbals_from_scsicmnd(struct zfcp_fsf_req *fsf_req,
- unsigned long sbtype, struct scsi_cmnd *scsi_cmnd)
+int zfcp_qdio_send(struct zfcp_fsf_req *fsf_req)
{
- return zfcp_qdio_sbals_from_sg(fsf_req, sbtype, scsi_sglist(scsi_cmnd),
- scsi_sg_count(scsi_cmnd),
- ZFCP_MAX_SBALS_PER_REQ);
-}
-
-/**
- * zfcp_qdio_determine_pci - set PCI flag in first SBALE on qdio queue if needed
- */
-int
-zfcp_qdio_determine_pci(struct zfcp_qdio_queue *req_queue,
- struct zfcp_fsf_req *fsf_req)
-{
- int new_distance_from_int;
- int pci_pos;
+ struct zfcp_adapter *adapter = fsf_req->adapter;
+ struct zfcp_qdio_queue *req_q = &adapter->req_q;
+ int first = fsf_req->sbal_first;
+ int count = fsf_req->sbal_number;
+ int retval, pci, pci_batch;
volatile struct qdio_buffer_element *sbale;
- new_distance_from_int = req_queue->distance_from_int +
- fsf_req->sbal_number;
-
- if (unlikely(new_distance_from_int >= ZFCP_QDIO_PCI_INTERVAL)) {
- new_distance_from_int %= ZFCP_QDIO_PCI_INTERVAL;
- pci_pos = fsf_req->sbal_first;
- pci_pos += fsf_req->sbal_number;
- pci_pos -= new_distance_from_int;
- pci_pos -= 1;
- pci_pos %= QDIO_MAX_BUFFERS_PER_Q;
- sbale = zfcp_qdio_sbale_req(fsf_req, pci_pos, 0);
+ /* acknowledgements for transferred buffers */
+ pci_batch = req_q->pci_batch + count;
+ if (unlikely(pci_batch >= ZFCP_QDIO_PCI_INTERVAL)) {
+ pci_batch %= ZFCP_QDIO_PCI_INTERVAL;
+ pci = first + count - (pci_batch + 1);
+ pci %= QDIO_MAX_BUFFERS_PER_Q;
+ sbale = zfcp_qdio_sbale(req_q, pci, 0);
sbale->flags |= SBAL_FLAGS0_PCI;
}
- return new_distance_from_int;
-}
-/*
- * function: zfcp_zero_sbals
- *
- * purpose: zeros specified range of SBALs
- *
- * returns:
- */
-void
-zfcp_qdio_zero_sbals(struct qdio_buffer *buf[], int first, int clean_count)
-{
- int cur_pos;
- int index;
-
- for (cur_pos = first; cur_pos < (first + clean_count); cur_pos++) {
- index = cur_pos % QDIO_MAX_BUFFERS_PER_Q;
- memset(buf[index], 0, sizeof (struct qdio_buffer));
- ZFCP_LOG_TRACE("zeroing BUFFER %d at address %p\n",
- index, buf[index]);
+ retval = do_QDIO(adapter->ccw_device, QDIO_FLAG_SYNC_OUTPUT, 0, first,
+ count, NULL);
+ if (unlikely(retval)) {
+ zfcp_qdio_zero_sbals(req_q->sbal, first, count);
+ return retval;
}
+
+ /* account for transferred buffers */
+ atomic_sub(count, &req_q->count);
+ req_q->first += count;
+ req_q->first %= QDIO_MAX_BUFFERS_PER_Q;
+ req_q->pci_batch = pci_batch;
+ return 0;
}
-#undef ZFCP_LOG_AREA
+/**
+ * zfcp_qdio_allocate - allocate queue memory and initialize QDIO data
+ * @adapter: pointer to struct zfcp_adapter
+ * Returns: -ENOMEM on memory allocation error or return value from
+ * qdio_allocate
+ */
+int zfcp_qdio_allocate(struct zfcp_adapter *adapter)
+{
+ struct qdio_initialize *init_data;
+
+ if (zfcp_qdio_buffers_enqueue(adapter->req_q.sbal) ||
+ zfcp_qdio_buffers_enqueue(adapter->resp_q.sbal))
+ return -ENOMEM;
+
+ init_data = &adapter->qdio_init_data;
+
+ init_data->cdev = adapter->ccw_device;
+ init_data->q_format = QDIO_ZFCP_QFMT;
+ memcpy(init_data->adapter_name, zfcp_get_busid_by_adapter(adapter), 8);
+ ASCEBC(init_data->adapter_name, 8);
+ init_data->qib_param_field_format = 0;
+ init_data->qib_param_field = NULL;
+ init_data->input_slib_elements = NULL;
+ init_data->output_slib_elements = NULL;
+ init_data->min_input_threshold = 1;
+ init_data->max_input_threshold = 5000;
+ init_data->min_output_threshold = 1;
+ init_data->max_output_threshold = 1000;
+ init_data->no_input_qs = 1;
+ init_data->no_output_qs = 1;
+ init_data->input_handler = zfcp_qdio_int_resp;
+ init_data->output_handler = zfcp_qdio_int_req;
+ init_data->int_parm = (unsigned long) adapter;
+ init_data->flags = QDIO_INBOUND_0COPY_SBALS |
+ QDIO_OUTBOUND_0COPY_SBALS | QDIO_USE_OUTBOUND_PCIS;
+ init_data->input_sbal_addr_array =
+ (void **) (adapter->resp_q.sbal);
+ init_data->output_sbal_addr_array =
+ (void **) (adapter->req_q.sbal);
+
+ return qdio_allocate(init_data);
+}
+
+/**
+ * zfcp_close_qdio - close qdio queues for an adapter
+ */
+void zfcp_qdio_close(struct zfcp_adapter *adapter)
+{
+ struct zfcp_qdio_queue *req_q;
+ int first, count;
+
+ if (!atomic_test_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status))
+ return;
+
+ /* clear QDIOUP flag, thus do_QDIO is not called during qdio_shutdown */
+ req_q = &adapter->req_q;
+ spin_lock(&req_q->lock);
+ atomic_clear_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status);
+ spin_unlock(&req_q->lock);
+
+ while (qdio_shutdown(adapter->ccw_device, QDIO_FLAG_CLEANUP_USING_CLEAR)
+ == -EINPROGRESS)
+ ssleep(1);
+
+ /* cleanup used outbound sbals */
+ count = atomic_read(&req_q->count);
+ if (count < QDIO_MAX_BUFFERS_PER_Q) {
+ first = (req_q->first + count) % QDIO_MAX_BUFFERS_PER_Q;
+ count = QDIO_MAX_BUFFERS_PER_Q - count;
+ zfcp_qdio_zero_sbals(req_q->sbal, first, count);
+ }
+ req_q->first = 0;
+ atomic_set(&req_q->count, 0);
+ req_q->pci_batch = 0;
+ adapter->resp_q.first = 0;
+ atomic_set(&adapter->resp_q.count, 0);
+}
+
+/**
+ * zfcp_qdio_open - prepare and initialize response queue
+ * @adapter: pointer to struct zfcp_adapter
+ * Returns: 0 on success, otherwise -EIO
+ */
+int zfcp_qdio_open(struct zfcp_adapter *adapter)
+{
+ volatile struct qdio_buffer_element *sbale;
+ int cc;
+
+ if (atomic_test_mask(ZFCP_STATUS_ADAPTER_QDIOUP, &adapter->status))
+ return -EIO;
+
+ if (qdio_establish(&adapter->qdio_init_data)) {
+ dev_err(&adapter->ccw_device->dev,
+ "Establish of QDIO queues failed.\n");
+ return -EIO;
+ }
+
+ if (qdio_activate(adapter->ccw_device, 0)) {
+ dev_err(&adapter->ccw_device->dev,
+ "Activate of QDIO queues failed.\n");
+ goto failed_qdio;
+ }
+
+ for (cc = 0; cc < QDIO_MAX_BUFFERS_PER_Q; cc++) {
+ sbale = &(adapter->resp_q.sbal[cc]->element[0]);
+ sbale->length = 0;
+ sbale->flags = SBAL_FLAGS_LAST_ENTRY;
+ sbale->addr = NULL;
+ }
+
+ if (do_QDIO(adapter->ccw_device, QDIO_FLAG_SYNC_INPUT, 0, 0,
+ QDIO_MAX_BUFFERS_PER_Q, NULL)) {
+ dev_err(&adapter->ccw_device->dev,
+ "Init of QDIO response queue failed.\n");
+ goto failed_qdio;
+ }
+
+ /* set index of first avalable SBALS / number of available SBALS */
+ adapter->req_q.first = 0;
+ atomic_set(&adapter->req_q.count, QDIO_MAX_BUFFERS_PER_Q);
+ adapter->req_q.pci_batch = 0;
+
+ return 0;
+
+failed_qdio:
+ while (qdio_shutdown(adapter->ccw_device, QDIO_FLAG_CLEANUP_USING_CLEAR)
+ == -EINPROGRESS)
+ ssleep(1);
+
+ return -EIO;
+}
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index 0168755..aeae56b 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -1,152 +1,137 @@
/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
+ * zfcp device driver
*
- * (C) Copyright IBM Corp. 2002, 2006
+ * Interface to Linux SCSI midlayer.
*
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * Copyright IBM Corporation 2002, 2008
*/
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_SCSI
-
#include "zfcp_ext.h"
#include <asm/atomic.h>
-static void zfcp_scsi_slave_destroy(struct scsi_device *sdp);
-static int zfcp_scsi_slave_alloc(struct scsi_device *sdp);
-static int zfcp_scsi_slave_configure(struct scsi_device *sdp);
-static int zfcp_scsi_queuecommand(struct scsi_cmnd *,
- void (*done) (struct scsi_cmnd *));
-static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *);
-static int zfcp_scsi_eh_device_reset_handler(struct scsi_cmnd *);
-static int zfcp_scsi_eh_target_reset_handler(struct scsi_cmnd *);
-static int zfcp_scsi_eh_host_reset_handler(struct scsi_cmnd *);
-static int zfcp_task_management_function(struct zfcp_unit *, u8,
- struct scsi_cmnd *);
-
-static struct zfcp_unit *zfcp_unit_lookup(struct zfcp_adapter *, int,
- unsigned int, unsigned int);
-
-static struct device_attribute *zfcp_sysfs_sdev_attrs[];
-static struct device_attribute *zfcp_a_stats_attrs[];
-
-struct zfcp_data zfcp_data = {
- .scsi_host_template = {
- .name = ZFCP_NAME,
- .module = THIS_MODULE,
- .proc_name = "zfcp",
- .slave_alloc = zfcp_scsi_slave_alloc,
- .slave_configure = zfcp_scsi_slave_configure,
- .slave_destroy = zfcp_scsi_slave_destroy,
- .queuecommand = zfcp_scsi_queuecommand,
- .eh_abort_handler = zfcp_scsi_eh_abort_handler,
- .eh_device_reset_handler = zfcp_scsi_eh_device_reset_handler,
- .eh_target_reset_handler = zfcp_scsi_eh_target_reset_handler,
- .eh_host_reset_handler = zfcp_scsi_eh_host_reset_handler,
- .can_queue = 4096,
- .this_id = -1,
- .sg_tablesize = ZFCP_MAX_SBALES_PER_REQ,
- .cmd_per_lun = 1,
- .use_clustering = 1,
- .sdev_attrs = zfcp_sysfs_sdev_attrs,
- .max_sectors = ZFCP_MAX_SECTORS,
- .shost_attrs = zfcp_a_stats_attrs,
- },
- .driver_version = ZFCP_VERSION,
-};
-
-/* Find start of Response Information in FCP response unit*/
-char *
-zfcp_get_fcp_rsp_info_ptr(struct fcp_rsp_iu *fcp_rsp_iu)
-{
- char *fcp_rsp_info_ptr;
-
- fcp_rsp_info_ptr =
- (unsigned char *) fcp_rsp_iu + (sizeof (struct fcp_rsp_iu));
-
- return fcp_rsp_info_ptr;
-}
-
/* Find start of Sense Information in FCP response unit*/
-char *
-zfcp_get_fcp_sns_info_ptr(struct fcp_rsp_iu *fcp_rsp_iu)
+char *zfcp_get_fcp_sns_info_ptr(struct fcp_rsp_iu *fcp_rsp_iu)
{
char *fcp_sns_info_ptr;
- fcp_sns_info_ptr =
- (unsigned char *) fcp_rsp_iu + (sizeof (struct fcp_rsp_iu));
+ fcp_sns_info_ptr = (unsigned char *) &fcp_rsp_iu[1];
if (fcp_rsp_iu->validity.bits.fcp_rsp_len_valid)
- fcp_sns_info_ptr = (char *) fcp_sns_info_ptr +
- fcp_rsp_iu->fcp_rsp_len;
+ fcp_sns_info_ptr += fcp_rsp_iu->fcp_rsp_len;
return fcp_sns_info_ptr;
}
-static fcp_dl_t *
-zfcp_get_fcp_dl_ptr(struct fcp_cmnd_iu * fcp_cmd)
+void zfcp_set_fcp_dl(struct fcp_cmnd_iu *fcp_cmd, fcp_dl_t fcp_dl)
{
- int additional_length = fcp_cmd->add_fcp_cdb_length << 2;
- fcp_dl_t *fcp_dl_addr;
+ fcp_dl_t *fcp_dl_ptr;
- fcp_dl_addr = (fcp_dl_t *)
- ((unsigned char *) fcp_cmd +
- sizeof (struct fcp_cmnd_iu) + additional_length);
/*
* fcp_dl_addr = start address of fcp_cmnd structure +
* size of fixed part + size of dynamically sized add_dcp_cdb field
* SEE FCP-2 documentation
*/
- return fcp_dl_addr;
+ fcp_dl_ptr = (fcp_dl_t *) ((unsigned char *) &fcp_cmd[1] +
+ (fcp_cmd->add_fcp_cdb_length << 2));
+ *fcp_dl_ptr = fcp_dl;
}
-fcp_dl_t
-zfcp_get_fcp_dl(struct fcp_cmnd_iu * fcp_cmd)
+static void zfcp_scsi_slave_destroy(struct scsi_device *sdpnt)
{
- return *zfcp_get_fcp_dl_ptr(fcp_cmd);
+ struct zfcp_unit *unit = (struct zfcp_unit *) sdpnt->hostdata;
+ WARN_ON(!unit);
+ if (unit) {
+ atomic_clear_mask(ZFCP_STATUS_UNIT_REGISTERED, &unit->status);
+ sdpnt->hostdata = NULL;
+ unit->device = NULL;
+ zfcp_erp_unit_failed(unit, 12, NULL);
+ zfcp_unit_put(unit);
+ }
}
-void
-zfcp_set_fcp_dl(struct fcp_cmnd_iu *fcp_cmd, fcp_dl_t fcp_dl)
+static int zfcp_scsi_slave_configure(struct scsi_device *sdp)
{
- *zfcp_get_fcp_dl_ptr(fcp_cmd) = fcp_dl;
+ if (sdp->tagged_supported)
+ scsi_adjust_queue_depth(sdp, MSG_SIMPLE_TAG, 32);
+ else
+ scsi_adjust_queue_depth(sdp, 0, 1);
+ return 0;
}
-/*
- * note: it's a bit-or operation not an assignment
- * regarding the specified byte
- */
-static inline void
-set_byte(int *result, char status, char pos)
+static void zfcp_scsi_command_fail(struct scsi_cmnd *scpnt, int result)
{
- *result |= status << (pos * 8);
+ set_host_byte(scpnt, result);
+ if ((scpnt->device != NULL) && (scpnt->device->host != NULL))
+ zfcp_scsi_dbf_event_result("fail", 4,
+ (struct zfcp_adapter*) scpnt->device->host->hostdata[0],
+ scpnt, NULL);
+ /* return directly */
+ scpnt->scsi_done(scpnt);
}
-void
-set_host_byte(int *result, char status)
+static int zfcp_scsi_queuecommand(struct scsi_cmnd *scpnt,
+ void (*done) (struct scsi_cmnd *))
{
- set_byte(result, status, 2);
+ struct zfcp_unit *unit;
+ struct zfcp_adapter *adapter;
+ int status;
+ int ret;
+
+ /* reset the status for this request */
+ scpnt->result = 0;
+ scpnt->host_scribble = NULL;
+ scpnt->scsi_done = done;
+
+ /*
+ * figure out adapter and target device
+ * (stored there by zfcp_scsi_slave_alloc)
+ */
+ adapter = (struct zfcp_adapter *) scpnt->device->host->hostdata[0];
+ unit = scpnt->device->hostdata;
+
+ BUG_ON(!adapter || (adapter != unit->port->adapter));
+ BUG_ON(!scpnt->scsi_done);
+
+ if (unlikely(!unit)) {
+ zfcp_scsi_command_fail(scpnt, DID_NO_CONNECT);
+ return 0;
+ }
+
+ status = atomic_read(&unit->status);
+ if (unlikely((status & ZFCP_STATUS_COMMON_ERP_FAILED) ||
+ !(status & ZFCP_STATUS_COMMON_RUNNING))) {
+ zfcp_scsi_command_fail(scpnt, DID_ERROR);
+ return 0;;
+ }
+
+ ret = zfcp_fsf_send_fcp_command_task(adapter, unit, scpnt, 0,
+ ZFCP_REQ_AUTO_CLEANUP);
+ if (unlikely(ret == -EBUSY))
+ zfcp_scsi_command_fail(scpnt, DID_NO_CONNECT);
+ else if (unlikely(ret < 0))
+ return SCSI_MLQUEUE_HOST_BUSY;
+
+ return ret;
}
-void
-set_driver_byte(int *result, char status)
+static struct zfcp_unit *zfcp_unit_lookup(struct zfcp_adapter *adapter,
+ int channel, unsigned int id,
+ unsigned int lun)
{
- set_byte(result, status, 3);
+ struct zfcp_port *port;
+ struct zfcp_unit *unit;
+
+ list_for_each_entry(port, &adapter->port_list_head, list) {
+ if (!port->rport || (id != port->rport->scsi_target_id))
+ continue;
+ list_for_each_entry(unit, &port->unit_list_head, list)
+ if (lun == unit->scsi_lun)
+ return unit;
+ }
+
+ return NULL;
}
-static int
-zfcp_scsi_slave_alloc(struct scsi_device *sdp)
+static int zfcp_scsi_slave_alloc(struct scsi_device *sdp)
{
struct zfcp_adapter *adapter;
struct zfcp_unit *unit;
@@ -159,227 +144,18 @@
read_lock_irqsave(&zfcp_data.config_lock, flags);
unit = zfcp_unit_lookup(adapter, sdp->channel, sdp->id, sdp->lun);
- if (unit && atomic_test_mask(ZFCP_STATUS_UNIT_REGISTERED,
- &unit->status)) {
+ if (unit &&
+ (atomic_read(&unit->status) & ZFCP_STATUS_UNIT_REGISTERED)) {
sdp->hostdata = unit;
unit->device = sdp;
zfcp_unit_get(unit);
retval = 0;
}
read_unlock_irqrestore(&zfcp_data.config_lock, flags);
- out:
- return retval;
-}
-
-/**
- * zfcp_scsi_slave_destroy - called when scsi device is removed
- *
- * Remove reference to associated scsi device for an zfcp_unit.
- * Mark zfcp_unit as failed. The scsi device might be deleted via sysfs
- * or a scan for this device might have failed.
- */
-static void zfcp_scsi_slave_destroy(struct scsi_device *sdpnt)
-{
- struct zfcp_unit *unit = (struct zfcp_unit *) sdpnt->hostdata;
-
- if (unit) {
- atomic_clear_mask(ZFCP_STATUS_UNIT_REGISTERED, &unit->status);
- sdpnt->hostdata = NULL;
- unit->device = NULL;
- zfcp_erp_unit_failed(unit, 12, NULL);
- zfcp_unit_put(unit);
- } else
- ZFCP_LOG_NORMAL("bug: no unit associated with SCSI device at "
- "address %p\n", sdpnt);
-}
-
-/*
- * called from scsi midlayer to allow finetuning of a device.
- */
-static int
-zfcp_scsi_slave_configure(struct scsi_device *sdp)
-{
- if (sdp->tagged_supported)
- scsi_adjust_queue_depth(sdp, MSG_SIMPLE_TAG, ZFCP_CMND_PER_LUN);
- else
- scsi_adjust_queue_depth(sdp, 0, 1);
- return 0;
-}
-
-/**
- * zfcp_scsi_command_fail - set result in scsi_cmnd and call scsi_done function
- * @scpnt: pointer to struct scsi_cmnd where result is set
- * @result: result to be set in scpnt (e.g. DID_ERROR)
- */
-static void
-zfcp_scsi_command_fail(struct scsi_cmnd *scpnt, int result)
-{
- set_host_byte(&scpnt->result, result);
- if ((scpnt->device != NULL) && (scpnt->device->host != NULL))
- zfcp_scsi_dbf_event_result("fail", 4,
- (struct zfcp_adapter*) scpnt->device->host->hostdata[0],
- scpnt, NULL);
- /* return directly */
- scpnt->scsi_done(scpnt);
-}
-
-/**
- * zfcp_scsi_command_async - worker for zfcp_scsi_queuecommand and
- * zfcp_scsi_command_sync
- * @adapter: adapter where scsi command is issued
- * @unit: unit to which scsi command is sent
- * @scpnt: scsi command to be sent
- * @timer: timer to be started if request is successfully initiated
- *
- * Note: In scsi_done function must be set in scpnt.
- */
-int
-zfcp_scsi_command_async(struct zfcp_adapter *adapter, struct zfcp_unit *unit,
- struct scsi_cmnd *scpnt, int use_timer)
-{
- int tmp;
- int retval;
-
- retval = 0;
-
- BUG_ON((adapter == NULL) || (adapter != unit->port->adapter));
- BUG_ON(scpnt->scsi_done == NULL);
-
- if (unlikely(NULL == unit)) {
- zfcp_scsi_command_fail(scpnt, DID_NO_CONNECT);
- goto out;
- }
-
- if (unlikely(
- atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &unit->status) ||
- !atomic_test_mask(ZFCP_STATUS_COMMON_RUNNING, &unit->status))) {
- ZFCP_LOG_DEBUG("stopping SCSI I/O on unit 0x%016Lx on port "
- "0x%016Lx on adapter %s\n",
- unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_adapter(adapter));
- zfcp_scsi_command_fail(scpnt, DID_ERROR);
- goto out;
- }
-
- tmp = zfcp_fsf_send_fcp_command_task(adapter, unit, scpnt, use_timer,
- ZFCP_REQ_AUTO_CLEANUP);
- if (unlikely(tmp == -EBUSY)) {
- ZFCP_LOG_DEBUG("adapter %s not ready or unit 0x%016Lx "
- "on port 0x%016Lx in recovery\n",
- zfcp_get_busid_by_unit(unit),
- unit->fcp_lun, unit->port->wwpn);
- zfcp_scsi_command_fail(scpnt, DID_NO_CONNECT);
- goto out;
- }
-
- if (unlikely(tmp < 0)) {
- ZFCP_LOG_DEBUG("error: initiation of Send FCP Cmnd failed\n");
- retval = SCSI_MLQUEUE_HOST_BUSY;
- }
-
out:
return retval;
}
-static void
-zfcp_scsi_command_sync_handler(struct scsi_cmnd *scpnt)
-{
- struct completion *wait = (struct completion *) scpnt->SCp.ptr;
- complete(wait);
-}
-
-
-/**
- * zfcp_scsi_command_sync - send a SCSI command and wait for completion
- * @unit: unit where command is sent to
- * @scpnt: scsi command to be sent
- * @use_timer: indicates whether timer should be setup or not
- * Return: 0
- *
- * Errors are indicated in scpnt->result
- */
-int
-zfcp_scsi_command_sync(struct zfcp_unit *unit, struct scsi_cmnd *scpnt,
- int use_timer)
-{
- int ret;
- DECLARE_COMPLETION_ONSTACK(wait);
-
- scpnt->SCp.ptr = (void *) &wait; /* silent re-use */
- scpnt->scsi_done = zfcp_scsi_command_sync_handler;
- ret = zfcp_scsi_command_async(unit->port->adapter, unit, scpnt,
- use_timer);
- if (ret == 0)
- wait_for_completion(&wait);
-
- scpnt->SCp.ptr = NULL;
-
- return 0;
-}
-
-/*
- * function: zfcp_scsi_queuecommand
- *
- * purpose: enqueues a SCSI command to the specified target device
- *
- * returns: 0 - success, SCSI command enqueued
- * !0 - failure
- */
-static int
-zfcp_scsi_queuecommand(struct scsi_cmnd *scpnt,
- void (*done) (struct scsi_cmnd *))
-{
- struct zfcp_unit *unit;
- struct zfcp_adapter *adapter;
-
- /* reset the status for this request */
- scpnt->result = 0;
- scpnt->host_scribble = NULL;
- scpnt->scsi_done = done;
-
- /*
- * figure out adapter and target device
- * (stored there by zfcp_scsi_slave_alloc)
- */
- adapter = (struct zfcp_adapter *) scpnt->device->host->hostdata[0];
- unit = (struct zfcp_unit *) scpnt->device->hostdata;
-
- return zfcp_scsi_command_async(adapter, unit, scpnt, 0);
-}
-
-static struct zfcp_unit *
-zfcp_unit_lookup(struct zfcp_adapter *adapter, int channel, unsigned int id,
- unsigned int lun)
-{
- struct zfcp_port *port;
- struct zfcp_unit *unit, *retval = NULL;
-
- list_for_each_entry(port, &adapter->port_list_head, list) {
- if (!port->rport || (id != port->rport->scsi_target_id))
- continue;
- list_for_each_entry(unit, &port->unit_list_head, list)
- if (lun == unit->scsi_lun) {
- retval = unit;
- goto out;
- }
- }
- out:
- return retval;
-}
-
-/**
- * zfcp_scsi_eh_abort_handler - abort the specified SCSI command
- * @scpnt: pointer to scsi_cmnd to be aborted
- * Return: SUCCESS - command has been aborted and cleaned up in internal
- * bookkeeping, SCSI stack won't be called for aborted command
- * FAILED - otherwise
- *
- * We do not need to care for a SCSI command which completes normally
- * but late during this abort routine runs. We are allowed to return
- * late commands to the SCSI stack. It tracks the state of commands and
- * will handle late commands. (Usually, the normal completion of late
- * commands is ignored with respect to the running abort operation.)
- */
static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt)
{
struct Scsi_Host *scsi_host;
@@ -387,44 +163,37 @@
struct zfcp_unit *unit;
struct zfcp_fsf_req *fsf_req;
unsigned long flags;
- unsigned long old_req_id;
+ unsigned long old_req_id = (unsigned long) scpnt->host_scribble;
int retval = SUCCESS;
scsi_host = scpnt->device->host;
adapter = (struct zfcp_adapter *) scsi_host->hostdata[0];
- unit = (struct zfcp_unit *) scpnt->device->hostdata;
-
- ZFCP_LOG_INFO("aborting scsi_cmnd=%p on adapter %s\n",
- scpnt, zfcp_get_busid_by_adapter(adapter));
+ unit = scpnt->device->hostdata;
/* avoid race condition between late normal completion and abort */
write_lock_irqsave(&adapter->abort_lock, flags);
/* Check whether corresponding fsf_req is still pending */
spin_lock(&adapter->req_list_lock);
- fsf_req = zfcp_reqlist_find(adapter,
- (unsigned long) scpnt->host_scribble);
+ fsf_req = zfcp_reqlist_find(adapter, old_req_id);
spin_unlock(&adapter->req_list_lock);
if (!fsf_req) {
write_unlock_irqrestore(&adapter->abort_lock, flags);
zfcp_scsi_dbf_event_abort("lte1", adapter, scpnt, NULL, 0);
- retval = SUCCESS;
- goto out;
+ return retval;
}
- fsf_req->data = 0;
+ fsf_req->data = NULL;
fsf_req->status |= ZFCP_STATUS_FSFREQ_ABORTING;
- old_req_id = fsf_req->req_id;
/* don't access old fsf_req after releasing the abort_lock */
write_unlock_irqrestore(&adapter->abort_lock, flags);
fsf_req = zfcp_fsf_abort_fcp_command(old_req_id, adapter, unit, 0);
if (!fsf_req) {
- ZFCP_LOG_INFO("error: initiation of Abort FCP Cmnd failed\n");
zfcp_scsi_dbf_event_abort("nres", adapter, scpnt, NULL,
old_req_id);
retval = FAILED;
- goto out;
+ return retval;
}
__wait_event(fsf_req->completion_wq,
@@ -432,66 +201,29 @@
if (fsf_req->status & ZFCP_STATUS_FSFREQ_ABORTSUCCEEDED) {
zfcp_scsi_dbf_event_abort("okay", adapter, scpnt, fsf_req, 0);
- retval = SUCCESS;
} else if (fsf_req->status & ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED) {
zfcp_scsi_dbf_event_abort("lte2", adapter, scpnt, fsf_req, 0);
- retval = SUCCESS;
} else {
zfcp_scsi_dbf_event_abort("fail", adapter, scpnt, fsf_req, 0);
retval = FAILED;
}
zfcp_fsf_req_free(fsf_req);
- out:
+
return retval;
}
-static int zfcp_scsi_eh_device_reset_handler(struct scsi_cmnd *scpnt)
-{
- int retval;
- struct zfcp_unit *unit = scpnt->device->hostdata;
-
- if (!unit) {
- WARN_ON(1);
- return SUCCESS;
- }
- retval = zfcp_task_management_function(unit,
- FCP_LOGICAL_UNIT_RESET,
- scpnt);
- return retval ? FAILED : SUCCESS;
-}
-
-static int zfcp_scsi_eh_target_reset_handler(struct scsi_cmnd *scpnt)
-{
- int retval;
- struct zfcp_unit *unit = scpnt->device->hostdata;
-
- if (!unit) {
- WARN_ON(1);
- return SUCCESS;
- }
- retval = zfcp_task_management_function(unit, FCP_TARGET_RESET, scpnt);
- return retval ? FAILED : SUCCESS;
-}
-
-static int
-zfcp_task_management_function(struct zfcp_unit *unit, u8 tm_flags,
- struct scsi_cmnd *scpnt)
+static int zfcp_task_mgmt_function(struct zfcp_unit *unit, u8 tm_flags,
+ struct scsi_cmnd *scpnt)
{
struct zfcp_adapter *adapter = unit->port->adapter;
struct zfcp_fsf_req *fsf_req;
- int retval = 0;
+ int retval = SUCCESS;
/* issue task management function */
- fsf_req = zfcp_fsf_send_fcp_command_task_management
- (adapter, unit, tm_flags, 0);
+ fsf_req = zfcp_fsf_send_fcp_ctm(adapter, unit, tm_flags, 0);
if (!fsf_req) {
- ZFCP_LOG_INFO("error: creation of task management request "
- "failed for unit 0x%016Lx on port 0x%016Lx on "
- "adapter %s\n", unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_adapter(adapter));
zfcp_scsi_dbf_event_devreset("nres", tm_flags, unit, scpnt);
- retval = -ENOMEM;
- goto out;
+ return FAILED;
}
__wait_event(fsf_req->completion_wq,
@@ -502,87 +234,90 @@
*/
if (fsf_req->status & ZFCP_STATUS_FSFREQ_TMFUNCFAILED) {
zfcp_scsi_dbf_event_devreset("fail", tm_flags, unit, scpnt);
- retval = -EIO;
+ retval = FAILED;
} else if (fsf_req->status & ZFCP_STATUS_FSFREQ_TMFUNCNOTSUPP) {
zfcp_scsi_dbf_event_devreset("nsup", tm_flags, unit, scpnt);
- retval = -ENOTSUPP;
+ retval = FAILED;
} else
zfcp_scsi_dbf_event_devreset("okay", tm_flags, unit, scpnt);
zfcp_fsf_req_free(fsf_req);
- out:
+
return retval;
}
-/**
- * zfcp_scsi_eh_host_reset_handler - handler for host reset
- */
+static int zfcp_scsi_eh_device_reset_handler(struct scsi_cmnd *scpnt)
+{
+ struct zfcp_unit *unit = scpnt->device->hostdata;
+
+ if (!unit) {
+ WARN_ON(1);
+ return SUCCESS;
+ }
+ return zfcp_task_mgmt_function(unit, FCP_LOGICAL_UNIT_RESET, scpnt);
+}
+
+static int zfcp_scsi_eh_target_reset_handler(struct scsi_cmnd *scpnt)
+{
+ struct zfcp_unit *unit = scpnt->device->hostdata;
+
+ if (!unit) {
+ WARN_ON(1);
+ return SUCCESS;
+ }
+ return zfcp_task_mgmt_function(unit, FCP_TARGET_RESET, scpnt);
+}
+
static int zfcp_scsi_eh_host_reset_handler(struct scsi_cmnd *scpnt)
{
struct zfcp_unit *unit;
struct zfcp_adapter *adapter;
- unit = (struct zfcp_unit*) scpnt->device->hostdata;
+ unit = scpnt->device->hostdata;
adapter = unit->port->adapter;
-
- ZFCP_LOG_NORMAL("host reset because of problems with "
- "unit 0x%016Lx on port 0x%016Lx, adapter %s\n",
- unit->fcp_lun, unit->port->wwpn,
- zfcp_get_busid_by_adapter(unit->port->adapter));
-
zfcp_erp_adapter_reopen(adapter, 0, 141, scpnt);
zfcp_erp_wait(adapter);
return SUCCESS;
}
-int
-zfcp_adapter_scsi_register(struct zfcp_adapter *adapter)
+int zfcp_adapter_scsi_register(struct zfcp_adapter *adapter)
{
- int retval = 0;
- static unsigned int unique_id = 0;
+ struct ccw_dev_id dev_id;
if (adapter->scsi_host)
- goto out;
+ return 0;
+ ccw_device_get_id(adapter->ccw_device, &dev_id);
/* register adapter as SCSI host with mid layer of SCSI stack */
adapter->scsi_host = scsi_host_alloc(&zfcp_data.scsi_host_template,
sizeof (struct zfcp_adapter *));
if (!adapter->scsi_host) {
- ZFCP_LOG_NORMAL("error: registration with SCSI stack failed "
- "for adapter %s ",
- zfcp_get_busid_by_adapter(adapter));
- retval = -EIO;
- goto out;
+ dev_err(&adapter->ccw_device->dev,
+ "registration with SCSI stack failed.");
+ return -EIO;
}
- ZFCP_LOG_DEBUG("host registered, scsi_host=%p\n", adapter->scsi_host);
/* tell the SCSI stack some characteristics of this adapter */
adapter->scsi_host->max_id = 1;
adapter->scsi_host->max_lun = 1;
adapter->scsi_host->max_channel = 0;
- adapter->scsi_host->unique_id = unique_id++; /* FIXME */
- adapter->scsi_host->max_cmd_len = ZFCP_MAX_SCSI_CMND_LENGTH;
+ adapter->scsi_host->unique_id = dev_id.devno;
+ adapter->scsi_host->max_cmd_len = 255;
adapter->scsi_host->transportt = zfcp_data.scsi_transport_template;
- /*
- * save a pointer to our own adapter data structure within
- * hostdata field of SCSI host data structure
- */
adapter->scsi_host->hostdata[0] = (unsigned long) adapter;
if (scsi_add_host(adapter->scsi_host, &adapter->ccw_device->dev)) {
scsi_host_put(adapter->scsi_host);
- retval = -EIO;
- goto out;
+ return -EIO;
}
atomic_set_mask(ZFCP_STATUS_ADAPTER_REGISTERED, &adapter->status);
- out:
- return retval;
+
+ return 0;
}
-void
-zfcp_adapter_scsi_unregister(struct zfcp_adapter *adapter)
+void zfcp_adapter_scsi_unregister(struct zfcp_adapter *adapter)
{
struct Scsi_Host *shost;
struct zfcp_port *port;
@@ -590,10 +325,12 @@
shost = adapter->scsi_host;
if (!shost)
return;
+
read_lock_irq(&zfcp_data.config_lock);
list_for_each_entry(port, &adapter->port_list_head, list)
if (port->rport)
port->rport = NULL;
+
read_unlock_irq(&zfcp_data.config_lock);
fc_remove_host(shost);
scsi_remove_host(shost);
@@ -604,9 +341,6 @@
return;
}
-/*
- * Support functions for FC transport class
- */
static struct fc_host_statistics*
zfcp_init_fc_host_stats(struct zfcp_adapter *adapter)
{
@@ -622,13 +356,12 @@
return adapter->fc_stats;
}
-static void
-zfcp_adjust_fc_host_stats(struct fc_host_statistics *fc_stats,
- struct fsf_qtcb_bottom_port *data,
- struct fsf_qtcb_bottom_port *old)
+static void zfcp_adjust_fc_host_stats(struct fc_host_statistics *fc_stats,
+ struct fsf_qtcb_bottom_port *data,
+ struct fsf_qtcb_bottom_port *old)
{
- fc_stats->seconds_since_last_reset = data->seconds_since_last_reset -
- old->seconds_since_last_reset;
+ fc_stats->seconds_since_last_reset =
+ data->seconds_since_last_reset - old->seconds_since_last_reset;
fc_stats->tx_frames = data->tx_frames - old->tx_frames;
fc_stats->tx_words = data->tx_words - old->tx_words;
fc_stats->rx_frames = data->rx_frames - old->rx_frames;
@@ -639,26 +372,25 @@
fc_stats->dumped_frames = data->dumped_frames - old->dumped_frames;
fc_stats->link_failure_count = data->link_failure - old->link_failure;
fc_stats->loss_of_sync_count = data->loss_of_sync - old->loss_of_sync;
- fc_stats->loss_of_signal_count = data->loss_of_signal -
- old->loss_of_signal;
- fc_stats->prim_seq_protocol_err_count = data->psp_error_counts -
- old->psp_error_counts;
- fc_stats->invalid_tx_word_count = data->invalid_tx_words -
- old->invalid_tx_words;
+ fc_stats->loss_of_signal_count =
+ data->loss_of_signal - old->loss_of_signal;
+ fc_stats->prim_seq_protocol_err_count =
+ data->psp_error_counts - old->psp_error_counts;
+ fc_stats->invalid_tx_word_count =
+ data->invalid_tx_words - old->invalid_tx_words;
fc_stats->invalid_crc_count = data->invalid_crcs - old->invalid_crcs;
- fc_stats->fcp_input_requests = data->input_requests -
- old->input_requests;
- fc_stats->fcp_output_requests = data->output_requests -
- old->output_requests;
- fc_stats->fcp_control_requests = data->control_requests -
- old->control_requests;
+ fc_stats->fcp_input_requests =
+ data->input_requests - old->input_requests;
+ fc_stats->fcp_output_requests =
+ data->output_requests - old->output_requests;
+ fc_stats->fcp_control_requests =
+ data->control_requests - old->control_requests;
fc_stats->fcp_input_megabytes = data->input_mb - old->input_mb;
fc_stats->fcp_output_megabytes = data->output_mb - old->output_mb;
}
-static void
-zfcp_set_fc_host_stats(struct fc_host_statistics *fc_stats,
- struct fsf_qtcb_bottom_port *data)
+static void zfcp_set_fc_host_stats(struct fc_host_statistics *fc_stats,
+ struct fsf_qtcb_bottom_port *data)
{
fc_stats->seconds_since_last_reset = data->seconds_since_last_reset;
fc_stats->tx_frames = data->tx_frames;
@@ -682,22 +414,14 @@
fc_stats->fcp_output_megabytes = data->output_mb;
}
-/**
- * zfcp_get_fc_host_stats - provide fc_host_statistics for scsi_transport_fc
- *
- * assumption: scsi_transport_fc synchronizes calls of
- * get_fc_host_stats and reset_fc_host_stats
- * (XXX to be checked otherwise introduce locking)
- */
-static struct fc_host_statistics *
-zfcp_get_fc_host_stats(struct Scsi_Host *shost)
+static struct fc_host_statistics *zfcp_get_fc_host_stats(struct Scsi_Host *host)
{
struct zfcp_adapter *adapter;
struct fc_host_statistics *fc_stats;
struct fsf_qtcb_bottom_port *data;
int ret;
- adapter = (struct zfcp_adapter *)shost->hostdata[0];
+ adapter = (struct zfcp_adapter *)host->hostdata[0];
fc_stats = zfcp_init_fc_host_stats(adapter);
if (!fc_stats)
return NULL;
@@ -709,26 +433,25 @@
ret = zfcp_fsf_exchange_port_data_sync(adapter, data);
if (ret) {
kfree(data);
- return NULL; /* XXX return zeroed fc_stats? */
+ return NULL;
}
if (adapter->stats_reset &&
((jiffies/HZ - adapter->stats_reset) <
- data->seconds_since_last_reset)) {
+ data->seconds_since_last_reset))
zfcp_adjust_fc_host_stats(fc_stats, data,
adapter->stats_reset_data);
- } else
+ else
zfcp_set_fc_host_stats(fc_stats, data);
kfree(data);
return fc_stats;
}
-static void
-zfcp_reset_fc_host_stats(struct Scsi_Host *shost)
+static void zfcp_reset_fc_host_stats(struct Scsi_Host *shost)
{
struct zfcp_adapter *adapter;
- struct fsf_qtcb_bottom_port *data, *old_data;
+ struct fsf_qtcb_bottom_port *data;
int ret;
adapter = (struct zfcp_adapter *)shost->hostdata[0];
@@ -737,17 +460,33 @@
return;
ret = zfcp_fsf_exchange_port_data_sync(adapter, data);
- if (ret) {
+ if (ret)
kfree(data);
- } else {
+ else {
adapter->stats_reset = jiffies/HZ;
- old_data = adapter->stats_reset_data;
+ kfree(adapter->stats_reset_data);
adapter->stats_reset_data = data; /* finally freed in
- adater_dequeue */
- kfree(old_data);
+ adapter_dequeue */
}
}
+static void zfcp_get_host_port_state(struct Scsi_Host *shost)
+{
+ struct zfcp_adapter *adapter =
+ (struct zfcp_adapter *)shost->hostdata[0];
+ int status = atomic_read(&adapter->status);
+
+ if ((status & ZFCP_STATUS_COMMON_RUNNING) &&
+ !(status & ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED))
+ fc_host_port_state(shost) = FC_PORTSTATE_ONLINE;
+ else if (status & ZFCP_STATUS_ADAPTER_LINK_UNPLUGGED)
+ fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN;
+ else if (status & ZFCP_STATUS_COMMON_ERP_FAILED)
+ fc_host_port_state(shost) = FC_PORTSTATE_ERROR;
+ else
+ fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN;
+}
+
static void zfcp_set_rport_dev_loss_tmo(struct fc_rport *rport, u32 timeout)
{
rport->dev_loss_tmo = timeout;
@@ -770,6 +509,8 @@
.get_fc_host_stats = zfcp_get_fc_host_stats,
.reset_fc_host_stats = zfcp_reset_fc_host_stats,
.set_rport_dev_loss_tmo = zfcp_set_rport_dev_loss_tmo,
+ .get_host_port_state = zfcp_get_host_port_state,
+ .show_host_port_state = 1,
/* no functions registered for following dynamic attributes but
directly set by LLDD */
.show_host_port_type = 1,
@@ -778,149 +519,26 @@
.disable_target_scan = 1,
};
-/**
- * ZFCP_DEFINE_SCSI_ATTR
- * @_name: name of show attribute
- * @_format: format string
- * @_value: value to print
- *
- * Generates attribute for a unit.
- */
-#define ZFCP_DEFINE_SCSI_ATTR(_name, _format, _value) \
-static ssize_t zfcp_sysfs_scsi_##_name##_show(struct device *dev, struct device_attribute *attr, \
- char *buf) \
-{ \
- struct scsi_device *sdev; \
- struct zfcp_unit *unit; \
- \
- sdev = to_scsi_device(dev); \
- unit = sdev->hostdata; \
- return sprintf(buf, _format, _value); \
-} \
- \
-static DEVICE_ATTR(_name, S_IRUGO, zfcp_sysfs_scsi_##_name##_show, NULL);
-
-ZFCP_DEFINE_SCSI_ATTR(hba_id, "%s\n", zfcp_get_busid_by_unit(unit));
-ZFCP_DEFINE_SCSI_ATTR(wwpn, "0x%016llx\n", unit->port->wwpn);
-ZFCP_DEFINE_SCSI_ATTR(fcp_lun, "0x%016llx\n", unit->fcp_lun);
-
-static struct device_attribute *zfcp_sysfs_sdev_attrs[] = {
- &dev_attr_fcp_lun,
- &dev_attr_wwpn,
- &dev_attr_hba_id,
- NULL
+struct zfcp_data zfcp_data = {
+ .scsi_host_template = {
+ .name = "zfcp",
+ .module = THIS_MODULE,
+ .proc_name = "zfcp",
+ .slave_alloc = zfcp_scsi_slave_alloc,
+ .slave_configure = zfcp_scsi_slave_configure,
+ .slave_destroy = zfcp_scsi_slave_destroy,
+ .queuecommand = zfcp_scsi_queuecommand,
+ .eh_abort_handler = zfcp_scsi_eh_abort_handler,
+ .eh_device_reset_handler = zfcp_scsi_eh_device_reset_handler,
+ .eh_target_reset_handler = zfcp_scsi_eh_target_reset_handler,
+ .eh_host_reset_handler = zfcp_scsi_eh_host_reset_handler,
+ .can_queue = 4096,
+ .this_id = -1,
+ .sg_tablesize = ZFCP_MAX_SBALES_PER_REQ,
+ .cmd_per_lun = 1,
+ .use_clustering = 1,
+ .sdev_attrs = zfcp_sysfs_sdev_attrs,
+ .max_sectors = (ZFCP_MAX_SBALES_PER_REQ * 8),
+ .shost_attrs = zfcp_sysfs_shost_attrs,
+ },
};
-
-static ssize_t zfcp_sysfs_adapter_util_show(struct device *dev,
- struct device_attribute *attr,
- char *buf)
-{
- struct Scsi_Host *scsi_host = dev_to_shost(dev);
- struct fsf_qtcb_bottom_port *qtcb_port;
- int retval;
- struct zfcp_adapter *adapter;
-
- adapter = (struct zfcp_adapter *) scsi_host->hostdata[0];
- if (!(adapter->adapter_features & FSF_FEATURE_MEASUREMENT_DATA))
- return -EOPNOTSUPP;
-
- qtcb_port = kzalloc(sizeof(struct fsf_qtcb_bottom_port), GFP_KERNEL);
- if (!qtcb_port)
- return -ENOMEM;
-
- retval = zfcp_fsf_exchange_port_data_sync(adapter, qtcb_port);
- if (!retval)
- retval = sprintf(buf, "%u %u %u\n", qtcb_port->cp_util,
- qtcb_port->cb_util, qtcb_port->a_util);
- kfree(qtcb_port);
- return retval;
-}
-
-static int zfcp_sysfs_adapter_ex_config(struct device *dev,
- struct fsf_statistics_info *stat_inf)
-{
- int retval;
- struct fsf_qtcb_bottom_config *qtcb_config;
- struct Scsi_Host *scsi_host = dev_to_shost(dev);
- struct zfcp_adapter *adapter;
-
- adapter = (struct zfcp_adapter *) scsi_host->hostdata[0];
- if (!(adapter->adapter_features & FSF_FEATURE_MEASUREMENT_DATA))
- return -EOPNOTSUPP;
-
- qtcb_config = kzalloc(sizeof(struct fsf_qtcb_bottom_config),
- GFP_KERNEL);
- if (!qtcb_config)
- return -ENOMEM;
-
- retval = zfcp_fsf_exchange_config_data_sync(adapter, qtcb_config);
- if (!retval)
- *stat_inf = qtcb_config->stat_info;
-
- kfree(qtcb_config);
- return retval;
-}
-
-static ssize_t zfcp_sysfs_adapter_request_show(struct device *dev,
- struct device_attribute *attr,
- char *buf)
-{
- struct fsf_statistics_info stat_info;
- int retval;
-
- retval = zfcp_sysfs_adapter_ex_config(dev, &stat_info);
- if (retval)
- return retval;
-
- return sprintf(buf, "%llu %llu %llu\n",
- (unsigned long long) stat_info.input_req,
- (unsigned long long) stat_info.output_req,
- (unsigned long long) stat_info.control_req);
-}
-
-static ssize_t zfcp_sysfs_adapter_mb_show(struct device *dev,
- struct device_attribute *attr,
- char *buf)
-{
- struct fsf_statistics_info stat_info;
- int retval;
-
- retval = zfcp_sysfs_adapter_ex_config(dev, &stat_info);
- if (retval)
- return retval;
-
- return sprintf(buf, "%llu %llu\n",
- (unsigned long long) stat_info.input_mb,
- (unsigned long long) stat_info.output_mb);
-}
-
-static ssize_t zfcp_sysfs_adapter_sec_active_show(struct device *dev,
- struct device_attribute *attr,
- char *buf)
-{
- struct fsf_statistics_info stat_info;
- int retval;
-
- retval = zfcp_sysfs_adapter_ex_config(dev, &stat_info);
- if (retval)
- return retval;
-
- return sprintf(buf, "%llu\n",
- (unsigned long long) stat_info.seconds_act);
-}
-
-static DEVICE_ATTR(utilization, S_IRUGO, zfcp_sysfs_adapter_util_show, NULL);
-static DEVICE_ATTR(requests, S_IRUGO, zfcp_sysfs_adapter_request_show, NULL);
-static DEVICE_ATTR(megabytes, S_IRUGO, zfcp_sysfs_adapter_mb_show, NULL);
-static DEVICE_ATTR(seconds_active, S_IRUGO,
- zfcp_sysfs_adapter_sec_active_show, NULL);
-
-static struct device_attribute *zfcp_a_stats_attrs[] = {
- &dev_attr_utilization,
- &dev_attr_requests,
- &dev_attr_megabytes,
- &dev_attr_seconds_active,
- NULL
-};
-
-#undef ZFCP_LOG_AREA
diff --git a/drivers/s390/scsi/zfcp_sysfs.c b/drivers/s390/scsi/zfcp_sysfs.c
new file mode 100644
index 0000000..2e85c6c
--- /dev/null
+++ b/drivers/s390/scsi/zfcp_sysfs.c
@@ -0,0 +1,496 @@
+/*
+ * zfcp device driver
+ *
+ * sysfs attributes.
+ *
+ * Copyright IBM Corporation 2008
+ */
+
+#include "zfcp_ext.h"
+
+#define ZFCP_DEV_ATTR(_feat, _name, _mode, _show, _store) \
+struct device_attribute dev_attr_##_feat##_##_name = __ATTR(_name, _mode,\
+ _show, _store)
+#define ZFCP_DEFINE_ATTR(_feat_def, _feat, _name, _format, _value) \
+static ssize_t zfcp_sysfs_##_feat##_##_name##_show(struct device *dev, \
+ struct device_attribute *at,\
+ char *buf) \
+{ \
+ struct _feat_def *_feat = dev_get_drvdata(dev); \
+ \
+ return sprintf(buf, _format, _value); \
+} \
+static ZFCP_DEV_ATTR(_feat, _name, S_IRUGO, \
+ zfcp_sysfs_##_feat##_##_name##_show, NULL);
+
+ZFCP_DEFINE_ATTR(zfcp_adapter, adapter, status, "0x%08x\n",
+ atomic_read(&adapter->status));
+ZFCP_DEFINE_ATTR(zfcp_adapter, adapter, peer_wwnn, "0x%016llx\n",
+ adapter->peer_wwnn);
+ZFCP_DEFINE_ATTR(zfcp_adapter, adapter, peer_wwpn, "0x%016llx\n",
+ adapter->peer_wwpn);
+ZFCP_DEFINE_ATTR(zfcp_adapter, adapter, peer_d_id, "0x%06x\n",
+ adapter->peer_d_id);
+ZFCP_DEFINE_ATTR(zfcp_adapter, adapter, card_version, "0x%04x\n",
+ adapter->hydra_version);
+ZFCP_DEFINE_ATTR(zfcp_adapter, adapter, lic_version, "0x%08x\n",
+ adapter->fsf_lic_version);
+ZFCP_DEFINE_ATTR(zfcp_adapter, adapter, hardware_version, "0x%08x\n",
+ adapter->hardware_version);
+ZFCP_DEFINE_ATTR(zfcp_adapter, adapter, in_recovery, "%d\n",
+ (atomic_read(&adapter->status) &
+ ZFCP_STATUS_COMMON_ERP_INUSE) != 0);
+
+ZFCP_DEFINE_ATTR(zfcp_port, port, status, "0x%08x\n",
+ atomic_read(&port->status));
+ZFCP_DEFINE_ATTR(zfcp_port, port, in_recovery, "%d\n",
+ (atomic_read(&port->status) &
+ ZFCP_STATUS_COMMON_ERP_INUSE) != 0);
+ZFCP_DEFINE_ATTR(zfcp_port, port, access_denied, "%d\n",
+ (atomic_read(&port->status) &
+ ZFCP_STATUS_COMMON_ACCESS_DENIED) != 0);
+
+ZFCP_DEFINE_ATTR(zfcp_unit, unit, status, "0x%08x\n",
+ atomic_read(&unit->status));
+ZFCP_DEFINE_ATTR(zfcp_unit, unit, in_recovery, "%d\n",
+ (atomic_read(&unit->status) &
+ ZFCP_STATUS_COMMON_ERP_INUSE) != 0);
+ZFCP_DEFINE_ATTR(zfcp_unit, unit, access_denied, "%d\n",
+ (atomic_read(&unit->status) &
+ ZFCP_STATUS_COMMON_ACCESS_DENIED) != 0);
+ZFCP_DEFINE_ATTR(zfcp_unit, unit, access_shared, "%d\n",
+ (atomic_read(&unit->status) &
+ ZFCP_STATUS_UNIT_SHARED) != 0);
+ZFCP_DEFINE_ATTR(zfcp_unit, unit, access_readonly, "%d\n",
+ (atomic_read(&unit->status) &
+ ZFCP_STATUS_UNIT_READONLY) != 0);
+
+#define ZFCP_SYSFS_FAILED(_feat_def, _feat, _adapter, _mod_id, _reopen_id) \
+static ssize_t zfcp_sysfs_##_feat##_failed_show(struct device *dev, \
+ struct device_attribute *attr, \
+ char *buf) \
+{ \
+ struct _feat_def *_feat = dev_get_drvdata(dev); \
+ \
+ if (atomic_read(&_feat->status) & ZFCP_STATUS_COMMON_ERP_FAILED) \
+ return sprintf(buf, "1\n"); \
+ else \
+ return sprintf(buf, "0\n"); \
+} \
+static ssize_t zfcp_sysfs_##_feat##_failed_store(struct device *dev, \
+ struct device_attribute *attr,\
+ const char *buf, size_t count)\
+{ \
+ struct _feat_def *_feat = dev_get_drvdata(dev); \
+ unsigned long val; \
+ int retval = 0; \
+ \
+ down(&zfcp_data.config_sema); \
+ if (atomic_read(&_feat->status) & ZFCP_STATUS_COMMON_REMOVE) { \
+ retval = -EBUSY; \
+ goto out; \
+ } \
+ \
+ if (strict_strtoul(buf, 0, &val) || val != 0) { \
+ retval = -EINVAL; \
+ goto out; \
+ } \
+ \
+ zfcp_erp_modify_##_feat##_status(_feat, _mod_id, NULL, \
+ ZFCP_STATUS_COMMON_RUNNING, ZFCP_SET);\
+ zfcp_erp_##_feat##_reopen(_feat, ZFCP_STATUS_COMMON_ERP_FAILED, \
+ _reopen_id, NULL); \
+ zfcp_erp_wait(_adapter); \
+out: \
+ up(&zfcp_data.config_sema); \
+ return retval ? retval : (ssize_t) count; \
+} \
+static ZFCP_DEV_ATTR(_feat, failed, S_IWUSR | S_IRUGO, \
+ zfcp_sysfs_##_feat##_failed_show, \
+ zfcp_sysfs_##_feat##_failed_store);
+
+ZFCP_SYSFS_FAILED(zfcp_adapter, adapter, adapter, 44, 93);
+ZFCP_SYSFS_FAILED(zfcp_port, port, port->adapter, 45, 96);
+ZFCP_SYSFS_FAILED(zfcp_unit, unit, unit->port->adapter, 46, 97);
+
+static ssize_t zfcp_sysfs_port_rescan_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct zfcp_adapter *adapter = dev_get_drvdata(dev);
+ int ret;
+
+ if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_REMOVE)
+ return -EBUSY;
+
+ ret = zfcp_scan_ports(adapter);
+ return ret ? ret : (ssize_t) count;
+}
+static ZFCP_DEV_ATTR(adapter, port_rescan, S_IWUSR, NULL,
+ zfcp_sysfs_port_rescan_store);
+
+static ssize_t zfcp_sysfs_port_remove_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct zfcp_adapter *adapter = dev_get_drvdata(dev);
+ struct zfcp_port *port;
+ wwn_t wwpn;
+ int retval = 0;
+
+ down(&zfcp_data.config_sema);
+ if (atomic_read(&adapter->status) & ZFCP_STATUS_COMMON_REMOVE) {
+ retval = -EBUSY;
+ goto out;
+ }
+
+ if (strict_strtoull(buf, 0, &wwpn)) {
+ retval = -EINVAL;
+ goto out;
+ }
+
+ write_lock_irq(&zfcp_data.config_lock);
+ port = zfcp_get_port_by_wwpn(adapter, wwpn);
+ if (port && (atomic_read(&port->refcount) == 0)) {
+ zfcp_port_get(port);
+ atomic_set_mask(ZFCP_STATUS_COMMON_REMOVE, &port->status);
+ list_move(&port->list, &adapter->port_remove_lh);
+ } else
+ port = NULL;
+ write_unlock_irq(&zfcp_data.config_lock);
+
+ if (!port) {
+ retval = -ENXIO;
+ goto out;
+ }
+
+ zfcp_erp_port_shutdown(port, 0, 92, NULL);
+ zfcp_erp_wait(adapter);
+ zfcp_port_put(port);
+ zfcp_port_dequeue(port);
+ out:
+ up(&zfcp_data.config_sema);
+ return retval ? retval : (ssize_t) count;
+}
+static ZFCP_DEV_ATTR(adapter, port_remove, S_IWUSR, NULL,
+ zfcp_sysfs_port_remove_store);
+
+static struct attribute *zfcp_adapter_attrs[] = {
+ &dev_attr_adapter_failed.attr,
+ &dev_attr_adapter_in_recovery.attr,
+ &dev_attr_adapter_port_remove.attr,
+ &dev_attr_adapter_port_rescan.attr,
+ &dev_attr_adapter_peer_wwnn.attr,
+ &dev_attr_adapter_peer_wwpn.attr,
+ &dev_attr_adapter_peer_d_id.attr,
+ &dev_attr_adapter_card_version.attr,
+ &dev_attr_adapter_lic_version.attr,
+ &dev_attr_adapter_status.attr,
+ &dev_attr_adapter_hardware_version.attr,
+ NULL
+};
+
+struct attribute_group zfcp_sysfs_adapter_attrs = {
+ .attrs = zfcp_adapter_attrs,
+};
+
+static ssize_t zfcp_sysfs_unit_add_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct zfcp_port *port = dev_get_drvdata(dev);
+ struct zfcp_unit *unit;
+ fcp_lun_t fcp_lun;
+ int retval = -EINVAL;
+
+ down(&zfcp_data.config_sema);
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_REMOVE) {
+ retval = -EBUSY;
+ goto out;
+ }
+
+ if (strict_strtoull(buf, 0, &fcp_lun))
+ goto out;
+
+ unit = zfcp_unit_enqueue(port, fcp_lun);
+ if (IS_ERR(unit))
+ goto out;
+
+ retval = 0;
+
+ zfcp_erp_unit_reopen(unit, 0, 94, NULL);
+ zfcp_erp_wait(unit->port->adapter);
+ zfcp_unit_put(unit);
+out:
+ up(&zfcp_data.config_sema);
+ return retval ? retval : (ssize_t) count;
+}
+static DEVICE_ATTR(unit_add, S_IWUSR, NULL, zfcp_sysfs_unit_add_store);
+
+static ssize_t zfcp_sysfs_unit_remove_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct zfcp_port *port = dev_get_drvdata(dev);
+ struct zfcp_unit *unit;
+ fcp_lun_t fcp_lun;
+ int retval = 0;
+
+ down(&zfcp_data.config_sema);
+ if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_REMOVE) {
+ retval = -EBUSY;
+ goto out;
+ }
+
+ if (strict_strtoull(buf, 0, &fcp_lun)) {
+ retval = -EINVAL;
+ goto out;
+ }
+
+ write_lock_irq(&zfcp_data.config_lock);
+ unit = zfcp_get_unit_by_lun(port, fcp_lun);
+ if (unit && (atomic_read(&unit->refcount) == 0)) {
+ zfcp_unit_get(unit);
+ atomic_set_mask(ZFCP_STATUS_COMMON_REMOVE, &unit->status);
+ list_move(&unit->list, &port->unit_remove_lh);
+ } else
+ unit = NULL;
+
+ write_unlock_irq(&zfcp_data.config_lock);
+
+ if (!unit) {
+ retval = -ENXIO;
+ goto out;
+ }
+
+ zfcp_erp_unit_shutdown(unit, 0, 95, NULL);
+ zfcp_erp_wait(unit->port->adapter);
+ zfcp_unit_put(unit);
+ zfcp_unit_dequeue(unit);
+out:
+ up(&zfcp_data.config_sema);
+ return retval ? retval : (ssize_t) count;
+}
+static DEVICE_ATTR(unit_remove, S_IWUSR, NULL, zfcp_sysfs_unit_remove_store);
+
+static struct attribute *zfcp_port_ns_attrs[] = {
+ &dev_attr_port_failed.attr,
+ &dev_attr_port_in_recovery.attr,
+ &dev_attr_port_status.attr,
+ &dev_attr_port_access_denied.attr,
+ NULL
+};
+
+/**
+ * zfcp_sysfs_ns_port_attrs - sysfs attributes for nameserver
+ */
+struct attribute_group zfcp_sysfs_ns_port_attrs = {
+ .attrs = zfcp_port_ns_attrs,
+};
+
+static struct attribute *zfcp_port_no_ns_attrs[] = {
+ &dev_attr_unit_add.attr,
+ &dev_attr_unit_remove.attr,
+ &dev_attr_port_failed.attr,
+ &dev_attr_port_in_recovery.attr,
+ &dev_attr_port_status.attr,
+ &dev_attr_port_access_denied.attr,
+ NULL
+};
+
+/**
+ * zfcp_sysfs_port_attrs - sysfs attributes for all other ports
+ */
+struct attribute_group zfcp_sysfs_port_attrs = {
+ .attrs = zfcp_port_no_ns_attrs,
+};
+
+static struct attribute *zfcp_unit_attrs[] = {
+ &dev_attr_unit_failed.attr,
+ &dev_attr_unit_in_recovery.attr,
+ &dev_attr_unit_status.attr,
+ &dev_attr_unit_access_denied.attr,
+ &dev_attr_unit_access_shared.attr,
+ &dev_attr_unit_access_readonly.attr,
+ NULL
+};
+
+struct attribute_group zfcp_sysfs_unit_attrs = {
+ .attrs = zfcp_unit_attrs,
+};
+
+#define ZFCP_DEFINE_LATENCY_ATTR(_name) \
+static ssize_t \
+zfcp_sysfs_unit_##_name##_latency_show(struct device *dev, \
+ struct device_attribute *attr, \
+ char *buf) { \
+ struct scsi_device *sdev = to_scsi_device(dev); \
+ struct zfcp_unit *unit = sdev->hostdata; \
+ struct zfcp_latencies *lat = &unit->latencies; \
+ struct zfcp_adapter *adapter = unit->port->adapter; \
+ unsigned long flags; \
+ unsigned long long fsum, fmin, fmax, csum, cmin, cmax, cc; \
+ \
+ spin_lock_irqsave(&lat->lock, flags); \
+ fsum = lat->_name.fabric.sum * adapter->timer_ticks; \
+ fmin = lat->_name.fabric.min * adapter->timer_ticks; \
+ fmax = lat->_name.fabric.max * adapter->timer_ticks; \
+ csum = lat->_name.channel.sum * adapter->timer_ticks; \
+ cmin = lat->_name.channel.min * adapter->timer_ticks; \
+ cmax = lat->_name.channel.max * adapter->timer_ticks; \
+ cc = lat->_name.counter; \
+ spin_unlock_irqrestore(&lat->lock, flags); \
+ \
+ do_div(fsum, 1000); \
+ do_div(fmin, 1000); \
+ do_div(fmax, 1000); \
+ do_div(csum, 1000); \
+ do_div(cmin, 1000); \
+ do_div(cmax, 1000); \
+ \
+ return sprintf(buf, "%llu %llu %llu %llu %llu %llu %llu\n", \
+ fmin, fmax, fsum, cmin, cmax, csum, cc); \
+} \
+static ssize_t \
+zfcp_sysfs_unit_##_name##_latency_store(struct device *dev, \
+ struct device_attribute *attr, \
+ const char *buf, size_t count) \
+{ \
+ struct scsi_device *sdev = to_scsi_device(dev); \
+ struct zfcp_unit *unit = sdev->hostdata; \
+ struct zfcp_latencies *lat = &unit->latencies; \
+ unsigned long flags; \
+ \
+ spin_lock_irqsave(&lat->lock, flags); \
+ lat->_name.fabric.sum = 0; \
+ lat->_name.fabric.min = 0xFFFFFFFF; \
+ lat->_name.fabric.max = 0; \
+ lat->_name.channel.sum = 0; \
+ lat->_name.channel.min = 0xFFFFFFFF; \
+ lat->_name.channel.max = 0; \
+ lat->_name.counter = 0; \
+ spin_unlock_irqrestore(&lat->lock, flags); \
+ \
+ return (ssize_t) count; \
+} \
+static DEVICE_ATTR(_name##_latency, S_IWUSR | S_IRUGO, \
+ zfcp_sysfs_unit_##_name##_latency_show, \
+ zfcp_sysfs_unit_##_name##_latency_store);
+
+ZFCP_DEFINE_LATENCY_ATTR(read);
+ZFCP_DEFINE_LATENCY_ATTR(write);
+ZFCP_DEFINE_LATENCY_ATTR(cmd);
+
+#define ZFCP_DEFINE_SCSI_ATTR(_name, _format, _value) \
+static ssize_t zfcp_sysfs_scsi_##_name##_show(struct device *dev, \
+ struct device_attribute *attr,\
+ char *buf) \
+{ \
+ struct scsi_device *sdev = to_scsi_device(dev); \
+ struct zfcp_unit *unit = sdev->hostdata; \
+ \
+ return sprintf(buf, _format, _value); \
+} \
+static DEVICE_ATTR(_name, S_IRUGO, zfcp_sysfs_scsi_##_name##_show, NULL);
+
+ZFCP_DEFINE_SCSI_ATTR(hba_id, "%s\n",
+ unit->port->adapter->ccw_device->dev.bus_id);
+ZFCP_DEFINE_SCSI_ATTR(wwpn, "0x%016llx\n", unit->port->wwpn);
+ZFCP_DEFINE_SCSI_ATTR(fcp_lun, "0x%016llx\n", unit->fcp_lun);
+
+struct device_attribute *zfcp_sysfs_sdev_attrs[] = {
+ &dev_attr_fcp_lun,
+ &dev_attr_wwpn,
+ &dev_attr_hba_id,
+ &dev_attr_read_latency,
+ &dev_attr_write_latency,
+ &dev_attr_cmd_latency,
+ NULL
+};
+
+static ssize_t zfcp_sysfs_adapter_util_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct Scsi_Host *scsi_host = dev_to_shost(dev);
+ struct fsf_qtcb_bottom_port *qtcb_port;
+ struct zfcp_adapter *adapter;
+ int retval;
+
+ adapter = (struct zfcp_adapter *) scsi_host->hostdata[0];
+ if (!(adapter->adapter_features & FSF_FEATURE_MEASUREMENT_DATA))
+ return -EOPNOTSUPP;
+
+ qtcb_port = kzalloc(sizeof(struct fsf_qtcb_bottom_port), GFP_KERNEL);
+ if (!qtcb_port)
+ return -ENOMEM;
+
+ retval = zfcp_fsf_exchange_port_data_sync(adapter, qtcb_port);
+ if (!retval)
+ retval = sprintf(buf, "%u %u %u\n", qtcb_port->cp_util,
+ qtcb_port->cb_util, qtcb_port->a_util);
+ kfree(qtcb_port);
+ return retval;
+}
+static DEVICE_ATTR(utilization, S_IRUGO, zfcp_sysfs_adapter_util_show, NULL);
+
+static int zfcp_sysfs_adapter_ex_config(struct device *dev,
+ struct fsf_statistics_info *stat_inf)
+{
+ struct Scsi_Host *scsi_host = dev_to_shost(dev);
+ struct fsf_qtcb_bottom_config *qtcb_config;
+ struct zfcp_adapter *adapter;
+ int retval;
+
+ adapter = (struct zfcp_adapter *) scsi_host->hostdata[0];
+ if (!(adapter->adapter_features & FSF_FEATURE_MEASUREMENT_DATA))
+ return -EOPNOTSUPP;
+
+ qtcb_config = kzalloc(sizeof(struct fsf_qtcb_bottom_config),
+ GFP_KERNEL);
+ if (!qtcb_config)
+ return -ENOMEM;
+
+ retval = zfcp_fsf_exchange_config_data_sync(adapter, qtcb_config);
+ if (!retval)
+ *stat_inf = qtcb_config->stat_info;
+
+ kfree(qtcb_config);
+ return retval;
+}
+
+#define ZFCP_SHOST_ATTR(_name, _format, _arg...) \
+static ssize_t zfcp_sysfs_adapter_##_name##_show(struct device *dev, \
+ struct device_attribute *attr,\
+ char *buf) \
+{ \
+ struct fsf_statistics_info stat_info; \
+ int retval; \
+ \
+ retval = zfcp_sysfs_adapter_ex_config(dev, &stat_info); \
+ if (retval) \
+ return retval; \
+ \
+ return sprintf(buf, _format, ## _arg); \
+} \
+static DEVICE_ATTR(_name, S_IRUGO, zfcp_sysfs_adapter_##_name##_show, NULL);
+
+ZFCP_SHOST_ATTR(requests, "%llu %llu %llu\n",
+ (unsigned long long) stat_info.input_req,
+ (unsigned long long) stat_info.output_req,
+ (unsigned long long) stat_info.control_req);
+
+ZFCP_SHOST_ATTR(megabytes, "%llu %llu\n",
+ (unsigned long long) stat_info.input_mb,
+ (unsigned long long) stat_info.output_mb);
+
+ZFCP_SHOST_ATTR(seconds_active, "%llu\n",
+ (unsigned long long) stat_info.seconds_act);
+
+struct device_attribute *zfcp_sysfs_shost_attrs[] = {
+ &dev_attr_utilization,
+ &dev_attr_requests,
+ &dev_attr_megabytes,
+ &dev_attr_seconds_active,
+ NULL
+};
diff --git a/drivers/s390/scsi/zfcp_sysfs_adapter.c b/drivers/s390/scsi/zfcp_sysfs_adapter.c
deleted file mode 100644
index ccbba4d..0000000
--- a/drivers/s390/scsi/zfcp_sysfs_adapter.c
+++ /dev/null
@@ -1,270 +0,0 @@
-/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
- *
- * (C) Copyright IBM Corp. 2002, 2006
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "zfcp_ext.h"
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_CONFIG
-
-/**
- * ZFCP_DEFINE_ADAPTER_ATTR
- * @_name: name of show attribute
- * @_format: format string
- * @_value: value to print
- *
- * Generates attributes for an adapter.
- */
-#define ZFCP_DEFINE_ADAPTER_ATTR(_name, _format, _value) \
-static ssize_t zfcp_sysfs_adapter_##_name##_show(struct device *dev, struct device_attribute *attr, \
- char *buf) \
-{ \
- struct zfcp_adapter *adapter; \
- \
- adapter = dev_get_drvdata(dev); \
- return sprintf(buf, _format, _value); \
-} \
- \
-static DEVICE_ATTR(_name, S_IRUGO, zfcp_sysfs_adapter_##_name##_show, NULL);
-
-ZFCP_DEFINE_ADAPTER_ATTR(status, "0x%08x\n", atomic_read(&adapter->status));
-ZFCP_DEFINE_ADAPTER_ATTR(peer_wwnn, "0x%016llx\n", adapter->peer_wwnn);
-ZFCP_DEFINE_ADAPTER_ATTR(peer_wwpn, "0x%016llx\n", adapter->peer_wwpn);
-ZFCP_DEFINE_ADAPTER_ATTR(peer_d_id, "0x%06x\n", adapter->peer_d_id);
-ZFCP_DEFINE_ADAPTER_ATTR(card_version, "0x%04x\n", adapter->hydra_version);
-ZFCP_DEFINE_ADAPTER_ATTR(lic_version, "0x%08x\n", adapter->fsf_lic_version);
-ZFCP_DEFINE_ADAPTER_ATTR(hardware_version, "0x%08x\n",
- adapter->hardware_version);
-ZFCP_DEFINE_ADAPTER_ATTR(in_recovery, "%d\n", atomic_test_mask
- (ZFCP_STATUS_COMMON_ERP_INUSE, &adapter->status));
-
-/**
- * zfcp_sysfs_port_add_store - add a port to sysfs tree
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- * @count: number of bytes in buffer
- *
- * Store function of the "port_add" attribute of an adapter.
- */
-static ssize_t
-zfcp_sysfs_port_add_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
-{
- wwn_t wwpn;
- char *endp;
- struct zfcp_adapter *adapter;
- struct zfcp_port *port;
- int retval = -EINVAL;
-
- down(&zfcp_data.config_sema);
-
- adapter = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &adapter->status)) {
- retval = -EBUSY;
- goto out;
- }
-
- wwpn = simple_strtoull(buf, &endp, 0);
- if ((endp + 1) < (buf + count))
- goto out;
-
- port = zfcp_port_enqueue(adapter, wwpn, 0, 0);
- if (!port)
- goto out;
-
- retval = 0;
-
- zfcp_erp_port_reopen(port, 0, 91, NULL);
- zfcp_erp_wait(port->adapter);
- zfcp_port_put(port);
- out:
- up(&zfcp_data.config_sema);
- return retval ? retval : (ssize_t) count;
-}
-
-static DEVICE_ATTR(port_add, S_IWUSR, NULL, zfcp_sysfs_port_add_store);
-
-/**
- * zfcp_sysfs_port_remove_store - remove a port from sysfs tree
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- * @count: number of bytes in buffer
- *
- * Store function of the "port_remove" attribute of an adapter.
- */
-static ssize_t
-zfcp_sysfs_port_remove_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
-{
- struct zfcp_adapter *adapter;
- struct zfcp_port *port;
- wwn_t wwpn;
- char *endp;
- int retval = 0;
-
- down(&zfcp_data.config_sema);
-
- adapter = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &adapter->status)) {
- retval = -EBUSY;
- goto out;
- }
-
- wwpn = simple_strtoull(buf, &endp, 0);
- if ((endp + 1) < (buf + count)) {
- retval = -EINVAL;
- goto out;
- }
-
- write_lock_irq(&zfcp_data.config_lock);
- port = zfcp_get_port_by_wwpn(adapter, wwpn);
- if (port && (atomic_read(&port->refcount) == 0)) {
- zfcp_port_get(port);
- atomic_set_mask(ZFCP_STATUS_COMMON_REMOVE, &port->status);
- list_move(&port->list, &adapter->port_remove_lh);
- }
- else {
- port = NULL;
- }
- write_unlock_irq(&zfcp_data.config_lock);
-
- if (!port) {
- retval = -ENXIO;
- goto out;
- }
-
- zfcp_erp_port_shutdown(port, 0, 92, NULL);
- zfcp_erp_wait(adapter);
- zfcp_port_put(port);
- zfcp_port_dequeue(port);
- out:
- up(&zfcp_data.config_sema);
- return retval ? retval : (ssize_t) count;
-}
-
-static DEVICE_ATTR(port_remove, S_IWUSR, NULL, zfcp_sysfs_port_remove_store);
-
-/**
- * zfcp_sysfs_adapter_failed_store - failed state of adapter
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- * @count: number of bytes in buffer
- *
- * Store function of the "failed" attribute of an adapter.
- * If a "0" gets written to "failed", error recovery will be
- * started for the belonging adapter.
- */
-static ssize_t
-zfcp_sysfs_adapter_failed_store(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
-{
- struct zfcp_adapter *adapter;
- unsigned int val;
- char *endp;
- int retval = 0;
-
- down(&zfcp_data.config_sema);
-
- adapter = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &adapter->status)) {
- retval = -EBUSY;
- goto out;
- }
-
- val = simple_strtoul(buf, &endp, 0);
- if (((endp + 1) < (buf + count)) || (val != 0)) {
- retval = -EINVAL;
- goto out;
- }
-
- zfcp_erp_modify_adapter_status(adapter, 44, NULL,
- ZFCP_STATUS_COMMON_RUNNING, ZFCP_SET);
- zfcp_erp_adapter_reopen(adapter, ZFCP_STATUS_COMMON_ERP_FAILED, 93,
- NULL);
- zfcp_erp_wait(adapter);
- out:
- up(&zfcp_data.config_sema);
- return retval ? retval : (ssize_t) count;
-}
-
-/**
- * zfcp_sysfs_adapter_failed_show - failed state of adapter
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- *
- * Show function of "failed" attribute of adapter. Will be
- * "0" if adapter is working, otherwise "1".
- */
-static ssize_t
-zfcp_sysfs_adapter_failed_show(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct zfcp_adapter *adapter;
-
- adapter = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &adapter->status))
- return sprintf(buf, "1\n");
- else
- return sprintf(buf, "0\n");
-}
-
-static DEVICE_ATTR(failed, S_IWUSR | S_IRUGO, zfcp_sysfs_adapter_failed_show,
- zfcp_sysfs_adapter_failed_store);
-
-static struct attribute *zfcp_adapter_attrs[] = {
- &dev_attr_failed.attr,
- &dev_attr_in_recovery.attr,
- &dev_attr_port_remove.attr,
- &dev_attr_port_add.attr,
- &dev_attr_peer_wwnn.attr,
- &dev_attr_peer_wwpn.attr,
- &dev_attr_peer_d_id.attr,
- &dev_attr_card_version.attr,
- &dev_attr_lic_version.attr,
- &dev_attr_status.attr,
- &dev_attr_hardware_version.attr,
- NULL
-};
-
-static struct attribute_group zfcp_adapter_attr_group = {
- .attrs = zfcp_adapter_attrs,
-};
-
-/**
- * zfcp_sysfs_create_adapter_files - create sysfs adapter files
- * @dev: pointer to belonging device
- *
- * Create all attributes of the sysfs representation of an adapter.
- */
-int
-zfcp_sysfs_adapter_create_files(struct device *dev)
-{
- return sysfs_create_group(&dev->kobj, &zfcp_adapter_attr_group);
-}
-
-/**
- * zfcp_sysfs_remove_adapter_files - remove sysfs adapter files
- * @dev: pointer to belonging device
- *
- * Remove all attributes of the sysfs representation of an adapter.
- */
-void
-zfcp_sysfs_adapter_remove_files(struct device *dev)
-{
- sysfs_remove_group(&dev->kobj, &zfcp_adapter_attr_group);
-}
-
-#undef ZFCP_LOG_AREA
diff --git a/drivers/s390/scsi/zfcp_sysfs_driver.c b/drivers/s390/scsi/zfcp_sysfs_driver.c
deleted file mode 100644
index 651edd5..0000000
--- a/drivers/s390/scsi/zfcp_sysfs_driver.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
- *
- * (C) Copyright IBM Corp. 2002, 2006
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "zfcp_ext.h"
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_CONFIG
-
-/**
- * ZFCP_DEFINE_DRIVER_ATTR - define for all loglevels sysfs attributes
- * @_name: name of attribute
- * @_define: name of ZFCP loglevel define
- *
- * Generates store function for a sysfs loglevel attribute of zfcp driver.
- */
-#define ZFCP_DEFINE_DRIVER_ATTR(_name, _define) \
-static ssize_t zfcp_sysfs_loglevel_##_name##_store(struct device_driver *drv, \
- const char *buf, \
- size_t count) \
-{ \
- unsigned int loglevel; \
- unsigned int new_loglevel; \
- char *endp; \
- \
- new_loglevel = simple_strtoul(buf, &endp, 0); \
- if ((endp + 1) < (buf + count)) \
- return -EINVAL; \
- if (new_loglevel > 3) \
- return -EINVAL; \
- down(&zfcp_data.config_sema); \
- loglevel = atomic_read(&zfcp_data.loglevel); \
- loglevel &= ~((unsigned int) 0xf << (ZFCP_LOG_AREA_##_define << 2)); \
- loglevel |= new_loglevel << (ZFCP_LOG_AREA_##_define << 2); \
- atomic_set(&zfcp_data.loglevel, loglevel); \
- up(&zfcp_data.config_sema); \
- return count; \
-} \
- \
-static ssize_t zfcp_sysfs_loglevel_##_name##_show(struct device_driver *dev, \
- char *buf) \
-{ \
- return sprintf(buf,"%d\n", (unsigned int) \
- ZFCP_GET_LOG_VALUE(ZFCP_LOG_AREA_##_define)); \
-} \
- \
-static DRIVER_ATTR(loglevel_##_name, S_IWUSR | S_IRUGO, \
- zfcp_sysfs_loglevel_##_name##_show, \
- zfcp_sysfs_loglevel_##_name##_store);
-
-ZFCP_DEFINE_DRIVER_ATTR(other, OTHER);
-ZFCP_DEFINE_DRIVER_ATTR(scsi, SCSI);
-ZFCP_DEFINE_DRIVER_ATTR(fsf, FSF);
-ZFCP_DEFINE_DRIVER_ATTR(config, CONFIG);
-ZFCP_DEFINE_DRIVER_ATTR(cio, CIO);
-ZFCP_DEFINE_DRIVER_ATTR(qdio, QDIO);
-ZFCP_DEFINE_DRIVER_ATTR(erp, ERP);
-ZFCP_DEFINE_DRIVER_ATTR(fc, FC);
-
-static ssize_t zfcp_sysfs_version_show(struct device_driver *dev,
- char *buf)
-{
- return sprintf(buf, "%s\n", zfcp_data.driver_version);
-}
-
-static DRIVER_ATTR(version, S_IRUGO, zfcp_sysfs_version_show, NULL);
-
-static struct attribute *zfcp_driver_attrs[] = {
- &driver_attr_loglevel_other.attr,
- &driver_attr_loglevel_scsi.attr,
- &driver_attr_loglevel_fsf.attr,
- &driver_attr_loglevel_config.attr,
- &driver_attr_loglevel_cio.attr,
- &driver_attr_loglevel_qdio.attr,
- &driver_attr_loglevel_erp.attr,
- &driver_attr_loglevel_fc.attr,
- &driver_attr_version.attr,
- NULL
-};
-
-static struct attribute_group zfcp_driver_attr_group = {
- .attrs = zfcp_driver_attrs,
-};
-
-struct attribute_group *zfcp_driver_attr_groups[] = {
- &zfcp_driver_attr_group,
- NULL,
-};
-
-#undef ZFCP_LOG_AREA
diff --git a/drivers/s390/scsi/zfcp_sysfs_port.c b/drivers/s390/scsi/zfcp_sysfs_port.c
deleted file mode 100644
index 703c1b5..0000000
--- a/drivers/s390/scsi/zfcp_sysfs_port.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
- *
- * (C) Copyright IBM Corp. 2002, 2006
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "zfcp_ext.h"
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_CONFIG
-
-/**
- * zfcp_sysfs_port_release - gets called when a struct device port is released
- * @dev: pointer to belonging device
- */
-void
-zfcp_sysfs_port_release(struct device *dev)
-{
- kfree(dev);
-}
-
-/**
- * ZFCP_DEFINE_PORT_ATTR
- * @_name: name of show attribute
- * @_format: format string
- * @_value: value to print
- *
- * Generates attributes for a port.
- */
-#define ZFCP_DEFINE_PORT_ATTR(_name, _format, _value) \
-static ssize_t zfcp_sysfs_port_##_name##_show(struct device *dev, struct device_attribute *attr, \
- char *buf) \
-{ \
- struct zfcp_port *port; \
- \
- port = dev_get_drvdata(dev); \
- return sprintf(buf, _format, _value); \
-} \
- \
-static DEVICE_ATTR(_name, S_IRUGO, zfcp_sysfs_port_##_name##_show, NULL);
-
-ZFCP_DEFINE_PORT_ATTR(status, "0x%08x\n", atomic_read(&port->status));
-ZFCP_DEFINE_PORT_ATTR(in_recovery, "%d\n", atomic_test_mask
- (ZFCP_STATUS_COMMON_ERP_INUSE, &port->status));
-ZFCP_DEFINE_PORT_ATTR(access_denied, "%d\n", atomic_test_mask
- (ZFCP_STATUS_COMMON_ACCESS_DENIED, &port->status));
-
-/**
- * zfcp_sysfs_unit_add_store - add a unit to sysfs tree
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- * @count: number of bytes in buffer
- *
- * Store function of the "unit_add" attribute of a port.
- */
-static ssize_t
-zfcp_sysfs_unit_add_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
-{
- fcp_lun_t fcp_lun;
- char *endp;
- struct zfcp_port *port;
- struct zfcp_unit *unit;
- int retval = -EINVAL;
-
- down(&zfcp_data.config_sema);
-
- port = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &port->status)) {
- retval = -EBUSY;
- goto out;
- }
-
- fcp_lun = simple_strtoull(buf, &endp, 0);
- if ((endp + 1) < (buf + count))
- goto out;
-
- unit = zfcp_unit_enqueue(port, fcp_lun);
- if (!unit)
- goto out;
-
- retval = 0;
-
- zfcp_erp_unit_reopen(unit, 0, 94, NULL);
- zfcp_erp_wait(unit->port->adapter);
- zfcp_unit_put(unit);
- out:
- up(&zfcp_data.config_sema);
- return retval ? retval : (ssize_t) count;
-}
-
-static DEVICE_ATTR(unit_add, S_IWUSR, NULL, zfcp_sysfs_unit_add_store);
-
-/**
- * zfcp_sysfs_unit_remove_store - remove a unit from sysfs tree
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- * @count: number of bytes in buffer
- */
-static ssize_t
-zfcp_sysfs_unit_remove_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
-{
- struct zfcp_port *port;
- struct zfcp_unit *unit;
- fcp_lun_t fcp_lun;
- char *endp;
- int retval = 0;
-
- down(&zfcp_data.config_sema);
-
- port = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &port->status)) {
- retval = -EBUSY;
- goto out;
- }
-
- fcp_lun = simple_strtoull(buf, &endp, 0);
- if ((endp + 1) < (buf + count)) {
- retval = -EINVAL;
- goto out;
- }
-
- write_lock_irq(&zfcp_data.config_lock);
- unit = zfcp_get_unit_by_lun(port, fcp_lun);
- if (unit && (atomic_read(&unit->refcount) == 0)) {
- zfcp_unit_get(unit);
- atomic_set_mask(ZFCP_STATUS_COMMON_REMOVE, &unit->status);
- list_move(&unit->list, &port->unit_remove_lh);
- }
- else {
- unit = NULL;
- }
- write_unlock_irq(&zfcp_data.config_lock);
-
- if (!unit) {
- retval = -ENXIO;
- goto out;
- }
-
- zfcp_erp_unit_shutdown(unit, 0, 95, NULL);
- zfcp_erp_wait(unit->port->adapter);
- zfcp_unit_put(unit);
- zfcp_unit_dequeue(unit);
- out:
- up(&zfcp_data.config_sema);
- return retval ? retval : (ssize_t) count;
-}
-
-static DEVICE_ATTR(unit_remove, S_IWUSR, NULL, zfcp_sysfs_unit_remove_store);
-
-/**
- * zfcp_sysfs_port_failed_store - failed state of port
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- * @count: number of bytes in buffer
- *
- * Store function of the "failed" attribute of a port.
- * If a "0" gets written to "failed", error recovery will be
- * started for the belonging port.
- */
-static ssize_t
-zfcp_sysfs_port_failed_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
-{
- struct zfcp_port *port;
- unsigned int val;
- char *endp;
- int retval = 0;
-
- down(&zfcp_data.config_sema);
-
- port = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &port->status)) {
- retval = -EBUSY;
- goto out;
- }
-
- val = simple_strtoul(buf, &endp, 0);
- if (((endp + 1) < (buf + count)) || (val != 0)) {
- retval = -EINVAL;
- goto out;
- }
-
- zfcp_erp_modify_port_status(port, 45, NULL,
- ZFCP_STATUS_COMMON_RUNNING, ZFCP_SET);
- zfcp_erp_port_reopen(port, ZFCP_STATUS_COMMON_ERP_FAILED, 96, NULL);
- zfcp_erp_wait(port->adapter);
- out:
- up(&zfcp_data.config_sema);
- return retval ? retval : (ssize_t) count;
-}
-
-/**
- * zfcp_sysfs_port_failed_show - failed state of port
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- *
- * Show function of "failed" attribute of port. Will be
- * "0" if port is working, otherwise "1".
- */
-static ssize_t
-zfcp_sysfs_port_failed_show(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct zfcp_port *port;
-
- port = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &port->status))
- return sprintf(buf, "1\n");
- else
- return sprintf(buf, "0\n");
-}
-
-static DEVICE_ATTR(failed, S_IWUSR | S_IRUGO, zfcp_sysfs_port_failed_show,
- zfcp_sysfs_port_failed_store);
-
-/**
- * zfcp_port_common_attrs
- * sysfs attributes that are common for all kind of fc ports.
- */
-static struct attribute *zfcp_port_common_attrs[] = {
- &dev_attr_failed.attr,
- &dev_attr_in_recovery.attr,
- &dev_attr_status.attr,
- &dev_attr_access_denied.attr,
- NULL
-};
-
-static struct attribute_group zfcp_port_common_attr_group = {
- .attrs = zfcp_port_common_attrs,
-};
-
-/**
- * zfcp_port_no_ns_attrs
- * sysfs attributes not to be used for nameserver ports.
- */
-static struct attribute *zfcp_port_no_ns_attrs[] = {
- &dev_attr_unit_add.attr,
- &dev_attr_unit_remove.attr,
- NULL
-};
-
-static struct attribute_group zfcp_port_no_ns_attr_group = {
- .attrs = zfcp_port_no_ns_attrs,
-};
-
-/**
- * zfcp_sysfs_port_create_files - create sysfs port files
- * @dev: pointer to belonging device
- *
- * Create all attributes of the sysfs representation of a port.
- */
-int
-zfcp_sysfs_port_create_files(struct device *dev, u32 flags)
-{
- int retval;
-
- retval = sysfs_create_group(&dev->kobj, &zfcp_port_common_attr_group);
-
- if ((flags & ZFCP_STATUS_PORT_WKA) || retval)
- return retval;
-
- retval = sysfs_create_group(&dev->kobj, &zfcp_port_no_ns_attr_group);
- if (retval)
- sysfs_remove_group(&dev->kobj, &zfcp_port_common_attr_group);
-
- return retval;
-}
-
-/**
- * zfcp_sysfs_port_remove_files - remove sysfs port files
- * @dev: pointer to belonging device
- *
- * Remove all attributes of the sysfs representation of a port.
- */
-void
-zfcp_sysfs_port_remove_files(struct device *dev, u32 flags)
-{
- sysfs_remove_group(&dev->kobj, &zfcp_port_common_attr_group);
- if (!(flags & ZFCP_STATUS_PORT_WKA))
- sysfs_remove_group(&dev->kobj, &zfcp_port_no_ns_attr_group);
-}
-
-#undef ZFCP_LOG_AREA
diff --git a/drivers/s390/scsi/zfcp_sysfs_unit.c b/drivers/s390/scsi/zfcp_sysfs_unit.c
deleted file mode 100644
index 80fb2c2..0000000
--- a/drivers/s390/scsi/zfcp_sysfs_unit.c
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
- * This file is part of the zfcp device driver for
- * FCP adapters for IBM System z9 and zSeries.
- *
- * (C) Copyright IBM Corp. 2002, 2006
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "zfcp_ext.h"
-
-#define ZFCP_LOG_AREA ZFCP_LOG_AREA_CONFIG
-
-/**
- * zfcp_sysfs_unit_release - gets called when a struct device unit is released
- * @dev: pointer to belonging device
- */
-void
-zfcp_sysfs_unit_release(struct device *dev)
-{
- kfree(dev);
-}
-
-/**
- * ZFCP_DEFINE_UNIT_ATTR
- * @_name: name of show attribute
- * @_format: format string
- * @_value: value to print
- *
- * Generates attribute for a unit.
- */
-#define ZFCP_DEFINE_UNIT_ATTR(_name, _format, _value) \
-static ssize_t zfcp_sysfs_unit_##_name##_show(struct device *dev, struct device_attribute *attr, \
- char *buf) \
-{ \
- struct zfcp_unit *unit; \
- \
- unit = dev_get_drvdata(dev); \
- return sprintf(buf, _format, _value); \
-} \
- \
-static DEVICE_ATTR(_name, S_IRUGO, zfcp_sysfs_unit_##_name##_show, NULL);
-
-ZFCP_DEFINE_UNIT_ATTR(status, "0x%08x\n", atomic_read(&unit->status));
-ZFCP_DEFINE_UNIT_ATTR(in_recovery, "%d\n", atomic_test_mask
- (ZFCP_STATUS_COMMON_ERP_INUSE, &unit->status));
-ZFCP_DEFINE_UNIT_ATTR(access_denied, "%d\n", atomic_test_mask
- (ZFCP_STATUS_COMMON_ACCESS_DENIED, &unit->status));
-ZFCP_DEFINE_UNIT_ATTR(access_shared, "%d\n", atomic_test_mask
- (ZFCP_STATUS_UNIT_SHARED, &unit->status));
-ZFCP_DEFINE_UNIT_ATTR(access_readonly, "%d\n", atomic_test_mask
- (ZFCP_STATUS_UNIT_READONLY, &unit->status));
-
-/**
- * zfcp_sysfs_unit_failed_store - failed state of unit
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- * @count: number of bytes in buffer
- *
- * Store function of the "failed" attribute of a unit.
- * If a "0" gets written to "failed", error recovery will be
- * started for the belonging unit.
- */
-static ssize_t
-zfcp_sysfs_unit_failed_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
-{
- struct zfcp_unit *unit;
- unsigned int val;
- char *endp;
- int retval = 0;
-
- down(&zfcp_data.config_sema);
- unit = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_REMOVE, &unit->status)) {
- retval = -EBUSY;
- goto out;
- }
-
- val = simple_strtoul(buf, &endp, 0);
- if (((endp + 1) < (buf + count)) || (val != 0)) {
- retval = -EINVAL;
- goto out;
- }
-
- zfcp_erp_modify_unit_status(unit, 46, NULL,
- ZFCP_STATUS_COMMON_RUNNING, ZFCP_SET);
- zfcp_erp_unit_reopen(unit, ZFCP_STATUS_COMMON_ERP_FAILED, 97, NULL);
- zfcp_erp_wait(unit->port->adapter);
- out:
- up(&zfcp_data.config_sema);
- return retval ? retval : (ssize_t) count;
-}
-
-/**
- * zfcp_sysfs_unit_failed_show - failed state of unit
- * @dev: pointer to belonging device
- * @buf: pointer to input buffer
- *
- * Show function of "failed" attribute of unit. Will be
- * "0" if unit is working, otherwise "1".
- */
-static ssize_t
-zfcp_sysfs_unit_failed_show(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct zfcp_unit *unit;
-
- unit = dev_get_drvdata(dev);
- if (atomic_test_mask(ZFCP_STATUS_COMMON_ERP_FAILED, &unit->status))
- return sprintf(buf, "1\n");
- else
- return sprintf(buf, "0\n");
-}
-
-static DEVICE_ATTR(failed, S_IWUSR | S_IRUGO, zfcp_sysfs_unit_failed_show,
- zfcp_sysfs_unit_failed_store);
-
-static struct attribute *zfcp_unit_attrs[] = {
- &dev_attr_failed.attr,
- &dev_attr_in_recovery.attr,
- &dev_attr_status.attr,
- &dev_attr_access_denied.attr,
- &dev_attr_access_shared.attr,
- &dev_attr_access_readonly.attr,
- NULL
-};
-
-static struct attribute_group zfcp_unit_attr_group = {
- .attrs = zfcp_unit_attrs,
-};
-
-/**
- * zfcp_sysfs_create_unit_files - create sysfs unit files
- * @dev: pointer to belonging device
- *
- * Create all attributes of the sysfs representation of a unit.
- */
-int
-zfcp_sysfs_unit_create_files(struct device *dev)
-{
- return sysfs_create_group(&dev->kobj, &zfcp_unit_attr_group);
-}
-
-/**
- * zfcp_sysfs_remove_unit_files - remove sysfs unit files
- * @dev: pointer to belonging device
- *
- * Remove all attributes of the sysfs representation of a unit.
- */
-void
-zfcp_sysfs_unit_remove_files(struct device *dev)
-{
- sysfs_remove_group(&dev->kobj, &zfcp_unit_attr_group);
-}
-
-#undef ZFCP_LOG_AREA
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig
index 81ccbd7..26be540 100644
--- a/drivers/scsi/Kconfig
+++ b/drivers/scsi/Kconfig
@@ -888,6 +888,25 @@
To compile this driver as a module, choose M here: the
module will be called ibmvstgt.
+config SCSI_IBMVFC
+ tristate "IBM Virtual FC support"
+ depends on PPC_PSERIES && SCSI
+ select SCSI_FC_ATTRS
+ help
+ This is the IBM POWER Virtual FC Client
+
+ To compile this driver as a module, choose M here: the
+ module will be called ibmvfc.
+
+config SCSI_IBMVFC_TRACE
+ bool "enable driver internal trace"
+ depends on SCSI_IBMVFC
+ default y
+ help
+ If you say Y here, the driver will trace all commands issued
+ to the adapter. Performance impact is minimal. Trace can be
+ dumped using /sys/class/scsi_host/hostXX/trace.
+
config SCSI_INITIO
tristate "Initio 9100U(W) support"
depends on PCI && SCSI
@@ -1738,10 +1757,12 @@
select SCSI_SPI_ATTRS
help
This is the driver for the Sun ESP SCSI host adapter. The ESP
- chipset is present in most SPARC SBUS-based computers.
+ chipset is present in most SPARC SBUS-based computers and
+ supports the Emulex family of ESP SCSI chips (esp100, esp100A,
+ esp236, fas101, fas236) as well as the Qlogic fas366 SCSI chip.
To compile this driver as a module, choose M here: the
- module will be called esp.
+ module will be called sun_esp.
config ZFCP
tristate "FCP host bus adapter driver for IBM eServer zSeries"
@@ -1771,4 +1792,6 @@
source "drivers/scsi/pcmcia/Kconfig"
+source "drivers/scsi/device_handler/Kconfig"
+
endmenu
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index 6c775e3..a814967 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -34,6 +34,7 @@
obj-$(CONFIG_SCSI_SAS_ATTRS) += scsi_transport_sas.o
obj-$(CONFIG_SCSI_SAS_LIBSAS) += libsas/
obj-$(CONFIG_SCSI_SRP_ATTRS) += scsi_transport_srp.o
+obj-$(CONFIG_SCSI_DH) += device_handler/
obj-$(CONFIG_ISCSI_TCP) += libiscsi.o iscsi_tcp.o
obj-$(CONFIG_INFINIBAND_ISER) += libiscsi.o
@@ -118,6 +119,7 @@
obj-$(CONFIG_SCSI_SRP) += libsrp.o
obj-$(CONFIG_SCSI_IBMVSCSI) += ibmvscsi/
obj-$(CONFIG_SCSI_IBMVSCSIS) += ibmvscsi/
+obj-$(CONFIG_SCSI_IBMVFC) += ibmvscsi/
obj-$(CONFIG_SCSI_HPTIOP) += hptiop.o
obj-$(CONFIG_SCSI_STEX) += stex.o
obj-$(CONFIG_SCSI_MVSAS) += mvsas.o
diff --git a/drivers/scsi/aacraid/commctrl.c b/drivers/scsi/aacraid/commctrl.c
index 5fd83de..a735526 100644
--- a/drivers/scsi/aacraid/commctrl.c
+++ b/drivers/scsi/aacraid/commctrl.c
@@ -41,6 +41,7 @@
#include <linux/kthread.h>
#include <linux/semaphore.h>
#include <asm/uaccess.h>
+#include <scsi/scsi_host.h>
#include "aacraid.h"
@@ -581,6 +582,14 @@
for (i = 0; i < upsg->count; i++) {
u64 addr;
void* p;
+ if (upsg->sg[i].count >
+ (dev->adapter_info.options &
+ AAC_OPT_NEW_COMM) ?
+ (dev->scsi_host_ptr->max_sectors << 9) :
+ 65536) {
+ rcode = -EINVAL;
+ goto cleanup;
+ }
/* Does this really need to be GFP_DMA? */
p = kmalloc(upsg->sg[i].count,GFP_KERNEL|__GFP_DMA);
if(!p) {
@@ -625,6 +634,14 @@
for (i = 0; i < usg->count; i++) {
u64 addr;
void* p;
+ if (usg->sg[i].count >
+ (dev->adapter_info.options &
+ AAC_OPT_NEW_COMM) ?
+ (dev->scsi_host_ptr->max_sectors << 9) :
+ 65536) {
+ rcode = -EINVAL;
+ goto cleanup;
+ }
/* Does this really need to be GFP_DMA? */
p = kmalloc(usg->sg[i].count,GFP_KERNEL|__GFP_DMA);
if(!p) {
@@ -667,6 +684,14 @@
for (i = 0; i < upsg->count; i++) {
uintptr_t addr;
void* p;
+ if (usg->sg[i].count >
+ (dev->adapter_info.options &
+ AAC_OPT_NEW_COMM) ?
+ (dev->scsi_host_ptr->max_sectors << 9) :
+ 65536) {
+ rcode = -EINVAL;
+ goto cleanup;
+ }
/* Does this really need to be GFP_DMA? */
p = kmalloc(usg->sg[i].count,GFP_KERNEL|__GFP_DMA);
if(!p) {
@@ -698,6 +723,14 @@
for (i = 0; i < upsg->count; i++) {
dma_addr_t addr;
void* p;
+ if (upsg->sg[i].count >
+ (dev->adapter_info.options &
+ AAC_OPT_NEW_COMM) ?
+ (dev->scsi_host_ptr->max_sectors << 9) :
+ 65536) {
+ rcode = -EINVAL;
+ goto cleanup;
+ }
p = kmalloc(upsg->sg[i].count, GFP_KERNEL);
if (!p) {
dprintk((KERN_DEBUG"aacraid: Could not allocate SG buffer - size = %d buffer number %d of %d\n",
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c
index 68c140e..9aa301c 100644
--- a/drivers/scsi/aacraid/linit.c
+++ b/drivers/scsi/aacraid/linit.c
@@ -865,7 +865,7 @@
return len;
}
-ssize_t aac_show_serial_number(struct device *device,
+static ssize_t aac_show_serial_number(struct device *device,
struct device_attribute *attr, char *buf)
{
struct aac_dev *dev = (struct aac_dev*)class_to_shost(device)->hostdata;
diff --git a/drivers/scsi/device_handler/Kconfig b/drivers/scsi/device_handler/Kconfig
new file mode 100644
index 0000000..2adc0f6
--- /dev/null
+++ b/drivers/scsi/device_handler/Kconfig
@@ -0,0 +1,32 @@
+#
+# SCSI Device Handler configuration
+#
+
+menuconfig SCSI_DH
+ tristate "SCSI Device Handlers"
+ depends on SCSI
+ default n
+ help
+ SCSI Device Handlers provide device specific support for
+ devices utilized in multipath configurations. Say Y here to
+ select support for specific hardware.
+
+config SCSI_DH_RDAC
+ tristate "LSI RDAC Device Handler"
+ depends on SCSI_DH
+ help
+ If you have a LSI RDAC select y. Otherwise, say N.
+
+config SCSI_DH_HP_SW
+ tristate "HP/COMPAQ MSA Device Handler"
+ depends on SCSI_DH
+ help
+ If you have a HP/COMPAQ MSA device that requires START_STOP to
+ be sent to start it and cannot upgrade the firmware then select y.
+ Otherwise, say N.
+
+config SCSI_DH_EMC
+ tristate "EMC CLARiiON Device Handler"
+ depends on SCSI_DH
+ help
+ If you have a EMC CLARiiON select y. Otherwise, say N.
diff --git a/drivers/scsi/device_handler/Makefile b/drivers/scsi/device_handler/Makefile
new file mode 100644
index 0000000..35272e9
--- /dev/null
+++ b/drivers/scsi/device_handler/Makefile
@@ -0,0 +1,7 @@
+#
+# SCSI Device Handler
+#
+obj-$(CONFIG_SCSI_DH) += scsi_dh.o
+obj-$(CONFIG_SCSI_DH_RDAC) += scsi_dh_rdac.o
+obj-$(CONFIG_SCSI_DH_HP_SW) += scsi_dh_hp_sw.o
+obj-$(CONFIG_SCSI_DH_EMC) += scsi_dh_emc.o
diff --git a/drivers/scsi/device_handler/scsi_dh.c b/drivers/scsi/device_handler/scsi_dh.c
new file mode 100644
index 0000000..ab6c21c
--- /dev/null
+++ b/drivers/scsi/device_handler/scsi_dh.c
@@ -0,0 +1,162 @@
+/*
+ * SCSI device handler infrastruture.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright IBM Corporation, 2007
+ * Authors:
+ * Chandra Seetharaman <sekharan@us.ibm.com>
+ * Mike Anderson <andmike@linux.vnet.ibm.com>
+ */
+
+#include <scsi/scsi_dh.h>
+#include "../scsi_priv.h"
+
+static DEFINE_SPINLOCK(list_lock);
+static LIST_HEAD(scsi_dh_list);
+
+static struct scsi_device_handler *get_device_handler(const char *name)
+{
+ struct scsi_device_handler *tmp, *found = NULL;
+
+ spin_lock(&list_lock);
+ list_for_each_entry(tmp, &scsi_dh_list, list) {
+ if (!strcmp(tmp->name, name)) {
+ found = tmp;
+ break;
+ }
+ }
+ spin_unlock(&list_lock);
+ return found;
+}
+
+static int scsi_dh_notifier_add(struct device *dev, void *data)
+{
+ struct scsi_device_handler *scsi_dh = data;
+
+ scsi_dh->nb.notifier_call(&scsi_dh->nb, BUS_NOTIFY_ADD_DEVICE, dev);
+ return 0;
+}
+
+/*
+ * scsi_register_device_handler - register a device handler personality
+ * module.
+ * @scsi_dh - device handler to be registered.
+ *
+ * Returns 0 on success, -EBUSY if handler already registered.
+ */
+int scsi_register_device_handler(struct scsi_device_handler *scsi_dh)
+{
+ int ret = -EBUSY;
+ struct scsi_device_handler *tmp;
+
+ tmp = get_device_handler(scsi_dh->name);
+ if (tmp)
+ goto done;
+
+ ret = bus_register_notifier(&scsi_bus_type, &scsi_dh->nb);
+
+ bus_for_each_dev(&scsi_bus_type, NULL, scsi_dh, scsi_dh_notifier_add);
+ spin_lock(&list_lock);
+ list_add(&scsi_dh->list, &scsi_dh_list);
+ spin_unlock(&list_lock);
+
+done:
+ return ret;
+}
+EXPORT_SYMBOL_GPL(scsi_register_device_handler);
+
+static int scsi_dh_notifier_remove(struct device *dev, void *data)
+{
+ struct scsi_device_handler *scsi_dh = data;
+
+ scsi_dh->nb.notifier_call(&scsi_dh->nb, BUS_NOTIFY_DEL_DEVICE, dev);
+ return 0;
+}
+
+/*
+ * scsi_unregister_device_handler - register a device handler personality
+ * module.
+ * @scsi_dh - device handler to be unregistered.
+ *
+ * Returns 0 on success, -ENODEV if handler not registered.
+ */
+int scsi_unregister_device_handler(struct scsi_device_handler *scsi_dh)
+{
+ int ret = -ENODEV;
+ struct scsi_device_handler *tmp;
+
+ tmp = get_device_handler(scsi_dh->name);
+ if (!tmp)
+ goto done;
+
+ ret = bus_unregister_notifier(&scsi_bus_type, &scsi_dh->nb);
+
+ bus_for_each_dev(&scsi_bus_type, NULL, scsi_dh,
+ scsi_dh_notifier_remove);
+ spin_lock(&list_lock);
+ list_del(&scsi_dh->list);
+ spin_unlock(&list_lock);
+
+done:
+ return ret;
+}
+EXPORT_SYMBOL_GPL(scsi_unregister_device_handler);
+
+/*
+ * scsi_dh_activate - activate the path associated with the scsi_device
+ * corresponding to the given request queue.
+ * @q - Request queue that is associated with the scsi_device to be
+ * activated.
+ */
+int scsi_dh_activate(struct request_queue *q)
+{
+ int err = 0;
+ unsigned long flags;
+ struct scsi_device *sdev;
+ struct scsi_device_handler *scsi_dh = NULL;
+
+ spin_lock_irqsave(q->queue_lock, flags);
+ sdev = q->queuedata;
+ if (sdev && sdev->scsi_dh_data)
+ scsi_dh = sdev->scsi_dh_data->scsi_dh;
+ if (!scsi_dh || !get_device(&sdev->sdev_gendev))
+ err = SCSI_DH_NOSYS;
+ spin_unlock_irqrestore(q->queue_lock, flags);
+
+ if (err)
+ return err;
+
+ if (scsi_dh->activate)
+ err = scsi_dh->activate(sdev);
+ put_device(&sdev->sdev_gendev);
+ return err;
+}
+EXPORT_SYMBOL_GPL(scsi_dh_activate);
+
+/*
+ * scsi_dh_handler_exist - Return TRUE(1) if a device handler exists for
+ * the given name. FALSE(0) otherwise.
+ * @name - name of the device handler.
+ */
+int scsi_dh_handler_exist(const char *name)
+{
+ return (get_device_handler(name) != NULL);
+}
+EXPORT_SYMBOL_GPL(scsi_dh_handler_exist);
+
+MODULE_DESCRIPTION("SCSI device handler");
+MODULE_AUTHOR("Chandra Seetharaman <sekharan@us.ibm.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/scsi/device_handler/scsi_dh_emc.c b/drivers/scsi/device_handler/scsi_dh_emc.c
new file mode 100644
index 0000000..ed53f14
--- /dev/null
+++ b/drivers/scsi/device_handler/scsi_dh_emc.c
@@ -0,0 +1,499 @@
+/*
+ * Target driver for EMC CLARiiON AX/CX-series hardware.
+ * Based on code from Lars Marowsky-Bree <lmb@suse.de>
+ * and Ed Goggin <egoggin@emc.com>.
+ *
+ * Copyright (C) 2006 Red Hat, Inc. All rights reserved.
+ * Copyright (C) 2006 Mike Christie
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING. If not, write to
+ * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <scsi/scsi.h>
+#include <scsi/scsi_eh.h>
+#include <scsi/scsi_dh.h>
+#include <scsi/scsi_device.h>
+
+#define CLARIION_NAME "emc_clariion"
+
+#define CLARIION_TRESPASS_PAGE 0x22
+#define CLARIION_BUFFER_SIZE 0x80
+#define CLARIION_TIMEOUT (60 * HZ)
+#define CLARIION_RETRIES 3
+#define CLARIION_UNBOUND_LU -1
+
+static unsigned char long_trespass[] = {
+ 0, 0, 0, 0,
+ CLARIION_TRESPASS_PAGE, /* Page code */
+ 0x09, /* Page length - 2 */
+ 0x81, /* Trespass code + Honor reservation bit */
+ 0xff, 0xff, /* Trespass target */
+ 0, 0, 0, 0, 0, 0 /* Reserved bytes / unknown */
+};
+
+static unsigned char long_trespass_hr[] = {
+ 0, 0, 0, 0,
+ CLARIION_TRESPASS_PAGE, /* Page code */
+ 0x09, /* Page length - 2 */
+ 0x01, /* Trespass code + Honor reservation bit */
+ 0xff, 0xff, /* Trespass target */
+ 0, 0, 0, 0, 0, 0 /* Reserved bytes / unknown */
+};
+
+static unsigned char short_trespass[] = {
+ 0, 0, 0, 0,
+ CLARIION_TRESPASS_PAGE, /* Page code */
+ 0x02, /* Page length - 2 */
+ 0x81, /* Trespass code + Honor reservation bit */
+ 0xff, /* Trespass target */
+};
+
+static unsigned char short_trespass_hr[] = {
+ 0, 0, 0, 0,
+ CLARIION_TRESPASS_PAGE, /* Page code */
+ 0x02, /* Page length - 2 */
+ 0x01, /* Trespass code + Honor reservation bit */
+ 0xff, /* Trespass target */
+};
+
+struct clariion_dh_data {
+ /*
+ * Use short trespass command (FC-series) or the long version
+ * (default for AX/CX CLARiiON arrays).
+ */
+ unsigned short_trespass;
+ /*
+ * Whether or not (default) to honor SCSI reservations when
+ * initiating a switch-over.
+ */
+ unsigned hr;
+ /* I/O buffer for both MODE_SELECT and INQUIRY commands. */
+ char buffer[CLARIION_BUFFER_SIZE];
+ /*
+ * SCSI sense buffer for commands -- assumes serial issuance
+ * and completion sequence of all commands for same multipath.
+ */
+ unsigned char sense[SCSI_SENSE_BUFFERSIZE];
+ /* which SP (A=0,B=1,UNBOUND=-1) is dflt SP for path's mapped dev */
+ int default_sp;
+ /* which SP (A=0,B=1,UNBOUND=-1) is active for path's mapped dev */
+ int current_sp;
+};
+
+static inline struct clariion_dh_data
+ *get_clariion_data(struct scsi_device *sdev)
+{
+ struct scsi_dh_data *scsi_dh_data = sdev->scsi_dh_data;
+ BUG_ON(scsi_dh_data == NULL);
+ return ((struct clariion_dh_data *) scsi_dh_data->buf);
+}
+
+/*
+ * Parse MODE_SELECT cmd reply.
+ */
+static int trespass_endio(struct scsi_device *sdev, int result)
+{
+ int err = SCSI_DH_OK;
+ struct scsi_sense_hdr sshdr;
+ struct clariion_dh_data *csdev = get_clariion_data(sdev);
+ char *sense = csdev->sense;
+
+ if (status_byte(result) == CHECK_CONDITION &&
+ scsi_normalize_sense(sense, SCSI_SENSE_BUFFERSIZE, &sshdr)) {
+ sdev_printk(KERN_ERR, sdev, "Found valid sense data 0x%2x, "
+ "0x%2x, 0x%2x while sending CLARiiON trespass "
+ "command.\n", sshdr.sense_key, sshdr.asc,
+ sshdr.ascq);
+
+ if ((sshdr.sense_key == 0x05) && (sshdr.asc == 0x04) &&
+ (sshdr.ascq == 0x00)) {
+ /*
+ * Array based copy in progress -- do not send
+ * mode_select or copy will be aborted mid-stream.
+ */
+ sdev_printk(KERN_INFO, sdev, "Array Based Copy in "
+ "progress while sending CLARiiON trespass "
+ "command.\n");
+ err = SCSI_DH_DEV_TEMP_BUSY;
+ } else if ((sshdr.sense_key == 0x02) && (sshdr.asc == 0x04) &&
+ (sshdr.ascq == 0x03)) {
+ /*
+ * LUN Not Ready - Manual Intervention Required
+ * indicates in-progress ucode upgrade (NDU).
+ */
+ sdev_printk(KERN_INFO, sdev, "Detected in-progress "
+ "ucode upgrade NDU operation while sending "
+ "CLARiiON trespass command.\n");
+ err = SCSI_DH_DEV_TEMP_BUSY;
+ } else
+ err = SCSI_DH_DEV_FAILED;
+ } else if (result) {
+ sdev_printk(KERN_ERR, sdev, "Error 0x%x while sending "
+ "CLARiiON trespass command.\n", result);
+ err = SCSI_DH_IO;
+ }
+
+ return err;
+}
+
+static int parse_sp_info_reply(struct scsi_device *sdev, int result,
+ int *default_sp, int *current_sp, int *new_current_sp)
+{
+ int err = SCSI_DH_OK;
+ struct clariion_dh_data *csdev = get_clariion_data(sdev);
+
+ if (result == 0) {
+ /* check for in-progress ucode upgrade (NDU) */
+ if (csdev->buffer[48] != 0) {
+ sdev_printk(KERN_NOTICE, sdev, "Detected in-progress "
+ "ucode upgrade NDU operation while finding "
+ "current active SP.");
+ err = SCSI_DH_DEV_TEMP_BUSY;
+ } else {
+ *default_sp = csdev->buffer[5];
+
+ if (csdev->buffer[4] == 2)
+ /* SP for path is current */
+ *current_sp = csdev->buffer[8];
+ else {
+ if (csdev->buffer[4] == 1)
+ /* SP for this path is NOT current */
+ if (csdev->buffer[8] == 0)
+ *current_sp = 1;
+ else
+ *current_sp = 0;
+ else
+ /* unbound LU or LUNZ */
+ *current_sp = CLARIION_UNBOUND_LU;
+ }
+ *new_current_sp = csdev->buffer[8];
+ }
+ } else {
+ struct scsi_sense_hdr sshdr;
+
+ err = SCSI_DH_IO;
+
+ if (scsi_normalize_sense(csdev->sense, SCSI_SENSE_BUFFERSIZE,
+ &sshdr))
+ sdev_printk(KERN_ERR, sdev, "Found valid sense data "
+ "0x%2x, 0x%2x, 0x%2x while finding current "
+ "active SP.", sshdr.sense_key, sshdr.asc,
+ sshdr.ascq);
+ else
+ sdev_printk(KERN_ERR, sdev, "Error 0x%x finding "
+ "current active SP.", result);
+ }
+
+ return err;
+}
+
+static int sp_info_endio(struct scsi_device *sdev, int result,
+ int mode_select_sent, int *done)
+{
+ struct clariion_dh_data *csdev = get_clariion_data(sdev);
+ int err_flags, default_sp, current_sp, new_current_sp;
+
+ err_flags = parse_sp_info_reply(sdev, result, &default_sp,
+ ¤t_sp, &new_current_sp);
+
+ if (err_flags != SCSI_DH_OK)
+ goto done;
+
+ if (mode_select_sent) {
+ csdev->default_sp = default_sp;
+ csdev->current_sp = current_sp;
+ } else {
+ /*
+ * Issue the actual module_selec request IFF either
+ * (1) we do not know the identity of the current SP OR
+ * (2) what we think we know is actually correct.
+ */
+ if ((current_sp != CLARIION_UNBOUND_LU) &&
+ (new_current_sp != current_sp)) {
+
+ csdev->default_sp = default_sp;
+ csdev->current_sp = current_sp;
+
+ sdev_printk(KERN_INFO, sdev, "Ignoring path group "
+ "switch-over command for CLARiiON SP%s since "
+ " mapped device is already initialized.",
+ current_sp ? "B" : "A");
+ if (done)
+ *done = 1; /* as good as doing it */
+ }
+ }
+done:
+ return err_flags;
+}
+
+/*
+* Get block request for REQ_BLOCK_PC command issued to path. Currently
+* limited to MODE_SELECT (trespass) and INQUIRY (VPD page 0xC0) commands.
+*
+* Uses data and sense buffers in hardware handler context structure and
+* assumes serial servicing of commands, both issuance and completion.
+*/
+static struct request *get_req(struct scsi_device *sdev, int cmd)
+{
+ struct clariion_dh_data *csdev = get_clariion_data(sdev);
+ struct request *rq;
+ unsigned char *page22;
+ int len = 0;
+
+ rq = blk_get_request(sdev->request_queue,
+ (cmd == MODE_SELECT) ? WRITE : READ, GFP_ATOMIC);
+ if (!rq) {
+ sdev_printk(KERN_INFO, sdev, "get_req: blk_get_request failed");
+ return NULL;
+ }
+
+ memset(&rq->cmd, 0, BLK_MAX_CDB);
+ rq->cmd[0] = cmd;
+ rq->cmd_len = COMMAND_SIZE(rq->cmd[0]);
+
+ switch (cmd) {
+ case MODE_SELECT:
+ if (csdev->short_trespass) {
+ page22 = csdev->hr ? short_trespass_hr : short_trespass;
+ len = sizeof(short_trespass);
+ } else {
+ page22 = csdev->hr ? long_trespass_hr : long_trespass;
+ len = sizeof(long_trespass);
+ }
+ /*
+ * Can't DMA from kernel BSS -- must copy selected trespass
+ * command mode page contents to context buffer which is
+ * allocated by kmalloc.
+ */
+ BUG_ON((len > CLARIION_BUFFER_SIZE));
+ memcpy(csdev->buffer, page22, len);
+ rq->cmd_flags |= REQ_RW;
+ rq->cmd[1] = 0x10;
+ break;
+ case INQUIRY:
+ rq->cmd[1] = 0x1;
+ rq->cmd[2] = 0xC0;
+ len = CLARIION_BUFFER_SIZE;
+ memset(csdev->buffer, 0, CLARIION_BUFFER_SIZE);
+ break;
+ default:
+ BUG_ON(1);
+ break;
+ }
+
+ rq->cmd[4] = len;
+ rq->cmd_type = REQ_TYPE_BLOCK_PC;
+ rq->cmd_flags |= REQ_FAILFAST;
+ rq->timeout = CLARIION_TIMEOUT;
+ rq->retries = CLARIION_RETRIES;
+
+ rq->sense = csdev->sense;
+ memset(rq->sense, 0, SCSI_SENSE_BUFFERSIZE);
+ rq->sense_len = 0;
+
+ if (blk_rq_map_kern(sdev->request_queue, rq, csdev->buffer,
+ len, GFP_ATOMIC)) {
+ __blk_put_request(rq->q, rq);
+ return NULL;
+ }
+
+ return rq;
+}
+
+static int send_cmd(struct scsi_device *sdev, int cmd)
+{
+ struct request *rq = get_req(sdev, cmd);
+
+ if (!rq)
+ return SCSI_DH_RES_TEMP_UNAVAIL;
+
+ return blk_execute_rq(sdev->request_queue, NULL, rq, 1);
+}
+
+static int clariion_activate(struct scsi_device *sdev)
+{
+ int result, done = 0;
+
+ result = send_cmd(sdev, INQUIRY);
+ result = sp_info_endio(sdev, result, 0, &done);
+ if (result || done)
+ goto done;
+
+ result = send_cmd(sdev, MODE_SELECT);
+ result = trespass_endio(sdev, result);
+ if (result)
+ goto done;
+
+ result = send_cmd(sdev, INQUIRY);
+ result = sp_info_endio(sdev, result, 1, NULL);
+done:
+ return result;
+}
+
+static int clariion_check_sense(struct scsi_device *sdev,
+ struct scsi_sense_hdr *sense_hdr)
+{
+ switch (sense_hdr->sense_key) {
+ case NOT_READY:
+ if (sense_hdr->asc == 0x04 && sense_hdr->ascq == 0x03)
+ /*
+ * LUN Not Ready - Manual Intervention Required
+ * indicates this is a passive path.
+ *
+ * FIXME: However, if this is seen and EVPD C0
+ * indicates that this is due to a NDU in
+ * progress, we should set FAIL_PATH too.
+ * This indicates we might have to do a SCSI
+ * inquiry in the end_io path. Ugh.
+ *
+ * Can return FAILED only when we want the error
+ * recovery process to kick in.
+ */
+ return SUCCESS;
+ break;
+ case ILLEGAL_REQUEST:
+ if (sense_hdr->asc == 0x25 && sense_hdr->ascq == 0x01)
+ /*
+ * An array based copy is in progress. Do not
+ * fail the path, do not bypass to another PG,
+ * do not retry. Fail the IO immediately.
+ * (Actually this is the same conclusion as in
+ * the default handler, but lets make sure.)
+ *
+ * Can return FAILED only when we want the error
+ * recovery process to kick in.
+ */
+ return SUCCESS;
+ break;
+ case UNIT_ATTENTION:
+ if (sense_hdr->asc == 0x29 && sense_hdr->ascq == 0x00)
+ /*
+ * Unit Attention Code. This is the first IO
+ * to the new path, so just retry.
+ */
+ return NEEDS_RETRY;
+ break;
+ }
+
+ /* success just means we do not care what scsi-ml does */
+ return SUCCESS;
+}
+
+static const struct {
+ char *vendor;
+ char *model;
+} clariion_dev_list[] = {
+ {"DGC", "RAID"},
+ {"DGC", "DISK"},
+ {NULL, NULL},
+};
+
+static int clariion_bus_notify(struct notifier_block *, unsigned long, void *);
+
+static struct scsi_device_handler clariion_dh = {
+ .name = CLARIION_NAME,
+ .module = THIS_MODULE,
+ .nb.notifier_call = clariion_bus_notify,
+ .check_sense = clariion_check_sense,
+ .activate = clariion_activate,
+};
+
+/*
+ * TODO: need some interface so we can set trespass values
+ */
+static int clariion_bus_notify(struct notifier_block *nb,
+ unsigned long action, void *data)
+{
+ struct device *dev = data;
+ struct scsi_device *sdev = to_scsi_device(dev);
+ struct scsi_dh_data *scsi_dh_data;
+ struct clariion_dh_data *h;
+ int i, found = 0;
+ unsigned long flags;
+
+ if (action == BUS_NOTIFY_ADD_DEVICE) {
+ for (i = 0; clariion_dev_list[i].vendor; i++) {
+ if (!strncmp(sdev->vendor, clariion_dev_list[i].vendor,
+ strlen(clariion_dev_list[i].vendor)) &&
+ !strncmp(sdev->model, clariion_dev_list[i].model,
+ strlen(clariion_dev_list[i].model))) {
+ found = 1;
+ break;
+ }
+ }
+ if (!found)
+ goto out;
+
+ scsi_dh_data = kzalloc(sizeof(struct scsi_device_handler *)
+ + sizeof(*h) , GFP_KERNEL);
+ if (!scsi_dh_data) {
+ sdev_printk(KERN_ERR, sdev, "Attach failed %s.\n",
+ CLARIION_NAME);
+ goto out;
+ }
+
+ scsi_dh_data->scsi_dh = &clariion_dh;
+ h = (struct clariion_dh_data *) scsi_dh_data->buf;
+ h->default_sp = CLARIION_UNBOUND_LU;
+ h->current_sp = CLARIION_UNBOUND_LU;
+
+ spin_lock_irqsave(sdev->request_queue->queue_lock, flags);
+ sdev->scsi_dh_data = scsi_dh_data;
+ spin_unlock_irqrestore(sdev->request_queue->queue_lock, flags);
+
+ sdev_printk(KERN_NOTICE, sdev, "Attached %s.\n", CLARIION_NAME);
+ try_module_get(THIS_MODULE);
+
+ } else if (action == BUS_NOTIFY_DEL_DEVICE) {
+ if (sdev->scsi_dh_data == NULL ||
+ sdev->scsi_dh_data->scsi_dh != &clariion_dh)
+ goto out;
+
+ spin_lock_irqsave(sdev->request_queue->queue_lock, flags);
+ scsi_dh_data = sdev->scsi_dh_data;
+ sdev->scsi_dh_data = NULL;
+ spin_unlock_irqrestore(sdev->request_queue->queue_lock, flags);
+
+ sdev_printk(KERN_NOTICE, sdev, "Dettached %s.\n",
+ CLARIION_NAME);
+
+ kfree(scsi_dh_data);
+ module_put(THIS_MODULE);
+ }
+
+out:
+ return 0;
+}
+
+static int __init clariion_init(void)
+{
+ int r;
+
+ r = scsi_register_device_handler(&clariion_dh);
+ if (r != 0)
+ printk(KERN_ERR "Failed to register scsi device handler.");
+ return r;
+}
+
+static void __exit clariion_exit(void)
+{
+ scsi_unregister_device_handler(&clariion_dh);
+}
+
+module_init(clariion_init);
+module_exit(clariion_exit);
+
+MODULE_DESCRIPTION("EMC CX/AX/FC-family driver");
+MODULE_AUTHOR("Mike Christie <michaelc@cs.wisc.edu>, Chandra Seetharaman <sekharan@us.ibm.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/scsi/device_handler/scsi_dh_hp_sw.c b/drivers/scsi/device_handler/scsi_dh_hp_sw.c
new file mode 100644
index 0000000..12ceab7
--- /dev/null
+++ b/drivers/scsi/device_handler/scsi_dh_hp_sw.c
@@ -0,0 +1,202 @@
+/*
+ * Basic HP/COMPAQ MSA 1000 support. This is only needed if your HW cannot be
+ * upgraded.
+ *
+ * Copyright (C) 2006 Red Hat, Inc. All rights reserved.
+ * Copyright (C) 2006 Mike Christie
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING. If not, write to
+ * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <scsi/scsi.h>
+#include <scsi/scsi_dbg.h>
+#include <scsi/scsi_eh.h>
+#include <scsi/scsi_dh.h>
+
+#define HP_SW_NAME "hp_sw"
+
+#define HP_SW_TIMEOUT (60 * HZ)
+#define HP_SW_RETRIES 3
+
+struct hp_sw_dh_data {
+ unsigned char sense[SCSI_SENSE_BUFFERSIZE];
+ int retries;
+};
+
+static inline struct hp_sw_dh_data *get_hp_sw_data(struct scsi_device *sdev)
+{
+ struct scsi_dh_data *scsi_dh_data = sdev->scsi_dh_data;
+ BUG_ON(scsi_dh_data == NULL);
+ return ((struct hp_sw_dh_data *) scsi_dh_data->buf);
+}
+
+static int hp_sw_done(struct scsi_device *sdev)
+{
+ struct hp_sw_dh_data *h = get_hp_sw_data(sdev);
+ struct scsi_sense_hdr sshdr;
+ int rc;
+
+ sdev_printk(KERN_INFO, sdev, "hp_sw_done\n");
+
+ rc = scsi_normalize_sense(h->sense, SCSI_SENSE_BUFFERSIZE, &sshdr);
+ if (!rc)
+ goto done;
+ switch (sshdr.sense_key) {
+ case NOT_READY:
+ if ((sshdr.asc == 0x04) && (sshdr.ascq == 3)) {
+ rc = SCSI_DH_RETRY;
+ h->retries++;
+ break;
+ }
+ /* fall through */
+ default:
+ h->retries++;
+ rc = SCSI_DH_IMM_RETRY;
+ }
+
+done:
+ if (rc == SCSI_DH_OK || rc == SCSI_DH_IO)
+ h->retries = 0;
+ else if (h->retries > HP_SW_RETRIES) {
+ h->retries = 0;
+ rc = SCSI_DH_IO;
+ }
+ return rc;
+}
+
+static int hp_sw_activate(struct scsi_device *sdev)
+{
+ struct hp_sw_dh_data *h = get_hp_sw_data(sdev);
+ struct request *req;
+ int ret = SCSI_DH_RES_TEMP_UNAVAIL;
+
+ req = blk_get_request(sdev->request_queue, WRITE, GFP_ATOMIC);
+ if (!req)
+ goto done;
+
+ sdev_printk(KERN_INFO, sdev, "sending START_STOP.");
+
+ req->cmd_type = REQ_TYPE_BLOCK_PC;
+ req->cmd_flags |= REQ_FAILFAST;
+ req->cmd_len = COMMAND_SIZE(START_STOP);
+ memset(req->cmd, 0, MAX_COMMAND_SIZE);
+ req->cmd[0] = START_STOP;
+ req->cmd[4] = 1; /* Start spin cycle */
+ req->timeout = HP_SW_TIMEOUT;
+ req->sense = h->sense;
+ memset(req->sense, 0, SCSI_SENSE_BUFFERSIZE);
+ req->sense_len = 0;
+
+ ret = blk_execute_rq(req->q, NULL, req, 1);
+ if (!ret) /* SUCCESS */
+ ret = hp_sw_done(sdev);
+ else
+ ret = SCSI_DH_IO;
+done:
+ return ret;
+}
+
+static const struct {
+ char *vendor;
+ char *model;
+} hp_sw_dh_data_list[] = {
+ {"COMPAQ", "MSA"},
+ {"HP", "HSV"},
+ {"DEC", "HSG80"},
+ {NULL, NULL},
+};
+
+static int hp_sw_bus_notify(struct notifier_block *, unsigned long, void *);
+
+static struct scsi_device_handler hp_sw_dh = {
+ .name = HP_SW_NAME,
+ .module = THIS_MODULE,
+ .nb.notifier_call = hp_sw_bus_notify,
+ .activate = hp_sw_activate,
+};
+
+static int hp_sw_bus_notify(struct notifier_block *nb,
+ unsigned long action, void *data)
+{
+ struct device *dev = data;
+ struct scsi_device *sdev = to_scsi_device(dev);
+ struct scsi_dh_data *scsi_dh_data;
+ int i, found = 0;
+ unsigned long flags;
+
+ if (action == BUS_NOTIFY_ADD_DEVICE) {
+ for (i = 0; hp_sw_dh_data_list[i].vendor; i++) {
+ if (!strncmp(sdev->vendor, hp_sw_dh_data_list[i].vendor,
+ strlen(hp_sw_dh_data_list[i].vendor)) &&
+ !strncmp(sdev->model, hp_sw_dh_data_list[i].model,
+ strlen(hp_sw_dh_data_list[i].model))) {
+ found = 1;
+ break;
+ }
+ }
+ if (!found)
+ goto out;
+
+ scsi_dh_data = kzalloc(sizeof(struct scsi_device_handler *)
+ + sizeof(struct hp_sw_dh_data) , GFP_KERNEL);
+ if (!scsi_dh_data) {
+ sdev_printk(KERN_ERR, sdev, "Attach Failed %s.\n",
+ HP_SW_NAME);
+ goto out;
+ }
+
+ scsi_dh_data->scsi_dh = &hp_sw_dh;
+ spin_lock_irqsave(sdev->request_queue->queue_lock, flags);
+ sdev->scsi_dh_data = scsi_dh_data;
+ spin_unlock_irqrestore(sdev->request_queue->queue_lock, flags);
+ try_module_get(THIS_MODULE);
+
+ sdev_printk(KERN_NOTICE, sdev, "Attached %s.\n", HP_SW_NAME);
+ } else if (action == BUS_NOTIFY_DEL_DEVICE) {
+ if (sdev->scsi_dh_data == NULL ||
+ sdev->scsi_dh_data->scsi_dh != &hp_sw_dh)
+ goto out;
+
+ spin_lock_irqsave(sdev->request_queue->queue_lock, flags);
+ scsi_dh_data = sdev->scsi_dh_data;
+ sdev->scsi_dh_data = NULL;
+ spin_unlock_irqrestore(sdev->request_queue->queue_lock, flags);
+ module_put(THIS_MODULE);
+
+ sdev_printk(KERN_NOTICE, sdev, "Dettached %s.\n", HP_SW_NAME);
+
+ kfree(scsi_dh_data);
+ }
+
+out:
+ return 0;
+}
+
+static int __init hp_sw_init(void)
+{
+ return scsi_register_device_handler(&hp_sw_dh);
+}
+
+static void __exit hp_sw_exit(void)
+{
+ scsi_unregister_device_handler(&hp_sw_dh);
+}
+
+module_init(hp_sw_init);
+module_exit(hp_sw_exit);
+
+MODULE_DESCRIPTION("HP MSA 1000");
+MODULE_AUTHOR("Mike Christie <michaelc@cs.wisc.edu");
+MODULE_LICENSE("GPL");
diff --git a/drivers/scsi/device_handler/scsi_dh_rdac.c b/drivers/scsi/device_handler/scsi_dh_rdac.c
new file mode 100644
index 0000000..6fff077
--- /dev/null
+++ b/drivers/scsi/device_handler/scsi_dh_rdac.c
@@ -0,0 +1,691 @@
+/*
+ * Engenio/LSI RDAC SCSI Device Handler
+ *
+ * Copyright (C) 2005 Mike Christie. All rights reserved.
+ * Copyright (C) Chandra Seetharaman, IBM Corp. 2007
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ */
+#include <scsi/scsi.h>
+#include <scsi/scsi_eh.h>
+#include <scsi/scsi_dh.h>
+
+#define RDAC_NAME "rdac"
+
+/*
+ * LSI mode page stuff
+ *
+ * These struct definitions and the forming of the
+ * mode page were taken from the LSI RDAC 2.4 GPL'd
+ * driver, and then converted to Linux conventions.
+ */
+#define RDAC_QUIESCENCE_TIME 20;
+/*
+ * Page Codes
+ */
+#define RDAC_PAGE_CODE_REDUNDANT_CONTROLLER 0x2c
+
+/*
+ * Controller modes definitions
+ */
+#define RDAC_MODE_TRANSFER_SPECIFIED_LUNS 0x02
+
+/*
+ * RDAC Options field
+ */
+#define RDAC_FORCED_QUIESENCE 0x02
+
+#define RDAC_TIMEOUT (60 * HZ)
+#define RDAC_RETRIES 3
+
+struct rdac_mode_6_hdr {
+ u8 data_len;
+ u8 medium_type;
+ u8 device_params;
+ u8 block_desc_len;
+};
+
+struct rdac_mode_10_hdr {
+ u16 data_len;
+ u8 medium_type;
+ u8 device_params;
+ u16 reserved;
+ u16 block_desc_len;
+};
+
+struct rdac_mode_common {
+ u8 controller_serial[16];
+ u8 alt_controller_serial[16];
+ u8 rdac_mode[2];
+ u8 alt_rdac_mode[2];
+ u8 quiescence_timeout;
+ u8 rdac_options;
+};
+
+struct rdac_pg_legacy {
+ struct rdac_mode_6_hdr hdr;
+ u8 page_code;
+ u8 page_len;
+ struct rdac_mode_common common;
+#define MODE6_MAX_LUN 32
+ u8 lun_table[MODE6_MAX_LUN];
+ u8 reserved2[32];
+ u8 reserved3;
+ u8 reserved4;
+};
+
+struct rdac_pg_expanded {
+ struct rdac_mode_10_hdr hdr;
+ u8 page_code;
+ u8 subpage_code;
+ u8 page_len[2];
+ struct rdac_mode_common common;
+ u8 lun_table[256];
+ u8 reserved3;
+ u8 reserved4;
+};
+
+struct c9_inquiry {
+ u8 peripheral_info;
+ u8 page_code; /* 0xC9 */
+ u8 reserved1;
+ u8 page_len;
+ u8 page_id[4]; /* "vace" */
+ u8 avte_cvp;
+ u8 path_prio;
+ u8 reserved2[38];
+};
+
+#define SUBSYS_ID_LEN 16
+#define SLOT_ID_LEN 2
+
+struct c4_inquiry {
+ u8 peripheral_info;
+ u8 page_code; /* 0xC4 */
+ u8 reserved1;
+ u8 page_len;
+ u8 page_id[4]; /* "subs" */
+ u8 subsys_id[SUBSYS_ID_LEN];
+ u8 revision[4];
+ u8 slot_id[SLOT_ID_LEN];
+ u8 reserved[2];
+};
+
+struct rdac_controller {
+ u8 subsys_id[SUBSYS_ID_LEN];
+ u8 slot_id[SLOT_ID_LEN];
+ int use_ms10;
+ struct kref kref;
+ struct list_head node; /* list of all controllers */
+ union {
+ struct rdac_pg_legacy legacy;
+ struct rdac_pg_expanded expanded;
+ } mode_select;
+};
+struct c8_inquiry {
+ u8 peripheral_info;
+ u8 page_code; /* 0xC8 */
+ u8 reserved1;
+ u8 page_len;
+ u8 page_id[4]; /* "edid" */
+ u8 reserved2[3];
+ u8 vol_uniq_id_len;
+ u8 vol_uniq_id[16];
+ u8 vol_user_label_len;
+ u8 vol_user_label[60];
+ u8 array_uniq_id_len;
+ u8 array_unique_id[16];
+ u8 array_user_label_len;
+ u8 array_user_label[60];
+ u8 lun[8];
+};
+
+struct c2_inquiry {
+ u8 peripheral_info;
+ u8 page_code; /* 0xC2 */
+ u8 reserved1;
+ u8 page_len;
+ u8 page_id[4]; /* "swr4" */
+ u8 sw_version[3];
+ u8 sw_date[3];
+ u8 features_enabled;
+ u8 max_lun_supported;
+ u8 partitions[239]; /* Total allocation length should be 0xFF */
+};
+
+struct rdac_dh_data {
+ struct rdac_controller *ctlr;
+#define UNINITIALIZED_LUN (1 << 8)
+ unsigned lun;
+#define RDAC_STATE_ACTIVE 0
+#define RDAC_STATE_PASSIVE 1
+ unsigned char state;
+ unsigned char sense[SCSI_SENSE_BUFFERSIZE];
+ union {
+ struct c2_inquiry c2;
+ struct c4_inquiry c4;
+ struct c8_inquiry c8;
+ struct c9_inquiry c9;
+ } inq;
+};
+
+static LIST_HEAD(ctlr_list);
+static DEFINE_SPINLOCK(list_lock);
+
+static inline struct rdac_dh_data *get_rdac_data(struct scsi_device *sdev)
+{
+ struct scsi_dh_data *scsi_dh_data = sdev->scsi_dh_data;
+ BUG_ON(scsi_dh_data == NULL);
+ return ((struct rdac_dh_data *) scsi_dh_data->buf);
+}
+
+static struct request *get_rdac_req(struct scsi_device *sdev,
+ void *buffer, unsigned buflen, int rw)
+{
+ struct request *rq;
+ struct request_queue *q = sdev->request_queue;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+
+ rq = blk_get_request(q, rw, GFP_KERNEL);
+
+ if (!rq) {
+ sdev_printk(KERN_INFO, sdev,
+ "get_rdac_req: blk_get_request failed.\n");
+ return NULL;
+ }
+
+ if (buflen && blk_rq_map_kern(q, rq, buffer, buflen, GFP_KERNEL)) {
+ blk_put_request(rq);
+ sdev_printk(KERN_INFO, sdev,
+ "get_rdac_req: blk_rq_map_kern failed.\n");
+ return NULL;
+ }
+
+ memset(&rq->cmd, 0, BLK_MAX_CDB);
+ rq->sense = h->sense;
+ memset(rq->sense, 0, SCSI_SENSE_BUFFERSIZE);
+ rq->sense_len = 0;
+
+ rq->cmd_type = REQ_TYPE_BLOCK_PC;
+ rq->cmd_flags |= REQ_FAILFAST | REQ_NOMERGE;
+ rq->retries = RDAC_RETRIES;
+ rq->timeout = RDAC_TIMEOUT;
+
+ return rq;
+}
+
+static struct request *rdac_failover_get(struct scsi_device *sdev)
+{
+ struct request *rq;
+ struct rdac_mode_common *common;
+ unsigned data_size;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+
+ if (h->ctlr->use_ms10) {
+ struct rdac_pg_expanded *rdac_pg;
+
+ data_size = sizeof(struct rdac_pg_expanded);
+ rdac_pg = &h->ctlr->mode_select.expanded;
+ memset(rdac_pg, 0, data_size);
+ common = &rdac_pg->common;
+ rdac_pg->page_code = RDAC_PAGE_CODE_REDUNDANT_CONTROLLER + 0x40;
+ rdac_pg->subpage_code = 0x1;
+ rdac_pg->page_len[0] = 0x01;
+ rdac_pg->page_len[1] = 0x28;
+ rdac_pg->lun_table[h->lun] = 0x81;
+ } else {
+ struct rdac_pg_legacy *rdac_pg;
+
+ data_size = sizeof(struct rdac_pg_legacy);
+ rdac_pg = &h->ctlr->mode_select.legacy;
+ memset(rdac_pg, 0, data_size);
+ common = &rdac_pg->common;
+ rdac_pg->page_code = RDAC_PAGE_CODE_REDUNDANT_CONTROLLER;
+ rdac_pg->page_len = 0x68;
+ rdac_pg->lun_table[h->lun] = 0x81;
+ }
+ common->rdac_mode[1] = RDAC_MODE_TRANSFER_SPECIFIED_LUNS;
+ common->quiescence_timeout = RDAC_QUIESCENCE_TIME;
+ common->rdac_options = RDAC_FORCED_QUIESENCE;
+
+ /* get request for block layer packet command */
+ rq = get_rdac_req(sdev, &h->ctlr->mode_select, data_size, WRITE);
+ if (!rq)
+ return NULL;
+
+ /* Prepare the command. */
+ if (h->ctlr->use_ms10) {
+ rq->cmd[0] = MODE_SELECT_10;
+ rq->cmd[7] = data_size >> 8;
+ rq->cmd[8] = data_size & 0xff;
+ } else {
+ rq->cmd[0] = MODE_SELECT;
+ rq->cmd[4] = data_size;
+ }
+ rq->cmd_len = COMMAND_SIZE(rq->cmd[0]);
+
+ return rq;
+}
+
+static void release_controller(struct kref *kref)
+{
+ struct rdac_controller *ctlr;
+ ctlr = container_of(kref, struct rdac_controller, kref);
+
+ spin_lock(&list_lock);
+ list_del(&ctlr->node);
+ spin_unlock(&list_lock);
+ kfree(ctlr);
+}
+
+static struct rdac_controller *get_controller(u8 *subsys_id, u8 *slot_id)
+{
+ struct rdac_controller *ctlr, *tmp;
+
+ spin_lock(&list_lock);
+
+ list_for_each_entry(tmp, &ctlr_list, node) {
+ if ((memcmp(tmp->subsys_id, subsys_id, SUBSYS_ID_LEN) == 0) &&
+ (memcmp(tmp->slot_id, slot_id, SLOT_ID_LEN) == 0)) {
+ kref_get(&tmp->kref);
+ spin_unlock(&list_lock);
+ return tmp;
+ }
+ }
+ ctlr = kmalloc(sizeof(*ctlr), GFP_ATOMIC);
+ if (!ctlr)
+ goto done;
+
+ /* initialize fields of controller */
+ memcpy(ctlr->subsys_id, subsys_id, SUBSYS_ID_LEN);
+ memcpy(ctlr->slot_id, slot_id, SLOT_ID_LEN);
+ kref_init(&ctlr->kref);
+ ctlr->use_ms10 = -1;
+ list_add(&ctlr->node, &ctlr_list);
+done:
+ spin_unlock(&list_lock);
+ return ctlr;
+}
+
+static int submit_inquiry(struct scsi_device *sdev, int page_code,
+ unsigned int len)
+{
+ struct request *rq;
+ struct request_queue *q = sdev->request_queue;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+ int err = SCSI_DH_RES_TEMP_UNAVAIL;
+
+ rq = get_rdac_req(sdev, &h->inq, len, READ);
+ if (!rq)
+ goto done;
+
+ /* Prepare the command. */
+ rq->cmd[0] = INQUIRY;
+ rq->cmd[1] = 1;
+ rq->cmd[2] = page_code;
+ rq->cmd[4] = len;
+ rq->cmd_len = COMMAND_SIZE(INQUIRY);
+ err = blk_execute_rq(q, NULL, rq, 1);
+ if (err == -EIO)
+ err = SCSI_DH_IO;
+done:
+ return err;
+}
+
+static int get_lun(struct scsi_device *sdev)
+{
+ int err;
+ struct c8_inquiry *inqp;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+
+ err = submit_inquiry(sdev, 0xC8, sizeof(struct c8_inquiry));
+ if (err == SCSI_DH_OK) {
+ inqp = &h->inq.c8;
+ h->lun = inqp->lun[7]; /* currently it uses only one byte */
+ }
+ return err;
+}
+
+#define RDAC_OWNED 0
+#define RDAC_UNOWNED 1
+#define RDAC_FAILED 2
+static int check_ownership(struct scsi_device *sdev)
+{
+ int err;
+ struct c9_inquiry *inqp;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+
+ err = submit_inquiry(sdev, 0xC9, sizeof(struct c9_inquiry));
+ if (err == SCSI_DH_OK) {
+ err = RDAC_UNOWNED;
+ inqp = &h->inq.c9;
+ /*
+ * If in AVT mode or if the path already owns the LUN,
+ * return RDAC_OWNED;
+ */
+ if (((inqp->avte_cvp >> 7) == 0x1) ||
+ ((inqp->avte_cvp & 0x1) != 0))
+ err = RDAC_OWNED;
+ } else
+ err = RDAC_FAILED;
+ return err;
+}
+
+static int initialize_controller(struct scsi_device *sdev)
+{
+ int err;
+ struct c4_inquiry *inqp;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+
+ err = submit_inquiry(sdev, 0xC4, sizeof(struct c4_inquiry));
+ if (err == SCSI_DH_OK) {
+ inqp = &h->inq.c4;
+ h->ctlr = get_controller(inqp->subsys_id, inqp->slot_id);
+ if (!h->ctlr)
+ err = SCSI_DH_RES_TEMP_UNAVAIL;
+ }
+ return err;
+}
+
+static int set_mode_select(struct scsi_device *sdev)
+{
+ int err;
+ struct c2_inquiry *inqp;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+
+ err = submit_inquiry(sdev, 0xC2, sizeof(struct c2_inquiry));
+ if (err == SCSI_DH_OK) {
+ inqp = &h->inq.c2;
+ /*
+ * If more than MODE6_MAX_LUN luns are supported, use
+ * mode select 10
+ */
+ if (inqp->max_lun_supported >= MODE6_MAX_LUN)
+ h->ctlr->use_ms10 = 1;
+ else
+ h->ctlr->use_ms10 = 0;
+ }
+ return err;
+}
+
+static int mode_select_handle_sense(struct scsi_device *sdev)
+{
+ struct scsi_sense_hdr sense_hdr;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+ int sense, err = SCSI_DH_IO, ret;
+
+ ret = scsi_normalize_sense(h->sense, SCSI_SENSE_BUFFERSIZE, &sense_hdr);
+ if (!ret)
+ goto done;
+
+ err = SCSI_DH_OK;
+ sense = (sense_hdr.sense_key << 16) | (sense_hdr.asc << 8) |
+ sense_hdr.ascq;
+ /* If it is retryable failure, submit the c9 inquiry again */
+ if (sense == 0x59136 || sense == 0x68b02 || sense == 0xb8b02 ||
+ sense == 0x62900) {
+ /* 0x59136 - Command lock contention
+ * 0x[6b]8b02 - Quiesense in progress or achieved
+ * 0x62900 - Power On, Reset, or Bus Device Reset
+ */
+ err = SCSI_DH_RETRY;
+ }
+
+ if (sense)
+ sdev_printk(KERN_INFO, sdev,
+ "MODE_SELECT failed with sense 0x%x.\n", sense);
+done:
+ return err;
+}
+
+static int send_mode_select(struct scsi_device *sdev)
+{
+ struct request *rq;
+ struct request_queue *q = sdev->request_queue;
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+ int err = SCSI_DH_RES_TEMP_UNAVAIL;
+
+ rq = rdac_failover_get(sdev);
+ if (!rq)
+ goto done;
+
+ sdev_printk(KERN_INFO, sdev, "queueing MODE_SELECT command.\n");
+
+ err = blk_execute_rq(q, NULL, rq, 1);
+ if (err != SCSI_DH_OK)
+ err = mode_select_handle_sense(sdev);
+ if (err == SCSI_DH_OK)
+ h->state = RDAC_STATE_ACTIVE;
+done:
+ return err;
+}
+
+static int rdac_activate(struct scsi_device *sdev)
+{
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+ int err = SCSI_DH_OK;
+
+ if (h->lun == UNINITIALIZED_LUN) {
+ err = get_lun(sdev);
+ if (err != SCSI_DH_OK)
+ goto done;
+ }
+
+ err = check_ownership(sdev);
+ switch (err) {
+ case RDAC_UNOWNED:
+ break;
+ case RDAC_OWNED:
+ err = SCSI_DH_OK;
+ goto done;
+ case RDAC_FAILED:
+ default:
+ err = SCSI_DH_IO;
+ goto done;
+ }
+
+ if (!h->ctlr) {
+ err = initialize_controller(sdev);
+ if (err != SCSI_DH_OK)
+ goto done;
+ }
+
+ if (h->ctlr->use_ms10 == -1) {
+ err = set_mode_select(sdev);
+ if (err != SCSI_DH_OK)
+ goto done;
+ }
+
+ err = send_mode_select(sdev);
+done:
+ return err;
+}
+
+static int rdac_prep_fn(struct scsi_device *sdev, struct request *req)
+{
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+ int ret = BLKPREP_OK;
+
+ if (h->state != RDAC_STATE_ACTIVE) {
+ ret = BLKPREP_KILL;
+ req->cmd_flags |= REQ_QUIET;
+ }
+ return ret;
+
+}
+
+static int rdac_check_sense(struct scsi_device *sdev,
+ struct scsi_sense_hdr *sense_hdr)
+{
+ struct rdac_dh_data *h = get_rdac_data(sdev);
+ switch (sense_hdr->sense_key) {
+ case NOT_READY:
+ if (sense_hdr->asc == 0x04 && sense_hdr->ascq == 0x81)
+ /* LUN Not Ready - Storage firmware incompatible
+ * Manual code synchonisation required.
+ *
+ * Nothing we can do here. Try to bypass the path.
+ */
+ return SUCCESS;
+ if (sense_hdr->asc == 0x04 && sense_hdr->ascq == 0xA1)
+ /* LUN Not Ready - Quiescense in progress
+ *
+ * Just retry and wait.
+ */
+ return NEEDS_RETRY;
+ break;
+ case ILLEGAL_REQUEST:
+ if (sense_hdr->asc == 0x94 && sense_hdr->ascq == 0x01) {
+ /* Invalid Request - Current Logical Unit Ownership.
+ * Controller is not the current owner of the LUN,
+ * Fail the path, so that the other path be used.
+ */
+ h->state = RDAC_STATE_PASSIVE;
+ return SUCCESS;
+ }
+ break;
+ case UNIT_ATTENTION:
+ if (sense_hdr->asc == 0x29 && sense_hdr->ascq == 0x00)
+ /*
+ * Power On, Reset, or Bus Device Reset, just retry.
+ */
+ return NEEDS_RETRY;
+ break;
+ }
+ /* success just means we do not care what scsi-ml does */
+ return SCSI_RETURN_NOT_HANDLED;
+}
+
+static const struct {
+ char *vendor;
+ char *model;
+} rdac_dev_list[] = {
+ {"IBM", "1722"},
+ {"IBM", "1724"},
+ {"IBM", "1726"},
+ {"IBM", "1742"},
+ {"IBM", "1814"},
+ {"IBM", "1815"},
+ {"IBM", "1818"},
+ {"IBM", "3526"},
+ {"SGI", "TP9400"},
+ {"SGI", "TP9500"},
+ {"SGI", "IS"},
+ {"STK", "OPENstorage D280"},
+ {"SUN", "CSM200_R"},
+ {"SUN", "LCSM100_F"},
+ {NULL, NULL},
+};
+
+static int rdac_bus_notify(struct notifier_block *, unsigned long, void *);
+
+static struct scsi_device_handler rdac_dh = {
+ .name = RDAC_NAME,
+ .module = THIS_MODULE,
+ .nb.notifier_call = rdac_bus_notify,
+ .prep_fn = rdac_prep_fn,
+ .check_sense = rdac_check_sense,
+ .activate = rdac_activate,
+};
+
+/*
+ * TODO: need some interface so we can set trespass values
+ */
+static int rdac_bus_notify(struct notifier_block *nb,
+ unsigned long action, void *data)
+{
+ struct device *dev = data;
+ struct scsi_device *sdev = to_scsi_device(dev);
+ struct scsi_dh_data *scsi_dh_data;
+ struct rdac_dh_data *h;
+ int i, found = 0;
+ unsigned long flags;
+
+ if (action == BUS_NOTIFY_ADD_DEVICE) {
+ for (i = 0; rdac_dev_list[i].vendor; i++) {
+ if (!strncmp(sdev->vendor, rdac_dev_list[i].vendor,
+ strlen(rdac_dev_list[i].vendor)) &&
+ !strncmp(sdev->model, rdac_dev_list[i].model,
+ strlen(rdac_dev_list[i].model))) {
+ found = 1;
+ break;
+ }
+ }
+ if (!found)
+ goto out;
+
+ scsi_dh_data = kzalloc(sizeof(struct scsi_device_handler *)
+ + sizeof(*h) , GFP_KERNEL);
+ if (!scsi_dh_data) {
+ sdev_printk(KERN_ERR, sdev, "Attach failed %s.\n",
+ RDAC_NAME);
+ goto out;
+ }
+
+ scsi_dh_data->scsi_dh = &rdac_dh;
+ h = (struct rdac_dh_data *) scsi_dh_data->buf;
+ h->lun = UNINITIALIZED_LUN;
+ h->state = RDAC_STATE_ACTIVE;
+ spin_lock_irqsave(sdev->request_queue->queue_lock, flags);
+ sdev->scsi_dh_data = scsi_dh_data;
+ spin_unlock_irqrestore(sdev->request_queue->queue_lock, flags);
+ try_module_get(THIS_MODULE);
+
+ sdev_printk(KERN_NOTICE, sdev, "Attached %s.\n", RDAC_NAME);
+
+ } else if (action == BUS_NOTIFY_DEL_DEVICE) {
+ if (sdev->scsi_dh_data == NULL ||
+ sdev->scsi_dh_data->scsi_dh != &rdac_dh)
+ goto out;
+
+ spin_lock_irqsave(sdev->request_queue->queue_lock, flags);
+ scsi_dh_data = sdev->scsi_dh_data;
+ sdev->scsi_dh_data = NULL;
+ spin_unlock_irqrestore(sdev->request_queue->queue_lock, flags);
+
+ h = (struct rdac_dh_data *) scsi_dh_data->buf;
+ if (h->ctlr)
+ kref_put(&h->ctlr->kref, release_controller);
+ kfree(scsi_dh_data);
+ module_put(THIS_MODULE);
+ sdev_printk(KERN_NOTICE, sdev, "Dettached %s.\n", RDAC_NAME);
+ }
+
+out:
+ return 0;
+}
+
+static int __init rdac_init(void)
+{
+ int r;
+
+ r = scsi_register_device_handler(&rdac_dh);
+ if (r != 0)
+ printk(KERN_ERR "Failed to register scsi device handler.");
+ return r;
+}
+
+static void __exit rdac_exit(void)
+{
+ scsi_unregister_device_handler(&rdac_dh);
+}
+
+module_init(rdac_init);
+module_exit(rdac_exit);
+
+MODULE_DESCRIPTION("Multipath LSI/Engenio RDAC driver");
+MODULE_AUTHOR("Mike Christie, Chandra Seetharaman");
+MODULE_LICENSE("GPL");
diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c
index 59fbef0..62a4618 100644
--- a/drivers/scsi/esp_scsi.c
+++ b/drivers/scsi/esp_scsi.c
@@ -219,19 +219,10 @@
/* Now reset the ESP chip */
scsi_esp_cmd(esp, ESP_CMD_RC);
scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
+ if (esp->rev == FAST)
+ esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
- /* Reload the configuration registers */
- esp_write8(esp->cfact, ESP_CFACT);
-
- esp->prev_stp = 0;
- esp_write8(esp->prev_stp, ESP_STP);
-
- esp->prev_soff = 0;
- esp_write8(esp->prev_soff, ESP_SOFF);
-
- esp_write8(esp->neg_defp, ESP_TIMEO);
-
/* This is the only point at which it is reliable to read
* the ID-code for a fast ESP chip variants.
*/
@@ -316,6 +307,17 @@
break;
}
+ /* Reload the configuration registers */
+ esp_write8(esp->cfact, ESP_CFACT);
+
+ esp->prev_stp = 0;
+ esp_write8(esp->prev_stp, ESP_STP);
+
+ esp->prev_soff = 0;
+ esp_write8(esp->prev_soff, ESP_SOFF);
+
+ esp_write8(esp->neg_defp, ESP_TIMEO);
+
/* Eat any bitrot in the chip */
esp_read8(ESP_INTRPT);
udelay(100);
diff --git a/drivers/scsi/hosts.c b/drivers/scsi/hosts.c
index c6457bf..35cd892 100644
--- a/drivers/scsi/hosts.c
+++ b/drivers/scsi/hosts.c
@@ -290,7 +290,7 @@
kfree(shost);
}
-struct device_type scsi_host_type = {
+static struct device_type scsi_host_type = {
.name = "scsi_host",
.release = scsi_host_dev_release,
};
diff --git a/drivers/scsi/ibmvscsi/Makefile b/drivers/scsi/ibmvscsi/Makefile
index 6ac0633..a423d96 100644
--- a/drivers/scsi/ibmvscsi/Makefile
+++ b/drivers/scsi/ibmvscsi/Makefile
@@ -5,3 +5,4 @@
ibmvscsic-$(CONFIG_PPC_PSERIES) += rpa_vscsi.o
obj-$(CONFIG_SCSI_IBMVSCSIS) += ibmvstgt.o
+obj-$(CONFIG_SCSI_IBMVFC) += ibmvfc.o
diff --git a/drivers/scsi/ibmvscsi/ibmvfc.c b/drivers/scsi/ibmvscsi/ibmvfc.c
new file mode 100644
index 0000000..eb702b9
--- /dev/null
+++ b/drivers/scsi/ibmvscsi/ibmvfc.c
@@ -0,0 +1,3910 @@
+/*
+ * ibmvfc.c -- driver for IBM Power Virtual Fibre Channel Adapter
+ *
+ * Written By: Brian King <brking@linux.vnet.ibm.com>, IBM Corporation
+ *
+ * Copyright (C) IBM Corporation, 2008
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/dma-mapping.h>
+#include <linux/dmapool.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/kthread.h>
+#include <linux/of.h>
+#include <linux/stringify.h>
+#include <asm/firmware.h>
+#include <asm/irq.h>
+#include <asm/vio.h>
+#include <scsi/scsi.h>
+#include <scsi/scsi_cmnd.h>
+#include <scsi/scsi_host.h>
+#include <scsi/scsi_device.h>
+#include <scsi/scsi_tcq.h>
+#include <scsi/scsi_transport_fc.h>
+#include "ibmvfc.h"
+
+static unsigned int init_timeout = IBMVFC_INIT_TIMEOUT;
+static unsigned int default_timeout = IBMVFC_DEFAULT_TIMEOUT;
+static unsigned int max_lun = IBMVFC_MAX_LUN;
+static unsigned int max_targets = IBMVFC_MAX_TARGETS;
+static unsigned int max_requests = IBMVFC_MAX_REQUESTS_DEFAULT;
+static unsigned int disc_threads = IBMVFC_MAX_DISC_THREADS;
+static unsigned int dev_loss_tmo = IBMVFC_DEV_LOSS_TMO;
+static unsigned int ibmvfc_debug = IBMVFC_DEBUG;
+static unsigned int log_level = IBMVFC_DEFAULT_LOG_LEVEL;
+static LIST_HEAD(ibmvfc_head);
+static DEFINE_SPINLOCK(ibmvfc_driver_lock);
+static struct scsi_transport_template *ibmvfc_transport_template;
+
+MODULE_DESCRIPTION("IBM Virtual Fibre Channel Driver");
+MODULE_AUTHOR("Brian King <brking@linux.vnet.ibm.com>");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(IBMVFC_DRIVER_VERSION);
+
+module_param_named(init_timeout, init_timeout, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(init_timeout, "Initialization timeout in seconds. "
+ "[Default=" __stringify(IBMVFC_INIT_TIMEOUT) "]");
+module_param_named(default_timeout, default_timeout, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(default_timeout,
+ "Default timeout in seconds for initialization and EH commands. "
+ "[Default=" __stringify(IBMVFC_DEFAULT_TIMEOUT) "]");
+module_param_named(max_requests, max_requests, uint, S_IRUGO);
+MODULE_PARM_DESC(max_requests, "Maximum requests for this adapter. "
+ "[Default=" __stringify(IBMVFC_MAX_REQUESTS_DEFAULT) "]");
+module_param_named(max_lun, max_lun, uint, S_IRUGO);
+MODULE_PARM_DESC(max_lun, "Maximum allowed LUN. "
+ "[Default=" __stringify(IBMVFC_MAX_LUN) "]");
+module_param_named(max_targets, max_targets, uint, S_IRUGO);
+MODULE_PARM_DESC(max_targets, "Maximum allowed targets. "
+ "[Default=" __stringify(IBMVFC_MAX_TARGETS) "]");
+module_param_named(disc_threads, disc_threads, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(disc_threads, "Number of device discovery threads to use. "
+ "[Default=" __stringify(IBMVFC_MAX_DISC_THREADS) "]");
+module_param_named(debug, ibmvfc_debug, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(debug, "Enable driver debug information. "
+ "[Default=" __stringify(IBMVFC_DEBUG) "]");
+module_param_named(dev_loss_tmo, dev_loss_tmo, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(dev_loss_tmo, "Maximum number of seconds that the FC "
+ "transport should insulate the loss of a remote port. Once this "
+ "value is exceeded, the scsi target is removed. "
+ "[Default=" __stringify(IBMVFC_DEV_LOSS_TMO) "]");
+module_param_named(log_level, log_level, uint, 0);
+MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver. "
+ "[Default=" __stringify(IBMVFC_DEFAULT_LOG_LEVEL) "]");
+
+static const struct {
+ u16 status;
+ u16 error;
+ u8 result;
+ u8 retry;
+ int log;
+ char *name;
+} cmd_status [] = {
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_UNABLE_TO_ESTABLISH, DID_ERROR, 1, 1, "unable to establish" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_XPORT_FAULT, DID_OK, 1, 0, "transport fault" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_CMD_TIMEOUT, DID_TIME_OUT, 1, 1, "command timeout" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_ENETDOWN, DID_NO_CONNECT, 1, 1, "network down" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_HW_FAILURE, DID_ERROR, 1, 1, "hardware failure" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_LINK_DOWN_ERR, DID_REQUEUE, 0, 0, "link down" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_LINK_DEAD_ERR, DID_ERROR, 0, 0, "link dead" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_UNABLE_TO_REGISTER, DID_ERROR, 1, 1, "unable to register" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_XPORT_BUSY, DID_BUS_BUSY, 1, 0, "transport busy" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_XPORT_DEAD, DID_ERROR, 0, 1, "transport dead" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_CONFIG_ERROR, DID_ERROR, 1, 1, "configuration error" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_NAME_SERVER_FAIL, DID_ERROR, 1, 1, "name server failure" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_LINK_HALTED, DID_REQUEUE, 0, 0, "link halted" },
+ { IBMVFC_FABRIC_MAPPED, IBMVFC_XPORT_GENERAL, DID_OK, 1, 0, "general transport error" },
+
+ { IBMVFC_VIOS_FAILURE, IBMVFC_CRQ_FAILURE, DID_REQUEUE, 1, 1, "CRQ failure" },
+ { IBMVFC_VIOS_FAILURE, IBMVFC_SW_FAILURE, DID_ERROR, 0, 1, "software failure" },
+ { IBMVFC_VIOS_FAILURE, IBMVFC_INVALID_PARAMETER, DID_ABORT, 0, 1, "invalid parameter" },
+ { IBMVFC_VIOS_FAILURE, IBMVFC_MISSING_PARAMETER, DID_ABORT, 0, 1, "missing parameter" },
+ { IBMVFC_VIOS_FAILURE, IBMVFC_HOST_IO_BUS, DID_ERROR, 1, 1, "host I/O bus failure" },
+ { IBMVFC_VIOS_FAILURE, IBMVFC_TRANS_CANCELLED, DID_ABORT, 0, 1, "transaction cancelled" },
+ { IBMVFC_VIOS_FAILURE, IBMVFC_TRANS_CANCELLED_IMPLICIT, DID_ABORT, 0, 1, "transaction cancelled implicit" },
+ { IBMVFC_VIOS_FAILURE, IBMVFC_INSUFFICIENT_RESOURCE, DID_REQUEUE, 1, 1, "insufficient resources" },
+ { IBMVFC_VIOS_FAILURE, IBMVFC_COMMAND_FAILED, DID_ERROR, 1, 1, "command failed" },
+
+ { IBMVFC_FC_FAILURE, IBMVFC_INVALID_ELS_CMD_CODE, DID_ERROR, 0, 1, "invalid ELS command code" },
+ { IBMVFC_FC_FAILURE, IBMVFC_INVALID_VERSION, DID_ERROR, 0, 1, "invalid version level" },
+ { IBMVFC_FC_FAILURE, IBMVFC_LOGICAL_ERROR, DID_ERROR, 1, 1, "logical error" },
+ { IBMVFC_FC_FAILURE, IBMVFC_INVALID_CT_IU_SIZE, DID_ERROR, 0, 1, "invalid CT_IU size" },
+ { IBMVFC_FC_FAILURE, IBMVFC_LOGICAL_BUSY, DID_REQUEUE, 1, 0, "logical busy" },
+ { IBMVFC_FC_FAILURE, IBMVFC_PROTOCOL_ERROR, DID_ERROR, 1, 1, "protocol error" },
+ { IBMVFC_FC_FAILURE, IBMVFC_UNABLE_TO_PERFORM_REQ, DID_ERROR, 1, 1, "unable to perform request" },
+ { IBMVFC_FC_FAILURE, IBMVFC_CMD_NOT_SUPPORTED, DID_ERROR, 0, 0, "command not supported" },
+ { IBMVFC_FC_FAILURE, IBMVFC_SERVER_NOT_AVAIL, DID_ERROR, 0, 1, "server not available" },
+ { IBMVFC_FC_FAILURE, IBMVFC_CMD_IN_PROGRESS, DID_ERROR, 0, 1, "command already in progress" },
+ { IBMVFC_FC_FAILURE, IBMVFC_VENDOR_SPECIFIC, DID_ERROR, 1, 1, "vendor specific" },
+
+ { IBMVFC_FC_SCSI_ERROR, 0, DID_OK, 1, 0, "SCSI error" },
+};
+
+static void ibmvfc_npiv_login(struct ibmvfc_host *);
+static void ibmvfc_tgt_send_prli(struct ibmvfc_target *);
+static void ibmvfc_tgt_send_plogi(struct ibmvfc_target *);
+static void ibmvfc_tgt_query_target(struct ibmvfc_target *);
+
+static const char *unknown_error = "unknown error";
+
+#ifdef CONFIG_SCSI_IBMVFC_TRACE
+/**
+ * ibmvfc_trc_start - Log a start trace entry
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_trc_start(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_cmd *vfc_cmd = &evt->iu.cmd;
+ struct ibmvfc_mad_common *mad = &evt->iu.mad_common;
+ struct ibmvfc_trace_entry *entry;
+
+ entry = &vhost->trace[vhost->trace_index++];
+ entry->evt = evt;
+ entry->time = jiffies;
+ entry->fmt = evt->crq.format;
+ entry->type = IBMVFC_TRC_START;
+
+ switch (entry->fmt) {
+ case IBMVFC_CMD_FORMAT:
+ entry->op_code = vfc_cmd->iu.cdb[0];
+ entry->scsi_id = vfc_cmd->tgt_scsi_id;
+ entry->lun = scsilun_to_int(&vfc_cmd->iu.lun);
+ entry->tmf_flags = vfc_cmd->iu.tmf_flags;
+ entry->u.start.xfer_len = vfc_cmd->iu.xfer_len;
+ break;
+ case IBMVFC_MAD_FORMAT:
+ entry->op_code = mad->opcode;
+ break;
+ default:
+ break;
+ };
+}
+
+/**
+ * ibmvfc_trc_end - Log an end trace entry
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_trc_end(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_cmd *vfc_cmd = &evt->xfer_iu->cmd;
+ struct ibmvfc_mad_common *mad = &evt->xfer_iu->mad_common;
+ struct ibmvfc_trace_entry *entry = &vhost->trace[vhost->trace_index++];
+
+ entry->evt = evt;
+ entry->time = jiffies;
+ entry->fmt = evt->crq.format;
+ entry->type = IBMVFC_TRC_END;
+
+ switch (entry->fmt) {
+ case IBMVFC_CMD_FORMAT:
+ entry->op_code = vfc_cmd->iu.cdb[0];
+ entry->scsi_id = vfc_cmd->tgt_scsi_id;
+ entry->lun = scsilun_to_int(&vfc_cmd->iu.lun);
+ entry->tmf_flags = vfc_cmd->iu.tmf_flags;
+ entry->u.end.status = vfc_cmd->status;
+ entry->u.end.error = vfc_cmd->error;
+ entry->u.end.fcp_rsp_flags = vfc_cmd->rsp.flags;
+ entry->u.end.rsp_code = vfc_cmd->rsp.data.info.rsp_code;
+ entry->u.end.scsi_status = vfc_cmd->rsp.scsi_status;
+ break;
+ case IBMVFC_MAD_FORMAT:
+ entry->op_code = mad->opcode;
+ entry->u.end.status = mad->status;
+ break;
+ default:
+ break;
+
+ };
+}
+
+#else
+#define ibmvfc_trc_start(evt) do { } while (0)
+#define ibmvfc_trc_end(evt) do { } while (0)
+#endif
+
+/**
+ * ibmvfc_get_err_index - Find the index into cmd_status for the fcp response
+ * @status: status / error class
+ * @error: error
+ *
+ * Return value:
+ * index into cmd_status / -EINVAL on failure
+ **/
+static int ibmvfc_get_err_index(u16 status, u16 error)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(cmd_status); i++)
+ if ((cmd_status[i].status & status) == cmd_status[i].status &&
+ cmd_status[i].error == error)
+ return i;
+
+ return -EINVAL;
+}
+
+/**
+ * ibmvfc_get_cmd_error - Find the error description for the fcp response
+ * @status: status / error class
+ * @error: error
+ *
+ * Return value:
+ * error description string
+ **/
+static const char *ibmvfc_get_cmd_error(u16 status, u16 error)
+{
+ int rc = ibmvfc_get_err_index(status, error);
+ if (rc >= 0)
+ return cmd_status[rc].name;
+ return unknown_error;
+}
+
+/**
+ * ibmvfc_get_err_result - Find the scsi status to return for the fcp response
+ * @vfc_cmd: ibmvfc command struct
+ *
+ * Return value:
+ * SCSI result value to return for completed command
+ **/
+static int ibmvfc_get_err_result(struct ibmvfc_cmd *vfc_cmd)
+{
+ int err;
+ struct ibmvfc_fcp_rsp *rsp = &vfc_cmd->rsp;
+ int fc_rsp_len = rsp->fcp_rsp_len;
+
+ if ((rsp->flags & FCP_RSP_LEN_VALID) &&
+ ((!fc_rsp_len && fc_rsp_len != 4 && fc_rsp_len != 8) ||
+ rsp->data.info.rsp_code))
+ return DID_ERROR << 16;
+
+ if (!vfc_cmd->status) {
+ if (rsp->flags & FCP_RESID_OVER)
+ return rsp->scsi_status | (DID_ERROR << 16);
+ else
+ return rsp->scsi_status | (DID_OK << 16);
+ }
+
+ err = ibmvfc_get_err_index(vfc_cmd->status, vfc_cmd->error);
+ if (err >= 0)
+ return rsp->scsi_status | (cmd_status[err].result << 16);
+ return rsp->scsi_status | (DID_ERROR << 16);
+}
+
+/**
+ * ibmvfc_retry_cmd - Determine if error status is retryable
+ * @status: status / error class
+ * @error: error
+ *
+ * Return value:
+ * 1 if error should be retried / 0 if it should not
+ **/
+static int ibmvfc_retry_cmd(u16 status, u16 error)
+{
+ int rc = ibmvfc_get_err_index(status, error);
+
+ if (rc >= 0)
+ return cmd_status[rc].retry;
+ return 1;
+}
+
+static const char *unknown_fc_explain = "unknown fc explain";
+
+static const struct {
+ u16 fc_explain;
+ char *name;
+} ls_explain [] = {
+ { 0x00, "no additional explanation" },
+ { 0x01, "service parameter error - options" },
+ { 0x03, "service parameter error - initiator control" },
+ { 0x05, "service parameter error - recipient control" },
+ { 0x07, "service parameter error - received data field size" },
+ { 0x09, "service parameter error - concurrent seq" },
+ { 0x0B, "service parameter error - credit" },
+ { 0x0D, "invalid N_Port/F_Port_Name" },
+ { 0x0E, "invalid node/Fabric Name" },
+ { 0x0F, "invalid common service parameters" },
+ { 0x11, "invalid association header" },
+ { 0x13, "association header required" },
+ { 0x15, "invalid originator S_ID" },
+ { 0x17, "invalid OX_ID-RX-ID combination" },
+ { 0x19, "command (request) already in progress" },
+ { 0x1E, "N_Port Login requested" },
+ { 0x1F, "Invalid N_Port_ID" },
+};
+
+static const struct {
+ u16 fc_explain;
+ char *name;
+} gs_explain [] = {
+ { 0x00, "no additional explanation" },
+ { 0x01, "port identifier not registered" },
+ { 0x02, "port name not registered" },
+ { 0x03, "node name not registered" },
+ { 0x04, "class of service not registered" },
+ { 0x06, "initial process associator not registered" },
+ { 0x07, "FC-4 TYPEs not registered" },
+ { 0x08, "symbolic port name not registered" },
+ { 0x09, "symbolic node name not registered" },
+ { 0x0A, "port type not registered" },
+ { 0xF0, "authorization exception" },
+ { 0xF1, "authentication exception" },
+ { 0xF2, "data base full" },
+ { 0xF3, "data base empty" },
+ { 0xF4, "processing request" },
+ { 0xF5, "unable to verify connection" },
+ { 0xF6, "devices not in a common zone" },
+};
+
+/**
+ * ibmvfc_get_ls_explain - Return the FC Explain description text
+ * @status: FC Explain status
+ *
+ * Returns:
+ * error string
+ **/
+static const char *ibmvfc_get_ls_explain(u16 status)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ls_explain); i++)
+ if (ls_explain[i].fc_explain == status)
+ return ls_explain[i].name;
+
+ return unknown_fc_explain;
+}
+
+/**
+ * ibmvfc_get_gs_explain - Return the FC Explain description text
+ * @status: FC Explain status
+ *
+ * Returns:
+ * error string
+ **/
+static const char *ibmvfc_get_gs_explain(u16 status)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(gs_explain); i++)
+ if (gs_explain[i].fc_explain == status)
+ return gs_explain[i].name;
+
+ return unknown_fc_explain;
+}
+
+static const struct {
+ enum ibmvfc_fc_type fc_type;
+ char *name;
+} fc_type [] = {
+ { IBMVFC_FABRIC_REJECT, "fabric reject" },
+ { IBMVFC_PORT_REJECT, "port reject" },
+ { IBMVFC_LS_REJECT, "ELS reject" },
+ { IBMVFC_FABRIC_BUSY, "fabric busy" },
+ { IBMVFC_PORT_BUSY, "port busy" },
+ { IBMVFC_BASIC_REJECT, "basic reject" },
+};
+
+static const char *unknown_fc_type = "unknown fc type";
+
+/**
+ * ibmvfc_get_fc_type - Return the FC Type description text
+ * @status: FC Type error status
+ *
+ * Returns:
+ * error string
+ **/
+static const char *ibmvfc_get_fc_type(u16 status)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(fc_type); i++)
+ if (fc_type[i].fc_type == status)
+ return fc_type[i].name;
+
+ return unknown_fc_type;
+}
+
+/**
+ * ibmvfc_set_tgt_action - Set the next init action for the target
+ * @tgt: ibmvfc target struct
+ * @action: action to perform
+ *
+ **/
+static void ibmvfc_set_tgt_action(struct ibmvfc_target *tgt,
+ enum ibmvfc_target_action action)
+{
+ switch (tgt->action) {
+ case IBMVFC_TGT_ACTION_DEL_RPORT:
+ break;
+ default:
+ tgt->action = action;
+ break;
+ }
+}
+
+/**
+ * ibmvfc_set_host_state - Set the state for the host
+ * @vhost: ibmvfc host struct
+ * @state: state to set host to
+ *
+ * Returns:
+ * 0 if state changed / non-zero if not changed
+ **/
+static int ibmvfc_set_host_state(struct ibmvfc_host *vhost,
+ enum ibmvfc_host_state state)
+{
+ int rc = 0;
+
+ switch (vhost->state) {
+ case IBMVFC_HOST_OFFLINE:
+ rc = -EINVAL;
+ break;
+ default:
+ vhost->state = state;
+ break;
+ };
+
+ return rc;
+}
+
+/**
+ * ibmvfc_set_host_action - Set the next init action for the host
+ * @vhost: ibmvfc host struct
+ * @action: action to perform
+ *
+ **/
+static void ibmvfc_set_host_action(struct ibmvfc_host *vhost,
+ enum ibmvfc_host_action action)
+{
+ switch (action) {
+ case IBMVFC_HOST_ACTION_ALLOC_TGTS:
+ if (vhost->action == IBMVFC_HOST_ACTION_INIT_WAIT)
+ vhost->action = action;
+ break;
+ case IBMVFC_HOST_ACTION_INIT_WAIT:
+ if (vhost->action == IBMVFC_HOST_ACTION_INIT)
+ vhost->action = action;
+ break;
+ case IBMVFC_HOST_ACTION_QUERY:
+ switch (vhost->action) {
+ case IBMVFC_HOST_ACTION_INIT_WAIT:
+ case IBMVFC_HOST_ACTION_NONE:
+ case IBMVFC_HOST_ACTION_TGT_ADD:
+ vhost->action = action;
+ break;
+ default:
+ break;
+ };
+ break;
+ case IBMVFC_HOST_ACTION_TGT_INIT:
+ if (vhost->action == IBMVFC_HOST_ACTION_ALLOC_TGTS)
+ vhost->action = action;
+ break;
+ case IBMVFC_HOST_ACTION_INIT:
+ case IBMVFC_HOST_ACTION_TGT_DEL:
+ case IBMVFC_HOST_ACTION_QUERY_TGTS:
+ case IBMVFC_HOST_ACTION_TGT_ADD:
+ case IBMVFC_HOST_ACTION_NONE:
+ default:
+ vhost->action = action;
+ break;
+ };
+}
+
+/**
+ * ibmvfc_reinit_host - Re-start host initialization (no NPIV Login)
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * nothing
+ **/
+static void ibmvfc_reinit_host(struct ibmvfc_host *vhost)
+{
+ if (vhost->action == IBMVFC_HOST_ACTION_NONE) {
+ scsi_block_requests(vhost->host);
+ ibmvfc_set_host_state(vhost, IBMVFC_INITIALIZING);
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_QUERY);
+ } else
+ vhost->reinit = 1;
+
+ wake_up(&vhost->work_wait_q);
+}
+
+/**
+ * ibmvfc_link_down - Handle a link down event from the adapter
+ * @vhost: ibmvfc host struct
+ * @state: ibmvfc host state to enter
+ *
+ **/
+static void ibmvfc_link_down(struct ibmvfc_host *vhost,
+ enum ibmvfc_host_state state)
+{
+ struct ibmvfc_target *tgt;
+
+ ENTER;
+ scsi_block_requests(vhost->host);
+ list_for_each_entry(tgt, &vhost->targets, queue)
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT);
+ ibmvfc_set_host_state(vhost, state);
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_TGT_DEL);
+ vhost->events_to_log |= IBMVFC_AE_LINKDOWN;
+ wake_up(&vhost->work_wait_q);
+ LEAVE;
+}
+
+/**
+ * ibmvfc_init_host - Start host initialization
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * nothing
+ **/
+static void ibmvfc_init_host(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_target *tgt;
+
+ if (vhost->action == IBMVFC_HOST_ACTION_INIT_WAIT) {
+ if (++vhost->init_retries > IBMVFC_MAX_INIT_RETRIES) {
+ dev_err(vhost->dev,
+ "Host initialization retries exceeded. Taking adapter offline\n");
+ ibmvfc_link_down(vhost, IBMVFC_HOST_OFFLINE);
+ return;
+ }
+ }
+
+ if (!ibmvfc_set_host_state(vhost, IBMVFC_INITIALIZING)) {
+ list_for_each_entry(tgt, &vhost->targets, queue)
+ tgt->need_login = 1;
+ scsi_block_requests(vhost->host);
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_INIT);
+ vhost->job_step = ibmvfc_npiv_login;
+ wake_up(&vhost->work_wait_q);
+ }
+}
+
+/**
+ * ibmvfc_send_crq - Send a CRQ
+ * @vhost: ibmvfc host struct
+ * @word1: the first 64 bits of the data
+ * @word2: the second 64 bits of the data
+ *
+ * Return value:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_send_crq(struct ibmvfc_host *vhost, u64 word1, u64 word2)
+{
+ struct vio_dev *vdev = to_vio_dev(vhost->dev);
+ return plpar_hcall_norets(H_SEND_CRQ, vdev->unit_address, word1, word2);
+}
+
+/**
+ * ibmvfc_send_crq_init - Send a CRQ init message
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_send_crq_init(struct ibmvfc_host *vhost)
+{
+ ibmvfc_dbg(vhost, "Sending CRQ init\n");
+ return ibmvfc_send_crq(vhost, 0xC001000000000000LL, 0);
+}
+
+/**
+ * ibmvfc_send_crq_init_complete - Send a CRQ init complete message
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_send_crq_init_complete(struct ibmvfc_host *vhost)
+{
+ ibmvfc_dbg(vhost, "Sending CRQ init complete\n");
+ return ibmvfc_send_crq(vhost, 0xC002000000000000LL, 0);
+}
+
+/**
+ * ibmvfc_release_crq_queue - Deallocates data and unregisters CRQ
+ * @vhost: ibmvfc host struct
+ *
+ * Frees irq, deallocates a page for messages, unmaps dma, and unregisters
+ * the crq with the hypervisor.
+ **/
+static void ibmvfc_release_crq_queue(struct ibmvfc_host *vhost)
+{
+ long rc;
+ struct vio_dev *vdev = to_vio_dev(vhost->dev);
+ struct ibmvfc_crq_queue *crq = &vhost->crq;
+
+ ibmvfc_dbg(vhost, "Releasing CRQ\n");
+ free_irq(vdev->irq, vhost);
+ do {
+ rc = plpar_hcall_norets(H_FREE_CRQ, vdev->unit_address);
+ } while (rc == H_BUSY || H_IS_LONG_BUSY(rc));
+
+ vhost->state = IBMVFC_NO_CRQ;
+ dma_unmap_single(vhost->dev, crq->msg_token, PAGE_SIZE, DMA_BIDIRECTIONAL);
+ free_page((unsigned long)crq->msgs);
+}
+
+/**
+ * ibmvfc_reenable_crq_queue - reenables the CRQ
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_reenable_crq_queue(struct ibmvfc_host *vhost)
+{
+ int rc;
+ struct vio_dev *vdev = to_vio_dev(vhost->dev);
+
+ /* Re-enable the CRQ */
+ do {
+ rc = plpar_hcall_norets(H_ENABLE_CRQ, vdev->unit_address);
+ } while (rc == H_IN_PROGRESS || rc == H_BUSY || H_IS_LONG_BUSY(rc));
+
+ if (rc)
+ dev_err(vhost->dev, "Error enabling adapter (rc=%d)\n", rc);
+
+ return rc;
+}
+
+/**
+ * ibmvfc_reset_crq - resets a crq after a failure
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_reset_crq(struct ibmvfc_host *vhost)
+{
+ int rc;
+ struct vio_dev *vdev = to_vio_dev(vhost->dev);
+ struct ibmvfc_crq_queue *crq = &vhost->crq;
+
+ /* Close the CRQ */
+ do {
+ rc = plpar_hcall_norets(H_FREE_CRQ, vdev->unit_address);
+ } while (rc == H_BUSY || H_IS_LONG_BUSY(rc));
+
+ vhost->state = IBMVFC_NO_CRQ;
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_NONE);
+
+ /* Clean out the queue */
+ memset(crq->msgs, 0, PAGE_SIZE);
+ crq->cur = 0;
+
+ /* And re-open it again */
+ rc = plpar_hcall_norets(H_REG_CRQ, vdev->unit_address,
+ crq->msg_token, PAGE_SIZE);
+
+ if (rc == H_CLOSED)
+ /* Adapter is good, but other end is not ready */
+ dev_warn(vhost->dev, "Partner adapter not ready\n");
+ else if (rc != 0)
+ dev_warn(vhost->dev, "Couldn't register crq (rc=%d)\n", rc);
+
+ return rc;
+}
+
+/**
+ * ibmvfc_valid_event - Determines if event is valid.
+ * @pool: event_pool that contains the event
+ * @evt: ibmvfc event to be checked for validity
+ *
+ * Return value:
+ * 1 if event is valid / 0 if event is not valid
+ **/
+static int ibmvfc_valid_event(struct ibmvfc_event_pool *pool,
+ struct ibmvfc_event *evt)
+{
+ int index = evt - pool->events;
+ if (index < 0 || index >= pool->size) /* outside of bounds */
+ return 0;
+ if (evt != pool->events + index) /* unaligned */
+ return 0;
+ return 1;
+}
+
+/**
+ * ibmvfc_free_event - Free the specified event
+ * @evt: ibmvfc_event to be freed
+ *
+ **/
+static void ibmvfc_free_event(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_event_pool *pool = &vhost->pool;
+
+ BUG_ON(!ibmvfc_valid_event(pool, evt));
+ BUG_ON(atomic_inc_return(&evt->free) != 1);
+ list_add_tail(&evt->queue, &vhost->free);
+}
+
+/**
+ * ibmvfc_scsi_eh_done - EH done function for queuecommand commands
+ * @evt: ibmvfc event struct
+ *
+ * This function does not setup any error status, that must be done
+ * before this function gets called.
+ **/
+static void ibmvfc_scsi_eh_done(struct ibmvfc_event *evt)
+{
+ struct scsi_cmnd *cmnd = evt->cmnd;
+
+ if (cmnd) {
+ scsi_dma_unmap(cmnd);
+ cmnd->scsi_done(cmnd);
+ }
+
+ ibmvfc_free_event(evt);
+}
+
+/**
+ * ibmvfc_fail_request - Fail request with specified error code
+ * @evt: ibmvfc event struct
+ * @error_code: error code to fail request with
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_fail_request(struct ibmvfc_event *evt, int error_code)
+{
+ if (evt->cmnd) {
+ evt->cmnd->result = (error_code << 16);
+ evt->done = ibmvfc_scsi_eh_done;
+ } else
+ evt->xfer_iu->mad_common.status = IBMVFC_MAD_DRIVER_FAILED;
+
+ list_del(&evt->queue);
+ del_timer(&evt->timer);
+ ibmvfc_trc_end(evt);
+ evt->done(evt);
+}
+
+/**
+ * ibmvfc_purge_requests - Our virtual adapter just shut down. Purge any sent requests
+ * @vhost: ibmvfc host struct
+ * @error_code: error code to fail requests with
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_purge_requests(struct ibmvfc_host *vhost, int error_code)
+{
+ struct ibmvfc_event *evt, *pos;
+
+ ibmvfc_dbg(vhost, "Purging all requests\n");
+ list_for_each_entry_safe(evt, pos, &vhost->sent, queue)
+ ibmvfc_fail_request(evt, error_code);
+}
+
+/**
+ * __ibmvfc_reset_host - Reset the connection to the server (no locking)
+ * @vhost: struct ibmvfc host to reset
+ **/
+static void __ibmvfc_reset_host(struct ibmvfc_host *vhost)
+{
+ int rc;
+
+ scsi_block_requests(vhost->host);
+ ibmvfc_purge_requests(vhost, DID_ERROR);
+ if ((rc = ibmvfc_reset_crq(vhost)) ||
+ (rc = ibmvfc_send_crq_init(vhost)) ||
+ (rc = vio_enable_interrupts(to_vio_dev(vhost->dev)))) {
+ dev_err(vhost->dev, "Error after reset rc=%d\n", rc);
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ } else
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DOWN);
+}
+
+/**
+ * ibmvfc_reset_host - Reset the connection to the server
+ * @vhost: struct ibmvfc host to reset
+ **/
+static void ibmvfc_reset_host(struct ibmvfc_host *vhost)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ __ibmvfc_reset_host(vhost);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+}
+
+/**
+ * ibmvfc_retry_host_init - Retry host initialization if allowed
+ * @vhost: ibmvfc host struct
+ *
+ **/
+static void ibmvfc_retry_host_init(struct ibmvfc_host *vhost)
+{
+ if (vhost->action == IBMVFC_HOST_ACTION_INIT_WAIT) {
+ if (++vhost->init_retries > IBMVFC_MAX_INIT_RETRIES) {
+ dev_err(vhost->dev,
+ "Host initialization retries exceeded. Taking adapter offline\n");
+ ibmvfc_link_down(vhost, IBMVFC_HOST_OFFLINE);
+ } else if (vhost->init_retries == IBMVFC_MAX_INIT_RETRIES)
+ __ibmvfc_reset_host(vhost);
+ else
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_INIT);
+ }
+
+ wake_up(&vhost->work_wait_q);
+}
+
+/**
+ * __ibmvfc_find_target - Find the specified scsi_target (no locking)
+ * @starget: scsi target struct
+ *
+ * Return value:
+ * ibmvfc_target struct / NULL if not found
+ **/
+static struct ibmvfc_target *__ibmvfc_find_target(struct scsi_target *starget)
+{
+ struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ struct ibmvfc_target *tgt;
+
+ list_for_each_entry(tgt, &vhost->targets, queue)
+ if (tgt->target_id == starget->id)
+ return tgt;
+ return NULL;
+}
+
+/**
+ * ibmvfc_find_target - Find the specified scsi_target
+ * @starget: scsi target struct
+ *
+ * Return value:
+ * ibmvfc_target struct / NULL if not found
+ **/
+static struct ibmvfc_target *ibmvfc_find_target(struct scsi_target *starget)
+{
+ struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
+ struct ibmvfc_target *tgt;
+ unsigned long flags;
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ tgt = __ibmvfc_find_target(starget);
+ spin_unlock_irqrestore(shost->host_lock, flags);
+ return tgt;
+}
+
+/**
+ * ibmvfc_get_host_speed - Get host port speed
+ * @shost: scsi host struct
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_get_host_speed(struct Scsi_Host *shost)
+{
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ unsigned long flags;
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ if (vhost->state == IBMVFC_ACTIVE) {
+ switch (vhost->login_buf->resp.link_speed / 100) {
+ case 1:
+ fc_host_speed(shost) = FC_PORTSPEED_1GBIT;
+ break;
+ case 2:
+ fc_host_speed(shost) = FC_PORTSPEED_2GBIT;
+ break;
+ case 4:
+ fc_host_speed(shost) = FC_PORTSPEED_4GBIT;
+ break;
+ case 8:
+ fc_host_speed(shost) = FC_PORTSPEED_8GBIT;
+ break;
+ case 10:
+ fc_host_speed(shost) = FC_PORTSPEED_10GBIT;
+ break;
+ case 16:
+ fc_host_speed(shost) = FC_PORTSPEED_16GBIT;
+ break;
+ default:
+ ibmvfc_log(vhost, 3, "Unknown port speed: %ld Gbit\n",
+ vhost->login_buf->resp.link_speed / 100);
+ fc_host_speed(shost) = FC_PORTSPEED_UNKNOWN;
+ break;
+ }
+ } else
+ fc_host_speed(shost) = FC_PORTSPEED_UNKNOWN;
+ spin_unlock_irqrestore(shost->host_lock, flags);
+}
+
+/**
+ * ibmvfc_get_host_port_state - Get host port state
+ * @shost: scsi host struct
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_get_host_port_state(struct Scsi_Host *shost)
+{
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ unsigned long flags;
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ switch (vhost->state) {
+ case IBMVFC_INITIALIZING:
+ case IBMVFC_ACTIVE:
+ fc_host_port_state(shost) = FC_PORTSTATE_ONLINE;
+ break;
+ case IBMVFC_LINK_DOWN:
+ fc_host_port_state(shost) = FC_PORTSTATE_LINKDOWN;
+ break;
+ case IBMVFC_LINK_DEAD:
+ case IBMVFC_HOST_OFFLINE:
+ fc_host_port_state(shost) = FC_PORTSTATE_OFFLINE;
+ break;
+ case IBMVFC_HALTED:
+ fc_host_port_state(shost) = FC_PORTSTATE_BLOCKED;
+ break;
+ default:
+ ibmvfc_log(vhost, 3, "Unknown port state: %d\n", vhost->state);
+ fc_host_port_state(shost) = FC_PORTSTATE_UNKNOWN;
+ break;
+ }
+ spin_unlock_irqrestore(shost->host_lock, flags);
+}
+
+/**
+ * ibmvfc_set_rport_dev_loss_tmo - Set rport's device loss timeout
+ * @rport: rport struct
+ * @timeout: timeout value
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_set_rport_dev_loss_tmo(struct fc_rport *rport, u32 timeout)
+{
+ if (timeout)
+ rport->dev_loss_tmo = timeout;
+ else
+ rport->dev_loss_tmo = 1;
+}
+
+/**
+ * ibmvfc_get_starget_node_name - Get SCSI target's node name
+ * @starget: scsi target struct
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_get_starget_node_name(struct scsi_target *starget)
+{
+ struct ibmvfc_target *tgt = ibmvfc_find_target(starget);
+ fc_starget_port_name(starget) = tgt ? tgt->ids.node_name : 0;
+}
+
+/**
+ * ibmvfc_get_starget_port_name - Get SCSI target's port name
+ * @starget: scsi target struct
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_get_starget_port_name(struct scsi_target *starget)
+{
+ struct ibmvfc_target *tgt = ibmvfc_find_target(starget);
+ fc_starget_port_name(starget) = tgt ? tgt->ids.port_name : 0;
+}
+
+/**
+ * ibmvfc_get_starget_port_id - Get SCSI target's port ID
+ * @starget: scsi target struct
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_get_starget_port_id(struct scsi_target *starget)
+{
+ struct ibmvfc_target *tgt = ibmvfc_find_target(starget);
+ fc_starget_port_id(starget) = tgt ? tgt->scsi_id : -1;
+}
+
+/**
+ * ibmvfc_wait_while_resetting - Wait while the host resets
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_wait_while_resetting(struct ibmvfc_host *vhost)
+{
+ long timeout = wait_event_timeout(vhost->init_wait_q,
+ (vhost->state == IBMVFC_ACTIVE ||
+ vhost->state == IBMVFC_HOST_OFFLINE ||
+ vhost->state == IBMVFC_LINK_DEAD),
+ (init_timeout * HZ));
+
+ return timeout ? 0 : -EIO;
+}
+
+/**
+ * ibmvfc_issue_fc_host_lip - Re-initiate link initialization
+ * @shost: scsi host struct
+ *
+ * Return value:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_issue_fc_host_lip(struct Scsi_Host *shost)
+{
+ struct ibmvfc_host *vhost = shost_priv(shost);
+
+ dev_err(vhost->dev, "Initiating host LIP. Resetting connection\n");
+ ibmvfc_reset_host(vhost);
+ return ibmvfc_wait_while_resetting(vhost);
+}
+
+/**
+ * ibmvfc_gather_partition_info - Gather info about the LPAR
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_gather_partition_info(struct ibmvfc_host *vhost)
+{
+ struct device_node *rootdn;
+ const char *name;
+ const unsigned int *num;
+
+ rootdn = of_find_node_by_path("/");
+ if (!rootdn)
+ return;
+
+ name = of_get_property(rootdn, "ibm,partition-name", NULL);
+ if (name)
+ strncpy(vhost->partition_name, name, sizeof(vhost->partition_name));
+ num = of_get_property(rootdn, "ibm,partition-no", NULL);
+ if (num)
+ vhost->partition_number = *num;
+ of_node_put(rootdn);
+}
+
+/**
+ * ibmvfc_set_login_info - Setup info for NPIV login
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_set_login_info(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_npiv_login *login_info = &vhost->login_info;
+ struct device_node *of_node = vhost->dev->archdata.of_node;
+ const char *location;
+
+ memset(login_info, 0, sizeof(*login_info));
+
+ login_info->ostype = IBMVFC_OS_LINUX;
+ login_info->max_dma_len = IBMVFC_MAX_SECTORS << 9;
+ login_info->max_payload = sizeof(struct ibmvfc_fcp_cmd_iu);
+ login_info->max_response = sizeof(struct ibmvfc_fcp_rsp);
+ login_info->partition_num = vhost->partition_number;
+ login_info->vfc_frame_version = 1;
+ login_info->fcp_version = 3;
+ if (vhost->client_migrated)
+ login_info->flags = IBMVFC_CLIENT_MIGRATED;
+
+ login_info->max_cmds = max_requests + IBMVFC_NUM_INTERNAL_REQ;
+ login_info->capabilities = IBMVFC_CAN_MIGRATE;
+ login_info->async.va = vhost->async_crq.msg_token;
+ login_info->async.len = vhost->async_crq.size;
+ strncpy(login_info->partition_name, vhost->partition_name, IBMVFC_MAX_NAME);
+ strncpy(login_info->device_name,
+ vhost->host->shost_gendev.bus_id, IBMVFC_MAX_NAME);
+
+ location = of_get_property(of_node, "ibm,loc-code", NULL);
+ location = location ? location : vhost->dev->bus_id;
+ strncpy(login_info->drc_name, location, IBMVFC_MAX_NAME);
+}
+
+/**
+ * ibmvfc_init_event_pool - Allocates and initializes the event pool for a host
+ * @vhost: ibmvfc host who owns the event pool
+ *
+ * Returns zero on success.
+ **/
+static int ibmvfc_init_event_pool(struct ibmvfc_host *vhost)
+{
+ int i;
+ struct ibmvfc_event_pool *pool = &vhost->pool;
+
+ ENTER;
+ pool->size = max_requests + IBMVFC_NUM_INTERNAL_REQ;
+ pool->events = kcalloc(pool->size, sizeof(*pool->events), GFP_KERNEL);
+ if (!pool->events)
+ return -ENOMEM;
+
+ pool->iu_storage = dma_alloc_coherent(vhost->dev,
+ pool->size * sizeof(*pool->iu_storage),
+ &pool->iu_token, 0);
+
+ if (!pool->iu_storage) {
+ kfree(pool->events);
+ return -ENOMEM;
+ }
+
+ for (i = 0; i < pool->size; ++i) {
+ struct ibmvfc_event *evt = &pool->events[i];
+ atomic_set(&evt->free, 1);
+ evt->crq.valid = 0x80;
+ evt->crq.ioba = pool->iu_token + (sizeof(*evt->xfer_iu) * i);
+ evt->xfer_iu = pool->iu_storage + i;
+ evt->vhost = vhost;
+ evt->ext_list = NULL;
+ list_add_tail(&evt->queue, &vhost->free);
+ }
+
+ LEAVE;
+ return 0;
+}
+
+/**
+ * ibmvfc_free_event_pool - Frees memory of the event pool of a host
+ * @vhost: ibmvfc host who owns the event pool
+ *
+ **/
+static void ibmvfc_free_event_pool(struct ibmvfc_host *vhost)
+{
+ int i;
+ struct ibmvfc_event_pool *pool = &vhost->pool;
+
+ ENTER;
+ for (i = 0; i < pool->size; ++i) {
+ list_del(&pool->events[i].queue);
+ BUG_ON(atomic_read(&pool->events[i].free) != 1);
+ if (pool->events[i].ext_list)
+ dma_pool_free(vhost->sg_pool,
+ pool->events[i].ext_list,
+ pool->events[i].ext_list_token);
+ }
+
+ kfree(pool->events);
+ dma_free_coherent(vhost->dev,
+ pool->size * sizeof(*pool->iu_storage),
+ pool->iu_storage, pool->iu_token);
+ LEAVE;
+}
+
+/**
+ * ibmvfc_get_event - Gets the next free event in pool
+ * @vhost: ibmvfc host struct
+ *
+ * Returns a free event from the pool.
+ **/
+static struct ibmvfc_event *ibmvfc_get_event(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_event *evt;
+
+ BUG_ON(list_empty(&vhost->free));
+ evt = list_entry(vhost->free.next, struct ibmvfc_event, queue);
+ atomic_set(&evt->free, 0);
+ list_del(&evt->queue);
+ return evt;
+}
+
+/**
+ * ibmvfc_init_event - Initialize fields in an event struct that are always
+ * required.
+ * @evt: The event
+ * @done: Routine to call when the event is responded to
+ * @format: SRP or MAD format
+ **/
+static void ibmvfc_init_event(struct ibmvfc_event *evt,
+ void (*done) (struct ibmvfc_event *), u8 format)
+{
+ evt->cmnd = NULL;
+ evt->sync_iu = NULL;
+ evt->crq.format = format;
+ evt->done = done;
+}
+
+/**
+ * ibmvfc_map_sg_list - Initialize scatterlist
+ * @scmd: scsi command struct
+ * @nseg: number of scatterlist segments
+ * @md: memory descriptor list to initialize
+ **/
+static void ibmvfc_map_sg_list(struct scsi_cmnd *scmd, int nseg,
+ struct srp_direct_buf *md)
+{
+ int i;
+ struct scatterlist *sg;
+
+ scsi_for_each_sg(scmd, sg, nseg, i) {
+ md[i].va = sg_dma_address(sg);
+ md[i].len = sg_dma_len(sg);
+ md[i].key = 0;
+ }
+}
+
+/**
+ * ibmvfc_map_sg_data - Maps dma for a scatterlist and initializes decriptor fields
+ * @scmd: Scsi_Cmnd with the scatterlist
+ * @evt: ibmvfc event struct
+ * @vfc_cmd: vfc_cmd that contains the memory descriptor
+ * @dev: device for which to map dma memory
+ *
+ * Returns:
+ * 0 on success / non-zero on failure
+ **/
+static int ibmvfc_map_sg_data(struct scsi_cmnd *scmd,
+ struct ibmvfc_event *evt,
+ struct ibmvfc_cmd *vfc_cmd, struct device *dev)
+{
+
+ int sg_mapped;
+ struct srp_direct_buf *data = &vfc_cmd->ioba;
+ struct ibmvfc_host *vhost = dev_get_drvdata(dev);
+
+ sg_mapped = scsi_dma_map(scmd);
+ if (!sg_mapped) {
+ vfc_cmd->flags |= IBMVFC_NO_MEM_DESC;
+ return 0;
+ } else if (unlikely(sg_mapped < 0)) {
+ if (vhost->log_level > IBMVFC_DEFAULT_LOG_LEVEL)
+ scmd_printk(KERN_ERR, scmd, "Failed to map DMA buffer for command\n");
+ return sg_mapped;
+ }
+
+ if (scmd->sc_data_direction == DMA_TO_DEVICE) {
+ vfc_cmd->flags |= IBMVFC_WRITE;
+ vfc_cmd->iu.add_cdb_len |= IBMVFC_WRDATA;
+ } else {
+ vfc_cmd->flags |= IBMVFC_READ;
+ vfc_cmd->iu.add_cdb_len |= IBMVFC_RDDATA;
+ }
+
+ if (sg_mapped == 1) {
+ ibmvfc_map_sg_list(scmd, sg_mapped, data);
+ return 0;
+ }
+
+ vfc_cmd->flags |= IBMVFC_SCATTERLIST;
+
+ if (!evt->ext_list) {
+ evt->ext_list = dma_pool_alloc(vhost->sg_pool, GFP_ATOMIC,
+ &evt->ext_list_token);
+
+ if (!evt->ext_list) {
+ scmd_printk(KERN_ERR, scmd, "Can't allocate memory for scatterlist\n");
+ return -ENOMEM;
+ }
+ }
+
+ ibmvfc_map_sg_list(scmd, sg_mapped, evt->ext_list);
+
+ data->va = evt->ext_list_token;
+ data->len = sg_mapped * sizeof(struct srp_direct_buf);
+ data->key = 0;
+ return 0;
+}
+
+/**
+ * ibmvfc_timeout - Internal command timeout handler
+ * @evt: struct ibmvfc_event that timed out
+ *
+ * Called when an internally generated command times out
+ **/
+static void ibmvfc_timeout(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_host *vhost = evt->vhost;
+ dev_err(vhost->dev, "Command timed out (%p). Resetting connection\n", evt);
+ ibmvfc_reset_host(vhost);
+}
+
+/**
+ * ibmvfc_send_event - Transforms event to u64 array and calls send_crq()
+ * @evt: event to be sent
+ * @vhost: ibmvfc host struct
+ * @timeout: timeout in seconds - 0 means do not time command
+ *
+ * Returns the value returned from ibmvfc_send_crq(). (Zero for success)
+ **/
+static int ibmvfc_send_event(struct ibmvfc_event *evt,
+ struct ibmvfc_host *vhost, unsigned long timeout)
+{
+ u64 *crq_as_u64 = (u64 *) &evt->crq;
+ int rc;
+
+ /* Copy the IU into the transfer area */
+ *evt->xfer_iu = evt->iu;
+ if (evt->crq.format == IBMVFC_CMD_FORMAT)
+ evt->xfer_iu->cmd.tag = (u64)evt;
+ else if (evt->crq.format == IBMVFC_MAD_FORMAT)
+ evt->xfer_iu->mad_common.tag = (u64)evt;
+ else
+ BUG();
+
+ list_add_tail(&evt->queue, &vhost->sent);
+ init_timer(&evt->timer);
+
+ if (timeout) {
+ evt->timer.data = (unsigned long) evt;
+ evt->timer.expires = jiffies + (timeout * HZ);
+ evt->timer.function = (void (*)(unsigned long))ibmvfc_timeout;
+ add_timer(&evt->timer);
+ }
+
+ if ((rc = ibmvfc_send_crq(vhost, crq_as_u64[0], crq_as_u64[1]))) {
+ list_del(&evt->queue);
+ del_timer(&evt->timer);
+
+ /* If send_crq returns H_CLOSED, return SCSI_MLQUEUE_HOST_BUSY.
+ * Firmware will send a CRQ with a transport event (0xFF) to
+ * tell this client what has happened to the transport. This
+ * will be handled in ibmvfc_handle_crq()
+ */
+ if (rc == H_CLOSED) {
+ if (printk_ratelimit())
+ dev_warn(vhost->dev, "Send warning. Receive queue closed, will retry.\n");
+ if (evt->cmnd)
+ scsi_dma_unmap(evt->cmnd);
+ ibmvfc_free_event(evt);
+ return SCSI_MLQUEUE_HOST_BUSY;
+ }
+
+ dev_err(vhost->dev, "Send error (rc=%d)\n", rc);
+ if (evt->cmnd) {
+ evt->cmnd->result = DID_ERROR << 16;
+ evt->done = ibmvfc_scsi_eh_done;
+ } else
+ evt->xfer_iu->mad_common.status = IBMVFC_MAD_CRQ_ERROR;
+
+ evt->done(evt);
+ } else
+ ibmvfc_trc_start(evt);
+
+ return 0;
+}
+
+/**
+ * ibmvfc_log_error - Log an error for the failed command if appropriate
+ * @evt: ibmvfc event to log
+ *
+ **/
+static void ibmvfc_log_error(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_cmd *vfc_cmd = &evt->xfer_iu->cmd;
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_fcp_rsp *rsp = &vfc_cmd->rsp;
+ struct scsi_cmnd *cmnd = evt->cmnd;
+ const char *err = unknown_error;
+ int index = ibmvfc_get_err_index(vfc_cmd->status, vfc_cmd->error);
+ int logerr = 0;
+ int rsp_code = 0;
+
+ if (index >= 0) {
+ logerr = cmd_status[index].log;
+ err = cmd_status[index].name;
+ }
+
+ if (!logerr && (vhost->log_level <= IBMVFC_DEFAULT_LOG_LEVEL))
+ return;
+
+ if (rsp->flags & FCP_RSP_LEN_VALID)
+ rsp_code = rsp->data.info.rsp_code;
+
+ scmd_printk(KERN_ERR, cmnd, "Command (%02X) failed: %s (%x:%x) "
+ "flags: %x fcp_rsp: %x, resid=%d, scsi_status: %x\n",
+ cmnd->cmnd[0], err, vfc_cmd->status, vfc_cmd->error,
+ rsp->flags, rsp_code, scsi_get_resid(cmnd), rsp->scsi_status);
+}
+
+/**
+ * ibmvfc_scsi_done - Handle responses from commands
+ * @evt: ibmvfc event to be handled
+ *
+ * Used as a callback when sending scsi cmds.
+ **/
+static void ibmvfc_scsi_done(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_cmd *vfc_cmd = &evt->xfer_iu->cmd;
+ struct ibmvfc_fcp_rsp *rsp = &vfc_cmd->rsp;
+ struct scsi_cmnd *cmnd = evt->cmnd;
+ int rsp_len = 0;
+ int sense_len = rsp->fcp_sense_len;
+
+ if (cmnd) {
+ if (vfc_cmd->response_flags & IBMVFC_ADAPTER_RESID_VALID)
+ scsi_set_resid(cmnd, vfc_cmd->adapter_resid);
+ else if (rsp->flags & FCP_RESID_UNDER)
+ scsi_set_resid(cmnd, rsp->fcp_resid);
+ else
+ scsi_set_resid(cmnd, 0);
+
+ if (vfc_cmd->status) {
+ cmnd->result = ibmvfc_get_err_result(vfc_cmd);
+
+ if (rsp->flags & FCP_RSP_LEN_VALID)
+ rsp_len = rsp->fcp_rsp_len;
+ if ((sense_len + rsp_len) > SCSI_SENSE_BUFFERSIZE)
+ sense_len = SCSI_SENSE_BUFFERSIZE - rsp_len;
+ if ((rsp->flags & FCP_SNS_LEN_VALID) && rsp->fcp_sense_len)
+ memcpy(cmnd->sense_buffer, rsp->data.sense + rsp_len, sense_len);
+
+ ibmvfc_log_error(evt);
+ }
+
+ if (!cmnd->result &&
+ (scsi_bufflen(cmnd) - scsi_get_resid(cmnd) < cmnd->underflow))
+ cmnd->result = (DID_ERROR << 16);
+
+ scsi_dma_unmap(cmnd);
+ cmnd->scsi_done(cmnd);
+ }
+
+ ibmvfc_free_event(evt);
+}
+
+/**
+ * ibmvfc_host_chkready - Check if the host can accept commands
+ * @vhost: struct ibmvfc host
+ *
+ * Returns:
+ * 1 if host can accept command / 0 if not
+ **/
+static inline int ibmvfc_host_chkready(struct ibmvfc_host *vhost)
+{
+ int result = 0;
+
+ switch (vhost->state) {
+ case IBMVFC_LINK_DEAD:
+ case IBMVFC_HOST_OFFLINE:
+ result = DID_NO_CONNECT << 16;
+ break;
+ case IBMVFC_NO_CRQ:
+ case IBMVFC_INITIALIZING:
+ case IBMVFC_HALTED:
+ case IBMVFC_LINK_DOWN:
+ result = DID_REQUEUE << 16;
+ break;
+ case IBMVFC_ACTIVE:
+ result = 0;
+ break;
+ };
+
+ return result;
+}
+
+/**
+ * ibmvfc_queuecommand - The queuecommand function of the scsi template
+ * @cmnd: struct scsi_cmnd to be executed
+ * @done: Callback function to be called when cmnd is completed
+ *
+ * Returns:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_queuecommand(struct scsi_cmnd *cmnd,
+ void (*done) (struct scsi_cmnd *))
+{
+ struct ibmvfc_host *vhost = shost_priv(cmnd->device->host);
+ struct fc_rport *rport = starget_to_rport(scsi_target(cmnd->device));
+ struct ibmvfc_cmd *vfc_cmd;
+ struct ibmvfc_event *evt;
+ u8 tag[2];
+ int rc;
+
+ if (unlikely((rc = fc_remote_port_chkready(rport))) ||
+ unlikely((rc = ibmvfc_host_chkready(vhost)))) {
+ cmnd->result = rc;
+ done(cmnd);
+ return 0;
+ }
+
+ cmnd->result = (DID_OK << 16);
+ evt = ibmvfc_get_event(vhost);
+ ibmvfc_init_event(evt, ibmvfc_scsi_done, IBMVFC_CMD_FORMAT);
+ evt->cmnd = cmnd;
+ cmnd->scsi_done = done;
+ vfc_cmd = &evt->iu.cmd;
+ memset(vfc_cmd, 0, sizeof(*vfc_cmd));
+ vfc_cmd->resp.va = (u64)evt->crq.ioba + offsetof(struct ibmvfc_cmd, rsp);
+ vfc_cmd->resp.len = sizeof(vfc_cmd->rsp);
+ vfc_cmd->frame_type = IBMVFC_SCSI_FCP_TYPE;
+ vfc_cmd->payload_len = sizeof(vfc_cmd->iu);
+ vfc_cmd->resp_len = sizeof(vfc_cmd->rsp);
+ vfc_cmd->cancel_key = (unsigned long)cmnd->device->hostdata;
+ vfc_cmd->tgt_scsi_id = rport->port_id;
+ if ((rport->supported_classes & FC_COS_CLASS3) &&
+ (fc_host_supported_classes(vhost->host) & FC_COS_CLASS3))
+ vfc_cmd->flags = IBMVFC_CLASS_3_ERR;
+ vfc_cmd->iu.xfer_len = scsi_bufflen(cmnd);
+ int_to_scsilun(cmnd->device->lun, &vfc_cmd->iu.lun);
+ memcpy(vfc_cmd->iu.cdb, cmnd->cmnd, cmnd->cmd_len);
+
+ if (scsi_populate_tag_msg(cmnd, tag)) {
+ vfc_cmd->task_tag = tag[1];
+ switch (tag[0]) {
+ case MSG_SIMPLE_TAG:
+ vfc_cmd->iu.pri_task_attr = IBMVFC_SIMPLE_TASK;
+ break;
+ case MSG_HEAD_TAG:
+ vfc_cmd->iu.pri_task_attr = IBMVFC_HEAD_OF_QUEUE;
+ break;
+ case MSG_ORDERED_TAG:
+ vfc_cmd->iu.pri_task_attr = IBMVFC_ORDERED_TASK;
+ break;
+ };
+ }
+
+ if (likely(!(rc = ibmvfc_map_sg_data(cmnd, evt, vfc_cmd, vhost->dev))))
+ return ibmvfc_send_event(evt, vhost, 0);
+
+ ibmvfc_free_event(evt);
+ if (rc == -ENOMEM)
+ return SCSI_MLQUEUE_HOST_BUSY;
+
+ if (vhost->log_level > IBMVFC_DEFAULT_LOG_LEVEL)
+ scmd_printk(KERN_ERR, cmnd,
+ "Failed to map DMA buffer for command. rc=%d\n", rc);
+
+ cmnd->result = DID_ERROR << 16;
+ done(cmnd);
+ return 0;
+}
+
+/**
+ * ibmvfc_sync_completion - Signal that a synchronous command has completed
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_sync_completion(struct ibmvfc_event *evt)
+{
+ /* copy the response back */
+ if (evt->sync_iu)
+ *evt->sync_iu = *evt->xfer_iu;
+
+ complete(&evt->comp);
+}
+
+/**
+ * ibmvfc_reset_device - Reset the device with the specified reset type
+ * @sdev: scsi device to reset
+ * @type: reset type
+ * @desc: reset type description for log messages
+ *
+ * Returns:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_reset_device(struct scsi_device *sdev, int type, char *desc)
+{
+ struct ibmvfc_host *vhost = shost_priv(sdev->host);
+ struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
+ struct ibmvfc_cmd *tmf;
+ struct ibmvfc_event *evt;
+ union ibmvfc_iu rsp_iu;
+ struct ibmvfc_fcp_rsp *fc_rsp = &rsp_iu.cmd.rsp;
+ int rsp_rc = -EBUSY;
+ unsigned long flags;
+ int rsp_code = 0;
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ if (vhost->state == IBMVFC_ACTIVE) {
+ evt = ibmvfc_get_event(vhost);
+ ibmvfc_init_event(evt, ibmvfc_sync_completion, IBMVFC_CMD_FORMAT);
+
+ tmf = &evt->iu.cmd;
+ memset(tmf, 0, sizeof(*tmf));
+ tmf->resp.va = (u64)evt->crq.ioba + offsetof(struct ibmvfc_cmd, rsp);
+ tmf->resp.len = sizeof(tmf->rsp);
+ tmf->frame_type = IBMVFC_SCSI_FCP_TYPE;
+ tmf->payload_len = sizeof(tmf->iu);
+ tmf->resp_len = sizeof(tmf->rsp);
+ tmf->cancel_key = (unsigned long)sdev->hostdata;
+ tmf->tgt_scsi_id = rport->port_id;
+ int_to_scsilun(sdev->lun, &tmf->iu.lun);
+ tmf->flags = (IBMVFC_NO_MEM_DESC | IBMVFC_TMF);
+ tmf->iu.tmf_flags = type;
+ evt->sync_iu = &rsp_iu;
+
+ init_completion(&evt->comp);
+ rsp_rc = ibmvfc_send_event(evt, vhost, default_timeout);
+ }
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+
+ if (rsp_rc != 0) {
+ sdev_printk(KERN_ERR, sdev, "Failed to send %s reset event. rc=%d\n",
+ desc, rsp_rc);
+ return -EIO;
+ }
+
+ sdev_printk(KERN_INFO, sdev, "Resetting %s\n", desc);
+ wait_for_completion(&evt->comp);
+
+ if (rsp_iu.cmd.status) {
+ if (fc_rsp->flags & FCP_RSP_LEN_VALID)
+ rsp_code = fc_rsp->data.info.rsp_code;
+
+ sdev_printk(KERN_ERR, sdev, "%s reset failed: %s (%x:%x) "
+ "flags: %x fcp_rsp: %x, scsi_status: %x\n",
+ desc, ibmvfc_get_cmd_error(rsp_iu.cmd.status, rsp_iu.cmd.error),
+ rsp_iu.cmd.status, rsp_iu.cmd.error, fc_rsp->flags, rsp_code,
+ fc_rsp->scsi_status);
+ rsp_rc = -EIO;
+ } else
+ sdev_printk(KERN_INFO, sdev, "%s reset successful\n", desc);
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ ibmvfc_free_event(evt);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ return rsp_rc;
+}
+
+/**
+ * ibmvfc_abort_task_set - Abort outstanding commands to the device
+ * @sdev: scsi device to abort commands
+ *
+ * This sends an Abort Task Set to the VIOS for the specified device. This does
+ * NOT send any cancel to the VIOS. That must be done separately.
+ *
+ * Returns:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_abort_task_set(struct scsi_device *sdev)
+{
+ struct ibmvfc_host *vhost = shost_priv(sdev->host);
+ struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
+ struct ibmvfc_cmd *tmf;
+ struct ibmvfc_event *evt, *found_evt;
+ union ibmvfc_iu rsp_iu;
+ struct ibmvfc_fcp_rsp *fc_rsp = &rsp_iu.cmd.rsp;
+ int rsp_rc = -EBUSY;
+ unsigned long flags;
+ int rsp_code = 0;
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ found_evt = NULL;
+ list_for_each_entry(evt, &vhost->sent, queue) {
+ if (evt->cmnd && evt->cmnd->device == sdev) {
+ found_evt = evt;
+ break;
+ }
+ }
+
+ if (!found_evt) {
+ if (vhost->log_level > IBMVFC_DEFAULT_LOG_LEVEL)
+ sdev_printk(KERN_INFO, sdev, "No events found to abort\n");
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ return 0;
+ }
+
+ if (vhost->state == IBMVFC_ACTIVE) {
+ evt = ibmvfc_get_event(vhost);
+ ibmvfc_init_event(evt, ibmvfc_sync_completion, IBMVFC_CMD_FORMAT);
+
+ tmf = &evt->iu.cmd;
+ memset(tmf, 0, sizeof(*tmf));
+ tmf->resp.va = (u64)evt->crq.ioba + offsetof(struct ibmvfc_cmd, rsp);
+ tmf->resp.len = sizeof(tmf->rsp);
+ tmf->frame_type = IBMVFC_SCSI_FCP_TYPE;
+ tmf->payload_len = sizeof(tmf->iu);
+ tmf->resp_len = sizeof(tmf->rsp);
+ tmf->cancel_key = (unsigned long)sdev->hostdata;
+ tmf->tgt_scsi_id = rport->port_id;
+ int_to_scsilun(sdev->lun, &tmf->iu.lun);
+ tmf->flags = (IBMVFC_NO_MEM_DESC | IBMVFC_TMF);
+ tmf->iu.tmf_flags = IBMVFC_ABORT_TASK_SET;
+ evt->sync_iu = &rsp_iu;
+
+ init_completion(&evt->comp);
+ rsp_rc = ibmvfc_send_event(evt, vhost, default_timeout);
+ }
+
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+
+ if (rsp_rc != 0) {
+ sdev_printk(KERN_ERR, sdev, "Failed to send abort. rc=%d\n", rsp_rc);
+ return -EIO;
+ }
+
+ sdev_printk(KERN_INFO, sdev, "Aborting outstanding commands\n");
+ wait_for_completion(&evt->comp);
+
+ if (rsp_iu.cmd.status) {
+ if (fc_rsp->flags & FCP_RSP_LEN_VALID)
+ rsp_code = fc_rsp->data.info.rsp_code;
+
+ sdev_printk(KERN_ERR, sdev, "Abort failed: %s (%x:%x) "
+ "flags: %x fcp_rsp: %x, scsi_status: %x\n",
+ ibmvfc_get_cmd_error(rsp_iu.cmd.status, rsp_iu.cmd.error),
+ rsp_iu.cmd.status, rsp_iu.cmd.error, fc_rsp->flags, rsp_code,
+ fc_rsp->scsi_status);
+ rsp_rc = -EIO;
+ } else
+ sdev_printk(KERN_INFO, sdev, "Abort successful\n");
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ ibmvfc_free_event(evt);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ return rsp_rc;
+}
+
+/**
+ * ibmvfc_cancel_all - Cancel all outstanding commands to the device
+ * @sdev: scsi device to cancel commands
+ * @type: type of error recovery being performed
+ *
+ * This sends a cancel to the VIOS for the specified device. This does
+ * NOT send any abort to the actual device. That must be done separately.
+ *
+ * Returns:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_cancel_all(struct scsi_device *sdev, int type)
+{
+ struct ibmvfc_host *vhost = shost_priv(sdev->host);
+ struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
+ struct ibmvfc_tmf *tmf;
+ struct ibmvfc_event *evt, *found_evt;
+ union ibmvfc_iu rsp;
+ int rsp_rc = -EBUSY;
+ unsigned long flags;
+ u16 status;
+
+ ENTER;
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ found_evt = NULL;
+ list_for_each_entry(evt, &vhost->sent, queue) {
+ if (evt->cmnd && evt->cmnd->device == sdev) {
+ found_evt = evt;
+ break;
+ }
+ }
+
+ if (!found_evt) {
+ if (vhost->log_level > IBMVFC_DEFAULT_LOG_LEVEL)
+ sdev_printk(KERN_INFO, sdev, "No events found to cancel\n");
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ return 0;
+ }
+
+ if (vhost->state == IBMVFC_ACTIVE) {
+ evt = ibmvfc_get_event(vhost);
+ ibmvfc_init_event(evt, ibmvfc_sync_completion, IBMVFC_MAD_FORMAT);
+
+ tmf = &evt->iu.tmf;
+ memset(tmf, 0, sizeof(*tmf));
+ tmf->common.version = 1;
+ tmf->common.opcode = IBMVFC_TMF_MAD;
+ tmf->common.length = sizeof(*tmf);
+ tmf->scsi_id = rport->port_id;
+ int_to_scsilun(sdev->lun, &tmf->lun);
+ tmf->flags = (type | IBMVFC_TMF_LUA_VALID);
+ tmf->cancel_key = (unsigned long)sdev->hostdata;
+ tmf->my_cancel_key = (IBMVFC_TMF_CANCEL_KEY | (unsigned long)sdev->hostdata);
+
+ evt->sync_iu = &rsp;
+ init_completion(&evt->comp);
+ rsp_rc = ibmvfc_send_event(evt, vhost, default_timeout);
+ }
+
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+
+ if (rsp_rc != 0) {
+ sdev_printk(KERN_ERR, sdev, "Failed to send cancel event. rc=%d\n", rsp_rc);
+ return -EIO;
+ }
+
+ sdev_printk(KERN_INFO, sdev, "Cancelling outstanding commands.\n");
+
+ wait_for_completion(&evt->comp);
+ status = rsp.mad_common.status;
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ ibmvfc_free_event(evt);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+
+ if (status != IBMVFC_MAD_SUCCESS) {
+ sdev_printk(KERN_WARNING, sdev, "Cancel failed with rc=%x\n", status);
+ return -EIO;
+ }
+
+ sdev_printk(KERN_INFO, sdev, "Successfully cancelled outstanding commands\n");
+ return 0;
+}
+
+/**
+ * ibmvfc_eh_abort_handler - Abort a command
+ * @cmd: scsi command to abort
+ *
+ * Returns:
+ * SUCCESS / FAILED
+ **/
+static int ibmvfc_eh_abort_handler(struct scsi_cmnd *cmd)
+{
+ struct ibmvfc_host *vhost = shost_priv(cmd->device->host);
+ struct ibmvfc_event *evt, *pos;
+ int cancel_rc, abort_rc;
+ unsigned long flags;
+
+ ENTER;
+ ibmvfc_wait_while_resetting(vhost);
+ cancel_rc = ibmvfc_cancel_all(cmd->device, IBMVFC_TMF_ABORT_TASK_SET);
+ abort_rc = ibmvfc_abort_task_set(cmd->device);
+
+ if (!cancel_rc && !abort_rc) {
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ list_for_each_entry_safe(evt, pos, &vhost->sent, queue) {
+ if (evt->cmnd && evt->cmnd->device == cmd->device)
+ ibmvfc_fail_request(evt, DID_ABORT);
+ }
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ LEAVE;
+ return SUCCESS;
+ }
+
+ LEAVE;
+ return FAILED;
+}
+
+/**
+ * ibmvfc_eh_device_reset_handler - Reset a single LUN
+ * @cmd: scsi command struct
+ *
+ * Returns:
+ * SUCCESS / FAILED
+ **/
+static int ibmvfc_eh_device_reset_handler(struct scsi_cmnd *cmd)
+{
+ struct ibmvfc_host *vhost = shost_priv(cmd->device->host);
+ struct ibmvfc_event *evt, *pos;
+ int cancel_rc, reset_rc;
+ unsigned long flags;
+
+ ENTER;
+ ibmvfc_wait_while_resetting(vhost);
+ cancel_rc = ibmvfc_cancel_all(cmd->device, IBMVFC_TMF_LUN_RESET);
+ reset_rc = ibmvfc_reset_device(cmd->device, IBMVFC_LUN_RESET, "LUN");
+
+ if (!cancel_rc && !reset_rc) {
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ list_for_each_entry_safe(evt, pos, &vhost->sent, queue) {
+ if (evt->cmnd && evt->cmnd->device == cmd->device)
+ ibmvfc_fail_request(evt, DID_ABORT);
+ }
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ LEAVE;
+ return SUCCESS;
+ }
+
+ LEAVE;
+ return FAILED;
+}
+
+/**
+ * ibmvfc_dev_cancel_all - Device iterated cancel all function
+ * @sdev: scsi device struct
+ * @data: return code
+ *
+ **/
+static void ibmvfc_dev_cancel_all(struct scsi_device *sdev, void *data)
+{
+ unsigned long *rc = data;
+ *rc |= ibmvfc_cancel_all(sdev, IBMVFC_TMF_TGT_RESET);
+}
+
+/**
+ * ibmvfc_dev_abort_all - Device iterated abort task set function
+ * @sdev: scsi device struct
+ * @data: return code
+ *
+ **/
+static void ibmvfc_dev_abort_all(struct scsi_device *sdev, void *data)
+{
+ unsigned long *rc = data;
+ *rc |= ibmvfc_abort_task_set(sdev);
+}
+
+/**
+ * ibmvfc_eh_target_reset_handler - Reset the target
+ * @cmd: scsi command struct
+ *
+ * Returns:
+ * SUCCESS / FAILED
+ **/
+static int ibmvfc_eh_target_reset_handler(struct scsi_cmnd *cmd)
+{
+ struct ibmvfc_host *vhost = shost_priv(cmd->device->host);
+ struct scsi_target *starget = scsi_target(cmd->device);
+ struct ibmvfc_event *evt, *pos;
+ int reset_rc;
+ unsigned long cancel_rc = 0;
+ unsigned long flags;
+
+ ENTER;
+ ibmvfc_wait_while_resetting(vhost);
+ starget_for_each_device(starget, &cancel_rc, ibmvfc_dev_cancel_all);
+ reset_rc = ibmvfc_reset_device(cmd->device, IBMVFC_TARGET_RESET, "target");
+
+ if (!cancel_rc && !reset_rc) {
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ list_for_each_entry_safe(evt, pos, &vhost->sent, queue) {
+ if (evt->cmnd && scsi_target(evt->cmnd->device) == starget)
+ ibmvfc_fail_request(evt, DID_ABORT);
+ }
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ LEAVE;
+ return SUCCESS;
+ }
+
+ LEAVE;
+ return FAILED;
+}
+
+/**
+ * ibmvfc_eh_host_reset_handler - Reset the connection to the server
+ * @cmd: struct scsi_cmnd having problems
+ *
+ **/
+static int ibmvfc_eh_host_reset_handler(struct scsi_cmnd *cmd)
+{
+ int rc;
+ struct ibmvfc_host *vhost = shost_priv(cmd->device->host);
+
+ dev_err(vhost->dev, "Resetting connection due to error recovery\n");
+ rc = ibmvfc_issue_fc_host_lip(vhost->host);
+ return rc ? FAILED : SUCCESS;
+}
+
+/**
+ * ibmvfc_terminate_rport_io - Terminate all pending I/O to the rport.
+ * @rport: rport struct
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_terminate_rport_io(struct fc_rport *rport)
+{
+ struct scsi_target *starget = to_scsi_target(&rport->dev);
+ struct Scsi_Host *shost = dev_to_shost(starget->dev.parent);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ struct ibmvfc_event *evt, *pos;
+ unsigned long cancel_rc = 0;
+ unsigned long abort_rc = 0;
+ unsigned long flags;
+
+ ENTER;
+ starget_for_each_device(starget, &cancel_rc, ibmvfc_dev_cancel_all);
+ starget_for_each_device(starget, &abort_rc, ibmvfc_dev_abort_all);
+
+ if (!cancel_rc && !abort_rc) {
+ spin_lock_irqsave(shost->host_lock, flags);
+ list_for_each_entry_safe(evt, pos, &vhost->sent, queue) {
+ if (evt->cmnd && scsi_target(evt->cmnd->device) == starget)
+ ibmvfc_fail_request(evt, DID_ABORT);
+ }
+ spin_unlock_irqrestore(shost->host_lock, flags);
+ } else
+ ibmvfc_issue_fc_host_lip(shost);
+
+ scsi_target_unblock(&rport->dev);
+ LEAVE;
+}
+
+static const struct {
+ enum ibmvfc_async_event ae;
+ const char *desc;
+} ae_desc [] = {
+ { IBMVFC_AE_ELS_PLOGI, "PLOGI" },
+ { IBMVFC_AE_ELS_LOGO, "LOGO" },
+ { IBMVFC_AE_ELS_PRLO, "PRLO" },
+ { IBMVFC_AE_SCN_NPORT, "N-Port SCN" },
+ { IBMVFC_AE_SCN_GROUP, "Group SCN" },
+ { IBMVFC_AE_SCN_DOMAIN, "Domain SCN" },
+ { IBMVFC_AE_SCN_FABRIC, "Fabric SCN" },
+ { IBMVFC_AE_LINK_UP, "Link Up" },
+ { IBMVFC_AE_LINK_DOWN, "Link Down" },
+ { IBMVFC_AE_LINK_DEAD, "Link Dead" },
+ { IBMVFC_AE_HALT, "Halt" },
+ { IBMVFC_AE_RESUME, "Resume" },
+ { IBMVFC_AE_ADAPTER_FAILED, "Adapter Failed" },
+};
+
+static const char *unknown_ae = "Unknown async";
+
+/**
+ * ibmvfc_get_ae_desc - Get text description for async event
+ * @ae: async event
+ *
+ **/
+static const char *ibmvfc_get_ae_desc(u64 ae)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ae_desc); i++)
+ if (ae_desc[i].ae == ae)
+ return ae_desc[i].desc;
+
+ return unknown_ae;
+}
+
+/**
+ * ibmvfc_handle_async - Handle an async event from the adapter
+ * @crq: crq to process
+ * @vhost: ibmvfc host struct
+ *
+ **/
+static void ibmvfc_handle_async(struct ibmvfc_async_crq *crq,
+ struct ibmvfc_host *vhost)
+{
+ const char *desc = ibmvfc_get_ae_desc(crq->event);
+
+ ibmvfc_log(vhost, 2, "%s event received\n", desc);
+
+ switch (crq->event) {
+ case IBMVFC_AE_LINK_UP:
+ case IBMVFC_AE_RESUME:
+ vhost->events_to_log |= IBMVFC_AE_LINKUP;
+ ibmvfc_init_host(vhost);
+ break;
+ case IBMVFC_AE_SCN_FABRIC:
+ vhost->events_to_log |= IBMVFC_AE_RSCN;
+ ibmvfc_init_host(vhost);
+ break;
+ case IBMVFC_AE_SCN_NPORT:
+ case IBMVFC_AE_SCN_GROUP:
+ case IBMVFC_AE_SCN_DOMAIN:
+ vhost->events_to_log |= IBMVFC_AE_RSCN;
+ case IBMVFC_AE_ELS_LOGO:
+ case IBMVFC_AE_ELS_PRLO:
+ case IBMVFC_AE_ELS_PLOGI:
+ ibmvfc_reinit_host(vhost);
+ break;
+ case IBMVFC_AE_LINK_DOWN:
+ case IBMVFC_AE_ADAPTER_FAILED:
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DOWN);
+ break;
+ case IBMVFC_AE_LINK_DEAD:
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ break;
+ case IBMVFC_AE_HALT:
+ ibmvfc_link_down(vhost, IBMVFC_HALTED);
+ break;
+ default:
+ dev_err(vhost->dev, "Unknown async event received: %ld\n", crq->event);
+ break;
+ };
+}
+
+/**
+ * ibmvfc_handle_crq - Handles and frees received events in the CRQ
+ * @crq: Command/Response queue
+ * @vhost: ibmvfc host struct
+ *
+ **/
+static void ibmvfc_handle_crq(struct ibmvfc_crq *crq, struct ibmvfc_host *vhost)
+{
+ long rc;
+ struct ibmvfc_event *evt = (struct ibmvfc_event *)crq->ioba;
+
+ switch (crq->valid) {
+ case IBMVFC_CRQ_INIT_RSP:
+ switch (crq->format) {
+ case IBMVFC_CRQ_INIT:
+ dev_info(vhost->dev, "Partner initialized\n");
+ /* Send back a response */
+ rc = ibmvfc_send_crq_init_complete(vhost);
+ if (rc == 0)
+ ibmvfc_init_host(vhost);
+ else
+ dev_err(vhost->dev, "Unable to send init rsp. rc=%ld\n", rc);
+ break;
+ case IBMVFC_CRQ_INIT_COMPLETE:
+ dev_info(vhost->dev, "Partner initialization complete\n");
+ ibmvfc_init_host(vhost);
+ break;
+ default:
+ dev_err(vhost->dev, "Unknown crq message type: %d\n", crq->format);
+ }
+ return;
+ case IBMVFC_CRQ_XPORT_EVENT:
+ vhost->state = IBMVFC_NO_CRQ;
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_NONE);
+ if (crq->format == IBMVFC_PARTITION_MIGRATED) {
+ /* We need to re-setup the interpartition connection */
+ dev_info(vhost->dev, "Re-enabling adapter\n");
+ vhost->client_migrated = 1;
+ ibmvfc_purge_requests(vhost, DID_REQUEUE);
+ if ((rc = ibmvfc_reenable_crq_queue(vhost)) ||
+ (rc = ibmvfc_send_crq_init(vhost))) {
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ dev_err(vhost->dev, "Error after enable (rc=%ld)\n", rc);
+ } else
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DOWN);
+ } else {
+ dev_err(vhost->dev, "Virtual adapter failed (rc=%d)\n", crq->format);
+
+ ibmvfc_purge_requests(vhost, DID_ERROR);
+ if ((rc = ibmvfc_reset_crq(vhost)) ||
+ (rc = ibmvfc_send_crq_init(vhost))) {
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ dev_err(vhost->dev, "Error after reset (rc=%ld)\n", rc);
+ } else
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DOWN);
+ }
+ return;
+ case IBMVFC_CRQ_CMD_RSP:
+ break;
+ default:
+ dev_err(vhost->dev, "Got an invalid message type 0x%02x\n", crq->valid);
+ return;
+ }
+
+ if (crq->format == IBMVFC_ASYNC_EVENT)
+ return;
+
+ /* The only kind of payload CRQs we should get are responses to
+ * things we send. Make sure this response is to something we
+ * actually sent
+ */
+ if (unlikely(!ibmvfc_valid_event(&vhost->pool, evt))) {
+ dev_err(vhost->dev, "Returned correlation_token 0x%08lx is invalid!\n",
+ crq->ioba);
+ return;
+ }
+
+ if (unlikely(atomic_read(&evt->free))) {
+ dev_err(vhost->dev, "Received duplicate correlation_token 0x%08lx!\n",
+ crq->ioba);
+ return;
+ }
+
+ del_timer(&evt->timer);
+ list_del(&evt->queue);
+ ibmvfc_trc_end(evt);
+ evt->done(evt);
+}
+
+/**
+ * ibmvfc_scan_finished - Check if the device scan is done.
+ * @shost: scsi host struct
+ * @time: current elapsed time
+ *
+ * Returns:
+ * 0 if scan is not done / 1 if scan is done
+ **/
+static int ibmvfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
+{
+ unsigned long flags;
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ int done = 0;
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ if (time >= (init_timeout * HZ)) {
+ dev_info(vhost->dev, "Scan taking longer than %d seconds, "
+ "continuing initialization\n", init_timeout);
+ done = 1;
+ }
+
+ if (vhost->state != IBMVFC_NO_CRQ && vhost->action == IBMVFC_HOST_ACTION_NONE)
+ done = 1;
+ spin_unlock_irqrestore(shost->host_lock, flags);
+ return done;
+}
+
+/**
+ * ibmvfc_slave_alloc - Setup the device's task set value
+ * @sdev: struct scsi_device device to configure
+ *
+ * Set the device's task set value so that error handling works as
+ * expected.
+ *
+ * Returns:
+ * 0 on success / -ENXIO if device does not exist
+ **/
+static int ibmvfc_slave_alloc(struct scsi_device *sdev)
+{
+ struct Scsi_Host *shost = sdev->host;
+ struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ unsigned long flags = 0;
+
+ if (!rport || fc_remote_port_chkready(rport))
+ return -ENXIO;
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ sdev->hostdata = (void *)(unsigned long)vhost->task_set++;
+ spin_unlock_irqrestore(shost->host_lock, flags);
+ return 0;
+}
+
+/**
+ * ibmvfc_slave_configure - Configure the device
+ * @sdev: struct scsi_device device to configure
+ *
+ * Enable allow_restart for a device if it is a disk. Adjust the
+ * queue_depth here also.
+ *
+ * Returns:
+ * 0
+ **/
+static int ibmvfc_slave_configure(struct scsi_device *sdev)
+{
+ struct Scsi_Host *shost = sdev->host;
+ struct fc_rport *rport = starget_to_rport(sdev->sdev_target);
+ unsigned long flags = 0;
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ if (sdev->type == TYPE_DISK)
+ sdev->allow_restart = 1;
+
+ if (sdev->tagged_supported) {
+ scsi_set_tag_type(sdev, MSG_SIMPLE_TAG);
+ scsi_activate_tcq(sdev, sdev->queue_depth);
+ } else
+ scsi_deactivate_tcq(sdev, sdev->queue_depth);
+
+ rport->dev_loss_tmo = dev_loss_tmo;
+ spin_unlock_irqrestore(shost->host_lock, flags);
+ return 0;
+}
+
+/**
+ * ibmvfc_change_queue_depth - Change the device's queue depth
+ * @sdev: scsi device struct
+ * @qdepth: depth to set
+ *
+ * Return value:
+ * actual depth set
+ **/
+static int ibmvfc_change_queue_depth(struct scsi_device *sdev, int qdepth)
+{
+ if (qdepth > IBMVFC_MAX_CMDS_PER_LUN)
+ qdepth = IBMVFC_MAX_CMDS_PER_LUN;
+
+ scsi_adjust_queue_depth(sdev, 0, qdepth);
+ return sdev->queue_depth;
+}
+
+/**
+ * ibmvfc_change_queue_type - Change the device's queue type
+ * @sdev: scsi device struct
+ * @tag_type: type of tags to use
+ *
+ * Return value:
+ * actual queue type set
+ **/
+static int ibmvfc_change_queue_type(struct scsi_device *sdev, int tag_type)
+{
+ if (sdev->tagged_supported) {
+ scsi_set_tag_type(sdev, tag_type);
+
+ if (tag_type)
+ scsi_activate_tcq(sdev, sdev->queue_depth);
+ else
+ scsi_deactivate_tcq(sdev, sdev->queue_depth);
+ } else
+ tag_type = 0;
+
+ return tag_type;
+}
+
+static ssize_t ibmvfc_show_host_partition_name(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct Scsi_Host *shost = class_to_shost(dev);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+
+ return snprintf(buf, PAGE_SIZE, "%s\n",
+ vhost->login_buf->resp.partition_name);
+}
+
+static struct device_attribute ibmvfc_host_partition_name = {
+ .attr = {
+ .name = "partition_name",
+ .mode = S_IRUGO,
+ },
+ .show = ibmvfc_show_host_partition_name,
+};
+
+static ssize_t ibmvfc_show_host_device_name(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct Scsi_Host *shost = class_to_shost(dev);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+
+ return snprintf(buf, PAGE_SIZE, "%s\n",
+ vhost->login_buf->resp.device_name);
+}
+
+static struct device_attribute ibmvfc_host_device_name = {
+ .attr = {
+ .name = "device_name",
+ .mode = S_IRUGO,
+ },
+ .show = ibmvfc_show_host_device_name,
+};
+
+static ssize_t ibmvfc_show_host_loc_code(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct Scsi_Host *shost = class_to_shost(dev);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+
+ return snprintf(buf, PAGE_SIZE, "%s\n",
+ vhost->login_buf->resp.port_loc_code);
+}
+
+static struct device_attribute ibmvfc_host_loc_code = {
+ .attr = {
+ .name = "port_loc_code",
+ .mode = S_IRUGO,
+ },
+ .show = ibmvfc_show_host_loc_code,
+};
+
+static ssize_t ibmvfc_show_host_drc_name(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct Scsi_Host *shost = class_to_shost(dev);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+
+ return snprintf(buf, PAGE_SIZE, "%s\n",
+ vhost->login_buf->resp.drc_name);
+}
+
+static struct device_attribute ibmvfc_host_drc_name = {
+ .attr = {
+ .name = "drc_name",
+ .mode = S_IRUGO,
+ },
+ .show = ibmvfc_show_host_drc_name,
+};
+
+static ssize_t ibmvfc_show_host_npiv_version(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct Scsi_Host *shost = class_to_shost(dev);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ return snprintf(buf, PAGE_SIZE, "%d\n", vhost->login_buf->resp.version);
+}
+
+static struct device_attribute ibmvfc_host_npiv_version = {
+ .attr = {
+ .name = "npiv_version",
+ .mode = S_IRUGO,
+ },
+ .show = ibmvfc_show_host_npiv_version,
+};
+
+/**
+ * ibmvfc_show_log_level - Show the adapter's error logging level
+ * @dev: class device struct
+ * @buf: buffer
+ *
+ * Return value:
+ * number of bytes printed to buffer
+ **/
+static ssize_t ibmvfc_show_log_level(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct Scsi_Host *shost = class_to_shost(dev);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ unsigned long flags = 0;
+ int len;
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ len = snprintf(buf, PAGE_SIZE, "%d\n", vhost->log_level);
+ spin_unlock_irqrestore(shost->host_lock, flags);
+ return len;
+}
+
+/**
+ * ibmvfc_store_log_level - Change the adapter's error logging level
+ * @dev: class device struct
+ * @buf: buffer
+ *
+ * Return value:
+ * number of bytes printed to buffer
+ **/
+static ssize_t ibmvfc_store_log_level(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct Scsi_Host *shost = class_to_shost(dev);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ unsigned long flags = 0;
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ vhost->log_level = simple_strtoul(buf, NULL, 10);
+ spin_unlock_irqrestore(shost->host_lock, flags);
+ return strlen(buf);
+}
+
+static struct device_attribute ibmvfc_log_level_attr = {
+ .attr = {
+ .name = "log_level",
+ .mode = S_IRUGO | S_IWUSR,
+ },
+ .show = ibmvfc_show_log_level,
+ .store = ibmvfc_store_log_level
+};
+
+#ifdef CONFIG_SCSI_IBMVFC_TRACE
+/**
+ * ibmvfc_read_trace - Dump the adapter trace
+ * @kobj: kobject struct
+ * @bin_attr: bin_attribute struct
+ * @buf: buffer
+ * @off: offset
+ * @count: buffer size
+ *
+ * Return value:
+ * number of bytes printed to buffer
+ **/
+static ssize_t ibmvfc_read_trace(struct kobject *kobj,
+ struct bin_attribute *bin_attr,
+ char *buf, loff_t off, size_t count)
+{
+ struct device *dev = container_of(kobj, struct device, kobj);
+ struct Scsi_Host *shost = class_to_shost(dev);
+ struct ibmvfc_host *vhost = shost_priv(shost);
+ unsigned long flags = 0;
+ int size = IBMVFC_TRACE_SIZE;
+ char *src = (char *)vhost->trace;
+
+ if (off > size)
+ return 0;
+ if (off + count > size) {
+ size -= off;
+ count = size;
+ }
+
+ spin_lock_irqsave(shost->host_lock, flags);
+ memcpy(buf, &src[off], count);
+ spin_unlock_irqrestore(shost->host_lock, flags);
+ return count;
+}
+
+static struct bin_attribute ibmvfc_trace_attr = {
+ .attr = {
+ .name = "trace",
+ .mode = S_IRUGO,
+ },
+ .size = 0,
+ .read = ibmvfc_read_trace,
+};
+#endif
+
+static struct device_attribute *ibmvfc_attrs[] = {
+ &ibmvfc_host_partition_name,
+ &ibmvfc_host_device_name,
+ &ibmvfc_host_loc_code,
+ &ibmvfc_host_drc_name,
+ &ibmvfc_host_npiv_version,
+ &ibmvfc_log_level_attr,
+ NULL
+};
+
+static struct scsi_host_template driver_template = {
+ .module = THIS_MODULE,
+ .name = "IBM POWER Virtual FC Adapter",
+ .proc_name = IBMVFC_NAME,
+ .queuecommand = ibmvfc_queuecommand,
+ .eh_abort_handler = ibmvfc_eh_abort_handler,
+ .eh_device_reset_handler = ibmvfc_eh_device_reset_handler,
+ .eh_target_reset_handler = ibmvfc_eh_target_reset_handler,
+ .eh_host_reset_handler = ibmvfc_eh_host_reset_handler,
+ .slave_alloc = ibmvfc_slave_alloc,
+ .slave_configure = ibmvfc_slave_configure,
+ .scan_finished = ibmvfc_scan_finished,
+ .change_queue_depth = ibmvfc_change_queue_depth,
+ .change_queue_type = ibmvfc_change_queue_type,
+ .cmd_per_lun = 16,
+ .can_queue = IBMVFC_MAX_REQUESTS_DEFAULT,
+ .this_id = -1,
+ .sg_tablesize = SG_ALL,
+ .max_sectors = IBMVFC_MAX_SECTORS,
+ .use_clustering = ENABLE_CLUSTERING,
+ .shost_attrs = ibmvfc_attrs,
+};
+
+/**
+ * ibmvfc_next_async_crq - Returns the next entry in async queue
+ * @vhost: ibmvfc host struct
+ *
+ * Returns:
+ * Pointer to next entry in queue / NULL if empty
+ **/
+static struct ibmvfc_async_crq *ibmvfc_next_async_crq(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_async_crq_queue *async_crq = &vhost->async_crq;
+ struct ibmvfc_async_crq *crq;
+
+ crq = &async_crq->msgs[async_crq->cur];
+ if (crq->valid & 0x80) {
+ if (++async_crq->cur == async_crq->size)
+ async_crq->cur = 0;
+ } else
+ crq = NULL;
+
+ return crq;
+}
+
+/**
+ * ibmvfc_next_crq - Returns the next entry in message queue
+ * @vhost: ibmvfc host struct
+ *
+ * Returns:
+ * Pointer to next entry in queue / NULL if empty
+ **/
+static struct ibmvfc_crq *ibmvfc_next_crq(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_crq_queue *queue = &vhost->crq;
+ struct ibmvfc_crq *crq;
+
+ crq = &queue->msgs[queue->cur];
+ if (crq->valid & 0x80) {
+ if (++queue->cur == queue->size)
+ queue->cur = 0;
+ } else
+ crq = NULL;
+
+ return crq;
+}
+
+/**
+ * ibmvfc_interrupt - Interrupt handler
+ * @irq: number of irq to handle, not used
+ * @dev_instance: ibmvfc_host that received interrupt
+ *
+ * Returns:
+ * IRQ_HANDLED
+ **/
+static irqreturn_t ibmvfc_interrupt(int irq, void *dev_instance)
+{
+ struct ibmvfc_host *vhost = (struct ibmvfc_host *)dev_instance;
+ struct vio_dev *vdev = to_vio_dev(vhost->dev);
+ struct ibmvfc_crq *crq;
+ struct ibmvfc_async_crq *async;
+ unsigned long flags;
+ int done = 0;
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ vio_disable_interrupts(to_vio_dev(vhost->dev));
+ while (!done) {
+ /* Pull all the valid messages off the CRQ */
+ while ((crq = ibmvfc_next_crq(vhost)) != NULL) {
+ ibmvfc_handle_crq(crq, vhost);
+ crq->valid = 0;
+ }
+
+ /* Pull all the valid messages off the async CRQ */
+ while ((async = ibmvfc_next_async_crq(vhost)) != NULL) {
+ ibmvfc_handle_async(async, vhost);
+ async->valid = 0;
+ }
+
+ vio_enable_interrupts(vdev);
+ if ((crq = ibmvfc_next_crq(vhost)) != NULL) {
+ vio_disable_interrupts(vdev);
+ ibmvfc_handle_crq(crq, vhost);
+ crq->valid = 0;
+ } else if ((async = ibmvfc_next_async_crq(vhost)) != NULL) {
+ vio_disable_interrupts(vdev);
+ ibmvfc_handle_async(async, vhost);
+ crq->valid = 0;
+ } else
+ done = 1;
+ }
+
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ return IRQ_HANDLED;
+}
+
+/**
+ * ibmvfc_init_tgt - Set the next init job step for the target
+ * @tgt: ibmvfc target struct
+ * @job_step: job step to perform
+ *
+ **/
+static void ibmvfc_init_tgt(struct ibmvfc_target *tgt,
+ void (*job_step) (struct ibmvfc_target *))
+{
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_INIT);
+ tgt->job_step = job_step;
+ wake_up(&tgt->vhost->work_wait_q);
+}
+
+/**
+ * ibmvfc_retry_tgt_init - Attempt to retry a step in target initialization
+ * @tgt: ibmvfc target struct
+ * @job_step: initialization job step
+ *
+ **/
+static void ibmvfc_retry_tgt_init(struct ibmvfc_target *tgt,
+ void (*job_step) (struct ibmvfc_target *))
+{
+ if (++tgt->init_retries > IBMVFC_MAX_INIT_RETRIES) {
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT);
+ wake_up(&tgt->vhost->work_wait_q);
+ } else
+ ibmvfc_init_tgt(tgt, job_step);
+}
+
+/**
+ * ibmvfc_release_tgt - Free memory allocated for a target
+ * @kref: kref struct
+ *
+ **/
+static void ibmvfc_release_tgt(struct kref *kref)
+{
+ struct ibmvfc_target *tgt = container_of(kref, struct ibmvfc_target, kref);
+ kfree(tgt);
+}
+
+/**
+ * ibmvfc_tgt_prli_done - Completion handler for Process Login
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_tgt_prli_done(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_target *tgt = evt->tgt;
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_process_login *rsp = &evt->xfer_iu->prli;
+ u32 status = rsp->common.status;
+
+ vhost->discovery_threads--;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+ switch (status) {
+ case IBMVFC_MAD_SUCCESS:
+ tgt_dbg(tgt, "Process Login succeeded\n");
+ tgt->need_login = 0;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_ADD_RPORT);
+ break;
+ case IBMVFC_MAD_DRIVER_FAILED:
+ break;
+ case IBMVFC_MAD_CRQ_ERROR:
+ ibmvfc_retry_tgt_init(tgt, ibmvfc_tgt_send_prli);
+ break;
+ case IBMVFC_MAD_FAILED:
+ default:
+ tgt_err(tgt, "Process Login failed: %s (%x:%x) rc=0x%02X\n",
+ ibmvfc_get_cmd_error(rsp->status, rsp->error),
+ rsp->status, rsp->error, status);
+ if (ibmvfc_retry_cmd(rsp->status, rsp->error))
+ ibmvfc_retry_tgt_init(tgt, ibmvfc_tgt_send_prli);
+ break;
+ };
+
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ ibmvfc_free_event(evt);
+ wake_up(&vhost->work_wait_q);
+}
+
+/**
+ * ibmvfc_tgt_send_prli - Send a process login
+ * @tgt: ibmvfc target struct
+ *
+ **/
+static void ibmvfc_tgt_send_prli(struct ibmvfc_target *tgt)
+{
+ struct ibmvfc_process_login *prli;
+ struct ibmvfc_host *vhost = tgt->vhost;
+ struct ibmvfc_event *evt;
+
+ if (vhost->discovery_threads >= disc_threads)
+ return;
+
+ kref_get(&tgt->kref);
+ evt = ibmvfc_get_event(vhost);
+ vhost->discovery_threads++;
+ ibmvfc_init_event(evt, ibmvfc_tgt_prli_done, IBMVFC_MAD_FORMAT);
+ evt->tgt = tgt;
+ prli = &evt->iu.prli;
+ memset(prli, 0, sizeof(*prli));
+ prli->common.version = 1;
+ prli->common.opcode = IBMVFC_PROCESS_LOGIN;
+ prli->common.length = sizeof(*prli);
+ prli->scsi_id = tgt->scsi_id;
+
+ prli->parms.type = IBMVFC_SCSI_FCP_TYPE;
+ prli->parms.flags = IBMVFC_PRLI_EST_IMG_PAIR;
+ prli->parms.service_parms = IBMVFC_PRLI_INITIATOR_FUNC;
+
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_INIT_WAIT);
+ if (ibmvfc_send_event(evt, vhost, default_timeout)) {
+ vhost->discovery_threads--;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ } else
+ tgt_dbg(tgt, "Sent process login\n");
+}
+
+/**
+ * ibmvfc_tgt_plogi_done - Completion handler for Port Login
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_tgt_plogi_done(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_target *tgt = evt->tgt;
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_port_login *rsp = &evt->xfer_iu->plogi;
+ u32 status = rsp->common.status;
+
+ vhost->discovery_threads--;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+ switch (status) {
+ case IBMVFC_MAD_SUCCESS:
+ tgt_dbg(tgt, "Port Login succeeded\n");
+ if (tgt->ids.port_name &&
+ tgt->ids.port_name != wwn_to_u64(rsp->service_parms.port_name)) {
+ vhost->reinit = 1;
+ tgt_dbg(tgt, "Port re-init required\n");
+ break;
+ }
+ tgt->ids.node_name = wwn_to_u64(rsp->service_parms.node_name);
+ tgt->ids.port_name = wwn_to_u64(rsp->service_parms.port_name);
+ tgt->ids.port_id = tgt->scsi_id;
+ tgt->ids.roles = FC_PORT_ROLE_FCP_TARGET;
+ memcpy(&tgt->service_parms, &rsp->service_parms,
+ sizeof(tgt->service_parms));
+ memcpy(&tgt->service_parms_change, &rsp->service_parms_change,
+ sizeof(tgt->service_parms_change));
+ ibmvfc_init_tgt(tgt, ibmvfc_tgt_send_prli);
+ break;
+ case IBMVFC_MAD_DRIVER_FAILED:
+ break;
+ case IBMVFC_MAD_CRQ_ERROR:
+ ibmvfc_retry_tgt_init(tgt, ibmvfc_tgt_send_plogi);
+ break;
+ case IBMVFC_MAD_FAILED:
+ default:
+ tgt_err(tgt, "Port Login failed: %s (%x:%x) %s (%x) %s (%x) rc=0x%02X\n",
+ ibmvfc_get_cmd_error(rsp->status, rsp->error), rsp->status, rsp->error,
+ ibmvfc_get_fc_type(rsp->fc_type), rsp->fc_type,
+ ibmvfc_get_ls_explain(rsp->fc_explain), rsp->fc_explain, status);
+
+ if (ibmvfc_retry_cmd(rsp->status, rsp->error))
+ ibmvfc_retry_tgt_init(tgt, ibmvfc_tgt_send_plogi);
+ break;
+ };
+
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ ibmvfc_free_event(evt);
+ wake_up(&vhost->work_wait_q);
+}
+
+/**
+ * ibmvfc_tgt_send_plogi - Send PLOGI to the specified target
+ * @tgt: ibmvfc target struct
+ *
+ **/
+static void ibmvfc_tgt_send_plogi(struct ibmvfc_target *tgt)
+{
+ struct ibmvfc_port_login *plogi;
+ struct ibmvfc_host *vhost = tgt->vhost;
+ struct ibmvfc_event *evt;
+
+ if (vhost->discovery_threads >= disc_threads)
+ return;
+
+ kref_get(&tgt->kref);
+ evt = ibmvfc_get_event(vhost);
+ vhost->discovery_threads++;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_INIT_WAIT);
+ ibmvfc_init_event(evt, ibmvfc_tgt_plogi_done, IBMVFC_MAD_FORMAT);
+ evt->tgt = tgt;
+ plogi = &evt->iu.plogi;
+ memset(plogi, 0, sizeof(*plogi));
+ plogi->common.version = 1;
+ plogi->common.opcode = IBMVFC_PORT_LOGIN;
+ plogi->common.length = sizeof(*plogi);
+ plogi->scsi_id = tgt->scsi_id;
+
+ if (ibmvfc_send_event(evt, vhost, default_timeout)) {
+ vhost->discovery_threads--;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ } else
+ tgt_dbg(tgt, "Sent port login\n");
+}
+
+/**
+ * ibmvfc_tgt_implicit_logout_done - Completion handler for Implicit Logout MAD
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_tgt_implicit_logout_done(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_target *tgt = evt->tgt;
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_implicit_logout *rsp = &evt->xfer_iu->implicit_logout;
+ u32 status = rsp->common.status;
+
+ vhost->discovery_threads--;
+ ibmvfc_free_event(evt);
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+
+ switch (status) {
+ case IBMVFC_MAD_SUCCESS:
+ tgt_dbg(tgt, "Implicit Logout succeeded\n");
+ break;
+ case IBMVFC_MAD_DRIVER_FAILED:
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ wake_up(&vhost->work_wait_q);
+ return;
+ case IBMVFC_MAD_FAILED:
+ default:
+ tgt_err(tgt, "Implicit Logout failed: rc=0x%02X\n", status);
+ break;
+ };
+
+ if (vhost->action == IBMVFC_HOST_ACTION_TGT_INIT)
+ ibmvfc_init_tgt(tgt, ibmvfc_tgt_send_plogi);
+ else if (vhost->action == IBMVFC_HOST_ACTION_QUERY_TGTS &&
+ tgt->scsi_id != tgt->new_scsi_id)
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT);
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ wake_up(&vhost->work_wait_q);
+}
+
+/**
+ * ibmvfc_tgt_implicit_logout - Initiate an Implicit Logout for specified target
+ * @tgt: ibmvfc target struct
+ *
+ **/
+static void ibmvfc_tgt_implicit_logout(struct ibmvfc_target *tgt)
+{
+ struct ibmvfc_implicit_logout *mad;
+ struct ibmvfc_host *vhost = tgt->vhost;
+ struct ibmvfc_event *evt;
+
+ if (vhost->discovery_threads >= disc_threads)
+ return;
+
+ kref_get(&tgt->kref);
+ evt = ibmvfc_get_event(vhost);
+ vhost->discovery_threads++;
+ ibmvfc_init_event(evt, ibmvfc_tgt_implicit_logout_done, IBMVFC_MAD_FORMAT);
+ evt->tgt = tgt;
+ mad = &evt->iu.implicit_logout;
+ memset(mad, 0, sizeof(*mad));
+ mad->common.version = 1;
+ mad->common.opcode = IBMVFC_IMPLICIT_LOGOUT;
+ mad->common.length = sizeof(*mad);
+ mad->old_scsi_id = tgt->scsi_id;
+
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_INIT_WAIT);
+ if (ibmvfc_send_event(evt, vhost, default_timeout)) {
+ vhost->discovery_threads--;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ } else
+ tgt_dbg(tgt, "Sent Implicit Logout\n");
+}
+
+/**
+ * ibmvfc_tgt_query_target_done - Completion handler for Query Target MAD
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_tgt_query_target_done(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_target *tgt = evt->tgt;
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_query_tgt *rsp = &evt->xfer_iu->query_tgt;
+ u32 status = rsp->common.status;
+
+ vhost->discovery_threads--;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+ switch (status) {
+ case IBMVFC_MAD_SUCCESS:
+ tgt_dbg(tgt, "Query Target succeeded\n");
+ tgt->new_scsi_id = rsp->scsi_id;
+ if (rsp->scsi_id != tgt->scsi_id)
+ ibmvfc_init_tgt(tgt, ibmvfc_tgt_implicit_logout);
+ break;
+ case IBMVFC_MAD_DRIVER_FAILED:
+ break;
+ case IBMVFC_MAD_CRQ_ERROR:
+ ibmvfc_retry_tgt_init(tgt, ibmvfc_tgt_query_target);
+ break;
+ case IBMVFC_MAD_FAILED:
+ default:
+ tgt_err(tgt, "Query Target failed: %s (%x:%x) %s (%x) %s (%x) rc=0x%02X\n",
+ ibmvfc_get_cmd_error(rsp->status, rsp->error), rsp->status, rsp->error,
+ ibmvfc_get_fc_type(rsp->fc_type), rsp->fc_type,
+ ibmvfc_get_gs_explain(rsp->fc_explain), rsp->fc_explain, status);
+
+ if ((rsp->status & IBMVFC_FABRIC_MAPPED) == IBMVFC_FABRIC_MAPPED &&
+ rsp->error == IBMVFC_UNABLE_TO_PERFORM_REQ &&
+ rsp->fc_explain == IBMVFC_PORT_NAME_NOT_REG)
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_DEL_RPORT);
+ else if (ibmvfc_retry_cmd(rsp->status, rsp->error))
+ ibmvfc_retry_tgt_init(tgt, ibmvfc_tgt_query_target);
+ break;
+ };
+
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ ibmvfc_free_event(evt);
+ wake_up(&vhost->work_wait_q);
+}
+
+/**
+ * ibmvfc_tgt_query_target - Initiate a Query Target for specified target
+ * @tgt: ibmvfc target struct
+ *
+ **/
+static void ibmvfc_tgt_query_target(struct ibmvfc_target *tgt)
+{
+ struct ibmvfc_query_tgt *query_tgt;
+ struct ibmvfc_host *vhost = tgt->vhost;
+ struct ibmvfc_event *evt;
+
+ if (vhost->discovery_threads >= disc_threads)
+ return;
+
+ kref_get(&tgt->kref);
+ evt = ibmvfc_get_event(vhost);
+ vhost->discovery_threads++;
+ evt->tgt = tgt;
+ ibmvfc_init_event(evt, ibmvfc_tgt_query_target_done, IBMVFC_MAD_FORMAT);
+ query_tgt = &evt->iu.query_tgt;
+ memset(query_tgt, 0, sizeof(*query_tgt));
+ query_tgt->common.version = 1;
+ query_tgt->common.opcode = IBMVFC_QUERY_TARGET;
+ query_tgt->common.length = sizeof(*query_tgt);
+ query_tgt->wwpn = tgt->ids.port_name;
+
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_INIT_WAIT);
+ if (ibmvfc_send_event(evt, vhost, default_timeout)) {
+ vhost->discovery_threads--;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ } else
+ tgt_dbg(tgt, "Sent Query Target\n");
+}
+
+/**
+ * ibmvfc_alloc_target - Allocate and initialize an ibmvfc target
+ * @vhost: ibmvfc host struct
+ * @scsi_id: SCSI ID to allocate target for
+ *
+ * Returns:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_alloc_target(struct ibmvfc_host *vhost, u64 scsi_id)
+{
+ struct ibmvfc_target *tgt;
+ unsigned long flags;
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ list_for_each_entry(tgt, &vhost->targets, queue) {
+ if (tgt->scsi_id == scsi_id) {
+ if (tgt->need_login)
+ ibmvfc_init_tgt(tgt, ibmvfc_tgt_implicit_logout);
+ goto unlock_out;
+ }
+ }
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+
+ tgt = mempool_alloc(vhost->tgt_pool, GFP_KERNEL);
+ if (!tgt) {
+ dev_err(vhost->dev, "Target allocation failure for scsi id %08lx\n",
+ scsi_id);
+ return -ENOMEM;
+ }
+
+ tgt->scsi_id = scsi_id;
+ tgt->new_scsi_id = scsi_id;
+ tgt->vhost = vhost;
+ tgt->need_login = 1;
+ kref_init(&tgt->kref);
+ ibmvfc_init_tgt(tgt, ibmvfc_tgt_implicit_logout);
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ list_add_tail(&tgt->queue, &vhost->targets);
+
+unlock_out:
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ return 0;
+}
+
+/**
+ * ibmvfc_alloc_targets - Allocate and initialize ibmvfc targets
+ * @vhost: ibmvfc host struct
+ *
+ * Returns:
+ * 0 on success / other on failure
+ **/
+static int ibmvfc_alloc_targets(struct ibmvfc_host *vhost)
+{
+ int i, rc;
+
+ for (i = 0, rc = 0; !rc && i < vhost->num_targets; i++)
+ rc = ibmvfc_alloc_target(vhost,
+ vhost->disc_buf->scsi_id[i] & IBMVFC_DISC_TGT_SCSI_ID_MASK);
+
+ return rc;
+}
+
+/**
+ * ibmvfc_discover_targets_done - Completion handler for discover targets MAD
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_discover_targets_done(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_host *vhost = evt->vhost;
+ struct ibmvfc_discover_targets *rsp = &evt->xfer_iu->discover_targets;
+ u32 mad_status = rsp->common.status;
+
+ switch (mad_status) {
+ case IBMVFC_MAD_SUCCESS:
+ ibmvfc_dbg(vhost, "Discover Targets succeeded\n");
+ vhost->num_targets = rsp->num_written;
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_ALLOC_TGTS);
+ break;
+ case IBMVFC_MAD_FAILED:
+ dev_err(vhost->dev, "Discover Targets failed: %s (%x:%x)\n",
+ ibmvfc_get_cmd_error(rsp->status, rsp->error), rsp->status, rsp->error);
+ ibmvfc_retry_host_init(vhost);
+ break;
+ case IBMVFC_MAD_DRIVER_FAILED:
+ break;
+ default:
+ dev_err(vhost->dev, "Invalid Discover Targets response: 0x%x\n", mad_status);
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ break;
+ }
+
+ ibmvfc_free_event(evt);
+ wake_up(&vhost->work_wait_q);
+}
+
+/**
+ * ibmvfc_discover_targets - Send Discover Targets MAD
+ * @vhost: ibmvfc host struct
+ *
+ **/
+static void ibmvfc_discover_targets(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_discover_targets *mad;
+ struct ibmvfc_event *evt = ibmvfc_get_event(vhost);
+
+ ibmvfc_init_event(evt, ibmvfc_discover_targets_done, IBMVFC_MAD_FORMAT);
+ mad = &evt->iu.discover_targets;
+ memset(mad, 0, sizeof(*mad));
+ mad->common.version = 1;
+ mad->common.opcode = IBMVFC_DISC_TARGETS;
+ mad->common.length = sizeof(*mad);
+ mad->bufflen = vhost->disc_buf_sz;
+ mad->buffer.va = vhost->disc_buf_dma;
+ mad->buffer.len = vhost->disc_buf_sz;
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_INIT_WAIT);
+
+ if (!ibmvfc_send_event(evt, vhost, default_timeout))
+ ibmvfc_dbg(vhost, "Sent discover targets\n");
+ else
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+}
+
+/**
+ * ibmvfc_npiv_login_done - Completion handler for NPIV Login
+ * @evt: ibmvfc event struct
+ *
+ **/
+static void ibmvfc_npiv_login_done(struct ibmvfc_event *evt)
+{
+ struct ibmvfc_host *vhost = evt->vhost;
+ u32 mad_status = evt->xfer_iu->npiv_login.common.status;
+ struct ibmvfc_npiv_login_resp *rsp = &vhost->login_buf->resp;
+ unsigned int npiv_max_sectors;
+
+ switch (mad_status) {
+ case IBMVFC_MAD_SUCCESS:
+ ibmvfc_free_event(evt);
+ break;
+ case IBMVFC_MAD_FAILED:
+ dev_err(vhost->dev, "NPIV Login failed: %s (%x:%x)\n",
+ ibmvfc_get_cmd_error(rsp->status, rsp->error), rsp->status, rsp->error);
+ if (ibmvfc_retry_cmd(rsp->status, rsp->error))
+ ibmvfc_retry_host_init(vhost);
+ else
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ ibmvfc_free_event(evt);
+ return;
+ case IBMVFC_MAD_CRQ_ERROR:
+ ibmvfc_retry_host_init(vhost);
+ case IBMVFC_MAD_DRIVER_FAILED:
+ ibmvfc_free_event(evt);
+ return;
+ default:
+ dev_err(vhost->dev, "Invalid NPIV Login response: 0x%x\n", mad_status);
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ ibmvfc_free_event(evt);
+ return;
+ }
+
+ vhost->client_migrated = 0;
+
+ if (!(rsp->flags & IBMVFC_NATIVE_FC)) {
+ dev_err(vhost->dev, "Virtual adapter does not support FC. %x\n",
+ rsp->flags);
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ wake_up(&vhost->work_wait_q);
+ return;
+ }
+
+ if (rsp->max_cmds <= IBMVFC_NUM_INTERNAL_REQ) {
+ dev_err(vhost->dev, "Virtual adapter supported queue depth too small: %d\n",
+ rsp->max_cmds);
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+ wake_up(&vhost->work_wait_q);
+ return;
+ }
+
+ npiv_max_sectors = min((uint)(rsp->max_dma_len >> 9), IBMVFC_MAX_SECTORS);
+ dev_info(vhost->dev, "Host partition: %s, device: %s %s %s max sectors %u\n",
+ rsp->partition_name, rsp->device_name, rsp->port_loc_code,
+ rsp->drc_name, npiv_max_sectors);
+
+ fc_host_fabric_name(vhost->host) = rsp->node_name;
+ fc_host_node_name(vhost->host) = rsp->node_name;
+ fc_host_port_name(vhost->host) = rsp->port_name;
+ fc_host_port_id(vhost->host) = rsp->scsi_id;
+ fc_host_port_type(vhost->host) = FC_PORTTYPE_NPIV;
+ fc_host_supported_classes(vhost->host) = 0;
+ if (rsp->service_parms.class1_parms[0] & 0x80000000)
+ fc_host_supported_classes(vhost->host) |= FC_COS_CLASS1;
+ if (rsp->service_parms.class2_parms[0] & 0x80000000)
+ fc_host_supported_classes(vhost->host) |= FC_COS_CLASS2;
+ if (rsp->service_parms.class3_parms[0] & 0x80000000)
+ fc_host_supported_classes(vhost->host) |= FC_COS_CLASS3;
+ fc_host_maxframe_size(vhost->host) =
+ rsp->service_parms.common.bb_rcv_sz & 0x0fff;
+
+ vhost->host->can_queue = rsp->max_cmds - IBMVFC_NUM_INTERNAL_REQ;
+ vhost->host->max_sectors = npiv_max_sectors;
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_QUERY);
+ wake_up(&vhost->work_wait_q);
+}
+
+/**
+ * ibmvfc_npiv_login - Sends NPIV login
+ * @vhost: ibmvfc host struct
+ *
+ **/
+static void ibmvfc_npiv_login(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_npiv_login_mad *mad;
+ struct ibmvfc_event *evt = ibmvfc_get_event(vhost);
+
+ ibmvfc_gather_partition_info(vhost);
+ ibmvfc_set_login_info(vhost);
+ ibmvfc_init_event(evt, ibmvfc_npiv_login_done, IBMVFC_MAD_FORMAT);
+
+ memcpy(vhost->login_buf, &vhost->login_info, sizeof(vhost->login_info));
+ mad = &evt->iu.npiv_login;
+ memset(mad, 0, sizeof(struct ibmvfc_npiv_login_mad));
+ mad->common.version = 1;
+ mad->common.opcode = IBMVFC_NPIV_LOGIN;
+ mad->common.length = sizeof(struct ibmvfc_npiv_login_mad);
+ mad->buffer.va = vhost->login_buf_dma;
+ mad->buffer.len = sizeof(*vhost->login_buf);
+
+ memset(vhost->async_crq.msgs, 0, PAGE_SIZE);
+ vhost->async_crq.cur = 0;
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_INIT_WAIT);
+
+ if (!ibmvfc_send_event(evt, vhost, default_timeout))
+ ibmvfc_dbg(vhost, "Sent NPIV login\n");
+ else
+ ibmvfc_link_down(vhost, IBMVFC_LINK_DEAD);
+};
+
+/**
+ * ibmvfc_dev_init_to_do - Is there target initialization work to do?
+ * @vhost: ibmvfc host struct
+ *
+ * Returns:
+ * 1 if work to do / 0 if not
+ **/
+static int ibmvfc_dev_init_to_do(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_target *tgt;
+
+ list_for_each_entry(tgt, &vhost->targets, queue) {
+ if (tgt->action == IBMVFC_TGT_ACTION_INIT ||
+ tgt->action == IBMVFC_TGT_ACTION_INIT_WAIT)
+ return 1;
+ }
+
+ return 0;
+}
+
+/**
+ * __ibmvfc_work_to_do - Is there task level work to do? (no locking)
+ * @vhost: ibmvfc host struct
+ *
+ * Returns:
+ * 1 if work to do / 0 if not
+ **/
+static int __ibmvfc_work_to_do(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_target *tgt;
+
+ if (kthread_should_stop())
+ return 1;
+ switch (vhost->action) {
+ case IBMVFC_HOST_ACTION_NONE:
+ case IBMVFC_HOST_ACTION_INIT_WAIT:
+ return 0;
+ case IBMVFC_HOST_ACTION_TGT_INIT:
+ case IBMVFC_HOST_ACTION_QUERY_TGTS:
+ if (vhost->discovery_threads == disc_threads)
+ return 0;
+ list_for_each_entry(tgt, &vhost->targets, queue)
+ if (tgt->action == IBMVFC_TGT_ACTION_INIT)
+ return 1;
+ list_for_each_entry(tgt, &vhost->targets, queue)
+ if (tgt->action == IBMVFC_TGT_ACTION_INIT_WAIT)
+ return 0;
+ return 1;
+ case IBMVFC_HOST_ACTION_INIT:
+ case IBMVFC_HOST_ACTION_ALLOC_TGTS:
+ case IBMVFC_HOST_ACTION_TGT_ADD:
+ case IBMVFC_HOST_ACTION_TGT_DEL:
+ case IBMVFC_HOST_ACTION_QUERY:
+ default:
+ break;
+ };
+
+ return 1;
+}
+
+/**
+ * ibmvfc_work_to_do - Is there task level work to do?
+ * @vhost: ibmvfc host struct
+ *
+ * Returns:
+ * 1 if work to do / 0 if not
+ **/
+static int ibmvfc_work_to_do(struct ibmvfc_host *vhost)
+{
+ unsigned long flags;
+ int rc;
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ rc = __ibmvfc_work_to_do(vhost);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ return rc;
+}
+
+/**
+ * ibmvfc_log_ae - Log async events if necessary
+ * @vhost: ibmvfc host struct
+ * @events: events to log
+ *
+ **/
+static void ibmvfc_log_ae(struct ibmvfc_host *vhost, int events)
+{
+ if (events & IBMVFC_AE_RSCN)
+ fc_host_post_event(vhost->host, fc_get_event_number(), FCH_EVT_RSCN, 0);
+ if ((events & IBMVFC_AE_LINKDOWN) &&
+ vhost->state >= IBMVFC_HALTED)
+ fc_host_post_event(vhost->host, fc_get_event_number(), FCH_EVT_LINKDOWN, 0);
+ if ((events & IBMVFC_AE_LINKUP) &&
+ vhost->state == IBMVFC_INITIALIZING)
+ fc_host_post_event(vhost->host, fc_get_event_number(), FCH_EVT_LINKUP, 0);
+}
+
+/**
+ * ibmvfc_tgt_add_rport - Tell the FC transport about a new remote port
+ * @tgt: ibmvfc target struct
+ *
+ **/
+static void ibmvfc_tgt_add_rport(struct ibmvfc_target *tgt)
+{
+ struct ibmvfc_host *vhost = tgt->vhost;
+ struct fc_rport *rport;
+ unsigned long flags;
+
+ tgt_dbg(tgt, "Adding rport\n");
+ rport = fc_remote_port_add(vhost->host, 0, &tgt->ids);
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ tgt->rport = rport;
+ ibmvfc_set_tgt_action(tgt, IBMVFC_TGT_ACTION_NONE);
+ if (rport) {
+ tgt_dbg(tgt, "rport add succeeded\n");
+ rport->maxframe_size = tgt->service_parms.common.bb_rcv_sz & 0x0fff;
+ rport->supported_classes = 0;
+ if (tgt->service_parms.class1_parms[0] & 0x80000000)
+ rport->supported_classes |= FC_COS_CLASS1;
+ if (tgt->service_parms.class2_parms[0] & 0x80000000)
+ rport->supported_classes |= FC_COS_CLASS2;
+ if (tgt->service_parms.class3_parms[0] & 0x80000000)
+ rport->supported_classes |= FC_COS_CLASS3;
+ } else
+ tgt_dbg(tgt, "rport add failed\n");
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+}
+
+/**
+ * ibmvfc_do_work - Do task level work
+ * @vhost: ibmvfc host struct
+ *
+ **/
+static void ibmvfc_do_work(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_target *tgt;
+ unsigned long flags;
+ struct fc_rport *rport;
+
+ ibmvfc_log_ae(vhost, vhost->events_to_log);
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ vhost->events_to_log = 0;
+ switch (vhost->action) {
+ case IBMVFC_HOST_ACTION_NONE:
+ case IBMVFC_HOST_ACTION_INIT_WAIT:
+ break;
+ case IBMVFC_HOST_ACTION_INIT:
+ BUG_ON(vhost->state != IBMVFC_INITIALIZING);
+ vhost->job_step(vhost);
+ break;
+ case IBMVFC_HOST_ACTION_QUERY:
+ list_for_each_entry(tgt, &vhost->targets, queue)
+ ibmvfc_init_tgt(tgt, ibmvfc_tgt_query_target);
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_QUERY_TGTS);
+ break;
+ case IBMVFC_HOST_ACTION_QUERY_TGTS:
+ list_for_each_entry(tgt, &vhost->targets, queue) {
+ if (tgt->action == IBMVFC_TGT_ACTION_INIT) {
+ tgt->job_step(tgt);
+ break;
+ }
+ }
+
+ if (!ibmvfc_dev_init_to_do(vhost))
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_TGT_DEL);
+ break;
+ case IBMVFC_HOST_ACTION_TGT_DEL:
+ list_for_each_entry(tgt, &vhost->targets, queue) {
+ if (tgt->action == IBMVFC_TGT_ACTION_DEL_RPORT) {
+ tgt_dbg(tgt, "Deleting rport\n");
+ rport = tgt->rport;
+ tgt->rport = NULL;
+ list_del(&tgt->queue);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ if (rport)
+ fc_remote_port_delete(rport);
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ return;
+ }
+ }
+
+ if (vhost->state == IBMVFC_INITIALIZING) {
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_INIT);
+ vhost->job_step = ibmvfc_discover_targets;
+ } else {
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_NONE);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ scsi_unblock_requests(vhost->host);
+ wake_up(&vhost->init_wait_q);
+ return;
+ }
+ break;
+ case IBMVFC_HOST_ACTION_ALLOC_TGTS:
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_TGT_INIT);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ ibmvfc_alloc_targets(vhost);
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ break;
+ case IBMVFC_HOST_ACTION_TGT_INIT:
+ list_for_each_entry(tgt, &vhost->targets, queue) {
+ if (tgt->action == IBMVFC_TGT_ACTION_INIT) {
+ tgt->job_step(tgt);
+ break;
+ }
+ }
+
+ if (!ibmvfc_dev_init_to_do(vhost)) {
+ ibmvfc_set_host_state(vhost, IBMVFC_ACTIVE);
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_TGT_ADD);
+ vhost->init_retries = 0;
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ scsi_unblock_requests(vhost->host);
+ return;
+ }
+ break;
+ case IBMVFC_HOST_ACTION_TGT_ADD:
+ list_for_each_entry(tgt, &vhost->targets, queue) {
+ if (tgt->action == IBMVFC_TGT_ACTION_ADD_RPORT) {
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ ibmvfc_tgt_add_rport(tgt);
+ return;
+ } else if (tgt->action == IBMVFC_TGT_ACTION_DEL_RPORT) {
+ tgt_dbg(tgt, "Deleting rport\n");
+ rport = tgt->rport;
+ tgt->rport = NULL;
+ list_del(&tgt->queue);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+ if (rport)
+ fc_remote_port_delete(rport);
+ kref_put(&tgt->kref, ibmvfc_release_tgt);
+ return;
+ }
+ }
+
+ if (vhost->reinit) {
+ vhost->reinit = 0;
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_QUERY);
+ } else {
+ ibmvfc_set_host_action(vhost, IBMVFC_HOST_ACTION_NONE);
+ wake_up(&vhost->init_wait_q);
+ }
+ break;
+ default:
+ break;
+ };
+
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+}
+
+/**
+ * ibmvfc_work - Do task level work
+ * @data: ibmvfc host struct
+ *
+ * Returns:
+ * zero
+ **/
+static int ibmvfc_work(void *data)
+{
+ struct ibmvfc_host *vhost = data;
+ int rc;
+
+ set_user_nice(current, -20);
+
+ while (1) {
+ rc = wait_event_interruptible(vhost->work_wait_q,
+ ibmvfc_work_to_do(vhost));
+
+ BUG_ON(rc);
+
+ if (kthread_should_stop())
+ break;
+
+ ibmvfc_do_work(vhost);
+ }
+
+ ibmvfc_dbg(vhost, "ibmvfc kthread exiting...\n");
+ return 0;
+}
+
+/**
+ * ibmvfc_init_crq - Initializes and registers CRQ with hypervisor
+ * @vhost: ibmvfc host struct
+ *
+ * Allocates a page for messages, maps it for dma, and registers
+ * the crq with the hypervisor.
+ *
+ * Return value:
+ * zero on success / other on failure
+ **/
+static int ibmvfc_init_crq(struct ibmvfc_host *vhost)
+{
+ int rc, retrc = -ENOMEM;
+ struct device *dev = vhost->dev;
+ struct vio_dev *vdev = to_vio_dev(dev);
+ struct ibmvfc_crq_queue *crq = &vhost->crq;
+
+ ENTER;
+ crq->msgs = (struct ibmvfc_crq *)get_zeroed_page(GFP_KERNEL);
+
+ if (!crq->msgs)
+ return -ENOMEM;
+
+ crq->size = PAGE_SIZE / sizeof(*crq->msgs);
+ crq->msg_token = dma_map_single(dev, crq->msgs,
+ PAGE_SIZE, DMA_BIDIRECTIONAL);
+
+ if (dma_mapping_error(crq->msg_token))
+ goto map_failed;
+
+ retrc = rc = plpar_hcall_norets(H_REG_CRQ, vdev->unit_address,
+ crq->msg_token, PAGE_SIZE);
+
+ if (rc == H_RESOURCE)
+ /* maybe kexecing and resource is busy. try a reset */
+ retrc = rc = ibmvfc_reset_crq(vhost);
+
+ if (rc == H_CLOSED)
+ dev_warn(dev, "Partner adapter not ready\n");
+ else if (rc) {
+ dev_warn(dev, "Error %d opening adapter\n", rc);
+ goto reg_crq_failed;
+ }
+
+ retrc = 0;
+
+ if ((rc = request_irq(vdev->irq, ibmvfc_interrupt, 0, IBMVFC_NAME, vhost))) {
+ dev_err(dev, "Couldn't register irq 0x%x. rc=%d\n", vdev->irq, rc);
+ goto req_irq_failed;
+ }
+
+ if ((rc = vio_enable_interrupts(vdev))) {
+ dev_err(dev, "Error %d enabling interrupts\n", rc);
+ goto req_irq_failed;
+ }
+
+ crq->cur = 0;
+ LEAVE;
+ return retrc;
+
+req_irq_failed:
+ do {
+ rc = plpar_hcall_norets(H_FREE_CRQ, vdev->unit_address);
+ } while (rc == H_BUSY || H_IS_LONG_BUSY(rc));
+reg_crq_failed:
+ dma_unmap_single(dev, crq->msg_token, PAGE_SIZE, DMA_BIDIRECTIONAL);
+map_failed:
+ free_page((unsigned long)crq->msgs);
+ return retrc;
+}
+
+/**
+ * ibmvfc_free_mem - Free memory for vhost
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * none
+ **/
+static void ibmvfc_free_mem(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_async_crq_queue *async_q = &vhost->async_crq;
+
+ ENTER;
+ mempool_destroy(vhost->tgt_pool);
+ kfree(vhost->trace);
+ dma_free_coherent(vhost->dev, vhost->disc_buf_sz, vhost->disc_buf,
+ vhost->disc_buf_dma);
+ dma_free_coherent(vhost->dev, sizeof(*vhost->login_buf),
+ vhost->login_buf, vhost->login_buf_dma);
+ dma_pool_destroy(vhost->sg_pool);
+ dma_unmap_single(vhost->dev, async_q->msg_token,
+ async_q->size * sizeof(*async_q->msgs), DMA_BIDIRECTIONAL);
+ free_page((unsigned long)async_q->msgs);
+ LEAVE;
+}
+
+/**
+ * ibmvfc_alloc_mem - Allocate memory for vhost
+ * @vhost: ibmvfc host struct
+ *
+ * Return value:
+ * 0 on success / non-zero on failure
+ **/
+static int ibmvfc_alloc_mem(struct ibmvfc_host *vhost)
+{
+ struct ibmvfc_async_crq_queue *async_q = &vhost->async_crq;
+ struct device *dev = vhost->dev;
+
+ ENTER;
+ async_q->msgs = (struct ibmvfc_async_crq *)get_zeroed_page(GFP_KERNEL);
+ if (!async_q->msgs) {
+ dev_err(dev, "Couldn't allocate async queue.\n");
+ goto nomem;
+ }
+
+ async_q->size = PAGE_SIZE / sizeof(struct ibmvfc_async_crq);
+ async_q->msg_token = dma_map_single(dev, async_q->msgs,
+ async_q->size * sizeof(*async_q->msgs),
+ DMA_BIDIRECTIONAL);
+
+ if (dma_mapping_error(async_q->msg_token)) {
+ dev_err(dev, "Failed to map async queue\n");
+ goto free_async_crq;
+ }
+
+ vhost->sg_pool = dma_pool_create(IBMVFC_NAME, dev,
+ SG_ALL * sizeof(struct srp_direct_buf),
+ sizeof(struct srp_direct_buf), 0);
+
+ if (!vhost->sg_pool) {
+ dev_err(dev, "Failed to allocate sg pool\n");
+ goto unmap_async_crq;
+ }
+
+ vhost->login_buf = dma_alloc_coherent(dev, sizeof(*vhost->login_buf),
+ &vhost->login_buf_dma, GFP_KERNEL);
+
+ if (!vhost->login_buf) {
+ dev_err(dev, "Couldn't allocate NPIV login buffer\n");
+ goto free_sg_pool;
+ }
+
+ vhost->disc_buf_sz = sizeof(vhost->disc_buf->scsi_id[0]) * max_targets;
+ vhost->disc_buf = dma_alloc_coherent(dev, vhost->disc_buf_sz,
+ &vhost->disc_buf_dma, GFP_KERNEL);
+
+ if (!vhost->disc_buf) {
+ dev_err(dev, "Couldn't allocate Discover Targets buffer\n");
+ goto free_login_buffer;
+ }
+
+ vhost->trace = kcalloc(IBMVFC_NUM_TRACE_ENTRIES,
+ sizeof(struct ibmvfc_trace_entry), GFP_KERNEL);
+
+ if (!vhost->trace)
+ goto free_disc_buffer;
+
+ vhost->tgt_pool = mempool_create_kzalloc_pool(IBMVFC_TGT_MEMPOOL_SZ,
+ sizeof(struct ibmvfc_target));
+
+ if (!vhost->tgt_pool) {
+ dev_err(dev, "Couldn't allocate target memory pool\n");
+ goto free_trace;
+ }
+
+ LEAVE;
+ return 0;
+
+free_trace:
+ kfree(vhost->trace);
+free_disc_buffer:
+ dma_free_coherent(dev, vhost->disc_buf_sz, vhost->disc_buf,
+ vhost->disc_buf_dma);
+free_login_buffer:
+ dma_free_coherent(dev, sizeof(*vhost->login_buf),
+ vhost->login_buf, vhost->login_buf_dma);
+free_sg_pool:
+ dma_pool_destroy(vhost->sg_pool);
+unmap_async_crq:
+ dma_unmap_single(dev, async_q->msg_token,
+ async_q->size * sizeof(*async_q->msgs), DMA_BIDIRECTIONAL);
+free_async_crq:
+ free_page((unsigned long)async_q->msgs);
+nomem:
+ LEAVE;
+ return -ENOMEM;
+}
+
+/**
+ * ibmvfc_probe - Adapter hot plug add entry point
+ * @vdev: vio device struct
+ * @id: vio device id struct
+ *
+ * Return value:
+ * 0 on success / non-zero on failure
+ **/
+static int ibmvfc_probe(struct vio_dev *vdev, const struct vio_device_id *id)
+{
+ struct ibmvfc_host *vhost;
+ struct Scsi_Host *shost;
+ struct device *dev = &vdev->dev;
+ int rc = -ENOMEM;
+
+ ENTER;
+ shost = scsi_host_alloc(&driver_template, sizeof(*vhost));
+ if (!shost) {
+ dev_err(dev, "Couldn't allocate host data\n");
+ goto out;
+ }
+
+ shost->transportt = ibmvfc_transport_template;
+ shost->can_queue = max_requests;
+ shost->max_lun = max_lun;
+ shost->max_id = max_targets;
+ shost->max_sectors = IBMVFC_MAX_SECTORS;
+ shost->max_cmd_len = IBMVFC_MAX_CDB_LEN;
+ shost->unique_id = shost->host_no;
+
+ vhost = shost_priv(shost);
+ INIT_LIST_HEAD(&vhost->sent);
+ INIT_LIST_HEAD(&vhost->free);
+ INIT_LIST_HEAD(&vhost->targets);
+ sprintf(vhost->name, IBMVFC_NAME);
+ vhost->host = shost;
+ vhost->dev = dev;
+ vhost->partition_number = -1;
+ vhost->log_level = log_level;
+ strcpy(vhost->partition_name, "UNKNOWN");
+ init_waitqueue_head(&vhost->work_wait_q);
+ init_waitqueue_head(&vhost->init_wait_q);
+
+ if ((rc = ibmvfc_alloc_mem(vhost)))
+ goto free_scsi_host;
+
+ vhost->work_thread = kthread_run(ibmvfc_work, vhost, "%s_%d", IBMVFC_NAME,
+ shost->host_no);
+
+ if (IS_ERR(vhost->work_thread)) {
+ dev_err(dev, "Couldn't create kernel thread: %ld\n",
+ PTR_ERR(vhost->work_thread));
+ goto free_host_mem;
+ }
+
+ if ((rc = ibmvfc_init_crq(vhost))) {
+ dev_err(dev, "Couldn't initialize crq. rc=%d\n", rc);
+ goto kill_kthread;
+ }
+
+ if ((rc = ibmvfc_init_event_pool(vhost))) {
+ dev_err(dev, "Couldn't initialize event pool. rc=%d\n", rc);
+ goto release_crq;
+ }
+
+ if ((rc = scsi_add_host(shost, dev)))
+ goto release_event_pool;
+
+ if ((rc = ibmvfc_create_trace_file(&shost->shost_dev.kobj,
+ &ibmvfc_trace_attr))) {
+ dev_err(dev, "Failed to create trace file. rc=%d\n", rc);
+ goto remove_shost;
+ }
+
+ dev_set_drvdata(dev, vhost);
+ spin_lock(&ibmvfc_driver_lock);
+ list_add_tail(&vhost->queue, &ibmvfc_head);
+ spin_unlock(&ibmvfc_driver_lock);
+
+ ibmvfc_send_crq_init(vhost);
+ scsi_scan_host(shost);
+ return 0;
+
+remove_shost:
+ scsi_remove_host(shost);
+release_event_pool:
+ ibmvfc_free_event_pool(vhost);
+release_crq:
+ ibmvfc_release_crq_queue(vhost);
+kill_kthread:
+ kthread_stop(vhost->work_thread);
+free_host_mem:
+ ibmvfc_free_mem(vhost);
+free_scsi_host:
+ scsi_host_put(shost);
+out:
+ LEAVE;
+ return rc;
+}
+
+/**
+ * ibmvfc_remove - Adapter hot plug remove entry point
+ * @vdev: vio device struct
+ *
+ * Return value:
+ * 0
+ **/
+static int ibmvfc_remove(struct vio_dev *vdev)
+{
+ struct ibmvfc_host *vhost = dev_get_drvdata(&vdev->dev);
+ unsigned long flags;
+
+ ENTER;
+ ibmvfc_remove_trace_file(&vhost->host->shost_dev.kobj, &ibmvfc_trace_attr);
+ kthread_stop(vhost->work_thread);
+ fc_remove_host(vhost->host);
+ scsi_remove_host(vhost->host);
+ ibmvfc_release_crq_queue(vhost);
+
+ spin_lock_irqsave(vhost->host->host_lock, flags);
+ ibmvfc_purge_requests(vhost, DID_ERROR);
+ ibmvfc_free_event_pool(vhost);
+ spin_unlock_irqrestore(vhost->host->host_lock, flags);
+
+ ibmvfc_free_mem(vhost);
+ spin_lock(&ibmvfc_driver_lock);
+ list_del(&vhost->queue);
+ spin_unlock(&ibmvfc_driver_lock);
+ scsi_host_put(vhost->host);
+ LEAVE;
+ return 0;
+}
+
+static struct vio_device_id ibmvfc_device_table[] __devinitdata = {
+ {"fcp", "IBM,vfc-client"},
+ { "", "" }
+};
+MODULE_DEVICE_TABLE(vio, ibmvfc_device_table);
+
+static struct vio_driver ibmvfc_driver = {
+ .id_table = ibmvfc_device_table,
+ .probe = ibmvfc_probe,
+ .remove = ibmvfc_remove,
+ .driver = {
+ .name = IBMVFC_NAME,
+ .owner = THIS_MODULE,
+ }
+};
+
+static struct fc_function_template ibmvfc_transport_functions = {
+ .show_host_fabric_name = 1,
+ .show_host_node_name = 1,
+ .show_host_port_name = 1,
+ .show_host_supported_classes = 1,
+ .show_host_port_type = 1,
+ .show_host_port_id = 1,
+
+ .get_host_port_state = ibmvfc_get_host_port_state,
+ .show_host_port_state = 1,
+
+ .get_host_speed = ibmvfc_get_host_speed,
+ .show_host_speed = 1,
+
+ .issue_fc_host_lip = ibmvfc_issue_fc_host_lip,
+ .terminate_rport_io = ibmvfc_terminate_rport_io,
+
+ .show_rport_maxframe_size = 1,
+ .show_rport_supported_classes = 1,
+
+ .set_rport_dev_loss_tmo = ibmvfc_set_rport_dev_loss_tmo,
+ .show_rport_dev_loss_tmo = 1,
+
+ .get_starget_node_name = ibmvfc_get_starget_node_name,
+ .show_starget_node_name = 1,
+
+ .get_starget_port_name = ibmvfc_get_starget_port_name,
+ .show_starget_port_name = 1,
+
+ .get_starget_port_id = ibmvfc_get_starget_port_id,
+ .show_starget_port_id = 1,
+};
+
+/**
+ * ibmvfc_module_init - Initialize the ibmvfc module
+ *
+ * Return value:
+ * 0 on success / other on failure
+ **/
+static int __init ibmvfc_module_init(void)
+{
+ int rc;
+
+ if (!firmware_has_feature(FW_FEATURE_VIO))
+ return -ENODEV;
+
+ printk(KERN_INFO IBMVFC_NAME": IBM Virtual Fibre Channel Driver version: %s %s\n",
+ IBMVFC_DRIVER_VERSION, IBMVFC_DRIVER_DATE);
+
+ ibmvfc_transport_template = fc_attach_transport(&ibmvfc_transport_functions);
+ if (!ibmvfc_transport_template)
+ return -ENOMEM;
+
+ rc = vio_register_driver(&ibmvfc_driver);
+ if (rc)
+ fc_release_transport(ibmvfc_transport_template);
+ return rc;
+}
+
+/**
+ * ibmvfc_module_exit - Teardown the ibmvfc module
+ *
+ * Return value:
+ * nothing
+ **/
+static void __exit ibmvfc_module_exit(void)
+{
+ vio_unregister_driver(&ibmvfc_driver);
+ fc_release_transport(ibmvfc_transport_template);
+}
+
+module_init(ibmvfc_module_init);
+module_exit(ibmvfc_module_exit);
diff --git a/drivers/scsi/ibmvscsi/ibmvfc.h b/drivers/scsi/ibmvscsi/ibmvfc.h
new file mode 100644
index 0000000..057f3c0
--- /dev/null
+++ b/drivers/scsi/ibmvscsi/ibmvfc.h
@@ -0,0 +1,682 @@
+/*
+ * ibmvfc.h -- driver for IBM Power Virtual Fibre Channel Adapter
+ *
+ * Written By: Brian King <brking@linux.vnet.ibm.com>, IBM Corporation
+ *
+ * Copyright (C) IBM Corporation, 2008
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#ifndef _IBMVFC_H
+#define _IBMVFC_H
+
+#include <linux/list.h>
+#include <linux/types.h>
+#include "viosrp.h"
+
+#define IBMVFC_NAME "ibmvfc"
+#define IBMVFC_DRIVER_VERSION "1.0.0"
+#define IBMVFC_DRIVER_DATE "(July 1, 2008)"
+
+#define IBMVFC_DEFAULT_TIMEOUT 15
+#define IBMVFC_INIT_TIMEOUT 30
+#define IBMVFC_MAX_REQUESTS_DEFAULT 100
+
+#define IBMVFC_DEBUG 0
+#define IBMVFC_MAX_TARGETS 1024
+#define IBMVFC_MAX_LUN 0xffffffff
+#define IBMVFC_MAX_SECTORS 0xffffu
+#define IBMVFC_MAX_DISC_THREADS 4
+#define IBMVFC_TGT_MEMPOOL_SZ 64
+#define IBMVFC_MAX_CMDS_PER_LUN 64
+#define IBMVFC_MAX_INIT_RETRIES 3
+#define IBMVFC_DEV_LOSS_TMO (5 * 60)
+#define IBMVFC_DEFAULT_LOG_LEVEL 2
+#define IBMVFC_MAX_CDB_LEN 16
+
+/*
+ * Ensure we have resources for ERP and initialization:
+ * 1 for ERP
+ * 1 for initialization
+ * 1 for each discovery thread
+ */
+#define IBMVFC_NUM_INTERNAL_REQ (1 + 1 + disc_threads)
+
+#define IBMVFC_MAD_SUCCESS 0x00
+#define IBMVFC_MAD_NOT_SUPPORTED 0xF1
+#define IBMVFC_MAD_FAILED 0xF7
+#define IBMVFC_MAD_DRIVER_FAILED 0xEE
+#define IBMVFC_MAD_CRQ_ERROR 0xEF
+
+enum ibmvfc_crq_valid {
+ IBMVFC_CRQ_CMD_RSP = 0x80,
+ IBMVFC_CRQ_INIT_RSP = 0xC0,
+ IBMVFC_CRQ_XPORT_EVENT = 0xFF,
+};
+
+enum ibmvfc_crq_format {
+ IBMVFC_CRQ_INIT = 0x01,
+ IBMVFC_CRQ_INIT_COMPLETE = 0x02,
+ IBMVFC_PARTITION_MIGRATED = 0x06,
+};
+
+enum ibmvfc_cmd_status_flags {
+ IBMVFC_FABRIC_MAPPED = 0x0001,
+ IBMVFC_VIOS_FAILURE = 0x0002,
+ IBMVFC_FC_FAILURE = 0x0004,
+ IBMVFC_FC_SCSI_ERROR = 0x0008,
+ IBMVFC_HW_EVENT_LOGGED = 0x0010,
+ IBMVFC_VIOS_LOGGED = 0x0020,
+};
+
+enum ibmvfc_fabric_mapped_errors {
+ IBMVFC_UNABLE_TO_ESTABLISH = 0x0001,
+ IBMVFC_XPORT_FAULT = 0x0002,
+ IBMVFC_CMD_TIMEOUT = 0x0003,
+ IBMVFC_ENETDOWN = 0x0004,
+ IBMVFC_HW_FAILURE = 0x0005,
+ IBMVFC_LINK_DOWN_ERR = 0x0006,
+ IBMVFC_LINK_DEAD_ERR = 0x0007,
+ IBMVFC_UNABLE_TO_REGISTER = 0x0008,
+ IBMVFC_XPORT_BUSY = 0x000A,
+ IBMVFC_XPORT_DEAD = 0x000B,
+ IBMVFC_CONFIG_ERROR = 0x000C,
+ IBMVFC_NAME_SERVER_FAIL = 0x000D,
+ IBMVFC_LINK_HALTED = 0x000E,
+ IBMVFC_XPORT_GENERAL = 0x8000,
+};
+
+enum ibmvfc_vios_errors {
+ IBMVFC_CRQ_FAILURE = 0x0001,
+ IBMVFC_SW_FAILURE = 0x0002,
+ IBMVFC_INVALID_PARAMETER = 0x0003,
+ IBMVFC_MISSING_PARAMETER = 0x0004,
+ IBMVFC_HOST_IO_BUS = 0x0005,
+ IBMVFC_TRANS_CANCELLED = 0x0006,
+ IBMVFC_TRANS_CANCELLED_IMPLICIT = 0x0007,
+ IBMVFC_INSUFFICIENT_RESOURCE = 0x0008,
+ IBMVFC_COMMAND_FAILED = 0x8000,
+};
+
+enum ibmvfc_mad_types {
+ IBMVFC_NPIV_LOGIN = 0x0001,
+ IBMVFC_DISC_TARGETS = 0x0002,
+ IBMVFC_PORT_LOGIN = 0x0004,
+ IBMVFC_PROCESS_LOGIN = 0x0008,
+ IBMVFC_QUERY_TARGET = 0x0010,
+ IBMVFC_IMPLICIT_LOGOUT = 0x0040,
+ IBMVFC_TMF_MAD = 0x0100,
+};
+
+struct ibmvfc_mad_common {
+ u32 version;
+ u32 reserved;
+ u32 opcode;
+ u16 status;
+ u16 length;
+ u64 tag;
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_npiv_login_mad {
+ struct ibmvfc_mad_common common;
+ struct srp_direct_buf buffer;
+}__attribute__((packed, aligned (8)));
+
+#define IBMVFC_MAX_NAME 256
+
+struct ibmvfc_npiv_login {
+ u32 ostype;
+#define IBMVFC_OS_LINUX 0x02
+ u32 pad;
+ u64 max_dma_len;
+ u32 max_payload;
+ u32 max_response;
+ u32 partition_num;
+ u32 vfc_frame_version;
+ u16 fcp_version;
+ u16 flags;
+#define IBMVFC_CLIENT_MIGRATED 0x01
+#define IBMVFC_FLUSH_ON_HALT 0x02
+ u32 max_cmds;
+ u64 capabilities;
+#define IBMVFC_CAN_MIGRATE 0x01
+ u64 node_name;
+ struct srp_direct_buf async;
+ u8 partition_name[IBMVFC_MAX_NAME];
+ u8 device_name[IBMVFC_MAX_NAME];
+ u8 drc_name[IBMVFC_MAX_NAME];
+ u64 reserved2[2];
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_common_svc_parms {
+ u16 fcph_version;
+ u16 b2b_credit;
+ u16 features;
+ u16 bb_rcv_sz; /* upper nibble is BB_SC_N */
+ u32 ratov;
+ u32 edtov;
+}__attribute__((packed, aligned (4)));
+
+struct ibmvfc_service_parms {
+ struct ibmvfc_common_svc_parms common;
+ u8 port_name[8];
+ u8 node_name[8];
+ u32 class1_parms[4];
+ u32 class2_parms[4];
+ u32 class3_parms[4];
+ u32 obsolete[4];
+ u32 vendor_version[4];
+ u32 services_avail[2];
+ u32 ext_len;
+ u32 reserved[30];
+ u32 clk_sync_qos[2];
+}__attribute__((packed, aligned (4)));
+
+struct ibmvfc_npiv_login_resp {
+ u32 version;
+ u16 status;
+ u16 error;
+ u32 flags;
+#define IBMVFC_NATIVE_FC 0x01
+#define IBMVFC_CAN_FLUSH_ON_HALT 0x08
+ u32 reserved;
+ u64 capabilites;
+ u32 max_cmds;
+ u32 scsi_id_sz;
+ u64 max_dma_len;
+ u64 scsi_id;
+ u64 port_name;
+ u64 node_name;
+ u64 link_speed;
+ u8 partition_name[IBMVFC_MAX_NAME];
+ u8 device_name[IBMVFC_MAX_NAME];
+ u8 port_loc_code[IBMVFC_MAX_NAME];
+ u8 drc_name[IBMVFC_MAX_NAME];
+ struct ibmvfc_service_parms service_parms;
+ u64 reserved2;
+}__attribute__((packed, aligned (8)));
+
+union ibmvfc_npiv_login_data {
+ struct ibmvfc_npiv_login login;
+ struct ibmvfc_npiv_login_resp resp;
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_discover_targets_buf {
+ u32 scsi_id[1];
+#define IBMVFC_DISC_TGT_SCSI_ID_MASK 0x00ffffff
+};
+
+struct ibmvfc_discover_targets {
+ struct ibmvfc_mad_common common;
+ struct srp_direct_buf buffer;
+ u32 flags;
+ u16 status;
+ u16 error;
+ u32 bufflen;
+ u32 num_avail;
+ u32 num_written;
+ u64 reserved[2];
+}__attribute__((packed, aligned (8)));
+
+enum ibmvfc_fc_reason {
+ IBMVFC_INVALID_ELS_CMD_CODE = 0x01,
+ IBMVFC_INVALID_VERSION = 0x02,
+ IBMVFC_LOGICAL_ERROR = 0x03,
+ IBMVFC_INVALID_CT_IU_SIZE = 0x04,
+ IBMVFC_LOGICAL_BUSY = 0x05,
+ IBMVFC_PROTOCOL_ERROR = 0x07,
+ IBMVFC_UNABLE_TO_PERFORM_REQ = 0x09,
+ IBMVFC_CMD_NOT_SUPPORTED = 0x0B,
+ IBMVFC_SERVER_NOT_AVAIL = 0x0D,
+ IBMVFC_CMD_IN_PROGRESS = 0x0E,
+ IBMVFC_VENDOR_SPECIFIC = 0xFF,
+};
+
+enum ibmvfc_fc_type {
+ IBMVFC_FABRIC_REJECT = 0x01,
+ IBMVFC_PORT_REJECT = 0x02,
+ IBMVFC_LS_REJECT = 0x03,
+ IBMVFC_FABRIC_BUSY = 0x04,
+ IBMVFC_PORT_BUSY = 0x05,
+ IBMVFC_BASIC_REJECT = 0x06,
+};
+
+enum ibmvfc_gs_explain {
+ IBMVFC_PORT_NAME_NOT_REG = 0x02,
+};
+
+struct ibmvfc_port_login {
+ struct ibmvfc_mad_common common;
+ u64 scsi_id;
+ u16 reserved;
+ u16 fc_service_class;
+ u32 blksz;
+ u32 hdr_per_blk;
+ u16 status;
+ u16 error; /* also fc_reason */
+ u16 fc_explain;
+ u16 fc_type;
+ u32 reserved2;
+ struct ibmvfc_service_parms service_parms;
+ struct ibmvfc_service_parms service_parms_change;
+ u64 reserved3[2];
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_prli_svc_parms {
+ u8 type;
+#define IBMVFC_SCSI_FCP_TYPE 0x08
+ u8 type_ext;
+ u16 flags;
+#define IBMVFC_PRLI_ORIG_PA_VALID 0x8000
+#define IBMVFC_PRLI_RESP_PA_VALID 0x4000
+#define IBMVFC_PRLI_EST_IMG_PAIR 0x2000
+ u32 orig_pa;
+ u32 resp_pa;
+ u32 service_parms;
+#define IBMVFC_PRLI_TASK_RETRY 0x00000200
+#define IBMVFC_PRLI_RETRY 0x00000100
+#define IBMVFC_PRLI_DATA_OVERLAY 0x00000040
+#define IBMVFC_PRLI_INITIATOR_FUNC 0x00000020
+#define IBMVFC_PRLI_TARGET_FUNC 0x00000010
+#define IBMVFC_PRLI_READ_FCP_XFER_RDY_DISABLED 0x00000002
+#define IBMVFC_PRLI_WR_FCP_XFER_RDY_DISABLED 0x00000001
+}__attribute__((packed, aligned (4)));
+
+struct ibmvfc_process_login {
+ struct ibmvfc_mad_common common;
+ u64 scsi_id;
+ struct ibmvfc_prli_svc_parms parms;
+ u8 reserved[48];
+ u16 status;
+ u16 error; /* also fc_reason */
+ u32 reserved2;
+ u64 reserved3[2];
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_query_tgt {
+ struct ibmvfc_mad_common common;
+ u64 wwpn;
+ u64 scsi_id;
+ u16 status;
+ u16 error;
+ u16 fc_explain;
+ u16 fc_type;
+ u64 reserved[2];
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_implicit_logout {
+ struct ibmvfc_mad_common common;
+ u64 old_scsi_id;
+ u64 reserved[2];
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_tmf {
+ struct ibmvfc_mad_common common;
+ u64 scsi_id;
+ struct scsi_lun lun;
+ u32 flags;
+#define IBMVFC_TMF_ABORT_TASK 0x02
+#define IBMVFC_TMF_ABORT_TASK_SET 0x04
+#define IBMVFC_TMF_LUN_RESET 0x10
+#define IBMVFC_TMF_TGT_RESET 0x20
+#define IBMVFC_TMF_LUA_VALID 0x40
+ u32 cancel_key;
+ u32 my_cancel_key;
+#define IBMVFC_TMF_CANCEL_KEY 0x80000000
+ u32 pad;
+ u64 reserved[2];
+}__attribute__((packed, aligned (8)));
+
+enum ibmvfc_fcp_rsp_info_codes {
+ RSP_NO_FAILURE = 0x00,
+ RSP_TMF_REJECTED = 0x04,
+ RSP_TMF_FAILED = 0x05,
+ RSP_TMF_INVALID_LUN = 0x09,
+};
+
+struct ibmvfc_fcp_rsp_info {
+ u16 reserved;
+ u8 rsp_code;
+ u8 reserved2[4];
+}__attribute__((packed, aligned (2)));
+
+enum ibmvfc_fcp_rsp_flags {
+ FCP_BIDI_RSP = 0x80,
+ FCP_BIDI_READ_RESID_UNDER = 0x40,
+ FCP_BIDI_READ_RESID_OVER = 0x20,
+ FCP_CONF_REQ = 0x10,
+ FCP_RESID_UNDER = 0x08,
+ FCP_RESID_OVER = 0x04,
+ FCP_SNS_LEN_VALID = 0x02,
+ FCP_RSP_LEN_VALID = 0x01,
+};
+
+union ibmvfc_fcp_rsp_data {
+ struct ibmvfc_fcp_rsp_info info;
+ u8 sense[SCSI_SENSE_BUFFERSIZE + sizeof(struct ibmvfc_fcp_rsp_info)];
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_fcp_rsp {
+ u64 reserved;
+ u16 retry_delay_timer;
+ u8 flags;
+ u8 scsi_status;
+ u32 fcp_resid;
+ u32 fcp_sense_len;
+ u32 fcp_rsp_len;
+ union ibmvfc_fcp_rsp_data data;
+}__attribute__((packed, aligned (8)));
+
+enum ibmvfc_cmd_flags {
+ IBMVFC_SCATTERLIST = 0x0001,
+ IBMVFC_NO_MEM_DESC = 0x0002,
+ IBMVFC_READ = 0x0004,
+ IBMVFC_WRITE = 0x0008,
+ IBMVFC_TMF = 0x0080,
+ IBMVFC_CLASS_3_ERR = 0x0100,
+};
+
+enum ibmvfc_fc_task_attr {
+ IBMVFC_SIMPLE_TASK = 0x00,
+ IBMVFC_HEAD_OF_QUEUE = 0x01,
+ IBMVFC_ORDERED_TASK = 0x02,
+ IBMVFC_ACA_TASK = 0x04,
+};
+
+enum ibmvfc_fc_tmf_flags {
+ IBMVFC_ABORT_TASK_SET = 0x02,
+ IBMVFC_LUN_RESET = 0x10,
+ IBMVFC_TARGET_RESET = 0x20,
+};
+
+struct ibmvfc_fcp_cmd_iu {
+ struct scsi_lun lun;
+ u8 crn;
+ u8 pri_task_attr;
+ u8 tmf_flags;
+ u8 add_cdb_len;
+#define IBMVFC_RDDATA 0x02
+#define IBMVFC_WRDATA 0x01
+ u8 cdb[IBMVFC_MAX_CDB_LEN];
+ u32 xfer_len;
+}__attribute__((packed, aligned (4)));
+
+struct ibmvfc_cmd {
+ u64 task_tag;
+ u32 frame_type;
+ u32 payload_len;
+ u32 resp_len;
+ u32 adapter_resid;
+ u16 status;
+ u16 error;
+ u16 flags;
+ u16 response_flags;
+#define IBMVFC_ADAPTER_RESID_VALID 0x01
+ u32 cancel_key;
+ u32 exchange_id;
+ struct srp_direct_buf ext_func;
+ struct srp_direct_buf ioba;
+ struct srp_direct_buf resp;
+ u64 correlation;
+ u64 tgt_scsi_id;
+ u64 tag;
+ u64 reserved3[2];
+ struct ibmvfc_fcp_cmd_iu iu;
+ struct ibmvfc_fcp_rsp rsp;
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_trace_start_entry {
+ u32 xfer_len;
+}__attribute__((packed));
+
+struct ibmvfc_trace_end_entry {
+ u16 status;
+ u16 error;
+ u8 fcp_rsp_flags;
+ u8 rsp_code;
+ u8 scsi_status;
+ u8 reserved;
+}__attribute__((packed));
+
+struct ibmvfc_trace_entry {
+ struct ibmvfc_event *evt;
+ u32 time;
+ u32 scsi_id;
+ u32 lun;
+ u8 fmt;
+ u8 op_code;
+ u8 tmf_flags;
+ u8 type;
+#define IBMVFC_TRC_START 0x00
+#define IBMVFC_TRC_END 0xff
+ union {
+ struct ibmvfc_trace_start_entry start;
+ struct ibmvfc_trace_end_entry end;
+ } u;
+}__attribute__((packed, aligned (8)));
+
+enum ibmvfc_crq_formats {
+ IBMVFC_CMD_FORMAT = 0x01,
+ IBMVFC_ASYNC_EVENT = 0x02,
+ IBMVFC_MAD_FORMAT = 0x04,
+};
+
+enum ibmvfc_async_event {
+ IBMVFC_AE_ELS_PLOGI = 0x0001,
+ IBMVFC_AE_ELS_LOGO = 0x0002,
+ IBMVFC_AE_ELS_PRLO = 0x0004,
+ IBMVFC_AE_SCN_NPORT = 0x0008,
+ IBMVFC_AE_SCN_GROUP = 0x0010,
+ IBMVFC_AE_SCN_DOMAIN = 0x0020,
+ IBMVFC_AE_SCN_FABRIC = 0x0040,
+ IBMVFC_AE_LINK_UP = 0x0080,
+ IBMVFC_AE_LINK_DOWN = 0x0100,
+ IBMVFC_AE_LINK_DEAD = 0x0200,
+ IBMVFC_AE_HALT = 0x0400,
+ IBMVFC_AE_RESUME = 0x0800,
+ IBMVFC_AE_ADAPTER_FAILED = 0x1000,
+};
+
+struct ibmvfc_crq {
+ u8 valid;
+ u8 format;
+ u8 reserved[6];
+ u64 ioba;
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_crq_queue {
+ struct ibmvfc_crq *msgs;
+ int size, cur;
+ dma_addr_t msg_token;
+};
+
+struct ibmvfc_async_crq {
+ u8 valid;
+ u8 pad[3];
+ u32 pad2;
+ u64 event;
+ u64 scsi_id;
+ u64 wwpn;
+ u64 node_name;
+ u64 reserved;
+}__attribute__((packed, aligned (8)));
+
+struct ibmvfc_async_crq_queue {
+ struct ibmvfc_async_crq *msgs;
+ int size, cur;
+ dma_addr_t msg_token;
+};
+
+union ibmvfc_iu {
+ struct ibmvfc_mad_common mad_common;
+ struct ibmvfc_npiv_login_mad npiv_login;
+ struct ibmvfc_discover_targets discover_targets;
+ struct ibmvfc_port_login plogi;
+ struct ibmvfc_process_login prli;
+ struct ibmvfc_query_tgt query_tgt;
+ struct ibmvfc_implicit_logout implicit_logout;
+ struct ibmvfc_tmf tmf;
+ struct ibmvfc_cmd cmd;
+}__attribute__((packed, aligned (8)));
+
+enum ibmvfc_target_action {
+ IBMVFC_TGT_ACTION_NONE = 0,
+ IBMVFC_TGT_ACTION_INIT,
+ IBMVFC_TGT_ACTION_INIT_WAIT,
+ IBMVFC_TGT_ACTION_ADD_RPORT,
+ IBMVFC_TGT_ACTION_DEL_RPORT,
+};
+
+struct ibmvfc_target {
+ struct list_head queue;
+ struct ibmvfc_host *vhost;
+ u64 scsi_id;
+ u64 new_scsi_id;
+ struct fc_rport *rport;
+ int target_id;
+ enum ibmvfc_target_action action;
+ int need_login;
+ int init_retries;
+ struct ibmvfc_service_parms service_parms;
+ struct ibmvfc_service_parms service_parms_change;
+ struct fc_rport_identifiers ids;
+ void (*job_step) (struct ibmvfc_target *);
+ struct kref kref;
+};
+
+/* a unit of work for the hosting partition */
+struct ibmvfc_event {
+ struct list_head queue;
+ struct ibmvfc_host *vhost;
+ struct ibmvfc_target *tgt;
+ struct scsi_cmnd *cmnd;
+ atomic_t free;
+ union ibmvfc_iu *xfer_iu;
+ void (*done) (struct ibmvfc_event *);
+ struct ibmvfc_crq crq;
+ union ibmvfc_iu iu;
+ union ibmvfc_iu *sync_iu;
+ struct srp_direct_buf *ext_list;
+ dma_addr_t ext_list_token;
+ struct completion comp;
+ struct timer_list timer;
+};
+
+/* a pool of event structs for use */
+struct ibmvfc_event_pool {
+ struct ibmvfc_event *events;
+ u32 size;
+ union ibmvfc_iu *iu_storage;
+ dma_addr_t iu_token;
+};
+
+enum ibmvfc_host_action {
+ IBMVFC_HOST_ACTION_NONE = 0,
+ IBMVFC_HOST_ACTION_INIT,
+ IBMVFC_HOST_ACTION_INIT_WAIT,
+ IBMVFC_HOST_ACTION_QUERY,
+ IBMVFC_HOST_ACTION_QUERY_TGTS,
+ IBMVFC_HOST_ACTION_TGT_DEL,
+ IBMVFC_HOST_ACTION_ALLOC_TGTS,
+ IBMVFC_HOST_ACTION_TGT_INIT,
+ IBMVFC_HOST_ACTION_TGT_ADD,
+};
+
+enum ibmvfc_host_state {
+ IBMVFC_NO_CRQ = 0,
+ IBMVFC_INITIALIZING,
+ IBMVFC_ACTIVE,
+ IBMVFC_HALTED,
+ IBMVFC_LINK_DOWN,
+ IBMVFC_LINK_DEAD,
+ IBMVFC_HOST_OFFLINE,
+};
+
+struct ibmvfc_host {
+ char name[8];
+ struct list_head queue;
+ struct Scsi_Host *host;
+ enum ibmvfc_host_state state;
+ enum ibmvfc_host_action action;
+#define IBMVFC_NUM_TRACE_INDEX_BITS 8
+#define IBMVFC_NUM_TRACE_ENTRIES (1 << IBMVFC_NUM_TRACE_INDEX_BITS)
+#define IBMVFC_TRACE_SIZE (sizeof(struct ibmvfc_trace_entry) * IBMVFC_NUM_TRACE_ENTRIES)
+ struct ibmvfc_trace_entry *trace;
+ u32 trace_index:IBMVFC_NUM_TRACE_INDEX_BITS;
+ int num_targets;
+ struct list_head targets;
+ struct list_head sent;
+ struct list_head free;
+ struct device *dev;
+ struct ibmvfc_event_pool pool;
+ struct dma_pool *sg_pool;
+ mempool_t *tgt_pool;
+ struct ibmvfc_crq_queue crq;
+ struct ibmvfc_async_crq_queue async_crq;
+ struct ibmvfc_npiv_login login_info;
+ union ibmvfc_npiv_login_data *login_buf;
+ dma_addr_t login_buf_dma;
+ int disc_buf_sz;
+ int log_level;
+ struct ibmvfc_discover_targets_buf *disc_buf;
+ int task_set;
+ int init_retries;
+ int discovery_threads;
+ int client_migrated;
+ int reinit;
+ int events_to_log;
+#define IBMVFC_AE_LINKUP 0x0001
+#define IBMVFC_AE_LINKDOWN 0x0002
+#define IBMVFC_AE_RSCN 0x0004
+ dma_addr_t disc_buf_dma;
+ unsigned int partition_number;
+ char partition_name[97];
+ void (*job_step) (struct ibmvfc_host *);
+ struct task_struct *work_thread;
+ wait_queue_head_t init_wait_q;
+ wait_queue_head_t work_wait_q;
+};
+
+#define DBG_CMD(CMD) do { if (ibmvfc_debug) CMD; } while (0)
+
+#define tgt_dbg(t, fmt, ...) \
+ DBG_CMD(dev_info((t)->vhost->dev, "%lX: " fmt, (t)->scsi_id, ##__VA_ARGS__))
+
+#define tgt_err(t, fmt, ...) \
+ dev_err((t)->vhost->dev, "%lX: " fmt, (t)->scsi_id, ##__VA_ARGS__)
+
+#define ibmvfc_dbg(vhost, ...) \
+ DBG_CMD(dev_info((vhost)->dev, ##__VA_ARGS__))
+
+#define ibmvfc_log(vhost, level, ...) \
+ do { \
+ if (level >= (vhost)->log_level) \
+ dev_err((vhost)->dev, ##__VA_ARGS__); \
+ } while (0)
+
+#define ENTER DBG_CMD(printk(KERN_INFO IBMVFC_NAME": Entering %s\n", __FUNCTION__))
+#define LEAVE DBG_CMD(printk(KERN_INFO IBMVFC_NAME": Leaving %s\n", __FUNCTION__))
+
+#ifdef CONFIG_SCSI_IBMVFC_TRACE
+#define ibmvfc_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
+#define ibmvfc_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
+#else
+#define ibmvfc_create_trace_file(kobj, attr) 0
+#define ibmvfc_remove_trace_file(kobj, attr) do { } while (0)
+#endif
+
+#endif
diff --git a/drivers/scsi/iscsi_tcp.c b/drivers/scsi/iscsi_tcp.c
index 72b9b2a..2a2f009 100644
--- a/drivers/scsi/iscsi_tcp.c
+++ b/drivers/scsi/iscsi_tcp.c
@@ -64,6 +64,10 @@
#define BUG_ON(expr)
#endif
+static struct scsi_transport_template *iscsi_tcp_scsi_transport;
+static struct scsi_host_template iscsi_sht;
+static struct iscsi_transport iscsi_tcp_transport;
+
static unsigned int iscsi_max_lun = 512;
module_param_named(max_lun, iscsi_max_lun, uint, S_IRUGO);
@@ -494,39 +498,43 @@
* must be called with session lock
*/
static void
-iscsi_tcp_cleanup_ctask(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask)
+iscsi_tcp_cleanup_task(struct iscsi_conn *conn, struct iscsi_task *task)
{
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
struct iscsi_r2t_info *r2t;
- /* flush ctask's r2t queues */
- while (__kfifo_get(tcp_ctask->r2tqueue, (void*)&r2t, sizeof(void*))) {
- __kfifo_put(tcp_ctask->r2tpool.queue, (void*)&r2t,
+ /* nothing to do for mgmt tasks */
+ if (!task->sc)
+ return;
+
+ /* flush task's r2t queues */
+ while (__kfifo_get(tcp_task->r2tqueue, (void*)&r2t, sizeof(void*))) {
+ __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t,
sizeof(void*));
- debug_scsi("iscsi_tcp_cleanup_ctask pending r2t dropped\n");
+ debug_scsi("iscsi_tcp_cleanup_task pending r2t dropped\n");
}
- r2t = tcp_ctask->r2t;
+ r2t = tcp_task->r2t;
if (r2t != NULL) {
- __kfifo_put(tcp_ctask->r2tpool.queue, (void*)&r2t,
+ __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t,
sizeof(void*));
- tcp_ctask->r2t = NULL;
+ tcp_task->r2t = NULL;
}
}
/**
* iscsi_data_rsp - SCSI Data-In Response processing
* @conn: iscsi connection
- * @ctask: scsi command task
+ * @task: scsi command task
**/
static int
-iscsi_data_rsp(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask)
+iscsi_data_rsp(struct iscsi_conn *conn, struct iscsi_task *task)
{
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
struct iscsi_data_rsp *rhdr = (struct iscsi_data_rsp *)tcp_conn->in.hdr;
struct iscsi_session *session = conn->session;
- struct scsi_cmnd *sc = ctask->sc;
+ struct scsi_cmnd *sc = task->sc;
int datasn = be32_to_cpu(rhdr->datasn);
unsigned total_in_length = scsi_in(sc)->length;
@@ -534,18 +542,18 @@
if (tcp_conn->in.datalen == 0)
return 0;
- if (tcp_ctask->exp_datasn != datasn) {
- debug_tcp("%s: ctask->exp_datasn(%d) != rhdr->datasn(%d)\n",
- __FUNCTION__, tcp_ctask->exp_datasn, datasn);
+ if (tcp_task->exp_datasn != datasn) {
+ debug_tcp("%s: task->exp_datasn(%d) != rhdr->datasn(%d)\n",
+ __func__, tcp_task->exp_datasn, datasn);
return ISCSI_ERR_DATASN;
}
- tcp_ctask->exp_datasn++;
+ tcp_task->exp_datasn++;
- tcp_ctask->data_offset = be32_to_cpu(rhdr->offset);
- if (tcp_ctask->data_offset + tcp_conn->in.datalen > total_in_length) {
+ tcp_task->data_offset = be32_to_cpu(rhdr->offset);
+ if (tcp_task->data_offset + tcp_conn->in.datalen > total_in_length) {
debug_tcp("%s: data_offset(%d) + data_len(%d) > total_length_in(%d)\n",
- __FUNCTION__, tcp_ctask->data_offset,
+ __func__, tcp_task->data_offset,
tcp_conn->in.datalen, total_in_length);
return ISCSI_ERR_DATA_OFFSET;
}
@@ -574,7 +582,7 @@
/**
* iscsi_solicit_data_init - initialize first Data-Out
* @conn: iscsi connection
- * @ctask: scsi command task
+ * @task: scsi command task
* @r2t: R2T info
*
* Notes:
@@ -584,7 +592,7 @@
* This function is called with connection lock taken.
**/
static void
-iscsi_solicit_data_init(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask,
+iscsi_solicit_data_init(struct iscsi_conn *conn, struct iscsi_task *task,
struct iscsi_r2t_info *r2t)
{
struct iscsi_data *hdr;
@@ -595,8 +603,8 @@
hdr->datasn = cpu_to_be32(r2t->solicit_datasn);
r2t->solicit_datasn++;
hdr->opcode = ISCSI_OP_SCSI_DATA_OUT;
- memcpy(hdr->lun, ctask->hdr->lun, sizeof(hdr->lun));
- hdr->itt = ctask->hdr->itt;
+ memcpy(hdr->lun, task->hdr->lun, sizeof(hdr->lun));
+ hdr->itt = task->hdr->itt;
hdr->exp_statsn = r2t->exp_statsn;
hdr->offset = cpu_to_be32(r2t->data_offset);
if (r2t->data_length > conn->max_xmit_dlength) {
@@ -616,14 +624,14 @@
/**
* iscsi_r2t_rsp - iSCSI R2T Response processing
* @conn: iscsi connection
- * @ctask: scsi command task
+ * @task: scsi command task
**/
static int
-iscsi_r2t_rsp(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask)
+iscsi_r2t_rsp(struct iscsi_conn *conn, struct iscsi_task *task)
{
struct iscsi_r2t_info *r2t;
struct iscsi_session *session = conn->session;
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
struct iscsi_r2t_rsp *rhdr = (struct iscsi_r2t_rsp *)tcp_conn->in.hdr;
int r2tsn = be32_to_cpu(rhdr->r2tsn);
@@ -636,23 +644,23 @@
return ISCSI_ERR_DATALEN;
}
- if (tcp_ctask->exp_datasn != r2tsn){
- debug_tcp("%s: ctask->exp_datasn(%d) != rhdr->r2tsn(%d)\n",
- __FUNCTION__, tcp_ctask->exp_datasn, r2tsn);
+ if (tcp_task->exp_datasn != r2tsn){
+ debug_tcp("%s: task->exp_datasn(%d) != rhdr->r2tsn(%d)\n",
+ __func__, tcp_task->exp_datasn, r2tsn);
return ISCSI_ERR_R2TSN;
}
/* fill-in new R2T associated with the task */
iscsi_update_cmdsn(session, (struct iscsi_nopin*)rhdr);
- if (!ctask->sc || session->state != ISCSI_STATE_LOGGED_IN) {
+ if (!task->sc || session->state != ISCSI_STATE_LOGGED_IN) {
iscsi_conn_printk(KERN_INFO, conn,
"dropping R2T itt %d in recovery.\n",
- ctask->itt);
+ task->itt);
return 0;
}
- rc = __kfifo_get(tcp_ctask->r2tpool.queue, (void*)&r2t, sizeof(void*));
+ rc = __kfifo_get(tcp_task->r2tpool.queue, (void*)&r2t, sizeof(void*));
BUG_ON(!rc);
r2t->exp_statsn = rhdr->statsn;
@@ -660,7 +668,7 @@
if (r2t->data_length == 0) {
iscsi_conn_printk(KERN_ERR, conn,
"invalid R2T with zero data len\n");
- __kfifo_put(tcp_ctask->r2tpool.queue, (void*)&r2t,
+ __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t,
sizeof(void*));
return ISCSI_ERR_DATALEN;
}
@@ -671,12 +679,12 @@
r2t->data_length, session->max_burst);
r2t->data_offset = be32_to_cpu(rhdr->data_offset);
- if (r2t->data_offset + r2t->data_length > scsi_out(ctask->sc)->length) {
+ if (r2t->data_offset + r2t->data_length > scsi_out(task->sc)->length) {
iscsi_conn_printk(KERN_ERR, conn,
"invalid R2T with data len %u at offset %u "
"and total length %d\n", r2t->data_length,
- r2t->data_offset, scsi_out(ctask->sc)->length);
- __kfifo_put(tcp_ctask->r2tpool.queue, (void*)&r2t,
+ r2t->data_offset, scsi_out(task->sc)->length);
+ __kfifo_put(tcp_task->r2tpool.queue, (void*)&r2t,
sizeof(void*));
return ISCSI_ERR_DATALEN;
}
@@ -684,13 +692,13 @@
r2t->ttt = rhdr->ttt; /* no flip */
r2t->solicit_datasn = 0;
- iscsi_solicit_data_init(conn, ctask, r2t);
+ iscsi_solicit_data_init(conn, task, r2t);
- tcp_ctask->exp_datasn = r2tsn + 1;
- __kfifo_put(tcp_ctask->r2tqueue, (void*)&r2t, sizeof(void*));
+ tcp_task->exp_datasn = r2tsn + 1;
+ __kfifo_put(tcp_task->r2tqueue, (void*)&r2t, sizeof(void*));
conn->r2t_pdus_cnt++;
- iscsi_requeue_ctask(ctask);
+ iscsi_requeue_task(task);
return 0;
}
@@ -733,10 +741,8 @@
iscsi_tcp_hdr_dissect(struct iscsi_conn *conn, struct iscsi_hdr *hdr)
{
int rc = 0, opcode, ahslen;
- struct iscsi_session *session = conn->session;
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
- struct iscsi_cmd_task *ctask;
- uint32_t itt;
+ struct iscsi_task *task;
/* verify PDU length */
tcp_conn->in.datalen = ntoh24(hdr->dlength);
@@ -754,7 +760,7 @@
opcode = hdr->opcode & ISCSI_OPCODE_MASK;
/* verify itt (itt encoding: age+cid+itt) */
- rc = iscsi_verify_itt(conn, hdr, &itt);
+ rc = iscsi_verify_itt(conn, hdr->itt);
if (rc)
return rc;
@@ -763,16 +769,21 @@
switch(opcode) {
case ISCSI_OP_SCSI_DATA_IN:
- ctask = session->cmds[itt];
spin_lock(&conn->session->lock);
- rc = iscsi_data_rsp(conn, ctask);
- spin_unlock(&conn->session->lock);
- if (rc)
- return rc;
+ task = iscsi_itt_to_ctask(conn, hdr->itt);
+ if (!task)
+ rc = ISCSI_ERR_BAD_ITT;
+ else
+ rc = iscsi_data_rsp(conn, task);
+ if (rc) {
+ spin_unlock(&conn->session->lock);
+ break;
+ }
+
if (tcp_conn->in.datalen) {
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
struct hash_desc *rx_hash = NULL;
- struct scsi_data_buffer *sdb = scsi_in(ctask->sc);
+ struct scsi_data_buffer *sdb = scsi_in(task->sc);
/*
* Setup copy of Data-In into the Scsi_Cmnd
@@ -787,17 +798,21 @@
debug_tcp("iscsi_tcp_begin_data_in(%p, offset=%d, "
"datalen=%d)\n", tcp_conn,
- tcp_ctask->data_offset,
+ tcp_task->data_offset,
tcp_conn->in.datalen);
- return iscsi_segment_seek_sg(&tcp_conn->in.segment,
- sdb->table.sgl,
- sdb->table.nents,
- tcp_ctask->data_offset,
- tcp_conn->in.datalen,
- iscsi_tcp_process_data_in,
- rx_hash);
+ rc = iscsi_segment_seek_sg(&tcp_conn->in.segment,
+ sdb->table.sgl,
+ sdb->table.nents,
+ tcp_task->data_offset,
+ tcp_conn->in.datalen,
+ iscsi_tcp_process_data_in,
+ rx_hash);
+ spin_unlock(&conn->session->lock);
+ return rc;
}
- /* fall through */
+ rc = __iscsi_complete_pdu(conn, hdr, NULL, 0);
+ spin_unlock(&conn->session->lock);
+ break;
case ISCSI_OP_SCSI_CMD_RSP:
if (tcp_conn->in.datalen) {
iscsi_tcp_data_recv_prep(tcp_conn);
@@ -806,15 +821,17 @@
rc = iscsi_complete_pdu(conn, hdr, NULL, 0);
break;
case ISCSI_OP_R2T:
- ctask = session->cmds[itt];
- if (ahslen)
+ spin_lock(&conn->session->lock);
+ task = iscsi_itt_to_ctask(conn, hdr->itt);
+ if (!task)
+ rc = ISCSI_ERR_BAD_ITT;
+ else if (ahslen)
rc = ISCSI_ERR_AHSLEN;
- else if (ctask->sc->sc_data_direction == DMA_TO_DEVICE) {
- spin_lock(&session->lock);
- rc = iscsi_r2t_rsp(conn, ctask);
- spin_unlock(&session->lock);
- } else
+ else if (task->sc->sc_data_direction == DMA_TO_DEVICE)
+ rc = iscsi_r2t_rsp(conn, task);
+ else
rc = ISCSI_ERR_PROTO;
+ spin_unlock(&conn->session->lock);
break;
case ISCSI_OP_LOGIN_RSP:
case ISCSI_OP_TEXT_RSP:
@@ -1176,7 +1193,7 @@
{
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
- debug_tcp("%s(%p%s)\n", __FUNCTION__, tcp_conn,
+ debug_tcp("%s(%p%s)\n", __func__, tcp_conn,
conn->hdrdgst_en? ", digest enabled" : "");
/* Clear the data segment - needs to be filled in by the
@@ -1185,7 +1202,7 @@
/* If header digest is enabled, compute the CRC and
* place the digest into the same buffer. We make
- * sure that both iscsi_tcp_ctask and mtask have
+ * sure that both iscsi_tcp_task and mtask have
* sufficient room.
*/
if (conn->hdrdgst_en) {
@@ -1217,7 +1234,7 @@
struct hash_desc *tx_hash = NULL;
unsigned int hdr_spec_len;
- debug_tcp("%s(%p, offset=%d, datalen=%d%s)\n", __FUNCTION__,
+ debug_tcp("%s(%p, offset=%d, datalen=%d%s)\n", __func__,
tcp_conn, offset, len,
conn->datadgst_en? ", digest enabled" : "");
@@ -1242,7 +1259,7 @@
struct hash_desc *tx_hash = NULL;
unsigned int hdr_spec_len;
- debug_tcp("%s(%p, datalen=%d%s)\n", __FUNCTION__, tcp_conn, len,
+ debug_tcp("%s(%p, datalen=%d%s)\n", __func__, tcp_conn, len,
conn->datadgst_en? ", digest enabled" : "");
/* Make sure the datalen matches what the caller
@@ -1260,7 +1277,7 @@
/**
* iscsi_solicit_data_cont - initialize next Data-Out
* @conn: iscsi connection
- * @ctask: scsi command task
+ * @task: scsi command task
* @r2t: R2T info
* @left: bytes left to transfer
*
@@ -1271,7 +1288,7 @@
* Called under connection lock.
**/
static int
-iscsi_solicit_data_cont(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask,
+iscsi_solicit_data_cont(struct iscsi_conn *conn, struct iscsi_task *task,
struct iscsi_r2t_info *r2t)
{
struct iscsi_data *hdr;
@@ -1288,8 +1305,8 @@
hdr->datasn = cpu_to_be32(r2t->solicit_datasn);
r2t->solicit_datasn++;
hdr->opcode = ISCSI_OP_SCSI_DATA_OUT;
- memcpy(hdr->lun, ctask->hdr->lun, sizeof(hdr->lun));
- hdr->itt = ctask->hdr->itt;
+ memcpy(hdr->lun, task->hdr->lun, sizeof(hdr->lun));
+ hdr->itt = task->hdr->itt;
hdr->exp_statsn = r2t->exp_statsn;
new_offset = r2t->data_offset + r2t->sent;
hdr->offset = cpu_to_be32(new_offset);
@@ -1307,89 +1324,76 @@
}
/**
- * iscsi_tcp_ctask - Initialize iSCSI SCSI_READ or SCSI_WRITE commands
+ * iscsi_tcp_task - Initialize iSCSI SCSI_READ or SCSI_WRITE commands
* @conn: iscsi connection
- * @ctask: scsi command task
+ * @task: scsi command task
* @sc: scsi command
**/
static int
-iscsi_tcp_ctask_init(struct iscsi_cmd_task *ctask)
+iscsi_tcp_task_init(struct iscsi_task *task)
{
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
- struct iscsi_conn *conn = ctask->conn;
- struct scsi_cmnd *sc = ctask->sc;
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
+ struct iscsi_conn *conn = task->conn;
+ struct scsi_cmnd *sc = task->sc;
int err;
- BUG_ON(__kfifo_len(tcp_ctask->r2tqueue));
- tcp_ctask->sent = 0;
- tcp_ctask->exp_datasn = 0;
+ if (!sc) {
+ /*
+ * mgmt tasks do not have a scatterlist since they come
+ * in from the iscsi interface.
+ */
+ debug_scsi("mtask deq [cid %d itt 0x%x]\n", conn->id,
+ task->itt);
+
+ /* Prepare PDU, optionally w/ immediate data */
+ iscsi_tcp_send_hdr_prep(conn, task->hdr, sizeof(*task->hdr));
+
+ /* If we have immediate data, attach a payload */
+ if (task->data_count)
+ iscsi_tcp_send_linear_data_prepare(conn, task->data,
+ task->data_count);
+ return 0;
+ }
+
+ BUG_ON(__kfifo_len(tcp_task->r2tqueue));
+ tcp_task->sent = 0;
+ tcp_task->exp_datasn = 0;
/* Prepare PDU, optionally w/ immediate data */
- debug_scsi("ctask deq [cid %d itt 0x%x imm %d unsol %d]\n",
- conn->id, ctask->itt, ctask->imm_count,
- ctask->unsol_count);
- iscsi_tcp_send_hdr_prep(conn, ctask->hdr, ctask->hdr_len);
+ debug_scsi("task deq [cid %d itt 0x%x imm %d unsol %d]\n",
+ conn->id, task->itt, task->imm_count,
+ task->unsol_count);
+ iscsi_tcp_send_hdr_prep(conn, task->hdr, task->hdr_len);
- if (!ctask->imm_count)
+ if (!task->imm_count)
return 0;
/* If we have immediate data, attach a payload */
err = iscsi_tcp_send_data_prep(conn, scsi_out(sc)->table.sgl,
scsi_out(sc)->table.nents,
- 0, ctask->imm_count);
+ 0, task->imm_count);
if (err)
return err;
- tcp_ctask->sent += ctask->imm_count;
- ctask->imm_count = 0;
- return 0;
-}
-
-/**
- * iscsi_tcp_mtask_xmit - xmit management(immediate) task
- * @conn: iscsi connection
- * @mtask: task management task
- *
- * Notes:
- * The function can return -EAGAIN in which case caller must
- * call it again later, or recover. '0' return code means successful
- * xmit.
- **/
-static int
-iscsi_tcp_mtask_xmit(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask)
-{
- int rc;
-
- /* Flush any pending data first. */
- rc = iscsi_tcp_flush(conn);
- if (rc < 0)
- return rc;
-
- if (mtask->hdr->itt == RESERVED_ITT) {
- struct iscsi_session *session = conn->session;
-
- spin_lock_bh(&session->lock);
- iscsi_free_mgmt_task(conn, mtask);
- spin_unlock_bh(&session->lock);
- }
-
+ tcp_task->sent += task->imm_count;
+ task->imm_count = 0;
return 0;
}
/*
- * iscsi_tcp_ctask_xmit - xmit normal PDU task
- * @conn: iscsi connection
- * @ctask: iscsi command task
+ * iscsi_tcp_task_xmit - xmit normal PDU task
+ * @task: iscsi command task
*
* We're expected to return 0 when everything was transmitted succesfully,
* -EAGAIN if there's still data in the queue, or != 0 for any other kind
* of error.
*/
static int
-iscsi_tcp_ctask_xmit(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask)
+iscsi_tcp_task_xmit(struct iscsi_task *task)
{
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
- struct scsi_cmnd *sc = ctask->sc;
- struct scsi_data_buffer *sdb = scsi_out(sc);
+ struct iscsi_conn *conn = task->conn;
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
+ struct scsi_cmnd *sc = task->sc;
+ struct scsi_data_buffer *sdb;
int rc = 0;
flush:
@@ -1398,31 +1402,39 @@
if (rc < 0)
return rc;
+ /* mgmt command */
+ if (!sc) {
+ if (task->hdr->itt == RESERVED_ITT)
+ iscsi_put_task(task);
+ return 0;
+ }
+
/* Are we done already? */
if (sc->sc_data_direction != DMA_TO_DEVICE)
return 0;
- if (ctask->unsol_count != 0) {
- struct iscsi_data *hdr = &tcp_ctask->unsol_dtask.hdr;
+ sdb = scsi_out(sc);
+ if (task->unsol_count != 0) {
+ struct iscsi_data *hdr = &tcp_task->unsol_dtask.hdr;
/* Prepare a header for the unsolicited PDU.
* The amount of data we want to send will be
- * in ctask->data_count.
+ * in task->data_count.
* FIXME: return the data count instead.
*/
- iscsi_prep_unsolicit_data_pdu(ctask, hdr);
+ iscsi_prep_unsolicit_data_pdu(task, hdr);
debug_tcp("unsol dout [itt 0x%x doff %d dlen %d]\n",
- ctask->itt, tcp_ctask->sent, ctask->data_count);
+ task->itt, tcp_task->sent, task->data_count);
iscsi_tcp_send_hdr_prep(conn, hdr, sizeof(*hdr));
rc = iscsi_tcp_send_data_prep(conn, sdb->table.sgl,
- sdb->table.nents, tcp_ctask->sent,
- ctask->data_count);
+ sdb->table.nents, tcp_task->sent,
+ task->data_count);
if (rc)
goto fail;
- tcp_ctask->sent += ctask->data_count;
- ctask->unsol_count -= ctask->data_count;
+ tcp_task->sent += task->data_count;
+ task->unsol_count -= task->data_count;
goto flush;
} else {
struct iscsi_session *session = conn->session;
@@ -1431,22 +1443,22 @@
/* All unsolicited PDUs sent. Check for solicited PDUs.
*/
spin_lock_bh(&session->lock);
- r2t = tcp_ctask->r2t;
+ r2t = tcp_task->r2t;
if (r2t != NULL) {
/* Continue with this R2T? */
- if (!iscsi_solicit_data_cont(conn, ctask, r2t)) {
+ if (!iscsi_solicit_data_cont(conn, task, r2t)) {
debug_scsi(" done with r2t %p\n", r2t);
- __kfifo_put(tcp_ctask->r2tpool.queue,
+ __kfifo_put(tcp_task->r2tpool.queue,
(void*)&r2t, sizeof(void*));
- tcp_ctask->r2t = r2t = NULL;
+ tcp_task->r2t = r2t = NULL;
}
}
if (r2t == NULL) {
- __kfifo_get(tcp_ctask->r2tqueue, (void*)&tcp_ctask->r2t,
+ __kfifo_get(tcp_task->r2tqueue, (void*)&tcp_task->r2t,
sizeof(void*));
- r2t = tcp_ctask->r2t;
+ r2t = tcp_task->r2t;
}
spin_unlock_bh(&session->lock);
@@ -1457,7 +1469,7 @@
}
debug_scsi("sol dout %p [dsn %d itt 0x%x doff %d dlen %d]\n",
- r2t, r2t->solicit_datasn - 1, ctask->itt,
+ r2t, r2t->solicit_datasn - 1, task->itt,
r2t->data_offset + r2t->sent, r2t->data_count);
iscsi_tcp_send_hdr_prep(conn, &r2t->dtask.hdr,
@@ -1469,7 +1481,7 @@
r2t->data_count);
if (rc)
goto fail;
- tcp_ctask->sent += r2t->data_count;
+ tcp_task->sent += r2t->data_count;
r2t->sent += r2t->data_count;
goto flush;
}
@@ -1486,7 +1498,7 @@
struct iscsi_cls_conn *cls_conn;
struct iscsi_tcp_conn *tcp_conn;
- cls_conn = iscsi_conn_setup(cls_session, conn_idx);
+ cls_conn = iscsi_conn_setup(cls_session, sizeof(*tcp_conn), conn_idx);
if (!cls_conn)
return NULL;
conn = cls_conn->dd_data;
@@ -1496,18 +1508,14 @@
*/
conn->max_recv_dlength = ISCSI_DEF_MAX_RECV_SEG_LEN;
- tcp_conn = kzalloc(sizeof(*tcp_conn), GFP_KERNEL);
- if (!tcp_conn)
- goto tcp_conn_alloc_fail;
-
- conn->dd_data = tcp_conn;
+ tcp_conn = conn->dd_data;
tcp_conn->iscsi_conn = conn;
tcp_conn->tx_hash.tfm = crypto_alloc_hash("crc32c", 0,
CRYPTO_ALG_ASYNC);
tcp_conn->tx_hash.flags = 0;
if (IS_ERR(tcp_conn->tx_hash.tfm))
- goto free_tcp_conn;
+ goto free_conn;
tcp_conn->rx_hash.tfm = crypto_alloc_hash("crc32c", 0,
CRYPTO_ALG_ASYNC);
@@ -1519,14 +1527,12 @@
free_tx_tfm:
crypto_free_hash(tcp_conn->tx_hash.tfm);
-free_tcp_conn:
+free_conn:
iscsi_conn_printk(KERN_ERR, conn,
"Could not create connection due to crc32c "
"loading error. Make sure the crc32c "
"module is built as a module or into the "
"kernel\n");
- kfree(tcp_conn);
-tcp_conn_alloc_fail:
iscsi_conn_teardown(cls_conn);
return NULL;
}
@@ -1547,7 +1553,6 @@
spin_lock_bh(&session->lock);
tcp_conn->sock = NULL;
- conn->recv_lock = NULL;
spin_unlock_bh(&session->lock);
sockfd_put(sock);
}
@@ -1559,20 +1564,32 @@
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
iscsi_tcp_release_conn(conn);
- iscsi_conn_teardown(cls_conn);
if (tcp_conn->tx_hash.tfm)
crypto_free_hash(tcp_conn->tx_hash.tfm);
if (tcp_conn->rx_hash.tfm)
crypto_free_hash(tcp_conn->rx_hash.tfm);
- kfree(tcp_conn);
+ iscsi_conn_teardown(cls_conn);
}
static void
iscsi_tcp_conn_stop(struct iscsi_cls_conn *cls_conn, int flag)
{
struct iscsi_conn *conn = cls_conn->dd_data;
+ struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
+
+ /* userspace may have goofed up and not bound us */
+ if (!tcp_conn->sock)
+ return;
+ /*
+ * Make sure our recv side is stopped.
+ * Older tools called conn stop before ep_disconnect
+ * so IO could still be coming in.
+ */
+ write_lock_bh(&tcp_conn->sock->sk->sk_callback_lock);
+ set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_rx);
+ write_unlock_bh(&tcp_conn->sock->sk->sk_callback_lock);
iscsi_conn_stop(cls_conn, flag);
iscsi_tcp_release_conn(conn);
@@ -1623,6 +1640,8 @@
struct iscsi_cls_conn *cls_conn, uint64_t transport_eph,
int is_leading)
{
+ struct Scsi_Host *shost = iscsi_session_to_shost(cls_session);
+ struct iscsi_host *ihost = shost_priv(shost);
struct iscsi_conn *conn = cls_conn->dd_data;
struct iscsi_tcp_conn *tcp_conn = conn->dd_data;
struct sock *sk;
@@ -1646,8 +1665,8 @@
if (err)
goto free_socket;
- err = iscsi_tcp_get_addr(conn, sock, conn->local_address,
- &conn->local_port, kernel_getsockname);
+ err = iscsi_tcp_get_addr(conn, sock, ihost->local_address,
+ &ihost->local_port, kernel_getsockname);
if (err)
goto free_socket;
@@ -1664,13 +1683,6 @@
sk->sk_sndtimeo = 15 * HZ; /* FIXME: make it configurable */
sk->sk_allocation = GFP_ATOMIC;
- /* FIXME: disable Nagle's algorithm */
-
- /*
- * Intercept TCP callbacks for sendfile like receive
- * processing.
- */
- conn->recv_lock = &sk->sk_callback_lock;
iscsi_conn_set_callbacks(conn);
tcp_conn->sendpage = tcp_conn->sock->ops->sendpage;
/*
@@ -1684,21 +1696,6 @@
return err;
}
-/* called with host lock */
-static void
-iscsi_tcp_mtask_init(struct iscsi_conn *conn, struct iscsi_mgmt_task *mtask)
-{
- debug_scsi("mtask deq [cid %d itt 0x%x]\n", conn->id, mtask->itt);
-
- /* Prepare PDU, optionally w/ immediate data */
- iscsi_tcp_send_hdr_prep(conn, mtask->hdr, sizeof(*mtask->hdr));
-
- /* If we have immediate data, attach a payload */
- if (mtask->data_count)
- iscsi_tcp_send_linear_data_prepare(conn, mtask->data,
- mtask->data_count);
-}
-
static int
iscsi_r2tpool_alloc(struct iscsi_session *session)
{
@@ -1709,8 +1706,8 @@
* initialize per-task: R2T pool and xmit queue
*/
for (cmd_i = 0; cmd_i < session->cmds_max; cmd_i++) {
- struct iscsi_cmd_task *ctask = session->cmds[cmd_i];
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
+ struct iscsi_task *task = session->cmds[cmd_i];
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
/*
* pre-allocated x4 as much r2ts to handle race when
@@ -1719,16 +1716,16 @@
*/
/* R2T pool */
- if (iscsi_pool_init(&tcp_ctask->r2tpool, session->max_r2t * 4, NULL,
+ if (iscsi_pool_init(&tcp_task->r2tpool, session->max_r2t * 4, NULL,
sizeof(struct iscsi_r2t_info))) {
goto r2t_alloc_fail;
}
/* R2T xmit queue */
- tcp_ctask->r2tqueue = kfifo_alloc(
+ tcp_task->r2tqueue = kfifo_alloc(
session->max_r2t * 4 * sizeof(void*), GFP_KERNEL, NULL);
- if (tcp_ctask->r2tqueue == ERR_PTR(-ENOMEM)) {
- iscsi_pool_free(&tcp_ctask->r2tpool);
+ if (tcp_task->r2tqueue == ERR_PTR(-ENOMEM)) {
+ iscsi_pool_free(&tcp_task->r2tpool);
goto r2t_alloc_fail;
}
}
@@ -1737,11 +1734,11 @@
r2t_alloc_fail:
for (i = 0; i < cmd_i; i++) {
- struct iscsi_cmd_task *ctask = session->cmds[i];
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
+ struct iscsi_task *task = session->cmds[i];
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
- kfifo_free(tcp_ctask->r2tqueue);
- iscsi_pool_free(&tcp_ctask->r2tpool);
+ kfifo_free(tcp_task->r2tqueue);
+ iscsi_pool_free(&tcp_task->r2tpool);
}
return -ENOMEM;
}
@@ -1752,11 +1749,11 @@
int i;
for (i = 0; i < session->cmds_max; i++) {
- struct iscsi_cmd_task *ctask = session->cmds[i];
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
+ struct iscsi_task *task = session->cmds[i];
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
- kfifo_free(tcp_ctask->r2tqueue);
- iscsi_pool_free(&tcp_ctask->r2tpool);
+ kfifo_free(tcp_task->r2tqueue);
+ iscsi_pool_free(&tcp_task->r2tpool);
}
}
@@ -1821,29 +1818,6 @@
return len;
}
-static int
-iscsi_tcp_host_get_param(struct Scsi_Host *shost, enum iscsi_host_param param,
- char *buf)
-{
- struct iscsi_session *session = iscsi_hostdata(shost->hostdata);
- int len;
-
- switch (param) {
- case ISCSI_HOST_PARAM_IPADDRESS:
- spin_lock_bh(&session->lock);
- if (!session->leadconn)
- len = -ENODEV;
- else
- len = sprintf(buf, "%s\n",
- session->leadconn->local_address);
- spin_unlock_bh(&session->lock);
- break;
- default:
- return iscsi_host_get_param(shost, param, buf);
- }
- return len;
-}
-
static void
iscsi_conn_get_stats(struct iscsi_cls_conn *cls_conn, struct iscsi_stats *stats)
{
@@ -1869,54 +1843,70 @@
}
static struct iscsi_cls_session *
-iscsi_tcp_session_create(struct iscsi_transport *iscsit,
- struct scsi_transport_template *scsit,
- uint16_t cmds_max, uint16_t qdepth,
- uint32_t initial_cmdsn, uint32_t *hostno)
+iscsi_tcp_session_create(struct iscsi_endpoint *ep, uint16_t cmds_max,
+ uint16_t qdepth, uint32_t initial_cmdsn,
+ uint32_t *hostno)
{
struct iscsi_cls_session *cls_session;
struct iscsi_session *session;
- uint32_t hn;
+ struct Scsi_Host *shost;
int cmd_i;
- cls_session = iscsi_session_setup(iscsit, scsit, cmds_max, qdepth,
- sizeof(struct iscsi_tcp_cmd_task),
- sizeof(struct iscsi_tcp_mgmt_task),
- initial_cmdsn, &hn);
- if (!cls_session)
+ if (ep) {
+ printk(KERN_ERR "iscsi_tcp: invalid ep %p.\n", ep);
return NULL;
- *hostno = hn;
+ }
- session = class_to_transport_session(cls_session);
+ shost = iscsi_host_alloc(&iscsi_sht, 0, qdepth);
+ if (!shost)
+ return NULL;
+ shost->transportt = iscsi_tcp_scsi_transport;
+ shost->max_lun = iscsi_max_lun;
+ shost->max_id = 0;
+ shost->max_channel = 0;
+ shost->max_cmd_len = SCSI_MAX_VARLEN_CDB_SIZE;
+
+ if (iscsi_host_add(shost, NULL))
+ goto free_host;
+ *hostno = shost->host_no;
+
+ cls_session = iscsi_session_setup(&iscsi_tcp_transport, shost, cmds_max,
+ sizeof(struct iscsi_tcp_task),
+ initial_cmdsn, 0);
+ if (!cls_session)
+ goto remove_host;
+ session = cls_session->dd_data;
+
+ shost->can_queue = session->scsi_cmds_max;
for (cmd_i = 0; cmd_i < session->cmds_max; cmd_i++) {
- struct iscsi_cmd_task *ctask = session->cmds[cmd_i];
- struct iscsi_tcp_cmd_task *tcp_ctask = ctask->dd_data;
+ struct iscsi_task *task = session->cmds[cmd_i];
+ struct iscsi_tcp_task *tcp_task = task->dd_data;
- ctask->hdr = &tcp_ctask->hdr.cmd_hdr;
- ctask->hdr_max = sizeof(tcp_ctask->hdr) - ISCSI_DIGEST_SIZE;
+ task->hdr = &tcp_task->hdr.cmd_hdr;
+ task->hdr_max = sizeof(tcp_task->hdr) - ISCSI_DIGEST_SIZE;
}
- for (cmd_i = 0; cmd_i < session->mgmtpool_max; cmd_i++) {
- struct iscsi_mgmt_task *mtask = session->mgmt_cmds[cmd_i];
- struct iscsi_tcp_mgmt_task *tcp_mtask = mtask->dd_data;
-
- mtask->hdr = (struct iscsi_hdr *) &tcp_mtask->hdr;
- }
-
- if (iscsi_r2tpool_alloc(class_to_transport_session(cls_session)))
- goto r2tpool_alloc_fail;
-
+ if (iscsi_r2tpool_alloc(session))
+ goto remove_session;
return cls_session;
-r2tpool_alloc_fail:
+remove_session:
iscsi_session_teardown(cls_session);
+remove_host:
+ iscsi_host_remove(shost);
+free_host:
+ iscsi_host_free(shost);
return NULL;
}
static void iscsi_tcp_session_destroy(struct iscsi_cls_session *cls_session)
{
- iscsi_r2tpool_free(class_to_transport_session(cls_session));
- iscsi_session_teardown(cls_session);
+ struct Scsi_Host *shost = iscsi_session_to_shost(cls_session);
+
+ iscsi_r2tpool_free(cls_session->dd_data);
+
+ iscsi_host_remove(shost);
+ iscsi_host_free(shost);
}
static int iscsi_tcp_slave_configure(struct scsi_device *sdev)
@@ -1971,14 +1961,11 @@
ISCSI_USERNAME_IN | ISCSI_PASSWORD_IN |
ISCSI_FAST_ABORT | ISCSI_ABORT_TMO |
ISCSI_LU_RESET_TMO |
- ISCSI_PING_TMO | ISCSI_RECV_TMO,
+ ISCSI_PING_TMO | ISCSI_RECV_TMO |
+ ISCSI_IFACE_NAME | ISCSI_INITIATOR_NAME,
.host_param_mask = ISCSI_HOST_HWADDRESS | ISCSI_HOST_IPADDRESS |
ISCSI_HOST_INITIATOR_NAME |
ISCSI_HOST_NETDEV_NAME,
- .host_template = &iscsi_sht,
- .conndata_size = sizeof(struct iscsi_conn),
- .max_conn = 1,
- .max_cmd_len = 16,
/* session management */
.create_session = iscsi_tcp_session_create,
.destroy_session = iscsi_tcp_session_destroy,
@@ -1992,16 +1979,14 @@
.start_conn = iscsi_conn_start,
.stop_conn = iscsi_tcp_conn_stop,
/* iscsi host params */
- .get_host_param = iscsi_tcp_host_get_param,
+ .get_host_param = iscsi_host_get_param,
.set_host_param = iscsi_host_set_param,
/* IO */
.send_pdu = iscsi_conn_send_pdu,
.get_stats = iscsi_conn_get_stats,
- .init_cmd_task = iscsi_tcp_ctask_init,
- .init_mgmt_task = iscsi_tcp_mtask_init,
- .xmit_cmd_task = iscsi_tcp_ctask_xmit,
- .xmit_mgmt_task = iscsi_tcp_mtask_xmit,
- .cleanup_cmd_task = iscsi_tcp_cleanup_ctask,
+ .init_task = iscsi_tcp_task_init,
+ .xmit_task = iscsi_tcp_task_xmit,
+ .cleanup_task = iscsi_tcp_cleanup_task,
/* recovery */
.session_recovery_timedout = iscsi_session_recovery_timedout,
};
@@ -2014,9 +1999,10 @@
iscsi_max_lun);
return -EINVAL;
}
- iscsi_tcp_transport.max_lun = iscsi_max_lun;
- if (!iscsi_register_transport(&iscsi_tcp_transport))
+ iscsi_tcp_scsi_transport = iscsi_register_transport(
+ &iscsi_tcp_transport);
+ if (!iscsi_tcp_scsi_transport)
return -ENODEV;
return 0;
diff --git a/drivers/scsi/iscsi_tcp.h b/drivers/scsi/iscsi_tcp.h
index ed0b991..498d8ca 100644
--- a/drivers/scsi/iscsi_tcp.h
+++ b/drivers/scsi/iscsi_tcp.h
@@ -103,11 +103,6 @@
char hdrext[ISCSI_DIGEST_SIZE];/* Header-Digest */
};
-struct iscsi_tcp_mgmt_task {
- struct iscsi_hdr hdr;
- char hdrext[ISCSI_DIGEST_SIZE]; /* Header-Digest */
-};
-
struct iscsi_r2t_info {
__be32 ttt; /* copied from R2T */
__be32 exp_statsn; /* copied from R2T */
@@ -119,7 +114,7 @@
struct iscsi_data_task dtask; /* Data-Out header buf */
};
-struct iscsi_tcp_cmd_task {
+struct iscsi_tcp_task {
struct iscsi_hdr_buff {
struct iscsi_cmd cmd_hdr;
char hdrextbuf[ISCSI_MAX_AHS_SIZE +
diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c
index b43bf1d..299e075 100644
--- a/drivers/scsi/libiscsi.c
+++ b/drivers/scsi/libiscsi.c
@@ -38,14 +38,6 @@
#include <scsi/scsi_transport_iscsi.h>
#include <scsi/libiscsi.h>
-struct iscsi_session *
-class_to_transport_session(struct iscsi_cls_session *cls_session)
-{
- struct Scsi_Host *shost = iscsi_session_to_shost(cls_session);
- return iscsi_hostdata(shost->hostdata);
-}
-EXPORT_SYMBOL_GPL(class_to_transport_session);
-
/* Serial Number Arithmetic, 32 bits, less than, RFC1982 */
#define SNA32_CHECK 2147483648UL
@@ -87,68 +79,70 @@
* xmit thread
*/
if (!list_empty(&session->leadconn->xmitqueue) ||
- !list_empty(&session->leadconn->mgmtqueue))
- scsi_queue_work(session->host,
- &session->leadconn->xmitwork);
+ !list_empty(&session->leadconn->mgmtqueue)) {
+ if (!(session->tt->caps & CAP_DATA_PATH_OFFLOAD))
+ scsi_queue_work(session->host,
+ &session->leadconn->xmitwork);
+ }
}
}
EXPORT_SYMBOL_GPL(iscsi_update_cmdsn);
-void iscsi_prep_unsolicit_data_pdu(struct iscsi_cmd_task *ctask,
+void iscsi_prep_unsolicit_data_pdu(struct iscsi_task *task,
struct iscsi_data *hdr)
{
- struct iscsi_conn *conn = ctask->conn;
+ struct iscsi_conn *conn = task->conn;
memset(hdr, 0, sizeof(struct iscsi_data));
hdr->ttt = cpu_to_be32(ISCSI_RESERVED_TAG);
- hdr->datasn = cpu_to_be32(ctask->unsol_datasn);
- ctask->unsol_datasn++;
+ hdr->datasn = cpu_to_be32(task->unsol_datasn);
+ task->unsol_datasn++;
hdr->opcode = ISCSI_OP_SCSI_DATA_OUT;
- memcpy(hdr->lun, ctask->hdr->lun, sizeof(hdr->lun));
+ memcpy(hdr->lun, task->hdr->lun, sizeof(hdr->lun));
- hdr->itt = ctask->hdr->itt;
+ hdr->itt = task->hdr->itt;
hdr->exp_statsn = cpu_to_be32(conn->exp_statsn);
- hdr->offset = cpu_to_be32(ctask->unsol_offset);
+ hdr->offset = cpu_to_be32(task->unsol_offset);
- if (ctask->unsol_count > conn->max_xmit_dlength) {
+ if (task->unsol_count > conn->max_xmit_dlength) {
hton24(hdr->dlength, conn->max_xmit_dlength);
- ctask->data_count = conn->max_xmit_dlength;
- ctask->unsol_offset += ctask->data_count;
+ task->data_count = conn->max_xmit_dlength;
+ task->unsol_offset += task->data_count;
hdr->flags = 0;
} else {
- hton24(hdr->dlength, ctask->unsol_count);
- ctask->data_count = ctask->unsol_count;
+ hton24(hdr->dlength, task->unsol_count);
+ task->data_count = task->unsol_count;
hdr->flags = ISCSI_FLAG_CMD_FINAL;
}
}
EXPORT_SYMBOL_GPL(iscsi_prep_unsolicit_data_pdu);
-static int iscsi_add_hdr(struct iscsi_cmd_task *ctask, unsigned len)
+static int iscsi_add_hdr(struct iscsi_task *task, unsigned len)
{
- unsigned exp_len = ctask->hdr_len + len;
+ unsigned exp_len = task->hdr_len + len;
- if (exp_len > ctask->hdr_max) {
+ if (exp_len > task->hdr_max) {
WARN_ON(1);
return -EINVAL;
}
WARN_ON(len & (ISCSI_PAD_LEN - 1)); /* caller must pad the AHS */
- ctask->hdr_len = exp_len;
+ task->hdr_len = exp_len;
return 0;
}
/*
* make an extended cdb AHS
*/
-static int iscsi_prep_ecdb_ahs(struct iscsi_cmd_task *ctask)
+static int iscsi_prep_ecdb_ahs(struct iscsi_task *task)
{
- struct scsi_cmnd *cmd = ctask->sc;
+ struct scsi_cmnd *cmd = task->sc;
unsigned rlen, pad_len;
unsigned short ahslength;
struct iscsi_ecdb_ahdr *ecdb_ahdr;
int rc;
- ecdb_ahdr = iscsi_next_hdr(ctask);
+ ecdb_ahdr = iscsi_next_hdr(task);
rlen = cmd->cmd_len - ISCSI_CDB_SIZE;
BUG_ON(rlen > sizeof(ecdb_ahdr->ecdb));
@@ -156,7 +150,7 @@
pad_len = iscsi_padding(rlen);
- rc = iscsi_add_hdr(ctask, sizeof(ecdb_ahdr->ahslength) +
+ rc = iscsi_add_hdr(task, sizeof(ecdb_ahdr->ahslength) +
sizeof(ecdb_ahdr->ahstype) + ahslength + pad_len);
if (rc)
return rc;
@@ -171,19 +165,19 @@
debug_scsi("iscsi_prep_ecdb_ahs: varlen_cdb_len %d "
"rlen %d pad_len %d ahs_length %d iscsi_headers_size %u\n",
- cmd->cmd_len, rlen, pad_len, ahslength, ctask->hdr_len);
+ cmd->cmd_len, rlen, pad_len, ahslength, task->hdr_len);
return 0;
}
-static int iscsi_prep_bidi_ahs(struct iscsi_cmd_task *ctask)
+static int iscsi_prep_bidi_ahs(struct iscsi_task *task)
{
- struct scsi_cmnd *sc = ctask->sc;
+ struct scsi_cmnd *sc = task->sc;
struct iscsi_rlength_ahdr *rlen_ahdr;
int rc;
- rlen_ahdr = iscsi_next_hdr(ctask);
- rc = iscsi_add_hdr(ctask, sizeof(*rlen_ahdr));
+ rlen_ahdr = iscsi_next_hdr(task);
+ rc = iscsi_add_hdr(task, sizeof(*rlen_ahdr));
if (rc)
return rc;
@@ -203,28 +197,28 @@
/**
* iscsi_prep_scsi_cmd_pdu - prep iscsi scsi cmd pdu
- * @ctask: iscsi cmd task
+ * @task: iscsi task
*
* Prep basic iSCSI PDU fields for a scsi cmd pdu. The LLD should set
* fields like dlength or final based on how much data it sends
*/
-static int iscsi_prep_scsi_cmd_pdu(struct iscsi_cmd_task *ctask)
+static int iscsi_prep_scsi_cmd_pdu(struct iscsi_task *task)
{
- struct iscsi_conn *conn = ctask->conn;
+ struct iscsi_conn *conn = task->conn;
struct iscsi_session *session = conn->session;
- struct iscsi_cmd *hdr = ctask->hdr;
- struct scsi_cmnd *sc = ctask->sc;
+ struct iscsi_cmd *hdr = task->hdr;
+ struct scsi_cmnd *sc = task->sc;
unsigned hdrlength, cmd_len;
int rc;
- ctask->hdr_len = 0;
- rc = iscsi_add_hdr(ctask, sizeof(*hdr));
+ task->hdr_len = 0;
+ rc = iscsi_add_hdr(task, sizeof(*hdr));
if (rc)
return rc;
hdr->opcode = ISCSI_OP_SCSI_CMD;
hdr->flags = ISCSI_ATTR_SIMPLE;
int_to_scsilun(sc->device->lun, (struct scsi_lun *)hdr->lun);
- hdr->itt = build_itt(ctask->itt, session->age);
+ hdr->itt = build_itt(task->itt, session->age);
hdr->cmdsn = cpu_to_be32(session->cmdsn);
session->cmdsn++;
hdr->exp_statsn = cpu_to_be32(conn->exp_statsn);
@@ -232,17 +226,17 @@
if (cmd_len < ISCSI_CDB_SIZE)
memset(&hdr->cdb[cmd_len], 0, ISCSI_CDB_SIZE - cmd_len);
else if (cmd_len > ISCSI_CDB_SIZE) {
- rc = iscsi_prep_ecdb_ahs(ctask);
+ rc = iscsi_prep_ecdb_ahs(task);
if (rc)
return rc;
cmd_len = ISCSI_CDB_SIZE;
}
memcpy(hdr->cdb, sc->cmnd, cmd_len);
- ctask->imm_count = 0;
+ task->imm_count = 0;
if (scsi_bidi_cmnd(sc)) {
hdr->flags |= ISCSI_FLAG_CMD_READ;
- rc = iscsi_prep_bidi_ahs(ctask);
+ rc = iscsi_prep_bidi_ahs(task);
if (rc)
return rc;
}
@@ -264,28 +258,28 @@
*
* pad_count bytes to be sent as zero-padding
*/
- ctask->unsol_count = 0;
- ctask->unsol_offset = 0;
- ctask->unsol_datasn = 0;
+ task->unsol_count = 0;
+ task->unsol_offset = 0;
+ task->unsol_datasn = 0;
if (session->imm_data_en) {
if (out_len >= session->first_burst)
- ctask->imm_count = min(session->first_burst,
+ task->imm_count = min(session->first_burst,
conn->max_xmit_dlength);
else
- ctask->imm_count = min(out_len,
+ task->imm_count = min(out_len,
conn->max_xmit_dlength);
- hton24(hdr->dlength, ctask->imm_count);
+ hton24(hdr->dlength, task->imm_count);
} else
zero_data(hdr->dlength);
if (!session->initial_r2t_en) {
- ctask->unsol_count = min(session->first_burst, out_len)
- - ctask->imm_count;
- ctask->unsol_offset = ctask->imm_count;
+ task->unsol_count = min(session->first_burst, out_len)
+ - task->imm_count;
+ task->unsol_offset = task->imm_count;
}
- if (!ctask->unsol_count)
+ if (!task->unsol_count)
/* No unsolicit Data-Out's */
hdr->flags |= ISCSI_FLAG_CMD_FINAL;
} else {
@@ -298,7 +292,7 @@
}
/* calculate size of additional header segments (AHSs) */
- hdrlength = ctask->hdr_len - sizeof(*hdr);
+ hdrlength = task->hdr_len - sizeof(*hdr);
WARN_ON(hdrlength & (ISCSI_PAD_LEN-1));
hdrlength /= ISCSI_PAD_LEN;
@@ -306,76 +300,115 @@
WARN_ON(hdrlength >= 256);
hdr->hlength = hdrlength & 0xFF;
- if (conn->session->tt->init_cmd_task(conn->ctask))
- return EIO;
+ if (conn->session->tt->init_task &&
+ conn->session->tt->init_task(task))
+ return -EIO;
+
+ task->state = ISCSI_TASK_RUNNING;
+ list_move_tail(&task->running, &conn->run_list);
conn->scsicmd_pdus_cnt++;
- debug_scsi("iscsi prep [%s cid %d sc %p cdb 0x%x itt 0x%x "
- "len %d bidi_len %d cmdsn %d win %d]\n",
- scsi_bidi_cmnd(sc) ? "bidirectional" :
- sc->sc_data_direction == DMA_TO_DEVICE ? "write" : "read",
- conn->id, sc, sc->cmnd[0], ctask->itt,
- scsi_bufflen(sc), scsi_bidi_cmnd(sc) ? scsi_in(sc)->length : 0,
- session->cmdsn, session->max_cmdsn - session->exp_cmdsn + 1);
+ debug_scsi("iscsi prep [%s cid %d sc %p cdb 0x%x itt 0x%x len %d "
+ "bidi_len %d cmdsn %d win %d]\n", scsi_bidi_cmnd(sc) ?
+ "bidirectional" : sc->sc_data_direction == DMA_TO_DEVICE ?
+ "write" : "read", conn->id, sc, sc->cmnd[0], task->itt,
+ scsi_bufflen(sc),
+ scsi_bidi_cmnd(sc) ? scsi_in(sc)->length : 0,
+ session->cmdsn, session->max_cmdsn - session->exp_cmdsn + 1);
return 0;
}
/**
- * iscsi_complete_command - return command back to scsi-ml
- * @ctask: iscsi cmd task
+ * iscsi_complete_command - finish a task
+ * @task: iscsi cmd task
*
* Must be called with session lock.
- * This function returns the scsi command to scsi-ml and returns
- * the cmd task to the pool of available cmd tasks.
+ * This function returns the scsi command to scsi-ml or cleans
+ * up mgmt tasks then returns the task to the pool.
*/
-static void iscsi_complete_command(struct iscsi_cmd_task *ctask)
+static void iscsi_complete_command(struct iscsi_task *task)
{
- struct iscsi_conn *conn = ctask->conn;
+ struct iscsi_conn *conn = task->conn;
struct iscsi_session *session = conn->session;
- struct scsi_cmnd *sc = ctask->sc;
+ struct scsi_cmnd *sc = task->sc;
- ctask->state = ISCSI_TASK_COMPLETED;
- ctask->sc = NULL;
- /* SCSI eh reuses commands to verify us */
- sc->SCp.ptr = NULL;
- if (conn->ctask == ctask)
- conn->ctask = NULL;
- list_del_init(&ctask->running);
- __kfifo_put(session->cmdpool.queue, (void*)&ctask, sizeof(void*));
- sc->scsi_done(sc);
+ list_del_init(&task->running);
+ task->state = ISCSI_TASK_COMPLETED;
+ task->sc = NULL;
+
+ if (conn->task == task)
+ conn->task = NULL;
+ /*
+ * login task is preallocated so do not free
+ */
+ if (conn->login_task == task)
+ return;
+
+ __kfifo_put(session->cmdpool.queue, (void*)&task, sizeof(void*));
+
+ if (conn->ping_task == task)
+ conn->ping_task = NULL;
+
+ if (sc) {
+ task->sc = NULL;
+ /* SCSI eh reuses commands to verify us */
+ sc->SCp.ptr = NULL;
+ /*
+ * queue command may call this to free the task, but
+ * not have setup the sc callback
+ */
+ if (sc->scsi_done)
+ sc->scsi_done(sc);
+ }
}
-static void __iscsi_get_ctask(struct iscsi_cmd_task *ctask)
+void __iscsi_get_task(struct iscsi_task *task)
{
- atomic_inc(&ctask->refcount);
+ atomic_inc(&task->refcount);
+}
+EXPORT_SYMBOL_GPL(__iscsi_get_task);
+
+static void __iscsi_put_task(struct iscsi_task *task)
+{
+ if (atomic_dec_and_test(&task->refcount))
+ iscsi_complete_command(task);
}
-static void __iscsi_put_ctask(struct iscsi_cmd_task *ctask)
+void iscsi_put_task(struct iscsi_task *task)
{
- if (atomic_dec_and_test(&ctask->refcount))
- iscsi_complete_command(ctask);
+ struct iscsi_session *session = task->conn->session;
+
+ spin_lock_bh(&session->lock);
+ __iscsi_put_task(task);
+ spin_unlock_bh(&session->lock);
}
+EXPORT_SYMBOL_GPL(iscsi_put_task);
/*
* session lock must be held
*/
-static void fail_command(struct iscsi_conn *conn, struct iscsi_cmd_task *ctask,
+static void fail_command(struct iscsi_conn *conn, struct iscsi_task *task,
int err)
{
struct scsi_cmnd *sc;
- sc = ctask->sc;
+ sc = task->sc;
if (!sc)
return;
- if (ctask->state == ISCSI_TASK_PENDING)
+ if (task->state == ISCSI_TASK_PENDING)
/*
* cmd never made it to the xmit thread, so we should not count
* the cmd in the sequencing
*/
conn->session->queued_cmdsn--;
else
- conn->session->tt->cleanup_cmd_task(conn, ctask);
+ conn->session->tt->cleanup_task(conn, task);
+ /*
+ * Check if cleanup_task dropped the lock and the command completed,
+ */
+ if (!task->sc)
+ return;
sc->result = err;
if (!scsi_bidi_cmnd(sc))
@@ -384,39 +417,63 @@
scsi_out(sc)->resid = scsi_out(sc)->length;
scsi_in(sc)->resid = scsi_in(sc)->length;
}
- if (conn->ctask == ctask)
- conn->ctask = NULL;
+
+ if (conn->task == task)
+ conn->task = NULL;
/* release ref from queuecommand */
- __iscsi_put_ctask(ctask);
+ __iscsi_put_task(task);
}
-/**
- * iscsi_free_mgmt_task - return mgmt task back to pool
- * @conn: iscsi connection
- * @mtask: mtask
- *
- * Must be called with session lock.
- */
-void iscsi_free_mgmt_task(struct iscsi_conn *conn,
- struct iscsi_mgmt_task *mtask)
+static int iscsi_prep_mgmt_task(struct iscsi_conn *conn,
+ struct iscsi_task *task)
{
- list_del_init(&mtask->running);
- if (conn->login_mtask == mtask)
- return;
+ struct iscsi_session *session = conn->session;
+ struct iscsi_hdr *hdr = (struct iscsi_hdr *)task->hdr;
+ struct iscsi_nopout *nop = (struct iscsi_nopout *)hdr;
- if (conn->ping_mtask == mtask)
- conn->ping_mtask = NULL;
- __kfifo_put(conn->session->mgmtpool.queue,
- (void*)&mtask, sizeof(void*));
+ if (conn->session->state == ISCSI_STATE_LOGGING_OUT)
+ return -ENOTCONN;
+
+ if (hdr->opcode != (ISCSI_OP_LOGIN | ISCSI_OP_IMMEDIATE) &&
+ hdr->opcode != (ISCSI_OP_TEXT | ISCSI_OP_IMMEDIATE))
+ nop->exp_statsn = cpu_to_be32(conn->exp_statsn);
+ /*
+ * pre-format CmdSN for outgoing PDU.
+ */
+ nop->cmdsn = cpu_to_be32(session->cmdsn);
+ if (hdr->itt != RESERVED_ITT) {
+ hdr->itt = build_itt(task->itt, session->age);
+ /*
+ * TODO: We always use immediate, so we never hit this.
+ * If we start to send tmfs or nops as non-immediate then
+ * we should start checking the cmdsn numbers for mgmt tasks.
+ */
+ if (conn->c_stage == ISCSI_CONN_STARTED &&
+ !(hdr->opcode & ISCSI_OP_IMMEDIATE)) {
+ session->queued_cmdsn++;
+ session->cmdsn++;
+ }
+ }
+
+ if (session->tt->init_task)
+ session->tt->init_task(task);
+
+ if ((hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
+ session->state = ISCSI_STATE_LOGGING_OUT;
+
+ list_move_tail(&task->running, &conn->mgmt_run_list);
+ debug_scsi("mgmtpdu [op 0x%x hdr->itt 0x%x datalen %d]\n",
+ hdr->opcode & ISCSI_OPCODE_MASK, hdr->itt,
+ task->data_count);
+ return 0;
}
-EXPORT_SYMBOL_GPL(iscsi_free_mgmt_task);
-static struct iscsi_mgmt_task *
+static struct iscsi_task *
__iscsi_conn_send_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
char *data, uint32_t data_size)
{
struct iscsi_session *session = conn->session;
- struct iscsi_mgmt_task *mtask;
+ struct iscsi_task *task;
if (session->state == ISCSI_STATE_TERMINATE)
return NULL;
@@ -426,29 +483,56 @@
/*
* Login and Text are sent serially, in
* request-followed-by-response sequence.
- * Same mtask can be used. Same ITT must be used.
- * Note that login_mtask is preallocated at conn_create().
+ * Same task can be used. Same ITT must be used.
+ * Note that login_task is preallocated at conn_create().
*/
- mtask = conn->login_mtask;
+ task = conn->login_task;
else {
BUG_ON(conn->c_stage == ISCSI_CONN_INITIAL_STAGE);
BUG_ON(conn->c_stage == ISCSI_CONN_STOPPED);
- if (!__kfifo_get(session->mgmtpool.queue,
- (void*)&mtask, sizeof(void*)))
+ if (!__kfifo_get(session->cmdpool.queue,
+ (void*)&task, sizeof(void*)))
return NULL;
+
+ if ((hdr->opcode == (ISCSI_OP_NOOP_OUT | ISCSI_OP_IMMEDIATE)) &&
+ hdr->ttt == RESERVED_ITT) {
+ conn->ping_task = task;
+ conn->last_ping = jiffies;
+ }
}
+ /*
+ * released in complete pdu for task we expect a response for, and
+ * released by the lld when it has transmitted the task for
+ * pdus we do not expect a response for.
+ */
+ atomic_set(&task->refcount, 1);
+ task->conn = conn;
+ task->sc = NULL;
if (data_size) {
- memcpy(mtask->data, data, data_size);
- mtask->data_count = data_size;
+ memcpy(task->data, data, data_size);
+ task->data_count = data_size;
} else
- mtask->data_count = 0;
+ task->data_count = 0;
- memcpy(mtask->hdr, hdr, sizeof(struct iscsi_hdr));
- INIT_LIST_HEAD(&mtask->running);
- list_add_tail(&mtask->running, &conn->mgmtqueue);
- return mtask;
+ memcpy(task->hdr, hdr, sizeof(struct iscsi_hdr));
+ INIT_LIST_HEAD(&task->running);
+ list_add_tail(&task->running, &conn->mgmtqueue);
+
+ if (session->tt->caps & CAP_DATA_PATH_OFFLOAD) {
+ if (iscsi_prep_mgmt_task(conn, task)) {
+ __iscsi_put_task(task);
+ return NULL;
+ }
+
+ if (session->tt->xmit_task(task))
+ task = NULL;
+
+ } else
+ scsi_queue_work(conn->session->host, &conn->xmitwork);
+
+ return task;
}
int iscsi_conn_send_pdu(struct iscsi_cls_conn *cls_conn, struct iscsi_hdr *hdr,
@@ -462,7 +546,6 @@
if (!__iscsi_conn_send_pdu(conn, hdr, data, data_size))
err = -EPERM;
spin_unlock_bh(&session->lock);
- scsi_queue_work(session->host, &conn->xmitwork);
return err;
}
EXPORT_SYMBOL_GPL(iscsi_conn_send_pdu);
@@ -471,7 +554,7 @@
* iscsi_cmd_rsp - SCSI Command Response processing
* @conn: iscsi connection
* @hdr: iscsi header
- * @ctask: scsi command task
+ * @task: scsi command task
* @data: cmd data buffer
* @datalen: len of buffer
*
@@ -479,12 +562,12 @@
* then completes the command and task.
**/
static void iscsi_scsi_cmd_rsp(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
- struct iscsi_cmd_task *ctask, char *data,
+ struct iscsi_task *task, char *data,
int datalen)
{
struct iscsi_cmd_rsp *rhdr = (struct iscsi_cmd_rsp *)hdr;
struct iscsi_session *session = conn->session;
- struct scsi_cmnd *sc = ctask->sc;
+ struct scsi_cmnd *sc = task->sc;
iscsi_update_cmdsn(session, (struct iscsi_nopin*)rhdr);
conn->exp_statsn = be32_to_cpu(rhdr->statsn) + 1;
@@ -508,7 +591,7 @@
goto out;
}
- senselen = be16_to_cpu(get_unaligned((__be16 *) data));
+ senselen = get_unaligned_be16(data);
if (datalen < senselen)
goto invalid_datalen;
@@ -544,10 +627,10 @@
}
out:
debug_scsi("done [sc %lx res %d itt 0x%x]\n",
- (long)sc, sc->result, ctask->itt);
+ (long)sc, sc->result, task->itt);
conn->scsirsp_pdus_cnt++;
- __iscsi_put_ctask(ctask);
+ __iscsi_put_task(task);
}
static void iscsi_tmf_rsp(struct iscsi_conn *conn, struct iscsi_hdr *hdr)
@@ -572,9 +655,9 @@
static void iscsi_send_nopout(struct iscsi_conn *conn, struct iscsi_nopin *rhdr)
{
struct iscsi_nopout hdr;
- struct iscsi_mgmt_task *mtask;
+ struct iscsi_task *task;
- if (!rhdr && conn->ping_mtask)
+ if (!rhdr && conn->ping_task)
return;
memset(&hdr, 0, sizeof(struct iscsi_nopout));
@@ -588,18 +671,9 @@
} else
hdr.ttt = RESERVED_ITT;
- mtask = __iscsi_conn_send_pdu(conn, (struct iscsi_hdr *)&hdr, NULL, 0);
- if (!mtask) {
+ task = __iscsi_conn_send_pdu(conn, (struct iscsi_hdr *)&hdr, NULL, 0);
+ if (!task)
iscsi_conn_printk(KERN_ERR, conn, "Could not send nopout\n");
- return;
- }
-
- /* only track our nops */
- if (!rhdr) {
- conn->ping_mtask = mtask;
- conn->last_ping = jiffies;
- }
- scsi_queue_work(conn->session->host, &conn->xmitwork);
}
static int iscsi_handle_reject(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
@@ -628,6 +702,31 @@
}
/**
+ * iscsi_itt_to_task - look up task by itt
+ * @conn: iscsi connection
+ * @itt: itt
+ *
+ * This should be used for mgmt tasks like login and nops, or if
+ * the LDD's itt space does not include the session age.
+ *
+ * The session lock must be held.
+ */
+static struct iscsi_task *iscsi_itt_to_task(struct iscsi_conn *conn, itt_t itt)
+{
+ struct iscsi_session *session = conn->session;
+ uint32_t i;
+
+ if (itt == RESERVED_ITT)
+ return NULL;
+
+ i = get_itt(itt);
+ if (i >= session->cmds_max)
+ return NULL;
+
+ return session->cmds[i];
+}
+
+/**
* __iscsi_complete_pdu - complete pdu
* @conn: iscsi conn
* @hdr: iscsi header
@@ -638,108 +737,28 @@
* queuecommand or send generic. session lock must be held and verify
* itt must have been called.
*/
-static int __iscsi_complete_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
- char *data, int datalen)
+int __iscsi_complete_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
+ char *data, int datalen)
{
struct iscsi_session *session = conn->session;
int opcode = hdr->opcode & ISCSI_OPCODE_MASK, rc = 0;
- struct iscsi_cmd_task *ctask;
- struct iscsi_mgmt_task *mtask;
+ struct iscsi_task *task;
uint32_t itt;
conn->last_recv = jiffies;
+ rc = iscsi_verify_itt(conn, hdr->itt);
+ if (rc)
+ return rc;
+
if (hdr->itt != RESERVED_ITT)
itt = get_itt(hdr->itt);
else
itt = ~0U;
- if (itt < session->cmds_max) {
- ctask = session->cmds[itt];
+ debug_scsi("[op 0x%x cid %d itt 0x%x len %d]\n",
+ opcode, conn->id, itt, datalen);
- debug_scsi("cmdrsp [op 0x%x cid %d itt 0x%x len %d]\n",
- opcode, conn->id, ctask->itt, datalen);
-
- switch(opcode) {
- case ISCSI_OP_SCSI_CMD_RSP:
- BUG_ON((void*)ctask != ctask->sc->SCp.ptr);
- iscsi_scsi_cmd_rsp(conn, hdr, ctask, data,
- datalen);
- break;
- case ISCSI_OP_SCSI_DATA_IN:
- BUG_ON((void*)ctask != ctask->sc->SCp.ptr);
- if (hdr->flags & ISCSI_FLAG_DATA_STATUS) {
- conn->scsirsp_pdus_cnt++;
- __iscsi_put_ctask(ctask);
- }
- break;
- case ISCSI_OP_R2T:
- /* LLD handles this for now */
- break;
- default:
- rc = ISCSI_ERR_BAD_OPCODE;
- break;
- }
- } else if (itt >= ISCSI_MGMT_ITT_OFFSET &&
- itt < ISCSI_MGMT_ITT_OFFSET + session->mgmtpool_max) {
- mtask = session->mgmt_cmds[itt - ISCSI_MGMT_ITT_OFFSET];
-
- debug_scsi("immrsp [op 0x%x cid %d itt 0x%x len %d]\n",
- opcode, conn->id, mtask->itt, datalen);
-
- iscsi_update_cmdsn(session, (struct iscsi_nopin*)hdr);
- switch(opcode) {
- case ISCSI_OP_LOGOUT_RSP:
- if (datalen) {
- rc = ISCSI_ERR_PROTO;
- break;
- }
- conn->exp_statsn = be32_to_cpu(hdr->statsn) + 1;
- /* fall through */
- case ISCSI_OP_LOGIN_RSP:
- case ISCSI_OP_TEXT_RSP:
- /*
- * login related PDU's exp_statsn is handled in
- * userspace
- */
- if (iscsi_recv_pdu(conn->cls_conn, hdr, data, datalen))
- rc = ISCSI_ERR_CONN_FAILED;
- iscsi_free_mgmt_task(conn, mtask);
- break;
- case ISCSI_OP_SCSI_TMFUNC_RSP:
- if (datalen) {
- rc = ISCSI_ERR_PROTO;
- break;
- }
-
- iscsi_tmf_rsp(conn, hdr);
- iscsi_free_mgmt_task(conn, mtask);
- break;
- case ISCSI_OP_NOOP_IN:
- if (hdr->ttt != cpu_to_be32(ISCSI_RESERVED_TAG) ||
- datalen) {
- rc = ISCSI_ERR_PROTO;
- break;
- }
- conn->exp_statsn = be32_to_cpu(hdr->statsn) + 1;
-
- if (conn->ping_mtask != mtask) {
- /*
- * If this is not in response to one of our
- * nops then it must be from userspace.
- */
- if (iscsi_recv_pdu(conn->cls_conn, hdr, data,
- datalen))
- rc = ISCSI_ERR_CONN_FAILED;
- } else
- mod_timer(&conn->transport_timer,
- jiffies + conn->recv_timeout);
- iscsi_free_mgmt_task(conn, mtask);
- break;
- default:
- rc = ISCSI_ERR_BAD_OPCODE;
- break;
- }
- } else if (itt == ~0U) {
+ if (itt == ~0U) {
iscsi_update_cmdsn(session, (struct iscsi_nopin*)hdr);
switch(opcode) {
@@ -766,11 +785,104 @@
rc = ISCSI_ERR_BAD_OPCODE;
break;
}
- } else
- rc = ISCSI_ERR_BAD_ITT;
+ goto out;
+ }
+ switch(opcode) {
+ case ISCSI_OP_SCSI_CMD_RSP:
+ case ISCSI_OP_SCSI_DATA_IN:
+ task = iscsi_itt_to_ctask(conn, hdr->itt);
+ if (!task)
+ return ISCSI_ERR_BAD_ITT;
+ break;
+ case ISCSI_OP_R2T:
+ /*
+ * LLD handles R2Ts if they need to.
+ */
+ return 0;
+ case ISCSI_OP_LOGOUT_RSP:
+ case ISCSI_OP_LOGIN_RSP:
+ case ISCSI_OP_TEXT_RSP:
+ case ISCSI_OP_SCSI_TMFUNC_RSP:
+ case ISCSI_OP_NOOP_IN:
+ task = iscsi_itt_to_task(conn, hdr->itt);
+ if (!task)
+ return ISCSI_ERR_BAD_ITT;
+ break;
+ default:
+ return ISCSI_ERR_BAD_OPCODE;
+ }
+
+ switch(opcode) {
+ case ISCSI_OP_SCSI_CMD_RSP:
+ iscsi_scsi_cmd_rsp(conn, hdr, task, data, datalen);
+ break;
+ case ISCSI_OP_SCSI_DATA_IN:
+ if (hdr->flags & ISCSI_FLAG_DATA_STATUS) {
+ conn->scsirsp_pdus_cnt++;
+ iscsi_update_cmdsn(session,
+ (struct iscsi_nopin*) hdr);
+ __iscsi_put_task(task);
+ }
+ break;
+ case ISCSI_OP_LOGOUT_RSP:
+ iscsi_update_cmdsn(session, (struct iscsi_nopin*)hdr);
+ if (datalen) {
+ rc = ISCSI_ERR_PROTO;
+ break;
+ }
+ conn->exp_statsn = be32_to_cpu(hdr->statsn) + 1;
+ goto recv_pdu;
+ case ISCSI_OP_LOGIN_RSP:
+ case ISCSI_OP_TEXT_RSP:
+ iscsi_update_cmdsn(session, (struct iscsi_nopin*)hdr);
+ /*
+ * login related PDU's exp_statsn is handled in
+ * userspace
+ */
+ goto recv_pdu;
+ case ISCSI_OP_SCSI_TMFUNC_RSP:
+ iscsi_update_cmdsn(session, (struct iscsi_nopin*)hdr);
+ if (datalen) {
+ rc = ISCSI_ERR_PROTO;
+ break;
+ }
+
+ iscsi_tmf_rsp(conn, hdr);
+ __iscsi_put_task(task);
+ break;
+ case ISCSI_OP_NOOP_IN:
+ iscsi_update_cmdsn(session, (struct iscsi_nopin*)hdr);
+ if (hdr->ttt != cpu_to_be32(ISCSI_RESERVED_TAG) || datalen) {
+ rc = ISCSI_ERR_PROTO;
+ break;
+ }
+ conn->exp_statsn = be32_to_cpu(hdr->statsn) + 1;
+
+ if (conn->ping_task != task)
+ /*
+ * If this is not in response to one of our
+ * nops then it must be from userspace.
+ */
+ goto recv_pdu;
+
+ mod_timer(&conn->transport_timer, jiffies + conn->recv_timeout);
+ __iscsi_put_task(task);
+ break;
+ default:
+ rc = ISCSI_ERR_BAD_OPCODE;
+ break;
+ }
+
+out:
+ return rc;
+recv_pdu:
+ if (iscsi_recv_pdu(conn->cls_conn, hdr, data, datalen))
+ rc = ISCSI_ERR_CONN_FAILED;
+ __iscsi_put_task(task);
return rc;
}
+EXPORT_SYMBOL_GPL(__iscsi_complete_pdu);
int iscsi_complete_pdu(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
char *data, int datalen)
@@ -784,52 +896,64 @@
}
EXPORT_SYMBOL_GPL(iscsi_complete_pdu);
-/* verify itt (itt encoding: age+cid+itt) */
-int iscsi_verify_itt(struct iscsi_conn *conn, struct iscsi_hdr *hdr,
- uint32_t *ret_itt)
+int iscsi_verify_itt(struct iscsi_conn *conn, itt_t itt)
{
struct iscsi_session *session = conn->session;
- struct iscsi_cmd_task *ctask;
- uint32_t itt;
+ uint32_t i;
- if (hdr->itt != RESERVED_ITT) {
- if (((__force u32)hdr->itt & ISCSI_AGE_MASK) !=
- (session->age << ISCSI_AGE_SHIFT)) {
- iscsi_conn_printk(KERN_ERR, conn,
- "received itt %x expected session "
- "age (%x)\n", (__force u32)hdr->itt,
- session->age & ISCSI_AGE_MASK);
- return ISCSI_ERR_BAD_ITT;
- }
+ if (itt == RESERVED_ITT)
+ return 0;
- itt = get_itt(hdr->itt);
- } else
- itt = ~0U;
-
- if (itt < session->cmds_max) {
- ctask = session->cmds[itt];
-
- if (!ctask->sc) {
- iscsi_conn_printk(KERN_INFO, conn, "dropping ctask "
- "with itt 0x%x\n", ctask->itt);
- /* force drop */
- return ISCSI_ERR_NO_SCSI_CMD;
- }
-
- if (ctask->sc->SCp.phase != session->age) {
- iscsi_conn_printk(KERN_ERR, conn,
- "iscsi: ctask's session age %d, "
- "expected %d\n", ctask->sc->SCp.phase,
- session->age);
- return ISCSI_ERR_SESSION_FAILED;
- }
+ if (((__force u32)itt & ISCSI_AGE_MASK) !=
+ (session->age << ISCSI_AGE_SHIFT)) {
+ iscsi_conn_printk(KERN_ERR, conn,
+ "received itt %x expected session age (%x)\n",
+ (__force u32)itt, session->age);
+ return ISCSI_ERR_BAD_ITT;
}
- *ret_itt = itt;
+ i = get_itt(itt);
+ if (i >= session->cmds_max) {
+ iscsi_conn_printk(KERN_ERR, conn,
+ "received invalid itt index %u (max cmds "
+ "%u.\n", i, session->cmds_max);
+ return ISCSI_ERR_BAD_ITT;
+ }
return 0;
}
EXPORT_SYMBOL_GPL(iscsi_verify_itt);
+/**
+ * iscsi_itt_to_ctask - look up ctask by itt
+ * @conn: iscsi connection
+ * @itt: itt
+ *
+ * This should be used for cmd tasks.
+ *
+ * The session lock must be held.
+ */
+struct iscsi_task *iscsi_itt_to_ctask(struct iscsi_conn *conn, itt_t itt)
+{
+ struct iscsi_task *task;
+
+ if (iscsi_verify_itt(conn, itt))
+ return NULL;
+
+ task = iscsi_itt_to_task(conn, itt);
+ if (!task || !task->sc)
+ return NULL;
+
+ if (task->sc->SCp.phase != conn->session->age) {
+ iscsi_session_printk(KERN_ERR, conn->session,
+ "task's session age %d, expected %d\n",
+ task->sc->SCp.phase, conn->session->age);
+ return NULL;
+ }
+
+ return task;
+}
+EXPORT_SYMBOL_GPL(iscsi_itt_to_ctask);
+
void iscsi_conn_failure(struct iscsi_conn *conn, enum iscsi_err err)
{
struct iscsi_session *session = conn->session;
@@ -850,61 +974,6 @@
}
EXPORT_SYMBOL_GPL(iscsi_conn_failure);
-static void iscsi_prep_mtask(struct iscsi_conn *conn,
- struct iscsi_mgmt_task *mtask)
-{
- struct iscsi_session *session = conn->session;
- struct iscsi_hdr *hdr = mtask->hdr;
- struct iscsi_nopout *nop = (struct iscsi_nopout *)hdr;
-
- if (hdr->opcode != (ISCSI_OP_LOGIN | ISCSI_OP_IMMEDIATE) &&
- hdr->opcode != (ISCSI_OP_TEXT | ISCSI_OP_IMMEDIATE))
- nop->exp_statsn = cpu_to_be32(conn->exp_statsn);
- /*
- * pre-format CmdSN for outgoing PDU.
- */
- nop->cmdsn = cpu_to_be32(session->cmdsn);
- if (hdr->itt != RESERVED_ITT) {
- hdr->itt = build_itt(mtask->itt, session->age);
- /*
- * TODO: We always use immediate, so we never hit this.
- * If we start to send tmfs or nops as non-immediate then
- * we should start checking the cmdsn numbers for mgmt tasks.
- */
- if (conn->c_stage == ISCSI_CONN_STARTED &&
- !(hdr->opcode & ISCSI_OP_IMMEDIATE)) {
- session->queued_cmdsn++;
- session->cmdsn++;
- }
- }
-
- if (session->tt->init_mgmt_task)
- session->tt->init_mgmt_task(conn, mtask);
-
- debug_scsi("mgmtpdu [op 0x%x hdr->itt 0x%x datalen %d]\n",
- hdr->opcode & ISCSI_OPCODE_MASK, hdr->itt,
- mtask->data_count);
-}
-
-static int iscsi_xmit_mtask(struct iscsi_conn *conn)
-{
- struct iscsi_hdr *hdr = conn->mtask->hdr;
- int rc;
-
- if ((hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
- conn->session->state = ISCSI_STATE_LOGGING_OUT;
- spin_unlock_bh(&conn->session->lock);
-
- rc = conn->session->tt->xmit_mgmt_task(conn, conn->mtask);
- spin_lock_bh(&conn->session->lock);
- if (rc)
- return rc;
-
- /* done with this in-progress mtask */
- conn->mtask = NULL;
- return 0;
-}
-
static int iscsi_check_cmdsn_window_closed(struct iscsi_conn *conn)
{
struct iscsi_session *session = conn->session;
@@ -922,37 +991,38 @@
return 0;
}
-static int iscsi_xmit_ctask(struct iscsi_conn *conn)
+static int iscsi_xmit_task(struct iscsi_conn *conn)
{
- struct iscsi_cmd_task *ctask = conn->ctask;
+ struct iscsi_task *task = conn->task;
int rc;
- __iscsi_get_ctask(ctask);
+ __iscsi_get_task(task);
spin_unlock_bh(&conn->session->lock);
- rc = conn->session->tt->xmit_cmd_task(conn, ctask);
+ rc = conn->session->tt->xmit_task(task);
spin_lock_bh(&conn->session->lock);
- __iscsi_put_ctask(ctask);
+ __iscsi_put_task(task);
if (!rc)
- /* done with this ctask */
- conn->ctask = NULL;
+ /* done with this task */
+ conn->task = NULL;
return rc;
}
/**
- * iscsi_requeue_ctask - requeue ctask to run from session workqueue
- * @ctask: ctask to requeue
+ * iscsi_requeue_task - requeue task to run from session workqueue
+ * @task: task to requeue
*
- * LLDs that need to run a ctask from the session workqueue should call
- * this. The session lock must be held.
+ * LLDs that need to run a task from the session workqueue should call
+ * this. The session lock must be held. This should only be called
+ * by software drivers.
*/
-void iscsi_requeue_ctask(struct iscsi_cmd_task *ctask)
+void iscsi_requeue_task(struct iscsi_task *task)
{
- struct iscsi_conn *conn = ctask->conn;
+ struct iscsi_conn *conn = task->conn;
- list_move_tail(&ctask->running, &conn->requeue);
+ list_move_tail(&task->running, &conn->requeue);
scsi_queue_work(conn->session->host, &conn->xmitwork);
}
-EXPORT_SYMBOL_GPL(iscsi_requeue_ctask);
+EXPORT_SYMBOL_GPL(iscsi_requeue_task);
/**
* iscsi_data_xmit - xmit any command into the scheduled connection
@@ -974,14 +1044,8 @@
return -ENODATA;
}
- if (conn->ctask) {
- rc = iscsi_xmit_ctask(conn);
- if (rc)
- goto again;
- }
-
- if (conn->mtask) {
- rc = iscsi_xmit_mtask(conn);
+ if (conn->task) {
+ rc = iscsi_xmit_task(conn);
if (rc)
goto again;
}
@@ -993,17 +1057,14 @@
*/
check_mgmt:
while (!list_empty(&conn->mgmtqueue)) {
- conn->mtask = list_entry(conn->mgmtqueue.next,
- struct iscsi_mgmt_task, running);
- if (conn->session->state == ISCSI_STATE_LOGGING_OUT) {
- iscsi_free_mgmt_task(conn, conn->mtask);
- conn->mtask = NULL;
+ conn->task = list_entry(conn->mgmtqueue.next,
+ struct iscsi_task, running);
+ if (iscsi_prep_mgmt_task(conn, conn->task)) {
+ __iscsi_put_task(conn->task);
+ conn->task = NULL;
continue;
}
-
- iscsi_prep_mtask(conn, conn->mtask);
- list_move_tail(conn->mgmtqueue.next, &conn->mgmt_run_list);
- rc = iscsi_xmit_mtask(conn);
+ rc = iscsi_xmit_task(conn);
if (rc)
goto again;
}
@@ -1013,24 +1074,21 @@
if (conn->tmf_state == TMF_QUEUED)
break;
- conn->ctask = list_entry(conn->xmitqueue.next,
- struct iscsi_cmd_task, running);
+ conn->task = list_entry(conn->xmitqueue.next,
+ struct iscsi_task, running);
if (conn->session->state == ISCSI_STATE_LOGGING_OUT) {
- fail_command(conn, conn->ctask, DID_IMM_RETRY << 16);
+ fail_command(conn, conn->task, DID_IMM_RETRY << 16);
continue;
}
- if (iscsi_prep_scsi_cmd_pdu(conn->ctask)) {
- fail_command(conn, conn->ctask, DID_ABORT << 16);
+ if (iscsi_prep_scsi_cmd_pdu(conn->task)) {
+ fail_command(conn, conn->task, DID_ABORT << 16);
continue;
}
-
- conn->ctask->state = ISCSI_TASK_RUNNING;
- list_move_tail(conn->xmitqueue.next, &conn->run_list);
- rc = iscsi_xmit_ctask(conn);
+ rc = iscsi_xmit_task(conn);
if (rc)
goto again;
/*
- * we could continuously get new ctask requests so
+ * we could continuously get new task requests so
* we need to check the mgmt queue for nops that need to
* be sent to aviod starvation
*/
@@ -1048,11 +1106,11 @@
if (conn->session->state == ISCSI_STATE_LOGGING_OUT)
break;
- conn->ctask = list_entry(conn->requeue.next,
- struct iscsi_cmd_task, running);
- conn->ctask->state = ISCSI_TASK_RUNNING;
+ conn->task = list_entry(conn->requeue.next,
+ struct iscsi_task, running);
+ conn->task->state = ISCSI_TASK_RUNNING;
list_move_tail(conn->requeue.next, &conn->run_list);
- rc = iscsi_xmit_ctask(conn);
+ rc = iscsi_xmit_task(conn);
if (rc)
goto again;
if (!list_empty(&conn->mgmtqueue))
@@ -1096,11 +1154,12 @@
int iscsi_queuecommand(struct scsi_cmnd *sc, void (*done)(struct scsi_cmnd *))
{
+ struct iscsi_cls_session *cls_session;
struct Scsi_Host *host;
int reason = 0;
struct iscsi_session *session;
struct iscsi_conn *conn;
- struct iscsi_cmd_task *ctask = NULL;
+ struct iscsi_task *task = NULL;
sc->scsi_done = done;
sc->result = 0;
@@ -1109,10 +1168,11 @@
host = sc->device->host;
spin_unlock(host->host_lock);
- session = iscsi_hostdata(host->hostdata);
+ cls_session = starget_to_session(scsi_target(sc->device));
+ session = cls_session->dd_data;
spin_lock(&session->lock);
- reason = iscsi_session_chkready(session_to_cls(session));
+ reason = iscsi_session_chkready(cls_session);
if (reason) {
sc->result = reason;
goto fault;
@@ -1167,26 +1227,39 @@
goto reject;
}
- if (!__kfifo_get(session->cmdpool.queue, (void*)&ctask,
+ if (!__kfifo_get(session->cmdpool.queue, (void*)&task,
sizeof(void*))) {
reason = FAILURE_OOM;
goto reject;
}
- session->queued_cmdsn++;
-
sc->SCp.phase = session->age;
- sc->SCp.ptr = (char *)ctask;
+ sc->SCp.ptr = (char *)task;
- atomic_set(&ctask->refcount, 1);
- ctask->state = ISCSI_TASK_PENDING;
- ctask->conn = conn;
- ctask->sc = sc;
- INIT_LIST_HEAD(&ctask->running);
+ atomic_set(&task->refcount, 1);
+ task->state = ISCSI_TASK_PENDING;
+ task->conn = conn;
+ task->sc = sc;
+ INIT_LIST_HEAD(&task->running);
+ list_add_tail(&task->running, &conn->xmitqueue);
- list_add_tail(&ctask->running, &conn->xmitqueue);
+ if (session->tt->caps & CAP_DATA_PATH_OFFLOAD) {
+ if (iscsi_prep_scsi_cmd_pdu(task)) {
+ sc->result = DID_ABORT << 16;
+ sc->scsi_done = NULL;
+ iscsi_complete_command(task);
+ goto fault;
+ }
+ if (session->tt->xmit_task(task)) {
+ sc->scsi_done = NULL;
+ iscsi_complete_command(task);
+ reason = FAILURE_SESSION_NOT_READY;
+ goto reject;
+ }
+ } else
+ scsi_queue_work(session->host, &conn->xmitwork);
+
+ session->queued_cmdsn++;
spin_unlock(&session->lock);
-
- scsi_queue_work(host, &conn->xmitwork);
spin_lock(host->host_lock);
return 0;
@@ -1205,7 +1278,7 @@
scsi_out(sc)->resid = scsi_out(sc)->length;
scsi_in(sc)->resid = scsi_in(sc)->length;
}
- sc->scsi_done(sc);
+ done(sc);
spin_lock(host->host_lock);
return 0;
}
@@ -1222,7 +1295,7 @@
void iscsi_session_recovery_timedout(struct iscsi_cls_session *cls_session)
{
- struct iscsi_session *session = class_to_transport_session(cls_session);
+ struct iscsi_session *session = cls_session->dd_data;
spin_lock_bh(&session->lock);
if (session->state != ISCSI_STATE_LOGGED_IN) {
@@ -1236,9 +1309,13 @@
int iscsi_eh_host_reset(struct scsi_cmnd *sc)
{
- struct Scsi_Host *host = sc->device->host;
- struct iscsi_session *session = iscsi_hostdata(host->hostdata);
- struct iscsi_conn *conn = session->leadconn;
+ struct iscsi_cls_session *cls_session;
+ struct iscsi_session *session;
+ struct iscsi_conn *conn;
+
+ cls_session = starget_to_session(scsi_target(sc->device));
+ session = cls_session->dd_data;
+ conn = session->leadconn;
mutex_lock(&session->eh_mutex);
spin_lock_bh(&session->lock);
@@ -1300,11 +1377,11 @@
int timeout)
{
struct iscsi_session *session = conn->session;
- struct iscsi_mgmt_task *mtask;
+ struct iscsi_task *task;
- mtask = __iscsi_conn_send_pdu(conn, (struct iscsi_hdr *)hdr,
+ task = __iscsi_conn_send_pdu(conn, (struct iscsi_hdr *)hdr,
NULL, 0);
- if (!mtask) {
+ if (!task) {
spin_unlock_bh(&session->lock);
iscsi_conn_failure(conn, ISCSI_ERR_CONN_FAILED);
spin_lock_bh(&session->lock);
@@ -1320,7 +1397,6 @@
spin_unlock_bh(&session->lock);
mutex_unlock(&session->eh_mutex);
- scsi_queue_work(session->host, &conn->xmitwork);
/*
* block eh thread until:
@@ -1339,7 +1415,7 @@
mutex_lock(&session->eh_mutex);
spin_lock_bh(&session->lock);
- /* if the session drops it will clean up the mtask */
+ /* if the session drops it will clean up the task */
if (age != session->age ||
session->state != ISCSI_STATE_LOGGED_IN)
return -ENOTCONN;
@@ -1353,48 +1429,51 @@
static void fail_all_commands(struct iscsi_conn *conn, unsigned lun,
int error)
{
- struct iscsi_cmd_task *ctask, *tmp;
+ struct iscsi_task *task, *tmp;
- if (conn->ctask && (conn->ctask->sc->device->lun == lun || lun == -1))
- conn->ctask = NULL;
+ if (conn->task && (conn->task->sc->device->lun == lun || lun == -1))
+ conn->task = NULL;
/* flush pending */
- list_for_each_entry_safe(ctask, tmp, &conn->xmitqueue, running) {
- if (lun == ctask->sc->device->lun || lun == -1) {
+ list_for_each_entry_safe(task, tmp, &conn->xmitqueue, running) {
+ if (lun == task->sc->device->lun || lun == -1) {
debug_scsi("failing pending sc %p itt 0x%x\n",
- ctask->sc, ctask->itt);
- fail_command(conn, ctask, error << 16);
+ task->sc, task->itt);
+ fail_command(conn, task, error << 16);
}
}
- list_for_each_entry_safe(ctask, tmp, &conn->requeue, running) {
- if (lun == ctask->sc->device->lun || lun == -1) {
+ list_for_each_entry_safe(task, tmp, &conn->requeue, running) {
+ if (lun == task->sc->device->lun || lun == -1) {
debug_scsi("failing requeued sc %p itt 0x%x\n",
- ctask->sc, ctask->itt);
- fail_command(conn, ctask, error << 16);
+ task->sc, task->itt);
+ fail_command(conn, task, error << 16);
}
}
/* fail all other running */
- list_for_each_entry_safe(ctask, tmp, &conn->run_list, running) {
- if (lun == ctask->sc->device->lun || lun == -1) {
+ list_for_each_entry_safe(task, tmp, &conn->run_list, running) {
+ if (lun == task->sc->device->lun || lun == -1) {
debug_scsi("failing in progress sc %p itt 0x%x\n",
- ctask->sc, ctask->itt);
- fail_command(conn, ctask, DID_BUS_BUSY << 16);
+ task->sc, task->itt);
+ fail_command(conn, task, DID_BUS_BUSY << 16);
}
}
}
-static void iscsi_suspend_tx(struct iscsi_conn *conn)
+void iscsi_suspend_tx(struct iscsi_conn *conn)
{
set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx);
- scsi_flush_work(conn->session->host);
+ if (!(conn->session->tt->caps & CAP_DATA_PATH_OFFLOAD))
+ scsi_flush_work(conn->session->host);
}
+EXPORT_SYMBOL_GPL(iscsi_suspend_tx);
static void iscsi_start_tx(struct iscsi_conn *conn)
{
clear_bit(ISCSI_SUSPEND_BIT, &conn->suspend_tx);
- scsi_queue_work(conn->session->host, &conn->xmitwork);
+ if (!(conn->session->tt->caps & CAP_DATA_PATH_OFFLOAD))
+ scsi_queue_work(conn->session->host, &conn->xmitwork);
}
static enum scsi_eh_timer_return iscsi_eh_cmd_timed_out(struct scsi_cmnd *scmd)
@@ -1405,7 +1484,7 @@
enum scsi_eh_timer_return rc = EH_NOT_HANDLED;
cls_session = starget_to_session(scsi_target(scmd->device));
- session = class_to_transport_session(cls_session);
+ session = cls_session->dd_data;
debug_scsi("scsi cmd %p timedout\n", scmd);
@@ -1443,7 +1522,7 @@
jiffies))
rc = EH_RESET_TIMER;
/* if in the middle of checking the transport then give us more time */
- if (conn->ping_mtask)
+ if (conn->ping_task)
rc = EH_RESET_TIMER;
done:
spin_unlock(&session->lock);
@@ -1467,7 +1546,7 @@
recv_timeout *= HZ;
last_recv = conn->last_recv;
- if (conn->ping_mtask &&
+ if (conn->ping_task &&
time_before_eq(conn->last_ping + (conn->ping_timeout * HZ),
jiffies)) {
iscsi_conn_printk(KERN_ERR, conn, "ping timeout of %d secs "
@@ -1493,27 +1572,30 @@
spin_unlock(&session->lock);
}
-static void iscsi_prep_abort_task_pdu(struct iscsi_cmd_task *ctask,
+static void iscsi_prep_abort_task_pdu(struct iscsi_task *task,
struct iscsi_tm *hdr)
{
memset(hdr, 0, sizeof(*hdr));
hdr->opcode = ISCSI_OP_SCSI_TMFUNC | ISCSI_OP_IMMEDIATE;
hdr->flags = ISCSI_TM_FUNC_ABORT_TASK & ISCSI_FLAG_TM_FUNC_MASK;
hdr->flags |= ISCSI_FLAG_CMD_FINAL;
- memcpy(hdr->lun, ctask->hdr->lun, sizeof(hdr->lun));
- hdr->rtt = ctask->hdr->itt;
- hdr->refcmdsn = ctask->hdr->cmdsn;
+ memcpy(hdr->lun, task->hdr->lun, sizeof(hdr->lun));
+ hdr->rtt = task->hdr->itt;
+ hdr->refcmdsn = task->hdr->cmdsn;
}
int iscsi_eh_abort(struct scsi_cmnd *sc)
{
- struct Scsi_Host *host = sc->device->host;
- struct iscsi_session *session = iscsi_hostdata(host->hostdata);
+ struct iscsi_cls_session *cls_session;
+ struct iscsi_session *session;
struct iscsi_conn *conn;
- struct iscsi_cmd_task *ctask;
+ struct iscsi_task *task;
struct iscsi_tm *hdr;
int rc, age;
+ cls_session = starget_to_session(scsi_target(sc->device));
+ session = cls_session->dd_data;
+
mutex_lock(&session->eh_mutex);
spin_lock_bh(&session->lock);
/*
@@ -1542,17 +1624,17 @@
conn->eh_abort_cnt++;
age = session->age;
- ctask = (struct iscsi_cmd_task *)sc->SCp.ptr;
- debug_scsi("aborting [sc %p itt 0x%x]\n", sc, ctask->itt);
+ task = (struct iscsi_task *)sc->SCp.ptr;
+ debug_scsi("aborting [sc %p itt 0x%x]\n", sc, task->itt);
- /* ctask completed before time out */
- if (!ctask->sc) {
+ /* task completed before time out */
+ if (!task->sc) {
debug_scsi("sc completed while abort in progress\n");
goto success;
}
- if (ctask->state == ISCSI_TASK_PENDING) {
- fail_command(conn, ctask, DID_ABORT << 16);
+ if (task->state == ISCSI_TASK_PENDING) {
+ fail_command(conn, task, DID_ABORT << 16);
goto success;
}
@@ -1562,7 +1644,7 @@
conn->tmf_state = TMF_QUEUED;
hdr = &conn->tmhdr;
- iscsi_prep_abort_task_pdu(ctask, hdr);
+ iscsi_prep_abort_task_pdu(task, hdr);
if (iscsi_exec_task_mgmt_fn(conn, hdr, age, session->abort_timeout)) {
rc = FAILED;
@@ -1572,16 +1654,20 @@
switch (conn->tmf_state) {
case TMF_SUCCESS:
spin_unlock_bh(&session->lock);
+ /*
+ * stop tx side incase the target had sent a abort rsp but
+ * the initiator was still writing out data.
+ */
iscsi_suspend_tx(conn);
/*
- * clean up task if aborted. grab the recv lock as a writer
+ * we do not stop the recv side because targets have been
+ * good and have never sent us a successful tmf response
+ * then sent more data for the cmd.
*/
- write_lock_bh(conn->recv_lock);
spin_lock(&session->lock);
- fail_command(conn, ctask, DID_ABORT << 16);
+ fail_command(conn, task, DID_ABORT << 16);
conn->tmf_state = TMF_INITIAL;
spin_unlock(&session->lock);
- write_unlock_bh(conn->recv_lock);
iscsi_start_tx(conn);
goto success_unlocked;
case TMF_TIMEDOUT:
@@ -1591,7 +1677,7 @@
case TMF_NOT_FOUND:
if (!sc->SCp.ptr) {
conn->tmf_state = TMF_INITIAL;
- /* ctask completed before tmf abort response */
+ /* task completed before tmf abort response */
debug_scsi("sc completed while abort in progress\n");
goto success;
}
@@ -1604,7 +1690,7 @@
success:
spin_unlock_bh(&session->lock);
success_unlocked:
- debug_scsi("abort success [sc %lx itt 0x%x]\n", (long)sc, ctask->itt);
+ debug_scsi("abort success [sc %lx itt 0x%x]\n", (long)sc, task->itt);
mutex_unlock(&session->eh_mutex);
return SUCCESS;
@@ -1612,7 +1698,7 @@
spin_unlock_bh(&session->lock);
failed_unlocked:
debug_scsi("abort failed [sc %p itt 0x%x]\n", sc,
- ctask ? ctask->itt : 0);
+ task ? task->itt : 0);
mutex_unlock(&session->eh_mutex);
return FAILED;
}
@@ -1630,12 +1716,15 @@
int iscsi_eh_device_reset(struct scsi_cmnd *sc)
{
- struct Scsi_Host *host = sc->device->host;
- struct iscsi_session *session = iscsi_hostdata(host->hostdata);
+ struct iscsi_cls_session *cls_session;
+ struct iscsi_session *session;
struct iscsi_conn *conn;
struct iscsi_tm *hdr;
int rc = FAILED;
+ cls_session = starget_to_session(scsi_target(sc->device));
+ session = cls_session->dd_data;
+
debug_scsi("LU Reset [sc %p lun %u]\n", sc, sc->device->lun);
mutex_lock(&session->eh_mutex);
@@ -1678,13 +1767,11 @@
spin_unlock_bh(&session->lock);
iscsi_suspend_tx(conn);
- /* need to grab the recv lock then session lock */
- write_lock_bh(conn->recv_lock);
+
spin_lock(&session->lock);
fail_all_commands(conn, sc->device->lun, DID_ERROR);
conn->tmf_state = TMF_INITIAL;
spin_unlock(&session->lock);
- write_unlock_bh(conn->recv_lock);
iscsi_start_tx(conn);
goto done;
@@ -1760,177 +1847,203 @@
}
EXPORT_SYMBOL_GPL(iscsi_pool_free);
-/*
- * iSCSI Session's hostdata organization:
+/**
+ * iscsi_host_add - add host to system
+ * @shost: scsi host
+ * @pdev: parent device
*
- * *------------------* <== hostdata_session(host->hostdata)
- * | ptr to class sess|
- * |------------------| <== iscsi_hostdata(host->hostdata)
- * | iscsi_session |
- * *------------------*
+ * This should be called by partial offload and software iscsi drivers
+ * to add a host to the system.
*/
+int iscsi_host_add(struct Scsi_Host *shost, struct device *pdev)
+{
+ if (!shost->can_queue)
+ shost->can_queue = ISCSI_DEF_XMIT_CMDS_MAX;
-#define hostdata_privsize(_sz) (sizeof(unsigned long) + _sz + \
- _sz % sizeof(unsigned long))
-
-#define hostdata_session(_hostdata) (iscsi_ptr(*(unsigned long *)_hostdata))
+ return scsi_add_host(shost, pdev);
+}
+EXPORT_SYMBOL_GPL(iscsi_host_add);
/**
- * iscsi_session_setup - create iscsi cls session and host and session
- * @scsit: scsi transport template
- * @iscsit: iscsi transport template
- * @cmds_max: scsi host can queue
- * @qdepth: scsi host cmds per lun
- * @cmd_task_size: LLD ctask private data size
- * @mgmt_task_size: LLD mtask private data size
- * @initial_cmdsn: initial CmdSN
- * @hostno: host no allocated
+ * iscsi_host_alloc - allocate a host and driver data
+ * @sht: scsi host template
+ * @dd_data_size: driver host data size
+ * @qdepth: default device queue depth
*
- * This can be used by software iscsi_transports that allocate
- * a session per scsi host.
- **/
-struct iscsi_cls_session *
-iscsi_session_setup(struct iscsi_transport *iscsit,
- struct scsi_transport_template *scsit,
- uint16_t cmds_max, uint16_t qdepth,
- int cmd_task_size, int mgmt_task_size,
- uint32_t initial_cmdsn, uint32_t *hostno)
+ * This should be called by partial offload and software iscsi drivers.
+ * To access the driver specific memory use the iscsi_host_priv() macro.
+ */
+struct Scsi_Host *iscsi_host_alloc(struct scsi_host_template *sht,
+ int dd_data_size, uint16_t qdepth)
{
struct Scsi_Host *shost;
- struct iscsi_session *session;
- struct iscsi_cls_session *cls_session;
- int cmd_i;
+
+ shost = scsi_host_alloc(sht, sizeof(struct iscsi_host) + dd_data_size);
+ if (!shost)
+ return NULL;
+ shost->transportt->eh_timed_out = iscsi_eh_cmd_timed_out;
if (qdepth > ISCSI_MAX_CMD_PER_LUN || qdepth < 1) {
if (qdepth != 0)
printk(KERN_ERR "iscsi: invalid queue depth of %d. "
- "Queue depth must be between 1 and %d.\n",
- qdepth, ISCSI_MAX_CMD_PER_LUN);
+ "Queue depth must be between 1 and %d.\n",
+ qdepth, ISCSI_MAX_CMD_PER_LUN);
qdepth = ISCSI_DEF_CMD_PER_LUN;
}
+ shost->cmd_per_lun = qdepth;
+ return shost;
+}
+EXPORT_SYMBOL_GPL(iscsi_host_alloc);
- if (!is_power_of_2(cmds_max) || cmds_max >= ISCSI_MGMT_ITT_OFFSET ||
- cmds_max < 2) {
- if (cmds_max != 0)
- printk(KERN_ERR "iscsi: invalid can_queue of %d. "
- "can_queue must be a power of 2 and between "
- "2 and %d - setting to %d.\n", cmds_max,
- ISCSI_MGMT_ITT_OFFSET, ISCSI_DEF_XMIT_CMDS_MAX);
- cmds_max = ISCSI_DEF_XMIT_CMDS_MAX;
+/**
+ * iscsi_host_remove - remove host and sessions
+ * @shost: scsi host
+ *
+ * This will also remove any sessions attached to the host, but if userspace
+ * is managing the session at the same time this will break. TODO: add
+ * refcounting to the netlink iscsi interface so a rmmod or host hot unplug
+ * does not remove the memory from under us.
+ */
+void iscsi_host_remove(struct Scsi_Host *shost)
+{
+ iscsi_host_for_each_session(shost, iscsi_session_teardown);
+ scsi_remove_host(shost);
+}
+EXPORT_SYMBOL_GPL(iscsi_host_remove);
+
+void iscsi_host_free(struct Scsi_Host *shost)
+{
+ struct iscsi_host *ihost = shost_priv(shost);
+
+ kfree(ihost->netdev);
+ kfree(ihost->hwaddress);
+ kfree(ihost->initiatorname);
+ scsi_host_put(shost);
+}
+EXPORT_SYMBOL_GPL(iscsi_host_free);
+
+/**
+ * iscsi_session_setup - create iscsi cls session and host and session
+ * @iscsit: iscsi transport template
+ * @shost: scsi host
+ * @cmds_max: session can queue
+ * @cmd_task_size: LLD task private data size
+ * @initial_cmdsn: initial CmdSN
+ *
+ * This can be used by software iscsi_transports that allocate
+ * a session per scsi host.
+ *
+ * Callers should set cmds_max to the largest total numer (mgmt + scsi) of
+ * tasks they support. The iscsi layer reserves ISCSI_MGMT_CMDS_MAX tasks
+ * for nop handling and login/logout requests.
+ */
+struct iscsi_cls_session *
+iscsi_session_setup(struct iscsi_transport *iscsit, struct Scsi_Host *shost,
+ uint16_t cmds_max, int cmd_task_size,
+ uint32_t initial_cmdsn, unsigned int id)
+{
+ struct iscsi_session *session;
+ struct iscsi_cls_session *cls_session;
+ int cmd_i, scsi_cmds, total_cmds = cmds_max;
+
+ if (!total_cmds)
+ total_cmds = ISCSI_DEF_XMIT_CMDS_MAX;
+ /*
+ * The iscsi layer needs some tasks for nop handling and tmfs,
+ * so the cmds_max must at least be greater than ISCSI_MGMT_CMDS_MAX
+ * + 1 command for scsi IO.
+ */
+ if (total_cmds < ISCSI_TOTAL_CMDS_MIN) {
+ printk(KERN_ERR "iscsi: invalid can_queue of %d. can_queue "
+ "must be a power of two that is at least %d.\n",
+ total_cmds, ISCSI_TOTAL_CMDS_MIN);
+ return NULL;
}
- shost = scsi_host_alloc(iscsit->host_template,
- hostdata_privsize(sizeof(*session)));
- if (!shost)
+ if (total_cmds > ISCSI_TOTAL_CMDS_MAX) {
+ printk(KERN_ERR "iscsi: invalid can_queue of %d. can_queue "
+ "must be a power of 2 less than or equal to %d.\n",
+ cmds_max, ISCSI_TOTAL_CMDS_MAX);
+ total_cmds = ISCSI_TOTAL_CMDS_MAX;
+ }
+
+ if (!is_power_of_2(total_cmds)) {
+ printk(KERN_ERR "iscsi: invalid can_queue of %d. can_queue "
+ "must be a power of 2.\n", total_cmds);
+ total_cmds = rounddown_pow_of_two(total_cmds);
+ if (total_cmds < ISCSI_TOTAL_CMDS_MIN)
+ return NULL;
+ printk(KERN_INFO "iscsi: Rounding can_queue to %d.\n",
+ total_cmds);
+ }
+ scsi_cmds = total_cmds - ISCSI_MGMT_CMDS_MAX;
+
+ cls_session = iscsi_alloc_session(shost, iscsit,
+ sizeof(struct iscsi_session));
+ if (!cls_session)
return NULL;
-
- /* the iscsi layer takes one task for reserve */
- shost->can_queue = cmds_max - 1;
- shost->cmd_per_lun = qdepth;
- shost->max_id = 1;
- shost->max_channel = 0;
- shost->max_lun = iscsit->max_lun;
- shost->max_cmd_len = iscsit->max_cmd_len;
- shost->transportt = scsit;
- shost->transportt->create_work_queue = 1;
- shost->transportt->eh_timed_out = iscsi_eh_cmd_timed_out;
- *hostno = shost->host_no;
-
- session = iscsi_hostdata(shost->hostdata);
- memset(session, 0, sizeof(struct iscsi_session));
+ session = cls_session->dd_data;
+ session->cls_session = cls_session;
session->host = shost;
session->state = ISCSI_STATE_FREE;
session->fast_abort = 1;
session->lu_reset_timeout = 15;
session->abort_timeout = 10;
- session->mgmtpool_max = ISCSI_MGMT_CMDS_MAX;
- session->cmds_max = cmds_max;
+ session->scsi_cmds_max = scsi_cmds;
+ session->cmds_max = total_cmds;
session->queued_cmdsn = session->cmdsn = initial_cmdsn;
session->exp_cmdsn = initial_cmdsn + 1;
session->max_cmdsn = initial_cmdsn + 1;
session->max_r2t = 1;
session->tt = iscsit;
mutex_init(&session->eh_mutex);
+ spin_lock_init(&session->lock);
/* initialize SCSI PDU commands pool */
if (iscsi_pool_init(&session->cmdpool, session->cmds_max,
(void***)&session->cmds,
- cmd_task_size + sizeof(struct iscsi_cmd_task)))
+ cmd_task_size + sizeof(struct iscsi_task)))
goto cmdpool_alloc_fail;
/* pre-format cmds pool with ITT */
for (cmd_i = 0; cmd_i < session->cmds_max; cmd_i++) {
- struct iscsi_cmd_task *ctask = session->cmds[cmd_i];
+ struct iscsi_task *task = session->cmds[cmd_i];
if (cmd_task_size)
- ctask->dd_data = &ctask[1];
- ctask->itt = cmd_i;
- INIT_LIST_HEAD(&ctask->running);
+ task->dd_data = &task[1];
+ task->itt = cmd_i;
+ INIT_LIST_HEAD(&task->running);
}
- spin_lock_init(&session->lock);
-
- /* initialize immediate command pool */
- if (iscsi_pool_init(&session->mgmtpool, session->mgmtpool_max,
- (void***)&session->mgmt_cmds,
- mgmt_task_size + sizeof(struct iscsi_mgmt_task)))
- goto mgmtpool_alloc_fail;
-
-
- /* pre-format immediate cmds pool with ITT */
- for (cmd_i = 0; cmd_i < session->mgmtpool_max; cmd_i++) {
- struct iscsi_mgmt_task *mtask = session->mgmt_cmds[cmd_i];
-
- if (mgmt_task_size)
- mtask->dd_data = &mtask[1];
- mtask->itt = ISCSI_MGMT_ITT_OFFSET + cmd_i;
- INIT_LIST_HEAD(&mtask->running);
- }
-
- if (scsi_add_host(shost, NULL))
- goto add_host_fail;
-
if (!try_module_get(iscsit->owner))
+ goto module_get_fail;
+
+ if (iscsi_add_session(cls_session, id))
goto cls_session_fail;
-
- cls_session = iscsi_create_session(shost, iscsit, 0);
- if (!cls_session)
- goto module_put;
- *(unsigned long*)shost->hostdata = (unsigned long)cls_session;
-
return cls_session;
-module_put:
- module_put(iscsit->owner);
cls_session_fail:
- scsi_remove_host(shost);
-add_host_fail:
- iscsi_pool_free(&session->mgmtpool);
-mgmtpool_alloc_fail:
+ module_put(iscsit->owner);
+module_get_fail:
iscsi_pool_free(&session->cmdpool);
cmdpool_alloc_fail:
- scsi_host_put(shost);
+ iscsi_free_session(cls_session);
return NULL;
}
EXPORT_SYMBOL_GPL(iscsi_session_setup);
/**
* iscsi_session_teardown - destroy session, host, and cls_session
- * shost: scsi host
+ * @cls_session: iscsi session
*
- * This can be used by software iscsi_transports that allocate
- * a session per scsi host.
- **/
+ * The driver must have called iscsi_remove_session before
+ * calling this.
+ */
void iscsi_session_teardown(struct iscsi_cls_session *cls_session)
{
- struct Scsi_Host *shost = iscsi_session_to_shost(cls_session);
- struct iscsi_session *session = iscsi_hostdata(shost->hostdata);
+ struct iscsi_session *session = cls_session->dd_data;
struct module *owner = cls_session->transport->owner;
- iscsi_remove_session(cls_session);
- scsi_remove_host(shost);
-
- iscsi_pool_free(&session->mgmtpool);
iscsi_pool_free(&session->cmdpool);
kfree(session->password);
@@ -1938,12 +2051,10 @@
kfree(session->username);
kfree(session->username_in);
kfree(session->targetname);
- kfree(session->netdev);
- kfree(session->hwaddress);
kfree(session->initiatorname);
+ kfree(session->ifacename);
- iscsi_free_session(cls_session);
- scsi_host_put(shost);
+ iscsi_destroy_session(cls_session);
module_put(owner);
}
EXPORT_SYMBOL_GPL(iscsi_session_teardown);
@@ -1951,22 +2062,26 @@
/**
* iscsi_conn_setup - create iscsi_cls_conn and iscsi_conn
* @cls_session: iscsi_cls_session
+ * @dd_size: private driver data size
* @conn_idx: cid
- **/
+ */
struct iscsi_cls_conn *
-iscsi_conn_setup(struct iscsi_cls_session *cls_session, uint32_t conn_idx)
+iscsi_conn_setup(struct iscsi_cls_session *cls_session, int dd_size,
+ uint32_t conn_idx)
{
- struct iscsi_session *session = class_to_transport_session(cls_session);
+ struct iscsi_session *session = cls_session->dd_data;
struct iscsi_conn *conn;
struct iscsi_cls_conn *cls_conn;
char *data;
- cls_conn = iscsi_create_conn(cls_session, conn_idx);
+ cls_conn = iscsi_create_conn(cls_session, sizeof(*conn) + dd_size,
+ conn_idx);
if (!cls_conn)
return NULL;
conn = cls_conn->dd_data;
- memset(conn, 0, sizeof(*conn));
+ memset(conn, 0, sizeof(*conn) + dd_size);
+ conn->dd_data = cls_conn->dd_data + sizeof(*conn);
conn->session = session;
conn->cls_conn = cls_conn;
conn->c_stage = ISCSI_CONN_INITIAL_STAGE;
@@ -1985,30 +2100,30 @@
INIT_LIST_HEAD(&conn->requeue);
INIT_WORK(&conn->xmitwork, iscsi_xmitworker);
- /* allocate login_mtask used for the login/text sequences */
+ /* allocate login_task used for the login/text sequences */
spin_lock_bh(&session->lock);
- if (!__kfifo_get(session->mgmtpool.queue,
- (void*)&conn->login_mtask,
+ if (!__kfifo_get(session->cmdpool.queue,
+ (void*)&conn->login_task,
sizeof(void*))) {
spin_unlock_bh(&session->lock);
- goto login_mtask_alloc_fail;
+ goto login_task_alloc_fail;
}
spin_unlock_bh(&session->lock);
data = kmalloc(ISCSI_DEF_MAX_RECV_SEG_LEN, GFP_KERNEL);
if (!data)
- goto login_mtask_data_alloc_fail;
- conn->login_mtask->data = conn->data = data;
+ goto login_task_data_alloc_fail;
+ conn->login_task->data = conn->data = data;
init_timer(&conn->tmf_timer);
init_waitqueue_head(&conn->ehwait);
return cls_conn;
-login_mtask_data_alloc_fail:
- __kfifo_put(session->mgmtpool.queue, (void*)&conn->login_mtask,
+login_task_data_alloc_fail:
+ __kfifo_put(session->cmdpool.queue, (void*)&conn->login_task,
sizeof(void*));
-login_mtask_alloc_fail:
+login_task_alloc_fail:
iscsi_destroy_conn(cls_conn);
return NULL;
}
@@ -2068,7 +2183,7 @@
spin_lock_bh(&session->lock);
kfree(conn->data);
kfree(conn->persistent_address);
- __kfifo_put(session->mgmtpool.queue, (void*)&conn->login_mtask,
+ __kfifo_put(session->cmdpool.queue, (void*)&conn->login_task,
sizeof(void*));
if (session->leadconn == conn)
session->leadconn = NULL;
@@ -2140,7 +2255,7 @@
}
spin_unlock_bh(&session->lock);
- iscsi_unblock_session(session_to_cls(session));
+ iscsi_unblock_session(session->cls_session);
wake_up(&conn->ehwait);
return 0;
}
@@ -2149,21 +2264,23 @@
static void
flush_control_queues(struct iscsi_session *session, struct iscsi_conn *conn)
{
- struct iscsi_mgmt_task *mtask, *tmp;
+ struct iscsi_task *task, *tmp;
/* handle pending */
- list_for_each_entry_safe(mtask, tmp, &conn->mgmtqueue, running) {
- debug_scsi("flushing pending mgmt task itt 0x%x\n", mtask->itt);
- iscsi_free_mgmt_task(conn, mtask);
+ list_for_each_entry_safe(task, tmp, &conn->mgmtqueue, running) {
+ debug_scsi("flushing pending mgmt task itt 0x%x\n", task->itt);
+ /* release ref from prep task */
+ __iscsi_put_task(task);
}
/* handle running */
- list_for_each_entry_safe(mtask, tmp, &conn->mgmt_run_list, running) {
- debug_scsi("flushing running mgmt task itt 0x%x\n", mtask->itt);
- iscsi_free_mgmt_task(conn, mtask);
+ list_for_each_entry_safe(task, tmp, &conn->mgmt_run_list, running) {
+ debug_scsi("flushing running mgmt task itt 0x%x\n", task->itt);
+ /* release ref from prep task */
+ __iscsi_put_task(task);
}
- conn->mtask = NULL;
+ conn->task = NULL;
}
static void iscsi_start_session_recovery(struct iscsi_session *session,
@@ -2182,17 +2299,6 @@
}
/*
- * The LLD either freed/unset the lock on us, or userspace called
- * stop but did not create a proper connection (connection was never
- * bound or it was unbound then stop was called).
- */
- if (!conn->recv_lock) {
- spin_unlock_bh(&session->lock);
- mutex_unlock(&session->eh_mutex);
- return;
- }
-
- /*
* When this is called for the in_login state, we only want to clean
* up the login task and connection. We do not need to block and set
* the recovery state again
@@ -2208,11 +2314,6 @@
spin_unlock_bh(&session->lock);
iscsi_suspend_tx(conn);
-
- write_lock_bh(conn->recv_lock);
- set_bit(ISCSI_SUSPEND_BIT, &conn->suspend_rx);
- write_unlock_bh(conn->recv_lock);
-
/*
* for connection level recovery we should not calculate
* header digest. conn->hdr_size used for optimization
@@ -2225,7 +2326,7 @@
if (session->state == ISCSI_STATE_IN_RECOVERY &&
old_stop_stage != STOP_CONN_RECOVER) {
debug_scsi("blocking session\n");
- iscsi_block_session(session_to_cls(session));
+ iscsi_block_session(session->cls_session);
}
}
@@ -2260,7 +2361,7 @@
int iscsi_conn_bind(struct iscsi_cls_session *cls_session,
struct iscsi_cls_conn *cls_conn, int is_leading)
{
- struct iscsi_session *session = class_to_transport_session(cls_session);
+ struct iscsi_session *session = cls_session->dd_data;
struct iscsi_conn *conn = cls_conn->dd_data;
spin_lock_bh(&session->lock);
@@ -2399,6 +2500,14 @@
if (!conn->persistent_address)
return -ENOMEM;
break;
+ case ISCSI_PARAM_IFACE_NAME:
+ if (!session->ifacename)
+ session->ifacename = kstrdup(buf, GFP_KERNEL);
+ break;
+ case ISCSI_PARAM_INITIATOR_NAME:
+ if (!session->initiatorname)
+ session->initiatorname = kstrdup(buf, GFP_KERNEL);
+ break;
default:
return -ENOSYS;
}
@@ -2410,8 +2519,7 @@
int iscsi_session_get_param(struct iscsi_cls_session *cls_session,
enum iscsi_param param, char *buf)
{
- struct Scsi_Host *shost = iscsi_session_to_shost(cls_session);
- struct iscsi_session *session = iscsi_hostdata(shost->hostdata);
+ struct iscsi_session *session = cls_session->dd_data;
int len;
switch(param) {
@@ -2466,6 +2574,15 @@
case ISCSI_PARAM_PASSWORD_IN:
len = sprintf(buf, "%s\n", session->password_in);
break;
+ case ISCSI_PARAM_IFACE_NAME:
+ len = sprintf(buf, "%s\n", session->ifacename);
+ break;
+ case ISCSI_PARAM_INITIATOR_NAME:
+ if (!session->initiatorname)
+ len = sprintf(buf, "%s\n", "unknown");
+ else
+ len = sprintf(buf, "%s\n", session->initiatorname);
+ break;
default:
return -ENOSYS;
}
@@ -2525,29 +2642,35 @@
int iscsi_host_get_param(struct Scsi_Host *shost, enum iscsi_host_param param,
char *buf)
{
- struct iscsi_session *session = iscsi_hostdata(shost->hostdata);
+ struct iscsi_host *ihost = shost_priv(shost);
int len;
switch (param) {
case ISCSI_HOST_PARAM_NETDEV_NAME:
- if (!session->netdev)
+ if (!ihost->netdev)
len = sprintf(buf, "%s\n", "default");
else
- len = sprintf(buf, "%s\n", session->netdev);
+ len = sprintf(buf, "%s\n", ihost->netdev);
break;
case ISCSI_HOST_PARAM_HWADDRESS:
- if (!session->hwaddress)
+ if (!ihost->hwaddress)
len = sprintf(buf, "%s\n", "default");
else
- len = sprintf(buf, "%s\n", session->hwaddress);
+ len = sprintf(buf, "%s\n", ihost->hwaddress);
break;
case ISCSI_HOST_PARAM_INITIATOR_NAME:
- if (!session->initiatorname)
+ if (!ihost->initiatorname)
len = sprintf(buf, "%s\n", "unknown");
else
- len = sprintf(buf, "%s\n", session->initiatorname);
+ len = sprintf(buf, "%s\n", ihost->initiatorname);
break;
-
+ case ISCSI_HOST_PARAM_IPADDRESS:
+ if (!strlen(ihost->local_address))
+ len = sprintf(buf, "%s\n", "unknown");
+ else
+ len = sprintf(buf, "%s\n",
+ ihost->local_address);
+ break;
default:
return -ENOSYS;
}
@@ -2559,20 +2682,20 @@
int iscsi_host_set_param(struct Scsi_Host *shost, enum iscsi_host_param param,
char *buf, int buflen)
{
- struct iscsi_session *session = iscsi_hostdata(shost->hostdata);
+ struct iscsi_host *ihost = shost_priv(shost);
switch (param) {
case ISCSI_HOST_PARAM_NETDEV_NAME:
- if (!session->netdev)
- session->netdev = kstrdup(buf, GFP_KERNEL);
+ if (!ihost->netdev)
+ ihost->netdev = kstrdup(buf, GFP_KERNEL);
break;
case ISCSI_HOST_PARAM_HWADDRESS:
- if (!session->hwaddress)
- session->hwaddress = kstrdup(buf, GFP_KERNEL);
+ if (!ihost->hwaddress)
+ ihost->hwaddress = kstrdup(buf, GFP_KERNEL);
break;
case ISCSI_HOST_PARAM_INITIATOR_NAME:
- if (!session->initiatorname)
- session->initiatorname = kstrdup(buf, GFP_KERNEL);
+ if (!ihost->initiatorname)
+ ihost->initiatorname = kstrdup(buf, GFP_KERNEL);
break;
default:
return -ENOSYS;
diff --git a/drivers/scsi/lpfc/lpfc.h b/drivers/scsi/lpfc/lpfc.h
index ec0b0f6..e0e018d 100644
--- a/drivers/scsi/lpfc/lpfc.h
+++ b/drivers/scsi/lpfc/lpfc.h
@@ -33,6 +33,7 @@
#define LPFC_MAX_SG_SEG_CNT 256 /* sg element count per scsi cmnd */
#define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
#define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
+#define LPFC_VNAME_LEN 100 /* vport symbolic name length */
/*
* Following time intervals are used of adjusting SCSI device
@@ -59,6 +60,9 @@
#define MAX_HBAEVT 32
+/* lpfc wait event data ready flag */
+#define LPFC_DATA_READY (1<<0)
+
enum lpfc_polling_flags {
ENABLE_FCP_RING_POLLING = 0x1,
DISABLE_FCP_RING_INT = 0x2
@@ -425,9 +429,6 @@
uint16_t pci_cfg_value;
- uint8_t work_found;
-#define LPFC_MAX_WORKER_ITERATION 4
-
uint8_t fc_linkspeed; /* Link speed after last READ_LA */
uint32_t fc_eventTag; /* event tag for link attention */
@@ -489,8 +490,9 @@
uint32_t work_hs; /* HS stored in case of ERRAT */
uint32_t work_status[2]; /* Extra status from SLIM */
- wait_queue_head_t *work_wait;
+ wait_queue_head_t work_waitq;
struct task_struct *worker_thread;
+ long data_flags;
uint32_t hbq_in_use; /* HBQs in use flag */
struct list_head hbqbuf_in_list; /* in-fly hbq buffer list */
@@ -637,6 +639,17 @@
phba->link_state == LPFC_HBA_READY;
}
+static inline void
+lpfc_worker_wake_up(struct lpfc_hba *phba)
+{
+ /* Set the lpfc data pending flag */
+ set_bit(LPFC_DATA_READY, &phba->data_flags);
+
+ /* Wake up worker thread */
+ wake_up(&phba->work_waitq);
+ return;
+}
+
#define FC_REG_DUMP_EVENT 0x10 /* Register for Dump events */
#define FC_REG_TEMPERATURE_EVENT 0x20 /* Register for temperature
event */
diff --git a/drivers/scsi/lpfc/lpfc_attr.c b/drivers/scsi/lpfc/lpfc_attr.c
index 960baaf..37bfa0b 100644
--- a/drivers/scsi/lpfc/lpfc_attr.c
+++ b/drivers/scsi/lpfc/lpfc_attr.c
@@ -1995,8 +1995,7 @@
/* Don't allow mailbox commands to be sent when blocked
* or when in the middle of discovery
*/
- if (phba->sli.sli_flag & LPFC_BLOCK_MGMT_IO ||
- vport->fc_flag & FC_NDISC_ACTIVE) {
+ if (phba->sli.sli_flag & LPFC_BLOCK_MGMT_IO) {
sysfs_mbox_idle(phba);
spin_unlock_irq(&phba->hbalock);
return -EAGAIN;
diff --git a/drivers/scsi/lpfc/lpfc_crtn.h b/drivers/scsi/lpfc/lpfc_crtn.h
index 7c9f831..1b82452 100644
--- a/drivers/scsi/lpfc/lpfc_crtn.h
+++ b/drivers/scsi/lpfc/lpfc_crtn.h
@@ -142,7 +142,7 @@
int lpfc_hba_down_prep(struct lpfc_hba *);
int lpfc_hba_down_post(struct lpfc_hba *);
void lpfc_hba_init(struct lpfc_hba *, uint32_t *);
-int lpfc_post_buffer(struct lpfc_hba *, struct lpfc_sli_ring *, int, int);
+int lpfc_post_buffer(struct lpfc_hba *, struct lpfc_sli_ring *, int);
void lpfc_decode_firmware_rev(struct lpfc_hba *, char *, int);
int lpfc_online(struct lpfc_hba *);
void lpfc_unblock_mgmt_io(struct lpfc_hba *);
@@ -263,6 +263,7 @@
extern int lpfc_enable_npiv;
int lpfc_vport_symbolic_node_name(struct lpfc_vport *, char *, size_t);
+int lpfc_vport_symbolic_port_name(struct lpfc_vport *, char *, size_t);
void lpfc_terminate_rport_io(struct fc_rport *);
void lpfc_dev_loss_tmo_callbk(struct fc_rport *rport);
diff --git a/drivers/scsi/lpfc/lpfc_ct.c b/drivers/scsi/lpfc/lpfc_ct.c
index 153afae..7fc74cf 100644
--- a/drivers/scsi/lpfc/lpfc_ct.c
+++ b/drivers/scsi/lpfc/lpfc_ct.c
@@ -101,7 +101,7 @@
/* Not enough posted buffers; Try posting more buffers */
phba->fc_stat.NoRcvBuf++;
if (!(phba->sli3_options & LPFC_SLI3_HBQ_ENABLED))
- lpfc_post_buffer(phba, pring, 2, 1);
+ lpfc_post_buffer(phba, pring, 2);
return;
}
@@ -151,7 +151,7 @@
}
list_del(&iocbq->list);
lpfc_sli_release_iocbq(phba, iocbq);
- lpfc_post_buffer(phba, pring, i, 1);
+ lpfc_post_buffer(phba, pring, i);
}
}
}
@@ -990,7 +990,7 @@
return;
}
-static int
+int
lpfc_vport_symbolic_port_name(struct lpfc_vport *vport, char *symbol,
size_t size)
{
@@ -1679,20 +1679,18 @@
{
struct lpfc_vport *vport = (struct lpfc_vport *)ptr;
struct lpfc_hba *phba = vport->phba;
+ uint32_t tmo_posted;
unsigned long iflag;
spin_lock_irqsave(&vport->work_port_lock, iflag);
- if (!(vport->work_port_events & WORKER_FDMI_TMO)) {
+ tmo_posted = vport->work_port_events & WORKER_FDMI_TMO;
+ if (!tmo_posted)
vport->work_port_events |= WORKER_FDMI_TMO;
- spin_unlock_irqrestore(&vport->work_port_lock, iflag);
+ spin_unlock_irqrestore(&vport->work_port_lock, iflag);
- spin_lock_irqsave(&phba->hbalock, iflag);
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
- spin_unlock_irqrestore(&phba->hbalock, iflag);
- }
- else
- spin_unlock_irqrestore(&vport->work_port_lock, iflag);
+ if (!tmo_posted)
+ lpfc_worker_wake_up(phba);
+ return;
}
void
diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c
index 886c5f1..f54e0f7 100644
--- a/drivers/scsi/lpfc/lpfc_els.c
+++ b/drivers/scsi/lpfc/lpfc_els.c
@@ -1754,29 +1754,34 @@
struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
struct lpfc_work_evt *evtp;
+ if (!(nlp->nlp_flag & NLP_DELAY_TMO))
+ return;
spin_lock_irq(shost->host_lock);
nlp->nlp_flag &= ~NLP_DELAY_TMO;
spin_unlock_irq(shost->host_lock);
del_timer_sync(&nlp->nlp_delayfunc);
nlp->nlp_last_elscmd = 0;
-
if (!list_empty(&nlp->els_retry_evt.evt_listp)) {
list_del_init(&nlp->els_retry_evt.evt_listp);
/* Decrement nlp reference count held for the delayed retry */
evtp = &nlp->els_retry_evt;
lpfc_nlp_put((struct lpfc_nodelist *)evtp->evt_arg1);
}
-
if (nlp->nlp_flag & NLP_NPR_2B_DISC) {
spin_lock_irq(shost->host_lock);
nlp->nlp_flag &= ~NLP_NPR_2B_DISC;
spin_unlock_irq(shost->host_lock);
if (vport->num_disc_nodes) {
- /* Check to see if there are more
- * PLOGIs to be sent
- */
- lpfc_more_plogi(vport);
-
+ if (vport->port_state < LPFC_VPORT_READY) {
+ /* Check if there are more ADISCs to be sent */
+ lpfc_more_adisc(vport);
+ if ((vport->num_disc_nodes == 0) &&
+ (vport->fc_npr_cnt))
+ lpfc_els_disc_plogi(vport);
+ } else {
+ /* Check if there are more PLOGIs to be sent */
+ lpfc_more_plogi(vport);
+ }
if (vport->num_disc_nodes == 0) {
spin_lock_irq(shost->host_lock);
vport->fc_flag &= ~FC_NDISC_ACTIVE;
@@ -1798,10 +1803,6 @@
unsigned long flags;
struct lpfc_work_evt *evtp = &ndlp->els_retry_evt;
- ndlp = (struct lpfc_nodelist *) ptr;
- phba = ndlp->vport->phba;
- evtp = &ndlp->els_retry_evt;
-
spin_lock_irqsave(&phba->hbalock, flags);
if (!list_empty(&evtp->evt_listp)) {
spin_unlock_irqrestore(&phba->hbalock, flags);
@@ -1812,11 +1813,11 @@
* count until the queued work is done
*/
evtp->evt_arg1 = lpfc_nlp_get(ndlp);
- evtp->evt = LPFC_EVT_ELS_RETRY;
- list_add_tail(&evtp->evt_listp, &phba->work_list);
- if (phba->work_wait)
+ if (evtp->evt_arg1) {
+ evtp->evt = LPFC_EVT_ELS_RETRY;
+ list_add_tail(&evtp->evt_listp, &phba->work_list);
lpfc_worker_wake_up(phba);
-
+ }
spin_unlock_irqrestore(&phba->hbalock, flags);
return;
}
@@ -2761,10 +2762,11 @@
npr = (PRLI *) pcmd;
vpd = &phba->vpd;
/*
- * If our firmware version is 3.20 or later,
- * set the following bits for FC-TAPE support.
+ * If the remote port is a target and our firmware version is 3.20 or
+ * later, set the following bits for FC-TAPE support.
*/
- if (vpd->rev.feaLevelHigh >= 0x02) {
+ if ((ndlp->nlp_type & NLP_FCP_TARGET) &&
+ (vpd->rev.feaLevelHigh >= 0x02)) {
npr->ConfmComplAllowed = 1;
npr->Retry = 1;
npr->TaskRetryIdReq = 1;
@@ -3056,27 +3058,16 @@
{
struct lpfc_nodelist *ndlp = NULL;
- /* Look at all nodes effected by pending RSCNs and move
- * them to NPR state.
- */
-
+ /* Move all affected nodes by pending RSCNs to NPR state. */
list_for_each_entry(ndlp, &vport->fc_nodes, nlp_listp) {
if (!NLP_CHK_NODE_ACT(ndlp) ||
- ndlp->nlp_state == NLP_STE_UNUSED_NODE ||
- lpfc_rscn_payload_check(vport, ndlp->nlp_DID) == 0)
+ (ndlp->nlp_state == NLP_STE_UNUSED_NODE) ||
+ !lpfc_rscn_payload_check(vport, ndlp->nlp_DID))
continue;
-
lpfc_disc_state_machine(vport, ndlp, NULL,
- NLP_EVT_DEVICE_RECOVERY);
-
- /*
- * Make sure NLP_DELAY_TMO is NOT running after a device
- * recovery event.
- */
- if (ndlp->nlp_flag & NLP_DELAY_TMO)
- lpfc_cancel_retry_delay_tmo(vport, ndlp);
+ NLP_EVT_DEVICE_RECOVERY);
+ lpfc_cancel_retry_delay_tmo(vport, ndlp);
}
-
return 0;
}
@@ -3781,91 +3772,27 @@
lpfc_els_rcv_fan(struct lpfc_vport *vport, struct lpfc_iocbq *cmdiocb,
struct lpfc_nodelist *fan_ndlp)
{
- struct lpfc_dmabuf *pcmd;
- uint32_t *lp;
- IOCB_t *icmd;
- uint32_t cmd, did;
- FAN *fp;
- struct lpfc_nodelist *ndlp, *next_ndlp;
struct lpfc_hba *phba = vport->phba;
+ uint32_t *lp;
+ FAN *fp;
- /* FAN received */
- lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS,
- "0265 FAN received\n");
- icmd = &cmdiocb->iocb;
- did = icmd->un.elsreq64.remoteID;
- pcmd = (struct lpfc_dmabuf *)cmdiocb->context2;
- lp = (uint32_t *)pcmd->virt;
-
- cmd = *lp++;
- fp = (FAN *) lp;
-
+ lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS, "0265 FAN received\n");
+ lp = (uint32_t *)((struct lpfc_dmabuf *)cmdiocb->context2)->virt;
+ fp = (FAN *) ++lp;
/* FAN received; Fan does not have a reply sequence */
-
- if (phba->pport->port_state == LPFC_LOCAL_CFG_LINK) {
+ if ((vport == phba->pport) &&
+ (vport->port_state == LPFC_LOCAL_CFG_LINK)) {
if ((memcmp(&phba->fc_fabparam.nodeName, &fp->FnodeName,
- sizeof(struct lpfc_name)) != 0) ||
+ sizeof(struct lpfc_name))) ||
(memcmp(&phba->fc_fabparam.portName, &fp->FportName,
- sizeof(struct lpfc_name)) != 0)) {
- /*
- * This node has switched fabrics. FLOGI is required
- * Clean up the old rpi's
- */
-
- list_for_each_entry_safe(ndlp, next_ndlp,
- &vport->fc_nodes, nlp_listp) {
- if (!NLP_CHK_NODE_ACT(ndlp))
- continue;
- if (ndlp->nlp_state != NLP_STE_NPR_NODE)
- continue;
- if (ndlp->nlp_type & NLP_FABRIC) {
- /*
- * Clean up old Fabric, Nameserver and
- * other NLP_FABRIC logins
- */
- lpfc_drop_node(vport, ndlp);
-
- } else if (!(ndlp->nlp_flag & NLP_NPR_ADISC)) {
- /* Fail outstanding I/O now since this
- * device is marked for PLOGI
- */
- lpfc_unreg_rpi(vport, ndlp);
- }
- }
-
+ sizeof(struct lpfc_name)))) {
+ /* This port has switched fabrics. FLOGI is required */
lpfc_initial_flogi(vport);
- return 0;
+ } else {
+ /* FAN verified - skip FLOGI */
+ vport->fc_myDID = vport->fc_prevDID;
+ lpfc_issue_fabric_reglogin(vport);
}
- /* Discovery not needed,
- * move the nodes to their original state.
- */
- list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes,
- nlp_listp) {
- if (!NLP_CHK_NODE_ACT(ndlp))
- continue;
- if (ndlp->nlp_state != NLP_STE_NPR_NODE)
- continue;
-
- switch (ndlp->nlp_prev_state) {
- case NLP_STE_UNMAPPED_NODE:
- ndlp->nlp_prev_state = NLP_STE_NPR_NODE;
- lpfc_nlp_set_state(vport, ndlp,
- NLP_STE_UNMAPPED_NODE);
- break;
-
- case NLP_STE_MAPPED_NODE:
- ndlp->nlp_prev_state = NLP_STE_NPR_NODE;
- lpfc_nlp_set_state(vport, ndlp,
- NLP_STE_MAPPED_NODE);
- break;
-
- default:
- break;
- }
- }
-
- /* Start discovery - this should just do CLEAR_LA */
- lpfc_disc_start(vport);
}
return 0;
}
@@ -3875,20 +3802,17 @@
{
struct lpfc_vport *vport = (struct lpfc_vport *) ptr;
struct lpfc_hba *phba = vport->phba;
+ uint32_t tmo_posted;
unsigned long iflag;
spin_lock_irqsave(&vport->work_port_lock, iflag);
- if ((vport->work_port_events & WORKER_ELS_TMO) == 0) {
+ tmo_posted = vport->work_port_events & WORKER_ELS_TMO;
+ if (!tmo_posted)
vport->work_port_events |= WORKER_ELS_TMO;
- spin_unlock_irqrestore(&vport->work_port_lock, iflag);
+ spin_unlock_irqrestore(&vport->work_port_lock, iflag);
- spin_lock_irqsave(&phba->hbalock, iflag);
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
- spin_unlock_irqrestore(&phba->hbalock, iflag);
- }
- else
- spin_unlock_irqrestore(&vport->work_port_lock, iflag);
+ if (!tmo_posted)
+ lpfc_worker_wake_up(phba);
return;
}
@@ -3933,9 +3857,6 @@
els_command == ELS_CMD_FDISC)
continue;
- if (vport != piocb->vport)
- continue;
-
if (piocb->drvrTimeout > 0) {
if (piocb->drvrTimeout >= timeout)
piocb->drvrTimeout -= timeout;
@@ -4089,7 +4010,7 @@
payload = ((struct lpfc_dmabuf *)elsiocb->context2)->virt;
cmd = *payload;
if ((phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) == 0)
- lpfc_post_buffer(phba, pring, 1, 1);
+ lpfc_post_buffer(phba, pring, 1);
did = icmd->un.rcvels.remoteID;
if (icmd->ulpStatus) {
@@ -4398,7 +4319,7 @@
phba->fc_stat.NoRcvBuf++;
/* Not enough posted buffers; Try posting more buffers */
if (!(phba->sli3_options & LPFC_SLI3_HBQ_ENABLED))
- lpfc_post_buffer(phba, pring, 0, 1);
+ lpfc_post_buffer(phba, pring, 0);
return;
}
@@ -4842,18 +4763,16 @@
struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
unsigned long iflags;
uint32_t tmo_posted;
+
spin_lock_irqsave(&phba->pport->work_port_lock, iflags);
tmo_posted = phba->pport->work_port_events & WORKER_FABRIC_BLOCK_TMO;
if (!tmo_posted)
phba->pport->work_port_events |= WORKER_FABRIC_BLOCK_TMO;
spin_unlock_irqrestore(&phba->pport->work_port_lock, iflags);
- if (!tmo_posted) {
- spin_lock_irqsave(&phba->hbalock, iflags);
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
- spin_unlock_irqrestore(&phba->hbalock, iflags);
- }
+ if (!tmo_posted)
+ lpfc_worker_wake_up(phba);
+ return;
}
static void
diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c
index 7cb68fe..a98d11b 100644
--- a/drivers/scsi/lpfc/lpfc_hbadisc.c
+++ b/drivers/scsi/lpfc/lpfc_hbadisc.c
@@ -153,11 +153,11 @@
* count until this queued work is done
*/
evtp->evt_arg1 = lpfc_nlp_get(ndlp);
- evtp->evt = LPFC_EVT_DEV_LOSS;
- list_add_tail(&evtp->evt_listp, &phba->work_list);
- if (phba->work_wait)
- wake_up(phba->work_wait);
-
+ if (evtp->evt_arg1) {
+ evtp->evt = LPFC_EVT_DEV_LOSS;
+ list_add_tail(&evtp->evt_listp, &phba->work_list);
+ lpfc_worker_wake_up(phba);
+ }
spin_unlock_irq(&phba->hbalock);
return;
@@ -276,14 +276,6 @@
lpfc_disc_state_machine(vport, ndlp, NULL, NLP_EVT_DEVICE_RM);
}
-
-void
-lpfc_worker_wake_up(struct lpfc_hba *phba)
-{
- wake_up(phba->work_wait);
- return;
-}
-
static void
lpfc_work_list_done(struct lpfc_hba *phba)
{
@@ -429,6 +421,8 @@
|| (pring->flag & LPFC_DEFERRED_RING_EVENT)) {
if (pring->flag & LPFC_STOP_IOCB_EVENT) {
pring->flag |= LPFC_DEFERRED_RING_EVENT;
+ /* Set the lpfc data pending flag */
+ set_bit(LPFC_DATA_READY, &phba->data_flags);
} else {
pring->flag &= ~LPFC_DEFERRED_RING_EVENT;
lpfc_sli_handle_slow_ring_event(phba, pring,
@@ -459,69 +453,29 @@
lpfc_work_list_done(phba);
}
-static int
-check_work_wait_done(struct lpfc_hba *phba)
-{
- struct lpfc_vport *vport;
- struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
- int rc = 0;
-
- spin_lock_irq(&phba->hbalock);
- list_for_each_entry(vport, &phba->port_list, listentry) {
- if (vport->work_port_events) {
- rc = 1;
- break;
- }
- }
- if (rc || phba->work_ha || (!list_empty(&phba->work_list)) ||
- kthread_should_stop() || pring->flag & LPFC_DEFERRED_RING_EVENT) {
- rc = 1;
- phba->work_found++;
- } else
- phba->work_found = 0;
- spin_unlock_irq(&phba->hbalock);
- return rc;
-}
-
-
int
lpfc_do_work(void *p)
{
struct lpfc_hba *phba = p;
int rc;
- DECLARE_WAIT_QUEUE_HEAD_ONSTACK(work_waitq);
set_user_nice(current, -20);
- phba->work_wait = &work_waitq;
- phba->work_found = 0;
+ phba->data_flags = 0;
while (1) {
-
- rc = wait_event_interruptible(work_waitq,
- check_work_wait_done(phba));
-
+ /* wait and check worker queue activities */
+ rc = wait_event_interruptible(phba->work_waitq,
+ (test_and_clear_bit(LPFC_DATA_READY,
+ &phba->data_flags)
+ || kthread_should_stop()));
BUG_ON(rc);
if (kthread_should_stop())
break;
+ /* Attend pending lpfc data processing */
lpfc_work_done(phba);
-
- /* If there is alot of slow ring work, like during link up
- * check_work_wait_done() may cause this thread to not give
- * up the CPU for very long periods of time. This may cause
- * soft lockups or other problems. To avoid these situations
- * give up the CPU here after LPFC_MAX_WORKER_ITERATION
- * consecutive iterations.
- */
- if (phba->work_found >= LPFC_MAX_WORKER_ITERATION) {
- phba->work_found = 0;
- schedule();
- }
}
- spin_lock_irq(&phba->hbalock);
- phba->work_wait = NULL;
- spin_unlock_irq(&phba->hbalock);
return 0;
}
@@ -551,10 +505,10 @@
spin_lock_irqsave(&phba->hbalock, flags);
list_add_tail(&evtp->evt_listp, &phba->work_list);
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
spin_unlock_irqrestore(&phba->hbalock, flags);
+ lpfc_worker_wake_up(phba);
+
return 1;
}
@@ -963,6 +917,10 @@
if (phba->fc_topology == TOPOLOGY_LOOP) {
phba->sli3_options &= ~LPFC_SLI3_NPIV_ENABLED;
+ if (phba->cfg_enable_npiv)
+ lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
+ "1309 Link Up Event npiv not supported in loop "
+ "topology\n");
/* Get Loop Map information */
if (la->il)
vport->fc_flag |= FC_LBIT;
@@ -1087,6 +1045,8 @@
MAILBOX_t *mb = &pmb->mb;
struct lpfc_dmabuf *mp = (struct lpfc_dmabuf *) (pmb->context1);
+ /* Unblock ELS traffic */
+ phba->sli.ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
/* Check for error */
if (mb->mbxStatus) {
lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
@@ -1650,7 +1610,6 @@
ndlp->nlp_DID, old_state, state);
if (old_state == NLP_STE_NPR_NODE &&
- (ndlp->nlp_flag & NLP_DELAY_TMO) != 0 &&
state != NLP_STE_NPR_NODE)
lpfc_cancel_retry_delay_tmo(vport, ndlp);
if (old_state == NLP_STE_UNMAPPED_NODE) {
@@ -1687,8 +1646,7 @@
{
struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
- if ((ndlp->nlp_flag & NLP_DELAY_TMO) != 0)
- lpfc_cancel_retry_delay_tmo(vport, ndlp);
+ lpfc_cancel_retry_delay_tmo(vport, ndlp);
if (ndlp->nlp_state && !list_empty(&ndlp->nlp_listp))
lpfc_nlp_counters(vport, ndlp->nlp_state, -1);
spin_lock_irq(shost->host_lock);
@@ -1701,8 +1659,7 @@
static void
lpfc_disable_node(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
{
- if ((ndlp->nlp_flag & NLP_DELAY_TMO) != 0)
- lpfc_cancel_retry_delay_tmo(vport, ndlp);
+ lpfc_cancel_retry_delay_tmo(vport, ndlp);
if (ndlp->nlp_state && !list_empty(&ndlp->nlp_listp))
lpfc_nlp_counters(vport, ndlp->nlp_state, -1);
lpfc_nlp_state_cleanup(vport, ndlp, ndlp->nlp_state,
@@ -2121,10 +2078,8 @@
ndlp->nlp_last_elscmd = 0;
del_timer_sync(&ndlp->nlp_delayfunc);
- if (!list_empty(&ndlp->els_retry_evt.evt_listp))
- list_del_init(&ndlp->els_retry_evt.evt_listp);
- if (!list_empty(&ndlp->dev_loss_evt.evt_listp))
- list_del_init(&ndlp->dev_loss_evt.evt_listp);
+ list_del_init(&ndlp->els_retry_evt.evt_listp);
+ list_del_init(&ndlp->dev_loss_evt.evt_listp);
lpfc_unreg_rpi(vport, ndlp);
@@ -2144,10 +2099,7 @@
LPFC_MBOXQ_t *mbox;
int rc;
- if (ndlp->nlp_flag & NLP_DELAY_TMO) {
- lpfc_cancel_retry_delay_tmo(vport, ndlp);
- }
-
+ lpfc_cancel_retry_delay_tmo(vport, ndlp);
if (ndlp->nlp_flag & NLP_DEFER_RM && !ndlp->nlp_rpi) {
/* For this case we need to cleanup the default rpi
* allocated by the firmware.
@@ -2317,8 +2269,7 @@
/* Since this node is marked for discovery,
* delay timeout is not needed.
*/
- if (ndlp->nlp_flag & NLP_DELAY_TMO)
- lpfc_cancel_retry_delay_tmo(vport, ndlp);
+ lpfc_cancel_retry_delay_tmo(vport, ndlp);
} else
ndlp = NULL;
} else {
@@ -2643,21 +2594,20 @@
{
struct lpfc_vport *vport = (struct lpfc_vport *) ptr;
struct lpfc_hba *phba = vport->phba;
+ uint32_t tmo_posted;
unsigned long flags = 0;
if (unlikely(!phba))
return;
- if ((vport->work_port_events & WORKER_DISC_TMO) == 0) {
- spin_lock_irqsave(&vport->work_port_lock, flags);
+ spin_lock_irqsave(&vport->work_port_lock, flags);
+ tmo_posted = vport->work_port_events & WORKER_DISC_TMO;
+ if (!tmo_posted)
vport->work_port_events |= WORKER_DISC_TMO;
- spin_unlock_irqrestore(&vport->work_port_lock, flags);
+ spin_unlock_irqrestore(&vport->work_port_lock, flags);
- spin_lock_irqsave(&phba->hbalock, flags);
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
- spin_unlock_irqrestore(&phba->hbalock, flags);
- }
+ if (!tmo_posted)
+ lpfc_worker_wake_up(phba);
return;
}
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index fa757b2..5b6e539 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -145,8 +145,10 @@
return -ERESTART;
}
- if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp)
+ if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
+ mempool_free(pmb, phba->mbox_mem_pool);
return -EINVAL;
+ }
/* Save information as VPD data */
vp->rev.rBit = 1;
@@ -551,18 +553,18 @@
lpfc_hb_timeout(unsigned long ptr)
{
struct lpfc_hba *phba;
+ uint32_t tmo_posted;
unsigned long iflag;
phba = (struct lpfc_hba *)ptr;
spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
- if (!(phba->pport->work_port_events & WORKER_HB_TMO))
+ tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
+ if (!tmo_posted)
phba->pport->work_port_events |= WORKER_HB_TMO;
spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
- spin_lock_irqsave(&phba->hbalock, iflag);
- if (phba->work_wait)
- wake_up(phba->work_wait);
- spin_unlock_irqrestore(&phba->hbalock, iflag);
+ if (!tmo_posted)
+ lpfc_worker_wake_up(phba);
return;
}
@@ -851,6 +853,8 @@
lpfc_read_la(phba, pmb, mp);
pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
pmb->vport = vport;
+ /* Block ELS IOCBs until we have processed this mbox command */
+ phba->sli.ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
if (rc == MBX_NOT_FINISHED) {
rc = 4;
@@ -866,6 +870,7 @@
return;
lpfc_handle_latt_free_mbuf:
+ phba->sli.ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
lpfc_mbuf_free(phba, mp->virt, mp->phys);
lpfc_handle_latt_free_mp:
kfree(mp);
@@ -1194,8 +1199,7 @@
/* Returns the number of buffers NOT posted. */
/**************************************************/
int
-lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt,
- int type)
+lpfc_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
{
IOCB_t *icmd;
struct lpfc_iocbq *iocb;
@@ -1295,7 +1299,7 @@
struct lpfc_sli *psli = &phba->sli;
/* Ring 0, ELS / CT buffers */
- lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
+ lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0);
/* Ring 2 - FCP no buffers needed */
return 0;
@@ -1454,6 +1458,15 @@
lpfc_disc_state_machine(vport, ndlp, NULL,
NLP_EVT_DEVICE_RM);
+
+ /* nlp_type zero is not defined, nlp_flag zero also not defined,
+ * nlp_state is unused, this happens when
+ * an initiator has logged
+ * into us so cleanup this ndlp.
+ */
+ if ((ndlp->nlp_type == 0) && (ndlp->nlp_flag == 0) &&
+ (ndlp->nlp_state == 0))
+ lpfc_nlp_put(ndlp);
}
/* At this point, ALL ndlp's should be gone
@@ -2101,6 +2114,9 @@
phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
+ /* Initialize the wait queue head for the kernel thread */
+ init_waitqueue_head(&phba->work_waitq);
+
/* Startup the kernel thread for this host adapter. */
phba->worker_thread = kthread_run(lpfc_do_work, phba,
"lpfc_worker_%d", phba->brd_no);
diff --git a/drivers/scsi/lpfc/lpfc_nportdisc.c b/drivers/scsi/lpfc/lpfc_nportdisc.c
index d08c4c8..6688a86 100644
--- a/drivers/scsi/lpfc/lpfc_nportdisc.c
+++ b/drivers/scsi/lpfc/lpfc_nportdisc.c
@@ -235,10 +235,7 @@
(iocb->iocb_cmpl) (phba, iocb, iocb);
}
}
-
- /* If we are delaying issuing an ELS command, cancel it */
- if (ndlp->nlp_flag & NLP_DELAY_TMO)
- lpfc_cancel_retry_delay_tmo(phba->pport, ndlp);
+ lpfc_cancel_retry_delay_tmo(phba->pport, ndlp);
return 0;
}
@@ -249,7 +246,6 @@
struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
struct lpfc_hba *phba = vport->phba;
struct lpfc_dmabuf *pcmd;
- struct lpfc_work_evt *evtp;
uint32_t *lp;
IOCB_t *icmd;
struct serv_parm *sp;
@@ -425,73 +421,8 @@
ndlp, mbox);
return 1;
}
-
- /* If the remote NPort logs into us, before we can initiate
- * discovery to them, cleanup the NPort from discovery accordingly.
- */
- if (ndlp->nlp_state == NLP_STE_NPR_NODE) {
- spin_lock_irq(shost->host_lock);
- ndlp->nlp_flag &= ~NLP_DELAY_TMO;
- spin_unlock_irq(shost->host_lock);
- del_timer_sync(&ndlp->nlp_delayfunc);
- ndlp->nlp_last_elscmd = 0;
-
- if (!list_empty(&ndlp->els_retry_evt.evt_listp)) {
- list_del_init(&ndlp->els_retry_evt.evt_listp);
- /* Decrement ndlp reference count held for the
- * delayed retry
- */
- evtp = &ndlp->els_retry_evt;
- lpfc_nlp_put((struct lpfc_nodelist *)evtp->evt_arg1);
- }
-
- if (ndlp->nlp_flag & NLP_NPR_2B_DISC) {
- spin_lock_irq(shost->host_lock);
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
- spin_unlock_irq(shost->host_lock);
-
- if ((ndlp->nlp_flag & NLP_ADISC_SND) &&
- (vport->num_disc_nodes)) {
- /* Check to see if there are more
- * ADISCs to be sent
- */
- lpfc_more_adisc(vport);
-
- if ((vport->num_disc_nodes == 0) &&
- (vport->fc_npr_cnt))
- lpfc_els_disc_plogi(vport);
-
- if (vport->num_disc_nodes == 0) {
- spin_lock_irq(shost->host_lock);
- vport->fc_flag &= ~FC_NDISC_ACTIVE;
- spin_unlock_irq(shost->host_lock);
- lpfc_can_disctmo(vport);
- lpfc_end_rscn(vport);
- }
- }
- }
- } else if ((ndlp->nlp_state == NLP_STE_PLOGI_ISSUE) &&
- (ndlp->nlp_flag & NLP_NPR_2B_DISC) &&
- (vport->num_disc_nodes)) {
- spin_lock_irq(shost->host_lock);
- ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
- spin_unlock_irq(shost->host_lock);
- /* Check to see if there are more
- * PLOGIs to be sent
- */
- lpfc_more_plogi(vport);
- if (vport->num_disc_nodes == 0) {
- spin_lock_irq(shost->host_lock);
- vport->fc_flag &= ~FC_NDISC_ACTIVE;
- spin_unlock_irq(shost->host_lock);
- lpfc_can_disctmo(vport);
- lpfc_end_rscn(vport);
- }
- }
-
lpfc_els_rsp_acc(vport, ELS_CMD_PLOGI, cmdiocb, ndlp, mbox);
return 1;
-
out:
stat.un.b.lsRjtRsnCode = LSRJT_UNABLE_TPC;
stat.un.b.lsRjtRsnCodeExp = LSEXP_OUT_OF_RESOURCE;
@@ -574,7 +505,9 @@
else
lpfc_els_rsp_acc(vport, ELS_CMD_ACC, cmdiocb, ndlp, NULL);
- if (!(ndlp->nlp_type & NLP_FABRIC) ||
+ if ((!(ndlp->nlp_type & NLP_FABRIC) &&
+ ((ndlp->nlp_type & NLP_FCP_TARGET) ||
+ !(ndlp->nlp_type & NLP_FCP_INITIATOR))) ||
(ndlp->nlp_state == NLP_STE_ADISC_ISSUE)) {
/* Only try to re-login if this is NOT a Fabric Node */
mod_timer(&ndlp->nlp_delayfunc, jiffies + HZ * 1);
@@ -751,6 +684,7 @@
lpfc_rcv_plogi_plogi_issue(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
void *arg, uint32_t evt)
{
+ struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
struct lpfc_hba *phba = vport->phba;
struct lpfc_iocbq *cmdiocb = arg;
struct lpfc_dmabuf *pcmd = (struct lpfc_dmabuf *) cmdiocb->context2;
@@ -776,7 +710,22 @@
lpfc_els_rsp_reject(vport, stat.un.lsRjtError, cmdiocb, ndlp,
NULL);
} else {
- lpfc_rcv_plogi(vport, ndlp, cmdiocb);
+ if (lpfc_rcv_plogi(vport, ndlp, cmdiocb) &&
+ (ndlp->nlp_flag & NLP_NPR_2B_DISC) &&
+ (vport->num_disc_nodes)) {
+ spin_lock_irq(shost->host_lock);
+ ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
+ spin_unlock_irq(shost->host_lock);
+ /* Check if there are more PLOGIs to be sent */
+ lpfc_more_plogi(vport);
+ if (vport->num_disc_nodes == 0) {
+ spin_lock_irq(shost->host_lock);
+ vport->fc_flag &= ~FC_NDISC_ACTIVE;
+ spin_unlock_irq(shost->host_lock);
+ lpfc_can_disctmo(vport);
+ lpfc_end_rscn(vport);
+ }
+ }
} /* If our portname was less */
return ndlp->nlp_state;
@@ -1040,6 +989,7 @@
lpfc_rcv_plogi_adisc_issue(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp,
void *arg, uint32_t evt)
{
+ struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
struct lpfc_hba *phba = vport->phba;
struct lpfc_iocbq *cmdiocb;
@@ -1048,9 +998,28 @@
cmdiocb = (struct lpfc_iocbq *) arg;
- if (lpfc_rcv_plogi(vport, ndlp, cmdiocb))
- return ndlp->nlp_state;
+ if (lpfc_rcv_plogi(vport, ndlp, cmdiocb)) {
+ if (ndlp->nlp_flag & NLP_NPR_2B_DISC) {
+ spin_lock_irq(shost->host_lock);
+ ndlp->nlp_flag &= ~NLP_NPR_2B_DISC;
+ spin_unlock_irq(shost->host_lock);
+ if (vport->num_disc_nodes) {
+ lpfc_more_adisc(vport);
+ if ((vport->num_disc_nodes == 0) &&
+ (vport->fc_npr_cnt))
+ lpfc_els_disc_plogi(vport);
+ if (vport->num_disc_nodes == 0) {
+ spin_lock_irq(shost->host_lock);
+ vport->fc_flag &= ~FC_NDISC_ACTIVE;
+ spin_unlock_irq(shost->host_lock);
+ lpfc_can_disctmo(vport);
+ lpfc_end_rscn(vport);
+ }
+ }
+ }
+ return ndlp->nlp_state;
+ }
ndlp->nlp_prev_state = NLP_STE_ADISC_ISSUE;
lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
lpfc_nlp_set_state(vport, ndlp, NLP_STE_PLOGI_ISSUE);
@@ -1742,24 +1711,21 @@
struct lpfc_iocbq *cmdiocb = (struct lpfc_iocbq *) arg;
/* Ignore PLOGI if we have an outstanding LOGO */
- if (ndlp->nlp_flag & (NLP_LOGO_SND | NLP_LOGO_ACC)) {
+ if (ndlp->nlp_flag & (NLP_LOGO_SND | NLP_LOGO_ACC))
return ndlp->nlp_state;
- }
-
if (lpfc_rcv_plogi(vport, ndlp, cmdiocb)) {
+ lpfc_cancel_retry_delay_tmo(vport, ndlp);
spin_lock_irq(shost->host_lock);
- ndlp->nlp_flag &= ~NLP_NPR_ADISC;
+ ndlp->nlp_flag &= ~(NLP_NPR_ADISC | NLP_NPR_2B_DISC);
spin_unlock_irq(shost->host_lock);
- return ndlp->nlp_state;
+ } else if (!(ndlp->nlp_flag & NLP_NPR_2B_DISC)) {
+ /* send PLOGI immediately, move to PLOGI issue state */
+ if (!(ndlp->nlp_flag & NLP_DELAY_TMO)) {
+ ndlp->nlp_prev_state = NLP_STE_NPR_NODE;
+ lpfc_nlp_set_state(vport, ndlp, NLP_STE_PLOGI_ISSUE);
+ lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
+ }
}
-
- /* send PLOGI immediately, move to PLOGI issue state */
- if (!(ndlp->nlp_flag & NLP_DELAY_TMO)) {
- ndlp->nlp_prev_state = NLP_STE_NPR_NODE;
- lpfc_nlp_set_state(vport, ndlp, NLP_STE_PLOGI_ISSUE);
- lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0);
- }
-
return ndlp->nlp_state;
}
@@ -1810,7 +1776,6 @@
struct lpfc_iocbq *cmdiocb = (struct lpfc_iocbq *) arg;
lpfc_rcv_padisc(vport, ndlp, cmdiocb);
-
/*
* Do not start discovery if discovery is about to start
* or discovery in progress for this node. Starting discovery
@@ -1973,9 +1938,7 @@
spin_lock_irq(shost->host_lock);
ndlp->nlp_flag &= ~(NLP_NODEV_REMOVE | NLP_NPR_2B_DISC);
spin_unlock_irq(shost->host_lock);
- if (ndlp->nlp_flag & NLP_DELAY_TMO) {
- lpfc_cancel_retry_delay_tmo(vport, ndlp);
- }
+ lpfc_cancel_retry_delay_tmo(vport, ndlp);
return ndlp->nlp_state;
}
diff --git a/drivers/scsi/lpfc/lpfc_scsi.c b/drivers/scsi/lpfc/lpfc_scsi.c
index 0910a9a..c94da4f 100644
--- a/drivers/scsi/lpfc/lpfc_scsi.c
+++ b/drivers/scsi/lpfc/lpfc_scsi.c
@@ -50,6 +50,7 @@
lpfc_adjust_queue_depth(struct lpfc_hba *phba)
{
unsigned long flags;
+ uint32_t evt_posted;
spin_lock_irqsave(&phba->hbalock, flags);
atomic_inc(&phba->num_rsrc_err);
@@ -65,17 +66,13 @@
spin_unlock_irqrestore(&phba->hbalock, flags);
spin_lock_irqsave(&phba->pport->work_port_lock, flags);
- if ((phba->pport->work_port_events &
- WORKER_RAMP_DOWN_QUEUE) == 0) {
+ evt_posted = phba->pport->work_port_events & WORKER_RAMP_DOWN_QUEUE;
+ if (!evt_posted)
phba->pport->work_port_events |= WORKER_RAMP_DOWN_QUEUE;
- }
spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
- spin_lock_irqsave(&phba->hbalock, flags);
- if (phba->work_wait)
- wake_up(phba->work_wait);
- spin_unlock_irqrestore(&phba->hbalock, flags);
-
+ if (!evt_posted)
+ lpfc_worker_wake_up(phba);
return;
}
@@ -89,6 +86,7 @@
{
unsigned long flags;
struct lpfc_hba *phba = vport->phba;
+ uint32_t evt_posted;
atomic_inc(&phba->num_cmd_success);
if (vport->cfg_lun_queue_depth <= sdev->queue_depth)
@@ -103,16 +101,14 @@
spin_unlock_irqrestore(&phba->hbalock, flags);
spin_lock_irqsave(&phba->pport->work_port_lock, flags);
- if ((phba->pport->work_port_events &
- WORKER_RAMP_UP_QUEUE) == 0) {
+ evt_posted = phba->pport->work_port_events & WORKER_RAMP_UP_QUEUE;
+ if (!evt_posted)
phba->pport->work_port_events |= WORKER_RAMP_UP_QUEUE;
- }
spin_unlock_irqrestore(&phba->pport->work_port_lock, flags);
- spin_lock_irqsave(&phba->hbalock, flags);
- if (phba->work_wait)
- wake_up(phba->work_wait);
- spin_unlock_irqrestore(&phba->hbalock, flags);
+ if (!evt_posted)
+ lpfc_worker_wake_up(phba);
+ return;
}
void
@@ -609,9 +605,6 @@
result = cmd->result;
sdev = cmd->device;
lpfc_scsi_unprep_dma_buf(phba, lpfc_cmd);
- spin_lock_irqsave(sdev->host->host_lock, flags);
- lpfc_cmd->pCmd = NULL; /* This must be done before scsi_done */
- spin_unlock_irqrestore(sdev->host->host_lock, flags);
cmd->scsi_done(cmd);
if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
@@ -620,6 +613,7 @@
* wake up the thread.
*/
spin_lock_irqsave(sdev->host->host_lock, flags);
+ lpfc_cmd->pCmd = NULL;
if (lpfc_cmd->waitq)
wake_up(lpfc_cmd->waitq);
spin_unlock_irqrestore(sdev->host->host_lock, flags);
@@ -690,6 +684,7 @@
* wake up the thread.
*/
spin_lock_irqsave(sdev->host->host_lock, flags);
+ lpfc_cmd->pCmd = NULL;
if (lpfc_cmd->waitq)
wake_up(lpfc_cmd->waitq);
spin_unlock_irqrestore(sdev->host->host_lock, flags);
@@ -849,14 +844,15 @@
struct lpfc_iocbq *iocbq;
struct lpfc_iocbq *iocbqrsp;
int ret;
+ int status;
if (!rdata->pnode || !NLP_CHK_NODE_ACT(rdata->pnode))
return FAILED;
lpfc_cmd->rdata = rdata;
- ret = lpfc_scsi_prep_task_mgmt_cmd(vport, lpfc_cmd, lun,
+ status = lpfc_scsi_prep_task_mgmt_cmd(vport, lpfc_cmd, lun,
FCP_TARGET_RESET);
- if (!ret)
+ if (!status)
return FAILED;
iocbq = &lpfc_cmd->cur_iocbq;
@@ -869,12 +865,15 @@
lpfc_printf_vlog(vport, KERN_INFO, LOG_FCP,
"0702 Issue Target Reset to TGT %d Data: x%x x%x\n",
tgt_id, rdata->pnode->nlp_rpi, rdata->pnode->nlp_flag);
- ret = lpfc_sli_issue_iocb_wait(phba,
+ status = lpfc_sli_issue_iocb_wait(phba,
&phba->sli.ring[phba->sli.fcp_ring],
iocbq, iocbqrsp, lpfc_cmd->timeout);
- if (ret != IOCB_SUCCESS) {
- if (ret == IOCB_TIMEDOUT)
+ if (status != IOCB_SUCCESS) {
+ if (status == IOCB_TIMEDOUT) {
iocbq->iocb_cmpl = lpfc_tskmgmt_def_cmpl;
+ ret = TIMEOUT_ERROR;
+ } else
+ ret = FAILED;
lpfc_cmd->status = IOSTAT_DRIVER_REJECT;
} else {
ret = SUCCESS;
@@ -1142,121 +1141,96 @@
struct lpfc_iocbq *iocbq, *iocbqrsp;
struct lpfc_rport_data *rdata = cmnd->device->hostdata;
struct lpfc_nodelist *pnode = rdata->pnode;
- uint32_t cmd_result = 0, cmd_status = 0;
- int ret = FAILED;
- int iocb_status = IOCB_SUCCESS;
- int cnt, loopcnt;
+ unsigned long later;
+ int ret = SUCCESS;
+ int status;
+ int cnt;
lpfc_block_error_handler(cmnd);
- loopcnt = 0;
/*
* If target is not in a MAPPED state, delay the reset until
* target is rediscovered or devloss timeout expires.
*/
- while (1) {
+ later = msecs_to_jiffies(2 * vport->cfg_devloss_tmo * 1000) + jiffies;
+ while (time_after(later, jiffies)) {
if (!pnode || !NLP_CHK_NODE_ACT(pnode))
- goto out;
-
- if (pnode->nlp_state != NLP_STE_MAPPED_NODE) {
- schedule_timeout_uninterruptible(msecs_to_jiffies(500));
- loopcnt++;
- rdata = cmnd->device->hostdata;
- if (!rdata ||
- (loopcnt > ((vport->cfg_devloss_tmo * 2) + 1))){
- lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
- "0721 LUN Reset rport "
- "failure: cnt x%x rdata x%p\n",
- loopcnt, rdata);
- goto out;
- }
- pnode = rdata->pnode;
- if (!pnode || !NLP_CHK_NODE_ACT(pnode))
- goto out;
- }
+ return FAILED;
if (pnode->nlp_state == NLP_STE_MAPPED_NODE)
break;
+ schedule_timeout_uninterruptible(msecs_to_jiffies(500));
+ rdata = cmnd->device->hostdata;
+ if (!rdata)
+ break;
+ pnode = rdata->pnode;
}
-
+ if (!rdata || pnode->nlp_state != NLP_STE_MAPPED_NODE) {
+ lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
+ "0721 LUN Reset rport "
+ "failure: msec x%x rdata x%p\n",
+ jiffies_to_msecs(jiffies - later), rdata);
+ return FAILED;
+ }
lpfc_cmd = lpfc_get_scsi_buf(phba);
if (lpfc_cmd == NULL)
- goto out;
-
+ return FAILED;
lpfc_cmd->timeout = 60;
lpfc_cmd->rdata = rdata;
- ret = lpfc_scsi_prep_task_mgmt_cmd(vport, lpfc_cmd, cmnd->device->lun,
- FCP_TARGET_RESET);
- if (!ret)
- goto out_free_scsi_buf;
-
+ status = lpfc_scsi_prep_task_mgmt_cmd(vport, lpfc_cmd,
+ cmnd->device->lun,
+ FCP_TARGET_RESET);
+ if (!status) {
+ lpfc_release_scsi_buf(phba, lpfc_cmd);
+ return FAILED;
+ }
iocbq = &lpfc_cmd->cur_iocbq;
/* get a buffer for this IOCB command response */
iocbqrsp = lpfc_sli_get_iocbq(phba);
- if (iocbqrsp == NULL)
- goto out_free_scsi_buf;
-
+ if (iocbqrsp == NULL) {
+ lpfc_release_scsi_buf(phba, lpfc_cmd);
+ return FAILED;
+ }
lpfc_printf_vlog(vport, KERN_INFO, LOG_FCP,
"0703 Issue target reset to TGT %d LUN %d "
"rpi x%x nlp_flag x%x\n", cmnd->device->id,
cmnd->device->lun, pnode->nlp_rpi, pnode->nlp_flag);
- iocb_status = lpfc_sli_issue_iocb_wait(phba,
- &phba->sli.ring[phba->sli.fcp_ring],
- iocbq, iocbqrsp, lpfc_cmd->timeout);
-
- if (iocb_status == IOCB_TIMEDOUT)
+ status = lpfc_sli_issue_iocb_wait(phba,
+ &phba->sli.ring[phba->sli.fcp_ring],
+ iocbq, iocbqrsp, lpfc_cmd->timeout);
+ if (status == IOCB_TIMEDOUT) {
iocbq->iocb_cmpl = lpfc_tskmgmt_def_cmpl;
-
- if (iocb_status == IOCB_SUCCESS)
- ret = SUCCESS;
- else
- ret = iocb_status;
-
- cmd_result = iocbqrsp->iocb.un.ulpWord[4];
- cmd_status = iocbqrsp->iocb.ulpStatus;
-
- lpfc_sli_release_iocbq(phba, iocbqrsp);
-
- /*
- * All outstanding txcmplq I/Os should have been aborted by the device.
- * Unfortunately, some targets do not abide by this forcing the driver
- * to double check.
- */
- cnt = lpfc_sli_sum_iocb(vport, cmnd->device->id, cmnd->device->lun,
- LPFC_CTX_LUN);
- if (cnt)
- lpfc_sli_abort_iocb(vport, &phba->sli.ring[phba->sli.fcp_ring],
- cmnd->device->id, cmnd->device->lun,
- LPFC_CTX_LUN);
- loopcnt = 0;
- while(cnt) {
- schedule_timeout_uninterruptible(LPFC_RESET_WAIT*HZ);
-
- if (++loopcnt
- > (2 * vport->cfg_devloss_tmo)/LPFC_RESET_WAIT)
- break;
-
- cnt = lpfc_sli_sum_iocb(vport, cmnd->device->id,
- cmnd->device->lun, LPFC_CTX_LUN);
- }
-
- if (cnt) {
- lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
- "0719 device reset I/O flush failure: "
- "cnt x%x\n", cnt);
- ret = FAILED;
- }
-
-out_free_scsi_buf:
- if (iocb_status != IOCB_TIMEDOUT) {
+ ret = TIMEOUT_ERROR;
+ } else {
+ if (status != IOCB_SUCCESS)
+ ret = FAILED;
lpfc_release_scsi_buf(phba, lpfc_cmd);
}
lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
"0713 SCSI layer issued device reset (%d, %d) "
"return x%x status x%x result x%x\n",
cmnd->device->id, cmnd->device->lun, ret,
- cmd_status, cmd_result);
-out:
+ iocbqrsp->iocb.ulpStatus,
+ iocbqrsp->iocb.un.ulpWord[4]);
+ lpfc_sli_release_iocbq(phba, iocbqrsp);
+ cnt = lpfc_sli_sum_iocb(vport, cmnd->device->id, cmnd->device->lun,
+ LPFC_CTX_TGT);
+ if (cnt)
+ lpfc_sli_abort_iocb(vport, &phba->sli.ring[phba->sli.fcp_ring],
+ cmnd->device->id, cmnd->device->lun,
+ LPFC_CTX_TGT);
+ later = msecs_to_jiffies(2 * vport->cfg_devloss_tmo * 1000) + jiffies;
+ while (time_after(later, jiffies) && cnt) {
+ schedule_timeout_uninterruptible(msecs_to_jiffies(20));
+ cnt = lpfc_sli_sum_iocb(vport, cmnd->device->id,
+ cmnd->device->lun, LPFC_CTX_TGT);
+ }
+ if (cnt) {
+ lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
+ "0719 device reset I/O flush failure: "
+ "cnt x%x\n", cnt);
+ ret = FAILED;
+ }
return ret;
}
@@ -1268,19 +1242,12 @@
struct lpfc_hba *phba = vport->phba;
struct lpfc_nodelist *ndlp = NULL;
int match;
- int ret = FAILED, i, err_count = 0;
- int cnt, loopcnt;
+ int ret = SUCCESS, status, i;
+ int cnt;
struct lpfc_scsi_buf * lpfc_cmd;
+ unsigned long later;
lpfc_block_error_handler(cmnd);
-
- lpfc_cmd = lpfc_get_scsi_buf(phba);
- if (lpfc_cmd == NULL)
- goto out;
-
- /* The lpfc_cmd storage is reused. Set all loop invariants. */
- lpfc_cmd->timeout = 60;
-
/*
* Since the driver manages a single bus device, reset all
* targets known to the driver. Should any target reset
@@ -1294,7 +1261,7 @@
if (!NLP_CHK_NODE_ACT(ndlp))
continue;
if (ndlp->nlp_state == NLP_STE_MAPPED_NODE &&
- i == ndlp->nlp_sid &&
+ ndlp->nlp_sid == i &&
ndlp->rport) {
match = 1;
break;
@@ -1303,27 +1270,22 @@
spin_unlock_irq(shost->host_lock);
if (!match)
continue;
-
- ret = lpfc_scsi_tgt_reset(lpfc_cmd, vport, i,
- cmnd->device->lun,
- ndlp->rport->dd_data);
- if (ret != SUCCESS) {
+ lpfc_cmd = lpfc_get_scsi_buf(phba);
+ if (lpfc_cmd) {
+ lpfc_cmd->timeout = 60;
+ status = lpfc_scsi_tgt_reset(lpfc_cmd, vport, i,
+ cmnd->device->lun,
+ ndlp->rport->dd_data);
+ if (status != TIMEOUT_ERROR)
+ lpfc_release_scsi_buf(phba, lpfc_cmd);
+ }
+ if (!lpfc_cmd || status != SUCCESS) {
lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
"0700 Bus Reset on target %d failed\n",
i);
- err_count++;
- break;
+ ret = FAILED;
}
}
-
- if (ret != IOCB_TIMEDOUT)
- lpfc_release_scsi_buf(phba, lpfc_cmd);
-
- if (err_count == 0)
- ret = SUCCESS;
- else
- ret = FAILED;
-
/*
* All outstanding txcmplq I/Os should have been aborted by
* the targets. Unfortunately, some targets do not abide by
@@ -1333,27 +1295,19 @@
if (cnt)
lpfc_sli_abort_iocb(vport, &phba->sli.ring[phba->sli.fcp_ring],
0, 0, LPFC_CTX_HOST);
- loopcnt = 0;
- while(cnt) {
- schedule_timeout_uninterruptible(LPFC_RESET_WAIT*HZ);
-
- if (++loopcnt
- > (2 * vport->cfg_devloss_tmo)/LPFC_RESET_WAIT)
- break;
-
+ later = msecs_to_jiffies(2 * vport->cfg_devloss_tmo * 1000) + jiffies;
+ while (time_after(later, jiffies) && cnt) {
+ schedule_timeout_uninterruptible(msecs_to_jiffies(20));
cnt = lpfc_sli_sum_iocb(vport, 0, 0, LPFC_CTX_HOST);
}
-
if (cnt) {
lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
"0715 Bus Reset I/O flush failure: "
"cnt x%x left x%x\n", cnt, i);
ret = FAILED;
}
-
lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP,
"0714 SCSI layer issued Bus Reset Data: x%x\n", ret);
-out:
return ret;
}
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index 70a0a9e..f40aa7b 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -324,9 +324,7 @@
phba->work_ha |= HA_ERATT;
phba->work_hs = HS_FFER3;
- /* hbalock should already be held */
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
+ lpfc_worker_wake_up(phba);
return NULL;
}
@@ -1309,9 +1307,7 @@
phba->work_ha |= HA_ERATT;
phba->work_hs = HS_FFER3;
- /* hbalock should already be held */
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
+ lpfc_worker_wake_up(phba);
return;
}
@@ -2611,12 +2607,9 @@
phba->pport->work_port_events |= WORKER_MBOX_TMO;
spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
- if (!tmo_posted) {
- spin_lock_irqsave(&phba->hbalock, iflag);
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
- spin_unlock_irqrestore(&phba->hbalock, iflag);
- }
+ if (!tmo_posted)
+ lpfc_worker_wake_up(phba);
+ return;
}
void
@@ -3374,8 +3367,12 @@
for (i = 0; i < psli->num_rings; i++) {
pring = &psli->ring[i];
prev_pring_flag = pring->flag;
- if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
+ /* Only slow rings */
+ if (pring->ringno == LPFC_ELS_RING) {
pring->flag |= LPFC_DEFERRED_RING_EVENT;
+ /* Set the lpfc data pending flag */
+ set_bit(LPFC_DATA_READY, &phba->data_flags);
+ }
/*
* Error everything on the txq since these iocbs have not been
* given to the FW yet.
@@ -3434,8 +3431,12 @@
spin_lock_irqsave(&phba->hbalock, flags);
for (i = 0; i < psli->num_rings; i++) {
pring = &psli->ring[i];
- if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
+ /* Only slow rings */
+ if (pring->ringno == LPFC_ELS_RING) {
pring->flag |= LPFC_DEFERRED_RING_EVENT;
+ /* Set the lpfc data pending flag */
+ set_bit(LPFC_DATA_READY, &phba->data_flags);
+ }
/*
* Error everything on the txq since these iocbs have not been
@@ -3762,7 +3763,6 @@
lpfc_ctx_cmd ctx_cmd)
{
struct lpfc_scsi_buf *lpfc_cmd;
- struct scsi_cmnd *cmnd;
int rc = 1;
if (!(iocbq->iocb_flag & LPFC_IO_FCP))
@@ -3772,19 +3772,20 @@
return rc;
lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
- cmnd = lpfc_cmd->pCmd;
- if (cmnd == NULL)
+ if (lpfc_cmd->pCmd == NULL)
return rc;
switch (ctx_cmd) {
case LPFC_CTX_LUN:
- if ((cmnd->device->id == tgt_id) &&
- (cmnd->device->lun == lun_id))
+ if ((lpfc_cmd->rdata->pnode) &&
+ (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id) &&
+ (scsilun_to_int(&lpfc_cmd->fcp_cmnd->fcp_lun) == lun_id))
rc = 0;
break;
case LPFC_CTX_TGT:
- if (cmnd->device->id == tgt_id)
+ if ((lpfc_cmd->rdata->pnode) &&
+ (lpfc_cmd->rdata->pnode->nlp_sid == tgt_id))
rc = 0;
break;
case LPFC_CTX_HOST:
@@ -3994,6 +3995,7 @@
if (pmboxq->context1)
return MBX_NOT_FINISHED;
+ pmboxq->mbox_flag &= ~LPFC_MBX_WAKE;
/* setup wake call as IOCB callback */
pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
/* setup context field to pass wait_queue pointer to wake function */
@@ -4159,7 +4161,7 @@
"pwork:x%x hawork:x%x wait:x%x",
phba->work_ha, work_ha_copy,
(uint32_t)((unsigned long)
- phba->work_wait));
+ &phba->work_waitq));
control &=
~(HC_R0INT_ENA << LPFC_ELS_RING);
@@ -4172,7 +4174,7 @@
"x%x hawork:x%x wait:x%x",
phba->work_ha, work_ha_copy,
(uint32_t)((unsigned long)
- phba->work_wait));
+ &phba->work_waitq));
}
spin_unlock(&phba->hbalock);
}
@@ -4297,9 +4299,8 @@
spin_lock(&phba->hbalock);
phba->work_ha |= work_ha_copy;
- if (phba->work_wait)
- lpfc_worker_wake_up(phba);
spin_unlock(&phba->hbalock);
+ lpfc_worker_wake_up(phba);
}
ha_copy &= ~(phba->work_ha_mask);
diff --git a/drivers/scsi/lpfc/lpfc_version.h b/drivers/scsi/lpfc/lpfc_version.h
index b22b893..ad24cac 100644
--- a/drivers/scsi/lpfc/lpfc_version.h
+++ b/drivers/scsi/lpfc/lpfc_version.h
@@ -18,7 +18,7 @@
* included with this package. *
*******************************************************************/
-#define LPFC_DRIVER_VERSION "8.2.6"
+#define LPFC_DRIVER_VERSION "8.2.7"
#define LPFC_DRIVER_NAME "lpfc"
diff --git a/drivers/scsi/lpfc/lpfc_vport.c b/drivers/scsi/lpfc/lpfc_vport.c
index 6feaf59..109f89d 100644
--- a/drivers/scsi/lpfc/lpfc_vport.c
+++ b/drivers/scsi/lpfc/lpfc_vport.c
@@ -216,6 +216,7 @@
int vpi;
int rc = VPORT_ERROR;
int status;
+ int size;
if ((phba->sli_rev < 3) ||
!(phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)) {
@@ -278,7 +279,20 @@
memcpy(vport->fc_portname.u.wwn, vport->fc_sparam.portName.u.wwn, 8);
memcpy(vport->fc_nodename.u.wwn, vport->fc_sparam.nodeName.u.wwn, 8);
-
+ size = strnlen(fc_vport->symbolic_name, LPFC_VNAME_LEN);
+ if (size) {
+ vport->vname = kzalloc(size+1, GFP_KERNEL);
+ if (!vport->vname) {
+ lpfc_printf_vlog(vport, KERN_ERR, LOG_VPORT,
+ "1814 Create VPORT failed. "
+ "vname allocation failed.\n");
+ rc = VPORT_ERROR;
+ lpfc_free_vpi(phba, vpi);
+ destroy_port(vport);
+ goto error_out;
+ }
+ memcpy(vport->vname, fc_vport->symbolic_name, size+1);
+ }
if (fc_vport->node_name != 0)
u64_to_wwn(fc_vport->node_name, vport->fc_nodename.u.wwn);
if (fc_vport->port_name != 0)
diff --git a/drivers/scsi/mesh.c b/drivers/scsi/mesh.c
index fd63b06..11aa917 100644
--- a/drivers/scsi/mesh.c
+++ b/drivers/scsi/mesh.c
@@ -1765,7 +1765,7 @@
default:
return 0;
}
- if (mesg.event == mdev->ofdev.dev.power.power_state.event)
+ if (ms->phase == sleeping)
return 0;
scsi_block_requests(ms->host);
@@ -1780,8 +1780,6 @@
disable_irq(ms->meshintr);
set_mesh_power(ms, 0);
- mdev->ofdev.dev.power.power_state = mesg;
-
return 0;
}
@@ -1790,7 +1788,7 @@
struct mesh_state *ms = (struct mesh_state *)macio_get_drvdata(mdev);
unsigned long flags;
- if (mdev->ofdev.dev.power.power_state.event == PM_EVENT_ON)
+ if (ms->phase != sleeping)
return 0;
set_mesh_power(ms, 1);
@@ -1801,8 +1799,6 @@
enable_irq(ms->meshintr);
scsi_unblock_requests(ms->host);
- mdev->ofdev.dev.power.power_state.event = PM_EVENT_ON;
-
return 0;
}
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c
index 0c78694..5822dd5 100644
--- a/drivers/scsi/qla4xxx/ql4_os.c
+++ b/drivers/scsi/qla4xxx/ql4_os.c
@@ -113,9 +113,6 @@
.host_param_mask = ISCSI_HOST_HWADDRESS |
ISCSI_HOST_IPADDRESS |
ISCSI_HOST_INITIATOR_NAME,
- .sessiondata_size = sizeof(struct ddb_entry),
- .host_template = &qla4xxx_driver_template,
-
.tgt_dscvr = qla4xxx_tgt_dscvr,
.get_conn_param = qla4xxx_conn_get_param,
.get_session_param = qla4xxx_sess_get_param,
@@ -275,7 +272,7 @@
return err;
}
- ddb_entry->conn = iscsi_create_conn(ddb_entry->sess, 0);
+ ddb_entry->conn = iscsi_create_conn(ddb_entry->sess, 0, 0);
if (!ddb_entry->conn) {
iscsi_remove_session(ddb_entry->sess);
DEBUG2(printk(KERN_ERR "Could not add connection.\n"));
@@ -292,7 +289,8 @@
struct ddb_entry *ddb_entry;
struct iscsi_cls_session *sess;
- sess = iscsi_alloc_session(ha->host, &qla4xxx_iscsi_transport);
+ sess = iscsi_alloc_session(ha->host, &qla4xxx_iscsi_transport,
+ sizeof(struct ddb_entry));
if (!sess)
return NULL;
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 110e776..36c92f9 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -855,9 +855,18 @@
good_bytes = scsi_bufflen(cmd);
if (cmd->request->cmd_type != REQ_TYPE_BLOCK_PC) {
+ int old_good_bytes = good_bytes;
drv = scsi_cmd_to_driver(cmd);
if (drv->done)
good_bytes = drv->done(cmd);
+ /*
+ * USB may not give sense identifying bad sector and
+ * simply return a residue instead, so subtract off the
+ * residue if drv->done() error processing indicates no
+ * change to the completion length.
+ */
+ if (good_bytes == old_good_bytes)
+ good_bytes -= scsi_get_resid(cmd);
}
scsi_io_completion(cmd, good_bytes);
}
diff --git a/drivers/scsi/scsi_debug.c b/drivers/scsi/scsi_debug.c
index f6600bf..01d11a0 100644
--- a/drivers/scsi/scsi_debug.c
+++ b/drivers/scsi/scsi_debug.c
@@ -94,6 +94,7 @@
#define DEF_VIRTUAL_GB 0
#define DEF_FAKE_RW 0
#define DEF_VPD_USE_HOSTNO 1
+#define DEF_SECTOR_SIZE 512
/* bit mask values for scsi_debug_opts */
#define SCSI_DEBUG_OPT_NOISE 1
@@ -142,6 +143,7 @@
static int scsi_debug_virtual_gb = DEF_VIRTUAL_GB;
static int scsi_debug_fake_rw = DEF_FAKE_RW;
static int scsi_debug_vpd_use_hostno = DEF_VPD_USE_HOSTNO;
+static int scsi_debug_sector_size = DEF_SECTOR_SIZE;
static int scsi_debug_cmnd_count = 0;
@@ -157,11 +159,6 @@
static int sdebug_cylinders_per; /* cylinders per surface */
static int sdebug_sectors_per; /* sectors per cylinder */
-/* default sector size is 512 bytes, 2**9 bytes */
-#define POW2_SECT_SIZE 9
-#define SECT_SIZE (1 << POW2_SECT_SIZE)
-#define SECT_SIZE_PER(TGT) SECT_SIZE
-
#define SDEBUG_MAX_PARTS 4
#define SDEBUG_SENSE_LEN 32
@@ -646,6 +643,14 @@
return sizeof(vpdb0_data);
}
+static int inquiry_evpd_b1(unsigned char *arr)
+{
+ memset(arr, 0, 0x3c);
+ arr[0] = 0;
+ arr[1] = 1;
+
+ return 0x3c;
+}
#define SDEBUG_LONG_INQ_SZ 96
#define SDEBUG_MAX_INQ_ARR_SZ 584
@@ -701,6 +706,7 @@
arr[n++] = 0x88; /* SCSI ports */
arr[n++] = 0x89; /* ATA information */
arr[n++] = 0xb0; /* Block limits (SBC) */
+ arr[n++] = 0xb1; /* Block characteristics (SBC) */
arr[3] = n - 4; /* number of supported VPD pages */
} else if (0x80 == cmd[2]) { /* unit serial number */
arr[1] = cmd[2]; /*sanity */
@@ -740,6 +746,9 @@
} else if (0xb0 == cmd[2]) { /* Block limits (SBC) */
arr[1] = cmd[2]; /*sanity */
arr[3] = inquiry_evpd_b0(&arr[4]);
+ } else if (0xb1 == cmd[2]) { /* Block characteristics (SBC) */
+ arr[1] = cmd[2]; /*sanity */
+ arr[3] = inquiry_evpd_b1(&arr[4]);
} else {
/* Illegal request, invalid field in cdb */
mk_sense_buffer(devip, ILLEGAL_REQUEST,
@@ -878,8 +887,8 @@
arr[2] = 0xff;
arr[3] = 0xff;
}
- arr[6] = (SECT_SIZE_PER(target) >> 8) & 0xff;
- arr[7] = SECT_SIZE_PER(target) & 0xff;
+ arr[6] = (scsi_debug_sector_size >> 8) & 0xff;
+ arr[7] = scsi_debug_sector_size & 0xff;
return fill_from_dev_buffer(scp, arr, SDEBUG_READCAP_ARR_SZ);
}
@@ -902,10 +911,10 @@
capac = sdebug_capacity - 1;
for (k = 0; k < 8; ++k, capac >>= 8)
arr[7 - k] = capac & 0xff;
- arr[8] = (SECT_SIZE_PER(target) >> 24) & 0xff;
- arr[9] = (SECT_SIZE_PER(target) >> 16) & 0xff;
- arr[10] = (SECT_SIZE_PER(target) >> 8) & 0xff;
- arr[11] = SECT_SIZE_PER(target) & 0xff;
+ arr[8] = (scsi_debug_sector_size >> 24) & 0xff;
+ arr[9] = (scsi_debug_sector_size >> 16) & 0xff;
+ arr[10] = (scsi_debug_sector_size >> 8) & 0xff;
+ arr[11] = scsi_debug_sector_size & 0xff;
return fill_from_dev_buffer(scp, arr,
min(alloc_len, SDEBUG_READCAP16_ARR_SZ));
}
@@ -1019,20 +1028,20 @@
static int resp_format_pg(unsigned char * p, int pcontrol, int target)
{ /* Format device page for mode_sense */
- unsigned char format_pg[] = {0x3, 0x16, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0x40, 0, 0, 0};
+ unsigned char format_pg[] = {0x3, 0x16, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0x40, 0, 0, 0};
- memcpy(p, format_pg, sizeof(format_pg));
- p[10] = (sdebug_sectors_per >> 8) & 0xff;
- p[11] = sdebug_sectors_per & 0xff;
- p[12] = (SECT_SIZE >> 8) & 0xff;
- p[13] = SECT_SIZE & 0xff;
- if (DEV_REMOVEABLE(target))
- p[20] |= 0x20; /* should agree with INQUIRY */
- if (1 == pcontrol)
- memset(p + 2, 0, sizeof(format_pg) - 2);
- return sizeof(format_pg);
+ memcpy(p, format_pg, sizeof(format_pg));
+ p[10] = (sdebug_sectors_per >> 8) & 0xff;
+ p[11] = sdebug_sectors_per & 0xff;
+ p[12] = (scsi_debug_sector_size >> 8) & 0xff;
+ p[13] = scsi_debug_sector_size & 0xff;
+ if (DEV_REMOVEABLE(target))
+ p[20] |= 0x20; /* should agree with INQUIRY */
+ if (1 == pcontrol)
+ memset(p + 2, 0, sizeof(format_pg) - 2);
+ return sizeof(format_pg);
}
static int resp_caching_pg(unsigned char * p, int pcontrol, int target)
@@ -1206,8 +1215,8 @@
ap[2] = (sdebug_capacity >> 8) & 0xff;
ap[3] = sdebug_capacity & 0xff;
}
- ap[6] = (SECT_SIZE_PER(target) >> 8) & 0xff;
- ap[7] = SECT_SIZE_PER(target) & 0xff;
+ ap[6] = (scsi_debug_sector_size >> 8) & 0xff;
+ ap[7] = scsi_debug_sector_size & 0xff;
offset += bd_len;
ap = arr + offset;
} else if (16 == bd_len) {
@@ -1215,10 +1224,10 @@
for (k = 0; k < 8; ++k, capac >>= 8)
ap[7 - k] = capac & 0xff;
- ap[12] = (SECT_SIZE_PER(target) >> 24) & 0xff;
- ap[13] = (SECT_SIZE_PER(target) >> 16) & 0xff;
- ap[14] = (SECT_SIZE_PER(target) >> 8) & 0xff;
- ap[15] = SECT_SIZE_PER(target) & 0xff;
+ ap[12] = (scsi_debug_sector_size >> 24) & 0xff;
+ ap[13] = (scsi_debug_sector_size >> 16) & 0xff;
+ ap[14] = (scsi_debug_sector_size >> 8) & 0xff;
+ ap[15] = scsi_debug_sector_size & 0xff;
offset += bd_len;
ap = arr + offset;
}
@@ -1519,10 +1528,10 @@
if (block + num > sdebug_store_sectors)
rest = block + num - sdebug_store_sectors;
- ret = func(scmd, fake_storep + (block * SECT_SIZE),
- (num - rest) * SECT_SIZE);
+ ret = func(scmd, fake_storep + (block * scsi_debug_sector_size),
+ (num - rest) * scsi_debug_sector_size);
if (!ret && rest)
- ret = func(scmd, fake_storep, rest * SECT_SIZE);
+ ret = func(scmd, fake_storep, rest * scsi_debug_sector_size);
return ret;
}
@@ -1575,10 +1584,10 @@
write_unlock_irqrestore(&atomic_rw, iflags);
if (-1 == ret)
return (DID_ERROR << 16);
- else if ((ret < (num * SECT_SIZE)) &&
+ else if ((ret < (num * scsi_debug_sector_size)) &&
(SCSI_DEBUG_OPT_NOISE & scsi_debug_opts))
printk(KERN_INFO "scsi_debug: write: cdb indicated=%u, "
- " IO sent=%d bytes\n", num * SECT_SIZE, ret);
+ " IO sent=%d bytes\n", num * scsi_debug_sector_size, ret);
return 0;
}
@@ -2085,6 +2094,7 @@
module_param_named(virtual_gb, scsi_debug_virtual_gb, int, S_IRUGO | S_IWUSR);
module_param_named(vpd_use_hostno, scsi_debug_vpd_use_hostno, int,
S_IRUGO | S_IWUSR);
+module_param_named(sector_size, scsi_debug_sector_size, int, S_IRUGO);
MODULE_AUTHOR("Eric Youngdale + Douglas Gilbert");
MODULE_DESCRIPTION("SCSI debug adapter driver");
@@ -2106,6 +2116,7 @@
MODULE_PARM_DESC(scsi_level, "SCSI level to simulate(def=5[SPC-3])");
MODULE_PARM_DESC(virtual_gb, "virtual gigabyte size (def=0 -> use dev_size_mb)");
MODULE_PARM_DESC(vpd_use_hostno, "0 -> dev ids ignore hostno (def=1 -> unique dev ids)");
+MODULE_PARM_DESC(sector_size, "hardware sector size in bytes (def=512)");
static char sdebug_info[256];
@@ -2158,8 +2169,9 @@
scsi_debug_dev_size_mb, scsi_debug_opts, scsi_debug_every_nth,
scsi_debug_cmnd_count, scsi_debug_delay,
scsi_debug_max_luns, scsi_debug_scsi_level,
- SECT_SIZE, sdebug_cylinders_per, sdebug_heads, sdebug_sectors_per,
- num_aborts, num_dev_resets, num_bus_resets, num_host_resets);
+ scsi_debug_sector_size, sdebug_cylinders_per, sdebug_heads,
+ sdebug_sectors_per, num_aborts, num_dev_resets, num_bus_resets,
+ num_host_resets);
if (pos < offset) {
len = 0;
begin = pos;
@@ -2434,6 +2446,12 @@
DRIVER_ATTR(vpd_use_hostno, S_IRUGO | S_IWUSR, sdebug_vpd_use_hostno_show,
sdebug_vpd_use_hostno_store);
+static ssize_t sdebug_sector_size_show(struct device_driver * ddp, char * buf)
+{
+ return scnprintf(buf, PAGE_SIZE, "%u\n", scsi_debug_sector_size);
+}
+DRIVER_ATTR(sector_size, S_IRUGO, sdebug_sector_size_show, NULL);
+
/* Note: The following function creates attribute files in the
/sys/bus/pseudo/drivers/scsi_debug directory. The advantage of these
files (over those found in the /sys/module/scsi_debug/parameters
@@ -2459,11 +2477,13 @@
ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_scsi_level);
ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_virtual_gb);
ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_vpd_use_hostno);
+ ret |= driver_create_file(&sdebug_driverfs_driver, &driver_attr_sector_size);
return ret;
}
static void do_remove_driverfs_files(void)
{
+ driver_remove_file(&sdebug_driverfs_driver, &driver_attr_sector_size);
driver_remove_file(&sdebug_driverfs_driver, &driver_attr_vpd_use_hostno);
driver_remove_file(&sdebug_driverfs_driver, &driver_attr_virtual_gb);
driver_remove_file(&sdebug_driverfs_driver, &driver_attr_scsi_level);
@@ -2499,10 +2519,22 @@
int k;
int ret;
+ switch (scsi_debug_sector_size) {
+ case 512:
+ case 1024:
+ case 2048:
+ case 4096:
+ break;
+ default:
+ printk(KERN_ERR "scsi_debug_init: invalid sector_size %u\n",
+ scsi_debug_sector_size);
+ return -EINVAL;
+ }
+
if (scsi_debug_dev_size_mb < 1)
scsi_debug_dev_size_mb = 1; /* force minimum 1 MB ramdisk */
sz = (unsigned long)scsi_debug_dev_size_mb * 1048576;
- sdebug_store_sectors = sz / SECT_SIZE;
+ sdebug_store_sectors = sz / scsi_debug_sector_size;
sdebug_capacity = get_sdebug_capacity();
/* play around with geometry, don't waste too much on track 0 */
diff --git a/drivers/scsi/scsi_error.c b/drivers/scsi/scsi_error.c
index eaf5a8a..006a959 100644
--- a/drivers/scsi/scsi_error.c
+++ b/drivers/scsi/scsi_error.c
@@ -298,6 +298,7 @@
*/
static int scsi_check_sense(struct scsi_cmnd *scmd)
{
+ struct scsi_device *sdev = scmd->device;
struct scsi_sense_hdr sshdr;
if (! scsi_command_normalize_sense(scmd, &sshdr))
@@ -306,6 +307,16 @@
if (scsi_sense_is_deferred(&sshdr))
return NEEDS_RETRY;
+ if (sdev->scsi_dh_data && sdev->scsi_dh_data->scsi_dh &&
+ sdev->scsi_dh_data->scsi_dh->check_sense) {
+ int rc;
+
+ rc = sdev->scsi_dh_data->scsi_dh->check_sense(sdev, &sshdr);
+ if (rc != SCSI_RETURN_NOT_HANDLED)
+ return rc;
+ /* handler does not care. Drop down to default handling */
+ }
+
/*
* Previous logic looked for FILEMARK, EOM or ILI which are
* mainly associated with tapes and returned SUCCESS.
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c
index cbf55d5..88d1b5f 100644
--- a/drivers/scsi/scsi_lib.c
+++ b/drivers/scsi/scsi_lib.c
@@ -65,7 +65,7 @@
};
#undef SP
-static struct kmem_cache *scsi_bidi_sdb_cache;
+static struct kmem_cache *scsi_sdb_cache;
static void scsi_run_queue(struct request_queue *q);
@@ -784,7 +784,7 @@
struct scsi_data_buffer *bidi_sdb =
cmd->request->next_rq->special;
scsi_free_sgtable(bidi_sdb);
- kmem_cache_free(scsi_bidi_sdb_cache, bidi_sdb);
+ kmem_cache_free(scsi_sdb_cache, bidi_sdb);
cmd->request->next_rq->special = NULL;
}
}
@@ -1059,7 +1059,7 @@
if (blk_bidi_rq(cmd->request)) {
struct scsi_data_buffer *bidi_sdb = kmem_cache_zalloc(
- scsi_bidi_sdb_cache, GFP_ATOMIC);
+ scsi_sdb_cache, GFP_ATOMIC);
if (!bidi_sdb) {
error = BLKPREP_DEFER;
goto err_exit;
@@ -1169,6 +1169,14 @@
if (ret != BLKPREP_OK)
return ret;
+
+ if (unlikely(sdev->scsi_dh_data && sdev->scsi_dh_data->scsi_dh
+ && sdev->scsi_dh_data->scsi_dh->prep_fn)) {
+ ret = sdev->scsi_dh_data->scsi_dh->prep_fn(sdev, req);
+ if (ret != BLKPREP_OK)
+ return ret;
+ }
+
/*
* Filesystem requests must transfer data.
*/
@@ -1329,7 +1337,6 @@
printk("scsi%d unblocking host at zero depth\n",
shost->host_no));
} else {
- blk_plug_device(q);
return 0;
}
}
@@ -1693,11 +1700,11 @@
return -ENOMEM;
}
- scsi_bidi_sdb_cache = kmem_cache_create("scsi_bidi_sdb",
- sizeof(struct scsi_data_buffer),
- 0, 0, NULL);
- if (!scsi_bidi_sdb_cache) {
- printk(KERN_ERR "SCSI: can't init scsi bidi sdb cache\n");
+ scsi_sdb_cache = kmem_cache_create("scsi_data_buffer",
+ sizeof(struct scsi_data_buffer),
+ 0, 0, NULL);
+ if (!scsi_sdb_cache) {
+ printk(KERN_ERR "SCSI: can't init scsi sdb cache\n");
goto cleanup_io_context;
}
@@ -1710,7 +1717,7 @@
if (!sgp->slab) {
printk(KERN_ERR "SCSI: can't init sg slab %s\n",
sgp->name);
- goto cleanup_bidi_sdb;
+ goto cleanup_sdb;
}
sgp->pool = mempool_create_slab_pool(SG_MEMPOOL_SIZE,
@@ -1718,13 +1725,13 @@
if (!sgp->pool) {
printk(KERN_ERR "SCSI: can't init sg mempool %s\n",
sgp->name);
- goto cleanup_bidi_sdb;
+ goto cleanup_sdb;
}
}
return 0;
-cleanup_bidi_sdb:
+cleanup_sdb:
for (i = 0; i < SG_MEMPOOL_NR; i++) {
struct scsi_host_sg_pool *sgp = scsi_sg_pools + i;
if (sgp->pool)
@@ -1732,7 +1739,7 @@
if (sgp->slab)
kmem_cache_destroy(sgp->slab);
}
- kmem_cache_destroy(scsi_bidi_sdb_cache);
+ kmem_cache_destroy(scsi_sdb_cache);
cleanup_io_context:
kmem_cache_destroy(scsi_io_context_cache);
@@ -1744,7 +1751,7 @@
int i;
kmem_cache_destroy(scsi_io_context_cache);
- kmem_cache_destroy(scsi_bidi_sdb_cache);
+ kmem_cache_destroy(scsi_sdb_cache);
for (i = 0; i < SG_MEMPOOL_NR; i++) {
struct scsi_host_sg_pool *sgp = scsi_sg_pools + i;
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index a00eee6..196fe3a 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -346,7 +346,7 @@
put_device(parent);
}
-struct device_type scsi_target_type = {
+static struct device_type scsi_target_type = {
.name = "scsi_target",
.release = scsi_target_dev_release,
};
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
index 93d2b67..b6e5610 100644
--- a/drivers/scsi/scsi_sysfs.c
+++ b/drivers/scsi/scsi_sysfs.c
@@ -439,6 +439,7 @@
.resume = scsi_bus_resume,
.remove = scsi_bus_remove,
};
+EXPORT_SYMBOL_GPL(scsi_bus_type);
int scsi_sysfs_register(void)
{
diff --git a/drivers/scsi/scsi_transport_iscsi.c b/drivers/scsi/scsi_transport_iscsi.c
index 65d1737..3af7cbc 100644
--- a/drivers/scsi/scsi_transport_iscsi.c
+++ b/drivers/scsi/scsi_transport_iscsi.c
@@ -30,10 +30,11 @@
#include <scsi/scsi_transport_iscsi.h>
#include <scsi/iscsi_if.h>
-#define ISCSI_SESSION_ATTRS 19
+#define ISCSI_SESSION_ATTRS 21
#define ISCSI_CONN_ATTRS 13
#define ISCSI_HOST_ATTRS 4
-#define ISCSI_TRANSPORT_VERSION "2.0-869"
+
+#define ISCSI_TRANSPORT_VERSION "2.0-870"
struct iscsi_internal {
int daemon_pid;
@@ -101,16 +102,10 @@
static DEVICE_ATTR(name, S_IRUGO, show_transport_##name, NULL);
show_transport_attr(caps, "0x%x");
-show_transport_attr(max_lun, "%d");
-show_transport_attr(max_conn, "%d");
-show_transport_attr(max_cmd_len, "%d");
static struct attribute *iscsi_transport_attrs[] = {
&dev_attr_handle.attr,
&dev_attr_caps.attr,
- &dev_attr_max_lun.attr,
- &dev_attr_max_conn.attr,
- &dev_attr_max_cmd_len.attr,
NULL,
};
@@ -118,18 +113,139 @@
.attrs = iscsi_transport_attrs,
};
+/*
+ * iSCSI endpoint attrs
+ */
+#define iscsi_dev_to_endpoint(_dev) \
+ container_of(_dev, struct iscsi_endpoint, dev)
+#define ISCSI_ATTR(_prefix,_name,_mode,_show,_store) \
+struct device_attribute dev_attr_##_prefix##_##_name = \
+ __ATTR(_name,_mode,_show,_store)
+
+static void iscsi_endpoint_release(struct device *dev)
+{
+ struct iscsi_endpoint *ep = iscsi_dev_to_endpoint(dev);
+ kfree(ep);
+}
+
+static struct class iscsi_endpoint_class = {
+ .name = "iscsi_endpoint",
+ .dev_release = iscsi_endpoint_release,
+};
+
+static ssize_t
+show_ep_handle(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct iscsi_endpoint *ep = iscsi_dev_to_endpoint(dev);
+ return sprintf(buf, "%u\n", ep->id);
+}
+static ISCSI_ATTR(ep, handle, S_IRUGO, show_ep_handle, NULL);
+
+static struct attribute *iscsi_endpoint_attrs[] = {
+ &dev_attr_ep_handle.attr,
+ NULL,
+};
+
+static struct attribute_group iscsi_endpoint_group = {
+ .attrs = iscsi_endpoint_attrs,
+};
+
+#define ISCSI_MAX_EPID -1
+
+static int iscsi_match_epid(struct device *dev, void *data)
+{
+ struct iscsi_endpoint *ep = iscsi_dev_to_endpoint(dev);
+ unsigned int *epid = (unsigned int *) data;
+
+ return *epid == ep->id;
+}
+
+struct iscsi_endpoint *
+iscsi_create_endpoint(int dd_size)
+{
+ struct device *dev;
+ struct iscsi_endpoint *ep;
+ unsigned int id;
+ int err;
+
+ for (id = 1; id < ISCSI_MAX_EPID; id++) {
+ dev = class_find_device(&iscsi_endpoint_class, &id,
+ iscsi_match_epid);
+ if (!dev)
+ break;
+ }
+ if (id == ISCSI_MAX_EPID) {
+ printk(KERN_ERR "Too many connections. Max supported %u\n",
+ ISCSI_MAX_EPID - 1);
+ return NULL;
+ }
+
+ ep = kzalloc(sizeof(*ep) + dd_size, GFP_KERNEL);
+ if (!ep)
+ return NULL;
+
+ ep->id = id;
+ ep->dev.class = &iscsi_endpoint_class;
+ snprintf(ep->dev.bus_id, BUS_ID_SIZE, "ep-%u", id);
+ err = device_register(&ep->dev);
+ if (err)
+ goto free_ep;
+
+ err = sysfs_create_group(&ep->dev.kobj, &iscsi_endpoint_group);
+ if (err)
+ goto unregister_dev;
+
+ if (dd_size)
+ ep->dd_data = &ep[1];
+ return ep;
+
+unregister_dev:
+ device_unregister(&ep->dev);
+ return NULL;
+
+free_ep:
+ kfree(ep);
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(iscsi_create_endpoint);
+
+void iscsi_destroy_endpoint(struct iscsi_endpoint *ep)
+{
+ sysfs_remove_group(&ep->dev.kobj, &iscsi_endpoint_group);
+ device_unregister(&ep->dev);
+}
+EXPORT_SYMBOL_GPL(iscsi_destroy_endpoint);
+
+struct iscsi_endpoint *iscsi_lookup_endpoint(u64 handle)
+{
+ struct iscsi_endpoint *ep;
+ struct device *dev;
+
+ dev = class_find_device(&iscsi_endpoint_class, &handle,
+ iscsi_match_epid);
+ if (!dev)
+ return NULL;
+
+ ep = iscsi_dev_to_endpoint(dev);
+ /*
+ * we can drop this now because the interface will prevent
+ * removals and lookups from racing.
+ */
+ put_device(dev);
+ return ep;
+}
+EXPORT_SYMBOL_GPL(iscsi_lookup_endpoint);
static int iscsi_setup_host(struct transport_container *tc, struct device *dev,
struct device *cdev)
{
struct Scsi_Host *shost = dev_to_shost(dev);
- struct iscsi_host *ihost = shost->shost_data;
+ struct iscsi_cls_host *ihost = shost->shost_data;
memset(ihost, 0, sizeof(*ihost));
- INIT_LIST_HEAD(&ihost->sessions);
- mutex_init(&ihost->mutex);
atomic_set(&ihost->nr_scans, 0);
+ mutex_init(&ihost->mutex);
snprintf(ihost->scan_workq_name, KOBJ_NAME_LEN, "iscsi_scan_%d",
shost->host_no);
@@ -144,7 +260,7 @@
struct device *cdev)
{
struct Scsi_Host *shost = dev_to_shost(dev);
- struct iscsi_host *ihost = shost->shost_data;
+ struct iscsi_cls_host *ihost = shost->shost_data;
destroy_workqueue(ihost->scan_workq);
return 0;
@@ -287,6 +403,24 @@
return dev->release == iscsi_session_release;
}
+static int iscsi_iter_session_fn(struct device *dev, void *data)
+{
+ void (* fn) (struct iscsi_cls_session *) = data;
+
+ if (!iscsi_is_session_dev(dev))
+ return 0;
+ fn(iscsi_dev_to_session(dev));
+ return 0;
+}
+
+void iscsi_host_for_each_session(struct Scsi_Host *shost,
+ void (*fn)(struct iscsi_cls_session *))
+{
+ device_for_each_child(&shost->shost_gendev, fn,
+ iscsi_iter_session_fn);
+}
+EXPORT_SYMBOL_GPL(iscsi_host_for_each_session);
+
/**
* iscsi_scan_finished - helper to report when running scans are done
* @shost: scsi host
@@ -297,7 +431,7 @@
*/
int iscsi_scan_finished(struct Scsi_Host *shost, unsigned long time)
{
- struct iscsi_host *ihost = shost->shost_data;
+ struct iscsi_cls_host *ihost = shost->shost_data;
/*
* qla4xxx will have kicked off some session unblocks before calling
* scsi_scan_host, so just wait for them to complete.
@@ -306,22 +440,61 @@
}
EXPORT_SYMBOL_GPL(iscsi_scan_finished);
+struct iscsi_scan_data {
+ unsigned int channel;
+ unsigned int id;
+ unsigned int lun;
+};
+
+static int iscsi_user_scan_session(struct device *dev, void *data)
+{
+ struct iscsi_scan_data *scan_data = data;
+ struct iscsi_cls_session *session;
+ struct Scsi_Host *shost;
+ struct iscsi_cls_host *ihost;
+ unsigned long flags;
+ unsigned int id;
+
+ if (!iscsi_is_session_dev(dev))
+ return 0;
+
+ session = iscsi_dev_to_session(dev);
+ shost = iscsi_session_to_shost(session);
+ ihost = shost->shost_data;
+
+ mutex_lock(&ihost->mutex);
+ spin_lock_irqsave(&session->lock, flags);
+ if (session->state != ISCSI_SESSION_LOGGED_IN) {
+ spin_unlock_irqrestore(&session->lock, flags);
+ mutex_unlock(&ihost->mutex);
+ return 0;
+ }
+ id = session->target_id;
+ spin_unlock_irqrestore(&session->lock, flags);
+
+ if (id != ISCSI_MAX_TARGET) {
+ if ((scan_data->channel == SCAN_WILD_CARD ||
+ scan_data->channel == 0) &&
+ (scan_data->id == SCAN_WILD_CARD ||
+ scan_data->id == id))
+ scsi_scan_target(&session->dev, 0, id,
+ scan_data->lun, 1);
+ }
+ mutex_unlock(&ihost->mutex);
+ return 0;
+}
+
static int iscsi_user_scan(struct Scsi_Host *shost, uint channel,
uint id, uint lun)
{
- struct iscsi_host *ihost = shost->shost_data;
- struct iscsi_cls_session *session;
+ struct iscsi_scan_data scan_data;
- mutex_lock(&ihost->mutex);
- list_for_each_entry(session, &ihost->sessions, host_list) {
- if ((channel == SCAN_WILD_CARD || channel == 0) &&
- (id == SCAN_WILD_CARD || id == session->target_id))
- scsi_scan_target(&session->dev, 0,
- session->target_id, lun, 1);
- }
- mutex_unlock(&ihost->mutex);
+ scan_data.channel = channel;
+ scan_data.id = id;
+ scan_data.lun = lun;
- return 0;
+ return device_for_each_child(&shost->shost_gendev, &scan_data,
+ iscsi_user_scan_session);
}
static void iscsi_scan_session(struct work_struct *work)
@@ -329,19 +502,14 @@
struct iscsi_cls_session *session =
container_of(work, struct iscsi_cls_session, scan_work);
struct Scsi_Host *shost = iscsi_session_to_shost(session);
- struct iscsi_host *ihost = shost->shost_data;
- unsigned long flags;
+ struct iscsi_cls_host *ihost = shost->shost_data;
+ struct iscsi_scan_data scan_data;
- spin_lock_irqsave(&session->lock, flags);
- if (session->state != ISCSI_SESSION_LOGGED_IN) {
- spin_unlock_irqrestore(&session->lock, flags);
- goto done;
- }
- spin_unlock_irqrestore(&session->lock, flags);
+ scan_data.channel = 0;
+ scan_data.id = SCAN_WILD_CARD;
+ scan_data.lun = SCAN_WILD_CARD;
- scsi_scan_target(&session->dev, 0, session->target_id,
- SCAN_WILD_CARD, 1);
-done:
+ iscsi_user_scan_session(&session->dev, &scan_data);
atomic_dec(&ihost->nr_scans);
}
@@ -381,7 +549,7 @@
container_of(work, struct iscsi_cls_session,
unblock_work);
struct Scsi_Host *shost = iscsi_session_to_shost(session);
- struct iscsi_host *ihost = shost->shost_data;
+ struct iscsi_cls_host *ihost = shost->shost_data;
unsigned long flags;
/*
@@ -449,15 +617,19 @@
container_of(work, struct iscsi_cls_session,
unbind_work);
struct Scsi_Host *shost = iscsi_session_to_shost(session);
- struct iscsi_host *ihost = shost->shost_data;
+ struct iscsi_cls_host *ihost = shost->shost_data;
+ unsigned long flags;
/* Prevent new scans and make sure scanning is not in progress */
mutex_lock(&ihost->mutex);
- if (list_empty(&session->host_list)) {
+ spin_lock_irqsave(&session->lock, flags);
+ if (session->target_id == ISCSI_MAX_TARGET) {
+ spin_unlock_irqrestore(&session->lock, flags);
mutex_unlock(&ihost->mutex);
return;
}
- list_del_init(&session->host_list);
+ session->target_id = ISCSI_MAX_TARGET;
+ spin_unlock_irqrestore(&session->lock, flags);
mutex_unlock(&ihost->mutex);
scsi_remove_target(&session->dev);
@@ -467,18 +639,18 @@
static int iscsi_unbind_session(struct iscsi_cls_session *session)
{
struct Scsi_Host *shost = iscsi_session_to_shost(session);
- struct iscsi_host *ihost = shost->shost_data;
+ struct iscsi_cls_host *ihost = shost->shost_data;
return queue_work(ihost->scan_workq, &session->unbind_work);
}
struct iscsi_cls_session *
-iscsi_alloc_session(struct Scsi_Host *shost,
- struct iscsi_transport *transport)
+iscsi_alloc_session(struct Scsi_Host *shost, struct iscsi_transport *transport,
+ int dd_size)
{
struct iscsi_cls_session *session;
- session = kzalloc(sizeof(*session) + transport->sessiondata_size,
+ session = kzalloc(sizeof(*session) + dd_size,
GFP_KERNEL);
if (!session)
return NULL;
@@ -487,7 +659,6 @@
session->recovery_tmo = 120;
session->state = ISCSI_SESSION_FREE;
INIT_DELAYED_WORK(&session->recovery_work, session_recovery_timedout);
- INIT_LIST_HEAD(&session->host_list);
INIT_LIST_HEAD(&session->sess_list);
INIT_WORK(&session->unblock_work, __iscsi_unblock_session);
INIT_WORK(&session->block_work, __iscsi_block_session);
@@ -500,22 +671,57 @@
session->dev.parent = &shost->shost_gendev;
session->dev.release = iscsi_session_release;
device_initialize(&session->dev);
- if (transport->sessiondata_size)
+ if (dd_size)
session->dd_data = &session[1];
return session;
}
EXPORT_SYMBOL_GPL(iscsi_alloc_session);
+static int iscsi_get_next_target_id(struct device *dev, void *data)
+{
+ struct iscsi_cls_session *session;
+ unsigned long flags;
+ int err = 0;
+
+ if (!iscsi_is_session_dev(dev))
+ return 0;
+
+ session = iscsi_dev_to_session(dev);
+ spin_lock_irqsave(&session->lock, flags);
+ if (*((unsigned int *) data) == session->target_id)
+ err = -EEXIST;
+ spin_unlock_irqrestore(&session->lock, flags);
+ return err;
+}
+
int iscsi_add_session(struct iscsi_cls_session *session, unsigned int target_id)
{
struct Scsi_Host *shost = iscsi_session_to_shost(session);
- struct iscsi_host *ihost;
+ struct iscsi_cls_host *ihost;
unsigned long flags;
+ unsigned int id = target_id;
int err;
ihost = shost->shost_data;
session->sid = atomic_add_return(1, &iscsi_session_nr);
- session->target_id = target_id;
+
+ if (id == ISCSI_MAX_TARGET) {
+ for (id = 0; id < ISCSI_MAX_TARGET; id++) {
+ err = device_for_each_child(&shost->shost_gendev, &id,
+ iscsi_get_next_target_id);
+ if (!err)
+ break;
+ }
+
+ if (id == ISCSI_MAX_TARGET) {
+ iscsi_cls_session_printk(KERN_ERR, session,
+ "Too many iscsi targets. Max "
+ "number of targets is %d.\n",
+ ISCSI_MAX_TARGET - 1);
+ goto release_host;
+ }
+ }
+ session->target_id = id;
snprintf(session->dev.bus_id, BUS_ID_SIZE, "session%u",
session->sid);
@@ -531,10 +737,6 @@
list_add(&session->sess_list, &sesslist);
spin_unlock_irqrestore(&sesslock, flags);
- mutex_lock(&ihost->mutex);
- list_add(&session->host_list, &ihost->sessions);
- mutex_unlock(&ihost->mutex);
-
iscsi_session_event(session, ISCSI_KEVENT_CREATE_SESSION);
return 0;
@@ -548,18 +750,18 @@
* iscsi_create_session - create iscsi class session
* @shost: scsi host
* @transport: iscsi transport
+ * @dd_size: private driver data size
* @target_id: which target
*
* This can be called from a LLD or iscsi_transport.
*/
struct iscsi_cls_session *
-iscsi_create_session(struct Scsi_Host *shost,
- struct iscsi_transport *transport,
- unsigned int target_id)
+iscsi_create_session(struct Scsi_Host *shost, struct iscsi_transport *transport,
+ int dd_size, unsigned int target_id)
{
struct iscsi_cls_session *session;
- session = iscsi_alloc_session(shost, transport);
+ session = iscsi_alloc_session(shost, transport, dd_size);
if (!session)
return NULL;
@@ -595,7 +797,7 @@
void iscsi_remove_session(struct iscsi_cls_session *session)
{
struct Scsi_Host *shost = iscsi_session_to_shost(session);
- struct iscsi_host *ihost = shost->shost_data;
+ struct iscsi_cls_host *ihost = shost->shost_data;
unsigned long flags;
int err;
@@ -661,6 +863,7 @@
/**
* iscsi_create_conn - create iscsi class connection
* @session: iscsi cls session
+ * @dd_size: private driver data size
* @cid: connection id
*
* This can be called from a LLD or iscsi_transport. The connection
@@ -673,18 +876,17 @@
* non-zero.
*/
struct iscsi_cls_conn *
-iscsi_create_conn(struct iscsi_cls_session *session, uint32_t cid)
+iscsi_create_conn(struct iscsi_cls_session *session, int dd_size, uint32_t cid)
{
struct iscsi_transport *transport = session->transport;
struct iscsi_cls_conn *conn;
unsigned long flags;
int err;
- conn = kzalloc(sizeof(*conn) + transport->conndata_size, GFP_KERNEL);
+ conn = kzalloc(sizeof(*conn) + dd_size, GFP_KERNEL);
if (!conn)
return NULL;
-
- if (transport->conndata_size)
+ if (dd_size)
conn->dd_data = &conn[1];
INIT_LIST_HEAD(&conn->conn_list);
@@ -1017,21 +1219,20 @@
EXPORT_SYMBOL_GPL(iscsi_session_event);
static int
-iscsi_if_create_session(struct iscsi_internal *priv, struct iscsi_uevent *ev)
+iscsi_if_create_session(struct iscsi_internal *priv, struct iscsi_endpoint *ep,
+ struct iscsi_uevent *ev, uint32_t initial_cmdsn,
+ uint16_t cmds_max, uint16_t queue_depth)
{
struct iscsi_transport *transport = priv->iscsi_transport;
struct iscsi_cls_session *session;
- uint32_t hostno;
+ uint32_t host_no;
- session = transport->create_session(transport, &priv->t,
- ev->u.c_session.cmds_max,
- ev->u.c_session.queue_depth,
- ev->u.c_session.initial_cmdsn,
- &hostno);
+ session = transport->create_session(ep, cmds_max, queue_depth,
+ initial_cmdsn, &host_no);
if (!session)
return -ENOMEM;
- ev->r.c_session_ret.host_no = hostno;
+ ev->r.c_session_ret.host_no = host_no;
ev->r.c_session_ret.sid = session->sid;
return 0;
}
@@ -1106,6 +1307,7 @@
iscsi_if_transport_ep(struct iscsi_transport *transport,
struct iscsi_uevent *ev, int msg_type)
{
+ struct iscsi_endpoint *ep;
struct sockaddr *dst_addr;
int rc = 0;
@@ -1115,22 +1317,33 @@
return -EINVAL;
dst_addr = (struct sockaddr *)((char*)ev + sizeof(*ev));
- rc = transport->ep_connect(dst_addr,
- ev->u.ep_connect.non_blocking,
- &ev->r.ep_connect_ret.handle);
+ ep = transport->ep_connect(dst_addr,
+ ev->u.ep_connect.non_blocking);
+ if (IS_ERR(ep))
+ return PTR_ERR(ep);
+
+ ev->r.ep_connect_ret.handle = ep->id;
break;
case ISCSI_UEVENT_TRANSPORT_EP_POLL:
if (!transport->ep_poll)
return -EINVAL;
- ev->r.retcode = transport->ep_poll(ev->u.ep_poll.ep_handle,
+ ep = iscsi_lookup_endpoint(ev->u.ep_poll.ep_handle);
+ if (!ep)
+ return -EINVAL;
+
+ ev->r.retcode = transport->ep_poll(ep,
ev->u.ep_poll.timeout_ms);
break;
case ISCSI_UEVENT_TRANSPORT_EP_DISCONNECT:
if (!transport->ep_disconnect)
return -EINVAL;
- transport->ep_disconnect(ev->u.ep_disconnect.ep_handle);
+ ep = iscsi_lookup_endpoint(ev->u.ep_disconnect.ep_handle);
+ if (!ep)
+ return -EINVAL;
+
+ transport->ep_disconnect(ep);
break;
}
return rc;
@@ -1195,6 +1408,7 @@
struct iscsi_internal *priv;
struct iscsi_cls_session *session;
struct iscsi_cls_conn *conn;
+ struct iscsi_endpoint *ep = NULL;
priv = iscsi_if_transport_lookup(iscsi_ptr(ev->transport_handle));
if (!priv)
@@ -1208,7 +1422,22 @@
switch (nlh->nlmsg_type) {
case ISCSI_UEVENT_CREATE_SESSION:
- err = iscsi_if_create_session(priv, ev);
+ err = iscsi_if_create_session(priv, ep, ev,
+ ev->u.c_session.initial_cmdsn,
+ ev->u.c_session.cmds_max,
+ ev->u.c_session.queue_depth);
+ break;
+ case ISCSI_UEVENT_CREATE_BOUND_SESSION:
+ ep = iscsi_lookup_endpoint(ev->u.c_bound_session.ep_handle);
+ if (!ep) {
+ err = -EINVAL;
+ break;
+ }
+
+ err = iscsi_if_create_session(priv, ep, ev,
+ ev->u.c_bound_session.initial_cmdsn,
+ ev->u.c_bound_session.cmds_max,
+ ev->u.c_bound_session.queue_depth);
break;
case ISCSI_UEVENT_DESTROY_SESSION:
session = iscsi_session_lookup(ev->u.d_session.sid);
@@ -1414,6 +1643,8 @@
iscsi_session_attr(fast_abort, ISCSI_PARAM_FAST_ABORT, 0);
iscsi_session_attr(abort_tmo, ISCSI_PARAM_ABORT_TMO, 0);
iscsi_session_attr(lu_reset_tmo, ISCSI_PARAM_LU_RESET_TMO, 0);
+iscsi_session_attr(ifacename, ISCSI_PARAM_IFACE_NAME, 0);
+iscsi_session_attr(initiatorname, ISCSI_PARAM_INITIATOR_NAME, 0)
static ssize_t
show_priv_session_state(struct device *dev, struct device_attribute *attr,
@@ -1580,6 +1811,8 @@
priv->daemon_pid = -1;
priv->iscsi_transport = tt;
priv->t.user_scan = iscsi_user_scan;
+ if (!(tt->caps & CAP_DATA_PATH_OFFLOAD))
+ priv->t.create_work_queue = 1;
priv->dev.class = &iscsi_transport_class;
snprintf(priv->dev.bus_id, BUS_ID_SIZE, "%s", tt->name);
@@ -1595,7 +1828,7 @@
priv->t.host_attrs.ac.attrs = &priv->host_attrs[0];
priv->t.host_attrs.ac.class = &iscsi_host_class.class;
priv->t.host_attrs.ac.match = iscsi_host_match;
- priv->t.host_size = sizeof(struct iscsi_host);
+ priv->t.host_size = sizeof(struct iscsi_cls_host);
transport_container_register(&priv->t.host_attrs);
SETUP_HOST_RD_ATTR(netdev, ISCSI_HOST_NETDEV_NAME);
@@ -1653,6 +1886,8 @@
SETUP_SESSION_RD_ATTR(fast_abort, ISCSI_FAST_ABORT);
SETUP_SESSION_RD_ATTR(abort_tmo, ISCSI_ABORT_TMO);
SETUP_SESSION_RD_ATTR(lu_reset_tmo,ISCSI_LU_RESET_TMO);
+ SETUP_SESSION_RD_ATTR(ifacename, ISCSI_IFACE_NAME);
+ SETUP_SESSION_RD_ATTR(initiatorname, ISCSI_INITIATOR_NAME);
SETUP_PRIV_SESSION_RD_ATTR(recovery_tmo);
SETUP_PRIV_SESSION_RD_ATTR(state);
@@ -1668,6 +1903,7 @@
unregister_dev:
device_unregister(&priv->dev);
+ return NULL;
free_priv:
kfree(priv);
return NULL;
@@ -1715,10 +1951,14 @@
if (err)
return err;
- err = transport_class_register(&iscsi_host_class);
+ err = class_register(&iscsi_endpoint_class);
if (err)
goto unregister_transport_class;
+ err = transport_class_register(&iscsi_host_class);
+ if (err)
+ goto unregister_endpoint_class;
+
err = transport_class_register(&iscsi_connection_class);
if (err)
goto unregister_host_class;
@@ -1727,8 +1967,8 @@
if (err)
goto unregister_conn_class;
- nls = netlink_kernel_create(&init_net, NETLINK_ISCSI, 1, iscsi_if_rx, NULL,
- THIS_MODULE);
+ nls = netlink_kernel_create(&init_net, NETLINK_ISCSI, 1, iscsi_if_rx,
+ NULL, THIS_MODULE);
if (!nls) {
err = -ENOBUFS;
goto unregister_session_class;
@@ -1748,6 +1988,8 @@
transport_class_unregister(&iscsi_connection_class);
unregister_host_class:
transport_class_unregister(&iscsi_host_class);
+unregister_endpoint_class:
+ class_unregister(&iscsi_endpoint_class);
unregister_transport_class:
class_unregister(&iscsi_transport_class);
return err;
@@ -1760,6 +2002,7 @@
transport_class_unregister(&iscsi_connection_class);
transport_class_unregister(&iscsi_session_class);
transport_class_unregister(&iscsi_host_class);
+ class_unregister(&iscsi_endpoint_class);
class_unregister(&iscsi_transport_class);
}
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index d53312c..0c63947 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -58,8 +58,8 @@
#include <scsi/scsi_host.h>
#include <scsi/scsi_ioctl.h>
#include <scsi/scsicam.h>
-#include <scsi/sd.h>
+#include "sd.h"
#include "scsi_logging.h"
MODULE_AUTHOR("Eric Youngdale");
@@ -295,11 +295,6 @@
}
}
-static inline struct scsi_disk *scsi_disk(struct gendisk *disk)
-{
- return container_of(disk->private_data, struct scsi_disk, driver);
-}
-
static struct scsi_disk *__scsi_disk_get(struct gendisk *disk)
{
struct scsi_disk *sdkp = NULL;
diff --git a/drivers/scsi/sd.h b/drivers/scsi/sd.h
new file mode 100644
index 0000000..03a3d45
--- /dev/null
+++ b/drivers/scsi/sd.h
@@ -0,0 +1,62 @@
+#ifndef _SCSI_DISK_H
+#define _SCSI_DISK_H
+
+/*
+ * More than enough for everybody ;) The huge number of majors
+ * is a leftover from 16bit dev_t days, we don't really need that
+ * much numberspace.
+ */
+#define SD_MAJORS 16
+
+/*
+ * This is limited by the naming scheme enforced in sd_probe,
+ * add another character to it if you really need more disks.
+ */
+#define SD_MAX_DISKS (((26 * 26) + 26 + 1) * 26)
+
+/*
+ * Time out in seconds for disks and Magneto-opticals (which are slower).
+ */
+#define SD_TIMEOUT (30 * HZ)
+#define SD_MOD_TIMEOUT (75 * HZ)
+
+/*
+ * Number of allowed retries
+ */
+#define SD_MAX_RETRIES 5
+#define SD_PASSTHROUGH_RETRIES 1
+
+/*
+ * Size of the initial data buffer for mode and read capacity data
+ */
+#define SD_BUF_SIZE 512
+
+struct scsi_disk {
+ struct scsi_driver *driver; /* always &sd_template */
+ struct scsi_device *device;
+ struct device dev;
+ struct gendisk *disk;
+ unsigned int openers; /* protected by BKL for now, yuck */
+ sector_t capacity; /* size in 512-byte sectors */
+ u32 index;
+ u8 media_present;
+ u8 write_prot;
+ unsigned previous_state : 1;
+ unsigned WCE : 1; /* state of disk WCE bit */
+ unsigned RCD : 1; /* state of disk RCD bit, unused */
+ unsigned DPOFUA : 1; /* state of disk DPOFUA bit */
+};
+#define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev)
+
+static inline struct scsi_disk *scsi_disk(struct gendisk *disk)
+{
+ return container_of(disk->private_data, struct scsi_disk, driver);
+}
+
+#define sd_printk(prefix, sdsk, fmt, a...) \
+ (sdsk)->disk ? \
+ sdev_printk(prefix, (sdsk)->device, "[%s] " fmt, \
+ (sdsk)->disk->disk_name, ##a) : \
+ sdev_printk(prefix, (sdsk)->device, fmt, ##a)
+
+#endif /* _SCSI_DISK_H */
diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index fccd2e8..d3b8ebb 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -1036,6 +1036,9 @@
case SG_SCSI_RESET_DEVICE:
val = SCSI_TRY_RESET_DEVICE;
break;
+ case SG_SCSI_RESET_TARGET:
+ val = SCSI_TRY_RESET_TARGET;
+ break;
case SG_SCSI_RESET_BUS:
val = SCSI_TRY_RESET_BUS;
break;
diff --git a/drivers/scsi/sym53c8xx_2/sym_misc.h b/drivers/scsi/sym53c8xx_2/sym_misc.h
index 0433d5d..4305371 100644
--- a/drivers/scsi/sym53c8xx_2/sym_misc.h
+++ b/drivers/scsi/sym53c8xx_2/sym_misc.h
@@ -121,9 +121,7 @@
}
}
-#define sym_que_entry(ptr, type, member) \
- ((type *)((char *)(ptr)-(unsigned int)(&((type *)0)->member)))
-
+#define sym_que_entry(ptr, type, member) container_of(ptr, type, member)
#define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink)
diff --git a/drivers/serial/cpm_uart/cpm_uart.h b/drivers/serial/cpm_uart/cpm_uart.h
index 0cc39f8..5c76e0a 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/serial/cpm_uart/cpm_uart.h
@@ -6,7 +6,7 @@
* Copyright (C) 2004 Freescale Semiconductor, Inc.
*
* 2006 (c) MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
+ * Vitaly Bordug <vbordug@ru.mvista.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
@@ -28,7 +28,7 @@
#define SERIAL_CPM_MAJOR 204
#define SERIAL_CPM_MINOR 46
-#define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC)
+#define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC)
#define IS_DISCARDING(pinfo) (pinfo->flags & FLAG_DISCARDING)
#define FLAG_DISCARDING 0x00000004 /* when set, don't discard */
#define FLAG_SMC 0x00000002
@@ -70,7 +70,7 @@
void (*set_lineif)(struct uart_cpm_port *);
u8 brg;
uint dp_addr;
- void *mem_addr;
+ void *mem_addr;
dma_addr_t dma_addr;
u32 mem_size;
/* helpers */
@@ -79,14 +79,11 @@
/* Keep track of 'odd' SMC2 wirings */
int is_portb;
/* wait on close if needed */
- int wait_closing;
+ int wait_closing;
/* value to combine with opcode to form cpm command */
u32 command;
};
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-extern int cpm_uart_port_map[UART_NR];
-#endif
extern int cpm_uart_nr;
extern struct uart_cpm_port cpm_uart_ports[UART_NR];
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index a19dc7e..abe129c 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -13,7 +13,7 @@
* Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
* (C) 2004 Intracom, S.A.
* (C) 2005-2006 MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
+ * Vitaly Bordug <vbordug@ru.mvista.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -42,6 +42,7 @@
#include <linux/bootmem.h>
#include <linux/dma-mapping.h>
#include <linux/fs_uart_pd.h>
+#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/irq.h>
@@ -49,10 +50,6 @@
#include <asm/fs_pd.h>
#include <asm/udbg.h>
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
-#include <linux/of_platform.h>
-#endif
-
#if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
#define SUPPORT_SYSRQ
#endif
@@ -72,59 +69,6 @@
/**************************************************************/
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Track which ports are configured as uarts */
-int cpm_uart_port_map[UART_NR];
-/* How many ports did we config as uarts */
-int cpm_uart_nr;
-
-/* Place-holder for board-specific stuff */
-struct platform_device* __attribute__ ((weak)) __init
-early_uart_get_pdev(int index)
-{
- return NULL;
-}
-
-
-static void cpm_uart_count(void)
-{
- cpm_uart_nr = 0;
-#ifdef CONFIG_SERIAL_CPM_SMC1
- cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SMC2
- cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC1
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC2
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC3
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC4
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
-#endif
-}
-
-/* Get UART number by its id */
-static int cpm_uart_id2nr(int id)
-{
- int i;
- if (id < UART_NR) {
- for (i=0; i<UART_NR; i++) {
- if (cpm_uart_port_map[i] == id)
- return i;
- }
- }
-
- /* not found or invalid argument */
- return -1;
-}
-#endif
-
/*
* Check, if transmit buffers are processed
*/
@@ -547,6 +491,11 @@
}
/*
+ * Update the timeout
+ */
+ uart_update_timeout(port, termios->c_cflag, baud);
+
+ /*
* Set up parity check flag
*/
#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
@@ -935,7 +884,6 @@
.verify_port = cpm_uart_verify_port,
};
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
struct uart_cpm_port cpm_uart_ports[UART_NR];
static int cpm_uart_init_port(struct device_node *np,
@@ -995,6 +943,7 @@
pinfo->port.type = PORT_CPM;
pinfo->port.ops = &cpm_uart_pops,
pinfo->port.iotype = UPIO_MEM;
+ pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
spin_lock_init(&pinfo->port.lock);
pinfo->port.irq = of_irq_to_resource(np, 0, NULL);
@@ -1012,153 +961,6 @@
return ret;
}
-#else
-
-struct uart_cpm_port cpm_uart_ports[UART_NR] = {
- [UART_SMC1] = {
- .port = {
- .irq = SMC1_IRQ,
- .ops = &cpm_uart_pops,
- .iotype = UPIO_MEM,
- .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC1].port.lock),
- },
- .flags = FLAG_SMC,
- .tx_nrfifos = TX_NUM_FIFO,
- .tx_fifosize = TX_BUF_SIZE,
- .rx_nrfifos = RX_NUM_FIFO,
- .rx_fifosize = RX_BUF_SIZE,
- .set_lineif = smc1_lineif,
- },
- [UART_SMC2] = {
- .port = {
- .irq = SMC2_IRQ,
- .ops = &cpm_uart_pops,
- .iotype = UPIO_MEM,
- .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SMC2].port.lock),
- },
- .flags = FLAG_SMC,
- .tx_nrfifos = TX_NUM_FIFO,
- .tx_fifosize = TX_BUF_SIZE,
- .rx_nrfifos = RX_NUM_FIFO,
- .rx_fifosize = RX_BUF_SIZE,
- .set_lineif = smc2_lineif,
-#ifdef CONFIG_SERIAL_CPM_ALT_SMC2
- .is_portb = 1,
-#endif
- },
- [UART_SCC1] = {
- .port = {
- .irq = SCC1_IRQ,
- .ops = &cpm_uart_pops,
- .iotype = UPIO_MEM,
- .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC1].port.lock),
- },
- .tx_nrfifos = TX_NUM_FIFO,
- .tx_fifosize = TX_BUF_SIZE,
- .rx_nrfifos = RX_NUM_FIFO,
- .rx_fifosize = RX_BUF_SIZE,
- .set_lineif = scc1_lineif,
- .wait_closing = SCC_WAIT_CLOSING,
- },
- [UART_SCC2] = {
- .port = {
- .irq = SCC2_IRQ,
- .ops = &cpm_uart_pops,
- .iotype = UPIO_MEM,
- .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC2].port.lock),
- },
- .tx_nrfifos = TX_NUM_FIFO,
- .tx_fifosize = TX_BUF_SIZE,
- .rx_nrfifos = RX_NUM_FIFO,
- .rx_fifosize = RX_BUF_SIZE,
- .set_lineif = scc2_lineif,
- .wait_closing = SCC_WAIT_CLOSING,
- },
- [UART_SCC3] = {
- .port = {
- .irq = SCC3_IRQ,
- .ops = &cpm_uart_pops,
- .iotype = UPIO_MEM,
- .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC3].port.lock),
- },
- .tx_nrfifos = TX_NUM_FIFO,
- .tx_fifosize = TX_BUF_SIZE,
- .rx_nrfifos = RX_NUM_FIFO,
- .rx_fifosize = RX_BUF_SIZE,
- .set_lineif = scc3_lineif,
- .wait_closing = SCC_WAIT_CLOSING,
- },
- [UART_SCC4] = {
- .port = {
- .irq = SCC4_IRQ,
- .ops = &cpm_uart_pops,
- .iotype = UPIO_MEM,
- .lock = __SPIN_LOCK_UNLOCKED(cpm_uart_ports[UART_SCC4].port.lock),
- },
- .tx_nrfifos = TX_NUM_FIFO,
- .tx_fifosize = TX_BUF_SIZE,
- .rx_nrfifos = RX_NUM_FIFO,
- .rx_fifosize = RX_BUF_SIZE,
- .set_lineif = scc4_lineif,
- .wait_closing = SCC_WAIT_CLOSING,
- },
-};
-
-int cpm_uart_drv_get_platform_data(struct platform_device *pdev, int is_con)
-{
- struct resource *r;
- struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
- int idx; /* It is UART_SMCx or UART_SCCx index */
- struct uart_cpm_port *pinfo;
- int line;
- u32 mem, pram;
-
- idx = pdata->fs_no = fs_uart_get_id(pdata);
-
- line = cpm_uart_id2nr(idx);
- if(line < 0) {
- printk(KERN_ERR"%s(): port %d is not registered", __func__, idx);
- return -EINVAL;
- }
-
- pinfo = (struct uart_cpm_port *) &cpm_uart_ports[idx];
-
- pinfo->brg = pdata->brg;
-
- if (!is_con) {
- pinfo->port.line = line;
- pinfo->port.flags = UPF_BOOT_AUTOCONF;
- }
-
- if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs")))
- return -EINVAL;
- mem = (u32)ioremap(r->start, r->end - r->start + 1);
-
- if (!(r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pram")))
- return -EINVAL;
- pram = (u32)ioremap(r->start, r->end - r->start + 1);
-
- if(idx > fsid_smc2_uart) {
- pinfo->sccp = (scc_t *)mem;
- pinfo->sccup = (scc_uart_t *)pram;
- } else {
- pinfo->smcp = (smc_t *)mem;
- pinfo->smcup = (smc_uart_t *)pram;
- }
- pinfo->tx_nrfifos = pdata->tx_num_fifo;
- pinfo->tx_fifosize = pdata->tx_buf_size;
-
- pinfo->rx_nrfifos = pdata->rx_num_fifo;
- pinfo->rx_fifosize = pdata->rx_buf_size;
-
- pinfo->port.uartclk = pdata->uart_clk;
- pinfo->port.mapbase = (unsigned long)mem;
- pinfo->port.irq = platform_get_irq(pdev, 0);
-
- return 0;
-}
-#endif
-
#ifdef CONFIG_SERIAL_CPM_CONSOLE
/*
* Print a string to the serial port trying not to disturb
@@ -1169,15 +971,18 @@
static void cpm_uart_console_write(struct console *co, const char *s,
u_int count)
{
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
-#else
- struct uart_cpm_port *pinfo =
- &cpm_uart_ports[cpm_uart_port_map[co->index]];
-#endif
unsigned int i;
cbd_t __iomem *bdp, *bdbase;
unsigned char *cp;
+ unsigned long flags;
+ int nolock = oops_in_progress;
+
+ if (unlikely(nolock)) {
+ local_irq_save(flags);
+ } else {
+ spin_lock_irqsave(&pinfo->port.lock, flags);
+ }
/* Get the address of the host memory buffer.
*/
@@ -1239,6 +1044,12 @@
;
pinfo->tx_cur = bdp;
+
+ if (unlikely(nolock)) {
+ local_irq_restore(flags);
+ } else {
+ spin_unlock_irqrestore(&pinfo->port.lock, flags);
+ }
}
@@ -1252,7 +1063,6 @@
struct uart_cpm_port *pinfo;
struct uart_port *port;
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
struct device_node *np = NULL;
int i = 0;
@@ -1284,35 +1094,6 @@
if (ret)
return ret;
-#else
-
- struct fs_uart_platform_info *pdata;
- struct platform_device* pdev = early_uart_get_pdev(co->index);
-
- if (!pdev) {
- pr_info("cpm_uart: console: compat mode\n");
- /* compatibility - will be cleaned up */
- cpm_uart_init_portdesc();
- }
-
- port =
- (struct uart_port *)&cpm_uart_ports[cpm_uart_port_map[co->index]];
- pinfo = (struct uart_cpm_port *)port;
- if (!pdev) {
- if (pinfo->set_lineif)
- pinfo->set_lineif(pinfo);
- } else {
- pdata = pdev->dev.platform_data;
- if (pdata)
- if (pdata->init_ioports)
- pdata->init_ioports(pdata);
-
- cpm_uart_drv_get_platform_data(pdev, 1);
- }
-
- pinfo->flags |= FLAG_CONSOLE;
-#endif
-
if (options) {
uart_parse_options(options, &baud, &parity, &bits, &flow);
} else {
@@ -1386,7 +1167,6 @@
.nr = UART_NR,
};
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
static int probe_index;
static int __devinit cpm_uart_probe(struct of_device *ofdev,
@@ -1457,135 +1237,6 @@
of_unregister_platform_driver(&cpm_uart_driver);
uart_unregister_driver(&cpm_reg);
}
-#else
-static int cpm_uart_drv_probe(struct device *dev)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct fs_uart_platform_info *pdata;
- int ret = -ENODEV;
-
- if(!pdev) {
- printk(KERN_ERR"CPM UART: platform data missing!\n");
- return ret;
- }
-
- pdata = pdev->dev.platform_data;
-
- if ((ret = cpm_uart_drv_get_platform_data(pdev, 0)))
- return ret;
-
- pr_debug("cpm_uart_drv_probe: Adding CPM UART %d\n", cpm_uart_id2nr(pdata->fs_no));
-
- if (pdata->init_ioports)
- pdata->init_ioports(pdata);
-
- ret = uart_add_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
-
- return ret;
-}
-
-static int cpm_uart_drv_remove(struct device *dev)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct fs_uart_platform_info *pdata = pdev->dev.platform_data;
-
- pr_debug("cpm_uart_drv_remove: Removing CPM UART %d\n",
- cpm_uart_id2nr(pdata->fs_no));
-
- uart_remove_one_port(&cpm_reg, &cpm_uart_ports[pdata->fs_no].port);
- return 0;
-}
-
-static struct device_driver cpm_smc_uart_driver = {
- .name = "fsl-cpm-smc:uart",
- .bus = &platform_bus_type,
- .probe = cpm_uart_drv_probe,
- .remove = cpm_uart_drv_remove,
-};
-
-static struct device_driver cpm_scc_uart_driver = {
- .name = "fsl-cpm-scc:uart",
- .bus = &platform_bus_type,
- .probe = cpm_uart_drv_probe,
- .remove = cpm_uart_drv_remove,
-};
-
-/*
- This is supposed to match uart devices on platform bus,
- */
-static int match_is_uart (struct device* dev, void* data)
-{
- struct platform_device* pdev = container_of(dev, struct platform_device, dev);
- int ret = 0;
- /* this was setfunc as uart */
- if(strstr(pdev->name,":uart")) {
- ret = 1;
- }
- return ret;
-}
-
-
-static int cpm_uart_init(void) {
-
- int ret;
- int i;
- struct device *dev;
- printk(KERN_INFO "Serial: CPM driver $Revision: 0.02 $\n");
-
- /* lookup the bus for uart devices */
- dev = bus_find_device(&platform_bus_type, NULL, 0, match_is_uart);
-
- /* There are devices on the bus - all should be OK */
- if (dev) {
- cpm_uart_count();
- cpm_reg.nr = cpm_uart_nr;
-
- if (!(ret = uart_register_driver(&cpm_reg))) {
- if ((ret = driver_register(&cpm_smc_uart_driver))) {
- uart_unregister_driver(&cpm_reg);
- return ret;
- }
- if ((ret = driver_register(&cpm_scc_uart_driver))) {
- driver_unregister(&cpm_scc_uart_driver);
- uart_unregister_driver(&cpm_reg);
- }
- }
- } else {
- /* No capable platform devices found - falling back to legacy mode */
- pr_info("cpm_uart: WARNING: no UART devices found on platform bus!\n");
- pr_info(
- "cpm_uart: the driver will guess configuration, but this mode is no longer supported.\n");
-
- /* Don't run this again, if the console driver did it already */
- if (cpm_uart_nr == 0)
- cpm_uart_init_portdesc();
-
- cpm_reg.nr = cpm_uart_nr;
- ret = uart_register_driver(&cpm_reg);
-
- if (ret)
- return ret;
-
- for (i = 0; i < cpm_uart_nr; i++) {
- int con = cpm_uart_port_map[i];
- cpm_uart_ports[con].port.line = i;
- cpm_uart_ports[con].port.flags = UPF_BOOT_AUTOCONF;
- if (cpm_uart_ports[con].set_lineif)
- cpm_uart_ports[con].set_lineif(&cpm_uart_ports[con]);
- uart_add_one_port(&cpm_reg, &cpm_uart_ports[con].port);
- }
-
- }
- return ret;
-}
-
-static void __exit cpm_uart_exit(void)
-{
- driver_unregister(&cpm_scc_uart_driver);
- driver_unregister(&cpm_smc_uart_driver);
- uart_unregister_driver(&cpm_reg);
-}
-#endif
module_init(cpm_uart_init);
module_exit(cpm_uart_exit);
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
index 74f1432..0f0aff0 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
@@ -9,7 +9,7 @@
* Copyright (C) 2004 Freescale Semiconductor, Inc.
* (C) 2004 Intracom, S.A.
* (C) 2006 MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
+ * Vitaly Bordug <vbordug@ru.mvista.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -51,7 +51,6 @@
/**************************************************************/
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
{
cpm_command(port->command, cmd);
@@ -68,75 +67,6 @@
iounmap(pram);
}
-#else
-void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
-{
- ushort val;
- int line = port - cpm_uart_ports;
- volatile cpm8xx_t *cp = cpmp;
-
- switch (line) {
- case UART_SMC1:
- val = mk_cr_cmd(CPM_CR_CH_SMC1, cmd) | CPM_CR_FLG;
- break;
- case UART_SMC2:
- val = mk_cr_cmd(CPM_CR_CH_SMC2, cmd) | CPM_CR_FLG;
- break;
- case UART_SCC1:
- val = mk_cr_cmd(CPM_CR_CH_SCC1, cmd) | CPM_CR_FLG;
- break;
- case UART_SCC2:
- val = mk_cr_cmd(CPM_CR_CH_SCC2, cmd) | CPM_CR_FLG;
- break;
- case UART_SCC3:
- val = mk_cr_cmd(CPM_CR_CH_SCC3, cmd) | CPM_CR_FLG;
- break;
- case UART_SCC4:
- val = mk_cr_cmd(CPM_CR_CH_SCC4, cmd) | CPM_CR_FLG;
- break;
- default:
- return;
-
- }
- cp->cp_cpcr = val;
- while (cp->cp_cpcr & CPM_CR_FLG) ;
-}
-
-void smc1_lineif(struct uart_cpm_port *pinfo)
-{
- pinfo->brg = 1;
-}
-
-void smc2_lineif(struct uart_cpm_port *pinfo)
-{
- pinfo->brg = 2;
-}
-
-void scc1_lineif(struct uart_cpm_port *pinfo)
-{
- /* XXX SCC1: insert port configuration here */
- pinfo->brg = 1;
-}
-
-void scc2_lineif(struct uart_cpm_port *pinfo)
-{
- /* XXX SCC2: insert port configuration here */
- pinfo->brg = 2;
-}
-
-void scc3_lineif(struct uart_cpm_port *pinfo)
-{
- /* XXX SCC3: insert port configuration here */
- pinfo->brg = 3;
-}
-
-void scc4_lineif(struct uart_cpm_port *pinfo)
-{
- /* XXX SCC4: insert port configuration here */
- pinfo->brg = 4;
-}
-#endif
-
/*
* Allocate DP-Ram and memory buffers. We need to allocate a transmit and
* receive buffer descriptors from dual port ram, and a character
@@ -205,101 +135,3 @@
cpm_dpfree(pinfo->dp_addr);
}
-
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Setup any dynamic params in the uart desc */
-int cpm_uart_init_portdesc(void)
-{
- pr_debug("CPM uart[-]:init portdesc\n");
-
- cpm_uart_nr = 0;
-#ifdef CONFIG_SERIAL_CPM_SMC1
- cpm_uart_ports[UART_SMC1].smcp = &cpmp->cp_smc[0];
-/*
- * Is SMC1 being relocated?
- */
-# ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
- cpm_uart_ports[UART_SMC1].smcup =
- (smc_uart_t *) & cpmp->cp_dparam[0x3C0];
-# else
- cpm_uart_ports[UART_SMC1].smcup =
- (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC1];
-# endif
- cpm_uart_ports[UART_SMC1].port.mapbase =
- (unsigned long)&cpmp->cp_smc[0];
- cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
- cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
- cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
- cpm_uart_ports[UART_SMC2].smcp = &cpmp->cp_smc[1];
- cpm_uart_ports[UART_SMC2].smcup =
- (smc_uart_t *) & cpmp->cp_dparam[PROFF_SMC2];
- cpm_uart_ports[UART_SMC2].port.mapbase =
- (unsigned long)&cpmp->cp_smc[1];
- cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
- cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
- cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
- cpm_uart_ports[UART_SCC1].sccp = &cpmp->cp_scc[0];
- cpm_uart_ports[UART_SCC1].sccup =
- (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC1];
- cpm_uart_ports[UART_SCC1].port.mapbase =
- (unsigned long)&cpmp->cp_scc[0];
- cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
- ~(UART_SCCM_TX | UART_SCCM_RX);
- cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
- ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
- cpm_uart_ports[UART_SCC2].sccp = &cpmp->cp_scc[1];
- cpm_uart_ports[UART_SCC2].sccup =
- (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC2];
- cpm_uart_ports[UART_SCC2].port.mapbase =
- (unsigned long)&cpmp->cp_scc[1];
- cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
- ~(UART_SCCM_TX | UART_SCCM_RX);
- cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
- ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC3
- cpm_uart_ports[UART_SCC3].sccp = &cpmp->cp_scc[2];
- cpm_uart_ports[UART_SCC3].sccup =
- (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC3];
- cpm_uart_ports[UART_SCC3].port.mapbase =
- (unsigned long)&cpmp->cp_scc[2];
- cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
- ~(UART_SCCM_TX | UART_SCCM_RX);
- cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
- ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC4
- cpm_uart_ports[UART_SCC4].sccp = &cpmp->cp_scc[3];
- cpm_uart_ports[UART_SCC4].sccup =
- (scc_uart_t *) & cpmp->cp_dparam[PROFF_SCC4];
- cpm_uart_ports[UART_SCC4].port.mapbase =
- (unsigned long)&cpmp->cp_scc[3];
- cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
- ~(UART_SCCM_TX | UART_SCCM_RX);
- cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
- ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
-#endif
- return 0;
-}
-#endif
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.h b/drivers/serial/cpm_uart/cpm_uart_cpm1.h
index ddf46d3..10eecd6 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.h
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.h
@@ -2,7 +2,7 @@
* linux/drivers/serial/cpm_uart/cpm_uart_cpm1.h
*
* Driver for CPM (SCC/SMC) serial ports
- *
+ *
* definitions for cpm1
*
*/
@@ -12,16 +12,6 @@
#include <asm/cpm1.h>
-/* defines for IRQs */
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-#define SMC1_IRQ (CPM_IRQ_OFFSET + CPMVEC_SMC1)
-#define SMC2_IRQ (CPM_IRQ_OFFSET + CPMVEC_SMC2)
-#define SCC1_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC1)
-#define SCC2_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC2)
-#define SCC3_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC3)
-#define SCC4_IRQ (CPM_IRQ_OFFSET + CPMVEC_SCC4)
-#endif
-
static inline void cpm_set_brg(int brg, int baud)
{
cpm_setbrg(brg, baud);
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index bb862e2..b8db4d3 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -5,11 +5,11 @@
*
* Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
* Pantelis Antoniou (panto@intracom.gr) (CPM1)
- *
+ *
* Copyright (C) 2004 Freescale Semiconductor, Inc.
* (C) 2004 Intracom, S.A.
* (C) 2006 MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
+ * Vitaly Bordug <vbordug@ru.mvista.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -41,9 +41,7 @@
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/fs_pd.h>
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
#include <asm/prom.h>
-#endif
#include <linux/serial_core.h>
#include <linux/kernel.h>
@@ -52,7 +50,6 @@
/**************************************************************/
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
{
cpm_command(port->command, cmd);
@@ -106,174 +103,8 @@
iounmap(pram);
}
-#else
-void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd)
-{
- ulong val;
- int line = port - cpm_uart_ports;
- volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
-
-
- switch (line) {
- case UART_SMC1:
- val = mk_cr_cmd(CPM_CR_SMC1_PAGE, CPM_CR_SMC1_SBLOCK, 0,
- cmd) | CPM_CR_FLG;
- break;
- case UART_SMC2:
- val = mk_cr_cmd(CPM_CR_SMC2_PAGE, CPM_CR_SMC2_SBLOCK, 0,
- cmd) | CPM_CR_FLG;
- break;
- case UART_SCC1:
- val = mk_cr_cmd(CPM_CR_SCC1_PAGE, CPM_CR_SCC1_SBLOCK, 0,
- cmd) | CPM_CR_FLG;
- break;
- case UART_SCC2:
- val = mk_cr_cmd(CPM_CR_SCC2_PAGE, CPM_CR_SCC2_SBLOCK, 0,
- cmd) | CPM_CR_FLG;
- break;
- case UART_SCC3:
- val = mk_cr_cmd(CPM_CR_SCC3_PAGE, CPM_CR_SCC3_SBLOCK, 0,
- cmd) | CPM_CR_FLG;
- break;
- case UART_SCC4:
- val = mk_cr_cmd(CPM_CR_SCC4_PAGE, CPM_CR_SCC4_SBLOCK, 0,
- cmd) | CPM_CR_FLG;
- break;
- default:
- return;
-
- }
- cp->cp_cpcr = val;
- while (cp->cp_cpcr & CPM_CR_FLG) ;
-
- cpm2_unmap(cp);
-}
-
-void smc1_lineif(struct uart_cpm_port *pinfo)
-{
- volatile iop_cpm2_t *io = cpm2_map(im_ioport);
- volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
- /* SMC1 is only on port D */
- io->iop_ppard |= 0x00c00000;
- io->iop_pdird |= 0x00400000;
- io->iop_pdird &= ~0x00800000;
- io->iop_psord &= ~0x00c00000;
-
- /* Wire BRG1 to SMC1 */
- cpmux->cmx_smr &= 0x0f;
- pinfo->brg = 1;
-
- cpm2_unmap(cpmux);
- cpm2_unmap(io);
-}
-
-void smc2_lineif(struct uart_cpm_port *pinfo)
-{
- volatile iop_cpm2_t *io = cpm2_map(im_ioport);
- volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
- /* SMC2 is only on port A */
- io->iop_ppara |= 0x00c00000;
- io->iop_pdira |= 0x00400000;
- io->iop_pdira &= ~0x00800000;
- io->iop_psora &= ~0x00c00000;
-
- /* Wire BRG2 to SMC2 */
- cpmux->cmx_smr &= 0xf0;
- pinfo->brg = 2;
-
- cpm2_unmap(cpmux);
- cpm2_unmap(io);
-}
-
-void scc1_lineif(struct uart_cpm_port *pinfo)
-{
- volatile iop_cpm2_t *io = cpm2_map(im_ioport);
- volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
- /* Use Port D for SCC1 instead of other functions. */
- io->iop_ppard |= 0x00000003;
- io->iop_psord &= ~0x00000001; /* Rx */
- io->iop_psord |= 0x00000002; /* Tx */
- io->iop_pdird &= ~0x00000001; /* Rx */
- io->iop_pdird |= 0x00000002; /* Tx */
-
- /* Wire BRG1 to SCC1 */
- cpmux->cmx_scr &= 0x00ffffff;
- cpmux->cmx_scr |= 0x00000000;
- pinfo->brg = 1;
-
- cpm2_unmap(cpmux);
- cpm2_unmap(io);
-}
-
-void scc2_lineif(struct uart_cpm_port *pinfo)
-{
- /*
- * STx GP3 uses the SCC2 secondary option pin assignment
- * which this driver doesn't account for in the static
- * pin assignments. This kind of board specific info
- * really has to get out of the driver so boards can
- * be supported in a sane fashion.
- */
- volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-#ifndef CONFIG_STX_GP3
- volatile iop_cpm2_t *io = cpm2_map(im_ioport);
-
- io->iop_pparb |= 0x008b0000;
- io->iop_pdirb |= 0x00880000;
- io->iop_psorb |= 0x00880000;
- io->iop_pdirb &= ~0x00030000;
- io->iop_psorb &= ~0x00030000;
-#endif
- cpmux->cmx_scr &= 0xff00ffff;
- cpmux->cmx_scr |= 0x00090000;
- pinfo->brg = 2;
-
- cpm2_unmap(cpmux);
- cpm2_unmap(io);
-}
-
-void scc3_lineif(struct uart_cpm_port *pinfo)
-{
- volatile iop_cpm2_t *io = cpm2_map(im_ioport);
- volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
- io->iop_pparb |= 0x008b0000;
- io->iop_pdirb |= 0x00880000;
- io->iop_psorb |= 0x00880000;
- io->iop_pdirb &= ~0x00030000;
- io->iop_psorb &= ~0x00030000;
- cpmux->cmx_scr &= 0xffff00ff;
- cpmux->cmx_scr |= 0x00001200;
- pinfo->brg = 3;
-
- cpm2_unmap(cpmux);
- cpm2_unmap(io);
-}
-
-void scc4_lineif(struct uart_cpm_port *pinfo)
-{
- volatile iop_cpm2_t *io = cpm2_map(im_ioport);
- volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
-
- io->iop_ppard |= 0x00000600;
- io->iop_psord &= ~0x00000600; /* Tx/Rx */
- io->iop_pdird &= ~0x00000200; /* Rx */
- io->iop_pdird |= 0x00000400; /* Tx */
-
- cpmux->cmx_scr &= 0xffffff00;
- cpmux->cmx_scr |= 0x0000001b;
- pinfo->brg = 4;
-
- cpm2_unmap(cpmux);
- cpm2_unmap(io);
-}
-#endif
-
/*
- * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
+ * Allocate DP-Ram and memory buffers. We need to allocate a transmit and
* receive buffer descriptors from dual port ram, and a character
* buffer area from host mem. If we are allocating for the console we need
* to do it from bootmem
@@ -340,111 +171,3 @@
cpm_dpfree(pinfo->dp_addr);
}
-
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Setup any dynamic params in the uart desc */
-int cpm_uart_init_portdesc(void)
-{
-#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2)
- u16 *addr;
-#endif
- pr_debug("CPM uart[-]:init portdesc\n");
-
- cpm_uart_nr = 0;
-#ifdef CONFIG_SERIAL_CPM_SMC1
- cpm_uart_ports[UART_SMC1].smcp = (smc_t *) cpm2_map(im_smc[0]);
- cpm_uart_ports[UART_SMC1].port.mapbase =
- (unsigned long)cpm_uart_ports[UART_SMC1].smcp;
-
- cpm_uart_ports[UART_SMC1].smcup =
- (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC1], PROFF_SMC_SIZE);
- addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC1_BASE], 2);
- *addr = PROFF_SMC1;
- cpm2_unmap(addr);
-
- cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
- cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
- cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SMC1;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
- cpm_uart_ports[UART_SMC2].smcp = (smc_t *) cpm2_map(im_smc[1]);
- cpm_uart_ports[UART_SMC2].port.mapbase =
- (unsigned long)cpm_uart_ports[UART_SMC2].smcp;
-
- cpm_uart_ports[UART_SMC2].smcup =
- (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC2], PROFF_SMC_SIZE);
- addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC2_BASE], 2);
- *addr = PROFF_SMC2;
- cpm2_unmap(addr);
-
- cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
- cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
- cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SMC2;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
- cpm_uart_ports[UART_SCC1].sccp = (scc_t *) cpm2_map(im_scc[0]);
- cpm_uart_ports[UART_SCC1].port.mapbase =
- (unsigned long)cpm_uart_ports[UART_SCC1].sccp;
- cpm_uart_ports[UART_SCC1].sccup =
- (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC1], PROFF_SCC_SIZE);
-
- cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
- ~(UART_SCCM_TX | UART_SCCM_RX);
- cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
- ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- cpm_uart_ports[UART_SCC1].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC1;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
- cpm_uart_ports[UART_SCC2].sccp = (scc_t *) cpm2_map(im_scc[1]);
- cpm_uart_ports[UART_SCC2].port.mapbase =
- (unsigned long)cpm_uart_ports[UART_SCC2].sccp;
- cpm_uart_ports[UART_SCC2].sccup =
- (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC2], PROFF_SCC_SIZE);
-
- cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
- ~(UART_SCCM_TX | UART_SCCM_RX);
- cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
- ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- cpm_uart_ports[UART_SCC2].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC2;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC3
- cpm_uart_ports[UART_SCC3].sccp = (scc_t *) cpm2_map(im_scc[2]);
- cpm_uart_ports[UART_SCC3].port.mapbase =
- (unsigned long)cpm_uart_ports[UART_SCC3].sccp;
- cpm_uart_ports[UART_SCC3].sccup =
- (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC3], PROFF_SCC_SIZE);
-
- cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
- ~(UART_SCCM_TX | UART_SCCM_RX);
- cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
- ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- cpm_uart_ports[UART_SCC3].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC3;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC4
- cpm_uart_ports[UART_SCC4].sccp = (scc_t *) cpm2_map(im_scc[3]);
- cpm_uart_ports[UART_SCC4].port.mapbase =
- (unsigned long)cpm_uart_ports[UART_SCC4].sccp;
- cpm_uart_ports[UART_SCC4].sccup =
- (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC4], PROFF_SCC_SIZE);
-
- cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
- ~(UART_SCCM_TX | UART_SCCM_RX);
- cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
- ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
- cpm_uart_ports[UART_SCC4].port.uartclk = uart_clock();
- cpm_uart_port_map[cpm_uart_nr++] = UART_SCC4;
-#endif
-
- return 0;
-}
-#endif
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/serial/cpm_uart/cpm_uart_cpm2.h
index 40006a7..7194c63 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.h
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.h
@@ -2,7 +2,7 @@
* linux/drivers/serial/cpm_uart/cpm_uart_cpm2.h
*
* Driver for CPM (SCC/SMC) serial ports
- *
+ *
* definitions for cpm2
*
*/
@@ -12,16 +12,6 @@
#include <asm/cpm2.h>
-/* defines for IRQs */
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-#define SMC1_IRQ SIU_INT_SMC1
-#define SMC2_IRQ SIU_INT_SMC2
-#define SCC1_IRQ SIU_INT_SCC1
-#define SCC2_IRQ SIU_INT_SCC2
-#define SCC3_IRQ SIU_INT_SCC3
-#define SCC4_IRQ SIU_INT_SCC4
-#endif
-
static inline void cpm_set_brg(int brg, int baud)
{
cpm_setbrg(brg, baud);
diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c
index 25029c7..8fa0ff5 100644
--- a/drivers/serial/of_serial.c
+++ b/drivers/serial/of_serial.c
@@ -13,8 +13,8 @@
#include <linux/module.h>
#include <linux/serial_core.h>
#include <linux/serial_8250.h>
+#include <linux/of_platform.h>
-#include <asm/of_platform.h>
#include <asm/prom.h>
struct of_serial_info {
diff --git a/drivers/spi/mpc52xx_psc_spi.c b/drivers/spi/mpc52xx_psc_spi.c
index 681d623..604e5f0 100644
--- a/drivers/spi/mpc52xx_psc_spi.c
+++ b/drivers/spi/mpc52xx_psc_spi.c
@@ -17,7 +17,7 @@
#include <linux/interrupt.h>
#if defined(CONFIG_PPC_MERGE)
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
#else
#include <linux/platform_device.h>
#endif
diff --git a/drivers/video/platinumfb.c b/drivers/video/platinumfb.c
index cbe71a5..03b3670 100644
--- a/drivers/video/platinumfb.c
+++ b/drivers/video/platinumfb.c
@@ -31,11 +31,11 @@
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/nvram.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/pgtable.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include "macmodes.h"
#include "platinumfb.h"
diff --git a/drivers/w1/masters/ds2482.c b/drivers/w1/masters/ds2482.c
index 0fd5820..df52cb3 100644
--- a/drivers/w1/masters/ds2482.c
+++ b/drivers/w1/masters/ds2482.c
@@ -94,21 +94,31 @@
#define DS2482_REG_STS_1WB 0x01
-static int ds2482_attach_adapter(struct i2c_adapter *adapter);
-static int ds2482_detect(struct i2c_adapter *adapter, int address, int kind);
-static int ds2482_detach_client(struct i2c_client *client);
+static int ds2482_probe(struct i2c_client *client,
+ const struct i2c_device_id *id);
+static int ds2482_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info);
+static int ds2482_remove(struct i2c_client *client);
/**
* Driver data (common to all clients)
*/
+static const struct i2c_device_id ds2482_id[] = {
+ { "ds2482", 0 },
+ { }
+};
+
static struct i2c_driver ds2482_driver = {
.driver = {
.owner = THIS_MODULE,
.name = "ds2482",
},
- .attach_adapter = ds2482_attach_adapter,
- .detach_client = ds2482_detach_client,
+ .probe = ds2482_probe,
+ .remove = ds2482_remove,
+ .id_table = ds2482_id,
+ .detect = ds2482_detect,
+ .address_data = &addr_data,
};
/*
@@ -124,7 +134,7 @@
};
struct ds2482_data {
- struct i2c_client client;
+ struct i2c_client *client;
struct mutex access_lock;
/* 1-wire interface(s) */
@@ -147,7 +157,7 @@
static inline int ds2482_select_register(struct ds2482_data *pdev, u8 read_ptr)
{
if (pdev->read_prt != read_ptr) {
- if (i2c_smbus_write_byte_data(&pdev->client,
+ if (i2c_smbus_write_byte_data(pdev->client,
DS2482_CMD_SET_READ_PTR,
read_ptr) < 0)
return -1;
@@ -167,7 +177,7 @@
*/
static inline int ds2482_send_cmd(struct ds2482_data *pdev, u8 cmd)
{
- if (i2c_smbus_write_byte(&pdev->client, cmd) < 0)
+ if (i2c_smbus_write_byte(pdev->client, cmd) < 0)
return -1;
pdev->read_prt = DS2482_PTR_CODE_STATUS;
@@ -187,7 +197,7 @@
static inline int ds2482_send_cmd_data(struct ds2482_data *pdev,
u8 cmd, u8 byte)
{
- if (i2c_smbus_write_byte_data(&pdev->client, cmd, byte) < 0)
+ if (i2c_smbus_write_byte_data(pdev->client, cmd, byte) < 0)
return -1;
/* all cmds leave in STATUS, except CONFIG */
@@ -216,7 +226,7 @@
if (!ds2482_select_register(pdev, DS2482_PTR_CODE_STATUS)) {
do {
- temp = i2c_smbus_read_byte(&pdev->client);
+ temp = i2c_smbus_read_byte(pdev->client);
} while ((temp >= 0) && (temp & DS2482_REG_STS_1WB) &&
(++retries < DS2482_WAIT_IDLE_TIMEOUT));
}
@@ -238,13 +248,13 @@
*/
static int ds2482_set_channel(struct ds2482_data *pdev, u8 channel)
{
- if (i2c_smbus_write_byte_data(&pdev->client, DS2482_CMD_CHANNEL_SELECT,
+ if (i2c_smbus_write_byte_data(pdev->client, DS2482_CMD_CHANNEL_SELECT,
ds2482_chan_wr[channel]) < 0)
return -1;
pdev->read_prt = DS2482_PTR_CODE_CHANNEL;
pdev->channel = -1;
- if (i2c_smbus_read_byte(&pdev->client) == ds2482_chan_rd[channel]) {
+ if (i2c_smbus_read_byte(pdev->client) == ds2482_chan_rd[channel]) {
pdev->channel = channel;
return 0;
}
@@ -368,7 +378,7 @@
ds2482_select_register(pdev, DS2482_PTR_CODE_DATA);
/* Read the data byte */
- result = i2c_smbus_read_byte(&pdev->client);
+ result = i2c_smbus_read_byte(pdev->client);
mutex_unlock(&pdev->access_lock);
@@ -415,47 +425,38 @@
}
-/**
- * Called to see if the device exists on an i2c bus.
- */
-static int ds2482_attach_adapter(struct i2c_adapter *adapter)
+static int ds2482_detect(struct i2c_client *client, int kind,
+ struct i2c_board_info *info)
{
- return i2c_probe(adapter, &addr_data, ds2482_detect);
-}
-
-
-/*
- * The following function does more than just detection. If detection
- * succeeds, it also registers the new chip.
- */
-static int ds2482_detect(struct i2c_adapter *adapter, int address, int kind)
-{
- struct ds2482_data *data;
- struct i2c_client *new_client;
- int err = 0;
- int temp1;
- int idx;
-
- if (!i2c_check_functionality(adapter,
+ if (!i2c_check_functionality(client->adapter,
I2C_FUNC_SMBUS_WRITE_BYTE_DATA |
I2C_FUNC_SMBUS_BYTE))
- goto exit;
+ return -ENODEV;
+
+ strlcpy(info->type, "ds2482", I2C_NAME_SIZE);
+
+ return 0;
+}
+
+static int ds2482_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ struct ds2482_data *data;
+ int err = -ENODEV;
+ int temp1;
+ int idx;
if (!(data = kzalloc(sizeof(struct ds2482_data), GFP_KERNEL))) {
err = -ENOMEM;
goto exit;
}
- new_client = &data->client;
- i2c_set_clientdata(new_client, data);
- new_client->addr = address;
- new_client->driver = &ds2482_driver;
- new_client->adapter = adapter;
+ data->client = client;
+ i2c_set_clientdata(client, data);
/* Reset the device (sets the read_ptr to status) */
if (ds2482_send_cmd(data, DS2482_CMD_RESET) < 0) {
- dev_dbg(&adapter->dev, "DS2482 reset failed at 0x%02x.\n",
- address);
+ dev_warn(&client->dev, "DS2482 reset failed.\n");
goto exit_free;
}
@@ -463,10 +464,10 @@
ndelay(525);
/* Read the status byte - only reset bit and line should be set */
- temp1 = i2c_smbus_read_byte(new_client);
+ temp1 = i2c_smbus_read_byte(client);
if (temp1 != (DS2482_REG_STS_LL | DS2482_REG_STS_RST)) {
- dev_dbg(&adapter->dev, "DS2482 (0x%02x) reset status "
- "0x%02X - not a DS2482\n", address, temp1);
+ dev_warn(&client->dev, "DS2482 reset status "
+ "0x%02X - not a DS2482\n", temp1);
goto exit_free;
}
@@ -478,16 +479,8 @@
/* Set all config items to 0 (off) */
ds2482_send_cmd_data(data, DS2482_CMD_WRITE_CONFIG, 0xF0);
- /* We can fill in the remaining client fields */
- snprintf(new_client->name, sizeof(new_client->name), "ds2482-%d00",
- data->w1_count);
-
mutex_init(&data->access_lock);
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
- goto exit_free;
-
/* Register 1-wire interface(s) */
for (idx = 0; idx < data->w1_count; idx++) {
data->w1_ch[idx].pdev = data;
@@ -511,8 +504,6 @@
return 0;
exit_w1_remove:
- i2c_detach_client(new_client);
-
for (idx = 0; idx < data->w1_count; idx++) {
if (data->w1_ch[idx].pdev != NULL)
w1_remove_master_device(&data->w1_ch[idx].w1_bm);
@@ -523,10 +514,10 @@
return err;
}
-static int ds2482_detach_client(struct i2c_client *client)
+static int ds2482_remove(struct i2c_client *client)
{
struct ds2482_data *data = i2c_get_clientdata(client);
- int err, idx;
+ int idx;
/* Unregister the 1-wire bridge(s) */
for (idx = 0; idx < data->w1_count; idx++) {
@@ -534,13 +525,6 @@
w1_remove_master_device(&data->w1_ch[idx].w1_bm);
}
- /* Detach the i2c device */
- if ((err = i2c_detach_client(client))) {
- dev_err(&client->dev,
- "Deregistration failed, client not detached.\n");
- return err;
- }
-
/* Free the memory */
kfree(data);
return 0;
diff --git a/drivers/watchdog/mpc5200_wdt.c b/drivers/watchdog/mpc5200_wdt.c
index 80a91d4..77c1c2a 100644
--- a/drivers/watchdog/mpc5200_wdt.c
+++ b/drivers/watchdog/mpc5200_wdt.c
@@ -4,7 +4,7 @@
#include <linux/watchdog.h>
#include <linux/io.h>
#include <linux/spinlock.h>
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
#include <asm/uaccess.h>
#include <asm/mpc52xx.h>
diff --git a/firmware/.gitignore b/firmware/.gitignore
new file mode 100644
index 0000000..d9c6901
--- /dev/null
+++ b/firmware/.gitignore
@@ -0,0 +1,6 @@
+*.gen.S
+*.fw
+*.bin
+*.csp
+*.dsp
+ihex2fw
diff --git a/firmware/Makefile b/firmware/Makefile
index e4f2fb3..9fe8604 100644
--- a/firmware/Makefile
+++ b/firmware/Makefile
@@ -56,7 +56,7 @@
fw-shipped-$(CONFIG_USB_SERIAL_KEYSPAN_USA49W) += keyspan/usa49w.fw
fw-shipped-$(CONFIG_USB_SERIAL_KEYSPAN_USA49WLC) += keyspan/usa49wlc.fw
else
-fw-shipped- := keyspan/mpr.fw keyspan/usa18x.fw keyspan/usa19.fw \
+fw-shipped- += keyspan/mpr.fw keyspan/usa18x.fw keyspan/usa19.fw \
keyspan/usa19qi.fw keyspan/usa19qw.fw keyspan/usa19w.fw \
keyspan/usa28.fw keyspan/usa28xa.fw keyspan/usa28xb.fw \
keyspan/usa28x.fw keyspan/usa49w.fw keyspan/usa49wlc.fw
diff --git a/fs/compat_ioctl.c b/fs/compat_ioctl.c
index 97dba0d..c54eaab 100644
--- a/fs/compat_ioctl.c
+++ b/fs/compat_ioctl.c
@@ -69,9 +69,11 @@
#include <linux/capi.h>
#include <linux/gigaset_dev.h>
+#ifdef CONFIG_BLOCK
#include <scsi/scsi.h>
#include <scsi/scsi_ioctl.h>
#include <scsi/sg.h>
+#endif
#include <asm/uaccess.h>
#include <linux/ethtool.h>
@@ -2024,6 +2026,7 @@
COMPATIBLE_IOCTL(PIO_UNISCRNMAP)
COMPATIBLE_IOCTL(PIO_FONTRESET)
COMPATIBLE_IOCTL(PIO_UNIMAPCLR)
+#ifdef CONFIG_BLOCK
/* Big S */
COMPATIBLE_IOCTL(SCSI_IOCTL_GET_IDLUN)
COMPATIBLE_IOCTL(SCSI_IOCTL_DOORLOCK)
@@ -2033,6 +2036,7 @@
COMPATIBLE_IOCTL(SCSI_IOCTL_SEND_COMMAND)
COMPATIBLE_IOCTL(SCSI_IOCTL_PROBE_HOST)
COMPATIBLE_IOCTL(SCSI_IOCTL_GET_PCI)
+#endif
/* Big T */
COMPATIBLE_IOCTL(TUNSETNOCSUM)
COMPATIBLE_IOCTL(TUNSETDEBUG)
@@ -2103,6 +2107,7 @@
COMPATIBLE_IOCTL(SIOCSIFVLAN)
COMPATIBLE_IOCTL(SIOCBRADDBR)
COMPATIBLE_IOCTL(SIOCBRDELBR)
+#ifdef CONFIG_BLOCK
/* SG stuff */
COMPATIBLE_IOCTL(SG_SET_TIMEOUT)
COMPATIBLE_IOCTL(SG_GET_TIMEOUT)
@@ -2127,6 +2132,7 @@
COMPATIBLE_IOCTL(SG_GET_REQUEST_TABLE)
COMPATIBLE_IOCTL(SG_SET_KEEP_ORPHAN)
COMPATIBLE_IOCTL(SG_GET_KEEP_ORPHAN)
+#endif
/* PPP stuff */
COMPATIBLE_IOCTL(PPPIOCGFLAGS)
COMPATIBLE_IOCTL(PPPIOCSFLAGS)
diff --git a/include/asm-mips/barrier.h b/include/asm-mips/barrier.h
index 9d8cfbb..8e9ac31 100644
--- a/include/asm-mips/barrier.h
+++ b/include/asm-mips/barrier.h
@@ -92,11 +92,25 @@
#define fast_wmb() __sync()
#define fast_rmb() __sync()
#define fast_mb() __sync()
+#ifdef CONFIG_SGI_IP28
+#define fast_iob() \
+ __asm__ __volatile__( \
+ ".set push\n\t" \
+ ".set noreorder\n\t" \
+ "lw $0,%0\n\t" \
+ "sync\n\t" \
+ "lw $0,%0\n\t" \
+ ".set pop" \
+ : /* no output */ \
+ : "m" (*(int *)CKSEG1ADDR(0x1fa00004)) \
+ : "memory")
+#else
#define fast_iob() \
do { \
__sync(); \
__fast_iob(); \
} while (0)
+#endif
#ifdef CONFIG_CPU_HAS_WB
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h
index 6427247..9a7274b 100644
--- a/include/asm-mips/bitops.h
+++ b/include/asm-mips/bitops.h
@@ -82,7 +82,7 @@
"2: b 1b \n"
" .previous \n"
: "=&r" (temp), "=m" (*m)
- : "ir" (bit), "m" (*m), "r" (~0));
+ : "i" (bit), "m" (*m), "r" (~0));
#endif /* CONFIG_CPU_MIPSR2 */
} else if (cpu_has_llsc) {
__asm__ __volatile__(
@@ -147,7 +147,7 @@
"2: b 1b \n"
" .previous \n"
: "=&r" (temp), "=m" (*m)
- : "ir" (bit), "m" (*m));
+ : "i" (bit), "m" (*m));
#endif /* CONFIG_CPU_MIPSR2 */
} else if (cpu_has_llsc) {
__asm__ __volatile__(
@@ -428,7 +428,7 @@
"2: b 1b \n"
" .previous \n"
: "=&r" (temp), "=m" (*m), "=&r" (res)
- : "ri" (bit), "m" (*m)
+ : "i" (bit), "m" (*m)
: "memory");
#endif
} else if (cpu_has_llsc) {
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index e031bdf..d39e143 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -26,13 +26,6 @@
#define MACH_UNKNOWN 0 /* whatever... */
/*
- * Valid machtype values for group JAZZ
- */
-#define MACH_ACER_PICA_61 0 /* Acer PICA-61 (PICA1) */
-#define MACH_MIPS_MAGNUM_4000 1 /* Mips Magnum 4000 "RC4030" */
-#define MACH_OLIVETTI_M700 2 /* Olivetti M700-10 (-15 ??) */
-
-/*
* Valid machtype for group DEC
*/
#define MACH_DSUNKNOWN 0
@@ -48,42 +41,6 @@
#define MACH_DS5900 10 /* DECsystem 5900 */
/*
- * Valid machtype for group SNI_RM
- */
-#define MACH_SNI_RM200_PCI 0 /* RM200/RM300/RM400 PCI series */
-
-/*
- * Valid machtype for group SGI
- */
-#define MACH_SGI_IP22 0 /* Indy, Indigo2, Challenge S */
-#define MACH_SGI_IP27 1 /* Origin 200, Origin 2000, Onyx 2 */
-#define MACH_SGI_IP28 2 /* Indigo2 Impact */
-#define MACH_SGI_IP32 3 /* O2 */
-#define MACH_SGI_IP30 4 /* Octane, Octane2 */
-
-/*
- * Valid machtypes for group Toshiba
- */
-#define MACH_PALLAS 0
-#define MACH_TOPAS 1
-#define MACH_JMR 2
-#define MACH_TOSHIBA_JMR3927 3 /* JMR-TX3927 CPU/IO board */
-#define MACH_TOSHIBA_RBTX4927 4
-#define MACH_TOSHIBA_RBTX4937 5
-#define MACH_TOSHIBA_RBTX4938 6
-
-/*
- * Valid machtype for group LASAT
- */
-#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
-#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
-
-/*
- * Valid machtype for group NEC EMMA2RH
- */
-#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
-
-/*
* Valid machtype for group PMC-MSP
*/
#define MACH_MSP4200_EVAL 0 /* PMC-Sierra MSP4200 Evaluation */
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 1c35cac..229a786 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -66,8 +66,10 @@
#define PRID_IMP_RM7000 0x2700
#define PRID_IMP_NEVADA 0x2800 /* RM5260 ??? */
#define PRID_IMP_RM9000 0x3400
+#define PRID_IMP_LOONGSON1 0x4200
#define PRID_IMP_R5432 0x5400
#define PRID_IMP_R5500 0x5500
+#define PRID_IMP_LOONGSON2 0x6300
#define PRID_IMP_UNKNOWN 0xff00
@@ -90,8 +92,6 @@
#define PRID_IMP_24KE 0x9600
#define PRID_IMP_74K 0x9700
#define PRID_IMP_1004K 0x9900
-#define PRID_IMP_LOONGSON1 0x4200
-#define PRID_IMP_LOONGSON2 0x6300
/*
* These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
diff --git a/include/asm-mips/dec/kn05.h b/include/asm-mips/dec/kn05.h
index 15fe8f8..56d22dc 100644
--- a/include/asm-mips/dec/kn05.h
+++ b/include/asm-mips/dec/kn05.h
@@ -6,7 +6,7 @@
* KN04-CA) and DECsystem 5900/260 (KN05) R4k CPU card MB ASIC
* definitions.
*
- * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
+ * Copyright (C) 2002, 2003, 2005, 2008 Maciej W. Rozycki
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -54,11 +54,11 @@
*/
#define KN4K_MB_INT_TC (1<<0) /* TURBOchannel? */
#define KN4K_MB_INT_RTC (1<<1) /* RTC? */
-#define KN4K_MB_INT_MT (1<<3) /* ??? */
+#define KN4K_MB_INT_MT (1<<3) /* I/O ASIC cascade */
/*
* Bits for the MB control & status register.
- * Set to 0x00bf8001 on my system by the ROM.
+ * Set to 0x00bf8001 for KN05 and to 0x003f8000 for KN04 by the firmware.
*/
#define KN4K_MB_CSR_PF (1<<0) /* PreFetching enable? */
#define KN4K_MB_CSR_F (1<<1) /* ??? */
@@ -69,7 +69,8 @@
#define KN4K_MB_CSR_IM (1<<13) /* ??? */
#define KN4K_MB_CSR_NC (1<<14) /* ??? */
#define KN4K_MB_CSR_EE (1<<15) /* (bus) Exception Enable? */
-#define KN4K_MB_CSR_MSK (0x1f<<16) /* ??? */
+#define KN4K_MB_CSR_MSK (0x1f<<16) /* CPU Int[4:0] mask */
#define KN4K_MB_CSR_FW (1<<21) /* ??? */
+#define KN4K_MB_CSR_W (1<<31) /* ??? */
#endif /* __ASM_MIPS_DEC_KN05_H */
diff --git a/include/asm-mips/inventory.h b/include/asm-mips/inventory.h
deleted file mode 100644
index cc88aed..0000000
--- a/include/asm-mips/inventory.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * Miguel de Icaza
- */
-#ifndef __ASM_INVENTORY_H
-#define __ASM_INVENTORY_H
-
-#include <linux/compiler.h>
-
-typedef struct inventory_s {
- struct inventory_s *inv_next;
- int inv_class;
- int inv_type;
- int inv_controller;
- int inv_unit;
- int inv_state;
-} inventory_t;
-
-extern int inventory_items;
-
-extern void add_to_inventory(int class, int type, int controller, int unit, int state);
-extern int dump_inventory_to_user(void __user *userbuf, int size);
-extern int __init init_inventory(void);
-
-#endif /* __ASM_INVENTORY_H */
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index f18d281..501a40b 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -161,13 +161,6 @@
#define bus_to_virt phys_to_virt
/*
- * isa_slot_offset is the address where E(ISA) busaddress 0 is mapped
- * for the processor. This implies the assumption that there is only
- * one of these busses.
- */
-extern unsigned long isa_slot_offset;
-
-/*
* Change "struct page" to physical address.
*/
#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
@@ -528,16 +521,6 @@
}
/*
- * ISA space is 'always mapped' on currently supported MIPS systems, no need
- * to explicitly ioremap() it. The fact that the ISA IO space is mapped
- * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
- * are physical addresses. The following constant pointer can be
- * used as the IO-area pointer (it can be iounmapped as well, so the
- * analogy with PCI is quite large):
- */
-#define __ISA_IO_base ((char *)(isa_slot_offset))
-
-/*
* The caches on some architectures aren't dma-coherent and have need to
* handle this in software. There are three types of operations that
* can be applied to dma buffers.
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h
deleted file mode 100644
index a162268..0000000
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ /dev/null
@@ -1,177 +0,0 @@
-/*
- * Defines for the TJSYS JMR-TX3927
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- */
-#ifndef __ASM_TX3927_JMR3927_H
-#define __ASM_TX3927_JMR3927_H
-
-#include <asm/jmr3927/tx3927.h>
-#include <asm/addrspace.h>
-#include <asm/system.h>
-#include <asm/txx9irq.h>
-
-/* CS */
-#define JMR3927_ROMCE0 0x1fc00000 /* 4M */
-#define JMR3927_ROMCE1 0x1e000000 /* 4M */
-#define JMR3927_ROMCE2 0x14000000 /* 16M */
-#define JMR3927_ROMCE3 0x10000000 /* 64M */
-#define JMR3927_ROMCE5 0x1d000000 /* 4M */
-#define JMR3927_SDCS0 0x00000000 /* 32M */
-#define JMR3927_SDCS1 0x02000000 /* 32M */
-/* PCI Direct Mappings */
-
-#define JMR3927_PCIMEM 0x08000000
-#define JMR3927_PCIMEM_SIZE 0x08000000 /* 128M */
-#define JMR3927_PCIIO 0x15000000
-#define JMR3927_PCIIO_SIZE 0x01000000 /* 16M */
-
-#define JMR3927_SDRAM_SIZE 0x02000000 /* 32M */
-#define JMR3927_PORT_BASE KSEG1
-
-/* Address map (virtual address) */
-#define JMR3927_ROM0_BASE (KSEG1 + JMR3927_ROMCE0)
-#define JMR3927_ROM1_BASE (KSEG1 + JMR3927_ROMCE1)
-#define JMR3927_IOC_BASE (KSEG1 + JMR3927_ROMCE2)
-#define JMR3927_PCIMEM_BASE (KSEG1 + JMR3927_PCIMEM)
-#define JMR3927_PCIIO_BASE (KSEG1 + JMR3927_PCIIO)
-
-#define JMR3927_IOC_REV_ADDR (JMR3927_IOC_BASE + 0x00000000)
-#define JMR3927_IOC_NVRAMB_ADDR (JMR3927_IOC_BASE + 0x00010000)
-#define JMR3927_IOC_LED_ADDR (JMR3927_IOC_BASE + 0x00020000)
-#define JMR3927_IOC_DIPSW_ADDR (JMR3927_IOC_BASE + 0x00030000)
-#define JMR3927_IOC_BREV_ADDR (JMR3927_IOC_BASE + 0x00040000)
-#define JMR3927_IOC_DTR_ADDR (JMR3927_IOC_BASE + 0x00050000)
-#define JMR3927_IOC_INTS1_ADDR (JMR3927_IOC_BASE + 0x00080000)
-#define JMR3927_IOC_INTS2_ADDR (JMR3927_IOC_BASE + 0x00090000)
-#define JMR3927_IOC_INTM_ADDR (JMR3927_IOC_BASE + 0x000a0000)
-#define JMR3927_IOC_INTP_ADDR (JMR3927_IOC_BASE + 0x000b0000)
-#define JMR3927_IOC_RESET_ADDR (JMR3927_IOC_BASE + 0x000f0000)
-
-/* Flash ROM */
-#define JMR3927_FLASH_BASE (JMR3927_ROM0_BASE)
-#define JMR3927_FLASH_SIZE 0x00400000
-
-/* bits for IOC_REV/IOC_BREV (high byte) */
-#define JMR3927_IDT_MASK 0xfc
-#define JMR3927_REV_MASK 0x03
-#define JMR3927_IOC_IDT 0xe0
-
-/* bits for IOC_INTS1/IOC_INTS2/IOC_INTM/IOC_INTP (high byte) */
-#define JMR3927_IOC_INTB_PCIA 0
-#define JMR3927_IOC_INTB_PCIB 1
-#define JMR3927_IOC_INTB_PCIC 2
-#define JMR3927_IOC_INTB_PCID 3
-#define JMR3927_IOC_INTB_MODEM 4
-#define JMR3927_IOC_INTB_INT6 5
-#define JMR3927_IOC_INTB_INT7 6
-#define JMR3927_IOC_INTB_SOFT 7
-#define JMR3927_IOC_INTF_PCIA (1 << JMR3927_IOC_INTF_PCIA)
-#define JMR3927_IOC_INTF_PCIB (1 << JMR3927_IOC_INTB_PCIB)
-#define JMR3927_IOC_INTF_PCIC (1 << JMR3927_IOC_INTB_PCIC)
-#define JMR3927_IOC_INTF_PCID (1 << JMR3927_IOC_INTB_PCID)
-#define JMR3927_IOC_INTF_MODEM (1 << JMR3927_IOC_INTB_MODEM)
-#define JMR3927_IOC_INTF_INT6 (1 << JMR3927_IOC_INTB_INT6)
-#define JMR3927_IOC_INTF_INT7 (1 << JMR3927_IOC_INTB_INT7)
-#define JMR3927_IOC_INTF_SOFT (1 << JMR3927_IOC_INTB_SOFT)
-
-/* bits for IOC_RESET (high byte) */
-#define JMR3927_IOC_RESET_CPU 1
-#define JMR3927_IOC_RESET_PCI 2
-
-#if defined(__BIG_ENDIAN)
-#define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned char *)(a)) = (d))
-#define jmr3927_ioc_reg_in(a) (*(volatile unsigned char *)(a))
-#elif defined(__LITTLE_ENDIAN)
-#define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned char *)((a)^1)) = (d))
-#define jmr3927_ioc_reg_in(a) (*(volatile unsigned char *)((a)^1))
-#else
-#error "No Endian"
-#endif
-
-/* LED macro */
-#define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR)
-
-#define jmr3927_led_and_set(n/*0-16*/) jmr3927_ioc_reg_out((~(n)) & jmr3927_ioc_reg_in(JMR3927_IOC_LED_ADDR), JMR3927_IOC_LED_ADDR)
-
-/* DIPSW4 macro */
-#define jmr3927_dipsw1() (gpio_get_value(11) == 0)
-#define jmr3927_dipsw2() (gpio_get_value(10) == 0)
-#define jmr3927_dipsw3() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 2) == 0)
-#define jmr3927_dipsw4() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 1) == 0)
-
-/*
- * IRQ mappings
- */
-
-/* These are the virtual IRQ numbers, we divide all IRQ's into
- * 'spaces', the 'space' determines where and how to enable/disable
- * that particular IRQ on an JMR machine. Add new 'spaces' as new
- * IRQ hardware is supported.
- */
-#define JMR3927_NR_IRQ_IRC 16 /* On-Chip IRC */
-#define JMR3927_NR_IRQ_IOC 8 /* PCI/MODEM/INT[6:7] */
-
-#define JMR3927_IRQ_IRC TXX9_IRQ_BASE
-#define JMR3927_IRQ_IOC (JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC)
-#define JMR3927_IRQ_END (JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC)
-
-#define JMR3927_IRQ_IRC_INT0 (JMR3927_IRQ_IRC + TX3927_IR_INT0)
-#define JMR3927_IRQ_IRC_INT1 (JMR3927_IRQ_IRC + TX3927_IR_INT1)
-#define JMR3927_IRQ_IRC_INT2 (JMR3927_IRQ_IRC + TX3927_IR_INT2)
-#define JMR3927_IRQ_IRC_INT3 (JMR3927_IRQ_IRC + TX3927_IR_INT3)
-#define JMR3927_IRQ_IRC_INT4 (JMR3927_IRQ_IRC + TX3927_IR_INT4)
-#define JMR3927_IRQ_IRC_INT5 (JMR3927_IRQ_IRC + TX3927_IR_INT5)
-#define JMR3927_IRQ_IRC_SIO0 (JMR3927_IRQ_IRC + TX3927_IR_SIO0)
-#define JMR3927_IRQ_IRC_SIO1 (JMR3927_IRQ_IRC + TX3927_IR_SIO1)
-#define JMR3927_IRQ_IRC_SIO(ch) (JMR3927_IRQ_IRC + TX3927_IR_SIO(ch))
-#define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA)
-#define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO)
-#define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI)
-#define JMR3927_IRQ_IRC_TMR(ch) (JMR3927_IRQ_IRC + TX3927_IR_TMR(ch))
-#define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA)
-#define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB)
-#define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC)
-#define JMR3927_IRQ_IOC_PCID (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCID)
-#define JMR3927_IRQ_IOC_MODEM (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_MODEM)
-#define JMR3927_IRQ_IOC_INT6 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT6)
-#define JMR3927_IRQ_IOC_INT7 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT7)
-#define JMR3927_IRQ_IOC_SOFT (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_SOFT)
-
-/* IOC (PCI, MODEM) */
-#define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1
-/* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */
-#define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3
-
-/* Clocks */
-#define JMR3927_CORECLK 132710400 /* 132.7MHz */
-#define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */
-#define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */
-
-/*
- * TX3927 Pin Configuration:
- *
- * PCFG bits Avail Dead
- * SELSIO[1:0]:11 RXD[1:0], TXD[1:0] PIO[6:3]
- * SELSIOC[0]:1 CTS[0], RTS[0] INT[5:4]
- * SELSIOC[1]:0,SELDSF:0, GSDAO[0],GPCST[3] CTS[1], RTS[1],DSF,
- * GDBGE* PIO[2:1]
- * SELDMA[2]:1 DMAREQ[2],DMAACK[2] PIO[13:12]
- * SELTMR[2:0]:000 TIMER[1:0]
- * SELCS:0,SELDMA[1]:0 PIO[11;10] SDCS_CE[7:6],
- * DMAREQ[1],DMAACK[1]
- * SELDMA[0]:1 DMAREQ[0],DMAACK[0] PIO[9:8]
- * SELDMA[3]:1 DMAREQ[3],DMAACK[3] PIO[15:14]
- * SELDONE:1 DMADONE PIO[7]
- *
- * Usable pins are:
- * RXD[1;0],TXD[1:0],CTS[0],RTS[0],
- * DMAREQ[0,2,3],DMAACK[0,2,3],DMADONE,PIO[0,10,11]
- * INT[3:0]
- */
-
-#endif /* __ASM_TX3927_JMR3927_H */
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h
deleted file mode 100644
index fb58033..0000000
--- a/include/asm-mips/jmr3927/tx3927.h
+++ /dev/null
@@ -1,319 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Toshiba Corporation
- */
-#ifndef __ASM_TX3927_H
-#define __ASM_TX3927_H
-
-#include <asm/jmr3927/txx927.h>
-
-#define TX3927_SDRAMC_REG 0xfffe8000
-#define TX3927_ROMC_REG 0xfffe9000
-#define TX3927_DMA_REG 0xfffeb000
-#define TX3927_IRC_REG 0xfffec000
-#define TX3927_PCIC_REG 0xfffed000
-#define TX3927_CCFG_REG 0xfffee000
-#define TX3927_NR_TMR 3
-#define TX3927_TMR_REG(ch) (0xfffef000 + (ch) * 0x100)
-#define TX3927_NR_SIO 2
-#define TX3927_SIO_REG(ch) (0xfffef300 + (ch) * 0x100)
-#define TX3927_PIO_REG 0xfffef500
-
-struct tx3927_sdramc_reg {
- volatile unsigned long cr[8];
- volatile unsigned long tr[3];
- volatile unsigned long cmd;
- volatile unsigned long smrs[2];
-};
-
-struct tx3927_romc_reg {
- volatile unsigned long cr[8];
-};
-
-struct tx3927_dma_reg {
- struct tx3927_dma_ch_reg {
- volatile unsigned long cha;
- volatile unsigned long sar;
- volatile unsigned long dar;
- volatile unsigned long cntr;
- volatile unsigned long sair;
- volatile unsigned long dair;
- volatile unsigned long ccr;
- volatile unsigned long csr;
- } ch[4];
- volatile unsigned long dbr[8];
- volatile unsigned long tdhr;
- volatile unsigned long mcr;
- volatile unsigned long unused0;
-};
-
-#include <asm/byteorder.h>
-
-#ifdef __BIG_ENDIAN
-#define endian_def_s2(e1, e2) \
- volatile unsigned short e1, e2
-#define endian_def_sb2(e1, e2, e3) \
- volatile unsigned short e1;volatile unsigned char e2, e3
-#define endian_def_b2s(e1, e2, e3) \
- volatile unsigned char e1, e2;volatile unsigned short e3
-#define endian_def_b4(e1, e2, e3, e4) \
- volatile unsigned char e1, e2, e3, e4
-#else
-#define endian_def_s2(e1, e2) \
- volatile unsigned short e2, e1
-#define endian_def_sb2(e1, e2, e3) \
- volatile unsigned char e3, e2;volatile unsigned short e1
-#define endian_def_b2s(e1, e2, e3) \
- volatile unsigned short e3;volatile unsigned char e2, e1
-#define endian_def_b4(e1, e2, e3, e4) \
- volatile unsigned char e4, e3, e2, e1
-#endif
-
-struct tx3927_pcic_reg {
- endian_def_s2(did, vid);
- endian_def_s2(pcistat, pcicmd);
- endian_def_b4(cc, scc, rpli, rid);
- endian_def_b4(unused0, ht, mlt, cls);
- volatile unsigned long ioba; /* +10 */
- volatile unsigned long mba;
- volatile unsigned long unused1[5];
- endian_def_s2(svid, ssvid);
- volatile unsigned long unused2; /* +30 */
- endian_def_sb2(unused3, unused4, capptr);
- volatile unsigned long unused5;
- endian_def_b4(ml, mg, ip, il);
- volatile unsigned long unused6; /* +40 */
- volatile unsigned long istat;
- volatile unsigned long iim;
- volatile unsigned long rrt;
- volatile unsigned long unused7[3]; /* +50 */
- volatile unsigned long ipbmma;
- volatile unsigned long ipbioma; /* +60 */
- volatile unsigned long ilbmma;
- volatile unsigned long ilbioma;
- volatile unsigned long unused8[9];
- volatile unsigned long tc; /* +90 */
- volatile unsigned long tstat;
- volatile unsigned long tim;
- volatile unsigned long tccmd;
- volatile unsigned long pcirrt; /* +a0 */
- volatile unsigned long pcirrt_cmd;
- volatile unsigned long pcirrdt;
- volatile unsigned long unused9[3];
- volatile unsigned long tlboap;
- volatile unsigned long tlbiap;
- volatile unsigned long tlbmma; /* +c0 */
- volatile unsigned long tlbioma;
- volatile unsigned long sc_msg;
- volatile unsigned long sc_be;
- volatile unsigned long tbl; /* +d0 */
- volatile unsigned long unused10[3];
- volatile unsigned long pwmng; /* +e0 */
- volatile unsigned long pwmngs;
- volatile unsigned long unused11[6];
- volatile unsigned long req_trace; /* +100 */
- volatile unsigned long pbapmc;
- volatile unsigned long pbapms;
- volatile unsigned long pbapmim;
- volatile unsigned long bm; /* +110 */
- volatile unsigned long cpcibrs;
- volatile unsigned long cpcibgs;
- volatile unsigned long pbacs;
- volatile unsigned long iobas; /* +120 */
- volatile unsigned long mbas;
- volatile unsigned long lbc;
- volatile unsigned long lbstat;
- volatile unsigned long lbim; /* +130 */
- volatile unsigned long pcistatim;
- volatile unsigned long ica;
- volatile unsigned long icd;
- volatile unsigned long iiadp; /* +140 */
- volatile unsigned long iscdp;
- volatile unsigned long mmas;
- volatile unsigned long iomas;
- volatile unsigned long ipciaddr; /* +150 */
- volatile unsigned long ipcidata;
- volatile unsigned long ipcibe;
-};
-
-struct tx3927_ccfg_reg {
- volatile unsigned long ccfg;
- volatile unsigned long crir;
- volatile unsigned long pcfg;
- volatile unsigned long tear;
- volatile unsigned long pdcr;
-};
-
-/*
- * SDRAMC
- */
-
-/*
- * ROMC
- */
-
-/*
- * DMA
- */
-/* bits for MCR */
-#define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch))
-#define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch))
-#define TX3927_DMA_MCR_RSFIF 0x00000080
-#define TX3927_DMA_MCR_FIFUM(ch) (0x00000008<<(ch))
-#define TX3927_DMA_MCR_LE 0x00000004
-#define TX3927_DMA_MCR_RPRT 0x00000002
-#define TX3927_DMA_MCR_MSTEN 0x00000001
-
-/* bits for CCRn */
-#define TX3927_DMA_CCR_DBINH 0x04000000
-#define TX3927_DMA_CCR_SBINH 0x02000000
-#define TX3927_DMA_CCR_CHRST 0x01000000
-#define TX3927_DMA_CCR_RVBYTE 0x00800000
-#define TX3927_DMA_CCR_ACKPOL 0x00400000
-#define TX3927_DMA_CCR_REQPL 0x00200000
-#define TX3927_DMA_CCR_EGREQ 0x00100000
-#define TX3927_DMA_CCR_CHDN 0x00080000
-#define TX3927_DMA_CCR_DNCTL 0x00060000
-#define TX3927_DMA_CCR_EXTRQ 0x00010000
-#define TX3927_DMA_CCR_INTRQD 0x0000e000
-#define TX3927_DMA_CCR_INTENE 0x00001000
-#define TX3927_DMA_CCR_INTENC 0x00000800
-#define TX3927_DMA_CCR_INTENT 0x00000400
-#define TX3927_DMA_CCR_CHNEN 0x00000200
-#define TX3927_DMA_CCR_XFACT 0x00000100
-#define TX3927_DMA_CCR_SNOP 0x00000080
-#define TX3927_DMA_CCR_DSTINC 0x00000040
-#define TX3927_DMA_CCR_SRCINC 0x00000020
-#define TX3927_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c)
-#define TX3927_DMA_CCR_XFSZ_1W TX3927_DMA_CCR_XFSZ(2)
-#define TX3927_DMA_CCR_XFSZ_4W TX3927_DMA_CCR_XFSZ(4)
-#define TX3927_DMA_CCR_XFSZ_8W TX3927_DMA_CCR_XFSZ(5)
-#define TX3927_DMA_CCR_XFSZ_16W TX3927_DMA_CCR_XFSZ(6)
-#define TX3927_DMA_CCR_XFSZ_32W TX3927_DMA_CCR_XFSZ(7)
-#define TX3927_DMA_CCR_MEMIO 0x00000002
-#define TX3927_DMA_CCR_ONEAD 0x00000001
-
-/* bits for CSRn */
-#define TX3927_DMA_CSR_CHNACT 0x00000100
-#define TX3927_DMA_CSR_ABCHC 0x00000080
-#define TX3927_DMA_CSR_NCHNC 0x00000040
-#define TX3927_DMA_CSR_NTRNFC 0x00000020
-#define TX3927_DMA_CSR_EXTDN 0x00000010
-#define TX3927_DMA_CSR_CFERR 0x00000008
-#define TX3927_DMA_CSR_CHERR 0x00000004
-#define TX3927_DMA_CSR_DESERR 0x00000002
-#define TX3927_DMA_CSR_SORERR 0x00000001
-
-/*
- * IRC
- */
-#define TX3927_IR_INT0 0
-#define TX3927_IR_INT1 1
-#define TX3927_IR_INT2 2
-#define TX3927_IR_INT3 3
-#define TX3927_IR_INT4 4
-#define TX3927_IR_INT5 5
-#define TX3927_IR_SIO0 6
-#define TX3927_IR_SIO1 7
-#define TX3927_IR_SIO(ch) (6 + (ch))
-#define TX3927_IR_DMA 8
-#define TX3927_IR_PIO 9
-#define TX3927_IR_PCI 10
-#define TX3927_IR_TMR(ch) (13 + (ch))
-#define TX3927_NUM_IR 16
-
-/*
- * PCIC
- */
-/* bits for PCICMD */
-/* see PCI_COMMAND_XXX in linux/pci.h */
-
-/* bits for PCISTAT */
-/* see PCI_STATUS_XXX in linux/pci.h */
-#define PCI_STATUS_NEW_CAP 0x0010
-
-/* bits for TC */
-#define TX3927_PCIC_TC_OF16E 0x00000020
-#define TX3927_PCIC_TC_IF8E 0x00000010
-#define TX3927_PCIC_TC_OF8E 0x00000008
-
-/* bits for IOBA/MBA */
-/* see PCI_BASE_ADDRESS_XXX in linux/pci.h */
-
-/* bits for PBAPMC */
-#define TX3927_PCIC_PBAPMC_RPBA 0x00000004
-#define TX3927_PCIC_PBAPMC_PBAEN 0x00000002
-#define TX3927_PCIC_PBAPMC_BMCEN 0x00000001
-
-/* bits for LBSTAT/LBIM */
-#define TX3927_PCIC_LBIM_ALL 0x0000003e
-
-/* bits for PCISTATIM (see also PCI_STATUS_XXX in linux/pci.h */
-#define TX3927_PCIC_PCISTATIM_ALL 0x0000f900
-
-/* bits for LBC */
-#define TX3927_PCIC_LBC_IBSE 0x00004000
-#define TX3927_PCIC_LBC_TIBSE 0x00002000
-#define TX3927_PCIC_LBC_TMFBSE 0x00001000
-#define TX3927_PCIC_LBC_HRST 0x00000800
-#define TX3927_PCIC_LBC_SRST 0x00000400
-#define TX3927_PCIC_LBC_EPCAD 0x00000200
-#define TX3927_PCIC_LBC_MSDSE 0x00000100
-#define TX3927_PCIC_LBC_CRR 0x00000080
-#define TX3927_PCIC_LBC_ILMDE 0x00000040
-#define TX3927_PCIC_LBC_ILIDE 0x00000020
-
-#define TX3927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
-#define TX3927_PCIC_MAX_DEVNU TX3927_PCIC_IDSEL_AD_TO_SLOT(32)
-
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX3927_CCFG_TLBOFF 0x00020000
-#define TX3927_CCFG_BEOW 0x00010000
-#define TX3927_CCFG_WR 0x00008000
-#define TX3927_CCFG_TOE 0x00004000
-#define TX3927_CCFG_PCIXARB 0x00002000
-#define TX3927_CCFG_PCI3 0x00001000
-#define TX3927_CCFG_PSNP 0x00000800
-#define TX3927_CCFG_PPRI 0x00000400
-#define TX3927_CCFG_PLLM 0x00000030
-#define TX3927_CCFG_ENDIAN 0x00000004
-#define TX3927_CCFG_HALT 0x00000002
-#define TX3927_CCFG_ACEHOLD 0x00000001
-
-/* PCFG : Pin Configuration */
-#define TX3927_PCFG_SYSCLKEN 0x08000000
-#define TX3927_PCFG_SDRCLKEN_ALL 0x07c00000
-#define TX3927_PCFG_SDRCLKEN(ch) (0x00400000<<(ch))
-#define TX3927_PCFG_PCICLKEN_ALL 0x003c0000
-#define TX3927_PCFG_PCICLKEN(ch) (0x00040000<<(ch))
-#define TX3927_PCFG_SELALL 0x0003ffff
-#define TX3927_PCFG_SELCS 0x00020000
-#define TX3927_PCFG_SELDSF 0x00010000
-#define TX3927_PCFG_SELSIOC_ALL 0x0000c000
-#define TX3927_PCFG_SELSIOC(ch) (0x00004000<<(ch))
-#define TX3927_PCFG_SELSIO_ALL 0x00003000
-#define TX3927_PCFG_SELSIO(ch) (0x00001000<<(ch))
-#define TX3927_PCFG_SELTMR_ALL 0x00000e00
-#define TX3927_PCFG_SELTMR(ch) (0x00000200<<(ch))
-#define TX3927_PCFG_SELDONE 0x00000100
-#define TX3927_PCFG_INTDMA_ALL 0x000000f0
-#define TX3927_PCFG_INTDMA(ch) (0x00000010<<(ch))
-#define TX3927_PCFG_SELDMA_ALL 0x0000000f
-#define TX3927_PCFG_SELDMA(ch) (0x00000001<<(ch))
-
-#define tx3927_sdramcptr ((struct tx3927_sdramc_reg *)TX3927_SDRAMC_REG)
-#define tx3927_romcptr ((struct tx3927_romc_reg *)TX3927_ROMC_REG)
-#define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG)
-#define tx3927_pcicptr ((struct tx3927_pcic_reg *)TX3927_PCIC_REG)
-#define tx3927_ccfgptr ((struct tx3927_ccfg_reg *)TX3927_CCFG_REG)
-#define tx3927_tmrptr(ch) ((struct txx927_tmr_reg *)TX3927_TMR_REG(ch))
-#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
-#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
-
-#endif /* __ASM_TX3927_H */
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/jmr3927/txx927.h
deleted file mode 100644
index 25dcf2f..0000000
--- a/include/asm-mips/jmr3927/txx927.h
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * Common definitions for TX3927/TX4927
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000 Toshiba Corporation
- */
-#ifndef __ASM_TXX927_H
-#define __ASM_TXX927_H
-
-struct txx927_sio_reg {
- volatile unsigned long lcr;
- volatile unsigned long dicr;
- volatile unsigned long disr;
- volatile unsigned long cisr;
- volatile unsigned long fcr;
- volatile unsigned long flcr;
- volatile unsigned long bgr;
- volatile unsigned long tfifo;
- volatile unsigned long rfifo;
-};
-
-/*
- * SIO
- */
-/* SILCR : Line Control */
-#define TXx927_SILCR_SCS_MASK 0x00000060
-#define TXx927_SILCR_SCS_IMCLK 0x00000000
-#define TXx927_SILCR_SCS_IMCLK_BG 0x00000020
-#define TXx927_SILCR_SCS_SCLK 0x00000040
-#define TXx927_SILCR_SCS_SCLK_BG 0x00000060
-#define TXx927_SILCR_UEPS 0x00000010
-#define TXx927_SILCR_UPEN 0x00000008
-#define TXx927_SILCR_USBL_MASK 0x00000004
-#define TXx927_SILCR_USBL_1BIT 0x00000004
-#define TXx927_SILCR_USBL_2BIT 0x00000000
-#define TXx927_SILCR_UMODE_MASK 0x00000003
-#define TXx927_SILCR_UMODE_8BIT 0x00000000
-#define TXx927_SILCR_UMODE_7BIT 0x00000001
-
-/* SIDICR : DMA/Int. Control */
-#define TXx927_SIDICR_TDE 0x00008000
-#define TXx927_SIDICR_RDE 0x00004000
-#define TXx927_SIDICR_TIE 0x00002000
-#define TXx927_SIDICR_RIE 0x00001000
-#define TXx927_SIDICR_SPIE 0x00000800
-#define TXx927_SIDICR_CTSAC 0x00000600
-#define TXx927_SIDICR_STIE_MASK 0x0000003f
-#define TXx927_SIDICR_STIE_OERS 0x00000020
-#define TXx927_SIDICR_STIE_CTSS 0x00000010
-#define TXx927_SIDICR_STIE_RBRKD 0x00000008
-#define TXx927_SIDICR_STIE_TRDY 0x00000004
-#define TXx927_SIDICR_STIE_TXALS 0x00000002
-#define TXx927_SIDICR_STIE_UBRKD 0x00000001
-
-/* SIDISR : DMA/Int. Status */
-#define TXx927_SIDISR_UBRK 0x00008000
-#define TXx927_SIDISR_UVALID 0x00004000
-#define TXx927_SIDISR_UFER 0x00002000
-#define TXx927_SIDISR_UPER 0x00001000
-#define TXx927_SIDISR_UOER 0x00000800
-#define TXx927_SIDISR_ERI 0x00000400
-#define TXx927_SIDISR_TOUT 0x00000200
-#define TXx927_SIDISR_TDIS 0x00000100
-#define TXx927_SIDISR_RDIS 0x00000080
-#define TXx927_SIDISR_STIS 0x00000040
-#define TXx927_SIDISR_RFDN_MASK 0x0000001f
-
-/* SICISR : Change Int. Status */
-#define TXx927_SICISR_OERS 0x00000020
-#define TXx927_SICISR_CTSS 0x00000010
-#define TXx927_SICISR_RBRKD 0x00000008
-#define TXx927_SICISR_TRDY 0x00000004
-#define TXx927_SICISR_TXALS 0x00000002
-#define TXx927_SICISR_UBRKD 0x00000001
-
-/* SIFCR : FIFO Control */
-#define TXx927_SIFCR_SWRST 0x00008000
-#define TXx927_SIFCR_RDIL_MASK 0x00000180
-#define TXx927_SIFCR_RDIL_1 0x00000000
-#define TXx927_SIFCR_RDIL_4 0x00000080
-#define TXx927_SIFCR_RDIL_8 0x00000100
-#define TXx927_SIFCR_RDIL_12 0x00000180
-#define TXx927_SIFCR_RDIL_MAX 0x00000180
-#define TXx927_SIFCR_TDIL_MASK 0x00000018
-#define TXx927_SIFCR_TDIL_MASK 0x00000018
-#define TXx927_SIFCR_TDIL_1 0x00000000
-#define TXx927_SIFCR_TDIL_4 0x00000001
-#define TXx927_SIFCR_TDIL_8 0x00000010
-#define TXx927_SIFCR_TDIL_MAX 0x00000010
-#define TXx927_SIFCR_TFRST 0x00000004
-#define TXx927_SIFCR_RFRST 0x00000002
-#define TXx927_SIFCR_FRSTE 0x00000001
-#define TXx927_SIO_TX_FIFO 8
-#define TXx927_SIO_RX_FIFO 16
-
-/* SIFLCR : Flow Control */
-#define TXx927_SIFLCR_RCS 0x00001000
-#define TXx927_SIFLCR_TES 0x00000800
-#define TXx927_SIFLCR_RTSSC 0x00000200
-#define TXx927_SIFLCR_RSDE 0x00000100
-#define TXx927_SIFLCR_TSDE 0x00000080
-#define TXx927_SIFLCR_RTSTL_MASK 0x0000001e
-#define TXx927_SIFLCR_RTSTL_MAX 0x0000001e
-#define TXx927_SIFLCR_TBRK 0x00000001
-
-/* SIBGR : Baudrate Control */
-#define TXx927_SIBGR_BCLK_MASK 0x00000300
-#define TXx927_SIBGR_BCLK_T0 0x00000000
-#define TXx927_SIBGR_BCLK_T2 0x00000100
-#define TXx927_SIBGR_BCLK_T4 0x00000200
-#define TXx927_SIBGR_BCLK_T6 0x00000300
-#define TXx927_SIBGR_BRD_MASK 0x000000ff
-
-/*
- * PIO
- */
-
-#endif /* __ASM_TXX927_H */
diff --git a/include/asm-mips/lasat/lasat.h b/include/asm-mips/lasat/lasat.h
index ea04d92..caeba1e 100644
--- a/include/asm-mips/lasat/lasat.h
+++ b/include/asm-mips/lasat/lasat.h
@@ -240,6 +240,8 @@
__delay(ns / lasat_ndelay_divider);
}
+#define IS_LASAT_200() (current_cpu_data.cputype == CPU_R5000)
+
#endif /* !defined (_LANGUAGE_ASSEMBLY) */
#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef
diff --git a/include/asm-mips/mach-atlas/mc146818rtc.h b/include/asm-mips/mach-atlas/mc146818rtc.h
deleted file mode 100644
index 51d337e..0000000
--- a/include/asm-mips/mach-atlas/mc146818rtc.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright (C) 1999, 2000, 2005 MIPS Technologies, Inc.
- * All rights reserved.
- * Authors: Carsten Langgaard <carstenl@mips.com>
- * Maciej W. Rozycki <macro@mips.com>
- * Copyright (C) 2003, 05 Ralf Baechle (ralf@linux-mips.org)
- *
- * This program is free software; you can distribute it and/or modify it
- * under the terms of the GNU General Public License (Version 2) as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
- */
-#ifndef __ASM_MACH_ATLAS_MC146818RTC_H
-#define __ASM_MACH_ATLAS_MC146818RTC_H
-
-#include <linux/types.h>
-
-#include <asm/addrspace.h>
-
-#include <asm/mips-boards/atlas.h>
-#include <asm/mips-boards/atlasint.h>
-
-#define ARCH_RTC_LOCATION
-
-#define RTC_PORT(x) (ATLAS_RTC_ADR_REG + (x) * 8)
-#define RTC_IO_EXTENT 0x100
-#define RTC_IOMAPPED 0
-#define RTC_IRQ ATLAS_INT_RTC
-
-static inline unsigned char CMOS_READ(unsigned long addr)
-{
- volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
- volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
-
- *ireg = addr;
- return *dreg;
-}
-
-static inline void CMOS_WRITE(unsigned char data, unsigned long addr)
-{
- volatile u32 *ireg = (void *)CKSEG1ADDR(RTC_PORT(0));
- volatile u32 *dreg = (void *)CKSEG1ADDR(RTC_PORT(1));
-
- *ireg = addr;
- *dreg = data;
-}
-
-#define RTC_ALWAYS_BCD 0
-
-#define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1900)
-
-#endif /* __ASM_MACH_ATLAS_MC146818RTC_H */
diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h
index 612ae90..1a515b8 100644
--- a/include/asm-mips/mach-db1x00/db1x00.h
+++ b/include/asm-mips/mach-db1x00/db1x00.h
@@ -146,51 +146,6 @@
((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8))
/*
- * SD controller macros
- */
-
-/* Detect card. */
-#define mmc_card_inserted(_n_, _res_) \
- do { \
- BCSR * const bcsr = (BCSR *)0xAE000000; \
- unsigned long mmc_wp, board_specific; \
- if ((_n_)) { \
- mmc_wp = BCSR_BOARD_SD1_WP; \
- } else { \
- mmc_wp = BCSR_BOARD_SD0_WP; \
- } \
- board_specific = au_readl((unsigned long)(&bcsr->specific)); \
- if (!(board_specific & mmc_wp)) {/* low means card present */ \
- *(int *)(_res_) = 1; \
- } else { \
- *(int *)(_res_) = 0; \
- } \
- } while (0)
-
-/*
- * Apply power to card slot(s).
- */
-#define mmc_power_on(_n_) \
- do { \
- BCSR * const bcsr = (BCSR *)0xAE000000; \
- unsigned long mmc_pwr, mmc_wp, board_specific; \
- if ((_n_)) { \
- mmc_pwr = BCSR_BOARD_SD1_PWR; \
- mmc_wp = BCSR_BOARD_SD1_WP; \
- } else { \
- mmc_pwr = BCSR_BOARD_SD0_PWR; \
- mmc_wp = BCSR_BOARD_SD0_WP; \
- } \
- board_specific = au_readl((unsigned long)(&bcsr->specific)); \
- if (!(board_specific & mmc_wp)) {/* low means card present */ \
- board_specific |= mmc_pwr; \
- au_writel(board_specific, (int)(&bcsr->specific)); \
- au_sync(); \
- } \
- } while (0)
-
-
-/*
* NAND defines
*
* Timing values as described in databook, * ns value stripped of the
diff --git a/include/asm-mips/mach-jmr3927/ioremap.h b/include/asm-mips/mach-jmr3927/ioremap.h
deleted file mode 100644
index 29989ff..0000000
--- a/include/asm-mips/mach-jmr3927/ioremap.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * include/asm-mips/mach-jmr3927/ioremap.h
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#ifndef __ASM_MACH_JMR3927_IOREMAP_H
-#define __ASM_MACH_JMR3927_IOREMAP_H
-
-#include <linux/types.h>
-
-/*
- * Allow physical addresses to be fixed up to help peripherals located
- * outside the low 32-bit range -- generic pass-through version.
- */
-static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
-{
- return phys_addr;
-}
-
-static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
- unsigned long flags)
-{
-#define TXX9_DIRECTMAP_BASE 0xff000000ul
- if (offset >= TXX9_DIRECTMAP_BASE &&
- offset < TXX9_DIRECTMAP_BASE + 0xff0000)
- return (void __iomem *)offset;
- return NULL;
-}
-
-static inline int plat_iounmap(const volatile void __iomem *addr)
-{
- return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
-}
-
-#endif /* __ASM_MACH_JMR3927_IOREMAP_H */
diff --git a/include/asm-mips/mach-jmr3927/mangle-port.h b/include/asm-mips/mach-jmr3927/mangle-port.h
deleted file mode 100644
index 11bffcd..0000000
--- a/include/asm-mips/mach-jmr3927/mangle-port.h
+++ /dev/null
@@ -1,18 +0,0 @@
-#ifndef __ASM_MACH_JMR3927_MANGLE_PORT_H
-#define __ASM_MACH_JMR3927_MANGLE_PORT_H
-
-extern unsigned long __swizzle_addr_b(unsigned long port);
-#define __swizzle_addr_w(port) (port)
-#define __swizzle_addr_l(port) (port)
-#define __swizzle_addr_q(port) (port)
-
-#define ioswabb(a, x) (x)
-#define __mem_ioswabb(a, x) (x)
-#define ioswabw(a, x) le16_to_cpu(x)
-#define __mem_ioswabw(a, x) (x)
-#define ioswabl(a, x) le32_to_cpu(x)
-#define __mem_ioswabl(a, x) (x)
-#define ioswabq(a, x) le64_to_cpu(x)
-#define __mem_ioswabq(a, x) (x)
-
-#endif /* __ASM_MACH_JMR3927_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-jmr3927/war.h b/include/asm-mips/mach-jmr3927/war.h
deleted file mode 100644
index 1ff55fb..0000000
--- a/include/asm-mips/mach-jmr3927/war.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
- */
-#ifndef __ASM_MIPS_MACH_JMR3927_WAR_H
-#define __ASM_MIPS_MACH_JMR3927_WAR_H
-
-#define R4600_V1_INDEX_ICACHEOP_WAR 0
-#define R4600_V1_HIT_CACHEOP_WAR 0
-#define R4600_V2_HIT_CACHEOP_WAR 0
-#define R5432_CP0_INTERRUPT_WAR 0
-#define BCM1250_M3_WAR 0
-#define SIBYTE_1956_WAR 0
-#define MIPS4K_ICACHE_REFILL_WAR 0
-#define MIPS_CACHE_SYNC_WAR 0
-#define TX49XX_ICACHE_INDEX_INV_WAR 0
-#define RM9000_CDEX_SMP_WAR 0
-#define ICACHE_REFILLS_WORKAROUND_WAR 0
-#define R10000_LLSC_WAR 0
-#define MIPS34K_MISSED_ITLB_WAR 0
-
-#endif /* __ASM_MIPS_MACH_JMR3927_WAR_H */
diff --git a/include/asm-mips/mach-mips/cpu-feature-overrides.h b/include/asm-mips/mach-malta/cpu-feature-overrides.h
similarity index 100%
rename from include/asm-mips/mach-mips/cpu-feature-overrides.h
rename to include/asm-mips/mach-malta/cpu-feature-overrides.h
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-malta/irq.h
similarity index 100%
rename from include/asm-mips/mach-mips/irq.h
rename to include/asm-mips/mach-malta/irq.h
diff --git a/include/asm-mips/mach-mips/kernel-entry-init.h b/include/asm-mips/mach-malta/kernel-entry-init.h
similarity index 100%
rename from include/asm-mips/mach-mips/kernel-entry-init.h
rename to include/asm-mips/mach-malta/kernel-entry-init.h
diff --git a/include/asm-mips/mach-mips/mach-gt64120.h b/include/asm-mips/mach-malta/mach-gt64120.h
similarity index 100%
rename from include/asm-mips/mach-mips/mach-gt64120.h
rename to include/asm-mips/mach-malta/mach-gt64120.h
diff --git a/include/asm-mips/mach-mips/mc146818rtc.h b/include/asm-mips/mach-malta/mc146818rtc.h
similarity index 100%
rename from include/asm-mips/mach-mips/mc146818rtc.h
rename to include/asm-mips/mach-malta/mc146818rtc.h
diff --git a/include/asm-mips/mach-mips/war.h b/include/asm-mips/mach-malta/war.h
similarity index 100%
rename from include/asm-mips/mach-mips/war.h
rename to include/asm-mips/mach-malta/war.h
diff --git a/include/asm-mips/mach-tx39xx/ioremap.h b/include/asm-mips/mach-tx39xx/ioremap.h
new file mode 100644
index 0000000..93c6c04
--- /dev/null
+++ b/include/asm-mips/mach-tx39xx/ioremap.h
@@ -0,0 +1,38 @@
+/*
+ * include/asm-mips/mach-tx39xx/ioremap.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#ifndef __ASM_MACH_TX39XX_IOREMAP_H
+#define __ASM_MACH_TX39XX_IOREMAP_H
+
+#include <linux/types.h>
+
+/*
+ * Allow physical addresses to be fixed up to help peripherals located
+ * outside the low 32-bit range -- generic pass-through version.
+ */
+static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size)
+{
+ return phys_addr;
+}
+
+static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size,
+ unsigned long flags)
+{
+#define TXX9_DIRECTMAP_BASE 0xff000000ul
+ if (offset >= TXX9_DIRECTMAP_BASE &&
+ offset < TXX9_DIRECTMAP_BASE + 0xff0000)
+ return (void __iomem *)offset;
+ return NULL;
+}
+
+static inline int plat_iounmap(const volatile void __iomem *addr)
+{
+ return (unsigned long)addr >= TXX9_DIRECTMAP_BASE;
+}
+
+#endif /* __ASM_MACH_TX39XX_IOREMAP_H */
diff --git a/include/asm-mips/mach-tx39xx/mangle-port.h b/include/asm-mips/mach-tx39xx/mangle-port.h
new file mode 100644
index 0000000..ef0b502
--- /dev/null
+++ b/include/asm-mips/mach-tx39xx/mangle-port.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_MACH_TX39XX_MANGLE_PORT_H
+#define __ASM_MACH_TX39XX_MANGLE_PORT_H
+
+#if defined(CONFIG_TOSHIBA_JMR3927)
+extern unsigned long (*__swizzle_addr_b)(unsigned long port);
+#define NEEDS_TXX9_SWIZZLE_ADDR_B
+#else
+#define __swizzle_addr_b(port) (port)
+#endif
+#define __swizzle_addr_w(port) (port)
+#define __swizzle_addr_l(port) (port)
+#define __swizzle_addr_q(port) (port)
+
+#define ioswabb(a, x) (x)
+#define __mem_ioswabb(a, x) (x)
+#define ioswabw(a, x) le16_to_cpu(x)
+#define __mem_ioswabw(a, x) (x)
+#define ioswabl(a, x) le32_to_cpu(x)
+#define __mem_ioswabl(a, x) (x)
+#define ioswabq(a, x) le64_to_cpu(x)
+#define __mem_ioswabq(a, x) (x)
+
+#endif /* __ASM_MACH_TX39XX_MANGLE_PORT_H */
diff --git a/include/asm-mips/mach-tx39xx/war.h b/include/asm-mips/mach-tx39xx/war.h
new file mode 100644
index 0000000..4338146
--- /dev/null
+++ b/include/asm-mips/mach-tx39xx/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_TX39XX_WAR_H
+#define __ASM_MIPS_MACH_TX39XX_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_TX39XX_WAR_H */
diff --git a/include/asm-mips/mach-vr41xx/irq.h b/include/asm-mips/mach-vr41xx/irq.h
index 8488122..862058d 100644
--- a/include/asm-mips/mach-vr41xx/irq.h
+++ b/include/asm-mips/mach-vr41xx/irq.h
@@ -2,9 +2,6 @@
#define __ASM_MACH_VR41XX_IRQ_H
#include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
-#ifdef CONFIG_NEC_CMBVR4133
-#include <asm/vr41xx/cmbvr4133.h> /* for I8259A_IRQ_BASE */
-#endif
#include_next <irq.h>
diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index 33407be..7f0b034 100644
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -27,12 +27,8 @@
/*
* Display register base.
*/
-#ifdef CONFIG_MIPS_SEAD
-#define ASCII_DISPLAY_POS_BASE 0x1f0005c0
-#else
#define ASCII_DISPLAY_WORD_BASE 0x1f000410
#define ASCII_DISPLAY_POS_BASE 0x1f000418
-#endif
/*
@@ -44,13 +40,8 @@
/*
* Reset register.
*/
-#ifdef CONFIG_MIPS_SEAD
-#define SOFTRES_REG 0x1e800050
-#define GORESET 0x4d
-#else
#define SOFTRES_REG 0x1f000500
#define GORESET 0x42
-#endif
/*
* Revision register.
diff --git a/include/asm-mips/namei.h b/include/asm-mips/namei.h
index c94d12d..a6605a7 100644
--- a/include/asm-mips/namei.h
+++ b/include/asm-mips/namei.h
@@ -1,26 +1,11 @@
#ifndef _ASM_NAMEI_H
#define _ASM_NAMEI_H
-#include <linux/personality.h>
-#include <linux/stddef.h>
+/*
+ * This dummy routine maybe changed to something useful
+ * for /usr/gnemul/ emulation stuff.
+ */
-#define IRIX_EMUL "/usr/gnemul/irix/"
-#define RISCOS_EMUL "/usr/gnemul/riscos/"
-
-static inline char *__emul_prefix(void)
-{
- switch (current->personality) {
- case PER_IRIX32:
- case PER_IRIXN32:
- case PER_IRIX64:
- return IRIX_EMUL;
-
- case PER_RISCOS:
- return RISCOS_EMUL;
-
- default:
- return NULL;
- }
-}
+#define __emul_prefix() NULL
#endif /* _ASM_NAMEI_H */
diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h
index 301ff2f..d3be834 100644
--- a/include/asm-mips/pci.h
+++ b/include/asm-mips/pci.h
@@ -172,4 +172,7 @@
return channel ? 15 : 14;
}
+extern int pci_probe_only;
+extern unsigned int pcibios_max_latency;
+
#endif /* _ASM_PCI_H */
diff --git a/include/asm-mips/prctl.h b/include/asm-mips/prctl.h
deleted file mode 100644
index 8121a9a..0000000
--- a/include/asm-mips/prctl.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * IRIX prctl interface
- *
- * The IRIX kernel maps a page at PRDA_ADDRESS with the
- * contents of prda and fills it the bits on prda_sys.
- */
-
-#ifndef __PRCTL_H__
-#define __PRCTL_H__
-
-#define PRDA_ADDRESS 0x200000L
-#define PRDA ((struct prda *) PRDA_ADDRESS)
-
-struct prda_sys {
- pid_t t_pid;
- u32 t_hint;
- u32 t_dlactseq;
- u32 t_fpflags;
- u32 t_prid; /* processor type, $prid CP0 register */
- u32 t_dlendseq;
- u64 t_unused1[5];
- pid_t t_rpid;
- s32 t_resched;
- u32 t_unused[8];
- u32 t_cpu; /* current/last cpu */
-
- /* FIXME: The signal information, not supported by Linux now */
- u32 t_flags; /* if true, then the sigprocmask is in userspace */
- u32 t_sigprocmask [1]; /* the sigprocmask */
-};
-
-struct prda {
- char fill [0xe00];
- struct prda_sys prda_sys;
-};
-
-#define t_sys prda_sys
-
-ptrdiff_t prctl(int op, int v1, int v2);
-
-#endif
diff --git a/include/asm-mips/setup.h b/include/asm-mips/setup.h
index 70009a9..883f59b 100644
--- a/include/asm-mips/setup.h
+++ b/include/asm-mips/setup.h
@@ -3,4 +3,6 @@
#define COMMAND_LINE_SIZE 256
+extern void setup_early_printk(void);
+
#endif /* __SETUP_H */
diff --git a/include/asm-mips/signal.h b/include/asm-mips/signal.h
index 7a28989..bee5153 100644
--- a/include/asm-mips/signal.h
+++ b/include/asm-mips/signal.h
@@ -119,9 +119,6 @@
struct k_sigaction {
struct sigaction sa;
-#ifdef CONFIG_BINFMT_IRIX
- void (*sa_restorer)(void);
-#endif
};
/* IRIX compatible stack_t */
diff --git a/include/asm-mips/traps.h b/include/asm-mips/traps.h
index e5dbde6..90ff2f4 100644
--- a/include/asm-mips/traps.h
+++ b/include/asm-mips/traps.h
@@ -24,6 +24,5 @@
extern void (*board_nmi_handler_setup)(void);
extern void (*board_ejtag_handler_setup)(void);
extern void (*board_bind_eic_interrupt)(int irq, int regset);
-extern void (*board_watchpoint_handler)(struct pt_regs *regs);
#endif /* _ASM_TRAPS_H */
diff --git a/include/asm-mips/tx4927/smsc_fdc37m81x.h b/include/asm-mips/tx4927/smsc_fdc37m81x.h
deleted file mode 100644
index 5d93bab..0000000
--- a/include/asm-mips/tx4927/smsc_fdc37m81x.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * linux/include/asm-mips/tx4927/smsc_fdc37m81x.h
- *
- * Interface for smsc fdc48m81x Super IO chip
- *
- * Author: MontaVista Software, Inc. source@mvista.com
- *
- * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Copyright (C) 2004 MontaVista Software Inc.
- * Manish Lachwani, mlachwani@mvista.com
- */
-
-#ifndef _SMSC_FDC37M81X_H_
-#define _SMSC_FDC37M81X_H_
-
-/* Common Registers */
-#define SMSC_FDC37M81X_CONFIG_INDEX 0x00
-#define SMSC_FDC37M81X_CONFIG_DATA 0x01
-#define SMSC_FDC37M81X_CONF 0x02
-#define SMSC_FDC37M81X_INDEX 0x03
-#define SMSC_FDC37M81X_DNUM 0x07
-#define SMSC_FDC37M81X_DID 0x20
-#define SMSC_FDC37M81X_DREV 0x21
-#define SMSC_FDC37M81X_PCNT 0x22
-#define SMSC_FDC37M81X_PMGT 0x23
-#define SMSC_FDC37M81X_OSC 0x24
-#define SMSC_FDC37M81X_CONFPA0 0x26
-#define SMSC_FDC37M81X_CONFPA1 0x27
-#define SMSC_FDC37M81X_TEST4 0x2B
-#define SMSC_FDC37M81X_TEST5 0x2C
-#define SMSC_FDC37M81X_TEST1 0x2D
-#define SMSC_FDC37M81X_TEST2 0x2E
-#define SMSC_FDC37M81X_TEST3 0x2F
-
-/* Logical device numbers */
-#define SMSC_FDC37M81X_FDD 0x00
-#define SMSC_FDC37M81X_PARALLEL 0x03
-#define SMSC_FDC37M81X_SERIAL1 0x04
-#define SMSC_FDC37M81X_SERIAL2 0x05
-#define SMSC_FDC37M81X_KBD 0x07
-#define SMSC_FDC37M81X_AUXIO 0x08
-#define SMSC_FDC37M81X_NONE 0xff
-
-/* Logical device Config Registers */
-#define SMSC_FDC37M81X_ACTIVE 0x30
-#define SMSC_FDC37M81X_BASEADDR0 0x60
-#define SMSC_FDC37M81X_BASEADDR1 0x61
-#define SMSC_FDC37M81X_INT 0x70
-#define SMSC_FDC37M81X_INT2 0x72
-#define SMSC_FDC37M81X_LDCR_F0 0xF0
-
-/* Chip Config Values */
-#define SMSC_FDC37M81X_CONFIG_ENTER 0x55
-#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
-#define SMSC_FDC37M81X_CHIP_ID 0x4d
-
-unsigned long __init smsc_fdc37m81x_init(unsigned long port);
-
-void smsc_fdc37m81x_config_beg(void);
-
-void smsc_fdc37m81x_config_end(void);
-
-void smsc_fdc37m81x_config_set(u8 reg, u8 val);
-
-#endif
diff --git a/include/asm-mips/tx4927/toshiba_rbtx4927.h b/include/asm-mips/tx4927/toshiba_rbtx4927.h
deleted file mode 100644
index b188a659..0000000
--- a/include/asm-mips/tx4927/toshiba_rbtx4927.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_TX4927_TOSHIBA_RBTX4927_H
-#define __ASM_TX4927_TOSHIBA_RBTX4927_H
-
-#include <asm/tx4927/tx4927.h>
-#ifdef CONFIG_PCI
-#include <asm/tx4927/tx4927_pci.h>
-#endif
-
-#ifdef CONFIG_PCI
-#define TBTX4927_ISA_IO_OFFSET TX4927_PCIIO
-#else
-#define TBTX4927_ISA_IO_OFFSET 0
-#endif
-
-#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL
-#define RBTX4927_SW_RESET_DO_SET 0x01
-
-#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL
-#define RBTX4927_SW_RESET_ENABLE_SET 0x01
-
-
-#define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET)
-#define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5)
-
-int toshiba_rbtx4927_irq_nested(int sw_irq);
-
-#endif /* __ASM_TX4927_TOSHIBA_RBTX4927_H */
diff --git a/include/asm-mips/tx4927/tx4927.h b/include/asm-mips/tx4927/tx4927.h
deleted file mode 100644
index 193e80a..0000000
--- a/include/asm-mips/tx4927/tx4927.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * Copyright 2001-2006 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
- * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_TX4927_TX4927_H
-#define __ASM_TX4927_TX4927_H
-
-#include <asm/txx9irq.h>
-
-#define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
-#define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
-
-#define TX4927_IRQ_PIC_BEG TXX9_IRQ_BASE
-#define TX4927_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
-
-
-#define TX4927_IRQ_USER0 (TX4927_IRQ_CP0_BEG+0)
-#define TX4927_IRQ_USER1 (TX4927_IRQ_CP0_BEG+1)
-#define TX4927_IRQ_NEST_PIC_ON_CP0 (TX4927_IRQ_CP0_BEG+2)
-#define TX4927_IRQ_CPU_TIMER (TX4927_IRQ_CP0_BEG+7)
-
-#define TX4927_IRQ_NEST_EXT_ON_PIC (TX4927_IRQ_PIC_BEG+3)
-
-#endif /* __ASM_TX4927_TX4927_H */
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
deleted file mode 100644
index 0be77df..0000000
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ /dev/null
@@ -1,268 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- */
-#ifndef __ASM_TX4927_TX4927_PCI_H
-#define __ASM_TX4927_TX4927_PCI_H
-
-#define TX4927_CCFG_TOE 0x00004000
-#define TX4927_CCFG_WR 0x00008000
-#define TX4927_CCFG_TINTDIS 0x01000000
-
-#define TX4927_PCIMEM 0x08000000
-#define TX4927_PCIMEM_SIZE 0x08000000
-#define TX4927_PCIIO 0x16000000
-#define TX4927_PCIIO_SIZE 0x01000000
-
-#define TX4927_SDRAMC_REG 0xff1f8000
-#define TX4927_EBUSC_REG 0xff1f9000
-#define TX4927_PCIC_REG 0xff1fd000
-#define TX4927_CCFG_REG 0xff1fe000
-#define TX4927_IRC_REG 0xff1ff600
-#define TX4927_NR_TMR 3
-#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
-#define TX4927_CE3 0x17f00000 /* 1M */
-#define TX4927_PCIRESET_ADDR 0xbc00f006
-#define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020)
-
-#define TX4927_IMSTAT_ADDR(n) (KSEG1 + TX4927_CE3 + 0x0004001a + (n))
-#define tx4927_imstat_ptr(n) \
- ((volatile unsigned char *)TX4927_IMSTAT_ADDR(n))
-
-/* bits for ISTAT3/IMASK3/IMSTAT3 */
-#define TX4927_INT3B_PCID 0
-#define TX4927_INT3B_PCIC 1
-#define TX4927_INT3B_PCIB 2
-#define TX4927_INT3B_PCIA 3
-#define TX4927_INT3F_PCID (1 << TX4927_INT3B_PCID)
-#define TX4927_INT3F_PCIC (1 << TX4927_INT3B_PCIC)
-#define TX4927_INT3F_PCIB (1 << TX4927_INT3B_PCIB)
-#define TX4927_INT3F_PCIA (1 << TX4927_INT3B_PCIA)
-
-/* bits for PCI_CLK (S6) */
-#define TX4927_PCI_CLK_HOST 0x80
-#define TX4927_PCI_CLK_MASK (0x0f << 3)
-#define TX4927_PCI_CLK_33 (0x01 << 3)
-#define TX4927_PCI_CLK_25 (0x04 << 3)
-#define TX4927_PCI_CLK_66 (0x09 << 3)
-#define TX4927_PCI_CLK_50 (0x0c << 3)
-#define TX4927_PCI_CLK_ACK 0x04
-#define TX4927_PCI_CLK_ACE 0x02
-#define TX4927_PCI_CLK_ENDIAN 0x01
-#define TX4927_NR_IRQ_LOCAL TX4927_IRQ_PIC_BEG
-#define TX4927_NR_IRQ_IRC 32 /* On-Chip IRC */
-
-#define TX4927_IR_PCIC 16
-#define TX4927_IR_PCIERR 22
-#define TX4927_IR_PCIPMA 23
-#define TX4927_IRQ_IRC_PCIC (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIC)
-#define TX4927_IRQ_IRC_PCIERR (TX4927_NR_IRQ_LOCAL + TX4927_IR_PCIERR)
-#define TX4927_IRQ_IOC1 (TX4927_NR_IRQ_LOCAL + TX4927_NR_IRQ_IRC)
-#define TX4927_IRQ_IOC_PCID (TX4927_IRQ_IOC1 + TX4927_INT3B_PCID)
-#define TX4927_IRQ_IOC_PCIC (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIC)
-#define TX4927_IRQ_IOC_PCIB (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIB)
-#define TX4927_IRQ_IOC_PCIA (TX4927_IRQ_IOC1 + TX4927_INT3B_PCIA)
-
-#ifdef _LANGUAGE_ASSEMBLY
-#define _CONST64(c) c
-#else
-#define _CONST64(c) c##ull
-
-#include <asm/byteorder.h>
-
-#define tx4927_pcireset_ptr \
- ((volatile unsigned char *)TX4927_PCIRESET_ADDR)
-#define tx4927_pci_clk_ptr \
- ((volatile unsigned char *)TX4927_PCI_CLK_ADDR)
-
-struct tx4927_sdramc_reg {
- volatile unsigned long long cr[4];
- volatile unsigned long long unused0[4];
- volatile unsigned long long tr;
- volatile unsigned long long unused1[2];
- volatile unsigned long long cmd;
-};
-
-struct tx4927_ebusc_reg {
- volatile unsigned long long cr[8];
-};
-
-struct tx4927_ccfg_reg {
- volatile unsigned long long ccfg;
- volatile unsigned long long crir;
- volatile unsigned long long pcfg;
- volatile unsigned long long tear;
- volatile unsigned long long clkctr;
- volatile unsigned long long unused0;
- volatile unsigned long long garbc;
- volatile unsigned long long unused1;
- volatile unsigned long long unused2;
- volatile unsigned long long ramp;
-};
-
-struct tx4927_pcic_reg {
- volatile unsigned long pciid;
- volatile unsigned long pcistatus;
- volatile unsigned long pciccrev;
- volatile unsigned long pcicfg1;
- volatile unsigned long p2gm0plbase; /* +10 */
- volatile unsigned long p2gm0pubase;
- volatile unsigned long p2gm1plbase;
- volatile unsigned long p2gm1pubase;
- volatile unsigned long p2gm2pbase; /* +20 */
- volatile unsigned long p2giopbase;
- volatile unsigned long unused0;
- volatile unsigned long pcisid;
- volatile unsigned long unused1; /* +30 */
- volatile unsigned long pcicapptr;
- volatile unsigned long unused2;
- volatile unsigned long pcicfg2;
- volatile unsigned long g2ptocnt; /* +40 */
- volatile unsigned long unused3[15];
- volatile unsigned long g2pstatus; /* +80 */
- volatile unsigned long g2pmask;
- volatile unsigned long pcisstatus;
- volatile unsigned long pcimask;
- volatile unsigned long p2gcfg; /* +90 */
- volatile unsigned long p2gstatus;
- volatile unsigned long p2gmask;
- volatile unsigned long p2gccmd;
- volatile unsigned long unused4[24]; /* +a0 */
- volatile unsigned long pbareqport; /* +100 */
- volatile unsigned long pbacfg;
- volatile unsigned long pbastatus;
- volatile unsigned long pbamask;
- volatile unsigned long pbabm; /* +110 */
- volatile unsigned long pbacreq;
- volatile unsigned long pbacgnt;
- volatile unsigned long pbacstate;
- volatile unsigned long long g2pmgbase[3]; /* +120 */
- volatile unsigned long long g2piogbase;
- volatile unsigned long g2pmmask[3]; /* +140 */
- volatile unsigned long g2piomask;
- volatile unsigned long long g2pmpbase[3]; /* +150 */
- volatile unsigned long long g2piopbase;
- volatile unsigned long pciccfg; /* +170 */
- volatile unsigned long pcicstatus;
- volatile unsigned long pcicmask;
- volatile unsigned long unused5;
- volatile unsigned long long p2gmgbase[3]; /* +180 */
- volatile unsigned long long p2giogbase;
- volatile unsigned long g2pcfgadrs; /* +1a0 */
- volatile unsigned long g2pcfgdata;
- volatile unsigned long unused6[8];
- volatile unsigned long g2pintack;
- volatile unsigned long g2pspc;
- volatile unsigned long unused7[12]; /* +1d0 */
- volatile unsigned long long pdmca; /* +200 */
- volatile unsigned long long pdmga;
- volatile unsigned long long pdmpa;
- volatile unsigned long long pdmcut;
- volatile unsigned long long pdmcnt; /* +220 */
- volatile unsigned long long pdmsts;
- volatile unsigned long long unused8[2];
- volatile unsigned long long pdmdb[4]; /* +240 */
- volatile unsigned long long pdmtdh; /* +260 */
- volatile unsigned long long pdmdms;
-};
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-/*
- * PCIC
- */
-
-/* bits for G2PSTATUS/G2PMASK */
-#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
-#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
-#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
-
-/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
-#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
-
-/* bits for PBACFG */
-#define TX4927_PCIC_PBACFG_RPBA 0x00000004
-#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
-#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
-
-/* bits for G2PMnGBASE */
-#define TX4927_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
-#define TX4927_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
-
-/* bits for G2PIOGBASE */
-#define TX4927_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
-#define TX4927_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
-
-/* bits for PCICSTATUS/PCICMASK */
-#define TX4927_PCIC_PCICSTATUS_ALL 0x000007dc
-
-/* bits for PCICCFG */
-#define TX4927_PCIC_PCICCFG_LBWC_MASK 0x0fff0000
-#define TX4927_PCIC_PCICCFG_HRST 0x00000800
-#define TX4927_PCIC_PCICCFG_SRST 0x00000400
-#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
-#define TX4927_PCIC_PCICCFG_IMSE0 0x00000100
-#define TX4927_PCIC_PCICCFG_IMSE1 0x00000080
-#define TX4927_PCIC_PCICCFG_IMSE2 0x00000040
-#define TX4927_PCIC_PCICCFG_IISE 0x00000020
-#define TX4927_PCIC_PCICCFG_ATR 0x00000010
-#define TX4927_PCIC_PCICCFG_ICAE 0x00000008
-
-/* bits for P2GMnGBASE */
-#define TX4927_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
-#define TX4927_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
-#define TX4927_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
-
-/* bits for P2GIOGBASE */
-#define TX4927_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
-#define TX4927_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
-#define TX4927_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
-
-#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
-#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
-
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX4927_CCFG_PCI66 0x00800000
-#define TX4927_CCFG_PCIMIDE 0x00400000
-#define TX4927_CCFG_PCIXARB 0x00002000
-#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
-#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
-#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
-#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
-#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
-
-#define TX4937_CCFG_PCIDIVMODE_MASK 0x00001c00
-#define TX4937_CCFG_PCIDIVMODE_8 0x00000000
-#define TX4937_CCFG_PCIDIVMODE_4 0x00000400
-#define TX4937_CCFG_PCIDIVMODE_9 0x00000800
-#define TX4937_CCFG_PCIDIVMODE_4_5 0x00000c00
-#define TX4937_CCFG_PCIDIVMODE_10 0x00001000
-#define TX4937_CCFG_PCIDIVMODE_5 0x00001400
-#define TX4937_CCFG_PCIDIVMODE_11 0x00001800
-#define TX4937_CCFG_PCIDIVMODE_5_5 0x00001c00
-
-/* PCFG : Pin Configuration */
-#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
-#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
-
-/* CLKCTR : Clock Control */
-#define TX4927_CLKCTR_PCICKD 0x00400000
-#define TX4927_CLKCTR_PCIRST 0x00000040
-
-
-#ifndef _LANGUAGE_ASSEMBLY
-
-#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
-#define tx4927_pcicptr ((struct tx4927_pcic_reg *)TX4927_PCIC_REG)
-#define tx4927_ccfgptr ((struct tx4927_ccfg_reg *)TX4927_CCFG_REG)
-#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
-
-#endif /* _LANGUAGE_ASSEMBLY */
-
-#endif /* __ASM_TX4927_TX4927_PCI_H */
diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/tx4938/rbtx4938.h
deleted file mode 100644
index dfed7be..0000000
--- a/include/asm-mips/tx4938/rbtx4938.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * linux/include/asm-mips/tx4938/rbtx4938.h
- * Definitions for TX4937/TX4938
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#ifndef __ASM_TX_BOARDS_RBTX4938_H
-#define __ASM_TX_BOARDS_RBTX4938_H
-
-#include <asm/addrspace.h>
-#include <asm/tx4938/tx4938.h>
-#include <asm/txx9irq.h>
-
-/* CS */
-#define RBTX4938_CE0 0x1c000000 /* 64M */
-#define RBTX4938_CE2 0x17f00000 /* 1M */
-
-/* Address map */
-#define RBTX4938_FPGA_REG_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000000)
-#define RBTX4938_FPGA_REV_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000002)
-#define RBTX4938_CONFIG1_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000004)
-#define RBTX4938_CONFIG2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000006)
-#define RBTX4938_CONFIG3_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000008)
-#define RBTX4938_LED_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001000)
-#define RBTX4938_DIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001002)
-#define RBTX4938_BDIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001004)
-#define RBTX4938_IMASK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002000)
-#define RBTX4938_IMASK2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002002)
-#define RBTX4938_INTPOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002004)
-#define RBTX4938_ISTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002006)
-#define RBTX4938_ISTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002008)
-#define RBTX4938_IMSTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200a)
-#define RBTX4938_IMSTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200c)
-#define RBTX4938_SOFTINT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00003000)
-#define RBTX4938_PIOSEL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005000)
-#define RBTX4938_SPICS_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005002)
-#define RBTX4938_SFPWR_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005008)
-#define RBTX4938_SFVOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000500a)
-#define RBTX4938_SOFTRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007000)
-#define RBTX4938_SOFTRESETLOCK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007002)
-#define RBTX4938_PCIRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007004)
-#define RBTX4938_ETHER_BASE (KSEG1 + RBTX4938_CE2 + 0x00020000)
-
-/* Ethernet port address (Jumperless Mode (W12:Open)) */
-#define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280)
-
-/* bits for ISTAT/IMASK/IMSTAT */
-#define RBTX4938_INTB_PCID 0
-#define RBTX4938_INTB_PCIC 1
-#define RBTX4938_INTB_PCIB 2
-#define RBTX4938_INTB_PCIA 3
-#define RBTX4938_INTB_RTC 4
-#define RBTX4938_INTB_ATA 5
-#define RBTX4938_INTB_MODEM 6
-#define RBTX4938_INTB_SWINT 7
-#define RBTX4938_INTF_PCID (1 << RBTX4938_INTB_PCID)
-#define RBTX4938_INTF_PCIC (1 << RBTX4938_INTB_PCIC)
-#define RBTX4938_INTF_PCIB (1 << RBTX4938_INTB_PCIB)
-#define RBTX4938_INTF_PCIA (1 << RBTX4938_INTB_PCIA)
-#define RBTX4938_INTF_RTC (1 << RBTX4938_INTB_RTC)
-#define RBTX4938_INTF_ATA (1 << RBTX4938_INTB_ATA)
-#define RBTX4938_INTF_MODEM (1 << RBTX4938_INTB_MODEM)
-#define RBTX4938_INTF_SWINT (1 << RBTX4938_INTB_SWINT)
-
-#define rbtx4938_fpga_rev_addr ((__u8 __iomem *)RBTX4938_FPGA_REV_ADDR)
-#define rbtx4938_led_addr ((__u8 __iomem *)RBTX4938_LED_ADDR)
-#define rbtx4938_dipsw_addr ((__u8 __iomem *)RBTX4938_DIPSW_ADDR)
-#define rbtx4938_bdipsw_addr ((__u8 __iomem *)RBTX4938_BDIPSW_ADDR)
-#define rbtx4938_imask_addr ((__u8 __iomem *)RBTX4938_IMASK_ADDR)
-#define rbtx4938_imask2_addr ((__u8 __iomem *)RBTX4938_IMASK2_ADDR)
-#define rbtx4938_intpol_addr ((__u8 __iomem *)RBTX4938_INTPOL_ADDR)
-#define rbtx4938_istat_addr ((__u8 __iomem *)RBTX4938_ISTAT_ADDR)
-#define rbtx4938_istat2_addr ((__u8 __iomem *)RBTX4938_ISTAT2_ADDR)
-#define rbtx4938_imstat_addr ((__u8 __iomem *)RBTX4938_IMSTAT_ADDR)
-#define rbtx4938_imstat2_addr ((__u8 __iomem *)RBTX4938_IMSTAT2_ADDR)
-#define rbtx4938_softint_addr ((__u8 __iomem *)RBTX4938_SOFTINT_ADDR)
-#define rbtx4938_piosel_addr ((__u8 __iomem *)RBTX4938_PIOSEL_ADDR)
-#define rbtx4938_spics_addr ((__u8 __iomem *)RBTX4938_SPICS_ADDR)
-#define rbtx4938_sfpwr_addr ((__u8 __iomem *)RBTX4938_SFPWR_ADDR)
-#define rbtx4938_sfvol_addr ((__u8 __iomem *)RBTX4938_SFVOL_ADDR)
-#define rbtx4938_softreset_addr ((__u8 __iomem *)RBTX4938_SOFTRESET_ADDR)
-#define rbtx4938_softresetlock_addr \
- ((__u8 __iomem *)RBTX4938_SOFTRESETLOCK_ADDR)
-#define rbtx4938_pcireset_addr ((__u8 __iomem *)RBTX4938_PCIRESET_ADDR)
-
-/*
- * IRQ mappings
- */
-
-#define RBTX4938_SOFT_INT0 0 /* not used */
-#define RBTX4938_SOFT_INT1 1 /* not used */
-#define RBTX4938_IRC_INT 2
-#define RBTX4938_TIMER_INT 7
-
-/* These are the virtual IRQ numbers, we divide all IRQ's into
- * 'spaces', the 'space' determines where and how to enable/disable
- * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
- * IRQ hardware is supported.
- */
-#define RBTX4938_NR_IRQ_LOCAL 8
-#define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */
-#define RBTX4938_NR_IRQ_IOC 8
-
-#define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
-#define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
-
-#define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE
-#define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
-#define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2)
-#define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2)
-#define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0)
-#define TX4938_IRQ_USER1 (TX4938_IRQ_CP0_BEG+1)
-#define TX4938_IRQ_CPU_TIMER (TX4938_IRQ_CP0_BEG+7)
-
-#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG 0
-#define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END 7
-
-#define TOSHIBA_RBTX4938_IRQ_IOC_BEG ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */
-#define TOSHIBA_RBTX4938_IRQ_IOC_END ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */
-#define RBTX4938_IRQ_LOCAL TX4938_IRQ_CP0_BEG
-#define RBTX4938_IRQ_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL)
-#define RBTX4938_IRQ_IOC (RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC)
-#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
-
-#define RBTX4938_IRQ_LOCAL_SOFT0 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0)
-#define RBTX4938_IRQ_LOCAL_SOFT1 (RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1)
-#define RBTX4938_IRQ_LOCAL_IRC (RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT)
-#define RBTX4938_IRQ_LOCAL_TIMER (RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT)
-#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
-#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
-#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
-#define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n))
-#define RBTX4938_IRQ_IRC_DMA(ch, n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch, n))
-#define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO)
-#define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC)
-#define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC)
-#define RBTX4938_IRQ_IRC_TMR(n) (RBTX4938_IRQ_IRC + TX4938_IR_TMR(n))
-#define RBTX4938_IRQ_IRC_NDFMC (RBTX4938_IRQ_IRC + TX4938_IR_NDFMC)
-#define RBTX4938_IRQ_IRC_PCIERR (RBTX4938_IRQ_IRC + TX4938_IR_PCIERR)
-#define RBTX4938_IRQ_IRC_PCIPME (RBTX4938_IRQ_IRC + TX4938_IR_PCIPME)
-#define RBTX4938_IRQ_IRC_ACLC (RBTX4938_IRQ_IRC + TX4938_IR_ACLC)
-#define RBTX4938_IRQ_IRC_ACLCPME (RBTX4938_IRQ_IRC + TX4938_IR_ACLCPME)
-#define RBTX4938_IRQ_IRC_PCIC1 (RBTX4938_IRQ_IRC + TX4938_IR_PCIC1)
-#define RBTX4938_IRQ_IRC_SPI (RBTX4938_IRQ_IRC + TX4938_IR_SPI)
-#define RBTX4938_IRQ_IOC_PCID (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCID)
-#define RBTX4938_IRQ_IOC_PCIC (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIC)
-#define RBTX4938_IRQ_IOC_PCIB (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIB)
-#define RBTX4938_IRQ_IOC_PCIA (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIA)
-#define RBTX4938_IRQ_IOC_RTC (RBTX4938_IRQ_IOC + RBTX4938_INTB_RTC)
-#define RBTX4938_IRQ_IOC_ATA (RBTX4938_IRQ_IOC + RBTX4938_INTB_ATA)
-#define RBTX4938_IRQ_IOC_MODEM (RBTX4938_IRQ_IOC + RBTX4938_INTB_MODEM)
-#define RBTX4938_IRQ_IOC_SWINT (RBTX4938_IRQ_IOC + RBTX4938_INTB_SWINT)
-
-
-/* IOC (PCI, etc) */
-#define RBTX4938_IRQ_IOCINT (TX4938_IRQ_NEST_EXT_ON_PIC)
-/* Onboard 10M Ether */
-#define RBTX4938_IRQ_ETHER (TX4938_IRQ_NEST_EXT_ON_PIC + 1)
-
-#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
-#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
-
-#endif /* __ASM_TX_BOARDS_RBTX4938_H */
diff --git a/include/asm-mips/tx4938/spi.h b/include/asm-mips/tx4938/spi.h
deleted file mode 100644
index 6a60c83..0000000
--- a/include/asm-mips/tx4938/spi.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * linux/include/asm-mips/tx4938/spi.h
- * Definitions for TX4937/TX4938 SPI
- *
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#ifndef __ASM_TX_BOARDS_TX4938_SPI_H
-#define __ASM_TX_BOARDS_TX4938_SPI_H
-
-extern int spi_eeprom_register(int chipid);
-extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
-
-#endif /* __ASM_TX_BOARDS_TX4938_SPI_H */
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/tx4938/tx4938.h
deleted file mode 100644
index e8807f5..0000000
--- a/include/asm-mips/tx4938/tx4938.h
+++ /dev/null
@@ -1,628 +0,0 @@
-/*
- * linux/include/asm-mips/tx4938/tx4938.h
- * Definitions for TX4937/TX4938
- * Copyright (C) 2000-2001 Toshiba Corporation
- *
- * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is
- * licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
- */
-#ifndef __ASM_TX_BOARDS_TX4938_H
-#define __ASM_TX_BOARDS_TX4938_H
-
-#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
-#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
-
-#define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG
-
-#define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC)
-#define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR)
-
-#define TX4938_PCIIO_0 0x10000000
-#define TX4938_PCIIO_1 0x01010000
-#define TX4938_PCIMEM_0 0x08000000
-#define TX4938_PCIMEM_1 0x11000000
-
-#define TX4938_PCIIO_SIZE_0 0x01000000
-#define TX4938_PCIIO_SIZE_1 0x00010000
-#define TX4938_PCIMEM_SIZE_0 0x08000000
-#define TX4938_PCIMEM_SIZE_1 0x00010000
-
-#define TX4938_REG_BASE 0xff1f0000 /* == TX4937_REG_BASE */
-#define TX4938_REG_SIZE 0x00010000 /* == TX4937_REG_SIZE */
-
-/* NDFMC, SRAMC, PCIC1, SPIC: TX4938 only */
-#define TX4938_NDFMC_REG (TX4938_REG_BASE + 0x5000)
-#define TX4938_SRAMC_REG (TX4938_REG_BASE + 0x6000)
-#define TX4938_PCIC1_REG (TX4938_REG_BASE + 0x7000)
-#define TX4938_SDRAMC_REG (TX4938_REG_BASE + 0x8000)
-#define TX4938_EBUSC_REG (TX4938_REG_BASE + 0x9000)
-#define TX4938_DMA_REG(ch) (TX4938_REG_BASE + 0xb000 + (ch) * 0x800)
-#define TX4938_PCIC_REG (TX4938_REG_BASE + 0xd000)
-#define TX4938_CCFG_REG (TX4938_REG_BASE + 0xe000)
-#define TX4938_NR_TMR 3
-#define TX4938_TMR_REG(ch) ((TX4938_REG_BASE + 0xf000) + (ch) * 0x100)
-#define TX4938_NR_SIO 2
-#define TX4938_SIO_REG(ch) ((TX4938_REG_BASE + 0xf300) + (ch) * 0x100)
-#define TX4938_PIO_REG (TX4938_REG_BASE + 0xf500)
-#define TX4938_IRC_REG (TX4938_REG_BASE + 0xf600)
-#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
-#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
-
-#ifdef __ASSEMBLY__
-#define _CONST64(c) c
-#else
-#define _CONST64(c) c##ull
-
-#include <asm/byteorder.h>
-
-#ifdef __BIG_ENDIAN
-#define endian_def_l2(e1, e2) \
- volatile unsigned long e1, e2
-#define endian_def_s2(e1, e2) \
- volatile unsigned short e1, e2
-#define endian_def_sb2(e1, e2, e3) \
- volatile unsigned short e1;volatile unsigned char e2, e3
-#define endian_def_b2s(e1, e2, e3) \
- volatile unsigned char e1, e2;volatile unsigned short e3
-#define endian_def_b4(e1, e2, e3, e4) \
- volatile unsigned char e1, e2, e3, e4
-#else
-#define endian_def_l2(e1, e2) \
- volatile unsigned long e2, e1
-#define endian_def_s2(e1, e2) \
- volatile unsigned short e2, e1
-#define endian_def_sb2(e1, e2, e3) \
- volatile unsigned char e3, e2;volatile unsigned short e1
-#define endian_def_b2s(e1, e2, e3) \
- volatile unsigned short e3;volatile unsigned char e2, e1
-#define endian_def_b4(e1, e2, e3, e4) \
- volatile unsigned char e4, e3, e2, e1
-#endif
-
-
-struct tx4938_sdramc_reg {
- volatile unsigned long long cr[4];
- volatile unsigned long long unused0[4];
- volatile unsigned long long tr;
- volatile unsigned long long unused1[2];
- volatile unsigned long long cmd;
- volatile unsigned long long sfcmd;
-};
-
-struct tx4938_ebusc_reg {
- volatile unsigned long long cr[8];
-};
-
-struct tx4938_dma_reg {
- struct tx4938_dma_ch_reg {
- volatile unsigned long long cha;
- volatile unsigned long long sar;
- volatile unsigned long long dar;
- endian_def_l2(unused0, cntr);
- endian_def_l2(unused1, sair);
- endian_def_l2(unused2, dair);
- endian_def_l2(unused3, ccr);
- endian_def_l2(unused4, csr);
- } ch[4];
- volatile unsigned long long dbr[8];
- volatile unsigned long long tdhr;
- volatile unsigned long long midr;
- endian_def_l2(unused0, mcr);
-};
-
-struct tx4938_pcic_reg {
- volatile unsigned long pciid;
- volatile unsigned long pcistatus;
- volatile unsigned long pciccrev;
- volatile unsigned long pcicfg1;
- volatile unsigned long p2gm0plbase; /* +10 */
- volatile unsigned long p2gm0pubase;
- volatile unsigned long p2gm1plbase;
- volatile unsigned long p2gm1pubase;
- volatile unsigned long p2gm2pbase; /* +20 */
- volatile unsigned long p2giopbase;
- volatile unsigned long unused0;
- volatile unsigned long pcisid;
- volatile unsigned long unused1; /* +30 */
- volatile unsigned long pcicapptr;
- volatile unsigned long unused2;
- volatile unsigned long pcicfg2;
- volatile unsigned long g2ptocnt; /* +40 */
- volatile unsigned long unused3[15];
- volatile unsigned long g2pstatus; /* +80 */
- volatile unsigned long g2pmask;
- volatile unsigned long pcisstatus;
- volatile unsigned long pcimask;
- volatile unsigned long p2gcfg; /* +90 */
- volatile unsigned long p2gstatus;
- volatile unsigned long p2gmask;
- volatile unsigned long p2gccmd;
- volatile unsigned long unused4[24]; /* +a0 */
- volatile unsigned long pbareqport; /* +100 */
- volatile unsigned long pbacfg;
- volatile unsigned long pbastatus;
- volatile unsigned long pbamask;
- volatile unsigned long pbabm; /* +110 */
- volatile unsigned long pbacreq;
- volatile unsigned long pbacgnt;
- volatile unsigned long pbacstate;
- volatile unsigned long long g2pmgbase[3]; /* +120 */
- volatile unsigned long long g2piogbase;
- volatile unsigned long g2pmmask[3]; /* +140 */
- volatile unsigned long g2piomask;
- volatile unsigned long long g2pmpbase[3]; /* +150 */
- volatile unsigned long long g2piopbase;
- volatile unsigned long pciccfg; /* +170 */
- volatile unsigned long pcicstatus;
- volatile unsigned long pcicmask;
- volatile unsigned long unused5;
- volatile unsigned long long p2gmgbase[3]; /* +180 */
- volatile unsigned long long p2giogbase;
- volatile unsigned long g2pcfgadrs; /* +1a0 */
- volatile unsigned long g2pcfgdata;
- volatile unsigned long unused6[8];
- volatile unsigned long g2pintack;
- volatile unsigned long g2pspc;
- volatile unsigned long unused7[12]; /* +1d0 */
- volatile unsigned long long pdmca; /* +200 */
- volatile unsigned long long pdmga;
- volatile unsigned long long pdmpa;
- volatile unsigned long long pdmctr;
- volatile unsigned long long pdmcfg; /* +220 */
- volatile unsigned long long pdmsts;
-};
-
-struct tx4938_aclc_reg {
- volatile unsigned long acctlen;
- volatile unsigned long acctldis;
- volatile unsigned long acregacc;
- volatile unsigned long unused0;
- volatile unsigned long acintsts;
- volatile unsigned long acintmsts;
- volatile unsigned long acinten;
- volatile unsigned long acintdis;
- volatile unsigned long acsemaph;
- volatile unsigned long unused1[7];
- volatile unsigned long acgpidat;
- volatile unsigned long acgpodat;
- volatile unsigned long acslten;
- volatile unsigned long acsltdis;
- volatile unsigned long acfifosts;
- volatile unsigned long unused2[11];
- volatile unsigned long acdmasts;
- volatile unsigned long acdmasel;
- volatile unsigned long unused3[6];
- volatile unsigned long acaudodat;
- volatile unsigned long acsurrdat;
- volatile unsigned long accentdat;
- volatile unsigned long aclfedat;
- volatile unsigned long acaudiat;
- volatile unsigned long unused4;
- volatile unsigned long acmodoat;
- volatile unsigned long acmodidat;
- volatile unsigned long unused5[15];
- volatile unsigned long acrevid;
-};
-
-
-struct tx4938_tmr_reg {
- volatile unsigned long tcr;
- volatile unsigned long tisr;
- volatile unsigned long cpra;
- volatile unsigned long cprb;
- volatile unsigned long itmr;
- volatile unsigned long unused0[3];
- volatile unsigned long ccdr;
- volatile unsigned long unused1[3];
- volatile unsigned long pgmr;
- volatile unsigned long unused2[3];
- volatile unsigned long wtmr;
- volatile unsigned long unused3[43];
- volatile unsigned long trr;
-};
-
-struct tx4938_sio_reg {
- volatile unsigned long lcr;
- volatile unsigned long dicr;
- volatile unsigned long disr;
- volatile unsigned long cisr;
- volatile unsigned long fcr;
- volatile unsigned long flcr;
- volatile unsigned long bgr;
- volatile unsigned long tfifo;
- volatile unsigned long rfifo;
-};
-
-struct tx4938_ndfmc_reg {
- endian_def_l2(unused0, dtr);
- endian_def_l2(unused1, mcr);
- endian_def_l2(unused2, sr);
- endian_def_l2(unused3, isr);
- endian_def_l2(unused4, imr);
- endian_def_l2(unused5, spr);
- endian_def_l2(unused6, rstr);
-};
-
-struct tx4938_spi_reg {
- volatile unsigned long mcr;
- volatile unsigned long cr0;
- volatile unsigned long cr1;
- volatile unsigned long fs;
- volatile unsigned long unused1;
- volatile unsigned long sr;
- volatile unsigned long dr;
- volatile unsigned long unused2;
-};
-
-struct tx4938_sramc_reg {
- volatile unsigned long long cr;
-};
-
-struct tx4938_ccfg_reg {
- volatile unsigned long long ccfg;
- volatile unsigned long long crir;
- volatile unsigned long long pcfg;
- volatile unsigned long long tear;
- volatile unsigned long long clkctr;
- volatile unsigned long long unused0;
- volatile unsigned long long garbc;
- volatile unsigned long long unused1;
- volatile unsigned long long unused2;
- volatile unsigned long long ramp;
- volatile unsigned long long unused3;
- volatile unsigned long long jmpadr;
-};
-
-#undef endian_def_l2
-#undef endian_def_s2
-#undef endian_def_sb2
-#undef endian_def_b2s
-#undef endian_def_b4
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * NDFMC
- */
-
-/* NDFMCR : NDFMC Mode Control */
-#define TX4938_NDFMCR_WE 0x80
-#define TX4938_NDFMCR_ECC_ALL 0x60
-#define TX4938_NDFMCR_ECC_RESET 0x60
-#define TX4938_NDFMCR_ECC_READ 0x40
-#define TX4938_NDFMCR_ECC_ON 0x20
-#define TX4938_NDFMCR_ECC_OFF 0x00
-#define TX4938_NDFMCR_CE 0x10
-#define TX4938_NDFMCR_BSPRT 0x04
-#define TX4938_NDFMCR_ALE 0x02
-#define TX4938_NDFMCR_CLE 0x01
-
-/* NDFMCR : NDFMC Status */
-#define TX4938_NDFSR_BUSY 0x80
-
-/* NDFMCR : NDFMC Reset */
-#define TX4938_NDFRSTR_RST 0x01
-
-/*
- * IRC
- */
-
-#define TX4938_IR_ECCERR 0
-#define TX4938_IR_WTOERR 1
-#define TX4938_NUM_IR_INT 6
-#define TX4938_IR_INT(n) (2 + (n))
-#define TX4938_NUM_IR_SIO 2
-#define TX4938_IR_SIO(n) (8 + (n))
-#define TX4938_NUM_IR_DMA 4
-#define TX4938_IR_DMA(ch, n) ((ch ? 27 : 10) + (n)) /* 10-13, 27-30 */
-#define TX4938_IR_PIO 14
-#define TX4938_IR_PDMAC 15
-#define TX4938_IR_PCIC 16
-#define TX4938_NUM_IR_TMR 3
-#define TX4938_IR_TMR(n) (17 + (n))
-#define TX4938_IR_NDFMC 21
-#define TX4938_IR_PCIERR 22
-#define TX4938_IR_PCIPME 23
-#define TX4938_IR_ACLC 24
-#define TX4938_IR_ACLCPME 25
-#define TX4938_IR_PCIC1 26
-#define TX4938_IR_SPI 31
-#define TX4938_NUM_IR 32
-/* multiplex */
-#define TX4938_IR_ETH0 TX4938_IR_INT(4)
-#define TX4938_IR_ETH1 TX4938_IR_INT(3)
-
-/*
- * CCFG
- */
-/* CCFG : Chip Configuration */
-#define TX4938_CCFG_WDRST _CONST64(0x0000020000000000)
-#define TX4938_CCFG_WDREXEN _CONST64(0x0000010000000000)
-#define TX4938_CCFG_BCFG_MASK _CONST64(0x000000ff00000000)
-#define TX4938_CCFG_TINTDIS 0x01000000
-#define TX4938_CCFG_PCI66 0x00800000
-#define TX4938_CCFG_PCIMODE 0x00400000
-#define TX4938_CCFG_PCI1_66 0x00200000
-#define TX4938_CCFG_DIVMODE_MASK 0x001e0000
-#define TX4938_CCFG_DIVMODE_2 (0x4 << 17)
-#define TX4938_CCFG_DIVMODE_2_5 (0xf << 17)
-#define TX4938_CCFG_DIVMODE_3 (0x5 << 17)
-#define TX4938_CCFG_DIVMODE_4 (0x6 << 17)
-#define TX4938_CCFG_DIVMODE_4_5 (0xd << 17)
-#define TX4938_CCFG_DIVMODE_8 (0x0 << 17)
-#define TX4938_CCFG_DIVMODE_10 (0xb << 17)
-#define TX4938_CCFG_DIVMODE_12 (0x1 << 17)
-#define TX4938_CCFG_DIVMODE_16 (0x2 << 17)
-#define TX4938_CCFG_DIVMODE_18 (0x9 << 17)
-#define TX4938_CCFG_BEOW 0x00010000
-#define TX4938_CCFG_WR 0x00008000
-#define TX4938_CCFG_TOE 0x00004000
-#define TX4938_CCFG_PCIXARB 0x00002000
-#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
-#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
-#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
-#define TX4938_CCFG_PCIDIVMODE_5 (0x5 << 10)
-#define TX4938_CCFG_PCIDIVMODE_5_5 (0x7 << 10)
-#define TX4938_CCFG_PCIDIVMODE_8 (0x0 << 10)
-#define TX4938_CCFG_PCIDIVMODE_9 (0x2 << 10)
-#define TX4938_CCFG_PCIDIVMODE_10 (0x4 << 10)
-#define TX4938_CCFG_PCIDIVMODE_11 (0x6 << 10)
-#define TX4938_CCFG_PCI1DMD 0x00000100
-#define TX4938_CCFG_SYSSP_MASK 0x000000c0
-#define TX4938_CCFG_ENDIAN 0x00000004
-#define TX4938_CCFG_HALT 0x00000002
-#define TX4938_CCFG_ACEHOLD 0x00000001
-
-/* PCFG : Pin Configuration */
-#define TX4938_PCFG_ETH0_SEL _CONST64(0x8000000000000000)
-#define TX4938_PCFG_ETH1_SEL _CONST64(0x4000000000000000)
-#define TX4938_PCFG_ATA_SEL _CONST64(0x2000000000000000)
-#define TX4938_PCFG_ISA_SEL _CONST64(0x1000000000000000)
-#define TX4938_PCFG_SPI_SEL _CONST64(0x0800000000000000)
-#define TX4938_PCFG_NDF_SEL _CONST64(0x0400000000000000)
-#define TX4938_PCFG_SDCLKDLY_MASK 0x30000000
-#define TX4938_PCFG_SDCLKDLY(d) ((d)<<28)
-#define TX4938_PCFG_SYSCLKEN 0x08000000
-#define TX4938_PCFG_SDCLKEN_ALL 0x07800000
-#define TX4938_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
-#define TX4938_PCFG_PCICLKEN_ALL 0x003f0000
-#define TX4938_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
-#define TX4938_PCFG_SEL2 0x00000200
-#define TX4938_PCFG_SEL1 0x00000100
-#define TX4938_PCFG_DMASEL_ALL 0x0000000f
-#define TX4938_PCFG_DMASEL0_DRQ0 0x00000000
-#define TX4938_PCFG_DMASEL0_SIO1 0x00000001
-#define TX4938_PCFG_DMASEL1_DRQ1 0x00000000
-#define TX4938_PCFG_DMASEL1_SIO1 0x00000002
-#define TX4938_PCFG_DMASEL2_DRQ2 0x00000000
-#define TX4938_PCFG_DMASEL2_SIO0 0x00000004
-#define TX4938_PCFG_DMASEL3_DRQ3 0x00000000
-#define TX4938_PCFG_DMASEL3_SIO0 0x00000008
-
-/* CLKCTR : Clock Control */
-#define TX4938_CLKCTR_NDFCKD _CONST64(0x0001000000000000)
-#define TX4938_CLKCTR_NDFRST _CONST64(0x0000000100000000)
-#define TX4938_CLKCTR_ETH1CKD 0x80000000
-#define TX4938_CLKCTR_ETH0CKD 0x40000000
-#define TX4938_CLKCTR_SPICKD 0x20000000
-#define TX4938_CLKCTR_SRAMCKD 0x10000000
-#define TX4938_CLKCTR_PCIC1CKD 0x08000000
-#define TX4938_CLKCTR_DMA1CKD 0x04000000
-#define TX4938_CLKCTR_ACLCKD 0x02000000
-#define TX4938_CLKCTR_PIOCKD 0x01000000
-#define TX4938_CLKCTR_DMACKD 0x00800000
-#define TX4938_CLKCTR_PCICKD 0x00400000
-#define TX4938_CLKCTR_TM0CKD 0x00100000
-#define TX4938_CLKCTR_TM1CKD 0x00080000
-#define TX4938_CLKCTR_TM2CKD 0x00040000
-#define TX4938_CLKCTR_SIO0CKD 0x00020000
-#define TX4938_CLKCTR_SIO1CKD 0x00010000
-#define TX4938_CLKCTR_ETH1RST 0x00008000
-#define TX4938_CLKCTR_ETH0RST 0x00004000
-#define TX4938_CLKCTR_SPIRST 0x00002000
-#define TX4938_CLKCTR_SRAMRST 0x00001000
-#define TX4938_CLKCTR_PCIC1RST 0x00000800
-#define TX4938_CLKCTR_DMA1RST 0x00000400
-#define TX4938_CLKCTR_ACLRST 0x00000200
-#define TX4938_CLKCTR_PIORST 0x00000100
-#define TX4938_CLKCTR_DMARST 0x00000080
-#define TX4938_CLKCTR_PCIRST 0x00000040
-#define TX4938_CLKCTR_TM0RST 0x00000010
-#define TX4938_CLKCTR_TM1RST 0x00000008
-#define TX4938_CLKCTR_TM2RST 0x00000004
-#define TX4938_CLKCTR_SIO0RST 0x00000002
-#define TX4938_CLKCTR_SIO1RST 0x00000001
-
-/* bits for G2PSTATUS/G2PMASK */
-#define TX4938_PCIC_G2PSTATUS_ALL 0x00000003
-#define TX4938_PCIC_G2PSTATUS_TTOE 0x00000002
-#define TX4938_PCIC_G2PSTATUS_RTOE 0x00000001
-
-/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
-#define TX4938_PCIC_PCISTATUS_ALL 0x0000f900
-
-/* bits for PBACFG */
-#define TX4938_PCIC_PBACFG_FIXPA 0x00000008
-#define TX4938_PCIC_PBACFG_RPBA 0x00000004
-#define TX4938_PCIC_PBACFG_PBAEN 0x00000002
-#define TX4938_PCIC_PBACFG_BMCEN 0x00000001
-
-/* bits for G2PMnGBASE */
-#define TX4938_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
-#define TX4938_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
-
-/* bits for G2PIOGBASE */
-#define TX4938_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
-#define TX4938_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
-
-/* bits for PCICSTATUS/PCICMASK */
-#define TX4938_PCIC_PCICSTATUS_ALL 0x000007b8
-#define TX4938_PCIC_PCICSTATUS_PME 0x00000400
-#define TX4938_PCIC_PCICSTATUS_TLB 0x00000200
-#define TX4938_PCIC_PCICSTATUS_NIB 0x00000100
-#define TX4938_PCIC_PCICSTATUS_ZIB 0x00000080
-#define TX4938_PCIC_PCICSTATUS_PERR 0x00000020
-#define TX4938_PCIC_PCICSTATUS_SERR 0x00000010
-#define TX4938_PCIC_PCICSTATUS_GBE 0x00000008
-#define TX4938_PCIC_PCICSTATUS_IWB 0x00000002
-#define TX4938_PCIC_PCICSTATUS_E2PDONE 0x00000001
-
-/* bits for PCICCFG */
-#define TX4938_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
-#define TX4938_PCIC_PCICCFG_HRST 0x00000800
-#define TX4938_PCIC_PCICCFG_SRST 0x00000400
-#define TX4938_PCIC_PCICCFG_IRBER 0x00000200
-#define TX4938_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
-#define TX4938_PCIC_PCICCFG_G2PM0EN 0x00000100
-#define TX4938_PCIC_PCICCFG_G2PM1EN 0x00000080
-#define TX4938_PCIC_PCICCFG_G2PM2EN 0x00000040
-#define TX4938_PCIC_PCICCFG_G2PIOEN 0x00000020
-#define TX4938_PCIC_PCICCFG_TCAR 0x00000010
-#define TX4938_PCIC_PCICCFG_ICAEN 0x00000008
-
-/* bits for P2GMnGBASE */
-#define TX4938_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
-#define TX4938_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
-#define TX4938_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
-
-/* bits for P2GIOGBASE */
-#define TX4938_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
-#define TX4938_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
-#define TX4938_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
-
-#define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
-#define TX4938_PCIC_MAX_DEVNU TX4938_PCIC_IDSEL_AD_TO_SLOT(32)
-
-/* bits for PDMCFG */
-#define TX4938_PCIC_PDMCFG_RSTFIFO 0x00200000
-#define TX4938_PCIC_PDMCFG_EXFER 0x00100000
-#define TX4938_PCIC_PDMCFG_REQDLY_MASK 0x00003800
-#define TX4938_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_16 (1 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_32 (2 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_64 (3 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_128 (4 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_256 (5 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_512 (6 << 11)
-#define TX4938_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
-#define TX4938_PCIC_PDMCFG_ERRIE 0x00000400
-#define TX4938_PCIC_PDMCFG_NCCMPIE 0x00000200
-#define TX4938_PCIC_PDMCFG_NTCMPIE 0x00000100
-#define TX4938_PCIC_PDMCFG_CHNEN 0x00000080
-#define TX4938_PCIC_PDMCFG_XFRACT 0x00000040
-#define TX4938_PCIC_PDMCFG_BSWAP 0x00000020
-#define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
-#define TX4938_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
-#define TX4938_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
-#define TX4938_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
-#define TX4938_PCIC_PDMCFG_XFRDIRC 0x00000002
-#define TX4938_PCIC_PDMCFG_CHRST 0x00000001
-
-/* bits for PDMSTS */
-#define TX4938_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
-#define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
-#define TX4938_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
-#define TX4938_PCIC_PDMSTS_FIFORP_MASK 0x00030000
-#define TX4938_PCIC_PDMSTS_ERRINT 0x00000800
-#define TX4938_PCIC_PDMSTS_DONEINT 0x00000400
-#define TX4938_PCIC_PDMSTS_CHNEN 0x00000200
-#define TX4938_PCIC_PDMSTS_XFRACT 0x00000100
-#define TX4938_PCIC_PDMSTS_ACCMP 0x00000080
-#define TX4938_PCIC_PDMSTS_NCCMP 0x00000040
-#define TX4938_PCIC_PDMSTS_NTCMP 0x00000020
-#define TX4938_PCIC_PDMSTS_CFGERR 0x00000008
-#define TX4938_PCIC_PDMSTS_PCIERR 0x00000004
-#define TX4938_PCIC_PDMSTS_CHNERR 0x00000002
-#define TX4938_PCIC_PDMSTS_DATAERR 0x00000001
-#define TX4938_PCIC_PDMSTS_ALL_CMP 0x000000e0
-#define TX4938_PCIC_PDMSTS_ALL_ERR 0x0000000f
-
-/*
- * DMA
- */
-/* bits for MCR */
-#define TX4938_DMA_MCR_EIS(ch) (0x10000000<<(ch))
-#define TX4938_DMA_MCR_DIS(ch) (0x01000000<<(ch))
-#define TX4938_DMA_MCR_RSFIF 0x00000080
-#define TX4938_DMA_MCR_FIFUM(ch) (0x00000008<<(ch))
-#define TX4938_DMA_MCR_RPRT 0x00000002
-#define TX4938_DMA_MCR_MSTEN 0x00000001
-
-/* bits for CCRn */
-#define TX4938_DMA_CCR_IMMCHN 0x20000000
-#define TX4938_DMA_CCR_USEXFSZ 0x10000000
-#define TX4938_DMA_CCR_LE 0x08000000
-#define TX4938_DMA_CCR_DBINH 0x04000000
-#define TX4938_DMA_CCR_SBINH 0x02000000
-#define TX4938_DMA_CCR_CHRST 0x01000000
-#define TX4938_DMA_CCR_RVBYTE 0x00800000
-#define TX4938_DMA_CCR_ACKPOL 0x00400000
-#define TX4938_DMA_CCR_REQPL 0x00200000
-#define TX4938_DMA_CCR_EGREQ 0x00100000
-#define TX4938_DMA_CCR_CHDN 0x00080000
-#define TX4938_DMA_CCR_DNCTL 0x00060000
-#define TX4938_DMA_CCR_EXTRQ 0x00010000
-#define TX4938_DMA_CCR_INTRQD 0x0000e000
-#define TX4938_DMA_CCR_INTENE 0x00001000
-#define TX4938_DMA_CCR_INTENC 0x00000800
-#define TX4938_DMA_CCR_INTENT 0x00000400
-#define TX4938_DMA_CCR_CHNEN 0x00000200
-#define TX4938_DMA_CCR_XFACT 0x00000100
-#define TX4938_DMA_CCR_SMPCHN 0x00000020
-#define TX4938_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c)
-#define TX4938_DMA_CCR_XFSZ_1W TX4938_DMA_CCR_XFSZ(2)
-#define TX4938_DMA_CCR_XFSZ_2W TX4938_DMA_CCR_XFSZ(3)
-#define TX4938_DMA_CCR_XFSZ_4W TX4938_DMA_CCR_XFSZ(4)
-#define TX4938_DMA_CCR_XFSZ_8W TX4938_DMA_CCR_XFSZ(5)
-#define TX4938_DMA_CCR_XFSZ_16W TX4938_DMA_CCR_XFSZ(6)
-#define TX4938_DMA_CCR_XFSZ_32W TX4938_DMA_CCR_XFSZ(7)
-#define TX4938_DMA_CCR_MEMIO 0x00000002
-#define TX4938_DMA_CCR_SNGAD 0x00000001
-
-/* bits for CSRn */
-#define TX4938_DMA_CSR_CHNEN 0x00000400
-#define TX4938_DMA_CSR_STLXFER 0x00000200
-#define TX4938_DMA_CSR_CHNACT 0x00000100
-#define TX4938_DMA_CSR_ABCHC 0x00000080
-#define TX4938_DMA_CSR_NCHNC 0x00000040
-#define TX4938_DMA_CSR_NTRNFC 0x00000020
-#define TX4938_DMA_CSR_EXTDN 0x00000010
-#define TX4938_DMA_CSR_CFERR 0x00000008
-#define TX4938_DMA_CSR_CHERR 0x00000004
-#define TX4938_DMA_CSR_DESERR 0x00000002
-#define TX4938_DMA_CSR_SORERR 0x00000001
-
-#ifndef __ASSEMBLY__
-
-#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
-#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
-#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
-#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
-#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG)
-#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG)
-#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG)
-#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
-#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
-#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
-#define tx4938_spiptr ((struct tx4938_spi_reg *)TX4938_SPI_REG)
-#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
-
-
-#define TX4938_REV_MAJ_MIN() ((unsigned long)tx4938_ccfgptr->crir & 0x00ff)
-#define TX4938_REV_PCODE() ((unsigned long)tx4938_ccfgptr->crir >> 16)
-
-#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
-#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
-
-#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
-#define TX4938_EBUSC_SIZE(ch) \
- (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
-
-
-#endif /* !__ASSEMBLY__ */
-
-#endif
diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h
new file mode 100644
index 0000000..d875666
--- /dev/null
+++ b/include/asm-mips/txx9/generic.h
@@ -0,0 +1,41 @@
+/*
+ * linux/include/asm-mips/txx9/generic.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_GENERIC_H
+#define __ASM_TXX9_GENERIC_H
+
+#include <linux/init.h>
+#include <linux/ioport.h> /* for struct resource */
+
+extern struct resource txx9_ce_res[];
+extern char txx9_pcode_str[8];
+void txx9_reg_res_init(unsigned int pcode, unsigned long base,
+ unsigned long size);
+
+extern unsigned int txx9_master_clock;
+extern unsigned int txx9_cpu_clock;
+extern unsigned int txx9_gbus_clock;
+
+struct pci_dev;
+struct txx9_board_vec {
+ const char *system;
+ void (*prom_init)(void);
+ void (*mem_setup)(void);
+ void (*irq_setup)(void);
+ void (*time_init)(void);
+ void (*arch_init)(void);
+ void (*device_init)(void);
+#ifdef CONFIG_PCI
+ int (*pci_map_irq)(const struct pci_dev *dev, u8 slot, u8 pin);
+#endif
+};
+extern struct txx9_board_vec *txx9_board_vec;
+extern int (*txx9_irq_dispatch)(int pending);
+void prom_init_cmdline(void);
+char *prom_getcmdline(void);
+
+#endif /* __ASM_TXX9_GENERIC_H */
diff --git a/include/asm-mips/txx9/jmr3927.h b/include/asm-mips/txx9/jmr3927.h
new file mode 100644
index 0000000..d6eb1b6
--- /dev/null
+++ b/include/asm-mips/txx9/jmr3927.h
@@ -0,0 +1,182 @@
+/*
+ * Defines for the TJSYS JMR-TX3927
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ */
+#ifndef __ASM_TXX9_JMR3927_H
+#define __ASM_TXX9_JMR3927_H
+
+#include <asm/txx9/tx3927.h>
+#include <asm/addrspace.h>
+#include <asm/system.h>
+#include <asm/txx9irq.h>
+
+/* CS */
+#define JMR3927_ROMCE0 0x1fc00000 /* 4M */
+#define JMR3927_ROMCE1 0x1e000000 /* 4M */
+#define JMR3927_ROMCE2 0x14000000 /* 16M */
+#define JMR3927_ROMCE3 0x10000000 /* 64M */
+#define JMR3927_ROMCE5 0x1d000000 /* 4M */
+#define JMR3927_SDCS0 0x00000000 /* 32M */
+#define JMR3927_SDCS1 0x02000000 /* 32M */
+/* PCI Direct Mappings */
+
+#define JMR3927_PCIMEM 0x08000000
+#define JMR3927_PCIMEM_SIZE 0x08000000 /* 128M */
+#define JMR3927_PCIIO 0x15000000
+#define JMR3927_PCIIO_SIZE 0x01000000 /* 16M */
+
+#define JMR3927_SDRAM_SIZE 0x02000000 /* 32M */
+#define JMR3927_PORT_BASE KSEG1
+
+/* Address map (virtual address) */
+#define JMR3927_ROM0_BASE (KSEG1 + JMR3927_ROMCE0)
+#define JMR3927_ROM1_BASE (KSEG1 + JMR3927_ROMCE1)
+#define JMR3927_IOC_BASE (KSEG1 + JMR3927_ROMCE2)
+#define JMR3927_PCIMEM_BASE (KSEG1 + JMR3927_PCIMEM)
+#define JMR3927_PCIIO_BASE (KSEG1 + JMR3927_PCIIO)
+
+#define JMR3927_IOC_REV_ADDR (JMR3927_IOC_BASE + 0x00000000)
+#define JMR3927_IOC_NVRAMB_ADDR (JMR3927_IOC_BASE + 0x00010000)
+#define JMR3927_IOC_LED_ADDR (JMR3927_IOC_BASE + 0x00020000)
+#define JMR3927_IOC_DIPSW_ADDR (JMR3927_IOC_BASE + 0x00030000)
+#define JMR3927_IOC_BREV_ADDR (JMR3927_IOC_BASE + 0x00040000)
+#define JMR3927_IOC_DTR_ADDR (JMR3927_IOC_BASE + 0x00050000)
+#define JMR3927_IOC_INTS1_ADDR (JMR3927_IOC_BASE + 0x00080000)
+#define JMR3927_IOC_INTS2_ADDR (JMR3927_IOC_BASE + 0x00090000)
+#define JMR3927_IOC_INTM_ADDR (JMR3927_IOC_BASE + 0x000a0000)
+#define JMR3927_IOC_INTP_ADDR (JMR3927_IOC_BASE + 0x000b0000)
+#define JMR3927_IOC_RESET_ADDR (JMR3927_IOC_BASE + 0x000f0000)
+
+/* Flash ROM */
+#define JMR3927_FLASH_BASE (JMR3927_ROM0_BASE)
+#define JMR3927_FLASH_SIZE 0x00400000
+
+/* bits for IOC_REV/IOC_BREV (high byte) */
+#define JMR3927_IDT_MASK 0xfc
+#define JMR3927_REV_MASK 0x03
+#define JMR3927_IOC_IDT 0xe0
+
+/* bits for IOC_INTS1/IOC_INTS2/IOC_INTM/IOC_INTP (high byte) */
+#define JMR3927_IOC_INTB_PCIA 0
+#define JMR3927_IOC_INTB_PCIB 1
+#define JMR3927_IOC_INTB_PCIC 2
+#define JMR3927_IOC_INTB_PCID 3
+#define JMR3927_IOC_INTB_MODEM 4
+#define JMR3927_IOC_INTB_INT6 5
+#define JMR3927_IOC_INTB_INT7 6
+#define JMR3927_IOC_INTB_SOFT 7
+#define JMR3927_IOC_INTF_PCIA (1 << JMR3927_IOC_INTF_PCIA)
+#define JMR3927_IOC_INTF_PCIB (1 << JMR3927_IOC_INTB_PCIB)
+#define JMR3927_IOC_INTF_PCIC (1 << JMR3927_IOC_INTB_PCIC)
+#define JMR3927_IOC_INTF_PCID (1 << JMR3927_IOC_INTB_PCID)
+#define JMR3927_IOC_INTF_MODEM (1 << JMR3927_IOC_INTB_MODEM)
+#define JMR3927_IOC_INTF_INT6 (1 << JMR3927_IOC_INTB_INT6)
+#define JMR3927_IOC_INTF_INT7 (1 << JMR3927_IOC_INTB_INT7)
+#define JMR3927_IOC_INTF_SOFT (1 << JMR3927_IOC_INTB_SOFT)
+
+/* bits for IOC_RESET (high byte) */
+#define JMR3927_IOC_RESET_CPU 1
+#define JMR3927_IOC_RESET_PCI 2
+
+#if defined(__BIG_ENDIAN)
+#define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned char *)(a)) = (d))
+#define jmr3927_ioc_reg_in(a) (*(volatile unsigned char *)(a))
+#elif defined(__LITTLE_ENDIAN)
+#define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned char *)((a)^1)) = (d))
+#define jmr3927_ioc_reg_in(a) (*(volatile unsigned char *)((a)^1))
+#else
+#error "No Endian"
+#endif
+
+/* LED macro */
+#define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR)
+
+#define jmr3927_led_and_set(n/*0-16*/) jmr3927_ioc_reg_out((~(n)) & jmr3927_ioc_reg_in(JMR3927_IOC_LED_ADDR), JMR3927_IOC_LED_ADDR)
+
+/* DIPSW4 macro */
+#define jmr3927_dipsw1() (gpio_get_value(11) == 0)
+#define jmr3927_dipsw2() (gpio_get_value(10) == 0)
+#define jmr3927_dipsw3() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 2) == 0)
+#define jmr3927_dipsw4() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 1) == 0)
+
+/*
+ * IRQ mappings
+ */
+
+/* These are the virtual IRQ numbers, we divide all IRQ's into
+ * 'spaces', the 'space' determines where and how to enable/disable
+ * that particular IRQ on an JMR machine. Add new 'spaces' as new
+ * IRQ hardware is supported.
+ */
+#define JMR3927_NR_IRQ_IRC 16 /* On-Chip IRC */
+#define JMR3927_NR_IRQ_IOC 8 /* PCI/MODEM/INT[6:7] */
+
+#define JMR3927_IRQ_IRC TXX9_IRQ_BASE
+#define JMR3927_IRQ_IOC (JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC)
+#define JMR3927_IRQ_END (JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC)
+
+#define JMR3927_IRQ_IRC_INT0 (JMR3927_IRQ_IRC + TX3927_IR_INT0)
+#define JMR3927_IRQ_IRC_INT1 (JMR3927_IRQ_IRC + TX3927_IR_INT1)
+#define JMR3927_IRQ_IRC_INT2 (JMR3927_IRQ_IRC + TX3927_IR_INT2)
+#define JMR3927_IRQ_IRC_INT3 (JMR3927_IRQ_IRC + TX3927_IR_INT3)
+#define JMR3927_IRQ_IRC_INT4 (JMR3927_IRQ_IRC + TX3927_IR_INT4)
+#define JMR3927_IRQ_IRC_INT5 (JMR3927_IRQ_IRC + TX3927_IR_INT5)
+#define JMR3927_IRQ_IRC_SIO0 (JMR3927_IRQ_IRC + TX3927_IR_SIO0)
+#define JMR3927_IRQ_IRC_SIO1 (JMR3927_IRQ_IRC + TX3927_IR_SIO1)
+#define JMR3927_IRQ_IRC_SIO(ch) (JMR3927_IRQ_IRC + TX3927_IR_SIO(ch))
+#define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA)
+#define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO)
+#define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI)
+#define JMR3927_IRQ_IRC_TMR(ch) (JMR3927_IRQ_IRC + TX3927_IR_TMR(ch))
+#define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA)
+#define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB)
+#define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC)
+#define JMR3927_IRQ_IOC_PCID (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCID)
+#define JMR3927_IRQ_IOC_MODEM (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_MODEM)
+#define JMR3927_IRQ_IOC_INT6 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT6)
+#define JMR3927_IRQ_IOC_INT7 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT7)
+#define JMR3927_IRQ_IOC_SOFT (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_SOFT)
+
+/* IOC (PCI, MODEM) */
+#define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1
+/* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */
+#define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3
+
+/* Clocks */
+#define JMR3927_CORECLK 132710400 /* 132.7MHz */
+#define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */
+#define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */
+
+/*
+ * TX3927 Pin Configuration:
+ *
+ * PCFG bits Avail Dead
+ * SELSIO[1:0]:11 RXD[1:0], TXD[1:0] PIO[6:3]
+ * SELSIOC[0]:1 CTS[0], RTS[0] INT[5:4]
+ * SELSIOC[1]:0,SELDSF:0, GSDAO[0],GPCST[3] CTS[1], RTS[1],DSF,
+ * GDBGE* PIO[2:1]
+ * SELDMA[2]:1 DMAREQ[2],DMAACK[2] PIO[13:12]
+ * SELTMR[2:0]:000 TIMER[1:0]
+ * SELCS:0,SELDMA[1]:0 PIO[11;10] SDCS_CE[7:6],
+ * DMAREQ[1],DMAACK[1]
+ * SELDMA[0]:1 DMAREQ[0],DMAACK[0] PIO[9:8]
+ * SELDMA[3]:1 DMAREQ[3],DMAACK[3] PIO[15:14]
+ * SELDONE:1 DMADONE PIO[7]
+ *
+ * Usable pins are:
+ * RXD[1;0],TXD[1:0],CTS[0],RTS[0],
+ * DMAREQ[0,2,3],DMAACK[0,2,3],DMADONE,PIO[0,10,11]
+ * INT[3:0]
+ */
+
+void jmr3927_prom_init(void);
+void jmr3927_irq_setup(void);
+struct pci_dev;
+int jmr3927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+
+#endif /* __ASM_TXX9_JMR3927_H */
diff --git a/include/asm-mips/txx9/pci.h b/include/asm-mips/txx9/pci.h
new file mode 100644
index 0000000..d89a450
--- /dev/null
+++ b/include/asm-mips/txx9/pci.h
@@ -0,0 +1,36 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_PCI_H
+#define __ASM_TXX9_PCI_H
+
+#include <linux/pci.h>
+
+extern struct pci_controller txx9_primary_pcic;
+struct pci_controller *
+txx9_alloc_pci_controller(struct pci_controller *pcic,
+ unsigned long mem_base, unsigned long mem_size,
+ unsigned long io_base, unsigned long io_size);
+
+int txx9_pci66_check(struct pci_controller *hose, int top_bus,
+ int current_bus);
+extern int txx9_pci_mem_high __initdata;
+
+extern int txx9_pci_option;
+#define TXX9_PCI_OPT_PICMG 0x0002
+#define TXX9_PCI_OPT_CLK_33 0x0008
+#define TXX9_PCI_OPT_CLK_66 0x0010
+#define TXX9_PCI_OPT_CLK_MASK \
+ (TXX9_PCI_OPT_CLK_33 | TXX9_PCI_OPT_CLK_66)
+#define TXX9_PCI_OPT_CLK_AUTO TXX9_PCI_OPT_CLK_MASK
+
+enum txx9_pci_err_action {
+ TXX9_PCI_ERR_REPORT,
+ TXX9_PCI_ERR_IGNORE,
+ TXX9_PCI_ERR_PANIC,
+};
+extern enum txx9_pci_err_action txx9_pci_err_action;
+
+#endif /* __ASM_TXX9_PCI_H */
diff --git a/include/asm-mips/txx9/rbtx4927.h b/include/asm-mips/txx9/rbtx4927.h
new file mode 100644
index 0000000..bf19458
--- /dev/null
+++ b/include/asm-mips/txx9/rbtx4927.h
@@ -0,0 +1,79 @@
+/*
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2002 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __ASM_TXX9_RBTX4927_H
+#define __ASM_TXX9_RBTX4927_H
+
+#include <asm/txx9/tx4927.h>
+
+#define RBTX4927_PCIMEM 0x08000000
+#define RBTX4927_PCIMEM_SIZE 0x08000000
+#define RBTX4927_PCIIO 0x16000000
+#define RBTX4927_PCIIO_SIZE 0x01000000
+
+#define rbtx4927_pcireset_addr ((__u8 __iomem *)0xbc00f006UL)
+
+/* bits for ISTAT/IMASK/IMSTAT */
+#define RBTX4927_INTB_PCID 0
+#define RBTX4927_INTB_PCIC 1
+#define RBTX4927_INTB_PCIB 2
+#define RBTX4927_INTB_PCIA 3
+#define RBTX4927_INTF_PCID (1 << RBTX4927_INTB_PCID)
+#define RBTX4927_INTF_PCIC (1 << RBTX4927_INTB_PCIC)
+#define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB)
+#define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA)
+
+#define RBTX4927_NR_IRQ_IOC 8 /* IOC */
+
+#define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR)
+#define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
+#define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
+#define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
+#define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
+
+#define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1))
+
+#ifdef CONFIG_PCI
+#define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
+#else
+#define RBTX4927_ISA_IO_OFFSET 0
+#endif
+
+#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL
+#define RBTX4927_SW_RESET_DO_SET 0x01
+
+#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL
+#define RBTX4927_SW_RESET_ENABLE_SET 0x01
+
+#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET)
+#define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3))
+
+void rbtx4927_prom_init(void);
+void rbtx4927_irq_setup(void);
+struct pci_dev;
+int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+
+#endif /* __ASM_TXX9_RBTX4927_H */
diff --git a/include/asm-mips/txx9/rbtx4938.h b/include/asm-mips/txx9/rbtx4938.h
new file mode 100644
index 0000000..2f5d5e7
--- /dev/null
+++ b/include/asm-mips/txx9/rbtx4938.h
@@ -0,0 +1,149 @@
+/*
+ * Definitions for TX4937/TX4938
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#ifndef __ASM_TXX9_RBTX4938_H
+#define __ASM_TXX9_RBTX4938_H
+
+#include <asm/addrspace.h>
+#include <asm/txx9irq.h>
+#include <asm/txx9/tx4938.h>
+
+/* CS */
+#define RBTX4938_CE0 0x1c000000 /* 64M */
+#define RBTX4938_CE2 0x17f00000 /* 1M */
+
+/* Address map */
+#define RBTX4938_FPGA_REG_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000000)
+#define RBTX4938_FPGA_REV_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000002)
+#define RBTX4938_CONFIG1_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000004)
+#define RBTX4938_CONFIG2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000006)
+#define RBTX4938_CONFIG3_ADDR (KSEG1 + RBTX4938_CE2 + 0x00000008)
+#define RBTX4938_LED_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001000)
+#define RBTX4938_DIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001002)
+#define RBTX4938_BDIPSW_ADDR (KSEG1 + RBTX4938_CE2 + 0x00001004)
+#define RBTX4938_IMASK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002000)
+#define RBTX4938_IMASK2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002002)
+#define RBTX4938_INTPOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002004)
+#define RBTX4938_ISTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002006)
+#define RBTX4938_ISTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x00002008)
+#define RBTX4938_IMSTAT_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200a)
+#define RBTX4938_IMSTAT2_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000200c)
+#define RBTX4938_SOFTINT_ADDR (KSEG1 + RBTX4938_CE2 + 0x00003000)
+#define RBTX4938_PIOSEL_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005000)
+#define RBTX4938_SPICS_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005002)
+#define RBTX4938_SFPWR_ADDR (KSEG1 + RBTX4938_CE2 + 0x00005008)
+#define RBTX4938_SFVOL_ADDR (KSEG1 + RBTX4938_CE2 + 0x0000500a)
+#define RBTX4938_SOFTRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007000)
+#define RBTX4938_SOFTRESETLOCK_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007002)
+#define RBTX4938_PCIRESET_ADDR (KSEG1 + RBTX4938_CE2 + 0x00007004)
+#define RBTX4938_ETHER_BASE (KSEG1 + RBTX4938_CE2 + 0x00020000)
+
+/* Ethernet port address (Jumperless Mode (W12:Open)) */
+#define RBTX4938_ETHER_ADDR (RBTX4938_ETHER_BASE + 0x280)
+
+/* bits for ISTAT/IMASK/IMSTAT */
+#define RBTX4938_INTB_PCID 0
+#define RBTX4938_INTB_PCIC 1
+#define RBTX4938_INTB_PCIB 2
+#define RBTX4938_INTB_PCIA 3
+#define RBTX4938_INTB_RTC 4
+#define RBTX4938_INTB_ATA 5
+#define RBTX4938_INTB_MODEM 6
+#define RBTX4938_INTB_SWINT 7
+#define RBTX4938_INTF_PCID (1 << RBTX4938_INTB_PCID)
+#define RBTX4938_INTF_PCIC (1 << RBTX4938_INTB_PCIC)
+#define RBTX4938_INTF_PCIB (1 << RBTX4938_INTB_PCIB)
+#define RBTX4938_INTF_PCIA (1 << RBTX4938_INTB_PCIA)
+#define RBTX4938_INTF_RTC (1 << RBTX4938_INTB_RTC)
+#define RBTX4938_INTF_ATA (1 << RBTX4938_INTB_ATA)
+#define RBTX4938_INTF_MODEM (1 << RBTX4938_INTB_MODEM)
+#define RBTX4938_INTF_SWINT (1 << RBTX4938_INTB_SWINT)
+
+#define rbtx4938_fpga_rev_addr ((__u8 __iomem *)RBTX4938_FPGA_REV_ADDR)
+#define rbtx4938_led_addr ((__u8 __iomem *)RBTX4938_LED_ADDR)
+#define rbtx4938_dipsw_addr ((__u8 __iomem *)RBTX4938_DIPSW_ADDR)
+#define rbtx4938_bdipsw_addr ((__u8 __iomem *)RBTX4938_BDIPSW_ADDR)
+#define rbtx4938_imask_addr ((__u8 __iomem *)RBTX4938_IMASK_ADDR)
+#define rbtx4938_imask2_addr ((__u8 __iomem *)RBTX4938_IMASK2_ADDR)
+#define rbtx4938_intpol_addr ((__u8 __iomem *)RBTX4938_INTPOL_ADDR)
+#define rbtx4938_istat_addr ((__u8 __iomem *)RBTX4938_ISTAT_ADDR)
+#define rbtx4938_istat2_addr ((__u8 __iomem *)RBTX4938_ISTAT2_ADDR)
+#define rbtx4938_imstat_addr ((__u8 __iomem *)RBTX4938_IMSTAT_ADDR)
+#define rbtx4938_imstat2_addr ((__u8 __iomem *)RBTX4938_IMSTAT2_ADDR)
+#define rbtx4938_softint_addr ((__u8 __iomem *)RBTX4938_SOFTINT_ADDR)
+#define rbtx4938_piosel_addr ((__u8 __iomem *)RBTX4938_PIOSEL_ADDR)
+#define rbtx4938_spics_addr ((__u8 __iomem *)RBTX4938_SPICS_ADDR)
+#define rbtx4938_sfpwr_addr ((__u8 __iomem *)RBTX4938_SFPWR_ADDR)
+#define rbtx4938_sfvol_addr ((__u8 __iomem *)RBTX4938_SFVOL_ADDR)
+#define rbtx4938_softreset_addr ((__u8 __iomem *)RBTX4938_SOFTRESET_ADDR)
+#define rbtx4938_softresetlock_addr \
+ ((__u8 __iomem *)RBTX4938_SOFTRESETLOCK_ADDR)
+#define rbtx4938_pcireset_addr ((__u8 __iomem *)RBTX4938_PCIRESET_ADDR)
+
+/*
+ * IRQ mappings
+ */
+
+#define RBTX4938_SOFT_INT0 0 /* not used */
+#define RBTX4938_SOFT_INT1 1 /* not used */
+#define RBTX4938_IRC_INT 2
+#define RBTX4938_TIMER_INT 7
+
+/* These are the virtual IRQ numbers, we divide all IRQ's into
+ * 'spaces', the 'space' determines where and how to enable/disable
+ * that particular IRQ on an RBTX4938 machine. Add new 'spaces' as new
+ * IRQ hardware is supported.
+ */
+#define RBTX4938_NR_IRQ_IOC 8
+
+#define RBTX4938_IRQ_IRC TXX9_IRQ_BASE
+#define RBTX4938_IRQ_IOC (TXX9_IRQ_BASE + TX4938_NUM_IR)
+#define RBTX4938_IRQ_END (RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
+
+#define RBTX4938_IRQ_IRC_ECCERR (RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
+#define RBTX4938_IRQ_IRC_WTOERR (RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
+#define RBTX4938_IRQ_IRC_INT(n) (RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
+#define RBTX4938_IRQ_IRC_SIO(n) (RBTX4938_IRQ_IRC + TX4938_IR_SIO(n))
+#define RBTX4938_IRQ_IRC_DMA(ch, n) (RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch, n))
+#define RBTX4938_IRQ_IRC_PIO (RBTX4938_IRQ_IRC + TX4938_IR_PIO)
+#define RBTX4938_IRQ_IRC_PDMAC (RBTX4938_IRQ_IRC + TX4938_IR_PDMAC)
+#define RBTX4938_IRQ_IRC_PCIC (RBTX4938_IRQ_IRC + TX4938_IR_PCIC)
+#define RBTX4938_IRQ_IRC_TMR(n) (RBTX4938_IRQ_IRC + TX4938_IR_TMR(n))
+#define RBTX4938_IRQ_IRC_NDFMC (RBTX4938_IRQ_IRC + TX4938_IR_NDFMC)
+#define RBTX4938_IRQ_IRC_PCIERR (RBTX4938_IRQ_IRC + TX4938_IR_PCIERR)
+#define RBTX4938_IRQ_IRC_PCIPME (RBTX4938_IRQ_IRC + TX4938_IR_PCIPME)
+#define RBTX4938_IRQ_IRC_ACLC (RBTX4938_IRQ_IRC + TX4938_IR_ACLC)
+#define RBTX4938_IRQ_IRC_ACLCPME (RBTX4938_IRQ_IRC + TX4938_IR_ACLCPME)
+#define RBTX4938_IRQ_IRC_PCIC1 (RBTX4938_IRQ_IRC + TX4938_IR_PCIC1)
+#define RBTX4938_IRQ_IRC_SPI (RBTX4938_IRQ_IRC + TX4938_IR_SPI)
+#define RBTX4938_IRQ_IOC_PCID (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCID)
+#define RBTX4938_IRQ_IOC_PCIC (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIC)
+#define RBTX4938_IRQ_IOC_PCIB (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIB)
+#define RBTX4938_IRQ_IOC_PCIA (RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIA)
+#define RBTX4938_IRQ_IOC_RTC (RBTX4938_IRQ_IOC + RBTX4938_INTB_RTC)
+#define RBTX4938_IRQ_IOC_ATA (RBTX4938_IRQ_IOC + RBTX4938_INTB_ATA)
+#define RBTX4938_IRQ_IOC_MODEM (RBTX4938_IRQ_IOC + RBTX4938_INTB_MODEM)
+#define RBTX4938_IRQ_IOC_SWINT (RBTX4938_IRQ_IOC + RBTX4938_INTB_SWINT)
+
+
+/* IOC (PCI, etc) */
+#define RBTX4938_IRQ_IOCINT (TXX9_IRQ_BASE + TX4938_IR_INT(0))
+/* Onboard 10M Ether */
+#define RBTX4938_IRQ_ETHER (TXX9_IRQ_BASE + TX4938_IR_INT(1))
+
+#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
+#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
+
+void rbtx4938_prom_init(void);
+void rbtx4938_irq_setup(void);
+struct pci_dev;
+int rbtx4938_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+
+#endif /* __ASM_TXX9_RBTX4938_H */
diff --git a/include/asm-mips/txx9/smsc_fdc37m81x.h b/include/asm-mips/txx9/smsc_fdc37m81x.h
new file mode 100644
index 0000000..9375e4f
--- /dev/null
+++ b/include/asm-mips/txx9/smsc_fdc37m81x.h
@@ -0,0 +1,67 @@
+/*
+ * Interface for smsc fdc48m81x Super IO chip
+ *
+ * Author: MontaVista Software, Inc. source@mvista.com
+ *
+ * 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Copyright (C) 2004 MontaVista Software Inc.
+ * Manish Lachwani, mlachwani@mvista.com
+ */
+
+#ifndef _SMSC_FDC37M81X_H_
+#define _SMSC_FDC37M81X_H_
+
+/* Common Registers */
+#define SMSC_FDC37M81X_CONFIG_INDEX 0x00
+#define SMSC_FDC37M81X_CONFIG_DATA 0x01
+#define SMSC_FDC37M81X_CONF 0x02
+#define SMSC_FDC37M81X_INDEX 0x03
+#define SMSC_FDC37M81X_DNUM 0x07
+#define SMSC_FDC37M81X_DID 0x20
+#define SMSC_FDC37M81X_DREV 0x21
+#define SMSC_FDC37M81X_PCNT 0x22
+#define SMSC_FDC37M81X_PMGT 0x23
+#define SMSC_FDC37M81X_OSC 0x24
+#define SMSC_FDC37M81X_CONFPA0 0x26
+#define SMSC_FDC37M81X_CONFPA1 0x27
+#define SMSC_FDC37M81X_TEST4 0x2B
+#define SMSC_FDC37M81X_TEST5 0x2C
+#define SMSC_FDC37M81X_TEST1 0x2D
+#define SMSC_FDC37M81X_TEST2 0x2E
+#define SMSC_FDC37M81X_TEST3 0x2F
+
+/* Logical device numbers */
+#define SMSC_FDC37M81X_FDD 0x00
+#define SMSC_FDC37M81X_PARALLEL 0x03
+#define SMSC_FDC37M81X_SERIAL1 0x04
+#define SMSC_FDC37M81X_SERIAL2 0x05
+#define SMSC_FDC37M81X_KBD 0x07
+#define SMSC_FDC37M81X_AUXIO 0x08
+#define SMSC_FDC37M81X_NONE 0xff
+
+/* Logical device Config Registers */
+#define SMSC_FDC37M81X_ACTIVE 0x30
+#define SMSC_FDC37M81X_BASEADDR0 0x60
+#define SMSC_FDC37M81X_BASEADDR1 0x61
+#define SMSC_FDC37M81X_INT 0x70
+#define SMSC_FDC37M81X_INT2 0x72
+#define SMSC_FDC37M81X_LDCR_F0 0xF0
+
+/* Chip Config Values */
+#define SMSC_FDC37M81X_CONFIG_ENTER 0x55
+#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
+#define SMSC_FDC37M81X_CHIP_ID 0x4d
+
+unsigned long __init smsc_fdc37m81x_init(unsigned long port);
+
+void smsc_fdc37m81x_config_beg(void);
+
+void smsc_fdc37m81x_config_end(void);
+
+void smsc_fdc37m81x_config_set(u8 reg, u8 val);
+
+#endif
diff --git a/include/asm-mips/txx9/spi.h b/include/asm-mips/txx9/spi.h
new file mode 100644
index 0000000..ddfb2a0
--- /dev/null
+++ b/include/asm-mips/txx9/spi.h
@@ -0,0 +1,19 @@
+/*
+ * Definitions for TX4937/TX4938 SPI
+ *
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#ifndef __ASM_TXX9_SPI_H
+#define __ASM_TXX9_SPI_H
+
+extern int spi_eeprom_register(int chipid);
+extern int spi_eeprom_read(int chipid, int address, unsigned char *buf, int len);
+
+#endif /* __ASM_TXX9_SPI_H */
diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h
new file mode 100644
index 0000000..ca414c7
--- /dev/null
+++ b/include/asm-mips/txx9/tx3927.h
@@ -0,0 +1,323 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Toshiba Corporation
+ */
+#ifndef __ASM_TXX9_TX3927_H
+#define __ASM_TXX9_TX3927_H
+
+#include <asm/txx9/txx927.h>
+
+#define TX3927_SDRAMC_REG 0xfffe8000
+#define TX3927_ROMC_REG 0xfffe9000
+#define TX3927_DMA_REG 0xfffeb000
+#define TX3927_IRC_REG 0xfffec000
+#define TX3927_PCIC_REG 0xfffed000
+#define TX3927_CCFG_REG 0xfffee000
+#define TX3927_NR_TMR 3
+#define TX3927_TMR_REG(ch) (0xfffef000 + (ch) * 0x100)
+#define TX3927_NR_SIO 2
+#define TX3927_SIO_REG(ch) (0xfffef300 + (ch) * 0x100)
+#define TX3927_PIO_REG 0xfffef500
+
+struct tx3927_sdramc_reg {
+ volatile unsigned long cr[8];
+ volatile unsigned long tr[3];
+ volatile unsigned long cmd;
+ volatile unsigned long smrs[2];
+};
+
+struct tx3927_romc_reg {
+ volatile unsigned long cr[8];
+};
+
+struct tx3927_dma_reg {
+ struct tx3927_dma_ch_reg {
+ volatile unsigned long cha;
+ volatile unsigned long sar;
+ volatile unsigned long dar;
+ volatile unsigned long cntr;
+ volatile unsigned long sair;
+ volatile unsigned long dair;
+ volatile unsigned long ccr;
+ volatile unsigned long csr;
+ } ch[4];
+ volatile unsigned long dbr[8];
+ volatile unsigned long tdhr;
+ volatile unsigned long mcr;
+ volatile unsigned long unused0;
+};
+
+#include <asm/byteorder.h>
+
+#ifdef __BIG_ENDIAN
+#define endian_def_s2(e1, e2) \
+ volatile unsigned short e1, e2
+#define endian_def_sb2(e1, e2, e3) \
+ volatile unsigned short e1;volatile unsigned char e2, e3
+#define endian_def_b2s(e1, e2, e3) \
+ volatile unsigned char e1, e2;volatile unsigned short e3
+#define endian_def_b4(e1, e2, e3, e4) \
+ volatile unsigned char e1, e2, e3, e4
+#else
+#define endian_def_s2(e1, e2) \
+ volatile unsigned short e2, e1
+#define endian_def_sb2(e1, e2, e3) \
+ volatile unsigned char e3, e2;volatile unsigned short e1
+#define endian_def_b2s(e1, e2, e3) \
+ volatile unsigned short e3;volatile unsigned char e2, e1
+#define endian_def_b4(e1, e2, e3, e4) \
+ volatile unsigned char e4, e3, e2, e1
+#endif
+
+struct tx3927_pcic_reg {
+ endian_def_s2(did, vid);
+ endian_def_s2(pcistat, pcicmd);
+ endian_def_b4(cc, scc, rpli, rid);
+ endian_def_b4(unused0, ht, mlt, cls);
+ volatile unsigned long ioba; /* +10 */
+ volatile unsigned long mba;
+ volatile unsigned long unused1[5];
+ endian_def_s2(svid, ssvid);
+ volatile unsigned long unused2; /* +30 */
+ endian_def_sb2(unused3, unused4, capptr);
+ volatile unsigned long unused5;
+ endian_def_b4(ml, mg, ip, il);
+ volatile unsigned long unused6; /* +40 */
+ volatile unsigned long istat;
+ volatile unsigned long iim;
+ volatile unsigned long rrt;
+ volatile unsigned long unused7[3]; /* +50 */
+ volatile unsigned long ipbmma;
+ volatile unsigned long ipbioma; /* +60 */
+ volatile unsigned long ilbmma;
+ volatile unsigned long ilbioma;
+ volatile unsigned long unused8[9];
+ volatile unsigned long tc; /* +90 */
+ volatile unsigned long tstat;
+ volatile unsigned long tim;
+ volatile unsigned long tccmd;
+ volatile unsigned long pcirrt; /* +a0 */
+ volatile unsigned long pcirrt_cmd;
+ volatile unsigned long pcirrdt;
+ volatile unsigned long unused9[3];
+ volatile unsigned long tlboap;
+ volatile unsigned long tlbiap;
+ volatile unsigned long tlbmma; /* +c0 */
+ volatile unsigned long tlbioma;
+ volatile unsigned long sc_msg;
+ volatile unsigned long sc_be;
+ volatile unsigned long tbl; /* +d0 */
+ volatile unsigned long unused10[3];
+ volatile unsigned long pwmng; /* +e0 */
+ volatile unsigned long pwmngs;
+ volatile unsigned long unused11[6];
+ volatile unsigned long req_trace; /* +100 */
+ volatile unsigned long pbapmc;
+ volatile unsigned long pbapms;
+ volatile unsigned long pbapmim;
+ volatile unsigned long bm; /* +110 */
+ volatile unsigned long cpcibrs;
+ volatile unsigned long cpcibgs;
+ volatile unsigned long pbacs;
+ volatile unsigned long iobas; /* +120 */
+ volatile unsigned long mbas;
+ volatile unsigned long lbc;
+ volatile unsigned long lbstat;
+ volatile unsigned long lbim; /* +130 */
+ volatile unsigned long pcistatim;
+ volatile unsigned long ica;
+ volatile unsigned long icd;
+ volatile unsigned long iiadp; /* +140 */
+ volatile unsigned long iscdp;
+ volatile unsigned long mmas;
+ volatile unsigned long iomas;
+ volatile unsigned long ipciaddr; /* +150 */
+ volatile unsigned long ipcidata;
+ volatile unsigned long ipcibe;
+};
+
+struct tx3927_ccfg_reg {
+ volatile unsigned long ccfg;
+ volatile unsigned long crir;
+ volatile unsigned long pcfg;
+ volatile unsigned long tear;
+ volatile unsigned long pdcr;
+};
+
+/*
+ * SDRAMC
+ */
+
+/*
+ * ROMC
+ */
+
+/*
+ * DMA
+ */
+/* bits for MCR */
+#define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch))
+#define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch))
+#define TX3927_DMA_MCR_RSFIF 0x00000080
+#define TX3927_DMA_MCR_FIFUM(ch) (0x00000008<<(ch))
+#define TX3927_DMA_MCR_LE 0x00000004
+#define TX3927_DMA_MCR_RPRT 0x00000002
+#define TX3927_DMA_MCR_MSTEN 0x00000001
+
+/* bits for CCRn */
+#define TX3927_DMA_CCR_DBINH 0x04000000
+#define TX3927_DMA_CCR_SBINH 0x02000000
+#define TX3927_DMA_CCR_CHRST 0x01000000
+#define TX3927_DMA_CCR_RVBYTE 0x00800000
+#define TX3927_DMA_CCR_ACKPOL 0x00400000
+#define TX3927_DMA_CCR_REQPL 0x00200000
+#define TX3927_DMA_CCR_EGREQ 0x00100000
+#define TX3927_DMA_CCR_CHDN 0x00080000
+#define TX3927_DMA_CCR_DNCTL 0x00060000
+#define TX3927_DMA_CCR_EXTRQ 0x00010000
+#define TX3927_DMA_CCR_INTRQD 0x0000e000
+#define TX3927_DMA_CCR_INTENE 0x00001000
+#define TX3927_DMA_CCR_INTENC 0x00000800
+#define TX3927_DMA_CCR_INTENT 0x00000400
+#define TX3927_DMA_CCR_CHNEN 0x00000200
+#define TX3927_DMA_CCR_XFACT 0x00000100
+#define TX3927_DMA_CCR_SNOP 0x00000080
+#define TX3927_DMA_CCR_DSTINC 0x00000040
+#define TX3927_DMA_CCR_SRCINC 0x00000020
+#define TX3927_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c)
+#define TX3927_DMA_CCR_XFSZ_1W TX3927_DMA_CCR_XFSZ(2)
+#define TX3927_DMA_CCR_XFSZ_4W TX3927_DMA_CCR_XFSZ(4)
+#define TX3927_DMA_CCR_XFSZ_8W TX3927_DMA_CCR_XFSZ(5)
+#define TX3927_DMA_CCR_XFSZ_16W TX3927_DMA_CCR_XFSZ(6)
+#define TX3927_DMA_CCR_XFSZ_32W TX3927_DMA_CCR_XFSZ(7)
+#define TX3927_DMA_CCR_MEMIO 0x00000002
+#define TX3927_DMA_CCR_ONEAD 0x00000001
+
+/* bits for CSRn */
+#define TX3927_DMA_CSR_CHNACT 0x00000100
+#define TX3927_DMA_CSR_ABCHC 0x00000080
+#define TX3927_DMA_CSR_NCHNC 0x00000040
+#define TX3927_DMA_CSR_NTRNFC 0x00000020
+#define TX3927_DMA_CSR_EXTDN 0x00000010
+#define TX3927_DMA_CSR_CFERR 0x00000008
+#define TX3927_DMA_CSR_CHERR 0x00000004
+#define TX3927_DMA_CSR_DESERR 0x00000002
+#define TX3927_DMA_CSR_SORERR 0x00000001
+
+/*
+ * IRC
+ */
+#define TX3927_IR_INT0 0
+#define TX3927_IR_INT1 1
+#define TX3927_IR_INT2 2
+#define TX3927_IR_INT3 3
+#define TX3927_IR_INT4 4
+#define TX3927_IR_INT5 5
+#define TX3927_IR_SIO0 6
+#define TX3927_IR_SIO1 7
+#define TX3927_IR_SIO(ch) (6 + (ch))
+#define TX3927_IR_DMA 8
+#define TX3927_IR_PIO 9
+#define TX3927_IR_PCI 10
+#define TX3927_IR_TMR(ch) (13 + (ch))
+#define TX3927_NUM_IR 16
+
+/*
+ * PCIC
+ */
+/* bits for PCICMD */
+/* see PCI_COMMAND_XXX in linux/pci.h */
+
+/* bits for PCISTAT */
+/* see PCI_STATUS_XXX in linux/pci.h */
+#define PCI_STATUS_NEW_CAP 0x0010
+
+/* bits for TC */
+#define TX3927_PCIC_TC_OF16E 0x00000020
+#define TX3927_PCIC_TC_IF8E 0x00000010
+#define TX3927_PCIC_TC_OF8E 0x00000008
+
+/* bits for IOBA/MBA */
+/* see PCI_BASE_ADDRESS_XXX in linux/pci.h */
+
+/* bits for PBAPMC */
+#define TX3927_PCIC_PBAPMC_RPBA 0x00000004
+#define TX3927_PCIC_PBAPMC_PBAEN 0x00000002
+#define TX3927_PCIC_PBAPMC_BMCEN 0x00000001
+
+/* bits for LBSTAT/LBIM */
+#define TX3927_PCIC_LBIM_ALL 0x0000003e
+
+/* bits for PCISTATIM (see also PCI_STATUS_XXX in linux/pci.h */
+#define TX3927_PCIC_PCISTATIM_ALL 0x0000f900
+
+/* bits for LBC */
+#define TX3927_PCIC_LBC_IBSE 0x00004000
+#define TX3927_PCIC_LBC_TIBSE 0x00002000
+#define TX3927_PCIC_LBC_TMFBSE 0x00001000
+#define TX3927_PCIC_LBC_HRST 0x00000800
+#define TX3927_PCIC_LBC_SRST 0x00000400
+#define TX3927_PCIC_LBC_EPCAD 0x00000200
+#define TX3927_PCIC_LBC_MSDSE 0x00000100
+#define TX3927_PCIC_LBC_CRR 0x00000080
+#define TX3927_PCIC_LBC_ILMDE 0x00000040
+#define TX3927_PCIC_LBC_ILIDE 0x00000020
+
+#define TX3927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
+#define TX3927_PCIC_MAX_DEVNU TX3927_PCIC_IDSEL_AD_TO_SLOT(32)
+
+/*
+ * CCFG
+ */
+/* CCFG : Chip Configuration */
+#define TX3927_CCFG_TLBOFF 0x00020000
+#define TX3927_CCFG_BEOW 0x00010000
+#define TX3927_CCFG_WR 0x00008000
+#define TX3927_CCFG_TOE 0x00004000
+#define TX3927_CCFG_PCIXARB 0x00002000
+#define TX3927_CCFG_PCI3 0x00001000
+#define TX3927_CCFG_PSNP 0x00000800
+#define TX3927_CCFG_PPRI 0x00000400
+#define TX3927_CCFG_PLLM 0x00000030
+#define TX3927_CCFG_ENDIAN 0x00000004
+#define TX3927_CCFG_HALT 0x00000002
+#define TX3927_CCFG_ACEHOLD 0x00000001
+
+/* PCFG : Pin Configuration */
+#define TX3927_PCFG_SYSCLKEN 0x08000000
+#define TX3927_PCFG_SDRCLKEN_ALL 0x07c00000
+#define TX3927_PCFG_SDRCLKEN(ch) (0x00400000<<(ch))
+#define TX3927_PCFG_PCICLKEN_ALL 0x003c0000
+#define TX3927_PCFG_PCICLKEN(ch) (0x00040000<<(ch))
+#define TX3927_PCFG_SELALL 0x0003ffff
+#define TX3927_PCFG_SELCS 0x00020000
+#define TX3927_PCFG_SELDSF 0x00010000
+#define TX3927_PCFG_SELSIOC_ALL 0x0000c000
+#define TX3927_PCFG_SELSIOC(ch) (0x00004000<<(ch))
+#define TX3927_PCFG_SELSIO_ALL 0x00003000
+#define TX3927_PCFG_SELSIO(ch) (0x00001000<<(ch))
+#define TX3927_PCFG_SELTMR_ALL 0x00000e00
+#define TX3927_PCFG_SELTMR(ch) (0x00000200<<(ch))
+#define TX3927_PCFG_SELDONE 0x00000100
+#define TX3927_PCFG_INTDMA_ALL 0x000000f0
+#define TX3927_PCFG_INTDMA(ch) (0x00000010<<(ch))
+#define TX3927_PCFG_SELDMA_ALL 0x0000000f
+#define TX3927_PCFG_SELDMA(ch) (0x00000001<<(ch))
+
+#define tx3927_sdramcptr ((struct tx3927_sdramc_reg *)TX3927_SDRAMC_REG)
+#define tx3927_romcptr ((struct tx3927_romc_reg *)TX3927_ROMC_REG)
+#define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG)
+#define tx3927_pcicptr ((struct tx3927_pcic_reg *)TX3927_PCIC_REG)
+#define tx3927_ccfgptr ((struct tx3927_ccfg_reg *)TX3927_CCFG_REG)
+#define tx3927_tmrptr(ch) ((struct txx927_tmr_reg *)TX3927_TMR_REG(ch))
+#define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch))
+#define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG)
+
+struct pci_controller;
+void __init tx3927_pcic_setup(struct pci_controller *channel,
+ unsigned long sdram_size, int extarb);
+
+#endif /* __ASM_TXX9_TX3927_H */
diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h
new file mode 100644
index 0000000..46d60af
--- /dev/null
+++ b/include/asm-mips/txx9/tx4927.h
@@ -0,0 +1,219 @@
+/*
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * Copyright 2001-2006 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+ * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
+ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __ASM_TXX9_TX4927_H
+#define __ASM_TXX9_TX4927_H
+
+#include <linux/types.h>
+#include <linux/io.h>
+#include <asm/txx9irq.h>
+#include <asm/txx9/tx4927pcic.h>
+
+#define TX4927_SDRAMC_REG 0xff1f8000
+#define TX4927_EBUSC_REG 0xff1f9000
+#define TX4927_PCIC_REG 0xff1fd000
+#define TX4927_CCFG_REG 0xff1fe000
+#define TX4927_IRC_REG 0xff1ff600
+#define TX4927_NR_TMR 3
+#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
+
+#define TX4927_IR_INT(n) (2 + (n))
+#define TX4927_IR_SIO(n) (8 + (n))
+#define TX4927_IR_PCIC 16
+#define TX4927_IR_PCIERR 22
+#define TX4927_NUM_IR 32
+
+#define TX4927_IRC_INT 2 /* IP[2] in Status register */
+
+struct tx4927_sdramc_reg {
+ volatile unsigned long long cr[4];
+ volatile unsigned long long unused0[4];
+ volatile unsigned long long tr;
+ volatile unsigned long long unused1[2];
+ volatile unsigned long long cmd;
+};
+
+struct tx4927_ebusc_reg {
+ volatile unsigned long long cr[8];
+};
+
+struct tx4927_ccfg_reg {
+ u64 ccfg;
+ u64 crir;
+ u64 pcfg;
+ u64 toea;
+ u64 clkctr;
+ u64 unused0;
+ u64 garbc;
+ u64 unused1;
+ u64 unused2;
+ u64 ramp;
+};
+
+/*
+ * CCFG
+ */
+/* CCFG : Chip Configuration */
+#define TX4927_CCFG_WDRST 0x0000020000000000ULL
+#define TX4927_CCFG_WDREXEN 0x0000010000000000ULL
+#define TX4927_CCFG_BCFG_MASK 0x000000ff00000000ULL
+#define TX4927_CCFG_TINTDIS 0x01000000
+#define TX4927_CCFG_PCI66 0x00800000
+#define TX4927_CCFG_PCIMODE 0x00400000
+#define TX4927_CCFG_DIVMODE_MASK 0x000e0000
+#define TX4927_CCFG_DIVMODE_8 (0x0 << 17)
+#define TX4927_CCFG_DIVMODE_12 (0x1 << 17)
+#define TX4927_CCFG_DIVMODE_16 (0x2 << 17)
+#define TX4927_CCFG_DIVMODE_10 (0x3 << 17)
+#define TX4927_CCFG_DIVMODE_2 (0x4 << 17)
+#define TX4927_CCFG_DIVMODE_3 (0x5 << 17)
+#define TX4927_CCFG_DIVMODE_4 (0x6 << 17)
+#define TX4927_CCFG_DIVMODE_2_5 (0x7 << 17)
+#define TX4927_CCFG_BEOW 0x00010000
+#define TX4927_CCFG_WR 0x00008000
+#define TX4927_CCFG_TOE 0x00004000
+#define TX4927_CCFG_PCIARB 0x00002000
+#define TX4927_CCFG_PCIDIVMODE_MASK 0x00001800
+#define TX4927_CCFG_PCIDIVMODE_2_5 0x00000000
+#define TX4927_CCFG_PCIDIVMODE_3 0x00000800
+#define TX4927_CCFG_PCIDIVMODE_5 0x00001000
+#define TX4927_CCFG_PCIDIVMODE_6 0x00001800
+#define TX4927_CCFG_SYSSP_MASK 0x000000c0
+#define TX4927_CCFG_ENDIAN 0x00000004
+#define TX4927_CCFG_HALT 0x00000002
+#define TX4927_CCFG_ACEHOLD 0x00000001
+#define TX4927_CCFG_W1CBITS (TX4927_CCFG_WDRST | TX4927_CCFG_BEOW)
+
+/* PCFG : Pin Configuration */
+#define TX4927_PCFG_SDCLKDLY_MASK 0x30000000
+#define TX4927_PCFG_SDCLKDLY(d) ((d)<<28)
+#define TX4927_PCFG_SYSCLKEN 0x08000000
+#define TX4927_PCFG_SDCLKEN_ALL 0x07800000
+#define TX4927_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
+#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
+#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
+#define TX4927_PCFG_SEL2 0x00000200
+#define TX4927_PCFG_SEL1 0x00000100
+#define TX4927_PCFG_DMASEL_ALL 0x000000ff
+#define TX4927_PCFG_DMASEL0_MASK 0x00000003
+#define TX4927_PCFG_DMASEL1_MASK 0x0000000c
+#define TX4927_PCFG_DMASEL2_MASK 0x00000030
+#define TX4927_PCFG_DMASEL3_MASK 0x000000c0
+#define TX4927_PCFG_DMASEL0_DRQ0 0x00000000
+#define TX4927_PCFG_DMASEL0_SIO1 0x00000001
+#define TX4927_PCFG_DMASEL0_ACL0 0x00000002
+#define TX4927_PCFG_DMASEL0_ACL2 0x00000003
+#define TX4927_PCFG_DMASEL1_DRQ1 0x00000000
+#define TX4927_PCFG_DMASEL1_SIO1 0x00000004
+#define TX4927_PCFG_DMASEL1_ACL1 0x00000008
+#define TX4927_PCFG_DMASEL1_ACL3 0x0000000c
+#define TX4927_PCFG_DMASEL2_DRQ2 0x00000000 /* SEL2=0 */
+#define TX4927_PCFG_DMASEL2_SIO0 0x00000010 /* SEL2=0 */
+#define TX4927_PCFG_DMASEL2_ACL1 0x00000000 /* SEL2=1 */
+#define TX4927_PCFG_DMASEL2_ACL2 0x00000020 /* SEL2=1 */
+#define TX4927_PCFG_DMASEL2_ACL0 0x00000030 /* SEL2=1 */
+#define TX4927_PCFG_DMASEL3_DRQ3 0x00000000
+#define TX4927_PCFG_DMASEL3_SIO0 0x00000040
+#define TX4927_PCFG_DMASEL3_ACL3 0x00000080
+#define TX4927_PCFG_DMASEL3_ACL1 0x000000c0
+
+/* CLKCTR : Clock Control */
+#define TX4927_CLKCTR_ACLCKD 0x02000000
+#define TX4927_CLKCTR_PIOCKD 0x01000000
+#define TX4927_CLKCTR_DMACKD 0x00800000
+#define TX4927_CLKCTR_PCICKD 0x00400000
+#define TX4927_CLKCTR_TM0CKD 0x00100000
+#define TX4927_CLKCTR_TM1CKD 0x00080000
+#define TX4927_CLKCTR_TM2CKD 0x00040000
+#define TX4927_CLKCTR_SIO0CKD 0x00020000
+#define TX4927_CLKCTR_SIO1CKD 0x00010000
+#define TX4927_CLKCTR_ACLRST 0x00000200
+#define TX4927_CLKCTR_PIORST 0x00000100
+#define TX4927_CLKCTR_DMARST 0x00000080
+#define TX4927_CLKCTR_PCIRST 0x00000040
+#define TX4927_CLKCTR_TM0RST 0x00000010
+#define TX4927_CLKCTR_TM1RST 0x00000008
+#define TX4927_CLKCTR_TM2RST 0x00000004
+#define TX4927_CLKCTR_SIO0RST 0x00000002
+#define TX4927_CLKCTR_SIO1RST 0x00000001
+
+#define tx4927_sdramcptr ((struct tx4927_sdramc_reg *)TX4927_SDRAMC_REG)
+#define tx4927_pcicptr \
+ ((struct tx4927_pcic_reg __iomem *)TX4927_PCIC_REG)
+#define tx4927_ccfgptr \
+ ((struct tx4927_ccfg_reg __iomem *)TX4927_CCFG_REG)
+#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
+
+/* utilities */
+static inline void txx9_clear64(__u64 __iomem *adr, __u64 bits)
+{
+#ifdef CONFIG_32BIT
+ unsigned long flags;
+ local_irq_save(flags);
+#endif
+ ____raw_writeq(____raw_readq(adr) & ~bits, adr);
+#ifdef CONFIG_32BIT
+ local_irq_restore(flags);
+#endif
+}
+static inline void txx9_set64(__u64 __iomem *adr, __u64 bits)
+{
+#ifdef CONFIG_32BIT
+ unsigned long flags;
+ local_irq_save(flags);
+#endif
+ ____raw_writeq(____raw_readq(adr) | bits, adr);
+#ifdef CONFIG_32BIT
+ local_irq_restore(flags);
+#endif
+}
+
+/* These functions are not interrupt safe. */
+static inline void tx4927_ccfg_clear(__u64 bits)
+{
+ ____raw_writeq(____raw_readq(&tx4927_ccfgptr->ccfg)
+ & ~(TX4927_CCFG_W1CBITS | bits),
+ &tx4927_ccfgptr->ccfg);
+}
+static inline void tx4927_ccfg_set(__u64 bits)
+{
+ ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
+ & ~TX4927_CCFG_W1CBITS) | bits,
+ &tx4927_ccfgptr->ccfg);
+}
+static inline void tx4927_ccfg_change(__u64 change, __u64 new)
+{
+ ____raw_writeq((____raw_readq(&tx4927_ccfgptr->ccfg)
+ & ~(TX4927_CCFG_W1CBITS | change)) |
+ new,
+ &tx4927_ccfgptr->ccfg);
+}
+
+int tx4927_report_pciclk(void);
+int tx4927_pciclk66_setup(void);
+void tx4927_irq_init(void);
+
+#endif /* __ASM_TXX9_TX4927_H */
diff --git a/include/asm-mips/txx9/tx4927pcic.h b/include/asm-mips/txx9/tx4927pcic.h
new file mode 100644
index 0000000..d61c3d0
--- /dev/null
+++ b/include/asm-mips/txx9/tx4927pcic.h
@@ -0,0 +1,199 @@
+/*
+ * include/asm-mips/txx9/tx4927pcic.h
+ * TX4927 PCI controller definitions.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9_TX4927PCIC_H
+#define __ASM_TXX9_TX4927PCIC_H
+
+#include <linux/pci.h>
+
+struct tx4927_pcic_reg {
+ u32 pciid;
+ u32 pcistatus;
+ u32 pciccrev;
+ u32 pcicfg1;
+ u32 p2gm0plbase; /* +10 */
+ u32 p2gm0pubase;
+ u32 p2gm1plbase;
+ u32 p2gm1pubase;
+ u32 p2gm2pbase; /* +20 */
+ u32 p2giopbase;
+ u32 unused0;
+ u32 pcisid;
+ u32 unused1; /* +30 */
+ u32 pcicapptr;
+ u32 unused2;
+ u32 pcicfg2;
+ u32 g2ptocnt; /* +40 */
+ u32 unused3[15];
+ u32 g2pstatus; /* +80 */
+ u32 g2pmask;
+ u32 pcisstatus;
+ u32 pcimask;
+ u32 p2gcfg; /* +90 */
+ u32 p2gstatus;
+ u32 p2gmask;
+ u32 p2gccmd;
+ u32 unused4[24]; /* +a0 */
+ u32 pbareqport; /* +100 */
+ u32 pbacfg;
+ u32 pbastatus;
+ u32 pbamask;
+ u32 pbabm; /* +110 */
+ u32 pbacreq;
+ u32 pbacgnt;
+ u32 pbacstate;
+ u64 g2pmgbase[3]; /* +120 */
+ u64 g2piogbase;
+ u32 g2pmmask[3]; /* +140 */
+ u32 g2piomask;
+ u64 g2pmpbase[3]; /* +150 */
+ u64 g2piopbase;
+ u32 pciccfg; /* +170 */
+ u32 pcicstatus;
+ u32 pcicmask;
+ u32 unused5;
+ u64 p2gmgbase[3]; /* +180 */
+ u64 p2giogbase;
+ u32 g2pcfgadrs; /* +1a0 */
+ u32 g2pcfgdata;
+ u32 unused6[8];
+ u32 g2pintack;
+ u32 g2pspc;
+ u32 unused7[12]; /* +1d0 */
+ u64 pdmca; /* +200 */
+ u64 pdmga;
+ u64 pdmpa;
+ u64 pdmctr;
+ u64 pdmcfg; /* +220 */
+ u64 pdmsts;
+};
+
+/* bits for PCICMD */
+/* see PCI_COMMAND_XXX in linux/pci_regs.h */
+
+/* bits for PCISTAT */
+/* see PCI_STATUS_XXX in linux/pci_regs.h */
+
+/* bits for IOBA/MBA */
+/* see PCI_BASE_ADDRESS_XXX in linux/pci_regs.h */
+
+/* bits for G2PSTATUS/G2PMASK */
+#define TX4927_PCIC_G2PSTATUS_ALL 0x00000003
+#define TX4927_PCIC_G2PSTATUS_TTOE 0x00000002
+#define TX4927_PCIC_G2PSTATUS_RTOE 0x00000001
+
+/* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci_regs.h */
+#define TX4927_PCIC_PCISTATUS_ALL 0x0000f900
+
+/* bits for PBACFG */
+#define TX4927_PCIC_PBACFG_FIXPA 0x00000008
+#define TX4927_PCIC_PBACFG_RPBA 0x00000004
+#define TX4927_PCIC_PBACFG_PBAEN 0x00000002
+#define TX4927_PCIC_PBACFG_BMCEN 0x00000001
+
+/* bits for PBASTATUS/PBAMASK */
+#define TX4927_PCIC_PBASTATUS_ALL 0x00000001
+#define TX4927_PCIC_PBASTATUS_BM 0x00000001
+
+/* bits for G2PMnGBASE */
+#define TX4927_PCIC_G2PMnGBASE_BSDIS 0x0000002000000000ULL
+#define TX4927_PCIC_G2PMnGBASE_ECHG 0x0000001000000000ULL
+
+/* bits for G2PIOGBASE */
+#define TX4927_PCIC_G2PIOGBASE_BSDIS 0x0000002000000000ULL
+#define TX4927_PCIC_G2PIOGBASE_ECHG 0x0000001000000000ULL
+
+/* bits for PCICSTATUS/PCICMASK */
+#define TX4927_PCIC_PCICSTATUS_ALL 0x000007b8
+#define TX4927_PCIC_PCICSTATUS_PME 0x00000400
+#define TX4927_PCIC_PCICSTATUS_TLB 0x00000200
+#define TX4927_PCIC_PCICSTATUS_NIB 0x00000100
+#define TX4927_PCIC_PCICSTATUS_ZIB 0x00000080
+#define TX4927_PCIC_PCICSTATUS_PERR 0x00000020
+#define TX4927_PCIC_PCICSTATUS_SERR 0x00000010
+#define TX4927_PCIC_PCICSTATUS_GBE 0x00000008
+#define TX4927_PCIC_PCICSTATUS_IWB 0x00000002
+#define TX4927_PCIC_PCICSTATUS_E2PDONE 0x00000001
+
+/* bits for PCICCFG */
+#define TX4927_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
+#define TX4927_PCIC_PCICCFG_HRST 0x00000800
+#define TX4927_PCIC_PCICCFG_SRST 0x00000400
+#define TX4927_PCIC_PCICCFG_IRBER 0x00000200
+#define TX4927_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
+#define TX4927_PCIC_PCICCFG_G2PM0EN 0x00000100
+#define TX4927_PCIC_PCICCFG_G2PM1EN 0x00000080
+#define TX4927_PCIC_PCICCFG_G2PM2EN 0x00000040
+#define TX4927_PCIC_PCICCFG_G2PIOEN 0x00000020
+#define TX4927_PCIC_PCICCFG_TCAR 0x00000010
+#define TX4927_PCIC_PCICCFG_ICAEN 0x00000008
+
+/* bits for P2GMnGBASE */
+#define TX4927_PCIC_P2GMnGBASE_TMEMEN 0x0000004000000000ULL
+#define TX4927_PCIC_P2GMnGBASE_TBSDIS 0x0000002000000000ULL
+#define TX4927_PCIC_P2GMnGBASE_TECHG 0x0000001000000000ULL
+
+/* bits for P2GIOGBASE */
+#define TX4927_PCIC_P2GIOGBASE_TIOEN 0x0000004000000000ULL
+#define TX4927_PCIC_P2GIOGBASE_TBSDIS 0x0000002000000000ULL
+#define TX4927_PCIC_P2GIOGBASE_TECHG 0x0000001000000000ULL
+
+#define TX4927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
+#define TX4927_PCIC_MAX_DEVNU TX4927_PCIC_IDSEL_AD_TO_SLOT(32)
+
+/* bits for PDMCFG */
+#define TX4927_PCIC_PDMCFG_RSTFIFO 0x00200000
+#define TX4927_PCIC_PDMCFG_EXFER 0x00100000
+#define TX4927_PCIC_PDMCFG_REQDLY_MASK 0x00003800
+#define TX4927_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_16 (1 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_32 (2 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_64 (3 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_128 (4 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_256 (5 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_512 (6 << 11)
+#define TX4927_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
+#define TX4927_PCIC_PDMCFG_ERRIE 0x00000400
+#define TX4927_PCIC_PDMCFG_NCCMPIE 0x00000200
+#define TX4927_PCIC_PDMCFG_NTCMPIE 0x00000100
+#define TX4927_PCIC_PDMCFG_CHNEN 0x00000080
+#define TX4927_PCIC_PDMCFG_XFRACT 0x00000040
+#define TX4927_PCIC_PDMCFG_BSWAP 0x00000020
+#define TX4927_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
+#define TX4927_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
+#define TX4927_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
+#define TX4927_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
+#define TX4927_PCIC_PDMCFG_XFRDIRC 0x00000002
+#define TX4927_PCIC_PDMCFG_CHRST 0x00000001
+
+/* bits for PDMSTS */
+#define TX4927_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
+#define TX4927_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
+#define TX4927_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
+#define TX4927_PCIC_PDMSTS_FIFORP_MASK 0x00030000
+#define TX4927_PCIC_PDMSTS_ERRINT 0x00000800
+#define TX4927_PCIC_PDMSTS_DONEINT 0x00000400
+#define TX4927_PCIC_PDMSTS_CHNEN 0x00000200
+#define TX4927_PCIC_PDMSTS_XFRACT 0x00000100
+#define TX4927_PCIC_PDMSTS_ACCMP 0x00000080
+#define TX4927_PCIC_PDMSTS_NCCMP 0x00000040
+#define TX4927_PCIC_PDMSTS_NTCMP 0x00000020
+#define TX4927_PCIC_PDMSTS_CFGERR 0x00000008
+#define TX4927_PCIC_PDMSTS_PCIERR 0x00000004
+#define TX4927_PCIC_PDMSTS_CHNERR 0x00000002
+#define TX4927_PCIC_PDMSTS_DATAERR 0x00000001
+#define TX4927_PCIC_PDMSTS_ALL_CMP 0x000000e0
+#define TX4927_PCIC_PDMSTS_ALL_ERR 0x0000000f
+
+struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr(
+ struct pci_controller *channel);
+void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr,
+ struct pci_controller *channel, int extarb);
+void tx4927_report_pcic_status(void);
+
+#endif /* __ASM_TXX9_TX4927PCIC_H */
diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h
new file mode 100644
index 0000000..12de68a
--- /dev/null
+++ b/include/asm-mips/txx9/tx4938.h
@@ -0,0 +1,465 @@
+/*
+ * Definitions for TX4937/TX4938
+ * Copyright (C) 2000-2001 Toshiba Corporation
+ *
+ * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
+ */
+#ifndef __ASM_TXX9_TX4938_H
+#define __ASM_TXX9_TX4938_H
+
+/* some controllers are compatible with 4927 */
+#include <asm/txx9/tx4927.h>
+
+#define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
+#define tx4938_write_nfmc(b, addr) (*(volatile unsigned int *)(addr)) = (b)
+
+#define TX4938_PCIIO_0 0x10000000
+#define TX4938_PCIIO_1 0x01010000
+#define TX4938_PCIMEM_0 0x08000000
+#define TX4938_PCIMEM_1 0x11000000
+
+#define TX4938_PCIIO_SIZE_0 0x01000000
+#define TX4938_PCIIO_SIZE_1 0x00010000
+#define TX4938_PCIMEM_SIZE_0 0x08000000
+#define TX4938_PCIMEM_SIZE_1 0x00010000
+
+#define TX4938_REG_BASE 0xff1f0000 /* == TX4937_REG_BASE */
+#define TX4938_REG_SIZE 0x00010000 /* == TX4937_REG_SIZE */
+
+/* NDFMC, SRAMC, PCIC1, SPIC: TX4938 only */
+#define TX4938_NDFMC_REG (TX4938_REG_BASE + 0x5000)
+#define TX4938_SRAMC_REG (TX4938_REG_BASE + 0x6000)
+#define TX4938_PCIC1_REG (TX4938_REG_BASE + 0x7000)
+#define TX4938_SDRAMC_REG (TX4938_REG_BASE + 0x8000)
+#define TX4938_EBUSC_REG (TX4938_REG_BASE + 0x9000)
+#define TX4938_DMA_REG(ch) (TX4938_REG_BASE + 0xb000 + (ch) * 0x800)
+#define TX4938_PCIC_REG (TX4938_REG_BASE + 0xd000)
+#define TX4938_CCFG_REG (TX4938_REG_BASE + 0xe000)
+#define TX4938_NR_TMR 3
+#define TX4938_TMR_REG(ch) ((TX4938_REG_BASE + 0xf000) + (ch) * 0x100)
+#define TX4938_NR_SIO 2
+#define TX4938_SIO_REG(ch) ((TX4938_REG_BASE + 0xf300) + (ch) * 0x100)
+#define TX4938_PIO_REG (TX4938_REG_BASE + 0xf500)
+#define TX4938_IRC_REG (TX4938_REG_BASE + 0xf600)
+#define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
+#define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
+
+#define _CONST64(c) c##ull
+
+#include <asm/byteorder.h>
+
+#ifdef __BIG_ENDIAN
+#define endian_def_l2(e1, e2) \
+ volatile unsigned long e1, e2
+#define endian_def_s2(e1, e2) \
+ volatile unsigned short e1, e2
+#define endian_def_sb2(e1, e2, e3) \
+ volatile unsigned short e1;volatile unsigned char e2, e3
+#define endian_def_b2s(e1, e2, e3) \
+ volatile unsigned char e1, e2;volatile unsigned short e3
+#define endian_def_b4(e1, e2, e3, e4) \
+ volatile unsigned char e1, e2, e3, e4
+#else
+#define endian_def_l2(e1, e2) \
+ volatile unsigned long e2, e1
+#define endian_def_s2(e1, e2) \
+ volatile unsigned short e2, e1
+#define endian_def_sb2(e1, e2, e3) \
+ volatile unsigned char e3, e2;volatile unsigned short e1
+#define endian_def_b2s(e1, e2, e3) \
+ volatile unsigned short e3;volatile unsigned char e2, e1
+#define endian_def_b4(e1, e2, e3, e4) \
+ volatile unsigned char e4, e3, e2, e1
+#endif
+
+
+struct tx4938_sdramc_reg {
+ volatile unsigned long long cr[4];
+ volatile unsigned long long unused0[4];
+ volatile unsigned long long tr;
+ volatile unsigned long long unused1[2];
+ volatile unsigned long long cmd;
+ volatile unsigned long long sfcmd;
+};
+
+struct tx4938_ebusc_reg {
+ volatile unsigned long long cr[8];
+};
+
+struct tx4938_dma_reg {
+ struct tx4938_dma_ch_reg {
+ volatile unsigned long long cha;
+ volatile unsigned long long sar;
+ volatile unsigned long long dar;
+ endian_def_l2(unused0, cntr);
+ endian_def_l2(unused1, sair);
+ endian_def_l2(unused2, dair);
+ endian_def_l2(unused3, ccr);
+ endian_def_l2(unused4, csr);
+ } ch[4];
+ volatile unsigned long long dbr[8];
+ volatile unsigned long long tdhr;
+ volatile unsigned long long midr;
+ endian_def_l2(unused0, mcr);
+};
+
+struct tx4938_aclc_reg {
+ volatile unsigned long acctlen;
+ volatile unsigned long acctldis;
+ volatile unsigned long acregacc;
+ volatile unsigned long unused0;
+ volatile unsigned long acintsts;
+ volatile unsigned long acintmsts;
+ volatile unsigned long acinten;
+ volatile unsigned long acintdis;
+ volatile unsigned long acsemaph;
+ volatile unsigned long unused1[7];
+ volatile unsigned long acgpidat;
+ volatile unsigned long acgpodat;
+ volatile unsigned long acslten;
+ volatile unsigned long acsltdis;
+ volatile unsigned long acfifosts;
+ volatile unsigned long unused2[11];
+ volatile unsigned long acdmasts;
+ volatile unsigned long acdmasel;
+ volatile unsigned long unused3[6];
+ volatile unsigned long acaudodat;
+ volatile unsigned long acsurrdat;
+ volatile unsigned long accentdat;
+ volatile unsigned long aclfedat;
+ volatile unsigned long acaudiat;
+ volatile unsigned long unused4;
+ volatile unsigned long acmodoat;
+ volatile unsigned long acmodidat;
+ volatile unsigned long unused5[15];
+ volatile unsigned long acrevid;
+};
+
+
+struct tx4938_tmr_reg {
+ volatile unsigned long tcr;
+ volatile unsigned long tisr;
+ volatile unsigned long cpra;
+ volatile unsigned long cprb;
+ volatile unsigned long itmr;
+ volatile unsigned long unused0[3];
+ volatile unsigned long ccdr;
+ volatile unsigned long unused1[3];
+ volatile unsigned long pgmr;
+ volatile unsigned long unused2[3];
+ volatile unsigned long wtmr;
+ volatile unsigned long unused3[43];
+ volatile unsigned long trr;
+};
+
+struct tx4938_sio_reg {
+ volatile unsigned long lcr;
+ volatile unsigned long dicr;
+ volatile unsigned long disr;
+ volatile unsigned long cisr;
+ volatile unsigned long fcr;
+ volatile unsigned long flcr;
+ volatile unsigned long bgr;
+ volatile unsigned long tfifo;
+ volatile unsigned long rfifo;
+};
+
+struct tx4938_ndfmc_reg {
+ endian_def_l2(unused0, dtr);
+ endian_def_l2(unused1, mcr);
+ endian_def_l2(unused2, sr);
+ endian_def_l2(unused3, isr);
+ endian_def_l2(unused4, imr);
+ endian_def_l2(unused5, spr);
+ endian_def_l2(unused6, rstr);
+};
+
+struct tx4938_spi_reg {
+ volatile unsigned long mcr;
+ volatile unsigned long cr0;
+ volatile unsigned long cr1;
+ volatile unsigned long fs;
+ volatile unsigned long unused1;
+ volatile unsigned long sr;
+ volatile unsigned long dr;
+ volatile unsigned long unused2;
+};
+
+struct tx4938_sramc_reg {
+ volatile unsigned long long cr;
+};
+
+struct tx4938_ccfg_reg {
+ u64 ccfg;
+ u64 crir;
+ u64 pcfg;
+ u64 toea;
+ u64 clkctr;
+ u64 unused0;
+ u64 garbc;
+ u64 unused1;
+ u64 unused2;
+ u64 ramp;
+ u64 unused3;
+ u64 jmpadr;
+};
+
+#undef endian_def_l2
+#undef endian_def_s2
+#undef endian_def_sb2
+#undef endian_def_b2s
+#undef endian_def_b4
+
+/*
+ * NDFMC
+ */
+
+/* NDFMCR : NDFMC Mode Control */
+#define TX4938_NDFMCR_WE 0x80
+#define TX4938_NDFMCR_ECC_ALL 0x60
+#define TX4938_NDFMCR_ECC_RESET 0x60
+#define TX4938_NDFMCR_ECC_READ 0x40
+#define TX4938_NDFMCR_ECC_ON 0x20
+#define TX4938_NDFMCR_ECC_OFF 0x00
+#define TX4938_NDFMCR_CE 0x10
+#define TX4938_NDFMCR_BSPRT 0x04
+#define TX4938_NDFMCR_ALE 0x02
+#define TX4938_NDFMCR_CLE 0x01
+
+/* NDFMCR : NDFMC Status */
+#define TX4938_NDFSR_BUSY 0x80
+
+/* NDFMCR : NDFMC Reset */
+#define TX4938_NDFRSTR_RST 0x01
+
+/*
+ * IRC
+ */
+
+#define TX4938_IR_ECCERR 0
+#define TX4938_IR_WTOERR 1
+#define TX4938_NUM_IR_INT 6
+#define TX4938_IR_INT(n) (2 + (n))
+#define TX4938_NUM_IR_SIO 2
+#define TX4938_IR_SIO(n) (8 + (n))
+#define TX4938_NUM_IR_DMA 4
+#define TX4938_IR_DMA(ch, n) ((ch ? 27 : 10) + (n)) /* 10-13, 27-30 */
+#define TX4938_IR_PIO 14
+#define TX4938_IR_PDMAC 15
+#define TX4938_IR_PCIC 16
+#define TX4938_NUM_IR_TMR 3
+#define TX4938_IR_TMR(n) (17 + (n))
+#define TX4938_IR_NDFMC 21
+#define TX4938_IR_PCIERR 22
+#define TX4938_IR_PCIPME 23
+#define TX4938_IR_ACLC 24
+#define TX4938_IR_ACLCPME 25
+#define TX4938_IR_PCIC1 26
+#define TX4938_IR_SPI 31
+#define TX4938_NUM_IR 32
+/* multiplex */
+#define TX4938_IR_ETH0 TX4938_IR_INT(4)
+#define TX4938_IR_ETH1 TX4938_IR_INT(3)
+
+#define TX4938_IRC_INT 2 /* IP[2] in Status register */
+
+/*
+ * CCFG
+ */
+/* CCFG : Chip Configuration */
+#define TX4938_CCFG_WDRST _CONST64(0x0000020000000000)
+#define TX4938_CCFG_WDREXEN _CONST64(0x0000010000000000)
+#define TX4938_CCFG_BCFG_MASK _CONST64(0x000000ff00000000)
+#define TX4938_CCFG_TINTDIS 0x01000000
+#define TX4938_CCFG_PCI66 0x00800000
+#define TX4938_CCFG_PCIMODE 0x00400000
+#define TX4938_CCFG_PCI1_66 0x00200000
+#define TX4938_CCFG_DIVMODE_MASK 0x001e0000
+#define TX4938_CCFG_DIVMODE_2 (0x4 << 17)
+#define TX4938_CCFG_DIVMODE_2_5 (0xf << 17)
+#define TX4938_CCFG_DIVMODE_3 (0x5 << 17)
+#define TX4938_CCFG_DIVMODE_4 (0x6 << 17)
+#define TX4938_CCFG_DIVMODE_4_5 (0xd << 17)
+#define TX4938_CCFG_DIVMODE_8 (0x0 << 17)
+#define TX4938_CCFG_DIVMODE_10 (0xb << 17)
+#define TX4938_CCFG_DIVMODE_12 (0x1 << 17)
+#define TX4938_CCFG_DIVMODE_16 (0x2 << 17)
+#define TX4938_CCFG_DIVMODE_18 (0x9 << 17)
+#define TX4938_CCFG_BEOW 0x00010000
+#define TX4938_CCFG_WR 0x00008000
+#define TX4938_CCFG_TOE 0x00004000
+#define TX4938_CCFG_PCIARB 0x00002000
+#define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
+#define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
+#define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
+#define TX4938_CCFG_PCIDIVMODE_5 (0x5 << 10)
+#define TX4938_CCFG_PCIDIVMODE_5_5 (0x7 << 10)
+#define TX4938_CCFG_PCIDIVMODE_8 (0x0 << 10)
+#define TX4938_CCFG_PCIDIVMODE_9 (0x2 << 10)
+#define TX4938_CCFG_PCIDIVMODE_10 (0x4 << 10)
+#define TX4938_CCFG_PCIDIVMODE_11 (0x6 << 10)
+#define TX4938_CCFG_PCI1DMD 0x00000100
+#define TX4938_CCFG_SYSSP_MASK 0x000000c0
+#define TX4938_CCFG_ENDIAN 0x00000004
+#define TX4938_CCFG_HALT 0x00000002
+#define TX4938_CCFG_ACEHOLD 0x00000001
+
+/* PCFG : Pin Configuration */
+#define TX4938_PCFG_ETH0_SEL _CONST64(0x8000000000000000)
+#define TX4938_PCFG_ETH1_SEL _CONST64(0x4000000000000000)
+#define TX4938_PCFG_ATA_SEL _CONST64(0x2000000000000000)
+#define TX4938_PCFG_ISA_SEL _CONST64(0x1000000000000000)
+#define TX4938_PCFG_SPI_SEL _CONST64(0x0800000000000000)
+#define TX4938_PCFG_NDF_SEL _CONST64(0x0400000000000000)
+#define TX4938_PCFG_SDCLKDLY_MASK 0x30000000
+#define TX4938_PCFG_SDCLKDLY(d) ((d)<<28)
+#define TX4938_PCFG_SYSCLKEN 0x08000000
+#define TX4938_PCFG_SDCLKEN_ALL 0x07800000
+#define TX4938_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
+#define TX4938_PCFG_PCICLKEN_ALL 0x003f0000
+#define TX4938_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
+#define TX4938_PCFG_SEL2 0x00000200
+#define TX4938_PCFG_SEL1 0x00000100
+#define TX4938_PCFG_DMASEL_ALL 0x0000000f
+#define TX4938_PCFG_DMASEL0_DRQ0 0x00000000
+#define TX4938_PCFG_DMASEL0_SIO1 0x00000001
+#define TX4938_PCFG_DMASEL1_DRQ1 0x00000000
+#define TX4938_PCFG_DMASEL1_SIO1 0x00000002
+#define TX4938_PCFG_DMASEL2_DRQ2 0x00000000
+#define TX4938_PCFG_DMASEL2_SIO0 0x00000004
+#define TX4938_PCFG_DMASEL3_DRQ3 0x00000000
+#define TX4938_PCFG_DMASEL3_SIO0 0x00000008
+
+/* CLKCTR : Clock Control */
+#define TX4938_CLKCTR_NDFCKD _CONST64(0x0001000000000000)
+#define TX4938_CLKCTR_NDFRST _CONST64(0x0000000100000000)
+#define TX4938_CLKCTR_ETH1CKD 0x80000000
+#define TX4938_CLKCTR_ETH0CKD 0x40000000
+#define TX4938_CLKCTR_SPICKD 0x20000000
+#define TX4938_CLKCTR_SRAMCKD 0x10000000
+#define TX4938_CLKCTR_PCIC1CKD 0x08000000
+#define TX4938_CLKCTR_DMA1CKD 0x04000000
+#define TX4938_CLKCTR_ACLCKD 0x02000000
+#define TX4938_CLKCTR_PIOCKD 0x01000000
+#define TX4938_CLKCTR_DMACKD 0x00800000
+#define TX4938_CLKCTR_PCICKD 0x00400000
+#define TX4938_CLKCTR_TM0CKD 0x00100000
+#define TX4938_CLKCTR_TM1CKD 0x00080000
+#define TX4938_CLKCTR_TM2CKD 0x00040000
+#define TX4938_CLKCTR_SIO0CKD 0x00020000
+#define TX4938_CLKCTR_SIO1CKD 0x00010000
+#define TX4938_CLKCTR_ETH1RST 0x00008000
+#define TX4938_CLKCTR_ETH0RST 0x00004000
+#define TX4938_CLKCTR_SPIRST 0x00002000
+#define TX4938_CLKCTR_SRAMRST 0x00001000
+#define TX4938_CLKCTR_PCIC1RST 0x00000800
+#define TX4938_CLKCTR_DMA1RST 0x00000400
+#define TX4938_CLKCTR_ACLRST 0x00000200
+#define TX4938_CLKCTR_PIORST 0x00000100
+#define TX4938_CLKCTR_DMARST 0x00000080
+#define TX4938_CLKCTR_PCIRST 0x00000040
+#define TX4938_CLKCTR_TM0RST 0x00000010
+#define TX4938_CLKCTR_TM1RST 0x00000008
+#define TX4938_CLKCTR_TM2RST 0x00000004
+#define TX4938_CLKCTR_SIO0RST 0x00000002
+#define TX4938_CLKCTR_SIO1RST 0x00000001
+
+/*
+ * DMA
+ */
+/* bits for MCR */
+#define TX4938_DMA_MCR_EIS(ch) (0x10000000<<(ch))
+#define TX4938_DMA_MCR_DIS(ch) (0x01000000<<(ch))
+#define TX4938_DMA_MCR_RSFIF 0x00000080
+#define TX4938_DMA_MCR_FIFUM(ch) (0x00000008<<(ch))
+#define TX4938_DMA_MCR_RPRT 0x00000002
+#define TX4938_DMA_MCR_MSTEN 0x00000001
+
+/* bits for CCRn */
+#define TX4938_DMA_CCR_IMMCHN 0x20000000
+#define TX4938_DMA_CCR_USEXFSZ 0x10000000
+#define TX4938_DMA_CCR_LE 0x08000000
+#define TX4938_DMA_CCR_DBINH 0x04000000
+#define TX4938_DMA_CCR_SBINH 0x02000000
+#define TX4938_DMA_CCR_CHRST 0x01000000
+#define TX4938_DMA_CCR_RVBYTE 0x00800000
+#define TX4938_DMA_CCR_ACKPOL 0x00400000
+#define TX4938_DMA_CCR_REQPL 0x00200000
+#define TX4938_DMA_CCR_EGREQ 0x00100000
+#define TX4938_DMA_CCR_CHDN 0x00080000
+#define TX4938_DMA_CCR_DNCTL 0x00060000
+#define TX4938_DMA_CCR_EXTRQ 0x00010000
+#define TX4938_DMA_CCR_INTRQD 0x0000e000
+#define TX4938_DMA_CCR_INTENE 0x00001000
+#define TX4938_DMA_CCR_INTENC 0x00000800
+#define TX4938_DMA_CCR_INTENT 0x00000400
+#define TX4938_DMA_CCR_CHNEN 0x00000200
+#define TX4938_DMA_CCR_XFACT 0x00000100
+#define TX4938_DMA_CCR_SMPCHN 0x00000020
+#define TX4938_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c)
+#define TX4938_DMA_CCR_XFSZ_1W TX4938_DMA_CCR_XFSZ(2)
+#define TX4938_DMA_CCR_XFSZ_2W TX4938_DMA_CCR_XFSZ(3)
+#define TX4938_DMA_CCR_XFSZ_4W TX4938_DMA_CCR_XFSZ(4)
+#define TX4938_DMA_CCR_XFSZ_8W TX4938_DMA_CCR_XFSZ(5)
+#define TX4938_DMA_CCR_XFSZ_16W TX4938_DMA_CCR_XFSZ(6)
+#define TX4938_DMA_CCR_XFSZ_32W TX4938_DMA_CCR_XFSZ(7)
+#define TX4938_DMA_CCR_MEMIO 0x00000002
+#define TX4938_DMA_CCR_SNGAD 0x00000001
+
+/* bits for CSRn */
+#define TX4938_DMA_CSR_CHNEN 0x00000400
+#define TX4938_DMA_CSR_STLXFER 0x00000200
+#define TX4938_DMA_CSR_CHNACT 0x00000100
+#define TX4938_DMA_CSR_ABCHC 0x00000080
+#define TX4938_DMA_CSR_NCHNC 0x00000040
+#define TX4938_DMA_CSR_NTRNFC 0x00000020
+#define TX4938_DMA_CSR_EXTDN 0x00000010
+#define TX4938_DMA_CSR_CFERR 0x00000008
+#define TX4938_DMA_CSR_CHERR 0x00000004
+#define TX4938_DMA_CSR_DESERR 0x00000002
+#define TX4938_DMA_CSR_SORERR 0x00000001
+
+#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
+#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
+#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
+#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
+#define tx4938_pcicptr tx4927_pcicptr
+#define tx4938_pcic1ptr \
+ ((struct tx4927_pcic_reg __iomem *)TX4938_PCIC1_REG)
+#define tx4938_ccfgptr \
+ ((struct tx4938_ccfg_reg __iomem *)TX4938_CCFG_REG)
+#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
+#define tx4938_pioptr ((struct txx9_pio_reg __iomem *)TX4938_PIO_REG)
+#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
+#define tx4938_spiptr ((struct tx4938_spi_reg *)TX4938_SPI_REG)
+#define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
+
+
+#define TX4938_REV_PCODE() \
+ ((__u32)__raw_readq(&tx4938_ccfgptr->crir) >> 16)
+
+#define tx4938_ccfg_clear(bits) tx4927_ccfg_clear(bits)
+#define tx4938_ccfg_set(bits) tx4927_ccfg_set(bits)
+#define tx4938_ccfg_change(change, new) tx4927_ccfg_change(change, new)
+
+#define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
+#define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
+
+#define TX4938_EBUSC_CR(ch) __raw_readq(&tx4938_ebuscptr->cr[(ch)])
+#define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
+#define TX4938_EBUSC_SIZE(ch) \
+ (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
+
+int tx4938_report_pciclk(void);
+void tx4938_report_pci1clk(void);
+int tx4938_pciclk66_setup(void);
+struct pci_dev;
+int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot);
+void tx4938_irq_init(void);
+
+#endif
diff --git a/include/asm-mips/txx9/txx927.h b/include/asm-mips/txx9/txx927.h
new file mode 100644
index 0000000..97dd7ad
--- /dev/null
+++ b/include/asm-mips/txx9/txx927.h
@@ -0,0 +1,121 @@
+/*
+ * Common definitions for TX3927/TX4927
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2000 Toshiba Corporation
+ */
+#ifndef __ASM_TXX9_TXX927_H
+#define __ASM_TXX9_TXX927_H
+
+struct txx927_sio_reg {
+ volatile unsigned long lcr;
+ volatile unsigned long dicr;
+ volatile unsigned long disr;
+ volatile unsigned long cisr;
+ volatile unsigned long fcr;
+ volatile unsigned long flcr;
+ volatile unsigned long bgr;
+ volatile unsigned long tfifo;
+ volatile unsigned long rfifo;
+};
+
+/*
+ * SIO
+ */
+/* SILCR : Line Control */
+#define TXx927_SILCR_SCS_MASK 0x00000060
+#define TXx927_SILCR_SCS_IMCLK 0x00000000
+#define TXx927_SILCR_SCS_IMCLK_BG 0x00000020
+#define TXx927_SILCR_SCS_SCLK 0x00000040
+#define TXx927_SILCR_SCS_SCLK_BG 0x00000060
+#define TXx927_SILCR_UEPS 0x00000010
+#define TXx927_SILCR_UPEN 0x00000008
+#define TXx927_SILCR_USBL_MASK 0x00000004
+#define TXx927_SILCR_USBL_1BIT 0x00000004
+#define TXx927_SILCR_USBL_2BIT 0x00000000
+#define TXx927_SILCR_UMODE_MASK 0x00000003
+#define TXx927_SILCR_UMODE_8BIT 0x00000000
+#define TXx927_SILCR_UMODE_7BIT 0x00000001
+
+/* SIDICR : DMA/Int. Control */
+#define TXx927_SIDICR_TDE 0x00008000
+#define TXx927_SIDICR_RDE 0x00004000
+#define TXx927_SIDICR_TIE 0x00002000
+#define TXx927_SIDICR_RIE 0x00001000
+#define TXx927_SIDICR_SPIE 0x00000800
+#define TXx927_SIDICR_CTSAC 0x00000600
+#define TXx927_SIDICR_STIE_MASK 0x0000003f
+#define TXx927_SIDICR_STIE_OERS 0x00000020
+#define TXx927_SIDICR_STIE_CTSS 0x00000010
+#define TXx927_SIDICR_STIE_RBRKD 0x00000008
+#define TXx927_SIDICR_STIE_TRDY 0x00000004
+#define TXx927_SIDICR_STIE_TXALS 0x00000002
+#define TXx927_SIDICR_STIE_UBRKD 0x00000001
+
+/* SIDISR : DMA/Int. Status */
+#define TXx927_SIDISR_UBRK 0x00008000
+#define TXx927_SIDISR_UVALID 0x00004000
+#define TXx927_SIDISR_UFER 0x00002000
+#define TXx927_SIDISR_UPER 0x00001000
+#define TXx927_SIDISR_UOER 0x00000800
+#define TXx927_SIDISR_ERI 0x00000400
+#define TXx927_SIDISR_TOUT 0x00000200
+#define TXx927_SIDISR_TDIS 0x00000100
+#define TXx927_SIDISR_RDIS 0x00000080
+#define TXx927_SIDISR_STIS 0x00000040
+#define TXx927_SIDISR_RFDN_MASK 0x0000001f
+
+/* SICISR : Change Int. Status */
+#define TXx927_SICISR_OERS 0x00000020
+#define TXx927_SICISR_CTSS 0x00000010
+#define TXx927_SICISR_RBRKD 0x00000008
+#define TXx927_SICISR_TRDY 0x00000004
+#define TXx927_SICISR_TXALS 0x00000002
+#define TXx927_SICISR_UBRKD 0x00000001
+
+/* SIFCR : FIFO Control */
+#define TXx927_SIFCR_SWRST 0x00008000
+#define TXx927_SIFCR_RDIL_MASK 0x00000180
+#define TXx927_SIFCR_RDIL_1 0x00000000
+#define TXx927_SIFCR_RDIL_4 0x00000080
+#define TXx927_SIFCR_RDIL_8 0x00000100
+#define TXx927_SIFCR_RDIL_12 0x00000180
+#define TXx927_SIFCR_RDIL_MAX 0x00000180
+#define TXx927_SIFCR_TDIL_MASK 0x00000018
+#define TXx927_SIFCR_TDIL_MASK 0x00000018
+#define TXx927_SIFCR_TDIL_1 0x00000000
+#define TXx927_SIFCR_TDIL_4 0x00000001
+#define TXx927_SIFCR_TDIL_8 0x00000010
+#define TXx927_SIFCR_TDIL_MAX 0x00000010
+#define TXx927_SIFCR_TFRST 0x00000004
+#define TXx927_SIFCR_RFRST 0x00000002
+#define TXx927_SIFCR_FRSTE 0x00000001
+#define TXx927_SIO_TX_FIFO 8
+#define TXx927_SIO_RX_FIFO 16
+
+/* SIFLCR : Flow Control */
+#define TXx927_SIFLCR_RCS 0x00001000
+#define TXx927_SIFLCR_TES 0x00000800
+#define TXx927_SIFLCR_RTSSC 0x00000200
+#define TXx927_SIFLCR_RSDE 0x00000100
+#define TXx927_SIFLCR_TSDE 0x00000080
+#define TXx927_SIFLCR_RTSTL_MASK 0x0000001e
+#define TXx927_SIFLCR_RTSTL_MAX 0x0000001e
+#define TXx927_SIFLCR_TBRK 0x00000001
+
+/* SIBGR : Baudrate Control */
+#define TXx927_SIBGR_BCLK_MASK 0x00000300
+#define TXx927_SIBGR_BCLK_T0 0x00000000
+#define TXx927_SIBGR_BCLK_T2 0x00000100
+#define TXx927_SIBGR_BCLK_T4 0x00000200
+#define TXx927_SIBGR_BCLK_T6 0x00000300
+#define TXx927_SIBGR_BRD_MASK 0x000000ff
+
+/*
+ * PIO
+ */
+
+#endif /* __ASM_TXX9_TXX927_H */
diff --git a/include/asm-mips/vr41xx/cmbvr4133.h b/include/asm-mips/vr41xx/cmbvr4133.h
deleted file mode 100644
index 42300037..0000000
--- a/include/asm-mips/vr41xx/cmbvr4133.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * include/asm-mips/vr41xx/cmbvr4133.h
- *
- * Include file for NEC CMB-VR4133.
- *
- * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> and
- * Jun Sun <jsun@mvista.com, or source@mvista.com> and
- * Alex Sapkov <asapkov@ru.mvista.com>
- *
- * 2002-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __NEC_CMBVR4133_H
-#define __NEC_CMBVR4133_H
-
-#include <asm/vr41xx/irq.h>
-
-/*
- * General-Purpose I/O Pin Number
- */
-#define CMBVR41XX_INTA_PIN 1
-#define CMBVR41XX_INTB_PIN 1
-#define CMBVR41XX_INTC_PIN 3
-#define CMBVR41XX_INTD_PIN 1
-#define CMBVR41XX_INTE_PIN 1
-
-/*
- * Interrupt Number
- */
-#define CMBVR41XX_INTA_IRQ GIU_IRQ(CMBVR41XX_INTA_PIN)
-#define CMBVR41XX_INTB_IRQ GIU_IRQ(CMBVR41XX_INTB_PIN)
-#define CMBVR41XX_INTC_IRQ GIU_IRQ(CMBVR41XX_INTC_PIN)
-#define CMBVR41XX_INTD_IRQ GIU_IRQ(CMBVR41XX_INTD_PIN)
-#define CMBVR41XX_INTE_IRQ GIU_IRQ(CMBVR41XX_INTE_PIN)
-
-#define I8259A_IRQ_BASE 72
-#define I8259_IRQ(x) (I8259A_IRQ_BASE + (x))
-#define TIMER_IRQ I8259_IRQ(0)
-#define KEYBOARD_IRQ I8259_IRQ(1)
-#define I8259_SLAVE_IRQ I8259_IRQ(2)
-#define UART3_IRQ I8259_IRQ(3)
-#define UART1_IRQ I8259_IRQ(4)
-#define UART2_IRQ I8259_IRQ(5)
-#define FDC_IRQ I8259_IRQ(6)
-#define PARPORT_IRQ I8259_IRQ(7)
-#define RTC_IRQ I8259_IRQ(8)
-#define USB_IRQ I8259_IRQ(9)
-#define I8259_INTA_IRQ I8259_IRQ(10)
-#define AUDIO_IRQ I8259_IRQ(11)
-#define AUX_IRQ I8259_IRQ(12)
-#define IDE_PRIMARY_IRQ I8259_IRQ(14)
-#define IDE_SECONDARY_IRQ I8259_IRQ(15)
-
-#endif /* __NEC_CMBVR4133_H */
diff --git a/include/asm-powerpc/Kbuild b/include/asm-powerpc/Kbuild
index bca352e..04ce8f8 100644
--- a/include/asm-powerpc/Kbuild
+++ b/include/asm-powerpc/Kbuild
@@ -2,7 +2,6 @@
header-y += auxvec.h
header-y += ioctls.h
-header-y += mman.h
header-y += sembuf.h
header-y += siginfo.h
header-y += stat.h
@@ -23,7 +22,6 @@
header-y += statfs.h
header-y += ps3fb.h
-unifdef-y += asm-compat.h
unifdef-y += bootx.h
unifdef-y += byteorder.h
unifdef-y += cputable.h
diff --git a/include/asm-powerpc/asm-compat.h b/include/asm-powerpc/asm-compat.h
index c19e736..8ec2e1d 100644
--- a/include/asm-powerpc/asm-compat.h
+++ b/include/asm-powerpc/asm-compat.h
@@ -15,57 +15,6 @@
#endif
-/*
- * Feature section common macros
- *
- * Note that the entries now contain offsets between the table entry
- * and the code rather than absolute code pointers in order to be
- * useable with the vdso shared library. There is also an assumption
- * that values will be negative, that is, the fixup table has to be
- * located after the code it fixes up.
- */
-#ifdef CONFIG_PPC64
-#ifdef __powerpc64__
-/* 64 bits kernel, 64 bits code */
-#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
-99: \
- .section sect,"a"; \
- .align 3; \
-98: \
- .llong msk; \
- .llong val; \
- .llong label##b-98b; \
- .llong 99b-98b; \
- .previous
-#else /* __powerpc64__ */
-/* 64 bits kernel, 32 bits code (ie. vdso32) */
-#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
-99: \
- .section sect,"a"; \
- .align 3; \
-98: \
- .llong msk; \
- .llong val; \
- .long 0xffffffff; \
- .long label##b-98b; \
- .long 0xffffffff; \
- .long 99b-98b; \
- .previous
-#endif /* !__powerpc64__ */
-#else /* CONFIG_PPC64 */
-/* 32 bits kernel, 32 bits code */
-#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
-99: \
- .section sect,"a"; \
- .align 2; \
-98: \
- .long msk; \
- .long val; \
- .long label##b-98b; \
- .long 99b-98b; \
- .previous
-#endif /* !CONFIG_PPC64 */
-
#ifdef __powerpc64__
/* operations for longs and pointers */
diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h
index 5350704..81de6eb 100644
--- a/include/asm-powerpc/cache.h
+++ b/include/asm-powerpc/cache.h
@@ -8,6 +8,9 @@
#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
#define L1_CACHE_SHIFT 4
#define MAX_COPY_PREFETCH 1
+#elif defined(CONFIG_PPC_E500MC)
+#define L1_CACHE_SHIFT 6
+#define MAX_COPY_PREFETCH 4
#elif defined(CONFIG_PPC32)
#define L1_CACHE_SHIFT 5
#define MAX_COPY_PREFETCH 4
diff --git a/include/asm-powerpc/code-patching.h b/include/asm-powerpc/code-patching.h
new file mode 100644
index 0000000..107d9b9
--- /dev/null
+++ b/include/asm-powerpc/code-patching.h
@@ -0,0 +1,54 @@
+#ifndef _ASM_POWERPC_CODE_PATCHING_H
+#define _ASM_POWERPC_CODE_PATCHING_H
+
+/*
+ * Copyright 2008, Michael Ellerman, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/types.h>
+
+#define PPC_NOP_INSTR 0x60000000
+#define PPC_LWSYNC_INSTR 0x7c2004ac
+
+/* Flags for create_branch:
+ * "b" == create_branch(addr, target, 0);
+ * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE);
+ * "bl" == create_branch(addr, target, BRANCH_SET_LINK);
+ * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
+ */
+#define BRANCH_SET_LINK 0x1
+#define BRANCH_ABSOLUTE 0x2
+
+unsigned int create_branch(const unsigned int *addr,
+ unsigned long target, int flags);
+unsigned int create_cond_branch(const unsigned int *addr,
+ unsigned long target, int flags);
+void patch_branch(unsigned int *addr, unsigned long target, int flags);
+void patch_instruction(unsigned int *addr, unsigned int instr);
+
+int instr_is_relative_branch(unsigned int instr);
+int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr);
+unsigned long branch_target(const unsigned int *instr);
+unsigned int translate_branch(const unsigned int *dest,
+ const unsigned int *src);
+
+static inline unsigned long ppc_function_entry(void *func)
+{
+#ifdef CONFIG_PPC64
+ /*
+ * On PPC64 the function pointer actually points to the function's
+ * descriptor. The first entry in the descriptor is the address
+ * of the function text.
+ */
+ return ((func_descr_t *)func)->entry;
+#else
+ return (unsigned long)func;
+#endif
+}
+
+#endif /* _ASM_POWERPC_CODE_PATCHING_H */
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
index ede38ffe..63a5533 100644
--- a/include/asm-powerpc/cpm.h
+++ b/include/asm-powerpc/cpm.h
@@ -96,6 +96,7 @@
int cpm_muram_free(unsigned long offset);
unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
void __iomem *cpm_muram_addr(unsigned long offset);
+unsigned long cpm_muram_offset(void __iomem *addr);
dma_addr_t cpm_muram_dma(void __iomem *addr);
int cpm_command(u32 command, u8 opcode);
diff --git a/include/asm-powerpc/cpm1.h b/include/asm-powerpc/cpm1.h
index 3df4396..2ff79874 100644
--- a/include/asm-powerpc/cpm1.h
+++ b/include/asm-powerpc/cpm1.h
@@ -42,35 +42,15 @@
#define mk_cr_cmd(CH, CMD) ((CMD << 8) | (CH << 4))
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* The dual ported RAM is multi-functional. Some areas can be (and are
- * being) used for microcode. There is an area that can only be used
- * as data ram for buffer descriptors, which is all we use right now.
- * Currently the first 512 and last 256 bytes are used for microcode.
- */
-#define CPM_DATAONLY_BASE ((uint)0x0800)
-#define CPM_DATAONLY_SIZE ((uint)0x0700)
-#define CPM_DP_NOSPACE ((uint)0x7fffffff)
-#endif
-
/* Export the base address of the communication processor registers
* and dual port ram.
*/
extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
#define cpm_dpalloc cpm_muram_alloc
#define cpm_dpfree cpm_muram_free
#define cpm_dpram_addr cpm_muram_addr
#define cpm_dpram_phys cpm_muram_dma
-#else
-extern unsigned long cpm_dpalloc(uint size, uint align);
-extern int cpm_dpfree(unsigned long offset);
-extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
-extern void cpm_dpdump(void);
-extern void *cpm_dpram_addr(unsigned long offset);
-extern uint cpm_dpram_phys(u8 *addr);
-#endif
extern void cpm_setbrg(uint brg, uint rate);
diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h
index 4c85ed9..2c7fd9c 100644
--- a/include/asm-powerpc/cpm2.h
+++ b/include/asm-powerpc/cpm2.h
@@ -78,24 +78,6 @@
#define mk_cr_cmd(PG, SBC, MCN, OP) \
((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
-#ifndef CONFIG_PPC_CPM_NEW_BINDING
-/* Dual Port RAM addresses. The first 16K is available for almost
- * any CPM use, so we put the BDs there. The first 128 bytes are
- * used for SMC1 and SMC2 parameter RAM, so we start allocating
- * BDs above that. All of this must change when we start
- * downloading RAM microcode.
- */
-#define CPM_DATAONLY_BASE ((uint)128)
-#define CPM_DP_NOSPACE ((uint)0x7fffffff)
-#if defined(CONFIG_8272) || defined(CONFIG_MPC8555)
-#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_FCC_SPECIAL_BASE ((uint)0x00009000)
-#else
-#define CPM_DATAONLY_SIZE ((uint)(16 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_FCC_SPECIAL_BASE ((uint)0x0000b000)
-#endif
-#endif
-
/* The number of pages of host memory we allocate for CPM. This is
* done early in kernel initialization to get physically contiguous
* pages.
@@ -107,17 +89,9 @@
*/
extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
#define cpm_dpalloc cpm_muram_alloc
#define cpm_dpfree cpm_muram_free
#define cpm_dpram_addr cpm_muram_addr
-#else
-extern unsigned long cpm_dpalloc(uint size, uint align);
-extern int cpm_dpfree(unsigned long offset);
-extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
-extern void cpm_dpdump(void);
-extern void *cpm_dpram_addr(unsigned long offset);
-#endif
extern void cpm_setbrg(uint brg, uint rate);
extern void cpm2_fastbrg(uint brg, uint rate, int div16);
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 1e79673..2a3e907 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -1,8 +1,6 @@
#ifndef __ASM_POWERPC_CPUTABLE_H
#define __ASM_POWERPC_CPUTABLE_H
-#include <asm/asm-compat.h>
-
#define PPC_FEATURE_32 0x80000000
#define PPC_FEATURE_64 0x40000000
#define PPC_FEATURE_601_INSTR 0x20000000
@@ -26,11 +24,20 @@
#define PPC_FEATURE_PA6T 0x00000800
#define PPC_FEATURE_HAS_DFP 0x00000400
#define PPC_FEATURE_POWER6_EXT 0x00000200
+#define PPC_FEATURE_ARCH_2_06 0x00000100
+#define PPC_FEATURE_HAS_VSX 0x00000080
+
+#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
+ 0x00000040
#define PPC_FEATURE_TRUE_LE 0x00000002
#define PPC_FEATURE_PPC_LE 0x00000001
#ifdef __KERNEL__
+
+#include <asm/asm-compat.h>
+#include <asm/feature-fixups.h>
+
#ifndef __ASSEMBLY__
/* This structure can grow, it's real size is used by head.S code
@@ -132,7 +139,7 @@
#define CPU_FTR_TAU ASM_CONST(0x0000000000000010)
#define CPU_FTR_CAN_DOZE ASM_CONST(0x0000000000000020)
#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040)
-#define CPU_FTR_604_PERF_MON ASM_CONST(0x0000000000000080)
+#define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080)
#define CPU_FTR_601 ASM_CONST(0x0000000000000100)
#define CPU_FTR_HPTE_TABLE ASM_CONST(0x0000000000000200)
#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400)
@@ -152,6 +159,7 @@
#define CPU_FTR_UNIFIED_ID_CACHE ASM_CONST(0x0000000001000000)
#define CPU_FTR_SPE ASM_CONST(0x0000000002000000)
#define CPU_FTR_NEED_PAIRED_STWCX ASM_CONST(0x0000000004000000)
+#define CPU_FTR_LWSYNC ASM_CONST(0x0000000008000000)
/*
* Add the 64-bit processor unique features in the top half of the word;
@@ -180,6 +188,8 @@
#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002000000000000)
#define CPU_FTR_1T_SEGMENT LONG_ASM_CONST(0x0004000000000000)
#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000)
+#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000)
+#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)
#ifndef __ASSEMBLY__
@@ -198,6 +208,17 @@
#define PPC_FEATURE_HAS_ALTIVEC_COMP 0
#endif
+/* We only set the VSX features if the kernel was compiled with VSX
+ * support
+ */
+#ifdef CONFIG_VSX
+#define CPU_FTR_VSX_COMP CPU_FTR_VSX
+#define PPC_FEATURE_HAS_VSX_COMP PPC_FEATURE_HAS_VSX
+#else
+#define CPU_FTR_VSX_COMP 0
+#define PPC_FEATURE_HAS_VSX_COMP 0
+#endif
+
/* We only set the spe features if the kernel was compiled with spe
* support
*/
@@ -245,8 +266,7 @@
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
#define CPU_FTRS_604 (CPU_FTR_COMMON | \
- CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE | \
- CPU_FTR_PPC_LE)
+ CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_PPC_LE)
#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | \
CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \
CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE)
@@ -347,40 +367,50 @@
#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \
CPU_FTR_UNIFIED_ID_CACHE)
-#define CPU_FTRS_E500 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
+#define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
+ CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
+ CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | \
CPU_FTR_NODSISRALIGN)
-#define CPU_FTRS_E500_2 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \
- CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN)
+#define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
+ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN | \
+ CPU_FTR_L2CSR | CPU_FTR_LWSYNC)
#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
/* 64-bit CPUs */
-#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE)
-#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | \
+#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | \
CPU_FTR_MMCRA | CPU_FTR_CTRL)
-#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA)
-#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | \
+#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA)
-#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR)
-#define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
CPU_FTR_DSCR)
-#define CPU_FTRS_CELL (CPU_FTR_USE_TB | \
+#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
+ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+ CPU_FTR_MMCRA | CPU_FTR_SMT | \
+ CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
+ CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
+ CPU_FTR_DSCR | CPU_FTR_SAO)
+#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG)
-#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | \
+#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B)
@@ -391,7 +421,8 @@
#define CPU_FTRS_POSSIBLE \
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
- CPU_FTRS_CELL | CPU_FTRS_PA6T | CPU_FTR_1T_SEGMENT)
+ CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \
+ CPU_FTR_1T_SEGMENT | CPU_FTR_VSX)
#else
enum {
CPU_FTRS_POSSIBLE =
@@ -421,7 +452,7 @@
CPU_FTRS_E200 |
#endif
#ifdef CONFIG_E500
- CPU_FTRS_E500 | CPU_FTRS_E500_2 |
+ CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |
#endif
0,
};
@@ -431,7 +462,7 @@
#define CPU_FTRS_ALWAYS \
(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
- CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
+ CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
#else
enum {
CPU_FTRS_ALWAYS =
@@ -461,7 +492,7 @@
CPU_FTRS_E200 &
#endif
#ifdef CONFIG_E500
- CPU_FTRS_E500 & CPU_FTRS_E500_2 &
+ CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC &
#endif
CPU_FTRS_POSSIBLE,
};
@@ -477,18 +508,5 @@
#endif /* !__ASSEMBLY__ */
-#ifdef __ASSEMBLY__
-
-#define BEGIN_FTR_SECTION_NESTED(label) label:
-#define BEGIN_FTR_SECTION BEGIN_FTR_SECTION_NESTED(97)
-#define END_FTR_SECTION_NESTED(msk, val, label) \
- MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
-#define END_FTR_SECTION(msk, val) \
- END_FTR_SECTION_NESTED(msk, val, 97)
-
-#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
-#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)
-#endif /* __ASSEMBLY__ */
-
#endif /* __KERNEL__ */
#endif /* __ASM_POWERPC_CPUTABLE_H */
diff --git a/include/asm-powerpc/dcr-generic.h b/include/asm-powerpc/dcr-generic.h
new file mode 100644
index 0000000..35b7159
--- /dev/null
+++ b/include/asm-powerpc/dcr-generic.h
@@ -0,0 +1,49 @@
+/*
+ * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
+ * <benh@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
+ * the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef _ASM_POWERPC_DCR_GENERIC_H
+#define _ASM_POWERPC_DCR_GENERIC_H
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+
+enum host_type_t {DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID};
+
+typedef struct {
+ enum host_type_t type;
+ union {
+ dcr_host_mmio_t mmio;
+ dcr_host_native_t native;
+ } host;
+} dcr_host_t;
+
+extern bool dcr_map_ok_generic(dcr_host_t host);
+
+extern dcr_host_t dcr_map_generic(struct device_node *dev, unsigned int dcr_n,
+ unsigned int dcr_c);
+extern void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c);
+
+extern u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n);
+
+extern void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_DCR_GENERIC_H */
+
+
diff --git a/include/asm-powerpc/dcr-mmio.h b/include/asm-powerpc/dcr-mmio.h
index 08532ff..acd491d 100644
--- a/include/asm-powerpc/dcr-mmio.h
+++ b/include/asm-powerpc/dcr-mmio.h
@@ -27,20 +27,26 @@
void __iomem *token;
unsigned int stride;
unsigned int base;
-} dcr_host_t;
+} dcr_host_mmio_t;
-#define DCR_MAP_OK(host) ((host).token != NULL)
+static inline bool dcr_map_ok_mmio(dcr_host_mmio_t host)
+{
+ return host.token != NULL;
+}
-extern dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
- unsigned int dcr_c);
-extern void dcr_unmap(dcr_host_t host, unsigned int dcr_c);
+extern dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
+ unsigned int dcr_n,
+ unsigned int dcr_c);
+extern void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c);
-static inline u32 dcr_read(dcr_host_t host, unsigned int dcr_n)
+static inline u32 dcr_read_mmio(dcr_host_mmio_t host, unsigned int dcr_n)
{
return in_be32(host.token + ((host.base + dcr_n) * host.stride));
}
-static inline void dcr_write(dcr_host_t host, unsigned int dcr_n, u32 value)
+static inline void dcr_write_mmio(dcr_host_mmio_t host,
+ unsigned int dcr_n,
+ u32 value)
{
out_be32(host.token + ((host.base + dcr_n) * host.stride), value);
}
diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h
index f8398ce..72d2b72 100644
--- a/include/asm-powerpc/dcr-native.h
+++ b/include/asm-powerpc/dcr-native.h
@@ -26,14 +26,18 @@
typedef struct {
unsigned int base;
-} dcr_host_t;
+} dcr_host_native_t;
-#define DCR_MAP_OK(host) (1)
+static inline bool dcr_map_ok_native(dcr_host_native_t host)
+{
+ return 1;
+}
-#define dcr_map(dev, dcr_n, dcr_c) ((dcr_host_t){ .base = (dcr_n) })
-#define dcr_unmap(host, dcr_c) do {} while (0)
-#define dcr_read(host, dcr_n) mfdcr(dcr_n + host.base)
-#define dcr_write(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
+#define dcr_map_native(dev, dcr_n, dcr_c) \
+ ((dcr_host_native_t){ .base = (dcr_n) })
+#define dcr_unmap_native(host, dcr_c) do {} while (0)
+#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
+#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
/* Device Control Registers */
void __mtdcr(int reg, unsigned int val);
diff --git a/include/asm-powerpc/dcr.h b/include/asm-powerpc/dcr.h
index 9338d50..53b2830 100644
--- a/include/asm-powerpc/dcr.h
+++ b/include/asm-powerpc/dcr.h
@@ -20,14 +20,50 @@
#ifndef _ASM_POWERPC_DCR_H
#define _ASM_POWERPC_DCR_H
#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
#ifdef CONFIG_PPC_DCR
#ifdef CONFIG_PPC_DCR_NATIVE
#include <asm/dcr-native.h>
-#else
+#endif
+
+#ifdef CONFIG_PPC_DCR_MMIO
#include <asm/dcr-mmio.h>
#endif
+
+/* Indirection layer for providing both NATIVE and MMIO support. */
+
+#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
+
+#include <asm/dcr-generic.h>
+
+#define DCR_MAP_OK(host) dcr_map_ok_generic(host)
+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c)
+#define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c)
+#define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n)
+#define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value)
+
+#else
+
+#ifdef CONFIG_PPC_DCR_NATIVE
+typedef dcr_host_native_t dcr_host_t;
+#define DCR_MAP_OK(host) dcr_map_ok_native(host)
+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c)
+#define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c)
+#define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n)
+#define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value)
+#else
+typedef dcr_host_mmio_t dcr_host_t;
+#define DCR_MAP_OK(host) dcr_map_ok_mmio(host)
+#define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c)
+#define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c)
+#define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n)
+#define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value)
+#endif
+
+#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
+
/*
* On CONFIG_PPC_MERGE, we have additional helpers to read the DCR
* base from the device-tree
@@ -41,5 +77,6 @@
#endif /* CONFIG_PPC_MERGE */
#endif /* CONFIG_PPC_DCR */
+#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_DCR_H */
diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h
index bbefb69..74c5497 100644
--- a/include/asm-powerpc/dma-mapping.h
+++ b/include/asm-powerpc/dma-mapping.h
@@ -13,6 +13,7 @@
/* need struct page definitions */
#include <linux/mm.h>
#include <linux/scatterlist.h>
+#include <linux/dma-attrs.h>
#include <asm/io.h>
#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
@@ -44,6 +45,15 @@
#endif /* ! CONFIG_NOT_COHERENT_CACHE */
#ifdef CONFIG_PPC64
+
+static inline unsigned long device_to_mask(struct device *dev)
+{
+ if (dev->dma_mask && *dev->dma_mask)
+ return *dev->dma_mask;
+ /* Assume devices without mask can take 32 bit addresses */
+ return 0xfffffffful;
+}
+
/*
* DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
*/
@@ -53,13 +63,17 @@
void (*free_coherent)(struct device *dev, size_t size,
void *vaddr, dma_addr_t dma_handle);
dma_addr_t (*map_single)(struct device *dev, void *ptr,
- size_t size, enum dma_data_direction direction);
+ size_t size, enum dma_data_direction direction,
+ struct dma_attrs *attrs);
void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
- size_t size, enum dma_data_direction direction);
+ size_t size, enum dma_data_direction direction,
+ struct dma_attrs *attrs);
int (*map_sg)(struct device *dev, struct scatterlist *sg,
- int nents, enum dma_data_direction direction);
+ int nents, enum dma_data_direction direction,
+ struct dma_attrs *attrs);
void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
- int nents, enum dma_data_direction direction);
+ int nents, enum dma_data_direction direction,
+ struct dma_attrs *attrs);
int (*dma_supported)(struct device *dev, u64 mask);
int (*set_dma_mask)(struct device *dev, u64 dma_mask);
};
@@ -109,6 +123,77 @@
return 0;
}
+static inline dma_addr_t dma_map_single_attrs(struct device *dev,
+ void *cpu_addr,
+ size_t size,
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
+{
+ struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+ BUG_ON(!dma_ops);
+ return dma_ops->map_single(dev, cpu_addr, size, direction, attrs);
+}
+
+static inline void dma_unmap_single_attrs(struct device *dev,
+ dma_addr_t dma_addr,
+ size_t size,
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
+{
+ struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+ BUG_ON(!dma_ops);
+ dma_ops->unmap_single(dev, dma_addr, size, direction, attrs);
+}
+
+static inline dma_addr_t dma_map_page_attrs(struct device *dev,
+ struct page *page,
+ unsigned long offset, size_t size,
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
+{
+ struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+ BUG_ON(!dma_ops);
+ return dma_ops->map_single(dev, page_address(page) + offset, size,
+ direction, attrs);
+}
+
+static inline void dma_unmap_page_attrs(struct device *dev,
+ dma_addr_t dma_address,
+ size_t size,
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
+{
+ struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+ BUG_ON(!dma_ops);
+ dma_ops->unmap_single(dev, dma_address, size, direction, attrs);
+}
+
+static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
+ int nents, enum dma_data_direction direction,
+ struct dma_attrs *attrs)
+{
+ struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+ BUG_ON(!dma_ops);
+ return dma_ops->map_sg(dev, sg, nents, direction, attrs);
+}
+
+static inline void dma_unmap_sg_attrs(struct device *dev,
+ struct scatterlist *sg,
+ int nhwentries,
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs)
+{
+ struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
+
+ BUG_ON(!dma_ops);
+ dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs);
+}
+
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag)
{
@@ -131,63 +216,43 @@
size_t size,
enum dma_data_direction direction)
{
- struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
-
- BUG_ON(!dma_ops);
- return dma_ops->map_single(dev, cpu_addr, size, direction);
+ return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL);
}
static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
size_t size,
enum dma_data_direction direction)
{
- struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
-
- BUG_ON(!dma_ops);
- dma_ops->unmap_single(dev, dma_addr, size, direction);
+ dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL);
}
static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
unsigned long offset, size_t size,
enum dma_data_direction direction)
{
- struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
-
- BUG_ON(!dma_ops);
- return dma_ops->map_single(dev, page_address(page) + offset, size,
- direction);
+ return dma_map_page_attrs(dev, page, offset, size, direction, NULL);
}
static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
size_t size,
enum dma_data_direction direction)
{
- struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
-
- BUG_ON(!dma_ops);
- dma_ops->unmap_single(dev, dma_address, size, direction);
+ dma_unmap_page_attrs(dev, dma_address, size, direction, NULL);
}
static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
int nents, enum dma_data_direction direction)
{
- struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
-
- BUG_ON(!dma_ops);
- return dma_ops->map_sg(dev, sg, nents, direction);
+ return dma_map_sg_attrs(dev, sg, nents, direction, NULL);
}
static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
int nhwentries,
enum dma_data_direction direction)
{
- struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
-
- BUG_ON(!dma_ops);
- dma_ops->unmap_sg(dev, sg, nhwentries, direction);
+ dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
}
-
/*
* Available generic sets of operations
*/
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index 9080d85..8966467 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -109,6 +109,7 @@
#ifdef __powerpc64__
# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
+# define ELF_NVSRHALFREG 32 /* Half the vsx registers */
# define ELF_GREG_TYPE elf_greg_t64
#else
# define ELF_NEVRREG 34 /* includes acc (as 2) */
@@ -158,6 +159,7 @@
typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
#ifdef __powerpc64__
typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
+typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG];
#endif
#ifdef __KERNEL__
@@ -202,30 +204,8 @@
}
#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
-static inline int dump_task_regs(struct task_struct *tsk,
- elf_gregset_t *elf_regs)
-{
- struct pt_regs *regs = tsk->thread.regs;
- if (regs)
- ppc_elf_core_copy_regs(*elf_regs, regs);
-
- return 1;
-}
-#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
-
-extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
-#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
-
typedef elf_vrregset_t elf_fpxregset_t;
-#ifdef CONFIG_ALTIVEC
-extern int dump_task_altivec(struct task_struct *, elf_vrregset_t *vrregs);
-#define ELF_CORE_COPY_XFPREGS(tsk, regs) dump_task_altivec(tsk, regs)
-#define ELF_CORE_XFPREG_TYPE NT_PPC_VMX
-#endif
-
-#endif /* __KERNEL__ */
-
/* ELF_HWCAP yields a mask that user programs can use to figure out what
instruction set this cpu supports. This could be done in userspace,
but it's not easy, and we've already done it here. */
@@ -243,8 +223,6 @@
} while (0)
#endif /* __powerpc64__ */
-#ifdef __KERNEL__
-
#ifdef __powerpc64__
# define SET_PERSONALITY(ex, ibcs2) \
do { \
@@ -257,7 +235,8 @@
else \
clear_thread_flag(TIF_ABI_PENDING); \
if (personality(current->personality) != PER_LINUX32) \
- set_personality(PER_LINUX); \
+ set_personality(PER_LINUX | \
+ (current->personality & (~PER_MASK))); \
} while (0)
/*
* An executable for which elf_read_implies_exec() returns TRUE will
@@ -272,8 +251,6 @@
# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
#endif /* __powerpc64__ */
-#endif /* __KERNEL__ */
-
extern int dcache_bsize;
extern int icache_bsize;
extern int ucache_bsize;
@@ -285,6 +262,8 @@
int executable_stack);
#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
+#endif /* __KERNEL__ */
+
/*
* The requirements here are:
* - keep the final alignment of sp (sp & 0xf)
@@ -422,6 +401,8 @@
/* Keep this the last entry. */
#define R_PPC64_NUM 107
+#ifdef __KERNEL__
+
#ifdef CONFIG_SPU_BASE
/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
#define NT_SPU 1
@@ -430,4 +411,6 @@
#endif /* CONFIG_SPU_BASE */
+#endif /* __KERNEL */
+
#endif /* _ASM_POWERPC_ELF_H */
diff --git a/include/asm-powerpc/feature-fixups.h b/include/asm-powerpc/feature-fixups.h
new file mode 100644
index 0000000..a102996
--- /dev/null
+++ b/include/asm-powerpc/feature-fixups.h
@@ -0,0 +1,126 @@
+#ifndef __ASM_POWERPC_FEATURE_FIXUPS_H
+#define __ASM_POWERPC_FEATURE_FIXUPS_H
+
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifdef __ASSEMBLY__
+
+/*
+ * Feature section common macros
+ *
+ * Note that the entries now contain offsets between the table entry
+ * and the code rather than absolute code pointers in order to be
+ * useable with the vdso shared library. There is also an assumption
+ * that values will be negative, that is, the fixup table has to be
+ * located after the code it fixes up.
+ */
+#if defined(CONFIG_PPC64) && !defined(__powerpc64__)
+/* 64 bits kernel, 32 bits code (ie. vdso32) */
+#define FTR_ENTRY_LONG .llong
+#define FTR_ENTRY_OFFSET .long 0xffffffff; .long
+#else
+/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */
+#define FTR_ENTRY_LONG PPC_LONG
+#define FTR_ENTRY_OFFSET PPC_LONG
+#endif
+
+#define START_FTR_SECTION(label) label##1:
+
+#define FTR_SECTION_ELSE_NESTED(label) \
+label##2: \
+ .pushsection __ftr_alt_##label,"a"; \
+ .align 2; \
+label##3:
+
+#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
+label##4: \
+ .popsection; \
+ .pushsection sect,"a"; \
+ .align 3; \
+label##5: \
+ FTR_ENTRY_LONG msk; \
+ FTR_ENTRY_LONG val; \
+ FTR_ENTRY_OFFSET label##1b-label##5b; \
+ FTR_ENTRY_OFFSET label##2b-label##5b; \
+ FTR_ENTRY_OFFSET label##3b-label##5b; \
+ FTR_ENTRY_OFFSET label##4b-label##5b; \
+ .popsection;
+
+
+/* CPU feature dependent sections */
+#define BEGIN_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
+#define BEGIN_FTR_SECTION START_FTR_SECTION(97)
+
+#define END_FTR_SECTION_NESTED(msk, val, label) \
+ FTR_SECTION_ELSE_NESTED(label) \
+ MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
+
+#define END_FTR_SECTION(msk, val) \
+ END_FTR_SECTION_NESTED(msk, val, 97)
+
+#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
+#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)
+
+/* CPU feature sections with alternatives, use BEGIN_FTR_SECTION to start */
+#define FTR_SECTION_ELSE FTR_SECTION_ELSE_NESTED(97)
+#define ALT_FTR_SECTION_END_NESTED(msk, val, label) \
+ MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup)
+#define ALT_FTR_SECTION_END_NESTED_IFSET(msk, label) \
+ ALT_FTR_SECTION_END_NESTED(msk, msk, label)
+#define ALT_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
+ ALT_FTR_SECTION_END_NESTED(msk, 0, label)
+#define ALT_FTR_SECTION_END(msk, val) \
+ ALT_FTR_SECTION_END_NESTED(msk, val, 97)
+#define ALT_FTR_SECTION_END_IFSET(msk) \
+ ALT_FTR_SECTION_END_NESTED_IFSET(msk, 97)
+#define ALT_FTR_SECTION_END_IFCLR(msk) \
+ ALT_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+
+/* Firmware feature dependent sections */
+#define BEGIN_FW_FTR_SECTION_NESTED(label) START_FTR_SECTION(label)
+#define BEGIN_FW_FTR_SECTION START_FTR_SECTION(97)
+
+#define END_FW_FTR_SECTION_NESTED(msk, val, label) \
+ FTR_SECTION_ELSE_NESTED(label) \
+ MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup)
+
+#define END_FW_FTR_SECTION(msk, val) \
+ END_FW_FTR_SECTION_NESTED(msk, val, 97)
+
+#define END_FW_FTR_SECTION_IFSET(msk) END_FW_FTR_SECTION((msk), (msk))
+#define END_FW_FTR_SECTION_IFCLR(msk) END_FW_FTR_SECTION((msk), 0)
+
+/* Firmware feature sections with alternatives */
+#define FW_FTR_SECTION_ELSE_NESTED(label) FTR_SECTION_ELSE_NESTED(label)
+#define FW_FTR_SECTION_ELSE FTR_SECTION_ELSE_NESTED(97)
+#define ALT_FW_FTR_SECTION_END_NESTED(msk, val, label) \
+ MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup)
+#define ALT_FW_FTR_SECTION_END_NESTED_IFSET(msk, label) \
+ ALT_FW_FTR_SECTION_END_NESTED(msk, msk, label)
+#define ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, label) \
+ ALT_FW_FTR_SECTION_END_NESTED(msk, 0, label)
+#define ALT_FW_FTR_SECTION_END(msk, val) \
+ ALT_FW_FTR_SECTION_END_NESTED(msk, val, 97)
+#define ALT_FW_FTR_SECTION_END_IFSET(msk) \
+ ALT_FW_FTR_SECTION_END_NESTED_IFSET(msk, 97)
+#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \
+ ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97)
+
+#endif /* __ASSEMBLY__ */
+
+/* LWSYNC feature sections */
+#define START_LWSYNC_SECTION(label) label##1:
+#define MAKE_LWSYNC_SECTION_ENTRY(label, sect) \
+label##2: \
+ .pushsection sect,"a"; \
+ .align 2; \
+label##3: \
+ .long label##1b-label##3b; \
+ .popsection;
+
+#endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */
diff --git a/include/asm-powerpc/firmware.h b/include/asm-powerpc/firmware.h
index 1e41bd1..ef32899 100644
--- a/include/asm-powerpc/firmware.h
+++ b/include/asm-powerpc/firmware.h
@@ -15,6 +15,7 @@
#ifdef __KERNEL__
#include <asm/asm-compat.h>
+#include <asm/feature-fixups.h>
/* firmware feature bitmask values */
#define FIRMWARE_MAX_FEATURES 63
@@ -125,18 +126,6 @@
extern unsigned int __start___fw_ftr_fixup, __stop___fw_ftr_fixup;
-#else /* __ASSEMBLY__ */
-
-#define BEGIN_FW_FTR_SECTION_NESTED(label) label:
-#define BEGIN_FW_FTR_SECTION BEGIN_FW_FTR_SECTION_NESTED(97)
-#define END_FW_FTR_SECTION_NESTED(msk, val, label) \
- MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup)
-#define END_FW_FTR_SECTION(msk, val) \
- END_FW_FTR_SECTION_NESTED(msk, val, 97)
-
-#define END_FW_FTR_SECTION_IFSET(msk) END_FW_FTR_SECTION((msk), (msk))
-#define END_FW_FTR_SECTION_IFCLR(msk) END_FW_FTR_SECTION((msk), 0)
-
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* __ASM_POWERPC_FIRMWARE_H */
diff --git a/include/asm-powerpc/fsl_gtm.h b/include/asm-powerpc/fsl_gtm.h
new file mode 100644
index 0000000..8e8c9b5
--- /dev/null
+++ b/include/asm-powerpc/fsl_gtm.h
@@ -0,0 +1,47 @@
+/*
+ * Freescale General-purpose Timers Module
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ * Shlomi Gridish <gridish@freescale.com>
+ * Jerry Huang <Chang-Ming.Huang@freescale.com>
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ * Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_FSL_GTM_H
+#define __ASM_FSL_GTM_H
+
+#include <linux/types.h>
+
+struct gtm;
+
+struct gtm_timer {
+ unsigned int irq;
+
+ struct gtm *gtm;
+ bool requested;
+ u8 __iomem *gtcfr;
+ __be16 __iomem *gtmdr;
+ __be16 __iomem *gtpsr;
+ __be16 __iomem *gtcnr;
+ __be16 __iomem *gtrfr;
+ __be16 __iomem *gtevr;
+};
+
+extern struct gtm_timer *gtm_get_timer16(void);
+extern struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm,
+ unsigned int timer);
+extern void gtm_put_timer16(struct gtm_timer *tmr);
+extern int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec,
+ bool reload);
+extern int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec,
+ bool reload);
+extern void gtm_stop_timer16(struct gtm_timer *tmr);
+extern void gtm_ack_timer16(struct gtm_timer *tmr, u16 events);
+
+#endif /* __ASM_FSL_GTM_H */
diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h
index 8918948..8b62782 100644
--- a/include/asm-powerpc/io.h
+++ b/include/asm-powerpc/io.h
@@ -95,33 +95,60 @@
#define IO_SET_SYNC_FLAG()
#endif
-#define DEF_MMIO_IN(name, type, insn) \
-static inline type name(const volatile type __iomem *addr) \
+/* gcc 4.0 and older doesn't have 'Z' constraint */
+#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ == 0)
+#define DEF_MMIO_IN_LE(name, size, insn) \
+static inline u##size name(const volatile u##size __iomem *addr) \
{ \
- type ret; \
- __asm__ __volatile__("sync;" insn ";twi 0,%0,0;isync" \
+ u##size ret; \
+ __asm__ __volatile__("sync;"#insn" %0,0,%1;twi 0,%0,0;isync" \
: "=r" (ret) : "r" (addr), "m" (*addr) : "memory"); \
return ret; \
}
-#define DEF_MMIO_OUT(name, type, insn) \
-static inline void name(volatile type __iomem *addr, type val) \
+#define DEF_MMIO_OUT_LE(name, size, insn) \
+static inline void name(volatile u##size __iomem *addr, u##size val) \
{ \
- __asm__ __volatile__("sync;" insn \
+ __asm__ __volatile__("sync;"#insn" %1,0,%2" \
: "=m" (*addr) : "r" (val), "r" (addr) : "memory"); \
IO_SET_SYNC_FLAG(); \
}
+#else /* newer gcc */
+#define DEF_MMIO_IN_LE(name, size, insn) \
+static inline u##size name(const volatile u##size __iomem *addr) \
+{ \
+ u##size ret; \
+ __asm__ __volatile__("sync;"#insn" %0,%y1;twi 0,%0,0;isync" \
+ : "=r" (ret) : "Z" (*addr) : "memory"); \
+ return ret; \
+}
+#define DEF_MMIO_OUT_LE(name, size, insn) \
+static inline void name(volatile u##size __iomem *addr, u##size val) \
+{ \
+ __asm__ __volatile__("sync;"#insn" %1,%y0" \
+ : "=Z" (*addr) : "r" (val) : "memory"); \
+ IO_SET_SYNC_FLAG(); \
+}
+#endif
-#define DEF_MMIO_IN_BE(name, size, insn) \
- DEF_MMIO_IN(name, u##size, __stringify(insn)"%U2%X2 %0,%2")
-#define DEF_MMIO_IN_LE(name, size, insn) \
- DEF_MMIO_IN(name, u##size, __stringify(insn)" %0,0,%1")
+#define DEF_MMIO_IN_BE(name, size, insn) \
+static inline u##size name(const volatile u##size __iomem *addr) \
+{ \
+ u##size ret; \
+ __asm__ __volatile__("sync;"#insn"%U1%X1 %0,%1;twi 0,%0,0;isync"\
+ : "=r" (ret) : "m" (*addr) : "memory"); \
+ return ret; \
+}
-#define DEF_MMIO_OUT_BE(name, size, insn) \
- DEF_MMIO_OUT(name, u##size, __stringify(insn)"%U0%X0 %1,%0")
-#define DEF_MMIO_OUT_LE(name, size, insn) \
- DEF_MMIO_OUT(name, u##size, __stringify(insn)" %1,0,%2")
+#define DEF_MMIO_OUT_BE(name, size, insn) \
+static inline void name(volatile u##size __iomem *addr, u##size val) \
+{ \
+ __asm__ __volatile__("sync;"#insn"%U0%X0 %1,%0" \
+ : "=m" (*addr) : "r" (val) : "memory"); \
+ IO_SET_SYNC_FLAG(); \
+}
+
DEF_MMIO_IN_BE(in_8, 8, lbz);
DEF_MMIO_IN_BE(in_be16, 16, lhz);
@@ -745,7 +772,7 @@
#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
-#define clrsetbits_le16(addr, clear, set) clrsetbits(le32, addr, clear, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
diff --git a/include/asm-powerpc/ioctl.h b/include/asm-powerpc/ioctl.h
index 8eb9984..57d6830 100644
--- a/include/asm-powerpc/ioctl.h
+++ b/include/asm-powerpc/ioctl.h
@@ -1,69 +1,13 @@
#ifndef _ASM_POWERPC_IOCTL_H
#define _ASM_POWERPC_IOCTL_H
-
-/*
- * this was copied from the alpha as it's a bit cleaner there.
- * -- Cort
- */
-
-#define _IOC_NRBITS 8
-#define _IOC_TYPEBITS 8
#define _IOC_SIZEBITS 13
#define _IOC_DIRBITS 3
-#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1)
-#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1)
-#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1)
-#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1)
-
-#define _IOC_NRSHIFT 0
-#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS)
-#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS)
-#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS)
-
-/*
- * Direction bits _IOC_NONE could be 0, but OSF/1 gives it a bit.
- * And this turns out useful to catch old ioctl numbers in header
- * files for us.
- */
#define _IOC_NONE 1U
#define _IOC_READ 2U
#define _IOC_WRITE 4U
-#define _IOC(dir,type,nr,size) \
- (((dir) << _IOC_DIRSHIFT) | \
- ((type) << _IOC_TYPESHIFT) | \
- ((nr) << _IOC_NRSHIFT) | \
- ((size) << _IOC_SIZESHIFT))
-
-/* provoke compile error for invalid uses of size argument */
-extern unsigned int __invalid_size_argument_for_IOC;
-#define _IOC_TYPECHECK(t) \
- ((sizeof(t) == sizeof(t[1]) && \
- sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
- sizeof(t) : __invalid_size_argument_for_IOC)
-
-/* used to create numbers */
-#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0)
-#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size)))
-#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
-#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
-#define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size))
-#define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size))
-#define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size))
-
-/* used to decode them.. */
-#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK)
-#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK)
-#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK)
-#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK)
-
-/* various drivers, such as the pcmcia stuff, need these... */
-#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT)
-#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT)
-#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT)
-#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT)
-#define IOCSIZE_SHIFT (_IOC_SIZESHIFT)
+#include <asm-generic/ioctl.h>
#endif /* _ASM_POWERPC_IOCTL_H */
diff --git a/include/asm-powerpc/iommu.h b/include/asm-powerpc/iommu.h
index 852e15f..51ecfef 100644
--- a/include/asm-powerpc/iommu.h
+++ b/include/asm-powerpc/iommu.h
@@ -79,11 +79,13 @@
extern struct iommu_table *iommu_init_table(struct iommu_table * tbl,
int nid);
-extern int iommu_map_sg(struct device *dev, struct scatterlist *sglist,
- int nelems, unsigned long mask,
- enum dma_data_direction direction);
+extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
+ struct scatterlist *sglist, int nelems,
+ unsigned long mask, enum dma_data_direction direction,
+ struct dma_attrs *attrs);
extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
- int nelems, enum dma_data_direction direction);
+ int nelems, enum dma_data_direction direction,
+ struct dma_attrs *attrs);
extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
size_t size, dma_addr_t *dma_handle,
@@ -92,9 +94,11 @@
void *vaddr, dma_addr_t dma_handle);
extern dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl,
void *vaddr, size_t size, unsigned long mask,
- enum dma_data_direction direction);
+ enum dma_data_direction direction,
+ struct dma_attrs *attrs);
extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
- size_t size, enum dma_data_direction direction);
+ size_t size, enum dma_data_direction direction,
+ struct dma_attrs *attrs);
extern void iommu_init_early_pSeries(void);
extern void iommu_init_early_iSeries(void);
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index 5089deb..1ef8e30 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -619,6 +619,19 @@
#define __ARCH_HAS_DO_SOFTIRQ
+#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
+/*
+ * Per-cpu stacks for handling critical, debug and machine check
+ * level interrupts.
+ */
+extern struct thread_info *critirq_ctx[NR_CPUS];
+extern struct thread_info *dbgirq_ctx[NR_CPUS];
+extern struct thread_info *mcheckirq_ctx[NR_CPUS];
+extern void exc_lvl_ctx_init(void);
+#else
+#define exc_lvl_ctx_init()
+#endif
+
#ifdef CONFIG_IRQSTACKS
/*
* Per-cpu stacks for handling hard and soft interrupts.
diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h
index 701857b..acdcdc6 100644
--- a/include/asm-powerpc/kexec.h
+++ b/include/asm-powerpc/kexec.h
@@ -34,6 +34,8 @@
#ifndef __ASSEMBLY__
#include <linux/cpumask.h>
+typedef void (*crash_shutdown_t)(void);
+
#ifdef CONFIG_KEXEC
#ifdef __powerpc64__
@@ -123,7 +125,6 @@
extern void default_machine_kexec(struct kimage *image);
extern int default_machine_kexec_prepare(struct kimage *image);
extern void default_machine_crash_shutdown(struct pt_regs *regs);
-typedef void (*crash_shutdown_t)(void);
extern int crash_shutdown_register(crash_shutdown_t handler);
extern int crash_shutdown_unregister(crash_shutdown_t handler);
@@ -143,6 +144,16 @@
static inline void reserve_crashkernel(void) { ; }
+static inline int crash_shutdown_register(crash_shutdown_t handler)
+{
+ return 0;
+}
+
+static inline int crash_shutdown_unregister(crash_shutdown_t handler)
+{
+ return 0;
+}
+
#endif /* CONFIG_KEXEC */
#endif /* ! __ASSEMBLY__ */
#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index 54ed64d..9899226 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -262,6 +262,7 @@
#endif
};
+extern void e500_idle(void);
extern void power4_idle(void);
extern void power4_cpu_offline_powersave(void);
extern void ppc6xx_idle(void);
diff --git a/include/asm-powerpc/mman.h b/include/asm-powerpc/mman.h
index 24cf664..9209f75 100644
--- a/include/asm-powerpc/mman.h
+++ b/include/asm-powerpc/mman.h
@@ -10,6 +10,8 @@
* 2 of the License, or (at your option) any later version.
*/
+#define PROT_SAO 0x10 /* Strong Access Ordering */
+
#define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */
#define MAP_NORESERVE 0x40 /* don't reserve swap pages */
#define MAP_LOCKED 0x80
@@ -24,4 +26,38 @@
#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
#define MAP_NONBLOCK 0x10000 /* do not block on IO */
+#ifdef __KERNEL__
+#ifdef CONFIG_PPC64
+
+#include <asm/cputable.h>
+#include <linux/mm.h>
+
+/*
+ * This file is included by linux/mman.h, so we can't use cacl_vm_prot_bits()
+ * here. How important is the optimization?
+ */
+static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot)
+{
+ return (prot & PROT_SAO) ? VM_SAO : 0;
+}
+#define arch_calc_vm_prot_bits(prot) arch_calc_vm_prot_bits(prot)
+
+static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)
+{
+ return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : 0;
+}
+#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)
+
+static inline int arch_validate_prot(unsigned long prot)
+{
+ if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM | PROT_SAO))
+ return 0;
+ if ((prot & PROT_SAO) && !cpu_has_feature(CPU_FTR_SAO))
+ return 0;
+ return 1;
+}
+#define arch_validate_prot(prot) arch_validate_prot(prot)
+
+#endif /* CONFIG_PPC64 */
+#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_MMAN_H */
diff --git a/include/asm-powerpc/mmu-hash32.h b/include/asm-powerpc/mmu-hash32.h
index 6e21ca6..16b1a1e 100644
--- a/include/asm-powerpc/mmu-hash32.h
+++ b/include/asm-powerpc/mmu-hash32.h
@@ -28,24 +28,18 @@
#define BPP_RW 0x02 /* Read/write */
#ifndef __ASSEMBLY__
+/* Contort a phys_addr_t into the right format/bits for a BAT */
+#ifdef CONFIG_PHYS_64BIT
+#define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \
+ ((x & 0x0000000e00000000ULL) >> 24) | \
+ ((x & 0x0000000100000000ULL) >> 30)))
+#else
+#define BAT_PHYS_ADDR(x) (x)
+#endif
+
struct ppc_bat {
- struct {
- unsigned long bepi:15; /* Effective page index (virtual address) */
- unsigned long :4; /* Unused */
- unsigned long bl:11; /* Block size mask */
- unsigned long vs:1; /* Supervisor valid */
- unsigned long vp:1; /* User valid */
- } batu; /* Upper register */
- struct {
- unsigned long brpn:15; /* Real page index (physical address) */
- unsigned long :10; /* Unused */
- unsigned long w:1; /* Write-thru cache */
- unsigned long i:1; /* Cache inhibit */
- unsigned long m:1; /* Memory coherence */
- unsigned long g:1; /* Guarded (MBZ in IBAT) */
- unsigned long :1; /* Unused */
- unsigned long pp:2; /* Page access protections */
- } batl; /* Lower register */
+ u32 batu;
+ u32 batl;
};
#endif /* !__ASSEMBLY__ */
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index 39c5c5f..d1dc16a 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -182,6 +182,7 @@
extern int mmu_kernel_ssize;
extern int mmu_highuser_ssize;
extern u16 mmu_slb_size;
+extern unsigned long tce_alloc_start, tce_alloc_end;
/*
* If the processor supports 64k normal pages but not 64k cache
diff --git a/include/asm-powerpc/mpc6xx.h b/include/asm-powerpc/mpc6xx.h
new file mode 100644
index 0000000..effc229
--- /dev/null
+++ b/include/asm-powerpc/mpc6xx.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_POWERPC_MPC6xx_H
+#define __ASM_POWERPC_MPC6xx_H
+
+void mpc6xx_enter_standby(void);
+
+#endif
diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h
index a4d0f87..fe566a3 100644
--- a/include/asm-powerpc/mpic.h
+++ b/include/asm-powerpc/mpic.h
@@ -353,6 +353,8 @@
#define MPIC_ENABLE_MCK 0x00000200
/* Disable bias among target selection, spread interrupts evenly */
#define MPIC_NO_BIAS 0x00000400
+/* Ignore NIRQS as reported by FRR */
+#define MPIC_BROKEN_FRR_NIRQS 0x00000800
/* MPIC HW modification ID */
#define MPIC_REGSET_MASK 0xf0000000
diff --git a/include/asm-powerpc/of_device.h b/include/asm-powerpc/of_device.h
index 6526e13..3c12399 100644
--- a/include/asm-powerpc/of_device.h
+++ b/include/asm-powerpc/of_device.h
@@ -21,8 +21,6 @@
const char *bus_id,
struct device *parent);
-extern ssize_t of_device_get_modalias(struct of_device *ofdev,
- char *str, ssize_t len);
extern int of_device_uevent(struct device *dev,
struct kobj_uevent_env *env);
diff --git a/include/asm-powerpc/pSeries_reconfig.h b/include/asm-powerpc/pSeries_reconfig.h
index ea6cfb8..e482e53 100644
--- a/include/asm-powerpc/pSeries_reconfig.h
+++ b/include/asm-powerpc/pSeries_reconfig.h
@@ -9,8 +9,10 @@
* added or removed on pSeries systems.
*/
-#define PSERIES_RECONFIG_ADD 0x0001
-#define PSERIES_RECONFIG_REMOVE 0x0002
+#define PSERIES_RECONFIG_ADD 0x0001
+#define PSERIES_RECONFIG_REMOVE 0x0002
+#define PSERIES_DRCONF_MEM_ADD 0x0003
+#define PSERIES_DRCONF_MEM_REMOVE 0x0004
#ifdef CONFIG_PPC_PSERIES
extern int pSeries_reconfig_notifier_register(struct notifier_block *);
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
index 25af4fc..02fd807 100644
--- a/include/asm-powerpc/page_64.h
+++ b/include/asm-powerpc/page_64.h
@@ -126,16 +126,22 @@
extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
+extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
+ unsigned long len, unsigned int psize);
+
#define slice_mm_new_context(mm) ((mm)->context.id == 0)
#endif /* __ASSEMBLY__ */
#else
#define slice_init()
+#define get_slice_psize(mm, addr) ((mm)->context.user_psize)
#define slice_set_user_psize(mm, psize) \
do { \
(mm)->context.user_psize = (psize); \
(mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
} while (0)
+#define slice_set_range_psize(mm, start, len, psize) \
+ slice_set_user_psize((mm), (psize))
#define slice_mm_new_context(mm) 1
#endif /* CONFIG_PPC_MM_SLICES */
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index b95d033..ae2ea80 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -92,12 +92,15 @@
* anything but the PHB. Only allow talking to the PHB if this is
* set.
* BIG_ENDIAN - cfg_addr is a big endian register
+ * BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs on
+ * the PLB4. Effectively disable MRM commands by setting this.
*/
#define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x00000001
#define PPC_INDIRECT_TYPE_EXT_REG 0x00000002
#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x00000004
#define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x00000008
#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010
+#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020
u32 indirect_type;
#endif /* !CONFIG_PPC64 */
/* Currently, we limit ourselves to 1 IO range and 3 mem
diff --git a/include/asm-powerpc/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h
index 818e2ab..fd2090d 100644
--- a/include/asm-powerpc/pgtable-4k.h
+++ b/include/asm-powerpc/pgtable-4k.h
@@ -41,6 +41,7 @@
#define PGDIR_MASK (~(PGDIR_SIZE-1))
/* PTE bits */
+#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */
#define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */
#define _PAGE_F_SECOND _PAGE_SECONDARY
diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h
index 1cbd6b3..c500771 100644
--- a/include/asm-powerpc/pgtable-64k.h
+++ b/include/asm-powerpc/pgtable-64k.h
@@ -75,6 +75,20 @@
#define _PAGE_COMBO 0x10000000 /* this is a combo 4k page */
#define _PAGE_4K_PFN 0x20000000 /* PFN is for a single 4k page */
+/* For 64K page, we don't have a separate _PAGE_HASHPTE bit. Instead,
+ * we set that to be the whole sub-bits mask. The C code will only
+ * test this, so a multi-bit mask will work. For combo pages, this
+ * is equivalent as effectively, the old _PAGE_HASHPTE was an OR of
+ * all the sub bits. For real 64k pages, we now have the assembly set
+ * _PAGE_HPTE_SUB0 in addition to setting the HIDX bits which overlap
+ * that mask. This is fine as long as the HIDX bits are never set on
+ * a PTE that isn't hashed, which is the case today.
+ *
+ * A little nit is for the huge page C code, which does the hashing
+ * in C, we need to provide which bit to use.
+ */
+#define _PAGE_HASHPTE _PAGE_HPTE_SUB
+
/* Note the full page bits must be in the same location as for normal
* 4k pages as the same asssembly will be used to insert 64K pages
* wether the kernel has CONFIG_PPC_64K_PAGES or not
@@ -83,8 +97,7 @@
#define _PAGE_F_GIX 0x00007000 /* full page: hidx bits */
/* PTE flags to conserve for HPTE identification */
-#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | _PAGE_HPTE_SUB |\
- _PAGE_COMBO)
+#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | _PAGE_COMBO)
/* Shift to put page number into pte.
*
diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h
index c08e714..73015f0 100644
--- a/include/asm-powerpc/pgtable-ppc32.h
+++ b/include/asm-powerpc/pgtable-ppc32.h
@@ -182,6 +182,9 @@
#define _PMD_SIZE_16M 0x0e0
#define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4))
+/* Until my rework is finished, 40x still needs atomic PTE updates */
+#define PTE_ATOMIC_UPDATES 1
+
#elif defined(CONFIG_44x)
/*
* Definitions for PPC440
@@ -253,17 +256,17 @@
*/
#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
-#define _PAGE_RW 0x00000002 /* S: Write permission */
+#define _PAGE_RW 0x00000002 /* S: Write permission */
#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
+#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
-#define _PAGE_HWWRITE 0x00000010 /* H: Dirty & RW */
-#define _PAGE_HWEXEC 0x00000020 /* H: Execute permission */
-#define _PAGE_USER 0x00000040 /* S: User page */
-#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
-#define _PAGE_GUARDED 0x00000100 /* H: G bit */
-#define _PAGE_DIRTY 0x00000200 /* S: Page dirty */
-#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
-#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
+#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
+#define _PAGE_USER 0x00000040 /* S: User page */
+#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
+#define _PAGE_GUARDED 0x00000100 /* H: G bit */
+#define _PAGE_COHERENT 0x00000200 /* H: M bit */
+#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
+#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
/* TODO: Add large page lowmem mapping support */
#define _PMD_PRESENT 0
@@ -273,6 +276,7 @@
/* ERPN in a PTE never gets cleared, ignore it */
#define _PTE_NONE_MASK 0xffffffff00000000ULL
+
#elif defined(CONFIG_FSL_BOOKE)
/*
MMU Assist Register 3:
@@ -315,6 +319,9 @@
#define _PMD_PRESENT_MASK (PAGE_MASK)
#define _PMD_BAD (~PAGE_MASK)
+/* Until my rework is finished, FSL BookE still needs atomic PTE updates */
+#define PTE_ATOMIC_UPDATES 1
+
#elif defined(CONFIG_8xx)
/* Definitions for 8xx embedded chips. */
#define _PAGE_PRESENT 0x0001 /* Page is valid */
@@ -345,6 +352,9 @@
#define _PTE_NONE_MASK _PAGE_ACCESSED
+/* Until my rework is finished, 8xx still needs atomic PTE updates */
+#define PTE_ATOMIC_UPDATES 1
+
#else /* CONFIG_6xx */
/* Definitions for 60x, 740/750, etc. */
#define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
@@ -365,6 +375,10 @@
#define _PMD_PRESENT 0
#define _PMD_PRESENT_MASK (PAGE_MASK)
#define _PMD_BAD (~PAGE_MASK)
+
+/* Hash table based platforms need atomic updates of the linux PTE */
+#define PTE_ATOMIC_UPDATES 1
+
#endif
/*
@@ -557,9 +571,11 @@
* low PTE word since we expect ALL flag bits to be there
*/
#ifndef CONFIG_PTE_64BIT
-static inline unsigned long pte_update(pte_t *p, unsigned long clr,
+static inline unsigned long pte_update(pte_t *p,
+ unsigned long clr,
unsigned long set)
{
+#ifdef PTE_ATOMIC_UPDATES
unsigned long old, tmp;
__asm__ __volatile__("\
@@ -572,16 +588,26 @@
: "=&r" (old), "=&r" (tmp), "=m" (*p)
: "r" (p), "r" (clr), "r" (set), "m" (*p)
: "cc" );
+#else /* PTE_ATOMIC_UPDATES */
+ unsigned long old = pte_val(*p);
+ *p = __pte((old & ~clr) | set);
+#endif /* !PTE_ATOMIC_UPDATES */
+
#ifdef CONFIG_44x
if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
icache_44x_need_flush = 1;
#endif
return old;
}
-#else
-static inline unsigned long long pte_update(pte_t *p, unsigned long clr,
- unsigned long set)
+#else /* CONFIG_PTE_64BIT */
+/* TODO: Change that to only modify the low word and move set_pte_at()
+ * out of line
+ */
+static inline unsigned long long pte_update(pte_t *p,
+ unsigned long clr,
+ unsigned long set)
{
+#ifdef PTE_ATOMIC_UPDATES
unsigned long long old;
unsigned long tmp;
@@ -596,13 +622,18 @@
: "=&r" (old), "=&r" (tmp), "=m" (*p)
: "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p)
: "cc" );
+#else /* PTE_ATOMIC_UPDATES */
+ unsigned long long old = pte_val(*p);
+ *p = __pte((old & ~(unsigned long long)clr) | set);
+#endif /* !PTE_ATOMIC_UPDATES */
+
#ifdef CONFIG_44x
if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
icache_44x_need_flush = 1;
#endif
return old;
}
-#endif
+#endif /* CONFIG_PTE_64BIT */
/*
* set_pte stores a linux PTE into the linux page table.
@@ -620,8 +651,8 @@
}
/*
- * 2.6 calles this without flushing the TLB entry, this is wrong
- * for our hash-based implementation, we fix that up here
+ * 2.6 calls this without flushing the TLB entry; this is wrong
+ * for our hash-based implementation, we fix that up here.
*/
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
static inline int __ptep_test_and_clear_young(unsigned int context, unsigned long addr, pte_t *ptep)
@@ -652,6 +683,12 @@
{
pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), 0);
}
+static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
+ unsigned long addr, pte_t *ptep)
+{
+ ptep_set_wrprotect(mm, addr, ptep);
+}
+
#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
@@ -665,7 +702,7 @@
({ \
int __changed = !pte_same(*(__ptep), __entry); \
if (__changed) { \
- __ptep_set_access_flags(__ptep, __entry, __dirty); \
+ __ptep_set_access_flags(__ptep, __entry, __dirty); \
flush_tlb_page_nohash(__vma, __address); \
} \
__changed; \
diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h
index 7686569..ab98a9c 100644
--- a/include/asm-powerpc/pgtable-ppc64.h
+++ b/include/asm-powerpc/pgtable-ppc64.h
@@ -91,9 +91,11 @@
#define _PAGE_DIRTY 0x0080 /* C: page changed */
#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
#define _PAGE_RW 0x0200 /* software: user write access allowed */
-#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */
#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
+/* Strong Access Ordering */
+#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
+
#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h
index 2dbd4e7..0966899 100644
--- a/include/asm-powerpc/ppc_asm.h
+++ b/include/asm-powerpc/ppc_asm.h
@@ -6,6 +6,7 @@
#include <linux/stringify.h>
#include <asm/asm-compat.h>
+#include <asm/processor.h>
#ifndef __ASSEMBLY__
#error __FILE__ should only be used in assembler files
@@ -73,6 +74,15 @@
REST_10GPRS(22, base)
#endif
+/*
+ * Define what the VSX XX1 form instructions will look like, then add
+ * the 128 bit load store instructions based on that.
+ */
+#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \
+ ((rb) << 11) | (((xs) >> 5)))
+
+#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
+#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
@@ -83,13 +93,13 @@
#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
-#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*(n)(base)
+#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*TS_FPRWIDTH*(n)(base)
#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base)
#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base)
#define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base)
#define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base)
#define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base)
-#define REST_FPR(n, base) lfd n,THREAD_FPR0+8*(n)(base)
+#define REST_FPR(n, base) lfd n,THREAD_FPR0+8*TS_FPRWIDTH*(n)(base)
#define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base)
#define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base)
#define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base)
@@ -109,6 +119,33 @@
#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base)
#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
+/* Save the lower 32 VSRs in the thread VSR region */
+#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,b,base)
+#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base)
+#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base)
+#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base)
+#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base)
+#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base)
+#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,b,base)
+#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base)
+#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base)
+#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base)
+#define REST_16VSRS(n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base)
+#define REST_32VSRS(n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base)
+/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */
+#define SAVE_VSRU(n,b,base) li b,THREAD_VR0+(16*(n)); STXVD2X(n+32,b,base)
+#define SAVE_2VSRSU(n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base)
+#define SAVE_4VSRSU(n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base)
+#define SAVE_8VSRSU(n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base)
+#define SAVE_16VSRSU(n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base)
+#define SAVE_32VSRSU(n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base)
+#define REST_VSRU(n,b,base) li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,b,base)
+#define REST_2VSRSU(n,b,base) REST_VSRU(n,b,base); REST_VSRU(n+1,b,base)
+#define REST_4VSRSU(n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base)
+#define REST_8VSRSU(n,b,base) REST_4VSRSU(n,b,base); REST_4VSRSU(n+4,b,base)
+#define REST_16VSRSU(n,b,base) REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base)
+#define REST_32VSRSU(n,b,base) REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base)
+
#define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
#define SAVE_2EVRS(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
#define SAVE_4EVRS(n,s,base) SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base)
@@ -356,6 +393,12 @@
#define toreal(rd)
#define fromreal(rd)
+/*
+ * We use addis to ensure compatibility with the "classic" ppc versions of
+ * these macros, which use rs = 0 to get the tophys offset in rd, rather than
+ * converting the address in r0, and so this version has to do that too
+ * (i.e. set register rd to 0 when rs == 0).
+ */
#define tophys(rd,rs) \
addis rd,rs,0
@@ -533,6 +576,73 @@
#define vr30 30
#define vr31 31
+/* VSX Registers (VSRs) */
+
+#define vsr0 0
+#define vsr1 1
+#define vsr2 2
+#define vsr3 3
+#define vsr4 4
+#define vsr5 5
+#define vsr6 6
+#define vsr7 7
+#define vsr8 8
+#define vsr9 9
+#define vsr10 10
+#define vsr11 11
+#define vsr12 12
+#define vsr13 13
+#define vsr14 14
+#define vsr15 15
+#define vsr16 16
+#define vsr17 17
+#define vsr18 18
+#define vsr19 19
+#define vsr20 20
+#define vsr21 21
+#define vsr22 22
+#define vsr23 23
+#define vsr24 24
+#define vsr25 25
+#define vsr26 26
+#define vsr27 27
+#define vsr28 28
+#define vsr29 29
+#define vsr30 30
+#define vsr31 31
+#define vsr32 32
+#define vsr33 33
+#define vsr34 34
+#define vsr35 35
+#define vsr36 36
+#define vsr37 37
+#define vsr38 38
+#define vsr39 39
+#define vsr40 40
+#define vsr41 41
+#define vsr42 42
+#define vsr43 43
+#define vsr44 44
+#define vsr45 45
+#define vsr46 46
+#define vsr47 47
+#define vsr48 48
+#define vsr49 49
+#define vsr50 50
+#define vsr51 51
+#define vsr52 52
+#define vsr53 53
+#define vsr54 54
+#define vsr55 55
+#define vsr56 56
+#define vsr57 57
+#define vsr58 58
+#define vsr59 59
+#define vsr60 60
+#define vsr61 61
+#define vsr62 62
+#define vsr63 63
+
/* SPE Registers (EVPRs) */
#define evr0 0
diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
index cf83f2d..101ed87 100644
--- a/include/asm-powerpc/processor.h
+++ b/include/asm-powerpc/processor.h
@@ -12,6 +12,12 @@
#include <asm/reg.h>
+#ifdef CONFIG_VSX
+#define TS_FPRWIDTH 2
+#else
+#define TS_FPRWIDTH 1
+#endif
+
#ifndef __ASSEMBLY__
#include <linux/compiler.h>
#include <asm/ptrace.h>
@@ -78,9 +84,14 @@
/* Lazy FPU handling on uni-processor */
extern struct task_struct *last_task_used_math;
extern struct task_struct *last_task_used_altivec;
+extern struct task_struct *last_task_used_vsx;
extern struct task_struct *last_task_used_spe;
#ifdef CONFIG_PPC32
+
+#if CONFIG_TASK_SIZE > CONFIG_KERNEL_START
+#error User TASK_SIZE overlaps with KERNEL_START address
+#endif
#define TASK_SIZE (CONFIG_TASK_SIZE)
/* This decides where the kernel will search for a free chunk of vm
@@ -136,6 +147,10 @@
unsigned long seg;
} mm_segment_t;
+#define TS_FPROFFSET 0
+#define TS_VSRLOWOFFSET 1
+#define TS_FPR(i) fpr[i][TS_FPROFFSET]
+
struct thread_struct {
unsigned long ksp; /* Kernel stack pointer */
unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */
@@ -152,8 +167,9 @@
unsigned long dbcr0; /* debug control register values */
unsigned long dbcr1;
#endif
- double fpr[32]; /* Complete floating point set */
- struct { /* fpr ... fpscr must be contiguous */
+ /* FP and VSX 0-31 register set */
+ double fpr[32][TS_FPRWIDTH];
+ struct {
unsigned int pad;
unsigned int val; /* Floating point status */
@@ -173,6 +189,10 @@
unsigned long vrsave;
int used_vr; /* set if process has used altivec */
#endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_VSX
+ /* VSR status */
+ int used_vsr; /* set if process has used altivec */
+#endif /* CONFIG_VSX */
#ifdef CONFIG_SPE
unsigned long evr[32]; /* upper 32-bits of SPE regs */
u64 acc; /* Accumulator */
@@ -202,7 +222,7 @@
.ksp_limit = INIT_SP_LIMIT, \
.regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \
.fs = KERNEL_DS, \
- .fpr = {0}, \
+ .fpr = {{0}}, \
.fpscr = { .val = 0, }, \
.fpexc_mode = 0, \
}
@@ -214,6 +234,8 @@
#define thread_saved_pc(tsk) \
((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
+#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.regs)
+
unsigned long get_wchan(struct task_struct *p);
#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h
index 78b7b0d..eb3bd2e 100644
--- a/include/asm-powerpc/prom.h
+++ b/include/asm-powerpc/prom.h
@@ -212,8 +212,16 @@
*/
extern const u32 *of_get_address(struct device_node *dev, int index,
u64 *size, unsigned int *flags);
+#ifdef CONFIG_PCI
extern const u32 *of_get_pci_address(struct device_node *dev, int bar_no,
u64 *size, unsigned int *flags);
+#else
+static inline const u32 *of_get_pci_address(struct device_node *dev,
+ int bar_no, u64 *size, unsigned int *flags)
+{
+ return NULL;
+}
+#endif /* CONFIG_PCI */
/* Get an address as a resource. Note that if your address is
* a PIO address, the conversion will fail if the physical address
@@ -223,8 +231,16 @@
*/
extern int of_address_to_resource(struct device_node *dev, int index,
struct resource *r);
+#ifdef CONFIG_PCI
extern int of_pci_address_to_resource(struct device_node *dev, int bar,
struct resource *r);
+#else
+static inline int of_pci_address_to_resource(struct device_node *dev, int bar,
+ struct resource *r)
+{
+ return -ENOSYS;
+}
+#endif /* CONFIG_PCI */
/* Parse the ibm,dma-window property of an OF node into the busno, phys and
* size parameters.
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h
index 39023dd..3d6e310 100644
--- a/include/asm-powerpc/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -119,6 +119,7 @@
#ifndef __powerpc64__
#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
#define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
+#define IS_DEBUG_EXC(regs) (((regs)->trap & 8) != 0)
#endif /* ! __powerpc64__ */
#define TRAP(regs) ((regs)->trap & ~0xF)
#ifdef __powerpc64__
@@ -223,6 +224,14 @@
#define PT_VRSAVE_32 (PT_VR0 + 33*4)
#endif
+/*
+ * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
+ */
+#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
+#define PT_VSR31 (PT_VSR0 + 2*31)
+#ifdef __KERNEL__
+#define PT_VSR0_32 300 /* each VSR reg occupies 4 slots in 32-bit */
+#endif
#endif /* __powerpc64__ */
/*
@@ -245,6 +254,10 @@
#define PTRACE_GETEVRREGS 20
#define PTRACE_SETEVRREGS 21
+/* Get the first 32 128bit VSX registers */
+#define PTRACE_GETVSRREGS 27
+#define PTRACE_SETVSRREGS 28
+
/*
* Get or set a debug register. The first 16 are DABR registers and the
* second 16 are IABR registers.
diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h
index c3be6e2..edee15d 100644
--- a/include/asm-powerpc/qe.h
+++ b/include/asm-powerpc/qe.h
@@ -16,6 +16,8 @@
#define _ASM_POWERPC_QE_H
#ifdef __KERNEL__
+#include <linux/spinlock.h>
+#include <asm/cpm.h>
#include <asm/immap_qe.h>
#define QE_NUM_OF_SNUM 28
@@ -74,10 +76,38 @@
QE_CLK_DUMMY
};
+static inline bool qe_clock_is_brg(enum qe_clock clk)
+{
+ return clk >= QE_BRG1 && clk <= QE_BRG16;
+}
+
+extern spinlock_t cmxgcr_lock;
+
/* Export QE common operations */
-extern void qe_reset(void);
+extern void __init qe_reset(void);
+
+/* QE PIO */
+#define QE_PIO_PINS 32
+
+struct qe_pio_regs {
+ __be32 cpodr; /* Open drain register */
+ __be32 cpdata; /* Data register */
+ __be32 cpdir1; /* Direction register */
+ __be32 cpdir2; /* Direction register */
+ __be32 cppar1; /* Pin assignment register */
+ __be32 cppar2; /* Pin assignment register */
+#ifdef CONFIG_PPC_85xx
+ u8 pad[8];
+#endif
+};
+
extern int par_io_init(struct device_node *np);
extern int par_io_of_config(struct device_node *np);
+#define QE_PIO_DIR_IN 2
+#define QE_PIO_DIR_OUT 1
+extern void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin,
+ int dir, int open_drain, int assignment,
+ int has_irq);
extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
int assignment, int has_irq);
extern int par_io_data_set(u8 port, u8 pin, u8 val);
@@ -89,20 +119,13 @@
int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
int qe_get_snum(void);
void qe_put_snum(u8 snum);
-unsigned long qe_muram_alloc(int size, int align);
-int qe_muram_free(unsigned long offset);
-unsigned long qe_muram_alloc_fixed(unsigned long offset, int size);
-void qe_muram_dump(void);
-
-static inline void __iomem *qe_muram_addr(unsigned long offset)
-{
- return (void __iomem *)&qe_immr->muram[offset];
-}
-
-static inline unsigned long qe_muram_offset(void __iomem *addr)
-{
- return addr - (void __iomem *)qe_immr->muram;
-}
+/* we actually use cpm_muram implementation, define this for convenience */
+#define qe_muram_init cpm_muram_init
+#define qe_muram_alloc cpm_muram_alloc
+#define qe_muram_alloc_fixed cpm_muram_alloc_fixed
+#define qe_muram_free cpm_muram_free
+#define qe_muram_addr cpm_muram_addr
+#define qe_muram_offset cpm_muram_offset
/* Structure that defines QE firmware binary files.
*
@@ -156,6 +179,9 @@
/* Obtain information on the uploaded firmware */
struct qe_firmware_info *qe_get_firmware_info(void);
+/* QE USB */
+int qe_usb_clock_set(enum qe_clock clk, int rate);
+
/* Buffer descriptors */
struct qe_bd {
__be16 status;
@@ -166,20 +192,6 @@
#define BD_STATUS_MASK 0xffff0000
#define BD_LENGTH_MASK 0x0000ffff
-#define BD_SC_EMPTY 0x8000 /* Receive is empty */
-#define BD_SC_READY 0x8000 /* Transmit is ready */
-#define BD_SC_WRAP 0x2000 /* Last buffer descriptor */
-#define BD_SC_INTRPT 0x1000 /* Interrupt on change */
-#define BD_SC_LAST 0x0800 /* Last buffer in frame */
-#define BD_SC_CM 0x0200 /* Continous mode */
-#define BD_SC_ID 0x0100 /* Rec'd too many idles */
-#define BD_SC_P 0x0100 /* xmt preamble */
-#define BD_SC_BR 0x0020 /* Break received */
-#define BD_SC_FR 0x0010 /* Framing error */
-#define BD_SC_PR 0x0008 /* Parity error */
-#define BD_SC_OV 0x0002 /* Overrun */
-#define BD_SC_CD 0x0001 /* ?? */
-
/* Alignment */
#define QE_INTR_TABLE_ALIGN 16 /* ??? */
#define QE_ALIGNMENT_OF_BD 8
@@ -254,6 +266,16 @@
#define QE_CMXGCR_MII_ENET_MNG 0x00007000
#define QE_CMXGCR_MII_ENET_MNG_SHIFT 12
#define QE_CMXGCR_USBCS 0x0000000f
+#define QE_CMXGCR_USBCS_CLK3 0x1
+#define QE_CMXGCR_USBCS_CLK5 0x2
+#define QE_CMXGCR_USBCS_CLK7 0x3
+#define QE_CMXGCR_USBCS_CLK9 0x4
+#define QE_CMXGCR_USBCS_CLK13 0x5
+#define QE_CMXGCR_USBCS_CLK17 0x6
+#define QE_CMXGCR_USBCS_CLK19 0x7
+#define QE_CMXGCR_USBCS_CLK21 0x8
+#define QE_CMXGCR_USBCS_BRG9 0x9
+#define QE_CMXGCR_USBCS_BRG10 0xa
/* QE CECR Commands.
*/
@@ -283,7 +305,7 @@
#define QE_HPAC_START_TX 0x0000060b
#define QE_HPAC_START_RX 0x0000070b
#define QE_USB_STOP_TX 0x0000000a
-#define QE_USB_RESTART_TX 0x0000000b
+#define QE_USB_RESTART_TX 0x0000000c
#define QE_QMC_STOP_TX 0x0000000c
#define QE_QMC_STOP_RX 0x0000000d
#define QE_SS7_SU_FIL_RESET 0x0000000e
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index edc0cfd..bbccadf 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -30,6 +30,7 @@
#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
#define MSR_HV_LG 60 /* Hypervisor state */
#define MSR_VEC_LG 25 /* Enable AltiVec */
+#define MSR_VSX_LG 23 /* Enable VSX */
#define MSR_POW_LG 18 /* Enable Power Management */
#define MSR_WE_LG 18 /* Wait State Enable */
#define MSR_TGPR_LG 17 /* TLB Update registers in use */
@@ -71,6 +72,7 @@
#endif
#define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */
+#define MSR_VSX __MASK(MSR_VSX_LG) /* Enable VSX */
#define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */
#define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */
#define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */
@@ -240,7 +242,7 @@
#define HID0_DAPUEN (1<<8) /* Debug APU enable */
#define HID0_SGE (1<<7) /* Store Gathering Enable */
#define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */
-#define HID0_DFCA (1<<6) /* Data Cache Flush Assist */
+#define HID0_DCFA (1<<6) /* Data Cache Flush Assist */
#define HID0_LRSTK (1<<4) /* Link register stack - 745x */
#define HID0_BTIC (1<<5) /* Branch Target Instr Cache Enable */
#define HID0_ABE (1<<3) /* Address Broadcast Enable */
@@ -732,6 +734,8 @@
" .llong %1\n" \
" .llong 97b-98b\n" \
" .llong 99b-98b\n" \
+ " .llong 0\n" \
+ " .llong 0\n" \
".previous" \
: "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;})
#else
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
index cf54a3f..be980f4 100644
--- a/include/asm-powerpc/reg_booke.h
+++ b/include/asm-powerpc/reg_booke.h
@@ -61,6 +61,8 @@
#define SPRN_SPEFSCR 0x200 /* SPE & Embedded FP Status & Control */
#define SPRN_BBEAR 0x201 /* Branch Buffer Entry Address Register */
#define SPRN_BBTAR 0x202 /* Branch Buffer Target Address Register */
+#define SPRN_L1CFG0 0x203 /* L1 Cache Configure Register 0 */
+#define SPRN_L1CFG1 0x204 /* L1 Cache Configure Register 1 */
#define SPRN_ATB 0x20E /* Alternate Time Base */
#define SPRN_ATBL 0x20E /* Alternate Time Base Lower */
#define SPRN_ATBU 0x20F /* Alternate Time Base Upper */
@@ -78,6 +80,7 @@
#define SPRN_DSRR1 0x23F /* Debug Save and Restore Register 1 */
#define SPRN_SPRG8 0x25C /* Special Purpose Register General 8 */
#define SPRN_SPRG9 0x25D /* Special Purpose Register General 9 */
+#define SPRN_L1CSR2 0x25E /* L1 Cache Control and Status Register 2 */
#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */
#define SPRN_MAS1 0x271 /* MMU Assist Register 1 */
#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
@@ -108,6 +111,8 @@
#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */
+#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */
+#define SPRN_L2CSR1 0x3FA /* L2 Data Cache Control and Status Register 1 */
#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */
#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
#define SPRN_SVR 0x3FF /* System Version Register */
@@ -210,6 +215,7 @@
#ifdef CONFIG_BOOKE
#define DBSR_IC 0x08000000 /* Instruction Completion */
#define DBSR_BT 0x04000000 /* Branch Taken */
+#define DBSR_IRPT 0x02000000 /* Exception Debug Event */
#define DBSR_TIE 0x01000000 /* Trap Instruction Event */
#define DBSR_IAC1 0x00800000 /* Instr Address Compare 1 Event */
#define DBSR_IAC2 0x00400000 /* Instr Address Compare 2 Event */
@@ -219,10 +225,14 @@
#define DBSR_DAC1W 0x00040000 /* Data Addr Compare 1 Write Event */
#define DBSR_DAC2R 0x00020000 /* Data Addr Compare 2 Read Event */
#define DBSR_DAC2W 0x00010000 /* Data Addr Compare 2 Write Event */
+#define DBSR_RET 0x00008000 /* Return Debug Event */
+#define DBSR_CIRPT 0x00000040 /* Critical Interrupt Taken Event */
+#define DBSR_CRET 0x00000020 /* Critical Return Debug Event */
#endif
#ifdef CONFIG_40x
#define DBSR_IC 0x80000000 /* Instruction Completion */
#define DBSR_BT 0x40000000 /* Branch taken */
+#define DBSR_IRPT 0x20000000 /* Exception Debug Event */
#define DBSR_TIE 0x10000000 /* Trap Instruction debug Event */
#define DBSR_IAC1 0x04000000 /* Instruction Address Compare 1 Event */
#define DBSR_IAC2 0x02000000 /* Instruction Address Compare 2 Event */
@@ -253,6 +263,7 @@
#define ESR_BO 0x00020000 /* Byte Ordering */
/* Bit definitions related to the DBCR0. */
+#if defined(CONFIG_40x)
#define DBCR0_EDM 0x80000000 /* External Debug Mode */
#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */
#define DBCR0_RST 0x30000000 /* all the bits in the RST field */
@@ -261,20 +272,69 @@
#define DBCR0_RST_CORE 0x10000000 /* Core Reset */
#define DBCR0_RST_NONE 0x00000000 /* No Reset */
#define DBCR0_IC 0x08000000 /* Instruction Completion */
+#define DBCR0_ICMP DBCR0_IC
#define DBCR0_BT 0x04000000 /* Branch Taken */
+#define DBCR0_BRT DBCR0_BT
#define DBCR0_EDE 0x02000000 /* Exception Debug Event */
+#define DBCR0_IRPT DBCR0_EDE
#define DBCR0_TDE 0x01000000 /* TRAP Debug Event */
#define DBCR0_IA1 0x00800000 /* Instr Addr compare 1 enable */
+#define DBCR0_IAC1 DBCR0_IA1
#define DBCR0_IA2 0x00400000 /* Instr Addr compare 2 enable */
+#define DBCR0_IAC2 DBCR0_IA2
#define DBCR0_IA12 0x00200000 /* Instr Addr 1-2 range enable */
#define DBCR0_IA12X 0x00100000 /* Instr Addr 1-2 range eXclusive */
#define DBCR0_IA3 0x00080000 /* Instr Addr compare 3 enable */
+#define DBCR0_IAC3 DBCR0_IA3
#define DBCR0_IA4 0x00040000 /* Instr Addr compare 4 enable */
+#define DBCR0_IAC4 DBCR0_IA4
#define DBCR0_IA34 0x00020000 /* Instr Addr 3-4 range Enable */
#define DBCR0_IA34X 0x00010000 /* Instr Addr 3-4 range eXclusive */
#define DBCR0_IA12T 0x00008000 /* Instr Addr 1-2 range Toggle */
#define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */
#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */
+#elif defined(CONFIG_BOOKE)
+#define DBCR0_EDM 0x80000000 /* External Debug Mode */
+#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */
+#define DBCR0_RST 0x30000000 /* all the bits in the RST field */
+/* DBCR0_RST_* is 44x specific and not followed in fsl booke */
+#define DBCR0_RST_SYSTEM 0x30000000 /* System Reset */
+#define DBCR0_RST_CHIP 0x20000000 /* Chip Reset */
+#define DBCR0_RST_CORE 0x10000000 /* Core Reset */
+#define DBCR0_RST_NONE 0x00000000 /* No Reset */
+#define DBCR0_ICMP 0x08000000 /* Instruction Completion */
+#define DBCR0_IC DBCR0_ICMP
+#define DBCR0_BRT 0x04000000 /* Branch Taken */
+#define DBCR0_BT DBCR0_BRT
+#define DBCR0_IRPT 0x02000000 /* Exception Debug Event */
+#define DBCR0_TDE 0x01000000 /* TRAP Debug Event */
+#define DBCR0_TIE DBCR0_TDE
+#define DBCR0_IAC1 0x00800000 /* Instr Addr compare 1 enable */
+#define DBCR0_IAC2 0x00400000 /* Instr Addr compare 2 enable */
+#define DBCR0_IAC3 0x00200000 /* Instr Addr compare 3 enable */
+#define DBCR0_IAC4 0x00100000 /* Instr Addr compare 4 enable */
+#define DBCR0_DAC1R 0x00080000 /* DAC 1 Read enable */
+#define DBCR0_DAC1W 0x00040000 /* DAC 1 Write enable */
+#define DBCR0_DAC2R 0x00020000 /* DAC 2 Read enable */
+#define DBCR0_DAC2W 0x00010000 /* DAC 2 Write enable */
+#define DBCR0_RET 0x00008000 /* Return Debug Event */
+#define DBCR0_CIRPT 0x00000040 /* Critical Interrupt Taken Event */
+#define DBCR0_CRET 0x00000020 /* Critical Return Debug Event */
+#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */
+
+/* Bit definitions related to the DBCR1. */
+#define DBCR1_IAC12M 0x00800000 /* Instr Addr 1-2 range enable */
+#define DBCR1_IAC12MX 0x00C00000 /* Instr Addr 1-2 range eXclusive */
+#define DBCR1_IAC12AT 0x00010000 /* Instr Addr 1-2 range Toggle */
+#define DBCR1_IAC34M 0x00000080 /* Instr Addr 3-4 range enable */
+#define DBCR1_IAC34MX 0x000000C0 /* Instr Addr 3-4 range eXclusive */
+#define DBCR1_IAC34AT 0x00000001 /* Instr Addr 3-4 range Toggle */
+
+/* Bit definitions related to the DBCR2. */
+#define DBCR2_DAC12M 0x00800000 /* DAC 1-2 range enable */
+#define DBCR2_DAC12MX 0x00C00000 /* DAC 1-2 range eXclusive */
+#define DBCR2_DAC12A 0x00200000 /* DAC 1-2 Asynchronous */
+#endif
/* Bit definitions related to the TCR. */
#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
@@ -336,6 +396,20 @@
#define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */
#define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */
+/* Bit definitions for L2CSR0. */
+#define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */
+#define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */
+#define L2CSR0_L2WP 0x1c000000 /* L2 I/D Way Partioning */
+#define L2CSR0_L2CM 0x03000000 /* L2 Cache Coherency Mode */
+#define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */
+#define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */
+#define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */
+#define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */
+#define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */
+#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */
+#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */
+#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */
+
/* Bit definitions for SGR. */
#define SGR_NORMAL 0 /* Speculative fetching allowed. */
#define SGR_GUARDED 1 /* Speculative fetching disallowed. */
diff --git a/include/asm-powerpc/sigcontext.h b/include/asm-powerpc/sigcontext.h
index 165d630..9c1f24f 100644
--- a/include/asm-powerpc/sigcontext.h
+++ b/include/asm-powerpc/sigcontext.h
@@ -43,9 +43,44 @@
* it must be copied via a vector register to/from storage) or as a word.
* The entry with index 33 contains the vrsave as the first word (offset 0)
* within the quadword.
+ *
+ * Part of the VSX data is stored here also by extending vmx_restore
+ * by an additional 32 double words. Architecturally the layout of
+ * the VSR registers and how they overlap on top of the legacy FPR and
+ * VR registers is shown below:
+ *
+ * VSR doubleword 0 VSR doubleword 1
+ * ----------------------------------------------------------------
+ * VSR[0] | FPR[0] | |
+ * ----------------------------------------------------------------
+ * VSR[1] | FPR[1] | |
+ * ----------------------------------------------------------------
+ * | ... | |
+ * | ... | |
+ * ----------------------------------------------------------------
+ * VSR[30] | FPR[30] | |
+ * ----------------------------------------------------------------
+ * VSR[31] | FPR[31] | |
+ * ----------------------------------------------------------------
+ * VSR[32] | VR[0] |
+ * ----------------------------------------------------------------
+ * VSR[33] | VR[1] |
+ * ----------------------------------------------------------------
+ * | ... |
+ * | ... |
+ * ----------------------------------------------------------------
+ * VSR[62] | VR[30] |
+ * ----------------------------------------------------------------
+ * VSR[63] | VR[31] |
+ * ----------------------------------------------------------------
+ *
+ * FPR/VSR 0-31 doubleword 0 is stored in fp_regs, and VMX/VSR 32-63
+ * is stored at the start of vmx_reserve. vmx_reserve is extended for
+ * backwards compatility to store VSR 0-31 doubleword 1 after the VMX
+ * registers and vscr/vrsave.
*/
elf_vrreg_t __user *v_regs;
- long vmx_reserve[ELF_NVRREG+ELF_NVRREG+1];
+ long vmx_reserve[ELF_NVRREG+ELF_NVRREG+32+1];
#endif
};
diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h
index c663a1f..416d4c2 100644
--- a/include/asm-powerpc/smp.h
+++ b/include/asm-powerpc/smp.h
@@ -37,6 +37,8 @@
extern void smp_send_debugger_break(int cpu);
extern void smp_message_recv(int);
+DECLARE_PER_CPU(unsigned int, pvr);
+
#ifdef CONFIG_HOTPLUG_CPU
extern void fixup_irqs(cpumask_t map);
int generic_cpu_disable(void);
diff --git a/include/asm-powerpc/sparsemem.h b/include/asm-powerpc/sparsemem.h
index 9aea8e9..54a47ea 100644
--- a/include/asm-powerpc/sparsemem.h
+++ b/include/asm-powerpc/sparsemem.h
@@ -13,6 +13,8 @@
#define MAX_PHYSADDR_BITS 44
#define MAX_PHYSMEM_BITS 44
+#endif /* CONFIG_SPARSEMEM */
+
#ifdef CONFIG_MEMORY_HOTPLUG
extern void create_section_mapping(unsigned long start, unsigned long end);
extern int remove_section_mapping(unsigned long start, unsigned long end);
@@ -26,7 +28,5 @@
#endif /* CONFIG_NUMA */
#endif /* CONFIG_MEMORY_HOTPLUG */
-#endif /* CONFIG_SPARSEMEM */
-
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_SPARSEMEM_H */
diff --git a/include/asm-powerpc/spinlock.h b/include/asm-powerpc/spinlock.h
index 258c939..f56a843 100644
--- a/include/asm-powerpc/spinlock.h
+++ b/include/asm-powerpc/spinlock.h
@@ -54,7 +54,7 @@
* This returns the old value in the lock, so we succeeded
* in getting the lock if the return value is 0.
*/
-static __inline__ unsigned long __spin_trylock(raw_spinlock_t *lock)
+static inline unsigned long __spin_trylock(raw_spinlock_t *lock)
{
unsigned long tmp, token;
@@ -73,7 +73,7 @@
return tmp;
}
-static int __inline__ __raw_spin_trylock(raw_spinlock_t *lock)
+static inline int __raw_spin_trylock(raw_spinlock_t *lock)
{
CLEAR_IO_SYNC;
return __spin_trylock(lock) == 0;
@@ -104,7 +104,7 @@
#define SHARED_PROCESSOR 0
#endif
-static void __inline__ __raw_spin_lock(raw_spinlock_t *lock)
+static inline void __raw_spin_lock(raw_spinlock_t *lock)
{
CLEAR_IO_SYNC;
while (1) {
@@ -119,7 +119,8 @@
}
}
-static void __inline__ __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
+static inline
+void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
{
unsigned long flags_dis;
@@ -139,7 +140,7 @@
}
}
-static __inline__ void __raw_spin_unlock(raw_spinlock_t *lock)
+static inline void __raw_spin_unlock(raw_spinlock_t *lock)
{
SYNC_IO;
__asm__ __volatile__("# __raw_spin_unlock\n\t"
@@ -180,7 +181,7 @@
* This returns the old value in the lock + 1,
* so we got a read lock if the return value is > 0.
*/
-static long __inline__ __read_trylock(raw_rwlock_t *rw)
+static inline long __read_trylock(raw_rwlock_t *rw)
{
long tmp;
@@ -204,7 +205,7 @@
* This returns the old value in the lock,
* so we got the write lock if the return value is 0.
*/
-static __inline__ long __write_trylock(raw_rwlock_t *rw)
+static inline long __write_trylock(raw_rwlock_t *rw)
{
long tmp, token;
@@ -224,7 +225,7 @@
return tmp;
}
-static void __inline__ __raw_read_lock(raw_rwlock_t *rw)
+static inline void __raw_read_lock(raw_rwlock_t *rw)
{
while (1) {
if (likely(__read_trylock(rw) > 0))
@@ -238,7 +239,7 @@
}
}
-static void __inline__ __raw_write_lock(raw_rwlock_t *rw)
+static inline void __raw_write_lock(raw_rwlock_t *rw)
{
while (1) {
if (likely(__write_trylock(rw) == 0))
@@ -252,17 +253,17 @@
}
}
-static int __inline__ __raw_read_trylock(raw_rwlock_t *rw)
+static inline int __raw_read_trylock(raw_rwlock_t *rw)
{
return __read_trylock(rw) > 0;
}
-static int __inline__ __raw_write_trylock(raw_rwlock_t *rw)
+static inline int __raw_write_trylock(raw_rwlock_t *rw)
{
return __write_trylock(rw) == 0;
}
-static void __inline__ __raw_read_unlock(raw_rwlock_t *rw)
+static inline void __raw_read_unlock(raw_rwlock_t *rw)
{
long tmp;
@@ -279,7 +280,7 @@
: "cr0", "memory");
}
-static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
+static inline void __raw_write_unlock(raw_rwlock_t *rw)
{
__asm__ __volatile__("# write_unlock\n\t"
LWSYNC_ON_SMP: : :"memory");
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 99348c1..8b2eb04 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -191,6 +191,7 @@
struct list_head spus;
int n_spus;
int nr_active;
+ atomic_t busy_spus;
atomic_t reserved_spus;
};
diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h
index 2cda3c3..45963e8 100644
--- a/include/asm-powerpc/synch.h
+++ b/include/asm-powerpc/synch.h
@@ -3,24 +3,12 @@
#ifdef __KERNEL__
#include <linux/stringify.h>
+#include <asm/feature-fixups.h>
-#ifdef __powerpc64__
-#define __SUBARCH_HAS_LWSYNC
-#endif
-
-#ifdef __SUBARCH_HAS_LWSYNC
-# define LWSYNC lwsync
-#else
-# define LWSYNC sync
-#endif
-
-#ifdef CONFIG_SMP
-#define ISYNC_ON_SMP "\n\tisync\n"
-#define LWSYNC_ON_SMP __stringify(LWSYNC) "\n"
-#else
-#define ISYNC_ON_SMP
-#define LWSYNC_ON_SMP
-#endif
+#ifndef __ASSEMBLY__
+extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup;
+extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
+ void *fixup_end);
static inline void eieio(void)
{
@@ -31,6 +19,26 @@
{
__asm__ __volatile__ ("isync" : : : "memory");
}
+#endif /* __ASSEMBLY__ */
+
+#if defined(__powerpc64__)
+# define LWSYNC lwsync
+#elif defined(CONFIG_E500)
+# define LWSYNC \
+ START_LWSYNC_SECTION(96); \
+ sync; \
+ MAKE_LWSYNC_SECTION_ENTRY(96, __lwsync_fixup);
+#else
+# define LWSYNC sync
+#endif
+
+#ifdef CONFIG_SMP
+#define ISYNC_ON_SMP "\n\tisync\n"
+#define LWSYNC_ON_SMP stringify_in_c(LWSYNC) "\n"
+#else
+#define ISYNC_ON_SMP
+#define LWSYNC_ON_SMP
+#endif
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_SYNCH_H */
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 5235f87..e6e25e2 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -30,8 +30,8 @@
*
* For wmb(), we use sync since wmb is used in drivers to order
* stores to system memory with respect to writes to the device.
- * However, smp_wmb() can be a lighter-weight eieio barrier on
- * SMP since it is only used to order updates to system memory.
+ * However, smp_wmb() can be a lighter-weight lwsync or eieio barrier
+ * on SMP since it is only used to order updates to system memory.
*/
#define mb() __asm__ __volatile__ ("sync" : : : "memory")
#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
@@ -43,9 +43,16 @@
#ifdef __KERNEL__
#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */
#ifdef CONFIG_SMP
+
+#ifdef __SUBARCH_HAS_LWSYNC
+# define SMPWMB lwsync
+#else
+# define SMPWMB eieio
+#endif
+
#define smp_mb() mb()
#define smp_rmb() rmb()
-#define smp_wmb() eieio()
+#define smp_wmb() __asm__ __volatile__ (__stringify(SMPWMB) : : :"memory")
#define smp_read_barrier_depends() read_barrier_depends()
#else
#define smp_mb() barrier()
@@ -132,6 +139,8 @@
extern void giveup_altivec(struct task_struct *);
extern void load_up_altivec(struct task_struct *);
extern int emulate_altivec(struct pt_regs *);
+extern void __giveup_vsx(struct task_struct *);
+extern void giveup_vsx(struct task_struct *);
extern void enable_kernel_spe(void);
extern void giveup_spe(struct task_struct *);
extern void load_up_spe(struct task_struct *);
@@ -155,6 +164,14 @@
}
#endif
+#ifdef CONFIG_VSX
+extern void flush_vsx_to_thread(struct task_struct *);
+#else
+static inline void flush_vsx_to_thread(struct task_struct *t)
+{
+}
+#endif
+
#ifdef CONFIG_SPE
extern void flush_spe_to_thread(struct task_struct *);
#else
@@ -190,6 +207,7 @@
extern unsigned int rtas_data;
extern int mem_init_done; /* set on boot once kmalloc can be called */
+extern int init_bootmem_done; /* set on !NUMA once bootmem is available */
extern unsigned long memory_limit;
extern unsigned long klimit;
@@ -518,54 +536,6 @@
#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x)))
-static inline void create_instruction(unsigned long addr, unsigned int instr)
-{
- unsigned int *p;
- p = (unsigned int *)addr;
- *p = instr;
- asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (p));
-}
-
-/* Flags for create_branch:
- * "b" == create_branch(addr, target, 0);
- * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE);
- * "bl" == create_branch(addr, target, BRANCH_SET_LINK);
- * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK);
- */
-#define BRANCH_SET_LINK 0x1
-#define BRANCH_ABSOLUTE 0x2
-
-static inline void create_branch(unsigned long addr,
- unsigned long target, int flags)
-{
- unsigned int instruction;
-
- if (! (flags & BRANCH_ABSOLUTE))
- target = target - addr;
-
- /* Mask out the flags and target, so they don't step on each other. */
- instruction = 0x48000000 | (flags & 0x3) | (target & 0x03FFFFFC);
-
- create_instruction(addr, instruction);
-}
-
-static inline void create_function_call(unsigned long addr, void * func)
-{
- unsigned long func_addr;
-
-#ifdef CONFIG_PPC64
- /*
- * On PPC64 the function pointer actually points to the function's
- * descriptor. The first entry in the descriptor is the address
- * of the function text.
- */
- func_addr = *(unsigned long *)func;
-#else
- func_addr = (unsigned long)func;
-#endif
- create_branch(addr, func_addr, BRANCH_SET_LINK);
-}
-
#ifdef CONFIG_VIRT_CPU_ACCOUNTING
extern void account_system_vtime(struct task_struct *);
#endif
diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h
index d030f5c..b705c2a 100644
--- a/include/asm-powerpc/thread_info.h
+++ b/include/asm-powerpc/thread_info.h
@@ -116,7 +116,6 @@
#define TIF_SECCOMP 10 /* secure computing */
#define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */
#define TIF_NOERROR 12 /* Force successful syscall return */
-#define TIF_RESTORE_SIGMASK 13 /* Restore signal mask in do_signal */
#define TIF_FREEZE 14 /* Freezing for suspend */
#define TIF_RUNLATCH 15 /* Is the runlatch enabled? */
#define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */
@@ -134,21 +133,33 @@
#define _TIF_SECCOMP (1<<TIF_SECCOMP)
#define _TIF_RESTOREALL (1<<TIF_RESTOREALL)
#define _TIF_NOERROR (1<<TIF_NOERROR)
-#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
#define _TIF_FREEZE (1<<TIF_FREEZE)
#define _TIF_RUNLATCH (1<<TIF_RUNLATCH)
#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
-#define _TIF_USER_WORK_MASK ( _TIF_SIGPENDING | \
- _TIF_NEED_RESCHED | _TIF_RESTORE_SIGMASK)
+#define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED)
#define _TIF_PERSYSCALL_MASK (_TIF_RESTOREALL|_TIF_NOERROR)
/* Bits in local_flags */
/* Don't move TLF_NAPPING without adjusting the code in entry_32.S */
#define TLF_NAPPING 0 /* idle thread enabled NAP mode */
+#define TLF_SLEEPING 1 /* suspend code enabled SLEEP mode */
+#define TLF_RESTORE_SIGMASK 2 /* Restore signal mask in do_signal */
#define _TLF_NAPPING (1 << TLF_NAPPING)
+#define _TLF_SLEEPING (1 << TLF_SLEEPING)
+#define _TLF_RESTORE_SIGMASK (1 << TLF_RESTORE_SIGMASK)
+
+#ifndef __ASSEMBLY__
+#define HAVE_SET_RESTORE_SIGMASK 1
+static inline void set_restore_sigmask(void)
+{
+ struct thread_info *ti = current_thread_info();
+ ti->local_flags |= _TLF_RESTORE_SIGMASK;
+ set_bit(TIF_SIGPENDING, &ti->flags);
+}
+#endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
index ce5de6e..febd581 100644
--- a/include/asm-powerpc/time.h
+++ b/include/asm-powerpc/time.h
@@ -33,6 +33,7 @@
struct rtc_time;
extern void to_tm(int tim, struct rtc_time * tm);
+extern void GregorianDay(struct rtc_time *tm);
extern time_t last_rtc_update;
extern void generic_calibrate_decr(void);
diff --git a/include/asm-powerpc/timex.h b/include/asm-powerpc/timex.h
index 92dedde..c55e14f 100644
--- a/include/asm-powerpc/timex.h
+++ b/include/asm-powerpc/timex.h
@@ -38,6 +38,8 @@
" .long 0\n"
" .long 97b-98b\n"
" .long 99b-98b\n"
+ " .long 0\n"
+ " .long 0\n"
".previous"
: "=r" (ret) : "i" (CPU_FTR_601));
return ret;
diff --git a/include/asm-powerpc/xmon.h b/include/asm-powerpc/xmon.h
index 88320a0..5eb8e59 100644
--- a/include/asm-powerpc/xmon.h
+++ b/include/asm-powerpc/xmon.h
@@ -12,13 +12,22 @@
#ifdef __KERNEL__
+#include <linux/irqreturn.h>
+
#ifdef CONFIG_XMON
extern void xmon_setup(void);
extern void xmon_register_spus(struct list_head *list);
+struct pt_regs;
+extern int xmon(struct pt_regs *excp);
+extern irqreturn_t xmon_irq(int, void *);
#else
static inline void xmon_setup(void) { };
static inline void xmon_register_spus(struct list_head *list) { };
#endif
+#if defined(CONFIG_XMON) && defined(CONFIG_SMP)
+extern int cpus_are_in_xmon(void);
+#endif
+
#endif /* __KERNEL __ */
#endif /* __ASM_POWERPC_XMON_H */
diff --git a/include/asm-ppc/8xx_immap.h b/include/asm-ppc/8xx_immap.h
deleted file mode 100644
index 4b0e152..0000000
--- a/include/asm-ppc/8xx_immap.h
+++ /dev/null
@@ -1,564 +0,0 @@
-/*
- * MPC8xx Internal Memory Map
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * The I/O on the MPC860 is comprised of blocks of special registers
- * and the dual port ram for the Communication Processor Module.
- * Within this space are functional units such as the SIU, memory
- * controller, system timers, and other control functions. It is
- * a combination that I found difficult to separate into logical
- * functional files.....but anyone else is welcome to try. -- Dan
- */
-#ifdef __KERNEL__
-#ifndef __IMMAP_8XX__
-#define __IMMAP_8XX__
-
-/* System configuration registers.
-*/
-typedef struct sys_conf {
- uint sc_siumcr;
- uint sc_sypcr;
- uint sc_swt;
- char res1[2];
- ushort sc_swsr;
- uint sc_sipend;
- uint sc_simask;
- uint sc_siel;
- uint sc_sivec;
- uint sc_tesr;
- char res2[0xc];
- uint sc_sdcr;
- char res3[0x4c];
-} sysconf8xx_t;
-
-/* PCMCIA configuration registers.
-*/
-typedef struct pcmcia_conf {
- uint pcmc_pbr0;
- uint pcmc_por0;
- uint pcmc_pbr1;
- uint pcmc_por1;
- uint pcmc_pbr2;
- uint pcmc_por2;
- uint pcmc_pbr3;
- uint pcmc_por3;
- uint pcmc_pbr4;
- uint pcmc_por4;
- uint pcmc_pbr5;
- uint pcmc_por5;
- uint pcmc_pbr6;
- uint pcmc_por6;
- uint pcmc_pbr7;
- uint pcmc_por7;
- char res1[0x20];
- uint pcmc_pgcra;
- uint pcmc_pgcrb;
- uint pcmc_pscr;
- char res2[4];
- uint pcmc_pipr;
- char res3[4];
- uint pcmc_per;
- char res4[4];
-} pcmconf8xx_t;
-
-/* Memory controller registers.
-*/
-typedef struct mem_ctlr {
- uint memc_br0;
- uint memc_or0;
- uint memc_br1;
- uint memc_or1;
- uint memc_br2;
- uint memc_or2;
- uint memc_br3;
- uint memc_or3;
- uint memc_br4;
- uint memc_or4;
- uint memc_br5;
- uint memc_or5;
- uint memc_br6;
- uint memc_or6;
- uint memc_br7;
- uint memc_or7;
- char res1[0x24];
- uint memc_mar;
- uint memc_mcr;
- char res2[4];
- uint memc_mamr;
- uint memc_mbmr;
- ushort memc_mstat;
- ushort memc_mptpr;
- uint memc_mdr;
- char res3[0x80];
-} memctl8xx_t;
-
-/*-----------------------------------------------------------------------
- * BR - Memory Controler: Base Register 16-9
- */
-#define BR_BA_MSK 0xffff8000 /* Base Address Mask */
-#define BR_AT_MSK 0x00007000 /* Address Type Mask */
-#define BR_PS_MSK 0x00000c00 /* Port Size Mask */
-#define BR_PS_32 0x00000000 /* 32 bit port size */
-#define BR_PS_16 0x00000800 /* 16 bit port size */
-#define BR_PS_8 0x00000400 /* 8 bit port size */
-#define BR_PARE 0x00000200 /* Parity Enable */
-#define BR_WP 0x00000100 /* Write Protect */
-#define BR_MS_MSK 0x000000c0 /* Machine Select Mask */
-#define BR_MS_GPCM 0x00000000 /* G.P.C.M. Machine Select */
-#define BR_MS_UPMA 0x00000080 /* U.P.M.A Machine Select */
-#define BR_MS_UPMB 0x000000c0 /* U.P.M.B Machine Select */
-#define BR_V 0x00000001 /* Bank Valid */
-
-/*-----------------------------------------------------------------------
- * OR - Memory Controler: Option Register 16-11
- */
-#define OR_AM_MSK 0xffff8000 /* Address Mask Mask */
-#define OR_ATM_MSK 0x00007000 /* Address Type Mask Mask */
-#define OR_CSNT_SAM 0x00000800 /* Chip Select Negation Time/ Start */
- /* Address Multiplex */
-#define OR_ACS_MSK 0x00000600 /* Address to Chip Select Setup mask */
-#define OR_ACS_DIV1 0x00000000 /* CS is output at the same time */
-#define OR_ACS_DIV4 0x00000400 /* CS is output 1/4 a clock later */
-#define OR_ACS_DIV2 0x00000600 /* CS is output 1/2 a clock later */
-#define OR_G5LA 0x00000400 /* Output #GPL5 on #GPL_A5 */
-#define OR_G5LS 0x00000200 /* Drive #GPL high on falling edge of...*/
-#define OR_BI 0x00000100 /* Burst inhibit */
-#define OR_SCY_MSK 0x000000f0 /* Cycle Length in Clocks */
-#define OR_SCY_0_CLK 0x00000000 /* 0 clock cycles wait states */
-#define OR_SCY_1_CLK 0x00000010 /* 1 clock cycles wait states */
-#define OR_SCY_2_CLK 0x00000020 /* 2 clock cycles wait states */
-#define OR_SCY_3_CLK 0x00000030 /* 3 clock cycles wait states */
-#define OR_SCY_4_CLK 0x00000040 /* 4 clock cycles wait states */
-#define OR_SCY_5_CLK 0x00000050 /* 5 clock cycles wait states */
-#define OR_SCY_6_CLK 0x00000060 /* 6 clock cycles wait states */
-#define OR_SCY_7_CLK 0x00000070 /* 7 clock cycles wait states */
-#define OR_SCY_8_CLK 0x00000080 /* 8 clock cycles wait states */
-#define OR_SCY_9_CLK 0x00000090 /* 9 clock cycles wait states */
-#define OR_SCY_10_CLK 0x000000a0 /* 10 clock cycles wait states */
-#define OR_SCY_11_CLK 0x000000b0 /* 11 clock cycles wait states */
-#define OR_SCY_12_CLK 0x000000c0 /* 12 clock cycles wait states */
-#define OR_SCY_13_CLK 0x000000d0 /* 13 clock cycles wait states */
-#define OR_SCY_14_CLK 0x000000e0 /* 14 clock cycles wait states */
-#define OR_SCY_15_CLK 0x000000f0 /* 15 clock cycles wait states */
-#define OR_SETA 0x00000008 /* External Transfer Acknowledge */
-#define OR_TRLX 0x00000004 /* Timing Relaxed */
-#define OR_EHTR 0x00000002 /* Extended Hold Time on Read */
-
-/* System Integration Timers.
-*/
-typedef struct sys_int_timers {
- ushort sit_tbscr;
- char res0[0x02];
- uint sit_tbreff0;
- uint sit_tbreff1;
- char res1[0x14];
- ushort sit_rtcsc;
- char res2[0x02];
- uint sit_rtc;
- uint sit_rtsec;
- uint sit_rtcal;
- char res3[0x10];
- ushort sit_piscr;
- char res4[2];
- uint sit_pitc;
- uint sit_pitr;
- char res5[0x34];
-} sit8xx_t;
-
-#define TBSCR_TBIRQ_MASK ((ushort)0xff00)
-#define TBSCR_REFA ((ushort)0x0080)
-#define TBSCR_REFB ((ushort)0x0040)
-#define TBSCR_REFAE ((ushort)0x0008)
-#define TBSCR_REFBE ((ushort)0x0004)
-#define TBSCR_TBF ((ushort)0x0002)
-#define TBSCR_TBE ((ushort)0x0001)
-
-#define RTCSC_RTCIRQ_MASK ((ushort)0xff00)
-#define RTCSC_SEC ((ushort)0x0080)
-#define RTCSC_ALR ((ushort)0x0040)
-#define RTCSC_38K ((ushort)0x0010)
-#define RTCSC_SIE ((ushort)0x0008)
-#define RTCSC_ALE ((ushort)0x0004)
-#define RTCSC_RTF ((ushort)0x0002)
-#define RTCSC_RTE ((ushort)0x0001)
-
-#define PISCR_PIRQ_MASK ((ushort)0xff00)
-#define PISCR_PS ((ushort)0x0080)
-#define PISCR_PIE ((ushort)0x0004)
-#define PISCR_PTF ((ushort)0x0002)
-#define PISCR_PTE ((ushort)0x0001)
-
-/* Clocks and Reset.
-*/
-typedef struct clk_and_reset {
- uint car_sccr;
- uint car_plprcr;
- uint car_rsr;
- char res[0x74]; /* Reserved area */
-} car8xx_t;
-
-/* System Integration Timers keys.
-*/
-typedef struct sitk {
- uint sitk_tbscrk;
- uint sitk_tbreff0k;
- uint sitk_tbreff1k;
- uint sitk_tbk;
- char res1[0x10];
- uint sitk_rtcsck;
- uint sitk_rtck;
- uint sitk_rtseck;
- uint sitk_rtcalk;
- char res2[0x10];
- uint sitk_piscrk;
- uint sitk_pitck;
- char res3[0x38];
-} sitk8xx_t;
-
-/* Clocks and reset keys.
-*/
-typedef struct cark {
- uint cark_sccrk;
- uint cark_plprcrk;
- uint cark_rsrk;
- char res[0x474];
-} cark8xx_t;
-
-/* The key to unlock registers maintained by keep-alive power.
-*/
-#define KAPWR_KEY ((unsigned int)0x55ccaa33)
-
-/* Video interface. MPC823 Only.
-*/
-typedef struct vid823 {
- ushort vid_vccr;
- ushort res1;
- u_char vid_vsr;
- u_char res2;
- u_char vid_vcmr;
- u_char res3;
- uint vid_vbcb;
- uint res4;
- uint vid_vfcr0;
- uint vid_vfaa0;
- uint vid_vfba0;
- uint vid_vfcr1;
- uint vid_vfaa1;
- uint vid_vfba1;
- u_char res5[0x18];
-} vid823_t;
-
-/* LCD interface. 823 Only.
-*/
-typedef struct lcd {
- uint lcd_lccr;
- uint lcd_lchcr;
- uint lcd_lcvcr;
- char res1[4];
- uint lcd_lcfaa;
- uint lcd_lcfba;
- char lcd_lcsr;
- char res2[0x7];
-} lcd823_t;
-
-/* I2C
-*/
-typedef struct i2c {
- u_char i2c_i2mod;
- char res1[3];
- u_char i2c_i2add;
- char res2[3];
- u_char i2c_i2brg;
- char res3[3];
- u_char i2c_i2com;
- char res4[3];
- u_char i2c_i2cer;
- char res5[3];
- u_char i2c_i2cmr;
- char res6[0x8b];
-} i2c8xx_t;
-
-/* DMA control/status registers.
-*/
-typedef struct sdma_csr {
- char res1[4];
- uint sdma_sdar;
- u_char sdma_sdsr;
- char res3[3];
- u_char sdma_sdmr;
- char res4[3];
- u_char sdma_idsr1;
- char res5[3];
- u_char sdma_idmr1;
- char res6[3];
- u_char sdma_idsr2;
- char res7[3];
- u_char sdma_idmr2;
- char res8[0x13];
-} sdma8xx_t;
-
-/* Communication Processor Module Interrupt Controller.
-*/
-typedef struct cpm_ic {
- ushort cpic_civr;
- char res[0xe];
- uint cpic_cicr;
- uint cpic_cipr;
- uint cpic_cimr;
- uint cpic_cisr;
-} cpic8xx_t;
-
-/* Input/Output Port control/status registers.
-*/
-typedef struct io_port {
- ushort iop_padir;
- ushort iop_papar;
- ushort iop_paodr;
- ushort iop_padat;
- char res1[8];
- ushort iop_pcdir;
- ushort iop_pcpar;
- ushort iop_pcso;
- ushort iop_pcdat;
- ushort iop_pcint;
- char res2[6];
- ushort iop_pddir;
- ushort iop_pdpar;
- char res3[2];
- ushort iop_pddat;
- uint utmode;
- char res4[4];
-} iop8xx_t;
-
-/* Communication Processor Module Timers
-*/
-typedef struct cpm_timers {
- ushort cpmt_tgcr;
- char res1[0xe];
- ushort cpmt_tmr1;
- ushort cpmt_tmr2;
- ushort cpmt_trr1;
- ushort cpmt_trr2;
- ushort cpmt_tcr1;
- ushort cpmt_tcr2;
- ushort cpmt_tcn1;
- ushort cpmt_tcn2;
- ushort cpmt_tmr3;
- ushort cpmt_tmr4;
- ushort cpmt_trr3;
- ushort cpmt_trr4;
- ushort cpmt_tcr3;
- ushort cpmt_tcr4;
- ushort cpmt_tcn3;
- ushort cpmt_tcn4;
- ushort cpmt_ter1;
- ushort cpmt_ter2;
- ushort cpmt_ter3;
- ushort cpmt_ter4;
- char res2[8];
-} cpmtimer8xx_t;
-
-/* Finally, the Communication Processor stuff.....
-*/
-typedef struct scc { /* Serial communication channels */
- uint scc_gsmrl;
- uint scc_gsmrh;
- ushort scc_psmr;
- char res1[2];
- ushort scc_todr;
- ushort scc_dsr;
- ushort scc_scce;
- char res2[2];
- ushort scc_sccm;
- char res3;
- u_char scc_sccs;
- char res4[8];
-} scc_t;
-
-typedef struct smc { /* Serial management channels */
- char res1[2];
- ushort smc_smcmr;
- char res2[2];
- u_char smc_smce;
- char res3[3];
- u_char smc_smcm;
- char res4[5];
-} smc_t;
-
-/* MPC860T Fast Ethernet Controller. It isn't part of the CPM, but
- * it fits within the address space.
- */
-
-typedef struct fec {
- uint fec_addr_low; /* lower 32 bits of station address */
- ushort fec_addr_high; /* upper 16 bits of station address */
- ushort res1; /* reserved */
- uint fec_hash_table_high; /* upper 32-bits of hash table */
- uint fec_hash_table_low; /* lower 32-bits of hash table */
- uint fec_r_des_start; /* beginning of Rx descriptor ring */
- uint fec_x_des_start; /* beginning of Tx descriptor ring */
- uint fec_r_buff_size; /* Rx buffer size */
- uint res2[9]; /* reserved */
- uint fec_ecntrl; /* ethernet control register */
- uint fec_ievent; /* interrupt event register */
- uint fec_imask; /* interrupt mask register */
- uint fec_ivec; /* interrupt level and vector status */
- uint fec_r_des_active; /* Rx ring updated flag */
- uint fec_x_des_active; /* Tx ring updated flag */
- uint res3[10]; /* reserved */
- uint fec_mii_data; /* MII data register */
- uint fec_mii_speed; /* MII speed control register */
- uint res4[17]; /* reserved */
- uint fec_r_bound; /* end of RAM (read-only) */
- uint fec_r_fstart; /* Rx FIFO start address */
- uint res5[6]; /* reserved */
- uint fec_x_fstart; /* Tx FIFO start address */
- uint res6[17]; /* reserved */
- uint fec_fun_code; /* fec SDMA function code */
- uint res7[3]; /* reserved */
- uint fec_r_cntrl; /* Rx control register */
- uint fec_r_hash; /* Rx hash register */
- uint res8[14]; /* reserved */
- uint fec_x_cntrl; /* Tx control register */
- uint res9[0x1e]; /* reserved */
-} fec_t;
-
-/* The FEC and LCD color map share the same address space....
- * I guess we will never see an 823T :-).
- */
-union fec_lcd {
- fec_t fl_un_fec;
- u_char fl_un_cmap[0x200];
-};
-
-typedef struct comm_proc {
- /* General control and status registers.
- */
- ushort cp_cpcr;
- u_char res1[2];
- ushort cp_rccr;
- u_char res2;
- u_char cp_rmds;
- u_char res3[4];
- ushort cp_cpmcr1;
- ushort cp_cpmcr2;
- ushort cp_cpmcr3;
- ushort cp_cpmcr4;
- u_char res4[2];
- ushort cp_rter;
- u_char res5[2];
- ushort cp_rtmr;
- u_char res6[0x14];
-
- /* Baud rate generators.
- */
- uint cp_brgc1;
- uint cp_brgc2;
- uint cp_brgc3;
- uint cp_brgc4;
-
- /* Serial Communication Channels.
- */
- scc_t cp_scc[4];
-
- /* Serial Management Channels.
- */
- smc_t cp_smc[2];
-
- /* Serial Peripheral Interface.
- */
- ushort cp_spmode;
- u_char res7[4];
- u_char cp_spie;
- u_char res8[3];
- u_char cp_spim;
- u_char res9[2];
- u_char cp_spcom;
- u_char res10[2];
-
- /* Parallel Interface Port.
- */
- u_char res11[2];
- ushort cp_pipc;
- u_char res12[2];
- ushort cp_ptpr;
- uint cp_pbdir;
- uint cp_pbpar;
- u_char res13[2];
- ushort cp_pbodr;
- uint cp_pbdat;
-
- /* Port E - MPC87x/88x only.
- */
- uint cp_pedir;
- uint cp_pepar;
- uint cp_peso;
- uint cp_peodr;
- uint cp_pedat;
-
- /* Communications Processor Timing Register -
- Contains RMII Timing for the FECs on MPC87x/88x only.
- */
- uint cp_cptr;
-
- /* Serial Interface and Time Slot Assignment.
- */
- uint cp_simode;
- u_char cp_sigmr;
- u_char res15;
- u_char cp_sistr;
- u_char cp_sicmr;
- u_char res16[4];
- uint cp_sicr;
- uint cp_sirp;
- u_char res17[0xc];
-
- /* 256 bytes of MPC823 video controller RAM array.
- */
- u_char cp_vcram[0x100];
- u_char cp_siram[0x200];
-
- /* The fast ethernet controller is not really part of the CPM,
- * but it resides in the address space.
- * The LCD color map is also here.
- */
- union fec_lcd fl_un;
-#define cp_fec fl_un.fl_un_fec
-#define lcd_cmap fl_un.fl_un_cmap
- char res18[0xE00];
-
- /* The DUET family has a second FEC here */
- fec_t cp_fec2;
-#define cp_fec1 cp_fec /* consistency macro */
-
- /* Dual Ported RAM follows.
- * There are many different formats for this memory area
- * depending upon the devices used and options chosen.
- * Some processors don't have all of it populated.
- */
- u_char cp_dpmem[0x1C00]; /* BD / Data / ucode */
- u_char cp_dparam[0x400]; /* Parameter RAM */
-} cpm8xx_t;
-
-/* Internal memory map.
-*/
-typedef struct immap {
- sysconf8xx_t im_siu_conf; /* SIU Configuration */
- pcmconf8xx_t im_pcmcia; /* PCMCIA Configuration */
- memctl8xx_t im_memctl; /* Memory Controller */
- sit8xx_t im_sit; /* System integration timers */
- car8xx_t im_clkrst; /* Clocks and reset */
- sitk8xx_t im_sitk; /* Sys int timer keys */
- cark8xx_t im_clkrstk; /* Clocks and reset keys */
- vid823_t im_vid; /* Video (823 only) */
- lcd823_t im_lcd; /* LCD (823 only) */
- i2c8xx_t im_i2c; /* I2C control/status */
- sdma8xx_t im_sdma; /* SDMA control/status */
- cpic8xx_t im_cpic; /* CPM Interrupt Controller */
- iop8xx_t im_ioport; /* IO Port control/status */
- cpmtimer8xx_t im_cpmtimer; /* CPM timers */
- cpm8xx_t im_cpm; /* Communication processor */
-} immap_t;
-
-#endif /* __IMMAP_8XX__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/amigayle.h b/include/asm-ppc/amigayle.h
deleted file mode 100644
index 1fe0b87..0000000
--- a/include/asm-ppc/amigayle.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-m68k/amigayle.h>
diff --git a/include/asm-ppc/amipcmcia.h b/include/asm-ppc/amipcmcia.h
deleted file mode 100644
index 3f65f63..0000000
--- a/include/asm-ppc/amipcmcia.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-m68k/amipcmcia.h>
diff --git a/include/asm-ppc/bootinfo.h b/include/asm-ppc/bootinfo.h
deleted file mode 100644
index f6ed77a..0000000
--- a/include/asm-ppc/bootinfo.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Non-machine dependent bootinfo structure. Basic idea
- * borrowed from the m68k.
- *
- * Copyright (C) 1999 Cort Dougan <cort@ppc.kernel.org>
- */
-
-#ifdef __KERNEL__
-#ifndef _PPC_BOOTINFO_H
-#define _PPC_BOOTINFO_H
-
-#include <asm/page.h>
-
-struct bi_record {
- unsigned long tag; /* tag ID */
- unsigned long size; /* size of record (in bytes) */
- unsigned long data[0]; /* data */
-};
-
-#define BI_FIRST 0x1010 /* first record - marker */
-#define BI_LAST 0x1011 /* last record - marker */
-#define BI_CMD_LINE 0x1012
-#define BI_BOOTLOADER_ID 0x1013
-#define BI_INITRD 0x1014
-#define BI_SYSMAP 0x1015
-#define BI_MACHTYPE 0x1016
-#define BI_MEMSIZE 0x1017
-#define BI_BOARD_INFO 0x1018
-
-extern struct bi_record *find_bootinfo(void);
-extern void bootinfo_init(struct bi_record *rec);
-extern void bootinfo_append(unsigned long tag, unsigned long size, void * data);
-extern void parse_bootinfo(struct bi_record *rec);
-extern unsigned long boot_mem_size;
-
-static inline struct bi_record *
-bootinfo_addr(unsigned long offset)
-{
-
- return (struct bi_record *)_ALIGN((offset) + (1 << 20) - 1,
- (1 << 20));
-}
-
-
-#endif /* _PPC_BOOTINFO_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/bootx.h b/include/asm-ppc/bootx.h
deleted file mode 100644
index b0c51b4..0000000
--- a/include/asm-ppc/bootx.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * This file describes the structure passed from the BootX application
- * (for MacOS) when it is used to boot Linux.
- *
- * Written by Benjamin Herrenschmidt.
- */
-
-
-#ifndef __ASM_BOOTX_H__
-#define __ASM_BOOTX_H__
-
-#ifdef macintosh
-#include <Types.h>
-#include "linux_type_defs.h"
-#endif
-
-#ifdef macintosh
-/* All this requires PowerPC alignment */
-#pragma options align=power
-#endif
-
-/* On kernel entry:
- *
- * r3 = 0x426f6f58 ('BooX')
- * r4 = pointer to boot_infos
- * r5 = NULL
- *
- * Data and instruction translation disabled, interrupts
- * disabled, kernel loaded at physical 0x00000000 on PCI
- * machines (will be different on NuBus).
- */
-
-#define BOOT_INFO_VERSION 5
-#define BOOT_INFO_COMPATIBLE_VERSION 1
-
-/* Bit in the architecture flag mask. More to be defined in
- future versions. Note that either BOOT_ARCH_PCI or
- BOOT_ARCH_NUBUS is set. The other BOOT_ARCH_NUBUS_xxx are
- set additionally when BOOT_ARCH_NUBUS is set.
- */
-#define BOOT_ARCH_PCI 0x00000001UL
-#define BOOT_ARCH_NUBUS 0x00000002UL
-#define BOOT_ARCH_NUBUS_PDM 0x00000010UL
-#define BOOT_ARCH_NUBUS_PERFORMA 0x00000020UL
-#define BOOT_ARCH_NUBUS_POWERBOOK 0x00000040UL
-
-/* Maximum number of ranges in phys memory map */
-#define MAX_MEM_MAP_SIZE 26
-
-/* This is the format of an element in the physical memory map. Note that
- the map is optional and current BootX will only build it for pre-PCI
- machines */
-typedef struct boot_info_map_entry
-{
- __u32 physAddr; /* Physical starting address */
- __u32 size; /* Size in bytes */
-} boot_info_map_entry_t;
-
-
-/* Here are the boot informations that are passed to the bootstrap
- * Note that the kernel arguments and the device tree are appended
- * at the end of this structure. */
-typedef struct boot_infos
-{
- /* Version of this structure */
- __u32 version;
- /* backward compatible down to version: */
- __u32 compatible_version;
-
- /* NEW (vers. 2) this holds the current _logical_ base addr of
- the frame buffer (for use by early boot message) */
- __u8* logicalDisplayBase;
-
- /* NEW (vers. 4) Apple's machine identification */
- __u32 machineID;
-
- /* NEW (vers. 4) Detected hw architecture */
- __u32 architecture;
-
- /* The device tree (internal addresses relative to the beginning of the tree,
- * device tree offset relative to the beginning of this structure).
- * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this
- * field is 0.
- */
- __u32 deviceTreeOffset; /* Device tree offset */
- __u32 deviceTreeSize; /* Size of the device tree */
-
- /* Some infos about the current MacOS display */
- __u32 dispDeviceRect[4]; /* left,top,right,bottom */
- __u32 dispDeviceDepth; /* (8, 16 or 32) */
- __u8* dispDeviceBase; /* base address (physical) */
- __u32 dispDeviceRowBytes; /* rowbytes (in bytes) */
- __u32 dispDeviceColorsOffset; /* Colormap (8 bits only) or 0 (*) */
- /* Optional offset in the registry to the current
- * MacOS display. (Can be 0 when not detected) */
- __u32 dispDeviceRegEntryOffset;
-
- /* Optional pointer to boot ramdisk (offset from this structure) */
- __u32 ramDisk;
- __u32 ramDiskSize; /* size of ramdisk image */
-
- /* Kernel command line arguments (offset from this structure) */
- __u32 kernelParamsOffset;
-
- /* ALL BELOW NEW (vers. 4) */
-
- /* This defines the physical memory. Valid with BOOT_ARCH_NUBUS flag
- (non-PCI) only. On PCI, memory is contiguous and it's size is in the
- device-tree. */
- boot_info_map_entry_t
- physMemoryMap[MAX_MEM_MAP_SIZE]; /* Where the phys memory is */
- __u32 physMemoryMapSize; /* How many entries in map */
-
-
- /* The framebuffer size (optional, currently 0) */
- __u32 frameBufferSize; /* Represents a max size, can be 0. */
-
- /* NEW (vers. 5) */
-
- /* Total params size (args + colormap + device tree + ramdisk) */
- __u32 totalParamsSize;
-
-} boot_infos_t;
-
-/* (*) The format of the colormap is 256 * 3 * 2 bytes. Each color index is represented
- * by 3 short words containing a 16 bits (unsigned) color component.
- * Later versions may contain the gamma table for direct-color devices here.
- */
-#define BOOTX_COLORTABLE_SIZE (256UL*3UL*2UL)
-
-#ifdef macintosh
-#pragma options align=reset
-#endif
-
-#endif
diff --git a/include/asm-ppc/btext.h b/include/asm-ppc/btext.h
deleted file mode 100644
index ed36302..0000000
--- a/include/asm-ppc/btext.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Definitions for using the procedures in btext.c.
- *
- * Benjamin Herrenschmidt <benh@kernel.crashing.org>
- */
-#ifndef __PPC_BTEXT_H
-#define __PPC_BTEXT_H
-#ifdef __KERNEL__
-
-#include <asm/bootx.h>
-
-extern void btext_clearscreen(void);
-extern void btext_flushscreen(void);
-
-extern unsigned long disp_BAT[2];
-
-extern boot_infos_t disp_bi;
-extern int boot_text_mapped;
-
-extern void btext_init(boot_infos_t *bi);
-extern void btext_welcome(void);
-extern void btext_prepare_BAT(void);
-extern void btext_setup_display(int width, int height, int depth, int pitch,
- unsigned long address);
-extern void map_boot_text(void);
-extern void btext_update_display(unsigned long phys, int width, int height,
- int depth, int pitch);
-
-extern void btext_drawchar(char c);
-extern void btext_drawstring(const char *str);
-extern void btext_drawhex(unsigned long v);
-
-#endif /* __KERNEL__ */
-#endif /* __PPC_BTEXT_H */
diff --git a/include/asm-ppc/cpm1.h b/include/asm-ppc/cpm1.h
deleted file mode 100644
index 03035ac..0000000
--- a/include/asm-ppc/cpm1.h
+++ /dev/null
@@ -1,688 +0,0 @@
-/*
- * MPC8xx Communication Processor Module.
- * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
- *
- * This file contains structures and information for the communication
- * processor channels. Some CPM control and status is available
- * throught the MPC8xx internal memory map. See immap.h for details.
- * This file only contains what I need for the moment, not the total
- * CPM capabilities. I (or someone else) will add definitions as they
- * are needed. -- Dan
- *
- * On the MBX board, EPPC-Bug loads CPM microcode into the first 512
- * bytes of the DP RAM and relocates the I2C parameter area to the
- * IDMA1 space. The remaining DP RAM is available for buffer descriptors
- * or other use.
- */
-#ifndef __CPM1__
-#define __CPM1__
-
-#include <asm/8xx_immap.h>
-#include <asm/ptrace.h>
-
-/* CPM Command register.
-*/
-#define CPM_CR_RST ((ushort)0x8000)
-#define CPM_CR_OPCODE ((ushort)0x0f00)
-#define CPM_CR_CHAN ((ushort)0x00f0)
-#define CPM_CR_FLG ((ushort)0x0001)
-
-/* Some commands (there are more...later)
-*/
-#define CPM_CR_INIT_TRX ((ushort)0x0000)
-#define CPM_CR_INIT_RX ((ushort)0x0001)
-#define CPM_CR_INIT_TX ((ushort)0x0002)
-#define CPM_CR_HUNT_MODE ((ushort)0x0003)
-#define CPM_CR_STOP_TX ((ushort)0x0004)
-#define CPM_CR_GRA_STOP_TX ((ushort)0x0005)
-#define CPM_CR_RESTART_TX ((ushort)0x0006)
-#define CPM_CR_CLOSE_RX_BD ((ushort)0x0007)
-#define CPM_CR_SET_GADDR ((ushort)0x0008)
-#define CPM_CR_SET_TIMER CPM_CR_SET_GADDR
-
-/* Channel numbers.
-*/
-#define CPM_CR_CH_SCC1 ((ushort)0x0000)
-#define CPM_CR_CH_I2C ((ushort)0x0001) /* I2C and IDMA1 */
-#define CPM_CR_CH_SCC2 ((ushort)0x0004)
-#define CPM_CR_CH_SPI ((ushort)0x0005) /* SPI / IDMA2 / Timers */
-#define CPM_CR_CH_TIMER CPM_CR_CH_SPI
-#define CPM_CR_CH_SCC3 ((ushort)0x0008)
-#define CPM_CR_CH_SMC1 ((ushort)0x0009) /* SMC1 / DSP1 */
-#define CPM_CR_CH_SCC4 ((ushort)0x000c)
-#define CPM_CR_CH_SMC2 ((ushort)0x000d) /* SMC2 / DSP2 */
-
-#define mk_cr_cmd(CH, CMD) ((CMD << 8) | (CH << 4))
-
-/* The dual ported RAM is multi-functional. Some areas can be (and are
- * being) used for microcode. There is an area that can only be used
- * as data ram for buffer descriptors, which is all we use right now.
- * Currently the first 512 and last 256 bytes are used for microcode.
- */
-#define CPM_DATAONLY_BASE ((uint)0x0800)
-#define CPM_DATAONLY_SIZE ((uint)0x0700)
-#define CPM_DP_NOSPACE ((uint)0x7fffffff)
-
-/* Export the base address of the communication processor registers
- * and dual port ram.
- */
-extern cpm8xx_t *cpmp; /* Pointer to comm processor */
-extern unsigned long cpm_dpalloc(uint size, uint align);
-extern int cpm_dpfree(unsigned long offset);
-extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
-extern void cpm_dpdump(void);
-extern void *cpm_dpram_addr(unsigned long offset);
-extern uint cpm_dpram_phys(u8 *addr);
-extern void cpm_setbrg(uint brg, uint rate);
-
-extern void cpm_load_patch(volatile immap_t *immr);
-
-/* Buffer descriptors used by many of the CPM protocols.
-*/
-typedef struct cpm_buf_desc {
- ushort cbd_sc; /* Status and Control */
- ushort cbd_datlen; /* Data length in buffer */
- uint cbd_bufaddr; /* Buffer address in host memory */
-} cbd_t;
-
-#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
-#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */
-#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */
-#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
-#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */
-#define BD_SC_TC ((ushort)0x0400) /* Transmit CRC */
-#define BD_SC_CM ((ushort)0x0200) /* Continous mode */
-#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */
-#define BD_SC_P ((ushort)0x0100) /* xmt preamble */
-#define BD_SC_BR ((ushort)0x0020) /* Break received */
-#define BD_SC_FR ((ushort)0x0010) /* Framing error */
-#define BD_SC_PR ((ushort)0x0008) /* Parity error */
-#define BD_SC_NAK ((ushort)0x0004) /* NAK - did not respond */
-#define BD_SC_OV ((ushort)0x0002) /* Overrun */
-#define BD_SC_UN ((ushort)0x0002) /* Underrun */
-#define BD_SC_CD ((ushort)0x0001) /* ?? */
-#define BD_SC_CL ((ushort)0x0001) /* Collision */
-
-/* Parameter RAM offsets.
-*/
-#define PROFF_SCC1 ((uint)0x0000)
-#define PROFF_IIC ((uint)0x0080)
-#define PROFF_SCC2 ((uint)0x0100)
-#define PROFF_SPI ((uint)0x0180)
-#define PROFF_SCC3 ((uint)0x0200)
-#define PROFF_SMC1 ((uint)0x0280)
-#define PROFF_SCC4 ((uint)0x0300)
-#define PROFF_SMC2 ((uint)0x0380)
-
-/* Define enough so I can at least use the serial port as a UART.
- * The MBX uses SMC1 as the host serial port.
- */
-typedef struct smc_uart {
- ushort smc_rbase; /* Rx Buffer descriptor base address */
- ushort smc_tbase; /* Tx Buffer descriptor base address */
- u_char smc_rfcr; /* Rx function code */
- u_char smc_tfcr; /* Tx function code */
- ushort smc_mrblr; /* Max receive buffer length */
- uint smc_rstate; /* Internal */
- uint smc_idp; /* Internal */
- ushort smc_rbptr; /* Internal */
- ushort smc_ibc; /* Internal */
- uint smc_rxtmp; /* Internal */
- uint smc_tstate; /* Internal */
- uint smc_tdp; /* Internal */
- ushort smc_tbptr; /* Internal */
- ushort smc_tbc; /* Internal */
- uint smc_txtmp; /* Internal */
- ushort smc_maxidl; /* Maximum idle characters */
- ushort smc_tmpidl; /* Temporary idle counter */
- ushort smc_brklen; /* Last received break length */
- ushort smc_brkec; /* rcv'd break condition counter */
- ushort smc_brkcr; /* xmt break count register */
- ushort smc_rmask; /* Temporary bit mask */
- char res1[8]; /* Reserved */
- ushort smc_rpbase; /* Relocation pointer */
-} smc_uart_t;
-
-/* Function code bits.
-*/
-#define SMC_EB ((u_char)0x10) /* Set big endian byte order */
-
-/* SMC uart mode register.
-*/
-#define SMCMR_REN ((ushort)0x0001)
-#define SMCMR_TEN ((ushort)0x0002)
-#define SMCMR_DM ((ushort)0x000c)
-#define SMCMR_SM_GCI ((ushort)0x0000)
-#define SMCMR_SM_UART ((ushort)0x0020)
-#define SMCMR_SM_TRANS ((ushort)0x0030)
-#define SMCMR_SM_MASK ((ushort)0x0030)
-#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */
-#define SMCMR_REVD SMCMR_PM_EVEN
-#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */
-#define SMCMR_BS SMCMR_PEN
-#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */
-#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */
-#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK)
-
-/* SMC2 as Centronics parallel printer. It is half duplex, in that
- * it can only receive or transmit. The parameter ram values for
- * each direction are either unique or properly overlap, so we can
- * include them in one structure.
- */
-typedef struct smc_centronics {
- ushort scent_rbase;
- ushort scent_tbase;
- u_char scent_cfcr;
- u_char scent_smask;
- ushort scent_mrblr;
- uint scent_rstate;
- uint scent_r_ptr;
- ushort scent_rbptr;
- ushort scent_r_cnt;
- uint scent_rtemp;
- uint scent_tstate;
- uint scent_t_ptr;
- ushort scent_tbptr;
- ushort scent_t_cnt;
- uint scent_ttemp;
- ushort scent_max_sl;
- ushort scent_sl_cnt;
- ushort scent_character1;
- ushort scent_character2;
- ushort scent_character3;
- ushort scent_character4;
- ushort scent_character5;
- ushort scent_character6;
- ushort scent_character7;
- ushort scent_character8;
- ushort scent_rccm;
- ushort scent_rccr;
-} smc_cent_t;
-
-/* Centronics Status Mask Register.
-*/
-#define SMC_CENT_F ((u_char)0x08)
-#define SMC_CENT_PE ((u_char)0x04)
-#define SMC_CENT_S ((u_char)0x02)
-
-/* SMC Event and Mask register.
-*/
-#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */
-#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */
-#define SMCM_TXE ((unsigned char)0x10) /* When in Transparent Mode */
-#define SMCM_BSY ((unsigned char)0x04)
-#define SMCM_TX ((unsigned char)0x02)
-#define SMCM_RX ((unsigned char)0x01)
-
-/* Baud rate generators.
-*/
-#define CPM_BRG_RST ((uint)0x00020000)
-#define CPM_BRG_EN ((uint)0x00010000)
-#define CPM_BRG_EXTC_INT ((uint)0x00000000)
-#define CPM_BRG_EXTC_CLK2 ((uint)0x00004000)
-#define CPM_BRG_EXTC_CLK6 ((uint)0x00008000)
-#define CPM_BRG_ATB ((uint)0x00002000)
-#define CPM_BRG_CD_MASK ((uint)0x00001ffe)
-#define CPM_BRG_DIV16 ((uint)0x00000001)
-
-/* SI Clock Route Register
-*/
-#define SICR_RCLK_SCC1_BRG1 ((uint)0x00000000)
-#define SICR_TCLK_SCC1_BRG1 ((uint)0x00000000)
-#define SICR_RCLK_SCC2_BRG2 ((uint)0x00000800)
-#define SICR_TCLK_SCC2_BRG2 ((uint)0x00000100)
-#define SICR_RCLK_SCC3_BRG3 ((uint)0x00100000)
-#define SICR_TCLK_SCC3_BRG3 ((uint)0x00020000)
-#define SICR_RCLK_SCC4_BRG4 ((uint)0x18000000)
-#define SICR_TCLK_SCC4_BRG4 ((uint)0x03000000)
-
-/* SCCs.
-*/
-#define SCC_GSMRH_IRP ((uint)0x00040000)
-#define SCC_GSMRH_GDE ((uint)0x00010000)
-#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000)
-#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000)
-#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000)
-#define SCC_GSMRH_REVD ((uint)0x00002000)
-#define SCC_GSMRH_TRX ((uint)0x00001000)
-#define SCC_GSMRH_TTX ((uint)0x00000800)
-#define SCC_GSMRH_CDP ((uint)0x00000400)
-#define SCC_GSMRH_CTSP ((uint)0x00000200)
-#define SCC_GSMRH_CDS ((uint)0x00000100)
-#define SCC_GSMRH_CTSS ((uint)0x00000080)
-#define SCC_GSMRH_TFL ((uint)0x00000040)
-#define SCC_GSMRH_RFW ((uint)0x00000020)
-#define SCC_GSMRH_TXSY ((uint)0x00000010)
-#define SCC_GSMRH_SYNL16 ((uint)0x0000000c)
-#define SCC_GSMRH_SYNL8 ((uint)0x00000008)
-#define SCC_GSMRH_SYNL4 ((uint)0x00000004)
-#define SCC_GSMRH_RTSM ((uint)0x00000002)
-#define SCC_GSMRH_RSYN ((uint)0x00000001)
-
-#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */
-#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000)
-#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000)
-#define SCC_GSMRL_EDGE_POS ((uint)0x20000000)
-#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000)
-#define SCC_GSMRL_TCI ((uint)0x10000000)
-#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000)
-#define SCC_GSMRL_TSNC_4 ((uint)0x08000000)
-#define SCC_GSMRL_TSNC_14 ((uint)0x04000000)
-#define SCC_GSMRL_TSNC_INF ((uint)0x00000000)
-#define SCC_GSMRL_RINV ((uint)0x02000000)
-#define SCC_GSMRL_TINV ((uint)0x01000000)
-#define SCC_GSMRL_TPL_128 ((uint)0x00c00000)
-#define SCC_GSMRL_TPL_64 ((uint)0x00a00000)
-#define SCC_GSMRL_TPL_48 ((uint)0x00800000)
-#define SCC_GSMRL_TPL_32 ((uint)0x00600000)
-#define SCC_GSMRL_TPL_16 ((uint)0x00400000)
-#define SCC_GSMRL_TPL_8 ((uint)0x00200000)
-#define SCC_GSMRL_TPL_NONE ((uint)0x00000000)
-#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000)
-#define SCC_GSMRL_TPP_01 ((uint)0x00100000)
-#define SCC_GSMRL_TPP_10 ((uint)0x00080000)
-#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000)
-#define SCC_GSMRL_TEND ((uint)0x00040000)
-#define SCC_GSMRL_TDCR_32 ((uint)0x00030000)
-#define SCC_GSMRL_TDCR_16 ((uint)0x00020000)
-#define SCC_GSMRL_TDCR_8 ((uint)0x00010000)
-#define SCC_GSMRL_TDCR_1 ((uint)0x00000000)
-#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000)
-#define SCC_GSMRL_RDCR_16 ((uint)0x00008000)
-#define SCC_GSMRL_RDCR_8 ((uint)0x00004000)
-#define SCC_GSMRL_RDCR_1 ((uint)0x00000000)
-#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000)
-#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000)
-#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000)
-#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800)
-#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000)
-#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600)
-#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400)
-#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200)
-#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100)
-#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000)
-#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */
-#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080)
-#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040)
-#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000)
-#define SCC_GSMRL_ENR ((uint)0x00000020)
-#define SCC_GSMRL_ENT ((uint)0x00000010)
-#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c)
-#define SCC_GSMRL_MODE_QMC ((uint)0x0000000a)
-#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009)
-#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008)
-#define SCC_GSMRL_MODE_V14 ((uint)0x00000007)
-#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006)
-#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005)
-#define SCC_GSMRL_MODE_UART ((uint)0x00000004)
-#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003)
-#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002)
-#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000)
-
-#define SCC_TODR_TOD ((ushort)0x8000)
-
-/* SCC Event and Mask register.
-*/
-#define SCCM_TXE ((unsigned char)0x10)
-#define SCCM_BSY ((unsigned char)0x04)
-#define SCCM_TX ((unsigned char)0x02)
-#define SCCM_RX ((unsigned char)0x01)
-
-typedef struct scc_param {
- ushort scc_rbase; /* Rx Buffer descriptor base address */
- ushort scc_tbase; /* Tx Buffer descriptor base address */
- u_char scc_rfcr; /* Rx function code */
- u_char scc_tfcr; /* Tx function code */
- ushort scc_mrblr; /* Max receive buffer length */
- uint scc_rstate; /* Internal */
- uint scc_idp; /* Internal */
- ushort scc_rbptr; /* Internal */
- ushort scc_ibc; /* Internal */
- uint scc_rxtmp; /* Internal */
- uint scc_tstate; /* Internal */
- uint scc_tdp; /* Internal */
- ushort scc_tbptr; /* Internal */
- ushort scc_tbc; /* Internal */
- uint scc_txtmp; /* Internal */
- uint scc_rcrc; /* Internal */
- uint scc_tcrc; /* Internal */
-} sccp_t;
-
-/* Function code bits.
-*/
-#define SCC_EB ((u_char)0x10) /* Set big endian byte order */
-
-/* CPM Ethernet through SCCx.
- */
-typedef struct scc_enet {
- sccp_t sen_genscc;
- uint sen_cpres; /* Preset CRC */
- uint sen_cmask; /* Constant mask for CRC */
- uint sen_crcec; /* CRC Error counter */
- uint sen_alec; /* alignment error counter */
- uint sen_disfc; /* discard frame counter */
- ushort sen_pads; /* Tx short frame pad character */
- ushort sen_retlim; /* Retry limit threshold */
- ushort sen_retcnt; /* Retry limit counter */
- ushort sen_maxflr; /* maximum frame length register */
- ushort sen_minflr; /* minimum frame length register */
- ushort sen_maxd1; /* maximum DMA1 length */
- ushort sen_maxd2; /* maximum DMA2 length */
- ushort sen_maxd; /* Rx max DMA */
- ushort sen_dmacnt; /* Rx DMA counter */
- ushort sen_maxb; /* Max BD byte count */
- ushort sen_gaddr1; /* Group address filter */
- ushort sen_gaddr2;
- ushort sen_gaddr3;
- ushort sen_gaddr4;
- uint sen_tbuf0data0; /* Save area 0 - current frame */
- uint sen_tbuf0data1; /* Save area 1 - current frame */
- uint sen_tbuf0rba; /* Internal */
- uint sen_tbuf0crc; /* Internal */
- ushort sen_tbuf0bcnt; /* Internal */
- ushort sen_paddrh; /* physical address (MSB) */
- ushort sen_paddrm;
- ushort sen_paddrl; /* physical address (LSB) */
- ushort sen_pper; /* persistence */
- ushort sen_rfbdptr; /* Rx first BD pointer */
- ushort sen_tfbdptr; /* Tx first BD pointer */
- ushort sen_tlbdptr; /* Tx last BD pointer */
- uint sen_tbuf1data0; /* Save area 0 - current frame */
- uint sen_tbuf1data1; /* Save area 1 - current frame */
- uint sen_tbuf1rba; /* Internal */
- uint sen_tbuf1crc; /* Internal */
- ushort sen_tbuf1bcnt; /* Internal */
- ushort sen_txlen; /* Tx Frame length counter */
- ushort sen_iaddr1; /* Individual address filter */
- ushort sen_iaddr2;
- ushort sen_iaddr3;
- ushort sen_iaddr4;
- ushort sen_boffcnt; /* Backoff counter */
-
- /* NOTE: Some versions of the manual have the following items
- * incorrectly documented. Below is the proper order.
- */
- ushort sen_taddrh; /* temp address (MSB) */
- ushort sen_taddrm;
- ushort sen_taddrl; /* temp address (LSB) */
-} scc_enet_t;
-
-/* SCC Event register as used by Ethernet.
-*/
-#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */
-#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */
-#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */
-#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */
-#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */
-#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */
-
-/* SCC Mode Register (PMSR) as used by Ethernet.
-*/
-#define SCC_PSMR_HBC ((ushort)0x8000) /* Enable heartbeat */
-#define SCC_PSMR_FC ((ushort)0x4000) /* Force collision */
-#define SCC_PSMR_RSH ((ushort)0x2000) /* Receive short frames */
-#define SCC_PSMR_IAM ((ushort)0x1000) /* Check individual hash */
-#define SCC_PSMR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */
-#define SCC_PSMR_PRO ((ushort)0x0200) /* Promiscuous mode */
-#define SCC_PSMR_BRO ((ushort)0x0100) /* Catch broadcast pkts */
-#define SCC_PSMR_SBT ((ushort)0x0080) /* Special backoff timer */
-#define SCC_PSMR_LPB ((ushort)0x0040) /* Set Loopback mode */
-#define SCC_PSMR_SIP ((ushort)0x0020) /* Sample Input Pins */
-#define SCC_PSMR_LCW ((ushort)0x0010) /* Late collision window */
-#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */
-#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */
-
-/* Buffer descriptor control/status used by Ethernet receive.
-*/
-#define BD_ENET_RX_EMPTY ((ushort)0x8000)
-#define BD_ENET_RX_WRAP ((ushort)0x2000)
-#define BD_ENET_RX_INTR ((ushort)0x1000)
-#define BD_ENET_RX_LAST ((ushort)0x0800)
-#define BD_ENET_RX_FIRST ((ushort)0x0400)
-#define BD_ENET_RX_MISS ((ushort)0x0100)
-#define BD_ENET_RX_LG ((ushort)0x0020)
-#define BD_ENET_RX_NO ((ushort)0x0010)
-#define BD_ENET_RX_SH ((ushort)0x0008)
-#define BD_ENET_RX_CR ((ushort)0x0004)
-#define BD_ENET_RX_OV ((ushort)0x0002)
-#define BD_ENET_RX_CL ((ushort)0x0001)
-#define BD_ENET_RX_BC ((ushort)0x0080) /* DA is Broadcast */
-#define BD_ENET_RX_MC ((ushort)0x0040) /* DA is Multicast */
-#define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */
-
-/* Buffer descriptor control/status used by Ethernet transmit.
-*/
-#define BD_ENET_TX_READY ((ushort)0x8000)
-#define BD_ENET_TX_PAD ((ushort)0x4000)
-#define BD_ENET_TX_WRAP ((ushort)0x2000)
-#define BD_ENET_TX_INTR ((ushort)0x1000)
-#define BD_ENET_TX_LAST ((ushort)0x0800)
-#define BD_ENET_TX_TC ((ushort)0x0400)
-#define BD_ENET_TX_DEF ((ushort)0x0200)
-#define BD_ENET_TX_HB ((ushort)0x0100)
-#define BD_ENET_TX_LC ((ushort)0x0080)
-#define BD_ENET_TX_RL ((ushort)0x0040)
-#define BD_ENET_TX_RCMASK ((ushort)0x003c)
-#define BD_ENET_TX_UN ((ushort)0x0002)
-#define BD_ENET_TX_CSL ((ushort)0x0001)
-#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */
-
-/* SCC as UART
-*/
-typedef struct scc_uart {
- sccp_t scc_genscc;
- char res1[8]; /* Reserved */
- ushort scc_maxidl; /* Maximum idle chars */
- ushort scc_idlc; /* temp idle counter */
- ushort scc_brkcr; /* Break count register */
- ushort scc_parec; /* receive parity error counter */
- ushort scc_frmec; /* receive framing error counter */
- ushort scc_nosec; /* receive noise counter */
- ushort scc_brkec; /* receive break condition counter */
- ushort scc_brkln; /* last received break length */
- ushort scc_uaddr1; /* UART address character 1 */
- ushort scc_uaddr2; /* UART address character 2 */
- ushort scc_rtemp; /* Temp storage */
- ushort scc_toseq; /* Transmit out of sequence char */
- ushort scc_char1; /* control character 1 */
- ushort scc_char2; /* control character 2 */
- ushort scc_char3; /* control character 3 */
- ushort scc_char4; /* control character 4 */
- ushort scc_char5; /* control character 5 */
- ushort scc_char6; /* control character 6 */
- ushort scc_char7; /* control character 7 */
- ushort scc_char8; /* control character 8 */
- ushort scc_rccm; /* receive control character mask */
- ushort scc_rccr; /* receive control character register */
- ushort scc_rlbc; /* receive last break character */
-} scc_uart_t;
-
-/* SCC Event and Mask registers when it is used as a UART.
-*/
-#define UART_SCCM_GLR ((ushort)0x1000)
-#define UART_SCCM_GLT ((ushort)0x0800)
-#define UART_SCCM_AB ((ushort)0x0200)
-#define UART_SCCM_IDL ((ushort)0x0100)
-#define UART_SCCM_GRA ((ushort)0x0080)
-#define UART_SCCM_BRKE ((ushort)0x0040)
-#define UART_SCCM_BRKS ((ushort)0x0020)
-#define UART_SCCM_CCR ((ushort)0x0008)
-#define UART_SCCM_BSY ((ushort)0x0004)
-#define UART_SCCM_TX ((ushort)0x0002)
-#define UART_SCCM_RX ((ushort)0x0001)
-
-/* The SCC PMSR when used as a UART.
-*/
-#define SCU_PSMR_FLC ((ushort)0x8000)
-#define SCU_PSMR_SL ((ushort)0x4000)
-#define SCU_PSMR_CL ((ushort)0x3000)
-#define SCU_PSMR_UM ((ushort)0x0c00)
-#define SCU_PSMR_FRZ ((ushort)0x0200)
-#define SCU_PSMR_RZS ((ushort)0x0100)
-#define SCU_PSMR_SYN ((ushort)0x0080)
-#define SCU_PSMR_DRT ((ushort)0x0040)
-#define SCU_PSMR_PEN ((ushort)0x0010)
-#define SCU_PSMR_RPM ((ushort)0x000c)
-#define SCU_PSMR_REVP ((ushort)0x0008)
-#define SCU_PSMR_TPM ((ushort)0x0003)
-#define SCU_PSMR_TEVP ((ushort)0x0002)
-
-/* CPM Transparent mode SCC.
- */
-typedef struct scc_trans {
- sccp_t st_genscc;
- uint st_cpres; /* Preset CRC */
- uint st_cmask; /* Constant mask for CRC */
-} scc_trans_t;
-
-#define BD_SCC_TX_LAST ((ushort)0x0800)
-
-/* IIC parameter RAM.
-*/
-typedef struct iic {
- ushort iic_rbase; /* Rx Buffer descriptor base address */
- ushort iic_tbase; /* Tx Buffer descriptor base address */
- u_char iic_rfcr; /* Rx function code */
- u_char iic_tfcr; /* Tx function code */
- ushort iic_mrblr; /* Max receive buffer length */
- uint iic_rstate; /* Internal */
- uint iic_rdp; /* Internal */
- ushort iic_rbptr; /* Internal */
- ushort iic_rbc; /* Internal */
- uint iic_rxtmp; /* Internal */
- uint iic_tstate; /* Internal */
- uint iic_tdp; /* Internal */
- ushort iic_tbptr; /* Internal */
- ushort iic_tbc; /* Internal */
- uint iic_txtmp; /* Internal */
- char res1[4]; /* Reserved */
- ushort iic_rpbase; /* Relocation pointer */
- char res2[2]; /* Reserved */
-} iic_t;
-
-#define BD_IIC_START ((ushort)0x0400)
-
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uint spi_rstate; /* Internal */
- uint spi_rdp; /* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc; /* Internal */
- uint spi_rxtmp; /* Internal */
- uint spi_tstate; /* Internal */
- uint spi_tdp; /* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc; /* Internal */
- uint spi_txtmp; /* Internal */
- uint spi_res;
- ushort spi_rpbase; /* Relocation pointer */
- ushort spi_res2;
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */
-#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */
-#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */
-#define SPMODE_EN ((ushort)0x0100) /* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */
-#define SPMODE_LEN4 ((ushort)0x0030) /* 4 bits per char */
-#define SPMODE_LEN8 ((ushort)0x0070) /* 8 bits per char */
-#define SPMODE_LEN16 ((ushort)0x00f0) /* 16 bits per char */
-#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */
-
-/* SPIE fields */
-#define SPIE_MME 0x20
-#define SPIE_TXE 0x10
-#define SPIE_BSY 0x04
-#define SPIE_TXB 0x02
-#define SPIE_RXB 0x01
-
-/*
- * RISC Controller Configuration Register definitons
- */
-#define RCCR_TIME 0x8000 /* RISC Timer Enable */
-#define RCCR_TIMEP(t) (((t) & 0x3F)<<8) /* RISC Timer Period */
-#define RCCR_TIME_MASK 0x00FF /* not RISC Timer related bits */
-
-/* RISC Timer Parameter RAM offset */
-#define PROFF_RTMR ((uint)0x01B0)
-
-typedef struct risc_timer_pram {
- unsigned short tm_base; /* RISC Timer Table Base Address */
- unsigned short tm_ptr; /* RISC Timer Table Pointer (internal) */
- unsigned short r_tmr; /* RISC Timer Mode Register */
- unsigned short r_tmv; /* RISC Timer Valid Register */
- unsigned long tm_cmd; /* RISC Timer Command Register */
- unsigned long tm_cnt; /* RISC Timer Internal Count */
-} rt_pram_t;
-
-/* Bits in RISC Timer Command Register */
-#define TM_CMD_VALID 0x80000000 /* Valid - Enables the timer */
-#define TM_CMD_RESTART 0x40000000 /* Restart - for automatic restart */
-#define TM_CMD_PWM 0x20000000 /* Run in Pulse Width Modulation Mode */
-#define TM_CMD_NUM(n) (((n)&0xF)<<16) /* Timer Number */
-#define TM_CMD_PERIOD(p) ((p)&0xFFFF) /* Timer Period */
-
-/* CPM interrupts. There are nearly 32 interrupts generated by CPM
- * channels or devices. All of these are presented to the PPC core
- * as a single interrupt. The CPM interrupt handler dispatches its
- * own handlers, in a similar fashion to the PPC core handler. We
- * use the table as defined in the manuals (i.e. no special high
- * priority and SCC1 == SCCa, etc...).
- */
-#define CPMVEC_NR 32
-#define CPMVEC_PIO_PC15 ((ushort)0x1f)
-#define CPMVEC_SCC1 ((ushort)0x1e)
-#define CPMVEC_SCC2 ((ushort)0x1d)
-#define CPMVEC_SCC3 ((ushort)0x1c)
-#define CPMVEC_SCC4 ((ushort)0x1b)
-#define CPMVEC_PIO_PC14 ((ushort)0x1a)
-#define CPMVEC_TIMER1 ((ushort)0x19)
-#define CPMVEC_PIO_PC13 ((ushort)0x18)
-#define CPMVEC_PIO_PC12 ((ushort)0x17)
-#define CPMVEC_SDMA_CB_ERR ((ushort)0x16)
-#define CPMVEC_IDMA1 ((ushort)0x15)
-#define CPMVEC_IDMA2 ((ushort)0x14)
-#define CPMVEC_TIMER2 ((ushort)0x12)
-#define CPMVEC_RISCTIMER ((ushort)0x11)
-#define CPMVEC_I2C ((ushort)0x10)
-#define CPMVEC_PIO_PC11 ((ushort)0x0f)
-#define CPMVEC_PIO_PC10 ((ushort)0x0e)
-#define CPMVEC_TIMER3 ((ushort)0x0c)
-#define CPMVEC_PIO_PC9 ((ushort)0x0b)
-#define CPMVEC_PIO_PC8 ((ushort)0x0a)
-#define CPMVEC_PIO_PC7 ((ushort)0x09)
-#define CPMVEC_TIMER4 ((ushort)0x07)
-#define CPMVEC_PIO_PC6 ((ushort)0x06)
-#define CPMVEC_SPI ((ushort)0x05)
-#define CPMVEC_SMC1 ((ushort)0x04)
-#define CPMVEC_SMC2 ((ushort)0x03)
-#define CPMVEC_PIO_PC5 ((ushort)0x02)
-#define CPMVEC_PIO_PC4 ((ushort)0x01)
-#define CPMVEC_ERROR ((ushort)0x00)
-
-/* CPM interrupt configuration vector.
-*/
-#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */
-#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */
-#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */
-#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */
-#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */
-#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */
-#define CICR_IEN ((uint)0x00000080) /* Int. enable */
-#define CICR_SPS ((uint)0x00000001) /* SCC Spread */
-
-extern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id);
-extern void cpm_free_handler(int vec);
-
-#endif /* __CPM1__ */
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
deleted file mode 100644
index 4c53822..0000000
--- a/include/asm-ppc/cpm2.h
+++ /dev/null
@@ -1,1248 +0,0 @@
-/*
- * Communication Processor Module v2.
- *
- * This file contains structures and information for the communication
- * processor channels found in the dual port RAM or parameter RAM.
- * All CPM control and status is available through the CPM2 internal
- * memory map. See immap_cpm2.h for details.
- */
-#ifdef __KERNEL__
-#ifndef __CPM2__
-#define __CPM2__
-
-#include <asm/immap_cpm2.h>
-
-/* CPM Command register.
-*/
-#define CPM_CR_RST ((uint)0x80000000)
-#define CPM_CR_PAGE ((uint)0x7c000000)
-#define CPM_CR_SBLOCK ((uint)0x03e00000)
-#define CPM_CR_FLG ((uint)0x00010000)
-#define CPM_CR_MCN ((uint)0x00003fc0)
-#define CPM_CR_OPCODE ((uint)0x0000000f)
-
-/* Device sub-block and page codes.
-*/
-#define CPM_CR_SCC1_SBLOCK (0x04)
-#define CPM_CR_SCC2_SBLOCK (0x05)
-#define CPM_CR_SCC3_SBLOCK (0x06)
-#define CPM_CR_SCC4_SBLOCK (0x07)
-#define CPM_CR_SMC1_SBLOCK (0x08)
-#define CPM_CR_SMC2_SBLOCK (0x09)
-#define CPM_CR_SPI_SBLOCK (0x0a)
-#define CPM_CR_I2C_SBLOCK (0x0b)
-#define CPM_CR_TIMER_SBLOCK (0x0f)
-#define CPM_CR_RAND_SBLOCK (0x0e)
-#define CPM_CR_FCC1_SBLOCK (0x10)
-#define CPM_CR_FCC2_SBLOCK (0x11)
-#define CPM_CR_FCC3_SBLOCK (0x12)
-#define CPM_CR_IDMA1_SBLOCK (0x14)
-#define CPM_CR_IDMA2_SBLOCK (0x15)
-#define CPM_CR_IDMA3_SBLOCK (0x16)
-#define CPM_CR_IDMA4_SBLOCK (0x17)
-#define CPM_CR_MCC1_SBLOCK (0x1c)
-
-#define CPM_CR_FCC_SBLOCK(x) (x + 0x10)
-
-#define CPM_CR_SCC1_PAGE (0x00)
-#define CPM_CR_SCC2_PAGE (0x01)
-#define CPM_CR_SCC3_PAGE (0x02)
-#define CPM_CR_SCC4_PAGE (0x03)
-#define CPM_CR_SMC1_PAGE (0x07)
-#define CPM_CR_SMC2_PAGE (0x08)
-#define CPM_CR_SPI_PAGE (0x09)
-#define CPM_CR_I2C_PAGE (0x0a)
-#define CPM_CR_TIMER_PAGE (0x0a)
-#define CPM_CR_RAND_PAGE (0x0a)
-#define CPM_CR_FCC1_PAGE (0x04)
-#define CPM_CR_FCC2_PAGE (0x05)
-#define CPM_CR_FCC3_PAGE (0x06)
-#define CPM_CR_IDMA1_PAGE (0x07)
-#define CPM_CR_IDMA2_PAGE (0x08)
-#define CPM_CR_IDMA3_PAGE (0x09)
-#define CPM_CR_IDMA4_PAGE (0x0a)
-#define CPM_CR_MCC1_PAGE (0x07)
-#define CPM_CR_MCC2_PAGE (0x08)
-
-#define CPM_CR_FCC_PAGE(x) (x + 0x04)
-
-/* Some opcodes (there are more...later)
-*/
-#define CPM_CR_INIT_TRX ((ushort)0x0000)
-#define CPM_CR_INIT_RX ((ushort)0x0001)
-#define CPM_CR_INIT_TX ((ushort)0x0002)
-#define CPM_CR_HUNT_MODE ((ushort)0x0003)
-#define CPM_CR_STOP_TX ((ushort)0x0004)
-#define CPM_CR_GRA_STOP_TX ((ushort)0x0005)
-#define CPM_CR_RESTART_TX ((ushort)0x0006)
-#define CPM_CR_SET_GADDR ((ushort)0x0008)
-#define CPM_CR_START_IDMA ((ushort)0x0009)
-#define CPM_CR_STOP_IDMA ((ushort)0x000b)
-
-#define mk_cr_cmd(PG, SBC, MCN, OP) \
- ((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
-
-/* Dual Port RAM addresses. The first 16K is available for almost
- * any CPM use, so we put the BDs there. The first 128 bytes are
- * used for SMC1 and SMC2 parameter RAM, so we start allocating
- * BDs above that. All of this must change when we start
- * downloading RAM microcode.
- */
-#define CPM_DATAONLY_BASE ((uint)128)
-#define CPM_DP_NOSPACE ((uint)0x7fffffff)
-#if defined(CONFIG_8272)
-#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_FCC_SPECIAL_BASE ((uint)0x00009000)
-#else
-#define CPM_DATAONLY_SIZE ((uint)(16 * 1024) - CPM_DATAONLY_BASE)
-#define CPM_FCC_SPECIAL_BASE ((uint)0x0000b000)
-#endif
-
-/* The number of pages of host memory we allocate for CPM. This is
- * done early in kernel initialization to get physically contiguous
- * pages.
- */
-#define NUM_CPM_HOST_PAGES 2
-
-/* Export the base address of the communication processor registers
- * and dual port ram.
- */
-extern cpm_cpm2_t *cpmp; /* Pointer to comm processor */
-
-extern unsigned long cpm_dpalloc(uint size, uint align);
-extern int cpm_dpfree(unsigned long offset);
-extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
-extern void cpm_dpdump(void);
-extern void *cpm_dpram_addr(unsigned long offset);
-extern void cpm_setbrg(uint brg, uint rate);
-extern void cpm2_fastbrg(uint brg, uint rate, int div16);
-extern void cpm2_reset(void);
-
-
-/* Buffer descriptors used by many of the CPM protocols.
-*/
-typedef struct cpm_buf_desc {
- ushort cbd_sc; /* Status and Control */
- ushort cbd_datlen; /* Data length in buffer */
- uint cbd_bufaddr; /* Buffer address in host memory */
-} cbd_t;
-
-#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */
-#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */
-#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */
-#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */
-#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */
-#define BD_SC_CM ((ushort)0x0200) /* Continous mode */
-#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */
-#define BD_SC_P ((ushort)0x0100) /* xmt preamble */
-#define BD_SC_BR ((ushort)0x0020) /* Break received */
-#define BD_SC_FR ((ushort)0x0010) /* Framing error */
-#define BD_SC_PR ((ushort)0x0008) /* Parity error */
-#define BD_SC_OV ((ushort)0x0002) /* Overrun */
-#define BD_SC_CD ((ushort)0x0001) /* ?? */
-
-/* Function code bits, usually generic to devices.
-*/
-#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */
-#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */
-#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */
-#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */
-#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */
-
-/* Parameter RAM offsets from the base.
-*/
-#define PROFF_SCC1 ((uint)0x8000)
-#define PROFF_SCC2 ((uint)0x8100)
-#define PROFF_SCC3 ((uint)0x8200)
-#define PROFF_SCC4 ((uint)0x8300)
-#define PROFF_FCC1 ((uint)0x8400)
-#define PROFF_FCC2 ((uint)0x8500)
-#define PROFF_FCC3 ((uint)0x8600)
-#define PROFF_MCC1 ((uint)0x8700)
-#define PROFF_SMC1_BASE ((uint)0x87fc)
-#define PROFF_IDMA1_BASE ((uint)0x87fe)
-#define PROFF_MCC2 ((uint)0x8800)
-#define PROFF_SMC2_BASE ((uint)0x88fc)
-#define PROFF_IDMA2_BASE ((uint)0x88fe)
-#define PROFF_SPI_BASE ((uint)0x89fc)
-#define PROFF_IDMA3_BASE ((uint)0x89fe)
-#define PROFF_TIMERS ((uint)0x8ae0)
-#define PROFF_REVNUM ((uint)0x8af0)
-#define PROFF_RAND ((uint)0x8af8)
-#define PROFF_I2C_BASE ((uint)0x8afc)
-#define PROFF_IDMA4_BASE ((uint)0x8afe)
-
-#define PROFF_SCC_SIZE ((uint)0x100)
-#define PROFF_FCC_SIZE ((uint)0x100)
-#define PROFF_SMC_SIZE ((uint)64)
-
-/* The SMCs are relocated to any of the first eight DPRAM pages.
- * We will fix these at the first locations of DPRAM, until we
- * get some microcode patches :-).
- * The parameter ram space for the SMCs is fifty-some bytes, and
- * they are required to start on a 64 byte boundary.
- */
-#define PROFF_SMC1 (0)
-#define PROFF_SMC2 (64)
-
-
-/* Define enough so I can at least use the serial port as a UART.
- */
-typedef struct smc_uart {
- ushort smc_rbase; /* Rx Buffer descriptor base address */
- ushort smc_tbase; /* Tx Buffer descriptor base address */
- u_char smc_rfcr; /* Rx function code */
- u_char smc_tfcr; /* Tx function code */
- ushort smc_mrblr; /* Max receive buffer length */
- uint smc_rstate; /* Internal */
- uint smc_idp; /* Internal */
- ushort smc_rbptr; /* Internal */
- ushort smc_ibc; /* Internal */
- uint smc_rxtmp; /* Internal */
- uint smc_tstate; /* Internal */
- uint smc_tdp; /* Internal */
- ushort smc_tbptr; /* Internal */
- ushort smc_tbc; /* Internal */
- uint smc_txtmp; /* Internal */
- ushort smc_maxidl; /* Maximum idle characters */
- ushort smc_tmpidl; /* Temporary idle counter */
- ushort smc_brklen; /* Last received break length */
- ushort smc_brkec; /* rcv'd break condition counter */
- ushort smc_brkcr; /* xmt break count register */
- ushort smc_rmask; /* Temporary bit mask */
- uint smc_stmp; /* SDMA Temp */
-} smc_uart_t;
-
-/* SMC uart mode register (Internal memory map).
-*/
-#define SMCMR_REN ((ushort)0x0001)
-#define SMCMR_TEN ((ushort)0x0002)
-#define SMCMR_DM ((ushort)0x000c)
-#define SMCMR_SM_GCI ((ushort)0x0000)
-#define SMCMR_SM_UART ((ushort)0x0020)
-#define SMCMR_SM_TRANS ((ushort)0x0030)
-#define SMCMR_SM_MASK ((ushort)0x0030)
-#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */
-#define SMCMR_REVD SMCMR_PM_EVEN
-#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */
-#define SMCMR_BS SMCMR_PEN
-#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */
-#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */
-#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK)
-
-/* SMC Event and Mask register.
-*/
-#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */
-#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */
-#define SMCM_TXE ((unsigned char)0x10)
-#define SMCM_BSY ((unsigned char)0x04)
-#define SMCM_TX ((unsigned char)0x02)
-#define SMCM_RX ((unsigned char)0x01)
-
-/* Baud rate generators.
-*/
-#define CPM_BRG_RST ((uint)0x00020000)
-#define CPM_BRG_EN ((uint)0x00010000)
-#define CPM_BRG_EXTC_INT ((uint)0x00000000)
-#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000)
-#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000)
-#define CPM_BRG_ATB ((uint)0x00002000)
-#define CPM_BRG_CD_MASK ((uint)0x00001ffe)
-#define CPM_BRG_DIV16 ((uint)0x00000001)
-
-/* SCCs.
-*/
-#define SCC_GSMRH_IRP ((uint)0x00040000)
-#define SCC_GSMRH_GDE ((uint)0x00010000)
-#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000)
-#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000)
-#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000)
-#define SCC_GSMRH_REVD ((uint)0x00002000)
-#define SCC_GSMRH_TRX ((uint)0x00001000)
-#define SCC_GSMRH_TTX ((uint)0x00000800)
-#define SCC_GSMRH_CDP ((uint)0x00000400)
-#define SCC_GSMRH_CTSP ((uint)0x00000200)
-#define SCC_GSMRH_CDS ((uint)0x00000100)
-#define SCC_GSMRH_CTSS ((uint)0x00000080)
-#define SCC_GSMRH_TFL ((uint)0x00000040)
-#define SCC_GSMRH_RFW ((uint)0x00000020)
-#define SCC_GSMRH_TXSY ((uint)0x00000010)
-#define SCC_GSMRH_SYNL16 ((uint)0x0000000c)
-#define SCC_GSMRH_SYNL8 ((uint)0x00000008)
-#define SCC_GSMRH_SYNL4 ((uint)0x00000004)
-#define SCC_GSMRH_RTSM ((uint)0x00000002)
-#define SCC_GSMRH_RSYN ((uint)0x00000001)
-
-#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */
-#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000)
-#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000)
-#define SCC_GSMRL_EDGE_POS ((uint)0x20000000)
-#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000)
-#define SCC_GSMRL_TCI ((uint)0x10000000)
-#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000)
-#define SCC_GSMRL_TSNC_4 ((uint)0x08000000)
-#define SCC_GSMRL_TSNC_14 ((uint)0x04000000)
-#define SCC_GSMRL_TSNC_INF ((uint)0x00000000)
-#define SCC_GSMRL_RINV ((uint)0x02000000)
-#define SCC_GSMRL_TINV ((uint)0x01000000)
-#define SCC_GSMRL_TPL_128 ((uint)0x00c00000)
-#define SCC_GSMRL_TPL_64 ((uint)0x00a00000)
-#define SCC_GSMRL_TPL_48 ((uint)0x00800000)
-#define SCC_GSMRL_TPL_32 ((uint)0x00600000)
-#define SCC_GSMRL_TPL_16 ((uint)0x00400000)
-#define SCC_GSMRL_TPL_8 ((uint)0x00200000)
-#define SCC_GSMRL_TPL_NONE ((uint)0x00000000)
-#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000)
-#define SCC_GSMRL_TPP_01 ((uint)0x00100000)
-#define SCC_GSMRL_TPP_10 ((uint)0x00080000)
-#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000)
-#define SCC_GSMRL_TEND ((uint)0x00040000)
-#define SCC_GSMRL_TDCR_32 ((uint)0x00030000)
-#define SCC_GSMRL_TDCR_16 ((uint)0x00020000)
-#define SCC_GSMRL_TDCR_8 ((uint)0x00010000)
-#define SCC_GSMRL_TDCR_1 ((uint)0x00000000)
-#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000)
-#define SCC_GSMRL_RDCR_16 ((uint)0x00008000)
-#define SCC_GSMRL_RDCR_8 ((uint)0x00004000)
-#define SCC_GSMRL_RDCR_1 ((uint)0x00000000)
-#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000)
-#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000)
-#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000)
-#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800)
-#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000)
-#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600)
-#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400)
-#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200)
-#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100)
-#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000)
-#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */
-#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080)
-#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040)
-#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000)
-#define SCC_GSMRL_ENR ((uint)0x00000020)
-#define SCC_GSMRL_ENT ((uint)0x00000010)
-#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c)
-#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009)
-#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008)
-#define SCC_GSMRL_MODE_V14 ((uint)0x00000007)
-#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006)
-#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005)
-#define SCC_GSMRL_MODE_UART ((uint)0x00000004)
-#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003)
-#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002)
-#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000)
-
-#define SCC_TODR_TOD ((ushort)0x8000)
-
-/* SCC Event and Mask register.
-*/
-#define SCCM_TXE ((unsigned char)0x10)
-#define SCCM_BSY ((unsigned char)0x04)
-#define SCCM_TX ((unsigned char)0x02)
-#define SCCM_RX ((unsigned char)0x01)
-
-typedef struct scc_param {
- ushort scc_rbase; /* Rx Buffer descriptor base address */
- ushort scc_tbase; /* Tx Buffer descriptor base address */
- u_char scc_rfcr; /* Rx function code */
- u_char scc_tfcr; /* Tx function code */
- ushort scc_mrblr; /* Max receive buffer length */
- uint scc_rstate; /* Internal */
- uint scc_idp; /* Internal */
- ushort scc_rbptr; /* Internal */
- ushort scc_ibc; /* Internal */
- uint scc_rxtmp; /* Internal */
- uint scc_tstate; /* Internal */
- uint scc_tdp; /* Internal */
- ushort scc_tbptr; /* Internal */
- ushort scc_tbc; /* Internal */
- uint scc_txtmp; /* Internal */
- uint scc_rcrc; /* Internal */
- uint scc_tcrc; /* Internal */
-} sccp_t;
-
-/* CPM Ethernet through SCC1.
- */
-typedef struct scc_enet {
- sccp_t sen_genscc;
- uint sen_cpres; /* Preset CRC */
- uint sen_cmask; /* Constant mask for CRC */
- uint sen_crcec; /* CRC Error counter */
- uint sen_alec; /* alignment error counter */
- uint sen_disfc; /* discard frame counter */
- ushort sen_pads; /* Tx short frame pad character */
- ushort sen_retlim; /* Retry limit threshold */
- ushort sen_retcnt; /* Retry limit counter */
- ushort sen_maxflr; /* maximum frame length register */
- ushort sen_minflr; /* minimum frame length register */
- ushort sen_maxd1; /* maximum DMA1 length */
- ushort sen_maxd2; /* maximum DMA2 length */
- ushort sen_maxd; /* Rx max DMA */
- ushort sen_dmacnt; /* Rx DMA counter */
- ushort sen_maxb; /* Max BD byte count */
- ushort sen_gaddr1; /* Group address filter */
- ushort sen_gaddr2;
- ushort sen_gaddr3;
- ushort sen_gaddr4;
- uint sen_tbuf0data0; /* Save area 0 - current frame */
- uint sen_tbuf0data1; /* Save area 1 - current frame */
- uint sen_tbuf0rba; /* Internal */
- uint sen_tbuf0crc; /* Internal */
- ushort sen_tbuf0bcnt; /* Internal */
- ushort sen_paddrh; /* physical address (MSB) */
- ushort sen_paddrm;
- ushort sen_paddrl; /* physical address (LSB) */
- ushort sen_pper; /* persistence */
- ushort sen_rfbdptr; /* Rx first BD pointer */
- ushort sen_tfbdptr; /* Tx first BD pointer */
- ushort sen_tlbdptr; /* Tx last BD pointer */
- uint sen_tbuf1data0; /* Save area 0 - current frame */
- uint sen_tbuf1data1; /* Save area 1 - current frame */
- uint sen_tbuf1rba; /* Internal */
- uint sen_tbuf1crc; /* Internal */
- ushort sen_tbuf1bcnt; /* Internal */
- ushort sen_txlen; /* Tx Frame length counter */
- ushort sen_iaddr1; /* Individual address filter */
- ushort sen_iaddr2;
- ushort sen_iaddr3;
- ushort sen_iaddr4;
- ushort sen_boffcnt; /* Backoff counter */
-
- /* NOTE: Some versions of the manual have the following items
- * incorrectly documented. Below is the proper order.
- */
- ushort sen_taddrh; /* temp address (MSB) */
- ushort sen_taddrm;
- ushort sen_taddrl; /* temp address (LSB) */
-} scc_enet_t;
-
-
-/* SCC Event register as used by Ethernet.
-*/
-#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */
-#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */
-#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */
-#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */
-#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */
-#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */
-
-/* SCC Mode Register (PSMR) as used by Ethernet.
-*/
-#define SCC_PSMR_HBC ((ushort)0x8000) /* Enable heartbeat */
-#define SCC_PSMR_FC ((ushort)0x4000) /* Force collision */
-#define SCC_PSMR_RSH ((ushort)0x2000) /* Receive short frames */
-#define SCC_PSMR_IAM ((ushort)0x1000) /* Check individual hash */
-#define SCC_PSMR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */
-#define SCC_PSMR_PRO ((ushort)0x0200) /* Promiscuous mode */
-#define SCC_PSMR_BRO ((ushort)0x0100) /* Catch broadcast pkts */
-#define SCC_PSMR_SBT ((ushort)0x0080) /* Special backoff timer */
-#define SCC_PSMR_LPB ((ushort)0x0040) /* Set Loopback mode */
-#define SCC_PSMR_SIP ((ushort)0x0020) /* Sample Input Pins */
-#define SCC_PSMR_LCW ((ushort)0x0010) /* Late collision window */
-#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */
-#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */
-
-/* Buffer descriptor control/status used by Ethernet receive.
- * Common to SCC and FCC.
- */
-#define BD_ENET_RX_EMPTY ((ushort)0x8000)
-#define BD_ENET_RX_WRAP ((ushort)0x2000)
-#define BD_ENET_RX_INTR ((ushort)0x1000)
-#define BD_ENET_RX_LAST ((ushort)0x0800)
-#define BD_ENET_RX_FIRST ((ushort)0x0400)
-#define BD_ENET_RX_MISS ((ushort)0x0100)
-#define BD_ENET_RX_BC ((ushort)0x0080) /* FCC Only */
-#define BD_ENET_RX_MC ((ushort)0x0040) /* FCC Only */
-#define BD_ENET_RX_LG ((ushort)0x0020)
-#define BD_ENET_RX_NO ((ushort)0x0010)
-#define BD_ENET_RX_SH ((ushort)0x0008)
-#define BD_ENET_RX_CR ((ushort)0x0004)
-#define BD_ENET_RX_OV ((ushort)0x0002)
-#define BD_ENET_RX_CL ((ushort)0x0001)
-#define BD_ENET_RX_STATS ((ushort)0x01ff) /* All status bits */
-
-/* Buffer descriptor control/status used by Ethernet transmit.
- * Common to SCC and FCC.
- */
-#define BD_ENET_TX_READY ((ushort)0x8000)
-#define BD_ENET_TX_PAD ((ushort)0x4000)
-#define BD_ENET_TX_WRAP ((ushort)0x2000)
-#define BD_ENET_TX_INTR ((ushort)0x1000)
-#define BD_ENET_TX_LAST ((ushort)0x0800)
-#define BD_ENET_TX_TC ((ushort)0x0400)
-#define BD_ENET_TX_DEF ((ushort)0x0200)
-#define BD_ENET_TX_HB ((ushort)0x0100)
-#define BD_ENET_TX_LC ((ushort)0x0080)
-#define BD_ENET_TX_RL ((ushort)0x0040)
-#define BD_ENET_TX_RCMASK ((ushort)0x003c)
-#define BD_ENET_TX_UN ((ushort)0x0002)
-#define BD_ENET_TX_CSL ((ushort)0x0001)
-#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */
-
-/* SCC as UART
-*/
-typedef struct scc_uart {
- sccp_t scc_genscc;
- uint scc_res1; /* Reserved */
- uint scc_res2; /* Reserved */
- ushort scc_maxidl; /* Maximum idle chars */
- ushort scc_idlc; /* temp idle counter */
- ushort scc_brkcr; /* Break count register */
- ushort scc_parec; /* receive parity error counter */
- ushort scc_frmec; /* receive framing error counter */
- ushort scc_nosec; /* receive noise counter */
- ushort scc_brkec; /* receive break condition counter */
- ushort scc_brkln; /* last received break length */
- ushort scc_uaddr1; /* UART address character 1 */
- ushort scc_uaddr2; /* UART address character 2 */
- ushort scc_rtemp; /* Temp storage */
- ushort scc_toseq; /* Transmit out of sequence char */
- ushort scc_char1; /* control character 1 */
- ushort scc_char2; /* control character 2 */
- ushort scc_char3; /* control character 3 */
- ushort scc_char4; /* control character 4 */
- ushort scc_char5; /* control character 5 */
- ushort scc_char6; /* control character 6 */
- ushort scc_char7; /* control character 7 */
- ushort scc_char8; /* control character 8 */
- ushort scc_rccm; /* receive control character mask */
- ushort scc_rccr; /* receive control character register */
- ushort scc_rlbc; /* receive last break character */
-} scc_uart_t;
-
-/* SCC Event and Mask registers when it is used as a UART.
-*/
-#define UART_SCCM_GLR ((ushort)0x1000)
-#define UART_SCCM_GLT ((ushort)0x0800)
-#define UART_SCCM_AB ((ushort)0x0200)
-#define UART_SCCM_IDL ((ushort)0x0100)
-#define UART_SCCM_GRA ((ushort)0x0080)
-#define UART_SCCM_BRKE ((ushort)0x0040)
-#define UART_SCCM_BRKS ((ushort)0x0020)
-#define UART_SCCM_CCR ((ushort)0x0008)
-#define UART_SCCM_BSY ((ushort)0x0004)
-#define UART_SCCM_TX ((ushort)0x0002)
-#define UART_SCCM_RX ((ushort)0x0001)
-
-/* The SCC PSMR when used as a UART.
-*/
-#define SCU_PSMR_FLC ((ushort)0x8000)
-#define SCU_PSMR_SL ((ushort)0x4000)
-#define SCU_PSMR_CL ((ushort)0x3000)
-#define SCU_PSMR_UM ((ushort)0x0c00)
-#define SCU_PSMR_FRZ ((ushort)0x0200)
-#define SCU_PSMR_RZS ((ushort)0x0100)
-#define SCU_PSMR_SYN ((ushort)0x0080)
-#define SCU_PSMR_DRT ((ushort)0x0040)
-#define SCU_PSMR_PEN ((ushort)0x0010)
-#define SCU_PSMR_RPM ((ushort)0x000c)
-#define SCU_PSMR_REVP ((ushort)0x0008)
-#define SCU_PSMR_TPM ((ushort)0x0003)
-#define SCU_PSMR_TEVP ((ushort)0x0002)
-
-/* CPM Transparent mode SCC.
- */
-typedef struct scc_trans {
- sccp_t st_genscc;
- uint st_cpres; /* Preset CRC */
- uint st_cmask; /* Constant mask for CRC */
-} scc_trans_t;
-
-#define BD_SCC_TX_LAST ((ushort)0x0800)
-
-/* How about some FCCs.....
-*/
-#define FCC_GFMR_DIAG_NORM ((uint)0x00000000)
-#define FCC_GFMR_DIAG_LE ((uint)0x40000000)
-#define FCC_GFMR_DIAG_AE ((uint)0x80000000)
-#define FCC_GFMR_DIAG_ALE ((uint)0xc0000000)
-#define FCC_GFMR_TCI ((uint)0x20000000)
-#define FCC_GFMR_TRX ((uint)0x10000000)
-#define FCC_GFMR_TTX ((uint)0x08000000)
-#define FCC_GFMR_TTX ((uint)0x08000000)
-#define FCC_GFMR_CDP ((uint)0x04000000)
-#define FCC_GFMR_CTSP ((uint)0x02000000)
-#define FCC_GFMR_CDS ((uint)0x01000000)
-#define FCC_GFMR_CTSS ((uint)0x00800000)
-#define FCC_GFMR_SYNL_NONE ((uint)0x00000000)
-#define FCC_GFMR_SYNL_AUTO ((uint)0x00004000)
-#define FCC_GFMR_SYNL_8 ((uint)0x00008000)
-#define FCC_GFMR_SYNL_16 ((uint)0x0000c000)
-#define FCC_GFMR_RTSM ((uint)0x00002000)
-#define FCC_GFMR_RENC_NRZ ((uint)0x00000000)
-#define FCC_GFMR_RENC_NRZI ((uint)0x00000800)
-#define FCC_GFMR_REVD ((uint)0x00000400)
-#define FCC_GFMR_TENC_NRZ ((uint)0x00000000)
-#define FCC_GFMR_TENC_NRZI ((uint)0x00000100)
-#define FCC_GFMR_TCRC_16 ((uint)0x00000000)
-#define FCC_GFMR_TCRC_32 ((uint)0x00000080)
-#define FCC_GFMR_ENR ((uint)0x00000020)
-#define FCC_GFMR_ENT ((uint)0x00000010)
-#define FCC_GFMR_MODE_ENET ((uint)0x0000000c)
-#define FCC_GFMR_MODE_ATM ((uint)0x0000000a)
-#define FCC_GFMR_MODE_HDLC ((uint)0x00000000)
-
-/* Generic FCC parameter ram.
-*/
-typedef struct fcc_param {
- ushort fcc_riptr; /* Rx Internal temp pointer */
- ushort fcc_tiptr; /* Tx Internal temp pointer */
- ushort fcc_res1;
- ushort fcc_mrblr; /* Max receive buffer length, mod 32 bytes */
- uint fcc_rstate; /* Upper byte is Func code, must be set */
- uint fcc_rbase; /* Receive BD base */
- ushort fcc_rbdstat; /* RxBD status */
- ushort fcc_rbdlen; /* RxBD down counter */
- uint fcc_rdptr; /* RxBD internal data pointer */
- uint fcc_tstate; /* Upper byte is Func code, must be set */
- uint fcc_tbase; /* Transmit BD base */
- ushort fcc_tbdstat; /* TxBD status */
- ushort fcc_tbdlen; /* TxBD down counter */
- uint fcc_tdptr; /* TxBD internal data pointer */
- uint fcc_rbptr; /* Rx BD Internal buf pointer */
- uint fcc_tbptr; /* Tx BD Internal buf pointer */
- uint fcc_rcrc; /* Rx temp CRC */
- uint fcc_res2;
- uint fcc_tcrc; /* Tx temp CRC */
-} fccp_t;
-
-
-/* Ethernet controller through FCC.
-*/
-typedef struct fcc_enet {
- fccp_t fen_genfcc;
- uint fen_statbuf; /* Internal status buffer */
- uint fen_camptr; /* CAM address */
- uint fen_cmask; /* Constant mask for CRC */
- uint fen_cpres; /* Preset CRC */
- uint fen_crcec; /* CRC Error counter */
- uint fen_alec; /* alignment error counter */
- uint fen_disfc; /* discard frame counter */
- ushort fen_retlim; /* Retry limit */
- ushort fen_retcnt; /* Retry counter */
- ushort fen_pper; /* Persistence */
- ushort fen_boffcnt; /* backoff counter */
- uint fen_gaddrh; /* Group address filter, high 32-bits */
- uint fen_gaddrl; /* Group address filter, low 32-bits */
- ushort fen_tfcstat; /* out of sequence TxBD */
- ushort fen_tfclen;
- uint fen_tfcptr;
- ushort fen_mflr; /* Maximum frame length (1518) */
- ushort fen_paddrh; /* MAC address */
- ushort fen_paddrm;
- ushort fen_paddrl;
- ushort fen_ibdcount; /* Internal BD counter */
- ushort fen_ibdstart; /* Internal BD start pointer */
- ushort fen_ibdend; /* Internal BD end pointer */
- ushort fen_txlen; /* Internal Tx frame length counter */
- uint fen_ibdbase[8]; /* Internal use */
- uint fen_iaddrh; /* Individual address filter */
- uint fen_iaddrl;
- ushort fen_minflr; /* Minimum frame length (64) */
- ushort fen_taddrh; /* Filter transfer MAC address */
- ushort fen_taddrm;
- ushort fen_taddrl;
- ushort fen_padptr; /* Pointer to pad byte buffer */
- ushort fen_cftype; /* control frame type */
- ushort fen_cfrange; /* control frame range */
- ushort fen_maxb; /* maximum BD count */
- ushort fen_maxd1; /* Max DMA1 length (1520) */
- ushort fen_maxd2; /* Max DMA2 length (1520) */
- ushort fen_maxd; /* internal max DMA count */
- ushort fen_dmacnt; /* internal DMA counter */
- uint fen_octc; /* Total octect counter */
- uint fen_colc; /* Total collision counter */
- uint fen_broc; /* Total broadcast packet counter */
- uint fen_mulc; /* Total multicast packet count */
- uint fen_uspc; /* Total packets < 64 bytes */
- uint fen_frgc; /* Total packets < 64 bytes with errors */
- uint fen_ospc; /* Total packets > 1518 */
- uint fen_jbrc; /* Total packets > 1518 with errors */
- uint fen_p64c; /* Total packets == 64 bytes */
- uint fen_p65c; /* Total packets 64 < bytes <= 127 */
- uint fen_p128c; /* Total packets 127 < bytes <= 255 */
- uint fen_p256c; /* Total packets 256 < bytes <= 511 */
- uint fen_p512c; /* Total packets 512 < bytes <= 1023 */
- uint fen_p1024c; /* Total packets 1024 < bytes <= 1518 */
- uint fen_cambuf; /* Internal CAM buffer poiner */
- ushort fen_rfthr; /* Received frames threshold */
- ushort fen_rfcnt; /* Received frames count */
-} fcc_enet_t;
-
-/* FCC Event/Mask register as used by Ethernet.
-*/
-#define FCC_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */
-#define FCC_ENET_RXC ((ushort)0x0040) /* Control Frame Received */
-#define FCC_ENET_TXC ((ushort)0x0020) /* Out of seq. Tx sent */
-#define FCC_ENET_TXE ((ushort)0x0010) /* Transmit Error */
-#define FCC_ENET_RXF ((ushort)0x0008) /* Full frame received */
-#define FCC_ENET_BSY ((ushort)0x0004) /* Busy. Rx Frame dropped */
-#define FCC_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */
-#define FCC_ENET_RXB ((ushort)0x0001) /* A buffer was received */
-
-/* FCC Mode Register (FPSMR) as used by Ethernet.
-*/
-#define FCC_PSMR_HBC ((uint)0x80000000) /* Enable heartbeat */
-#define FCC_PSMR_FC ((uint)0x40000000) /* Force Collision */
-#define FCC_PSMR_SBT ((uint)0x20000000) /* Stop backoff timer */
-#define FCC_PSMR_LPB ((uint)0x10000000) /* Local protect. 1 = FDX */
-#define FCC_PSMR_LCW ((uint)0x08000000) /* Late collision select */
-#define FCC_PSMR_FDE ((uint)0x04000000) /* Full Duplex Enable */
-#define FCC_PSMR_MON ((uint)0x02000000) /* RMON Enable */
-#define FCC_PSMR_PRO ((uint)0x00400000) /* Promiscuous Enable */
-#define FCC_PSMR_FCE ((uint)0x00200000) /* Flow Control Enable */
-#define FCC_PSMR_RSH ((uint)0x00100000) /* Receive Short Frames */
-#define FCC_PSMR_CAM ((uint)0x00000400) /* CAM enable */
-#define FCC_PSMR_BRO ((uint)0x00000200) /* Broadcast pkt discard */
-#define FCC_PSMR_ENCRC ((uint)0x00000080) /* Use 32-bit CRC */
-
-/* IIC parameter RAM.
-*/
-typedef struct iic {
- ushort iic_rbase; /* Rx Buffer descriptor base address */
- ushort iic_tbase; /* Tx Buffer descriptor base address */
- u_char iic_rfcr; /* Rx function code */
- u_char iic_tfcr; /* Tx function code */
- ushort iic_mrblr; /* Max receive buffer length */
- uint iic_rstate; /* Internal */
- uint iic_rdp; /* Internal */
- ushort iic_rbptr; /* Internal */
- ushort iic_rbc; /* Internal */
- uint iic_rxtmp; /* Internal */
- uint iic_tstate; /* Internal */
- uint iic_tdp; /* Internal */
- ushort iic_tbptr; /* Internal */
- ushort iic_tbc; /* Internal */
- uint iic_txtmp; /* Internal */
-} iic_t;
-
-/* SPI parameter RAM.
-*/
-typedef struct spi {
- ushort spi_rbase; /* Rx Buffer descriptor base address */
- ushort spi_tbase; /* Tx Buffer descriptor base address */
- u_char spi_rfcr; /* Rx function code */
- u_char spi_tfcr; /* Tx function code */
- ushort spi_mrblr; /* Max receive buffer length */
- uint spi_rstate; /* Internal */
- uint spi_rdp; /* Internal */
- ushort spi_rbptr; /* Internal */
- ushort spi_rbc; /* Internal */
- uint spi_rxtmp; /* Internal */
- uint spi_tstate; /* Internal */
- uint spi_tdp; /* Internal */
- ushort spi_tbptr; /* Internal */
- ushort spi_tbc; /* Internal */
- uint spi_txtmp; /* Internal */
- uint spi_res; /* Tx temp. */
- uint spi_res1[4]; /* SDMA temp. */
-} spi_t;
-
-/* SPI Mode register.
-*/
-#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */
-#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */
-#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */
-#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */
-#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */
-#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */
-#define SPMODE_EN ((ushort)0x0100) /* Enable */
-#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */
-#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */
-
-#define SPMODE_LEN(x) ((((x)-1)&0xF)<<4)
-#define SPMODE_PM(x) ((x) &0xF)
-
-#define SPI_EB ((u_char)0x10) /* big endian byte order */
-
-#define BD_IIC_START ((ushort)0x0400)
-
-/* IDMA parameter RAM
-*/
-typedef struct idma {
- ushort ibase; /* IDMA buffer descriptor table base address */
- ushort dcm; /* DMA channel mode */
- ushort ibdptr; /* IDMA current buffer descriptor pointer */
- ushort dpr_buf; /* IDMA transfer buffer base address */
- ushort buf_inv; /* internal buffer inventory */
- ushort ss_max; /* steady-state maximum transfer size */
- ushort dpr_in_ptr; /* write pointer inside the internal buffer */
- ushort sts; /* source transfer size */
- ushort dpr_out_ptr; /* read pointer inside the internal buffer */
- ushort seob; /* source end of burst */
- ushort deob; /* destination end of burst */
- ushort dts; /* destination transfer size */
- ushort ret_add; /* return address when working in ERM=1 mode */
- ushort res0; /* reserved */
- uint bd_cnt; /* internal byte count */
- uint s_ptr; /* source internal data pointer */
- uint d_ptr; /* destination internal data pointer */
- uint istate; /* internal state */
- u_char res1[20]; /* pad to 64-byte length */
-} idma_t;
-
-/* DMA channel mode bit fields
-*/
-#define IDMA_DCM_FB ((ushort)0x8000) /* fly-by mode */
-#define IDMA_DCM_LP ((ushort)0x4000) /* low priority */
-#define IDMA_DCM_TC2 ((ushort)0x0400) /* value driven on TC[2] */
-#define IDMA_DCM_DMA_WRAP_MASK ((ushort)0x01c0) /* mask for DMA wrap */
-#define IDMA_DCM_DMA_WRAP_64 ((ushort)0x0000) /* 64-byte DMA xfer buffer */
-#define IDMA_DCM_DMA_WRAP_128 ((ushort)0x0040) /* 128-byte DMA xfer buffer */
-#define IDMA_DCM_DMA_WRAP_256 ((ushort)0x0080) /* 256-byte DMA xfer buffer */
-#define IDMA_DCM_DMA_WRAP_512 ((ushort)0x00c0) /* 512-byte DMA xfer buffer */
-#define IDMA_DCM_DMA_WRAP_1024 ((ushort)0x0100) /* 1024-byte DMA xfer buffer */
-#define IDMA_DCM_DMA_WRAP_2048 ((ushort)0x0140) /* 2048-byte DMA xfer buffer */
-#define IDMA_DCM_SINC ((ushort)0x0020) /* source inc addr */
-#define IDMA_DCM_DINC ((ushort)0x0010) /* destination inc addr */
-#define IDMA_DCM_ERM ((ushort)0x0008) /* external request mode */
-#define IDMA_DCM_DT ((ushort)0x0004) /* DONE treatment */
-#define IDMA_DCM_SD_MASK ((ushort)0x0003) /* mask for SD bit field */
-#define IDMA_DCM_SD_MEM2MEM ((ushort)0x0000) /* memory-to-memory xfer */
-#define IDMA_DCM_SD_PER2MEM ((ushort)0x0002) /* peripheral-to-memory xfer */
-#define IDMA_DCM_SD_MEM2PER ((ushort)0x0001) /* memory-to-peripheral xfer */
-
-/* IDMA Buffer Descriptors
-*/
-typedef struct idma_bd {
- uint flags;
- uint len; /* data length */
- uint src; /* source data buffer pointer */
- uint dst; /* destination data buffer pointer */
-} idma_bd_t;
-
-/* IDMA buffer descriptor flag bit fields
-*/
-#define IDMA_BD_V ((uint)0x80000000) /* valid */
-#define IDMA_BD_W ((uint)0x20000000) /* wrap */
-#define IDMA_BD_I ((uint)0x10000000) /* interrupt */
-#define IDMA_BD_L ((uint)0x08000000) /* last */
-#define IDMA_BD_CM ((uint)0x02000000) /* continuous mode */
-#define IDMA_BD_SDN ((uint)0x00400000) /* source done */
-#define IDMA_BD_DDN ((uint)0x00200000) /* destination done */
-#define IDMA_BD_DGBL ((uint)0x00100000) /* destination global */
-#define IDMA_BD_DBO_LE ((uint)0x00040000) /* little-end dest byte order */
-#define IDMA_BD_DBO_BE ((uint)0x00080000) /* big-end dest byte order */
-#define IDMA_BD_DDTB ((uint)0x00010000) /* destination data bus */
-#define IDMA_BD_SGBL ((uint)0x00002000) /* source global */
-#define IDMA_BD_SBO_LE ((uint)0x00000800) /* little-end src byte order */
-#define IDMA_BD_SBO_BE ((uint)0x00001000) /* big-end src byte order */
-#define IDMA_BD_SDTB ((uint)0x00000200) /* source data bus */
-
-/* per-channel IDMA registers
-*/
-typedef struct im_idma {
- u_char idsr; /* IDMAn event status register */
- u_char res0[3];
- u_char idmr; /* IDMAn event mask register */
- u_char res1[3];
-} im_idma_t;
-
-/* IDMA event register bit fields
-*/
-#define IDMA_EVENT_SC ((unsigned char)0x08) /* stop completed */
-#define IDMA_EVENT_OB ((unsigned char)0x04) /* out of buffers */
-#define IDMA_EVENT_EDN ((unsigned char)0x02) /* external DONE asserted */
-#define IDMA_EVENT_BC ((unsigned char)0x01) /* buffer descriptor complete */
-
-/* RISC Controller Configuration Register (RCCR) bit fields
-*/
-#define RCCR_TIME ((uint)0x80000000) /* timer enable */
-#define RCCR_TIMEP_MASK ((uint)0x3f000000) /* mask for timer period bit field */
-#define RCCR_DR0M ((uint)0x00800000) /* IDMA0 request mode */
-#define RCCR_DR1M ((uint)0x00400000) /* IDMA1 request mode */
-#define RCCR_DR2M ((uint)0x00000080) /* IDMA2 request mode */
-#define RCCR_DR3M ((uint)0x00000040) /* IDMA3 request mode */
-#define RCCR_DR0QP_MASK ((uint)0x00300000) /* mask for IDMA0 req priority */
-#define RCCR_DR0QP_HIGH ((uint)0x00000000) /* IDMA0 has high req priority */
-#define RCCR_DR0QP_MED ((uint)0x00100000) /* IDMA0 has medium req priority */
-#define RCCR_DR0QP_LOW ((uint)0x00200000) /* IDMA0 has low req priority */
-#define RCCR_DR1QP_MASK ((uint)0x00030000) /* mask for IDMA1 req priority */
-#define RCCR_DR1QP_HIGH ((uint)0x00000000) /* IDMA1 has high req priority */
-#define RCCR_DR1QP_MED ((uint)0x00010000) /* IDMA1 has medium req priority */
-#define RCCR_DR1QP_LOW ((uint)0x00020000) /* IDMA1 has low req priority */
-#define RCCR_DR2QP_MASK ((uint)0x00000030) /* mask for IDMA2 req priority */
-#define RCCR_DR2QP_HIGH ((uint)0x00000000) /* IDMA2 has high req priority */
-#define RCCR_DR2QP_MED ((uint)0x00000010) /* IDMA2 has medium req priority */
-#define RCCR_DR2QP_LOW ((uint)0x00000020) /* IDMA2 has low req priority */
-#define RCCR_DR3QP_MASK ((uint)0x00000003) /* mask for IDMA3 req priority */
-#define RCCR_DR3QP_HIGH ((uint)0x00000000) /* IDMA3 has high req priority */
-#define RCCR_DR3QP_MED ((uint)0x00000001) /* IDMA3 has medium req priority */
-#define RCCR_DR3QP_LOW ((uint)0x00000002) /* IDMA3 has low req priority */
-#define RCCR_EIE ((uint)0x00080000) /* external interrupt enable */
-#define RCCR_SCD ((uint)0x00040000) /* scheduler configuration */
-#define RCCR_ERAM_MASK ((uint)0x0000e000) /* mask for enable RAM microcode */
-#define RCCR_ERAM_0KB ((uint)0x00000000) /* use 0KB of dpram for microcode */
-#define RCCR_ERAM_2KB ((uint)0x00002000) /* use 2KB of dpram for microcode */
-#define RCCR_ERAM_4KB ((uint)0x00004000) /* use 4KB of dpram for microcode */
-#define RCCR_ERAM_6KB ((uint)0x00006000) /* use 6KB of dpram for microcode */
-#define RCCR_ERAM_8KB ((uint)0x00008000) /* use 8KB of dpram for microcode */
-#define RCCR_ERAM_10KB ((uint)0x0000a000) /* use 10KB of dpram for microcode */
-#define RCCR_ERAM_12KB ((uint)0x0000c000) /* use 12KB of dpram for microcode */
-#define RCCR_EDM0 ((uint)0x00000800) /* DREQ0 edge detect mode */
-#define RCCR_EDM1 ((uint)0x00000400) /* DREQ1 edge detect mode */
-#define RCCR_EDM2 ((uint)0x00000200) /* DREQ2 edge detect mode */
-#define RCCR_EDM3 ((uint)0x00000100) /* DREQ3 edge detect mode */
-#define RCCR_DEM01 ((uint)0x00000008) /* DONE0/DONE1 edge detect mode */
-#define RCCR_DEM23 ((uint)0x00000004) /* DONE2/DONE3 edge detect mode */
-
-/*-----------------------------------------------------------------------
- * CMXFCR - CMX FCC Clock Route Register
- */
-#define CMXFCR_FC1 0x40000000 /* FCC1 connection */
-#define CMXFCR_RF1CS_MSK 0x38000000 /* Receive FCC1 Clock Source Mask */
-#define CMXFCR_TF1CS_MSK 0x07000000 /* Transmit FCC1 Clock Source Mask */
-#define CMXFCR_FC2 0x00400000 /* FCC2 connection */
-#define CMXFCR_RF2CS_MSK 0x00380000 /* Receive FCC2 Clock Source Mask */
-#define CMXFCR_TF2CS_MSK 0x00070000 /* Transmit FCC2 Clock Source Mask */
-#define CMXFCR_FC3 0x00004000 /* FCC3 connection */
-#define CMXFCR_RF3CS_MSK 0x00003800 /* Receive FCC3 Clock Source Mask */
-#define CMXFCR_TF3CS_MSK 0x00000700 /* Transmit FCC3 Clock Source Mask */
-
-#define CMXFCR_RF1CS_BRG5 0x00000000 /* Receive FCC1 Clock Source is BRG5 */
-#define CMXFCR_RF1CS_BRG6 0x08000000 /* Receive FCC1 Clock Source is BRG6 */
-#define CMXFCR_RF1CS_BRG7 0x10000000 /* Receive FCC1 Clock Source is BRG7 */
-#define CMXFCR_RF1CS_BRG8 0x18000000 /* Receive FCC1 Clock Source is BRG8 */
-#define CMXFCR_RF1CS_CLK9 0x20000000 /* Receive FCC1 Clock Source is CLK9 */
-#define CMXFCR_RF1CS_CLK10 0x28000000 /* Receive FCC1 Clock Source is CLK10 */
-#define CMXFCR_RF1CS_CLK11 0x30000000 /* Receive FCC1 Clock Source is CLK11 */
-#define CMXFCR_RF1CS_CLK12 0x38000000 /* Receive FCC1 Clock Source is CLK12 */
-
-#define CMXFCR_TF1CS_BRG5 0x00000000 /* Transmit FCC1 Clock Source is BRG5 */
-#define CMXFCR_TF1CS_BRG6 0x01000000 /* Transmit FCC1 Clock Source is BRG6 */
-#define CMXFCR_TF1CS_BRG7 0x02000000 /* Transmit FCC1 Clock Source is BRG7 */
-#define CMXFCR_TF1CS_BRG8 0x03000000 /* Transmit FCC1 Clock Source is BRG8 */
-#define CMXFCR_TF1CS_CLK9 0x04000000 /* Transmit FCC1 Clock Source is CLK9 */
-#define CMXFCR_TF1CS_CLK10 0x05000000 /* Transmit FCC1 Clock Source is CLK10 */
-#define CMXFCR_TF1CS_CLK11 0x06000000 /* Transmit FCC1 Clock Source is CLK11 */
-#define CMXFCR_TF1CS_CLK12 0x07000000 /* Transmit FCC1 Clock Source is CLK12 */
-
-#define CMXFCR_RF2CS_BRG5 0x00000000 /* Receive FCC2 Clock Source is BRG5 */
-#define CMXFCR_RF2CS_BRG6 0x00080000 /* Receive FCC2 Clock Source is BRG6 */
-#define CMXFCR_RF2CS_BRG7 0x00100000 /* Receive FCC2 Clock Source is BRG7 */
-#define CMXFCR_RF2CS_BRG8 0x00180000 /* Receive FCC2 Clock Source is BRG8 */
-#define CMXFCR_RF2CS_CLK13 0x00200000 /* Receive FCC2 Clock Source is CLK13 */
-#define CMXFCR_RF2CS_CLK14 0x00280000 /* Receive FCC2 Clock Source is CLK14 */
-#define CMXFCR_RF2CS_CLK15 0x00300000 /* Receive FCC2 Clock Source is CLK15 */
-#define CMXFCR_RF2CS_CLK16 0x00380000 /* Receive FCC2 Clock Source is CLK16 */
-
-#define CMXFCR_TF2CS_BRG5 0x00000000 /* Transmit FCC2 Clock Source is BRG5 */
-#define CMXFCR_TF2CS_BRG6 0x00010000 /* Transmit FCC2 Clock Source is BRG6 */
-#define CMXFCR_TF2CS_BRG7 0x00020000 /* Transmit FCC2 Clock Source is BRG7 */
-#define CMXFCR_TF2CS_BRG8 0x00030000 /* Transmit FCC2 Clock Source is BRG8 */
-#define CMXFCR_TF2CS_CLK13 0x00040000 /* Transmit FCC2 Clock Source is CLK13 */
-#define CMXFCR_TF2CS_CLK14 0x00050000 /* Transmit FCC2 Clock Source is CLK14 */
-#define CMXFCR_TF2CS_CLK15 0x00060000 /* Transmit FCC2 Clock Source is CLK15 */
-#define CMXFCR_TF2CS_CLK16 0x00070000 /* Transmit FCC2 Clock Source is CLK16 */
-
-#define CMXFCR_RF3CS_BRG5 0x00000000 /* Receive FCC3 Clock Source is BRG5 */
-#define CMXFCR_RF3CS_BRG6 0x00000800 /* Receive FCC3 Clock Source is BRG6 */
-#define CMXFCR_RF3CS_BRG7 0x00001000 /* Receive FCC3 Clock Source is BRG7 */
-#define CMXFCR_RF3CS_BRG8 0x00001800 /* Receive FCC3 Clock Source is BRG8 */
-#define CMXFCR_RF3CS_CLK13 0x00002000 /* Receive FCC3 Clock Source is CLK13 */
-#define CMXFCR_RF3CS_CLK14 0x00002800 /* Receive FCC3 Clock Source is CLK14 */
-#define CMXFCR_RF3CS_CLK15 0x00003000 /* Receive FCC3 Clock Source is CLK15 */
-#define CMXFCR_RF3CS_CLK16 0x00003800 /* Receive FCC3 Clock Source is CLK16 */
-
-#define CMXFCR_TF3CS_BRG5 0x00000000 /* Transmit FCC3 Clock Source is BRG5 */
-#define CMXFCR_TF3CS_BRG6 0x00000100 /* Transmit FCC3 Clock Source is BRG6 */
-#define CMXFCR_TF3CS_BRG7 0x00000200 /* Transmit FCC3 Clock Source is BRG7 */
-#define CMXFCR_TF3CS_BRG8 0x00000300 /* Transmit FCC3 Clock Source is BRG8 */
-#define CMXFCR_TF3CS_CLK13 0x00000400 /* Transmit FCC3 Clock Source is CLK13 */
-#define CMXFCR_TF3CS_CLK14 0x00000500 /* Transmit FCC3 Clock Source is CLK14 */
-#define CMXFCR_TF3CS_CLK15 0x00000600 /* Transmit FCC3 Clock Source is CLK15 */
-#define CMXFCR_TF3CS_CLK16 0x00000700 /* Transmit FCC3 Clock Source is CLK16 */
-
-/*-----------------------------------------------------------------------
- * CMXSCR - CMX SCC Clock Route Register
- */
-#define CMXSCR_GR1 0x80000000 /* Grant Support of SCC1 */
-#define CMXSCR_SC1 0x40000000 /* SCC1 connection */
-#define CMXSCR_RS1CS_MSK 0x38000000 /* Receive SCC1 Clock Source Mask */
-#define CMXSCR_TS1CS_MSK 0x07000000 /* Transmit SCC1 Clock Source Mask */
-#define CMXSCR_GR2 0x00800000 /* Grant Support of SCC2 */
-#define CMXSCR_SC2 0x00400000 /* SCC2 connection */
-#define CMXSCR_RS2CS_MSK 0x00380000 /* Receive SCC2 Clock Source Mask */
-#define CMXSCR_TS2CS_MSK 0x00070000 /* Transmit SCC2 Clock Source Mask */
-#define CMXSCR_GR3 0x00008000 /* Grant Support of SCC3 */
-#define CMXSCR_SC3 0x00004000 /* SCC3 connection */
-#define CMXSCR_RS3CS_MSK 0x00003800 /* Receive SCC3 Clock Source Mask */
-#define CMXSCR_TS3CS_MSK 0x00000700 /* Transmit SCC3 Clock Source Mask */
-#define CMXSCR_GR4 0x00000080 /* Grant Support of SCC4 */
-#define CMXSCR_SC4 0x00000040 /* SCC4 connection */
-#define CMXSCR_RS4CS_MSK 0x00000038 /* Receive SCC4 Clock Source Mask */
-#define CMXSCR_TS4CS_MSK 0x00000007 /* Transmit SCC4 Clock Source Mask */
-
-#define CMXSCR_RS1CS_BRG1 0x00000000 /* SCC1 Rx Clock Source is BRG1 */
-#define CMXSCR_RS1CS_BRG2 0x08000000 /* SCC1 Rx Clock Source is BRG2 */
-#define CMXSCR_RS1CS_BRG3 0x10000000 /* SCC1 Rx Clock Source is BRG3 */
-#define CMXSCR_RS1CS_BRG4 0x18000000 /* SCC1 Rx Clock Source is BRG4 */
-#define CMXSCR_RS1CS_CLK11 0x20000000 /* SCC1 Rx Clock Source is CLK11 */
-#define CMXSCR_RS1CS_CLK12 0x28000000 /* SCC1 Rx Clock Source is CLK12 */
-#define CMXSCR_RS1CS_CLK3 0x30000000 /* SCC1 Rx Clock Source is CLK3 */
-#define CMXSCR_RS1CS_CLK4 0x38000000 /* SCC1 Rx Clock Source is CLK4 */
-
-#define CMXSCR_TS1CS_BRG1 0x00000000 /* SCC1 Tx Clock Source is BRG1 */
-#define CMXSCR_TS1CS_BRG2 0x01000000 /* SCC1 Tx Clock Source is BRG2 */
-#define CMXSCR_TS1CS_BRG3 0x02000000 /* SCC1 Tx Clock Source is BRG3 */
-#define CMXSCR_TS1CS_BRG4 0x03000000 /* SCC1 Tx Clock Source is BRG4 */
-#define CMXSCR_TS1CS_CLK11 0x04000000 /* SCC1 Tx Clock Source is CLK11 */
-#define CMXSCR_TS1CS_CLK12 0x05000000 /* SCC1 Tx Clock Source is CLK12 */
-#define CMXSCR_TS1CS_CLK3 0x06000000 /* SCC1 Tx Clock Source is CLK3 */
-#define CMXSCR_TS1CS_CLK4 0x07000000 /* SCC1 Tx Clock Source is CLK4 */
-
-#define CMXSCR_RS2CS_BRG1 0x00000000 /* SCC2 Rx Clock Source is BRG1 */
-#define CMXSCR_RS2CS_BRG2 0x00080000 /* SCC2 Rx Clock Source is BRG2 */
-#define CMXSCR_RS2CS_BRG3 0x00100000 /* SCC2 Rx Clock Source is BRG3 */
-#define CMXSCR_RS2CS_BRG4 0x00180000 /* SCC2 Rx Clock Source is BRG4 */
-#define CMXSCR_RS2CS_CLK11 0x00200000 /* SCC2 Rx Clock Source is CLK11 */
-#define CMXSCR_RS2CS_CLK12 0x00280000 /* SCC2 Rx Clock Source is CLK12 */
-#define CMXSCR_RS2CS_CLK3 0x00300000 /* SCC2 Rx Clock Source is CLK3 */
-#define CMXSCR_RS2CS_CLK4 0x00380000 /* SCC2 Rx Clock Source is CLK4 */
-
-#define CMXSCR_TS2CS_BRG1 0x00000000 /* SCC2 Tx Clock Source is BRG1 */
-#define CMXSCR_TS2CS_BRG2 0x00010000 /* SCC2 Tx Clock Source is BRG2 */
-#define CMXSCR_TS2CS_BRG3 0x00020000 /* SCC2 Tx Clock Source is BRG3 */
-#define CMXSCR_TS2CS_BRG4 0x00030000 /* SCC2 Tx Clock Source is BRG4 */
-#define CMXSCR_TS2CS_CLK11 0x00040000 /* SCC2 Tx Clock Source is CLK11 */
-#define CMXSCR_TS2CS_CLK12 0x00050000 /* SCC2 Tx Clock Source is CLK12 */
-#define CMXSCR_TS2CS_CLK3 0x00060000 /* SCC2 Tx Clock Source is CLK3 */
-#define CMXSCR_TS2CS_CLK4 0x00070000 /* SCC2 Tx Clock Source is CLK4 */
-
-#define CMXSCR_RS3CS_BRG1 0x00000000 /* SCC3 Rx Clock Source is BRG1 */
-#define CMXSCR_RS3CS_BRG2 0x00000800 /* SCC3 Rx Clock Source is BRG2 */
-#define CMXSCR_RS3CS_BRG3 0x00001000 /* SCC3 Rx Clock Source is BRG3 */
-#define CMXSCR_RS3CS_BRG4 0x00001800 /* SCC3 Rx Clock Source is BRG4 */
-#define CMXSCR_RS3CS_CLK5 0x00002000 /* SCC3 Rx Clock Source is CLK5 */
-#define CMXSCR_RS3CS_CLK6 0x00002800 /* SCC3 Rx Clock Source is CLK6 */
-#define CMXSCR_RS3CS_CLK7 0x00003000 /* SCC3 Rx Clock Source is CLK7 */
-#define CMXSCR_RS3CS_CLK8 0x00003800 /* SCC3 Rx Clock Source is CLK8 */
-
-#define CMXSCR_TS3CS_BRG1 0x00000000 /* SCC3 Tx Clock Source is BRG1 */
-#define CMXSCR_TS3CS_BRG2 0x00000100 /* SCC3 Tx Clock Source is BRG2 */
-#define CMXSCR_TS3CS_BRG3 0x00000200 /* SCC3 Tx Clock Source is BRG3 */
-#define CMXSCR_TS3CS_BRG4 0x00000300 /* SCC3 Tx Clock Source is BRG4 */
-#define CMXSCR_TS3CS_CLK5 0x00000400 /* SCC3 Tx Clock Source is CLK5 */
-#define CMXSCR_TS3CS_CLK6 0x00000500 /* SCC3 Tx Clock Source is CLK6 */
-#define CMXSCR_TS3CS_CLK7 0x00000600 /* SCC3 Tx Clock Source is CLK7 */
-#define CMXSCR_TS3CS_CLK8 0x00000700 /* SCC3 Tx Clock Source is CLK8 */
-
-#define CMXSCR_RS4CS_BRG1 0x00000000 /* SCC4 Rx Clock Source is BRG1 */
-#define CMXSCR_RS4CS_BRG2 0x00000008 /* SCC4 Rx Clock Source is BRG2 */
-#define CMXSCR_RS4CS_BRG3 0x00000010 /* SCC4 Rx Clock Source is BRG3 */
-#define CMXSCR_RS4CS_BRG4 0x00000018 /* SCC4 Rx Clock Source is BRG4 */
-#define CMXSCR_RS4CS_CLK5 0x00000020 /* SCC4 Rx Clock Source is CLK5 */
-#define CMXSCR_RS4CS_CLK6 0x00000028 /* SCC4 Rx Clock Source is CLK6 */
-#define CMXSCR_RS4CS_CLK7 0x00000030 /* SCC4 Rx Clock Source is CLK7 */
-#define CMXSCR_RS4CS_CLK8 0x00000038 /* SCC4 Rx Clock Source is CLK8 */
-
-#define CMXSCR_TS4CS_BRG1 0x00000000 /* SCC4 Tx Clock Source is BRG1 */
-#define CMXSCR_TS4CS_BRG2 0x00000001 /* SCC4 Tx Clock Source is BRG2 */
-#define CMXSCR_TS4CS_BRG3 0x00000002 /* SCC4 Tx Clock Source is BRG3 */
-#define CMXSCR_TS4CS_BRG4 0x00000003 /* SCC4 Tx Clock Source is BRG4 */
-#define CMXSCR_TS4CS_CLK5 0x00000004 /* SCC4 Tx Clock Source is CLK5 */
-#define CMXSCR_TS4CS_CLK6 0x00000005 /* SCC4 Tx Clock Source is CLK6 */
-#define CMXSCR_TS4CS_CLK7 0x00000006 /* SCC4 Tx Clock Source is CLK7 */
-#define CMXSCR_TS4CS_CLK8 0x00000007 /* SCC4 Tx Clock Source is CLK8 */
-
-/*-----------------------------------------------------------------------
- * SIUMCR - SIU Module Configuration Register 4-31
- */
-#define SIUMCR_BBD 0x80000000 /* Bus Busy Disable */
-#define SIUMCR_ESE 0x40000000 /* External Snoop Enable */
-#define SIUMCR_PBSE 0x20000000 /* Parity Byte Select Enable */
-#define SIUMCR_CDIS 0x10000000 /* Core Disable */
-#define SIUMCR_DPPC00 0x00000000 /* Data Parity Pins Configuration*/
-#define SIUMCR_DPPC01 0x04000000 /* - " - */
-#define SIUMCR_DPPC10 0x08000000 /* - " - */
-#define SIUMCR_DPPC11 0x0c000000 /* - " - */
-#define SIUMCR_L2CPC00 0x00000000 /* L2 Cache Pins Configuration */
-#define SIUMCR_L2CPC01 0x01000000 /* - " - */
-#define SIUMCR_L2CPC10 0x02000000 /* - " - */
-#define SIUMCR_L2CPC11 0x03000000 /* - " - */
-#define SIUMCR_LBPC00 0x00000000 /* Local Bus Pins Configuration */
-#define SIUMCR_LBPC01 0x00400000 /* - " - */
-#define SIUMCR_LBPC10 0x00800000 /* - " - */
-#define SIUMCR_LBPC11 0x00c00000 /* - " - */
-#define SIUMCR_APPC00 0x00000000 /* Address Parity Pins Configuration*/
-#define SIUMCR_APPC01 0x00100000 /* - " - */
-#define SIUMCR_APPC10 0x00200000 /* - " - */
-#define SIUMCR_APPC11 0x00300000 /* - " - */
-#define SIUMCR_CS10PC00 0x00000000 /* CS10 Pin Configuration */
-#define SIUMCR_CS10PC01 0x00040000 /* - " - */
-#define SIUMCR_CS10PC10 0x00080000 /* - " - */
-#define SIUMCR_CS10PC11 0x000c0000 /* - " - */
-#define SIUMCR_BCTLC00 0x00000000 /* Buffer Control Configuration */
-#define SIUMCR_BCTLC01 0x00010000 /* - " - */
-#define SIUMCR_BCTLC10 0x00020000 /* - " - */
-#define SIUMCR_BCTLC11 0x00030000 /* - " - */
-#define SIUMCR_MMR00 0x00000000 /* Mask Masters Requests */
-#define SIUMCR_MMR01 0x00004000 /* - " - */
-#define SIUMCR_MMR10 0x00008000 /* - " - */
-#define SIUMCR_MMR11 0x0000c000 /* - " - */
-#define SIUMCR_LPBSE 0x00002000 /* LocalBus Parity Byte Select Enable*/
-
-/*-----------------------------------------------------------------------
- * SCCR - System Clock Control Register 9-8
-*/
-#define SCCR_PCI_MODE 0x00000100 /* PCI Mode */
-#define SCCR_PCI_MODCK 0x00000080 /* Value of PCI_MODCK pin */
-#define SCCR_PCIDF_MSK 0x00000078 /* PCI division factor */
-#define SCCR_PCIDF_SHIFT 3
-
-#ifndef CPM_IMMR_OFFSET
-#define CPM_IMMR_OFFSET 0x101a8
-#endif
-
-#define FCC_PSMR_RMII ((uint)0x00020000) /* Use RMII interface */
-
-/* FCC iop & clock configuration. BSP code is responsible to define Fx_RXCLK & Fx_TXCLK
- * in order to use clock-computing stuff below for the FCC x
- */
-
-/* Automatically generates register configurations */
-#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */
-
-#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */
-#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */
-#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */
-#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */
-#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */
-#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */
-
-#define PC_F1RXCLK PC_CLK(F1_RXCLK)
-#define PC_F1TXCLK PC_CLK(F1_TXCLK)
-#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK))
-#define CMX1_CLK_MASK ((uint)0xff000000)
-
-#define PC_F2RXCLK PC_CLK(F2_RXCLK)
-#define PC_F2TXCLK PC_CLK(F2_TXCLK)
-#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK))
-#define CMX2_CLK_MASK ((uint)0x00ff0000)
-
-#define PC_F3RXCLK PC_CLK(F3_RXCLK)
-#define PC_F3TXCLK PC_CLK(F3_TXCLK)
-#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK))
-#define CMX3_CLK_MASK ((uint)0x0000ff00)
-
-#define CPMUX_CLK_MASK (CMX3_CLK_MASK | CMX2_CLK_MASK)
-#define CPMUX_CLK_ROUTE (CMX3_CLK_ROUTE | CMX2_CLK_ROUTE)
-
-#define CLK_TRX (PC_F3TXCLK | PC_F3RXCLK | PC_F2TXCLK | PC_F2RXCLK)
-
-/* I/O Pin assignment for FCC1. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PA1_COL 0x00000001U
-#define PA1_CRS 0x00000002U
-#define PA1_TXER 0x00000004U
-#define PA1_TXEN 0x00000008U
-#define PA1_RXDV 0x00000010U
-#define PA1_RXER 0x00000020U
-#define PA1_TXDAT 0x00003c00U
-#define PA1_RXDAT 0x0003c000U
-#define PA1_PSORA0 (PA1_RXDAT | PA1_TXDAT)
-#define PA1_PSORA1 (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
- PA1_RXDV | PA1_RXER)
-#define PA1_DIRA0 (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
-#define PA1_DIRA1 (PA1_TXDAT | PA1_TXEN | PA1_TXER)
-
-
-/* I/O Pin assignment for FCC2. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PB2_TXER 0x00000001U
-#define PB2_RXDV 0x00000002U
-#define PB2_TXEN 0x00000004U
-#define PB2_RXER 0x00000008U
-#define PB2_COL 0x00000010U
-#define PB2_CRS 0x00000020U
-#define PB2_TXDAT 0x000003c0U
-#define PB2_RXDAT 0x00003c00U
-#define PB2_PSORB0 (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
- PB2_RXER | PB2_RXDV | PB2_TXER)
-#define PB2_PSORB1 (PB2_TXEN)
-#define PB2_DIRB0 (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
-#define PB2_DIRB1 (PB2_TXDAT | PB2_TXEN | PB2_TXER)
-
-
-/* I/O Pin assignment for FCC3. I don't yet know the best way to do this,
- * but there is little variation among the choices.
- */
-#define PB3_RXDV 0x00004000U
-#define PB3_RXER 0x00008000U
-#define PB3_TXER 0x00010000U
-#define PB3_TXEN 0x00020000U
-#define PB3_COL 0x00040000U
-#define PB3_CRS 0x00080000U
-#define PB3_TXDAT 0x0f000000U
-#define PC3_TXDAT 0x00000010U
-#define PB3_RXDAT 0x00f00000U
-#define PB3_PSORB0 (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
- PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN)
-#define PB3_PSORB1 0
-#define PB3_DIRB0 (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
-#define PB3_DIRB1 (PB3_TXDAT | PB3_TXEN | PB3_TXER)
-#define PC3_DIRC1 (PC3_TXDAT)
-
-/* Handy macro to specify mem for FCCs*/
-#define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128))
-#define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0)
-#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1)
-#define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2)
-
-/* Clocks and GRG's */
-
-enum cpm_clk_dir {
- CPM_CLK_RX,
- CPM_CLK_TX,
- CPM_CLK_RTX
-};
-
-enum cpm_clk_target {
- CPM_CLK_SCC1,
- CPM_CLK_SCC2,
- CPM_CLK_SCC3,
- CPM_CLK_SCC4,
- CPM_CLK_FCC1,
- CPM_CLK_FCC2,
- CPM_CLK_FCC3
-};
-
-enum cpm_clk {
- CPM_CLK_NONE = 0,
- CPM_BRG1, /* Baud Rate Generator 1 */
- CPM_BRG2, /* Baud Rate Generator 2 */
- CPM_BRG3, /* Baud Rate Generator 3 */
- CPM_BRG4, /* Baud Rate Generator 4 */
- CPM_BRG5, /* Baud Rate Generator 5 */
- CPM_BRG6, /* Baud Rate Generator 6 */
- CPM_BRG7, /* Baud Rate Generator 7 */
- CPM_BRG8, /* Baud Rate Generator 8 */
- CPM_CLK1, /* Clock 1 */
- CPM_CLK2, /* Clock 2 */
- CPM_CLK3, /* Clock 3 */
- CPM_CLK4, /* Clock 4 */
- CPM_CLK5, /* Clock 5 */
- CPM_CLK6, /* Clock 6 */
- CPM_CLK7, /* Clock 7 */
- CPM_CLK8, /* Clock 8 */
- CPM_CLK9, /* Clock 9 */
- CPM_CLK10, /* Clock 10 */
- CPM_CLK11, /* Clock 11 */
- CPM_CLK12, /* Clock 12 */
- CPM_CLK13, /* Clock 13 */
- CPM_CLK14, /* Clock 14 */
- CPM_CLK15, /* Clock 15 */
- CPM_CLK16, /* Clock 16 */
- CPM_CLK17, /* Clock 17 */
- CPM_CLK18, /* Clock 18 */
- CPM_CLK19, /* Clock 19 */
- CPM_CLK20, /* Clock 20 */
- CPM_CLK_DUMMY
-};
-
-extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
-
-#endif /* __CPM2__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/delay.h b/include/asm-ppc/delay.h
deleted file mode 100644
index badde68..0000000
--- a/include/asm-ppc/delay.h
+++ /dev/null
@@ -1,66 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_DELAY_H
-#define _PPC_DELAY_H
-
-#include <asm/param.h>
-
-/*
- * Copyright 1996, Paul Mackerras.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-extern unsigned long loops_per_jiffy;
-
-extern void __delay(unsigned int loops);
-
-/*
- * Note that 19 * 226 == 4294 ==~ 2^32 / 10^6, so
- * loops = (4294 * usecs * loops_per_jiffy * HZ) / 2^32.
- *
- * The mulhwu instruction gives us loops = (a * b) / 2^32.
- * We choose a = usecs * 19 * HZ and b = loops_per_jiffy * 226
- * because this lets us support a wide range of HZ and
- * loops_per_jiffy values without either a or b overflowing 2^32.
- * Thus we need usecs * HZ <= (2^32 - 1) / 19 = 226050910 and
- * loops_per_jiffy <= (2^32 - 1) / 226 = 19004280
- * (which corresponds to ~3800 bogomips at HZ = 100).
- * -- paulus
- */
-#define __MAX_UDELAY (226050910UL/HZ) /* maximum udelay argument */
-#define __MAX_NDELAY (4294967295UL/HZ) /* maximum ndelay argument */
-
-extern __inline__ void __udelay(unsigned int x)
-{
- unsigned int loops;
-
- __asm__("mulhwu %0,%1,%2" : "=r" (loops) :
- "r" (x), "r" (loops_per_jiffy * 226));
- __delay(loops);
-}
-
-extern __inline__ void __ndelay(unsigned int x)
-{
- unsigned int loops;
-
- __asm__("mulhwu %0,%1,%2" : "=r" (loops) :
- "r" (x), "r" (loops_per_jiffy * 5));
- __delay(loops);
-}
-
-extern void __bad_udelay(void); /* deliberately undefined */
-extern void __bad_ndelay(void); /* deliberately undefined */
-
-#define udelay(n) (__builtin_constant_p(n)? \
- ((n) > __MAX_UDELAY? __bad_udelay(): __udelay((n) * (19 * HZ))) : \
- __udelay((n) * (19 * HZ)))
-
-#define ndelay(n) (__builtin_constant_p(n)? \
- ((n) > __MAX_NDELAY? __bad_ndelay(): __ndelay((n) * HZ)) : \
- __ndelay((n) * HZ))
-
-#endif /* defined(_PPC_DELAY_H) */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/device.h b/include/asm-ppc/device.h
deleted file mode 100644
index d8f9872..0000000
--- a/include/asm-ppc/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
-/*
- * Arch specific extensions to struct device
- *
- * This file is released under the GPLv2
- */
-#include <asm-generic/device.h>
-
diff --git a/include/asm-ppc/floppy.h b/include/asm-ppc/floppy.h
deleted file mode 100644
index 7d9b3f4..0000000
--- a/include/asm-ppc/floppy.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
- * Architecture specific parts of the Floppy driver
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 1995
- */
-#ifdef __KERNEL__
-#ifndef __ASM_PPC_FLOPPY_H
-#define __ASM_PPC_FLOPPY_H
-
-#define fd_inb(port) inb_p(port)
-#define fd_outb(value,port) outb_p(value,port)
-
-#define fd_disable_dma() fd_ops->_disable_dma(FLOPPY_DMA)
-#define fd_free_dma() fd_ops->_free_dma(FLOPPY_DMA)
-#define fd_get_dma_residue() fd_ops->_get_dma_residue(FLOPPY_DMA)
-#define fd_dma_setup(addr, size, mode, io) fd_ops->_dma_setup(addr, size, mode, io)
-#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
-#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
-#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
-
-static int fd_request_dma(void);
-
-struct fd_dma_ops {
- void (*_disable_dma)(unsigned int dmanr);
- void (*_free_dma)(unsigned int dmanr);
- int (*_get_dma_residue)(unsigned int dummy);
- int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
-};
-
-static int virtual_dma_count;
-static int virtual_dma_residue;
-static char *virtual_dma_addr;
-static int virtual_dma_mode;
-static int doing_vdma;
-static struct fd_dma_ops *fd_ops;
-
-static irqreturn_t floppy_hardint(int irq, void *dev_id)
-{
- unsigned char st;
- int lcount;
- char *lptr;
-
- if (!doing_vdma)
- return floppy_interrupt(irq, dev_id);
-
-
- st = 1;
- for (lcount=virtual_dma_count, lptr=virtual_dma_addr;
- lcount; lcount--, lptr++) {
- st=inb(virtual_dma_port+4) & 0xa0 ;
- if (st != 0xa0)
- break;
- if (virtual_dma_mode)
- outb_p(*lptr, virtual_dma_port+5);
- else
- *lptr = inb_p(virtual_dma_port+5);
- }
- virtual_dma_count = lcount;
- virtual_dma_addr = lptr;
- st = inb(virtual_dma_port+4);
-
- if (st == 0x20)
- return IRQ_HANDLED;
- if (!(st & 0x20)) {
- virtual_dma_residue += virtual_dma_count;
- virtual_dma_count=0;
- doing_vdma = 0;
- floppy_interrupt(irq, dev_id);
- return IRQ_HANDLED;
- }
- return IRQ_HANDLED;
-}
-
-static void vdma_disable_dma(unsigned int dummy)
-{
- doing_vdma = 0;
- virtual_dma_residue += virtual_dma_count;
- virtual_dma_count=0;
-}
-
-static void vdma_nop(unsigned int dummy)
-{
-}
-
-
-static int vdma_get_dma_residue(unsigned int dummy)
-{
- return virtual_dma_count + virtual_dma_residue;
-}
-
-
-static int fd_request_irq(void)
-{
- if (can_use_virtual_dma)
- return request_irq(FLOPPY_IRQ, floppy_hardint,
- IRQF_DISABLED, "floppy", NULL);
- else
- return request_irq(FLOPPY_IRQ, floppy_interrupt,
- IRQF_DISABLED, "floppy", NULL);
-}
-
-static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
-{
- doing_vdma = 1;
- virtual_dma_port = io;
- virtual_dma_mode = (mode == DMA_MODE_WRITE);
- virtual_dma_addr = addr;
- virtual_dma_count = size;
- virtual_dma_residue = 0;
- return 0;
-}
-
-static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
-{
- /* actual, physical DMA */
- doing_vdma = 0;
- clear_dma_ff(FLOPPY_DMA);
- set_dma_mode(FLOPPY_DMA,mode);
- set_dma_addr(FLOPPY_DMA,(unsigned int)virt_to_bus(addr));
- set_dma_count(FLOPPY_DMA,size);
- enable_dma(FLOPPY_DMA);
- return 0;
-}
-
-static struct fd_dma_ops real_dma_ops =
-{
- ._disable_dma = disable_dma,
- ._free_dma = free_dma,
- ._get_dma_residue = get_dma_residue,
- ._dma_setup = hard_dma_setup
-};
-
-static struct fd_dma_ops virt_dma_ops =
-{
- ._disable_dma = vdma_disable_dma,
- ._free_dma = vdma_nop,
- ._get_dma_residue = vdma_get_dma_residue,
- ._dma_setup = vdma_dma_setup
-};
-
-static int fd_request_dma()
-{
- if (can_use_virtual_dma & 1) {
- fd_ops = &virt_dma_ops;
- return 0;
- }
- else {
- fd_ops = &real_dma_ops;
- return request_dma(FLOPPY_DMA, "floppy");
- }
-}
-
-static int FDC1 = 0x3f0;
-static int FDC2 = -1;
-
-/*
- * Again, the CMOS information not available
- */
-#define FLOPPY0_TYPE 6
-#define FLOPPY1_TYPE 0
-
-#define N_FDC 2 /* Don't change this! */
-#define N_DRIVE 8
-
-/*
- * The PowerPC has no problems with floppy DMA crossing 64k borders.
- */
-#define CROSS_64KB(a,s) (0)
-
-#endif /* __ASM_PPC_FLOPPY_H */
-
-#define EXTRA_FLOPPY_PARAMS
-
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/fs_pd.h b/include/asm-ppc/fs_pd.h
deleted file mode 100644
index 8691327..0000000
--- a/include/asm-ppc/fs_pd.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * Platform information definitions.
- *
- * 2006 (c) MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifndef FS_PD_H
-#define FS_PD_H
-
-static inline int uart_baudrate(void)
-{
- int baud;
- bd_t *bd = (bd_t *) __res;
-
- if (bd->bi_baudrate)
- baud = bd->bi_baudrate;
- else
- baud = -1;
- return baud;
-}
-
-static inline int uart_clock(void)
-{
- return (((bd_t *) __res)->bi_intfreq);
-}
-
-#define cpm2_map(member) (&cpm2_immr->member)
-#define cpm2_map_size(member, size) (&cpm2_immr->member)
-#define cpm2_unmap(addr) do {} while(0)
-
-#endif
diff --git a/include/asm-ppc/gg2.h b/include/asm-ppc/gg2.h
deleted file mode 100644
index 341ae55..0000000
--- a/include/asm-ppc/gg2.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * include/asm-ppc/gg2.h -- VLSI VAS96011/12 `Golden Gate 2' register definitions
- *
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is based on the following documentation:
- *
- * The VAS96011/12 Chipset, Data Book, Edition 1.0
- * VLSI Technology, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASMPPC_GG2_H
-#define _ASMPPC_GG2_H
-
- /*
- * Memory Map (CHRP mode)
- */
-
-#define GG2_PCI_MEM_BASE 0xc0000000 /* Peripheral memory space */
-#define GG2_ISA_MEM_BASE 0xf7000000 /* Peripheral memory alias */
-#define GG2_ISA_IO_BASE 0xf8000000 /* Peripheral I/O space */
-#define GG2_PCI_CONFIG_BASE 0xfec00000 /* PCI configuration space */
-#define GG2_INT_ACK_SPECIAL 0xfec80000 /* Interrupt acknowledge and */
- /* special PCI cycles */
-#define GG2_ROM_BASE0 0xff000000 /* ROM bank 0 */
-#define GG2_ROM_BASE1 0xff800000 /* ROM bank 1 */
-
-
- /*
- * GG2 specific PCI Registers
- */
-
-extern void __iomem *gg2_pci_config_base; /* kernel virtual address */
-
-#define GG2_PCI_BUSNO 0x40 /* Bus number */
-#define GG2_PCI_SUBBUSNO 0x41 /* Subordinate bus number */
-#define GG2_PCI_DISCCTR 0x42 /* Disconnect counter */
-#define GG2_PCI_PPC_CTRL 0x50 /* PowerPC interface control register */
-#define GG2_PCI_ADDR_MAP 0x5c /* Address map */
-#define GG2_PCI_PCI_CTRL 0x60 /* PCI interface control register */
-#define GG2_PCI_ROM_CTRL 0x70 /* ROM interface control register */
-#define GG2_PCI_ROM_TIME 0x74 /* ROM timing */
-#define GG2_PCI_CC_CTRL 0x80 /* Cache controller control register */
-#define GG2_PCI_DRAM_BANK0 0x90 /* Control register for DRAM bank #0 */
-#define GG2_PCI_DRAM_BANK1 0x94 /* Control register for DRAM bank #1 */
-#define GG2_PCI_DRAM_BANK2 0x98 /* Control register for DRAM bank #2 */
-#define GG2_PCI_DRAM_BANK3 0x9c /* Control register for DRAM bank #3 */
-#define GG2_PCI_DRAM_BANK4 0xa0 /* Control register for DRAM bank #4 */
-#define GG2_PCI_DRAM_BANK5 0xa4 /* Control register for DRAM bank #5 */
-#define GG2_PCI_DRAM_TIME0 0xb0 /* Timing parameters set #0 */
-#define GG2_PCI_DRAM_TIME1 0xb4 /* Timing parameters set #1 */
-#define GG2_PCI_DRAM_CTRL 0xc0 /* DRAM control */
-#define GG2_PCI_ERR_CTRL 0xd0 /* Error control register */
-#define GG2_PCI_ERR_STATUS 0xd4 /* Error status register */
- /* Cleared when read */
-
-#endif /* _ASMPPC_GG2_H */
diff --git a/include/asm-ppc/gt64260.h b/include/asm-ppc/gt64260.h
deleted file mode 100644
index 9e63b3c..0000000
--- a/include/asm-ppc/gt64260.h
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * include/asm-ppc/gt64260.h
- *
- * Prototypes, etc. for the Marvell/Galileo GT64260 host bridge routines.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASMPPC_GT64260_H
-#define __ASMPPC_GT64260_H
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/gt64260_defs.h>
-
-
-extern u32 gt64260_base;
-extern u32 gt64260_irq_base; /* We handle the next 96 IRQs from here */
-extern u32 gt64260_revision;
-extern u8 gt64260_pci_exclude_bridge;
-
-#ifndef TRUE
-#define TRUE 1
-#endif
-
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-/* IRQs defined by the 64260 */
-#define GT64260_IRQ_MPSC0 40
-#define GT64260_IRQ_MPSC1 42
-#define GT64260_IRQ_SDMA 36
-
-/*
- * Define a default physical memory map to be set up on the bridge.
- * Also define a struct to pass that info from board-specific routines to
- * GT64260 generic set up routines. By passing this info in, the board
- * support developer can modify it at will.
- */
-
-/*
- * This is the default memory map:
- * CPU PCI
- * --- ---
- * PCI 0 I/O: 0xfa000000-0xfaffffff 0x00000000-0x00ffffff
- * PCI 1 I/O: 0xfb000000-0xfbffffff 0x01000000-0x01ffffff
- * PCI 0 MEM: 0x80000000-0x8fffffff 0x80000000-0x8fffffff
- * PCI 1 MEM: 0x90000000-0x9fffffff 0x90000000-0x9fffffff
- */
-
-/* Default physical memory map for the GT64260 bridge */
-
-/*
- * PCI Bus 0 Definitions
- */
-#define GT64260_PCI_0_IO_SIZE 0x01000000U
-#define GT64260_PCI_0_MEM_SIZE 0x10000000U
-
-/* Processor Physical addresses */
-#define GT64260_PCI_0_IO_START_PROC 0xfa000000U
-#define GT64260_PCI_0_IO_END_PROC (GT64260_PCI_0_IO_START_PROC + \
- GT64260_PCI_0_IO_SIZE - 1)
-
-/* PCI 0 addresses */
-#define GT64260_PCI_0_IO_START 0x00000000U
-#define GT64260_PCI_0_IO_END (GT64260_PCI_0_IO_START + \
- GT64260_PCI_0_IO_SIZE - 1)
-
-/* Processor Physical addresses */
-#define GT64260_PCI_0_MEM_START_PROC 0x80000000U
-#define GT64260_PCI_0_MEM_END_PROC (GT64260_PCI_0_MEM_START_PROC + \
- GT64260_PCI_0_MEM_SIZE - 1)
-
-/* PCI 0 addresses */
-#define GT64260_PCI_0_MEM_START 0x80000000U
-#define GT64260_PCI_0_MEM_END (GT64260_PCI_0_MEM_START + \
- GT64260_PCI_0_MEM_SIZE - 1)
-
-/*
- * PCI Bus 1 Definitions
- */
-#define GT64260_PCI_1_IO_SIZE 0x01000000U
-#define GT64260_PCI_1_MEM_SIZE 0x10000000U
-
-/* PCI 1 addresses */
-#define GT64260_PCI_1_IO_START 0x01000000U
-#define GT64260_PCI_1_IO_END (GT64260_PCI_1_IO_START + \
- GT64260_PCI_1_IO_SIZE - 1)
-
-/* Processor Physical addresses */
-#define GT64260_PCI_1_IO_START_PROC 0xfb000000U
-#define GT64260_PCI_1_IO_END_PROC (GT64260_PCI_1_IO_START_PROC + \
- GT64260_PCI_1_IO_SIZE - 1)
-
-/* PCI 1 addresses */
-#define GT64260_PCI_1_MEM_START 0x90000000U
-#define GT64260_PCI_1_MEM_END (GT64260_PCI_1_MEM_START + \
- GT64260_PCI_1_MEM_SIZE - 1)
-
-/* Processor Physical addresses */
-#define GT64260_PCI_1_MEM_START_PROC 0x90000000U
-#define GT64260_PCI_1_MEM_END_PROC (GT64260_PCI_1_MEM_START_PROC + \
- GT64260_PCI_1_MEM_SIZE - 1)
-
-/* Define struct to pass mem-map info into gt64260_common.c code */
-typedef struct {
- struct pci_controller *hose_a;
- struct pci_controller *hose_b;
-
- u32 mem_size;
-
- u32 pci_0_io_start_proc;
- u32 pci_0_io_start_pci;
- u32 pci_0_io_size;
- u32 pci_0_io_swap;
-
- u32 pci_0_mem_start_proc;
- u32 pci_0_mem_start_pci_hi;
- u32 pci_0_mem_start_pci_lo;
- u32 pci_0_mem_size;
- u32 pci_0_mem_swap;
-
- u32 pci_1_io_start_proc;
- u32 pci_1_io_start_pci;
- u32 pci_1_io_size;
- u32 pci_1_io_swap;
-
- u32 pci_1_mem_start_proc;
- u32 pci_1_mem_start_pci_hi;
- u32 pci_1_mem_start_pci_lo;
- u32 pci_1_mem_size;
- u32 pci_1_mem_swap;
-} gt64260_bridge_info_t;
-
-#define GT64260_BRIDGE_INFO_DEFAULT(ip, ms) { \
- (ip)->mem_size = (ms); \
- \
- (ip)->pci_0_io_start_proc = GT64260_PCI_0_IO_START_PROC; \
- (ip)->pci_0_io_start_pci = GT64260_PCI_0_IO_START; \
- (ip)->pci_0_io_size = GT64260_PCI_0_IO_SIZE; \
- (ip)->pci_0_io_swap = GT64260_CPU_PCI_SWAP_NONE; \
- \
- (ip)->pci_0_mem_start_proc = GT64260_PCI_0_MEM_START_PROC; \
- (ip)->pci_0_mem_start_pci_hi = 0x00000000; \
- (ip)->pci_0_mem_start_pci_lo = GT64260_PCI_0_MEM_START; \
- (ip)->pci_0_mem_size = GT64260_PCI_0_MEM_SIZE; \
- (ip)->pci_0_mem_swap = GT64260_CPU_PCI_SWAP_NONE; \
- \
- (ip)->pci_1_io_start_proc = GT64260_PCI_1_IO_START_PROC; \
- (ip)->pci_1_io_start_pci = GT64260_PCI_1_IO_START; \
- (ip)->pci_1_io_size = GT64260_PCI_1_IO_SIZE; \
- (ip)->pci_1_io_swap = GT64260_CPU_PCI_SWAP_NONE; \
- \
- (ip)->pci_1_mem_start_proc = GT64260_PCI_1_MEM_START_PROC; \
- (ip)->pci_1_mem_start_pci_hi = 0x00000000; \
- (ip)->pci_1_mem_start_pci_lo = GT64260_PCI_1_MEM_START; \
- (ip)->pci_1_mem_size = GT64260_PCI_1_MEM_SIZE; \
- (ip)->pci_1_mem_swap = GT64260_CPU_PCI_SWAP_NONE; \
-}
-
-/*
- *****************************************************************************
- *
- * I/O macros to access the 64260's registers
- *
- *****************************************************************************
- */
-
-extern inline uint32_t gt_read(uint32_t offs){
- return (in_le32((volatile uint *)(gt64260_base + offs)));
-}
-extern inline void gt_write(uint32_t offs, uint32_t d){
- out_le32((volatile uint *)(gt64260_base + offs), d);
-}
-
-#if 0 /* paranoid SMP version */
-extern inline void gt_modify(u32 offs, u32 data, u32 mask) \
-{
- uint32_t reg;
- spin_lock(>64260_lock);
- reg = gt_read(offs) & (~mask); /* zero any bits we care about*/
- reg |= data & mask; /* set bits from the data */
- gt_write(offs, reg);
- spin_unlock(>64260_lock);
-}
-#else
-extern inline void gt_modify(uint32_t offs, uint32_t data, uint32_t mask)
-{
- uint32_t reg;
- reg = gt_read(offs) & (~(mask)); /* zero any bits we care about*/
- reg |= (data) & (mask); /* set bits from the data */
- gt_write(offs, reg);
-}
-#endif
-#define gt_set_bits(offs, bits) gt_modify(offs, ~0, bits)
-
-#define gt_clr_bits(offs, bits) gt_modify(offs, 0, bits)
-
-
-/*
- *****************************************************************************
- *
- * Function Prototypes
- *
- *****************************************************************************
- */
-
-int gt64260_find_bridges(u32 phys_base_addr, gt64260_bridge_info_t *info,
- int ((*map_irq)(struct pci_dev *, unsigned char, unsigned char)));
-int gt64260_bridge_init(gt64260_bridge_info_t *info);
-int gt64260_cpu_scs_set_window(u32 window,
- u32 base_addr,
- u32 size);
-int gt64260_cpu_cs_set_window(u32 window,
- u32 base_addr,
- u32 size);
-int gt64260_cpu_boot_set_window(u32 base_addr,
- u32 size);
-int gt64260_cpu_set_pci_io_window(u32 pci_bus,
- u32 cpu_base_addr,
- u32 pci_base_addr,
- u32 size,
- u32 swap);
-int gt64260_cpu_set_pci_mem_window(u32 pci_bus,
- u32 window,
- u32 cpu_base_addr,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 size,
- u32 swap_64bit);
-int gt64260_cpu_prot_set_window(u32 window,
- u32 base_addr,
- u32 size,
- u32 access_bits);
-int gt64260_cpu_snoop_set_window(u32 window,
- u32 base_addr,
- u32 size,
- u32 snoop_type);
-void gt64260_cpu_disable_all_windows(void);
-int gt64260_pci_bar_enable(u32 pci_bus, u32 enable_bits);
-int gt64260_pci_slave_scs_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr,
- u32 cpu_base_addr,
- u32 size);
-int gt64260_pci_slave_cs_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr,
- u32 cpu_base_addr,
- u32 size);
-int gt64260_pci_slave_boot_set_window(struct pci_controller *hose,
- u32 pci_base_addr,
- u32 cpu_base_addr,
- u32 size);
-int gt64260_pci_slave_p2p_mem_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr,
- u32 other_bus_base_addr,
- u32 size);
-int gt64260_pci_slave_p2p_io_set_window(struct pci_controller *hose,
- u32 pci_base_addr,
- u32 other_bus_base_addr,
- u32 size);
-int gt64260_pci_slave_dac_scs_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 cpu_base_addr,
- u32 size);
-int gt64260_pci_slave_dac_cs_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 cpu_base_addr,
- u32 size);
-int gt64260_pci_slave_dac_boot_set_window(struct pci_controller *hose,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 cpu_base_addr,
- u32 size);
-int gt64260_pci_slave_dac_p2p_mem_set_window(struct pci_controller *hose,
- u32 window,
- u32 pci_base_addr_hi,
- u32 pci_base_addr_lo,
- u32 other_bus_base_addr,
- u32 size);
-int gt64260_pci_acc_cntl_set_window(u32 pci_bus,
- u32 window,
- u32 base_addr_hi,
- u32 base_addr_lo,
- u32 size,
- u32 features);
-int gt64260_pci_snoop_set_window(u32 pci_bus,
- u32 window,
- u32 base_addr_hi,
- u32 base_addr_lo,
- u32 size,
- u32 snoop_type);
-int gt64260_set_base(u32 new_base);
-int gt64260_get_base(u32 *base);
-int gt64260_pci_exclude_device(u8 bus, u8 devfn);
-
-void gt64260_init_irq(void);
-int gt64260_get_irq(void);
-
-void gt64260_mpsc_progress(char *s, unsigned short hex);
-
-#endif /* __ASMPPC_GT64260_H */
diff --git a/include/asm-ppc/gt64260_defs.h b/include/asm-ppc/gt64260_defs.h
deleted file mode 100644
index 6ffd01a..0000000
--- a/include/asm-ppc/gt64260_defs.h
+++ /dev/null
@@ -1,1010 +0,0 @@
-/*
- * include/asm-ppc/gt64260_defs.h
- *
- * Register definitions for the Marvell/Galileo GT64260 host bridge.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASMPPC_GT64260_DEFS_H
-#define __ASMPPC_GT64260_DEFS_H
-
-/*
- * Define a macro to represent the supported version of the 64260.
- */
-#define GT64260 0x01
-#define GT64260A 0x10
-
-/*
- *****************************************************************************
- *
- * CPU Interface Registers
- *
- *****************************************************************************
- */
-
-/* CPU physical address of 64260's registers */
-#define GT64260_INTERNAL_SPACE_DECODE 0x0068
-#define GT64260_INTERNAL_SPACE_SIZE 0x10000
-#define GT64260_INTERNAL_SPACE_DEFAULT_ADDR 0x14000000
-
-/* CPU Memory Controller Window Registers (4 windows) */
-#define GT64260_CPU_SCS_DECODE_WINDOWS 4
-
-#define GT64260_CPU_SCS_DECODE_0_BOT 0x0008
-#define GT64260_CPU_SCS_DECODE_0_TOP 0x0010
-#define GT64260_CPU_SCS_DECODE_1_BOT 0x0208
-#define GT64260_CPU_SCS_DECODE_1_TOP 0x0210
-#define GT64260_CPU_SCS_DECODE_2_BOT 0x0018
-#define GT64260_CPU_SCS_DECODE_2_TOP 0x0020
-#define GT64260_CPU_SCS_DECODE_3_BOT 0x0218
-#define GT64260_CPU_SCS_DECODE_3_TOP 0x0220
-
-/* CPU Device Controller Window Registers (4 windows) */
-#define GT64260_CPU_CS_DECODE_WINDOWS 4
-
-#define GT64260_CPU_CS_DECODE_0_BOT 0x0028
-#define GT64260_CPU_CS_DECODE_0_TOP 0x0030
-#define GT64260_CPU_CS_DECODE_1_BOT 0x0228
-#define GT64260_CPU_CS_DECODE_1_TOP 0x0230
-#define GT64260_CPU_CS_DECODE_2_BOT 0x0248
-#define GT64260_CPU_CS_DECODE_2_TOP 0x0250
-#define GT64260_CPU_CS_DECODE_3_BOT 0x0038
-#define GT64260_CPU_CS_DECODE_3_TOP 0x0040
-
-#define GT64260_CPU_BOOT_CS_DECODE_0_BOT 0x0238
-#define GT64260_CPU_BOOT_CS_DECODE_0_TOP 0x0240
-
-/* CPU Windows to PCI space (2 PCI buses each w/ 1 I/O & 4 MEM windows) */
-#define GT64260_PCI_BUSES 2
-#define GT64260_PCI_IO_WINDOWS_PER_BUS 1
-#define GT64260_PCI_MEM_WINDOWS_PER_BUS 4
-
-#define GT64260_CPU_PCI_SWAP_BYTE 0x00000000
-#define GT64260_CPU_PCI_SWAP_NONE 0x01000000
-#define GT64260_CPU_PCI_SWAP_BYTE_WORD 0x02000000
-#define GT64260_CPU_PCI_SWAP_WORD 0x03000000
-#define GT64260_CPU_PCI_SWAP_MASK 0x07000000
-
-#define GT64260_CPU_PCI_MEM_REQ64 (1<<27)
-
-#define GT64260_CPU_PCI_0_IO_DECODE_BOT 0x0048
-#define GT64260_CPU_PCI_0_IO_DECODE_TOP 0x0050
-#define GT64260_CPU_PCI_0_MEM_0_DECODE_BOT 0x0058
-#define GT64260_CPU_PCI_0_MEM_0_DECODE_TOP 0x0060
-#define GT64260_CPU_PCI_0_MEM_1_DECODE_BOT 0x0080
-#define GT64260_CPU_PCI_0_MEM_1_DECODE_TOP 0x0088
-#define GT64260_CPU_PCI_0_MEM_2_DECODE_BOT 0x0258
-#define GT64260_CPU_PCI_0_MEM_2_DECODE_TOP 0x0260
-#define GT64260_CPU_PCI_0_MEM_3_DECODE_BOT 0x0280
-#define GT64260_CPU_PCI_0_MEM_3_DECODE_TOP 0x0288
-
-#define GT64260_CPU_PCI_0_IO_REMAP 0x00f0
-#define GT64260_CPU_PCI_0_MEM_0_REMAP_LO 0x00f8
-#define GT64260_CPU_PCI_0_MEM_0_REMAP_HI 0x0320
-#define GT64260_CPU_PCI_0_MEM_1_REMAP_LO 0x0100
-#define GT64260_CPU_PCI_0_MEM_1_REMAP_HI 0x0328
-#define GT64260_CPU_PCI_0_MEM_2_REMAP_LO 0x02f8
-#define GT64260_CPU_PCI_0_MEM_2_REMAP_HI 0x0330
-#define GT64260_CPU_PCI_0_MEM_3_REMAP_LO 0x0300
-#define GT64260_CPU_PCI_0_MEM_3_REMAP_HI 0x0338
-
-#define GT64260_CPU_PCI_1_IO_DECODE_BOT 0x0090
-#define GT64260_CPU_PCI_1_IO_DECODE_TOP 0x0098
-#define GT64260_CPU_PCI_1_MEM_0_DECODE_BOT 0x00a0
-#define GT64260_CPU_PCI_1_MEM_0_DECODE_TOP 0x00a8
-#define GT64260_CPU_PCI_1_MEM_1_DECODE_BOT 0x00b0
-#define GT64260_CPU_PCI_1_MEM_1_DECODE_TOP 0x00b8
-#define GT64260_CPU_PCI_1_MEM_2_DECODE_BOT 0x02a0
-#define GT64260_CPU_PCI_1_MEM_2_DECODE_TOP 0x02a8
-#define GT64260_CPU_PCI_1_MEM_3_DECODE_BOT 0x02b0
-#define GT64260_CPU_PCI_1_MEM_3_DECODE_TOP 0x02b8
-
-#define GT64260_CPU_PCI_1_IO_REMAP 0x0108
-#define GT64260_CPU_PCI_1_MEM_0_REMAP_LO 0x0110
-#define GT64260_CPU_PCI_1_MEM_0_REMAP_HI 0x0340
-#define GT64260_CPU_PCI_1_MEM_1_REMAP_LO 0x0118
-#define GT64260_CPU_PCI_1_MEM_1_REMAP_HI 0x0348
-#define GT64260_CPU_PCI_1_MEM_2_REMAP_LO 0x0310
-#define GT64260_CPU_PCI_1_MEM_2_REMAP_HI 0x0350
-#define GT64260_CPU_PCI_1_MEM_3_REMAP_LO 0x0318
-#define GT64260_CPU_PCI_1_MEM_3_REMAP_HI 0x0358
-
-/* CPU Control Registers */
-#define GT64260_CPU_CONFIG 0x0000
-#define GT64260_CPU_MODE 0x0120
-#define GT64260_CPU_MASTER_CNTL 0x0160
-#define GT64260_CPU_XBAR_CNTL_LO 0x0150
-#define GT64260_CPU_XBAR_CNTL_HI 0x0158
-#define GT64260_CPU_XBAR_TO 0x0168
-#define GT64260_CPU_RR_XBAR_CNTL_LO 0x0170
-#define GT64260_CPU_RR_XBAR_CNTL_HI 0x0178
-
-/* CPU Sync Barrier Registers */
-#define GT64260_CPU_SYNC_BARRIER_PCI_0 0x00c0
-#define GT64260_CPU_SYNC_BARRIER_PCI_1 0x00c8
-
-/* CPU Access Protection Registers */
-#define GT64260_CPU_PROT_WINDOWS 8
-
-#define GT64260_CPU_PROT_ACCPROTECT (1<<16)
-#define GT64260_CPU_PROT_WRPROTECT (1<<17)
-#define GT64260_CPU_PROT_CACHEPROTECT (1<<18)
-
-#define GT64260_CPU_PROT_BASE_0 0x0180
-#define GT64260_CPU_PROT_TOP_0 0x0188
-#define GT64260_CPU_PROT_BASE_1 0x0190
-#define GT64260_CPU_PROT_TOP_1 0x0198
-#define GT64260_CPU_PROT_BASE_2 0x01a0
-#define GT64260_CPU_PROT_TOP_2 0x01a8
-#define GT64260_CPU_PROT_BASE_3 0x01b0
-#define GT64260_CPU_PROT_TOP_3 0x01b8
-#define GT64260_CPU_PROT_BASE_4 0x01c0
-#define GT64260_CPU_PROT_TOP_4 0x01c8
-#define GT64260_CPU_PROT_BASE_5 0x01d0
-#define GT64260_CPU_PROT_TOP_5 0x01d8
-#define GT64260_CPU_PROT_BASE_6 0x01e0
-#define GT64260_CPU_PROT_TOP_6 0x01e8
-#define GT64260_CPU_PROT_BASE_7 0x01f0
-#define GT64260_CPU_PROT_TOP_7 0x01f8
-
-/* CPU Snoop Control Registers */
-#define GT64260_CPU_SNOOP_WINDOWS 4
-
-#define GT64260_CPU_SNOOP_NONE 0x00000000
-#define GT64260_CPU_SNOOP_WT 0x00010000
-#define GT64260_CPU_SNOOP_WB 0x00020000
-#define GT64260_CPU_SNOOP_MASK 0x00030000
-#define GT64260_CPU_SNOOP_ALL_BITS GT64260_CPU_SNOOP_MASK
-
-#define GT64260_CPU_SNOOP_BASE_0 0x0380
-#define GT64260_CPU_SNOOP_TOP_0 0x0388
-#define GT64260_CPU_SNOOP_BASE_1 0x0390
-#define GT64260_CPU_SNOOP_TOP_1 0x0398
-#define GT64260_CPU_SNOOP_BASE_2 0x03a0
-#define GT64260_CPU_SNOOP_TOP_2 0x03a8
-#define GT64260_CPU_SNOOP_BASE_3 0x03b0
-#define GT64260_CPU_SNOOP_TOP_3 0x03b8
-
-/* CPU Error Report Registers */
-#define GT64260_CPU_ERR_ADDR_LO 0x0070
-#define GT64260_CPU_ERR_ADDR_HI 0x0078
-#define GT64260_CPU_ERR_DATA_LO 0x0128
-#define GT64260_CPU_ERR_DATA_HI 0x0130
-#define GT64260_CPU_ERR_PARITY 0x0138
-#define GT64260_CPU_ERR_CAUSE 0x0140
-#define GT64260_CPU_ERR_MASK 0x0148
-
-
-/*
- *****************************************************************************
- *
- * SDRAM Cotnroller Registers
- *
- *****************************************************************************
- */
-
-/* SDRAM Config Registers */
-#define GT64260_SDRAM_CONFIG 0x0448
-#define GT64260_SDRAM_OPERATION_MODE 0x0474
-#define GT64260_SDRAM_ADDR_CNTL 0x047c
-#define GT64260_SDRAM_TIMING_PARAMS 0x04b4
-#define GT64260_SDRAM_UMA_CNTL 0x04a4
-#define GT64260_SDRAM_XBAR_CNTL_LO 0x04a8
-#define GT64260_SDRAM_XBAR_CNTL_HI 0x04ac
-#define GT64260_SDRAM_XBAR_CNTL_TO 0x04b0
-
-/* SDRAM Banks Parameters Registers */
-#define GT64260_SDRAM_BANK_PARAMS_0 0x044c
-#define GT64260_SDRAM_BANK_PARAMS_1 0x0450
-#define GT64260_SDRAM_BANK_PARAMS_2 0x0454
-#define GT64260_SDRAM_BANK_PARAMS_3 0x0458
-
-/* SDRAM Error Report Registers */
-#define GT64260_SDRAM_ERR_DATA_LO 0x0484
-#define GT64260_SDRAM_ERR_DATA_HI 0x0480
-#define GT64260_SDRAM_ERR_ADDR 0x0490
-#define GT64260_SDRAM_ERR_ECC_RCVD 0x0488
-#define GT64260_SDRAM_ERR_ECC_CALC 0x048c
-#define GT64260_SDRAM_ERR_ECC_CNTL 0x0494
-#define GT64260_SDRAM_ERR_ECC_ERR_CNT 0x0498
-
-
-/*
- *****************************************************************************
- *
- * Device/BOOT Cotnroller Registers
- *
- *****************************************************************************
- */
-
-/* Device Control Registers */
-#define GT64260_DEV_BANK_PARAMS_0 0x045c
-#define GT64260_DEV_BANK_PARAMS_1 0x0460
-#define GT64260_DEV_BANK_PARAMS_2 0x0464
-#define GT64260_DEV_BANK_PARAMS_3 0x0468
-#define GT64260_DEV_BOOT_PARAMS 0x046c
-#define GT64260_DEV_IF_CNTL 0x04c0
-#define GT64260_DEV_IF_XBAR_CNTL_LO 0x04c8
-#define GT64260_DEV_IF_XBAR_CNTL_HI 0x04cc
-#define GT64260_DEV_IF_XBAR_CNTL_TO 0x04c4
-
-/* Device Interrupt Registers */
-#define GT64260_DEV_INTR_CAUSE 0x04d0
-#define GT64260_DEV_INTR_MASK 0x04d4
-#define GT64260_DEV_INTR_ERR_ADDR 0x04d8
-
-
-/*
- *****************************************************************************
- *
- * PCI Bridge Interface Registers
- *
- *****************************************************************************
- */
-
-/* PCI Configuration Access Registers */
-#define GT64260_PCI_0_CONFIG_ADDR 0x0cf8
-#define GT64260_PCI_0_CONFIG_DATA 0x0cfc
-#define GT64260_PCI_0_IACK 0x0c34
-
-#define GT64260_PCI_1_CONFIG_ADDR 0x0c78
-#define GT64260_PCI_1_CONFIG_DATA 0x0c7c
-#define GT64260_PCI_1_IACK 0x0cb4
-
-/* PCI Control Registers */
-#define GT64260_PCI_0_CMD 0x0c00
-#define GT64260_PCI_0_MODE 0x0d00
-#define GT64260_PCI_0_TO_RETRY 0x0c04
-#define GT64260_PCI_0_RD_BUF_DISCARD_TIMER 0x0d04
-#define GT64260_PCI_0_MSI_TRIGGER_TIMER 0x0c38
-#define GT64260_PCI_0_ARBITER_CNTL 0x1d00
-#define GT64260_PCI_0_XBAR_CNTL_LO 0x1d08
-#define GT64260_PCI_0_XBAR_CNTL_HI 0x1d0c
-#define GT64260_PCI_0_XBAR_CNTL_TO 0x1d04
-#define GT64260_PCI_0_RD_RESP_XBAR_CNTL_LO 0x1d18
-#define GT64260_PCI_0_RD_RESP_XBAR_CNTL_HI 0x1d1c
-#define GT64260_PCI_0_SYNC_BARRIER 0x1d10
-#define GT64260_PCI_0_P2P_CONFIG 0x1d14
-#define GT64260_PCI_0_P2P_SWAP_CNTL 0x1d54
-
-#define GT64260_PCI_1_CMD 0x0c80
-#define GT64260_PCI_1_MODE 0x0d80
-#define GT64260_PCI_1_TO_RETRY 0x0c84
-#define GT64260_PCI_1_RD_BUF_DISCARD_TIMER 0x0d84
-#define GT64260_PCI_1_MSI_TRIGGER_TIMER 0x0cb8
-#define GT64260_PCI_1_ARBITER_CNTL 0x1d80
-#define GT64260_PCI_1_XBAR_CNTL_LO 0x1d88
-#define GT64260_PCI_1_XBAR_CNTL_HI 0x1d8c
-#define GT64260_PCI_1_XBAR_CNTL_TO 0x1d84
-#define GT64260_PCI_1_RD_RESP_XBAR_CNTL_LO 0x1d98
-#define GT64260_PCI_1_RD_RESP_XBAR_CNTL_HI 0x1d9c
-#define GT64260_PCI_1_SYNC_BARRIER 0x1d90
-#define GT64260_PCI_1_P2P_CONFIG 0x1d94
-#define GT64260_PCI_1_P2P_SWAP_CNTL 0x1dd4
-
-/* PCI Access Control Regions Registers */
-#define GT64260_PCI_ACC_CNTL_WINDOWS 8
-
-#define GT64260_PCI_ACC_CNTL_PREFETCHEN (1<<12)
-#define GT64260_PCI_ACC_CNTL_DREADEN (1<<13)
-#define GT64260_PCI_ACC_CNTL_RDPREFETCH (1<<16)
-#define GT64260_PCI_ACC_CNTL_RDLINEPREFETCH (1<<17)
-#define GT64260_PCI_ACC_CNTL_RDMULPREFETCH (1<<18)
-#define GT64260_PCI_ACC_CNTL_MBURST_4_WORDS 0x00000000
-#define GT64260_PCI_ACC_CNTL_MBURST_8_WORDS 0x00100000
-#define GT64260_PCI_ACC_CNTL_MBURST_16_WORDS 0x00200000
-#define GT64260_PCI_ACC_CNTL_MBURST_MASK 0x00300000
-#define GT64260_PCI_ACC_CNTL_SWAP_BYTE 0x00000000
-#define GT64260_PCI_ACC_CNTL_SWAP_NONE 0x01000000
-#define GT64260_PCI_ACC_CNTL_SWAP_BYTE_WORD 0x02000000
-#define GT64260_PCI_ACC_CNTL_SWAP_WORD 0x03000000
-#define GT64260_PCI_ACC_CNTL_SWAP_MASK 0x03000000
-#define GT64260_PCI_ACC_CNTL_ACCPROT (1<<28)
-#define GT64260_PCI_ACC_CNTL_WRPROT (1<<29)
-
-#define GT64260_PCI_ACC_CNTL_ALL_BITS (GT64260_PCI_ACC_CNTL_PREFETCHEN | \
- GT64260_PCI_ACC_CNTL_DREADEN | \
- GT64260_PCI_ACC_CNTL_RDPREFETCH | \
- GT64260_PCI_ACC_CNTL_RDLINEPREFETCH |\
- GT64260_PCI_ACC_CNTL_RDMULPREFETCH | \
- GT64260_PCI_ACC_CNTL_MBURST_MASK | \
- GT64260_PCI_ACC_CNTL_SWAP_MASK | \
- GT64260_PCI_ACC_CNTL_ACCPROT| \
- GT64260_PCI_ACC_CNTL_WRPROT)
-
-#define GT64260_PCI_0_ACC_CNTL_0_BASE_LO 0x1e00
-#define GT64260_PCI_0_ACC_CNTL_0_BASE_HI 0x1e04
-#define GT64260_PCI_0_ACC_CNTL_0_TOP 0x1e08
-#define GT64260_PCI_0_ACC_CNTL_1_BASE_LO 0x1e10
-#define GT64260_PCI_0_ACC_CNTL_1_BASE_HI 0x1e14
-#define GT64260_PCI_0_ACC_CNTL_1_TOP 0x1e18
-#define GT64260_PCI_0_ACC_CNTL_2_BASE_LO 0x1e20
-#define GT64260_PCI_0_ACC_CNTL_2_BASE_HI 0x1e24
-#define GT64260_PCI_0_ACC_CNTL_2_TOP 0x1e28
-#define GT64260_PCI_0_ACC_CNTL_3_BASE_LO 0x1e30
-#define GT64260_PCI_0_ACC_CNTL_3_BASE_HI 0x1e34
-#define GT64260_PCI_0_ACC_CNTL_3_TOP 0x1e38
-#define GT64260_PCI_0_ACC_CNTL_4_BASE_LO 0x1e40
-#define GT64260_PCI_0_ACC_CNTL_4_BASE_HI 0x1e44
-#define GT64260_PCI_0_ACC_CNTL_4_TOP 0x1e48
-#define GT64260_PCI_0_ACC_CNTL_5_BASE_LO 0x1e50
-#define GT64260_PCI_0_ACC_CNTL_5_BASE_HI 0x1e54
-#define GT64260_PCI_0_ACC_CNTL_5_TOP 0x1e58
-#define GT64260_PCI_0_ACC_CNTL_6_BASE_LO 0x1e60
-#define GT64260_PCI_0_ACC_CNTL_6_BASE_HI 0x1e64
-#define GT64260_PCI_0_ACC_CNTL_6_TOP 0x1e68
-#define GT64260_PCI_0_ACC_CNTL_7_BASE_LO 0x1e70
-#define GT64260_PCI_0_ACC_CNTL_7_BASE_HI 0x1e74
-#define GT64260_PCI_0_ACC_CNTL_7_TOP 0x1e78
-
-#define GT64260_PCI_1_ACC_CNTL_0_BASE_LO 0x1e80
-#define GT64260_PCI_1_ACC_CNTL_0_BASE_HI 0x1e84
-#define GT64260_PCI_1_ACC_CNTL_0_TOP 0x1e88
-#define GT64260_PCI_1_ACC_CNTL_1_BASE_LO 0x1e90
-#define GT64260_PCI_1_ACC_CNTL_1_BASE_HI 0x1e94
-#define GT64260_PCI_1_ACC_CNTL_1_TOP 0x1e98
-#define GT64260_PCI_1_ACC_CNTL_2_BASE_LO 0x1ea0
-#define GT64260_PCI_1_ACC_CNTL_2_BASE_HI 0x1ea4
-#define GT64260_PCI_1_ACC_CNTL_2_TOP 0x1ea8
-#define GT64260_PCI_1_ACC_CNTL_3_BASE_LO 0x1eb0
-#define GT64260_PCI_1_ACC_CNTL_3_BASE_HI 0x1eb4
-#define GT64260_PCI_1_ACC_CNTL_3_TOP 0x1eb8
-#define GT64260_PCI_1_ACC_CNTL_4_BASE_LO 0x1ec0
-#define GT64260_PCI_1_ACC_CNTL_4_BASE_HI 0x1ec4
-#define GT64260_PCI_1_ACC_CNTL_4_TOP 0x1ec8
-#define GT64260_PCI_1_ACC_CNTL_5_BASE_LO 0x1ed0
-#define GT64260_PCI_1_ACC_CNTL_5_BASE_HI 0x1ed4
-#define GT64260_PCI_1_ACC_CNTL_5_TOP 0x1ed8
-#define GT64260_PCI_1_ACC_CNTL_6_BASE_LO 0x1ee0
-#define GT64260_PCI_1_ACC_CNTL_6_BASE_HI 0x1ee4
-#define GT64260_PCI_1_ACC_CNTL_6_TOP 0x1ee8
-#define GT64260_PCI_1_ACC_CNTL_7_BASE_LO 0x1ef0
-#define GT64260_PCI_1_ACC_CNTL_7_BASE_HI 0x1ef4
-#define GT64260_PCI_1_ACC_CNTL_7_TOP 0x1ef8
-
-/* PCI Snoop Control Registers */
-#define GT64260_PCI_SNOOP_WINDOWS 4
-
-#define GT64260_PCI_SNOOP_NONE 0x00000000
-#define GT64260_PCI_SNOOP_WT 0x00001000
-#define GT64260_PCI_SNOOP_WB 0x00002000
-
-#define GT64260_PCI_0_SNOOP_0_BASE_LO 0x1f00
-#define GT64260_PCI_0_SNOOP_0_BASE_HI 0x1f04
-#define GT64260_PCI_0_SNOOP_0_TOP 0x1f08
-#define GT64260_PCI_0_SNOOP_1_BASE_LO 0x1f10
-#define GT64260_PCI_0_SNOOP_1_BASE_HI 0x1f14
-#define GT64260_PCI_0_SNOOP_1_TOP 0x1f18
-#define GT64260_PCI_0_SNOOP_2_BASE_LO 0x1f20
-#define GT64260_PCI_0_SNOOP_2_BASE_HI 0x1f24
-#define GT64260_PCI_0_SNOOP_2_TOP 0x1f28
-#define GT64260_PCI_0_SNOOP_3_BASE_LO 0x1f30
-#define GT64260_PCI_0_SNOOP_3_BASE_HI 0x1f34
-#define GT64260_PCI_0_SNOOP_3_TOP 0x1f38
-
-#define GT64260_PCI_1_SNOOP_0_BASE_LO 0x1f80
-#define GT64260_PCI_1_SNOOP_0_BASE_HI 0x1f84
-#define GT64260_PCI_1_SNOOP_0_TOP 0x1f88
-#define GT64260_PCI_1_SNOOP_1_BASE_LO 0x1f90
-#define GT64260_PCI_1_SNOOP_1_BASE_HI 0x1f94
-#define GT64260_PCI_1_SNOOP_1_TOP 0x1f98
-#define GT64260_PCI_1_SNOOP_2_BASE_LO 0x1fa0
-#define GT64260_PCI_1_SNOOP_2_BASE_HI 0x1fa4
-#define GT64260_PCI_1_SNOOP_2_TOP 0x1fa8
-#define GT64260_PCI_1_SNOOP_3_BASE_LO 0x1fb0
-#define GT64260_PCI_1_SNOOP_3_BASE_HI 0x1fb4
-#define GT64260_PCI_1_SNOOP_3_TOP 0x1fb8
-
-/* PCI Error Report Registers */
-#define GT64260_PCI_0_ERR_SERR_MASK 0x0c28
-#define GT64260_PCI_0_ERR_ADDR_LO 0x1d40
-#define GT64260_PCI_0_ERR_ADDR_HI 0x1d44
-#define GT64260_PCI_0_ERR_DATA_LO 0x1d48
-#define GT64260_PCI_0_ERR_DATA_HI 0x1d4c
-#define GT64260_PCI_0_ERR_CMD 0x1d50
-#define GT64260_PCI_0_ERR_CAUSE 0x1d58
-#define GT64260_PCI_0_ERR_MASK 0x1d5c
-
-#define GT64260_PCI_1_ERR_SERR_MASK 0x0ca8
-#define GT64260_PCI_1_ERR_ADDR_LO 0x1dc0
-#define GT64260_PCI_1_ERR_ADDR_HI 0x1dc4
-#define GT64260_PCI_1_ERR_DATA_LO 0x1dc8
-#define GT64260_PCI_1_ERR_DATA_HI 0x1dcc
-#define GT64260_PCI_1_ERR_CMD 0x1dd0
-#define GT64260_PCI_1_ERR_CAUSE 0x1dd8
-#define GT64260_PCI_1_ERR_MASK 0x1ddc
-
-/* PCI Slave Address Decoding Registers */
-#define GT64260_PCI_SCS_WINDOWS 4
-#define GT64260_PCI_CS_WINDOWS 4
-#define GT64260_PCI_BOOT_WINDOWS 1
-#define GT64260_PCI_P2P_MEM_WINDOWS 2
-#define GT64260_PCI_P2P_IO_WINDOWS 1
-#define GT64260_PCI_DAC_SCS_WINDOWS 4
-#define GT64260_PCI_DAC_CS_WINDOWS 4
-#define GT64260_PCI_DAC_BOOT_WINDOWS 1
-#define GT64260_PCI_DAC_P2P_MEM_WINDOWS 2
-
-#define GT64260_PCI_0_SLAVE_SCS_0_SIZE 0x0c08
-#define GT64260_PCI_0_SLAVE_SCS_1_SIZE 0x0d08
-#define GT64260_PCI_0_SLAVE_SCS_2_SIZE 0x0c0c
-#define GT64260_PCI_0_SLAVE_SCS_3_SIZE 0x0d0c
-#define GT64260_PCI_0_SLAVE_CS_0_SIZE 0x0c10
-#define GT64260_PCI_0_SLAVE_CS_1_SIZE 0x0d10
-#define GT64260_PCI_0_SLAVE_CS_2_SIZE 0x0d18
-#define GT64260_PCI_0_SLAVE_CS_3_SIZE 0x0c14
-#define GT64260_PCI_0_SLAVE_BOOT_SIZE 0x0d14
-#define GT64260_PCI_0_SLAVE_P2P_MEM_0_SIZE 0x0d1c
-#define GT64260_PCI_0_SLAVE_P2P_MEM_1_SIZE 0x0d20
-#define GT64260_PCI_0_SLAVE_P2P_IO_SIZE 0x0d24
-#define GT64260_PCI_0_SLAVE_CPU_SIZE 0x0d28
-
-#define GT64260_PCI_0_SLAVE_DAC_SCS_0_SIZE 0x0e00
-#define GT64260_PCI_0_SLAVE_DAC_SCS_1_SIZE 0x0e04
-#define GT64260_PCI_0_SLAVE_DAC_SCS_2_SIZE 0x0e08
-#define GT64260_PCI_0_SLAVE_DAC_SCS_3_SIZE 0x0e0c
-#define GT64260_PCI_0_SLAVE_DAC_CS_0_SIZE 0x0e10
-#define GT64260_PCI_0_SLAVE_DAC_CS_1_SIZE 0x0e14
-#define GT64260_PCI_0_SLAVE_DAC_CS_2_SIZE 0x0e18
-#define GT64260_PCI_0_SLAVE_DAC_CS_3_SIZE 0x0e1c
-#define GT64260_PCI_0_SLAVE_DAC_BOOT_SIZE 0x0e20
-#define GT64260_PCI_0_SLAVE_DAC_P2P_MEM_0_SIZE 0x0e24
-#define GT64260_PCI_0_SLAVE_DAC_P2P_MEM_1_SIZE 0x0e28
-#define GT64260_PCI_0_SLAVE_DAC_CPU_SIZE 0x0e2c
-
-#define GT64260_PCI_0_SLAVE_EXP_ROM_SIZE 0x0d2c
-
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_SCS_0 (1<<0)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_SCS_1 (1<<1)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_SCS_2 (1<<2)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_SCS_3 (1<<3)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_CS_0 (1<<4)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_CS_1 (1<<5)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_CS_2 (1<<6)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_CS_3 (1<<7)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_BOOT (1<<8)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_REG_MEM (1<<9)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_REG_IO (1<<10)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_P2P_MEM_0 (1<<11)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_P2P_MEM_1 (1<<12)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_P2P_IO (1<<13)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_CPU (1<<14)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_SCS_0 (1<<15)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_SCS_1 (1<<16)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_SCS_2 (1<<17)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_SCS_3 (1<<18)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_CS_0 (1<<19)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_CS_1 (1<<20)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_CS_2 (1<<21)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_CS_3 (1<<22)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_BOOT (1<<23)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_P2P_MEM_0 (1<<24)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_P2P_MEM_1 (1<<25)
-#define GT64260_PCI_SLAVE_BAR_REG_ENABLES_DAC_CPU (1<<26)
-
-#define GT64260_PCI_0_SLAVE_BAR_REG_ENABLES 0x0c3c
-#define GT64260_PCI_0_SLAVE_SCS_0_REMAP 0x0c48
-#define GT64260_PCI_0_SLAVE_SCS_1_REMAP 0x0d48
-#define GT64260_PCI_0_SLAVE_SCS_2_REMAP 0x0c4c
-#define GT64260_PCI_0_SLAVE_SCS_3_REMAP 0x0d4c
-#define GT64260_PCI_0_SLAVE_CS_0_REMAP 0x0c50
-#define GT64260_PCI_0_SLAVE_CS_1_REMAP 0x0d50
-#define GT64260_PCI_0_SLAVE_CS_2_REMAP 0x0d58
-#define GT64260_PCI_0_SLAVE_CS_3_REMAP 0x0c54
-#define GT64260_PCI_0_SLAVE_BOOT_REMAP 0x0d54
-#define GT64260_PCI_0_SLAVE_P2P_MEM_0_REMAP_LO 0x0d5c
-#define GT64260_PCI_0_SLAVE_P2P_MEM_0_REMAP_HI 0x0d60
-#define GT64260_PCI_0_SLAVE_P2P_MEM_1_REMAP_LO 0x0d64
-#define GT64260_PCI_0_SLAVE_P2P_MEM_1_REMAP_HI 0x0d68
-#define GT64260_PCI_0_SLAVE_P2P_IO_REMAP 0x0d6c
-#define GT64260_PCI_0_SLAVE_CPU_REMAP 0x0d70
-
-#define GT64260_PCI_0_SLAVE_DAC_SCS_0_REMAP 0x0f00
-#define GT64260_PCI_0_SLAVE_DAC_SCS_1_REMAP 0x0f04
-#define GT64260_PCI_0_SLAVE_DAC_SCS_2_REMAP 0x0f08
-#define GT64260_PCI_0_SLAVE_DAC_SCS_3_REMAP 0x0f0c
-#define GT64260_PCI_0_SLAVE_DAC_CS_0_REMAP 0x0f10
-#define GT64260_PCI_0_SLAVE_DAC_CS_1_REMAP 0x0f14
-#define GT64260_PCI_0_SLAVE_DAC_CS_2_REMAP 0x0f18
-#define GT64260_PCI_0_SLAVE_DAC_CS_3_REMAP 0x0f1c
-#define GT64260_PCI_0_SLAVE_DAC_BOOT_REMAP 0x0f20
-#define GT64260_PCI_0_SLAVE_DAC_P2P_MEM_0_REMAP_LO 0x0f24
-#define GT64260_PCI_0_SLAVE_DAC_P2P_MEM_0_REMAP_HI 0x0f28
-#define GT64260_PCI_0_SLAVE_DAC_P2P_MEM_1_REMAP_LO 0x0f2c
-#define GT64260_PCI_0_SLAVE_DAC_P2P_MEM_1_REMAP_HI 0x0f30
-#define GT64260_PCI_0_SLAVE_DAC_CPU_REMAP 0x0f34
-
-#define GT64260_PCI_0_SLAVE_EXP_ROM_REMAP 0x0f38
-#define GT64260_PCI_0_SLAVE_PCI_DECODE_CNTL 0x0d3c
-
-#define GT64260_PCI_1_SLAVE_SCS_0_SIZE 0x0c88
-#define GT64260_PCI_1_SLAVE_SCS_1_SIZE 0x0d88
-#define GT64260_PCI_1_SLAVE_SCS_2_SIZE 0x0c8c
-#define GT64260_PCI_1_SLAVE_SCS_3_SIZE 0x0d8c
-#define GT64260_PCI_1_SLAVE_CS_0_SIZE 0x0c90
-#define GT64260_PCI_1_SLAVE_CS_1_SIZE 0x0d90
-#define GT64260_PCI_1_SLAVE_CS_2_SIZE 0x0d98
-#define GT64260_PCI_1_SLAVE_CS_3_SIZE 0x0c94
-#define GT64260_PCI_1_SLAVE_BOOT_SIZE 0x0d94
-#define GT64260_PCI_1_SLAVE_P2P_MEM_0_SIZE 0x0d9c
-#define GT64260_PCI_1_SLAVE_P2P_MEM_1_SIZE 0x0da0
-#define GT64260_PCI_1_SLAVE_P2P_IO_SIZE 0x0da4
-#define GT64260_PCI_1_SLAVE_CPU_SIZE 0x0da8
-
-#define GT64260_PCI_1_SLAVE_DAC_SCS_0_SIZE 0x0e80
-#define GT64260_PCI_1_SLAVE_DAC_SCS_1_SIZE 0x0e84
-#define GT64260_PCI_1_SLAVE_DAC_SCS_2_SIZE 0x0e88
-#define GT64260_PCI_1_SLAVE_DAC_SCS_3_SIZE 0x0e8c
-#define GT64260_PCI_1_SLAVE_DAC_CS_0_SIZE 0x0e90
-#define GT64260_PCI_1_SLAVE_DAC_CS_1_SIZE 0x0e94
-#define GT64260_PCI_1_SLAVE_DAC_CS_2_SIZE 0x0e98
-#define GT64260_PCI_1_SLAVE_DAC_CS_3_SIZE 0x0e9c
-#define GT64260_PCI_1_SLAVE_DAC_BOOT_SIZE 0x0ea0
-#define GT64260_PCI_1_SLAVE_DAC_P2P_MEM_0_SIZE 0x0ea4
-#define GT64260_PCI_1_SLAVE_DAC_P2P_MEM_1_SIZE 0x0ea8
-#define GT64260_PCI_1_SLAVE_DAC_CPU_SIZE 0x0eac
-
-#define GT64260_PCI_1_SLAVE_EXP_ROM_SIZE 0x0dac
-
-#define GT64260_PCI_1_SLAVE_BAR_REG_ENABLES 0x0cbc
-#define GT64260_PCI_1_SLAVE_SCS_0_REMAP 0x0cc8
-#define GT64260_PCI_1_SLAVE_SCS_1_REMAP 0x0dc8
-#define GT64260_PCI_1_SLAVE_SCS_2_REMAP 0x0ccc
-#define GT64260_PCI_1_SLAVE_SCS_3_REMAP 0x0dcc
-#define GT64260_PCI_1_SLAVE_CS_0_REMAP 0x0cd0
-#define GT64260_PCI_1_SLAVE_CS_1_REMAP 0x0dd0
-#define GT64260_PCI_1_SLAVE_CS_2_REMAP 0x0dd8
-#define GT64260_PCI_1_SLAVE_CS_3_REMAP 0x0cd4
-#define GT64260_PCI_1_SLAVE_BOOT_REMAP 0x0dd4
-#define GT64260_PCI_1_SLAVE_P2P_MEM_0_REMAP_LO 0x0ddc
-#define GT64260_PCI_1_SLAVE_P2P_MEM_0_REMAP_HI 0x0de0
-#define GT64260_PCI_1_SLAVE_P2P_MEM_1_REMAP_LO 0x0de4
-#define GT64260_PCI_1_SLAVE_P2P_MEM_1_REMAP_HI 0x0de8
-#define GT64260_PCI_1_SLAVE_P2P_IO_REMAP 0x0dec
-#define GT64260_PCI_1_SLAVE_CPU_REMAP 0x0df0
-
-#define GT64260_PCI_1_SLAVE_DAC_SCS_0_REMAP 0x0f80
-#define GT64260_PCI_1_SLAVE_DAC_SCS_1_REMAP 0x0f84
-#define GT64260_PCI_1_SLAVE_DAC_SCS_2_REMAP 0x0f88
-#define GT64260_PCI_1_SLAVE_DAC_SCS_3_REMAP 0x0f8c
-#define GT64260_PCI_1_SLAVE_DAC_CS_0_REMAP 0x0f90
-#define GT64260_PCI_1_SLAVE_DAC_CS_1_REMAP 0x0f94
-#define GT64260_PCI_1_SLAVE_DAC_CS_2_REMAP 0x0f98
-#define GT64260_PCI_1_SLAVE_DAC_CS_3_REMAP 0x0f9c
-#define GT64260_PCI_1_SLAVE_DAC_BOOT_REMAP 0x0fa0
-#define GT64260_PCI_1_SLAVE_DAC_P2P_MEM_0_REMAP_LO 0x0fa4
-#define GT64260_PCI_1_SLAVE_DAC_P2P_MEM_0_REMAP_HI 0x0fa8
-#define GT64260_PCI_1_SLAVE_DAC_P2P_MEM_1_REMAP_LO 0x0fac
-#define GT64260_PCI_1_SLAVE_DAC_P2P_MEM_1_REMAP_HI 0x0fb0
-#define GT64260_PCI_1_SLAVE_DAC_CPU_REMAP 0x0fb4
-
-#define GT64260_PCI_1_SLAVE_EXP_ROM_REMAP 0x0fb8
-#define GT64260_PCI_1_SLAVE_PCI_DECODE_CNTL 0x0dbc
-
-
-/*
- *****************************************************************************
- *
- * I2O Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* FIXME: fill in */
-
-
-
-/*
- *****************************************************************************
- *
- * DMA Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* FIXME: fill in */
-
-
-/*
- *****************************************************************************
- *
- * Timer/Counter Interface Registers
- *
- *****************************************************************************
- */
-
-/* FIXME: fill in */
-
-
-/*
- *****************************************************************************
- *
- * Communications Controller (Enet, Serial, etc.) Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_ENET_0_CNTL_LO 0xf200
-#define GT64260_ENET_0_CNTL_HI 0xf204
-#define GT64260_ENET_0_RX_BUF_PCI_ADDR_HI 0xf208
-#define GT64260_ENET_0_TX_BUF_PCI_ADDR_HI 0xf20c
-#define GT64260_ENET_0_RX_DESC_ADDR_HI 0xf210
-#define GT64260_ENET_0_TX_DESC_ADDR_HI 0xf214
-#define GT64260_ENET_0_HASH_TAB_PCI_ADDR_HI 0xf218
-#define GT64260_ENET_1_CNTL_LO 0xf220
-#define GT64260_ENET_1_CNTL_HI 0xf224
-#define GT64260_ENET_1_RX_BUF_PCI_ADDR_HI 0xf228
-#define GT64260_ENET_1_TX_BUF_PCI_ADDR_HI 0xf22c
-#define GT64260_ENET_1_RX_DESC_ADDR_HI 0xf230
-#define GT64260_ENET_1_TX_DESC_ADDR_HI 0xf234
-#define GT64260_ENET_1_HASH_TAB_PCI_ADDR_HI 0xf238
-#define GT64260_ENET_2_CNTL_LO 0xf240
-#define GT64260_ENET_2_CNTL_HI 0xf244
-#define GT64260_ENET_2_RX_BUF_PCI_ADDR_HI 0xf248
-#define GT64260_ENET_2_TX_BUF_PCI_ADDR_HI 0xf24c
-#define GT64260_ENET_2_RX_DESC_ADDR_HI 0xf250
-#define GT64260_ENET_2_TX_DESC_ADDR_HI 0xf254
-#define GT64260_ENET_2_HASH_TAB_PCI_ADDR_HI 0xf258
-
-#define GT64260_MPSC_0_CNTL_LO 0xf280
-#define GT64260_MPSC_0_CNTL_HI 0xf284
-#define GT64260_MPSC_0_RX_BUF_PCI_ADDR_HI 0xf288
-#define GT64260_MPSC_0_TX_BUF_PCI_ADDR_HI 0xf28c
-#define GT64260_MPSC_0_RX_DESC_ADDR_HI 0xf290
-#define GT64260_MPSC_0_TX_DESC_ADDR_HI 0xf294
-#define GT64260_MPSC_1_CNTL_LO 0xf2c0
-#define GT64260_MPSC_1_CNTL_HI 0xf2c4
-#define GT64260_MPSC_1_RX_BUF_PCI_ADDR_HI 0xf2c8
-#define GT64260_MPSC_1_TX_BUF_PCI_ADDR_HI 0xf2cc
-#define GT64260_MPSC_1_RX_DESC_ADDR_HI 0xf2d0
-#define GT64260_MPSC_1_TX_DESC_ADDR_HI 0xf2d4
-
-#define GT64260_SER_INIT_PCI_ADDR_HI 0xf320
-#define GT64260_SER_INIT_LAST_DATA 0xf324
-#define GT64260_SER_INIT_CONTROL 0xf328
-#define GT64260_SER_INIT_STATUS 0xf32c
-
-#define GT64260_COMM_ARBITER_CNTL 0xf300
-#define GT64260_COMM_CONFIG 0xb40c
-#define GT64260_COMM_XBAR_TO 0xf304
-#define GT64260_COMM_INTR_CAUSE 0xf310
-#define GT64260_COMM_INTR_MASK 0xf314
-#define GT64260_COMM_ERR_ADDR 0xf318
-
-
-/*
- *****************************************************************************
- *
- * Fast Ethernet Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_ENET_PHY_ADDR 0x2000
-#define GT64260_ENET_ESMIR 0x2010
-
-#define GT64260_ENET_E0PCR 0x2400
-#define GT64260_ENET_E0PCXR 0x2408
-#define GT64260_ENET_E0PCMR 0x2410
-#define GT64260_ENET_E0PSR 0x2418
-#define GT64260_ENET_E0SPR 0x2420
-#define GT64260_ENET_E0HTPR 0x2428
-#define GT64260_ENET_E0FCSAL 0x2430
-#define GT64260_ENET_E0FCSAH 0x2438
-#define GT64260_ENET_E0SDCR 0x2440
-#define GT64260_ENET_E0SDCMR 0x2448
-#define GT64260_ENET_E0ICR 0x2450
-#define GT64260_ENET_E0IMR 0x2458
-#define GT64260_ENET_E0FRDP0 0x2480
-#define GT64260_ENET_E0FRDP1 0x2484
-#define GT64260_ENET_E0FRDP2 0x2488
-#define GT64260_ENET_E0FRDP3 0x248c
-#define GT64260_ENET_E0CRDP0 0x24a0
-#define GT64260_ENET_E0CRDP1 0x24a4
-#define GT64260_ENET_E0CRDP2 0x24a8
-#define GT64260_ENET_E0CRDP3 0x24ac
-#define GT64260_ENET_E0CTDP0 0x24e0
-#define GT64260_ENET_E0CTDP1 0x24e4
-#define GT64260_ENET_0_DSCP2P0L 0x2460
-#define GT64260_ENET_0_DSCP2P0H 0x2464
-#define GT64260_ENET_0_DSCP2P1L 0x2468
-#define GT64260_ENET_0_DSCP2P1H 0x246c
-#define GT64260_ENET_0_VPT2P 0x2470
-#define GT64260_ENET_0_MIB_CTRS 0x2500
-
-#define GT64260_ENET_E1PCR 0x2800
-#define GT64260_ENET_E1PCXR 0x2808
-#define GT64260_ENET_E1PCMR 0x2810
-#define GT64260_ENET_E1PSR 0x2818
-#define GT64260_ENET_E1SPR 0x2820
-#define GT64260_ENET_E1HTPR 0x2828
-#define GT64260_ENET_E1FCSAL 0x2830
-#define GT64260_ENET_E1FCSAH 0x2838
-#define GT64260_ENET_E1SDCR 0x2840
-#define GT64260_ENET_E1SDCMR 0x2848
-#define GT64260_ENET_E1ICR 0x2850
-#define GT64260_ENET_E1IMR 0x2858
-#define GT64260_ENET_E1FRDP0 0x2880
-#define GT64260_ENET_E1FRDP1 0x2884
-#define GT64260_ENET_E1FRDP2 0x2888
-#define GT64260_ENET_E1FRDP3 0x288c
-#define GT64260_ENET_E1CRDP0 0x28a0
-#define GT64260_ENET_E1CRDP1 0x28a4
-#define GT64260_ENET_E1CRDP2 0x28a8
-#define GT64260_ENET_E1CRDP3 0x28ac
-#define GT64260_ENET_E1CTDP0 0x28e0
-#define GT64260_ENET_E1CTDP1 0x28e4
-#define GT64260_ENET_1_DSCP2P0L 0x2860
-#define GT64260_ENET_1_DSCP2P0H 0x2864
-#define GT64260_ENET_1_DSCP2P1L 0x2868
-#define GT64260_ENET_1_DSCP2P1H 0x286c
-#define GT64260_ENET_1_VPT2P 0x2870
-#define GT64260_ENET_1_MIB_CTRS 0x2900
-
-#define GT64260_ENET_E2PCR 0x2c00
-#define GT64260_ENET_E2PCXR 0x2c08
-#define GT64260_ENET_E2PCMR 0x2c10
-#define GT64260_ENET_E2PSR 0x2c18
-#define GT64260_ENET_E2SPR 0x2c20
-#define GT64260_ENET_E2HTPR 0x2c28
-#define GT64260_ENET_E2FCSAL 0x2c30
-#define GT64260_ENET_E2FCSAH 0x2c38
-#define GT64260_ENET_E2SDCR 0x2c40
-#define GT64260_ENET_E2SDCMR 0x2c48
-#define GT64260_ENET_E2ICR 0x2c50
-#define GT64260_ENET_E2IMR 0x2c58
-#define GT64260_ENET_E2FRDP0 0x2c80
-#define GT64260_ENET_E2FRDP1 0x2c84
-#define GT64260_ENET_E2FRDP2 0x2c88
-#define GT64260_ENET_E2FRDP3 0x2c8c
-#define GT64260_ENET_E2CRDP0 0x2ca0
-#define GT64260_ENET_E2CRDP1 0x2ca4
-#define GT64260_ENET_E2CRDP2 0x2ca8
-#define GT64260_ENET_E2CRDP3 0x2cac
-#define GT64260_ENET_E2CTDP0 0x2ce0
-#define GT64260_ENET_E2CTDP1 0x2ce4
-#define GT64260_ENET_2_DSCP2P0L 0x2c60
-#define GT64260_ENET_2_DSCP2P0H 0x2c64
-#define GT64260_ENET_2_DSCP2P1L 0x2c68
-#define GT64260_ENET_2_DSCP2P1H 0x2c6c
-#define GT64260_ENET_2_VPT2P 0x2c70
-#define GT64260_ENET_2_MIB_CTRS 0x2d00
-
-
-/*
- *****************************************************************************
- *
- * Multi-Protocol Serial Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* Signal Routing */
-#define GT64260_MPSC_MRR 0xb400
-#define GT64260_MPSC_RCRR 0xb404
-#define GT64260_MPSC_TCRR 0xb408
-
-/* Main Configuratino Registers */
-#define GT64260_MPSC_0_MMCRL 0x8000
-#define GT64260_MPSC_0_MMCRH 0x8004
-#define GT64260_MPSC_0_MPCR 0x8008
-#define GT64260_MPSC_0_CHR_1 0x800c
-#define GT64260_MPSC_0_CHR_2 0x8010
-#define GT64260_MPSC_0_CHR_3 0x8014
-#define GT64260_MPSC_0_CHR_4 0x8018
-#define GT64260_MPSC_0_CHR_5 0x801c
-#define GT64260_MPSC_0_CHR_6 0x8020
-#define GT64260_MPSC_0_CHR_7 0x8024
-#define GT64260_MPSC_0_CHR_8 0x8028
-#define GT64260_MPSC_0_CHR_9 0x802c
-#define GT64260_MPSC_0_CHR_10 0x8030
-#define GT64260_MPSC_0_CHR_11 0x8034
-
-#define GT64260_MPSC_1_MMCRL 0x9000
-#define GT64260_MPSC_1_MMCRH 0x9004
-#define GT64260_MPSC_1_MPCR 0x9008
-#define GT64260_MPSC_1_CHR_1 0x900c
-#define GT64260_MPSC_1_CHR_2 0x9010
-#define GT64260_MPSC_1_CHR_3 0x9014
-#define GT64260_MPSC_1_CHR_4 0x9018
-#define GT64260_MPSC_1_CHR_5 0x901c
-#define GT64260_MPSC_1_CHR_6 0x9020
-#define GT64260_MPSC_1_CHR_7 0x9024
-#define GT64260_MPSC_1_CHR_8 0x9028
-#define GT64260_MPSC_1_CHR_9 0x902c
-#define GT64260_MPSC_1_CHR_10 0x9030
-#define GT64260_MPSC_1_CHR_11 0x9034
-
-#define GT64260_MPSC_0_INTR_CAUSE 0xb804
-#define GT64260_MPSC_0_INTR_MASK 0xb884
-#define GT64260_MPSC_1_INTR_CAUSE 0xb80c
-#define GT64260_MPSC_1_INTR_MASK 0xb88c
-
-#define GT64260_MPSC_UART_CR_TEV (1<<1)
-#define GT64260_MPSC_UART_CR_TA (1<<7)
-#define GT64260_MPSC_UART_CR_TTCS (1<<9)
-#define GT64260_MPSC_UART_CR_REV (1<<17)
-#define GT64260_MPSC_UART_CR_RA (1<<23)
-#define GT64260_MPSC_UART_CR_CRD (1<<25)
-#define GT64260_MPSC_UART_CR_EH (1<<31)
-
-#define GT64260_MPSC_UART_ESR_CTS (1<<0)
-#define GT64260_MPSC_UART_ESR_CD (1<<1)
-#define GT64260_MPSC_UART_ESR_TIDLE (1<<3)
-#define GT64260_MPSC_UART_ESR_RHS (1<<5)
-#define GT64260_MPSC_UART_ESR_RLS (1<<7)
-#define GT64260_MPSC_UART_ESR_RLIDL (1<<11)
-
-
-/*
- *****************************************************************************
- *
- * Serial DMA Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_SDMA_0_SDC 0x4000
-#define GT64260_SDMA_0_SDCM 0x4008
-#define GT64260_SDMA_0_RX_DESC 0x4800
-#define GT64260_SDMA_0_RX_BUF_PTR 0x4808
-#define GT64260_SDMA_0_SCRDP 0x4810
-#define GT64260_SDMA_0_TX_DESC 0x4c00
-#define GT64260_SDMA_0_SCTDP 0x4c10
-#define GT64260_SDMA_0_SFTDP 0x4c14
-
-#define GT64260_SDMA_1_SDC 0x6000
-#define GT64260_SDMA_1_SDCM 0x6008
-#define GT64260_SDMA_1_RX_DESC 0x6800
-#define GT64260_SDMA_1_RX_BUF_PTR 0x6808
-#define GT64260_SDMA_1_SCRDP 0x6810
-#define GT64260_SDMA_1_TX_DESC 0x6c00
-#define GT64260_SDMA_1_SCTDP 0x6c10
-#define GT64260_SDMA_1_SFTDP 0x6c14
-
-#define GT64260_SDMA_INTR_CAUSE 0xb800
-#define GT64260_SDMA_INTR_MASK 0xb880
-
-#define GT64260_SDMA_DESC_CMDSTAT_PE (1<<0)
-#define GT64260_SDMA_DESC_CMDSTAT_CDL (1<<1)
-#define GT64260_SDMA_DESC_CMDSTAT_FR (1<<3)
-#define GT64260_SDMA_DESC_CMDSTAT_OR (1<<6)
-#define GT64260_SDMA_DESC_CMDSTAT_BR (1<<9)
-#define GT64260_SDMA_DESC_CMDSTAT_MI (1<<10)
-#define GT64260_SDMA_DESC_CMDSTAT_A (1<<11)
-#define GT64260_SDMA_DESC_CMDSTAT_AM (1<<12)
-#define GT64260_SDMA_DESC_CMDSTAT_CT (1<<13)
-#define GT64260_SDMA_DESC_CMDSTAT_C (1<<14)
-#define GT64260_SDMA_DESC_CMDSTAT_ES (1<<15)
-#define GT64260_SDMA_DESC_CMDSTAT_L (1<<16)
-#define GT64260_SDMA_DESC_CMDSTAT_F (1<<17)
-#define GT64260_SDMA_DESC_CMDSTAT_P (1<<18)
-#define GT64260_SDMA_DESC_CMDSTAT_EI (1<<23)
-#define GT64260_SDMA_DESC_CMDSTAT_O (1<<31)
-
-#define GT64260_SDMA_SDC_RFT (1<<0)
-#define GT64260_SDMA_SDC_SFM (1<<1)
-#define GT64260_SDMA_SDC_BLMR (1<<6)
-#define GT64260_SDMA_SDC_BLMT (1<<7)
-#define GT64260_SDMA_SDC_POVR (1<<8)
-#define GT64260_SDMA_SDC_RIFB (1<<9)
-
-#define GT64260_SDMA_SDCM_ERD (1<<7)
-#define GT64260_SDMA_SDCM_AR (1<<15)
-#define GT64260_SDMA_SDCM_STD (1<<16)
-#define GT64260_SDMA_SDCM_TXD (1<<23)
-#define GT64260_SDMA_SDCM_AT (1<<31)
-
-#define GT64260_SDMA_0_CAUSE_RXBUF (1<<0)
-#define GT64260_SDMA_0_CAUSE_RXERR (1<<1)
-#define GT64260_SDMA_0_CAUSE_TXBUF (1<<2)
-#define GT64260_SDMA_0_CAUSE_TXEND (1<<3)
-#define GT64260_SDMA_1_CAUSE_RXBUF (1<<8)
-#define GT64260_SDMA_1_CAUSE_RXERR (1<<9)
-#define GT64260_SDMA_1_CAUSE_TXBUF (1<<10)
-#define GT64260_SDMA_1_CAUSE_TXEND (1<<11)
-
-
-/*
- *****************************************************************************
- *
- * Baud Rate Generator Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_BRG_0_BCR 0xb200
-#define GT64260_BRG_0_BTR 0xb204
-#define GT64260_BRG_1_BCR 0xb208
-#define GT64260_BRG_1_BTR 0xb20c
-#define GT64260_BRG_2_BCR 0xb210
-#define GT64260_BRG_2_BTR 0xb214
-
-#define GT64260_BRG_INTR_CAUSE 0xb834
-#define GT64260_BRG_INTR_MASK 0xb8b4
-
-
-/*
- *****************************************************************************
- *
- * Watchdog Timer Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_WDT_WDC 0xb410
-#define GT64260_WDT_WDV 0xb414
-
-
-/*
- *****************************************************************************
- *
- * General Purpose Pins Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_GPP_IO_CNTL 0xf100
-#define GT64260_GPP_LEVEL_CNTL 0xf110
-#define GT64260_GPP_VALUE 0xf104
-#define GT64260_GPP_INTR_CAUSE 0xf108
-#define GT64260_GPP_INTR_MASK 0xf10c
-
-
-/*
- *****************************************************************************
- *
- * Multi-Purpose Pins Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_MPP_CNTL_0 0xf000
-#define GT64260_MPP_CNTL_1 0xf004
-#define GT64260_MPP_CNTL_2 0xf008
-#define GT64260_MPP_CNTL_3 0xf00c
-#define GT64260_MPP_SERIAL_PORTS_MULTIPLEX 0xf010
-
-
-/*
- *****************************************************************************
- *
- * I2C Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* FIXME: fill in */
-
-
-/*
- *****************************************************************************
- *
- * Interrupt Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_IC_MAIN_CAUSE_LO 0x0c18
-#define GT64260_IC_MAIN_CAUSE_HI 0x0c68
-#define GT64260_IC_CPU_INTR_MASK_LO 0x0c1c
-#define GT64260_IC_CPU_INTR_MASK_HI 0x0c6c
-#define GT64260_IC_CPU_SELECT_CAUSE 0x0c70
-#define GT64260_IC_PCI_0_INTR_MASK_LO 0x0c24
-#define GT64260_IC_PCI_0_INTR_MASK_HI 0x0c64
-#define GT64260_IC_PCI_0_SELECT_CAUSE 0x0c74
-#define GT64260_IC_PCI_1_INTR_MASK_LO 0x0ca4
-#define GT64260_IC_PCI_1_INTR_MASK_HI 0x0ce4
-#define GT64260_IC_PCI_1_SELECT_CAUSE 0x0cf4
-#define GT64260_IC_CPU_INT_0_MASK 0x0e60
-#define GT64260_IC_CPU_INT_1_MASK 0x0e64
-#define GT64260_IC_CPU_INT_2_MASK 0x0e68
-#define GT64260_IC_CPU_INT_3_MASK 0x0e6c
-
-
-#endif /* __ASMPPC_GT64260_DEFS_H */
diff --git a/include/asm-ppc/harrier.h b/include/asm-ppc/harrier.h
deleted file mode 100644
index 7acd7fc..0000000
--- a/include/asm-ppc/harrier.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Definitions for Motorola MCG Harrier North Bridge & Memory controller
- *
- * Author: Dale Farnsworth
- * dale.farnsworth@mvista.com
- *
- * Modified by: Randy Vinson
- * rvinson@mvista.com
- *
- * Copyright 2001-2002 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __ASMPPC_HARRIER_H
-#define __ASMPPC_HARRIER_H
-
-#include <linux/types.h>
-#include <asm/pci-bridge.h>
-
-struct pci_controller;
-int harrier_init(struct pci_controller *hose,
- uint ppc_reg_base,
- ulong processor_pci_mem_start,
- ulong processor_pci_mem_end,
- ulong processor_pci_io_start,
- ulong processor_pci_io_end,
- ulong processor_mpic_base);
-
-unsigned long harrier_get_mem_size(uint smc_base);
-
-int harrier_mpic_init(unsigned int pci_mem_offset);
-
-void harrier_setup_nonmonarch(uint ppc_reg_base,
- uint in0_size);
-void harrier_release_eready(uint ppc_reg_base);
-
-void harrier_wait_eready(uint ppc_reg_base);
-
-#endif /* __ASMPPC_HARRIER_H */
diff --git a/include/asm-ppc/hawk.h b/include/asm-ppc/hawk.h
deleted file mode 100644
index f347007..0000000
--- a/include/asm-ppc/hawk.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * include/asm-ppc/hawk.h
- *
- * Support functions for MCG Falcon/Raven & HAWK North Bridge & Memory ctlr.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * Modified by Randy Vinson (rvinson@mvista.com)
- *
- * 2001,2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASMPPC_HAWK_H
-#define __ASMPPC_HAWK_H
-
-#include <asm/pci-bridge.h>
-#include <asm/hawk_defs.h>
-
-extern int hawk_init(struct pci_controller *hose,
- unsigned int ppc_reg_base, unsigned long processor_pci_mem_start,
- unsigned long processor_pci_mem_end,
- unsigned long processor_pci_io_start,
- unsigned long processor_pci_io_end,
- unsigned long processor_mpic_base);
-extern unsigned long hawk_get_mem_size(unsigned int smc_base);
-extern int hawk_mpic_init(unsigned int pci_mem_offset);
-
-#endif /* __ASMPPC_HAWK_H */
diff --git a/include/asm-ppc/hawk_defs.h b/include/asm-ppc/hawk_defs.h
deleted file mode 100644
index 6d1d2ba..0000000
--- a/include/asm-ppc/hawk_defs.h
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * include/asm-ppc/hawk_defs.h
- *
- * Definitions for Motorola MCG Falcon/Raven & HAWK North Bridge & Memory ctlr.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * Modified by Randy Vinson (rvinson@mvista.com)
- *
- * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifndef __ASMPPC_HAWK_DEFS_H
-#define __ASMPPC_HAWK_DEFS_H
-
-#include <asm/pci-bridge.h>
-
-/*
- * The Falcon/Raven and HAWK have 4 sets of registers:
- * 1) PPC Registers which define the mappings from PPC bus to PCI bus,
- * etc.
- * 2) PCI Registers which define the mappings from PCI bus to PPC bus and the
- * MPIC base address.
- * 3) MPIC registers
- * 4) System Memory Controller (SMC) registers.
- */
-
-#define HAWK_PCI_CONFIG_ADDR_OFF 0x00000cf8
-#define HAWK_PCI_CONFIG_DATA_OFF 0x00000cfc
-
-#define HAWK_MPIC_SIZE 0x00040000U
-#define HAWK_SMC_SIZE 0x00001000U
-
-/*
- * Define PPC register offsets.
- */
-#define HAWK_PPC_XSADD0_OFF 0x40
-#define HAWK_PPC_XSOFF0_OFF 0x44
-#define HAWK_PPC_XSADD1_OFF 0x48
-#define HAWK_PPC_XSOFF1_OFF 0x4c
-#define HAWK_PPC_XSADD2_OFF 0x50
-#define HAWK_PPC_XSOFF2_OFF 0x54
-#define HAWK_PPC_XSADD3_OFF 0x58
-#define HAWK_PPC_XSOFF3_OFF 0x5c
-
-/*
- * Define PCI register offsets.
- */
-#define HAWK_PCI_PSADD0_OFF 0x80
-#define HAWK_PCI_PSOFF0_OFF 0x84
-#define HAWK_PCI_PSADD1_OFF 0x88
-#define HAWK_PCI_PSOFF1_OFF 0x8c
-#define HAWK_PCI_PSADD2_OFF 0x90
-#define HAWK_PCI_PSOFF2_OFF 0x94
-#define HAWK_PCI_PSADD3_OFF 0x98
-#define HAWK_PCI_PSOFF3_OFF 0x9c
-
-/*
- * Define the System Memory Controller (SMC) register offsets.
- */
-#define HAWK_SMC_RAM_A_SIZE_REG_OFF 0x10
-#define HAWK_SMC_RAM_B_SIZE_REG_OFF 0x11
-#define HAWK_SMC_RAM_C_SIZE_REG_OFF 0x12
-#define HAWK_SMC_RAM_D_SIZE_REG_OFF 0x13
-#define HAWK_SMC_RAM_E_SIZE_REG_OFF 0xc0 /* HAWK Only */
-#define HAWK_SMC_RAM_F_SIZE_REG_OFF 0xc1 /* HAWK Only */
-#define HAWK_SMC_RAM_G_SIZE_REG_OFF 0xc2 /* HAWK Only */
-#define HAWK_SMC_RAM_H_SIZE_REG_OFF 0xc3 /* HAWK Only */
-
-#define FALCON_SMC_REG_COUNT 4
-#define HAWK_SMC_REG_COUNT 8
-#endif /* __ASMPPC_HAWK_DEFS_H */
diff --git a/include/asm-ppc/highmem.h b/include/asm-ppc/highmem.h
deleted file mode 100644
index f7b21ee..0000000
--- a/include/asm-ppc/highmem.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * highmem.h: virtual kernel memory mappings for high memory
- *
- * PowerPC version, stolen from the i386 version.
- *
- * Used in CONFIG_HIGHMEM systems for memory pages which
- * are not addressable by direct kernel virtual addresses.
- *
- * Copyright (C) 1999 Gerhard Wichert, Siemens AG
- * Gerhard.Wichert@pdb.siemens.de
- *
- *
- * Redesigned the x86 32-bit VM architecture to deal with
- * up to 16 Terrabyte physical memory. With current x86 CPUs
- * we now support up to 64 Gigabytes physical RAM.
- *
- * Copyright (C) 1999 Ingo Molnar <mingo@redhat.com>
- */
-
-#ifndef _ASM_HIGHMEM_H
-#define _ASM_HIGHMEM_H
-
-#ifdef __KERNEL__
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <asm/kmap_types.h>
-#include <asm/tlbflush.h>
-#include <asm/page.h>
-
-/* undef for production */
-#define HIGHMEM_DEBUG 1
-
-extern pte_t *kmap_pte;
-extern pgprot_t kmap_prot;
-extern pte_t *pkmap_page_table;
-
-/*
- * Right now we initialize only a single pte table. It can be extended
- * easily, subsequent pte tables have to be allocated in one physical
- * chunk of RAM.
- */
-#define PKMAP_BASE CONFIG_HIGHMEM_START
-#define LAST_PKMAP (1 << PTE_SHIFT)
-#define LAST_PKMAP_MASK (LAST_PKMAP-1)
-#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT)
-#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT))
-
-#define KMAP_FIX_BEGIN (PKMAP_BASE + 0x00400000UL)
-
-extern void *kmap_high(struct page *page);
-extern void kunmap_high(struct page *page);
-
-static inline void *kmap(struct page *page)
-{
- might_sleep();
- if (!PageHighMem(page))
- return page_address(page);
- return kmap_high(page);
-}
-
-static inline void kunmap(struct page *page)
-{
- BUG_ON(in_interrupt());
- if (!PageHighMem(page))
- return;
- kunmap_high(page);
-}
-
-/*
- * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap
- * gives a more generic (and caching) interface. But kmap_atomic can
- * be used in IRQ contexts, so in some (very limited) cases we need
- * it.
- */
-static inline void *kmap_atomic(struct page *page, enum km_type type)
-{
- unsigned int idx;
- unsigned long vaddr;
-
- /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */
- pagefault_disable();
- if (!PageHighMem(page))
- return page_address(page);
-
- idx = type + KM_TYPE_NR*smp_processor_id();
- vaddr = KMAP_FIX_BEGIN + idx * PAGE_SIZE;
-#ifdef HIGHMEM_DEBUG
- BUG_ON(!pte_none(*(kmap_pte+idx)));
-#endif
- set_pte_at(&init_mm, vaddr, kmap_pte+idx, mk_pte(page, kmap_prot));
- flush_tlb_page(NULL, vaddr);
-
- return (void*) vaddr;
-}
-
-static inline void kunmap_atomic(void *kvaddr, enum km_type type)
-{
-#ifdef HIGHMEM_DEBUG
- unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
- unsigned int idx = type + KM_TYPE_NR*smp_processor_id();
-
- if (vaddr < KMAP_FIX_BEGIN) { // FIXME
- pagefault_enable();
- return;
- }
-
- BUG_ON(vaddr != KMAP_FIX_BEGIN + idx * PAGE_SIZE);
-
- /*
- * force other mappings to Oops if they'll try to access
- * this pte without first remap it
- */
- pte_clear(&init_mm, vaddr, kmap_pte+idx);
- flush_tlb_page(NULL, vaddr);
-#endif
- pagefault_enable();
-}
-
-static inline struct page *kmap_atomic_to_page(void *ptr)
-{
- unsigned long idx, vaddr = (unsigned long) ptr;
-
- if (vaddr < KMAP_FIX_BEGIN)
- return virt_to_page(ptr);
-
- idx = (vaddr - KMAP_FIX_BEGIN) >> PAGE_SHIFT;
- return pte_page(kmap_pte[idx]);
-}
-
-#define flush_cache_kmaps() flush_cache_all()
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASM_HIGHMEM_H */
diff --git a/include/asm-ppc/hydra.h b/include/asm-ppc/hydra.h
deleted file mode 100644
index 1ad4eed..0000000
--- a/include/asm-ppc/hydra.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*
- * include/asm-ppc/hydra.h -- Mac I/O `Hydra' definitions
- *
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is based on the following documentation:
- *
- * Macintosh Technology in the Common Hardware Reference Platform
- * Apple Computer, Inc.
- *
- * © Copyright 1995 Apple Computer, Inc. All rights reserved.
- *
- * It's available online from http://chrp.apple.com/MacTech.pdf.
- * You can obtain paper copies of this book from computer bookstores or by
- * writing Morgan Kaufmann Publishers, Inc., 340 Pine Street, Sixth Floor, San
- * Francisco, CA 94104. Reference ISBN 1-55860-393-X.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#ifndef _ASMPPC_HYDRA_H
-#define _ASMPPC_HYDRA_H
-
-#ifdef __KERNEL__
-
-struct Hydra {
- /* DBDMA Controller Register Space */
- char Pad1[0x30];
- u_int CachePD;
- u_int IDs;
- u_int Feature_Control;
- char Pad2[0x7fc4];
- /* DBDMA Channel Register Space */
- char SCSI_DMA[0x100];
- char Pad3[0x300];
- char SCCA_Tx_DMA[0x100];
- char SCCA_Rx_DMA[0x100];
- char SCCB_Tx_DMA[0x100];
- char SCCB_Rx_DMA[0x100];
- char Pad4[0x7800];
- /* Device Register Space */
- char SCSI[0x1000];
- char ADB[0x1000];
- char SCC_Legacy[0x1000];
- char SCC[0x1000];
- char Pad9[0x2000];
- char VIA[0x2000];
- char Pad10[0x28000];
- char OpenPIC[0x40000];
-};
-
-extern volatile struct Hydra __iomem *Hydra;
-
-
- /*
- * Feature Control Register
- */
-
-#define HYDRA_FC_SCC_CELL_EN 0x00000001 /* Enable SCC Clock */
-#define HYDRA_FC_SCSI_CELL_EN 0x00000002 /* Enable SCSI Clock */
-#define HYDRA_FC_SCCA_ENABLE 0x00000004 /* Enable SCC A Lines */
-#define HYDRA_FC_SCCB_ENABLE 0x00000008 /* Enable SCC B Lines */
-#define HYDRA_FC_ARB_BYPASS 0x00000010 /* Bypass Internal Arbiter */
-#define HYDRA_FC_RESET_SCC 0x00000020 /* Reset SCC */
-#define HYDRA_FC_MPIC_ENABLE 0x00000040 /* Enable OpenPIC */
-#define HYDRA_FC_SLOW_SCC_PCLK 0x00000080 /* 1=15.6672, 0=25 MHz */
-#define HYDRA_FC_MPIC_IS_MASTER 0x00000100 /* OpenPIC Master Mode */
-
-
- /*
- * OpenPIC Interrupt Sources
- */
-
-#define HYDRA_INT_SIO 0
-#define HYDRA_INT_SCSI_DMA 1
-#define HYDRA_INT_SCCA_TX_DMA 2
-#define HYDRA_INT_SCCA_RX_DMA 3
-#define HYDRA_INT_SCCB_TX_DMA 4
-#define HYDRA_INT_SCCB_RX_DMA 5
-#define HYDRA_INT_SCSI 6
-#define HYDRA_INT_SCCA 7
-#define HYDRA_INT_SCCB 8
-#define HYDRA_INT_VIA 9
-#define HYDRA_INT_ADB 10
-#define HYDRA_INT_ADB_NMI 11
-#define HYDRA_INT_EXT1 12 /* PCI IRQW */
-#define HYDRA_INT_EXT2 13 /* PCI IRQX */
-#define HYDRA_INT_EXT3 14 /* PCI IRQY */
-#define HYDRA_INT_EXT4 15 /* PCI IRQZ */
-#define HYDRA_INT_EXT5 16 /* IDE Primay/Secondary */
-#define HYDRA_INT_EXT6 17 /* IDE Secondary */
-#define HYDRA_INT_EXT7 18 /* Power Off Request */
-#define HYDRA_INT_SPARE 19
-
-extern int hydra_init(void);
-extern void macio_adb_init(void);
-
-#endif /* __KERNEL__ */
-
-#endif /* _ASMPPC_HYDRA_H */
diff --git a/include/asm-ppc/ibm403.h b/include/asm-ppc/ibm403.h
deleted file mode 100644
index c9c5d53..0000000
--- a/include/asm-ppc/ibm403.h
+++ /dev/null
@@ -1,478 +0,0 @@
-/*
- * Authors: Armin Kuster <akuster@mvista.com> and Tom Rini <trini@mvista.com>
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBM403_H__
-#define __ASM_IBM403_H__
-
-
-#if defined(CONFIG_403GCX)
-
-#define DCRN_BE_BASE 0x090
-#define DCRN_DMA0_BASE 0x0C0
-#define DCRN_DMA1_BASE 0x0C8
-#define DCRN_DMA2_BASE 0x0D0
-#define DCRN_DMA3_BASE 0x0D8
-#define DCRNCAP_DMA_CC 1 /* have DMA chained count capability */
-#define DCRN_DMASR_BASE 0x0E0
-
-#define DCRN_EXIER_BASE 0x042
-#define DCRN_EXISR_BASE 0x040
-#define DCRN_IOCR_BASE 0x0A0
-
-
-/* ------------------------------------------------------------------------- */
-#endif
-
-
-
-#ifdef DCRN_BE_BASE
-#define DCRN_BEAR (DCRN_BE_BASE + 0x0) /* Bus Error Address Register */
-#define DCRN_BESR (DCRN_BE_BASE + 0x1) /* Bus Error Syndrome Register*/
-#endif
-/* DCRN_BESR */
-#define BESR_DSES 0x80000000 /* Data-Side Error Status */
-#define BESR_DMES 0x40000000 /* DMA Error Status */
-#define BESR_RWS 0x20000000 /* Read/Write Status */
-#define BESR_ETMASK 0x1C000000 /* Error Type */
-#define ET_PROT 0
-#define ET_PARITY 1
-#define ET_NCFG 2
-#define ET_BUSERR 4
-#define ET_BUSTO 6
-
-#ifdef DCRN_CHCR_BASE
-#define DCRN_CHCR0 (DCRN_CHCR_BASE + 0x0) /* Chip Control Register 1 */
-#define DCRN_CHCR1 (DCRN_CHCR_BASE + 0x1) /* Chip Control Register 2 */
-#endif
-#define CHR1_CETE 0x00800000 /* CPU external timer enable */
-#define CHR1_PCIPW 0x00008000 /* PCI Int enable/Peripheral Write enable */
-
-#ifdef DCRN_CHPSR_BASE
-#define DCRN_CHPSR (DCRN_CHPSR_BASE + 0x0) /* Chip Pin Strapping */
-#endif
-
-#ifdef DCRN_CIC_BASE
-#define DCRN_CICCR (DCRN_CIC_BASE + 0x0) /* CIC Control Register */
-#define DCRN_DMAS1 (DCRN_CIC_BASE + 0x1) /* DMA Select1 Register */
-#define DCRN_DMAS2 (DCRN_CIC_BASE + 0x2) /* DMA Select2 Register */
-#define DCRN_CICVCR (DCRN_CIC_BASE + 0x3) /* CIC Video COntro Register */
-#define DCRN_CICSEL3 (DCRN_CIC_BASE + 0x5) /* CIC Select 3 Register */
-#define DCRN_SGPO (DCRN_CIC_BASE + 0x6) /* CIC GPIO Output Register */
-#define DCRN_SGPOD (DCRN_CIC_BASE + 0x7) /* CIC GPIO OD Register */
-#define DCRN_SGPTC (DCRN_CIC_BASE + 0x8) /* CIC GPIO Tristate Ctrl Reg */
-#define DCRN_SGPI (DCRN_CIC_BASE + 0x9) /* CIC GPIO Input Reg */
-#endif
-
-#ifdef DCRN_CPMFR_BASE
-#define DCRN_CPMFR (DCRN_CPMFR_BASE + 0x0) /* CPM Force */
-#endif
-
-#ifndef CPM_AUD
-#define CPM_AUD 0x00000000
-#endif
-#ifndef CPM_BRG
-#define CPM_BRG 0x00000000
-#endif
-#ifndef CPM_CBS
-#define CPM_CBS 0x00000000
-#endif
-#ifndef CPM_CPU
-#define CPM_CPU 0x00000000
-#endif
-#ifndef CPM_DCP
-#define CPM_DCP 0x00000000
-#endif
-#ifndef CPM_DCRX
-#define CPM_DCRX 0x00000000
-#endif
-#ifndef CPM_DENC
-#define CPM_DENC 0x00000000
-#endif
-#ifndef CPM_DMA
-#define CPM_DMA 0x00000000
-#endif
-#ifndef CPM_DSCR
-#define CPM_DSCR 0x00000000
-#endif
-#ifndef CPM_EBC
-#define CPM_EBC 0x00000000
-#endif
-#ifndef CPM_EBIU
-#define CPM_EBIU 0x00000000
-#endif
-#ifndef CPM_EMAC_MM
-#define CPM_EMAC_MM 0x00000000
-#endif
-#ifndef CPM_EMAC_RM
-#define CPM_EMAC_RM 0x00000000
-#endif
-#ifndef CPM_EMAC_TM
-#define CPM_EMAC_TM 0x00000000
-#endif
-#ifndef CPM_GPIO0
-#define CPM_GPIO0 0x00000000
-#endif
-#ifndef CPM_GPT
-#define CPM_GPT 0x00000000
-#endif
-#ifndef CPM_I1284
-#define CPM_I1284 0x00000000
-#endif
-#ifndef CPM_IIC0
-#define CPM_IIC0 0x00000000
-#endif
-#ifndef CPM_IIC1
-#define CPM_IIC1 0x00000000
-#endif
-#ifndef CPM_MSI
-#define CPM_MSI 0x00000000
-#endif
-#ifndef CPM_PCI
-#define CPM_PCI 0x00000000
-#endif
-#ifndef CPM_PLB
-#define CPM_PLB 0x00000000
-#endif
-#ifndef CPM_SC0
-#define CPM_SC0 0x00000000
-#endif
-#ifndef CPM_SC1
-#define CPM_SC1 0x00000000
-#endif
-#ifndef CPM_SDRAM0
-#define CPM_SDRAM0 0x00000000
-#endif
-#ifndef CPM_SDRAM1
-#define CPM_SDRAM1 0x00000000
-#endif
-#ifndef CPM_TMRCLK
-#define CPM_TMRCLK 0x00000000
-#endif
-#ifndef CPM_UART0
-#define CPM_UART0 0x00000000
-#endif
-#ifndef CPM_UART1
-#define CPM_UART1 0x00000000
-#endif
-#ifndef CPM_UART2
-#define CPM_UART2 0x00000000
-#endif
-#ifndef CPM_UIC
-#define CPM_UIC 0x00000000
-#endif
-#ifndef CPM_VID2
-#define CPM_VID2 0x00000000
-#endif
-#ifndef CPM_XPT27
-#define CPM_XPT27 0x00000000
-#endif
-#ifndef CPM_XPT54
-#define CPM_XPT54 0x00000000
-#endif
-
-#ifdef DCRN_CPMSR_BASE
-#define DCRN_CPMSR (DCRN_CPMSR_BASE + 0x0) /* CPM Status */
-#define DCRN_CPMER (DCRN_CPMSR_BASE + 0x1) /* CPM Enable */
-#endif
-
-#ifdef DCRN_DCP0_BASE
-#define DCRN_DCP0_CFGADDR (DCRN_DCP0_BASE + 0x0) /* Decompression Controller Address */
-#define DCRN_DCP0_CFGDATA (DCRN_DCP0_BASE + 0x1) /* Decompression Controller Data */
-#endif
-
-#ifdef DCRN_DCRX_BASE
-#define DCRN_DCRXICR (DCRN_DCRX_BASE + 0x0) /* Internal Control Register */
-#define DCRN_DCRXISR (DCRN_DCRX_BASE + 0x1) /* Internal Status Register */
-#define DCRN_DCRXECR (DCRN_DCRX_BASE + 0x2) /* External Control Register */
-#define DCRN_DCRXESR (DCRN_DCRX_BASE + 0x3) /* External Status Register */
-#define DCRN_DCRXTAR (DCRN_DCRX_BASE + 0x4) /* Target Address Register */
-#define DCRN_DCRXTDR (DCRN_DCRX_BASE + 0x5) /* Target Data Register */
-#define DCRN_DCRXIGR (DCRN_DCRX_BASE + 0x6) /* Interrupt Generation Register */
-#define DCRN_DCRXBCR (DCRN_DCRX_BASE + 0x7) /* Line Buffer Control Register */
-#endif
-
-#ifdef DCRN_DMA0_BASE
-#define DCRN_DMACR0 (DCRN_DMA0_BASE + 0x0) /* DMA Channel Control Register 0 */
-#define DCRN_DMACT0 (DCRN_DMA0_BASE + 0x1) /* DMA Count Register 0 */
-#define DCRN_DMADA0 (DCRN_DMA0_BASE + 0x2) /* DMA Destination Address Register 0 */
-#define DCRN_DMASA0 (DCRN_DMA0_BASE + 0x3) /* DMA Source Address Register 0 */
-#ifdef DCRNCAP_DMA_CC
-#define DCRN_DMACC0 (DCRN_DMA0_BASE + 0x4) /* DMA Chained Count Register 0 */
-#endif
-
-#ifdef DCRNCAP_DMA_SG
-#define DCRN_ASG0 (DCRN_DMA0_BASE + 0x4) /* DMA Scatter/Gather Descriptor Addr 0 */
-#endif
-#endif
-
-#ifdef DCRN_DMA1_BASE
-#define DCRN_DMACR1 (DCRN_DMA1_BASE + 0x0) /* DMA Channel Control Register 1 */
-#define DCRN_DMACT1 (DCRN_DMA1_BASE + 0x1) /* DMA Count Register 1 */
-#define DCRN_DMADA1 (DCRN_DMA1_BASE + 0x2) /* DMA Destination Address Register 1 */
-#define DCRN_DMASA1 (DCRN_DMA1_BASE + 0x3) /* DMA Source Address Register 1 */
-
-#ifdef DCRNCAP_DMA_CC
-#define DCRN_DMACC1 (DCRN_DMA1_BASE + 0x4) /* DMA Chained Count Register 1 */
-#endif
-#ifdef DCRNCAP_DMA_SG
-#define DCRN_ASG1 (DCRN_DMA1_BASE + 0x4) /* DMA Scatter/Gather Descriptor Addr 1 */
-#endif
-#endif
-
-#ifdef DCRN_DMA2_BASE
-#define DCRN_DMACR2 (DCRN_DMA2_BASE + 0x0) /* DMA Channel Control Register 2 */
-#define DCRN_DMACT2 (DCRN_DMA2_BASE + 0x1) /* DMA Count Register 2 */
-#define DCRN_DMADA2 (DCRN_DMA2_BASE + 0x2) /* DMA Destination Address Register 2 */
-#define DCRN_DMASA2 (DCRN_DMA2_BASE + 0x3) /* DMA Source Address Register 2 */
-#ifdef DCRNCAP_DMA_CC
-#define DCRN_DMACC2 (DCRN_DMA2_BASE + 0x4) /* DMA Chained Count Register 2 */
-#endif
-#ifdef DCRNCAP_DMA_SG
-#define DCRN_ASG2 (DCRN_DMA2_BASE + 0x4) /* DMA Scatter/Gather Descriptor Addr 2 */
-#endif
-#endif
-
-#ifdef DCRN_DMA3_BASE
-#define DCRN_DMACR3 (DCRN_DMA3_BASE + 0x0) /* DMA Channel Control Register 3 */
-#define DCRN_DMACT3 (DCRN_DMA3_BASE + 0x1) /* DMA Count Register 3 */
-#define DCRN_DMADA3 (DCRN_DMA3_BASE + 0x2) /* DMA Destination Address Register 3 */
-#define DCRN_DMASA3 (DCRN_DMA3_BASE + 0x3) /* DMA Source Address Register 3 */
-#ifdef DCRNCAP_DMA_CC
-#define DCRN_DMACC3 (DCRN_DMA3_BASE + 0x4) /* DMA Chained Count Register 3 */
-#endif
-#ifdef DCRNCAP_DMA_SG
-#define DCRN_ASG3 (DCRN_DMA3_BASE + 0x4) /* DMA Scatter/Gather Descriptor Addr 3 */
-#endif
-#endif
-
-#ifdef DCRN_DMASR_BASE
-#define DCRN_DMASR (DCRN_DMASR_BASE + 0x0) /* DMA Status Register */
-#ifdef DCRNCAP_DMA_SG
-#define DCRN_ASGC (DCRN_DMASR_BASE + 0x3) /* DMA Scatter/Gather Command */
-/* don't know if these two registers always exist if scatter/gather exists */
-#define DCRN_POL (DCRN_DMASR_BASE + 0x6) /* DMA Polarity Register */
-#define DCRN_SLP (DCRN_DMASR_BASE + 0x5) /* DMA Sleep Register */
-#endif
-#endif
-
-#ifdef DCRN_EBC_BASE
-#define DCRN_EBCCFGADR (DCRN_EBC_BASE + 0x0) /* Peripheral Controller Address */
-#define DCRN_EBCCFGDATA (DCRN_EBC_BASE + 0x1) /* Peripheral Controller Data */
-#endif
-
-#ifdef DCRN_EXIER_BASE
-#define DCRN_EXIER (DCRN_EXIER_BASE + 0x0) /* External Interrupt Enable Register */
-#endif
-
-#ifdef DCRN_EBIMC_BASE
-#define DCRN_BRCRH0 (DCRN_EBIMC_BASE + 0x0) /* Bus Region Config High 0 */
-#define DCRN_BRCRH1 (DCRN_EBIMC_BASE + 0x1) /* Bus Region Config High 1 */
-#define DCRN_BRCRH2 (DCRN_EBIMC_BASE + 0x2) /* Bus Region Config High 2 */
-#define DCRN_BRCRH3 (DCRN_EBIMC_BASE + 0x3) /* Bus Region Config High 3 */
-#define DCRN_BRCRH4 (DCRN_EBIMC_BASE + 0x4) /* Bus Region Config High 4 */
-#define DCRN_BRCRH5 (DCRN_EBIMC_BASE + 0x5) /* Bus Region Config High 5 */
-#define DCRN_BRCRH6 (DCRN_EBIMC_BASE + 0x6) /* Bus Region Config High 6 */
-#define DCRN_BRCRH7 (DCRN_EBIMC_BASE + 0x7) /* Bus Region Config High 7 */
-#define DCRN_BRCR0 (DCRN_EBIMC_BASE + 0x10)/* BRC 0 */
-#define DCRN_BRCR1 (DCRN_EBIMC_BASE + 0x11)/* BRC 1 */
-#define DCRN_BRCR2 (DCRN_EBIMC_BASE + 0x12)/* BRC 2 */
-#define DCRN_BRCR3 (DCRN_EBIMC_BASE + 0x13)/* BRC 3 */
-#define DCRN_BRCR4 (DCRN_EBIMC_BASE + 0x14)/* BRC 4 */
-#define DCRN_BRCR5 (DCRN_EBIMC_BASE + 0x15)/* BRC 5 */
-#define DCRN_BRCR6 (DCRN_EBIMC_BASE + 0x16)/* BRC 6 */
-#define DCRN_BRCR7 (DCRN_EBIMC_BASE + 0x17)/* BRC 7 */
-#define DCRN_BEAR0 (DCRN_EBIMC_BASE + 0x20)/* Bus Error Address Register */
-#define DCRN_BESR0 (DCRN_EBIMC_BASE + 0x21)/* Bus Error Status Register */
-#define DCRN_BIUCR (DCRN_EBIMC_BASE + 0x2A)/* Bus Interfac Unit Ctrl Reg */
-#endif
-
-#ifdef DCRN_EXISR_BASE
-#define DCRN_EXISR (DCRN_EXISR_BASE + 0x0) /* External Interrupt Status Register */
-#endif
-#define EXIER_CIE 0x80000000 /* Critical Interrupt Enable */
-#define EXIER_SRIE 0x08000000 /* Serial Port Rx Int. Enable */
-#define EXIER_STIE 0x04000000 /* Serial Port Tx Int. Enable */
-#define EXIER_JRIE 0x02000000 /* JTAG Serial Port Rx Int. Enable */
-#define EXIER_JTIE 0x01000000 /* JTAG Serial Port Tx Int. Enable */
-#define EXIER_D0IE 0x00800000 /* DMA Channel 0 Interrupt Enable */
-#define EXIER_D1IE 0x00400000 /* DMA Channel 1 Interrupt Enable */
-#define EXIER_D2IE 0x00200000 /* DMA Channel 2 Interrupt Enable */
-#define EXIER_D3IE 0x00100000 /* DMA Channel 3 Interrupt Enable */
-#define EXIER_E0IE 0x00000010 /* External Interrupt 0 Enable */
-#define EXIER_E1IE 0x00000008 /* External Interrupt 1 Enable */
-#define EXIER_E2IE 0x00000004 /* External Interrupt 2 Enable */
-#define EXIER_E3IE 0x00000002 /* External Interrupt 3 Enable */
-#define EXIER_E4IE 0x00000001 /* External Interrupt 4 Enable */
-
-#ifdef DCRN_IOCR_BASE
-#define DCRN_IOCR (DCRN_IOCR_BASE + 0x0) /* Input/Output Configuration Register */
-#endif
-#define IOCR_E0TE 0x80000000
-#define IOCR_E0LP 0x40000000
-#define IOCR_E1TE 0x20000000
-#define IOCR_E1LP 0x10000000
-#define IOCR_E2TE 0x08000000
-#define IOCR_E2LP 0x04000000
-#define IOCR_E3TE 0x02000000
-#define IOCR_E3LP 0x01000000
-#define IOCR_E4TE 0x00800000
-#define IOCR_E4LP 0x00400000
-#define IOCR_EDT 0x00080000
-#define IOCR_SOR 0x00040000
-#define IOCR_EDO 0x00008000
-#define IOCR_2XC 0x00004000
-#define IOCR_ATC 0x00002000
-#define IOCR_SPD 0x00001000
-#define IOCR_BEM 0x00000800
-#define IOCR_PTD 0x00000400
-#define IOCR_ARE 0x00000080
-#define IOCR_DRC 0x00000020
-#define IOCR_RDM(x) (((x) & 0x3) << 3)
-#define IOCR_TCS 0x00000004
-#define IOCR_SCS 0x00000002
-#define IOCR_SPC 0x00000001
-
-#ifdef DCRN_MAL_BASE
-#define DCRN_MALCR (DCRN_MAL_BASE + 0x0) /* MAL Configuration */
-#define DCRN_MALDBR (DCRN_MAL_BASE + 0x3) /* Debug Register */
-#define DCRN_MALESR (DCRN_MAL_BASE + 0x1) /* Error Status */
-#define DCRN_MALIER (DCRN_MAL_BASE + 0x2) /* Interrupt Enable */
-#define DCRN_MALTXCARR (DCRN_MAL_BASE + 0x5) /* TX Channed Active Reset Register */
-#define DCRN_MALTXCASR (DCRN_MAL_BASE + 0x4) /* TX Channel Active Set Register */
-#define DCRN_MALTXDEIR (DCRN_MAL_BASE + 0x7) /* Tx Descriptor Error Interrupt */
-#define DCRN_MALTXEOBISR (DCRN_MAL_BASE + 0x6) /* Tx End of Buffer Interrupt Status */
-#define DCRN_MALRXCARR (DCRN_MAL_BASE + 0x11) /* RX Channed Active Reset Register */
-#define DCRN_MALRXCASR (DCRN_MAL_BASE + 0x10) /* RX Channel Active Set Register */
-#define DCRN_MALRXDEIR (DCRN_MAL_BASE + 0x13) /* Rx Descriptor Error Interrupt */
-#define DCRN_MALRXEOBISR (DCRN_MAL_BASE + 0x12) /* Rx End of Buffer Interrupt Status */
-#define DCRN_MALRXCTP0R (DCRN_MAL_BASE + 0x40) /* Channel Rx 0 Channel Table Pointer */
-#define DCRN_MALTXCTP0R (DCRN_MAL_BASE + 0x20) /* Channel Tx 0 Channel Table Pointer */
-#define DCRN_MALTXCTP1R (DCRN_MAL_BASE + 0x21) /* Channel Tx 1 Channel Table Pointer */
-#define DCRN_MALRCBS0 (DCRN_MAL_BASE + 0x60) /* Channel Rx 0 Channel Buffer Size */
-#endif
-/* DCRN_MALCR */
-#define MALCR_MMSR 0x80000000/* MAL Software reset */
-#define MALCR_PLBP_1 0x00400000 /* MAL reqest priority: */
-#define MALCR_PLBP_2 0x00800000 /* lowsest is 00 */
-#define MALCR_PLBP_3 0x00C00000 /* highest */
-#define MALCR_GA 0x00200000 /* Guarded Active Bit */
-#define MALCR_OA 0x00100000 /* Ordered Active Bit */
-#define MALCR_PLBLE 0x00080000 /* PLB Lock Error Bit */
-#define MALCR_PLBLT_1 0x00040000 /* PLB Latency Timer */
-#define MALCR_PLBLT_2 0x00020000
-#define MALCR_PLBLT_3 0x00010000
-#define MALCR_PLBLT_4 0x00008000
-#define MALCR_PLBLT_DEFAULT 0x00078000 /* JSP: Is this a valid default?? */
-#define MALCR_PLBB 0x00004000 /* PLB Burst Deactivation Bit */
-#define MALCR_OPBBL 0x00000080 /* OPB Lock Bit */
-#define MALCR_EOPIE 0x00000004 /* End Of Packet Interrupt Enable */
-#define MALCR_LEA 0x00000002 /* Locked Error Active */
-#define MALCR_MSD 0x00000001 /* MAL Scroll Descriptor Bit */
-/* DCRN_MALESR */
-#define MALESR_EVB 0x80000000 /* Error Valid Bit */
-#define MALESR_CIDRX 0x40000000 /* Channel ID Receive */
-#define MALESR_DE 0x00100000 /* Descriptor Error */
-#define MALESR_OEN 0x00080000 /* OPB Non-Fullword Error */
-#define MALESR_OTE 0x00040000 /* OPB Timeout Error */
-#define MALESR_OSE 0x00020000 /* OPB Slave Error */
-#define MALESR_PEIN 0x00010000 /* PLB Bus Error Indication */
-#define MALESR_DEI 0x00000010 /* Descriptor Error Interrupt */
-#define MALESR_ONEI 0x00000008 /* OPB Non-Fullword Error Interrupt */
-#define MALESR_OTEI 0x00000004 /* OPB Timeout Error Interrupt */
-#define MALESR_OSEI 0x00000002 /* OPB Slace Error Interrupt */
-#define MALESR_PBEI 0x00000001 /* PLB Bus Error Interrupt */
-/* DCRN_MALIER */
-#define MALIER_DE 0x00000010 /* Descriptor Error Interrupt Enable */
-#define MALIER_NE 0x00000008 /* OPB Non-word Transfer Int Enable */
-#define MALIER_TE 0x00000004 /* OPB Time Out Error Interrupt Enable */
-#define MALIER_OPBE 0x00000002 /* OPB Slave Error Interrupt Enable */
-#define MALIER_PLBE 0x00000001 /* PLB Error Interrupt Enable */
-/* DCRN_MALTXEOBISR */
-#define MALOBISR_CH0 0x80000000 /* EOB channel 1 bit */
-#define MALOBISR_CH2 0x40000000 /* EOB channel 2 bit */
-
-#ifdef DCRN_OCM0_BASE
-#define DCRN_OCMISARC (DCRN_OCM0_BASE + 0x0) /* OCM Instr Side Addr Range Compare */
-#define DCRN_OCMISCR (DCRN_OCM0_BASE + 0x1) /* OCM Instr Side Control */
-#define DCRN_OCMDSARC (DCRN_OCM0_BASE + 0x2) /* OCM Data Side Addr Range Compare */
-#define DCRN_OCMDSCR (DCRN_OCM0_BASE + 0x3) /* OCM Data Side Control */
-#endif
-
-#ifdef DCRN_PLB0_BASE
-#define DCRN_PLB0_BESR (DCRN_PLB0_BASE + 0x0)
-#define DCRN_PLB0_BEAR (DCRN_PLB0_BASE + 0x2)
-/* doesn't exist on stb03xxx? */
-#define DCRN_PLB0_ACR (DCRN_PLB0_BASE + 0x3)
-#endif
-
-#ifdef DCRN_PLB1_BASE
-#define DCRN_PLB1_BESR (DCRN_PLB1_BASE + 0x0)
-#define DCRN_PLB1_BEAR (DCRN_PLB1_BASE + 0x1)
-/* doesn't exist on stb03xxx? */
-#define DCRN_PLB1_ACR (DCRN_PLB1_BASE + 0x2)
-#endif
-
-#ifdef DCRN_PLLMR_BASE
-#define DCRN_PLLMR (DCRN_PLLMR_BASE + 0x0) /* PL1 Mode */
-#endif
-
-#ifdef DCRN_POB0_BASE
-#define DCRN_POB0_BESR0 (DCRN_POB0_BASE + 0x0)
-#define DCRN_POB0_BEAR (DCRN_POB0_BASE + 0x2)
-#define DCRN_POB0_BESR1 (DCRN_POB0_BASE + 0x4)
-#endif
-
-#ifdef DCRN_SCCR_BASE
-#define DCRN_SCCR (DCRN_SCCR_BASE + 0x0)
-#endif
-
-#ifdef DCRN_SDRAM0_BASE
-#define DCRN_SDRAM0_CFGADDR (DCRN_SDRAM0_BASE + 0x0) /* Mem Ctrlr Address */
-#define DCRN_SDRAM0_CFGDATA (DCRN_SDRAM0_BASE + 0x1) /* Mem Ctrlr Data */
-#endif
-
-#ifdef DCRN_UIC0_BASE
-#define DCRN_UIC0_SR (DCRN_UIC0_BASE + 0x0)
-#define DCRN_UIC0_ER (DCRN_UIC0_BASE + 0x2)
-#define DCRN_UIC0_CR (DCRN_UIC0_BASE + 0x3)
-#define DCRN_UIC0_PR (DCRN_UIC0_BASE + 0x4)
-#define DCRN_UIC0_TR (DCRN_UIC0_BASE + 0x5)
-#define DCRN_UIC0_MSR (DCRN_UIC0_BASE + 0x6)
-#define DCRN_UIC0_VR (DCRN_UIC0_BASE + 0x7)
-#define DCRN_UIC0_VCR (DCRN_UIC0_BASE + 0x8)
-#endif
-
-#ifdef DCRN_UIC1_BASE
-#define DCRN_UIC1_SR (DCRN_UIC1_BASE + 0x0)
-#define DCRN_UIC1_SRS (DCRN_UIC1_BASE + 0x1)
-#define DCRN_UIC1_ER (DCRN_UIC1_BASE + 0x2)
-#define DCRN_UIC1_CR (DCRN_UIC1_BASE + 0x3)
-#define DCRN_UIC1_PR (DCRN_UIC1_BASE + 0x4)
-#define DCRN_UIC1_TR (DCRN_UIC1_BASE + 0x5)
-#define DCRN_UIC1_MSR (DCRN_UIC1_BASE + 0x6)
-#define DCRN_UIC1_VR (DCRN_UIC1_BASE + 0x7)
-#define DCRN_UIC1_VCR (DCRN_UIC1_BASE + 0x8)
-#endif
-
-#ifdef DCRN_SDRAM0_BASE
-#define DCRN_SDRAM0_CFGADDR (DCRN_SDRAM0_BASE + 0x0) /* Memory Controller Address */
-#define DCRN_SDRAM0_CFGDATA (DCRN_SDRAM0_BASE + 0x1) /* Memory Controller Data */
-#endif
-
-#ifdef DCRN_OCM0_BASE
-#define DCRN_OCMISARC (DCRN_OCM0_BASE + 0x0) /* OCM Instr Side Addr Range Compare */
-#define DCRN_OCMISCR (DCRN_OCM0_BASE + 0x1) /* OCM Instr Side Control */
-#define DCRN_OCMDSARC (DCRN_OCM0_BASE + 0x2) /* OCM Data Side Addr Range Compare */
-#define DCRN_OCMDSCR (DCRN_OCM0_BASE + 0x3) /* OCM Data Side Control */
-#endif
-
-#endif /* __ASM_IBM403_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ibm405.h b/include/asm-ppc/ibm405.h
deleted file mode 100644
index 4e5be9e..0000000
--- a/include/asm-ppc/ibm405.h
+++ /dev/null
@@ -1,299 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBM405_H__
-#define __ASM_IBM405_H__
-
-#ifdef DCRN_BE_BASE
-#define DCRN_BEAR (DCRN_BE_BASE + 0x0) /* Bus Error Address Register */
-#define DCRN_BESR (DCRN_BE_BASE + 0x1) /* Bus Error Syndrome Register */
-#endif
-/* DCRN_BESR */
-#define BESR_DSES 0x80000000 /* Data-Side Error Status */
-#define BESR_DMES 0x40000000 /* DMA Error Status */
-#define BESR_RWS 0x20000000 /* Read/Write Status */
-#define BESR_ETMASK 0x1C000000 /* Error Type */
-#define ET_PROT 0
-#define ET_PARITY 1
-#define ET_NCFG 2
-#define ET_BUSERR 4
-#define ET_BUSTO 6
-
-/* Clock and power management shifts for emacs */
-#define IBM_CPM_EMMII 0 /* Shift value for MII */
-#define IBM_CPM_EMRX 1 /* Shift value for recv */
-#define IBM_CPM_EMTX 2 /* Shift value for MAC */
-
-#ifdef DCRN_CHCR_BASE
-#define DCRN_CHCR0 (DCRN_CHCR_BASE + 0x0) /* Chip Control Register 1 */
-#define DCRN_CHCR1 (DCRN_CHCR_BASE + 0x1) /* Chip Control Register 2 */
-#endif
-#define CHR1_PCIPW 0x00008000 /* PCI Int enable/Peripheral Write enable */
-
-#ifdef DCRN_CHPSR_BASE
-#define DCRN_CHPSR (DCRN_CHPSR_BASE + 0x0) /* Chip Pin Strapping */
-#endif
-
-#ifdef DCRN_CPMFR_BASE
-#define DCRN_CPMFR (DCRN_CPMFR_BASE + 0x0) /* CPM Force */
-#endif
-
-#ifdef DCRN_CPMSR_BASE
-#define DCRN_CPMSR (DCRN_CPMSR_BASE + 0x0) /* CPM Status */
-#define DCRN_CPMER (DCRN_CPMSR_BASE + 0x1) /* CPM Enable */
-#endif
-
-#ifdef DCRN_DCP0_BASE
-/* Decompression Controller Address */
-#define DCRN_DCP0_CFGADDR (DCRN_DCP0_BASE + 0x0)
-/* Decompression Controller Data */
-#define DCRN_DCP0_CFGDATA (DCRN_DCP0_BASE + 0x1)
-#else
-#define DCRN_DCP0_CFGADDR 0x0
-#define DCRN_DCP0_CFGDATA 0x0
-#endif
-
-#ifdef DCRN_DMA0_BASE
-/* DMA Channel Control Register 0 */
-#define DCRN_DMACR0 (DCRN_DMA0_BASE + 0x0)
-#define DCRN_DMACT0 (DCRN_DMA0_BASE + 0x1) /* DMA Count Register 0 */
-/* DMA Destination Address Register 0 */
-#define DCRN_DMADA0 (DCRN_DMA0_BASE + 0x2)
-/* DMA Source Address Register 0 */
-#define DCRN_DMASA0 (DCRN_DMA0_BASE + 0x3)
-#ifdef DCRNCAP_DMA_CC
-/* DMA Chained Count Register 0 */
-#define DCRN_DMACC0 (DCRN_DMA0_BASE + 0x4)
-#endif
-#ifdef DCRNCAP_DMA_SG
-/* DMA Scatter/Gather Descriptor Addr 0 */
-#define DCRN_ASG0 (DCRN_DMA0_BASE + 0x4)
-#endif
-#endif
-
-#ifdef DCRN_DMA1_BASE
-/* DMA Channel Control Register 1 */
-#define DCRN_DMACR1 (DCRN_DMA1_BASE + 0x0)
-#define DCRN_DMACT1 (DCRN_DMA1_BASE + 0x1) /* DMA Count Register 1 */
-/* DMA Destination Address Register 1 */
-#define DCRN_DMADA1 (DCRN_DMA1_BASE + 0x2)
-/* DMA Source Address Register 1 */
-#define DCRN_DMASA1 (DCRN_DMA1_BASE + 0x3) /* DMA Source Address Register 1 */
-#ifdef DCRNCAP_DMA_CC
-/* DMA Chained Count Register 1 */
-#define DCRN_DMACC1 (DCRN_DMA1_BASE + 0x4)
-#endif
-#ifdef DCRNCAP_DMA_SG
-/* DMA Scatter/Gather Descriptor Addr 1 */
-#define DCRN_ASG1 (DCRN_DMA1_BASE + 0x4)
-#endif
-#endif
-
-#ifdef DCRN_DMA2_BASE
-#define DCRN_DMACR2 (DCRN_DMA2_BASE + 0x0) /* DMA Channel Control Register 2 */
-#define DCRN_DMACT2 (DCRN_DMA2_BASE + 0x1) /* DMA Count Register 2 */
-#define DCRN_DMADA2 (DCRN_DMA2_BASE + 0x2) /* DMA Destination Address Register 2 */
-#define DCRN_DMASA2 (DCRN_DMA2_BASE + 0x3) /* DMA Source Address Register 2 */
-#ifdef DCRNCAP_DMA_CC
-#define DCRN_DMACC2 (DCRN_DMA2_BASE + 0x4) /* DMA Chained Count Register 2 */
-#endif
-#ifdef DCRNCAP_DMA_SG
-#define DCRN_ASG2 (DCRN_DMA2_BASE + 0x4) /* DMA Scatter/Gather Descriptor Addr 2 */
-#endif
-#endif
-
-#ifdef DCRN_DMA3_BASE
-#define DCRN_DMACR3 (DCRN_DMA3_BASE + 0x0) /* DMA Channel Control Register 3 */
-#define DCRN_DMACT3 (DCRN_DMA3_BASE + 0x1) /* DMA Count Register 3 */
-#define DCRN_DMADA3 (DCRN_DMA3_BASE + 0x2) /* DMA Destination Address Register 3 */
-#define DCRN_DMASA3 (DCRN_DMA3_BASE + 0x3) /* DMA Source Address Register 3 */
-#ifdef DCRNCAP_DMA_CC
-#define DCRN_DMACC3 (DCRN_DMA3_BASE + 0x4) /* DMA Chained Count Register 3 */
-#endif
-#ifdef DCRNCAP_DMA_SG
-#define DCRN_ASG3 (DCRN_DMA3_BASE + 0x4) /* DMA Scatter/Gather Descriptor Addr 3 */
-#endif
-#endif
-
-#ifdef DCRN_DMASR_BASE
-#define DCRN_DMASR (DCRN_DMASR_BASE + 0x0) /* DMA Status Register */
-#ifdef DCRNCAP_DMA_SG
-#define DCRN_ASGC (DCRN_DMASR_BASE + 0x3) /* DMA Scatter/Gather Command */
-/* don't know if these two registers always exist if scatter/gather exists */
-#define DCRN_POL (DCRN_DMASR_BASE + 0x6) /* DMA Polarity Register */
-#define DCRN_SLP (DCRN_DMASR_BASE + 0x5) /* DMA Sleep Register */
-#endif
-#endif
-
-#ifdef DCRN_EBC_BASE
-#define DCRN_EBCCFGADR (DCRN_EBC_BASE + 0x0) /* Peripheral Controller Address */
-#define DCRN_EBCCFGDATA (DCRN_EBC_BASE + 0x1) /* Peripheral Controller Data */
-#endif
-
-#ifdef DCRN_EXIER_BASE
-#define DCRN_EXIER (DCRN_EXIER_BASE + 0x0) /* External Interrupt Enable Register */
-#endif
-
-#ifdef DCRN_EXISR_BASE
-#define DCRN_EXISR (DCRN_EXISR_BASE + 0x0) /* External Interrupt Status Register */
-#endif
-
-#define EXIER_CIE 0x80000000 /* Critical Interrupt Enable */
-#define EXIER_SRIE 0x08000000 /* Serial Port Rx Int. Enable */
-#define EXIER_STIE 0x04000000 /* Serial Port Tx Int. Enable */
-#define EXIER_JRIE 0x02000000 /* JTAG Serial Port Rx Int. Enable */
-#define EXIER_JTIE 0x01000000 /* JTAG Serial Port Tx Int. Enable */
-#define EXIER_D0IE 0x00800000 /* DMA Channel 0 Interrupt Enable */
-#define EXIER_D1IE 0x00400000 /* DMA Channel 1 Interrupt Enable */
-#define EXIER_D2IE 0x00200000 /* DMA Channel 2 Interrupt Enable */
-#define EXIER_D3IE 0x00100000 /* DMA Channel 3 Interrupt Enable */
-#define EXIER_E0IE 0x00000010 /* External Interrupt 0 Enable */
-#define EXIER_E1IE 0x00000008 /* External Interrupt 1 Enable */
-#define EXIER_E2IE 0x00000004 /* External Interrupt 2 Enable */
-#define EXIER_E3IE 0x00000002 /* External Interrupt 3 Enable */
-#define EXIER_E4IE 0x00000001 /* External Interrupt 4 Enable */
-
-#ifdef DCRN_IOCR_BASE
-#define DCRN_IOCR (DCRN_IOCR_BASE + 0x0) /* Input/Output Configuration Register */
-#endif
-#define IOCR_E0TE 0x80000000
-#define IOCR_E0LP 0x40000000
-#define IOCR_E1TE 0x20000000
-#define IOCR_E1LP 0x10000000
-#define IOCR_E2TE 0x08000000
-#define IOCR_E2LP 0x04000000
-#define IOCR_E3TE 0x02000000
-#define IOCR_E3LP 0x01000000
-#define IOCR_E4TE 0x00800000
-#define IOCR_E4LP 0x00400000
-#define IOCR_EDT 0x00080000
-#define IOCR_SOR 0x00040000
-#define IOCR_EDO 0x00008000
-#define IOCR_2XC 0x00004000
-#define IOCR_ATC 0x00002000
-#define IOCR_SPD 0x00001000
-#define IOCR_BEM 0x00000800
-#define IOCR_PTD 0x00000400
-#define IOCR_ARE 0x00000080
-#define IOCR_DRC 0x00000020
-#define IOCR_RDM(x) (((x) & 0x3) << 3)
-#define IOCR_TCS 0x00000004
-#define IOCR_SCS 0x00000002
-#define IOCR_SPC 0x00000001
-
-#define DCRN_MALCR(base) (base + 0x0) /* MAL Configuration */
-#define DCRN_MALDBR(base) ((base) + 0x3) /* Debug Register */
-#define DCRN_MALESR(base) ((base) + 0x1) /* Error Status */
-#define DCRN_MALIER(base) ((base) + 0x2) /* Interrupt Enable */
-#define DCRN_MALTXCARR(base) ((base) + 0x5) /* TX Channed Active Reset Register */
-#define DCRN_MALTXCASR(base) ((base) + 0x4) /* TX Channel Active Set Register */
-#define DCRN_MALTXDEIR(base) ((base) + 0x7) /* Tx Descriptor Error Interrupt */
-#define DCRN_MALTXEOBISR(base) ((base) + 0x6) /* Tx End of Buffer Interrupt Status */
-#define DCRN_MALRXCARR(base) ((base) + 0x11) /* RX Channed Active Reset Register */
-#define DCRN_MALRXCASR(base) ((base) + 0x10) /* RX Channel Active Set Register */
-#define DCRN_MALRXDEIR(base) ((base) + 0x13) /* Rx Descriptor Error Interrupt */
-#define DCRN_MALRXEOBISR(base) ((base) + 0x12) /* Rx End of Buffer Interrupt Status */
-#define DCRN_MALRXCTP0R(base) ((base) + 0x40) /* Channel Rx 0 Channel Table Pointer */
-#define DCRN_MALRXCTP1R(base) ((base) + 0x41) /* Channel Rx 1 Channel Table Pointer */
-#define DCRN_MALTXCTP0R(base) ((base) + 0x20) /* Channel Tx 0 Channel Table Pointer */
-#define DCRN_MALTXCTP1R(base) ((base) + 0x21) /* Channel Tx 1 Channel Table Pointer */
-#define DCRN_MALTXCTP2R(base) ((base) + 0x22) /* Channel Tx 2 Channel Table Pointer */
-#define DCRN_MALTXCTP3R(base) ((base) + 0x23) /* Channel Tx 3 Channel Table Pointer */
-#define DCRN_MALRCBS0(base) ((base) + 0x60) /* Channel Rx 0 Channel Buffer Size */
-#define DCRN_MALRCBS1(base) ((base) + 0x61) /* Channel Rx 1 Channel Buffer Size */
-
- /* DCRN_MALCR */
-#define MALCR_MMSR 0x80000000 /* MAL Software reset */
-#define MALCR_PLBP_1 0x00400000 /* MAL reqest priority: */
-#define MALCR_PLBP_2 0x00800000 /* lowsest is 00 */
-#define MALCR_PLBP_3 0x00C00000 /* highest */
-#define MALCR_GA 0x00200000 /* Guarded Active Bit */
-#define MALCR_OA 0x00100000 /* Ordered Active Bit */
-#define MALCR_PLBLE 0x00080000 /* PLB Lock Error Bit */
-#define MALCR_PLBLT_1 0x00040000 /* PLB Latency Timer */
-#define MALCR_PLBLT_2 0x00020000
-#define MALCR_PLBLT_3 0x00010000
-#define MALCR_PLBLT_4 0x00008000
-#define MALCR_PLBLT_DEFAULT 0x00078000 /* JSP: Is this a valid default?? */
-#define MALCR_PLBB 0x00004000 /* PLB Burst Deactivation Bit */
-#define MALCR_OPBBL 0x00000080 /* OPB Lock Bit */
-#define MALCR_EOPIE 0x00000004 /* End Of Packet Interrupt Enable */
-#define MALCR_LEA 0x00000002 /* Locked Error Active */
-#define MALCR_MSD 0x00000001 /* MAL Scroll Descriptor Bit */
-/* DCRN_MALESR */
-#define MALESR_EVB 0x80000000 /* Error Valid Bit */
-#define MALESR_CIDRX 0x40000000 /* Channel ID Receive */
-#define MALESR_DE 0x00100000 /* Descriptor Error */
-#define MALESR_OEN 0x00080000 /* OPB Non-Fullword Error */
-#define MALESR_OTE 0x00040000 /* OPB Timeout Error */
-#define MALESR_OSE 0x00020000 /* OPB Slave Error */
-#define MALESR_PEIN 0x00010000 /* PLB Bus Error Indication */
-#define MALESR_DEI 0x00000010 /* Descriptor Error Interrupt */
-#define MALESR_ONEI 0x00000008 /* OPB Non-Fullword Error Interrupt */
-#define MALESR_OTEI 0x00000004 /* OPB Timeout Error Interrupt */
-#define MALESR_OSEI 0x00000002 /* OPB Slace Error Interrupt */
-#define MALESR_PBEI 0x00000001 /* PLB Bus Error Interrupt */
-/* DCRN_MALIER */
-#define MALIER_DE 0x00000010 /* Descriptor Error Interrupt Enable */
-#define MALIER_NE 0x00000008 /* OPB Non-word Transfer Int Enable */
-#define MALIER_TE 0x00000004 /* OPB Time Out Error Interrupt Enable */
-#define MALIER_OPBE 0x00000002 /* OPB Slave Error Interrupt Enable */
-#define MALIER_PLBE 0x00000001 /* PLB Error Interrupt Enable */
-/* DCRN_MALTXEOBISR */
-#define MALOBISR_CH0 0x80000000 /* EOB channel 1 bit */
-#define MALOBISR_CH2 0x40000000 /* EOB channel 2 bit */
-
-#ifdef DCRN_PLB0_BASE
-#define DCRN_PLB0_BESR (DCRN_PLB0_BASE + 0x0)
-#define DCRN_PLB0_BEAR (DCRN_PLB0_BASE + 0x2)
-/* doesn't exist on stb03xxx? */
-#define DCRN_PLB0_ACR (DCRN_PLB0_BASE + 0x3)
-#endif
-
-#ifdef DCRN_PLB1_BASE
-#define DCRN_PLB1_BESR (DCRN_PLB1_BASE + 0x0)
-#define DCRN_PLB1_BEAR (DCRN_PLB1_BASE + 0x1)
-/* doesn't exist on stb03xxx? */
-#define DCRN_PLB1_ACR (DCRN_PLB1_BASE + 0x2)
-#endif
-
-#ifdef DCRN_PLLMR_BASE
-#define DCRN_PLLMR (DCRN_PLLMR_BASE + 0x0) /* PL1 Mode */
-#endif
-
-#ifdef DCRN_POB0_BASE
-#define DCRN_POB0_BESR0 (DCRN_POB0_BASE + 0x0)
-#define DCRN_POB0_BEAR (DCRN_POB0_BASE + 0x2)
-#define DCRN_POB0_BESR1 (DCRN_POB0_BASE + 0x4)
-#endif
-
-#define DCRN_UIC_SR(base) (base + 0x0)
-#define DCRN_UIC_ER(base) (base + 0x2)
-#define DCRN_UIC_CR(base) (base + 0x3)
-#define DCRN_UIC_PR(base) (base + 0x4)
-#define DCRN_UIC_TR(base) (base + 0x5)
-#define DCRN_UIC_MSR(base) (base + 0x6)
-#define DCRN_UIC_VR(base) (base + 0x7)
-#define DCRN_UIC_VCR(base) (base + 0x8)
-
-#ifdef DCRN_SDRAM0_BASE
-#define DCRN_SDRAM0_CFGADDR (DCRN_SDRAM0_BASE + 0x0) /* Memory Controller Address */
-#define DCRN_SDRAM0_CFGDATA (DCRN_SDRAM0_BASE + 0x1) /* Memory Controller Data */
-#endif
-
-#ifdef DCRN_OCM0_BASE
-#define DCRN_OCMISARC (DCRN_OCM0_BASE + 0x0) /* OCM Instr Side Addr Range Compare */
-#define DCRN_OCMISCR (DCRN_OCM0_BASE + 0x1) /* OCM Instr Side Control */
-#define DCRN_OCMDSARC (DCRN_OCM0_BASE + 0x2) /* OCM Data Side Addr Range Compare */
-#define DCRN_OCMDSCR (DCRN_OCM0_BASE + 0x3) /* OCM Data Side Control */
-#endif
-
-#endif /* __ASM_IBM405_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h
deleted file mode 100644
index 7818b54..0000000
--- a/include/asm-ppc/ibm44x.h
+++ /dev/null
@@ -1,674 +0,0 @@
-/*
- * include/asm-ppc/ibm44x.h
- *
- * PPC44x definitions
- *
- * Matt Porter <mporter@kernel.crashing.org>
- *
- * Copyright 2002-2005 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBM44x_H__
-#define __ASM_IBM44x_H__
-
-
-#ifndef NR_BOARD_IRQS
-#define NR_BOARD_IRQS 0
-#endif
-
-#define _IO_BASE isa_io_base
-#define _ISA_MEM_BASE isa_mem_base
-#define PCI_DRAM_OFFSET pci_dram_offset
-
-/* TLB entry offset/size used for pinning kernel lowmem */
-#define PPC44x_PIN_SHIFT 28
-#define PPC_PIN_SIZE (1 << PPC44x_PIN_SHIFT)
-
-/* Lowest TLB slot consumed by the default pinned TLBs */
-#define PPC44x_LOW_SLOT 63
-
-/*
- * Least significant 32-bits and extended real page number (ERPN) of
- * UART0 physical address location for early serial text debug
- */
-#if defined(CONFIG_440SP)
-#define UART0_PHYS_ERPN 1
-#define UART0_PHYS_IO_BASE 0xf0000200
-#elif defined(CONFIG_440SPE)
-#define UART0_PHYS_ERPN 4
-#define UART0_PHYS_IO_BASE 0xf0000200
-#elif defined(CONFIG_440EP)
-#define UART0_PHYS_IO_BASE 0xe0000000
-#else
-#define UART0_PHYS_ERPN 1
-#define UART0_PHYS_IO_BASE 0x40000200
-#endif
-
-/*
- * XXX This 36-bit trap stuff will move somewhere in syslib/
- * when we rework/abstract the PPC44x PCI-X handling -mdp
- */
-
-/*
- * Standard 4GB "page" definitions
- */
-#if defined(CONFIG_440SP)
-#define PPC44x_IO_PAGE 0x0000000100000000ULL
-#define PPC44x_PCICFG_PAGE 0x0000000900000000ULL
-#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE
-#define PPC44x_PCIMEM_PAGE 0x0000000a00000000ULL
-#elif defined(CONFIG_440SPE)
-#define PPC44x_IO_PAGE 0x0000000400000000ULL
-#define PPC44x_PCICFG_PAGE 0x0000000c00000000ULL
-#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE
-#define PPC44x_PCIMEM_PAGE 0x0000000d00000000ULL
-#elif defined(CONFIG_440EP)
-#define PPC44x_IO_PAGE 0x0000000000000000ULL
-#define PPC44x_PCICFG_PAGE 0x0000000000000000ULL
-#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE
-#define PPC44x_PCIMEM_PAGE 0x0000000000000000ULL
-#else
-#define PPC44x_IO_PAGE 0x0000000100000000ULL
-#define PPC44x_PCICFG_PAGE 0x0000000200000000ULL
-#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE
-#define PPC44x_PCIMEM_PAGE 0x0000000300000000ULL
-#endif
-
-/*
- * 36-bit trap ranges
- */
-#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
-#define PPC44x_IO_LO 0xf0000000UL
-#define PPC44x_IO_HI 0xf0000fffUL
-#define PPC44x_PCI0CFG_LO 0x0ec00000UL
-#define PPC44x_PCI0CFG_HI 0x0ec00007UL
-#define PPC44x_PCI1CFG_LO 0x1ec00000UL
-#define PPC44x_PCI1CFG_HI 0x1ec00007UL
-#define PPC44x_PCI2CFG_LO 0x2ec00000UL
-#define PPC44x_PCI2CFG_HI 0x2ec00007UL
-#define PPC44x_PCIMEM_LO 0x80000000UL
-#define PPC44x_PCIMEM_HI 0xdfffffffUL
-#elif defined(CONFIG_440EP)
-#define PPC44x_IO_LO 0xef500000UL
-#define PPC44x_IO_HI 0xefffffffUL
-#define PPC44x_PCI0CFG_LO 0xeec00000UL
-#define PPC44x_PCI0CFG_HI 0xeecfffffUL
-#define PPC44x_PCIMEM_LO 0xa0000000UL
-#define PPC44x_PCIMEM_HI 0xdfffffffUL
-#else
-#define PPC44x_IO_LO 0x40000000UL
-#define PPC44x_IO_HI 0x40000fffUL
-#define PPC44x_PCI0CFG_LO 0x0ec00000UL
-#define PPC44x_PCI0CFG_HI 0x0ec00007UL
-#define PPC44x_PCIMEM_LO 0x80002000UL
-#define PPC44x_PCIMEM_HI 0xffffffffUL
-#endif
-
-/*
- * The "residual" board information structure the boot loader passes
- * into the kernel.
- */
-#ifndef __ASSEMBLY__
-
-/*
- * DCRN definitions
- */
-
-
-/* CPRs (440GX and 440SP/440SPe) */
-#define DCRN_CPR_CONFIG_ADDR 0xc
-#define DCRN_CPR_CONFIG_DATA 0xd
-
-#define DCRN_CPR_CLKUPD 0x0020
-#define DCRN_CPR_PLLC 0x0040
-#define DCRN_CPR_PLLD 0x0060
-#define DCRN_CPR_PRIMAD 0x0080
-#define DCRN_CPR_PRIMBD 0x00a0
-#define DCRN_CPR_OPBD 0x00c0
-#define DCRN_CPR_PERD 0x00e0
-#define DCRN_CPR_MALD 0x0100
-
-/* CPRs read/write helper macros */
-#define CPR_READ(offset) ({\
- mtdcr(DCRN_CPR_CONFIG_ADDR, offset); \
- mfdcr(DCRN_CPR_CONFIG_DATA);})
-#define CPR_WRITE(offset, data) ({\
- mtdcr(DCRN_CPR_CONFIG_ADDR, offset); \
- mtdcr(DCRN_CPR_CONFIG_DATA, data);})
-
-/* SDRs (440GX and 440SP/440SPe) */
-#define DCRN_SDR_CONFIG_ADDR 0xe
-#define DCRN_SDR_CONFIG_DATA 0xf
-#define DCRN_SDR_PFC0 0x4100
-#define DCRN_SDR_PFC1 0x4101
-#define DCRN_SDR_PFC1_EPS 0x1c00000
-#define DCRN_SDR_PFC1_EPS_SHIFT 22
-#define DCRN_SDR_PFC1_RMII 0x02000000
-#define DCRN_SDR_MFR 0x4300
-#define DCRN_SDR_MFR_TAH0 0x80000000 /* TAHOE0 Enable */
-#define DCRN_SDR_MFR_TAH1 0x40000000 /* TAHOE1 Enable */
-#define DCRN_SDR_MFR_PCM 0x10000000 /* PPC440GP irq compat mode */
-#define DCRN_SDR_MFR_ECS 0x08000000 /* EMAC int clk */
-#define DCRN_SDR_MFR_T0TXFL 0x00080000
-#define DCRN_SDR_MFR_T0TXFH 0x00040000
-#define DCRN_SDR_MFR_T1TXFL 0x00020000
-#define DCRN_SDR_MFR_T1TXFH 0x00010000
-#define DCRN_SDR_MFR_E0TXFL 0x00008000
-#define DCRN_SDR_MFR_E0TXFH 0x00004000
-#define DCRN_SDR_MFR_E0RXFL 0x00002000
-#define DCRN_SDR_MFR_E0RXFH 0x00001000
-#define DCRN_SDR_MFR_E1TXFL 0x00000800
-#define DCRN_SDR_MFR_E1TXFH 0x00000400
-#define DCRN_SDR_MFR_E1RXFL 0x00000200
-#define DCRN_SDR_MFR_E1RXFH 0x00000100
-#define DCRN_SDR_MFR_E2TXFL 0x00000080
-#define DCRN_SDR_MFR_E2TXFH 0x00000040
-#define DCRN_SDR_MFR_E2RXFL 0x00000020
-#define DCRN_SDR_MFR_E2RXFH 0x00000010
-#define DCRN_SDR_MFR_E3TXFL 0x00000008
-#define DCRN_SDR_MFR_E3TXFH 0x00000004
-#define DCRN_SDR_MFR_E3RXFL 0x00000002
-#define DCRN_SDR_MFR_E3RXFH 0x00000001
-#define DCRN_SDR_UART0 0x0120
-#define DCRN_SDR_UART1 0x0121
-
-#ifdef CONFIG_440EP
-#define DCRN_SDR_UART2 0x0122
-#define DCRN_SDR_UART3 0x0123
-#define DCRN_SDR_CUST0 0x4000
-#endif
-
-/* SDR read/write helper macros */
-#define SDR_READ(offset) ({\
- mtdcr(DCRN_SDR_CONFIG_ADDR, offset); \
- mfdcr(DCRN_SDR_CONFIG_DATA);})
-#define SDR_WRITE(offset, data) ({\
- mtdcr(DCRN_SDR_CONFIG_ADDR, offset); \
- mtdcr(DCRN_SDR_CONFIG_DATA,data);})
-
-/* DMA (excluding 440SP/440SPe) */
-#define DCRN_DMA0_BASE 0x100
-#define DCRN_DMA1_BASE 0x108
-#define DCRN_DMA2_BASE 0x110
-#define DCRN_DMA3_BASE 0x118
-#define DCRN_DMASR_BASE 0x120
-#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */
-#define DCRN_MAL_BASE 0x180
-
-#ifdef CONFIG_440EP
-#define DCRN_DMA2P40_BASE 0x300
-#define DCRN_DMA2P41_BASE 0x308
-#define DCRN_DMA2P42_BASE 0x310
-#define DCRN_DMA2P43_BASE 0x318
-#define DCRN_DMA2P4SR_BASE 0x320
-#endif
-
-/* UIC */
-#define DCRN_UIC0_BASE 0xc0
-#define DCRN_UIC1_BASE 0xd0
-#define UIC0 DCRN_UIC0_BASE
-#define UIC1 DCRN_UIC1_BASE
-
-#ifdef CONFIG_440SPE
-#define DCRN_UIC2_BASE 0xe0
-#define DCRN_UIC3_BASE 0xf0
-#define UIC2 DCRN_UIC2_BASE
-#define UIC3 DCRN_UIC3_BASE
-#else
-#define DCRN_UIC2_BASE 0x210
-#define DCRN_UICB_BASE 0x200
-#define UIC2 DCRN_UIC2_BASE
-#define UICB DCRN_UICB_BASE
-#endif
-
-#define DCRN_UIC_SR(base) (base + 0x0)
-#define DCRN_UIC_ER(base) (base + 0x2)
-#define DCRN_UIC_CR(base) (base + 0x3)
-#define DCRN_UIC_PR(base) (base + 0x4)
-#define DCRN_UIC_TR(base) (base + 0x5)
-#define DCRN_UIC_MSR(base) (base + 0x6)
-#define DCRN_UIC_VR(base) (base + 0x7)
-#define DCRN_UIC_VCR(base) (base + 0x8)
-
-#define UIC0_UIC1NC 0x00000002
-
-#ifdef CONFIG_440SPE
-#define UIC0_UIC1NC 0x00000002
-#define UIC0_UIC2NC 0x00200000
-#define UIC0_UIC3NC 0x00008000
-#endif
-
-#define UICB_UIC0NC 0x40000000
-#define UICB_UIC1NC 0x10000000
-#define UICB_UIC2NC 0x04000000
-
-/* 440 MAL DCRs */
-#define DCRN_MALCR(base) (base + 0x0) /* Configuration */
-#define DCRN_MALESR(base) (base + 0x1) /* Error Status */
-#define DCRN_MALIER(base) (base + 0x2) /* Interrupt Enable */
-#define DCRN_MALTXCASR(base) (base + 0x4) /* Tx Channel Active Set */
-#define DCRN_MALTXCARR(base) (base + 0x5) /* Tx Channel Active Reset */
-#define DCRN_MALTXEOBISR(base) (base + 0x6) /* Tx End of Buffer Interrupt Status */
-#define DCRN_MALTXDEIR(base) (base + 0x7) /* Tx Descriptor Error Interrupt */
-#define DCRN_MALRXCASR(base) (base + 0x10) /* Rx Channel Active Set */
-#define DCRN_MALRXCARR(base) (base + 0x11) /* Rx Channel Active Reset */
-#define DCRN_MALRXEOBISR(base) (base + 0x12) /* Rx End of Buffer Interrupt Status */
-#define DCRN_MALRXDEIR(base) (base + 0x13) /* Rx Descriptor Error Interrupt */
-#define DCRN_MALTXCTP0R(base) (base + 0x20) /* Channel Tx 0 Channel Table Pointer */
-#define DCRN_MALTXCTP1R(base) (base + 0x21) /* Channel Tx 1 Channel Table Pointer */
-#define DCRN_MALTXCTP2R(base) (base + 0x22) /* Channel Tx 2 Channel Table Pointer */
-#define DCRN_MALTXCTP3R(base) (base + 0x23) /* Channel Tx 3 Channel Table Pointer */
-#define DCRN_MALRXCTP0R(base) (base + 0x40) /* Channel Rx 0 Channel Table Pointer */
-#define DCRN_MALRXCTP1R(base) (base + 0x41) /* Channel Rx 1 Channel Table Pointer */
-#define DCRN_MALRCBS0(base) (base + 0x60) /* Channel Rx 0 Channel Buffer Size */
-#define DCRN_MALRCBS1(base) (base + 0x61) /* Channel Rx 1 Channel Buffer Size */
-
-/* Compatibility DCRN's */
-#define DCRN_MALRXCTP2R(base) ((base) + 0x42) /* Channel Rx 2 Channel Table Pointer */
-#define DCRN_MALRXCTP3R(base) ((base) + 0x43) /* Channel Rx 3 Channel Table Pointer */
-#define DCRN_MALTXCTP4R(base) ((base) + 0x24) /* Channel Tx 4 Channel Table Pointer */
-#define DCRN_MALTXCTP5R(base) ((base) + 0x25) /* Channel Tx 5 Channel Table Pointer */
-#define DCRN_MALTXCTP6R(base) ((base) + 0x26) /* Channel Tx 6 Channel Table Pointer */
-#define DCRN_MALTXCTP7R(base) ((base) + 0x27) /* Channel Tx 7 Channel Table Pointer */
-#define DCRN_MALRCBS2(base) ((base) + 0x62) /* Channel Rx 2 Channel Buffer Size */
-#define DCRN_MALRCBS3(base) ((base) + 0x63) /* Channel Rx 3 Channel Buffer Size */
-
-#define MALCR_MMSR 0x80000000 /* MAL Software reset */
-#define MALCR_PLBP_1 0x00400000 /* MAL reqest priority: */
-#define MALCR_PLBP_2 0x00800000 /* lowsest is 00 */
-#define MALCR_PLBP_3 0x00C00000 /* highest */
-#define MALCR_GA 0x00200000 /* Guarded Active Bit */
-#define MALCR_OA 0x00100000 /* Ordered Active Bit */
-#define MALCR_PLBLE 0x00080000 /* PLB Lock Error Bit */
-#define MALCR_PLBLT_1 0x00040000 /* PLB Latency Timer */
-#define MALCR_PLBLT_2 0x00020000
-#define MALCR_PLBLT_3 0x00010000
-#define MALCR_PLBLT_4 0x00008000
-#ifdef CONFIG_440GP
-#define MALCR_PLBLT_DEFAULT 0x00330000 /* PLB Latency Timer default */
-#else
-#define MALCR_PLBLT_DEFAULT 0x00ff0000 /* PLB Latency Timer default */
-#endif
-#define MALCR_PLBB 0x00004000 /* PLB Burst Deactivation Bit */
-#define MALCR_OPBBL 0x00000080 /* OPB Lock Bit */
-#define MALCR_EOPIE 0x00000004 /* End Of Packet Interrupt Enable */
-#define MALCR_LEA 0x00000002 /* Locked Error Active */
-#define MALCR_MSD 0x00000001 /* MAL Scroll Descriptor Bit */
-/* DCRN_MALESR */
-#define MALESR_EVB 0x80000000 /* Error Valid Bit */
-#define MALESR_CIDRX 0x40000000 /* Channel ID Receive */
-#define MALESR_DE 0x00100000 /* Descriptor Error */
-#define MALESR_OEN 0x00080000 /* OPB Non-Fullword Error */
-#define MALESR_OTE 0x00040000 /* OPB Timeout Error */
-#define MALESR_OSE 0x00020000 /* OPB Slave Error */
-#define MALESR_PEIN 0x00010000 /* PLB Bus Error Indication */
-#define MALESR_DEI 0x00000010 /* Descriptor Error Interrupt */
-#define MALESR_ONEI 0x00000008 /* OPB Non-Fullword Error Interrupt */
-#define MALESR_OTEI 0x00000004 /* OPB Timeout Error Interrupt */
-#define MALESR_OSEI 0x00000002 /* OPB Slace Error Interrupt */
-#define MALESR_PBEI 0x00000001 /* PLB Bus Error Interrupt */
-/* DCRN_MALIER */
-#define MALIER_DE 0x00000010 /* Descriptor Error Interrupt Enable */
-#define MALIER_NE 0x00000008 /* OPB Non-word Transfer Int Enable */
-#define MALIER_TE 0x00000004 /* OPB Time Out Error Interrupt Enable */
-#define MALIER_OPBE 0x00000002 /* OPB Slave Error Interrupt Enable */
-#define MALIER_PLBE 0x00000001 /* PLB Error Interrupt Enable */
-/* DCRN_MALTXEOBISR */
-#define MALOBISR_CH0 0x80000000 /* EOB channel 1 bit */
-#define MALOBISR_CH2 0x40000000 /* EOB channel 2 bit */
-
-#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
-/* 440SP/440SPe PLB Arbiter DCRs */
-#define DCRN_PLB_REVID 0x080 /* PLB Revision ID */
-#define DCRN_PLB_CCR 0x088 /* PLB Crossbar Control */
-
-#define DCRN_PLB0_ACR 0x081 /* PLB Arbiter Control */
-#define DCRN_PLB0_BESRL 0x082 /* PLB Error Status */
-#define DCRN_PLB0_BESRH 0x083 /* PLB Error Status */
-#define DCRN_PLB0_BEARL 0x084 /* PLB Error Address Low */
-#define DCRN_PLB0_BEARH 0x085 /* PLB Error Address High */
-
-#define DCRN_PLB1_ACR 0x089 /* PLB Arbiter Control */
-#define DCRN_PLB1_BESRL 0x08a /* PLB Error Status */
-#define DCRN_PLB1_BESRH 0x08b /* PLB Error Status */
-#define DCRN_PLB1_BEARL 0x08c /* PLB Error Address Low */
-#define DCRN_PLB1_BEARH 0x08d /* PLB Error Address High */
-#else
-/* 440GP/GX PLB Arbiter DCRs */
-#define DCRN_PLB0_REVID 0x082 /* PLB Arbiter Revision ID */
-#define DCRN_PLB0_ACR 0x083 /* PLB Arbiter Control */
-#define DCRN_PLB0_BESR 0x084 /* PLB Error Status */
-#define DCRN_PLB0_BEARL 0x086 /* PLB Error Address Low */
-#define DCRN_PLB0_BEAR DCRN_PLB0_BEARL /* 40x compatibility */
-#define DCRN_PLB0_BEARH 0x087 /* PLB Error Address High */
-#endif
-
-/* 440GP/GX PLB to OPB bridge DCRs */
-#define DCRN_POB0_BESR0 0x090
-#define DCRN_POB0_BESR1 0x094
-#define DCRN_POB0_BEARL 0x092
-#define DCRN_POB0_BEARH 0x093
-
-/* 440GP/GX OPB to PLB bridge DCRs */
-#define DCRN_OPB0_BSTAT 0x0a9
-#define DCRN_OPB0_BEARL 0x0aa
-#define DCRN_OPB0_BEARH 0x0ab
-
-/* 440GP Clock, PM, chip control */
-#define DCRN_CPC0_SR 0x0b0
-#define DCRN_CPC0_ER 0x0b1
-#define DCRN_CPC0_FR 0x0b2
-#define DCRN_CPC0_SYS0 0x0e0
-#define DCRN_CPC0_SYS1 0x0e1
-#define DCRN_CPC0_CUST0 0x0e2
-#define DCRN_CPC0_CUST1 0x0e3
-#define DCRN_CPC0_STRP0 0x0e4
-#define DCRN_CPC0_STRP1 0x0e5
-#define DCRN_CPC0_STRP2 0x0e6
-#define DCRN_CPC0_STRP3 0x0e7
-#define DCRN_CPC0_GPIO 0x0e8
-#define DCRN_CPC0_PLB 0x0e9
-#define DCRN_CPC0_CR1 0x0ea
-#define DCRN_CPC0_CR0 0x0eb
-#define DCRN_CPC0_MIRQ0 0x0ec
-#define DCRN_CPC0_MIRQ1 0x0ed
-#define DCRN_CPC0_JTAGID 0x0ef
-
-/* 440GP DMA controller DCRs */
-#define DCRN_DMACR0 (DCRN_DMA0_BASE + 0x0) /* DMA Channel Control 0 */
-#define DCRN_DMACT0 (DCRN_DMA0_BASE + 0x1) /* DMA Count 0 */
-#define DCRN_DMASAH0 (DCRN_DMA0_BASE + 0x2) /* DMA Src Addr High 0 */
-#define DCRN_DMASA0 (DCRN_DMA0_BASE + 0x3) /* DMA Src Addr Low 0 */
-#define DCRN_DMADAH0 (DCRN_DMA0_BASE + 0x4) /* DMA Dest Addr High 0 */
-#define DCRN_DMADA0 (DCRN_DMA0_BASE + 0x5) /* DMA Dest Addr Low 0 */
-#define DCRN_ASGH0 (DCRN_DMA0_BASE + 0x6) /* DMA SG Desc Addr High 0 */
-#define DCRN_ASG0 (DCRN_DMA0_BASE + 0x7) /* DMA SG Desc Addr Low 0 */
-
-#define DCRN_DMACR1 (DCRN_DMA1_BASE + 0x0) /* DMA Channel Control 1 */
-#define DCRN_DMACT1 (DCRN_DMA1_BASE + 0x1) /* DMA Count 1 */
-#define DCRN_DMASAH1 (DCRN_DMA1_BASE + 0x2) /* DMA Src Addr High 1 */
-#define DCRN_DMASA1 (DCRN_DMA1_BASE + 0x3) /* DMA Src Addr Low 1 */
-#define DCRN_DMADAH1 (DCRN_DMA1_BASE + 0x4) /* DMA Dest Addr High 1 */
-#define DCRN_DMADA1 (DCRN_DMA1_BASE + 0x5) /* DMA Dest Addr Low 1 */
-#define DCRN_ASGH1 (DCRN_DMA1_BASE + 0x6) /* DMA SG Desc Addr High 1 */
-#define DCRN_ASG1 (DCRN_DMA1_BASE + 0x7) /* DMA SG Desc Addr Low 1 */
-
-#define DCRN_DMACR2 (DCRN_DMA2_BASE + 0x0) /* DMA Channel Control 2 */
-#define DCRN_DMACT2 (DCRN_DMA2_BASE + 0x1) /* DMA Count 2 */
-#define DCRN_DMASAH2 (DCRN_DMA2_BASE + 0x2) /* DMA Src Addr High 2 */
-#define DCRN_DMASA2 (DCRN_DMA2_BASE + 0x3) /* DMA Src Addr Low 2 */
-#define DCRN_DMADAH2 (DCRN_DMA2_BASE + 0x4) /* DMA Dest Addr High 2 */
-#define DCRN_DMADA2 (DCRN_DMA2_BASE + 0x5) /* DMA Dest Addr Low 2 */
-#define DCRN_ASGH2 (DCRN_DMA2_BASE + 0x6) /* DMA SG Desc Addr High 2 */
-#define DCRN_ASG2 (DCRN_DMA2_BASE + 0x7) /* DMA SG Desc Addr Low 2 */
-
-#define DCRN_DMACR3 (DCRN_DMA3_BASE + 0x0) /* DMA Channel Control 3 */
-#define DCRN_DMACT3 (DCRN_DMA3_BASE + 0x1) /* DMA Count 3 */
-#define DCRN_DMASAH3 (DCRN_DMA3_BASE + 0x2) /* DMA Src Addr High 3 */
-#define DCRN_DMASA3 (DCRN_DMA3_BASE + 0x3) /* DMA Src Addr Low 3 */
-#define DCRN_DMADAH3 (DCRN_DMA3_BASE + 0x4) /* DMA Dest Addr High 3 */
-#define DCRN_DMADA3 (DCRN_DMA3_BASE + 0x5) /* DMA Dest Addr Low 3 */
-#define DCRN_ASGH3 (DCRN_DMA3_BASE + 0x6) /* DMA SG Desc Addr High 3 */
-#define DCRN_ASG3 (DCRN_DMA3_BASE + 0x7) /* DMA SG Desc Addr Low 3 */
-
-#define DCRN_DMASR (DCRN_DMASR_BASE + 0x0) /* DMA Status Register */
-#define DCRN_ASGC (DCRN_DMASR_BASE + 0x3) /* DMA Scatter/Gather Command */
-#define DCRN_SLP (DCRN_DMASR_BASE + 0x5) /* DMA Sleep Register */
-#define DCRN_POL (DCRN_DMASR_BASE + 0x6) /* DMA Polarity Register */
-
-/* 440GP/440GX SDRAM controller DCRs */
-#define DCRN_SDRAM0_CFGADDR 0x010
-#define DCRN_SDRAM0_CFGDATA 0x011
-
-#define SDRAM0_B0CR 0x40
-#define SDRAM0_B1CR 0x44
-#define SDRAM0_B2CR 0x48
-#define SDRAM0_B3CR 0x4c
-
-#define SDRAM_CONFIG_BANK_ENABLE 0x00000001
-#define SDRAM_CONFIG_SIZE_MASK 0x000e0000
-#define SDRAM_CONFIG_BANK_SIZE(reg) ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17)
-#define SDRAM_CONFIG_SIZE_8M 0x00000001
-#define SDRAM_CONFIG_SIZE_16M 0x00000002
-#define SDRAM_CONFIG_SIZE_32M 0x00000003
-#define SDRAM_CONFIG_SIZE_64M 0x00000004
-#define SDRAM_CONFIG_SIZE_128M 0x00000005
-#define SDRAM_CONFIG_SIZE_256M 0x00000006
-#define SDRAM_CONFIG_SIZE_512M 0x00000007
-#define PPC44x_MEM_SIZE_8M 0x00800000
-#define PPC44x_MEM_SIZE_16M 0x01000000
-#define PPC44x_MEM_SIZE_32M 0x02000000
-#define PPC44x_MEM_SIZE_64M 0x04000000
-#define PPC44x_MEM_SIZE_128M 0x08000000
-#define PPC44x_MEM_SIZE_256M 0x10000000
-#define PPC44x_MEM_SIZE_512M 0x20000000
-#define PPC44x_MEM_SIZE_1G 0x40000000
-#define PPC44x_MEM_SIZE_2G 0x80000000
-
-/* 440SP/440SPe memory controller DCRs */
-#define DCRN_MQ0_BS0BAS 0x40
-#if defined(CONFIG_440SP)
-#define MQ0_NUM_BANKS 2
-#elif defined(CONFIG_440SPE)
-#define MQ0_NUM_BANKS 4
-#endif
-
-#define MQ0_CONFIG_SIZE_MASK 0x0000fff0
-#define MQ0_CONFIG_SIZE_8M 0x0000ffc0
-#define MQ0_CONFIG_SIZE_16M 0x0000ff80
-#define MQ0_CONFIG_SIZE_32M 0x0000ff00
-#define MQ0_CONFIG_SIZE_64M 0x0000fe00
-#define MQ0_CONFIG_SIZE_128M 0x0000fc00
-#define MQ0_CONFIG_SIZE_256M 0x0000f800
-#define MQ0_CONFIG_SIZE_512M 0x0000f000
-#define MQ0_CONFIG_SIZE_1G 0x0000e000
-#define MQ0_CONFIG_SIZE_2G 0x0000c000
-#define MQ0_CONFIG_SIZE_4G 0x00008000
-
-/* Internal SRAM Controller 440GX/440SP/440SPe */
-#define DCRN_SRAM0_BASE 0x000
-
-#define DCRN_SRAM0_SB0CR (DCRN_SRAM0_BASE + 0x020)
-#define DCRN_SRAM0_SB1CR (DCRN_SRAM0_BASE + 0x021)
-#define DCRN_SRAM0_SB2CR (DCRN_SRAM0_BASE + 0x022)
-#define DCRN_SRAM0_SB3CR (DCRN_SRAM0_BASE + 0x023)
-#define SRAM_SBCR_BAS0 0x80000000
-#define SRAM_SBCR_BAS1 0x80010000
-#define SRAM_SBCR_BAS2 0x80020000
-#define SRAM_SBCR_BAS3 0x80030000
-#define SRAM_SBCR_BU_MASK 0x00000180
-#define SRAM_SBCR_BS_64KB 0x00000800
-#define SRAM_SBCR_BU_RO 0x00000080
-#define SRAM_SBCR_BU_RW 0x00000180
-#define DCRN_SRAM0_BEAR (DCRN_SRAM0_BASE + 0x024)
-#define DCRN_SRAM0_BESR0 (DCRN_SRAM0_BASE + 0x025)
-#define DCRN_SRAM0_BESR1 (DCRN_SRAM0_BASE + 0x026)
-#define DCRN_SRAM0_PMEG (DCRN_SRAM0_BASE + 0x027)
-#define DCRN_SRAM0_CID (DCRN_SRAM0_BASE + 0x028)
-#define DCRN_SRAM0_REVID (DCRN_SRAM0_BASE + 0x029)
-#define DCRN_SRAM0_DPC (DCRN_SRAM0_BASE + 0x02a)
-#define SRAM_DPC_ENABLE 0x80000000
-
-/* L2 Cache Controller 440GX/440SP/440SPe */
-#define DCRN_L2C0_CFG 0x030
-#define L2C_CFG_L2M 0x80000000
-#define L2C_CFG_ICU 0x40000000
-#define L2C_CFG_DCU 0x20000000
-#define L2C_CFG_DCW_MASK 0x1e000000
-#define L2C_CFG_TPC 0x01000000
-#define L2C_CFG_CPC 0x00800000
-#define L2C_CFG_FRAN 0x00200000
-#define L2C_CFG_SS_MASK 0x00180000
-#define L2C_CFG_SS_256 0x00000000
-#define L2C_CFG_CPIM 0x00040000
-#define L2C_CFG_TPIM 0x00020000
-#define L2C_CFG_LIM 0x00010000
-#define L2C_CFG_PMUX_MASK 0x00007000
-#define L2C_CFG_PMUX_SNP 0x00000000
-#define L2C_CFG_PMUX_IF 0x00001000
-#define L2C_CFG_PMUX_DF 0x00002000
-#define L2C_CFG_PMUX_DS 0x00003000
-#define L2C_CFG_PMIM 0x00000800
-#define L2C_CFG_TPEI 0x00000400
-#define L2C_CFG_CPEI 0x00000200
-#define L2C_CFG_NAM 0x00000100
-#define L2C_CFG_SMCM 0x00000080
-#define L2C_CFG_NBRM 0x00000040
-#define DCRN_L2C0_CMD 0x031
-#define L2C_CMD_CLR 0x80000000
-#define L2C_CMD_DIAG 0x40000000
-#define L2C_CMD_INV 0x20000000
-#define L2C_CMD_CCP 0x10000000
-#define L2C_CMD_CTE 0x08000000
-#define L2C_CMD_STRC 0x04000000
-#define L2C_CMD_STPC 0x02000000
-#define L2C_CMD_RPMC 0x01000000
-#define L2C_CMD_HCC 0x00800000
-#define DCRN_L2C0_ADDR 0x032
-#define DCRN_L2C0_DATA 0x033
-#define DCRN_L2C0_SR 0x034
-#define L2C_SR_CC 0x80000000
-#define L2C_SR_CPE 0x40000000
-#define L2C_SR_TPE 0x20000000
-#define L2C_SR_LRU 0x10000000
-#define L2C_SR_PCS 0x08000000
-#define DCRN_L2C0_REVID 0x035
-#define DCRN_L2C0_SNP0 0x036
-#define DCRN_L2C0_SNP1 0x037
-#define L2C_SNP_BA_MASK 0xffff0000
-#define L2C_SNP_SSR_MASK 0x0000f000
-#define L2C_SNP_SSR_32G 0x0000f000
-#define L2C_SNP_ESR 0x00000800
-
-/*
- * PCI-X definitions
- */
-#define PCIX0_CFGA 0x0ec00000UL
-#define PCIX1_CFGA 0x1ec00000UL
-#define PCIX2_CFGA 0x2ec00000UL
-#define PCIX0_CFGD 0x0ec00004UL
-#define PCIX1_CFGD 0x1ec00004UL
-#define PCIX2_CFGD 0x2ec00004UL
-
-#define PCIX0_IO_BASE 0x0000000908000000ULL
-#define PCIX1_IO_BASE 0x0000000908000000ULL
-#define PCIX2_IO_BASE 0x0000000908000000ULL
-#define PCIX_IO_SIZE 0x00010000
-
-#ifdef CONFIG_440SP
-#define PCIX0_REG_BASE 0x000000090ec80000ULL
-#else
-#define PCIX0_REG_BASE 0x000000020ec80000ULL
-#endif
-#define PCIX_REG_OFFSET 0x10000000
-#define PCIX_REG_SIZE 0x200
-
-#define PCIX0_VENDID 0x000
-#define PCIX0_DEVID 0x002
-#define PCIX0_COMMAND 0x004
-#define PCIX0_STATUS 0x006
-#define PCIX0_REVID 0x008
-#define PCIX0_CLS 0x009
-#define PCIX0_CACHELS 0x00c
-#define PCIX0_LATTIM 0x00d
-#define PCIX0_HDTYPE 0x00e
-#define PCIX0_BIST 0x00f
-#define PCIX0_BAR0L 0x010
-#define PCIX0_BAR0H 0x014
-#define PCIX0_BAR1 0x018
-#define PCIX0_BAR2L 0x01c
-#define PCIX0_BAR2H 0x020
-#define PCIX0_BAR3 0x024
-#define PCIX0_CISPTR 0x028
-#define PCIX0_SBSYSVID 0x02c
-#define PCIX0_SBSYSID 0x02e
-#define PCIX0_EROMBA 0x030
-#define PCIX0_CAP 0x034
-#define PCIX0_RES0 0x035
-#define PCIX0_RES1 0x036
-#define PCIX0_RES2 0x038
-#define PCIX0_INTLN 0x03c
-#define PCIX0_INTPN 0x03d
-#define PCIX0_MINGNT 0x03e
-#define PCIX0_MAXLTNCY 0x03f
-#define PCIX0_BRDGOPT1 0x040
-#define PCIX0_BRDGOPT2 0x044
-#define PCIX0_ERREN 0x050
-#define PCIX0_ERRSTS 0x054
-#define PCIX0_PLBBESR 0x058
-#define PCIX0_PLBBEARL 0x05c
-#define PCIX0_PLBBEARH 0x060
-#define PCIX0_POM0LAL 0x068
-#define PCIX0_POM0LAH 0x06c
-#define PCIX0_POM0SA 0x070
-#define PCIX0_POM0PCIAL 0x074
-#define PCIX0_POM0PCIAH 0x078
-#define PCIX0_POM1LAL 0x07c
-#define PCIX0_POM1LAH 0x080
-#define PCIX0_POM1SA 0x084
-#define PCIX0_POM1PCIAL 0x088
-#define PCIX0_POM1PCIAH 0x08c
-#define PCIX0_POM2SA 0x090
-#define PCIX0_PIM0SAL 0x098
-#define PCIX0_PIM0SA PCIX0_PIM0SAL
-#define PCIX0_PIM0LAL 0x09c
-#define PCIX0_PIM0LAH 0x0a0
-#define PCIX0_PIM1SA 0x0a4
-#define PCIX0_PIM1LAL 0x0a8
-#define PCIX0_PIM1LAH 0x0ac
-#define PCIX0_PIM2SAL 0x0b0
-#define PCIX0_PIM2SA PCIX0_PIM2SAL
-#define PCIX0_PIM2LAL 0x0b4
-#define PCIX0_PIM2LAH 0x0b8
-#define PCIX0_OMCAPID 0x0c0
-#define PCIX0_OMNIPTR 0x0c1
-#define PCIX0_OMMC 0x0c2
-#define PCIX0_OMMA 0x0c4
-#define PCIX0_OMMUA 0x0c8
-#define PCIX0_OMMDATA 0x0cc
-#define PCIX0_OMMEOI 0x0ce
-#define PCIX0_PMCAPID 0x0d0
-#define PCIX0_PMNIPTR 0x0d1
-#define PCIX0_PMC 0x0d2
-#define PCIX0_PMCSR 0x0d4
-#define PCIX0_PMCSRBSE 0x0d6
-#define PCIX0_PMDATA 0x0d7
-#define PCIX0_PMSCRR 0x0d8
-#define PCIX0_CAPID 0x0dc
-#define PCIX0_NIPTR 0x0dd
-#define PCIX0_CMD 0x0de
-#define PCIX0_STS 0x0e0
-#define PCIX0_IDR 0x0e4
-#define PCIX0_CID 0x0e8
-#define PCIX0_RID 0x0ec
-#define PCIX0_PIM0SAH 0x0f8
-#define PCIX0_PIM2SAH 0x0fc
-#define PCIX0_MSGIL 0x100
-#define PCIX0_MSGIH 0x104
-#define PCIX0_MSGOL 0x108
-#define PCIX0_MSGOH 0x10c
-#define PCIX0_IM 0x1f8
-
-#define IIC_OWN 0x55
-#define IIC_CLOCK 50
-
-#undef NR_UICS
-#if defined(CONFIG_440GX)
-#define NR_UICS 3
-#elif defined(CONFIG_440SPE)
-#define NR_UICS 4
-#else
-#define NR_UICS 2
-#endif
-
-#include <asm/ibm4xx.h>
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_IBM44x_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h
deleted file mode 100644
index ed6891a..0000000
--- a/include/asm-ppc/ibm4xx.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- *
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- *
- * Module name: ibm4xx.h
- *
- * Description:
- * A generic include file which pulls in appropriate include files
- * for specific board types based on configuration settings.
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBM4XX_H__
-#define __ASM_IBM4XX_H__
-
-#include <asm/types.h>
-#include <asm/dcr.h>
-
-#ifdef CONFIG_40x
-
-#if defined(CONFIG_BUBINGA)
-#include <platforms/4xx/bubinga.h>
-#endif
-
-#if defined(CONFIG_CPCI405)
-#include <platforms/4xx/cpci405.h>
-#endif
-
-#if defined(CONFIG_EP405)
-#include <platforms/4xx/ep405.h>
-#endif
-
-#if defined(CONFIG_REDWOOD_5)
-#include <platforms/4xx/redwood5.h>
-#endif
-
-#if defined(CONFIG_REDWOOD_6)
-#include <platforms/4xx/redwood6.h>
-#endif
-
-#if defined(CONFIG_SYCAMORE)
-#include <platforms/4xx/sycamore.h>
-#endif
-
-#if defined(CONFIG_WALNUT)
-#include <platforms/4xx/walnut.h>
-#endif
-
-#if defined(CONFIG_XILINX_VIRTEX)
-#include <platforms/4xx/virtex.h>
-#endif
-
-#ifndef __ASSEMBLY__
-
-#ifdef CONFIG_40x
-/*
- * The "residual" board information structure the boot loader passes
- * into the kernel.
- */
-extern bd_t __res;
-#endif
-
-void ppc4xx_setup_arch(void);
-void ppc4xx_map_io(void);
-void ppc4xx_init_IRQ(void);
-void ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7);
-#endif
-
-#ifndef PPC4xx_MACHINE_NAME
-#define PPC4xx_MACHINE_NAME "Unidentified 4xx class"
-#endif
-
-
-/* IO_BASE is for PCI I/O.
- * ISA not supported, just here to resolve copilation.
- */
-
-#ifndef _IO_BASE
-#define _IO_BASE 0xe8000000 /* The PCI address window */
-#define _ISA_MEM_BASE 0
-#define PCI_DRAM_OFFSET 0
-#endif
-
-#elif defined(CONFIG_44x)
-
-#if defined(CONFIG_BAMBOO)
-#include <platforms/4xx/bamboo.h>
-#endif
-
-#if defined(CONFIG_EBONY)
-#include <platforms/4xx/ebony.h>
-#endif
-
-#if defined(CONFIG_LUAN)
-#include <platforms/4xx/luan.h>
-#endif
-
-#if defined(CONFIG_YUCCA)
-#include <platforms/4xx/yucca.h>
-#endif
-
-#if defined(CONFIG_OCOTEA)
-#include <platforms/4xx/ocotea.h>
-#endif
-
-#if defined(CONFIG_TAISHAN)
-#include <platforms/4xx/taishan.h>
-#endif
-
-#ifndef __ASSEMBLY__
-#ifdef CONFIG_40x
-/*
- * The "residual" board information structure the boot loader passes
- * into the kernel.
- */
-extern bd_t __res;
-#endif
-#endif
-#endif /* CONFIG_40x */
-
-#endif /* __ASM_IBM4XX_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ibm_ocp.h b/include/asm-ppc/ibm_ocp.h
deleted file mode 100644
index ddce616..0000000
--- a/include/asm-ppc/ibm_ocp.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * ibm_ocp.h
- *
- * (c) Benjamin Herrenschmidt (benh@kernel.crashing.org)
- * Mipsys - France
- *
- * Derived from work (c) Armin Kuster akuster@pacbell.net
- *
- * Additional support and port to 2.6 LDM/sysfs by
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2003-2004 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-#ifdef __KERNEL__
-#ifndef __IBM_OCP_H__
-#define __IBM_OCP_H__
-
-#include <asm/types.h>
-
-/*
- * IBM 4xx OCP system information
- */
-struct ocp_sys_info_data {
- int opb_bus_freq; /* OPB Bus Frequency (Hz) */
- int ebc_bus_freq; /* EBC Bus Frequency (Hz) */
-};
-
-extern struct ocp_sys_info_data ocp_sys_info;
-
-/*
- * EMAC additional data and sysfs support
- *
- * Note about mdio_idx: When you have a zmii, it's usually
- * not necessary, it covers the case of the 405EP which has
- * the MDIO lines on EMAC0 only
- *
- * Note about phy_map: Per EMAC map of PHY ids which should
- * be probed by emac_probe. Different EMACs can have
- * overlapping maps.
- *
- * Note, this map uses inverse logic for bits:
- * 0 - id should be probed
- * 1 - id should be ignored
- *
- * Default value of 0x00000000 - will result in usual
- * auto-detection logic.
- *
- */
-
-struct ocp_func_emac_data {
- int rgmii_idx; /* RGMII device index or -1 */
- int rgmii_mux; /* RGMII input of this EMAC */
- int zmii_idx; /* ZMII device index or -1 */
- int zmii_mux; /* ZMII input of this EMAC */
- int mal_idx; /* MAL device index */
- int mal_rx_chan; /* MAL rx channel number */
- int mal_tx_chan; /* MAL tx channel number */
- int wol_irq; /* WOL interrupt */
- int mdio_idx; /* EMAC idx of MDIO master or -1 */
- int tah_idx; /* TAH device index or -1 */
- int phy_mode; /* PHY type or configurable mode */
- u8 mac_addr[6]; /* EMAC mac address */
- u32 phy_map; /* EMAC phy map */
- u32 phy_feat_exc; /* Excluded PHY features */
-};
-
-/* Sysfs support */
-#define OCP_SYSFS_EMAC_DATA() \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, rgmii_idx) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, rgmii_mux) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, zmii_idx) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, zmii_mux) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_idx) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_rx_chan) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mal_tx_chan) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, wol_irq) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, mdio_idx) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, tah_idx) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "%d\n", emac, phy_mode) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "0x%08x\n", emac, phy_map) \
-OCP_SYSFS_ADDTL(struct ocp_func_emac_data, "0x%08x\n", emac, phy_feat_exc)\
- \
-void ocp_show_emac_data(struct device *dev) \
-{ \
- device_create_file(dev, &dev_attr_emac_rgmii_idx); \
- device_create_file(dev, &dev_attr_emac_rgmii_mux); \
- device_create_file(dev, &dev_attr_emac_zmii_idx); \
- device_create_file(dev, &dev_attr_emac_zmii_mux); \
- device_create_file(dev, &dev_attr_emac_mal_idx); \
- device_create_file(dev, &dev_attr_emac_mal_rx_chan); \
- device_create_file(dev, &dev_attr_emac_mal_tx_chan); \
- device_create_file(dev, &dev_attr_emac_wol_irq); \
- device_create_file(dev, &dev_attr_emac_mdio_idx); \
- device_create_file(dev, &dev_attr_emac_tah_idx); \
- device_create_file(dev, &dev_attr_emac_phy_mode); \
- device_create_file(dev, &dev_attr_emac_phy_map); \
- device_create_file(dev, &dev_attr_emac_phy_feat_exc); \
-}
-
-/*
- * PHY mode settings (EMAC <-> ZMII/RGMII bridge <-> PHY)
- */
-#define PHY_MODE_NA 0
-#define PHY_MODE_MII 1
-#define PHY_MODE_RMII 2
-#define PHY_MODE_SMII 3
-#define PHY_MODE_RGMII 4
-#define PHY_MODE_TBI 5
-#define PHY_MODE_GMII 6
-#define PHY_MODE_RTBI 7
-#define PHY_MODE_SGMII 8
-
-#ifdef CONFIG_40x
-/*
- * Helper function to copy MAC addresses from the bd_t to OCP EMAC
- * additions.
- *
- * The range of EMAC indices (inclusive) to be copied are the arguments.
- */
-static inline void ibm_ocp_set_emac(int start, int end)
-{
- int i;
- struct ocp_def *def;
-
- /* Copy MAC addresses to EMAC additions */
- for (i=start; i<=end; i++) {
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i);
- if (i == 0)
- memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
- __res.bi_enetaddr, 6);
-#if defined(CONFIG_405EP) || defined(CONFIG_44x)
- else if (i == 1)
- memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
- __res.bi_enet1addr, 6);
-#endif
-#if defined(CONFIG_440GX)
- else if (i == 2)
- memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
- __res.bi_enet2addr, 6);
- else if (i == 3)
- memcpy(((struct ocp_func_emac_data *)def->additions)->mac_addr,
- __res.bi_enet3addr, 6);
-#endif
- }
-}
-#endif
-
-/*
- * MAL additional data and sysfs support
- */
-struct ocp_func_mal_data {
- int num_tx_chans; /* Number of TX channels */
- int num_rx_chans; /* Number of RX channels */
- int txeob_irq; /* TX End Of Buffer IRQ */
- int rxeob_irq; /* RX End Of Buffer IRQ */
- int txde_irq; /* TX Descriptor Error IRQ */
- int rxde_irq; /* RX Descriptor Error IRQ */
- int serr_irq; /* MAL System Error IRQ */
- int dcr_base; /* MALx_CFG DCR number */
-};
-
-#define OCP_SYSFS_MAL_DATA() \
-OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, num_tx_chans) \
-OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, num_rx_chans) \
-OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txeob_irq) \
-OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxeob_irq) \
-OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, txde_irq) \
-OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, rxde_irq) \
-OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, serr_irq) \
-OCP_SYSFS_ADDTL(struct ocp_func_mal_data, "%d\n", mal, dcr_base) \
- \
-void ocp_show_mal_data(struct device *dev) \
-{ \
- device_create_file(dev, &dev_attr_mal_num_tx_chans); \
- device_create_file(dev, &dev_attr_mal_num_rx_chans); \
- device_create_file(dev, &dev_attr_mal_txeob_irq); \
- device_create_file(dev, &dev_attr_mal_rxeob_irq); \
- device_create_file(dev, &dev_attr_mal_txde_irq); \
- device_create_file(dev, &dev_attr_mal_rxde_irq); \
- device_create_file(dev, &dev_attr_mal_serr_irq); \
- device_create_file(dev, &dev_attr_mal_dcr_base); \
-}
-
-/*
- * IIC additional data and sysfs support
- */
-struct ocp_func_iic_data {
- int fast_mode; /* IIC fast mode enabled */
-};
-
-#define OCP_SYSFS_IIC_DATA() \
-OCP_SYSFS_ADDTL(struct ocp_func_iic_data, "%d\n", iic, fast_mode) \
- \
-void ocp_show_iic_data(struct device *dev) \
-{ \
- device_create_file(dev, &dev_attr_iic_fast_mode); \
-}
-#endif /* __IBM_OCP_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ibm_ocp_pci.h b/include/asm-ppc/ibm_ocp_pci.h
deleted file mode 100644
index a81ab61..0000000
--- a/include/asm-ppc/ibm_ocp_pci.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * Author: Armin Kuster <akuster@mvista.com>
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_IBM_OCP_PCI_H__
-#define __ASM_IBM_OCP_PCI_H__
-
-/* PCI 32 */
-
-struct pmm_regs {
- u32 la;
- u32 ma;
- u32 pcila;
- u32 pciha;
-};
-
-typedef struct pcil0_regs {
- struct pmm_regs pmm[3];
- u32 ptm1ms;
- u32 ptm1la;
- u32 ptm2ms;
- u32 ptm2la;
-} pci0_t;
-
-#endif /* __ASM_IBM_OCP_PCI_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/immap_cpm2.h b/include/asm-ppc/immap_cpm2.h
deleted file mode 100644
index 3c23d9c..0000000
--- a/include/asm-ppc/immap_cpm2.h
+++ /dev/null
@@ -1,648 +0,0 @@
-/*
- * CPM2 Internal Memory Map
- * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
- *
- * The Internal Memory Map for devices with CPM2 on them. This
- * is the superset of all CPM2 devices (8260, 8266, 8280, 8272,
- * 8560).
- */
-#ifdef __KERNEL__
-#ifndef __IMMAP_CPM2__
-#define __IMMAP_CPM2__
-
-/* System configuration registers.
-*/
-typedef struct sys_82xx_conf {
- u32 sc_siumcr;
- u32 sc_sypcr;
- u8 res1[6];
- u16 sc_swsr;
- u8 res2[20];
- u32 sc_bcr;
- u8 sc_ppc_acr;
- u8 res3[3];
- u32 sc_ppc_alrh;
- u32 sc_ppc_alrl;
- u8 sc_lcl_acr;
- u8 res4[3];
- u32 sc_lcl_alrh;
- u32 sc_lcl_alrl;
- u32 sc_tescr1;
- u32 sc_tescr2;
- u32 sc_ltescr1;
- u32 sc_ltescr2;
- u32 sc_pdtea;
- u8 sc_pdtem;
- u8 res5[3];
- u32 sc_ldtea;
- u8 sc_ldtem;
- u8 res6[163];
-} sysconf_82xx_cpm2_t;
-
-typedef struct sys_85xx_conf {
- u32 sc_cear;
- u16 sc_ceer;
- u16 sc_cemr;
- u8 res1[70];
- u32 sc_smaer;
- u8 res2[4];
- u32 sc_smevr;
- u32 sc_smctr;
- u32 sc_lmaer;
- u8 res3[4];
- u32 sc_lmevr;
- u32 sc_lmctr;
- u8 res4[144];
-} sysconf_85xx_cpm2_t;
-
-typedef union sys_conf {
- sysconf_82xx_cpm2_t siu_82xx;
- sysconf_85xx_cpm2_t siu_85xx;
-} sysconf_cpm2_t;
-
-
-
-/* Memory controller registers.
-*/
-typedef struct mem_ctlr {
- u32 memc_br0;
- u32 memc_or0;
- u32 memc_br1;
- u32 memc_or1;
- u32 memc_br2;
- u32 memc_or2;
- u32 memc_br3;
- u32 memc_or3;
- u32 memc_br4;
- u32 memc_or4;
- u32 memc_br5;
- u32 memc_or5;
- u32 memc_br6;
- u32 memc_or6;
- u32 memc_br7;
- u32 memc_or7;
- u32 memc_br8;
- u32 memc_or8;
- u32 memc_br9;
- u32 memc_or9;
- u32 memc_br10;
- u32 memc_or10;
- u32 memc_br11;
- u32 memc_or11;
- u8 res1[8];
- u32 memc_mar;
- u8 res2[4];
- u32 memc_mamr;
- u32 memc_mbmr;
- u32 memc_mcmr;
- u8 res3[8];
- u16 memc_mptpr;
- u8 res4[2];
- u32 memc_mdr;
- u8 res5[4];
- u32 memc_psdmr;
- u32 memc_lsdmr;
- u8 memc_purt;
- u8 res6[3];
- u8 memc_psrt;
- u8 res7[3];
- u8 memc_lurt;
- u8 res8[3];
- u8 memc_lsrt;
- u8 res9[3];
- u32 memc_immr;
- u32 memc_pcibr0;
- u32 memc_pcibr1;
- u8 res10[16];
- u32 memc_pcimsk0;
- u32 memc_pcimsk1;
- u8 res11[52];
-} memctl_cpm2_t;
-
-/* System Integration Timers.
-*/
-typedef struct sys_int_timers {
- u8 res1[32];
- u16 sit_tmcntsc;
- u8 res2[2];
- u32 sit_tmcnt;
- u8 res3[4];
- u32 sit_tmcntal;
- u8 res4[16];
- u16 sit_piscr;
- u8 res5[2];
- u32 sit_pitc;
- u32 sit_pitr;
- u8 res6[94];
- u8 res7[390];
-} sit_cpm2_t;
-
-#define PISCR_PIRQ_MASK ((u16)0xff00)
-#define PISCR_PS ((u16)0x0080)
-#define PISCR_PIE ((u16)0x0004)
-#define PISCR_PTF ((u16)0x0002)
-#define PISCR_PTE ((u16)0x0001)
-
-/* PCI Controller.
-*/
-typedef struct pci_ctlr {
- u32 pci_omisr;
- u32 pci_omimr;
- u8 res1[8];
- u32 pci_ifqpr;
- u32 pci_ofqpr;
- u8 res2[8];
- u32 pci_imr0;
- u32 pci_imr1;
- u32 pci_omr0;
- u32 pci_omr1;
- u32 pci_odr;
- u8 res3[4];
- u32 pci_idr;
- u8 res4[20];
- u32 pci_imisr;
- u32 pci_imimr;
- u8 res5[24];
- u32 pci_ifhpr;
- u8 res6[4];
- u32 pci_iftpr;
- u8 res7[4];
- u32 pci_iphpr;
- u8 res8[4];
- u32 pci_iptpr;
- u8 res9[4];
- u32 pci_ofhpr;
- u8 res10[4];
- u32 pci_oftpr;
- u8 res11[4];
- u32 pci_ophpr;
- u8 res12[4];
- u32 pci_optpr;
- u8 res13[8];
- u32 pci_mucr;
- u8 res14[8];
- u32 pci_qbar;
- u8 res15[12];
- u32 pci_dmamr0;
- u32 pci_dmasr0;
- u32 pci_dmacdar0;
- u8 res16[4];
- u32 pci_dmasar0;
- u8 res17[4];
- u32 pci_dmadar0;
- u8 res18[4];
- u32 pci_dmabcr0;
- u32 pci_dmandar0;
- u8 res19[86];
- u32 pci_dmamr1;
- u32 pci_dmasr1;
- u32 pci_dmacdar1;
- u8 res20[4];
- u32 pci_dmasar1;
- u8 res21[4];
- u32 pci_dmadar1;
- u8 res22[4];
- u32 pci_dmabcr1;
- u32 pci_dmandar1;
- u8 res23[88];
- u32 pci_dmamr2;
- u32 pci_dmasr2;
- u32 pci_dmacdar2;
- u8 res24[4];
- u32 pci_dmasar2;
- u8 res25[4];
- u32 pci_dmadar2;
- u8 res26[4];
- u32 pci_dmabcr2;
- u32 pci_dmandar2;
- u8 res27[88];
- u32 pci_dmamr3;
- u32 pci_dmasr3;
- u32 pci_dmacdar3;
- u8 res28[4];
- u32 pci_dmasar3;
- u8 res29[4];
- u32 pci_dmadar3;
- u8 res30[4];
- u32 pci_dmabcr3;
- u32 pci_dmandar3;
- u8 res31[344];
- u32 pci_potar0;
- u8 res32[4];
- u32 pci_pobar0;
- u8 res33[4];
- u32 pci_pocmr0;
- u8 res34[4];
- u32 pci_potar1;
- u8 res35[4];
- u32 pci_pobar1;
- u8 res36[4];
- u32 pci_pocmr1;
- u8 res37[4];
- u32 pci_potar2;
- u8 res38[4];
- u32 pci_pobar2;
- u8 res39[4];
- u32 pci_pocmr2;
- u8 res40[50];
- u32 pci_ptcr;
- u32 pci_gpcr;
- u32 pci_gcr;
- u32 pci_esr;
- u32 pci_emr;
- u32 pci_ecr;
- u32 pci_eacr;
- u8 res41[4];
- u32 pci_edcr;
- u8 res42[4];
- u32 pci_eccr;
- u8 res43[44];
- u32 pci_pitar1;
- u8 res44[4];
- u32 pci_pibar1;
- u8 res45[4];
- u32 pci_picmr1;
- u8 res46[4];
- u32 pci_pitar0;
- u8 res47[4];
- u32 pci_pibar0;
- u8 res48[4];
- u32 pci_picmr0;
- u8 res49[4];
- u32 pci_cfg_addr;
- u32 pci_cfg_data;
- u32 pci_int_ack;
- u8 res50[756];
-} pci_cpm2_t;
-
-/* Interrupt Controller.
-*/
-typedef struct interrupt_controller {
- u16 ic_sicr;
- u8 res1[2];
- u32 ic_sivec;
- u32 ic_sipnrh;
- u32 ic_sipnrl;
- u32 ic_siprr;
- u32 ic_scprrh;
- u32 ic_scprrl;
- u32 ic_simrh;
- u32 ic_simrl;
- u32 ic_siexr;
- u8 res2[88];
-} intctl_cpm2_t;
-
-/* Clocks and Reset.
-*/
-typedef struct clk_and_reset {
- u32 car_sccr;
- u8 res1[4];
- u32 car_scmr;
- u8 res2[4];
- u32 car_rsr;
- u32 car_rmr;
- u8 res[104];
-} car_cpm2_t;
-
-/* Input/Output Port control/status registers.
- * Names consistent with processor manual, although they are different
- * from the original 8xx names.......
- */
-typedef struct io_port {
- u32 iop_pdira;
- u32 iop_ppara;
- u32 iop_psora;
- u32 iop_podra;
- u32 iop_pdata;
- u8 res1[12];
- u32 iop_pdirb;
- u32 iop_pparb;
- u32 iop_psorb;
- u32 iop_podrb;
- u32 iop_pdatb;
- u8 res2[12];
- u32 iop_pdirc;
- u32 iop_pparc;
- u32 iop_psorc;
- u32 iop_podrc;
- u32 iop_pdatc;
- u8 res3[12];
- u32 iop_pdird;
- u32 iop_ppard;
- u32 iop_psord;
- u32 iop_podrd;
- u32 iop_pdatd;
- u8 res4[12];
-} iop_cpm2_t;
-
-/* Communication Processor Module Timers
-*/
-typedef struct cpm_timers {
- u8 cpmt_tgcr1;
- u8 res1[3];
- u8 cpmt_tgcr2;
- u8 res2[11];
- u16 cpmt_tmr1;
- u16 cpmt_tmr2;
- u16 cpmt_trr1;
- u16 cpmt_trr2;
- u16 cpmt_tcr1;
- u16 cpmt_tcr2;
- u16 cpmt_tcn1;
- u16 cpmt_tcn2;
- u16 cpmt_tmr3;
- u16 cpmt_tmr4;
- u16 cpmt_trr3;
- u16 cpmt_trr4;
- u16 cpmt_tcr3;
- u16 cpmt_tcr4;
- u16 cpmt_tcn3;
- u16 cpmt_tcn4;
- u16 cpmt_ter1;
- u16 cpmt_ter2;
- u16 cpmt_ter3;
- u16 cpmt_ter4;
- u8 res3[584];
-} cpmtimer_cpm2_t;
-
-/* DMA control/status registers.
-*/
-typedef struct sdma_csr {
- u8 res0[24];
- u8 sdma_sdsr;
- u8 res1[3];
- u8 sdma_sdmr;
- u8 res2[3];
- u8 sdma_idsr1;
- u8 res3[3];
- u8 sdma_idmr1;
- u8 res4[3];
- u8 sdma_idsr2;
- u8 res5[3];
- u8 sdma_idmr2;
- u8 res6[3];
- u8 sdma_idsr3;
- u8 res7[3];
- u8 sdma_idmr3;
- u8 res8[3];
- u8 sdma_idsr4;
- u8 res9[3];
- u8 sdma_idmr4;
- u8 res10[707];
-} sdma_cpm2_t;
-
-/* Fast controllers
-*/
-typedef struct fcc {
- u32 fcc_gfmr;
- u32 fcc_fpsmr;
- u16 fcc_ftodr;
- u8 res1[2];
- u16 fcc_fdsr;
- u8 res2[2];
- u16 fcc_fcce;
- u8 res3[2];
- u16 fcc_fccm;
- u8 res4[2];
- u8 fcc_fccs;
- u8 res5[3];
- u8 fcc_ftirr_phy[4];
-} fcc_t;
-
-/* Fast controllers continued
- */
-typedef struct fcc_c {
- u32 fcc_firper;
- u32 fcc_firer;
- u32 fcc_firsr_hi;
- u32 fcc_firsr_lo;
- u8 fcc_gfemr;
- u8 res1[15];
-} fcc_c_t;
-
-/* TC Layer
- */
-typedef struct tclayer {
- u16 tc_tcmode;
- u16 tc_cdsmr;
- u16 tc_tcer;
- u16 tc_rcc;
- u16 tc_tcmr;
- u16 tc_fcc;
- u16 tc_ccc;
- u16 tc_icc;
- u16 tc_tcc;
- u16 tc_ecc;
- u8 res1[12];
-} tclayer_t;
-
-
-/* I2C
-*/
-typedef struct i2c {
- u8 i2c_i2mod;
- u8 res1[3];
- u8 i2c_i2add;
- u8 res2[3];
- u8 i2c_i2brg;
- u8 res3[3];
- u8 i2c_i2com;
- u8 res4[3];
- u8 i2c_i2cer;
- u8 res5[3];
- u8 i2c_i2cmr;
- u8 res6[331];
-} i2c_cpm2_t;
-
-typedef struct scc { /* Serial communication channels */
- u32 scc_gsmrl;
- u32 scc_gsmrh;
- u16 scc_psmr;
- u8 res1[2];
- u16 scc_todr;
- u16 scc_dsr;
- u16 scc_scce;
- u8 res2[2];
- u16 scc_sccm;
- u8 res3;
- u8 scc_sccs;
- u8 res4[8];
-} scc_t;
-
-typedef struct smc { /* Serial management channels */
- u8 res1[2];
- u16 smc_smcmr;
- u8 res2[2];
- u8 smc_smce;
- u8 res3[3];
- u8 smc_smcm;
- u8 res4[5];
-} smc_t;
-
-/* Serial Peripheral Interface.
-*/
-typedef struct spi_ctrl {
- u16 spi_spmode;
- u8 res1[4];
- u8 spi_spie;
- u8 res2[3];
- u8 spi_spim;
- u8 res3[2];
- u8 spi_spcom;
- u8 res4[82];
-} spictl_cpm2_t;
-
-/* CPM Mux.
-*/
-typedef struct cpmux {
- u8 cmx_si1cr;
- u8 res1;
- u8 cmx_si2cr;
- u8 res2;
- u32 cmx_fcr;
- u32 cmx_scr;
- u8 cmx_smr;
- u8 res3;
- u16 cmx_uar;
- u8 res4[16];
-} cpmux_t;
-
-/* SIRAM control
-*/
-typedef struct siram {
- u16 si_amr;
- u16 si_bmr;
- u16 si_cmr;
- u16 si_dmr;
- u8 si_gmr;
- u8 res1;
- u8 si_cmdr;
- u8 res2;
- u8 si_str;
- u8 res3;
- u16 si_rsr;
-} siramctl_t;
-
-typedef struct mcc {
- u16 mcc_mcce;
- u8 res1[2];
- u16 mcc_mccm;
- u8 res2[2];
- u8 mcc_mccf;
- u8 res3[7];
-} mcc_t;
-
-typedef struct comm_proc {
- u32 cp_cpcr;
- u32 cp_rccr;
- u8 res1[14];
- u16 cp_rter;
- u8 res2[2];
- u16 cp_rtmr;
- u16 cp_rtscr;
- u8 res3[2];
- u32 cp_rtsr;
- u8 res4[12];
-} cpm_cpm2_t;
-
-/* USB Controller.
-*/
-typedef struct usb_ctlr {
- u8 usb_usmod;
- u8 usb_usadr;
- u8 usb_uscom;
- u8 res1[1];
- u16 usb_usep1;
- u16 usb_usep2;
- u16 usb_usep3;
- u16 usb_usep4;
- u8 res2[4];
- u16 usb_usber;
- u8 res3[2];
- u16 usb_usbmr;
- u8 usb_usbs;
- u8 res4[7];
-} usb_cpm2_t;
-
-/* ...and the whole thing wrapped up....
-*/
-
-typedef struct immap {
- /* Some references are into the unique and known dpram spaces,
- * others are from the generic base.
- */
-#define im_dprambase im_dpram1
- u8 im_dpram1[16*1024];
- u8 res1[16*1024];
- u8 im_dpram2[4*1024];
- u8 res2[8*1024];
- u8 im_dpram3[4*1024];
- u8 res3[16*1024];
-
- sysconf_cpm2_t im_siu_conf; /* SIU Configuration */
- memctl_cpm2_t im_memctl; /* Memory Controller */
- sit_cpm2_t im_sit; /* System Integration Timers */
- pci_cpm2_t im_pci; /* PCI Controller */
- intctl_cpm2_t im_intctl; /* Interrupt Controller */
- car_cpm2_t im_clkrst; /* Clocks and reset */
- iop_cpm2_t im_ioport; /* IO Port control/status */
- cpmtimer_cpm2_t im_cpmtimer; /* CPM timers */
- sdma_cpm2_t im_sdma; /* SDMA control/status */
-
- fcc_t im_fcc[3]; /* Three FCCs */
- u8 res4z[32];
- fcc_c_t im_fcc_c[3]; /* Continued FCCs */
-
- u8 res4[32];
-
- tclayer_t im_tclayer[8]; /* Eight TCLayers */
- u16 tc_tcgsr;
- u16 tc_tcger;
-
- /* First set of baud rate generators.
- */
- u8 res[236];
- u32 im_brgc5;
- u32 im_brgc6;
- u32 im_brgc7;
- u32 im_brgc8;
-
- u8 res5[608];
-
- i2c_cpm2_t im_i2c; /* I2C control/status */
- cpm_cpm2_t im_cpm; /* Communication processor */
-
- /* Second set of baud rate generators.
- */
- u32 im_brgc1;
- u32 im_brgc2;
- u32 im_brgc3;
- u32 im_brgc4;
-
- scc_t im_scc[4]; /* Four SCCs */
- smc_t im_smc[2]; /* Couple of SMCs */
- spictl_cpm2_t im_spi; /* A SPI */
- cpmux_t im_cpmux; /* CPM clock route mux */
- siramctl_t im_siramctl1; /* First SI RAM Control */
- mcc_t im_mcc1; /* First MCC */
- siramctl_t im_siramctl2; /* Second SI RAM Control */
- mcc_t im_mcc2; /* Second MCC */
- usb_cpm2_t im_usb; /* USB Controller */
-
- u8 res6[1153];
-
- u16 im_si1txram[256];
- u8 res7[512];
- u16 im_si1rxram[256];
- u8 res8[512];
- u16 im_si2txram[256];
- u8 res9[512];
- u16 im_si2rxram[256];
- u8 res10[512];
- u8 res11[4096];
-} cpm2_map_t;
-
-extern cpm2_map_t *cpm2_immr;
-
-#endif /* __IMMAP_CPM2__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
deleted file mode 100644
index a0d409a..0000000
--- a/include/asm-ppc/io.h
+++ /dev/null
@@ -1,502 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_IO_H
-#define _PPC_IO_H
-
-#include <linux/string.h>
-#include <linux/types.h>
-
-#include <asm/page.h>
-#include <asm/byteorder.h>
-#include <asm/synch.h>
-#include <asm/mmu.h>
-
-#define SIO_CONFIG_RA 0x398
-#define SIO_CONFIG_RD 0x399
-
-#define SLOW_DOWN_IO
-
-#define PMAC_ISA_MEM_BASE 0
-#define PMAC_PCI_DRAM_OFFSET 0
-#define CHRP_ISA_IO_BASE 0xf8000000
-#define CHRP_ISA_MEM_BASE 0xf7000000
-#define CHRP_PCI_DRAM_OFFSET 0
-#define PREP_ISA_IO_BASE 0x80000000
-#define PREP_ISA_MEM_BASE 0xc0000000
-#define PREP_PCI_DRAM_OFFSET 0x80000000
-
-#if defined(CONFIG_4xx)
-#include <asm/ibm4xx.h>
-#elif defined(CONFIG_8xx)
-#include <asm/mpc8xx.h>
-#elif defined(CONFIG_8260)
-#include <asm/mpc8260.h>
-#elif !defined(CONFIG_PCI)
-#define _IO_BASE 0
-#define _ISA_MEM_BASE 0
-#define PCI_DRAM_OFFSET 0
-#else /* Everyone else */
-#define _IO_BASE isa_io_base
-#define _ISA_MEM_BASE isa_mem_base
-#define PCI_DRAM_OFFSET pci_dram_offset
-#endif /* Platform-dependent I/O */
-
-#define ___IO_BASE ((void __iomem *)_IO_BASE)
-extern unsigned long isa_io_base;
-extern unsigned long isa_mem_base;
-extern unsigned long pci_dram_offset;
-
-/*
- * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
- *
- * Read operations have additional twi & isync to make sure the read
- * is actually performed (i.e. the data has come back) before we start
- * executing any following instructions.
- */
-extern inline int in_8(const volatile unsigned char __iomem *addr)
-{
- int ret;
-
- __asm__ __volatile__(
- "sync; lbz%U1%X1 %0,%1;\n"
- "twi 0,%0,0;\n"
- "isync" : "=r" (ret) : "m" (*addr));
- return ret;
-}
-
-extern inline void out_8(volatile unsigned char __iomem *addr, int val)
-{
- __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
-}
-
-extern inline int in_le16(const volatile unsigned short __iomem *addr)
-{
- int ret;
-
- __asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
- "twi 0,%0,0;\n"
- "isync" : "=r" (ret) :
- "r" (addr), "m" (*addr));
- return ret;
-}
-
-extern inline int in_be16(const volatile unsigned short __iomem *addr)
-{
- int ret;
-
- __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
- "twi 0,%0,0;\n"
- "isync" : "=r" (ret) : "m" (*addr));
- return ret;
-}
-
-extern inline void out_le16(volatile unsigned short __iomem *addr, int val)
-{
- __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
- "r" (val), "r" (addr));
-}
-
-extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
-{
- __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
-}
-
-extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
-{
- unsigned ret;
-
- __asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
- "twi 0,%0,0;\n"
- "isync" : "=r" (ret) :
- "r" (addr), "m" (*addr));
- return ret;
-}
-
-extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
-{
- unsigned ret;
-
- __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
- "twi 0,%0,0;\n"
- "isync" : "=r" (ret) : "m" (*addr));
- return ret;
-}
-
-extern inline void out_le32(volatile unsigned __iomem *addr, int val)
-{
- __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
- "r" (val), "r" (addr));
-}
-
-extern inline void out_be32(volatile unsigned __iomem *addr, int val)
-{
- __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
-}
-#if defined (CONFIG_8260_PCI9)
-#define readb(addr) in_8((volatile u8 *)(addr))
-#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
-#else
-static inline __u8 readb(const volatile void __iomem *addr)
-{
- return in_8(addr);
-}
-static inline void writeb(__u8 b, volatile void __iomem *addr)
-{
- out_8(addr, b);
-}
-#endif
-
-#if defined (CONFIG_8260_PCI9)
-/* Use macros if PCI9 workaround enabled */
-#define readw(addr) in_le16((volatile u16 *)(addr))
-#define readl(addr) in_le32((volatile u32 *)(addr))
-#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
-#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
-#else
-static inline __u16 readw(const volatile void __iomem *addr)
-{
- return in_le16(addr);
-}
-static inline __u32 readl(const volatile void __iomem *addr)
-{
- return in_le32(addr);
-}
-static inline void writew(__u16 b, volatile void __iomem *addr)
-{
- out_le16(addr, b);
-}
-static inline void writel(__u32 b, volatile void __iomem *addr)
-{
- out_le32(addr, b);
-}
-#endif /* CONFIG_8260_PCI9 */
-
-#define readb_relaxed(addr) readb(addr)
-#define readw_relaxed(addr) readw(addr)
-#define readl_relaxed(addr) readl(addr)
-
-static inline __u8 __raw_readb(const volatile void __iomem *addr)
-{
- return *(__force volatile __u8 *)(addr);
-}
-static inline __u16 __raw_readw(const volatile void __iomem *addr)
-{
- return *(__force volatile __u16 *)(addr);
-}
-static inline __u32 __raw_readl(const volatile void __iomem *addr)
-{
- return *(__force volatile __u32 *)(addr);
-}
-static inline void __raw_writeb(__u8 b, volatile void __iomem *addr)
-{
- *(__force volatile __u8 *)(addr) = b;
-}
-static inline void __raw_writew(__u16 b, volatile void __iomem *addr)
-{
- *(__force volatile __u16 *)(addr) = b;
-}
-static inline void __raw_writel(__u32 b, volatile void __iomem *addr)
-{
- *(__force volatile __u32 *)(addr) = b;
-}
-
-#define mmiowb()
-
-/*
- * The insw/outsw/insl/outsl macros don't do byte-swapping.
- * They are only used in practice for transferring buffers which
- * are arrays of bytes, and byte-swapping is not appropriate in
- * that case. - paulus
- */
-#define insb(port, buf, ns) _insb((port)+___IO_BASE, (buf), (ns))
-#define outsb(port, buf, ns) _outsb((port)+___IO_BASE, (buf), (ns))
-#define insw(port, buf, ns) _insw_ns((port)+___IO_BASE, (buf), (ns))
-#define outsw(port, buf, ns) _outsw_ns((port)+___IO_BASE, (buf), (ns))
-#define insl(port, buf, nl) _insl_ns((port)+___IO_BASE, (buf), (nl))
-#define outsl(port, buf, nl) _outsl_ns((port)+___IO_BASE, (buf), (nl))
-
-#define readsb(a, b, n) _insb((a), (b), (n))
-#define readsw(a, b, n) _insw_ns((a), (b), (n))
-#define readsl(a, b, n) _insl_ns((a), (b), (n))
-#define writesb(a, b, n) _outsb((a),(b),(n))
-#define writesw(a, b, n) _outsw_ns((a),(b),(n))
-#define writesl(a, b, n) _outsl_ns((a),(b),(n))
-
-
-/*
- * On powermacs and 8xx we will get a machine check exception
- * if we try to read data from a non-existent I/O port. Because
- * the machine check is an asynchronous exception, it isn't
- * well-defined which instruction SRR0 will point to when the
- * exception occurs.
- * With the sequence below (twi; isync; nop), we have found that
- * the machine check occurs on one of the three instructions on
- * all PPC implementations tested so far. The twi and isync are
- * needed on the 601 (in fact twi; sync works too), the isync and
- * nop are needed on 604[e|r], and any of twi, sync or isync will
- * work on 603[e], 750, 74xx.
- * The twi creates an explicit data dependency on the returned
- * value which seems to be needed to make the 601 wait for the
- * load to finish.
- */
-
-#define __do_in_asm(name, op) \
-extern __inline__ unsigned int name(unsigned int port) \
-{ \
- unsigned int x; \
- __asm__ __volatile__( \
- "sync\n" \
- "0:" op " %0,0,%1\n" \
- "1: twi 0,%0,0\n" \
- "2: isync\n" \
- "3: nop\n" \
- "4:\n" \
- ".section .fixup,\"ax\"\n" \
- "5: li %0,-1\n" \
- " b 4b\n" \
- ".previous\n" \
- ".section __ex_table,\"a\"\n" \
- " .align 2\n" \
- " .long 0b,5b\n" \
- " .long 1b,5b\n" \
- " .long 2b,5b\n" \
- " .long 3b,5b\n" \
- ".previous" \
- : "=&r" (x) \
- : "r" (port + ___IO_BASE)); \
- return x; \
-}
-
-#define __do_out_asm(name, op) \
-extern __inline__ void name(unsigned int val, unsigned int port) \
-{ \
- __asm__ __volatile__( \
- "sync\n" \
- "0:" op " %0,0,%1\n" \
- "1: sync\n" \
- "2:\n" \
- ".section __ex_table,\"a\"\n" \
- " .align 2\n" \
- " .long 0b,2b\n" \
- " .long 1b,2b\n" \
- ".previous" \
- : : "r" (val), "r" (port + ___IO_BASE)); \
-}
-
-__do_out_asm(outb, "stbx")
-#if defined (CONFIG_8260_PCI9)
-/* in asm cannot be defined if PCI9 workaround is used */
-#define inb(port) in_8((port)+___IO_BASE)
-#define inw(port) in_le16((port)+___IO_BASE)
-#define inl(port) in_le32((port)+___IO_BASE)
-__do_out_asm(outw, "sthbrx")
-__do_out_asm(outl, "stwbrx")
-#else
-__do_in_asm(inb, "lbzx")
-__do_in_asm(inw, "lhbrx")
-__do_in_asm(inl, "lwbrx")
-__do_out_asm(outw, "sthbrx")
-__do_out_asm(outl, "stwbrx")
-
-#endif
-
-#define inb_p(port) inb((port))
-#define outb_p(val, port) outb((val), (port))
-#define inw_p(port) inw((port))
-#define outw_p(val, port) outw((val), (port))
-#define inl_p(port) inl((port))
-#define outl_p(val, port) outl((val), (port))
-
-extern void _insb(const volatile u8 __iomem *addr, void *buf, long count);
-extern void _outsb(volatile u8 __iomem *addr,const void *buf,long count);
-extern void _insw_ns(const volatile u16 __iomem *addr, void *buf, long count);
-extern void _outsw_ns(volatile u16 __iomem *addr, const void *buf, long count);
-extern void _insl_ns(const volatile u32 __iomem *addr, void *buf, long count);
-extern void _outsl_ns(volatile u32 __iomem *addr, const void *buf, long count);
-
-
-#define IO_SPACE_LIMIT ~0
-
-#if defined (CONFIG_8260_PCI9)
-#define memset_io(a,b,c) memset((void *)(a),(b),(c))
-#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
-#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
-#else
-static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
-{
- memset((void __force *)addr, val, count);
-}
-static inline void memcpy_fromio(void *dst,const volatile void __iomem *src, int count)
-{
- memcpy(dst, (void __force *) src, count);
-}
-static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
-{
- memcpy((void __force *) dst, src, count);
-}
-#endif
-
-/*
- * Map in an area of physical address space, for accessing
- * I/O devices etc.
- */
-extern void __iomem *__ioremap(phys_addr_t address, unsigned long size,
- unsigned long flags);
-extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
-#ifdef CONFIG_44x
-extern void __iomem *ioremap64(unsigned long long address, unsigned long size);
-#endif
-#define ioremap_nocache(addr, size) ioremap((addr), (size))
-extern void iounmap(volatile void __iomem *addr);
-extern unsigned long iopa(unsigned long addr);
-extern void io_block_mapping(unsigned long virt, phys_addr_t phys,
- unsigned int size, int flags);
-
-/*
- * The PCI bus is inherently Little-Endian. The PowerPC is being
- * run Big-Endian. Thus all values which cross the [PCI] barrier
- * must be endian-adjusted. Also, the local DRAM has a different
- * address from the PCI point of view, thus buffer addresses also
- * have to be modified [mapped] appropriately.
- */
-extern inline unsigned long virt_to_bus(volatile void * address)
-{
- if (address == (void *)0)
- return 0;
- return (unsigned long)address - KERNELBASE + PCI_DRAM_OFFSET;
-}
-
-extern inline void * bus_to_virt(unsigned long address)
-{
- if (address == 0)
- return NULL;
- return (void *)(address - PCI_DRAM_OFFSET + KERNELBASE);
-}
-
-/*
- * Change virtual addresses to physical addresses and vv, for
- * addresses in the area where the kernel has the RAM mapped.
- */
-extern inline unsigned long virt_to_phys(volatile void * address)
-{
- return (unsigned long) address - KERNELBASE;
-}
-
-extern inline void * phys_to_virt(unsigned long address)
-{
- return (void *) (address + KERNELBASE);
-}
-
-/*
- * Change "struct page" to physical address.
- */
-#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
-#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET)
-
-/* Enforce in-order execution of data I/O.
- * No distinction between read/write on PPC; use eieio for all three.
- */
-#define iobarrier_rw() eieio()
-#define iobarrier_r() eieio()
-#define iobarrier_w() eieio()
-
-/*
- * Here comes the ppc implementation of the IOMAP
- * interfaces.
- */
-static inline unsigned int ioread8(void __iomem *addr)
-{
- return readb(addr);
-}
-
-static inline unsigned int ioread16(void __iomem *addr)
-{
- return readw(addr);
-}
-
-static inline unsigned int ioread32(void __iomem *addr)
-{
- return readl(addr);
-}
-
-static inline void iowrite8(u8 val, void __iomem *addr)
-{
- writeb(val, addr);
-}
-
-static inline void iowrite16(u16 val, void __iomem *addr)
-{
- writew(val, addr);
-}
-
-static inline void iowrite32(u32 val, void __iomem *addr)
-{
- writel(val, addr);
-}
-
-static inline void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
-{
- _insb(addr, dst, count);
-}
-
-static inline void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
-{
- _insw_ns(addr, dst, count);
-}
-
-static inline void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
-{
- _insl_ns(addr, dst, count);
-}
-
-static inline void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
-{
- _outsb(addr, src, count);
-}
-
-static inline void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
-{
- _outsw_ns(addr, src, count);
-}
-
-static inline void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
-{
- _outsl_ns(addr, src, count);
-}
-
-/* Create a virtual mapping cookie for an IO port range */
-extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
-extern void ioport_unmap(void __iomem *);
-
-/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
-struct pci_dev;
-extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
-extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
-
-#endif /* _PPC_IO_H */
-
-#ifdef CONFIG_8260_PCI9
-#include <asm/mpc8260_pci9.h>
-#endif
-
-/*
- * Convert a physical pointer to a virtual kernel pointer for /dev/mem
- * access
- */
-#define xlate_dev_mem_ptr(p) __va(p)
-
-/*
- * Convert a virtual cached pointer to an uncached pointer
- */
-#define xlate_dev_kmem_ptr(p) p
-
-/* access ports */
-#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v))
-#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
-
-#define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v))
-#define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v))
-
-#define setbits8(_addr, _v) out_8((_addr), in_8(_addr) | (_v))
-#define clrbits8(_addr, _v) out_8((_addr), in_8(_addr) & ~(_v))
-
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/irq_regs.h b/include/asm-ppc/irq_regs.h
deleted file mode 100644
index 3dd9c0b..0000000
--- a/include/asm-ppc/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/irq_regs.h>
diff --git a/include/asm-ppc/kdebug.h b/include/asm-ppc/kdebug.h
deleted file mode 100644
index 6ece1b0..0000000
--- a/include/asm-ppc/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-generic/kdebug.h>
diff --git a/include/asm-ppc/kgdb.h b/include/asm-ppc/kgdb.h
deleted file mode 100644
index b617dac..0000000
--- a/include/asm-ppc/kgdb.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * kgdb.h: Defines and declarations for serial line source level
- * remote debugging of the Linux kernel using gdb.
- *
- * PPC Mods (C) 1998 Michael Tesch (tesch@cs.wisc.edu)
- *
- * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
- */
-#ifdef __KERNEL__
-#ifndef _PPC_KGDB_H
-#define _PPC_KGDB_H
-
-#ifndef __ASSEMBLY__
-
-/* Things specific to the gen550 backend. */
-struct uart_port;
-
-extern void gen550_progress(char *, unsigned short);
-extern void gen550_kgdb_map_scc(void);
-extern void gen550_init(int, struct uart_port *);
-
-/* Things specific to the pmac backend. */
-extern void zs_kgdb_hook(int tty_num);
-
-/* To init the kgdb engine. (called by serial hook)*/
-extern void set_debug_traps(void);
-
-/* To enter the debugger explicitly. */
-extern void breakpoint(void);
-
-/* For taking exceptions
- * these are defined in traps.c
- */
-extern int (*debugger)(struct pt_regs *regs);
-extern int (*debugger_bpt)(struct pt_regs *regs);
-extern int (*debugger_sstep)(struct pt_regs *regs);
-extern int (*debugger_iabr_match)(struct pt_regs *regs);
-extern int (*debugger_dabr_match)(struct pt_regs *regs);
-extern void (*debugger_fault_handler)(struct pt_regs *regs);
-
-/* What we bring to the party */
-int kgdb_bpt(struct pt_regs *regs);
-int kgdb_sstep(struct pt_regs *regs);
-void kgdb(struct pt_regs *regs);
-int kgdb_iabr_match(struct pt_regs *regs);
-int kgdb_dabr_match(struct pt_regs *regs);
-
-/*
- * external low-level support routines (ie macserial.c)
- */
-extern void kgdb_interruptible(int); /* control interrupts from serial */
-extern void putDebugChar(char); /* write a single character */
-extern char getDebugChar(void); /* read and return a single char */
-
-#endif /* !(__ASSEMBLY__) */
-#endif /* !(_PPC_KGDB_H) */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/m8260_pci.h b/include/asm-ppc/m8260_pci.h
deleted file mode 100644
index bf9e05d..0000000
--- a/include/asm-ppc/m8260_pci.h
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * include/asm-ppc/m8260_pci.h
- *
- * Definitions for the MPC8250/MPC8265/MPC8266 integrated PCI host bridge.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifdef __KERNEL__
-#ifndef __M8260_PCI_H
-#define __M8260_PCI_H
-
-#include <linux/pci_ids.h>
-
-/*
- * Define the vendor/device ID for the MPC8265.
- */
-#define PCI_DEVICE_ID_MPC8265 ((0x18C0 << 16) | PCI_VENDOR_ID_MOTOROLA)
-#define PCI_DEVICE_ID_MPC8272 ((0x18C1 << 16) | PCI_VENDOR_ID_MOTOROLA)
-
-#define M8265_PCIBR0 0x101ac
-#define M8265_PCIBR1 0x101b0
-#define M8265_PCIMSK0 0x101c4
-#define M8265_PCIMSK1 0x101c8
-
-/* Bit definitions for PCIBR registers */
-
-#define PCIBR_ENABLE 0x00000001
-
-/* Bit definitions for PCIMSK registers */
-
-#define PCIMSK_32KiB 0xFFFF8000 /* Size of window, smallest */
-#define PCIMSK_64KiB 0xFFFF0000
-#define PCIMSK_128KiB 0xFFFE0000
-#define PCIMSK_256KiB 0xFFFC0000
-#define PCIMSK_512KiB 0xFFF80000
-#define PCIMSK_1MiB 0xFFF00000
-#define PCIMSK_2MiB 0xFFE00000
-#define PCIMSK_4MiB 0xFFC00000
-#define PCIMSK_8MiB 0xFF800000
-#define PCIMSK_16MiB 0xFF000000
-#define PCIMSK_32MiB 0xFE000000
-#define PCIMSK_64MiB 0xFC000000
-#define PCIMSK_128MiB 0xF8000000
-#define PCIMSK_256MiB 0xF0000000
-#define PCIMSK_512MiB 0xE0000000
-#define PCIMSK_1GiB 0xC0000000 /* Size of window, largest */
-
-
-#define M826X_SCCR_PCI_MODE_EN 0x100
-
-
-/*
- * Outbound ATU registers (3 sets). These registers control how 60x bus (local)
- * addresses are translated to PCI addresses when the MPC826x is a PCI bus
- * master (initiator).
- */
-
-#define POTAR_REG0 0x10800 /* PCI Outbound Translation Addr registers */
-#define POTAR_REG1 0x10818
-#define POTAR_REG2 0x10830
-
-#define POBAR_REG0 0x10808 /* PCI Outbound Base Addr registers */
-#define POBAR_REG1 0x10820
-#define POBAR_REG2 0x10838
-
-#define POCMR_REG0 0x10810 /* PCI Outbound Comparison Mask registers */
-#define POCMR_REG1 0x10828
-#define POCMR_REG2 0x10840
-
-/* Bit definitions for POMCR registers */
-
-#define POCMR_MASK_4KiB 0x000FFFFF
-#define POCMR_MASK_8KiB 0x000FFFFE
-#define POCMR_MASK_16KiB 0x000FFFFC
-#define POCMR_MASK_32KiB 0x000FFFF8
-#define POCMR_MASK_64KiB 0x000FFFF0
-#define POCMR_MASK_128KiB 0x000FFFE0
-#define POCMR_MASK_256KiB 0x000FFFC0
-#define POCMR_MASK_512KiB 0x000FFF80
-#define POCMR_MASK_1MiB 0x000FFF00
-#define POCMR_MASK_2MiB 0x000FFE00
-#define POCMR_MASK_4MiB 0x000FFC00
-#define POCMR_MASK_8MiB 0x000FF800
-#define POCMR_MASK_16MiB 0x000FF000
-#define POCMR_MASK_32MiB 0x000FE000
-#define POCMR_MASK_64MiB 0x000FC000
-#define POCMR_MASK_128MiB 0x000F8000
-#define POCMR_MASK_256MiB 0x000F0000
-#define POCMR_MASK_512MiB 0x000E0000
-#define POCMR_MASK_1GiB 0x000C0000
-
-#define POCMR_ENABLE 0x80000000
-#define POCMR_PCI_IO 0x40000000
-#define POCMR_PREFETCH_EN 0x20000000
-
-/* Soft PCI reset */
-
-#define PCI_GCR_REG 0x10880
-
-/* Bit definitions for PCI_GCR registers */
-
-#define PCIGCR_PCI_BUS_EN 0x1
-
-#define PCI_EMR_REG 0x10888
-/*
- * Inbound ATU registers (2 sets). These registers control how PCI addresses
- * are translated to 60x bus (local) addresses when the MPC826x is a PCI bus target.
- */
-
-#define PITAR_REG1 0x108D0
-#define PIBAR_REG1 0x108D8
-#define PICMR_REG1 0x108E0
-#define PITAR_REG0 0x108E8
-#define PIBAR_REG0 0x108F0
-#define PICMR_REG0 0x108F8
-
-/* Bit definitions for PCI Inbound Comparison Mask registers */
-
-#define PICMR_MASK_4KiB 0x000FFFFF
-#define PICMR_MASK_8KiB 0x000FFFFE
-#define PICMR_MASK_16KiB 0x000FFFFC
-#define PICMR_MASK_32KiB 0x000FFFF8
-#define PICMR_MASK_64KiB 0x000FFFF0
-#define PICMR_MASK_128KiB 0x000FFFE0
-#define PICMR_MASK_256KiB 0x000FFFC0
-#define PICMR_MASK_512KiB 0x000FFF80
-#define PICMR_MASK_1MiB 0x000FFF00
-#define PICMR_MASK_2MiB 0x000FFE00
-#define PICMR_MASK_4MiB 0x000FFC00
-#define PICMR_MASK_8MiB 0x000FF800
-#define PICMR_MASK_16MiB 0x000FF000
-#define PICMR_MASK_32MiB 0x000FE000
-#define PICMR_MASK_64MiB 0x000FC000
-#define PICMR_MASK_128MiB 0x000F8000
-#define PICMR_MASK_256MiB 0x000F0000
-#define PICMR_MASK_512MiB 0x000E0000
-#define PICMR_MASK_1GiB 0x000C0000
-
-#define PICMR_ENABLE 0x80000000
-#define PICMR_NO_SNOOP_EN 0x40000000
-#define PICMR_PREFETCH_EN 0x20000000
-
-/* PCI error Registers */
-
-#define PCI_ERROR_STATUS_REG 0x10884
-#define PCI_ERROR_MASK_REG 0x10888
-#define PCI_ERROR_CONTROL_REG 0x1088C
-#define PCI_ERROR_ADRS_CAPTURE_REG 0x10890
-#define PCI_ERROR_DATA_CAPTURE_REG 0x10898
-#define PCI_ERROR_CTRL_CAPTURE_REG 0x108A0
-
-/* PCI error Register bit defines */
-
-#define PCI_ERROR_PCI_ADDR_PAR 0x00000001
-#define PCI_ERROR_PCI_DATA_PAR_WR 0x00000002
-#define PCI_ERROR_PCI_DATA_PAR_RD 0x00000004
-#define PCI_ERROR_PCI_NO_RSP 0x00000008
-#define PCI_ERROR_PCI_TAR_ABT 0x00000010
-#define PCI_ERROR_PCI_SERR 0x00000020
-#define PCI_ERROR_PCI_PERR_RD 0x00000040
-#define PCI_ERROR_PCI_PERR_WR 0x00000080
-#define PCI_ERROR_I2O_OFQO 0x00000100
-#define PCI_ERROR_I2O_IPQO 0x00000200
-#define PCI_ERROR_IRA 0x00000400
-#define PCI_ERROR_NMI 0x00000800
-#define PCI_ERROR_I2O_DBMC 0x00001000
-
-/*
- * Register pair used to generate configuration cycles on the PCI bus
- * and access the MPC826x's own PCI configuration registers.
- */
-
-#define PCI_CFG_ADDR_REG 0x10900
-#define PCI_CFG_DATA_REG 0x10904
-
-/* Bus parking decides where the bus control sits when idle */
-/* If modifying memory controllers for PCI park on the core */
-
-#define PPC_ACR_BUS_PARK_CORE 0x6
-#define PPC_ACR_BUS_PARK_PCI 0x3
-
-#endif /* __M8260_PCI_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/machdep.h b/include/asm-ppc/machdep.h
deleted file mode 100644
index a20b499..0000000
--- a/include/asm-ppc/machdep.h
+++ /dev/null
@@ -1,178 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_MACHDEP_H
-#define _PPC_MACHDEP_H
-
-#include <linux/init.h>
-#include <linux/kexec.h>
-
-#include <asm/setup.h>
-#include <asm/page.h>
-
-struct pt_regs;
-struct pci_bus;
-struct pci_dev;
-struct seq_file;
-struct file;
-
-/*
- * This is for compatibility with ARCH=powerpc.
- */
-#define machine_is(x) __MACHINE_IS_##x
-#define __MACHINE_IS_powermac 0
-#define __MACHINE_IS_chrp 0
-#ifdef CONFIG_PPC_PREP
-#define __MACHINE_IS_prep 1
-#else
-#define __MACHINE_IS_prep 0
-#endif
-
-/* We export this macro for external modules like Alsa to know if
- * ppc_md.feature_call is implemented or not
- */
-#define CONFIG_PPC_HAS_FEATURE_CALLS
-
-struct machdep_calls {
- void (*setup_arch)(void);
- /* Optional, may be NULL. */
- int (*show_cpuinfo)(struct seq_file *m);
- int (*show_percpuinfo)(struct seq_file *m, int i);
- /* Optional, may be NULL. */
- unsigned int (*irq_canonicalize)(unsigned int irq);
- void (*init_IRQ)(void);
- int (*get_irq)(void);
-
- /* A general init function, called by ppc_init in init/main.c.
- May be NULL. DEPRECATED ! */
- void (*init)(void);
- /* For compatibility with merged platforms */
- void (*init_early)(void);
-
- void (*restart)(char *cmd);
- void (*power_off)(void);
- void (*halt)(void);
-
- void (*idle_loop)(void);
- void (*power_save)(void);
-
- long (*time_init)(void); /* Optional, may be NULL */
- int (*set_rtc_time)(unsigned long nowtime);
- unsigned long (*get_rtc_time)(void);
- unsigned char (*rtc_read_val)(int addr);
- void (*rtc_write_val)(int addr, unsigned char val);
- void (*calibrate_decr)(void);
-
- void (*heartbeat)(void);
- unsigned long heartbeat_reset;
- unsigned long heartbeat_count;
-
- unsigned long (*find_end_of_memory)(void);
- void (*setup_io_mappings)(void);
-
- void (*early_serial_map)(void);
- void (*progress)(char *, unsigned short);
- void (*kgdb_map_scc)(void);
-
- unsigned char (*nvram_read_val)(int addr);
- void (*nvram_write_val)(int addr, unsigned char val);
- void (*nvram_sync)(void);
-
- /*
- * optional PCI "hooks"
- */
-
- /* Called after scanning the bus, before allocating resources */
- void (*pcibios_fixup)(void);
-
- /* Called after PPC generic resource fixup to perform
- machine specific fixups */
- void (*pcibios_fixup_resources)(struct pci_dev *);
-
- /* Called for each PCI bus in the system when it's probed */
- void (*pcibios_fixup_bus)(struct pci_bus *);
-
- /* Called when pci_enable_device() is called (initial=0) or
- * when a device with no assigned resource is found (initial=1).
- * Returns 0 to allow assignment/enabling of the device. */
- int (*pcibios_enable_device_hook)(struct pci_dev *, int initial);
-
- /* For interrupt routing */
- unsigned char (*pci_swizzle)(struct pci_dev *, unsigned char *);
- int (*pci_map_irq)(struct pci_dev *, unsigned char, unsigned char);
-
- /* Called in indirect_* to avoid touching devices */
- int (*pci_exclude_device)(unsigned char, unsigned char);
-
- /* Called at then very end of pcibios_init() */
- void (*pcibios_after_init)(void);
-
- /* Get access protection for /dev/mem */
- pgprot_t (*phys_mem_access_prot)(struct file *file,
- unsigned long pfn,
- unsigned long size,
- pgprot_t vma_prot);
-
- /* Motherboard/chipset features. This is a kind of general purpose
- * hook used to control some machine specific features (like reset
- * lines, chip power control, etc...).
- */
- long (*feature_call)(unsigned int feature, ...);
-
-#ifdef CONFIG_SMP
- /* functions for dealing with other cpus */
- struct smp_ops_t *smp_ops;
-#endif /* CONFIG_SMP */
-
-#ifdef CONFIG_KEXEC
- /* Called to shutdown machine specific hardware not already controlled
- * by other drivers.
- * XXX Should we move this one out of kexec scope?
- */
- void (*machine_shutdown)(void);
-
- /* Called to do the minimal shutdown needed to run a kexec'd kernel
- * to run successfully.
- * XXX Should we move this one out of kexec scope?
- */
- void (*machine_crash_shutdown)(void);
-
- /* Called to do what every setup is needed on image and the
- * reboot code buffer. Returns 0 on success.
- * Provide your own (maybe dummy) implementation if your platform
- * claims to support kexec.
- */
- int (*machine_kexec_prepare)(struct kimage *image);
-
- /* Called to handle any machine specific cleanup on image */
- void (*machine_kexec_cleanup)(struct kimage *image);
-
- /* Called to perform the _real_ kexec.
- * Do NOT allocate memory or fail here. We are past the point of
- * no return.
- */
- void (*machine_kexec)(struct kimage *image);
-#endif /* CONFIG_KEXEC */
-};
-
-extern struct machdep_calls ppc_md;
-extern char cmd_line[COMMAND_LINE_SIZE];
-
-extern void setup_pci_ptrs(void);
-
-#ifdef CONFIG_SMP
-struct smp_ops_t {
- void (*message_pass)(int target, int msg);
- int (*probe)(void);
- void (*kick_cpu)(int nr);
- void (*setup_cpu)(int nr);
- void (*space_timers)(int nr);
- void (*take_timebase)(void);
- void (*give_timebase)(void);
-};
-
-/* Poor default implementations */
-extern void __devinit smp_generic_give_timebase(void);
-extern void __devinit smp_generic_take_timebase(void);
-#endif /* CONFIG_SMP */
-
-#endif /* _PPC_MACHDEP_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/md.h b/include/asm-ppc/md.h
deleted file mode 100644
index 9a9b6b4..0000000
--- a/include/asm-ppc/md.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/*
- * md.h: High speed xor_block operation for RAID4/5
- *
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_MD_H
-#define __ASM_MD_H
-
-/* #define HAVE_ARCH_XORBLOCK */
-
-#define MD_XORBLOCK_ALIGNMENT sizeof(long)
-
-#endif /* __ASM_MD_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mk48t59.h b/include/asm-ppc/mk48t59.h
deleted file mode 100644
index 6a0ed6f..0000000
--- a/include/asm-ppc/mk48t59.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * Registers for the mk48t59 real-time-clock
- */
-
-#ifndef _PPC_MK48T59_H
-#define _PPC_MK48T59_H
-
-/* RTC Offsets */
-
-#define MK48T59_RTC_SECONDS 0x1FF9
-#define MK48T59_RTC_MINUTES 0x1FFA
-#define MK48T59_RTC_HOURS 0x1FFB
-#define MK48T59_RTC_DAY_OF_WEEK 0x1FFC
-#define MK48T59_RTC_DAY_OF_MONTH 0x1FFD
-#define MK48T59_RTC_MONTH 0x1FFE
-#define MK48T59_RTC_YEAR 0x1FFF
-
-#define MK48T59_RTC_CONTROLA 0x1FF8
-#define MK48T59_RTC_CA_WRITE 0x80
-#define MK48T59_RTC_CA_READ 0x40
-#define MK48T59_RTC_CA_CALIB_SIGN 0x20
-#define MK48T59_RTC_CA_CALIB_MASK 0x1f
-
-#define MK48T59_RTC_CONTROLB 0x1FF9
-#define MK48T59_RTC_CB_STOP 0x80
-
-#endif /* _PPC_MK48T59_H */
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h
deleted file mode 100644
index d76ef09..0000000
--- a/include/asm-ppc/mmu.h
+++ /dev/null
@@ -1,444 +0,0 @@
-/*
- * PowerPC memory management structures
- */
-
-#ifdef __KERNEL__
-#ifndef _PPC_MMU_H_
-#define _PPC_MMU_H_
-
-
-#ifndef __ASSEMBLY__
-
-/*
- * Define physical address type. Machines using split size
- * virtual/physical addressing like 32-bit virtual / 36-bit
- * physical need a larger than native word size type. -Matt
- */
-#ifndef CONFIG_PHYS_64BIT
-#define PHYS_FMT "%.8lx"
-#else
-extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
-#define PHYS_FMT "%16Lx"
-#endif
-
-typedef struct {
- unsigned long id;
- unsigned long vdso_base;
-} mm_context_t;
-
-/* Hardware Page Table Entry */
-typedef struct _PTE {
- unsigned long v:1; /* Entry is valid */
- unsigned long vsid:24; /* Virtual segment identifier */
- unsigned long h:1; /* Hash algorithm indicator */
- unsigned long api:6; /* Abbreviated page index */
- unsigned long rpn:20; /* Real (physical) page number */
- unsigned long :3; /* Unused */
- unsigned long r:1; /* Referenced */
- unsigned long c:1; /* Changed */
- unsigned long w:1; /* Write-thru cache mode */
- unsigned long i:1; /* Cache inhibited */
- unsigned long m:1; /* Memory coherence */
- unsigned long g:1; /* Guarded */
- unsigned long :1; /* Unused */
- unsigned long pp:2; /* Page protection */
-} PTE;
-
-/* Values for PP (assumes Ks=0, Kp=1) */
-#define PP_RWXX 0 /* Supervisor read/write, User none */
-#define PP_RWRX 1 /* Supervisor read/write, User read */
-#define PP_RWRW 2 /* Supervisor read/write, User read/write */
-#define PP_RXRX 3 /* Supervisor read, User read */
-
-/* Segment Register */
-typedef struct _SEGREG {
- unsigned long t:1; /* Normal or I/O type */
- unsigned long ks:1; /* Supervisor 'key' (normally 0) */
- unsigned long kp:1; /* User 'key' (normally 1) */
- unsigned long n:1; /* No-execute */
- unsigned long :4; /* Unused */
- unsigned long vsid:24; /* Virtual Segment Identifier */
-} SEGREG;
-
-/* Block Address Translation (BAT) Registers */
-typedef struct _P601_BATU { /* Upper part of BAT for 601 processor */
- unsigned long bepi:15; /* Effective page index (virtual address) */
- unsigned long :8; /* unused */
- unsigned long w:1;
- unsigned long i:1; /* Cache inhibit */
- unsigned long m:1; /* Memory coherence */
- unsigned long ks:1; /* Supervisor key (normally 0) */
- unsigned long kp:1; /* User key (normally 1) */
- unsigned long pp:2; /* Page access protections */
-} P601_BATU;
-
-typedef struct _BATU { /* Upper part of BAT (all except 601) */
- unsigned long bepi:15; /* Effective page index (virtual address) */
- unsigned long :4; /* Unused */
- unsigned long bl:11; /* Block size mask */
- unsigned long vs:1; /* Supervisor valid */
- unsigned long vp:1; /* User valid */
-} BATU;
-
-typedef struct _P601_BATL { /* Lower part of BAT for 601 processor */
- unsigned long brpn:15; /* Real page index (physical address) */
- unsigned long :10; /* Unused */
- unsigned long v:1; /* Valid bit */
- unsigned long bl:6; /* Block size mask */
-} P601_BATL;
-
-typedef struct _BATL { /* Lower part of BAT (all except 601) */
- unsigned long brpn:15; /* Real page index (physical address) */
- unsigned long :10; /* Unused */
- unsigned long w:1; /* Write-thru cache */
- unsigned long i:1; /* Cache inhibit */
- unsigned long m:1; /* Memory coherence */
- unsigned long g:1; /* Guarded (MBZ in IBAT) */
- unsigned long :1; /* Unused */
- unsigned long pp:2; /* Page access protections */
-} BATL;
-
-typedef struct _BAT {
- BATU batu; /* Upper register */
- BATL batl; /* Lower register */
-} BAT;
-
-typedef struct _P601_BAT {
- P601_BATU batu; /* Upper register */
- P601_BATL batl; /* Lower register */
-} P601_BAT;
-
-#endif /* __ASSEMBLY__ */
-
-/* Block size masks */
-#define BL_128K 0x000
-#define BL_256K 0x001
-#define BL_512K 0x003
-#define BL_1M 0x007
-#define BL_2M 0x00F
-#define BL_4M 0x01F
-#define BL_8M 0x03F
-#define BL_16M 0x07F
-#define BL_32M 0x0FF
-#define BL_64M 0x1FF
-#define BL_128M 0x3FF
-#define BL_256M 0x7FF
-
-/* BAT Access Protection */
-#define BPP_XX 0x00 /* No access */
-#define BPP_RX 0x01 /* Read only */
-#define BPP_RW 0x02 /* Read/write */
-
-/* Control/status registers for the MPC8xx.
- * A write operation to these registers causes serialized access.
- * During software tablewalk, the registers used perform mask/shift-add
- * operations when written/read. A TLB entry is created when the Mx_RPN
- * is written, and the contents of several registers are used to
- * create the entry.
- */
-#define SPRN_MI_CTR 784 /* Instruction TLB control register */
-#define MI_GPM 0x80000000 /* Set domain manager mode */
-#define MI_PPM 0x40000000 /* Set subpage protection */
-#define MI_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */
-#define MI_RSV4I 0x08000000 /* Reserve 4 TLB entries */
-#define MI_PPCS 0x02000000 /* Use MI_RPN prob/priv state */
-#define MI_IDXMASK 0x00001f00 /* TLB index to be loaded */
-#define MI_RESETVAL 0x00000000 /* Value of register at reset */
-
-/* These are the Ks and Kp from the PowerPC books. For proper operation,
- * Ks = 0, Kp = 1.
- */
-#define SPRN_MI_AP 786
-#define MI_Ks 0x80000000 /* Should not be set */
-#define MI_Kp 0x40000000 /* Should always be set */
-
-/* The effective page number register. When read, contains the information
- * about the last instruction TLB miss. When MI_RPN is written, bits in
- * this register are used to create the TLB entry.
- */
-#define SPRN_MI_EPN 787
-#define MI_EPNMASK 0xfffff000 /* Effective page number for entry */
-#define MI_EVALID 0x00000200 /* Entry is valid */
-#define MI_ASIDMASK 0x0000000f /* ASID match value */
- /* Reset value is undefined */
-
-/* A "level 1" or "segment" or whatever you want to call it register.
- * For the instruction TLB, it contains bits that get loaded into the
- * TLB entry when the MI_RPN is written.
- */
-#define SPRN_MI_TWC 789
-#define MI_APG 0x000001e0 /* Access protection group (0) */
-#define MI_GUARDED 0x00000010 /* Guarded storage */
-#define MI_PSMASK 0x0000000c /* Mask of page size bits */
-#define MI_PS8MEG 0x0000000c /* 8M page size */
-#define MI_PS512K 0x00000004 /* 512K page size */
-#define MI_PS4K_16K 0x00000000 /* 4K or 16K page size */
-#define MI_SVALID 0x00000001 /* Segment entry is valid */
- /* Reset value is undefined */
-
-/* Real page number. Defined by the pte. Writing this register
- * causes a TLB entry to be created for the instruction TLB, using
- * additional information from the MI_EPN, and MI_TWC registers.
- */
-#define SPRN_MI_RPN 790
-
-/* Define an RPN value for mapping kernel memory to large virtual
- * pages for boot initialization. This has real page number of 0,
- * large page size, shared page, cache enabled, and valid.
- * Also mark all subpages valid and write access.
- */
-#define MI_BOOTINIT 0x000001fd
-
-#define SPRN_MD_CTR 792 /* Data TLB control register */
-#define MD_GPM 0x80000000 /* Set domain manager mode */
-#define MD_PPM 0x40000000 /* Set subpage protection */
-#define MD_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */
-#define MD_WTDEF 0x10000000 /* Set writethrough when MMU dis */
-#define MD_RSV4I 0x08000000 /* Reserve 4 TLB entries */
-#define MD_TWAM 0x04000000 /* Use 4K page hardware assist */
-#define MD_PPCS 0x02000000 /* Use MI_RPN prob/priv state */
-#define MD_IDXMASK 0x00001f00 /* TLB index to be loaded */
-#define MD_RESETVAL 0x04000000 /* Value of register at reset */
-
-#define SPRN_M_CASID 793 /* Address space ID (context) to match */
-#define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */
-
-
-/* These are the Ks and Kp from the PowerPC books. For proper operation,
- * Ks = 0, Kp = 1.
- */
-#define SPRN_MD_AP 794
-#define MD_Ks 0x80000000 /* Should not be set */
-#define MD_Kp 0x40000000 /* Should always be set */
-
-/* The effective page number register. When read, contains the information
- * about the last instruction TLB miss. When MD_RPN is written, bits in
- * this register are used to create the TLB entry.
- */
-#define SPRN_MD_EPN 795
-#define MD_EPNMASK 0xfffff000 /* Effective page number for entry */
-#define MD_EVALID 0x00000200 /* Entry is valid */
-#define MD_ASIDMASK 0x0000000f /* ASID match value */
- /* Reset value is undefined */
-
-/* The pointer to the base address of the first level page table.
- * During a software tablewalk, reading this register provides the address
- * of the entry associated with MD_EPN.
- */
-#define SPRN_M_TWB 796
-#define M_L1TB 0xfffff000 /* Level 1 table base address */
-#define M_L1INDX 0x00000ffc /* Level 1 index, when read */
- /* Reset value is undefined */
-
-/* A "level 1" or "segment" or whatever you want to call it register.
- * For the data TLB, it contains bits that get loaded into the TLB entry
- * when the MD_RPN is written. It is also provides the hardware assist
- * for finding the PTE address during software tablewalk.
- */
-#define SPRN_MD_TWC 797
-#define MD_L2TB 0xfffff000 /* Level 2 table base address */
-#define MD_L2INDX 0xfffffe00 /* Level 2 index (*pte), when read */
-#define MD_APG 0x000001e0 /* Access protection group (0) */
-#define MD_GUARDED 0x00000010 /* Guarded storage */
-#define MD_PSMASK 0x0000000c /* Mask of page size bits */
-#define MD_PS8MEG 0x0000000c /* 8M page size */
-#define MD_PS512K 0x00000004 /* 512K page size */
-#define MD_PS4K_16K 0x00000000 /* 4K or 16K page size */
-#define MD_WT 0x00000002 /* Use writethrough page attribute */
-#define MD_SVALID 0x00000001 /* Segment entry is valid */
- /* Reset value is undefined */
-
-
-/* Real page number. Defined by the pte. Writing this register
- * causes a TLB entry to be created for the data TLB, using
- * additional information from the MD_EPN, and MD_TWC registers.
- */
-#define SPRN_MD_RPN 798
-
-/* This is a temporary storage register that could be used to save
- * a processor working register during a tablewalk.
- */
-#define SPRN_M_TW 799
-
-/*
- * At present, all PowerPC 400-class processors share a similar TLB
- * architecture. The instruction and data sides share a unified,
- * 64-entry, fully-associative TLB which is maintained totally under
- * software control. In addition, the instruction side has a
- * hardware-managed, 4-entry, fully- associative TLB which serves as a
- * first level to the shared TLB. These two TLBs are known as the UTLB
- * and ITLB, respectively.
- */
-
-#define PPC4XX_TLB_SIZE 64
-
-/*
- * TLB entries are defined by a "high" tag portion and a "low" data
- * portion. On all architectures, the data portion is 32-bits.
- *
- * TLB entries are managed entirely under software control by reading,
- * writing, and searchoing using the 4xx-specific tlbre, tlbwr, and tlbsx
- * instructions.
- */
-
-#define TLB_LO 1
-#define TLB_HI 0
-
-#define TLB_DATA TLB_LO
-#define TLB_TAG TLB_HI
-
-/* Tag portion */
-
-#define TLB_EPN_MASK 0xFFFFFC00 /* Effective Page Number */
-#define TLB_PAGESZ_MASK 0x00000380
-#define TLB_PAGESZ(x) (((x) & 0x7) << 7)
-#define PAGESZ_1K 0
-#define PAGESZ_4K 1
-#define PAGESZ_16K 2
-#define PAGESZ_64K 3
-#define PAGESZ_256K 4
-#define PAGESZ_1M 5
-#define PAGESZ_4M 6
-#define PAGESZ_16M 7
-#define TLB_VALID 0x00000040 /* Entry is valid */
-
-/* Data portion */
-
-#define TLB_RPN_MASK 0xFFFFFC00 /* Real Page Number */
-#define TLB_PERM_MASK 0x00000300
-#define TLB_EX 0x00000200 /* Instruction execution allowed */
-#define TLB_WR 0x00000100 /* Writes permitted */
-#define TLB_ZSEL_MASK 0x000000F0
-#define TLB_ZSEL(x) (((x) & 0xF) << 4)
-#define TLB_ATTR_MASK 0x0000000F
-#define TLB_W 0x00000008 /* Caching is write-through */
-#define TLB_I 0x00000004 /* Caching is inhibited */
-#define TLB_M 0x00000002 /* Memory is coherent */
-#define TLB_G 0x00000001 /* Memory is guarded from prefetch */
-
-/*
- * PPC440 support
- */
-#define PPC44x_MMUCR_TID 0x000000ff
-#define PPC44x_MMUCR_STS 0x00010000
-
-#define PPC44x_TLB_PAGEID 0
-#define PPC44x_TLB_XLAT 1
-#define PPC44x_TLB_ATTRIB 2
-
-/* Page identification fields */
-#define PPC44x_TLB_EPN_MASK 0xfffffc00 /* Effective Page Number */
-#define PPC44x_TLB_VALID 0x00000200 /* Valid flag */
-#define PPC44x_TLB_TS 0x00000100 /* Translation address space */
-#define PPC44x_TLB_1K 0x00000000 /* Page sizes */
-#define PPC44x_TLB_4K 0x00000010
-#define PPC44x_TLB_16K 0x00000020
-#define PPC44x_TLB_64K 0x00000030
-#define PPC44x_TLB_256K 0x00000040
-#define PPC44x_TLB_1M 0x00000050
-#define PPC44x_TLB_16M 0x00000070
-#define PPC44x_TLB_256M 0x00000090
-
-/* Translation fields */
-#define PPC44x_TLB_RPN_MASK 0xfffffc00 /* Real Page Number */
-#define PPC44x_TLB_ERPN_MASK 0x0000000f
-
-/* Storage attribute and access control fields */
-#define PPC44x_TLB_ATTR_MASK 0x0000ff80
-#define PPC44x_TLB_U0 0x00008000 /* User 0 */
-#define PPC44x_TLB_U1 0x00004000 /* User 1 */
-#define PPC44x_TLB_U2 0x00002000 /* User 2 */
-#define PPC44x_TLB_U3 0x00001000 /* User 3 */
-#define PPC44x_TLB_W 0x00000800 /* Caching is write-through */
-#define PPC44x_TLB_I 0x00000400 /* Caching is inhibited */
-#define PPC44x_TLB_M 0x00000200 /* Memory is coherent */
-#define PPC44x_TLB_G 0x00000100 /* Memory is guarded */
-#define PPC44x_TLB_E 0x00000080 /* Memory is guarded */
-
-#define PPC44x_TLB_PERM_MASK 0x0000003f
-#define PPC44x_TLB_UX 0x00000020 /* User execution */
-#define PPC44x_TLB_UW 0x00000010 /* User write */
-#define PPC44x_TLB_UR 0x00000008 /* User read */
-#define PPC44x_TLB_SX 0x00000004 /* Super execution */
-#define PPC44x_TLB_SW 0x00000002 /* Super write */
-#define PPC44x_TLB_SR 0x00000001 /* Super read */
-
-/* Book-E defined page sizes */
-#define BOOKE_PAGESZ_1K 0
-#define BOOKE_PAGESZ_4K 1
-#define BOOKE_PAGESZ_16K 2
-#define BOOKE_PAGESZ_64K 3
-#define BOOKE_PAGESZ_256K 4
-#define BOOKE_PAGESZ_1M 5
-#define BOOKE_PAGESZ_4M 6
-#define BOOKE_PAGESZ_16M 7
-#define BOOKE_PAGESZ_64M 8
-#define BOOKE_PAGESZ_256M 9
-#define BOOKE_PAGESZ_1GB 10
-#define BOOKE_PAGESZ_4GB 11
-#define BOOKE_PAGESZ_16GB 12
-#define BOOKE_PAGESZ_64GB 13
-#define BOOKE_PAGESZ_256GB 14
-#define BOOKE_PAGESZ_1TB 15
-
-#ifndef CONFIG_SERIAL_TEXT_DEBUG
-#define PPC44x_EARLY_TLBS 1
-#else
-#define PPC44x_EARLY_TLBS 2
-#endif
-
-/*
- * Freescale Book-E MMU support
- */
-
-#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000)
-#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000)
-#define MAS0_NV(x) ((x) & 0x00000FFF)
-
-#define MAS1_VALID 0x80000000
-#define MAS1_IPROT 0x40000000
-#define MAS1_TID(x) ((x << 16) & 0x3FFF0000)
-#define MAS1_TS 0x00001000
-#define MAS1_TSIZE(x) ((x << 8) & 0x00000F00)
-
-#define MAS2_EPN 0xFFFFF000
-#define MAS2_X0 0x00000040
-#define MAS2_X1 0x00000020
-#define MAS2_W 0x00000010
-#define MAS2_I 0x00000008
-#define MAS2_M 0x00000004
-#define MAS2_G 0x00000002
-#define MAS2_E 0x00000001
-
-#define MAS3_RPN 0xFFFFF000
-#define MAS3_U0 0x00000200
-#define MAS3_U1 0x00000100
-#define MAS3_U2 0x00000080
-#define MAS3_U3 0x00000040
-#define MAS3_UX 0x00000020
-#define MAS3_SX 0x00000010
-#define MAS3_UW 0x00000008
-#define MAS3_SW 0x00000004
-#define MAS3_UR 0x00000002
-#define MAS3_SR 0x00000001
-
-#define MAS4_TLBSELD(x) MAS0_TLBSEL(x)
-#define MAS4_TIDDSEL 0x000F0000
-#define MAS4_TSIZED(x) MAS1_TSIZE(x)
-#define MAS4_X0D 0x00000040
-#define MAS4_X1D 0x00000020
-#define MAS4_WD 0x00000010
-#define MAS4_ID 0x00000008
-#define MAS4_MD 0x00000004
-#define MAS4_GD 0x00000002
-#define MAS4_ED 0x00000001
-
-#define MAS6_SPID0 0x3FFF0000
-#define MAS6_SPID1 0x00007FFE
-#define MAS6_SAS 0x00000001
-#define MAS6_SPID MAS6_SPID0
-
-#define MAS7_RPN 0xFFFFFFFF
-
-#endif /* _PPC_MMU_H_ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mmu_context.h b/include/asm-ppc/mmu_context.h
deleted file mode 100644
index 9f097e2..0000000
--- a/include/asm-ppc/mmu_context.h
+++ /dev/null
@@ -1,198 +0,0 @@
-#ifdef __KERNEL__
-#ifndef __PPC_MMU_CONTEXT_H
-#define __PPC_MMU_CONTEXT_H
-
-#include <linux/bitops.h>
-
-#include <asm/atomic.h>
-#include <asm/mmu.h>
-#include <asm/cputable.h>
-#include <asm-generic/mm_hooks.h>
-
-/*
- * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs
- * (virtual segment identifiers) for each context. Although the
- * hardware supports 24-bit VSIDs, and thus >1 million contexts,
- * we only use 32,768 of them. That is ample, since there can be
- * at most around 30,000 tasks in the system anyway, and it means
- * that we can use a bitmap to indicate which contexts are in use.
- * Using a bitmap means that we entirely avoid all of the problems
- * that we used to have when the context number overflowed,
- * particularly on SMP systems.
- * -- paulus.
- */
-
-/*
- * This function defines the mapping from contexts to VSIDs (virtual
- * segment IDs). We use a skew on both the context and the high 4 bits
- * of the 32-bit virtual address (the "effective segment ID") in order
- * to spread out the entries in the MMU hash table. Note, if this
- * function is changed then arch/ppc/mm/hashtable.S will have to be
- * changed to correspond.
- */
-#define CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \
- & 0xffffff)
-
-/*
- The MPC8xx has only 16 contexts. We rotate through them on each
- task switch. A better way would be to keep track of tasks that
- own contexts, and implement an LRU usage. That way very active
- tasks don't always have to pay the TLB reload overhead. The
- kernel pages are mapped shared, so the kernel can run on behalf
- of any task that makes a kernel entry. Shared does not mean they
- are not protected, just that the ASID comparison is not performed.
- -- Dan
-
- The IBM4xx has 256 contexts, so we can just rotate through these
- as a way of "switching" contexts. If the TID of the TLB is zero,
- the PID/TID comparison is disabled, so we can use a TID of zero
- to represent all kernel pages as shared among all contexts.
- -- Dan
- */
-
-static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
-{
-}
-
-#ifdef CONFIG_8xx
-#define NO_CONTEXT 16
-#define LAST_CONTEXT 15
-#define FIRST_CONTEXT 0
-
-#elif defined(CONFIG_4xx)
-#define NO_CONTEXT 256
-#define LAST_CONTEXT 255
-#define FIRST_CONTEXT 1
-
-#else
-
-/* PPC 6xx, 7xx CPUs */
-#define NO_CONTEXT ((unsigned long) -1)
-#define LAST_CONTEXT 32767
-#define FIRST_CONTEXT 1
-#endif
-
-/*
- * Set the current MMU context.
- * On 32-bit PowerPCs (other than the 8xx embedded chips), this is done by
- * loading up the segment registers for the user part of the address space.
- *
- * Since the PGD is immediately available, it is much faster to simply
- * pass this along as a second parameter, which is required for 8xx and
- * can be used for debugging on all processors (if you happen to have
- * an Abatron).
- */
-extern void set_context(unsigned long contextid, pgd_t *pgd);
-
-/*
- * Bitmap of contexts in use.
- * The size of this bitmap is LAST_CONTEXT + 1 bits.
- */
-extern unsigned long context_map[];
-
-/*
- * This caches the next context number that we expect to be free.
- * Its use is an optimization only, we can't rely on this context
- * number to be free, but it usually will be.
- */
-extern unsigned long next_mmu_context;
-
-/*
- * If we don't have sufficient contexts to give one to every task
- * that could be in the system, we need to be able to steal contexts.
- * These variables support that.
- */
-#if LAST_CONTEXT < 30000
-#define FEW_CONTEXTS 1
-extern atomic_t nr_free_contexts;
-extern struct mm_struct *context_mm[LAST_CONTEXT+1];
-extern void steal_context(void);
-#endif
-
-/*
- * Get a new mmu context for the address space described by `mm'.
- */
-static inline void get_mmu_context(struct mm_struct *mm)
-{
- unsigned long ctx;
-
- if (mm->context.id != NO_CONTEXT)
- return;
-#ifdef FEW_CONTEXTS
- while (atomic_dec_if_positive(&nr_free_contexts) < 0)
- steal_context();
-#endif
- ctx = next_mmu_context;
- while (test_and_set_bit(ctx, context_map)) {
- ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
- if (ctx > LAST_CONTEXT)
- ctx = 0;
- }
- next_mmu_context = (ctx + 1) & LAST_CONTEXT;
- mm->context.id = ctx;
-#ifdef FEW_CONTEXTS
- context_mm[ctx] = mm;
-#endif
-}
-
-/*
- * Set up the context for a new address space.
- */
-static inline int init_new_context(struct task_struct *t, struct mm_struct *mm)
-{
- mm->context.id = NO_CONTEXT;
- mm->context.vdso_base = 0;
- return 0;
-}
-
-/*
- * We're finished using the context for an address space.
- */
-static inline void destroy_context(struct mm_struct *mm)
-{
- preempt_disable();
- if (mm->context.id != NO_CONTEXT) {
- clear_bit(mm->context.id, context_map);
- mm->context.id = NO_CONTEXT;
-#ifdef FEW_CONTEXTS
- atomic_inc(&nr_free_contexts);
-#endif
- }
- preempt_enable();
-}
-
-static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
- struct task_struct *tsk)
-{
-#ifdef CONFIG_ALTIVEC
- if (cpu_has_feature(CPU_FTR_ALTIVEC))
- asm volatile ("dssall;\n"
-#ifndef CONFIG_POWER4
- "sync;\n" /* G4 needs a sync here, G5 apparently not */
-#endif
- : : );
-#endif /* CONFIG_ALTIVEC */
-
- tsk->thread.pgdir = next->pgd;
-
- /* No need to flush userspace segments if the mm doesnt change */
- if (prev == next)
- return;
-
- /* Setup new userspace context */
- get_mmu_context(next);
- set_context(next->context.id, next->pgd);
-}
-
-#define deactivate_mm(tsk,mm) do { } while (0)
-
-/*
- * After we have set current->mm to a new value, this activates
- * the context for the new mm so we see the new mappings.
- */
-#define activate_mm(active_mm, mm) switch_mm(active_mm, mm, current)
-
-extern void mmu_context_init(void);
-
-#endif /* __PPC_MMU_CONTEXT_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mpc10x.h b/include/asm-ppc/mpc10x.h
deleted file mode 100644
index b30a6a3..0000000
--- a/include/asm-ppc/mpc10x.h
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * Common routines for the Motorola SPS MPC106/8240/107 Host bridge/Mem
- * ctlr/EPIC/etc.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __PPC_KERNEL_MPC10X_H
-#define __PPC_KERNEL_MPC10X_H
-
-#include <linux/pci_ids.h>
-#include <asm/pci-bridge.h>
-
-/*
- * The values here don't completely map everything but should work in most
- * cases.
- *
- * MAP A (PReP Map)
- * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff
- * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff
- * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000
- * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
- *
- * MAP B (CHRP Map)
- * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff
- * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff
- * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000
- * EUMB mapped to: ioremap_base - 0x00100000 (ioremap_base - 1 MB)
- */
-
-/*
- * Define the vendor/device IDs for the various bridges--should be added to
- * <linux/pci_ids.h>
- */
-#define MPC10X_BRIDGE_106 ((PCI_DEVICE_ID_MOTOROLA_MPC106 << 16) | \
- PCI_VENDOR_ID_MOTOROLA)
-#define MPC10X_BRIDGE_8240 ((0x0003 << 16) | PCI_VENDOR_ID_MOTOROLA)
-#define MPC10X_BRIDGE_107 ((0x0004 << 16) | PCI_VENDOR_ID_MOTOROLA)
-#define MPC10X_BRIDGE_8245 ((0x0006 << 16) | PCI_VENDOR_ID_MOTOROLA)
-
-/* Define the type of map to use */
-#define MPC10X_MEM_MAP_A 1
-#define MPC10X_MEM_MAP_B 2
-
-/* Map A (PReP Map) Defines */
-#define MPC10X_MAPA_CNFG_ADDR 0x80000cf8
-#define MPC10X_MAPA_CNFG_DATA 0x80000cfc
-
-#define MPC10X_MAPA_ISA_IO_BASE 0x80000000
-#define MPC10X_MAPA_ISA_MEM_BASE 0xc0000000
-#define MPC10X_MAPA_DRAM_OFFSET 0x80000000
-
-#define MPC10X_MAPA_PCI_INTACK_ADDR 0xbffffff0
-#define MPC10X_MAPA_PCI_IO_START 0x00000000
-#define MPC10X_MAPA_PCI_IO_END (0x00800000 - 1)
-#define MPC10X_MAPA_PCI_MEM_START 0x00000000
-#define MPC10X_MAPA_PCI_MEM_END (0x20000000 - 1)
-
-#define MPC10X_MAPA_PCI_MEM_OFFSET (MPC10X_MAPA_ISA_MEM_BASE - \
- MPC10X_MAPA_PCI_MEM_START)
-
-/* Map B (CHRP Map) Defines */
-#define MPC10X_MAPB_CNFG_ADDR 0xfec00000
-#define MPC10X_MAPB_CNFG_DATA 0xfee00000
-
-#define MPC10X_MAPB_ISA_IO_BASE 0xfe000000
-#define MPC10X_MAPB_ISA_MEM_BASE 0x80000000
-#define MPC10X_MAPB_DRAM_OFFSET 0x00000000
-
-#define MPC10X_MAPB_PCI_INTACK_ADDR 0xfef00000
-#define MPC10X_MAPB_PCI_IO_START 0x00000000
-#define MPC10X_MAPB_PCI_IO_END (0x00c00000 - 1)
-#define MPC10X_MAPB_PCI_MEM_START 0x80000000
-#define MPC10X_MAPB_PCI_MEM_END (0xc0000000 - 1)
-
-#define MPC10X_MAPB_PCI_MEM_OFFSET (MPC10X_MAPB_ISA_MEM_BASE - \
- MPC10X_MAPB_PCI_MEM_START)
-
-/* Set hose members to values appropriate for the mem map used */
-#define MPC10X_SETUP_HOSE(hose, map) { \
- (hose)->pci_mem_offset = MPC10X_MAP##map##_PCI_MEM_OFFSET; \
- (hose)->io_space.start = MPC10X_MAP##map##_PCI_IO_START; \
- (hose)->io_space.end = MPC10X_MAP##map##_PCI_IO_END; \
- (hose)->mem_space.start = MPC10X_MAP##map##_PCI_MEM_START; \
- (hose)->mem_space.end = MPC10X_MAP##map##_PCI_MEM_END; \
- (hose)->io_base_virt = (void *)MPC10X_MAP##map##_ISA_IO_BASE; \
-}
-
-
-/* Miscellaneous Configuration register offsets */
-#define MPC10X_CFG_PIR_REG 0x09
-#define MPC10X_CFG_PIR_HOST_BRIDGE 0x00
-#define MPC10X_CFG_PIR_AGENT 0x01
-
-#define MPC10X_CFG_EUMBBAR 0x78
-
-#define MPC10X_CFG_PICR1_REG 0xa8
-#define MPC10X_CFG_PICR1_ADDR_MAP_MASK 0x00010000
-#define MPC10X_CFG_PICR1_ADDR_MAP_A 0x00010000
-#define MPC10X_CFG_PICR1_ADDR_MAP_B 0x00000000
-#define MPC10X_CFG_PICR1_SPEC_PCI_RD 0x00000004
-#define MPC10X_CFG_PICR1_ST_GATH_EN 0x00000040
-
-#define MPC10X_CFG_PICR2_REG 0xac
-#define MPC10X_CFG_PICR2_COPYBACK_OPT 0x00000001
-
-#define MPC10X_CFG_MAPB_OPTIONS_REG 0xe0
-#define MPC10X_CFG_MAPB_OPTIONS_CFAE 0x80 /* CPU_FD_ALIAS_EN */
-#define MPC10X_CFG_MAPB_OPTIONS_PFAE 0x40 /* PCI_FD_ALIAS_EN */
-#define MPC10X_CFG_MAPB_OPTIONS_DR 0x20 /* DLL_RESET */
-#define MPC10X_CFG_MAPB_OPTIONS_PCICH 0x08 /* PCI_COMPATIBILITY_HOLE */
-#define MPC10X_CFG_MAPB_OPTIONS_PROCCH 0x04 /* PROC_COMPATIBILITY_HOLE */
-
-/* Define offsets for the memory controller registers in the config space */
-#define MPC10X_MCTLR_MEM_START_1 0x80 /* Banks 0-3 */
-#define MPC10X_MCTLR_MEM_START_2 0x84 /* Banks 4-7 */
-#define MPC10X_MCTLR_EXT_MEM_START_1 0x88 /* Banks 0-3 */
-#define MPC10X_MCTLR_EXT_MEM_START_2 0x8c /* Banks 4-7 */
-
-#define MPC10X_MCTLR_MEM_END_1 0x90 /* Banks 0-3 */
-#define MPC10X_MCTLR_MEM_END_2 0x94 /* Banks 4-7 */
-#define MPC10X_MCTLR_EXT_MEM_END_1 0x98 /* Banks 0-3 */
-#define MPC10X_MCTLR_EXT_MEM_END_2 0x9c /* Banks 4-7 */
-
-#define MPC10X_MCTLR_MEM_BANK_ENABLES 0xa0
-
-/* Define some offset in the EUMB */
-#define MPC10X_EUMB_SIZE 0x00100000 /* Total EUMB size (1MB) */
-
-#define MPC10X_EUMB_MU_OFFSET 0x00000000 /* Msg Unit reg offset */
-#define MPC10X_EUMB_MU_SIZE 0x00001000 /* Msg Unit reg size */
-#define MPC10X_EUMB_DMA_OFFSET 0x00001000 /* DMA Unit reg offset */
-#define MPC10X_EUMB_DMA_SIZE 0x00001000 /* DMA Unit reg size */
-#define MPC10X_EUMB_ATU_OFFSET 0x00002000 /* Addr xlate reg offset */
-#define MPC10X_EUMB_ATU_SIZE 0x00001000 /* Addr xlate reg size */
-#define MPC10X_EUMB_I2C_OFFSET 0x00003000 /* I2C Unit reg offset */
-#define MPC10X_EUMB_I2C_SIZE 0x00001000 /* I2C Unit reg size */
-#define MPC10X_EUMB_DUART_OFFSET 0x00004000 /* DUART Unit reg offset (8245) */
-#define MPC10X_EUMB_DUART_SIZE 0x00001000 /* DUART Unit reg size (8245) */
-#define MPC10X_EUMB_EPIC_OFFSET 0x00040000 /* EPIC offset in EUMB */
-#define MPC10X_EUMB_EPIC_SIZE 0x00030000 /* EPIC size */
-#define MPC10X_EUMB_PM_OFFSET 0x000fe000 /* Performance Monitor reg offset (8245) */
-#define MPC10X_EUMB_PM_SIZE 0x00001000 /* Performance Monitor reg size (8245) */
-#define MPC10X_EUMB_WP_OFFSET 0x000ff000 /* Data path diagnostic, watchpoint reg offset */
-#define MPC10X_EUMB_WP_SIZE 0x00001000 /* Data path diagnostic, watchpoint reg size */
-
-/*
- * Define some recommended places to put the EUMB regs.
- * For both maps, recommend putting the EUMB from 0xeff00000 to 0xefffffff.
- */
-extern unsigned long ioremap_base;
-#define MPC10X_MAPA_EUMB_BASE (ioremap_base - MPC10X_EUMB_SIZE)
-#define MPC10X_MAPB_EUMB_BASE MPC10X_MAPA_EUMB_BASE
-
-enum ppc_sys_devices {
- MPC10X_IIC1,
- MPC10X_DMA0,
- MPC10X_DMA1,
- MPC10X_UART0,
- MPC10X_UART1,
- NUM_PPC_SYS_DEVS,
-};
-
-int mpc10x_bridge_init(struct pci_controller *hose,
- uint current_map,
- uint new_map,
- uint phys_eumb_base);
-unsigned long mpc10x_get_mem_size(uint mem_map);
-int mpc10x_enable_store_gathering(struct pci_controller *hose);
-int mpc10x_disable_store_gathering(struct pci_controller *hose);
-
-/* For MPC107 boards that use the built-in openpic */
-void mpc10x_set_openpic(void);
-
-#endif /* __PPC_KERNEL_MPC10X_H */
diff --git a/include/asm-ppc/mpc52xx.h b/include/asm-ppc/mpc52xx.h
deleted file mode 100644
index d9d21aa..0000000
--- a/include/asm-ppc/mpc52xx.h
+++ /dev/null
@@ -1,450 +0,0 @@
-/*
- * include/asm-ppc/mpc52xx.h
- *
- * Prototypes, etc. for the Freescale MPC52xx embedded cpu chips
- * May need to be cleaned as the port goes on ...
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Originally written by Dale Farnsworth <dfarnsworth@mvista.com>
- * for the 2.4 kernel.
- *
- * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
- * Copyright (C) 2003 MontaVista, Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifndef __ASM_MPC52xx_H__
-#define __ASM_MPC52xx_H__
-
-#ifndef __ASSEMBLY__
-#include <asm/ppcboot.h>
-#include <asm/types.h>
-
-struct pt_regs;
-#endif /* __ASSEMBLY__ */
-
-
-/* ======================================================================== */
-/* PPC Sys devices definition */
-/* ======================================================================== */
-
-enum ppc_sys_devices {
- MPC52xx_MSCAN1,
- MPC52xx_MSCAN2,
- MPC52xx_SPI,
- MPC52xx_USB,
- MPC52xx_BDLC,
- MPC52xx_PSC1,
- MPC52xx_PSC2,
- MPC52xx_PSC3,
- MPC52xx_PSC4,
- MPC52xx_PSC5,
- MPC52xx_PSC6,
- MPC52xx_FEC,
- MPC52xx_ATA,
- MPC52xx_I2C1,
- MPC52xx_I2C2,
- NUM_PPC_SYS_DEVS,
-};
-
-
-/* ======================================================================== */
-/* Main registers/struct addresses */
-/* ======================================================================== */
-
-/* MBAR position */
-#define MPC52xx_MBAR 0xf0000000 /* Phys address */
-#define MPC52xx_MBAR_VIRT 0xf0000000 /* Virt address */
-#define MPC52xx_MBAR_SIZE 0x00010000
-
-#define MPC52xx_PA(x) ((phys_addr_t)(MPC52xx_MBAR + (x)))
-#define MPC52xx_VA(x) ((void __iomem *)(MPC52xx_MBAR_VIRT + (x)))
-
-/* Registers zone offset/size */
-#define MPC52xx_MMAP_CTL_OFFSET 0x0000
-#define MPC52xx_MMAP_CTL_SIZE 0x068
-#define MPC52xx_SDRAM_OFFSET 0x0100
-#define MPC52xx_SDRAM_SIZE 0x010
-#define MPC52xx_CDM_OFFSET 0x0200
-#define MPC52xx_CDM_SIZE 0x038
-#define MPC52xx_INTR_OFFSET 0x0500
-#define MPC52xx_INTR_SIZE 0x04c
-#define MPC52xx_GPTx_OFFSET(x) (0x0600 + ((x)<<4))
-#define MPC52xx_GPT_SIZE 0x010
-#define MPC52xx_RTC_OFFSET 0x0800
-#define MPC52xx_RTC_SIZE 0x024
-#define MPC52xx_GPIO_OFFSET 0x0b00
-#define MPC52xx_GPIO_SIZE 0x040
-#define MPC52xx_GPIO_WKUP_OFFSET 0x0c00
-#define MPC52xx_GPIO_WKUP_SIZE 0x028
-#define MPC52xx_PCI_OFFSET 0x0d00
-#define MPC52xx_PCI_SIZE 0x100
-#define MPC52xx_SDMA_OFFSET 0x1200
-#define MPC52xx_SDMA_SIZE 0x100
-#define MPC52xx_XLB_OFFSET 0x1f00
-#define MPC52xx_XLB_SIZE 0x100
-#define MPC52xx_PSCx_OFFSET(x) (((x)!=6)?(0x1e00+((x)<<9)):0x2c00)
-#define MPC52xx_PSC_SIZE 0x0a0
-
-/* SRAM used for SDMA */
-#define MPC52xx_SRAM_OFFSET 0x8000
-#define MPC52xx_SRAM_SIZE 0x4000
-
-
-/* ======================================================================== */
-/* IRQ mapping */
-/* ======================================================================== */
-/* Be sure to look at mpc52xx_pic.h if you wish for whatever reason to change
- * this
- */
-
-#define MPC52xx_CRIT_IRQ_NUM 4
-#define MPC52xx_MAIN_IRQ_NUM 17
-#define MPC52xx_SDMA_IRQ_NUM 17
-#define MPC52xx_PERP_IRQ_NUM 23
-
-#define MPC52xx_CRIT_IRQ_BASE 1
-#define MPC52xx_MAIN_IRQ_BASE (MPC52xx_CRIT_IRQ_BASE + MPC52xx_CRIT_IRQ_NUM)
-#define MPC52xx_SDMA_IRQ_BASE (MPC52xx_MAIN_IRQ_BASE + MPC52xx_MAIN_IRQ_NUM)
-#define MPC52xx_PERP_IRQ_BASE (MPC52xx_SDMA_IRQ_BASE + MPC52xx_SDMA_IRQ_NUM)
-
-#define MPC52xx_IRQ0 (MPC52xx_CRIT_IRQ_BASE + 0)
-#define MPC52xx_SLICE_TIMER_0_IRQ (MPC52xx_CRIT_IRQ_BASE + 1)
-#define MPC52xx_HI_INT_IRQ (MPC52xx_CRIT_IRQ_BASE + 2)
-#define MPC52xx_CCS_IRQ (MPC52xx_CRIT_IRQ_BASE + 3)
-
-#define MPC52xx_IRQ1 (MPC52xx_MAIN_IRQ_BASE + 1)
-#define MPC52xx_IRQ2 (MPC52xx_MAIN_IRQ_BASE + 2)
-#define MPC52xx_IRQ3 (MPC52xx_MAIN_IRQ_BASE + 3)
-
-#define MPC52xx_SDMA_IRQ (MPC52xx_PERP_IRQ_BASE + 0)
-#define MPC52xx_PSC1_IRQ (MPC52xx_PERP_IRQ_BASE + 1)
-#define MPC52xx_PSC2_IRQ (MPC52xx_PERP_IRQ_BASE + 2)
-#define MPC52xx_PSC3_IRQ (MPC52xx_PERP_IRQ_BASE + 3)
-#define MPC52xx_PSC6_IRQ (MPC52xx_PERP_IRQ_BASE + 4)
-#define MPC52xx_IRDA_IRQ (MPC52xx_PERP_IRQ_BASE + 4)
-#define MPC52xx_FEC_IRQ (MPC52xx_PERP_IRQ_BASE + 5)
-#define MPC52xx_USB_IRQ (MPC52xx_PERP_IRQ_BASE + 6)
-#define MPC52xx_ATA_IRQ (MPC52xx_PERP_IRQ_BASE + 7)
-#define MPC52xx_PCI_CNTRL_IRQ (MPC52xx_PERP_IRQ_BASE + 8)
-#define MPC52xx_PCI_SCIRX_IRQ (MPC52xx_PERP_IRQ_BASE + 9)
-#define MPC52xx_PCI_SCITX_IRQ (MPC52xx_PERP_IRQ_BASE + 10)
-#define MPC52xx_PSC4_IRQ (MPC52xx_PERP_IRQ_BASE + 11)
-#define MPC52xx_PSC5_IRQ (MPC52xx_PERP_IRQ_BASE + 12)
-#define MPC52xx_SPI_MODF_IRQ (MPC52xx_PERP_IRQ_BASE + 13)
-#define MPC52xx_SPI_SPIF_IRQ (MPC52xx_PERP_IRQ_BASE + 14)
-#define MPC52xx_I2C1_IRQ (MPC52xx_PERP_IRQ_BASE + 15)
-#define MPC52xx_I2C2_IRQ (MPC52xx_PERP_IRQ_BASE + 16)
-#define MPC52xx_MSCAN1_IRQ (MPC52xx_PERP_IRQ_BASE + 17)
-#define MPC52xx_MSCAN2_IRQ (MPC52xx_PERP_IRQ_BASE + 18)
-#define MPC52xx_IR_RX_IRQ (MPC52xx_PERP_IRQ_BASE + 19)
-#define MPC52xx_IR_TX_IRQ (MPC52xx_PERP_IRQ_BASE + 20)
-#define MPC52xx_XLB_ARB_IRQ (MPC52xx_PERP_IRQ_BASE + 21)
-#define MPC52xx_BDLC_IRQ (MPC52xx_PERP_IRQ_BASE + 22)
-
-
-
-/* ======================================================================== */
-/* Structures mapping of some unit register set */
-/* ======================================================================== */
-
-#ifndef __ASSEMBLY__
-
-/* Memory Mapping Control */
-struct mpc52xx_mmap_ctl {
- u32 mbar; /* MMAP_CTRL + 0x00 */
-
- u32 cs0_start; /* MMAP_CTRL + 0x04 */
- u32 cs0_stop; /* MMAP_CTRL + 0x08 */
- u32 cs1_start; /* MMAP_CTRL + 0x0c */
- u32 cs1_stop; /* MMAP_CTRL + 0x10 */
- u32 cs2_start; /* MMAP_CTRL + 0x14 */
- u32 cs2_stop; /* MMAP_CTRL + 0x18 */
- u32 cs3_start; /* MMAP_CTRL + 0x1c */
- u32 cs3_stop; /* MMAP_CTRL + 0x20 */
- u32 cs4_start; /* MMAP_CTRL + 0x24 */
- u32 cs4_stop; /* MMAP_CTRL + 0x28 */
- u32 cs5_start; /* MMAP_CTRL + 0x2c */
- u32 cs5_stop; /* MMAP_CTRL + 0x30 */
-
- u32 sdram0; /* MMAP_CTRL + 0x34 */
- u32 sdram1; /* MMAP_CTRL + 0X38 */
-
- u32 reserved[4]; /* MMAP_CTRL + 0x3c .. 0x48 */
-
- u32 boot_start; /* MMAP_CTRL + 0x4c */
- u32 boot_stop; /* MMAP_CTRL + 0x50 */
-
- u32 ipbi_ws_ctrl; /* MMAP_CTRL + 0x54 */
-
- u32 cs6_start; /* MMAP_CTRL + 0x58 */
- u32 cs6_stop; /* MMAP_CTRL + 0x5c */
- u32 cs7_start; /* MMAP_CTRL + 0x60 */
- u32 cs7_stop; /* MMAP_CTRL + 0x64 */
-};
-
-/* SDRAM control */
-struct mpc52xx_sdram {
- u32 mode; /* SDRAM + 0x00 */
- u32 ctrl; /* SDRAM + 0x04 */
- u32 config1; /* SDRAM + 0x08 */
- u32 config2; /* SDRAM + 0x0c */
-};
-
-/* Interrupt controller */
-struct mpc52xx_intr {
- u32 per_mask; /* INTR + 0x00 */
- u32 per_pri1; /* INTR + 0x04 */
- u32 per_pri2; /* INTR + 0x08 */
- u32 per_pri3; /* INTR + 0x0c */
- u32 ctrl; /* INTR + 0x10 */
- u32 main_mask; /* INTR + 0x14 */
- u32 main_pri1; /* INTR + 0x18 */
- u32 main_pri2; /* INTR + 0x1c */
- u32 reserved1; /* INTR + 0x20 */
- u32 enc_status; /* INTR + 0x24 */
- u32 crit_status; /* INTR + 0x28 */
- u32 main_status; /* INTR + 0x2c */
- u32 per_status; /* INTR + 0x30 */
- u32 reserved2; /* INTR + 0x34 */
- u32 per_error; /* INTR + 0x38 */
-};
-
-/* SDMA */
-struct mpc52xx_sdma {
- u32 taskBar; /* SDMA + 0x00 */
- u32 currentPointer; /* SDMA + 0x04 */
- u32 endPointer; /* SDMA + 0x08 */
- u32 variablePointer;/* SDMA + 0x0c */
-
- u8 IntVect1; /* SDMA + 0x10 */
- u8 IntVect2; /* SDMA + 0x11 */
- u16 PtdCntrl; /* SDMA + 0x12 */
-
- u32 IntPend; /* SDMA + 0x14 */
- u32 IntMask; /* SDMA + 0x18 */
-
- u16 tcr[16]; /* SDMA + 0x1c .. 0x3a */
-
- u8 ipr[32]; /* SDMA + 0x3c .. 0x5b */
-
- u32 cReqSelect; /* SDMA + 0x5c */
- u32 task_size0; /* SDMA + 0x60 */
- u32 task_size1; /* SDMA + 0x64 */
- u32 MDEDebug; /* SDMA + 0x68 */
- u32 ADSDebug; /* SDMA + 0x6c */
- u32 Value1; /* SDMA + 0x70 */
- u32 Value2; /* SDMA + 0x74 */
- u32 Control; /* SDMA + 0x78 */
- u32 Status; /* SDMA + 0x7c */
- u32 PTDDebug; /* SDMA + 0x80 */
-};
-
-/* GPT */
-struct mpc52xx_gpt {
- u32 mode; /* GPTx + 0x00 */
- u32 count; /* GPTx + 0x04 */
- u32 pwm; /* GPTx + 0x08 */
- u32 status; /* GPTx + 0X0c */
-};
-
-/* RTC */
-struct mpc52xx_rtc {
- u32 time_set; /* RTC + 0x00 */
- u32 date_set; /* RTC + 0x04 */
- u32 stopwatch; /* RTC + 0x08 */
- u32 int_enable; /* RTC + 0x0c */
- u32 time; /* RTC + 0x10 */
- u32 date; /* RTC + 0x14 */
- u32 stopwatch_intr; /* RTC + 0x18 */
- u32 bus_error; /* RTC + 0x1c */
- u32 dividers; /* RTC + 0x20 */
-};
-
-/* GPIO */
-struct mpc52xx_gpio {
- u32 port_config; /* GPIO + 0x00 */
- u32 simple_gpioe; /* GPIO + 0x04 */
- u32 simple_ode; /* GPIO + 0x08 */
- u32 simple_ddr; /* GPIO + 0x0c */
- u32 simple_dvo; /* GPIO + 0x10 */
- u32 simple_ival; /* GPIO + 0x14 */
- u8 outo_gpioe; /* GPIO + 0x18 */
- u8 reserved1[3]; /* GPIO + 0x19 */
- u8 outo_dvo; /* GPIO + 0x1c */
- u8 reserved2[3]; /* GPIO + 0x1d */
- u8 sint_gpioe; /* GPIO + 0x20 */
- u8 reserved3[3]; /* GPIO + 0x21 */
- u8 sint_ode; /* GPIO + 0x24 */
- u8 reserved4[3]; /* GPIO + 0x25 */
- u8 sint_ddr; /* GPIO + 0x28 */
- u8 reserved5[3]; /* GPIO + 0x29 */
- u8 sint_dvo; /* GPIO + 0x2c */
- u8 reserved6[3]; /* GPIO + 0x2d */
- u8 sint_inten; /* GPIO + 0x30 */
- u8 reserved7[3]; /* GPIO + 0x31 */
- u16 sint_itype; /* GPIO + 0x34 */
- u16 reserved8; /* GPIO + 0x36 */
- u8 gpio_control; /* GPIO + 0x38 */
- u8 reserved9[3]; /* GPIO + 0x39 */
- u8 sint_istat; /* GPIO + 0x3c */
- u8 sint_ival; /* GPIO + 0x3d */
- u8 bus_errs; /* GPIO + 0x3e */
- u8 reserved10; /* GPIO + 0x3f */
-};
-
-#define MPC52xx_GPIO_PSC_CONFIG_UART_WITHOUT_CD 4
-#define MPC52xx_GPIO_PSC_CONFIG_UART_WITH_CD 5
-#define MPC52xx_GPIO_PCI_DIS (1<<15)
-
-/* GPIO with WakeUp*/
-struct mpc52xx_gpio_wkup {
- u8 wkup_gpioe; /* GPIO_WKUP + 0x00 */
- u8 reserved1[3]; /* GPIO_WKUP + 0x03 */
- u8 wkup_ode; /* GPIO_WKUP + 0x04 */
- u8 reserved2[3]; /* GPIO_WKUP + 0x05 */
- u8 wkup_ddr; /* GPIO_WKUP + 0x08 */
- u8 reserved3[3]; /* GPIO_WKUP + 0x09 */
- u8 wkup_dvo; /* GPIO_WKUP + 0x0C */
- u8 reserved4[3]; /* GPIO_WKUP + 0x0D */
- u8 wkup_inten; /* GPIO_WKUP + 0x10 */
- u8 reserved5[3]; /* GPIO_WKUP + 0x11 */
- u8 wkup_iinten; /* GPIO_WKUP + 0x14 */
- u8 reserved6[3]; /* GPIO_WKUP + 0x15 */
- u16 wkup_itype; /* GPIO_WKUP + 0x18 */
- u8 reserved7[2]; /* GPIO_WKUP + 0x1A */
- u8 wkup_maste; /* GPIO_WKUP + 0x1C */
- u8 reserved8[3]; /* GPIO_WKUP + 0x1D */
- u8 wkup_ival; /* GPIO_WKUP + 0x20 */
- u8 reserved9[3]; /* GPIO_WKUP + 0x21 */
- u8 wkup_istat; /* GPIO_WKUP + 0x24 */
- u8 reserved10[3]; /* GPIO_WKUP + 0x25 */
-};
-
-/* XLB Bus control */
-struct mpc52xx_xlb {
- u8 reserved[0x40];
- u32 config; /* XLB + 0x40 */
- u32 version; /* XLB + 0x44 */
- u32 status; /* XLB + 0x48 */
- u32 int_enable; /* XLB + 0x4c */
- u32 addr_capture; /* XLB + 0x50 */
- u32 bus_sig_capture; /* XLB + 0x54 */
- u32 addr_timeout; /* XLB + 0x58 */
- u32 data_timeout; /* XLB + 0x5c */
- u32 bus_act_timeout; /* XLB + 0x60 */
- u32 master_pri_enable; /* XLB + 0x64 */
- u32 master_priority; /* XLB + 0x68 */
- u32 base_address; /* XLB + 0x6c */
- u32 snoop_window; /* XLB + 0x70 */
-};
-
-#define MPC52xx_XLB_CFG_PLDIS (1 << 31)
-#define MPC52xx_XLB_CFG_SNOOP (1 << 15)
-
-/* Clock Distribution control */
-struct mpc52xx_cdm {
- u32 jtag_id; /* CDM + 0x00 reg0 read only */
- u32 rstcfg; /* CDM + 0x04 reg1 read only */
- u32 breadcrumb; /* CDM + 0x08 reg2 */
-
- u8 mem_clk_sel; /* CDM + 0x0c reg3 byte0 */
- u8 xlb_clk_sel; /* CDM + 0x0d reg3 byte1 read only */
- u8 ipb_clk_sel; /* CDM + 0x0e reg3 byte2 */
- u8 pci_clk_sel; /* CDM + 0x0f reg3 byte3 */
-
- u8 ext_48mhz_en; /* CDM + 0x10 reg4 byte0 */
- u8 fd_enable; /* CDM + 0x11 reg4 byte1 */
- u16 fd_counters; /* CDM + 0x12 reg4 byte2,3 */
-
- u32 clk_enables; /* CDM + 0x14 reg5 */
-
- u8 osc_disable; /* CDM + 0x18 reg6 byte0 */
- u8 reserved0[3]; /* CDM + 0x19 reg6 byte1,2,3 */
-
- u8 ccs_sleep_enable; /* CDM + 0x1c reg7 byte0 */
- u8 osc_sleep_enable; /* CDM + 0x1d reg7 byte1 */
- u8 reserved1; /* CDM + 0x1e reg7 byte2 */
- u8 ccs_qreq_test; /* CDM + 0x1f reg7 byte3 */
-
- u8 soft_reset; /* CDM + 0x20 u8 byte0 */
- u8 no_ckstp; /* CDM + 0x21 u8 byte0 */
- u8 reserved2[2]; /* CDM + 0x22 u8 byte1,2,3 */
-
- u8 pll_lock; /* CDM + 0x24 reg9 byte0 */
- u8 pll_looselock; /* CDM + 0x25 reg9 byte1 */
- u8 pll_sm_lockwin; /* CDM + 0x26 reg9 byte2 */
- u8 reserved3; /* CDM + 0x27 reg9 byte3 */
-
- u16 reserved4; /* CDM + 0x28 reg10 byte0,1 */
- u16 mclken_div_psc1; /* CDM + 0x2a reg10 byte2,3 */
-
- u16 reserved5; /* CDM + 0x2c reg11 byte0,1 */
- u16 mclken_div_psc2; /* CDM + 0x2e reg11 byte2,3 */
-
- u16 reserved6; /* CDM + 0x30 reg12 byte0,1 */
- u16 mclken_div_psc3; /* CDM + 0x32 reg12 byte2,3 */
-
- u16 reserved7; /* CDM + 0x34 reg13 byte0,1 */
- u16 mclken_div_psc6; /* CDM + 0x36 reg13 byte2,3 */
-};
-
-#endif /* __ASSEMBLY__ */
-
-
-/* ========================================================================= */
-/* Prototypes for MPC52xx syslib */
-/* ========================================================================= */
-
-#ifndef __ASSEMBLY__
-
-extern void mpc52xx_init_irq(void);
-extern int mpc52xx_get_irq(void);
-
-extern unsigned long mpc52xx_find_end_of_memory(void);
-extern void mpc52xx_set_bat(void);
-extern void mpc52xx_map_io(void);
-extern void mpc52xx_restart(char *cmd);
-extern void mpc52xx_halt(void);
-extern void mpc52xx_power_off(void);
-extern void mpc52xx_progress(char *s, unsigned short hex);
-extern void mpc52xx_calibrate_decr(void);
-
-extern void mpc52xx_find_bridges(void);
-
-extern void mpc52xx_setup_cpu(void);
-
-
-
- /* Matching of PSC function */
-struct mpc52xx_psc_func {
- int id;
- char *func;
-};
-
-extern int mpc52xx_match_psc_function(int psc_idx, const char *func);
-extern struct mpc52xx_psc_func mpc52xx_psc_functions[];
- /* This array is to be defined in platform file */
-
-#endif /* __ASSEMBLY__ */
-
-
-/* ========================================================================= */
-/* Platform configuration */
-/* ========================================================================= */
-
-/* The U-Boot platform information struct */
-extern bd_t __res;
-
-/* Platform options */
-#if defined(CONFIG_LITE5200)
-#include <platforms/lite5200.h>
-#endif
-
-
-#endif /* __ASM_MPC52xx_H__ */
diff --git a/include/asm-ppc/mpc52xx_psc.h b/include/asm-ppc/mpc52xx_psc.h
deleted file mode 100644
index 39fcd02..0000000
--- a/include/asm-ppc/mpc52xx_psc.h
+++ /dev/null
@@ -1,200 +0,0 @@
-/*
- * include/asm-ppc/mpc52xx_psc.h
- *
- * Definitions of consts/structs to drive the Freescale MPC52xx OnChip
- * PSCs. Theses are shared between multiple drivers since a PSC can be
- * UART, AC97, IR, I2S, ... So this header is in asm-ppc.
- *
- *
- * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- *
- * Based/Extracted from some header of the 2.4 originally written by
- * Dale Farnsworth <dfarnsworth@mvista.com>
- *
- * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
- * Copyright (C) 2003 MontaVista, Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifndef __ASM_MPC52xx_PSC_H__
-#define __ASM_MPC52xx_PSC_H__
-
-#include <asm/types.h>
-
-/* Max number of PSCs */
-#define MPC52xx_PSC_MAXNUM 6
-
-/* Programmable Serial Controller (PSC) status register bits */
-#define MPC52xx_PSC_SR_UNEX_RX 0x0001
-#define MPC52xx_PSC_SR_DATA_VAL 0x0002
-#define MPC52xx_PSC_SR_DATA_OVR 0x0004
-#define MPC52xx_PSC_SR_CMDSEND 0x0008
-#define MPC52xx_PSC_SR_CDE 0x0080
-#define MPC52xx_PSC_SR_RXRDY 0x0100
-#define MPC52xx_PSC_SR_RXFULL 0x0200
-#define MPC52xx_PSC_SR_TXRDY 0x0400
-#define MPC52xx_PSC_SR_TXEMP 0x0800
-#define MPC52xx_PSC_SR_OE 0x1000
-#define MPC52xx_PSC_SR_PE 0x2000
-#define MPC52xx_PSC_SR_FE 0x4000
-#define MPC52xx_PSC_SR_RB 0x8000
-
-/* PSC Command values */
-#define MPC52xx_PSC_RX_ENABLE 0x0001
-#define MPC52xx_PSC_RX_DISABLE 0x0002
-#define MPC52xx_PSC_TX_ENABLE 0x0004
-#define MPC52xx_PSC_TX_DISABLE 0x0008
-#define MPC52xx_PSC_SEL_MODE_REG_1 0x0010
-#define MPC52xx_PSC_RST_RX 0x0020
-#define MPC52xx_PSC_RST_TX 0x0030
-#define MPC52xx_PSC_RST_ERR_STAT 0x0040
-#define MPC52xx_PSC_RST_BRK_CHG_INT 0x0050
-#define MPC52xx_PSC_START_BRK 0x0060
-#define MPC52xx_PSC_STOP_BRK 0x0070
-
-/* PSC TxRx FIFO status bits */
-#define MPC52xx_PSC_RXTX_FIFO_ERR 0x0040
-#define MPC52xx_PSC_RXTX_FIFO_UF 0x0020
-#define MPC52xx_PSC_RXTX_FIFO_OF 0x0010
-#define MPC52xx_PSC_RXTX_FIFO_FR 0x0008
-#define MPC52xx_PSC_RXTX_FIFO_FULL 0x0004
-#define MPC52xx_PSC_RXTX_FIFO_ALARM 0x0002
-#define MPC52xx_PSC_RXTX_FIFO_EMPTY 0x0001
-
-/* PSC interrupt mask bits */
-#define MPC52xx_PSC_IMR_TXRDY 0x0100
-#define MPC52xx_PSC_IMR_RXRDY 0x0200
-#define MPC52xx_PSC_IMR_DB 0x0400
-#define MPC52xx_PSC_IMR_IPC 0x8000
-
-/* PSC input port change bit */
-#define MPC52xx_PSC_CTS 0x01
-#define MPC52xx_PSC_DCD 0x02
-#define MPC52xx_PSC_D_CTS 0x10
-#define MPC52xx_PSC_D_DCD 0x20
-
-/* PSC mode fields */
-#define MPC52xx_PSC_MODE_5_BITS 0x00
-#define MPC52xx_PSC_MODE_6_BITS 0x01
-#define MPC52xx_PSC_MODE_7_BITS 0x02
-#define MPC52xx_PSC_MODE_8_BITS 0x03
-#define MPC52xx_PSC_MODE_BITS_MASK 0x03
-#define MPC52xx_PSC_MODE_PAREVEN 0x00
-#define MPC52xx_PSC_MODE_PARODD 0x04
-#define MPC52xx_PSC_MODE_PARFORCE 0x08
-#define MPC52xx_PSC_MODE_PARNONE 0x10
-#define MPC52xx_PSC_MODE_ERR 0x20
-#define MPC52xx_PSC_MODE_FFULL 0x40
-#define MPC52xx_PSC_MODE_RXRTS 0x80
-
-#define MPC52xx_PSC_MODE_ONE_STOP_5_BITS 0x00
-#define MPC52xx_PSC_MODE_ONE_STOP 0x07
-#define MPC52xx_PSC_MODE_TWO_STOP 0x0f
-
-#define MPC52xx_PSC_RFNUM_MASK 0x01ff
-
-
-/* Structure of the hardware registers */
-struct mpc52xx_psc {
- u8 mode; /* PSC + 0x00 */
- u8 reserved0[3];
- union { /* PSC + 0x04 */
- u16 status;
- u16 clock_select;
- } sr_csr;
-#define mpc52xx_psc_status sr_csr.status
-#define mpc52xx_psc_clock_select sr_csr.clock_select
- u16 reserved1;
- u8 command; /* PSC + 0x08 */
- u8 reserved2[3];
- union { /* PSC + 0x0c */
- u8 buffer_8;
- u16 buffer_16;
- u32 buffer_32;
- } buffer;
-#define mpc52xx_psc_buffer_8 buffer.buffer_8
-#define mpc52xx_psc_buffer_16 buffer.buffer_16
-#define mpc52xx_psc_buffer_32 buffer.buffer_32
- union { /* PSC + 0x10 */
- u8 ipcr;
- u8 acr;
- } ipcr_acr;
-#define mpc52xx_psc_ipcr ipcr_acr.ipcr
-#define mpc52xx_psc_acr ipcr_acr.acr
- u8 reserved3[3];
- union { /* PSC + 0x14 */
- u16 isr;
- u16 imr;
- } isr_imr;
-#define mpc52xx_psc_isr isr_imr.isr
-#define mpc52xx_psc_imr isr_imr.imr
- u16 reserved4;
- u8 ctur; /* PSC + 0x18 */
- u8 reserved5[3];
- u8 ctlr; /* PSC + 0x1c */
- u8 reserved6[3];
- u32 ccr; /* PSC + 0x20 */
- u32 ac97_slots; /* PSC + 0x24 */
- u32 ac97_cmd; /* PSC + 0x28 */
- u32 ac97_data; /* PSC + 0x2c */
- u8 ivr; /* PSC + 0x30 */
- u8 reserved8[3];
- u8 ip; /* PSC + 0x34 */
- u8 reserved9[3];
- u8 op1; /* PSC + 0x38 */
- u8 reserved10[3];
- u8 op0; /* PSC + 0x3c */
- u8 reserved11[3];
- u32 sicr; /* PSC + 0x40 */
- u8 ircr1; /* PSC + 0x44 */
- u8 reserved13[3];
- u8 ircr2; /* PSC + 0x44 */
- u8 reserved14[3];
- u8 irsdr; /* PSC + 0x4c */
- u8 reserved15[3];
- u8 irmdr; /* PSC + 0x50 */
- u8 reserved16[3];
- u8 irfdr; /* PSC + 0x54 */
- u8 reserved17[3];
-};
-
-struct mpc52xx_psc_fifo {
- u16 rfnum; /* PSC + 0x58 */
- u16 reserved18;
- u16 tfnum; /* PSC + 0x5c */
- u16 reserved19;
- u32 rfdata; /* PSC + 0x60 */
- u16 rfstat; /* PSC + 0x64 */
- u16 reserved20;
- u8 rfcntl; /* PSC + 0x68 */
- u8 reserved21[5];
- u16 rfalarm; /* PSC + 0x6e */
- u16 reserved22;
- u16 rfrptr; /* PSC + 0x72 */
- u16 reserved23;
- u16 rfwptr; /* PSC + 0x76 */
- u16 reserved24;
- u16 rflrfptr; /* PSC + 0x7a */
- u16 reserved25;
- u16 rflwfptr; /* PSC + 0x7e */
- u32 tfdata; /* PSC + 0x80 */
- u16 tfstat; /* PSC + 0x84 */
- u16 reserved26;
- u8 tfcntl; /* PSC + 0x88 */
- u8 reserved27[5];
- u16 tfalarm; /* PSC + 0x8e */
- u16 reserved28;
- u16 tfrptr; /* PSC + 0x92 */
- u16 reserved29;
- u16 tfwptr; /* PSC + 0x96 */
- u16 reserved30;
- u16 tflrfptr; /* PSC + 0x9a */
- u16 reserved31;
- u16 tflwfptr; /* PSC + 0x9e */
-};
-
-
-#endif /* __ASM_MPC52xx_PSC_H__ */
diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
deleted file mode 100644
index 402ba15..0000000
--- a/include/asm-ppc/mpc8260.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * Since there are many different boards and no standard configuration,
- * we have a unique include file for each. Rather than change every
- * file that has to include MPC8260 configuration, they all include
- * this one and the configuration switching is done here.
- */
-#ifdef __KERNEL__
-#ifndef __ASM_PPC_MPC8260_H__
-#define __ASM_PPC_MPC8260_H__
-
-
-#ifdef CONFIG_8260
-
-#ifdef CONFIG_EST8260
-#include <platforms/est8260.h>
-#endif
-
-#ifdef CONFIG_SBC82xx
-#include <platforms/sbc82xx.h>
-#endif
-
-#ifdef CONFIG_SBS8260
-#include <platforms/sbs8260.h>
-#endif
-
-#ifdef CONFIG_RPX8260
-#include <platforms/rpx8260.h>
-#endif
-
-#ifdef CONFIG_WILLOW
-#include <platforms/willow.h>
-#endif
-
-#ifdef CONFIG_TQM8260
-#include <platforms/tqm8260.h>
-#endif
-
-#ifdef CONFIG_PCI_8260
-#include <syslib/m82xx_pci.h>
-#endif
-
-/* Make sure the memory translation stuff is there if PCI not used.
- */
-#ifndef _IO_BASE
-#define _IO_BASE 0
-#endif
-
-#ifndef _ISA_MEM_BASE
-#define _ISA_MEM_BASE 0
-#endif
-
-#ifndef PCI_DRAM_OFFSET
-#define PCI_DRAM_OFFSET 0
-#endif
-
-/* Map 256MB I/O region
- */
-#ifndef IO_PHYS_ADDR
-#define IO_PHYS_ADDR 0xe0000000
-#endif
-#ifndef IO_VIRT_ADDR
-#define IO_VIRT_ADDR IO_PHYS_ADDR
-#endif
-
-enum ppc_sys_devices {
- MPC82xx_CPM_FCC1,
- MPC82xx_CPM_FCC2,
- MPC82xx_CPM_FCC3,
- MPC82xx_CPM_I2C,
- MPC82xx_CPM_SCC1,
- MPC82xx_CPM_SCC2,
- MPC82xx_CPM_SCC3,
- MPC82xx_CPM_SCC4,
- MPC82xx_CPM_SPI,
- MPC82xx_CPM_MCC1,
- MPC82xx_CPM_MCC2,
- MPC82xx_CPM_SMC1,
- MPC82xx_CPM_SMC2,
- MPC82xx_CPM_USB,
- MPC82xx_SEC1,
- MPC82xx_MDIO_BB,
- NUM_PPC_SYS_DEVS,
-};
-
-#ifndef __ASSEMBLY__
-/* The "residual" data board information structure the boot loader
- * hands to us.
- */
-extern unsigned char __res[];
-#endif
-
-#ifndef BOARD_CHIP_NAME
-#define BOARD_CHIP_NAME ""
-#endif
-
-#endif /* CONFIG_8260 */
-#endif /* !__ASM_PPC_MPC8260_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mpc8260_pci9.h b/include/asm-ppc/mpc8260_pci9.h
deleted file mode 100644
index 9f71768..0000000
--- a/include/asm-ppc/mpc8260_pci9.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/* include/asm-ppc/mpc8260_pci9.h
- *
- * Undefine the PCI read* and in* macros so we can define them as functions
- * that implement the workaround for the MPC8260 device erratum PCI 9.
- *
- * This header file should only be included at the end of include/asm-ppc/io.h
- * and never included directly anywhere else.
- *
- * Author: andy_lowe@mvista.com
- *
- * 2003 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef _PPC_IO_H
-#error "Do not include mpc8260_pci9.h directly."
-#endif
-
-#ifdef __KERNEL__
-#ifndef __CONFIG_8260_PCI9_DEFS
-#define __CONFIG_8260_PCI9_DEFS
-
-#undef readb
-#undef readw
-#undef readl
-#undef insb
-#undef insw
-#undef insl
-#undef inb
-#undef inw
-#undef inl
-#undef memcpy_fromio
-
-extern int readb(volatile unsigned char *addr);
-extern int readw(volatile unsigned short *addr);
-extern unsigned readl(volatile unsigned *addr);
-extern void insb(unsigned port, void *buf, int ns);
-extern void insw(unsigned port, void *buf, int ns);
-extern void insl(unsigned port, void *buf, int nl);
-extern int inb(unsigned port);
-extern int inw(unsigned port);
-extern unsigned inl(unsigned port);
-extern void *memcpy_fromio(void *dest, unsigned long src, size_t count);
-
-#endif /* !__CONFIG_8260_PCI9_DEFS */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
deleted file mode 100644
index b9e3060..0000000
--- a/include/asm-ppc/mpc8xx.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/* This is the single file included by all MPC8xx build options.
- * Since there are many different boards and no standard configuration,
- * we have a unique include file for each. Rather than change every
- * file that has to include MPC8xx configuration, they all include
- * this one and the configuration switching is done here.
- */
-#ifdef __KERNEL__
-#ifndef __CONFIG_8xx_DEFS
-#define __CONFIG_8xx_DEFS
-
-
-#ifdef CONFIG_8xx
-
-#ifdef CONFIG_MBX
-#include <platforms/mbx.h>
-#endif
-
-#ifdef CONFIG_FADS
-#include <platforms/fads.h>
-#endif
-
-#ifdef CONFIG_RPXLITE
-#include <platforms/rpxlite.h>
-#endif
-
-#ifdef CONFIG_BSEIP
-#include <platforms/bseip.h>
-#endif
-
-#ifdef CONFIG_RPXCLASSIC
-#include <platforms/rpxclassic.h>
-#endif
-
-#if defined(CONFIG_TQM8xxL)
-#include <platforms/tqm8xx.h>
-#endif
-
-#if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)
-#include <platforms/ivms8.h>
-#endif
-
-#if defined(CONFIG_HERMES_PRO)
-#include <platforms/hermes.h>
-#endif
-
-#if defined(CONFIG_IP860)
-#include <platforms/ip860.h>
-#endif
-
-#if defined(CONFIG_LWMON)
-#include <platforms/lwmon.h>
-#endif
-
-#if defined(CONFIG_PCU_E)
-#include <platforms/pcu_e.h>
-#endif
-
-#if defined(CONFIG_CCM)
-#include <platforms/ccm.h>
-#endif
-
-#if defined(CONFIG_LANTEC)
-#include <platforms/lantec.h>
-#endif
-
-/* Currently, all 8xx boards that support a processor to PCI/ISA bridge
- * use the same memory map.
- */
-#if 0
-#if defined(CONFIG_PCI) && defined(PCI_ISA_IO_ADDR)
-#define _IO_BASE PCI_ISA_IO_ADDR
-#define _ISA_MEM_BASE PCI_ISA_MEM_ADDR
-#define PCI_DRAM_OFFSET 0x80000000
-#else
-#define _IO_BASE 0
-#define _ISA_MEM_BASE 0
-#define PCI_DRAM_OFFSET 0
-#endif
-#else
-#if !defined(_IO_BASE) /* defined in board specific header */
-#define _IO_BASE 0
-#endif
-#define _ISA_MEM_BASE 0
-#define PCI_DRAM_OFFSET 0
-#endif
-
-#ifndef __ASSEMBLY__
-/* The "residual" data board information structure the boot loader
- * hands to us.
- */
-extern unsigned char __res[];
-
-struct pt_regs;
-
-enum ppc_sys_devices {
- MPC8xx_CPM_FEC1,
- MPC8xx_CPM_FEC2,
- MPC8xx_CPM_I2C,
- MPC8xx_CPM_SCC1,
- MPC8xx_CPM_SCC2,
- MPC8xx_CPM_SCC3,
- MPC8xx_CPM_SCC4,
- MPC8xx_CPM_SPI,
- MPC8xx_CPM_MCC1,
- MPC8xx_CPM_MCC2,
- MPC8xx_CPM_SMC1,
- MPC8xx_CPM_SMC2,
- MPC8xx_CPM_USB,
- MPC8xx_MDIO_FEC,
- NUM_PPC_SYS_DEVS,
-};
-
-#define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */
-
-#ifndef BOARD_CHIP_NAME
-#define BOARD_CHIP_NAME ""
-#endif
-
-#endif /* !__ASSEMBLY__ */
-#endif /* CONFIG_8xx */
-#endif /* __CONFIG_8xx_DEFS */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/mv64x60.h b/include/asm-ppc/mv64x60.h
deleted file mode 100644
index 2963d6a..0000000
--- a/include/asm-ppc/mv64x60.h
+++ /dev/null
@@ -1,353 +0,0 @@
-/*
- * include/asm-ppc/mv64x60.h
- *
- * Prototypes, etc. for the Marvell/Galileo MV64x60 host bridge routines.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASMPPC_MV64x60_H
-#define __ASMPPC_MV64x60_H
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/slab.h>
-
-#include <asm/byteorder.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/mv64x60_defs.h>
-
-struct platform_device;
-
-extern u8 mv64x60_pci_exclude_bridge;
-
-extern spinlock_t mv64x60_lock;
-
-/* 32-bit Window table entry defines */
-#define MV64x60_CPU2MEM_0_WIN 0
-#define MV64x60_CPU2MEM_1_WIN 1
-#define MV64x60_CPU2MEM_2_WIN 2
-#define MV64x60_CPU2MEM_3_WIN 3
-#define MV64x60_CPU2DEV_0_WIN 4
-#define MV64x60_CPU2DEV_1_WIN 5
-#define MV64x60_CPU2DEV_2_WIN 6
-#define MV64x60_CPU2DEV_3_WIN 7
-#define MV64x60_CPU2BOOT_WIN 8
-#define MV64x60_CPU2PCI0_IO_WIN 9
-#define MV64x60_CPU2PCI0_MEM_0_WIN 10
-#define MV64x60_CPU2PCI0_MEM_1_WIN 11
-#define MV64x60_CPU2PCI0_MEM_2_WIN 12
-#define MV64x60_CPU2PCI0_MEM_3_WIN 13
-#define MV64x60_CPU2PCI1_IO_WIN 14
-#define MV64x60_CPU2PCI1_MEM_0_WIN 15
-#define MV64x60_CPU2PCI1_MEM_1_WIN 16
-#define MV64x60_CPU2PCI1_MEM_2_WIN 17
-#define MV64x60_CPU2PCI1_MEM_3_WIN 18
-#define MV64x60_CPU2SRAM_WIN 19
-#define MV64x60_CPU2PCI0_IO_REMAP_WIN 20
-#define MV64x60_CPU2PCI1_IO_REMAP_WIN 21
-#define MV64x60_CPU_PROT_0_WIN 22
-#define MV64x60_CPU_PROT_1_WIN 23
-#define MV64x60_CPU_PROT_2_WIN 24
-#define MV64x60_CPU_PROT_3_WIN 25
-#define MV64x60_CPU_SNOOP_0_WIN 26
-#define MV64x60_CPU_SNOOP_1_WIN 27
-#define MV64x60_CPU_SNOOP_2_WIN 28
-#define MV64x60_CPU_SNOOP_3_WIN 29
-#define MV64x60_PCI02MEM_REMAP_0_WIN 30
-#define MV64x60_PCI02MEM_REMAP_1_WIN 31
-#define MV64x60_PCI02MEM_REMAP_2_WIN 32
-#define MV64x60_PCI02MEM_REMAP_3_WIN 33
-#define MV64x60_PCI12MEM_REMAP_0_WIN 34
-#define MV64x60_PCI12MEM_REMAP_1_WIN 35
-#define MV64x60_PCI12MEM_REMAP_2_WIN 36
-#define MV64x60_PCI12MEM_REMAP_3_WIN 37
-#define MV64x60_ENET2MEM_0_WIN 38
-#define MV64x60_ENET2MEM_1_WIN 39
-#define MV64x60_ENET2MEM_2_WIN 40
-#define MV64x60_ENET2MEM_3_WIN 41
-#define MV64x60_ENET2MEM_4_WIN 42
-#define MV64x60_ENET2MEM_5_WIN 43
-#define MV64x60_MPSC2MEM_0_WIN 44
-#define MV64x60_MPSC2MEM_1_WIN 45
-#define MV64x60_MPSC2MEM_2_WIN 46
-#define MV64x60_MPSC2MEM_3_WIN 47
-#define MV64x60_IDMA2MEM_0_WIN 48
-#define MV64x60_IDMA2MEM_1_WIN 49
-#define MV64x60_IDMA2MEM_2_WIN 50
-#define MV64x60_IDMA2MEM_3_WIN 51
-#define MV64x60_IDMA2MEM_4_WIN 52
-#define MV64x60_IDMA2MEM_5_WIN 53
-#define MV64x60_IDMA2MEM_6_WIN 54
-#define MV64x60_IDMA2MEM_7_WIN 55
-
-#define MV64x60_32BIT_WIN_COUNT 56
-
-/* 64-bit Window table entry defines */
-#define MV64x60_CPU2PCI0_MEM_0_REMAP_WIN 0
-#define MV64x60_CPU2PCI0_MEM_1_REMAP_WIN 1
-#define MV64x60_CPU2PCI0_MEM_2_REMAP_WIN 2
-#define MV64x60_CPU2PCI0_MEM_3_REMAP_WIN 3
-#define MV64x60_CPU2PCI1_MEM_0_REMAP_WIN 4
-#define MV64x60_CPU2PCI1_MEM_1_REMAP_WIN 5
-#define MV64x60_CPU2PCI1_MEM_2_REMAP_WIN 6
-#define MV64x60_CPU2PCI1_MEM_3_REMAP_WIN 7
-#define MV64x60_PCI02MEM_ACC_CNTL_0_WIN 8
-#define MV64x60_PCI02MEM_ACC_CNTL_1_WIN 9
-#define MV64x60_PCI02MEM_ACC_CNTL_2_WIN 10
-#define MV64x60_PCI02MEM_ACC_CNTL_3_WIN 11
-#define MV64x60_PCI12MEM_ACC_CNTL_0_WIN 12
-#define MV64x60_PCI12MEM_ACC_CNTL_1_WIN 13
-#define MV64x60_PCI12MEM_ACC_CNTL_2_WIN 14
-#define MV64x60_PCI12MEM_ACC_CNTL_3_WIN 15
-#define MV64x60_PCI02MEM_SNOOP_0_WIN 16
-#define MV64x60_PCI02MEM_SNOOP_1_WIN 17
-#define MV64x60_PCI02MEM_SNOOP_2_WIN 18
-#define MV64x60_PCI02MEM_SNOOP_3_WIN 19
-#define MV64x60_PCI12MEM_SNOOP_0_WIN 20
-#define MV64x60_PCI12MEM_SNOOP_1_WIN 21
-#define MV64x60_PCI12MEM_SNOOP_2_WIN 22
-#define MV64x60_PCI12MEM_SNOOP_3_WIN 23
-
-#define MV64x60_64BIT_WIN_COUNT 24
-
-/*
- * Define a structure that's used to pass in config information to the
- * core routines.
- */
-struct mv64x60_pci_window {
- u32 cpu_base;
- u32 pci_base_hi;
- u32 pci_base_lo;
- u32 size;
- u32 swap;
-};
-
-struct mv64x60_pci_info {
- u8 enable_bus; /* allow access to this PCI bus? */
-
- struct mv64x60_pci_window pci_io;
- struct mv64x60_pci_window pci_mem[3];
-
- u32 acc_cntl_options[MV64x60_CPU2MEM_WINDOWS];
- u32 snoop_options[MV64x60_CPU2MEM_WINDOWS];
- u16 pci_cmd_bits;
- u16 latency_timer;
-};
-
-struct mv64x60_setup_info {
- u32 phys_reg_base;
- u32 window_preserve_mask_32_hi;
- u32 window_preserve_mask_32_lo;
- u32 window_preserve_mask_64;
-
- u32 cpu_prot_options[MV64x60_CPU2MEM_WINDOWS];
- u32 cpu_snoop_options[MV64x60_CPU2MEM_WINDOWS];
- u32 enet_options[MV64x60_CPU2MEM_WINDOWS];
- u32 mpsc_options[MV64x60_CPU2MEM_WINDOWS];
- u32 idma_options[MV64x60_CPU2MEM_WINDOWS];
-
- struct mv64x60_pci_info pci_0;
- struct mv64x60_pci_info pci_1;
-};
-
-/* Define what the top bits in the extra member of a window entry means. */
-#define MV64x60_EXTRA_INVALID 0x00000000
-#define MV64x60_EXTRA_CPUWIN_ENAB 0x10000000
-#define MV64x60_EXTRA_CPUPROT_ENAB 0x20000000
-#define MV64x60_EXTRA_ENET_ENAB 0x30000000
-#define MV64x60_EXTRA_MPSC_ENAB 0x40000000
-#define MV64x60_EXTRA_IDMA_ENAB 0x50000000
-#define MV64x60_EXTRA_PCIACC_ENAB 0x60000000
-
-#define MV64x60_EXTRA_MASK 0xf0000000
-
-/*
- * Define the 'handle' struct that will be passed between the 64x60 core
- * code and the platform-specific code that will use it. The handle
- * will contain pointers to chip-specific routines & information.
- */
-struct mv64x60_32bit_window {
- u32 base_reg;
- u32 size_reg;
- u8 base_bits;
- u8 size_bits;
- u32 (*get_from_field)(u32 val, u32 num_bits);
- u32 (*map_to_field)(u32 val, u32 num_bits);
- u32 extra;
-};
-
-struct mv64x60_64bit_window {
- u32 base_hi_reg;
- u32 base_lo_reg;
- u32 size_reg;
- u8 base_lo_bits;
- u8 size_bits;
- u32 (*get_from_field)(u32 val, u32 num_bits);
- u32 (*map_to_field)(u32 val, u32 num_bits);
- u32 extra;
-};
-
-typedef struct mv64x60_handle mv64x60_handle_t;
-struct mv64x60_chip_info {
- u32 (*translate_size)(u32 base, u32 size, u32 num_bits);
- u32 (*untranslate_size)(u32 base, u32 size, u32 num_bits);
- void (*set_pci2mem_window)(struct pci_controller *hose, u32 bus,
- u32 window, u32 base);
- void (*set_pci2regs_window)(struct mv64x60_handle *bh,
- struct pci_controller *hose, u32 bus, u32 base);
- u32 (*is_enabled_32bit)(mv64x60_handle_t *bh, u32 window);
- void (*enable_window_32bit)(mv64x60_handle_t *bh, u32 window);
- void (*disable_window_32bit)(mv64x60_handle_t *bh, u32 window);
- void (*enable_window_64bit)(mv64x60_handle_t *bh, u32 window);
- void (*disable_window_64bit)(mv64x60_handle_t *bh, u32 window);
- void (*disable_all_windows)(mv64x60_handle_t *bh,
- struct mv64x60_setup_info *si);
- void (*config_io2mem_windows)(mv64x60_handle_t *bh,
- struct mv64x60_setup_info *si,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]);
- void (*set_mpsc2regs_window)(struct mv64x60_handle *bh, u32 base);
- void (*chip_specific_init)(mv64x60_handle_t *bh,
- struct mv64x60_setup_info *si);
-
- struct mv64x60_32bit_window *window_tab_32bit;
- struct mv64x60_64bit_window *window_tab_64bit;
-};
-
-struct mv64x60_handle {
- u32 type; /* type of bridge */
- u32 rev; /* revision of bridge */
- void __iomem *v_base;/* virtual base addr of bridge regs */
- phys_addr_t p_base; /* physical base addr of bridge regs */
-
- u32 pci_mode_a; /* pci 0 mode: conventional pci, pci-x*/
- u32 pci_mode_b; /* pci 1 mode: conventional pci, pci-x*/
-
- u32 io_base_a; /* vaddr of pci 0's I/O space */
- u32 io_base_b; /* vaddr of pci 1's I/O space */
-
- struct pci_controller *hose_a;
- struct pci_controller *hose_b;
-
- struct mv64x60_chip_info *ci; /* chip/bridge-specific info */
-};
-
-
-/* Define I/O routines for accessing registers on the 64x60 bridge. */
-extern inline void
-mv64x60_write(struct mv64x60_handle *bh, u32 offset, u32 val) {
- ulong flags;
-
- spin_lock_irqsave(&mv64x60_lock, flags);
- out_le32(bh->v_base + offset, val);
- spin_unlock_irqrestore(&mv64x60_lock, flags);
-}
-
-extern inline u32
-mv64x60_read(struct mv64x60_handle *bh, u32 offset) {
- ulong flags;
- u32 reg;
-
- spin_lock_irqsave(&mv64x60_lock, flags);
- reg = in_le32(bh->v_base + offset);
- spin_unlock_irqrestore(&mv64x60_lock, flags);
- return reg;
-}
-
-extern inline void
-mv64x60_modify(struct mv64x60_handle *bh, u32 offs, u32 data, u32 mask)
-{
- u32 reg;
- ulong flags;
-
- spin_lock_irqsave(&mv64x60_lock, flags);
- reg = in_le32(bh->v_base + offs) & (~mask);
- reg |= data & mask;
- out_le32(bh->v_base + offs, reg);
- spin_unlock_irqrestore(&mv64x60_lock, flags);
-}
-
-#define mv64x60_set_bits(bh, offs, bits) mv64x60_modify(bh, offs, ~0, bits)
-#define mv64x60_clr_bits(bh, offs, bits) mv64x60_modify(bh, offs, 0, bits)
-
-#if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260)
-#define MV64XXX_DEV_NAME "mv64xxx"
-
-struct mv64xxx_pdata {
- u32 hs_reg_valid;
-};
-#endif
-
-/* Externally visible function prototypes */
-int mv64x60_init(struct mv64x60_handle *bh, struct mv64x60_setup_info *si);
-u32 mv64x60_get_mem_size(u32 bridge_base, u32 chip_type);
-void mv64x60_early_init(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si);
-void mv64x60_alloc_hose(struct mv64x60_handle *bh, u32 cfg_addr,
- u32 cfg_data, struct pci_controller **hose);
-int mv64x60_get_type(struct mv64x60_handle *bh);
-int mv64x60_setup_for_chip(struct mv64x60_handle *bh);
-void __iomem *mv64x60_get_bridge_vbase(void);
-u32 mv64x60_get_bridge_type(void);
-u32 mv64x60_get_bridge_rev(void);
-void mv64x60_get_mem_windows(struct mv64x60_handle *bh,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]);
-void mv64x60_config_cpu2mem_windows(struct mv64x60_handle *bh,
- struct mv64x60_setup_info *si,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]);
-void mv64x60_config_cpu2pci_windows(struct mv64x60_handle *bh,
- struct mv64x60_pci_info *pi, u32 bus);
-void mv64x60_config_pci2mem_windows(struct mv64x60_handle *bh,
- struct pci_controller *hose, struct mv64x60_pci_info *pi, u32 bus,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]);
-void mv64x60_config_resources(struct pci_controller *hose,
- struct mv64x60_pci_info *pi, u32 io_base);
-void mv64x60_config_pci_params(struct pci_controller *hose,
- struct mv64x60_pci_info *pi);
-void mv64x60_pd_fixup(struct mv64x60_handle *bh,
- struct platform_device *pd_devs[], u32 entries);
-void mv64x60_get_32bit_window(struct mv64x60_handle *bh, u32 window,
- u32 *base, u32 *size);
-void mv64x60_set_32bit_window(struct mv64x60_handle *bh, u32 window, u32 base,
- u32 size, u32 other_bits);
-void mv64x60_get_64bit_window(struct mv64x60_handle *bh, u32 window,
- u32 *base_hi, u32 *base_lo, u32 *size);
-void mv64x60_set_64bit_window(struct mv64x60_handle *bh, u32 window,
- u32 base_hi, u32 base_lo, u32 size, u32 other_bits);
-void mv64x60_set_bus(struct mv64x60_handle *bh, u32 bus, u32 child_bus);
-int mv64x60_pci_exclude_device(u8 bus, u8 devfn);
-
-
-void gt64260_init_irq(void);
-int gt64260_get_irq(void);
-void mv64360_init_irq(void);
-int mv64360_get_irq(void);
-
-u32 mv64x60_mask(u32 val, u32 num_bits);
-u32 mv64x60_shift_left(u32 val, u32 num_bits);
-u32 mv64x60_shift_right(u32 val, u32 num_bits);
-u32 mv64x60_calc_mem_size(struct mv64x60_handle *bh,
- u32 mem_windows[MV64x60_CPU2MEM_WINDOWS][2]);
-
-void mv64x60_progress_init(u32 base);
-void mv64x60_mpsc_progress(char *s, unsigned short hex);
-
-extern struct mv64x60_32bit_window
- gt64260_32bit_windows[MV64x60_32BIT_WIN_COUNT];
-extern struct mv64x60_64bit_window
- gt64260_64bit_windows[MV64x60_64BIT_WIN_COUNT];
-extern struct mv64x60_32bit_window
- mv64360_32bit_windows[MV64x60_32BIT_WIN_COUNT];
-extern struct mv64x60_64bit_window
- mv64360_64bit_windows[MV64x60_64BIT_WIN_COUNT];
-
-#endif /* __ASMPPC_MV64x60_H */
diff --git a/include/asm-ppc/mv64x60_defs.h b/include/asm-ppc/mv64x60_defs.h
deleted file mode 100644
index 5b0704a..0000000
--- a/include/asm-ppc/mv64x60_defs.h
+++ /dev/null
@@ -1,976 +0,0 @@
-/*
- * include/asm-ppc/mv64x60_defs.h
- *
- * Register definitions for the Marvell/Galileo GT64260, MV64360, etc.
- * host bridges.
- *
- * Author: Mark A. Greer <mgreer@mvista.com>
- *
- * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASMPPC_MV64x60_DEFS_H
-#define __ASMPPC_MV64x60_DEFS_H
-
-/*
- * Define the Marvell bridges that are supported
- */
-#define MV64x60_TYPE_INVALID 0
-#define MV64x60_TYPE_GT64260A 1
-#define MV64x60_TYPE_GT64260B 2
-#define MV64x60_TYPE_MV64360 3
-#define MV64x60_TYPE_MV64361 4
-#define MV64x60_TYPE_MV64362 5
-#define MV64x60_TYPE_MV64460 6
-
-
-/* Revisions of each supported chip */
-#define GT64260_REV_A 0x10
-#define GT64260_REV_B 0x20
-#define MV64360 0x01
-#define MV64460 0x01
-
-/* Minimum window size supported by 64260 is 1MB */
-#define GT64260_WINDOW_SIZE_MIN 0x00100000
-#define MV64360_WINDOW_SIZE_MIN 0x00010000
-
-#define MV64x60_TCLK_FREQ_MAX 133333333U
-
-/* IRQ's for embedded controllers */
-#define MV64x60_IRQ_DEV 1
-#define MV64x60_IRQ_CPU_ERR 3
-#define MV64x60_IRQ_TIMER_0_1 8
-#define MV64x60_IRQ_TIMER_2_3 9
-#define MV64x60_IRQ_TIMER_4_5 10
-#define MV64x60_IRQ_TIMER_6_7 11
-#define MV64x60_IRQ_P1_GPP_0_7 24
-#define MV64x60_IRQ_P1_GPP_8_15 25
-#define MV64x60_IRQ_P1_GPP_16_23 26
-#define MV64x60_IRQ_P1_GPP_24_31 27
-#define MV64x60_IRQ_DOORBELL 28
-#define MV64x60_IRQ_ETH_0 32
-#define MV64x60_IRQ_ETH_1 33
-#define MV64x60_IRQ_ETH_2 34
-#define MV64x60_IRQ_SDMA_0 36
-#define MV64x60_IRQ_I2C 37
-#define MV64x60_IRQ_BRG 39
-#define MV64x60_IRQ_MPSC_0 40
-#define MV64x60_IRQ_MPSC_1 42
-#define MV64x60_IRQ_COMM 43
-#define MV64x60_IRQ_P0_GPP_0_7 56
-#define MV64x60_IRQ_P0_GPP_8_15 57
-#define MV64x60_IRQ_P0_GPP_16_23 58
-#define MV64x60_IRQ_P0_GPP_24_31 59
-
-#define MV64360_IRQ_PCI0 12
-#define MV64360_IRQ_SRAM_PAR_ERR 13
-#define MV64360_IRQ_PCI1 16
-#define MV64360_IRQ_SDMA_1 38
-
-#define MV64x60_IRQ_GPP0 64
-#define MV64x60_IRQ_GPP1 65
-#define MV64x60_IRQ_GPP2 66
-#define MV64x60_IRQ_GPP3 67
-#define MV64x60_IRQ_GPP4 68
-#define MV64x60_IRQ_GPP5 69
-#define MV64x60_IRQ_GPP6 70
-#define MV64x60_IRQ_GPP7 71
-#define MV64x60_IRQ_GPP8 72
-#define MV64x60_IRQ_GPP9 73
-#define MV64x60_IRQ_GPP10 74
-#define MV64x60_IRQ_GPP11 75
-#define MV64x60_IRQ_GPP12 76
-#define MV64x60_IRQ_GPP13 77
-#define MV64x60_IRQ_GPP14 78
-#define MV64x60_IRQ_GPP15 79
-#define MV64x60_IRQ_GPP16 80
-#define MV64x60_IRQ_GPP17 81
-#define MV64x60_IRQ_GPP18 82
-#define MV64x60_IRQ_GPP19 83
-#define MV64x60_IRQ_GPP20 84
-#define MV64x60_IRQ_GPP21 85
-#define MV64x60_IRQ_GPP22 86
-#define MV64x60_IRQ_GPP23 87
-#define MV64x60_IRQ_GPP24 88
-#define MV64x60_IRQ_GPP25 89
-#define MV64x60_IRQ_GPP26 90
-#define MV64x60_IRQ_GPP27 91
-#define MV64x60_IRQ_GPP28 92
-#define MV64x60_IRQ_GPP29 93
-#define MV64x60_IRQ_GPP30 94
-#define MV64x60_IRQ_GPP31 95
-
-/* Offsets for register blocks */
-#define GT64260_ENET_PHY_ADDR 0x2000
-#define GT64260_ENET_ESMIR 0x2010
-#define GT64260_ENET_0_OFFSET 0x2400
-#define GT64260_ENET_1_OFFSET 0x2800
-#define GT64260_ENET_2_OFFSET 0x2c00
-#define MV64x60_SDMA_0_OFFSET 0x4000
-#define MV64x60_SDMA_1_OFFSET 0x6000
-#define MV64x60_MPSC_0_OFFSET 0x8000
-#define MV64x60_MPSC_1_OFFSET 0x9000
-#define MV64x60_MPSC_ROUTING_OFFSET 0xb400
-#define MV64x60_SDMA_INTR_OFFSET 0xb800
-#define MV64x60_BRG_0_OFFSET 0xb200
-#define MV64x60_BRG_1_OFFSET 0xb208
-
-/*
- *****************************************************************************
- *
- * CPU Interface Registers
- *
- *****************************************************************************
- */
-
-/* CPU physical address of bridge's registers */
-#define MV64x60_INTERNAL_SPACE_DECODE 0x0068
-#define MV64x60_INTERNAL_SPACE_SIZE 0x10000
-#define MV64x60_INTERNAL_SPACE_DEFAULT_ADDR 0x14000000
-
-#define MV64360_CPU_BAR_ENABLE 0x0278
-
-/* CPU Memory Controller Window Registers (4 windows) */
-#define MV64x60_CPU2MEM_WINDOWS 4
-
-#define MV64x60_CPU2MEM_0_BASE 0x0008
-#define MV64x60_CPU2MEM_0_SIZE 0x0010
-#define MV64x60_CPU2MEM_1_BASE 0x0208
-#define MV64x60_CPU2MEM_1_SIZE 0x0210
-#define MV64x60_CPU2MEM_2_BASE 0x0018
-#define MV64x60_CPU2MEM_2_SIZE 0x0020
-#define MV64x60_CPU2MEM_3_BASE 0x0218
-#define MV64x60_CPU2MEM_3_SIZE 0x0220
-
-/* CPU Device Controller Window Registers (4 windows) */
-#define MV64x60_CPU2DEV_WINDOWS 4
-
-#define MV64x60_CPU2DEV_0_BASE 0x0028
-#define MV64x60_CPU2DEV_0_SIZE 0x0030
-#define MV64x60_CPU2DEV_1_BASE 0x0228
-#define MV64x60_CPU2DEV_1_SIZE 0x0230
-#define MV64x60_CPU2DEV_2_BASE 0x0248
-#define MV64x60_CPU2DEV_2_SIZE 0x0250
-#define MV64x60_CPU2DEV_3_BASE 0x0038
-#define MV64x60_CPU2DEV_3_SIZE 0x0040
-
-#define MV64x60_CPU2BOOT_0_BASE 0x0238
-#define MV64x60_CPU2BOOT_0_SIZE 0x0240
-
-#define MV64360_CPU2SRAM_BASE 0x0268
-
-/* CPU Windows to PCI space (2 PCI buses each w/ 1 I/O & 4 MEM windows) */
-#define MV64x60_PCI_BUSES 2
-#define MV64x60_PCI_IO_WINDOWS_PER_BUS 1
-#define MV64x60_PCI_MEM_WINDOWS_PER_BUS 4
-
-#define MV64x60_CPU2PCI_SWAP_BYTE 0x00000000
-#define MV64x60_CPU2PCI_SWAP_NONE 0x01000000
-#define MV64x60_CPU2PCI_SWAP_BYTE_WORD 0x02000000
-#define MV64x60_CPU2PCI_SWAP_WORD 0x03000000
-
-#define MV64x60_CPU2PCI_MEM_REQ64 (1<<27)
-
-#define MV64x60_CPU2PCI0_IO_BASE 0x0048
-#define MV64x60_CPU2PCI0_IO_SIZE 0x0050
-#define MV64x60_CPU2PCI0_MEM_0_BASE 0x0058
-#define MV64x60_CPU2PCI0_MEM_0_SIZE 0x0060
-#define MV64x60_CPU2PCI0_MEM_1_BASE 0x0080
-#define MV64x60_CPU2PCI0_MEM_1_SIZE 0x0088
-#define MV64x60_CPU2PCI0_MEM_2_BASE 0x0258
-#define MV64x60_CPU2PCI0_MEM_2_SIZE 0x0260
-#define MV64x60_CPU2PCI0_MEM_3_BASE 0x0280
-#define MV64x60_CPU2PCI0_MEM_3_SIZE 0x0288
-
-#define MV64x60_CPU2PCI0_IO_REMAP 0x00f0
-#define MV64x60_CPU2PCI0_MEM_0_REMAP_LO 0x00f8
-#define MV64x60_CPU2PCI0_MEM_0_REMAP_HI 0x0320
-#define MV64x60_CPU2PCI0_MEM_1_REMAP_LO 0x0100
-#define MV64x60_CPU2PCI0_MEM_1_REMAP_HI 0x0328
-#define MV64x60_CPU2PCI0_MEM_2_REMAP_LO 0x02f8
-#define MV64x60_CPU2PCI0_MEM_2_REMAP_HI 0x0330
-#define MV64x60_CPU2PCI0_MEM_3_REMAP_LO 0x0300
-#define MV64x60_CPU2PCI0_MEM_3_REMAP_HI 0x0338
-
-#define MV64x60_CPU2PCI1_IO_BASE 0x0090
-#define MV64x60_CPU2PCI1_IO_SIZE 0x0098
-#define MV64x60_CPU2PCI1_MEM_0_BASE 0x00a0
-#define MV64x60_CPU2PCI1_MEM_0_SIZE 0x00a8
-#define MV64x60_CPU2PCI1_MEM_1_BASE 0x00b0
-#define MV64x60_CPU2PCI1_MEM_1_SIZE 0x00b8
-#define MV64x60_CPU2PCI1_MEM_2_BASE 0x02a0
-#define MV64x60_CPU2PCI1_MEM_2_SIZE 0x02a8
-#define MV64x60_CPU2PCI1_MEM_3_BASE 0x02b0
-#define MV64x60_CPU2PCI1_MEM_3_SIZE 0x02b8
-
-#define MV64x60_CPU2PCI1_IO_REMAP 0x0108
-#define MV64x60_CPU2PCI1_MEM_0_REMAP_LO 0x0110
-#define MV64x60_CPU2PCI1_MEM_0_REMAP_HI 0x0340
-#define MV64x60_CPU2PCI1_MEM_1_REMAP_LO 0x0118
-#define MV64x60_CPU2PCI1_MEM_1_REMAP_HI 0x0348
-#define MV64x60_CPU2PCI1_MEM_2_REMAP_LO 0x0310
-#define MV64x60_CPU2PCI1_MEM_2_REMAP_HI 0x0350
-#define MV64x60_CPU2PCI1_MEM_3_REMAP_LO 0x0318
-#define MV64x60_CPU2PCI1_MEM_3_REMAP_HI 0x0358
-
-/* CPU Control Registers */
-#define MV64x60_CPU_CONFIG 0x0000
-#define MV64x60_CPU_MODE 0x0120
-#define MV64x60_CPU_MASTER_CNTL 0x0160
-#define MV64x60_CPU_XBAR_CNTL_LO 0x0150
-#define MV64x60_CPU_XBAR_CNTL_HI 0x0158
-#define MV64x60_CPU_XBAR_TO 0x0168
-
-#define GT64260_CPU_RR_XBAR_CNTL_LO 0x0170
-#define GT64260_CPU_RR_XBAR_CNTL_HI 0x0178
-
-#define MV64360_CPU_PADS_CALIBRATION 0x03b4
-#define MV64360_CPU_RESET_SAMPLE_LO 0x03c4
-#define MV64360_CPU_RESET_SAMPLE_HI 0x03d4
-
-/* SMP Register Map */
-#define MV64360_WHO_AM_I 0x0200
-#define MV64360_CPU0_DOORBELL 0x0214
-#define MV64360_CPU0_DOORBELL_CLR 0x021c
-#define MV64360_CPU0_DOORBELL_MASK 0x0234
-#define MV64360_CPU1_DOORBELL 0x0224
-#define MV64360_CPU1_DOORBELL_CLR 0x022c
-#define MV64360_CPU1_DOORBELL_MASK 0x023c
-#define MV64360_CPUx_DOORBELL(x) (0x0214 + ((x)*0x10))
-#define MV64360_CPUx_DOORBELL_CLR(x) (0x021c + ((x)*0x10))
-#define MV64360_CPUx_DOORBELL_MASK(x) (0x0234 + ((x)*0x08))
-#define MV64360_SEMAPHORE_0 0x0244
-#define MV64360_SEMAPHORE_1 0x024c
-#define MV64360_SEMAPHORE_2 0x0254
-#define MV64360_SEMAPHORE_3 0x025c
-#define MV64360_SEMAPHORE_4 0x0264
-#define MV64360_SEMAPHORE_5 0x026c
-#define MV64360_SEMAPHORE_6 0x0274
-#define MV64360_SEMAPHORE_7 0x027c
-
-/* CPU Sync Barrier Registers */
-#define GT64260_CPU_SYNC_BARRIER_PCI0 0x00c0
-#define GT64260_CPU_SYNC_BARRIER_PCI1 0x00c8
-
-#define MV64360_CPU0_SYNC_BARRIER_TRIG 0x00c0
-#define MV64360_CPU0_SYNC_BARRIER_VIRT 0x00c8
-#define MV64360_CPU1_SYNC_BARRIER_TRIG 0x00d0
-#define MV64360_CPU1_SYNC_BARRIER_VIRT 0x00d8
-
-/* CPU Deadlock and Ordering registers (Rev B part only) */
-#define GT64260_CPU_DEADLOCK_ORDERING 0x02d0
-#define GT64260_CPU_WB_PRIORITY_BUFFER_DEPTH 0x02d8
-#define GT64260_CPU_COUNTERS_SYNC_BARRIER_ATTRIBUTE 0x02e0
-
-/* CPU Access Protection Registers (gt64260 realy has 8 but don't need) */
-#define MV64x260_CPU_PROT_WINDOWS 4
-
-#define GT64260_CPU_PROT_ACCPROTECT (1<<16)
-#define GT64260_CPU_PROT_WRPROTECT (1<<17)
-#define GT64260_CPU_PROT_CACHEPROTECT (1<<18)
-
-#define MV64360_CPU_PROT_ACCPROTECT (1<<20)
-#define MV64360_CPU_PROT_WRPROTECT (1<<21)
-#define MV64360_CPU_PROT_CACHEPROTECT (1<<22)
-#define MV64360_CPU_PROT_WIN_ENABLE (1<<31)
-
-#define MV64x60_CPU_PROT_BASE_0 0x0180
-#define MV64x60_CPU_PROT_SIZE_0 0x0188
-#define MV64x60_CPU_PROT_BASE_1 0x0190
-#define MV64x60_CPU_PROT_SIZE_1 0x0198
-#define MV64x60_CPU_PROT_BASE_2 0x01a0
-#define MV64x60_CPU_PROT_SIZE_2 0x01a8
-#define MV64x60_CPU_PROT_BASE_3 0x01b0
-#define MV64x60_CPU_PROT_SIZE_3 0x01b8
-
-#define GT64260_CPU_PROT_BASE_4 0x01c0
-#define GT64260_CPU_PROT_SIZE_4 0x01c8
-#define GT64260_CPU_PROT_BASE_5 0x01d0
-#define GT64260_CPU_PROT_SIZE_5 0x01d8
-#define GT64260_CPU_PROT_BASE_6 0x01e0
-#define GT64260_CPU_PROT_SIZE_6 0x01e8
-#define GT64260_CPU_PROT_BASE_7 0x01f0
-#define GT64260_CPU_PROT_SIZE_7 0x01f8
-
-/* CPU Snoop Control Registers (64260 only) */
-#define GT64260_CPU_SNOOP_WINDOWS 4
-
-#define GT64260_CPU_SNOOP_NONE 0x00000000
-#define GT64260_CPU_SNOOP_WT 0x00010000
-#define GT64260_CPU_SNOOP_WB 0x00020000
-#define GT64260_CPU_SNOOP_MASK 0x00030000
-#define GT64260_CPU_SNOOP_ALL_BITS GT64260_CPU_SNOOP_MASK
-
-#define GT64260_CPU_SNOOP_BASE_0 0x0380
-#define GT64260_CPU_SNOOP_SIZE_0 0x0388
-#define GT64260_CPU_SNOOP_BASE_1 0x0390
-#define GT64260_CPU_SNOOP_SIZE_1 0x0398
-#define GT64260_CPU_SNOOP_BASE_2 0x03a0
-#define GT64260_CPU_SNOOP_SIZE_2 0x03a8
-#define GT64260_CPU_SNOOP_BASE_3 0x03b0
-#define GT64260_CPU_SNOOP_SIZE_3 0x03b8
-
-/* CPU Snoop Control Registers (64360 only) */
-#define MV64360_CPU_SNOOP_WINDOWS 4
-#define MV64360_CPU_SNOOP_NONE 0x00000000
-#define MV64360_CPU_SNOOP_WT 0x00010000
-#define MV64360_CPU_SNOOP_WB 0x00020000
-#define MV64360_CPU_SNOOP_MASK 0x00030000
-#define MV64360_CPU_SNOOP_ALL_BITS MV64360_CPU_SNOOP_MASK
-
-
-/* CPU Error Report Registers */
-#define MV64x60_CPU_ERR_ADDR_LO 0x0070
-#define MV64x60_CPU_ERR_ADDR_HI 0x0078
-#define MV64x60_CPU_ERR_DATA_LO 0x0128
-#define MV64x60_CPU_ERR_DATA_HI 0x0130
-#define MV64x60_CPU_ERR_PARITY 0x0138
-#define MV64x60_CPU_ERR_CAUSE 0x0140
-#define MV64x60_CPU_ERR_MASK 0x0148
-
-/*
- *****************************************************************************
- *
- * SRAM Controller Registers
- *
- *****************************************************************************
- */
-
-#define MV64360_SRAM_CONFIG 0x0380
-#define MV64360_SRAM_TEST_MODE 0x03f4
-#define MV64360_SRAM_ERR_CAUSE 0x0388
-#define MV64360_SRAM_ERR_ADDR_LO 0x0390
-#define MV64360_SRAM_ERR_ADDR_HI 0x03f8
-#define MV64360_SRAM_ERR_DATA_LO 0x0398
-#define MV64360_SRAM_ERR_DATA_HI 0x03a0
-#define MV64360_SRAM_ERR_PARITY 0x03a8
-
-#define MV64360_SRAM_SIZE 0x00040000 /* 2Mb/256KB SRAM */
-
-/*
- *****************************************************************************
- *
- * SDRAM/MEM Controller Registers
- *
- *****************************************************************************
- */
-
-/* SDRAM Config Registers (64260) */
-#define GT64260_SDRAM_CONFIG 0x0448
-
-/* SDRAM Error Report Registers (64260) */
-#define GT64260_SDRAM_ERR_DATA_LO 0x0484
-#define GT64260_SDRAM_ERR_DATA_HI 0x0480
-#define GT64260_SDRAM_ERR_ADDR 0x0490
-#define GT64260_SDRAM_ERR_ECC_RCVD 0x0488
-#define GT64260_SDRAM_ERR_ECC_CALC 0x048c
-#define GT64260_SDRAM_ERR_ECC_CNTL 0x0494
-#define GT64260_SDRAM_ERR_ECC_ERR_CNT 0x0498
-
-/* SDRAM Config Registers (64360) */
-#define MV64360_SDRAM_CONFIG 0x1400
-
-/* SDRAM Control Registers */
-#define MV64360_D_UNIT_CONTROL_LOW 0x1404
-#define MV64360_D_UNIT_CONTROL_HIGH 0x1424
-#define MV64460_D_UNIT_MMASK 0x14b0
-
-/* SDRAM Error Report Registers (64360) */
-#define MV64360_SDRAM_ERR_DATA_LO 0x1444
-#define MV64360_SDRAM_ERR_DATA_HI 0x1440
-#define MV64360_SDRAM_ERR_ADDR 0x1450
-#define MV64360_SDRAM_ERR_ECC_RCVD 0x1448
-#define MV64360_SDRAM_ERR_ECC_CALC 0x144c
-#define MV64360_SDRAM_ERR_ECC_CNTL 0x1454
-#define MV64360_SDRAM_ERR_ECC_ERR_CNT 0x1458
-
-/*
- *****************************************************************************
- *
- * Device/BOOT Controller Registers
- *
- *****************************************************************************
- */
-
-/* Device Control Registers */
-#define MV64x60_DEV_BANK_PARAMS_0 0x045c
-#define MV64x60_DEV_BANK_PARAMS_1 0x0460
-#define MV64x60_DEV_BANK_PARAMS_2 0x0464
-#define MV64x60_DEV_BANK_PARAMS_3 0x0468
-#define MV64x60_DEV_BOOT_PARAMS 0x046c
-#define MV64x60_DEV_IF_CNTL 0x04c0
-#define MV64x60_DEV_IF_XBAR_CNTL_LO 0x04c8
-#define MV64x60_DEV_IF_XBAR_CNTL_HI 0x04cc
-#define MV64x60_DEV_IF_XBAR_CNTL_TO 0x04c4
-
-/* Device Interrupt Registers */
-#define MV64x60_DEV_INTR_CAUSE 0x04d0
-#define MV64x60_DEV_INTR_MASK 0x04d4
-#define MV64x60_DEV_INTR_ERR_ADDR 0x04d8
-
-#define MV64360_DEV_INTR_ERR_DATA 0x04dc
-#define MV64360_DEV_INTR_ERR_PAR 0x04e0
-
-/*
- *****************************************************************************
- *
- * PCI Bridge Interface Registers
- *
- *****************************************************************************
- */
-
-/* PCI Configuration Access Registers */
-#define MV64x60_PCI0_CONFIG_ADDR 0x0cf8
-#define MV64x60_PCI0_CONFIG_DATA 0x0cfc
-#define MV64x60_PCI0_IACK 0x0c34
-
-#define MV64x60_PCI1_CONFIG_ADDR 0x0c78
-#define MV64x60_PCI1_CONFIG_DATA 0x0c7c
-#define MV64x60_PCI1_IACK 0x0cb4
-
-/* PCI Control Registers */
-#define MV64x60_PCI0_CMD 0x0c00
-#define MV64x60_PCI0_MODE 0x0d00
-#define MV64x60_PCI0_TO_RETRY 0x0c04
-#define MV64x60_PCI0_RD_BUF_DISCARD_TIMER 0x0d04
-#define MV64x60_PCI0_MSI_TRIGGER_TIMER 0x0c38
-#define MV64x60_PCI0_ARBITER_CNTL 0x1d00
-#define MV64x60_PCI0_XBAR_CNTL_LO 0x1d08
-#define MV64x60_PCI0_XBAR_CNTL_HI 0x1d0c
-#define MV64x60_PCI0_XBAR_CNTL_TO 0x1d04
-#define MV64x60_PCI0_RD_RESP_XBAR_CNTL_LO 0x1d18
-#define MV64x60_PCI0_RD_RESP_XBAR_CNTL_HI 0x1d1c
-#define MV64x60_PCI0_SYNC_BARRIER 0x1d10
-#define MV64x60_PCI0_P2P_CONFIG 0x1d14
-#define MV64x60_PCI0_INTR_MASK
-
-#define GT64260_PCI0_P2P_SWAP_CNTL 0x1d54
-
-#define MV64x60_PCI1_CMD 0x0c80
-#define MV64x60_PCI1_MODE 0x0d80
-#define MV64x60_PCI1_TO_RETRY 0x0c84
-#define MV64x60_PCI1_RD_BUF_DISCARD_TIMER 0x0d84
-#define MV64x60_PCI1_MSI_TRIGGER_TIMER 0x0cb8
-#define MV64x60_PCI1_ARBITER_CNTL 0x1d80
-#define MV64x60_PCI1_XBAR_CNTL_LO 0x1d88
-#define MV64x60_PCI1_XBAR_CNTL_HI 0x1d8c
-#define MV64x60_PCI1_XBAR_CNTL_TO 0x1d84
-#define MV64x60_PCI1_RD_RESP_XBAR_CNTL_LO 0x1d98
-#define MV64x60_PCI1_RD_RESP_XBAR_CNTL_HI 0x1d9c
-#define MV64x60_PCI1_SYNC_BARRIER 0x1d90
-#define MV64x60_PCI1_P2P_CONFIG 0x1d94
-
-#define GT64260_PCI1_P2P_SWAP_CNTL 0x1dd4
-
-/* Different modes that the pci hoses can be in (bits 5:4 in PCI Mode reg) */
-#define MV64x60_PCIMODE_CONVENTIONAL 0
-#define MV64x60_PCIMODE_PCIX_66 (1 << 4)
-#define MV64x60_PCIMODE_PCIX_100 (2 << 4)
-#define MV64x60_PCIMODE_PCIX_133 (3 << 4)
-#define MV64x60_PCIMODE_MASK (0x3 << 4)
-
-/* PCI Access Control Regions Registers */
-#define GT64260_PCI_ACC_CNTL_PREFETCHEN (1<<12)
-#define GT64260_PCI_ACC_CNTL_DREADEN (1<<13)
-#define GT64260_PCI_ACC_CNTL_RDPREFETCH (1<<16)
-#define GT64260_PCI_ACC_CNTL_RDLINEPREFETCH (1<<17)
-#define GT64260_PCI_ACC_CNTL_RDMULPREFETCH (1<<18)
-#define GT64260_PCI_ACC_CNTL_MBURST_32_BTYES 0x00000000
-#define GT64260_PCI_ACC_CNTL_MBURST_64_BYTES 0x00100000
-#define GT64260_PCI_ACC_CNTL_MBURST_128_BYTES 0x00200000
-#define GT64260_PCI_ACC_CNTL_MBURST_MASK 0x00300000
-#define GT64260_PCI_ACC_CNTL_SWAP_BYTE 0x00000000
-#define GT64260_PCI_ACC_CNTL_SWAP_NONE 0x01000000
-#define GT64260_PCI_ACC_CNTL_SWAP_BYTE_WORD 0x02000000
-#define GT64260_PCI_ACC_CNTL_SWAP_WORD 0x03000000
-#define GT64260_PCI_ACC_CNTL_SWAP_MASK 0x03000000
-#define GT64260_PCI_ACC_CNTL_ACCPROT (1<<28)
-#define GT64260_PCI_ACC_CNTL_WRPROT (1<<29)
-
-#define GT64260_PCI_ACC_CNTL_ALL_BITS (GT64260_PCI_ACC_CNTL_PREFETCHEN | \
- GT64260_PCI_ACC_CNTL_DREADEN | \
- GT64260_PCI_ACC_CNTL_RDPREFETCH | \
- GT64260_PCI_ACC_CNTL_RDLINEPREFETCH |\
- GT64260_PCI_ACC_CNTL_RDMULPREFETCH | \
- GT64260_PCI_ACC_CNTL_MBURST_MASK | \
- GT64260_PCI_ACC_CNTL_SWAP_MASK | \
- GT64260_PCI_ACC_CNTL_ACCPROT| \
- GT64260_PCI_ACC_CNTL_WRPROT)
-
-#define MV64360_PCI_ACC_CNTL_ENABLE (1<<0)
-#define MV64360_PCI_ACC_CNTL_REQ64 (1<<1)
-#define MV64360_PCI_ACC_CNTL_SNOOP_NONE 0x00000000
-#define MV64360_PCI_ACC_CNTL_SNOOP_WT 0x00000004
-#define MV64360_PCI_ACC_CNTL_SNOOP_WB 0x00000008
-#define MV64360_PCI_ACC_CNTL_SNOOP_MASK 0x0000000c
-#define MV64360_PCI_ACC_CNTL_ACCPROT (1<<4)
-#define MV64360_PCI_ACC_CNTL_WRPROT (1<<5)
-#define MV64360_PCI_ACC_CNTL_SWAP_BYTE 0x00000000
-#define MV64360_PCI_ACC_CNTL_SWAP_NONE 0x00000040
-#define MV64360_PCI_ACC_CNTL_SWAP_BYTE_WORD 0x00000080
-#define MV64360_PCI_ACC_CNTL_SWAP_WORD 0x000000c0
-#define MV64360_PCI_ACC_CNTL_SWAP_MASK 0x000000c0
-#define MV64360_PCI_ACC_CNTL_MBURST_32_BYTES 0x00000000
-#define MV64360_PCI_ACC_CNTL_MBURST_64_BYTES 0x00000100
-#define MV64360_PCI_ACC_CNTL_MBURST_128_BYTES 0x00000200
-#define MV64360_PCI_ACC_CNTL_MBURST_MASK 0x00000300
-#define MV64360_PCI_ACC_CNTL_RDSIZE_32_BYTES 0x00000000
-#define MV64360_PCI_ACC_CNTL_RDSIZE_64_BYTES 0x00000400
-#define MV64360_PCI_ACC_CNTL_RDSIZE_128_BYTES 0x00000800
-#define MV64360_PCI_ACC_CNTL_RDSIZE_256_BYTES 0x00000c00
-#define MV64360_PCI_ACC_CNTL_RDSIZE_MASK 0x00000c00
-
-#define MV64360_PCI_ACC_CNTL_ALL_BITS (MV64360_PCI_ACC_CNTL_ENABLE | \
- MV64360_PCI_ACC_CNTL_REQ64 | \
- MV64360_PCI_ACC_CNTL_SNOOP_MASK | \
- MV64360_PCI_ACC_CNTL_ACCPROT | \
- MV64360_PCI_ACC_CNTL_WRPROT | \
- MV64360_PCI_ACC_CNTL_SWAP_MASK | \
- MV64360_PCI_ACC_CNTL_MBURST_MASK | \
- MV64360_PCI_ACC_CNTL_RDSIZE_MASK)
-
-#define MV64x60_PCI0_ACC_CNTL_0_BASE_LO 0x1e00
-#define MV64x60_PCI0_ACC_CNTL_0_BASE_HI 0x1e04
-#define MV64x60_PCI0_ACC_CNTL_0_SIZE 0x1e08
-#define MV64x60_PCI0_ACC_CNTL_1_BASE_LO 0x1e10
-#define MV64x60_PCI0_ACC_CNTL_1_BASE_HI 0x1e14
-#define MV64x60_PCI0_ACC_CNTL_1_SIZE 0x1e18
-#define MV64x60_PCI0_ACC_CNTL_2_BASE_LO 0x1e20
-#define MV64x60_PCI0_ACC_CNTL_2_BASE_HI 0x1e24
-#define MV64x60_PCI0_ACC_CNTL_2_SIZE 0x1e28
-#define MV64x60_PCI0_ACC_CNTL_3_BASE_LO 0x1e30
-#define MV64x60_PCI0_ACC_CNTL_3_BASE_HI 0x1e34
-#define MV64x60_PCI0_ACC_CNTL_3_SIZE 0x1e38
-#define MV64x60_PCI0_ACC_CNTL_4_BASE_LO 0x1e40
-#define MV64x60_PCI0_ACC_CNTL_4_BASE_HI 0x1e44
-#define MV64x60_PCI0_ACC_CNTL_4_SIZE 0x1e48
-#define MV64x60_PCI0_ACC_CNTL_5_BASE_LO 0x1e50
-#define MV64x60_PCI0_ACC_CNTL_5_BASE_HI 0x1e54
-#define MV64x60_PCI0_ACC_CNTL_5_SIZE 0x1e58
-
-#define GT64260_PCI0_ACC_CNTL_6_BASE_LO 0x1e60
-#define GT64260_PCI0_ACC_CNTL_6_BASE_HI 0x1e64
-#define GT64260_PCI0_ACC_CNTL_6_SIZE 0x1e68
-#define GT64260_PCI0_ACC_CNTL_7_BASE_LO 0x1e70
-#define GT64260_PCI0_ACC_CNTL_7_BASE_HI 0x1e74
-#define GT64260_PCI0_ACC_CNTL_7_SIZE 0x1e78
-
-#define MV64x60_PCI1_ACC_CNTL_0_BASE_LO 0x1e80
-#define MV64x60_PCI1_ACC_CNTL_0_BASE_HI 0x1e84
-#define MV64x60_PCI1_ACC_CNTL_0_SIZE 0x1e88
-#define MV64x60_PCI1_ACC_CNTL_1_BASE_LO 0x1e90
-#define MV64x60_PCI1_ACC_CNTL_1_BASE_HI 0x1e94
-#define MV64x60_PCI1_ACC_CNTL_1_SIZE 0x1e98
-#define MV64x60_PCI1_ACC_CNTL_2_BASE_LO 0x1ea0
-#define MV64x60_PCI1_ACC_CNTL_2_BASE_HI 0x1ea4
-#define MV64x60_PCI1_ACC_CNTL_2_SIZE 0x1ea8
-#define MV64x60_PCI1_ACC_CNTL_3_BASE_LO 0x1eb0
-#define MV64x60_PCI1_ACC_CNTL_3_BASE_HI 0x1eb4
-#define MV64x60_PCI1_ACC_CNTL_3_SIZE 0x1eb8
-#define MV64x60_PCI1_ACC_CNTL_4_BASE_LO 0x1ec0
-#define MV64x60_PCI1_ACC_CNTL_4_BASE_HI 0x1ec4
-#define MV64x60_PCI1_ACC_CNTL_4_SIZE 0x1ec8
-#define MV64x60_PCI1_ACC_CNTL_5_BASE_LO 0x1ed0
-#define MV64x60_PCI1_ACC_CNTL_5_BASE_HI 0x1ed4
-#define MV64x60_PCI1_ACC_CNTL_5_SIZE 0x1ed8
-
-#define GT64260_PCI1_ACC_CNTL_6_BASE_LO 0x1ee0
-#define GT64260_PCI1_ACC_CNTL_6_BASE_HI 0x1ee4
-#define GT64260_PCI1_ACC_CNTL_6_SIZE 0x1ee8
-#define GT64260_PCI1_ACC_CNTL_7_BASE_LO 0x1ef0
-#define GT64260_PCI1_ACC_CNTL_7_BASE_HI 0x1ef4
-#define GT64260_PCI1_ACC_CNTL_7_SIZE 0x1ef8
-
-/* PCI Snoop Control Registers (64260 only) */
-#define GT64260_PCI_SNOOP_NONE 0x00000000
-#define GT64260_PCI_SNOOP_WT 0x00001000
-#define GT64260_PCI_SNOOP_WB 0x00002000
-
-#define GT64260_PCI0_SNOOP_0_BASE_LO 0x1f00
-#define GT64260_PCI0_SNOOP_0_BASE_HI 0x1f04
-#define GT64260_PCI0_SNOOP_0_SIZE 0x1f08
-#define GT64260_PCI0_SNOOP_1_BASE_LO 0x1f10
-#define GT64260_PCI0_SNOOP_1_BASE_HI 0x1f14
-#define GT64260_PCI0_SNOOP_1_SIZE 0x1f18
-#define GT64260_PCI0_SNOOP_2_BASE_LO 0x1f20
-#define GT64260_PCI0_SNOOP_2_BASE_HI 0x1f24
-#define GT64260_PCI0_SNOOP_2_SIZE 0x1f28
-#define GT64260_PCI0_SNOOP_3_BASE_LO 0x1f30
-#define GT64260_PCI0_SNOOP_3_BASE_HI 0x1f34
-#define GT64260_PCI0_SNOOP_3_SIZE 0x1f38
-
-#define GT64260_PCI1_SNOOP_0_BASE_LO 0x1f80
-#define GT64260_PCI1_SNOOP_0_BASE_HI 0x1f84
-#define GT64260_PCI1_SNOOP_0_SIZE 0x1f88
-#define GT64260_PCI1_SNOOP_1_BASE_LO 0x1f90
-#define GT64260_PCI1_SNOOP_1_BASE_HI 0x1f94
-#define GT64260_PCI1_SNOOP_1_SIZE 0x1f98
-#define GT64260_PCI1_SNOOP_2_BASE_LO 0x1fa0
-#define GT64260_PCI1_SNOOP_2_BASE_HI 0x1fa4
-#define GT64260_PCI1_SNOOP_2_SIZE 0x1fa8
-#define GT64260_PCI1_SNOOP_3_BASE_LO 0x1fb0
-#define GT64260_PCI1_SNOOP_3_BASE_HI 0x1fb4
-#define GT64260_PCI1_SNOOP_3_SIZE 0x1fb8
-
-/* PCI Error Report Registers */
-#define MV64x60_PCI0_ERR_SERR_MASK 0x0c28
-#define MV64x60_PCI0_ERR_ADDR_LO 0x1d40
-#define MV64x60_PCI0_ERR_ADDR_HI 0x1d44
-#define MV64x60_PCI0_ERR_DATA_LO 0x1d48
-#define MV64x60_PCI0_ERR_DATA_HI 0x1d4c
-#define MV64x60_PCI0_ERR_CMD 0x1d50
-#define MV64x60_PCI0_ERR_CAUSE 0x1d58
-#define MV64x60_PCI0_ERR_MASK 0x1d5c
-
-#define MV64x60_PCI1_ERR_SERR_MASK 0x0ca8
-#define MV64x60_PCI1_ERR_ADDR_LO 0x1dc0
-#define MV64x60_PCI1_ERR_ADDR_HI 0x1dc4
-#define MV64x60_PCI1_ERR_DATA_LO 0x1dc8
-#define MV64x60_PCI1_ERR_DATA_HI 0x1dcc
-#define MV64x60_PCI1_ERR_CMD 0x1dd0
-#define MV64x60_PCI1_ERR_CAUSE 0x1dd8
-#define MV64x60_PCI1_ERR_MASK 0x1ddc
-
-/* PCI Slave Address Decoding Registers */
-#define MV64x60_PCI0_MEM_0_SIZE 0x0c08
-#define MV64x60_PCI0_MEM_1_SIZE 0x0d08
-#define MV64x60_PCI0_MEM_2_SIZE 0x0c0c
-#define MV64x60_PCI0_MEM_3_SIZE 0x0d0c
-#define MV64x60_PCI1_MEM_0_SIZE 0x0c88
-#define MV64x60_PCI1_MEM_1_SIZE 0x0d88
-#define MV64x60_PCI1_MEM_2_SIZE 0x0c8c
-#define MV64x60_PCI1_MEM_3_SIZE 0x0d8c
-
-#define MV64x60_PCI0_BAR_ENABLE 0x0c3c
-#define MV64x60_PCI1_BAR_ENABLE 0x0cbc
-
-#define MV64x60_PCI0_PCI_DECODE_CNTL 0x0d3c
-#define MV64x60_PCI1_PCI_DECODE_CNTL 0x0dbc
-
-#define MV64x60_PCI0_SLAVE_MEM_0_REMAP 0x0c48
-#define MV64x60_PCI0_SLAVE_MEM_1_REMAP 0x0d48
-#define MV64x60_PCI0_SLAVE_MEM_2_REMAP 0x0c4c
-#define MV64x60_PCI0_SLAVE_MEM_3_REMAP 0x0d4c
-#define MV64x60_PCI0_SLAVE_DEV_0_REMAP 0x0c50
-#define MV64x60_PCI0_SLAVE_DEV_1_REMAP 0x0d50
-#define MV64x60_PCI0_SLAVE_DEV_2_REMAP 0x0d58
-#define MV64x60_PCI0_SLAVE_DEV_3_REMAP 0x0c54
-#define MV64x60_PCI0_SLAVE_BOOT_REMAP 0x0d54
-#define MV64x60_PCI0_SLAVE_P2P_MEM_0_REMAP_LO 0x0d5c
-#define MV64x60_PCI0_SLAVE_P2P_MEM_0_REMAP_HI 0x0d60
-#define MV64x60_PCI0_SLAVE_P2P_MEM_1_REMAP_LO 0x0d64
-#define MV64x60_PCI0_SLAVE_P2P_MEM_1_REMAP_HI 0x0d68
-#define MV64x60_PCI0_SLAVE_P2P_IO_REMAP 0x0d6c
-#define MV64x60_PCI0_SLAVE_CPU_REMAP 0x0d70
-
-#define MV64x60_PCI1_SLAVE_MEM_0_REMAP 0x0cc8
-#define MV64x60_PCI1_SLAVE_MEM_1_REMAP 0x0dc8
-#define MV64x60_PCI1_SLAVE_MEM_2_REMAP 0x0ccc
-#define MV64x60_PCI1_SLAVE_MEM_3_REMAP 0x0dcc
-#define MV64x60_PCI1_SLAVE_DEV_0_REMAP 0x0cd0
-#define MV64x60_PCI1_SLAVE_DEV_1_REMAP 0x0dd0
-#define MV64x60_PCI1_SLAVE_DEV_2_REMAP 0x0dd8
-#define MV64x60_PCI1_SLAVE_DEV_3_REMAP 0x0cd4
-#define MV64x60_PCI1_SLAVE_BOOT_REMAP 0x0dd4
-#define MV64x60_PCI1_SLAVE_P2P_MEM_0_REMAP_LO 0x0ddc
-#define MV64x60_PCI1_SLAVE_P2P_MEM_0_REMAP_HI 0x0de0
-#define MV64x60_PCI1_SLAVE_P2P_MEM_1_REMAP_LO 0x0de4
-#define MV64x60_PCI1_SLAVE_P2P_MEM_1_REMAP_HI 0x0de8
-#define MV64x60_PCI1_SLAVE_P2P_IO_REMAP 0x0dec
-#define MV64x60_PCI1_SLAVE_CPU_REMAP 0x0df0
-
-#define MV64360_PCICFG_CPCI_HOTSWAP 0x68
-
-/*
- *****************************************************************************
- *
- * ENET Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* ENET Controller Window Registers (6 windows) */
-#define MV64360_ENET2MEM_WINDOWS 6
-
-#define MV64360_ENET2MEM_0_BASE 0x2200
-#define MV64360_ENET2MEM_0_SIZE 0x2204
-#define MV64360_ENET2MEM_1_BASE 0x2208
-#define MV64360_ENET2MEM_1_SIZE 0x220c
-#define MV64360_ENET2MEM_2_BASE 0x2210
-#define MV64360_ENET2MEM_2_SIZE 0x2214
-#define MV64360_ENET2MEM_3_BASE 0x2218
-#define MV64360_ENET2MEM_3_SIZE 0x221c
-#define MV64360_ENET2MEM_4_BASE 0x2220
-#define MV64360_ENET2MEM_4_SIZE 0x2224
-#define MV64360_ENET2MEM_5_BASE 0x2228
-#define MV64360_ENET2MEM_5_SIZE 0x222c
-
-#define MV64360_ENET2MEM_SNOOP_NONE 0x00000000
-#define MV64360_ENET2MEM_SNOOP_WT 0x00001000
-#define MV64360_ENET2MEM_SNOOP_WB 0x00002000
-
-#define MV64360_ENET2MEM_BAR_ENABLE 0x2290
-
-#define MV64360_ENET2MEM_ACC_PROT_0 0x2294
-#define MV64360_ENET2MEM_ACC_PROT_1 0x2298
-#define MV64360_ENET2MEM_ACC_PROT_2 0x229c
-
-/*
- *****************************************************************************
- *
- * MPSC Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* MPSC Controller Window Registers (4 windows) */
-#define MV64360_MPSC2MEM_WINDOWS 4
-
-#define MV64360_MPSC2MEM_0_BASE 0xf200
-#define MV64360_MPSC2MEM_0_SIZE 0xf204
-#define MV64360_MPSC2MEM_1_BASE 0xf208
-#define MV64360_MPSC2MEM_1_SIZE 0xf20c
-#define MV64360_MPSC2MEM_2_BASE 0xf210
-#define MV64360_MPSC2MEM_2_SIZE 0xf214
-#define MV64360_MPSC2MEM_3_BASE 0xf218
-#define MV64360_MPSC2MEM_3_SIZE 0xf21c
-
-#define MV64360_MPSC_0_REMAP 0xf240
-#define MV64360_MPSC_1_REMAP 0xf244
-
-#define MV64360_MPSC2MEM_SNOOP_NONE 0x00000000
-#define MV64360_MPSC2MEM_SNOOP_WT 0x00001000
-#define MV64360_MPSC2MEM_SNOOP_WB 0x00002000
-
-#define MV64360_MPSC2MEM_BAR_ENABLE 0xf250
-
-#define MV64360_MPSC2MEM_ACC_PROT_0 0xf254
-#define MV64360_MPSC2MEM_ACC_PROT_1 0xf258
-
-#define MV64360_MPSC2REGS_BASE 0xf25c
-
-/*
- *****************************************************************************
- *
- * Timer/Counter Interface Registers
- *
- *****************************************************************************
- */
-
-#define MV64x60_TIMR_CNTR_0 0x0850
-#define MV64x60_TIMR_CNTR_1 0x0854
-#define MV64x60_TIMR_CNTR_2 0x0858
-#define MV64x60_TIMR_CNTR_3 0x085c
-#define MV64x60_TIMR_CNTR_0_3_CNTL 0x0864
-#define MV64x60_TIMR_CNTR_0_3_INTR_CAUSE 0x0868
-#define MV64x60_TIMR_CNTR_0_3_INTR_MASK 0x086c
-
-#define GT64260_TIMR_CNTR_4 0x0950
-#define GT64260_TIMR_CNTR_5 0x0954
-#define GT64260_TIMR_CNTR_6 0x0958
-#define GT64260_TIMR_CNTR_7 0x095c
-#define GT64260_TIMR_CNTR_4_7_CNTL 0x0964
-#define GT64260_TIMR_CNTR_4_7_INTR_CAUSE 0x0968
-#define GT64260_TIMR_CNTR_4_7_INTR_MASK 0x096c
-
-/*
- *****************************************************************************
- *
- * Communications Controller
- *
- *****************************************************************************
- */
-
-#define GT64260_SER_INIT_PCI_ADDR_HI 0xf320
-#define GT64260_SER_INIT_LAST_DATA 0xf324
-#define GT64260_SER_INIT_CONTROL 0xf328
-#define GT64260_SER_INIT_STATUS 0xf32c
-
-#define MV64x60_COMM_ARBITER_CNTL 0xf300
-#define MV64x60_COMM_CONFIG 0xb40c
-#define MV64x60_COMM_XBAR_TO 0xf304
-#define MV64x60_COMM_INTR_CAUSE 0xf310
-#define MV64x60_COMM_INTR_MASK 0xf314
-#define MV64x60_COMM_ERR_ADDR 0xf318
-
-#define MV64360_COMM_ARBITER_CNTL 0xf300
-
-/*
- *****************************************************************************
- *
- * IDMA Controller Interface Registers
- *
- *****************************************************************************
- */
-
-/* IDMA Controller Window Registers (8 windows) */
-#define MV64360_IDMA2MEM_WINDOWS 8
-
-#define MV64360_IDMA2MEM_0_BASE 0x0a00
-#define MV64360_IDMA2MEM_0_SIZE 0x0a04
-#define MV64360_IDMA2MEM_1_BASE 0x0a08
-#define MV64360_IDMA2MEM_1_SIZE 0x0a0c
-#define MV64360_IDMA2MEM_2_BASE 0x0a10
-#define MV64360_IDMA2MEM_2_SIZE 0x0a14
-#define MV64360_IDMA2MEM_3_BASE 0x0a18
-#define MV64360_IDMA2MEM_3_SIZE 0x0a1c
-#define MV64360_IDMA2MEM_4_BASE 0x0a20
-#define MV64360_IDMA2MEM_4_SIZE 0x0a24
-#define MV64360_IDMA2MEM_5_BASE 0x0a28
-#define MV64360_IDMA2MEM_5_SIZE 0x0a2c
-#define MV64360_IDMA2MEM_6_BASE 0x0a30
-#define MV64360_IDMA2MEM_6_SIZE 0x0a34
-#define MV64360_IDMA2MEM_7_BASE 0x0a38
-#define MV64360_IDMA2MEM_7_SIZE 0x0a3c
-
-#define MV64360_IDMA2MEM_SNOOP_NONE 0x00000000
-#define MV64360_IDMA2MEM_SNOOP_WT 0x00001000
-#define MV64360_IDMA2MEM_SNOOP_WB 0x00002000
-
-#define MV64360_IDMA2MEM_BAR_ENABLE 0x0a80
-
-#define MV64360_IDMA2MEM_ACC_PROT_0 0x0a70
-#define MV64360_IDMA2MEM_ACC_PROT_1 0x0a74
-#define MV64360_IDMA2MEM_ACC_PROT_2 0x0a78
-#define MV64360_IDMA2MEM_ACC_PROT_3 0x0a7c
-
-#define MV64x60_IDMA_0_OFFSET 0x0800
-#define MV64x60_IDMA_1_OFFSET 0x0804
-#define MV64x60_IDMA_2_OFFSET 0x0808
-#define MV64x60_IDMA_3_OFFSET 0x080c
-#define MV64x60_IDMA_4_OFFSET 0x0900
-#define MV64x60_IDMA_5_OFFSET 0x0904
-#define MV64x60_IDMA_6_OFFSET 0x0908
-#define MV64x60_IDMA_7_OFFSET 0x090c
-
-#define MV64x60_IDMA_BYTE_COUNT (0x0800 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_SRC_ADDR (0x0810 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_DST_ADDR (0x0820 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_NEXT_DESC (0x0830 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_CUR_DESC (0x0870 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_SRC_PCI_ADDR_HI (0x0890 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_DST_PCI_ADDR_HI (0x08a0 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_NEXT_DESC_PCI_ADDR_HI (0x08b0 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_CONTROL_LO (0x0840 - MV64x60_IDMA_0_OFFSET)
-#define MV64x60_IDMA_CONTROL_HI (0x0880 - MV64x60_IDMA_0_OFFSET)
-
-#define MV64x60_IDMA_0_3_ARBITER_CNTL 0x0860
-#define MV64x60_IDMA_4_7_ARBITER_CNTL 0x0960
-
-#define MV64x60_IDMA_0_3_XBAR_TO 0x08d0
-#define MV64x60_IDMA_4_7_XBAR_TO 0x09d0
-
-#define MV64x60_IDMA_0_3_INTR_CAUSE 0x08c0
-#define MV64x60_IDMA_0_3_INTR_MASK 0x08c4
-#define MV64x60_IDMA_0_3_ERROR_ADDR 0x08c8
-#define MV64x60_IDMA_0_3_ERROR_SELECT 0x08cc
-#define MV64x60_IDMA_4_7_INTR_CAUSE 0x09c0
-#define MV64x60_IDMA_4_7_INTR_MASK 0x09c4
-#define MV64x60_IDMA_4_7_ERROR_ADDR 0x09c8
-#define MV64x60_IDMA_4_7_ERROR_SELECT 0x09cc
-
-/*
- *****************************************************************************
- *
- * Watchdog Timer Interface Registers
- *
- *****************************************************************************
- */
-
-#define MV64x60_WDT_WDC 0xb410
-#define MV64x60_WDT_WDV 0xb414
-
-
-/*
- *****************************************************************************
- *
- * General Purpose Pins Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define MV64x60_GPP_IO_CNTL 0xf100
-#define MV64x60_GPP_LEVEL_CNTL 0xf110
-#define MV64x60_GPP_VALUE 0xf104
-#define MV64x60_GPP_INTR_CAUSE 0xf108
-#define MV64x60_GPP_INTR_MASK 0xf10c
-#define MV64x60_GPP_VALUE_SET 0xf118
-#define MV64x60_GPP_VALUE_CLR 0xf11c
-
-
-/*
- *****************************************************************************
- *
- * Multi-Purpose Pins Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define MV64x60_MPP_CNTL_0 0xf000
-#define MV64x60_MPP_CNTL_1 0xf004
-#define MV64x60_MPP_CNTL_2 0xf008
-#define MV64x60_MPP_CNTL_3 0xf00c
-#define GT64260_MPP_SERIAL_PORTS_MULTIPLEX 0xf010
-
-#define MV64x60_ETH_BAR_GAP 0x8
-#define MV64x60_ETH_SIZE_REG_GAP 0x8
-#define MV64x60_ETH_HIGH_ADDR_REMAP_REG_GAP 0x4
-#define MV64x60_ETH_PORT_ACCESS_CTRL_GAP 0x4
-
-#define MV64x60_EBAR_ATTR_DRAM_CS0 0x00000E00
-#define MV64x60_EBAR_ATTR_DRAM_CS1 0x00000D00
-#define MV64x60_EBAR_ATTR_DRAM_CS2 0x00000B00
-#define MV64x60_EBAR_ATTR_DRAM_CS3 0x00000700
-
-#define MV64x60_EBAR_ATTR_CBS_SRAM_BLOCK0 0x00000000
-#define MV64x60_EBAR_ATTR_CBS_SRAM_BLOCK1 0x00000100
-#define MV64x60_EBAR_ATTR_CBS_SRAM 0x00000000
-#define MV64x60_EBAR_ATTR_CBS_CPU_BUS 0x00000800
-
-
-/*
- *****************************************************************************
- *
- * Interrupt Controller Interface Registers
- *
- *****************************************************************************
- */
-
-#define GT64260_IC_OFFSET 0x0c18
-
-#define GT64260_IC_MAIN_CAUSE_LO 0x0c18
-#define GT64260_IC_MAIN_CAUSE_HI 0x0c68
-#define GT64260_IC_CPU_INTR_MASK_LO 0x0c1c
-#define GT64260_IC_CPU_INTR_MASK_HI 0x0c6c
-#define GT64260_IC_CPU_SELECT_CAUSE 0x0c70
-#define GT64260_IC_PCI0_INTR_MASK_LO 0x0c24
-#define GT64260_IC_PCI0_INTR_MASK_HI 0x0c64
-#define GT64260_IC_PCI0_SELECT_CAUSE 0x0c74
-#define GT64260_IC_PCI1_INTR_MASK_LO 0x0ca4
-#define GT64260_IC_PCI1_INTR_MASK_HI 0x0ce4
-#define GT64260_IC_PCI1_SELECT_CAUSE 0x0cf4
-#define GT64260_IC_CPU_INT_0_MASK 0x0e60
-#define GT64260_IC_CPU_INT_1_MASK 0x0e64
-#define GT64260_IC_CPU_INT_2_MASK 0x0e68
-#define GT64260_IC_CPU_INT_3_MASK 0x0e6c
-
-#define MV64360_IC_OFFSET 0x0000
-
-#define MV64360_IC_MAIN_CAUSE_LO 0x0004
-#define MV64360_IC_MAIN_CAUSE_HI 0x000c
-#define MV64360_IC_CPU0_INTR_MASK_LO 0x0014
-#define MV64360_IC_CPU0_INTR_MASK_HI 0x001c
-#define MV64360_IC_CPU0_SELECT_CAUSE 0x0024
-#define MV64360_IC_CPU1_INTR_MASK_LO 0x0034
-#define MV64360_IC_CPU1_INTR_MASK_HI 0x003c
-#define MV64360_IC_CPU1_SELECT_CAUSE 0x0044
-#define MV64360_IC_INT0_MASK_LO 0x0054
-#define MV64360_IC_INT0_MASK_HI 0x005c
-#define MV64360_IC_INT0_SELECT_CAUSE 0x0064
-#define MV64360_IC_INT1_MASK_LO 0x0074
-#define MV64360_IC_INT1_MASK_HI 0x007c
-#define MV64360_IC_INT1_SELECT_CAUSE 0x0084
-
-#endif /* __ASMPPC_MV64x60_DEFS_H */
diff --git a/include/asm-ppc/ocp.h b/include/asm-ppc/ocp.h
deleted file mode 100644
index 3909a2e..0000000
--- a/include/asm-ppc/ocp.h
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * ocp.h
- *
- * (c) Benjamin Herrenschmidt (benh@kernel.crashing.org)
- * Mipsys - France
- *
- * Derived from work (c) Armin Kuster akuster@pacbell.net
- *
- * Additional support and port to 2.6 LDM/sysfs by
- * Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2003-2004 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * TODO: - Add get/put interface & fixup locking to provide same API for
- * 2.4 and 2.5
- * - Rework PM callbacks
- */
-
-#ifdef __KERNEL__
-#ifndef __OCP_H__
-#define __OCP_H__
-
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/device.h>
-#include <linux/rwsem.h>
-
-#include <asm/mmu.h>
-#include <asm/ocp_ids.h>
-
-#ifdef CONFIG_PPC_OCP
-
-#define OCP_MAX_IRQS 7
-#define MAX_EMACS 4
-#define OCP_IRQ_NA -1 /* used when ocp device does not have an irq */
-#define OCP_IRQ_MUL -2 /* used for ocp devices with multiply irqs */
-#define OCP_NULL_TYPE -1 /* used to mark end of list */
-#define OCP_CPM_NA 0 /* No Clock or Power Management avaliable */
-#define OCP_PADDR_NA 0 /* No MMIO registers */
-
-#define OCP_ANY_ID (~0)
-#define OCP_ANY_INDEX -1
-
-extern struct list_head ocp_devices;
-extern struct rw_semaphore ocp_devices_sem;
-
-struct ocp_device_id {
- unsigned int vendor, function; /* Vendor and function ID or OCP_ANY_ID */
- unsigned long driver_data; /* Data private to the driver */
-};
-
-
-/*
- * Static definition of an OCP device.
- *
- * @vendor: Vendor code. It is _STRONGLY_ discouraged to use
- * the vendor code as a way to match a unique device,
- * though I kept that possibility open, you should
- * really define different function codes for different
- * device types
- * @function: This is the function code for this device.
- * @index: This index is used for mapping the Nth function of a
- * given core. This is typically used for cross-driver
- * matching, like looking for a given MAL or ZMII from
- * an EMAC or for getting to the proper set of DCRs.
- * Indices are no longer magically calculated based on
- * structure ordering, they have to be actually coded
- * into the ocp_def to avoid any possible confusion
- * I _STRONGLY_ (again ? wow !) encourage anybody relying
- * on index mapping to encode the "target" index in an
- * associated structure pointed to by "additions", see
- * how it's done for the EMAC driver.
- * @paddr: Device physical address (may not mean anything...)
- * @irq: Interrupt line for this device (TODO: think about making
- * an array with this)
- * @pm: Currently, contains the bitmask in CPMFR DCR for the device
- * @additions: Optionally points to a function specific structure
- * providing additional informations for a given device
- * instance. It's currently used by the EMAC driver for MAL
- * channel & ZMII port mapping among others.
- * @show: Optionally points to a function specific structure
- * providing a sysfs show routine for additions fields.
- */
-struct ocp_def {
- unsigned int vendor;
- unsigned int function;
- int index;
- phys_addr_t paddr;
- int irq;
- unsigned long pm;
- void *additions;
- void (*show)(struct device *);
-};
-
-
-/* Struct for a given device instance */
-struct ocp_device {
- struct list_head link;
- char name[80]; /* device name */
- struct ocp_def *def; /* device definition */
- void *drvdata; /* driver data for this device */
- struct ocp_driver *driver;
- u32 current_state; /* Current operating state. In ACPI-speak,
- this is D0-D3, D0 being fully functional,
- and D3 being off. */
- struct device dev;
-};
-
-struct ocp_driver {
- struct list_head node;
- char *name;
- const struct ocp_device_id *id_table; /* NULL if wants all devices */
- int (*probe) (struct ocp_device *dev); /* New device inserted */
- void (*remove) (struct ocp_device *dev); /* Device removed (NULL if not a hot-plug capable driver) */
- int (*suspend) (struct ocp_device *dev, pm_message_t state); /* Device suspended */
- int (*resume) (struct ocp_device *dev); /* Device woken up */
- struct device_driver driver;
-};
-
-#define to_ocp_dev(n) container_of(n, struct ocp_device, dev)
-#define to_ocp_drv(n) container_of(n, struct ocp_driver, driver)
-
-/* Similar to the helpers above, these manipulate per-ocp_dev
- * driver-specific data. Currently stored as ocp_dev::ocpdev,
- * a void pointer, but it is not present on older kernels.
- */
-static inline void *
-ocp_get_drvdata(struct ocp_device *pdev)
-{
- return pdev->drvdata;
-}
-
-static inline void
-ocp_set_drvdata(struct ocp_device *pdev, void *data)
-{
- pdev->drvdata = data;
-}
-
-#if defined (CONFIG_PM)
-/*
- * This is right for the IBM 405 and 440 but will need to be
- * generalized if the OCP stuff gets used on other processors.
- */
-static inline void
-ocp_force_power_off(struct ocp_device *odev)
-{
- mtdcr(DCRN_CPMFR, mfdcr(DCRN_CPMFR) | odev->def->pm);
-}
-
-static inline void
-ocp_force_power_on(struct ocp_device *odev)
-{
- mtdcr(DCRN_CPMFR, mfdcr(DCRN_CPMFR) & ~odev->def->pm);
-}
-#else
-#define ocp_force_power_off(x) (void)(x)
-#define ocp_force_power_on(x) (void)(x)
-#endif
-
-/* Register/Unregister an OCP driver */
-extern int ocp_register_driver(struct ocp_driver *drv);
-extern void ocp_unregister_driver(struct ocp_driver *drv);
-
-/* Build list of devices */
-extern int ocp_early_init(void) __init;
-
-/* Find a device by index */
-extern struct ocp_device *ocp_find_device(unsigned int vendor, unsigned int function, int index);
-
-/* Get a def by index */
-extern struct ocp_def *ocp_get_one_device(unsigned int vendor, unsigned int function, int index);
-
-/* Add a device by index */
-extern int ocp_add_one_device(struct ocp_def *def);
-
-/* Remove a device by index */
-extern int ocp_remove_one_device(unsigned int vendor, unsigned int function, int index);
-
-/* Iterate over devices and execute a routine */
-extern void ocp_for_each_device(void(*callback)(struct ocp_device *, void *arg), void *arg);
-
-/* Sysfs support */
-#define OCP_SYSFS_ADDTL(type, format, name, field) \
-static ssize_t \
-show_##name##_##field(struct device *dev, struct device_attribute *attr, char *buf) \
-{ \
- struct ocp_device *odev = to_ocp_dev(dev); \
- type *add = odev->def->additions; \
- \
- return sprintf(buf, format, add->field); \
-} \
-static DEVICE_ATTR(name##_##field, S_IRUGO, show_##name##_##field, NULL);
-
-#ifdef CONFIG_IBM_OCP
-#include <asm/ibm_ocp.h>
-#endif
-
-#endif /* CONFIG_PPC_OCP */
-#endif /* __OCP_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ocp_ids.h b/include/asm-ppc/ocp_ids.h
deleted file mode 100644
index 8ae4b31..0000000
--- a/include/asm-ppc/ocp_ids.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * ocp_ids.h
- *
- * OCP device ids based on the ideas from PCI
- *
- * The numbers below are almost completely arbitrary, and in fact
- * strings might work better. -- paulus
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/*
- * Vender device
- * [xxxx] [xxxx]
- *
- * Keep in order, please
- */
-
-/* Vendor IDs 0x0001 - 0xFFFF copied from pci_ids.h */
-
-#define OCP_VENDOR_INVALID 0x0000
-#define OCP_VENDOR_ARM 0x0004
-#define OCP_VENDOR_FREESCALE 0x1057
-#define OCP_VENDOR_IBM 0x1014
-#define OCP_VENDOR_MOTOROLA OCP_VENDOR_FREESCALE
-#define OCP_VENDOR_XILINX 0x10ee
-#define OCP_VENDOR_UNKNOWN 0xFFFF
-
-/* device identification */
-
-/* define type */
-#define OCP_FUNC_INVALID 0x0000
-
-/* system 0x0001 - 0x001F */
-
-/* Timers 0x0020 - 0x002F */
-
-/* Serial 0x0030 - 0x006F*/
-#define OCP_FUNC_16550 0x0031
-#define OCP_FUNC_IIC 0x0032
-#define OCP_FUNC_USB 0x0033
-#define OCP_FUNC_PSC_UART 0x0034
-
-/* Memory devices 0x0090 - 0x009F */
-#define OCP_FUNC_MAL 0x0090
-#define OCP_FUNC_DMA 0x0091
-
-/* Display 0x00A0 - 0x00AF */
-
-/* Sound 0x00B0 - 0x00BF */
-
-/* Mass Storage 0x00C0 - 0xxCF */
-#define OCP_FUNC_IDE 0x00C0
-
-/* Misc 0x00D0 - 0x00DF*/
-#define OCP_FUNC_GPIO 0x00D0
-#define OCP_FUNC_ZMII 0x00D1
-#define OCP_FUNC_PERFMON 0x00D2 /* Performance Monitor */
-#define OCP_FUNC_RGMII 0x00D3
-#define OCP_FUNC_TAH 0x00D4
-#define OCP_FUNC_SEC2 0x00D5 /* Crypto/Security 2.0 */
-
-/* Network 0x0200 - 0x02FF */
-#define OCP_FUNC_EMAC 0x0200
-#define OCP_FUNC_GFAR 0x0201 /* TSEC & FEC */
-
-/* Bridge devices 0xE00 - 0xEFF */
-#define OCP_FUNC_OPB 0x0E00
-
-#define OCP_FUNC_UNKNOWN 0xFFFF
diff --git a/include/asm-ppc/open_pic.h b/include/asm-ppc/open_pic.h
deleted file mode 100644
index 778d572..0000000
--- a/include/asm-ppc/open_pic.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/*
- * include/asm-ppc/open_pic.h -- OpenPIC Interrupt Handling
- *
- * Copyright (C) 1997 Geert Uytterhoeven
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- *
- */
-
-#ifndef _PPC_KERNEL_OPEN_PIC_H
-#define _PPC_KERNEL_OPEN_PIC_H
-
-#include <linux/irq.h>
-
-#define OPENPIC_SIZE 0x40000
-
-/*
- * Non-offset'ed vector numbers
- */
-
-#define OPENPIC_VEC_TIMER 110 /* and up */
-#define OPENPIC_VEC_IPI 118 /* and up */
-#define OPENPIC_VEC_SPURIOUS 255
-
-/* Priorities */
-#define OPENPIC_PRIORITY_IPI_BASE 10
-#define OPENPIC_PRIORITY_DEFAULT 4
-#define OPENPIC_PRIORITY_NMI 9
-
-/* OpenPIC IRQ controller structure */
-extern struct hw_interrupt_type open_pic;
-
-/* OpenPIC IPI controller structure */
-#ifdef CONFIG_SMP
-extern struct hw_interrupt_type open_pic_ipi;
-#endif /* CONFIG_SMP */
-
-extern u_int OpenPIC_NumInitSenses;
-extern u_char *OpenPIC_InitSenses;
-extern void __iomem * OpenPIC_Addr;
-extern int epic_serial_mode;
-
-/* Exported functions */
-extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr);
-extern void openpic_init(int linux_irq_offset);
-extern void openpic_init_nmi_irq(u_int irq);
-extern void openpic_set_irq_priority(u_int irq, u_int pri);
-extern void openpic_hookup_cascade(u_int irq, char *name,
- int (*cascade_fn)(void));
-extern u_int openpic_irq(void);
-extern void openpic_eoi(void);
-extern void openpic_request_IPIs(void);
-extern void do_openpic_setup_cpu(void);
-extern int openpic_get_irq(void);
-extern void openpic_reset_processor_phys(u_int cpumask);
-extern void openpic_setup_ISU(int isu_num, unsigned long addr);
-extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask);
-extern void smp_openpic_message_pass(int target, int msg);
-extern void openpic_set_k2_cascade(int irq);
-extern void openpic_set_priority(u_int pri);
-extern u_int openpic_get_priority(void);
-
-extern inline int openpic_to_irq(int irq)
-{
- /* IRQ 0 usually means 'disabled'.. don't mess with it
- * exceptions to this (sandpoint maybe?)
- * shouldn't use openpic_to_irq
- */
- if (irq != 0){
- return irq += NUM_8259_INTERRUPTS;
- } else {
- return 0;
- }
-}
-/* Support for second openpic on G5 macs */
-
-// FIXME: To be replaced by sane cascaded controller management */
-
-#define PMAC_OPENPIC2_OFFSET 128
-
-#define OPENPIC2_VEC_TIMER 110 /* and up */
-#define OPENPIC2_VEC_IPI 118 /* and up */
-#define OPENPIC2_VEC_SPURIOUS 127
-
-
-extern void* OpenPIC2_Addr;
-
-/* Exported functions */
-extern void openpic2_set_sources(int first_irq, int num_irqs, void *isr);
-extern void openpic2_init(int linux_irq_offset);
-extern void openpic2_init_nmi_irq(u_int irq);
-extern u_int openpic2_irq(void);
-extern void openpic2_eoi(void);
-extern int openpic2_get_irq(void);
-extern void openpic2_setup_ISU(int isu_num, unsigned long addr);
-#endif /* _PPC_KERNEL_OPEN_PIC_H */
diff --git a/include/asm-ppc/page.h b/include/asm-ppc/page.h
deleted file mode 100644
index 37e4756..0000000
--- a/include/asm-ppc/page.h
+++ /dev/null
@@ -1,140 +0,0 @@
-#ifndef _PPC_PAGE_H
-#define _PPC_PAGE_H
-
-#include <asm/asm-compat.h>
-
-/* PAGE_SHIFT determines the page size */
-#define PAGE_SHIFT 12
-#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT)
-
-/*
- * Subtle: this is an int (not an unsigned long) and so it
- * gets extended to 64 bits the way want (i.e. with 1s). -- paulus
- */
-#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
-
-#ifdef __KERNEL__
-
-/* This must match what is in arch/ppc/Makefile */
-#define PAGE_OFFSET CONFIG_KERNEL_START
-#define KERNELBASE PAGE_OFFSET
-#define is_kernel_addr(x) ((x) >= PAGE_OFFSET)
-
-#ifndef __ASSEMBLY__
-
-/*
- * The basic type of a PTE - 64 bits for those CPUs with > 32 bit
- * physical addressing. For now this just the IBM PPC440.
- */
-#ifdef CONFIG_PTE_64BIT
-typedef unsigned long long pte_basic_t;
-#define PTE_SHIFT (PAGE_SHIFT - 3) /* 512 ptes per page */
-#define PTE_FMT "%16Lx"
-#else
-typedef unsigned long pte_basic_t;
-#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */
-#define PTE_FMT "%.8lx"
-#endif
-
-/* align addr on a size boundary - adjust address up/down if needed */
-#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1)))
-#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1)))
-
-/* align addr on a size boundary - adjust address up if needed */
-#define _ALIGN(addr,size) _ALIGN_UP(addr,size)
-
-/* to align the pointer to the (next) page boundary */
-#define PAGE_ALIGN(addr) _ALIGN(addr, PAGE_SIZE)
-
-
-#undef STRICT_MM_TYPECHECKS
-
-#ifdef STRICT_MM_TYPECHECKS
-/*
- * These are used to make use of C type-checking..
- */
-typedef struct { pte_basic_t pte; } pte_t;
-typedef struct { unsigned long pmd; } pmd_t;
-typedef struct { unsigned long pgd; } pgd_t;
-typedef struct { unsigned long pgprot; } pgprot_t;
-
-#define pte_val(x) ((x).pte)
-#define pmd_val(x) ((x).pmd)
-#define pgd_val(x) ((x).pgd)
-#define pgprot_val(x) ((x).pgprot)
-
-#define __pte(x) ((pte_t) { (x) } )
-#define __pmd(x) ((pmd_t) { (x) } )
-#define __pgd(x) ((pgd_t) { (x) } )
-#define __pgprot(x) ((pgprot_t) { (x) } )
-
-#else
-/*
- * .. while these make it easier on the compiler
- */
-typedef pte_basic_t pte_t;
-typedef unsigned long pmd_t;
-typedef unsigned long pgd_t;
-typedef unsigned long pgprot_t;
-
-#define pte_val(x) (x)
-#define pmd_val(x) (x)
-#define pgd_val(x) (x)
-#define pgprot_val(x) (x)
-
-#define __pte(x) (x)
-#define __pmd(x) (x)
-#define __pgd(x) (x)
-#define __pgprot(x) (x)
-
-#endif
-
-struct page;
-extern void clear_pages(void *page, int order);
-static inline void clear_page(void *page) { clear_pages(page, 0); }
-extern void copy_page(void *to, void *from);
-extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg);
-extern void copy_user_page(void *to, void *from, unsigned long vaddr,
- struct page *pg);
-
-#define PPC_MEMSTART 0
-#define PPC_MEMOFFSET PAGE_OFFSET
-
-#define ___pa(vaddr) ((vaddr)-PPC_MEMOFFSET)
-#define ___va(paddr) ((paddr)+PPC_MEMOFFSET)
-
-extern int page_is_ram(unsigned long pfn);
-
-#define __pa(x) ___pa((unsigned long)(x))
-#define __va(x) ((void *)(___va((unsigned long)(x))))
-
-#define ARCH_PFN_OFFSET 0
-#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
-#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
-
-#define pfn_valid(pfn) ((pfn) < max_mapnr)
-#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-
-/* Pure 2^n version of get_order */
-extern __inline__ int get_order(unsigned long size)
-{
- int lz;
-
- size = (size-1) >> PAGE_SHIFT;
- asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
- return 32 - lz;
-}
-
-typedef struct page *pgtable_t;
-
-#endif /* __ASSEMBLY__ */
-
-#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
- VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-
-/* We do define AT_SYSINFO_EHDR but don't use the gate mechanism */
-#define __HAVE_ARCH_GATE_AREA 1
-
-#include <asm-generic/memory_model.h>
-#endif /* __KERNEL__ */
-#endif /* _PPC_PAGE_H */
diff --git a/include/asm-ppc/pc_serial.h b/include/asm-ppc/pc_serial.h
deleted file mode 100644
index 81a2d0f..0000000
--- a/include/asm-ppc/pc_serial.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * include/asm-ppc/pc_serial.h
- *
- * This is basically a copy of include/asm-i386/serial.h.
- * It is used on platforms which have an ISA bus and thus are likely
- * to have PC-style serial ports at the legacy I/O port addresses.
- * It also includes the definitions for the fourport, accent, boca
- * and hub6 multiport serial cards, although I have never heard of
- * anyone using any of those on a PPC platform. -- paulus
- */
-
-
-/*
- * This assumes you have a 1.8432 MHz clock for your UART.
- *
- * It'd be nice if someone built a serial card with a 24.576 MHz
- * clock, since the 16550A is capable of handling a top speed of 1.5
- * megabits/second; but this requires the faster clock.
- */
-#define BASE_BAUD ( 1843200 / 16 )
-
-#ifdef CONFIG_SERIAL_MANY_PORTS
-#define RS_TABLE_SIZE 64
-#else
-#define RS_TABLE_SIZE 4
-#endif
-
-/* Standard COM flags (except for COM4, because of the 8514 problem) */
-#ifdef CONFIG_SERIAL_DETECT_IRQ
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
-#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
-#else
-#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
-#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
-#endif
-
-#define SERIAL_PORT_DFNS \
- /* UART CLK PORT IRQ FLAGS */ \
- { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
- { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
- { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
- { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h
deleted file mode 100644
index 4d35b84..0000000
--- a/include/asm-ppc/pci-bridge.h
+++ /dev/null
@@ -1,151 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _ASM_PCI_BRIDGE_H
-#define _ASM_PCI_BRIDGE_H
-
-#include <linux/ioport.h>
-#include <linux/pci.h>
-
-struct device_node;
-struct pci_controller;
-
-/*
- * pci_io_base returns the memory address at which you can access
- * the I/O space for PCI bus number `bus' (or NULL on error).
- */
-extern void __iomem *pci_bus_io_base(unsigned int bus);
-extern unsigned long pci_bus_io_base_phys(unsigned int bus);
-extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
-
-/* Allocate a new PCI host bridge structure */
-extern struct pci_controller* pcibios_alloc_controller(void);
-
-/* Helper function for setting up resources */
-extern void pci_init_resource(struct resource *res, resource_size_t start,
- resource_size_t end, int flags, char *name);
-
-/* Get the PCI host controller for a bus */
-extern struct pci_controller* pci_bus_to_hose(int bus);
-
-/* Get the PCI host controller for an OF device */
-extern struct pci_controller*
-pci_find_hose_for_OF_device(struct device_node* node);
-
-/* Fill up host controller resources from the OF node */
-extern void
-pci_process_bridge_OF_ranges(struct pci_controller *hose,
- struct device_node *dev, int primary);
-
-/*
- * Structure of a PCI controller (host bridge)
- */
-struct pci_controller {
- int index; /* PCI domain number */
- struct pci_controller *next;
- struct pci_bus *bus;
- void *arch_data;
- struct device *parent;
-
- int first_busno;
- int last_busno;
- int bus_offset;
-
- void __iomem *io_base_virt;
- resource_size_t io_base_phys;
-
- /* Some machines (PReP) have a non 1:1 mapping of
- * the PCI memory space in the CPU bus space
- */
- resource_size_t pci_mem_offset;
-
- struct pci_ops *ops;
- volatile unsigned int __iomem *cfg_addr;
- volatile void __iomem *cfg_data;
- /*
- * If set, indirect method will set the cfg_type bit as
- * needed to generate type 1 configuration transactions.
- */
- int set_cfg_type;
-
- /* Currently, we limit ourselves to 1 IO range and 3 mem
- * ranges since the common pci_bus structure can't handle more
- */
- struct resource io_resource;
- struct resource mem_resources[3];
- int mem_resource_count;
-
- /* Host bridge I/O and Memory space
- * Used for BAR placement algorithms
- */
- struct resource io_space;
- struct resource mem_space;
-};
-
-static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
-{
- return bus->sysdata;
-}
-
-/* These are used for config access before all the PCI probing
- has been done. */
-int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn,
- int where, u8 *val);
-int early_read_config_word(struct pci_controller *hose, int bus, int dev_fn,
- int where, u16 *val);
-int early_read_config_dword(struct pci_controller *hose, int bus, int dev_fn,
- int where, u32 *val);
-int early_write_config_byte(struct pci_controller *hose, int bus, int dev_fn,
- int where, u8 val);
-int early_write_config_word(struct pci_controller *hose, int bus, int dev_fn,
- int where, u16 val);
-int early_write_config_dword(struct pci_controller *hose, int bus, int dev_fn,
- int where, u32 val);
-
-extern void setup_indirect_pci_nomap(struct pci_controller* hose,
- void __iomem *cfg_addr, void __iomem *cfg_data);
-extern void setup_indirect_pci(struct pci_controller* hose,
- u32 cfg_addr, u32 cfg_data);
-extern void setup_grackle(struct pci_controller *hose);
-
-extern unsigned char common_swizzle(struct pci_dev *, unsigned char *);
-
-/*
- * The following code swizzles for exactly one bridge. The routine
- * common_swizzle below handles multiple bridges. But there are a
- * some boards that don't follow the PCI spec's suggestion so we
- * break this piece out separately.
- */
-static inline unsigned char bridge_swizzle(unsigned char pin,
- unsigned char idsel)
-{
- return (((pin-1) + idsel) % 4) + 1;
-}
-
-/*
- * The following macro is used to lookup irqs in a standard table
- * format for those PPC systems that do not already have PCI
- * interrupts properly routed.
- */
-/* FIXME - double check this */
-#define PCI_IRQ_TABLE_LOOKUP \
-({ long _ctl_ = -1; \
- if (idsel >= min_idsel && idsel <= max_idsel && pin <= irqs_per_slot) \
- _ctl_ = pci_irq_table[idsel - min_idsel][pin-1]; \
- _ctl_; })
-
-/*
- * Scan the buses below a given PCI host bridge and assign suitable
- * resources to all devices found.
- */
-extern int pciauto_bus_scan(struct pci_controller *, int);
-
-#ifdef CONFIG_PCI
-extern unsigned long pci_address_to_pio(phys_addr_t address);
-#else
-static inline unsigned long pci_address_to_pio(phys_addr_t address)
-{
- return (unsigned long)-1;
-}
-#endif
-
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
deleted file mode 100644
index d2442cd..0000000
--- a/include/asm-ppc/pci.h
+++ /dev/null
@@ -1,156 +0,0 @@
-#ifndef __PPC_PCI_H
-#define __PPC_PCI_H
-#ifdef __KERNEL__
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <asm/scatterlist.h>
-#include <asm/io.h>
-#include <asm/pci-bridge.h>
-#include <asm-generic/pci-dma-compat.h>
-
-struct pci_dev;
-
-/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
-#define IOBASE_BRIDGE_NUMBER 0
-#define IOBASE_MEMORY 1
-#define IOBASE_IO 2
-#define IOBASE_ISA_IO 3
-#define IOBASE_ISA_MEM 4
-
-/*
- * Set this to 1 if you want the kernel to re-assign all PCI
- * bus numbers
- */
-extern int pci_assign_all_buses;
-
-#define pcibios_assign_all_busses() (pci_assign_all_buses)
-#define pcibios_scan_all_fns(a, b) 0
-
-#define PCIBIOS_MIN_IO 0x1000
-#define PCIBIOS_MIN_MEM 0x10000000
-
-extern inline void pcibios_set_master(struct pci_dev *dev)
-{
- /* No special bus mastering setup handling */
-}
-
-extern inline void pcibios_penalize_isa_irq(int irq, int active)
-{
- /* We don't do dynamic PCI IRQ allocation */
-}
-
-extern unsigned long pci_resource_to_bus(struct pci_dev *pdev, struct resource *res);
-
-/*
- * The PCI bus bridge can translate addresses issued by the processor(s)
- * into a different address on the PCI bus. On 32-bit cpus, we assume
- * this mapping is 1-1, but on 64-bit systems it often isn't.
- *
- * Obsolete ! Drivers should now use pci_resource_to_bus
- */
-extern unsigned long phys_to_bus(unsigned long pa);
-extern unsigned long pci_phys_to_bus(unsigned long pa, int busnr);
-extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr);
-
-/* The PCI address space does equal the physical memory
- * address space. The networking and block device layers use
- * this boolean for bounce buffer decisions.
- */
-#define PCI_DMA_BUS_IS_PHYS (1)
-
-#ifdef CONFIG_NOT_COHERENT_CACHE
-/*
- * pci_unmap_{page,single} are NOPs but pci_dma_sync_single_for_cpu()
- * and so on are not, so...
- */
-
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
- dma_addr_t ADDR_NAME;
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
- __u32 LEN_NAME;
-#define pci_unmap_addr(PTR, ADDR_NAME) \
- ((PTR)->ADDR_NAME)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
- (((PTR)->ADDR_NAME) = (VAL))
-#define pci_unmap_len(PTR, LEN_NAME) \
- ((PTR)->LEN_NAME)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
- (((PTR)->LEN_NAME) = (VAL))
-
-#else /* coherent */
-
-/* pci_unmap_{page,single} is a nop so... */
-#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
-#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
-#define pci_unmap_addr(PTR, ADDR_NAME) (0)
-#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
-#define pci_unmap_len(PTR, LEN_NAME) (0)
-#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
-
-#endif /* CONFIG_NOT_COHERENT_CACHE */
-
-#ifdef CONFIG_PCI
-static inline void pci_dma_burst_advice(struct pci_dev *pdev,
- enum pci_dma_burst_strategy *strat,
- unsigned long *strategy_parameter)
-{
- *strat = PCI_DMA_BURST_INFINITY;
- *strategy_parameter = ~0UL;
-}
-#endif
-
-/* Return the index of the PCI controller for device PDEV. */
-#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
-
-/* Set the name of the bus as it appears in /proc/bus/pci */
-static inline int pci_proc_domain(struct pci_bus *bus)
-{
- return 0;
-}
-
-/* Map a range of PCI memory or I/O space for a device into user space */
-int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
- enum pci_mmap_state mmap_state, int write_combine);
-
-/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
-#define HAVE_PCI_MMAP 1
-
-extern void
-pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res);
-
-extern void
-pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region);
-
-static inline struct resource *
-pcibios_select_root(struct pci_dev *pdev, struct resource *res)
-{
- struct resource *root = NULL;
-
- if (res->flags & IORESOURCE_IO)
- root = &ioport_resource;
- if (res->flags & IORESOURCE_MEM)
- root = &iomem_resource;
-
- return root;
-}
-
-struct file;
-extern pgprot_t pci_phys_mem_access_prot(struct file *file,
- unsigned long pfn,
- unsigned long size,
- pgprot_t prot);
-
-#define HAVE_ARCH_PCI_RESOURCE_TO_USER
-extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
- const struct resource *rsrc,
- resource_size_t *start, resource_size_t *end);
-
-
-#endif /* __KERNEL__ */
-
-#endif /* __PPC_PCI_H */
diff --git a/include/asm-ppc/pgalloc.h b/include/asm-ppc/pgalloc.h
deleted file mode 100644
index fd4d1d7..0000000
--- a/include/asm-ppc/pgalloc.h
+++ /dev/null
@@ -1,45 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_PGALLOC_H
-#define _PPC_PGALLOC_H
-
-#include <linux/threads.h>
-
-extern void __bad_pte(pmd_t *pmd);
-
-extern pgd_t *pgd_alloc(struct mm_struct *mm);
-extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
-
-/*
- * We don't have any real pmd's, and this code never triggers because
- * the pgd will always be present..
- */
-#define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); })
-#define pmd_free(mm, x) do { } while (0)
-#define __pmd_free_tlb(tlb,x) do { } while (0)
-#define pgd_populate(mm, pmd, pte) BUG()
-
-#ifndef CONFIG_BOOKE
-#define pmd_populate_kernel(mm, pmd, pte) \
- (pmd_val(*(pmd)) = __pa(pte) | _PMD_PRESENT)
-#define pmd_populate(mm, pmd, pte) \
- (pmd_val(*(pmd)) = (page_to_pfn(pte) << PAGE_SHIFT) | _PMD_PRESENT)
-#define pmd_pgtable(pmd) pmd_page(pmd)
-#else
-#define pmd_populate_kernel(mm, pmd, pte) \
- (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT)
-#define pmd_populate(mm, pmd, pte) \
- (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT)
-#define pmd_pgtable(pmd) pmd_page(pmd)
-#endif
-
-extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
-extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
-extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte);
-extern void pte_free(struct mm_struct *mm, pgtable_t pte);
-
-#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte))
-
-#define check_pgt_cache() do { } while (0)
-
-#endif /* _PPC_PGALLOC_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
deleted file mode 100644
index 55f9d38..0000000
--- a/include/asm-ppc/pgtable.h
+++ /dev/null
@@ -1,771 +0,0 @@
-#ifdef __KERNEL__
-#ifndef _PPC_PGTABLE_H
-#define _PPC_PGTABLE_H
-
-#include <asm-generic/4level-fixup.h>
-
-
-#ifndef __ASSEMBLY__
-#include <linux/sched.h>
-#include <linux/threads.h>
-#include <asm/processor.h> /* For TASK_SIZE */
-#include <asm/mmu.h>
-#include <asm/page.h>
-#include <asm/io.h> /* For sub-arch specific PPC_PIN_SIZE */
-struct mm_struct;
-
-extern unsigned long va_to_phys(unsigned long address);
-extern pte_t *va_to_pte(unsigned long address);
-extern unsigned long ioremap_bot, ioremap_base;
-#endif /* __ASSEMBLY__ */
-
-/*
- * The PowerPC MMU uses a hash table containing PTEs, together with
- * a set of 16 segment registers (on 32-bit implementations), to define
- * the virtual to physical address mapping.
- *
- * We use the hash table as an extended TLB, i.e. a cache of currently
- * active mappings. We maintain a two-level page table tree, much
- * like that used by the i386, for the sake of the Linux memory
- * management code. Low-level assembler code in hashtable.S
- * (procedure hash_page) is responsible for extracting ptes from the
- * tree and putting them into the hash table when necessary, and
- * updating the accessed and modified bits in the page table tree.
- */
-
-/*
- * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk.
- * We also use the two level tables, but we can put the real bits in them
- * needed for the TLB and tablewalk. These definitions require Mx_CTR.PPM = 0,
- * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1. The level 2 descriptor has
- * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit
- * based upon user/super access. The TLB does not have accessed nor write
- * protect. We assume that if the TLB get loaded with an entry it is
- * accessed, and overload the changed bit for write protect. We use
- * two bits in the software pte that are supposed to be set to zero in
- * the TLB entry (24 and 25) for these indicators. Although the level 1
- * descriptor contains the guarded and writethrough/copyback bits, we can
- * set these at the page level since they get copied from the Mx_TWC
- * register when the TLB entry is loaded. We will use bit 27 for guard, since
- * that is where it exists in the MD_TWC, and bit 26 for writethrough.
- * These will get masked from the level 2 descriptor at TLB load time, and
- * copied to the MD_TWC before it gets loaded.
- * Large page sizes added. We currently support two sizes, 4K and 8M.
- * This also allows a TLB hander optimization because we can directly
- * load the PMD into MD_TWC. The 8M pages are only used for kernel
- * mapping of well known areas. The PMD (PGD) entries contain control
- * flags in addition to the address, so care must be taken that the
- * software no longer assumes these are only pointers.
- */
-
-/*
- * At present, all PowerPC 400-class processors share a similar TLB
- * architecture. The instruction and data sides share a unified,
- * 64-entry, fully-associative TLB which is maintained totally under
- * software control. In addition, the instruction side has a
- * hardware-managed, 4-entry, fully-associative TLB which serves as a
- * first level to the shared TLB. These two TLBs are known as the UTLB
- * and ITLB, respectively (see "mmu.h" for definitions).
- */
-
-/*
- * The normal case is that PTEs are 32-bits and we have a 1-page
- * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus
- *
- * For any >32-bit physical address platform, we can use the following
- * two level page table layout where the pgdir is 8KB and the MS 13 bits
- * are an index to the second level table. The combined pgdir/pmd first
- * level has 2048 entries and the second level has 512 64-bit PTE entries.
- * -Matt
- */
-/* PMD_SHIFT determines the size of the area mapped by the PTE pages */
-#define PMD_SHIFT (PAGE_SHIFT + PTE_SHIFT)
-#define PMD_SIZE (1UL << PMD_SHIFT)
-#define PMD_MASK (~(PMD_SIZE-1))
-
-/* PGDIR_SHIFT determines what a top-level page table entry can map */
-#define PGDIR_SHIFT PMD_SHIFT
-#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
-#define PGDIR_MASK (~(PGDIR_SIZE-1))
-
-/*
- * entries per page directory level: our page-table tree is two-level, so
- * we don't really have any PMD directory.
- */
-#define PTRS_PER_PTE (1 << PTE_SHIFT)
-#define PTRS_PER_PMD 1
-#define PTRS_PER_PGD (1 << (32 - PGDIR_SHIFT))
-
-#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
-#define FIRST_USER_ADDRESS 0
-
-#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
-#define KERNEL_PGD_PTRS (PTRS_PER_PGD-USER_PGD_PTRS)
-
-#define pte_ERROR(e) \
- printk("%s:%d: bad pte "PTE_FMT".\n", __FILE__, __LINE__, pte_val(e))
-#define pmd_ERROR(e) \
- printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
-#define pgd_ERROR(e) \
- printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
-
-/*
- * Just any arbitrary offset to the start of the vmalloc VM area: the
- * current 64MB value just means that there will be a 64MB "hole" after the
- * physical memory until the kernel virtual memory starts. That means that
- * any out-of-bounds memory accesses will hopefully be caught.
- * The vmalloc() routines leaves a hole of 4kB between each vmalloced
- * area for the same reason. ;)
- *
- * We no longer map larger than phys RAM with the BATs so we don't have
- * to worry about the VMALLOC_OFFSET causing problems. We do have to worry
- * about clashes between our early calls to ioremap() that start growing down
- * from ioremap_base being run into the VM area allocations (growing upwards
- * from VMALLOC_START). For this reason we have ioremap_bot to check when
- * we actually run into our mappings setup in the early boot with the VM
- * system. This really does become a problem for machines with good amounts
- * of RAM. -- Cort
- */
-#define VMALLOC_OFFSET (0x1000000) /* 16M */
-#ifdef PPC_PIN_SIZE
-#define VMALLOC_START (((_ALIGN((long)high_memory, PPC_PIN_SIZE) + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)))
-#else
-#define VMALLOC_START ((((long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)))
-#endif
-#define VMALLOC_END ioremap_bot
-
-/*
- * Bits in a linux-style PTE. These match the bits in the
- * (hardware-defined) PowerPC PTE as closely as possible.
- */
-
-#if defined(CONFIG_40x)
-
-/* There are several potential gotchas here. The 40x hardware TLBLO
- field looks like this:
-
- 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31
- RPN..................... 0 0 EX WR ZSEL....... W I M G
-
- Where possible we make the Linux PTE bits match up with this
-
- - bits 20 and 21 must be cleared, because we use 4k pages (40x can
- support down to 1k pages), this is done in the TLBMiss exception
- handler.
- - We use only zones 0 (for kernel pages) and 1 (for user pages)
- of the 16 available. Bit 24-26 of the TLB are cleared in the TLB
- miss handler. Bit 27 is PAGE_USER, thus selecting the correct
- zone.
- - PRESENT *must* be in the bottom two bits because swap cache
- entries use the top 30 bits. Because 40x doesn't support SMP
- anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30
- is cleared in the TLB miss handler before the TLB entry is loaded.
- - All other bits of the PTE are loaded into TLBLO without
- modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for
- software PTE bits. We actually use use bits 21, 24, 25, and
- 30 respectively for the software bits: ACCESSED, DIRTY, RW, and
- PRESENT.
-*/
-
-/* Definitions for 40x embedded chips. */
-#define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */
-#define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */
-#define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */
-#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */
-#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */
-#define _PAGE_USER 0x010 /* matches one of the zone permission bits */
-#define _PAGE_RW 0x040 /* software: Writes permitted */
-#define _PAGE_DIRTY 0x080 /* software: dirty page */
-#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */
-#define _PAGE_HWEXEC 0x200 /* hardware: EX permission */
-#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */
-
-#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */
-#define _PMD_BAD 0x802
-#define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */
-#define _PMD_SIZE_4M 0x0c0
-#define _PMD_SIZE_16M 0x0e0
-#define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4))
-
-#elif defined(CONFIG_44x)
-/*
- * Definitions for PPC440
- *
- * Because of the 3 word TLB entries to support 36-bit addressing,
- * the attribute are difficult to map in such a fashion that they
- * are easily loaded during exception processing. I decided to
- * organize the entry so the ERPN is the only portion in the
- * upper word of the PTE and the attribute bits below are packed
- * in as sensibly as they can be in the area below a 4KB page size
- * oriented RPN. This at least makes it easy to load the RPN and
- * ERPN fields in the TLB. -Matt
- *
- * Note that these bits preclude future use of a page size
- * less than 4KB.
- *
- *
- * PPC 440 core has following TLB attribute fields;
- *
- * TLB1:
- * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
- * RPN................................. - - - - - - ERPN.......
- *
- * TLB2:
- * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
- * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
- *
- * There are some constrains and options, to decide mapping software bits
- * into TLB entry.
- *
- * - PRESENT *must* be in the bottom three bits because swap cache
- * entries use the top 29 bits for TLB2.
- *
- * - FILE *must* be in the bottom three bits because swap cache
- * entries use the top 29 bits for TLB2.
- *
- * - CACHE COHERENT bit (M) has no effect on PPC440 core, because it
- * doesn't support SMP. So we can use this as software bit, like
- * DIRTY.
- *
- * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used
- * for memory protection related functions (see PTE structure in
- * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the
- * above bits. Note that the bit values are CPU specific, not architecture
- * specific.
- *
- * The kernel PTE entry holds an arch-dependent swp_entry structure under
- * certain situations. In other words, in such situations some portion of
- * the PTE bits are used as a swp_entry. In the PPC implementation, the
- * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still
- * hold protection values. That means the three protection bits are
- * reserved for both PTE and SWAP entry at the most significant three
- * LSBs.
- *
- * There are three protection bits available for SWAP entry:
- * _PAGE_PRESENT
- * _PAGE_FILE
- * _PAGE_HASHPTE (if HW has)
- *
- * So those three bits have to be inside of 0-2nd LSB of PTE.
- *
- */
-
-#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
-#define _PAGE_RW 0x00000002 /* S: Write permission */
-#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
-#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
-#define _PAGE_HWWRITE 0x00000010 /* H: Dirty & RW */
-#define _PAGE_HWEXEC 0x00000020 /* H: Execute permission */
-#define _PAGE_USER 0x00000040 /* S: User page */
-#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
-#define _PAGE_GUARDED 0x00000100 /* H: G bit */
-#define _PAGE_DIRTY 0x00000200 /* S: Page dirty */
-#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
-#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
-
-/* TODO: Add large page lowmem mapping support */
-#define _PMD_PRESENT 0
-#define _PMD_PRESENT_MASK (PAGE_MASK)
-#define _PMD_BAD (~PAGE_MASK)
-
-/* ERPN in a PTE never gets cleared, ignore it */
-#define _PTE_NONE_MASK 0xffffffff00000000ULL
-
-#elif defined(CONFIG_8xx)
-/* Definitions for 8xx embedded chips. */
-#define _PAGE_PRESENT 0x0001 /* Page is valid */
-#define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */
-#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */
-#define _PAGE_SHARED 0x0004 /* No ASID (context) compare */
-
-/* These five software bits must be masked out when the entry is loaded
- * into the TLB.
- */
-#define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */
-#define _PAGE_GUARDED 0x0010 /* software: guarded access */
-#define _PAGE_DIRTY 0x0020 /* software: page changed */
-#define _PAGE_RW 0x0040 /* software: user write access allowed */
-#define _PAGE_ACCESSED 0x0080 /* software: page referenced */
-
-/* Setting any bits in the nibble with the follow two controls will
- * require a TLB exception handler change. It is assumed unused bits
- * are always zero.
- */
-#define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */
-#define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */
-
-#define _PMD_PRESENT 0x0001
-#define _PMD_BAD 0x0ff0
-#define _PMD_PAGE_MASK 0x000c
-#define _PMD_PAGE_8M 0x000c
-
-#define _PTE_NONE_MASK _PAGE_ACCESSED
-
-#else /* CONFIG_6xx */
-/* Definitions for 60x, 740/750, etc. */
-#define _PAGE_PRESENT 0x001 /* software: pte contains a translation */
-#define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */
-#define _PAGE_FILE 0x004 /* when !present: nonlinear file mapping */
-#define _PAGE_USER 0x004 /* usermode access allowed */
-#define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */
-#define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */
-#define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */
-#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */
-#define _PAGE_DIRTY 0x080 /* C: page changed */
-#define _PAGE_ACCESSED 0x100 /* R: page referenced */
-#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
-#define _PAGE_RW 0x400 /* software: user write access allowed */
-
-#define _PTE_NONE_MASK _PAGE_HASHPTE
-
-#define _PMD_PRESENT 0
-#define _PMD_PRESENT_MASK (PAGE_MASK)
-#define _PMD_BAD (~PAGE_MASK)
-#endif
-
-/*
- * Some bits are only used on some cpu families...
- */
-#ifndef _PAGE_HASHPTE
-#define _PAGE_HASHPTE 0
-#endif
-#ifndef _PTE_NONE_MASK
-#define _PTE_NONE_MASK 0
-#endif
-#ifndef _PAGE_SHARED
-#define _PAGE_SHARED 0
-#endif
-#ifndef _PAGE_HWWRITE
-#define _PAGE_HWWRITE 0
-#endif
-#ifndef _PAGE_HWEXEC
-#define _PAGE_HWEXEC 0
-#endif
-#ifndef _PAGE_EXEC
-#define _PAGE_EXEC 0
-#endif
-#ifndef _PMD_PRESENT_MASK
-#define _PMD_PRESENT_MASK _PMD_PRESENT
-#endif
-#ifndef _PMD_SIZE
-#define _PMD_SIZE 0
-#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
-#endif
-
-#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
-
-/*
- * Note: the _PAGE_COHERENT bit automatically gets set in the hardware
- * PTE if CONFIG_SMP is defined (hash_page does this); there is no need
- * to have it in the Linux PTE, and in fact the bit could be reused for
- * another purpose. -- paulus.
- */
-
-#ifdef CONFIG_44x
-#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_GUARDED)
-#else
-#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
-#endif
-#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE)
-#define _PAGE_KERNEL (_PAGE_BASE | _PAGE_SHARED | _PAGE_WRENABLE)
-
-#ifdef CONFIG_PPC_STD_MMU
-/* On standard PPC MMU, no user access implies kernel read/write access,
- * so to write-protect kernel memory we must turn on user access */
-#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED | _PAGE_USER)
-#else
-#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED)
-#endif
-
-#define _PAGE_IO (_PAGE_KERNEL | _PAGE_NO_CACHE | _PAGE_GUARDED)
-#define _PAGE_RAM (_PAGE_KERNEL | _PAGE_HWEXEC)
-
-#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH)
-/* We want the debuggers to be able to set breakpoints anywhere, so
- * don't write protect the kernel text */
-#define _PAGE_RAM_TEXT _PAGE_RAM
-#else
-#define _PAGE_RAM_TEXT (_PAGE_KERNEL_RO | _PAGE_HWEXEC)
-#endif
-
-#define PAGE_NONE __pgprot(_PAGE_BASE)
-#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
-#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
-#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
-#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
-
-#define PAGE_KERNEL __pgprot(_PAGE_RAM)
-#define PAGE_KERNEL_NOCACHE __pgprot(_PAGE_IO)
-
-/*
- * The PowerPC can only do execute protection on a segment (256MB) basis,
- * not on a page basis. So we consider execute permission the same as read.
- * Also, write permissions imply read permissions.
- * This is the closest we can get..
- */
-#define __P000 PAGE_NONE
-#define __P001 PAGE_READONLY_X
-#define __P010 PAGE_COPY
-#define __P011 PAGE_COPY_X
-#define __P100 PAGE_READONLY
-#define __P101 PAGE_READONLY_X
-#define __P110 PAGE_COPY
-#define __P111 PAGE_COPY_X
-
-#define __S000 PAGE_NONE
-#define __S001 PAGE_READONLY_X
-#define __S010 PAGE_SHARED
-#define __S011 PAGE_SHARED_X
-#define __S100 PAGE_READONLY
-#define __S101 PAGE_READONLY_X
-#define __S110 PAGE_SHARED
-#define __S111 PAGE_SHARED_X
-
-#ifndef __ASSEMBLY__
-/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
- * kernel without large page PMD support */
-extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
-
-/*
- * Conversions between PTE values and page frame numbers.
- */
-
-/* in some case we want to additionaly adjust where the pfn is in the pte to
- * allow room for more flags */
-#define PFN_SHIFT_OFFSET (PAGE_SHIFT)
-
-#define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET)
-#define pte_page(x) pfn_to_page(pte_pfn(x))
-
-#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\
- pgprot_val(prot))
-#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
-
-/*
- * ZERO_PAGE is a global shared page that is always zero: used
- * for zero-mapped memory areas etc..
- */
-extern unsigned long empty_zero_page[1024];
-#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
-
-#endif /* __ASSEMBLY__ */
-
-#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
-#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
-#define pte_clear(mm,addr,ptep) do { set_pte_at((mm), (addr), (ptep), __pte(0)); } while (0)
-
-#define pmd_none(pmd) (!pmd_val(pmd))
-#define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD)
-#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK)
-#define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0)
-
-#ifndef __ASSEMBLY__
-/*
- * The "pgd_xxx()" functions here are trivial for a folded two-level
- * setup: the pgd is never bad, and a pmd always exists (as it's folded
- * into the pgd entry)
- */
-static inline int pgd_none(pgd_t pgd) { return 0; }
-static inline int pgd_bad(pgd_t pgd) { return 0; }
-static inline int pgd_present(pgd_t pgd) { return 1; }
-#define pgd_clear(xp) do { } while (0)
-
-#define pgd_page_vaddr(pgd) \
- ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
-
-/*
- * The following only work if pte_present() is true.
- * Undefined behaviour if not..
- */
-static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
-static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
-static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
-static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
-static inline int pte_special(pte_t pte) { return 0; }
-
-static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
-static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
-
-static inline pte_t pte_wrprotect(pte_t pte) {
- pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
-static inline pte_t pte_mkclean(pte_t pte) {
- pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
-static inline pte_t pte_mkold(pte_t pte) {
- pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
-
-static inline pte_t pte_mkwrite(pte_t pte) {
- pte_val(pte) |= _PAGE_RW; return pte; }
-static inline pte_t pte_mkdirty(pte_t pte) {
- pte_val(pte) |= _PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkyoung(pte_t pte) {
- pte_val(pte) |= _PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkspecial(pte_t pte) {
- return pte; }
-
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{
- pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
- return pte;
-}
-
-/*
- * When flushing the tlb entry for a page, we also need to flush the hash
- * table entry. flush_hash_pages is assembler (for speed) in hashtable.S.
- */
-extern int flush_hash_pages(unsigned context, unsigned long va,
- unsigned long pmdval, int count);
-
-/* Add an HPTE to the hash table */
-extern void add_hash_page(unsigned context, unsigned long va,
- unsigned long pmdval);
-
-/*
- * Atomic PTE updates.
- *
- * pte_update clears and sets bit atomically, and returns
- * the old pte value. In the 64-bit PTE case we lock around the
- * low PTE word since we expect ALL flag bits to be there
- */
-#ifndef CONFIG_PTE_64BIT
-static inline unsigned long pte_update(pte_t *p, unsigned long clr,
- unsigned long set)
-{
- unsigned long old, tmp;
-
- __asm__ __volatile__("\
-1: lwarx %0,0,%3\n\
- andc %1,%0,%4\n\
- or %1,%1,%5\n"
- PPC405_ERR77(0,%3)
-" stwcx. %1,0,%3\n\
- bne- 1b"
- : "=&r" (old), "=&r" (tmp), "=m" (*p)
- : "r" (p), "r" (clr), "r" (set), "m" (*p)
- : "cc" );
- return old;
-}
-#else
-static inline unsigned long long pte_update(pte_t *p, unsigned long clr,
- unsigned long set)
-{
- unsigned long long old;
- unsigned long tmp;
-
- __asm__ __volatile__("\
-1: lwarx %L0,0,%4\n\
- lwzx %0,0,%3\n\
- andc %1,%L0,%5\n\
- or %1,%1,%6\n"
- PPC405_ERR77(0,%3)
-" stwcx. %1,0,%4\n\
- bne- 1b"
- : "=&r" (old), "=&r" (tmp), "=m" (*p)
- : "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p)
- : "cc" );
- return old;
-}
-#endif
-
-/*
- * set_pte stores a linux PTE into the linux page table.
- * On machines which use an MMU hash table we avoid changing the
- * _PAGE_HASHPTE bit.
- */
-static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
- pte_t *ptep, pte_t pte)
-{
-#if _PAGE_HASHPTE != 0
- pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE);
-#else
- *ptep = pte;
-#endif
-}
-
-/*
- * 2.6 calles this without flushing the TLB entry, this is wrong
- * for our hash-based implementation, we fix that up here
- */
-#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
-static inline int __ptep_test_and_clear_young(unsigned int context, unsigned long addr, pte_t *ptep)
-{
- unsigned long old;
- old = pte_update(ptep, _PAGE_ACCESSED, 0);
-#if _PAGE_HASHPTE != 0
- if (old & _PAGE_HASHPTE) {
- unsigned long ptephys = __pa(ptep) & PAGE_MASK;
- flush_hash_pages(context, addr, ptephys, 1);
- }
-#endif
- return (old & _PAGE_ACCESSED) != 0;
-}
-#define ptep_test_and_clear_young(__vma, __addr, __ptep) \
- __ptep_test_and_clear_young((__vma)->vm_mm->context.id, __addr, __ptep)
-
-#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
-static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
- pte_t *ptep)
-{
- return __pte(pte_update(ptep, ~_PAGE_HASHPTE, 0));
-}
-
-#define __HAVE_ARCH_PTEP_SET_WRPROTECT
-static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
- pte_t *ptep)
-{
- pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), 0);
-}
-
-#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
-static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
-{
- unsigned long bits = pte_val(entry) &
- (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW);
- pte_update(ptep, 0, bits);
-}
-
-#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
-({ \
- int __changed = !pte_same(*(__ptep), __entry); \
- if (__changed) { \
- __ptep_set_access_flags(__ptep, __entry, __dirty); \
- flush_tlb_page_nohash(__vma, __address); \
- } \
- __changed; \
-})
-
-/*
- * Macro to mark a page protection value as "uncacheable".
- */
-#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
-
-struct file;
-extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
- unsigned long size, pgprot_t vma_prot);
-#define __HAVE_PHYS_MEM_ACCESS_PROT
-
-#define __HAVE_ARCH_PTE_SAME
-#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0)
-
-/*
- * Note that on Book E processors, the pmd contains the kernel virtual
- * (lowmem) address of the pte page. The physical address is less useful
- * because everything runs with translation enabled (even the TLB miss
- * handler). On everything else the pmd contains the physical address
- * of the pte page. -- paulus
- */
-#ifndef CONFIG_BOOKE
-#define pmd_page_vaddr(pmd) \
- ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
-#define pmd_page(pmd) \
- (mem_map + (pmd_val(pmd) >> PAGE_SHIFT))
-#else
-#define pmd_page_vaddr(pmd) \
- ((unsigned long) (pmd_val(pmd) & PAGE_MASK))
-#define pmd_page(pmd) \
- (mem_map + (__pa(pmd_val(pmd)) >> PAGE_SHIFT))
-#endif
-
-/* to find an entry in a kernel page-table-directory */
-#define pgd_offset_k(address) pgd_offset(&init_mm, address)
-
-/* to find an entry in a page-table-directory */
-#define pgd_index(address) ((address) >> PGDIR_SHIFT)
-#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
-
-/* Find an entry in the second-level page table.. */
-static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
-{
- return (pmd_t *) dir;
-}
-
-/* Find an entry in the third-level page table.. */
-#define pte_index(address) \
- (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
-#define pte_offset_kernel(dir, addr) \
- ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr))
-#define pte_offset_map(dir, addr) \
- ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE0) + pte_index(addr))
-#define pte_offset_map_nested(dir, addr) \
- ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE1) + pte_index(addr))
-
-#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0)
-#define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1)
-
-extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
-
-extern void paging_init(void);
-
-/*
- * Encode and decode a swap entry.
- * Note that the bits we use in a PTE for representing a swap entry
- * must not include the _PAGE_PRESENT bit, the _PAGE_FILE bit, or the
- *_PAGE_HASHPTE bit (if used). -- paulus
- */
-#define __swp_type(entry) ((entry).val & 0x1f)
-#define __swp_offset(entry) ((entry).val >> 5)
-#define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 5) })
-#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 3 })
-#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 3 })
-
-/* Encode and decode a nonlinear file mapping entry */
-#define PTE_FILE_MAX_BITS 29
-#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
-#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
-
-/* Values for nocacheflag and cmode */
-/* These are not used by the APUS kernel_map, but prevents
- compilation errors. */
-#define KERNELMAP_FULL_CACHING 0
-#define KERNELMAP_NOCACHE_SER 1
-#define KERNELMAP_NOCACHE_NONSER 2
-#define KERNELMAP_NO_COPYBACK 3
-
-/*
- * Map some physical address range into the kernel address space.
- */
-extern unsigned long kernel_map(unsigned long paddr, unsigned long size,
- int nocacheflag, unsigned long *memavailp );
-
-/*
- * Set cache mode of (kernel space) address range.
- */
-extern void kernel_set_cachemode (unsigned long address, unsigned long size,
- unsigned int cmode);
-
-/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
-#define kern_addr_valid(addr) (1)
-
-#ifdef CONFIG_PHYS_64BIT
-extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
- unsigned long paddr, unsigned long size, pgprot_t prot);
-
-static inline int io_remap_pfn_range(struct vm_area_struct *vma,
- unsigned long vaddr,
- unsigned long pfn,
- unsigned long size,
- pgprot_t prot)
-{
- phys_addr_t paddr64 = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
- return remap_pfn_range(vma, vaddr, paddr64 >> PAGE_SHIFT, size, prot);
-}
-#else
-#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
- remap_pfn_range(vma, vaddr, pfn, size, prot)
-#endif
-
-/*
- * No page table caches to initialise
- */
-#define pgtable_cache_init() do { } while (0)
-
-extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep,
- pmd_t **pmdp);
-
-#include <asm-generic/pgtable.h>
-
-#endif /* !__ASSEMBLY__ */
-
-#endif /* _PPC_PGTABLE_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/pnp.h b/include/asm-ppc/pnp.h
deleted file mode 100644
index 6f6760b..0000000
--- a/include/asm-ppc/pnp.h
+++ /dev/null
@@ -1,645 +0,0 @@
-#ifdef __KERNEL__
-/* 11/02/95 */
-/*----------------------------------------------------------------------------*/
-/* Plug and Play header definitions */
-/*----------------------------------------------------------------------------*/
-
-/* Structure map for PnP on PowerPC Reference Platform */
-/* See Plug and Play ISA Specification, Version 1.0, May 28, 1993. It */
-/* (or later versions) is available on Compuserve in the PLUGPLAY area. */
-/* This code has extensions to that specification, namely new short and */
-/* long tag types for platform dependent information */
-
-/* Warning: LE notation used throughout this file */
-
-/* For enum's: if given in hex then they are bit significant, i.e. */
-/* only one bit is on for each enum */
-
-#ifndef _PNP_
-#define _PNP_
-
-#ifndef __ASSEMBLY__
-#define MAX_MEM_REGISTERS 9
-#define MAX_IO_PORTS 20
-#define MAX_IRQS 7
-/*#define MAX_DMA_CHANNELS 7*/
-
-/* Interrupt controllers */
-
-#define PNPinterrupt0 "PNP0000" /* AT Interrupt Controller */
-#define PNPinterrupt1 "PNP0001" /* EISA Interrupt Controller */
-#define PNPinterrupt2 "PNP0002" /* MCA Interrupt Controller */
-#define PNPinterrupt3 "PNP0003" /* APIC */
-#define PNPExtInt "IBM000D" /* PowerPC Extended Interrupt Controller */
-
-/* Timers */
-
-#define PNPtimer0 "PNP0100" /* AT Timer */
-#define PNPtimer1 "PNP0101" /* EISA Timer */
-#define PNPtimer2 "PNP0102" /* MCA Timer */
-
-/* DMA controllers */
-
-#define PNPdma0 "PNP0200" /* AT DMA Controller */
-#define PNPdma1 "PNP0201" /* EISA DMA Controller */
-#define PNPdma2 "PNP0202" /* MCA DMA Controller */
-
-/* start of August 15, 1994 additions */
-/* CMOS */
-#define PNPCMOS "IBM0009" /* CMOS */
-
-/* L2 Cache */
-#define PNPL2 "IBM0007" /* L2 Cache */
-
-/* NVRAM */
-#define PNPNVRAM "IBM0008" /* NVRAM */
-
-/* Power Management */
-#define PNPPM "IBM0005" /* Power Management */
-/* end of August 15, 1994 additions */
-
-/* Keyboards */
-
-#define PNPkeyboard0 "PNP0300" /* IBM PC/XT KB Cntlr (83 key, no mouse) */
-#define PNPkeyboard1 "PNP0301" /* Olivetti ICO (102 key) */
-#define PNPkeyboard2 "PNP0302" /* IBM PC/AT KB Cntlr (84 key) */
-#define PNPkeyboard3 "PNP0303" /* IBM Enhanced (101/2 key, PS/2 mouse) */
-#define PNPkeyboard4 "PNP0304" /* Nokia 1050 KB Cntlr */
-#define PNPkeyboard5 "PNP0305" /* Nokia 9140 KB Cntlr */
-#define PNPkeyboard6 "PNP0306" /* Standard Japanese KB Cntlr */
-#define PNPkeyboard7 "PNP0307" /* Microsoft Windows (R) KB Cntlr */
-
-/* Parallel port controllers */
-
-#define PNPparallel0 "PNP0400" /* Standard LPT Parallel Port */
-#define PNPparallel1 "PNP0401" /* ECP Parallel Port */
-#define PNPepp "IBM001C" /* EPP Parallel Port */
-
-/* Serial port controllers */
-
-#define PNPserial0 "PNP0500" /* Standard PC Serial port */
-#define PNPSerial1 "PNP0501" /* 16550A Compatible Serial port */
-
-/* Disk controllers */
-
-#define PNPdisk0 "PNP0600" /* Generic ESDI/IDE/ATA Compat HD Cntlr */
-#define PNPdisk1 "PNP0601" /* Plus Hardcard II */
-#define PNPdisk2 "PNP0602" /* Plus Hardcard IIXL/EZ */
-
-/* Diskette controllers */
-
-#define PNPdiskette0 "PNP0700" /* PC Standard Floppy Disk Controller */
-
-/* Display controllers */
-
-#define PNPdisplay0 "PNP0900" /* VGA Compatible */
-#define PNPdisplay1 "PNP0901" /* Video Seven VGA */
-#define PNPdisplay2 "PNP0902" /* 8514/A Compatible */
-#define PNPdisplay3 "PNP0903" /* Trident VGA */
-#define PNPdisplay4 "PNP0904" /* Cirrus Logic Laptop VGA */
-#define PNPdisplay5 "PNP0905" /* Cirrus Logic VGA */
-#define PNPdisplay6 "PNP0906" /* Tseng ET4000 or ET4000/W32 */
-#define PNPdisplay7 "PNP0907" /* Western Digital VGA */
-#define PNPdisplay8 "PNP0908" /* Western Digital Laptop VGA */
-#define PNPdisplay9 "PNP0909" /* S3 */
-#define PNPdisplayA "PNP090A" /* ATI Ultra Pro/Plus (Mach 32) */
-#define PNPdisplayB "PNP090B" /* ATI Ultra (Mach 8) */
-#define PNPdisplayC "PNP090C" /* XGA Compatible */
-#define PNPdisplayD "PNP090D" /* ATI VGA Wonder */
-#define PNPdisplayE "PNP090E" /* Weitek P9000 Graphics Adapter */
-#define PNPdisplayF "PNP090F" /* Oak Technology VGA */
-
-/* Peripheral busses */
-
-#define PNPbuses0 "PNP0A00" /* ISA Bus */
-#define PNPbuses1 "PNP0A01" /* EISA Bus */
-#define PNPbuses2 "PNP0A02" /* MCA Bus */
-#define PNPbuses3 "PNP0A03" /* PCI Bus */
-#define PNPbuses4 "PNP0A04" /* VESA/VL Bus */
-
-/* RTC, BIOS, planar devices */
-
-#define PNPspeaker0 "PNP0800" /* AT Style Speaker Sound */
-#define PNPrtc0 "PNP0B00" /* AT RTC */
-#define PNPpnpbios0 "PNP0C00" /* PNP BIOS (only created by root enum) */
-#define PNPpnpbios1 "PNP0C01" /* System Board Memory Device */
-#define PNPpnpbios2 "PNP0C02" /* Math Coprocessor */
-#define PNPpnpbios3 "PNP0C03" /* PNP BIOS Event Notification Interrupt */
-
-/* PCMCIA controller */
-
-#define PNPpcmcia0 "PNP0E00" /* Intel 82365 Compatible PCMCIA Cntlr */
-
-/* Mice */
-
-#define PNPmouse0 "PNP0F00" /* Microsoft Bus Mouse */
-#define PNPmouse1 "PNP0F01" /* Microsoft Serial Mouse */
-#define PNPmouse2 "PNP0F02" /* Microsoft Inport Mouse */
-#define PNPmouse3 "PNP0F03" /* Microsoft PS/2 Mouse */
-#define PNPmouse4 "PNP0F04" /* Mousesystems Mouse */
-#define PNPmouse5 "PNP0F05" /* Mousesystems 3 Button Mouse - COM2 */
-#define PNPmouse6 "PNP0F06" /* Genius Mouse - COM1 */
-#define PNPmouse7 "PNP0F07" /* Genius Mouse - COM2 */
-#define PNPmouse8 "PNP0F08" /* Logitech Serial Mouse */
-#define PNPmouse9 "PNP0F09" /* Microsoft Ballpoint Serial Mouse */
-#define PNPmouseA "PNP0F0A" /* Microsoft PNP Mouse */
-#define PNPmouseB "PNP0F0B" /* Microsoft PNP Ballpoint Mouse */
-
-/* Modems */
-
-#define PNPmodem0 "PNP9000" /* Specific IDs TBD */
-
-/* Network controllers */
-
-#define PNPnetworkC9 "PNP80C9" /* IBM Token Ring */
-#define PNPnetworkCA "PNP80CA" /* IBM Token Ring II */
-#define PNPnetworkCB "PNP80CB" /* IBM Token Ring II/Short */
-#define PNPnetworkCC "PNP80CC" /* IBM Token Ring 4/16Mbs */
-#define PNPnetwork27 "PNP8327" /* IBM Token Ring (All types) */
-#define PNPnetworket "IBM0010" /* IBM Ethernet used by Power PC */
-#define PNPneteisaet "IBM2001" /* IBM Ethernet EISA adapter */
-#define PNPAMD79C970 "IBM0016" /* AMD 79C970 (PCI Ethernet) */
-
-/* SCSI controllers */
-
-#define PNPscsi0 "PNPA000" /* Adaptec 154x Compatible SCSI Cntlr */
-#define PNPscsi1 "PNPA001" /* Adaptec 174x Compatible SCSI Cntlr */
-#define PNPscsi2 "PNPA002" /* Future Domain 16-700 Compat SCSI Cntlr*/
-#define PNPscsi3 "PNPA003" /* Panasonic CDROM Adapter (SBPro/SB16) */
-#define PNPscsiF "IBM000F" /* NCR 810 SCSI Controller */
-#define PNPscsi825 "IBM001B" /* NCR 825 SCSI Controller */
-#define PNPscsi875 "IBM0018" /* NCR 875 SCSI Controller */
-
-/* Sound/Video, Multimedia */
-
-#define PNPmm0 "PNPB000" /* Sound Blaster Compatible Sound Device */
-#define PNPmm1 "PNPB001" /* MS Windows Sound System Compat Device */
-#define PNPmmF "IBM000E" /* Crystal CS4231 Audio Device */
-#define PNPv7310 "IBM0015" /* ASCII V7310 Video Capture Device */
-#define PNPmm4232 "IBM0017" /* Crystal CS4232 Audio Device */
-#define PNPpmsyn "IBM001D" /* YMF 289B chip (Yamaha) */
-#define PNPgp4232 "IBM0012" /* Crystal CS4232 Game Port */
-#define PNPmidi4232 "IBM0013" /* Crystal CS4232 MIDI */
-
-/* Operator Panel */
-#define PNPopctl "IBM000B" /* Operator's panel */
-
-/* Service Processor */
-#define PNPsp "IBM0011" /* IBM Service Processor */
-#define PNPLTsp "IBM001E" /* Lightning/Terlingua Support Processor */
-#define PNPLTmsp "IBM001F" /* Lightning/Terlingua Mini-SP */
-
-/* Memory Controller */
-#define PNPmemctl "IBM000A" /* Memory controller */
-
-/* Graphics Assist */
-#define PNPg_assist "IBM0014" /* Graphics Assist */
-
-/* Miscellaneous Device Controllers */
-#define PNPtablet "IBM0019" /* IBM Tablet Controller */
-
-/* PNP Packet Handles */
-
-#define S1_Packet 0x0A /* Version resource */
-#define S2_Packet 0x15 /* Logical DEVID (without flags) */
-#define S2_Packet_flags 0x16 /* Logical DEVID (with flags) */
-#define S3_Packet 0x1C /* Compatible device ID */
-#define S4_Packet 0x22 /* IRQ resource (without flags) */
-#define S4_Packet_flags 0x23 /* IRQ resource (with flags) */
-#define S5_Packet 0x2A /* DMA resource */
-#define S6_Packet 0x30 /* Depend funct start (w/o priority) */
-#define S6_Packet_priority 0x31 /* Depend funct start (w/ priority) */
-#define S7_Packet 0x38 /* Depend funct end */
-#define S8_Packet 0x47 /* I/O port resource (w/o fixed loc) */
-#define S9_Packet_fixed 0x4B /* I/O port resource (w/ fixed loc) */
-#define S14_Packet 0x71 /* Vendor defined */
-#define S15_Packet 0x78 /* End of resource (w/o checksum) */
-#define S15_Packet_checksum 0x79 /* End of resource (w/ checksum) */
-#define L1_Packet 0x81 /* Memory range */
-#define L1_Shadow 0x20 /* Memory is shadowable */
-#define L1_32bit_mem 0x18 /* 32-bit memory only */
-#define L1_8_16bit_mem 0x10 /* 8- and 16-bit supported */
-#define L1_Decode_Hi 0x04 /* decode supports high address */
-#define L1_Cache 0x02 /* read cacheable, write-through */
-#define L1_Writeable 0x01 /* Memory is writeable */
-#define L2_Packet 0x82 /* ANSI ID string */
-#define L3_Packet 0x83 /* Unicode ID string */
-#define L4_Packet 0x84 /* Vendor defined */
-#define L5_Packet 0x85 /* Large I/O */
-#define L6_Packet 0x86 /* 32-bit Fixed Loc Mem Range Desc */
-#define END_TAG 0x78 /* End of resource */
-#define DF_START_TAG 0x30 /* Dependent function start */
-#define DF_START_TAG_priority 0x31 /* Dependent function start */
-#define DF_END_TAG 0x38 /* Dependent function end */
-#define SUBOPTIMAL_CONFIGURATION 0x2 /* Priority byte sub optimal config */
-
-/* Device Base Type Codes */
-
-typedef enum _PnP_BASE_TYPE {
- Reserved = 0,
- MassStorageDevice = 1,
- NetworkInterfaceController = 2,
- DisplayController = 3,
- MultimediaController = 4,
- MemoryController = 5,
- BridgeController = 6,
- CommunicationsDevice = 7,
- SystemPeripheral = 8,
- InputDevice = 9,
- ServiceProcessor = 0x0A, /* 11/2/95 */
- } PnP_BASE_TYPE;
-
-/* Device Sub Type Codes */
-
-typedef enum _PnP_SUB_TYPE {
- SCSIController = 0,
- IDEController = 1,
- FloppyController = 2,
- IPIController = 3,
- OtherMassStorageController = 0x80,
-
- EthernetController = 0,
- TokenRingController = 1,
- FDDIController = 2,
- OtherNetworkController = 0x80,
-
- VGAController= 0,
- SVGAController= 1,
- XGAController= 2,
- OtherDisplayController = 0x80,
-
- VideoController = 0,
- AudioController = 1,
- OtherMultimediaController = 0x80,
-
- RAM = 0,
- FLASH = 1,
- OtherMemoryDevice = 0x80,
-
- HostProcessorBridge = 0,
- ISABridge = 1,
- EISABridge = 2,
- MicroChannelBridge = 3,
- PCIBridge = 4,
- PCMCIABridge = 5,
- VMEBridge = 6,
- OtherBridgeDevice = 0x80,
-
- RS232Device = 0,
- ATCompatibleParallelPort = 1,
- OtherCommunicationsDevice = 0x80,
-
- ProgrammableInterruptController = 0,
- DMAController = 1,
- SystemTimer = 2,
- RealTimeClock = 3,
- L2Cache = 4,
- NVRAM = 5,
- PowerManagement = 6,
- CMOS = 7,
- OperatorPanel = 8,
- ServiceProcessorClass1 = 9,
- ServiceProcessorClass2 = 0xA,
- ServiceProcessorClass3 = 0xB,
- GraphicAssist = 0xC,
- SystemPlanar = 0xF, /* 10/5/95 */
- OtherSystemPeripheral = 0x80,
-
- KeyboardController = 0,
- Digitizer = 1,
- MouseController = 2,
- TabletController = 3, /* 10/27/95 */
- OtherInputController = 0x80,
-
- GeneralMemoryController = 0,
- } PnP_SUB_TYPE;
-
-/* Device Interface Type Codes */
-
-typedef enum _PnP_INTERFACE {
- General = 0,
- GeneralSCSI = 0,
- GeneralIDE = 0,
- ATACompatible = 1,
-
- GeneralFloppy = 0,
- Compatible765 = 1,
- NS398_Floppy = 2, /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
- NS26E_Floppy = 3, /* Ports 26E and 26F */
- NS15C_Floppy = 4, /* Ports 15C and 15D */
- NS2E_Floppy = 5, /* Ports 2E and 2F */
- CHRP_Floppy = 6, /* CHRP Floppy in PR*P system */
-
- GeneralIPI = 0,
-
- GeneralEther = 0,
- GeneralToken = 0,
- GeneralFDDI = 0,
-
- GeneralVGA = 0,
- GeneralSVGA = 0,
- GeneralXGA = 0,
-
- GeneralVideo = 0,
- GeneralAudio = 0,
- CS4232Audio = 1, /* CS 4232 Plug 'n Play Configured */
-
- GeneralRAM = 0,
- GeneralFLASH = 0,
- PCIMemoryController = 0, /* PCI Config Method */
- RS6KMemoryController = 1, /* RS6K Config Method */
-
- GeneralHostBridge = 0,
- GeneralISABridge = 0,
- GeneralEISABridge = 0,
- GeneralMCABridge = 0,
- GeneralPCIBridge = 0,
- PCIBridgeDirect = 0,
- PCIBridgeIndirect = 1,
- PCIBridgeRS6K = 2,
- GeneralPCMCIABridge = 0,
- GeneralVMEBridge = 0,
-
- GeneralRS232 = 0,
- COMx = 1,
- Compatible16450 = 2,
- Compatible16550 = 3,
- NS398SerPort = 4, /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
- NS26ESerPort = 5, /* Ports 26E and 26F */
- NS15CSerPort = 6, /* Ports 15C and 15D */
- NS2ESerPort = 7, /* Ports 2E and 2F */
-
- GeneralParPort = 0,
- LPTx = 1,
- NS398ParPort = 2, /* NS Super I/O wired to use index
- register at port 398 and data
- register at port 399 */
- NS26EParPort = 3, /* Ports 26E and 26F */
- NS15CParPort = 4, /* Ports 15C and 15D */
- NS2EParPort = 5, /* Ports 2E and 2F */
-
- GeneralPIC = 0,
- ISA_PIC = 1,
- EISA_PIC = 2,
- MPIC = 3,
- RS6K_PIC = 4,
-
- GeneralDMA = 0,
- ISA_DMA = 1,
- EISA_DMA = 2,
-
- GeneralTimer = 0,
- ISA_Timer = 1,
- EISA_Timer = 2,
- GeneralRTC = 0,
- ISA_RTC = 1,
-
- StoreThruOnly = 1,
- StoreInEnabled = 2,
- RS6KL2Cache = 3,
-
- IndirectNVRAM = 0, /* Indirectly addressed */
- DirectNVRAM = 1, /* Memory Mapped */
- IndirectNVRAM24 = 2, /* Indirectly addressed - 24 bit */
-
- GeneralPowerManagement = 0,
- EPOWPowerManagement = 1,
- PowerControl = 2, // d1378
-
- GeneralCMOS = 0,
-
- GeneralOPPanel = 0,
- HarddiskLight = 1,
- CDROMLight = 2,
- PowerLight = 3,
- KeyLock = 4,
- ANDisplay = 5, /* AlphaNumeric Display */
- SystemStatusLED = 6, /* 3 digit 7 segment LED */
- CHRP_SystemStatusLED = 7, /* CHRP LEDs in PR*P system */
-
- GeneralServiceProcessor = 0,
-
- TransferData = 1,
- IGMC32 = 2,
- IGMC64 = 3,
-
- GeneralSystemPlanar = 0, /* 10/5/95 */
-
- } PnP_INTERFACE;
-
-/* PnP resources */
-
-/* Compressed ASCII is 5 bits per char; 00001=A ... 11010=Z */
-
-typedef struct _SERIAL_ID {
- unsigned char VendorID0; /* Bit(7)=0 */
- /* Bits(6:2)=1st character in */
- /* compressed ASCII */
- /* Bits(1:0)=2nd character in */
- /* compressed ASCII bits(4:3) */
- unsigned char VendorID1; /* Bits(7:5)=2nd character in */
- /* compressed ASCII bits(2:0) */
- /* Bits(4:0)=3rd character in */
- /* compressed ASCII */
- unsigned char VendorID2; /* Product number - vendor assigned */
- unsigned char VendorID3; /* Product number - vendor assigned */
-
-/* Serial number is to provide uniqueness if more than one board of same */
-/* type is in system. Must be "FFFFFFFF" if feature not supported. */
-
- unsigned char Serial0; /* Unique serial number bits (7:0) */
- unsigned char Serial1; /* Unique serial number bits (15:8) */
- unsigned char Serial2; /* Unique serial number bits (23:16) */
- unsigned char Serial3; /* Unique serial number bits (31:24) */
- unsigned char Checksum;
- } SERIAL_ID;
-
-typedef enum _PnPItemName {
- Unused = 0,
- PnPVersion = 1,
- LogicalDevice = 2,
- CompatibleDevice = 3,
- IRQFormat = 4,
- DMAFormat = 5,
- StartDepFunc = 6,
- EndDepFunc = 7,
- IOPort = 8,
- FixedIOPort = 9,
- Res1 = 10,
- Res2 = 11,
- Res3 = 12,
- SmallVendorItem = 14,
- EndTag = 15,
- MemoryRange = 1,
- ANSIIdentifier = 2,
- UnicodeIdentifier = 3,
- LargeVendorItem = 4,
- MemoryRange32 = 5,
- MemoryRangeFixed32 = 6,
- } PnPItemName;
-
-/* Define a bunch of access functions for the bits in the tag field */
-
-/* Tag type - 0 = small; 1 = large */
-#define tag_type(t) (((t) & 0x80)>>7)
-#define set_tag_type(t,v) (t = (t & 0x7f) | ((v)<<7))
-
-/* Small item name is 4 bits - one of PnPItemName enum above */
-#define tag_small_item_name(t) (((t) & 0x78)>>3)
-#define set_tag_small_item_name(t,v) (t = (t & 0x07) | ((v)<<3))
-
-/* Small item count is 3 bits - count of further bytes in packet */
-#define tag_small_count(t) ((t) & 0x07)
-#define set_tag_count(t,v) (t = (t & 0x78) | (v))
-
-/* Large item name is 7 bits - one of PnPItemName enum above */
-#define tag_large_item_name(t) ((t) & 0x7f)
-#define set_tag_large_item_name(t,v) (t = (t | 0x80) | (v))
-
-/* a PnP resource is a bunch of contiguous TAG packets ending with an end tag */
-
-typedef union _PnP_TAG_PACKET {
- struct _S1_Pack{ /* VERSION PACKET */
- unsigned char Tag; /* small tag = 0x0a */
- unsigned char Version[2]; /* PnP version, Vendor version */
- } S1_Pack;
-
- struct _S2_Pack{ /* LOGICAL DEVICE ID PACKET */
- unsigned char Tag; /* small tag = 0x15 or 0x16 */
- unsigned char DevId[4]; /* Logical device id */
- unsigned char Flags[2]; /* bit(0) boot device; */
- /* bit(7:1) cmd in range x31-x37 */
- /* bit(7:0) cmd in range x28-x3f (opt)*/
- } S2_Pack;
-
- struct _S3_Pack{ /* COMPATIBLE DEVICE ID PACKET */
- unsigned char Tag; /* small tag = 0x1c */
- unsigned char CompatId[4]; /* Compatible device id */
- } S3_Pack;
-
- struct _S4_Pack{ /* IRQ PACKET */
- unsigned char Tag; /* small tag = 0x22 or 0x23 */
- unsigned char IRQMask[2]; /* bit(0) is IRQ0, ...; */
- /* bit(0) is IRQ8 ... */
- unsigned char IRQInfo; /* optional; assume bit(0)=1; else */
- /* bit(0) - high true edge sensitive */
- /* bit(1) - low true edge sensitive */
- /* bit(2) - high true level sensitive*/
- /* bit(3) - low true level sensitive */
- /* bit(7:4) - must be 0 */
- } S4_Pack;
-
- struct _S5_Pack{ /* DMA PACKET */
- unsigned char Tag; /* small tag = 0x2a */
- unsigned char DMAMask; /* bit(0) is channel 0 ... */
- unsigned char DMAInfo;
- } S5_Pack;
-
- struct _S6_Pack{ /* START DEPENDENT FUNCTION PACKET */
- unsigned char Tag; /* small tag = 0x30 or 0x31 */
- unsigned char Priority; /* Optional; if missing then x01; else*/
- /* x00 = best possible */
- /* x01 = acceptible */
- /* x02 = sub-optimal but functional */
- } S6_Pack;
-
- struct _S7_Pack{ /* END DEPENDENT FUNCTION PACKET */
- unsigned char Tag; /* small tag = 0x38 */
- } S7_Pack;
-
- struct _S8_Pack{ /* VARIABLE I/O PORT PACKET */
- unsigned char Tag; /* small tag x47 */
- unsigned char IOInfo; /* x0 = decode only bits(9:0); */
-#define ISAAddr16bit 0x01 /* x01 = decode bits(15:0) */
- unsigned char RangeMin[2]; /* Min base address */
- unsigned char RangeMax[2]; /* Max base address */
- unsigned char IOAlign; /* base alignmt, incr in 1B blocks */
- unsigned char IONum; /* number of contiguous I/O ports */
- } S8_Pack;
-
- struct _S9_Pack{ /* FIXED I/O PORT PACKET */
- unsigned char Tag; /* small tag = 0x4b */
- unsigned char Range[2]; /* base address 10 bits */
- unsigned char IONum; /* number of contiguous I/O ports */
- } S9_Pack;
-
- struct _S14_Pack{ /* VENDOR DEFINED PACKET */
- unsigned char Tag; /* small tag = 0x7m m = 1-7 */
- union _S14_Data{
- unsigned char Data[7]; /* Vendor defined */
- struct _S14_PPCPack{ /* Pr*p s14 pack */
- unsigned char Type; /* 00=non-IBM */
- unsigned char PPCData[6]; /* Vendor defined */
- } S14_PPCPack;
- } S14_Data;
- } S14_Pack;
-
- struct _S15_Pack{ /* END PACKET */
- unsigned char Tag; /* small tag = 0x78 or 0x79 */
- unsigned char Check; /* optional - checksum */
- } S15_Pack;
-
- struct _L1_Pack{ /* MEMORY RANGE PACKET */
- unsigned char Tag; /* large tag = 0x81 */
- unsigned char Count0; /* x09 */
- unsigned char Count1; /* x00 */
- unsigned char Data[9]; /* a variable array of bytes, */
- /* count in tag */
- } L1_Pack;
-
- struct _L2_Pack{ /* ANSI ID STRING PACKET */
- unsigned char Tag; /* large tag = 0x82 */
- unsigned char Count0; /* Length of string */
- unsigned char Count1;
- unsigned char Identifier[1]; /* a variable array of bytes, */
- /* count in tag */
- } L2_Pack;
-
- struct _L3_Pack{ /* UNICODE ID STRING PACKET */
- unsigned char Tag; /* large tag = 0x83 */
- unsigned char Count0; /* Length + 2 of string */
- unsigned char Count1;
- unsigned char Country0; /* TBD */
- unsigned char Country1; /* TBD */
- unsigned char Identifier[1]; /* a variable array of bytes, */
- /* count in tag */
- } L3_Pack;
-
- struct _L4_Pack{ /* VENDOR DEFINED PACKET */
- unsigned char Tag; /* large tag = 0x84 */
- unsigned char Count0;
- unsigned char Count1;
- union _L4_Data{
- unsigned char Data[1]; /* a variable array of bytes, */
- /* count in tag */
- struct _L4_PPCPack{ /* Pr*p L4 packet */
- unsigned char Type; /* 00=non-IBM */
- unsigned char PPCData[1]; /* a variable array of bytes, */
- /* count in tag */
- } L4_PPCPack;
- } L4_Data;
- } L4_Pack;
-
- struct _L5_Pack{
- unsigned char Tag; /* large tag = 0x85 */
- unsigned char Count0; /* Count = 17 */
- unsigned char Count1;
- unsigned char Data[17];
- } L5_Pack;
-
- struct _L6_Pack{
- unsigned char Tag; /* large tag = 0x86 */
- unsigned char Count0; /* Count = 9 */
- unsigned char Count1;
- unsigned char Data[9];
- } L6_Pack;
-
- } PnP_TAG_PACKET;
-
-#endif /* __ASSEMBLY__ */
-#endif /* ndef _PNP_ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ppc4xx_dma.h b/include/asm-ppc/ppc4xx_dma.h
deleted file mode 100644
index 935d1e0..0000000
--- a/include/asm-ppc/ppc4xx_dma.h
+++ /dev/null
@@ -1,579 +0,0 @@
-/*
- * include/asm-ppc/ppc4xx_dma.h
- *
- * IBM PPC4xx DMA engine library
- *
- * Copyright 2000-2004 MontaVista Software Inc.
- *
- * Cleaned up a bit more, Matt Porter <mporter@kernel.crashing.org>
- *
- * Original code by Armin Kuster <akuster@mvista.com>
- * and Pete Popov <ppopov@mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASMPPC_PPC4xx_DMA_H
-#define __ASMPPC_PPC4xx_DMA_H
-
-#include <linux/types.h>
-#include <asm/mmu.h>
-#include <asm/ibm4xx.h>
-
-#undef DEBUG_4xxDMA
-
-#define MAX_PPC4xx_DMA_CHANNELS 4
-
-/*
- * Function return status codes
- * These values are used to indicate whether or not the function
- * call was successful, or a bad/invalid parameter was passed.
- */
-#define DMA_STATUS_GOOD 0
-#define DMA_STATUS_BAD_CHANNEL 1
-#define DMA_STATUS_BAD_HANDLE 2
-#define DMA_STATUS_BAD_MODE 3
-#define DMA_STATUS_NULL_POINTER 4
-#define DMA_STATUS_OUT_OF_MEMORY 5
-#define DMA_STATUS_SGL_LIST_EMPTY 6
-#define DMA_STATUS_GENERAL_ERROR 7
-#define DMA_STATUS_CHANNEL_NOTFREE 8
-
-#define DMA_CHANNEL_BUSY 0x80000000
-
-/*
- * These indicate status as returned from the DMA Status Register.
- */
-#define DMA_STATUS_NO_ERROR 0
-#define DMA_STATUS_CS 1 /* Count Status */
-#define DMA_STATUS_TS 2 /* Transfer Status */
-#define DMA_STATUS_DMA_ERROR 3 /* DMA Error Occurred */
-#define DMA_STATUS_DMA_BUSY 4 /* The channel is busy */
-
-
-/*
- * DMA Channel Control Registers
- */
-
-#ifdef CONFIG_44x
-#define PPC4xx_DMA_64BIT
-#define DMA_CR_OFFSET 1
-#else
-#define DMA_CR_OFFSET 0
-#endif
-
-#define DMA_CE_ENABLE (1<<31) /* DMA Channel Enable */
-#define SET_DMA_CE_ENABLE(x) (((x)&0x1)<<31)
-#define GET_DMA_CE_ENABLE(x) (((x)&DMA_CE_ENABLE)>>31)
-
-#define DMA_CIE_ENABLE (1<<30) /* DMA Channel Interrupt Enable */
-#define SET_DMA_CIE_ENABLE(x) (((x)&0x1)<<30)
-#define GET_DMA_CIE_ENABLE(x) (((x)&DMA_CIE_ENABLE)>>30)
-
-#define DMA_TD (1<<29)
-#define SET_DMA_TD(x) (((x)&0x1)<<29)
-#define GET_DMA_TD(x) (((x)&DMA_TD)>>29)
-
-#define DMA_PL (1<<28) /* Peripheral Location */
-#define SET_DMA_PL(x) (((x)&0x1)<<28)
-#define GET_DMA_PL(x) (((x)&DMA_PL)>>28)
-
-#define EXTERNAL_PERIPHERAL 0
-#define INTERNAL_PERIPHERAL 1
-
-#define SET_DMA_PW(x) (((x)&0x3)<<(26-DMA_CR_OFFSET)) /* Peripheral Width */
-#define DMA_PW_MASK SET_DMA_PW(3)
-#define PW_8 0
-#define PW_16 1
-#define PW_32 2
-#define PW_64 3
-/* FIXME: Add PW_128 support for 440GP DMA block */
-#define GET_DMA_PW(x) (((x)&DMA_PW_MASK)>>(26-DMA_CR_OFFSET))
-
-#define DMA_DAI (1<<(25-DMA_CR_OFFSET)) /* Destination Address Increment */
-#define SET_DMA_DAI(x) (((x)&0x1)<<(25-DMA_CR_OFFSET))
-
-#define DMA_SAI (1<<(24-DMA_CR_OFFSET)) /* Source Address Increment */
-#define SET_DMA_SAI(x) (((x)&0x1)<<(24-DMA_CR_OFFSET))
-
-#define DMA_BEN (1<<(23-DMA_CR_OFFSET)) /* Buffer Enable */
-#define SET_DMA_BEN(x) (((x)&0x1)<<(23-DMA_CR_OFFSET))
-
-#define SET_DMA_TM(x) (((x)&0x3)<<(21-DMA_CR_OFFSET)) /* Transfer Mode */
-#define DMA_TM_MASK SET_DMA_TM(3)
-#define TM_PERIPHERAL 0 /* Peripheral */
-#define TM_RESERVED 1 /* Reserved */
-#define TM_S_MM 2 /* Memory to Memory */
-#define TM_D_MM 3 /* Device Paced Memory to Memory */
-#define GET_DMA_TM(x) (((x)&DMA_TM_MASK)>>(21-DMA_CR_OFFSET))
-
-#define SET_DMA_PSC(x) (((x)&0x3)<<(19-DMA_CR_OFFSET)) /* Peripheral Setup Cycles */
-#define DMA_PSC_MASK SET_DMA_PSC(3)
-#define GET_DMA_PSC(x) (((x)&DMA_PSC_MASK)>>(19-DMA_CR_OFFSET))
-
-#define SET_DMA_PWC(x) (((x)&0x3F)<<(13-DMA_CR_OFFSET)) /* Peripheral Wait Cycles */
-#define DMA_PWC_MASK SET_DMA_PWC(0x3F)
-#define GET_DMA_PWC(x) (((x)&DMA_PWC_MASK)>>(13-DMA_CR_OFFSET))
-
-#define SET_DMA_PHC(x) (((x)&0x7)<<(10-DMA_CR_OFFSET)) /* Peripheral Hold Cycles */
-#define DMA_PHC_MASK SET_DMA_PHC(0x7)
-#define GET_DMA_PHC(x) (((x)&DMA_PHC_MASK)>>(10-DMA_CR_OFFSET))
-
-#define DMA_ETD_OUTPUT (1<<(9-DMA_CR_OFFSET)) /* EOT pin is a TC output */
-#define SET_DMA_ETD(x) (((x)&0x1)<<(9-DMA_CR_OFFSET))
-
-#define DMA_TCE_ENABLE (1<<(8-DMA_CR_OFFSET))
-#define SET_DMA_TCE(x) (((x)&0x1)<<(8-DMA_CR_OFFSET))
-
-#define DMA_DEC (1<<(2)) /* Address Decrement */
-#define SET_DMA_DEC(x) (((x)&0x1)<<2)
-#define GET_DMA_DEC(x) (((x)&DMA_DEC)>>2)
-
-
-/*
- * Transfer Modes
- * These modes are defined in a way that makes it possible to
- * simply "or" in the value in the control register.
- */
-
-#define DMA_MODE_MM (SET_DMA_TM(TM_S_MM)) /* memory to memory */
-
- /* Device-paced memory to memory, */
- /* device is at source address */
-#define DMA_MODE_MM_DEVATSRC (DMA_TD | SET_DMA_TM(TM_D_MM))
-
- /* Device-paced memory to memory, */
- /* device is at destination address */
-#define DMA_MODE_MM_DEVATDST (SET_DMA_TM(TM_D_MM))
-
-/* 405gp/440gp */
-#define SET_DMA_PREFETCH(x) (((x)&0x3)<<(4-DMA_CR_OFFSET)) /* Memory Read Prefetch */
-#define DMA_PREFETCH_MASK SET_DMA_PREFETCH(3)
-#define PREFETCH_1 0 /* Prefetch 1 Double Word */
-#define PREFETCH_2 1
-#define PREFETCH_4 2
-#define GET_DMA_PREFETCH(x) (((x)&DMA_PREFETCH_MASK)>>(4-DMA_CR_OFFSET))
-
-#define DMA_PCE (1<<(3-DMA_CR_OFFSET)) /* Parity Check Enable */
-#define SET_DMA_PCE(x) (((x)&0x1)<<(3-DMA_CR_OFFSET))
-#define GET_DMA_PCE(x) (((x)&DMA_PCE)>>(3-DMA_CR_OFFSET))
-
-/* stb3x */
-
-#define DMA_ECE_ENABLE (1<<5)
-#define SET_DMA_ECE(x) (((x)&0x1)<<5)
-#define GET_DMA_ECE(x) (((x)&DMA_ECE_ENABLE)>>5)
-
-#define DMA_TCD_DISABLE (1<<4)
-#define SET_DMA_TCD(x) (((x)&0x1)<<4)
-#define GET_DMA_TCD(x) (((x)&DMA_TCD_DISABLE)>>4)
-
-typedef uint32_t sgl_handle_t;
-
-#ifdef CONFIG_PPC4xx_EDMA
-
-#define SGL_LIST_SIZE 4096
-#define DMA_PPC4xx_SIZE SGL_LIST_SIZE
-
-#define SET_DMA_PRIORITY(x) (((x)&0x3)<<(6-DMA_CR_OFFSET)) /* DMA Channel Priority */
-#define DMA_PRIORITY_MASK SET_DMA_PRIORITY(3)
-#define PRIORITY_LOW 0
-#define PRIORITY_MID_LOW 1
-#define PRIORITY_MID_HIGH 2
-#define PRIORITY_HIGH 3
-#define GET_DMA_PRIORITY(x) (((x)&DMA_PRIORITY_MASK)>>(6-DMA_CR_OFFSET))
-
-/*
- * DMA Polarity Configuration Register
- */
-#define DMAReq_ActiveLow(chan) (1<<(31-(chan*3)))
-#define DMAAck_ActiveLow(chan) (1<<(30-(chan*3)))
-#define EOT_ActiveLow(chan) (1<<(29-(chan*3))) /* End of Transfer */
-
-/*
- * DMA Sleep Mode Register
- */
-#define SLEEP_MODE_ENABLE (1<<21)
-
-/*
- * DMA Status Register
- */
-#define DMA_CS0 (1<<31) /* Terminal Count has been reached */
-#define DMA_CS1 (1<<30)
-#define DMA_CS2 (1<<29)
-#define DMA_CS3 (1<<28)
-
-#define DMA_TS0 (1<<27) /* End of Transfer has been requested */
-#define DMA_TS1 (1<<26)
-#define DMA_TS2 (1<<25)
-#define DMA_TS3 (1<<24)
-
-#define DMA_CH0_ERR (1<<23) /* DMA Chanel 0 Error */
-#define DMA_CH1_ERR (1<<22)
-#define DMA_CH2_ERR (1<<21)
-#define DMA_CH3_ERR (1<<20)
-
-#define DMA_IN_DMA_REQ0 (1<<19) /* Internal DMA Request is pending */
-#define DMA_IN_DMA_REQ1 (1<<18)
-#define DMA_IN_DMA_REQ2 (1<<17)
-#define DMA_IN_DMA_REQ3 (1<<16)
-
-#define DMA_EXT_DMA_REQ0 (1<<15) /* External DMA Request is pending */
-#define DMA_EXT_DMA_REQ1 (1<<14)
-#define DMA_EXT_DMA_REQ2 (1<<13)
-#define DMA_EXT_DMA_REQ3 (1<<12)
-
-#define DMA_CH0_BUSY (1<<11) /* DMA Channel 0 Busy */
-#define DMA_CH1_BUSY (1<<10)
-#define DMA_CH2_BUSY (1<<9)
-#define DMA_CH3_BUSY (1<<8)
-
-#define DMA_SG0 (1<<7) /* DMA Channel 0 Scatter/Gather in progress */
-#define DMA_SG1 (1<<6)
-#define DMA_SG2 (1<<5)
-#define DMA_SG3 (1<<4)
-
-/* DMA Channel Count Register */
-#define DMA_CTC_BTEN (1<<23) /* Burst Enable/Disable bit */
-#define DMA_CTC_BSIZ_MSK (3<<21) /* Mask of the Burst size bits */
-#define DMA_CTC_BSIZ_2 (0)
-#define DMA_CTC_BSIZ_4 (1<<21)
-#define DMA_CTC_BSIZ_8 (2<<21)
-#define DMA_CTC_BSIZ_16 (3<<21)
-
-/*
- * DMA SG Command Register
- */
-#define SSG_ENABLE(chan) (1<<(31-chan)) /* Start Scatter Gather */
-#define SSG_MASK_ENABLE(chan) (1<<(15-chan)) /* Enable writing to SSG0 bit */
-
-/*
- * DMA Scatter/Gather Descriptor Bit fields
- */
-#define SG_LINK (1<<31) /* Link */
-#define SG_TCI_ENABLE (1<<29) /* Enable Terminal Count Interrupt */
-#define SG_ETI_ENABLE (1<<28) /* Enable End of Transfer Interrupt */
-#define SG_ERI_ENABLE (1<<27) /* Enable Error Interrupt */
-#define SG_COUNT_MASK 0xFFFF /* Count Field */
-
-#define SET_DMA_CONTROL \
- (SET_DMA_CIE_ENABLE(p_init->int_enable) | /* interrupt enable */ \
- SET_DMA_BEN(p_init->buffer_enable) | /* buffer enable */\
- SET_DMA_ETD(p_init->etd_output) | /* end of transfer pin */ \
- SET_DMA_TCE(p_init->tce_enable) | /* terminal count enable */ \
- SET_DMA_PL(p_init->pl) | /* peripheral location */ \
- SET_DMA_DAI(p_init->dai) | /* dest addr increment */ \
- SET_DMA_SAI(p_init->sai) | /* src addr increment */ \
- SET_DMA_PRIORITY(p_init->cp) | /* channel priority */ \
- SET_DMA_PW(p_init->pwidth) | /* peripheral/bus width */ \
- SET_DMA_PSC(p_init->psc) | /* peripheral setup cycles */ \
- SET_DMA_PWC(p_init->pwc) | /* peripheral wait cycles */ \
- SET_DMA_PHC(p_init->phc) | /* peripheral hold cycles */ \
- SET_DMA_PREFETCH(p_init->pf) /* read prefetch */)
-
-#define GET_DMA_POLARITY(chan) (DMAReq_ActiveLow(chan) | DMAAck_ActiveLow(chan) | EOT_ActiveLow(chan))
-
-#elif defined(CONFIG_STB03xxx) /* stb03xxx */
-
-#define DMA_PPC4xx_SIZE 4096
-
-/*
- * DMA Status Register
- */
-
-#define SET_DMA_PRIORITY(x) (((x)&0x00800001)) /* DMA Channel Priority */
-#define DMA_PRIORITY_MASK 0x00800001
-#define PRIORITY_LOW 0x00000000
-#define PRIORITY_MID_LOW 0x00000001
-#define PRIORITY_MID_HIGH 0x00800000
-#define PRIORITY_HIGH 0x00800001
-#define GET_DMA_PRIORITY(x) (((((x)&DMA_PRIORITY_MASK) &0x00800000) >> 22 ) | (((x)&DMA_PRIORITY_MASK) &0x00000001))
-
-#define DMA_CS0 (1<<31) /* Terminal Count has been reached */
-#define DMA_CS1 (1<<30)
-#define DMA_CS2 (1<<29)
-#define DMA_CS3 (1<<28)
-
-#define DMA_TS0 (1<<27) /* End of Transfer has been requested */
-#define DMA_TS1 (1<<26)
-#define DMA_TS2 (1<<25)
-#define DMA_TS3 (1<<24)
-
-#define DMA_CH0_ERR (1<<23) /* DMA Chanel 0 Error */
-#define DMA_CH1_ERR (1<<22)
-#define DMA_CH2_ERR (1<<21)
-#define DMA_CH3_ERR (1<<20)
-
-#define DMA_CT0 (1<<19) /* Chained transfere */
-
-#define DMA_IN_DMA_REQ0 (1<<18) /* Internal DMA Request is pending */
-#define DMA_IN_DMA_REQ1 (1<<17)
-#define DMA_IN_DMA_REQ2 (1<<16)
-#define DMA_IN_DMA_REQ3 (1<<15)
-
-#define DMA_EXT_DMA_REQ0 (1<<14) /* External DMA Request is pending */
-#define DMA_EXT_DMA_REQ1 (1<<13)
-#define DMA_EXT_DMA_REQ2 (1<<12)
-#define DMA_EXT_DMA_REQ3 (1<<11)
-
-#define DMA_CH0_BUSY (1<<10) /* DMA Channel 0 Busy */
-#define DMA_CH1_BUSY (1<<9)
-#define DMA_CH2_BUSY (1<<8)
-#define DMA_CH3_BUSY (1<<7)
-
-#define DMA_CT1 (1<<6) /* Chained transfere */
-#define DMA_CT2 (1<<5)
-#define DMA_CT3 (1<<4)
-
-#define DMA_CH_ENABLE (1<<7)
-#define SET_DMA_CH(x) (((x)&0x1)<<7)
-#define GET_DMA_CH(x) (((x)&DMA_CH_ENABLE)>>7)
-
-/* STBx25xxx dma unique */
-/* enable device port on a dma channel
- * example ext 0 on dma 1
- */
-
-#define SSP0_RECV 15
-#define SSP0_XMIT 14
-#define EXT_DMA_0 12
-#define SC1_XMIT 11
-#define SC1_RECV 10
-#define EXT_DMA_2 9
-#define EXT_DMA_3 8
-#define SERIAL2_XMIT 7
-#define SERIAL2_RECV 6
-#define SC0_XMIT 5
-#define SC0_RECV 4
-#define SERIAL1_XMIT 3
-#define SERIAL1_RECV 2
-#define SERIAL0_XMIT 1
-#define SERIAL0_RECV 0
-
-#define DMA_CHAN_0 1
-#define DMA_CHAN_1 2
-#define DMA_CHAN_2 3
-#define DMA_CHAN_3 4
-
-/* end STBx25xx */
-
-/*
- * Bit 30 must be one for Redwoods, otherwise transfers may receive errors.
- */
-#define DMA_CR_MB0 0x2
-
-#define SET_DMA_CONTROL \
- (SET_DMA_CIE_ENABLE(p_init->int_enable) | /* interrupt enable */ \
- SET_DMA_ETD(p_init->etd_output) | /* end of transfer pin */ \
- SET_DMA_TCE(p_init->tce_enable) | /* terminal count enable */ \
- SET_DMA_PL(p_init->pl) | /* peripheral location */ \
- SET_DMA_DAI(p_init->dai) | /* dest addr increment */ \
- SET_DMA_SAI(p_init->sai) | /* src addr increment */ \
- SET_DMA_PRIORITY(p_init->cp) | /* channel priority */ \
- SET_DMA_PW(p_init->pwidth) | /* peripheral/bus width */ \
- SET_DMA_PSC(p_init->psc) | /* peripheral setup cycles */ \
- SET_DMA_PWC(p_init->pwc) | /* peripheral wait cycles */ \
- SET_DMA_PHC(p_init->phc) | /* peripheral hold cycles */ \
- SET_DMA_TCD(p_init->tcd_disable) | /* TC chain mode disable */ \
- SET_DMA_ECE(p_init->ece_enable) | /* ECE chanin mode enable */ \
- SET_DMA_CH(p_init->ch_enable) | /* Chain enable */ \
- DMA_CR_MB0 /* must be one */)
-
-#define GET_DMA_POLARITY(chan) chan
-
-#endif
-
-typedef struct {
- unsigned short in_use; /* set when channel is being used, clr when
- * available.
- */
- /*
- * Valid polarity settings:
- * DMAReq_ActiveLow(n)
- * DMAAck_ActiveLow(n)
- * EOT_ActiveLow(n)
- *
- * n is 0 to max dma chans
- */
- unsigned int polarity;
-
- char buffer_enable; /* Boolean: buffer enable */
- char tce_enable; /* Boolean: terminal count enable */
- char etd_output; /* Boolean: eot pin is a tc output */
- char pce; /* Boolean: parity check enable */
-
- /*
- * Peripheral location:
- * INTERNAL_PERIPHERAL (UART0 on the 405GP)
- * EXTERNAL_PERIPHERAL
- */
- char pl; /* internal/external peripheral */
-
- /*
- * Valid pwidth settings:
- * PW_8
- * PW_16
- * PW_32
- * PW_64
- */
- unsigned int pwidth;
-
- char dai; /* Boolean: dst address increment */
- char sai; /* Boolean: src address increment */
-
- /*
- * Valid psc settings: 0-3
- */
- unsigned int psc; /* Peripheral Setup Cycles */
-
- /*
- * Valid pwc settings:
- * 0-63
- */
- unsigned int pwc; /* Peripheral Wait Cycles */
-
- /*
- * Valid phc settings:
- * 0-7
- */
- unsigned int phc; /* Peripheral Hold Cycles */
-
- /*
- * Valid cp (channel priority) settings:
- * PRIORITY_LOW
- * PRIORITY_MID_LOW
- * PRIORITY_MID_HIGH
- * PRIORITY_HIGH
- */
- unsigned int cp; /* channel priority */
-
- /*
- * Valid pf (memory read prefetch) settings:
- *
- * PREFETCH_1
- * PREFETCH_2
- * PREFETCH_4
- */
- unsigned int pf; /* memory read prefetch */
-
- /*
- * Boolean: channel interrupt enable
- * NOTE: for sgl transfers, only the last descriptor will be setup to
- * interrupt.
- */
- char int_enable;
-
- char shift; /* easy access to byte_count shift, based on */
- /* the width of the channel */
-
- uint32_t control; /* channel control word */
-
- /* These variabled are used ONLY in single dma transfers */
- unsigned int mode; /* transfer mode */
- phys_addr_t addr;
- char ce; /* channel enable */
-#ifdef CONFIG_STB03xxx
- char ch_enable;
- char tcd_disable;
- char ece_enable;
- char td; /* transfer direction */
-#endif
-
- char int_on_final_sg;/* for scatter/gather - only interrupt on last sg */
-} ppc_dma_ch_t;
-
-/*
- * PPC44x DMA implementations have a slightly different
- * descriptor layout. Probably moved about due to the
- * change to 64-bit addresses and link pointer. I don't
- * know why they didn't just leave control_count after
- * the dst_addr.
- */
-#ifdef PPC4xx_DMA_64BIT
-typedef struct {
- uint32_t control;
- uint32_t control_count;
- phys_addr_t src_addr;
- phys_addr_t dst_addr;
- phys_addr_t next;
-} ppc_sgl_t;
-#else
-typedef struct {
- uint32_t control;
- phys_addr_t src_addr;
- phys_addr_t dst_addr;
- uint32_t control_count;
- uint32_t next;
-} ppc_sgl_t;
-#endif
-
-typedef struct {
- unsigned int dmanr;
- uint32_t control; /* channel ctrl word; loaded from each descrptr */
- uint32_t sgl_control; /* LK, TCI, ETI, and ERI bits in sgl descriptor */
- dma_addr_t dma_addr; /* dma (physical) address of this list */
- ppc_sgl_t *phead;
- dma_addr_t phead_dma;
- ppc_sgl_t *ptail;
- dma_addr_t ptail_dma;
-} sgl_list_info_t;
-
-typedef struct {
- phys_addr_t *src_addr;
- phys_addr_t *dst_addr;
- phys_addr_t dma_src_addr;
- phys_addr_t dma_dst_addr;
-} pci_alloc_desc_t;
-
-extern ppc_dma_ch_t dma_channels[];
-
-/*
- * The DMA API are in ppc4xx_dma.c and ppc4xx_sgdma.c
- */
-extern int ppc4xx_init_dma_channel(unsigned int, ppc_dma_ch_t *);
-extern int ppc4xx_get_channel_config(unsigned int, ppc_dma_ch_t *);
-extern int ppc4xx_set_channel_priority(unsigned int, unsigned int);
-extern unsigned int ppc4xx_get_peripheral_width(unsigned int);
-extern void ppc4xx_set_sg_addr(int, phys_addr_t);
-extern int ppc4xx_add_dma_sgl(sgl_handle_t, phys_addr_t, phys_addr_t, unsigned int);
-extern void ppc4xx_enable_dma_sgl(sgl_handle_t);
-extern void ppc4xx_disable_dma_sgl(sgl_handle_t);
-extern int ppc4xx_get_dma_sgl_residue(sgl_handle_t, phys_addr_t *, phys_addr_t *);
-extern int ppc4xx_delete_dma_sgl_element(sgl_handle_t, phys_addr_t *, phys_addr_t *);
-extern int ppc4xx_alloc_dma_handle(sgl_handle_t *, unsigned int, unsigned int);
-extern void ppc4xx_free_dma_handle(sgl_handle_t);
-extern int ppc4xx_get_dma_status(void);
-extern int ppc4xx_enable_burst(unsigned int);
-extern int ppc4xx_disable_burst(unsigned int);
-extern int ppc4xx_set_burst_size(unsigned int, unsigned int);
-extern void ppc4xx_set_src_addr(int dmanr, phys_addr_t src_addr);
-extern void ppc4xx_set_dst_addr(int dmanr, phys_addr_t dst_addr);
-extern void ppc4xx_enable_dma(unsigned int dmanr);
-extern void ppc4xx_disable_dma(unsigned int dmanr);
-extern void ppc4xx_set_dma_count(unsigned int dmanr, unsigned int count);
-extern int ppc4xx_get_dma_residue(unsigned int dmanr);
-extern void ppc4xx_set_dma_addr2(unsigned int dmanr, phys_addr_t src_dma_addr,
- phys_addr_t dst_dma_addr);
-extern int ppc4xx_enable_dma_interrupt(unsigned int dmanr);
-extern int ppc4xx_disable_dma_interrupt(unsigned int dmanr);
-extern int ppc4xx_clr_dma_status(unsigned int dmanr);
-extern int ppc4xx_map_dma_port(unsigned int dmanr, unsigned int ocp_dma,short dma_chan);
-extern int ppc4xx_disable_dma_port(unsigned int dmanr, unsigned int ocp_dma,short dma_chan);
-extern int ppc4xx_set_dma_mode(unsigned int dmanr, unsigned int mode);
-
-/* These are in kernel/dma.c: */
-
-/* reserve a DMA channel */
-extern int request_dma(unsigned int dmanr, const char *device_id);
-/* release it again */
-extern void free_dma(unsigned int dmanr);
-#endif
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ppc4xx_pic.h b/include/asm-ppc/ppc4xx_pic.h
deleted file mode 100644
index e442612..0000000
--- a/include/asm-ppc/ppc4xx_pic.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * include/asm-ppc/ppc4xx_pic.h
- *
- * Interrupt controller driver for PowerPC 4xx-based processors.
- *
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- *
- * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
- * Copyright (c) 2004 Zultys Technologies
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifndef __PPC4XX_PIC_H__
-#define __PPC4XX_PIC_H__
-
-#include <linux/types.h>
-#include <linux/irq.h>
-
-/* "Fixed" UIC settings (they are chip, not board specific),
- * e.g. polarity/triggerring for internal interrupt sources.
- *
- * Platform port should provide NR_UICS-sized array named ppc4xx_core_uic_cfg
- * with these "fixed" settings: .polarity contains exact value which will
- * be written (masked with "ext_irq_mask") into UICx_PR register,
- * .triggering - to UICx_TR.
- *
- * Settings for external IRQs can be specified separately by the
- * board support code. In this case properly sized array of unsigned
- * char named ppc4xx_uic_ext_irq_cfg should be filled with correct
- * values using IRQ_SENSE_XXXXX and IRQ_POLARITY_XXXXXXX defines.
- *
- * If these arrays aren't provided, UIC initialization code keeps firmware
- * configuration. Also, ppc4xx_uic_ext_irq_cfg implies ppc4xx_core_uic_cfg
- * is defined.
- *
- * Both ppc4xx_core_uic_cfg and ppc4xx_uic_ext_irq_cfg are declared as
- * "weak" symbols in ppc4xx_pic.c
- *
- */
-struct ppc4xx_uic_settings {
- u32 polarity;
- u32 triggering;
- u32 ext_irq_mask;
-};
-
-extern void ppc4xx_pic_init(void);
-
-#endif /* __PPC4XX_PIC_H__ */
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
deleted file mode 100644
index d2fee41..0000000
--- a/include/asm-ppc/ppc_sys.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * include/asm-ppc/ppc_sys.h
- *
- * PPC system definitions and library functions
- *
- * Maintainer: Kumar Gala <galak@kernel.crashing.org>
- *
- * Copyright 2005 Freescale Semiconductor, Inc
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_PPC_SYS_H
-#define __ASM_PPC_SYS_H
-
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/types.h>
-
-#if defined(CONFIG_8260)
-#include <asm/mpc8260.h>
-#elif defined(CONFIG_8xx)
-#include <asm/mpc8xx.h>
-#elif defined(CONFIG_PPC_MPC52xx)
-#include <asm/mpc52xx.h>
-#elif defined(CONFIG_MPC10X_BRIDGE)
-#include <asm/mpc10x.h>
-#else
-#error "need definition of ppc_sys_devices"
-#endif
-
-#define PPC_SYS_IORESOURCE_FIXUPPED 0x00000001
-
-struct ppc_sys_spec {
- /* PPC sys is matched via (ID & mask) == value, id could be
- * PVR, SVR, IMMR, * etc. */
- u32 mask;
- u32 value;
- u32 num_devices;
- char *ppc_sys_name;
- u8 config[NUM_PPC_SYS_DEVS];
- enum ppc_sys_devices *device_list;
-};
-
-struct platform_notify_dev_map {
- const char *bus_id;
- void (*rtn)(struct platform_device * pdev, int idx);
-};
-
-enum platform_device_func {
- PPC_SYS_FUNC_DUMMY = 0,
- PPC_SYS_FUNC_ETH = 1,
- PPC_SYS_FUNC_UART = 2,
- PPC_SYS_FUNC_HLDC = 3,
- PPC_SYS_FUNC_USB = 4,
- PPC_SYS_FUNC_IRDA = 5,
-};
-
-#define PPC_SYS_CONFIG_DISABLED 1
-
-/* describes all specific chips and which devices they have on them */
-extern struct ppc_sys_spec ppc_sys_specs[];
-extern struct ppc_sys_spec *cur_ppc_sys_spec;
-
-/* determine which specific SOC we are */
-extern void identify_ppc_sys_by_id(u32 id) __init;
-extern void identify_ppc_sys_by_name(char *name) __init;
-extern void identify_ppc_sys_by_name_and_id(char *name, u32 id) __init;
-
-/* describes all devices that may exist in a given family of processors */
-extern struct platform_device ppc_sys_platform_devices[];
-
-/* allow any platform_device fixup to occur before device is registered */
-extern int (*ppc_sys_device_fixup) (struct platform_device * pdev);
-
-/* Update all memory resources by paddr, call before platform_device_register */
-extern void ppc_sys_fixup_mem_resource(struct platform_device *pdev,
- phys_addr_t paddr) __init;
-
-/* Get platform_data pointer out of platform device, call before platform_device_register */
-extern void *ppc_sys_get_pdata(enum ppc_sys_devices dev) __init;
-
-/* remove a device from the system */
-extern void ppc_sys_device_remove(enum ppc_sys_devices dev);
-
-/* Function assignment stuff */
-void ppc_sys_device_initfunc(void);
-void ppc_sys_device_setfunc(enum ppc_sys_devices dev,
- enum platform_device_func func);
-void ppc_sys_device_set_func_all(enum platform_device_func func);
-
-void platform_notify_map(const struct platform_notify_dev_map *map,
- struct device *dev);
-
-/* Enable / disable stuff */
-void ppc_sys_device_disable(enum ppc_sys_devices dev);
-void ppc_sys_device_enable(enum ppc_sys_devices dev);
-void ppc_sys_device_enable_all(void);
-void ppc_sys_device_disable_all(void);
-
-#endif /* __ASM_PPC_SYS_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ppcboot.h b/include/asm-ppc/ppcboot.h
deleted file mode 100644
index 3819e17..0000000
--- a/include/asm-ppc/ppcboot.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASM_PPCBOOT_H__
-#define __ASM_PPCBOOT_H__
-
-/*
- * Board information passed to kernel from PPCBoot
- *
- * include/asm-ppc/ppcboot.h
- */
-
-#ifndef __ASSEMBLY__
-#include <linux/types.h>
-
-typedef struct bd_info {
- unsigned long bi_memstart; /* start of DRAM memory */
- unsigned long bi_memsize; /* size of DRAM memory in bytes */
- unsigned long bi_flashstart; /* start of FLASH memory */
- unsigned long bi_flashsize; /* size of FLASH memory */
- unsigned long bi_flashoffset; /* reserved area for startup monitor */
- unsigned long bi_sramstart; /* start of SRAM memory */
- unsigned long bi_sramsize; /* size of SRAM memory */
-#if defined(CONFIG_8xx) || defined(CONFIG_CPM2)
- unsigned long bi_immr_base; /* base of IMMR register */
-#endif
-#if defined(CONFIG_PPC_MPC52xx)
- unsigned long bi_mbar_base; /* base of internal registers */
-#endif
- unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
- unsigned long bi_ip_addr; /* IP Address */
- unsigned char bi_enetaddr[6]; /* Ethernet address */
- unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
- unsigned long bi_intfreq; /* Internal Freq, in MHz */
- unsigned long bi_busfreq; /* Bus Freq, in MHz */
-#if defined(CONFIG_CPM2)
- unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
- unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
- unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
- unsigned long bi_vco; /* VCO Out from PLL, in MHz */
-#endif
-#if defined(CONFIG_PPC_MPC52xx)
- unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
- unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
-#endif
- unsigned long bi_baudrate; /* Console Baudrate */
-#if defined(CONFIG_4xx)
- unsigned char bi_s_version[4]; /* Version of this structure */
- unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */
- unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
- unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
- unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
- unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
-#endif
-#if defined(CONFIG_HYMOD)
- hymod_conf_t bi_hymod_conf; /* hymod configuration information */
-#endif
-#if defined(CONFIG_EVB64260) || defined(CONFIG_405EP) || defined(CONFIG_44x)
- /* second onboard ethernet port */
- unsigned char bi_enet1addr[6];
-#endif
-#if defined(CONFIG_EVB64260) || defined(CONFIG_440GX)
- /* third onboard ethernet ports */
- unsigned char bi_enet2addr[6];
-#endif
-#if defined(CONFIG_440GX)
- /* fourth onboard ethernet ports */
- unsigned char bi_enet3addr[6];
-#endif
-#if defined(CONFIG_4xx)
- unsigned int bi_opbfreq; /* OB clock in Hz */
- int bi_iic_fast[2]; /* Use fast i2c mode */
-#endif
-#if defined(CONFIG_440GX)
- int bi_phynum[4]; /* phy mapping */
- int bi_phymode[4]; /* phy mode */
-#endif
-} bd_t;
-
-#define bi_tbfreq bi_intfreq
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_PPCBOOT_H__ */
diff --git a/include/asm-ppc/prep_nvram.h b/include/asm-ppc/prep_nvram.h
deleted file mode 100644
index 6dbc36a..0000000
--- a/include/asm-ppc/prep_nvram.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * PreP compliant NVRAM access
- */
-
-/* Corey Minyard (minyard@acm.org) - Stolen from PReP book. Per the
- license I must say:
- (C) Copyright (Corey Minyard), (1998). All rights reserved
- */
-
-/* Structure map for NVRAM on PowerPC Reference Platform */
-/* All fields are either character/byte strings which are valid either
- endian or they are big-endian numbers.
-
- There are a number of Date and Time fields which are in RTC format,
- big-endian. These are stored in UT (GMT).
-
- For enum's: if given in hex then they are bit significant, i.e. only
- one bit is on for each enum.
-*/
-#ifdef __KERNEL__
-#ifndef _PPC_PREP_NVRAM_H
-#define _PPC_PREP_NVRAM_H
-
-#define MAX_PREP_NVRAM 0x8000
-#define PREP_NVRAM_AS0 0x74
-#define PREP_NVRAM_AS1 0x75
-#define PREP_NVRAM_DATA 0x77
-
-#define NVSIZE 4096 /* size of NVRAM */
-#define OSAREASIZE 512 /* size of OSArea space */
-#define CONFSIZE 1024 /* guess at size of Configuration space */
-
-typedef struct _SECURITY {
- unsigned long BootErrCnt; /* Count of boot password errors */
- unsigned long ConfigErrCnt; /* Count of config password errors */
- unsigned long BootErrorDT[2]; /* Date&Time from RTC of last error in pw */
- unsigned long ConfigErrorDT[2]; /* Date&Time from RTC of last error in pw */
- unsigned long BootCorrectDT[2]; /* Date&Time from RTC of last correct pw */
- unsigned long ConfigCorrectDT[2]; /* Date&Time from RTC of last correct pw */
- unsigned long BootSetDT[2]; /* Date&Time from RTC of last set of pw */
- unsigned long ConfigSetDT[2]; /* Date&Time from RTC of last set of pw */
- unsigned char Serial[16]; /* Box serial number */
-} SECURITY;
-
-typedef enum _OS_ID {
- Unknown = 0,
- Firmware = 1,
- AIX = 2,
- NT = 3,
- MKOS2 = 4,
- MKAIX = 5,
- Taligent = 6,
- Solaris = 7,
- MK = 12
-} OS_ID;
-
-typedef struct _ERROR_LOG {
- unsigned char ErrorLogEntry[40]; /* To be architected */
-} ERROR_LOG;
-
-typedef enum _BOOT_STATUS {
- BootStarted = 0x01,
- BootFinished = 0x02,
- RestartStarted = 0x04,
- RestartFinished = 0x08,
- PowerFailStarted = 0x10,
- PowerFailFinished = 0x20,
- ProcessorReady = 0x40,
- ProcessorRunning = 0x80,
- ProcessorStart = 0x0100
-} BOOT_STATUS;
-
-typedef struct _RESTART_BLOCK {
- unsigned short Version;
- unsigned short Revision;
- unsigned long ResumeReserve1[2];
- volatile unsigned long BootStatus;
- unsigned long CheckSum; /* Checksum of RESTART_BLOCK */
- void * RestartAddress;
- void * SaveAreaAddr;
- unsigned long SaveAreaLength;
-} RESTART_BLOCK;
-
-typedef enum _OSAREA_USAGE {
- Empty = 0,
- Used = 1
-} OSAREA_USAGE;
-
-typedef enum _PM_MODE {
- Suspend = 0x80, /* Part of state is in memory */
- Normal = 0x00 /* No power management in effect */
-} PMMODE;
-
-typedef struct _HEADER {
- unsigned short Size; /* NVRAM size in K(1024) */
- unsigned char Version; /* Structure map different */
- unsigned char Revision; /* Structure map the same -may
- be new values in old fields
- in other words old code still works */
- unsigned short Crc1; /* check sum from beginning of nvram to OSArea */
- unsigned short Crc2; /* check sum of config */
- unsigned char LastOS; /* OS_ID */
- unsigned char Endian; /* B if big endian, L if little endian */
- unsigned char OSAreaUsage; /* OSAREA_USAGE */
- unsigned char PMMode; /* Shutdown mode */
- RESTART_BLOCK RestartBlock;
- SECURITY Security;
- ERROR_LOG ErrorLog[2];
-
- /* Global Environment information */
- void * GEAddress;
- unsigned long GELength;
-
- /* Date&Time from RTC of last change to Global Environment */
- unsigned long GELastWriteDT[2];
-
- /* Configuration information */
- void * ConfigAddress;
- unsigned long ConfigLength;
-
- /* Date&Time from RTC of last change to Configuration */
- unsigned long ConfigLastWriteDT[2];
- unsigned long ConfigCount; /* Count of entries in Configuration */
-
- /* OS dependent temp area */
- void * OSAreaAddress;
- unsigned long OSAreaLength;
-
- /* Date&Time from RTC of last change to OSAreaArea */
- unsigned long OSAreaLastWriteDT[2];
-} HEADER;
-
-/* Here is the whole map of the NVRAM */
-typedef struct _NVRAM_MAP {
- HEADER Header;
- unsigned char GEArea[NVSIZE-CONFSIZE-OSAREASIZE-sizeof(HEADER)];
- unsigned char OSArea[OSAREASIZE];
- unsigned char ConfigArea[CONFSIZE];
-} NVRAM_MAP;
-
-/* Routines to manipulate the NVRAM */
-void init_prep_nvram(void);
-char *prep_nvram_get_var(const char *name);
-char *prep_nvram_first_var(void);
-char *prep_nvram_next_var(char *name);
-
-/* Routines to read and write directly to the NVRAM */
-unsigned char prep_nvram_read_val(int addr);
-void prep_nvram_write_val(int addr,
- unsigned char val);
-
-#endif /* _PPC_PREP_NVRAM_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/prom.h b/include/asm-ppc/prom.h
deleted file mode 100644
index 71f4c99..0000000
--- a/include/asm-ppc/prom.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Definitions for talking to the Open Firmware PROM on
- * Power Macintosh computers.
- *
- * Copyright (C) 1996 Paul Mackerras.
- */
-#ifdef __KERNEL__
-#ifndef _PPC_PROM_H
-#define _PPC_PROM_H
-
-/* This is used in arch/ppc/mm/mem_pieces.h */
-struct reg_property {
- unsigned int address;
- unsigned int size;
-};
-
-/*
- * These macros assist in performing the address calculations that we
- * need to do to access data when the kernel is running at an address
- * that is different from the address that the kernel is linked at.
- * The reloc_offset() function returns the difference between these
- * two addresses and the macros simplify the process of adding or
- * subtracting this offset to/from pointer values.
- */
-extern unsigned long reloc_offset(void);
-extern unsigned long add_reloc_offset(unsigned long);
-extern unsigned long sub_reloc_offset(unsigned long);
-
-#define PTRRELOC(x) ((typeof(x))add_reloc_offset((unsigned long)(x)))
-#define PTRUNRELOC(x) ((typeof(x))sub_reloc_offset((unsigned long)(x)))
-
-/*
- * Fallback definitions since we don't support OF in arch/ppc any more.
- */
-#define machine_is_compatible(x) 0
-#define of_find_compatible_node(f, t, c) NULL
-#define of_get_property(p, n, l) NULL
-
-#endif /* _PPC_PROM_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/raven.h b/include/asm-ppc/raven.h
deleted file mode 100644
index 66f52cc..0000000
--- a/include/asm-ppc/raven.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * include/asm-ppc/raven.h -- Raven MPIC chip.
- *
- * Copyright (C) 1998 Johnnie Peters
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive
- * for more details.
- */
-
-#ifdef __KERNEL__
-#ifndef _ASMPPC_RAVEN_H
-#define _ASMPPC_RAVEN_H
-
-#define MVME2600_INT_SIO 0
-#define MVME2600_INT_FALCN_ECC_ERR 1
-#define MVME2600_INT_PCI_ETHERNET 2
-#define MVME2600_INT_PCI_SCSI 3
-#define MVME2600_INT_PCI_GRAPHICS 4
-#define MVME2600_INT_PCI_VME0 5
-#define MVME2600_INT_PCI_VME1 6
-#define MVME2600_INT_PCI_VME2 7
-#define MVME2600_INT_PCI_VME3 8
-#define MVME2600_INT_PCI_INTA 9
-#define MVME2600_INT_PCI_INTB 10
-#define MVME2600_INT_PCI_INTC 11
-#define MVME2600_INT_PCI_INTD 12
-#define MVME2600_INT_LM_SIG0 13
-#define MVME2600_INT_LM_SIG1 14
-
-extern struct hw_interrupt_type raven_pic;
-
-extern int raven_init(void);
-#endif /* _ASMPPC_RAVEN_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
deleted file mode 100644
index 91e96af..0000000
--- a/include/asm-ppc/reg_booke.h
+++ /dev/null
@@ -1,443 +0,0 @@
-/*
- * Contains register definitions common to the Book E PowerPC
- * specification. Notice that while the IBM-40x series of CPUs
- * are not true Book E PowerPCs, they borrowed a number of features
- * before Book E was finalized, and are included here as well. Unfortunatly,
- * they sometimes used different locations than true Book E CPUs did.
- */
-#ifdef __KERNEL__
-#ifndef __ASM_PPC_REG_BOOKE_H__
-#define __ASM_PPC_REG_BOOKE_H__
-
-#ifndef __ASSEMBLY__
-/* Performance Monitor Registers */
-#define mfpmr(rn) ({unsigned int rval; \
- asm volatile("mfpmr %0," __stringify(rn) \
- : "=r" (rval)); rval;})
-#define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
-#endif /* __ASSEMBLY__ */
-
-/* Freescale Book E Performance Monitor APU Registers */
-#define PMRN_PMC0 0x010 /* Performance Monitor Counter 0 */
-#define PMRN_PMC1 0x011 /* Performance Monitor Counter 1 */
-#define PMRN_PMC2 0x012 /* Performance Monitor Counter 1 */
-#define PMRN_PMC3 0x013 /* Performance Monitor Counter 1 */
-#define PMRN_PMLCA0 0x090 /* PM Local Control A0 */
-#define PMRN_PMLCA1 0x091 /* PM Local Control A1 */
-#define PMRN_PMLCA2 0x092 /* PM Local Control A2 */
-#define PMRN_PMLCA3 0x093 /* PM Local Control A3 */
-
-#define PMLCA_FC 0x80000000 /* Freeze Counter */
-#define PMLCA_FCS 0x40000000 /* Freeze in Supervisor */
-#define PMLCA_FCU 0x20000000 /* Freeze in User */
-#define PMLCA_FCM1 0x10000000 /* Freeze when PMM==1 */
-#define PMLCA_FCM0 0x08000000 /* Freeze when PMM==0 */
-#define PMLCA_CE 0x04000000 /* Condition Enable */
-
-#define PMLCA_EVENT_MASK 0x007f0000 /* Event field */
-#define PMLCA_EVENT_SHIFT 16
-
-#define PMRN_PMLCB0 0x110 /* PM Local Control B0 */
-#define PMRN_PMLCB1 0x111 /* PM Local Control B1 */
-#define PMRN_PMLCB2 0x112 /* PM Local Control B2 */
-#define PMRN_PMLCB3 0x113 /* PM Local Control B3 */
-
-#define PMLCB_THRESHMUL_MASK 0x0700 /* Threshhold Multiple Field */
-#define PMLCB_THRESHMUL_SHIFT 8
-
-#define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */
-#define PMLCB_THRESHOLD_SHIFT 0
-
-#define PMRN_PMGC0 0x190 /* PM Global Control 0 */
-
-#define PMGC0_FAC 0x80000000 /* Freeze all Counters */
-#define PMGC0_PMIE 0x40000000 /* Interrupt Enable */
-#define PMGC0_FCECE 0x20000000 /* Freeze countes on
- Enabled Condition or
- Event */
-
-#define PMRN_UPMC0 0x000 /* User Performance Monitor Counter 0 */
-#define PMRN_UPMC1 0x001 /* User Performance Monitor Counter 1 */
-#define PMRN_UPMC2 0x002 /* User Performance Monitor Counter 1 */
-#define PMRN_UPMC3 0x003 /* User Performance Monitor Counter 1 */
-#define PMRN_UPMLCA0 0x080 /* User PM Local Control A0 */
-#define PMRN_UPMLCA1 0x081 /* User PM Local Control A1 */
-#define PMRN_UPMLCA2 0x082 /* User PM Local Control A2 */
-#define PMRN_UPMLCA3 0x083 /* User PM Local Control A3 */
-#define PMRN_UPMLCB0 0x100 /* User PM Local Control B0 */
-#define PMRN_UPMLCB1 0x101 /* User PM Local Control B1 */
-#define PMRN_UPMLCB2 0x102 /* User PM Local Control B2 */
-#define PMRN_UPMLCB3 0x103 /* User PM Local Control B3 */
-#define PMRN_UPMGC0 0x180 /* User PM Global Control 0 */
-
-
-/* Machine State Register (MSR) Fields */
-#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
-#define MSR_SPE (1<<25) /* Enable SPE */
-#define MSR_DWE (1<<10) /* Debug Wait Enable */
-#define MSR_UBLE (1<<10) /* BTB lock enable (e500) */
-#define MSR_IS MSR_IR /* Instruction Space */
-#define MSR_DS MSR_DR /* Data Space */
-#define MSR_PMM (1<<2) /* Performance monitor mark bit */
-
-/* Default MSR for kernel mode. */
-#if defined (CONFIG_40x)
-#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
-#elif defined(CONFIG_BOOKE)
-#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_CE)
-#endif
-
-/* Special Purpose Registers (SPRNs)*/
-#define SPRN_DECAR 0x036 /* Decrementer Auto Reload Register */
-#define SPRN_IVPR 0x03F /* Interrupt Vector Prefix Register */
-#define SPRN_USPRG0 0x100 /* User Special Purpose Register General 0 */
-#define SPRN_SPRG4R 0x104 /* Special Purpose Register General 4 Read */
-#define SPRN_SPRG5R 0x105 /* Special Purpose Register General 5 Read */
-#define SPRN_SPRG6R 0x106 /* Special Purpose Register General 6 Read */
-#define SPRN_SPRG7R 0x107 /* Special Purpose Register General 7 Read */
-#define SPRN_SPRG4W 0x114 /* Special Purpose Register General 4 Write */
-#define SPRN_SPRG5W 0x115 /* Special Purpose Register General 5 Write */
-#define SPRN_SPRG6W 0x116 /* Special Purpose Register General 6 Write */
-#define SPRN_SPRG7W 0x117 /* Special Purpose Register General 7 Write */
-#define SPRN_DBCR2 0x136 /* Debug Control Register 2 */
-#define SPRN_IAC3 0x13A /* Instruction Address Compare 3 */
-#define SPRN_IAC4 0x13B /* Instruction Address Compare 4 */
-#define SPRN_DVC1 0x13E /* Data Value Compare Register 1 */
-#define SPRN_DVC2 0x13F /* Data Value Compare Register 2 */
-#define SPRN_IVOR0 0x190 /* Interrupt Vector Offset Register 0 */
-#define SPRN_IVOR1 0x191 /* Interrupt Vector Offset Register 1 */
-#define SPRN_IVOR2 0x192 /* Interrupt Vector Offset Register 2 */
-#define SPRN_IVOR3 0x193 /* Interrupt Vector Offset Register 3 */
-#define SPRN_IVOR4 0x194 /* Interrupt Vector Offset Register 4 */
-#define SPRN_IVOR5 0x195 /* Interrupt Vector Offset Register 5 */
-#define SPRN_IVOR6 0x196 /* Interrupt Vector Offset Register 6 */
-#define SPRN_IVOR7 0x197 /* Interrupt Vector Offset Register 7 */
-#define SPRN_IVOR8 0x198 /* Interrupt Vector Offset Register 8 */
-#define SPRN_IVOR9 0x199 /* Interrupt Vector Offset Register 9 */
-#define SPRN_IVOR10 0x19A /* Interrupt Vector Offset Register 10 */
-#define SPRN_IVOR11 0x19B /* Interrupt Vector Offset Register 11 */
-#define SPRN_IVOR12 0x19C /* Interrupt Vector Offset Register 12 */
-#define SPRN_IVOR13 0x19D /* Interrupt Vector Offset Register 13 */
-#define SPRN_IVOR14 0x19E /* Interrupt Vector Offset Register 14 */
-#define SPRN_IVOR15 0x19F /* Interrupt Vector Offset Register 15 */
-#define SPRN_SPEFSCR 0x200 /* SPE & Embedded FP Status & Control */
-#define SPRN_BBEAR 0x201 /* Branch Buffer Entry Address Register */
-#define SPRN_BBTAR 0x202 /* Branch Buffer Target Address Register */
-#define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */
-#define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */
-#define SPRN_IVOR34 0x212 /* Interrupt Vector Offset Register 34 */
-#define SPRN_IVOR35 0x213 /* Interrupt Vector Offset Register 35 */
-#define SPRN_MCSRR0 0x23A /* Machine Check Save and Restore Register 0 */
-#define SPRN_MCSRR1 0x23B /* Machine Check Save and Restore Register 1 */
-#define SPRN_MCSR 0x23C /* Machine Check Status Register */
-#define SPRN_MCAR 0x23D /* Machine Check Address Register */
-#define SPRN_DSRR0 0x23E /* Debug Save and Restore Register 0 */
-#define SPRN_DSRR1 0x23F /* Debug Save and Restore Register 1 */
-#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */
-#define SPRN_MAS1 0x271 /* MMU Assist Register 1 */
-#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
-#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */
-#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
-#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */
-#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
-#define SPRN_MAS7 0x3b0 /* MMU Assist Register 7 */
-#define SPRN_PID1 0x279 /* Process ID Register 1 */
-#define SPRN_PID2 0x27A /* Process ID Register 2 */
-#define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */
-#define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */
-#define SPRN_CCR1 0x378 /* Core Configuration Register 1 */
-#define SPRN_ZPR 0x3B0 /* Zone Protection Register (40x) */
-#define SPRN_MMUCR 0x3B2 /* MMU Control Register */
-#define SPRN_CCR0 0x3B3 /* Core Configuration Register 0 */
-#define SPRN_SGR 0x3B9 /* Storage Guarded Register */
-#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */
-#define SPRN_SLER 0x3BB /* Little-endian real mode */
-#define SPRN_SU0R 0x3BC /* "User 0" real mode (40x) */
-#define SPRN_DCMP 0x3D1 /* Data TLB Compare Register */
-#define SPRN_ICDBDR 0x3D3 /* Instruction Cache Debug Data Register */
-#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */
-#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */
-#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
-#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
-#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */
-#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
-#define SPRN_SVR 0x3FF /* System Version Register */
-
-/*
- * SPRs which have conflicting definitions on true Book E versus classic,
- * or IBM 40x.
- */
-#ifdef CONFIG_BOOKE
-#define SPRN_PID 0x030 /* Process ID */
-#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */
-#define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */
-#define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */
-#define SPRN_DEAR 0x03D /* Data Error Address Register */
-#define SPRN_ESR 0x03E /* Exception Syndrome Register */
-#define SPRN_PIR 0x11E /* Processor Identification Register */
-#define SPRN_DBSR 0x130 /* Debug Status Register */
-#define SPRN_DBCR0 0x134 /* Debug Control Register 0 */
-#define SPRN_DBCR1 0x135 /* Debug Control Register 1 */
-#define SPRN_IAC1 0x138 /* Instruction Address Compare 1 */
-#define SPRN_IAC2 0x139 /* Instruction Address Compare 2 */
-#define SPRN_DAC1 0x13C /* Data Address Compare 1 */
-#define SPRN_DAC2 0x13D /* Data Address Compare 2 */
-#define SPRN_TSR 0x150 /* Timer Status Register */
-#define SPRN_TCR 0x154 /* Timer Control Register */
-#endif /* Book E */
-#ifdef CONFIG_40x
-#define SPRN_PID 0x3B1 /* Process ID */
-#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */
-#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */
-#define SPRN_DEAR 0x3D5 /* Data Error Address Register */
-#define SPRN_TSR 0x3D8 /* Timer Status Register */
-#define SPRN_TCR 0x3DA /* Timer Control Register */
-#define SPRN_SRR2 0x3DE /* Save/Restore Register 2 */
-#define SPRN_SRR3 0x3DF /* Save/Restore Register 3 */
-#define SPRN_DBSR 0x3F0 /* Debug Status Register */
-#define SPRN_DBCR0 0x3F2 /* Debug Control Register 0 */
-#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */
-#define SPRN_DAC2 0x3F7 /* Data Address Compare 2 */
-#define SPRN_CSRR0 SPRN_SRR2 /* Critical Save and Restore Register 0 */
-#define SPRN_CSRR1 SPRN_SRR3 /* Critical Save and Restore Register 1 */
-#endif
-
-/* Bit definitions for CCR1. */
-#define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */
-#define CCR1_TCS 0x00000080 /* Timer Clock Select */
-
-/* Bit definitions for the MCSR. */
-#ifdef CONFIG_4xx
-#define MCSR_MCS 0x80000000 /* Machine Check Summary */
-#define MCSR_IB 0x40000000 /* Instruction PLB Error */
-#define MCSR_DRB 0x20000000 /* Data Read PLB Error */
-#define MCSR_DWB 0x10000000 /* Data Write PLB Error */
-#define MCSR_TLBP 0x08000000 /* TLB Parity Error */
-#define MCSR_ICP 0x04000000 /* I-Cache Parity Error */
-#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */
-#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */
-#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */
-#endif
-
-/* Bit definitions for the DBSR. */
-/*
- * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
- */
-#ifdef CONFIG_BOOKE
-#define DBSR_IC 0x08000000 /* Instruction Completion */
-#define DBSR_BT 0x04000000 /* Branch Taken */
-#define DBSR_TIE 0x01000000 /* Trap Instruction Event */
-#define DBSR_IAC1 0x00800000 /* Instr Address Compare 1 Event */
-#define DBSR_IAC2 0x00400000 /* Instr Address Compare 2 Event */
-#define DBSR_IAC3 0x00200000 /* Instr Address Compare 3 Event */
-#define DBSR_IAC4 0x00100000 /* Instr Address Compare 4 Event */
-#define DBSR_DAC1R 0x00080000 /* Data Addr Compare 1 Read Event */
-#define DBSR_DAC1W 0x00040000 /* Data Addr Compare 1 Write Event */
-#define DBSR_DAC2R 0x00020000 /* Data Addr Compare 2 Read Event */
-#define DBSR_DAC2W 0x00010000 /* Data Addr Compare 2 Write Event */
-#endif
-#ifdef CONFIG_40x
-#define DBSR_IC 0x80000000 /* Instruction Completion */
-#define DBSR_BT 0x40000000 /* Branch taken */
-#define DBSR_TIE 0x10000000 /* Trap Instruction debug Event */
-#define DBSR_IAC1 0x04000000 /* Instruction Address Compare 1 Event */
-#define DBSR_IAC2 0x02000000 /* Instruction Address Compare 2 Event */
-#define DBSR_IAC3 0x00080000 /* Instruction Address Compare 3 Event */
-#define DBSR_IAC4 0x00040000 /* Instruction Address Compare 4 Event */
-#define DBSR_DAC1R 0x01000000 /* Data Address Compare 1 Read Event */
-#define DBSR_DAC1W 0x00800000 /* Data Address Compare 1 Write Event */
-#define DBSR_DAC2R 0x00400000 /* Data Address Compare 2 Read Event */
-#define DBSR_DAC2W 0x00200000 /* Data Address Compare 2 Write Event */
-#endif
-
-/* Bit definitions related to the ESR. */
-#define ESR_MCI 0x80000000 /* Machine Check - Instruction */
-#define ESR_IMCP 0x80000000 /* Instr. Machine Check - Protection */
-#define ESR_IMCN 0x40000000 /* Instr. Machine Check - Non-config */
-#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */
-#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */
-#define ESR_PIL 0x08000000 /* Program Exception - Illegal */
-#define ESR_PPR 0x04000000 /* Program Exception - Privileged */
-#define ESR_PTR 0x02000000 /* Program Exception - Trap */
-#define ESR_FP 0x01000000 /* Floating Point Operation */
-#define ESR_DST 0x00800000 /* Storage Exception - Data miss */
-#define ESR_DIZ 0x00400000 /* Storage Exception - Zone fault */
-#define ESR_ST 0x00800000 /* Store Operation */
-#define ESR_DLK 0x00200000 /* Data Cache Locking */
-#define ESR_ILK 0x00100000 /* Instr. Cache Locking */
-#define ESR_PUO 0x00040000 /* Unimplemented Operation exception */
-#define ESR_BO 0x00020000 /* Byte Ordering */
-
-/* Bit definitions related to the DBCR0. */
-#define DBCR0_EDM 0x80000000 /* External Debug Mode */
-#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */
-#define DBCR0_RST 0x30000000 /* all the bits in the RST field */
-#define DBCR0_RST_SYSTEM 0x30000000 /* System Reset */
-#define DBCR0_RST_CHIP 0x20000000 /* Chip Reset */
-#define DBCR0_RST_CORE 0x10000000 /* Core Reset */
-#define DBCR0_RST_NONE 0x00000000 /* No Reset */
-#define DBCR0_IC 0x08000000 /* Instruction Completion */
-#define DBCR0_BT 0x04000000 /* Branch Taken */
-#define DBCR0_EDE 0x02000000 /* Exception Debug Event */
-#define DBCR0_TDE 0x01000000 /* TRAP Debug Event */
-#define DBCR0_IA1 0x00800000 /* Instr Addr compare 1 enable */
-#define DBCR0_IA2 0x00400000 /* Instr Addr compare 2 enable */
-#define DBCR0_IA12 0x00200000 /* Instr Addr 1-2 range enable */
-#define DBCR0_IA12X 0x00100000 /* Instr Addr 1-2 range eXclusive */
-#define DBCR0_IA3 0x00080000 /* Instr Addr compare 3 enable */
-#define DBCR0_IA4 0x00040000 /* Instr Addr compare 4 enable */
-#define DBCR0_IA34 0x00020000 /* Instr Addr 3-4 range Enable */
-#define DBCR0_IA34X 0x00010000 /* Instr Addr 3-4 range eXclusive */
-#define DBCR0_IA12T 0x00008000 /* Instr Addr 1-2 range Toggle */
-#define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */
-#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */
-
-/* Bit definitions related to the TCR. */
-#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
-#define TCR_WP_MASK TCR_WP(3)
-#define WP_2_17 0 /* 2^17 clocks */
-#define WP_2_21 1 /* 2^21 clocks */
-#define WP_2_25 2 /* 2^25 clocks */
-#define WP_2_29 3 /* 2^29 clocks */
-#define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */
-#define TCR_WRC_MASK TCR_WRC(3)
-#define WRC_NONE 0 /* No reset will occur */
-#define WRC_CORE 1 /* Core reset will occur */
-#define WRC_CHIP 2 /* Chip reset will occur */
-#define WRC_SYSTEM 3 /* System reset will occur */
-#define TCR_WIE 0x08000000 /* WDT Interrupt Enable */
-#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */
-#define TCR_DIE TCR_PIE /* DEC Interrupt Enable */
-#define TCR_FP(x) (((x)&0x3)<<24) /* FIT Period */
-#define TCR_FP_MASK TCR_FP(3)
-#define FP_2_9 0 /* 2^9 clocks */
-#define FP_2_13 1 /* 2^13 clocks */
-#define FP_2_17 2 /* 2^17 clocks */
-#define FP_2_21 3 /* 2^21 clocks */
-#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */
-#define TCR_ARE 0x00400000 /* Auto Reload Enable */
-
-/* Bit definitions for the TSR. */
-#define TSR_ENW 0x80000000 /* Enable Next Watchdog */
-#define TSR_WIS 0x40000000 /* WDT Interrupt Status */
-#define TSR_WRS(x) (((x)&0x3)<<28) /* WDT Reset Status */
-#define WRS_NONE 0 /* No WDT reset occurred */
-#define WRS_CORE 1 /* WDT forced core reset */
-#define WRS_CHIP 2 /* WDT forced chip reset */
-#define WRS_SYSTEM 3 /* WDT forced system reset */
-#define TSR_PIS 0x08000000 /* PIT Interrupt Status */
-#define TSR_DIS TSR_PIS /* DEC Interrupt Status */
-#define TSR_FIS 0x04000000 /* FIT Interrupt Status */
-
-/* Bit definitions for the DCCR. */
-#define DCCR_NOCACHE 0 /* Noncacheable */
-#define DCCR_CACHE 1 /* Cacheable */
-
-/* Bit definitions for DCWR. */
-#define DCWR_COPY 0 /* Copy-back */
-#define DCWR_WRITE 1 /* Write-through */
-
-/* Bit definitions for ICCR. */
-#define ICCR_NOCACHE 0 /* Noncacheable */
-#define ICCR_CACHE 1 /* Cacheable */
-
-/* Bit definitions for L1CSR0. */
-#define L1CSR0_CLFC 0x00000100 /* Cache Lock Bits Flash Clear */
-#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */
-#define L1CSR0_CFI 0x00000002 /* Cache Flash Invalidate */
-#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */
-
-/* Bit definitions for L1CSR1. */
-#define L1CSR1_ICLFR 0x00000100 /* Instr Cache Lock Bits Flash Reset */
-#define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */
-#define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */
-
-/* Bit definitions for SGR. */
-#define SGR_NORMAL 0 /* Speculative fetching allowed. */
-#define SGR_GUARDED 1 /* Speculative fetching disallowed. */
-
-/* Bit definitions for SPEFSCR. */
-#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */
-#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */
-#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */
-#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */
-#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */
-#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */
-#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */
-#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */
-#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */
-#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */
-#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */
-#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */
-#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */
-#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */
-#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */
-#define SPEFSCR_OV 0x00004000 /* Integer overflow */
-#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */
-#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */
-#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */
-#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */
-#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */
-#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */
-#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */
-#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */
-#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */
-#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */
-#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */
-#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */
-
-/*
- * The IBM-403 is an even more odd special case, as it is much
- * older than the IBM-405 series. We put these down here incase someone
- * wishes to support these machines again.
- */
-#ifdef CONFIG_403GCX
-/* Special Purpose Registers (SPRNs)*/
-#define SPRN_TBHU 0x3CC /* Time Base High User-mode */
-#define SPRN_TBLU 0x3CD /* Time Base Low User-mode */
-#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */
-#define SPRN_TBHI 0x3DC /* Time Base High */
-#define SPRN_TBLO 0x3DD /* Time Base Low */
-#define SPRN_DBCR 0x3F2 /* Debug Control Regsiter */
-#define SPRN_PBL1 0x3FC /* Protection Bound Lower 1 */
-#define SPRN_PBL2 0x3FE /* Protection Bound Lower 2 */
-#define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */
-#define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */
-
-
-/* Bit definitions for the DBCR. */
-#define DBCR_EDM DBCR0_EDM
-#define DBCR_IDM DBCR0_IDM
-#define DBCR_RST(x) (((x) & 0x3) << 28)
-#define DBCR_RST_NONE 0
-#define DBCR_RST_CORE 1
-#define DBCR_RST_CHIP 2
-#define DBCR_RST_SYSTEM 3
-#define DBCR_IC DBCR0_IC /* Instruction Completion Debug Evnt */
-#define DBCR_BT DBCR0_BT /* Branch Taken Debug Event */
-#define DBCR_EDE DBCR0_EDE /* Exception Debug Event */
-#define DBCR_TDE DBCR0_TDE /* TRAP Debug Event */
-#define DBCR_FER 0x00F80000 /* First Events Remaining Mask */
-#define DBCR_FT 0x00040000 /* Freeze Timers on Debug Event */
-#define DBCR_IA1 0x00020000 /* Instr. Addr. Compare 1 Enable */
-#define DBCR_IA2 0x00010000 /* Instr. Addr. Compare 2 Enable */
-#define DBCR_D1R 0x00008000 /* Data Addr. Compare 1 Read Enable */
-#define DBCR_D1W 0x00004000 /* Data Addr. Compare 1 Write Enable */
-#define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */
-#define DAC_BYTE 0
-#define DAC_HALF 1
-#define DAC_WORD 2
-#define DAC_QUAD 3
-#define DBCR_D2R 0x00000800 /* Data Addr. Compare 2 Read Enable */
-#define DBCR_D2W 0x00000400 /* Data Addr. Compare 2 Write Enable */
-#define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */
-#define DBCR_SBT 0x00000040 /* Second Branch Taken Debug Event */
-#define DBCR_SED 0x00000020 /* Second Exception Debug Event */
-#define DBCR_STD 0x00000010 /* Second Trap Debug Event */
-#define DBCR_SIA 0x00000008 /* Second IAC Enable */
-#define DBCR_SDA 0x00000004 /* Second DAC Enable */
-#define DBCR_JOI 0x00000002 /* JTAG Serial Outbound Int. Enable */
-#define DBCR_JII 0x00000001 /* JTAG Serial Inbound Int. Enable */
-#endif /* 403GCX */
-#endif /* __ASM_PPC_REG_BOOKE_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/residual.h b/include/asm-ppc/residual.h
deleted file mode 100644
index 934810d..0000000
--- a/include/asm-ppc/residual.h
+++ /dev/null
@@ -1,350 +0,0 @@
-/* 7/18/95 */
-/*----------------------------------------------------------------------------*/
-/* Residual Data header definitions and prototypes */
-/*----------------------------------------------------------------------------*/
-
-/* Structure map for RESIDUAL on PowerPC Reference Platform */
-/* residual.h - Residual data structure passed in r3. */
-/* Load point passed in r4 to boot image. */
-/* For enum's: if given in hex then they are bit significant, */
-/* i.e. only one bit is on for each enum */
-/* Reserved fields must be filled with zeros. */
-
-#ifdef __KERNEL__
-#ifndef _RESIDUAL_
-#define _RESIDUAL_
-
-#ifndef __ASSEMBLY__
-
-#define MAX_CPUS 32 /* These should be set to the maximum */
-#define MAX_MEMS 64 /* number possible for this system. */
-#define MAX_DEVICES 256 /* Changing these will change the */
-#define AVE_PNP_SIZE 32 /* structure, hence the version of */
-#define MAX_MEM_SEGS 64 /* this header file. */
-
-/*----------------------------------------------------------------------------*/
-/* Public structures... */
-/*----------------------------------------------------------------------------*/
-
-#include <asm/pnp.h>
-
-typedef enum _L1CACHE_TYPE {
- NoneCAC = 0,
- SplitCAC = 1,
- CombinedCAC = 2
- } L1CACHE_TYPE;
-
-typedef enum _TLB_TYPE {
- NoneTLB = 0,
- SplitTLB = 1,
- CombinedTLB = 2
- } TLB_TYPE;
-
-typedef enum _FIRMWARE_SUPPORT {
- Conventional = 0x01,
- OpenFirmware = 0x02,
- Diagnostics = 0x04,
- LowDebug = 0x08,
- Multiboot = 0x10,
- LowClient = 0x20,
- Hex41 = 0x40,
- FAT = 0x80,
- ISO9660 = 0x0100,
- SCSI_InitiatorID_Override = 0x0200,
- Tape_Boot = 0x0400,
- FW_Boot_Path = 0x0800
- } FIRMWARE_SUPPORT;
-
-typedef enum _FIRMWARE_SUPPLIERS {
- IBMFirmware = 0x00,
- MotoFirmware = 0x01, /* 7/18/95 */
- FirmWorks = 0x02, /* 10/5/95 */
- Bull = 0x03, /* 04/03/96 */
- } FIRMWARE_SUPPLIERS;
-
-typedef enum _ENDIAN_SWITCH_METHODS {
- UsePort92 = 0x01,
- UsePCIConfigA8 = 0x02,
- UseFF001030 = 0x03,
- } ENDIAN_SWITCH_METHODS;
-
-typedef enum _SPREAD_IO_METHODS {
- UsePort850 = 0x00,
-/*UsePCIConfigA8 = 0x02,*/
- } SPREAD_IO_METHODS;
-
-typedef struct _VPD {
-
- /* Box dependent stuff */
- unsigned char PrintableModel[32]; /* Null terminated string.
- Must be of the form:
- vvv,<20h>,<model designation>,<0x0>
- where vvv is the vendor ID
- e.g. IBM PPS MODEL 6015<0x0> */
- unsigned char Serial[16]; /* 12/94:
- Serial Number; must be of the form:
- vvv<serial number> where vvv is the
- vendor ID.
- e.g. IBM60151234567<20h><20h> */
- unsigned char Reserved[48];
- unsigned long FirmwareSupplier; /* See FirmwareSuppliers enum */
- unsigned long FirmwareSupports; /* See FirmwareSupport enum */
- unsigned long NvramSize; /* Size of nvram in bytes */
- unsigned long NumSIMMSlots;
- unsigned short EndianSwitchMethod; /* See EndianSwitchMethods enum */
- unsigned short SpreadIOMethod; /* See SpreadIOMethods enum */
- unsigned long SmpIar;
- unsigned long RAMErrLogOffset; /* Heap offset to error log */
- unsigned long Reserved5;
- unsigned long Reserved6;
- unsigned long ProcessorHz; /* Processor clock frequency in Hertz */
- unsigned long ProcessorBusHz; /* Processor bus clock frequency */
- unsigned long Reserved7;
- unsigned long TimeBaseDivisor; /* (Bus clocks per timebase tic)*1000 */
- unsigned long WordWidth; /* Word width in bits */
- unsigned long PageSize; /* Page size in bytes */
- unsigned long CoherenceBlockSize; /* Unit of transfer in/out of cache
- for which coherency is maintained;
- normally <= CacheLineSize. */
- unsigned long GranuleSize; /* Unit of lock allocation to avoid */
- /* false sharing of locks. */
-
- /* L1 Cache variables */
- unsigned long CacheSize; /* L1 Cache size in KB. This is the */
- /* total size of the L1, whether */
- /* combined or split */
- unsigned long CacheAttrib; /* L1CACHE_TYPE */
- unsigned long CacheAssoc; /* L1 Cache associativity. Use this
- for combined cache. If split, put
- zeros here. */
- unsigned long CacheLineSize; /* L1 Cache line size in bytes. Use
- for combined cache. If split, put
- zeros here. */
- /* For split L1 Cache: (= combined if combined cache) */
- unsigned long I_CacheSize;
- unsigned long I_CacheAssoc;
- unsigned long I_CacheLineSize;
- unsigned long D_CacheSize;
- unsigned long D_CacheAssoc;
- unsigned long D_CacheLineSize;
-
- /* Translation Lookaside Buffer variables */
- unsigned long TLBSize; /* Total number of TLBs on the system */
- unsigned long TLBAttrib; /* Combined I+D or split TLB */
- unsigned long TLBAssoc; /* TLB Associativity. Use this for
- combined TLB. If split, put zeros
- here. */
- /* For split TLB: (= combined if combined TLB) */
- unsigned long I_TLBSize;
- unsigned long I_TLBAssoc;
- unsigned long D_TLBSize;
- unsigned long D_TLBAssoc;
-
- unsigned long ExtendedVPD; /* Offset to extended VPD area;
- null if unused */
- } VPD;
-
-typedef enum _DEVICE_FLAGS {
- Enabled = 0x4000, /* 1 - PCI device is enabled */
- Integrated = 0x2000,
- Failed = 0x1000, /* 1 - device failed POST code tests */
- Static = 0x0800, /* 0 - dynamically configurable
- 1 - static */
- Dock = 0x0400, /* 0 - not a docking station device
- 1 - is a docking station device */
- Boot = 0x0200, /* 0 - device cannot be used for BOOT
- 1 - can be a BOOT device */
- Configurable = 0x0100, /* 1 - device is configurable */
- Disableable = 0x80, /* 1 - device can be disabled */
- PowerManaged = 0x40, /* 0 - not managed; 1 - managed */
- ReadOnly = 0x20, /* 1 - device is read only */
- Removable = 0x10, /* 1 - device is removable */
- ConsoleIn = 0x08,
- ConsoleOut = 0x04,
- Input = 0x02,
- Output = 0x01
- } DEVICE_FLAGS;
-
-typedef enum _BUS_ID {
- ISADEVICE = 0x01,
- EISADEVICE = 0x02,
- PCIDEVICE = 0x04,
- PCMCIADEVICE = 0x08,
- PNPISADEVICE = 0x10,
- MCADEVICE = 0x20,
- MXDEVICE = 0x40, /* Devices on mezzanine bus */
- PROCESSORDEVICE = 0x80, /* Devices on processor bus */
- VMEDEVICE = 0x100,
- } BUS_ID;
-
-typedef struct _DEVICE_ID {
- unsigned long BusId; /* See BUS_ID enum above */
- unsigned long DevId; /* Big Endian format */
- unsigned long SerialNum; /* For multiple usage of a single
- DevId */
- unsigned long Flags; /* See DEVICE_FLAGS enum above */
- unsigned char BaseType; /* See pnp.h for bit definitions */
- unsigned char SubType; /* See pnp.h for bit definitions */
- unsigned char Interface; /* See pnp.h for bit definitions */
- unsigned char Spare;
- } DEVICE_ID;
-
-typedef union _BUS_ACCESS {
- struct _PnPAccess{
- unsigned char CSN;
- unsigned char LogicalDevNumber;
- unsigned short ReadDataPort;
- } PnPAccess;
- struct _ISAAccess{
- unsigned char SlotNumber; /* ISA Slot Number generally not
- available; 0 if unknown */
- unsigned char LogicalDevNumber;
- unsigned short ISAReserved;
- } ISAAccess;
- struct _MCAAccess{
- unsigned char SlotNumber;
- unsigned char LogicalDevNumber;
- unsigned short MCAReserved;
- } MCAAccess;
- struct _PCMCIAAccess{
- unsigned char SlotNumber;
- unsigned char LogicalDevNumber;
- unsigned short PCMCIAReserved;
- } PCMCIAAccess;
- struct _EISAAccess{
- unsigned char SlotNumber;
- unsigned char FunctionNumber;
- unsigned short EISAReserved;
- } EISAAccess;
- struct _PCIAccess{
- unsigned char BusNumber;
- unsigned char DevFuncNumber;
- unsigned short PCIReserved;
- } PCIAccess;
- struct _ProcBusAccess{
- unsigned char BusNumber;
- unsigned char BUID;
- unsigned short ProcBusReserved;
- } ProcBusAccess;
- } BUS_ACCESS;
-
-/* Per logical device information */
-typedef struct _PPC_DEVICE {
- DEVICE_ID DeviceId;
- BUS_ACCESS BusAccess;
-
- /* The following three are offsets into the DevicePnPHeap */
- /* All are in PnP compressed format */
- unsigned long AllocatedOffset; /* Allocated resource description */
- unsigned long PossibleOffset; /* Possible resource description */
- unsigned long CompatibleOffset; /* Compatible device identifiers */
- } PPC_DEVICE;
-
-typedef enum _CPU_STATE {
- CPU_GOOD = 0, /* CPU is present, and active */
- CPU_GOOD_FW = 1, /* CPU is present, and in firmware */
- CPU_OFF = 2, /* CPU is present, but inactive */
- CPU_FAILED = 3, /* CPU is present, but failed POST */
- CPU_NOT_PRESENT = 255 /* CPU not present */
- } CPU_STATE;
-
-typedef struct _PPC_CPU {
- unsigned long CpuType; /* Result of mfspr from Processor
- Version Register (PVR).
- PVR(0-15) = Version (e.g. 601)
- PVR(16-31 = EC Level */
- unsigned char CpuNumber; /* CPU Number for this processor */
- unsigned char CpuState; /* CPU State, see CPU_STATE enum */
- unsigned short Reserved;
- } PPC_CPU;
-
-typedef struct _PPC_MEM {
- unsigned long SIMMSize; /* 0 - absent or bad
- 8M, 32M (in MB) */
- } PPC_MEM;
-
-typedef enum _MEM_USAGE {
- Other = 0x8000,
- ResumeBlock = 0x4000, /* for use by power management */
- SystemROM = 0x2000, /* Flash memory (populated) */
- UnPopSystemROM = 0x1000, /* Unpopulated part of SystemROM area */
- IOMemory = 0x0800,
- SystemIO = 0x0400,
- SystemRegs = 0x0200,
- PCIAddr = 0x0100,
- PCIConfig = 0x80,
- ISAAddr = 0x40,
- Unpopulated = 0x20, /* Unpopulated part of System Memory */
- Free = 0x10, /* Free part of System Memory */
- BootImage = 0x08, /* BootImage part of System Memory */
- FirmwareCode = 0x04, /* FirmwareCode part of System Memory */
- FirmwareHeap = 0x02, /* FirmwareHeap part of System Memory */
- FirmwareStack = 0x01 /* FirmwareStack part of System Memory*/
- } MEM_USAGE;
-
-typedef struct _MEM_MAP {
- unsigned long Usage; /* See MEM_USAGE above */
- unsigned long BasePage; /* Page number measured in 4KB pages */
- unsigned long PageCount; /* Page count measured in 4KB pages */
- } MEM_MAP;
-
-typedef struct _RESIDUAL {
- unsigned long ResidualLength; /* Length of Residual */
- unsigned char Version; /* of this data structure */
- unsigned char Revision; /* of this data structure */
- unsigned short EC; /* of this data structure */
- /* VPD */
- VPD VitalProductData;
- /* CPU */
- unsigned short MaxNumCpus; /* Max CPUs in this system */
- unsigned short ActualNumCpus; /* ActualNumCpus < MaxNumCpus means */
- /* that there are unpopulated or */
- /* otherwise unusable cpu locations */
- PPC_CPU Cpus[MAX_CPUS];
- /* Memory */
- unsigned long TotalMemory; /* Total amount of memory installed */
- unsigned long GoodMemory; /* Total amount of good memory */
- unsigned long ActualNumMemSegs;
- MEM_MAP Segs[MAX_MEM_SEGS];
- unsigned long ActualNumMemories;
- PPC_MEM Memories[MAX_MEMS];
- /* Devices */
- unsigned long ActualNumDevices;
- PPC_DEVICE Devices[MAX_DEVICES];
- unsigned char DevicePnPHeap[2*MAX_DEVICES*AVE_PNP_SIZE];
- } RESIDUAL;
-
-
-/*
- * Forward declaration - we can't include <linux/pci.h> because it
- * breaks the boot loader
- */
-struct pci_dev;
-
-extern RESIDUAL *res;
-extern void print_residual_device_info(void);
-extern PPC_DEVICE *residual_find_device(unsigned long BusMask,
- unsigned char * DevID, int BaseType,
- int SubType, int Interface, int n);
-extern int residual_pcidev_irq(struct pci_dev *dev);
-extern void residual_irq_mask(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
-extern unsigned int residual_isapic_addr(void);
-extern PnP_TAG_PACKET *PnP_find_packet(unsigned char *p, unsigned packet_tag,
- int n);
-extern PnP_TAG_PACKET *PnP_find_small_vendor_packet(unsigned char *p,
- unsigned packet_type,
- int n);
-extern PnP_TAG_PACKET *PnP_find_large_vendor_packet(unsigned char *p,
- unsigned packet_type,
- int n);
-
-#ifdef CONFIG_PREP_RESIDUAL
-#define have_residual_data (res && res->ResidualLength)
-#else
-#define have_residual_data 0
-#endif
-
-#endif /* __ASSEMBLY__ */
-#endif /* ndef _RESIDUAL_ */
-
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/rtc.h b/include/asm-ppc/rtc.h
deleted file mode 100644
index 6025b46..0000000
--- a/include/asm-ppc/rtc.h
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * include/asm-ppc/rtc.h
- *
- * Author: Tom Rini <trini@mvista.com>
- *
- * 2002 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Based on:
- * include/asm-m68k/rtc.h
- *
- * Copyright Richard Zidlicky
- * implementation details for genrtc/q40rtc driver
- *
- * And the old drivers/macintosh/rtc.c which was heavily based on:
- * Linux/SPARC Real Time Clock Driver
- * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
- *
- * With additional work by Paul Mackerras and Franz Sirl.
- */
-
-#ifndef __ASM_RTC_H__
-#define __ASM_RTC_H__
-
-#ifdef __KERNEL__
-
-#include <linux/rtc.h>
-
-#include <asm/machdep.h>
-#include <asm/time.h>
-
-#define RTC_PIE 0x40 /* periodic interrupt enable */
-#define RTC_AIE 0x20 /* alarm interrupt enable */
-#define RTC_UIE 0x10 /* update-finished interrupt enable */
-
-/* some dummy definitions */
-#define RTC_BATT_BAD 0x100 /* battery bad */
-#define RTC_SQWE 0x08 /* enable square-wave output */
-#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
-#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
-#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
-
-static inline unsigned int get_rtc_time(struct rtc_time *time)
-{
- if (ppc_md.get_rtc_time) {
- unsigned long nowtime;
-
- nowtime = (ppc_md.get_rtc_time)();
-
- to_tm(nowtime, time);
-
- time->tm_year -= 1900;
- time->tm_mon -= 1; /* Make sure userland has a 0-based month */
- }
- return RTC_24H;
-}
-
-/* Set the current date and time in the real time clock. */
-static inline int set_rtc_time(struct rtc_time *time)
-{
- if (ppc_md.get_rtc_time) {
- unsigned long nowtime;
-
- nowtime = mktime(time->tm_year+1900, time->tm_mon+1,
- time->tm_mday, time->tm_hour, time->tm_min,
- time->tm_sec);
-
- (ppc_md.set_rtc_time)(nowtime);
-
- return 0;
- } else
- return -EINVAL;
-}
-
-static inline unsigned int get_rtc_ss(void)
-{
- struct rtc_time h;
-
- get_rtc_time(&h);
- return h.tm_sec;
-}
-
-static inline int get_rtc_pll(struct rtc_pll_info *pll)
-{
- return -EINVAL;
-}
-static inline int set_rtc_pll(struct rtc_pll_info *pll)
-{
- return -EINVAL;
-}
-
-#endif /* __KERNEL__ */
-#endif /* __ASM_RTC_H__ */
diff --git a/include/asm-ppc/serial.h b/include/asm-ppc/serial.h
deleted file mode 100644
index d35ed10..0000000
--- a/include/asm-ppc/serial.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * include/asm-ppc/serial.h
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_SERIAL_H__
-#define __ASM_SERIAL_H__
-
-
-#if defined(CONFIG_EV64260)
-#include <platforms/ev64260.h>
-#elif defined(CONFIG_CHESTNUT)
-#include <platforms/chestnut.h>
-#elif defined(CONFIG_POWERPMC250)
-#include <platforms/powerpmc250.h>
-#elif defined(CONFIG_LOPEC)
-#include <platforms/lopec.h>
-#elif defined(CONFIG_MVME5100)
-#include <platforms/mvme5100.h>
-#elif defined(CONFIG_PAL4)
-#include <platforms/pal4_serial.h>
-#elif defined(CONFIG_PRPMC750)
-#include <platforms/prpmc750.h>
-#elif defined(CONFIG_PRPMC800)
-#include <platforms/prpmc800.h>
-#elif defined(CONFIG_SANDPOINT)
-#include <platforms/sandpoint.h>
-#elif defined(CONFIG_SPRUCE)
-#include <platforms/spruce.h>
-#elif defined(CONFIG_4xx)
-#include <asm/ibm4xx.h>
-#elif defined(CONFIG_RADSTONE_PPC7D)
-#include <platforms/radstone_ppc7d.h>
-#else
-
-/*
- * XXX Assume it has PC-style ISA serial ports - true for PReP at least.
- */
-#include <asm/pc_serial.h>
-
-#endif /* !CONFIG_GEMINI and others */
-#endif /* __ASM_SERIAL_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/smp.h b/include/asm-ppc/smp.h
deleted file mode 100644
index e75791e..0000000
--- a/include/asm-ppc/smp.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* smp.h: PPC specific SMP stuff.
- *
- * Original was a copy of sparc smp.h. Now heavily modified
- * for PPC.
- *
- * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
- * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
- */
-#ifdef __KERNEL__
-#ifndef _PPC_SMP_H
-#define _PPC_SMP_H
-
-#include <linux/kernel.h>
-#include <linux/bitops.h>
-#include <linux/errno.h>
-#include <linux/cpumask.h>
-#include <linux/threads.h>
-
-#ifdef CONFIG_SMP
-
-#ifndef __ASSEMBLY__
-
-struct cpuinfo_PPC {
- unsigned long loops_per_jiffy;
- unsigned long pvr;
- unsigned long *pgd_cache;
- unsigned long *pte_cache;
- unsigned long pgtable_cache_sz;
-};
-
-extern struct cpuinfo_PPC cpu_data[];
-extern cpumask_t cpu_online_map;
-extern cpumask_t cpu_possible_map;
-extern unsigned long smp_proc_in_lock[];
-extern volatile unsigned long cpu_callin_map[];
-extern int smp_tb_synchronized;
-extern struct smp_ops_t *smp_ops;
-
-extern void smp_send_tlb_invalidate(int);
-extern void smp_send_xmon_break(int cpu);
-struct pt_regs;
-extern void smp_message_recv(int);
-
-extern int __cpu_disable(void);
-extern void __cpu_die(unsigned int cpu);
-extern void cpu_die(void) __attribute__((noreturn));
-
-#define raw_smp_processor_id() (current_thread_info()->cpu)
-
-extern int __cpu_up(unsigned int cpu);
-
-extern int smp_hw_index[];
-#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
-#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)])
-#define set_hard_smp_processor_id(cpu, phys)\
- (smp_hw_index[(cpu)] = (phys))
-
-#endif /* __ASSEMBLY__ */
-
-#else /* !(CONFIG_SMP) */
-
-static inline void cpu_die(void) { }
-#define get_hard_smp_processor_id(cpu) 0
-#define set_hard_smp_processor_id(cpu, phys)
-#define hard_smp_processor_id() 0
-
-#endif /* !(CONFIG_SMP) */
-
-#ifndef __ASSEMBLY__
-extern int boot_cpuid;
-extern int boot_cpuid_phys;
-#endif
-
-#endif /* !(_PPC_SMP_H) */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/spinlock.h b/include/asm-ppc/spinlock.h
deleted file mode 100644
index fccaf55..0000000
--- a/include/asm-ppc/spinlock.h
+++ /dev/null
@@ -1,168 +0,0 @@
-#ifndef __ASM_SPINLOCK_H
-#define __ASM_SPINLOCK_H
-
-#include <asm/system.h>
-
-/*
- * Simple spin lock operations.
- *
- * (the type definitions are in asm/raw_spinlock_types.h)
- */
-
-#define __raw_spin_is_locked(x) ((x)->slock != 0)
-#define __raw_spin_unlock_wait(lock) \
- do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0)
-#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
-
-static inline void __raw_spin_lock(raw_spinlock_t *lock)
-{
- unsigned long tmp;
-
- __asm__ __volatile__(
- "b 1f # __raw_spin_lock\n\
-2: lwzx %0,0,%1\n\
- cmpwi 0,%0,0\n\
- bne+ 2b\n\
-1: lwarx %0,0,%1\n\
- cmpwi 0,%0,0\n\
- bne- 2b\n"
- PPC405_ERR77(0,%1)
-" stwcx. %2,0,%1\n\
- bne- 2b\n\
- isync"
- : "=&r"(tmp)
- : "r"(&lock->slock), "r"(1)
- : "cr0", "memory");
-}
-
-static inline void __raw_spin_unlock(raw_spinlock_t *lock)
-{
- __asm__ __volatile__("eieio # __raw_spin_unlock": : :"memory");
- lock->slock = 0;
-}
-
-#define __raw_spin_trylock(l) (!test_and_set_bit(0,(volatile unsigned long *)(&(l)->slock)))
-
-/*
- * Read-write spinlocks, allowing multiple readers
- * but only one writer.
- *
- * NOTE! it is quite common to have readers in interrupts
- * but no interrupt writers. For those circumstances we
- * can "mix" irq-safe locks - any writer needs to get a
- * irq-safe write-lock, but readers can get non-irqsafe
- * read-locks.
- */
-
-#define __raw_read_can_lock(rw) ((rw)->lock >= 0)
-#define __raw_write_can_lock(rw) (!(rw)->lock)
-
-static __inline__ int __raw_read_trylock(raw_rwlock_t *rw)
-{
- signed int tmp;
-
- __asm__ __volatile__(
-"2: lwarx %0,0,%1 # read_trylock\n\
- addic. %0,%0,1\n\
- ble- 1f\n"
- PPC405_ERR77(0,%1)
-" stwcx. %0,0,%1\n\
- bne- 2b\n\
- isync\n\
-1:"
- : "=&r"(tmp)
- : "r"(&rw->lock)
- : "cr0", "memory");
-
- return tmp > 0;
-}
-
-static __inline__ void __raw_read_lock(raw_rwlock_t *rw)
-{
- signed int tmp;
-
- __asm__ __volatile__(
- "b 2f # read_lock\n\
-1: lwzx %0,0,%1\n\
- cmpwi 0,%0,0\n\
- blt+ 1b\n\
-2: lwarx %0,0,%1\n\
- addic. %0,%0,1\n\
- ble- 1b\n"
- PPC405_ERR77(0,%1)
-" stwcx. %0,0,%1\n\
- bne- 2b\n\
- isync"
- : "=&r"(tmp)
- : "r"(&rw->lock)
- : "cr0", "memory");
-}
-
-static __inline__ void __raw_read_unlock(raw_rwlock_t *rw)
-{
- signed int tmp;
-
- __asm__ __volatile__(
- "eieio # read_unlock\n\
-1: lwarx %0,0,%1\n\
- addic %0,%0,-1\n"
- PPC405_ERR77(0,%1)
-" stwcx. %0,0,%1\n\
- bne- 1b"
- : "=&r"(tmp)
- : "r"(&rw->lock)
- : "cr0", "memory");
-}
-
-static __inline__ int __raw_write_trylock(raw_rwlock_t *rw)
-{
- signed int tmp;
-
- __asm__ __volatile__(
-"2: lwarx %0,0,%1 # write_trylock\n\
- cmpwi 0,%0,0\n\
- bne- 1f\n"
- PPC405_ERR77(0,%1)
-" stwcx. %2,0,%1\n\
- bne- 2b\n\
- isync\n\
-1:"
- : "=&r"(tmp)
- : "r"(&rw->lock), "r"(-1)
- : "cr0", "memory");
-
- return tmp == 0;
-}
-
-static __inline__ void __raw_write_lock(raw_rwlock_t *rw)
-{
- signed int tmp;
-
- __asm__ __volatile__(
- "b 2f # write_lock\n\
-1: lwzx %0,0,%1\n\
- cmpwi 0,%0,0\n\
- bne+ 1b\n\
-2: lwarx %0,0,%1\n\
- cmpwi 0,%0,0\n\
- bne- 1b\n"
- PPC405_ERR77(0,%1)
-" stwcx. %2,0,%1\n\
- bne- 2b\n\
- isync"
- : "=&r"(tmp)
- : "r"(&rw->lock), "r"(-1)
- : "cr0", "memory");
-}
-
-static __inline__ void __raw_write_unlock(raw_rwlock_t *rw)
-{
- __asm__ __volatile__("eieio # write_unlock": : :"memory");
- rw->lock = 0;
-}
-
-#define _raw_spin_relax(lock) cpu_relax()
-#define _raw_read_relax(lock) cpu_relax()
-#define _raw_write_relax(lock) cpu_relax()
-
-#endif /* __ASM_SPINLOCK_H */
diff --git a/include/asm-ppc/suspend.h b/include/asm-ppc/suspend.h
deleted file mode 100644
index 3df9f32..0000000
--- a/include/asm-ppc/suspend.h
+++ /dev/null
@@ -1,12 +0,0 @@
-static inline int arch_prepare_suspend(void)
-{
- return 0;
-}
-
-static inline void save_processor_state(void)
-{
-}
-
-static inline void restore_processor_state(void)
-{
-}
diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h
deleted file mode 100644
index 70ebd33..0000000
--- a/include/asm-ppc/system.h
+++ /dev/null
@@ -1,289 +0,0 @@
-/*
- * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
- */
-#ifndef __PPC_SYSTEM_H
-#define __PPC_SYSTEM_H
-
-#include <linux/kernel.h>
-
-#include <asm/hw_irq.h>
-
-/*
- * Memory barrier.
- * The sync instruction guarantees that all memory accesses initiated
- * by this processor have been performed (with respect to all other
- * mechanisms that access memory). The eieio instruction is a barrier
- * providing an ordering (separately) for (a) cacheable stores and (b)
- * loads and stores to non-cacheable memory (e.g. I/O devices).
- *
- * mb() prevents loads and stores being reordered across this point.
- * rmb() prevents loads being reordered across this point.
- * wmb() prevents stores being reordered across this point.
- * read_barrier_depends() prevents data-dependent loads being reordered
- * across this point (nop on PPC).
- *
- * We can use the eieio instruction for wmb, but since it doesn't
- * give any ordering guarantees about loads, we have to use the
- * stronger but slower sync instruction for mb and rmb.
- */
-#define mb() __asm__ __volatile__ ("sync" : : : "memory")
-#define rmb() __asm__ __volatile__ ("sync" : : : "memory")
-#define wmb() __asm__ __volatile__ ("eieio" : : : "memory")
-#define read_barrier_depends() do { } while(0)
-
-#define set_mb(var, value) do { var = value; mb(); } while (0)
-
-#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */
-#ifdef CONFIG_SMP
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory")
-#define smp_read_barrier_depends() read_barrier_depends()
-#else
-#define smp_mb() barrier()
-#define smp_rmb() barrier()
-#define smp_wmb() barrier()
-#define smp_read_barrier_depends() do { } while(0)
-#endif /* CONFIG_SMP */
-
-#ifdef __KERNEL__
-struct task_struct;
-struct pt_regs;
-
-extern void print_backtrace(unsigned long *);
-extern void show_regs(struct pt_regs * regs);
-extern void flush_instruction_cache(void);
-extern void hard_reset_now(void);
-extern void poweroff_now(void);
-extern int set_dabr(unsigned long dabr);
-#ifdef CONFIG_6xx
-extern long _get_L2CR(void);
-extern long _get_L3CR(void);
-extern void _set_L2CR(unsigned long);
-extern void _set_L3CR(unsigned long);
-#else
-#define _get_L2CR() 0L
-#define _get_L3CR() 0L
-#define _set_L2CR(val) do { } while(0)
-#define _set_L3CR(val) do { } while(0)
-#endif
-extern void via_cuda_init(void);
-extern void pmac_nvram_init(void);
-extern void chrp_nvram_init(void);
-extern void read_rtc_time(void);
-extern void pmac_find_display(void);
-extern void giveup_fpu(struct task_struct *);
-extern void disable_kernel_fp(void);
-extern void enable_kernel_fp(void);
-extern void flush_fp_to_thread(struct task_struct *);
-extern void enable_kernel_altivec(void);
-extern void giveup_altivec(struct task_struct *);
-extern void load_up_altivec(struct task_struct *);
-extern int emulate_altivec(struct pt_regs *);
-extern void giveup_spe(struct task_struct *);
-extern void load_up_spe(struct task_struct *);
-extern int fix_alignment(struct pt_regs *);
-extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
-extern void cvt_df(double *from, float *to, struct thread_struct *thread);
-
-#ifndef CONFIG_SMP
-extern void discard_lazy_cpu_state(void);
-#else
-static inline void discard_lazy_cpu_state(void)
-{
-}
-#endif
-
-#ifdef CONFIG_ALTIVEC
-extern void flush_altivec_to_thread(struct task_struct *);
-#else
-static inline void flush_altivec_to_thread(struct task_struct *t)
-{
-}
-#endif
-
-#ifdef CONFIG_SPE
-extern void flush_spe_to_thread(struct task_struct *);
-#else
-static inline void flush_spe_to_thread(struct task_struct *t)
-{
-}
-#endif
-
-extern int call_rtas(const char *, int, int, unsigned long *, ...);
-extern void cacheable_memzero(void *p, unsigned int nb);
-extern void *cacheable_memcpy(void *, const void *, unsigned int);
-extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
-extern void bad_page_fault(struct pt_regs *, unsigned long, int);
-extern int die(const char *, struct pt_regs *, long);
-extern void _exception(int, struct pt_regs *, int, unsigned long);
-void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
-
-#ifdef CONFIG_BOOKE_WDT
-extern u32 booke_wdt_enabled;
-extern u32 booke_wdt_period;
-#endif /* CONFIG_BOOKE_WDT */
-
-struct device_node;
-extern void note_scsi_host(struct device_node *, void *);
-
-extern struct task_struct *__switch_to(struct task_struct *,
- struct task_struct *);
-#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
-
-struct thread_struct;
-extern struct task_struct *_switch(struct thread_struct *prev,
- struct thread_struct *next);
-
-extern unsigned int rtas_data;
-
-static __inline__ unsigned long
-xchg_u32(volatile void *p, unsigned long val)
-{
- unsigned long prev;
-
- __asm__ __volatile__ ("\n\
-1: lwarx %0,0,%2 \n"
- PPC405_ERR77(0,%2)
-" stwcx. %3,0,%2 \n\
- bne- 1b"
- : "=&r" (prev), "=m" (*(volatile unsigned long *)p)
- : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p)
- : "cc", "memory");
-
- return prev;
-}
-
-/*
- * This function doesn't exist, so you'll get a linker error
- * if something tries to do an invalid xchg().
- */
-extern void __xchg_called_with_bad_pointer(void);
-
-#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-
-static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
-{
- switch (size) {
- case 4:
- return (unsigned long) xchg_u32(ptr, x);
-#if 0 /* xchg_u64 doesn't exist on 32-bit PPC */
- case 8:
- return (unsigned long) xchg_u64(ptr, x);
-#endif /* 0 */
- }
- __xchg_called_with_bad_pointer();
- return x;
-
-
-}
-
-static inline void * xchg_ptr(void * m, void * val)
-{
- return (void *) xchg_u32(m, (unsigned long) val);
-}
-
-
-#define __HAVE_ARCH_CMPXCHG 1
-
-static __inline__ unsigned long
-__cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
-{
- unsigned int prev;
-
- __asm__ __volatile__ ("\n\
-1: lwarx %0,0,%2 \n\
- cmpw 0,%0,%3 \n\
- bne 2f \n"
- PPC405_ERR77(0,%2)
-" stwcx. %4,0,%2 \n\
- bne- 1b\n"
-#ifdef CONFIG_SMP
-" sync\n"
-#endif /* CONFIG_SMP */
-"2:"
- : "=&r" (prev), "=m" (*p)
- : "r" (p), "r" (old), "r" (new), "m" (*p)
- : "cc", "memory");
-
- return prev;
-}
-
-static inline unsigned long
-__cmpxchg_u32_local(volatile unsigned int *p, unsigned int old,
- unsigned int new)
-{
- unsigned int prev;
-
- __asm__ __volatile__ ("\n\
-1: lwarx %0,0,%2 \n\
- cmpw 0,%0,%3 \n\
- bne 2f \n"
- PPC405_ERR77(0,%2)
-" stwcx. %4,0,%2 \n\
- bne- 1b\n"
-"2:"
- : "=&r" (prev), "=m" (*p)
- : "r" (p), "r" (old), "r" (new), "m" (*p)
- : "cc", "memory");
-
- return prev;
-}
-
-/* This function doesn't exist, so you'll get a linker error
- if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static __inline__ unsigned long
-__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new,
- unsigned int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
-#if 0 /* we don't have __cmpxchg_u64 on 32-bit PPC */
- case 8:
- return __cmpxchg_u64(ptr, old, new);
-#endif /* 0 */
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr, o, n) \
- ({ \
- __typeof__(*(ptr)) _o_ = (o); \
- __typeof__(*(ptr)) _n_ = (n); \
- (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
- (unsigned long)_n_, sizeof(*(ptr))); \
- })
-
-#include <asm-generic/cmpxchg-local.h>
-
-static inline unsigned long __cmpxchg_local(volatile void *ptr,
- unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32_local(ptr, old, new);
- default:
- return __cmpxchg_local_generic(ptr, old, new, size);
- }
-
- return old;
-}
-
-/*
- * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
- * them available.
- */
-#define cmpxchg_local(ptr, o, n) \
- ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \
- (unsigned long)(n), sizeof(*(ptr))))
-#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
-
-#define arch_align_stack(x) (x)
-
-#endif /* __KERNEL__ */
-#endif /* __PPC_SYSTEM_H */
diff --git a/include/asm-ppc/time.h b/include/asm-ppc/time.h
deleted file mode 100644
index 81dbcd4..0000000
--- a/include/asm-ppc/time.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- * Common time prototypes and such for all ppc machines.
- *
- * Written by Cort Dougan (cort@fsmlabs.com) to merge
- * Paul Mackerras' version and mine for PReP and Pmac.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_TIME_H__
-#define __ASM_TIME_H__
-
-#include <linux/types.h>
-#include <linux/rtc.h>
-#include <linux/threads.h>
-
-#include <asm/reg.h>
-
-/* time.c */
-extern unsigned tb_ticks_per_jiffy;
-extern unsigned tb_to_us;
-extern unsigned tb_last_stamp;
-extern unsigned long disarm_decr[NR_CPUS];
-
-extern void to_tm(int tim, struct rtc_time * tm);
-extern time_t last_rtc_update;
-
-extern void set_dec_cpu6(unsigned int val);
-
-int via_calibrate_decr(void);
-
-/* Accessor functions for the decrementer register.
- * The 4xx doesn't even have a decrementer. I tried to use the
- * generic timer interrupt code, which seems OK, with the 4xx PIT
- * in auto-reload mode. The problem is PIT stops counting when it
- * hits zero. If it would wrap, we could use it just like a decrementer.
- */
-static __inline__ unsigned int get_dec(void)
-{
-#if defined(CONFIG_40x)
- return (mfspr(SPRN_PIT));
-#else
- return (mfspr(SPRN_DEC));
-#endif
-}
-
-static __inline__ void set_dec(unsigned int val)
-{
-#if defined(CONFIG_40x)
- return; /* Have to let it auto-reload */
-#elif defined(CONFIG_8xx_CPU6)
- set_dec_cpu6(val);
-#else
- mtspr(SPRN_DEC, val);
-#endif
-}
-
-/* Accessor functions for the timebase (RTC on 601) registers. */
-/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */
-#ifdef CONFIG_6xx
-extern __inline__ int __pure __USE_RTC(void) {
- return (mfspr(SPRN_PVR)>>16) == 1;
-}
-#else
-#define __USE_RTC() 0
-#endif
-
-extern __inline__ unsigned long get_tbl(void) {
- unsigned long tbl;
-#if defined(CONFIG_403GCX)
- asm volatile("mfspr %0, 0x3dd" : "=r" (tbl));
-#else
- asm volatile("mftb %0" : "=r" (tbl));
-#endif
- return tbl;
-}
-
-extern __inline__ unsigned long get_tbu(void) {
- unsigned long tbl;
-#if defined(CONFIG_403GCX)
- asm volatile("mfspr %0, 0x3dc" : "=r" (tbl));
-#else
- asm volatile("mftbu %0" : "=r" (tbl));
-#endif
- return tbl;
-}
-
-extern __inline__ void set_tb(unsigned int upper, unsigned int lower)
-{
- mtspr(SPRN_TBWL, 0);
- mtspr(SPRN_TBWU, upper);
- mtspr(SPRN_TBWL, lower);
-}
-
-extern __inline__ unsigned long get_rtcl(void) {
- unsigned long rtcl;
- asm volatile("mfrtcl %0" : "=r" (rtcl));
- return rtcl;
-}
-
-extern __inline__ unsigned long get_rtcu(void)
-{
- unsigned long rtcu;
- asm volatile("mfrtcu %0" : "=r" (rtcu));
- return rtcu;
-}
-
-extern __inline__ unsigned get_native_tbl(void) {
- if (__USE_RTC())
- return get_rtcl();
- else
- return get_tbl();
-}
-
-/* On machines with RTC, this function can only be used safely
- * after the timestamp and for 1 second. It is only used by gettimeofday
- * however so it should not matter.
- */
-extern __inline__ unsigned tb_ticks_since(unsigned tstamp) {
- if (__USE_RTC()) {
- int delta = get_rtcl() - tstamp;
- return delta<0 ? delta + 1000000000 : delta;
- } else {
- return get_tbl() - tstamp;
- }
-}
-
-#if 0
-extern __inline__ unsigned long get_bin_rtcl(void) {
- unsigned long rtcl, rtcu1, rtcu2;
- asm volatile("\
-1: mfrtcu %0\n\
- mfrtcl %1\n\
- mfrtcu %2\n\
- cmpw %0,%2\n\
- bne- 1b\n"
- : "=r" (rtcu1), "=r" (rtcl), "=r" (rtcu2)
- : : "cr0");
- return rtcu2*1000000000+rtcl;
-}
-
-extern __inline__ unsigned binary_tbl(void) {
- if (__USE_RTC())
- return get_bin_rtcl();
- else
- return get_tbl();
-}
-#endif
-
-/* Use mulhwu to scale processor timebase to timeval */
-/* Specifically, this computes (x * y) / 2^32. -- paulus */
-#define mulhwu(x,y) \
-({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
-
-unsigned mulhwu_scale_factor(unsigned, unsigned);
-
-#define account_process_vtime(tsk) do { } while (0)
-#define calculate_steal_time() do { } while (0)
-#define snapshot_timebases() do { } while (0)
-
-#endif /* __ASM_TIME_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/todc.h b/include/asm-ppc/todc.h
deleted file mode 100644
index 937c7db..0000000
--- a/include/asm-ppc/todc.h
+++ /dev/null
@@ -1,488 +0,0 @@
-/*
- * Definitions for the M48Txx and mc146818 series of Time of day/Real Time
- * Clock chips.
- *
- * Author: Mark A. Greer
- * mgreer@mvista.com
- *
- * 2001 (c) MontaVista, Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-
-/*
- * Support for the M48T37/M48T59/.../mc146818 Real Time Clock chips.
- * Purpose is to make one generic file that handles all of these chips instead
- * of every platform implementing the same code over & over again.
- */
-
-#ifndef __PPC_KERNEL_TODC_H
-#define __PPC_KERNEL_TODC_H
-
-typedef struct {
- uint rtc_type; /* your particular chip */
-
- /*
- * Following are the addresses of the AS0, AS1, and DATA registers
- * of these chips. Note that these are board-specific.
- */
- unsigned int nvram_as0;
- unsigned int nvram_as1;
- unsigned int nvram_data;
-
- /*
- * Define bits to stop external set of regs from changing so
- * the chip can be read/written reliably.
- */
- unsigned char enable_read;
- unsigned char enable_write;
-
- /*
- * Following is the number of AS0 address bits. This is normally
- * 8 but some bad hardware routes address lines incorrectly.
- */
- int as0_bits;
-
- int nvram_size; /* Size of NVRAM on chip */
- int sw_flags; /* Software control flags */
-
- /* Following are the register offsets for the particular chip */
- int year;
- int month;
- int day_of_month;
- int day_of_week;
- int hours;
- int minutes;
- int seconds;
- int control_b;
- int control_a;
- int watchdog;
- int interrupts;
- int alarm_date;
- int alarm_hour;
- int alarm_minutes;
- int alarm_seconds;
- int century;
- int flags;
-
- /*
- * Some RTC chips have their NVRAM buried behind a addr/data pair of
- * regs on the first level/clock registers. The following fields
- * are the addresses for those addr/data regs.
- */
- int nvram_addr_reg;
- int nvram_data_reg;
-} todc_info_t;
-
-/*
- * Define the types of TODC/RTC variants that are supported in
- * arch/ppc/kernel/todc_time.c
- * Make a new one of these for any chip somehow differs from what's already
- * defined. That way, if you ever need to put in code to touch those
- * bits/registers in todc_time.c, you can put it inside an
- * 'if (todc_info->rtc_type == TODC_TYPE_XXX)' so you won't break
- * anyone else.
- */
-#define TODC_TYPE_MK48T35 1
-#define TODC_TYPE_MK48T37 2
-#define TODC_TYPE_MK48T59 3
-#define TODC_TYPE_DS1693 4 /* Dallas DS1693 RTC */
-#define TODC_TYPE_DS1743 5 /* Dallas DS1743 RTC */
-#define TODC_TYPE_DS1746 6 /* Dallas DS1746 RTC */
-#define TODC_TYPE_DS1747 7 /* Dallas DS1747 RTC */
-#define TODC_TYPE_DS1501 8 /* Dallas DS1501 RTC */
-#define TODC_TYPE_DS1643 9 /* Dallas DS1643 RTC */
-#define TODC_TYPE_PC97307 10 /* PC97307 internal RTC */
-#define TODC_TYPE_DS1557 11 /* Dallas DS1557 RTC */
-#define TODC_TYPE_DS17285 12 /* Dallas DS17285 RTC */
-#define TODC_TYPE_DS1553 13 /* Dallas DS1553 RTC */
-#define TODC_TYPE_MC146818 100 /* Leave room for m48txx's */
-
-/*
- * Bit to clear/set to enable reads/writes to the chip
- */
-#define TODC_MK48TXX_CNTL_A_R 0x40
-#define TODC_MK48TXX_CNTL_A_W 0x80
-#define TODC_MK48TXX_DAY_CB 0x80
-
-#define TODC_DS1501_CNTL_B_TE 0x80
-
-/*
- * Define flag bits used by todc routines.
- */
-#define TODC_FLAG_2_LEVEL_NVRAM 0x00000001
-
-/*
- * Define the values for the various RTC's that should to into the todc_info
- * table.
- * Note: The XXX_NVRAM_SIZE, XXX_NVRAM_ADDR_REG, and XXX_NVRAM_DATA_REG only
- * matter if XXX_SW_FLAGS has TODC_FLAG_2_LEVEL_NVRAM set.
- */
-#define TODC_TYPE_MK48T35_NVRAM_SIZE 0x7ff8
-#define TODC_TYPE_MK48T35_SW_FLAGS 0
-#define TODC_TYPE_MK48T35_YEAR 0x7fff
-#define TODC_TYPE_MK48T35_MONTH 0x7ffe
-#define TODC_TYPE_MK48T35_DOM 0x7ffd /* Day of Month */
-#define TODC_TYPE_MK48T35_DOW 0x7ffc /* Day of Week */
-#define TODC_TYPE_MK48T35_HOURS 0x7ffb
-#define TODC_TYPE_MK48T35_MINUTES 0x7ffa
-#define TODC_TYPE_MK48T35_SECONDS 0x7ff9
-#define TODC_TYPE_MK48T35_CNTL_B 0x7ff9
-#define TODC_TYPE_MK48T35_CNTL_A 0x7ff8
-#define TODC_TYPE_MK48T35_WATCHDOG 0x0000
-#define TODC_TYPE_MK48T35_INTERRUPTS 0x0000
-#define TODC_TYPE_MK48T35_ALARM_DATE 0x0000
-#define TODC_TYPE_MK48T35_ALARM_HOUR 0x0000
-#define TODC_TYPE_MK48T35_ALARM_MINUTES 0x0000
-#define TODC_TYPE_MK48T35_ALARM_SECONDS 0x0000
-#define TODC_TYPE_MK48T35_CENTURY 0x0000
-#define TODC_TYPE_MK48T35_FLAGS 0x0000
-#define TODC_TYPE_MK48T35_NVRAM_ADDR_REG 0
-#define TODC_TYPE_MK48T35_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_MK48T37_NVRAM_SIZE 0x7ff0
-#define TODC_TYPE_MK48T37_SW_FLAGS 0
-#define TODC_TYPE_MK48T37_YEAR 0x7fff
-#define TODC_TYPE_MK48T37_MONTH 0x7ffe
-#define TODC_TYPE_MK48T37_DOM 0x7ffd /* Day of Month */
-#define TODC_TYPE_MK48T37_DOW 0x7ffc /* Day of Week */
-#define TODC_TYPE_MK48T37_HOURS 0x7ffb
-#define TODC_TYPE_MK48T37_MINUTES 0x7ffa
-#define TODC_TYPE_MK48T37_SECONDS 0x7ff9
-#define TODC_TYPE_MK48T37_CNTL_B 0x7ff9
-#define TODC_TYPE_MK48T37_CNTL_A 0x7ff8
-#define TODC_TYPE_MK48T37_WATCHDOG 0x7ff7
-#define TODC_TYPE_MK48T37_INTERRUPTS 0x7ff6
-#define TODC_TYPE_MK48T37_ALARM_DATE 0x7ff5
-#define TODC_TYPE_MK48T37_ALARM_HOUR 0x7ff4
-#define TODC_TYPE_MK48T37_ALARM_MINUTES 0x7ff3
-#define TODC_TYPE_MK48T37_ALARM_SECONDS 0x7ff2
-#define TODC_TYPE_MK48T37_CENTURY 0x7ff1
-#define TODC_TYPE_MK48T37_FLAGS 0x7ff0
-#define TODC_TYPE_MK48T37_NVRAM_ADDR_REG 0
-#define TODC_TYPE_MK48T37_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_MK48T59_NVRAM_SIZE 0x1ff0
-#define TODC_TYPE_MK48T59_SW_FLAGS 0
-#define TODC_TYPE_MK48T59_YEAR 0x1fff
-#define TODC_TYPE_MK48T59_MONTH 0x1ffe
-#define TODC_TYPE_MK48T59_DOM 0x1ffd /* Day of Month */
-#define TODC_TYPE_MK48T59_DOW 0x1ffc /* Day of Week */
-#define TODC_TYPE_MK48T59_HOURS 0x1ffb
-#define TODC_TYPE_MK48T59_MINUTES 0x1ffa
-#define TODC_TYPE_MK48T59_SECONDS 0x1ff9
-#define TODC_TYPE_MK48T59_CNTL_B 0x1ff9
-#define TODC_TYPE_MK48T59_CNTL_A 0x1ff8
-#define TODC_TYPE_MK48T59_WATCHDOG 0x1fff
-#define TODC_TYPE_MK48T59_INTERRUPTS 0x1fff
-#define TODC_TYPE_MK48T59_ALARM_DATE 0x1fff
-#define TODC_TYPE_MK48T59_ALARM_HOUR 0x1fff
-#define TODC_TYPE_MK48T59_ALARM_MINUTES 0x1fff
-#define TODC_TYPE_MK48T59_ALARM_SECONDS 0x1fff
-#define TODC_TYPE_MK48T59_CENTURY 0x1fff
-#define TODC_TYPE_MK48T59_FLAGS 0x1fff
-#define TODC_TYPE_MK48T59_NVRAM_ADDR_REG 0
-#define TODC_TYPE_MK48T59_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_DS1501_NVRAM_SIZE 0x100
-#define TODC_TYPE_DS1501_SW_FLAGS TODC_FLAG_2_LEVEL_NVRAM
-#define TODC_TYPE_DS1501_YEAR (TODC_TYPE_DS1501_NVRAM_SIZE + 0x06)
-#define TODC_TYPE_DS1501_MONTH (TODC_TYPE_DS1501_NVRAM_SIZE + 0x05)
-#define TODC_TYPE_DS1501_DOM (TODC_TYPE_DS1501_NVRAM_SIZE + 0x04)
-#define TODC_TYPE_DS1501_DOW (TODC_TYPE_DS1501_NVRAM_SIZE + 0x03)
-#define TODC_TYPE_DS1501_HOURS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x02)
-#define TODC_TYPE_DS1501_MINUTES (TODC_TYPE_DS1501_NVRAM_SIZE + 0x01)
-#define TODC_TYPE_DS1501_SECONDS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x00)
-#define TODC_TYPE_DS1501_CNTL_B (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0f)
-#define TODC_TYPE_DS1501_CNTL_A (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0f)
-#define TODC_TYPE_DS1501_WATCHDOG (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff)
-#define TODC_TYPE_DS1501_INTERRUPTS (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff)
-#define TODC_TYPE_DS1501_ALARM_DATE (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0b)
-#define TODC_TYPE_DS1501_ALARM_HOUR (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0a)
-#define TODC_TYPE_DS1501_ALARM_MINUTES (TODC_TYPE_DS1501_NVRAM_SIZE + 0x09)
-#define TODC_TYPE_DS1501_ALARM_SECONDS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x08)
-#define TODC_TYPE_DS1501_CENTURY (TODC_TYPE_DS1501_NVRAM_SIZE + 0x07)
-#define TODC_TYPE_DS1501_FLAGS (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff)
-#define TODC_TYPE_DS1501_NVRAM_ADDR_REG 0x10
-#define TODC_TYPE_DS1501_NVRAM_DATA_REG 0x13
-
-#define TODC_TYPE_DS1553_NVRAM_SIZE 0x1ff0
-#define TODC_TYPE_DS1553_SW_FLAGS 0
-#define TODC_TYPE_DS1553_YEAR 0x1fff
-#define TODC_TYPE_DS1553_MONTH 0x1ffe
-#define TODC_TYPE_DS1553_DOM 0x1ffd /* Day of Month */
-#define TODC_TYPE_DS1553_DOW 0x1ffc /* Day of Week */
-#define TODC_TYPE_DS1553_HOURS 0x1ffb
-#define TODC_TYPE_DS1553_MINUTES 0x1ffa
-#define TODC_TYPE_DS1553_SECONDS 0x1ff9
-#define TODC_TYPE_DS1553_CNTL_B 0x1ff9
-#define TODC_TYPE_DS1553_CNTL_A 0x1ff8 /* control_a R/W regs */
-#define TODC_TYPE_DS1553_WATCHDOG 0x1ff7
-#define TODC_TYPE_DS1553_INTERRUPTS 0x1ff6
-#define TODC_TYPE_DS1553_ALARM_DATE 0x1ff5
-#define TODC_TYPE_DS1553_ALARM_HOUR 0x1ff4
-#define TODC_TYPE_DS1553_ALARM_MINUTES 0x1ff3
-#define TODC_TYPE_DS1553_ALARM_SECONDS 0x1ff2
-#define TODC_TYPE_DS1553_CENTURY 0x1ff8
-#define TODC_TYPE_DS1553_FLAGS 0x1ff0
-#define TODC_TYPE_DS1553_NVRAM_ADDR_REG 0
-#define TODC_TYPE_DS1553_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_DS1557_NVRAM_SIZE 0x7fff0
-#define TODC_TYPE_DS1557_SW_FLAGS 0
-#define TODC_TYPE_DS1557_YEAR 0x7ffff
-#define TODC_TYPE_DS1557_MONTH 0x7fffe
-#define TODC_TYPE_DS1557_DOM 0x7fffd /* Day of Month */
-#define TODC_TYPE_DS1557_DOW 0x7fffc /* Day of Week */
-#define TODC_TYPE_DS1557_HOURS 0x7fffb
-#define TODC_TYPE_DS1557_MINUTES 0x7fffa
-#define TODC_TYPE_DS1557_SECONDS 0x7fff9
-#define TODC_TYPE_DS1557_CNTL_B 0x7fff9
-#define TODC_TYPE_DS1557_CNTL_A 0x7fff8 /* control_a R/W regs */
-#define TODC_TYPE_DS1557_WATCHDOG 0x7fff7
-#define TODC_TYPE_DS1557_INTERRUPTS 0x7fff6
-#define TODC_TYPE_DS1557_ALARM_DATE 0x7fff5
-#define TODC_TYPE_DS1557_ALARM_HOUR 0x7fff4
-#define TODC_TYPE_DS1557_ALARM_MINUTES 0x7fff3
-#define TODC_TYPE_DS1557_ALARM_SECONDS 0x7fff2
-#define TODC_TYPE_DS1557_CENTURY 0x7fff8
-#define TODC_TYPE_DS1557_FLAGS 0x7fff0
-#define TODC_TYPE_DS1557_NVRAM_ADDR_REG 0
-#define TODC_TYPE_DS1557_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_DS1643_NVRAM_SIZE 0x1ff8
-#define TODC_TYPE_DS1643_SW_FLAGS 0
-#define TODC_TYPE_DS1643_YEAR 0x1fff
-#define TODC_TYPE_DS1643_MONTH 0x1ffe
-#define TODC_TYPE_DS1643_DOM 0x1ffd /* Day of Month */
-#define TODC_TYPE_DS1643_DOW 0x1ffc /* Day of Week */
-#define TODC_TYPE_DS1643_HOURS 0x1ffb
-#define TODC_TYPE_DS1643_MINUTES 0x1ffa
-#define TODC_TYPE_DS1643_SECONDS 0x1ff9
-#define TODC_TYPE_DS1643_CNTL_B 0x1ff9
-#define TODC_TYPE_DS1643_CNTL_A 0x1ff8 /* control_a R/W regs */
-#define TODC_TYPE_DS1643_WATCHDOG 0x1fff
-#define TODC_TYPE_DS1643_INTERRUPTS 0x1fff
-#define TODC_TYPE_DS1643_ALARM_DATE 0x1fff
-#define TODC_TYPE_DS1643_ALARM_HOUR 0x1fff
-#define TODC_TYPE_DS1643_ALARM_MINUTES 0x1fff
-#define TODC_TYPE_DS1643_ALARM_SECONDS 0x1fff
-#define TODC_TYPE_DS1643_CENTURY 0x1ff8
-#define TODC_TYPE_DS1643_FLAGS 0x1fff
-#define TODC_TYPE_DS1643_NVRAM_ADDR_REG 0
-#define TODC_TYPE_DS1643_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_DS1693_NVRAM_SIZE 0 /* Not handled yet */
-#define TODC_TYPE_DS1693_SW_FLAGS 0
-#define TODC_TYPE_DS1693_YEAR 0x09
-#define TODC_TYPE_DS1693_MONTH 0x08
-#define TODC_TYPE_DS1693_DOM 0x07 /* Day of Month */
-#define TODC_TYPE_DS1693_DOW 0x06 /* Day of Week */
-#define TODC_TYPE_DS1693_HOURS 0x04
-#define TODC_TYPE_DS1693_MINUTES 0x02
-#define TODC_TYPE_DS1693_SECONDS 0x00
-#define TODC_TYPE_DS1693_CNTL_B 0x0b
-#define TODC_TYPE_DS1693_CNTL_A 0x0a
-#define TODC_TYPE_DS1693_WATCHDOG 0xff
-#define TODC_TYPE_DS1693_INTERRUPTS 0xff
-#define TODC_TYPE_DS1693_ALARM_DATE 0x49
-#define TODC_TYPE_DS1693_ALARM_HOUR 0x05
-#define TODC_TYPE_DS1693_ALARM_MINUTES 0x03
-#define TODC_TYPE_DS1693_ALARM_SECONDS 0x01
-#define TODC_TYPE_DS1693_CENTURY 0x48
-#define TODC_TYPE_DS1693_FLAGS 0xff
-#define TODC_TYPE_DS1693_NVRAM_ADDR_REG 0
-#define TODC_TYPE_DS1693_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_DS1743_NVRAM_SIZE 0x1ff8
-#define TODC_TYPE_DS1743_SW_FLAGS 0
-#define TODC_TYPE_DS1743_YEAR 0x1fff
-#define TODC_TYPE_DS1743_MONTH 0x1ffe
-#define TODC_TYPE_DS1743_DOM 0x1ffd /* Day of Month */
-#define TODC_TYPE_DS1743_DOW 0x1ffc /* Day of Week */
-#define TODC_TYPE_DS1743_HOURS 0x1ffb
-#define TODC_TYPE_DS1743_MINUTES 0x1ffa
-#define TODC_TYPE_DS1743_SECONDS 0x1ff9
-#define TODC_TYPE_DS1743_CNTL_B 0x1ff9
-#define TODC_TYPE_DS1743_CNTL_A 0x1ff8 /* control_a R/W regs */
-#define TODC_TYPE_DS1743_WATCHDOG 0x1fff
-#define TODC_TYPE_DS1743_INTERRUPTS 0x1fff
-#define TODC_TYPE_DS1743_ALARM_DATE 0x1fff
-#define TODC_TYPE_DS1743_ALARM_HOUR 0x1fff
-#define TODC_TYPE_DS1743_ALARM_MINUTES 0x1fff
-#define TODC_TYPE_DS1743_ALARM_SECONDS 0x1fff
-#define TODC_TYPE_DS1743_CENTURY 0x1ff8
-#define TODC_TYPE_DS1743_FLAGS 0x1fff
-#define TODC_TYPE_DS1743_NVRAM_ADDR_REG 0
-#define TODC_TYPE_DS1743_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_DS1746_NVRAM_SIZE 0x1fff8
-#define TODC_TYPE_DS1746_SW_FLAGS 0
-#define TODC_TYPE_DS1746_YEAR 0x1ffff
-#define TODC_TYPE_DS1746_MONTH 0x1fffe
-#define TODC_TYPE_DS1746_DOM 0x1fffd /* Day of Month */
-#define TODC_TYPE_DS1746_DOW 0x1fffc /* Day of Week */
-#define TODC_TYPE_DS1746_HOURS 0x1fffb
-#define TODC_TYPE_DS1746_MINUTES 0x1fffa
-#define TODC_TYPE_DS1746_SECONDS 0x1fff9
-#define TODC_TYPE_DS1746_CNTL_B 0x1fff9
-#define TODC_TYPE_DS1746_CNTL_A 0x1fff8 /* control_a R/W regs */
-#define TODC_TYPE_DS1746_WATCHDOG 0x00000
-#define TODC_TYPE_DS1746_INTERRUPTS 0x00000
-#define TODC_TYPE_DS1746_ALARM_DATE 0x00000
-#define TODC_TYPE_DS1746_ALARM_HOUR 0x00000
-#define TODC_TYPE_DS1746_ALARM_MINUTES 0x00000
-#define TODC_TYPE_DS1746_ALARM_SECONDS 0x00000
-#define TODC_TYPE_DS1746_CENTURY 0x00000
-#define TODC_TYPE_DS1746_FLAGS 0x00000
-#define TODC_TYPE_DS1746_NVRAM_ADDR_REG 0
-#define TODC_TYPE_DS1746_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_DS1747_NVRAM_SIZE 0x7fff8
-#define TODC_TYPE_DS1747_SW_FLAGS 0
-#define TODC_TYPE_DS1747_YEAR 0x7ffff
-#define TODC_TYPE_DS1747_MONTH 0x7fffe
-#define TODC_TYPE_DS1747_DOM 0x7fffd /* Day of Month */
-#define TODC_TYPE_DS1747_DOW 0x7fffc /* Day of Week */
-#define TODC_TYPE_DS1747_HOURS 0x7fffb
-#define TODC_TYPE_DS1747_MINUTES 0x7fffa
-#define TODC_TYPE_DS1747_SECONDS 0x7fff9
-#define TODC_TYPE_DS1747_CNTL_B 0x7fff9
-#define TODC_TYPE_DS1747_CNTL_A 0x7fff8 /* control_a R/W regs */
-#define TODC_TYPE_DS1747_WATCHDOG 0x00000
-#define TODC_TYPE_DS1747_INTERRUPTS 0x00000
-#define TODC_TYPE_DS1747_ALARM_DATE 0x00000
-#define TODC_TYPE_DS1747_ALARM_HOUR 0x00000
-#define TODC_TYPE_DS1747_ALARM_MINUTES 0x00000
-#define TODC_TYPE_DS1747_ALARM_SECONDS 0x00000
-#define TODC_TYPE_DS1747_CENTURY 0x00000
-#define TODC_TYPE_DS1747_FLAGS 0x00000
-#define TODC_TYPE_DS1747_NVRAM_ADDR_REG 0
-#define TODC_TYPE_DS1747_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_DS17285_NVRAM_SIZE (0x1000-0x80) /* 4Kx8 NVRAM (minus RTC regs) */
-#define TODC_TYPE_DS17285_SW_FLAGS TODC_FLAG_2_LEVEL_NVRAM
-#define TODC_TYPE_DS17285_SECONDS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x00)
-#define TODC_TYPE_DS17285_ALARM_SECONDS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x01)
-#define TODC_TYPE_DS17285_MINUTES (TODC_TYPE_DS17285_NVRAM_SIZE + 0x02)
-#define TODC_TYPE_DS17285_ALARM_MINUTES (TODC_TYPE_DS17285_NVRAM_SIZE + 0x03)
-#define TODC_TYPE_DS17285_HOURS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x04)
-#define TODC_TYPE_DS17285_ALARM_HOUR (TODC_TYPE_DS17285_NVRAM_SIZE + 0x05)
-#define TODC_TYPE_DS17285_DOW (TODC_TYPE_DS17285_NVRAM_SIZE + 0x06)
-#define TODC_TYPE_DS17285_DOM (TODC_TYPE_DS17285_NVRAM_SIZE + 0x07)
-#define TODC_TYPE_DS17285_MONTH (TODC_TYPE_DS17285_NVRAM_SIZE + 0x08)
-#define TODC_TYPE_DS17285_YEAR (TODC_TYPE_DS17285_NVRAM_SIZE + 0x09)
-#define TODC_TYPE_DS17285_CNTL_A (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0A)
-#define TODC_TYPE_DS17285_CNTL_B (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0B)
-#define TODC_TYPE_DS17285_CNTL_C (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0C)
-#define TODC_TYPE_DS17285_CNTL_D (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0D)
-#define TODC_TYPE_DS17285_WATCHDOG 0
-#define TODC_TYPE_DS17285_INTERRUPTS 0
-#define TODC_TYPE_DS17285_ALARM_DATE 0
-#define TODC_TYPE_DS17285_CENTURY 0
-#define TODC_TYPE_DS17285_FLAGS 0
-#define TODC_TYPE_DS17285_NVRAM_ADDR_REG 0x50
-#define TODC_TYPE_DS17285_NVRAM_DATA_REG 0x53
-
-#define TODC_TYPE_MC146818_NVRAM_SIZE 0 /* XXXX */
-#define TODC_TYPE_MC146818_SW_FLAGS 0
-#define TODC_TYPE_MC146818_YEAR 0x09
-#define TODC_TYPE_MC146818_MONTH 0x08
-#define TODC_TYPE_MC146818_DOM 0x07 /* Day of Month */
-#define TODC_TYPE_MC146818_DOW 0x06 /* Day of Week */
-#define TODC_TYPE_MC146818_HOURS 0x04
-#define TODC_TYPE_MC146818_MINUTES 0x02
-#define TODC_TYPE_MC146818_SECONDS 0x00
-#define TODC_TYPE_MC146818_CNTL_B 0x0a
-#define TODC_TYPE_MC146818_CNTL_A 0x0b /* control_a R/W regs */
-#define TODC_TYPE_MC146818_WATCHDOG 0
-#define TODC_TYPE_MC146818_INTERRUPTS 0x0c
-#define TODC_TYPE_MC146818_ALARM_DATE 0xff
-#define TODC_TYPE_MC146818_ALARM_HOUR 0x05
-#define TODC_TYPE_MC146818_ALARM_MINUTES 0x03
-#define TODC_TYPE_MC146818_ALARM_SECONDS 0x01
-#define TODC_TYPE_MC146818_CENTURY 0xff
-#define TODC_TYPE_MC146818_FLAGS 0xff
-#define TODC_TYPE_MC146818_NVRAM_ADDR_REG 0
-#define TODC_TYPE_MC146818_NVRAM_DATA_REG 0
-
-#define TODC_TYPE_PC97307_NVRAM_SIZE 0 /* No NVRAM? */
-#define TODC_TYPE_PC97307_SW_FLAGS 0
-#define TODC_TYPE_PC97307_YEAR 0x09
-#define TODC_TYPE_PC97307_MONTH 0x08
-#define TODC_TYPE_PC97307_DOM 0x07 /* Day of Month */
-#define TODC_TYPE_PC97307_DOW 0x06 /* Day of Week */
-#define TODC_TYPE_PC97307_HOURS 0x04
-#define TODC_TYPE_PC97307_MINUTES 0x02
-#define TODC_TYPE_PC97307_SECONDS 0x00
-#define TODC_TYPE_PC97307_CNTL_B 0x0a
-#define TODC_TYPE_PC97307_CNTL_A 0x0b /* control_a R/W regs */
-#define TODC_TYPE_PC97307_WATCHDOG 0x0c
-#define TODC_TYPE_PC97307_INTERRUPTS 0x0d
-#define TODC_TYPE_PC97307_ALARM_DATE 0xff
-#define TODC_TYPE_PC97307_ALARM_HOUR 0x05
-#define TODC_TYPE_PC97307_ALARM_MINUTES 0x03
-#define TODC_TYPE_PC97307_ALARM_SECONDS 0x01
-#define TODC_TYPE_PC97307_CENTURY 0xff
-#define TODC_TYPE_PC97307_FLAGS 0xff
-#define TODC_TYPE_PC97307_NVRAM_ADDR_REG 0
-#define TODC_TYPE_PC97307_NVRAM_DATA_REG 0
-
-/*
- * Define macros to allocate and init the todc_info_t table that will
- * be used by the todc_time.c routines.
- */
-#define TODC_ALLOC() \
- static todc_info_t todc_info_alloc; \
- todc_info_t *todc_info = &todc_info_alloc;
-
-#define TODC_INIT(clock_type, as0, as1, data, bits) { \
- todc_info->rtc_type = clock_type; \
- \
- todc_info->nvram_as0 = (unsigned int)(as0); \
- todc_info->nvram_as1 = (unsigned int)(as1); \
- todc_info->nvram_data = (unsigned int)(data); \
- \
- todc_info->as0_bits = (bits); \
- \
- todc_info->nvram_size = clock_type ##_NVRAM_SIZE; \
- todc_info->sw_flags = clock_type ##_SW_FLAGS; \
- \
- todc_info->year = clock_type ##_YEAR; \
- todc_info->month = clock_type ##_MONTH; \
- todc_info->day_of_month = clock_type ##_DOM; \
- todc_info->day_of_week = clock_type ##_DOW; \
- todc_info->hours = clock_type ##_HOURS; \
- todc_info->minutes = clock_type ##_MINUTES; \
- todc_info->seconds = clock_type ##_SECONDS; \
- todc_info->control_b = clock_type ##_CNTL_B; \
- todc_info->control_a = clock_type ##_CNTL_A; \
- todc_info->watchdog = clock_type ##_WATCHDOG; \
- todc_info->interrupts = clock_type ##_INTERRUPTS; \
- todc_info->alarm_date = clock_type ##_ALARM_DATE; \
- todc_info->alarm_hour = clock_type ##_ALARM_HOUR; \
- todc_info->alarm_minutes = clock_type ##_ALARM_MINUTES; \
- todc_info->alarm_seconds = clock_type ##_ALARM_SECONDS; \
- todc_info->century = clock_type ##_CENTURY; \
- todc_info->flags = clock_type ##_FLAGS; \
- \
- todc_info->nvram_addr_reg = clock_type ##_NVRAM_ADDR_REG; \
- todc_info->nvram_data_reg = clock_type ##_NVRAM_DATA_REG; \
-}
-
-extern todc_info_t *todc_info;
-
-unsigned char todc_direct_read_val(int addr);
-void todc_direct_write_val(int addr, unsigned char val);
-unsigned char todc_m48txx_read_val(int addr);
-void todc_m48txx_write_val(int addr, unsigned char val);
-unsigned char todc_mc146818_read_val(int addr);
-void todc_mc146818_write_val(int addr, unsigned char val);
-
-long todc_time_init(void);
-unsigned long todc_get_rtc_time(void);
-int todc_set_rtc_time(unsigned long nowtime);
-void todc_calibrate_decr(void);
-
-#endif /* __PPC_KERNEL_TODC_H */
diff --git a/include/asm-ppc/traps.h b/include/asm-ppc/traps.h
deleted file mode 100644
index 68e7326..0000000
--- a/include/asm-ppc/traps.h
+++ /dev/null
@@ -1 +0,0 @@
-#include <asm-m68k/traps.h>
diff --git a/include/asm-ppc/zorro.h b/include/asm-ppc/zorro.h
deleted file mode 100644
index 1e5fbc6..0000000
--- a/include/asm-ppc/zorro.h
+++ /dev/null
@@ -1,30 +0,0 @@
-#ifndef _ASM_PPC_ZORRO_H
-#define _ASM_PPC_ZORRO_H
-
-#include <asm/io.h>
-
-#define z_readb in_8
-#define z_readw in_be16
-#define z_readl in_be32
-
-#define z_writeb(val, port) out_8((port), (val))
-#define z_writew(val, port) out_be16((port), (val))
-#define z_writel(val, port) out_be32((port), (val))
-
-#define z_memset_io(a,b,c) memset((void *)(a),(b),(c))
-#define z_memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
-#define z_memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
-
-extern void *__ioremap(unsigned long address, unsigned long size,
- unsigned long flags);
-
-extern void *ioremap(unsigned long address, unsigned long size);
-extern void iounmap(void *addr);
-
-extern void *__ioremap(unsigned long address, unsigned long size,
- unsigned long flags);
-
-#define z_ioremap ioremap
-#define z_iounmap iounmap
-
-#endif /* _ASM_PPC_ZORRO_H */
diff --git a/include/linux/adb.h b/include/linux/adb.h
index 64d8878..63bca50 100644
--- a/include/linux/adb.h
+++ b/include/linux/adb.h
@@ -84,7 +84,6 @@
ADB_MSG_PRE_RESET, /* Called before resetting the bus */
ADB_MSG_POST_RESET /* Called after resetting the bus (re-do init & register) */
};
-extern struct adb_driver *adb_controller;
extern struct blocking_notifier_head adb_client_list;
int adb_request(struct adb_request *req, void (*done)(struct adb_request *),
diff --git a/include/linux/crc-t10dif.h b/include/linux/crc-t10dif.h
new file mode 100644
index 0000000..a9c96d8
--- /dev/null
+++ b/include/linux/crc-t10dif.h
@@ -0,0 +1,8 @@
+#ifndef _LINUX_CRC_T10DIF_H
+#define _LINUX_CRC_T10DIF_H
+
+#include <linux/types.h>
+
+__u16 crc_t10dif(unsigned char const *, size_t);
+
+#endif
diff --git a/include/linux/elf.h b/include/linux/elf.h
index ff9fbed..edc3dac 100644
--- a/include/linux/elf.h
+++ b/include/linux/elf.h
@@ -358,6 +358,7 @@
#define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */
#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
+#define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
#define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */
diff --git a/include/linux/mm.h b/include/linux/mm.h
index cf1cd3a..2128ef7 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -108,6 +108,7 @@
#define VM_CAN_NONLINEAR 0x08000000 /* Has ->fault & does nonlinear pages */
#define VM_MIXEDMAP 0x10000000 /* Can contain "struct page" and pure PFN pages */
+#define VM_SAO 0x20000000 /* Strong Access Ordering (powerpc) */
#ifndef VM_STACK_DEFAULT_FLAGS /* arch can override this */
#define VM_STACK_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS
diff --git a/include/linux/mman.h b/include/linux/mman.h
index dab8892..30d1073 100644
--- a/include/linux/mman.h
+++ b/include/linux/mman.h
@@ -34,6 +34,32 @@
}
/*
+ * Allow architectures to handle additional protection bits
+ */
+
+#ifndef arch_calc_vm_prot_bits
+#define arch_calc_vm_prot_bits(prot) 0
+#endif
+
+#ifndef arch_vm_get_page_prot
+#define arch_vm_get_page_prot(vm_flags) __pgprot(0)
+#endif
+
+#ifndef arch_validate_prot
+/*
+ * This is called from mprotect(). PROT_GROWSDOWN and PROT_GROWSUP have
+ * already been masked out.
+ *
+ * Returns true if the prot flags are valid
+ */
+static inline int arch_validate_prot(unsigned long prot)
+{
+ return (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM)) == 0;
+}
+#define arch_validate_prot arch_validate_prot
+#endif
+
+/*
* Optimisation macro. It is equivalent to:
* (x & bit1) ? bit2 : 0
* but this version is faster.
@@ -51,7 +77,8 @@
{
return _calc_vm_trans(prot, PROT_READ, VM_READ ) |
_calc_vm_trans(prot, PROT_WRITE, VM_WRITE) |
- _calc_vm_trans(prot, PROT_EXEC, VM_EXEC );
+ _calc_vm_trans(prot, PROT_EXEC, VM_EXEC) |
+ arch_calc_vm_prot_bits(prot);
}
/*
diff --git a/include/linux/of_device.h b/include/linux/of_device.h
index afe3382..d3a74e0 100644
--- a/include/linux/of_device.h
+++ b/include/linux/of_device.h
@@ -24,4 +24,7 @@
of_release_dev(&dev->dev);
}
+extern ssize_t of_device_get_modalias(struct of_device *ofdev,
+ char *str, ssize_t len);
+
#endif /* _LINUX_OF_DEVICE_H */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 6595382..1cf4084b5 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2171,6 +2171,8 @@
#define PCI_DEVICE_ID_MPC8544 0x0033
#define PCI_DEVICE_ID_MPC8572E 0x0040
#define PCI_DEVICE_ID_MPC8572 0x0041
+#define PCI_DEVICE_ID_MPC8536E 0x0050
+#define PCI_DEVICE_ID_MPC8536 0x0051
#define PCI_DEVICE_ID_MPC8641 0x7010
#define PCI_DEVICE_ID_MPC8641D 0x7011
#define PCI_DEVICE_ID_MPC8610 0x7018
diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h
index e19e584..16be12f 100644
--- a/include/scsi/iscsi_if.h
+++ b/include/scsi/iscsi_if.h
@@ -50,6 +50,7 @@
ISCSI_UEVENT_TGT_DSCVR = UEVENT_BASE + 15,
ISCSI_UEVENT_SET_HOST_PARAM = UEVENT_BASE + 16,
ISCSI_UEVENT_UNBIND_SESSION = UEVENT_BASE + 17,
+ ISCSI_UEVENT_CREATE_BOUND_SESSION = UEVENT_BASE + 18,
/* up events */
ISCSI_KEVENT_RECV_PDU = KEVENT_BASE + 1,
@@ -78,6 +79,12 @@
uint16_t cmds_max;
uint16_t queue_depth;
} c_session;
+ struct msg_create_bound_session {
+ uint64_t ep_handle;
+ uint32_t initial_cmdsn;
+ uint16_t cmds_max;
+ uint16_t queue_depth;
+ } c_bound_session;
struct msg_destroy_session {
uint32_t sid;
} d_session;
@@ -250,42 +257,49 @@
ISCSI_PARAM_PING_TMO,
ISCSI_PARAM_RECV_TMO,
+
+ ISCSI_PARAM_IFACE_NAME,
+ ISCSI_PARAM_ISID,
+ ISCSI_PARAM_INITIATOR_NAME,
/* must always be last */
ISCSI_PARAM_MAX,
};
-#define ISCSI_MAX_RECV_DLENGTH (1 << ISCSI_PARAM_MAX_RECV_DLENGTH)
-#define ISCSI_MAX_XMIT_DLENGTH (1 << ISCSI_PARAM_MAX_XMIT_DLENGTH)
-#define ISCSI_HDRDGST_EN (1 << ISCSI_PARAM_HDRDGST_EN)
-#define ISCSI_DATADGST_EN (1 << ISCSI_PARAM_DATADGST_EN)
-#define ISCSI_INITIAL_R2T_EN (1 << ISCSI_PARAM_INITIAL_R2T_EN)
-#define ISCSI_MAX_R2T (1 << ISCSI_PARAM_MAX_R2T)
-#define ISCSI_IMM_DATA_EN (1 << ISCSI_PARAM_IMM_DATA_EN)
-#define ISCSI_FIRST_BURST (1 << ISCSI_PARAM_FIRST_BURST)
-#define ISCSI_MAX_BURST (1 << ISCSI_PARAM_MAX_BURST)
-#define ISCSI_PDU_INORDER_EN (1 << ISCSI_PARAM_PDU_INORDER_EN)
-#define ISCSI_DATASEQ_INORDER_EN (1 << ISCSI_PARAM_DATASEQ_INORDER_EN)
-#define ISCSI_ERL (1 << ISCSI_PARAM_ERL)
-#define ISCSI_IFMARKER_EN (1 << ISCSI_PARAM_IFMARKER_EN)
-#define ISCSI_OFMARKER_EN (1 << ISCSI_PARAM_OFMARKER_EN)
-#define ISCSI_EXP_STATSN (1 << ISCSI_PARAM_EXP_STATSN)
-#define ISCSI_TARGET_NAME (1 << ISCSI_PARAM_TARGET_NAME)
-#define ISCSI_TPGT (1 << ISCSI_PARAM_TPGT)
-#define ISCSI_PERSISTENT_ADDRESS (1 << ISCSI_PARAM_PERSISTENT_ADDRESS)
-#define ISCSI_PERSISTENT_PORT (1 << ISCSI_PARAM_PERSISTENT_PORT)
-#define ISCSI_SESS_RECOVERY_TMO (1 << ISCSI_PARAM_SESS_RECOVERY_TMO)
-#define ISCSI_CONN_PORT (1 << ISCSI_PARAM_CONN_PORT)
-#define ISCSI_CONN_ADDRESS (1 << ISCSI_PARAM_CONN_ADDRESS)
-#define ISCSI_USERNAME (1 << ISCSI_PARAM_USERNAME)
-#define ISCSI_USERNAME_IN (1 << ISCSI_PARAM_USERNAME_IN)
-#define ISCSI_PASSWORD (1 << ISCSI_PARAM_PASSWORD)
-#define ISCSI_PASSWORD_IN (1 << ISCSI_PARAM_PASSWORD_IN)
-#define ISCSI_FAST_ABORT (1 << ISCSI_PARAM_FAST_ABORT)
-#define ISCSI_ABORT_TMO (1 << ISCSI_PARAM_ABORT_TMO)
-#define ISCSI_LU_RESET_TMO (1 << ISCSI_PARAM_LU_RESET_TMO)
-#define ISCSI_HOST_RESET_TMO (1 << ISCSI_PARAM_HOST_RESET_TMO)
-#define ISCSI_PING_TMO (1 << ISCSI_PARAM_PING_TMO)
-#define ISCSI_RECV_TMO (1 << ISCSI_PARAM_RECV_TMO)
+#define ISCSI_MAX_RECV_DLENGTH (1ULL << ISCSI_PARAM_MAX_RECV_DLENGTH)
+#define ISCSI_MAX_XMIT_DLENGTH (1ULL << ISCSI_PARAM_MAX_XMIT_DLENGTH)
+#define ISCSI_HDRDGST_EN (1ULL << ISCSI_PARAM_HDRDGST_EN)
+#define ISCSI_DATADGST_EN (1ULL << ISCSI_PARAM_DATADGST_EN)
+#define ISCSI_INITIAL_R2T_EN (1ULL << ISCSI_PARAM_INITIAL_R2T_EN)
+#define ISCSI_MAX_R2T (1ULL << ISCSI_PARAM_MAX_R2T)
+#define ISCSI_IMM_DATA_EN (1ULL << ISCSI_PARAM_IMM_DATA_EN)
+#define ISCSI_FIRST_BURST (1ULL << ISCSI_PARAM_FIRST_BURST)
+#define ISCSI_MAX_BURST (1ULL << ISCSI_PARAM_MAX_BURST)
+#define ISCSI_PDU_INORDER_EN (1ULL << ISCSI_PARAM_PDU_INORDER_EN)
+#define ISCSI_DATASEQ_INORDER_EN (1ULL << ISCSI_PARAM_DATASEQ_INORDER_EN)
+#define ISCSI_ERL (1ULL << ISCSI_PARAM_ERL)
+#define ISCSI_IFMARKER_EN (1ULL << ISCSI_PARAM_IFMARKER_EN)
+#define ISCSI_OFMARKER_EN (1ULL << ISCSI_PARAM_OFMARKER_EN)
+#define ISCSI_EXP_STATSN (1ULL << ISCSI_PARAM_EXP_STATSN)
+#define ISCSI_TARGET_NAME (1ULL << ISCSI_PARAM_TARGET_NAME)
+#define ISCSI_TPGT (1ULL << ISCSI_PARAM_TPGT)
+#define ISCSI_PERSISTENT_ADDRESS (1ULL << ISCSI_PARAM_PERSISTENT_ADDRESS)
+#define ISCSI_PERSISTENT_PORT (1ULL << ISCSI_PARAM_PERSISTENT_PORT)
+#define ISCSI_SESS_RECOVERY_TMO (1ULL << ISCSI_PARAM_SESS_RECOVERY_TMO)
+#define ISCSI_CONN_PORT (1ULL << ISCSI_PARAM_CONN_PORT)
+#define ISCSI_CONN_ADDRESS (1ULL << ISCSI_PARAM_CONN_ADDRESS)
+#define ISCSI_USERNAME (1ULL << ISCSI_PARAM_USERNAME)
+#define ISCSI_USERNAME_IN (1ULL << ISCSI_PARAM_USERNAME_IN)
+#define ISCSI_PASSWORD (1ULL << ISCSI_PARAM_PASSWORD)
+#define ISCSI_PASSWORD_IN (1ULL << ISCSI_PARAM_PASSWORD_IN)
+#define ISCSI_FAST_ABORT (1ULL << ISCSI_PARAM_FAST_ABORT)
+#define ISCSI_ABORT_TMO (1ULL << ISCSI_PARAM_ABORT_TMO)
+#define ISCSI_LU_RESET_TMO (1ULL << ISCSI_PARAM_LU_RESET_TMO)
+#define ISCSI_HOST_RESET_TMO (1ULL << ISCSI_PARAM_HOST_RESET_TMO)
+#define ISCSI_PING_TMO (1ULL << ISCSI_PARAM_PING_TMO)
+#define ISCSI_RECV_TMO (1ULL << ISCSI_PARAM_RECV_TMO)
+#define ISCSI_IFACE_NAME (1ULL << ISCSI_PARAM_IFACE_NAME)
+#define ISCSI_ISID (1ULL << ISCSI_PARAM_ISID)
+#define ISCSI_INITIATOR_NAME (1ULL << ISCSI_PARAM_INITIATOR_NAME)
/* iSCSI HBA params */
enum iscsi_host_param {
@@ -296,20 +310,13 @@
ISCSI_HOST_PARAM_MAX,
};
-#define ISCSI_HOST_HWADDRESS (1 << ISCSI_HOST_PARAM_HWADDRESS)
-#define ISCSI_HOST_INITIATOR_NAME (1 << ISCSI_HOST_PARAM_INITIATOR_NAME)
-#define ISCSI_HOST_NETDEV_NAME (1 << ISCSI_HOST_PARAM_NETDEV_NAME)
-#define ISCSI_HOST_IPADDRESS (1 << ISCSI_HOST_PARAM_IPADDRESS)
+#define ISCSI_HOST_HWADDRESS (1ULL << ISCSI_HOST_PARAM_HWADDRESS)
+#define ISCSI_HOST_INITIATOR_NAME (1ULL << ISCSI_HOST_PARAM_INITIATOR_NAME)
+#define ISCSI_HOST_NETDEV_NAME (1ULL << ISCSI_HOST_PARAM_NETDEV_NAME)
+#define ISCSI_HOST_IPADDRESS (1ULL << ISCSI_HOST_PARAM_IPADDRESS)
#define iscsi_ptr(_handle) ((void*)(unsigned long)_handle)
#define iscsi_handle(_ptr) ((uint64_t)(unsigned long)_ptr)
-#define hostdata_session(_hostdata) (iscsi_ptr(*(unsigned long *)_hostdata))
-
-/**
- * iscsi_hostdata - get LLD hostdata from scsi_host
- * @_hostdata: pointer to scsi host's hostdata
- **/
-#define iscsi_hostdata(_hostdata) ((void*)_hostdata + sizeof(unsigned long))
/*
* These flags presents iSCSI Data-Path capabilities.
diff --git a/include/scsi/iscsi_proto.h b/include/scsi/iscsi_proto.h
index e0593bf..f2a2c11 100644
--- a/include/scsi/iscsi_proto.h
+++ b/include/scsi/iscsi_proto.h
@@ -22,6 +22,7 @@
#define ISCSI_PROTO_H
#include <linux/types.h>
+#include <scsi/scsi.h>
#define ISCSI_DRAFT20_VERSION 0x00
@@ -156,7 +157,7 @@
uint8_t ahstype;
uint8_t reserved;
/* 4-byte aligned extended CDB spillover */
- uint8_t ecdb[260 - ISCSI_CDB_SIZE];
+ uint8_t ecdb[SCSI_MAX_VARLEN_CDB_SIZE - ISCSI_CDB_SIZE];
};
/* SCSI Response Header */
diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h
index cd3ca63..5e75bb7 100644
--- a/include/scsi/libiscsi.h
+++ b/include/scsi/libiscsi.h
@@ -24,6 +24,7 @@
#define LIBISCSI_H
#include <linux/types.h>
+#include <linux/wait.h>
#include <linux/mutex.h>
#include <linux/timer.h>
#include <linux/workqueue.h>
@@ -31,6 +32,7 @@
#include <scsi/iscsi_if.h>
struct scsi_transport_template;
+struct scsi_host_template;
struct scsi_device;
struct Scsi_Host;
struct scsi_cmnd;
@@ -40,6 +42,7 @@
struct iscsi_cls_conn;
struct iscsi_session;
struct iscsi_nopin;
+struct device;
/* #define DEBUG_SCSI */
#ifdef DEBUG_SCSI
@@ -49,9 +52,7 @@
#endif
#define ISCSI_DEF_XMIT_CMDS_MAX 128 /* must be power of 2 */
-#define ISCSI_MGMT_CMDS_MAX 16 /* must be power of 2 */
-
-#define ISCSI_MGMT_ITT_OFFSET 0xa00
+#define ISCSI_MGMT_CMDS_MAX 15
#define ISCSI_DEF_CMD_PER_LUN 32
#define ISCSI_MAX_CMD_PER_LUN 128
@@ -69,7 +70,10 @@
/* Connection suspend "bit" */
#define ISCSI_SUSPEND_BIT 1
-#define ISCSI_ITT_MASK (0xfff)
+#define ISCSI_ITT_MASK (0x1fff)
+#define ISCSI_TOTAL_CMDS_MAX 4096
+/* this must be a power of two greater than ISCSI_MGMT_CMDS_MAX */
+#define ISCSI_TOTAL_CMDS_MIN 16
#define ISCSI_AGE_SHIFT 28
#define ISCSI_AGE_MASK (0xf << ISCSI_AGE_SHIFT)
@@ -82,18 +86,6 @@
ISCSI_DIGEST_SIZE = sizeof(__u32),
};
-struct iscsi_mgmt_task {
- /*
- * Becuae LLDs allocate their hdr differently, this is a pointer to
- * that storage. It must be setup at session creation time.
- */
- struct iscsi_hdr *hdr;
- char *data; /* mgmt payload */
- unsigned data_count; /* counts data to be sent */
- uint32_t itt; /* this ITT */
- void *dd_data; /* driver/transport data */
- struct list_head running;
-};
enum {
ISCSI_TASK_COMPLETED,
@@ -101,7 +93,7 @@
ISCSI_TASK_RUNNING,
};
-struct iscsi_cmd_task {
+struct iscsi_task {
/*
* Because LLDs allocate their hdr differently, this is a pointer
* and length to that storage. It must be setup at session
@@ -118,6 +110,7 @@
/* offset in unsolicited stream (bytes); */
unsigned unsol_offset;
unsigned data_count; /* remaining Data-Out */
+ char *data; /* mgmt payload */
struct scsi_cmnd *sc; /* associated SCSI cmd*/
struct iscsi_conn *conn; /* used connection */
@@ -128,9 +121,9 @@
void *dd_data; /* driver/transport data */
};
-static inline void* iscsi_next_hdr(struct iscsi_cmd_task *ctask)
+static inline void* iscsi_next_hdr(struct iscsi_task *task)
{
- return (void*)ctask->hdr + ctask->hdr_len;
+ return (void*)task->hdr + task->hdr_len;
}
/* Connection's states */
@@ -146,11 +139,6 @@
void *dd_data; /* iscsi_transport data */
struct iscsi_session *session; /* parent session */
/*
- * LLDs should set this lock. It protects the transport recv
- * code
- */
- rwlock_t *recv_lock;
- /*
* conn_stop() flag: stop to recover, stop to terminate
*/
int stop_stage;
@@ -159,7 +147,7 @@
unsigned long last_ping;
int ping_timeout;
int recv_timeout;
- struct iscsi_mgmt_task *ping_mtask;
+ struct iscsi_task *ping_task;
/* iSCSI connection-wide sequencing */
uint32_t exp_statsn;
@@ -175,9 +163,8 @@
* should always fit in this buffer
*/
char *data;
- struct iscsi_mgmt_task *login_mtask; /* mtask used for login/text */
- struct iscsi_mgmt_task *mtask; /* xmit mtask in progress */
- struct iscsi_cmd_task *ctask; /* xmit ctask in progress */
+ struct iscsi_task *login_task; /* mtask used for login/text */
+ struct iscsi_task *task; /* xmit task in progress */
/* xmit */
struct list_head mgmtqueue; /* mgmt (control) xmit queue */
@@ -208,9 +195,6 @@
/* remote portal currently connected to */
int portal_port;
char portal_address[ISCSI_ADDRESS_BUF_LEN];
- /* local address */
- int local_port;
- char local_address[ISCSI_ADDRESS_BUF_LEN];
/* MIB-statistics */
uint64_t txdata_octets;
@@ -246,6 +230,7 @@
};
struct iscsi_session {
+ struct iscsi_cls_session *cls_session;
/*
* Syncs up the scsi eh thread with the iscsi eh thread when sending
* task management functions. This must be taken before the session
@@ -281,10 +266,8 @@
char *password;
char *password_in;
char *targetname;
+ char *ifacename;
char *initiatorname;
- /* hw address or netdev iscsi connection is bound to */
- char *hwaddress;
- char *netdev;
/* control data */
struct iscsi_transport *tt;
struct Scsi_Host *host;
@@ -298,12 +281,20 @@
int state; /* session state */
int age; /* counts session re-opens */
+ int scsi_cmds_max; /* max scsi commands */
int cmds_max; /* size of cmds array */
- struct iscsi_cmd_task **cmds; /* Original Cmds arr */
+ struct iscsi_task **cmds; /* Original Cmds arr */
struct iscsi_pool cmdpool; /* PDU's pool */
- int mgmtpool_max; /* size of mgmt array */
- struct iscsi_mgmt_task **mgmt_cmds; /* Original mgmt arr */
- struct iscsi_pool mgmtpool; /* Mgmt PDU's pool */
+};
+
+struct iscsi_host {
+ char *initiatorname;
+ /* hw address or netdev iscsi connection is bound to */
+ char *hwaddress;
+ char *netdev;
+ /* local address */
+ int local_port;
+ char local_address[ISCSI_ADDRESS_BUF_LEN];
};
/*
@@ -316,42 +307,44 @@
extern int iscsi_queuecommand(struct scsi_cmnd *sc,
void (*done)(struct scsi_cmnd *));
-
/*
* iSCSI host helpers.
*/
+#define iscsi_host_priv(_shost) \
+ (shost_priv(_shost) + sizeof(struct iscsi_host))
+
extern int iscsi_host_set_param(struct Scsi_Host *shost,
enum iscsi_host_param param, char *buf,
int buflen);
extern int iscsi_host_get_param(struct Scsi_Host *shost,
enum iscsi_host_param param, char *buf);
+extern int iscsi_host_add(struct Scsi_Host *shost, struct device *pdev);
+extern struct Scsi_Host *iscsi_host_alloc(struct scsi_host_template *sht,
+ int dd_data_size, uint16_t qdepth);
+extern void iscsi_host_remove(struct Scsi_Host *shost);
+extern void iscsi_host_free(struct Scsi_Host *shost);
/*
* session management
*/
extern struct iscsi_cls_session *
-iscsi_session_setup(struct iscsi_transport *, struct scsi_transport_template *,
- uint16_t, uint16_t, int, int, uint32_t, uint32_t *);
+iscsi_session_setup(struct iscsi_transport *, struct Scsi_Host *shost,
+ uint16_t, int, uint32_t, unsigned int);
extern void iscsi_session_teardown(struct iscsi_cls_session *);
-extern struct iscsi_session *class_to_transport_session(struct iscsi_cls_session *);
extern void iscsi_session_recovery_timedout(struct iscsi_cls_session *);
extern int iscsi_set_param(struct iscsi_cls_conn *cls_conn,
enum iscsi_param param, char *buf, int buflen);
extern int iscsi_session_get_param(struct iscsi_cls_session *cls_session,
enum iscsi_param param, char *buf);
-#define session_to_cls(_sess) \
- hostdata_session(_sess->host->hostdata)
-
#define iscsi_session_printk(prefix, _sess, fmt, a...) \
- iscsi_cls_session_printk(prefix, \
- (struct iscsi_cls_session *)session_to_cls(_sess), fmt, ##a)
+ iscsi_cls_session_printk(prefix, _sess->cls_session, fmt, ##a)
/*
* connection management
*/
extern struct iscsi_cls_conn *iscsi_conn_setup(struct iscsi_cls_session *,
- uint32_t);
+ int, uint32_t);
extern void iscsi_conn_teardown(struct iscsi_cls_conn *);
extern int iscsi_conn_start(struct iscsi_cls_conn *);
extern void iscsi_conn_stop(struct iscsi_cls_conn *, int);
@@ -360,25 +353,29 @@
extern void iscsi_conn_failure(struct iscsi_conn *conn, enum iscsi_err err);
extern int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn,
enum iscsi_param param, char *buf);
+extern void iscsi_suspend_tx(struct iscsi_conn *conn);
#define iscsi_conn_printk(prefix, _c, fmt, a...) \
- iscsi_cls_conn_printk(prefix, _c->cls_conn, fmt, ##a)
+ iscsi_cls_conn_printk(prefix, ((struct iscsi_conn *)_c)->cls_conn, \
+ fmt, ##a)
/*
* pdu and task processing
*/
extern void iscsi_update_cmdsn(struct iscsi_session *, struct iscsi_nopin *);
-extern void iscsi_prep_unsolicit_data_pdu(struct iscsi_cmd_task *,
+extern void iscsi_prep_unsolicit_data_pdu(struct iscsi_task *,
struct iscsi_data *hdr);
extern int iscsi_conn_send_pdu(struct iscsi_cls_conn *, struct iscsi_hdr *,
char *, uint32_t);
extern int iscsi_complete_pdu(struct iscsi_conn *, struct iscsi_hdr *,
char *, int);
-extern int iscsi_verify_itt(struct iscsi_conn *, struct iscsi_hdr *,
- uint32_t *);
-extern void iscsi_requeue_ctask(struct iscsi_cmd_task *ctask);
-extern void iscsi_free_mgmt_task(struct iscsi_conn *conn,
- struct iscsi_mgmt_task *mtask);
+extern int __iscsi_complete_pdu(struct iscsi_conn *, struct iscsi_hdr *,
+ char *, int);
+extern int iscsi_verify_itt(struct iscsi_conn *, itt_t);
+extern struct iscsi_task *iscsi_itt_to_ctask(struct iscsi_conn *, itt_t);
+extern void iscsi_requeue_task(struct iscsi_task *task);
+extern void iscsi_put_task(struct iscsi_task *task);
+extern void __iscsi_get_task(struct iscsi_task *task);
/*
* generic helpers
diff --git a/include/scsi/scsi.h b/include/scsi/scsi.h
index 32742c4..00137a7 100644
--- a/include/scsi/scsi.h
+++ b/include/scsi/scsi.h
@@ -9,6 +9,7 @@
#define _SCSI_SCSI_H
#include <linux/types.h>
+#include <scsi/scsi_cmnd.h>
/*
* The maximum number of SG segments that we will put inside a
@@ -400,6 +401,7 @@
#define SOFT_ERROR 0x2005
#define ADD_TO_MLQUEUE 0x2006
#define TIMEOUT_ERROR 0x2007
+#define SCSI_RETURN_NOT_HANDLED 0x2008
/*
* Midlevel queue return values.
@@ -424,6 +426,22 @@
#define driver_byte(result) (((result) >> 24) & 0xff)
#define suggestion(result) (driver_byte(result) & SUGGEST_MASK)
+static inline void set_msg_byte(struct scsi_cmnd *cmd, char status)
+{
+ cmd->result |= status << 8;
+}
+
+static inline void set_host_byte(struct scsi_cmnd *cmd, char status)
+{
+ cmd->result |= status << 16;
+}
+
+static inline void set_driver_byte(struct scsi_cmnd *cmd, char status)
+{
+ cmd->result |= status << 24;
+}
+
+
#define sense_class(sense) (((sense) >> 4) & 0x7)
#define sense_error(sense) ((sense) & 0xf)
#define sense_valid(sense) ((sense) & 0x80);
diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h
index 3e46dfa..66c9448 100644
--- a/include/scsi/scsi_cmnd.h
+++ b/include/scsi/scsi_cmnd.h
@@ -7,7 +7,6 @@
#include <linux/types.h>
#include <linux/timer.h>
#include <linux/scatterlist.h>
-#include <linux/blkdev.h>
struct Scsi_Host;
struct scsi_device;
diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h
index 00b7876..6467f78 100644
--- a/include/scsi/scsi_device.h
+++ b/include/scsi/scsi_device.h
@@ -162,9 +162,29 @@
struct execute_work ew; /* used to get process context on put */
+ struct scsi_dh_data *scsi_dh_data;
enum scsi_device_state sdev_state;
unsigned long sdev_data[0];
} __attribute__((aligned(sizeof(unsigned long))));
+
+struct scsi_device_handler {
+ /* Used by the infrastructure */
+ struct list_head list; /* list of scsi_device_handlers */
+ struct notifier_block nb;
+
+ /* Filled by the hardware handler */
+ struct module *module;
+ const char *name;
+ int (*check_sense)(struct scsi_device *, struct scsi_sense_hdr *);
+ int (*activate)(struct scsi_device *);
+ int (*prep_fn)(struct scsi_device *, struct request *);
+};
+
+struct scsi_dh_data {
+ struct scsi_device_handler *scsi_dh;
+ char buf[0];
+};
+
#define to_scsi_device(d) \
container_of(d, struct scsi_device, sdev_gendev)
#define class_to_sdev(d) \
@@ -231,7 +251,9 @@
uint, uint, uint, void *hostdata);
extern int scsi_add_device(struct Scsi_Host *host, uint channel,
uint target, uint lun);
+extern int scsi_register_device_handler(struct scsi_device_handler *scsi_dh);
extern void scsi_remove_device(struct scsi_device *);
+extern int scsi_unregister_device_handler(struct scsi_device_handler *scsi_dh);
extern int scsi_device_get(struct scsi_device *);
extern void scsi_device_put(struct scsi_device *);
diff --git a/include/scsi/scsi_dh.h b/include/scsi/scsi_dh.h
new file mode 100644
index 0000000..3ad2303
--- /dev/null
+++ b/include/scsi/scsi_dh.h
@@ -0,0 +1,69 @@
+/*
+ * Header file for SCSI device handler infrastruture.
+ *
+ * Modified version of patches posted by Mike Christie <michaelc@cs.wisc.edu>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright IBM Corporation, 2007
+ * Authors:
+ * Chandra Seetharaman <sekharan@us.ibm.com>
+ * Mike Anderson <andmike@linux.vnet.ibm.com>
+ */
+
+#include <scsi/scsi_device.h>
+
+enum {
+ SCSI_DH_OK = 0,
+ /*
+ * device errors
+ */
+ SCSI_DH_DEV_FAILED, /* generic device error */
+ SCSI_DH_DEV_TEMP_BUSY,
+ SCSI_DH_DEVICE_MAX, /* max device blkerr definition */
+
+ /*
+ * transport errors
+ */
+ SCSI_DH_NOTCONN = SCSI_DH_DEVICE_MAX + 1,
+ SCSI_DH_CONN_FAILURE,
+ SCSI_DH_TRANSPORT_MAX, /* max transport blkerr definition */
+
+ /*
+ * driver and generic errors
+ */
+ SCSI_DH_IO = SCSI_DH_TRANSPORT_MAX + 1, /* generic error */
+ SCSI_DH_INVALID_IO,
+ SCSI_DH_RETRY, /* retry the req, but not immediately */
+ SCSI_DH_IMM_RETRY, /* immediately retry the req */
+ SCSI_DH_TIMED_OUT,
+ SCSI_DH_RES_TEMP_UNAVAIL,
+ SCSI_DH_DEV_OFFLINED,
+ SCSI_DH_NOSYS,
+ SCSI_DH_DRIVER_MAX,
+};
+#if defined(CONFIG_SCSI_DH) || defined(CONFIG_SCSI_DH_MODULE)
+extern int scsi_dh_activate(struct request_queue *);
+extern int scsi_dh_handler_exist(const char *);
+#else
+static inline int scsi_dh_activate(struct request_queue *req)
+{
+ return 0;
+}
+static inline int scsi_dh_handler_exist(const char *name)
+{
+ return 0;
+}
+#endif
diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h
index aab1eae..f5444e0 100644
--- a/include/scsi/scsi_transport_iscsi.h
+++ b/include/scsi/scsi_transport_iscsi.h
@@ -30,11 +30,11 @@
struct scsi_transport_template;
struct iscsi_transport;
+struct iscsi_endpoint;
struct Scsi_Host;
struct iscsi_cls_conn;
struct iscsi_conn;
-struct iscsi_cmd_task;
-struct iscsi_mgmt_task;
+struct iscsi_task;
struct sockaddr;
/**
@@ -58,19 +58,22 @@
* @stop_conn: suspend/recover/terminate connection
* @send_pdu: send iSCSI PDU, Login, Logout, NOP-Out, Reject, Text.
* @session_recovery_timedout: notify LLD a block during recovery timed out
- * @init_cmd_task: Initialize a iscsi_cmd_task and any internal structs.
- * Called from queuecommand with session lock held.
- * @init_mgmt_task: Initialize a iscsi_mgmt_task and any internal structs.
- * Called from iscsi_conn_send_generic with xmitmutex.
- * @xmit_cmd_task: Requests LLD to transfer cmd task. Returns 0 or the
+ * @init_task: Initialize a iscsi_task and any internal structs.
+ * When offloading the data path, this is called from
+ * queuecommand with the session lock, or from the
+ * iscsi_conn_send_pdu context with the session lock.
+ * When not offloading the data path, this is called
+ * from the scsi work queue without the session lock.
+ * @xmit_task Requests LLD to transfer cmd task. Returns 0 or the
* the number of bytes transferred on success, and -Exyz
- * value on error.
- * @xmit_mgmt_task: Requests LLD to transfer mgmt task. Returns 0 or the
- * the number of bytes transferred on success, and -Exyz
- * value on error.
- * @cleanup_cmd_task: requests LLD to fail cmd task. Called with xmitmutex
- * and session->lock after the connection has been
- * suspended and terminated during recovery. If called
+ * value on error. When offloading the data path, this
+ * is called from queuecommand with the session lock, or
+ * from the iscsi_conn_send_pdu context with the session
+ * lock. When not offloading the data path, this is called
+ * from the scsi work queue without the session lock.
+ * @cleanup_task: requests LLD to fail task. Called with session lock
+ * and after the connection has been suspended and
+ * terminated during recovery. If called
* from abort task then connection is not suspended
* or terminated but sk_callback_lock is held
*
@@ -83,17 +86,9 @@
/* LLD sets this to indicate what values it can export to sysfs */
uint64_t param_mask;
uint64_t host_param_mask;
- struct scsi_host_template *host_template;
- /* LLD connection data size */
- int conndata_size;
- /* LLD session data size */
- int sessiondata_size;
- int max_lun;
- unsigned int max_conn;
- unsigned int max_cmd_len;
- struct iscsi_cls_session *(*create_session) (struct iscsi_transport *it,
- struct scsi_transport_template *t, uint16_t, uint16_t,
- uint32_t sn, uint32_t *hn);
+ struct iscsi_cls_session *(*create_session) (struct iscsi_endpoint *ep,
+ uint16_t cmds_max, uint16_t qdepth,
+ uint32_t sn, uint32_t *hn);
void (*destroy_session) (struct iscsi_cls_session *session);
struct iscsi_cls_conn *(*create_conn) (struct iscsi_cls_session *sess,
uint32_t cid);
@@ -118,20 +113,15 @@
char *data, uint32_t data_size);
void (*get_stats) (struct iscsi_cls_conn *conn,
struct iscsi_stats *stats);
- int (*init_cmd_task) (struct iscsi_cmd_task *ctask);
- void (*init_mgmt_task) (struct iscsi_conn *conn,
- struct iscsi_mgmt_task *mtask);
- int (*xmit_cmd_task) (struct iscsi_conn *conn,
- struct iscsi_cmd_task *ctask);
- void (*cleanup_cmd_task) (struct iscsi_conn *conn,
- struct iscsi_cmd_task *ctask);
- int (*xmit_mgmt_task) (struct iscsi_conn *conn,
- struct iscsi_mgmt_task *mtask);
+ int (*init_task) (struct iscsi_task *task);
+ int (*xmit_task) (struct iscsi_task *task);
+ void (*cleanup_task) (struct iscsi_conn *conn,
+ struct iscsi_task *task);
void (*session_recovery_timedout) (struct iscsi_cls_session *session);
- int (*ep_connect) (struct sockaddr *dst_addr, int non_blocking,
- uint64_t *ep_handle);
- int (*ep_poll) (uint64_t ep_handle, int timeout_ms);
- void (*ep_disconnect) (uint64_t ep_handle);
+ struct iscsi_endpoint *(*ep_connect) (struct sockaddr *dst_addr,
+ int non_blocking);
+ int (*ep_poll) (struct iscsi_endpoint *ep, int timeout_ms);
+ void (*ep_disconnect) (struct iscsi_endpoint *ep);
int (*tgt_dscvr) (struct Scsi_Host *shost, enum iscsi_tgt_dscvr type,
uint32_t enable, struct sockaddr *dst_addr);
};
@@ -172,9 +162,10 @@
ISCSI_SESSION_FREE,
};
+#define ISCSI_MAX_TARGET -1
+
struct iscsi_cls_session {
struct list_head sess_list; /* item in session_list */
- struct list_head host_list;
struct iscsi_transport *transport;
spinlock_t lock;
struct work_struct block_work;
@@ -186,7 +177,7 @@
int recovery_tmo;
struct delayed_work recovery_work;
- int target_id;
+ unsigned int target_id;
int state;
int sid; /* session id */
@@ -203,14 +194,22 @@
#define starget_to_session(_stgt) \
iscsi_dev_to_session(_stgt->dev.parent)
-struct iscsi_host {
- struct list_head sessions;
+struct iscsi_cls_host {
atomic_t nr_scans;
struct mutex mutex;
struct workqueue_struct *scan_workq;
char scan_workq_name[KOBJ_NAME_LEN];
};
+extern void iscsi_host_for_each_session(struct Scsi_Host *shost,
+ void (*fn)(struct iscsi_cls_session *));
+
+struct iscsi_endpoint {
+ void *dd_data; /* LLD private data */
+ struct device dev;
+ unsigned int id;
+};
+
/*
* session and connection functions that can be used by HW iSCSI LLDs
*/
@@ -222,22 +221,26 @@
extern int iscsi_session_chkready(struct iscsi_cls_session *session);
extern struct iscsi_cls_session *iscsi_alloc_session(struct Scsi_Host *shost,
- struct iscsi_transport *transport);
+ struct iscsi_transport *transport, int dd_size);
extern int iscsi_add_session(struct iscsi_cls_session *session,
unsigned int target_id);
extern int iscsi_session_event(struct iscsi_cls_session *session,
enum iscsi_uevent_e event);
extern struct iscsi_cls_session *iscsi_create_session(struct Scsi_Host *shost,
struct iscsi_transport *t,
+ int dd_size,
unsigned int target_id);
extern void iscsi_remove_session(struct iscsi_cls_session *session);
extern void iscsi_free_session(struct iscsi_cls_session *session);
extern int iscsi_destroy_session(struct iscsi_cls_session *session);
extern struct iscsi_cls_conn *iscsi_create_conn(struct iscsi_cls_session *sess,
- uint32_t cid);
+ int dd_size, uint32_t cid);
extern int iscsi_destroy_conn(struct iscsi_cls_conn *conn);
extern void iscsi_unblock_session(struct iscsi_cls_session *session);
extern void iscsi_block_session(struct iscsi_cls_session *session);
extern int iscsi_scan_finished(struct Scsi_Host *shost, unsigned long time);
+extern struct iscsi_endpoint *iscsi_create_endpoint(int dd_size);
+extern void iscsi_destroy_endpoint(struct iscsi_endpoint *ep);
+extern struct iscsi_endpoint *iscsi_lookup_endpoint(u64 handle);
#endif
diff --git a/include/scsi/sd.h b/include/scsi/sd.h
deleted file mode 100644
index 4f032d4..0000000
--- a/include/scsi/sd.h
+++ /dev/null
@@ -1,57 +0,0 @@
-#ifndef _SCSI_DISK_H
-#define _SCSI_DISK_H
-
-/*
- * More than enough for everybody ;) The huge number of majors
- * is a leftover from 16bit dev_t days, we don't really need that
- * much numberspace.
- */
-#define SD_MAJORS 16
-
-/*
- * This is limited by the naming scheme enforced in sd_probe,
- * add another character to it if you really need more disks.
- */
-#define SD_MAX_DISKS (((26 * 26) + 26 + 1) * 26)
-
-/*
- * Time out in seconds for disks and Magneto-opticals (which are slower).
- */
-#define SD_TIMEOUT (30 * HZ)
-#define SD_MOD_TIMEOUT (75 * HZ)
-
-/*
- * Number of allowed retries
- */
-#define SD_MAX_RETRIES 5
-#define SD_PASSTHROUGH_RETRIES 1
-
-/*
- * Size of the initial data buffer for mode and read capacity data
- */
-#define SD_BUF_SIZE 512
-
-struct scsi_disk {
- struct scsi_driver *driver; /* always &sd_template */
- struct scsi_device *device;
- struct device dev;
- struct gendisk *disk;
- unsigned int openers; /* protected by BKL for now, yuck */
- sector_t capacity; /* size in 512-byte sectors */
- u32 index;
- u8 media_present;
- u8 write_prot;
- unsigned previous_state : 1;
- unsigned WCE : 1; /* state of disk WCE bit */
- unsigned RCD : 1; /* state of disk RCD bit, unused */
- unsigned DPOFUA : 1; /* state of disk DPOFUA bit */
-};
-#define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev)
-
-#define sd_printk(prefix, sdsk, fmt, a...) \
- (sdsk)->disk ? \
- sdev_printk(prefix, (sdsk)->device, "[%s] " fmt, \
- (sdsk)->disk->disk_name, ##a) : \
- sdev_printk(prefix, (sdsk)->device, fmt, ##a)
-
-#endif /* _SCSI_DISK_H */
diff --git a/include/scsi/sg.h b/include/scsi/sg.h
index 519c49a..934ae38 100644
--- a/include/scsi/sg.h
+++ b/include/scsi/sg.h
@@ -206,6 +206,7 @@
#define SG_SCSI_RESET_DEVICE 1
#define SG_SCSI_RESET_BUS 2
#define SG_SCSI_RESET_HOST 3
+#define SG_SCSI_RESET_TARGET 4
/* synchronous SCSI command ioctl, (only in version 3 interface) */
#define SG_IO 0x2285 /* similar effect as write() followed by read() */
diff --git a/lib/Kconfig b/lib/Kconfig
index 8cc8e87..c7ad7a5 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -29,6 +29,13 @@
the kernel tree does. Such modules that use library CRC16
functions require M here.
+config CRC_T10DIF
+ tristate "CRC calculation for the T10 Data Integrity Field"
+ help
+ This option is only needed if a module that's not in the
+ kernel tree needs to calculate CRC checks for use with the
+ SCSI data integrity subsystem.
+
config CRC_ITU_T
tristate "CRC ITU-T V.41 functions"
help
diff --git a/lib/Makefile b/lib/Makefile
index 4b836a5..2c62a9c 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -54,6 +54,7 @@
obj-$(CONFIG_BITREVERSE) += bitrev.o
obj-$(CONFIG_CRC_CCITT) += crc-ccitt.o
obj-$(CONFIG_CRC16) += crc16.o
+obj-$(CONFIG_CRC_T10DIF)+= crc-t10dif.o
obj-$(CONFIG_CRC_ITU_T) += crc-itu-t.o
obj-$(CONFIG_CRC32) += crc32.o
obj-$(CONFIG_CRC7) += crc7.o
diff --git a/lib/crc-t10dif.c b/lib/crc-t10dif.c
new file mode 100644
index 0000000..fbbd66e
--- /dev/null
+++ b/lib/crc-t10dif.c
@@ -0,0 +1,67 @@
+/*
+ * T10 Data Integrity Field CRC16 calculation
+ *
+ * Copyright (c) 2007 Oracle Corporation. All rights reserved.
+ * Written by Martin K. Petersen <martin.petersen@oracle.com>
+ *
+ * This source code is licensed under the GNU General Public License,
+ * Version 2. See the file COPYING for more details.
+ */
+
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/crc-t10dif.h>
+
+/* Table generated using the following polynomium:
+ * x^16 + x^15 + x^11 + x^9 + x^8 + x^7 + x^5 + x^4 + x^2 + x + 1
+ * gt: 0x8bb7
+ */
+static const __u16 t10_dif_crc_table[256] = {
+ 0x0000, 0x8BB7, 0x9CD9, 0x176E, 0xB205, 0x39B2, 0x2EDC, 0xA56B,
+ 0xEFBD, 0x640A, 0x7364, 0xF8D3, 0x5DB8, 0xD60F, 0xC161, 0x4AD6,
+ 0x54CD, 0xDF7A, 0xC814, 0x43A3, 0xE6C8, 0x6D7F, 0x7A11, 0xF1A6,
+ 0xBB70, 0x30C7, 0x27A9, 0xAC1E, 0x0975, 0x82C2, 0x95AC, 0x1E1B,
+ 0xA99A, 0x222D, 0x3543, 0xBEF4, 0x1B9F, 0x9028, 0x8746, 0x0CF1,
+ 0x4627, 0xCD90, 0xDAFE, 0x5149, 0xF422, 0x7F95, 0x68FB, 0xE34C,
+ 0xFD57, 0x76E0, 0x618E, 0xEA39, 0x4F52, 0xC4E5, 0xD38B, 0x583C,
+ 0x12EA, 0x995D, 0x8E33, 0x0584, 0xA0EF, 0x2B58, 0x3C36, 0xB781,
+ 0xD883, 0x5334, 0x445A, 0xCFED, 0x6A86, 0xE131, 0xF65F, 0x7DE8,
+ 0x373E, 0xBC89, 0xABE7, 0x2050, 0x853B, 0x0E8C, 0x19E2, 0x9255,
+ 0x8C4E, 0x07F9, 0x1097, 0x9B20, 0x3E4B, 0xB5FC, 0xA292, 0x2925,
+ 0x63F3, 0xE844, 0xFF2A, 0x749D, 0xD1F6, 0x5A41, 0x4D2F, 0xC698,
+ 0x7119, 0xFAAE, 0xEDC0, 0x6677, 0xC31C, 0x48AB, 0x5FC5, 0xD472,
+ 0x9EA4, 0x1513, 0x027D, 0x89CA, 0x2CA1, 0xA716, 0xB078, 0x3BCF,
+ 0x25D4, 0xAE63, 0xB90D, 0x32BA, 0x97D1, 0x1C66, 0x0B08, 0x80BF,
+ 0xCA69, 0x41DE, 0x56B0, 0xDD07, 0x786C, 0xF3DB, 0xE4B5, 0x6F02,
+ 0x3AB1, 0xB106, 0xA668, 0x2DDF, 0x88B4, 0x0303, 0x146D, 0x9FDA,
+ 0xD50C, 0x5EBB, 0x49D5, 0xC262, 0x6709, 0xECBE, 0xFBD0, 0x7067,
+ 0x6E7C, 0xE5CB, 0xF2A5, 0x7912, 0xDC79, 0x57CE, 0x40A0, 0xCB17,
+ 0x81C1, 0x0A76, 0x1D18, 0x96AF, 0x33C4, 0xB873, 0xAF1D, 0x24AA,
+ 0x932B, 0x189C, 0x0FF2, 0x8445, 0x212E, 0xAA99, 0xBDF7, 0x3640,
+ 0x7C96, 0xF721, 0xE04F, 0x6BF8, 0xCE93, 0x4524, 0x524A, 0xD9FD,
+ 0xC7E6, 0x4C51, 0x5B3F, 0xD088, 0x75E3, 0xFE54, 0xE93A, 0x628D,
+ 0x285B, 0xA3EC, 0xB482, 0x3F35, 0x9A5E, 0x11E9, 0x0687, 0x8D30,
+ 0xE232, 0x6985, 0x7EEB, 0xF55C, 0x5037, 0xDB80, 0xCCEE, 0x4759,
+ 0x0D8F, 0x8638, 0x9156, 0x1AE1, 0xBF8A, 0x343D, 0x2353, 0xA8E4,
+ 0xB6FF, 0x3D48, 0x2A26, 0xA191, 0x04FA, 0x8F4D, 0x9823, 0x1394,
+ 0x5942, 0xD2F5, 0xC59B, 0x4E2C, 0xEB47, 0x60F0, 0x779E, 0xFC29,
+ 0x4BA8, 0xC01F, 0xD771, 0x5CC6, 0xF9AD, 0x721A, 0x6574, 0xEEC3,
+ 0xA415, 0x2FA2, 0x38CC, 0xB37B, 0x1610, 0x9DA7, 0x8AC9, 0x017E,
+ 0x1F65, 0x94D2, 0x83BC, 0x080B, 0xAD60, 0x26D7, 0x31B9, 0xBA0E,
+ 0xF0D8, 0x7B6F, 0x6C01, 0xE7B6, 0x42DD, 0xC96A, 0xDE04, 0x55B3
+};
+
+__u16 crc_t10dif(const unsigned char *buffer, size_t len)
+{
+ __u16 crc = 0;
+ unsigned int i;
+
+ for (i = 0 ; i < len ; i++)
+ crc = (crc << 8) ^ t10_dif_crc_table[((crc >> 8) ^ buffer[i]) & 0xff];
+
+ return crc;
+}
+EXPORT_SYMBOL(crc_t10dif);
+
+MODULE_DESCRIPTION("T10 DIF CRC calculation");
+MODULE_LICENSE("GPL");
diff --git a/mm/mmap.c b/mm/mmap.c
index 3354fdd..1d102b9 100644
--- a/mm/mmap.c
+++ b/mm/mmap.c
@@ -72,8 +72,9 @@
pgprot_t vm_get_page_prot(unsigned long vm_flags)
{
- return protection_map[vm_flags &
- (VM_READ|VM_WRITE|VM_EXEC|VM_SHARED)];
+ return __pgprot(pgprot_val(protection_map[vm_flags &
+ (VM_READ|VM_WRITE|VM_EXEC|VM_SHARED)]) |
+ pgprot_val(arch_vm_get_page_prot(vm_flags)));
}
EXPORT_SYMBOL(vm_get_page_prot);
diff --git a/mm/mprotect.c b/mm/mprotect.c
index acfe7c8..360d9cc 100644
--- a/mm/mprotect.c
+++ b/mm/mprotect.c
@@ -237,7 +237,7 @@
end = start + len;
if (end <= start)
return -ENOMEM;
- if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM))
+ if (!arch_validate_prot(prot))
return -EINVAL;
reqprot = prot;