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Ezequiel Garciafa0d6542013-04-02 01:37:41 +00001/*
Miquel Raynala9d58a12017-12-22 17:14:10 +01002 * Marvell EBU Armada SoCs thermal sensor driver
Ezequiel Garciafa0d6542013-04-02 01:37:41 +00003 *
4 * Copyright (C) 2013 Marvell
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16#include <linux/device.h>
17#include <linux/err.h>
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/of.h>
21#include <linux/module.h>
22#include <linux/delay.h>
23#include <linux/platform_device.h>
24#include <linux/of_device.h>
25#include <linux/thermal.h>
Miquel Raynal64163682017-12-22 17:14:12 +010026#include <linux/iopoll.h>
Miquel Raynal3d4e5182018-07-16 16:41:50 +020027#include <linux/mfd/syscon.h>
28#include <linux/regmap.h>
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000029
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000030/* Thermal Manager Control and Status Register */
31#define PMU_TDC0_SW_RST_MASK (0x1 << 1)
32#define PMU_TM_DISABLE_OFFS 0
33#define PMU_TM_DISABLE_MASK (0x1 << PMU_TM_DISABLE_OFFS)
34#define PMU_TDC0_REF_CAL_CNT_OFFS 11
35#define PMU_TDC0_REF_CAL_CNT_MASK (0x1ff << PMU_TDC0_REF_CAL_CNT_OFFS)
36#define PMU_TDC0_OTF_CAL_MASK (0x1 << 30)
37#define PMU_TDC0_START_CAL_MASK (0x1 << 25)
38
Ezequiel Garciae2d5f052014-05-06 13:59:50 -030039#define A375_UNIT_CONTROL_SHIFT 27
40#define A375_UNIT_CONTROL_MASK 0x7
41#define A375_READOUT_INVERT BIT(15)
42#define A375_HW_RESETn BIT(8)
43
Miquel Raynal8c0b8882017-12-22 17:14:11 +010044/* Errata fields */
45#define CONTROL0_TSEN_TC_TRIM_MASK 0x7
46#define CONTROL0_TSEN_TC_TRIM_VAL 0x3
47
Baruch Siach2ff12792017-12-22 17:14:08 +010048#define CONTROL0_TSEN_START BIT(0)
49#define CONTROL0_TSEN_RESET BIT(1)
50#define CONTROL0_TSEN_ENABLE BIT(2)
Miquel Raynala9fae792018-07-16 16:41:49 +020051#define CONTROL0_TSEN_AVG_BYPASS BIT(6)
Miquel Raynalf7c20682018-07-16 16:41:52 +020052#define CONTROL0_TSEN_CHAN_SHIFT 13
53#define CONTROL0_TSEN_CHAN_MASK 0xF
Miquel Raynala9fae792018-07-16 16:41:49 +020054#define CONTROL0_TSEN_OSR_SHIFT 24
55#define CONTROL0_TSEN_OSR_MAX 0x3
Miquel Raynalf7c20682018-07-16 16:41:52 +020056#define CONTROL0_TSEN_MODE_SHIFT 30
57#define CONTROL0_TSEN_MODE_EXTERNAL 0x2
58#define CONTROL0_TSEN_MODE_MASK 0x3
Baruch Siach2ff12792017-12-22 17:14:08 +010059
Miquel Raynala9fae792018-07-16 16:41:49 +020060#define CONTROL1_TSEN_AVG_SHIFT 0
61#define CONTROL1_TSEN_AVG_MASK 0x7
Baruch Siachccf8f522017-12-22 17:14:09 +010062#define CONTROL1_EXT_TSEN_SW_RESET BIT(7)
63#define CONTROL1_EXT_TSEN_HW_RESETn BIT(8)
64
Miquel Raynal64163682017-12-22 17:14:12 +010065#define STATUS_POLL_PERIOD_US 1000
66#define STATUS_POLL_TIMEOUT_US 100000
67
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -030068struct armada_thermal_data;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000069
70/* Marvell EBU Thermal Sensor Dev Structure */
71struct armada_thermal_priv {
Miquel Raynalc9899c12018-07-16 16:41:51 +020072 struct device *dev;
Miquel Raynal3d4e5182018-07-16 16:41:50 +020073 struct regmap *syscon;
Miquel Raynal8d987612018-07-16 16:41:44 +020074 char zone_name[THERMAL_NAME_LENGTH];
Miquel Raynalf7c20682018-07-16 16:41:52 +020075 /* serialize temperature reads/updates */
76 struct mutex update_lock;
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -030077 struct armada_thermal_data *data;
Miquel Raynalf7c20682018-07-16 16:41:52 +020078 int current_channel;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000079};
80
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -030081struct armada_thermal_data {
Miquel Raynal8b4c2712018-07-16 16:41:47 +020082 /* Initialize the thermal IC */
83 void (*init)(struct platform_device *pdev,
84 struct armada_thermal_priv *priv);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000085
86 /* Test for a valid sensor value (optional) */
87 bool (*is_valid)(struct armada_thermal_priv *);
Ezequiel Garcia9484bc62014-05-06 13:59:46 -030088
Baruch Siach0cf3a1a2017-09-14 18:06:57 +030089 /* Formula coeficients: temp = (b - m * reg) / div */
Baruch Siach2ff12792017-12-22 17:14:08 +010090 s64 coef_b;
91 s64 coef_m;
92 u32 coef_div;
Ezequiel Garciafd2c94d2014-05-06 13:59:49 -030093 bool inverted;
Baruch Siach2ff12792017-12-22 17:14:08 +010094 bool signed_sample;
Ezequiel Garcia1fcacca2014-05-06 13:59:47 -030095
96 /* Register shift and mask to access the sensor temperature */
97 unsigned int temp_shift;
98 unsigned int temp_mask;
Miquel Raynal27d92f22017-12-22 17:14:05 +010099 u32 is_valid_bit;
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200100
101 /* Syscon access */
102 unsigned int syscon_control0_off;
103 unsigned int syscon_control1_off;
104 unsigned int syscon_status_off;
Miquel Raynalf7c20682018-07-16 16:41:52 +0200105
106 /* One sensor is in the thermal IC, the others are in the CPUs if any */
107 unsigned int cpu_nr;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000108};
109
Miquel Raynalc9899c12018-07-16 16:41:51 +0200110struct armada_drvdata {
111 enum drvtype {
112 LEGACY,
113 SYSCON
114 } type;
115 union {
116 struct armada_thermal_priv *priv;
117 struct thermal_zone_device *tz;
118 } data;
119};
120
121/*
122 * struct armada_thermal_sensor - hold the information of one thermal sensor
123 * @thermal: pointer to the local private structure
124 * @tzd: pointer to the thermal zone device
Miquel Raynalf7c20682018-07-16 16:41:52 +0200125 * @id: identifier of the thermal sensor
Miquel Raynalc9899c12018-07-16 16:41:51 +0200126 */
127struct armada_thermal_sensor {
128 struct armada_thermal_priv *priv;
Miquel Raynalf7c20682018-07-16 16:41:52 +0200129 int id;
Miquel Raynalc9899c12018-07-16 16:41:51 +0200130};
131
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200132static void armadaxp_init(struct platform_device *pdev,
133 struct armada_thermal_priv *priv)
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000134{
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200135 struct armada_thermal_data *data = priv->data;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100136 u32 reg;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000137
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200138 regmap_read(priv->syscon, data->syscon_control1_off, &reg);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000139 reg |= PMU_TDC0_OTF_CAL_MASK;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000140
141 /* Reference calibration value */
142 reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
143 reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000144
145 /* Reset the sensor */
Miquel Raynal931d3c52018-07-16 16:41:45 +0200146 reg |= PMU_TDC0_SW_RST_MASK;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000147
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200148 regmap_write(priv->syscon, data->syscon_control1_off, reg);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000149
150 /* Enable the sensor */
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200151 regmap_read(priv->syscon, data->syscon_status_off, &reg);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000152 reg &= ~PMU_TM_DISABLE_MASK;
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200153 regmap_write(priv->syscon, data->syscon_status_off, reg);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000154}
155
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200156static void armada370_init(struct platform_device *pdev,
157 struct armada_thermal_priv *priv)
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000158{
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200159 struct armada_thermal_data *data = priv->data;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100160 u32 reg;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000161
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200162 regmap_read(priv->syscon, data->syscon_control1_off, &reg);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000163 reg |= PMU_TDC0_OTF_CAL_MASK;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000164
165 /* Reference calibration value */
166 reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
167 reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000168
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200169 /* Reset the sensor */
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000170 reg &= ~PMU_TDC0_START_CAL_MASK;
Miquel Raynal931d3c52018-07-16 16:41:45 +0200171
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200172 regmap_write(priv->syscon, data->syscon_control1_off, reg);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000173
Baruch Siach7f3be012017-12-22 17:14:04 +0100174 msleep(10);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000175}
176
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200177static void armada375_init(struct platform_device *pdev,
178 struct armada_thermal_priv *priv)
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300179{
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200180 struct armada_thermal_data *data = priv->data;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100181 u32 reg;
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300182
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200183 regmap_read(priv->syscon, data->syscon_control1_off, &reg);
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300184 reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
185 reg &= ~A375_READOUT_INVERT;
186 reg &= ~A375_HW_RESETn;
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200187 regmap_write(priv->syscon, data->syscon_control1_off, reg);
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300188
Baruch Siach7f3be012017-12-22 17:14:04 +0100189 msleep(20);
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300190
191 reg |= A375_HW_RESETn;
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200192 regmap_write(priv->syscon, data->syscon_control1_off, reg);
193
Baruch Siach7f3be012017-12-22 17:14:04 +0100194 msleep(50);
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300195}
196
Miquel Raynalf7c20682018-07-16 16:41:52 +0200197static int armada_wait_sensor_validity(struct armada_thermal_priv *priv)
Miquel Raynal64163682017-12-22 17:14:12 +0100198{
199 u32 reg;
200
Miquel Raynalf7c20682018-07-16 16:41:52 +0200201 return regmap_read_poll_timeout(priv->syscon,
202 priv->data->syscon_status_off, reg,
203 reg & priv->data->is_valid_bit,
204 STATUS_POLL_PERIOD_US,
205 STATUS_POLL_TIMEOUT_US);
Miquel Raynal64163682017-12-22 17:14:12 +0100206}
207
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200208static void armada380_init(struct platform_device *pdev,
209 struct armada_thermal_priv *priv)
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300210{
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200211 struct armada_thermal_data *data = priv->data;
212 u32 reg;
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300213
Baruch Siachccf8f522017-12-22 17:14:09 +0100214 /* Disable the HW/SW reset */
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200215 regmap_read(priv->syscon, data->syscon_control1_off, &reg);
Baruch Siachccf8f522017-12-22 17:14:09 +0100216 reg |= CONTROL1_EXT_TSEN_HW_RESETn;
217 reg &= ~CONTROL1_EXT_TSEN_SW_RESET;
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200218 regmap_write(priv->syscon, data->syscon_control1_off, reg);
Miquel Raynal8c0b8882017-12-22 17:14:11 +0100219
220 /* Set Tsen Tc Trim to correct default value (errata #132698) */
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200221 regmap_read(priv->syscon, data->syscon_control0_off, &reg);
222 reg &= ~CONTROL0_TSEN_TC_TRIM_MASK;
223 reg |= CONTROL0_TSEN_TC_TRIM_VAL;
224 regmap_write(priv->syscon, data->syscon_control0_off, reg);
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300225}
226
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200227static void armada_ap806_init(struct platform_device *pdev,
228 struct armada_thermal_priv *priv)
Baruch Siach2ff12792017-12-22 17:14:08 +0100229{
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200230 struct armada_thermal_data *data = priv->data;
Baruch Siach2ff12792017-12-22 17:14:08 +0100231 u32 reg;
232
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200233 regmap_read(priv->syscon, data->syscon_control0_off, &reg);
Baruch Siach2ff12792017-12-22 17:14:08 +0100234 reg &= ~CONTROL0_TSEN_RESET;
235 reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE;
Miquel Raynala9fae792018-07-16 16:41:49 +0200236
237 /* Sample every ~2ms */
238 reg |= CONTROL0_TSEN_OSR_MAX << CONTROL0_TSEN_OSR_SHIFT;
239
240 /* Enable average (2 samples by default) */
241 reg &= ~CONTROL0_TSEN_AVG_BYPASS;
242
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200243 regmap_write(priv->syscon, data->syscon_control0_off, reg);
Baruch Siach2ff12792017-12-22 17:14:08 +0100244}
245
Miquel Raynal5b5e17a2018-07-16 16:41:48 +0200246static void armada_cp110_init(struct platform_device *pdev,
247 struct armada_thermal_priv *priv)
248{
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200249 struct armada_thermal_data *data = priv->data;
Miquel Raynala9fae792018-07-16 16:41:49 +0200250 u32 reg;
251
Miquel Raynal5b5e17a2018-07-16 16:41:48 +0200252 armada380_init(pdev, priv);
Miquel Raynala9fae792018-07-16 16:41:49 +0200253
254 /* Sample every ~2ms */
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200255 regmap_read(priv->syscon, data->syscon_control0_off, &reg);
Miquel Raynala9fae792018-07-16 16:41:49 +0200256 reg |= CONTROL0_TSEN_OSR_MAX << CONTROL0_TSEN_OSR_SHIFT;
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200257 regmap_write(priv->syscon, data->syscon_control0_off, reg);
Miquel Raynala9fae792018-07-16 16:41:49 +0200258
259 /* Average the output value over 2^1 = 2 samples */
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200260 regmap_read(priv->syscon, data->syscon_control1_off, &reg);
Miquel Raynala9fae792018-07-16 16:41:49 +0200261 reg &= ~CONTROL1_TSEN_AVG_MASK << CONTROL1_TSEN_AVG_SHIFT;
262 reg |= 1 << CONTROL1_TSEN_AVG_SHIFT;
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200263 regmap_write(priv->syscon, data->syscon_control1_off, reg);
Miquel Raynal5b5e17a2018-07-16 16:41:48 +0200264}
265
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000266static bool armada_is_valid(struct armada_thermal_priv *priv)
267{
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200268 u32 reg;
269
270 regmap_read(priv->syscon, priv->data->syscon_status_off, &reg);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000271
Miquel Raynal27d92f22017-12-22 17:14:05 +0100272 return reg & priv->data->is_valid_bit;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000273}
274
Miquel Raynalf7c20682018-07-16 16:41:52 +0200275/* There is currently no board with more than one sensor per channel */
276static int armada_select_channel(struct armada_thermal_priv *priv, int channel)
277{
278 struct armada_thermal_data *data = priv->data;
279 u32 ctrl0;
280
281 if (channel < 0 || channel > priv->data->cpu_nr)
282 return -EINVAL;
283
284 if (priv->current_channel == channel)
285 return 0;
286
287 /* Stop the measurements */
288 regmap_read(priv->syscon, data->syscon_control0_off, &ctrl0);
289 ctrl0 &= ~CONTROL0_TSEN_START;
290 regmap_write(priv->syscon, data->syscon_control0_off, ctrl0);
291
292 /* Reset the mode, internal sensor will be automatically selected */
293 ctrl0 &= ~(CONTROL0_TSEN_MODE_MASK << CONTROL0_TSEN_MODE_SHIFT);
294
295 /* Other channels are external and should be selected accordingly */
296 if (channel) {
297 /* Change the mode to external */
298 ctrl0 |= CONTROL0_TSEN_MODE_EXTERNAL <<
299 CONTROL0_TSEN_MODE_SHIFT;
300 /* Select the sensor */
301 ctrl0 &= ~(CONTROL0_TSEN_CHAN_MASK << CONTROL0_TSEN_CHAN_SHIFT);
302 ctrl0 |= (channel - 1) << CONTROL0_TSEN_CHAN_SHIFT;
303 }
304
305 /* Actually set the mode/channel */
306 regmap_write(priv->syscon, data->syscon_control0_off, ctrl0);
307 priv->current_channel = channel;
308
309 /* Re-start the measurements */
310 ctrl0 |= CONTROL0_TSEN_START;
311 regmap_write(priv->syscon, data->syscon_control0_off, ctrl0);
312
313 /*
314 * The IP has a latency of ~15ms, so after updating the selected source,
315 * we must absolutely wait for the sensor validity bit to ensure we read
316 * actual data.
317 */
318 if (armada_wait_sensor_validity(priv)) {
319 dev_err(priv->dev,
320 "Temperature sensor reading not valid\n");
321 return -EIO;
322 }
323
324 return 0;
325}
326
Miquel Raynalc9899c12018-07-16 16:41:51 +0200327static int armada_read_sensor(struct armada_thermal_priv *priv, int *temp)
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000328{
Baruch Siach2ff12792017-12-22 17:14:08 +0100329 u32 reg, div;
330 s64 sample, b, m;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000331
332 /* Valid check */
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300333 if (priv->data->is_valid && !priv->data->is_valid(priv)) {
Miquel Raynalc9899c12018-07-16 16:41:51 +0200334 dev_err(priv->dev,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000335 "Temperature sensor reading not valid\n");
336 return -EIO;
337 }
338
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200339 regmap_read(priv->syscon, priv->data->syscon_status_off, &reg);
Ezequiel Garcia1fcacca2014-05-06 13:59:47 -0300340 reg = (reg >> priv->data->temp_shift) & priv->data->temp_mask;
Baruch Siach2ff12792017-12-22 17:14:08 +0100341 if (priv->data->signed_sample)
342 /* The most significant bit is the sign bit */
343 sample = sign_extend32(reg, fls(priv->data->temp_mask) - 1);
344 else
345 sample = reg;
Ezequiel Garcia9484bc62014-05-06 13:59:46 -0300346
347 /* Get formula coeficients */
348 b = priv->data->coef_b;
349 m = priv->data->coef_m;
350 div = priv->data->coef_div;
351
Ezequiel Garciafd2c94d2014-05-06 13:59:49 -0300352 if (priv->data->inverted)
Baruch Siach2ff12792017-12-22 17:14:08 +0100353 *temp = div_s64((m * sample) - b, div);
Ezequiel Garciafd2c94d2014-05-06 13:59:49 -0300354 else
Baruch Siach2ff12792017-12-22 17:14:08 +0100355 *temp = div_s64(b - (m * sample), div);
356
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000357 return 0;
358}
359
Miquel Raynalc9899c12018-07-16 16:41:51 +0200360static int armada_get_temp_legacy(struct thermal_zone_device *thermal,
361 int *temp)
362{
363 struct armada_thermal_priv *priv = thermal->devdata;
364 int ret;
365
366 /* Do the actual reading */
367 ret = armada_read_sensor(priv, temp);
368
369 return ret;
370}
371
372static struct thermal_zone_device_ops legacy_ops = {
373 .get_temp = armada_get_temp_legacy,
374};
375
376static int armada_get_temp(void *_sensor, int *temp)
377{
378 struct armada_thermal_sensor *sensor = _sensor;
379 struct armada_thermal_priv *priv = sensor->priv;
Miquel Raynalf7c20682018-07-16 16:41:52 +0200380 int ret;
381
382 mutex_lock(&priv->update_lock);
383
384 /* Select the desired channel */
385 ret = armada_select_channel(priv, sensor->id);
386 if (ret)
387 goto unlock_mutex;
Miquel Raynalc9899c12018-07-16 16:41:51 +0200388
389 /* Do the actual reading */
Miquel Raynalf7c20682018-07-16 16:41:52 +0200390 ret = armada_read_sensor(priv, temp);
391
392unlock_mutex:
393 mutex_unlock(&priv->update_lock);
394
395 return ret;
Miquel Raynalc9899c12018-07-16 16:41:51 +0200396}
397
398static struct thermal_zone_of_device_ops of_ops = {
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000399 .get_temp = armada_get_temp,
400};
401
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300402static const struct armada_thermal_data armadaxp_data = {
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200403 .init = armadaxp_init,
Ezequiel Garcia1fcacca2014-05-06 13:59:47 -0300404 .temp_shift = 10,
405 .temp_mask = 0x1ff,
Baruch Siach2ff12792017-12-22 17:14:08 +0100406 .coef_b = 3153000000ULL,
407 .coef_m = 10000000ULL,
Ezequiel Garcia9484bc62014-05-06 13:59:46 -0300408 .coef_div = 13825,
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200409 .syscon_status_off = 0xb0,
410 .syscon_control1_off = 0xd0,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000411};
412
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300413static const struct armada_thermal_data armada370_data = {
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000414 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200415 .init = armada370_init,
Miquel Raynal27d92f22017-12-22 17:14:05 +0100416 .is_valid_bit = BIT(9),
Ezequiel Garcia1fcacca2014-05-06 13:59:47 -0300417 .temp_shift = 10,
418 .temp_mask = 0x1ff,
Baruch Siach2ff12792017-12-22 17:14:08 +0100419 .coef_b = 3153000000ULL,
420 .coef_m = 10000000ULL,
Ezequiel Garcia9484bc62014-05-06 13:59:46 -0300421 .coef_div = 13825,
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200422 .syscon_status_off = 0x0,
423 .syscon_control1_off = 0x4,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000424};
425
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300426static const struct armada_thermal_data armada375_data = {
427 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200428 .init = armada375_init,
Miquel Raynal27d92f22017-12-22 17:14:05 +0100429 .is_valid_bit = BIT(10),
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300430 .temp_shift = 0,
431 .temp_mask = 0x1ff,
Baruch Siach2ff12792017-12-22 17:14:08 +0100432 .coef_b = 3171900000ULL,
433 .coef_m = 10000000ULL,
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300434 .coef_div = 13616,
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200435 .syscon_status_off = 0x78,
436 .syscon_control0_off = 0x7c,
437 .syscon_control1_off = 0x80,
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300438};
439
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300440static const struct armada_thermal_data armada380_data = {
441 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200442 .init = armada380_init,
Miquel Raynal27d92f22017-12-22 17:14:05 +0100443 .is_valid_bit = BIT(10),
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300444 .temp_shift = 0,
445 .temp_mask = 0x3ff,
Baruch Siach2ff12792017-12-22 17:14:08 +0100446 .coef_b = 1172499100ULL,
447 .coef_m = 2000096ULL,
Nadav Haklaib56100d2015-08-06 18:03:49 +0200448 .coef_div = 4201,
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300449 .inverted = true,
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200450 .syscon_control0_off = 0x70,
451 .syscon_control1_off = 0x74,
452 .syscon_status_off = 0x78,
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300453};
454
Baruch Siach2ff12792017-12-22 17:14:08 +0100455static const struct armada_thermal_data armada_ap806_data = {
456 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200457 .init = armada_ap806_init,
Baruch Siach2ff12792017-12-22 17:14:08 +0100458 .is_valid_bit = BIT(16),
459 .temp_shift = 0,
460 .temp_mask = 0x3ff,
461 .coef_b = -150000LL,
462 .coef_m = 423ULL,
463 .coef_div = 1,
464 .inverted = true,
465 .signed_sample = true,
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200466 .syscon_control0_off = 0x84,
467 .syscon_control1_off = 0x88,
468 .syscon_status_off = 0x8C,
Miquel Raynalf7c20682018-07-16 16:41:52 +0200469 .cpu_nr = 4,
Baruch Siach2ff12792017-12-22 17:14:08 +0100470};
471
Baruch Siachccf8f522017-12-22 17:14:09 +0100472static const struct armada_thermal_data armada_cp110_data = {
473 .is_valid = armada_is_valid,
Miquel Raynal5b5e17a2018-07-16 16:41:48 +0200474 .init = armada_cp110_init,
Baruch Siachccf8f522017-12-22 17:14:09 +0100475 .is_valid_bit = BIT(10),
476 .temp_shift = 0,
477 .temp_mask = 0x3ff,
478 .coef_b = 1172499100ULL,
479 .coef_m = 2000096ULL,
480 .coef_div = 4201,
481 .inverted = true,
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200482 .syscon_control0_off = 0x70,
483 .syscon_control1_off = 0x74,
484 .syscon_status_off = 0x78,
Baruch Siachccf8f522017-12-22 17:14:09 +0100485};
486
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000487static const struct of_device_id armada_thermal_id_table[] = {
488 {
489 .compatible = "marvell,armadaxp-thermal",
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300490 .data = &armadaxp_data,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000491 },
492 {
493 .compatible = "marvell,armada370-thermal",
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300494 .data = &armada370_data,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000495 },
496 {
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300497 .compatible = "marvell,armada375-thermal",
498 .data = &armada375_data,
499 },
500 {
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300501 .compatible = "marvell,armada380-thermal",
502 .data = &armada380_data,
503 },
504 {
Baruch Siach2ff12792017-12-22 17:14:08 +0100505 .compatible = "marvell,armada-ap806-thermal",
506 .data = &armada_ap806_data,
507 },
508 {
Baruch Siachccf8f522017-12-22 17:14:09 +0100509 .compatible = "marvell,armada-cp110-thermal",
510 .data = &armada_cp110_data,
511 },
512 {
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000513 /* sentinel */
514 },
515};
516MODULE_DEVICE_TABLE(of, armada_thermal_id_table);
517
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200518static const struct regmap_config armada_thermal_regmap_config = {
519 .reg_bits = 32,
520 .reg_stride = 4,
521 .val_bits = 32,
522 .fast_io = true,
523};
524
525static int armada_thermal_probe_legacy(struct platform_device *pdev,
526 struct armada_thermal_priv *priv)
527{
528 struct armada_thermal_data *data = priv->data;
529 struct resource *res;
530 void __iomem *base;
531
532 /* First memory region points towards the status register */
533 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
534 if (IS_ERR(res))
535 return PTR_ERR(res);
536
537 /*
538 * Edit the resource start address and length to map over all the
539 * registers, instead of pointing at them one by one.
540 */
541 res->start -= data->syscon_status_off;
542 res->end = res->start + max(data->syscon_status_off,
543 max(data->syscon_control0_off,
544 data->syscon_control1_off)) +
545 sizeof(unsigned int) - 1;
546
547 base = devm_ioremap_resource(&pdev->dev, res);
548 if (IS_ERR(base))
549 return PTR_ERR(base);
550
551 priv->syscon = devm_regmap_init_mmio(&pdev->dev, base,
552 &armada_thermal_regmap_config);
553 if (IS_ERR(priv->syscon))
554 return PTR_ERR(priv->syscon);
555
556 return 0;
557}
558
559static int armada_thermal_probe_syscon(struct platform_device *pdev,
560 struct armada_thermal_priv *priv)
561{
562 priv->syscon = syscon_node_to_regmap(pdev->dev.parent->of_node);
563 if (IS_ERR(priv->syscon))
564 return PTR_ERR(priv->syscon);
565
566 return 0;
567}
568
Miquel Raynal8d987612018-07-16 16:41:44 +0200569static void armada_set_sane_name(struct platform_device *pdev,
570 struct armada_thermal_priv *priv)
571{
572 const char *name = dev_name(&pdev->dev);
573 char *insane_char;
574
575 if (strlen(name) > THERMAL_NAME_LENGTH) {
576 /*
577 * When inside a system controller, the device name has the
578 * form: f06f8000.system-controller:ap-thermal so stripping
579 * after the ':' should give us a shorter but meaningful name.
580 */
581 name = strrchr(name, ':');
582 if (!name)
583 name = "armada_thermal";
584 else
585 name++;
586 }
587
588 /* Save the name locally */
589 strncpy(priv->zone_name, name, THERMAL_NAME_LENGTH - 1);
590 priv->zone_name[THERMAL_NAME_LENGTH - 1] = '\0';
591
592 /* Then check there are no '-' or hwmon core will complain */
593 do {
594 insane_char = strpbrk(priv->zone_name, "-");
595 if (insane_char)
596 *insane_char = '_';
597 } while (insane_char);
598}
599
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000600static int armada_thermal_probe(struct platform_device *pdev)
601{
Miquel Raynalc9899c12018-07-16 16:41:51 +0200602 struct thermal_zone_device *tz;
Miquel Raynalf7c20682018-07-16 16:41:52 +0200603 struct armada_thermal_sensor *sensor;
Miquel Raynalc9899c12018-07-16 16:41:51 +0200604 struct armada_drvdata *drvdata;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000605 const struct of_device_id *match;
606 struct armada_thermal_priv *priv;
Miquel Raynalf7c20682018-07-16 16:41:52 +0200607 int sensor_id;
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200608 int ret;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000609
610 match = of_match_device(armada_thermal_id_table, &pdev->dev);
611 if (!match)
612 return -ENODEV;
613
614 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
615 if (!priv)
616 return -ENOMEM;
617
Miquel Raynalc9899c12018-07-16 16:41:51 +0200618 drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
619 if (!priv)
620 return -ENOMEM;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100621
Miquel Raynalc9899c12018-07-16 16:41:51 +0200622 priv->dev = &pdev->dev;
623 priv->data = (struct armada_thermal_data *)match->data;
Miquel Raynal8d987612018-07-16 16:41:44 +0200624
Miquel Raynalf7c20682018-07-16 16:41:52 +0200625 mutex_init(&priv->update_lock);
626
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100627 /*
628 * Legacy DT bindings only described "control1" register (also referred
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200629 * as "control MSB" on old documentation). Then, bindings moved to cover
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100630 * "control0/control LSB" and "control1/control MSB" registers within
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200631 * the same resource, which was then of size 8 instead of 4.
632 *
633 * The logic of defining sporadic registers is broken. For instance, it
634 * blocked the addition of the overheat interrupt feature that needed
635 * another resource somewhere else in the same memory area. One solution
636 * is to define an overall system controller and put the thermal node
637 * into it, which requires the use of regmaps across all the driver.
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100638 */
Miquel Raynalc9899c12018-07-16 16:41:51 +0200639 if (IS_ERR(syscon_node_to_regmap(pdev->dev.parent->of_node))) {
640 /* Ensure device name is correct for the thermal core */
641 armada_set_sane_name(pdev, priv);
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100642
Miquel Raynalc9899c12018-07-16 16:41:51 +0200643 ret = armada_thermal_probe_legacy(pdev, priv);
644 if (ret)
645 return ret;
646
647 priv->data->init(pdev, priv);
648
Miquel Raynal00707e42018-07-16 16:41:53 +0200649 /* Wait the sensors to be valid */
650 armada_wait_sensor_validity(priv);
651
Miquel Raynalc9899c12018-07-16 16:41:51 +0200652 tz = thermal_zone_device_register(priv->zone_name, 0, 0, priv,
653 &legacy_ops, NULL, 0, 0);
654 if (IS_ERR(tz)) {
655 dev_err(&pdev->dev,
656 "Failed to register thermal zone device\n");
657 return PTR_ERR(tz);
658 }
659
660 drvdata->type = LEGACY;
661 drvdata->data.tz = tz;
662 platform_set_drvdata(pdev, drvdata);
663
664 return 0;
665 }
666
667 ret = armada_thermal_probe_syscon(pdev, priv);
Miquel Raynal3d4e5182018-07-16 16:41:50 +0200668 if (ret)
669 return ret;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100670
Miquel Raynalf7c20682018-07-16 16:41:52 +0200671 priv->current_channel = -1;
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200672 priv->data->init(pdev, priv);
Miquel Raynalc9899c12018-07-16 16:41:51 +0200673 drvdata->type = SYSCON;
674 drvdata->data.priv = priv;
675 platform_set_drvdata(pdev, drvdata);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000676
Miquel Raynalf7c20682018-07-16 16:41:52 +0200677 /*
678 * There is one channel for the IC and one per CPU (if any), each
679 * channel has one sensor.
680 */
681 for (sensor_id = 0; sensor_id <= priv->data->cpu_nr; sensor_id++) {
682 sensor = devm_kzalloc(&pdev->dev,
683 sizeof(struct armada_thermal_sensor),
684 GFP_KERNEL);
685 if (!sensor)
686 return -ENOMEM;
Miquel Raynalc9899c12018-07-16 16:41:51 +0200687
Miquel Raynalf7c20682018-07-16 16:41:52 +0200688 /* Register the sensor */
689 sensor->priv = priv;
690 sensor->id = sensor_id;
691 tz = devm_thermal_zone_of_sensor_register(&pdev->dev,
692 sensor->id, sensor,
693 &of_ops);
694 if (IS_ERR(tz)) {
695 dev_info(&pdev->dev, "Thermal sensor %d unavailable\n",
696 sensor_id);
697 devm_kfree(&pdev->dev, sensor);
698 continue;
699 }
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000700 }
701
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000702 return 0;
703}
704
705static int armada_thermal_exit(struct platform_device *pdev)
706{
Miquel Raynalc9899c12018-07-16 16:41:51 +0200707 struct armada_drvdata *drvdata = platform_get_drvdata(pdev);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000708
Miquel Raynalc9899c12018-07-16 16:41:51 +0200709 if (drvdata->type == LEGACY)
710 thermal_zone_device_unregister(drvdata->data.tz);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000711
712 return 0;
713}
714
715static struct platform_driver armada_thermal_driver = {
716 .probe = armada_thermal_probe,
717 .remove = armada_thermal_exit,
718 .driver = {
719 .name = "armada_thermal",
Sachin Kamat1d089e02013-05-16 10:28:08 +0000720 .of_match_table = armada_thermal_id_table,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000721 },
722};
723
724module_platform_driver(armada_thermal_driver);
725
726MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>");
Miquel Raynala9d58a12017-12-22 17:14:10 +0100727MODULE_DESCRIPTION("Marvell EBU Armada SoCs thermal driver");
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000728MODULE_LICENSE("GPL v2");