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Lennert Buytenhek91da11f2008-10-07 13:44:02 +00001/*
2 * net/dsa/mv88e6123_61_65.c - Marvell 88e6123/6161/6165 switch chip support
Lennert Buytenheke84665c2009-03-20 09:52:09 +00003 * Copyright (c) 2008-2009 Marvell Semiconductor
Lennert Buytenhek91da11f2008-10-07 13:44:02 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
Barry Grussling19b2f972013-01-08 16:05:54 +000011#include <linux/delay.h>
12#include <linux/jiffies.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000013#include <linux/list.h>
Paul Gortmaker2bbba272012-01-24 10:41:40 +000014#include <linux/module.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000015#include <linux/netdevice.h>
16#include <linux/phy.h>
Ben Hutchingsc8f0b862011-11-27 17:06:08 +000017#include <net/dsa.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000018#include "mv88e6xxx.h"
19
Andrew Lunnca3dfa52016-03-12 00:01:36 +010020static const struct mv88e6xxx_switch_id mv88e6123_table[] = {
Vivien Didelotb9b37712015-10-30 19:39:48 -040021 { PORT_SWITCH_ID_6123, "Marvell 88E6123" },
22 { PORT_SWITCH_ID_6123_A1, "Marvell 88E6123 (A1)" },
23 { PORT_SWITCH_ID_6123_A2, "Marvell 88E6123 (A2)" },
24 { PORT_SWITCH_ID_6161, "Marvell 88E6161" },
25 { PORT_SWITCH_ID_6161_A1, "Marvell 88E6161 (A1)" },
26 { PORT_SWITCH_ID_6161_A2, "Marvell 88E6161 (A2)" },
27 { PORT_SWITCH_ID_6165, "Marvell 88E6165" },
28 { PORT_SWITCH_ID_6165_A1, "Marvell 88E6165 (A1)" },
29 { PORT_SWITCH_ID_6165_A2, "Marvell 88e6165 (A2)" },
30};
31
Vivien Didelot0209d142016-04-17 13:23:55 -040032static const char *mv88e6123_drv_probe(struct device *dsa_dev,
33 struct device *host_dev, int sw_addr,
34 void **priv)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000035{
Andrew Lunna77d43f2016-04-13 02:40:42 +020036 return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
37 mv88e6123_table,
38 ARRAY_SIZE(mv88e6123_table));
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000039}
40
Andrew Lunnca3dfa52016-03-12 00:01:36 +010041static int mv88e6123_setup_global(struct dsa_switch *ds)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000042{
Andrew Lunn15966a22015-05-06 01:09:49 +020043 u32 upstream_port = dsa_upstream_port(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000044 int ret;
Andrew Lunn15966a22015-05-06 01:09:49 +020045 u32 reg;
Andrew Lunn54d792f2015-05-06 01:09:47 +020046
47 ret = mv88e6xxx_setup_global(ds);
48 if (ret)
49 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000050
Barry Grussling3675c8d2013-01-08 16:05:53 +000051 /* Disable the PHY polling unit (since there won't be any
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000052 * external PHYs to poll), don't discard packets with
53 * excessive collisions, and mask all interrupt sources.
54 */
Andrew Lunn48ace4e2016-04-14 23:47:12 +020055 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL, 0x0000);
56 if (ret)
57 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000058
Barry Grussling3675c8d2013-01-08 16:05:53 +000059 /* Configure the upstream port, and configure the upstream
Lennert Buytenheke84665c2009-03-20 09:52:09 +000060 * port as the port to which ingress and egress monitor frames
61 * are to be sent.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000062 */
Andrew Lunn15966a22015-05-06 01:09:49 +020063 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
64 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
65 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
Andrew Lunn48ace4e2016-04-14 23:47:12 +020066 ret = mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
67 if (ret)
68 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000069
Barry Grussling3675c8d2013-01-08 16:05:53 +000070 /* Disable remote management for now, and set the switch's
Lennert Buytenheke84665c2009-03-20 09:52:09 +000071 * DSA device number.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000072 */
Andrew Lunn48ace4e2016-04-14 23:47:12 +020073 return mv88e6xxx_reg_write(ds, REG_GLOBAL, GLOBAL_CONTROL_2,
74 ds->index & 0x1f);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000075}
76
Andrew Lunnca3dfa52016-03-12 00:01:36 +010077static int mv88e6123_setup(struct dsa_switch *ds)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000078{
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020079 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000080 int ret;
81
Andrew Lunn7543a6d2016-04-13 02:40:40 +020082 ps->ds = ds;
83
Guenter Roeckacdaffc2015-03-26 18:36:28 -070084 ret = mv88e6xxx_setup_common(ds);
85 if (ret < 0)
86 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000087
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020088 switch (ps->id) {
Andrew Lunncca8b132015-04-02 04:06:39 +020089 case PORT_SWITCH_ID_6123:
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020090 ps->num_ports = 3;
91 break;
Andrew Lunncca8b132015-04-02 04:06:39 +020092 case PORT_SWITCH_ID_6161:
93 case PORT_SWITCH_ID_6165:
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020094 ps->num_ports = 6;
95 break;
96 default:
97 return -ENODEV;
98 }
99
Andrew Lunn143a8302015-04-02 04:06:34 +0200100 ret = mv88e6xxx_switch_reset(ds, false);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000101 if (ret < 0)
102 return ret;
103
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100104 ret = mv88e6123_setup_global(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000105 if (ret < 0)
106 return ret;
107
Andrew Lunndbde9e62015-05-06 01:09:48 +0200108 return mv88e6xxx_setup_ports(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000109}
110
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100111struct dsa_switch_driver mv88e6123_switch_driver = {
Florian Fainelliac7a04c2014-09-11 21:18:09 -0700112 .tag_protocol = DSA_TAG_PROTO_EDSA,
Andrew Lunne49bad32016-04-13 02:40:43 +0200113 .probe = mv88e6123_drv_probe,
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100114 .setup = mv88e6123_setup,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000115 .set_addr = mv88e6xxx_set_addr_indirect,
Andrew Lunnfd3a0ee2015-04-02 04:06:36 +0200116 .phy_read = mv88e6xxx_phy_read,
117 .phy_write = mv88e6xxx_phy_write,
Andrew Lunne413e7e2015-04-02 04:06:38 +0200118 .get_strings = mv88e6xxx_get_strings,
119 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
120 .get_sset_count = mv88e6xxx_get_sset_count,
Andrew Lunndea87022015-08-31 15:56:47 +0200121 .adjust_link = mv88e6xxx_adjust_link,
Guenter Roeck87e5f662014-10-29 10:45:00 -0700122#ifdef CONFIG_NET_DSA_HWMON
Andrew Lunneaa23762014-11-15 22:24:51 +0100123 .get_temp = mv88e6xxx_get_temp,
Guenter Roeck87e5f662014-10-29 10:45:00 -0700124#endif
Guenter Roecka1ab91f2014-10-29 10:45:05 -0700125 .get_regs_len = mv88e6xxx_get_regs_len,
126 .get_regs = mv88e6xxx_get_regs,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000127};
Ben Hutchings3d825ed2011-11-25 14:37:16 +0000128
129MODULE_ALIAS("platform:mv88e6123");
130MODULE_ALIAS("platform:mv88e6161");
131MODULE_ALIAS("platform:mv88e6165");