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Lennert Buytenhek91da11f2008-10-07 13:44:02 +00001/*
2 * net/dsa/mv88e6123_61_65.c - Marvell 88e6123/6161/6165 switch chip support
Lennert Buytenheke84665c2009-03-20 09:52:09 +00003 * Copyright (c) 2008-2009 Marvell Semiconductor
Lennert Buytenhek91da11f2008-10-07 13:44:02 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
Barry Grussling19b2f972013-01-08 16:05:54 +000011#include <linux/delay.h>
12#include <linux/jiffies.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000013#include <linux/list.h>
Paul Gortmaker2bbba272012-01-24 10:41:40 +000014#include <linux/module.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000015#include <linux/netdevice.h>
16#include <linux/phy.h>
Ben Hutchingsc8f0b862011-11-27 17:06:08 +000017#include <net/dsa.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000018#include "mv88e6xxx.h"
19
Andrew Lunnca3dfa52016-03-12 00:01:36 +010020static const struct mv88e6xxx_switch_id mv88e6123_table[] = {
Vivien Didelotb9b37712015-10-30 19:39:48 -040021 { PORT_SWITCH_ID_6123, "Marvell 88E6123" },
22 { PORT_SWITCH_ID_6123_A1, "Marvell 88E6123 (A1)" },
23 { PORT_SWITCH_ID_6123_A2, "Marvell 88E6123 (A2)" },
24 { PORT_SWITCH_ID_6161, "Marvell 88E6161" },
25 { PORT_SWITCH_ID_6161_A1, "Marvell 88E6161 (A1)" },
26 { PORT_SWITCH_ID_6161_A2, "Marvell 88E6161 (A2)" },
27 { PORT_SWITCH_ID_6165, "Marvell 88E6165" },
28 { PORT_SWITCH_ID_6165_A1, "Marvell 88E6165 (A1)" },
29 { PORT_SWITCH_ID_6165_A2, "Marvell 88e6165 (A2)" },
30};
31
Andrew Lunnbbb8d792016-04-13 02:40:39 +020032static char *mv88e6123_probe(struct device *dsa_dev, struct device *host_dev,
Andrew Lunn7543a6d2016-04-13 02:40:40 +020033 int sw_addr, void **priv)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000034{
Andrew Lunn7543a6d2016-04-13 02:40:40 +020035 struct mv88e6xxx_priv_state *ps;
36 char *name;
37
38 name = mv88e6xxx_lookup_name(host_dev, sw_addr, mv88e6123_table,
Andrew Lunnca3dfa52016-03-12 00:01:36 +010039 ARRAY_SIZE(mv88e6123_table));
Andrew Lunn7543a6d2016-04-13 02:40:40 +020040 if (name) {
41 ps = devm_kzalloc(dsa_dev, sizeof(*ps), GFP_KERNEL);
42 if (!ps)
43 return NULL;
44 *priv = ps;
45 }
46 return name;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000047}
48
Andrew Lunnca3dfa52016-03-12 00:01:36 +010049static int mv88e6123_setup_global(struct dsa_switch *ds)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000050{
Andrew Lunn15966a22015-05-06 01:09:49 +020051 u32 upstream_port = dsa_upstream_port(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000052 int ret;
Andrew Lunn15966a22015-05-06 01:09:49 +020053 u32 reg;
Andrew Lunn54d792f2015-05-06 01:09:47 +020054
55 ret = mv88e6xxx_setup_global(ds);
56 if (ret)
57 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000058
Barry Grussling3675c8d2013-01-08 16:05:53 +000059 /* Disable the PHY polling unit (since there won't be any
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000060 * external PHYs to poll), don't discard packets with
61 * excessive collisions, and mask all interrupt sources.
62 */
Andrew Lunn15966a22015-05-06 01:09:49 +020063 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, 0x0000);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000064
Barry Grussling3675c8d2013-01-08 16:05:53 +000065 /* Configure the upstream port, and configure the upstream
Lennert Buytenheke84665c2009-03-20 09:52:09 +000066 * port as the port to which ingress and egress monitor frames
67 * are to be sent.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000068 */
Andrew Lunn15966a22015-05-06 01:09:49 +020069 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
70 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
71 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
72 REG_WRITE(REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000073
Barry Grussling3675c8d2013-01-08 16:05:53 +000074 /* Disable remote management for now, and set the switch's
Lennert Buytenheke84665c2009-03-20 09:52:09 +000075 * DSA device number.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000076 */
Andrew Lunn15966a22015-05-06 01:09:49 +020077 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL_2, ds->index & 0x1f);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000078
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000079 return 0;
80}
81
Andrew Lunnca3dfa52016-03-12 00:01:36 +010082static int mv88e6123_setup(struct dsa_switch *ds)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000083{
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020084 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000085 int ret;
86
Andrew Lunn7543a6d2016-04-13 02:40:40 +020087 ps->ds = ds;
88
Guenter Roeckacdaffc2015-03-26 18:36:28 -070089 ret = mv88e6xxx_setup_common(ds);
90 if (ret < 0)
91 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000092
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020093 switch (ps->id) {
Andrew Lunncca8b132015-04-02 04:06:39 +020094 case PORT_SWITCH_ID_6123:
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020095 ps->num_ports = 3;
96 break;
Andrew Lunncca8b132015-04-02 04:06:39 +020097 case PORT_SWITCH_ID_6161:
98 case PORT_SWITCH_ID_6165:
Guenter Roeck14ef6ad2015-04-02 04:06:32 +020099 ps->num_ports = 6;
100 break;
101 default:
102 return -ENODEV;
103 }
104
Andrew Lunn143a8302015-04-02 04:06:34 +0200105 ret = mv88e6xxx_switch_reset(ds, false);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000106 if (ret < 0)
107 return ret;
108
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100109 ret = mv88e6123_setup_global(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000110 if (ret < 0)
111 return ret;
112
Andrew Lunndbde9e62015-05-06 01:09:48 +0200113 return mv88e6xxx_setup_ports(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000114}
115
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100116struct dsa_switch_driver mv88e6123_switch_driver = {
Florian Fainelliac7a04c2014-09-11 21:18:09 -0700117 .tag_protocol = DSA_TAG_PROTO_EDSA,
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100118 .probe = mv88e6123_probe,
119 .setup = mv88e6123_setup,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000120 .set_addr = mv88e6xxx_set_addr_indirect,
Andrew Lunnfd3a0ee2015-04-02 04:06:36 +0200121 .phy_read = mv88e6xxx_phy_read,
122 .phy_write = mv88e6xxx_phy_write,
Andrew Lunne413e7e2015-04-02 04:06:38 +0200123 .get_strings = mv88e6xxx_get_strings,
124 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
125 .get_sset_count = mv88e6xxx_get_sset_count,
Andrew Lunndea87022015-08-31 15:56:47 +0200126 .adjust_link = mv88e6xxx_adjust_link,
Guenter Roeck87e5f662014-10-29 10:45:00 -0700127#ifdef CONFIG_NET_DSA_HWMON
Andrew Lunneaa23762014-11-15 22:24:51 +0100128 .get_temp = mv88e6xxx_get_temp,
Guenter Roeck87e5f662014-10-29 10:45:00 -0700129#endif
Guenter Roecka1ab91f2014-10-29 10:45:05 -0700130 .get_regs_len = mv88e6xxx_get_regs_len,
131 .get_regs = mv88e6xxx_get_regs,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000132};
Ben Hutchings3d825ed2011-11-25 14:37:16 +0000133
134MODULE_ALIAS("platform:mv88e6123");
135MODULE_ALIAS("platform:mv88e6161");
136MODULE_ALIAS("platform:mv88e6165");