blob: 8bb75eaf12d6c9a2b48b3f821fea34c86ab86317 [file] [log] [blame]
oulijun9a443532016-07-21 19:06:38 +08001/*
2 * Copyright (c) 2016 Hisilicon Limited.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
Salil528f1de2016-08-24 04:44:50 +080033#include <linux/acpi.h>
oulijun9a443532016-07-21 19:06:38 +080034#include <linux/of_platform.h>
Arnd Bergmann3ecc16c2017-02-17 15:38:26 +010035#include <linux/module.h>
oulijun9a443532016-07-21 19:06:38 +080036#include <rdma/ib_addr.h>
37#include <rdma/ib_smi.h>
38#include <rdma/ib_user_verbs.h>
Shaobo Xu82547462016-11-23 19:41:08 +000039#include <rdma/ib_cache.h>
oulijun9a443532016-07-21 19:06:38 +080040#include "hns_roce_common.h"
41#include "hns_roce_device.h"
Leon Romanovsky4d409952016-10-19 20:13:07 +030042#include <rdma/hns-abi.h>
oulijun9a443532016-07-21 19:06:38 +080043#include "hns_roce_hem.h"
44
45/**
oulijun9a443532016-07-21 19:06:38 +080046 * hns_get_gid_index - Get gid index.
47 * @hr_dev: pointer to structure hns_roce_dev.
48 * @port: port, value range: 0 ~ MAX
49 * @gid_index: gid_index, value range: 0 ~ MAX
50 * Description:
51 * N ports shared gids, allocation method as follow:
52 * GID[0][0], GID[1][0],.....GID[N - 1][0],
53 * GID[0][0], GID[1][0],.....GID[N - 1][0],
54 * And so on
55 */
56int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)
57{
58 return gid_index * hr_dev->caps.num_ports + port;
59}
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +080060EXPORT_SYMBOL_GPL(hns_get_gid_index);
oulijun9a443532016-07-21 19:06:38 +080061
Wei Hu(Xavier)a74dc412017-09-29 23:10:09 +080062static int hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr)
oulijun9a443532016-07-21 19:06:38 +080063{
64 u8 phy_port;
65 u32 i = 0;
66
67 if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM))
Wei Hu(Xavier)a74dc412017-09-29 23:10:09 +080068 return 0;
oulijun9a443532016-07-21 19:06:38 +080069
70 for (i = 0; i < MAC_ADDR_OCTET_NUM; i++)
71 hr_dev->dev_addr[port][i] = addr[i];
72
73 phy_port = hr_dev->iboe.phy_port[port];
Wei Hu(Xavier)a74dc412017-09-29 23:10:09 +080074 return hr_dev->hw->set_mac(hr_dev, phy_port, addr);
oulijun9a443532016-07-21 19:06:38 +080075}
76
Shaobo Xu82547462016-11-23 19:41:08 +000077static int hns_roce_add_gid(struct ib_device *device, u8 port_num,
78 unsigned int index, const union ib_gid *gid,
79 const struct ib_gid_attr *attr, void **context)
oulijun9a443532016-07-21 19:06:38 +080080{
Shaobo Xu82547462016-11-23 19:41:08 +000081 struct hns_roce_dev *hr_dev = to_hr_dev(device);
82 u8 port = port_num - 1;
83 unsigned long flags;
oulijun9a443532016-07-21 19:06:38 +080084
Shaobo Xu82547462016-11-23 19:41:08 +000085 if (port >= hr_dev->caps.num_ports)
86 return -EINVAL;
87
88 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
89
90 hr_dev->hw->set_gid(hr_dev, port, index, (union ib_gid *)gid);
91
92 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
93
94 return 0;
95}
96
97static int hns_roce_del_gid(struct ib_device *device, u8 port_num,
98 unsigned int index, void **context)
99{
100 struct hns_roce_dev *hr_dev = to_hr_dev(device);
101 union ib_gid zgid = { {0} };
102 u8 port = port_num - 1;
103 unsigned long flags;
104
105 if (port >= hr_dev->caps.num_ports)
106 return -EINVAL;
107
108 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
109
110 hr_dev->hw->set_gid(hr_dev, port, index, &zgid);
111
112 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
113
114 return 0;
oulijun9a443532016-07-21 19:06:38 +0800115}
116
117static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port,
118 unsigned long event)
119{
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800120 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800121 struct net_device *netdev;
Wei Hu(Xavier)a74dc412017-09-29 23:10:09 +0800122 int ret = 0;
oulijun9a443532016-07-21 19:06:38 +0800123
124 netdev = hr_dev->iboe.netdevs[port];
125 if (!netdev) {
126 dev_err(dev, "port(%d) can't find netdev\n", port);
127 return -ENODEV;
128 }
129
oulijun9a443532016-07-21 19:06:38 +0800130 switch (event) {
131 case NETDEV_UP:
132 case NETDEV_CHANGE:
133 case NETDEV_REGISTER:
134 case NETDEV_CHANGEADDR:
Wei Hu(Xavier)a74dc412017-09-29 23:10:09 +0800135 ret = hns_roce_set_mac(hr_dev, port, netdev->dev_addr);
oulijun9a443532016-07-21 19:06:38 +0800136 break;
137 case NETDEV_DOWN:
138 /*
Salile84e40be2016-11-23 19:41:09 +0000139 * In v1 engine, only support all ports closed together.
140 */
oulijun9a443532016-07-21 19:06:38 +0800141 break;
142 default:
143 dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event));
144 break;
145 }
146
Wei Hu(Xavier)a74dc412017-09-29 23:10:09 +0800147 return ret;
oulijun9a443532016-07-21 19:06:38 +0800148}
149
150static int hns_roce_netdev_event(struct notifier_block *self,
151 unsigned long event, void *ptr)
152{
153 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
154 struct hns_roce_ib_iboe *iboe = NULL;
155 struct hns_roce_dev *hr_dev = NULL;
156 u8 port = 0;
157 int ret = 0;
158
159 hr_dev = container_of(self, struct hns_roce_dev, iboe.nb);
160 iboe = &hr_dev->iboe;
161
162 for (port = 0; port < hr_dev->caps.num_ports; port++) {
163 if (dev == iboe->netdevs[port]) {
164 ret = handle_en_event(hr_dev, port, event);
165 if (ret)
166 return NOTIFY_DONE;
167 break;
168 }
169 }
170
171 return NOTIFY_DONE;
172}
173
Shaobo Xu82547462016-11-23 19:41:08 +0000174static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev)
oulijun9a443532016-07-21 19:06:38 +0800175{
Wei Hu(Xavier)a74dc412017-09-29 23:10:09 +0800176 int ret;
Shaobo Xu82547462016-11-23 19:41:08 +0000177 u8 i;
oulijun9a443532016-07-21 19:06:38 +0800178
179 for (i = 0; i < hr_dev->caps.num_ports; i++) {
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800180 if (hr_dev->hw->set_mtu)
181 hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i],
182 hr_dev->caps.max_mtu);
Wei Hu(Xavier)a74dc412017-09-29 23:10:09 +0800183 ret = hns_roce_set_mac(hr_dev, i,
184 hr_dev->iboe.netdevs[i]->dev_addr);
185 if (ret)
186 return ret;
oulijun9a443532016-07-21 19:06:38 +0800187 }
188
Shaobo Xu82547462016-11-23 19:41:08 +0000189 return 0;
oulijun9a443532016-07-21 19:06:38 +0800190}
191
192static int hns_roce_query_device(struct ib_device *ib_dev,
193 struct ib_device_attr *props,
194 struct ib_udata *uhw)
195{
196 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
197
198 memset(props, 0, sizeof(*props));
199
200 props->sys_image_guid = hr_dev->sys_image_guid;
201 props->max_mr_size = (u64)(~(0ULL));
202 props->page_size_cap = hr_dev->caps.page_size_cap;
203 props->vendor_id = hr_dev->vendor_id;
204 props->vendor_part_id = hr_dev->vendor_part_id;
205 props->hw_ver = hr_dev->hw_rev;
206 props->max_qp = hr_dev->caps.num_qps;
207 props->max_qp_wr = hr_dev->caps.max_wqes;
208 props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT |
Lijun Oua74aab62016-09-15 23:48:08 +0100209 IB_DEVICE_RC_RNR_NAK_GEN;
Wei Hu(Xavier)cfc85f32017-08-30 17:23:04 +0800210 props->max_sge = max(hr_dev->caps.max_sq_sg, hr_dev->caps.max_rq_sg);
oulijun9a443532016-07-21 19:06:38 +0800211 props->max_sge_rd = 1;
212 props->max_cq = hr_dev->caps.num_cqs;
213 props->max_cqe = hr_dev->caps.max_cqes;
214 props->max_mr = hr_dev->caps.num_mtpts;
215 props->max_pd = hr_dev->caps.num_pds;
216 props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma;
217 props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma;
218 props->atomic_cap = IB_ATOMIC_NONE;
219 props->max_pkeys = 1;
220 props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay;
221
222 return 0;
223}
224
Lijun Ou2eefca22016-09-15 23:48:06 +0100225static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev,
226 u8 port_num)
227{
228 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
229 struct net_device *ndev;
230
231 if (port_num < 1 || port_num > hr_dev->caps.num_ports)
232 return NULL;
233
234 rcu_read_lock();
235
236 ndev = hr_dev->iboe.netdevs[port_num - 1];
237 if (ndev)
238 dev_hold(ndev);
239
240 rcu_read_unlock();
241 return ndev;
242}
243
oulijun9a443532016-07-21 19:06:38 +0800244static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num,
245 struct ib_port_attr *props)
246{
247 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800248 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800249 struct net_device *net_dev;
250 unsigned long flags;
251 enum ib_mtu mtu;
252 u8 port;
253
254 assert(port_num > 0);
255 port = port_num - 1;
256
Or Gerlitzc4550c62017-01-24 13:02:39 +0200257 /* props being zeroed by the caller, avoid zeroing it here */
oulijun9a443532016-07-21 19:06:38 +0800258
259 props->max_mtu = hr_dev->caps.max_mtu;
260 props->gid_tbl_len = hr_dev->caps.gid_table_len[port];
261 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
262 IB_PORT_VENDOR_CLASS_SUP |
263 IB_PORT_BOOT_MGMT_SUP;
264 props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN;
265 props->pkey_tbl_len = 1;
266 props->active_width = IB_WIDTH_4X;
267 props->active_speed = 1;
268
269 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
270
271 net_dev = hr_dev->iboe.netdevs[port];
272 if (!net_dev) {
273 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
274 dev_err(dev, "find netdev %d failed!\r\n", port);
275 return -EINVAL;
276 }
277
278 mtu = iboe_get_mtu(net_dev->mtu);
279 props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256;
280 props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ?
281 IB_PORT_ACTIVE : IB_PORT_DOWN;
282 props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3;
283
284 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
285
286 return 0;
287}
288
289static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device,
290 u8 port_num)
291{
292 return IB_LINK_LAYER_ETHERNET;
293}
294
295static int hns_roce_query_gid(struct ib_device *ib_dev, u8 port_num, int index,
296 union ib_gid *gid)
297{
oulijun9a443532016-07-21 19:06:38 +0800298 return 0;
299}
300
301static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index,
302 u16 *pkey)
303{
304 *pkey = PKEY_ID;
305
306 return 0;
307}
308
309static int hns_roce_modify_device(struct ib_device *ib_dev, int mask,
310 struct ib_device_modify *props)
311{
312 unsigned long flags;
313
314 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
315 return -EOPNOTSUPP;
316
317 if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
318 spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags);
319 memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE);
320 spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags);
321 }
322
323 return 0;
324}
325
326static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask,
327 struct ib_port_modify *props)
328{
329 return 0;
330}
331
332static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev,
333 struct ib_udata *udata)
334{
335 int ret = 0;
336 struct hns_roce_ucontext *context;
337 struct hns_roce_ib_alloc_ucontext_resp resp;
338 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
339
340 resp.qp_tab_size = hr_dev->caps.num_qps;
341
342 context = kmalloc(sizeof(*context), GFP_KERNEL);
343 if (!context)
344 return ERR_PTR(-ENOMEM);
345
346 ret = hns_roce_uar_alloc(hr_dev, &context->uar);
347 if (ret)
348 goto error_fail_uar_alloc;
349
350 ret = ib_copy_to_udata(udata, &resp, sizeof(resp));
351 if (ret)
352 goto error_fail_copy_to_udata;
353
354 return &context->ibucontext;
355
356error_fail_copy_to_udata:
357 hns_roce_uar_free(hr_dev, &context->uar);
358
359error_fail_uar_alloc:
360 kfree(context);
361
362 return ERR_PTR(ret);
363}
364
365static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext)
366{
367 struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext);
368
369 hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar);
370 kfree(context);
371
372 return 0;
373}
374
375static int hns_roce_mmap(struct ib_ucontext *context,
376 struct vm_area_struct *vma)
377{
Wei Hu (Xavier)8f3e9f32016-11-23 19:41:00 +0000378 struct hns_roce_dev *hr_dev = to_hr_dev(context->device);
379
oulijun9a443532016-07-21 19:06:38 +0800380 if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0)
381 return -EINVAL;
382
383 if (vma->vm_pgoff == 0) {
384 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
385 if (io_remap_pfn_range(vma, vma->vm_start,
386 to_hr_ucontext(context)->uar.pfn,
387 PAGE_SIZE, vma->vm_page_prot))
388 return -EAGAIN;
Wei Hu(Xavier)5caad672017-08-30 17:23:17 +0800389 } else if (vma->vm_pgoff == 1 && hr_dev->tptr_dma_addr &&
390 hr_dev->tptr_size) {
Wei Hu (Xavier)8f3e9f32016-11-23 19:41:00 +0000391 /* vm_pgoff: 1 -- TPTR */
392 if (io_remap_pfn_range(vma, vma->vm_start,
393 hr_dev->tptr_dma_addr >> PAGE_SHIFT,
394 hr_dev->tptr_size,
395 vma->vm_page_prot))
396 return -EAGAIN;
397 } else
oulijun9a443532016-07-21 19:06:38 +0800398 return -EINVAL;
oulijun9a443532016-07-21 19:06:38 +0800399
400 return 0;
401}
402
403static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num,
404 struct ib_port_immutable *immutable)
405{
406 struct ib_port_attr attr;
407 int ret;
408
Or Gerlitzc4550c62017-01-24 13:02:39 +0200409 ret = ib_query_port(ib_dev, port_num, &attr);
oulijun9a443532016-07-21 19:06:38 +0800410 if (ret)
411 return ret;
412
413 immutable->pkey_tbl_len = attr.pkey_tbl_len;
414 immutable->gid_tbl_len = attr.gid_tbl_len;
415
oulijun9a443532016-07-21 19:06:38 +0800416 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
Wei Hu(Xavier)023c1472017-10-26 17:10:24 +0800417 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
418 if (to_hr_dev(ib_dev)->caps.flags & HNS_ROCE_CAP_FLAG_ROCE_V1_V2)
419 immutable->core_cap_flags |= RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
oulijun9a443532016-07-21 19:06:38 +0800420
421 return 0;
422}
423
424static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev)
425{
426 struct hns_roce_ib_iboe *iboe = &hr_dev->iboe;
427
oulijun9a443532016-07-21 19:06:38 +0800428 unregister_netdevice_notifier(&iboe->nb);
429 ib_unregister_device(&hr_dev->ib_dev);
430}
431
432static int hns_roce_register_device(struct hns_roce_dev *hr_dev)
433{
434 int ret;
435 struct hns_roce_ib_iboe *iboe = NULL;
436 struct ib_device *ib_dev = NULL;
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800437 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800438
439 iboe = &hr_dev->iboe;
Lijun Ou49fdf6b2016-09-20 17:07:02 +0100440 spin_lock_init(&iboe->lock);
oulijun9a443532016-07-21 19:06:38 +0800441
442 ib_dev = &hr_dev->ib_dev;
Lijun Ou3b5184b2016-11-29 23:10:30 +0000443 strlcpy(ib_dev->name, "hns_%d", IB_DEVICE_NAME_MAX);
oulijun9a443532016-07-21 19:06:38 +0800444
445 ib_dev->owner = THIS_MODULE;
446 ib_dev->node_type = RDMA_NODE_IB_CA;
Bart Van Asschefecd02e2017-01-20 13:04:18 -0800447 ib_dev->dev.parent = dev;
oulijun9a443532016-07-21 19:06:38 +0800448
449 ib_dev->phys_port_cnt = hr_dev->caps.num_ports;
450 ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey;
451 ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors;
452 ib_dev->uverbs_abi_ver = 1;
453 ib_dev->uverbs_cmd_mask =
454 (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) |
455 (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) |
456 (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) |
457 (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) |
458 (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) |
459 (1ULL << IB_USER_VERBS_CMD_REG_MR) |
460 (1ULL << IB_USER_VERBS_CMD_DEREG_MR) |
461 (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
462 (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) |
463 (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) |
464 (1ULL << IB_USER_VERBS_CMD_CREATE_QP) |
465 (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) |
466 (1ULL << IB_USER_VERBS_CMD_QUERY_QP) |
467 (1ULL << IB_USER_VERBS_CMD_DESTROY_QP);
468
469 /* HCA||device||port */
470 ib_dev->modify_device = hns_roce_modify_device;
471 ib_dev->query_device = hns_roce_query_device;
472 ib_dev->query_port = hns_roce_query_port;
473 ib_dev->modify_port = hns_roce_modify_port;
474 ib_dev->get_link_layer = hns_roce_get_link_layer;
Lijun Ou2eefca22016-09-15 23:48:06 +0100475 ib_dev->get_netdev = hns_roce_get_netdev;
oulijun9a443532016-07-21 19:06:38 +0800476 ib_dev->query_gid = hns_roce_query_gid;
Shaobo Xu82547462016-11-23 19:41:08 +0000477 ib_dev->add_gid = hns_roce_add_gid;
478 ib_dev->del_gid = hns_roce_del_gid;
oulijun9a443532016-07-21 19:06:38 +0800479 ib_dev->query_pkey = hns_roce_query_pkey;
480 ib_dev->alloc_ucontext = hns_roce_alloc_ucontext;
481 ib_dev->dealloc_ucontext = hns_roce_dealloc_ucontext;
482 ib_dev->mmap = hns_roce_mmap;
483
484 /* PD */
485 ib_dev->alloc_pd = hns_roce_alloc_pd;
486 ib_dev->dealloc_pd = hns_roce_dealloc_pd;
487
488 /* AH */
489 ib_dev->create_ah = hns_roce_create_ah;
490 ib_dev->query_ah = hns_roce_query_ah;
491 ib_dev->destroy_ah = hns_roce_destroy_ah;
492
493 /* QP */
494 ib_dev->create_qp = hns_roce_create_qp;
495 ib_dev->modify_qp = hns_roce_modify_qp;
496 ib_dev->query_qp = hr_dev->hw->query_qp;
497 ib_dev->destroy_qp = hr_dev->hw->destroy_qp;
498 ib_dev->post_send = hr_dev->hw->post_send;
499 ib_dev->post_recv = hr_dev->hw->post_recv;
500
501 /* CQ */
502 ib_dev->create_cq = hns_roce_ib_create_cq;
oulijunb1562692017-10-19 11:52:40 +0800503 ib_dev->modify_cq = hr_dev->hw->modify_cq;
oulijun9a443532016-07-21 19:06:38 +0800504 ib_dev->destroy_cq = hns_roce_ib_destroy_cq;
505 ib_dev->req_notify_cq = hr_dev->hw->req_notify_cq;
506 ib_dev->poll_cq = hr_dev->hw->poll_cq;
507
508 /* MR */
509 ib_dev->get_dma_mr = hns_roce_get_dma_mr;
510 ib_dev->reg_user_mr = hns_roce_reg_user_mr;
511 ib_dev->dereg_mr = hns_roce_dereg_mr;
Wei Hu(Xavier)a2c80b72017-10-26 17:10:23 +0800512 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_REREG_MR) {
513 ib_dev->rereg_user_mr = hns_roce_rereg_user_mr;
514 ib_dev->uverbs_cmd_mask |= (1ULL << IB_USER_VERBS_CMD_REREG_MR);
515 }
oulijun9a443532016-07-21 19:06:38 +0800516
517 /* OTHERS */
518 ib_dev->get_port_immutable = hns_roce_port_immutable;
519
520 ret = ib_register_device(ib_dev, NULL);
521 if (ret) {
522 dev_err(dev, "ib_register_device failed!\n");
523 return ret;
524 }
525
Shaobo Xu82547462016-11-23 19:41:08 +0000526 ret = hns_roce_setup_mtu_mac(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800527 if (ret) {
Shaobo Xu82547462016-11-23 19:41:08 +0000528 dev_err(dev, "setup_mtu_mac failed!\n");
529 goto error_failed_setup_mtu_mac;
oulijun9a443532016-07-21 19:06:38 +0800530 }
531
oulijun9a443532016-07-21 19:06:38 +0800532 iboe->nb.notifier_call = hns_roce_netdev_event;
533 ret = register_netdevice_notifier(&iboe->nb);
534 if (ret) {
535 dev_err(dev, "register_netdevice_notifier failed!\n");
Shaobo Xu82547462016-11-23 19:41:08 +0000536 goto error_failed_setup_mtu_mac;
oulijun9a443532016-07-21 19:06:38 +0800537 }
538
539 return 0;
540
Shaobo Xu82547462016-11-23 19:41:08 +0000541error_failed_setup_mtu_mac:
oulijun9a443532016-07-21 19:06:38 +0800542 ib_unregister_device(ib_dev);
543
544 return ret;
545}
546
oulijun9a443532016-07-21 19:06:38 +0800547static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
548{
549 int ret;
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800550 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800551
552 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table,
553 HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz,
554 hr_dev->caps.num_mtt_segs, 1);
555 if (ret) {
556 dev_err(dev, "Failed to init MTT context memory, aborting.\n");
557 return ret;
558 }
559
Shaobo Xu9766edc2017-08-30 17:23:09 +0800560 if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE)) {
561 ret = hns_roce_init_hem_table(hr_dev,
562 &hr_dev->mr_table.mtt_cqe_table,
563 HEM_TYPE_CQE, hr_dev->caps.mtt_entry_sz,
564 hr_dev->caps.num_cqe_segs, 1);
565 if (ret) {
566 dev_err(dev, "Failed to init MTT CQE context memory, aborting.\n");
567 goto err_unmap_cqe;
568 }
569 }
570
oulijun9a443532016-07-21 19:06:38 +0800571 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,
572 HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,
573 hr_dev->caps.num_mtpts, 1);
574 if (ret) {
575 dev_err(dev, "Failed to init MTPT context memory, aborting.\n");
576 goto err_unmap_mtt;
577 }
578
579 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table,
580 HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz,
581 hr_dev->caps.num_qps, 1);
582 if (ret) {
583 dev_err(dev, "Failed to init QP context memory, aborting.\n");
584 goto err_unmap_dmpt;
585 }
586
587 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table,
588 HEM_TYPE_IRRL,
589 hr_dev->caps.irrl_entry_sz *
590 hr_dev->caps.max_qp_init_rdma,
591 hr_dev->caps.num_qps, 1);
592 if (ret) {
593 dev_err(dev, "Failed to init irrl_table memory, aborting.\n");
594 goto err_unmap_qp;
595 }
596
597 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table,
598 HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz,
599 hr_dev->caps.num_cqs, 1);
600 if (ret) {
601 dev_err(dev, "Failed to init CQ context memory, aborting.\n");
602 goto err_unmap_irrl;
603 }
604
605 return 0;
606
607err_unmap_irrl:
608 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
609
610err_unmap_qp:
611 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
612
613err_unmap_dmpt:
614 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
615
616err_unmap_mtt:
617 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
Shaobo Xu9766edc2017-08-30 17:23:09 +0800618 if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE))
619 hns_roce_cleanup_hem_table(hr_dev,
620 &hr_dev->mr_table.mtt_cqe_table);
621
622err_unmap_cqe:
623 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
oulijun9a443532016-07-21 19:06:38 +0800624
625 return ret;
626}
627
628/**
Salile84e40be2016-11-23 19:41:09 +0000629 * hns_roce_setup_hca - setup host channel adapter
630 * @hr_dev: pointer to hns roce device
631 * Return : int
632 */
oulijun9a443532016-07-21 19:06:38 +0800633static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)
634{
635 int ret;
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800636 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800637
638 spin_lock_init(&hr_dev->sm_lock);
oulijun9a443532016-07-21 19:06:38 +0800639 spin_lock_init(&hr_dev->bt_cmd_lock);
640
641 ret = hns_roce_init_uar_table(hr_dev);
642 if (ret) {
643 dev_err(dev, "Failed to initialize uar table. aborting\n");
644 return ret;
645 }
646
647 ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar);
648 if (ret) {
649 dev_err(dev, "Failed to allocate priv_uar.\n");
650 goto err_uar_table_free;
651 }
652
653 ret = hns_roce_init_pd_table(hr_dev);
654 if (ret) {
655 dev_err(dev, "Failed to init protected domain table.\n");
656 goto err_uar_alloc_free;
657 }
658
659 ret = hns_roce_init_mr_table(hr_dev);
660 if (ret) {
661 dev_err(dev, "Failed to init memory region table.\n");
662 goto err_pd_table_free;
663 }
664
665 ret = hns_roce_init_cq_table(hr_dev);
666 if (ret) {
667 dev_err(dev, "Failed to init completion queue table.\n");
668 goto err_mr_table_free;
669 }
670
671 ret = hns_roce_init_qp_table(hr_dev);
672 if (ret) {
673 dev_err(dev, "Failed to init queue pair table.\n");
674 goto err_cq_table_free;
675 }
676
677 return 0;
678
679err_cq_table_free:
680 hns_roce_cleanup_cq_table(hr_dev);
681
682err_mr_table_free:
683 hns_roce_cleanup_mr_table(hr_dev);
684
685err_pd_table_free:
686 hns_roce_cleanup_pd_table(hr_dev);
687
688err_uar_alloc_free:
689 hns_roce_uar_free(hr_dev, &hr_dev->priv_uar);
690
691err_uar_table_free:
692 hns_roce_cleanup_uar_table(hr_dev);
693 return ret;
694}
695
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800696int hns_roce_init(struct hns_roce_dev *hr_dev)
oulijun9a443532016-07-21 19:06:38 +0800697{
698 int ret;
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800699 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800700
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800701 if (hr_dev->hw->reset) {
702 ret = hr_dev->hw->reset(hr_dev, true);
703 if (ret) {
704 dev_err(dev, "Reset RoCE engine failed!\n");
705 return ret;
706 }
oulijun9a443532016-07-21 19:06:38 +0800707 }
708
Wei Hu(Xavier)a04ff732017-08-30 17:23:03 +0800709 if (hr_dev->hw->cmq_init) {
710 ret = hr_dev->hw->cmq_init(hr_dev);
711 if (ret) {
712 dev_err(dev, "Init RoCE Command Queue failed!\n");
713 goto error_failed_cmq_init;
714 }
715 }
716
Wei Hu(Xavier)cfc85f32017-08-30 17:23:04 +0800717 ret = hr_dev->hw->hw_profile(hr_dev);
718 if (ret) {
719 dev_err(dev, "Get RoCE engine profile failed!\n");
720 goto error_failed_cmd_init;
721 }
oulijun9a443532016-07-21 19:06:38 +0800722
723 ret = hns_roce_cmd_init(hr_dev);
724 if (ret) {
725 dev_err(dev, "cmd init failed!\n");
726 goto error_failed_cmd_init;
727 }
728
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800729 if (hr_dev->cmd_mod) {
730 ret = hns_roce_init_eq_table(hr_dev);
731 if (ret) {
732 dev_err(dev, "eq init failed!\n");
733 goto error_failed_eq_table;
734 }
oulijun9a443532016-07-21 19:06:38 +0800735 }
736
737 if (hr_dev->cmd_mod) {
738 ret = hns_roce_cmd_use_events(hr_dev);
739 if (ret) {
740 dev_err(dev, "Switch to event-driven cmd failed!\n");
741 goto error_failed_use_event;
742 }
743 }
744
745 ret = hns_roce_init_hem(hr_dev);
746 if (ret) {
747 dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n");
748 goto error_failed_init_hem;
749 }
750
751 ret = hns_roce_setup_hca(hr_dev);
752 if (ret) {
753 dev_err(dev, "setup hca failed!\n");
754 goto error_failed_setup_hca;
755 }
756
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800757 if (hr_dev->hw->hw_init) {
758 ret = hr_dev->hw->hw_init(hr_dev);
759 if (ret) {
760 dev_err(dev, "hw_init failed!\n");
761 goto error_failed_engine_init;
762 }
oulijun9a443532016-07-21 19:06:38 +0800763 }
764
765 ret = hns_roce_register_device(hr_dev);
766 if (ret)
767 goto error_failed_register_device;
768
769 return 0;
770
771error_failed_register_device:
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800772 if (hr_dev->hw->hw_exit)
773 hr_dev->hw->hw_exit(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800774
775error_failed_engine_init:
776 hns_roce_cleanup_bitmap(hr_dev);
777
778error_failed_setup_hca:
779 hns_roce_cleanup_hem(hr_dev);
780
781error_failed_init_hem:
782 if (hr_dev->cmd_mod)
783 hns_roce_cmd_use_polling(hr_dev);
784
785error_failed_use_event:
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800786 if (hr_dev->cmd_mod)
787 hns_roce_cleanup_eq_table(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800788
789error_failed_eq_table:
790 hns_roce_cmd_cleanup(hr_dev);
791
792error_failed_cmd_init:
Wei Hu(Xavier)a04ff732017-08-30 17:23:03 +0800793 if (hr_dev->hw->cmq_exit)
794 hr_dev->hw->cmq_exit(hr_dev);
795
796error_failed_cmq_init:
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800797 if (hr_dev->hw->reset) {
798 ret = hr_dev->hw->reset(hr_dev, false);
799 if (ret)
800 dev_err(dev, "Dereset RoCE engine failed!\n");
801 }
oulijun9a443532016-07-21 19:06:38 +0800802
803 return ret;
804}
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800805EXPORT_SYMBOL_GPL(hns_roce_init);
oulijun9a443532016-07-21 19:06:38 +0800806
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800807void hns_roce_exit(struct hns_roce_dev *hr_dev)
oulijun9a443532016-07-21 19:06:38 +0800808{
oulijun9a443532016-07-21 19:06:38 +0800809 hns_roce_unregister_device(hr_dev);
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800810 if (hr_dev->hw->hw_exit)
811 hr_dev->hw->hw_exit(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800812 hns_roce_cleanup_bitmap(hr_dev);
813 hns_roce_cleanup_hem(hr_dev);
814
815 if (hr_dev->cmd_mod)
816 hns_roce_cmd_use_polling(hr_dev);
817
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800818 if (hr_dev->cmd_mod)
819 hns_roce_cleanup_eq_table(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800820 hns_roce_cmd_cleanup(hr_dev);
Wei Hu(Xavier)a04ff732017-08-30 17:23:03 +0800821 if (hr_dev->hw->cmq_exit)
822 hr_dev->hw->cmq_exit(hr_dev);
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800823 if (hr_dev->hw->reset)
824 hr_dev->hw->reset(hr_dev, false);
oulijun9a443532016-07-21 19:06:38 +0800825}
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800826EXPORT_SYMBOL_GPL(hns_roce_exit);
oulijun9a443532016-07-21 19:06:38 +0800827
828MODULE_LICENSE("Dual BSD/GPL");
829MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>");
830MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>");
831MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>");
832MODULE_DESCRIPTION("HNS RoCE Driver");