blob: 41d02810d6d231e4dfb1ad9a41a45e63131e3bd6 [file] [log] [blame]
Michael Buesche63e4362008-08-30 10:55:48 +02001/*
2
3 Broadcom B43 wireless driver
Gábor Stefanik0136e512009-08-28 22:32:17 +02004 IEEE 802.11a/g LP-PHY driver
Michael Buesche63e4362008-08-30 10:55:48 +02005
Michael Buesch6c1bb922009-01-31 16:52:29 +01006 Copyright (c) 2008-2009 Michael Buesch <mb@bu3sch.de>
Gábor Stefanik0136e512009-08-28 22:32:17 +02007 Copyright (c) 2009 Gábor Stefanik <netrolller.3d@gmail.com>
Michael Buesche63e4362008-08-30 10:55:48 +02008
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; see the file COPYING. If not, write to
21 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
22 Boston, MA 02110-1301, USA.
23
24*/
25
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090026#include <linux/slab.h>
27
Michael Buesche63e4362008-08-30 10:55:48 +020028#include "b43.h"
Michael Bueschce1a9ee32009-02-04 19:55:22 +010029#include "main.h"
Michael Buesche63e4362008-08-30 10:55:48 +020030#include "phy_lp.h"
31#include "phy_common.h"
Michael Buesch6c1bb922009-01-31 16:52:29 +010032#include "tables_lpphy.h"
Michael Buesche63e4362008-08-30 10:55:48 +020033
34
Gábor Stefanik588f8372009-08-13 22:46:30 +020035static inline u16 channel2freq_lp(u8 channel)
36{
37 if (channel < 14)
38 return (2407 + 5 * channel);
39 else if (channel == 14)
40 return 2484;
41 else if (channel < 184)
42 return (5000 + 5 * channel);
43 else
44 return (4000 + 5 * channel);
45}
46
47static unsigned int b43_lpphy_op_get_default_chan(struct b43_wldev *dev)
48{
49 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Gábor Stefanik68ec5322009-08-26 20:51:25 +020050 return 1;
Gábor Stefanik588f8372009-08-13 22:46:30 +020051 return 36;
52}
53
Michael Buesche63e4362008-08-30 10:55:48 +020054static int b43_lpphy_op_allocate(struct b43_wldev *dev)
55{
56 struct b43_phy_lp *lpphy;
57
58 lpphy = kzalloc(sizeof(*lpphy), GFP_KERNEL);
59 if (!lpphy)
60 return -ENOMEM;
61 dev->phy.lp = lpphy;
62
Michael Buesche63e4362008-08-30 10:55:48 +020063 return 0;
64}
65
Michael Bueschfb111372008-09-02 13:00:34 +020066static void b43_lpphy_op_prepare_structs(struct b43_wldev *dev)
67{
68 struct b43_phy *phy = &dev->phy;
69 struct b43_phy_lp *lpphy = phy->lp;
70
71 memset(lpphy, 0, sizeof(*lpphy));
Gábor Stefanik2c0d6102009-10-25 16:26:36 +010072 lpphy->antenna = B43_ANTENNA_DEFAULT;
Michael Bueschfb111372008-09-02 13:00:34 +020073
74 //TODO
75}
76
77static void b43_lpphy_op_free(struct b43_wldev *dev)
78{
79 struct b43_phy_lp *lpphy = dev->phy.lp;
80
81 kfree(lpphy);
82 dev->phy.lp = NULL;
83}
84
Rafał Miłecki81f14df2010-01-07 14:09:27 +010085/* http://bcm-v4.sipsolutions.net/802.11/PHY/LP/ReadBandSrom */
Gábor Stefanik84ec1672009-08-11 21:47:00 +020086static void lpphy_read_band_sprom(struct b43_wldev *dev)
87{
Rafał Miłecki05814832011-05-18 02:06:39 +020088 struct ssb_sprom *sprom = dev->dev->bus_sprom;
Gábor Stefanik84ec1672009-08-11 21:47:00 +020089 struct b43_phy_lp *lpphy = dev->phy.lp;
Gábor Stefanik84ec1672009-08-11 21:47:00 +020090 u16 cckpo, maxpwr;
91 u32 ofdmpo;
92 int i;
93
94 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki05814832011-05-18 02:06:39 +020095 lpphy->tx_isolation_med_band = sprom->tri2g;
96 lpphy->bx_arch = sprom->bxa2g;
97 lpphy->rx_pwr_offset = sprom->rxpo2g;
98 lpphy->rssi_vf = sprom->rssismf2g;
99 lpphy->rssi_vc = sprom->rssismc2g;
100 lpphy->rssi_gs = sprom->rssisav2g;
101 lpphy->txpa[0] = sprom->pa0b0;
102 lpphy->txpa[1] = sprom->pa0b1;
103 lpphy->txpa[2] = sprom->pa0b2;
104 maxpwr = sprom->maxpwr_bg;
Gábor Stefanik84ec1672009-08-11 21:47:00 +0200105 lpphy->max_tx_pwr_med_band = maxpwr;
Rafał Miłecki05814832011-05-18 02:06:39 +0200106 cckpo = sprom->cck2gpo;
Rafał Miłecki81f14df2010-01-07 14:09:27 +0100107 /*
108 * We don't read SPROM's opo as specs say. On rev8 SPROMs
109 * opo == ofdm2gpo and we don't know any SSB with LP-PHY
110 * and SPROM rev below 8.
111 */
Rafał Miłecki05814832011-05-18 02:06:39 +0200112 B43_WARN_ON(sprom->revision < 8);
113 ofdmpo = sprom->ofdm2gpo;
Gábor Stefanik84ec1672009-08-11 21:47:00 +0200114 if (cckpo) {
115 for (i = 0; i < 4; i++) {
116 lpphy->tx_max_rate[i] =
117 maxpwr - (ofdmpo & 0xF) * 2;
118 ofdmpo >>= 4;
119 }
Rafał Miłecki05814832011-05-18 02:06:39 +0200120 ofdmpo = sprom->ofdm2gpo;
Gábor Stefanik84ec1672009-08-11 21:47:00 +0200121 for (i = 4; i < 15; i++) {
122 lpphy->tx_max_rate[i] =
123 maxpwr - (ofdmpo & 0xF) * 2;
124 ofdmpo >>= 4;
125 }
126 } else {
127 ofdmpo &= 0xFF;
128 for (i = 0; i < 4; i++)
129 lpphy->tx_max_rate[i] = maxpwr;
130 for (i = 4; i < 15; i++)
131 lpphy->tx_max_rate[i] = maxpwr - ofdmpo;
132 }
133 } else { /* 5GHz */
Rafał Miłecki05814832011-05-18 02:06:39 +0200134 lpphy->tx_isolation_low_band = sprom->tri5gl;
135 lpphy->tx_isolation_med_band = sprom->tri5g;
136 lpphy->tx_isolation_hi_band = sprom->tri5gh;
137 lpphy->bx_arch = sprom->bxa5g;
138 lpphy->rx_pwr_offset = sprom->rxpo5g;
139 lpphy->rssi_vf = sprom->rssismf5g;
140 lpphy->rssi_vc = sprom->rssismc5g;
141 lpphy->rssi_gs = sprom->rssisav5g;
142 lpphy->txpa[0] = sprom->pa1b0;
143 lpphy->txpa[1] = sprom->pa1b1;
144 lpphy->txpa[2] = sprom->pa1b2;
145 lpphy->txpal[0] = sprom->pa1lob0;
146 lpphy->txpal[1] = sprom->pa1lob1;
147 lpphy->txpal[2] = sprom->pa1lob2;
148 lpphy->txpah[0] = sprom->pa1hib0;
149 lpphy->txpah[1] = sprom->pa1hib1;
150 lpphy->txpah[2] = sprom->pa1hib2;
151 maxpwr = sprom->maxpwr_al;
152 ofdmpo = sprom->ofdm5glpo;
Gábor Stefanik84ec1672009-08-11 21:47:00 +0200153 lpphy->max_tx_pwr_low_band = maxpwr;
154 for (i = 4; i < 12; i++) {
155 lpphy->tx_max_ratel[i] = maxpwr - (ofdmpo & 0xF) * 2;
156 ofdmpo >>= 4;
157 }
Rafał Miłecki05814832011-05-18 02:06:39 +0200158 maxpwr = sprom->maxpwr_a;
159 ofdmpo = sprom->ofdm5gpo;
Gábor Stefanik84ec1672009-08-11 21:47:00 +0200160 lpphy->max_tx_pwr_med_band = maxpwr;
161 for (i = 4; i < 12; i++) {
162 lpphy->tx_max_rate[i] = maxpwr - (ofdmpo & 0xF) * 2;
163 ofdmpo >>= 4;
164 }
Rafał Miłecki05814832011-05-18 02:06:39 +0200165 maxpwr = sprom->maxpwr_ah;
166 ofdmpo = sprom->ofdm5ghpo;
Gábor Stefanik84ec1672009-08-11 21:47:00 +0200167 lpphy->max_tx_pwr_hi_band = maxpwr;
168 for (i = 4; i < 12; i++) {
169 lpphy->tx_max_rateh[i] = maxpwr - (ofdmpo & 0xF) * 2;
170 ofdmpo >>= 4;
171 }
172 }
173}
174
Gábor Stefanik588f8372009-08-13 22:46:30 +0200175static void lpphy_adjust_gain_table(struct b43_wldev *dev, u32 freq)
Gábor Stefanikc65d6fb2009-08-10 20:39:47 +0200176{
177 struct b43_phy_lp *lpphy = dev->phy.lp;
Gábor Stefanikc65d6fb2009-08-10 20:39:47 +0200178 u16 temp[3];
179 u16 isolation;
180
181 B43_WARN_ON(dev->phy.rev >= 2);
182
183 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
184 isolation = lpphy->tx_isolation_med_band;
185 else if (freq <= 5320)
186 isolation = lpphy->tx_isolation_low_band;
187 else if (freq <= 5700)
188 isolation = lpphy->tx_isolation_med_band;
189 else
190 isolation = lpphy->tx_isolation_hi_band;
191
192 temp[0] = ((isolation - 26) / 12) << 12;
193 temp[1] = temp[0] + 0x1000;
194 temp[2] = temp[0] + 0x2000;
195
Gábor Stefanikc65d6fb2009-08-10 20:39:47 +0200196 b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0), 3, temp);
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200197 b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0), 3, temp);
Gábor Stefanikc65d6fb2009-08-10 20:39:47 +0200198}
199
Michael Buescha387cc72009-01-31 14:20:44 +0100200static void lpphy_table_init(struct b43_wldev *dev)
201{
Gábor Stefanik588f8372009-08-13 22:46:30 +0200202 u32 freq = channel2freq_lp(b43_lpphy_op_get_default_chan(dev));
203
Gábor Stefanikc65d6fb2009-08-10 20:39:47 +0200204 if (dev->phy.rev < 2)
205 lpphy_rev0_1_table_init(dev);
206 else
207 lpphy_rev2plus_table_init(dev);
208
209 lpphy_init_tx_gain_table(dev);
210
211 if (dev->phy.rev < 2)
Gábor Stefanik588f8372009-08-13 22:46:30 +0200212 lpphy_adjust_gain_table(dev, freq);
Michael Buescha387cc72009-01-31 14:20:44 +0100213}
214
215static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
216{
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +0200217 struct ssb_bus *bus = dev->sdev->bus;
Rafał Miłecki05814832011-05-18 02:06:39 +0200218 struct ssb_sprom *sprom = dev->dev->bus_sprom;
Gábor Stefanik96909e92009-08-16 01:15:49 +0200219 struct b43_phy_lp *lpphy = dev->phy.lp;
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200220 u16 tmp, tmp2;
221
Gábor Stefanik96909e92009-08-16 01:15:49 +0200222 b43_phy_mask(dev, B43_LPPHY_AFE_DAC_CTL, 0xF7FF);
223 b43_phy_write(dev, B43_LPPHY_AFE_CTL, 0);
224 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVR, 0);
225 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, 0);
226 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0);
227 b43_phy_set(dev, B43_LPPHY_AFE_DAC_CTL, 0x0004);
228 b43_phy_maskset(dev, B43_LPPHY_OFDMSYNCTHRESH0, 0xFF00, 0x0078);
229 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x5800);
230 b43_phy_write(dev, B43_LPPHY_ADC_COMPENSATION_CTL, 0x0016);
231 b43_phy_maskset(dev, B43_LPPHY_AFE_ADC_CTL_0, 0xFFF8, 0x0004);
232 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0x00FF, 0x5400);
233 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2400);
234 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100);
235 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0x0006);
236 b43_phy_mask(dev, B43_LPPHY_RX_RADIO_CTL, 0xFFFE);
237 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x0005);
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200238 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0x0180);
239 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3C00);
Gábor Stefanik96909e92009-08-16 01:15:49 +0200240 b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFFF0, 0x0005);
241 b43_phy_maskset(dev, B43_LPPHY_GAIN_MISMATCH_LIMIT, 0xFFC0, 0x001A);
242 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0x00B3);
243 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0x00FF, 0xAD00);
244 b43_phy_maskset(dev, B43_LPPHY_INPUT_PWRDB,
245 0xFF00, lpphy->rx_pwr_offset);
Rafał Miłecki05814832011-05-18 02:06:39 +0200246 if ((sprom->boardflags_lo & B43_BFL_FEM) &&
Gábor Stefanik96909e92009-08-16 01:15:49 +0200247 ((b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
Rafał Miłecki05814832011-05-18 02:06:39 +0200248 (sprom->boardflags_hi & B43_BFH_PAREF))) {
Gábor Stefanik06e4da22009-08-26 20:51:26 +0200249 ssb_pmu_set_ldo_voltage(&bus->chipco, LDO_PAREF, 0x28);
250 ssb_pmu_set_ldo_paref(&bus->chipco, true);
Gábor Stefanik96909e92009-08-16 01:15:49 +0200251 if (dev->phy.rev == 0) {
252 b43_phy_maskset(dev, B43_LPPHY_LP_RF_SIGNAL_LUT,
253 0xFFCF, 0x0010);
254 }
255 b43_lptab_write(dev, B43_LPTAB16(11, 7), 60);
256 } else {
Gábor Stefanik06e4da22009-08-26 20:51:26 +0200257 ssb_pmu_set_ldo_paref(&bus->chipco, false);
Gábor Stefanik96909e92009-08-16 01:15:49 +0200258 b43_phy_maskset(dev, B43_LPPHY_LP_RF_SIGNAL_LUT,
259 0xFFCF, 0x0020);
260 b43_lptab_write(dev, B43_LPTAB16(11, 7), 100);
261 }
262 tmp = lpphy->rssi_vf | lpphy->rssi_vc << 4 | 0xA000;
263 b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_0, tmp);
Rafał Miłecki05814832011-05-18 02:06:39 +0200264 if (sprom->boardflags_hi & B43_BFH_RSSIINV)
Gábor Stefanik96909e92009-08-16 01:15:49 +0200265 b43_phy_maskset(dev, B43_LPPHY_AFE_RSSI_CTL_1, 0xF000, 0x0AAA);
266 else
267 b43_phy_maskset(dev, B43_LPPHY_AFE_RSSI_CTL_1, 0xF000, 0x02AA);
268 b43_lptab_write(dev, B43_LPTAB16(11, 1), 24);
269 b43_phy_maskset(dev, B43_LPPHY_RX_RADIO_CTL,
270 0xFFF9, (lpphy->bx_arch << 1));
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200271 if (dev->phy.rev == 1 &&
Rafał Miłecki05814832011-05-18 02:06:39 +0200272 (sprom->boardflags_hi & B43_BFH_FEM_BT)) {
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200273 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x000A);
274 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0x3F00, 0x0900);
275 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x000A);
276 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0B00);
277 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x000A);
278 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0400);
279 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x000A);
280 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0B00);
281 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_5, 0xFFC0, 0x000A);
282 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_5, 0xC0FF, 0x0900);
283 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_6, 0xFFC0, 0x000A);
284 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_6, 0xC0FF, 0x0B00);
285 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_7, 0xFFC0, 0x000A);
286 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_7, 0xC0FF, 0x0900);
287 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xFFC0, 0x000A);
288 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xC0FF, 0x0B00);
289 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ ||
290 (bus->boardinfo.type == 0x048A) || ((dev->phy.rev == 0) &&
Rafał Miłecki05814832011-05-18 02:06:39 +0200291 (sprom->boardflags_lo & B43_BFL_FEM))) {
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200292 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0001);
293 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0400);
294 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0001);
295 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0500);
296 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0002);
297 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0800);
298 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0002);
299 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0A00);
300 } else if (dev->phy.rev == 1 ||
Rafał Miłecki05814832011-05-18 02:06:39 +0200301 (sprom->boardflags_lo & B43_BFL_FEM)) {
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200302 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0004);
303 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0800);
304 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0004);
305 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0C00);
306 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0002);
307 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0100);
308 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0002);
309 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0300);
310 } else {
311 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x000A);
312 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0900);
313 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x000A);
314 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0B00);
315 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0006);
316 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0500);
317 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0006);
318 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0700);
319 }
Rafał Miłecki05814832011-05-18 02:06:39 +0200320 if (dev->phy.rev == 1 && (sprom->boardflags_hi & B43_BFH_PAREF)) {
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200321 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_5, B43_LPPHY_TR_LOOKUP_1);
322 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_6, B43_LPPHY_TR_LOOKUP_2);
323 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_7, B43_LPPHY_TR_LOOKUP_3);
324 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_8, B43_LPPHY_TR_LOOKUP_4);
325 }
Rafał Miłecki05814832011-05-18 02:06:39 +0200326 if ((sprom->boardflags_hi & B43_BFH_FEM_BT) &&
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200327 (bus->chip_id == 0x5354) &&
328 (bus->chip_package == SSB_CHIPPACK_BCM4712S)) {
329 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0006);
330 b43_phy_write(dev, B43_LPPHY_GPIO_SELECT, 0x0005);
331 b43_phy_write(dev, B43_LPPHY_GPIO_OUTEN, 0xFFFF);
Gábor Stefanik96909e92009-08-16 01:15:49 +0200332 //FIXME the Broadcom driver caches & delays this HF write!
Gábor Stefanik7c81e982009-08-05 00:25:42 +0200333 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_PR45960W);
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200334 }
335 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
336 b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x8000);
337 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0040);
338 b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0x00FF, 0xA400);
339 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xF0FF, 0x0B00);
340 b43_phy_maskset(dev, B43_LPPHY_SYNCPEAKCNT, 0xFFF8, 0x0007);
341 b43_phy_maskset(dev, B43_LPPHY_DSSS_CONFIRM_CNT, 0xFFF8, 0x0003);
342 b43_phy_maskset(dev, B43_LPPHY_DSSS_CONFIRM_CNT, 0xFFC7, 0x0020);
343 b43_phy_mask(dev, B43_LPPHY_IDLEAFTERPKTRXTO, 0x00FF);
344 } else { /* 5GHz */
345 b43_phy_mask(dev, B43_LPPHY_LP_PHY_CTL, 0x7FFF);
346 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFBF);
347 }
348 if (dev->phy.rev == 1) {
349 tmp = b43_phy_read(dev, B43_LPPHY_CLIPCTRTHRESH);
350 tmp2 = (tmp & 0x03E0) >> 5;
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200351 tmp2 |= tmp2 << 5;
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200352 b43_phy_write(dev, B43_LPPHY_4C3, tmp2);
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200353 tmp = b43_phy_read(dev, B43_LPPHY_GAINDIRECTMISMATCH);
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200354 tmp2 = (tmp & 0x1F00) >> 8;
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200355 tmp2 |= tmp2 << 5;
Gábor Stefanik738f0f42009-08-03 01:28:12 +0200356 b43_phy_write(dev, B43_LPPHY_4C4, tmp2);
357 tmp = b43_phy_read(dev, B43_LPPHY_VERYLOWGAINDB);
358 tmp2 = tmp & 0x00FF;
359 tmp2 |= tmp << 8;
360 b43_phy_write(dev, B43_LPPHY_4C5, tmp2);
361 }
Michael Buescha387cc72009-01-31 14:20:44 +0100362}
363
Gábor Stefanika3e14f3d2009-08-10 20:57:06 +0200364static void lpphy_save_dig_flt_state(struct b43_wldev *dev)
365{
366 static const u16 addr[] = {
367 B43_PHY_OFDM(0xC1),
368 B43_PHY_OFDM(0xC2),
369 B43_PHY_OFDM(0xC3),
370 B43_PHY_OFDM(0xC4),
371 B43_PHY_OFDM(0xC5),
372 B43_PHY_OFDM(0xC6),
373 B43_PHY_OFDM(0xC7),
374 B43_PHY_OFDM(0xC8),
375 B43_PHY_OFDM(0xCF),
376 };
377
378 static const u16 coefs[] = {
379 0xDE5E, 0xE832, 0xE331, 0x4D26,
380 0x0026, 0x1420, 0x0020, 0xFE08,
381 0x0008,
382 };
383
384 struct b43_phy_lp *lpphy = dev->phy.lp;
385 int i;
386
387 for (i = 0; i < ARRAY_SIZE(addr); i++) {
388 lpphy->dig_flt_state[i] = b43_phy_read(dev, addr[i]);
389 b43_phy_write(dev, addr[i], coefs[i]);
390 }
391}
392
393static void lpphy_restore_dig_flt_state(struct b43_wldev *dev)
394{
395 static const u16 addr[] = {
396 B43_PHY_OFDM(0xC1),
397 B43_PHY_OFDM(0xC2),
398 B43_PHY_OFDM(0xC3),
399 B43_PHY_OFDM(0xC4),
400 B43_PHY_OFDM(0xC5),
401 B43_PHY_OFDM(0xC6),
402 B43_PHY_OFDM(0xC7),
403 B43_PHY_OFDM(0xC8),
404 B43_PHY_OFDM(0xCF),
405 };
406
407 struct b43_phy_lp *lpphy = dev->phy.lp;
408 int i;
409
410 for (i = 0; i < ARRAY_SIZE(addr); i++)
411 b43_phy_write(dev, addr[i], lpphy->dig_flt_state[i]);
412}
413
Michael Buescha387cc72009-01-31 14:20:44 +0100414static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
415{
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +0200416 struct ssb_bus *bus = dev->sdev->bus;
Michael Buesch6c1bb922009-01-31 16:52:29 +0100417 struct b43_phy_lp *lpphy = dev->phy.lp;
418
419 b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50);
420 b43_phy_write(dev, B43_LPPHY_AFE_CTL, 0x8800);
421 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVR, 0);
422 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0);
423 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, 0);
424 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0);
425 b43_phy_write(dev, B43_PHY_OFDM(0xF9), 0);
426 b43_phy_write(dev, B43_LPPHY_TR_LOOKUP_1, 0);
427 b43_phy_set(dev, B43_LPPHY_ADC_COMPENSATION_CTL, 0x10);
Gábor Stefanika3e14f3d2009-08-10 20:57:06 +0200428 b43_phy_maskset(dev, B43_LPPHY_OFDMSYNCTHRESH0, 0xFF00, 0xB4);
Michael Buesch6c1bb922009-01-31 16:52:29 +0100429 b43_phy_maskset(dev, B43_LPPHY_DCOFFSETTRANSIENT, 0xF8FF, 0x200);
430 b43_phy_maskset(dev, B43_LPPHY_DCOFFSETTRANSIENT, 0xFF00, 0x7F);
431 b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFF0F, 0x40);
432 b43_phy_maskset(dev, B43_LPPHY_PREAMBLECONFIRMTO, 0xFF00, 0x2);
433 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000);
434 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000);
435 b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1);
Gábor Stefanika3e14f3d2009-08-10 20:57:06 +0200436 if (bus->boardinfo.rev >= 0x18) {
437 b43_lptab_write(dev, B43_LPTAB32(17, 65), 0xEC);
438 b43_phy_maskset(dev, B43_PHY_OFDM(0x10A), 0xFF01, 0x14);
439 } else {
440 b43_phy_maskset(dev, B43_PHY_OFDM(0x10A), 0xFF01, 0x10);
441 }
Michael Buesch6c1bb922009-01-31 16:52:29 +0100442 b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0xFF00, 0xF4);
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100443 b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0x00FF, 0xF100);
Michael Buesch6c1bb922009-01-31 16:52:29 +0100444 b43_phy_write(dev, B43_LPPHY_CLIPTHRESH, 0x48);
445 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0xFF00, 0x46);
446 b43_phy_maskset(dev, B43_PHY_OFDM(0xE4), 0xFF00, 0x10);
447 b43_phy_maskset(dev, B43_LPPHY_PWR_THRESH1, 0xFFF0, 0x9);
448 b43_phy_mask(dev, B43_LPPHY_GAINDIRECTMISMATCH, ~0xF);
449 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0x00FF, 0x5500);
Gábor Stefanik96909e92009-08-16 01:15:49 +0200450 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0xA0);
Michael Buesch6c1bb922009-01-31 16:52:29 +0100451 b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300);
452 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00);
Michael Buesch686aa5f2009-02-03 19:36:45 +0100453 if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) {
454 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100);
455 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xA);
456 } else {
457 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x1E00);
458 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xD);
459 }
Michael Buesch6c1bb922009-01-31 16:52:29 +0100460 b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFFE0, 0x1F);
461 b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC);
462 b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0xFF00, 0x19);
463 b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0x03FF, 0x3C00);
464 b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFC1F, 0x3E0);
465 b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC);
466 b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0x00FF, 0x1900);
467 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x5800);
468 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12);
469 b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000);
470
Gábor Stefanik96909e92009-08-16 01:15:49 +0200471 if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) {
Gábor Stefanika3e14f3d2009-08-10 20:57:06 +0200472 b43_lptab_write(dev, B43_LPTAB16(0x08, 0x14), 0);
473 b43_lptab_write(dev, B43_LPTAB16(0x08, 0x12), 0x40);
474 }
Michael Buesch6c1bb922009-01-31 16:52:29 +0100475
476 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
477 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40);
478 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xF0FF, 0xB00);
479 b43_phy_maskset(dev, B43_LPPHY_SYNCPEAKCNT, 0xFFF8, 0x6);
480 b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0x00FF, 0x9D00);
481 b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0xFF00, 0xA1);
Gábor Stefanik96909e92009-08-16 01:15:49 +0200482 b43_phy_mask(dev, B43_LPPHY_IDLEAFTERPKTRXTO, 0x00FF);
Michael Buesch6c1bb922009-01-31 16:52:29 +0100483 } else /* 5GHz */
484 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x40);
485
486 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0xB3);
487 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0x00FF, 0xAD00);
488 b43_phy_maskset(dev, B43_LPPHY_INPUT_PWRDB, 0xFF00, lpphy->rx_pwr_offset);
489 b43_phy_set(dev, B43_LPPHY_RESET_CTL, 0x44);
490 b43_phy_write(dev, B43_LPPHY_RESET_CTL, 0x80);
491 b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_0, 0xA954);
492 b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_1,
493 0x2000 | ((u16)lpphy->rssi_gs << 10) |
494 ((u16)lpphy->rssi_vc << 4) | lpphy->rssi_vf);
Gábor Stefanika3e14f3d2009-08-10 20:57:06 +0200495
496 if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) {
497 b43_phy_set(dev, B43_LPPHY_AFE_ADC_CTL_0, 0x1C);
498 b43_phy_maskset(dev, B43_LPPHY_AFE_CTL, 0x00FF, 0x8800);
499 b43_phy_maskset(dev, B43_LPPHY_AFE_ADC_CTL_1, 0xFC3C, 0x0400);
500 }
501
502 lpphy_save_dig_flt_state(dev);
Michael Buescha387cc72009-01-31 14:20:44 +0100503}
504
505static void lpphy_baseband_init(struct b43_wldev *dev)
506{
507 lpphy_table_init(dev);
508 if (dev->phy.rev >= 2)
509 lpphy_baseband_rev2plus_init(dev);
510 else
511 lpphy_baseband_rev0_1_init(dev);
512}
513
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100514struct b2062_freqdata {
515 u16 freq;
516 u8 data[6];
517};
518
519/* Initialize the 2062 radio. */
520static void lpphy_2062_init(struct b43_wldev *dev)
521{
Gábor Stefanik1e711be2009-08-14 00:15:17 +0200522 struct b43_phy_lp *lpphy = dev->phy.lp;
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +0200523 struct ssb_bus *bus = dev->sdev->bus;
Gábor Stefanik1e711be2009-08-14 00:15:17 +0200524 u32 crystalfreq, tmp, ref;
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100525 unsigned int i;
526 const struct b2062_freqdata *fd = NULL;
527
528 static const struct b2062_freqdata freqdata_tab[] = {
529 { .freq = 12000, .data[0] = 6, .data[1] = 6, .data[2] = 6,
530 .data[3] = 6, .data[4] = 10, .data[5] = 6, },
531 { .freq = 13000, .data[0] = 4, .data[1] = 4, .data[2] = 4,
532 .data[3] = 4, .data[4] = 11, .data[5] = 7, },
533 { .freq = 14400, .data[0] = 3, .data[1] = 3, .data[2] = 3,
534 .data[3] = 3, .data[4] = 12, .data[5] = 7, },
535 { .freq = 16200, .data[0] = 3, .data[1] = 3, .data[2] = 3,
536 .data[3] = 3, .data[4] = 13, .data[5] = 8, },
537 { .freq = 18000, .data[0] = 2, .data[1] = 2, .data[2] = 2,
538 .data[3] = 2, .data[4] = 14, .data[5] = 8, },
539 { .freq = 19200, .data[0] = 1, .data[1] = 1, .data[2] = 1,
540 .data[3] = 1, .data[4] = 14, .data[5] = 9, },
541 };
542
543 b2062_upload_init_table(dev);
544
545 b43_radio_write(dev, B2062_N_TX_CTL3, 0);
546 b43_radio_write(dev, B2062_N_TX_CTL4, 0);
547 b43_radio_write(dev, B2062_N_TX_CTL5, 0);
Gábor Stefanik7e4d8522009-08-16 20:08:13 +0200548 b43_radio_write(dev, B2062_N_TX_CTL6, 0);
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100549 b43_radio_write(dev, B2062_N_PDN_CTL0, 0x40);
550 b43_radio_write(dev, B2062_N_PDN_CTL0, 0);
551 b43_radio_write(dev, B2062_N_CALIB_TS, 0x10);
552 b43_radio_write(dev, B2062_N_CALIB_TS, 0);
Gábor Stefanik7e4d8522009-08-16 20:08:13 +0200553 if (dev->phy.rev > 0) {
554 b43_radio_write(dev, B2062_S_BG_CTL1,
555 (b43_radio_read(dev, B2062_N_COMM2) >> 1) | 0x80);
556 }
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100557 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
558 b43_radio_set(dev, B2062_N_TSSI_CTL0, 0x1);
559 else
560 b43_radio_mask(dev, B2062_N_TSSI_CTL0, ~0x1);
561
Michael Buesch99e0fca2009-02-03 20:06:14 +0100562 /* Get the crystal freq, in Hz. */
563 crystalfreq = bus->chipco.pmu.crystalfreq * 1000;
564
565 B43_WARN_ON(!(bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU));
566 B43_WARN_ON(crystalfreq == 0);
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100567
Gábor Stefanik5269102e2009-08-16 18:05:09 +0200568 if (crystalfreq <= 30000000) {
Gábor Stefanik1e711be2009-08-14 00:15:17 +0200569 lpphy->pdiv = 1;
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100570 b43_radio_mask(dev, B2062_S_RFPLL_CTL1, 0xFFFB);
571 } else {
Gábor Stefanik1e711be2009-08-14 00:15:17 +0200572 lpphy->pdiv = 2;
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100573 b43_radio_set(dev, B2062_S_RFPLL_CTL1, 0x4);
574 }
575
Gábor Stefanik5269102e2009-08-16 18:05:09 +0200576 tmp = (((800000000 * lpphy->pdiv + crystalfreq) /
577 (2 * crystalfreq)) - 8) & 0xFF;
578 b43_radio_write(dev, B2062_S_RFPLL_CTL7, tmp);
579
580 tmp = (((100 * crystalfreq + 16000000 * lpphy->pdiv) /
581 (32000000 * lpphy->pdiv)) - 1) & 0xFF;
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100582 b43_radio_write(dev, B2062_S_RFPLL_CTL18, tmp);
583
Gábor Stefanik5269102e2009-08-16 18:05:09 +0200584 tmp = (((2 * crystalfreq + 1000000 * lpphy->pdiv) /
585 (2000000 * lpphy->pdiv)) - 1) & 0xFF;
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100586 b43_radio_write(dev, B2062_S_RFPLL_CTL19, tmp);
587
Gábor Stefanik1e711be2009-08-14 00:15:17 +0200588 ref = (1000 * lpphy->pdiv + 2 * crystalfreq) / (2000 * lpphy->pdiv);
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100589 ref &= 0xFFFF;
590 for (i = 0; i < ARRAY_SIZE(freqdata_tab); i++) {
591 if (ref < freqdata_tab[i].freq) {
592 fd = &freqdata_tab[i];
593 break;
594 }
595 }
Michael Buesch99e0fca2009-02-03 20:06:14 +0100596 if (!fd)
597 fd = &freqdata_tab[ARRAY_SIZE(freqdata_tab) - 1];
598 b43dbg(dev->wl, "b2062: Using crystal tab entry %u kHz.\n",
599 fd->freq); /* FIXME: Keep this printk until the code is fully debugged. */
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100600
601 b43_radio_write(dev, B2062_S_RFPLL_CTL8,
602 ((u16)(fd->data[1]) << 4) | fd->data[0]);
603 b43_radio_write(dev, B2062_S_RFPLL_CTL9,
Michael Buesch99e0fca2009-02-03 20:06:14 +0100604 ((u16)(fd->data[3]) << 4) | fd->data[2]);
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100605 b43_radio_write(dev, B2062_S_RFPLL_CTL10, fd->data[4]);
606 b43_radio_write(dev, B2062_S_RFPLL_CTL11, fd->data[5]);
607}
608
609/* Initialize the 2063 radio. */
610static void lpphy_2063_init(struct b43_wldev *dev)
Michael Buescha387cc72009-01-31 14:20:44 +0100611{
Gábor Stefanikc10e47f2009-08-04 23:57:32 +0200612 b2063_upload_init_table(dev);
613 b43_radio_write(dev, B2063_LOGEN_SP5, 0);
614 b43_radio_set(dev, B2063_COMM8, 0x38);
615 b43_radio_write(dev, B2063_REG_SP1, 0x56);
616 b43_radio_mask(dev, B2063_RX_BB_CTL2, ~0x2);
617 b43_radio_write(dev, B2063_PA_SP7, 0);
618 b43_radio_write(dev, B2063_TX_RF_SP6, 0x20);
619 b43_radio_write(dev, B2063_TX_RF_SP9, 0x40);
Gábor Stefanik5791ce12009-08-18 22:08:31 +0200620 if (dev->phy.rev == 2) {
621 b43_radio_write(dev, B2063_PA_SP3, 0xa0);
622 b43_radio_write(dev, B2063_PA_SP4, 0xa0);
623 b43_radio_write(dev, B2063_PA_SP2, 0x18);
624 } else {
625 b43_radio_write(dev, B2063_PA_SP3, 0x20);
626 b43_radio_write(dev, B2063_PA_SP2, 0x20);
627 }
Michael Buescha387cc72009-01-31 14:20:44 +0100628}
629
Gábor Stefanik3281d952009-08-09 20:15:09 +0200630struct lpphy_stx_table_entry {
631 u16 phy_offset;
632 u16 phy_shift;
633 u16 rf_addr;
634 u16 rf_shift;
635 u16 mask;
636};
637
638static const struct lpphy_stx_table_entry lpphy_stx_table[] = {
639 { .phy_offset = 2, .phy_shift = 6, .rf_addr = 0x3d, .rf_shift = 3, .mask = 0x01, },
640 { .phy_offset = 1, .phy_shift = 12, .rf_addr = 0x4c, .rf_shift = 1, .mask = 0x01, },
641 { .phy_offset = 1, .phy_shift = 8, .rf_addr = 0x50, .rf_shift = 0, .mask = 0x7f, },
642 { .phy_offset = 0, .phy_shift = 8, .rf_addr = 0x44, .rf_shift = 0, .mask = 0xff, },
643 { .phy_offset = 1, .phy_shift = 0, .rf_addr = 0x4a, .rf_shift = 0, .mask = 0xff, },
644 { .phy_offset = 0, .phy_shift = 4, .rf_addr = 0x4d, .rf_shift = 0, .mask = 0xff, },
645 { .phy_offset = 1, .phy_shift = 4, .rf_addr = 0x4e, .rf_shift = 0, .mask = 0xff, },
646 { .phy_offset = 0, .phy_shift = 12, .rf_addr = 0x4f, .rf_shift = 0, .mask = 0x0f, },
647 { .phy_offset = 1, .phy_shift = 0, .rf_addr = 0x4f, .rf_shift = 4, .mask = 0x0f, },
648 { .phy_offset = 3, .phy_shift = 0, .rf_addr = 0x49, .rf_shift = 0, .mask = 0x0f, },
649 { .phy_offset = 4, .phy_shift = 3, .rf_addr = 0x46, .rf_shift = 4, .mask = 0x07, },
650 { .phy_offset = 3, .phy_shift = 15, .rf_addr = 0x46, .rf_shift = 0, .mask = 0x01, },
651 { .phy_offset = 4, .phy_shift = 0, .rf_addr = 0x46, .rf_shift = 1, .mask = 0x07, },
652 { .phy_offset = 3, .phy_shift = 8, .rf_addr = 0x48, .rf_shift = 4, .mask = 0x07, },
653 { .phy_offset = 3, .phy_shift = 11, .rf_addr = 0x48, .rf_shift = 0, .mask = 0x0f, },
654 { .phy_offset = 3, .phy_shift = 4, .rf_addr = 0x49, .rf_shift = 4, .mask = 0x0f, },
655 { .phy_offset = 2, .phy_shift = 15, .rf_addr = 0x45, .rf_shift = 0, .mask = 0x01, },
656 { .phy_offset = 5, .phy_shift = 13, .rf_addr = 0x52, .rf_shift = 4, .mask = 0x07, },
657 { .phy_offset = 6, .phy_shift = 0, .rf_addr = 0x52, .rf_shift = 7, .mask = 0x01, },
658 { .phy_offset = 5, .phy_shift = 3, .rf_addr = 0x41, .rf_shift = 5, .mask = 0x07, },
659 { .phy_offset = 5, .phy_shift = 6, .rf_addr = 0x41, .rf_shift = 0, .mask = 0x0f, },
660 { .phy_offset = 5, .phy_shift = 10, .rf_addr = 0x42, .rf_shift = 5, .mask = 0x07, },
661 { .phy_offset = 4, .phy_shift = 15, .rf_addr = 0x42, .rf_shift = 0, .mask = 0x01, },
662 { .phy_offset = 5, .phy_shift = 0, .rf_addr = 0x42, .rf_shift = 1, .mask = 0x07, },
663 { .phy_offset = 4, .phy_shift = 11, .rf_addr = 0x43, .rf_shift = 4, .mask = 0x0f, },
664 { .phy_offset = 4, .phy_shift = 7, .rf_addr = 0x43, .rf_shift = 0, .mask = 0x0f, },
665 { .phy_offset = 4, .phy_shift = 6, .rf_addr = 0x45, .rf_shift = 1, .mask = 0x01, },
666 { .phy_offset = 2, .phy_shift = 7, .rf_addr = 0x40, .rf_shift = 4, .mask = 0x0f, },
667 { .phy_offset = 2, .phy_shift = 11, .rf_addr = 0x40, .rf_shift = 0, .mask = 0x0f, },
668};
669
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100670static void lpphy_sync_stx(struct b43_wldev *dev)
671{
Gábor Stefanik3281d952009-08-09 20:15:09 +0200672 const struct lpphy_stx_table_entry *e;
673 unsigned int i;
674 u16 tmp;
675
676 for (i = 0; i < ARRAY_SIZE(lpphy_stx_table); i++) {
677 e = &lpphy_stx_table[i];
678 tmp = b43_radio_read(dev, e->rf_addr);
679 tmp >>= e->rf_shift;
680 tmp <<= e->phy_shift;
681 b43_phy_maskset(dev, B43_PHY_OFDM(0xF2 + e->phy_offset),
Gábor Stefanikd44517f22009-08-11 00:54:26 +0200682 ~(e->mask << e->phy_shift), tmp);
Gábor Stefanik3281d952009-08-09 20:15:09 +0200683 }
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100684}
685
686static void lpphy_radio_init(struct b43_wldev *dev)
687{
688 /* The radio is attached through the 4wire bus. */
689 b43_phy_set(dev, B43_LPPHY_FOURWIRE_CTL, 0x2);
690 udelay(1);
691 b43_phy_mask(dev, B43_LPPHY_FOURWIRE_CTL, 0xFFFD);
692 udelay(1);
693
Gábor Stefanik5269102e2009-08-16 18:05:09 +0200694 if (dev->phy.radio_ver == 0x2062) {
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100695 lpphy_2062_init(dev);
696 } else {
697 lpphy_2063_init(dev);
698 lpphy_sync_stx(dev);
699 b43_phy_write(dev, B43_PHY_OFDM(0xF0), 0x5F80);
700 b43_phy_write(dev, B43_PHY_OFDM(0xF1), 0);
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +0200701 if (dev->sdev->bus->chip_id == 0x4325) {
Gábor Stefanik3281d952009-08-09 20:15:09 +0200702 // TODO SSB PMU recalibration
703 }
Michael Buesch24b5bcc2009-01-31 19:34:53 +0100704 }
705}
706
Gábor Stefanik560ad812009-08-13 14:19:02 +0200707struct lpphy_iq_est { u32 iq_prod, i_pwr, q_pwr; };
708
Gábor Stefanikd4de9532009-08-11 21:53:06 +0200709static void lpphy_set_rc_cap(struct b43_wldev *dev)
710{
Gábor Stefanik5269102e2009-08-16 18:05:09 +0200711 struct b43_phy_lp *lpphy = dev->phy.lp;
Gábor Stefanikd4de9532009-08-11 21:53:06 +0200712
Gábor Stefanik5269102e2009-08-16 18:05:09 +0200713 u8 rc_cap = (lpphy->rc_cap & 0x1F) >> 1;
714
715 if (dev->phy.rev == 1) //FIXME check channel 14!
Gábor Stefanik6bd5f522009-08-25 16:17:48 +0200716 rc_cap = min_t(u8, rc_cap + 5, 15);
Gábor Stefanik5269102e2009-08-16 18:05:09 +0200717
718 b43_radio_write(dev, B2062_N_RXBB_CALIB2,
719 max_t(u8, lpphy->rc_cap - 4, 0x80));
720 b43_radio_write(dev, B2062_N_TX_CTL_A, rc_cap | 0x80);
721 b43_radio_write(dev, B2062_S_RXG_CNT16,
722 ((lpphy->rc_cap & 0x1F) >> 2) | 0x80);
Gábor Stefanikd4de9532009-08-11 21:53:06 +0200723}
724
Gábor Stefanik560ad812009-08-13 14:19:02 +0200725static u8 lpphy_get_bb_mult(struct b43_wldev *dev)
Gábor Stefanikd4de9532009-08-11 21:53:06 +0200726{
Gábor Stefanik560ad812009-08-13 14:19:02 +0200727 return (b43_lptab_read(dev, B43_LPTAB16(0, 87)) & 0xFF00) >> 8;
Gábor Stefanikd4de9532009-08-11 21:53:06 +0200728}
729
Gábor Stefanik560ad812009-08-13 14:19:02 +0200730static void lpphy_set_bb_mult(struct b43_wldev *dev, u8 bb_mult)
Gábor Stefanikd4de9532009-08-11 21:53:06 +0200731{
Gábor Stefanik560ad812009-08-13 14:19:02 +0200732 b43_lptab_write(dev, B43_LPTAB16(0, 87), (u16)bb_mult << 8);
733}
734
Gábor Stefanik5904d202009-08-18 19:18:13 +0200735static void lpphy_set_deaf(struct b43_wldev *dev, bool user)
Gábor Stefanik560ad812009-08-13 14:19:02 +0200736{
Gábor Stefanik5904d202009-08-18 19:18:13 +0200737 struct b43_phy_lp *lpphy = dev->phy.lp;
738
739 if (user)
740 lpphy->crs_usr_disable = 1;
741 else
742 lpphy->crs_sys_disable = 1;
Gábor Stefanik560ad812009-08-13 14:19:02 +0200743 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x80);
Gábor Stefanik5904d202009-08-18 19:18:13 +0200744}
745
746static void lpphy_clear_deaf(struct b43_wldev *dev, bool user)
747{
748 struct b43_phy_lp *lpphy = dev->phy.lp;
749
750 if (user)
751 lpphy->crs_usr_disable = 0;
752 else
753 lpphy->crs_sys_disable = 0;
754
755 if (!lpphy->crs_usr_disable && !lpphy->crs_sys_disable) {
756 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
757 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL,
758 0xFF1F, 0x60);
759 else
760 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL,
761 0xFF1F, 0x20);
762 }
763}
764
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100765static void lpphy_set_trsw_over(struct b43_wldev *dev, bool tx, bool rx)
766{
767 u16 trsw = (tx << 1) | rx;
768 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, trsw);
769 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
770}
771
Gábor Stefanik5904d202009-08-18 19:18:13 +0200772static void lpphy_disable_crs(struct b43_wldev *dev, bool user)
773{
774 lpphy_set_deaf(dev, user);
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100775 lpphy_set_trsw_over(dev, false, true);
Gábor Stefanik560ad812009-08-13 14:19:02 +0200776 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB);
777 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4);
Gábor Stefanik68ec5322009-08-26 20:51:25 +0200778 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFF7);
Gábor Stefanik560ad812009-08-13 14:19:02 +0200779 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);
780 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x10);
781 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
782 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFDF);
783 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x20);
784 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFBF);
785 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);
786 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x7);
787 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x38);
788 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFF3F);
789 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x100);
790 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFDFF);
791 b43_phy_write(dev, B43_LPPHY_PS_CTL_OVERRIDE_VAL0, 0);
792 b43_phy_write(dev, B43_LPPHY_PS_CTL_OVERRIDE_VAL1, 1);
793 b43_phy_write(dev, B43_LPPHY_PS_CTL_OVERRIDE_VAL2, 0x20);
794 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFBFF);
795 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xF7FF);
796 b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, 0);
797 b43_phy_write(dev, B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL, 0x45AF);
798 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0x3FF);
799}
800
Gábor Stefanik5904d202009-08-18 19:18:13 +0200801static void lpphy_restore_crs(struct b43_wldev *dev, bool user)
Gábor Stefanik560ad812009-08-13 14:19:02 +0200802{
Gábor Stefanik5904d202009-08-18 19:18:13 +0200803 lpphy_clear_deaf(dev, user);
Gábor Stefanik560ad812009-08-13 14:19:02 +0200804 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFF80);
805 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFC00);
806}
807
808struct lpphy_tx_gains { u16 gm, pga, pad, dac; };
809
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100810static void lpphy_disable_rx_gain_override(struct b43_wldev *dev)
811{
812 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE);
813 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF);
814 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF);
815 if (dev->phy.rev >= 2) {
816 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
817 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
818 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF);
819 b43_phy_mask(dev, B43_PHY_OFDM(0xE5), 0xFFF7);
820 }
821 } else {
822 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF);
823 }
824}
825
826static void lpphy_enable_rx_gain_override(struct b43_wldev *dev)
827{
828 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1);
829 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
830 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);
831 if (dev->phy.rev >= 2) {
832 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
833 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
834 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400);
835 b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8);
836 }
837 } else {
838 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200);
839 }
840}
841
842static void lpphy_disable_tx_gain_override(struct b43_wldev *dev)
843{
844 if (dev->phy.rev < 2)
845 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
846 else {
847 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F);
848 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF);
849 }
850 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFBF);
851}
852
853static void lpphy_enable_tx_gain_override(struct b43_wldev *dev)
854{
855 if (dev->phy.rev < 2)
856 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
857 else {
858 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x80);
859 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x4000);
860 }
861 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 0x40);
862}
863
Gábor Stefanik560ad812009-08-13 14:19:02 +0200864static struct lpphy_tx_gains lpphy_get_tx_gains(struct b43_wldev *dev)
865{
866 struct lpphy_tx_gains gains;
867 u16 tmp;
868
869 gains.dac = (b43_phy_read(dev, B43_LPPHY_AFE_DAC_CTL) & 0x380) >> 7;
870 if (dev->phy.rev < 2) {
871 tmp = b43_phy_read(dev,
872 B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL) & 0x7FF;
873 gains.gm = tmp & 0x0007;
874 gains.pga = (tmp & 0x0078) >> 3;
875 gains.pad = (tmp & 0x780) >> 7;
876 } else {
877 tmp = b43_phy_read(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL);
878 gains.pad = b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0xFF;
879 gains.gm = tmp & 0xFF;
880 gains.pga = (tmp >> 8) & 0xFF;
881 }
882
883 return gains;
884}
885
886static void lpphy_set_dac_gain(struct b43_wldev *dev, u16 dac)
887{
888 u16 ctl = b43_phy_read(dev, B43_LPPHY_AFE_DAC_CTL) & 0xC7F;
889 ctl |= dac << 7;
890 b43_phy_maskset(dev, B43_LPPHY_AFE_DAC_CTL, 0xF000, ctl);
891}
892
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100893static u16 lpphy_get_pa_gain(struct b43_wldev *dev)
894{
895 return b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x7F;
896}
897
898static void lpphy_set_pa_gain(struct b43_wldev *dev, u16 gain)
899{
900 b43_phy_maskset(dev, B43_PHY_OFDM(0xFB), 0xE03F, gain << 6);
901 b43_phy_maskset(dev, B43_PHY_OFDM(0xFD), 0x80FF, gain << 8);
902}
903
Gábor Stefanik560ad812009-08-13 14:19:02 +0200904static void lpphy_set_tx_gains(struct b43_wldev *dev,
905 struct lpphy_tx_gains gains)
906{
907 u16 rf_gain, pa_gain;
908
909 if (dev->phy.rev < 2) {
910 rf_gain = (gains.pad << 7) | (gains.pga << 3) | gains.gm;
911 b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
912 0xF800, rf_gain);
913 } else {
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100914 pa_gain = lpphy_get_pa_gain(dev);
Gábor Stefanik560ad812009-08-13 14:19:02 +0200915 b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
916 (gains.pga << 8) | gains.gm);
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100917 /*
918 * SPEC FIXME The spec calls for (pa_gain << 8) here, but that
919 * conflicts with the spec for set_pa_gain! Vendor driver bug?
920 */
Gábor Stefanik5904d202009-08-18 19:18:13 +0200921 b43_phy_maskset(dev, B43_PHY_OFDM(0xFB),
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100922 0x8000, gains.pad | (pa_gain << 6));
Gábor Stefanik560ad812009-08-13 14:19:02 +0200923 b43_phy_write(dev, B43_PHY_OFDM(0xFC),
924 (gains.pga << 8) | gains.gm);
925 b43_phy_maskset(dev, B43_PHY_OFDM(0xFD),
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100926 0x8000, gains.pad | (pa_gain << 8));
Gábor Stefanik560ad812009-08-13 14:19:02 +0200927 }
928 lpphy_set_dac_gain(dev, gains.dac);
Gábor Stefanik2c0d6102009-10-25 16:26:36 +0100929 lpphy_enable_tx_gain_override(dev);
Gábor Stefanik560ad812009-08-13 14:19:02 +0200930}
931
932static void lpphy_rev0_1_set_rx_gain(struct b43_wldev *dev, u32 gain)
933{
934 u16 trsw = gain & 0x1;
935 u16 lna = (gain & 0xFFFC) | ((gain & 0xC) >> 2);
936 u16 ext_lna = (gain & 2) >> 1;
937
938 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFE, trsw);
939 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL,
940 0xFBFF, ext_lna << 10);
941 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL,
942 0xF7FF, ext_lna << 11);
943 b43_phy_write(dev, B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL, lna);
944}
945
946static void lpphy_rev2plus_set_rx_gain(struct b43_wldev *dev, u32 gain)
947{
948 u16 low_gain = gain & 0xFFFF;
949 u16 high_gain = (gain >> 16) & 0xF;
950 u16 ext_lna = (gain >> 21) & 0x1;
951 u16 trsw = ~(gain >> 20) & 0x1;
952 u16 tmp;
953
954 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFE, trsw);
955 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL,
956 0xFDFF, ext_lna << 9);
957 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL,
958 0xFBFF, ext_lna << 10);
959 b43_phy_write(dev, B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL, low_gain);
960 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFFF0, high_gain);
961 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
962 tmp = (gain >> 2) & 0x3;
963 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL,
964 0xE7FF, tmp<<11);
965 b43_phy_maskset(dev, B43_PHY_OFDM(0xE6), 0xFFE7, tmp << 3);
966 }
967}
968
Gábor Stefanik560ad812009-08-13 14:19:02 +0200969static void lpphy_set_rx_gain(struct b43_wldev *dev, u32 gain)
970{
971 if (dev->phy.rev < 2)
972 lpphy_rev0_1_set_rx_gain(dev, gain);
973 else
974 lpphy_rev2plus_set_rx_gain(dev, gain);
975 lpphy_enable_rx_gain_override(dev);
976}
977
978static void lpphy_set_rx_gain_by_index(struct b43_wldev *dev, u16 idx)
979{
980 u32 gain = b43_lptab_read(dev, B43_LPTAB16(12, idx));
981 lpphy_set_rx_gain(dev, gain);
982}
983
984static void lpphy_stop_ddfs(struct b43_wldev *dev)
985{
986 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0xFFFD);
987 b43_phy_mask(dev, B43_LPPHY_LP_PHY_CTL, 0xFFDF);
988}
989
990static void lpphy_run_ddfs(struct b43_wldev *dev, int i_on, int q_on,
991 int incr1, int incr2, int scale_idx)
992{
993 lpphy_stop_ddfs(dev);
994 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS_POINTER_INIT, 0xFF80);
995 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS_POINTER_INIT, 0x80FF);
996 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS_INCR_INIT, 0xFF80, incr1);
997 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS_INCR_INIT, 0x80FF, incr2 << 8);
998 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFFF7, i_on << 3);
999 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFFEF, q_on << 4);
1000 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFF9F, scale_idx << 5);
1001 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0xFFFB);
1002 b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x2);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02001003 b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x20);
Gábor Stefanik560ad812009-08-13 14:19:02 +02001004}
1005
1006static bool lpphy_rx_iq_est(struct b43_wldev *dev, u16 samples, u8 time,
1007 struct lpphy_iq_est *iq_est)
1008{
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001009 int i;
1010
Gábor Stefanik560ad812009-08-13 14:19:02 +02001011 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFF7);
1012 b43_phy_write(dev, B43_LPPHY_IQ_NUM_SMPLS_ADDR, samples);
1013 b43_phy_maskset(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFF00, time);
1014 b43_phy_mask(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFEFF);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02001015 b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200);
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001016
Gábor Stefanik560ad812009-08-13 14:19:02 +02001017 for (i = 0; i < 500; i++) {
1018 if (!(b43_phy_read(dev,
1019 B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR) & 0x200))
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001020 break;
1021 msleep(1);
1022 }
1023
Gábor Stefanik560ad812009-08-13 14:19:02 +02001024 if ((b43_phy_read(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR) & 0x200)) {
1025 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x8);
1026 return false;
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001027 }
1028
Gábor Stefanik560ad812009-08-13 14:19:02 +02001029 iq_est->iq_prod = b43_phy_read(dev, B43_LPPHY_IQ_ACC_HI_ADDR);
1030 iq_est->iq_prod <<= 16;
1031 iq_est->iq_prod |= b43_phy_read(dev, B43_LPPHY_IQ_ACC_LO_ADDR);
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001032
Gábor Stefanik560ad812009-08-13 14:19:02 +02001033 iq_est->i_pwr = b43_phy_read(dev, B43_LPPHY_IQ_I_PWR_ACC_HI_ADDR);
1034 iq_est->i_pwr <<= 16;
1035 iq_est->i_pwr |= b43_phy_read(dev, B43_LPPHY_IQ_I_PWR_ACC_LO_ADDR);
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001036
Gábor Stefanik560ad812009-08-13 14:19:02 +02001037 iq_est->q_pwr = b43_phy_read(dev, B43_LPPHY_IQ_Q_PWR_ACC_HI_ADDR);
1038 iq_est->q_pwr <<= 16;
1039 iq_est->q_pwr |= b43_phy_read(dev, B43_LPPHY_IQ_Q_PWR_ACC_LO_ADDR);
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001040
Gábor Stefanik560ad812009-08-13 14:19:02 +02001041 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x8);
1042 return true;
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001043}
1044
Gábor Stefanik560ad812009-08-13 14:19:02 +02001045static int lpphy_loopback(struct b43_wldev *dev)
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001046{
Gábor Stefanik560ad812009-08-13 14:19:02 +02001047 struct lpphy_iq_est iq_est;
1048 int i, index = -1;
1049 u32 tmp;
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001050
Gábor Stefanik560ad812009-08-13 14:19:02 +02001051 memset(&iq_est, 0, sizeof(iq_est));
1052
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001053 lpphy_set_trsw_over(dev, true, true);
Gábor Stefanik6bd5f522009-08-25 16:17:48 +02001054 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 1);
Gábor Stefanik560ad812009-08-13 14:19:02 +02001055 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE);
1056 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800);
1057 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x800);
1058 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);
1059 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x8);
1060 b43_radio_write(dev, B2062_N_TX_CTL_A, 0x80);
1061 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x80);
1062 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x80);
1063 for (i = 0; i < 32; i++) {
1064 lpphy_set_rx_gain_by_index(dev, i);
1065 lpphy_run_ddfs(dev, 1, 1, 5, 5, 0);
1066 if (!(lpphy_rx_iq_est(dev, 1000, 32, &iq_est)))
1067 continue;
1068 tmp = (iq_est.i_pwr + iq_est.q_pwr) / 1000;
1069 if ((tmp > 4000) && (tmp < 10000)) {
1070 index = i;
1071 break;
1072 }
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001073 }
Gábor Stefanik560ad812009-08-13 14:19:02 +02001074 lpphy_stop_ddfs(dev);
1075 return index;
1076}
1077
Gábor Stefanikd8fa3382009-08-26 20:51:24 +02001078/* Fixed-point division algorithm using only integer math. */
Gábor Stefanik560ad812009-08-13 14:19:02 +02001079static u32 lpphy_qdiv_roundup(u32 dividend, u32 divisor, u8 precision)
1080{
Gábor Stefanikd8fa3382009-08-26 20:51:24 +02001081 u32 quotient, remainder;
Gábor Stefanik560ad812009-08-13 14:19:02 +02001082
Gábor Stefanik5904d202009-08-18 19:18:13 +02001083 if (divisor == 0)
1084 return 0;
1085
1086 quotient = dividend / divisor;
1087 remainder = dividend % divisor;
Gábor Stefanik560ad812009-08-13 14:19:02 +02001088
Gábor Stefanikd8fa3382009-08-26 20:51:24 +02001089 while (precision > 0) {
Gábor Stefanik560ad812009-08-13 14:19:02 +02001090 quotient <<= 1;
Gábor Stefanikd8fa3382009-08-26 20:51:24 +02001091 if (remainder << 1 >= divisor) {
1092 quotient++;
1093 remainder = (remainder << 1) - divisor;
1094 }
Gábor Stefanik560ad812009-08-13 14:19:02 +02001095 precision--;
1096 }
1097
Gábor Stefanikd8fa3382009-08-26 20:51:24 +02001098 if (remainder << 1 >= divisor)
Gábor Stefanik560ad812009-08-13 14:19:02 +02001099 quotient++;
1100
1101 return quotient;
Gábor Stefanikd4de9532009-08-11 21:53:06 +02001102}
1103
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001104/* Read the TX power control mode from hardware. */
1105static void lpphy_read_tx_pctl_mode_from_hardware(struct b43_wldev *dev)
1106{
1107 struct b43_phy_lp *lpphy = dev->phy.lp;
1108 u16 ctl;
1109
1110 ctl = b43_phy_read(dev, B43_LPPHY_TX_PWR_CTL_CMD);
1111 switch (ctl & B43_LPPHY_TX_PWR_CTL_CMD_MODE) {
1112 case B43_LPPHY_TX_PWR_CTL_CMD_MODE_OFF:
1113 lpphy->txpctl_mode = B43_LPPHY_TXPCTL_OFF;
1114 break;
1115 case B43_LPPHY_TX_PWR_CTL_CMD_MODE_SW:
1116 lpphy->txpctl_mode = B43_LPPHY_TXPCTL_SW;
1117 break;
1118 case B43_LPPHY_TX_PWR_CTL_CMD_MODE_HW:
1119 lpphy->txpctl_mode = B43_LPPHY_TXPCTL_HW;
1120 break;
1121 default:
1122 lpphy->txpctl_mode = B43_LPPHY_TXPCTL_UNKNOWN;
1123 B43_WARN_ON(1);
1124 break;
1125 }
1126}
1127
1128/* Set the TX power control mode in hardware. */
1129static void lpphy_write_tx_pctl_mode_to_hardware(struct b43_wldev *dev)
1130{
1131 struct b43_phy_lp *lpphy = dev->phy.lp;
1132 u16 ctl;
1133
1134 switch (lpphy->txpctl_mode) {
1135 case B43_LPPHY_TXPCTL_OFF:
1136 ctl = B43_LPPHY_TX_PWR_CTL_CMD_MODE_OFF;
1137 break;
1138 case B43_LPPHY_TXPCTL_HW:
1139 ctl = B43_LPPHY_TX_PWR_CTL_CMD_MODE_HW;
1140 break;
1141 case B43_LPPHY_TXPCTL_SW:
1142 ctl = B43_LPPHY_TX_PWR_CTL_CMD_MODE_SW;
1143 break;
1144 default:
1145 ctl = 0;
1146 B43_WARN_ON(1);
1147 }
1148 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_CMD,
John W. Linville41950bd2010-07-21 11:37:19 -04001149 ~B43_LPPHY_TX_PWR_CTL_CMD_MODE & 0xFFFF, ctl);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001150}
1151
1152static void lpphy_set_tx_power_control(struct b43_wldev *dev,
1153 enum b43_lpphy_txpctl_mode mode)
1154{
1155 struct b43_phy_lp *lpphy = dev->phy.lp;
1156 enum b43_lpphy_txpctl_mode oldmode;
1157
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001158 lpphy_read_tx_pctl_mode_from_hardware(dev);
Gábor Stefanik12d4bba2009-08-14 20:29:47 +02001159 oldmode = lpphy->txpctl_mode;
1160 if (oldmode == mode)
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001161 return;
1162 lpphy->txpctl_mode = mode;
1163
1164 if (oldmode == B43_LPPHY_TXPCTL_HW) {
1165 //TODO Update TX Power NPT
1166 //TODO Clear all TX Power offsets
1167 } else {
1168 if (mode == B43_LPPHY_TXPCTL_HW) {
1169 //TODO Recalculate target TX power
1170 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_CMD,
1171 0xFF80, lpphy->tssi_idx);
1172 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM,
1173 0x8FFF, ((u16)lpphy->tssi_npt << 16));
1174 //TODO Set "TSSI Transmit Count" variable to total transmitted frame count
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001175 lpphy_disable_tx_gain_override(dev);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001176 lpphy->tx_pwr_idx_over = -1;
1177 }
1178 }
1179 if (dev->phy.rev >= 2) {
1180 if (mode == B43_LPPHY_TXPCTL_HW)
Gábor Stefanik68ec5322009-08-26 20:51:25 +02001181 b43_phy_set(dev, B43_PHY_OFDM(0xD0), 0x2);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001182 else
Gábor Stefanik68ec5322009-08-26 20:51:25 +02001183 b43_phy_mask(dev, B43_PHY_OFDM(0xD0), 0xFFFD);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001184 }
1185 lpphy_write_tx_pctl_mode_to_hardware(dev);
1186}
1187
Gábor Stefanik5269102e2009-08-16 18:05:09 +02001188static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
1189 unsigned int new_channel);
1190
Gábor Stefanik560ad812009-08-13 14:19:02 +02001191static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
1192{
1193 struct b43_phy_lp *lpphy = dev->phy.lp;
1194 struct lpphy_iq_est iq_est;
1195 struct lpphy_tx_gains tx_gains;
Gábor Stefanik5904d202009-08-18 19:18:13 +02001196 static const u32 ideal_pwr_table[21] = {
Gábor Stefanik560ad812009-08-13 14:19:02 +02001197 0x10000, 0x10557, 0x10e2d, 0x113e0, 0x10f22, 0x0ff64,
1198 0x0eda2, 0x0e5d4, 0x0efd1, 0x0fbe8, 0x0b7b8, 0x04b35,
1199 0x01a5e, 0x00a0b, 0x00444, 0x001fd, 0x000ff, 0x00088,
Gábor Stefanik5904d202009-08-18 19:18:13 +02001200 0x0004c, 0x0002c, 0x0001a,
Gábor Stefanik560ad812009-08-13 14:19:02 +02001201 };
1202 bool old_txg_ovr;
1203 u8 old_bbmult;
1204 u16 old_rf_ovr, old_rf_ovrval, old_afe_ovr, old_afe_ovrval,
Gábor Stefanik12456842009-08-14 23:00:32 +02001205 old_rf2_ovr, old_rf2_ovrval, old_phy_ctl;
1206 enum b43_lpphy_txpctl_mode old_txpctl;
Gábor Stefanik560ad812009-08-13 14:19:02 +02001207 u32 normal_pwr, ideal_pwr, mean_sq_pwr, tmp = 0, mean_sq_pwr_min = 0;
Gábor Stefanik5269102e2009-08-16 18:05:09 +02001208 int loopback, i, j, inner_sum, err;
Gábor Stefanik560ad812009-08-13 14:19:02 +02001209
1210 memset(&iq_est, 0, sizeof(iq_est));
1211
Gábor Stefanik5269102e2009-08-16 18:05:09 +02001212 err = b43_lpphy_op_switch_channel(dev, 7);
1213 if (err) {
1214 b43dbg(dev->wl,
Gábor Stefanik68ec5322009-08-26 20:51:25 +02001215 "RC calib: Failed to switch to channel 7, error = %d\n",
Gábor Stefanik5269102e2009-08-16 18:05:09 +02001216 err);
1217 }
Gábor Stefanik5904d202009-08-18 19:18:13 +02001218 old_txg_ovr = !!(b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40);
Gábor Stefanik560ad812009-08-13 14:19:02 +02001219 old_bbmult = lpphy_get_bb_mult(dev);
1220 if (old_txg_ovr)
1221 tx_gains = lpphy_get_tx_gains(dev);
1222 old_rf_ovr = b43_phy_read(dev, B43_LPPHY_RF_OVERRIDE_0);
1223 old_rf_ovrval = b43_phy_read(dev, B43_LPPHY_RF_OVERRIDE_VAL_0);
1224 old_afe_ovr = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR);
1225 old_afe_ovrval = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVRVAL);
1226 old_rf2_ovr = b43_phy_read(dev, B43_LPPHY_RF_OVERRIDE_2);
1227 old_rf2_ovrval = b43_phy_read(dev, B43_LPPHY_RF_OVERRIDE_2_VAL);
1228 old_phy_ctl = b43_phy_read(dev, B43_LPPHY_LP_PHY_CTL);
Gábor Stefanik12456842009-08-14 23:00:32 +02001229 lpphy_read_tx_pctl_mode_from_hardware(dev);
1230 old_txpctl = lpphy->txpctl_mode;
Gábor Stefanik560ad812009-08-13 14:19:02 +02001231
Gábor Stefanik5f1c07d2009-08-14 21:19:58 +02001232 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
Gábor Stefanik5904d202009-08-18 19:18:13 +02001233 lpphy_disable_crs(dev, true);
Gábor Stefanik560ad812009-08-13 14:19:02 +02001234 loopback = lpphy_loopback(dev);
1235 if (loopback == -1)
1236 goto finish;
1237 lpphy_set_rx_gain_by_index(dev, loopback);
1238 b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xFFBF, 0x40);
1239 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFFF8, 0x1);
1240 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFFC7, 0x8);
1241 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFF3F, 0xC0);
1242 for (i = 128; i <= 159; i++) {
1243 b43_radio_write(dev, B2062_N_RXBB_CALIB2, i);
1244 inner_sum = 0;
1245 for (j = 5; j <= 25; j++) {
1246 lpphy_run_ddfs(dev, 1, 1, j, j, 0);
1247 if (!(lpphy_rx_iq_est(dev, 1000, 32, &iq_est)))
1248 goto finish;
1249 mean_sq_pwr = iq_est.i_pwr + iq_est.q_pwr;
1250 if (j == 5)
1251 tmp = mean_sq_pwr;
1252 ideal_pwr = ((ideal_pwr_table[j-5] >> 3) + 1) >> 1;
1253 normal_pwr = lpphy_qdiv_roundup(mean_sq_pwr, tmp, 12);
1254 mean_sq_pwr = ideal_pwr - normal_pwr;
1255 mean_sq_pwr *= mean_sq_pwr;
1256 inner_sum += mean_sq_pwr;
Gábor Stefanik6bd5f522009-08-25 16:17:48 +02001257 if ((i == 128) || (inner_sum < mean_sq_pwr_min)) {
Gábor Stefanik560ad812009-08-13 14:19:02 +02001258 lpphy->rc_cap = i;
1259 mean_sq_pwr_min = inner_sum;
1260 }
1261 }
1262 }
1263 lpphy_stop_ddfs(dev);
1264
1265finish:
Gábor Stefanik5904d202009-08-18 19:18:13 +02001266 lpphy_restore_crs(dev, true);
Gábor Stefanik560ad812009-08-13 14:19:02 +02001267 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, old_rf_ovrval);
1268 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, old_rf_ovr);
1269 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, old_afe_ovrval);
1270 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVR, old_afe_ovr);
1271 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, old_rf2_ovrval);
1272 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, old_rf2_ovr);
1273 b43_phy_write(dev, B43_LPPHY_LP_PHY_CTL, old_phy_ctl);
1274
1275 lpphy_set_bb_mult(dev, old_bbmult);
1276 if (old_txg_ovr) {
1277 /*
1278 * SPEC FIXME: The specs say "get_tx_gains" here, which is
1279 * illogical. According to lwfinger, vendor driver v4.150.10.5
1280 * has a Set here, while v4.174.64.19 has a Get - regression in
1281 * the vendor driver? This should be tested this once the code
1282 * is testable.
1283 */
1284 lpphy_set_tx_gains(dev, tx_gains);
1285 }
1286 lpphy_set_tx_power_control(dev, old_txpctl);
1287 if (lpphy->rc_cap)
1288 lpphy_set_rc_cap(dev);
1289}
1290
1291static void lpphy_rev2plus_rc_calib(struct b43_wldev *dev)
1292{
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +02001293 struct ssb_bus *bus = dev->sdev->bus;
Gábor Stefanik560ad812009-08-13 14:19:02 +02001294 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
1295 u8 tmp = b43_radio_read(dev, B2063_RX_BB_SP8) & 0xFF;
1296 int i;
1297
1298 b43_radio_write(dev, B2063_RX_BB_SP8, 0x0);
1299 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7E);
1300 b43_radio_mask(dev, B2063_PLL_SP1, 0xF7);
1301 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7C);
1302 b43_radio_write(dev, B2063_RC_CALIB_CTL2, 0x15);
1303 b43_radio_write(dev, B2063_RC_CALIB_CTL3, 0x70);
1304 b43_radio_write(dev, B2063_RC_CALIB_CTL4, 0x52);
1305 b43_radio_write(dev, B2063_RC_CALIB_CTL5, 0x1);
1306 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7D);
1307
1308 for (i = 0; i < 10000; i++) {
1309 if (b43_radio_read(dev, B2063_RC_CALIB_CTL6) & 0x2)
1310 break;
1311 msleep(1);
1312 }
1313
1314 if (!(b43_radio_read(dev, B2063_RC_CALIB_CTL6) & 0x2))
1315 b43_radio_write(dev, B2063_RX_BB_SP8, tmp);
1316
1317 tmp = b43_radio_read(dev, B2063_TX_BB_SP3) & 0xFF;
1318
1319 b43_radio_write(dev, B2063_TX_BB_SP3, 0x0);
1320 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7E);
1321 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7C);
1322 b43_radio_write(dev, B2063_RC_CALIB_CTL2, 0x55);
1323 b43_radio_write(dev, B2063_RC_CALIB_CTL3, 0x76);
1324
1325 if (crystal_freq == 24000000) {
1326 b43_radio_write(dev, B2063_RC_CALIB_CTL4, 0xFC);
1327 b43_radio_write(dev, B2063_RC_CALIB_CTL5, 0x0);
1328 } else {
1329 b43_radio_write(dev, B2063_RC_CALIB_CTL4, 0x13);
1330 b43_radio_write(dev, B2063_RC_CALIB_CTL5, 0x1);
1331 }
1332
1333 b43_radio_write(dev, B2063_PA_SP7, 0x7D);
1334
1335 for (i = 0; i < 10000; i++) {
1336 if (b43_radio_read(dev, B2063_RC_CALIB_CTL6) & 0x2)
1337 break;
1338 msleep(1);
1339 }
1340
1341 if (!(b43_radio_read(dev, B2063_RC_CALIB_CTL6) & 0x2))
1342 b43_radio_write(dev, B2063_TX_BB_SP3, tmp);
1343
1344 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7E);
1345}
1346
1347static void lpphy_calibrate_rc(struct b43_wldev *dev)
1348{
1349 struct b43_phy_lp *lpphy = dev->phy.lp;
1350
1351 if (dev->phy.rev >= 2) {
1352 lpphy_rev2plus_rc_calib(dev);
1353 } else if (!lpphy->rc_cap) {
1354 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
1355 lpphy_rev0_1_rc_calib(dev);
1356 } else {
1357 lpphy_set_rc_cap(dev);
1358 }
1359}
1360
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001361static void b43_lpphy_op_set_rx_antenna(struct b43_wldev *dev, int antenna)
1362{
1363 if (dev->phy.rev >= 2)
1364 return; // rev2+ doesn't support antenna diversity
1365
1366 if (B43_WARN_ON(antenna > B43_ANTENNA_AUTO1))
1367 return;
1368
1369 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_ANTDIVHELP);
1370
1371 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFD, antenna & 0x2);
1372 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFE, antenna & 0x1);
1373
1374 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_ANTDIVHELP);
1375
1376 dev->phy.lp->antenna = antenna;
1377}
1378
1379static void lpphy_set_tx_iqcc(struct b43_wldev *dev, u16 a, u16 b)
1380{
1381 u16 tmp[2];
1382
1383 tmp[0] = a;
1384 tmp[1] = b;
1385 b43_lptab_write_bulk(dev, B43_LPTAB16(0, 80), 2, tmp);
1386}
1387
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001388static void lpphy_set_tx_power_by_index(struct b43_wldev *dev, u8 index)
1389{
1390 struct b43_phy_lp *lpphy = dev->phy.lp;
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001391 struct lpphy_tx_gains gains;
1392 u32 iq_comp, tx_gain, coeff, rf_power;
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001393
1394 lpphy->tx_pwr_idx_over = index;
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001395 lpphy_read_tx_pctl_mode_from_hardware(dev);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001396 if (lpphy->txpctl_mode != B43_LPPHY_TXPCTL_OFF)
1397 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_SW);
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001398 if (dev->phy.rev >= 2) {
1399 iq_comp = b43_lptab_read(dev, B43_LPTAB32(7, index + 320));
1400 tx_gain = b43_lptab_read(dev, B43_LPTAB32(7, index + 192));
1401 gains.pad = (tx_gain >> 16) & 0xFF;
1402 gains.gm = tx_gain & 0xFF;
1403 gains.pga = (tx_gain >> 8) & 0xFF;
1404 gains.dac = (iq_comp >> 28) & 0xFF;
1405 lpphy_set_tx_gains(dev, gains);
1406 } else {
1407 iq_comp = b43_lptab_read(dev, B43_LPTAB32(10, index + 320));
1408 tx_gain = b43_lptab_read(dev, B43_LPTAB32(10, index + 192));
1409 b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
1410 0xF800, (tx_gain >> 4) & 0x7FFF);
1411 lpphy_set_dac_gain(dev, tx_gain & 0x7);
1412 lpphy_set_pa_gain(dev, (tx_gain >> 24) & 0x7F);
1413 }
1414 lpphy_set_bb_mult(dev, (iq_comp >> 20) & 0xFF);
1415 lpphy_set_tx_iqcc(dev, (iq_comp >> 10) & 0x3FF, iq_comp & 0x3FF);
1416 if (dev->phy.rev >= 2) {
1417 coeff = b43_lptab_read(dev, B43_LPTAB32(7, index + 448));
1418 } else {
1419 coeff = b43_lptab_read(dev, B43_LPTAB32(10, index + 448));
1420 }
1421 b43_lptab_write(dev, B43_LPTAB16(0, 85), coeff & 0xFFFF);
1422 if (dev->phy.rev >= 2) {
1423 rf_power = b43_lptab_read(dev, B43_LPTAB32(7, index + 576));
1424 b43_phy_maskset(dev, B43_LPPHY_RF_PWR_OVERRIDE, 0xFF00,
1425 rf_power & 0xFFFF);//SPEC FIXME mask & set != 0
1426 }
1427 lpphy_enable_tx_gain_override(dev);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001428}
1429
1430static void lpphy_btcoex_override(struct b43_wldev *dev)
1431{
1432 b43_write16(dev, B43_MMIO_BTCOEX_CTL, 0x3);
1433 b43_write16(dev, B43_MMIO_BTCOEX_TXCTL, 0xFF);
1434}
1435
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001436static void b43_lpphy_op_software_rfkill(struct b43_wldev *dev,
1437 bool blocked)
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001438{
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001439 //TODO check MAC control register
1440 if (blocked) {
1441 if (dev->phy.rev >= 2) {
1442 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x83FF);
1443 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00);
1444 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0x80FF);
1445 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xDFFF);
1446 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0808);
1447 } else {
1448 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xE0FF);
1449 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00);
1450 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFCFF);
1451 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0018);
1452 }
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001453 } else {
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001454 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xE0FF);
1455 if (dev->phy.rev >= 2)
1456 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xF7F7);
1457 else
1458 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFFE7);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001459 }
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001460}
1461
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001462/* This was previously called lpphy_japan_filter */
1463static void lpphy_set_analog_filter(struct b43_wldev *dev, int channel)
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001464{
1465 struct b43_phy_lp *lpphy = dev->phy.lp;
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001466 u16 tmp = (channel == 14); //SPEC FIXME check japanwidefilter!
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001467
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001468 if (dev->phy.rev < 2) { //SPEC FIXME Isn't this rev0/1-specific?
1469 b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xFCFF, tmp << 9);
1470 if ((dev->phy.rev == 1) && (lpphy->rc_cap))
1471 lpphy_set_rc_cap(dev);
1472 } else {
1473 b43_radio_write(dev, B2063_TX_BB_SP3, 0x3F);
1474 }
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001475}
1476
Gábor Stefanik7021f622009-08-13 17:27:31 +02001477static void lpphy_set_tssi_mux(struct b43_wldev *dev, enum tssi_mux_mode mode)
1478{
1479 if (mode != TSSI_MUX_EXT) {
1480 b43_radio_set(dev, B2063_PA_SP1, 0x2);
1481 b43_phy_set(dev, B43_PHY_OFDM(0xF3), 0x1000);
1482 b43_radio_write(dev, B2063_PA_CTL10, 0x51);
1483 if (mode == TSSI_MUX_POSTPA) {
1484 b43_radio_mask(dev, B2063_PA_SP1, 0xFFFE);
1485 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFC7);
1486 } else {
1487 b43_radio_maskset(dev, B2063_PA_SP1, 0xFFFE, 0x1);
1488 b43_phy_maskset(dev, B43_LPPHY_AFE_CTL_OVRVAL,
1489 0xFFC7, 0x20);
1490 }
1491 } else {
1492 B43_WARN_ON(1);
1493 }
1494}
1495
1496static void lpphy_tx_pctl_init_hw(struct b43_wldev *dev)
1497{
1498 u16 tmp;
1499 int i;
1500
1501 //SPEC TODO Call LP PHY Clear TX Power offsets
1502 for (i = 0; i < 64; i++) {
1503 if (dev->phy.rev >= 2)
1504 b43_lptab_write(dev, B43_LPTAB32(7, i + 1), i);
1505 else
1506 b43_lptab_write(dev, B43_LPTAB32(10, i + 1), i);
1507 }
1508
1509 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM, 0xFF00, 0xFF);
1510 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM, 0x8FFF, 0x5000);
1511 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_IDLETSSI, 0xFFC0, 0x1F);
1512 if (dev->phy.rev < 2) {
1513 b43_phy_mask(dev, B43_LPPHY_LP_PHY_CTL, 0xEFFF);
1514 b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xDFFF, 0x2000);
1515 } else {
1516 b43_phy_mask(dev, B43_PHY_OFDM(0x103), 0xFFFE);
1517 b43_phy_maskset(dev, B43_PHY_OFDM(0x103), 0xFFFB, 0x4);
1518 b43_phy_maskset(dev, B43_PHY_OFDM(0x103), 0xFFEF, 0x10);
1519 b43_radio_maskset(dev, B2063_IQ_CALIB_CTL2, 0xF3, 0x1);
1520 lpphy_set_tssi_mux(dev, TSSI_MUX_POSTPA);
1521 }
1522 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_IDLETSSI, 0x7FFF, 0x8000);
1523 b43_phy_mask(dev, B43_LPPHY_TX_PWR_CTL_DELTAPWR_LIMIT, 0xFF);
1524 b43_phy_write(dev, B43_LPPHY_TX_PWR_CTL_DELTAPWR_LIMIT, 0xA);
1525 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_CMD,
John W. Linville41950bd2010-07-21 11:37:19 -04001526 ~B43_LPPHY_TX_PWR_CTL_CMD_MODE & 0xFFFF,
Gábor Stefanik7021f622009-08-13 17:27:31 +02001527 B43_LPPHY_TX_PWR_CTL_CMD_MODE_OFF);
1528 b43_phy_mask(dev, B43_LPPHY_TX_PWR_CTL_NNUM, 0xF8FF);
1529 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_CMD,
John W. Linville41950bd2010-07-21 11:37:19 -04001530 ~B43_LPPHY_TX_PWR_CTL_CMD_MODE & 0xFFFF,
Gábor Stefanik7021f622009-08-13 17:27:31 +02001531 B43_LPPHY_TX_PWR_CTL_CMD_MODE_SW);
1532
1533 if (dev->phy.rev < 2) {
1534 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_0, 0xEFFF, 0x1000);
1535 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xEFFF);
1536 } else {
1537 lpphy_set_tx_power_by_index(dev, 0x7F);
1538 }
1539
1540 b43_dummy_transmission(dev, true, true);
1541
1542 tmp = b43_phy_read(dev, B43_LPPHY_TX_PWR_CTL_STAT);
1543 if (tmp & 0x8000) {
1544 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_IDLETSSI,
1545 0xFFC0, (tmp & 0xFF) - 32);
1546 }
1547
1548 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xEFFF);
1549
1550 // (SPEC?) TODO Set "Target TX frequency" variable to 0
1551 // SPEC FIXME "Set BB Multiplier to 0xE000" impossible - bb_mult is u8!
1552}
1553
1554static void lpphy_tx_pctl_init_sw(struct b43_wldev *dev)
1555{
1556 struct lpphy_tx_gains gains;
1557
1558 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
1559 gains.gm = 4;
1560 gains.pad = 12;
1561 gains.pga = 12;
1562 gains.dac = 0;
1563 } else {
1564 gains.gm = 7;
1565 gains.pad = 14;
1566 gains.pga = 15;
1567 gains.dac = 0;
1568 }
1569 lpphy_set_tx_gains(dev, gains);
1570 lpphy_set_bb_mult(dev, 150);
1571}
1572
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001573/* Initialize TX power control */
1574static void lpphy_tx_pctl_init(struct b43_wldev *dev)
1575{
1576 if (0/*FIXME HWPCTL capable */) {
Gábor Stefanik7021f622009-08-13 17:27:31 +02001577 lpphy_tx_pctl_init_hw(dev);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001578 } else { /* This device is only software TX power control capable. */
Gábor Stefanik7021f622009-08-13 17:27:31 +02001579 lpphy_tx_pctl_init_sw(dev);
Michael Bueschce1a9ee32009-02-04 19:55:22 +01001580 }
1581}
1582
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001583static void lpphy_pr41573_workaround(struct b43_wldev *dev)
1584{
1585 struct b43_phy_lp *lpphy = dev->phy.lp;
1586 u32 *saved_tab;
1587 const unsigned int saved_tab_size = 256;
1588 enum b43_lpphy_txpctl_mode txpctl_mode;
1589 s8 tx_pwr_idx_over;
1590 u16 tssi_npt, tssi_idx;
1591
1592 saved_tab = kcalloc(saved_tab_size, sizeof(saved_tab[0]), GFP_KERNEL);
1593 if (!saved_tab) {
1594 b43err(dev->wl, "PR41573 failed. Out of memory!\n");
1595 return;
1596 }
1597
1598 lpphy_read_tx_pctl_mode_from_hardware(dev);
1599 txpctl_mode = lpphy->txpctl_mode;
1600 tx_pwr_idx_over = lpphy->tx_pwr_idx_over;
1601 tssi_npt = lpphy->tssi_npt;
1602 tssi_idx = lpphy->tssi_idx;
1603
1604 if (dev->phy.rev < 2) {
1605 b43_lptab_read_bulk(dev, B43_LPTAB32(10, 0x140),
1606 saved_tab_size, saved_tab);
1607 } else {
1608 b43_lptab_read_bulk(dev, B43_LPTAB32(7, 0x140),
1609 saved_tab_size, saved_tab);
1610 }
1611 //FIXME PHY reset
1612 lpphy_table_init(dev); //FIXME is table init needed?
1613 lpphy_baseband_init(dev);
1614 lpphy_tx_pctl_init(dev);
1615 b43_lpphy_op_software_rfkill(dev, false);
1616 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
1617 if (dev->phy.rev < 2) {
1618 b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0x140),
1619 saved_tab_size, saved_tab);
1620 } else {
1621 b43_lptab_write_bulk(dev, B43_LPTAB32(7, 0x140),
1622 saved_tab_size, saved_tab);
1623 }
1624 b43_write16(dev, B43_MMIO_CHANNEL, lpphy->channel);
1625 lpphy->tssi_npt = tssi_npt;
1626 lpphy->tssi_idx = tssi_idx;
1627 lpphy_set_analog_filter(dev, lpphy->channel);
1628 if (tx_pwr_idx_over != -1)
1629 lpphy_set_tx_power_by_index(dev, tx_pwr_idx_over);
1630 if (lpphy->rc_cap)
1631 lpphy_set_rc_cap(dev);
1632 b43_lpphy_op_set_rx_antenna(dev, lpphy->antenna);
1633 lpphy_set_tx_power_control(dev, txpctl_mode);
1634 kfree(saved_tab);
1635}
1636
1637struct lpphy_rx_iq_comp { u8 chan; s8 c1, c0; };
1638
1639static const struct lpphy_rx_iq_comp lpphy_5354_iq_table[] = {
1640 { .chan = 1, .c1 = -66, .c0 = 15, },
1641 { .chan = 2, .c1 = -66, .c0 = 15, },
1642 { .chan = 3, .c1 = -66, .c0 = 15, },
1643 { .chan = 4, .c1 = -66, .c0 = 15, },
1644 { .chan = 5, .c1 = -66, .c0 = 15, },
1645 { .chan = 6, .c1 = -66, .c0 = 15, },
1646 { .chan = 7, .c1 = -66, .c0 = 14, },
1647 { .chan = 8, .c1 = -66, .c0 = 14, },
1648 { .chan = 9, .c1 = -66, .c0 = 14, },
1649 { .chan = 10, .c1 = -66, .c0 = 14, },
1650 { .chan = 11, .c1 = -66, .c0 = 14, },
1651 { .chan = 12, .c1 = -66, .c0 = 13, },
1652 { .chan = 13, .c1 = -66, .c0 = 13, },
1653 { .chan = 14, .c1 = -66, .c0 = 13, },
1654};
1655
1656static const struct lpphy_rx_iq_comp lpphy_rev0_1_iq_table[] = {
1657 { .chan = 1, .c1 = -64, .c0 = 13, },
1658 { .chan = 2, .c1 = -64, .c0 = 13, },
1659 { .chan = 3, .c1 = -64, .c0 = 13, },
1660 { .chan = 4, .c1 = -64, .c0 = 13, },
1661 { .chan = 5, .c1 = -64, .c0 = 12, },
1662 { .chan = 6, .c1 = -64, .c0 = 12, },
1663 { .chan = 7, .c1 = -64, .c0 = 12, },
1664 { .chan = 8, .c1 = -64, .c0 = 12, },
1665 { .chan = 9, .c1 = -64, .c0 = 12, },
1666 { .chan = 10, .c1 = -64, .c0 = 11, },
1667 { .chan = 11, .c1 = -64, .c0 = 11, },
1668 { .chan = 12, .c1 = -64, .c0 = 11, },
1669 { .chan = 13, .c1 = -64, .c0 = 11, },
1670 { .chan = 14, .c1 = -64, .c0 = 10, },
1671 { .chan = 34, .c1 = -62, .c0 = 24, },
1672 { .chan = 38, .c1 = -62, .c0 = 24, },
1673 { .chan = 42, .c1 = -62, .c0 = 24, },
1674 { .chan = 46, .c1 = -62, .c0 = 23, },
1675 { .chan = 36, .c1 = -62, .c0 = 24, },
1676 { .chan = 40, .c1 = -62, .c0 = 24, },
1677 { .chan = 44, .c1 = -62, .c0 = 23, },
1678 { .chan = 48, .c1 = -62, .c0 = 23, },
1679 { .chan = 52, .c1 = -62, .c0 = 23, },
1680 { .chan = 56, .c1 = -62, .c0 = 22, },
1681 { .chan = 60, .c1 = -62, .c0 = 22, },
1682 { .chan = 64, .c1 = -62, .c0 = 22, },
1683 { .chan = 100, .c1 = -62, .c0 = 16, },
1684 { .chan = 104, .c1 = -62, .c0 = 16, },
1685 { .chan = 108, .c1 = -62, .c0 = 15, },
1686 { .chan = 112, .c1 = -62, .c0 = 14, },
1687 { .chan = 116, .c1 = -62, .c0 = 14, },
1688 { .chan = 120, .c1 = -62, .c0 = 13, },
1689 { .chan = 124, .c1 = -62, .c0 = 12, },
1690 { .chan = 128, .c1 = -62, .c0 = 12, },
1691 { .chan = 132, .c1 = -62, .c0 = 12, },
1692 { .chan = 136, .c1 = -62, .c0 = 11, },
1693 { .chan = 140, .c1 = -62, .c0 = 10, },
1694 { .chan = 149, .c1 = -61, .c0 = 9, },
1695 { .chan = 153, .c1 = -61, .c0 = 9, },
1696 { .chan = 157, .c1 = -61, .c0 = 9, },
1697 { .chan = 161, .c1 = -61, .c0 = 8, },
1698 { .chan = 165, .c1 = -61, .c0 = 8, },
1699 { .chan = 184, .c1 = -62, .c0 = 25, },
1700 { .chan = 188, .c1 = -62, .c0 = 25, },
1701 { .chan = 192, .c1 = -62, .c0 = 25, },
1702 { .chan = 196, .c1 = -62, .c0 = 25, },
1703 { .chan = 200, .c1 = -62, .c0 = 25, },
1704 { .chan = 204, .c1 = -62, .c0 = 25, },
1705 { .chan = 208, .c1 = -62, .c0 = 25, },
1706 { .chan = 212, .c1 = -62, .c0 = 25, },
1707 { .chan = 216, .c1 = -62, .c0 = 26, },
1708};
1709
1710static const struct lpphy_rx_iq_comp lpphy_rev2plus_iq_comp = {
1711 .chan = 0,
1712 .c1 = -64,
1713 .c0 = 0,
1714};
1715
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001716static int lpphy_calc_rx_iq_comp(struct b43_wldev *dev, u16 samples)
1717{
1718 struct lpphy_iq_est iq_est;
1719 u16 c0, c1;
1720 int prod, ipwr, qpwr, prod_msb, q_msb, tmp1, tmp2, tmp3, tmp4, ret;
1721
1722 c1 = b43_phy_read(dev, B43_LPPHY_RX_COMP_COEFF_S);
1723 c0 = c1 >> 8;
1724 c1 |= 0xFF;
1725
1726 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, 0x00C0);
1727 b43_phy_mask(dev, B43_LPPHY_RX_COMP_COEFF_S, 0x00FF);
1728
1729 ret = lpphy_rx_iq_est(dev, samples, 32, &iq_est);
1730 if (!ret)
1731 goto out;
1732
1733 prod = iq_est.iq_prod;
1734 ipwr = iq_est.i_pwr;
1735 qpwr = iq_est.q_pwr;
1736
1737 if (ipwr + qpwr < 2) {
1738 ret = 0;
1739 goto out;
1740 }
1741
Rafał Miłecki857c0fc2010-01-15 12:01:49 +01001742 prod_msb = fls(abs(prod));
1743 q_msb = fls(abs(qpwr));
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001744 tmp1 = prod_msb - 20;
1745
1746 if (tmp1 >= 0) {
1747 tmp3 = ((prod << (30 - prod_msb)) + (ipwr >> (1 + tmp1))) /
1748 (ipwr >> tmp1);
1749 } else {
1750 tmp3 = ((prod << (30 - prod_msb)) + (ipwr << (-1 - tmp1))) /
1751 (ipwr << -tmp1);
1752 }
1753
1754 tmp2 = q_msb - 11;
1755
1756 if (tmp2 >= 0)
1757 tmp4 = (qpwr << (31 - q_msb)) / (ipwr >> tmp2);
1758 else
1759 tmp4 = (qpwr << (31 - q_msb)) / (ipwr << -tmp2);
1760
1761 tmp4 -= tmp3 * tmp3;
1762 tmp4 = -int_sqrt(tmp4);
1763
1764 c0 = tmp3 >> 3;
1765 c1 = tmp4 >> 4;
1766
1767out:
1768 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, c1);
1769 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0x00FF, c0 << 8);
1770 return ret;
1771}
1772
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001773static void lpphy_run_samples(struct b43_wldev *dev, u16 samples, u16 loops,
1774 u16 wait)
1775{
1776 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_BUFFER_CTL,
1777 0xFFC0, samples - 1);
1778 if (loops != 0xFFFF)
1779 loops--;
1780 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_COUNT, 0xF000, loops);
1781 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_BUFFER_CTL, 0x3F, wait << 6);
1782 b43_phy_set(dev, B43_LPPHY_A_PHY_CTL_ADDR, 0x1);
1783}
1784
1785//SPEC FIXME what does a negative freq mean?
1786static void lpphy_start_tx_tone(struct b43_wldev *dev, s32 freq, u16 max)
1787{
1788 struct b43_phy_lp *lpphy = dev->phy.lp;
1789 u16 buf[64];
Rafał Miłecki6f98e622010-01-25 19:00:00 +01001790 int i, samples = 0, angle = 0;
1791 int rotation = (((36 * freq) / 20) << 16) / 100;
Rafał Miłecki98650452010-01-25 18:59:59 +01001792 struct b43_c32 sample;
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001793
1794 lpphy->tx_tone_freq = freq;
1795
1796 if (freq) {
1797 /* Find i for which abs(freq) integrally divides 20000 * i */
1798 for (i = 1; samples * abs(freq) != 20000 * i; i++) {
1799 samples = (20000 * i) / abs(freq);
1800 if(B43_WARN_ON(samples > 63))
1801 return;
1802 }
1803 } else {
1804 samples = 2;
1805 }
1806
1807 for (i = 0; i < samples; i++) {
Rafał Miłecki98650452010-01-25 18:59:59 +01001808 sample = b43_cordic(angle);
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001809 angle += rotation;
Rafał Miłecki6f98e622010-01-25 19:00:00 +01001810 buf[i] = CORDIC_CONVERT((sample.i * max) & 0xFF) << 8;
1811 buf[i] |= CORDIC_CONVERT((sample.q * max) & 0xFF);
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001812 }
1813
1814 b43_lptab_write_bulk(dev, B43_LPTAB16(5, 0), samples, buf);
1815
1816 lpphy_run_samples(dev, samples, 0xFFFF, 0);
1817}
1818
1819static void lpphy_stop_tx_tone(struct b43_wldev *dev)
1820{
1821 struct b43_phy_lp *lpphy = dev->phy.lp;
1822 int i;
1823
1824 lpphy->tx_tone_freq = 0;
1825
1826 b43_phy_mask(dev, B43_LPPHY_SMPL_PLAY_COUNT, 0xF000);
1827 for (i = 0; i < 31; i++) {
1828 if (!(b43_phy_read(dev, B43_LPPHY_A_PHY_CTL_ADDR) & 0x1))
1829 break;
1830 udelay(100);
1831 }
1832}
1833
1834
1835static void lpphy_papd_cal(struct b43_wldev *dev, struct lpphy_tx_gains gains,
1836 int mode, bool useindex, u8 index)
1837{
1838 //TODO
1839}
1840
1841static void lpphy_papd_cal_txpwr(struct b43_wldev *dev)
1842{
1843 struct b43_phy_lp *lpphy = dev->phy.lp;
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +02001844 struct ssb_bus *bus = dev->sdev->bus;
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001845 struct lpphy_tx_gains gains, oldgains;
1846 int old_txpctl, old_afe_ovr, old_rf, old_bbmult;
1847
1848 lpphy_read_tx_pctl_mode_from_hardware(dev);
1849 old_txpctl = lpphy->txpctl_mode;
1850 old_afe_ovr = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40;
1851 if (old_afe_ovr)
1852 oldgains = lpphy_get_tx_gains(dev);
1853 old_rf = b43_phy_read(dev, B43_LPPHY_RF_PWR_OVERRIDE) & 0xFF;
1854 old_bbmult = lpphy_get_bb_mult(dev);
1855
1856 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
1857
1858 if (bus->chip_id == 0x4325 && bus->chip_rev == 0)
1859 lpphy_papd_cal(dev, gains, 0, 1, 30);
1860 else
1861 lpphy_papd_cal(dev, gains, 0, 1, 65);
1862
1863 if (old_afe_ovr)
1864 lpphy_set_tx_gains(dev, oldgains);
1865 lpphy_set_bb_mult(dev, old_bbmult);
1866 lpphy_set_tx_power_control(dev, old_txpctl);
1867 b43_phy_maskset(dev, B43_LPPHY_RF_PWR_OVERRIDE, 0xFF00, old_rf);
1868}
1869
1870static int lpphy_rx_iq_cal(struct b43_wldev *dev, bool noise, bool tx,
1871 bool rx, bool pa, struct lpphy_tx_gains *gains)
1872{
1873 struct b43_phy_lp *lpphy = dev->phy.lp;
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +02001874 struct ssb_bus *bus = dev->sdev->bus;
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01001875 const struct lpphy_rx_iq_comp *iqcomp = NULL;
1876 struct lpphy_tx_gains nogains, oldgains;
1877 u16 tmp;
1878 int i, ret;
1879
1880 memset(&nogains, 0, sizeof(nogains));
1881 memset(&oldgains, 0, sizeof(oldgains));
1882
1883 if (bus->chip_id == 0x5354) {
1884 for (i = 0; i < ARRAY_SIZE(lpphy_5354_iq_table); i++) {
1885 if (lpphy_5354_iq_table[i].chan == lpphy->channel) {
1886 iqcomp = &lpphy_5354_iq_table[i];
1887 }
1888 }
1889 } else if (dev->phy.rev >= 2) {
1890 iqcomp = &lpphy_rev2plus_iq_comp;
1891 } else {
1892 for (i = 0; i < ARRAY_SIZE(lpphy_rev0_1_iq_table); i++) {
1893 if (lpphy_rev0_1_iq_table[i].chan == lpphy->channel) {
1894 iqcomp = &lpphy_rev0_1_iq_table[i];
1895 }
1896 }
1897 }
1898
1899 if (B43_WARN_ON(!iqcomp))
1900 return 0;
1901
1902 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, iqcomp->c1);
1903 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S,
1904 0x00FF, iqcomp->c0 << 8);
1905
1906 if (noise) {
1907 tx = true;
1908 rx = false;
1909 pa = false;
1910 }
1911
1912 lpphy_set_trsw_over(dev, tx, rx);
1913
1914 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
1915 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);
1916 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0,
1917 0xFFF7, pa << 3);
1918 } else {
1919 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x20);
1920 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0,
1921 0xFFDF, pa << 5);
1922 }
1923
1924 tmp = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40;
1925
1926 if (noise)
1927 lpphy_set_rx_gain(dev, 0x2D5D);
1928 else {
1929 if (tmp)
1930 oldgains = lpphy_get_tx_gains(dev);
1931 if (!gains)
1932 gains = &nogains;
1933 lpphy_set_tx_gains(dev, *gains);
1934 }
1935
1936 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFFE);
1937 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE);
1938 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800);
1939 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x800);
1940 lpphy_set_deaf(dev, false);
1941 if (noise)
1942 ret = lpphy_calc_rx_iq_comp(dev, 0xFFF0);
1943 else {
1944 lpphy_start_tx_tone(dev, 4000, 100);
1945 ret = lpphy_calc_rx_iq_comp(dev, 0x4000);
1946 lpphy_stop_tx_tone(dev);
1947 }
1948 lpphy_clear_deaf(dev, false);
1949 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFC);
1950 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFF7);
1951 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFDF);
1952 if (!noise) {
1953 if (tmp)
1954 lpphy_set_tx_gains(dev, oldgains);
1955 else
1956 lpphy_disable_tx_gain_override(dev);
1957 }
1958 lpphy_disable_rx_gain_override(dev);
1959 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFFE);
1960 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xF7FF);
1961 return ret;
1962}
1963
1964static void lpphy_calibration(struct b43_wldev *dev)
1965{
1966 struct b43_phy_lp *lpphy = dev->phy.lp;
1967 enum b43_lpphy_txpctl_mode saved_pctl_mode;
1968 bool full_cal = false;
1969
1970 if (lpphy->full_calib_chan != lpphy->channel) {
1971 full_cal = true;
1972 lpphy->full_calib_chan = lpphy->channel;
1973 }
1974
1975 b43_mac_suspend(dev);
1976
1977 lpphy_btcoex_override(dev);
1978 if (dev->phy.rev >= 2)
1979 lpphy_save_dig_flt_state(dev);
1980 lpphy_read_tx_pctl_mode_from_hardware(dev);
1981 saved_pctl_mode = lpphy->txpctl_mode;
1982 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
1983 //TODO Perform transmit power table I/Q LO calibration
1984 if ((dev->phy.rev == 0) && (saved_pctl_mode != B43_LPPHY_TXPCTL_OFF))
1985 lpphy_pr41573_workaround(dev);
1986 if ((dev->phy.rev >= 2) && full_cal) {
1987 lpphy_papd_cal_txpwr(dev);
1988 }
1989 lpphy_set_tx_power_control(dev, saved_pctl_mode);
1990 if (dev->phy.rev >= 2)
1991 lpphy_restore_dig_flt_state(dev);
1992 lpphy_rx_iq_cal(dev, true, true, false, false, NULL);
1993
1994 b43_mac_enable(dev);
1995}
1996
Michael Buesche63e4362008-08-30 10:55:48 +02001997static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
1998{
Michael Buesch08887072008-08-30 11:49:45 +02001999 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
2000 return b43_read16(dev, B43_MMIO_PHY_DATA);
Michael Buesche63e4362008-08-30 10:55:48 +02002001}
2002
2003static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
2004{
Gábor Stefanik00fa9282009-08-26 23:46:18 +02002005 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
2006 b43_write16(dev, B43_MMIO_PHY_DATA, value);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002007}
2008
2009static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
2010 u16 set)
2011{
Michael Buesch08887072008-08-30 11:49:45 +02002012 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002013 b43_write16(dev, B43_MMIO_PHY_DATA,
2014 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
Michael Buesche63e4362008-08-30 10:55:48 +02002015}
2016
2017static u16 b43_lpphy_op_radio_read(struct b43_wldev *dev, u16 reg)
2018{
Michael Buesch08887072008-08-30 11:49:45 +02002019 /* Register 1 is a 32-bit register. */
2020 B43_WARN_ON(reg == 1);
2021 /* LP-PHY needs a special bit set for read access */
2022 if (dev->phy.rev < 2) {
2023 if (reg != 0x4001)
2024 reg |= 0x100;
2025 } else
2026 reg |= 0x200;
2027
2028 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
2029 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
Michael Buesche63e4362008-08-30 10:55:48 +02002030}
2031
2032static void b43_lpphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
2033{
2034 /* Register 1 is a 32-bit register. */
2035 B43_WARN_ON(reg == 1);
2036
Michael Buesch08887072008-08-30 11:49:45 +02002037 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
2038 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
Michael Buesche63e4362008-08-30 10:55:48 +02002039}
2040
Gábor Stefanik588f8372009-08-13 22:46:30 +02002041struct b206x_channel {
2042 u8 channel;
2043 u16 freq;
2044 u8 data[12];
2045};
2046
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002047static const struct b206x_channel b2062_chantbl[] = {
2048 { .channel = 1, .freq = 2412, .data[0] = 0xFF, .data[1] = 0xFF,
2049 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2050 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2051 { .channel = 2, .freq = 2417, .data[0] = 0xFF, .data[1] = 0xFF,
2052 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2053 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2054 { .channel = 3, .freq = 2422, .data[0] = 0xFF, .data[1] = 0xFF,
2055 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2056 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2057 { .channel = 4, .freq = 2427, .data[0] = 0xFF, .data[1] = 0xFF,
2058 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2059 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2060 { .channel = 5, .freq = 2432, .data[0] = 0xFF, .data[1] = 0xFF,
2061 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2062 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2063 { .channel = 6, .freq = 2437, .data[0] = 0xFF, .data[1] = 0xFF,
2064 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2065 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2066 { .channel = 7, .freq = 2442, .data[0] = 0xFF, .data[1] = 0xFF,
2067 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2068 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2069 { .channel = 8, .freq = 2447, .data[0] = 0xFF, .data[1] = 0xFF,
2070 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2071 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2072 { .channel = 9, .freq = 2452, .data[0] = 0xFF, .data[1] = 0xFF,
2073 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2074 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2075 { .channel = 10, .freq = 2457, .data[0] = 0xFF, .data[1] = 0xFF,
2076 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2077 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2078 { .channel = 11, .freq = 2462, .data[0] = 0xFF, .data[1] = 0xFF,
2079 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2080 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2081 { .channel = 12, .freq = 2467, .data[0] = 0xFF, .data[1] = 0xFF,
2082 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2083 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2084 { .channel = 13, .freq = 2472, .data[0] = 0xFF, .data[1] = 0xFF,
2085 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2086 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2087 { .channel = 14, .freq = 2484, .data[0] = 0xFF, .data[1] = 0xFF,
2088 .data[2] = 0xB5, .data[3] = 0x1B, .data[4] = 0x24, .data[5] = 0x32,
2089 .data[6] = 0x32, .data[7] = 0x88, .data[8] = 0x88, },
2090 { .channel = 34, .freq = 5170, .data[0] = 0x00, .data[1] = 0x22,
2091 .data[2] = 0x20, .data[3] = 0x84, .data[4] = 0x3C, .data[5] = 0x77,
2092 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2093 { .channel = 38, .freq = 5190, .data[0] = 0x00, .data[1] = 0x11,
2094 .data[2] = 0x10, .data[3] = 0x83, .data[4] = 0x3C, .data[5] = 0x77,
2095 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2096 { .channel = 42, .freq = 5210, .data[0] = 0x00, .data[1] = 0x11,
2097 .data[2] = 0x10, .data[3] = 0x83, .data[4] = 0x3C, .data[5] = 0x77,
2098 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2099 { .channel = 46, .freq = 5230, .data[0] = 0x00, .data[1] = 0x00,
2100 .data[2] = 0x00, .data[3] = 0x83, .data[4] = 0x3C, .data[5] = 0x77,
2101 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2102 { .channel = 36, .freq = 5180, .data[0] = 0x00, .data[1] = 0x11,
2103 .data[2] = 0x20, .data[3] = 0x83, .data[4] = 0x3C, .data[5] = 0x77,
2104 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2105 { .channel = 40, .freq = 5200, .data[0] = 0x00, .data[1] = 0x11,
2106 .data[2] = 0x10, .data[3] = 0x84, .data[4] = 0x3C, .data[5] = 0x77,
2107 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2108 { .channel = 44, .freq = 5220, .data[0] = 0x00, .data[1] = 0x11,
2109 .data[2] = 0x00, .data[3] = 0x83, .data[4] = 0x3C, .data[5] = 0x77,
2110 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2111 { .channel = 48, .freq = 5240, .data[0] = 0x00, .data[1] = 0x00,
2112 .data[2] = 0x00, .data[3] = 0x83, .data[4] = 0x3C, .data[5] = 0x77,
2113 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2114 { .channel = 52, .freq = 5260, .data[0] = 0x00, .data[1] = 0x00,
2115 .data[2] = 0x00, .data[3] = 0x83, .data[4] = 0x3C, .data[5] = 0x77,
2116 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2117 { .channel = 56, .freq = 5280, .data[0] = 0x00, .data[1] = 0x00,
2118 .data[2] = 0x00, .data[3] = 0x83, .data[4] = 0x3C, .data[5] = 0x77,
2119 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2120 { .channel = 60, .freq = 5300, .data[0] = 0x00, .data[1] = 0x00,
2121 .data[2] = 0x00, .data[3] = 0x63, .data[4] = 0x3C, .data[5] = 0x77,
2122 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2123 { .channel = 64, .freq = 5320, .data[0] = 0x00, .data[1] = 0x00,
2124 .data[2] = 0x00, .data[3] = 0x62, .data[4] = 0x3C, .data[5] = 0x77,
2125 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2126 { .channel = 100, .freq = 5500, .data[0] = 0x00, .data[1] = 0x00,
2127 .data[2] = 0x00, .data[3] = 0x30, .data[4] = 0x3C, .data[5] = 0x77,
2128 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2129 { .channel = 104, .freq = 5520, .data[0] = 0x00, .data[1] = 0x00,
2130 .data[2] = 0x00, .data[3] = 0x20, .data[4] = 0x3C, .data[5] = 0x77,
2131 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2132 { .channel = 108, .freq = 5540, .data[0] = 0x00, .data[1] = 0x00,
2133 .data[2] = 0x00, .data[3] = 0x20, .data[4] = 0x3C, .data[5] = 0x77,
2134 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2135 { .channel = 112, .freq = 5560, .data[0] = 0x00, .data[1] = 0x00,
2136 .data[2] = 0x00, .data[3] = 0x20, .data[4] = 0x3C, .data[5] = 0x77,
2137 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2138 { .channel = 116, .freq = 5580, .data[0] = 0x00, .data[1] = 0x00,
2139 .data[2] = 0x00, .data[3] = 0x10, .data[4] = 0x3C, .data[5] = 0x77,
2140 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2141 { .channel = 120, .freq = 5600, .data[0] = 0x00, .data[1] = 0x00,
2142 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2143 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2144 { .channel = 124, .freq = 5620, .data[0] = 0x00, .data[1] = 0x00,
2145 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2146 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2147 { .channel = 128, .freq = 5640, .data[0] = 0x00, .data[1] = 0x00,
2148 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2149 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2150 { .channel = 132, .freq = 5660, .data[0] = 0x00, .data[1] = 0x00,
2151 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2152 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2153 { .channel = 136, .freq = 5680, .data[0] = 0x00, .data[1] = 0x00,
2154 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2155 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2156 { .channel = 140, .freq = 5700, .data[0] = 0x00, .data[1] = 0x00,
2157 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2158 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2159 { .channel = 149, .freq = 5745, .data[0] = 0x00, .data[1] = 0x00,
2160 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2161 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2162 { .channel = 153, .freq = 5765, .data[0] = 0x00, .data[1] = 0x00,
2163 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2164 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2165 { .channel = 157, .freq = 5785, .data[0] = 0x00, .data[1] = 0x00,
2166 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2167 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2168 { .channel = 161, .freq = 5805, .data[0] = 0x00, .data[1] = 0x00,
2169 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2170 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2171 { .channel = 165, .freq = 5825, .data[0] = 0x00, .data[1] = 0x00,
2172 .data[2] = 0x00, .data[3] = 0x00, .data[4] = 0x3C, .data[5] = 0x77,
2173 .data[6] = 0x37, .data[7] = 0xFF, .data[8] = 0x88, },
2174 { .channel = 184, .freq = 4920, .data[0] = 0x55, .data[1] = 0x77,
2175 .data[2] = 0x90, .data[3] = 0xF7, .data[4] = 0x3C, .data[5] = 0x77,
2176 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0xFF, },
2177 { .channel = 188, .freq = 4940, .data[0] = 0x44, .data[1] = 0x77,
2178 .data[2] = 0x80, .data[3] = 0xE7, .data[4] = 0x3C, .data[5] = 0x77,
2179 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0xFF, },
2180 { .channel = 192, .freq = 4960, .data[0] = 0x44, .data[1] = 0x66,
2181 .data[2] = 0x80, .data[3] = 0xE7, .data[4] = 0x3C, .data[5] = 0x77,
2182 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0xFF, },
2183 { .channel = 196, .freq = 4980, .data[0] = 0x33, .data[1] = 0x66,
2184 .data[2] = 0x70, .data[3] = 0xC7, .data[4] = 0x3C, .data[5] = 0x77,
2185 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0xFF, },
2186 { .channel = 200, .freq = 5000, .data[0] = 0x22, .data[1] = 0x55,
2187 .data[2] = 0x60, .data[3] = 0xD7, .data[4] = 0x3C, .data[5] = 0x77,
2188 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0xFF, },
2189 { .channel = 204, .freq = 5020, .data[0] = 0x22, .data[1] = 0x55,
2190 .data[2] = 0x60, .data[3] = 0xC7, .data[4] = 0x3C, .data[5] = 0x77,
2191 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0xFF, },
2192 { .channel = 208, .freq = 5040, .data[0] = 0x22, .data[1] = 0x44,
2193 .data[2] = 0x50, .data[3] = 0xC7, .data[4] = 0x3C, .data[5] = 0x77,
2194 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0xFF, },
2195 { .channel = 212, .freq = 5060, .data[0] = 0x11, .data[1] = 0x44,
2196 .data[2] = 0x50, .data[3] = 0xA5, .data[4] = 0x3C, .data[5] = 0x77,
2197 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2198 { .channel = 216, .freq = 5080, .data[0] = 0x00, .data[1] = 0x44,
2199 .data[2] = 0x40, .data[3] = 0xB6, .data[4] = 0x3C, .data[5] = 0x77,
2200 .data[6] = 0x35, .data[7] = 0xFF, .data[8] = 0x88, },
2201};
2202
Gábor Stefanik588f8372009-08-13 22:46:30 +02002203static const struct b206x_channel b2063_chantbl[] = {
2204 { .channel = 1, .freq = 2412, .data[0] = 0x6F, .data[1] = 0x3C,
2205 .data[2] = 0x3C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2206 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2207 .data[10] = 0x80, .data[11] = 0x70, },
2208 { .channel = 2, .freq = 2417, .data[0] = 0x6F, .data[1] = 0x3C,
2209 .data[2] = 0x3C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2210 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2211 .data[10] = 0x80, .data[11] = 0x70, },
2212 { .channel = 3, .freq = 2422, .data[0] = 0x6F, .data[1] = 0x3C,
2213 .data[2] = 0x3C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2214 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2215 .data[10] = 0x80, .data[11] = 0x70, },
2216 { .channel = 4, .freq = 2427, .data[0] = 0x6F, .data[1] = 0x2C,
2217 .data[2] = 0x2C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2218 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2219 .data[10] = 0x80, .data[11] = 0x70, },
2220 { .channel = 5, .freq = 2432, .data[0] = 0x6F, .data[1] = 0x2C,
2221 .data[2] = 0x2C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2222 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2223 .data[10] = 0x80, .data[11] = 0x70, },
2224 { .channel = 6, .freq = 2437, .data[0] = 0x6F, .data[1] = 0x2C,
2225 .data[2] = 0x2C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2226 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2227 .data[10] = 0x80, .data[11] = 0x70, },
2228 { .channel = 7, .freq = 2442, .data[0] = 0x6F, .data[1] = 0x2C,
2229 .data[2] = 0x2C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2230 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2231 .data[10] = 0x80, .data[11] = 0x70, },
2232 { .channel = 8, .freq = 2447, .data[0] = 0x6F, .data[1] = 0x2C,
2233 .data[2] = 0x2C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2234 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2235 .data[10] = 0x80, .data[11] = 0x70, },
2236 { .channel = 9, .freq = 2452, .data[0] = 0x6F, .data[1] = 0x1C,
2237 .data[2] = 0x1C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2238 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2239 .data[10] = 0x80, .data[11] = 0x70, },
2240 { .channel = 10, .freq = 2457, .data[0] = 0x6F, .data[1] = 0x1C,
2241 .data[2] = 0x1C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2242 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2243 .data[10] = 0x80, .data[11] = 0x70, },
2244 { .channel = 11, .freq = 2462, .data[0] = 0x6E, .data[1] = 0x1C,
2245 .data[2] = 0x1C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2246 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2247 .data[10] = 0x80, .data[11] = 0x70, },
2248 { .channel = 12, .freq = 2467, .data[0] = 0x6E, .data[1] = 0x1C,
2249 .data[2] = 0x1C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2250 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2251 .data[10] = 0x80, .data[11] = 0x70, },
2252 { .channel = 13, .freq = 2472, .data[0] = 0x6E, .data[1] = 0x1C,
2253 .data[2] = 0x1C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2254 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2255 .data[10] = 0x80, .data[11] = 0x70, },
2256 { .channel = 14, .freq = 2484, .data[0] = 0x6E, .data[1] = 0x0C,
2257 .data[2] = 0x0C, .data[3] = 0x04, .data[4] = 0x05, .data[5] = 0x05,
2258 .data[6] = 0x05, .data[7] = 0x05, .data[8] = 0x77, .data[9] = 0x80,
2259 .data[10] = 0x80, .data[11] = 0x70, },
2260 { .channel = 34, .freq = 5170, .data[0] = 0x6A, .data[1] = 0x0C,
2261 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x02, .data[5] = 0x05,
2262 .data[6] = 0x0D, .data[7] = 0x0D, .data[8] = 0x77, .data[9] = 0x80,
2263 .data[10] = 0x20, .data[11] = 0x00, },
2264 { .channel = 36, .freq = 5180, .data[0] = 0x6A, .data[1] = 0x0C,
2265 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x01, .data[5] = 0x05,
2266 .data[6] = 0x0D, .data[7] = 0x0C, .data[8] = 0x77, .data[9] = 0x80,
2267 .data[10] = 0x20, .data[11] = 0x00, },
2268 { .channel = 38, .freq = 5190, .data[0] = 0x6A, .data[1] = 0x0C,
2269 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x01, .data[5] = 0x04,
2270 .data[6] = 0x0C, .data[7] = 0x0C, .data[8] = 0x77, .data[9] = 0x80,
2271 .data[10] = 0x20, .data[11] = 0x00, },
2272 { .channel = 40, .freq = 5200, .data[0] = 0x69, .data[1] = 0x0C,
2273 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x01, .data[5] = 0x04,
2274 .data[6] = 0x0C, .data[7] = 0x0C, .data[8] = 0x77, .data[9] = 0x70,
2275 .data[10] = 0x20, .data[11] = 0x00, },
2276 { .channel = 42, .freq = 5210, .data[0] = 0x69, .data[1] = 0x0C,
2277 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x01, .data[5] = 0x04,
2278 .data[6] = 0x0B, .data[7] = 0x0C, .data[8] = 0x77, .data[9] = 0x70,
2279 .data[10] = 0x20, .data[11] = 0x00, },
2280 { .channel = 44, .freq = 5220, .data[0] = 0x69, .data[1] = 0x0C,
2281 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x04,
2282 .data[6] = 0x0B, .data[7] = 0x0B, .data[8] = 0x77, .data[9] = 0x60,
2283 .data[10] = 0x20, .data[11] = 0x00, },
2284 { .channel = 46, .freq = 5230, .data[0] = 0x69, .data[1] = 0x0C,
2285 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x03,
2286 .data[6] = 0x0A, .data[7] = 0x0B, .data[8] = 0x77, .data[9] = 0x60,
2287 .data[10] = 0x20, .data[11] = 0x00, },
2288 { .channel = 48, .freq = 5240, .data[0] = 0x69, .data[1] = 0x0C,
2289 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x03,
2290 .data[6] = 0x0A, .data[7] = 0x0A, .data[8] = 0x77, .data[9] = 0x60,
2291 .data[10] = 0x20, .data[11] = 0x00, },
2292 { .channel = 52, .freq = 5260, .data[0] = 0x68, .data[1] = 0x0C,
2293 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x02,
2294 .data[6] = 0x09, .data[7] = 0x09, .data[8] = 0x77, .data[9] = 0x60,
2295 .data[10] = 0x20, .data[11] = 0x00, },
2296 { .channel = 56, .freq = 5280, .data[0] = 0x68, .data[1] = 0x0C,
2297 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x01,
2298 .data[6] = 0x08, .data[7] = 0x08, .data[8] = 0x77, .data[9] = 0x50,
2299 .data[10] = 0x10, .data[11] = 0x00, },
2300 { .channel = 60, .freq = 5300, .data[0] = 0x68, .data[1] = 0x0C,
2301 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x01,
2302 .data[6] = 0x08, .data[7] = 0x08, .data[8] = 0x77, .data[9] = 0x50,
2303 .data[10] = 0x10, .data[11] = 0x00, },
2304 { .channel = 64, .freq = 5320, .data[0] = 0x67, .data[1] = 0x0C,
2305 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2306 .data[6] = 0x08, .data[7] = 0x08, .data[8] = 0x77, .data[9] = 0x50,
2307 .data[10] = 0x10, .data[11] = 0x00, },
2308 { .channel = 100, .freq = 5500, .data[0] = 0x64, .data[1] = 0x0C,
2309 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2310 .data[6] = 0x02, .data[7] = 0x01, .data[8] = 0x77, .data[9] = 0x20,
2311 .data[10] = 0x00, .data[11] = 0x00, },
2312 { .channel = 104, .freq = 5520, .data[0] = 0x64, .data[1] = 0x0C,
2313 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2314 .data[6] = 0x01, .data[7] = 0x01, .data[8] = 0x77, .data[9] = 0x20,
2315 .data[10] = 0x00, .data[11] = 0x00, },
2316 { .channel = 108, .freq = 5540, .data[0] = 0x63, .data[1] = 0x0C,
2317 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2318 .data[6] = 0x01, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x10,
2319 .data[10] = 0x00, .data[11] = 0x00, },
2320 { .channel = 112, .freq = 5560, .data[0] = 0x63, .data[1] = 0x0C,
2321 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2322 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x10,
2323 .data[10] = 0x00, .data[11] = 0x00, },
2324 { .channel = 116, .freq = 5580, .data[0] = 0x62, .data[1] = 0x0C,
2325 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2326 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x10,
2327 .data[10] = 0x00, .data[11] = 0x00, },
2328 { .channel = 120, .freq = 5600, .data[0] = 0x62, .data[1] = 0x0C,
2329 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2330 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2331 .data[10] = 0x00, .data[11] = 0x00, },
2332 { .channel = 124, .freq = 5620, .data[0] = 0x62, .data[1] = 0x0C,
2333 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2334 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2335 .data[10] = 0x00, .data[11] = 0x00, },
2336 { .channel = 128, .freq = 5640, .data[0] = 0x61, .data[1] = 0x0C,
2337 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2338 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2339 .data[10] = 0x00, .data[11] = 0x00, },
2340 { .channel = 132, .freq = 5660, .data[0] = 0x61, .data[1] = 0x0C,
2341 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2342 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2343 .data[10] = 0x00, .data[11] = 0x00, },
2344 { .channel = 136, .freq = 5680, .data[0] = 0x61, .data[1] = 0x0C,
2345 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2346 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2347 .data[10] = 0x00, .data[11] = 0x00, },
2348 { .channel = 140, .freq = 5700, .data[0] = 0x60, .data[1] = 0x0C,
2349 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2350 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2351 .data[10] = 0x00, .data[11] = 0x00, },
2352 { .channel = 149, .freq = 5745, .data[0] = 0x60, .data[1] = 0x0C,
2353 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2354 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2355 .data[10] = 0x00, .data[11] = 0x00, },
2356 { .channel = 153, .freq = 5765, .data[0] = 0x60, .data[1] = 0x0C,
2357 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2358 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2359 .data[10] = 0x00, .data[11] = 0x00, },
2360 { .channel = 157, .freq = 5785, .data[0] = 0x60, .data[1] = 0x0C,
2361 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2362 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2363 .data[10] = 0x00, .data[11] = 0x00, },
2364 { .channel = 161, .freq = 5805, .data[0] = 0x60, .data[1] = 0x0C,
2365 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2366 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2367 .data[10] = 0x00, .data[11] = 0x00, },
2368 { .channel = 165, .freq = 5825, .data[0] = 0x60, .data[1] = 0x0C,
2369 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x00, .data[5] = 0x00,
2370 .data[6] = 0x00, .data[7] = 0x00, .data[8] = 0x77, .data[9] = 0x00,
2371 .data[10] = 0x00, .data[11] = 0x00, },
2372 { .channel = 184, .freq = 4920, .data[0] = 0x6E, .data[1] = 0x0C,
2373 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x09, .data[5] = 0x0E,
2374 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0xC0,
2375 .data[10] = 0x50, .data[11] = 0x00, },
2376 { .channel = 188, .freq = 4940, .data[0] = 0x6E, .data[1] = 0x0C,
2377 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x09, .data[5] = 0x0D,
2378 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0xB0,
2379 .data[10] = 0x50, .data[11] = 0x00, },
2380 { .channel = 192, .freq = 4960, .data[0] = 0x6E, .data[1] = 0x0C,
2381 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x08, .data[5] = 0x0C,
2382 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0xB0,
2383 .data[10] = 0x50, .data[11] = 0x00, },
2384 { .channel = 196, .freq = 4980, .data[0] = 0x6D, .data[1] = 0x0C,
2385 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x08, .data[5] = 0x0C,
2386 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0xA0,
2387 .data[10] = 0x40, .data[11] = 0x00, },
2388 { .channel = 200, .freq = 5000, .data[0] = 0x6D, .data[1] = 0x0C,
2389 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x08, .data[5] = 0x0B,
2390 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0xA0,
2391 .data[10] = 0x40, .data[11] = 0x00, },
2392 { .channel = 204, .freq = 5020, .data[0] = 0x6D, .data[1] = 0x0C,
2393 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x08, .data[5] = 0x0A,
2394 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0xA0,
2395 .data[10] = 0x40, .data[11] = 0x00, },
2396 { .channel = 208, .freq = 5040, .data[0] = 0x6C, .data[1] = 0x0C,
2397 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x07, .data[5] = 0x09,
2398 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0x90,
2399 .data[10] = 0x40, .data[11] = 0x00, },
2400 { .channel = 212, .freq = 5060, .data[0] = 0x6C, .data[1] = 0x0C,
2401 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x06, .data[5] = 0x08,
2402 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0x90,
2403 .data[10] = 0x40, .data[11] = 0x00, },
2404 { .channel = 216, .freq = 5080, .data[0] = 0x6C, .data[1] = 0x0C,
2405 .data[2] = 0x0C, .data[3] = 0x00, .data[4] = 0x05, .data[5] = 0x08,
2406 .data[6] = 0x0F, .data[7] = 0x0F, .data[8] = 0x77, .data[9] = 0x90,
2407 .data[10] = 0x40, .data[11] = 0x00, },
2408};
2409
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002410static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev)
Gábor Stefanik588f8372009-08-13 22:46:30 +02002411{
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +02002412 struct ssb_bus *bus = dev->sdev->bus;
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002413
2414 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0xFF);
2415 udelay(20);
2416 if (bus->chip_id == 0x5354) {
2417 b43_radio_write(dev, B2062_N_COMM1, 4);
2418 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 4);
2419 } else {
2420 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0);
2421 }
2422 udelay(5);
2423}
2424
2425static void lpphy_b2062_vco_calib(struct b43_wldev *dev)
2426{
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002427 b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x42);
2428 b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x62);
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002429 udelay(200);
2430}
2431
2432static int lpphy_b2062_tune(struct b43_wldev *dev,
2433 unsigned int channel)
2434{
2435 struct b43_phy_lp *lpphy = dev->phy.lp;
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +02002436 struct ssb_bus *bus = dev->sdev->bus;
Gábor Stefanik5269102e2009-08-16 18:05:09 +02002437 const struct b206x_channel *chandata = NULL;
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002438 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
2439 u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9;
2440 int i, err = 0;
2441
Gábor Stefanik5269102e2009-08-16 18:05:09 +02002442 for (i = 0; i < ARRAY_SIZE(b2062_chantbl); i++) {
2443 if (b2062_chantbl[i].channel == channel) {
2444 chandata = &b2062_chantbl[i];
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002445 break;
2446 }
2447 }
2448
2449 if (B43_WARN_ON(!chandata))
2450 return -EINVAL;
2451
2452 b43_radio_set(dev, B2062_S_RFPLL_CTL14, 0x04);
2453 b43_radio_write(dev, B2062_N_LGENA_TUNE0, chandata->data[0]);
2454 b43_radio_write(dev, B2062_N_LGENA_TUNE2, chandata->data[1]);
2455 b43_radio_write(dev, B2062_N_LGENA_TUNE3, chandata->data[2]);
2456 b43_radio_write(dev, B2062_N_TX_TUNE, chandata->data[3]);
2457 b43_radio_write(dev, B2062_S_LGENG_CTL1, chandata->data[4]);
2458 b43_radio_write(dev, B2062_N_LGENA_CTL5, chandata->data[5]);
2459 b43_radio_write(dev, B2062_N_LGENA_CTL6, chandata->data[6]);
2460 b43_radio_write(dev, B2062_N_TX_PGA, chandata->data[7]);
2461 b43_radio_write(dev, B2062_N_TX_PAD, chandata->data[8]);
2462
2463 tmp1 = crystal_freq / 1000;
2464 tmp2 = lpphy->pdiv * 1000;
2465 b43_radio_write(dev, B2062_S_RFPLL_CTL33, 0xCC);
2466 b43_radio_write(dev, B2062_S_RFPLL_CTL34, 0x07);
2467 lpphy_b2062_reset_pll_bias(dev);
2468 tmp3 = tmp2 * channel2freq_lp(channel);
2469 if (channel2freq_lp(channel) < 4000)
2470 tmp3 *= 2;
2471 tmp4 = 48 * tmp1;
2472 tmp6 = tmp3 / tmp4;
2473 tmp7 = tmp3 % tmp4;
2474 b43_radio_write(dev, B2062_S_RFPLL_CTL26, tmp6);
2475 tmp5 = tmp7 * 0x100;
2476 tmp6 = tmp5 / tmp4;
2477 tmp7 = tmp5 % tmp4;
Gábor Stefanik055114a2009-08-16 15:32:40 +02002478 b43_radio_write(dev, B2062_S_RFPLL_CTL27, tmp6);
2479 tmp5 = tmp7 * 0x100;
2480 tmp6 = tmp5 / tmp4;
2481 tmp7 = tmp5 % tmp4;
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002482 b43_radio_write(dev, B2062_S_RFPLL_CTL28, tmp6);
2483 tmp5 = tmp7 * 0x100;
2484 tmp6 = tmp5 / tmp4;
2485 tmp7 = tmp5 % tmp4;
2486 b43_radio_write(dev, B2062_S_RFPLL_CTL29, tmp6 + ((2 * tmp7) / tmp4));
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002487 tmp8 = b43_radio_read(dev, B2062_S_RFPLL_CTL19);
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002488 tmp9 = ((2 * tmp3 * (tmp8 + 1)) + (3 * tmp1)) / (6 * tmp1);
Gábor Stefaniked07c4b2009-08-16 18:40:09 +02002489 b43_radio_write(dev, B2062_S_RFPLL_CTL23, (tmp9 >> 8) + 16);
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002490 b43_radio_write(dev, B2062_S_RFPLL_CTL24, tmp9 & 0xFF);
2491
2492 lpphy_b2062_vco_calib(dev);
2493 if (b43_radio_read(dev, B2062_S_RFPLL_CTL3) & 0x10) {
2494 b43_radio_write(dev, B2062_S_RFPLL_CTL33, 0xFC);
2495 b43_radio_write(dev, B2062_S_RFPLL_CTL34, 0);
2496 lpphy_b2062_reset_pll_bias(dev);
2497 lpphy_b2062_vco_calib(dev);
2498 if (b43_radio_read(dev, B2062_S_RFPLL_CTL3) & 0x10)
Gábor Stefanik96909e92009-08-16 01:15:49 +02002499 err = -EIO;
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002500 }
2501
2502 b43_radio_mask(dev, B2062_S_RFPLL_CTL14, ~0x04);
2503 return err;
2504}
2505
Gábor Stefanik588f8372009-08-13 22:46:30 +02002506static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
2507{
2508 u16 tmp;
2509
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002510 b43_radio_mask(dev, B2063_PLL_SP1, ~0x40);
2511 tmp = b43_radio_read(dev, B2063_PLL_JTAG_CALNRST) & 0xF8;
2512 b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002513 udelay(1);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002514 b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x4);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002515 udelay(1);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002516 b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x6);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002517 udelay(1);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002518 b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x7);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002519 udelay(300);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002520 b43_radio_set(dev, B2063_PLL_SP1, 0x40);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002521}
2522
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002523static int lpphy_b2063_tune(struct b43_wldev *dev,
2524 unsigned int channel)
Gábor Stefanik588f8372009-08-13 22:46:30 +02002525{
Rafał Miłeckidedb1eb2011-05-14 00:04:38 +02002526 struct ssb_bus *bus = dev->sdev->bus;
Gábor Stefanik588f8372009-08-13 22:46:30 +02002527
2528 static const struct b206x_channel *chandata = NULL;
2529 u32 crystal_freq = bus->chipco.pmu.crystalfreq * 1000;
2530 u32 freqref, vco_freq, val1, val2, val3, timeout, timeoutref, count;
2531 u16 old_comm15, scale;
2532 u32 tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
2533 int i, div = (crystal_freq <= 26000000 ? 1 : 2);
2534
2535 for (i = 0; i < ARRAY_SIZE(b2063_chantbl); i++) {
2536 if (b2063_chantbl[i].channel == channel) {
2537 chandata = &b2063_chantbl[i];
2538 break;
2539 }
2540 }
2541
2542 if (B43_WARN_ON(!chandata))
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002543 return -EINVAL;
Gábor Stefanik588f8372009-08-13 22:46:30 +02002544
2545 b43_radio_write(dev, B2063_LOGEN_VCOBUF1, chandata->data[0]);
2546 b43_radio_write(dev, B2063_LOGEN_MIXER2, chandata->data[1]);
2547 b43_radio_write(dev, B2063_LOGEN_BUF2, chandata->data[2]);
2548 b43_radio_write(dev, B2063_LOGEN_RCCR1, chandata->data[3]);
2549 b43_radio_write(dev, B2063_A_RX_1ST3, chandata->data[4]);
2550 b43_radio_write(dev, B2063_A_RX_2ND1, chandata->data[5]);
2551 b43_radio_write(dev, B2063_A_RX_2ND4, chandata->data[6]);
2552 b43_radio_write(dev, B2063_A_RX_2ND7, chandata->data[7]);
2553 b43_radio_write(dev, B2063_A_RX_PS6, chandata->data[8]);
2554 b43_radio_write(dev, B2063_TX_RF_CTL2, chandata->data[9]);
2555 b43_radio_write(dev, B2063_TX_RF_CTL5, chandata->data[10]);
2556 b43_radio_write(dev, B2063_PA_CTL11, chandata->data[11]);
2557
2558 old_comm15 = b43_radio_read(dev, B2063_COMM15);
2559 b43_radio_set(dev, B2063_COMM15, 0x1E);
2560
2561 if (chandata->freq > 4000) /* spec says 2484, but 4000 is safer */
2562 vco_freq = chandata->freq << 1;
2563 else
2564 vco_freq = chandata->freq << 2;
2565
2566 freqref = crystal_freq * 3;
2567 val1 = lpphy_qdiv_roundup(crystal_freq, 1000000, 16);
2568 val2 = lpphy_qdiv_roundup(crystal_freq, 1000000 * div, 16);
2569 val3 = lpphy_qdiv_roundup(vco_freq, 3, 16);
2570 timeout = ((((8 * crystal_freq) / (div * 5000000)) + 1) >> 1) - 1;
2571 b43_radio_write(dev, B2063_PLL_JTAG_PLL_VCO_CALIB3, 0x2);
2572 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_VCO_CALIB6,
2573 0xFFF8, timeout >> 2);
2574 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_VCO_CALIB7,
2575 0xFF9F,timeout << 5);
2576
2577 timeoutref = ((((8 * crystal_freq) / (div * (timeout + 1))) +
2578 999999) / 1000000) + 1;
2579 b43_radio_write(dev, B2063_PLL_JTAG_PLL_VCO_CALIB5, timeoutref);
2580
2581 count = lpphy_qdiv_roundup(val3, val2 + 16, 16);
2582 count *= (timeout + 1) * (timeoutref + 1);
2583 count--;
2584 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_VCO_CALIB7,
2585 0xF0, count >> 8);
2586 b43_radio_write(dev, B2063_PLL_JTAG_PLL_VCO_CALIB8, count & 0xFF);
2587
2588 tmp1 = ((val3 * 62500) / freqref) << 4;
2589 tmp2 = ((val3 * 62500) % freqref) << 4;
2590 while (tmp2 >= freqref) {
2591 tmp1++;
2592 tmp2 -= freqref;
2593 }
2594 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_SG1, 0xFFE0, tmp1 >> 4);
2595 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_SG2, 0xFE0F, tmp1 << 4);
2596 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_SG2, 0xFFF0, tmp1 >> 16);
2597 b43_radio_write(dev, B2063_PLL_JTAG_PLL_SG3, (tmp2 >> 8) & 0xFF);
2598 b43_radio_write(dev, B2063_PLL_JTAG_PLL_SG4, tmp2 & 0xFF);
2599
2600 b43_radio_write(dev, B2063_PLL_JTAG_PLL_LF1, 0xB9);
2601 b43_radio_write(dev, B2063_PLL_JTAG_PLL_LF2, 0x88);
2602 b43_radio_write(dev, B2063_PLL_JTAG_PLL_LF3, 0x28);
2603 b43_radio_write(dev, B2063_PLL_JTAG_PLL_LF4, 0x63);
2604
2605 tmp3 = ((41 * (val3 - 3000)) /1200) + 27;
2606 tmp4 = lpphy_qdiv_roundup(132000 * tmp1, 8451, 16);
2607
2608 if ((tmp4 + tmp3 - 1) / tmp3 > 60) {
2609 scale = 1;
2610 tmp5 = ((tmp4 + tmp3) / (tmp3 << 1)) - 8;
2611 } else {
2612 scale = 0;
2613 tmp5 = ((tmp4 + (tmp3 >> 1)) / tmp3) - 8;
2614 }
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002615 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFC0, tmp5);
2616 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFBF, scale << 6);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002617
2618 tmp6 = lpphy_qdiv_roundup(100 * val1, val3, 16);
2619 tmp6 *= (tmp5 * 8) * (scale + 1);
2620 if (tmp6 > 150)
2621 tmp6 = 0;
2622
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002623 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFE0, tmp6);
2624 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFDF, scale << 5);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002625
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002626 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFFFB, 0x4);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002627 if (crystal_freq > 26000000)
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002628 b43_radio_set(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0x2);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002629 else
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002630 b43_radio_mask(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFD);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002631
2632 if (val1 == 45)
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002633 b43_radio_set(dev, B2063_PLL_JTAG_PLL_VCO1, 0x2);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002634 else
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002635 b43_radio_mask(dev, B2063_PLL_JTAG_PLL_VCO1, 0xFD);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002636
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002637 b43_radio_set(dev, B2063_PLL_SP2, 0x3);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002638 udelay(1);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002639 b43_radio_mask(dev, B2063_PLL_SP2, 0xFFFC);
Gábor Stefanik588f8372009-08-13 22:46:30 +02002640 lpphy_b2063_vco_calib(dev);
2641 b43_radio_write(dev, B2063_COMM15, old_comm15);
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002642
2643 return 0;
Gábor Stefanik588f8372009-08-13 22:46:30 +02002644}
2645
Michael Buesche63e4362008-08-30 10:55:48 +02002646static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
2647 unsigned int new_channel)
2648{
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002649 struct b43_phy_lp *lpphy = dev->phy.lp;
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002650 int err;
2651
Gábor Stefanik588f8372009-08-13 22:46:30 +02002652 if (dev->phy.radio_ver == 0x2063) {
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002653 err = lpphy_b2063_tune(dev, new_channel);
2654 if (err)
2655 return err;
Gábor Stefanik588f8372009-08-13 22:46:30 +02002656 } else {
Gábor Stefanik1e711be2009-08-14 00:15:17 +02002657 err = lpphy_b2062_tune(dev, new_channel);
2658 if (err)
2659 return err;
Gábor Stefanik5791ce12009-08-18 22:08:31 +02002660 lpphy_set_analog_filter(dev, new_channel);
Gábor Stefanik0c61bb92009-08-14 21:11:59 +02002661 lpphy_adjust_gain_table(dev, channel2freq_lp(new_channel));
Gábor Stefanik588f8372009-08-13 22:46:30 +02002662 }
2663
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002664 lpphy->channel = new_channel;
2665 b43_write16(dev, B43_MMIO_CHANNEL, new_channel);
2666
Michael Buesche63e4362008-08-30 10:55:48 +02002667 return 0;
2668}
2669
Gábor Stefanik588f8372009-08-13 22:46:30 +02002670static int b43_lpphy_op_init(struct b43_wldev *dev)
Michael Buesche63e4362008-08-30 10:55:48 +02002671{
Gábor Stefanik96909e92009-08-16 01:15:49 +02002672 int err;
2673
Gábor Stefanik588f8372009-08-13 22:46:30 +02002674 lpphy_read_band_sprom(dev); //FIXME should this be in prepare_structs?
2675 lpphy_baseband_init(dev);
2676 lpphy_radio_init(dev);
2677 lpphy_calibrate_rc(dev);
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002678 err = b43_lpphy_op_switch_channel(dev, 7);
Gábor Stefanik96909e92009-08-16 01:15:49 +02002679 if (err) {
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002680 b43dbg(dev->wl, "Switch to channel 7 failed, error = %d.\n",
Gábor Stefanik96909e92009-08-16 01:15:49 +02002681 err);
2682 }
Gábor Stefanik588f8372009-08-13 22:46:30 +02002683 lpphy_tx_pctl_init(dev);
2684 lpphy_calibration(dev);
2685 //TODO ACI init
2686
2687 return 0;
Michael Buesche63e4362008-08-30 10:55:48 +02002688}
2689
Michael Buesche63e4362008-08-30 10:55:48 +02002690static void b43_lpphy_op_adjust_txpower(struct b43_wldev *dev)
2691{
2692 //TODO
2693}
2694
2695static enum b43_txpwr_result b43_lpphy_op_recalc_txpower(struct b43_wldev *dev,
2696 bool ignore_tssi)
2697{
2698 //TODO
2699 return B43_TXPWR_RES_DONE;
2700}
2701
John W. Linville41950bd2010-07-21 11:37:19 -04002702static void b43_lpphy_op_switch_analog(struct b43_wldev *dev, bool on)
Thomas Ilnseher93087792009-09-14 23:01:33 +02002703{
2704 if (on) {
2705 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xfff8);
2706 } else {
2707 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0x0007);
2708 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 0x0007);
2709 }
2710}
2711
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01002712static void b43_lpphy_op_pwork_15sec(struct b43_wldev *dev)
2713{
2714 //TODO
2715}
2716
Michael Buesche63e4362008-08-30 10:55:48 +02002717const struct b43_phy_operations b43_phyops_lp = {
2718 .allocate = b43_lpphy_op_allocate,
Michael Bueschfb111372008-09-02 13:00:34 +02002719 .free = b43_lpphy_op_free,
2720 .prepare_structs = b43_lpphy_op_prepare_structs,
Michael Buesche63e4362008-08-30 10:55:48 +02002721 .init = b43_lpphy_op_init,
Michael Buesche63e4362008-08-30 10:55:48 +02002722 .phy_read = b43_lpphy_op_read,
2723 .phy_write = b43_lpphy_op_write,
Gábor Stefanik68ec5322009-08-26 20:51:25 +02002724 .phy_maskset = b43_lpphy_op_maskset,
Michael Buesche63e4362008-08-30 10:55:48 +02002725 .radio_read = b43_lpphy_op_radio_read,
2726 .radio_write = b43_lpphy_op_radio_write,
2727 .software_rfkill = b43_lpphy_op_software_rfkill,
Thomas Ilnseher93087792009-09-14 23:01:33 +02002728 .switch_analog = b43_lpphy_op_switch_analog,
Michael Buesche63e4362008-08-30 10:55:48 +02002729 .switch_channel = b43_lpphy_op_switch_channel,
2730 .get_default_chan = b43_lpphy_op_get_default_chan,
2731 .set_rx_antenna = b43_lpphy_op_set_rx_antenna,
2732 .recalc_txpower = b43_lpphy_op_recalc_txpower,
2733 .adjust_txpower = b43_lpphy_op_adjust_txpower,
Gábor Stefanik2c0d6102009-10-25 16:26:36 +01002734 .pwork_15sec = b43_lpphy_op_pwork_15sec,
2735 .pwork_60sec = lpphy_calibration,
Michael Buesche63e4362008-08-30 10:55:48 +02002736};