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Salil76ad4f02017-08-02 16:59:45 +01001/*
2 * Copyright (c) 2016~2017 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include <linux/dma-mapping.h>
11#include <linux/etherdevice.h>
12#include <linux/interrupt.h>
13#include <linux/if_vlan.h>
14#include <linux/ip.h>
15#include <linux/ipv6.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/skbuff.h>
19#include <linux/sctp.h>
20#include <linux/vermagic.h>
21#include <net/gre.h>
Yunsheng Lin30d240d2017-10-17 14:51:30 +080022#include <net/pkt_cls.h>
Salil76ad4f02017-08-02 16:59:45 +010023#include <net/vxlan.h>
24
25#include "hnae3.h"
26#include "hns3_enet.h"
27
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +080028static const char hns3_driver_name[] = "hns3";
Salil76ad4f02017-08-02 16:59:45 +010029const char hns3_driver_version[] = VERMAGIC_STRING;
30static const char hns3_driver_string[] =
31 "Hisilicon Ethernet Network Driver for Hip08 Family";
32static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
33static struct hnae3_client client;
34
35/* hns3_pci_tbl - PCI Device ID Table
36 *
37 * Last entry must be all 0s
38 *
39 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
40 * Class, Class Mask, private data (not used) }
41 */
42static const struct pci_device_id hns3_pci_tbl[] = {
43 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
Yunsheng Line92a0842017-09-20 18:52:50 +080045 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080046 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080047 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080048 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080049 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080050 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080051 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080052 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080053 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080054 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Salil Mehta424eb832017-12-14 18:03:06 +000055 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
56 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF), 0},
Salil76ad4f02017-08-02 16:59:45 +010057 /* required last entry */
58 {0, }
59};
60MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
61
62static irqreturn_t hns3_irq_handle(int irq, void *dev)
63{
64 struct hns3_enet_tqp_vector *tqp_vector = dev;
65
66 napi_schedule(&tqp_vector->napi);
67
68 return IRQ_HANDLED;
69}
70
71static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
72{
73 struct hns3_enet_tqp_vector *tqp_vectors;
74 unsigned int i;
75
76 for (i = 0; i < priv->vector_num; i++) {
77 tqp_vectors = &priv->tqp_vector[i];
78
79 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
80 continue;
81
82 /* release the irq resource */
83 free_irq(tqp_vectors->vector_irq, tqp_vectors);
84 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
85 }
86}
87
88static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
89{
90 struct hns3_enet_tqp_vector *tqp_vectors;
91 int txrx_int_idx = 0;
92 int rx_int_idx = 0;
93 int tx_int_idx = 0;
94 unsigned int i;
95 int ret;
96
97 for (i = 0; i < priv->vector_num; i++) {
98 tqp_vectors = &priv->tqp_vector[i];
99
100 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
101 continue;
102
103 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
104 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
105 "%s-%s-%d", priv->netdev->name, "TxRx",
106 txrx_int_idx++);
107 txrx_int_idx++;
108 } else if (tqp_vectors->rx_group.ring) {
109 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
110 "%s-%s-%d", priv->netdev->name, "Rx",
111 rx_int_idx++);
112 } else if (tqp_vectors->tx_group.ring) {
113 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
114 "%s-%s-%d", priv->netdev->name, "Tx",
115 tx_int_idx++);
116 } else {
117 /* Skip this unused q_vector */
118 continue;
119 }
120
121 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
122
123 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
124 tqp_vectors->name,
125 tqp_vectors);
126 if (ret) {
127 netdev_err(priv->netdev, "request irq(%d) fail\n",
128 tqp_vectors->vector_irq);
129 return ret;
130 }
131
132 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
133 }
134
135 return 0;
136}
137
138static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
139 u32 mask_en)
140{
141 writel(mask_en, tqp_vector->mask_addr);
142}
143
144static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
145{
146 napi_enable(&tqp_vector->napi);
147
148 /* enable vector */
149 hns3_mask_vector_irq(tqp_vector, 1);
150}
151
152static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
153{
154 /* disable vector */
155 hns3_mask_vector_irq(tqp_vector, 0);
156
157 disable_irq(tqp_vector->vector_irq);
158 napi_disable(&tqp_vector->napi);
159}
160
Fuyun Liang434776a2018-01-12 16:23:10 +0800161void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
162 u32 rl_value)
Salil76ad4f02017-08-02 16:59:45 +0100163{
Fuyun Liang434776a2018-01-12 16:23:10 +0800164 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
165
Salil76ad4f02017-08-02 16:59:45 +0100166 /* this defines the configuration for RL (Interrupt Rate Limiter).
167 * Rl defines rate of interrupts i.e. number of interrupts-per-second
168 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
169 */
Fuyun Liang434776a2018-01-12 16:23:10 +0800170
171 if (rl_reg > 0 && !tqp_vector->tx_group.gl_adapt_enable &&
172 !tqp_vector->rx_group.gl_adapt_enable)
173 /* According to the hardware, the range of rl_reg is
174 * 0-59 and the unit is 4.
175 */
176 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
177
178 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
179}
180
181void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
182 u32 gl_value)
183{
184 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
185
186 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
187}
188
189void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
190 u32 gl_value)
191{
192 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
193
194 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
Salil76ad4f02017-08-02 16:59:45 +0100195}
196
Fuyun Liang5fd47892018-01-12 16:23:11 +0800197static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
198 struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +0100199{
Fuyun Liang5fd47892018-01-12 16:23:11 +0800200 struct hnae3_handle *h = priv->ae_handle;
201
Salil76ad4f02017-08-02 16:59:45 +0100202 /* initialize the configuration for interrupt coalescing.
203 * 1. GL (Interrupt Gap Limiter)
204 * 2. RL (Interrupt Rate Limiter)
205 */
206
Fuyun Liang5fd47892018-01-12 16:23:11 +0800207 /* Default: enable interrupt coalescing self-adaptive and GL */
208 tqp_vector->tx_group.gl_adapt_enable = 1;
209 tqp_vector->rx_group.gl_adapt_enable = 1;
210
Salil76ad4f02017-08-02 16:59:45 +0100211 tqp_vector->tx_group.int_gl = HNS3_INT_GL_50K;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800212 tqp_vector->rx_group.int_gl = HNS3_INT_GL_50K;
213
214 hns3_set_vector_coalesce_tx_gl(tqp_vector,
215 tqp_vector->tx_group.int_gl);
216 hns3_set_vector_coalesce_rx_gl(tqp_vector,
217 tqp_vector->rx_group.int_gl);
218
219 /* Default: disable RL */
220 h->kinfo.int_rl_setting = 0;
221 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
222
Salil76ad4f02017-08-02 16:59:45 +0100223 tqp_vector->rx_group.flow_level = HNS3_FLOW_LOW;
224 tqp_vector->tx_group.flow_level = HNS3_FLOW_LOW;
225}
226
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800227static int hns3_nic_set_real_num_queue(struct net_device *netdev)
228{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800229 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800230 struct hnae3_knic_private_info *kinfo = &h->kinfo;
231 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
232 int ret;
233
234 ret = netif_set_real_num_tx_queues(netdev, queue_size);
235 if (ret) {
236 netdev_err(netdev,
237 "netif_set_real_num_tx_queues fail, ret=%d!\n",
238 ret);
239 return ret;
240 }
241
242 ret = netif_set_real_num_rx_queues(netdev, queue_size);
243 if (ret) {
244 netdev_err(netdev,
245 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
246 return ret;
247 }
248
249 return 0;
250}
251
Peng Li678335a12018-03-08 19:41:54 +0800252static u16 hns3_get_max_available_channels(struct hnae3_handle *h)
253{
254 u16 free_tqps, max_rss_size, max_tqps;
255
256 h->ae_algo->ops->get_tqps_and_rss_info(h, &free_tqps, &max_rss_size);
257 max_tqps = h->kinfo.num_tc * max_rss_size;
258
259 return min_t(u16, max_tqps, (free_tqps + h->kinfo.num_tqps));
260}
261
Salil76ad4f02017-08-02 16:59:45 +0100262static int hns3_nic_net_up(struct net_device *netdev)
263{
264 struct hns3_nic_priv *priv = netdev_priv(netdev);
265 struct hnae3_handle *h = priv->ae_handle;
266 int i, j;
267 int ret;
268
269 /* get irq resource for all vectors */
270 ret = hns3_nic_init_irq(priv);
271 if (ret) {
272 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
273 return ret;
274 }
275
276 /* enable the vectors */
277 for (i = 0; i < priv->vector_num; i++)
278 hns3_vector_enable(&priv->tqp_vector[i]);
279
280 /* start the ae_dev */
281 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
282 if (ret)
283 goto out_start_err;
284
Jian Shenb875cc32018-01-05 18:18:11 +0800285 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
286
Salil76ad4f02017-08-02 16:59:45 +0100287 return 0;
288
289out_start_err:
290 for (j = i - 1; j >= 0; j--)
291 hns3_vector_disable(&priv->tqp_vector[j]);
292
293 hns3_nic_uninit_irq(priv);
294
295 return ret;
296}
297
298static int hns3_nic_net_open(struct net_device *netdev)
299{
Lipengf8fa222c2017-11-02 20:45:20 +0800300 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100301 int ret;
302
303 netif_carrier_off(netdev);
304
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800305 ret = hns3_nic_set_real_num_queue(netdev);
306 if (ret)
Salil76ad4f02017-08-02 16:59:45 +0100307 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100308
309 ret = hns3_nic_net_up(netdev);
310 if (ret) {
311 netdev_err(netdev,
312 "hns net up fail, ret=%d!\n", ret);
313 return ret;
314 }
315
Lipengf8fa222c2017-11-02 20:45:20 +0800316 priv->last_reset_time = jiffies;
Salil76ad4f02017-08-02 16:59:45 +0100317 return 0;
318}
319
320static void hns3_nic_net_down(struct net_device *netdev)
321{
322 struct hns3_nic_priv *priv = netdev_priv(netdev);
323 const struct hnae3_ae_ops *ops;
324 int i;
325
Jian Shenb875cc32018-01-05 18:18:11 +0800326 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
327 return;
328
Salil76ad4f02017-08-02 16:59:45 +0100329 /* stop ae_dev */
330 ops = priv->ae_handle->ae_algo->ops;
331 if (ops->stop)
332 ops->stop(priv->ae_handle);
333
334 /* disable vectors */
335 for (i = 0; i < priv->vector_num; i++)
336 hns3_vector_disable(&priv->tqp_vector[i]);
337
338 /* free irq resources */
339 hns3_nic_uninit_irq(priv);
340}
341
342static int hns3_nic_net_stop(struct net_device *netdev)
343{
344 netif_tx_stop_all_queues(netdev);
345 netif_carrier_off(netdev);
346
347 hns3_nic_net_down(netdev);
348
349 return 0;
350}
351
Salil76ad4f02017-08-02 16:59:45 +0100352static int hns3_nic_uc_sync(struct net_device *netdev,
353 const unsigned char *addr)
354{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800355 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100356
357 if (h->ae_algo->ops->add_uc_addr)
358 return h->ae_algo->ops->add_uc_addr(h, addr);
359
360 return 0;
361}
362
363static int hns3_nic_uc_unsync(struct net_device *netdev,
364 const unsigned char *addr)
365{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800366 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100367
368 if (h->ae_algo->ops->rm_uc_addr)
369 return h->ae_algo->ops->rm_uc_addr(h, addr);
370
371 return 0;
372}
373
374static int hns3_nic_mc_sync(struct net_device *netdev,
375 const unsigned char *addr)
376{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800377 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100378
Dan Carpenter720a8472017-08-10 12:56:14 +0300379 if (h->ae_algo->ops->add_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100380 return h->ae_algo->ops->add_mc_addr(h, addr);
381
382 return 0;
383}
384
385static int hns3_nic_mc_unsync(struct net_device *netdev,
386 const unsigned char *addr)
387{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800388 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100389
Dan Carpenter720a8472017-08-10 12:56:14 +0300390 if (h->ae_algo->ops->rm_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100391 return h->ae_algo->ops->rm_mc_addr(h, addr);
392
393 return 0;
394}
395
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +0800396static void hns3_nic_set_rx_mode(struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +0100397{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800398 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100399
400 if (h->ae_algo->ops->set_promisc_mode) {
401 if (netdev->flags & IFF_PROMISC)
402 h->ae_algo->ops->set_promisc_mode(h, 1);
403 else
404 h->ae_algo->ops->set_promisc_mode(h, 0);
405 }
406 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync))
407 netdev_err(netdev, "sync uc address fail\n");
408 if (netdev->flags & IFF_MULTICAST)
409 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync))
410 netdev_err(netdev, "sync mc address fail\n");
411}
412
413static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
414 u16 *mss, u32 *type_cs_vlan_tso)
415{
416 u32 l4_offset, hdr_len;
417 union l3_hdr_info l3;
418 union l4_hdr_info l4;
419 u32 l4_paylen;
420 int ret;
421
422 if (!skb_is_gso(skb))
423 return 0;
424
425 ret = skb_cow_head(skb, 0);
426 if (ret)
427 return ret;
428
429 l3.hdr = skb_network_header(skb);
430 l4.hdr = skb_transport_header(skb);
431
432 /* Software should clear the IPv4's checksum field when tso is
433 * needed.
434 */
435 if (l3.v4->version == 4)
436 l3.v4->check = 0;
437
438 /* tunnel packet.*/
439 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
440 SKB_GSO_GRE_CSUM |
441 SKB_GSO_UDP_TUNNEL |
442 SKB_GSO_UDP_TUNNEL_CSUM)) {
443 if ((!(skb_shinfo(skb)->gso_type &
444 SKB_GSO_PARTIAL)) &&
445 (skb_shinfo(skb)->gso_type &
446 SKB_GSO_UDP_TUNNEL_CSUM)) {
447 /* Software should clear the udp's checksum
448 * field when tso is needed.
449 */
450 l4.udp->check = 0;
451 }
452 /* reset l3&l4 pointers from outer to inner headers */
453 l3.hdr = skb_inner_network_header(skb);
454 l4.hdr = skb_inner_transport_header(skb);
455
456 /* Software should clear the IPv4's checksum field when
457 * tso is needed.
458 */
459 if (l3.v4->version == 4)
460 l3.v4->check = 0;
461 }
462
463 /* normal or tunnel packet*/
464 l4_offset = l4.hdr - skb->data;
465 hdr_len = (l4.tcp->doff * 4) + l4_offset;
466
467 /* remove payload length from inner pseudo checksum when tso*/
468 l4_paylen = skb->len - l4_offset;
469 csum_replace_by_diff(&l4.tcp->check,
470 (__force __wsum)htonl(l4_paylen));
471
472 /* find the txbd field values */
473 *paylen = skb->len - hdr_len;
474 hnae_set_bit(*type_cs_vlan_tso,
475 HNS3_TXD_TSO_B, 1);
476
477 /* get MSS for TSO */
478 *mss = skb_shinfo(skb)->gso_size;
479
480 return 0;
481}
482
Salil1898d4e2017-08-18 12:31:39 +0100483static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
484 u8 *il4_proto)
Salil76ad4f02017-08-02 16:59:45 +0100485{
486 union {
487 struct iphdr *v4;
488 struct ipv6hdr *v6;
489 unsigned char *hdr;
490 } l3;
491 unsigned char *l4_hdr;
492 unsigned char *exthdr;
493 u8 l4_proto_tmp;
494 __be16 frag_off;
495
496 /* find outer header point */
497 l3.hdr = skb_network_header(skb);
498 l4_hdr = skb_inner_transport_header(skb);
499
500 if (skb->protocol == htons(ETH_P_IPV6)) {
501 exthdr = l3.hdr + sizeof(*l3.v6);
502 l4_proto_tmp = l3.v6->nexthdr;
503 if (l4_hdr != exthdr)
504 ipv6_skip_exthdr(skb, exthdr - skb->data,
505 &l4_proto_tmp, &frag_off);
506 } else if (skb->protocol == htons(ETH_P_IP)) {
507 l4_proto_tmp = l3.v4->protocol;
Salil1898d4e2017-08-18 12:31:39 +0100508 } else {
509 return -EINVAL;
Salil76ad4f02017-08-02 16:59:45 +0100510 }
511
512 *ol4_proto = l4_proto_tmp;
513
514 /* tunnel packet */
515 if (!skb->encapsulation) {
516 *il4_proto = 0;
Salil1898d4e2017-08-18 12:31:39 +0100517 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100518 }
519
520 /* find inner header point */
521 l3.hdr = skb_inner_network_header(skb);
522 l4_hdr = skb_inner_transport_header(skb);
523
524 if (l3.v6->version == 6) {
525 exthdr = l3.hdr + sizeof(*l3.v6);
526 l4_proto_tmp = l3.v6->nexthdr;
527 if (l4_hdr != exthdr)
528 ipv6_skip_exthdr(skb, exthdr - skb->data,
529 &l4_proto_tmp, &frag_off);
530 } else if (l3.v4->version == 4) {
531 l4_proto_tmp = l3.v4->protocol;
532 }
533
534 *il4_proto = l4_proto_tmp;
Salil1898d4e2017-08-18 12:31:39 +0100535
536 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100537}
538
539static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
540 u8 il4_proto, u32 *type_cs_vlan_tso,
541 u32 *ol_type_vlan_len_msec)
542{
543 union {
544 struct iphdr *v4;
545 struct ipv6hdr *v6;
546 unsigned char *hdr;
547 } l3;
548 union {
549 struct tcphdr *tcp;
550 struct udphdr *udp;
551 struct gre_base_hdr *gre;
552 unsigned char *hdr;
553 } l4;
554 unsigned char *l2_hdr;
555 u8 l4_proto = ol4_proto;
556 u32 ol2_len;
557 u32 ol3_len;
558 u32 ol4_len;
559 u32 l2_len;
560 u32 l3_len;
561
562 l3.hdr = skb_network_header(skb);
563 l4.hdr = skb_transport_header(skb);
564
565 /* compute L2 header size for normal packet, defined in 2 Bytes */
566 l2_len = l3.hdr - skb->data;
567 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
568 HNS3_TXD_L2LEN_S, l2_len >> 1);
569
570 /* tunnel packet*/
571 if (skb->encapsulation) {
572 /* compute OL2 header size, defined in 2 Bytes */
573 ol2_len = l2_len;
574 hnae_set_field(*ol_type_vlan_len_msec,
575 HNS3_TXD_L2LEN_M,
576 HNS3_TXD_L2LEN_S, ol2_len >> 1);
577
578 /* compute OL3 header size, defined in 4 Bytes */
579 ol3_len = l4.hdr - l3.hdr;
580 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
581 HNS3_TXD_L3LEN_S, ol3_len >> 2);
582
583 /* MAC in UDP, MAC in GRE (0x6558)*/
584 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
585 /* switch MAC header ptr from outer to inner header.*/
586 l2_hdr = skb_inner_mac_header(skb);
587
588 /* compute OL4 header size, defined in 4 Bytes. */
589 ol4_len = l2_hdr - l4.hdr;
590 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_M,
591 HNS3_TXD_L4LEN_S, ol4_len >> 2);
592
593 /* switch IP header ptr from outer to inner header */
594 l3.hdr = skb_inner_network_header(skb);
595
596 /* compute inner l2 header size, defined in 2 Bytes. */
597 l2_len = l3.hdr - l2_hdr;
598 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
599 HNS3_TXD_L2LEN_S, l2_len >> 1);
600 } else {
601 /* skb packet types not supported by hardware,
602 * txbd len fild doesn't be filled.
603 */
604 return;
605 }
606
607 /* switch L4 header pointer from outer to inner */
608 l4.hdr = skb_inner_transport_header(skb);
609
610 l4_proto = il4_proto;
611 }
612
613 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
614 l3_len = l4.hdr - l3.hdr;
615 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
616 HNS3_TXD_L3LEN_S, l3_len >> 2);
617
618 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
619 switch (l4_proto) {
620 case IPPROTO_TCP:
621 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
622 HNS3_TXD_L4LEN_S, l4.tcp->doff);
623 break;
624 case IPPROTO_SCTP:
625 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
626 HNS3_TXD_L4LEN_S, (sizeof(struct sctphdr) >> 2));
627 break;
628 case IPPROTO_UDP:
629 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
630 HNS3_TXD_L4LEN_S, (sizeof(struct udphdr) >> 2));
631 break;
632 default:
633 /* skb packet types not supported by hardware,
634 * txbd len fild doesn't be filled.
635 */
636 return;
637 }
638}
639
640static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
641 u8 il4_proto, u32 *type_cs_vlan_tso,
642 u32 *ol_type_vlan_len_msec)
643{
644 union {
645 struct iphdr *v4;
646 struct ipv6hdr *v6;
647 unsigned char *hdr;
648 } l3;
649 u32 l4_proto = ol4_proto;
650
651 l3.hdr = skb_network_header(skb);
652
653 /* define OL3 type and tunnel type(OL4).*/
654 if (skb->encapsulation) {
655 /* define outer network header type.*/
656 if (skb->protocol == htons(ETH_P_IP)) {
657 if (skb_is_gso(skb))
658 hnae_set_field(*ol_type_vlan_len_msec,
659 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
660 HNS3_OL3T_IPV4_CSUM);
661 else
662 hnae_set_field(*ol_type_vlan_len_msec,
663 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
664 HNS3_OL3T_IPV4_NO_CSUM);
665
666 } else if (skb->protocol == htons(ETH_P_IPV6)) {
667 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
668 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
669 }
670
671 /* define tunnel type(OL4).*/
672 switch (l4_proto) {
673 case IPPROTO_UDP:
674 hnae_set_field(*ol_type_vlan_len_msec,
675 HNS3_TXD_TUNTYPE_M,
676 HNS3_TXD_TUNTYPE_S,
677 HNS3_TUN_MAC_IN_UDP);
678 break;
679 case IPPROTO_GRE:
680 hnae_set_field(*ol_type_vlan_len_msec,
681 HNS3_TXD_TUNTYPE_M,
682 HNS3_TXD_TUNTYPE_S,
683 HNS3_TUN_NVGRE);
684 break;
685 default:
686 /* drop the skb tunnel packet if hardware don't support,
687 * because hardware can't calculate csum when TSO.
688 */
689 if (skb_is_gso(skb))
690 return -EDOM;
691
692 /* the stack computes the IP header already,
693 * driver calculate l4 checksum when not TSO.
694 */
695 skb_checksum_help(skb);
696 return 0;
697 }
698
699 l3.hdr = skb_inner_network_header(skb);
700 l4_proto = il4_proto;
701 }
702
703 if (l3.v4->version == 4) {
704 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
705 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
706
707 /* the stack computes the IP header already, the only time we
708 * need the hardware to recompute it is in the case of TSO.
709 */
710 if (skb_is_gso(skb))
711 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
712
713 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
714 } else if (l3.v6->version == 6) {
715 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
716 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
717 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
718 }
719
720 switch (l4_proto) {
721 case IPPROTO_TCP:
722 hnae_set_field(*type_cs_vlan_tso,
723 HNS3_TXD_L4T_M,
724 HNS3_TXD_L4T_S,
725 HNS3_L4T_TCP);
726 break;
727 case IPPROTO_UDP:
728 hnae_set_field(*type_cs_vlan_tso,
729 HNS3_TXD_L4T_M,
730 HNS3_TXD_L4T_S,
731 HNS3_L4T_UDP);
732 break;
733 case IPPROTO_SCTP:
734 hnae_set_field(*type_cs_vlan_tso,
735 HNS3_TXD_L4T_M,
736 HNS3_TXD_L4T_S,
737 HNS3_L4T_SCTP);
738 break;
739 default:
740 /* drop the skb tunnel packet if hardware don't support,
741 * because hardware can't calculate csum when TSO.
742 */
743 if (skb_is_gso(skb))
744 return -EDOM;
745
746 /* the stack computes the IP header already,
747 * driver calculate l4 checksum when not TSO.
748 */
749 skb_checksum_help(skb);
750 return 0;
751 }
752
753 return 0;
754}
755
756static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
757{
758 /* Config bd buffer end */
759 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
760 HNS3_TXD_BDTYPE_M, 0);
761 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
762 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
Lipeng7036d262017-10-24 21:02:09 +0800763 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
Salil76ad4f02017-08-02 16:59:45 +0100764}
765
Peng Li9699cff2017-12-22 12:21:48 +0800766static int hns3_fill_desc_vtags(struct sk_buff *skb,
767 struct hns3_enet_ring *tx_ring,
768 u32 *inner_vlan_flag,
769 u32 *out_vlan_flag,
770 u16 *inner_vtag,
771 u16 *out_vtag)
772{
773#define HNS3_TX_VLAN_PRIO_SHIFT 13
774
775 if (skb->protocol == htons(ETH_P_8021Q) &&
776 !(tx_ring->tqp->handle->kinfo.netdev->features &
777 NETIF_F_HW_VLAN_CTAG_TX)) {
778 /* When HW VLAN acceleration is turned off, and the stack
779 * sets the protocol to 802.1q, the driver just need to
780 * set the protocol to the encapsulated ethertype.
781 */
782 skb->protocol = vlan_get_protocol(skb);
783 return 0;
784 }
785
786 if (skb_vlan_tag_present(skb)) {
787 u16 vlan_tag;
788
789 vlan_tag = skb_vlan_tag_get(skb);
790 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
791
792 /* Based on hw strategy, use out_vtag in two layer tag case,
793 * and use inner_vtag in one tag case.
794 */
795 if (skb->protocol == htons(ETH_P_8021Q)) {
796 hnae_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
797 *out_vtag = vlan_tag;
798 } else {
799 hnae_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
800 *inner_vtag = vlan_tag;
801 }
802 } else if (skb->protocol == htons(ETH_P_8021Q)) {
803 struct vlan_ethhdr *vhdr;
804 int rc;
805
806 rc = skb_cow_head(skb, 0);
807 if (rc < 0)
808 return rc;
809 vhdr = (struct vlan_ethhdr *)skb->data;
810 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
811 << HNS3_TX_VLAN_PRIO_SHIFT);
812 }
813
814 skb->protocol = vlan_get_protocol(skb);
815 return 0;
816}
817
Salil76ad4f02017-08-02 16:59:45 +0100818static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
819 int size, dma_addr_t dma, int frag_end,
820 enum hns_desc_type type)
821{
822 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
823 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
824 u32 ol_type_vlan_len_msec = 0;
825 u16 bdtp_fe_sc_vld_ra_ri = 0;
826 u32 type_cs_vlan_tso = 0;
827 struct sk_buff *skb;
Peng Li9699cff2017-12-22 12:21:48 +0800828 u16 inner_vtag = 0;
829 u16 out_vtag = 0;
Salil76ad4f02017-08-02 16:59:45 +0100830 u32 paylen = 0;
831 u16 mss = 0;
832 __be16 protocol;
833 u8 ol4_proto;
834 u8 il4_proto;
835 int ret;
836
837 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
838 desc_cb->priv = priv;
839 desc_cb->length = size;
840 desc_cb->dma = dma;
841 desc_cb->type = type;
842
843 /* now, fill the descriptor */
844 desc->addr = cpu_to_le64(dma);
845 desc->tx.send_size = cpu_to_le16((u16)size);
846 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
847 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
848
849 if (type == DESC_TYPE_SKB) {
850 skb = (struct sk_buff *)priv;
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800851 paylen = skb->len;
Salil76ad4f02017-08-02 16:59:45 +0100852
Peng Li9699cff2017-12-22 12:21:48 +0800853 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
854 &ol_type_vlan_len_msec,
855 &inner_vtag, &out_vtag);
856 if (unlikely(ret))
857 return ret;
858
Salil76ad4f02017-08-02 16:59:45 +0100859 if (skb->ip_summed == CHECKSUM_PARTIAL) {
860 skb_reset_mac_len(skb);
861 protocol = skb->protocol;
862
Salil1898d4e2017-08-18 12:31:39 +0100863 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
864 if (ret)
865 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100866 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
867 &type_cs_vlan_tso,
868 &ol_type_vlan_len_msec);
869 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
870 &type_cs_vlan_tso,
871 &ol_type_vlan_len_msec);
872 if (ret)
873 return ret;
874
875 ret = hns3_set_tso(skb, &paylen, &mss,
876 &type_cs_vlan_tso);
877 if (ret)
878 return ret;
879 }
880
881 /* Set txbd */
882 desc->tx.ol_type_vlan_len_msec =
883 cpu_to_le32(ol_type_vlan_len_msec);
884 desc->tx.type_cs_vlan_tso_len =
885 cpu_to_le32(type_cs_vlan_tso);
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800886 desc->tx.paylen = cpu_to_le32(paylen);
Salil76ad4f02017-08-02 16:59:45 +0100887 desc->tx.mss = cpu_to_le16(mss);
Peng Li9699cff2017-12-22 12:21:48 +0800888 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
889 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
Salil76ad4f02017-08-02 16:59:45 +0100890 }
891
892 /* move ring pointer to next.*/
893 ring_ptr_move_fw(ring, next_to_use);
894
895 return 0;
896}
897
898static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv,
899 int size, dma_addr_t dma, int frag_end,
900 enum hns_desc_type type)
901{
902 unsigned int frag_buf_num;
903 unsigned int k;
904 int sizeoflast;
905 int ret;
906
907 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
908 sizeoflast = size % HNS3_MAX_BD_SIZE;
909 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
910
911 /* When the frag size is bigger than hardware, split this frag */
912 for (k = 0; k < frag_buf_num; k++) {
913 ret = hns3_fill_desc(ring, priv,
914 (k == frag_buf_num - 1) ?
915 sizeoflast : HNS3_MAX_BD_SIZE,
916 dma + HNS3_MAX_BD_SIZE * k,
917 frag_end && (k == frag_buf_num - 1) ? 1 : 0,
918 (type == DESC_TYPE_SKB && !k) ?
919 DESC_TYPE_SKB : DESC_TYPE_PAGE);
920 if (ret)
921 return ret;
922 }
923
924 return 0;
925}
926
927static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
928 struct hns3_enet_ring *ring)
929{
930 struct sk_buff *skb = *out_skb;
931 struct skb_frag_struct *frag;
932 int bdnum_for_frag;
933 int frag_num;
934 int buf_num;
935 int size;
936 int i;
937
938 size = skb_headlen(skb);
939 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
940
941 frag_num = skb_shinfo(skb)->nr_frags;
942 for (i = 0; i < frag_num; i++) {
943 frag = &skb_shinfo(skb)->frags[i];
944 size = skb_frag_size(frag);
945 bdnum_for_frag =
946 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
947 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
948 return -ENOMEM;
949
950 buf_num += bdnum_for_frag;
951 }
952
953 if (buf_num > ring_space(ring))
954 return -EBUSY;
955
956 *bnum = buf_num;
957 return 0;
958}
959
960static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
961 struct hns3_enet_ring *ring)
962{
963 struct sk_buff *skb = *out_skb;
964 int buf_num;
965
966 /* No. of segments (plus a header) */
967 buf_num = skb_shinfo(skb)->nr_frags + 1;
968
969 if (buf_num > ring_space(ring))
970 return -EBUSY;
971
972 *bnum = buf_num;
973
974 return 0;
975}
976
977static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig)
978{
979 struct device *dev = ring_to_dev(ring);
980 unsigned int i;
981
982 for (i = 0; i < ring->desc_num; i++) {
983 /* check if this is where we started */
984 if (ring->next_to_use == next_to_use_orig)
985 break;
986
987 /* unmap the descriptor dma address */
988 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
989 dma_unmap_single(dev,
990 ring->desc_cb[ring->next_to_use].dma,
991 ring->desc_cb[ring->next_to_use].length,
992 DMA_TO_DEVICE);
993 else
994 dma_unmap_page(dev,
995 ring->desc_cb[ring->next_to_use].dma,
996 ring->desc_cb[ring->next_to_use].length,
997 DMA_TO_DEVICE);
998
999 /* rollback one */
1000 ring_ptr_move_bw(ring, next_to_use);
1001 }
1002}
1003
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08001004netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +01001005{
1006 struct hns3_nic_priv *priv = netdev_priv(netdev);
1007 struct hns3_nic_ring_data *ring_data =
1008 &tx_ring_data(priv, skb->queue_mapping);
1009 struct hns3_enet_ring *ring = ring_data->ring;
1010 struct device *dev = priv->dev;
1011 struct netdev_queue *dev_queue;
1012 struct skb_frag_struct *frag;
1013 int next_to_use_head;
1014 int next_to_use_frag;
1015 dma_addr_t dma;
1016 int buf_num;
1017 int seg_num;
1018 int size;
1019 int ret;
1020 int i;
1021
1022 /* Prefetch the data used later */
1023 prefetch(skb->data);
1024
1025 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1026 case -EBUSY:
1027 u64_stats_update_begin(&ring->syncp);
1028 ring->stats.tx_busy++;
1029 u64_stats_update_end(&ring->syncp);
1030
1031 goto out_net_tx_busy;
1032 case -ENOMEM:
1033 u64_stats_update_begin(&ring->syncp);
1034 ring->stats.sw_err_cnt++;
1035 u64_stats_update_end(&ring->syncp);
1036 netdev_err(netdev, "no memory to xmit!\n");
1037
1038 goto out_err_tx_ok;
1039 default:
1040 break;
1041 }
1042
1043 /* No. of segments (plus a header) */
1044 seg_num = skb_shinfo(skb)->nr_frags + 1;
1045 /* Fill the first part */
1046 size = skb_headlen(skb);
1047
1048 next_to_use_head = ring->next_to_use;
1049
1050 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1051 if (dma_mapping_error(dev, dma)) {
1052 netdev_err(netdev, "TX head DMA map failed\n");
1053 ring->stats.sw_err_cnt++;
1054 goto out_err_tx_ok;
1055 }
1056
1057 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
1058 DESC_TYPE_SKB);
1059 if (ret)
1060 goto head_dma_map_err;
1061
1062 next_to_use_frag = ring->next_to_use;
1063 /* Fill the fragments */
1064 for (i = 1; i < seg_num; i++) {
1065 frag = &skb_shinfo(skb)->frags[i - 1];
1066 size = skb_frag_size(frag);
1067 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1068 if (dma_mapping_error(dev, dma)) {
1069 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i);
1070 ring->stats.sw_err_cnt++;
1071 goto frag_dma_map_err;
1072 }
1073 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
1074 seg_num - 1 == i ? 1 : 0,
1075 DESC_TYPE_PAGE);
1076
1077 if (ret)
1078 goto frag_dma_map_err;
1079 }
1080
1081 /* Complete translate all packets */
1082 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1083 netdev_tx_sent_queue(dev_queue, skb->len);
1084
1085 wmb(); /* Commit all data before submit */
1086
1087 hnae_queue_xmit(ring->tqp, buf_num);
1088
1089 return NETDEV_TX_OK;
1090
1091frag_dma_map_err:
1092 hns_nic_dma_unmap(ring, next_to_use_frag);
1093
1094head_dma_map_err:
1095 hns_nic_dma_unmap(ring, next_to_use_head);
1096
1097out_err_tx_ok:
1098 dev_kfree_skb_any(skb);
1099 return NETDEV_TX_OK;
1100
1101out_net_tx_busy:
1102 netif_stop_subqueue(netdev, ring_data->queue_index);
1103 smp_mb(); /* Commit all data before submit */
1104
1105 return NETDEV_TX_BUSY;
1106}
1107
1108static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1109{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001110 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001111 struct sockaddr *mac_addr = p;
1112 int ret;
1113
1114 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1115 return -EADDRNOTAVAIL;
1116
1117 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data);
1118 if (ret) {
1119 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1120 return ret;
1121 }
1122
1123 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1124
1125 return 0;
1126}
1127
1128static int hns3_nic_set_features(struct net_device *netdev,
1129 netdev_features_t features)
1130{
Jian Shen181d4542018-01-12 16:23:16 +08001131 netdev_features_t changed = netdev->features ^ features;
Salil76ad4f02017-08-02 16:59:45 +01001132 struct hns3_nic_priv *priv = netdev_priv(netdev);
Peng Li052ece62017-12-22 12:21:47 +08001133 struct hnae3_handle *h = priv->ae_handle;
Peng Li052ece62017-12-22 12:21:47 +08001134 int ret;
Salil76ad4f02017-08-02 16:59:45 +01001135
Jian Shen181d4542018-01-12 16:23:16 +08001136 if (changed & (NETIF_F_TSO | NETIF_F_TSO6)) {
1137 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1138 priv->ops.fill_desc = hns3_fill_desc_tso;
1139 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1140 } else {
1141 priv->ops.fill_desc = hns3_fill_desc;
1142 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1143 }
Salil76ad4f02017-08-02 16:59:45 +01001144 }
1145
Jian Shenbd368412018-01-12 16:23:17 +08001146 if ((changed & NETIF_F_HW_VLAN_CTAG_FILTER) &&
1147 h->ae_algo->ops->enable_vlan_filter) {
Jian Shen181d4542018-01-12 16:23:16 +08001148 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
1149 h->ae_algo->ops->enable_vlan_filter(h, true);
1150 else
1151 h->ae_algo->ops->enable_vlan_filter(h, false);
1152 }
Jian Shen391b5e92018-01-05 18:18:05 +08001153
Jian Shenbd368412018-01-12 16:23:17 +08001154 if ((changed & NETIF_F_HW_VLAN_CTAG_RX) &&
1155 h->ae_algo->ops->enable_hw_strip_rxvtag) {
Peng Li052ece62017-12-22 12:21:47 +08001156 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1157 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, true);
1158 else
1159 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, false);
1160
1161 if (ret)
1162 return ret;
1163 }
1164
Salil76ad4f02017-08-02 16:59:45 +01001165 netdev->features = features;
1166 return 0;
1167}
1168
Peng Li6c88d9d2018-01-09 14:50:59 +08001169static void hns3_nic_get_stats64(struct net_device *netdev,
1170 struct rtnl_link_stats64 *stats)
Salil76ad4f02017-08-02 16:59:45 +01001171{
1172 struct hns3_nic_priv *priv = netdev_priv(netdev);
1173 int queue_num = priv->ae_handle->kinfo.num_tqps;
Jian Shenc5f65482018-01-05 18:18:10 +08001174 struct hnae3_handle *handle = priv->ae_handle;
Salil76ad4f02017-08-02 16:59:45 +01001175 struct hns3_enet_ring *ring;
1176 unsigned int start;
1177 unsigned int idx;
1178 u64 tx_bytes = 0;
1179 u64 rx_bytes = 0;
1180 u64 tx_pkts = 0;
1181 u64 rx_pkts = 0;
Jian Shend2a5dca2018-01-05 18:18:12 +08001182 u64 tx_drop = 0;
1183 u64 rx_drop = 0;
Salil76ad4f02017-08-02 16:59:45 +01001184
Jian Shenb875cc32018-01-05 18:18:11 +08001185 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1186 return;
1187
Jian Shenc5f65482018-01-05 18:18:10 +08001188 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1189
Salil76ad4f02017-08-02 16:59:45 +01001190 for (idx = 0; idx < queue_num; idx++) {
1191 /* fetch the tx stats */
1192 ring = priv->ring_data[idx].ring;
1193 do {
Salild36d36c2017-08-18 12:31:37 +01001194 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001195 tx_bytes += ring->stats.tx_bytes;
1196 tx_pkts += ring->stats.tx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001197 tx_drop += ring->stats.tx_busy;
1198 tx_drop += ring->stats.sw_err_cnt;
Salil76ad4f02017-08-02 16:59:45 +01001199 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1200
1201 /* fetch the rx stats */
1202 ring = priv->ring_data[idx + queue_num].ring;
1203 do {
Salild36d36c2017-08-18 12:31:37 +01001204 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001205 rx_bytes += ring->stats.rx_bytes;
1206 rx_pkts += ring->stats.rx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001207 rx_drop += ring->stats.non_vld_descs;
1208 rx_drop += ring->stats.err_pkt_len;
1209 rx_drop += ring->stats.l2_err;
Salil76ad4f02017-08-02 16:59:45 +01001210 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1211 }
1212
1213 stats->tx_bytes = tx_bytes;
1214 stats->tx_packets = tx_pkts;
1215 stats->rx_bytes = rx_bytes;
1216 stats->rx_packets = rx_pkts;
1217
1218 stats->rx_errors = netdev->stats.rx_errors;
1219 stats->multicast = netdev->stats.multicast;
1220 stats->rx_length_errors = netdev->stats.rx_length_errors;
1221 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
1222 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1223
1224 stats->tx_errors = netdev->stats.tx_errors;
Jian Shend2a5dca2018-01-05 18:18:12 +08001225 stats->rx_dropped = rx_drop + netdev->stats.rx_dropped;
1226 stats->tx_dropped = tx_drop + netdev->stats.tx_dropped;
Salil76ad4f02017-08-02 16:59:45 +01001227 stats->collisions = netdev->stats.collisions;
1228 stats->rx_over_errors = netdev->stats.rx_over_errors;
1229 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1230 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1231 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1232 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1233 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1234 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1235 stats->tx_window_errors = netdev->stats.tx_window_errors;
1236 stats->rx_compressed = netdev->stats.rx_compressed;
1237 stats->tx_compressed = netdev->stats.tx_compressed;
1238}
1239
1240static void hns3_add_tunnel_port(struct net_device *netdev, u16 port,
1241 enum hns3_udp_tnl_type type)
1242{
1243 struct hns3_nic_priv *priv = netdev_priv(netdev);
1244 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1245 struct hnae3_handle *h = priv->ae_handle;
1246
1247 if (udp_tnl->used && udp_tnl->dst_port == port) {
1248 udp_tnl->used++;
1249 return;
1250 }
1251
1252 if (udp_tnl->used) {
1253 netdev_warn(netdev,
1254 "UDP tunnel [%d], port [%d] offload\n", type, port);
1255 return;
1256 }
1257
1258 udp_tnl->dst_port = port;
1259 udp_tnl->used = 1;
1260 /* TBD send command to hardware to add port */
1261 if (h->ae_algo->ops->add_tunnel_udp)
1262 h->ae_algo->ops->add_tunnel_udp(h, port);
1263}
1264
1265static void hns3_del_tunnel_port(struct net_device *netdev, u16 port,
1266 enum hns3_udp_tnl_type type)
1267{
1268 struct hns3_nic_priv *priv = netdev_priv(netdev);
1269 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1270 struct hnae3_handle *h = priv->ae_handle;
1271
1272 if (!udp_tnl->used || udp_tnl->dst_port != port) {
1273 netdev_warn(netdev,
1274 "Invalid UDP tunnel port %d\n", port);
1275 return;
1276 }
1277
1278 udp_tnl->used--;
1279 if (udp_tnl->used)
1280 return;
1281
1282 udp_tnl->dst_port = 0;
1283 /* TBD send command to hardware to del port */
1284 if (h->ae_algo->ops->del_tunnel_udp)
Dan Carpenter9537e7c2017-08-10 12:54:59 +03001285 h->ae_algo->ops->del_tunnel_udp(h, port);
Salil76ad4f02017-08-02 16:59:45 +01001286}
1287
1288/* hns3_nic_udp_tunnel_add - Get notifiacetion about UDP tunnel ports
1289 * @netdev: This physical ports's netdev
1290 * @ti: Tunnel information
1291 */
1292static void hns3_nic_udp_tunnel_add(struct net_device *netdev,
1293 struct udp_tunnel_info *ti)
1294{
1295 u16 port_n = ntohs(ti->port);
1296
1297 switch (ti->type) {
1298 case UDP_TUNNEL_TYPE_VXLAN:
1299 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1300 break;
1301 case UDP_TUNNEL_TYPE_GENEVE:
1302 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1303 break;
1304 default:
1305 netdev_err(netdev, "unsupported tunnel type %d\n", ti->type);
1306 break;
1307 }
1308}
1309
1310static void hns3_nic_udp_tunnel_del(struct net_device *netdev,
1311 struct udp_tunnel_info *ti)
1312{
1313 u16 port_n = ntohs(ti->port);
1314
1315 switch (ti->type) {
1316 case UDP_TUNNEL_TYPE_VXLAN:
1317 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1318 break;
1319 case UDP_TUNNEL_TYPE_GENEVE:
1320 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1321 break;
1322 default:
1323 break;
1324 }
1325}
1326
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001327static int hns3_setup_tc(struct net_device *netdev, void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001328{
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001329 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001330 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001331 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001332 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1333 u8 tc = mqprio_qopt->qopt.num_tc;
1334 u16 mode = mqprio_qopt->mode;
1335 u8 hw = mqprio_qopt->qopt.hw;
1336 bool if_running;
Salil76ad4f02017-08-02 16:59:45 +01001337 unsigned int i;
1338 int ret;
1339
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001340 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1341 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1342 return -EOPNOTSUPP;
1343
Salil76ad4f02017-08-02 16:59:45 +01001344 if (tc > HNAE3_MAX_TC)
1345 return -EINVAL;
1346
Salil76ad4f02017-08-02 16:59:45 +01001347 if (!netdev)
1348 return -EINVAL;
1349
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001350 if_running = netif_running(netdev);
1351 if (if_running) {
1352 hns3_nic_net_stop(netdev);
1353 msleep(100);
Salil76ad4f02017-08-02 16:59:45 +01001354 }
1355
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001356 ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1357 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001358 if (ret)
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001359 goto out;
Salil76ad4f02017-08-02 16:59:45 +01001360
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001361 if (tc <= 1) {
1362 netdev_reset_tc(netdev);
1363 } else {
1364 ret = netdev_set_num_tc(netdev, tc);
1365 if (ret)
1366 goto out;
1367
1368 for (i = 0; i < HNAE3_MAX_TC; i++) {
1369 if (!kinfo->tc_info[i].enable)
1370 continue;
1371
Salil76ad4f02017-08-02 16:59:45 +01001372 netdev_set_tc_queue(netdev,
1373 kinfo->tc_info[i].tc,
1374 kinfo->tc_info[i].tqp_count,
1375 kinfo->tc_info[i].tqp_offset);
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001376 }
Salil76ad4f02017-08-02 16:59:45 +01001377 }
1378
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001379 ret = hns3_nic_set_real_num_queue(netdev);
1380
1381out:
1382 if (if_running)
1383 hns3_nic_net_open(netdev);
1384
1385 return ret;
Salil76ad4f02017-08-02 16:59:45 +01001386}
1387
Jiri Pirko2572ac52017-08-07 10:15:17 +02001388static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
Jiri Pirkode4784c2017-08-07 10:15:32 +02001389 void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001390{
Nogah Frankel575ed7d2017-11-06 07:23:42 +01001391 if (type != TC_SETUP_QDISC_MQPRIO)
Jiri Pirko38cf0422017-08-07 10:15:31 +02001392 return -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001393
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001394 return hns3_setup_tc(dev, type_data);
Salil76ad4f02017-08-02 16:59:45 +01001395}
1396
1397static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1398 __be16 proto, u16 vid)
1399{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001400 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001401 int ret = -EIO;
1402
1403 if (h->ae_algo->ops->set_vlan_filter)
1404 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1405
1406 return ret;
1407}
1408
1409static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1410 __be16 proto, u16 vid)
1411{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001412 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001413 int ret = -EIO;
1414
1415 if (h->ae_algo->ops->set_vlan_filter)
1416 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1417
1418 return ret;
1419}
1420
1421static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1422 u8 qos, __be16 vlan_proto)
1423{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001424 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001425 int ret = -EIO;
1426
1427 if (h->ae_algo->ops->set_vf_vlan_filter)
1428 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1429 qos, vlan_proto);
1430
1431 return ret;
1432}
1433
Salila8e8b7f2017-08-21 17:05:24 +01001434static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1435{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001436 struct hnae3_handle *h = hns3_get_handle(netdev);
Salila8e8b7f2017-08-21 17:05:24 +01001437 bool if_running = netif_running(netdev);
1438 int ret;
1439
1440 if (!h->ae_algo->ops->set_mtu)
1441 return -EOPNOTSUPP;
1442
1443 /* if this was called with netdev up then bring netdevice down */
1444 if (if_running) {
1445 (void)hns3_nic_net_stop(netdev);
1446 msleep(100);
1447 }
1448
1449 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1450 if (ret) {
1451 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1452 ret);
1453 return ret;
1454 }
1455
Fuyun Liang5bad95a2018-01-05 18:18:20 +08001456 netdev->mtu = new_mtu;
1457
Salila8e8b7f2017-08-21 17:05:24 +01001458 /* if the netdev was running earlier, bring it up again */
1459 if (if_running && hns3_nic_net_open(netdev))
1460 ret = -EINVAL;
1461
1462 return ret;
1463}
1464
Lipengf8fa222c2017-11-02 20:45:20 +08001465static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1466{
1467 struct hns3_nic_priv *priv = netdev_priv(ndev);
1468 struct hns3_enet_ring *tx_ring = NULL;
1469 int timeout_queue = 0;
1470 int hw_head, hw_tail;
1471 int i;
1472
1473 /* Find the stopped queue the same way the stack does */
1474 for (i = 0; i < ndev->real_num_tx_queues; i++) {
1475 struct netdev_queue *q;
1476 unsigned long trans_start;
1477
1478 q = netdev_get_tx_queue(ndev, i);
1479 trans_start = q->trans_start;
1480 if (netif_xmit_stopped(q) &&
1481 time_after(jiffies,
1482 (trans_start + ndev->watchdog_timeo))) {
1483 timeout_queue = i;
1484 break;
1485 }
1486 }
1487
1488 if (i == ndev->num_tx_queues) {
1489 netdev_info(ndev,
1490 "no netdev TX timeout queue found, timeout count: %llu\n",
1491 priv->tx_timeout_count);
1492 return false;
1493 }
1494
1495 tx_ring = priv->ring_data[timeout_queue].ring;
1496
1497 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1498 HNS3_RING_TX_RING_HEAD_REG);
1499 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1500 HNS3_RING_TX_RING_TAIL_REG);
1501 netdev_info(ndev,
1502 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1503 priv->tx_timeout_count,
1504 timeout_queue,
1505 tx_ring->next_to_use,
1506 tx_ring->next_to_clean,
1507 hw_head,
1508 hw_tail,
1509 readl(tx_ring->tqp_vector->mask_addr));
1510
1511 return true;
1512}
1513
1514static void hns3_nic_net_timeout(struct net_device *ndev)
1515{
1516 struct hns3_nic_priv *priv = netdev_priv(ndev);
1517 unsigned long last_reset_time = priv->last_reset_time;
1518 struct hnae3_handle *h = priv->ae_handle;
1519
1520 if (!hns3_get_tx_timeo_queue_info(ndev))
1521 return;
1522
1523 priv->tx_timeout_count++;
1524
1525 /* This timeout is far away enough from last timeout,
1526 * if timeout again,set the reset type to PF reset
1527 */
1528 if (time_after(jiffies, (last_reset_time + 20 * HZ)))
1529 priv->reset_level = HNAE3_FUNC_RESET;
1530
1531 /* Don't do any new action before the next timeout */
1532 else if (time_before(jiffies, (last_reset_time + ndev->watchdog_timeo)))
1533 return;
1534
1535 priv->last_reset_time = jiffies;
1536
1537 if (h->ae_algo->ops->reset_event)
1538 h->ae_algo->ops->reset_event(h, priv->reset_level);
1539
1540 priv->reset_level++;
1541 if (priv->reset_level > HNAE3_GLOBAL_RESET)
1542 priv->reset_level = HNAE3_GLOBAL_RESET;
1543}
1544
Salil76ad4f02017-08-02 16:59:45 +01001545static const struct net_device_ops hns3_nic_netdev_ops = {
1546 .ndo_open = hns3_nic_net_open,
1547 .ndo_stop = hns3_nic_net_stop,
1548 .ndo_start_xmit = hns3_nic_net_xmit,
Lipengf8fa222c2017-11-02 20:45:20 +08001549 .ndo_tx_timeout = hns3_nic_net_timeout,
Salil76ad4f02017-08-02 16:59:45 +01001550 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
Salila8e8b7f2017-08-21 17:05:24 +01001551 .ndo_change_mtu = hns3_nic_change_mtu,
Salil76ad4f02017-08-02 16:59:45 +01001552 .ndo_set_features = hns3_nic_set_features,
1553 .ndo_get_stats64 = hns3_nic_get_stats64,
1554 .ndo_setup_tc = hns3_nic_setup_tc,
1555 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1556 .ndo_udp_tunnel_add = hns3_nic_udp_tunnel_add,
1557 .ndo_udp_tunnel_del = hns3_nic_udp_tunnel_del,
1558 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1559 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1560 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1561};
1562
1563/* hns3_probe - Device initialization routine
1564 * @pdev: PCI device information struct
1565 * @ent: entry in hns3_pci_tbl
1566 *
1567 * hns3_probe initializes a PF identified by a pci_dev structure.
1568 * The OS initialization, configuring of the PF private structure,
1569 * and a hardware reset occur.
1570 *
1571 * Returns 0 on success, negative on failure
1572 */
1573static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1574{
1575 struct hnae3_ae_dev *ae_dev;
1576 int ret;
1577
1578 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1579 GFP_KERNEL);
1580 if (!ae_dev) {
1581 ret = -ENOMEM;
1582 return ret;
1583 }
1584
1585 ae_dev->pdev = pdev;
Yunsheng Line92a0842017-09-20 18:52:50 +08001586 ae_dev->flag = ent->driver_data;
Salil76ad4f02017-08-02 16:59:45 +01001587 ae_dev->dev_type = HNAE3_DEV_KNIC;
1588 pci_set_drvdata(pdev, ae_dev);
1589
1590 return hnae3_register_ae_dev(ae_dev);
1591}
1592
1593/* hns3_remove - Device removal routine
1594 * @pdev: PCI device information struct
1595 */
1596static void hns3_remove(struct pci_dev *pdev)
1597{
1598 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1599
1600 hnae3_unregister_ae_dev(ae_dev);
1601
1602 devm_kfree(&pdev->dev, ae_dev);
1603
1604 pci_set_drvdata(pdev, NULL);
1605}
1606
1607static struct pci_driver hns3_driver = {
1608 .name = hns3_driver_name,
1609 .id_table = hns3_pci_tbl,
1610 .probe = hns3_probe,
1611 .remove = hns3_remove,
1612};
1613
1614/* set default feature to hns3 */
1615static void hns3_set_default_feature(struct net_device *netdev)
1616{
Jian Shen391b5e92018-01-05 18:18:05 +08001617 struct hnae3_handle *h = hns3_get_handle(netdev);
1618
Salil76ad4f02017-08-02 16:59:45 +01001619 netdev->priv_flags |= IFF_UNICAST_FLT;
1620
1621 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1622 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1623 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1624 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1625 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1626
1627 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1628
1629 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1630
1631 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1632 NETIF_F_HW_VLAN_CTAG_FILTER |
Peng Li052ece62017-12-22 12:21:47 +08001633 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
Salil76ad4f02017-08-02 16:59:45 +01001634 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1635 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1636 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1637 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1638
1639 netdev->vlan_features |=
1640 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1641 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1642 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1643 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1644 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1645
1646 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
Jian Shen30ba2ab2018-01-05 18:18:06 +08001647 NETIF_F_HW_VLAN_CTAG_TX |
Salil76ad4f02017-08-02 16:59:45 +01001648 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1649 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1650 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1651 NETIF_F_GSO_UDP_TUNNEL_CSUM;
Jian Shen391b5e92018-01-05 18:18:05 +08001652
1653 if (!(h->flags & HNAE3_SUPPORT_VF))
Jian Shen30ba2ab2018-01-05 18:18:06 +08001654 netdev->hw_features |=
1655 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
Salil76ad4f02017-08-02 16:59:45 +01001656}
1657
1658static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1659 struct hns3_desc_cb *cb)
1660{
1661 unsigned int order = hnae_page_order(ring);
1662 struct page *p;
1663
1664 p = dev_alloc_pages(order);
1665 if (!p)
1666 return -ENOMEM;
1667
1668 cb->priv = p;
1669 cb->page_offset = 0;
1670 cb->reuse_flag = 0;
1671 cb->buf = page_address(p);
1672 cb->length = hnae_page_size(ring);
1673 cb->type = DESC_TYPE_PAGE;
1674
Salil76ad4f02017-08-02 16:59:45 +01001675 return 0;
1676}
1677
1678static void hns3_free_buffer(struct hns3_enet_ring *ring,
1679 struct hns3_desc_cb *cb)
1680{
1681 if (cb->type == DESC_TYPE_SKB)
1682 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1683 else if (!HNAE3_IS_TX_RING(ring))
1684 put_page((struct page *)cb->priv);
1685 memset(cb, 0, sizeof(*cb));
1686}
1687
1688static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1689{
1690 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1691 cb->length, ring_to_dma_dir(ring));
1692
1693 if (dma_mapping_error(ring_to_dev(ring), cb->dma))
1694 return -EIO;
1695
1696 return 0;
1697}
1698
1699static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
1700 struct hns3_desc_cb *cb)
1701{
1702 if (cb->type == DESC_TYPE_SKB)
1703 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
1704 ring_to_dma_dir(ring));
1705 else
1706 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
1707 ring_to_dma_dir(ring));
1708}
1709
1710static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
1711{
1712 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1713 ring->desc[i].addr = 0;
1714}
1715
1716static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
1717{
1718 struct hns3_desc_cb *cb = &ring->desc_cb[i];
1719
1720 if (!ring->desc_cb[i].dma)
1721 return;
1722
1723 hns3_buffer_detach(ring, i);
1724 hns3_free_buffer(ring, cb);
1725}
1726
1727static void hns3_free_buffers(struct hns3_enet_ring *ring)
1728{
1729 int i;
1730
1731 for (i = 0; i < ring->desc_num; i++)
1732 hns3_free_buffer_detach(ring, i);
1733}
1734
1735/* free desc along with its attached buffer */
1736static void hns3_free_desc(struct hns3_enet_ring *ring)
1737{
1738 hns3_free_buffers(ring);
1739
1740 dma_unmap_single(ring_to_dev(ring), ring->desc_dma_addr,
1741 ring->desc_num * sizeof(ring->desc[0]),
1742 DMA_BIDIRECTIONAL);
1743 ring->desc_dma_addr = 0;
1744 kfree(ring->desc);
1745 ring->desc = NULL;
1746}
1747
1748static int hns3_alloc_desc(struct hns3_enet_ring *ring)
1749{
1750 int size = ring->desc_num * sizeof(ring->desc[0]);
1751
1752 ring->desc = kzalloc(size, GFP_KERNEL);
1753 if (!ring->desc)
1754 return -ENOMEM;
1755
1756 ring->desc_dma_addr = dma_map_single(ring_to_dev(ring), ring->desc,
1757 size, DMA_BIDIRECTIONAL);
1758 if (dma_mapping_error(ring_to_dev(ring), ring->desc_dma_addr)) {
1759 ring->desc_dma_addr = 0;
1760 kfree(ring->desc);
1761 ring->desc = NULL;
1762 return -ENOMEM;
1763 }
1764
1765 return 0;
1766}
1767
1768static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
1769 struct hns3_desc_cb *cb)
1770{
1771 int ret;
1772
1773 ret = hns3_alloc_buffer(ring, cb);
1774 if (ret)
1775 goto out;
1776
1777 ret = hns3_map_buffer(ring, cb);
1778 if (ret)
1779 goto out_with_buf;
1780
1781 return 0;
1782
1783out_with_buf:
Lipeng564883b2017-10-23 19:51:02 +08001784 hns3_free_buffer(ring, cb);
Salil76ad4f02017-08-02 16:59:45 +01001785out:
1786 return ret;
1787}
1788
1789static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
1790{
1791 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
1792
1793 if (ret)
1794 return ret;
1795
1796 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1797
1798 return 0;
1799}
1800
1801/* Allocate memory for raw pkg, and map with dma */
1802static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
1803{
1804 int i, j, ret;
1805
1806 for (i = 0; i < ring->desc_num; i++) {
1807 ret = hns3_alloc_buffer_attach(ring, i);
1808 if (ret)
1809 goto out_buffer_fail;
1810 }
1811
1812 return 0;
1813
1814out_buffer_fail:
1815 for (j = i - 1; j >= 0; j--)
1816 hns3_free_buffer_detach(ring, j);
1817 return ret;
1818}
1819
1820/* detach a in-used buffer and replace with a reserved one */
1821static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
1822 struct hns3_desc_cb *res_cb)
1823{
Lipengb9077422017-10-23 19:51:01 +08001824 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
Salil76ad4f02017-08-02 16:59:45 +01001825 ring->desc_cb[i] = *res_cb;
1826 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1827}
1828
1829static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
1830{
1831 ring->desc_cb[i].reuse_flag = 0;
1832 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
1833 + ring->desc_cb[i].page_offset);
1834}
1835
1836static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
1837 int *pkts)
1838{
1839 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
1840
1841 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
1842 (*bytes) += desc_cb->length;
1843 /* desc_cb will be cleaned, after hnae_free_buffer_detach*/
1844 hns3_free_buffer_detach(ring, ring->next_to_clean);
1845
1846 ring_ptr_move_fw(ring, next_to_clean);
1847}
1848
1849static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
1850{
1851 int u = ring->next_to_use;
1852 int c = ring->next_to_clean;
1853
1854 if (unlikely(h > ring->desc_num))
1855 return 0;
1856
1857 return u > c ? (h > c && h <= u) : (h > c || h <= u);
1858}
1859
Lipeng24e750c2017-10-23 19:51:07 +08001860bool hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget)
Salil76ad4f02017-08-02 16:59:45 +01001861{
1862 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1863 struct netdev_queue *dev_queue;
1864 int bytes, pkts;
1865 int head;
1866
1867 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
1868 rmb(); /* Make sure head is ready before touch any data */
1869
1870 if (is_ring_empty(ring) || head == ring->next_to_clean)
Lipeng24e750c2017-10-23 19:51:07 +08001871 return true; /* no data to poll */
Salil76ad4f02017-08-02 16:59:45 +01001872
1873 if (!is_valid_clean_head(ring, head)) {
1874 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
1875 ring->next_to_use, ring->next_to_clean);
1876
1877 u64_stats_update_begin(&ring->syncp);
1878 ring->stats.io_err_cnt++;
1879 u64_stats_update_end(&ring->syncp);
Lipeng24e750c2017-10-23 19:51:07 +08001880 return true;
Salil76ad4f02017-08-02 16:59:45 +01001881 }
1882
1883 bytes = 0;
1884 pkts = 0;
1885 while (head != ring->next_to_clean && budget) {
1886 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
1887 /* Issue prefetch for next Tx descriptor */
1888 prefetch(&ring->desc_cb[ring->next_to_clean]);
1889 budget--;
1890 }
1891
1892 ring->tqp_vector->tx_group.total_bytes += bytes;
1893 ring->tqp_vector->tx_group.total_packets += pkts;
1894
1895 u64_stats_update_begin(&ring->syncp);
1896 ring->stats.tx_bytes += bytes;
1897 ring->stats.tx_pkts += pkts;
1898 u64_stats_update_end(&ring->syncp);
1899
1900 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
1901 netdev_tx_completed_queue(dev_queue, pkts, bytes);
1902
1903 if (unlikely(pkts && netif_carrier_ok(netdev) &&
1904 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
1905 /* Make sure that anybody stopping the queue after this
1906 * sees the new next_to_clean.
1907 */
1908 smp_mb();
1909 if (netif_tx_queue_stopped(dev_queue)) {
1910 netif_tx_wake_queue(dev_queue);
1911 ring->stats.restart_queue++;
1912 }
1913 }
1914
1915 return !!budget;
1916}
1917
1918static int hns3_desc_unused(struct hns3_enet_ring *ring)
1919{
1920 int ntc = ring->next_to_clean;
1921 int ntu = ring->next_to_use;
1922
1923 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
1924}
1925
1926static void
1927hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
1928{
1929 struct hns3_desc_cb *desc_cb;
1930 struct hns3_desc_cb res_cbs;
1931 int i, ret;
1932
1933 for (i = 0; i < cleand_count; i++) {
1934 desc_cb = &ring->desc_cb[ring->next_to_use];
1935 if (desc_cb->reuse_flag) {
1936 u64_stats_update_begin(&ring->syncp);
1937 ring->stats.reuse_pg_cnt++;
1938 u64_stats_update_end(&ring->syncp);
1939
1940 hns3_reuse_buffer(ring, ring->next_to_use);
1941 } else {
1942 ret = hns3_reserve_buffer_map(ring, &res_cbs);
1943 if (ret) {
1944 u64_stats_update_begin(&ring->syncp);
1945 ring->stats.sw_err_cnt++;
1946 u64_stats_update_end(&ring->syncp);
1947
1948 netdev_err(ring->tqp->handle->kinfo.netdev,
1949 "hnae reserve buffer map failed.\n");
1950 break;
1951 }
1952 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
1953 }
1954
1955 ring_ptr_move_fw(ring, next_to_use);
1956 }
1957
1958 wmb(); /* Make all data has been write before submit */
1959 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
1960}
1961
1962/* hns3_nic_get_headlen - determine size of header for LRO/GRO
1963 * @data: pointer to the start of the headers
1964 * @max: total length of section to find headers in
1965 *
1966 * This function is meant to determine the length of headers that will
1967 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1968 * motivation of doing this is to only perform one pull for IPv4 TCP
1969 * packets so that we can do basic things like calculating the gso_size
1970 * based on the average data per packet.
1971 */
1972static unsigned int hns3_nic_get_headlen(unsigned char *data, u32 flag,
1973 unsigned int max_size)
1974{
1975 unsigned char *network;
1976 u8 hlen;
1977
1978 /* This should never happen, but better safe than sorry */
1979 if (max_size < ETH_HLEN)
1980 return max_size;
1981
1982 /* Initialize network frame pointer */
1983 network = data;
1984
1985 /* Set first protocol and move network header forward */
1986 network += ETH_HLEN;
1987
1988 /* Handle any vlan tag if present */
1989 if (hnae_get_field(flag, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S)
1990 == HNS3_RX_FLAG_VLAN_PRESENT) {
1991 if ((typeof(max_size))(network - data) > (max_size - VLAN_HLEN))
1992 return max_size;
1993
1994 network += VLAN_HLEN;
1995 }
1996
1997 /* Handle L3 protocols */
1998 if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
1999 == HNS3_RX_FLAG_L3ID_IPV4) {
2000 if ((typeof(max_size))(network - data) >
2001 (max_size - sizeof(struct iphdr)))
2002 return max_size;
2003
2004 /* Access ihl as a u8 to avoid unaligned access on ia64 */
2005 hlen = (network[0] & 0x0F) << 2;
2006
2007 /* Verify hlen meets minimum size requirements */
2008 if (hlen < sizeof(struct iphdr))
2009 return network - data;
2010
2011 /* Record next protocol if header is present */
2012 } else if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2013 == HNS3_RX_FLAG_L3ID_IPV6) {
2014 if ((typeof(max_size))(network - data) >
2015 (max_size - sizeof(struct ipv6hdr)))
2016 return max_size;
2017
2018 /* Record next protocol */
2019 hlen = sizeof(struct ipv6hdr);
2020 } else {
2021 return network - data;
2022 }
2023
2024 /* Relocate pointer to start of L4 header */
2025 network += hlen;
2026
2027 /* Finally sort out TCP/UDP */
2028 if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2029 == HNS3_RX_FLAG_L4ID_TCP) {
2030 if ((typeof(max_size))(network - data) >
2031 (max_size - sizeof(struct tcphdr)))
2032 return max_size;
2033
2034 /* Access doff as a u8 to avoid unaligned access on ia64 */
2035 hlen = (network[12] & 0xF0) >> 2;
2036
2037 /* Verify hlen meets minimum size requirements */
2038 if (hlen < sizeof(struct tcphdr))
2039 return network - data;
2040
2041 network += hlen;
2042 } else if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2043 == HNS3_RX_FLAG_L4ID_UDP) {
2044 if ((typeof(max_size))(network - data) >
2045 (max_size - sizeof(struct udphdr)))
2046 return max_size;
2047
2048 network += sizeof(struct udphdr);
2049 }
2050
2051 /* If everything has gone correctly network should be the
2052 * data section of the packet and will be the end of the header.
2053 * If not then it probably represents the end of the last recognized
2054 * header.
2055 */
2056 if ((typeof(max_size))(network - data) < max_size)
2057 return network - data;
2058 else
2059 return max_size;
2060}
2061
2062static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2063 struct hns3_enet_ring *ring, int pull_len,
2064 struct hns3_desc_cb *desc_cb)
2065{
2066 struct hns3_desc *desc;
2067 int truesize, size;
2068 int last_offset;
2069 bool twobufs;
2070
2071 twobufs = ((PAGE_SIZE < 8192) &&
2072 hnae_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2073
2074 desc = &ring->desc[ring->next_to_clean];
2075 size = le16_to_cpu(desc->rx.size);
2076
2077 if (twobufs) {
2078 truesize = hnae_buf_size(ring);
2079 } else {
2080 truesize = ALIGN(size, L1_CACHE_BYTES);
2081 last_offset = hnae_page_size(ring) - hnae_buf_size(ring);
2082 }
2083
2084 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2085 size - pull_len, truesize - pull_len);
2086
2087 /* Avoid re-using remote pages,flag default unreuse */
2088 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2089 return;
2090
2091 if (twobufs) {
2092 /* If we are only owner of page we can reuse it */
2093 if (likely(page_count(desc_cb->priv) == 1)) {
2094 /* Flip page offset to other buffer */
2095 desc_cb->page_offset ^= truesize;
2096
2097 desc_cb->reuse_flag = 1;
2098 /* bump ref count on page before it is given*/
2099 get_page(desc_cb->priv);
2100 }
2101 return;
2102 }
2103
2104 /* Move offset up to the next cache line */
2105 desc_cb->page_offset += truesize;
2106
2107 if (desc_cb->page_offset <= last_offset) {
2108 desc_cb->reuse_flag = 1;
2109 /* Bump ref count on page before it is given*/
2110 get_page(desc_cb->priv);
2111 }
2112}
2113
2114static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2115 struct hns3_desc *desc)
2116{
2117 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2118 int l3_type, l4_type;
2119 u32 bd_base_info;
2120 int ol4_type;
2121 u32 l234info;
2122
2123 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2124 l234info = le32_to_cpu(desc->rx.l234_info);
2125
2126 skb->ip_summed = CHECKSUM_NONE;
2127
2128 skb_checksum_none_assert(skb);
2129
2130 if (!(netdev->features & NETIF_F_RXCSUM))
2131 return;
2132
2133 /* check if hardware has done checksum */
2134 if (!hnae_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
2135 return;
2136
2137 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L3E_B) ||
2138 hnae_get_bit(l234info, HNS3_RXD_L4E_B) ||
2139 hnae_get_bit(l234info, HNS3_RXD_OL3E_B) ||
2140 hnae_get_bit(l234info, HNS3_RXD_OL4E_B))) {
2141 netdev_err(netdev, "L3/L4 error pkt\n");
2142 u64_stats_update_begin(&ring->syncp);
2143 ring->stats.l3l4_csum_err++;
2144 u64_stats_update_end(&ring->syncp);
2145
2146 return;
2147 }
2148
2149 l3_type = hnae_get_field(l234info, HNS3_RXD_L3ID_M,
2150 HNS3_RXD_L3ID_S);
2151 l4_type = hnae_get_field(l234info, HNS3_RXD_L4ID_M,
2152 HNS3_RXD_L4ID_S);
2153
2154 ol4_type = hnae_get_field(l234info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
2155 switch (ol4_type) {
2156 case HNS3_OL4_TYPE_MAC_IN_UDP:
2157 case HNS3_OL4_TYPE_NVGRE:
2158 skb->csum_level = 1;
2159 case HNS3_OL4_TYPE_NO_TUN:
2160 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2161 if (l3_type == HNS3_L3_TYPE_IPV4 ||
2162 (l3_type == HNS3_L3_TYPE_IPV6 &&
2163 (l4_type == HNS3_L4_TYPE_UDP ||
2164 l4_type == HNS3_L4_TYPE_TCP ||
2165 l4_type == HNS3_L4_TYPE_SCTP)))
2166 skb->ip_summed = CHECKSUM_UNNECESSARY;
2167 break;
2168 }
2169}
2170
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002171static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2172{
2173 napi_gro_receive(&ring->tqp_vector->napi, skb);
2174}
2175
Salil76ad4f02017-08-02 16:59:45 +01002176static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2177 struct sk_buff **out_skb, int *out_bnum)
2178{
2179 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2180 struct hns3_desc_cb *desc_cb;
2181 struct hns3_desc *desc;
2182 struct sk_buff *skb;
2183 unsigned char *va;
2184 u32 bd_base_info;
2185 int pull_len;
2186 u32 l234info;
2187 int length;
2188 int bnum;
2189
2190 desc = &ring->desc[ring->next_to_clean];
2191 desc_cb = &ring->desc_cb[ring->next_to_clean];
2192
2193 prefetch(desc);
2194
2195 length = le16_to_cpu(desc->rx.pkt_len);
2196 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2197 l234info = le32_to_cpu(desc->rx.l234_info);
2198
2199 /* Check valid BD */
2200 if (!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))
2201 return -EFAULT;
2202
2203 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2204
2205 /* Prefetch first cache line of first page
2206 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2207 * line size is 64B so need to prefetch twice to make it 128B. But in
2208 * actual we can have greater size of caches with 128B Level 1 cache
2209 * lines. In such a case, single fetch would suffice to cache in the
2210 * relevant part of the header.
2211 */
2212 prefetch(va);
2213#if L1_CACHE_BYTES < 128
2214 prefetch(va + L1_CACHE_BYTES);
2215#endif
2216
2217 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2218 HNS3_RX_HEAD_SIZE);
2219 if (unlikely(!skb)) {
2220 netdev_err(netdev, "alloc rx skb fail\n");
2221
2222 u64_stats_update_begin(&ring->syncp);
2223 ring->stats.sw_err_cnt++;
2224 u64_stats_update_end(&ring->syncp);
2225
2226 return -ENOMEM;
2227 }
2228
2229 prefetchw(skb->data);
2230
Peng Li9699cff2017-12-22 12:21:48 +08002231 /* Based on hw strategy, the tag offloaded will be stored at
2232 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2233 * in one layer tag case.
2234 */
2235 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2236 u16 vlan_tag;
2237
2238 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2239 if (!(vlan_tag & VLAN_VID_MASK))
2240 vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2241 if (vlan_tag & VLAN_VID_MASK)
2242 __vlan_hwaccel_put_tag(skb,
2243 htons(ETH_P_8021Q),
2244 vlan_tag);
2245 }
2246
Salil76ad4f02017-08-02 16:59:45 +01002247 bnum = 1;
2248 if (length <= HNS3_RX_HEAD_SIZE) {
2249 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2250
2251 /* We can reuse buffer as-is, just make sure it is local */
2252 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2253 desc_cb->reuse_flag = 1;
2254 else /* This page cannot be reused so discard it */
2255 put_page(desc_cb->priv);
2256
2257 ring_ptr_move_fw(ring, next_to_clean);
2258 } else {
2259 u64_stats_update_begin(&ring->syncp);
2260 ring->stats.seg_pkt_cnt++;
2261 u64_stats_update_end(&ring->syncp);
2262
2263 pull_len = hns3_nic_get_headlen(va, l234info,
2264 HNS3_RX_HEAD_SIZE);
2265 memcpy(__skb_put(skb, pull_len), va,
2266 ALIGN(pull_len, sizeof(long)));
2267
2268 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb);
2269 ring_ptr_move_fw(ring, next_to_clean);
2270
2271 while (!hnae_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
2272 desc = &ring->desc[ring->next_to_clean];
2273 desc_cb = &ring->desc_cb[ring->next_to_clean];
2274 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2275 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb);
2276 ring_ptr_move_fw(ring, next_to_clean);
2277 bnum++;
2278 }
2279 }
2280
2281 *out_bnum = bnum;
2282
2283 if (unlikely(!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
2284 netdev_err(netdev, "no valid bd,%016llx,%016llx\n",
2285 ((u64 *)desc)[0], ((u64 *)desc)[1]);
2286 u64_stats_update_begin(&ring->syncp);
2287 ring->stats.non_vld_descs++;
2288 u64_stats_update_end(&ring->syncp);
2289
2290 dev_kfree_skb_any(skb);
2291 return -EINVAL;
2292 }
2293
2294 if (unlikely((!desc->rx.pkt_len) ||
2295 hnae_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
2296 netdev_err(netdev, "truncated pkt\n");
2297 u64_stats_update_begin(&ring->syncp);
2298 ring->stats.err_pkt_len++;
2299 u64_stats_update_end(&ring->syncp);
2300
2301 dev_kfree_skb_any(skb);
2302 return -EFAULT;
2303 }
2304
2305 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L2E_B))) {
2306 netdev_err(netdev, "L2 error pkt\n");
2307 u64_stats_update_begin(&ring->syncp);
2308 ring->stats.l2_err++;
2309 u64_stats_update_end(&ring->syncp);
2310
2311 dev_kfree_skb_any(skb);
2312 return -EFAULT;
2313 }
2314
2315 u64_stats_update_begin(&ring->syncp);
2316 ring->stats.rx_pkts++;
2317 ring->stats.rx_bytes += skb->len;
2318 u64_stats_update_end(&ring->syncp);
2319
2320 ring->tqp_vector->rx_group.total_bytes += skb->len;
2321
2322 hns3_rx_checksum(ring, skb, desc);
2323 return 0;
2324}
2325
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002326int hns3_clean_rx_ring(
2327 struct hns3_enet_ring *ring, int budget,
2328 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
Salil76ad4f02017-08-02 16:59:45 +01002329{
2330#define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2331 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2332 int recv_pkts, recv_bds, clean_count, err;
2333 int unused_count = hns3_desc_unused(ring);
2334 struct sk_buff *skb = NULL;
2335 int num, bnum = 0;
2336
2337 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2338 rmb(); /* Make sure num taken effect before the other data is touched */
2339
2340 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2341 num -= unused_count;
2342
2343 while (recv_pkts < budget && recv_bds < num) {
2344 /* Reuse or realloc buffers */
2345 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2346 hns3_nic_alloc_rx_buffers(ring,
2347 clean_count + unused_count);
2348 clean_count = 0;
2349 unused_count = hns3_desc_unused(ring);
2350 }
2351
2352 /* Poll one pkt */
2353 err = hns3_handle_rx_bd(ring, &skb, &bnum);
2354 if (unlikely(!skb)) /* This fault cannot be repaired */
2355 goto out;
2356
2357 recv_bds += bnum;
2358 clean_count += bnum;
2359 if (unlikely(err)) { /* Do jump the err */
2360 recv_pkts++;
2361 continue;
2362 }
2363
2364 /* Do update ip stack process */
2365 skb->protocol = eth_type_trans(skb, netdev);
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002366 rx_fn(ring, skb);
Salil76ad4f02017-08-02 16:59:45 +01002367
2368 recv_pkts++;
2369 }
2370
2371out:
2372 /* Make all data has been write before submit */
2373 if (clean_count + unused_count > 0)
2374 hns3_nic_alloc_rx_buffers(ring,
2375 clean_count + unused_count);
2376
2377 return recv_pkts;
2378}
2379
2380static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2381{
2382#define HNS3_RX_ULTRA_PACKET_RATE 40000
2383 enum hns3_flow_level_range new_flow_level;
2384 struct hns3_enet_tqp_vector *tqp_vector;
2385 int packets_per_secs;
2386 int bytes_per_usecs;
2387 u16 new_int_gl;
2388 int usecs;
2389
2390 if (!ring_group->int_gl)
2391 return false;
2392
2393 if (ring_group->total_packets == 0) {
2394 ring_group->int_gl = HNS3_INT_GL_50K;
2395 ring_group->flow_level = HNS3_FLOW_LOW;
2396 return true;
2397 }
2398
2399 /* Simple throttlerate management
2400 * 0-10MB/s lower (50000 ints/s)
2401 * 10-20MB/s middle (20000 ints/s)
2402 * 20-1249MB/s high (18000 ints/s)
2403 * > 40000pps ultra (8000 ints/s)
2404 */
2405 new_flow_level = ring_group->flow_level;
2406 new_int_gl = ring_group->int_gl;
2407 tqp_vector = ring_group->ring->tqp_vector;
2408 usecs = (ring_group->int_gl << 1);
2409 bytes_per_usecs = ring_group->total_bytes / usecs;
2410 /* 1000000 microseconds */
2411 packets_per_secs = ring_group->total_packets * 1000000 / usecs;
2412
2413 switch (new_flow_level) {
2414 case HNS3_FLOW_LOW:
2415 if (bytes_per_usecs > 10)
2416 new_flow_level = HNS3_FLOW_MID;
2417 break;
2418 case HNS3_FLOW_MID:
2419 if (bytes_per_usecs > 20)
2420 new_flow_level = HNS3_FLOW_HIGH;
2421 else if (bytes_per_usecs <= 10)
2422 new_flow_level = HNS3_FLOW_LOW;
2423 break;
2424 case HNS3_FLOW_HIGH:
2425 case HNS3_FLOW_ULTRA:
2426 default:
2427 if (bytes_per_usecs <= 20)
2428 new_flow_level = HNS3_FLOW_MID;
2429 break;
2430 }
2431
2432 if ((packets_per_secs > HNS3_RX_ULTRA_PACKET_RATE) &&
2433 (&tqp_vector->rx_group == ring_group))
2434 new_flow_level = HNS3_FLOW_ULTRA;
2435
2436 switch (new_flow_level) {
2437 case HNS3_FLOW_LOW:
2438 new_int_gl = HNS3_INT_GL_50K;
2439 break;
2440 case HNS3_FLOW_MID:
2441 new_int_gl = HNS3_INT_GL_20K;
2442 break;
2443 case HNS3_FLOW_HIGH:
2444 new_int_gl = HNS3_INT_GL_18K;
2445 break;
2446 case HNS3_FLOW_ULTRA:
2447 new_int_gl = HNS3_INT_GL_8K;
2448 break;
2449 default:
2450 break;
2451 }
2452
2453 ring_group->total_bytes = 0;
2454 ring_group->total_packets = 0;
2455 ring_group->flow_level = new_flow_level;
2456 if (new_int_gl != ring_group->int_gl) {
2457 ring_group->int_gl = new_int_gl;
2458 return true;
2459 }
2460 return false;
2461}
2462
2463static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2464{
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002465 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2466 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2467 bool rx_update, tx_update;
Salil76ad4f02017-08-02 16:59:45 +01002468
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002469 if (rx_group->gl_adapt_enable) {
2470 rx_update = hns3_get_new_int_gl(rx_group);
2471 if (rx_update)
2472 hns3_set_vector_coalesce_rx_gl(tqp_vector,
2473 rx_group->int_gl);
2474 }
2475
2476 if (tx_group->gl_adapt_enable) {
2477 tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group);
2478 if (tx_update)
2479 hns3_set_vector_coalesce_tx_gl(tqp_vector,
2480 tx_group->int_gl);
Salil76ad4f02017-08-02 16:59:45 +01002481 }
2482}
2483
2484static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2485{
2486 struct hns3_enet_ring *ring;
2487 int rx_pkt_total = 0;
2488
2489 struct hns3_enet_tqp_vector *tqp_vector =
2490 container_of(napi, struct hns3_enet_tqp_vector, napi);
2491 bool clean_complete = true;
2492 int rx_budget;
2493
2494 /* Since the actual Tx work is minimal, we can give the Tx a larger
2495 * budget and be more aggressive about cleaning up the Tx descriptors.
2496 */
2497 hns3_for_each_ring(ring, tqp_vector->tx_group) {
2498 if (!hns3_clean_tx_ring(ring, budget))
2499 clean_complete = false;
2500 }
2501
2502 /* make sure rx ring budget not smaller than 1 */
2503 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2504
2505 hns3_for_each_ring(ring, tqp_vector->rx_group) {
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002506 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2507 hns3_rx_skb);
Salil76ad4f02017-08-02 16:59:45 +01002508
2509 if (rx_cleaned >= rx_budget)
2510 clean_complete = false;
2511
2512 rx_pkt_total += rx_cleaned;
2513 }
2514
2515 tqp_vector->rx_group.total_packets += rx_pkt_total;
2516
2517 if (!clean_complete)
2518 return budget;
2519
2520 napi_complete(napi);
2521 hns3_update_new_int_gl(tqp_vector);
2522 hns3_mask_vector_irq(tqp_vector, 1);
2523
2524 return rx_pkt_total;
2525}
2526
2527static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2528 struct hnae3_ring_chain_node *head)
2529{
2530 struct pci_dev *pdev = tqp_vector->handle->pdev;
2531 struct hnae3_ring_chain_node *cur_chain = head;
2532 struct hnae3_ring_chain_node *chain;
2533 struct hns3_enet_ring *tx_ring;
2534 struct hns3_enet_ring *rx_ring;
2535
2536 tx_ring = tqp_vector->tx_group.ring;
2537 if (tx_ring) {
2538 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2539 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2540 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002541 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2542 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002543
2544 cur_chain->next = NULL;
2545
2546 while (tx_ring->next) {
2547 tx_ring = tx_ring->next;
2548
2549 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2550 GFP_KERNEL);
2551 if (!chain)
2552 return -ENOMEM;
2553
2554 cur_chain->next = chain;
2555 chain->tqp_index = tx_ring->tqp->tqp_index;
2556 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2557 HNAE3_RING_TYPE_TX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002558 hnae_set_field(chain->int_gl_idx,
2559 HNAE3_RING_GL_IDX_M,
2560 HNAE3_RING_GL_IDX_S,
2561 HNAE3_RING_GL_TX);
Salil76ad4f02017-08-02 16:59:45 +01002562
2563 cur_chain = chain;
2564 }
2565 }
2566
2567 rx_ring = tqp_vector->rx_group.ring;
2568 if (!tx_ring && rx_ring) {
2569 cur_chain->next = NULL;
2570 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2571 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2572 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002573 hnae_set_field(cur_chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2574 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
Salil76ad4f02017-08-02 16:59:45 +01002575
2576 rx_ring = rx_ring->next;
2577 }
2578
2579 while (rx_ring) {
2580 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
2581 if (!chain)
2582 return -ENOMEM;
2583
2584 cur_chain->next = chain;
2585 chain->tqp_index = rx_ring->tqp->tqp_index;
2586 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2587 HNAE3_RING_TYPE_RX);
Fuyun Liang11af96a2018-01-12 16:23:15 +08002588 hnae_set_field(chain->int_gl_idx, HNAE3_RING_GL_IDX_M,
2589 HNAE3_RING_GL_IDX_S, HNAE3_RING_GL_RX);
2590
Salil76ad4f02017-08-02 16:59:45 +01002591 cur_chain = chain;
2592
2593 rx_ring = rx_ring->next;
2594 }
2595
2596 return 0;
2597}
2598
2599static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2600 struct hnae3_ring_chain_node *head)
2601{
2602 struct pci_dev *pdev = tqp_vector->handle->pdev;
2603 struct hnae3_ring_chain_node *chain_tmp, *chain;
2604
2605 chain = head->next;
2606
2607 while (chain) {
2608 chain_tmp = chain->next;
2609 devm_kfree(&pdev->dev, chain);
2610 chain = chain_tmp;
2611 }
2612}
2613
2614static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
2615 struct hns3_enet_ring *ring)
2616{
2617 ring->next = group->ring;
2618 group->ring = ring;
2619
2620 group->count++;
2621}
2622
2623static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
2624{
2625 struct hnae3_ring_chain_node vector_ring_chain;
2626 struct hnae3_handle *h = priv->ae_handle;
2627 struct hns3_enet_tqp_vector *tqp_vector;
2628 struct hnae3_vector_info *vector;
2629 struct pci_dev *pdev = h->pdev;
2630 u16 tqp_num = h->kinfo.num_tqps;
2631 u16 vector_num;
2632 int ret = 0;
2633 u16 i;
2634
2635 /* RSS size, cpu online and vector_num should be the same */
2636 /* Should consider 2p/4p later */
2637 vector_num = min_t(u16, num_online_cpus(), tqp_num);
2638 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
2639 GFP_KERNEL);
2640 if (!vector)
2641 return -ENOMEM;
2642
2643 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
2644
2645 priv->vector_num = vector_num;
2646 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
2647 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
2648 GFP_KERNEL);
2649 if (!priv->tqp_vector)
2650 return -ENOMEM;
2651
2652 for (i = 0; i < tqp_num; i++) {
2653 u16 vector_i = i % vector_num;
2654
2655 tqp_vector = &priv->tqp_vector[vector_i];
2656
2657 hns3_add_ring_to_group(&tqp_vector->tx_group,
2658 priv->ring_data[i].ring);
2659
2660 hns3_add_ring_to_group(&tqp_vector->rx_group,
2661 priv->ring_data[i + tqp_num].ring);
2662
2663 tqp_vector->idx = vector_i;
2664 tqp_vector->mask_addr = vector[vector_i].io_addr;
2665 tqp_vector->vector_irq = vector[vector_i].vector;
2666 tqp_vector->num_tqps++;
2667
2668 priv->ring_data[i].ring->tqp_vector = tqp_vector;
2669 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
2670 }
2671
2672 for (i = 0; i < vector_num; i++) {
2673 tqp_vector = &priv->tqp_vector[i];
2674
2675 tqp_vector->rx_group.total_bytes = 0;
2676 tqp_vector->rx_group.total_packets = 0;
2677 tqp_vector->tx_group.total_bytes = 0;
2678 tqp_vector->tx_group.total_packets = 0;
Fuyun Liang5fd47892018-01-12 16:23:11 +08002679 hns3_vector_gl_rl_init(tqp_vector, priv);
Salil76ad4f02017-08-02 16:59:45 +01002680 tqp_vector->handle = h;
2681
2682 ret = hns3_get_vector_ring_chain(tqp_vector,
2683 &vector_ring_chain);
2684 if (ret)
2685 goto out;
2686
2687 ret = h->ae_algo->ops->map_ring_to_vector(h,
2688 tqp_vector->vector_irq, &vector_ring_chain);
2689 if (ret)
2690 goto out;
2691
2692 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2693
2694 netif_napi_add(priv->netdev, &tqp_vector->napi,
2695 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
2696 }
2697
2698out:
2699 devm_kfree(&pdev->dev, vector);
2700 return ret;
2701}
2702
2703static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
2704{
2705 struct hnae3_ring_chain_node vector_ring_chain;
2706 struct hnae3_handle *h = priv->ae_handle;
2707 struct hns3_enet_tqp_vector *tqp_vector;
2708 struct pci_dev *pdev = h->pdev;
2709 int i, ret;
2710
2711 for (i = 0; i < priv->vector_num; i++) {
2712 tqp_vector = &priv->tqp_vector[i];
2713
2714 ret = hns3_get_vector_ring_chain(tqp_vector,
2715 &vector_ring_chain);
2716 if (ret)
2717 return ret;
2718
2719 ret = h->ae_algo->ops->unmap_ring_from_vector(h,
2720 tqp_vector->vector_irq, &vector_ring_chain);
2721 if (ret)
2722 return ret;
2723
Yunsheng Lin0d3e6632018-03-09 10:37:01 +08002724 ret = h->ae_algo->ops->put_vector(h, tqp_vector->vector_irq);
2725 if (ret)
2726 return ret;
2727
Salil76ad4f02017-08-02 16:59:45 +01002728 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2729
2730 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) {
2731 (void)irq_set_affinity_hint(
2732 priv->tqp_vector[i].vector_irq,
2733 NULL);
qumingguangae064e62017-11-02 20:45:22 +08002734 free_irq(priv->tqp_vector[i].vector_irq,
2735 &priv->tqp_vector[i]);
Salil76ad4f02017-08-02 16:59:45 +01002736 }
2737
2738 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED;
2739
2740 netif_napi_del(&priv->tqp_vector[i].napi);
2741 }
2742
2743 devm_kfree(&pdev->dev, priv->tqp_vector);
2744
2745 return 0;
2746}
2747
2748static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
2749 int ring_type)
2750{
2751 struct hns3_nic_ring_data *ring_data = priv->ring_data;
2752 int queue_num = priv->ae_handle->kinfo.num_tqps;
2753 struct pci_dev *pdev = priv->ae_handle->pdev;
2754 struct hns3_enet_ring *ring;
2755
2756 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
2757 if (!ring)
2758 return -ENOMEM;
2759
2760 if (ring_type == HNAE3_RING_TYPE_TX) {
2761 ring_data[q->tqp_index].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002762 ring_data[q->tqp_index].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002763 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
2764 } else {
2765 ring_data[q->tqp_index + queue_num].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002766 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002767 ring->io_base = q->io_base;
2768 }
2769
2770 hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
2771
Salil76ad4f02017-08-02 16:59:45 +01002772 ring->tqp = q;
2773 ring->desc = NULL;
2774 ring->desc_cb = NULL;
2775 ring->dev = priv->dev;
2776 ring->desc_dma_addr = 0;
2777 ring->buf_size = q->buf_size;
2778 ring->desc_num = q->desc_num;
2779 ring->next_to_use = 0;
2780 ring->next_to_clean = 0;
2781
2782 return 0;
2783}
2784
2785static int hns3_queue_to_ring(struct hnae3_queue *tqp,
2786 struct hns3_nic_priv *priv)
2787{
2788 int ret;
2789
2790 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
2791 if (ret)
2792 return ret;
2793
2794 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
2795 if (ret)
2796 return ret;
2797
2798 return 0;
2799}
2800
2801static int hns3_get_ring_config(struct hns3_nic_priv *priv)
2802{
2803 struct hnae3_handle *h = priv->ae_handle;
2804 struct pci_dev *pdev = h->pdev;
2805 int i, ret;
2806
2807 priv->ring_data = devm_kzalloc(&pdev->dev, h->kinfo.num_tqps *
2808 sizeof(*priv->ring_data) * 2,
2809 GFP_KERNEL);
2810 if (!priv->ring_data)
2811 return -ENOMEM;
2812
2813 for (i = 0; i < h->kinfo.num_tqps; i++) {
2814 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
2815 if (ret)
2816 goto err;
2817 }
2818
2819 return 0;
2820err:
2821 devm_kfree(&pdev->dev, priv->ring_data);
2822 return ret;
2823}
2824
Peng Li09f2af62017-12-22 12:21:41 +08002825static void hns3_put_ring_config(struct hns3_nic_priv *priv)
2826{
2827 struct hnae3_handle *h = priv->ae_handle;
2828 int i;
2829
2830 for (i = 0; i < h->kinfo.num_tqps; i++) {
2831 devm_kfree(priv->dev, priv->ring_data[i].ring);
2832 devm_kfree(priv->dev,
2833 priv->ring_data[i + h->kinfo.num_tqps].ring);
2834 }
2835 devm_kfree(priv->dev, priv->ring_data);
2836}
2837
Salil76ad4f02017-08-02 16:59:45 +01002838static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
2839{
2840 int ret;
2841
2842 if (ring->desc_num <= 0 || ring->buf_size <= 0)
2843 return -EINVAL;
2844
2845 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
2846 GFP_KERNEL);
2847 if (!ring->desc_cb) {
2848 ret = -ENOMEM;
2849 goto out;
2850 }
2851
2852 ret = hns3_alloc_desc(ring);
2853 if (ret)
2854 goto out_with_desc_cb;
2855
2856 if (!HNAE3_IS_TX_RING(ring)) {
2857 ret = hns3_alloc_ring_buffers(ring);
2858 if (ret)
2859 goto out_with_desc;
2860 }
2861
2862 return 0;
2863
2864out_with_desc:
2865 hns3_free_desc(ring);
2866out_with_desc_cb:
2867 kfree(ring->desc_cb);
2868 ring->desc_cb = NULL;
2869out:
2870 return ret;
2871}
2872
2873static void hns3_fini_ring(struct hns3_enet_ring *ring)
2874{
2875 hns3_free_desc(ring);
2876 kfree(ring->desc_cb);
2877 ring->desc_cb = NULL;
2878 ring->next_to_clean = 0;
2879 ring->next_to_use = 0;
2880}
2881
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08002882static int hns3_buf_size2type(u32 buf_size)
Salil76ad4f02017-08-02 16:59:45 +01002883{
2884 int bd_size_type;
2885
2886 switch (buf_size) {
2887 case 512:
2888 bd_size_type = HNS3_BD_SIZE_512_TYPE;
2889 break;
2890 case 1024:
2891 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
2892 break;
2893 case 2048:
2894 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2895 break;
2896 case 4096:
2897 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
2898 break;
2899 default:
2900 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2901 }
2902
2903 return bd_size_type;
2904}
2905
2906static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
2907{
2908 dma_addr_t dma = ring->desc_dma_addr;
2909 struct hnae3_queue *q = ring->tqp;
2910
2911 if (!HNAE3_IS_TX_RING(ring)) {
2912 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
2913 (u32)dma);
2914 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
2915 (u32)((dma >> 31) >> 1));
2916
2917 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
2918 hns3_buf_size2type(ring->buf_size));
2919 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
2920 ring->desc_num / 8 - 1);
2921
2922 } else {
2923 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
2924 (u32)dma);
2925 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
2926 (u32)((dma >> 31) >> 1));
2927
2928 hns3_write_dev(q, HNS3_RING_TX_RING_BD_LEN_REG,
2929 hns3_buf_size2type(ring->buf_size));
2930 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
2931 ring->desc_num / 8 - 1);
2932 }
2933}
2934
Lipeng5668abd2017-10-10 16:42:04 +08002935int hns3_init_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01002936{
2937 struct hnae3_handle *h = priv->ae_handle;
2938 int ring_num = h->kinfo.num_tqps * 2;
2939 int i, j;
2940 int ret;
2941
2942 for (i = 0; i < ring_num; i++) {
2943 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
2944 if (ret) {
2945 dev_err(priv->dev,
2946 "Alloc ring memory fail! ret=%d\n", ret);
2947 goto out_when_alloc_ring_memory;
2948 }
2949
2950 hns3_init_ring_hw(priv->ring_data[i].ring);
2951
2952 u64_stats_init(&priv->ring_data[i].ring->syncp);
2953 }
2954
2955 return 0;
2956
2957out_when_alloc_ring_memory:
2958 for (j = i - 1; j >= 0; j--)
Lipengee83f772017-10-10 16:42:03 +08002959 hns3_fini_ring(priv->ring_data[j].ring);
Salil76ad4f02017-08-02 16:59:45 +01002960
2961 return -ENOMEM;
2962}
2963
Lipeng5668abd2017-10-10 16:42:04 +08002964int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01002965{
2966 struct hnae3_handle *h = priv->ae_handle;
2967 int i;
2968
2969 for (i = 0; i < h->kinfo.num_tqps; i++) {
2970 if (h->ae_algo->ops->reset_queue)
2971 h->ae_algo->ops->reset_queue(h, i);
2972
2973 hns3_fini_ring(priv->ring_data[i].ring);
2974 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
2975 }
Salil76ad4f02017-08-02 16:59:45 +01002976 return 0;
2977}
2978
2979/* Set mac addr if it is configured. or leave it to the AE driver */
2980static void hns3_init_mac_addr(struct net_device *netdev)
2981{
2982 struct hns3_nic_priv *priv = netdev_priv(netdev);
2983 struct hnae3_handle *h = priv->ae_handle;
2984 u8 mac_addr_temp[ETH_ALEN];
2985
2986 if (h->ae_algo->ops->get_mac_addr) {
2987 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
2988 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
2989 }
2990
2991 /* Check if the MAC address is valid, if not get a random one */
2992 if (!is_valid_ether_addr(netdev->dev_addr)) {
2993 eth_hw_addr_random(netdev);
2994 dev_warn(priv->dev, "using random MAC address %pM\n",
2995 netdev->dev_addr);
Salil76ad4f02017-08-02 16:59:45 +01002996 }
Lipeng139e8792017-09-19 17:17:13 +01002997
2998 if (h->ae_algo->ops->set_mac_addr)
2999 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr);
3000
Salil76ad4f02017-08-02 16:59:45 +01003001}
3002
3003static void hns3_nic_set_priv_ops(struct net_device *netdev)
3004{
3005 struct hns3_nic_priv *priv = netdev_priv(netdev);
3006
3007 if ((netdev->features & NETIF_F_TSO) ||
3008 (netdev->features & NETIF_F_TSO6)) {
3009 priv->ops.fill_desc = hns3_fill_desc_tso;
3010 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
3011 } else {
3012 priv->ops.fill_desc = hns3_fill_desc;
3013 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3014 }
3015}
3016
3017static int hns3_client_init(struct hnae3_handle *handle)
3018{
3019 struct pci_dev *pdev = handle->pdev;
3020 struct hns3_nic_priv *priv;
3021 struct net_device *netdev;
3022 int ret;
3023
3024 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv),
Peng Li678335a12018-03-08 19:41:54 +08003025 hns3_get_max_available_channels(handle));
Salil76ad4f02017-08-02 16:59:45 +01003026 if (!netdev)
3027 return -ENOMEM;
3028
3029 priv = netdev_priv(netdev);
3030 priv->dev = &pdev->dev;
3031 priv->netdev = netdev;
3032 priv->ae_handle = handle;
Lipengf8fa222c2017-11-02 20:45:20 +08003033 priv->last_reset_time = jiffies;
3034 priv->reset_level = HNAE3_FUNC_RESET;
3035 priv->tx_timeout_count = 0;
Salil76ad4f02017-08-02 16:59:45 +01003036
3037 handle->kinfo.netdev = netdev;
3038 handle->priv = (void *)priv;
3039
3040 hns3_init_mac_addr(netdev);
3041
3042 hns3_set_default_feature(netdev);
3043
3044 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3045 netdev->priv_flags |= IFF_UNICAST_FLT;
3046 netdev->netdev_ops = &hns3_nic_netdev_ops;
3047 SET_NETDEV_DEV(netdev, &pdev->dev);
3048 hns3_ethtool_set_ops(netdev);
3049 hns3_nic_set_priv_ops(netdev);
3050
3051 /* Carrier off reporting is important to ethtool even BEFORE open */
3052 netif_carrier_off(netdev);
3053
3054 ret = hns3_get_ring_config(priv);
3055 if (ret) {
3056 ret = -ENOMEM;
3057 goto out_get_ring_cfg;
3058 }
3059
3060 ret = hns3_nic_init_vector_data(priv);
3061 if (ret) {
3062 ret = -ENOMEM;
3063 goto out_init_vector_data;
3064 }
3065
3066 ret = hns3_init_all_ring(priv);
3067 if (ret) {
3068 ret = -ENOMEM;
3069 goto out_init_ring_data;
3070 }
3071
3072 ret = register_netdev(netdev);
3073 if (ret) {
3074 dev_err(priv->dev, "probe register netdev fail!\n");
3075 goto out_reg_netdev_fail;
3076 }
3077
Yunsheng Lin986743d2017-09-27 09:45:30 +08003078 hns3_dcbnl_setup(handle);
3079
Salila8e8b7f2017-08-21 17:05:24 +01003080 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */
3081 netdev->max_mtu = HNS3_MAX_MTU - (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
3082
Salil76ad4f02017-08-02 16:59:45 +01003083 return ret;
3084
3085out_reg_netdev_fail:
3086out_init_ring_data:
3087 (void)hns3_nic_uninit_vector_data(priv);
3088 priv->ring_data = NULL;
3089out_init_vector_data:
3090out_get_ring_cfg:
3091 priv->ae_handle = NULL;
3092 free_netdev(netdev);
3093 return ret;
3094}
3095
3096static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3097{
3098 struct net_device *netdev = handle->kinfo.netdev;
3099 struct hns3_nic_priv *priv = netdev_priv(netdev);
3100 int ret;
3101
3102 if (netdev->reg_state != NETREG_UNINITIALIZED)
3103 unregister_netdev(netdev);
3104
3105 ret = hns3_nic_uninit_vector_data(priv);
3106 if (ret)
3107 netdev_err(netdev, "uninit vector error\n");
3108
3109 ret = hns3_uninit_all_ring(priv);
3110 if (ret)
3111 netdev_err(netdev, "uninit ring error\n");
3112
Yunsheng Linec777892018-03-09 10:37:00 +08003113 hns3_put_ring_config(priv);
3114
Salil76ad4f02017-08-02 16:59:45 +01003115 priv->ring_data = NULL;
3116
3117 free_netdev(netdev);
3118}
3119
3120static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3121{
3122 struct net_device *netdev = handle->kinfo.netdev;
3123
3124 if (!netdev)
3125 return;
3126
3127 if (linkup) {
3128 netif_carrier_on(netdev);
3129 netif_tx_wake_all_queues(netdev);
3130 netdev_info(netdev, "link up\n");
3131 } else {
3132 netif_carrier_off(netdev);
3133 netif_tx_stop_all_queues(netdev);
3134 netdev_info(netdev, "link down\n");
3135 }
3136}
3137
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003138static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3139{
3140 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3141 struct net_device *ndev = kinfo->netdev;
Colin Ian King075cfdd2017-09-29 20:51:23 +01003142 bool if_running;
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003143 int ret;
3144 u8 i;
3145
3146 if (tc > HNAE3_MAX_TC)
3147 return -EINVAL;
3148
3149 if (!ndev)
3150 return -ENODEV;
3151
Colin Ian King075cfdd2017-09-29 20:51:23 +01003152 if_running = netif_running(ndev);
3153
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003154 ret = netdev_set_num_tc(ndev, tc);
3155 if (ret)
3156 return ret;
3157
3158 if (if_running) {
3159 (void)hns3_nic_net_stop(ndev);
3160 msleep(100);
3161 }
3162
3163 ret = (kinfo->dcb_ops && kinfo->dcb_ops->map_update) ?
3164 kinfo->dcb_ops->map_update(handle) : -EOPNOTSUPP;
3165 if (ret)
3166 goto err_out;
3167
3168 if (tc <= 1) {
3169 netdev_reset_tc(ndev);
3170 goto out;
3171 }
3172
3173 for (i = 0; i < HNAE3_MAX_TC; i++) {
3174 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3175
3176 if (tc_info->enable)
3177 netdev_set_tc_queue(ndev,
3178 tc_info->tc,
3179 tc_info->tqp_count,
3180 tc_info->tqp_offset);
3181 }
3182
3183 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
3184 netdev_set_prio_tc_map(ndev, i,
3185 kinfo->prio_tc[i]);
3186 }
3187
3188out:
3189 ret = hns3_nic_set_real_num_queue(ndev);
3190
3191err_out:
3192 if (if_running)
3193 (void)hns3_nic_net_open(ndev);
3194
3195 return ret;
3196}
3197
Lipengbb6b94a2017-11-02 20:45:21 +08003198static void hns3_recover_hw_addr(struct net_device *ndev)
3199{
3200 struct netdev_hw_addr_list *list;
3201 struct netdev_hw_addr *ha, *tmp;
3202
3203 /* go through and sync uc_addr entries to the device */
3204 list = &ndev->uc;
3205 list_for_each_entry_safe(ha, tmp, &list->list, list)
3206 hns3_nic_uc_sync(ndev, ha->addr);
3207
3208 /* go through and sync mc_addr entries to the device */
3209 list = &ndev->mc;
3210 list_for_each_entry_safe(ha, tmp, &list->list, list)
3211 hns3_nic_mc_sync(ndev, ha->addr);
3212}
3213
3214static void hns3_drop_skb_data(struct hns3_enet_ring *ring, struct sk_buff *skb)
3215{
3216 dev_kfree_skb_any(skb);
3217}
3218
3219static void hns3_clear_all_ring(struct hnae3_handle *h)
3220{
3221 struct net_device *ndev = h->kinfo.netdev;
3222 struct hns3_nic_priv *priv = netdev_priv(ndev);
3223 u32 i;
3224
3225 for (i = 0; i < h->kinfo.num_tqps; i++) {
3226 struct netdev_queue *dev_queue;
3227 struct hns3_enet_ring *ring;
3228
3229 ring = priv->ring_data[i].ring;
3230 hns3_clean_tx_ring(ring, ring->desc_num);
3231 dev_queue = netdev_get_tx_queue(ndev,
3232 priv->ring_data[i].queue_index);
3233 netdev_tx_reset_queue(dev_queue);
3234
3235 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3236 hns3_clean_rx_ring(ring, ring->desc_num, hns3_drop_skb_data);
3237 }
3238}
3239
3240static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
3241{
3242 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3243 struct net_device *ndev = kinfo->netdev;
3244
3245 if (!netif_running(ndev))
3246 return -EIO;
3247
3248 return hns3_nic_net_stop(ndev);
3249}
3250
3251static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
3252{
3253 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3254 struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
3255 int ret = 0;
3256
3257 if (netif_running(kinfo->netdev)) {
3258 ret = hns3_nic_net_up(kinfo->netdev);
3259 if (ret) {
3260 netdev_err(kinfo->netdev,
3261 "hns net up fail, ret=%d!\n", ret);
3262 return ret;
3263 }
3264
3265 priv->last_reset_time = jiffies;
3266 }
3267
3268 return ret;
3269}
3270
3271static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
3272{
3273 struct net_device *netdev = handle->kinfo.netdev;
3274 struct hns3_nic_priv *priv = netdev_priv(netdev);
3275 int ret;
3276
3277 priv->reset_level = 1;
3278 hns3_init_mac_addr(netdev);
3279 hns3_nic_set_rx_mode(netdev);
3280 hns3_recover_hw_addr(netdev);
3281
3282 /* Carrier off reporting is important to ethtool even BEFORE open */
3283 netif_carrier_off(netdev);
3284
3285 ret = hns3_get_ring_config(priv);
3286 if (ret)
3287 return ret;
3288
3289 ret = hns3_nic_init_vector_data(priv);
3290 if (ret)
3291 return ret;
3292
3293 ret = hns3_init_all_ring(priv);
3294 if (ret) {
3295 hns3_nic_uninit_vector_data(priv);
3296 priv->ring_data = NULL;
3297 }
3298
3299 return ret;
3300}
3301
3302static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
3303{
3304 struct net_device *netdev = handle->kinfo.netdev;
3305 struct hns3_nic_priv *priv = netdev_priv(netdev);
3306 int ret;
3307
3308 hns3_clear_all_ring(handle);
3309
3310 ret = hns3_nic_uninit_vector_data(priv);
3311 if (ret) {
3312 netdev_err(netdev, "uninit vector error\n");
3313 return ret;
3314 }
3315
3316 ret = hns3_uninit_all_ring(priv);
3317 if (ret)
3318 netdev_err(netdev, "uninit ring error\n");
3319
Yunsheng Linec777892018-03-09 10:37:00 +08003320 hns3_put_ring_config(priv);
3321
Lipengbb6b94a2017-11-02 20:45:21 +08003322 priv->ring_data = NULL;
3323
3324 return ret;
3325}
3326
3327static int hns3_reset_notify(struct hnae3_handle *handle,
3328 enum hnae3_reset_notify_type type)
3329{
3330 int ret = 0;
3331
3332 switch (type) {
3333 case HNAE3_UP_CLIENT:
Salil Mehtae1586242018-01-19 15:20:53 +00003334 ret = hns3_reset_notify_up_enet(handle);
3335 break;
Lipengbb6b94a2017-11-02 20:45:21 +08003336 case HNAE3_DOWN_CLIENT:
3337 ret = hns3_reset_notify_down_enet(handle);
3338 break;
3339 case HNAE3_INIT_CLIENT:
3340 ret = hns3_reset_notify_init_enet(handle);
3341 break;
3342 case HNAE3_UNINIT_CLIENT:
3343 ret = hns3_reset_notify_uninit_enet(handle);
3344 break;
3345 default:
3346 break;
3347 }
3348
3349 return ret;
3350}
3351
Peng Li09f2af62017-12-22 12:21:41 +08003352static int hns3_modify_tqp_num(struct net_device *netdev, u16 new_tqp_num)
3353{
3354 struct hns3_nic_priv *priv = netdev_priv(netdev);
3355 struct hnae3_handle *h = hns3_get_handle(netdev);
3356 int ret;
3357
3358 ret = h->ae_algo->ops->set_channels(h, new_tqp_num);
3359 if (ret)
3360 return ret;
3361
3362 ret = hns3_get_ring_config(priv);
3363 if (ret)
3364 return ret;
3365
3366 ret = hns3_nic_init_vector_data(priv);
3367 if (ret)
3368 goto err_uninit_vector;
3369
3370 ret = hns3_init_all_ring(priv);
3371 if (ret)
3372 goto err_put_ring;
3373
3374 return 0;
3375
3376err_put_ring:
3377 hns3_put_ring_config(priv);
3378err_uninit_vector:
3379 hns3_nic_uninit_vector_data(priv);
3380 return ret;
3381}
3382
3383static int hns3_adjust_tqps_num(u8 num_tc, u32 new_tqp_num)
3384{
3385 return (new_tqp_num / num_tc) * num_tc;
3386}
3387
3388int hns3_set_channels(struct net_device *netdev,
3389 struct ethtool_channels *ch)
3390{
3391 struct hns3_nic_priv *priv = netdev_priv(netdev);
3392 struct hnae3_handle *h = hns3_get_handle(netdev);
3393 struct hnae3_knic_private_info *kinfo = &h->kinfo;
3394 bool if_running = netif_running(netdev);
3395 u32 new_tqp_num = ch->combined_count;
3396 u16 org_tqp_num;
3397 int ret;
3398
3399 if (ch->rx_count || ch->tx_count)
3400 return -EINVAL;
3401
Peng Li678335a12018-03-08 19:41:54 +08003402 if (new_tqp_num > hns3_get_max_available_channels(h) ||
Peng Li09f2af62017-12-22 12:21:41 +08003403 new_tqp_num < kinfo->num_tc) {
3404 dev_err(&netdev->dev,
3405 "Change tqps fail, the tqp range is from %d to %d",
3406 kinfo->num_tc,
Peng Li678335a12018-03-08 19:41:54 +08003407 hns3_get_max_available_channels(h));
Peng Li09f2af62017-12-22 12:21:41 +08003408 return -EINVAL;
3409 }
3410
3411 new_tqp_num = hns3_adjust_tqps_num(kinfo->num_tc, new_tqp_num);
3412 if (kinfo->num_tqps == new_tqp_num)
3413 return 0;
3414
3415 if (if_running)
3416 dev_close(netdev);
3417
3418 hns3_clear_all_ring(h);
3419
3420 ret = hns3_nic_uninit_vector_data(priv);
3421 if (ret) {
3422 dev_err(&netdev->dev,
3423 "Unbind vector with tqp fail, nothing is changed");
3424 goto open_netdev;
3425 }
3426
3427 hns3_uninit_all_ring(priv);
Yunsheng Linec777892018-03-09 10:37:00 +08003428 hns3_put_ring_config(priv);
Peng Li09f2af62017-12-22 12:21:41 +08003429
3430 org_tqp_num = h->kinfo.num_tqps;
3431 ret = hns3_modify_tqp_num(netdev, new_tqp_num);
3432 if (ret) {
3433 ret = hns3_modify_tqp_num(netdev, org_tqp_num);
3434 if (ret) {
3435 /* If revert to old tqp failed, fatal error occurred */
3436 dev_err(&netdev->dev,
3437 "Revert to old tqp num fail, ret=%d", ret);
3438 return ret;
3439 }
3440 dev_info(&netdev->dev,
3441 "Change tqp num fail, Revert to old tqp num");
3442 }
3443
3444open_netdev:
3445 if (if_running)
3446 dev_open(netdev);
3447
3448 return ret;
3449}
3450
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08003451static const struct hnae3_client_ops client_ops = {
Salil76ad4f02017-08-02 16:59:45 +01003452 .init_instance = hns3_client_init,
3453 .uninit_instance = hns3_client_uninit,
3454 .link_status_change = hns3_link_status_change,
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003455 .setup_tc = hns3_client_setup_tc,
Lipengbb6b94a2017-11-02 20:45:21 +08003456 .reset_notify = hns3_reset_notify,
Salil76ad4f02017-08-02 16:59:45 +01003457};
3458
3459/* hns3_init_module - Driver registration routine
3460 * hns3_init_module is the first routine called when the driver is
3461 * loaded. All it does is register with the PCI subsystem.
3462 */
3463static int __init hns3_init_module(void)
3464{
3465 int ret;
3466
3467 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
3468 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
3469
3470 client.type = HNAE3_CLIENT_KNIC;
3471 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
3472 hns3_driver_name);
3473
3474 client.ops = &client_ops;
3475
3476 ret = hnae3_register_client(&client);
3477 if (ret)
3478 return ret;
3479
3480 ret = pci_register_driver(&hns3_driver);
3481 if (ret)
3482 hnae3_unregister_client(&client);
3483
3484 return ret;
3485}
3486module_init(hns3_init_module);
3487
3488/* hns3_exit_module - Driver exit cleanup routine
3489 * hns3_exit_module is called just before the driver is removed
3490 * from memory.
3491 */
3492static void __exit hns3_exit_module(void)
3493{
3494 pci_unregister_driver(&hns3_driver);
3495 hnae3_unregister_client(&client);
3496}
3497module_exit(hns3_exit_module);
3498
3499MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
3500MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3501MODULE_LICENSE("GPL");
3502MODULE_ALIAS("pci:hns-nic");