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Alexander Duyckb3890e32014-09-20 19:46:05 -04001/* Intel Ethernet Switch Host Interface Driver
Jeff Kirsher97c71e32015-04-03 13:26:52 -07002 * Copyright(c) 2013 - 2015 Intel Corporation.
Alexander Duyckb3890e32014-09-20 19:46:05 -04003 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21#ifndef _FM10K_H_
22#define _FM10K_H_
23
24#include <linux/types.h>
25#include <linux/etherdevice.h>
Jacob Keller504b0fd2015-10-29 13:43:40 -070026#include <linux/cpumask.h>
Alexander Duyckb3890e32014-09-20 19:46:05 -040027#include <linux/rtnetlink.h>
28#include <linux/if_vlan.h>
29#include <linux/pci.h>
Alexander Duycka211e012014-09-20 19:54:07 -040030#include <linux/net_tstamp.h>
31#include <linux/clocksource.h>
32#include <linux/ptp_clock_kernel.h>
Alexander Duyckb3890e32014-09-20 19:46:05 -040033
Alexander Duyck0e7b3642014-09-20 19:48:10 -040034#include "fm10k_pf.h"
Alexander Duyck5cb8db42014-09-20 19:51:40 -040035#include "fm10k_vf.h"
Alexander Duyck0e7b3642014-09-20 19:48:10 -040036
Jacob Keller8c7ee6d2015-08-25 13:49:11 -070037#define FM10K_MAX_JUMBO_FRAME_SIZE 15342 /* Maximum supported size 15K */
Alexander Duyck0e7b3642014-09-20 19:48:10 -040038
Alexander Duycke27ef592014-09-20 19:49:03 -040039#define MAX_QUEUES FM10K_MAX_QUEUES_PF
40
41#define FM10K_MIN_RXD 128
42#define FM10K_MAX_RXD 4096
43#define FM10K_DEFAULT_RXD 256
44
45#define FM10K_MIN_TXD 128
46#define FM10K_MAX_TXD 4096
47#define FM10K_DEFAULT_TXD 256
48#define FM10K_DEFAULT_TX_WORK 256
49
50#define FM10K_RXBUFFER_256 256
Alexander Duycke27ef592014-09-20 19:49:03 -040051#define FM10K_RX_HDR_LEN FM10K_RXBUFFER_256
Alexander Duyckfd333962014-09-26 06:33:49 +000052#define FM10K_RXBUFFER_2048 2048
53#define FM10K_RX_BUFSZ FM10K_RXBUFFER_2048
Alexander Duycke27ef592014-09-20 19:49:03 -040054
55/* How many Rx Buffers do we bundle into one write to the hardware ? */
56#define FM10K_RX_BUFFER_WRITE 16 /* Must be power of 2 */
57
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -040058#define FM10K_MAX_STATIONS 63
59struct fm10k_l2_accel {
60 int size;
61 u16 count;
62 u16 dglort;
63 struct rcu_head rcu;
64 struct net_device *macvlan[0];
65};
66
Alexander Duycke27ef592014-09-20 19:49:03 -040067enum fm10k_ring_state_t {
68 __FM10K_TX_DETECT_HANG,
69 __FM10K_HANG_CHECK_ARMED,
Jacob Keller504b0fd2015-10-29 13:43:40 -070070 __FM10K_TX_XPS_INIT_DONE,
Alexander Duycke27ef592014-09-20 19:49:03 -040071};
72
73#define check_for_tx_hang(ring) \
74 test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
75#define set_check_for_tx_hang(ring) \
76 set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
77#define clear_check_for_tx_hang(ring) \
78 clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
79
80struct fm10k_tx_buffer {
81 struct fm10k_tx_desc *next_to_watch;
82 struct sk_buff *skb;
83 unsigned int bytecount;
84 u16 gso_segs;
85 u16 tx_flags;
86 DEFINE_DMA_UNMAP_ADDR(dma);
87 DEFINE_DMA_UNMAP_LEN(len);
88};
89
90struct fm10k_rx_buffer {
91 dma_addr_t dma;
92 struct page *page;
93 u32 page_offset;
94};
95
96struct fm10k_queue_stats {
97 u64 packets;
98 u64 bytes;
99};
100
101struct fm10k_tx_queue_stats {
102 u64 restart_queue;
103 u64 csum_err;
104 u64 tx_busy;
105 u64 tx_done_old;
Jacob Keller80043f32015-07-01 17:38:36 -0700106 u64 csum_good;
Alexander Duycke27ef592014-09-20 19:49:03 -0400107};
108
109struct fm10k_rx_queue_stats {
110 u64 alloc_failed;
111 u64 csum_err;
112 u64 errors;
Jacob Keller80043f32015-07-01 17:38:36 -0700113 u64 csum_good;
114 u64 switch_errors;
115 u64 drops;
116 u64 pp_errors;
117 u64 link_errors;
118 u64 length_errors;
Alexander Duycke27ef592014-09-20 19:49:03 -0400119};
120
121struct fm10k_ring {
122 struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
123 struct net_device *netdev; /* netdev ring belongs to */
124 struct device *dev; /* device for DMA mapping */
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -0400125 struct fm10k_l2_accel __rcu *l2_accel; /* L2 acceleration list */
Alexander Duycke27ef592014-09-20 19:49:03 -0400126 void *desc; /* descriptor ring memory */
127 union {
128 struct fm10k_tx_buffer *tx_buffer;
129 struct fm10k_rx_buffer *rx_buffer;
130 };
131 u32 __iomem *tail;
132 unsigned long state;
133 dma_addr_t dma; /* phys. address of descriptor ring */
134 unsigned int size; /* length in bytes */
135
136 u8 queue_index; /* needed for queue management */
137 u8 reg_idx; /* holds the special value that gets
138 * the hardware register offset
139 * associated with this ring, which is
140 * different for DCB and RSS modes
141 */
142 u8 qos_pc; /* priority class of queue */
Jacob Kelleraa502b42015-11-02 12:10:22 -0800143 u16 vid; /* default VLAN ID of queue */
Alexander Duycke27ef592014-09-20 19:49:03 -0400144 u16 count; /* amount of descriptors */
145
146 u16 next_to_alloc;
147 u16 next_to_use;
148 u16 next_to_clean;
149
150 struct fm10k_queue_stats stats;
151 struct u64_stats_sync syncp;
152 union {
153 /* Tx */
154 struct fm10k_tx_queue_stats tx_stats;
155 /* Rx */
156 struct {
157 struct fm10k_rx_queue_stats rx_stats;
158 struct sk_buff *skb;
159 };
160 };
161} ____cacheline_internodealigned_in_smp;
162
Alexander Duyck18283ca2014-09-20 19:48:51 -0400163struct fm10k_ring_container {
Alexander Duycke27ef592014-09-20 19:49:03 -0400164 struct fm10k_ring *ring; /* pointer to linked list of rings */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400165 unsigned int total_bytes; /* total bytes processed this int */
166 unsigned int total_packets; /* total packets processed this int */
167 u16 work_limit; /* total work allowed per interrupt */
168 u16 itr; /* interrupt throttle rate value */
Bruce Allan3d02b3d2015-10-28 17:19:56 -0700169 u8 itr_scale; /* ITR adjustment based on PCI speed */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400170 u8 count; /* total number of rings in vector */
171};
172
173#define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */
174#define FM10K_ITR_10K 100 /* 100us */
175#define FM10K_ITR_20K 50 /* 50us */
Jacob Kellerdbf42842015-10-16 10:57:09 -0700176#define FM10K_ITR_40K 25 /* 25us */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400177#define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */
178
Jacob Keller584373f2015-10-16 10:57:06 -0700179#define ITR_IS_ADAPTIVE(itr) (!!(itr & FM10K_ITR_ADAPTIVE))
180
Jacob Kellerdbf42842015-10-16 10:57:09 -0700181#define FM10K_TX_ITR_DEFAULT FM10K_ITR_40K
Jacob Keller436ea952015-10-16 10:57:08 -0700182#define FM10K_RX_ITR_DEFAULT FM10K_ITR_20K
Alexander Duyck18283ca2014-09-20 19:48:51 -0400183#define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
184
Alexander Duycke27ef592014-09-20 19:49:03 -0400185static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
186{
187 return &ring->netdev->_tx[ring->queue_index];
188}
189
190/* iterator for handling rings in ring container */
191#define fm10k_for_each_ring(pos, head) \
192 for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
193
Alexander Duyck18283ca2014-09-20 19:48:51 -0400194#define MAX_Q_VECTORS 256
195#define MIN_Q_VECTORS 1
196enum fm10k_non_q_vectors {
197 FM10K_MBX_VECTOR,
Alexander Duyck5cb8db42014-09-20 19:51:40 -0400198#define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
Alexander Duyck18283ca2014-09-20 19:48:51 -0400199 NON_Q_VECTORS_PF
200};
201
202#define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \
203 NON_Q_VECTORS_PF : \
Alexander Duyck5cb8db42014-09-20 19:51:40 -0400204 NON_Q_VECTORS_VF)
Alexander Duyck18283ca2014-09-20 19:48:51 -0400205#define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
206
207struct fm10k_q_vector {
208 struct fm10k_intfc *interface;
209 u32 __iomem *itr; /* pointer to ITR register for this vector */
210 u16 v_idx; /* index of q_vector within interface array */
211 struct fm10k_ring_container rx, tx;
212
213 struct napi_struct napi;
Jacob Keller504b0fd2015-10-29 13:43:40 -0700214 cpumask_t affinity_mask;
Alexander Duyck18283ca2014-09-20 19:48:51 -0400215 char name[IFNAMSIZ + 9];
216
Alexander Duyck7461fd92014-09-20 19:53:23 -0400217#ifdef CONFIG_DEBUG_FS
218 struct dentry *dbg_q_vector;
219#endif /* CONFIG_DEBUG_FS */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400220 struct rcu_head rcu; /* to avoid race with update stats on free */
Alexander Duycke27ef592014-09-20 19:49:03 -0400221
222 /* for dynamic allocation of rings associated with this q_vector */
223 struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
Alexander Duyck18283ca2014-09-20 19:48:51 -0400224};
225
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400226enum fm10k_ring_f_enum {
227 RING_F_RSS,
228 RING_F_QOS,
229 RING_F_ARRAY_SIZE /* must be last in enum set */
230};
231
232struct fm10k_ring_feature {
233 u16 limit; /* upper limit on feature indices */
234 u16 indices; /* current value of indices */
235 u16 mask; /* Mask used for feature to ring mapping */
236 u16 offset; /* offset to start of feature */
237};
238
Alexander Duyck883a9cc2014-09-20 19:52:09 -0400239struct fm10k_iov_data {
240 unsigned int num_vfs;
241 unsigned int next_vf_mbx;
242 struct rcu_head rcu;
243 struct fm10k_vf_info vf_info[0];
244};
245
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400246#define fm10k_vxlan_port_for_each(vp, intfc) \
247 list_for_each_entry(vp, &(intfc)->vxlan_port, list)
248struct fm10k_vxlan_port {
249 struct list_head list;
250 sa_family_t sa_family;
251 __be16 port;
252};
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400253
Jeff Kirsherb382bb12015-04-03 13:27:05 -0700254/* one work queue for entire driver */
255extern struct workqueue_struct *fm10k_workqueue;
256
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400257struct fm10k_intfc {
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400258 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
259 struct net_device *netdev;
Alexander Duyck5cd5e2e2014-09-20 19:51:15 -0400260 struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400261 struct pci_dev *pdev;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400262 unsigned long state;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400263
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400264 u32 flags;
Bruce Allanfcdb0a92015-12-22 13:43:49 -0800265#define FM10K_FLAG_RESET_REQUESTED (u32)(BIT(0))
266#define FM10K_FLAG_RSS_FIELD_IPV4_UDP (u32)(BIT(1))
267#define FM10K_FLAG_RSS_FIELD_IPV6_UDP (u32)(BIT(2))
268#define FM10K_FLAG_RX_TS_ENABLED (u32)(BIT(3))
269#define FM10K_FLAG_SWPRI_CONFIG (u32)(BIT(4))
270#define FM10K_FLAG_DEBUG_STATS (u32)(BIT(5))
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400271 int xcast_mode;
272
Alexander Duyck18283ca2014-09-20 19:48:51 -0400273 /* Tx fast path data */
274 int num_tx_queues;
275 u16 tx_itr;
276
277 /* Rx fast path data */
278 int num_rx_queues;
279 u16 rx_itr;
280
Alexander Duycke27ef592014-09-20 19:49:03 -0400281 /* TX */
282 struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
283
Alexander Duyckb7d85142014-09-20 19:49:25 -0400284 u64 restart_queue;
285 u64 tx_busy;
286 u64 tx_csum_errors;
287 u64 alloc_failed;
288 u64 rx_csum_errors;
Alexander Duyckb7d85142014-09-20 19:49:25 -0400289
290 u64 tx_bytes_nic;
291 u64 tx_packets_nic;
292 u64 rx_bytes_nic;
293 u64 rx_packets_nic;
294 u64 rx_drops_nic;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400295 u64 rx_overrun_pf;
296 u64 rx_overrun_vf;
Jacob Keller80043f32015-07-01 17:38:36 -0700297
298 /* Debug Statistics */
299 u64 hw_sm_mbx_full;
300 u64 hw_csum_tx_good;
301 u64 hw_csum_rx_good;
302 u64 rx_switch_errors;
303 u64 rx_drops;
304 u64 rx_pp_errors;
305 u64 rx_link_errors;
306 u64 rx_length_errors;
307
Alexander Duyckb7d85142014-09-20 19:49:25 -0400308 u32 tx_timeout_count;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400309
Alexander Duycke27ef592014-09-20 19:49:03 -0400310 /* RX */
311 struct fm10k_ring *rx_ring[MAX_QUEUES];
312
Alexander Duyck18283ca2014-09-20 19:48:51 -0400313 /* Queueing vectors */
314 struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
315 struct msix_entry *msix_entries;
316 int num_q_vectors; /* current number of q_vectors for device */
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400317 struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
318
Alexander Duyck883a9cc2014-09-20 19:52:09 -0400319 /* SR-IOV information management structure */
320 struct fm10k_iov_data *iov_data;
321
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400322 struct fm10k_hw_stats stats;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400323 struct fm10k_hw hw;
324 u32 __iomem *uc_addr;
Alexander Duycka211e012014-09-20 19:54:07 -0400325 u32 __iomem *sw_addr;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400326 u16 msg_enable;
Alexander Duyck18283ca2014-09-20 19:48:51 -0400327 u16 tx_ring_count;
328 u16 rx_ring_count;
Alexander Duyckb7d85142014-09-20 19:49:25 -0400329 struct timer_list service_timer;
330 struct work_struct service_task;
331 unsigned long next_stats_update;
332 unsigned long next_tx_hang_check;
333 unsigned long last_reset;
334 unsigned long link_down_event;
335 bool host_ready;
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400336
337 u32 reta[FM10K_RETA_SIZE];
338 u32 rssrk[FM10K_RSSRK_SIZE];
339
340 /* VXLAN port tracking information */
341 struct list_head vxlan_port;
342
Alexander Duyck7461fd92014-09-20 19:53:23 -0400343#ifdef CONFIG_DEBUG_FS
344 struct dentry *dbg_intfc;
345
346#endif /* CONFIG_DEBUG_FS */
Alexander Duycka211e012014-09-20 19:54:07 -0400347 struct ptp_clock_info ptp_caps;
348 struct ptp_clock *ptp_clock;
349
350 struct sk_buff_head ts_tx_skb_queue;
351 u32 tx_hwtstamp_timeouts;
352
353 struct hwtstamp_config ts_config;
354 /* We are unable to actually adjust the clock beyond the frequency
355 * value. Once the clock is started there is no resetting it. As
356 * such we maintain a separate offset from the actual hardware clock
357 * to allow for offset adjustment.
358 */
359 s64 ptp_adjust;
360 rwlock_t systime_lock;
Alexander Duyck9f801ab2014-09-20 19:53:08 -0400361#ifdef CONFIG_DCB
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400362 u8 pfc_en;
363#endif
364 u8 rx_pause;
365
366 /* GLORT resources in use by PF */
367 u16 glort;
368 u16 glort_count;
369
370 /* VLAN ID for updating multicast/unicast lists */
371 u16 vid;
Alexander Duyck04a5aef2014-09-20 19:46:45 -0400372};
Alexander Duyckb3890e32014-09-20 19:46:05 -0400373
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400374enum fm10k_state_t {
375 __FM10K_RESETTING,
376 __FM10K_DOWN,
Alexander Duyckb7d85142014-09-20 19:49:25 -0400377 __FM10K_SERVICE_SCHED,
378 __FM10K_SERVICE_DISABLE,
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400379 __FM10K_MBX_LOCK,
380 __FM10K_LINK_DOWN,
381};
382
383static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
384{
385 /* busy loop if we cannot obtain the lock as some calls
386 * such as ndo_set_rx_mode may be made in atomic context
387 */
388 while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
389 udelay(20);
390}
391
392static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
393{
394 /* flush memory to make sure state is correct */
395 smp_mb__before_atomic();
396 clear_bit(__FM10K_MBX_LOCK, &interface->state);
397}
398
399static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
400{
401 return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
402}
403
Alexander Duycke27ef592014-09-20 19:49:03 -0400404/* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
405static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
406 const u32 stat_err_bits)
407{
408 return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
409}
410
411/* fm10k_desc_unused - calculate if we have unused descriptors */
412static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
413{
414 s16 unused = ring->next_to_clean - ring->next_to_use - 1;
415
416 return likely(unused < 0) ? unused + ring->count : unused;
417}
418
419#define FM10K_TX_DESC(R, i) \
420 (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
421#define FM10K_RX_DESC(R, i) \
422 (&(((union fm10k_rx_desc *)((R)->desc))[i]))
423
424#define FM10K_MAX_TXD_PWR 14
Bruce Allan3e515642015-10-28 17:19:45 -0700425#define FM10K_MAX_DATA_PER_TXD BIT(FM10K_MAX_TXD_PWR)
Alexander Duycke27ef592014-09-20 19:49:03 -0400426
427/* Tx Descriptors needed, worst case */
428#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
429#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
430
431enum fm10k_tx_flags {
432 /* Tx offload flags */
433 FM10K_TX_FLAGS_CSUM = 0x01,
434};
435
436/* This structure is stored as little endian values as that is the native
437 * format of the Rx descriptor. The ordering of these fields is reversed
438 * from the actual ftag header to allow for a single bswap to take care
439 * of placing all of the values in network order
440 */
441union fm10k_ftag_info {
442 __le64 ftag;
443 struct {
444 /* dglort and sglort combined into a single 32bit desc read */
445 __le32 glort;
Jacob Kelleraa502b42015-11-02 12:10:22 -0800446 /* upper 16 bits of VLAN are reserved 0 for swpri_type_user */
Alexander Duycke27ef592014-09-20 19:49:03 -0400447 __le32 vlan;
448 } d;
449 struct {
450 __le16 dglort;
451 __le16 sglort;
452 __le16 vlan;
453 __le16 swpri_type_user;
454 } w;
455};
456
457struct fm10k_cb {
Alexander Duycka211e012014-09-20 19:54:07 -0400458 union {
459 __le64 tstamp;
460 unsigned long ts_tx_timeout;
461 };
Alexander Duycke27ef592014-09-20 19:49:03 -0400462 union fm10k_ftag_info fi;
463};
464
465#define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
466
Alexander Duyckb3890e32014-09-20 19:46:05 -0400467/* main */
468extern char fm10k_driver_name[];
469extern const char fm10k_driver_version[];
Alexander Duyck18283ca2014-09-20 19:48:51 -0400470int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
471void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
Matthew Vick5bf33dc2015-01-29 07:17:27 +0000472__be16 fm10k_tx_encap_offload(struct sk_buff *skb);
Alexander Duyckb101c962014-09-20 19:50:03 -0400473netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
474 struct fm10k_ring *tx_ring);
475void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
476bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
477void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
Alexander Duyckb3890e32014-09-20 19:46:05 -0400478
479/* PCI */
Alexander Duyck18283ca2014-09-20 19:48:51 -0400480void fm10k_mbx_free_irq(struct fm10k_intfc *);
481int fm10k_mbx_request_irq(struct fm10k_intfc *);
482void fm10k_qv_free_irq(struct fm10k_intfc *interface);
483int fm10k_qv_request_irq(struct fm10k_intfc *interface);
Alexander Duyckb3890e32014-09-20 19:46:05 -0400484int fm10k_register_pci_driver(void);
485void fm10k_unregister_pci_driver(void);
Alexander Duyck504c5ea2014-09-20 19:48:29 -0400486void fm10k_up(struct fm10k_intfc *interface);
487void fm10k_down(struct fm10k_intfc *interface);
Alexander Duyckb7d85142014-09-20 19:49:25 -0400488void fm10k_update_stats(struct fm10k_intfc *interface);
489void fm10k_service_event_schedule(struct fm10k_intfc *interface);
490void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
Jeff Kirsher8b4a98c2015-04-10 19:14:31 -0700491#ifdef CONFIG_NET_POLL_CONTROLLER
492void fm10k_netpoll(struct net_device *netdev);
493#endif
Alexander Duyck0e7b3642014-09-20 19:48:10 -0400494
495/* Netdev */
Jacob Kellere0244902015-10-16 10:56:56 -0700496struct net_device *fm10k_alloc_netdev(const struct fm10k_info *info);
Alexander Duyck3abaae42014-09-20 19:49:43 -0400497int fm10k_setup_rx_resources(struct fm10k_ring *);
498int fm10k_setup_tx_resources(struct fm10k_ring *);
499void fm10k_free_rx_resources(struct fm10k_ring *);
500void fm10k_free_tx_resources(struct fm10k_ring *);
501void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
502void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
503void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
504 struct fm10k_tx_buffer *);
Alexander Duyck8f5e20d2014-09-20 19:48:20 -0400505void fm10k_restore_rx_state(struct fm10k_intfc *);
506void fm10k_reset_rx_state(struct fm10k_intfc *);
Alexander Duyckaa3ac822014-09-20 19:50:42 -0400507int fm10k_setup_tc(struct net_device *dev, u8 tc);
Alexander Duyck504c5ea2014-09-20 19:48:29 -0400508int fm10k_open(struct net_device *netdev);
509int fm10k_close(struct net_device *netdev);
Alexander Duyck82dd0f72014-09-20 19:50:15 -0400510
511/* Ethtool */
512void fm10k_set_ethtool_ops(struct net_device *dev);
Jacob Keller0ea7fae2016-02-16 16:19:24 -0800513u32 fm10k_get_reta_size(struct net_device *netdev);
514void fm10k_write_reta(struct fm10k_intfc *interface, const u32 *indir);
Alexander Duyck883a9cc2014-09-20 19:52:09 -0400515
516/* IOV */
517s32 fm10k_iov_event(struct fm10k_intfc *interface);
518s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
519void fm10k_iov_suspend(struct pci_dev *pdev);
520int fm10k_iov_resume(struct pci_dev *pdev);
521void fm10k_iov_disable(struct pci_dev *pdev);
522int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
523s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
524int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
525int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
526 int vf_idx, u16 vid, u8 qos);
527int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
528 int unused);
529int fm10k_ndo_get_vf_config(struct net_device *netdev,
530 int vf_idx, struct ifla_vf_info *ivi);
Alexander Duyck9f801ab2014-09-20 19:53:08 -0400531
Alexander Duyck7461fd92014-09-20 19:53:23 -0400532/* DebugFS */
533#ifdef CONFIG_DEBUG_FS
534void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
535void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
536void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
537void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
538void fm10k_dbg_init(void);
539void fm10k_dbg_exit(void);
540#else
541static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
542static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
543static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
544static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
545static inline void fm10k_dbg_init(void) {}
546static inline void fm10k_dbg_exit(void) {}
547#endif /* CONFIG_DEBUG_FS */
548
Alexander Duycka211e012014-09-20 19:54:07 -0400549/* Time Stamping */
550void fm10k_systime_to_hwtstamp(struct fm10k_intfc *interface,
551 struct skb_shared_hwtstamps *hwtstamp,
552 u64 systime);
553void fm10k_ts_tx_enqueue(struct fm10k_intfc *interface, struct sk_buff *skb);
554void fm10k_ts_tx_hwtstamp(struct fm10k_intfc *interface, __le16 dglort,
555 u64 systime);
556void fm10k_ts_reset(struct fm10k_intfc *interface);
557void fm10k_ts_init(struct fm10k_intfc *interface);
558void fm10k_ts_tx_subtask(struct fm10k_intfc *interface);
559void fm10k_ptp_register(struct fm10k_intfc *interface);
560void fm10k_ptp_unregister(struct fm10k_intfc *interface);
561int fm10k_get_ts_config(struct net_device *netdev, struct ifreq *ifr);
562int fm10k_set_ts_config(struct net_device *netdev, struct ifreq *ifr);
563
Alexander Duyck9f801ab2014-09-20 19:53:08 -0400564/* DCB */
Jacob Keller56823662015-10-27 12:51:09 -0700565#ifdef CONFIG_DCB
Alexander Duyck9f801ab2014-09-20 19:53:08 -0400566void fm10k_dcbnl_set_ops(struct net_device *dev);
Jacob Keller56823662015-10-27 12:51:09 -0700567#else
568static inline void fm10k_dcbnl_set_ops(struct net_device *dev) {}
569#endif
Alexander Duyckb3890e32014-09-20 19:46:05 -0400570#endif /* _FM10K_H_ */