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Lennert Buytenhek91da11f2008-10-07 13:44:02 +00001/*
2 * net/dsa/mv88e6123_61_65.c - Marvell 88e6123/6161/6165 switch chip support
Lennert Buytenheke84665c2009-03-20 09:52:09 +00003 * Copyright (c) 2008-2009 Marvell Semiconductor
Lennert Buytenhek91da11f2008-10-07 13:44:02 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
Barry Grussling19b2f972013-01-08 16:05:54 +000011#include <linux/delay.h>
12#include <linux/jiffies.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000013#include <linux/list.h>
Paul Gortmaker2bbba272012-01-24 10:41:40 +000014#include <linux/module.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000015#include <linux/netdevice.h>
16#include <linux/phy.h>
Ben Hutchingsc8f0b862011-11-27 17:06:08 +000017#include <net/dsa.h>
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000018#include "mv88e6xxx.h"
19
Vivien Didelotf6271e62016-04-17 13:23:59 -040020static const struct mv88e6xxx_info mv88e6123_table[] = {
21 {
22 .prod_num = PORT_SWITCH_ID_PROD_NUM_6123,
Vivien Didelot22356472016-04-17 13:24:00 -040023 .family = MV88E6XXX_FAMILY_6165,
Vivien Didelotf6271e62016-04-17 13:23:59 -040024 .name = "Marvell 88E6123",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040025 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040026 .num_ports = 3,
Vivien Didelotf6271e62016-04-17 13:23:59 -040027 }, {
28 .prod_num = PORT_SWITCH_ID_PROD_NUM_6161,
Vivien Didelot22356472016-04-17 13:24:00 -040029 .family = MV88E6XXX_FAMILY_6165,
Vivien Didelotf6271e62016-04-17 13:23:59 -040030 .name = "Marvell 88E6161",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040031 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040032 .num_ports = 6,
Vivien Didelotf6271e62016-04-17 13:23:59 -040033 }, {
34 .prod_num = PORT_SWITCH_ID_PROD_NUM_6165,
Vivien Didelot22356472016-04-17 13:24:00 -040035 .family = MV88E6XXX_FAMILY_6165,
Vivien Didelotf6271e62016-04-17 13:23:59 -040036 .name = "Marvell 88E6165",
Vivien Didelotcd5a2c82016-04-17 13:24:02 -040037 .num_databases = 4096,
Vivien Didelot009a2b92016-04-17 13:24:01 -040038 .num_ports = 6,
Vivien Didelotf6271e62016-04-17 13:23:59 -040039 }
Vivien Didelotb9b37712015-10-30 19:39:48 -040040};
41
Vivien Didelot0209d142016-04-17 13:23:55 -040042static const char *mv88e6123_drv_probe(struct device *dsa_dev,
43 struct device *host_dev, int sw_addr,
44 void **priv)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000045{
Andrew Lunna77d43f2016-04-13 02:40:42 +020046 return mv88e6xxx_drv_probe(dsa_dev, host_dev, sw_addr, priv,
47 mv88e6123_table,
48 ARRAY_SIZE(mv88e6123_table));
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000049}
50
Andrew Lunnca3dfa52016-03-12 00:01:36 +010051static int mv88e6123_setup_global(struct dsa_switch *ds)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000052{
Andrew Lunn158bc062016-04-28 21:24:06 -040053 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
Andrew Lunn15966a22015-05-06 01:09:49 +020054 u32 upstream_port = dsa_upstream_port(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000055 int ret;
Andrew Lunn15966a22015-05-06 01:09:49 +020056 u32 reg;
Andrew Lunn54d792f2015-05-06 01:09:47 +020057
58 ret = mv88e6xxx_setup_global(ds);
59 if (ret)
60 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000061
Barry Grussling3675c8d2013-01-08 16:05:53 +000062 /* Disable the PHY polling unit (since there won't be any
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000063 * external PHYs to poll), don't discard packets with
64 * excessive collisions, and mask all interrupt sources.
65 */
Andrew Lunn158bc062016-04-28 21:24:06 -040066 ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL, 0x0000);
Andrew Lunn48ace4e2016-04-14 23:47:12 +020067 if (ret)
68 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000069
Barry Grussling3675c8d2013-01-08 16:05:53 +000070 /* Configure the upstream port, and configure the upstream
Lennert Buytenheke84665c2009-03-20 09:52:09 +000071 * port as the port to which ingress and egress monitor frames
72 * are to be sent.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000073 */
Andrew Lunn15966a22015-05-06 01:09:49 +020074 reg = upstream_port << GLOBAL_MONITOR_CONTROL_INGRESS_SHIFT |
75 upstream_port << GLOBAL_MONITOR_CONTROL_EGRESS_SHIFT |
76 upstream_port << GLOBAL_MONITOR_CONTROL_ARP_SHIFT;
Andrew Lunn158bc062016-04-28 21:24:06 -040077 ret = mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_MONITOR_CONTROL, reg);
Andrew Lunn48ace4e2016-04-14 23:47:12 +020078 if (ret)
79 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000080
Barry Grussling3675c8d2013-01-08 16:05:53 +000081 /* Disable remote management for now, and set the switch's
Lennert Buytenheke84665c2009-03-20 09:52:09 +000082 * DSA device number.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000083 */
Andrew Lunn158bc062016-04-28 21:24:06 -040084 return mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL_2,
Andrew Lunn48ace4e2016-04-14 23:47:12 +020085 ds->index & 0x1f);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000086}
87
Andrew Lunnca3dfa52016-03-12 00:01:36 +010088static int mv88e6123_setup(struct dsa_switch *ds)
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000089{
Andrew Lunn158bc062016-04-28 21:24:06 -040090 struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000091 int ret;
92
Andrew Lunn158bc062016-04-28 21:24:06 -040093 ps->ds = ds;
94
95 ret = mv88e6xxx_setup_common(ps);
Guenter Roeckacdaffc2015-03-26 18:36:28 -070096 if (ret < 0)
97 return ret;
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000098
Andrew Lunn158bc062016-04-28 21:24:06 -040099 ret = mv88e6xxx_switch_reset(ps, false);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000100 if (ret < 0)
101 return ret;
102
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100103 ret = mv88e6123_setup_global(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000104 if (ret < 0)
105 return ret;
106
Andrew Lunndbde9e62015-05-06 01:09:48 +0200107 return mv88e6xxx_setup_ports(ds);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000108}
109
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100110struct dsa_switch_driver mv88e6123_switch_driver = {
Florian Fainelliac7a04c2014-09-11 21:18:09 -0700111 .tag_protocol = DSA_TAG_PROTO_EDSA,
Andrew Lunne49bad32016-04-13 02:40:43 +0200112 .probe = mv88e6123_drv_probe,
Andrew Lunnca3dfa52016-03-12 00:01:36 +0100113 .setup = mv88e6123_setup,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000114 .set_addr = mv88e6xxx_set_addr_indirect,
Andrew Lunnfd3a0ee2015-04-02 04:06:36 +0200115 .phy_read = mv88e6xxx_phy_read,
116 .phy_write = mv88e6xxx_phy_write,
Andrew Lunne413e7e2015-04-02 04:06:38 +0200117 .get_strings = mv88e6xxx_get_strings,
118 .get_ethtool_stats = mv88e6xxx_get_ethtool_stats,
119 .get_sset_count = mv88e6xxx_get_sset_count,
Andrew Lunndea87022015-08-31 15:56:47 +0200120 .adjust_link = mv88e6xxx_adjust_link,
Guenter Roeck87e5f662014-10-29 10:45:00 -0700121#ifdef CONFIG_NET_DSA_HWMON
Andrew Lunneaa23762014-11-15 22:24:51 +0100122 .get_temp = mv88e6xxx_get_temp,
Guenter Roeck87e5f662014-10-29 10:45:00 -0700123#endif
Guenter Roecka1ab91f2014-10-29 10:45:05 -0700124 .get_regs_len = mv88e6xxx_get_regs_len,
125 .get_regs = mv88e6xxx_get_regs,
Lennert Buytenhek91da11f2008-10-07 13:44:02 +0000126};
Ben Hutchings3d825ed2011-11-25 14:37:16 +0000127
128MODULE_ALIAS("platform:mv88e6123");
129MODULE_ALIAS("platform:mv88e6161");
130MODULE_ALIAS("platform:mv88e6165");