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Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000022#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
Andrew Lunnc6e970a2017-03-28 23:45:06 +020032#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000033#include <net/ip6_checksum.h>
Woojung Huhcc89c322016-11-01 20:02:00 +000034#include <linux/interrupt.h>
35#include <linux/irqdomain.h>
36#include <linux/irq.h>
37#include <linux/irqchip/chained_irq.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000038#include <linux/microchipphy.h>
Russell King8c56ea42017-02-07 15:02:57 -080039#include <linux/phy.h>
Phil Elwell1827b062018-04-19 17:59:39 +010040#include <linux/of_mdio.h>
Phil Elwell760db292018-04-19 17:59:38 +010041#include <linux/of_net.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000042#include "lan78xx.h"
43
44#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
45#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
46#define DRIVER_NAME "lan78xx"
Woojung Huh02dc1f32016-12-07 20:26:25 +000047#define DRIVER_VERSION "1.0.6"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000048
49#define TX_TIMEOUT_JIFFIES (5 * HZ)
50#define THROTTLE_JIFFIES (HZ / 8)
51#define UNLINK_TIMEOUT_MS 3
52
53#define RX_MAX_QUEUE_MEMORY (60 * 1518)
54
55#define SS_USB_PKT_SIZE (1024)
56#define HS_USB_PKT_SIZE (512)
57#define FS_USB_PKT_SIZE (64)
58
59#define MAX_RX_FIFO_SIZE (12 * 1024)
60#define MAX_TX_FIFO_SIZE (12 * 1024)
61#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
62#define DEFAULT_BULK_IN_DELAY (0x0800)
63#define MAX_SINGLE_PACKET_SIZE (9000)
64#define DEFAULT_TX_CSUM_ENABLE (true)
65#define DEFAULT_RX_CSUM_ENABLE (true)
66#define DEFAULT_TSO_CSUM_ENABLE (true)
67#define DEFAULT_VLAN_FILTER_ENABLE (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000068#define TX_OVERHEAD (8)
69#define RXW_PADDING 2
70
71#define LAN78XX_USB_VENDOR_ID (0x0424)
72#define LAN7800_USB_PRODUCT_ID (0x7800)
73#define LAN7850_USB_PRODUCT_ID (0x7850)
Woojung Huh02dc1f32016-12-07 20:26:25 +000074#define LAN7801_USB_PRODUCT_ID (0x7801)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000075#define LAN78XX_EEPROM_MAGIC (0x78A5)
76#define LAN78XX_OTP_MAGIC (0x78F3)
77
78#define MII_READ 1
79#define MII_WRITE 0
80
81#define EEPROM_INDICATOR (0xA5)
82#define EEPROM_MAC_OFFSET (0x01)
83#define MAX_EEPROM_SIZE 512
84#define OTP_INDICATOR_1 (0xF3)
85#define OTP_INDICATOR_2 (0xF7)
86
87#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
88 WAKE_MCAST | WAKE_BCAST | \
89 WAKE_ARP | WAKE_MAGIC)
90
91/* USB related defines */
92#define BULK_IN_PIPE 1
93#define BULK_OUT_PIPE 2
94
95/* default autosuspend delay (mSec)*/
96#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
97
Woojung Huh20ff5562016-03-16 22:10:40 +000098/* statistic update interval (mSec) */
99#define STAT_UPDATE_TIMER (1 * 1000)
100
Woojung Huhcc89c322016-11-01 20:02:00 +0000101/* defines interrupts from interrupt EP */
102#define MAX_INT_EP (32)
103#define INT_EP_INTEP (31)
104#define INT_EP_OTP_WR_DONE (28)
105#define INT_EP_EEE_TX_LPI_START (26)
106#define INT_EP_EEE_TX_LPI_STOP (25)
107#define INT_EP_EEE_RX_LPI (24)
108#define INT_EP_MAC_RESET_TIMEOUT (23)
109#define INT_EP_RDFO (22)
110#define INT_EP_TXE (21)
111#define INT_EP_USB_STATUS (20)
112#define INT_EP_TX_DIS (19)
113#define INT_EP_RX_DIS (18)
114#define INT_EP_PHY (17)
115#define INT_EP_DP (16)
116#define INT_EP_MAC_ERR (15)
117#define INT_EP_TDFU (14)
118#define INT_EP_TDFO (13)
119#define INT_EP_UTX (12)
120#define INT_EP_GPIO_11 (11)
121#define INT_EP_GPIO_10 (10)
122#define INT_EP_GPIO_9 (9)
123#define INT_EP_GPIO_8 (8)
124#define INT_EP_GPIO_7 (7)
125#define INT_EP_GPIO_6 (6)
126#define INT_EP_GPIO_5 (5)
127#define INT_EP_GPIO_4 (4)
128#define INT_EP_GPIO_3 (3)
129#define INT_EP_GPIO_2 (2)
130#define INT_EP_GPIO_1 (1)
131#define INT_EP_GPIO_0 (0)
132
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000133static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
134 "RX FCS Errors",
135 "RX Alignment Errors",
136 "Rx Fragment Errors",
137 "RX Jabber Errors",
138 "RX Undersize Frame Errors",
139 "RX Oversize Frame Errors",
140 "RX Dropped Frames",
141 "RX Unicast Byte Count",
142 "RX Broadcast Byte Count",
143 "RX Multicast Byte Count",
144 "RX Unicast Frames",
145 "RX Broadcast Frames",
146 "RX Multicast Frames",
147 "RX Pause Frames",
148 "RX 64 Byte Frames",
149 "RX 65 - 127 Byte Frames",
150 "RX 128 - 255 Byte Frames",
151 "RX 256 - 511 Bytes Frames",
152 "RX 512 - 1023 Byte Frames",
153 "RX 1024 - 1518 Byte Frames",
154 "RX Greater 1518 Byte Frames",
155 "EEE RX LPI Transitions",
156 "EEE RX LPI Time",
157 "TX FCS Errors",
158 "TX Excess Deferral Errors",
159 "TX Carrier Errors",
160 "TX Bad Byte Count",
161 "TX Single Collisions",
162 "TX Multiple Collisions",
163 "TX Excessive Collision",
164 "TX Late Collisions",
165 "TX Unicast Byte Count",
166 "TX Broadcast Byte Count",
167 "TX Multicast Byte Count",
168 "TX Unicast Frames",
169 "TX Broadcast Frames",
170 "TX Multicast Frames",
171 "TX Pause Frames",
172 "TX 64 Byte Frames",
173 "TX 65 - 127 Byte Frames",
174 "TX 128 - 255 Byte Frames",
175 "TX 256 - 511 Bytes Frames",
176 "TX 512 - 1023 Byte Frames",
177 "TX 1024 - 1518 Byte Frames",
178 "TX Greater 1518 Byte Frames",
179 "EEE TX LPI Transitions",
180 "EEE TX LPI Time",
181};
182
183struct lan78xx_statstage {
184 u32 rx_fcs_errors;
185 u32 rx_alignment_errors;
186 u32 rx_fragment_errors;
187 u32 rx_jabber_errors;
188 u32 rx_undersize_frame_errors;
189 u32 rx_oversize_frame_errors;
190 u32 rx_dropped_frames;
191 u32 rx_unicast_byte_count;
192 u32 rx_broadcast_byte_count;
193 u32 rx_multicast_byte_count;
194 u32 rx_unicast_frames;
195 u32 rx_broadcast_frames;
196 u32 rx_multicast_frames;
197 u32 rx_pause_frames;
198 u32 rx_64_byte_frames;
199 u32 rx_65_127_byte_frames;
200 u32 rx_128_255_byte_frames;
201 u32 rx_256_511_bytes_frames;
202 u32 rx_512_1023_byte_frames;
203 u32 rx_1024_1518_byte_frames;
204 u32 rx_greater_1518_byte_frames;
205 u32 eee_rx_lpi_transitions;
206 u32 eee_rx_lpi_time;
207 u32 tx_fcs_errors;
208 u32 tx_excess_deferral_errors;
209 u32 tx_carrier_errors;
210 u32 tx_bad_byte_count;
211 u32 tx_single_collisions;
212 u32 tx_multiple_collisions;
213 u32 tx_excessive_collision;
214 u32 tx_late_collisions;
215 u32 tx_unicast_byte_count;
216 u32 tx_broadcast_byte_count;
217 u32 tx_multicast_byte_count;
218 u32 tx_unicast_frames;
219 u32 tx_broadcast_frames;
220 u32 tx_multicast_frames;
221 u32 tx_pause_frames;
222 u32 tx_64_byte_frames;
223 u32 tx_65_127_byte_frames;
224 u32 tx_128_255_byte_frames;
225 u32 tx_256_511_bytes_frames;
226 u32 tx_512_1023_byte_frames;
227 u32 tx_1024_1518_byte_frames;
228 u32 tx_greater_1518_byte_frames;
229 u32 eee_tx_lpi_transitions;
230 u32 eee_tx_lpi_time;
231};
232
Woojung Huh20ff5562016-03-16 22:10:40 +0000233struct lan78xx_statstage64 {
234 u64 rx_fcs_errors;
235 u64 rx_alignment_errors;
236 u64 rx_fragment_errors;
237 u64 rx_jabber_errors;
238 u64 rx_undersize_frame_errors;
239 u64 rx_oversize_frame_errors;
240 u64 rx_dropped_frames;
241 u64 rx_unicast_byte_count;
242 u64 rx_broadcast_byte_count;
243 u64 rx_multicast_byte_count;
244 u64 rx_unicast_frames;
245 u64 rx_broadcast_frames;
246 u64 rx_multicast_frames;
247 u64 rx_pause_frames;
248 u64 rx_64_byte_frames;
249 u64 rx_65_127_byte_frames;
250 u64 rx_128_255_byte_frames;
251 u64 rx_256_511_bytes_frames;
252 u64 rx_512_1023_byte_frames;
253 u64 rx_1024_1518_byte_frames;
254 u64 rx_greater_1518_byte_frames;
255 u64 eee_rx_lpi_transitions;
256 u64 eee_rx_lpi_time;
257 u64 tx_fcs_errors;
258 u64 tx_excess_deferral_errors;
259 u64 tx_carrier_errors;
260 u64 tx_bad_byte_count;
261 u64 tx_single_collisions;
262 u64 tx_multiple_collisions;
263 u64 tx_excessive_collision;
264 u64 tx_late_collisions;
265 u64 tx_unicast_byte_count;
266 u64 tx_broadcast_byte_count;
267 u64 tx_multicast_byte_count;
268 u64 tx_unicast_frames;
269 u64 tx_broadcast_frames;
270 u64 tx_multicast_frames;
271 u64 tx_pause_frames;
272 u64 tx_64_byte_frames;
273 u64 tx_65_127_byte_frames;
274 u64 tx_128_255_byte_frames;
275 u64 tx_256_511_bytes_frames;
276 u64 tx_512_1023_byte_frames;
277 u64 tx_1024_1518_byte_frames;
278 u64 tx_greater_1518_byte_frames;
279 u64 eee_tx_lpi_transitions;
280 u64 eee_tx_lpi_time;
281};
282
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000283struct lan78xx_net;
284
285struct lan78xx_priv {
286 struct lan78xx_net *dev;
287 u32 rfe_ctl;
288 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
289 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
290 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
291 struct mutex dataport_mutex; /* for dataport access */
292 spinlock_t rfe_ctl_lock; /* for rfe register access */
293 struct work_struct set_multicast;
294 struct work_struct set_vlan;
295 u32 wol;
296};
297
298enum skb_state {
299 illegal = 0,
300 tx_start,
301 tx_done,
302 rx_start,
303 rx_done,
304 rx_cleanup,
305 unlink_start
306};
307
308struct skb_data { /* skb->cb is one of these */
309 struct urb *urb;
310 struct lan78xx_net *dev;
311 enum skb_state state;
312 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000313 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000314};
315
316struct usb_context {
317 struct usb_ctrlrequest req;
318 struct lan78xx_net *dev;
319};
320
321#define EVENT_TX_HALT 0
322#define EVENT_RX_HALT 1
323#define EVENT_RX_MEMORY 2
324#define EVENT_STS_SPLIT 3
325#define EVENT_LINK_RESET 4
326#define EVENT_RX_PAUSED 5
327#define EVENT_DEV_WAKING 6
328#define EVENT_DEV_ASLEEP 7
329#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000330#define EVENT_STAT_UPDATE 9
331
332struct statstage {
333 struct mutex access_lock; /* for stats access */
334 struct lan78xx_statstage saved;
335 struct lan78xx_statstage rollover_count;
336 struct lan78xx_statstage rollover_max;
337 struct lan78xx_statstage64 curr_stat;
338};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000339
Woojung Huhcc89c322016-11-01 20:02:00 +0000340struct irq_domain_data {
341 struct irq_domain *irqdomain;
342 unsigned int phyirq;
343 struct irq_chip *irqchip;
344 irq_flow_handler_t irq_handler;
345 u32 irqenable;
346 struct mutex irq_lock; /* for irq bus access */
347};
348
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000349struct lan78xx_net {
350 struct net_device *net;
351 struct usb_device *udev;
352 struct usb_interface *intf;
353 void *driver_priv;
354
355 int rx_qlen;
356 int tx_qlen;
357 struct sk_buff_head rxq;
358 struct sk_buff_head txq;
359 struct sk_buff_head done;
360 struct sk_buff_head rxq_pause;
361 struct sk_buff_head txq_pend;
362
363 struct tasklet_struct bh;
364 struct delayed_work wq;
365
366 struct usb_host_endpoint *ep_blkin;
367 struct usb_host_endpoint *ep_blkout;
368 struct usb_host_endpoint *ep_intr;
369
370 int msg_enable;
371
372 struct urb *urb_intr;
373 struct usb_anchor deferred;
374
375 struct mutex phy_mutex; /* for phy access */
376 unsigned pipe_in, pipe_out, pipe_intr;
377
378 u32 hard_mtu; /* count any extra framing */
379 size_t rx_urb_size; /* size for rx urbs */
380
381 unsigned long flags;
382
383 wait_queue_head_t *wait;
384 unsigned char suspend_count;
385
386 unsigned maxpacket;
387 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000388 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000389
390 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000391
392 int link_on;
393 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000394
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000395 u32 chipid;
396 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000397 struct mii_bus *mdiobus;
Woojung Huh02dc1f32016-12-07 20:26:25 +0000398 phy_interface_t interface;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000399
400 int fc_autoneg;
401 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000402
403 int delta;
404 struct statstage stats;
Woojung Huhcc89c322016-11-01 20:02:00 +0000405
406 struct irq_domain_data domain_data;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000407};
408
Woojung Huh02dc1f32016-12-07 20:26:25 +0000409/* define external phy id */
410#define PHY_LAN8835 (0x0007C130)
411#define PHY_KSZ9031RNX (0x00221620)
412
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000413/* use ethtool to change the level for any given device */
414static int msg_level = -1;
415module_param(msg_level, int, 0);
416MODULE_PARM_DESC(msg_level, "Override default message level");
417
418static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
419{
420 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
421 int ret;
422
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000423 if (!buf)
424 return -ENOMEM;
425
426 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
427 USB_VENDOR_REQUEST_READ_REGISTER,
428 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
429 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
430 if (likely(ret >= 0)) {
431 le32_to_cpus(buf);
432 *data = *buf;
433 } else {
434 netdev_warn(dev->net,
435 "Failed to read register index 0x%08x. ret = %d",
436 index, ret);
437 }
438
439 kfree(buf);
440
441 return ret;
442}
443
444static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
445{
446 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
447 int ret;
448
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000449 if (!buf)
450 return -ENOMEM;
451
452 *buf = data;
453 cpu_to_le32s(buf);
454
455 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
456 USB_VENDOR_REQUEST_WRITE_REGISTER,
457 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
458 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
459 if (unlikely(ret < 0)) {
460 netdev_warn(dev->net,
461 "Failed to write register index 0x%08x. ret = %d",
462 index, ret);
463 }
464
465 kfree(buf);
466
467 return ret;
468}
469
470static int lan78xx_read_stats(struct lan78xx_net *dev,
471 struct lan78xx_statstage *data)
472{
473 int ret = 0;
474 int i;
475 struct lan78xx_statstage *stats;
476 u32 *src;
477 u32 *dst;
478
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000479 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
480 if (!stats)
481 return -ENOMEM;
482
483 ret = usb_control_msg(dev->udev,
484 usb_rcvctrlpipe(dev->udev, 0),
485 USB_VENDOR_REQUEST_GET_STATS,
486 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
487 0,
488 0,
489 (void *)stats,
490 sizeof(*stats),
491 USB_CTRL_SET_TIMEOUT);
492 if (likely(ret >= 0)) {
493 src = (u32 *)stats;
494 dst = (u32 *)data;
495 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
496 le32_to_cpus(&src[i]);
497 dst[i] = src[i];
498 }
499 } else {
500 netdev_warn(dev->net,
501 "Failed to read stat ret = 0x%x", ret);
502 }
503
504 kfree(stats);
505
506 return ret;
507}
508
Woojung Huh20ff5562016-03-16 22:10:40 +0000509#define check_counter_rollover(struct1, dev_stats, member) { \
510 if (struct1->member < dev_stats.saved.member) \
511 dev_stats.rollover_count.member++; \
512 }
513
514static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
515 struct lan78xx_statstage *stats)
516{
517 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
518 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
519 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
520 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
521 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
522 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
523 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
524 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
525 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
526 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
527 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
528 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
529 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
530 check_counter_rollover(stats, dev->stats, rx_pause_frames);
531 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
532 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
533 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
534 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
535 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
536 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
537 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
538 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
539 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
540 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
541 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
542 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
543 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
544 check_counter_rollover(stats, dev->stats, tx_single_collisions);
545 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
546 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
547 check_counter_rollover(stats, dev->stats, tx_late_collisions);
548 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
549 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
550 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
551 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
552 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
553 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
554 check_counter_rollover(stats, dev->stats, tx_pause_frames);
555 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
556 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
557 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
558 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
559 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
560 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
561 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
562 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
563 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
564
565 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
566}
567
568static void lan78xx_update_stats(struct lan78xx_net *dev)
569{
570 u32 *p, *count, *max;
571 u64 *data;
572 int i;
573 struct lan78xx_statstage lan78xx_stats;
574
575 if (usb_autopm_get_interface(dev->intf) < 0)
576 return;
577
578 p = (u32 *)&lan78xx_stats;
579 count = (u32 *)&dev->stats.rollover_count;
580 max = (u32 *)&dev->stats.rollover_max;
581 data = (u64 *)&dev->stats.curr_stat;
582
583 mutex_lock(&dev->stats.access_lock);
584
585 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
586 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
587
588 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
589 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
590
591 mutex_unlock(&dev->stats.access_lock);
592
593 usb_autopm_put_interface(dev->intf);
594}
595
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000596/* Loop until the read is completed with timeout called with phy_mutex held */
597static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
598{
599 unsigned long start_time = jiffies;
600 u32 val;
601 int ret;
602
603 do {
604 ret = lan78xx_read_reg(dev, MII_ACC, &val);
605 if (unlikely(ret < 0))
606 return -EIO;
607
608 if (!(val & MII_ACC_MII_BUSY_))
609 return 0;
610 } while (!time_after(jiffies, start_time + HZ));
611
612 return -EIO;
613}
614
615static inline u32 mii_access(int id, int index, int read)
616{
617 u32 ret;
618
619 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
620 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
621 if (read)
622 ret |= MII_ACC_MII_READ_;
623 else
624 ret |= MII_ACC_MII_WRITE_;
625 ret |= MII_ACC_MII_BUSY_;
626
627 return ret;
628}
629
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000630static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
631{
632 unsigned long start_time = jiffies;
633 u32 val;
634 int ret;
635
636 do {
637 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
638 if (unlikely(ret < 0))
639 return -EIO;
640
641 if (!(val & E2P_CMD_EPC_BUSY_) ||
642 (val & E2P_CMD_EPC_TIMEOUT_))
643 break;
644 usleep_range(40, 100);
645 } while (!time_after(jiffies, start_time + HZ));
646
647 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
648 netdev_warn(dev->net, "EEPROM read operation timeout");
649 return -EIO;
650 }
651
652 return 0;
653}
654
655static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
656{
657 unsigned long start_time = jiffies;
658 u32 val;
659 int ret;
660
661 do {
662 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
663 if (unlikely(ret < 0))
664 return -EIO;
665
666 if (!(val & E2P_CMD_EPC_BUSY_))
667 return 0;
668
669 usleep_range(40, 100);
670 } while (!time_after(jiffies, start_time + HZ));
671
672 netdev_warn(dev->net, "EEPROM is busy");
673 return -EIO;
674}
675
676static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
677 u32 length, u8 *data)
678{
679 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000680 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000681 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000682 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000683
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000684 /* depends on chip, some EEPROM pins are muxed with LED function.
685 * disable & restore LED function to access EEPROM.
686 */
687 ret = lan78xx_read_reg(dev, HW_CFG, &val);
688 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000689 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000690 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
691 ret = lan78xx_write_reg(dev, HW_CFG, val);
692 }
693
694 retval = lan78xx_eeprom_confirm_not_busy(dev);
695 if (retval)
696 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000697
698 for (i = 0; i < length; i++) {
699 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
700 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
701 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000702 if (unlikely(ret < 0)) {
703 retval = -EIO;
704 goto exit;
705 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000706
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000707 retval = lan78xx_wait_eeprom(dev);
708 if (retval < 0)
709 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000710
711 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000712 if (unlikely(ret < 0)) {
713 retval = -EIO;
714 goto exit;
715 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000716
717 data[i] = val & 0xFF;
718 offset++;
719 }
720
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000721 retval = 0;
722exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000723 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000724 ret = lan78xx_write_reg(dev, HW_CFG, saved);
725
726 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000727}
728
729static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
730 u32 length, u8 *data)
731{
732 u8 sig;
733 int ret;
734
735 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
736 if ((ret == 0) && (sig == EEPROM_INDICATOR))
737 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
738 else
739 ret = -EINVAL;
740
741 return ret;
742}
743
744static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
745 u32 length, u8 *data)
746{
747 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000748 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000749 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000750 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000751
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000752 /* depends on chip, some EEPROM pins are muxed with LED function.
753 * disable & restore LED function to access EEPROM.
754 */
755 ret = lan78xx_read_reg(dev, HW_CFG, &val);
756 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000757 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000758 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
759 ret = lan78xx_write_reg(dev, HW_CFG, val);
760 }
761
762 retval = lan78xx_eeprom_confirm_not_busy(dev);
763 if (retval)
764 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000765
766 /* Issue write/erase enable command */
767 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
768 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000769 if (unlikely(ret < 0)) {
770 retval = -EIO;
771 goto exit;
772 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000773
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000774 retval = lan78xx_wait_eeprom(dev);
775 if (retval < 0)
776 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000777
778 for (i = 0; i < length; i++) {
779 /* Fill data register */
780 val = data[i];
781 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000782 if (ret < 0) {
783 retval = -EIO;
784 goto exit;
785 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000786
787 /* Send "write" command */
788 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
789 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
790 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000791 if (ret < 0) {
792 retval = -EIO;
793 goto exit;
794 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000795
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000796 retval = lan78xx_wait_eeprom(dev);
797 if (retval < 0)
798 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000799
800 offset++;
801 }
802
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000803 retval = 0;
804exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000805 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000806 ret = lan78xx_write_reg(dev, HW_CFG, saved);
807
808 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000809}
810
811static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
812 u32 length, u8 *data)
813{
814 int i;
815 int ret;
816 u32 buf;
817 unsigned long timeout;
818
819 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
820
821 if (buf & OTP_PWR_DN_PWRDN_N_) {
822 /* clear it and wait to be cleared */
823 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
824
825 timeout = jiffies + HZ;
826 do {
827 usleep_range(1, 10);
828 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
829 if (time_after(jiffies, timeout)) {
830 netdev_warn(dev->net,
831 "timeout on OTP_PWR_DN");
832 return -EIO;
833 }
834 } while (buf & OTP_PWR_DN_PWRDN_N_);
835 }
836
837 for (i = 0; i < length; i++) {
838 ret = lan78xx_write_reg(dev, OTP_ADDR1,
839 ((offset + i) >> 8) & OTP_ADDR1_15_11);
840 ret = lan78xx_write_reg(dev, OTP_ADDR2,
841 ((offset + i) & OTP_ADDR2_10_3));
842
843 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
844 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
845
846 timeout = jiffies + HZ;
847 do {
848 udelay(1);
849 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
850 if (time_after(jiffies, timeout)) {
851 netdev_warn(dev->net,
852 "timeout on OTP_STATUS");
853 return -EIO;
854 }
855 } while (buf & OTP_STATUS_BUSY_);
856
857 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
858
859 data[i] = (u8)(buf & 0xFF);
860 }
861
862 return 0;
863}
864
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000865static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
866 u32 length, u8 *data)
867{
868 int i;
869 int ret;
870 u32 buf;
871 unsigned long timeout;
872
873 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
874
875 if (buf & OTP_PWR_DN_PWRDN_N_) {
876 /* clear it and wait to be cleared */
877 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
878
879 timeout = jiffies + HZ;
880 do {
881 udelay(1);
882 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
883 if (time_after(jiffies, timeout)) {
884 netdev_warn(dev->net,
885 "timeout on OTP_PWR_DN completion");
886 return -EIO;
887 }
888 } while (buf & OTP_PWR_DN_PWRDN_N_);
889 }
890
891 /* set to BYTE program mode */
892 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
893
894 for (i = 0; i < length; i++) {
895 ret = lan78xx_write_reg(dev, OTP_ADDR1,
896 ((offset + i) >> 8) & OTP_ADDR1_15_11);
897 ret = lan78xx_write_reg(dev, OTP_ADDR2,
898 ((offset + i) & OTP_ADDR2_10_3));
899 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
900 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
901 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
902
903 timeout = jiffies + HZ;
904 do {
905 udelay(1);
906 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
907 if (time_after(jiffies, timeout)) {
908 netdev_warn(dev->net,
909 "Timeout on OTP_STATUS completion");
910 return -EIO;
911 }
912 } while (buf & OTP_STATUS_BUSY_);
913 }
914
915 return 0;
916}
917
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000918static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
919 u32 length, u8 *data)
920{
921 u8 sig;
922 int ret;
923
924 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
925
926 if (ret == 0) {
927 if (sig == OTP_INDICATOR_1)
928 offset = offset;
929 else if (sig == OTP_INDICATOR_2)
930 offset += 0x100;
931 else
932 ret = -EINVAL;
Phil Elwell4bfc3382018-04-11 10:59:17 +0100933 if (!ret)
934 ret = lan78xx_read_raw_otp(dev, offset, length, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000935 }
936
937 return ret;
938}
939
940static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
941{
942 int i, ret;
943
944 for (i = 0; i < 100; i++) {
945 u32 dp_sel;
946
947 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
948 if (unlikely(ret < 0))
949 return -EIO;
950
951 if (dp_sel & DP_SEL_DPRDY_)
952 return 0;
953
954 usleep_range(40, 100);
955 }
956
957 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
958
959 return -EIO;
960}
961
962static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
963 u32 addr, u32 length, u32 *buf)
964{
965 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
966 u32 dp_sel;
967 int i, ret;
968
969 if (usb_autopm_get_interface(dev->intf) < 0)
970 return 0;
971
972 mutex_lock(&pdata->dataport_mutex);
973
974 ret = lan78xx_dataport_wait_not_busy(dev);
975 if (ret < 0)
976 goto done;
977
978 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
979
980 dp_sel &= ~DP_SEL_RSEL_MASK_;
981 dp_sel |= ram_select;
982 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
983
984 for (i = 0; i < length; i++) {
985 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
986
987 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
988
989 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
990
991 ret = lan78xx_dataport_wait_not_busy(dev);
992 if (ret < 0)
993 goto done;
994 }
995
996done:
997 mutex_unlock(&pdata->dataport_mutex);
998 usb_autopm_put_interface(dev->intf);
999
1000 return ret;
1001}
1002
1003static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1004 int index, u8 addr[ETH_ALEN])
1005{
1006 u32 temp;
1007
1008 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1009 temp = addr[3];
1010 temp = addr[2] | (temp << 8);
1011 temp = addr[1] | (temp << 8);
1012 temp = addr[0] | (temp << 8);
1013 pdata->pfilter_table[index][1] = temp;
1014 temp = addr[5];
1015 temp = addr[4] | (temp << 8);
1016 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1017 pdata->pfilter_table[index][0] = temp;
1018 }
1019}
1020
1021/* returns hash bit number for given MAC address */
1022static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1023{
1024 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1025}
1026
1027static void lan78xx_deferred_multicast_write(struct work_struct *param)
1028{
1029 struct lan78xx_priv *pdata =
1030 container_of(param, struct lan78xx_priv, set_multicast);
1031 struct lan78xx_net *dev = pdata->dev;
1032 int i;
1033 int ret;
1034
1035 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1036 pdata->rfe_ctl);
1037
1038 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1039 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1040
1041 for (i = 1; i < NUM_OF_MAF; i++) {
1042 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1043 ret = lan78xx_write_reg(dev, MAF_LO(i),
1044 pdata->pfilter_table[i][1]);
1045 ret = lan78xx_write_reg(dev, MAF_HI(i),
1046 pdata->pfilter_table[i][0]);
1047 }
1048
1049 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1050}
1051
1052static void lan78xx_set_multicast(struct net_device *netdev)
1053{
1054 struct lan78xx_net *dev = netdev_priv(netdev);
1055 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1056 unsigned long flags;
1057 int i;
1058
1059 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1060
1061 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1062 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1063
1064 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1065 pdata->mchash_table[i] = 0;
1066 /* pfilter_table[0] has own HW address */
1067 for (i = 1; i < NUM_OF_MAF; i++) {
1068 pdata->pfilter_table[i][0] =
1069 pdata->pfilter_table[i][1] = 0;
1070 }
1071
1072 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1073
1074 if (dev->net->flags & IFF_PROMISC) {
1075 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1076 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1077 } else {
1078 if (dev->net->flags & IFF_ALLMULTI) {
1079 netif_dbg(dev, drv, dev->net,
1080 "receive all multicast enabled");
1081 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1082 }
1083 }
1084
1085 if (netdev_mc_count(dev->net)) {
1086 struct netdev_hw_addr *ha;
1087 int i;
1088
1089 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1090
1091 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1092
1093 i = 1;
1094 netdev_for_each_mc_addr(ha, netdev) {
1095 /* set first 32 into Perfect Filter */
1096 if (i < 33) {
1097 lan78xx_set_addr_filter(pdata, i, ha->addr);
1098 } else {
1099 u32 bitnum = lan78xx_hash(ha->addr);
1100
1101 pdata->mchash_table[bitnum / 32] |=
1102 (1 << (bitnum % 32));
1103 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1104 }
1105 i++;
1106 }
1107 }
1108
1109 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1110
1111 /* defer register writes to a sleepable context */
1112 schedule_work(&pdata->set_multicast);
1113}
1114
1115static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1116 u16 lcladv, u16 rmtadv)
1117{
1118 u32 flow = 0, fct_flow = 0;
1119 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001120 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001121
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001122 if (dev->fc_autoneg)
1123 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1124 else
1125 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001126
1127 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001128 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001129
1130 if (cap & FLOW_CTRL_RX)
1131 flow |= FLOW_CR_RX_FCEN_;
1132
1133 if (dev->udev->speed == USB_SPEED_SUPER)
1134 fct_flow = 0x817;
1135 else if (dev->udev->speed == USB_SPEED_HIGH)
1136 fct_flow = 0x211;
1137
1138 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1139 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1140 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1141
1142 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1143
1144 /* threshold value should be set before enabling flow */
1145 ret = lan78xx_write_reg(dev, FLOW, flow);
1146
1147 return 0;
1148}
1149
1150static int lan78xx_link_reset(struct lan78xx_net *dev)
1151{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001152 struct phy_device *phydev = dev->net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001153 struct ethtool_link_ksettings ecmd;
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001154 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001155 u32 buf;
1156
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001157 /* clear LAN78xx interrupt status */
1158 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1159 if (unlikely(ret < 0))
1160 return -EIO;
1161
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001162 phy_read_status(phydev);
1163
1164 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001165 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001166
1167 /* reset MAC */
1168 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1169 if (unlikely(ret < 0))
1170 return -EIO;
1171 buf |= MAC_CR_RST_;
1172 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1173 if (unlikely(ret < 0))
1174 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001175
Woojung Huh20ff5562016-03-16 22:10:40 +00001176 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001177 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001178 dev->link_on = true;
1179
Philippe Reynes6e765102016-10-09 12:07:04 +02001180 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001181
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001182 if (dev->udev->speed == USB_SPEED_SUPER) {
Philippe Reynes6e765102016-10-09 12:07:04 +02001183 if (ecmd.base.speed == 1000) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001184 /* disable U2 */
1185 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1186 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1187 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1188 /* enable U1 */
1189 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1190 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1191 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1192 } else {
1193 /* enable U1 & U2 */
1194 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1195 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1196 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1197 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1198 }
1199 }
1200
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001201 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001202 if (ladv < 0)
1203 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001204
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001205 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001206 if (radv < 0)
1207 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001208
1209 netif_dbg(dev, link, dev->net,
1210 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
Philippe Reynes6e765102016-10-09 12:07:04 +02001211 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001212
Philippe Reynes6e765102016-10-09 12:07:04 +02001213 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1214 radv);
Woojung Huh20ff5562016-03-16 22:10:40 +00001215
1216 if (!timer_pending(&dev->stat_monitor)) {
1217 dev->delta = 1;
1218 mod_timer(&dev->stat_monitor,
1219 jiffies + STAT_UPDATE_TIMER);
1220 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001221 }
1222
1223 return ret;
1224}
1225
1226/* some work can't be done in tasklets, so we use keventd
1227 *
1228 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1229 * but tasklet_schedule() doesn't. hope the failure is rare.
1230 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001231static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001232{
1233 set_bit(work, &dev->flags);
1234 if (!schedule_delayed_work(&dev->wq, 0))
1235 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1236}
1237
1238static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1239{
1240 u32 intdata;
1241
1242 if (urb->actual_length != 4) {
1243 netdev_warn(dev->net,
1244 "unexpected urb length %d", urb->actual_length);
1245 return;
1246 }
1247
1248 memcpy(&intdata, urb->transfer_buffer, 4);
1249 le32_to_cpus(&intdata);
1250
1251 if (intdata & INT_ENP_PHY_INT) {
1252 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
Woojung Huhcc89c322016-11-01 20:02:00 +00001253 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1254
1255 if (dev->domain_data.phyirq > 0)
1256 generic_handle_irq(dev->domain_data.phyirq);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001257 } else
1258 netdev_warn(dev->net,
1259 "unexpected interrupt: 0x%08x\n", intdata);
1260}
1261
1262static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1263{
1264 return MAX_EEPROM_SIZE;
1265}
1266
1267static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1268 struct ethtool_eeprom *ee, u8 *data)
1269{
1270 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301271 int ret;
1272
1273 ret = usb_autopm_get_interface(dev->intf);
1274 if (ret)
1275 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001276
1277 ee->magic = LAN78XX_EEPROM_MAGIC;
1278
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301279 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1280
1281 usb_autopm_put_interface(dev->intf);
1282
1283 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001284}
1285
1286static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1287 struct ethtool_eeprom *ee, u8 *data)
1288{
1289 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301290 int ret;
1291
1292 ret = usb_autopm_get_interface(dev->intf);
1293 if (ret)
1294 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001295
Nisar Sayedc0776822017-09-21 02:36:37 +05301296 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure
1297 * to load data from EEPROM
1298 */
1299 if (ee->magic == LAN78XX_EEPROM_MAGIC)
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301300 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001301 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1302 (ee->offset == 0) &&
1303 (ee->len == 512) &&
1304 (data[0] == OTP_INDICATOR_1))
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301305 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001306
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301307 usb_autopm_put_interface(dev->intf);
1308
1309 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001310}
1311
1312static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1313 u8 *data)
1314{
1315 if (stringset == ETH_SS_STATS)
1316 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1317}
1318
1319static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1320{
1321 if (sset == ETH_SS_STATS)
1322 return ARRAY_SIZE(lan78xx_gstrings);
1323 else
1324 return -EOPNOTSUPP;
1325}
1326
1327static void lan78xx_get_stats(struct net_device *netdev,
1328 struct ethtool_stats *stats, u64 *data)
1329{
1330 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001331
Woojung Huh20ff5562016-03-16 22:10:40 +00001332 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001333
Woojung Huh20ff5562016-03-16 22:10:40 +00001334 mutex_lock(&dev->stats.access_lock);
1335 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1336 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001337}
1338
1339static void lan78xx_get_wol(struct net_device *netdev,
1340 struct ethtool_wolinfo *wol)
1341{
1342 struct lan78xx_net *dev = netdev_priv(netdev);
1343 int ret;
1344 u32 buf;
1345 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1346
1347 if (usb_autopm_get_interface(dev->intf) < 0)
1348 return;
1349
1350 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1351 if (unlikely(ret < 0)) {
1352 wol->supported = 0;
1353 wol->wolopts = 0;
1354 } else {
1355 if (buf & USB_CFG_RMT_WKP_) {
1356 wol->supported = WAKE_ALL;
1357 wol->wolopts = pdata->wol;
1358 } else {
1359 wol->supported = 0;
1360 wol->wolopts = 0;
1361 }
1362 }
1363
1364 usb_autopm_put_interface(dev->intf);
1365}
1366
1367static int lan78xx_set_wol(struct net_device *netdev,
1368 struct ethtool_wolinfo *wol)
1369{
1370 struct lan78xx_net *dev = netdev_priv(netdev);
1371 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1372 int ret;
1373
1374 ret = usb_autopm_get_interface(dev->intf);
1375 if (ret < 0)
1376 return ret;
1377
1378 pdata->wol = 0;
1379 if (wol->wolopts & WAKE_UCAST)
1380 pdata->wol |= WAKE_UCAST;
1381 if (wol->wolopts & WAKE_MCAST)
1382 pdata->wol |= WAKE_MCAST;
1383 if (wol->wolopts & WAKE_BCAST)
1384 pdata->wol |= WAKE_BCAST;
1385 if (wol->wolopts & WAKE_MAGIC)
1386 pdata->wol |= WAKE_MAGIC;
1387 if (wol->wolopts & WAKE_PHY)
1388 pdata->wol |= WAKE_PHY;
1389 if (wol->wolopts & WAKE_ARP)
1390 pdata->wol |= WAKE_ARP;
1391
1392 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1393
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001394 phy_ethtool_set_wol(netdev->phydev, wol);
1395
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001396 usb_autopm_put_interface(dev->intf);
1397
1398 return ret;
1399}
1400
1401static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1402{
1403 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001404 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001405 int ret;
1406 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001407
1408 ret = usb_autopm_get_interface(dev->intf);
1409 if (ret < 0)
1410 return ret;
1411
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001412 ret = phy_ethtool_get_eee(phydev, edata);
1413 if (ret < 0)
1414 goto exit;
1415
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001416 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1417 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001418 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001419 edata->eee_active = !!(edata->advertised &
1420 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001421 edata->tx_lpi_enabled = true;
1422 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1423 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1424 edata->tx_lpi_timer = buf;
1425 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001426 edata->eee_enabled = false;
1427 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001428 edata->tx_lpi_enabled = false;
1429 edata->tx_lpi_timer = 0;
1430 }
1431
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001432 ret = 0;
1433exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001434 usb_autopm_put_interface(dev->intf);
1435
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001436 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001437}
1438
1439static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1440{
1441 struct lan78xx_net *dev = netdev_priv(net);
1442 int ret;
1443 u32 buf;
1444
1445 ret = usb_autopm_get_interface(dev->intf);
1446 if (ret < 0)
1447 return ret;
1448
1449 if (edata->eee_enabled) {
1450 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1451 buf |= MAC_CR_EEE_EN_;
1452 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1453
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001454 phy_ethtool_set_eee(net->phydev, edata);
1455
1456 buf = (u32)edata->tx_lpi_timer;
1457 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001458 } else {
1459 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1460 buf &= ~MAC_CR_EEE_EN_;
1461 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1462 }
1463
1464 usb_autopm_put_interface(dev->intf);
1465
1466 return 0;
1467}
1468
1469static u32 lan78xx_get_link(struct net_device *net)
1470{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001471 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001472
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001473 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001474}
1475
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001476static void lan78xx_get_drvinfo(struct net_device *net,
1477 struct ethtool_drvinfo *info)
1478{
1479 struct lan78xx_net *dev = netdev_priv(net);
1480
1481 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
1482 strncpy(info->version, DRIVER_VERSION, sizeof(info->version));
1483 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1484}
1485
1486static u32 lan78xx_get_msglevel(struct net_device *net)
1487{
1488 struct lan78xx_net *dev = netdev_priv(net);
1489
1490 return dev->msg_enable;
1491}
1492
1493static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1494{
1495 struct lan78xx_net *dev = netdev_priv(net);
1496
1497 dev->msg_enable = level;
1498}
1499
Philippe Reynes6e765102016-10-09 12:07:04 +02001500static int lan78xx_get_link_ksettings(struct net_device *net,
1501 struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001502{
1503 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001504 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001505 int ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001506
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001507 ret = usb_autopm_get_interface(dev->intf);
1508 if (ret < 0)
1509 return ret;
1510
yuval.shaia@oracle.com55141742017-06-13 10:09:46 +03001511 phy_ethtool_ksettings_get(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001512
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001513 usb_autopm_put_interface(dev->intf);
1514
1515 return ret;
1516}
1517
Philippe Reynes6e765102016-10-09 12:07:04 +02001518static int lan78xx_set_link_ksettings(struct net_device *net,
1519 const struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001520{
1521 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001522 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001523 int ret = 0;
1524 int temp;
1525
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001526 ret = usb_autopm_get_interface(dev->intf);
1527 if (ret < 0)
1528 return ret;
1529
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001530 /* change speed & duplex */
Philippe Reynes6e765102016-10-09 12:07:04 +02001531 ret = phy_ethtool_ksettings_set(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001532
Philippe Reynes6e765102016-10-09 12:07:04 +02001533 if (!cmd->base.autoneg) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001534 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001535 temp = phy_read(phydev, MII_BMCR);
1536 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001537 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001538 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001539 }
1540
1541 usb_autopm_put_interface(dev->intf);
1542
1543 return ret;
1544}
1545
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001546static void lan78xx_get_pause(struct net_device *net,
1547 struct ethtool_pauseparam *pause)
1548{
1549 struct lan78xx_net *dev = netdev_priv(net);
1550 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001551 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001552
Philippe Reynes6e765102016-10-09 12:07:04 +02001553 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001554
1555 pause->autoneg = dev->fc_autoneg;
1556
1557 if (dev->fc_request_control & FLOW_CTRL_TX)
1558 pause->tx_pause = 1;
1559
1560 if (dev->fc_request_control & FLOW_CTRL_RX)
1561 pause->rx_pause = 1;
1562}
1563
1564static int lan78xx_set_pause(struct net_device *net,
1565 struct ethtool_pauseparam *pause)
1566{
1567 struct lan78xx_net *dev = netdev_priv(net);
1568 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001569 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001570 int ret;
1571
Philippe Reynes6e765102016-10-09 12:07:04 +02001572 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001573
Philippe Reynes6e765102016-10-09 12:07:04 +02001574 if (pause->autoneg && !ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001575 ret = -EINVAL;
1576 goto exit;
1577 }
1578
1579 dev->fc_request_control = 0;
1580 if (pause->rx_pause)
1581 dev->fc_request_control |= FLOW_CTRL_RX;
1582
1583 if (pause->tx_pause)
1584 dev->fc_request_control |= FLOW_CTRL_TX;
1585
Philippe Reynes6e765102016-10-09 12:07:04 +02001586 if (ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001587 u32 mii_adv;
Philippe Reynes6e765102016-10-09 12:07:04 +02001588 u32 advertising;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001589
Philippe Reynes6e765102016-10-09 12:07:04 +02001590 ethtool_convert_link_mode_to_legacy_u32(
1591 &advertising, ecmd.link_modes.advertising);
1592
1593 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001594 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
Philippe Reynes6e765102016-10-09 12:07:04 +02001595 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1596
1597 ethtool_convert_legacy_u32_to_link_mode(
1598 ecmd.link_modes.advertising, advertising);
1599
1600 phy_ethtool_ksettings_set(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001601 }
1602
1603 dev->fc_autoneg = pause->autoneg;
1604
1605 ret = 0;
1606exit:
1607 return ret;
1608}
1609
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001610static const struct ethtool_ops lan78xx_ethtool_ops = {
1611 .get_link = lan78xx_get_link,
Florian Fainelli860ce4b2016-11-15 10:06:44 -08001612 .nway_reset = phy_ethtool_nway_reset,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001613 .get_drvinfo = lan78xx_get_drvinfo,
1614 .get_msglevel = lan78xx_get_msglevel,
1615 .set_msglevel = lan78xx_set_msglevel,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001616 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1617 .get_eeprom = lan78xx_ethtool_get_eeprom,
1618 .set_eeprom = lan78xx_ethtool_set_eeprom,
1619 .get_ethtool_stats = lan78xx_get_stats,
1620 .get_sset_count = lan78xx_get_sset_count,
1621 .get_strings = lan78xx_get_strings,
1622 .get_wol = lan78xx_get_wol,
1623 .set_wol = lan78xx_set_wol,
1624 .get_eee = lan78xx_get_eee,
1625 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001626 .get_pauseparam = lan78xx_get_pause,
1627 .set_pauseparam = lan78xx_set_pause,
Philippe Reynes6e765102016-10-09 12:07:04 +02001628 .get_link_ksettings = lan78xx_get_link_ksettings,
1629 .set_link_ksettings = lan78xx_set_link_ksettings,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001630};
1631
1632static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1633{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001634 if (!netif_running(netdev))
1635 return -EINVAL;
1636
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001637 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001638}
1639
1640static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1641{
1642 u32 addr_lo, addr_hi;
1643 int ret;
1644 u8 addr[6];
1645
1646 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1647 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1648
1649 addr[0] = addr_lo & 0xFF;
1650 addr[1] = (addr_lo >> 8) & 0xFF;
1651 addr[2] = (addr_lo >> 16) & 0xFF;
1652 addr[3] = (addr_lo >> 24) & 0xFF;
1653 addr[4] = addr_hi & 0xFF;
1654 addr[5] = (addr_hi >> 8) & 0xFF;
1655
1656 if (!is_valid_ether_addr(addr)) {
Phil Elwell760db292018-04-19 17:59:38 +01001657 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) {
1658 /* valid address present in Device Tree */
1659 netif_dbg(dev, ifup, dev->net,
1660 "MAC address read from Device Tree");
1661 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET,
1662 ETH_ALEN, addr) == 0) ||
1663 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET,
1664 ETH_ALEN, addr) == 0)) &&
1665 is_valid_ether_addr(addr)) {
1666 /* eeprom values are valid so use them */
1667 netif_dbg(dev, ifup, dev->net,
1668 "MAC address read from EEPROM");
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001669 } else {
1670 /* generate random MAC */
1671 random_ether_addr(addr);
1672 netif_dbg(dev, ifup, dev->net,
1673 "MAC address set to random addr");
1674 }
Phil Elwell760db292018-04-19 17:59:38 +01001675
1676 addr_lo = addr[0] | (addr[1] << 8) |
1677 (addr[2] << 16) | (addr[3] << 24);
1678 addr_hi = addr[4] | (addr[5] << 8);
1679
1680 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1681 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001682 }
1683
1684 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1685 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1686
1687 ether_addr_copy(dev->net->dev_addr, addr);
1688}
1689
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001690/* MDIO read and write wrappers for phylib */
1691static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001692{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001693 struct lan78xx_net *dev = bus->priv;
1694 u32 val, addr;
1695 int ret;
1696
1697 ret = usb_autopm_get_interface(dev->intf);
1698 if (ret < 0)
1699 return ret;
1700
1701 mutex_lock(&dev->phy_mutex);
1702
1703 /* confirm MII not busy */
1704 ret = lan78xx_phy_wait_not_busy(dev);
1705 if (ret < 0)
1706 goto done;
1707
1708 /* set the address, index & direction (read from PHY) */
1709 addr = mii_access(phy_id, idx, MII_READ);
1710 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1711
1712 ret = lan78xx_phy_wait_not_busy(dev);
1713 if (ret < 0)
1714 goto done;
1715
1716 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1717
1718 ret = (int)(val & 0xFFFF);
1719
1720done:
1721 mutex_unlock(&dev->phy_mutex);
1722 usb_autopm_put_interface(dev->intf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001723
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001724 return ret;
1725}
1726
1727static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1728 u16 regval)
1729{
1730 struct lan78xx_net *dev = bus->priv;
1731 u32 val, addr;
1732 int ret;
1733
1734 ret = usb_autopm_get_interface(dev->intf);
1735 if (ret < 0)
1736 return ret;
1737
1738 mutex_lock(&dev->phy_mutex);
1739
1740 /* confirm MII not busy */
1741 ret = lan78xx_phy_wait_not_busy(dev);
1742 if (ret < 0)
1743 goto done;
1744
1745 val = (u32)regval;
1746 ret = lan78xx_write_reg(dev, MII_DATA, val);
1747
1748 /* set the address, index & direction (write to PHY) */
1749 addr = mii_access(phy_id, idx, MII_WRITE);
1750 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1751
1752 ret = lan78xx_phy_wait_not_busy(dev);
1753 if (ret < 0)
1754 goto done;
1755
1756done:
1757 mutex_unlock(&dev->phy_mutex);
1758 usb_autopm_put_interface(dev->intf);
1759 return 0;
1760}
1761
1762static int lan78xx_mdio_init(struct lan78xx_net *dev)
1763{
Phil Elwell1827b062018-04-19 17:59:39 +01001764 struct device_node *node;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001765 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001766
1767 dev->mdiobus = mdiobus_alloc();
1768 if (!dev->mdiobus) {
1769 netdev_err(dev->net, "can't allocate MDIO bus\n");
1770 return -ENOMEM;
1771 }
1772
1773 dev->mdiobus->priv = (void *)dev;
1774 dev->mdiobus->read = lan78xx_mdiobus_read;
1775 dev->mdiobus->write = lan78xx_mdiobus_write;
1776 dev->mdiobus->name = "lan78xx-mdiobus";
1777
1778 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1779 dev->udev->bus->busnum, dev->udev->devnum);
1780
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001781 switch (dev->chipid) {
1782 case ID_REV_CHIP_ID_7800_:
1783 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001784 /* set to internal PHY id */
1785 dev->mdiobus->phy_mask = ~(1 << 1);
1786 break;
Woojung Huh02dc1f32016-12-07 20:26:25 +00001787 case ID_REV_CHIP_ID_7801_:
1788 /* scan thru PHYAD[2..0] */
1789 dev->mdiobus->phy_mask = ~(0xFF);
1790 break;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001791 }
1792
Phil Elwell1827b062018-04-19 17:59:39 +01001793 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio");
1794 if (node) {
1795 ret = of_mdiobus_register(dev->mdiobus, node);
1796 of_node_put(node);
1797 } else {
1798 ret = mdiobus_register(dev->mdiobus);
1799 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001800 if (ret) {
1801 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001802 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001803 }
1804
1805 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1806 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001807exit1:
1808 mdiobus_free(dev->mdiobus);
1809 return ret;
1810}
1811
1812static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1813{
1814 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001815 mdiobus_free(dev->mdiobus);
1816}
1817
1818static void lan78xx_link_status_change(struct net_device *net)
1819{
Woojung Huh14437e32016-04-25 22:22:36 +00001820 struct phy_device *phydev = net->phydev;
1821 int ret, temp;
1822
1823 /* At forced 100 F/H mode, chip may fail to set mode correctly
1824 * when cable is switched between long(~50+m) and short one.
1825 * As workaround, set to 10 before setting to 100
1826 * at forced 100 F/H mode.
1827 */
1828 if (!phydev->autoneg && (phydev->speed == 100)) {
1829 /* disable phy interrupt */
1830 temp = phy_read(phydev, LAN88XX_INT_MASK);
1831 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1832 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1833
1834 temp = phy_read(phydev, MII_BMCR);
1835 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1836 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1837 temp |= BMCR_SPEED100;
1838 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1839
1840 /* clear pending interrupt generated while workaround */
1841 temp = phy_read(phydev, LAN88XX_INT_STS);
1842
1843 /* enable phy interrupt back */
1844 temp = phy_read(phydev, LAN88XX_INT_MASK);
1845 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1846 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1847 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001848}
1849
Woojung Huhcc89c322016-11-01 20:02:00 +00001850static int irq_map(struct irq_domain *d, unsigned int irq,
1851 irq_hw_number_t hwirq)
1852{
1853 struct irq_domain_data *data = d->host_data;
1854
1855 irq_set_chip_data(irq, data);
1856 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1857 irq_set_noprobe(irq);
1858
1859 return 0;
1860}
1861
1862static void irq_unmap(struct irq_domain *d, unsigned int irq)
1863{
1864 irq_set_chip_and_handler(irq, NULL, NULL);
1865 irq_set_chip_data(irq, NULL);
1866}
1867
1868static const struct irq_domain_ops chip_domain_ops = {
1869 .map = irq_map,
1870 .unmap = irq_unmap,
1871};
1872
1873static void lan78xx_irq_mask(struct irq_data *irqd)
1874{
1875 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1876
1877 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1878}
1879
1880static void lan78xx_irq_unmask(struct irq_data *irqd)
1881{
1882 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1883
1884 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1885}
1886
1887static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1888{
1889 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1890
1891 mutex_lock(&data->irq_lock);
1892}
1893
1894static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1895{
1896 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1897 struct lan78xx_net *dev =
1898 container_of(data, struct lan78xx_net, domain_data);
1899 u32 buf;
1900 int ret;
1901
1902 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1903 * are only two callbacks executed in non-atomic contex.
1904 */
1905 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1906 if (buf != data->irqenable)
1907 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1908
1909 mutex_unlock(&data->irq_lock);
1910}
1911
1912static struct irq_chip lan78xx_irqchip = {
1913 .name = "lan78xx-irqs",
1914 .irq_mask = lan78xx_irq_mask,
1915 .irq_unmask = lan78xx_irq_unmask,
1916 .irq_bus_lock = lan78xx_irq_bus_lock,
1917 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1918};
1919
1920static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1921{
1922 struct device_node *of_node;
1923 struct irq_domain *irqdomain;
1924 unsigned int irqmap = 0;
1925 u32 buf;
1926 int ret = 0;
1927
1928 of_node = dev->udev->dev.parent->of_node;
1929
1930 mutex_init(&dev->domain_data.irq_lock);
1931
1932 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1933 dev->domain_data.irqenable = buf;
1934
1935 dev->domain_data.irqchip = &lan78xx_irqchip;
1936 dev->domain_data.irq_handler = handle_simple_irq;
1937
1938 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1939 &chip_domain_ops, &dev->domain_data);
1940 if (irqdomain) {
1941 /* create mapping for PHY interrupt */
1942 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1943 if (!irqmap) {
1944 irq_domain_remove(irqdomain);
1945
1946 irqdomain = NULL;
1947 ret = -EINVAL;
1948 }
1949 } else {
1950 ret = -EINVAL;
1951 }
1952
1953 dev->domain_data.irqdomain = irqdomain;
1954 dev->domain_data.phyirq = irqmap;
1955
1956 return ret;
1957}
1958
1959static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
1960{
1961 if (dev->domain_data.phyirq > 0) {
1962 irq_dispose_mapping(dev->domain_data.phyirq);
1963
1964 if (dev->domain_data.irqdomain)
1965 irq_domain_remove(dev->domain_data.irqdomain);
1966 }
1967 dev->domain_data.phyirq = 0;
1968 dev->domain_data.irqdomain = NULL;
1969}
1970
Woojung Huh02dc1f32016-12-07 20:26:25 +00001971static int lan8835_fixup(struct phy_device *phydev)
1972{
1973 int buf;
1974 int ret;
1975 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1976
1977 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
Russell King5f613672017-03-21 16:36:48 +00001978 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001979 buf &= ~0x1800;
1980 buf |= 0x0800;
Russell King5f613672017-03-21 16:36:48 +00001981 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001982
1983 /* RGMII MAC TXC Delay Enable */
1984 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
1985 MAC_RGMII_ID_TXC_DELAY_EN_);
1986
1987 /* RGMII TX DLL Tune Adjust */
1988 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
1989
1990 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
1991
1992 return 1;
1993}
1994
1995static int ksz9031rnx_fixup(struct phy_device *phydev)
1996{
1997 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1998
1999 /* Micrel9301RNX PHY configuration */
2000 /* RGMII Control Signal Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002001 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002002 /* RGMII RX Data Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002003 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002004 /* RGMII RX Clock Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00002005 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002006
2007 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2008
2009 return 1;
2010}
2011
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002012static int lan78xx_phy_init(struct lan78xx_net *dev)
2013{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002014 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002015 u32 mii_adv;
Colin Ian King3b51cc72018-02-01 17:10:18 +00002016 struct phy_device *phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002017
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002018 phydev = phy_find_first(dev->mdiobus);
2019 if (!phydev) {
2020 netdev_err(dev->net, "no PHY found\n");
2021 return -EIO;
2022 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002023
Woojung Huh02dc1f32016-12-07 20:26:25 +00002024 if ((dev->chipid == ID_REV_CHIP_ID_7800_) ||
2025 (dev->chipid == ID_REV_CHIP_ID_7850_)) {
2026 phydev->is_internal = true;
2027 dev->interface = PHY_INTERFACE_MODE_GMII;
2028
2029 } else if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2030 if (!phydev->drv) {
2031 netdev_err(dev->net, "no PHY driver found\n");
2032 return -EIO;
2033 }
2034
2035 dev->interface = PHY_INTERFACE_MODE_RGMII;
2036
2037 /* external PHY fixup for KSZ9031RNX */
2038 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2039 ksz9031rnx_fixup);
2040 if (ret < 0) {
2041 netdev_err(dev->net, "fail to register fixup\n");
2042 return ret;
2043 }
2044 /* external PHY fixup for LAN8835 */
2045 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2046 lan8835_fixup);
2047 if (ret < 0) {
2048 netdev_err(dev->net, "fail to register fixup\n");
2049 return ret;
2050 }
2051 /* add more external PHY fixup here if needed */
2052
2053 phydev->is_internal = false;
2054 } else {
2055 netdev_err(dev->net, "unknown ID found\n");
2056 ret = -EIO;
2057 goto error;
2058 }
2059
Woojung Huhcc89c322016-11-01 20:02:00 +00002060 /* if phyirq is not set, use polling mode in phylib */
2061 if (dev->domain_data.phyirq > 0)
2062 phydev->irq = dev->domain_data.phyirq;
2063 else
2064 phydev->irq = 0;
2065 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00002066
Woojung Huhf6e3ef32016-11-17 22:10:02 +00002067 /* set to AUTOMDIX */
2068 phydev->mdix = ETH_TP_MDI_AUTO;
2069
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002070 ret = phy_connect_direct(dev->net, phydev,
2071 lan78xx_link_status_change,
Woojung Huh02dc1f32016-12-07 20:26:25 +00002072 dev->interface);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002073 if (ret) {
2074 netdev_err(dev->net, "can't attach PHY to %s\n",
2075 dev->mdiobus->id);
2076 return -EIO;
2077 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002078
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002079 /* MAC doesn't support 1000T Half */
2080 phydev->supported &= ~SUPPORTED_1000baseT_Half;
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00002081
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002082 /* support both flow controls */
2083 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2084 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2085 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2086 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2087
Phil Elwell1827b062018-04-19 17:59:39 +01002088 if (phydev->mdio.dev.of_node) {
2089 u32 reg;
2090 int len;
2091
2092 len = of_property_count_elems_of_size(phydev->mdio.dev.of_node,
2093 "microchip,led-modes",
2094 sizeof(u32));
2095 if (len >= 0) {
2096 /* Ensure the appropriate LEDs are enabled */
2097 lan78xx_read_reg(dev, HW_CFG, &reg);
2098 reg &= ~(HW_CFG_LED0_EN_ |
2099 HW_CFG_LED1_EN_ |
2100 HW_CFG_LED2_EN_ |
2101 HW_CFG_LED3_EN_);
2102 reg |= (len > 0) * HW_CFG_LED0_EN_ |
2103 (len > 1) * HW_CFG_LED1_EN_ |
2104 (len > 2) * HW_CFG_LED2_EN_ |
2105 (len > 3) * HW_CFG_LED3_EN_;
2106 lan78xx_write_reg(dev, HW_CFG, reg);
2107 }
2108 }
2109
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002110 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002111
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002112 dev->fc_autoneg = phydev->autoneg;
2113
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002114 return 0;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002115
2116error:
2117 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
2118 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
2119
2120 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002121}
2122
2123static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2124{
2125 int ret = 0;
2126 u32 buf;
2127 bool rxenabled;
2128
2129 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2130
2131 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2132
2133 if (rxenabled) {
2134 buf &= ~MAC_RX_RXEN_;
2135 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2136 }
2137
2138 /* add 4 to size for FCS */
2139 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2140 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2141
2142 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2143
2144 if (rxenabled) {
2145 buf |= MAC_RX_RXEN_;
2146 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2147 }
2148
2149 return 0;
2150}
2151
2152static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2153{
2154 struct sk_buff *skb;
2155 unsigned long flags;
2156 int count = 0;
2157
2158 spin_lock_irqsave(&q->lock, flags);
2159 while (!skb_queue_empty(q)) {
2160 struct skb_data *entry;
2161 struct urb *urb;
2162 int ret;
2163
2164 skb_queue_walk(q, skb) {
2165 entry = (struct skb_data *)skb->cb;
2166 if (entry->state != unlink_start)
2167 goto found;
2168 }
2169 break;
2170found:
2171 entry->state = unlink_start;
2172 urb = entry->urb;
2173
2174 /* Get reference count of the URB to avoid it to be
2175 * freed during usb_unlink_urb, which may trigger
2176 * use-after-free problem inside usb_unlink_urb since
2177 * usb_unlink_urb is always racing with .complete
2178 * handler(include defer_bh).
2179 */
2180 usb_get_urb(urb);
2181 spin_unlock_irqrestore(&q->lock, flags);
2182 /* during some PM-driven resume scenarios,
2183 * these (async) unlinks complete immediately
2184 */
2185 ret = usb_unlink_urb(urb);
2186 if (ret != -EINPROGRESS && ret != 0)
2187 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2188 else
2189 count++;
2190 usb_put_urb(urb);
2191 spin_lock_irqsave(&q->lock, flags);
2192 }
2193 spin_unlock_irqrestore(&q->lock, flags);
2194 return count;
2195}
2196
2197static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2198{
2199 struct lan78xx_net *dev = netdev_priv(netdev);
2200 int ll_mtu = new_mtu + netdev->hard_header_len;
2201 int old_hard_mtu = dev->hard_mtu;
2202 int old_rx_urb_size = dev->rx_urb_size;
2203 int ret;
2204
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002205 /* no second zero-length packet read wanted after mtu-sized packets */
2206 if ((ll_mtu % dev->maxpacket) == 0)
2207 return -EDOM;
2208
2209 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
2210
2211 netdev->mtu = new_mtu;
2212
2213 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2214 if (dev->rx_urb_size == old_hard_mtu) {
2215 dev->rx_urb_size = dev->hard_mtu;
2216 if (dev->rx_urb_size > old_rx_urb_size) {
2217 if (netif_running(dev->net)) {
2218 unlink_urbs(dev, &dev->rxq);
2219 tasklet_schedule(&dev->bh);
2220 }
2221 }
2222 }
2223
2224 return 0;
2225}
2226
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002227static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002228{
2229 struct lan78xx_net *dev = netdev_priv(netdev);
2230 struct sockaddr *addr = p;
2231 u32 addr_lo, addr_hi;
2232 int ret;
2233
2234 if (netif_running(netdev))
2235 return -EBUSY;
2236
2237 if (!is_valid_ether_addr(addr->sa_data))
2238 return -EADDRNOTAVAIL;
2239
2240 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2241
2242 addr_lo = netdev->dev_addr[0] |
2243 netdev->dev_addr[1] << 8 |
2244 netdev->dev_addr[2] << 16 |
2245 netdev->dev_addr[3] << 24;
2246 addr_hi = netdev->dev_addr[4] |
2247 netdev->dev_addr[5] << 8;
2248
2249 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2250 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2251
2252 return 0;
2253}
2254
2255/* Enable or disable Rx checksum offload engine */
2256static int lan78xx_set_features(struct net_device *netdev,
2257 netdev_features_t features)
2258{
2259 struct lan78xx_net *dev = netdev_priv(netdev);
2260 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2261 unsigned long flags;
2262 int ret;
2263
2264 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2265
2266 if (features & NETIF_F_RXCSUM) {
2267 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2268 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2269 } else {
2270 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2271 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2272 }
2273
2274 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2275 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2276 else
2277 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2278
2279 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2280
2281 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2282
2283 return 0;
2284}
2285
2286static void lan78xx_deferred_vlan_write(struct work_struct *param)
2287{
2288 struct lan78xx_priv *pdata =
2289 container_of(param, struct lan78xx_priv, set_vlan);
2290 struct lan78xx_net *dev = pdata->dev;
2291
2292 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2293 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2294}
2295
2296static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2297 __be16 proto, u16 vid)
2298{
2299 struct lan78xx_net *dev = netdev_priv(netdev);
2300 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2301 u16 vid_bit_index;
2302 u16 vid_dword_index;
2303
2304 vid_dword_index = (vid >> 5) & 0x7F;
2305 vid_bit_index = vid & 0x1F;
2306
2307 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2308
2309 /* defer register writes to a sleepable context */
2310 schedule_work(&pdata->set_vlan);
2311
2312 return 0;
2313}
2314
2315static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2316 __be16 proto, u16 vid)
2317{
2318 struct lan78xx_net *dev = netdev_priv(netdev);
2319 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2320 u16 vid_bit_index;
2321 u16 vid_dword_index;
2322
2323 vid_dword_index = (vid >> 5) & 0x7F;
2324 vid_bit_index = vid & 0x1F;
2325
2326 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2327
2328 /* defer register writes to a sleepable context */
2329 schedule_work(&pdata->set_vlan);
2330
2331 return 0;
2332}
2333
2334static void lan78xx_init_ltm(struct lan78xx_net *dev)
2335{
2336 int ret;
2337 u32 buf;
2338 u32 regs[6] = { 0 };
2339
2340 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2341 if (buf & USB_CFG1_LTM_ENABLE_) {
2342 u8 temp[2];
2343 /* Get values from EEPROM first */
2344 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2345 if (temp[0] == 24) {
2346 ret = lan78xx_read_raw_eeprom(dev,
2347 temp[1] * 2,
2348 24,
2349 (u8 *)regs);
2350 if (ret < 0)
2351 return;
2352 }
2353 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2354 if (temp[0] == 24) {
2355 ret = lan78xx_read_raw_otp(dev,
2356 temp[1] * 2,
2357 24,
2358 (u8 *)regs);
2359 if (ret < 0)
2360 return;
2361 }
2362 }
2363 }
2364
2365 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2366 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2367 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2368 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2369 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2370 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2371}
2372
2373static int lan78xx_reset(struct lan78xx_net *dev)
2374{
2375 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2376 u32 buf;
2377 int ret = 0;
2378 unsigned long timeout;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302379 u8 sig;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002380
2381 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2382 buf |= HW_CFG_LRST_;
2383 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2384
2385 timeout = jiffies + HZ;
2386 do {
2387 mdelay(1);
2388 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2389 if (time_after(jiffies, timeout)) {
2390 netdev_warn(dev->net,
2391 "timeout on completion of LiteReset");
2392 return -EIO;
2393 }
2394 } while (buf & HW_CFG_LRST_);
2395
2396 lan78xx_init_mac_address(dev);
2397
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002398 /* save DEVID for later usage */
2399 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002400 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2401 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002402
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002403 /* Respond to the IN token with a NAK */
2404 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2405 buf |= USB_CFG_BIR_;
2406 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2407
2408 /* Init LTM */
2409 lan78xx_init_ltm(dev);
2410
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002411 if (dev->udev->speed == USB_SPEED_SUPER) {
2412 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2413 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2414 dev->rx_qlen = 4;
2415 dev->tx_qlen = 4;
2416 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2417 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2418 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2419 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2420 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2421 } else {
2422 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2423 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2424 dev->rx_qlen = 4;
Yuiko Oshinoa5b13792018-01-15 13:24:28 -05002425 dev->tx_qlen = 4;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002426 }
2427
2428 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2429 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2430
2431 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2432 buf |= HW_CFG_MEF_;
2433 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2434
2435 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2436 buf |= USB_CFG_BCE_;
2437 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2438
2439 /* set FIFO sizes */
2440 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2441 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2442
2443 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2444 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2445
2446 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2447 ret = lan78xx_write_reg(dev, FLOW, 0);
2448 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2449
2450 /* Don't need rfe_ctl_lock during initialisation */
2451 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2452 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2453 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2454
2455 /* Enable or disable checksum offload engines */
2456 lan78xx_set_features(dev->net, dev->net->features);
2457
2458 lan78xx_set_multicast(dev->net);
2459
2460 /* reset PHY */
2461 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2462 buf |= PMT_CTL_PHY_RST_;
2463 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2464
2465 timeout = jiffies + HZ;
2466 do {
2467 mdelay(1);
2468 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2469 if (time_after(jiffies, timeout)) {
2470 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2471 return -EIO;
2472 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002473 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002474
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002475 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002476 /* LAN7801 only has RGMII mode */
2477 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2478 buf &= ~MAC_CR_GMII_EN_;
Raghuram Chary Je69647a2018-03-23 15:48:08 +05302479
2480 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
2481 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
2482 if (!ret && sig != EEPROM_INDICATOR) {
2483 /* Implies there is no external eeprom. Set mac speed */
2484 netdev_info(dev->net, "No External EEPROM. Setting MAC Speed\n");
2485 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
2486 }
2487 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002488 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2489
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002490 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2491 buf |= MAC_TX_TXEN_;
2492 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2493
2494 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2495 buf |= FCT_TX_CTL_EN_;
2496 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2497
2498 ret = lan78xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
2499
2500 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2501 buf |= MAC_RX_RXEN_;
2502 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2503
2504 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2505 buf |= FCT_RX_CTL_EN_;
2506 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2507
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002508 return 0;
2509}
2510
Woojung Huh20ff5562016-03-16 22:10:40 +00002511static void lan78xx_init_stats(struct lan78xx_net *dev)
2512{
2513 u32 *p;
2514 int i;
2515
2516 /* initialize for stats update
2517 * some counters are 20bits and some are 32bits
2518 */
2519 p = (u32 *)&dev->stats.rollover_max;
2520 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2521 p[i] = 0xFFFFF;
2522
2523 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2524 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2525 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2526 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2527 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2528 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2529 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2530 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2531 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2532 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2533
Phil Elwellfed56072018-04-11 12:02:47 +01002534 set_bit(EVENT_STAT_UPDATE, &dev->flags);
Woojung Huh20ff5562016-03-16 22:10:40 +00002535}
2536
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002537static int lan78xx_open(struct net_device *net)
2538{
2539 struct lan78xx_net *dev = netdev_priv(net);
2540 int ret;
2541
2542 ret = usb_autopm_get_interface(dev->intf);
2543 if (ret < 0)
2544 goto out;
2545
Alexander Graf92571a12018-04-04 00:19:35 +02002546 phy_start(net->phydev);
2547
2548 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002549
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002550 /* for Link Check */
2551 if (dev->urb_intr) {
2552 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2553 if (ret < 0) {
2554 netif_err(dev, ifup, dev->net,
2555 "intr submit %d\n", ret);
2556 goto done;
2557 }
2558 }
2559
Woojung Huh20ff5562016-03-16 22:10:40 +00002560 lan78xx_init_stats(dev);
2561
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002562 set_bit(EVENT_DEV_OPEN, &dev->flags);
2563
2564 netif_start_queue(net);
2565
2566 dev->link_on = false;
2567
2568 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2569done:
2570 usb_autopm_put_interface(dev->intf);
2571
2572out:
2573 return ret;
2574}
2575
2576static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2577{
2578 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2579 DECLARE_WAITQUEUE(wait, current);
2580 int temp;
2581
2582 /* ensure there are no more active urbs */
2583 add_wait_queue(&unlink_wakeup, &wait);
2584 set_current_state(TASK_UNINTERRUPTIBLE);
2585 dev->wait = &unlink_wakeup;
2586 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2587
2588 /* maybe wait for deletions to finish. */
2589 while (!skb_queue_empty(&dev->rxq) &&
2590 !skb_queue_empty(&dev->txq) &&
2591 !skb_queue_empty(&dev->done)) {
2592 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2593 set_current_state(TASK_UNINTERRUPTIBLE);
2594 netif_dbg(dev, ifdown, dev->net,
2595 "waited for %d urb completions\n", temp);
2596 }
2597 set_current_state(TASK_RUNNING);
2598 dev->wait = NULL;
2599 remove_wait_queue(&unlink_wakeup, &wait);
2600}
2601
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002602static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002603{
2604 struct lan78xx_net *dev = netdev_priv(net);
2605
Woojung Huh20ff5562016-03-16 22:10:40 +00002606 if (timer_pending(&dev->stat_monitor))
2607 del_timer_sync(&dev->stat_monitor);
2608
Alexander Graf92571a12018-04-04 00:19:35 +02002609 if (net->phydev)
2610 phy_stop(net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002611
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002612 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2613 netif_stop_queue(net);
2614
2615 netif_info(dev, ifdown, dev->net,
2616 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2617 net->stats.rx_packets, net->stats.tx_packets,
2618 net->stats.rx_errors, net->stats.tx_errors);
2619
2620 lan78xx_terminate_urbs(dev);
2621
2622 usb_kill_urb(dev->urb_intr);
2623
2624 skb_queue_purge(&dev->rxq_pause);
2625
2626 /* deferred work (task, timer, softirq) must also stop.
2627 * can't flush_scheduled_work() until we drop rtnl (later),
2628 * else workers could deadlock; so make workers a NOP.
2629 */
2630 dev->flags = 0;
2631 cancel_delayed_work_sync(&dev->wq);
2632 tasklet_kill(&dev->bh);
2633
2634 usb_autopm_put_interface(dev->intf);
2635
2636 return 0;
2637}
2638
2639static int lan78xx_linearize(struct sk_buff *skb)
2640{
2641 return skb_linearize(skb);
2642}
2643
2644static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2645 struct sk_buff *skb, gfp_t flags)
2646{
2647 u32 tx_cmd_a, tx_cmd_b;
2648
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002649 if (skb_cow_head(skb, TX_OVERHEAD)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002650 dev_kfree_skb_any(skb);
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002651 return NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002652 }
2653
2654 if (lan78xx_linearize(skb) < 0)
2655 return NULL;
2656
2657 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2658
2659 if (skb->ip_summed == CHECKSUM_PARTIAL)
2660 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2661
2662 tx_cmd_b = 0;
2663 if (skb_is_gso(skb)) {
2664 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2665
2666 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2667
2668 tx_cmd_a |= TX_CMD_A_LSO_;
2669 }
2670
2671 if (skb_vlan_tag_present(skb)) {
2672 tx_cmd_a |= TX_CMD_A_IVTG_;
2673 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2674 }
2675
2676 skb_push(skb, 4);
2677 cpu_to_le32s(&tx_cmd_b);
2678 memcpy(skb->data, &tx_cmd_b, 4);
2679
2680 skb_push(skb, 4);
2681 cpu_to_le32s(&tx_cmd_a);
2682 memcpy(skb->data, &tx_cmd_a, 4);
2683
2684 return skb;
2685}
2686
2687static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2688 struct sk_buff_head *list, enum skb_state state)
2689{
2690 unsigned long flags;
2691 enum skb_state old_state;
2692 struct skb_data *entry = (struct skb_data *)skb->cb;
2693
2694 spin_lock_irqsave(&list->lock, flags);
2695 old_state = entry->state;
2696 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002697
2698 __skb_unlink(skb, list);
2699 spin_unlock(&list->lock);
2700 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002701
2702 __skb_queue_tail(&dev->done, skb);
2703 if (skb_queue_len(&dev->done) == 1)
2704 tasklet_schedule(&dev->bh);
2705 spin_unlock_irqrestore(&dev->done.lock, flags);
2706
2707 return old_state;
2708}
2709
2710static void tx_complete(struct urb *urb)
2711{
2712 struct sk_buff *skb = (struct sk_buff *)urb->context;
2713 struct skb_data *entry = (struct skb_data *)skb->cb;
2714 struct lan78xx_net *dev = entry->dev;
2715
2716 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002717 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002718 dev->net->stats.tx_bytes += entry->length;
2719 } else {
2720 dev->net->stats.tx_errors++;
2721
2722 switch (urb->status) {
2723 case -EPIPE:
2724 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2725 break;
2726
2727 /* software-driven interface shutdown */
2728 case -ECONNRESET:
2729 case -ESHUTDOWN:
2730 break;
2731
2732 case -EPROTO:
2733 case -ETIME:
2734 case -EILSEQ:
2735 netif_stop_queue(dev->net);
2736 break;
2737 default:
2738 netif_dbg(dev, tx_err, dev->net,
2739 "tx err %d\n", entry->urb->status);
2740 break;
2741 }
2742 }
2743
2744 usb_autopm_put_interface_async(dev->intf);
2745
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002746 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002747}
2748
2749static void lan78xx_queue_skb(struct sk_buff_head *list,
2750 struct sk_buff *newsk, enum skb_state state)
2751{
2752 struct skb_data *entry = (struct skb_data *)newsk->cb;
2753
2754 __skb_queue_tail(list, newsk);
2755 entry->state = state;
2756}
2757
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002758static netdev_tx_t
2759lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002760{
2761 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002762 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002763
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002764 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002765 skb_tx_timestamp(skb);
2766 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2767 }
2768
2769 if (skb2) {
2770 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002771
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002772 /* throttle TX patch at slower than SUPER SPEED USB */
2773 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2774 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002775 netif_stop_queue(net);
2776 } else {
2777 netif_dbg(dev, tx_err, dev->net,
2778 "lan78xx_tx_prep return NULL\n");
2779 dev->net->stats.tx_errors++;
2780 dev->net->stats.tx_dropped++;
2781 }
2782
2783 tasklet_schedule(&dev->bh);
2784
2785 return NETDEV_TX_OK;
2786}
2787
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002788static int
2789lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002790{
2791 int tmp;
2792 struct usb_host_interface *alt = NULL;
2793 struct usb_host_endpoint *in = NULL, *out = NULL;
2794 struct usb_host_endpoint *status = NULL;
2795
2796 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2797 unsigned ep;
2798
2799 in = NULL;
2800 out = NULL;
2801 status = NULL;
2802 alt = intf->altsetting + tmp;
2803
2804 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2805 struct usb_host_endpoint *e;
2806 int intr = 0;
2807
2808 e = alt->endpoint + ep;
2809 switch (e->desc.bmAttributes) {
2810 case USB_ENDPOINT_XFER_INT:
2811 if (!usb_endpoint_dir_in(&e->desc))
2812 continue;
2813 intr = 1;
2814 /* FALLTHROUGH */
2815 case USB_ENDPOINT_XFER_BULK:
2816 break;
2817 default:
2818 continue;
2819 }
2820 if (usb_endpoint_dir_in(&e->desc)) {
2821 if (!intr && !in)
2822 in = e;
2823 else if (intr && !status)
2824 status = e;
2825 } else {
2826 if (!out)
2827 out = e;
2828 }
2829 }
2830 if (in && out)
2831 break;
2832 }
2833 if (!alt || !in || !out)
2834 return -EINVAL;
2835
2836 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2837 in->desc.bEndpointAddress &
2838 USB_ENDPOINT_NUMBER_MASK);
2839 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2840 out->desc.bEndpointAddress &
2841 USB_ENDPOINT_NUMBER_MASK);
2842 dev->ep_intr = status;
2843
2844 return 0;
2845}
2846
2847static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2848{
2849 struct lan78xx_priv *pdata = NULL;
2850 int ret;
2851 int i;
2852
2853 ret = lan78xx_get_endpoints(dev, intf);
2854
2855 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2856
2857 pdata = (struct lan78xx_priv *)(dev->data[0]);
2858 if (!pdata) {
2859 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2860 return -ENOMEM;
2861 }
2862
2863 pdata->dev = dev;
2864
2865 spin_lock_init(&pdata->rfe_ctl_lock);
2866 mutex_init(&pdata->dataport_mutex);
2867
2868 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2869
2870 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2871 pdata->vlan_table[i] = 0;
2872
2873 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2874
2875 dev->net->features = 0;
2876
2877 if (DEFAULT_TX_CSUM_ENABLE)
2878 dev->net->features |= NETIF_F_HW_CSUM;
2879
2880 if (DEFAULT_RX_CSUM_ENABLE)
2881 dev->net->features |= NETIF_F_RXCSUM;
2882
2883 if (DEFAULT_TSO_CSUM_ENABLE)
2884 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2885
2886 dev->net->hw_features = dev->net->features;
2887
Woojung Huhcc89c322016-11-01 20:02:00 +00002888 ret = lan78xx_setup_irq_domain(dev);
2889 if (ret < 0) {
2890 netdev_warn(dev->net,
2891 "lan78xx_setup_irq_domain() failed : %d", ret);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302892 goto out1;
Woojung Huhcc89c322016-11-01 20:02:00 +00002893 }
2894
Nisar Sayed0573f942017-08-01 10:24:33 +00002895 dev->net->hard_header_len += TX_OVERHEAD;
2896 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2897
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002898 /* Init all registers */
2899 ret = lan78xx_reset(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302900 if (ret) {
2901 netdev_warn(dev->net, "Registers INIT FAILED....");
2902 goto out2;
2903 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002904
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002905 ret = lan78xx_mdio_init(dev);
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302906 if (ret) {
2907 netdev_warn(dev->net, "MDIO INIT FAILED.....");
2908 goto out2;
2909 }
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002910
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002911 dev->net->flags |= IFF_MULTICAST;
2912
2913 pdata->wol = WAKE_MAGIC;
2914
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002915 return ret;
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302916
2917out2:
2918 lan78xx_remove_irq_domain(dev);
2919
2920out1:
2921 netdev_warn(dev->net, "Bind routine FAILED");
2922 cancel_work_sync(&pdata->set_multicast);
2923 cancel_work_sync(&pdata->set_vlan);
2924 kfree(pdata);
2925 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002926}
2927
2928static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
2929{
2930 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2931
Woojung Huhcc89c322016-11-01 20:02:00 +00002932 lan78xx_remove_irq_domain(dev);
2933
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002934 lan78xx_remove_mdio(dev);
2935
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002936 if (pdata) {
Raghuram Chary J2d2d99e2018-03-27 14:51:16 +05302937 cancel_work_sync(&pdata->set_multicast);
2938 cancel_work_sync(&pdata->set_vlan);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002939 netif_dbg(dev, ifdown, dev->net, "free pdata");
2940 kfree(pdata);
2941 pdata = NULL;
2942 dev->data[0] = 0;
2943 }
2944}
2945
2946static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
2947 struct sk_buff *skb,
2948 u32 rx_cmd_a, u32 rx_cmd_b)
2949{
2950 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2951 unlikely(rx_cmd_a & RX_CMD_A_ICSM_)) {
2952 skb->ip_summed = CHECKSUM_NONE;
2953 } else {
2954 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
2955 skb->ip_summed = CHECKSUM_COMPLETE;
2956 }
2957}
2958
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002959static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002960{
2961 int status;
2962
2963 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
2964 skb_queue_tail(&dev->rxq_pause, skb);
2965 return;
2966 }
2967
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002968 dev->net->stats.rx_packets++;
2969 dev->net->stats.rx_bytes += skb->len;
2970
Woojung Huh74d79a22016-04-25 22:22:32 +00002971 skb->protocol = eth_type_trans(skb, dev->net);
2972
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002973 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
2974 skb->len + sizeof(struct ethhdr), skb->protocol);
2975 memset(skb->cb, 0, sizeof(struct skb_data));
2976
2977 if (skb_defer_rx_timestamp(skb))
2978 return;
2979
2980 status = netif_rx(skb);
2981 if (status != NET_RX_SUCCESS)
2982 netif_dbg(dev, rx_err, dev->net,
2983 "netif_rx status %d\n", status);
2984}
2985
2986static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
2987{
2988 if (skb->len < dev->net->hard_header_len)
2989 return 0;
2990
2991 while (skb->len > 0) {
2992 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2993 u16 rx_cmd_c;
2994 struct sk_buff *skb2;
2995 unsigned char *packet;
2996
2997 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
2998 le32_to_cpus(&rx_cmd_a);
2999 skb_pull(skb, sizeof(rx_cmd_a));
3000
3001 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
3002 le32_to_cpus(&rx_cmd_b);
3003 skb_pull(skb, sizeof(rx_cmd_b));
3004
3005 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
3006 le16_to_cpus(&rx_cmd_c);
3007 skb_pull(skb, sizeof(rx_cmd_c));
3008
3009 packet = skb->data;
3010
3011 /* get the packet length */
3012 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
3013 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
3014
3015 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
3016 netif_dbg(dev, rx_err, dev->net,
3017 "Error rx_cmd_a=0x%08x", rx_cmd_a);
3018 } else {
3019 /* last frame in this batch */
3020 if (skb->len == size) {
3021 lan78xx_rx_csum_offload(dev, skb,
3022 rx_cmd_a, rx_cmd_b);
3023
3024 skb_trim(skb, skb->len - 4); /* remove fcs */
3025 skb->truesize = size + sizeof(struct sk_buff);
3026
3027 return 1;
3028 }
3029
3030 skb2 = skb_clone(skb, GFP_ATOMIC);
3031 if (unlikely(!skb2)) {
3032 netdev_warn(dev->net, "Error allocating skb");
3033 return 0;
3034 }
3035
3036 skb2->len = size;
3037 skb2->data = packet;
3038 skb_set_tail_pointer(skb2, size);
3039
3040 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
3041
3042 skb_trim(skb2, skb2->len - 4); /* remove fcs */
3043 skb2->truesize = size + sizeof(struct sk_buff);
3044
3045 lan78xx_skb_return(dev, skb2);
3046 }
3047
3048 skb_pull(skb, size);
3049
3050 /* padding bytes before the next frame starts */
3051 if (skb->len)
3052 skb_pull(skb, align_count);
3053 }
3054
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003055 return 1;
3056}
3057
3058static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3059{
3060 if (!lan78xx_rx(dev, skb)) {
3061 dev->net->stats.rx_errors++;
3062 goto done;
3063 }
3064
3065 if (skb->len) {
3066 lan78xx_skb_return(dev, skb);
3067 return;
3068 }
3069
3070 netif_dbg(dev, rx_err, dev->net, "drop\n");
3071 dev->net->stats.rx_errors++;
3072done:
3073 skb_queue_tail(&dev->done, skb);
3074}
3075
3076static void rx_complete(struct urb *urb);
3077
3078static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3079{
3080 struct sk_buff *skb;
3081 struct skb_data *entry;
3082 unsigned long lockflags;
3083 size_t size = dev->rx_urb_size;
3084 int ret = 0;
3085
3086 skb = netdev_alloc_skb_ip_align(dev->net, size);
3087 if (!skb) {
3088 usb_free_urb(urb);
3089 return -ENOMEM;
3090 }
3091
3092 entry = (struct skb_data *)skb->cb;
3093 entry->urb = urb;
3094 entry->dev = dev;
3095 entry->length = 0;
3096
3097 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3098 skb->data, size, rx_complete, skb);
3099
3100 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3101
3102 if (netif_device_present(dev->net) &&
3103 netif_running(dev->net) &&
3104 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3105 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3106 ret = usb_submit_urb(urb, GFP_ATOMIC);
3107 switch (ret) {
3108 case 0:
3109 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3110 break;
3111 case -EPIPE:
3112 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3113 break;
3114 case -ENODEV:
3115 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3116 netif_device_detach(dev->net);
3117 break;
3118 case -EHOSTUNREACH:
3119 ret = -ENOLINK;
3120 break;
3121 default:
3122 netif_dbg(dev, rx_err, dev->net,
3123 "rx submit, %d\n", ret);
3124 tasklet_schedule(&dev->bh);
3125 }
3126 } else {
3127 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3128 ret = -ENOLINK;
3129 }
3130 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3131 if (ret) {
3132 dev_kfree_skb_any(skb);
3133 usb_free_urb(urb);
3134 }
3135 return ret;
3136}
3137
3138static void rx_complete(struct urb *urb)
3139{
3140 struct sk_buff *skb = (struct sk_buff *)urb->context;
3141 struct skb_data *entry = (struct skb_data *)skb->cb;
3142 struct lan78xx_net *dev = entry->dev;
3143 int urb_status = urb->status;
3144 enum skb_state state;
3145
3146 skb_put(skb, urb->actual_length);
3147 state = rx_done;
3148 entry->urb = NULL;
3149
3150 switch (urb_status) {
3151 case 0:
3152 if (skb->len < dev->net->hard_header_len) {
3153 state = rx_cleanup;
3154 dev->net->stats.rx_errors++;
3155 dev->net->stats.rx_length_errors++;
3156 netif_dbg(dev, rx_err, dev->net,
3157 "rx length %d\n", skb->len);
3158 }
3159 usb_mark_last_busy(dev->udev);
3160 break;
3161 case -EPIPE:
3162 dev->net->stats.rx_errors++;
3163 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3164 /* FALLTHROUGH */
3165 case -ECONNRESET: /* async unlink */
3166 case -ESHUTDOWN: /* hardware gone */
3167 netif_dbg(dev, ifdown, dev->net,
3168 "rx shutdown, code %d\n", urb_status);
3169 state = rx_cleanup;
3170 entry->urb = urb;
3171 urb = NULL;
3172 break;
3173 case -EPROTO:
3174 case -ETIME:
3175 case -EILSEQ:
3176 dev->net->stats.rx_errors++;
3177 state = rx_cleanup;
3178 entry->urb = urb;
3179 urb = NULL;
3180 break;
3181
3182 /* data overrun ... flush fifo? */
3183 case -EOVERFLOW:
3184 dev->net->stats.rx_over_errors++;
3185 /* FALLTHROUGH */
3186
3187 default:
3188 state = rx_cleanup;
3189 dev->net->stats.rx_errors++;
3190 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3191 break;
3192 }
3193
3194 state = defer_bh(dev, skb, &dev->rxq, state);
3195
3196 if (urb) {
3197 if (netif_running(dev->net) &&
3198 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3199 state != unlink_start) {
3200 rx_submit(dev, urb, GFP_ATOMIC);
3201 return;
3202 }
3203 usb_free_urb(urb);
3204 }
3205 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3206}
3207
3208static void lan78xx_tx_bh(struct lan78xx_net *dev)
3209{
3210 int length;
3211 struct urb *urb = NULL;
3212 struct skb_data *entry;
3213 unsigned long flags;
3214 struct sk_buff_head *tqp = &dev->txq_pend;
3215 struct sk_buff *skb, *skb2;
3216 int ret;
3217 int count, pos;
3218 int skb_totallen, pkt_cnt;
3219
3220 skb_totallen = 0;
3221 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00003222 count = 0;
3223 length = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003224 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
3225 if (skb_is_gso(skb)) {
3226 if (pkt_cnt) {
3227 /* handle previous packets first */
3228 break;
3229 }
Woojung Huh74d79a22016-04-25 22:22:32 +00003230 count = 1;
3231 length = skb->len - TX_OVERHEAD;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003232 skb2 = skb_dequeue(tqp);
3233 goto gso_skb;
3234 }
3235
3236 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3237 break;
3238 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3239 pkt_cnt++;
3240 }
3241
3242 /* copy to a single skb */
3243 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3244 if (!skb)
3245 goto drop;
3246
3247 skb_put(skb, skb_totallen);
3248
3249 for (count = pos = 0; count < pkt_cnt; count++) {
3250 skb2 = skb_dequeue(tqp);
3251 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00003252 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003253 memcpy(skb->data + pos, skb2->data, skb2->len);
3254 pos += roundup(skb2->len, sizeof(u32));
3255 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003256 }
3257 }
3258
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003259gso_skb:
3260 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003261 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003262 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003263
3264 entry = (struct skb_data *)skb->cb;
3265 entry->urb = urb;
3266 entry->dev = dev;
3267 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003268 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003269
3270 spin_lock_irqsave(&dev->txq.lock, flags);
3271 ret = usb_autopm_get_interface_async(dev->intf);
3272 if (ret < 0) {
3273 spin_unlock_irqrestore(&dev->txq.lock, flags);
3274 goto drop;
3275 }
3276
3277 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3278 skb->data, skb->len, tx_complete, skb);
3279
3280 if (length % dev->maxpacket == 0) {
3281 /* send USB_ZERO_PACKET */
3282 urb->transfer_flags |= URB_ZERO_PACKET;
3283 }
3284
3285#ifdef CONFIG_PM
3286 /* if this triggers the device is still a sleep */
3287 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3288 /* transmission will be done in resume */
3289 usb_anchor_urb(urb, &dev->deferred);
3290 /* no use to process more packets */
3291 netif_stop_queue(dev->net);
3292 usb_put_urb(urb);
3293 spin_unlock_irqrestore(&dev->txq.lock, flags);
3294 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3295 return;
3296 }
3297#endif
3298
3299 ret = usb_submit_urb(urb, GFP_ATOMIC);
3300 switch (ret) {
3301 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003302 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003303 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3304 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3305 netif_stop_queue(dev->net);
3306 break;
3307 case -EPIPE:
3308 netif_stop_queue(dev->net);
3309 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3310 usb_autopm_put_interface_async(dev->intf);
3311 break;
3312 default:
3313 usb_autopm_put_interface_async(dev->intf);
3314 netif_dbg(dev, tx_err, dev->net,
3315 "tx: submit urb err %d\n", ret);
3316 break;
3317 }
3318
3319 spin_unlock_irqrestore(&dev->txq.lock, flags);
3320
3321 if (ret) {
3322 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3323drop:
3324 dev->net->stats.tx_dropped++;
3325 if (skb)
3326 dev_kfree_skb_any(skb);
3327 usb_free_urb(urb);
3328 } else
3329 netif_dbg(dev, tx_queued, dev->net,
3330 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3331}
3332
3333static void lan78xx_rx_bh(struct lan78xx_net *dev)
3334{
3335 struct urb *urb;
3336 int i;
3337
3338 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3339 for (i = 0; i < 10; i++) {
3340 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3341 break;
3342 urb = usb_alloc_urb(0, GFP_ATOMIC);
3343 if (urb)
3344 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3345 return;
3346 }
3347
3348 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3349 tasklet_schedule(&dev->bh);
3350 }
3351 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3352 netif_wake_queue(dev->net);
3353}
3354
3355static void lan78xx_bh(unsigned long param)
3356{
3357 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3358 struct sk_buff *skb;
3359 struct skb_data *entry;
3360
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003361 while ((skb = skb_dequeue(&dev->done))) {
3362 entry = (struct skb_data *)(skb->cb);
3363 switch (entry->state) {
3364 case rx_done:
3365 entry->state = rx_cleanup;
3366 rx_process(dev, skb);
3367 continue;
3368 case tx_done:
3369 usb_free_urb(entry->urb);
3370 dev_kfree_skb(skb);
3371 continue;
3372 case rx_cleanup:
3373 usb_free_urb(entry->urb);
3374 dev_kfree_skb(skb);
3375 continue;
3376 default:
3377 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3378 return;
3379 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003380 }
3381
3382 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003383 /* reset update timer delta */
3384 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3385 dev->delta = 1;
3386 mod_timer(&dev->stat_monitor,
3387 jiffies + STAT_UPDATE_TIMER);
3388 }
3389
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003390 if (!skb_queue_empty(&dev->txq_pend))
3391 lan78xx_tx_bh(dev);
3392
3393 if (!timer_pending(&dev->delay) &&
3394 !test_bit(EVENT_RX_HALT, &dev->flags))
3395 lan78xx_rx_bh(dev);
3396 }
3397}
3398
3399static void lan78xx_delayedwork(struct work_struct *work)
3400{
3401 int status;
3402 struct lan78xx_net *dev;
3403
3404 dev = container_of(work, struct lan78xx_net, wq.work);
3405
3406 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3407 unlink_urbs(dev, &dev->txq);
3408 status = usb_autopm_get_interface(dev->intf);
3409 if (status < 0)
3410 goto fail_pipe;
3411 status = usb_clear_halt(dev->udev, dev->pipe_out);
3412 usb_autopm_put_interface(dev->intf);
3413 if (status < 0 &&
3414 status != -EPIPE &&
3415 status != -ESHUTDOWN) {
3416 if (netif_msg_tx_err(dev))
3417fail_pipe:
3418 netdev_err(dev->net,
3419 "can't clear tx halt, status %d\n",
3420 status);
3421 } else {
3422 clear_bit(EVENT_TX_HALT, &dev->flags);
3423 if (status != -ESHUTDOWN)
3424 netif_wake_queue(dev->net);
3425 }
3426 }
3427 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3428 unlink_urbs(dev, &dev->rxq);
3429 status = usb_autopm_get_interface(dev->intf);
3430 if (status < 0)
3431 goto fail_halt;
3432 status = usb_clear_halt(dev->udev, dev->pipe_in);
3433 usb_autopm_put_interface(dev->intf);
3434 if (status < 0 &&
3435 status != -EPIPE &&
3436 status != -ESHUTDOWN) {
3437 if (netif_msg_rx_err(dev))
3438fail_halt:
3439 netdev_err(dev->net,
3440 "can't clear rx halt, status %d\n",
3441 status);
3442 } else {
3443 clear_bit(EVENT_RX_HALT, &dev->flags);
3444 tasklet_schedule(&dev->bh);
3445 }
3446 }
3447
3448 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3449 int ret = 0;
3450
3451 clear_bit(EVENT_LINK_RESET, &dev->flags);
3452 status = usb_autopm_get_interface(dev->intf);
3453 if (status < 0)
3454 goto skip_reset;
3455 if (lan78xx_link_reset(dev) < 0) {
3456 usb_autopm_put_interface(dev->intf);
3457skip_reset:
3458 netdev_info(dev->net, "link reset failed (%d)\n",
3459 ret);
3460 } else {
3461 usb_autopm_put_interface(dev->intf);
3462 }
3463 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003464
3465 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3466 lan78xx_update_stats(dev);
3467
3468 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3469
3470 mod_timer(&dev->stat_monitor,
3471 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3472
3473 dev->delta = min((dev->delta * 2), 50);
3474 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003475}
3476
3477static void intr_complete(struct urb *urb)
3478{
3479 struct lan78xx_net *dev = urb->context;
3480 int status = urb->status;
3481
3482 switch (status) {
3483 /* success */
3484 case 0:
3485 lan78xx_status(dev, urb);
3486 break;
3487
3488 /* software-driven interface shutdown */
3489 case -ENOENT: /* urb killed */
3490 case -ESHUTDOWN: /* hardware gone */
3491 netif_dbg(dev, ifdown, dev->net,
3492 "intr shutdown, code %d\n", status);
3493 return;
3494
3495 /* NOTE: not throttling like RX/TX, since this endpoint
3496 * already polls infrequently
3497 */
3498 default:
3499 netdev_dbg(dev->net, "intr status %d\n", status);
3500 break;
3501 }
3502
3503 if (!netif_running(dev->net))
3504 return;
3505
3506 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3507 status = usb_submit_urb(urb, GFP_ATOMIC);
3508 if (status != 0)
3509 netif_err(dev, timer, dev->net,
3510 "intr resubmit --> %d\n", status);
3511}
3512
3513static void lan78xx_disconnect(struct usb_interface *intf)
3514{
3515 struct lan78xx_net *dev;
3516 struct usb_device *udev;
3517 struct net_device *net;
3518
3519 dev = usb_get_intfdata(intf);
3520 usb_set_intfdata(intf, NULL);
3521 if (!dev)
3522 return;
3523
3524 udev = interface_to_usbdev(intf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003525 net = dev->net;
Alexander Graf92571a12018-04-04 00:19:35 +02003526
3527 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
3528 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
3529
3530 phy_disconnect(net->phydev);
3531
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003532 unregister_netdev(net);
3533
3534 cancel_delayed_work_sync(&dev->wq);
3535
3536 usb_scuttle_anchored_urbs(&dev->deferred);
3537
3538 lan78xx_unbind(dev, intf);
3539
3540 usb_kill_urb(dev->urb_intr);
3541 usb_free_urb(dev->urb_intr);
3542
3543 free_netdev(net);
3544 usb_put_dev(udev);
3545}
3546
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003547static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003548{
3549 struct lan78xx_net *dev = netdev_priv(net);
3550
3551 unlink_urbs(dev, &dev->txq);
3552 tasklet_schedule(&dev->bh);
3553}
3554
3555static const struct net_device_ops lan78xx_netdev_ops = {
3556 .ndo_open = lan78xx_open,
3557 .ndo_stop = lan78xx_stop,
3558 .ndo_start_xmit = lan78xx_start_xmit,
3559 .ndo_tx_timeout = lan78xx_tx_timeout,
3560 .ndo_change_mtu = lan78xx_change_mtu,
3561 .ndo_set_mac_address = lan78xx_set_mac_addr,
3562 .ndo_validate_addr = eth_validate_addr,
3563 .ndo_do_ioctl = lan78xx_ioctl,
3564 .ndo_set_rx_mode = lan78xx_set_multicast,
3565 .ndo_set_features = lan78xx_set_features,
3566 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3567 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3568};
3569
Kees Cookd28bb962017-10-16 17:29:32 -07003570static void lan78xx_stat_monitor(struct timer_list *t)
Woojung Huh20ff5562016-03-16 22:10:40 +00003571{
Kees Cookd28bb962017-10-16 17:29:32 -07003572 struct lan78xx_net *dev = from_timer(dev, t, stat_monitor);
Woojung Huh20ff5562016-03-16 22:10:40 +00003573
3574 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3575}
3576
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003577static int lan78xx_probe(struct usb_interface *intf,
3578 const struct usb_device_id *id)
3579{
3580 struct lan78xx_net *dev;
3581 struct net_device *netdev;
3582 struct usb_device *udev;
3583 int ret;
3584 unsigned maxp;
3585 unsigned period;
3586 u8 *buf = NULL;
3587
3588 udev = interface_to_usbdev(intf);
3589 udev = usb_get_dev(udev);
3590
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003591 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3592 if (!netdev) {
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003593 dev_err(&intf->dev, "Error: OOM\n");
3594 ret = -ENOMEM;
3595 goto out1;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003596 }
3597
3598 /* netdev_printk() needs this */
3599 SET_NETDEV_DEV(netdev, &intf->dev);
3600
3601 dev = netdev_priv(netdev);
3602 dev->udev = udev;
3603 dev->intf = intf;
3604 dev->net = netdev;
3605 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3606 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3607
3608 skb_queue_head_init(&dev->rxq);
3609 skb_queue_head_init(&dev->txq);
3610 skb_queue_head_init(&dev->done);
3611 skb_queue_head_init(&dev->rxq_pause);
3612 skb_queue_head_init(&dev->txq_pend);
3613 mutex_init(&dev->phy_mutex);
3614
3615 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3616 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3617 init_usb_anchor(&dev->deferred);
3618
3619 netdev->netdev_ops = &lan78xx_netdev_ops;
3620 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3621 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3622
Woojung Huh20ff5562016-03-16 22:10:40 +00003623 dev->delta = 1;
Kees Cookd28bb962017-10-16 17:29:32 -07003624 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0);
Woojung Huh20ff5562016-03-16 22:10:40 +00003625
3626 mutex_init(&dev->stats.access_lock);
3627
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003628 ret = lan78xx_bind(dev, intf);
3629 if (ret < 0)
3630 goto out2;
3631 strcpy(netdev->name, "eth%d");
3632
3633 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3634 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3635
Jarod Wilsonf77f0ae2016-10-20 13:55:17 -04003636 /* MTU range: 68 - 9000 */
3637 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3638
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003639 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3640 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3641 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3642
3643 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3644 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3645
3646 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3647 dev->ep_intr->desc.bEndpointAddress &
3648 USB_ENDPOINT_NUMBER_MASK);
3649 period = dev->ep_intr->desc.bInterval;
3650
3651 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3652 buf = kmalloc(maxp, GFP_KERNEL);
3653 if (buf) {
3654 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3655 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003656 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003657 kfree(buf);
3658 goto out3;
3659 } else {
3660 usb_fill_int_urb(dev->urb_intr, dev->udev,
3661 dev->pipe_intr, buf, maxp,
3662 intr_complete, dev, period);
3663 }
3664 }
3665
3666 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3667
3668 /* driver requires remote-wakeup capability during autosuspend. */
3669 intf->needs_remote_wakeup = 1;
3670
3671 ret = register_netdev(netdev);
3672 if (ret != 0) {
3673 netif_err(dev, probe, netdev, "couldn't register the device\n");
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003674 goto out3;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003675 }
3676
3677 usb_set_intfdata(intf, dev);
3678
3679 ret = device_set_wakeup_enable(&udev->dev, true);
3680
3681 /* Default delay of 2sec has more overhead than advantage.
3682 * Set to 10sec as default.
3683 */
3684 pm_runtime_set_autosuspend_delay(&udev->dev,
3685 DEFAULT_AUTOSUSPEND_DELAY);
3686
Alexander Graf92571a12018-04-04 00:19:35 +02003687 ret = lan78xx_phy_init(dev);
3688 if (ret < 0)
3689 goto out4;
3690
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003691 return 0;
3692
Alexander Graf92571a12018-04-04 00:19:35 +02003693out4:
3694 unregister_netdev(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003695out3:
3696 lan78xx_unbind(dev, intf);
3697out2:
3698 free_netdev(netdev);
3699out1:
3700 usb_put_dev(udev);
3701
3702 return ret;
3703}
3704
3705static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3706{
3707 const u16 crc16poly = 0x8005;
3708 int i;
3709 u16 bit, crc, msb;
3710 u8 data;
3711
3712 crc = 0xFFFF;
3713 for (i = 0; i < len; i++) {
3714 data = *buf++;
3715 for (bit = 0; bit < 8; bit++) {
3716 msb = crc >> 15;
3717 crc <<= 1;
3718
3719 if (msb ^ (u16)(data & 1)) {
3720 crc ^= crc16poly;
3721 crc |= (u16)0x0001U;
3722 }
3723 data >>= 1;
3724 }
3725 }
3726
3727 return crc;
3728}
3729
3730static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3731{
3732 u32 buf;
3733 int ret;
3734 int mask_index;
3735 u16 crc;
3736 u32 temp_wucsr;
3737 u32 temp_pmt_ctl;
3738 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3739 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3740 const u8 arp_type[2] = { 0x08, 0x06 };
3741
3742 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3743 buf &= ~MAC_TX_TXEN_;
3744 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3745 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3746 buf &= ~MAC_RX_RXEN_;
3747 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3748
3749 ret = lan78xx_write_reg(dev, WUCSR, 0);
3750 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3751 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3752
3753 temp_wucsr = 0;
3754
3755 temp_pmt_ctl = 0;
3756 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3757 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3758 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3759
3760 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3761 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3762
3763 mask_index = 0;
3764 if (wol & WAKE_PHY) {
3765 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3766
3767 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3768 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3769 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3770 }
3771 if (wol & WAKE_MAGIC) {
3772 temp_wucsr |= WUCSR_MPEN_;
3773
3774 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3775 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3776 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3777 }
3778 if (wol & WAKE_BCAST) {
3779 temp_wucsr |= WUCSR_BCST_EN_;
3780
3781 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3782 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3783 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3784 }
3785 if (wol & WAKE_MCAST) {
3786 temp_wucsr |= WUCSR_WAKE_EN_;
3787
3788 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3789 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3790 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3791 WUF_CFGX_EN_ |
3792 WUF_CFGX_TYPE_MCAST_ |
3793 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3794 (crc & WUF_CFGX_CRC16_MASK_));
3795
3796 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3797 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3798 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3799 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3800 mask_index++;
3801
3802 /* for IPv6 Multicast */
3803 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3804 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3805 WUF_CFGX_EN_ |
3806 WUF_CFGX_TYPE_MCAST_ |
3807 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3808 (crc & WUF_CFGX_CRC16_MASK_));
3809
3810 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3811 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3812 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3813 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3814 mask_index++;
3815
3816 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3817 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3818 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3819 }
3820 if (wol & WAKE_UCAST) {
3821 temp_wucsr |= WUCSR_PFDA_EN_;
3822
3823 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3824 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3825 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3826 }
3827 if (wol & WAKE_ARP) {
3828 temp_wucsr |= WUCSR_WAKE_EN_;
3829
3830 /* set WUF_CFG & WUF_MASK
3831 * for packettype (offset 12,13) = ARP (0x0806)
3832 */
3833 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3834 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3835 WUF_CFGX_EN_ |
3836 WUF_CFGX_TYPE_ALL_ |
3837 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3838 (crc & WUF_CFGX_CRC16_MASK_));
3839
3840 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3841 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3842 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3843 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3844 mask_index++;
3845
3846 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3847 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3848 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3849 }
3850
3851 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3852
3853 /* when multiple WOL bits are set */
3854 if (hweight_long((unsigned long)wol) > 1) {
3855 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3856 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3857 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3858 }
3859 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3860
3861 /* clear WUPS */
3862 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3863 buf |= PMT_CTL_WUPS_MASK_;
3864 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3865
3866 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3867 buf |= MAC_RX_RXEN_;
3868 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3869
3870 return 0;
3871}
3872
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003873static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003874{
3875 struct lan78xx_net *dev = usb_get_intfdata(intf);
3876 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3877 u32 buf;
3878 int ret;
3879 int event;
3880
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003881 event = message.event;
3882
3883 if (!dev->suspend_count++) {
3884 spin_lock_irq(&dev->txq.lock);
3885 /* don't autosuspend while transmitting */
3886 if ((skb_queue_len(&dev->txq) ||
3887 skb_queue_len(&dev->txq_pend)) &&
3888 PMSG_IS_AUTO(message)) {
3889 spin_unlock_irq(&dev->txq.lock);
3890 ret = -EBUSY;
3891 goto out;
3892 } else {
3893 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
3894 spin_unlock_irq(&dev->txq.lock);
3895 }
3896
3897 /* stop TX & RX */
3898 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3899 buf &= ~MAC_TX_TXEN_;
3900 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3901 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3902 buf &= ~MAC_RX_RXEN_;
3903 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3904
3905 /* empty out the rx and queues */
3906 netif_device_detach(dev->net);
3907 lan78xx_terminate_urbs(dev);
3908 usb_kill_urb(dev->urb_intr);
3909
3910 /* reattach */
3911 netif_device_attach(dev->net);
3912 }
3913
3914 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003915 del_timer(&dev->stat_monitor);
3916
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003917 if (PMSG_IS_AUTO(message)) {
3918 /* auto suspend (selective suspend) */
3919 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3920 buf &= ~MAC_TX_TXEN_;
3921 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3922 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3923 buf &= ~MAC_RX_RXEN_;
3924 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3925
3926 ret = lan78xx_write_reg(dev, WUCSR, 0);
3927 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3928 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3929
3930 /* set goodframe wakeup */
3931 ret = lan78xx_read_reg(dev, WUCSR, &buf);
3932
3933 buf |= WUCSR_RFE_WAKE_EN_;
3934 buf |= WUCSR_STORE_WAKE_;
3935
3936 ret = lan78xx_write_reg(dev, WUCSR, buf);
3937
3938 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3939
3940 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
3941 buf |= PMT_CTL_RES_CLR_WKP_STS_;
3942
3943 buf |= PMT_CTL_PHY_WAKE_EN_;
3944 buf |= PMT_CTL_WOL_EN_;
3945 buf &= ~PMT_CTL_SUS_MODE_MASK_;
3946 buf |= PMT_CTL_SUS_MODE_3_;
3947
3948 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3949
3950 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3951
3952 buf |= PMT_CTL_WUPS_MASK_;
3953
3954 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3955
3956 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3957 buf |= MAC_RX_RXEN_;
3958 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3959 } else {
3960 lan78xx_set_suspend(dev, pdata->wol);
3961 }
3962 }
3963
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00003964 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003965out:
3966 return ret;
3967}
3968
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003969static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003970{
3971 struct lan78xx_net *dev = usb_get_intfdata(intf);
3972 struct sk_buff *skb;
3973 struct urb *res;
3974 int ret;
3975 u32 buf;
3976
Woojung Huh20ff5562016-03-16 22:10:40 +00003977 if (!timer_pending(&dev->stat_monitor)) {
3978 dev->delta = 1;
3979 mod_timer(&dev->stat_monitor,
3980 jiffies + STAT_UPDATE_TIMER);
3981 }
3982
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003983 if (!--dev->suspend_count) {
3984 /* resume interrupt URBs */
3985 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
3986 usb_submit_urb(dev->urb_intr, GFP_NOIO);
3987
3988 spin_lock_irq(&dev->txq.lock);
3989 while ((res = usb_get_from_anchor(&dev->deferred))) {
3990 skb = (struct sk_buff *)res->context;
3991 ret = usb_submit_urb(res, GFP_ATOMIC);
3992 if (ret < 0) {
3993 dev_kfree_skb_any(skb);
3994 usb_free_urb(res);
3995 usb_autopm_put_interface_async(dev->intf);
3996 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02003997 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003998 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3999 }
4000 }
4001
4002 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
4003 spin_unlock_irq(&dev->txq.lock);
4004
4005 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
4006 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
4007 netif_start_queue(dev->net);
4008 tasklet_schedule(&dev->bh);
4009 }
4010 }
4011
4012 ret = lan78xx_write_reg(dev, WUCSR2, 0);
4013 ret = lan78xx_write_reg(dev, WUCSR, 0);
4014 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
4015
4016 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
4017 WUCSR2_ARP_RCD_ |
4018 WUCSR2_IPV6_TCPSYN_RCD_ |
4019 WUCSR2_IPV4_TCPSYN_RCD_);
4020
4021 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
4022 WUCSR_EEE_RX_WAKE_ |
4023 WUCSR_PFDA_FR_ |
4024 WUCSR_RFE_WAKE_FR_ |
4025 WUCSR_WUFR_ |
4026 WUCSR_MPR_ |
4027 WUCSR_BCST_FR_);
4028
4029 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
4030 buf |= MAC_TX_TXEN_;
4031 ret = lan78xx_write_reg(dev, MAC_TX, buf);
4032
4033 return 0;
4034}
4035
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08004036static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004037{
4038 struct lan78xx_net *dev = usb_get_intfdata(intf);
4039
4040 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004041
Alexander Graf92571a12018-04-04 00:19:35 +02004042 phy_start(dev->net->phydev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00004043
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004044 return lan78xx_resume(intf);
4045}
4046
4047static const struct usb_device_id products[] = {
4048 {
4049 /* LAN7800 USB Gigabit Ethernet Device */
4050 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
4051 },
4052 {
4053 /* LAN7850 USB Gigabit Ethernet Device */
4054 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4055 },
Woojung Huh02dc1f32016-12-07 20:26:25 +00004056 {
4057 /* LAN7801 USB Gigabit Ethernet Device */
4058 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4059 },
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004060 {},
4061};
4062MODULE_DEVICE_TABLE(usb, products);
4063
4064static struct usb_driver lan78xx_driver = {
4065 .name = DRIVER_NAME,
4066 .id_table = products,
4067 .probe = lan78xx_probe,
4068 .disconnect = lan78xx_disconnect,
4069 .suspend = lan78xx_suspend,
4070 .resume = lan78xx_resume,
4071 .reset_resume = lan78xx_reset_resume,
4072 .supports_autosuspend = 1,
4073 .disable_hub_initiated_lpm = 1,
4074};
4075
4076module_usb_driver(lan78xx_driver);
4077
4078MODULE_AUTHOR(DRIVER_AUTHOR);
4079MODULE_DESCRIPTION(DRIVER_DESC);
4080MODULE_LICENSE("GPL");