blob: 9abe0c9b1098be7c691d4ca8884463519dd7e041 [file] [log] [blame]
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001/*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Thanks to Ben LaHaise for precious feedback.
Ingo Molnar9f4c8152008-01-30 13:33:41 +01004 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/highmem.h>
Ingo Molnar81922062008-01-30 13:34:04 +01006#include <linux/bootmem.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007#include <linux/module.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01008#include <linux/sched.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01009#include <linux/mm.h>
Thomas Gleixner76ebd052008-02-09 23:24:09 +010010#include <linux/interrupt.h>
Thomas Gleixneree7ae7a2008-04-17 17:40:45 +020011#include <linux/seq_file.h>
12#include <linux/debugfs.h>
Tejun Heoe59a1bb2009-06-22 11:56:24 +090013#include <linux/pfn.h>
Tejun Heo8c4bfc62009-07-04 08:10:59 +090014#include <linux/percpu.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090015#include <linux/gfp.h>
Matthieu Castet5bd5a452010-11-16 22:31:26 +010016#include <linux/pci.h>
Stephen Rothwelld6472302015-06-02 19:01:38 +100017#include <linux/vmalloc.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010018
Thomas Gleixner950f9d92008-01-30 13:34:06 +010019#include <asm/e820.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <asm/processor.h>
21#include <asm/tlbflush.h>
Dave Jonesf8af0952006-01-06 00:12:10 -080022#include <asm/sections.h>
Jeremy Fitzhardinge93dbda72009-02-26 17:35:44 -080023#include <asm/setup.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010024#include <asm/uaccess.h>
25#include <asm/pgalloc.h>
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010026#include <asm/proto.h>
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -070027#include <asm/pat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028
Ingo Molnar9df84992008-02-04 16:48:09 +010029/*
30 * The current flushing context - we pass it instead of 5 arguments:
31 */
Thomas Gleixner72e458d2008-02-04 16:48:07 +010032struct cpa_data {
Shaohua Lid75586a2008-08-21 10:46:06 +080033 unsigned long *vaddr;
Borislav Petkov0fd64c22013-10-31 17:25:00 +010034 pgd_t *pgd;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010035 pgprot_t mask_set;
36 pgprot_t mask_clr;
Thomas Gleixner65e074d2008-02-04 16:48:07 +010037 int numpages;
Shaohua Lid75586a2008-08-21 10:46:06 +080038 int flags;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010039 unsigned long pfn;
Andi Kleenc9caa022008-03-12 03:53:29 +010040 unsigned force_split : 1;
Shaohua Lid75586a2008-08-21 10:46:06 +080041 int curpage;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -070042 struct page **pages;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010043};
44
Suresh Siddhaad5ca552008-09-23 14:00:42 -070045/*
46 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
47 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
48 * entries change the page attribute in parallel to some other cpu
49 * splitting a large page entry along with changing the attribute.
50 */
51static DEFINE_SPINLOCK(cpa_lock);
52
Shaohua Lid75586a2008-08-21 10:46:06 +080053#define CPA_FLUSHTLB 1
54#define CPA_ARRAY 2
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -070055#define CPA_PAGES_ARRAY 4
Shaohua Lid75586a2008-08-21 10:46:06 +080056
Thomas Gleixner65280e62008-05-05 16:35:21 +020057#ifdef CONFIG_PROC_FS
Andi Kleence0c0e52008-05-02 11:46:49 +020058static unsigned long direct_pages_count[PG_LEVEL_NUM];
59
Thomas Gleixner65280e62008-05-05 16:35:21 +020060void update_page_count(int level, unsigned long pages)
Andi Kleence0c0e52008-05-02 11:46:49 +020061{
Andi Kleence0c0e52008-05-02 11:46:49 +020062 /* Protect against CPA */
Andrea Arcangelia79e53d2011-02-16 15:45:22 -080063 spin_lock(&pgd_lock);
Andi Kleence0c0e52008-05-02 11:46:49 +020064 direct_pages_count[level] += pages;
Andrea Arcangelia79e53d2011-02-16 15:45:22 -080065 spin_unlock(&pgd_lock);
Andi Kleence0c0e52008-05-02 11:46:49 +020066}
67
Thomas Gleixner65280e62008-05-05 16:35:21 +020068static void split_page_count(int level)
69{
70 direct_pages_count[level]--;
71 direct_pages_count[level - 1] += PTRS_PER_PTE;
72}
73
Alexey Dobriyane1759c22008-10-15 23:50:22 +040074void arch_report_meminfo(struct seq_file *m)
Thomas Gleixner65280e62008-05-05 16:35:21 +020075{
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000076 seq_printf(m, "DirectMap4k: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010077 direct_pages_count[PG_LEVEL_4K] << 2);
78#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000079 seq_printf(m, "DirectMap2M: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010080 direct_pages_count[PG_LEVEL_2M] << 11);
81#else
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000082 seq_printf(m, "DirectMap4M: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010083 direct_pages_count[PG_LEVEL_2M] << 12);
84#endif
Hugh Dickinsa06de632008-08-15 13:58:32 +010085 if (direct_gbpages)
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000086 seq_printf(m, "DirectMap1G: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010087 direct_pages_count[PG_LEVEL_1G] << 20);
Thomas Gleixner65280e62008-05-05 16:35:21 +020088}
89#else
90static inline void split_page_count(int level) { }
91#endif
92
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010093#ifdef CONFIG_X86_64
94
95static inline unsigned long highmap_start_pfn(void)
96{
Alexander Duyckfc8d7822012-11-16 13:57:13 -080097 return __pa_symbol(_text) >> PAGE_SHIFT;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010098}
99
100static inline unsigned long highmap_end_pfn(void)
101{
Alexander Duyckfc8d7822012-11-16 13:57:13 -0800102 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100103}
104
105#endif
106
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100107#ifdef CONFIG_DEBUG_PAGEALLOC
108# define debug_pagealloc 1
109#else
110# define debug_pagealloc 0
111#endif
112
Arjan van de Vened724be2008-01-30 13:34:04 +0100113static inline int
114within(unsigned long addr, unsigned long start, unsigned long end)
Ingo Molnar687c4822008-01-30 13:34:04 +0100115{
Arjan van de Vened724be2008-01-30 13:34:04 +0100116 return addr >= start && addr < end;
117}
118
119/*
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100120 * Flushing functions
121 */
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100122
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100123/**
124 * clflush_cache_range - flush a cache range with clflush
Wanpeng Li9efc31b2012-06-10 10:50:52 +0800125 * @vaddr: virtual start address
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100126 * @size: number of bytes to flush
127 *
Ross Zwisler8b80fd82014-02-26 12:06:50 -0700128 * clflushopt is an unordered instruction which needs fencing with mfence or
129 * sfence to avoid ordering issues.
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100130 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100131void clflush_cache_range(void *vaddr, unsigned int size)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100132{
Ross Zwisler6c434d62015-05-11 10:15:49 +0200133 unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
134 void *vend = vaddr + size;
135 void *p;
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100136
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100137 mb();
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100138
Ross Zwisler6c434d62015-05-11 10:15:49 +0200139 for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
140 p < vend; p += boot_cpu_data.x86_clflush_size)
141 clflushopt(p);
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100142
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100143 mb();
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100144}
Eric Anholte517a5e2009-09-10 17:48:48 -0700145EXPORT_SYMBOL_GPL(clflush_cache_range);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100146
Thomas Gleixneraf1e6842008-01-30 13:34:08 +0100147static void __cpa_flush_all(void *arg)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100148{
Andi Kleen6bb83832008-02-04 16:48:06 +0100149 unsigned long cache = (unsigned long)arg;
150
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100151 /*
152 * Flush all to work around Errata in early athlons regarding
153 * large page flushing.
154 */
155 __flush_tlb_all();
156
venkatesh.pallipadi@intel.com0b827532009-05-22 13:23:37 -0700157 if (cache && boot_cpu_data.x86 >= 4)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100158 wbinvd();
159}
160
Andi Kleen6bb83832008-02-04 16:48:06 +0100161static void cpa_flush_all(unsigned long cache)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100162{
163 BUG_ON(irqs_disabled());
164
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200165 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100166}
167
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100168static void __cpa_flush_range(void *arg)
169{
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100170 /*
171 * We could optimize that further and do individual per page
172 * tlb invalidates for a low number of pages. Caveat: we must
173 * flush the high aliases on 64bit as well.
174 */
175 __flush_tlb_all();
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100176}
177
Andi Kleen6bb83832008-02-04 16:48:06 +0100178static void cpa_flush_range(unsigned long start, int numpages, int cache)
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100179{
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100180 unsigned int i, level;
181 unsigned long addr;
182
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100183 BUG_ON(irqs_disabled());
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100184 WARN_ON(PAGE_ALIGN(start) != start);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100185
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200186 on_each_cpu(__cpa_flush_range, NULL, 1);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100187
Andi Kleen6bb83832008-02-04 16:48:06 +0100188 if (!cache)
189 return;
190
Thomas Gleixner3b233e52008-01-30 13:34:08 +0100191 /*
192 * We only need to flush on one CPU,
193 * clflush is a MESI-coherent instruction that
194 * will cause all other CPUs to flush the same
195 * cachelines:
196 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100197 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
198 pte_t *pte = lookup_address(addr, &level);
199
200 /*
201 * Only flush present addresses:
202 */
Thomas Gleixner7bfb72e2008-02-04 16:48:08 +0100203 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100204 clflush_cache_range((void *) addr, PAGE_SIZE);
205 }
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100206}
207
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700208static void cpa_flush_array(unsigned long *start, int numpages, int cache,
209 int in_flags, struct page **pages)
Shaohua Lid75586a2008-08-21 10:46:06 +0800210{
211 unsigned int i, level;
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700212 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
Shaohua Lid75586a2008-08-21 10:46:06 +0800213
214 BUG_ON(irqs_disabled());
215
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700216 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
Shaohua Lid75586a2008-08-21 10:46:06 +0800217
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700218 if (!cache || do_wbinvd)
Shaohua Lid75586a2008-08-21 10:46:06 +0800219 return;
220
Shaohua Lid75586a2008-08-21 10:46:06 +0800221 /*
222 * We only need to flush on one CPU,
223 * clflush is a MESI-coherent instruction that
224 * will cause all other CPUs to flush the same
225 * cachelines:
226 */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700227 for (i = 0; i < numpages; i++) {
228 unsigned long addr;
229 pte_t *pte;
230
231 if (in_flags & CPA_PAGES_ARRAY)
232 addr = (unsigned long)page_address(pages[i]);
233 else
234 addr = start[i];
235
236 pte = lookup_address(addr, &level);
Shaohua Lid75586a2008-08-21 10:46:06 +0800237
238 /*
239 * Only flush present addresses:
240 */
241 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700242 clflush_cache_range((void *)addr, PAGE_SIZE);
Shaohua Lid75586a2008-08-21 10:46:06 +0800243 }
244}
245
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100246/*
Arjan van de Vened724be2008-01-30 13:34:04 +0100247 * Certain areas of memory on x86 require very specific protection flags,
248 * for example the BIOS area or kernel text. Callers don't always get this
249 * right (again, ioremap() on BIOS memory is not uncommon) so this function
250 * checks and fixes these known static required protection bits.
251 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100252static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
253 unsigned long pfn)
Arjan van de Vened724be2008-01-30 13:34:04 +0100254{
255 pgprot_t forbidden = __pgprot(0);
256
Ingo Molnar687c4822008-01-30 13:34:04 +0100257 /*
Arjan van de Vened724be2008-01-30 13:34:04 +0100258 * The BIOS area between 640k and 1Mb needs to be executable for
259 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
Ingo Molnar687c4822008-01-30 13:34:04 +0100260 */
Matthieu Castet5bd5a452010-11-16 22:31:26 +0100261#ifdef CONFIG_PCI_BIOS
262 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
Arjan van de Vened724be2008-01-30 13:34:04 +0100263 pgprot_val(forbidden) |= _PAGE_NX;
Matthieu Castet5bd5a452010-11-16 22:31:26 +0100264#endif
Arjan van de Vened724be2008-01-30 13:34:04 +0100265
266 /*
267 * The kernel text needs to be executable for obvious reasons
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100268 * Does not cover __inittext since that is gone later on. On
269 * 64bit we do not enforce !NX on the low mapping
Arjan van de Vened724be2008-01-30 13:34:04 +0100270 */
271 if (within(address, (unsigned long)_text, (unsigned long)_etext))
272 pgprot_val(forbidden) |= _PAGE_NX;
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100273
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100274 /*
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100275 * The .rodata section needs to be read-only. Using the pfn
276 * catches all aliases.
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100277 */
Alexander Duyckfc8d7822012-11-16 13:57:13 -0800278 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
279 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100280 pgprot_val(forbidden) |= _PAGE_RW;
Arjan van de Vened724be2008-01-30 13:34:04 +0100281
Suresh Siddha55ca3cc2009-10-28 18:46:57 -0800282#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
Suresh Siddha74e08172009-10-14 14:46:56 -0700283 /*
Suresh Siddha502f6602009-10-28 18:46:56 -0800284 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
285 * kernel text mappings for the large page aligned text, rodata sections
286 * will be always read-only. For the kernel identity mappings covering
287 * the holes caused by this alignment can be anything that user asks.
Suresh Siddha74e08172009-10-14 14:46:56 -0700288 *
289 * This will preserve the large page mappings for kernel text/data
290 * at no extra cost.
291 */
Suresh Siddha502f6602009-10-28 18:46:56 -0800292 if (kernel_set_to_readonly &&
293 within(address, (unsigned long)_text,
Suresh Siddha281ff332010-02-18 11:51:40 -0800294 (unsigned long)__end_rodata_hpage_align)) {
295 unsigned int level;
296
297 /*
298 * Don't enforce the !RW mapping for the kernel text mapping,
299 * if the current mapping is already using small page mapping.
300 * No need to work hard to preserve large page mappings in this
301 * case.
302 *
303 * This also fixes the Linux Xen paravirt guest boot failure
304 * (because of unexpected read-only mappings for kernel identity
305 * mappings). In this paravirt guest case, the kernel text
306 * mapping and the kernel identity mapping share the same
307 * page-table pages. Thus we can't really use different
308 * protections for the kernel text and identity mappings. Also,
309 * these shared mappings are made of small page mappings.
310 * Thus this don't enforce !RW mapping for small page kernel
311 * text mapping logic will help Linux Xen parvirt guest boot
Lucas De Marchi0d2eb442011-03-17 16:24:16 -0300312 * as well.
Suresh Siddha281ff332010-02-18 11:51:40 -0800313 */
314 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
315 pgprot_val(forbidden) |= _PAGE_RW;
316 }
Suresh Siddha74e08172009-10-14 14:46:56 -0700317#endif
318
Arjan van de Vened724be2008-01-30 13:34:04 +0100319 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
Ingo Molnar687c4822008-01-30 13:34:04 +0100320
321 return prot;
322}
323
Matt Fleming426e34c2013-12-06 21:13:04 +0000324/*
325 * Lookup the page table entry for a virtual address in a specific pgd.
326 * Return a pointer to the entry and the level of the mapping.
327 */
328pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
329 unsigned int *level)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100330{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 pud_t *pud;
332 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100333
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100334 *level = PG_LEVEL_NONE;
335
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336 if (pgd_none(*pgd))
337 return NULL;
Ingo Molnar9df84992008-02-04 16:48:09 +0100338
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339 pud = pud_offset(pgd, address);
340 if (pud_none(*pud))
341 return NULL;
Andi Kleenc2f71ee2008-02-04 16:48:09 +0100342
343 *level = PG_LEVEL_1G;
344 if (pud_large(*pud) || !pud_present(*pud))
345 return (pte_t *)pud;
346
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 pmd = pmd_offset(pud, address);
348 if (pmd_none(*pmd))
349 return NULL;
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100350
351 *level = PG_LEVEL_2M;
Thomas Gleixner9a14aef2008-02-04 16:48:07 +0100352 if (pmd_large(*pmd) || !pmd_present(*pmd))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353 return (pte_t *)pmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100355 *level = PG_LEVEL_4K;
Ingo Molnar9df84992008-02-04 16:48:09 +0100356
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100357 return pte_offset_kernel(pmd, address);
358}
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100359
360/*
361 * Lookup the page table entry for a virtual address. Return a pointer
362 * to the entry and the level of the mapping.
363 *
364 * Note: We return pud and pmd either when the entry is marked large
365 * or when the present bit is not set. Otherwise we would return a
366 * pointer to a nonexisting mapping.
367 */
368pte_t *lookup_address(unsigned long address, unsigned int *level)
369{
Matt Fleming426e34c2013-12-06 21:13:04 +0000370 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100371}
Pekka Paalanen75bb8832008-05-12 21:20:56 +0200372EXPORT_SYMBOL_GPL(lookup_address);
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100373
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100374static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
375 unsigned int *level)
376{
377 if (cpa->pgd)
Matt Fleming426e34c2013-12-06 21:13:04 +0000378 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
Borislav Petkov0fd64c22013-10-31 17:25:00 +0100379 address, level);
380
381 return lookup_address(address, level);
382}
383
Ingo Molnar9df84992008-02-04 16:48:09 +0100384/*
Juergen Gross792230c2014-11-28 11:53:56 +0100385 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
386 * or NULL if not present.
387 */
388pmd_t *lookup_pmd_address(unsigned long address)
389{
390 pgd_t *pgd;
391 pud_t *pud;
392
393 pgd = pgd_offset_k(address);
394 if (pgd_none(*pgd))
395 return NULL;
396
397 pud = pud_offset(pgd, address);
398 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
399 return NULL;
400
401 return pmd_offset(pud, address);
402}
403
404/*
Dave Hansend7656532013-01-22 13:24:33 -0800405 * This is necessary because __pa() does not work on some
406 * kinds of memory, like vmalloc() or the alloc_remap()
407 * areas on 32-bit NUMA systems. The percpu areas can
408 * end up in this kind of memory, for instance.
409 *
410 * This could be optimized, but it is only intended to be
411 * used at inititalization time, and keeping it
412 * unoptimized should increase the testing coverage for
413 * the more obscure platforms.
414 */
415phys_addr_t slow_virt_to_phys(void *__virt_addr)
416{
417 unsigned long virt_addr = (unsigned long)__virt_addr;
418 phys_addr_t phys_addr;
419 unsigned long offset;
420 enum pg_level level;
Dave Hansend7656532013-01-22 13:24:33 -0800421 unsigned long pmask;
422 pte_t *pte;
423
424 pte = lookup_address(virt_addr, &level);
425 BUG_ON(!pte);
Dave Hansend7656532013-01-22 13:24:33 -0800426 pmask = page_level_mask(level);
427 offset = virt_addr & ~pmask;
Dexuan Cuid1cd1212014-10-29 03:53:37 -0700428 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
Dave Hansend7656532013-01-22 13:24:33 -0800429 return (phys_addr | offset);
430}
431EXPORT_SYMBOL_GPL(slow_virt_to_phys);
432
433/*
Ingo Molnar9df84992008-02-04 16:48:09 +0100434 * Set the new pmd in all the pgds we know about:
435 */
Ingo Molnar9a3dc782008-01-30 13:33:57 +0100436static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100437{
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100438 /* change init_mm */
439 set_pte_atomic(kpte, pte);
Ingo Molnar44af6c42008-01-30 13:34:03 +0100440#ifdef CONFIG_X86_32
Ingo Molnare4b71dc2008-01-30 13:34:04 +0100441 if (!SHARED_KERNEL_PMD) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100442 struct page *page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443
Jeremy Fitzhardingee3ed9102008-01-30 13:34:11 +0100444 list_for_each_entry(page, &pgd_list, lru) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100445 pgd_t *pgd;
446 pud_t *pud;
447 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100448
Ingo Molnar44af6c42008-01-30 13:34:03 +0100449 pgd = (pgd_t *)page_address(page) + pgd_index(address);
450 pud = pud_offset(pgd, address);
451 pmd = pmd_offset(pud, address);
452 set_pte_atomic((pte_t *)pmd, pte);
453 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454 }
Ingo Molnar44af6c42008-01-30 13:34:03 +0100455#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456}
457
Ingo Molnar9df84992008-02-04 16:48:09 +0100458static int
459try_preserve_large_page(pte_t *kpte, unsigned long address,
460 struct cpa_data *cpa)
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100461{
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800462 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100463 pte_t new_pte, old_pte, *tmp;
matthieu castet64edc8e2010-11-16 22:30:27 +0100464 pgprot_t old_prot, new_prot, req_prot;
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100465 int i, do_split = 1;
Dave Hansenf3c4fbb2013-01-22 13:24:32 -0800466 enum pg_level level;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100467
Andi Kleenc9caa022008-03-12 03:53:29 +0100468 if (cpa->force_split)
469 return 1;
470
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800471 spin_lock(&pgd_lock);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100472 /*
473 * Check for races, another CPU might have split this page
474 * up already:
475 */
Borislav Petkov82f07122013-10-31 17:25:07 +0100476 tmp = _lookup_address_cpa(cpa, address, &level);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100477 if (tmp != kpte)
478 goto out_unlock;
479
480 switch (level) {
481 case PG_LEVEL_2M:
Andi Kleenf07333f2008-02-04 16:48:09 +0100482#ifdef CONFIG_X86_64
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100483 case PG_LEVEL_1G:
Andi Kleenf07333f2008-02-04 16:48:09 +0100484#endif
Dave Hansenf3c4fbb2013-01-22 13:24:32 -0800485 psize = page_level_size(level);
486 pmask = page_level_mask(level);
487 break;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100488 default:
Ingo Molnarbeaff632008-02-04 16:48:09 +0100489 do_split = -EINVAL;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100490 goto out_unlock;
491 }
492
493 /*
494 * Calculate the number of pages, which fit into this large
495 * page starting at address:
496 */
497 nextpage_addr = (address + psize) & pmask;
498 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100499 if (numpages < cpa->numpages)
500 cpa->numpages = numpages;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100501
502 /*
503 * We are safe now. Check whether the new pgprot is the same:
Juergen Grossf5b28312014-11-03 14:02:02 +0100504 * Convert protection attributes to 4k-format, as cpa->mask* are set
505 * up accordingly.
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100506 */
507 old_pte = *kpte;
Juergen Grossf5b28312014-11-03 14:02:02 +0100508 old_prot = req_prot = pgprot_large_2_4k(pte_pgprot(old_pte));
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100509
matthieu castet64edc8e2010-11-16 22:30:27 +0100510 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
511 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100512
513 /*
Juergen Grossf5b28312014-11-03 14:02:02 +0100514 * req_prot is in format of 4k pages. It must be converted to large
515 * page format: the caching mode includes the PAT bit located at
516 * different bit positions in the two formats.
517 */
518 req_prot = pgprot_4k_2_large(req_prot);
519
520 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800521 * Set the PSE and GLOBAL flags only if the PRESENT flag is
522 * set otherwise pmd_present/pmd_huge will return true even on
523 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
524 * for the ancient hardware that doesn't support it.
525 */
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200526 if (pgprot_val(req_prot) & _PAGE_PRESENT)
527 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800528 else
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200529 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800530
Andrea Arcangelif76cfa32013-04-10 15:28:25 +0200531 req_prot = canon_pgprot(req_prot);
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800532
533 /*
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100534 * old_pte points to the large page base address. So we need
535 * to add the offset of the virtual address:
536 */
537 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
538 cpa->pfn = pfn;
539
matthieu castet64edc8e2010-11-16 22:30:27 +0100540 new_prot = static_protections(req_prot, address, pfn);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100541
542 /*
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100543 * We need to check the full range, whether
544 * static_protection() requires a different pgprot for one of
545 * the pages in the range we try to preserve:
546 */
matthieu castet64edc8e2010-11-16 22:30:27 +0100547 addr = address & pmask;
548 pfn = pte_pfn(old_pte);
549 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
550 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100551
552 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
553 goto out_unlock;
554 }
555
556 /*
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100557 * If there are no changes, return. maxpages has been updated
558 * above:
559 */
560 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
Ingo Molnarbeaff632008-02-04 16:48:09 +0100561 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100562 goto out_unlock;
563 }
564
565 /*
566 * We need to change the attributes. Check, whether we can
567 * change the large page in one go. We request a split, when
568 * the address is not aligned and the number of pages is
569 * smaller than the number of pages in the large page. Note
570 * that we limited the number of possible pages already to
571 * the number of pages in the large page.
572 */
matthieu castet64edc8e2010-11-16 22:30:27 +0100573 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100574 /*
575 * The address is aligned and the number of pages
576 * covers the full page.
577 */
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800578 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100579 __set_pmd_pte(kpte, address, new_pte);
Shaohua Lid75586a2008-08-21 10:46:06 +0800580 cpa->flags |= CPA_FLUSHTLB;
Ingo Molnarbeaff632008-02-04 16:48:09 +0100581 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100582 }
583
584out_unlock:
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800585 spin_unlock(&pgd_lock);
Ingo Molnar9df84992008-02-04 16:48:09 +0100586
Ingo Molnarbeaff632008-02-04 16:48:09 +0100587 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100588}
589
Borislav Petkov59528862013-03-21 18:16:57 +0100590static int
Borislav Petkov82f07122013-10-31 17:25:07 +0100591__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
592 struct page *base)
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100593{
Borislav Petkov59528862013-03-21 18:16:57 +0100594 pte_t *pbase = (pte_t *)page_address(base);
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800595 unsigned long pfn, pfninc = 1;
Ingo Molnar86f03989d2008-01-30 13:34:09 +0100596 unsigned int i, level;
Wen Congyangae9aae92013-02-22 16:33:04 -0800597 pte_t *tmp;
Ingo Molnar9df84992008-02-04 16:48:09 +0100598 pgprot_t ref_prot;
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100599
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800600 spin_lock(&pgd_lock);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100601 /*
602 * Check for races, another CPU might have split this page
603 * up for us already:
604 */
Borislav Petkov82f07122013-10-31 17:25:07 +0100605 tmp = _lookup_address_cpa(cpa, address, &level);
Wen Congyangae9aae92013-02-22 16:33:04 -0800606 if (tmp != kpte) {
607 spin_unlock(&pgd_lock);
608 return 1;
609 }
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100610
Jeremy Fitzhardinge6944a9c2008-03-17 16:37:01 -0700611 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
Thomas Gleixner07cf89c2008-02-04 16:48:08 +0100612 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
Juergen Grossf5b28312014-11-03 14:02:02 +0100613
614 /* promote PAT bit to correct position */
615 if (level == PG_LEVEL_2M)
616 ref_prot = pgprot_large_2_4k(ref_prot);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100617
Andi Kleenf07333f2008-02-04 16:48:09 +0100618#ifdef CONFIG_X86_64
619 if (level == PG_LEVEL_1G) {
620 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800621 /*
622 * Set the PSE flags only if the PRESENT flag is set
623 * otherwise pmd_present/pmd_huge will return true
624 * even on a non present pmd.
625 */
626 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
627 pgprot_val(ref_prot) |= _PAGE_PSE;
628 else
629 pgprot_val(ref_prot) &= ~_PAGE_PSE;
Andi Kleenf07333f2008-02-04 16:48:09 +0100630 }
631#endif
632
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100633 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800634 * Set the GLOBAL flags only if the PRESENT flag is set
635 * otherwise pmd/pte_present will return true even on a non
636 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
637 * for the ancient hardware that doesn't support it.
638 */
639 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
640 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
641 else
642 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
643
644 /*
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100645 * Get the target pfn from the original entry:
646 */
647 pfn = pte_pfn(*kpte);
Andi Kleenf07333f2008-02-04 16:48:09 +0100648 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800649 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100650
Sai Praneeth2c66e24d2015-10-16 16:20:27 -0700651 if (virt_addr_valid(address)) {
652 unsigned long pfn = PFN_DOWN(__pa(address));
653
654 if (pfn_range_is_mapped(pfn, pfn + 1))
655 split_page_count(level);
656 }
Yinghai Luf361a452008-07-10 20:38:26 -0700657
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100658 /*
Ingo Molnar07a66d72009-02-20 08:04:13 +0100659 * Install the new, split up pagetable.
Huang, Ying4c881ca2008-01-30 13:34:04 +0100660 *
Ingo Molnar07a66d72009-02-20 08:04:13 +0100661 * We use the standard kernel pagetable protections for the new
662 * pagetable protections, the actual ptes set above control the
663 * primary protection behavior:
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100664 */
Ingo Molnar07a66d72009-02-20 08:04:13 +0100665 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
Ingo Molnar211b3d02009-03-10 22:31:03 +0100666
667 /*
668 * Intel Atom errata AAH41 workaround.
669 *
670 * The real fix should be in hw or in a microcode update, but
671 * we also probabilistically try to reduce the window of having
672 * a large TLB mixed with 4K TLBs while instruction fetches are
673 * going on.
674 */
675 __flush_tlb_all();
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800676 spin_unlock(&pgd_lock);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100677
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100678 return 0;
679}
680
Borislav Petkov82f07122013-10-31 17:25:07 +0100681static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
682 unsigned long address)
Wen Congyangae9aae92013-02-22 16:33:04 -0800683{
Wen Congyangae9aae92013-02-22 16:33:04 -0800684 struct page *base;
685
686 if (!debug_pagealloc)
687 spin_unlock(&cpa_lock);
688 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
689 if (!debug_pagealloc)
690 spin_lock(&cpa_lock);
691 if (!base)
692 return -ENOMEM;
693
Borislav Petkov82f07122013-10-31 17:25:07 +0100694 if (__split_large_page(cpa, kpte, address, base))
Wen Congyangae9aae92013-02-22 16:33:04 -0800695 __free_page(base);
696
697 return 0;
698}
699
Borislav Petkov52a628f2013-10-31 17:25:06 +0100700static bool try_to_free_pte_page(pte_t *pte)
701{
702 int i;
703
704 for (i = 0; i < PTRS_PER_PTE; i++)
705 if (!pte_none(pte[i]))
706 return false;
707
708 free_page((unsigned long)pte);
709 return true;
710}
711
712static bool try_to_free_pmd_page(pmd_t *pmd)
713{
714 int i;
715
716 for (i = 0; i < PTRS_PER_PMD; i++)
717 if (!pmd_none(pmd[i]))
718 return false;
719
720 free_page((unsigned long)pmd);
721 return true;
722}
723
Borislav Petkov42a54772014-01-18 12:48:16 +0100724static bool try_to_free_pud_page(pud_t *pud)
725{
726 int i;
727
728 for (i = 0; i < PTRS_PER_PUD; i++)
729 if (!pud_none(pud[i]))
730 return false;
731
732 free_page((unsigned long)pud);
733 return true;
734}
735
Borislav Petkov52a628f2013-10-31 17:25:06 +0100736static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
737{
738 pte_t *pte = pte_offset_kernel(pmd, start);
739
740 while (start < end) {
741 set_pte(pte, __pte(0));
742
743 start += PAGE_SIZE;
744 pte++;
745 }
746
747 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
748 pmd_clear(pmd);
749 return true;
750 }
751 return false;
752}
753
754static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
755 unsigned long start, unsigned long end)
756{
757 if (unmap_pte_range(pmd, start, end))
758 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
759 pud_clear(pud);
760}
761
762static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
763{
764 pmd_t *pmd = pmd_offset(pud, start);
765
766 /*
767 * Not on a 2MB page boundary?
768 */
769 if (start & (PMD_SIZE - 1)) {
770 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
771 unsigned long pre_end = min_t(unsigned long, end, next_page);
772
773 __unmap_pmd_range(pud, pmd, start, pre_end);
774
775 start = pre_end;
776 pmd++;
777 }
778
779 /*
780 * Try to unmap in 2M chunks.
781 */
782 while (end - start >= PMD_SIZE) {
783 if (pmd_large(*pmd))
784 pmd_clear(pmd);
785 else
786 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
787
788 start += PMD_SIZE;
789 pmd++;
790 }
791
792 /*
793 * 4K leftovers?
794 */
795 if (start < end)
796 return __unmap_pmd_range(pud, pmd, start, end);
797
798 /*
799 * Try again to free the PMD page if haven't succeeded above.
800 */
801 if (!pud_none(*pud))
802 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
803 pud_clear(pud);
804}
Borislav Petkov0bb8aee2013-10-31 17:25:05 +0100805
806static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
807{
808 pud_t *pud = pud_offset(pgd, start);
809
810 /*
811 * Not on a GB page boundary?
812 */
813 if (start & (PUD_SIZE - 1)) {
814 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
815 unsigned long pre_end = min_t(unsigned long, end, next_page);
816
817 unmap_pmd_range(pud, start, pre_end);
818
819 start = pre_end;
820 pud++;
821 }
822
823 /*
824 * Try to unmap in 1G chunks?
825 */
826 while (end - start >= PUD_SIZE) {
827
828 if (pud_large(*pud))
829 pud_clear(pud);
830 else
831 unmap_pmd_range(pud, start, start + PUD_SIZE);
832
833 start += PUD_SIZE;
834 pud++;
835 }
836
837 /*
838 * 2M leftovers?
839 */
840 if (start < end)
841 unmap_pmd_range(pud, start, end);
842
843 /*
844 * No need to try to free the PUD page because we'll free it in
845 * populate_pgd's error path
846 */
847}
848
Borislav Petkov42a54772014-01-18 12:48:16 +0100849static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
850{
851 pgd_t *pgd_entry = root + pgd_index(addr);
852
853 unmap_pud_range(pgd_entry, addr, end);
854
855 if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
856 pgd_clear(pgd_entry);
857}
858
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100859static int alloc_pte_page(pmd_t *pmd)
860{
861 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
862 if (!pte)
863 return -1;
864
865 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
866 return 0;
867}
868
Borislav Petkov4b235382013-10-31 17:25:02 +0100869static int alloc_pmd_page(pud_t *pud)
870{
871 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
872 if (!pmd)
873 return -1;
874
875 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
876 return 0;
877}
878
Borislav Petkovc6b6f362013-10-31 17:25:04 +0100879static void populate_pte(struct cpa_data *cpa,
880 unsigned long start, unsigned long end,
881 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
882{
883 pte_t *pte;
884
885 pte = pte_offset_kernel(pmd, start);
886
887 while (num_pages-- && start < end) {
888
889 /* deal with the NX bit */
890 if (!(pgprot_val(pgprot) & _PAGE_NX))
891 cpa->pfn &= ~_PAGE_NX;
892
893 set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
894
895 start += PAGE_SIZE;
896 cpa->pfn += PAGE_SIZE;
897 pte++;
898 }
899}
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100900
901static int populate_pmd(struct cpa_data *cpa,
902 unsigned long start, unsigned long end,
903 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
904{
905 unsigned int cur_pages = 0;
906 pmd_t *pmd;
Juergen Grossf5b28312014-11-03 14:02:02 +0100907 pgprot_t pmd_pgprot;
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100908
909 /*
910 * Not on a 2M boundary?
911 */
912 if (start & (PMD_SIZE - 1)) {
913 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
914 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
915
916 pre_end = min_t(unsigned long, pre_end, next_page);
917 cur_pages = (pre_end - start) >> PAGE_SHIFT;
918 cur_pages = min_t(unsigned int, num_pages, cur_pages);
919
920 /*
921 * Need a PTE page?
922 */
923 pmd = pmd_offset(pud, start);
924 if (pmd_none(*pmd))
925 if (alloc_pte_page(pmd))
926 return -1;
927
928 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
929
930 start = pre_end;
931 }
932
933 /*
934 * We mapped them all?
935 */
936 if (num_pages == cur_pages)
937 return cur_pages;
938
Juergen Grossf5b28312014-11-03 14:02:02 +0100939 pmd_pgprot = pgprot_4k_2_large(pgprot);
940
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100941 while (end - start >= PMD_SIZE) {
942
943 /*
944 * We cannot use a 1G page so allocate a PMD page if needed.
945 */
946 if (pud_none(*pud))
947 if (alloc_pmd_page(pud))
948 return -1;
949
950 pmd = pmd_offset(pud, start);
951
Juergen Grossf5b28312014-11-03 14:02:02 +0100952 set_pmd(pmd, __pmd(cpa->pfn | _PAGE_PSE |
953 massage_pgprot(pmd_pgprot)));
Borislav Petkovf900a4b2013-10-31 17:25:03 +0100954
955 start += PMD_SIZE;
956 cpa->pfn += PMD_SIZE;
957 cur_pages += PMD_SIZE >> PAGE_SHIFT;
958 }
959
960 /*
961 * Map trailing 4K pages.
962 */
963 if (start < end) {
964 pmd = pmd_offset(pud, start);
965 if (pmd_none(*pmd))
966 if (alloc_pte_page(pmd))
967 return -1;
968
969 populate_pte(cpa, start, end, num_pages - cur_pages,
970 pmd, pgprot);
971 }
972 return num_pages;
973}
Borislav Petkov4b235382013-10-31 17:25:02 +0100974
975static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
976 pgprot_t pgprot)
977{
978 pud_t *pud;
979 unsigned long end;
980 int cur_pages = 0;
Juergen Grossf5b28312014-11-03 14:02:02 +0100981 pgprot_t pud_pgprot;
Borislav Petkov4b235382013-10-31 17:25:02 +0100982
983 end = start + (cpa->numpages << PAGE_SHIFT);
984
985 /*
986 * Not on a Gb page boundary? => map everything up to it with
987 * smaller pages.
988 */
989 if (start & (PUD_SIZE - 1)) {
990 unsigned long pre_end;
991 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
992
993 pre_end = min_t(unsigned long, end, next_page);
994 cur_pages = (pre_end - start) >> PAGE_SHIFT;
995 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
996
997 pud = pud_offset(pgd, start);
998
999 /*
1000 * Need a PMD page?
1001 */
1002 if (pud_none(*pud))
1003 if (alloc_pmd_page(pud))
1004 return -1;
1005
1006 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1007 pud, pgprot);
1008 if (cur_pages < 0)
1009 return cur_pages;
1010
1011 start = pre_end;
1012 }
1013
1014 /* We mapped them all? */
1015 if (cpa->numpages == cur_pages)
1016 return cur_pages;
1017
1018 pud = pud_offset(pgd, start);
Juergen Grossf5b28312014-11-03 14:02:02 +01001019 pud_pgprot = pgprot_4k_2_large(pgprot);
Borislav Petkov4b235382013-10-31 17:25:02 +01001020
1021 /*
1022 * Map everything starting from the Gb boundary, possibly with 1G pages
1023 */
1024 while (end - start >= PUD_SIZE) {
Juergen Grossf5b28312014-11-03 14:02:02 +01001025 set_pud(pud, __pud(cpa->pfn | _PAGE_PSE |
1026 massage_pgprot(pud_pgprot)));
Borislav Petkov4b235382013-10-31 17:25:02 +01001027
1028 start += PUD_SIZE;
1029 cpa->pfn += PUD_SIZE;
1030 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1031 pud++;
1032 }
1033
1034 /* Map trailing leftover */
1035 if (start < end) {
1036 int tmp;
1037
1038 pud = pud_offset(pgd, start);
1039 if (pud_none(*pud))
1040 if (alloc_pmd_page(pud))
1041 return -1;
1042
1043 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1044 pud, pgprot);
1045 if (tmp < 0)
1046 return cur_pages;
1047
1048 cur_pages += tmp;
1049 }
1050 return cur_pages;
1051}
Borislav Petkovf3f72962013-10-31 17:25:01 +01001052
1053/*
1054 * Restrictions for kernel page table do not necessarily apply when mapping in
1055 * an alternate PGD.
1056 */
1057static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1058{
1059 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
Borislav Petkovf3f72962013-10-31 17:25:01 +01001060 pud_t *pud = NULL; /* shut up gcc */
Borislav Petkov42a54772014-01-18 12:48:16 +01001061 pgd_t *pgd_entry;
Borislav Petkovf3f72962013-10-31 17:25:01 +01001062 int ret;
1063
1064 pgd_entry = cpa->pgd + pgd_index(addr);
1065
1066 /*
1067 * Allocate a PUD page and hand it down for mapping.
1068 */
1069 if (pgd_none(*pgd_entry)) {
1070 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1071 if (!pud)
1072 return -1;
1073
1074 set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
Borislav Petkovf3f72962013-10-31 17:25:01 +01001075 }
1076
1077 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1078 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1079
1080 ret = populate_pud(cpa, addr, pgd_entry, pgprot);
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001081 if (ret < 0) {
Borislav Petkov42a54772014-01-18 12:48:16 +01001082 unmap_pgd_range(cpa->pgd, addr,
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001083 addr + (cpa->numpages << PAGE_SHIFT));
Borislav Petkov0bb8aee2013-10-31 17:25:05 +01001084 return ret;
1085 }
Borislav Petkov42a54772014-01-18 12:48:16 +01001086
Borislav Petkovf3f72962013-10-31 17:25:01 +01001087 cpa->numpages = ret;
1088 return 0;
1089}
1090
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001091static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1092 int primary)
1093{
Borislav Petkov82f07122013-10-31 17:25:07 +01001094 if (cpa->pgd)
1095 return populate_pgd(cpa, vaddr);
1096
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001097 /*
1098 * Ignore all non primary paths.
1099 */
1100 if (!primary)
1101 return 0;
1102
1103 /*
1104 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1105 * to have holes.
1106 * Also set numpages to '1' indicating that we processed cpa req for
1107 * one virtual address page and its pfn. TBD: numpages can be set based
1108 * on the initial value and the level returned by lookup_address().
1109 */
1110 if (within(vaddr, PAGE_OFFSET,
1111 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1112 cpa->numpages = 1;
1113 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1114 return 0;
1115 } else {
1116 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1117 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1118 *cpa->vaddr);
1119
1120 return -EFAULT;
1121 }
1122}
1123
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001124static int __change_page_attr(struct cpa_data *cpa, int primary)
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001125{
Shaohua Lid75586a2008-08-21 10:46:06 +08001126 unsigned long address;
Harvey Harrisonda7bfc52008-02-09 23:24:08 +01001127 int do_split, err;
1128 unsigned int level;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001129 pte_t *kpte, old_pte;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001130
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001131 if (cpa->flags & CPA_PAGES_ARRAY) {
1132 struct page *page = cpa->pages[cpa->curpage];
1133 if (unlikely(PageHighMem(page)))
1134 return 0;
1135 address = (unsigned long)page_address(page);
1136 } else if (cpa->flags & CPA_ARRAY)
Shaohua Lid75586a2008-08-21 10:46:06 +08001137 address = cpa->vaddr[cpa->curpage];
1138 else
1139 address = *cpa->vaddr;
Ingo Molnar97f99fe2008-01-30 13:33:55 +01001140repeat:
Borislav Petkov82f07122013-10-31 17:25:07 +01001141 kpte = _lookup_address_cpa(cpa, address, &level);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001142 if (!kpte)
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001143 return __cpa_process_fault(cpa, address, primary);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001144
1145 old_pte = *kpte;
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001146 if (!pte_val(old_pte))
1147 return __cpa_process_fault(cpa, address, primary);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001148
Thomas Gleixner30551bb2008-01-30 13:34:04 +01001149 if (level == PG_LEVEL_4K) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001150 pte_t new_pte;
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001151 pgprot_t new_prot = pte_pgprot(old_pte);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001152 unsigned long pfn = pte_pfn(old_pte);
Thomas Gleixnera72a08a2008-01-30 13:34:07 +01001153
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001154 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1155 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
Ingo Molnar86f03989d2008-01-30 13:34:09 +01001156
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001157 new_prot = static_protections(new_prot, address, pfn);
Ingo Molnar86f03989d2008-01-30 13:34:09 +01001158
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001159 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -08001160 * Set the GLOBAL flags only if the PRESENT flag is
1161 * set otherwise pte_present will return true even on
1162 * a non present pte. The canon_pgprot will clear
1163 * _PAGE_GLOBAL for the ancient hardware that doesn't
1164 * support it.
1165 */
1166 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1167 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1168 else
1169 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1170
1171 /*
Arjan van de Ven626c2c92008-02-04 16:48:05 +01001172 * We need to keep the pfn from the existing PTE,
1173 * after all we're only going to change it's attributes
1174 * not the memory it points to
1175 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001176 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1177 cpa->pfn = pfn;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001178 /*
1179 * Do we really change anything ?
1180 */
1181 if (pte_val(old_pte) != pte_val(new_pte)) {
1182 set_pte_atomic(kpte, new_pte);
Shaohua Lid75586a2008-08-21 10:46:06 +08001183 cpa->flags |= CPA_FLUSHTLB;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001184 }
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001185 cpa->numpages = 1;
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001186 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001187 }
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001188
1189 /*
1190 * Check, whether we can keep the large page intact
1191 * and just change the pte:
1192 */
Ingo Molnarbeaff632008-02-04 16:48:09 +01001193 do_split = try_preserve_large_page(kpte, address, cpa);
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001194 /*
1195 * When the range fits into the existing large page,
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001196 * return. cp->numpages and cpa->tlbflush have been updated in
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001197 * try_large_page:
1198 */
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001199 if (do_split <= 0)
1200 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001201
1202 /*
1203 * We have to split the large page:
1204 */
Borislav Petkov82f07122013-10-31 17:25:07 +01001205 err = split_large_page(cpa, kpte, address);
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001206 if (!err) {
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001207 /*
1208 * Do a global flush tlb after splitting the large page
1209 * and before we do the actual change page attribute in the PTE.
1210 *
1211 * With out this, we violate the TLB application note, that says
1212 * "The TLBs may contain both ordinary and large-page
1213 * translations for a 4-KByte range of linear addresses. This
1214 * may occur if software modifies the paging structures so that
1215 * the page size used for the address range changes. If the two
1216 * translations differ with respect to page frame or attributes
1217 * (e.g., permissions), processor behavior is undefined and may
1218 * be implementation-specific."
1219 *
1220 * We do this global tlb flush inside the cpa_lock, so that we
1221 * don't allow any other cpu, with stale tlb entries change the
1222 * page attribute in parallel, that also falls into the
1223 * just split large page entry.
1224 */
1225 flush_tlb_all();
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001226 goto repeat;
1227 }
Ingo Molnarbeaff632008-02-04 16:48:09 +01001228
Ingo Molnar87f7f8f2008-02-04 16:48:10 +01001229 return err;
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001230}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001231
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001232static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1233
1234static int cpa_process_alias(struct cpa_data *cpa)
Ingo Molnar44af6c42008-01-30 13:34:03 +01001235{
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001236 struct cpa_data alias_cpa;
Tejun Heo992f4c12009-06-22 11:56:24 +09001237 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
Tejun Heoe933a732009-08-14 15:00:53 +09001238 unsigned long vaddr;
Tejun Heo992f4c12009-06-22 11:56:24 +09001239 int ret;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001240
Yinghai Lu8eb57792012-11-16 19:38:49 -08001241 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001242 return 0;
1243
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001244 /*
1245 * No need to redo, when the primary call touched the direct
1246 * mapping already:
1247 */
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001248 if (cpa->flags & CPA_PAGES_ARRAY) {
1249 struct page *page = cpa->pages[cpa->curpage];
1250 if (unlikely(PageHighMem(page)))
1251 return 0;
1252 vaddr = (unsigned long)page_address(page);
1253 } else if (cpa->flags & CPA_ARRAY)
Shaohua Lid75586a2008-08-21 10:46:06 +08001254 vaddr = cpa->vaddr[cpa->curpage];
1255 else
1256 vaddr = *cpa->vaddr;
1257
1258 if (!(within(vaddr, PAGE_OFFSET,
Suresh Siddhaa1e46212009-01-20 14:20:21 -08001259 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001260
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001261 alias_cpa = *cpa;
Tejun Heo992f4c12009-06-22 11:56:24 +09001262 alias_cpa.vaddr = &laddr;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001263 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
Shaohua Lid75586a2008-08-21 10:46:06 +08001264
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001265 ret = __change_page_attr_set_clr(&alias_cpa, 0);
Tejun Heo992f4c12009-06-22 11:56:24 +09001266 if (ret)
1267 return ret;
Thomas Gleixnerf34b4392008-02-15 22:17:57 +01001268 }
Ingo Molnar44af6c42008-01-30 13:34:03 +01001269
Arjan van de Ven488fd992008-01-30 13:34:07 +01001270#ifdef CONFIG_X86_64
Thomas Gleixner08797502008-01-30 13:34:09 +01001271 /*
Tejun Heo992f4c12009-06-22 11:56:24 +09001272 * If the primary call didn't touch the high mapping already
1273 * and the physical address is inside the kernel map, we need
Thomas Gleixner08797502008-01-30 13:34:09 +01001274 * to touch the high mapped kernel as well:
1275 */
Tejun Heo992f4c12009-06-22 11:56:24 +09001276 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1277 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1278 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1279 __START_KERNEL_map - phys_base;
1280 alias_cpa = *cpa;
1281 alias_cpa.vaddr = &temp_cpa_vaddr;
1282 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
Thomas Gleixner08797502008-01-30 13:34:09 +01001283
Tejun Heo992f4c12009-06-22 11:56:24 +09001284 /*
1285 * The high mapping range is imprecise, so ignore the
1286 * return value.
1287 */
1288 __change_page_attr_set_clr(&alias_cpa, 0);
1289 }
Thomas Gleixner08797502008-01-30 13:34:09 +01001290#endif
Tejun Heo992f4c12009-06-22 11:56:24 +09001291
1292 return 0;
Ingo Molnar44af6c42008-01-30 13:34:03 +01001293}
1294
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001295static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
Thomas Gleixnerff314522008-01-30 13:34:08 +01001296{
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001297 int ret, numpages = cpa->numpages;
Thomas Gleixnerff314522008-01-30 13:34:08 +01001298
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001299 while (numpages) {
1300 /*
1301 * Store the remaining nr of pages for the large page
1302 * preservation check.
1303 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001304 cpa->numpages = numpages;
Shaohua Lid75586a2008-08-21 10:46:06 +08001305 /* for array changes, we can't use large page */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001306 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
Shaohua Lid75586a2008-08-21 10:46:06 +08001307 cpa->numpages = 1;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001308
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001309 if (!debug_pagealloc)
1310 spin_lock(&cpa_lock);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001311 ret = __change_page_attr(cpa, checkalias);
Suresh Siddhaad5ca552008-09-23 14:00:42 -07001312 if (!debug_pagealloc)
1313 spin_unlock(&cpa_lock);
Thomas Gleixnerff314522008-01-30 13:34:08 +01001314 if (ret)
1315 return ret;
Thomas Gleixnerff314522008-01-30 13:34:08 +01001316
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +01001317 if (checkalias) {
1318 ret = cpa_process_alias(cpa);
1319 if (ret)
1320 return ret;
1321 }
1322
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001323 /*
1324 * Adjust the number of pages with the result of the
1325 * CPA operation. Either a large page has been
1326 * preserved or a single page update happened.
1327 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +01001328 BUG_ON(cpa->numpages > numpages);
1329 numpages -= cpa->numpages;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001330 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
Shaohua Lid75586a2008-08-21 10:46:06 +08001331 cpa->curpage++;
1332 else
1333 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1334
Thomas Gleixner65e074d2008-02-04 16:48:07 +01001335 }
Thomas Gleixnerff314522008-01-30 13:34:08 +01001336 return 0;
1337}
1338
Shaohua Lid75586a2008-08-21 10:46:06 +08001339static int change_page_attr_set_clr(unsigned long *addr, int numpages,
Andi Kleenc9caa022008-03-12 03:53:29 +01001340 pgprot_t mask_set, pgprot_t mask_clr,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001341 int force_split, int in_flag,
1342 struct page **pages)
Thomas Gleixnerff314522008-01-30 13:34:08 +01001343{
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001344 struct cpa_data cpa;
Ingo Molnarcacf8902008-08-21 13:46:33 +02001345 int ret, cache, checkalias;
Jack Steinerfa526d02009-09-03 12:56:02 -05001346 unsigned long baddr = 0;
Thomas Gleixner331e4062008-02-04 16:48:06 +01001347
Borislav Petkov82f07122013-10-31 17:25:07 +01001348 memset(&cpa, 0, sizeof(cpa));
1349
Thomas Gleixner331e4062008-02-04 16:48:06 +01001350 /*
1351 * Check, if we are requested to change a not supported
1352 * feature:
1353 */
1354 mask_set = canon_pgprot(mask_set);
1355 mask_clr = canon_pgprot(mask_clr);
Andi Kleenc9caa022008-03-12 03:53:29 +01001356 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
Thomas Gleixner331e4062008-02-04 16:48:06 +01001357 return 0;
1358
Thomas Gleixner69b14152008-02-13 11:04:50 +01001359 /* Ensure we are PAGE_SIZE aligned */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001360 if (in_flag & CPA_ARRAY) {
Shaohua Lid75586a2008-08-21 10:46:06 +08001361 int i;
1362 for (i = 0; i < numpages; i++) {
1363 if (addr[i] & ~PAGE_MASK) {
1364 addr[i] &= PAGE_MASK;
1365 WARN_ON_ONCE(1);
1366 }
1367 }
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001368 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1369 /*
1370 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1371 * No need to cehck in that case
1372 */
1373 if (*addr & ~PAGE_MASK) {
1374 *addr &= PAGE_MASK;
1375 /*
1376 * People should not be passing in unaligned addresses:
1377 */
1378 WARN_ON_ONCE(1);
1379 }
Jack Steinerfa526d02009-09-03 12:56:02 -05001380 /*
1381 * Save address for cache flush. *addr is modified in the call
1382 * to __change_page_attr_set_clr() below.
1383 */
1384 baddr = *addr;
Thomas Gleixner69b14152008-02-13 11:04:50 +01001385 }
1386
Nick Piggin5843d9a2008-08-01 03:15:21 +02001387 /* Must avoid aliasing mappings in the highmem code */
1388 kmap_flush_unused();
1389
Nick Piggindb64fe02008-10-18 20:27:03 -07001390 vm_unmap_aliases();
1391
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001392 cpa.vaddr = addr;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001393 cpa.pages = pages;
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001394 cpa.numpages = numpages;
1395 cpa.mask_set = mask_set;
1396 cpa.mask_clr = mask_clr;
Shaohua Lid75586a2008-08-21 10:46:06 +08001397 cpa.flags = 0;
1398 cpa.curpage = 0;
Andi Kleenc9caa022008-03-12 03:53:29 +01001399 cpa.force_split = force_split;
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001400
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001401 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1402 cpa.flags |= in_flag;
Shaohua Lid75586a2008-08-21 10:46:06 +08001403
Thomas Gleixneraf96e442008-02-15 21:49:46 +01001404 /* No alias checking for _NX bit modifications */
1405 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1406
1407 ret = __change_page_attr_set_clr(&cpa, checkalias);
Thomas Gleixnerff314522008-01-30 13:34:08 +01001408
Thomas Gleixner57a6a462008-01-30 13:34:08 +01001409 /*
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001410 * Check whether we really changed something:
1411 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001412 if (!(cpa.flags & CPA_FLUSHTLB))
Shaohua Li1ac2f7d2008-08-04 14:51:24 +08001413 goto out;
Ingo Molnarcacf8902008-08-21 13:46:33 +02001414
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +01001415 /*
Andi Kleen6bb83832008-02-04 16:48:06 +01001416 * No need to flush, when we did not set any of the caching
1417 * attributes:
1418 */
Juergen Grossc06814d2014-11-03 14:01:57 +01001419 cache = !!pgprot2cachemode(mask_set);
Andi Kleen6bb83832008-02-04 16:48:06 +01001420
1421 /*
Borislav Petkovb82ad3d2014-03-12 15:13:04 +01001422 * On success we use CLFLUSH, when the CPU supports it to
1423 * avoid the WBINVD. If the CPU does not support it and in the
H. Peter Anvinf026cfa2012-08-14 09:53:38 -07001424 * error case we fall back to cpa_flush_all (which uses
Borislav Petkovb82ad3d2014-03-12 15:13:04 +01001425 * WBINVD):
Thomas Gleixner57a6a462008-01-30 13:34:08 +01001426 */
H. Peter Anvinf026cfa2012-08-14 09:53:38 -07001427 if (!ret && cpu_has_clflush) {
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001428 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1429 cpa_flush_array(addr, numpages, cache,
1430 cpa.flags, pages);
1431 } else
Jack Steinerfa526d02009-09-03 12:56:02 -05001432 cpa_flush_range(baddr, numpages, cache);
Shaohua Lid75586a2008-08-21 10:46:06 +08001433 } else
Andi Kleen6bb83832008-02-04 16:48:06 +01001434 cpa_flush_all(cache);
Ingo Molnarcacf8902008-08-21 13:46:33 +02001435
Thomas Gleixner76ebd052008-02-09 23:24:09 +01001436out:
Thomas Gleixnerff314522008-01-30 13:34:08 +01001437 return ret;
1438}
1439
Shaohua Lid75586a2008-08-21 10:46:06 +08001440static inline int change_page_attr_set(unsigned long *addr, int numpages,
1441 pgprot_t mask, int array)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001442{
Shaohua Lid75586a2008-08-21 10:46:06 +08001443 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001444 (array ? CPA_ARRAY : 0), NULL);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001445}
1446
Shaohua Lid75586a2008-08-21 10:46:06 +08001447static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1448 pgprot_t mask, int array)
Thomas Gleixner72932c72008-01-30 13:34:08 +01001449{
Shaohua Lid75586a2008-08-21 10:46:06 +08001450 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001451 (array ? CPA_ARRAY : 0), NULL);
Thomas Gleixner72932c72008-01-30 13:34:08 +01001452}
1453
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001454static inline int cpa_set_pages_array(struct page **pages, int numpages,
1455 pgprot_t mask)
1456{
1457 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1458 CPA_PAGES_ARRAY, pages);
1459}
1460
1461static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1462 pgprot_t mask)
1463{
1464 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1465 CPA_PAGES_ARRAY, pages);
1466}
1467
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001468int _set_memory_uc(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001469{
Suresh Siddhade33c442008-04-25 17:07:22 -07001470 /*
1471 * for now UC MINUS. see comments in ioremap_nocache()
Luis R. Rodrigueze4b6be332015-05-11 10:15:53 +02001472 * If you really need strong UC use ioremap_uc(), but note
1473 * that you cannot override IO areas with set_memory_*() as
1474 * these helpers cannot work with IO memory.
Suresh Siddhade33c442008-04-25 17:07:22 -07001475 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001476 return change_page_attr_set(&addr, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001477 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1478 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001479}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001480
1481int set_memory_uc(unsigned long addr, int numpages)
1482{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001483 int ret;
1484
Suresh Siddhade33c442008-04-25 17:07:22 -07001485 /*
1486 * for now UC MINUS. see comments in ioremap_nocache()
1487 */
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001488 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
Juergen Grosse00c8cc2014-11-03 14:01:59 +01001489 _PAGE_CACHE_MODE_UC_MINUS, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001490 if (ret)
1491 goto out_err;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001492
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001493 ret = _set_memory_uc(addr, numpages);
1494 if (ret)
1495 goto out_free;
1496
1497 return 0;
1498
1499out_free:
1500 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1501out_err:
1502 return ret;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001503}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001504EXPORT_SYMBOL(set_memory_uc);
1505
H Hartley Sweeten2d070ef2011-11-15 14:49:00 -08001506static int _set_memory_array(unsigned long *addr, int addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001507 enum page_cache_mode new_type)
Shaohua Lid75586a2008-08-21 10:46:06 +08001508{
Toshi Kani623dffb2015-06-04 18:55:20 +02001509 enum page_cache_mode set_type;
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001510 int i, j;
1511 int ret;
1512
Shaohua Lid75586a2008-08-21 10:46:06 +08001513 for (i = 0; i < addrinarray; i++) {
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001514 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
Pauli Nieminen4f646252010-04-01 12:45:01 +00001515 new_type, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001516 if (ret)
1517 goto out_free;
Shaohua Lid75586a2008-08-21 10:46:06 +08001518 }
1519
Toshi Kani623dffb2015-06-04 18:55:20 +02001520 /* If WC, set to UC- first and then WC */
1521 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1522 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1523
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001524 ret = change_page_attr_set(addr, addrinarray,
Toshi Kani623dffb2015-06-04 18:55:20 +02001525 cachemode2pgprot(set_type), 1);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001526
Juergen Grossc06814d2014-11-03 14:01:57 +01001527 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
Pauli Nieminen4f646252010-04-01 12:45:01 +00001528 ret = change_page_attr_set_clr(addr, addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001529 cachemode2pgprot(
1530 _PAGE_CACHE_MODE_WC),
Pauli Nieminen4f646252010-04-01 12:45:01 +00001531 __pgprot(_PAGE_CACHE_MASK),
1532 0, CPA_ARRAY, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001533 if (ret)
1534 goto out_free;
Rene Hermanc5e147c2008-08-22 01:02:20 +02001535
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001536 return 0;
1537
1538out_free:
1539 for (j = 0; j < i; j++)
1540 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1541
1542 return ret;
Shaohua Lid75586a2008-08-21 10:46:06 +08001543}
Pauli Nieminen4f646252010-04-01 12:45:01 +00001544
1545int set_memory_array_uc(unsigned long *addr, int addrinarray)
1546{
Juergen Grossc06814d2014-11-03 14:01:57 +01001547 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001548}
Shaohua Lid75586a2008-08-21 10:46:06 +08001549EXPORT_SYMBOL(set_memory_array_uc);
1550
Pauli Nieminen4f646252010-04-01 12:45:01 +00001551int set_memory_array_wc(unsigned long *addr, int addrinarray)
1552{
Juergen Grossc06814d2014-11-03 14:01:57 +01001553 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001554}
1555EXPORT_SYMBOL(set_memory_array_wc);
1556
Toshi Kani623dffb2015-06-04 18:55:20 +02001557int set_memory_array_wt(unsigned long *addr, int addrinarray)
1558{
1559 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1560}
1561EXPORT_SYMBOL_GPL(set_memory_array_wt);
1562
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001563int _set_memory_wc(unsigned long addr, int numpages)
1564{
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001565 int ret;
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001566 unsigned long addr_copy = addr;
1567
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001568 ret = change_page_attr_set(&addr, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001569 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1570 0);
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001571 if (!ret) {
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001572 ret = change_page_attr_set_clr(&addr_copy, numpages,
Juergen Grossc06814d2014-11-03 14:01:57 +01001573 cachemode2pgprot(
1574 _PAGE_CACHE_MODE_WC),
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001575 __pgprot(_PAGE_CACHE_MASK),
1576 0, 0, NULL);
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001577 }
1578 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001579}
1580
1581int set_memory_wc(unsigned long addr, int numpages)
1582{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001583 int ret;
1584
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001585 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
Juergen Grosse00c8cc2014-11-03 14:01:59 +01001586 _PAGE_CACHE_MODE_WC, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001587 if (ret)
Toshi Kani623dffb2015-06-04 18:55:20 +02001588 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001589
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001590 ret = _set_memory_wc(addr, numpages);
1591 if (ret)
Toshi Kani623dffb2015-06-04 18:55:20 +02001592 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001593
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001594 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001595}
1596EXPORT_SYMBOL(set_memory_wc);
1597
Toshi Kani623dffb2015-06-04 18:55:20 +02001598int _set_memory_wt(unsigned long addr, int numpages)
1599{
1600 return change_page_attr_set(&addr, numpages,
1601 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1602}
1603
1604int set_memory_wt(unsigned long addr, int numpages)
1605{
1606 int ret;
1607
1608 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1609 _PAGE_CACHE_MODE_WT, NULL);
1610 if (ret)
1611 return ret;
1612
1613 ret = _set_memory_wt(addr, numpages);
1614 if (ret)
1615 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1616
1617 return ret;
1618}
1619EXPORT_SYMBOL_GPL(set_memory_wt);
1620
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001621int _set_memory_wb(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001622{
Juergen Grossc06814d2014-11-03 14:01:57 +01001623 /* WB cache mode is hard wired to all cache attribute bits being 0 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001624 return change_page_attr_clear(&addr, numpages,
1625 __pgprot(_PAGE_CACHE_MASK), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001626}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001627
1628int set_memory_wb(unsigned long addr, int numpages)
1629{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001630 int ret;
1631
1632 ret = _set_memory_wb(addr, numpages);
1633 if (ret)
1634 return ret;
1635
venkatesh.pallipadi@intel.comc15238d2008-08-20 16:45:51 -07001636 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001637 return 0;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001638}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001639EXPORT_SYMBOL(set_memory_wb);
1640
Shaohua Lid75586a2008-08-21 10:46:06 +08001641int set_memory_array_wb(unsigned long *addr, int addrinarray)
1642{
1643 int i;
venkatesh.pallipadi@intel.coma5593e02009-04-09 14:26:48 -07001644 int ret;
1645
Juergen Grossc06814d2014-11-03 14:01:57 +01001646 /* WB cache mode is hard wired to all cache attribute bits being 0 */
venkatesh.pallipadi@intel.coma5593e02009-04-09 14:26:48 -07001647 ret = change_page_attr_clear(addr, addrinarray,
1648 __pgprot(_PAGE_CACHE_MASK), 1);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001649 if (ret)
1650 return ret;
Shaohua Lid75586a2008-08-21 10:46:06 +08001651
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001652 for (i = 0; i < addrinarray; i++)
1653 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
Rene Hermanc5e147c2008-08-22 01:02:20 +02001654
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001655 return 0;
Shaohua Lid75586a2008-08-21 10:46:06 +08001656}
1657EXPORT_SYMBOL(set_memory_array_wb);
1658
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001659int set_memory_x(unsigned long addr, int numpages)
1660{
H. Peter Anvin583140a2009-11-13 15:28:15 -08001661 if (!(__supported_pte_mask & _PAGE_NX))
1662 return 0;
1663
Shaohua Lid75586a2008-08-21 10:46:06 +08001664 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001665}
1666EXPORT_SYMBOL(set_memory_x);
1667
1668int set_memory_nx(unsigned long addr, int numpages)
1669{
H. Peter Anvin583140a2009-11-13 15:28:15 -08001670 if (!(__supported_pte_mask & _PAGE_NX))
1671 return 0;
1672
Shaohua Lid75586a2008-08-21 10:46:06 +08001673 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001674}
1675EXPORT_SYMBOL(set_memory_nx);
1676
1677int set_memory_ro(unsigned long addr, int numpages)
1678{
Shaohua Lid75586a2008-08-21 10:46:06 +08001679 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001680}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001681
1682int set_memory_rw(unsigned long addr, int numpages)
1683{
Shaohua Lid75586a2008-08-21 10:46:06 +08001684 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001685}
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001686
1687int set_memory_np(unsigned long addr, int numpages)
1688{
Shaohua Lid75586a2008-08-21 10:46:06 +08001689 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001690}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001691
Andi Kleenc9caa022008-03-12 03:53:29 +01001692int set_memory_4k(unsigned long addr, int numpages)
1693{
Shaohua Lid75586a2008-08-21 10:46:06 +08001694 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001695 __pgprot(0), 1, 0, NULL);
Andi Kleenc9caa022008-03-12 03:53:29 +01001696}
1697
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001698int set_pages_uc(struct page *page, int numpages)
1699{
1700 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001701
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001702 return set_memory_uc(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001703}
1704EXPORT_SYMBOL(set_pages_uc);
1705
Pauli Nieminen4f646252010-04-01 12:45:01 +00001706static int _set_pages_array(struct page **pages, int addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001707 enum page_cache_mode new_type)
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001708{
1709 unsigned long start;
1710 unsigned long end;
Toshi Kani623dffb2015-06-04 18:55:20 +02001711 enum page_cache_mode set_type;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001712 int i;
1713 int free_idx;
Pauli Nieminen4f646252010-04-01 12:45:01 +00001714 int ret;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001715
1716 for (i = 0; i < addrinarray; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001717 if (PageHighMem(pages[i]))
1718 continue;
1719 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001720 end = start + PAGE_SIZE;
Pauli Nieminen4f646252010-04-01 12:45:01 +00001721 if (reserve_memtype(start, end, new_type, NULL))
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001722 goto err_out;
1723 }
1724
Toshi Kani623dffb2015-06-04 18:55:20 +02001725 /* If WC, set to UC- first and then WC */
1726 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1727 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1728
Pauli Nieminen4f646252010-04-01 12:45:01 +00001729 ret = cpa_set_pages_array(pages, addrinarray,
Toshi Kani623dffb2015-06-04 18:55:20 +02001730 cachemode2pgprot(set_type));
Juergen Grossc06814d2014-11-03 14:01:57 +01001731 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
Pauli Nieminen4f646252010-04-01 12:45:01 +00001732 ret = change_page_attr_set_clr(NULL, addrinarray,
Juergen Grossc06814d2014-11-03 14:01:57 +01001733 cachemode2pgprot(
1734 _PAGE_CACHE_MODE_WC),
Pauli Nieminen4f646252010-04-01 12:45:01 +00001735 __pgprot(_PAGE_CACHE_MASK),
1736 0, CPA_PAGES_ARRAY, pages);
1737 if (ret)
1738 goto err_out;
1739 return 0; /* Success */
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001740err_out:
1741 free_idx = i;
1742 for (i = 0; i < free_idx; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001743 if (PageHighMem(pages[i]))
1744 continue;
1745 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001746 end = start + PAGE_SIZE;
1747 free_memtype(start, end);
1748 }
1749 return -EINVAL;
1750}
Pauli Nieminen4f646252010-04-01 12:45:01 +00001751
1752int set_pages_array_uc(struct page **pages, int addrinarray)
1753{
Juergen Grossc06814d2014-11-03 14:01:57 +01001754 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001755}
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001756EXPORT_SYMBOL(set_pages_array_uc);
1757
Pauli Nieminen4f646252010-04-01 12:45:01 +00001758int set_pages_array_wc(struct page **pages, int addrinarray)
1759{
Juergen Grossc06814d2014-11-03 14:01:57 +01001760 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001761}
1762EXPORT_SYMBOL(set_pages_array_wc);
1763
Toshi Kani623dffb2015-06-04 18:55:20 +02001764int set_pages_array_wt(struct page **pages, int addrinarray)
1765{
1766 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1767}
1768EXPORT_SYMBOL_GPL(set_pages_array_wt);
1769
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001770int set_pages_wb(struct page *page, int numpages)
1771{
1772 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001773
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001774 return set_memory_wb(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001775}
1776EXPORT_SYMBOL(set_pages_wb);
1777
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001778int set_pages_array_wb(struct page **pages, int addrinarray)
1779{
1780 int retval;
1781 unsigned long start;
1782 unsigned long end;
1783 int i;
1784
Juergen Grossc06814d2014-11-03 14:01:57 +01001785 /* WB cache mode is hard wired to all cache attribute bits being 0 */
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001786 retval = cpa_clear_pages_array(pages, addrinarray,
1787 __pgprot(_PAGE_CACHE_MASK));
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001788 if (retval)
1789 return retval;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001790
1791 for (i = 0; i < addrinarray; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001792 if (PageHighMem(pages[i]))
1793 continue;
1794 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001795 end = start + PAGE_SIZE;
1796 free_memtype(start, end);
1797 }
1798
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001799 return 0;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001800}
1801EXPORT_SYMBOL(set_pages_array_wb);
1802
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001803int set_pages_x(struct page *page, int numpages)
1804{
1805 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001806
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001807 return set_memory_x(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001808}
1809EXPORT_SYMBOL(set_pages_x);
1810
1811int set_pages_nx(struct page *page, int numpages)
1812{
1813 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001814
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001815 return set_memory_nx(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001816}
1817EXPORT_SYMBOL(set_pages_nx);
1818
1819int set_pages_ro(struct page *page, int numpages)
1820{
1821 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001822
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001823 return set_memory_ro(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001824}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001825
1826int set_pages_rw(struct page *page, int numpages)
1827{
1828 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001829
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001830 return set_memory_rw(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001831}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001832
Linus Torvalds1da177e2005-04-16 15:20:36 -07001833#ifdef CONFIG_DEBUG_PAGEALLOC
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001834
1835static int __set_pages_p(struct page *page, int numpages)
1836{
Shaohua Lid75586a2008-08-21 10:46:06 +08001837 unsigned long tempaddr = (unsigned long) page_address(page);
1838 struct cpa_data cpa = { .vaddr = &tempaddr,
Borislav Petkov82f07122013-10-31 17:25:07 +01001839 .pgd = NULL,
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001840 .numpages = numpages,
1841 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
Shaohua Lid75586a2008-08-21 10:46:06 +08001842 .mask_clr = __pgprot(0),
1843 .flags = 0};
Thomas Gleixner72932c72008-01-30 13:34:08 +01001844
Suresh Siddha55121b42008-09-23 14:00:40 -07001845 /*
1846 * No alias checking needed for setting present flag. otherwise,
1847 * we may need to break large pages for 64-bit kernel text
1848 * mappings (this adds to complexity if we want to do this from
1849 * atomic context especially). Let's keep it simple!
1850 */
1851 return __change_page_attr_set_clr(&cpa, 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001852}
1853
1854static int __set_pages_np(struct page *page, int numpages)
1855{
Shaohua Lid75586a2008-08-21 10:46:06 +08001856 unsigned long tempaddr = (unsigned long) page_address(page);
1857 struct cpa_data cpa = { .vaddr = &tempaddr,
Borislav Petkov82f07122013-10-31 17:25:07 +01001858 .pgd = NULL,
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001859 .numpages = numpages,
1860 .mask_set = __pgprot(0),
Shaohua Lid75586a2008-08-21 10:46:06 +08001861 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1862 .flags = 0};
Thomas Gleixner72932c72008-01-30 13:34:08 +01001863
Suresh Siddha55121b42008-09-23 14:00:40 -07001864 /*
1865 * No alias checking needed for setting not present flag. otherwise,
1866 * we may need to break large pages for 64-bit kernel text
1867 * mappings (this adds to complexity if we want to do this from
1868 * atomic context especially). Let's keep it simple!
1869 */
1870 return __change_page_attr_set_clr(&cpa, 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001871}
1872
Joonsoo Kim031bc572014-12-12 16:55:52 -08001873void __kernel_map_pages(struct page *page, int numpages, int enable)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001874{
1875 if (PageHighMem(page))
1876 return;
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001877 if (!enable) {
Ingo Molnarf9b84042006-06-27 02:54:49 -07001878 debug_check_no_locks_freed(page_address(page),
1879 numpages * PAGE_SIZE);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001880 }
Ingo Molnarde5097c2006-01-09 15:59:21 -08001881
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001882 /*
Ingo Molnarf8d84062008-02-13 14:09:53 +01001883 * The return value is ignored as the calls cannot fail.
Suresh Siddha55121b42008-09-23 14:00:40 -07001884 * Large pages for identity mappings are not used at boot time
1885 * and hence no memory allocations during large page split.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001886 */
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001887 if (enable)
1888 __set_pages_p(page, numpages);
1889 else
1890 __set_pages_np(page, numpages);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001891
1892 /*
Ingo Molnare4b71dc2008-01-30 13:34:04 +01001893 * We should perform an IPI and flush all tlbs,
1894 * but that can deadlock->flush only current cpu:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001895 */
1896 __flush_tlb_all();
Boris Ostrovsky26564602013-04-11 13:59:52 -04001897
1898 arch_flush_lazy_mmu_mode();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001899}
Rafael J. Wysocki8a235ef2008-02-20 01:47:44 +01001900
1901#ifdef CONFIG_HIBERNATION
1902
1903bool kernel_page_present(struct page *page)
1904{
1905 unsigned int level;
1906 pte_t *pte;
1907
1908 if (PageHighMem(page))
1909 return false;
1910
1911 pte = lookup_address((unsigned long)page_address(page), &level);
1912 return (pte_val(*pte) & _PAGE_PRESENT);
1913}
1914
1915#endif /* CONFIG_HIBERNATION */
1916
1917#endif /* CONFIG_DEBUG_PAGEALLOC */
Arjan van de Vend1028a12008-01-30 13:34:07 +01001918
Borislav Petkov82f07122013-10-31 17:25:07 +01001919int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1920 unsigned numpages, unsigned long page_flags)
1921{
1922 int retval = -EINVAL;
1923
1924 struct cpa_data cpa = {
1925 .vaddr = &address,
1926 .pfn = pfn,
1927 .pgd = pgd,
1928 .numpages = numpages,
1929 .mask_set = __pgprot(0),
1930 .mask_clr = __pgprot(0),
1931 .flags = 0,
1932 };
1933
1934 if (!(__supported_pte_mask & _PAGE_NX))
1935 goto out;
1936
1937 if (!(page_flags & _PAGE_NX))
1938 cpa.mask_clr = __pgprot(_PAGE_NX);
1939
1940 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1941
1942 retval = __change_page_attr_set_clr(&cpa, 0);
1943 __flush_tlb_all();
1944
1945out:
1946 return retval;
1947}
1948
Borislav Petkov42a54772014-01-18 12:48:16 +01001949void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1950 unsigned numpages)
1951{
1952 unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1953}
1954
Arjan van de Vend1028a12008-01-30 13:34:07 +01001955/*
1956 * The testcases use internal knowledge of the implementation that shouldn't
1957 * be exposed to the rest of the kernel. Include these directly here.
1958 */
1959#ifdef CONFIG_CPA_DEBUG
1960#include "pageattr-test.c"
1961#endif