blob: 82c2c86a19518c37df31d48bb6240930b8963367 [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Joe Perchesada1db52010-02-17 15:01:59 +000025#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
Stephen Hemminger793b8832005-09-14 16:06:14 -070027#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070028#include <linux/kernel.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070029#include <linux/module.h>
30#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080031#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070032#include <linux/etherdevice.h>
33#include <linux/ethtool.h>
34#include <linux/pci.h>
Alexey Dobriyana6b7a402011-06-06 10:43:46 +000035#include <linux/interrupt.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070036#include <linux/ip.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090037#include <linux/slab.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030038#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070039#include <linux/tcp.h>
40#include <linux/in.h>
41#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080042#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070043#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080044#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070045#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080046#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070047
48#include <asm/irq.h>
49
50#include "sky2.h"
51
52#define DRV_NAME "sky2"
stephen hemmingerd9fa7c82011-11-16 13:43:00 +000053#define DRV_VERSION "1.30"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070054
55/*
56 * The Yukon II chipset takes 64 bit command blocks (called list elements)
57 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070058 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070059 */
60
Stephen Hemminger14d02632006-09-26 11:57:43 -070061#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070062#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070063#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080064#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070065
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000066/* This is the worst case number of transmit list elements for a single skb:
Stephen Hemminger07e31632009-09-14 06:12:55 +000067 VLAN:GSO + CKSUM + Data + skb_frags * DMA */
68#define MAX_SKB_TX_LE (2 + (sizeof(dma_addr_t)/sizeof(u32))*(MAX_SKB_FRAGS+1))
Stephen Hemmingere9c1be82009-06-17 07:30:37 +000069#define TX_MIN_PENDING (MAX_SKB_TX_LE+1)
stephen hemmingerefe91932010-04-22 13:42:56 +000070#define TX_MAX_PENDING 1024
stephen hemmingerb1cb8252011-11-16 13:42:58 +000071#define TX_DEF_PENDING 63
Stephen Hemminger793b8832005-09-14 16:06:14 -070072
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070073#define TX_WATCHDOG (5 * HZ)
74#define NAPI_WEIGHT 64
75#define PHY_RETRIES 1000
76
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070077#define SKY2_EEPROM_MAGIC 0x9955aabb
78
Mike McCormack060b9462010-07-29 03:34:52 +000079#define RING_NEXT(x, s) (((x)+1) & ((s)-1))
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070080
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070081static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070082 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
83 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080084 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070085
Stephen Hemminger793b8832005-09-14 16:06:14 -070086static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070087module_param(debug, int, 0);
88MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
89
Stephen Hemminger14d02632006-09-26 11:57:43 -070090static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080091module_param(copybreak, int, 0);
92MODULE_PARM_DESC(copybreak, "Receive copy threshold");
93
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080094static int disable_msi = 0;
95module_param(disable_msi, int, 0);
96MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
97
Stephen Hemmingere6cac9b2008-06-17 09:04:26 -070098static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -080099 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
100 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemmingere30a4ac2009-10-29 06:37:05 +0000101 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700102 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700103 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800104 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800106 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
107 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingera3b4fce2008-06-14 10:32:15 -0700119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4355) }, /* 88E8040T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000139 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700140 { 0 }
141};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700142
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700143MODULE_DEVICE_TABLE(pci, sky2_id_table);
144
145/* Avoid conditionals by using array */
146static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
147static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700148static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700149
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100150static void sky2_set_multicast(struct net_device *dev);
stephen hemminger0bdb0bd2011-09-23 11:13:40 +0000151static irqreturn_t sky2_intr(int irq, void *dev_id);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100152
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800153/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800154static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700155{
156 int i;
157
158 gma_write16(hw, port, GM_SMI_DATA, val);
159 gma_write16(hw, port, GM_SMI_CTRL,
160 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
161
162 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800163 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
164 if (ctrl == 0xffff)
165 goto io_error;
166
167 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800168 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800169
170 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700171 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800172
Mike McCormack060b9462010-07-29 03:34:52 +0000173 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800174 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800175
176io_error:
177 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
178 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700179}
180
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800181static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700182{
183 int i;
184
Stephen Hemminger793b8832005-09-14 16:06:14 -0700185 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700186 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
187
188 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800189 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
190 if (ctrl == 0xffff)
191 goto io_error;
192
193 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800194 *val = gma_read16(hw, port, GM_SMI_DATA);
195 return 0;
196 }
197
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800198 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700199 }
200
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800201 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800202 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800203io_error:
204 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
205 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800206}
207
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800208static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800209{
210 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800211 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800212 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700213}
214
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800215
216static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700217{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800218 /* switch power to VCC (WA for VAUX problem) */
219 sky2_write8(hw, B0_POWER_CTRL,
220 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700221
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800222 /* disable Core Clock Division, */
223 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700224
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000225 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800226 /* enable bits are inverted */
227 sky2_write8(hw, B2_Y2_CLK_GATE,
228 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
229 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
230 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
231 else
232 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700233
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700234 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700235 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700236
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800237 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700238
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800239 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700240 /* set all bits to 0 except bits 15..12 and 8 */
241 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800242 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700243
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800244 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700245 /* set all bits to 0 except bits 28 & 27 */
246 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800247 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700248
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800249 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700250
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000251 sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON);
252
Stephen Hemminger8f709202007-06-04 17:23:25 -0700253 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
254 reg = sky2_read32(hw, B2_GP_IO);
255 reg |= GLB_GPIO_STAT_RACE_DIS;
256 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700257
258 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700259 }
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000260
261 /* Turn on "driver loaded" LED */
262 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800263}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700264
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800265static void sky2_power_aux(struct sky2_hw *hw)
266{
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000267 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800268 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
269 else
270 /* enable bits are inverted */
271 sky2_write8(hw, B2_Y2_CLK_GATE,
272 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
273 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
274 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
275
Stephen Hemmingerc23ddf82009-09-03 06:16:25 +0000276 /* switch power to VAUX if supported and PME from D3cold */
277 if ( (sky2_read32(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
278 pci_pme_capable(hw->pdev, PCI_D3cold))
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800279 sky2_write8(hw, B0_POWER_CTRL,
280 (PC_VAUX_ENA | PC_VCC_ENA |
281 PC_VAUX_ON | PC_VCC_OFF));
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000282
283 /* turn off "driver loaded LED" */
284 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700285}
286
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700287static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700288{
289 u16 reg;
290
291 /* disable all GMAC IRQ's */
292 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700293
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700294 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
295 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
296 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
297 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
298
299 reg = gma_read16(hw, port, GM_RX_CTRL);
300 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
301 gma_write16(hw, port, GM_RX_CTRL, reg);
302}
303
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700304/* flow control to advertise bits */
305static const u16 copper_fc_adv[] = {
306 [FC_NONE] = 0,
307 [FC_TX] = PHY_M_AN_ASP,
308 [FC_RX] = PHY_M_AN_PC,
309 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
310};
311
312/* flow control to advertise bits when using 1000BaseX */
313static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700314 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700315 [FC_TX] = PHY_M_P_ASYM_MD_X,
316 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700317 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700318};
319
320/* flow control to GMA disable bits */
321static const u16 gm_fc_disable[] = {
322 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
323 [FC_TX] = GM_GPCR_FC_RX_DIS,
324 [FC_RX] = GM_GPCR_FC_TX_DIS,
325 [FC_BOTH] = 0,
326};
327
328
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700329static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
330{
331 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700332 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700333
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700334 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700335 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700336 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
337
338 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700339 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700340 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
341
Stephen Hemminger53419c62007-05-14 12:38:11 -0700342 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700343 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700344 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700345 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
346 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700347 /* set master & slave downshift counter to 1x */
348 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700349
350 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
351 }
352
353 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700354 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700355 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700356 /* enable automatic crossover */
357 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700358
359 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
360 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
361 u16 spec;
362
363 /* Enable Class A driver for FE+ A0 */
364 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
365 spec |= PHY_M_FESC_SEL_CL_A;
366 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
367 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700368 } else {
369 /* disable energy detect */
370 ctrl &= ~PHY_M_PC_EN_DET_MSK;
371
372 /* enable automatic crossover */
373 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
374
Stephen Hemminger53419c62007-05-14 12:38:11 -0700375 /* downshift on PHY 88E1112 and 88E1149 is changed */
Joe Perches8e95a202009-12-03 07:58:21 +0000376 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
377 (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700378 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700379 ctrl &= ~PHY_M_PC_DSC_MSK;
380 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
381 }
382 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700383 } else {
384 /* workaround for deviation #4.88 (CRC errors) */
385 /* disable Automatic Crossover */
386
387 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700388 }
389
390 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
391
392 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700393 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700394 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
395
396 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
397 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
398 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
399 ctrl &= ~PHY_M_MAC_MD_MSK;
400 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700401 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
402
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700403 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700404 /* select page 1 to access Fiber registers */
405 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700406
407 /* for SFP-module set SIGDET polarity to low */
408 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
409 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700410 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700411 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700412
413 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700414 }
415
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700416 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700417 ct1000 = 0;
418 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700419 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700420
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700421 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700422 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700423 if (sky2->advertising & ADVERTISED_1000baseT_Full)
424 ct1000 |= PHY_M_1000C_AFD;
425 if (sky2->advertising & ADVERTISED_1000baseT_Half)
426 ct1000 |= PHY_M_1000C_AHD;
427 if (sky2->advertising & ADVERTISED_100baseT_Full)
428 adv |= PHY_M_AN_100_FD;
429 if (sky2->advertising & ADVERTISED_100baseT_Half)
430 adv |= PHY_M_AN_100_HD;
431 if (sky2->advertising & ADVERTISED_10baseT_Full)
432 adv |= PHY_M_AN_10_FD;
433 if (sky2->advertising & ADVERTISED_10baseT_Half)
434 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700435
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700436 } else { /* special defines for FIBER (88E1040S only) */
437 if (sky2->advertising & ADVERTISED_1000baseT_Full)
438 adv |= PHY_M_AN_1000X_AFD;
439 if (sky2->advertising & ADVERTISED_1000baseT_Half)
440 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700441 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700442
443 /* Restart Auto-negotiation */
444 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
445 } else {
446 /* forced speed/duplex settings */
447 ct1000 = PHY_M_1000C_MSE;
448
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700449 /* Disable auto update for duplex flow control and duplex */
450 reg |= GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_SPD_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700451
452 switch (sky2->speed) {
453 case SPEED_1000:
454 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700455 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700456 break;
457 case SPEED_100:
458 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700459 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700460 break;
461 }
462
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700463 if (sky2->duplex == DUPLEX_FULL) {
464 reg |= GM_GPCR_DUP_FULL;
465 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700466 } else if (sky2->speed < SPEED_1000)
467 sky2->flow_mode = FC_NONE;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700468 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700469
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700470 if (sky2->flags & SKY2_FLAG_AUTO_PAUSE) {
471 if (sky2_is_copper(hw))
472 adv |= copper_fc_adv[sky2->flow_mode];
473 else
474 adv |= fiber_fc_adv[sky2->flow_mode];
475 } else {
476 reg |= GM_GPCR_AU_FCT_DIS;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700477 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700478
479 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700480 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700481 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
482 else
483 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700484 }
485
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700486 gma_write16(hw, port, GM_GP_CTRL, reg);
487
Stephen Hemminger05745c42007-09-19 15:36:45 -0700488 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700489 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
490
491 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
492 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
493
494 /* Setup Phy LED's */
495 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
496 ledover = 0;
497
498 switch (hw->chip_id) {
499 case CHIP_ID_YUKON_FE:
500 /* on 88E3082 these bits are at 11..9 (shifted left) */
501 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
502
503 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
504
505 /* delete ACT LED control bits */
506 ctrl &= ~PHY_M_FELP_LED1_MSK;
507 /* change ACT LED control to blink mode */
508 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
509 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
510 break;
511
Stephen Hemminger05745c42007-09-19 15:36:45 -0700512 case CHIP_ID_YUKON_FE_P:
513 /* Enable Link Partner Next Page */
514 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
515 ctrl |= PHY_M_PC_ENA_LIP_NP;
516
517 /* disable Energy Detect and enable scrambler */
518 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
519 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
520
521 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
522 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
523 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
524 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
525
526 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
527 break;
528
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700529 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700530 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700531
532 /* select page 3 to access LED control register */
533 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
534
535 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700536 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
537 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
538 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
539 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
540 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700541
542 /* set Polarity Control register */
543 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700544 (PHY_M_POLC_LS1_P_MIX(4) |
545 PHY_M_POLC_IS0_P_MIX(4) |
546 PHY_M_POLC_LOS_CTRL(2) |
547 PHY_M_POLC_INIT_CTRL(2) |
548 PHY_M_POLC_STA1_CTRL(2) |
549 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700550
551 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700552 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700553 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800554
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700555 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800556 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800557 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700558 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
559
560 /* select page 3 to access LED control register */
561 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
562
563 /* set LED Function Control register */
564 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
565 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
566 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
567 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
568 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
569
570 /* set Blink Rate in LED Timer Control Register */
571 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
572 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
573 /* restore page register */
574 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
575 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700576
577 default:
578 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
579 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800580
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700581 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800582 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700583 }
584
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700585 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800586 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700587 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
588
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800589 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700590 gm_phy_write(hw, port, 0x18, 0xaa99);
591 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700592
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700593 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
594 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
595 gm_phy_write(hw, port, 0x18, 0xa204);
596 gm_phy_write(hw, port, 0x17, 0x2002);
597 }
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800598
599 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700600 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700601 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
602 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
603 /* apply workaround for integrated resistors calibration */
604 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
605 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000606 } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
607 /* apply fixes in PHY AFE */
608 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
609
610 /* apply RDAC termination workaround */
611 gm_phy_write(hw, port, 24, 0x2800);
612 gm_phy_write(hw, port, 23, 0x2001);
613
614 /* set page register back to 0 */
615 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingere1a74b32008-06-17 09:04:24 -0700616 } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
617 hw->chip_id < CHIP_ID_YUKON_SUPR) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700618 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800619 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
620
Joe Perches8e95a202009-12-03 07:58:21 +0000621 if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) ||
622 sky2->speed == SPEED_100) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800623 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800624 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800625 }
626
627 if (ledover)
628 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
629
stephen hemminger4fb99cd2011-07-07 05:50:59 +0000630 } else if (hw->chip_id == CHIP_ID_YUKON_PRM &&
631 (sky2_read8(hw, B2_MAC_CFG) & 0xf) == 0x7) {
632 int i;
633 /* This a phy register setup workaround copied from vendor driver. */
634 static const struct {
635 u16 reg, val;
636 } eee_afe[] = {
637 { 0x156, 0x58ce },
638 { 0x153, 0x99eb },
639 { 0x141, 0x8064 },
640 /* { 0x155, 0x130b },*/
641 { 0x000, 0x0000 },
642 { 0x151, 0x8433 },
643 { 0x14b, 0x8c44 },
644 { 0x14c, 0x0f90 },
645 { 0x14f, 0x39aa },
646 /* { 0x154, 0x2f39 },*/
647 { 0x14d, 0xba33 },
648 { 0x144, 0x0048 },
649 { 0x152, 0x2010 },
650 /* { 0x158, 0x1223 },*/
651 { 0x140, 0x4444 },
652 { 0x154, 0x2f3b },
653 { 0x158, 0xb203 },
654 { 0x157, 0x2029 },
655 };
656
657 /* Start Workaround for OptimaEEE Rev.Z0 */
658 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fb);
659
660 gm_phy_write(hw, port, 1, 0x4099);
661 gm_phy_write(hw, port, 3, 0x1120);
662 gm_phy_write(hw, port, 11, 0x113c);
663 gm_phy_write(hw, port, 14, 0x8100);
664 gm_phy_write(hw, port, 15, 0x112a);
665 gm_phy_write(hw, port, 17, 0x1008);
666
667 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00fc);
668 gm_phy_write(hw, port, 1, 0x20b0);
669
670 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
671
672 for (i = 0; i < ARRAY_SIZE(eee_afe); i++) {
673 /* apply AFE settings */
674 gm_phy_write(hw, port, 17, eee_afe[i].val);
675 gm_phy_write(hw, port, 16, eee_afe[i].reg | 1u<<13);
676 }
677
678 /* End Workaround for OptimaEEE */
679 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
680
681 /* Enable 10Base-Te (EEE) */
682 if (hw->chip_id >= CHIP_ID_YUKON_PRM) {
683 reg = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
684 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL,
685 reg | PHY_M_10B_TE_ENABLE);
686 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700687 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700688
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700689 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700690 if (sky2->flags & SKY2_FLAG_AUTO_SPEED)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700691 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
692 else
693 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
694}
695
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700696static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
697static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
698
699static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700700{
701 u32 reg1;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700702
stephen hemmingera40ccc62010-01-24 18:46:06 +0000703 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800704 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700705 reg1 &= ~phy_power[port];
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700706
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000707 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerff35164e2007-10-11 19:47:44 -0700708 reg1 |= coma_mode[port];
709
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800710 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000711 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800712 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -0700713
714 if (hw->chip_id == CHIP_ID_YUKON_FE)
715 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE);
716 else if (hw->flags & SKY2_HW_ADV_POWER_CTL)
717 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700718}
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700719
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700720static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
721{
722 u32 reg1;
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700723 u16 ctrl;
724
725 /* release GPHY Control reset */
726 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
727
728 /* release GMAC reset */
729 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
730
731 if (hw->flags & SKY2_HW_NEWER_PHY) {
732 /* select page 2 to access MAC control register */
733 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
734
735 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
736 /* allow GMII Power Down */
737 ctrl &= ~PHY_M_MAC_GMIF_PUP;
738 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
739
740 /* set page register back to 0 */
741 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
742 }
743
744 /* setup General Purpose Control Register */
745 gma_write16(hw, port, GM_GP_CTRL,
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700746 GM_GPCR_FL_PASS | GM_GPCR_SPEED_100 |
747 GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS |
748 GM_GPCR_AU_SPD_DIS);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700749
750 if (hw->chip_id != CHIP_ID_YUKON_EC) {
751 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200752 /* select page 2 to access MAC control register */
753 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700754
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200755 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700756 /* enable Power Down */
757 ctrl |= PHY_M_PC_POW_D_ENA;
758 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200759
760 /* set page register back to 0 */
761 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700762 }
763
764 /* set IEEE compatible Power Down Mode (dev. #4.99) */
765 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
766 }
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700767
stephen hemmingera40ccc62010-01-24 18:46:06 +0000768 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700769 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700770 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700771 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000772 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700773}
774
stephen hemminger8e116802011-07-07 05:50:58 +0000775/* configure IPG according to used link speed */
776static void sky2_set_ipg(struct sky2_port *sky2)
777{
778 u16 reg;
779
780 reg = gma_read16(sky2->hw, sky2->port, GM_SERIAL_MODE);
781 reg &= ~GM_SMOD_IPG_MSK;
782 if (sky2->speed > SPEED_100)
783 reg |= IPG_DATA_VAL(IPG_DATA_DEF_1000);
784 else
785 reg |= IPG_DATA_VAL(IPG_DATA_DEF_10_100);
786 gma_write16(sky2->hw, sky2->port, GM_SERIAL_MODE, reg);
787}
788
Brandon Philips38000a92010-06-16 16:21:58 +0000789/* Enable Rx/Tx */
790static void sky2_enable_rx_tx(struct sky2_port *sky2)
791{
792 struct sky2_hw *hw = sky2->hw;
793 unsigned port = sky2->port;
794 u16 reg;
795
796 reg = gma_read16(hw, port, GM_GP_CTRL);
797 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
798 gma_write16(hw, port, GM_GP_CTRL, reg);
799}
800
Stephen Hemminger1b537562005-12-20 15:08:07 -0800801/* Force a renegotiation */
802static void sky2_phy_reinit(struct sky2_port *sky2)
803{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800804 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800805 sky2_phy_init(sky2->hw, sky2->port);
Brandon Philips38000a92010-06-16 16:21:58 +0000806 sky2_enable_rx_tx(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800807 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800808}
809
Stephen Hemmingere3173832007-02-06 10:45:39 -0800810/* Put device in state to listen for Wake On Lan */
811static void sky2_wol_init(struct sky2_port *sky2)
812{
813 struct sky2_hw *hw = sky2->hw;
814 unsigned port = sky2->port;
815 enum flow_control save_mode;
816 u16 ctrl;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800817
818 /* Bring hardware out of reset */
819 sky2_write16(hw, B0_CTST, CS_RST_CLR);
820 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
821
822 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
823 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
824
825 /* Force to 10/100
826 * sky2_reset will re-enable on resume
827 */
828 save_mode = sky2->flow_mode;
829 ctrl = sky2->advertising;
830
831 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
832 sky2->flow_mode = FC_NONE;
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700833
834 spin_lock_bh(&sky2->phy_lock);
835 sky2_phy_power_up(hw, port);
836 sky2_phy_init(hw, port);
837 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800838
839 sky2->flow_mode = save_mode;
840 sky2->advertising = ctrl;
841
842 /* Set GMAC to no flow control and auto update for speed/duplex */
843 gma_write16(hw, port, GM_GP_CTRL,
844 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
845 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
846
847 /* Set WOL address */
848 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
849 sky2->netdev->dev_addr, ETH_ALEN);
850
851 /* Turn on appropriate WOL control bits */
852 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
853 ctrl = 0;
854 if (sky2->wol & WAKE_PHY)
855 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
856 else
857 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
858
859 if (sky2->wol & WAKE_MAGIC)
860 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
861 else
Joe Perchesa419aef2009-08-18 11:18:35 -0700862 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800863
864 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
865 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
866
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000867 /* Disable PiG firmware */
868 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF);
869
Stephen Hemmingere3173832007-02-06 10:45:39 -0800870 /* block receiver */
871 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
stephen hemmingerf9687c42011-11-16 13:42:56 +0000872 sky2_read32(hw, B0_CTST);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800873}
874
Stephen Hemminger69161612007-06-04 17:23:26 -0700875static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
876{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700877 struct net_device *dev = hw->dev[port];
878
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800879 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
880 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
Stephen Hemminger877c8572009-10-29 06:37:08 +0000881 hw->chip_id >= CHIP_ID_YUKON_FE_P) {
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800882 /* Yukon-Extreme B0 and further Extreme devices */
stephen hemminger44dde562010-02-12 06:58:01 +0000883 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
884 } else if (dev->mtu > ETH_DATA_LEN) {
885 /* set Tx GMAC FIFO Almost Empty Threshold */
886 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
887 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger69161612007-06-04 17:23:26 -0700888
stephen hemminger44dde562010-02-12 06:58:01 +0000889 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
890 } else
891 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700892}
893
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700894static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
895{
896 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
897 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100898 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700899 int i;
900 const u8 *addr = hw->dev[port]->dev_addr;
901
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700902 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
903 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700904
905 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
906
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000907 if (hw->chip_id == CHIP_ID_YUKON_XL &&
908 hw->chip_rev == CHIP_REV_YU_XL_A0 &&
909 port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700910 /* WA DEV_472 -- looks like crossed wires on port 2 */
911 /* clear GMAC 1 Control reset */
912 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
913 do {
914 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
915 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
916 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
917 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
918 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
919 }
920
Stephen Hemminger793b8832005-09-14 16:06:14 -0700921 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700922
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700923 /* Enable Transmit FIFO Underrun */
924 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
925
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800926 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -0700927 sky2_phy_power_up(hw, port);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700928 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800929 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700930
931 /* MIB clear */
932 reg = gma_read16(hw, port, GM_PHY_ADDR);
933 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
934
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700935 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
936 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700937 gma_write16(hw, port, GM_PHY_ADDR, reg);
938
939 /* transmit control */
940 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
941
942 /* receive control reg: unicast + multicast + no FCS */
943 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700944 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700945
946 /* transmit flow control */
947 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
948
949 /* transmit parameter */
950 gma_write16(hw, port, GM_TX_PARAM,
951 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
952 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
953 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
954 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
955
956 /* serial mode register */
957 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
stephen hemminger8e116802011-07-07 05:50:58 +0000958 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF_1000);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700959
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700960 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700961 reg |= GM_SMOD_JUMBO_ENA;
962
stephen hemmingerc1cd0a82010-03-29 07:36:18 +0000963 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
964 hw->chip_rev == CHIP_REV_YU_EC_U_B1)
965 reg |= GM_NEW_FLOW_CTRL;
966
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700967 gma_write16(hw, port, GM_SERIAL_MODE, reg);
968
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700969 /* virtual address for data */
970 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
971
Stephen Hemminger793b8832005-09-14 16:06:14 -0700972 /* physical address: used for pause frames */
973 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
974
975 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700976 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
977 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
978 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
979
980 /* Configure Rx MAC FIFO */
981 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100982 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700983 if (hw->chip_id == CHIP_ID_YUKON_EX ||
984 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100985 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700986
Al Viro25cccec2007-07-20 16:07:33 +0100987 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700988
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800989 if (hw->chip_id == CHIP_ID_YUKON_XL) {
990 /* Hardware errata - clear flush mask */
991 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
992 } else {
993 /* Flush Rx MAC FIFO on any flow control or error */
994 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
995 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700996
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800997 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700998 reg = RX_GMF_FL_THR_DEF + 1;
999 /* Another magic mystery workaround from sk98lin */
1000 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
1001 hw->chip_rev == CHIP_REV_YU_FE2_A0)
1002 reg = 0x178;
1003 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001004
1005 /* Configure Tx MAC FIFO */
1006 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
1007 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001008
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001009 /* On chips without ram buffer, pause is controlled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001010 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +00001011 /* Pause threshold is scaled by 8 in bytes */
Joe Perches8e95a202009-12-03 07:58:21 +00001012 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
1013 hw->chip_rev == CHIP_REV_YU_FE2_A0)
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +00001014 reg = 1568 / 8;
1015 else
1016 reg = 1024 / 8;
1017 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg);
1018 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8);
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07001019
Stephen Hemminger69161612007-06-04 17:23:26 -07001020 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001021 }
1022
Stephen Hemmingere970d1f2007-11-27 11:02:07 -08001023 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
1024 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
1025 /* disable dynamic watermark */
1026 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
1027 reg &= ~TX_DYN_WM_ENA;
1028 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
1029 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001030}
1031
Stephen Hemminger67712902006-12-04 15:53:45 -08001032/* Assign Ram Buffer allocation to queue */
1033static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001034{
Stephen Hemminger67712902006-12-04 15:53:45 -08001035 u32 end;
1036
1037 /* convert from K bytes to qwords used for hw register */
1038 start *= 1024/8;
1039 space *= 1024/8;
1040 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001041
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001042 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
1043 sky2_write32(hw, RB_ADDR(q, RB_START), start);
1044 sky2_write32(hw, RB_ADDR(q, RB_END), end);
1045 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
1046 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
1047
1048 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001049 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001050
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001051 /* On receive queue's set the thresholds
1052 * give receiver priority when > 3/4 full
1053 * send pause when down to 2K
1054 */
1055 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
1056 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001057
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -08001058 tp = space - 2048/8;
1059 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
1060 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001061 } else {
1062 /* Enable store & forward on Tx queue's because
1063 * Tx FIFO is only 1K on Yukon
1064 */
1065 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
1066 }
1067
1068 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001069 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001070}
1071
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001072/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001073static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001074{
1075 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
1076 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
1077 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001078 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001079}
1080
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001081/* Setup prefetch unit registers. This is the interface between
1082 * hardware and driver list elements
1083 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001084static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001085 dma_addr_t addr, u32 last)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001086{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001087 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
1088 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001089 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr));
1090 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), lower_32_bits(addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001091 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
1092 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001093
1094 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001095}
1096
Mike McCormack9b289c32009-08-14 05:15:12 +00001097static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001098{
Mike McCormack9b289c32009-08-14 05:15:12 +00001099 struct sky2_tx_le *le = sky2->tx_le + *slot;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001100
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001101 *slot = RING_NEXT(*slot, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001102 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001103 return le;
1104}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001105
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001106static void tx_init(struct sky2_port *sky2)
1107{
1108 struct sky2_tx_le *le;
1109
1110 sky2->tx_prod = sky2->tx_cons = 0;
1111 sky2->tx_tcpsum = 0;
1112 sky2->tx_last_mss = 0;
stephen hemmingerec2a5462011-11-29 15:15:33 +00001113 netdev_reset_queue(sky2->netdev);
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001114
Mike McCormack9b289c32009-08-14 05:15:12 +00001115 le = get_tx_le(sky2, &sky2->tx_prod);
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001116 le->addr = 0;
1117 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001118 sky2->tx_last_upper = 0;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001119}
1120
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001121/* Update chip's next pointer */
1122static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001123{
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001124 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -08001125 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001126 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
1127
1128 /* Synchronize I/O on since next processor may write to tail */
1129 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001130}
1131
Stephen Hemminger793b8832005-09-14 16:06:14 -07001132
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001133static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
1134{
1135 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001136 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001137 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001138 return le;
1139}
1140
Mike McCormack060b9462010-07-29 03:34:52 +00001141static unsigned sky2_get_rx_threshold(struct sky2_port *sky2)
Mike McCormack39ef1102010-02-12 06:58:02 +00001142{
1143 unsigned size;
1144
1145 /* Space needed for frame data + headers rounded up */
1146 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1147
1148 /* Stopping point for hardware truncation */
1149 return (size - 8) / sizeof(u32);
1150}
1151
Mike McCormack060b9462010-07-29 03:34:52 +00001152static unsigned sky2_get_rx_data_size(struct sky2_port *sky2)
Mike McCormack39ef1102010-02-12 06:58:02 +00001153{
1154 struct rx_ring_info *re;
1155 unsigned size;
1156
1157 /* Space needed for frame data + headers rounded up */
1158 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1159
1160 sky2->rx_nfrags = size >> PAGE_SHIFT;
1161 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1162
1163 /* Compute residue after pages */
1164 size -= sky2->rx_nfrags << PAGE_SHIFT;
1165
1166 /* Optimize to handle small packets and headers */
1167 if (size < copybreak)
1168 size = copybreak;
1169 if (size < ETH_HLEN)
1170 size = ETH_HLEN;
1171
1172 return size;
1173}
1174
Stephen Hemminger14d02632006-09-26 11:57:43 -07001175/* Build description to hardware for one receive segment */
Mike McCormack060b9462010-07-29 03:34:52 +00001176static void sky2_rx_add(struct sky2_port *sky2, u8 op,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001177 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001178{
1179 struct sky2_rx_le *le;
1180
Stephen Hemminger86c68872008-01-10 16:14:12 -08001181 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001182 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001183 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001184 le->opcode = OP_ADDR64 | HW_OWNER;
1185 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001186
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001187 le = sky2_next_rx(sky2);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001188 le->addr = cpu_to_le32(lower_32_bits(map));
Stephen Hemminger734d1862005-12-09 11:35:00 -08001189 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001190 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001191}
1192
Stephen Hemminger14d02632006-09-26 11:57:43 -07001193/* Build description to hardware for one possibly fragmented skb */
1194static void sky2_rx_submit(struct sky2_port *sky2,
1195 const struct rx_ring_info *re)
1196{
1197 int i;
1198
1199 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1200
1201 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1202 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1203}
1204
1205
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001206static int sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001207 unsigned size)
1208{
1209 struct sk_buff *skb = re->skb;
1210 int i;
1211
1212 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001213 if (pci_dma_mapping_error(pdev, re->data_addr))
1214 goto mapping_error;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001215
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001216 dma_unmap_len_set(re, data_size, size);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001217
stephen hemminger3fbd9182010-02-01 13:45:41 +00001218 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Eric Dumazet9e903e02011-10-18 21:00:24 +00001219 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
stephen hemminger3fbd9182010-02-01 13:45:41 +00001220
Ian Campbell950a5a42011-09-21 21:53:18 +00001221 re->frag_addr[i] = skb_frag_dma_map(&pdev->dev, frag, 0,
Eric Dumazet9e903e02011-10-18 21:00:24 +00001222 skb_frag_size(frag),
Ian Campbell5d6bcdf2011-10-06 11:10:48 +01001223 DMA_FROM_DEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001224
Ian Campbell5d6bcdf2011-10-06 11:10:48 +01001225 if (dma_mapping_error(&pdev->dev, re->frag_addr[i]))
stephen hemminger3fbd9182010-02-01 13:45:41 +00001226 goto map_page_error;
1227 }
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001228 return 0;
stephen hemminger3fbd9182010-02-01 13:45:41 +00001229
1230map_page_error:
1231 while (--i >= 0) {
1232 pci_unmap_page(pdev, re->frag_addr[i],
Eric Dumazet9e903e02011-10-18 21:00:24 +00001233 skb_frag_size(&skb_shinfo(skb)->frags[i]),
stephen hemminger3fbd9182010-02-01 13:45:41 +00001234 PCI_DMA_FROMDEVICE);
1235 }
1236
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001237 pci_unmap_single(pdev, re->data_addr, dma_unmap_len(re, data_size),
stephen hemminger3fbd9182010-02-01 13:45:41 +00001238 PCI_DMA_FROMDEVICE);
1239
1240mapping_error:
1241 if (net_ratelimit())
1242 dev_warn(&pdev->dev, "%s: rx mapping error\n",
1243 skb->dev->name);
1244 return -EIO;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001245}
1246
1247static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1248{
1249 struct sk_buff *skb = re->skb;
1250 int i;
1251
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001252 pci_unmap_single(pdev, re->data_addr, dma_unmap_len(re, data_size),
Stephen Hemminger14d02632006-09-26 11:57:43 -07001253 PCI_DMA_FROMDEVICE);
1254
1255 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1256 pci_unmap_page(pdev, re->frag_addr[i],
Eric Dumazet9e903e02011-10-18 21:00:24 +00001257 skb_frag_size(&skb_shinfo(skb)->frags[i]),
Stephen Hemminger14d02632006-09-26 11:57:43 -07001258 PCI_DMA_FROMDEVICE);
1259}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001260
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001261/* Tell chip where to start receive checksum.
1262 * Actually has two checksums, but set both same to avoid possible byte
1263 * order problems.
1264 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001265static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001266{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001267 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001268
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001269 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1270 le->ctrl = 0;
1271 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001272
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001273 sky2_write32(sky2->hw,
1274 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
Michał Mirosławf5d64032011-04-10 03:13:21 +00001275 (sky2->netdev->features & NETIF_F_RXCSUM)
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07001276 ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001277}
1278
stephen hemminger00427a72011-11-16 13:42:59 +00001279/*
1280 * Fixed initial key as seed to RSS.
1281 */
1282static const uint32_t rss_init_key[10] = {
1283 0x7c3351da, 0x51c5cf4e, 0x44adbdd1, 0xe8d38d18, 0x48897c43,
1284 0xb1d60e7e, 0x6a3dd760, 0x01a2e453, 0x16f46f13, 0x1a0e7b30
1285};
1286
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001287/* Enable/disable receive hash calculation (RSS) */
Michał Mirosławc8f44af2011-11-15 15:29:55 +00001288static void rx_set_rss(struct net_device *dev, netdev_features_t features)
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001289{
1290 struct sky2_port *sky2 = netdev_priv(dev);
1291 struct sky2_hw *hw = sky2->hw;
1292 int i, nkeys = 4;
1293
1294 /* Supports IPv6 and other modes */
1295 if (hw->flags & SKY2_HW_NEW_LE) {
1296 nkeys = 10;
1297 sky2_write32(hw, SK_REG(sky2->port, RSS_CFG), HASH_ALL);
1298 }
1299
1300 /* Program RSS initial values */
Michał Mirosławf5d64032011-04-10 03:13:21 +00001301 if (features & NETIF_F_RXHASH) {
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001302 for (i = 0; i < nkeys; i++)
1303 sky2_write32(hw, SK_REG(sky2->port, RSS_KEY + i * 4),
stephen hemminger00427a72011-11-16 13:42:59 +00001304 rss_init_key[i]);
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001305
1306 /* Need to turn on (undocumented) flag to make hashing work */
1307 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T),
1308 RX_STFW_ENA);
1309
1310 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1311 BMU_ENA_RX_RSS_HASH);
1312 } else
1313 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1314 BMU_DIS_RX_RSS_HASH);
1315}
1316
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001317/*
1318 * The RX Stop command will not work for Yukon-2 if the BMU does not
1319 * reach the end of packet and since we can't make sure that we have
1320 * incoming data, we must reset the BMU while it is not doing a DMA
1321 * transfer. Since it is possible that the RX path is still active,
1322 * the RX RAM buffer will be stopped first, so any possible incoming
1323 * data will not trigger a DMA. After the RAM buffer is stopped, the
1324 * BMU is polled until any DMA in progress is ended and only then it
1325 * will be reset.
1326 */
1327static void sky2_rx_stop(struct sky2_port *sky2)
1328{
1329 struct sky2_hw *hw = sky2->hw;
1330 unsigned rxq = rxqaddr[sky2->port];
1331 int i;
1332
1333 /* disable the RAM Buffer receive queue */
1334 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1335
1336 for (i = 0; i < 0xffff; i++)
1337 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1338 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1339 goto stopped;
1340
Joe Perchesada1db52010-02-17 15:01:59 +00001341 netdev_warn(sky2->netdev, "receiver stop failed\n");
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001342stopped:
1343 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1344
1345 /* reset the Rx prefetch unit */
1346 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger3d1454dd2009-07-16 13:20:57 +00001347 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001348}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001349
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001350/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001351static void sky2_rx_clean(struct sky2_port *sky2)
1352{
1353 unsigned i;
1354
1355 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001356 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001357 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001358
1359 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001360 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001361 kfree_skb(re->skb);
1362 re->skb = NULL;
1363 }
1364 }
1365}
1366
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001367/* Basic MII support */
1368static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1369{
1370 struct mii_ioctl_data *data = if_mii(ifr);
1371 struct sky2_port *sky2 = netdev_priv(dev);
1372 struct sky2_hw *hw = sky2->hw;
1373 int err = -EOPNOTSUPP;
1374
1375 if (!netif_running(dev))
1376 return -ENODEV; /* Phy still in reset */
1377
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001378 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001379 case SIOCGMIIPHY:
1380 data->phy_id = PHY_ADDR_MARV;
1381
1382 /* fallthru */
1383 case SIOCGMIIREG: {
1384 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001385
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001386 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001387 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001388 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001389
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001390 data->val_out = val;
1391 break;
1392 }
1393
1394 case SIOCSMIIREG:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001395 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001396 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1397 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001398 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001399 break;
1400 }
1401 return err;
1402}
1403
Michał Mirosławf5d64032011-04-10 03:13:21 +00001404#define SKY2_VLAN_OFFLOADS (NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO)
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001405
Michał Mirosławc8f44af2011-11-15 15:29:55 +00001406static void sky2_vlan_mode(struct net_device *dev, netdev_features_t features)
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001407{
1408 struct sky2_port *sky2 = netdev_priv(dev);
1409 struct sky2_hw *hw = sky2->hw;
1410 u16 port = sky2->port;
1411
Michał Mirosławf5d64032011-04-10 03:13:21 +00001412 if (features & NETIF_F_HW_VLAN_RX)
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001413 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1414 RX_VLAN_STRIP_ON);
1415 else
1416 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1417 RX_VLAN_STRIP_OFF);
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001418
Michał Mirosławf5d64032011-04-10 03:13:21 +00001419 if (features & NETIF_F_HW_VLAN_TX) {
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001420 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1421 TX_VLAN_TAG_ON);
Michał Mirosławf5d64032011-04-10 03:13:21 +00001422
1423 dev->vlan_features |= SKY2_VLAN_OFFLOADS;
1424 } else {
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001425 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1426 TX_VLAN_TAG_OFF);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001427
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001428 /* Can't do transmit offload of vlan without hw vlan */
Michał Mirosławf5d64032011-04-10 03:13:21 +00001429 dev->vlan_features &= ~SKY2_VLAN_OFFLOADS;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001430 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001431}
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001432
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001433/* Amount of required worst case padding in rx buffer */
1434static inline unsigned sky2_rx_pad(const struct sky2_hw *hw)
1435{
1436 return (hw->flags & SKY2_HW_RAM_BUFFER) ? 8 : 2;
1437}
1438
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001439/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001440 * Allocate an skb for receiving. If the MTU is large enough
1441 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001442 */
Eric Dumazet68ac3192011-07-07 06:13:32 -07001443static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2, gfp_t gfp)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001444{
1445 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001446 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001447
Eric Dumazet68ac3192011-07-07 06:13:32 -07001448 skb = __netdev_alloc_skb(sky2->netdev,
1449 sky2->rx_data_size + sky2_rx_pad(sky2->hw),
1450 gfp);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001451 if (!skb)
1452 goto nomem;
1453
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001454 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001455 unsigned char *start;
1456 /*
1457 * Workaround for a bug in FIFO that cause hang
1458 * if the FIFO if the receive buffer is not 64 byte aligned.
1459 * The buffer returned from netdev_alloc_skb is
1460 * aligned except if slab debugging is enabled.
1461 */
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001462 start = PTR_ALIGN(skb->data, 8);
1463 skb_reserve(skb, start - skb->data);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001464 } else
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001465 skb_reserve(skb, NET_IP_ALIGN);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001466
1467 for (i = 0; i < sky2->rx_nfrags; i++) {
Eric Dumazet68ac3192011-07-07 06:13:32 -07001468 struct page *page = alloc_page(gfp);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001469
1470 if (!page)
1471 goto free_partial;
1472 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001473 }
1474
1475 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001476free_partial:
1477 kfree_skb(skb);
1478nomem:
1479 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001480}
1481
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001482static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1483{
1484 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1485}
1486
Mike McCormack200ac492010-02-12 06:58:03 +00001487static int sky2_alloc_rx_skbs(struct sky2_port *sky2)
1488{
1489 struct sky2_hw *hw = sky2->hw;
1490 unsigned i;
1491
1492 sky2->rx_data_size = sky2_get_rx_data_size(sky2);
1493
1494 /* Fill Rx ring */
1495 for (i = 0; i < sky2->rx_pending; i++) {
1496 struct rx_ring_info *re = sky2->rx_ring + i;
1497
Eric Dumazet68ac3192011-07-07 06:13:32 -07001498 re->skb = sky2_rx_alloc(sky2, GFP_KERNEL);
Mike McCormack200ac492010-02-12 06:58:03 +00001499 if (!re->skb)
1500 return -ENOMEM;
1501
1502 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) {
1503 dev_kfree_skb(re->skb);
1504 re->skb = NULL;
1505 return -ENOMEM;
1506 }
1507 }
1508 return 0;
1509}
1510
Stephen Hemminger82788c72006-01-17 13:43:10 -08001511/*
Mike McCormack200ac492010-02-12 06:58:03 +00001512 * Setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001513 * Normal case this ends up creating one list element for skb
1514 * in the receive ring. Worst case if using large MTU and each
1515 * allocation falls on a different 64 bit region, that results
1516 * in 6 list elements per ring entry.
1517 * One element is used for checksum enable/disable, and one
1518 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001519 */
Mike McCormack200ac492010-02-12 06:58:03 +00001520static void sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001521{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001522 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001523 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001524 unsigned rxq = rxqaddr[sky2->port];
Mike McCormack39ef1102010-02-12 06:58:02 +00001525 unsigned i, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001526
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001527 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001528 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001529
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001530 /* On PCI express lowering the watermark gives better performance */
Jon Mason1a10cca2011-06-27 07:46:56 +00001531 if (pci_is_pcie(hw->pdev))
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001532 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1533
1534 /* These chips have no ram buffer?
1535 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001536 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
stephen hemmingerc1cd0a82010-03-29 07:36:18 +00001537 hw->chip_rev > CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001538 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001539
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001540 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1541
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001542 if (!(hw->flags & SKY2_HW_NEW_LE))
1543 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001544
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001545 if (!(hw->flags & SKY2_HW_RSS_BROKEN))
Michał Mirosławf5d64032011-04-10 03:13:21 +00001546 rx_set_rss(sky2->netdev, sky2->netdev->features);
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001547
Mike McCormack200ac492010-02-12 06:58:03 +00001548 /* submit Rx ring */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001549 for (i = 0; i < sky2->rx_pending; i++) {
1550 re = sky2->rx_ring + i;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001551 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001552 }
1553
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001554 /*
1555 * The receiver hangs if it receives frames larger than the
1556 * packet buffer. As a workaround, truncate oversize frames, but
1557 * the register is limited to 9 bits, so if you do frames > 2052
1558 * you better get the MTU right!
1559 */
Mike McCormack39ef1102010-02-12 06:58:02 +00001560 thresh = sky2_get_rx_threshold(sky2);
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001561 if (thresh > 0x1ff)
1562 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1563 else {
1564 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1565 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1566 }
1567
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001568 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001569 sky2_rx_update(sky2, rxq);
Stephen Hemminger877c8572009-10-29 06:37:08 +00001570
1571 if (hw->chip_id == CHIP_ID_YUKON_EX ||
1572 hw->chip_id == CHIP_ID_YUKON_SUPR) {
1573 /*
1574 * Disable flushing of non ASF packets;
1575 * must be done after initializing the BMUs;
1576 * drivers without ASF support should do this too, otherwise
1577 * it may happen that they cannot run on ASF devices;
1578 * remember that the MAC FIFO isn't reset during initialization.
1579 */
1580 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF);
1581 }
1582
1583 if (hw->chip_id >= CHIP_ID_YUKON_SUPR) {
1584 /* Enable RX Home Address & Routing Header checksum fix */
1585 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL),
1586 RX_IPV6_SA_MOB_ENA | RX_IPV6_DA_MOB_ENA);
1587
1588 /* Enable TX Home Address & Routing Header checksum fix */
1589 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
1590 TBMU_TEST_HOME_ADD_FIX_EN | TBMU_TEST_ROUTING_ADD_FIX_EN);
1591 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001592}
1593
Mike McCormack90bbebb2009-09-01 03:21:35 +00001594static int sky2_alloc_buffers(struct sky2_port *sky2)
1595{
1596 struct sky2_hw *hw = sky2->hw;
1597
1598 /* must be power of 2 */
1599 sky2->tx_le = pci_alloc_consistent(hw->pdev,
1600 sky2->tx_ring_size *
1601 sizeof(struct sky2_tx_le),
1602 &sky2->tx_le_map);
1603 if (!sky2->tx_le)
1604 goto nomem;
1605
1606 sky2->tx_ring = kcalloc(sky2->tx_ring_size, sizeof(struct tx_ring_info),
1607 GFP_KERNEL);
1608 if (!sky2->tx_ring)
1609 goto nomem;
1610
1611 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1612 &sky2->rx_le_map);
1613 if (!sky2->rx_le)
1614 goto nomem;
1615 memset(sky2->rx_le, 0, RX_LE_BYTES);
1616
1617 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
1618 GFP_KERNEL);
1619 if (!sky2->rx_ring)
1620 goto nomem;
1621
Mike McCormack200ac492010-02-12 06:58:03 +00001622 return sky2_alloc_rx_skbs(sky2);
Mike McCormack90bbebb2009-09-01 03:21:35 +00001623nomem:
1624 return -ENOMEM;
1625}
1626
1627static void sky2_free_buffers(struct sky2_port *sky2)
1628{
1629 struct sky2_hw *hw = sky2->hw;
1630
Mike McCormack200ac492010-02-12 06:58:03 +00001631 sky2_rx_clean(sky2);
1632
Mike McCormack90bbebb2009-09-01 03:21:35 +00001633 if (sky2->rx_le) {
1634 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1635 sky2->rx_le, sky2->rx_le_map);
1636 sky2->rx_le = NULL;
1637 }
1638 if (sky2->tx_le) {
1639 pci_free_consistent(hw->pdev,
1640 sky2->tx_ring_size * sizeof(struct sky2_tx_le),
1641 sky2->tx_le, sky2->tx_le_map);
1642 sky2->tx_le = NULL;
1643 }
1644 kfree(sky2->tx_ring);
1645 kfree(sky2->rx_ring);
1646
1647 sky2->tx_ring = NULL;
1648 sky2->rx_ring = NULL;
1649}
1650
Mike McCormackea0f71e2010-02-12 06:58:04 +00001651static void sky2_hw_up(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001652{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001653 struct sky2_hw *hw = sky2->hw;
1654 unsigned port = sky2->port;
Mike McCormackea0f71e2010-02-12 06:58:04 +00001655 u32 ramsize;
1656 int cap;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001657 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001658
Mike McCormackea0f71e2010-02-12 06:58:04 +00001659 tx_init(sky2);
1660
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001661 /*
1662 * On dual port PCI-X card, there is an problem where status
1663 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001664 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001665 if (otherdev && netif_running(otherdev) &&
1666 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001667 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001668
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001669 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001670 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001671 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001672 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001673
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001674 sky2_mac_init(hw, port);
1675
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001676 /* Register is number of 4K blocks on internal RAM buffer. */
1677 ramsize = sky2_read8(hw, B2_E_0) * 4;
1678 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001679 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001680
Joe Perchesada1db52010-02-17 15:01:59 +00001681 netdev_dbg(sky2->netdev, "ram buffer %dK\n", ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001682 if (ramsize < 16)
1683 rxspace = ramsize / 2;
1684 else
1685 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001686
Stephen Hemminger67712902006-12-04 15:53:45 -08001687 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1688 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1689
1690 /* Make sure SyncQ is disabled */
1691 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1692 RB_RST_SET);
1693 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001694
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001695 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001696
Stephen Hemminger69161612007-06-04 17:23:26 -07001697 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1698 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1699 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1700
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001701 /* Set almost empty threshold */
Joe Perches8e95a202009-12-03 07:58:21 +00001702 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
1703 hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07001704 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001705
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001706 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001707 sky2->tx_ring_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001708
Michał Mirosławf5d64032011-04-10 03:13:21 +00001709 sky2_vlan_mode(sky2->netdev, sky2->netdev->features);
1710 netdev_update_features(sky2->netdev);
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001711
Mike McCormack200ac492010-02-12 06:58:03 +00001712 sky2_rx_start(sky2);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001713}
1714
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00001715/* Setup device IRQ and enable napi to process */
1716static int sky2_setup_irq(struct sky2_hw *hw, const char *name)
1717{
1718 struct pci_dev *pdev = hw->pdev;
1719 int err;
1720
1721 err = request_irq(pdev->irq, sky2_intr,
1722 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
1723 name, hw);
1724 if (err)
1725 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
1726 else {
stephen hemminger282edce2011-11-17 14:37:35 +00001727 hw->flags |= SKY2_HW_IRQ_SETUP;
1728
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00001729 napi_enable(&hw->napi);
1730 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
1731 sky2_read32(hw, B0_IMSK);
1732 }
1733
1734 return err;
1735}
1736
1737
Mike McCormackea0f71e2010-02-12 06:58:04 +00001738/* Bring up network interface. */
stephen hemminger926d0972011-11-16 13:42:57 +00001739static int sky2_open(struct net_device *dev)
Mike McCormackea0f71e2010-02-12 06:58:04 +00001740{
1741 struct sky2_port *sky2 = netdev_priv(dev);
1742 struct sky2_hw *hw = sky2->hw;
1743 unsigned port = sky2->port;
1744 u32 imask;
1745 int err;
1746
1747 netif_carrier_off(dev);
1748
1749 err = sky2_alloc_buffers(sky2);
1750 if (err)
1751 goto err_out;
1752
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00001753 /* With single port, IRQ is setup when device is brought up */
1754 if (hw->ports == 1 && (err = sky2_setup_irq(hw, dev->name)))
1755 goto err_out;
1756
Mike McCormackea0f71e2010-02-12 06:58:04 +00001757 sky2_hw_up(sky2);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001758
stephen hemminger1401a802011-11-16 13:42:55 +00001759 if (hw->chip_id == CHIP_ID_YUKON_OPT ||
1760 hw->chip_id == CHIP_ID_YUKON_PRM ||
1761 hw->chip_id == CHIP_ID_YUKON_OP_2)
1762 imask |= Y2_IS_PHY_QLNK; /* enable PHY Quick Link */
1763
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001764 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001765 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001766 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001767 sky2_write32(hw, B0_IMSK, imask);
Stephen Hemminger1fd82f32009-06-17 07:30:34 +00001768 sky2_read32(hw, B0_IMSK);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001769
Joe Perches6c35aba2010-02-15 08:34:21 +00001770 netif_info(sky2, ifup, dev, "enabling interface\n");
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07001771
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001772 return 0;
1773
1774err_out:
Mike McCormack90bbebb2009-09-01 03:21:35 +00001775 sky2_free_buffers(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001776 return err;
1777}
1778
Stephen Hemminger793b8832005-09-14 16:06:14 -07001779/* Modular subtraction in ring */
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001780static inline int tx_inuse(const struct sky2_port *sky2)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001781{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001782 return (sky2->tx_prod - sky2->tx_cons) & (sky2->tx_ring_size - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001783}
1784
1785/* Number of list elements available for next tx */
1786static inline int tx_avail(const struct sky2_port *sky2)
1787{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001788 return sky2->tx_pending - tx_inuse(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001789}
1790
1791/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001792static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001793{
1794 unsigned count;
1795
Stephen Hemminger07e31632009-09-14 06:12:55 +00001796 count = (skb_shinfo(skb)->nr_frags + 1)
1797 * (sizeof(dma_addr_t) / sizeof(u32));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001798
Herbert Xu89114af2006-07-08 13:34:32 -07001799 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001800 ++count;
Stephen Hemminger07e31632009-09-14 06:12:55 +00001801 else if (sizeof(dma_addr_t) == sizeof(u32))
1802 ++count; /* possible vlan */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001803
Patrick McHardy84fa7932006-08-29 16:44:56 -07001804 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001805 ++count;
1806
1807 return count;
1808}
1809
stephen hemmingerf6815072010-02-01 13:41:47 +00001810static void sky2_tx_unmap(struct pci_dev *pdev, struct tx_ring_info *re)
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001811{
1812 if (re->flags & TX_MAP_SINGLE)
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001813 pci_unmap_single(pdev, dma_unmap_addr(re, mapaddr),
1814 dma_unmap_len(re, maplen),
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001815 PCI_DMA_TODEVICE);
1816 else if (re->flags & TX_MAP_PAGE)
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001817 pci_unmap_page(pdev, dma_unmap_addr(re, mapaddr),
1818 dma_unmap_len(re, maplen),
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001819 PCI_DMA_TODEVICE);
stephen hemmingerf6815072010-02-01 13:41:47 +00001820 re->flags = 0;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001821}
1822
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001823/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001824 * Put one packet in ring for transmit.
1825 * A single packet can generate multiple list elements, and
1826 * the number of ring elements will probably be less than the number
1827 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001828 */
Stephen Hemminger613573252009-08-31 19:50:58 +00001829static netdev_tx_t sky2_xmit_frame(struct sk_buff *skb,
1830 struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001831{
1832 struct sky2_port *sky2 = netdev_priv(dev);
1833 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001834 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001835 struct tx_ring_info *re;
Mike McCormack9b289c32009-08-14 05:15:12 +00001836 unsigned i, len;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001837 dma_addr_t mapping;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001838 u32 upper;
1839 u16 slot;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001840 u16 mss;
1841 u8 ctrl;
1842
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001843 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1844 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001845
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001846 len = skb_headlen(skb);
1847 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001848
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001849 if (pci_dma_mapping_error(hw->pdev, mapping))
1850 goto mapping_error;
1851
Mike McCormack9b289c32009-08-14 05:15:12 +00001852 slot = sky2->tx_prod;
Joe Perches6c35aba2010-02-15 08:34:21 +00001853 netif_printk(sky2, tx_queued, KERN_DEBUG, dev,
1854 "tx queued, slot %u, len %d\n", slot, skb->len);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001855
Stephen Hemminger86c68872008-01-10 16:14:12 -08001856 /* Send high bits if needed */
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001857 upper = upper_32_bits(mapping);
1858 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001859 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001860 le->addr = cpu_to_le32(upper);
1861 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001862 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001863 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001864
1865 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001866 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001867 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001868
1869 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001870 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001871
Stephen Hemminger69161612007-06-04 17:23:26 -07001872 if (mss != sky2->tx_last_mss) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001873 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001874 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001875
1876 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001877 le->opcode = OP_MSS | HW_OWNER;
1878 else
1879 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001880 sky2->tx_last_mss = mss;
1881 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001882 }
1883
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001884 ctrl = 0;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001885
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001886 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
Jesse Grosseab6d182010-10-20 13:56:03 +00001887 if (vlan_tx_tag_present(skb)) {
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001888 if (!le) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001889 le = get_tx_le(sky2, &slot);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001890 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001891 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001892 } else
1893 le->opcode |= OP_VLAN;
1894 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1895 ctrl |= INS_VLAN;
1896 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001897
1898 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001899 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001900 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001901 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001902 ctrl |= CALSUM; /* auto checksum */
1903 else {
1904 const unsigned offset = skb_transport_offset(skb);
1905 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001906
Stephen Hemminger69161612007-06-04 17:23:26 -07001907 tcpsum = offset << 16; /* sum start */
1908 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001909
Stephen Hemminger69161612007-06-04 17:23:26 -07001910 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1911 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1912 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001913
Stephen Hemminger69161612007-06-04 17:23:26 -07001914 if (tcpsum != sky2->tx_tcpsum) {
1915 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001916
Mike McCormack9b289c32009-08-14 05:15:12 +00001917 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001918 le->addr = cpu_to_le32(tcpsum);
1919 le->length = 0; /* initial checksum value */
1920 le->ctrl = 1; /* one packet */
1921 le->opcode = OP_TCPLISW | HW_OWNER;
1922 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001923 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001924 }
1925
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001926 re = sky2->tx_ring + slot;
1927 re->flags = TX_MAP_SINGLE;
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001928 dma_unmap_addr_set(re, mapaddr, mapping);
1929 dma_unmap_len_set(re, maplen, len);
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001930
Mike McCormack9b289c32009-08-14 05:15:12 +00001931 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001932 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001933 le->length = cpu_to_le16(len);
1934 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001935 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001936
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001937
1938 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001939 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001940
Ian Campbell950a5a42011-09-21 21:53:18 +00001941 mapping = skb_frag_dma_map(&hw->pdev->dev, frag, 0,
Eric Dumazet9e903e02011-10-18 21:00:24 +00001942 skb_frag_size(frag), DMA_TO_DEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001943
Ian Campbell5d6bcdf2011-10-06 11:10:48 +01001944 if (dma_mapping_error(&hw->pdev->dev, mapping))
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001945 goto mapping_unwind;
1946
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001947 upper = upper_32_bits(mapping);
1948 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001949 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001950 le->addr = cpu_to_le32(upper);
1951 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001952 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001953 }
1954
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001955 re = sky2->tx_ring + slot;
1956 re->flags = TX_MAP_PAGE;
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001957 dma_unmap_addr_set(re, mapaddr, mapping);
Eric Dumazet9e903e02011-10-18 21:00:24 +00001958 dma_unmap_len_set(re, maplen, skb_frag_size(frag));
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001959
Mike McCormack9b289c32009-08-14 05:15:12 +00001960 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001961 le->addr = cpu_to_le32(lower_32_bits(mapping));
Eric Dumazet9e903e02011-10-18 21:00:24 +00001962 le->length = cpu_to_le16(skb_frag_size(frag));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001963 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001964 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001965 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001966
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001967 re->skb = skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001968 le->ctrl |= EOP;
1969
Mike McCormack9b289c32009-08-14 05:15:12 +00001970 sky2->tx_prod = slot;
1971
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001972 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1973 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001974
stephen hemmingerec2a5462011-11-29 15:15:33 +00001975 netdev_sent_queue(dev, skb->len);
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001976 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001977
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001978 return NETDEV_TX_OK;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001979
1980mapping_unwind:
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001981 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) {
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001982 re = sky2->tx_ring + i;
1983
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001984 sky2_tx_unmap(hw->pdev, re);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001985 }
1986
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001987mapping_error:
1988 if (net_ratelimit())
1989 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name);
1990 dev_kfree_skb(skb);
1991 return NETDEV_TX_OK;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001992}
1993
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001994/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001995 * Free ring elements from starting at tx_cons until "done"
1996 *
Stephen Hemminger481cea42009-08-14 15:33:19 -07001997 * NB:
1998 * 1. The hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001999 * buffers so make sure not to free skb to early.
Stephen Hemminger481cea42009-08-14 15:33:19 -07002000 * 2. This may run in parallel start_xmit because the it only
2001 * looks at the tail of the queue of FIFO (tx_cons), not
2002 * the head (tx_prod)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002003 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07002004static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002005{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07002006 struct net_device *dev = sky2->netdev;
stephen hemmingerec2a5462011-11-29 15:15:33 +00002007 u16 idx;
2008 unsigned int bytes_compl = 0, pkts_compl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002009
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00002010 BUG_ON(done >= sky2->tx_ring_size);
shemminger@osdl.org22247952005-11-30 11:45:19 -08002011
Stephen Hemminger291ea612006-09-26 11:57:41 -07002012 for (idx = sky2->tx_cons; idx != done;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00002013 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07002014 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00002015 struct sk_buff *skb = re->skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002016
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00002017 sky2_tx_unmap(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002018
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00002019 if (skb) {
Joe Perches6c35aba2010-02-15 08:34:21 +00002020 netif_printk(sky2, tx_done, KERN_DEBUG, dev,
2021 "tx done %u\n", idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07002022
stephen hemmingerec2a5462011-11-29 15:15:33 +00002023 pkts_compl++;
2024 bytes_compl += skb->len;
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08002025
stephen hemmingerf6815072010-02-01 13:41:47 +00002026 re->skb = NULL;
Stephen Hemminger724b6942009-08-18 15:17:10 +00002027 dev_kfree_skb_any(skb);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00002028
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00002029 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002030 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002031 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002032
Stephen Hemminger291ea612006-09-26 11:57:41 -07002033 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07002034 smp_mb();
stephen hemmingerec2a5462011-11-29 15:15:33 +00002035
2036 netdev_completed_queue(dev, pkts_compl, bytes_compl);
2037
2038 u64_stats_update_begin(&sky2->tx_stats.syncp);
2039 sky2->tx_stats.packets += pkts_compl;
2040 sky2->tx_stats.bytes += bytes_compl;
2041 u64_stats_update_end(&sky2->tx_stats.syncp);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002042}
2043
Mike McCormack264bb4f2009-08-14 05:15:14 +00002044static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)
Mike McCormacka5109962009-08-14 05:15:13 +00002045{
Mike McCormacka5109962009-08-14 05:15:13 +00002046 /* Disable Force Sync bit and Enable Alloc bit */
2047 sky2_write8(hw, SK_REG(port, TXA_CTRL),
2048 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
2049
2050 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
2051 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
2052 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
2053
2054 /* Reset the PCI FIFO of the async Tx queue */
2055 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
2056 BMU_RST_SET | BMU_FIFO_RST);
2057
2058 /* Reset the Tx prefetch units */
2059 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
2060 PREF_UNIT_RST_SET);
2061
2062 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
2063 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
stephen hemmingerf9687c42011-11-16 13:42:56 +00002064
2065 sky2_read32(hw, B0_CTST);
Mike McCormacka5109962009-08-14 05:15:13 +00002066}
2067
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002068static void sky2_hw_down(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002069{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002070 struct sky2_hw *hw = sky2->hw;
2071 unsigned port = sky2->port;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002072 u16 ctrl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002073
Stephen Hemmingerd104aca2009-06-17 07:30:32 +00002074 /* Force flow control off */
2075 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002076
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002077 /* Stop transmitter */
2078 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
2079 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
2080
2081 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07002082 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002083
2084 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002085 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002086 gma_write16(hw, port, GM_GP_CTRL, ctrl);
2087
2088 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
2089
2090 /* Workaround shared GMAC reset */
Joe Perches8e95a202009-12-03 07:58:21 +00002091 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 &&
2092 port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002093 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
2094
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002095 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002096
Linus Torvalds8a9ea322011-10-25 13:25:22 +02002097 /* Force any delayed status interrupt and NAPI */
Stephen Hemminger6c835042009-06-17 07:30:35 +00002098 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0);
2099 sky2_write32(hw, STAT_TX_TIMER_CNT, 0);
2100 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0);
2101 sky2_read8(hw, STAT_ISR_TIMER_CTRL);
2102
Mike McCormacka947a392009-07-21 20:57:56 -07002103 sky2_rx_stop(sky2);
2104
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00002105 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936da72008-05-14 17:04:15 -07002106 sky2_phy_power_down(hw, port);
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00002107 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07002108
Mike McCormack264bb4f2009-08-14 05:15:14 +00002109 sky2_tx_reset(hw, port);
2110
Stephen Hemminger481cea42009-08-14 15:33:19 -07002111 /* Free any pending frames stuck in HW queue */
2112 sky2_tx_complete(sky2, sky2->tx_prod);
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002113}
2114
2115/* Network shutdown */
stephen hemminger926d0972011-11-16 13:42:57 +00002116static int sky2_close(struct net_device *dev)
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002117{
2118 struct sky2_port *sky2 = netdev_priv(dev);
Mike McCormack8a0c9222010-02-12 06:58:06 +00002119 struct sky2_hw *hw = sky2->hw;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002120
2121 /* Never really got started! */
2122 if (!sky2->tx_le)
2123 return 0;
2124
Joe Perches6c35aba2010-02-15 08:34:21 +00002125 netif_info(sky2, ifdown, dev, "disabling interface\n");
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002126
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00002127 if (hw->ports == 1) {
stephen hemminger1401a802011-11-16 13:42:55 +00002128 sky2_write32(hw, B0_IMSK, 0);
2129 sky2_read32(hw, B0_IMSK);
2130
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00002131 napi_disable(&hw->napi);
2132 free_irq(hw->pdev->irq, hw);
stephen hemminger282edce2011-11-17 14:37:35 +00002133 hw->flags &= ~SKY2_HW_IRQ_SETUP;
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00002134 } else {
stephen hemminger1401a802011-11-16 13:42:55 +00002135 u32 imask;
2136
2137 /* Disable port IRQ */
2138 imask = sky2_read32(hw, B0_IMSK);
2139 imask &= ~portirq_msk[sky2->port];
2140 sky2_write32(hw, B0_IMSK, imask);
2141 sky2_read32(hw, B0_IMSK);
2142
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00002143 synchronize_irq(hw->pdev->irq);
2144 napi_synchronize(&hw->napi);
2145 }
Mike McCormack8a0c9222010-02-12 06:58:06 +00002146
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002147 sky2_hw_down(sky2);
Stephen Hemminger481cea42009-08-14 15:33:19 -07002148
Mike McCormack90bbebb2009-09-01 03:21:35 +00002149 sky2_free_buffers(sky2);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002150
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002151 return 0;
2152}
2153
2154static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
2155{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002156 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002157 return SPEED_1000;
2158
Stephen Hemminger05745c42007-09-19 15:36:45 -07002159 if (!(hw->flags & SKY2_HW_GIGABIT)) {
2160 if (aux & PHY_M_PS_SPEED_100)
2161 return SPEED_100;
2162 else
2163 return SPEED_10;
2164 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002165
2166 switch (aux & PHY_M_PS_SPEED_MSK) {
2167 case PHY_M_PS_SPEED_1000:
2168 return SPEED_1000;
2169 case PHY_M_PS_SPEED_100:
2170 return SPEED_100;
2171 default:
2172 return SPEED_10;
2173 }
2174}
2175
2176static void sky2_link_up(struct sky2_port *sky2)
2177{
2178 struct sky2_hw *hw = sky2->hw;
2179 unsigned port = sky2->port;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002180 static const char *fc_name[] = {
2181 [FC_NONE] = "none",
2182 [FC_TX] = "tx",
2183 [FC_RX] = "rx",
2184 [FC_BOTH] = "both",
2185 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002186
stephen hemminger8e116802011-07-07 05:50:58 +00002187 sky2_set_ipg(sky2);
2188
Brandon Philips38000a92010-06-16 16:21:58 +00002189 sky2_enable_rx_tx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002190
2191 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
2192
2193 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002194
Stephen Hemminger75e80682007-09-19 15:36:46 -07002195 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002196
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002197 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002198 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002199 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
2200
Joe Perches6c35aba2010-02-15 08:34:21 +00002201 netif_info(sky2, link, sky2->netdev,
2202 "Link is up at %d Mbps, %s duplex, flow control %s\n",
2203 sky2->speed,
2204 sky2->duplex == DUPLEX_FULL ? "full" : "half",
2205 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002206}
2207
2208static void sky2_link_down(struct sky2_port *sky2)
2209{
2210 struct sky2_hw *hw = sky2->hw;
2211 unsigned port = sky2->port;
2212 u16 reg;
2213
2214 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
2215
2216 reg = gma_read16(hw, port, GM_GP_CTRL);
2217 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
2218 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002219
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002220 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002221
Brandon Philips809aaaa2009-10-29 17:01:49 -07002222 /* Turn off link LED */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002223 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
2224
Joe Perches6c35aba2010-02-15 08:34:21 +00002225 netif_info(sky2, link, sky2->netdev, "Link is down\n");
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002226
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002227 sky2_phy_init(hw, port);
2228}
2229
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002230static enum flow_control sky2_flow(int rx, int tx)
2231{
2232 if (rx)
2233 return tx ? FC_BOTH : FC_RX;
2234 else
2235 return tx ? FC_TX : FC_NONE;
2236}
2237
Stephen Hemminger793b8832005-09-14 16:06:14 -07002238static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
2239{
2240 struct sky2_hw *hw = sky2->hw;
2241 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002242 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002243
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002244 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002245 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002246 if (lpa & PHY_M_AN_RF) {
Joe Perchesada1db52010-02-17 15:01:59 +00002247 netdev_err(sky2->netdev, "remote fault\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002248 return -1;
2249 }
2250
Stephen Hemminger793b8832005-09-14 16:06:14 -07002251 if (!(aux & PHY_M_PS_SPDUP_RES)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002252 netdev_err(sky2->netdev, "speed/duplex mismatch\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002253 return -1;
2254 }
2255
Stephen Hemminger793b8832005-09-14 16:06:14 -07002256 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07002257 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002258
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002259 /* Since the pause result bits seem to in different positions on
2260 * different chips. look at registers.
2261 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002262 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002263 /* Shift for bits in fiber PHY */
2264 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
2265 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002266
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002267 if (advert & ADVERTISE_1000XPAUSE)
2268 advert |= ADVERTISE_PAUSE_CAP;
2269 if (advert & ADVERTISE_1000XPSE_ASYM)
2270 advert |= ADVERTISE_PAUSE_ASYM;
2271 if (lpa & LPA_1000XPAUSE)
2272 lpa |= LPA_PAUSE_CAP;
2273 if (lpa & LPA_1000XPAUSE_ASYM)
2274 lpa |= LPA_PAUSE_ASYM;
2275 }
2276
2277 sky2->flow_status = FC_NONE;
2278 if (advert & ADVERTISE_PAUSE_CAP) {
2279 if (lpa & LPA_PAUSE_CAP)
2280 sky2->flow_status = FC_BOTH;
2281 else if (advert & ADVERTISE_PAUSE_ASYM)
2282 sky2->flow_status = FC_RX;
2283 } else if (advert & ADVERTISE_PAUSE_ASYM) {
2284 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
2285 sky2->flow_status = FC_TX;
2286 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002287
Joe Perches8e95a202009-12-03 07:58:21 +00002288 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 &&
2289 !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002290 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002291
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002292 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002293 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
2294 else
2295 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2296
2297 return 0;
2298}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002299
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002300/* Interrupt from PHY */
2301static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002302{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002303 struct net_device *dev = hw->dev[port];
2304 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002305 u16 istatus, phystat;
2306
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07002307 if (!netif_running(dev))
2308 return;
2309
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002310 spin_lock(&sky2->phy_lock);
2311 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
2312 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
2313
Joe Perches6c35aba2010-02-15 08:34:21 +00002314 netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n",
2315 istatus, phystat);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002316
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07002317 if (istatus & PHY_M_IS_AN_COMPL) {
stephen hemminger9badba22010-03-29 07:36:20 +00002318 if (sky2_autoneg_done(sky2, phystat) == 0 &&
2319 !netif_carrier_ok(dev))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002320 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002321 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002322 }
2323
Stephen Hemminger793b8832005-09-14 16:06:14 -07002324 if (istatus & PHY_M_IS_LSP_CHANGE)
2325 sky2->speed = sky2_phy_speed(hw, phystat);
2326
2327 if (istatus & PHY_M_IS_DUP_CHANGE)
2328 sky2->duplex =
2329 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
2330
2331 if (istatus & PHY_M_IS_LST_CHANGE) {
2332 if (phystat & PHY_M_PS_LINK_UP)
2333 sky2_link_up(sky2);
2334 else
2335 sky2_link_down(sky2);
2336 }
2337out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002338 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002339}
2340
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002341/* Special quick link interrupt (Yukon-2 Optima only) */
2342static void sky2_qlink_intr(struct sky2_hw *hw)
2343{
2344 struct sky2_port *sky2 = netdev_priv(hw->dev[0]);
2345 u32 imask;
2346 u16 phy;
2347
2348 /* disable irq */
2349 imask = sky2_read32(hw, B0_IMSK);
2350 imask &= ~Y2_IS_PHY_QLNK;
2351 sky2_write32(hw, B0_IMSK, imask);
2352
2353 /* reset PHY Link Detect */
2354 phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002355 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002356 sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002357 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002358
2359 sky2_link_up(sky2);
2360}
2361
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002362/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08002363 * and tx queue is full (stopped).
2364 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002365static void sky2_tx_timeout(struct net_device *dev)
2366{
2367 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002368 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002369
Joe Perches6c35aba2010-02-15 08:34:21 +00002370 netif_err(sky2, timer, dev, "tx timeout\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002371
Joe Perchesada1db52010-02-17 15:01:59 +00002372 netdev_printk(KERN_DEBUG, dev, "transmit ring %u .. %u report=%u done=%u\n",
2373 sky2->tx_cons, sky2->tx_prod,
2374 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
2375 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002376
Stephen Hemminger81906792007-02-15 16:40:33 -08002377 /* can't restart safely under softirq */
2378 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002379}
2380
2381static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2382{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002383 struct sky2_port *sky2 = netdev_priv(dev);
2384 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002385 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002386 int err;
2387 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002388 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002389
stephen hemminger44dde562010-02-12 06:58:01 +00002390 /* MTU size outside the spec */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002391 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2392 return -EINVAL;
2393
stephen hemminger44dde562010-02-12 06:58:01 +00002394 /* MTU > 1500 on yukon FE and FE+ not allowed */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002395 if (new_mtu > ETH_DATA_LEN &&
2396 (hw->chip_id == CHIP_ID_YUKON_FE ||
2397 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002398 return -EINVAL;
2399
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002400 if (!netif_running(dev)) {
2401 dev->mtu = new_mtu;
Michał Mirosławf5d64032011-04-10 03:13:21 +00002402 netdev_update_features(dev);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002403 return 0;
2404 }
2405
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002406 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002407 sky2_write32(hw, B0_IMSK, 0);
2408
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002409 dev->trans_start = jiffies; /* prevent tx timeout */
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002410 napi_disable(&hw->napi);
Mike McCormackdf010932010-05-13 06:12:49 +00002411 netif_tx_disable(dev);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002412
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002413 synchronize_irq(hw->pdev->irq);
2414
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002415 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002416 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002417
2418 ctl = gma_read16(hw, port, GM_GP_CTRL);
2419 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002420 sky2_rx_stop(sky2);
2421 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002422
2423 dev->mtu = new_mtu;
Michał Mirosławf5d64032011-04-10 03:13:21 +00002424 netdev_update_features(dev);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002425
stephen hemminger8e116802011-07-07 05:50:58 +00002426 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) | GM_SMOD_VLAN_ENA;
2427 if (sky2->speed > SPEED_100)
2428 mode |= IPG_DATA_VAL(IPG_DATA_DEF_1000);
2429 else
2430 mode |= IPG_DATA_VAL(IPG_DATA_DEF_10_100);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002431
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002432 if (dev->mtu > ETH_DATA_LEN)
2433 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002434
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002435 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002436
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002437 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002438
Mike McCormack200ac492010-02-12 06:58:03 +00002439 err = sky2_alloc_rx_skbs(sky2);
2440 if (!err)
2441 sky2_rx_start(sky2);
2442 else
2443 sky2_rx_clean(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002444 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002445
David S. Millerd1d08d12008-01-07 20:53:33 -08002446 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002447 napi_enable(&hw->napi);
2448
Stephen Hemminger1b537562005-12-20 15:08:07 -08002449 if (err)
2450 dev_close(dev);
2451 else {
Stephen Hemmingerb628ed982007-04-11 14:48:01 -07002452 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002453
Stephen Hemminger1b537562005-12-20 15:08:07 -08002454 netif_wake_queue(dev);
2455 }
2456
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002457 return err;
2458}
2459
Stephen Hemminger14d02632006-09-26 11:57:43 -07002460/* For small just reuse existing skb for next receive */
2461static struct sk_buff *receive_copy(struct sky2_port *sky2,
2462 const struct rx_ring_info *re,
2463 unsigned length)
2464{
2465 struct sk_buff *skb;
2466
Eric Dumazet89d71a62009-10-13 05:34:20 +00002467 skb = netdev_alloc_skb_ip_align(sky2->netdev, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002468 if (likely(skb)) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07002469 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2470 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002471 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002472 skb->ip_summed = re->skb->ip_summed;
2473 skb->csum = re->skb->csum;
2474 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2475 length, PCI_DMA_FROMDEVICE);
2476 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002477 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002478 }
2479 return skb;
2480}
2481
2482/* Adjust length of skb with fragments to match received data */
2483static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2484 unsigned int length)
2485{
2486 int i, num_frags;
2487 unsigned int size;
2488
2489 /* put header into skb */
2490 size = min(length, hdr_space);
2491 skb->tail += size;
2492 skb->len += size;
2493 length -= size;
2494
2495 num_frags = skb_shinfo(skb)->nr_frags;
2496 for (i = 0; i < num_frags; i++) {
2497 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2498
2499 if (length == 0) {
2500 /* don't need this page */
Ian Campbell950a5a42011-09-21 21:53:18 +00002501 __skb_frag_unref(frag);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002502 --skb_shinfo(skb)->nr_frags;
2503 } else {
2504 size = min(length, (unsigned) PAGE_SIZE);
2505
Eric Dumazet9e903e02011-10-18 21:00:24 +00002506 skb_frag_size_set(frag, size);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002507 skb->data_len += size;
Eric Dumazet7ae60b32011-10-13 17:12:46 -04002508 skb->truesize += PAGE_SIZE;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002509 skb->len += size;
2510 length -= size;
2511 }
2512 }
2513}
2514
2515/* Normal packet - take skb from ring element and put in a new one */
2516static struct sk_buff *receive_new(struct sky2_port *sky2,
2517 struct rx_ring_info *re,
2518 unsigned int length)
2519{
stephen hemminger3fbd9182010-02-01 13:45:41 +00002520 struct sk_buff *skb;
2521 struct rx_ring_info nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002522 unsigned hdr_space = sky2->rx_data_size;
2523
Eric Dumazet68ac3192011-07-07 06:13:32 -07002524 nre.skb = sky2_rx_alloc(sky2, GFP_ATOMIC);
stephen hemminger3fbd9182010-02-01 13:45:41 +00002525 if (unlikely(!nre.skb))
2526 goto nobuf;
2527
2528 if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space))
2529 goto nomap;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002530
2531 skb = re->skb;
2532 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002533 prefetch(skb->data);
stephen hemminger3fbd9182010-02-01 13:45:41 +00002534 *re = nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002535
2536 if (skb_shinfo(skb)->nr_frags)
2537 skb_put_frags(skb, hdr_space, length);
2538 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002539 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002540 return skb;
stephen hemminger3fbd9182010-02-01 13:45:41 +00002541
2542nomap:
2543 dev_kfree_skb(nre.skb);
2544nobuf:
2545 return NULL;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002546}
2547
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002548/*
2549 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002550 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002551 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002552static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002553 u16 length, u32 status)
2554{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002555 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002556 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002557 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002558 u16 count = (status & GMR_FS_LEN) >> 16;
2559
Stephen Hemminger86aa7782011-01-09 15:54:15 -08002560 if (status & GMR_FS_VLAN)
2561 count -= VLAN_HLEN; /* Account for vlan tag */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002562
Joe Perches6c35aba2010-02-15 08:34:21 +00002563 netif_printk(sky2, rx_status, KERN_DEBUG, dev,
2564 "rx slot %u status 0x%x len %d\n",
2565 sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002566
Stephen Hemminger793b8832005-09-14 16:06:14 -07002567 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002568 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002569
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002570 /* This chip has hardware problems that generates bogus status.
2571 * So do only marginal checking and expect higher level protocols
2572 * to handle crap frames.
2573 */
2574 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2575 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2576 length != count)
2577 goto okay;
2578
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002579 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002580 goto error;
2581
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002582 if (!(status & GMR_FS_RX_OK))
2583 goto resubmit;
2584
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002585 /* if length reported by DMA does not match PHY, packet was truncated */
2586 if (length != count)
stephen hemminger0885a302010-12-31 15:34:27 +00002587 goto error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002588
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002589okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002590 if (length < copybreak)
2591 skb = receive_copy(sky2, re, length);
2592 else
2593 skb = receive_new(sky2, re, length);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002594
2595 dev->stats.rx_dropped += (skb == NULL);
2596
Stephen Hemminger793b8832005-09-14 16:06:14 -07002597resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002598 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002599
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002600 return skb;
2601
2602error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002603 ++dev->stats.rx_errors;
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002604
Joe Perches6c35aba2010-02-15 08:34:21 +00002605 if (net_ratelimit())
2606 netif_info(sky2, rx_err, dev,
2607 "rx error, status 0x%x length %d\n", status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002608
Stephen Hemminger793b8832005-09-14 16:06:14 -07002609 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002610}
2611
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002612/* Transmit complete */
2613static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002614{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002615 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002616
Mike McCormack8a0c9222010-02-12 06:58:06 +00002617 if (netif_running(dev)) {
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002618 sky2_tx_complete(sky2, last);
Mike McCormack8a0c9222010-02-12 06:58:06 +00002619
stephen hemminger926d0972011-11-16 13:42:57 +00002620 /* Wake unless it's detached, and called e.g. from sky2_close() */
Mike McCormack8a0c9222010-02-12 06:58:06 +00002621 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
2622 netif_wake_queue(dev);
2623 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002624}
2625
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002626static inline void sky2_skb_rx(const struct sky2_port *sky2,
2627 u32 status, struct sk_buff *skb)
2628{
Stephen Hemminger86aa7782011-01-09 15:54:15 -08002629 if (status & GMR_FS_VLAN)
2630 __vlan_hwaccel_put_tag(skb, be16_to_cpu(sky2->rx_tag));
2631
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002632 if (skb->ip_summed == CHECKSUM_NONE)
2633 netif_receive_skb(skb);
2634 else
2635 napi_gro_receive(&sky2->hw->napi, skb);
2636}
2637
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002638static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port,
2639 unsigned packets, unsigned bytes)
2640{
stephen hemminger0885a302010-12-31 15:34:27 +00002641 struct net_device *dev = hw->dev[port];
2642 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002643
stephen hemminger0885a302010-12-31 15:34:27 +00002644 if (packets == 0)
2645 return;
2646
2647 u64_stats_update_begin(&sky2->rx_stats.syncp);
2648 sky2->rx_stats.packets += packets;
2649 sky2->rx_stats.bytes += bytes;
2650 u64_stats_update_end(&sky2->rx_stats.syncp);
2651
2652 dev->last_rx = jiffies;
2653 sky2_rx_update(netdev_priv(dev), rxqaddr[port]);
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002654}
2655
stephen hemminger375c5682010-02-07 06:28:36 +00002656static void sky2_rx_checksum(struct sky2_port *sky2, u32 status)
2657{
2658 /* If this happens then driver assuming wrong format for chip type */
2659 BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE);
2660
2661 /* Both checksum counters are programmed to start at
2662 * the same offset, so unless there is a problem they
2663 * should match. This failure is an early indication that
2664 * hardware receive checksumming won't work.
2665 */
2666 if (likely((u16)(status >> 16) == (u16)status)) {
2667 struct sk_buff *skb = sky2->rx_ring[sky2->rx_next].skb;
2668 skb->ip_summed = CHECKSUM_COMPLETE;
2669 skb->csum = le16_to_cpu(status);
2670 } else {
2671 dev_notice(&sky2->hw->pdev->dev,
2672 "%s: receive checksum problem (status = %#x)\n",
2673 sky2->netdev->name, status);
2674
Michał Mirosławf5d64032011-04-10 03:13:21 +00002675 /* Disable checksum offload
2676 * It will be reenabled on next ndo_set_features, but if it's
2677 * really broken, will get disabled again
2678 */
2679 sky2->netdev->features &= ~NETIF_F_RXCSUM;
stephen hemminger375c5682010-02-07 06:28:36 +00002680 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
2681 BMU_DIS_RX_CHKSUM);
2682 }
2683}
2684
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002685static void sky2_rx_hash(struct sky2_port *sky2, u32 status)
2686{
2687 struct sk_buff *skb;
2688
2689 skb = sky2->rx_ring[sky2->rx_next].skb;
2690 skb->rxhash = le32_to_cpu(status);
2691}
2692
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002693/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002694static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002695{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002696 int work_done = 0;
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002697 unsigned int total_bytes[2] = { 0 };
2698 unsigned int total_packets[2] = { 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002699
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002700 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002701 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002702 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002703 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002704 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002705 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002706 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002707 u32 status;
2708 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002709 u8 opcode = le->opcode;
2710
2711 if (!(opcode & HW_OWNER))
2712 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002713
stephen hemmingerefe91932010-04-22 13:42:56 +00002714 hw->st_idx = RING_NEXT(hw->st_idx, hw->st_size);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002715
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002716 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002717 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002718 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002719 length = le16_to_cpu(le->length);
2720 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002721
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002722 le->opcode = 0;
2723 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002724 case OP_RXSTAT:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002725 total_packets[port]++;
2726 total_bytes[port] += length;
Stephen Hemminger90c30332010-02-03 08:31:12 +00002727
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002728 skb = sky2_receive(dev, length, status);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002729 if (!skb)
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002730 break;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002731
Stephen Hemminger69161612007-06-04 17:23:26 -07002732 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002733 if (hw->flags & SKY2_HW_NEW_LE) {
Michał Mirosławf5d64032011-04-10 03:13:21 +00002734 if ((dev->features & NETIF_F_RXCSUM) &&
Stephen Hemminger69161612007-06-04 17:23:26 -07002735 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2736 (le->css & CSS_TCPUDPCSOK))
2737 skb->ip_summed = CHECKSUM_UNNECESSARY;
2738 else
2739 skb->ip_summed = CHECKSUM_NONE;
2740 }
2741
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002742 skb->protocol = eth_type_trans(skb, dev);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002743
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002744 sky2_skb_rx(sky2, status, skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002745
Stephen Hemminger22e11702006-07-12 15:23:48 -07002746 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002747 if (++work_done >= to_do)
2748 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002749 break;
2750
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002751 case OP_RXVLAN:
2752 sky2->rx_tag = length;
2753 break;
2754
2755 case OP_RXCHKSVLAN:
2756 sky2->rx_tag = length;
2757 /* fall through */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002758 case OP_RXCHKS:
Michał Mirosławf5d64032011-04-10 03:13:21 +00002759 if (likely(dev->features & NETIF_F_RXCSUM))
stephen hemminger375c5682010-02-07 06:28:36 +00002760 sky2_rx_checksum(sky2, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002761 break;
2762
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002763 case OP_RSS_HASH:
2764 sky2_rx_hash(sky2, status);
2765 break;
2766
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002767 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002768 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002769 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002770 if (hw->dev[1])
2771 sky2_tx_done(hw->dev[1],
2772 ((status >> 24) & 0xff)
2773 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002774 break;
2775
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002776 default:
2777 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002778 pr_warning("unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002779 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002780 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002781
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002782 /* Fully processed status ring so clear irq */
2783 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2784
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002785exit_loop:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002786 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]);
2787 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002788
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002789 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002790}
2791
2792static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2793{
2794 struct net_device *dev = hw->dev[port];
2795
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002796 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002797 netdev_info(dev, "hw error interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002798
2799 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002800 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002801 netdev_err(dev, "ram data read parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002802 /* Clear IRQ */
2803 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2804 }
2805
2806 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002807 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002808 netdev_err(dev, "ram data write parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002809
2810 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2811 }
2812
2813 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002814 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002815 netdev_err(dev, "MAC parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002816 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2817 }
2818
2819 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002820 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002821 netdev_err(dev, "RX parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002822 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2823 }
2824
2825 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002826 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002827 netdev_err(dev, "TCP segmentation error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002828 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2829 }
2830}
2831
2832static void sky2_hw_intr(struct sky2_hw *hw)
2833{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002834 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002835 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002836 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2837
2838 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002839
Stephen Hemminger793b8832005-09-14 16:06:14 -07002840 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002841 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002842
2843 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002844 u16 pci_err;
2845
stephen hemmingera40ccc62010-01-24 18:46:06 +00002846 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002847 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002848 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002849 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002850 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002851
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002852 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002853 pci_err | PCI_STATUS_ERROR_BITS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002854 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002855 }
2856
2857 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002858 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002859 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002860
stephen hemmingera40ccc62010-01-24 18:46:06 +00002861 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002862 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2863 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2864 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002865 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002866 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002867
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002868 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002869 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002870 }
2871
2872 if (status & Y2_HWE_L1_MASK)
2873 sky2_hw_error(hw, 0, status);
2874 status >>= 8;
2875 if (status & Y2_HWE_L1_MASK)
2876 sky2_hw_error(hw, 1, status);
2877}
2878
2879static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2880{
2881 struct net_device *dev = hw->dev[port];
2882 struct sky2_port *sky2 = netdev_priv(dev);
2883 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2884
Joe Perches6c35aba2010-02-15 08:34:21 +00002885 netif_info(sky2, intr, dev, "mac interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002886
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002887 if (status & GM_IS_RX_CO_OV)
2888 gma_read16(hw, port, GM_RX_IRQ_SRC);
2889
2890 if (status & GM_IS_TX_CO_OV)
2891 gma_read16(hw, port, GM_TX_IRQ_SRC);
2892
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002893 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002894 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002895 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2896 }
2897
2898 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002899 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002900 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2901 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002902}
2903
Stephen Hemminger40b01722007-04-11 14:47:59 -07002904/* This should never happen it is a bug. */
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002905static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002906{
2907 struct net_device *dev = hw->dev[port];
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002908 u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002909
Joe Perchesada1db52010-02-17 15:01:59 +00002910 dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n",
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002911 dev->name, (unsigned) q, (unsigned) idx,
2912 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002913
Stephen Hemminger40b01722007-04-11 14:47:59 -07002914 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002915}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002916
Stephen Hemminger75e80682007-09-19 15:36:46 -07002917static int sky2_rx_hung(struct net_device *dev)
2918{
2919 struct sky2_port *sky2 = netdev_priv(dev);
2920 struct sky2_hw *hw = sky2->hw;
2921 unsigned port = sky2->port;
2922 unsigned rxq = rxqaddr[port];
2923 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2924 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2925 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2926 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2927
2928 /* If idle and MAC or PCI is stuck */
2929 if (sky2->check.last == dev->last_rx &&
2930 ((mac_rp == sky2->check.mac_rp &&
2931 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2932 /* Check if the PCI RX hang */
2933 (fifo_rp == sky2->check.fifo_rp &&
2934 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
Joe Perchesada1db52010-02-17 15:01:59 +00002935 netdev_printk(KERN_DEBUG, dev,
2936 "hung mac %d:%d fifo %d (%d:%d)\n",
2937 mac_lev, mac_rp, fifo_lev,
2938 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
Stephen Hemminger75e80682007-09-19 15:36:46 -07002939 return 1;
2940 } else {
2941 sky2->check.last = dev->last_rx;
2942 sky2->check.mac_rp = mac_rp;
2943 sky2->check.mac_lev = mac_lev;
2944 sky2->check.fifo_rp = fifo_rp;
2945 sky2->check.fifo_lev = fifo_lev;
2946 return 0;
2947 }
2948}
2949
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002950static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002951{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002952 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002953
Stephen Hemminger75e80682007-09-19 15:36:46 -07002954 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002955 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002956 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002957 } else {
2958 int i, active = 0;
2959
2960 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002961 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002962 if (!netif_running(dev))
2963 continue;
2964 ++active;
2965
2966 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002967 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002968 sky2_rx_hung(dev)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002969 netdev_info(dev, "receiver hang detected\n");
Stephen Hemminger75e80682007-09-19 15:36:46 -07002970 schedule_work(&hw->restart_work);
2971 return;
2972 }
2973 }
2974
2975 if (active == 0)
2976 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002977 }
2978
Stephen Hemminger75e80682007-09-19 15:36:46 -07002979 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002980}
2981
Stephen Hemminger40b01722007-04-11 14:47:59 -07002982/* Hardware/software error handling */
2983static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002984{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002985 if (net_ratelimit())
2986 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002987
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002988 if (status & Y2_IS_HW_ERR)
2989 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002990
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002991 if (status & Y2_IS_IRQ_MAC1)
2992 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002993
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002994 if (status & Y2_IS_IRQ_MAC2)
2995 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002996
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002997 if (status & Y2_IS_CHK_RX1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002998 sky2_le_error(hw, 0, Q_R1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002999
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07003000 if (status & Y2_IS_CHK_RX2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00003001 sky2_le_error(hw, 1, Q_R2);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08003002
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07003003 if (status & Y2_IS_CHK_TXA1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00003004 sky2_le_error(hw, 0, Q_XA1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08003005
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07003006 if (status & Y2_IS_CHK_TXA2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00003007 sky2_le_error(hw, 1, Q_XA2);
Stephen Hemminger40b01722007-04-11 14:47:59 -07003008}
3009
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003010static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07003011{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003012 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07003013 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07003014 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07003015 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07003016
3017 if (unlikely(status & Y2_IS_ERROR))
3018 sky2_err_intr(hw, status);
3019
3020 if (status & Y2_IS_IRQ_PHY1)
3021 sky2_phy_intr(hw, 0);
3022
3023 if (status & Y2_IS_IRQ_PHY2)
3024 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003025
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003026 if (status & Y2_IS_PHY_QLNK)
3027 sky2_qlink_intr(hw);
3028
Stephen Hemminger26691832007-10-11 18:31:13 -07003029 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
3030 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07003031
David S. Miller6f535762007-10-11 18:08:29 -07003032 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07003033 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07003034 }
David S. Miller6f535762007-10-11 18:08:29 -07003035
Stephen Hemminger26691832007-10-11 18:31:13 -07003036 napi_complete(napi);
3037 sky2_read32(hw, B0_Y2_SP_LISR);
3038done:
3039
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003040 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003041}
3042
David Howells7d12e782006-10-05 14:55:46 +01003043static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003044{
3045 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003046 u32 status;
3047
3048 /* Reading this mask interrupts as side effect */
3049 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
3050 if (status == 0 || status == ~0)
3051 return IRQ_NONE;
3052
3053 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003054
3055 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003056
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003057 return IRQ_HANDLED;
3058}
3059
3060#ifdef CONFIG_NET_POLL_CONTROLLER
3061static void sky2_netpoll(struct net_device *dev)
3062{
3063 struct sky2_port *sky2 = netdev_priv(dev);
3064
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003065 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003066}
3067#endif
3068
3069/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07003070static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003071{
Stephen Hemminger793b8832005-09-14 16:06:14 -07003072 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003073 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08003074 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08003075 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003076 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003077 case CHIP_ID_YUKON_UL_2:
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003078 case CHIP_ID_YUKON_OPT:
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003079 case CHIP_ID_YUKON_PRM:
3080 case CHIP_ID_YUKON_OP_2:
Stephen Hemminger05745c42007-09-19 15:36:45 -07003081 return 125;
3082
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003083 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07003084 return 100;
3085
3086 case CHIP_ID_YUKON_FE_P:
3087 return 50;
3088
3089 case CHIP_ID_YUKON_XL:
3090 return 156;
3091
3092 default:
3093 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003094 }
3095}
3096
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003097static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
3098{
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08003099 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003100}
3101
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08003102static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
3103{
3104 return clk / sky2_mhz(hw);
3105}
3106
3107
Stephen Hemmingere3173832007-02-06 10:45:39 -08003108static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003109{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003110 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003111
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003112 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003113 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07003114
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003115 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08003116
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003117 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003118 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
3119
Mike McCormack060b9462010-07-29 03:34:52 +00003120 switch (hw->chip_id) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003121 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08003122 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003123 if (hw->chip_rev < CHIP_REV_YU_XL_A2)
3124 hw->flags |= SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003125 break;
3126
3127 case CHIP_ID_YUKON_EC_U:
3128 hw->flags = SKY2_HW_GIGABIT
3129 | SKY2_HW_NEWER_PHY
3130 | SKY2_HW_ADV_POWER_CTL;
3131 break;
3132
3133 case CHIP_ID_YUKON_EX:
3134 hw->flags = SKY2_HW_GIGABIT
3135 | SKY2_HW_NEWER_PHY
3136 | SKY2_HW_NEW_LE
stephen hemmingeraa5ca962011-07-07 13:40:00 +00003137 | SKY2_HW_ADV_POWER_CTL
3138 | SKY2_HW_RSS_CHKSUM;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003139
3140 /* New transmit checksum */
3141 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
3142 hw->flags |= SKY2_HW_AUTO_TX_SUM;
3143 break;
3144
3145 case CHIP_ID_YUKON_EC:
3146 /* This rev is really old, and requires untested workarounds */
3147 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
3148 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
3149 return -EOPNOTSUPP;
3150 }
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003151 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003152 break;
3153
3154 case CHIP_ID_YUKON_FE:
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003155 hw->flags = SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003156 break;
3157
Stephen Hemminger05745c42007-09-19 15:36:45 -07003158 case CHIP_ID_YUKON_FE_P:
3159 hw->flags = SKY2_HW_NEWER_PHY
3160 | SKY2_HW_NEW_LE
3161 | SKY2_HW_AUTO_TX_SUM
3162 | SKY2_HW_ADV_POWER_CTL;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08003163
3164 /* The workaround for status conflicts VLAN tag detection. */
3165 if (hw->chip_rev == CHIP_REV_YU_FE2_A0)
stephen hemmingeraa5ca962011-07-07 13:40:00 +00003166 hw->flags |= SKY2_HW_VLAN_BROKEN | SKY2_HW_RSS_CHKSUM;
Stephen Hemminger05745c42007-09-19 15:36:45 -07003167 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003168
3169 case CHIP_ID_YUKON_SUPR:
3170 hw->flags = SKY2_HW_GIGABIT
3171 | SKY2_HW_NEWER_PHY
3172 | SKY2_HW_NEW_LE
3173 | SKY2_HW_AUTO_TX_SUM
3174 | SKY2_HW_ADV_POWER_CTL;
stephen hemmingeraa5ca962011-07-07 13:40:00 +00003175
3176 if (hw->chip_rev == CHIP_REV_YU_SU_A0)
3177 hw->flags |= SKY2_HW_RSS_CHKSUM;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003178 break;
3179
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003180 case CHIP_ID_YUKON_UL_2:
Takashi Iwaib3386822009-12-03 05:12:01 +00003181 hw->flags = SKY2_HW_GIGABIT
3182 | SKY2_HW_ADV_POWER_CTL;
3183 break;
3184
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003185 case CHIP_ID_YUKON_OPT:
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003186 case CHIP_ID_YUKON_PRM:
3187 case CHIP_ID_YUKON_OP_2:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003188 hw->flags = SKY2_HW_GIGABIT
Takashi Iwaib3386822009-12-03 05:12:01 +00003189 | SKY2_HW_NEW_LE
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003190 | SKY2_HW_ADV_POWER_CTL;
3191 break;
3192
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003193 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003194 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
3195 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003196 return -EOPNOTSUPP;
3197 }
3198
Stephen Hemmingere3173832007-02-06 10:45:39 -08003199 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003200 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
3201 hw->flags |= SKY2_HW_FIBRE_PHY;
3202
Stephen Hemmingere3173832007-02-06 10:45:39 -08003203 hw->ports = 1;
3204 t8 = sky2_read8(hw, B2_Y2_HW_RES);
3205 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
3206 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
3207 ++hw->ports;
3208 }
3209
Mike McCormack74a61eb2009-09-21 04:08:52 +00003210 if (sky2_read8(hw, B2_E_0))
3211 hw->flags |= SKY2_HW_RAM_BUFFER;
3212
Stephen Hemmingere3173832007-02-06 10:45:39 -08003213 return 0;
3214}
3215
3216static void sky2_reset(struct sky2_hw *hw)
3217{
Stephen Hemminger555382c2007-08-29 12:58:14 -07003218 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003219 u16 status;
Jon Mason1a10cca2011-06-27 07:46:56 +00003220 int i;
Stephen Hemminger555382c2007-08-29 12:58:14 -07003221 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003222
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003223 /* disable ASF */
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003224 if (hw->chip_id == CHIP_ID_YUKON_EX
3225 || hw->chip_id == CHIP_ID_YUKON_SUPR) {
3226 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003227 status = sky2_read16(hw, HCU_CCSR);
3228 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
3229 HCU_CCSR_UC_STATE_MSK);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003230 /*
3231 * CPU clock divider shouldn't be used because
3232 * - ASF firmware may malfunction
3233 * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks
3234 */
3235 status &= ~HCU_CCSR_CPU_CLK_DIVIDE_MSK;
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003236 sky2_write16(hw, HCU_CCSR, status);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003237 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003238 } else
3239 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
3240 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003241
3242 /* do a SW reset */
3243 sky2_write8(hw, B0_CTST, CS_RST_SET);
3244 sky2_write8(hw, B0_CTST, CS_RST_CLR);
3245
Stephen Hemmingerac93a392007-11-05 15:52:08 -08003246 /* allow writes to PCI config */
3247 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
3248
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003249 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003250 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003251 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003252 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003253
3254 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
3255
Jon Mason1a10cca2011-06-27 07:46:56 +00003256 if (pci_is_pcie(pdev)) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003257 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
3258 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07003259
Stephen Hemminger555382c2007-08-29 12:58:14 -07003260 /* If error bit is stuck on ignore it */
3261 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
3262 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003263 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07003264 hwe_mask |= Y2_IS_PCI_EXP;
3265 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003266
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003267 sky2_power_on(hw);
stephen hemmingera40ccc62010-01-24 18:46:06 +00003268 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003269
3270 for (i = 0; i < hw->ports; i++) {
3271 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
3272 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07003273
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003274 if (hw->chip_id == CHIP_ID_YUKON_EX ||
3275 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07003276 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
3277 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
3278 | GMC_BYP_RETR_ON);
Stephen Hemminger877c8572009-10-29 06:37:08 +00003279
3280 }
3281
3282 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) {
3283 /* enable MACSec clock gating */
3284 sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003285 }
3286
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003287 if (hw->chip_id == CHIP_ID_YUKON_OPT ||
3288 hw->chip_id == CHIP_ID_YUKON_PRM ||
3289 hw->chip_id == CHIP_ID_YUKON_OP_2) {
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003290 u16 reg;
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003291
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003292 if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003293 /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */
3294 sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7));
3295
3296 /* set PHY Link Detect Timer to 1.1 second (11x 100ms) */
3297 reg = 10;
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003298
3299 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
3300 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003301 } else {
3302 /* set PHY Link Detect Timer to 0.4 second (4x 100ms) */
3303 reg = 3;
3304 }
3305
3306 reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
stephen hemminger4fb99cd2011-07-07 05:50:59 +00003307 reg |= PSM_CONFIG_REG4_RST_PHY_LINK_DETECT;
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003308
3309 /* reset PHY Link Detect */
stephen hemmingera40ccc62010-01-24 18:46:06 +00003310 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003311 sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
3312
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003313 /* check if PSMv2 was running before */
3314 reg = sky2_pci_read16(hw, PSM_CONFIG_REG3);
Jon Mason1a10cca2011-06-27 07:46:56 +00003315 if (reg & PCI_EXP_LNKCTL_ASPMC)
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003316 /* restore the PCIe Link Control register */
Jon Mason1a10cca2011-06-27 07:46:56 +00003317 sky2_pci_write16(hw, pdev->pcie_cap + PCI_EXP_LNKCTL,
3318 reg);
3319
stephen hemmingera40ccc62010-01-24 18:46:06 +00003320 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003321
3322 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
3323 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
3324 }
3325
Stephen Hemminger793b8832005-09-14 16:06:14 -07003326 /* Clear I2C IRQ noise */
3327 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003328
3329 /* turn off hardware timer (unused) */
3330 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
3331 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003332
Stephen Hemminger69634ee2005-12-09 11:35:06 -08003333 /* Turn off descriptor polling */
3334 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003335
3336 /* Turn off receive timestamp */
3337 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003338 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003339
3340 /* enable the Tx Arbiters */
3341 for (i = 0; i < hw->ports; i++)
3342 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
3343
3344 /* Initialize ram interface */
3345 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003346 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003347
3348 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
3349 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
3350 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
3351 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
3352 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
3353 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
3354 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
3355 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
3356 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
3357 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
3358 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
3359 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
3360 }
3361
Stephen Hemminger555382c2007-08-29 12:58:14 -07003362 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003363
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003364 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07003365 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003366
stephen hemmingerefe91932010-04-22 13:42:56 +00003367 memset(hw->st_le, 0, hw->st_size * sizeof(struct sky2_status_le));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003368 hw->st_idx = 0;
3369
3370 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
3371 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
3372
3373 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003374 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003375
3376 /* Set the list last index */
stephen hemmingerefe91932010-04-22 13:42:56 +00003377 sky2_write16(hw, STAT_LAST_IDX, hw->st_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003378
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003379 sky2_write16(hw, STAT_TX_IDX_TH, 10);
3380 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003381
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003382 /* set Status-FIFO ISR watermark */
3383 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
3384 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
3385 else
3386 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003387
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003388 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003389 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
3390 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003391
Stephen Hemminger793b8832005-09-14 16:06:14 -07003392 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003393 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
3394
3395 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3396 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3397 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003398}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003399
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003400/* Take device down (offline).
3401 * Equivalent to doing dev_stop() but this does not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003402 * inform upper layers of the transition.
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003403 */
3404static void sky2_detach(struct net_device *dev)
3405{
3406 if (netif_running(dev)) {
Mike McCormackc36531b2009-12-31 00:55:31 +00003407 netif_tx_lock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003408 netif_device_detach(dev); /* stop txq */
Mike McCormackc36531b2009-12-31 00:55:31 +00003409 netif_tx_unlock(dev);
stephen hemminger926d0972011-11-16 13:42:57 +00003410 sky2_close(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003411 }
3412}
3413
3414/* Bring device back after doing sky2_detach */
3415static int sky2_reattach(struct net_device *dev)
3416{
3417 int err = 0;
3418
3419 if (netif_running(dev)) {
stephen hemminger926d0972011-11-16 13:42:57 +00003420 err = sky2_open(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003421 if (err) {
Joe Perchesada1db52010-02-17 15:01:59 +00003422 netdev_info(dev, "could not restart %d\n", err);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003423 dev_close(dev);
3424 } else {
3425 netif_device_attach(dev);
3426 sky2_set_multicast(dev);
3427 }
3428 }
3429
3430 return err;
3431}
3432
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003433static void sky2_all_down(struct sky2_hw *hw)
Stephen Hemminger81906792007-02-15 16:40:33 -08003434{
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003435 int i;
Stephen Hemminger81906792007-02-15 16:40:33 -08003436
stephen hemminger282edce2011-11-17 14:37:35 +00003437 if (hw->flags & SKY2_HW_IRQ_SETUP) {
3438 sky2_read32(hw, B0_IMSK);
3439 sky2_write32(hw, B0_IMSK, 0);
stephen hemminger1401a802011-11-16 13:42:55 +00003440
stephen hemminger1401a802011-11-16 13:42:55 +00003441 synchronize_irq(hw->pdev->irq);
stephen hemminger282edce2011-11-17 14:37:35 +00003442 napi_disable(&hw->napi);
3443 }
Stephen Hemminger81906792007-02-15 16:40:33 -08003444
Mike McCormack8a0c9222010-02-12 06:58:06 +00003445 for (i = 0; i < hw->ports; i++) {
3446 struct net_device *dev = hw->dev[i];
3447 struct sky2_port *sky2 = netdev_priv(dev);
3448
3449 if (!netif_running(dev))
3450 continue;
3451
3452 netif_carrier_off(dev);
3453 netif_tx_disable(dev);
3454 sky2_hw_down(sky2);
3455 }
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003456}
Mike McCormack8a0c9222010-02-12 06:58:06 +00003457
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003458static void sky2_all_up(struct sky2_hw *hw)
3459{
3460 u32 imask = Y2_IS_BASE;
3461 int i;
Mike McCormack8a0c9222010-02-12 06:58:06 +00003462
3463 for (i = 0; i < hw->ports; i++) {
3464 struct net_device *dev = hw->dev[i];
3465 struct sky2_port *sky2 = netdev_priv(dev);
3466
3467 if (!netif_running(dev))
3468 continue;
3469
3470 sky2_hw_up(sky2);
Mike McCormack37652522010-05-13 06:12:48 +00003471 sky2_set_multicast(dev);
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003472 imask |= portirq_msk[i];
Mike McCormack8a0c9222010-02-12 06:58:06 +00003473 netif_wake_queue(dev);
3474 }
3475
stephen hemminger282edce2011-11-17 14:37:35 +00003476 if (hw->flags & SKY2_HW_IRQ_SETUP) {
stephen hemminger1401a802011-11-16 13:42:55 +00003477 sky2_write32(hw, B0_IMSK, imask);
3478 sky2_read32(hw, B0_IMSK);
3479 sky2_read32(hw, B0_Y2_SP_LISR);
3480 napi_enable(&hw->napi);
3481 }
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003482}
3483
3484static void sky2_restart(struct work_struct *work)
3485{
3486 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
3487
3488 rtnl_lock();
3489
3490 sky2_all_down(hw);
3491 sky2_reset(hw);
3492 sky2_all_up(hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08003493
Stephen Hemminger81906792007-02-15 16:40:33 -08003494 rtnl_unlock();
3495}
3496
Stephen Hemmingere3173832007-02-06 10:45:39 -08003497static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3498{
3499 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3500}
3501
3502static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3503{
3504 const struct sky2_port *sky2 = netdev_priv(dev);
3505
3506 wol->supported = sky2_wol_supported(sky2->hw);
3507 wol->wolopts = sky2->wol;
3508}
3509
3510static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3511{
3512 struct sky2_port *sky2 = netdev_priv(dev);
3513 struct sky2_hw *hw = sky2->hw;
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00003514 bool enable_wakeup = false;
3515 int i;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003516
Joe Perches8e95a202009-12-03 07:58:21 +00003517 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) ||
3518 !device_can_wakeup(&hw->pdev->dev))
Stephen Hemmingere3173832007-02-06 10:45:39 -08003519 return -EOPNOTSUPP;
3520
3521 sky2->wol = wol->wolopts;
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00003522
3523 for (i = 0; i < hw->ports; i++) {
3524 struct net_device *dev = hw->dev[i];
3525 struct sky2_port *sky2 = netdev_priv(dev);
3526
3527 if (sky2->wol)
3528 enable_wakeup = true;
3529 }
3530 device_set_wakeup_enable(&hw->pdev->dev, enable_wakeup);
3531
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003532 return 0;
3533}
3534
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003535static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003536{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003537 if (sky2_is_copper(hw)) {
3538 u32 modes = SUPPORTED_10baseT_Half
3539 | SUPPORTED_10baseT_Full
3540 | SUPPORTED_100baseT_Half
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003541 | SUPPORTED_100baseT_Full;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003542
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003543 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003544 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003545 | SUPPORTED_1000baseT_Full;
3546 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003547 } else
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003548 return SUPPORTED_1000baseT_Half
3549 | SUPPORTED_1000baseT_Full;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003550}
3551
Stephen Hemminger793b8832005-09-14 16:06:14 -07003552static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003553{
3554 struct sky2_port *sky2 = netdev_priv(dev);
3555 struct sky2_hw *hw = sky2->hw;
3556
3557 ecmd->transceiver = XCVR_INTERNAL;
3558 ecmd->supported = sky2_supported_modes(hw);
3559 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003560 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003561 ecmd->port = PORT_TP;
David Decotigny70739492011-04-27 18:32:40 +00003562 ethtool_cmd_speed_set(ecmd, sky2->speed);
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003563 ecmd->supported |= SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003564 } else {
David Decotigny70739492011-04-27 18:32:40 +00003565 ethtool_cmd_speed_set(ecmd, SPEED_1000);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003566 ecmd->port = PORT_FIBRE;
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003567 ecmd->supported |= SUPPORTED_Autoneg | SUPPORTED_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003568 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003569
3570 ecmd->advertising = sky2->advertising;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003571 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_SPEED)
3572 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003573 ecmd->duplex = sky2->duplex;
3574 return 0;
3575}
3576
3577static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3578{
3579 struct sky2_port *sky2 = netdev_priv(dev);
3580 const struct sky2_hw *hw = sky2->hw;
3581 u32 supported = sky2_supported_modes(hw);
3582
3583 if (ecmd->autoneg == AUTONEG_ENABLE) {
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003584 if (ecmd->advertising & ~supported)
3585 return -EINVAL;
3586
3587 if (sky2_is_copper(hw))
3588 sky2->advertising = ecmd->advertising |
3589 ADVERTISED_TP |
3590 ADVERTISED_Autoneg;
3591 else
3592 sky2->advertising = ecmd->advertising |
3593 ADVERTISED_FIBRE |
3594 ADVERTISED_Autoneg;
3595
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003596 sky2->flags |= SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003597 sky2->duplex = -1;
3598 sky2->speed = -1;
3599 } else {
3600 u32 setting;
David Decotigny25db0332011-04-27 18:32:39 +00003601 u32 speed = ethtool_cmd_speed(ecmd);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003602
David Decotigny25db0332011-04-27 18:32:39 +00003603 switch (speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003604 case SPEED_1000:
3605 if (ecmd->duplex == DUPLEX_FULL)
3606 setting = SUPPORTED_1000baseT_Full;
3607 else if (ecmd->duplex == DUPLEX_HALF)
3608 setting = SUPPORTED_1000baseT_Half;
3609 else
3610 return -EINVAL;
3611 break;
3612 case SPEED_100:
3613 if (ecmd->duplex == DUPLEX_FULL)
3614 setting = SUPPORTED_100baseT_Full;
3615 else if (ecmd->duplex == DUPLEX_HALF)
3616 setting = SUPPORTED_100baseT_Half;
3617 else
3618 return -EINVAL;
3619 break;
3620
3621 case SPEED_10:
3622 if (ecmd->duplex == DUPLEX_FULL)
3623 setting = SUPPORTED_10baseT_Full;
3624 else if (ecmd->duplex == DUPLEX_HALF)
3625 setting = SUPPORTED_10baseT_Half;
3626 else
3627 return -EINVAL;
3628 break;
3629 default:
3630 return -EINVAL;
3631 }
3632
3633 if ((setting & supported) == 0)
3634 return -EINVAL;
3635
David Decotigny25db0332011-04-27 18:32:39 +00003636 sky2->speed = speed;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003637 sky2->duplex = ecmd->duplex;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003638 sky2->flags &= ~SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003639 }
3640
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003641 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003642 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003643 sky2_set_multicast(dev);
3644 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003645
3646 return 0;
3647}
3648
3649static void sky2_get_drvinfo(struct net_device *dev,
3650 struct ethtool_drvinfo *info)
3651{
3652 struct sky2_port *sky2 = netdev_priv(dev);
3653
Rick Jones68aad782011-11-07 13:29:27 +00003654 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
3655 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
Rick Jones68aad782011-11-07 13:29:27 +00003656 strlcpy(info->bus_info, pci_name(sky2->hw->pdev),
3657 sizeof(info->bus_info));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003658}
3659
3660static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003661 char name[ETH_GSTRING_LEN];
3662 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003663} sky2_stats[] = {
3664 { "tx_bytes", GM_TXO_OK_HI },
3665 { "rx_bytes", GM_RXO_OK_HI },
3666 { "tx_broadcast", GM_TXF_BC_OK },
3667 { "rx_broadcast", GM_RXF_BC_OK },
3668 { "tx_multicast", GM_TXF_MC_OK },
3669 { "rx_multicast", GM_RXF_MC_OK },
3670 { "tx_unicast", GM_TXF_UC_OK },
3671 { "rx_unicast", GM_RXF_UC_OK },
3672 { "tx_mac_pause", GM_TXF_MPAUSE },
3673 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003674 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003675 { "late_collision",GM_TXF_LAT_COL },
3676 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003677 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003678 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003679
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003680 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003681 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003682 { "rx_64_byte_packets", GM_RXF_64B },
3683 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3684 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3685 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3686 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3687 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3688 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003689 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003690 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3691 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003692 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7d2006-03-22 10:38:45 -08003693
3694 { "tx_64_byte_packets", GM_TXF_64B },
3695 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3696 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3697 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3698 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3699 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3700 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3701 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003702};
3703
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003704static u32 sky2_get_msglevel(struct net_device *netdev)
3705{
3706 struct sky2_port *sky2 = netdev_priv(netdev);
3707 return sky2->msg_enable;
3708}
3709
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003710static int sky2_nway_reset(struct net_device *dev)
3711{
3712 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003713
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003714 if (!netif_running(dev) || !(sky2->flags & SKY2_FLAG_AUTO_SPEED))
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003715 return -EINVAL;
3716
Stephen Hemminger1b537562005-12-20 15:08:07 -08003717 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003718 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003719
3720 return 0;
3721}
3722
Stephen Hemminger793b8832005-09-14 16:06:14 -07003723static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003724{
3725 struct sky2_hw *hw = sky2->hw;
3726 unsigned port = sky2->port;
3727 int i;
3728
stephen hemminger0885a302010-12-31 15:34:27 +00003729 data[0] = get_stats64(hw, port, GM_TXO_OK_LO);
3730 data[1] = get_stats64(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003731
Stephen Hemminger793b8832005-09-14 16:06:14 -07003732 for (i = 2; i < count; i++)
stephen hemminger0885a302010-12-31 15:34:27 +00003733 data[i] = get_stats32(hw, port, sky2_stats[i].offset);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003734}
3735
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003736static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3737{
3738 struct sky2_port *sky2 = netdev_priv(netdev);
3739 sky2->msg_enable = value;
3740}
3741
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003742static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003743{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003744 switch (sset) {
3745 case ETH_SS_STATS:
3746 return ARRAY_SIZE(sky2_stats);
3747 default:
3748 return -EOPNOTSUPP;
3749 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003750}
3751
3752static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003753 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003754{
3755 struct sky2_port *sky2 = netdev_priv(dev);
3756
Stephen Hemminger793b8832005-09-14 16:06:14 -07003757 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003758}
3759
Stephen Hemminger793b8832005-09-14 16:06:14 -07003760static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003761{
3762 int i;
3763
3764 switch (stringset) {
3765 case ETH_SS_STATS:
3766 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3767 memcpy(data + i * ETH_GSTRING_LEN,
3768 sky2_stats[i].name, ETH_GSTRING_LEN);
3769 break;
3770 }
3771}
3772
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003773static int sky2_set_mac_address(struct net_device *dev, void *p)
3774{
3775 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003776 struct sky2_hw *hw = sky2->hw;
3777 unsigned port = sky2->port;
3778 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003779
3780 if (!is_valid_ether_addr(addr->sa_data))
3781 return -EADDRNOTAVAIL;
3782
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003783 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003784 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003785 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003786 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003787 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003788
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003789 /* virtual address for data */
3790 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3791
3792 /* physical address: used for pause frames */
3793 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003794
3795 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003796}
3797
Mike McCormack060b9462010-07-29 03:34:52 +00003798static inline void sky2_add_filter(u8 filter[8], const u8 *addr)
Stephen Hemmingera052b522006-10-17 10:24:23 -07003799{
3800 u32 bit;
3801
3802 bit = ether_crc(ETH_ALEN, addr) & 63;
3803 filter[bit >> 3] |= 1 << (bit & 7);
3804}
3805
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003806static void sky2_set_multicast(struct net_device *dev)
3807{
3808 struct sky2_port *sky2 = netdev_priv(dev);
3809 struct sky2_hw *hw = sky2->hw;
3810 unsigned port = sky2->port;
Jiri Pirko22bedad32010-04-01 21:22:57 +00003811 struct netdev_hw_addr *ha;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003812 u16 reg;
3813 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003814 int rx_pause;
3815 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003816
Stephen Hemmingera052b522006-10-17 10:24:23 -07003817 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003818 memset(filter, 0, sizeof(filter));
3819
3820 reg = gma_read16(hw, port, GM_RX_CTRL);
3821 reg |= GM_RXCR_UCF_ENA;
3822
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003823 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003824 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003825 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003826 memset(filter, 0xff, sizeof(filter));
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003827 else if (netdev_mc_empty(dev) && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003828 reg &= ~GM_RXCR_MCF_ENA;
3829 else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003830 reg |= GM_RXCR_MCF_ENA;
3831
Stephen Hemmingera052b522006-10-17 10:24:23 -07003832 if (rx_pause)
3833 sky2_add_filter(filter, pause_mc_addr);
3834
Jiri Pirko22bedad32010-04-01 21:22:57 +00003835 netdev_for_each_mc_addr(ha, dev)
3836 sky2_add_filter(filter, ha->addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003837 }
3838
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003839 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003840 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003841 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003842 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003843 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003844 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003845 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003846 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003847
3848 gma_write16(hw, port, GM_RX_CTRL, reg);
3849}
3850
stephen hemminger0885a302010-12-31 15:34:27 +00003851static struct rtnl_link_stats64 *sky2_get_stats(struct net_device *dev,
3852 struct rtnl_link_stats64 *stats)
3853{
3854 struct sky2_port *sky2 = netdev_priv(dev);
3855 struct sky2_hw *hw = sky2->hw;
3856 unsigned port = sky2->port;
3857 unsigned int start;
3858 u64 _bytes, _packets;
3859
3860 do {
3861 start = u64_stats_fetch_begin_bh(&sky2->rx_stats.syncp);
3862 _bytes = sky2->rx_stats.bytes;
3863 _packets = sky2->rx_stats.packets;
3864 } while (u64_stats_fetch_retry_bh(&sky2->rx_stats.syncp, start));
3865
3866 stats->rx_packets = _packets;
3867 stats->rx_bytes = _bytes;
3868
3869 do {
3870 start = u64_stats_fetch_begin_bh(&sky2->tx_stats.syncp);
3871 _bytes = sky2->tx_stats.bytes;
3872 _packets = sky2->tx_stats.packets;
3873 } while (u64_stats_fetch_retry_bh(&sky2->tx_stats.syncp, start));
3874
3875 stats->tx_packets = _packets;
3876 stats->tx_bytes = _bytes;
3877
3878 stats->multicast = get_stats32(hw, port, GM_RXF_MC_OK)
3879 + get_stats32(hw, port, GM_RXF_BC_OK);
3880
3881 stats->collisions = get_stats32(hw, port, GM_TXF_COL);
3882
3883 stats->rx_length_errors = get_stats32(hw, port, GM_RXF_LNG_ERR);
3884 stats->rx_crc_errors = get_stats32(hw, port, GM_RXF_FCS_ERR);
3885 stats->rx_frame_errors = get_stats32(hw, port, GM_RXF_SHT)
3886 + get_stats32(hw, port, GM_RXE_FRAG);
3887 stats->rx_over_errors = get_stats32(hw, port, GM_RXE_FIFO_OV);
3888
3889 stats->rx_dropped = dev->stats.rx_dropped;
3890 stats->rx_fifo_errors = dev->stats.rx_fifo_errors;
3891 stats->tx_fifo_errors = dev->stats.tx_fifo_errors;
3892
3893 return stats;
3894}
3895
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003896/* Can have one global because blinking is controlled by
3897 * ethtool and that is always under RTNL mutex
3898 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003899static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003900{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003901 struct sky2_hw *hw = sky2->hw;
3902 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003903
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003904 spin_lock_bh(&sky2->phy_lock);
3905 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3906 hw->chip_id == CHIP_ID_YUKON_EX ||
3907 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3908 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003909 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3910 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003911
3912 switch (mode) {
3913 case MO_LED_OFF:
3914 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3915 PHY_M_LEDC_LOS_CTRL(8) |
3916 PHY_M_LEDC_INIT_CTRL(8) |
3917 PHY_M_LEDC_STA1_CTRL(8) |
3918 PHY_M_LEDC_STA0_CTRL(8));
3919 break;
3920 case MO_LED_ON:
3921 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3922 PHY_M_LEDC_LOS_CTRL(9) |
3923 PHY_M_LEDC_INIT_CTRL(9) |
3924 PHY_M_LEDC_STA1_CTRL(9) |
3925 PHY_M_LEDC_STA0_CTRL(9));
3926 break;
3927 case MO_LED_BLINK:
3928 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3929 PHY_M_LEDC_LOS_CTRL(0xa) |
3930 PHY_M_LEDC_INIT_CTRL(0xa) |
3931 PHY_M_LEDC_STA1_CTRL(0xa) |
3932 PHY_M_LEDC_STA0_CTRL(0xa));
3933 break;
3934 case MO_LED_NORM:
3935 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3936 PHY_M_LEDC_LOS_CTRL(1) |
3937 PHY_M_LEDC_INIT_CTRL(8) |
3938 PHY_M_LEDC_STA1_CTRL(7) |
3939 PHY_M_LEDC_STA0_CTRL(7));
3940 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003941
3942 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003943 } else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04003944 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003945 PHY_M_LED_MO_DUP(mode) |
3946 PHY_M_LED_MO_10(mode) |
3947 PHY_M_LED_MO_100(mode) |
3948 PHY_M_LED_MO_1000(mode) |
3949 PHY_M_LED_MO_RX(mode) |
3950 PHY_M_LED_MO_TX(mode));
3951
3952 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003953}
3954
3955/* blink LED's for finding board */
stephen hemminger74e532f2011-04-04 08:43:41 +00003956static int sky2_set_phys_id(struct net_device *dev,
3957 enum ethtool_phys_id_state state)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003958{
3959 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003960
stephen hemminger74e532f2011-04-04 08:43:41 +00003961 switch (state) {
3962 case ETHTOOL_ID_ACTIVE:
Allan, Bruce Wfce55922011-04-13 13:09:10 +00003963 return 1; /* cycle on/off once per second */
stephen hemminger74e532f2011-04-04 08:43:41 +00003964 case ETHTOOL_ID_INACTIVE:
3965 sky2_led(sky2, MO_LED_NORM);
3966 break;
3967 case ETHTOOL_ID_ON:
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003968 sky2_led(sky2, MO_LED_ON);
stephen hemminger74e532f2011-04-04 08:43:41 +00003969 break;
3970 case ETHTOOL_ID_OFF:
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003971 sky2_led(sky2, MO_LED_OFF);
stephen hemminger74e532f2011-04-04 08:43:41 +00003972 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003973 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003974
3975 return 0;
3976}
3977
3978static void sky2_get_pauseparam(struct net_device *dev,
3979 struct ethtool_pauseparam *ecmd)
3980{
3981 struct sky2_port *sky2 = netdev_priv(dev);
3982
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003983 switch (sky2->flow_mode) {
3984 case FC_NONE:
3985 ecmd->tx_pause = ecmd->rx_pause = 0;
3986 break;
3987 case FC_TX:
3988 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3989 break;
3990 case FC_RX:
3991 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3992 break;
3993 case FC_BOTH:
3994 ecmd->tx_pause = ecmd->rx_pause = 1;
3995 }
3996
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003997 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_PAUSE)
3998 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003999}
4000
4001static int sky2_set_pauseparam(struct net_device *dev,
4002 struct ethtool_pauseparam *ecmd)
4003{
4004 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004005
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004006 if (ecmd->autoneg == AUTONEG_ENABLE)
4007 sky2->flags |= SKY2_FLAG_AUTO_PAUSE;
4008 else
4009 sky2->flags &= ~SKY2_FLAG_AUTO_PAUSE;
4010
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004011 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004012
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004013 if (netif_running(dev))
4014 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004015
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07004016 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004017}
4018
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004019static int sky2_get_coalesce(struct net_device *dev,
4020 struct ethtool_coalesce *ecmd)
4021{
4022 struct sky2_port *sky2 = netdev_priv(dev);
4023 struct sky2_hw *hw = sky2->hw;
4024
4025 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
4026 ecmd->tx_coalesce_usecs = 0;
4027 else {
4028 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
4029 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
4030 }
4031 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
4032
4033 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
4034 ecmd->rx_coalesce_usecs = 0;
4035 else {
4036 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
4037 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
4038 }
4039 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
4040
4041 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
4042 ecmd->rx_coalesce_usecs_irq = 0;
4043 else {
4044 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
4045 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
4046 }
4047
4048 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
4049
4050 return 0;
4051}
4052
4053/* Note: this affect both ports */
4054static int sky2_set_coalesce(struct net_device *dev,
4055 struct ethtool_coalesce *ecmd)
4056{
4057 struct sky2_port *sky2 = netdev_priv(dev);
4058 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08004059 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004060
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08004061 if (ecmd->tx_coalesce_usecs > tmax ||
4062 ecmd->rx_coalesce_usecs > tmax ||
4063 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004064 return -EINVAL;
4065
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004066 if (ecmd->tx_max_coalesced_frames >= sky2->tx_ring_size-1)
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004067 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08004068 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004069 return -EINVAL;
Mike McCormack060b9462010-07-29 03:34:52 +00004070 if (ecmd->rx_max_coalesced_frames_irq > RX_MAX_PENDING)
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004071 return -EINVAL;
4072
4073 if (ecmd->tx_coalesce_usecs == 0)
4074 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
4075 else {
4076 sky2_write32(hw, STAT_TX_TIMER_INI,
4077 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
4078 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
4079 }
4080 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
4081
4082 if (ecmd->rx_coalesce_usecs == 0)
4083 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
4084 else {
4085 sky2_write32(hw, STAT_LEV_TIMER_INI,
4086 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
4087 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
4088 }
4089 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
4090
4091 if (ecmd->rx_coalesce_usecs_irq == 0)
4092 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
4093 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08004094 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb17358f2005-12-09 11:34:56 -08004095 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
4096 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
4097 }
4098 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
4099 return 0;
4100}
4101
stephen hemminger738a8492011-11-17 14:37:23 +00004102/*
4103 * Hardware is limited to min of 128 and max of 2048 for ring size
4104 * and rounded up to next power of two
4105 * to avoid division in modulus calclation
4106 */
4107static unsigned long roundup_ring_size(unsigned long pending)
4108{
4109 return max(128ul, roundup_pow_of_two(pending+1));
4110}
4111
Stephen Hemminger793b8832005-09-14 16:06:14 -07004112static void sky2_get_ringparam(struct net_device *dev,
4113 struct ethtool_ringparam *ering)
4114{
4115 struct sky2_port *sky2 = netdev_priv(dev);
4116
4117 ering->rx_max_pending = RX_MAX_PENDING;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004118 ering->tx_max_pending = TX_MAX_PENDING;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004119
4120 ering->rx_pending = sky2->rx_pending;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004121 ering->tx_pending = sky2->tx_pending;
4122}
4123
4124static int sky2_set_ringparam(struct net_device *dev,
4125 struct ethtool_ringparam *ering)
4126{
4127 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004128
4129 if (ering->rx_pending > RX_MAX_PENDING ||
4130 ering->rx_pending < 8 ||
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004131 ering->tx_pending < TX_MIN_PENDING ||
4132 ering->tx_pending > TX_MAX_PENDING)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004133 return -EINVAL;
4134
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004135 sky2_detach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004136
4137 sky2->rx_pending = ering->rx_pending;
4138 sky2->tx_pending = ering->tx_pending;
stephen hemminger738a8492011-11-17 14:37:23 +00004139 sky2->tx_ring_size = roundup_ring_size(sky2->tx_pending);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004140
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004141 return sky2_reattach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004142}
4143
Stephen Hemminger793b8832005-09-14 16:06:14 -07004144static int sky2_get_regs_len(struct net_device *dev)
4145{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07004146 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004147}
4148
Mike McCormackc32bbff2009-12-31 00:49:43 +00004149static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b)
4150{
4151 /* This complicated switch statement is to make sure and
4152 * only access regions that are unreserved.
4153 * Some blocks are only valid on dual port cards.
4154 */
4155 switch (b) {
4156 /* second port */
4157 case 5: /* Tx Arbiter 2 */
4158 case 9: /* RX2 */
4159 case 14 ... 15: /* TX2 */
4160 case 17: case 19: /* Ram Buffer 2 */
4161 case 22 ... 23: /* Tx Ram Buffer 2 */
4162 case 25: /* Rx MAC Fifo 1 */
4163 case 27: /* Tx MAC Fifo 2 */
4164 case 31: /* GPHY 2 */
4165 case 40 ... 47: /* Pattern Ram 2 */
4166 case 52: case 54: /* TCP Segmentation 2 */
4167 case 112 ... 116: /* GMAC 2 */
4168 return hw->ports > 1;
4169
4170 case 0: /* Control */
4171 case 2: /* Mac address */
4172 case 4: /* Tx Arbiter 1 */
4173 case 7: /* PCI express reg */
4174 case 8: /* RX1 */
4175 case 12 ... 13: /* TX1 */
4176 case 16: case 18:/* Rx Ram Buffer 1 */
4177 case 20 ... 21: /* Tx Ram Buffer 1 */
4178 case 24: /* Rx MAC Fifo 1 */
4179 case 26: /* Tx MAC Fifo 1 */
4180 case 28 ... 29: /* Descriptor and status unit */
4181 case 30: /* GPHY 1*/
4182 case 32 ... 39: /* Pattern Ram 1 */
4183 case 48: case 50: /* TCP Segmentation 1 */
4184 case 56 ... 60: /* PCI space */
4185 case 80 ... 84: /* GMAC 1 */
4186 return 1;
4187
4188 default:
4189 return 0;
4190 }
4191}
4192
Stephen Hemminger793b8832005-09-14 16:06:14 -07004193/*
4194 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07004195 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07004196 */
4197static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
4198 void *p)
4199{
4200 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004201 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004202 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004203
4204 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004205
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004206 for (b = 0; b < 128; b++) {
Mike McCormackc32bbff2009-12-31 00:49:43 +00004207 /* skip poisonous diagnostic ram region in block 3 */
4208 if (b == 3)
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004209 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
Mike McCormackc32bbff2009-12-31 00:49:43 +00004210 else if (sky2_reg_access_ok(sky2->hw, b))
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004211 memcpy_fromio(p, io, 128);
Mike McCormackc32bbff2009-12-31 00:49:43 +00004212 else
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004213 memset(p, 0, 128);
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07004214
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004215 p += 128;
4216 io += 128;
4217 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07004218}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004219
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004220static int sky2_get_eeprom_len(struct net_device *dev)
4221{
4222 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004223 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004224 u16 reg2;
4225
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004226 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004227 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4228}
4229
Stephen Hemminger14132352008-08-27 20:46:26 -07004230static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004231{
Stephen Hemminger14132352008-08-27 20:46:26 -07004232 unsigned long start = jiffies;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004233
Stephen Hemminger14132352008-08-27 20:46:26 -07004234 while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) {
4235 /* Can take up to 10.6 ms for write */
4236 if (time_after(jiffies, start + HZ/4)) {
Joe Perchesada1db52010-02-17 15:01:59 +00004237 dev_err(&hw->pdev->dev, "VPD cycle timed out\n");
Stephen Hemminger14132352008-08-27 20:46:26 -07004238 return -ETIMEDOUT;
4239 }
4240 mdelay(1);
4241 }
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004242
Stephen Hemminger14132352008-08-27 20:46:26 -07004243 return 0;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004244}
4245
Stephen Hemminger14132352008-08-27 20:46:26 -07004246static int sky2_vpd_read(struct sky2_hw *hw, int cap, void *data,
4247 u16 offset, size_t length)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004248{
Stephen Hemminger14132352008-08-27 20:46:26 -07004249 int rc = 0;
4250
4251 while (length > 0) {
4252 u32 val;
4253
4254 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
4255 rc = sky2_vpd_wait(hw, cap, 0);
4256 if (rc)
4257 break;
4258
4259 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
4260
4261 memcpy(data, &val, min(sizeof(val), length));
4262 offset += sizeof(u32);
4263 data += sizeof(u32);
4264 length -= sizeof(u32);
4265 }
4266
4267 return rc;
4268}
4269
4270static int sky2_vpd_write(struct sky2_hw *hw, int cap, const void *data,
4271 u16 offset, unsigned int length)
4272{
4273 unsigned int i;
4274 int rc = 0;
4275
4276 for (i = 0; i < length; i += sizeof(u32)) {
4277 u32 val = *(u32 *)(data + i);
4278
4279 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
4280 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
4281
4282 rc = sky2_vpd_wait(hw, cap, PCI_VPD_ADDR_F);
4283 if (rc)
4284 break;
4285 }
4286 return rc;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004287}
4288
4289static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4290 u8 *data)
4291{
4292 struct sky2_port *sky2 = netdev_priv(dev);
4293 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004294
4295 if (!cap)
4296 return -EINVAL;
4297
4298 eeprom->magic = SKY2_EEPROM_MAGIC;
4299
Stephen Hemminger14132352008-08-27 20:46:26 -07004300 return sky2_vpd_read(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004301}
4302
4303static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4304 u8 *data)
4305{
4306 struct sky2_port *sky2 = netdev_priv(dev);
4307 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004308
4309 if (!cap)
4310 return -EINVAL;
4311
4312 if (eeprom->magic != SKY2_EEPROM_MAGIC)
4313 return -EINVAL;
4314
Stephen Hemminger14132352008-08-27 20:46:26 -07004315 /* Partial writes not supported */
4316 if ((eeprom->offset & 3) || (eeprom->len & 3))
4317 return -EINVAL;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004318
Stephen Hemminger14132352008-08-27 20:46:26 -07004319 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004320}
4321
Michał Mirosławc8f44af2011-11-15 15:29:55 +00004322static netdev_features_t sky2_fix_features(struct net_device *dev,
4323 netdev_features_t features)
Michał Mirosławf5d64032011-04-10 03:13:21 +00004324{
4325 const struct sky2_port *sky2 = netdev_priv(dev);
4326 const struct sky2_hw *hw = sky2->hw;
4327
4328 /* In order to do Jumbo packets on these chips, need to turn off the
4329 * transmit store/forward. Therefore checksum offload won't work.
4330 */
stephen hemmingeraa5ca962011-07-07 13:40:00 +00004331 if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) {
4332 netdev_info(dev, "checksum offload not possible with jumbo frames\n");
Michał Mirosławf5d64032011-04-10 03:13:21 +00004333 features &= ~(NETIF_F_TSO|NETIF_F_SG|NETIF_F_ALL_CSUM);
stephen hemmingeraa5ca962011-07-07 13:40:00 +00004334 }
4335
4336 /* Some hardware requires receive checksum for RSS to work. */
4337 if ( (features & NETIF_F_RXHASH) &&
4338 !(features & NETIF_F_RXCSUM) &&
4339 (sky2->hw->flags & SKY2_HW_RSS_CHKSUM)) {
4340 netdev_info(dev, "receive hashing forces receive checksum\n");
4341 features |= NETIF_F_RXCSUM;
4342 }
Michał Mirosławf5d64032011-04-10 03:13:21 +00004343
4344 return features;
4345}
4346
Michał Mirosławc8f44af2011-11-15 15:29:55 +00004347static int sky2_set_features(struct net_device *dev, netdev_features_t features)
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004348{
4349 struct sky2_port *sky2 = netdev_priv(dev);
Michał Mirosławc8f44af2011-11-15 15:29:55 +00004350 netdev_features_t changed = dev->features ^ features;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004351
Michał Mirosławf5d64032011-04-10 03:13:21 +00004352 if (changed & NETIF_F_RXCSUM) {
Michał Mirosław3ad9b352011-11-16 14:05:33 +00004353 bool on = features & NETIF_F_RXCSUM;
Michał Mirosławf5d64032011-04-10 03:13:21 +00004354 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
4355 on ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
4356 }
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004357
Michał Mirosławf5d64032011-04-10 03:13:21 +00004358 if (changed & NETIF_F_RXHASH)
4359 rx_set_rss(dev, features);
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004360
Michał Mirosławf5d64032011-04-10 03:13:21 +00004361 if (changed & (NETIF_F_HW_VLAN_TX|NETIF_F_HW_VLAN_RX))
4362 sky2_vlan_mode(dev, features);
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004363
4364 return 0;
4365}
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004366
Jeff Garzik7282d492006-09-13 14:30:00 -04004367static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004368 .get_settings = sky2_get_settings,
4369 .set_settings = sky2_set_settings,
4370 .get_drvinfo = sky2_get_drvinfo,
4371 .get_wol = sky2_get_wol,
4372 .set_wol = sky2_set_wol,
4373 .get_msglevel = sky2_get_msglevel,
4374 .set_msglevel = sky2_set_msglevel,
4375 .nway_reset = sky2_nway_reset,
4376 .get_regs_len = sky2_get_regs_len,
4377 .get_regs = sky2_get_regs,
4378 .get_link = ethtool_op_get_link,
4379 .get_eeprom_len = sky2_get_eeprom_len,
4380 .get_eeprom = sky2_get_eeprom,
4381 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004382 .get_strings = sky2_get_strings,
4383 .get_coalesce = sky2_get_coalesce,
4384 .set_coalesce = sky2_set_coalesce,
4385 .get_ringparam = sky2_get_ringparam,
4386 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004387 .get_pauseparam = sky2_get_pauseparam,
4388 .set_pauseparam = sky2_set_pauseparam,
stephen hemminger74e532f2011-04-04 08:43:41 +00004389 .set_phys_id = sky2_set_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004390 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004391 .get_ethtool_stats = sky2_get_ethtool_stats,
4392};
4393
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004394#ifdef CONFIG_SKY2_DEBUG
4395
4396static struct dentry *sky2_debug;
4397
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004398
4399/*
4400 * Read and parse the first part of Vital Product Data
4401 */
4402#define VPD_SIZE 128
4403#define VPD_MAGIC 0x82
4404
4405static const struct vpd_tag {
4406 char tag[2];
4407 char *label;
4408} vpd_tags[] = {
4409 { "PN", "Part Number" },
4410 { "EC", "Engineering Level" },
4411 { "MN", "Manufacturer" },
4412 { "SN", "Serial Number" },
4413 { "YA", "Asset Tag" },
4414 { "VL", "First Error Log Message" },
4415 { "VF", "Second Error Log Message" },
4416 { "VB", "Boot Agent ROM Configuration" },
4417 { "VE", "EFI UNDI Configuration" },
4418};
4419
4420static void sky2_show_vpd(struct seq_file *seq, struct sky2_hw *hw)
4421{
4422 size_t vpd_size;
4423 loff_t offs;
4424 u8 len;
4425 unsigned char *buf;
4426 u16 reg2;
4427
4428 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
4429 vpd_size = 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4430
4431 seq_printf(seq, "%s Product Data\n", pci_name(hw->pdev));
4432 buf = kmalloc(vpd_size, GFP_KERNEL);
4433 if (!buf) {
4434 seq_puts(seq, "no memory!\n");
4435 return;
4436 }
4437
4438 if (pci_read_vpd(hw->pdev, 0, vpd_size, buf) < 0) {
4439 seq_puts(seq, "VPD read failed\n");
4440 goto out;
4441 }
4442
4443 if (buf[0] != VPD_MAGIC) {
4444 seq_printf(seq, "VPD tag mismatch: %#x\n", buf[0]);
4445 goto out;
4446 }
4447 len = buf[1];
4448 if (len == 0 || len > vpd_size - 4) {
4449 seq_printf(seq, "Invalid id length: %d\n", len);
4450 goto out;
4451 }
4452
4453 seq_printf(seq, "%.*s\n", len, buf + 3);
4454 offs = len + 3;
4455
4456 while (offs < vpd_size - 4) {
4457 int i;
4458
4459 if (!memcmp("RW", buf + offs, 2)) /* end marker */
4460 break;
4461 len = buf[offs + 2];
4462 if (offs + len + 3 >= vpd_size)
4463 break;
4464
4465 for (i = 0; i < ARRAY_SIZE(vpd_tags); i++) {
4466 if (!memcmp(vpd_tags[i].tag, buf + offs, 2)) {
4467 seq_printf(seq, " %s: %.*s\n",
4468 vpd_tags[i].label, len, buf + offs + 3);
4469 break;
4470 }
4471 }
4472 offs += len + 3;
4473 }
4474out:
4475 kfree(buf);
4476}
4477
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004478static int sky2_debug_show(struct seq_file *seq, void *v)
4479{
4480 struct net_device *dev = seq->private;
4481 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004482 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004483 unsigned port = sky2->port;
4484 unsigned idx, last;
4485 int sop;
4486
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004487 sky2_show_vpd(seq, hw);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004488
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004489 seq_printf(seq, "\nIRQ src=%x mask=%x control=%x\n",
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004490 sky2_read32(hw, B0_ISRC),
4491 sky2_read32(hw, B0_IMSK),
4492 sky2_read32(hw, B0_Y2_SP_ICR));
4493
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004494 if (!netif_running(dev)) {
4495 seq_printf(seq, "network not running\n");
4496 return 0;
4497 }
4498
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004499 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004500 last = sky2_read16(hw, STAT_PUT_IDX);
4501
stephen hemmingerefe91932010-04-22 13:42:56 +00004502 seq_printf(seq, "Status ring %u\n", hw->st_size);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004503 if (hw->st_idx == last)
4504 seq_puts(seq, "Status ring (empty)\n");
4505 else {
4506 seq_puts(seq, "Status ring\n");
stephen hemmingerefe91932010-04-22 13:42:56 +00004507 for (idx = hw->st_idx; idx != last && idx < hw->st_size;
4508 idx = RING_NEXT(idx, hw->st_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004509 const struct sky2_status_le *le = hw->st_le + idx;
4510 seq_printf(seq, "[%d] %#x %d %#x\n",
4511 idx, le->opcode, le->length, le->status);
4512 }
4513 seq_puts(seq, "\n");
4514 }
4515
4516 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
4517 sky2->tx_cons, sky2->tx_prod,
4518 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
4519 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
4520
4521 /* Dump contents of tx ring */
4522 sop = 1;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004523 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < sky2->tx_ring_size;
4524 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004525 const struct sky2_tx_le *le = sky2->tx_le + idx;
4526 u32 a = le32_to_cpu(le->addr);
4527
4528 if (sop)
4529 seq_printf(seq, "%u:", idx);
4530 sop = 0;
4531
Mike McCormack060b9462010-07-29 03:34:52 +00004532 switch (le->opcode & ~HW_OWNER) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004533 case OP_ADDR64:
4534 seq_printf(seq, " %#x:", a);
4535 break;
4536 case OP_LRGLEN:
4537 seq_printf(seq, " mtu=%d", a);
4538 break;
4539 case OP_VLAN:
4540 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
4541 break;
4542 case OP_TCPLISW:
4543 seq_printf(seq, " csum=%#x", a);
4544 break;
4545 case OP_LARGESEND:
4546 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
4547 break;
4548 case OP_PACKET:
4549 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
4550 break;
4551 case OP_BUFFER:
4552 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
4553 break;
4554 default:
4555 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
4556 a, le16_to_cpu(le->length));
4557 }
4558
4559 if (le->ctrl & EOP) {
4560 seq_putc(seq, '\n');
4561 sop = 1;
4562 }
4563 }
4564
4565 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
4566 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
Mike McCormackc409c342009-07-21 14:51:20 +00004567 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004568 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
4569
David S. Millerd1d08d12008-01-07 20:53:33 -08004570 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004571 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004572 return 0;
4573}
4574
4575static int sky2_debug_open(struct inode *inode, struct file *file)
4576{
4577 return single_open(file, sky2_debug_show, inode->i_private);
4578}
4579
4580static const struct file_operations sky2_debug_fops = {
4581 .owner = THIS_MODULE,
4582 .open = sky2_debug_open,
4583 .read = seq_read,
4584 .llseek = seq_lseek,
4585 .release = single_release,
4586};
4587
4588/*
4589 * Use network device events to create/remove/rename
4590 * debugfs file entries
4591 */
4592static int sky2_device_event(struct notifier_block *unused,
4593 unsigned long event, void *ptr)
4594{
4595 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004596 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004597
stephen hemminger926d0972011-11-16 13:42:57 +00004598 if (dev->netdev_ops->ndo_open != sky2_open || !sky2_debug)
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004599 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004600
Mike McCormack060b9462010-07-29 03:34:52 +00004601 switch (event) {
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004602 case NETDEV_CHANGENAME:
4603 if (sky2->debugfs) {
4604 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
4605 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004606 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004607 break;
4608
4609 case NETDEV_GOING_DOWN:
4610 if (sky2->debugfs) {
Joe Perchesada1db52010-02-17 15:01:59 +00004611 netdev_printk(KERN_DEBUG, dev, "remove debugfs\n");
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004612 debugfs_remove(sky2->debugfs);
4613 sky2->debugfs = NULL;
4614 }
4615 break;
4616
4617 case NETDEV_UP:
4618 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
4619 sky2_debug, dev,
4620 &sky2_debug_fops);
4621 if (IS_ERR(sky2->debugfs))
4622 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004623 }
4624
4625 return NOTIFY_DONE;
4626}
4627
4628static struct notifier_block sky2_notifier = {
4629 .notifier_call = sky2_device_event,
4630};
4631
4632
4633static __init void sky2_debug_init(void)
4634{
4635 struct dentry *ent;
4636
4637 ent = debugfs_create_dir("sky2", NULL);
4638 if (!ent || IS_ERR(ent))
4639 return;
4640
4641 sky2_debug = ent;
4642 register_netdevice_notifier(&sky2_notifier);
4643}
4644
4645static __exit void sky2_debug_cleanup(void)
4646{
4647 if (sky2_debug) {
4648 unregister_netdevice_notifier(&sky2_notifier);
4649 debugfs_remove(sky2_debug);
4650 sky2_debug = NULL;
4651 }
4652}
4653
4654#else
4655#define sky2_debug_init()
4656#define sky2_debug_cleanup()
4657#endif
4658
Stephen Hemminger1436b302008-11-19 21:59:54 -08004659/* Two copies of network device operations to handle special case of
4660 not allowing netpoll on second port */
4661static const struct net_device_ops sky2_netdev_ops[2] = {
4662 {
stephen hemminger926d0972011-11-16 13:42:57 +00004663 .ndo_open = sky2_open,
4664 .ndo_stop = sky2_close,
Stephen Hemminger00829822008-11-20 20:14:53 -08004665 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004666 .ndo_do_ioctl = sky2_ioctl,
4667 .ndo_validate_addr = eth_validate_addr,
4668 .ndo_set_mac_address = sky2_set_mac_address,
Jiri Pirkoafc4b132011-08-16 06:29:01 +00004669 .ndo_set_rx_mode = sky2_set_multicast,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004670 .ndo_change_mtu = sky2_change_mtu,
Michał Mirosławf5d64032011-04-10 03:13:21 +00004671 .ndo_fix_features = sky2_fix_features,
4672 .ndo_set_features = sky2_set_features,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004673 .ndo_tx_timeout = sky2_tx_timeout,
stephen hemminger0885a302010-12-31 15:34:27 +00004674 .ndo_get_stats64 = sky2_get_stats,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004675#ifdef CONFIG_NET_POLL_CONTROLLER
4676 .ndo_poll_controller = sky2_netpoll,
4677#endif
4678 },
4679 {
stephen hemminger926d0972011-11-16 13:42:57 +00004680 .ndo_open = sky2_open,
4681 .ndo_stop = sky2_close,
Stephen Hemminger00829822008-11-20 20:14:53 -08004682 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004683 .ndo_do_ioctl = sky2_ioctl,
4684 .ndo_validate_addr = eth_validate_addr,
4685 .ndo_set_mac_address = sky2_set_mac_address,
Jiri Pirkoafc4b132011-08-16 06:29:01 +00004686 .ndo_set_rx_mode = sky2_set_multicast,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004687 .ndo_change_mtu = sky2_change_mtu,
Michał Mirosławf5d64032011-04-10 03:13:21 +00004688 .ndo_fix_features = sky2_fix_features,
4689 .ndo_set_features = sky2_set_features,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004690 .ndo_tx_timeout = sky2_tx_timeout,
stephen hemminger0885a302010-12-31 15:34:27 +00004691 .ndo_get_stats64 = sky2_get_stats,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004692 },
4693};
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004694
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004695/* Initialize network device */
4696static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08004697 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004698 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004699{
4700 struct sky2_port *sky2;
4701 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
4702
Joe Perches41de8d42012-01-29 13:47:52 +00004703 if (!dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004704 return NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004705
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004706 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004707 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004708 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004709 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemminger1436b302008-11-19 21:59:54 -08004710 dev->netdev_ops = &sky2_netdev_ops[port];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004711
4712 sky2 = netdev_priv(dev);
4713 sky2->netdev = dev;
4714 sky2->hw = hw;
4715 sky2->msg_enable = netif_msg_init(debug, default_msg);
4716
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004717 /* Auto speed and flow control */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004718 sky2->flags = SKY2_FLAG_AUTO_SPEED | SKY2_FLAG_AUTO_PAUSE;
4719 if (hw->chip_id != CHIP_ID_YUKON_XL)
Michał Mirosławf5d64032011-04-10 03:13:21 +00004720 dev->hw_features |= NETIF_F_RXCSUM;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004721
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004722 sky2->flow_mode = FC_BOTH;
4723
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004724 sky2->duplex = -1;
4725 sky2->speed = -1;
4726 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004727 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004728
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004729 spin_lock_init(&sky2->phy_lock);
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004730
Stephen Hemminger793b8832005-09-14 16:06:14 -07004731 sky2->tx_pending = TX_DEF_PENDING;
stephen hemminger738a8492011-11-17 14:37:23 +00004732 sky2->tx_ring_size = roundup_ring_size(TX_DEF_PENDING);
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004733 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004734
4735 hw->dev[port] = dev;
4736
4737 sky2->port = port;
4738
Michał Mirosławf5d64032011-04-10 03:13:21 +00004739 dev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004740
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004741 if (highmem)
4742 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004743
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004744 /* Enable receive hashing unless hardware is known broken */
4745 if (!(hw->flags & SKY2_HW_RSS_BROKEN))
Michał Mirosławf5d64032011-04-10 03:13:21 +00004746 dev->hw_features |= NETIF_F_RXHASH;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004747
Michał Mirosławf5d64032011-04-10 03:13:21 +00004748 if (!(hw->flags & SKY2_HW_VLAN_BROKEN)) {
4749 dev->hw_features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
4750 dev->vlan_features |= SKY2_VLAN_OFFLOADS;
4751 }
4752
4753 dev->features |= dev->hw_features;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004754
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004755 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004756 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb72005-09-28 10:01:03 -07004757 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004758
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004759 return dev;
4760}
4761
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004762static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004763{
4764 const struct sky2_port *sky2 = netdev_priv(dev);
4765
Joe Perches6c35aba2010-02-15 08:34:21 +00004766 netif_info(sky2, probe, dev, "addr %pM\n", dev->dev_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004767}
4768
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004769/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004770static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004771{
4772 struct sky2_hw *hw = dev_id;
4773 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4774
4775 if (status == 0)
4776 return IRQ_NONE;
4777
4778 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004779 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004780 wake_up(&hw->msi_wait);
4781 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4782 }
4783 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4784
4785 return IRQ_HANDLED;
4786}
4787
4788/* Test interrupt path by forcing a a software IRQ */
4789static int __devinit sky2_test_msi(struct sky2_hw *hw)
4790{
4791 struct pci_dev *pdev = hw->pdev;
4792 int err;
4793
Mike McCormack060b9462010-07-29 03:34:52 +00004794 init_waitqueue_head(&hw->msi_wait);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004795
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004796 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4797
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004798 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004799 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004800 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004801 return err;
4802 }
4803
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004804 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004805 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004806
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004807 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004808
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004809 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004810 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004811 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4812 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004813
4814 err = -EOPNOTSUPP;
4815 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4816 }
4817
4818 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004819 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004820
4821 free_irq(pdev->irq, hw);
4822
4823 return err;
4824}
4825
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004826/* This driver supports yukon2 chipset only */
4827static const char *sky2_name(u8 chipid, char *buf, int sz)
4828{
4829 const char *name[] = {
4830 "XL", /* 0xb3 */
4831 "EC Ultra", /* 0xb4 */
4832 "Extreme", /* 0xb5 */
4833 "EC", /* 0xb6 */
4834 "FE", /* 0xb7 */
4835 "FE+", /* 0xb8 */
4836 "Supreme", /* 0xb9 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004837 "UL 2", /* 0xba */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00004838 "Unknown", /* 0xbb */
4839 "Optima", /* 0xbc */
stephen hemminger4fb99cd2011-07-07 05:50:59 +00004840 "Optima Prime", /* 0xbd */
4841 "Optima 2", /* 0xbe */
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004842 };
4843
stephen hemminger4fb99cd2011-07-07 05:50:59 +00004844 if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OP_2)
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004845 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4846 else
4847 snprintf(buf, sz, "(chip %#x)", chipid);
4848 return buf;
4849}
4850
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004851static int __devinit sky2_probe(struct pci_dev *pdev,
4852 const struct pci_device_id *ent)
4853{
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00004854 struct net_device *dev, *dev1;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004855 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004856 int err, using_dac = 0, wol_default;
Stephen Hemminger38345072009-02-03 11:27:30 +00004857 u32 reg;
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004858 char buf1[16];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004859
Stephen Hemminger793b8832005-09-14 16:06:14 -07004860 err = pci_enable_device(pdev);
4861 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004862 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004863 goto err_out;
4864 }
4865
Stephen Hemminger6cc90a52009-06-11 07:03:47 +00004866 /* Get configuration information
4867 * Note: only regular PCI config access once to test for HW issues
4868 * other PCI access through shared memory for speed and to
4869 * avoid MMCONFIG problems.
4870 */
4871 err = pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
4872 if (err) {
4873 dev_err(&pdev->dev, "PCI read config failed\n");
4874 goto err_out;
4875 }
4876
4877 if (~reg == 0) {
4878 dev_err(&pdev->dev, "PCI configuration read error\n");
4879 goto err_out;
4880 }
4881
Stephen Hemminger793b8832005-09-14 16:06:14 -07004882 err = pci_request_regions(pdev, DRV_NAME);
4883 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004884 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004885 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004886 }
4887
4888 pci_set_master(pdev);
4889
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004890 if (sizeof(dma_addr_t) > sizeof(u32) &&
Yang Hongyang6a355282009-04-06 19:01:13 -07004891 !(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))) {
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004892 using_dac = 1;
Yang Hongyang6a355282009-04-06 19:01:13 -07004893 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004894 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004895 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4896 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004897 goto err_out_free_regions;
4898 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004899 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07004900 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004901 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004902 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004903 goto err_out_free_regions;
4904 }
4905 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004906
Stephen Hemminger38345072009-02-03 11:27:30 +00004907
4908#ifdef __BIG_ENDIAN
4909 /* The sk98lin vendor driver uses hardware byte swapping but
4910 * this driver uses software swapping.
4911 */
4912 reg &= ~PCI_REV_DESC;
Mike McCormack060b9462010-07-29 03:34:52 +00004913 err = pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
Stephen Hemminger38345072009-02-03 11:27:30 +00004914 if (err) {
4915 dev_err(&pdev->dev, "PCI write config failed\n");
4916 goto err_out_free_regions;
4917 }
4918#endif
4919
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07004920 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004921
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004922 err = -ENOMEM;
Stephen Hemminger66466792009-10-01 07:11:46 +00004923
4924 hw = kzalloc(sizeof(*hw) + strlen(DRV_NAME "@pci:")
4925 + strlen(pci_name(pdev)) + 1, GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004926 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004927 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004928 goto err_out_free_regions;
4929 }
4930
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004931 hw->pdev = pdev;
Stephen Hemminger66466792009-10-01 07:11:46 +00004932 sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004933
4934 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4935 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004936 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004937 goto err_out_free_hw;
4938 }
4939
Stephen Hemmingere3173832007-02-06 10:45:39 -08004940 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004941 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004942 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004943
stephen hemmingerefe91932010-04-22 13:42:56 +00004944 /* ring for status responses */
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004945 hw->st_size = hw->ports * roundup_pow_of_two(3*RX_MAX_PENDING + TX_MAX_PENDING);
stephen hemmingerefe91932010-04-22 13:42:56 +00004946 hw->st_le = pci_alloc_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4947 &hw->st_dma);
4948 if (!hw->st_le)
4949 goto err_out_reset;
4950
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004951 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n",
4952 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004953
Stephen Hemmingere3173832007-02-06 10:45:39 -08004954 sky2_reset(hw);
4955
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004956 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004957 if (!dev) {
4958 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004959 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004960 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004961
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004962 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4963 err = sky2_test_msi(hw);
4964 if (err == -EOPNOTSUPP)
4965 pci_disable_msi(pdev);
4966 else if (err)
4967 goto err_out_free_netdev;
4968 }
4969
Stephen Hemminger793b8832005-09-14 16:06:14 -07004970 err = register_netdev(dev);
4971 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004972 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004973 goto err_out_free_netdev;
4974 }
4975
Brandon Philips33cb7d32009-10-29 13:58:07 +00004976 netif_carrier_off(dev);
4977
Stephen Hemminger6de16232007-10-17 13:26:42 -07004978 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4979
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004980 sky2_show_addr(dev);
4981
shemminger@linux-foundation.org7f60c64b2007-01-26 11:38:36 -08004982 if (hw->ports > 1) {
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004983 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00004984 if (!dev1) {
4985 err = -ENOMEM;
4986 goto err_out_unregister;
Stephen Hemmingerca519272009-09-14 06:22:29 +00004987 }
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00004988
4989 err = register_netdev(dev1);
4990 if (err) {
4991 dev_err(&pdev->dev, "cannot register second net device\n");
4992 goto err_out_free_dev1;
4993 }
4994
4995 err = sky2_setup_irq(hw, hw->irq_name);
4996 if (err)
4997 goto err_out_unregister_dev1;
4998
4999 sky2_show_addr(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005000 }
5001
Stephen Hemminger32c2c302007-08-21 14:34:03 -07005002 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08005003 INIT_WORK(&hw->restart_work, sky2_restart);
5004
Stephen Hemminger793b8832005-09-14 16:06:14 -07005005 pci_set_drvdata(pdev, hw);
Rafael J. Wysocki1ae861e2009-12-31 12:15:54 +01005006 pdev->d3_delay = 150;
Stephen Hemminger793b8832005-09-14 16:06:14 -07005007
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005008 return 0;
5009
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00005010err_out_unregister_dev1:
5011 unregister_netdev(dev1);
5012err_out_free_dev1:
5013 free_netdev(dev1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07005014err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07005015 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08005016 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07005017 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005018err_out_free_netdev:
5019 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005020err_out_free_pci:
stephen hemmingerefe91932010-04-22 13:42:56 +00005021 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
5022 hw->st_le, hw->st_dma);
5023err_out_reset:
Stephen Hemminger793b8832005-09-14 16:06:14 -07005024 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005025err_out_iounmap:
5026 iounmap(hw->regs);
5027err_out_free_hw:
5028 kfree(hw);
5029err_out_free_regions:
5030 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07005031err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005032 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005033err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07005034 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005035 return err;
5036}
5037
5038static void __devexit sky2_remove(struct pci_dev *pdev)
5039{
Stephen Hemminger793b8832005-09-14 16:06:14 -07005040 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07005041 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005042
Stephen Hemminger793b8832005-09-14 16:06:14 -07005043 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005044 return;
5045
Stephen Hemminger32c2c302007-08-21 14:34:03 -07005046 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07005047 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07005048
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07005049 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07005050 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08005051
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07005052 sky2_write32(hw, B0_IMSK, 0);
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00005053 sky2_read32(hw, B0_IMSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005054
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08005055 sky2_power_aux(hw);
5056
Stephen Hemminger793b8832005-09-14 16:06:14 -07005057 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07005058 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005059
stephen hemminger0bdb0bd2011-09-23 11:13:40 +00005060 if (hw->ports > 1) {
5061 napi_disable(&hw->napi);
5062 free_irq(pdev->irq, hw);
5063 }
5064
Stephen Hemmingerea76e632007-09-19 15:36:44 -07005065 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08005066 pci_disable_msi(pdev);
stephen hemmingerefe91932010-04-22 13:42:56 +00005067 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
5068 hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005069 pci_release_regions(pdev);
5070 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07005071
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07005072 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07005073 free_netdev(hw->dev[i]);
5074
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005075 iounmap(hw->regs);
5076 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07005077
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005078 pci_set_drvdata(pdev, NULL);
5079}
5080
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005081static int sky2_suspend(struct device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005082{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005083 struct pci_dev *pdev = to_pci_dev(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07005084 struct sky2_hw *hw = pci_get_drvdata(pdev);
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005085 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005086
Stephen Hemminger549a68c2007-05-11 11:21:44 -07005087 if (!hw)
5088 return 0;
5089
Stephen Hemminger063a0b32008-04-02 09:03:23 -07005090 del_timer_sync(&hw->watchdog_timer);
5091 cancel_work_sync(&hw->restart_work);
5092
Stephen Hemminger19720732009-08-14 05:15:16 +00005093 rtnl_lock();
Mike McCormack3403aca2010-05-13 06:12:52 +00005094
5095 sky2_all_down(hw);
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09005096 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005097 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08005098 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005099
Stephen Hemmingere3173832007-02-06 10:45:39 -08005100 if (sky2->wol)
5101 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005102 }
5103
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08005104 sky2_power_aux(hw);
Stephen Hemminger19720732009-08-14 05:15:16 +00005105 rtnl_unlock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08005106
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09005107 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005108}
5109
Michel Lespinasse94252762011-03-06 16:14:50 +00005110#ifdef CONFIG_PM_SLEEP
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005111static int sky2_resume(struct device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005112{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005113 struct pci_dev *pdev = to_pci_dev(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07005114 struct sky2_hw *hw = pci_get_drvdata(pdev);
Mike McCormack3403aca2010-05-13 06:12:52 +00005115 int err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005116
Stephen Hemminger549a68c2007-05-11 11:21:44 -07005117 if (!hw)
5118 return 0;
5119
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07005120 /* Re-enable all clocks */
stephen hemmingera0db28b2010-02-07 06:23:53 +00005121 err = pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
5122 if (err) {
5123 dev_err(&pdev->dev, "PCI write config failed\n");
5124 goto out;
5125 }
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07005126
Mike McCormack3403aca2010-05-13 06:12:52 +00005127 rtnl_lock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08005128 sky2_reset(hw);
Mike McCormack3403aca2010-05-13 06:12:52 +00005129 sky2_all_up(hw);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07005130 rtnl_unlock();
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09005131
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08005132 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08005133out:
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07005134
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08005135 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08005136 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08005137 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005138}
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005139
5140static SIMPLE_DEV_PM_OPS(sky2_pm_ops, sky2_suspend, sky2_resume);
5141#define SKY2_PM_OPS (&sky2_pm_ops)
5142
5143#else
5144
5145#define SKY2_PM_OPS NULL
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005146#endif
5147
Stephen Hemmingere3173832007-02-06 10:45:39 -08005148static void sky2_shutdown(struct pci_dev *pdev)
5149{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005150 sky2_suspend(&pdev->dev);
5151 pci_wake_from_d3(pdev, device_may_wakeup(&pdev->dev));
5152 pci_set_power_state(pdev, PCI_D3hot);
Stephen Hemmingere3173832007-02-06 10:45:39 -08005153}
5154
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005155static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07005156 .name = DRV_NAME,
5157 .id_table = sky2_id_table,
5158 .probe = sky2_probe,
5159 .remove = __devexit_p(sky2_remove),
Stephen Hemmingere3173832007-02-06 10:45:39 -08005160 .shutdown = sky2_shutdown,
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00005161 .driver.pm = SKY2_PM_OPS,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005162};
5163
5164static int __init sky2_init_module(void)
5165{
Joe Perchesada1db52010-02-17 15:01:59 +00005166 pr_info("driver version " DRV_VERSION "\n");
Stephen Hemmingerc844d482008-08-27 20:48:23 -07005167
Stephen Hemminger3cf26752007-07-09 15:33:35 -07005168 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08005169 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005170}
5171
5172static void __exit sky2_cleanup_module(void)
5173{
5174 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07005175 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005176}
5177
5178module_init(sky2_init_module);
5179module_exit(sky2_cleanup_module);
5180
5181MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe6342007-01-23 11:38:57 -08005182MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005183MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08005184MODULE_VERSION(DRV_VERSION);