blob: 7186c481078556cf35c507cc98a233e8fd7c7a60 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/types.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/slab.h>
42#include <linux/device.h>
43#include <linux/skbuff.h>
44#include <linux/if_vlan.h>
45#include <linux/if_bridge.h>
46#include <linux/workqueue.h>
47#include <linux/jiffies.h>
Ido Schimmel4f2c6ae2016-01-27 15:16:43 +010048#include <linux/rtnetlink.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020049#include <net/switchdev.h>
50
51#include "spectrum.h"
52#include "core.h"
53#include "reg.h"
54
Elad Raze4b6f692016-01-10 21:06:27 +010055static u16 mlxsw_sp_port_vid_to_fid_get(struct mlxsw_sp_port *mlxsw_sp_port,
56 u16 vid)
57{
Ido Schimmel56918b62016-06-20 23:04:18 +020058 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_port);
Elad Raze4b6f692016-01-10 21:06:27 +010059 u16 fid = vid;
60
Ido Schimmel56918b62016-06-20 23:04:18 +020061 fid = f ? f->fid : fid;
Elad Raze4b6f692016-01-10 21:06:27 +010062
63 if (!fid)
64 fid = mlxsw_sp_port->pvid;
65
66 return fid;
67}
68
Ido Schimmel54a73202015-12-15 16:03:41 +010069static struct mlxsw_sp_port *
70mlxsw_sp_port_orig_get(struct net_device *dev,
71 struct mlxsw_sp_port *mlxsw_sp_port)
72{
73 struct mlxsw_sp_port *mlxsw_sp_vport;
74 u16 vid;
75
76 if (!is_vlan_dev(dev))
77 return mlxsw_sp_port;
78
79 vid = vlan_dev_vlan_id(dev);
80 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
81 WARN_ON(!mlxsw_sp_vport);
82
83 return mlxsw_sp_vport;
84}
85
Jiri Pirko56ade8f2015-10-16 14:01:37 +020086static int mlxsw_sp_port_attr_get(struct net_device *dev,
87 struct switchdev_attr *attr)
88{
89 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
90 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
91
Ido Schimmel54a73202015-12-15 16:03:41 +010092 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
93 if (!mlxsw_sp_port)
94 return -EINVAL;
95
Jiri Pirko56ade8f2015-10-16 14:01:37 +020096 switch (attr->id) {
97 case SWITCHDEV_ATTR_ID_PORT_PARENT_ID:
98 attr->u.ppid.id_len = sizeof(mlxsw_sp->base_mac);
99 memcpy(&attr->u.ppid.id, &mlxsw_sp->base_mac,
100 attr->u.ppid.id_len);
101 break;
102 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
103 attr->u.brport_flags =
104 (mlxsw_sp_port->learning ? BR_LEARNING : 0) |
Ido Schimmel02930382015-10-28 10:16:58 +0100105 (mlxsw_sp_port->learning_sync ? BR_LEARNING_SYNC : 0) |
106 (mlxsw_sp_port->uc_flood ? BR_FLOOD : 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200107 break;
108 default:
109 return -EOPNOTSUPP;
110 }
111
112 return 0;
113}
114
115static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
116 u8 state)
117{
118 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
119 enum mlxsw_reg_spms_state spms_state;
120 char *spms_pl;
121 u16 vid;
122 int err;
123
124 switch (state) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200125 case BR_STATE_FORWARDING:
126 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
127 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200128 case BR_STATE_LEARNING:
129 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
130 break;
Ido Schimmel45491132016-01-27 15:20:20 +0100131 case BR_STATE_LISTENING: /* fall-through */
Ido Schimmel9cb026e2016-01-27 15:20:19 +0100132 case BR_STATE_DISABLED: /* fall-through */
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200133 case BR_STATE_BLOCKING:
134 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
135 break;
136 default:
137 BUG();
138 }
139
140 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
141 if (!spms_pl)
142 return -ENOMEM;
143 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
Ido Schimmel54a73202015-12-15 16:03:41 +0100144
145 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
146 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200147 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
Ido Schimmel54a73202015-12-15 16:03:41 +0100148 } else {
149 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
150 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
151 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200152
153 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
154 kfree(spms_pl);
155 return err;
156}
157
158static int mlxsw_sp_port_attr_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
159 struct switchdev_trans *trans,
160 u8 state)
161{
162 if (switchdev_trans_ph_prepare(trans))
163 return 0;
164
165 mlxsw_sp_port->stp_state = state;
166 return mlxsw_sp_port_stp_state_set(mlxsw_sp_port, state);
167}
168
Ido Schimmel02930382015-10-28 10:16:58 +0100169static int __mlxsw_sp_port_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmelaad8b6b2016-09-01 10:37:45 +0200170 u16 idx_begin, u16 idx_end, bool uc_set,
171 bool bm_set)
Ido Schimmel02930382015-10-28 10:16:58 +0100172{
173 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100174 u16 local_port = mlxsw_sp_port->local_port;
175 enum mlxsw_flood_table_type table_type;
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100176 u16 range = idx_end - idx_begin + 1;
Ido Schimmel02930382015-10-28 10:16:58 +0100177 char *sftr_pl;
178 int err;
179
Ido Schimmel99724c12016-07-04 08:23:14 +0200180 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100181 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel99724c12016-07-04 08:23:14 +0200182 else
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100183 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100184
Ido Schimmel02930382015-10-28 10:16:58 +0100185 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
186 if (!sftr_pl)
187 return -ENOMEM;
188
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100189 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
Ido Schimmelaad8b6b2016-09-01 10:37:45 +0200190 table_type, range, local_port, uc_set);
Ido Schimmel02930382015-10-28 10:16:58 +0100191 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
192 if (err)
193 goto buffer_out;
194
Ido Schimmelc06a94e2015-12-15 16:03:38 +0100195 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, idx_begin,
Ido Schimmelaad8b6b2016-09-01 10:37:45 +0200196 table_type, range, local_port, bm_set);
Ido Schimmel02930382015-10-28 10:16:58 +0100197 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
Ido Schimmel28892862016-05-06 22:18:40 +0200198 if (err)
199 goto err_flood_bm_set;
Ido Schimmelaad8b6b2016-09-01 10:37:45 +0200200
201 goto buffer_out;
Ido Schimmel02930382015-10-28 10:16:58 +0100202
Ido Schimmel28892862016-05-06 22:18:40 +0200203err_flood_bm_set:
204 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
Ido Schimmelaad8b6b2016-09-01 10:37:45 +0200205 table_type, range, local_port, !uc_set);
Ido Schimmel28892862016-05-06 22:18:40 +0200206 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
Ido Schimmel02930382015-10-28 10:16:58 +0100207buffer_out:
208 kfree(sftr_pl);
209 return err;
210}
211
212static int mlxsw_sp_port_uc_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
213 bool set)
214{
215 struct net_device *dev = mlxsw_sp_port->dev;
216 u16 vid, last_visited_vid;
217 int err;
218
Ido Schimmel54a73202015-12-15 16:03:41 +0100219 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
Ido Schimmel41b996c2016-06-20 23:04:17 +0200220 u16 fid = mlxsw_sp_vport_fid_get(mlxsw_sp_port)->fid;
221 u16 vfid = mlxsw_sp_fid_to_vfid(fid);
Ido Schimmel54a73202015-12-15 16:03:41 +0100222
223 return __mlxsw_sp_port_flood_set(mlxsw_sp_port, vfid, vfid,
224 set, true);
225 }
226
Ido Schimmel02930382015-10-28 10:16:58 +0100227 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
228 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, set,
229 true);
230 if (err) {
231 last_visited_vid = vid;
232 goto err_port_flood_set;
233 }
234 }
235
236 return 0;
237
238err_port_flood_set:
239 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
240 __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, !set, true);
241 netdev_err(dev, "Failed to configure unicast flooding\n");
242 return err;
243}
244
Ido Schimmele6060022016-06-20 23:04:11 +0200245int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
Ido Schimmel47a0a9e2016-06-20 23:04:08 +0200246 bool set)
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100247{
Ido Schimmele6060022016-06-20 23:04:11 +0200248 u16 vfid;
249
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100250 /* In case of vFIDs, index into the flooding table is relative to
251 * the start of the vFIDs range.
252 */
Ido Schimmele6060022016-06-20 23:04:11 +0200253 vfid = mlxsw_sp_fid_to_vfid(fid);
Ido Schimmelaad8b6b2016-09-01 10:37:45 +0200254 return __mlxsw_sp_port_flood_set(mlxsw_sp_vport, vfid, vfid, set, set);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100255}
256
Ido Schimmel89b548f2016-08-24 12:00:27 +0200257static int mlxsw_sp_port_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
258 bool set)
259{
260 u16 vid;
261 int err;
262
263 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
264 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
265
266 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
267 set);
268 }
269
270 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
271 err = __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
272 set);
273 if (err)
274 goto err_port_vid_learning_set;
275 }
276
277 return 0;
278
279err_port_vid_learning_set:
280 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
281 __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid, !set);
282 return err;
283}
284
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200285static int mlxsw_sp_port_attr_br_flags_set(struct mlxsw_sp_port *mlxsw_sp_port,
286 struct switchdev_trans *trans,
287 unsigned long brport_flags)
288{
Ido Schimmel89b548f2016-08-24 12:00:27 +0200289 unsigned long learning = mlxsw_sp_port->learning ? BR_LEARNING : 0;
Ido Schimmel02930382015-10-28 10:16:58 +0100290 unsigned long uc_flood = mlxsw_sp_port->uc_flood ? BR_FLOOD : 0;
Ido Schimmel02930382015-10-28 10:16:58 +0100291 int err;
292
Ido Schimmel6c72a3d2016-01-04 10:42:26 +0100293 if (!mlxsw_sp_port->bridged)
294 return -EINVAL;
295
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200296 if (switchdev_trans_ph_prepare(trans))
297 return 0;
298
Ido Schimmel02930382015-10-28 10:16:58 +0100299 if ((uc_flood ^ brport_flags) & BR_FLOOD) {
Ido Schimmel89b548f2016-08-24 12:00:27 +0200300 err = mlxsw_sp_port_uc_flood_set(mlxsw_sp_port,
301 !mlxsw_sp_port->uc_flood);
Ido Schimmel02930382015-10-28 10:16:58 +0100302 if (err)
303 return err;
304 }
305
Ido Schimmel89b548f2016-08-24 12:00:27 +0200306 if ((learning ^ brport_flags) & BR_LEARNING) {
307 err = mlxsw_sp_port_learning_set(mlxsw_sp_port,
308 !mlxsw_sp_port->learning);
309 if (err)
310 goto err_port_learning_set;
311 }
312
Ido Schimmel02930382015-10-28 10:16:58 +0100313 mlxsw_sp_port->uc_flood = brport_flags & BR_FLOOD ? 1 : 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200314 mlxsw_sp_port->learning = brport_flags & BR_LEARNING ? 1 : 0;
315 mlxsw_sp_port->learning_sync = brport_flags & BR_LEARNING_SYNC ? 1 : 0;
Ido Schimmel02930382015-10-28 10:16:58 +0100316
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200317 return 0;
Ido Schimmel89b548f2016-08-24 12:00:27 +0200318
319err_port_learning_set:
320 if ((uc_flood ^ brport_flags) & BR_FLOOD)
321 mlxsw_sp_port_uc_flood_set(mlxsw_sp_port,
322 mlxsw_sp_port->uc_flood);
323 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200324}
325
326static int mlxsw_sp_ageing_set(struct mlxsw_sp *mlxsw_sp, u32 ageing_time)
327{
328 char sfdat_pl[MLXSW_REG_SFDAT_LEN];
329 int err;
330
331 mlxsw_reg_sfdat_pack(sfdat_pl, ageing_time);
332 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdat), sfdat_pl);
333 if (err)
334 return err;
335 mlxsw_sp->ageing_time = ageing_time;
336 return 0;
337}
338
339static int mlxsw_sp_port_attr_br_ageing_set(struct mlxsw_sp_port *mlxsw_sp_port,
340 struct switchdev_trans *trans,
Jiri Pirko135f9ec2015-10-28 10:17:02 +0100341 unsigned long ageing_clock_t)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200342{
343 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Jiri Pirko135f9ec2015-10-28 10:17:02 +0100344 unsigned long ageing_jiffies = clock_t_to_jiffies(ageing_clock_t);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200345 u32 ageing_time = jiffies_to_msecs(ageing_jiffies) / 1000;
346
Ido Schimmel869f63a2016-03-08 12:59:33 -0800347 if (switchdev_trans_ph_prepare(trans)) {
348 if (ageing_time < MLXSW_SP_MIN_AGEING_TIME ||
349 ageing_time > MLXSW_SP_MAX_AGEING_TIME)
350 return -ERANGE;
351 else
352 return 0;
353 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200354
355 return mlxsw_sp_ageing_set(mlxsw_sp, ageing_time);
356}
357
Elad Raz26a4ea02016-01-06 13:01:10 +0100358static int mlxsw_sp_port_attr_br_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
359 struct switchdev_trans *trans,
360 struct net_device *orig_dev,
361 bool vlan_enabled)
362{
363 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
364
365 /* SWITCHDEV_TRANS_PREPARE phase */
366 if ((!vlan_enabled) && (mlxsw_sp->master_bridge.dev == orig_dev)) {
367 netdev_err(mlxsw_sp_port->dev, "Bridge must be vlan-aware\n");
368 return -EINVAL;
369 }
370
371 return 0;
372}
373
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200374static int mlxsw_sp_port_attr_set(struct net_device *dev,
375 const struct switchdev_attr *attr,
376 struct switchdev_trans *trans)
377{
378 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
379 int err = 0;
380
Ido Schimmel54a73202015-12-15 16:03:41 +0100381 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
382 if (!mlxsw_sp_port)
383 return -EINVAL;
384
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200385 switch (attr->id) {
386 case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
387 err = mlxsw_sp_port_attr_stp_state_set(mlxsw_sp_port, trans,
388 attr->u.stp_state);
389 break;
390 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
391 err = mlxsw_sp_port_attr_br_flags_set(mlxsw_sp_port, trans,
392 attr->u.brport_flags);
393 break;
394 case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:
395 err = mlxsw_sp_port_attr_br_ageing_set(mlxsw_sp_port, trans,
396 attr->u.ageing_time);
397 break;
Elad Raz26a4ea02016-01-06 13:01:10 +0100398 case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
399 err = mlxsw_sp_port_attr_br_vlan_set(mlxsw_sp_port, trans,
400 attr->orig_dev,
401 attr->u.vlan_filtering);
402 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200403 default:
404 err = -EOPNOTSUPP;
405 break;
406 }
407
408 return err;
409}
410
Ido Schimmel14d39462016-06-20 23:04:15 +0200411static int mlxsw_sp_fid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
412{
413 char sfmr_pl[MLXSW_REG_SFMR_LEN];
414
415 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, fid);
416 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
417}
418
419static int mlxsw_sp_fid_map(struct mlxsw_sp *mlxsw_sp, u16 fid, bool valid)
420{
421 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
422 char svfa_pl[MLXSW_REG_SVFA_LEN];
423
424 mlxsw_reg_svfa_pack(svfa_pl, 0, mt, valid, fid, fid);
425 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
426}
427
428static struct mlxsw_sp_fid *mlxsw_sp_fid_alloc(u16 fid)
429{
430 struct mlxsw_sp_fid *f;
431
432 f = kzalloc(sizeof(*f), GFP_KERNEL);
433 if (!f)
434 return NULL;
435
436 f->fid = fid;
437
438 return f;
439}
440
Ido Schimmel701b1862016-07-04 08:23:16 +0200441struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid)
Ido Schimmel14d39462016-06-20 23:04:15 +0200442{
443 struct mlxsw_sp_fid *f;
444 int err;
445
446 err = mlxsw_sp_fid_op(mlxsw_sp, fid, true);
447 if (err)
448 return ERR_PTR(err);
449
450 /* Although all the ports member in the FID might be using a
451 * {Port, VID} to FID mapping, we create a global VID-to-FID
452 * mapping. This allows a port to transition to VLAN mode,
453 * knowing the global mapping exists.
454 */
455 err = mlxsw_sp_fid_map(mlxsw_sp, fid, true);
456 if (err)
457 goto err_fid_map;
458
459 f = mlxsw_sp_fid_alloc(fid);
460 if (!f) {
461 err = -ENOMEM;
462 goto err_allocate_fid;
463 }
464
465 list_add(&f->list, &mlxsw_sp->fids);
466
467 return f;
468
469err_allocate_fid:
470 mlxsw_sp_fid_map(mlxsw_sp, fid, false);
471err_fid_map:
472 mlxsw_sp_fid_op(mlxsw_sp, fid, false);
473 return ERR_PTR(err);
474}
475
Ido Schimmel701b1862016-07-04 08:23:16 +0200476void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f)
Ido Schimmel14d39462016-06-20 23:04:15 +0200477{
478 u16 fid = f->fid;
479
480 list_del(&f->list);
481
Ido Schimmel99f44bb2016-07-04 08:23:17 +0200482 if (f->r)
483 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
484
Ido Schimmel14d39462016-06-20 23:04:15 +0200485 kfree(f);
486
Ido Schimmel81682872016-08-17 16:39:36 +0200487 mlxsw_sp_fid_map(mlxsw_sp, fid, false);
488
Ido Schimmel14d39462016-06-20 23:04:15 +0200489 mlxsw_sp_fid_op(mlxsw_sp, fid, false);
490}
491
492static int __mlxsw_sp_port_fid_join(struct mlxsw_sp_port *mlxsw_sp_port,
493 u16 fid)
494{
495 struct mlxsw_sp_fid *f;
496
Ido Schimmelf1de7a22016-09-01 10:37:44 +0200497 if (test_bit(fid, mlxsw_sp_port->active_vlans))
498 return 0;
499
Ido Schimmel14d39462016-06-20 23:04:15 +0200500 f = mlxsw_sp_fid_find(mlxsw_sp_port->mlxsw_sp, fid);
501 if (!f) {
502 f = mlxsw_sp_fid_create(mlxsw_sp_port->mlxsw_sp, fid);
503 if (IS_ERR(f))
504 return PTR_ERR(f);
505 }
506
507 f->ref_count++;
508
Ido Schimmel22305372016-06-20 23:04:21 +0200509 netdev_dbg(mlxsw_sp_port->dev, "Joined FID=%d\n", fid);
510
Ido Schimmel14d39462016-06-20 23:04:15 +0200511 return 0;
512}
513
514static void __mlxsw_sp_port_fid_leave(struct mlxsw_sp_port *mlxsw_sp_port,
515 u16 fid)
516{
517 struct mlxsw_sp_fid *f;
518
519 f = mlxsw_sp_fid_find(mlxsw_sp_port->mlxsw_sp, fid);
520 if (WARN_ON(!f))
521 return;
522
Ido Schimmel22305372016-06-20 23:04:21 +0200523 netdev_dbg(mlxsw_sp_port->dev, "Left FID=%d\n", fid);
524
Ido Schimmelfe3f6d12016-06-20 23:04:19 +0200525 mlxsw_sp_port_fdb_flush(mlxsw_sp_port, fid);
526
Ido Schimmel14d39462016-06-20 23:04:15 +0200527 if (--f->ref_count == 0)
528 mlxsw_sp_fid_destroy(mlxsw_sp_port->mlxsw_sp, f);
529}
530
531static int mlxsw_sp_port_fid_map(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid,
532 bool valid)
533{
534 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
535
536 /* If port doesn't have vPorts, then it can use the global
537 * VID-to-FID mapping.
538 */
539 if (list_empty(&mlxsw_sp_port->vports_list))
540 return 0;
541
542 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, valid, fid, fid);
543}
544
545static int mlxsw_sp_port_fid_join(struct mlxsw_sp_port *mlxsw_sp_port,
546 u16 fid_begin, u16 fid_end)
547{
548 int fid, err;
549
550 for (fid = fid_begin; fid <= fid_end; fid++) {
551 err = __mlxsw_sp_port_fid_join(mlxsw_sp_port, fid);
552 if (err)
553 goto err_port_fid_join;
554 }
555
556 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end,
Ido Schimmelaad8b6b2016-09-01 10:37:45 +0200557 mlxsw_sp_port->uc_flood, true);
Ido Schimmel14d39462016-06-20 23:04:15 +0200558 if (err)
559 goto err_port_flood_set;
560
561 for (fid = fid_begin; fid <= fid_end; fid++) {
562 err = mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, true);
563 if (err)
564 goto err_port_fid_map;
565 }
566
567 return 0;
568
569err_port_fid_map:
570 for (fid--; fid >= fid_begin; fid--)
571 mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, false);
572 __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end, false,
573 false);
574err_port_flood_set:
575 fid = fid_end;
576err_port_fid_join:
577 for (fid--; fid >= fid_begin; fid--)
578 __mlxsw_sp_port_fid_leave(mlxsw_sp_port, fid);
579 return err;
580}
581
582static void mlxsw_sp_port_fid_leave(struct mlxsw_sp_port *mlxsw_sp_port,
583 u16 fid_begin, u16 fid_end)
584{
585 int fid;
586
587 for (fid = fid_begin; fid <= fid_end; fid++)
588 mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, false);
589
590 __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end, false,
591 false);
592
593 for (fid = fid_begin; fid <= fid_end; fid++)
594 __mlxsw_sp_port_fid_leave(mlxsw_sp_port, fid);
595}
596
Ido Schimmel28a01d22016-02-18 11:30:02 +0100597static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port,
598 u16 vid)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200599{
600 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
601 char spvid_pl[MLXSW_REG_SPVID_LEN];
602
603 mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);
604 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
605}
606
Ido Schimmel28a01d22016-02-18 11:30:02 +0100607static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port,
608 bool allow)
609{
610 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
611 char spaft_pl[MLXSW_REG_SPAFT_LEN];
612
613 mlxsw_reg_spaft_pack(spaft_pl, mlxsw_sp_port->local_port, allow);
614 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);
615}
616
617int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
618{
619 struct net_device *dev = mlxsw_sp_port->dev;
620 int err;
621
622 if (!vid) {
623 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, false);
624 if (err) {
625 netdev_err(dev, "Failed to disallow untagged traffic\n");
626 return err;
627 }
628 } else {
629 err = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid);
630 if (err) {
631 netdev_err(dev, "Failed to set PVID\n");
632 return err;
633 }
634
635 /* Only allow if not already allowed. */
636 if (!mlxsw_sp_port->pvid) {
637 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port,
638 true);
639 if (err) {
640 netdev_err(dev, "Failed to allow untagged traffic\n");
641 goto err_port_allow_untagged_set;
642 }
643 }
644 }
645
646 mlxsw_sp_port->pvid = vid;
647 return 0;
648
649err_port_allow_untagged_set:
650 __mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid);
651 return err;
652}
653
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +0100654static int __mlxsw_sp_port_vlans_set(struct mlxsw_sp_port *mlxsw_sp_port,
655 u16 vid_begin, u16 vid_end, bool is_member,
656 bool untagged)
657{
658 u16 vid, vid_e;
659 int err;
660
661 for (vid = vid_begin; vid <= vid_end;
662 vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
663 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
664 vid_end);
665
666 err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
667 is_member, untagged);
668 if (err)
669 return err;
670 }
671
672 return 0;
673}
674
Ido Schimmel584d73d2016-08-24 12:00:26 +0200675static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
676 u16 vid_begin, u16 vid_end,
677 bool learn_enable)
678{
679 u16 vid, vid_e;
680 int err;
681
682 for (vid = vid_begin; vid <= vid_end;
683 vid += MLXSW_REG_SPVMLR_REC_MAX_COUNT) {
684 vid_e = min((u16) (vid + MLXSW_REG_SPVMLR_REC_MAX_COUNT - 1),
685 vid_end);
686
687 err = __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid,
688 vid_e, learn_enable);
689 if (err)
690 return err;
691 }
692
693 return 0;
694}
695
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200696static int __mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
697 u16 vid_begin, u16 vid_end,
698 bool flag_untagged, bool flag_pvid)
699{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200700 struct net_device *dev = mlxsw_sp_port->dev;
Ido Schimmel14d39462016-06-20 23:04:15 +0200701 u16 vid, old_pvid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200702 int err;
703
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200704 if (!mlxsw_sp_port->bridged)
Ido Schimmel32d863f2016-07-02 11:00:10 +0200705 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200706
Ido Schimmel14d39462016-06-20 23:04:15 +0200707 err = mlxsw_sp_port_fid_join(mlxsw_sp_port, vid_begin, vid_end);
Ido Schimmel1b3433a2015-10-28 10:16:57 +0100708 if (err) {
Ido Schimmel14d39462016-06-20 23:04:15 +0200709 netdev_err(dev, "Failed to join FIDs\n");
710 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200711 }
712
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +0100713 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
714 true, flag_untagged);
715 if (err) {
716 netdev_err(dev, "Unable to add VIDs %d-%d\n", vid_begin,
717 vid_end);
Ido Schimmelb07a9662015-11-19 12:27:40 +0100718 goto err_port_vlans_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200719 }
720
Ido Schimmelb07a9662015-11-19 12:27:40 +0100721 old_pvid = mlxsw_sp_port->pvid;
722 if (flag_pvid && old_pvid != vid_begin) {
723 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid_begin);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200724 if (err) {
Ido Schimmelb07a9662015-11-19 12:27:40 +0100725 netdev_err(dev, "Unable to add PVID %d\n", vid_begin);
726 goto err_port_pvid_set;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200727 }
Ido Schimmel28a01d22016-02-18 11:30:02 +0100728 } else if (!flag_pvid && old_pvid >= vid_begin && old_pvid <= vid_end) {
729 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 0);
730 if (err) {
731 netdev_err(dev, "Unable to del PVID\n");
732 goto err_port_pvid_set;
733 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200734 }
735
Ido Schimmel584d73d2016-08-24 12:00:26 +0200736 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid_begin, vid_end,
737 mlxsw_sp_port->learning);
738 if (err) {
739 netdev_err(dev, "Failed to set learning for VIDs %d-%d\n",
740 vid_begin, vid_end);
741 goto err_port_vid_learning_set;
742 }
743
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200744 /* Changing activity bits only if HW operation succeded */
Elad Razfc1273a2016-01-06 13:01:11 +0100745 for (vid = vid_begin; vid <= vid_end; vid++) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200746 set_bit(vid, mlxsw_sp_port->active_vlans);
Elad Razfc1273a2016-01-06 13:01:11 +0100747 if (flag_untagged)
748 set_bit(vid, mlxsw_sp_port->untagged_vlans);
749 else
750 clear_bit(vid, mlxsw_sp_port->untagged_vlans);
751 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200752
Ido Schimmelb07a9662015-11-19 12:27:40 +0100753 /* STP state change must be done after we set active VLANs */
754 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port,
755 mlxsw_sp_port->stp_state);
756 if (err) {
757 netdev_err(dev, "Failed to set STP state\n");
758 goto err_port_stp_state_set;
759 }
760
761 return 0;
762
Ido Schimmelb07a9662015-11-19 12:27:40 +0100763err_port_stp_state_set:
764 for (vid = vid_begin; vid <= vid_end; vid++)
765 clear_bit(vid, mlxsw_sp_port->active_vlans);
Ido Schimmel584d73d2016-08-24 12:00:26 +0200766 mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid_begin, vid_end,
767 false);
768err_port_vid_learning_set:
Ido Schimmelb07a9662015-11-19 12:27:40 +0100769 if (old_pvid != mlxsw_sp_port->pvid)
770 mlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid);
771err_port_pvid_set:
772 __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false,
773 false);
774err_port_vlans_set:
Ido Schimmel14d39462016-06-20 23:04:15 +0200775 mlxsw_sp_port_fid_leave(mlxsw_sp_port, vid_begin, vid_end);
Ido Schimmelb07a9662015-11-19 12:27:40 +0100776 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200777}
778
779static int mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
780 const struct switchdev_obj_port_vlan *vlan,
781 struct switchdev_trans *trans)
782{
Elad Raze4a13052016-01-06 13:01:09 +0100783 bool flag_untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
784 bool flag_pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200785
786 if (switchdev_trans_ph_prepare(trans))
787 return 0;
788
789 return __mlxsw_sp_port_vlans_add(mlxsw_sp_port,
790 vlan->vid_begin, vlan->vid_end,
Elad Raze4a13052016-01-06 13:01:09 +0100791 flag_untagged, flag_pvid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200792}
793
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100794static enum mlxsw_reg_sfd_rec_policy mlxsw_sp_sfd_rec_policy(bool dynamic)
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200795{
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100796 return dynamic ? MLXSW_REG_SFD_REC_POLICY_DYNAMIC_ENTRY_INGRESS :
797 MLXSW_REG_SFD_REC_POLICY_STATIC_ENTRY;
798}
799
800static enum mlxsw_reg_sfd_op mlxsw_sp_sfd_op(bool adding)
801{
802 return adding ? MLXSW_REG_SFD_OP_WRITE_EDIT :
803 MLXSW_REG_SFD_OP_WRITE_REMOVE;
804}
805
Ido Schimmel6e095fd2016-07-04 08:23:13 +0200806static int __mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port,
807 const char *mac, u16 fid, bool adding,
808 enum mlxsw_reg_sfd_rec_action action,
809 bool dynamic)
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100810{
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200811 char *sfd_pl;
812 int err;
813
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200814 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
815 if (!sfd_pl)
816 return -ENOMEM;
817
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100818 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
819 mlxsw_reg_sfd_uc_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
Ido Schimmel6e095fd2016-07-04 08:23:13 +0200820 mac, fid, action, local_port);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100821 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
822 kfree(sfd_pl);
823
824 return err;
825}
826
Ido Schimmel6e095fd2016-07-04 08:23:13 +0200827static int mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port,
828 const char *mac, u16 fid, bool adding,
829 bool dynamic)
830{
831 return __mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid, adding,
832 MLXSW_REG_SFD_REC_ACTION_NOP, dynamic);
833}
834
835int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
836 bool adding)
837{
838 return __mlxsw_sp_port_fdb_uc_op(mlxsw_sp, 0, mac, fid, adding,
839 MLXSW_REG_SFD_REC_ACTION_FORWARD_IP_ROUTER,
840 false);
841}
842
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100843static int mlxsw_sp_port_fdb_uc_lag_op(struct mlxsw_sp *mlxsw_sp, u16 lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +0100844 const char *mac, u16 fid, u16 lag_vid,
845 bool adding, bool dynamic)
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100846{
847 char *sfd_pl;
848 int err;
849
850 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
851 if (!sfd_pl)
852 return -ENOMEM;
853
854 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
855 mlxsw_reg_sfd_uc_lag_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
Ido Schimmel64771e32015-12-15 16:03:46 +0100856 mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP,
857 lag_vid, lag_id);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100858 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200859 kfree(sfd_pl);
860
861 return err;
862}
863
864static int
865mlxsw_sp_port_fdb_static_add(struct mlxsw_sp_port *mlxsw_sp_port,
866 const struct switchdev_obj_port_fdb *fdb,
867 struct switchdev_trans *trans)
868{
Elad Raze4b6f692016-01-10 21:06:27 +0100869 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
Ido Schimmel64771e32015-12-15 16:03:46 +0100870 u16 lag_vid = 0;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100871
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200872 if (switchdev_trans_ph_prepare(trans))
873 return 0;
874
Ido Schimmel54a73202015-12-15 16:03:41 +0100875 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
Ido Schimmel64771e32015-12-15 16:03:46 +0100876 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Ido Schimmel54a73202015-12-15 16:03:41 +0100877 }
878
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100879 if (!mlxsw_sp_port->lagged)
Jiri Pirko2fa9d452016-01-07 11:50:29 +0100880 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
881 mlxsw_sp_port->local_port,
Ido Schimmel9de6a802015-12-15 16:03:40 +0100882 fdb->addr, fid, true, false);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +0100883 else
884 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
885 mlxsw_sp_port->lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +0100886 fdb->addr, fid, lag_vid,
887 true, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200888}
889
Elad Raz3a49b4f2016-01-10 21:06:28 +0100890static int mlxsw_sp_port_mdb_op(struct mlxsw_sp *mlxsw_sp, const char *addr,
891 u16 fid, u16 mid, bool adding)
892{
893 char *sfd_pl;
894 int err;
895
896 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
897 if (!sfd_pl)
898 return -ENOMEM;
899
900 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
901 mlxsw_reg_sfd_mc_pack(sfd_pl, 0, addr, fid,
902 MLXSW_REG_SFD_REC_ACTION_NOP, mid);
903 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
904 kfree(sfd_pl);
905 return err;
906}
907
908static int mlxsw_sp_port_smid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mid,
909 bool add, bool clear_all_ports)
910{
911 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
912 char *smid_pl;
913 int err, i;
914
915 smid_pl = kmalloc(MLXSW_REG_SMID_LEN, GFP_KERNEL);
916 if (!smid_pl)
917 return -ENOMEM;
918
919 mlxsw_reg_smid_pack(smid_pl, mid, mlxsw_sp_port->local_port, add);
920 if (clear_all_ports) {
921 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
922 if (mlxsw_sp->ports[i])
923 mlxsw_reg_smid_port_mask_set(smid_pl, i, 1);
924 }
925 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl);
926 kfree(smid_pl);
927 return err;
928}
929
930static struct mlxsw_sp_mid *__mlxsw_sp_mc_get(struct mlxsw_sp *mlxsw_sp,
931 const unsigned char *addr,
932 u16 vid)
933{
934 struct mlxsw_sp_mid *mid;
935
936 list_for_each_entry(mid, &mlxsw_sp->br_mids.list, list) {
937 if (ether_addr_equal(mid->addr, addr) && mid->vid == vid)
938 return mid;
939 }
940 return NULL;
941}
942
943static struct mlxsw_sp_mid *__mlxsw_sp_mc_alloc(struct mlxsw_sp *mlxsw_sp,
944 const unsigned char *addr,
945 u16 vid)
946{
947 struct mlxsw_sp_mid *mid;
948 u16 mid_idx;
949
950 mid_idx = find_first_zero_bit(mlxsw_sp->br_mids.mapped,
951 MLXSW_SP_MID_MAX);
952 if (mid_idx == MLXSW_SP_MID_MAX)
953 return NULL;
954
955 mid = kzalloc(sizeof(*mid), GFP_KERNEL);
956 if (!mid)
957 return NULL;
958
959 set_bit(mid_idx, mlxsw_sp->br_mids.mapped);
960 ether_addr_copy(mid->addr, addr);
961 mid->vid = vid;
962 mid->mid = mid_idx;
963 mid->ref_count = 0;
964 list_add_tail(&mid->list, &mlxsw_sp->br_mids.list);
965
966 return mid;
967}
968
969static int __mlxsw_sp_mc_dec_ref(struct mlxsw_sp *mlxsw_sp,
970 struct mlxsw_sp_mid *mid)
971{
972 if (--mid->ref_count == 0) {
973 list_del(&mid->list);
974 clear_bit(mid->mid, mlxsw_sp->br_mids.mapped);
975 kfree(mid);
976 return 1;
977 }
978 return 0;
979}
980
981static int mlxsw_sp_port_mdb_add(struct mlxsw_sp_port *mlxsw_sp_port,
982 const struct switchdev_obj_port_mdb *mdb,
983 struct switchdev_trans *trans)
984{
985 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
986 struct net_device *dev = mlxsw_sp_port->dev;
987 struct mlxsw_sp_mid *mid;
988 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
989 int err = 0;
990
991 if (switchdev_trans_ph_prepare(trans))
992 return 0;
993
994 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
995 if (!mid) {
996 mid = __mlxsw_sp_mc_alloc(mlxsw_sp, mdb->addr, mdb->vid);
997 if (!mid) {
998 netdev_err(dev, "Unable to allocate MC group\n");
999 return -ENOMEM;
1000 }
1001 }
1002 mid->ref_count++;
1003
1004 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, true,
1005 mid->ref_count == 1);
1006 if (err) {
1007 netdev_err(dev, "Unable to set SMID\n");
1008 goto err_out;
1009 }
1010
1011 if (mid->ref_count == 1) {
1012 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid->mid,
1013 true);
1014 if (err) {
1015 netdev_err(dev, "Unable to set MC SFD\n");
1016 goto err_out;
1017 }
1018 }
1019
1020 return 0;
1021
1022err_out:
1023 __mlxsw_sp_mc_dec_ref(mlxsw_sp, mid);
1024 return err;
1025}
1026
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001027static int mlxsw_sp_port_obj_add(struct net_device *dev,
1028 const struct switchdev_obj *obj,
1029 struct switchdev_trans *trans)
1030{
1031 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1032 int err = 0;
1033
Ido Schimmel54a73202015-12-15 16:03:41 +01001034 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1035 if (!mlxsw_sp_port)
1036 return -EINVAL;
1037
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001038 switch (obj->id) {
1039 case SWITCHDEV_OBJ_ID_PORT_VLAN:
Ido Schimmel54a73202015-12-15 16:03:41 +01001040 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
1041 return 0;
1042
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001043 err = mlxsw_sp_port_vlans_add(mlxsw_sp_port,
1044 SWITCHDEV_OBJ_PORT_VLAN(obj),
1045 trans);
1046 break;
Jiri Pirko61c503f2016-07-04 08:23:11 +02001047 case SWITCHDEV_OBJ_ID_IPV4_FIB:
1048 err = mlxsw_sp_router_fib4_add(mlxsw_sp_port,
1049 SWITCHDEV_OBJ_IPV4_FIB(obj),
1050 trans);
1051 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001052 case SWITCHDEV_OBJ_ID_PORT_FDB:
1053 err = mlxsw_sp_port_fdb_static_add(mlxsw_sp_port,
1054 SWITCHDEV_OBJ_PORT_FDB(obj),
1055 trans);
1056 break;
Elad Raz3a49b4f2016-01-10 21:06:28 +01001057 case SWITCHDEV_OBJ_ID_PORT_MDB:
1058 err = mlxsw_sp_port_mdb_add(mlxsw_sp_port,
1059 SWITCHDEV_OBJ_PORT_MDB(obj),
1060 trans);
1061 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001062 default:
1063 err = -EOPNOTSUPP;
1064 break;
1065 }
1066
1067 return err;
1068}
1069
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001070static int __mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
Ido Schimmel05978482016-08-17 16:39:30 +02001071 u16 vid_begin, u16 vid_end)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001072{
Ido Schimmel3b7ad5e2015-11-19 12:27:39 +01001073 u16 vid, pvid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001074
Ido Schimmel05978482016-08-17 16:39:30 +02001075 if (!mlxsw_sp_port->bridged)
Ido Schimmel32d863f2016-07-02 11:00:10 +02001076 return -EINVAL;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001077
Ido Schimmel584d73d2016-08-24 12:00:26 +02001078 mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid_begin, vid_end,
1079 false);
1080
Ido Schimmel06c071f2015-11-19 12:27:38 +01001081 pvid = mlxsw_sp_port->pvid;
Ido Schimmel640be7b2016-08-24 12:00:25 +02001082 if (pvid >= vid_begin && pvid <= vid_end)
1083 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 0);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001084
Ido Schimmel640be7b2016-08-24 12:00:25 +02001085 __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false,
1086 false);
Ido Schimmelf7a8f6c2016-08-24 12:00:24 +02001087
Ido Schimmel14d39462016-06-20 23:04:15 +02001088 mlxsw_sp_port_fid_leave(mlxsw_sp_port, vid_begin, vid_end);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001089
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001090 /* Changing activity bits only if HW operation succeded */
1091 for (vid = vid_begin; vid <= vid_end; vid++)
1092 clear_bit(vid, mlxsw_sp_port->active_vlans);
1093
1094 return 0;
1095}
1096
1097static int mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
1098 const struct switchdev_obj_port_vlan *vlan)
1099{
Ido Schimmel05978482016-08-17 16:39:30 +02001100 return __mlxsw_sp_port_vlans_del(mlxsw_sp_port, vlan->vid_begin,
1101 vlan->vid_end);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001102}
1103
Ido Schimmel4dc236c2016-01-27 15:20:16 +01001104void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port)
1105{
1106 u16 vid;
1107
1108 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
Ido Schimmel05978482016-08-17 16:39:30 +02001109 __mlxsw_sp_port_vlans_del(mlxsw_sp_port, vid, vid);
Ido Schimmel4dc236c2016-01-27 15:20:16 +01001110}
1111
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001112static int
1113mlxsw_sp_port_fdb_static_del(struct mlxsw_sp_port *mlxsw_sp_port,
1114 const struct switchdev_obj_port_fdb *fdb)
1115{
Elad Raze4b6f692016-01-10 21:06:27 +01001116 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
Ido Schimmel64771e32015-12-15 16:03:46 +01001117 u16 lag_vid = 0;
Ido Schimmel9de6a802015-12-15 16:03:40 +01001118
Ido Schimmel54a73202015-12-15 16:03:41 +01001119 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
Ido Schimmel64771e32015-12-15 16:03:46 +01001120 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
Ido Schimmel54a73202015-12-15 16:03:41 +01001121 }
1122
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001123 if (!mlxsw_sp_port->lagged)
Jiri Pirko2fa9d452016-01-07 11:50:29 +01001124 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
1125 mlxsw_sp_port->local_port,
Ido Schimmel9de6a802015-12-15 16:03:40 +01001126 fdb->addr, fid,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001127 false, false);
1128 else
1129 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
1130 mlxsw_sp_port->lag_id,
Ido Schimmel64771e32015-12-15 16:03:46 +01001131 fdb->addr, fid, lag_vid,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001132 false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001133}
1134
Elad Raz3a49b4f2016-01-10 21:06:28 +01001135static int mlxsw_sp_port_mdb_del(struct mlxsw_sp_port *mlxsw_sp_port,
1136 const struct switchdev_obj_port_mdb *mdb)
1137{
1138 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1139 struct net_device *dev = mlxsw_sp_port->dev;
1140 struct mlxsw_sp_mid *mid;
1141 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
1142 u16 mid_idx;
1143 int err = 0;
1144
1145 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
1146 if (!mid) {
1147 netdev_err(dev, "Unable to remove port from MC DB\n");
1148 return -EINVAL;
1149 }
1150
1151 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, false, false);
1152 if (err)
1153 netdev_err(dev, "Unable to remove port from SMID\n");
1154
1155 mid_idx = mid->mid;
1156 if (__mlxsw_sp_mc_dec_ref(mlxsw_sp, mid)) {
1157 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid_idx,
1158 false);
1159 if (err)
1160 netdev_err(dev, "Unable to remove MC SFD\n");
1161 }
1162
1163 return err;
1164}
1165
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001166static int mlxsw_sp_port_obj_del(struct net_device *dev,
1167 const struct switchdev_obj *obj)
1168{
1169 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1170 int err = 0;
1171
Ido Schimmel54a73202015-12-15 16:03:41 +01001172 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1173 if (!mlxsw_sp_port)
1174 return -EINVAL;
1175
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001176 switch (obj->id) {
1177 case SWITCHDEV_OBJ_ID_PORT_VLAN:
Ido Schimmel54a73202015-12-15 16:03:41 +01001178 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
1179 return 0;
1180
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001181 err = mlxsw_sp_port_vlans_del(mlxsw_sp_port,
1182 SWITCHDEV_OBJ_PORT_VLAN(obj));
1183 break;
Jiri Pirko61c503f2016-07-04 08:23:11 +02001184 case SWITCHDEV_OBJ_ID_IPV4_FIB:
1185 err = mlxsw_sp_router_fib4_del(mlxsw_sp_port,
1186 SWITCHDEV_OBJ_IPV4_FIB(obj));
1187 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001188 case SWITCHDEV_OBJ_ID_PORT_FDB:
1189 err = mlxsw_sp_port_fdb_static_del(mlxsw_sp_port,
1190 SWITCHDEV_OBJ_PORT_FDB(obj));
1191 break;
Elad Raz3a49b4f2016-01-10 21:06:28 +01001192 case SWITCHDEV_OBJ_ID_PORT_MDB:
1193 err = mlxsw_sp_port_mdb_del(mlxsw_sp_port,
1194 SWITCHDEV_OBJ_PORT_MDB(obj));
Dan Carpenter00ae40e2016-01-13 15:28:23 +03001195 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001196 default:
1197 err = -EOPNOTSUPP;
1198 break;
1199 }
1200
1201 return err;
1202}
1203
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001204static struct mlxsw_sp_port *mlxsw_sp_lag_rep_port(struct mlxsw_sp *mlxsw_sp,
1205 u16 lag_id)
1206{
1207 struct mlxsw_sp_port *mlxsw_sp_port;
1208 int i;
1209
1210 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
1211 mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
1212 if (mlxsw_sp_port)
1213 return mlxsw_sp_port;
1214 }
1215 return NULL;
1216}
1217
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001218static int mlxsw_sp_port_fdb_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1219 struct switchdev_obj_port_fdb *fdb,
Ido Schimmel304f5152016-01-27 15:20:24 +01001220 switchdev_obj_dump_cb_t *cb,
1221 struct net_device *orig_dev)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001222{
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001223 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel3f47f862016-01-27 15:20:25 +01001224 struct mlxsw_sp_port *tmp;
Ido Schimmel56918b62016-06-20 23:04:18 +02001225 struct mlxsw_sp_fid *f;
1226 u16 vport_fid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001227 char *sfd_pl;
1228 char mac[ETH_ALEN];
Ido Schimmel9de6a802015-12-15 16:03:40 +01001229 u16 fid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001230 u8 local_port;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001231 u16 lag_id;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001232 u8 num_rec;
1233 int stored_err = 0;
1234 int i;
1235 int err;
1236
1237 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
1238 if (!sfd_pl)
1239 return -ENOMEM;
1240
Ido Schimmel56918b62016-06-20 23:04:18 +02001241 f = mlxsw_sp_vport_fid_get(mlxsw_sp_port);
1242 vport_fid = f ? f->fid : 0;
Ido Schimmel54a73202015-12-15 16:03:41 +01001243
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001244 mlxsw_reg_sfd_pack(sfd_pl, MLXSW_REG_SFD_OP_QUERY_DUMP, 0);
1245 do {
1246 mlxsw_reg_sfd_num_rec_set(sfd_pl, MLXSW_REG_SFD_REC_MAX_COUNT);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001247 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001248 if (err)
1249 goto out;
1250
1251 num_rec = mlxsw_reg_sfd_num_rec_get(sfd_pl);
1252
1253 /* Even in case of error, we have to run the dump to the end
1254 * so the session in firmware is finished.
1255 */
1256 if (stored_err)
1257 continue;
1258
1259 for (i = 0; i < num_rec; i++) {
1260 switch (mlxsw_reg_sfd_rec_type_get(sfd_pl, i)) {
1261 case MLXSW_REG_SFD_REC_TYPE_UNICAST:
Ido Schimmel9de6a802015-12-15 16:03:40 +01001262 mlxsw_reg_sfd_uc_unpack(sfd_pl, i, mac, &fid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001263 &local_port);
1264 if (local_port == mlxsw_sp_port->local_port) {
Ido Schimmel004f85e2016-01-27 15:20:22 +01001265 if (vport_fid && vport_fid == fid)
1266 fdb->vid = 0;
1267 else if (!vport_fid &&
1268 !mlxsw_sp_fid_is_vfid(fid))
Ido Schimmel54a73202015-12-15 16:03:41 +01001269 fdb->vid = fid;
Ido Schimmel004f85e2016-01-27 15:20:22 +01001270 else
1271 continue;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001272 ether_addr_copy(fdb->addr, mac);
1273 fdb->ndm_state = NUD_REACHABLE;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001274 err = cb(&fdb->obj);
1275 if (err)
1276 stored_err = err;
1277 }
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001278 break;
1279 case MLXSW_REG_SFD_REC_TYPE_UNICAST_LAG:
1280 mlxsw_reg_sfd_uc_lag_unpack(sfd_pl, i,
Ido Schimmel9de6a802015-12-15 16:03:40 +01001281 mac, &fid, &lag_id);
Ido Schimmel3f47f862016-01-27 15:20:25 +01001282 tmp = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1283 if (tmp && tmp->local_port ==
1284 mlxsw_sp_port->local_port) {
Ido Schimmel304f5152016-01-27 15:20:24 +01001285 /* LAG records can only point to LAG
1286 * devices or VLAN devices on top.
1287 */
1288 if (!netif_is_lag_master(orig_dev) &&
1289 !is_vlan_dev(orig_dev))
1290 continue;
Ido Schimmel004f85e2016-01-27 15:20:22 +01001291 if (vport_fid && vport_fid == fid)
1292 fdb->vid = 0;
1293 else if (!vport_fid &&
1294 !mlxsw_sp_fid_is_vfid(fid))
Ido Schimmel54a73202015-12-15 16:03:41 +01001295 fdb->vid = fid;
Ido Schimmel004f85e2016-01-27 15:20:22 +01001296 else
1297 continue;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001298 ether_addr_copy(fdb->addr, mac);
1299 fdb->ndm_state = NUD_REACHABLE;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001300 err = cb(&fdb->obj);
1301 if (err)
1302 stored_err = err;
1303 }
1304 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001305 }
1306 }
1307 } while (num_rec == MLXSW_REG_SFD_REC_MAX_COUNT);
1308
1309out:
1310 kfree(sfd_pl);
1311 return stored_err ? stored_err : err;
1312}
1313
1314static int mlxsw_sp_port_vlan_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1315 struct switchdev_obj_port_vlan *vlan,
1316 switchdev_obj_dump_cb_t *cb)
1317{
1318 u16 vid;
1319 int err = 0;
1320
Ido Schimmel54a73202015-12-15 16:03:41 +01001321 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
1322 vlan->flags = 0;
1323 vlan->vid_begin = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1324 vlan->vid_end = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1325 return cb(&vlan->obj);
1326 }
1327
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001328 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1329 vlan->flags = 0;
1330 if (vid == mlxsw_sp_port->pvid)
1331 vlan->flags |= BRIDGE_VLAN_INFO_PVID;
Elad Razfc1273a2016-01-06 13:01:11 +01001332 if (test_bit(vid, mlxsw_sp_port->untagged_vlans))
1333 vlan->flags |= BRIDGE_VLAN_INFO_UNTAGGED;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001334 vlan->vid_begin = vid;
1335 vlan->vid_end = vid;
1336 err = cb(&vlan->obj);
1337 if (err)
1338 break;
1339 }
1340 return err;
1341}
1342
1343static int mlxsw_sp_port_obj_dump(struct net_device *dev,
1344 struct switchdev_obj *obj,
1345 switchdev_obj_dump_cb_t *cb)
1346{
1347 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1348 int err = 0;
1349
Ido Schimmel54a73202015-12-15 16:03:41 +01001350 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1351 if (!mlxsw_sp_port)
1352 return -EINVAL;
1353
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001354 switch (obj->id) {
1355 case SWITCHDEV_OBJ_ID_PORT_VLAN:
1356 err = mlxsw_sp_port_vlan_dump(mlxsw_sp_port,
1357 SWITCHDEV_OBJ_PORT_VLAN(obj), cb);
1358 break;
1359 case SWITCHDEV_OBJ_ID_PORT_FDB:
1360 err = mlxsw_sp_port_fdb_dump(mlxsw_sp_port,
Ido Schimmel304f5152016-01-27 15:20:24 +01001361 SWITCHDEV_OBJ_PORT_FDB(obj), cb,
1362 obj->orig_dev);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001363 break;
1364 default:
1365 err = -EOPNOTSUPP;
1366 break;
1367 }
1368
1369 return err;
1370}
1371
Jiri Pirkoc7070fc2015-10-28 10:17:05 +01001372static const struct switchdev_ops mlxsw_sp_port_switchdev_ops = {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001373 .switchdev_port_attr_get = mlxsw_sp_port_attr_get,
1374 .switchdev_port_attr_set = mlxsw_sp_port_attr_set,
1375 .switchdev_port_obj_add = mlxsw_sp_port_obj_add,
1376 .switchdev_port_obj_del = mlxsw_sp_port_obj_del,
1377 .switchdev_port_obj_dump = mlxsw_sp_port_obj_dump,
1378};
1379
Ido Schimmel45827d72016-01-27 15:20:21 +01001380static void mlxsw_sp_fdb_call_notifiers(bool learning_sync, bool adding,
1381 char *mac, u16 vid,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001382 struct net_device *dev)
1383{
1384 struct switchdev_notifier_fdb_info info;
1385 unsigned long notifier_type;
1386
Ido Schimmel45827d72016-01-27 15:20:21 +01001387 if (learning_sync) {
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001388 info.addr = mac;
1389 info.vid = vid;
1390 notifier_type = adding ? SWITCHDEV_FDB_ADD : SWITCHDEV_FDB_DEL;
1391 call_switchdev_notifiers(notifier_type, dev, &info.info);
1392 }
1393}
1394
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001395static void mlxsw_sp_fdb_notify_mac_process(struct mlxsw_sp *mlxsw_sp,
1396 char *sfn_pl, int rec_index,
1397 bool adding)
1398{
1399 struct mlxsw_sp_port *mlxsw_sp_port;
1400 char mac[ETH_ALEN];
1401 u8 local_port;
Ido Schimmel9de6a802015-12-15 16:03:40 +01001402 u16 vid, fid;
Jiri Pirko12f15012016-01-07 11:50:30 +01001403 bool do_notification = true;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001404 int err;
1405
Ido Schimmel9de6a802015-12-15 16:03:40 +01001406 mlxsw_reg_sfn_mac_unpack(sfn_pl, rec_index, mac, &fid, &local_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001407 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1408 if (!mlxsw_sp_port) {
1409 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Incorrect local port in FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001410 goto just_remove;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001411 }
1412
Ido Schimmelaac78a42015-12-15 16:03:42 +01001413 if (mlxsw_sp_fid_is_vfid(fid)) {
Ido Schimmelaac78a42015-12-15 16:03:42 +01001414 struct mlxsw_sp_port *mlxsw_sp_vport;
1415
Ido Schimmeld0ec8752016-06-20 23:04:12 +02001416 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_fid(mlxsw_sp_port,
1417 fid);
Ido Schimmelaac78a42015-12-15 16:03:42 +01001418 if (!mlxsw_sp_vport) {
1419 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001420 goto just_remove;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001421 }
Ido Schimmel004f85e2016-01-27 15:20:22 +01001422 vid = 0;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001423 /* Override the physical port with the vPort. */
1424 mlxsw_sp_port = mlxsw_sp_vport;
1425 } else {
1426 vid = fid;
1427 }
1428
Jiri Pirko12f15012016-01-07 11:50:30 +01001429do_fdb_op:
Jiri Pirko2fa9d452016-01-07 11:50:29 +01001430 err = mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid,
Jiri Pirko12f15012016-01-07 11:50:30 +01001431 adding, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001432 if (err) {
1433 if (net_ratelimit())
1434 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1435 return;
1436 }
1437
Jiri Pirko12f15012016-01-07 11:50:30 +01001438 if (!do_notification)
1439 return;
Ido Schimmel45827d72016-01-27 15:20:21 +01001440 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning_sync,
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001441 adding, mac, vid, mlxsw_sp_port->dev);
Jiri Pirko12f15012016-01-07 11:50:30 +01001442 return;
1443
1444just_remove:
1445 adding = false;
1446 do_notification = false;
1447 goto do_fdb_op;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001448}
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001449
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001450static void mlxsw_sp_fdb_notify_mac_lag_process(struct mlxsw_sp *mlxsw_sp,
1451 char *sfn_pl, int rec_index,
1452 bool adding)
1453{
1454 struct mlxsw_sp_port *mlxsw_sp_port;
Ido Schimmele43aca22016-01-27 15:20:23 +01001455 struct net_device *dev;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001456 char mac[ETH_ALEN];
Ido Schimmel64771e32015-12-15 16:03:46 +01001457 u16 lag_vid = 0;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001458 u16 lag_id;
Ido Schimmel9de6a802015-12-15 16:03:40 +01001459 u16 vid, fid;
Jiri Pirko12f15012016-01-07 11:50:30 +01001460 bool do_notification = true;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001461 int err;
1462
Ido Schimmel9de6a802015-12-15 16:03:40 +01001463 mlxsw_reg_sfn_mac_lag_unpack(sfn_pl, rec_index, mac, &fid, &lag_id);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001464 mlxsw_sp_port = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1465 if (!mlxsw_sp_port) {
1466 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Cannot find port representor for LAG\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001467 goto just_remove;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001468 }
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001469
Ido Schimmelaac78a42015-12-15 16:03:42 +01001470 if (mlxsw_sp_fid_is_vfid(fid)) {
Ido Schimmelaac78a42015-12-15 16:03:42 +01001471 struct mlxsw_sp_port *mlxsw_sp_vport;
1472
Ido Schimmeld0ec8752016-06-20 23:04:12 +02001473 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_fid(mlxsw_sp_port,
1474 fid);
Ido Schimmelaac78a42015-12-15 16:03:42 +01001475 if (!mlxsw_sp_vport) {
1476 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
Jiri Pirko12f15012016-01-07 11:50:30 +01001477 goto just_remove;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001478 }
1479
Ido Schimmel004f85e2016-01-27 15:20:22 +01001480 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
Ido Schimmele43aca22016-01-27 15:20:23 +01001481 dev = mlxsw_sp_vport->dev;
Ido Schimmel004f85e2016-01-27 15:20:22 +01001482 vid = 0;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001483 /* Override the physical port with the vPort. */
1484 mlxsw_sp_port = mlxsw_sp_vport;
1485 } else {
Ido Schimmele43aca22016-01-27 15:20:23 +01001486 dev = mlxsw_sp_lag_get(mlxsw_sp, lag_id)->dev;
Ido Schimmelaac78a42015-12-15 16:03:42 +01001487 vid = fid;
1488 }
1489
Jiri Pirko12f15012016-01-07 11:50:30 +01001490do_fdb_op:
Ido Schimmel64771e32015-12-15 16:03:46 +01001491 err = mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp, lag_id, mac, fid, lag_vid,
Jiri Pirko12f15012016-01-07 11:50:30 +01001492 adding, true);
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001493 if (err) {
1494 if (net_ratelimit())
1495 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1496 return;
1497 }
1498
Jiri Pirko12f15012016-01-07 11:50:30 +01001499 if (!do_notification)
1500 return;
Ido Schimmel45827d72016-01-27 15:20:21 +01001501 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning_sync, adding, mac,
Ido Schimmele43aca22016-01-27 15:20:23 +01001502 vid, dev);
Jiri Pirko12f15012016-01-07 11:50:30 +01001503 return;
1504
1505just_remove:
1506 adding = false;
1507 do_notification = false;
1508 goto do_fdb_op;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001509}
1510
1511static void mlxsw_sp_fdb_notify_rec_process(struct mlxsw_sp *mlxsw_sp,
1512 char *sfn_pl, int rec_index)
1513{
1514 switch (mlxsw_reg_sfn_rec_type_get(sfn_pl, rec_index)) {
1515 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC:
1516 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1517 rec_index, true);
1518 break;
1519 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC:
1520 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1521 rec_index, false);
1522 break;
Jiri Pirko8a1ab5d2015-12-03 12:12:29 +01001523 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC_LAG:
1524 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1525 rec_index, true);
1526 break;
1527 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC_LAG:
1528 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1529 rec_index, false);
1530 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001531 }
1532}
1533
1534static void mlxsw_sp_fdb_notify_work_schedule(struct mlxsw_sp *mlxsw_sp)
1535{
Jiri Pirkodd9bdb02016-04-14 18:19:28 +02001536 mlxsw_core_schedule_dw(&mlxsw_sp->fdb_notify.dw,
1537 msecs_to_jiffies(mlxsw_sp->fdb_notify.interval));
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001538}
1539
1540static void mlxsw_sp_fdb_notify_work(struct work_struct *work)
1541{
1542 struct mlxsw_sp *mlxsw_sp;
1543 char *sfn_pl;
1544 u8 num_rec;
1545 int i;
1546 int err;
1547
1548 sfn_pl = kmalloc(MLXSW_REG_SFN_LEN, GFP_KERNEL);
1549 if (!sfn_pl)
1550 return;
1551
1552 mlxsw_sp = container_of(work, struct mlxsw_sp, fdb_notify.dw.work);
1553
Ido Schimmel4f2c6ae2016-01-27 15:16:43 +01001554 rtnl_lock();
Ido Schimmel1803e0f2016-08-24 12:00:23 +02001555 mlxsw_reg_sfn_pack(sfn_pl);
1556 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfn), sfn_pl);
1557 if (err) {
1558 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Failed to get FDB notifications\n");
1559 goto out;
1560 }
1561 num_rec = mlxsw_reg_sfn_num_rec_get(sfn_pl);
1562 for (i = 0; i < num_rec; i++)
1563 mlxsw_sp_fdb_notify_rec_process(mlxsw_sp, sfn_pl, i);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001564
Ido Schimmel1803e0f2016-08-24 12:00:23 +02001565out:
Ido Schimmel4f2c6ae2016-01-27 15:16:43 +01001566 rtnl_unlock();
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001567 kfree(sfn_pl);
1568 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1569}
1570
1571static int mlxsw_sp_fdb_init(struct mlxsw_sp *mlxsw_sp)
1572{
1573 int err;
1574
1575 err = mlxsw_sp_ageing_set(mlxsw_sp, MLXSW_SP_DEFAULT_AGEING_TIME);
1576 if (err) {
1577 dev_err(mlxsw_sp->bus_info->dev, "Failed to set default ageing time\n");
1578 return err;
1579 }
1580 INIT_DELAYED_WORK(&mlxsw_sp->fdb_notify.dw, mlxsw_sp_fdb_notify_work);
1581 mlxsw_sp->fdb_notify.interval = MLXSW_SP_DEFAULT_LEARNING_INTERVAL;
1582 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1583 return 0;
1584}
1585
1586static void mlxsw_sp_fdb_fini(struct mlxsw_sp *mlxsw_sp)
1587{
1588 cancel_delayed_work_sync(&mlxsw_sp->fdb_notify.dw);
1589}
1590
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001591int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp)
1592{
1593 return mlxsw_sp_fdb_init(mlxsw_sp);
1594}
1595
1596void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp)
1597{
1598 mlxsw_sp_fdb_fini(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001599}
1600
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001601void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port)
1602{
1603 mlxsw_sp_port->dev->switchdev_ops = &mlxsw_sp_port_switchdev_ops;
1604}
1605
1606void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port)
1607{
1608}