blob: b415c4ee621dca2160350244f3f7c881cdf5346a [file] [log] [blame]
Archit Tanejae1ef4d22010-09-15 18:47:29 +05301/*
2 * linux/drivers/video/omap2/dss/dss_features.c
3 *
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <linux/kernel.h>
21#include <linux/types.h>
22#include <linux/err.h>
23#include <linux/slab.h>
24
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030025#include <video/omapdss.h>
Archit Tanejae1ef4d22010-09-15 18:47:29 +053026#include <plat/cpu.h>
27
Archit Taneja067a57e2011-03-02 11:57:25 +053028#include "dss.h"
Archit Tanejae1ef4d22010-09-15 18:47:29 +053029#include "dss_features.h"
30
31/* Defines a generic omap register field */
32struct dss_reg_field {
Archit Tanejae1ef4d22010-09-15 18:47:29 +053033 u8 start, end;
34};
35
Taneja, Archit31ef8232011-03-14 23:28:22 -050036struct dss_param_range {
37 int min, max;
38};
39
Archit Tanejae1ef4d22010-09-15 18:47:29 +053040struct omap_dss_features {
41 const struct dss_reg_field *reg_fields;
42 const int num_reg_fields;
43
44 const u32 has_feature;
45
46 const int num_mgrs;
47 const int num_ovls;
48 const enum omap_display_type *supported_displays;
49 const enum omap_color_mode *supported_color_modes;
Taneja, Archit235e7db2011-03-14 23:28:21 -050050 const char * const *clksrc_names;
Taneja, Archit31ef8232011-03-14 23:28:22 -050051 const struct dss_param_range *dss_params;
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +030052
53 const u32 buffer_size_unit;
54 const u32 burst_size_unit;
Archit Tanejae1ef4d22010-09-15 18:47:29 +053055};
56
57/* This struct is assigned to one of the below during initialization */
Tomi Valkeinenea290332011-04-20 10:09:36 +030058static const struct omap_dss_features *omap_current_dss_features;
Archit Tanejae1ef4d22010-09-15 18:47:29 +053059
60static const struct dss_reg_field omap2_dss_reg_fields[] = {
Taneja, Archit49641112011-03-14 23:28:23 -050061 [FEAT_REG_FIRHINC] = { 11, 0 },
62 [FEAT_REG_FIRVINC] = { 27, 16 },
63 [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 },
64 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 },
65 [FEAT_REG_FIFOSIZE] = { 8, 0 },
66 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
67 [FEAT_REG_VERTICALACCU] = { 25, 16 },
68 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
69 [FEAT_REG_DSIPLL_REGN] = { 0, 0 },
70 [FEAT_REG_DSIPLL_REGM] = { 0, 0 },
71 [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 },
72 [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 },
Archit Tanejae1ef4d22010-09-15 18:47:29 +053073};
74
75static const struct dss_reg_field omap3_dss_reg_fields[] = {
Taneja, Archit49641112011-03-14 23:28:23 -050076 [FEAT_REG_FIRHINC] = { 12, 0 },
77 [FEAT_REG_FIRVINC] = { 28, 16 },
78 [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
79 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
80 [FEAT_REG_FIFOSIZE] = { 10, 0 },
81 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
82 [FEAT_REG_VERTICALACCU] = { 25, 16 },
83 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
84 [FEAT_REG_DSIPLL_REGN] = { 7, 1 },
85 [FEAT_REG_DSIPLL_REGM] = { 18, 8 },
86 [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 },
87 [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 },
Archit Taneja87a74842011-03-02 11:19:50 +053088};
89
90static const struct dss_reg_field omap4_dss_reg_fields[] = {
Taneja, Archit49641112011-03-14 23:28:23 -050091 [FEAT_REG_FIRHINC] = { 12, 0 },
92 [FEAT_REG_FIRVINC] = { 28, 16 },
93 [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
94 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
95 [FEAT_REG_FIFOSIZE] = { 15, 0 },
96 [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
97 [FEAT_REG_VERTICALACCU] = { 26, 16 },
98 [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
99 [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
100 [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
101 [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
102 [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530103};
104
105static const enum omap_display_type omap2_dss_supported_displays[] = {
106 /* OMAP_DSS_CHANNEL_LCD */
Tomi Valkeinenf8df01f2011-02-24 14:21:25 +0200107 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530108
109 /* OMAP_DSS_CHANNEL_DIGIT */
110 OMAP_DISPLAY_TYPE_VENC,
111};
112
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200113static const enum omap_display_type omap3430_dss_supported_displays[] = {
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530114 /* OMAP_DSS_CHANNEL_LCD */
115 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
116 OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
117
118 /* OMAP_DSS_CHANNEL_DIGIT */
119 OMAP_DISPLAY_TYPE_VENC,
120};
121
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200122static const enum omap_display_type omap3630_dss_supported_displays[] = {
123 /* OMAP_DSS_CHANNEL_LCD */
124 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
125 OMAP_DISPLAY_TYPE_DSI,
126
127 /* OMAP_DSS_CHANNEL_DIGIT */
128 OMAP_DISPLAY_TYPE_VENC,
129};
130
Archit Tanejad50cd032010-12-02 11:27:08 +0000131static const enum omap_display_type omap4_dss_supported_displays[] = {
132 /* OMAP_DSS_CHANNEL_LCD */
133 OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
134
135 /* OMAP_DSS_CHANNEL_DIGIT */
Mythri P Kb1196012011-03-08 17:15:54 +0530136 OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
Archit Tanejad50cd032010-12-02 11:27:08 +0000137
138 /* OMAP_DSS_CHANNEL_LCD2 */
139 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
140 OMAP_DISPLAY_TYPE_DSI,
141};
142
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530143static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
144 /* OMAP_DSS_GFX */
145 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
146 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
147 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
148 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
149
150 /* OMAP_DSS_VIDEO1 */
151 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
152 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
153 OMAP_DSS_COLOR_UYVY,
154
155 /* OMAP_DSS_VIDEO2 */
156 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
157 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
158 OMAP_DSS_COLOR_UYVY,
159};
160
161static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
162 /* OMAP_DSS_GFX */
163 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
164 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
165 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
166 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
167 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
168 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
169
170 /* OMAP_DSS_VIDEO1 */
171 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
172 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
173 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
174
175 /* OMAP_DSS_VIDEO2 */
176 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
177 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
178 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
179 OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
180 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
181};
182
Amber Jainf20e4222011-05-19 19:47:50 +0530183static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
184 /* OMAP_DSS_GFX */
185 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
186 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
187 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
188 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
189 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
190 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
191 OMAP_DSS_COLOR_ARGB16_1555,
192
193 /* OMAP_DSS_VIDEO1 */
194 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
195 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
196 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
197 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
198 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
199 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
200 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
201 OMAP_DSS_COLOR_RGBX32,
202
203 /* OMAP_DSS_VIDEO2 */
204 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
205 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
206 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
207 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
208 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
209 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
210 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
211 OMAP_DSS_COLOR_RGBX32,
212};
213
Taneja, Archit235e7db2011-03-14 23:28:21 -0500214static const char * const omap2_dss_clk_source_names[] = {
Archit Taneja89a35e52011-04-12 13:52:23 +0530215 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A",
216 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A",
217 [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1",
Archit Taneja067a57e2011-03-02 11:57:25 +0530218};
219
Taneja, Archit235e7db2011-03-14 23:28:21 -0500220static const char * const omap3_dss_clk_source_names[] = {
Archit Taneja89a35e52011-04-12 13:52:23 +0530221 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK",
222 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK",
223 [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK",
Archit Taneja067a57e2011-03-02 11:57:25 +0530224};
225
Taneja, Archit235e7db2011-03-14 23:28:21 -0500226static const char * const omap4_dss_clk_source_names[] = {
Archit Taneja89a35e52011-04-12 13:52:23 +0530227 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
228 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
229 [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK",
Archit Taneja5a8b5722011-05-12 17:26:29 +0530230 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
231 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2",
Taneja, Architea751592011-03-08 05:50:35 -0600232};
233
Taneja, Archit31ef8232011-03-14 23:28:22 -0500234static const struct dss_param_range omap2_dss_param_range[] = {
Taneja, Archit49641112011-03-14 23:28:23 -0500235 [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
236 [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 },
237 [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 },
238 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 },
239 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 },
240 [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 },
241 [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 },
Taneja, Archit31ef8232011-03-14 23:28:22 -0500242};
243
244static const struct dss_param_range omap3_dss_param_range[] = {
Taneja, Archit49641112011-03-14 23:28:23 -0500245 [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
246 [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 },
247 [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 },
248 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 },
249 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 },
250 [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 },
251 [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
Taneja, Archit31ef8232011-03-14 23:28:22 -0500252};
253
254static const struct dss_param_range omap4_dss_param_range[] = {
Taneja, Archit49641112011-03-14 23:28:23 -0500255 [FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
256 [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
257 [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
258 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
259 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
260 [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
261 [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
Taneja, Archit31ef8232011-03-14 23:28:22 -0500262};
263
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530264/* OMAP2 DSS Features */
Tomi Valkeinenea290332011-04-20 10:09:36 +0300265static const struct omap_dss_features omap2_dss_features = {
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530266 .reg_fields = omap2_dss_reg_fields,
267 .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
268
Archit Tanejad50cd032010-12-02 11:27:08 +0000269 .has_feature =
270 FEAT_LCDENABLEPOL | FEAT_LCDENABLESIGNAL |
Archit Taneja87a74842011-03-02 11:19:50 +0530271 FEAT_PCKFREEENABLE | FEAT_FUNCGATED |
272 FEAT_ROWREPEATENABLE | FEAT_RESIZECONF,
Archit Tanejad50cd032010-12-02 11:27:08 +0000273
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530274 .num_mgrs = 2,
275 .num_ovls = 3,
276 .supported_displays = omap2_dss_supported_displays,
277 .supported_color_modes = omap2_dss_supported_color_modes,
Archit Taneja067a57e2011-03-02 11:57:25 +0530278 .clksrc_names = omap2_dss_clk_source_names,
Taneja, Archit31ef8232011-03-14 23:28:22 -0500279 .dss_params = omap2_dss_param_range,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300280 .buffer_size_unit = 1,
281 .burst_size_unit = 8,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530282};
283
284/* OMAP3 DSS Features */
Tomi Valkeinenea290332011-04-20 10:09:36 +0300285static const struct omap_dss_features omap3430_dss_features = {
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530286 .reg_fields = omap3_dss_reg_fields,
287 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
288
Archit Tanejad50cd032010-12-02 11:27:08 +0000289 .has_feature =
290 FEAT_GLOBAL_ALPHA | FEAT_LCDENABLEPOL |
291 FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE |
Archit Taneja87a74842011-03-02 11:19:50 +0530292 FEAT_FUNCGATED | FEAT_ROWREPEATENABLE |
Archit Taneja9613c022011-03-22 06:33:36 -0500293 FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF |
Tomi Valkeinen525dae62011-05-18 11:59:21 +0300294 FEAT_DSI_PLL_FREQSEL | FEAT_DSI_REVERSE_TXCLKESC |
Tomi Valkeinen332e9d72011-05-27 14:22:16 +0300295 FEAT_VENC_REQUIRES_TV_DAC_CLK | FEAT_CPR | FEAT_PRELOAD |
296 FEAT_FIR_COEF_V,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530297
298 .num_mgrs = 2,
299 .num_ovls = 3,
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200300 .supported_displays = omap3430_dss_supported_displays,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530301 .supported_color_modes = omap3_dss_supported_color_modes,
Archit Taneja067a57e2011-03-02 11:57:25 +0530302 .clksrc_names = omap3_dss_clk_source_names,
Taneja, Archit31ef8232011-03-14 23:28:22 -0500303 .dss_params = omap3_dss_param_range,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300304 .buffer_size_unit = 1,
305 .burst_size_unit = 8,
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530306};
307
Tomi Valkeinenea290332011-04-20 10:09:36 +0300308static const struct omap_dss_features omap3630_dss_features = {
Samreen8fbde102010-11-04 12:28:41 +0100309 .reg_fields = omap3_dss_reg_fields,
310 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
311
Archit Tanejad50cd032010-12-02 11:27:08 +0000312 .has_feature =
313 FEAT_GLOBAL_ALPHA | FEAT_LCDENABLEPOL |
314 FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE |
Archit Taneja87a74842011-03-02 11:19:50 +0530315 FEAT_PRE_MULT_ALPHA | FEAT_FUNCGATED |
316 FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT |
Archit Taneja9613c022011-03-22 06:33:36 -0500317 FEAT_RESIZECONF | FEAT_DSI_PLL_PWR_BUG |
Tomi Valkeinen332e9d72011-05-27 14:22:16 +0300318 FEAT_DSI_PLL_FREQSEL | FEAT_CPR | FEAT_PRELOAD |
319 FEAT_FIR_COEF_V,
Samreen8fbde102010-11-04 12:28:41 +0100320
321 .num_mgrs = 2,
322 .num_ovls = 3,
Tomi Valkeinen4e777dd2011-02-24 14:20:31 +0200323 .supported_displays = omap3630_dss_supported_displays,
Samreen8fbde102010-11-04 12:28:41 +0100324 .supported_color_modes = omap3_dss_supported_color_modes,
Archit Taneja067a57e2011-03-02 11:57:25 +0530325 .clksrc_names = omap3_dss_clk_source_names,
Taneja, Archit31ef8232011-03-14 23:28:22 -0500326 .dss_params = omap3_dss_param_range,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300327 .buffer_size_unit = 1,
328 .burst_size_unit = 8,
Samreen8fbde102010-11-04 12:28:41 +0100329};
330
Archit Tanejad50cd032010-12-02 11:27:08 +0000331/* OMAP4 DSS Features */
Ricardo Neri6ff70842011-05-18 22:23:33 -0500332/* For OMAP4430 ES 1.0 revision */
333static const struct omap_dss_features omap4430_es1_0_dss_features = {
334 .reg_fields = omap4_dss_reg_fields,
335 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
336
337 .has_feature =
338 FEAT_GLOBAL_ALPHA | FEAT_PRE_MULT_ALPHA |
339 FEAT_MGR_LCD2 | FEAT_GLOBAL_ALPHA_VID1 |
340 FEAT_CORE_CLK_DIV | FEAT_LCD_CLK_SRC |
341 FEAT_DSI_DCS_CMD_CONFIG_VC | FEAT_DSI_VC_OCP_WIDTH |
Tomi Valkeinen332e9d72011-05-27 14:22:16 +0300342 FEAT_DSI_GNQ | FEAT_HANDLE_UV_SEPARATE | FEAT_ATTR2 |
343 FEAT_CPR | FEAT_PRELOAD | FEAT_FIR_COEF_V,
Ricardo Neri6ff70842011-05-18 22:23:33 -0500344
345 .num_mgrs = 3,
346 .num_ovls = 3,
347 .supported_displays = omap4_dss_supported_displays,
Amber Jainf20e4222011-05-19 19:47:50 +0530348 .supported_color_modes = omap4_dss_supported_color_modes,
Ricardo Neri6ff70842011-05-18 22:23:33 -0500349 .clksrc_names = omap4_dss_clk_source_names,
350 .dss_params = omap4_dss_param_range,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300351 .buffer_size_unit = 16,
352 .burst_size_unit = 16,
Ricardo Neri6ff70842011-05-18 22:23:33 -0500353};
354
355/* For all the other OMAP4 versions */
Tomi Valkeinenea290332011-04-20 10:09:36 +0300356static const struct omap_dss_features omap4_dss_features = {
Archit Taneja87a74842011-03-02 11:19:50 +0530357 .reg_fields = omap4_dss_reg_fields,
358 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
Archit Tanejad50cd032010-12-02 11:27:08 +0000359
360 .has_feature =
361 FEAT_GLOBAL_ALPHA | FEAT_PRE_MULT_ALPHA |
Murthy, Raghuveer5c6366e2011-03-03 09:27:58 -0600362 FEAT_MGR_LCD2 | FEAT_GLOBAL_ALPHA_VID1 |
Archit Taneja9613c022011-03-22 06:33:36 -0500363 FEAT_CORE_CLK_DIV | FEAT_LCD_CLK_SRC |
Archit Taneja75d72472011-05-16 15:17:08 +0530364 FEAT_DSI_DCS_CMD_CONFIG_VC | FEAT_DSI_VC_OCP_WIDTH |
Amber Jainab5ca072011-05-19 19:47:53 +0530365 FEAT_DSI_GNQ | FEAT_HDMI_CTS_SWMODE |
Tomi Valkeinen332e9d72011-05-27 14:22:16 +0300366 FEAT_HANDLE_UV_SEPARATE | FEAT_ATTR2 | FEAT_CPR |
367 FEAT_PRELOAD | FEAT_FIR_COEF_V,
Archit Tanejad50cd032010-12-02 11:27:08 +0000368
369 .num_mgrs = 3,
370 .num_ovls = 3,
371 .supported_displays = omap4_dss_supported_displays,
Amber Jainf20e4222011-05-19 19:47:50 +0530372 .supported_color_modes = omap4_dss_supported_color_modes,
Taneja, Architea751592011-03-08 05:50:35 -0600373 .clksrc_names = omap4_dss_clk_source_names,
Taneja, Archit31ef8232011-03-14 23:28:22 -0500374 .dss_params = omap4_dss_param_range,
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300375 .buffer_size_unit = 16,
376 .burst_size_unit = 16,
Archit Tanejad50cd032010-12-02 11:27:08 +0000377};
378
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530379/* Functions returning values related to a DSS feature */
380int dss_feat_get_num_mgrs(void)
381{
382 return omap_current_dss_features->num_mgrs;
383}
384
385int dss_feat_get_num_ovls(void)
386{
387 return omap_current_dss_features->num_ovls;
388}
389
Taneja, Archit31ef8232011-03-14 23:28:22 -0500390unsigned long dss_feat_get_param_min(enum dss_range_param param)
Archit Taneja819d8072011-03-01 11:54:00 +0530391{
Taneja, Archit31ef8232011-03-14 23:28:22 -0500392 return omap_current_dss_features->dss_params[param].min;
393}
394
395unsigned long dss_feat_get_param_max(enum dss_range_param param)
396{
397 return omap_current_dss_features->dss_params[param].max;
Archit Taneja819d8072011-03-01 11:54:00 +0530398}
399
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530400enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
401{
402 return omap_current_dss_features->supported_displays[channel];
403}
404
405enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
406{
407 return omap_current_dss_features->supported_color_modes[plane];
408}
409
Archit Taneja8dad2ab2010-11-25 17:58:10 +0530410bool dss_feat_color_mode_supported(enum omap_plane plane,
411 enum omap_color_mode color_mode)
412{
413 return omap_current_dss_features->supported_color_modes[plane] &
414 color_mode;
415}
416
Archit Taneja89a35e52011-04-12 13:52:23 +0530417const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
Archit Taneja067a57e2011-03-02 11:57:25 +0530418{
Taneja, Archit235e7db2011-03-14 23:28:21 -0500419 return omap_current_dss_features->clksrc_names[id];
Archit Taneja067a57e2011-03-02 11:57:25 +0530420}
421
Tomi Valkeinen5ed8cf52011-06-21 09:35:36 +0300422u32 dss_feat_get_buffer_size_unit(void)
423{
424 return omap_current_dss_features->buffer_size_unit;
425}
426
427u32 dss_feat_get_burst_size_unit(void)
428{
429 return omap_current_dss_features->burst_size_unit;
430}
431
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530432/* DSS has_feature check */
433bool dss_has_feature(enum dss_feat_id id)
434{
435 return omap_current_dss_features->has_feature & id;
436}
437
438void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
439{
440 if (id >= omap_current_dss_features->num_reg_fields)
441 BUG();
442
443 *start = omap_current_dss_features->reg_fields[id].start;
444 *end = omap_current_dss_features->reg_fields[id].end;
445}
446
447void dss_features_init(void)
448{
449 if (cpu_is_omap24xx())
450 omap_current_dss_features = &omap2_dss_features;
Samreen8fbde102010-11-04 12:28:41 +0100451 else if (cpu_is_omap3630())
452 omap_current_dss_features = &omap3630_dss_features;
453 else if (cpu_is_omap34xx())
454 omap_current_dss_features = &omap3430_dss_features;
Ricardo Neri6ff70842011-05-18 22:23:33 -0500455 else if (omap_rev() == OMAP4430_REV_ES1_0)
456 omap_current_dss_features = &omap4430_es1_0_dss_features;
457 else if (cpu_is_omap44xx())
Archit Tanejad50cd032010-12-02 11:27:08 +0000458 omap_current_dss_features = &omap4_dss_features;
Ricardo Neri6ff70842011-05-18 22:23:33 -0500459 else
460 DSSWARN("Unsupported OMAP version");
Archit Tanejae1ef4d22010-09-15 18:47:29 +0530461}