blob: 763d6a228a138ab461eae6c3a90a2bb01b658941 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
28/* slightly larger than one large A-MPDU */
29#define HTT_RX_RING_SIZE_MIN 128
30
31/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32#define HTT_RX_RING_SIZE_MAX 2048
33
34#define HTT_RX_AVG_FRM_BYTES 1000
35
36/* ms, very conservative */
37#define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39/* ms, conservative */
40#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42/* when under memory pressure rx ring refill may fail and needs a retry */
43#define HTT_RX_RING_REFILL_RETRY_MS 50
44
Michal Kaziorf6dc2092013-09-26 10:12:22 +030045
46static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020047static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030048
Kalle Valo5e3dd152013-06-12 20:52:10 +030049static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
50{
51 int size;
52
53 /*
54 * It is expected that the host CPU will typically be able to
55 * service the rx indication from one A-MPDU before the rx
56 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
57 * later. However, the rx ring should be sized very conservatively,
58 * to accomodate the worst reasonable delay before the host CPU
59 * services a rx indication interrupt.
60 *
61 * The rx ring need not be kept full of empty buffers. In theory,
62 * the htt host SW can dynamically track the low-water mark in the
63 * rx ring, and dynamically adjust the level to which the rx ring
64 * is filled with empty buffers, to dynamically meet the desired
65 * low-water mark.
66 *
67 * In contrast, it's difficult to resize the rx ring itself, once
68 * it's in use. Thus, the ring itself should be sized very
69 * conservatively, while the degree to which the ring is filled
70 * with empty buffers should be sized moderately conservatively.
71 */
72
73 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
74 size =
75 htt->max_throughput_mbps +
76 1000 /
77 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
78
79 if (size < HTT_RX_RING_SIZE_MIN)
80 size = HTT_RX_RING_SIZE_MIN;
81
82 if (size > HTT_RX_RING_SIZE_MAX)
83 size = HTT_RX_RING_SIZE_MAX;
84
85 size = roundup_pow_of_two(size);
86
87 return size;
88}
89
90static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
91{
92 int size;
93
94 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
95 size =
96 htt->max_throughput_mbps *
97 1000 /
98 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
99
100 /*
101 * Make sure the fill level is at least 1 less than the ring size.
102 * Leaving 1 element empty allows the SW to easily distinguish
103 * between a full ring vs. an empty ring.
104 */
105 if (size >= htt->rx_ring.size)
106 size = htt->rx_ring.size - 1;
107
108 return size;
109}
110
111static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
112{
113 struct sk_buff *skb;
114 struct ath10k_skb_cb *cb;
115 int i;
116
117 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
118 skb = htt->rx_ring.netbufs_ring[i];
119 cb = ATH10K_SKB_CB(skb);
120 dma_unmap_single(htt->ar->dev, cb->paddr,
121 skb->len + skb_tailroom(skb),
122 DMA_FROM_DEVICE);
123 dev_kfree_skb_any(skb);
124 }
125
126 htt->rx_ring.fill_cnt = 0;
127}
128
129static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
130{
131 struct htt_rx_desc *rx_desc;
132 struct sk_buff *skb;
133 dma_addr_t paddr;
134 int ret = 0, idx;
135
136 idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
137 while (num > 0) {
138 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
139 if (!skb) {
140 ret = -ENOMEM;
141 goto fail;
142 }
143
144 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
145 skb_pull(skb,
146 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
147 skb->data);
148
149 /* Clear rx_desc attention word before posting to Rx ring */
150 rx_desc = (struct htt_rx_desc *)skb->data;
151 rx_desc->attention.flags = __cpu_to_le32(0);
152
153 paddr = dma_map_single(htt->ar->dev, skb->data,
154 skb->len + skb_tailroom(skb),
155 DMA_FROM_DEVICE);
156
157 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
158 dev_kfree_skb_any(skb);
159 ret = -ENOMEM;
160 goto fail;
161 }
162
163 ATH10K_SKB_CB(skb)->paddr = paddr;
164 htt->rx_ring.netbufs_ring[idx] = skb;
165 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
166 htt->rx_ring.fill_cnt++;
167
168 num--;
169 idx++;
170 idx &= htt->rx_ring.size_mask;
171 }
172
173fail:
174 *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
175 return ret;
176}
177
178static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
179{
180 lockdep_assert_held(&htt->rx_ring.lock);
181 return __ath10k_htt_rx_ring_fill_n(htt, num);
182}
183
184static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
185{
Michal Kazior6e712d42013-09-24 10:18:36 +0200186 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300187
Michal Kazior6e712d42013-09-24 10:18:36 +0200188 /* Refilling the whole RX ring buffer proves to be a bad idea. The
189 * reason is RX may take up significant amount of CPU cycles and starve
190 * other tasks, e.g. TX on an ethernet device while acting as a bridge
191 * with ath10k wlan interface. This ended up with very poor performance
192 * once CPU the host system was overwhelmed with RX on ath10k.
193 *
194 * By limiting the number of refills the replenishing occurs
195 * progressively. This in turns makes use of the fact tasklets are
196 * processed in FIFO order. This means actual RX processing can starve
197 * out refilling. If there's not enough buffers on RX ring FW will not
198 * report RX until it is refilled with enough buffers. This
199 * automatically balances load wrt to CPU power.
200 *
201 * This probably comes at a cost of lower maximum throughput but
202 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300203 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200204 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
205 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
206 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300207 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
208 if (ret == -ENOMEM) {
209 /*
210 * Failed to fill it to the desired level -
211 * we'll start a timer and try again next time.
212 * As long as enough buffers are left in the ring for
213 * another A-MPDU rx, no special recovery is needed.
214 */
215 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
216 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200217 } else if (num_deficit > 0) {
218 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300219 }
220 spin_unlock_bh(&htt->rx_ring.lock);
221}
222
223static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
224{
225 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
226 ath10k_htt_rx_msdu_buff_replenish(htt);
227}
228
Michal Kazior3e841fd2014-05-14 16:23:31 +0300229static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
230{
231 struct sk_buff *skb;
232 int i;
233
234 for (i = 0; i < htt->rx_ring.size; i++) {
235 skb = htt->rx_ring.netbufs_ring[i];
236 if (!skb)
237 continue;
238
239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
240 skb->len + skb_tailroom(skb),
241 DMA_FROM_DEVICE);
242 dev_kfree_skb_any(skb);
243 htt->rx_ring.netbufs_ring[i] = NULL;
244 }
245}
246
Michal Kazior95bf21f2014-05-16 17:15:39 +0300247void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200250 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200251 tasklet_kill(&htt->txrx_compl_task);
252
253 skb_queue_purge(&htt->tx_compl_q);
254 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255
Michal Kazior3e841fd2014-05-14 16:23:31 +0300256 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
258 dma_free_coherent(htt->ar->dev,
259 (htt->rx_ring.size *
260 sizeof(htt->rx_ring.paddrs_ring)),
261 htt->rx_ring.paddrs_ring,
262 htt->rx_ring.base_paddr);
263
264 dma_free_coherent(htt->ar->dev,
265 sizeof(*htt->rx_ring.alloc_idx.vaddr),
266 htt->rx_ring.alloc_idx.vaddr,
267 htt->rx_ring.alloc_idx.paddr);
268
269 kfree(htt->rx_ring.netbufs_ring);
270}
271
272static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
273{
274 int idx;
275 struct sk_buff *msdu;
276
Michal Kazior45967082014-02-27 18:50:05 +0200277 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300278
Michal Kazior8d60ee82014-02-27 18:50:05 +0200279 if (htt->rx_ring.fill_cnt == 0) {
280 ath10k_warn("tried to pop sk_buff from an empty rx ring\n");
281 return NULL;
282 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300283
284 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
285 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300286 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300287
288 idx++;
289 idx &= htt->rx_ring.size_mask;
290 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
291 htt->rx_ring.fill_cnt--;
292
Kalle Valo5e3dd152013-06-12 20:52:10 +0300293 return msdu;
294}
295
296static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
297{
298 struct sk_buff *next;
299
300 while (skb) {
301 next = skb->next;
302 dev_kfree_skb_any(skb);
303 skb = next;
304 }
305}
306
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100307/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300308static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
309 u8 **fw_desc, int *fw_desc_len,
310 struct sk_buff **head_msdu,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300311 struct sk_buff **tail_msdu,
312 u32 *attention)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300313{
314 int msdu_len, msdu_chaining = 0;
315 struct sk_buff *msdu;
316 struct htt_rx_desc *rx_desc;
317
Michal Kazior45967082014-02-27 18:50:05 +0200318 lockdep_assert_held(&htt->rx_ring.lock);
319
Kalle Valo5e3dd152013-06-12 20:52:10 +0300320 if (htt->rx_confused) {
321 ath10k_warn("htt is confused. refusing rx\n");
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100322 return -1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300323 }
324
325 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
326 while (msdu) {
327 int last_msdu, msdu_len_invalid, msdu_chained;
328
329 dma_unmap_single(htt->ar->dev,
330 ATH10K_SKB_CB(msdu)->paddr,
331 msdu->len + skb_tailroom(msdu),
332 DMA_FROM_DEVICE);
333
Ben Greear75fb2f92014-02-05 13:58:34 -0800334 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300335 msdu->data, msdu->len + skb_tailroom(msdu));
336
337 rx_desc = (struct htt_rx_desc *)msdu->data;
338
339 /* FIXME: we must report msdu payload since this is what caller
340 * expects now */
341 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
342 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
343
344 /*
345 * Sanity check - confirm the HW is finished filling in the
346 * rx data.
347 * If the HW and SW are working correctly, then it's guaranteed
348 * that the HW's MAC DMA is done before this point in the SW.
349 * To prevent the case that we handle a stale Rx descriptor,
350 * just assert for now until we have a way to recover.
351 */
352 if (!(__le32_to_cpu(rx_desc->attention.flags)
353 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
354 ath10k_htt_rx_free_msdu_chain(*head_msdu);
355 *head_msdu = NULL;
356 msdu = NULL;
357 ath10k_err("htt rx stopped. cannot recover\n");
358 htt->rx_confused = true;
359 break;
360 }
361
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300362 *attention |= __le32_to_cpu(rx_desc->attention.flags) &
363 (RX_ATTENTION_FLAGS_TKIP_MIC_ERR |
364 RX_ATTENTION_FLAGS_DECRYPT_ERR |
365 RX_ATTENTION_FLAGS_FCS_ERR |
366 RX_ATTENTION_FLAGS_MGMT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300367 /*
368 * Copy the FW rx descriptor for this MSDU from the rx
369 * indication message into the MSDU's netbuf. HL uses the
370 * same rx indication message definition as LL, and simply
371 * appends new info (fields from the HW rx desc, and the
372 * MSDU payload itself). So, the offset into the rx
373 * indication message only has to account for the standard
374 * offset of the per-MSDU FW rx desc info within the
375 * message, and how many bytes of the per-MSDU FW rx desc
376 * info have already been consumed. (And the endianness of
377 * the host, since for a big-endian host, the rx ind
378 * message contents, including the per-MSDU rx desc bytes,
379 * were byteswapped during upload.)
380 */
381 if (*fw_desc_len > 0) {
382 rx_desc->fw_desc.info0 = **fw_desc;
383 /*
384 * The target is expected to only provide the basic
385 * per-MSDU rx descriptors. Just to be sure, verify
386 * that the target has not attached extension data
387 * (e.g. LRO flow ID).
388 */
389
390 /* or more, if there's extension data */
391 (*fw_desc)++;
392 (*fw_desc_len)--;
393 } else {
394 /*
395 * When an oversized AMSDU happened, FW will lost
396 * some of MSDU status - in this case, the FW
397 * descriptors provided will be less than the
398 * actual MSDUs inside this MPDU. Mark the FW
399 * descriptors so that it will still deliver to
400 * upper stack, if no CRC error for this MPDU.
401 *
402 * FIX THIS - the FW descriptors are actually for
403 * MSDUs in the end of this A-MSDU instead of the
404 * beginning.
405 */
406 rx_desc->fw_desc.info0 = 0;
407 }
408
409 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
410 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
411 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
412 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
413 RX_MSDU_START_INFO0_MSDU_LENGTH);
414 msdu_chained = rx_desc->frag_info.ring2_more_count;
415
416 if (msdu_len_invalid)
417 msdu_len = 0;
418
419 skb_trim(msdu, 0);
420 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
421 msdu_len -= msdu->len;
422
423 /* FIXME: Do chained buffers include htt_rx_desc or not? */
424 while (msdu_chained--) {
425 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
426
427 dma_unmap_single(htt->ar->dev,
428 ATH10K_SKB_CB(next)->paddr,
429 next->len + skb_tailroom(next),
430 DMA_FROM_DEVICE);
431
Ben Greear75fb2f92014-02-05 13:58:34 -0800432 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
433 "htt rx chained: ", next->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300434 next->len + skb_tailroom(next));
435
436 skb_trim(next, 0);
437 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
438 msdu_len -= next->len;
439
440 msdu->next = next;
441 msdu = next;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300442 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300443 }
444
Kalle Valo5e3dd152013-06-12 20:52:10 +0300445 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
446 RX_MSDU_END_INFO0_LAST_MSDU;
447
448 if (last_msdu) {
449 msdu->next = NULL;
450 break;
451 } else {
452 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
453 msdu->next = next;
454 msdu = next;
455 }
456 }
457 *tail_msdu = msdu;
458
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100459 if (*head_msdu == NULL)
460 msdu_chaining = -1;
461
Kalle Valo5e3dd152013-06-12 20:52:10 +0300462 /*
463 * Don't refill the ring yet.
464 *
465 * First, the elements popped here are still in use - it is not
466 * safe to overwrite them until the matching call to
467 * mpdu_desc_list_next. Second, for efficiency it is preferable to
468 * refill the rx ring with 1 PPDU's worth of rx buffers (something
469 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
470 * (something like 3 buffers). Consequently, we'll rely on the txrx
471 * SW to tell us when it is done pulling all the PPDU's rx buffers
472 * out of the rx ring, and then refill it just once.
473 */
474
475 return msdu_chaining;
476}
477
Michal Kazior6e712d42013-09-24 10:18:36 +0200478static void ath10k_htt_rx_replenish_task(unsigned long ptr)
479{
480 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
481 ath10k_htt_rx_msdu_buff_replenish(htt);
482}
483
Michal Kazior95bf21f2014-05-16 17:15:39 +0300484int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300485{
486 dma_addr_t paddr;
487 void *vaddr;
488 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
489
490 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
491 if (!is_power_of_2(htt->rx_ring.size)) {
492 ath10k_warn("htt rx ring size is not power of 2\n");
493 return -EINVAL;
494 }
495
496 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
497
498 /*
499 * Set the initial value for the level to which the rx ring
500 * should be filled, based on the max throughput and the
501 * worst likely latency for the host to fill the rx ring
502 * with new buffers. In theory, this fill level can be
503 * dynamically adjusted from the initial value set here, to
504 * reflect the actual host latency rather than a
505 * conservative assumption about the host latency.
506 */
507 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
508
509 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300510 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300511 GFP_KERNEL);
512 if (!htt->rx_ring.netbufs_ring)
513 goto err_netbuf;
514
515 vaddr = dma_alloc_coherent(htt->ar->dev,
516 (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
517 &paddr, GFP_DMA);
518 if (!vaddr)
519 goto err_dma_ring;
520
521 htt->rx_ring.paddrs_ring = vaddr;
522 htt->rx_ring.base_paddr = paddr;
523
524 vaddr = dma_alloc_coherent(htt->ar->dev,
525 sizeof(*htt->rx_ring.alloc_idx.vaddr),
526 &paddr, GFP_DMA);
527 if (!vaddr)
528 goto err_dma_idx;
529
530 htt->rx_ring.alloc_idx.vaddr = vaddr;
531 htt->rx_ring.alloc_idx.paddr = paddr;
532 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
533 *htt->rx_ring.alloc_idx.vaddr = 0;
534
535 /* Initialize the Rx refill retry timer */
536 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
537
538 spin_lock_init(&htt->rx_ring.lock);
539
540 htt->rx_ring.fill_cnt = 0;
541 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
542 goto err_fill_ring;
543
Michal Kazior6e712d42013-09-24 10:18:36 +0200544 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
545 (unsigned long)htt);
546
Michal Kazior6c5151a2014-02-27 18:50:04 +0200547 skb_queue_head_init(&htt->tx_compl_q);
548 skb_queue_head_init(&htt->rx_compl_q);
549
550 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
551 (unsigned long)htt);
552
Kalle Valoaad0b652013-09-08 17:56:02 +0300553 ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300554 htt->rx_ring.size, htt->rx_ring.fill_level);
555 return 0;
556
557err_fill_ring:
558 ath10k_htt_rx_ring_free(htt);
559 dma_free_coherent(htt->ar->dev,
560 sizeof(*htt->rx_ring.alloc_idx.vaddr),
561 htt->rx_ring.alloc_idx.vaddr,
562 htt->rx_ring.alloc_idx.paddr);
563err_dma_idx:
564 dma_free_coherent(htt->ar->dev,
565 (htt->rx_ring.size *
566 sizeof(htt->rx_ring.paddrs_ring)),
567 htt->rx_ring.paddrs_ring,
568 htt->rx_ring.base_paddr);
569err_dma_ring:
570 kfree(htt->rx_ring.netbufs_ring);
571err_netbuf:
572 return -ENOMEM;
573}
574
575static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
576{
577 switch (type) {
578 case HTT_RX_MPDU_ENCRYPT_WEP40:
579 case HTT_RX_MPDU_ENCRYPT_WEP104:
580 return 4;
581 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
582 case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
583 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
584 case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
585 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
586 return 8;
587 case HTT_RX_MPDU_ENCRYPT_NONE:
588 return 0;
589 }
590
591 ath10k_warn("unknown encryption type %d\n", type);
592 return 0;
593}
594
595static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
596{
597 switch (type) {
598 case HTT_RX_MPDU_ENCRYPT_NONE:
599 case HTT_RX_MPDU_ENCRYPT_WEP40:
600 case HTT_RX_MPDU_ENCRYPT_WEP104:
601 case HTT_RX_MPDU_ENCRYPT_WEP128:
602 case HTT_RX_MPDU_ENCRYPT_WAPI:
603 return 0;
604 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
605 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
606 return 4;
607 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
608 return 8;
609 }
610
611 ath10k_warn("unknown encryption type %d\n", type);
612 return 0;
613}
614
615/* Applies for first msdu in chain, before altering it. */
616static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
617{
618 struct htt_rx_desc *rxd;
619 enum rx_msdu_decap_format fmt;
620
621 rxd = (void *)skb->data - sizeof(*rxd);
622 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
623 RX_MSDU_START_INFO1_DECAP_FORMAT);
624
625 if (fmt == RX_MSDU_DECAP_RAW)
626 return (void *)skb->data;
627 else
628 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
629}
630
631/* This function only applies for first msdu in an msdu chain */
632static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
633{
634 if (ieee80211_is_data_qos(hdr->frame_control)) {
635 u8 *qc = ieee80211_get_qos_ctl(hdr);
636 if (qc[0] & 0x80)
637 return true;
638 }
639 return false;
640}
641
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300642struct rfc1042_hdr {
643 u8 llc_dsap;
644 u8 llc_ssap;
645 u8 llc_ctrl;
646 u8 snap_oui[3];
647 __be16 snap_type;
648} __packed;
649
650struct amsdu_subframe_hdr {
651 u8 dst[ETH_ALEN];
652 u8 src[ETH_ALEN];
653 __be16 len;
654} __packed;
655
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100656static const u8 rx_legacy_rate_idx[] = {
657 3, /* 0x00 - 11Mbps */
658 2, /* 0x01 - 5.5Mbps */
659 1, /* 0x02 - 2Mbps */
660 0, /* 0x03 - 1Mbps */
661 3, /* 0x04 - 11Mbps */
662 2, /* 0x05 - 5.5Mbps */
663 1, /* 0x06 - 2Mbps */
664 0, /* 0x07 - 1Mbps */
665 10, /* 0x08 - 48Mbps */
666 8, /* 0x09 - 24Mbps */
667 6, /* 0x0A - 12Mbps */
668 4, /* 0x0B - 6Mbps */
669 11, /* 0x0C - 54Mbps */
670 9, /* 0x0D - 36Mbps */
671 7, /* 0x0E - 18Mbps */
672 5, /* 0x0F - 9Mbps */
673};
674
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100675static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100676 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100677 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100678 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100679{
680 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100681 u8 preamble = 0;
682
683 /* Check if valid fields */
684 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
685 return;
686
687 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
688
689 switch (preamble) {
690 case HTT_RX_LEGACY:
691 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
692 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
693 rate_idx = 0;
694
695 if (rate < 0x08 || rate > 0x0F)
696 break;
697
698 switch (band) {
699 case IEEE80211_BAND_2GHZ:
700 if (cck)
701 rate &= ~BIT(3);
702 rate_idx = rx_legacy_rate_idx[rate];
703 break;
704 case IEEE80211_BAND_5GHZ:
705 rate_idx = rx_legacy_rate_idx[rate];
706 /* We are using same rate table registering
707 HW - ath10k_rates[]. In case of 5GHz skip
708 CCK rates, so -4 here */
709 rate_idx -= 4;
710 break;
711 default:
712 break;
713 }
714
715 status->rate_idx = rate_idx;
716 break;
717 case HTT_RX_HT:
718 case HTT_RX_HT_WITH_TXBF:
719 /* HT-SIG - Table 20-11 in info1 and info2 */
720 mcs = info1 & 0x1F;
721 nss = mcs >> 3;
722 bw = (info1 >> 7) & 1;
723 sgi = (info2 >> 7) & 1;
724
725 status->rate_idx = mcs;
726 status->flag |= RX_FLAG_HT;
727 if (sgi)
728 status->flag |= RX_FLAG_SHORT_GI;
729 if (bw)
730 status->flag |= RX_FLAG_40MHZ;
731 break;
732 case HTT_RX_VHT:
733 case HTT_RX_VHT_WITH_TXBF:
734 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
735 TODO check this */
736 mcs = (info2 >> 4) & 0x0F;
737 nss = ((info1 >> 10) & 0x07) + 1;
738 bw = info1 & 3;
739 sgi = info2 & 1;
740
741 status->rate_idx = mcs;
742 status->vht_nss = nss;
743
744 if (sgi)
745 status->flag |= RX_FLAG_SHORT_GI;
746
747 switch (bw) {
748 /* 20MHZ */
749 case 0:
750 break;
751 /* 40MHZ */
752 case 1:
753 status->flag |= RX_FLAG_40MHZ;
754 break;
755 /* 80MHZ */
756 case 2:
757 status->vht_flag |= RX_VHT_FLAG_80MHZ;
758 }
759
760 status->flag |= RX_FLAG_VHT;
761 break;
762 default:
763 break;
764 }
765}
766
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100767static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100768 struct ieee80211_rx_status *rx_status,
769 struct sk_buff *skb,
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300770 enum htt_rx_mpdu_encrypt_type enctype,
771 enum rx_msdu_decap_format fmt,
772 bool dot11frag)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100773{
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100774 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100775
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300776 rx_status->flag &= ~(RX_FLAG_DECRYPTED |
777 RX_FLAG_IV_STRIPPED |
778 RX_FLAG_MMIC_STRIPPED);
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100779
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300780 if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100781 return;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300782
783 /*
784 * There's no explicit rx descriptor flag to indicate whether a given
785 * frame has been decrypted or not. We're forced to use the decap
786 * format as an implicit indication. However fragmentation rx is always
787 * raw and it probably never reports undecrypted raws.
788 *
789 * This makes sure sniffed frames are reported as-is without stripping
790 * the protected flag.
791 */
792 if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
793 return;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100794
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100795 rx_status->flag |= RX_FLAG_DECRYPTED |
796 RX_FLAG_IV_STRIPPED |
797 RX_FLAG_MMIC_STRIPPED;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100798 hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
799 ~IEEE80211_FCTL_PROTECTED);
800}
801
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100802static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
803 struct ieee80211_rx_status *status)
804{
805 struct ieee80211_channel *ch;
806
807 spin_lock_bh(&ar->data_lock);
808 ch = ar->scan_channel;
809 if (!ch)
810 ch = ar->rx_channel;
811 spin_unlock_bh(&ar->data_lock);
812
813 if (!ch)
814 return false;
815
816 status->band = ch->band;
817 status->freq = ch->center_freq;
818
819 return true;
820}
821
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300822static const char * const tid_to_ac[] = {
823 "BE",
824 "BK",
825 "BK",
826 "BE",
827 "VI",
828 "VI",
829 "VO",
830 "VO",
831};
832
833static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
834{
835 u8 *qc;
836 int tid;
837
838 if (!ieee80211_is_data_qos(hdr->frame_control))
839 return "";
840
841 qc = ieee80211_get_qos_ctl(hdr);
842 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
843 if (tid < 8)
844 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
845 else
846 snprintf(out, size, "tid %d", tid);
847
848 return out;
849}
850
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100851static void ath10k_process_rx(struct ath10k *ar,
852 struct ieee80211_rx_status *rx_status,
853 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100854{
855 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300856 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
857 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100858
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100859 status = IEEE80211_SKB_RXCB(skb);
860 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100861
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100862 ath10k_dbg(ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300863 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100864 skb,
865 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300866 ieee80211_get_SA(hdr),
867 ath10k_get_tid(hdr, tid, sizeof(tid)),
868 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
869 "mcast" : "ucast",
870 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100871 status->flag == 0 ? "legacy" : "",
872 status->flag & RX_FLAG_HT ? "ht" : "",
873 status->flag & RX_FLAG_VHT ? "vht" : "",
874 status->flag & RX_FLAG_40MHZ ? "40" : "",
875 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
876 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
877 status->rate_idx,
878 status->vht_nss,
879 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100880 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100881 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300882 !!(status->flag & RX_FLAG_MMIC_ERROR),
883 !!(status->flag & RX_FLAG_AMSDU_MORE));
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100884 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100885 skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100886
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100887 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100888}
889
Michal Kaziord960c362014-02-25 09:29:57 +0200890static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
891{
892 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
893 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
894}
895
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300896static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100897 struct ieee80211_rx_status *rx_status,
898 struct sk_buff *skb_in)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300899{
900 struct htt_rx_desc *rxd;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100901 struct sk_buff *skb = skb_in;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300902 struct sk_buff *first;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300903 enum rx_msdu_decap_format fmt;
904 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300905 struct ieee80211_hdr *hdr;
Michal Kazior72bdeb82014-07-28 23:59:42 +0300906 u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300907 unsigned int hdr_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300908
909 rxd = (void *)skb->data - sizeof(*rxd);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300910 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
911 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
912
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300913 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
914 hdr_len = ieee80211_hdrlen(hdr->frame_control);
915 memcpy(hdr_buf, hdr, hdr_len);
916 hdr = (struct ieee80211_hdr *)hdr_buf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300917
Kalle Valo5e3dd152013-06-12 20:52:10 +0300918 first = skb;
919 while (skb) {
920 void *decap_hdr;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300921 int len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300922
923 rxd = (void *)skb->data - sizeof(*rxd);
924 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300925 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300926 decap_hdr = (void *)rxd->rx_hdr_status;
927
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300928 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
929
930 /* First frame in an A-MSDU chain has more decapped data. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300931 if (skb == first) {
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300932 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
933 len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
934 4);
935 decap_hdr += len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300936 }
937
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300938 switch (fmt) {
939 case RX_MSDU_DECAP_RAW:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300940 /* remove trailing FCS */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300941 skb_trim(skb, skb->len - FCS_LEN);
942 break;
943 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior72bdeb82014-07-28 23:59:42 +0300944 /* pull decapped header and copy SA & DA */
Michal Kazior784f69d2013-09-26 10:12:23 +0300945 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200946 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior72bdeb82014-07-28 23:59:42 +0300947 memcpy(da, ieee80211_get_DA(hdr), ETH_ALEN);
948 memcpy(sa, ieee80211_get_SA(hdr), ETH_ALEN);
Michal Kazior784f69d2013-09-26 10:12:23 +0300949 skb_pull(skb, hdr_len);
950
951 /* push original 802.11 header */
952 hdr = (struct ieee80211_hdr *)hdr_buf;
953 hdr_len = ieee80211_hdrlen(hdr->frame_control);
954 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
955
956 /* original A-MSDU header has the bit set but we're
957 * not including A-MSDU subframe header */
958 hdr = (struct ieee80211_hdr *)skb->data;
959 qos = ieee80211_get_qos_ctl(hdr);
960 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
961
Michal Kazior72bdeb82014-07-28 23:59:42 +0300962 /* original 802.11 header has a different DA and in
963 * case of 4addr it may also have different SA
964 */
965 memcpy(ieee80211_get_DA(hdr), da, ETH_ALEN);
966 memcpy(ieee80211_get_SA(hdr), sa, ETH_ALEN);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300967 break;
968 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300969 /* strip ethernet header and insert decapped 802.11
970 * header, amsdu subframe header and rfc1042 header */
971
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300972 len = 0;
973 len += sizeof(struct rfc1042_hdr);
974 len += sizeof(struct amsdu_subframe_hdr);
Michal Kaziordfa95b52013-08-13 07:59:37 +0200975
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300976 skb_pull(skb, sizeof(struct ethhdr));
977 memcpy(skb_push(skb, len), decap_hdr, len);
978 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
979 break;
980 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300981 /* insert decapped 802.11 header making a singly
982 * A-MSDU */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300983 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
984 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300985 }
986
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100987 skb_in = skb;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300988 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
989 false);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300990 skb = skb->next;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100991 skb_in->next = NULL;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300992
Kalle Valo652de352013-11-13 15:23:30 +0200993 if (skb)
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100994 rx_status->flag |= RX_FLAG_AMSDU_MORE;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100995 else
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100996 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
Kalle Valo652de352013-11-13 15:23:30 +0200997
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100998 ath10k_process_rx(htt->ar, rx_status, skb_in);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300999 }
1000
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001001 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
1002 * monitor interface active for sniffing purposes. */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001003}
1004
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001005static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
1006 struct ieee80211_rx_status *rx_status,
1007 struct sk_buff *skb)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001008{
Kalle Valo5e3dd152013-06-12 20:52:10 +03001009 struct htt_rx_desc *rxd;
1010 struct ieee80211_hdr *hdr;
1011 enum rx_msdu_decap_format fmt;
1012 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001013 int hdr_len;
1014 void *rfc1042;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001015
1016 /* This shouldn't happen. If it does than it may be a FW bug. */
1017 if (skb->next) {
Ben Greear75fb2f92014-02-05 13:58:34 -08001018 ath10k_warn("htt rx received chained non A-MSDU frame\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001019 ath10k_htt_rx_free_msdu_chain(skb->next);
1020 skb->next = NULL;
1021 }
1022
1023 rxd = (void *)skb->data - sizeof(*rxd);
1024 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1025 RX_MSDU_START_INFO1_DECAP_FORMAT);
1026 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1027 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001028 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1029 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001030
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001031 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
1032
Kalle Valo5e3dd152013-06-12 20:52:10 +03001033 switch (fmt) {
1034 case RX_MSDU_DECAP_RAW:
1035 /* remove trailing FCS */
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001036 skb_trim(skb, skb->len - FCS_LEN);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001037 break;
1038 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +03001039 /* Pull decapped header */
1040 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +02001041 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +03001042 skb_pull(skb, hdr_len);
1043
1044 /* Push original header */
1045 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1046 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1047 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001048 break;
1049 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001050 /* strip ethernet header and insert decapped 802.11 header and
1051 * rfc1042 header */
1052
1053 rfc1042 = hdr;
1054 rfc1042 += roundup(hdr_len, 4);
1055 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
1056
1057 skb_pull(skb, sizeof(struct ethhdr));
1058 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
1059 rfc1042, sizeof(struct rfc1042_hdr));
1060 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001061 break;
1062 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001063 /* remove A-MSDU subframe header and insert
1064 * decapped 802.11 header. rfc1042 header is already there */
1065
1066 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
1067 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001068 break;
1069 }
1070
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001071 ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001072
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001073 ath10k_process_rx(htt->ar, rx_status, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001074}
1075
Michal Kazior605f81a2013-07-31 10:47:56 +02001076static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1077{
1078 struct htt_rx_desc *rxd;
1079 u32 flags, info;
1080 bool is_ip4, is_ip6;
1081 bool is_tcp, is_udp;
1082 bool ip_csum_ok, tcpudp_csum_ok;
1083
1084 rxd = (void *)skb->data - sizeof(*rxd);
1085 flags = __le32_to_cpu(rxd->attention.flags);
1086 info = __le32_to_cpu(rxd->msdu_start.info1);
1087
1088 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1089 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1090 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1091 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1092 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1093 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1094
1095 if (!is_ip4 && !is_ip6)
1096 return CHECKSUM_NONE;
1097 if (!is_tcp && !is_udp)
1098 return CHECKSUM_NONE;
1099 if (!ip_csum_ok)
1100 return CHECKSUM_NONE;
1101 if (!tcpudp_csum_ok)
1102 return CHECKSUM_NONE;
1103
1104 return CHECKSUM_UNNECESSARY;
1105}
1106
Ben Greearbfa35362014-03-03 14:07:09 -08001107static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1108{
1109 struct sk_buff *next = msdu_head->next;
1110 struct sk_buff *to_free = next;
1111 int space;
1112 int total_len = 0;
1113
1114 /* TODO: Might could optimize this by using
1115 * skb_try_coalesce or similar method to
1116 * decrease copying, or maybe get mac80211 to
1117 * provide a way to just receive a list of
1118 * skb?
1119 */
1120
1121 msdu_head->next = NULL;
1122
1123 /* Allocate total length all at once. */
1124 while (next) {
1125 total_len += next->len;
1126 next = next->next;
1127 }
1128
1129 space = total_len - skb_tailroom(msdu_head);
1130 if ((space > 0) &&
1131 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1132 /* TODO: bump some rx-oom error stat */
1133 /* put it back together so we can free the
1134 * whole list at once.
1135 */
1136 msdu_head->next = to_free;
1137 return -1;
1138 }
1139
1140 /* Walk list again, copying contents into
1141 * msdu_head
1142 */
1143 next = to_free;
1144 while (next) {
1145 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1146 next->len);
1147 next = next->next;
1148 }
1149
1150 /* If here, we have consolidated skb. Free the
1151 * fragments and pass the main skb on up the
1152 * stack.
1153 */
1154 ath10k_htt_rx_free_msdu_chain(to_free);
1155 return 0;
1156}
1157
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001158static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1159 struct sk_buff *head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001160 enum htt_rx_mpdu_status status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001161 bool channel_set,
1162 u32 attention)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001163{
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001164 if (head->len == 0) {
1165 ath10k_dbg(ATH10K_DBG_HTT,
1166 "htt rx dropping due to zero-len\n");
1167 return false;
1168 }
1169
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001170 if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001171 ath10k_dbg(ATH10K_DBG_HTT,
1172 "htt rx dropping due to decrypt-err\n");
1173 return false;
1174 }
1175
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001176 if (!channel_set) {
1177 ath10k_warn("no channel configured; ignoring frame!\n");
1178 return false;
1179 }
1180
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001181 /* Skip mgmt frames while we handle this in WMI */
1182 if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001183 attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001184 ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
1185 return false;
1186 }
1187
1188 if (status != HTT_RX_IND_MPDU_STATUS_OK &&
1189 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
1190 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
Michal Kazior1bbc0972014-04-08 09:45:47 +03001191 !htt->ar->monitor_started) {
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001192 ath10k_dbg(ATH10K_DBG_HTT,
1193 "htt rx ignoring frame w/ status %d\n",
1194 status);
1195 return false;
1196 }
1197
1198 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
1199 ath10k_dbg(ATH10K_DBG_HTT,
1200 "htt rx CAC running\n");
1201 return false;
1202 }
1203
1204 return true;
1205}
1206
Kalle Valo5e3dd152013-06-12 20:52:10 +03001207static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1208 struct htt_rx_indication *rx)
1209{
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001210 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001211 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001212 struct htt_rx_desc *rxd;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001213 enum htt_rx_mpdu_status status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001214 struct ieee80211_hdr *hdr;
1215 int num_mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001216 u32 attention;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001217 int fw_desc_len;
1218 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001219 bool channel_set;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001220 int i, j;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001221 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001222
Michal Kazior45967082014-02-27 18:50:05 +02001223 lockdep_assert_held(&htt->rx_ring.lock);
1224
Kalle Valo5e3dd152013-06-12 20:52:10 +03001225 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1226 fw_desc = (u8 *)&rx->fw_desc;
1227
1228 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1229 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1230 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1231
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001232 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001233 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1234 memset(rx_status, 0, sizeof(*rx_status));
1235 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1236 rx->ppdu.combined_rssi;
1237 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001238
1239 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1240 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001241 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1242 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001243 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001244
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001245 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f02014-03-24 21:23:18 +01001246
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001247 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001248 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001249 rx->ppdu.info0,
1250 __le32_to_cpu(rx->ppdu.info1),
1251 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001252 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001253 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001254
Kalle Valo5e3dd152013-06-12 20:52:10 +03001255 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
1256 rx, sizeof(*rx) +
1257 (sizeof(struct htt_rx_indication_mpdu_range) *
1258 num_mpdu_ranges));
1259
1260 for (i = 0; i < num_mpdu_ranges; i++) {
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001261 status = mpdu_ranges[i].mpdu_range_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001262
1263 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1264 struct sk_buff *msdu_head, *msdu_tail;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001265
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001266 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001267 msdu_head = NULL;
1268 msdu_tail = NULL;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001269 ret = ath10k_htt_rx_amsdu_pop(htt,
1270 &fw_desc,
1271 &fw_desc_len,
1272 &msdu_head,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001273 &msdu_tail,
1274 &attention);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001275
1276 if (ret < 0) {
1277 ath10k_warn("failed to pop amsdu from htt rx ring %d\n",
1278 ret);
1279 ath10k_htt_rx_free_msdu_chain(msdu_head);
1280 continue;
1281 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001282
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001283 rxd = container_of((void *)msdu_head->data,
1284 struct htt_rx_desc,
1285 msdu_payload);
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001286
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001287 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001288 status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001289 channel_set,
1290 attention)) {
Marek Puzyniake8a50f82013-11-20 09:59:47 +02001291 ath10k_htt_rx_free_msdu_chain(msdu_head);
1292 continue;
1293 }
1294
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001295 if (ret > 0 &&
1296 ath10k_unchain_msdu(msdu_head) < 0) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001297 ath10k_htt_rx_free_msdu_chain(msdu_head);
1298 continue;
1299 }
1300
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001301 if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001302 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001303 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001304 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001305
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001306 if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001307 rx_status->flag |= RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001308 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001309 rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001310
Kalle Valo5e3dd152013-06-12 20:52:10 +03001311 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1312
1313 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001314 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001315 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001316 ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001317 }
1318 }
1319
Michal Kazior6e712d42013-09-24 10:18:36 +02001320 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001321}
1322
1323static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
1324 struct htt_rx_fragment_indication *frag)
1325{
1326 struct sk_buff *msdu_head, *msdu_tail;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001327 enum htt_rx_mpdu_encrypt_type enctype;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001328 struct htt_rx_desc *rxd;
1329 enum rx_msdu_decap_format fmt;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001330 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001331 struct ieee80211_hdr *hdr;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001332 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001333 bool tkip_mic_err;
1334 bool decrypt_err;
1335 u8 *fw_desc;
1336 int fw_desc_len, hdrlen, paramlen;
1337 int trim;
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001338 u32 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001339
1340 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1341 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1342
1343 msdu_head = NULL;
1344 msdu_tail = NULL;
Michal Kazior45967082014-02-27 18:50:05 +02001345
1346 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001347 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001348 &msdu_head, &msdu_tail,
1349 &attention);
Michal Kazior45967082014-02-27 18:50:05 +02001350 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001351
1352 ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
1353
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001354 if (ret) {
1355 ath10k_warn("failed to pop amsdu from httr rx ring for fragmented rx %d\n",
1356 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001357 ath10k_htt_rx_free_msdu_chain(msdu_head);
1358 return;
1359 }
1360
1361 /* FIXME: implement signal strength */
Ben Greear4b81d172014-05-26 12:46:04 +03001362 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001363
1364 hdr = (struct ieee80211_hdr *)msdu_head->data;
1365 rxd = (void *)msdu_head->data - sizeof(*rxd);
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001366 tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1367 decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001368 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1369 RX_MSDU_START_INFO1_DECAP_FORMAT);
1370
1371 if (fmt != RX_MSDU_DECAP_RAW) {
1372 ath10k_warn("we dont support non-raw fragmented rx yet\n");
1373 dev_kfree_skb_any(msdu_head);
1374 goto end;
1375 }
1376
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001377 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1378 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001379 ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
1380 true);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001381 msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001382
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001383 if (tkip_mic_err)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001384 ath10k_warn("tkip mic error\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001385
1386 if (decrypt_err) {
1387 ath10k_warn("decryption err in fragmented rx\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001388 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001389 goto end;
1390 }
1391
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001392 if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001393 hdrlen = ieee80211_hdrlen(hdr->frame_control);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001394 paramlen = ath10k_htt_rx_crypto_param_len(enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001395
1396 /* It is more efficient to move the header than the payload */
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001397 memmove((void *)msdu_head->data + paramlen,
1398 (void *)msdu_head->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001399 hdrlen);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001400 skb_pull(msdu_head, paramlen);
1401 hdr = (struct ieee80211_hdr *)msdu_head->data;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001402 }
1403
1404 /* remove trailing FCS */
1405 trim = 4;
1406
1407 /* remove crypto trailer */
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001408 trim += ath10k_htt_rx_crypto_tail_len(enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001409
1410 /* last fragment of TKIP frags has MIC */
1411 if (!ieee80211_has_morefrags(hdr->frame_control) &&
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001412 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001413 trim += 8;
1414
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001415 if (trim > msdu_head->len) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001416 ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001417 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001418 goto end;
1419 }
1420
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001421 skb_trim(msdu_head, msdu_head->len - trim);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001422
Ben Greear75fb2f92014-02-05 13:58:34 -08001423 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001424 msdu_head->data, msdu_head->len);
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001425 ath10k_process_rx(htt->ar, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001426
1427end:
1428 if (fw_desc_len > 0) {
1429 ath10k_dbg(ATH10K_DBG_HTT,
1430 "expecting more fragmented rx in one indication %d\n",
1431 fw_desc_len);
1432 }
1433}
1434
Michal Kazior6c5151a2014-02-27 18:50:04 +02001435static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1436 struct sk_buff *skb)
1437{
1438 struct ath10k_htt *htt = &ar->htt;
1439 struct htt_resp *resp = (struct htt_resp *)skb->data;
1440 struct htt_tx_done tx_done = {};
1441 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1442 __le16 msdu_id;
1443 int i;
1444
Michal Kazior45967082014-02-27 18:50:05 +02001445 lockdep_assert_held(&htt->tx_lock);
1446
Michal Kazior6c5151a2014-02-27 18:50:04 +02001447 switch (status) {
1448 case HTT_DATA_TX_STATUS_NO_ACK:
1449 tx_done.no_ack = true;
1450 break;
1451 case HTT_DATA_TX_STATUS_OK:
1452 break;
1453 case HTT_DATA_TX_STATUS_DISCARD:
1454 case HTT_DATA_TX_STATUS_POSTPONE:
1455 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1456 tx_done.discard = true;
1457 break;
1458 default:
1459 ath10k_warn("unhandled tx completion status %d\n", status);
1460 tx_done.discard = true;
1461 break;
1462 }
1463
1464 ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
1465 resp->data_tx_completion.num_msdus);
1466
1467 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1468 msdu_id = resp->data_tx_completion.msdus[i];
1469 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1470 ath10k_txrx_tx_unref(htt, &tx_done);
1471 }
1472}
1473
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001474static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1475{
1476 struct htt_rx_addba *ev = &resp->rx_addba;
1477 struct ath10k_peer *peer;
1478 struct ath10k_vif *arvif;
1479 u16 info0, tid, peer_id;
1480
1481 info0 = __le16_to_cpu(ev->info0);
1482 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1483 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1484
1485 ath10k_dbg(ATH10K_DBG_HTT,
1486 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1487 tid, peer_id, ev->window_size);
1488
1489 spin_lock_bh(&ar->data_lock);
1490 peer = ath10k_peer_find_by_id(ar, peer_id);
1491 if (!peer) {
1492 ath10k_warn("received addba event for invalid peer_id: %hu\n",
1493 peer_id);
1494 spin_unlock_bh(&ar->data_lock);
1495 return;
1496 }
1497
1498 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1499 if (!arvif) {
1500 ath10k_warn("received addba event for invalid vdev_id: %u\n",
1501 peer->vdev_id);
1502 spin_unlock_bh(&ar->data_lock);
1503 return;
1504 }
1505
1506 ath10k_dbg(ATH10K_DBG_HTT,
1507 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1508 peer->addr, tid, ev->window_size);
1509
1510 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1511 spin_unlock_bh(&ar->data_lock);
1512}
1513
1514static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1515{
1516 struct htt_rx_delba *ev = &resp->rx_delba;
1517 struct ath10k_peer *peer;
1518 struct ath10k_vif *arvif;
1519 u16 info0, tid, peer_id;
1520
1521 info0 = __le16_to_cpu(ev->info0);
1522 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1523 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1524
1525 ath10k_dbg(ATH10K_DBG_HTT,
1526 "htt rx delba tid %hu peer_id %hu\n",
1527 tid, peer_id);
1528
1529 spin_lock_bh(&ar->data_lock);
1530 peer = ath10k_peer_find_by_id(ar, peer_id);
1531 if (!peer) {
1532 ath10k_warn("received addba event for invalid peer_id: %hu\n",
1533 peer_id);
1534 spin_unlock_bh(&ar->data_lock);
1535 return;
1536 }
1537
1538 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1539 if (!arvif) {
1540 ath10k_warn("received addba event for invalid vdev_id: %u\n",
1541 peer->vdev_id);
1542 spin_unlock_bh(&ar->data_lock);
1543 return;
1544 }
1545
1546 ath10k_dbg(ATH10K_DBG_HTT,
1547 "htt rx stop rx ba session sta %pM tid %hu\n",
1548 peer->addr, tid);
1549
1550 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1551 spin_unlock_bh(&ar->data_lock);
1552}
1553
Kalle Valo5e3dd152013-06-12 20:52:10 +03001554void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1555{
Michal Kazioredb82362013-07-05 16:15:14 +03001556 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001557 struct htt_resp *resp = (struct htt_resp *)skb->data;
1558
1559 /* confirm alignment */
1560 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1561 ath10k_warn("unaligned htt message, expect trouble\n");
1562
Ben Greear75fb2f92014-02-05 13:58:34 -08001563 ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001564 resp->hdr.msg_type);
1565 switch (resp->hdr.msg_type) {
1566 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1567 htt->target_version_major = resp->ver_resp.major;
1568 htt->target_version_minor = resp->ver_resp.minor;
1569 complete(&htt->target_version_received);
1570 break;
1571 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001572 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001573 spin_lock_bh(&htt->rx_ring.lock);
1574 __skb_queue_tail(&htt->rx_compl_q, skb);
1575 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001576 tasklet_schedule(&htt->txrx_compl_task);
1577 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001578 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1579 struct htt_peer_map_event ev = {
1580 .vdev_id = resp->peer_map.vdev_id,
1581 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1582 };
1583 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1584 ath10k_peer_map_event(htt, &ev);
1585 break;
1586 }
1587 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1588 struct htt_peer_unmap_event ev = {
1589 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1590 };
1591 ath10k_peer_unmap_event(htt, &ev);
1592 break;
1593 }
1594 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1595 struct htt_tx_done tx_done = {};
1596 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1597
1598 tx_done.msdu_id =
1599 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1600
1601 switch (status) {
1602 case HTT_MGMT_TX_STATUS_OK:
1603 break;
1604 case HTT_MGMT_TX_STATUS_RETRY:
1605 tx_done.no_ack = true;
1606 break;
1607 case HTT_MGMT_TX_STATUS_DROP:
1608 tx_done.discard = true;
1609 break;
1610 }
1611
Michal Kazior6c5151a2014-02-27 18:50:04 +02001612 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001613 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001614 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001615 break;
1616 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001617 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1618 spin_lock_bh(&htt->tx_lock);
1619 __skb_queue_tail(&htt->tx_compl_q, skb);
1620 spin_unlock_bh(&htt->tx_lock);
1621 tasklet_schedule(&htt->txrx_compl_task);
1622 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001623 case HTT_T2H_MSG_TYPE_SEC_IND: {
1624 struct ath10k *ar = htt->ar;
1625 struct htt_security_indication *ev = &resp->security_indication;
1626
1627 ath10k_dbg(ATH10K_DBG_HTT,
1628 "sec ind peer_id %d unicast %d type %d\n",
1629 __le16_to_cpu(ev->peer_id),
1630 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1631 MS(ev->flags, HTT_SECURITY_TYPE));
1632 complete(&ar->install_key_done);
1633 break;
1634 }
1635 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
1636 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1637 skb->data, skb->len);
1638 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1639 break;
1640 }
1641 case HTT_T2H_MSG_TYPE_TEST:
1642 /* FIX THIS */
1643 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001644 case HTT_T2H_MSG_TYPE_STATS_CONF:
Kalle Valoa9bf0502013-09-03 11:43:55 +03001645 trace_ath10k_htt_stats(skb->data, skb->len);
1646 break;
1647 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001648 /* Firmware can return tx frames if it's unable to fully
1649 * process them and suspects host may be able to fix it. ath10k
1650 * sends all tx frames as already inspected so this shouldn't
1651 * happen unless fw has a bug.
1652 */
1653 ath10k_warn("received an unexpected htt tx inspect event\n");
1654 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001655 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001656 ath10k_htt_rx_addba(ar, resp);
1657 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001658 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001659 ath10k_htt_rx_delba(ar, resp);
1660 break;
1661 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1662 /* Ignore this event because mac80211 takes care of Rx
1663 * aggregation reordering.
1664 */
1665 break;
1666 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001667 default:
1668 ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
1669 resp->hdr.msg_type);
1670 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1671 skb->data, skb->len);
1672 break;
1673 };
1674
1675 /* Free the indication buffer */
1676 dev_kfree_skb_any(skb);
1677}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001678
1679static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1680{
1681 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1682 struct htt_resp *resp;
1683 struct sk_buff *skb;
1684
Michal Kazior45967082014-02-27 18:50:05 +02001685 spin_lock_bh(&htt->tx_lock);
1686 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001687 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1688 dev_kfree_skb_any(skb);
1689 }
Michal Kazior45967082014-02-27 18:50:05 +02001690 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001691
Michal Kazior45967082014-02-27 18:50:05 +02001692 spin_lock_bh(&htt->rx_ring.lock);
1693 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001694 resp = (struct htt_resp *)skb->data;
1695 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1696 dev_kfree_skb_any(skb);
1697 }
Michal Kazior45967082014-02-27 18:50:05 +02001698 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001699}