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Jan Engelhardtb5114312007-07-15 23:39:36 -07001
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
Jan Engelhardt06bfb7e2007-08-18 12:56:21 +02005 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
Jan Engelhardtb5114312007-07-15 23:39:36 -070010
11if CRYPTO_HW
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13config CRYPTO_DEV_PADLOCK
Herbert Xud1583252007-05-18 13:17:22 +100014 tristate "Support for VIA PadLock ACE"
Herbert Xu2f817412009-04-22 13:00:15 +080015 depends on X86 && !UML
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
Michal Ludvig1191f0a2006-08-06 22:46:20 +100019 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22 The instructions are used only when the CPU supports them.
Michal Ludvig5644bda2006-08-06 22:50:30 +100023 Otherwise software encryption is used.
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025config CRYPTO_DEV_PADLOCK_AES
Michal Ludvig1191f0a2006-08-06 22:46:20 +100026 tristate "PadLock driver for AES algorithm"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 depends on CRYPTO_DEV_PADLOCK
Herbert Xu28ce7282006-08-21 21:38:42 +100028 select CRYPTO_BLKCIPHER
Sebastian Siewior7dc748e2008-04-01 21:24:50 +080029 select CRYPTO_AES
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 help
31 Use VIA PadLock for AES algorithm.
32
Michal Ludvig1191f0a2006-08-06 22:46:20 +100033 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020036 called padlock-aes.
Michal Ludvig1191f0a2006-08-06 22:46:20 +100037
Michal Ludvig6c833272006-07-12 12:29:38 +100038config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
Herbert Xubbbee462009-07-11 18:16:16 +080041 select CRYPTO_HASH
Michal Ludvig6c833272006-07-12 12:29:38 +100042 select CRYPTO_SHA1
43 select CRYPTO_SHA256
Michal Ludvig6c833272006-07-12 12:29:38 +100044 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020050 called padlock-sha.
Michal Ludvig6c833272006-07-12 12:29:38 +100051
Jordan Crouse9fe757b2006-10-04 18:48:57 +100052config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
Simon Arlottf6259de2007-05-02 22:08:26 +100054 depends on X86_32 && PCI
Jordan Crouse9fe757b2006-10-04 18:48:57 +100055 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
Jordan Crouse9fe757b2006-10-04 18:48:57 +100057 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
David Sterba3dde6ad2007-05-09 07:12:20 +020059 engine for the CryptoAPI AES algorithm.
Jordan Crouse9fe757b2006-10-04 18:48:57 +100060
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020064config ZCRYPT
Harald Freudenbergera3358e32017-02-20 16:09:51 +010065 tristate "Support for s390 cryptographic adapters"
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020066 depends on S390
Ralph Wuerthner2f7c8bd2008-04-17 07:46:15 +020067 select HW_RANDOM
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020068 help
Harald Freudenbergera3358e32017-02-20 16:09:51 +010069 Select this option if you want to enable support for
70 s390 cryptographic adapters like:
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020071 + PCI-X Cryptographic Coprocessor (PCIXCC)
Harald Freudenbergera3358e32017-02-20 16:09:51 +010072 + Crypto Express 2,3,4 or 5 Coprocessor (CEXxC)
73 + Crypto Express 2,3,4 or 5 Accelerator (CEXxA)
74 + Crypto Express 4 or 5 EP11 Coprocessor (CEXxP)
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020075
Harald Freudenbergere80d4af2016-11-02 14:37:20 +010076config PKEY
77 tristate "Kernel API for protected key handling"
78 depends on S390
79 depends on ZCRYPT
80 help
81 With this option enabled the pkey kernel module provides an API
82 for creation and handling of protected keys. Other parts of the
83 kernel or userspace applications may use these functions.
84
85 Select this option if you want to enable the kernel and userspace
86 API for proteced key handling.
87
88 Please note that creation of protected keys from secure keys
89 requires to have at least one CEX card in coprocessor mode
90 available at runtime.
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020091
Jan Glauber3f5615e2008-01-26 14:11:07 +010092config CRYPTO_SHA1_S390
93 tristate "SHA1 digest algorithm"
94 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110095 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010096 help
97 This is the s390 hardware accelerated implementation of the
98 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
99
Jan Glauberd393d9b2011-04-19 21:29:19 +0200100 It is available as of z990.
101
Jan Glauber3f5615e2008-01-26 14:11:07 +0100102config CRYPTO_SHA256_S390
103 tristate "SHA256 digest algorithm"
104 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100105 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +0100106 help
107 This is the s390 hardware accelerated implementation of the
108 SHA256 secure hash standard (DFIPS 180-2).
109
Jan Glauberd393d9b2011-04-19 21:29:19 +0200110 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100111
Jan Glauber291dc7c2008-03-06 19:52:00 +0800112config CRYPTO_SHA512_S390
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800113 tristate "SHA384 and SHA512 digest algorithm"
Jan Glauber291dc7c2008-03-06 19:52:00 +0800114 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100115 select CRYPTO_HASH
Jan Glauber291dc7c2008-03-06 19:52:00 +0800116 help
117 This is the s390 hardware accelerated implementation of the
118 SHA512 secure hash standard.
119
Jan Glauberd393d9b2011-04-19 21:29:19 +0200120 It is available as of z10.
Jan Glauber291dc7c2008-03-06 19:52:00 +0800121
Jan Glauber3f5615e2008-01-26 14:11:07 +0100122config CRYPTO_DES_S390
123 tristate "DES and Triple DES cipher algorithms"
124 depends on S390
125 select CRYPTO_ALGAPI
126 select CRYPTO_BLKCIPHER
Heiko Carstens63291d42012-05-09 16:27:35 +0200127 select CRYPTO_DES
Jan Glauber3f5615e2008-01-26 14:11:07 +0100128 help
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000129 This is the s390 hardware accelerated implementation of the
Jan Glauber3f5615e2008-01-26 14:11:07 +0100130 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
131
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000132 As of z990 the ECB and CBC mode are hardware accelerated.
133 As of z196 the CTR mode is hardware accelerated.
134
Jan Glauber3f5615e2008-01-26 14:11:07 +0100135config CRYPTO_AES_S390
136 tristate "AES cipher algorithms"
137 depends on S390
138 select CRYPTO_ALGAPI
139 select CRYPTO_BLKCIPHER
Martin Schwidefsky27937842016-11-04 11:57:15 +0100140 select PKEY
Jan Glauber3f5615e2008-01-26 14:11:07 +0100141 help
142 This is the s390 hardware accelerated implementation of the
Gerald Schaefer99d97222011-04-26 16:12:42 +1000143 AES cipher algorithms (FIPS-197).
Jan Glauber3f5615e2008-01-26 14:11:07 +0100144
Gerald Schaefer99d97222011-04-26 16:12:42 +1000145 As of z9 the ECB and CBC modes are hardware accelerated
146 for 128 bit keys.
147 As of z10 the ECB and CBC modes are hardware accelerated
148 for all AES key sizes.
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000149 As of z196 the CTR mode is hardware accelerated for all AES
150 key sizes and XTS mode is hardware accelerated for 256 and
Gerald Schaefer99d97222011-04-26 16:12:42 +1000151 512 bit keys.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100152
153config S390_PRNG
154 tristate "Pseudo random number generator device driver"
155 depends on S390
156 default "m"
157 help
158 Select this option if you want to use the s390 pseudo random number
159 generator. The PRNG is part of the cryptographic processor functions
160 and uses triple-DES to generate secure random numbers like the
Jan Glauberd393d9b2011-04-19 21:29:19 +0200161 ANSI X9.17 standard. User-space programs access the
162 pseudo-random-number device through the char device /dev/prandom.
163
164 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100165
Gerald Schaeferdf1309c2011-04-19 21:29:18 +0200166config CRYPTO_GHASH_S390
167 tristate "GHASH digest algorithm"
168 depends on S390
169 select CRYPTO_HASH
170 help
171 This is the s390 hardware accelerated implementation of the
172 GHASH message digest algorithm for GCM (Galois/Counter Mode).
173
174 It is available as of z196.
175
Hendrik Bruecknerf848dbd2015-04-28 15:52:44 +0200176config CRYPTO_CRC32_S390
177 tristate "CRC-32 algorithms"
178 depends on S390
179 select CRYPTO_HASH
180 select CRC32
181 help
182 Select this option if you want to use hardware accelerated
183 implementations of CRC algorithms. With this option, you
184 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
185 and CRC-32C (Castagnoli).
186
187 It is available with IBM z13 or later.
188
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000189config CRYPTO_DEV_MV_CESA
190 tristate "Marvell's Cryptographic Engine"
191 depends on PLAT_ORION
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000192 select CRYPTO_AES
Herbert Xu596103c2015-06-17 14:58:24 +0800193 select CRYPTO_BLKCIPHER
Alexander Clouter1ebfefc2012-05-12 09:45:08 +0100194 select CRYPTO_HASH
Boris BREZILLON51b44fc2015-06-18 15:46:18 +0200195 select SRAM
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000196 help
197 This driver allows you to utilize the Cryptographic Engines and
198 Security Accelerator (CESA) which can be found on the Marvell Orion
199 and Kirkwood SoCs, such as QNAP's TS-209.
200
201 Currently the driver supports AES in ECB and CBC mode without DMA.
202
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200203config CRYPTO_DEV_MARVELL_CESA
204 tristate "New Marvell's Cryptographic Engine driver"
Boris Brezillonfe55dfd2015-06-22 09:22:14 +0200205 depends on PLAT_ORION || ARCH_MVEBU
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200206 select CRYPTO_AES
207 select CRYPTO_DES
208 select CRYPTO_BLKCIPHER
209 select CRYPTO_HASH
210 select SRAM
211 help
212 This driver allows you to utilize the Cryptographic Engines and
213 Security Accelerator (CESA) which can be found on the Armada 370.
Boris BREZILLONdb509a42015-06-18 15:46:21 +0200214 This driver supports CPU offload through DMA transfers.
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200215
216 This driver is aimed at replacing the mv_cesa driver. This will only
217 happen once it has received proper testing.
218
David S. Miller0a625fd22010-05-19 14:14:04 +1000219config CRYPTO_DEV_NIAGARA2
220 tristate "Niagara2 Stream Processing Unit driver"
David S. Miller50e78162010-09-12 10:44:21 +0800221 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800222 select CRYPTO_BLKCIPHER
223 select CRYPTO_HASH
LABBE Corentin8054b802015-12-17 13:45:40 +0100224 select CRYPTO_MD5
225 select CRYPTO_SHA1
226 select CRYPTO_SHA256
David S. Miller0a625fd22010-05-19 14:14:04 +1000227 depends on SPARC64
228 help
229 Each core of a Niagara2 processor contains a Stream
230 Processing Unit, which itself contains several cryptographic
231 sub-units. One set provides the Modular Arithmetic Unit,
232 used for SSL offload. The other set provides the Cipher
233 Group, which can perform encryption, decryption, hashing,
234 checksumming, and raw copies.
235
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800236config CRYPTO_DEV_HIFN_795X
237 tristate "Driver HIFN 795x crypto accelerator chips"
Evgeniy Polyakovc3041f92007-10-11 19:58:16 +0800238 select CRYPTO_DES
Herbert Xu653ebd9c2007-11-27 19:48:27 +0800239 select CRYPTO_BLKCIPHER
Herbert Xu946fef42008-01-26 09:48:44 +1100240 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
Jan Glauber2707b932007-11-12 21:56:38 +0800241 depends on PCI
Richard Weinberger75b76622011-10-10 12:55:41 +0200242 depends on !ARCH_DMA_ADDR_T_64BIT
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800243 help
244 This option allows you to have support for HIFN 795x crypto adapters.
245
Herbert Xu946fef42008-01-26 09:48:44 +1100246config CRYPTO_DEV_HIFN_795X_RNG
247 bool "HIFN 795x random number generator"
248 depends on CRYPTO_DEV_HIFN_795X
249 help
250 Select this option if you want to enable the random number generator
251 on the HIFN 795x crypto adapters.
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800252
Kim Phillips8e8ec592011-03-13 16:54:26 +0800253source drivers/crypto/caam/Kconfig
254
Kim Phillips9c4a7962008-06-23 19:50:15 +0800255config CRYPTO_DEV_TALITOS
256 tristate "Talitos Freescale Security Engine (SEC)"
Herbert Xu596103c2015-06-17 14:58:24 +0800257 select CRYPTO_AEAD
Kim Phillips9c4a7962008-06-23 19:50:15 +0800258 select CRYPTO_AUTHENC
Herbert Xu596103c2015-06-17 14:58:24 +0800259 select CRYPTO_BLKCIPHER
260 select CRYPTO_HASH
Kim Phillips9c4a7962008-06-23 19:50:15 +0800261 select HW_RANDOM
262 depends on FSL_SOC
263 help
264 Say 'Y' here to use the Freescale Security Engine (SEC)
265 to offload cryptographic algorithm computation.
266
267 The Freescale SEC is present on PowerQUICC 'E' processors, such
268 as the MPC8349E and MPC8548E.
269
270 To compile this driver as a module, choose M here: the module
271 will be called talitos.
272
LEROY Christophe5b841a62015-04-17 16:32:03 +0200273config CRYPTO_DEV_TALITOS1
274 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
275 depends on CRYPTO_DEV_TALITOS
276 depends on PPC_8xx || PPC_82xx
277 default y
278 help
279 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
280 found on MPC82xx or the Freescale Security Engine (SEC Lite)
281 version 1.2 found on MPC8xx
282
283config CRYPTO_DEV_TALITOS2
284 bool "SEC2+ (SEC version 2.0 or upper)"
285 depends on CRYPTO_DEV_TALITOS
286 default y if !PPC_8xx
287 help
288 Say 'Y' here to use the Freescale Security Engine (SEC)
289 version 2 and following as found on MPC83xx, MPC85xx, etc ...
290
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800291config CRYPTO_DEV_IXP4XX
292 tristate "Driver for IXP4xx crypto hardware acceleration"
Krzysztof Hałasa9665c522010-03-25 23:56:05 +0100293 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800294 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800295 select CRYPTO_AEAD
Imre Kaloz090657e2008-07-13 20:12:11 +0800296 select CRYPTO_AUTHENC
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800297 select CRYPTO_BLKCIPHER
298 help
299 Driver for the IXP4xx NPE crypto engine.
300
James Hsiao049359d2009-02-05 16:18:13 +1100301config CRYPTO_DEV_PPC4XX
302 tristate "Driver AMCC PPC4xx crypto accelerator"
303 depends on PPC && 4xx
304 select CRYPTO_HASH
James Hsiao049359d2009-02-05 16:18:13 +1100305 select CRYPTO_BLKCIPHER
306 help
307 This option allows you to have support for AMCC crypto acceleration.
308
Christian Lamparter5343e672016-04-18 12:57:41 +0200309config HW_RANDOM_PPC4XX
310 bool "PowerPC 4xx generic true random number generator support"
311 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
312 default y
313 ---help---
314 This option provides the kernel-side support for the TRNG hardware
315 found in the security function of some PowerPC 4xx SoCs.
316
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800317config CRYPTO_DEV_OMAP_SHAM
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530318 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
319 depends on ARCH_OMAP2PLUS
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800320 select CRYPTO_SHA1
321 select CRYPTO_MD5
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530322 select CRYPTO_SHA256
323 select CRYPTO_SHA512
324 select CRYPTO_HMAC
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800325 help
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530326 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
327 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800328
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800329config CRYPTO_DEV_OMAP_AES
330 tristate "Support for OMAP AES hw engine"
Joel Fernandes1bbf6432013-08-17 21:42:35 -0500331 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800332 select CRYPTO_AES
Herbert Xu596103c2015-06-17 14:58:24 +0800333 select CRYPTO_BLKCIPHER
Baolin Wang05299002016-01-26 20:25:40 +0800334 select CRYPTO_ENGINE
Lokesh Vutla9fcb1912016-08-04 13:28:44 +0300335 select CRYPTO_CBC
336 select CRYPTO_ECB
337 select CRYPTO_CTR
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800338 help
339 OMAP processors have AES module accelerator. Select this if you
340 want to use the OMAP module for AES algorithms.
341
Joel Fernandes701d0f12014-02-14 10:49:47 -0600342config CRYPTO_DEV_OMAP_DES
Peter Meerwald97ee7ed2016-03-13 16:15:37 +0100343 tristate "Support for OMAP DES/3DES hw engine"
Joel Fernandes701d0f12014-02-14 10:49:47 -0600344 depends on ARCH_OMAP2PLUS
345 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800346 select CRYPTO_BLKCIPHER
Baolin Wangf1b77aa2016-04-28 14:11:51 +0800347 select CRYPTO_ENGINE
Joel Fernandes701d0f12014-02-14 10:49:47 -0600348 help
349 OMAP processors have DES/3DES module accelerator. Select this if you
350 want to use the OMAP module for DES and 3DES algorithms. Currently
Peter Meerwald97ee7ed2016-03-13 16:15:37 +0100351 the ECB and CBC modes of operation are supported by the driver. Also
352 accesses made on unaligned boundaries are supported.
Joel Fernandes701d0f12014-02-14 10:49:47 -0600353
Jamie Ilesce921362011-02-21 16:43:21 +1100354config CRYPTO_DEV_PICOXCELL
355 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
Javier Martinez Canillas4f44d862017-01-02 14:06:57 -0300356 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK
Herbert Xu596103c2015-06-17 14:58:24 +0800357 select CRYPTO_AEAD
Jamie Ilesce921362011-02-21 16:43:21 +1100358 select CRYPTO_AES
359 select CRYPTO_AUTHENC
Herbert Xu596103c2015-06-17 14:58:24 +0800360 select CRYPTO_BLKCIPHER
Jamie Ilesce921362011-02-21 16:43:21 +1100361 select CRYPTO_DES
362 select CRYPTO_CBC
363 select CRYPTO_ECB
364 select CRYPTO_SEQIV
365 help
366 This option enables support for the hardware offload engines in the
367 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
368 and for 3gpp Layer 2 ciphering support.
369
370 Saying m here will build a module named pipcoxcell_crypto.
371
Javier Martin5de88752013-03-01 12:37:53 +0100372config CRYPTO_DEV_SAHARA
373 tristate "Support for SAHARA crypto accelerator"
Paul Bolle74d24d82013-05-12 13:57:19 +0200374 depends on ARCH_MXC && OF
Javier Martin5de88752013-03-01 12:37:53 +0100375 select CRYPTO_BLKCIPHER
376 select CRYPTO_AES
377 select CRYPTO_ECB
378 help
379 This option enables support for the SAHARA HW crypto accelerator
380 found in some Freescale i.MX chips.
381
Steffen Trumtrard293b642016-04-12 11:04:26 +0200382config CRYPTO_DEV_MXC_SCC
383 tristate "Support for Freescale Security Controller (SCC)"
384 depends on ARCH_MXC && OF
385 select CRYPTO_BLKCIPHER
386 select CRYPTO_DES
387 help
388 This option enables support for the Security Controller (SCC)
389 found in Freescale i.MX25 chips.
390
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800391config CRYPTO_DEV_S5P
Naveen Krishna Chatradhie922e962014-05-08 21:58:14 +0800392 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
Krzysztof Kozlowskidc1d9de2016-03-14 13:20:18 +0900393 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
394 depends on HAS_IOMEM && HAS_DMA
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800395 select CRYPTO_AES
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800396 select CRYPTO_BLKCIPHER
397 help
398 This option allows you to have support for S5P crypto acceleration.
Naveen Krishna Chatradhie922e962014-05-08 21:58:14 +0800399 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800400 algorithms execution.
401
Kent Yoderaef7b312012-04-12 05:39:26 +0000402config CRYPTO_DEV_NX
Dan Streetman7011a122015-05-07 13:49:17 -0400403 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
404 depends on PPC64
Kent Yoderaef7b312012-04-12 05:39:26 +0000405 help
Dan Streetman7011a122015-05-07 13:49:17 -0400406 This enables support for the NX hardware cryptographic accelerator
407 coprocessor that is in IBM PowerPC P7+ or later processors. This
408 does not actually enable any drivers, it only allows you to select
409 which acceleration type (encryption and/or compression) to enable.
Seth Jennings322cacc2012-07-19 09:42:38 -0500410
411if CRYPTO_DEV_NX
412 source "drivers/crypto/nx/Kconfig"
413endif
Kent Yoderaef7b312012-04-12 05:39:26 +0000414
Andreas Westin2789c082012-04-30 10:11:17 +0200415config CRYPTO_DEV_UX500
416 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
417 depends on ARCH_U8500
Andreas Westin2789c082012-04-30 10:11:17 +0200418 help
419 Driver for ST-Ericsson UX500 crypto engine.
420
421if CRYPTO_DEV_UX500
422 source "drivers/crypto/ux500/Kconfig"
423endif # if CRYPTO_DEV_UX500
424
Sonic Zhangb8840092012-06-04 12:24:47 +0800425config CRYPTO_DEV_BFIN_CRC
426 tristate "Support for Blackfin CRC hardware"
427 depends on BF60x
428 help
429 Newer Blackfin processors have CRC hardware. Select this if you
430 want to use the Blackfin CRC module.
431
Cyrille Pitchen89a82ef2017-01-26 17:07:56 +0100432config CRYPTO_DEV_ATMEL_AUTHENC
433 tristate "Support for Atmel IPSEC/SSL hw accelerator"
Arnd Bergmannceb4afb2017-02-06 13:32:15 +0100434 depends on HAS_DMA
435 depends on ARCH_AT91 || COMPILE_TEST
Cyrille Pitchen89a82ef2017-01-26 17:07:56 +0100436 select CRYPTO_AUTHENC
437 select CRYPTO_DEV_ATMEL_AES
438 select CRYPTO_DEV_ATMEL_SHA
439 help
440 Some Atmel processors can combine the AES and SHA hw accelerators
441 to enhance support of IPSEC/SSL.
442 Select this if you want to use the Atmel modules for
443 authenc(hmac(shaX),Y(cbc)) algorithms.
444
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200445config CRYPTO_DEV_ATMEL_AES
446 tristate "Support for Atmel AES hw accelerator"
Geert Uytterhoevencbafd642016-01-15 14:48:06 +0100447 depends on HAS_DMA
Arnd Bergmannceb4afb2017-02-06 13:32:15 +0100448 depends on ARCH_AT91 || COMPILE_TEST
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200449 select CRYPTO_AES
Cyrille Pitchend4419542015-12-17 18:13:07 +0100450 select CRYPTO_AEAD
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200451 select CRYPTO_BLKCIPHER
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200452 help
453 Some Atmel processors have AES hw accelerator.
454 Select this if you want to use the Atmel module for
455 AES algorithms.
456
457 To compile this driver as a module, choose M here: the module
458 will be called atmel-aes.
459
Nicolas Royer13802002012-07-01 19:19:45 +0200460config CRYPTO_DEV_ATMEL_TDES
461 tristate "Support for Atmel DES/TDES hw accelerator"
Geert Uytterhoevenf7f94822017-02-24 11:27:38 +0100462 depends on HAS_DMA
Arnd Bergmannceb4afb2017-02-06 13:32:15 +0100463 depends on ARCH_AT91 || COMPILE_TEST
Nicolas Royer13802002012-07-01 19:19:45 +0200464 select CRYPTO_DES
Nicolas Royer13802002012-07-01 19:19:45 +0200465 select CRYPTO_BLKCIPHER
466 help
467 Some Atmel processors have DES/TDES hw accelerator.
468 Select this if you want to use the Atmel module for
469 DES/TDES algorithms.
470
471 To compile this driver as a module, choose M here: the module
472 will be called atmel-tdes.
473
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200474config CRYPTO_DEV_ATMEL_SHA
Nicolas Royerd4905b32013-02-20 17:10:26 +0100475 tristate "Support for Atmel SHA hw accelerator"
Geert Uytterhoevenf7f94822017-02-24 11:27:38 +0100476 depends on HAS_DMA
Arnd Bergmannceb4afb2017-02-06 13:32:15 +0100477 depends on ARCH_AT91 || COMPILE_TEST
Herbert Xu596103c2015-06-17 14:58:24 +0800478 select CRYPTO_HASH
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200479 help
Nicolas Royerd4905b32013-02-20 17:10:26 +0100480 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
481 hw accelerator.
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200482 Select this if you want to use the Atmel module for
Nicolas Royerd4905b32013-02-20 17:10:26 +0100483 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200484
485 To compile this driver as a module, choose M here: the module
486 will be called atmel-sha.
487
Tom Lendackyf1147662013-11-12 11:46:51 -0600488config CRYPTO_DEV_CCP
489 bool "Support for AMD Cryptographic Coprocessor"
Tom Lendacky6c506342015-02-03 13:07:29 -0600490 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
Tom Lendackyf1147662013-11-12 11:46:51 -0600491 help
Tom Lendacky21dc9e82015-10-01 16:32:44 -0500492 The AMD Cryptographic Coprocessor provides hardware offload support
Tom Lendackyf1147662013-11-12 11:46:51 -0600493 for encryption, hashing and related operations.
494
495if CRYPTO_DEV_CCP
496 source "drivers/crypto/ccp/Kconfig"
497endif
498
Marek Vasut15b59e72013-12-10 20:26:21 +0100499config CRYPTO_DEV_MXS_DCP
500 tristate "Support for Freescale MXS DCP"
Fabio Estevama2712e62015-09-02 12:05:18 -0300501 depends on (ARCH_MXS || ARCH_MXC)
Arnd Bergmanndc97fa02015-10-12 15:52:34 +0200502 select STMP_DEVICE
Marek Vasut15b59e72013-12-10 20:26:21 +0100503 select CRYPTO_CBC
504 select CRYPTO_ECB
505 select CRYPTO_AES
506 select CRYPTO_BLKCIPHER
Herbert Xu596103c2015-06-17 14:58:24 +0800507 select CRYPTO_HASH
Marek Vasut15b59e72013-12-10 20:26:21 +0100508 help
509 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
510 co-processor on the die.
511
512 To compile this driver as a module, choose M here: the module
513 will be called mxs-dcp.
514
Tadeusz Strukcea40012014-06-05 13:44:39 -0700515source "drivers/crypto/qat/Kconfig"
George Cherian62ad8b52017-02-07 14:51:15 +0000516source "drivers/crypto/cavium/cpt/Kconfig"
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300517
Mahipal Challa640035a2017-02-15 10:45:08 +0530518config CRYPTO_DEV_CAVIUM_ZIP
519 tristate "Cavium ZIP driver"
520 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
521 ---help---
522 Select this option if you want to enable compression/decompression
523 acceleration on Cavium's ARM based SoCs
524
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300525config CRYPTO_DEV_QCE
526 tristate "Qualcomm crypto engine accelerator"
Chen Gang71d932d2014-07-13 11:01:38 +0800527 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300528 select CRYPTO_AES
529 select CRYPTO_DES
530 select CRYPTO_ECB
531 select CRYPTO_CBC
532 select CRYPTO_XTS
533 select CRYPTO_CTR
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300534 select CRYPTO_BLKCIPHER
535 help
536 This driver supports Qualcomm crypto engine accelerator
537 hardware. To compile this driver as a module, choose M here. The
538 module will be called qcrypto.
539
Leonidas S. Barbosad2e3ae62015-02-06 14:59:48 -0200540config CRYPTO_DEV_VMX
541 bool "Support for VMX cryptographic acceleration instructions"
Michael Ellermanf1ab4282015-09-09 18:22:35 +1000542 depends on PPC64 && VSX
Leonidas S. Barbosad2e3ae62015-02-06 14:59:48 -0200543 help
544 Support for VMX cryptographic acceleration instructions.
545
546source "drivers/crypto/vmx/Kconfig"
547
James Hartleyd358f1a2015-03-12 23:17:26 +0000548config CRYPTO_DEV_IMGTEC_HASH
James Hartleyd358f1a2015-03-12 23:17:26 +0000549 tristate "Imagination Technologies hardware hash accelerator"
Geert Uytterhoeven8c98ebd2015-04-23 20:03:58 +0200550 depends on MIPS || COMPILE_TEST
551 depends on HAS_DMA
James Hartleyd358f1a2015-03-12 23:17:26 +0000552 select CRYPTO_MD5
553 select CRYPTO_SHA1
James Hartleyd358f1a2015-03-12 23:17:26 +0000554 select CRYPTO_SHA256
555 select CRYPTO_HASH
556 help
557 This driver interfaces with the Imagination Technologies
558 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
559 hashing algorithms.
560
LABBE Corentin6298e942015-07-17 16:39:41 +0200561config CRYPTO_DEV_SUN4I_SS
562 tristate "Support for Allwinner Security System cryptographic accelerator"
Andre Przywaraf823ab92016-02-01 17:39:21 +0000563 depends on ARCH_SUNXI && !64BIT
LABBE Corentin6298e942015-07-17 16:39:41 +0200564 select CRYPTO_MD5
565 select CRYPTO_SHA1
566 select CRYPTO_AES
567 select CRYPTO_DES
568 select CRYPTO_BLKCIPHER
569 help
570 Some Allwinner SoC have a crypto accelerator named
571 Security System. Select this if you want to use it.
572 The Security System handle AES/DES/3DES ciphers in CBC mode
573 and SHA1 and MD5 hash algorithms.
574
575 To compile this driver as a module, choose M here: the module
576 will be called sun4i-ss.
577
Zain Wang433cd2c2015-11-25 13:43:32 +0800578config CRYPTO_DEV_ROCKCHIP
579 tristate "Rockchip's Cryptographic Engine driver"
580 depends on OF && ARCH_ROCKCHIP
581 select CRYPTO_AES
582 select CRYPTO_DES
Zain Wangbfd927f2016-02-16 10:15:01 +0800583 select CRYPTO_MD5
584 select CRYPTO_SHA1
585 select CRYPTO_SHA256
586 select CRYPTO_HASH
Zain Wang433cd2c2015-11-25 13:43:32 +0800587 select CRYPTO_BLKCIPHER
588
589 help
590 This driver interfaces with the hardware crypto accelerator.
591 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
592
Ryder Lee785e5c62016-12-19 10:20:44 +0800593config CRYPTO_DEV_MEDIATEK
594 tristate "MediaTek's EIP97 Cryptographic Engine driver"
Geert Uytterhoevenc884b362017-02-24 11:27:39 +0100595 depends on HAS_DMA
Arnd Bergmann7dee9f62017-01-11 14:50:19 +0100596 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST
Ryder Lee785e5c62016-12-19 10:20:44 +0800597 select CRYPTO_AES
Ryder Leed03f7b02017-01-20 13:41:15 +0800598 select CRYPTO_AEAD
Ryder Lee785e5c62016-12-19 10:20:44 +0800599 select CRYPTO_BLKCIPHER
Ryder Leed03f7b02017-01-20 13:41:15 +0800600 select CRYPTO_CTR
Arnd Bergmann7dee9f62017-01-11 14:50:19 +0100601 select CRYPTO_SHA1
602 select CRYPTO_SHA256
603 select CRYPTO_SHA512
Ryder Lee785e5c62016-12-19 10:20:44 +0800604 select CRYPTO_HMAC
605 help
606 This driver allows you to utilize the hardware crypto accelerator
607 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc ....
608 Select this if you want to use it for AES/SHA1/SHA2 algorithms.
609
Hariprasad Shenai02038fd2016-08-17 12:33:06 +0530610source "drivers/crypto/chelsio/Kconfig"
611
Gongleidbaf0622016-12-15 10:03:16 +0800612source "drivers/crypto/virtio/Kconfig"
613
Rob Rice9d12ba82017-02-03 12:55:33 -0500614config CRYPTO_DEV_BCM_SPU
615 tristate "Broadcom symmetric crypto/hash acceleration support"
616 depends on ARCH_BCM_IPROC
617 depends on BCM_PDC_MBOX
618 default m
619 select CRYPTO_DES
620 select CRYPTO_MD5
621 select CRYPTO_SHA1
622 select CRYPTO_SHA256
623 select CRYPTO_SHA512
624 help
625 This driver provides support for Broadcom crypto acceleration using the
626 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
627 ahash, and aead algorithms with the kernel cryptographic API.
628
Jan Engelhardtb5114312007-07-15 23:39:36 -0700629endif # CRYPTO_HW