blob: d32e82ff92838a2d60b7ac7565cf3a3fac45e264 [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
Sujith Manoharan5b681382011-05-17 13:36:18 +05302 * Copyright (c) 2008-2011 Atheros Communications Inc.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Sujith394cf0a2009-02-09 13:26:54 +053017#include "ath9k.h"
Luis R. Rodriguezb622a722010-04-15 17:39:28 -040018#include "ar9003_mac.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070019
Felix Fietkaub5c804752010-04-15 17:38:48 -040020#define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
21
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -070022static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
23 int mindelta, int main_rssi_avg,
24 int alt_rssi_avg, int pkt_count)
25{
26 return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
27 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
28 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
29}
30
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +053031static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
32 int curr_main_set, int curr_alt_set,
33 int alt_rssi_avg, int main_rssi_avg)
34{
35 bool result = false;
36 switch (div_group) {
37 case 0:
38 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
39 result = true;
40 break;
41 case 1:
Gabor Juhos66ce2352011-06-21 11:23:43 +020042 case 2:
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +053043 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
44 (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
45 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
46 ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
47 (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
48 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
49 (alt_rssi_avg >= 4))
50 result = true;
51 else
52 result = false;
53 break;
54 }
55
56 return result;
57}
58
Vasanthakumar Thiagarajanededf1f2010-05-22 23:58:13 -070059static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
60{
61 return sc->ps_enabled &&
62 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
63}
64
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070065/*
66 * Setup and link descriptors.
67 *
68 * 11N: we can no longer afford to self link the last descriptor.
69 * MAC acknowledges BA status as long as it copies frames to host
70 * buffer (or rx fifo). This can incorrectly acknowledge packets
71 * to a sender if last desc is self-linked.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070072 */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070073static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
74{
Sujithcbe61d82009-02-09 13:27:12 +053075 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080076 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070077 struct ath_desc *ds;
78 struct sk_buff *skb;
79
80 ATH_RXBUF_RESET(bf);
81
82 ds = bf->bf_desc;
Sujithbe0418a2008-11-18 09:05:55 +053083 ds->ds_link = 0; /* link to null */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070084 ds->ds_data = bf->bf_buf_addr;
85
Sujithbe0418a2008-11-18 09:05:55 +053086 /* virtual addr of the beginning of the buffer. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070087 skb = bf->bf_mpdu;
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -070088 BUG_ON(skb == NULL);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070089 ds->ds_vdata = skb->data;
90
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080091 /*
92 * setup rx descriptors. The rx_bufsize here tells the hardware
Luis R. Rodriguezb4b6cda2008-11-20 17:15:13 -080093 * how much data it can DMA to us and that we are prepared
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080094 * to process
95 */
Sujithb77f4832008-12-07 21:44:03 +053096 ath9k_hw_setuprxdesc(ah, ds,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080097 common->rx_bufsize,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070098 0);
99
Sujithb77f4832008-12-07 21:44:03 +0530100 if (sc->rx.rxlink == NULL)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700101 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
102 else
Sujithb77f4832008-12-07 21:44:03 +0530103 *sc->rx.rxlink = bf->bf_daddr;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700104
Sujithb77f4832008-12-07 21:44:03 +0530105 sc->rx.rxlink = &ds->ds_link;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700106}
107
Sujithff37e332008-11-24 12:07:55 +0530108static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
109{
110 /* XXX block beacon interrupts */
111 ath9k_hw_setantenna(sc->sc_ah, antenna);
Sujithb77f4832008-12-07 21:44:03 +0530112 sc->rx.defant = antenna;
113 sc->rx.rxotherant = 0;
Sujithff37e332008-11-24 12:07:55 +0530114}
115
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700116static void ath_opmode_init(struct ath_softc *sc)
117{
Sujithcbe61d82009-02-09 13:27:12 +0530118 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -0700119 struct ath_common *common = ath9k_hw_common(ah);
120
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700121 u32 rfilt, mfilt[2];
122
123 /* configure rx filter */
124 rfilt = ath_calcrxfilter(sc);
125 ath9k_hw_setrxfilter(ah, rfilt);
126
127 /* configure bssid mask */
Felix Fietkau364734f2010-09-14 20:22:44 +0200128 ath_hw_setbssidmask(common);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700129
130 /* configure operational mode */
131 ath9k_hw_setopmode(ah);
132
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700133 /* calculate and install multicast filter */
134 mfilt[0] = mfilt[1] = ~0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700135 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700136}
137
Felix Fietkaub5c804752010-04-15 17:38:48 -0400138static bool ath_rx_edma_buf_link(struct ath_softc *sc,
139 enum ath9k_rx_qtype qtype)
140{
141 struct ath_hw *ah = sc->sc_ah;
142 struct ath_rx_edma *rx_edma;
143 struct sk_buff *skb;
144 struct ath_buf *bf;
145
146 rx_edma = &sc->rx.rx_edma[qtype];
147 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
148 return false;
149
150 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
151 list_del_init(&bf->list);
152
153 skb = bf->bf_mpdu;
154
155 ATH_RXBUF_RESET(bf);
156 memset(skb->data, 0, ah->caps.rx_status_len);
157 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
158 ah->caps.rx_status_len, DMA_TO_DEVICE);
159
160 SKB_CB_ATHBUF(skb) = bf;
161 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
162 skb_queue_tail(&rx_edma->rx_fifo, skb);
163
164 return true;
165}
166
167static void ath_rx_addbuffer_edma(struct ath_softc *sc,
168 enum ath9k_rx_qtype qtype, int size)
169{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400170 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
171 u32 nbuf = 0;
172
Felix Fietkaub5c804752010-04-15 17:38:48 -0400173 if (list_empty(&sc->rx.rxbuf)) {
Joe Perches226afe62010-12-02 19:12:37 -0800174 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
Felix Fietkaub5c804752010-04-15 17:38:48 -0400175 return;
176 }
177
178 while (!list_empty(&sc->rx.rxbuf)) {
179 nbuf++;
180
181 if (!ath_rx_edma_buf_link(sc, qtype))
182 break;
183
184 if (nbuf >= size)
185 break;
186 }
187}
188
189static void ath_rx_remove_buffer(struct ath_softc *sc,
190 enum ath9k_rx_qtype qtype)
191{
192 struct ath_buf *bf;
193 struct ath_rx_edma *rx_edma;
194 struct sk_buff *skb;
195
196 rx_edma = &sc->rx.rx_edma[qtype];
197
198 while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
199 bf = SKB_CB_ATHBUF(skb);
200 BUG_ON(!bf);
201 list_add_tail(&bf->list, &sc->rx.rxbuf);
202 }
203}
204
205static void ath_rx_edma_cleanup(struct ath_softc *sc)
206{
207 struct ath_buf *bf;
208
209 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
210 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
211
212 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
213 if (bf->bf_mpdu)
214 dev_kfree_skb_any(bf->bf_mpdu);
215 }
216
217 INIT_LIST_HEAD(&sc->rx.rxbuf);
218
219 kfree(sc->rx.rx_bufptr);
220 sc->rx.rx_bufptr = NULL;
221}
222
223static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
224{
225 skb_queue_head_init(&rx_edma->rx_fifo);
226 skb_queue_head_init(&rx_edma->rx_buffers);
227 rx_edma->rx_fifo_hwsize = size;
228}
229
230static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
231{
232 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
233 struct ath_hw *ah = sc->sc_ah;
234 struct sk_buff *skb;
235 struct ath_buf *bf;
236 int error = 0, i;
237 u32 size;
238
Felix Fietkaub5c804752010-04-15 17:38:48 -0400239 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
240 ah->caps.rx_status_len);
241
242 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
243 ah->caps.rx_lp_qdepth);
244 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
245 ah->caps.rx_hp_qdepth);
246
247 size = sizeof(struct ath_buf) * nbufs;
248 bf = kzalloc(size, GFP_KERNEL);
249 if (!bf)
250 return -ENOMEM;
251
252 INIT_LIST_HEAD(&sc->rx.rxbuf);
253 sc->rx.rx_bufptr = bf;
254
255 for (i = 0; i < nbufs; i++, bf++) {
256 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
257 if (!skb) {
258 error = -ENOMEM;
259 goto rx_init_fail;
260 }
261
262 memset(skb->data, 0, common->rx_bufsize);
263 bf->bf_mpdu = skb;
264
265 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
266 common->rx_bufsize,
267 DMA_BIDIRECTIONAL);
268 if (unlikely(dma_mapping_error(sc->dev,
269 bf->bf_buf_addr))) {
270 dev_kfree_skb_any(skb);
271 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -0700272 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -0800273 ath_err(common,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400274 "dma_mapping_error() on RX init\n");
275 error = -ENOMEM;
276 goto rx_init_fail;
277 }
278
279 list_add_tail(&bf->list, &sc->rx.rxbuf);
280 }
281
282 return 0;
283
284rx_init_fail:
285 ath_rx_edma_cleanup(sc);
286 return error;
287}
288
289static void ath_edma_start_recv(struct ath_softc *sc)
290{
291 spin_lock_bh(&sc->rx.rxbuflock);
292
293 ath9k_hw_rxena(sc->sc_ah);
294
295 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
296 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
297
298 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
299 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
300
Felix Fietkaub5c804752010-04-15 17:38:48 -0400301 ath_opmode_init(sc);
302
Luis R. Rodriguez48a6a462010-09-16 15:12:28 -0400303 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
Luis R. Rodriguez7583c5502010-10-20 16:07:04 -0700304
305 spin_unlock_bh(&sc->rx.rxbuflock);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400306}
307
308static void ath_edma_stop_recv(struct ath_softc *sc)
309{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400310 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
311 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400312}
313
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700314int ath_rx_init(struct ath_softc *sc, int nbufs)
315{
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -0700316 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700317 struct sk_buff *skb;
318 struct ath_buf *bf;
319 int error = 0;
320
Luis R. Rodriguez4bdd1e92010-10-26 15:27:24 -0700321 spin_lock_init(&sc->sc_pcu_lock);
Sujith797fe5cb2009-03-30 15:28:45 +0530322 sc->sc_flags &= ~SC_OP_RXFLUSH;
323 spin_lock_init(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700324
Felix Fietkau0d955212011-01-26 18:23:27 +0100325 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
326 sc->sc_ah->caps.rx_status_len;
327
Felix Fietkaub5c804752010-04-15 17:38:48 -0400328 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
329 return ath_rx_edma_init(sc, nbufs);
330 } else {
Joe Perches226afe62010-12-02 19:12:37 -0800331 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
332 common->cachelsz, common->rx_bufsize);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700333
Felix Fietkaub5c804752010-04-15 17:38:48 -0400334 /* Initialize rx descriptors */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700335
Felix Fietkaub5c804752010-04-15 17:38:48 -0400336 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
Vasanthakumar Thiagarajan4adfcde2010-04-15 17:39:33 -0400337 "rx", nbufs, 1, 0);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400338 if (error != 0) {
Joe Perches38002762010-12-02 19:12:36 -0800339 ath_err(common,
340 "failed to allocate rx descriptors: %d\n",
341 error);
Sujith797fe5cb2009-03-30 15:28:45 +0530342 goto err;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700343 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400344
345 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
346 skb = ath_rxbuf_alloc(common, common->rx_bufsize,
347 GFP_KERNEL);
348 if (skb == NULL) {
349 error = -ENOMEM;
350 goto err;
351 }
352
353 bf->bf_mpdu = skb;
354 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
355 common->rx_bufsize,
356 DMA_FROM_DEVICE);
357 if (unlikely(dma_mapping_error(sc->dev,
358 bf->bf_buf_addr))) {
359 dev_kfree_skb_any(skb);
360 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -0700361 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -0800362 ath_err(common,
363 "dma_mapping_error() on RX init\n");
Felix Fietkaub5c804752010-04-15 17:38:48 -0400364 error = -ENOMEM;
365 goto err;
366 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400367 }
368 sc->rx.rxlink = NULL;
Sujith797fe5cb2009-03-30 15:28:45 +0530369 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700370
Sujith797fe5cb2009-03-30 15:28:45 +0530371err:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700372 if (error)
373 ath_rx_cleanup(sc);
374
375 return error;
376}
377
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700378void ath_rx_cleanup(struct ath_softc *sc)
379{
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -0800380 struct ath_hw *ah = sc->sc_ah;
381 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700382 struct sk_buff *skb;
383 struct ath_buf *bf;
384
Felix Fietkaub5c804752010-04-15 17:38:48 -0400385 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
386 ath_rx_edma_cleanup(sc);
387 return;
388 } else {
389 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
390 skb = bf->bf_mpdu;
391 if (skb) {
392 dma_unmap_single(sc->dev, bf->bf_buf_addr,
393 common->rx_bufsize,
394 DMA_FROM_DEVICE);
395 dev_kfree_skb(skb);
Ben Greear6cf9e992010-10-14 12:45:30 -0700396 bf->bf_buf_addr = 0;
397 bf->bf_mpdu = NULL;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400398 }
Luis R. Rodriguez051b9192009-03-23 18:25:01 -0400399 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700400
Felix Fietkaub5c804752010-04-15 17:38:48 -0400401 if (sc->rx.rxdma.dd_desc_len != 0)
402 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
403 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700404}
405
406/*
407 * Calculate the receive filter according to the
408 * operating mode and state:
409 *
410 * o always accept unicast, broadcast, and multicast traffic
411 * o maintain current state of phy error reception (the hal
412 * may enable phy error frames for noise immunity work)
413 * o probe request frames are accepted only when operating in
414 * hostap, adhoc, or monitor modes
415 * o enable promiscuous mode according to the interface state
416 * o accept beacons:
417 * - when operating in adhoc mode so the 802.11 layer creates
418 * node table entries for peers,
419 * - when operating in station mode for collecting rssi data when
420 * the station is otherwise quiet, or
421 * - when operating as a repeater so we see repeater-sta beacons
422 * - when scanning
423 */
424
425u32 ath_calcrxfilter(struct ath_softc *sc)
426{
427#define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
Sujith7dcfdcd2008-08-11 14:03:13 +0530428
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700429 u32 rfilt;
430
431 rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
432 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
433 | ATH9K_RX_FILTER_MCAST;
434
Jouni Malinen9c1d8e42010-10-13 17:29:31 +0300435 if (sc->rx.rxfilter & FIF_PROBE_REQ)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700436 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
437
Jouni Malinen217ba9d2009-03-10 10:55:50 +0200438 /*
439 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
440 * mode interface or when in monitor mode. AP mode does not need this
441 * since it receives all in-BSS frames anyway.
442 */
Felix Fietkau2e286942011-03-09 01:48:12 +0100443 if (sc->sc_ah->is_monitoring)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700444 rfilt |= ATH9K_RX_FILTER_PROM;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700445
Sujithd42c6b72009-02-04 08:10:22 +0530446 if (sc->rx.rxfilter & FIF_CONTROL)
447 rfilt |= ATH9K_RX_FILTER_CONTROL;
448
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530449 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
Ben Greearcfda6692010-09-14 12:00:22 -0700450 (sc->nvifs <= 1) &&
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530451 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
452 rfilt |= ATH9K_RX_FILTER_MYBEACON;
453 else
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700454 rfilt |= ATH9K_RX_FILTER_BEACON;
455
Felix Fietkau264bbec2011-04-07 19:24:23 +0200456 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
Senthil Balasubramanian66afad02009-09-18 15:06:07 +0530457 (sc->rx.rxfilter & FIF_PSPOLL))
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530458 rfilt |= ATH9K_RX_FILTER_PSPOLL;
Sujithbe0418a2008-11-18 09:05:55 +0530459
Sujith7ea310b2009-09-03 12:08:43 +0530460 if (conf_is_ht(&sc->hw->conf))
461 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
462
Felix Fietkau7545daf2011-01-24 19:23:16 +0100463 if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
Javier Cardona5eb6ba82009-08-20 19:12:07 -0700464 /* The following may also be needed for other older chips */
465 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
466 rfilt |= ATH9K_RX_FILTER_PROM;
Jouni Malinenb93bce22009-03-03 19:23:30 +0200467 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
468 }
469
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700470 return rfilt;
Sujith7dcfdcd2008-08-11 14:03:13 +0530471
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700472#undef RX_FILTER_PRESERVE
473}
474
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700475int ath_startrecv(struct ath_softc *sc)
476{
Sujithcbe61d82009-02-09 13:27:12 +0530477 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700478 struct ath_buf *bf, *tbf;
479
Felix Fietkaub5c804752010-04-15 17:38:48 -0400480 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
481 ath_edma_start_recv(sc);
482 return 0;
483 }
484
Sujithb77f4832008-12-07 21:44:03 +0530485 spin_lock_bh(&sc->rx.rxbuflock);
486 if (list_empty(&sc->rx.rxbuf))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700487 goto start_recv;
488
Sujithb77f4832008-12-07 21:44:03 +0530489 sc->rx.rxlink = NULL;
490 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700491 ath_rx_buf_link(sc, bf);
492 }
493
494 /* We could have deleted elements so the list may be empty now */
Sujithb77f4832008-12-07 21:44:03 +0530495 if (list_empty(&sc->rx.rxbuf))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700496 goto start_recv;
497
Sujithb77f4832008-12-07 21:44:03 +0530498 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700499 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
Sujithbe0418a2008-11-18 09:05:55 +0530500 ath9k_hw_rxena(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700501
502start_recv:
Sujithbe0418a2008-11-18 09:05:55 +0530503 ath_opmode_init(sc);
Luis R. Rodriguez48a6a462010-09-16 15:12:28 -0400504 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
Sujithbe0418a2008-11-18 09:05:55 +0530505
Luis R. Rodriguez7583c5502010-10-20 16:07:04 -0700506 spin_unlock_bh(&sc->rx.rxbuflock);
507
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700508 return 0;
509}
510
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700511bool ath_stoprecv(struct ath_softc *sc)
512{
Sujithcbe61d82009-02-09 13:27:12 +0530513 struct ath_hw *ah = sc->sc_ah;
Felix Fietkau5882da022011-04-08 20:13:18 +0200514 bool stopped, reset = false;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700515
Luis R. Rodriguez1e450282010-10-20 16:07:03 -0700516 spin_lock_bh(&sc->rx.rxbuflock);
Felix Fietkaud47844a2010-11-20 03:08:47 +0100517 ath9k_hw_abortpcurecv(ah);
Sujithbe0418a2008-11-18 09:05:55 +0530518 ath9k_hw_setrxfilter(ah, 0);
Felix Fietkau5882da022011-04-08 20:13:18 +0200519 stopped = ath9k_hw_stopdmarecv(ah, &reset);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400520
521 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
522 ath_edma_stop_recv(sc);
523 else
524 sc->rx.rxlink = NULL;
Luis R. Rodriguez1e450282010-10-20 16:07:03 -0700525 spin_unlock_bh(&sc->rx.rxbuflock);
Sujithbe0418a2008-11-18 09:05:55 +0530526
Rajkumar Manoharand5847472010-12-20 14:39:51 +0530527 if (!(ah->ah_flags & AH_UNPLUGGED) &&
528 unlikely(!stopped)) {
Ben Greeard7fd1b502010-12-06 13:13:07 -0800529 ath_err(ath9k_hw_common(sc->sc_ah),
530 "Could not stop RX, we could be "
531 "confusing the DMA engine when we start RX up\n");
532 ATH_DBG_WARN_ON_ONCE(!stopped);
533 }
Felix Fietkau2232d312011-04-15 00:41:43 +0200534 return stopped && !reset;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700535}
536
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700537void ath_flushrecv(struct ath_softc *sc)
538{
Sujith98deeea2008-08-11 14:05:46 +0530539 sc->sc_flags |= SC_OP_RXFLUSH;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400540 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
541 ath_rx_tasklet(sc, 1, true);
542 ath_rx_tasklet(sc, 1, false);
Sujith98deeea2008-08-11 14:05:46 +0530543 sc->sc_flags &= ~SC_OP_RXFLUSH;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700544}
545
Jouni Malinencc659652009-05-14 21:28:48 +0300546static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
547{
548 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
549 struct ieee80211_mgmt *mgmt;
550 u8 *pos, *end, id, elen;
551 struct ieee80211_tim_ie *tim;
552
553 mgmt = (struct ieee80211_mgmt *)skb->data;
554 pos = mgmt->u.beacon.variable;
555 end = skb->data + skb->len;
556
557 while (pos + 2 < end) {
558 id = *pos++;
559 elen = *pos++;
560 if (pos + elen > end)
561 break;
562
563 if (id == WLAN_EID_TIM) {
564 if (elen < sizeof(*tim))
565 break;
566 tim = (struct ieee80211_tim_ie *) pos;
567 if (tim->dtim_count != 0)
568 break;
569 return tim->bitmap_ctrl & 0x01;
570 }
571
572 pos += elen;
573 }
574
575 return false;
576}
577
Jouni Malinencc659652009-05-14 21:28:48 +0300578static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
579{
580 struct ieee80211_mgmt *mgmt;
Luis R. Rodriguez15107182009-09-10 09:22:37 -0700581 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Jouni Malinencc659652009-05-14 21:28:48 +0300582
583 if (skb->len < 24 + 8 + 2 + 2)
584 return;
585
586 mgmt = (struct ieee80211_mgmt *)skb->data;
Ben Greear48014162011-01-15 19:13:48 +0000587 if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
588 /* TODO: This doesn't work well if you have stations
589 * associated to two different APs because curbssid
590 * is just the last AP that any of the stations associated
591 * with.
592 */
Jouni Malinencc659652009-05-14 21:28:48 +0300593 return; /* not from our current AP */
Ben Greear48014162011-01-15 19:13:48 +0000594 }
Jouni Malinencc659652009-05-14 21:28:48 +0300595
Sujith1b04b932010-01-08 10:36:05 +0530596 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
Gabor Juhos293dc5d2009-06-19 12:17:48 +0200597
Sujith1b04b932010-01-08 10:36:05 +0530598 if (sc->ps_flags & PS_BEACON_SYNC) {
599 sc->ps_flags &= ~PS_BEACON_SYNC;
Joe Perches226afe62010-12-02 19:12:37 -0800600 ath_dbg(common, ATH_DBG_PS,
601 "Reconfigure Beacon timers based on timestamp from the AP\n");
Rajkumar Manoharan99e4d432011-04-04 22:56:19 +0530602 ath_set_beacon(sc);
Rajkumar Manoharandeb75182011-05-06 18:27:46 +0530603 sc->ps_flags &= ~PS_TSFOOR_SYNC;
Jouni Malinenccdfeab2009-05-20 21:59:08 +0300604 }
605
Jouni Malinencc659652009-05-14 21:28:48 +0300606 if (ath_beacon_dtim_pending_cab(skb)) {
607 /*
608 * Remain awake waiting for buffered broadcast/multicast
Gabor Juhos58f5fff2009-06-17 20:53:20 +0200609 * frames. If the last broadcast/multicast frame is not
610 * received properly, the next beacon frame will work as
611 * a backup trigger for returning into NETWORK SLEEP state,
612 * so we are waiting for it as well.
Jouni Malinencc659652009-05-14 21:28:48 +0300613 */
Joe Perches226afe62010-12-02 19:12:37 -0800614 ath_dbg(common, ATH_DBG_PS,
615 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
Sujith1b04b932010-01-08 10:36:05 +0530616 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
Jouni Malinencc659652009-05-14 21:28:48 +0300617 return;
618 }
619
Sujith1b04b932010-01-08 10:36:05 +0530620 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
Jouni Malinencc659652009-05-14 21:28:48 +0300621 /*
622 * This can happen if a broadcast frame is dropped or the AP
623 * fails to send a frame indicating that all CAB frames have
624 * been delivered.
625 */
Sujith1b04b932010-01-08 10:36:05 +0530626 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
Joe Perches226afe62010-12-02 19:12:37 -0800627 ath_dbg(common, ATH_DBG_PS,
628 "PS wait for CAB frames timed out\n");
Jouni Malinencc659652009-05-14 21:28:48 +0300629 }
Jouni Malinencc659652009-05-14 21:28:48 +0300630}
631
632static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
633{
634 struct ieee80211_hdr *hdr;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700635 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Jouni Malinencc659652009-05-14 21:28:48 +0300636
637 hdr = (struct ieee80211_hdr *)skb->data;
638
639 /* Process Beacon and CAB receive in PS state */
Vasanthakumar Thiagarajanededf1f2010-05-22 23:58:13 -0700640 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
641 && ieee80211_is_beacon(hdr->frame_control))
Jouni Malinencc659652009-05-14 21:28:48 +0300642 ath_rx_ps_beacon(sc, skb);
Sujith1b04b932010-01-08 10:36:05 +0530643 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
Jouni Malinencc659652009-05-14 21:28:48 +0300644 (ieee80211_is_data(hdr->frame_control) ||
645 ieee80211_is_action(hdr->frame_control)) &&
646 is_multicast_ether_addr(hdr->addr1) &&
647 !ieee80211_has_moredata(hdr->frame_control)) {
Jouni Malinencc659652009-05-14 21:28:48 +0300648 /*
649 * No more broadcast/multicast frames to be received at this
650 * point.
651 */
Senthil Balasubramanian3fac6df2010-09-16 15:12:35 -0400652 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
Joe Perches226afe62010-12-02 19:12:37 -0800653 ath_dbg(common, ATH_DBG_PS,
654 "All PS CAB frames received, back to sleep\n");
Sujith1b04b932010-01-08 10:36:05 +0530655 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
Jouni Malinen9a23f9c2009-05-19 17:01:38 +0300656 !is_multicast_ether_addr(hdr->addr1) &&
657 !ieee80211_has_morefrags(hdr->frame_control)) {
Sujith1b04b932010-01-08 10:36:05 +0530658 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
Joe Perches226afe62010-12-02 19:12:37 -0800659 ath_dbg(common, ATH_DBG_PS,
660 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
Sujith1b04b932010-01-08 10:36:05 +0530661 sc->ps_flags & (PS_WAIT_FOR_BEACON |
662 PS_WAIT_FOR_CAB |
663 PS_WAIT_FOR_PSPOLL_DATA |
664 PS_WAIT_FOR_TX_ACK));
Jouni Malinencc659652009-05-14 21:28:48 +0300665 }
666}
667
Felix Fietkaub5c804752010-04-15 17:38:48 -0400668static bool ath_edma_get_buffers(struct ath_softc *sc,
669 enum ath9k_rx_qtype qtype)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700670{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400671 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
672 struct ath_hw *ah = sc->sc_ah;
673 struct ath_common *common = ath9k_hw_common(ah);
674 struct sk_buff *skb;
Sujithbe0418a2008-11-18 09:05:55 +0530675 struct ath_buf *bf;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400676 int ret;
677
678 skb = skb_peek(&rx_edma->rx_fifo);
679 if (!skb)
680 return false;
681
682 bf = SKB_CB_ATHBUF(skb);
683 BUG_ON(!bf);
684
Ming Leice9426d2010-05-15 18:25:40 +0800685 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400686 common->rx_bufsize, DMA_FROM_DEVICE);
687
688 ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
Ming Leice9426d2010-05-15 18:25:40 +0800689 if (ret == -EINPROGRESS) {
690 /*let device gain the buffer again*/
691 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
692 common->rx_bufsize, DMA_FROM_DEVICE);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400693 return false;
Ming Leice9426d2010-05-15 18:25:40 +0800694 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400695
696 __skb_unlink(skb, &rx_edma->rx_fifo);
697 if (ret == -EINVAL) {
698 /* corrupt descriptor, skip this one and the following one */
699 list_add_tail(&bf->list, &sc->rx.rxbuf);
700 ath_rx_edma_buf_link(sc, qtype);
701 skb = skb_peek(&rx_edma->rx_fifo);
702 if (!skb)
703 return true;
704
705 bf = SKB_CB_ATHBUF(skb);
706 BUG_ON(!bf);
707
708 __skb_unlink(skb, &rx_edma->rx_fifo);
709 list_add_tail(&bf->list, &sc->rx.rxbuf);
710 ath_rx_edma_buf_link(sc, qtype);
Vasanthakumar Thiagarajan083e3e82010-05-10 19:41:34 -0700711 return true;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400712 }
713 skb_queue_tail(&rx_edma->rx_buffers, skb);
714
715 return true;
716}
717
718static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
719 struct ath_rx_status *rs,
720 enum ath9k_rx_qtype qtype)
721{
722 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
723 struct sk_buff *skb;
724 struct ath_buf *bf;
725
726 while (ath_edma_get_buffers(sc, qtype));
727 skb = __skb_dequeue(&rx_edma->rx_buffers);
728 if (!skb)
729 return NULL;
730
731 bf = SKB_CB_ATHBUF(skb);
732 ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
733 return bf;
734}
735
736static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
737 struct ath_rx_status *rs)
738{
739 struct ath_hw *ah = sc->sc_ah;
740 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700741 struct ath_desc *ds;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400742 struct ath_buf *bf;
743 int ret;
744
745 if (list_empty(&sc->rx.rxbuf)) {
746 sc->rx.rxlink = NULL;
747 return NULL;
748 }
749
750 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
751 ds = bf->bf_desc;
752
753 /*
754 * Must provide the virtual address of the current
755 * descriptor, the physical address, and the virtual
756 * address of the next descriptor in the h/w chain.
757 * This allows the HAL to look ahead to see if the
758 * hardware is done with a descriptor by checking the
759 * done bit in the following descriptor and the address
760 * of the current descriptor the DMA engine is working
761 * on. All this is necessary because of our use of
762 * a self-linked list to avoid rx overruns.
763 */
764 ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
765 if (ret == -EINPROGRESS) {
766 struct ath_rx_status trs;
767 struct ath_buf *tbf;
768 struct ath_desc *tds;
769
770 memset(&trs, 0, sizeof(trs));
771 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
772 sc->rx.rxlink = NULL;
773 return NULL;
774 }
775
776 tbf = list_entry(bf->list.next, struct ath_buf, list);
777
778 /*
779 * On some hardware the descriptor status words could
780 * get corrupted, including the done bit. Because of
781 * this, check if the next descriptor's done bit is
782 * set or not.
783 *
784 * If the next descriptor's done bit is set, the current
785 * descriptor has been corrupted. Force s/w to discard
786 * this descriptor and continue...
787 */
788
789 tds = tbf->bf_desc;
790 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
791 if (ret == -EINPROGRESS)
792 return NULL;
793 }
794
795 if (!bf->bf_mpdu)
796 return bf;
797
798 /*
799 * Synchronize the DMA transfer with CPU before
800 * 1. accessing the frame
801 * 2. requeueing the same buffer to h/w
802 */
Ming Leice9426d2010-05-15 18:25:40 +0800803 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400804 common->rx_bufsize,
805 DMA_FROM_DEVICE);
806
807 return bf;
808}
809
Sujithd4357002010-05-20 15:34:38 +0530810/* Assumes you've already done the endian to CPU conversion */
811static bool ath9k_rx_accept(struct ath_common *common,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700812 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530813 struct ieee80211_rx_status *rxs,
814 struct ath_rx_status *rx_stats,
815 bool *decrypt_error)
816{
Felix Fietkau66760ea2011-07-13 23:35:05 +0800817 bool is_mc, is_valid_tkip, strip_mic, mic_error;
Sujithd4357002010-05-20 15:34:38 +0530818 struct ath_hw *ah = common->ah;
Sujithd4357002010-05-20 15:34:38 +0530819 __le16 fc;
Vasanthakumar Thiagarajanb7b1b512010-05-20 14:34:48 -0700820 u8 rx_status_len = ah->caps.rx_status_len;
Sujithd4357002010-05-20 15:34:38 +0530821
Sujithd4357002010-05-20 15:34:38 +0530822 fc = hdr->frame_control;
823
Felix Fietkau66760ea2011-07-13 23:35:05 +0800824 is_mc = !!is_multicast_ether_addr(hdr->addr1);
825 is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
826 test_bit(rx_stats->rs_keyix, common->tkip_keymap);
827 strip_mic = is_valid_tkip && !(rx_stats->rs_status &
828 (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC));
829
Sujithd4357002010-05-20 15:34:38 +0530830 if (!rx_stats->rs_datalen)
831 return false;
832 /*
833 * rs_status follows rs_datalen so if rs_datalen is too large
834 * we can take a hint that hardware corrupted it, so ignore
835 * those frames.
836 */
Vasanthakumar Thiagarajanb7b1b512010-05-20 14:34:48 -0700837 if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
Sujithd4357002010-05-20 15:34:38 +0530838 return false;
839
Felix Fietkau0d955212011-01-26 18:23:27 +0100840 /* Only use error bits from the last fragment */
Sujithd4357002010-05-20 15:34:38 +0530841 if (rx_stats->rs_more)
Felix Fietkau0d955212011-01-26 18:23:27 +0100842 return true;
Sujithd4357002010-05-20 15:34:38 +0530843
Felix Fietkau66760ea2011-07-13 23:35:05 +0800844 mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
845 !ieee80211_has_morefrags(fc) &&
846 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
847 (rx_stats->rs_status & ATH9K_RXERR_MIC);
848
Sujithd4357002010-05-20 15:34:38 +0530849 /*
850 * The rx_stats->rs_status will not be set until the end of the
851 * chained descriptors so it can be ignored if rs_more is set. The
852 * rs_more will be false at the last element of the chained
853 * descriptors.
854 */
855 if (rx_stats->rs_status != 0) {
Felix Fietkau66760ea2011-07-13 23:35:05 +0800856 if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
Sujithd4357002010-05-20 15:34:38 +0530857 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
Felix Fietkau66760ea2011-07-13 23:35:05 +0800858 mic_error = false;
859 }
Sujithd4357002010-05-20 15:34:38 +0530860 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
861 return false;
862
863 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
864 *decrypt_error = true;
Felix Fietkau66760ea2011-07-13 23:35:05 +0800865 mic_error = false;
Sujithd4357002010-05-20 15:34:38 +0530866 }
Felix Fietkau66760ea2011-07-13 23:35:05 +0800867
Sujithd4357002010-05-20 15:34:38 +0530868 /*
869 * Reject error frames with the exception of
870 * decryption and MIC failures. For monitor mode,
871 * we also ignore the CRC error.
872 */
Rajkumar Manoharan5f841b42010-10-27 18:31:15 +0530873 if (ah->is_monitoring) {
Sujithd4357002010-05-20 15:34:38 +0530874 if (rx_stats->rs_status &
875 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
876 ATH9K_RXERR_CRC))
877 return false;
878 } else {
879 if (rx_stats->rs_status &
880 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
881 return false;
882 }
883 }
884 }
Felix Fietkau66760ea2011-07-13 23:35:05 +0800885
886 /*
887 * For unicast frames the MIC error bit can have false positives,
888 * so all MIC error reports need to be validated in software.
889 * False negatives are not common, so skip software verification
890 * if the hardware considers the MIC valid.
891 */
892 if (strip_mic)
893 rxs->flag |= RX_FLAG_MMIC_STRIPPED;
894 else if (is_mc && mic_error)
895 rxs->flag |= RX_FLAG_MMIC_ERROR;
896
Sujithd4357002010-05-20 15:34:38 +0530897 return true;
898}
899
900static int ath9k_process_rate(struct ath_common *common,
901 struct ieee80211_hw *hw,
902 struct ath_rx_status *rx_stats,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700903 struct ieee80211_rx_status *rxs)
Sujithd4357002010-05-20 15:34:38 +0530904{
905 struct ieee80211_supported_band *sband;
906 enum ieee80211_band band;
907 unsigned int i = 0;
908
909 band = hw->conf.channel->band;
910 sband = hw->wiphy->bands[band];
911
912 if (rx_stats->rs_rate & 0x80) {
913 /* HT rate */
914 rxs->flag |= RX_FLAG_HT;
915 if (rx_stats->rs_flags & ATH9K_RX_2040)
916 rxs->flag |= RX_FLAG_40MHZ;
917 if (rx_stats->rs_flags & ATH9K_RX_GI)
918 rxs->flag |= RX_FLAG_SHORT_GI;
919 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
920 return 0;
921 }
922
923 for (i = 0; i < sband->n_bitrates; i++) {
924 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
925 rxs->rate_idx = i;
926 return 0;
927 }
928 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
929 rxs->flag |= RX_FLAG_SHORTPRE;
930 rxs->rate_idx = i;
931 return 0;
932 }
933 }
934
935 /*
936 * No valid hardware bitrate found -- we should not get here
937 * because hardware has already validated this frame as OK.
938 */
Joe Perches226afe62010-12-02 19:12:37 -0800939 ath_dbg(common, ATH_DBG_XMIT,
940 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
941 rx_stats->rs_rate);
Sujithd4357002010-05-20 15:34:38 +0530942
943 return -EINVAL;
944}
945
946static void ath9k_process_rssi(struct ath_common *common,
947 struct ieee80211_hw *hw,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700948 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530949 struct ath_rx_status *rx_stats)
950{
Felix Fietkau9ac586152011-01-24 19:23:18 +0100951 struct ath_softc *sc = hw->priv;
Sujithd4357002010-05-20 15:34:38 +0530952 struct ath_hw *ah = common->ah;
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200953 int last_rssi;
Sujithd4357002010-05-20 15:34:38 +0530954 __le16 fc;
955
Rajkumar Manoharan2b892a92011-05-09 19:11:28 +0530956 if ((ah->opmode != NL80211_IFTYPE_STATION) &&
957 (ah->opmode != NL80211_IFTYPE_ADHOC))
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200958 return;
959
Sujithd4357002010-05-20 15:34:38 +0530960 fc = hdr->frame_control;
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200961 if (!ieee80211_is_beacon(fc) ||
Ben Greear48014162011-01-15 19:13:48 +0000962 compare_ether_addr(hdr->addr3, common->curbssid)) {
963 /* TODO: This doesn't work well if you have stations
964 * associated to two different APs because curbssid
965 * is just the last AP that any of the stations associated
966 * with.
967 */
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200968 return;
Ben Greear48014162011-01-15 19:13:48 +0000969 }
Sujithd4357002010-05-20 15:34:38 +0530970
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200971 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
Felix Fietkau9ac586152011-01-24 19:23:18 +0100972 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
Ben Greear686b9cb2010-09-23 09:44:36 -0700973
Felix Fietkau9ac586152011-01-24 19:23:18 +0100974 last_rssi = sc->last_rssi;
Sujithd4357002010-05-20 15:34:38 +0530975 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
976 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
977 ATH_RSSI_EP_MULTIPLIER);
978 if (rx_stats->rs_rssi < 0)
979 rx_stats->rs_rssi = 0;
980
981 /* Update Beacon RSSI, this is used by ANI. */
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200982 ah->stats.avgbrssi = rx_stats->rs_rssi;
Sujithd4357002010-05-20 15:34:38 +0530983}
984
985/*
986 * For Decrypt or Demic errors, we only mark packet status here and always push
987 * up the frame up to let mac80211 handle the actual error case, be it no
988 * decryption key or real decryption error. This let us keep statistics there.
989 */
990static int ath9k_rx_skb_preprocess(struct ath_common *common,
991 struct ieee80211_hw *hw,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700992 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530993 struct ath_rx_status *rx_stats,
994 struct ieee80211_rx_status *rx_status,
995 bool *decrypt_error)
996{
Sujithd4357002010-05-20 15:34:38 +0530997 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
998
999 /*
1000 * everything but the rate is checked here, the rate check is done
1001 * separately to avoid doing two lookups for a rate for each frame.
1002 */
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -07001003 if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
Sujithd4357002010-05-20 15:34:38 +05301004 return -EINVAL;
1005
Felix Fietkau0d955212011-01-26 18:23:27 +01001006 /* Only use status info from the last fragment */
1007 if (rx_stats->rs_more)
1008 return 0;
1009
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -07001010 ath9k_process_rssi(common, hw, hdr, rx_stats);
Sujithd4357002010-05-20 15:34:38 +05301011
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -07001012 if (ath9k_process_rate(common, hw, rx_stats, rx_status))
Sujithd4357002010-05-20 15:34:38 +05301013 return -EINVAL;
1014
Sujithd4357002010-05-20 15:34:38 +05301015 rx_status->band = hw->conf.channel->band;
1016 rx_status->freq = hw->conf.channel->center_freq;
1017 rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1018 rx_status->antenna = rx_stats->rs_antenna;
Johannes Berg6ebacbb2011-02-23 15:06:08 +01001019 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
Sujithd4357002010-05-20 15:34:38 +05301020
1021 return 0;
1022}
1023
1024static void ath9k_rx_skb_postprocess(struct ath_common *common,
1025 struct sk_buff *skb,
1026 struct ath_rx_status *rx_stats,
1027 struct ieee80211_rx_status *rxs,
1028 bool decrypt_error)
1029{
1030 struct ath_hw *ah = common->ah;
1031 struct ieee80211_hdr *hdr;
1032 int hdrlen, padpos, padsize;
1033 u8 keyix;
1034 __le16 fc;
1035
1036 /* see if any padding is done by the hw and remove it */
1037 hdr = (struct ieee80211_hdr *) skb->data;
1038 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1039 fc = hdr->frame_control;
1040 padpos = ath9k_cmn_padpos(hdr->frame_control);
1041
1042 /* The MAC header is padded to have 32-bit boundary if the
1043 * packet payload is non-zero. The general calculation for
1044 * padsize would take into account odd header lengths:
1045 * padsize = (4 - padpos % 4) % 4; However, since only
1046 * even-length headers are used, padding can only be 0 or 2
1047 * bytes and we can optimize this a bit. In addition, we must
1048 * not try to remove padding from short control frames that do
1049 * not have payload. */
1050 padsize = padpos & 3;
1051 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1052 memmove(skb->data + padsize, skb->data, padpos);
1053 skb_pull(skb, padsize);
1054 }
1055
1056 keyix = rx_stats->rs_keyix;
1057
1058 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1059 ieee80211_has_protected(fc)) {
1060 rxs->flag |= RX_FLAG_DECRYPTED;
1061 } else if (ieee80211_has_protected(fc)
1062 && !decrypt_error && skb->len >= hdrlen + 4) {
1063 keyix = skb->data[hdrlen + 3] >> 6;
1064
1065 if (test_bit(keyix, common->keymap))
1066 rxs->flag |= RX_FLAG_DECRYPTED;
1067 }
1068 if (ah->sw_mgmt_crypto &&
1069 (rxs->flag & RX_FLAG_DECRYPTED) &&
1070 ieee80211_is_mgmt(fc))
1071 /* Use software decrypt for management frames. */
1072 rxs->flag &= ~RX_FLAG_DECRYPTED;
1073}
Felix Fietkaub5c804752010-04-15 17:38:48 -04001074
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001075static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1076 struct ath_hw_antcomb_conf ant_conf,
1077 int main_rssi_avg)
1078{
1079 antcomb->quick_scan_cnt = 0;
1080
1081 if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1082 antcomb->rssi_lna2 = main_rssi_avg;
1083 else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1084 antcomb->rssi_lna1 = main_rssi_avg;
1085
1086 switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001087 case 0x10: /* LNA2 A-B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001088 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1089 antcomb->first_quick_scan_conf =
1090 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1091 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1092 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001093 case 0x20: /* LNA1 A-B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001094 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1095 antcomb->first_quick_scan_conf =
1096 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1097 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1098 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001099 case 0x21: /* LNA1 LNA2 */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001100 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1101 antcomb->first_quick_scan_conf =
1102 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1103 antcomb->second_quick_scan_conf =
1104 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1105 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001106 case 0x12: /* LNA2 LNA1 */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001107 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1108 antcomb->first_quick_scan_conf =
1109 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1110 antcomb->second_quick_scan_conf =
1111 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1112 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001113 case 0x13: /* LNA2 A+B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001114 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1115 antcomb->first_quick_scan_conf =
1116 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1117 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1118 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001119 case 0x23: /* LNA1 A+B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001120 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1121 antcomb->first_quick_scan_conf =
1122 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1123 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1124 break;
1125 default:
1126 break;
1127 }
1128}
1129
1130static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1131 struct ath_hw_antcomb_conf *div_ant_conf,
1132 int main_rssi_avg, int alt_rssi_avg,
1133 int alt_ratio)
1134{
1135 /* alt_good */
1136 switch (antcomb->quick_scan_cnt) {
1137 case 0:
1138 /* set alt to main, and alt to first conf */
1139 div_ant_conf->main_lna_conf = antcomb->main_conf;
1140 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1141 break;
1142 case 1:
1143 /* set alt to main, and alt to first conf */
1144 div_ant_conf->main_lna_conf = antcomb->main_conf;
1145 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1146 antcomb->rssi_first = main_rssi_avg;
1147 antcomb->rssi_second = alt_rssi_avg;
1148
1149 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1150 /* main is LNA1 */
1151 if (ath_is_alt_ant_ratio_better(alt_ratio,
1152 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1153 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1154 main_rssi_avg, alt_rssi_avg,
1155 antcomb->total_pkt_count))
1156 antcomb->first_ratio = true;
1157 else
1158 antcomb->first_ratio = false;
1159 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1160 if (ath_is_alt_ant_ratio_better(alt_ratio,
1161 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1162 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1163 main_rssi_avg, alt_rssi_avg,
1164 antcomb->total_pkt_count))
1165 antcomb->first_ratio = true;
1166 else
1167 antcomb->first_ratio = false;
1168 } else {
1169 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1170 (alt_rssi_avg > main_rssi_avg +
1171 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1172 (alt_rssi_avg > main_rssi_avg)) &&
1173 (antcomb->total_pkt_count > 50))
1174 antcomb->first_ratio = true;
1175 else
1176 antcomb->first_ratio = false;
1177 }
1178 break;
1179 case 2:
1180 antcomb->alt_good = false;
1181 antcomb->scan_not_start = false;
1182 antcomb->scan = false;
1183 antcomb->rssi_first = main_rssi_avg;
1184 antcomb->rssi_third = alt_rssi_avg;
1185
1186 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1187 antcomb->rssi_lna1 = alt_rssi_avg;
1188 else if (antcomb->second_quick_scan_conf ==
1189 ATH_ANT_DIV_COMB_LNA2)
1190 antcomb->rssi_lna2 = alt_rssi_avg;
1191 else if (antcomb->second_quick_scan_conf ==
1192 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1193 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1194 antcomb->rssi_lna2 = main_rssi_avg;
1195 else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1196 antcomb->rssi_lna1 = main_rssi_avg;
1197 }
1198
1199 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1200 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1201 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1202 else
1203 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1204
1205 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1206 if (ath_is_alt_ant_ratio_better(alt_ratio,
1207 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1208 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1209 main_rssi_avg, alt_rssi_avg,
1210 antcomb->total_pkt_count))
1211 antcomb->second_ratio = true;
1212 else
1213 antcomb->second_ratio = false;
1214 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1215 if (ath_is_alt_ant_ratio_better(alt_ratio,
1216 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1217 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1218 main_rssi_avg, alt_rssi_avg,
1219 antcomb->total_pkt_count))
1220 antcomb->second_ratio = true;
1221 else
1222 antcomb->second_ratio = false;
1223 } else {
1224 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1225 (alt_rssi_avg > main_rssi_avg +
1226 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1227 (alt_rssi_avg > main_rssi_avg)) &&
1228 (antcomb->total_pkt_count > 50))
1229 antcomb->second_ratio = true;
1230 else
1231 antcomb->second_ratio = false;
1232 }
1233
1234 /* set alt to the conf with maximun ratio */
1235 if (antcomb->first_ratio && antcomb->second_ratio) {
1236 if (antcomb->rssi_second > antcomb->rssi_third) {
1237 /* first alt*/
1238 if ((antcomb->first_quick_scan_conf ==
1239 ATH_ANT_DIV_COMB_LNA1) ||
1240 (antcomb->first_quick_scan_conf ==
1241 ATH_ANT_DIV_COMB_LNA2))
1242 /* Set alt LNA1 or LNA2*/
1243 if (div_ant_conf->main_lna_conf ==
1244 ATH_ANT_DIV_COMB_LNA2)
1245 div_ant_conf->alt_lna_conf =
1246 ATH_ANT_DIV_COMB_LNA1;
1247 else
1248 div_ant_conf->alt_lna_conf =
1249 ATH_ANT_DIV_COMB_LNA2;
1250 else
1251 /* Set alt to A+B or A-B */
1252 div_ant_conf->alt_lna_conf =
1253 antcomb->first_quick_scan_conf;
1254 } else if ((antcomb->second_quick_scan_conf ==
1255 ATH_ANT_DIV_COMB_LNA1) ||
1256 (antcomb->second_quick_scan_conf ==
1257 ATH_ANT_DIV_COMB_LNA2)) {
1258 /* Set alt LNA1 or LNA2 */
1259 if (div_ant_conf->main_lna_conf ==
1260 ATH_ANT_DIV_COMB_LNA2)
1261 div_ant_conf->alt_lna_conf =
1262 ATH_ANT_DIV_COMB_LNA1;
1263 else
1264 div_ant_conf->alt_lna_conf =
1265 ATH_ANT_DIV_COMB_LNA2;
1266 } else {
1267 /* Set alt to A+B or A-B */
1268 div_ant_conf->alt_lna_conf =
1269 antcomb->second_quick_scan_conf;
1270 }
1271 } else if (antcomb->first_ratio) {
1272 /* first alt */
1273 if ((antcomb->first_quick_scan_conf ==
1274 ATH_ANT_DIV_COMB_LNA1) ||
1275 (antcomb->first_quick_scan_conf ==
1276 ATH_ANT_DIV_COMB_LNA2))
1277 /* Set alt LNA1 or LNA2 */
1278 if (div_ant_conf->main_lna_conf ==
1279 ATH_ANT_DIV_COMB_LNA2)
1280 div_ant_conf->alt_lna_conf =
1281 ATH_ANT_DIV_COMB_LNA1;
1282 else
1283 div_ant_conf->alt_lna_conf =
1284 ATH_ANT_DIV_COMB_LNA2;
1285 else
1286 /* Set alt to A+B or A-B */
1287 div_ant_conf->alt_lna_conf =
1288 antcomb->first_quick_scan_conf;
1289 } else if (antcomb->second_ratio) {
1290 /* second alt */
1291 if ((antcomb->second_quick_scan_conf ==
1292 ATH_ANT_DIV_COMB_LNA1) ||
1293 (antcomb->second_quick_scan_conf ==
1294 ATH_ANT_DIV_COMB_LNA2))
1295 /* Set alt LNA1 or LNA2 */
1296 if (div_ant_conf->main_lna_conf ==
1297 ATH_ANT_DIV_COMB_LNA2)
1298 div_ant_conf->alt_lna_conf =
1299 ATH_ANT_DIV_COMB_LNA1;
1300 else
1301 div_ant_conf->alt_lna_conf =
1302 ATH_ANT_DIV_COMB_LNA2;
1303 else
1304 /* Set alt to A+B or A-B */
1305 div_ant_conf->alt_lna_conf =
1306 antcomb->second_quick_scan_conf;
1307 } else {
1308 /* main is largest */
1309 if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1310 (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1311 /* Set alt LNA1 or LNA2 */
1312 if (div_ant_conf->main_lna_conf ==
1313 ATH_ANT_DIV_COMB_LNA2)
1314 div_ant_conf->alt_lna_conf =
1315 ATH_ANT_DIV_COMB_LNA1;
1316 else
1317 div_ant_conf->alt_lna_conf =
1318 ATH_ANT_DIV_COMB_LNA2;
1319 else
1320 /* Set alt to A+B or A-B */
1321 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1322 }
1323 break;
1324 default:
1325 break;
1326 }
1327}
1328
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301329static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1330 struct ath_ant_comb *antcomb, int alt_ratio)
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001331{
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301332 if (ant_conf->div_group == 0) {
1333 /* Adjust the fast_div_bias based on main and alt lna conf */
1334 switch ((ant_conf->main_lna_conf << 4) |
1335 ant_conf->alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001336 case 0x01: /* A-B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301337 ant_conf->fast_div_bias = 0x3b;
1338 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001339 case 0x02: /* A-B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301340 ant_conf->fast_div_bias = 0x3d;
1341 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001342 case 0x03: /* A-B A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301343 ant_conf->fast_div_bias = 0x1;
1344 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001345 case 0x10: /* LNA2 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301346 ant_conf->fast_div_bias = 0x7;
1347 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001348 case 0x12: /* LNA2 LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301349 ant_conf->fast_div_bias = 0x2;
1350 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001351 case 0x13: /* LNA2 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301352 ant_conf->fast_div_bias = 0x7;
1353 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001354 case 0x20: /* LNA1 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301355 ant_conf->fast_div_bias = 0x6;
1356 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001357 case 0x21: /* LNA1 LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301358 ant_conf->fast_div_bias = 0x0;
1359 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001360 case 0x23: /* LNA1 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301361 ant_conf->fast_div_bias = 0x6;
1362 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001363 case 0x30: /* A+B A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301364 ant_conf->fast_div_bias = 0x1;
1365 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001366 case 0x31: /* A+B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301367 ant_conf->fast_div_bias = 0x3b;
1368 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001369 case 0x32: /* A+B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301370 ant_conf->fast_div_bias = 0x3d;
1371 break;
1372 default:
1373 break;
1374 }
Gabor Juhose7ef5bc2011-06-21 11:23:46 +02001375 } else if (ant_conf->div_group == 1) {
1376 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1377 switch ((ant_conf->main_lna_conf << 4) |
1378 ant_conf->alt_lna_conf) {
1379 case 0x01: /* A-B LNA2 */
1380 ant_conf->fast_div_bias = 0x1;
1381 ant_conf->main_gaintb = 0;
1382 ant_conf->alt_gaintb = 0;
1383 break;
1384 case 0x02: /* A-B LNA1 */
1385 ant_conf->fast_div_bias = 0x1;
1386 ant_conf->main_gaintb = 0;
1387 ant_conf->alt_gaintb = 0;
1388 break;
1389 case 0x03: /* A-B A+B */
1390 ant_conf->fast_div_bias = 0x1;
1391 ant_conf->main_gaintb = 0;
1392 ant_conf->alt_gaintb = 0;
1393 break;
1394 case 0x10: /* LNA2 A-B */
1395 if (!(antcomb->scan) &&
1396 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1397 ant_conf->fast_div_bias = 0x3f;
1398 else
1399 ant_conf->fast_div_bias = 0x1;
1400 ant_conf->main_gaintb = 0;
1401 ant_conf->alt_gaintb = 0;
1402 break;
1403 case 0x12: /* LNA2 LNA1 */
1404 ant_conf->fast_div_bias = 0x1;
1405 ant_conf->main_gaintb = 0;
1406 ant_conf->alt_gaintb = 0;
1407 break;
1408 case 0x13: /* LNA2 A+B */
1409 if (!(antcomb->scan) &&
1410 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1411 ant_conf->fast_div_bias = 0x3f;
1412 else
1413 ant_conf->fast_div_bias = 0x1;
1414 ant_conf->main_gaintb = 0;
1415 ant_conf->alt_gaintb = 0;
1416 break;
1417 case 0x20: /* LNA1 A-B */
1418 if (!(antcomb->scan) &&
1419 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1420 ant_conf->fast_div_bias = 0x3f;
1421 else
1422 ant_conf->fast_div_bias = 0x1;
1423 ant_conf->main_gaintb = 0;
1424 ant_conf->alt_gaintb = 0;
1425 break;
1426 case 0x21: /* LNA1 LNA2 */
1427 ant_conf->fast_div_bias = 0x1;
1428 ant_conf->main_gaintb = 0;
1429 ant_conf->alt_gaintb = 0;
1430 break;
1431 case 0x23: /* LNA1 A+B */
1432 if (!(antcomb->scan) &&
1433 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1434 ant_conf->fast_div_bias = 0x3f;
1435 else
1436 ant_conf->fast_div_bias = 0x1;
1437 ant_conf->main_gaintb = 0;
1438 ant_conf->alt_gaintb = 0;
1439 break;
1440 case 0x30: /* A+B A-B */
1441 ant_conf->fast_div_bias = 0x1;
1442 ant_conf->main_gaintb = 0;
1443 ant_conf->alt_gaintb = 0;
1444 break;
1445 case 0x31: /* A+B LNA2 */
1446 ant_conf->fast_div_bias = 0x1;
1447 ant_conf->main_gaintb = 0;
1448 ant_conf->alt_gaintb = 0;
1449 break;
1450 case 0x32: /* A+B LNA1 */
1451 ant_conf->fast_div_bias = 0x1;
1452 ant_conf->main_gaintb = 0;
1453 ant_conf->alt_gaintb = 0;
1454 break;
1455 default:
1456 break;
1457 }
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301458 } else if (ant_conf->div_group == 2) {
1459 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1460 switch ((ant_conf->main_lna_conf << 4) |
1461 ant_conf->alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001462 case 0x01: /* A-B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301463 ant_conf->fast_div_bias = 0x1;
1464 ant_conf->main_gaintb = 0;
1465 ant_conf->alt_gaintb = 0;
1466 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001467 case 0x02: /* A-B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301468 ant_conf->fast_div_bias = 0x1;
1469 ant_conf->main_gaintb = 0;
1470 ant_conf->alt_gaintb = 0;
1471 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001472 case 0x03: /* A-B A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301473 ant_conf->fast_div_bias = 0x1;
1474 ant_conf->main_gaintb = 0;
1475 ant_conf->alt_gaintb = 0;
1476 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001477 case 0x10: /* LNA2 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301478 if (!(antcomb->scan) &&
1479 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1480 ant_conf->fast_div_bias = 0x1;
1481 else
1482 ant_conf->fast_div_bias = 0x2;
1483 ant_conf->main_gaintb = 0;
1484 ant_conf->alt_gaintb = 0;
1485 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001486 case 0x12: /* LNA2 LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301487 ant_conf->fast_div_bias = 0x1;
1488 ant_conf->main_gaintb = 0;
1489 ant_conf->alt_gaintb = 0;
1490 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001491 case 0x13: /* LNA2 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301492 if (!(antcomb->scan) &&
1493 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1494 ant_conf->fast_div_bias = 0x1;
1495 else
1496 ant_conf->fast_div_bias = 0x2;
1497 ant_conf->main_gaintb = 0;
1498 ant_conf->alt_gaintb = 0;
1499 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001500 case 0x20: /* LNA1 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301501 if (!(antcomb->scan) &&
1502 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1503 ant_conf->fast_div_bias = 0x1;
1504 else
1505 ant_conf->fast_div_bias = 0x2;
1506 ant_conf->main_gaintb = 0;
1507 ant_conf->alt_gaintb = 0;
1508 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001509 case 0x21: /* LNA1 LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301510 ant_conf->fast_div_bias = 0x1;
1511 ant_conf->main_gaintb = 0;
1512 ant_conf->alt_gaintb = 0;
1513 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001514 case 0x23: /* LNA1 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301515 if (!(antcomb->scan) &&
1516 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1517 ant_conf->fast_div_bias = 0x1;
1518 else
1519 ant_conf->fast_div_bias = 0x2;
1520 ant_conf->main_gaintb = 0;
1521 ant_conf->alt_gaintb = 0;
1522 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001523 case 0x30: /* A+B A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301524 ant_conf->fast_div_bias = 0x1;
1525 ant_conf->main_gaintb = 0;
1526 ant_conf->alt_gaintb = 0;
1527 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001528 case 0x31: /* A+B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301529 ant_conf->fast_div_bias = 0x1;
1530 ant_conf->main_gaintb = 0;
1531 ant_conf->alt_gaintb = 0;
1532 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001533 case 0x32: /* A+B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301534 ant_conf->fast_div_bias = 0x1;
1535 ant_conf->main_gaintb = 0;
1536 ant_conf->alt_gaintb = 0;
1537 break;
1538 default:
1539 break;
1540 }
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001541 }
1542}
1543
1544/* Antenna diversity and combining */
1545static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1546{
1547 struct ath_hw_antcomb_conf div_ant_conf;
1548 struct ath_ant_comb *antcomb = &sc->ant_comb;
1549 int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
Sujith Manoharan0ff2b5c2011-04-20 11:00:34 +05301550 int curr_main_set;
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001551 int main_rssi = rs->rs_rssi_ctl0;
1552 int alt_rssi = rs->rs_rssi_ctl1;
1553 int rx_ant_conf, main_ant_conf;
1554 bool short_scan = false;
1555
1556 rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1557 ATH_ANT_RX_MASK;
1558 main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1559 ATH_ANT_RX_MASK;
1560
Mohammed Shafi Shajakhan21e8ee62011-05-13 20:31:40 +05301561 /* Record packet only when both main_rssi and alt_rssi is positive */
1562 if (main_rssi > 0 && alt_rssi > 0) {
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001563 antcomb->total_pkt_count++;
1564 antcomb->main_total_rssi += main_rssi;
1565 antcomb->alt_total_rssi += alt_rssi;
1566 if (main_ant_conf == rx_ant_conf)
1567 antcomb->main_recv_cnt++;
1568 else
1569 antcomb->alt_recv_cnt++;
1570 }
1571
1572 /* Short scan check */
1573 if (antcomb->scan && antcomb->alt_good) {
1574 if (time_after(jiffies, antcomb->scan_start_time +
1575 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1576 short_scan = true;
1577 else
1578 if (antcomb->total_pkt_count ==
1579 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1580 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1581 antcomb->total_pkt_count);
1582 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1583 short_scan = true;
1584 }
1585 }
1586
1587 if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1588 rs->rs_moreaggr) && !short_scan)
1589 return;
1590
1591 if (antcomb->total_pkt_count) {
1592 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1593 antcomb->total_pkt_count);
1594 main_rssi_avg = (antcomb->main_total_rssi /
1595 antcomb->total_pkt_count);
1596 alt_rssi_avg = (antcomb->alt_total_rssi /
1597 antcomb->total_pkt_count);
1598 }
1599
1600
1601 ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1602 curr_alt_set = div_ant_conf.alt_lna_conf;
1603 curr_main_set = div_ant_conf.main_lna_conf;
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001604
1605 antcomb->count++;
1606
1607 if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1608 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1609 ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1610 main_rssi_avg);
1611 antcomb->alt_good = true;
1612 } else {
1613 antcomb->alt_good = false;
1614 }
1615
1616 antcomb->count = 0;
1617 antcomb->scan = true;
1618 antcomb->scan_not_start = true;
1619 }
1620
1621 if (!antcomb->scan) {
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +05301622 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1623 alt_ratio, curr_main_set, curr_alt_set,
1624 alt_rssi_avg, main_rssi_avg)) {
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001625 if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1626 /* Switch main and alt LNA */
1627 div_ant_conf.main_lna_conf =
1628 ATH_ANT_DIV_COMB_LNA2;
1629 div_ant_conf.alt_lna_conf =
1630 ATH_ANT_DIV_COMB_LNA1;
1631 } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1632 div_ant_conf.main_lna_conf =
1633 ATH_ANT_DIV_COMB_LNA1;
1634 div_ant_conf.alt_lna_conf =
1635 ATH_ANT_DIV_COMB_LNA2;
1636 }
1637
1638 goto div_comb_done;
1639 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1640 (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1641 /* Set alt to another LNA */
1642 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1643 div_ant_conf.alt_lna_conf =
1644 ATH_ANT_DIV_COMB_LNA1;
1645 else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1646 div_ant_conf.alt_lna_conf =
1647 ATH_ANT_DIV_COMB_LNA2;
1648
1649 goto div_comb_done;
1650 }
1651
1652 if ((alt_rssi_avg < (main_rssi_avg +
Mohammed Shafi Shajakhan8afbcc82011-05-13 20:30:56 +05301653 div_ant_conf.lna1_lna2_delta)))
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001654 goto div_comb_done;
1655 }
1656
1657 if (!antcomb->scan_not_start) {
1658 switch (curr_alt_set) {
1659 case ATH_ANT_DIV_COMB_LNA2:
1660 antcomb->rssi_lna2 = alt_rssi_avg;
1661 antcomb->rssi_lna1 = main_rssi_avg;
1662 antcomb->scan = true;
1663 /* set to A+B */
1664 div_ant_conf.main_lna_conf =
1665 ATH_ANT_DIV_COMB_LNA1;
1666 div_ant_conf.alt_lna_conf =
1667 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1668 break;
1669 case ATH_ANT_DIV_COMB_LNA1:
1670 antcomb->rssi_lna1 = alt_rssi_avg;
1671 antcomb->rssi_lna2 = main_rssi_avg;
1672 antcomb->scan = true;
1673 /* set to A+B */
1674 div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1675 div_ant_conf.alt_lna_conf =
1676 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1677 break;
1678 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1679 antcomb->rssi_add = alt_rssi_avg;
1680 antcomb->scan = true;
1681 /* set to A-B */
1682 div_ant_conf.alt_lna_conf =
1683 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1684 break;
1685 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1686 antcomb->rssi_sub = alt_rssi_avg;
1687 antcomb->scan = false;
1688 if (antcomb->rssi_lna2 >
1689 (antcomb->rssi_lna1 +
1690 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1691 /* use LNA2 as main LNA */
1692 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1693 (antcomb->rssi_add > antcomb->rssi_sub)) {
1694 /* set to A+B */
1695 div_ant_conf.main_lna_conf =
1696 ATH_ANT_DIV_COMB_LNA2;
1697 div_ant_conf.alt_lna_conf =
1698 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1699 } else if (antcomb->rssi_sub >
1700 antcomb->rssi_lna1) {
1701 /* set to A-B */
1702 div_ant_conf.main_lna_conf =
1703 ATH_ANT_DIV_COMB_LNA2;
1704 div_ant_conf.alt_lna_conf =
1705 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1706 } else {
1707 /* set to LNA1 */
1708 div_ant_conf.main_lna_conf =
1709 ATH_ANT_DIV_COMB_LNA2;
1710 div_ant_conf.alt_lna_conf =
1711 ATH_ANT_DIV_COMB_LNA1;
1712 }
1713 } else {
1714 /* use LNA1 as main LNA */
1715 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1716 (antcomb->rssi_add > antcomb->rssi_sub)) {
1717 /* set to A+B */
1718 div_ant_conf.main_lna_conf =
1719 ATH_ANT_DIV_COMB_LNA1;
1720 div_ant_conf.alt_lna_conf =
1721 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1722 } else if (antcomb->rssi_sub >
1723 antcomb->rssi_lna1) {
1724 /* set to A-B */
1725 div_ant_conf.main_lna_conf =
1726 ATH_ANT_DIV_COMB_LNA1;
1727 div_ant_conf.alt_lna_conf =
1728 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1729 } else {
1730 /* set to LNA2 */
1731 div_ant_conf.main_lna_conf =
1732 ATH_ANT_DIV_COMB_LNA1;
1733 div_ant_conf.alt_lna_conf =
1734 ATH_ANT_DIV_COMB_LNA2;
1735 }
1736 }
1737 break;
1738 default:
1739 break;
1740 }
1741 } else {
1742 if (!antcomb->alt_good) {
1743 antcomb->scan_not_start = false;
1744 /* Set alt to another LNA */
1745 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1746 div_ant_conf.main_lna_conf =
1747 ATH_ANT_DIV_COMB_LNA2;
1748 div_ant_conf.alt_lna_conf =
1749 ATH_ANT_DIV_COMB_LNA1;
1750 } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1751 div_ant_conf.main_lna_conf =
1752 ATH_ANT_DIV_COMB_LNA1;
1753 div_ant_conf.alt_lna_conf =
1754 ATH_ANT_DIV_COMB_LNA2;
1755 }
1756 goto div_comb_done;
1757 }
1758 }
1759
1760 ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1761 main_rssi_avg, alt_rssi_avg,
1762 alt_ratio);
1763
1764 antcomb->quick_scan_cnt++;
1765
1766div_comb_done:
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301767 ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001768 ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1769
1770 antcomb->scan_start_time = jiffies;
1771 antcomb->total_pkt_count = 0;
1772 antcomb->main_total_rssi = 0;
1773 antcomb->alt_total_rssi = 0;
1774 antcomb->main_recv_cnt = 0;
1775 antcomb->alt_recv_cnt = 0;
1776}
1777
Felix Fietkaub5c804752010-04-15 17:38:48 -04001778int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1779{
1780 struct ath_buf *bf;
Felix Fietkau0d955212011-01-26 18:23:27 +01001781 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
Luis R. Rodriguez5ca42622009-11-04 08:20:42 -08001782 struct ieee80211_rx_status *rxs;
Sujithcbe61d82009-02-09 13:27:12 +05301783 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001784 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezb4afffc2009-11-02 11:36:08 -08001785 /*
Mohammed Shafi Shajakhancae6b742010-12-07 21:23:16 +05301786 * The hw can technically differ from common->hw when using ath9k
Luis R. Rodriguezb4afffc2009-11-02 11:36:08 -08001787 * virtual wiphy so to account for that we iterate over the active
1788 * wiphys and find the appropriate wiphy and therefore hw.
1789 */
Felix Fietkau7545daf2011-01-24 19:23:16 +01001790 struct ieee80211_hw *hw = sc->hw;
Sujithbe0418a2008-11-18 09:05:55 +05301791 struct ieee80211_hdr *hdr;
Luis R. Rodriguezc9b14172009-11-04 16:47:22 -08001792 int retval;
Sujithbe0418a2008-11-18 09:05:55 +05301793 bool decrypt_error = false;
Felix Fietkau29bffa92010-03-29 20:14:23 -07001794 struct ath_rx_status rs;
Felix Fietkaub5c804752010-04-15 17:38:48 -04001795 enum ath9k_rx_qtype qtype;
1796 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1797 int dma_type;
Vasanthakumar Thiagarajan5c6dd922010-05-20 14:34:47 -07001798 u8 rx_status_len = ah->caps.rx_status_len;
Felix Fietkaua6d20552010-06-12 00:33:54 -04001799 u64 tsf = 0;
1800 u32 tsf_lower = 0;
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001801 unsigned long flags;
Sujithbe0418a2008-11-18 09:05:55 +05301802
Felix Fietkaub5c804752010-04-15 17:38:48 -04001803 if (edma)
Felix Fietkaub5c804752010-04-15 17:38:48 -04001804 dma_type = DMA_BIDIRECTIONAL;
Ming Lei56824222010-05-14 21:15:38 +08001805 else
1806 dma_type = DMA_FROM_DEVICE;
Felix Fietkaub5c804752010-04-15 17:38:48 -04001807
1808 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
Sujithb77f4832008-12-07 21:44:03 +05301809 spin_lock_bh(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001810
Felix Fietkaua6d20552010-06-12 00:33:54 -04001811 tsf = ath9k_hw_gettsf64(ah);
1812 tsf_lower = tsf & 0xffffffff;
1813
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001814 do {
1815 /* If handling rx interrupt and flush is in progress => exit */
Sujith98deeea2008-08-11 14:05:46 +05301816 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001817 break;
1818
Felix Fietkau29bffa92010-03-29 20:14:23 -07001819 memset(&rs, 0, sizeof(rs));
Felix Fietkaub5c804752010-04-15 17:38:48 -04001820 if (edma)
1821 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1822 else
1823 bf = ath_get_next_rx_buf(sc, &rs);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001824
Felix Fietkaub5c804752010-04-15 17:38:48 -04001825 if (!bf)
1826 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001827
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001828 skb = bf->bf_mpdu;
Sujithbe0418a2008-11-18 09:05:55 +05301829 if (!skb)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001830 continue;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001831
Felix Fietkau0d955212011-01-26 18:23:27 +01001832 /*
1833 * Take frame header from the first fragment and RX status from
1834 * the last one.
1835 */
1836 if (sc->rx.frag)
1837 hdr_skb = sc->rx.frag;
1838 else
1839 hdr_skb = skb;
1840
1841 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1842 rxs = IEEE80211_SKB_RXCB(hdr_skb);
Luis R. Rodriguez5ca42622009-11-04 08:20:42 -08001843
Felix Fietkau29bffa92010-03-29 20:14:23 -07001844 ath_debug_stat_rx(sc, &rs);
Sujith1395d3f2010-01-08 10:36:11 +05301845
Vasanthakumar Thiagarajan9bf9fca2008-12-15 20:40:46 +05301846 /*
Sujithbe0418a2008-11-18 09:05:55 +05301847 * If we're asked to flush receive queue, directly
1848 * chain it back at the queue without processing it.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001849 */
Sujithbe0418a2008-11-18 09:05:55 +05301850 if (flush)
Felix Fietkau0d955212011-01-26 18:23:27 +01001851 goto requeue_drop_frag;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001852
Jan Friedrichc8f3b722010-08-02 23:55:50 +02001853 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1854 rxs, &decrypt_error);
1855 if (retval)
Felix Fietkau0d955212011-01-26 18:23:27 +01001856 goto requeue_drop_frag;
Jan Friedrichc8f3b722010-08-02 23:55:50 +02001857
Felix Fietkaua6d20552010-06-12 00:33:54 -04001858 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1859 if (rs.rs_tstamp > tsf_lower &&
1860 unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1861 rxs->mactime -= 0x100000000ULL;
1862
1863 if (rs.rs_tstamp < tsf_lower &&
1864 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1865 rxs->mactime += 0x100000000ULL;
1866
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001867 /* Ensure we always have an skb to requeue once we are done
1868 * processing the current buffer's skb */
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001869 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001870
1871 /* If there is no memory we ignore the current RX'd frame,
1872 * tell hardware it can give us a new frame using the old
Sujithb77f4832008-12-07 21:44:03 +05301873 * skb and put it at the tail of the sc->rx.rxbuf list for
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001874 * processing. */
1875 if (!requeue_skb)
Felix Fietkau0d955212011-01-26 18:23:27 +01001876 goto requeue_drop_frag;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001877
Vasanthakumar Thiagarajan9bf9fca2008-12-15 20:40:46 +05301878 /* Unmap the frame */
Gabor Juhos7da3c552009-01-14 20:17:03 +01001879 dma_unmap_single(sc->dev, bf->bf_buf_addr,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001880 common->rx_bufsize,
Felix Fietkaub5c804752010-04-15 17:38:48 -04001881 dma_type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001882
Felix Fietkaub5c804752010-04-15 17:38:48 -04001883 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1884 if (ah->caps.rx_status_len)
1885 skb_pull(skb, ah->caps.rx_status_len);
Sujithbe0418a2008-11-18 09:05:55 +05301886
Felix Fietkau0d955212011-01-26 18:23:27 +01001887 if (!rs.rs_more)
1888 ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1889 rxs, decrypt_error);
Sujithbe0418a2008-11-18 09:05:55 +05301890
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001891 /* We will now give hardware our shiny new allocated skb */
1892 bf->bf_mpdu = requeue_skb;
Gabor Juhos7da3c552009-01-14 20:17:03 +01001893 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001894 common->rx_bufsize,
Felix Fietkaub5c804752010-04-15 17:38:48 -04001895 dma_type);
Gabor Juhos7da3c552009-01-14 20:17:03 +01001896 if (unlikely(dma_mapping_error(sc->dev,
Luis R. Rodriguezf8316df2008-12-03 03:35:29 -08001897 bf->bf_buf_addr))) {
1898 dev_kfree_skb_any(requeue_skb);
1899 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -07001900 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -08001901 ath_err(common, "dma_mapping_error() on RX\n");
Felix Fietkau7545daf2011-01-24 19:23:16 +01001902 ieee80211_rx(hw, skb);
Luis R. Rodriguezf8316df2008-12-03 03:35:29 -08001903 break;
1904 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001905
Felix Fietkau0d955212011-01-26 18:23:27 +01001906 if (rs.rs_more) {
1907 /*
1908 * rs_more indicates chained descriptors which can be
1909 * used to link buffers together for a sort of
1910 * scatter-gather operation.
1911 */
1912 if (sc->rx.frag) {
1913 /* too many fragments - cannot handle frame */
1914 dev_kfree_skb_any(sc->rx.frag);
1915 dev_kfree_skb_any(skb);
1916 skb = NULL;
1917 }
1918 sc->rx.frag = skb;
1919 goto requeue;
1920 }
1921
1922 if (sc->rx.frag) {
1923 int space = skb->len - skb_tailroom(hdr_skb);
1924
1925 sc->rx.frag = NULL;
1926
1927 if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1928 dev_kfree_skb(skb);
1929 goto requeue_drop_frag;
1930 }
1931
1932 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1933 skb->len);
1934 dev_kfree_skb_any(skb);
1935 skb = hdr_skb;
1936 }
1937
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001938 /*
1939 * change the default rx antenna if rx diversity chooses the
1940 * other antenna 3 times in a row.
1941 */
Felix Fietkau29bffa92010-03-29 20:14:23 -07001942 if (sc->rx.defant != rs.rs_antenna) {
Sujithb77f4832008-12-07 21:44:03 +05301943 if (++sc->rx.rxotherant >= 3)
Felix Fietkau29bffa92010-03-29 20:14:23 -07001944 ath_setdefantenna(sc, rs.rs_antenna);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001945 } else {
Sujithb77f4832008-12-07 21:44:03 +05301946 sc->rx.rxotherant = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001947 }
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301948
Felix Fietkau66760ea2011-07-13 23:35:05 +08001949 if (rxs->flag & RX_FLAG_MMIC_STRIPPED)
1950 skb_trim(skb, skb->len - 8);
1951
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001952 spin_lock_irqsave(&sc->sc_pm_lock, flags);
Mohammed Shafi Shajakhanaaef24b2010-12-07 20:40:58 +05301953
1954 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
Vasanthakumar Thiagarajanededf1f2010-05-22 23:58:13 -07001955 PS_WAIT_FOR_CAB |
Mohammed Shafi Shajakhanaaef24b2010-12-07 20:40:58 +05301956 PS_WAIT_FOR_PSPOLL_DATA)) ||
Mohammed Shafi Shajakhancedc7e32011-04-22 13:12:23 +05301957 ath9k_check_auto_sleep(sc))
Jouni Malinencc659652009-05-14 21:28:48 +03001958 ath_rx_ps(sc, skb);
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001959 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
Jouni Malinencc659652009-05-14 21:28:48 +03001960
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001961 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1962 ath_ant_comb_scan(sc, &rs);
1963
Felix Fietkau7545daf2011-01-24 19:23:16 +01001964 ieee80211_rx(hw, skb);
Jouni Malinencc659652009-05-14 21:28:48 +03001965
Felix Fietkau0d955212011-01-26 18:23:27 +01001966requeue_drop_frag:
1967 if (sc->rx.frag) {
1968 dev_kfree_skb_any(sc->rx.frag);
1969 sc->rx.frag = NULL;
1970 }
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001971requeue:
Felix Fietkaub5c804752010-04-15 17:38:48 -04001972 if (edma) {
1973 list_add_tail(&bf->list, &sc->rx.rxbuf);
1974 ath_rx_edma_buf_link(sc, qtype);
1975 } else {
1976 list_move_tail(&bf->list, &sc->rx.rxbuf);
1977 ath_rx_buf_link(sc, bf);
Felix Fietkau95294972011-04-07 19:30:32 +02001978 ath9k_hw_rxena(ah);
Felix Fietkaub5c804752010-04-15 17:38:48 -04001979 }
Sujithbe0418a2008-11-18 09:05:55 +05301980 } while (1);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001981
Sujithb77f4832008-12-07 21:44:03 +05301982 spin_unlock_bh(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001983
1984 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001985}