blob: 70dc8ecdad4d7994caf7083dbe7e2cc1a9101f5b [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
Sujith Manoharan5b681382011-05-17 13:36:18 +05302 * Copyright (c) 2008-2011 Atheros Communications Inc.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Alexey Dobriyanb7f080c2011-06-16 11:01:34 +000017#include <linux/dma-mapping.h>
Sujith394cf0a2009-02-09 13:26:54 +053018#include "ath9k.h"
Luis R. Rodriguezb622a722010-04-15 17:39:28 -040019#include "ar9003_mac.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070020
Felix Fietkaub5c804752010-04-15 17:38:48 -040021#define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
22
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -070023static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
24 int mindelta, int main_rssi_avg,
25 int alt_rssi_avg, int pkt_count)
26{
27 return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
28 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
29 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
30}
31
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +053032static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
33 int curr_main_set, int curr_alt_set,
34 int alt_rssi_avg, int main_rssi_avg)
35{
36 bool result = false;
37 switch (div_group) {
38 case 0:
39 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
40 result = true;
41 break;
42 case 1:
Gabor Juhos66ce2352011-06-21 11:23:43 +020043 case 2:
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +053044 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
45 (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
46 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
47 ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
48 (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
49 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
50 (alt_rssi_avg >= 4))
51 result = true;
52 else
53 result = false;
54 break;
55 }
56
57 return result;
58}
59
Vasanthakumar Thiagarajanededf1f2010-05-22 23:58:13 -070060static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
61{
62 return sc->ps_enabled &&
63 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
64}
65
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070066/*
67 * Setup and link descriptors.
68 *
69 * 11N: we can no longer afford to self link the last descriptor.
70 * MAC acknowledges BA status as long as it copies frames to host
71 * buffer (or rx fifo). This can incorrectly acknowledge packets
72 * to a sender if last desc is self-linked.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070073 */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070074static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
75{
Sujithcbe61d82009-02-09 13:27:12 +053076 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080077 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070078 struct ath_desc *ds;
79 struct sk_buff *skb;
80
81 ATH_RXBUF_RESET(bf);
82
83 ds = bf->bf_desc;
Sujithbe0418a2008-11-18 09:05:55 +053084 ds->ds_link = 0; /* link to null */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070085 ds->ds_data = bf->bf_buf_addr;
86
Sujithbe0418a2008-11-18 09:05:55 +053087 /* virtual addr of the beginning of the buffer. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070088 skb = bf->bf_mpdu;
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -070089 BUG_ON(skb == NULL);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070090 ds->ds_vdata = skb->data;
91
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080092 /*
93 * setup rx descriptors. The rx_bufsize here tells the hardware
Luis R. Rodriguezb4b6cda2008-11-20 17:15:13 -080094 * how much data it can DMA to us and that we are prepared
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080095 * to process
96 */
Sujithb77f4832008-12-07 21:44:03 +053097 ath9k_hw_setuprxdesc(ah, ds,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -080098 common->rx_bufsize,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070099 0);
100
Sujithb77f4832008-12-07 21:44:03 +0530101 if (sc->rx.rxlink == NULL)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700102 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
103 else
Sujithb77f4832008-12-07 21:44:03 +0530104 *sc->rx.rxlink = bf->bf_daddr;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700105
Sujithb77f4832008-12-07 21:44:03 +0530106 sc->rx.rxlink = &ds->ds_link;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700107}
108
Sujithff37e332008-11-24 12:07:55 +0530109static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
110{
111 /* XXX block beacon interrupts */
112 ath9k_hw_setantenna(sc->sc_ah, antenna);
Sujithb77f4832008-12-07 21:44:03 +0530113 sc->rx.defant = antenna;
114 sc->rx.rxotherant = 0;
Sujithff37e332008-11-24 12:07:55 +0530115}
116
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700117static void ath_opmode_init(struct ath_softc *sc)
118{
Sujithcbe61d82009-02-09 13:27:12 +0530119 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -0700120 struct ath_common *common = ath9k_hw_common(ah);
121
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700122 u32 rfilt, mfilt[2];
123
124 /* configure rx filter */
125 rfilt = ath_calcrxfilter(sc);
126 ath9k_hw_setrxfilter(ah, rfilt);
127
128 /* configure bssid mask */
Felix Fietkau364734f2010-09-14 20:22:44 +0200129 ath_hw_setbssidmask(common);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700130
131 /* configure operational mode */
132 ath9k_hw_setopmode(ah);
133
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700134 /* calculate and install multicast filter */
135 mfilt[0] = mfilt[1] = ~0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700136 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700137}
138
Felix Fietkaub5c804752010-04-15 17:38:48 -0400139static bool ath_rx_edma_buf_link(struct ath_softc *sc,
140 enum ath9k_rx_qtype qtype)
141{
142 struct ath_hw *ah = sc->sc_ah;
143 struct ath_rx_edma *rx_edma;
144 struct sk_buff *skb;
145 struct ath_buf *bf;
146
147 rx_edma = &sc->rx.rx_edma[qtype];
148 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
149 return false;
150
151 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
152 list_del_init(&bf->list);
153
154 skb = bf->bf_mpdu;
155
156 ATH_RXBUF_RESET(bf);
157 memset(skb->data, 0, ah->caps.rx_status_len);
158 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
159 ah->caps.rx_status_len, DMA_TO_DEVICE);
160
161 SKB_CB_ATHBUF(skb) = bf;
162 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
163 skb_queue_tail(&rx_edma->rx_fifo, skb);
164
165 return true;
166}
167
168static void ath_rx_addbuffer_edma(struct ath_softc *sc,
169 enum ath9k_rx_qtype qtype, int size)
170{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400171 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
172 u32 nbuf = 0;
173
Felix Fietkaub5c804752010-04-15 17:38:48 -0400174 if (list_empty(&sc->rx.rxbuf)) {
Joe Perches226afe62010-12-02 19:12:37 -0800175 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
Felix Fietkaub5c804752010-04-15 17:38:48 -0400176 return;
177 }
178
179 while (!list_empty(&sc->rx.rxbuf)) {
180 nbuf++;
181
182 if (!ath_rx_edma_buf_link(sc, qtype))
183 break;
184
185 if (nbuf >= size)
186 break;
187 }
188}
189
190static void ath_rx_remove_buffer(struct ath_softc *sc,
191 enum ath9k_rx_qtype qtype)
192{
193 struct ath_buf *bf;
194 struct ath_rx_edma *rx_edma;
195 struct sk_buff *skb;
196
197 rx_edma = &sc->rx.rx_edma[qtype];
198
199 while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
200 bf = SKB_CB_ATHBUF(skb);
201 BUG_ON(!bf);
202 list_add_tail(&bf->list, &sc->rx.rxbuf);
203 }
204}
205
206static void ath_rx_edma_cleanup(struct ath_softc *sc)
207{
208 struct ath_buf *bf;
209
210 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
211 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
212
213 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
214 if (bf->bf_mpdu)
215 dev_kfree_skb_any(bf->bf_mpdu);
216 }
217
218 INIT_LIST_HEAD(&sc->rx.rxbuf);
219
220 kfree(sc->rx.rx_bufptr);
221 sc->rx.rx_bufptr = NULL;
222}
223
224static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
225{
226 skb_queue_head_init(&rx_edma->rx_fifo);
227 skb_queue_head_init(&rx_edma->rx_buffers);
228 rx_edma->rx_fifo_hwsize = size;
229}
230
231static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
232{
233 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
234 struct ath_hw *ah = sc->sc_ah;
235 struct sk_buff *skb;
236 struct ath_buf *bf;
237 int error = 0, i;
238 u32 size;
239
Felix Fietkaub5c804752010-04-15 17:38:48 -0400240 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
241 ah->caps.rx_status_len);
242
243 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
244 ah->caps.rx_lp_qdepth);
245 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
246 ah->caps.rx_hp_qdepth);
247
248 size = sizeof(struct ath_buf) * nbufs;
249 bf = kzalloc(size, GFP_KERNEL);
250 if (!bf)
251 return -ENOMEM;
252
253 INIT_LIST_HEAD(&sc->rx.rxbuf);
254 sc->rx.rx_bufptr = bf;
255
256 for (i = 0; i < nbufs; i++, bf++) {
257 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
258 if (!skb) {
259 error = -ENOMEM;
260 goto rx_init_fail;
261 }
262
263 memset(skb->data, 0, common->rx_bufsize);
264 bf->bf_mpdu = skb;
265
266 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
267 common->rx_bufsize,
268 DMA_BIDIRECTIONAL);
269 if (unlikely(dma_mapping_error(sc->dev,
270 bf->bf_buf_addr))) {
271 dev_kfree_skb_any(skb);
272 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -0700273 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -0800274 ath_err(common,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400275 "dma_mapping_error() on RX init\n");
276 error = -ENOMEM;
277 goto rx_init_fail;
278 }
279
280 list_add_tail(&bf->list, &sc->rx.rxbuf);
281 }
282
283 return 0;
284
285rx_init_fail:
286 ath_rx_edma_cleanup(sc);
287 return error;
288}
289
290static void ath_edma_start_recv(struct ath_softc *sc)
291{
292 spin_lock_bh(&sc->rx.rxbuflock);
293
294 ath9k_hw_rxena(sc->sc_ah);
295
296 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
297 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
298
299 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
300 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
301
Felix Fietkaub5c804752010-04-15 17:38:48 -0400302 ath_opmode_init(sc);
303
Luis R. Rodriguez48a6a462010-09-16 15:12:28 -0400304 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
Luis R. Rodriguez7583c5502010-10-20 16:07:04 -0700305
306 spin_unlock_bh(&sc->rx.rxbuflock);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400307}
308
309static void ath_edma_stop_recv(struct ath_softc *sc)
310{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400311 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
312 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400313}
314
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700315int ath_rx_init(struct ath_softc *sc, int nbufs)
316{
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -0700317 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700318 struct sk_buff *skb;
319 struct ath_buf *bf;
320 int error = 0;
321
Luis R. Rodriguez4bdd1e92010-10-26 15:27:24 -0700322 spin_lock_init(&sc->sc_pcu_lock);
Sujith797fe5cb2009-03-30 15:28:45 +0530323 sc->sc_flags &= ~SC_OP_RXFLUSH;
324 spin_lock_init(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700325
Felix Fietkau0d955212011-01-26 18:23:27 +0100326 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
327 sc->sc_ah->caps.rx_status_len;
328
Felix Fietkaub5c804752010-04-15 17:38:48 -0400329 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
330 return ath_rx_edma_init(sc, nbufs);
331 } else {
Joe Perches226afe62010-12-02 19:12:37 -0800332 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
333 common->cachelsz, common->rx_bufsize);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700334
Felix Fietkaub5c804752010-04-15 17:38:48 -0400335 /* Initialize rx descriptors */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700336
Felix Fietkaub5c804752010-04-15 17:38:48 -0400337 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
Vasanthakumar Thiagarajan4adfcde2010-04-15 17:39:33 -0400338 "rx", nbufs, 1, 0);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400339 if (error != 0) {
Joe Perches38002762010-12-02 19:12:36 -0800340 ath_err(common,
341 "failed to allocate rx descriptors: %d\n",
342 error);
Sujith797fe5cb2009-03-30 15:28:45 +0530343 goto err;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700344 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400345
346 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
347 skb = ath_rxbuf_alloc(common, common->rx_bufsize,
348 GFP_KERNEL);
349 if (skb == NULL) {
350 error = -ENOMEM;
351 goto err;
352 }
353
354 bf->bf_mpdu = skb;
355 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
356 common->rx_bufsize,
357 DMA_FROM_DEVICE);
358 if (unlikely(dma_mapping_error(sc->dev,
359 bf->bf_buf_addr))) {
360 dev_kfree_skb_any(skb);
361 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -0700362 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -0800363 ath_err(common,
364 "dma_mapping_error() on RX init\n");
Felix Fietkaub5c804752010-04-15 17:38:48 -0400365 error = -ENOMEM;
366 goto err;
367 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400368 }
369 sc->rx.rxlink = NULL;
Sujith797fe5cb2009-03-30 15:28:45 +0530370 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700371
Sujith797fe5cb2009-03-30 15:28:45 +0530372err:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700373 if (error)
374 ath_rx_cleanup(sc);
375
376 return error;
377}
378
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700379void ath_rx_cleanup(struct ath_softc *sc)
380{
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -0800381 struct ath_hw *ah = sc->sc_ah;
382 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700383 struct sk_buff *skb;
384 struct ath_buf *bf;
385
Felix Fietkaub5c804752010-04-15 17:38:48 -0400386 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
387 ath_rx_edma_cleanup(sc);
388 return;
389 } else {
390 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
391 skb = bf->bf_mpdu;
392 if (skb) {
393 dma_unmap_single(sc->dev, bf->bf_buf_addr,
394 common->rx_bufsize,
395 DMA_FROM_DEVICE);
396 dev_kfree_skb(skb);
Ben Greear6cf9e992010-10-14 12:45:30 -0700397 bf->bf_buf_addr = 0;
398 bf->bf_mpdu = NULL;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400399 }
Luis R. Rodriguez051b9192009-03-23 18:25:01 -0400400 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700401
Felix Fietkaub5c804752010-04-15 17:38:48 -0400402 if (sc->rx.rxdma.dd_desc_len != 0)
403 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
404 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700405}
406
407/*
408 * Calculate the receive filter according to the
409 * operating mode and state:
410 *
411 * o always accept unicast, broadcast, and multicast traffic
412 * o maintain current state of phy error reception (the hal
413 * may enable phy error frames for noise immunity work)
414 * o probe request frames are accepted only when operating in
415 * hostap, adhoc, or monitor modes
416 * o enable promiscuous mode according to the interface state
417 * o accept beacons:
418 * - when operating in adhoc mode so the 802.11 layer creates
419 * node table entries for peers,
420 * - when operating in station mode for collecting rssi data when
421 * the station is otherwise quiet, or
422 * - when operating as a repeater so we see repeater-sta beacons
423 * - when scanning
424 */
425
426u32 ath_calcrxfilter(struct ath_softc *sc)
427{
428#define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
Sujith7dcfdcd2008-08-11 14:03:13 +0530429
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700430 u32 rfilt;
431
432 rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
433 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
434 | ATH9K_RX_FILTER_MCAST;
435
Jouni Malinen9c1d8e42010-10-13 17:29:31 +0300436 if (sc->rx.rxfilter & FIF_PROBE_REQ)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700437 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
438
Jouni Malinen217ba9d2009-03-10 10:55:50 +0200439 /*
440 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
441 * mode interface or when in monitor mode. AP mode does not need this
442 * since it receives all in-BSS frames anyway.
443 */
Felix Fietkau2e286942011-03-09 01:48:12 +0100444 if (sc->sc_ah->is_monitoring)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700445 rfilt |= ATH9K_RX_FILTER_PROM;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700446
Sujithd42c6b72009-02-04 08:10:22 +0530447 if (sc->rx.rxfilter & FIF_CONTROL)
448 rfilt |= ATH9K_RX_FILTER_CONTROL;
449
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530450 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
Ben Greearcfda6692010-09-14 12:00:22 -0700451 (sc->nvifs <= 1) &&
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530452 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
453 rfilt |= ATH9K_RX_FILTER_MYBEACON;
454 else
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700455 rfilt |= ATH9K_RX_FILTER_BEACON;
456
Felix Fietkau264bbec2011-04-07 19:24:23 +0200457 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
Senthil Balasubramanian66afad02009-09-18 15:06:07 +0530458 (sc->rx.rxfilter & FIF_PSPOLL))
Vasanthakumar Thiagarajandbaaa142009-02-19 15:41:52 +0530459 rfilt |= ATH9K_RX_FILTER_PSPOLL;
Sujithbe0418a2008-11-18 09:05:55 +0530460
Sujith7ea310b2009-09-03 12:08:43 +0530461 if (conf_is_ht(&sc->hw->conf))
462 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
463
Felix Fietkau7545daf2011-01-24 19:23:16 +0100464 if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
Javier Cardona5eb6ba82009-08-20 19:12:07 -0700465 /* The following may also be needed for other older chips */
466 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
467 rfilt |= ATH9K_RX_FILTER_PROM;
Jouni Malinenb93bce22009-03-03 19:23:30 +0200468 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
469 }
470
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700471 return rfilt;
Sujith7dcfdcd2008-08-11 14:03:13 +0530472
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700473#undef RX_FILTER_PRESERVE
474}
475
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700476int ath_startrecv(struct ath_softc *sc)
477{
Sujithcbe61d82009-02-09 13:27:12 +0530478 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700479 struct ath_buf *bf, *tbf;
480
Felix Fietkaub5c804752010-04-15 17:38:48 -0400481 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
482 ath_edma_start_recv(sc);
483 return 0;
484 }
485
Sujithb77f4832008-12-07 21:44:03 +0530486 spin_lock_bh(&sc->rx.rxbuflock);
487 if (list_empty(&sc->rx.rxbuf))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700488 goto start_recv;
489
Sujithb77f4832008-12-07 21:44:03 +0530490 sc->rx.rxlink = NULL;
491 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700492 ath_rx_buf_link(sc, bf);
493 }
494
495 /* We could have deleted elements so the list may be empty now */
Sujithb77f4832008-12-07 21:44:03 +0530496 if (list_empty(&sc->rx.rxbuf))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700497 goto start_recv;
498
Sujithb77f4832008-12-07 21:44:03 +0530499 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700500 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
Sujithbe0418a2008-11-18 09:05:55 +0530501 ath9k_hw_rxena(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700502
503start_recv:
Sujithbe0418a2008-11-18 09:05:55 +0530504 ath_opmode_init(sc);
Luis R. Rodriguez48a6a462010-09-16 15:12:28 -0400505 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
Sujithbe0418a2008-11-18 09:05:55 +0530506
Luis R. Rodriguez7583c5502010-10-20 16:07:04 -0700507 spin_unlock_bh(&sc->rx.rxbuflock);
508
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700509 return 0;
510}
511
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700512bool ath_stoprecv(struct ath_softc *sc)
513{
Sujithcbe61d82009-02-09 13:27:12 +0530514 struct ath_hw *ah = sc->sc_ah;
Felix Fietkau5882da022011-04-08 20:13:18 +0200515 bool stopped, reset = false;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700516
Luis R. Rodriguez1e450282010-10-20 16:07:03 -0700517 spin_lock_bh(&sc->rx.rxbuflock);
Felix Fietkaud47844a2010-11-20 03:08:47 +0100518 ath9k_hw_abortpcurecv(ah);
Sujithbe0418a2008-11-18 09:05:55 +0530519 ath9k_hw_setrxfilter(ah, 0);
Felix Fietkau5882da022011-04-08 20:13:18 +0200520 stopped = ath9k_hw_stopdmarecv(ah, &reset);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400521
522 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
523 ath_edma_stop_recv(sc);
524 else
525 sc->rx.rxlink = NULL;
Luis R. Rodriguez1e450282010-10-20 16:07:03 -0700526 spin_unlock_bh(&sc->rx.rxbuflock);
Sujithbe0418a2008-11-18 09:05:55 +0530527
Rajkumar Manoharand5847472010-12-20 14:39:51 +0530528 if (!(ah->ah_flags & AH_UNPLUGGED) &&
529 unlikely(!stopped)) {
Ben Greeard7fd1b502010-12-06 13:13:07 -0800530 ath_err(ath9k_hw_common(sc->sc_ah),
531 "Could not stop RX, we could be "
532 "confusing the DMA engine when we start RX up\n");
533 ATH_DBG_WARN_ON_ONCE(!stopped);
534 }
Felix Fietkau2232d312011-04-15 00:41:43 +0200535 return stopped && !reset;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700536}
537
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700538void ath_flushrecv(struct ath_softc *sc)
539{
Sujith98deeea2008-08-11 14:05:46 +0530540 sc->sc_flags |= SC_OP_RXFLUSH;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400541 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
542 ath_rx_tasklet(sc, 1, true);
543 ath_rx_tasklet(sc, 1, false);
Sujith98deeea2008-08-11 14:05:46 +0530544 sc->sc_flags &= ~SC_OP_RXFLUSH;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700545}
546
Jouni Malinencc659652009-05-14 21:28:48 +0300547static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
548{
549 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
550 struct ieee80211_mgmt *mgmt;
551 u8 *pos, *end, id, elen;
552 struct ieee80211_tim_ie *tim;
553
554 mgmt = (struct ieee80211_mgmt *)skb->data;
555 pos = mgmt->u.beacon.variable;
556 end = skb->data + skb->len;
557
558 while (pos + 2 < end) {
559 id = *pos++;
560 elen = *pos++;
561 if (pos + elen > end)
562 break;
563
564 if (id == WLAN_EID_TIM) {
565 if (elen < sizeof(*tim))
566 break;
567 tim = (struct ieee80211_tim_ie *) pos;
568 if (tim->dtim_count != 0)
569 break;
570 return tim->bitmap_ctrl & 0x01;
571 }
572
573 pos += elen;
574 }
575
576 return false;
577}
578
Jouni Malinencc659652009-05-14 21:28:48 +0300579static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
580{
581 struct ieee80211_mgmt *mgmt;
Luis R. Rodriguez15107182009-09-10 09:22:37 -0700582 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Jouni Malinencc659652009-05-14 21:28:48 +0300583
584 if (skb->len < 24 + 8 + 2 + 2)
585 return;
586
587 mgmt = (struct ieee80211_mgmt *)skb->data;
Ben Greear48014162011-01-15 19:13:48 +0000588 if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
589 /* TODO: This doesn't work well if you have stations
590 * associated to two different APs because curbssid
591 * is just the last AP that any of the stations associated
592 * with.
593 */
Jouni Malinencc659652009-05-14 21:28:48 +0300594 return; /* not from our current AP */
Ben Greear48014162011-01-15 19:13:48 +0000595 }
Jouni Malinencc659652009-05-14 21:28:48 +0300596
Sujith1b04b932010-01-08 10:36:05 +0530597 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
Gabor Juhos293dc5d2009-06-19 12:17:48 +0200598
Sujith1b04b932010-01-08 10:36:05 +0530599 if (sc->ps_flags & PS_BEACON_SYNC) {
600 sc->ps_flags &= ~PS_BEACON_SYNC;
Joe Perches226afe62010-12-02 19:12:37 -0800601 ath_dbg(common, ATH_DBG_PS,
602 "Reconfigure Beacon timers based on timestamp from the AP\n");
Rajkumar Manoharan99e4d432011-04-04 22:56:19 +0530603 ath_set_beacon(sc);
Rajkumar Manoharandeb75182011-05-06 18:27:46 +0530604 sc->ps_flags &= ~PS_TSFOOR_SYNC;
Jouni Malinenccdfeab2009-05-20 21:59:08 +0300605 }
606
Jouni Malinencc659652009-05-14 21:28:48 +0300607 if (ath_beacon_dtim_pending_cab(skb)) {
608 /*
609 * Remain awake waiting for buffered broadcast/multicast
Gabor Juhos58f5fff2009-06-17 20:53:20 +0200610 * frames. If the last broadcast/multicast frame is not
611 * received properly, the next beacon frame will work as
612 * a backup trigger for returning into NETWORK SLEEP state,
613 * so we are waiting for it as well.
Jouni Malinencc659652009-05-14 21:28:48 +0300614 */
Joe Perches226afe62010-12-02 19:12:37 -0800615 ath_dbg(common, ATH_DBG_PS,
616 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
Sujith1b04b932010-01-08 10:36:05 +0530617 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
Jouni Malinencc659652009-05-14 21:28:48 +0300618 return;
619 }
620
Sujith1b04b932010-01-08 10:36:05 +0530621 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
Jouni Malinencc659652009-05-14 21:28:48 +0300622 /*
623 * This can happen if a broadcast frame is dropped or the AP
624 * fails to send a frame indicating that all CAB frames have
625 * been delivered.
626 */
Sujith1b04b932010-01-08 10:36:05 +0530627 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
Joe Perches226afe62010-12-02 19:12:37 -0800628 ath_dbg(common, ATH_DBG_PS,
629 "PS wait for CAB frames timed out\n");
Jouni Malinencc659652009-05-14 21:28:48 +0300630 }
Jouni Malinencc659652009-05-14 21:28:48 +0300631}
632
633static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
634{
635 struct ieee80211_hdr *hdr;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700636 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Jouni Malinencc659652009-05-14 21:28:48 +0300637
638 hdr = (struct ieee80211_hdr *)skb->data;
639
640 /* Process Beacon and CAB receive in PS state */
Vasanthakumar Thiagarajanededf1f2010-05-22 23:58:13 -0700641 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
642 && ieee80211_is_beacon(hdr->frame_control))
Jouni Malinencc659652009-05-14 21:28:48 +0300643 ath_rx_ps_beacon(sc, skb);
Sujith1b04b932010-01-08 10:36:05 +0530644 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
Jouni Malinencc659652009-05-14 21:28:48 +0300645 (ieee80211_is_data(hdr->frame_control) ||
646 ieee80211_is_action(hdr->frame_control)) &&
647 is_multicast_ether_addr(hdr->addr1) &&
648 !ieee80211_has_moredata(hdr->frame_control)) {
Jouni Malinencc659652009-05-14 21:28:48 +0300649 /*
650 * No more broadcast/multicast frames to be received at this
651 * point.
652 */
Senthil Balasubramanian3fac6df2010-09-16 15:12:35 -0400653 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
Joe Perches226afe62010-12-02 19:12:37 -0800654 ath_dbg(common, ATH_DBG_PS,
655 "All PS CAB frames received, back to sleep\n");
Sujith1b04b932010-01-08 10:36:05 +0530656 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
Jouni Malinen9a23f9c2009-05-19 17:01:38 +0300657 !is_multicast_ether_addr(hdr->addr1) &&
658 !ieee80211_has_morefrags(hdr->frame_control)) {
Sujith1b04b932010-01-08 10:36:05 +0530659 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
Joe Perches226afe62010-12-02 19:12:37 -0800660 ath_dbg(common, ATH_DBG_PS,
661 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
Sujith1b04b932010-01-08 10:36:05 +0530662 sc->ps_flags & (PS_WAIT_FOR_BEACON |
663 PS_WAIT_FOR_CAB |
664 PS_WAIT_FOR_PSPOLL_DATA |
665 PS_WAIT_FOR_TX_ACK));
Jouni Malinencc659652009-05-14 21:28:48 +0300666 }
667}
668
Felix Fietkaub5c804752010-04-15 17:38:48 -0400669static bool ath_edma_get_buffers(struct ath_softc *sc,
670 enum ath9k_rx_qtype qtype)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700671{
Felix Fietkaub5c804752010-04-15 17:38:48 -0400672 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
673 struct ath_hw *ah = sc->sc_ah;
674 struct ath_common *common = ath9k_hw_common(ah);
675 struct sk_buff *skb;
Sujithbe0418a2008-11-18 09:05:55 +0530676 struct ath_buf *bf;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400677 int ret;
678
679 skb = skb_peek(&rx_edma->rx_fifo);
680 if (!skb)
681 return false;
682
683 bf = SKB_CB_ATHBUF(skb);
684 BUG_ON(!bf);
685
Ming Leice9426d2010-05-15 18:25:40 +0800686 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400687 common->rx_bufsize, DMA_FROM_DEVICE);
688
689 ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
Ming Leice9426d2010-05-15 18:25:40 +0800690 if (ret == -EINPROGRESS) {
691 /*let device gain the buffer again*/
692 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
693 common->rx_bufsize, DMA_FROM_DEVICE);
Felix Fietkaub5c804752010-04-15 17:38:48 -0400694 return false;
Ming Leice9426d2010-05-15 18:25:40 +0800695 }
Felix Fietkaub5c804752010-04-15 17:38:48 -0400696
697 __skb_unlink(skb, &rx_edma->rx_fifo);
698 if (ret == -EINVAL) {
699 /* corrupt descriptor, skip this one and the following one */
700 list_add_tail(&bf->list, &sc->rx.rxbuf);
701 ath_rx_edma_buf_link(sc, qtype);
702 skb = skb_peek(&rx_edma->rx_fifo);
703 if (!skb)
704 return true;
705
706 bf = SKB_CB_ATHBUF(skb);
707 BUG_ON(!bf);
708
709 __skb_unlink(skb, &rx_edma->rx_fifo);
710 list_add_tail(&bf->list, &sc->rx.rxbuf);
711 ath_rx_edma_buf_link(sc, qtype);
Vasanthakumar Thiagarajan083e3e82010-05-10 19:41:34 -0700712 return true;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400713 }
714 skb_queue_tail(&rx_edma->rx_buffers, skb);
715
716 return true;
717}
718
719static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
720 struct ath_rx_status *rs,
721 enum ath9k_rx_qtype qtype)
722{
723 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
724 struct sk_buff *skb;
725 struct ath_buf *bf;
726
727 while (ath_edma_get_buffers(sc, qtype));
728 skb = __skb_dequeue(&rx_edma->rx_buffers);
729 if (!skb)
730 return NULL;
731
732 bf = SKB_CB_ATHBUF(skb);
733 ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
734 return bf;
735}
736
737static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
738 struct ath_rx_status *rs)
739{
740 struct ath_hw *ah = sc->sc_ah;
741 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700742 struct ath_desc *ds;
Felix Fietkaub5c804752010-04-15 17:38:48 -0400743 struct ath_buf *bf;
744 int ret;
745
746 if (list_empty(&sc->rx.rxbuf)) {
747 sc->rx.rxlink = NULL;
748 return NULL;
749 }
750
751 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
752 ds = bf->bf_desc;
753
754 /*
755 * Must provide the virtual address of the current
756 * descriptor, the physical address, and the virtual
757 * address of the next descriptor in the h/w chain.
758 * This allows the HAL to look ahead to see if the
759 * hardware is done with a descriptor by checking the
760 * done bit in the following descriptor and the address
761 * of the current descriptor the DMA engine is working
762 * on. All this is necessary because of our use of
763 * a self-linked list to avoid rx overruns.
764 */
765 ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
766 if (ret == -EINPROGRESS) {
767 struct ath_rx_status trs;
768 struct ath_buf *tbf;
769 struct ath_desc *tds;
770
771 memset(&trs, 0, sizeof(trs));
772 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
773 sc->rx.rxlink = NULL;
774 return NULL;
775 }
776
777 tbf = list_entry(bf->list.next, struct ath_buf, list);
778
779 /*
780 * On some hardware the descriptor status words could
781 * get corrupted, including the done bit. Because of
782 * this, check if the next descriptor's done bit is
783 * set or not.
784 *
785 * If the next descriptor's done bit is set, the current
786 * descriptor has been corrupted. Force s/w to discard
787 * this descriptor and continue...
788 */
789
790 tds = tbf->bf_desc;
791 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
792 if (ret == -EINPROGRESS)
793 return NULL;
794 }
795
796 if (!bf->bf_mpdu)
797 return bf;
798
799 /*
800 * Synchronize the DMA transfer with CPU before
801 * 1. accessing the frame
802 * 2. requeueing the same buffer to h/w
803 */
Ming Leice9426d2010-05-15 18:25:40 +0800804 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
Felix Fietkaub5c804752010-04-15 17:38:48 -0400805 common->rx_bufsize,
806 DMA_FROM_DEVICE);
807
808 return bf;
809}
810
Sujithd4357002010-05-20 15:34:38 +0530811/* Assumes you've already done the endian to CPU conversion */
812static bool ath9k_rx_accept(struct ath_common *common,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700813 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530814 struct ieee80211_rx_status *rxs,
815 struct ath_rx_status *rx_stats,
816 bool *decrypt_error)
817{
Senthil Balasubramanian38852b22010-12-06 19:09:27 +0530818#define is_mc_or_valid_tkip_keyix ((is_mc || \
819 (rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && \
820 test_bit(rx_stats->rs_keyix, common->tkip_keymap))))
821
Sujithd4357002010-05-20 15:34:38 +0530822 struct ath_hw *ah = common->ah;
Sujithd4357002010-05-20 15:34:38 +0530823 __le16 fc;
Vasanthakumar Thiagarajanb7b1b512010-05-20 14:34:48 -0700824 u8 rx_status_len = ah->caps.rx_status_len;
Sujithd4357002010-05-20 15:34:38 +0530825
Sujithd4357002010-05-20 15:34:38 +0530826 fc = hdr->frame_control;
827
828 if (!rx_stats->rs_datalen)
829 return false;
830 /*
831 * rs_status follows rs_datalen so if rs_datalen is too large
832 * we can take a hint that hardware corrupted it, so ignore
833 * those frames.
834 */
Vasanthakumar Thiagarajanb7b1b512010-05-20 14:34:48 -0700835 if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
Sujithd4357002010-05-20 15:34:38 +0530836 return false;
837
Felix Fietkau0d955212011-01-26 18:23:27 +0100838 /* Only use error bits from the last fragment */
Sujithd4357002010-05-20 15:34:38 +0530839 if (rx_stats->rs_more)
Felix Fietkau0d955212011-01-26 18:23:27 +0100840 return true;
Sujithd4357002010-05-20 15:34:38 +0530841
842 /*
843 * The rx_stats->rs_status will not be set until the end of the
844 * chained descriptors so it can be ignored if rs_more is set. The
845 * rs_more will be false at the last element of the chained
846 * descriptors.
847 */
848 if (rx_stats->rs_status != 0) {
849 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
850 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
851 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
852 return false;
853
854 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
855 *decrypt_error = true;
856 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
Senthil Balasubramanian38852b22010-12-06 19:09:27 +0530857 bool is_mc;
Felix Fietkau56363dd2010-08-28 18:21:21 +0200858 /*
859 * The MIC error bit is only valid if the frame
860 * is not a control frame or fragment, and it was
861 * decrypted using a valid TKIP key.
862 */
Senthil Balasubramanian38852b22010-12-06 19:09:27 +0530863 is_mc = !!is_multicast_ether_addr(hdr->addr1);
864
Felix Fietkau56363dd2010-08-28 18:21:21 +0200865 if (!ieee80211_is_ctl(fc) &&
866 !ieee80211_has_morefrags(fc) &&
867 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
Senthil Balasubramanian38852b22010-12-06 19:09:27 +0530868 is_mc_or_valid_tkip_keyix)
Sujithd4357002010-05-20 15:34:38 +0530869 rxs->flag |= RX_FLAG_MMIC_ERROR;
Felix Fietkau56363dd2010-08-28 18:21:21 +0200870 else
871 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
Sujithd4357002010-05-20 15:34:38 +0530872 }
873 /*
874 * Reject error frames with the exception of
875 * decryption and MIC failures. For monitor mode,
876 * we also ignore the CRC error.
877 */
Rajkumar Manoharan5f841b42010-10-27 18:31:15 +0530878 if (ah->is_monitoring) {
Sujithd4357002010-05-20 15:34:38 +0530879 if (rx_stats->rs_status &
880 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
881 ATH9K_RXERR_CRC))
882 return false;
883 } else {
884 if (rx_stats->rs_status &
885 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
886 return false;
887 }
888 }
889 }
890 return true;
891}
892
893static int ath9k_process_rate(struct ath_common *common,
894 struct ieee80211_hw *hw,
895 struct ath_rx_status *rx_stats,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700896 struct ieee80211_rx_status *rxs)
Sujithd4357002010-05-20 15:34:38 +0530897{
898 struct ieee80211_supported_band *sband;
899 enum ieee80211_band band;
900 unsigned int i = 0;
901
902 band = hw->conf.channel->band;
903 sband = hw->wiphy->bands[band];
904
905 if (rx_stats->rs_rate & 0x80) {
906 /* HT rate */
907 rxs->flag |= RX_FLAG_HT;
908 if (rx_stats->rs_flags & ATH9K_RX_2040)
909 rxs->flag |= RX_FLAG_40MHZ;
910 if (rx_stats->rs_flags & ATH9K_RX_GI)
911 rxs->flag |= RX_FLAG_SHORT_GI;
912 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
913 return 0;
914 }
915
916 for (i = 0; i < sband->n_bitrates; i++) {
917 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
918 rxs->rate_idx = i;
919 return 0;
920 }
921 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
922 rxs->flag |= RX_FLAG_SHORTPRE;
923 rxs->rate_idx = i;
924 return 0;
925 }
926 }
927
928 /*
929 * No valid hardware bitrate found -- we should not get here
930 * because hardware has already validated this frame as OK.
931 */
Joe Perches226afe62010-12-02 19:12:37 -0800932 ath_dbg(common, ATH_DBG_XMIT,
933 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
934 rx_stats->rs_rate);
Sujithd4357002010-05-20 15:34:38 +0530935
936 return -EINVAL;
937}
938
939static void ath9k_process_rssi(struct ath_common *common,
940 struct ieee80211_hw *hw,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700941 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530942 struct ath_rx_status *rx_stats)
943{
Felix Fietkau9ac586152011-01-24 19:23:18 +0100944 struct ath_softc *sc = hw->priv;
Sujithd4357002010-05-20 15:34:38 +0530945 struct ath_hw *ah = common->ah;
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200946 int last_rssi;
Sujithd4357002010-05-20 15:34:38 +0530947 __le16 fc;
948
Rajkumar Manoharan2b892a92011-05-09 19:11:28 +0530949 if ((ah->opmode != NL80211_IFTYPE_STATION) &&
950 (ah->opmode != NL80211_IFTYPE_ADHOC))
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200951 return;
952
Sujithd4357002010-05-20 15:34:38 +0530953 fc = hdr->frame_control;
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200954 if (!ieee80211_is_beacon(fc) ||
Ben Greear48014162011-01-15 19:13:48 +0000955 compare_ether_addr(hdr->addr3, common->curbssid)) {
956 /* TODO: This doesn't work well if you have stations
957 * associated to two different APs because curbssid
958 * is just the last AP that any of the stations associated
959 * with.
960 */
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200961 return;
Ben Greear48014162011-01-15 19:13:48 +0000962 }
Sujithd4357002010-05-20 15:34:38 +0530963
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200964 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
Felix Fietkau9ac586152011-01-24 19:23:18 +0100965 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
Ben Greear686b9cb2010-09-23 09:44:36 -0700966
Felix Fietkau9ac586152011-01-24 19:23:18 +0100967 last_rssi = sc->last_rssi;
Sujithd4357002010-05-20 15:34:38 +0530968 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
969 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
970 ATH_RSSI_EP_MULTIPLIER);
971 if (rx_stats->rs_rssi < 0)
972 rx_stats->rs_rssi = 0;
973
974 /* Update Beacon RSSI, this is used by ANI. */
Felix Fietkau9fa23e12010-10-15 20:03:31 +0200975 ah->stats.avgbrssi = rx_stats->rs_rssi;
Sujithd4357002010-05-20 15:34:38 +0530976}
977
978/*
979 * For Decrypt or Demic errors, we only mark packet status here and always push
980 * up the frame up to let mac80211 handle the actual error case, be it no
981 * decryption key or real decryption error. This let us keep statistics there.
982 */
983static int ath9k_rx_skb_preprocess(struct ath_common *common,
984 struct ieee80211_hw *hw,
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700985 struct ieee80211_hdr *hdr,
Sujithd4357002010-05-20 15:34:38 +0530986 struct ath_rx_status *rx_stats,
987 struct ieee80211_rx_status *rx_status,
988 bool *decrypt_error)
989{
Sujithd4357002010-05-20 15:34:38 +0530990 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
991
992 /*
993 * everything but the rate is checked here, the rate check is done
994 * separately to avoid doing two lookups for a rate for each frame.
995 */
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -0700996 if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
Sujithd4357002010-05-20 15:34:38 +0530997 return -EINVAL;
998
Felix Fietkau0d955212011-01-26 18:23:27 +0100999 /* Only use status info from the last fragment */
1000 if (rx_stats->rs_more)
1001 return 0;
1002
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -07001003 ath9k_process_rssi(common, hw, hdr, rx_stats);
Sujithd4357002010-05-20 15:34:38 +05301004
Vasanthakumar Thiagarajan9f167f62010-05-20 14:34:46 -07001005 if (ath9k_process_rate(common, hw, rx_stats, rx_status))
Sujithd4357002010-05-20 15:34:38 +05301006 return -EINVAL;
1007
Sujithd4357002010-05-20 15:34:38 +05301008 rx_status->band = hw->conf.channel->band;
1009 rx_status->freq = hw->conf.channel->center_freq;
1010 rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1011 rx_status->antenna = rx_stats->rs_antenna;
Johannes Berg6ebacbb2011-02-23 15:06:08 +01001012 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
Sujithd4357002010-05-20 15:34:38 +05301013
1014 return 0;
1015}
1016
1017static void ath9k_rx_skb_postprocess(struct ath_common *common,
1018 struct sk_buff *skb,
1019 struct ath_rx_status *rx_stats,
1020 struct ieee80211_rx_status *rxs,
1021 bool decrypt_error)
1022{
1023 struct ath_hw *ah = common->ah;
1024 struct ieee80211_hdr *hdr;
1025 int hdrlen, padpos, padsize;
1026 u8 keyix;
1027 __le16 fc;
1028
1029 /* see if any padding is done by the hw and remove it */
1030 hdr = (struct ieee80211_hdr *) skb->data;
1031 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1032 fc = hdr->frame_control;
1033 padpos = ath9k_cmn_padpos(hdr->frame_control);
1034
1035 /* The MAC header is padded to have 32-bit boundary if the
1036 * packet payload is non-zero. The general calculation for
1037 * padsize would take into account odd header lengths:
1038 * padsize = (4 - padpos % 4) % 4; However, since only
1039 * even-length headers are used, padding can only be 0 or 2
1040 * bytes and we can optimize this a bit. In addition, we must
1041 * not try to remove padding from short control frames that do
1042 * not have payload. */
1043 padsize = padpos & 3;
1044 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1045 memmove(skb->data + padsize, skb->data, padpos);
1046 skb_pull(skb, padsize);
1047 }
1048
1049 keyix = rx_stats->rs_keyix;
1050
1051 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1052 ieee80211_has_protected(fc)) {
1053 rxs->flag |= RX_FLAG_DECRYPTED;
1054 } else if (ieee80211_has_protected(fc)
1055 && !decrypt_error && skb->len >= hdrlen + 4) {
1056 keyix = skb->data[hdrlen + 3] >> 6;
1057
1058 if (test_bit(keyix, common->keymap))
1059 rxs->flag |= RX_FLAG_DECRYPTED;
1060 }
1061 if (ah->sw_mgmt_crypto &&
1062 (rxs->flag & RX_FLAG_DECRYPTED) &&
1063 ieee80211_is_mgmt(fc))
1064 /* Use software decrypt for management frames. */
1065 rxs->flag &= ~RX_FLAG_DECRYPTED;
1066}
Felix Fietkaub5c804752010-04-15 17:38:48 -04001067
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001068static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1069 struct ath_hw_antcomb_conf ant_conf,
1070 int main_rssi_avg)
1071{
1072 antcomb->quick_scan_cnt = 0;
1073
1074 if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1075 antcomb->rssi_lna2 = main_rssi_avg;
1076 else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1077 antcomb->rssi_lna1 = main_rssi_avg;
1078
1079 switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001080 case 0x10: /* LNA2 A-B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001081 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1082 antcomb->first_quick_scan_conf =
1083 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1084 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1085 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001086 case 0x20: /* LNA1 A-B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001087 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1088 antcomb->first_quick_scan_conf =
1089 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1090 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1091 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001092 case 0x21: /* LNA1 LNA2 */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001093 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1094 antcomb->first_quick_scan_conf =
1095 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1096 antcomb->second_quick_scan_conf =
1097 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1098 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001099 case 0x12: /* LNA2 LNA1 */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001100 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1101 antcomb->first_quick_scan_conf =
1102 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1103 antcomb->second_quick_scan_conf =
1104 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1105 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001106 case 0x13: /* LNA2 A+B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001107 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1108 antcomb->first_quick_scan_conf =
1109 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1110 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1111 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001112 case 0x23: /* LNA1 A+B */
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001113 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1114 antcomb->first_quick_scan_conf =
1115 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1116 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1117 break;
1118 default:
1119 break;
1120 }
1121}
1122
1123static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1124 struct ath_hw_antcomb_conf *div_ant_conf,
1125 int main_rssi_avg, int alt_rssi_avg,
1126 int alt_ratio)
1127{
1128 /* alt_good */
1129 switch (antcomb->quick_scan_cnt) {
1130 case 0:
1131 /* set alt to main, and alt to first conf */
1132 div_ant_conf->main_lna_conf = antcomb->main_conf;
1133 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1134 break;
1135 case 1:
1136 /* set alt to main, and alt to first conf */
1137 div_ant_conf->main_lna_conf = antcomb->main_conf;
1138 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1139 antcomb->rssi_first = main_rssi_avg;
1140 antcomb->rssi_second = alt_rssi_avg;
1141
1142 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1143 /* main is LNA1 */
1144 if (ath_is_alt_ant_ratio_better(alt_ratio,
1145 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1146 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1147 main_rssi_avg, alt_rssi_avg,
1148 antcomb->total_pkt_count))
1149 antcomb->first_ratio = true;
1150 else
1151 antcomb->first_ratio = false;
1152 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1153 if (ath_is_alt_ant_ratio_better(alt_ratio,
1154 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1155 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1156 main_rssi_avg, alt_rssi_avg,
1157 antcomb->total_pkt_count))
1158 antcomb->first_ratio = true;
1159 else
1160 antcomb->first_ratio = false;
1161 } else {
1162 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1163 (alt_rssi_avg > main_rssi_avg +
1164 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1165 (alt_rssi_avg > main_rssi_avg)) &&
1166 (antcomb->total_pkt_count > 50))
1167 antcomb->first_ratio = true;
1168 else
1169 antcomb->first_ratio = false;
1170 }
1171 break;
1172 case 2:
1173 antcomb->alt_good = false;
1174 antcomb->scan_not_start = false;
1175 antcomb->scan = false;
1176 antcomb->rssi_first = main_rssi_avg;
1177 antcomb->rssi_third = alt_rssi_avg;
1178
1179 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1180 antcomb->rssi_lna1 = alt_rssi_avg;
1181 else if (antcomb->second_quick_scan_conf ==
1182 ATH_ANT_DIV_COMB_LNA2)
1183 antcomb->rssi_lna2 = alt_rssi_avg;
1184 else if (antcomb->second_quick_scan_conf ==
1185 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1186 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1187 antcomb->rssi_lna2 = main_rssi_avg;
1188 else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1189 antcomb->rssi_lna1 = main_rssi_avg;
1190 }
1191
1192 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1193 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1194 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1195 else
1196 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1197
1198 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1199 if (ath_is_alt_ant_ratio_better(alt_ratio,
1200 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1201 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1202 main_rssi_avg, alt_rssi_avg,
1203 antcomb->total_pkt_count))
1204 antcomb->second_ratio = true;
1205 else
1206 antcomb->second_ratio = false;
1207 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1208 if (ath_is_alt_ant_ratio_better(alt_ratio,
1209 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1210 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1211 main_rssi_avg, alt_rssi_avg,
1212 antcomb->total_pkt_count))
1213 antcomb->second_ratio = true;
1214 else
1215 antcomb->second_ratio = false;
1216 } else {
1217 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1218 (alt_rssi_avg > main_rssi_avg +
1219 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1220 (alt_rssi_avg > main_rssi_avg)) &&
1221 (antcomb->total_pkt_count > 50))
1222 antcomb->second_ratio = true;
1223 else
1224 antcomb->second_ratio = false;
1225 }
1226
1227 /* set alt to the conf with maximun ratio */
1228 if (antcomb->first_ratio && antcomb->second_ratio) {
1229 if (antcomb->rssi_second > antcomb->rssi_third) {
1230 /* first alt*/
1231 if ((antcomb->first_quick_scan_conf ==
1232 ATH_ANT_DIV_COMB_LNA1) ||
1233 (antcomb->first_quick_scan_conf ==
1234 ATH_ANT_DIV_COMB_LNA2))
1235 /* Set alt LNA1 or LNA2*/
1236 if (div_ant_conf->main_lna_conf ==
1237 ATH_ANT_DIV_COMB_LNA2)
1238 div_ant_conf->alt_lna_conf =
1239 ATH_ANT_DIV_COMB_LNA1;
1240 else
1241 div_ant_conf->alt_lna_conf =
1242 ATH_ANT_DIV_COMB_LNA2;
1243 else
1244 /* Set alt to A+B or A-B */
1245 div_ant_conf->alt_lna_conf =
1246 antcomb->first_quick_scan_conf;
1247 } else if ((antcomb->second_quick_scan_conf ==
1248 ATH_ANT_DIV_COMB_LNA1) ||
1249 (antcomb->second_quick_scan_conf ==
1250 ATH_ANT_DIV_COMB_LNA2)) {
1251 /* Set alt LNA1 or LNA2 */
1252 if (div_ant_conf->main_lna_conf ==
1253 ATH_ANT_DIV_COMB_LNA2)
1254 div_ant_conf->alt_lna_conf =
1255 ATH_ANT_DIV_COMB_LNA1;
1256 else
1257 div_ant_conf->alt_lna_conf =
1258 ATH_ANT_DIV_COMB_LNA2;
1259 } else {
1260 /* Set alt to A+B or A-B */
1261 div_ant_conf->alt_lna_conf =
1262 antcomb->second_quick_scan_conf;
1263 }
1264 } else if (antcomb->first_ratio) {
1265 /* first alt */
1266 if ((antcomb->first_quick_scan_conf ==
1267 ATH_ANT_DIV_COMB_LNA1) ||
1268 (antcomb->first_quick_scan_conf ==
1269 ATH_ANT_DIV_COMB_LNA2))
1270 /* Set alt LNA1 or LNA2 */
1271 if (div_ant_conf->main_lna_conf ==
1272 ATH_ANT_DIV_COMB_LNA2)
1273 div_ant_conf->alt_lna_conf =
1274 ATH_ANT_DIV_COMB_LNA1;
1275 else
1276 div_ant_conf->alt_lna_conf =
1277 ATH_ANT_DIV_COMB_LNA2;
1278 else
1279 /* Set alt to A+B or A-B */
1280 div_ant_conf->alt_lna_conf =
1281 antcomb->first_quick_scan_conf;
1282 } else if (antcomb->second_ratio) {
1283 /* second alt */
1284 if ((antcomb->second_quick_scan_conf ==
1285 ATH_ANT_DIV_COMB_LNA1) ||
1286 (antcomb->second_quick_scan_conf ==
1287 ATH_ANT_DIV_COMB_LNA2))
1288 /* Set alt LNA1 or LNA2 */
1289 if (div_ant_conf->main_lna_conf ==
1290 ATH_ANT_DIV_COMB_LNA2)
1291 div_ant_conf->alt_lna_conf =
1292 ATH_ANT_DIV_COMB_LNA1;
1293 else
1294 div_ant_conf->alt_lna_conf =
1295 ATH_ANT_DIV_COMB_LNA2;
1296 else
1297 /* Set alt to A+B or A-B */
1298 div_ant_conf->alt_lna_conf =
1299 antcomb->second_quick_scan_conf;
1300 } else {
1301 /* main is largest */
1302 if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1303 (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1304 /* Set alt LNA1 or LNA2 */
1305 if (div_ant_conf->main_lna_conf ==
1306 ATH_ANT_DIV_COMB_LNA2)
1307 div_ant_conf->alt_lna_conf =
1308 ATH_ANT_DIV_COMB_LNA1;
1309 else
1310 div_ant_conf->alt_lna_conf =
1311 ATH_ANT_DIV_COMB_LNA2;
1312 else
1313 /* Set alt to A+B or A-B */
1314 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1315 }
1316 break;
1317 default:
1318 break;
1319 }
1320}
1321
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301322static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1323 struct ath_ant_comb *antcomb, int alt_ratio)
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001324{
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301325 if (ant_conf->div_group == 0) {
1326 /* Adjust the fast_div_bias based on main and alt lna conf */
1327 switch ((ant_conf->main_lna_conf << 4) |
1328 ant_conf->alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001329 case 0x01: /* A-B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301330 ant_conf->fast_div_bias = 0x3b;
1331 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001332 case 0x02: /* A-B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301333 ant_conf->fast_div_bias = 0x3d;
1334 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001335 case 0x03: /* A-B A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301336 ant_conf->fast_div_bias = 0x1;
1337 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001338 case 0x10: /* LNA2 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301339 ant_conf->fast_div_bias = 0x7;
1340 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001341 case 0x12: /* LNA2 LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301342 ant_conf->fast_div_bias = 0x2;
1343 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001344 case 0x13: /* LNA2 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301345 ant_conf->fast_div_bias = 0x7;
1346 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001347 case 0x20: /* LNA1 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301348 ant_conf->fast_div_bias = 0x6;
1349 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001350 case 0x21: /* LNA1 LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301351 ant_conf->fast_div_bias = 0x0;
1352 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001353 case 0x23: /* LNA1 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301354 ant_conf->fast_div_bias = 0x6;
1355 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001356 case 0x30: /* A+B A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301357 ant_conf->fast_div_bias = 0x1;
1358 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001359 case 0x31: /* A+B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301360 ant_conf->fast_div_bias = 0x3b;
1361 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001362 case 0x32: /* A+B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301363 ant_conf->fast_div_bias = 0x3d;
1364 break;
1365 default:
1366 break;
1367 }
Gabor Juhose7ef5bc2011-06-21 11:23:46 +02001368 } else if (ant_conf->div_group == 1) {
1369 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1370 switch ((ant_conf->main_lna_conf << 4) |
1371 ant_conf->alt_lna_conf) {
1372 case 0x01: /* A-B LNA2 */
1373 ant_conf->fast_div_bias = 0x1;
1374 ant_conf->main_gaintb = 0;
1375 ant_conf->alt_gaintb = 0;
1376 break;
1377 case 0x02: /* A-B LNA1 */
1378 ant_conf->fast_div_bias = 0x1;
1379 ant_conf->main_gaintb = 0;
1380 ant_conf->alt_gaintb = 0;
1381 break;
1382 case 0x03: /* A-B A+B */
1383 ant_conf->fast_div_bias = 0x1;
1384 ant_conf->main_gaintb = 0;
1385 ant_conf->alt_gaintb = 0;
1386 break;
1387 case 0x10: /* LNA2 A-B */
1388 if (!(antcomb->scan) &&
1389 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1390 ant_conf->fast_div_bias = 0x3f;
1391 else
1392 ant_conf->fast_div_bias = 0x1;
1393 ant_conf->main_gaintb = 0;
1394 ant_conf->alt_gaintb = 0;
1395 break;
1396 case 0x12: /* LNA2 LNA1 */
1397 ant_conf->fast_div_bias = 0x1;
1398 ant_conf->main_gaintb = 0;
1399 ant_conf->alt_gaintb = 0;
1400 break;
1401 case 0x13: /* LNA2 A+B */
1402 if (!(antcomb->scan) &&
1403 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1404 ant_conf->fast_div_bias = 0x3f;
1405 else
1406 ant_conf->fast_div_bias = 0x1;
1407 ant_conf->main_gaintb = 0;
1408 ant_conf->alt_gaintb = 0;
1409 break;
1410 case 0x20: /* LNA1 A-B */
1411 if (!(antcomb->scan) &&
1412 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1413 ant_conf->fast_div_bias = 0x3f;
1414 else
1415 ant_conf->fast_div_bias = 0x1;
1416 ant_conf->main_gaintb = 0;
1417 ant_conf->alt_gaintb = 0;
1418 break;
1419 case 0x21: /* LNA1 LNA2 */
1420 ant_conf->fast_div_bias = 0x1;
1421 ant_conf->main_gaintb = 0;
1422 ant_conf->alt_gaintb = 0;
1423 break;
1424 case 0x23: /* LNA1 A+B */
1425 if (!(antcomb->scan) &&
1426 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1427 ant_conf->fast_div_bias = 0x3f;
1428 else
1429 ant_conf->fast_div_bias = 0x1;
1430 ant_conf->main_gaintb = 0;
1431 ant_conf->alt_gaintb = 0;
1432 break;
1433 case 0x30: /* A+B A-B */
1434 ant_conf->fast_div_bias = 0x1;
1435 ant_conf->main_gaintb = 0;
1436 ant_conf->alt_gaintb = 0;
1437 break;
1438 case 0x31: /* A+B LNA2 */
1439 ant_conf->fast_div_bias = 0x1;
1440 ant_conf->main_gaintb = 0;
1441 ant_conf->alt_gaintb = 0;
1442 break;
1443 case 0x32: /* A+B LNA1 */
1444 ant_conf->fast_div_bias = 0x1;
1445 ant_conf->main_gaintb = 0;
1446 ant_conf->alt_gaintb = 0;
1447 break;
1448 default:
1449 break;
1450 }
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301451 } else if (ant_conf->div_group == 2) {
1452 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1453 switch ((ant_conf->main_lna_conf << 4) |
1454 ant_conf->alt_lna_conf) {
Gabor Juhos223c5a82011-06-21 11:23:45 +02001455 case 0x01: /* A-B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301456 ant_conf->fast_div_bias = 0x1;
1457 ant_conf->main_gaintb = 0;
1458 ant_conf->alt_gaintb = 0;
1459 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001460 case 0x02: /* A-B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301461 ant_conf->fast_div_bias = 0x1;
1462 ant_conf->main_gaintb = 0;
1463 ant_conf->alt_gaintb = 0;
1464 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001465 case 0x03: /* A-B A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301466 ant_conf->fast_div_bias = 0x1;
1467 ant_conf->main_gaintb = 0;
1468 ant_conf->alt_gaintb = 0;
1469 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001470 case 0x10: /* LNA2 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301471 if (!(antcomb->scan) &&
1472 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1473 ant_conf->fast_div_bias = 0x1;
1474 else
1475 ant_conf->fast_div_bias = 0x2;
1476 ant_conf->main_gaintb = 0;
1477 ant_conf->alt_gaintb = 0;
1478 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001479 case 0x12: /* LNA2 LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301480 ant_conf->fast_div_bias = 0x1;
1481 ant_conf->main_gaintb = 0;
1482 ant_conf->alt_gaintb = 0;
1483 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001484 case 0x13: /* LNA2 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301485 if (!(antcomb->scan) &&
1486 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1487 ant_conf->fast_div_bias = 0x1;
1488 else
1489 ant_conf->fast_div_bias = 0x2;
1490 ant_conf->main_gaintb = 0;
1491 ant_conf->alt_gaintb = 0;
1492 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001493 case 0x20: /* LNA1 A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301494 if (!(antcomb->scan) &&
1495 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1496 ant_conf->fast_div_bias = 0x1;
1497 else
1498 ant_conf->fast_div_bias = 0x2;
1499 ant_conf->main_gaintb = 0;
1500 ant_conf->alt_gaintb = 0;
1501 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001502 case 0x21: /* LNA1 LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301503 ant_conf->fast_div_bias = 0x1;
1504 ant_conf->main_gaintb = 0;
1505 ant_conf->alt_gaintb = 0;
1506 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001507 case 0x23: /* LNA1 A+B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301508 if (!(antcomb->scan) &&
1509 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1510 ant_conf->fast_div_bias = 0x1;
1511 else
1512 ant_conf->fast_div_bias = 0x2;
1513 ant_conf->main_gaintb = 0;
1514 ant_conf->alt_gaintb = 0;
1515 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001516 case 0x30: /* A+B A-B */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301517 ant_conf->fast_div_bias = 0x1;
1518 ant_conf->main_gaintb = 0;
1519 ant_conf->alt_gaintb = 0;
1520 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001521 case 0x31: /* A+B LNA2 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301522 ant_conf->fast_div_bias = 0x1;
1523 ant_conf->main_gaintb = 0;
1524 ant_conf->alt_gaintb = 0;
1525 break;
Gabor Juhos223c5a82011-06-21 11:23:45 +02001526 case 0x32: /* A+B LNA1 */
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301527 ant_conf->fast_div_bias = 0x1;
1528 ant_conf->main_gaintb = 0;
1529 ant_conf->alt_gaintb = 0;
1530 break;
1531 default:
1532 break;
1533 }
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001534 }
1535}
1536
1537/* Antenna diversity and combining */
1538static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1539{
1540 struct ath_hw_antcomb_conf div_ant_conf;
1541 struct ath_ant_comb *antcomb = &sc->ant_comb;
1542 int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
Sujith Manoharan0ff2b5c2011-04-20 11:00:34 +05301543 int curr_main_set;
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001544 int main_rssi = rs->rs_rssi_ctl0;
1545 int alt_rssi = rs->rs_rssi_ctl1;
1546 int rx_ant_conf, main_ant_conf;
1547 bool short_scan = false;
1548
1549 rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1550 ATH_ANT_RX_MASK;
1551 main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1552 ATH_ANT_RX_MASK;
1553
Mohammed Shafi Shajakhan21e8ee62011-05-13 20:31:40 +05301554 /* Record packet only when both main_rssi and alt_rssi is positive */
1555 if (main_rssi > 0 && alt_rssi > 0) {
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001556 antcomb->total_pkt_count++;
1557 antcomb->main_total_rssi += main_rssi;
1558 antcomb->alt_total_rssi += alt_rssi;
1559 if (main_ant_conf == rx_ant_conf)
1560 antcomb->main_recv_cnt++;
1561 else
1562 antcomb->alt_recv_cnt++;
1563 }
1564
1565 /* Short scan check */
1566 if (antcomb->scan && antcomb->alt_good) {
1567 if (time_after(jiffies, antcomb->scan_start_time +
1568 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1569 short_scan = true;
1570 else
1571 if (antcomb->total_pkt_count ==
1572 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1573 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1574 antcomb->total_pkt_count);
1575 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1576 short_scan = true;
1577 }
1578 }
1579
1580 if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1581 rs->rs_moreaggr) && !short_scan)
1582 return;
1583
1584 if (antcomb->total_pkt_count) {
1585 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1586 antcomb->total_pkt_count);
1587 main_rssi_avg = (antcomb->main_total_rssi /
1588 antcomb->total_pkt_count);
1589 alt_rssi_avg = (antcomb->alt_total_rssi /
1590 antcomb->total_pkt_count);
1591 }
1592
1593
1594 ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1595 curr_alt_set = div_ant_conf.alt_lna_conf;
1596 curr_main_set = div_ant_conf.main_lna_conf;
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001597
1598 antcomb->count++;
1599
1600 if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1601 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1602 ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1603 main_rssi_avg);
1604 antcomb->alt_good = true;
1605 } else {
1606 antcomb->alt_good = false;
1607 }
1608
1609 antcomb->count = 0;
1610 antcomb->scan = true;
1611 antcomb->scan_not_start = true;
1612 }
1613
1614 if (!antcomb->scan) {
Mohammed Shafi Shajakhanb85c5732011-05-13 20:31:09 +05301615 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1616 alt_ratio, curr_main_set, curr_alt_set,
1617 alt_rssi_avg, main_rssi_avg)) {
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001618 if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1619 /* Switch main and alt LNA */
1620 div_ant_conf.main_lna_conf =
1621 ATH_ANT_DIV_COMB_LNA2;
1622 div_ant_conf.alt_lna_conf =
1623 ATH_ANT_DIV_COMB_LNA1;
1624 } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1625 div_ant_conf.main_lna_conf =
1626 ATH_ANT_DIV_COMB_LNA1;
1627 div_ant_conf.alt_lna_conf =
1628 ATH_ANT_DIV_COMB_LNA2;
1629 }
1630
1631 goto div_comb_done;
1632 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1633 (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1634 /* Set alt to another LNA */
1635 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1636 div_ant_conf.alt_lna_conf =
1637 ATH_ANT_DIV_COMB_LNA1;
1638 else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1639 div_ant_conf.alt_lna_conf =
1640 ATH_ANT_DIV_COMB_LNA2;
1641
1642 goto div_comb_done;
1643 }
1644
1645 if ((alt_rssi_avg < (main_rssi_avg +
Mohammed Shafi Shajakhan8afbcc82011-05-13 20:30:56 +05301646 div_ant_conf.lna1_lna2_delta)))
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001647 goto div_comb_done;
1648 }
1649
1650 if (!antcomb->scan_not_start) {
1651 switch (curr_alt_set) {
1652 case ATH_ANT_DIV_COMB_LNA2:
1653 antcomb->rssi_lna2 = alt_rssi_avg;
1654 antcomb->rssi_lna1 = main_rssi_avg;
1655 antcomb->scan = true;
1656 /* set to A+B */
1657 div_ant_conf.main_lna_conf =
1658 ATH_ANT_DIV_COMB_LNA1;
1659 div_ant_conf.alt_lna_conf =
1660 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1661 break;
1662 case ATH_ANT_DIV_COMB_LNA1:
1663 antcomb->rssi_lna1 = alt_rssi_avg;
1664 antcomb->rssi_lna2 = main_rssi_avg;
1665 antcomb->scan = true;
1666 /* set to A+B */
1667 div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1668 div_ant_conf.alt_lna_conf =
1669 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1670 break;
1671 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1672 antcomb->rssi_add = alt_rssi_avg;
1673 antcomb->scan = true;
1674 /* set to A-B */
1675 div_ant_conf.alt_lna_conf =
1676 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1677 break;
1678 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1679 antcomb->rssi_sub = alt_rssi_avg;
1680 antcomb->scan = false;
1681 if (antcomb->rssi_lna2 >
1682 (antcomb->rssi_lna1 +
1683 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1684 /* use LNA2 as main LNA */
1685 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1686 (antcomb->rssi_add > antcomb->rssi_sub)) {
1687 /* set to A+B */
1688 div_ant_conf.main_lna_conf =
1689 ATH_ANT_DIV_COMB_LNA2;
1690 div_ant_conf.alt_lna_conf =
1691 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1692 } else if (antcomb->rssi_sub >
1693 antcomb->rssi_lna1) {
1694 /* set to A-B */
1695 div_ant_conf.main_lna_conf =
1696 ATH_ANT_DIV_COMB_LNA2;
1697 div_ant_conf.alt_lna_conf =
1698 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1699 } else {
1700 /* set to LNA1 */
1701 div_ant_conf.main_lna_conf =
1702 ATH_ANT_DIV_COMB_LNA2;
1703 div_ant_conf.alt_lna_conf =
1704 ATH_ANT_DIV_COMB_LNA1;
1705 }
1706 } else {
1707 /* use LNA1 as main LNA */
1708 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1709 (antcomb->rssi_add > antcomb->rssi_sub)) {
1710 /* set to A+B */
1711 div_ant_conf.main_lna_conf =
1712 ATH_ANT_DIV_COMB_LNA1;
1713 div_ant_conf.alt_lna_conf =
1714 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1715 } else if (antcomb->rssi_sub >
1716 antcomb->rssi_lna1) {
1717 /* set to A-B */
1718 div_ant_conf.main_lna_conf =
1719 ATH_ANT_DIV_COMB_LNA1;
1720 div_ant_conf.alt_lna_conf =
1721 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1722 } else {
1723 /* set to LNA2 */
1724 div_ant_conf.main_lna_conf =
1725 ATH_ANT_DIV_COMB_LNA1;
1726 div_ant_conf.alt_lna_conf =
1727 ATH_ANT_DIV_COMB_LNA2;
1728 }
1729 }
1730 break;
1731 default:
1732 break;
1733 }
1734 } else {
1735 if (!antcomb->alt_good) {
1736 antcomb->scan_not_start = false;
1737 /* Set alt to another LNA */
1738 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1739 div_ant_conf.main_lna_conf =
1740 ATH_ANT_DIV_COMB_LNA2;
1741 div_ant_conf.alt_lna_conf =
1742 ATH_ANT_DIV_COMB_LNA1;
1743 } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1744 div_ant_conf.main_lna_conf =
1745 ATH_ANT_DIV_COMB_LNA1;
1746 div_ant_conf.alt_lna_conf =
1747 ATH_ANT_DIV_COMB_LNA2;
1748 }
1749 goto div_comb_done;
1750 }
1751 }
1752
1753 ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1754 main_rssi_avg, alt_rssi_avg,
1755 alt_ratio);
1756
1757 antcomb->quick_scan_cnt++;
1758
1759div_comb_done:
Mohammed Shafi Shajakhan3e9a2122011-05-13 20:31:23 +05301760 ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001761 ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1762
1763 antcomb->scan_start_time = jiffies;
1764 antcomb->total_pkt_count = 0;
1765 antcomb->main_total_rssi = 0;
1766 antcomb->alt_total_rssi = 0;
1767 antcomb->main_recv_cnt = 0;
1768 antcomb->alt_recv_cnt = 0;
1769}
1770
Felix Fietkaub5c804752010-04-15 17:38:48 -04001771int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1772{
1773 struct ath_buf *bf;
Felix Fietkau0d955212011-01-26 18:23:27 +01001774 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
Luis R. Rodriguez5ca42622009-11-04 08:20:42 -08001775 struct ieee80211_rx_status *rxs;
Sujithcbe61d82009-02-09 13:27:12 +05301776 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001777 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezb4afffc2009-11-02 11:36:08 -08001778 /*
Mohammed Shafi Shajakhancae6b742010-12-07 21:23:16 +05301779 * The hw can technically differ from common->hw when using ath9k
Luis R. Rodriguezb4afffc2009-11-02 11:36:08 -08001780 * virtual wiphy so to account for that we iterate over the active
1781 * wiphys and find the appropriate wiphy and therefore hw.
1782 */
Felix Fietkau7545daf2011-01-24 19:23:16 +01001783 struct ieee80211_hw *hw = sc->hw;
Sujithbe0418a2008-11-18 09:05:55 +05301784 struct ieee80211_hdr *hdr;
Luis R. Rodriguezc9b14172009-11-04 16:47:22 -08001785 int retval;
Sujithbe0418a2008-11-18 09:05:55 +05301786 bool decrypt_error = false;
Felix Fietkau29bffa92010-03-29 20:14:23 -07001787 struct ath_rx_status rs;
Felix Fietkaub5c804752010-04-15 17:38:48 -04001788 enum ath9k_rx_qtype qtype;
1789 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1790 int dma_type;
Vasanthakumar Thiagarajan5c6dd922010-05-20 14:34:47 -07001791 u8 rx_status_len = ah->caps.rx_status_len;
Felix Fietkaua6d20552010-06-12 00:33:54 -04001792 u64 tsf = 0;
1793 u32 tsf_lower = 0;
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001794 unsigned long flags;
Sujithbe0418a2008-11-18 09:05:55 +05301795
Felix Fietkaub5c804752010-04-15 17:38:48 -04001796 if (edma)
Felix Fietkaub5c804752010-04-15 17:38:48 -04001797 dma_type = DMA_BIDIRECTIONAL;
Ming Lei56824222010-05-14 21:15:38 +08001798 else
1799 dma_type = DMA_FROM_DEVICE;
Felix Fietkaub5c804752010-04-15 17:38:48 -04001800
1801 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
Sujithb77f4832008-12-07 21:44:03 +05301802 spin_lock_bh(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001803
Felix Fietkaua6d20552010-06-12 00:33:54 -04001804 tsf = ath9k_hw_gettsf64(ah);
1805 tsf_lower = tsf & 0xffffffff;
1806
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001807 do {
1808 /* If handling rx interrupt and flush is in progress => exit */
Sujith98deeea2008-08-11 14:05:46 +05301809 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001810 break;
1811
Felix Fietkau29bffa92010-03-29 20:14:23 -07001812 memset(&rs, 0, sizeof(rs));
Felix Fietkaub5c804752010-04-15 17:38:48 -04001813 if (edma)
1814 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1815 else
1816 bf = ath_get_next_rx_buf(sc, &rs);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001817
Felix Fietkaub5c804752010-04-15 17:38:48 -04001818 if (!bf)
1819 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001820
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001821 skb = bf->bf_mpdu;
Sujithbe0418a2008-11-18 09:05:55 +05301822 if (!skb)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001823 continue;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001824
Felix Fietkau0d955212011-01-26 18:23:27 +01001825 /*
1826 * Take frame header from the first fragment and RX status from
1827 * the last one.
1828 */
1829 if (sc->rx.frag)
1830 hdr_skb = sc->rx.frag;
1831 else
1832 hdr_skb = skb;
1833
1834 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1835 rxs = IEEE80211_SKB_RXCB(hdr_skb);
Luis R. Rodriguez5ca42622009-11-04 08:20:42 -08001836
Felix Fietkau29bffa92010-03-29 20:14:23 -07001837 ath_debug_stat_rx(sc, &rs);
Sujith1395d3f2010-01-08 10:36:11 +05301838
Vasanthakumar Thiagarajan9bf9fca2008-12-15 20:40:46 +05301839 /*
Sujithbe0418a2008-11-18 09:05:55 +05301840 * If we're asked to flush receive queue, directly
1841 * chain it back at the queue without processing it.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001842 */
Sujithbe0418a2008-11-18 09:05:55 +05301843 if (flush)
Felix Fietkau0d955212011-01-26 18:23:27 +01001844 goto requeue_drop_frag;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001845
Jan Friedrichc8f3b722010-08-02 23:55:50 +02001846 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1847 rxs, &decrypt_error);
1848 if (retval)
Felix Fietkau0d955212011-01-26 18:23:27 +01001849 goto requeue_drop_frag;
Jan Friedrichc8f3b722010-08-02 23:55:50 +02001850
Felix Fietkaua6d20552010-06-12 00:33:54 -04001851 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1852 if (rs.rs_tstamp > tsf_lower &&
1853 unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1854 rxs->mactime -= 0x100000000ULL;
1855
1856 if (rs.rs_tstamp < tsf_lower &&
1857 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1858 rxs->mactime += 0x100000000ULL;
1859
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001860 /* Ensure we always have an skb to requeue once we are done
1861 * processing the current buffer's skb */
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001862 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001863
1864 /* If there is no memory we ignore the current RX'd frame,
1865 * tell hardware it can give us a new frame using the old
Sujithb77f4832008-12-07 21:44:03 +05301866 * skb and put it at the tail of the sc->rx.rxbuf list for
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001867 * processing. */
1868 if (!requeue_skb)
Felix Fietkau0d955212011-01-26 18:23:27 +01001869 goto requeue_drop_frag;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001870
Vasanthakumar Thiagarajan9bf9fca2008-12-15 20:40:46 +05301871 /* Unmap the frame */
Gabor Juhos7da3c552009-01-14 20:17:03 +01001872 dma_unmap_single(sc->dev, bf->bf_buf_addr,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001873 common->rx_bufsize,
Felix Fietkaub5c804752010-04-15 17:38:48 -04001874 dma_type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001875
Felix Fietkaub5c804752010-04-15 17:38:48 -04001876 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1877 if (ah->caps.rx_status_len)
1878 skb_pull(skb, ah->caps.rx_status_len);
Sujithbe0418a2008-11-18 09:05:55 +05301879
Felix Fietkau0d955212011-01-26 18:23:27 +01001880 if (!rs.rs_more)
1881 ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1882 rxs, decrypt_error);
Sujithbe0418a2008-11-18 09:05:55 +05301883
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001884 /* We will now give hardware our shiny new allocated skb */
1885 bf->bf_mpdu = requeue_skb;
Gabor Juhos7da3c552009-01-14 20:17:03 +01001886 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
Luis R. Rodriguezcc861f72009-11-04 09:11:34 -08001887 common->rx_bufsize,
Felix Fietkaub5c804752010-04-15 17:38:48 -04001888 dma_type);
Gabor Juhos7da3c552009-01-14 20:17:03 +01001889 if (unlikely(dma_mapping_error(sc->dev,
Luis R. Rodriguezf8316df2008-12-03 03:35:29 -08001890 bf->bf_buf_addr))) {
1891 dev_kfree_skb_any(requeue_skb);
1892 bf->bf_mpdu = NULL;
Ben Greear6cf9e992010-10-14 12:45:30 -07001893 bf->bf_buf_addr = 0;
Joe Perches38002762010-12-02 19:12:36 -08001894 ath_err(common, "dma_mapping_error() on RX\n");
Felix Fietkau7545daf2011-01-24 19:23:16 +01001895 ieee80211_rx(hw, skb);
Luis R. Rodriguezf8316df2008-12-03 03:35:29 -08001896 break;
1897 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001898
Felix Fietkau0d955212011-01-26 18:23:27 +01001899 if (rs.rs_more) {
1900 /*
1901 * rs_more indicates chained descriptors which can be
1902 * used to link buffers together for a sort of
1903 * scatter-gather operation.
1904 */
1905 if (sc->rx.frag) {
1906 /* too many fragments - cannot handle frame */
1907 dev_kfree_skb_any(sc->rx.frag);
1908 dev_kfree_skb_any(skb);
1909 skb = NULL;
1910 }
1911 sc->rx.frag = skb;
1912 goto requeue;
1913 }
1914
1915 if (sc->rx.frag) {
1916 int space = skb->len - skb_tailroom(hdr_skb);
1917
1918 sc->rx.frag = NULL;
1919
1920 if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1921 dev_kfree_skb(skb);
1922 goto requeue_drop_frag;
1923 }
1924
1925 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1926 skb->len);
1927 dev_kfree_skb_any(skb);
1928 skb = hdr_skb;
1929 }
1930
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001931 /*
1932 * change the default rx antenna if rx diversity chooses the
1933 * other antenna 3 times in a row.
1934 */
Felix Fietkau29bffa92010-03-29 20:14:23 -07001935 if (sc->rx.defant != rs.rs_antenna) {
Sujithb77f4832008-12-07 21:44:03 +05301936 if (++sc->rx.rxotherant >= 3)
Felix Fietkau29bffa92010-03-29 20:14:23 -07001937 ath_setdefantenna(sc, rs.rs_antenna);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001938 } else {
Sujithb77f4832008-12-07 21:44:03 +05301939 sc->rx.rxotherant = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001940 }
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301941
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001942 spin_lock_irqsave(&sc->sc_pm_lock, flags);
Mohammed Shafi Shajakhanaaef24b2010-12-07 20:40:58 +05301943
1944 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
Vasanthakumar Thiagarajanededf1f2010-05-22 23:58:13 -07001945 PS_WAIT_FOR_CAB |
Mohammed Shafi Shajakhanaaef24b2010-12-07 20:40:58 +05301946 PS_WAIT_FOR_PSPOLL_DATA)) ||
Mohammed Shafi Shajakhancedc7e32011-04-22 13:12:23 +05301947 ath9k_check_auto_sleep(sc))
Jouni Malinencc659652009-05-14 21:28:48 +03001948 ath_rx_ps(sc, skb);
Luis R. Rodriguez8ab2cd02010-09-16 15:12:26 -04001949 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
Jouni Malinencc659652009-05-14 21:28:48 +03001950
Vasanthakumar Thiagarajan102885a2010-09-02 01:34:43 -07001951 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1952 ath_ant_comb_scan(sc, &rs);
1953
Felix Fietkau7545daf2011-01-24 19:23:16 +01001954 ieee80211_rx(hw, skb);
Jouni Malinencc659652009-05-14 21:28:48 +03001955
Felix Fietkau0d955212011-01-26 18:23:27 +01001956requeue_drop_frag:
1957 if (sc->rx.frag) {
1958 dev_kfree_skb_any(sc->rx.frag);
1959 sc->rx.frag = NULL;
1960 }
Luis R. Rodriguezcb71d9b2008-11-21 17:41:33 -08001961requeue:
Felix Fietkaub5c804752010-04-15 17:38:48 -04001962 if (edma) {
1963 list_add_tail(&bf->list, &sc->rx.rxbuf);
1964 ath_rx_edma_buf_link(sc, qtype);
1965 } else {
1966 list_move_tail(&bf->list, &sc->rx.rxbuf);
1967 ath_rx_buf_link(sc, bf);
Felix Fietkau95294972011-04-07 19:30:32 +02001968 ath9k_hw_rxena(ah);
Felix Fietkaub5c804752010-04-15 17:38:48 -04001969 }
Sujithbe0418a2008-11-18 09:05:55 +05301970 } while (1);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001971
Sujithb77f4832008-12-07 21:44:03 +05301972 spin_unlock_bh(&sc->rx.rxbuflock);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001973
1974 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001975}